From d4ad8d39785f4e2e06b4e32cd1ad33d4e0d6fb25 Mon Sep 17 00:00:00 2001 From: supowang Date: Tue, 16 Nov 2021 12:46:10 +0800 Subject: [PATCH] remove Freemodbus remove Freemodbus --- .../ALIENTEK_EXPLORER_STM32F407ZGT6.uvoptx | 1105 --- .../ALIENTEK_EXPLORER_STM32F407ZGT6.uvprojx | 797 -- .../KEIL/modbus/startup_stm32f407xx.s | 438 - .../KEIL/modbus/TencentOS_tiny.uvoptx | 1420 ---- .../KEIL/modbus/TencentOS_tiny.uvprojx | 882 -- .../KEIL/modbus/startup_stm32l431xx.s | 404 - .../3rdparty/freemodbus-v1.6/Changelog.txt | 330 - .../Modbus/3rdparty/freemodbus-v1.6/bsd.txt | 25 - .../demo/AT91SAM7X_ROWLEY/FreeRTOS/croutine.c | 345 - .../FreeRTOS/include/FreeRTOS.h | 114 - .../FreeRTOS/include/croutine.h | 716 -- .../AT91SAM7X_ROWLEY/FreeRTOS/include/list.h | 282 - .../FreeRTOS/include/portable.h | 77 - .../FreeRTOS/include/projdefs.h | 59 - .../AT91SAM7X_ROWLEY/FreeRTOS/include/queue.h | 474 -- .../FreeRTOS/include/semphr.h | 292 - .../AT91SAM7X_ROWLEY/FreeRTOS/include/task.h | 970 --- .../demo/AT91SAM7X_ROWLEY/FreeRTOS/list.c | 204 - .../portable/GCC/ARM7_AT91SAM7S/port.c | 207 - .../portable/GCC/ARM7_AT91SAM7S/portISR.c | 225 - .../portable/GCC/ARM7_AT91SAM7S/portmacro.h | 230 - .../FreeRTOS/portable/MemMang/heap_1.c | 140 - .../FreeRTOS/portable/MemMang/heap_2.c | 244 - .../FreeRTOS/portable/MemMang/heap_3.c | 82 - .../demo/AT91SAM7X_ROWLEY/FreeRTOS/queue.c | 930 --- .../demo/AT91SAM7X_ROWLEY/FreeRTOS/tasks.c | 1936 ----- .../demo/AT91SAM7X_ROWLEY/FreeRTOSConfig.h | 40 - .../demo/AT91SAM7X_ROWLEY/demo.c | 187 - .../demo/AT91SAM7X_ROWLEY/demo.hzp | 115 - .../demo/AT91SAM7X_ROWLEY/demo.hzs | 105 - .../demo/AT91SAM7X_ROWLEY/port/port.h | 80 - .../demo/AT91SAM7X_ROWLEY/port/portevent.c | 123 - .../demo/AT91SAM7X_ROWLEY/port/portother.c | 122 - .../demo/AT91SAM7X_ROWLEY/port/portserial.c | 259 - .../demo/AT91SAM7X_ROWLEY/port/porttimer.c | 105 - .../AT91SAM7X_ROWLEY/support/AT91SAM7X256.h | 2551 ------ .../support/AT91SAM7_target.js | 64 - .../support/lib_AT91SAM7X256.h | 4119 --------- .../demo/AT91SAM7X_ROWLEY/system/crt0.s | 232 - .../demo/AT91SAM7X_ROWLEY/system/startup.s | 236 - .../freemodbus-v1.6/demo/ATSAM3S/README.txt | 68 - .../ATSAM3S/board/at91sam3s4/AT91SAM3S4.h | 7010 ---------------- .../demo/ATSAM3S/board/at91sam3s4/chip.h | 130 - .../demo/ATSAM3S/board/at91sam3s4/flash.icf | 30 - .../demo/ATSAM3S/board/at91sam3s4/flash.lds | 81 - .../demo/ATSAM3S/board/at91sam3s4/sram.icf | 27 - .../demo/ATSAM3S/board/at91sam3s4/sram.lds | 81 - .../board/at91sam3s4/sram_flashloader.icf | 33 - .../ATSAM3S/board/at91sam3s4/sram_samba.lds | 91 - .../ATSAM3S/board/at91sam3u4/AT91SAM3U4.h | 7439 ----------------- .../demo/ATSAM3S/board/at91sam3u4/chip.h | 77 - .../demo/ATSAM3S/board/at91sam3u4/flash.icf | 47 - .../demo/ATSAM3S/board/at91sam3u4/flash.lds | 87 - .../demo/ATSAM3S/board/at91sam3u4/flash.sct | 58 - .../demo/ATSAM3S/board/at91sam3u4/psram.icf | 43 - .../demo/ATSAM3S/board/at91sam3u4/psram.lds | 86 - .../demo/ATSAM3S/board/at91sam3u4/psram.sct | 59 - .../demo/ATSAM3S/board/at91sam3u4/sram.icf | 33 - .../demo/ATSAM3S/board/at91sam3u4/sram.lds | 84 - .../demo/ATSAM3S/board/at91sam3u4/sram.sct | 60 - .../ATSAM3S/board/at91sam3u4/sram_samba.lds | 92 - .../demo/ATSAM3S/board/board.h | 665 -- .../demo/ATSAM3S/board/board_cstartup_gnu.c | 172 - .../demo/ATSAM3S/board/board_cstartup_iar.c | 143 - .../demo/ATSAM3S/board/board_cstartup_keil.c | 131 - .../demo/ATSAM3S/board/board_lowlevel.c | 141 - .../demo/ATSAM3S/board/board_lowlevel.h | 49 - .../demo/ATSAM3S/board/board_memories.c | 96 - .../demo/ATSAM3S/board/board_memories.h | 49 - .../demo/ATSAM3S/board/exceptions.c | 385 - .../demo/ATSAM3S/board/exceptions.h | 103 - .../freemodbus-v1.6/demo/ATSAM3S/demo.c | 187 - .../freemodbus-v1.6/demo/ATSAM3S/demo.ewp | 1758 ---- .../freemodbus-v1.6/demo/ATSAM3S/demo.eww | 10 - .../freemodbus-v1.6/demo/ATSAM3S/demo_rtu.bat | 1 - .../demo/ATSAM3S/libraries/cmsis/core_cm3.c | 804 -- .../demo/ATSAM3S/libraries/cmsis/core_cm3.h | 1265 --- .../demo/ATSAM3S/libraries/drivers/acc/acc.c | 164 - .../demo/ATSAM3S/libraries/drivers/acc/acc.h | 144 - .../demo/ATSAM3S/libraries/drivers/adc/adc.c | 231 - .../demo/ATSAM3S/libraries/drivers/adc/adc.h | 158 - .../ATSAM3S/libraries/drivers/async/async.c | 54 - .../ATSAM3S/libraries/drivers/async/async.h | 67 - .../ATSAM3S/libraries/drivers/crccu/crccu.c | 134 - .../ATSAM3S/libraries/drivers/crccu/crccu.h | 66 - .../ATSAM3S/libraries/drivers/dacc/dacc.c | 172 - .../ATSAM3S/libraries/drivers/dacc/dacc.h | 133 - .../demo/ATSAM3S/libraries/drivers/efc/efc.c | 286 - .../demo/ATSAM3S/libraries/drivers/efc/efc.h | 112 - .../ATSAM3S/libraries/drivers/flash/flashd.c | 494 -- .../ATSAM3S/libraries/drivers/flash/flashd.h | 84 - .../ATSAM3S/libraries/drivers/lcd/color.h | 85 - .../demo/ATSAM3S/libraries/drivers/lcd/draw.c | 333 - .../demo/ATSAM3S/libraries/drivers/lcd/draw.h | 114 - .../demo/ATSAM3S/libraries/drivers/lcd/font.c | 95 - .../demo/ATSAM3S/libraries/drivers/lcd/font.h | 92 - .../ATSAM3S/libraries/drivers/lcd/font10x14.h | 236 - .../demo/ATSAM3S/libraries/drivers/lcd/lcdd.c | 149 - .../demo/ATSAM3S/libraries/drivers/lcd/lcdd.h | 52 - .../demo/ATSAM3S/libraries/drivers/pio/pio.c | 464 - .../demo/ATSAM3S/libraries/drivers/pio/pio.h | 215 - .../ATSAM3S/libraries/drivers/pio/pio_it.c | 411 - .../ATSAM3S/libraries/drivers/pio/pio_it.h | 153 - .../libraries/drivers/pio/pio_keypad.c | 147 - .../libraries/drivers/pio/pio_keypad.h | 153 - .../demo/ATSAM3S/libraries/drivers/pmc/pmc.c | 143 - .../demo/ATSAM3S/libraries/drivers/pmc/pmc.h | 62 - .../ATSAM3S/libraries/drivers/pwmc/pwmc.c | 648 -- .../ATSAM3S/libraries/drivers/pwmc/pwmc.h | 159 - .../qtouch/libQTouchIarCfg3SRevABeta1.txt | 6 - .../qtouch/libQTouchIarCfg3SRevABeta2.txt | 10 - .../drivers/qtouch/libQTouchIarCfg3SRevB.txt | 11 - .../demo/ATSAM3S/libraries/drivers/rtc/rtc.c | 467 -- .../demo/ATSAM3S/libraries/drivers/rtc/rtc.h | 99 - .../demo/ATSAM3S/libraries/drivers/rtt/rtt.c | 136 - .../demo/ATSAM3S/libraries/drivers/rtt/rtt.h | 80 - .../libraries/drivers/spi-flash/at45d.c | 253 - .../libraries/drivers/spi-flash/at45d.h | 72 - .../libraries/drivers/spi-flash/spi_at45.c | 311 - .../libraries/drivers/spi-flash/spi_at45.h | 202 - .../libraries/drivers/spi-flash/spi_pdc.c | 275 - .../libraries/drivers/spi-flash/spi_pdc.h | 133 - .../demo/ATSAM3S/libraries/drivers/spi/spi.c | 241 - .../demo/ATSAM3S/libraries/drivers/spi/spi.h | 104 - .../demo/ATSAM3S/libraries/drivers/ssc/ssc.c | 248 - .../demo/ATSAM3S/libraries/drivers/ssc/ssc.h | 58 - .../demo/ATSAM3S/libraries/drivers/tc/tc.c | 148 - .../demo/ATSAM3S/libraries/drivers/tc/tc.h | 70 - .../demo/ATSAM3S/libraries/drivers/tsd/tsd.h | 69 - .../libraries/drivers/tsd/tsd_ads7843.c | 302 - .../libraries/drivers/tsd/tsd_ads7843.h | 20 - .../ATSAM3S/libraries/drivers/tsd/tsd_com.c | 380 - .../ATSAM3S/libraries/drivers/tsd/tsd_com.h | 54 - .../demo/ATSAM3S/libraries/drivers/twi/twi.c | 377 - .../demo/ATSAM3S/libraries/drivers/twi/twi.h | 95 - .../demo/ATSAM3S/libraries/drivers/twi/twid.c | 342 - .../demo/ATSAM3S/libraries/drivers/twi/twid.h | 86 - .../libraries/drivers/usart/uart_console.c | 288 - .../libraries/drivers/usart/uart_console.h | 38 - .../ATSAM3S/libraries/drivers/usart/usart.c | 395 - .../ATSAM3S/libraries/drivers/usart/usart.h | 129 - .../libraries/drivers/utility/assert.h | 114 - .../libraries/drivers/utility/bitbanding.h | 108 - .../ATSAM3S/libraries/drivers/utility/bmp.c | 322 - .../ATSAM3S/libraries/drivers/utility/bmp.h | 130 - .../ATSAM3S/libraries/drivers/utility/clock.c | 259 - .../ATSAM3S/libraries/drivers/utility/clock.h | 47 - .../drivers/utility/encryption/aes_hardware.c | 316 - .../drivers/utility/encryption/aes_hardware.h | 100 - .../utility/encryption/aes_reference.c | 801 -- .../utility/encryption/aes_reference.h | 132 - .../drivers/utility/encryption/encryption.h | 98 - .../drivers/utility/encryption/libtomcrypt.c | 445 - .../drivers/utility/encryption/libtomcrypt.h | 149 - .../utility/encryption/tdes_hardware.c | 520 -- .../utility/encryption/tdes_hardware.h | 125 - .../libraries/drivers/utility/hamming.c | 335 - .../libraries/drivers/utility/hamming.h | 72 - .../ATSAM3S/libraries/drivers/utility/iap.c | 98 - .../ATSAM3S/libraries/drivers/utility/iap.h | 51 - .../ATSAM3S/libraries/drivers/utility/led.c | 164 - .../ATSAM3S/libraries/drivers/utility/led.h | 70 - .../ATSAM3S/libraries/drivers/utility/math.c | 91 - .../ATSAM3S/libraries/drivers/utility/math.h | 41 - .../ATSAM3S/libraries/drivers/utility/rand.c | 60 - .../ATSAM3S/libraries/drivers/utility/rand.h | 49 - .../libraries/drivers/utility/retarget.c | 88 - .../ATSAM3S/libraries/drivers/utility/stdio.c | 511 -- .../libraries/drivers/utility/string.c | 239 - .../ATSAM3S/libraries/drivers/utility/trace.c | 45 - .../ATSAM3S/libraries/drivers/utility/trace.h | 241 - .../ATSAM3S/libraries/drivers/utility/util.c | 223 - .../ATSAM3S/libraries/drivers/utility/util.h | 48 - .../libraries/drivers/utility/utility.dir | 50 - .../ATSAM3S/libraries/drivers/utility/video.c | 130 - .../ATSAM3S/libraries/drivers/utility/video.h | 89 - .../ATSAM3S/libraries/drivers/utility/wav.c | 84 - .../ATSAM3S/libraries/drivers/utility/wav.h | 82 - .../demo/ATSAM3S/libraries/drivers/wdt/wdt.c | 141 - .../demo/ATSAM3S/libraries/drivers/wdt/wdt.h | 61 - .../freemodbus-v1.6/demo/ATSAM3S/port/port.h | 79 - .../demo/ATSAM3S/port/portevent.c | 67 - .../demo/ATSAM3S/port/portother.c | 74 - .../demo/ATSAM3S/port/portserial.c | 273 - .../demo/ATSAM3S/port/porttimer.c | 149 - .../demo/ATSAM3S_FREERTOS/README.txt | 68 - .../board/at91sam3s4/AT91SAM3S4.h | 7010 ---------------- .../ATSAM3S_FREERTOS/board/at91sam3s4/chip.h | 130 - .../board/at91sam3s4/flash.icf | 30 - .../board/at91sam3s4/flash.lds | 81 - .../board/at91sam3s4/sram.icf | 27 - .../board/at91sam3s4/sram.lds | 81 - .../board/at91sam3s4/sram_flashloader.icf | 33 - .../board/at91sam3s4/sram_samba.lds | 91 - .../board/at91sam3u4/AT91SAM3U4.h | 7439 ----------------- .../ATSAM3S_FREERTOS/board/at91sam3u4/chip.h | 77 - .../board/at91sam3u4/flash.icf | 47 - .../board/at91sam3u4/flash.lds | 87 - .../board/at91sam3u4/flash.sct | 58 - .../board/at91sam3u4/psram.icf | 43 - .../board/at91sam3u4/psram.lds | 86 - .../board/at91sam3u4/psram.sct | 59 - .../board/at91sam3u4/sram.icf | 33 - .../board/at91sam3u4/sram.lds | 84 - .../board/at91sam3u4/sram.sct | 60 - .../board/at91sam3u4/sram_samba.lds | 92 - .../demo/ATSAM3S_FREERTOS/board/board.h | 665 -- .../board/board_cstartup_gnu.c | 172 - .../board/board_cstartup_iar.c | 143 - .../board/board_cstartup_keil.c | 131 - .../ATSAM3S_FREERTOS/board/board_lowlevel.c | 141 - .../ATSAM3S_FREERTOS/board/board_lowlevel.h | 49 - .../ATSAM3S_FREERTOS/board/board_memories.c | 96 - .../ATSAM3S_FREERTOS/board/board_memories.h | 49 - .../demo/ATSAM3S_FREERTOS/board/exceptions.c | 385 - .../demo/ATSAM3S_FREERTOS/board/exceptions.h | 103 - .../demo/ATSAM3S_FREERTOS/demo.c | 241 - .../demo/ATSAM3S_FREERTOS/demo.ewp | 1791 ---- .../demo/ATSAM3S_FREERTOS/demo.eww | 10 - .../demo/ATSAM3S_FREERTOS/demo_rtu.bat | 1 - .../freertos/FreeRTOSConfig.h | 112 - .../demo/ATSAM3S_FREERTOS/freertos/croutine.c | 371 - .../freertos/include/FreeRTOS.h | 420 - .../freertos/include/StackMacros.h | 173 - .../freertos/include/croutine.h | 749 -- .../ATSAM3S_FREERTOS/freertos/include/list.h | 305 - .../freertos/include/mpu_wrappers.h | 135 - .../freertos/include/portable.h | 390 - .../freertos/include/projdefs.h | 77 - .../ATSAM3S_FREERTOS/freertos/include/queue.h | 1261 --- .../freertos/include/semphr.h | 711 -- .../ATSAM3S_FREERTOS/freertos/include/task.h | 1267 --- .../demo/ATSAM3S_FREERTOS/freertos/list.c | 191 - .../freertos/portable/GCC/ARM_CM3/port.c | 280 - .../freertos/portable/GCC/ARM_CM3/portmacro.h | 156 - .../freertos/portable/GCC/ARM_CM3_MPU/port.c | 1057 --- .../portable/GCC/ARM_CM3_MPU/portmacro.h | 199 - .../freertos/portable/IAR/ARM_CM3/port.c | 217 - .../freertos/portable/IAR/ARM_CM3/portasm.s | 167 - .../freertos/portable/IAR/ARM_CM3/portmacro.h | 133 - .../freertos/portable/MemMang/heap_1.c | 152 - .../freertos/portable/MemMang/heap_2.c | 280 - .../freertos/portable/MemMang/heap_3.c | 129 - .../freertos/portable/RVDS/ARM_CM3/port.c | 296 - .../portable/RVDS/ARM_CM3/portmacro.h | 133 - .../freertos/portable/readme.txt | 19 - .../demo/ATSAM3S_FREERTOS/freertos/queue.c | 1465 ---- .../demo/ATSAM3S_FREERTOS/freertos/readme.txt | 17 - .../demo/ATSAM3S_FREERTOS/freertos/tasks.c | 2307 ----- .../libraries/cmsis/core_cm3.c | 804 -- .../libraries/cmsis/core_cm3.h | 1265 --- .../libraries/drivers/acc/acc.c | 164 - .../libraries/drivers/acc/acc.h | 144 - .../libraries/drivers/adc/adc.c | 231 - .../libraries/drivers/adc/adc.h | 158 - .../libraries/drivers/async/async.c | 54 - .../libraries/drivers/async/async.h | 67 - .../libraries/drivers/crccu/crccu.c | 134 - .../libraries/drivers/crccu/crccu.h | 66 - .../libraries/drivers/dacc/dacc.c | 172 - .../libraries/drivers/dacc/dacc.h | 133 - .../libraries/drivers/efc/efc.c | 286 - .../libraries/drivers/efc/efc.h | 112 - .../libraries/drivers/flash/flashd.c | 494 -- .../libraries/drivers/flash/flashd.h | 84 - .../libraries/drivers/lcd/color.h | 85 - .../libraries/drivers/lcd/draw.c | 333 - .../libraries/drivers/lcd/draw.h | 114 - .../libraries/drivers/lcd/font.c | 95 - .../libraries/drivers/lcd/font.h | 92 - .../libraries/drivers/lcd/font10x14.h | 236 - .../libraries/drivers/lcd/lcdd.c | 149 - .../libraries/drivers/lcd/lcdd.h | 52 - .../libraries/drivers/pio/pio.c | 464 - .../libraries/drivers/pio/pio.h | 215 - .../libraries/drivers/pio/pio_it.c | 411 - .../libraries/drivers/pio/pio_it.h | 153 - .../libraries/drivers/pio/pio_keypad.c | 147 - .../libraries/drivers/pio/pio_keypad.h | 153 - .../libraries/drivers/pmc/pmc.c | 143 - .../libraries/drivers/pmc/pmc.h | 62 - .../libraries/drivers/pwmc/pwmc.c | 648 -- .../libraries/drivers/pwmc/pwmc.h | 159 - .../qtouch/libQTouchIarCfg3SRevABeta1.txt | 6 - .../qtouch/libQTouchIarCfg3SRevABeta2.txt | 10 - .../drivers/qtouch/libQTouchIarCfg3SRevB.txt | 11 - .../libraries/drivers/rtc/rtc.c | 467 -- .../libraries/drivers/rtc/rtc.h | 99 - .../libraries/drivers/rtt/rtt.c | 136 - .../libraries/drivers/rtt/rtt.h | 80 - .../libraries/drivers/spi-flash/at45d.c | 253 - .../libraries/drivers/spi-flash/at45d.h | 72 - .../libraries/drivers/spi-flash/spi_at45.c | 311 - .../libraries/drivers/spi-flash/spi_at45.h | 202 - .../libraries/drivers/spi-flash/spi_pdc.c | 275 - .../libraries/drivers/spi-flash/spi_pdc.h | 133 - .../libraries/drivers/spi/spi.c | 241 - .../libraries/drivers/spi/spi.h | 104 - .../libraries/drivers/ssc/ssc.c | 248 - .../libraries/drivers/ssc/ssc.h | 58 - .../libraries/drivers/tc/tc.c | 148 - .../libraries/drivers/tc/tc.h | 70 - .../libraries/drivers/tsd/tsd.h | 69 - .../libraries/drivers/tsd/tsd_ads7843.c | 302 - .../libraries/drivers/tsd/tsd_ads7843.h | 20 - .../libraries/drivers/tsd/tsd_com.c | 380 - .../libraries/drivers/tsd/tsd_com.h | 54 - .../libraries/drivers/twi/twi.c | 377 - .../libraries/drivers/twi/twi.h | 95 - .../libraries/drivers/twi/twid.c | 342 - .../libraries/drivers/twi/twid.h | 86 - .../libraries/drivers/usart/uart_console.c | 288 - .../libraries/drivers/usart/uart_console.h | 38 - .../libraries/drivers/usart/usart.c | 395 - .../libraries/drivers/usart/usart.h | 129 - .../libraries/drivers/utility/assert.h | 114 - .../libraries/drivers/utility/bitbanding.h | 108 - .../libraries/drivers/utility/bmp.c | 322 - .../libraries/drivers/utility/bmp.h | 130 - .../libraries/drivers/utility/clock.c | 259 - .../libraries/drivers/utility/clock.h | 47 - .../drivers/utility/encryption/aes_hardware.c | 316 - .../drivers/utility/encryption/aes_hardware.h | 100 - .../utility/encryption/aes_reference.c | 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a/board/ALIENTEK_EXPLORER_STM32F407ZGT6/KEIL/modbus/ALIENTEK_EXPLORER_STM32F407ZGT6.uvoptx b/board/ALIENTEK_EXPLORER_STM32F407ZGT6/KEIL/modbus/ALIENTEK_EXPLORER_STM32F407ZGT6.uvoptx deleted file mode 100644 index 77920877..00000000 --- a/board/ALIENTEK_EXPLORER_STM32F407ZGT6/KEIL/modbus/ALIENTEK_EXPLORER_STM32F407ZGT6.uvoptx +++ /dev/null @@ -1,1105 +0,0 @@ - - - - 1.0 - -
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mbrtu.c - 0 - 0 - - - 9 - 65 - 1 - 0 - 0 - 0 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\mb.c - mb.c - 0 - 0 - - - 9 - 66 - 1 - 0 - 0 - 0 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\tcp\mbtcp.c - mbtcp.c - 0 - 0 - - - - - modbus_port - 1 - 0 - 0 - 0 - - 10 - 67 - 1 - 0 - 0 - 0 - ..\..\..\..\components\connectivity\Modbus\porting\TencentOS_Tiny\portevent.c - portevent.c - 0 - 0 - - - 10 - 68 - 1 - 0 - 0 - 0 - ..\..\..\..\components\connectivity\Modbus\porting\TencentOS_Tiny\portserial.c - portserial.c - 0 - 0 - - - 10 - 69 - 1 - 0 - 0 - 0 - ..\..\..\..\components\connectivity\Modbus\porting\TencentOS_Tiny\porttimer.c - porttimer.c - 0 - 0 - - - - - ::CMSIS - 0 - 0 - 0 - 1 - - - diff --git a/board/ALIENTEK_EXPLORER_STM32F407ZGT6/KEIL/modbus/ALIENTEK_EXPLORER_STM32F407ZGT6.uvprojx b/board/ALIENTEK_EXPLORER_STM32F407ZGT6/KEIL/modbus/ALIENTEK_EXPLORER_STM32F407ZGT6.uvprojx deleted file mode 100644 index b6d05544..00000000 --- a/board/ALIENTEK_EXPLORER_STM32F407ZGT6/KEIL/modbus/ALIENTEK_EXPLORER_STM32F407ZGT6.uvprojx +++ /dev/null @@ -1,797 +0,0 @@ - - - - 2.1 - -
### uVision Project, (C) Keil Software
- - - - ALIENTEK_EXPLORER_STM32F407ZGT6 - 0x4 - ARM-ADS - 5060750::V5.06 update 6 (build 750)::ARMCC - 0 - - - STM32F407ZGTx - STMicroelectronics - Keil.STM32F4xx_DFP.2.14.0 - http://www.keil.com/pack/ - IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4") - - - - - - - - - - - - - - - $$Device:STM32F407ZGTx$CMSIS\SVD\STM32F40x.svd - 0 - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - ALIENTEK_EXPLORER_STM32F407ZGT6\ - ALIENTEK_EXPLORER_STM32F407ZGT6 - 1 - 0 - 0 - 1 - 0 - - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - 0 - - - SARMCM3.DLL - -REMAP -MPU - DCM.DLL - -pCM4 - SARMCM3.DLL - -MPU - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - - - 1 - 0 - 0 - 1 - 1 - 4101 - - 1 - STLink\ST-LINKIII-KEIL_SWO.dll - "" () - - - - - 0 - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - "Cortex-M4" - - 0 - 0 - 0 - 1 - 1 - 0 - 0 - 2 - 0 - 1 - 0 - 8 - 1 - 0 - 0 - 0 - 3 - 3 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x20000000 - 0x20000 - - - 1 - 0x8000000 - 0x100000 - - - 0 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x8000000 - 0x100000 - - - 1 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x20000000 - 0x20000 - - - 0 - 0x10000000 - 0x10000 - - - - - - 1 - 4 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 2 - 0 - 0 - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 0 - 0 - 0 - - - USE_HAL_DRIVER,STM32F407xx,USE_HAL_DRIVER,STM32F407xx,USE_MODBUS - - ..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32F4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\TOS_CONFIG;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\ascii;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\include;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\tcp;..\..\..\..\components\connectivity\Modbus\porting\TencentOS_Tiny - - - - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - - - - 1 - 0 - 0 - 0 - 1 - 0 - 0x08000000 - 0x20000000 - - - - - - - - - - - - - Application/MDK-ARM - - - startup_stm32f407xx.s - 2 - startup_stm32f407xx.s - - - - - Application/User - - - gpio.c - 1 - ..\..\BSP\Src\gpio.c - - - main.c - 1 - ..\..\BSP\Src\main.c - - - mcu_init.c - 1 - ..\..\BSP\Src\mcu_init.c - - - stm32f4xx_hal_msp.c - 1 - ..\..\BSP\Src\stm32f4xx_hal_msp.c - - - stm32f4xx_it.c - 1 - ..\..\BSP\Src\stm32f4xx_it.c - - - usart.c - 1 - ..\..\BSP\Src\usart.c - - - tim.c - 1 - ..\..\BSP\Src\tim.c - - - - - Drivers/STM32F4xx_HAL_Driver - - - stm32f4xx_hal.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c - - - stm32f4xx_hal_cortex.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c - - - stm32f4xx_hal_dma.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c - - - stm32f4xx_hal_dma_ex.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c - - - stm32f4xx_hal_exti.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c - - - stm32f4xx_hal_flash.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c - - - stm32f4xx_hal_flash_ex.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c - - - stm32f4xx_hal_flash_ramfunc.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c - - - stm32f4xx_hal_gpio.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c - - - stm32f4xx_hal_pwr.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c - - - stm32f4xx_hal_pwr_ex.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c - - - stm32f4xx_hal_rcc.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c - - - stm32f4xx_hal_rcc_ex.c - 1 - ..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c - 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1 - ..\..\..\..\kernel\core\tos_pend.c - - - tos_robin.c - 1 - ..\..\..\..\kernel\core\tos_robin.c - - - tos_sched.c - 1 - ..\..\..\..\kernel\core\tos_sched.c - - - tos_sem.c - 1 - ..\..\..\..\kernel\core\tos_sem.c - - - tos_sys.c - 1 - ..\..\..\..\kernel\core\tos_sys.c - - - tos_task.c - 1 - ..\..\..\..\kernel\core\tos_task.c - - - tos_tick.c - 1 - ..\..\..\..\kernel\core\tos_tick.c - - - tos_time.c - 1 - ..\..\..\..\kernel\core\tos_time.c - - - tos_timer.c - 1 - ..\..\..\..\kernel\core\tos_timer.c - - - tos_binary_heap.c - 1 - ..\..\..\..\kernel\core\tos_binary_heap.c - - - tos_char_fifo.c - 1 - ..\..\..\..\kernel\core\tos_char_fifo.c - - - tos_completion.c - 1 - ..\..\..\..\kernel\core\tos_completion.c - - - tos_countdownlatch.c - 1 - ..\..\..\..\kernel\core\tos_countdownlatch.c - - - tos_mail_queue.c - 1 - ..\..\..\..\kernel\core\tos_mail_queue.c - - - tos_message_queue.c - 1 - ..\..\..\..\kernel\core\tos_message_queue.c - - - tos_priority_mail_queue.c - 1 - ..\..\..\..\kernel\core\tos_priority_mail_queue.c - - - tos_priority_message_queue.c - 1 - ..\..\..\..\kernel\core\tos_priority_message_queue.c - - - tos_priority_queue.c - 1 - ..\..\..\..\kernel\core\tos_priority_queue.c - - - tos_ring_queue.c - 1 - ..\..\..\..\kernel\core\tos_ring_queue.c - - - - - tos/cmsis - - - cmsis_os.c - 1 - ..\..\..\..\osal\cmsis_os\cmsis_os.c - - - - - examples - - - modbus.c - 1 - ..\..\..\..\examples\modbus\modbus.c - - - - - modbus_src - - - mbascii.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\ascii\mbascii.c - - - mbfunccoils.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfunccoils.c - - - mbfuncdiag.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncdiag.c - - - mbfuncdisc.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncdisc.c - - - mbfuncholding.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncholding.c - - - mbfuncinput.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncinput.c - - - mbfuncother.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncother.c - - - mbutils.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbutils.c - - - mbcrc.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu\mbcrc.c - - - mbrtu.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu\mbrtu.c - - - mb.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\mb.c - - - mbtcp.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\tcp\mbtcp.c - - - - - modbus_port - - - portevent.c - 1 - ..\..\..\..\components\connectivity\Modbus\porting\TencentOS_Tiny\portevent.c - - - portserial.c - 1 - ..\..\..\..\components\connectivity\Modbus\porting\TencentOS_Tiny\portserial.c - - - porttimer.c - 1 - ..\..\..\..\components\connectivity\Modbus\porting\TencentOS_Tiny\porttimer.c - - - - - ::CMSIS - - - - - - - - - - - - - - - - - - - diff --git a/board/ALIENTEK_EXPLORER_STM32F407ZGT6/KEIL/modbus/startup_stm32f407xx.s b/board/ALIENTEK_EXPLORER_STM32F407ZGT6/KEIL/modbus/startup_stm32f407xx.s deleted file mode 100644 index 148a64aa..00000000 --- a/board/ALIENTEK_EXPLORER_STM32F407ZGT6/KEIL/modbus/startup_stm32f407xx.s +++ /dev/null @@ -1,438 +0,0 @@ -;******************** (C) COPYRIGHT 2017 STMicroelectronics ******************** -;* File Name : startup_stm32f407xx.s -;* Author : MCD Application Team -;* Description : STM32F407xx devices vector table for MDK-ARM toolchain. -;* This module performs: -;* - Set the initial SP -;* - Set the initial PC == Reset_Handler -;* - Set the vector table entries with the exceptions ISR address -;* - Branches to __main in the C library (which eventually -;* calls main()). -;* After Reset the CortexM4 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;* <<< Use Configuration Wizard in Context Menu >>> -;******************************************************************************* -; -;* Redistribution and use in source and binary forms, with or without modification, -;* are permitted provided that the following conditions are met: -;* 1. Redistributions of source code must retain the above copyright notice, -;* this list of conditions and the following disclaimer. -;* 2. Redistributions in binary form must reproduce the above copyright notice, -;* this list of conditions and the following disclaimer in the documentation -;* and/or other materials provided with the distribution. -;* 3. Neither the name of STMicroelectronics nor the names of its contributors -;* may be used to endorse or promote products derived from this software -;* without specific prior written permission. -;* -;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE -;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -; -;******************************************************************************* - -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 - THUMB - - -; Vector Table Mapped to Address 0 at Reset - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors DCD __initial_sp ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window WatchDog - DCD PVD_IRQHandler ; PVD through EXTI Line detection - DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line - DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line - DCD FLASH_IRQHandler ; FLASH - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line0 - DCD EXTI1_IRQHandler ; EXTI Line1 - DCD EXTI2_IRQHandler ; EXTI Line2 - DCD EXTI3_IRQHandler ; EXTI Line3 - DCD EXTI4_IRQHandler ; EXTI Line4 - DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0 - DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1 - DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2 - DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3 - DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4 - DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5 - DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6 - DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s - DCD CAN1_TX_IRQHandler ; CAN1 TX - DCD CAN1_RX0_IRQHandler ; CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; External Line[9:5]s - DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9 - DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10 - DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11 - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD TIM4_IRQHandler ; TIM4 - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C2 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; External Line[15:10]s - DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line - DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line - DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12 - DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13 - DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14 - DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare - DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7 - DCD FMC_IRQHandler ; FMC - DCD SDIO_IRQHandler ; SDIO - DCD TIM5_IRQHandler ; TIM5 - DCD SPI3_IRQHandler ; SPI3 - DCD UART4_IRQHandler ; UART4 - DCD UART5_IRQHandler ; UART5 - DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors - DCD TIM7_IRQHandler ; TIM7 - DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0 - DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1 - DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2 - DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3 - DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4 - DCD ETH_IRQHandler ; Ethernet - DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line - DCD CAN2_TX_IRQHandler ; CAN2 TX - DCD CAN2_RX0_IRQHandler ; CAN2 RX0 - DCD CAN2_RX1_IRQHandler ; CAN2 RX1 - DCD CAN2_SCE_IRQHandler ; CAN2 SCE - DCD OTG_FS_IRQHandler ; USB OTG FS - DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5 - DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6 - DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7 - DCD USART6_IRQHandler ; USART6 - DCD I2C3_EV_IRQHandler ; I2C3 event - DCD I2C3_ER_IRQHandler ; I2C3 error - DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out - DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In - DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI - DCD OTG_HS_IRQHandler ; USB OTG HS - DCD DCMI_IRQHandler ; DCMI - DCD 0 ; Reserved - DCD HASH_RNG_IRQHandler ; Hash and Rng - DCD FPU_IRQHandler ; FPU - - -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - - AREA |.text|, CODE, READONLY - -; Reset handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT SystemInit - IMPORT __main - - LDR R0, =SystemInit - BLX R0 - LDR R0, =__main - BX R0 - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) - -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B . - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B . - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B . - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B . - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - - EXPORT WWDG_IRQHandler [WEAK] - EXPORT PVD_IRQHandler [WEAK] - EXPORT TAMP_STAMP_IRQHandler [WEAK] - EXPORT RTC_WKUP_IRQHandler [WEAK] - EXPORT FLASH_IRQHandler [WEAK] - EXPORT RCC_IRQHandler [WEAK] - EXPORT EXTI0_IRQHandler [WEAK] - EXPORT EXTI1_IRQHandler [WEAK] - EXPORT EXTI2_IRQHandler [WEAK] - EXPORT EXTI3_IRQHandler [WEAK] - EXPORT EXTI4_IRQHandler [WEAK] - EXPORT DMA1_Stream0_IRQHandler [WEAK] - EXPORT DMA1_Stream1_IRQHandler [WEAK] - EXPORT DMA1_Stream2_IRQHandler [WEAK] - EXPORT DMA1_Stream3_IRQHandler [WEAK] - EXPORT DMA1_Stream4_IRQHandler [WEAK] - EXPORT DMA1_Stream5_IRQHandler [WEAK] - EXPORT DMA1_Stream6_IRQHandler [WEAK] - EXPORT ADC_IRQHandler [WEAK] - EXPORT CAN1_TX_IRQHandler [WEAK] - EXPORT CAN1_RX0_IRQHandler [WEAK] - EXPORT CAN1_RX1_IRQHandler [WEAK] - EXPORT CAN1_SCE_IRQHandler [WEAK] - EXPORT EXTI9_5_IRQHandler [WEAK] - EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK] - EXPORT TIM1_UP_TIM10_IRQHandler [WEAK] - EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK] - EXPORT TIM1_CC_IRQHandler [WEAK] - EXPORT TIM2_IRQHandler [WEAK] - EXPORT TIM3_IRQHandler [WEAK] - EXPORT TIM4_IRQHandler [WEAK] - EXPORT I2C1_EV_IRQHandler [WEAK] - EXPORT I2C1_ER_IRQHandler [WEAK] - EXPORT I2C2_EV_IRQHandler [WEAK] - EXPORT I2C2_ER_IRQHandler [WEAK] - EXPORT SPI1_IRQHandler [WEAK] - EXPORT SPI2_IRQHandler [WEAK] - EXPORT USART1_IRQHandler [WEAK] - EXPORT USART2_IRQHandler [WEAK] - EXPORT USART3_IRQHandler [WEAK] - EXPORT EXTI15_10_IRQHandler [WEAK] - EXPORT RTC_Alarm_IRQHandler [WEAK] - EXPORT OTG_FS_WKUP_IRQHandler [WEAK] - EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK] - EXPORT TIM8_UP_TIM13_IRQHandler [WEAK] - EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK] - EXPORT TIM8_CC_IRQHandler [WEAK] - EXPORT DMA1_Stream7_IRQHandler [WEAK] - EXPORT FMC_IRQHandler [WEAK] - EXPORT SDIO_IRQHandler [WEAK] - EXPORT TIM5_IRQHandler [WEAK] - EXPORT SPI3_IRQHandler [WEAK] - EXPORT UART4_IRQHandler [WEAK] - EXPORT UART5_IRQHandler [WEAK] - EXPORT TIM6_DAC_IRQHandler [WEAK] - EXPORT TIM7_IRQHandler [WEAK] - EXPORT DMA2_Stream0_IRQHandler [WEAK] - EXPORT DMA2_Stream1_IRQHandler [WEAK] - EXPORT DMA2_Stream2_IRQHandler [WEAK] - EXPORT DMA2_Stream3_IRQHandler [WEAK] - EXPORT DMA2_Stream4_IRQHandler [WEAK] - EXPORT ETH_IRQHandler [WEAK] - EXPORT ETH_WKUP_IRQHandler [WEAK] - EXPORT CAN2_TX_IRQHandler [WEAK] - EXPORT CAN2_RX0_IRQHandler [WEAK] - EXPORT CAN2_RX1_IRQHandler [WEAK] - EXPORT CAN2_SCE_IRQHandler [WEAK] - EXPORT OTG_FS_IRQHandler [WEAK] - EXPORT DMA2_Stream5_IRQHandler [WEAK] - EXPORT DMA2_Stream6_IRQHandler [WEAK] - EXPORT DMA2_Stream7_IRQHandler [WEAK] - EXPORT USART6_IRQHandler [WEAK] - EXPORT I2C3_EV_IRQHandler [WEAK] - EXPORT I2C3_ER_IRQHandler [WEAK] - EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK] - EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK] - EXPORT OTG_HS_WKUP_IRQHandler [WEAK] - EXPORT OTG_HS_IRQHandler [WEAK] - EXPORT DCMI_IRQHandler [WEAK] - EXPORT HASH_RNG_IRQHandler [WEAK] - EXPORT FPU_IRQHandler [WEAK] - -WWDG_IRQHandler -PVD_IRQHandler -TAMP_STAMP_IRQHandler -RTC_WKUP_IRQHandler -FLASH_IRQHandler -RCC_IRQHandler -EXTI0_IRQHandler -EXTI1_IRQHandler -EXTI2_IRQHandler -EXTI3_IRQHandler -EXTI4_IRQHandler -DMA1_Stream0_IRQHandler -DMA1_Stream1_IRQHandler -DMA1_Stream2_IRQHandler -DMA1_Stream3_IRQHandler -DMA1_Stream4_IRQHandler -DMA1_Stream5_IRQHandler -DMA1_Stream6_IRQHandler -ADC_IRQHandler -CAN1_TX_IRQHandler -CAN1_RX0_IRQHandler -CAN1_RX1_IRQHandler -CAN1_SCE_IRQHandler -EXTI9_5_IRQHandler -TIM1_BRK_TIM9_IRQHandler -TIM1_UP_TIM10_IRQHandler -TIM1_TRG_COM_TIM11_IRQHandler -TIM1_CC_IRQHandler -TIM2_IRQHandler -TIM3_IRQHandler -TIM4_IRQHandler -I2C1_EV_IRQHandler -I2C1_ER_IRQHandler -I2C2_EV_IRQHandler -I2C2_ER_IRQHandler -SPI1_IRQHandler -SPI2_IRQHandler -USART1_IRQHandler -USART2_IRQHandler -USART3_IRQHandler -EXTI15_10_IRQHandler -RTC_Alarm_IRQHandler -OTG_FS_WKUP_IRQHandler -TIM8_BRK_TIM12_IRQHandler -TIM8_UP_TIM13_IRQHandler -TIM8_TRG_COM_TIM14_IRQHandler -TIM8_CC_IRQHandler -DMA1_Stream7_IRQHandler -FMC_IRQHandler -SDIO_IRQHandler -TIM5_IRQHandler -SPI3_IRQHandler -UART4_IRQHandler -UART5_IRQHandler -TIM6_DAC_IRQHandler -TIM7_IRQHandler -DMA2_Stream0_IRQHandler -DMA2_Stream1_IRQHandler -DMA2_Stream2_IRQHandler -DMA2_Stream3_IRQHandler -DMA2_Stream4_IRQHandler -ETH_IRQHandler -ETH_WKUP_IRQHandler -CAN2_TX_IRQHandler -CAN2_RX0_IRQHandler -CAN2_RX1_IRQHandler -CAN2_SCE_IRQHandler -OTG_FS_IRQHandler -DMA2_Stream5_IRQHandler -DMA2_Stream6_IRQHandler -DMA2_Stream7_IRQHandler -USART6_IRQHandler -I2C3_EV_IRQHandler -I2C3_ER_IRQHandler -OTG_HS_EP1_OUT_IRQHandler -OTG_HS_EP1_IN_IRQHandler -OTG_HS_WKUP_IRQHandler -OTG_HS_IRQHandler -DCMI_IRQHandler -HASH_RNG_IRQHandler -FPU_IRQHandler - - B . - - ENDP - - ALIGN - -;******************************************************************************* -; User Stack and Heap initialization -;******************************************************************************* - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap - -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/modbus/TencentOS_tiny.uvoptx b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/modbus/TencentOS_tiny.uvoptx deleted file mode 100644 index ecb68d46..00000000 --- a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/modbus/TencentOS_tiny.uvoptx +++ /dev/null @@ -1,1420 +0,0 @@ - - - - 1.0 - -
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
- - - - TencentOS_tiny - 0x4 - ARM-ADS - 5060750::V5.06 update 6 (build 750)::ARMCC - 0 - - - STM32L431RCTx - STMicroelectronics - Keil.STM32L4xx_DFP.2.2.0 - http://www.keil.com/pack - IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4") - - - - - - - - - - - - - - - $$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd - 0 - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\obj\ - TencentOS_tiny - 1 - 0 - 1 - 1 - 0 - .\list\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - 0 - - - SARMCM3.DLL - -REMAP -MPU - DCM.DLL - -pCM4 - SARMCM3.DLL - -MPU - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - - - 1 - 0 - 0 - 1 - 1 - 4107 - - 1 - STLink\ST-LINKIII-KEIL_SWO.dll - - - - - - 0 - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - "Cortex-M4" - - 0 - 0 - 0 - 1 - 1 - 0 - 0 - 2 - 0 - 0 - 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tos_sys.c - 1 - ..\..\..\..\kernel\core\tos_sys.c - - - tos_task.c - 1 - ..\..\..\..\kernel\core\tos_task.c - - - tos_tick.c - 1 - ..\..\..\..\kernel\core\tos_tick.c - - - tos_time.c - 1 - ..\..\..\..\kernel\core\tos_time.c - - - tos_timer.c - 1 - ..\..\..\..\kernel\core\tos_timer.c - - - - - cpu - - - port_s.S - 2 - ..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S - - - tos_cpu.c - 1 - ..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c - - - port_c.c - 1 - ..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c - - - - - cmsis - - - cmsis_os.c - 1 - ..\..\..\..\osal\cmsis_os\cmsis_os.c - - - - - config - - - tos_config.h - 5 - ..\..\TOS-CONFIG\tos_config.h - - - - - modbus_src - - - mbascii.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\ascii\mbascii.c - - - mbfunccoils.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfunccoils.c - - - mbfuncdiag.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncdiag.c - - - mbfuncdisc.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncdisc.c - - - mbfuncholding.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncholding.c - - - mbfuncinput.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncinput.c - - - mbfuncother.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncother.c - - - mbutils.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbutils.c - - - mbcrc.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu\mbcrc.c - - - mbrtu.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu\mbrtu.c - - - mbtcp.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\tcp\mbtcp.c - - - mb.c - 1 - ..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\mb.c - - - - - modbus_port - - - portevent.c - 1 - ..\..\BSP\Hardware\Modbus_Port\portevent.c - - - portserial.c - 1 - ..\..\BSP\Hardware\Modbus_Port\portserial.c - - - porttimer.c - 1 - ..\..\BSP\Hardware\Modbus_Port\porttimer.c - - - - - ::CMSIS - - - - - - - - - - - - - - - - - - - diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/modbus/startup_stm32l431xx.s b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/modbus/startup_stm32l431xx.s deleted file mode 100644 index 6a5c15a5..00000000 --- a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/modbus/startup_stm32l431xx.s +++ /dev/null @@ -1,404 +0,0 @@ -;********************** COPYRIGHT(c) 2017 STMicroelectronics ****************** -;* File Name : startup_stm32l431xx.s -;* Author : MCD Application Team -;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain. -;* This module performs: -;* - Set the initial SP -;* - Set the initial PC == Reset_Handler -;* - Set the vector table entries with the exceptions ISR address -;* - Branches to __main in the C library (which eventually -;* calls main()). -;* After Reset the Cortex-M4 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;* <<< Use Configuration Wizard in Context Menu >>> -;******************************************************************************* -;* -;* Redistribution and use in source and binary forms, with or without modification, -;* are permitted provided that the following conditions are met: -;* 1. Redistributions of source code must retain the above copyright notice, -;* this list of conditions and the following disclaimer. -;* 2. Redistributions in binary form must reproduce the above copyright notice, -;* this list of conditions and the following disclaimer in the documentation -;* and/or other materials provided with the distribution. -;* 3. Neither the name of STMicroelectronics nor the names of its contributors -;* may be used to endorse or promote products derived from this software -;* without specific prior written permission. -;* -;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE -;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -;* -;******************************************************************************* -; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x100 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x100 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 - THUMB - - -; Vector Table Mapped to Address 0 at Reset - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors DCD __initial_sp ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window WatchDog - DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection - DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line - DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line - DCD FLASH_IRQHandler ; FLASH - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line0 - DCD EXTI1_IRQHandler ; EXTI Line1 - DCD EXTI2_IRQHandler ; EXTI Line2 - DCD EXTI3_IRQHandler ; EXTI Line3 - DCD EXTI4_IRQHandler ; EXTI Line4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_IRQHandler ; ADC1 - DCD CAN1_TX_IRQHandler ; CAN1 TX - DCD CAN1_RX0_IRQHandler ; CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; External Line[9:5]s - DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 - DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 - DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C2 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; External Line[15:10] - DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SDMMC1_IRQHandler ; SDMMC1 - DCD 0 ; Reserved - DCD SPI3_IRQHandler ; SPI3 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors - DCD TIM7_IRQHandler ; TIM7 - DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 - DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 - DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 - DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 - DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD COMP_IRQHandler ; COMP Interrupt - DCD LPTIM1_IRQHandler ; LP TIM1 interrupt - DCD LPTIM2_IRQHandler ; LP TIM2 interrupt - DCD 0 ; Reserved - DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6 - DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7 - DCD LPUART1_IRQHandler ; LP UART1 interrupt - DCD QUADSPI_IRQHandler ; Quad SPI global interrupt - DCD I2C3_EV_IRQHandler ; I2C3 event - DCD I2C3_ER_IRQHandler ; I2C3 error - DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt - DCD 0 ; Reserved - DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt - DCD TSC_IRQHandler ; Touch Sense Controller global interrupt - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD RNG_IRQHandler ; RNG global interrupt - DCD FPU_IRQHandler ; FPU - DCD CRS_IRQHandler ; CRS interrupt - -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - - AREA |.text|, CODE, READONLY - -; Reset handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT SystemInit - IMPORT __main - - LDR R0, =SystemInit - BLX R0 - LDR R0, =__main - BX R0 - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) - -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B . - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B . - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B . - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B . - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - - EXPORT WWDG_IRQHandler [WEAK] - EXPORT PVD_PVM_IRQHandler [WEAK] - EXPORT TAMP_STAMP_IRQHandler [WEAK] - EXPORT RTC_WKUP_IRQHandler [WEAK] - EXPORT FLASH_IRQHandler [WEAK] - EXPORT RCC_IRQHandler [WEAK] - EXPORT EXTI0_IRQHandler [WEAK] - EXPORT EXTI1_IRQHandler [WEAK] - EXPORT EXTI2_IRQHandler [WEAK] - EXPORT EXTI3_IRQHandler [WEAK] - EXPORT EXTI4_IRQHandler [WEAK] - EXPORT DMA1_Channel1_IRQHandler [WEAK] - EXPORT DMA1_Channel2_IRQHandler [WEAK] - EXPORT DMA1_Channel3_IRQHandler [WEAK] - EXPORT DMA1_Channel4_IRQHandler [WEAK] - EXPORT DMA1_Channel5_IRQHandler [WEAK] - EXPORT DMA1_Channel6_IRQHandler [WEAK] - EXPORT DMA1_Channel7_IRQHandler [WEAK] - EXPORT ADC1_IRQHandler [WEAK] - EXPORT CAN1_TX_IRQHandler [WEAK] - EXPORT CAN1_RX0_IRQHandler [WEAK] - EXPORT CAN1_RX1_IRQHandler [WEAK] - EXPORT CAN1_SCE_IRQHandler [WEAK] - EXPORT EXTI9_5_IRQHandler [WEAK] - EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] - EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] - EXPORT TIM1_TRG_COM_IRQHandler [WEAK] - EXPORT TIM1_CC_IRQHandler [WEAK] - EXPORT TIM2_IRQHandler [WEAK] - EXPORT I2C1_EV_IRQHandler [WEAK] - EXPORT I2C1_ER_IRQHandler [WEAK] - EXPORT I2C2_EV_IRQHandler [WEAK] - EXPORT I2C2_ER_IRQHandler [WEAK] - EXPORT SPI1_IRQHandler [WEAK] - EXPORT SPI2_IRQHandler [WEAK] - EXPORT USART1_IRQHandler [WEAK] - EXPORT USART2_IRQHandler [WEAK] - EXPORT USART3_IRQHandler [WEAK] - EXPORT EXTI15_10_IRQHandler [WEAK] - EXPORT RTC_Alarm_IRQHandler [WEAK] - EXPORT SDMMC1_IRQHandler [WEAK] - EXPORT SPI3_IRQHandler [WEAK] - EXPORT TIM6_DAC_IRQHandler [WEAK] - EXPORT TIM7_IRQHandler [WEAK] - EXPORT DMA2_Channel1_IRQHandler [WEAK] - EXPORT DMA2_Channel2_IRQHandler [WEAK] - EXPORT DMA2_Channel3_IRQHandler [WEAK] - EXPORT DMA2_Channel4_IRQHandler [WEAK] - EXPORT DMA2_Channel5_IRQHandler [WEAK] - EXPORT COMP_IRQHandler [WEAK] - EXPORT LPTIM1_IRQHandler [WEAK] - EXPORT LPTIM2_IRQHandler [WEAK] - EXPORT DMA2_Channel6_IRQHandler [WEAK] - EXPORT DMA2_Channel7_IRQHandler [WEAK] - EXPORT LPUART1_IRQHandler [WEAK] - EXPORT QUADSPI_IRQHandler [WEAK] - EXPORT I2C3_EV_IRQHandler [WEAK] - EXPORT I2C3_ER_IRQHandler [WEAK] - EXPORT SAI1_IRQHandler [WEAK] - EXPORT SWPMI1_IRQHandler [WEAK] - EXPORT TSC_IRQHandler [WEAK] - EXPORT RNG_IRQHandler [WEAK] - EXPORT FPU_IRQHandler [WEAK] - EXPORT CRS_IRQHandler [WEAK] - -WWDG_IRQHandler -PVD_PVM_IRQHandler -TAMP_STAMP_IRQHandler -RTC_WKUP_IRQHandler -FLASH_IRQHandler -RCC_IRQHandler -EXTI0_IRQHandler -EXTI1_IRQHandler -EXTI2_IRQHandler -EXTI3_IRQHandler -EXTI4_IRQHandler -DMA1_Channel1_IRQHandler -DMA1_Channel2_IRQHandler -DMA1_Channel3_IRQHandler -DMA1_Channel4_IRQHandler -DMA1_Channel5_IRQHandler -DMA1_Channel6_IRQHandler -DMA1_Channel7_IRQHandler -ADC1_IRQHandler -CAN1_TX_IRQHandler -CAN1_RX0_IRQHandler -CAN1_RX1_IRQHandler -CAN1_SCE_IRQHandler -EXTI9_5_IRQHandler -TIM1_BRK_TIM15_IRQHandler -TIM1_UP_TIM16_IRQHandler -TIM1_TRG_COM_IRQHandler -TIM1_CC_IRQHandler -TIM2_IRQHandler -I2C1_EV_IRQHandler -I2C1_ER_IRQHandler -I2C2_EV_IRQHandler -I2C2_ER_IRQHandler -SPI1_IRQHandler -SPI2_IRQHandler -USART1_IRQHandler -USART2_IRQHandler -USART3_IRQHandler -EXTI15_10_IRQHandler -RTC_Alarm_IRQHandler -SDMMC1_IRQHandler -SPI3_IRQHandler -TIM6_DAC_IRQHandler -TIM7_IRQHandler -DMA2_Channel1_IRQHandler -DMA2_Channel2_IRQHandler -DMA2_Channel3_IRQHandler -DMA2_Channel4_IRQHandler -DMA2_Channel5_IRQHandler -COMP_IRQHandler -LPTIM1_IRQHandler -LPTIM2_IRQHandler -DMA2_Channel6_IRQHandler -DMA2_Channel7_IRQHandler -LPUART1_IRQHandler -QUADSPI_IRQHandler -I2C3_EV_IRQHandler -I2C3_ER_IRQHandler -SAI1_IRQHandler -SWPMI1_IRQHandler -TSC_IRQHandler -RNG_IRQHandler -FPU_IRQHandler -CRS_IRQHandler - - B . - - ENDP - - ALIGN - -;******************************************************************************* -; User Stack and Heap initialization -;******************************************************************************* - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap - -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/Changelog.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/Changelog.txt deleted file mode 100644 index 9ceae074..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/Changelog.txt +++ /dev/null @@ -1,330 +0,0 @@ -2018-09-13 (REL_1_6_0) Christian Walter - Notes: Changed licensing for mbfuncdisc.c. Updating licensing info - and contact details in core stack. - -2010-05-06 (REL_1_5_0) Christian Walter - Notes: Added support for Atmel AT91SAM3S (Cortex M3) for IAR. - - Detailed notes: - - FEATURES (ATSAM3S) : Added new port. - -2007-08-28 (REL_1_4_0) Christian Walter : - Notes: Added support for HCS08. Fixed some small bugs in the documentation - for the porting layer. - - Detailed notes: - - FEATURES (HCS08) : Added new port. - - BUGS (ALL) : Fixed some small bugs in the porting guide. - -2007-07-17 (REL_1_3_0) Christian Walter : - Notes: Added ARM7/AT91SAM7X port. Added Linux/TCP port from Steven Guo. - - Detailed notes: - - FEATURES (ARM7): Added ARM7/AT91SAM7x port. - - FEATURES (LINUX): Added Linux/TCP port from Steven Guo. - - BUGS (ALL): Fixed bug in where the high - byte of the register count was ignored. This does not have a - practical impact because the actual number of registers is always - lower. - -2007-07-17 (REL_1_3_0) Christian Walter : - Notes: Added Linux/TCP port. Fixed bug in MSP430 port. - Detailted notes: - - FEATURE (LINUX): Added Linux/TCP port. - - BUGS (MSP430): Fixed bug with calculating the timer value. - -2007-04-25 (REL_1_2_0) Christian Walter : - Notes: Added LPC214X ARM port with Keil compiler. Added Z8Encore port for - Z8F6422 microcontroller. - - Detailed notes: - - FEATURE (ARM): Added LPC214X ARM port for Keil ARM 2.41. - - FEATURE (Z8ENCORE): Added Z8F6422 for Z8Encore using the ZDS II - Z8 - Encore! development tools. - -2007-02-18 (REL_1_1_2) Christian Walter : - Notes: Fixed typo with the defined defining the supported Modbus - functions. Fixed bug when illegal slave address was passed to eMBInit - where the error was not detected. Fixed typo in the holding registers - where the frame for write multiple registers was parsed with the wrong - constants. The fix is not critical because the values matched. Fixed bug - in discrete input registers implementation where the frame was not parsed - correctly. Added new support for a CodeWarrior Coldfire port. - - Detailed notes: - - BUG (ALL): Modbus functions are compiled into the stack conditionally - by changing the MB_FUNC_XXX defines to either true(1) or false(0). - The defines for MB_FUNC_READ_HOLDING and MB_FUNC_WRITE_HOLDING - were wrong. - - BUG (ALL): eMBInit did not correctly check for addresses. Therefore - is was possible to start the Modbus stack with an address of 0 - or one > 247. - - BUG (ALL): eMBFuncWriteHoldingRegister should use - MB_PDU_FUNC_WRITE_MUL_ADDR_OFF and not MB_PDU_FUNC_READ_ADDR_OFF. - - BUG (ALL): eMBFuncReadDiscreteInputs calculated the number of discrete - registers to read wrong. - - FEATURE (ALL): Fixed some warnings in the code. - -2006-11-19 (REL_1_1_1) Christian Walter : - Notes: Fixed bug in Read/Write Multiple Registers function where - the registers addresses where calculated wrong. - Fixed bug in RTU and ASCII with the resource allocation in case of - an error. - Changed license to BSD style licsense. - - Detailed notes: - - OTHER (ALL): License is now BSD for protocol stack. - - BUG (ALL): The registers address received in a Modbus frame - must be converted to application addresses. The code for this - conversion was missing and therefore has lead to error when - this function was used (Registers of by one, Start at > 1). - - BUG (ALL): If the serial initialization within the porting fails - a timer is still allocated in eMBRTUInit and eMBASCIIInit. This - can lead to a memory leak depending upon the implementation of the - porting layer. - - FEATURE (MCF5235): Added sample shell scripts for testing. - - FEATURE (MSP430): Added sample shell script for testing and - changed default values to match the other ports. - -2006-10-30 (REL_1_1_0) Christian Walter : - Notes: Added support for Read/Write Multiple Registers function - (0x17). Added some tips to reduce memory requirements. - Added MSP430 Port for GCC and Rowley Crossworks. - - Detailed notes: - - FEATURE (MSP430): Added new MSP430 port. - - FEATURE (ALL): Added support for Read/Write Multiple Registers - function (0x17). The implementation simply makes two callbacks - to the eMBRegHoldingCB function where first the values are - written and then the other register values are read. - - FEATURE (ALL): Added some tips on reducing memory requirements - with the protocol stack. - -2006-10-30 (REL_1_0_5) Christian Walter : - Notes: eMBDisable and eMBClose can now be called multiple times - which makes shutdown of the protocol stack easier. - Fixed bug in RTU state machine where we switched from the - error state immediately to the idle state. Correct behaviour - would be to wait till the end of frame. - Added new STR71X GCC port which uses only freely available tools - like GNU ARM, OpenOCD (Wiggler) and GDB. - - Detailed notes: - - FEATURE (STR71X): Added GCC standalone port which does not - depend on the Rowley Crosswork tools. - - FEATURE (ALL): eMBDisable can now be called multiple times - and returns MB_ENOERR in case is was already disabled. - eMBClose also supports beeing called multiple times in - which pvMBFrameCloseCur( ) is called when the protocol stack - is in state STATE_DISABLED. - - BUG (RTU): Fixed bug in xMBRTUReceiveFSM where the error - state is immediately left because of a missing break. Instead - we should wait till the damaged frame is finished. - -2006-10-11 (REL_1_0_4) Christian Walter : - Notes: Fixed bug when more than 255 coils are requested. Fixed bug in - Linux/Cygwin port when not all bytes could be written by the first - call to write. Added support for removing previously registered - function handlers. - - Detailed notes: - - BUG (ALL): mbfunccoils contained a bug which limited the amount - of coils to read to 255. - - BUG (LINUX): prvbMBPortSerialWrite contained a bug in the loop - which writes the RTU/ASCII frame to the serial file descriptor. - If not all bytes where written in the first call or write was - interrupted the sent frame is corrupted. - - FEATURE (ALL): eMBRegisterCB now supports NULL as handler - argument in which case a previously registered function - handler is deregistered from the protocol stack. - -2006-09-27 (REL_1_0_3) Christian Walter : - Notes: Added new functions to support registering of custom callback - handlers. This makes it possible to implement new Modbus function - codes without touching the protocol stack. - New port for ATMega128 added. Thanks to Richard C Sandoz Jr. for - the patches. - - Detailed notes: - - FEATURE (ALL): Added support for registering new functions handlers - with eMBRegisterCB. - - FEATURE (AVR): Added patches from Richard C Sandoz Jr. for ATMega128 - -2006-09-06 (REL_1_0_2) Christian Walter : - Notes: Fixed bug in FreeRTOS porting layer for STR71X/lwIP target where - memory is not freed in the sys_arch_thread_remove function. - Synched MCF5235TCP port with the FreeRTOS/lwIP port for the STR71X. - - Detailed notes: - - BUG (STR71XTCP): Sys_arch_thread_remove did not free the memory from - the TCB. - - BUG (STR71XTCP): Unnecessary call to vTaskSuspendAll removed. - - BUG (STR71XTCP): Bug with counting variable. The first to lwIP tasks - got the same name (lwIP0). - - FEATURE (MCF5235TCP): Enhanced functions from the STR71X/lwIP port - merged into the Coldfire port. - -2006-09-04 (REL_1_0_1) Christian Walter : - Notes: Fixed bug in serial driver for STR71x target when the ring buffer - overflows. - - Detailed notes: - - BUG (STR71XTCP): Under high load the ring buffer in the serial driver - functions might overflow. There was an error with counting the number - of received characters which corrupted received frames. - Now receiver correctly recovers in case of dropped bytes. - -2006-09-04 (REL_1_0) Christian Walter : - Notes: Added support for ATmega8, ATmega16, ATmega32, ATmega169 and - RS485 drivers in the AVR support. Special thanks to Tran Minh Hoang - for his contribution. - Added a new lwIP port for the STR71X target which uses one serial - interface for a PPP connection. This can be used for remote Modbus/TCP - devices in combination with a Modem (E.g. GPRS or Analog). - - Detailed notes: - - FEATURES (AVR): Integrated patches from Tran Minh Hoang to support the - ATmega8, ATmega16, ATmega32, ATmega169 controllers. - - FEATURES (AVR): Added support for RS485 drivers in the AVR code. The - example supports the DS76176. - - FEATURES (STR71XTCP): implemented function in STR71X/lwIP porting layer - to remove running tasks. - - FEATURES (STR71XTCP): added new thread creation function in STR71X/lwIP - porting layer which allows specifing the stack size. - - BUGS (STR71XTCP): pppOpen defined in ppp.c does not check the return - value of sys_thread_new. If task creation fails the system crashes. - - BUGS (STR71XTCP): pppMain must not return - Instead it should remove - its task from the scheduler. - -2006-08-30 (REL_9) Christian Walter : - Notes: Added lwIP port for the MCF5235 target. The lwIP part is - generic and therefore FreeModbus now works on any target with - lwIP support. - - Detailed notes: - - FEATURES: Incoperated MCF5235 FreeRTOS/lwIP port done by the - author in this project. - - FEATURES: Added lwIP port for FreeModbus - - FEATURES: Added demo application for FreeModbus and lwIP. - -2006-08-22 (REL_0_82) Christian Walter - Notes: Fixed bug with Modbus ASCII support - - Detailed notes: - - BUG: During the last upgrade an error was introduced in the - initialization code of Modbus ASCII and therefore ASCII - support was broken. The bug is fixed now and was tested with - the Win32 port. - -2006-08-22 (REL_0_81) Christian Walter - Notes: Added porting guide - - Detailed notes: - - OTHER: Added a new porting guide to the documentation. - - OTHER: Added a empty example for new ports to the project as a - starting point. - -2006-08-01 (REL_0_8) Christian Walter - Notes: Added Linux RTU/ASCII port. - - Detailed notes: - - FEATURES: Added a new Linux RTU/ASCII port. The port should work - on any Linux distribution and it should be possible to run it - on uCLinux. - -2006-06-26 (REL_0_7) Christian Walter - Notes: Changed the WIN32 serial port to better fit into the design. - - Detailed notes: - - OTHER: Design of the WIN32 serial port changed. The polling function - for the serial device are now called from the event loop. - - OTHER: Debugging uses the same interface as the WIN32/TCP port. - -2006-06-25 Christian Walter - - Notes: Initial work on a Modbus/TCP port is available. The port includes - an example for a Win32 port which uses the Winsock API. - - Detailed notes: - - FEATURES: added required functions to core protocol stack to support - a Modbus/TCP implementation. - - FEATURES: added a Win32 port for the Modbus/TCP core. The port is - currently limited to one concurrent client. - - OTHER: The implementation of eMBClose to shutdown the protocol stack - was changed to unify it with the new Modbus/TCP code. - - - -2006-06-18 Christian Walter - - Detailed notes: - - OTHER: while working on the Win32 port some line feeds got - wrong. Also some source files used tabs instead of spaces. - - OTHER: prototypes for xMBUtilSetBits and xMBUtilGetBits fixed. - usNBits should be ucNBits by convention. - -2006-06-17 Christian Walter - - Notes: Fixed various bugs with the Win32 port - - Detailed notes: - - FEATURES: implement shutdown functionality for protocol stack. - - FEATURES: protocol stack can be enabled and disabled during runtime. - - FEATURES: interface functions now do more error checking. For - example if eMBPool is called in an uninitialized state. - - FEATURES: extended Win32 demo application to use the new features. - - BUG: fixed bug in Win32 demo for ASCII mode. - -2006-06-16 Christian Walter - Notes: The new version includes a new port for the - Win32 platform - - Detailed notes: - - FEATURES: added Win32 platform - -2006-05-14 Christian Walter - Notes: The new version includes a new port for the - Freescale MCF5235 processor. - - Detailed notes: - - FEATURES: added new MCF5235 port. - - OTHER: fixed some missing code headers. - -2006-05-01 Christian Walter - Notes: This version removes the t1.5 timers from the Modbus RTU - implementation because no one actually uses it and the CPU - load is very high. T - In addition some documentation cleanups has been done and the - ARM demo has been updated. - - Detailed notes: - - - FEATURES: the t1.5 timeout has been removed. Therefore only - one timer is required. - - BUG: the ARM demo project missed some files in the project - workspace and did not compile cleanly - -2006-02-28 Christian Walter - Notes: This version includes support for two new command - (write multiple coils, read discrete input) - - Detailed notes: - - BUG: some function used the wrong data types - - FEATURES: added support for write multiple coils function. - - FEATURES: added support for read discrete input. - - OTHER: some code cleanups with lint tool. - -2006-02-28 Christian Walter - - Notes: The new version 0.31 adds support for reading and writing the - coil registers and add some bug fixes. - - Detailed notes: - - BUG: fixed bug with to small modbus requests being ignored. - - FEATURES: added support for write single coil function. - - FEATURES: added support for working with byte packed bit fields - to support coils and discrete inputs better. - - API: API for set slave id functions changed. - -2006-02-26 Christian Walter - - Notes: First public release which includes an ARM and AVR port. diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/bsd.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/bsd.txt deleted file mode 100644 index 362d3e37..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/bsd.txt +++ /dev/null @@ -1,25 +0,0 @@ -Copyright (c) 2006 Christian Walter -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions -are met: -1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. -2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. -3. The name of the author may not be used to endorse or promote products - derived from this software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/croutine.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/croutine.c deleted file mode 100644 index 4f2ba873..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/croutine.c +++ /dev/null @@ -1,345 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/* Lists for ready and blocked co-routines. --------------------*/ -static xList pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ -static xList xDelayedCoRoutineList1; /*< Delayed co-routines. */ -static xList xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ -static xList * pxDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used. */ -static xList * pxOverflowDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ -static xList xPendingReadyList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ - -/* Other file private variables. --------------------------------*/ -corCRCB * pxCurrentCoRoutine = NULL; -static unsigned portBASE_TYPE uxTopCoRoutineReadyPriority = 0; -static portTickType xCoRoutineTickCount = 0; - -/* The initial state of the co-routine when it is created. */ -#define corINITIAL_STATE ( 0 ) - -/* - * Place the co-routine represented by pxCRCB into the appropriate ready queue - * for the priority. It is inserted at the end of the list. - * - * This macro accesses the co-routine ready lists and therefore must not be - * used from within an ISR. - */ -#define prvAddCoRoutineToReadyQueue( pxCRCB ) \ -{ \ - if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \ - { \ - uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \ -} - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first co-routine. - */ -static void prvInitialiseCoRoutineLists( void ); - -/* - * Co-routines that are readied by an interrupt cannot be placed directly into - * the ready lists (there is no mutual exclusion). Instead they are placed in - * in the pending ready list in order that they can later be moved to the ready - * list by the co-routine scheduler. - */ -static inline void prvCheckPendingReadyList( void ); - -/* - * Macro that looks at the list of co-routines that are currently delayed to - * see if any require waking. - * - * Co-routines are stored in the queue in the order of their wake time - - * meaning once one co-routine has been found whose timer has not expired - * we need not look any further down the list. - */ -static inline void prvCheckDelayedList( void ); - -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex ) -{ -signed portBASE_TYPE xReturn; -corCRCB *pxCoRoutine; - - /* Allocate the memory that will store the co-routine control block. */ - pxCoRoutine = ( corCRCB * ) pvPortMalloc( sizeof( corCRCB ) ); - if( pxCoRoutine ) - { - /* If pxCurrentCoRoutine is NULL then this is the first co-routine to - be created and the co-routine data structures need initialising. */ - if( pxCurrentCoRoutine == NULL ) - { - pxCurrentCoRoutine = pxCoRoutine; - prvInitialiseCoRoutineLists(); - } - - /* Check the priority is within limits. */ - if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES ) - { - uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1; - } - - /* Fill out the co-routine control block from the function parameters. */ - pxCoRoutine->uxState = corINITIAL_STATE; - pxCoRoutine->uxPriority = uxPriority; - pxCoRoutine->uxIndex = uxIndex; - pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; - - /* Initialise all the other co-routine control block parameters. */ - vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) ); - vListInitialiseItem( &( pxCoRoutine->xEventListItem ) ); - - /* Set the co-routine control block as a link back from the xListItem. - This is so we can get back to the containing CRCB from a generic item - in a list. */ - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine ); - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - - /* Now the co-routine has been initialised it can be added to the ready - list at the correct priority. */ - prvAddCoRoutineToReadyQueue( pxCoRoutine ); - - xReturn = pdPASS; - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList ) -{ -portTickType xTimeToWake; - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xCoRoutineTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xCoRoutineTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - - if( pxEventList ) - { - /* Also add the co-routine to an event list. If this is done then the - function must be called with interrupts disabled. */ - vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -static inline void prvCheckPendingReadyList( void ) -{ - /* Are there any co-routines waiting to get moved to the ready list? These - are co-routines that have been readied by an ISR. The ISR cannot access - the ready lists itself. */ - while( !listLIST_IS_EMPTY( &xPendingReadyList ) ) - { - corCRCB *pxUnblockedCRCB; - - /* The pending ready list can be accessed by an ISR. */ - portDISABLE_INTERRUPTS(); - { - pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyList) ); - vListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - } - portENABLE_INTERRUPTS(); - - vListRemove( &( pxUnblockedCRCB->xGenericListItem ) ); - prvAddCoRoutineToReadyQueue( pxUnblockedCRCB ); - } -} -/*-----------------------------------------------------------*/ - -static inline void prvCheckDelayedList( void ) -{ -static portTickType xLastTickCount, xPassedTicks; -corCRCB *pxCRCB; - - xPassedTicks = xTaskGetTickCount() - xLastTickCount; - while( xPassedTicks ) - { - xCoRoutineTickCount++; - xPassedTicks--; - - /* If the tick count has overflowed we need to swap the ready lists. */ - if( xCoRoutineTickCount == 0 ) - { - xList * pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. If there are - any items in pxDelayedCoRoutineList here then there is an error! */ - pxTemp = pxDelayedCoRoutineList; - pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; - pxOverflowDelayedCoRoutineList = pxTemp; - } - - /* See if this tick has made a timeout expire. */ - while( ( pxCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList ) ) != NULL ) - { - if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) ) - { - /* Timeout not yet expired. */ - break; - } - - portDISABLE_INTERRUPTS(); - { - /* The event could have occurred just before this critical - section. If this is the case then the generic list item will - have been moved to the pending ready list and the following - line is still valid. Also the pvContainer parameter will have - been set to NULL so the following lines are also valid. */ - vListRemove( &( pxCRCB->xGenericListItem ) ); - - /* Is the co-routine waiting on an event also? */ - if( pxCRCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxCRCB->xEventListItem ) ); - } - } - portENABLE_INTERRUPTS(); - - prvAddCoRoutineToReadyQueue( pxCRCB ); - } - } - - xLastTickCount = xCoRoutineTickCount; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineSchedule( void ) -{ - /* See if any co-routines readied by events need moving to the ready lists. */ - prvCheckPendingReadyList(); - - /* See if any delayed co-routines have timed out. */ - prvCheckDelayedList(); - - /* Find the highest priority queue that contains ready co-routines. */ - while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) ) - { - if( uxTopCoRoutineReadyPriority == 0 ) - { - /* No more co-routines to check. */ - return; - } - --uxTopCoRoutineReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines - of the same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ); - - /* Call the co-routine. */ - ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex ); - - return; -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseCoRoutineLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyCoRoutineLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedCoRoutineList1 ); - vListInitialise( ( xList * ) &xDelayedCoRoutineList2 ); - vListInitialise( ( xList * ) &xPendingReadyList ); - - /* Start with pxDelayedCoRoutineList using list1 and the - pxOverflowDelayedCoRoutineList using list2. */ - pxDelayedCoRoutineList = &xDelayedCoRoutineList1; - pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList ) -{ -corCRCB *pxUnblockedCRCB; -signed portBASE_TYPE xReturn; - - /* This function is called from within an interrupt. It can only access - event lists and the pending ready list. */ - pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedCRCB->xEventListItem ) ); - - if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority ) - { - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/FreeRTOS.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/FreeRTOS.h deleted file mode 100644 index 676bda33..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/FreeRTOS.h +++ /dev/null @@ -1,114 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - -#ifndef INC_FREERTOS_H -#define INC_FREERTOS_H - - -/* - * Include the generic headers required for the FreeRTOS port being used. - */ -#include - -/* Basic FreeRTOS definitions. */ -#include "projdefs.h" - -/* Application specific configuration options. */ -#include "FreeRTOSConfig.h" - -/* Definitions specific to the port being used. */ -#include "portable.h" - - - - - - - -/* - * Check all the required application specific macros have been defined. - * These macros are application specific and (as downloaded) are defined - * within FreeRTOSConfig.h. - */ - -#ifndef configUSE_PREEMPTION - #error Missing definition: configUSE_PREEMPTION should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_IDLE_HOOK - #error Missing definition: configUSE_IDLE_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_TICK_HOOK - #error Missing definition: configUSE_TICK_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_CO_ROUTINES - #error Missing definition: configUSE_CO_ROUTINES should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskPrioritySet - #error Missing definition: INCLUDE_vTaskPrioritySet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_uxTaskPriorityGet - #error Missing definition: INCLUDE_uxTaskPriorityGet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelete - #error Missing definition: INCLUDE_vTaskDelete should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskCleanUpResources - #error Missing definition: INCLUDE_vTaskCleanUpResources should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskSuspend - #error Missing definition: INCLUDE_vTaskSuspend should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelayUntil - #error Missing definition: INCLUDE_vTaskDelayUntil should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelay - #error Missing definition: INCLUDE_vTaskDelay should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_16_BIT_TICKS - #error Missing definition: configUSE_16_BIT_TICKS should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/croutine.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/croutine.h deleted file mode 100644 index d3b52163..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/croutine.h +++ /dev/null @@ -1,716 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ -#ifndef CO_ROUTINE_H -#define CO_ROUTINE_H - -#include "list.h" - -/* Used to hide the implementation of the co-routine control block. The -control block structure however has to be included in the header due to -the macro implementation of the co-routine functionality. */ -typedef void * xCoRoutineHandle; - -/* Defines the prototype to which co-routine functions must conform. */ -typedef void (*crCOROUTINE_CODE)( xCoRoutineHandle, unsigned portBASE_TYPE ); - -typedef struct corCoRoutineControlBlock -{ - crCOROUTINE_CODE pxCoRoutineFunction; - xListItem xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the CRCB in event lists. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ - unsigned portBASE_TYPE uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ - unsigned portSHORT uxState; /*< Used internally by the co-routine implementation. */ -} corCRCB; /* Co-routine control block. Note must be identical in size down to uxPriority with tskTCB. */ - -/** - * croutine. h - *
- portBASE_TYPE xCoRoutineCreate(
-                                 crCOROUTINE_CODE pxCoRoutineCode,
-                                 unsigned portBASE_TYPE uxPriority,
-                                 unsigned portBASE_TYPE uxIndex
-                               );
- * - * Create a new co-routine and add it to the list of co-routines that are - * ready to run. - * - * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine - * functions require special syntax - see the co-routine section of the WEB - * documentation for more information. - * - * @param uxPriority The priority with respect to other co-routines at which - * the co-routine will run. - * - * @param uxIndex Used to distinguish between different co-routines that - * execute the same function. See the example below and the co-routine section - * of the WEB documentation for further information. - * - * @return pdPASS if the co-routine was successfully created and added to a ready - * list, otherwise an error code defined with ProjDefs.h. - * - * Example usage: - 
- // Co-routine to be created.
- void vFlashCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- static const char cLedToFlash[ 2 ] = { 5, 6 };
- static const portTickType xTimeToDelay[ 2 ] = { 200, 400 };
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // This co-routine just delays for a fixed period, then toggles
-         // an LED.  Two co-routines are created using this function, so
-         // the uxIndex parameter is used to tell the co-routine which
-         // LED to flash and how long to delay.  This assumes xQueue has
-         // already been created.
-         vParTestToggleLED( cLedToFlash[ uxIndex ] );
-         crDELAY( xHandle, uxFlashRates[ uxIndex ] );
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
-
- // Function that creates two co-routines.
- void vOtherFunction( void )
- {
- unsigned char ucParameterToPass;
- xTaskHandle xHandle;
-		
-     // Create two co-routines at priority 0.  The first is given index 0
-     // so (from the code above) toggles LED 5 every 200 ticks.  The second
-     // is given index 1 so toggles LED 6 every 400 ticks.
-     for( uxIndex = 0; uxIndex < 2; uxIndex++ )
-     {
-         xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
-     }
- }
-
- * \defgroup xCoRoutineCreate xCoRoutineCreate - * \ingroup Tasks - */ -signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex ); - - -/** - * croutine. h - *
- void vCoRoutineSchedule( void );
- * - * Run a co-routine. - * - * vCoRoutineSchedule() executes the highest priority co-routine that is able - * to run. The co-routine will execute until it either blocks, yields or is - * preempted by a task. Co-routines execute cooperatively so one - * co-routine cannot be preempted by another, but can be preempted by a task. - * - * If an application comprises of both tasks and co-routines then - * vCoRoutineSchedule should be called from the idle task (in an idle task - * hook). - * - * Example usage: - 
- // This idle task hook will schedule a co-routine each time it is called.
- // The rest of the idle task will execute between co-routine calls.
- void vApplicationIdleHook( void )
- {
-	vCoRoutineSchedule();
- }
-
- // Alternatively, if you do not require any other part of the idle task to
- // execute, the idle task hook can call vCoRoutineScheduler() within an
- // infinite loop.
- void vApplicationIdleHook( void )
- {
-    for( ;; )
-    {
-        vCoRoutineSchedule();
-    }
- }
-
- * \defgroup vCoRoutineSchedule vCoRoutineSchedule - * \ingroup Tasks - */ -void vCoRoutineSchedule( void ); - -/** - * croutine. h - * 
- crSTART( xCoRoutineHandle xHandle );
- * - * This macro MUST always be called at the start of a co-routine function. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portLONG ulAVariable;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-          // Co-routine functionality goes here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crSTART( pxCRCB ) switch( ( ( corCRCB * )pxCRCB )->uxState ) { case 0: - -/** - * croutine. h - * 
- crEND();
- * - * This macro MUST always be called at the end of a co-routine function. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portLONG ulAVariable;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-          // Co-routine functionality goes here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crEND() } - -/* - * These macros are intended for internal use by the co-routine implementation - * only. The macros should not be used directly by application writers. - */ -#define crSET_STATE0( xHandle ) ( ( corCRCB * )xHandle)->uxState = (__LINE__ * 2); return; case (__LINE__ * 2): -#define crSET_STATE1( xHandle ) ( ( corCRCB * )xHandle)->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1): - -/** - * croutine. h - *
- crDELAY( xCoRoutineHandle xHandle, portTickType xTicksToDelay );
- * - * Delay a co-routine for a fixed period of time. - * - * crDELAY can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * @param xHandle The handle of the co-routine to delay. This is the xHandle - * parameter of the co-routine function. - * - * @param xTickToDelay The number of ticks that the co-routine should delay - * for. The actual amount of time this equates to is defined by - * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_RATE_MS - * can be used to convert ticks to milliseconds. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- // We are to delay for 200ms.
- static const xTickType xDelayTime = 200 / portTICK_RATE_MS;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-        // Delay for 200ms.
-        crDELAY( xHandle, xDelayTime );
-
-        // Do something here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crDELAY crDELAY - * \ingroup Tasks - */ -#define crDELAY( xHandle, xTicksToDelay ) \ - if( xTicksToDelay > 0 ) \ - { \ - vCoRoutineAddToDelayedList( xTicksToDelay, NULL ); \ - } \ - crSET_STATE0( xHandle ); - -/** - * 
- crQUEUE_SEND(
-                  xCoRoutineHandle xHandle,
-                  xQueueHandle pxQueue,
-                  void *pvItemToQueue,
-                  portTickType xTicksToWait,
-                  portBASE_TYPE *pxResult
-             )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_SEND can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue on which the data will be posted. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvItemToQueue A pointer to the data being posted onto the queue. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied from pvItemToQueue into the queue - * itself. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for space to become available on the queue, should space not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_RATE_MS can be used to convert ticks to milliseconds (see example - * below). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully posted onto the queue, otherwise it will be set to an - * error defined within ProjDefs.h. - * - * Example usage: - 
- // Co-routine function that blocks for a fixed period then posts a number onto
- // a queue.
- static void prvCoRoutineFlashTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portBASE_TYPE xNumberToPost = 0;
- static portBASE_TYPE xResult;
-
-    // Co-routines must begin with a call to crSTART().
-    crSTART( xHandle );
-
-    for( ;; )
-    {
-        // This assumes the queue has already been created.
-        crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
-
-        if( xResult != pdPASS )
-        {
-            // The message was not posted!
-        }
-
-        // Increment the number to be posted onto the queue.
-        xNumberToPost++;
-
-        // Delay for 100 ticks.
-        crDELAY( xHandle, 100 );
-    }
-
-    // Co-routines must end with a call to crEND().
-    crEND();
- }
- * \defgroup crQUEUE_SEND crQUEUE_SEND - * \ingroup Tasks - */ -#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ -{ \ - *pxResult = xQueueCRSend( pxQueue, pvItemToQueue, xTicksToWait ); \ - if( *pxResult == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( xHandle ); \ - *pxResult = xQueueCRSend( pxQueue, pvItemToQueue, 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( xHandle ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 
-  crQUEUE_RECEIVE(
-                     xCoRoutineHandle xHandle,
-                     xQueueHandle pxQueue,
-                     void *pvBuffer,
-                     portTickType xTicksToWait,
-                     portBASE_TYPE *pxResult
-                 )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_RECEIVE can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue from which the data will be received. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvBuffer The buffer into which the received item is to be copied. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied into pvBuffer. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for data to become available from the queue, should data not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_RATE_MS can be used to convert ticks to milliseconds (see the - * crQUEUE_SEND example). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully retrieved from the queue, otherwise it will be set to - * an error code as defined within ProjDefs.h. - * - * Example usage: - 
- // A co-routine receives the number of an LED to flash from a queue.  It
- // blocks on the queue until the number is received.
- static void prvCoRoutineFlashWorkTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portBASE_TYPE xResult;
- static unsigned portBASE_TYPE uxLEDToFlash;
-
-    // All co-routines must start with a call to crSTART().
-    crSTART( xHandle );
-
-    for( ;; )
-    {
-        // Wait for data to become available on the queue.
-        crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
-        if( xResult == pdPASS )
-        {
-            // We received the LED to flash - flash it!
-            vParTestToggleLED( uxLEDToFlash );
-        }
-    }
-
-    crEND();
- }
- * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ -{ \ - *pxResult = xQueueCRReceive( pxQueue, pvBuffer, xTicksToWait ); \ - if( *pxResult == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( xHandle ); \ - *pxResult = xQueueCRReceive( pxQueue, pvBuffer, 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( xHandle ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 
-  crQUEUE_SEND_FROM_ISR(
-                            xQueueHandle pxQueue,
-                            void *pvItemToQueue,
-                            portBASE_TYPE xCoRoutinePreviouslyWoken
-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue - * that is being used from within a co-routine. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. - * - * @return pdTRUE if a co-routine was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 
- // A co-routine that blocks on a queue waiting for characters to be received.
- static void vReceivingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- portCHAR cRxedChar;
- portBASE_TYPE xResult;
-
-     // All co-routines must start with a call to crSTART().
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // Wait for data to become available on the queue.  This assumes the
-         // queue xCommsRxQueue has already been created!
-         crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
-         // Was a character received?
-         if( xResult == pdPASS )
-         {
-             // Process the character here.
-         }
-     }
-
-     // All co-routines must end with a call to crEND().
-     crEND();
- }
-
- // An ISR that uses a queue to send characters received on a serial port to
- // a co-routine.
- void vUART_ISR( void )
- {
- portCHAR cRxedChar;
- portBASE_TYPE xCRWokenByPost = pdFALSE;
-
-     // We loop around reading characters until there are none left in the UART.
-     while( UART_RX_REG_NOT_EMPTY() )
-     {
-         // Obtain the character from the UART.
-         cRxedChar = UART_RX_REG;
-
-         // Post the character onto a queue.  xCRWokenByPost will be pdFALSE
-         // the first time around the loop.  If the post causes a co-routine
-         // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
-         // In this manner we can ensure that if more than one co-routine is
-         // blocked on the queue only one is woken by this ISR no matter how
-         // many characters are posted to the queue.
-         xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
-     }
- }
- * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) - - -/** - * croutine. h - * 
-  crQUEUE_SEND_FROM_ISR(
-                            xQueueHandle pxQueue,
-                            void *pvBuffer,
-                            portBASE_TYPE * pxCoRoutineWoken
-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data - * from a queue that is being used from within a co-routine (a co-routine - * posted to the queue). - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvBuffer A pointer to a buffer into which the received item will be - * placed. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from the queue into - * pvBuffer. - * - * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become - * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a - * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise - * *pxCoRoutineWoken will remain unchanged. - * - * @return pdTRUE an item was successfully received from the queue, otherwise - * pdFALSE. - * - * Example usage: - 
- // A co-routine that posts a character to a queue then blocks for a fixed
- // period.  The character is incremented each time.
- static void vSendingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // cChar holds its value while this co-routine is blocked and must therefore
- // be declared static.
- static portCHAR cCharToTx = 'a';
- portBASE_TYPE xResult;
-
-     // All co-routines must start with a call to crSTART().
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // Send the next character to the queue.
-         crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
-
-         if( xResult == pdPASS )
-         {
-             // The character was successfully posted to the queue.
-         }
-		 else
-		 {
-			// Could not post the character to the queue.
-		 }
-
-         // Enable the UART Tx interrupt to cause an interrupt in this
-		 // hypothetical UART.  The interrupt will obtain the character
-		 // from the queue and send it.
-		 ENABLE_RX_INTERRUPT();
-
-		 // Increment to the next character then block for a fixed period.
-		 // cCharToTx will maintain its value across the delay as it is
-		 // declared static.
-		 cCharToTx++;
-		 if( cCharToTx > 'x' )
-		 {
-			cCharToTx = 'a';
-		 }
-		 crDELAY( 100 );
-     }
-
-     // All co-routines must end with a call to crEND().
-     crEND();
- }
-
- // An ISR that uses a queue to receive characters to send on a UART.
- void vUART_ISR( void )
- {
- portCHAR cCharToTx;
- portBASE_TYPE xCRWokenByPost = pdFALSE;
-
-     while( UART_TX_REG_EMPTY() )
-     {
-         // Are there any characters in the queue waiting to be sent?
-		 // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
-		 // is woken by the post - ensuring that only a single co-routine is
-		 // woken no matter how many times we go around this loop.
-         if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
-		 {
-			 SEND_CHARACTER( cCharToTx );
-		 }
-     }
- }
- * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( pxQueue, pvBuffer, pxCoRoutineWoken ) - -/* - * This function is intended for internal use by the co-routine macros only. - * The macro nature of the co-routine implementation requires that the - * prototype appears here. The function should not be used by application - * writers. - * - * Removes the current co-routine from its ready list and places it in the - * appropriate delayed list. - */ -void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList ); - -/* - * This function is intended for internal use by the queue implementation only. - * The function should not be used by application writers. - * - * Removes the highest priority co-routine from the event list and places it in - * the pending ready list. - */ -signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList ); - - -#endif /* CO_ROUTINE_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/list.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/list.h deleted file mode 100644 index f3702c14..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/list.h +++ /dev/null @@ -1,282 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - -/* - * This is the list implementation used by the scheduler. While it is tailored - * heavily for the schedulers needs, it is also available for use by - * application code. - * - * xLists can only store pointers to xListItems. Each xListItem contains a - * numeric value (xItemValue). Most of the time the lists are sorted in - * descending item value order. - * - * Lists are created already containing one list item. The value of this - * item is the maximum possible that can be stored, it is therefore always at - * the end of the list and acts as a marker. The list member pxHead always - * points to this marker - even though it is at the tail of the list. This - * is because the tail contains a wrap back pointer to the true head of - * the list. - * - * In addition to it's value, each list item contains a pointer to the next - * item in the list (pxNext), a pointer to the list it is in (pxContainer) - * and a pointer to back to the object that contains it. These later two - * pointers are included for efficiency of list manipulation. There is - * effectively a two way link between the object containing the list item and - * the list item itself. - * - * - * \page ListIntroduction List Implementation - * \ingroup FreeRTOSIntro - */ - -/* - Changes from V4.3.1 - - + Included local const within listGET_OWNER_OF_NEXT_ENTRY() to assist - compiler with optimisation. Thanks B.R. -*/ - -#ifndef LIST_H -#define LIST_H - -/* - * Definition of the only type of object that a list can contain. - */ -struct xLIST_ITEM -{ - portTickType xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ - volatile struct xLIST_ITEM * pxNext; /*< Pointer to the next xListItem in the list. */ - volatile struct xLIST_ITEM * pxPrevious;/*< Pointer to the previous xListItem in the list. */ - void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ - void * pvContainer; /*< Pointer to the list in which this list item is placed (if any). */ -}; -typedef struct xLIST_ITEM xListItem; /* For some reason lint wants this as two separate definitions. */ - -struct xMINI_LIST_ITEM -{ - portTickType xItemValue; - volatile struct xLIST_ITEM *pxNext; - volatile struct xLIST_ITEM *pxPrevious; -}; -typedef struct xMINI_LIST_ITEM xMiniListItem; - -/* - * Definition of the type of queue used by the scheduler. - */ -typedef struct xLIST -{ - volatile unsigned portBASE_TYPE uxNumberOfItems; - volatile xListItem * pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to pvListGetOwnerOfNextEntry (). */ - volatile xMiniListItem xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ -} xList; - -/* - * Access macro to set the owner of a list item. The owner of a list item - * is the object (usually a TCB) that contains the list item. - * - * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( pxListItem )->pvOwner = ( void * ) pxOwner - -/* - * Access macro to set the value of the list item. In most cases the value is - * used to sort the list in descending order. - * - * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( pxListItem )->xItemValue = xValue - -/* - * Access macro the retrieve the value of the list item. The value can - * represent anything - for example a the priority of a task, or the time at - * which a task should be unblocked. - * - * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) - -/* - * Access macro to determine if a list contains any items. The macro will - * only have the value true if the list is empty. - * - * \page listLIST_IS_EMPTY listLIST_IS_EMPTY - * \ingroup LinkedList - */ -#define listLIST_IS_EMPTY( pxList ) ( ( pxList )->uxNumberOfItems == ( unsigned portBASE_TYPE ) 0 ) - -/* - * Access macro to return the number of items in the list. - */ -#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) - -/* - * Access function to obtain the owner of the next entry in a list. - * - * The list member pxIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list - * and returns that entries pxOwner parameter. Using multiple calls to this - * function it is therefore possible to move through every item contained in - * a list. - * - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the next item owner is to be returned. - * - * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ -{ \ -xList * const pxConstList = pxList; \ - /* Increment the index to the next item and return the item, ensuring */ \ - /* we don't return the marker used at the end of the list. */ \ - ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ - if( ( pxConstList )->pxIndex == ( xListItem * ) &( ( pxConstList )->xListEnd ) ) \ - { \ - ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ - } \ - pxTCB = ( pxConstList )->pxIndex->pvOwner; \ -} - - -/* - * Access function to obtain the owner of the first entry in a list. Lists - * are normally sorted in ascending item value order. - * - * This function returns the pxOwner member of the first item in the list. - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the owner of the head item is to be - * returned. - * - * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( ( pxList->uxNumberOfItems != ( unsigned portBASE_TYPE ) 0 ) ? ( (&( pxList->xListEnd ))->pxNext->pvOwner ) : ( NULL ) ) - -/* - * Check to see if a list item is within a list. The list item maintains a - * "container" pointer that points to the list it is in. All this macro does - * is check to see if the container and the list match. - * - * @param pxList The list we want to know if the list item is within. - * @param pxListItem The list item we want to know if is in the list. - * @return pdTRUE is the list item is in the list, otherwise pdFALSE. - * pointer against - */ -#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( pxListItem )->pvContainer == ( void * ) pxList ) - -/* - * Must be called before a list is used! This initialises all the members - * of the list structure and inserts the xListEnd item into the list as a - * marker to the back of the list. - * - * @param pxList Pointer to the list being initialised. - * - * \page vListInitialise vListInitialise - * \ingroup LinkedList - */ -void vListInitialise( xList *pxList ); - -/* - * Must be called before a list item is used. This sets the list container to - * null so the item does not think that it is already contained in a list. - * - * @param pxItem Pointer to the list item being initialised. - * - * \page vListInitialiseItem vListInitialiseItem - * \ingroup LinkedList - */ -void vListInitialiseItem( xListItem *pxItem ); - -/* - * Insert a list item into a list. The item will be inserted into the list in - * a position determined by its item value (descending item value order). - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The item to that is to be placed in the list. - * - * \page vListInsert vListInsert - * \ingroup LinkedList - */ -void vListInsert( xList *pxList, xListItem *pxNewListItem ); - -/* - * Insert a list item into a list. The item will be inserted in a position - * such that it will be the last item within the list returned by multiple - * calls to listGET_OWNER_OF_NEXT_ENTRY. - * - * The list member pvIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pvIndex to the next item in the list. - * Placing an item in a list using vListInsertEnd effectively places the item - * in the list position pointed to by pvIndex. This means that every other - * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before - * the pvIndex parameter again points to the item being inserted. - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The list item to be inserted into the list. - * - * \page vListInsertEnd vListInsertEnd - * \ingroup LinkedList - */ -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ); - -/* - * Remove an item from a list. The list item has a pointer to the list that - * it is in, so only the list item need be passed into the function. - * - * @param vListRemove The item to be removed. The item will remove itself from - * the list pointed to by it's pxContainer parameter. - * - * \page vListRemove vListRemove - * \ingroup LinkedList - */ -void vListRemove( xListItem *pxItemToRemove ); - - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/portable.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/portable.h deleted file mode 100644 index 80bac44a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/portable.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http:www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http:www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - -/*----------------------------------------------------------- - * Portable layer API. Each function must be defined for each port. - *----------------------------------------------------------*/ - -#ifndef PORTABLE_H -#define PORTABLE_H - -/* Include the macro file relevant to the port being used. */ - -#ifdef SAM7_GCC - #include "FreeRTOS/portable/GCC/ARM7_AT91SAM7S/portmacro.h" -#endif - -/* - * Setup the stack of a new task so it is ready to be placed under the - * scheduler control. The registers have to be placed on the stack in - * the order that the port expects to find them. - */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ); - -/* - * Map to the memory management routines required for the port. - */ -void *pvPortMalloc( size_t xSize ); -void vPortFree( void *pv ); -void vPortInitialiseBlocks( void ); - -/* - * Setup the hardware ready for the scheduler to take control. This generally - * sets up a tick interrupt and sets timers for the correct tick frequency. - */ -portBASE_TYPE xPortStartScheduler( void ); - -/* - * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so - * the hardware is left in its original condition after the scheduler stops - * executing. - */ -void vPortEndScheduler( void ); - -#endif /* PORTABLE_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/projdefs.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/projdefs.h deleted file mode 100644 index 37a66222..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/projdefs.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - -#ifndef PROJDEFS_H -#define PROJDEFS_H - -/* Defines to prototype to which task functions must conform. */ -typedef void (*pdTASK_CODE)( void * ); - -#define pdTRUE ( 1 ) -#define pdFALSE ( 0 ) - -#define pdPASS ( 1 ) -#define pdFAIL ( 0 ) -#define errQUEUE_EMPTY ( 0 ) -#define errQUEUE_FULL ( 0 ) - -/* Error definitions. */ -#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) -#define errNO_TASK_TO_RUN ( -2 ) -#define errQUEUE_BLOCKED ( -4 ) -#define errQUEUE_YIELD ( -5 ) - -#endif /* PROJDEFS_H */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/queue.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/queue.h deleted file mode 100644 index 4a6c9a66..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/queue.h +++ /dev/null @@ -1,474 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - -#ifndef QUEUE_H -#define QUEUE_H - -typedef void * xQueueHandle; - -/** - * queue. h - * 
- xQueueHandle xQueueCreate( 
-                              unsigned portBASE_TYPE uxQueueLength, 
-                              unsigned portBASE_TYPE uxItemSize 
-                          );
- *
- * - * Creates a new queue instance. This allocates the storage required by the - * new queue and returns a handle for the queue. - * - * @param uxQueueLength The maximum number of items that the queue can contain. - * - * @param uxItemSize The number of bytes each item in the queue will require. - * Items are queued by copy, not by reference, so this is the number of bytes - * that will be copied for each posted item. Each item on the queue must be - * the same size. - * - * @return If the queue is successfully create then a handle to the newly - * created queue is returned. If the queue cannot be created then 0 is - * returned. - * - * Example usage: - 
- struct AMessage
- {
-    portCHAR ucMessageID;
-    portCHAR ucData[ 20 ];
- };
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
-
-    // Create a queue capable of containing 10 unsigned long values.
-    xQueue1 = xQueueCreate( 10, sizeof( unsigned portLONG ) );
-    if( xQueue1 == 0 )
-    {
-        // Queue was not created and must not be used.
-    }
-
-    // Create a queue capable of containing 10 pointers to AMessage structures.
-    // These should be passed by pointer as they contain a lot of data.
-    xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-    if( xQueue2 == 0 )
-    {
-        // Queue was not created and must not be used.
-    }
-
-    // ... Rest of task code.
- }
-
- * \defgroup xQueueCreate xQueueCreate - * \ingroup QueueManagement - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueSend( 
-                             xQueueHandle xQueue, 
-                             const void * pvItemToQueue, 
-                             portTickType xTicksToWait 
-                         );
- *
- * - * Post an item on a queue. The item is queued by copy, not by reference. - * This function must not be called from an interrupt service routine. - * See xQueueSendFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0. The - * time is defined in tick periods so the constant portTICK_RATE_MS - * should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-    portCHAR ucMessageID;
-    portCHAR ucData[ 20 ];
- } xMessage;
-
- unsigned portLONG ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-    // Create a queue capable of containing 10 unsigned long values.
-    xQueue1 = xQueueCreate( 10, sizeof( unsigned portLONG ) );
-
-    // Create a queue capable of containing 10 pointers to AMessage structures.
-    // These should be passed by pointer as they contain a lot of data.
-    xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-    // ...
-
-    if( xQueue1 != 0 )
-    {
-        // Send an unsigned long.  Wait for 10 ticks for space to become 
-        // available if necessary.
-        if( xQueueSend( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )
-        {
-            // Failed to post the message, even after 10 ticks.
-        }
-    }
-
-    if( xQueue2 != 0 )
-    {
-        // Send a pointer to a struct AMessage object.  Don't block if the
-        // queue is already full.
-        pxMessage = & xMessage;
-        xQueueSend( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );
-    }
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueSend( xQueueHandle xQueue, const void * pvItemToQueue, portTickType xTicksToWait ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueReceive( 
-                                xQueueHandle xQueue, 
-                                void *pvBuffer, 
-                                portTickType xTicksToWait 
-                            );
- * - * Receive an item from a queue. The item is received by copy so a buffer of - * adequate size must be provided. The number of bytes copied into the buffer - * was defined when the queue was created. - * - * This function must not be used in an interrupt service routine. See - * xQueueReceiveFromISR for an alternative that can. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. The time is defined in tick periods so the constant - * portTICK_RATE_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- struct AMessage
- {
-    portCHAR ucMessageID;
-    portCHAR ucData[ 20 ];
- } xMessage;
-
- xQueueHandle xQueue;
- 
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-    // Create a queue capable of containing 10 pointers to AMessage structures.
-    // These should be passed by pointer as they contain a lot of data.
-    xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-    if( xQueue == 0 )
-    {
-        // Failed to create the queue.
-    }
-
-    // ...
-
-    // Send a pointer to a struct AMessage object.  Don't block if the
-    // queue is already full.
-    pxMessage = & xMessage;
-    xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to receive from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-    if( xQueue != 0 )
-    {
-        // Receive a message on the created queue.  Block for 10 ticks if a
-        // message is not immediately available.
-        if( xQueueReceive( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )
-        {
-            // pcRxedMessage now points to the struct AMessage variable posted
-            // by vATask.
-        }
-    }
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceive( xQueueHandle xQueue, void *pvBuffer, portTickType xTicksToWait ); - -/** - * queue. h - * 
unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue );
- * - * Return the number of messages stored in a queue. - * - * @param xQueue A handle to the queue being queried. - * - * @return The number of messages available in the queue. - * - * \page uxQueueMessagesWaiting uxQueueMessagesWaiting - * \ingroup QueueManagement - */ -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue ); - -/** - * queue. h - * 
void vQueueDelete( xQueueHandle xQueue );
- * - * Delete a queue - freeing all the memory allocated for storing of items - * placed on the queue. - * - * @param xQueue A handle to the queue to be deleted. - * - * \page vQueueDelete vQueueDelete - * \ingroup QueueManagement - */ -void vQueueDelete( xQueueHandle xQueue ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueSendFromISR( 
-                                    xQueueHandle pxQueue, 
-                                    const void *pvItemToQueue, 
-                                    portBASE_TYPE xTaskPreviouslyWoken 
-                                );
-
- * - * Post an item on a queue. It is safe to use this function from within an - * interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param cTaskPreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. See the file serial .c in the - * PC port for a good example of this mechanism. - * - * @return pdTRUE if a task was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- portCHAR cIn;
- portBASE_TYPE xTaskWokenByPost;
-
-    // We have not woken a task at the start of the ISR.
-    cTaskWokenByPost = pdFALSE;
-
-    // Loop until the buffer is empty.
-    do
-    {
-        // Obtain a byte from the buffer.
-        cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );						
-
-        // Post the byte.  The first time round the loop cTaskWokenByPost
-        // will be pdFALSE.  If the queue send causes a task to wake we do
-        // not want the task to run until we have finished the ISR, so
-        // xQueueSendFromISR does not cause a context switch.  Also we 
-        // don't want subsequent posts to wake any other tasks, so we store
-        // the return value back into cTaskWokenByPost so xQueueSendFromISR
-        // knows not to wake any task the next iteration of the loop.
-        xTaskWokenByPost = xQueueSendFromISR( xRxQueue, &cIn, cTaskWokenByPost );
-
-    } while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-    // Now the buffer is empty we can switch context if necessary.
-    if( cTaskWokenByPost )
-    {
-        taskYIELD ();
-    }
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueReceiveFromISR( 
-                                       xQueueHandle pxQueue, 
-                                       void *pvBuffer, 
-                                       portBASE_TYPE *pxTaskWoken 
-                                   ); 
- *
- * - * Receive an item from a queue. It is safe to use this function from within an - * interrupt service routine. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param pxTaskWoken A task may be blocked waiting for space to become - * available on the queue. If xQueueReceiveFromISR causes such a task to - * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will - * remain unchanged. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- 
- xQueueHandle xQueue;
- 
- // Function to create a queue and post some values.
- void vAFunction( void *pvParameters )
- {
- portCHAR cValueToPost;
- const portTickType xBlockTime = ( portTickType )0xff;
-
-    // Create a queue capable of containing 10 characters.
-    xQueue = xQueueCreate( 10, sizeof( portCHAR ) );
-    if( xQueue == 0 )
-    {
-        // Failed to create the queue.
-    }
-
-    // ...
-
-    // Post some characters that will be used within an ISR.  If the queue
-    // is full then this task will block for xBlockTime ticks.
-    cValueToPost = 'a';
-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
-    cValueToPost = 'b';
-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
-
-    // ... keep posting characters ... this task may block when the queue
-    // becomes full.
-
-    cValueToPost = 'c';
-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
- }
-
- // ISR that outputs all the characters received on the queue. 
- void vISR_Routine( void )
- {
- portBASE_TYPE xTaskWokenByReceive = pdFALSE;
- portCHAR cRxedChar;
-
-    while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )
-    {
-        // A character was received.  Output the character now.
-        vOutputCharacter( cRxedChar );
-
-        // If removing the character from the queue woke the task that was 
-        // posting onto the queue cTaskWokenByReceive will have been set to
-        // pdTRUE.  No matter how many times this loop iterates only one
-        // task will be woken.
-    }
-
-    if( cTaskWokenByPost != ( portCHAR ) pdFALSE;
-    {
-        taskYIELD ();
-    }
- }
-
- * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - - -/* - * The functions defined above are for passing data to and from tasks. The - * functions below are the equivalents for passing data to and from - * co-rtoutines. - * - * These functions are called from the co-routine macro implementation and - * should not be called directly from application code. Instead use the macro - * wrappers defined within croutine.h. - */ -signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ); -signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); -signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ); -signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/semphr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/semphr.h deleted file mode 100644 index bae09c74..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/semphr.h +++ /dev/null @@ -1,292 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - -#include "queue.h" - -#ifndef SEMAPHORE_H -#define SEMAPHORE_H - -typedef xQueueHandle xSemaphoreHandle; - -#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( unsigned portCHAR ) 1 ) -#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( unsigned portCHAR ) 0 ) -#define semGIVE_BLOCK_TIME ( ( portTickType ) 0 ) - - -/** - * semphr. h - * 
vSemaphoreCreateBinary( xSemaphoreHandle xSemaphore )
- * - * Macro that implements a semaphore by using the existing queue mechanism. - * The queue length is 1 as this is a binary semaphore. The data size is 0 - * as we don't want to actually store any data - we just want to know if the - * queue is empty or full. - * - * @param xSemaphore Handle to the created semaphore. Should be of type xSemaphoreHandle. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().
-    // This is a macro so pass the variable in directly.
-    vSemaphoreCreateBinary( xSemaphore );
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.  
-    }
- }
-
- * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary - * \ingroup Semaphores - */ -#define vSemaphoreCreateBinary( xSemaphore ) { \ - xSemaphore = xQueueCreate( ( unsigned portCHAR ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH ); \ - if( xSemaphore != NULL ) \ - { \ - xSemaphoreGive( xSemaphore ); \ - } \ - } - -/** - * semphr. h - * xSemaphoreTake( - * xSemaphoreHandle xSemaphore, - * portTickType xBlockTime - * ) - * - * Macro to obtain a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (). - * - * @param xSemaphore A handle to the semaphore being obtained. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @param xBlockTime The time in ticks to wait for the semaphore to become - * available. The macro portTICK_RATE_MS can be used to convert this to a - * real time. A block time of zero can be used to poll the semaphore. - * - * @return pdTRUE if the semaphore was obtained. pdFALSE if xBlockTime - * expired without the semaphore becoming available. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore = NULL;
-
- // A task that creates a semaphore.
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    vSemaphoreCreateBinary( xSemaphore );
- }
-
- // A task that uses the semaphore.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xSemaphore != NULL )
-    {
-        // See if we can obtain the semaphore.  If the semaphore is not available
-        // wait 10 ticks to see if it becomes free.	
-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the semaphore and can now access the
-            // shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource.  Release the 
-            // semaphore.
-            xSemaphoreGive( xSemaphore );
-        }
-        else
-        {
-            // We could not obtain the semaphore and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
-
- * \defgroup xSemaphoreTake xSemaphoreTake - * \ingroup Semaphores - */ -#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueReceive( ( xQueueHandle ) xSemaphore, NULL, xBlockTime ) - -/** - * semphr. h - * 
xSemaphoreGive( xSemaphoreHandle xSemaphore )
- * - * Macro to release a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (), and obtained using sSemaphoreTake (). - * - * This must not be used from an ISR. See xSemaphoreGiveFromISR () for - * an alternative which can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @return pdTRUE if the semaphore was released. pdFALSE if an error occurred. - * Semaphores are implemented using queues. An error can occur if there is - * no space on the queue to post a message - indicating that the - * semaphore was not first obtained correctly. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    vSemaphoreCreateBinary( xSemaphore );
-
-    if( xSemaphore != NULL )
-    {
-        if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-        {
-            // We would expect this call to fail because we cannot give
-            // a semaphore without first "taking" it!
-        }
-
-        // Obtain the semaphore - don't block if the semaphore is not
-        // immediately available.
-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 0 ) )
-        {
-            // We now have the semaphore and can access the shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource so can free the
-            // semaphore.
-            if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-            {
-                // We would not expect this call to fail because we must have
-                // obtained the semaphore to get here.
-            }
-        }
-    }
- }
-
- * \defgroup xSemaphoreGive xSemaphoreGive - * \ingroup Semaphores - */ -#define xSemaphoreGive( xSemaphore ) xQueueSend( ( xQueueHandle ) xSemaphore, NULL, semGIVE_BLOCK_TIME ) - -/** - * semphr. h - * 
- xSemaphoreGiveFromISR( 
-                          xSemaphoreHandle xSemaphore, 
-                          portSHORT sTaskPreviouslyWoken 
-                      )
- * - * Macro to release a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (), and obtained using xSemaphoreTake (). - * - * This macro can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @param sTaskPreviouslyWoken This is included so an ISR can make multiple calls - * to xSemaphoreGiveFromISR () from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. See the file serial .c in the - * PC port for a good example of using xSemaphoreGiveFromISR (). - * - * @return pdTRUE if a task was woken by releasing the semaphore. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 
- #define LONG_TIME 0xffff
- #define TICKS_TO_WAIT	10
- xSemaphoreHandle xSemaphore = NULL;
-
- // Repetitive task.
- void vATask( void * pvParameters )
- {
-    for( ;; )
-    {
-        // We want this task to run every 10 ticks or a timer.  The semaphore 
-        // was created before this task was started
-
-        // Block waiting for the semaphore to become available.
-        if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )
-        {
-            // It is time to execute.
-
-            // ...
-
-            // We have finished our task.  Return to the top of the loop where
-            // we will block on the semaphore until it is time to execute 
-            // again.
-        }
-    }
- }
-
- // Timer ISR
- void vTimerISR( void * pvParameters )
- {
- static unsigned portCHAR ucLocalTickCount = 0;
-
-    // A timer tick has occurred.
-
-    // ... Do other time functions.
-
-    // Is it time for vATask () to run?
-    ucLocalTickCount++;
-    if( ucLocalTickCount >= TICKS_TO_WAIT )
-    {
-        // Unblock the task by releasing the semaphore.
-        xSemaphoreGive( xSemaphore );
-
-        // Reset the count so we release the semaphore again in 10 ticks time.
-        ucLocalTickCount = 0;
-    }
- }
-
- * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR - * \ingroup Semaphores - */ -#define xSemaphoreGiveFromISR( xSemaphore, xTaskPreviouslyWoken ) xQueueSendFromISR( ( xQueueHandle ) xSemaphore, NULL, xTaskPreviouslyWoken ) - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/task.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/task.h deleted file mode 100644 index 5103f3c2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/include/task.h +++ /dev/null @@ -1,970 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - -/* -Changes since V4.3.1: - - + Added xTaskGetSchedulerState() function. -*/ - -#ifndef TASK_H -#define TASK_H - -#include "portable.h" -#include "list.h" - -/*----------------------------------------------------------- - * MACROS AND DEFINITIONS - *----------------------------------------------------------*/ - -#define tskKERNEL_VERSION_NUMBER "V4.4.0" - -/** - * task. h - * - * Type by which tasks are referenced. For example, a call to xTaskCreate - * returns (via a pointer parameter) an xTaskHandle variable that can then - * be used as a parameter to vTaskDelete to delete the task. - * - * \page xTaskHandle xTaskHandle - * \ingroup Tasks - */ -typedef void * xTaskHandle; - -/* - * Used internally only. - */ -typedef struct xTIME_OUT -{ - portBASE_TYPE xOverflowCount; - portTickType xTimeOnEntering; -} xTimeOutType; - -/* - * Defines the priority used by the idle task. This must not be modified. - * - * \ingroup TaskUtils - */ -#define tskIDLE_PRIORITY ( ( unsigned portBASE_TYPE ) 0 ) - -/** - * task. h - * - * Macro for forcing a context switch. - * - * \page taskYIELD taskYIELD - * \ingroup SchedulerControl - */ -#define taskYIELD() portYIELD() - -/** - * task. h - * - * Macro to mark the start of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskENTER_CRITICAL taskENTER_CRITICAL - * \ingroup SchedulerControl - */ -#define taskENTER_CRITICAL() portENTER_CRITICAL() - -/** - * task. h - * - * Macro to mark the end of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskEXIT_CRITICAL taskEXIT_CRITICAL - * \ingroup SchedulerControl - */ -#define taskEXIT_CRITICAL() portEXIT_CRITICAL() - -/** - * task. h - * - * Macro to disable all maskable interrupts. - * - * \page taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS() - -/** - * task. h - * - * Macro to enable microcontroller interrupts. - * - * \page taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS() - -/* Definitions returned by xTaskGetSchedulerState(). */ -#define taskSCHEDULER_NOT_STARTED 0 -#define taskSCHEDULER_RUNNING 1 -#define taskSCHEDULER_SUSPENDED 2 - -/*----------------------------------------------------------- - * TASK CREATION API - *----------------------------------------------------------*/ - -/** - * task. h - *
- portBASE_TYPE xTaskCreate(
-                              pdTASK_CODE pvTaskCode,
-                              const portCHAR * const pcName,
-                              unsigned portSHORT usStackDepth,
-                              void *pvParameters,
-                              unsigned portBASE_TYPE uxPriority,
-                              xTaskHandle *pvCreatedTask
-                          );
- * - * Create a new task and add it to the list of tasks that are ready to run. - * - * @param pvTaskCode Pointer to the task entry function. Tasks - * must be implemented to never return (i.e. continuous loop). - * - * @param pcName A descriptive name for the task. This is mainly used to - * facilitate debugging. Max length defined by tskMAX_TASK_NAME_LEN - default - * is 16. - * - * @param usStackDepth The size of the task stack specified as the number of - * variables the stack can hold - not the number of bytes. For example, if - * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes - * will be allocated for stack storage. - * - * @param pvParameters Pointer that will be used as the parameter for the task - * being created. - * - * @param uxPriority The priority at which the task should run. - * - * @param pvCreatedTask Used to pass back a handle by which the created task - * can be referenced. - * - * @return pdPASS if the task was successfully created and added to a ready - * list, otherwise an error code defined in the file errors. h - * - * Example usage: - 
- // Task to be created.
- void vTaskCode( void * pvParameters )
- {
-     for( ;; )
-     {
-         // Task code goes here.
-     }
- }
-
- // Function that creates a task.
- void vOtherFunction( void )
- {
- unsigned char ucParameterToPass;
- xTaskHandle xHandle;
-		
-     // Create the task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );
-		
-     // Use the handle to delete the task.
-     vTaskDelete( xHandle );
- }
-
- * \defgroup xTaskCreate xTaskCreate - * \ingroup Tasks - */ -signed portBASE_TYPE xTaskCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pvCreatedTask ); - -/** - * task. h - * 
void vTaskDelete( xTaskHandle pxTask );
- * - * INCLUDE_vTaskDelete must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Remove a task from the RTOS real time kernels management. The task being - * deleted will be removed from all ready, blocked, suspended and event lists. - * - * NOTE: The idle task is responsible for freeing the kernel allocated - * memory from tasks that have been deleted. It is therefore important that - * the idle task is not starved of microcontroller processing time if your - * application makes any calls to vTaskDelete (). Memory allocated by the - * task code is not automatically freed, and should be freed before the task - * is deleted. - * - * See the demo application file death.c for sample code that utilises - * vTaskDelete (). - * - * @param pxTask The handle of the task to be deleted. Passing NULL will - * cause the calling task to be deleted. - * - * Example usage: - 
- void vOtherFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create the task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-		
-     // Use the handle to delete the task.
-     vTaskDelete( xHandle );
- }
-
- * \defgroup vTaskDelete vTaskDelete - * \ingroup Tasks - */ -void vTaskDelete( xTaskHandle pxTask ); - - -/*----------------------------------------------------------- - * TASK CONTROL API - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskDelay( portTickType xTicksToDelay );
- * - * Delay a task for a given number of ticks. The actual time that the - * task remains blocked depends on the tick rate. The constant - * portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * INCLUDE_vTaskDelay must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * @param xTicksToDelay The amount of time, in tick periods, that - * the calling task should block. - * - * Example usage: - 
- // Wait 10 ticks before performing an action.
- // NOTE:
- // This is for demonstration only and would be better achieved
- // using vTaskDelayUntil ().
- void vTaskFunction( void * pvParameters )
- {
- portTickType xDelay, xNextTime;
-
-     // Calc the time at which we want to perform the action
-     // next.
-     xNextTime = xTaskGetTickCount () + ( portTickType ) 10;
-
-     for( ;; )
-     {
-         xDelay = xNextTime - xTaskGetTickCount ();
-         xNextTime += ( portTickType ) 10;
-
-         // Guard against overflow
-         if( xDelay <= ( portTickType ) 10 )
-         {
-             vTaskDelay( xDelay );
-         }
-
-         // Perform action here.
-     }
- }
-
- * \defgroup vTaskDelay vTaskDelay - * \ingroup TaskCtrl - */ -void vTaskDelay( portTickType xTicksToDelay ); - -/** - * task. h - * 
void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement );
- * - * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Delay a task until a specified time. This function can be used by cyclical - * tasks to ensure a constant execution frequency. - * - * This function differs from vTaskDelay () in one important aspect: vTaskDelay () will - * cause a task to block for the specified number of ticks from the time vTaskDelay () is - * called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed - * execution frequency as the time between a task starting to execute and that task - * calling vTaskDelay () may not be fixed [the task may take a different path though the - * code between calls, or may get interrupted or preempted a different number of times - * each time it executes]. - * - * Whereas vTaskDelay () specifies a wake time relative to the time at which the function - * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to - * unblock. - * - * The constant portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the - * task was last unblocked. The variable must be initialised with the current time - * prior to its first use (see the example below). Following this the variable is - * automatically updated within vTaskDelayUntil (). - * - * @param xTimeIncrement The cycle time period. The task will be unblocked at - * time *pxPreviousWakeTime + xTimeIncrement. Calling vTaskDelayUntil with the - * same xTimeIncrement parameter value will cause the task to execute with - * a fixed interface period. - * - * Example usage: - 
- // Perform an action every 10 ticks.
- void vTaskFunction( void * pvParameters )
- {
- portTickType xLastWakeTime;
- const portTickType xFrequency = 10;
-
-     // Initialise the xLastWakeTime variable with the current time.
-     xLastWakeTime = xTaskGetTickCount ();
-     for( ;; )
-     {
-         // Wait for the next cycle.
-         vTaskDelayUntil( &xLastWakeTime, xFrequency );
-
-         // Perform action here.
-     }
- }
-
- * \defgroup vTaskDelayUntil vTaskDelayUntil - * \ingroup TaskCtrl - */ -void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement ); - -/** - * task. h - * 
unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask );
- * - * INCLUDE_xTaskPriorityGet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Obtain the priority of any task. - * - * @param pxTask Handle of the task to be queried. Passing a NULL - * handle results in the priority of the calling task being returned. - * - * @return The priority of pxTask. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create a task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-		
-     // ...
-
-     // Use the handle to obtain the priority of the created task.
-     // It was created with tskIDLE_PRIORITY, but may have changed
-     // it itself.
-     if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )
-     {
-         // The task has changed it's priority.
-     }
-
-     // ...
-
-     // Is our priority higher than the created task?
-     if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )
-     {
-         // Our priority (obtained using NULL handle) is higher.
-     }
- }
-
- * \defgroup uxTaskPriorityGet uxTaskPriorityGet - * \ingroup TaskCtrl - */ -unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ); - -/** - * task. h - * 
void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );
- * - * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Set the priority of any task. - * - * A context switch will occur before the function returns if the priority - * being set is higher than the currently executing task. - * - * @param pxTask Handle to the task for which the priority is being set. - * Passing a NULL handle results in the priority of the calling task being set. - * - * @param uxNewPriority The priority to which the task will be set. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create a task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-     // ...
-
-     // Use the handle to raise the priority of the created task.
-     vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );
-
-     // ...
-
-     // Use a NULL handle to raise our priority to the same value.
-     vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
- }
-
- * \defgroup vTaskPrioritySet vTaskPrioritySet - * \ingroup TaskCtrl - */ -void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ); - -/** - * task. h - * 
void vTaskSuspend( xTaskHandle pxTaskToSuspend );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Suspend any task. When suspended a task will never get any microcontroller - * processing time, no matter what its priority. - * - * Calls to vTaskSuspend are not accumulative - - * i.e. calling vTaskSuspend () twice on the same task still only requires one - * call to vTaskResume () to ready the suspended task. - * - * @param pxTaskToSuspend Handle to the task being suspended. Passing a NULL - * handle will cause the calling task to be suspended. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create a task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-		
-     // ...
-
-     // Use the handle to suspend the created task.
-     vTaskSuspend( xHandle );
-
-     // ...
-		
-     // The created task will not run during this period, unless
-     // another task calls vTaskResume( xHandle ).
-		
-     //...
-		
-
-     // Suspend ourselves.
-     vTaskSuspend( NULL );
-
-     // We cannot get here unless another task calls vTaskResume
-     // with our handle as the parameter.
- }
-
- * \defgroup vTaskSuspend vTaskSuspend - * \ingroup TaskCtrl - */ -void vTaskSuspend( xTaskHandle pxTaskToSuspend ); - -/** - * task. h - * 
void vTaskResume( xTaskHandle pxTaskToResume );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Resumes a suspended task. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * vTaskResume (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create a task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-		
-     // ...
-
-     // Use the handle to suspend the created task.
-     vTaskSuspend( xHandle );
-
-     // ...
-	
-     // The created task will not run during this period, unless
-     // another task calls vTaskResume( xHandle ).
-		
-     //...
-		
-
-     // Resume the suspended task ourselves.
-     vTaskResume( xHandle );
-
-     // The created task will once again get microcontroller processing
-     // time in accordance with it priority within the system.
- }
-
- * \defgroup vTaskResume vTaskResume - * \ingroup TaskCtrl - */ -void vTaskResume( xTaskHandle pxTaskToResume ); - -/** - * task. h - * 
void xTaskResumeFromISR( xTaskHandle pxTaskToResume );
- * - * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be - * available. See the configuration section for more information. - * - * An implementation of vTaskResume() that can be called from within an ISR. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * xTaskResumeFromISR (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * \defgroup vTaskResumeFromISR vTaskResumeFromISR - * \ingroup TaskCtrl - */ -portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ); - -/*----------------------------------------------------------- - * SCHEDULER CONTROL - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskStartScheduler( void );
- * - * Starts the real time kernel tick processing. After calling the kernel - * has control over which tasks are executed and when. This function - * does not return until an executing task calls vTaskEndScheduler (). - * - * At least one task should be created via a call to xTaskCreate () - * before calling vTaskStartScheduler (). The idle task is created - * automatically when the first application task is created. - * - * See the demo application file main.c for an example of creating - * tasks and starting the kernel. - * - * Example usage: - 
- void vAFunction( void )
- {
-     // Create at least one task before starting the kernel.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-     // Start the real time kernel with preemption.
-     vTaskStartScheduler ();
-
-     // Will not get here unless a task calls vTaskEndScheduler ()
- }
-
- * - * \defgroup vTaskStartScheduler vTaskStartScheduler - * \ingroup SchedulerControl - */ -void vTaskStartScheduler( void ); - -/** - * task. h - * 
void vTaskEndScheduler( void );
- * - * Stops the real time kernel tick. All created tasks will be automatically - * deleted and multitasking (either preemptive or cooperative) will - * stop. Execution then resumes from the point where vTaskStartScheduler () - * was called, as if vTaskStartScheduler () had just returned. - * - * See the demo application file main. c in the demo/PC directory for an - * example that uses vTaskEndScheduler (). - * - * vTaskEndScheduler () requires an exit function to be defined within the - * portable layer (see vPortEndScheduler () in port. c for the PC port). This - * performs hardware specific operations such as stopping the kernel tick. - * - * vTaskEndScheduler () will cause all of the resources allocated by the - * kernel to be freed - but will not free resources allocated by application - * tasks. - * - * Example usage: - 
- void vTaskCode( void * pvParameters )
- {
-     for( ;; )
-     {
-         // Task code goes here.
-
-         // At some point we want to end the real time kernel processing
-         // so call ...
-         vTaskEndScheduler ();
-     }
- }
-
- void vAFunction( void )
- {
-     // Create at least one task before starting the kernel.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-     // Start the real time kernel with preemption.
-     vTaskStartScheduler ();
-
-     // Will only get here when the vTaskCode () task has called
-     // vTaskEndScheduler ().  When we get here we are back to single task
-     // execution.
- }
-
- * - * \defgroup vTaskEndScheduler vTaskEndScheduler - * \ingroup SchedulerControl - */ -void vTaskEndScheduler( void ); - -/** - * task. h - * 
void vTaskSuspendAll( void );
- * - * Suspends all real time kernel activity while keeping interrupts (including the - * kernel tick) enabled. - * - * After calling vTaskSuspendAll () the calling task will continue to execute - * without risk of being swapped out until a call to xTaskResumeAll () has been - * made. - * - * Example usage: - 
- void vTask1( void * pvParameters )
- {
-     for( ;; )
-     {
-         // Task code goes here.
-
-         // ...
-
-         // At some point the task wants to perform a long operation during
-         // which it does not want to get swapped out.  It cannot use
-         // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-         // operation may cause interrupts to be missed - including the
-         // ticks.
-
-         // Prevent the real time kernel swapping out the task.
-         vTaskSuspendAll ();
-
-         // Perform the operation here.  There is no need to use critical
-         // sections as we have all the microcontroller processing time.
-         // During this time interrupts will still operate and the kernel
-         // tick count will be maintained.
-
-         // ...
-
-         // The operation is complete.  Restart the kernel.
-         xTaskResumeAll ();
-     }
- }
-
- * \defgroup vTaskSuspendAll vTaskSuspendAll - * \ingroup SchedulerControl - */ -void vTaskSuspendAll( void ); - -/** - * task. h - * 
portCHAR xTaskResumeAll( void );
- * - * Resumes real time kernel activity following a call to vTaskSuspendAll (). - * After a call to vTaskSuspendAll () the kernel will take control of which - * task is executing at any time. - * - * @return If resuming the scheduler caused a context switch then pdTRUE is - * returned, otherwise pdFALSE is returned. - * - * Example usage: - 
- void vTask1( void * pvParameters )
- {
-     for( ;; )
-     {
-         // Task code goes here.
-
-         // ...
-
-         // At some point the task wants to perform a long operation during
-         // which it does not want to get swapped out.  It cannot use
-         // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-         // operation may cause interrupts to be missed - including the
-         // ticks.
-
-         // Prevent the real time kernel swapping out the task.
-         vTaskSuspendAll ();
-
-         // Perform the operation here.  There is no need to use critical
-         // sections as we have all the microcontroller processing time.
-         // During this time interrupts will still operate and the real
-         // time kernel tick count will be maintained.
-
-         // ...
-
-         // The operation is complete.  Restart the kernel.  We want to force
-         // a context switch - but there is no point if resuming the scheduler
-         // caused a context switch already.
-         if( !xTaskResumeAll () )
-         {
-              taskYIELD ();
-         }
-     }
- }
-
- * \defgroup xTaskResumeAll xTaskResumeAll - * \ingroup SchedulerControl - */ -signed portBASE_TYPE xTaskResumeAll( void ); - - -/*----------------------------------------------------------- - * TASK UTILITIES - *----------------------------------------------------------*/ - -/** - * task. h - * 
volatile portTickType xTaskGetTickCount( void );
- * - * @return The count of ticks since vTaskStartScheduler was called. - * - * \page xTaskGetTickCount xTaskGetTickCount - * \ingroup TaskUtils - */ -portTickType xTaskGetTickCount( void ); - -/** - * task. h - * 
unsigned portSHORT uxTaskGetNumberOfTasks( void );
- * - * @return The number of tasks that the real time kernel is currently managing. - * This includes all ready, blocked and suspended tasks. A task that - * has been deleted but not yet freed by the idle task will also be - * included in the count. - * - * \page uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks - * \ingroup TaskUtils - */ -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ); - -/** - * task. h - * 
void vTaskList( portCHAR *pcWriteBuffer );
- * - * configUSE_TRACE_FACILITY, INCLUDE_vTaskDelete and INCLUDE_vTaskSuspend - * must all be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * NOTE: This function will disable interrupts for its duration. It is - * not intended for normal application runtime use but as a debug aid. - * - * Lists all the current tasks, along with their current state and stack - * usage high water mark. - * - * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or - * suspended ('S'). - * - * @param pcWriteBuffer A buffer into which the above mentioned details - * will be written, in ascii form. This buffer is assumed to be large - * enough to contain the generated report. Approximately 40 bytes per - * task should be sufficient. - * - * \page vTaskList vTaskList - * \ingroup TaskUtils - */ -void vTaskList( signed portCHAR *pcWriteBuffer ); - -/** - * task. h - * 
void vTaskStartTrace( portCHAR * pcBuffer, unsigned portBASE_TYPE uxBufferSize );
- * - * Starts a real time kernel activity trace. The trace logs the identity of - * which task is running when. - * - * The trace file is stored in binary format. A separate DOS utility called - * convtrce.exe is used to convert this into a tab delimited text file which - * can be viewed and plotted in a spread sheet. - * - * @param pcBuffer The buffer into which the trace will be written. - * - * @param ulBufferSize The size of pcBuffer in bytes. The trace will continue - * until either the buffer in full, or ulTaskEndTrace () is called. - * - * \page vTaskStartTrace vTaskStartTrace - * \ingroup TaskUtils - */ -void vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize ); - -/** - * task. h - * 
unsigned portLONG ulTaskEndTrace( void );
- * - * Stops a kernel activity trace. See vTaskStartTrace (). - * - * @return The number of bytes that have been written into the trace buffer. - * - * \page usTaskEndTrace usTaskEndTrace - * \ingroup TaskUtils - */ -unsigned portLONG ulTaskEndTrace( void ); - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - *----------------------------------------------------------*/ - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Called from the real time kernel tick (either preemptive or cooperative), - * this increments the tick count and checks if any tasks that are blocked - * for a finite period required removing from a blocked list and placing on - * a ready list. - */ -inline void vTaskIncrementTick( void ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes the calling task from the ready list and places it both - * on the list of tasks waiting for a particular event, and the - * list of delayed tasks. The task will be removed from both lists - * and replaced on the ready list should either the event occur (and - * there be no higher priority tasks waiting on the same event) or - * the delay period expires. - * - * @param pxEventList The list containing tasks that are blocked waiting - * for the event to occur. - * - * @param xTicksToWait The maximum amount of time that the task should wait - * for the event to occur. This is specified in kernel ticks,the constant - * portTICK_RATE_MS can be used to convert kernel ticks into a real time - * period. - */ -void vTaskPlaceOnEventList( xList *pxEventList, portTickType xTicksToWait ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes a task from both the specified event list and the list of blocked - * tasks, and places it on a ready queue. - * - * xTaskRemoveFromEventList () will be called if either an event occurs to - * unblock a task, or the block timeout period expires. - * - * @return pdTRUE if the task being removed has a higher priority than the task - * making the call, otherwise pdFALSE. - */ -signed portBASE_TYPE xTaskRemoveFromEventList( const xList *pxEventList ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * INCLUDE_vTaskCleanUpResources and INCLUDE_vTaskSuspend must be defined as 1 - * for this function to be available. - * See the configuration section for more information. - * - * Empties the ready and delayed queues of task control blocks, freeing the - * memory allocated for the task control block and task stacks as it goes. - */ -void vTaskCleanUpResources( void ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Sets the pointer to the current TCB to the TCB of the highest priority task - * that is ready to run. - */ -inline void vTaskSwitchContext( void ); - -/* - * Return the handle of the calling task. - */ -xTaskHandle xTaskGetCurrentTaskHandle( void ); - -/* - * Capture the current time status for future reference. - */ -void vTaskSetTimeOutState( xTimeOutType *pxTimeOut ); - -/* - * Compare the time status now with that previously captured to see if the - * timeout has expired. - */ -portBASE_TYPE xTaskCheckForTimeOut( xTimeOutType *pxTimeOut, portTickType * const pxTicksToWait ); - -/* - * Shortcut used by the queue implementation to prevent unnecessary call to - * taskYIELD(); - */ -void vTaskMissedYield( void ); - -/* - * Returns the scheduler state as taskSCHEDULER_RUNNING, - * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED. - */ -portBASE_TYPE xTaskGetSchedulerState( void ); - -#endif /* TASK_H */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/list.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/list.c deleted file mode 100644 index 3faa8b4e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/list.c +++ /dev/null @@ -1,204 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - -/* -Changes from V1.2.0 - - + Removed the volatile modifier from the function parameters. This was - only ever included to prevent compiler warnings. Now warnings are - removed by casting parameters where the calls are made. - - + prvListGetOwnerOfNextEntry() and prvListGetOwnerOfHeadEntry() have been - removed from the c file and added as macros to the h file. - - + uxNumberOfItems has been added to the list structure. This removes the - need for a pointer comparison when checking if a list is empty, and so - is slightly faster. - - + Removed the NULL check in vListRemove(). This makes the call faster but - necessitates any application code utilising the list implementation to - ensure NULL pointers are not passed. - -Changes from V2.0.0 - - + Double linked the lists to allow faster removal item removal. - -Changes from V2.6.1 - - + Make use of the new portBASE_TYPE definition where ever appropriate. - -Changes from V3.0.0 - - + API changes as described on the FreeRTOS.org WEB site. - -Changes from V3.2.4 - - + Removed the pxHead member of the xList structure. This always pointed - to the same place so has been removed to free a few bytes of RAM. - - + Introduced the xMiniListItem structure that does not include the - xListItem members that are not required by the xListEnd member of a list. - Again this was done to reduce RAM usage. - - + Changed the volatile definitions of some structure members to clean up - the code where the list structures are used. - -Changes from V4.0.4 - - + Optimised vListInsert() in the case when the wake time is the maximum - tick count value. -*/ - -#include -#include "FreeRTOS.h" -#include "list.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -void vListInitialise( xList *pxList ) -{ - /* The list structure contains a list item which is used to mark the - end of the list. To initialise the list the list end is inserted - as the only list entry. */ - pxList->pxIndex = ( xListItem * ) &( pxList->xListEnd ); - - /* The list end value is the highest possible value in the list to - ensure it remains at the end of the list. */ - pxList->xListEnd.xItemValue = portMAX_DELAY; - - /* The list end next and previous pointers point to itself so we know - when the list is empty. */ - pxList->xListEnd.pxNext = ( xListItem * ) &( pxList->xListEnd ); - pxList->xListEnd.pxPrevious = ( xListItem * ) &( pxList->xListEnd ); - - pxList->uxNumberOfItems = 0; -} -/*-----------------------------------------------------------*/ - -void vListInitialiseItem( xListItem *pxItem ) -{ - /* Make sure the list item is not recorded as being on a list. */ - pxItem->pvContainer = NULL; -} -/*-----------------------------------------------------------*/ - -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem * pxIndex; - - /* Insert a new list item into pxList, but rather than sort the list, - makes the new list item the last item to be removed by a call to - pvListGetOwnerOfNextEntry. This means it has to be the item pointed to by - the pxIndex member. */ - pxIndex = pxList->pxIndex; - - pxNewListItem->pxNext = pxIndex->pxNext; - pxNewListItem->pxPrevious = pxList->pxIndex; - pxIndex->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxIndex->pxNext = ( volatile xListItem * ) pxNewListItem; - pxList->pxIndex = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListInsert( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem *pxIterator; -portTickType xValueOfInsertion; - - /* Insert the new list item into the list, sorted in ulListItem order. */ - xValueOfInsertion = pxNewListItem->xItemValue; - - /* If the list already contains a list item with the same item value then - the new list item should be placed after it. This ensures that TCB's which - are stored in ready lists (all of which have the same ulListItem value) - get an equal share of the CPU. However, if the xItemValue is the same as - the back marker the iteration loop below will not end. This means we need - to guard against this by checking the value first and modifying the - algorithm slightly if necessary. */ - if( xValueOfInsertion == portMAX_DELAY ) - { - pxIterator = pxList->xListEnd.pxPrevious; - } - else - { - for( pxIterator = ( xListItem * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) - { - /* There is nothing to do here, we are just iterating to the - wanted insertion position. */ - } - } - - pxNewListItem->pxNext = pxIterator->pxNext; - pxNewListItem->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxNewListItem->pxPrevious = pxIterator; - pxIterator->pxNext = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. This allows fast removal of the - item later. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListRemove( xListItem *pxItemToRemove ) -{ -xList * pxList; - - pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; - pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; - - /* The list item knows which list it is in. Obtain the list from the list - item. */ - pxList = ( xList * ) pxItemToRemove->pvContainer; - - /* Make sure the index is left pointing to a valid item. */ - if( pxList->pxIndex == pxItemToRemove ) - { - pxList->pxIndex = pxItemToRemove->pxPrevious; - } - - pxItemToRemove->pvContainer = NULL; - ( pxList->uxNumberOfItems )--; -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/GCC/ARM7_AT91SAM7S/port.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/GCC/ARM7_AT91SAM7S/port.c deleted file mode 100644 index 797cb507..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/GCC/ARM7_AT91SAM7S/port.c +++ /dev/null @@ -1,207 +0,0 @@ -/* - * MODBUS Library: SAM7X Port - * Copyright (c) 2007 Christian Walter - * All rights reserved. - * - * $Id$ - */ -/* - * FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - * - * This file is part of the FreeRTOS.org distribution. - * - * FreeRTOS.org is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * FreeRTOS.org is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with FreeRTOS.org; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * A special exception to the GPL can be applied should you wish to distribute - * a combined work that includes FreeRTOS.org, without being obliged to provide - * the source code for any proprietary components. See the licensing section - * of http://www.FreeRTOS.org for full details of how and when the exception - * can be applied. - * - **************************************************************************** - * See http://www.FreeRTOS.org for documentation, latest information, license - * and contact details. Please ensure to read the configuration and relevant - * port sections of the online documentation. - * - * Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - * with commercial development and support options. - *************************************************************************** - */ - -/* ----------------------- System includes ----------------------------------*/ -#include - -/* ----------------------- FreeRTOS includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "AT91SAM7X256.h" -#include "lib_AT91SAM7X256.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) -#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 ) -#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 ) -#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 ) - -/* -#define portPRESCALE_VALUE 0x00 -#define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 ) -#define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 ) - -#define portPIT_CLOCK_DIVISOR ( ( unsigned portLONG ) 16 ) -#define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS ) - -#define portINT_LEVEL_SENSITIVE 0 -#define portPIT_ENABLE ( ( unsigned portSHORT ) 0x1 << 24 ) -#define portPIT_INT_ENABLE ( ( unsigned portSHORT ) 0x1 << 25 ) -*/ - -/* ----------------------- Type definitions ---------------------------------*/ - -/* ----------------------- Static variables ---------------------------------*/ - -/* ----------------------- Function prototypes ------------------------------*/ -extern void vPortISRStartFirstTask( void ); -extern void vNonPreemptiveTick ( void ); -extern void vPreemptiveTick( void ); - -/* ----------------------- Static functions ---------------------------------*/ -static void prvSetupTimerInterrupt( void ); - -/* ----------------------- Start implementation -----------------------------*/ - -portSTACK_TYPE * -pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) -{ - portSTACK_TYPE *pxOriginalTOS; - - pxOriginalTOS = pxTopOfStack; - /* Setup the initial stack of the task. The stack is set exactly as - * expected by the portRESTORE_CONTEXT() macro. - */ - - /* First on the stack is the return address - which in this case is the - * start of the task. The offset is added to make the return address appear - * as it would within an IRQ ISR. - */ - *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; - pxTopOfStack--; - - *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */ - pxTopOfStack--; - - /* When the task starts is will expect to find the function parameter in - * R0. - */ - *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */ - pxTopOfStack--; - - /* The last thing onto the stack is the status register, which is set for - * system mode, with interrupts enabled. - */ - *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR; - -#ifdef THUMB_INTERWORK - { - /* We want the task to start in thumb mode. */ - *pxTopOfStack |= portTHUMB_MODE_BIT; - } -#endif - - pxTopOfStack--; - - /* Some optimisation levels use the stack differently to others. This - * means the interrupt flags cannot always be stored on the stack and will - * instead be stored in a variable, which is then saved as part of the - * tasks context. - */ - *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING; - - return pxTopOfStack; -} - -portBASE_TYPE -xPortStartScheduler( void ) -{ - /* Start the timer that generates the tick ISR. Interrupts are disabled - * here already. - */ - prvSetupTimerInterrupt( ); - - /* Start the first task. */ - vPortISRStartFirstTask( ); - - /* Should not get here! */ - return 0; -} - -void -vPortEndScheduler( void ) -{ -} - -/* - * Setup the timer 0 to generate the tick interrupts at the required frequency. - */ -static void -prvSetupTimerInterrupt( void ) -{ - /* Setup the AIC for PIT interrupts. The interrupt routine chosen depends - * on whether the preemptive or cooperative scheduler is being used. - */ -#if configUSE_PREEMPTION == 0 - AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, - AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, - ( void ( * )( void ) )vNonPreemptiveTick ); -#else - AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, - AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, - ( void ( * )( void ) )vPreemptiveTick ); - -#endif - - /* Configure the PIT period. */ - AT91F_PITInit( AT91C_BASE_PITC, portTICK_RATE_MS * 1000U, configCPU_CLOCK_HZ / 1000000U ); - AT91F_PITEnableInt( AT91C_BASE_PITC ); - AT91F_AIC_EnableIt( AT91C_BASE_AIC, AT91C_ID_SYS ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/GCC/ARM7_AT91SAM7S/portISR.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/GCC/ARM7_AT91SAM7S/portISR.c deleted file mode 100644 index a9649127..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/GCC/ARM7_AT91SAM7S/portISR.c +++ /dev/null @@ -1,225 +0,0 @@ -/* - * MODBUS Library: SAM7X Port - * Copyright (c) 2007 Christian Walter - * All rights reserved. - * - * $Id$ - */ -/* - * FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - * - * This file is part of the FreeRTOS.org distribution. - * - * FreeRTOS.org is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * FreeRTOS.org is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with FreeRTOS.org; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * A special exception to the GPL can be applied should you wish to distribute - * a combined work that includes FreeRTOS.org, without being obliged to provide - * the source code for any proprietary components. See the licensing section - * of http://www.FreeRTOS.org for full details of how and when the exception - * can be applied. - * - **************************************************************************** - * See http://www.FreeRTOS.org for documentation, latest information, license - * and contact details. Please ensure to read the configuration and relevant - * port sections of the online documentation. - * - * Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - * with commercial development and support options. - *************************************************************************** - */ - -/* ----------------------- System includes ----------------------------------*/ -#include - -/* ----------------------- FreeRTOS includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "AT91SAM7X256.h" -#include "lib_AT91SAM7X256.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define portTIMER_MATCH_ISR_BIT ( ( unsigned portCHAR ) 0x01 ) -#define portCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 ) -#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 ) -volatile unsigned portLONG ulCriticalNesting = 9999UL; - -/* ----------------------- Type definitions ---------------------------------*/ - -/* ----------------------- Static variables ---------------------------------*/ - -/* ----------------------- Function prototypes ------------------------------*/ -void vPortDisableInterruptsFromThumb( void ) __attribute__ ( ( naked ) ); -void vPortEnableInterruptsFromThumb( void ) __attribute__ ( ( naked ) ); -void vNonPreemptiveTick( void ) __attribute__ ( ( interrupt( "IRQ" ) ) ); -void vPreemptiveTick( void ) __attribute__ ( ( naked ) ); -void vPortYieldProcessor( void ) __attribute__ ( ( interrupt( "SWI" ), naked ) ); - -void vPortISRStartFirstTask( void ); - -/* ----------------------- Static functions ---------------------------------*/ - -/* ----------------------- Start implementation -----------------------------*/ - -void -vPortISRStartFirstTask( void ) -{ - /* Simply start the scheduler. This is included here as it can only be - * called from ARM mode. - */ - portRESTORE_CONTEXT( ); -} - -/* - * Called by portYIELD() or taskYIELD() to manually force a context switch. - * - * When a context switch is performed from the task level the saved task - * context is made to look as if it occurred from within the tick ISR. This - * way the same restore context function can be used when restoring the context - * saved from the ISR or that saved from a call to vPortYieldProcessor. - */ -void -vPortYieldProcessor( void ) -{ - /* Within an IRQ ISR the link register has an offset from the true return - * address, but an SWI ISR does not. Add the offset manually so the same - * ISR return code can be used in both cases. - */ - asm volatile ( "ADD LR, LR, #4" ); - - /* Perform the context switch. First save the context of the current task. */ - portSAVE_CONTEXT( ); - - /* Find the highest priority task that is ready to run. */ - vTaskSwitchContext( ); - - /* Restore the context of the new task. */ - portRESTORE_CONTEXT( ); -} - -/* - * The ISR used for the scheduler tick depends on whether the cooperative or - * the preemptive scheduler is being used. - */ -#if configUSE_PREEMPTION == 0 - - - -void -vNonPreemptiveTick( void ) -{ - unsigned portLONG ulDummy; - - /* Increment the tick count - which may wake some tasks but as the - * preemptive scheduler is not being used any woken task is not given - * processor time no matter what its priority. - */ - vTaskIncrementTick( ); - - /* Clear the PIT interrupt. */ - AT91C_BASE_AIC->AIC_EOICR = AT91C_BASE_PITC->PITC_PIVR; -} -#else -void -vPreemptiveTick( void ) -{ - /* Save the context of the current task. */ - portSAVE_CONTEXT( ); - - /* Increment the tick count - this may wake a task. */ - vTaskIncrementTick( ); - - /* Find the highest priority task that is ready to run. */ - vTaskSwitchContext( ); - - /* End the interrupt in the AIC. */ - AT91C_BASE_AIC->AIC_EOICR = AT91C_BASE_PITC->PITC_PIVR;; - - portRESTORE_CONTEXT( ); -} -#endif - -/* - * The interrupt management utilities can only be called from ARM mode. When - * THUMB_INTERWORK is defined the utilities are defined as functions here to - * ensure a switch to ARM mode. When THUMB_INTERWORK is not defined then - * the utilities are defined as macros in portmacro.h - as per other ports. - */ -void -vPortDisableInterruptsFromThumb( void ) -{ - asm volatile ( "STMDB SP!, {R0}\n\t" /* Push R0. */ - "MRS R0, CPSR\n\t" /* Get CPSR. */ - "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ - "MSR CPSR, R0\n\t" /* Write back modified value. */ - "LDMIA SP!, {R0}\n\t" /* Pop R0. */ - "BX R14" ); /* Return back to thumb. */ -} - -void -vPortEnableInterruptsFromThumb( void ) -{ - asm volatile ( "STMDB SP!, {R0}\n\t" /* Push R0. */ - "MRS R0, CPSR\n\t" /* Get CPSR. */ - "BIC R0, R0, #0xC0\n\t" /* Enable IRQ, FIQ. */ - "MSR CPSR, R0\n\t" /* Write back modified value. */ - "LDMIA SP!, {R0}\n\t" /* Pop R0. */ - "BX R14" ); /* Return back to thumb. */ -} - -/* The code generated by the GCC compiler uses the stack in different ways at - * different optimisation levels. The interrupt flags can therefore not always - * be saved to the stack. Instead the critical section nesting level is stored - * in a variable, which is then saved as part of the stack context. - */ -void -vPortEnterCritical( void ) -{ - /* Disable interrupts as per portDISABLE_INTERRUPTS(); */ - asm volatile ( "STMDB SP!, {R0}\n\t" /* Push R0. */ - "MRS R0, CPSR\n\t" /* Get CPSR. */ - "ORR R0, R0, #0xC0\n\t" /* Disable IRQ, FIQ. */ - "MSR CPSR, R0\n\t" /* Write back modified value. */ - "LDMIA SP!, {R0}" ); /* Pop R0. */ - - /* Now interrupts are disabled ulCriticalNesting can be accessed - * directly. Increment ulCriticalNesting to keep a count of how many times - * portENTER_CRITICAL() has been called. - */ - ulCriticalNesting++; -} - -void -vPortExitCritical( void ) -{ - if( ulCriticalNesting > portNO_CRITICAL_NESTING ) - { - /* Decrement the nesting count as we are leaving a critical section. */ - ulCriticalNesting--; - - /* If the nesting level has reached zero then interrupts should be - re-enabled. */ - if( ulCriticalNesting == portNO_CRITICAL_NESTING ) - { - /* Enable interrupts as per portEXIT_CRITICAL(). */ - asm volatile ( "STMDB SP!, {R0}\n\t" /* Push R0. */ - "MRS R0, CPSR\n\t" /* Get CPSR. */ - "BIC R0, R0, #0xC0\n\t" /* Enable IRQ, FIQ. */ - "MSR CPSR, R0\n\t" /* Write back modified value. */ - "LDMIA SP!, {R0}" ); /* Pop R0. */ - } - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/GCC/ARM7_AT91SAM7S/portmacro.h deleted file mode 100644 index 43593c56..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/GCC/ARM7_AT91SAM7S/portmacro.h +++ /dev/null @@ -1,230 +0,0 @@ -/* - * MODBUS Library: SAM7X Port - * Copyright (c) 2007 Christian Walter - * All rights reserved. - * - * $Id$ - */ -/* - * FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - * - * This file is part of the FreeRTOS.org distribution. - * - * FreeRTOS.org is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * FreeRTOS.org is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with FreeRTOS.org; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * A special exception to the GPL can be applied should you wish to distribute - * a combined work that includes FreeRTOS.org, without being obliged to provide - * the source code for any proprietary components. See the licensing section - * of http://www.FreeRTOS.org for full details of how and when the exception - * can be applied. - * - **************************************************************************** - * See http://www.FreeRTOS.org for documentation, latest information, license - * and contact details. Please ensure to read the configuration and relevant - * port sections of the online documentation. - * - * Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - * with commercial development and support options. - *************************************************************************** - */ - -#ifndef PORTMACRO_H -#define PORTMACRO_H - -/* ----------------------- Defines (Type definitions) -----------------------*/ -#define portCHAR char -#define portFLOAT float -#define portDOUBLE double -#define portLONG long -#define portSHORT short -#define portSTACK_TYPE unsigned portLONG -#define portBASE_TYPE portLONG - -#if( configUSE_16_BIT_TICKS == 1 ) -typedef unsigned portSHORT portTickType; -#define portMAX_DELAY ( portTickType ) 0xffff -#else -typedef unsigned portLONG portTickType; -#define portMAX_DELAY ( portTickType ) 0xffffffff -#endif - -/* ----------------------- Defines (Architecture specific) ------------------*/ - -#define portSTACK_GROWTH ( -1 ) -#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) -#define portBYTE_ALIGNMENT 4 -#define portNOP() asm volatile ( "NOP" ); - -/* - * portRESTORE_CONTEXT, portRESTORE_CONTEXT, portENTER_SWITCHING_ISR - * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but - * are included here for efficiency. An attempt to call one from - * THUMB mode code will result in a compile time error. - */ -#define portRESTORE_CONTEXT() do { \ - extern volatile void * volatile pxCurrentTCB; \ - extern volatile unsigned portLONG ulCriticalNesting; \ - \ - /* Set the LR to the task stack. */ \ - asm volatile ( \ - "LDR R0, =pxCurrentTCB\n\t" \ - "LDR R0, [R0]\n\t" \ - "LDR LR, [R0]\n\t" \ - \ - /* The critical nesting depth is the first item on the stack. */ \ - /* Load it into the ulCriticalNesting variable. */ \ - "LDR R0, =ulCriticalNesting\n\t" \ - "LDMFD LR!, {R1}\n\t" \ - "STR R1, [R0]\n\t" \ - \ - /* Get the SPSR from the stack. */ \ - "LDMFD LR!, {R0}\n\t" \ - "MSR SPSR, R0\n\t" \ - \ - /* Restore all system mode registers for the task. */ \ - "LDMFD LR, {R0-R14}^\n\t" \ - "NOP\n\t" \ - \ - /* Restore the return address. */ \ - "LDR LR, [LR, #+60]\n\t" \ - \ - /* And return - correcting the offset in the LR to obtain the */ \ - /* correct address. */ \ - "SUBS PC, LR, #4\n\t" \ - ); \ - ( void ) ulCriticalNesting; \ - ( void ) pxCurrentTCB; \ -} while( 0 ) - -#define portSAVE_CONTEXT() do { \ - extern volatile void * volatile pxCurrentTCB; \ - extern volatile unsigned portLONG ulCriticalNesting; \ - \ - /* Push R0 as we are going to use the register. */ \ - asm volatile ( \ - "STMDB SP!, {R0}\n\t" \ - \ - /* Set R0 to point to the task stack pointer. */ \ - "STMDB SP,{SP}^\n\t" \ - "NOP\n\t" \ - "SUB SP, SP, #4\n\t" \ - "LDMIA SP!,{R0}\n\t" \ - \ - /* Push the return address onto the stack. */ \ - "STMDB R0!, {LR}\n\t" \ - \ - /* Now we have saved LR we can use it instead of R0. */ \ - "MOV LR, R0\n\t" \ - \ - /* Pop R0 so we can save it onto the system mode stack. */ \ - "LDMIA SP!, {R0}\n\t" \ - \ - /* Push all the system mode registers onto the task stack. */ \ - "STMDB LR,{R0-LR}^\n\t" \ - "NOP\n\t" \ - "SUB LR, LR, #60\n\t" \ - \ - /* Push the SPSR onto the task stack. */ \ - "MRS R0, SPSR\n\t" \ - "STMDB LR!, {R0}\n\t" \ - \ - "LDR R0, =ulCriticalNesting\n\t" \ - "LDR R0, [R0]\n\t" \ - "STMDB LR!, {R0}\n\t" \ - \ - /* Store the new top of stack for the task. */ \ - "LDR R0, =pxCurrentTCB\n\t" \ - "LDR R0, [R0]\n\t" \ - "STR LR, [R0]\n\t" \ - ); \ - ( void ) ulCriticalNesting; \ - ( void ) pxCurrentTCB; \ -} while( 0 ) - -#define portENTER_SWITCHING_ISR() do { \ - /* Save the context of the interrupted task. */ \ - portSAVE_CONTEXT(); \ - \ - /* We don't know the stack requirements for the ISR, so the frame */ \ - /* pointer will be set to the top of the task stack, and the stack*/ \ - /* pointer left where it is. The IRQ stack will get used for any */ \ - /* functions calls made by this ISR. */ \ - asm volatile ( "SUB R11, LR, #4" ); \ - { - -#define portEXIT_SWITCHING_ISR( SwitchRequired ) \ - /* If a switch is required then we just need to call */ \ - /* vTaskSwitchContext() as the context has already been */ \ - /* saved. */ \ - if( SwitchRequired ) \ - { \ - vTaskSwitchContext(); \ - } \ - } \ - /* Restore the context of which ever task is now the highest */ \ - /* priority that is ready to run. */ \ - portRESTORE_CONTEXT(); \ -} while( 0 ) - -#define portYIELD() asm volatile ( "SWI" ); - -/* - * The interrupt management utilities can only be called from ARM mode. When - * THUMB_INTERWORK is defined the utilities are defined as functions in - * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not - * defined then the utilities are defined as macros here - as per other ports. - */ -#ifdef THUMB_INTERWORK - -extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ( ( naked ) ); -extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ( ( naked ) ); - -#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb() -#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb() - -#else - -#define portDISABLE_INTERRUPTS() do { \ - asm volatile ( \ - "STMDB SP!, {R0}\n\t" /* Push R0. */ \ - "MRS R0, CPSR\n\t" /* Get CPSR. */ \ - "ORR R0, R0, #0xC0\n\t" /* Disable IRQ, FIQ. */ \ - "MSR CPSR, R0\n\t" /* Write back modified value. */ \ - "LDMIA SP!, {R0}" ); /* Pop R0. */ \ -} while( 0 ) - -#define portENABLE_INTERRUPTS() do { \ - asm volatile ( \ - "STMDB SP!, {R0}\n\t" /* Push R0. */ \ - "MRS R0, CPSR\n\t" /* Get CPSR. */ \ - "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \ - "MSR CPSR, R0\n\t" /* Write back modified value. */ \ - "LDMIA SP!, {R0}" ); /* Pop R0. */ \ -} while( 0 ) -#endif - -extern void vPortEnterCritical( void ); -extern void vPortExitCritical( void ); - -#define portENTER_CRITICAL() vPortEnterCritical(); -#define portEXIT_CRITICAL() vPortExitCritical(); - -/* ----------------------- Defines (Other) ----------------------------------*/ - -/* Task function macros as described on the FreeRTOS.org WEB site. */ -#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) -#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/MemMang/heap_1.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/MemMang/heap_1.c deleted file mode 100644 index 57a7e4e0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/MemMang/heap_1.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - -/* - -Changes between V2.5.1 and V2.5.1 - - + The memory pool has been defined within a struct to ensure correct memory - alignment on 32bit systems. - -Changes between V2.6.1 and V3.0.0 - - + An overflow check has been added to ensure the next free byte variable - does not wrap around. -*/ - - -/* - * The simplest possible implementation of pvPortMalloc(). Note that this - * implementation does NOT allow allocated memory to be freed again. - * - * See heap_2.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include -#include "FreeRTOS.h" -#include "task.h" - -/* Setup the correct byte alignment mask for the defined byte alignment. */ - -#if portBYTE_ALIGNMENT == 8 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0007 ) -#endif - -#if portBYTE_ALIGNMENT == 4 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0000 ) -#endif - -#ifndef heapBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static struct xRTOS_HEAP -{ - unsigned portLONG ulDummy; - unsigned portCHAR ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -static size_t xNextFreeByte = ( size_t ) 0; -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn = NULL; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - #if portBYTE_ALIGNMENT != 1 - if( xWantedSize & heapBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) ); - } - #endif - - vTaskSuspendAll(); - { - /* Check there is enough room left for the allocation. */ - if( ( ( xNextFreeByte + xWantedSize ) < configTOTAL_HEAP_SIZE ) && - ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) )/* Check for overflow. */ - { - /* Return the next free byte then increment the index past this - block. */ - pvReturn = &( xHeap.ucHeap[ xNextFreeByte ] ); - xNextFreeByte += xWantedSize; - } - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - /* Memory cannot be freed using this scheme. See heap_2.c and heap_3.c - for alternative implementations, and the memory management pages of - http://www.FreeRTOS.org for more information. */ - ( void ) pv; -} -/*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* Only required when static memory is not cleared. */ - xNextFreeByte = ( size_t ) 0; -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/MemMang/heap_2.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/MemMang/heap_2.c deleted file mode 100644 index f733e7dd..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/MemMang/heap_2.c +++ /dev/null @@ -1,244 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - -/* - * A sample implementation of pvPortMalloc() and vPortFree() that permits - * allocated blocks to be freed, but does not combine adjacent free blocks - * into a single larger block. - * - * See heap_1.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* Setup the correct byte alignment mask for the defined byte alignment. */ - -#if portBYTE_ALIGNMENT == 8 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0007 ) -#endif - -#if portBYTE_ALIGNMENT == 4 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0000 ) -#endif - -#ifndef heapBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static struct xRTOS_HEAP -{ - unsigned portLONG ulDummy; - unsigned portCHAR ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -/* Define the linked list structure. This is used to link free blocks in order -of their size. */ -typedef struct A_BLOCK_LINK -{ - struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */ - size_t xBlockSize; /*<< The size of the free block. */ -} xBlockLink; - - -static const unsigned portSHORT heapSTRUCT_SIZE = ( sizeof( xBlockLink ) + ( sizeof( xBlockLink ) % portBYTE_ALIGNMENT ) ); -#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) ) - -/* Create a couple of list links to mark the start and end of the list. */ -static xBlockLink xStart, xEnd; - -/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */ - -/* - * Insert a block into the list of free blocks - which is ordered by size of - * the block. Small blocks at the start of the list and large blocks at the end - * of the list. - */ -#define prvInsertBlockIntoFreeList( pxBlockToInsert ) \ -{ \ -xBlockLink *pxIterator; \ -size_t xBlockSize; \ - \ - xBlockSize = pxBlockToInsert->xBlockSize; \ - \ - /* Iterate through the list until a block is found that has a larger size */ \ - /* than the block we are inserting. */ \ - for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock ) \ - { \ - /* There is nothing to do here - just iterate to the correct position. */ \ - } \ - \ - /* Update the list to include the block being inserted in the correct */ \ - /* position. */ \ - pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; \ - pxIterator->pxNextFreeBlock = pxBlockToInsert; \ -} -/*-----------------------------------------------------------*/ - -#define prvHeapInit() \ -{ \ -xBlockLink *pxFirstFreeBlock; \ - \ - /* xStart is used to hold a pointer to the first item in the list of free */ \ - /* blocks. The void cast is used to prevent compiler warnings. */ \ - xStart.pxNextFreeBlock = ( void * ) xHeap.ucHeap; \ - xStart.xBlockSize = ( size_t ) 0; \ - \ - /* xEnd is used to mark the end of the list of free blocks. */ \ - xEnd.xBlockSize = configTOTAL_HEAP_SIZE; \ - xEnd.pxNextFreeBlock = NULL; \ - \ - /* To start with there is a single free block that is sized to take up the \ - entire heap space. */ \ - pxFirstFreeBlock = ( void * ) xHeap.ucHeap; \ - pxFirstFreeBlock->xBlockSize = configTOTAL_HEAP_SIZE; \ - pxFirstFreeBlock->pxNextFreeBlock = &xEnd; \ -} -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink; -static portBASE_TYPE xHeapHasBeenInitialised = pdFALSE; -void *pvReturn = NULL; - - vTaskSuspendAll(); - { - /* If this is the first call to malloc then the heap will require - initialisation to setup the list of free blocks. */ - if( xHeapHasBeenInitialised == pdFALSE ) - { - prvHeapInit(); - xHeapHasBeenInitialised = pdTRUE; - } - - /* The wanted size is increased so it can contain a xBlockLink - structure in addition to the requested amount of bytes. */ - if( xWantedSize > 0 ) - { - xWantedSize += heapSTRUCT_SIZE; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - if( xWantedSize & heapBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) ); - } - } - - if( ( xWantedSize > 0 ) && ( xWantedSize < configTOTAL_HEAP_SIZE ) ) - { - /* Blocks are stored in byte order - traverse the list from the start - (smallest) block until one of adequate size is found. */ - pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; - while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock ) ) - { - pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; - } - - /* If we found the end marker then a block of adequate size was not found. */ - if( pxBlock != &xEnd ) - { - /* Return the memory space - jumping over the xBlockLink structure - at its start. */ - pvReturn = ( void * ) ( ( ( unsigned portCHAR * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE ); - - /* This block is being returned for use so must be taken our of the - list of free blocks. */ - pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; - - /* If the block is larger than required it can be split into two. */ - if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) - { - /* This block is to be split into two. Create a new block - following the number of bytes requested. The void cast is - used to prevent byte alignment warnings from the compiler. */ - pxNewBlockLink = ( void * ) ( ( ( unsigned portCHAR * ) pxBlock ) + xWantedSize ); - - /* Calculate the sizes of two blocks split from the single - block. */ - pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; - - /* Insert the new block into the list of free blocks. */ - prvInsertBlockIntoFreeList( ( pxNewBlockLink ) ); - } - } - } - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ -unsigned portCHAR *puc = ( unsigned portCHAR * ) pv; -xBlockLink *pxLink; - - if( pv ) - { - /* The memory being freed will have an xBlockLink structure immediately - before it. */ - puc -= heapSTRUCT_SIZE; - - /* This casting is to keep the compiler from issuing warnings. */ - pxLink = ( void * ) puc; - - vTaskSuspendAll(); - { - /* Add this block to the list of free blocks. */ - prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) ); - } - xTaskResumeAll(); - } -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/MemMang/heap_3.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/MemMang/heap_3.c deleted file mode 100644 index c32f883b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/portable/MemMang/heap_3.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - - -/* - * Implementation of pvPortMalloc() and vPortFree() that relies on the - * compilers own malloc() and free() implementations. - * - * This file can only be used if the linker is configured to to generate - * a heap memory area. - * - * See heap_2.c and heap_1.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ - -#include - -#include "FreeRTOS.h" -#include "task.h" - -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn; - - vTaskSuspendAll(); - { - pvReturn = malloc( xWantedSize ); - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - if( pv ) - { - vTaskSuspendAll(); - { - free( pv ); - } - xTaskResumeAll(); - } -} - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/queue.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/queue.c deleted file mode 100644 index ab0c13ae..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/queue.c +++ /dev/null @@ -1,930 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along - with commercial development and support options. - *************************************************************************** -*/ - -/* -Changes from V1.01 - - + More use of 8bit data types. - + Function name prefixes changed where the data type returned has changed. - -Changed from V2.0.0 - - + Added the queue locking mechanism and make more use of the scheduler - suspension feature to minimise the time interrupts have to be disabled - when accessing a queue. - -Changed from V2.2.0 - - + Explicit use of 'signed' qualifier on portCHAR types added. - -Changes from V3.0.0 - - + API changes as described on the FreeRTOS.org WEB site. - -Changes from V3.2.3 - - + Added the queue functions that can be used from co-routines. - -Changes from V4.0.5 - - + Added a loop within xQueueSend() and xQueueReceive() to prevent the - functions exiting when a block time remains and the function has - not completed. - -Changes from V4.1.2: - - + BUG FIX: Removed the call to prvIsQueueEmpty from within xQueueCRReceive - as it exited with interrupts enabled. Thanks Paul Katz. - -Changes from V4.1.3: - - + Modified xQueueSend() and xQueueReceive() to handle the (very unlikely) - case whereby a task unblocking due to a temporal event can remove/send an - item from/to a queue when a higher priority task is still blocked on the - queue. This modification is a result of the SafeRTOS testing. -*/ - -#include -#include -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -/* Constants used with the cRxLock and cTxLock structure members. */ -#define queueUNLOCKED ( ( signed portBASE_TYPE ) -1 ) -#define queueERRONEOUS_UNBLOCK ( -1 ) - -/* - * Definition of the queue used by the scheduler. - * Items are queued by copy, not reference. - */ -typedef struct QueueDefinition -{ - signed portCHAR *pcHead; /*< Points to the beginning of the queue storage area. */ - signed portCHAR *pcTail; /*< Points to the byte at the end of the queue storage area. Once more byte is allocated than necessary to store the queue items, this is used as a marker. */ - - signed portCHAR *pcWriteTo; /*< Points to the free next place in the storage area. */ - signed portCHAR *pcReadFrom; /*< Points to the last place that a queued item was read from. */ - - xList xTasksWaitingToSend; /*< List of tasks that are blocked waiting to post onto this queue. Stored in priority order. */ - xList xTasksWaitingToReceive; /*< List of tasks that are blocked waiting to read from this queue. Stored in priority order. */ - - unsigned portBASE_TYPE uxMessagesWaiting;/*< The number of items currently in the queue. */ - unsigned portBASE_TYPE uxLength; /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */ - unsigned portBASE_TYPE uxItemSize; /*< The size of each items that the queue will hold. */ - - signed portBASE_TYPE xRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ - signed portBASE_TYPE xTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ -} xQUEUE; -/*-----------------------------------------------------------*/ - -/* - * Inside this file xQueueHandle is a pointer to a xQUEUE structure. - * To keep the definition private the API header file defines it as a - * pointer to void. - */ -typedef xQUEUE * xQueueHandle; - -/* - * Prototypes for public functions are included here so we don't have to - * include the API header file (as it defines xQueueHandle differently). These - * functions are documented in the API header file. - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); -signed portBASE_TYPE xQueueSend( xQueueHandle xQueue, const void * pvItemToQueue, portTickType xTicksToWait ); -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue ); -void vQueueDelete( xQueueHandle xQueue ); -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ); -signed portBASE_TYPE xQueueReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - -#if configUSE_CO_ROUTINES == 1 - signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ); - signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ); - signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); -#endif - -/* - * Unlocks a queue locked by a call to prvLockQueue. Locking a queue does not - * prevent an ISR from adding or removing items to the queue, but does prevent - * an ISR from removing tasks from the queue event lists. If an ISR finds a - * queue is locked it will instead increment the appropriate queue lock count - * to indicate that a task may require unblocking. When the queue in unlocked - * these lock counts are inspected, and the appropriate action taken. - */ -static void prvUnlockQueue( xQueueHandle pxQueue ); - -/* - * Uses a critical section to determine if there is any data in a queue. - * - * @return pdTRUE if the queue contains no items, otherwise pdFALSE. - */ -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ); - -/* - * Uses a critical section to determine if there is any space in a queue. - * - * @return pdTRUE if there is no space, otherwise pdFALSE; - */ -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ); - -/* - * Macro that copies an item into the queue. This is done by copying the item - * byte for byte, not by reference. Updates the queue state to ensure it's - * integrity after the copy. - */ -#define prvCopyQueueData( pxQueue, pvItemToQueue ) \ -{ \ - memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( unsigned ) pxQueue->uxItemSize ); \ - ++( pxQueue->uxMessagesWaiting ); \ - pxQueue->pcWriteTo += pxQueue->uxItemSize; \ - if( pxQueue->pcWriteTo >= pxQueue->pcTail ) \ - { \ - pxQueue->pcWriteTo = pxQueue->pcHead; \ - } \ -} -/*-----------------------------------------------------------*/ - -/* - * Macro to mark a queue as locked. Locking a queue prevents an ISR from - * accessing the queue event lists. - */ -#define prvLockQueue( pxQueue ) \ -{ \ - taskENTER_CRITICAL(); \ - ++( pxQueue->xRxLock ); \ - ++( pxQueue->xTxLock ); \ - taskEXIT_CRITICAL(); \ -} -/*-----------------------------------------------------------*/ - - -/*----------------------------------------------------------- - * PUBLIC QUEUE MANAGEMENT API documented in queue.h - *----------------------------------------------------------*/ - -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ) -{ -xQUEUE *pxNewQueue; -size_t xQueueSizeInBytes; - - /* Allocate the new queue structure. */ - if( uxQueueLength > ( unsigned portBASE_TYPE ) 0 ) - { - pxNewQueue = ( xQUEUE * ) pvPortMalloc( sizeof( xQUEUE ) ); - if( pxNewQueue != NULL ) - { - /* Create the list of pointers to queue items. The queue is one byte - longer than asked for to make wrap checking easier/faster. */ - xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ) + ( size_t ) 1; - - pxNewQueue->pcHead = ( signed portCHAR * ) pvPortMalloc( xQueueSizeInBytes ); - if( pxNewQueue->pcHead != NULL ) - { - /* Initialise the queue members as described above where the - queue type is defined. */ - pxNewQueue->pcTail = pxNewQueue->pcHead + ( uxQueueLength * uxItemSize ); - pxNewQueue->uxMessagesWaiting = 0; - pxNewQueue->pcWriteTo = pxNewQueue->pcHead; - pxNewQueue->pcReadFrom = pxNewQueue->pcHead + ( ( uxQueueLength - 1 ) * uxItemSize ); - pxNewQueue->uxLength = uxQueueLength; - pxNewQueue->uxItemSize = uxItemSize; - pxNewQueue->xRxLock = queueUNLOCKED; - pxNewQueue->xTxLock = queueUNLOCKED; - - /* Likewise ensure the event queues start with the correct state. */ - vListInitialise( &( pxNewQueue->xTasksWaitingToSend ) ); - vListInitialise( &( pxNewQueue->xTasksWaitingToReceive ) ); - - return pxNewQueue; - } - else - { - vPortFree( pxNewQueue ); - } - } - } - - /* Will only reach here if we could not allocate enough memory or no memory - was required. */ - return NULL; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn = pdPASS; -xTimeOutType xTimeOut; - - /* Make sure other tasks do not access the queue. */ - vTaskSuspendAll(); - - /* Capture the current time status for future reference. */ - vTaskSetTimeOutState( &xTimeOut ); - - /* It is important that this is the only thread/ISR that modifies the - ready or delayed lists until xTaskResumeAll() is called. Places where - the ready/delayed lists are modified include: - - + vTaskDelay() - Nothing can call vTaskDelay as the scheduler is - suspended, vTaskDelay() cannot be called from an ISR. - + vTaskPrioritySet() - Has a critical section around the access. - + vTaskSwitchContext() - This will not get executed while the scheduler - is suspended. - + prvCheckDelayedTasks() - This will not get executed while the - scheduler is suspended. - + xTaskCreate() - Has a critical section around the access. - + vTaskResume() - Has a critical section around the access. - + xTaskResumeAll() - Has a critical section around the access. - + xTaskRemoveFromEventList - Checks to see if the scheduler is - suspended. If so then the TCB being removed from the event is - removed from the event and added to the xPendingReadyList. - */ - - /* Make sure interrupts do not access the queue event list. */ - prvLockQueue( pxQueue ); - - /* It is important that interrupts to not access the event list of the - queue being modified here. Places where the event list is modified - include: - - + xQueueSendFromISR(). This checks the lock on the queue to see if - it has access. If the queue is locked then the Tx lock count is - incremented to signify that a task waiting for data can be made ready - once the queue lock is removed. If the queue is not locked then - a task can be moved from the event list, but will not be removed - from the delayed list or placed in the ready list until the scheduler - is unlocked. - - + xQueueReceiveFromISR(). As per xQueueSendFromISR(). - */ - - /* If the queue is already full we may have to block. */ - do - { - if( prvIsQueueFull( pxQueue ) ) - { - /* The queue is full - do we want to block or just leave without - posting? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* We are going to place ourselves on the xTasksWaitingToSend event - list, and will get woken should the delay expire, or space become - available on the queue. - - As detailed above we do not require mutual exclusion on the event - list as nothing else can modify it or the ready lists while we - have the scheduler suspended and queue locked. - - It is possible that an ISR has removed data from the queue since we - checked if any was available. If this is the case then the data - will have been copied from the queue, and the queue variables - updated, but the event list will not yet have been checked to see if - anything is waiting as the queue is locked. */ - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait ); - - /* Force a context switch now as we are blocked. We can do - this from within a critical section as the task we are - switching to has its own context. When we return here (i.e. we - unblock) we will leave the critical section as normal. - - It is possible that an ISR has caused an event on an unrelated and - unlocked queue. If this was the case then the event list for that - queue will have been updated but the ready lists left unchanged - - instead the readied task will have been added to the pending ready - list. */ - taskENTER_CRITICAL(); - { - /* We can safely unlock the queue and scheduler here as - interrupts are disabled. We must not yield with anything - locked, but we can yield from within a critical section. - - Tasks that have been placed on the pending ready list cannot - be tasks that are waiting for events on this queue. See - in comment xTaskRemoveFromEventList(). */ - prvUnlockQueue( pxQueue ); - - /* Resuming the scheduler may cause a yield. If so then there - is no point yielding again here. */ - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - - /* We want to check to see if the queue is still full - before leaving the critical section. This is to prevent - this task placing an item into the queue due to an - interrupt making space on the queue between critical - sections (when there might be a higher priority task - blocked on the queue that cannot run yet because the - scheduler gets suspended). */ - if( pxQueue->uxMessagesWaiting == pxQueue->uxLength ) - { - /* We unblocked but there is no space in the queue, - we probably timed out. */ - xReturn = errQUEUE_FULL; - } - - /* Before leaving the critical section we have to ensure - exclusive access again. */ - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - } - taskEXIT_CRITICAL(); - } - } - - /* If xReturn is errQUEUE_FULL then we unblocked when the queue - was still full. Don't check it again now as it is possible that - an interrupt has removed an item from the queue since we left the - critical section and we don't want to write to the queue in case - there is a task of higher priority blocked waiting for space to - be available on the queue. If this is the case the higher priority - task will execute when the scheduler is unsupended. */ - if( xReturn != errQUEUE_FULL ) - { - /* When we are here it is possible that we unblocked as space became - available on the queue. It is also possible that an ISR posted to the - queue since we left the critical section, so it may be that again there - is no space. This would only happen if a task and ISR post onto the - same queue. */ - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - /* There is room in the queue, copy the data into the queue. */ - prvCopyQueueData( pxQueue, pvItemToQueue ); - xReturn = pdPASS; - - /* Update the TxLock count so prvUnlockQueue knows to check for - tasks waiting for data to become available in the queue. */ - ++( pxQueue->xTxLock ); - } - else - { - xReturn = errQUEUE_FULL; - } - } - taskEXIT_CRITICAL(); - } - - if( xReturn == errQUEUE_FULL ) - { - if( xTicksToWait > 0 ) - { - if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - { - xReturn = queueERRONEOUS_UNBLOCK; - } - } - } - } - while( xReturn == queueERRONEOUS_UNBLOCK ); - - prvUnlockQueue( pxQueue ); - xTaskResumeAll(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ) -{ - /* Similar to xQueueSend, except we don't block if there is no room in the - queue. Also we don't directly wake a task that was blocked on a queue - read, instead we return a flag to say whether a context switch is required - or not (i.e. has a task with a higher priority than us been woken by this - post). */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - prvCopyQueueData( pxQueue, pvItemToQueue ); - - /* If the queue is locked we do not alter the event list. This will - be done when the queue is unlocked later. */ - if( pxQueue->xTxLock == queueUNLOCKED ) - { - /* We only want to wake one task per ISR, so check that a task has - not already been woken. */ - if( !xTaskPreviouslyWoken ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - return pdTRUE; - } - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was posted while it was locked. */ - ++( pxQueue->xTxLock ); - } - } - - return xTaskPreviouslyWoken; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn = pdTRUE; -xTimeOutType xTimeOut; - - /* This function is very similar to xQueueSend(). See comments within - xQueueSend() for a more detailed explanation. - - Make sure other tasks do not access the queue. */ - vTaskSuspendAll(); - - /* Capture the current time status for future reference. */ - vTaskSetTimeOutState( &xTimeOut ); - - /* Make sure interrupts do not access the queue. */ - prvLockQueue( pxQueue ); - - do - { - /* If there are no messages in the queue we may have to block. */ - if( prvIsQueueEmpty( pxQueue ) ) - { - /* There are no messages in the queue, do we want to block or just - leave with nothing? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); - taskENTER_CRITICAL(); - { - prvUnlockQueue( pxQueue ); - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - - if( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 ) - { - /* We unblocked but the queue is empty. We probably - timed out. */ - xReturn = errQUEUE_EMPTY; - } - - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - } - taskEXIT_CRITICAL(); - } - } - - if( xReturn != errQUEUE_EMPTY ) - { - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - /* Increment the lock count so prvUnlockQueue knows to check for - tasks waiting for space to become available on the queue. */ - ++( pxQueue->xRxLock ); - xReturn = pdPASS; - } - else - { - xReturn = errQUEUE_EMPTY; - } - } - taskEXIT_CRITICAL(); - } - - if( xReturn == errQUEUE_EMPTY ) - { - if( xTicksToWait > 0 ) - { - if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - { - xReturn = queueERRONEOUS_UNBLOCK; - } - } - } - } while( xReturn == queueERRONEOUS_UNBLOCK ); - - /* We no longer require exclusive access to the queue. */ - prvUnlockQueue( pxQueue ); - xTaskResumeAll(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ) -{ -signed portBASE_TYPE xReturn; - - /* We cannot block from an ISR, so check there is data available. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Copy the data from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - /* If the queue is locked we will not modify the event list. Instead - we update the lock count so the task that unlocks the queue will know - that an ISR has removed data while the queue was locked. */ - if( pxQueue->xRxLock == queueUNLOCKED ) - { - /* We only want to wake one task per ISR, so check that a task has - not already been woken. */ - if( !( *pxTaskWoken ) ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - /* The task waiting has a higher priority than us so - force a context switch. */ - *pxTaskWoken = pdTRUE; - } - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was removed while it was locked. */ - ++( pxQueue->xRxLock ); - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue ) -{ -unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - uxReturn = pxQueue->uxMessagesWaiting; - taskEXIT_CRITICAL(); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -void vQueueDelete( xQueueHandle pxQueue ) -{ - vPortFree( pxQueue->pcHead ); - vPortFree( pxQueue ); -} -/*-----------------------------------------------------------*/ - -static void prvUnlockQueue( xQueueHandle pxQueue ) -{ - /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */ - - /* The lock counts contains the number of extra data items placed or - removed from the queue while the queue was locked. When a queue is - locked items can be added or removed, but the event lists cannot be - updated. */ - taskENTER_CRITICAL(); - { - --( pxQueue->xTxLock ); - - /* See if data was added to the queue while it was locked. */ - if( pxQueue->xTxLock > queueUNLOCKED ) - { - pxQueue->xTxLock = queueUNLOCKED; - - /* Data was posted while the queue was locked. Are any tasks - blocked waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* Tasks that are removed from the event list will get added to - the pending ready list as the scheduler is still suspended. */ - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - vTaskMissedYield(); - } - } - } - } - taskEXIT_CRITICAL(); - - /* Do the same for the Rx lock. */ - taskENTER_CRITICAL(); - { - --( pxQueue->xRxLock ); - - if( pxQueue->xRxLock > queueUNLOCKED ) - { - pxQueue->xRxLock = queueUNLOCKED; - - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - vTaskMissedYield(); - } - } - } - } - taskEXIT_CRITICAL(); -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == pxQueue->uxLength ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* If the queue is already full we may have to block. A critical section - is required to prevent an interrupt removing something from the queue - between the check to see if the queue is full and blocking on the queue. */ - portDISABLE_INTERRUPTS(); - { - if( prvIsQueueFull( pxQueue ) ) - { - /* The queue is full - do we want to block or just leave without - posting? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* As this is called from a coroutine we cannot block directly, but - return indicating that we need to block. */ - vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) ); - portENABLE_INTERRUPTS(); - return errQUEUE_BLOCKED; - } - else - { - portENABLE_INTERRUPTS(); - return errQUEUE_FULL; - } - } - } - portENABLE_INTERRUPTS(); - - portNOP(); - - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - /* There is room in the queue, copy the data into the queue. */ - prvCopyQueueData( pxQueue, pvItemToQueue ); - xReturn = pdPASS; - - /* Were any co-routines waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* In this instance the co-routine could be placed directly - into the ready list as we are within a critical section. - Instead the same pending ready list mechansim is used as if - the event were caused from within an interrupt. */ - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The co-routine waiting has a higher priority so record - that a yield might be appropriate. */ - xReturn = errQUEUE_YIELD; - } - } - } - else - { - xReturn = errQUEUE_FULL; - } - } - portENABLE_INTERRUPTS(); - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* If the queue is already empty we may have to block. A critical section - is required to prevent an interrupt adding something to the queue - between the check to see if the queue is empty and blocking on the queue. */ - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 ) - { - /* There are no messages in the queue, do we want to block or just - leave with nothing? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* As this is a co-routine we cannot block directly, but return - indicating that we need to block. */ - vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) ); - portENABLE_INTERRUPTS(); - return errQUEUE_BLOCKED; - } - else - { - portENABLE_INTERRUPTS(); - return errQUEUE_FULL; - } - } - } - portENABLE_INTERRUPTS(); - - portNOP(); - - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Data is available from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - xReturn = pdPASS; - - /* Were any co-routines waiting for space to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - /* In this instance the co-routine could be placed directly - into the ready list as we are within a critical section. - Instead the same pending ready list mechansim is used as if - the event were caused from within an interrupt. */ - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - xReturn = errQUEUE_YIELD; - } - } - } - else - { - xReturn = pdFAIL; - } - } - portENABLE_INTERRUPTS(); - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - - - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ) -{ - /* Cannot block within an ISR so if there is no space on the queue then - exit without doing anything. */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - prvCopyQueueData( pxQueue, pvItemToQueue ); - - /* We only want to wake one co-routine per ISR, so check that a - co-routine has not already been woken. */ - if( !xCoRoutinePreviouslyWoken ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - return pdTRUE; - } - } - } - } - - return xCoRoutinePreviouslyWoken; -} -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxCoRoutineWoken ) -{ -signed portBASE_TYPE xReturn; - - /* We cannot block from an ISR, so check there is data available. If - not then just leave without doing anything. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Copy the data from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - if( !( *pxCoRoutineWoken ) ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - *pxCoRoutineWoken = pdTRUE; - } - } - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/tasks.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/tasks.c deleted file mode 100644 index 3f2f0672..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOS/tasks.c +++ /dev/null @@ -1,1936 +0,0 @@ -/* - FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - - Also see http://www.SafeRTOS.com for an IEC 61508 compliant version, along - with development and support options. - *************************************************************************** -*/ - -/* -Changes from V1.00: - - + Call to portRESTORE_CONTEXT has been removed. The first context - switch is now performed within sPortStartScheduler(). - -Changes from V1.01: - - + More use of 8bit data types. - + Function name prefixes changed where the data type returned has changed. - + configUSE_TRACE_FACILITY is no longer defined by default. - -Changes from V1.2.0 - - + Introduced ucTopReadyPriority. This tracks the highest priority ready - queue that contains a valid TCB and thus makes the context switch - slightly faster. - - + prvAddTaskToReadyQueue() has been made a macro. - -Changes from V1.2.6 - - + Added conditional compilation directives. - + Extended API. - + Rearranged function order. - + Creating a task now causes a context switch if the task being created - has a higher priority than the calling task - assuming the kernel is - running. - + vTaskDelete() now only causes a context switch if the calling task is - the task being deleted. - -Changes from V2.0.0 - - + Allow the type of the tick count to be 16 or 32 bits. - + Introduce xPendingReadyList feature to allow the time interrupts have to - be disabled to be minimised. - + Remove the #if( INCLUDE_vTaskSuspendAll ) statements. vTaskSuspendAll() - is now always included as it is used by the scheduler itself. - -Changes from V2.1.0 - - + Bug fix - pxCurrentTCB is now initialised before the call to - prvInitializeTaskLists(). Previously pxCurrentTCB could be accessed - while null. - -Changed from V2.1.1 - - + Change to where lStackSize is declared within sTaskCreate() to prevent - compiler warnings with 8051 port. - -Changes from V2.2.0 - - + Explicit use of 'signed' qualifier on portCHAR types added. - + Changed odd calculation of initial pxTopOfStack value when - portSTACK_GROWTH < 0. - + Removed pcVersionNumber definition. - -Changes from V2.5.3 - - + cTaskResumeAll() modified to ensure it can be called prior to the task - lists being initialised. - -Changes from V2.5.5 - - + Added API function vTaskDelayUntil(). - + Added INCLUDE_vTaskDelay conditional compilation. - -Changes from V2.6.0 - - + Updated the vWriteTraceToBuffer macro to always be 4 byte aligned so it - can be used on ARM architectures. - + tskMAX_TASK_NAME_LEN definition replaced with the port specific - configMAX_TASK_NAME_LEN definition. - + Removed the call to strcpy when copying across the task name into the - TCB. - + Added ucTasksDeleted variable to prevent vTaskSuspendAll() being called - too often in the idle task. - -Changes between V3.0.0 and V2.6.1 - - + When resuming the scheduler a yield is performed if either a tick has - been missed, or a task is moved from the pending ready list into a ready - list. Previously a yield was not performed on this second condition. - + Introduced the type portBASE_TYPE. This necessitates several API - changes. - + Removed the sUsingPreemption variable. The constant defined in - portmacro.h is now used directly. - + The idle task can now include an optional hook function - and no longer - completes its time slice if other tasks with equal priority to it are - ready to run. - + See the FreeRTOS.org documentation for more information on V2.x.x to - V3.x.x modifications. - -Changes from V3.1.1 - - + Modified vTaskPrioritySet() and vTaskResume() to allow these functions to - be called while the scheduler is suspended. - + Corrected the task ordering within event lists. - -Changes from V3.2.0 - - + Added function xTaskGetCurrentTaskHandle(). - -Changes from V3.2.4 - - + Changed the volatile declarations on some variables to reflect the - changes to the list definitions. - + Changed the order of the TCB definition so there is commonality between - the task control block and a co-routine control block. - + Allow the scheduler to be started even if no tasks other than the idle - task has been created. This allows co-routines to run even when no tasks - have been created. - + The need for a context switch is now signalled if a task woken by an - event has a priority greater or equal to the currently running task. - Previously this was only greater than. - -Changes from V4.0.0 - - + Added the xMissedYield handling. - -Changes from V4.0.1 - - + The function vTaskList() now suspends the scheduler rather than disabling - interrupts during the creation of the task list. - + Allow a task to delete itself by passing in its own handle. Previously - this could only be done by passing in NULL. - + The tick hook function is now called only within a tick isr. Previously - it was also called when the tick function was called during the scheduler - unlocking process. - -Changes from V4.0.3 - - + Extra checks have been placed in vTaskPrioritySet() to avoid unnecessary - yields. - -Changed from V4.0.4 - - + Bug fix: The 'value' of the event list item is updated when the priority - of a task is changed. Previously only the priority of the TCB itself was - changed. - + When resuming a task a check is first made to see if the task is actually - suspended. - + vTaskPrioritySet() and vTaskResume() no longer use the event list item. - This has not been necessary since V4.0.1 when the xMissedYield handling - was added. - + Implement xTaskResumeFromISR(). - -Changes from V4.0.5 - - + Added utility functions and xOverflowCount variable to facilitate the - queue.c changes. - -Changes from V4.1.2 - - + Tasks that block on events with a timeout of portMAX_DELAY are now - blocked indefinitely if configINCLUDE_vTaskSuspend is defined. - Previously portMAX_DELAY was just the longest block time possible. - -Changes from V4.1.3 - - + Very small change made to xTaskCheckForTimeout() as a result of the - SafeRTOS testing. This corrects the case where the function can return an - invalid value - but only in an extremely unlikely scenario. - -Changes since V4.3.1: - - + Added xTaskGetSchedulerState() function. - + Added prvIsTaskSuspended() to take into account the Occurrence of - vTaskResume() or vTaskResumeFromISR() being called passing in the - handle of a task that appears in the Suspended list only because it - is blocked on an event without a timeout being specified. - + Updated xTaskCheckForTimeout() to take into account that tasks blocked - using the Suspended list should never time out. -*/ - -#include -#include -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* - * Macro to define the amount of stack available to the idle task. - */ -#define tskIDLE_STACK_SIZE configMINIMAL_STACK_SIZE - - -/* - * Default a definitions for backwards compatibility with old - * portmacro.h files. - */ -#ifndef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 16 -#endif - -#ifndef INCLUDE_xTaskGetCurrentTaskHandle - #define INCLUDE_xTaskGetCurrentTaskHandle 0 -#endif - -#ifndef configIDLE_SHOULD_YIELD - #define configIDLE_SHOULD_YIELD 1 -#endif - -#if configMAX_TASK_NAME_LEN < 1 - #undef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 1 -#endif - -#ifndef INCLUDE_xTaskResumeFromISR - #define INCLUDE_xTaskResumeFromISR 1 -#endif - -#ifndef INCLUDE_xTaskGetSchedulerState - #define INCLUDE_xTaskGetSchedulerState 0 -#endif - -/* - * Task control block. A task control block (TCB) is allocated to each task, - * and stores the context of the task. - */ -typedef struct tskTaskControlBlock -{ - volatile portSTACK_TYPE *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE STRUCT. */ - xListItem xGenericListItem; /*< List item used to place the TCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the TCB in event lists. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the task where 0 is the lowest priority. */ - portSTACK_TYPE *pxStack; /*< Points to the start of the stack. */ - unsigned portBASE_TYPE uxTCBNumber; /*< This is used for tracing the scheduler and making debugging easier only. */ - signed portCHAR pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */ - unsigned portSHORT usStackDepth; /*< Total depth of the stack (when empty). This is defined as the number of variables the stack can hold, not the number of bytes. */ -} tskTCB; - -/*lint -e956 */ - -tskTCB * volatile pxCurrentTCB = NULL; - -/* Lists for ready and blocked tasks. --------------------*/ - -static xList pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */ -static xList xDelayedTaskList1; /*< Delayed tasks. */ -static xList xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */ -static xList * volatile pxDelayedTaskList; /*< Points to the delayed task list currently being used. */ -static xList * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */ -static xList xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready queue when the scheduler is resumed. */ - -#if ( INCLUDE_vTaskDelete == 1 ) - - static volatile xList xTasksWaitingTermination; /*< Tasks that have been deleted - but the their memory not yet freed. */ - static volatile unsigned portBASE_TYPE uxTasksDeleted = ( unsigned portBASE_TYPE ) 0; - -#endif - -#if ( INCLUDE_vTaskSuspend == 1 ) - - static xList xSuspendedTaskList; /*< Tasks that are currently suspended. */ - -#endif - -/* File private variables. --------------------------------*/ -static volatile unsigned portBASE_TYPE uxCurrentNumberOfTasks = ( unsigned portBASE_TYPE ) 0; -static volatile portTickType xTickCount = ( portTickType ) 0; -static unsigned portBASE_TYPE uxTopUsedPriority = tskIDLE_PRIORITY; -static volatile unsigned portBASE_TYPE uxTopReadyPriority = tskIDLE_PRIORITY; -static volatile signed portBASE_TYPE xSchedulerRunning = pdFALSE; -static volatile unsigned portBASE_TYPE uxSchedulerSuspended = ( unsigned portBASE_TYPE ) pdFALSE; -static volatile unsigned portBASE_TYPE uxMissedTicks = ( unsigned portBASE_TYPE ) 0; -static volatile portBASE_TYPE xMissedYield = ( portBASE_TYPE ) pdFALSE; -static volatile portBASE_TYPE xNumOfOverflows = ( portBASE_TYPE ) 0; -/* Debugging and trace facilities private variables and macros. ------------*/ - -/* - * The value used to fill the stack of a task when the task is created. This - * is used purely for checking the high water mark for tasks. - */ -#define tskSTACK_FILL_BYTE ( 0xa5 ) - -/* - * Macros used by vListTask to indicate which state a task is in. - */ -#define tskBLOCKED_CHAR ( ( signed portCHAR ) 'B' ) -#define tskREADY_CHAR ( ( signed portCHAR ) 'R' ) -#define tskDELETED_CHAR ( ( signed portCHAR ) 'D' ) -#define tskSUSPENDED_CHAR ( ( signed portCHAR ) 'S' ) - -/* - * Macros and private variables used by the trace facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define tskSIZE_OF_EACH_TRACE_LINE ( ( unsigned portLONG ) ( sizeof( unsigned portLONG ) + sizeof( unsigned portLONG ) ) ) - static volatile signed portCHAR * volatile pcTraceBuffer; - static signed portCHAR *pcTraceBufferStart; - static signed portCHAR *pcTraceBufferEnd; - static signed portBASE_TYPE xTracing = pdFALSE; - -#endif - -/* - * Macro that writes a trace of scheduler activity to a buffer. This trace - * shows which task is running when and is very useful as a debugging tool. - * As this macro is called each context switch it is a good idea to undefine - * it if not using the facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define vWriteTraceToBuffer() \ - { \ - if( xTracing ) \ - { \ - static unsigned portBASE_TYPE uxPreviousTask = 255; \ - \ - if( uxPreviousTask != pxCurrentTCB->uxTCBNumber ) \ - { \ - if( ( pcTraceBuffer + tskSIZE_OF_EACH_TRACE_LINE ) < pcTraceBufferEnd ) \ - { \ - uxPreviousTask = pxCurrentTCB->uxTCBNumber; \ - *( unsigned portLONG * ) pcTraceBuffer = ( unsigned portLONG ) xTickCount; \ - pcTraceBuffer += sizeof( unsigned portLONG ); \ - *( unsigned portLONG * ) pcTraceBuffer = ( unsigned portLONG ) uxPreviousTask; \ - pcTraceBuffer += sizeof( unsigned portLONG ); \ - } \ - else \ - { \ - xTracing = pdFALSE; \ - } \ - } \ - } \ - } - -#else - - #define vWriteTraceToBuffer() - -#endif - - -/* - * Place the task represented by pxTCB into the appropriate ready queue for - * the task. It is inserted at the end of the list. One quirk of this is - * that if the task being inserted is at the same priority as the currently - * executing task, then it will only be rescheduled after the currently - * executing task has been rescheduled. - */ -#define prvAddTaskToReadyQueue( pxTCB ) \ -{ \ - if( pxTCB->uxPriority > uxTopReadyPriority ) \ - { \ - uxTopReadyPriority = pxTCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyTasksLists[ pxTCB->uxPriority ] ), &( pxTCB->xGenericListItem ) ); \ -} - -/* - * Macro that looks at the list of tasks that are currently delayed to see if - * any require waking. - * - * Tasks are stored in the queue in the order of their wake time - meaning - * once one tasks has been found whose timer has not expired we need not look - * any further down the list. - */ -#define prvCheckDelayedTasks() \ -{ \ -register tskTCB *pxTCB; \ - \ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ) ) != NULL ) \ - { \ - if( xTickCount < listGET_LIST_ITEM_VALUE( &( pxTCB->xGenericListItem ) ) ) \ - { \ - break; \ - } \ - vListRemove( &( pxTCB->xGenericListItem ) ); \ - /* Is the task waiting on an event also? */ \ - if( pxTCB->xEventListItem.pvContainer ) \ - { \ - vListRemove( &( pxTCB->xEventListItem ) ); \ - } \ - prvAddTaskToReadyQueue( pxTCB ); \ - } \ -} - -/* - * Several functions take an xTaskHandle parameter that can optionally be NULL, - * where NULL is used to indicate that the handle of the currently executing - * task should be used in place of the parameter. This macro simply checks to - * see if the parameter is NULL and returns a pointer to the appropriate TCB. - */ -#define prvGetTCBFromHandle( pxHandle ) ( ( pxHandle == NULL ) ? ( tskTCB * ) pxCurrentTCB : ( tskTCB * ) pxHandle ) - - -/* File private functions. --------------------------------*/ - -/* - * Utility to ready a TCB for a given task. Mainly just copies the parameters - * into the TCB structure. - */ -static void prvInitialiseTCBVariables( tskTCB *pxTCB, unsigned portSHORT usStackDepth, const signed portCHAR * const pcName, unsigned portBASE_TYPE uxPriority ); - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first task. - */ -static void prvInitialiseTaskLists( void ); - -/* - * The idle task, which as all tasks is implemented as a never ending loop. - * The idle task is automatically created and added to the ready lists upon - * creation of the first user task. - * - * The portTASK_FUNCTION_PROTO() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters ); - -/* - * Utility to free all memory allocated by the scheduler to hold a TCB, - * including the stack pointed to by the TCB. - * - * This does not free memory allocated by the task itself (i.e. memory - * allocated by calls to pvPortMalloc from within the tasks application code). - */ -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - static void prvDeleteTCB( tskTCB *pxTCB ); -#endif - -/* - * Used only by the idle task. This checks to see if anything has been placed - * in the list of tasks waiting to be deleted. If so the task is cleaned up - * and its TCB deleted. - */ -static void prvCheckTasksWaitingTermination( void ); - -/* - * Allocates memory from the heap for a TCB and associated stack. Checks the - * allocation was successful. - */ -static tskTCB *prvAllocateTCBAndStack( unsigned portSHORT usStackDepth ); - -/* - * Called from vTaskList. vListTasks details all the tasks currently under - * control of the scheduler. The tasks may be in one of a number of lists. - * prvListTaskWithinSingleList accepts a list and details the tasks from - * within just that list. - * - * THIS FUNCTION IS INTENDED FOR DEBUGGING ONLY, AND SHOULD NOT BE CALLED FROM - * NORMAL APPLICATION CODE. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( signed portCHAR *pcWriteBuffer, xList *pxList, signed portCHAR cStatus ); - -#endif - -/* - * When a task is created, the stack of the task is filled with a known value. - * This function determines the 'high water mark' of the task stack by - * determining how much of the stack remains at the original preset value. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned portSHORT usTaskCheckFreeStackSpace( const unsigned portCHAR *pucStackByte ); - -#endif - -/* - * Checks that a task being resumed (unsuspended) is actually in the Suspended - * state. - */ -#if ( INCLUDE_vTaskSuspend == 1 ) - - static portBASE_TYPE prvIsTaskSuspended( const tskTCB * const pxTCB ); - -#endif - -/*lint +e956 */ - - - - - -/*----------------------------------------------------------- - * TASK CREATION API documented in task.h - *----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask ) -{ -signed portBASE_TYPE xReturn; -tskTCB * pxNewTCB; -static unsigned portBASE_TYPE uxTaskNumber = 0; /*lint !e956 Static is deliberate - this is guarded before use. */ - - /* Allocate the memory required by the TCB and stack for the new task. - checking that the allocation was successful. */ - pxNewTCB = prvAllocateTCBAndStack( usStackDepth ); - - if( pxNewTCB != NULL ) - { - portSTACK_TYPE *pxTopOfStack; - - /* Setup the newly allocated TCB with the initial state of the task. */ - prvInitialiseTCBVariables( pxNewTCB, usStackDepth, pcName, uxPriority ); - - /* Calculate the top of stack address. This depends on whether the - stack grows from high memory to low (as per the 80x86) or visa versa. - portSTACK_GROWTH is used to make the result positive or negative as - required by the port. */ - #if portSTACK_GROWTH < 0 - { - pxTopOfStack = pxNewTCB->pxStack + ( pxNewTCB->usStackDepth - 1 ); - } - #else - { - pxTopOfStack = pxNewTCB->pxStack; - } - #endif - - /* Initialize the TCB stack to look as if the task was already running, - but had been interrupted by the scheduler. The return address is set - to the start of the task function. Once the stack has been initialised - the top of stack variable is updated. */ - pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pvTaskCode, pvParameters ); - - /* We are going to manipulate the task queues to add this task to a - ready list, so must make sure no interrupts occur. */ - portENTER_CRITICAL(); - { - uxCurrentNumberOfTasks++; - if( uxCurrentNumberOfTasks == ( unsigned portBASE_TYPE ) 1 ) - { - /* As this is the first task it must also be the current task. */ - pxCurrentTCB = pxNewTCB; - - /* This is the first task to be created so do the preliminary - initialisation required. We will not recover if this call - fails, but we will report the failure. */ - prvInitialiseTaskLists(); - } - else - { - /* If the scheduler is not already running, make this task the - current task if it is the highest priority task to be created - so far. */ - if( xSchedulerRunning == pdFALSE ) - { - if( pxCurrentTCB->uxPriority <= uxPriority ) - { - pxCurrentTCB = pxNewTCB; - } - } - } - - /* Remember the top priority to make context switching faster. Use - the priority in pxNewTCB as this has been capped to a valid value. */ - if( pxNewTCB->uxPriority > uxTopUsedPriority ) - { - uxTopUsedPriority = pxNewTCB->uxPriority; - } - - /* Add a counter into the TCB for tracing only. */ - pxNewTCB->uxTCBNumber = uxTaskNumber; - uxTaskNumber++; - - prvAddTaskToReadyQueue( pxNewTCB ); - - xReturn = pdPASS; - } - portEXIT_CRITICAL(); - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - if( xReturn == pdPASS ) - { - if( ( void * ) pxCreatedTask != NULL ) - { - /* Pass the TCB out - in an anonymous way. The calling function/ - task can use this as a handle to delete the task later if - required.*/ - *pxCreatedTask = ( xTaskHandle ) pxNewTCB; - } - - if( xSchedulerRunning != pdFALSE ) - { - /* If the created task is of a higher priority than the current task - then it should run now. */ - if( pxCurrentTCB->uxPriority < uxPriority ) - { - taskYIELD(); - } - } - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelete == 1 ) - - void vTaskDelete( xTaskHandle pxTaskToDelete ) - { - tskTCB *pxTCB; - - taskENTER_CRITICAL(); - { - /* Ensure a yield is performed if the current task is being - deleted. */ - if( pxTaskToDelete == pxCurrentTCB ) - { - pxTaskToDelete = NULL; - } - - /* If null is passed in here then we are deleting ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToDelete ); - - /* Remove task from the ready list and place in the termination list. - This will stop the task from be scheduled. The idle task will check - the termination list and free up any memory allocated by the - scheduler for the TCB and stack. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xTasksWaitingTermination, &( pxTCB->xGenericListItem ) ); - - /* Increment the ucTasksDeleted variable so the idle task knows - there is a task that has been deleted and that it should therefore - check the xTasksWaitingTermination list. */ - ++uxTasksDeleted; - } - taskEXIT_CRITICAL(); - - /* Force a reschedule if we have just deleted the current task. */ - if( xSchedulerRunning != pdFALSE ) - { - if( ( void * ) pxTaskToDelete == NULL ) - { - taskYIELD(); - } - } - } - -#endif - - - - - - -/*----------------------------------------------------------- - * TASK CONTROL API documented in task.h - *----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelayUntil == 1 ) - - void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement ) - { - portTickType xTimeToWake; - portBASE_TYPE xAlreadyYielded, xShouldDelay = pdFALSE; - - vTaskSuspendAll(); - { - /* Generate the tick time at which the task wants to wake. */ - xTimeToWake = *pxPreviousWakeTime + xTimeIncrement; - - if( xTickCount < *pxPreviousWakeTime ) - { - /* The tick count has overflowed since this function was - lasted called. In this case the only time we should ever - actually delay is if the wake time has also overflowed, - and the wake time is greater than the tick time. When this - is the case it is as if neither time had overflowed. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - else - { - /* The tick time has not overflowed. In this case we will - delay if either the wake time has overflowed, and/or the - tick time is less than the wake time. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - - /* Update the wake time ready for the next call. */ - *pxPreviousWakeTime = xTimeToWake; - - if( xShouldDelay ) - { - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - } - xAlreadyYielded = xTaskResumeAll(); - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelay == 1 ) - - void vTaskDelay( portTickType xTicksToDelay ) - { - portTickType xTimeToWake; - signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* A delay time of zero just forces a reschedule. */ - if( xTicksToDelay > ( portTickType ) 0 ) - { - vTaskSuspendAll(); - { - /* A task that is removed from the event list while the - scheduler is suspended will not get placed in the ready - list or removed from the blocked list until the scheduler - is resumed. - - This task cannot be in an event list as it is the currently - executing task. */ - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - xAlreadyYielded = xTaskResumeAll(); - } - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_uxTaskPriorityGet == 1 ) - - unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxReturn = pxTCB->uxPriority; - } - taskEXIT_CRITICAL(); - - return uxReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskPrioritySet == 1 ) - - void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxCurrentPriority, xYieldRequired = pdFALSE; - - /* Ensure the new priority is valid. */ - if( uxNewPriority >= configMAX_PRIORITIES ) - { - uxNewPriority = configMAX_PRIORITIES - 1; - } - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxCurrentPriority = pxTCB->uxPriority; - - if( uxCurrentPriority != uxNewPriority ) - { - /* The priority change may have readied a task of higher - priority than the calling task. */ - if( uxNewPriority > pxCurrentTCB->uxPriority ) - { - if( pxTask != NULL ) - { - /* The priority of another task is being raised. If we - were raising the priority of the currently running task - there would be no need to switch as it must have already - been the highest priority task. */ - xYieldRequired = pdTRUE; - } - } - else if( pxTask == NULL ) - { - /* Setting our own priority down means there may now be another - task of higher priority that is ready to execute. */ - xYieldRequired = pdTRUE; - } - - pxTCB->uxPriority = uxNewPriority; - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxNewPriority ); - - /* If the task is in the blocked or suspended list we need do - nothing more than change it's priority variable. However, if - the task is in a ready list it needs to be removed and placed - in the queue appropriate to its new priority. */ - if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxCurrentPriority ] ), &( pxTCB->xGenericListItem ) ) ) - { - /* The task is currently in its ready list - remove before adding - it to it's new ready list. As we are in a critical section we - can do this even if the scheduler is suspended. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - - if( xYieldRequired == pdTRUE ) - { - taskYIELD(); - } - } - } - taskEXIT_CRITICAL(); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskSuspend( xTaskHandle pxTaskToSuspend ) - { - tskTCB *pxTCB; - - taskENTER_CRITICAL(); - { - /* Ensure a yield is performed if the current task is being - suspended. */ - if( pxTaskToSuspend == pxCurrentTCB ) - { - pxTaskToSuspend = NULL; - } - - /* If null is passed in here then we are suspending ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToSuspend ); - - /* Remove task from the ready/delayed list and place in the suspended list. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ); - } - taskEXIT_CRITICAL(); - - /* We may have just suspended the current task. */ - if( ( void * ) pxTaskToSuspend == NULL ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - static portBASE_TYPE prvIsTaskSuspended( const tskTCB * const pxTCB ) - { - portBASE_TYPE xReturn = pdFALSE; - - /* Is the task we are attempting to resume actually in the - suspended list? */ - if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ) != pdFALSE ) - { - /* Has the task already been resumed from within an ISR? */ - if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) != pdTRUE ) - { - /* Is it in the suspended list because it is in the - Suspended state? It is possible to be in the suspended - list because it is blocked on a task with no timeout - specified. */ - if( listIS_CONTAINED_WITHIN( NULL, &( pxTCB->xEventListItem ) ) == pdTRUE ) - { - xReturn = pdTRUE; - } - } - } - - return xReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskResume( xTaskHandle pxTaskToResume ) - { - tskTCB *pxTCB; - - /* Remove the task from whichever list it is currently in, and place - it in the ready list. */ - pxTCB = ( tskTCB * ) pxTaskToResume; - - /* The parameter cannot be NULL as it is impossible to resume the - currently executing task. */ - if( pxTCB != NULL ) - { - taskENTER_CRITICAL(); - { - if( prvIsTaskSuspended( pxTCB ) == pdTRUE ) - { - /* As we are in a critical section we can access the ready - lists even if the scheduler is suspended. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* We may have just resumed a higher priority task. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - /* This yield may not cause the task just resumed to run, but - will leave the lists in the correct state for the next yield. */ - taskYIELD(); - } - } - } - taskEXIT_CRITICAL(); - } - } - -#endif - -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - tskTCB *pxTCB; - - pxTCB = ( tskTCB * ) pxTaskToResume; - - if( prvIsTaskSuspended( pxTCB ) == pdTRUE ) - { - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - xYieldRequired = ( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed, at which point a - yield will be preformed if necessary. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxTCB->xEventListItem ) ); - } - } - - return xYieldRequired; - } - -#endif - - - - -/*----------------------------------------------------------- - * PUBLIC SCHEDULER CONTROL documented in task.h - *----------------------------------------------------------*/ - - -void vTaskStartScheduler( void ) -{ -portBASE_TYPE xReturn; - - /* Add the idle task at the lowest priority. */ - xReturn = xTaskCreate( prvIdleTask, ( signed portCHAR * ) "IDLE", tskIDLE_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, ( xTaskHandle * ) NULL ); - - if( xReturn == pdPASS ) - { - /* Interrupts are turned off here, to ensure a tick does not occur - before or during the call to xPortStartScheduler(). The stacks of - the created tasks contain a status word with interrupts switched on - so interrupts will automatically get re-enabled when the first task - starts to run. - - STEPPING THROUGH HERE USING A DEBUGGER CAN CAUSE BIG PROBLEMS IF THE - DEBUGGER ALLOWS INTERRUPTS TO BE PROCESSED. */ - portDISABLE_INTERRUPTS(); - - xSchedulerRunning = pdTRUE; - xTickCount = ( portTickType ) 0; - - /* Setting up the timer tick is hardware specific and thus in the - portable interface. */ - if( xPortStartScheduler() ) - { - /* Should not reach here as if the scheduler is running the - function will not return. */ - } - else - { - /* Should only reach here if a task calls xTaskEndScheduler(). */ - } - } -} -/*-----------------------------------------------------------*/ - -void vTaskEndScheduler( void ) -{ - /* Stop the scheduler interrupts and call the portable scheduler end - routine so the original ISRs can be restored if necessary. The port - layer must ensure interrupts enable bit is left in the correct state. */ - portDISABLE_INTERRUPTS(); - xSchedulerRunning = pdFALSE; - vPortEndScheduler(); -} -/*----------------------------------------------------------*/ - -void vTaskSuspendAll( void ) -{ - portENTER_CRITICAL(); - ++uxSchedulerSuspended; - portEXIT_CRITICAL(); -} -/*----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskResumeAll( void ) -{ -register tskTCB *pxTCB; -signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* It is possible that an ISR caused a task to be removed from an event - list while the scheduler was suspended. If this was the case then the - removed task will have been added to the xPendingReadyList. Once the - scheduler has been resumed it is safe to move all the pending ready - tasks from this list into their appropriate ready list. */ - portENTER_CRITICAL(); - { - --uxSchedulerSuspended; - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - if( uxCurrentNumberOfTasks > ( unsigned portBASE_TYPE ) 0 ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - - /* Move any readied tasks from the pending list into the - appropriate ready list. */ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xPendingReadyList ) ) ) != NULL ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* If we have moved a task that has a priority higher than - the current task then we should yield. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - xYieldRequired = pdTRUE; - } - } - - /* If any ticks occurred while the scheduler was suspended then - they should be processed now. This ensures the tick count does not - slip, and that any delayed tasks are resumed at the correct time. */ - if( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - while( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskIncrementTick(); - --uxMissedTicks; - } - - /* As we have processed some ticks it is appropriate to yield - to ensure the highest priority task that is ready to run is - the task actually running. */ - xYieldRequired = pdTRUE; - } - - if( ( xYieldRequired == pdTRUE ) || ( xMissedYield == pdTRUE ) ) - { - xAlreadyYielded = pdTRUE; - xMissedYield = pdFALSE; - taskYIELD(); - } - } - } - } - portEXIT_CRITICAL(); - - return xAlreadyYielded; -} - - - - - - -/*----------------------------------------------------------- - * PUBLIC TASK UTILITIES documented in task.h - *----------------------------------------------------------*/ - - - -portTickType xTaskGetTickCount( void ) -{ -portTickType xTicks; - - /* Critical section required if running on a 16 bit processor. */ - taskENTER_CRITICAL(); - { - xTicks = xTickCount; - } - taskEXIT_CRITICAL(); - - return xTicks; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ) -{ -unsigned portBASE_TYPE uxNumberOfTasks; - - taskENTER_CRITICAL(); - uxNumberOfTasks = uxCurrentNumberOfTasks; - taskEXIT_CRITICAL(); - - return uxNumberOfTasks; -} -/*-----------------------------------------------------------*/ - -#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_vTaskDelete == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskList( signed portCHAR *pcWriteBuffer ) - { - unsigned portBASE_TYPE uxQueue; - - /* This is a VERY costly function that should be used for debug only. - It leaves interrupts disabled for a LONG time. */ - - vTaskSuspendAll(); - { - /* Run through all the lists that could potentially contain a TCB and - report the task name, state and stack high water mark. */ - - pcWriteBuffer[ 0 ] = ( signed portCHAR ) 0x00; - strcat( ( portCHAR * ) pcWriteBuffer, ( const portCHAR * ) "\r\n" ); - - uxQueue = uxTopUsedPriority + 1; - - do - { - uxQueue--; - - if( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxQueue ] ) ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &( pxReadyTasksLists[ uxQueue ] ), tskREADY_CHAR ); - } - }while( uxQueue > ( unsigned portSHORT ) tskIDLE_PRIORITY ); - - if( !listLIST_IS_EMPTY( pxDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( pxOverflowDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxOverflowDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( &xTasksWaitingTermination ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xTasksWaitingTermination, tskDELETED_CHAR ); - } - - if( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xSuspendedTaskList, tskSUSPENDED_CHAR ); - } - } - xTaskResumeAll(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - void vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize ) - { - portENTER_CRITICAL(); - { - pcTraceBuffer = ( volatile signed portCHAR * volatile )pcBuffer; - pcTraceBufferStart = pcBuffer; - pcTraceBufferEnd = pcBuffer + ( ulBufferSize - tskSIZE_OF_EACH_TRACE_LINE ); - xTracing = pdTRUE; - } - portEXIT_CRITICAL(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned portLONG ulTaskEndTrace( void ) - { - unsigned portLONG ulBufferLength; - - portENTER_CRITICAL(); - xTracing = pdFALSE; - portEXIT_CRITICAL(); - - ulBufferLength = ( unsigned portLONG ) ( pcTraceBuffer - pcTraceBufferStart ); - - return ulBufferLength; - } - -#endif - - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - * documented in task.h - *----------------------------------------------------------*/ - - -inline void vTaskIncrementTick( void ) -{ - /* Called by the portable layer each time a tick interrupt occurs. - Increments the tick then checks to see if the new tick value will cause any - tasks to be unblocked. */ - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - ++xTickCount; - if( xTickCount == ( portTickType ) 0 ) - { - xList *pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. - If there are any items in pxDelayedTaskList here then there is - an error! */ - pxTemp = pxDelayedTaskList; - pxDelayedTaskList = pxOverflowDelayedTaskList; - pxOverflowDelayedTaskList = pxTemp; - xNumOfOverflows++; - } - - /* See if this tick has made a timeout expire. */ - prvCheckDelayedTasks(); - } - else - { - ++uxMissedTicks; - - /* The tick hook gets called at regular intervals, even if the - scheduler is locked. */ - #if ( configUSE_TICK_HOOK == 1 ) - { - extern void vApplicationTickHook( void ); - - vApplicationTickHook(); - } - #endif - } - - #if ( configUSE_TICK_HOOK == 1 ) - { - extern void vApplicationTickHook( void ); - - /* Guard against the tick hook being called when the missed tick - count is being unwound (when the scheduler is being unlocked. */ - if( uxMissedTicks == 0 ) - { - vApplicationTickHook(); - } - } - #endif -} -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_vTaskCleanUpResources == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskCleanUpResources( void ) - { - unsigned portSHORT usQueue; - volatile tskTCB *pxTCB; - - usQueue = ( unsigned portSHORT ) uxTopUsedPriority + ( unsigned portSHORT ) 1; - - /* Remove any TCB's from the ready queues. */ - do - { - usQueue--; - - while( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ usQueue ] ) ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &( pxReadyTasksLists[ usQueue ] ) ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - }while( usQueue > ( unsigned portSHORT ) tskIDLE_PRIORITY ); - - /* Remove any TCB's from the delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList1 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList1 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - /* Remove any TCB's from the overflow delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList2 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList2 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - while( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xSuspendedTaskList ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - } - -#endif -/*-----------------------------------------------------------*/ - -void vTaskSwitchContext( void ) -{ - if( uxSchedulerSuspended != ( unsigned portBASE_TYPE ) pdFALSE ) - { - /* The scheduler is currently suspended - do not allow a context - switch. */ - xMissedYield = pdTRUE; - return; - } - - /* Find the highest priority queue that contains ready tasks. */ - while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopReadyPriority ] ) ) ) - { - --uxTopReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the tasks of the - same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopReadyPriority ] ) ); - vWriteTraceToBuffer(); -} -/*-----------------------------------------------------------*/ - -void vTaskPlaceOnEventList( xList *pxEventList, portTickType xTicksToWait ) -{ -portTickType xTimeToWake; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. */ - - /* Place the event list item of the TCB in the appropriate event list. - This is placed in the list in priority order so the highest priority task - is the first to be woken by the event. */ - vListInsert( ( xList * ) pxEventList, ( xListItem * ) &( pxCurrentTCB->xEventListItem ) ); - - /* We must remove ourselves from the ready list before adding ourselves - to the blocked list as the same list item is used for both lists. We have - exclusive access to the ready lists as the scheduler is locked. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - - #if ( INCLUDE_vTaskSuspend == 1 ) - { - if( xTicksToWait == portMAX_DELAY ) - { - /* Add ourselves to the suspended task list instead of a delayed task - list to ensure we are not woken by a timing event. We will block - indefinitely. */ - vListInsertEnd( ( xList * ) &xSuspendedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* Calculate the time at which the task should be woken if the event does - not occur. This may overflow but this doesn't matter. */ - xTimeToWake = xTickCount + xTicksToWait; - - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - } - #else - { - /* Calculate the time at which the task should be woken if the event does - not occur. This may overflow but this doesn't matter. */ - xTimeToWake = xTickCount + xTicksToWait; - - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - #endif -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskRemoveFromEventList( const xList *pxEventList ) -{ -tskTCB *pxUnblockedTCB; -portBASE_TYPE xReturn; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. It can also be called from within an ISR. */ - - /* The event list is sorted in priority order, so we can remove the - first in the list, remove the TCB from the delayed list, and add - it to the ready list. - - If an event is for a queue that is locked then this function will never - get called - the lock count on the queue will get modified instead. This - means we can always expect exclusive access to the event list here. */ - pxUnblockedTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedTCB->xEventListItem ) ); - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - vListRemove( &( pxUnblockedTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxUnblockedTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) ); - } - - if( pxUnblockedTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - /* Return true if the task removed from the event list has - a higher priority than the calling task. This allows - the calling task to know if it should force a context - switch now. */ - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vTaskSetTimeOutState( xTimeOutType *pxTimeOut ) -{ - pxTimeOut->xOverflowCount = xNumOfOverflows; - pxTimeOut->xTimeOnEntering = xTickCount; -} -/*-----------------------------------------------------------*/ - -portBASE_TYPE xTaskCheckForTimeOut( xTimeOutType *pxTimeOut, portTickType * const pxTicksToWait ) -{ -portBASE_TYPE xReturn; - - #if ( INCLUDE_vTaskSuspend == 1 ) - /* If INCLUDE_vTaskSuspend is set to 1 and the block time specified is - the maximum block time then the task should block indefinitely, and - therefore never time out. */ - if( *pxTicksToWait == portMAX_DELAY ) - { - xReturn = pdFALSE; - } - else /* We are not blocking indefinitely, perform the checks below. */ - #endif - - if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xTickCount >= pxTimeOut->xTimeOnEntering ) ) - { - /* The tick count is greater than the time at which vTaskSetTimeout() - was called, but has also overflowed since vTaskSetTimeOut() was called. - It must have wrapped all the way around and gone past us again. This - passed since vTaskSetTimeout() was called. */ - xReturn = pdTRUE; - } - else if( ( xTickCount - pxTimeOut->xTimeOnEntering ) < *pxTicksToWait ) - { - /* Not a genuine timeout. Adjust parameters for time remaining. */ - *pxTicksToWait -= ( xTickCount - pxTimeOut->xTimeOnEntering ); - vTaskSetTimeOutState( pxTimeOut ); - xReturn = pdFALSE; - } - else - { - xReturn = pdTRUE; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vTaskMissedYield( void ) -{ - xMissedYield = pdTRUE; -} - -/* - * ----------------------------------------------------------- - * The Idle task. - * ---------------------------------------------------------- - * - * The portTASK_FUNCTION() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION( prvIdleTask, pvParameters ) -{ - /* Stop warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /* See if any tasks have been deleted. */ - prvCheckTasksWaitingTermination(); - - #if ( configUSE_PREEMPTION == 0 ) - { - /* If we are not using preemption we keep forcing a task switch to - see if any other task has become available. If we are using - preemption we don't need to do this as any task becoming available - will automatically get the processor anyway. */ - taskYIELD(); - } - #endif - - #if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) - { - /* When using preemption tasks of equal priority will be - timesliced. If a task that is sharing the idle priority is ready - to run then the idle task should yield before the end of the - timeslice. - - A critical region is not required here as we are just reading from - the list, and an occasional incorrect value will not matter. If - the ready list at the idle priority contains more than one task - then a task other than the idle task is ready to execute. */ - if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( unsigned portBASE_TYPE ) 1 ) - { - taskYIELD(); - } - } - #endif - - #if ( configUSE_IDLE_HOOK == 1 ) - { - extern void vApplicationIdleHook( void ); - - /* Call the user defined function from within the idle task. This - allows the application designer to add background functionality - without the overhead of a separate task. - NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES, - CALL A FUNCTION THAT MIGHT BLOCK. */ - vApplicationIdleHook(); - } - #endif - } -} /*lint !e715 pvParameters is not accessed but all task functions require the same prototype. */ - - - - - - - -/*----------------------------------------------------------- - * File private functions documented at the top of the file. - *----------------------------------------------------------*/ - - - -static void prvInitialiseTCBVariables( tskTCB *pxTCB, unsigned portSHORT usStackDepth, const signed portCHAR * const pcName, unsigned portBASE_TYPE uxPriority ) -{ - pxTCB->usStackDepth = usStackDepth; - - /* Store the function name in the TCB. */ - strncpy( ( char * ) pxTCB->pcTaskName, ( const char * ) pcName, ( unsigned portSHORT ) configMAX_TASK_NAME_LEN ); - pxTCB->pcTaskName[ ( unsigned portSHORT ) configMAX_TASK_NAME_LEN - ( unsigned portSHORT ) 1 ] = '\0'; - - /* This is used as an array index so must ensure it's not too large. */ - if( uxPriority >= configMAX_PRIORITIES ) - { - uxPriority = configMAX_PRIORITIES - 1; - } - - pxTCB->uxPriority = uxPriority; - - vListInitialiseItem( &( pxTCB->xGenericListItem ) ); - vListInitialiseItem( &( pxTCB->xEventListItem ) ); - - /* Set the pxTCB as a link back from the xListItem. This is so we can get - back to the containing TCB from a generic item in a list. */ - listSET_LIST_ITEM_OWNER( &( pxTCB->xGenericListItem ), pxTCB ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - listSET_LIST_ITEM_OWNER( &( pxTCB->xEventListItem ), pxTCB ); -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseTaskLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyTasksLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedTaskList1 ); - vListInitialise( ( xList * ) &xDelayedTaskList2 ); - vListInitialise( ( xList * ) &xPendingReadyList ); - - #if ( INCLUDE_vTaskDelete == 1 ) - { - vListInitialise( ( xList * ) &xTasksWaitingTermination ); - } - #endif - - #if ( INCLUDE_vTaskSuspend == 1 ) - { - vListInitialise( ( xList * ) &xSuspendedTaskList ); - } - #endif - - /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList - using list2. */ - pxDelayedTaskList = &xDelayedTaskList1; - pxOverflowDelayedTaskList = &xDelayedTaskList2; -} -/*-----------------------------------------------------------*/ - -static void prvCheckTasksWaitingTermination( void ) -{ - #if ( INCLUDE_vTaskDelete == 1 ) - { - portBASE_TYPE xListIsEmpty; - - /* ucTasksDeleted is used to prevent vTaskSuspendAll() being called - too often in the idle task. */ - if( uxTasksDeleted > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskSuspendAll(); - xListIsEmpty = listLIST_IS_EMPTY( &xTasksWaitingTermination ); - xTaskResumeAll(); - - if( !xListIsEmpty ) - { - tskTCB *pxTCB; - - portENTER_CRITICAL(); - { - pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xTasksWaitingTermination ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - --uxCurrentNumberOfTasks; - --uxTasksDeleted; - } - portEXIT_CRITICAL(); - - prvDeleteTCB( pxTCB ); - } - } - } - #endif -} -/*-----------------------------------------------------------*/ - -static tskTCB *prvAllocateTCBAndStack( unsigned portSHORT usStackDepth ) -{ -tskTCB *pxNewTCB; - - /* Allocate space for the TCB. Where the memory comes from depends on - the implementation of the port malloc function. */ - pxNewTCB = ( tskTCB * ) pvPortMalloc( sizeof( tskTCB ) ); - - if( pxNewTCB != NULL ) - { - /* Allocate space for the stack used by the task being created. - The base of the stack memory stored in the TCB so the task can - be deleted later if required. */ - pxNewTCB->pxStack = ( portSTACK_TYPE * ) pvPortMalloc( ( ( size_t )usStackDepth ) * sizeof( portSTACK_TYPE ) ); - - if( pxNewTCB->pxStack == NULL ) - { - /* Could not allocate the stack. Delete the allocated TCB. */ - vPortFree( pxNewTCB ); - pxNewTCB = NULL; - } - else - { - /* Just to help debugging. */ - memset( pxNewTCB->pxStack, tskSTACK_FILL_BYTE, usStackDepth * sizeof( portSTACK_TYPE ) ); - } - } - - return pxNewTCB; -} -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( signed portCHAR *pcWriteBuffer, xList *pxList, signed portCHAR cStatus ) - { - volatile tskTCB *pxNextTCB, *pxFirstTCB; - static portCHAR pcStatusString[ 50 ]; - unsigned portSHORT usStackRemaining; - - /* Write the details of all the TCB's in pxList into the buffer. */ - listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); - do - { - listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); - usStackRemaining = usTaskCheckFreeStackSpace( ( unsigned portCHAR * ) pxNextTCB->pxStack ); - sprintf( pcStatusString, ( portCHAR * ) "%s\t\t%c\t%u\t%u\t%u\r\n", pxNextTCB->pcTaskName, cStatus, ( unsigned int ) pxNextTCB->uxPriority, usStackRemaining, ( unsigned int ) pxNextTCB->uxTCBNumber ); - strcat( ( portCHAR * ) pcWriteBuffer, ( portCHAR * ) pcStatusString ); - - } while( pxNextTCB != pxFirstTCB ); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - unsigned portSHORT usTaskCheckFreeStackSpace( const unsigned portCHAR *pucStackByte ) - { - register unsigned portSHORT usCount = 0; - - while( *pucStackByte == tskSTACK_FILL_BYTE ) - { - pucStackByte -= portSTACK_GROWTH; - usCount++; - } - - usCount /= sizeof( portSTACK_TYPE ); - - return usCount; - } -#endif -/*-----------------------------------------------------------*/ - - - -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - - static void prvDeleteTCB( tskTCB *pxTCB ) - { - /* Free up the memory allocated by the scheduler for the task. It is up to - the task to free any memory allocated at the application level. */ - vPortFree( pxTCB->pxStack ); - vPortFree( pxTCB ); - } - -#endif - - -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) - - xTaskHandle xTaskGetCurrentTaskHandle( void ) - { - xTaskHandle xReturn; - - portENTER_CRITICAL(); - { - xReturn = ( xTaskHandle ) pxCurrentTCB; - } - portEXIT_CRITICAL(); - - return xReturn; - } - -#endif - -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) - - portBASE_TYPE xTaskGetSchedulerState( void ) - { - portBASE_TYPE xReturn; - - if( xSchedulerRunning == pdFALSE ) - { - xReturn = taskSCHEDULER_NOT_STARTED; - } - else - { - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - xReturn = taskSCHEDULER_RUNNING; - } - else - { - xReturn = taskSCHEDULER_SUSPENDED; - } - } - - return xReturn; - } - -#endif - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOSConfig.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOSConfig.h deleted file mode 100644 index fecd8241..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/FreeRTOSConfig.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * MODBUS Slave Library: A portable MODBUS slave for MODBUS ASCII/RTU/TCP. - * Copyright (c) 2007 Christian Walter - * All rights reserved. - * - * $Id$ - */ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/* ----------------------- Defines ------------------------------------------*/ - -#define vPortYieldProcessor swi_handler - -#define configUSE_PREEMPTION ( 1 ) -#define configUSE_IDLE_HOOK ( 0 ) -#define configUSE_TICK_HOOK ( 1 ) -#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 48054857UL ) -#define configTICK_RATE_HZ ( ( portTickType ) 1000 ) -#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 128 ) -#define configTOTAL_HEAP_SIZE ( ( size_t ) 2048 ) -#define configMAX_TASK_NAME_LEN ( 16 ) -#define configUSE_TRACE_FACILITY ( 1 ) -#define configUSE_16_BIT_TICKS ( 0 ) -#define configIDLE_SHOULD_YIELD ( 1 ) -#define configUSE_CO_ROUTINES ( 0 ) -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) - -#define INCLUDE_vTaskPrioritySet ( 1 ) -#define INCLUDE_uxTaskPriorityGet ( 1 ) -#define INCLUDE_vTaskDelete ( 1 ) -#define INCLUDE_vTaskCleanUpResources ( 0 ) -#define INCLUDE_vTaskSuspend ( 1 ) -#define INCLUDE_vTaskDelayUntil ( 1 ) -#define INCLUDE_vTaskDelay ( 1 ) -#define INCLUDE_xTaskGetCurrentTaskHandle ( 1 ) - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/demo.c deleted file mode 100644 index e2fd1e61..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/demo.c +++ /dev/null @@ -1,187 +0,0 @@ -/* - * FreeModbus Libary: ARM7 Demo Application - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "support/AT91SAM7X256.h" -#include "support/lib_AT91SAM7X256.h" - -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_HOLDING_START 0x1000 -#define REG_HOLDING_NREGS 130 -#define REG_INPUT_START 0x1000 -#define REG_INPUT_NREGS 4 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegHoldingStart = REG_HOLDING_START; -static USHORT usRegHoldingBuf[REG_HOLDING_NREGS]; -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; - -/* ----------------------- Static functions ---------------------------------*/ -STATIC void vModbusTask( void *pvParameters ); -STATIC void vSetupHardware( void ); - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - vSetupHardware( ); - - ( void )xTaskCreate( vModbusTask, NULL, configMINIMAL_STACK_SIZE, NULL, - tskIDLE_PRIORITY, NULL ); - - vTaskStartScheduler( ); - return 0; -} - -static void -vModbusTask( void *pvParameters ) -{ - int i; - - /* Select either ASCII or RTU Mode. */ - ( void )eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); - - /* Initialize the holding register values before starting the - * Modbus stack - */ - for( i = 0; i < REG_HOLDING_NREGS; i++ ) - { - usRegHoldingBuf[i] = ( unsigned short )i; - } - /* Initialize the input register values before starting the - * Modbus stack - */ - for( i = 0; i < REG_INPUT_NREGS; i++ ) - { - usRegInputBuf[i] = ( unsigned short )i; - } - - /* Enable the Modbus Protocol Stack. */ - ( void )eMBEnable( ); - for( ;; ) - { - /* Call the main polling loop of the Modbus protocol stack. */ - ( void )eMBPoll( ); - } -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_HOLDING_START ) && - ( usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegHoldingStart ); - switch ( eMode ) - { - /* Pass current register values to the protocol stack. */ - case MB_REG_READ: - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegHoldingBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegHoldingBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - break; - - /* Update current register values with new values from the - * protocol stack. */ - case MB_REG_WRITE: - while( usNRegs > 0 ) - { - usRegHoldingBuf[iRegIndex] = *pucRegBuffer++ << 8; - usRegHoldingBuf[iRegIndex] |= *pucRegBuffer++; - iRegIndex++; - usNRegs--; - } - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} - - -void -vSetupHardware( void ) -{ - vMBPInit( ); - - /* Enable the peripheral clock. */ - AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOA; - AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOB; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/demo.hzp b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/demo.hzp deleted file mode 100644 index 6711ff76..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/demo.hzp +++ /dev/null @@ -1,115 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/demo.hzs b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/demo.hzs deleted file mode 100644 index b3e86b6e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/demo.hzs +++ /dev/null @@ -1,105 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/port.h deleted file mode 100644 index 636c923f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/port.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * FreeModbus Libary: ARM7/AT91SAM7X Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -#include -#include - -#include "FreeRTOS.h" - -#ifdef _cplusplus -extern "C" -{ -#endif - -/* ----------------------- Defines ------------------------------------------*/ - -#define INLINE inline -#define STATIC static - -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#define MB_PORT_HAS_CLOSE 1 -#define ENTER_CRITICAL_SECTION( ) vMBPPortEnterCritical( ) -#define EXIT_CRITICAL_SECTION( ) vMBPPortExitCritical( ) - -#ifndef TRUE -#define TRUE ( BOOL )1 -#endif - -#ifndef FALSE -#define FALSE ( BOOL )0 -#endif - -/* ----------------------- Type definitions ---------------------------------*/ - typedef char BOOL; - - typedef signed char BYTE; - typedef unsigned char UBYTE; - - typedef unsigned char UCHAR; - typedef char CHAR; - - typedef unsigned short USHORT; - typedef short SHORT; - - typedef unsigned long ULONG; - typedef long LONG; - -/* ----------------------- Function prototypes ------------------------------*/ - BOOL bMBPIsWithinException( void ); - void vMBPInit( void ); - void vMBPPortEnterCritical( void ); - void vMBPPortExitCritical( void ); - -#ifdef _cplusplus -} -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/portevent.c deleted file mode 100644 index ebbde2ea..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/portevent.c +++ /dev/null @@ -1,123 +0,0 @@ -/* - * FreeModbus Libary: ARM7/AT91SAM7X Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ -/* ----------------------- System includes ----------------------------------*/ -#include - -/* ----------------------- Platform includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define HDL_RESET( x ) do { \ - ( x )->xQueueHdl = 0; \ -} while( 0 ); - -/* ----------------------- Type definitions ---------------------------------*/ -typedef struct -{ - xQueueHandle xQueueHdl; -} xEventInternalHandle; - -/* ----------------------- Static variables ---------------------------------*/ -STATIC BOOL bIsInitialized = FALSE; -STATIC xEventInternalHandle arxEventHdls[1]; - -/* ----------------------- Static functions ---------------------------------*/ - -/* ----------------------- Start implementation -----------------------------*/ - -BOOL -xMBPortEventInit( void ) -{ - BOOL bOkay = FALSE; - xQueueHandle xQueueHdl; - - ENTER_CRITICAL_SECTION( ); - xQueueHdl = xQueueCreate( 1, sizeof( eMBEventType ) ); - if( 0 != xQueueHdl ) - { - arxEventHdls[0].xQueueHdl = xQueueHdl; - bIsInitialized = TRUE; - bOkay = TRUE; - } - EXIT_CRITICAL_SECTION( ); - - return bOkay; -} - -void -vMBPortEventClose( ) -{ - ENTER_CRITICAL_SECTION( ); - if( bIsInitialized ) - { - if( 0 != arxEventHdls[0].xQueueHdl ) - { - vQueueDelete( arxEventHdls[0].xQueueHdl ); - } - HDL_RESET( &arxEventHdls[0] ); - } - EXIT_CRITICAL_SECTION( ); -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - portBASE_TYPE xEventSent = pdFALSE; - - ENTER_CRITICAL_SECTION( ); - if( bIsInitialized ) - { - if( bMBPIsWithinException( ) ) - { - xEventSent = - xQueueSendFromISR( arxEventHdls[0].xQueueHdl, ( const void * )&eEvent, pdFALSE ); - } - else - { - xEventSent = xQueueSend( arxEventHdls[0].xQueueHdl, ( const void * )&eEvent, pdFALSE ); - } - } - EXIT_CRITICAL_SECTION( ); - return xEventSent == pdTRUE ? TRUE : FALSE; -} - -BOOL -xMBPortEventGet( eMBEventType * peEvent ) -{ - BOOL bEventInQueue = FALSE; - - ENTER_CRITICAL_SECTION( ); - if( bIsInitialized ) - { - if( pdTRUE == xQueueReceive( arxEventHdls[0].xQueueHdl, peEvent, portTICK_RATE_MS * 50 ) ) - { - bEventInQueue = TRUE; - } - } - EXIT_CRITICAL_SECTION( ); - return bEventInQueue; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/portother.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/portother.c deleted file mode 100644 index f881374e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/portother.c +++ /dev/null @@ -1,122 +0,0 @@ -/* - * FreeModbus Libary: ARM7/AT91SAM7X Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "AT91SAM7X256.h" -#include "lib_AT91SAM7X256.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "port.h" - -/* ----------------------- Defines ------------------------------------------*/ - -/* ----------------------- Type definitions ---------------------------------*/ - -/* ----------------------- Function prototypes ------------------------------*/ -void vMBPortSerialClose( void ); -void vMBPortEventClose( void ); -void vMBPortTimerClose( void ); - -/* ----------------------- Static variables ---------------------------------*/ - -/* ----------------------- Static functions ---------------------------------*/ -STATIC void vDefaultHandler( void ) __attribute__ ( ( interrupt( "IRQ" ) ) ); -STATIC void vDefaultSpuriousHandler( void ) __attribute__ ( ( interrupt( "IRQ" ) ) ); - -/* ----------------------- Start implementation -----------------------------*/ - -void -vMBPInit( void ) -{ - AT91F_AIC_Open( AT91C_BASE_AIC, AT91C_AIC_BRANCH_OPCODE, AT91C_AIC_BRANCH_OPCODE, - vDefaultHandler, vDefaultSpuriousHandler, AT91C_AIC_DCR_PROT ); -} - -void -__assert( const char *pcFile, const char *pcAssertion, int iLine ) -{ - volatile BOOL bBreakOut = FALSE; - - ( void )pcFile; - ( void )pcAssertion; - ( void )iLine; - ENTER_CRITICAL_SECTION( ); - while( !bBreakOut ); -} - -BOOL -bMBPIsWithinException( void ) -{ - BOOL bMBPIsWithinException = TRUE; - unsigned int uiCPSR; - asm volatile ( "MRS %0, CPSR":"=r" ( uiCPSR ): ); - - switch ( uiCPSR & 0x000000001F ) - { - case 0x00000010U: /* User Mode */ - case 0x0000001FU: /* System Mode */ - bMBPIsWithinException = FALSE; - break; - } - return bMBPIsWithinException; -} - -void -vMBPPortEnterCritical( void ) -{ - if( !bMBPIsWithinException( ) ) - { - portENTER_CRITICAL( ); - } -} - -void -vMBPPortExitCritical( void ) -{ - if( !bMBPIsWithinException( ) ) - { - portEXIT_CRITICAL( ); - } -} - -void -vMBPortClose( void ) -{ - vMBPortSerialClose( ); - vMBPortEventClose( ); - vMBPortTimerClose( ); -} - -void -vDefaultSpuriousHandler( void ) -{ -} - -void -vDefaultHandler( void ) -{ -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/portserial.c deleted file mode 100644 index d68d9add..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/portserial.c +++ /dev/null @@ -1,259 +0,0 @@ -/* - * FreeModbus Libary: ARM7/AT91SAM7X Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include -#include - -/* ----------------------- Platform includes --------------------------------*/ -#include "AT91SAM7X256.h" -#include "lib_AT91SAM7X256.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ - -#define USART_INTERRUPT_LEVEL ( 7 ) -#define USART_USART0_IDX ( 0 ) -#define USART_USART1_IDX ( 1 ) - -#define IDX_INVALID ( 255 ) -#define UART_BAUDRATE_MIN ( 300 ) -#define UART_BAUDRATE_MAX ( 115200 ) - -#define UART_INIT( ubIdx ) do { \ - if( AT91C_ID_US0 == ubIdx ) \ - { \ - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, AT91C_PA0_RXD0 | AT91C_PA1_TXD0 | AT91C_PA3_RTS0, 0 ); \ - } \ - else if( AT91C_ID_US1 == ubIdx ) \ - { \ - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, AT91C_PA5_RXD1 | AT91C_PA6_TXD1 | AT91C_PA8_RTS1, 0 ); \ - } \ - else \ - { \ - assert( 0 ); \ - } \ -} while( 0 ) - -#define HDL_RESET( x ) do { \ - ( x )->pxCOM = NULL; \ - ( x )->uiAT91C_ID_USX = 0; \ - ( x )->pvIRQHandlerFN = NULL; \ - ( x )->bIsRxEnabled = FALSE; \ - ( x )->bIsTxEnabled = FALSE; \ -} while( 0 ); - -/* ----------------------- Type definitions ---------------------------------*/ - -typedef struct -{ - AT91PS_USART pxCOM; - unsigned int uiAT91C_ID_USX; - volatile BOOL bIsRxEnabled; - volatile BOOL bIsTxEnabled; - void ( *pvIRQHandlerFN ) ( void ); -} xMBPSerialIntHandle; - -/* ----------------------- Static variables ---------------------------------*/ -STATIC xMBPSerialIntHandle xSerialHdls[1]; -STATIC BOOL bIsInitalized = FALSE; - -/* ----------------------- Static functions ---------------------------------*/ -STATIC void vUSART0ISR( void ) __attribute__ ( ( interrupt( "IRQ" ) ) ); -STATIC void vUSART1ISR( void ) __attribute__ ( ( interrupt( "IRQ" ) ) ); - -/* ----------------------- Start implementation -----------------------------*/ - -BOOL -xMBPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - BOOL bOkay = TRUE; - unsigned int uiUARTMode = 0; - - ENTER_CRITICAL_SECTION( ); - if( !bIsInitalized ) - { - HDL_RESET( &xSerialHdls[0] ); - bIsInitalized = TRUE; - } - - uiUARTMode = AT91C_US_USMODE_RS485 | AT91C_US_CLKS_CLOCK; - switch ( eParity ) - { - case MB_PAR_NONE: - uiUARTMode |= AT91C_US_PAR_NONE; - uiUARTMode |= AT91C_US_NBSTOP_2_BIT; - break; - case MB_PAR_EVEN: - uiUARTMode |= AT91C_US_PAR_EVEN; - uiUARTMode |= AT91C_US_NBSTOP_1_BIT; - break; - case MB_PAR_ODD: - uiUARTMode |= AT91C_US_PAR_ODD; - uiUARTMode |= AT91C_US_NBSTOP_1_BIT; - break; - default: - break; - } - switch ( ucDataBits ) - { - case 8: - uiUARTMode |= AT91C_US_CHRL_8_BITS; - break; - case 7: - uiUARTMode |= AT91C_US_CHRL_7_BITS; - break; - default: - break; - } - if( bOkay ) - { - if( ( ucPort == USART_USART0_IDX ) && ( NULL == xSerialHdls[0].pxCOM ) ) - { - xSerialHdls[0].pxCOM = AT91C_BASE_US0; - xSerialHdls[0].uiAT91C_ID_USX = AT91C_ID_US0; - xSerialHdls[0].pvIRQHandlerFN = vUSART0ISR; - } - else if( ( ucPort == USART_USART1_IDX ) && ( NULL == xSerialHdls[0].pxCOM ) ) - { - xSerialHdls[0].pxCOM = AT91C_BASE_US1; - xSerialHdls[0].uiAT91C_ID_USX = AT91C_ID_US1; - xSerialHdls[0].pvIRQHandlerFN = vUSART1ISR; - } - else - { - bOkay = FALSE; - } - - if( bOkay ) - { - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << xSerialHdls[0].uiAT91C_ID_USX ); - AT91F_US_Configure( xSerialHdls[0].pxCOM, configCPU_CLOCK_HZ, uiUARTMode, ulBaudRate, - 0 ); - xSerialHdls[0].pxCOM->US_CR = AT91C_US_TXEN | AT91C_US_RXEN; - AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, xSerialHdls[0].uiAT91C_ID_USX, - USART_INTERRUPT_LEVEL, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, - xSerialHdls[0].pvIRQHandlerFN ); - AT91F_AIC_EnableIt( AT91C_BASE_AIC, xSerialHdls[0].uiAT91C_ID_USX ); - UART_INIT( xSerialHdls[0].uiAT91C_ID_USX ); - } - } - else - { - bOkay = FALSE; - } - - EXIT_CRITICAL_SECTION( ); - return bOkay; -} - -void -vMBPortSerialClose( void ) -{ - if( bIsInitalized ) - { - if( NULL != xSerialHdls[0].pxCOM ) - { - AT91F_AIC_DisableIt( AT91C_BASE_AIC, xSerialHdls[0].uiAT91C_ID_USX ); - AT91F_US_Close( xSerialHdls[0].pxCOM ); - HDL_RESET( &xSerialHdls[0] ); - } - } -} - -void -vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ - ENTER_CRITICAL_SECTION( ); - assert( NULL != xSerialHdls[0].pxCOM ); - if( xRxEnable ) - { - AT91F_US_EnableIt( xSerialHdls[0].pxCOM, AT91C_US_RXRDY ); - xSerialHdls[0].bIsRxEnabled = TRUE; - } - else - { - AT91F_US_DisableIt( xSerialHdls[0].pxCOM, AT91C_US_RXRDY ); - xSerialHdls[0].bIsRxEnabled = FALSE; - } - - if( xTxEnable ) - { - AT91F_US_EnableIt( xSerialHdls[0].pxCOM, AT91C_US_TXRDY ); - xSerialHdls[0].bIsTxEnabled = TRUE; - } - else - { - AT91F_US_DisableIt( xSerialHdls[0].pxCOM, AT91C_US_TXRDY ); - xSerialHdls[0].bIsTxEnabled = FALSE; - } - EXIT_CRITICAL_SECTION( ); -} - -STATIC INLINE void -vUSARTIRQHandler( void ) -{ - unsigned int uiUSARTStatus = xSerialHdls[0].pxCOM->US_CSR; - - if( xSerialHdls[0].bIsRxEnabled && ( uiUSARTStatus & AT91C_US_RXRDY ) ) - { - pxMBFrameCBByteReceived( ); - } - if( xSerialHdls[0].bIsTxEnabled && ( uiUSARTStatus & AT91C_US_TXRDY ) ) - { - pxMBFrameCBTransmitterEmpty( ); - } -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - assert( NULL != xSerialHdls[0].pxCOM ); - AT91F_US_PutChar( xSerialHdls[0].pxCOM, ucByte ); - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - assert( NULL != xSerialHdls[0].pxCOM ); - *pucByte = ( CHAR ) AT91F_US_GetChar( xSerialHdls[0].pxCOM ); - return TRUE; -} - -void -vUSART0ISR( void ) -{ - assert( NULL != xSerialHdls[0].pxCOM ); - vUSARTIRQHandler( ); - AT91C_BASE_AIC->AIC_EOICR = 0; -} - -void -vUSART1ISR( void ) -{ - assert( NULL != xSerialHdls[0].pxCOM ); - vUSARTIRQHandler( ); - AT91C_BASE_AIC->AIC_EOICR = 0; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/porttimer.c deleted file mode 100644 index 9f266043..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/port/porttimer.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * MODBUS Library: AT91SAM7X/FreeRTOS port - * Copyright (c) 2007 Christian Walter - * All rights reserved. - * - * $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include - -/* ----------------------- FreeRTOS includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define TIMER_TIMEOUT_INVALID ( 65535U ) - -/* ----------------------- Type definitions ---------------------------------*/ -typedef struct -{ - volatile USHORT usNTimeOutMS; - volatile USHORT usNTimeLeft; -} xTimerInternalHandle; - -/* ----------------------- Static variables ---------------------------------*/ -STATIC xTimerInternalHandle arxTimerHdls[1]; -STATIC BOOL bIsInitalized = FALSE; - -/* ----------------------- Static functions ---------------------------------*/ - -/* ----------------------- Start implementation -----------------------------*/ - -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ - USHORT usTimeoutMS; - - ENTER_CRITICAL_SECTION( ); - usTimeoutMS = ( usTim1Timerout50us + 10 ) / 20; - if( 0 == usTimeoutMS ) - { - usTimeoutMS = 1; - } - arxTimerHdls[0].usNTimeOutMS = usTimeoutMS; - arxTimerHdls[0].usNTimeLeft = TIMER_TIMEOUT_INVALID; - bIsInitalized = TRUE; - EXIT_CRITICAL_SECTION( ); - - return TRUE; -} - -void -vMBPortTimerClose( void ) -{ - ENTER_CRITICAL_SECTION( ); - if( bIsInitalized ) - { - arxTimerHdls[0].usNTimeLeft = TIMER_TIMEOUT_INVALID; - bIsInitalized = FALSE; - } - EXIT_CRITICAL_SECTION( ); -} - -void -vMBPortTimersEnable( ) -{ - assert( bIsInitalized ); - ENTER_CRITICAL_SECTION( ); - arxTimerHdls[0].usNTimeLeft = arxTimerHdls[0].usNTimeOutMS; - EXIT_CRITICAL_SECTION( ); -} - -void -vMBPortTimersDisable( ) -{ - assert( bIsInitalized ); - ENTER_CRITICAL_SECTION( ); - arxTimerHdls[0].usNTimeLeft = TIMER_TIMEOUT_INVALID; - EXIT_CRITICAL_SECTION( ); -} - -void -vApplicationTickHook( void ) -{ - if( bIsInitalized ) - { - if( TIMER_TIMEOUT_INVALID != arxTimerHdls[0].usNTimeLeft ) - { - arxTimerHdls[0].usNTimeLeft--; - if( 0 == arxTimerHdls[0].usNTimeLeft ) - { - arxTimerHdls[0].usNTimeLeft = TIMER_TIMEOUT_INVALID; - pxMBPortCBTimerExpired( ); - } - } - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/support/AT91SAM7X256.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/support/AT91SAM7X256.h deleted file mode 100644 index 032a97e5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/support/AT91SAM7X256.h +++ /dev/null @@ -1,2551 +0,0 @@ -// ---------------------------------------------------------------------------- -// ATMEL Microcontroller Software Support - ROUSSET - -// ---------------------------------------------------------------------------- -// DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR -// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE -// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, -// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, -// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// ---------------------------------------------------------------------------- -// File Name : AT91SAM7X256.h -// Object : AT91SAM7X256 definitions -// Generated : AT91 SW Application Group 01/16/2006 (16:36:21) -// -// CVS Reference : /AT91SAM7X256.pl/1.15/Wed Nov 2 13:56:49 2005// -// CVS Reference : /SYS_SAM7X.pl/1.3/Tue Feb 1 17:01:43 2005// -// CVS Reference : /MC_SAM7X.pl/1.2/Fri May 20 14:13:04 2005// -// CVS Reference : /PMC_SAM7X.pl/1.4/Tue Feb 8 13:58:10 2005// -// CVS Reference : /RSTC_SAM7X.pl/1.2/Wed Jul 13 14:57:50 2005// -// CVS Reference : /UDP_SAM7X.pl/1.1/Tue May 10 11:35:35 2005// -// CVS Reference : /PWM_SAM7X.pl/1.1/Tue May 10 11:53:07 2005// -// CVS Reference : /AIC_6075B.pl/1.3/Fri May 20 14:01:30 2005// -// CVS Reference : /PIO_6057A.pl/1.2/Thu Feb 3 10:18:28 2005// -// CVS Reference : /RTTC_6081A.pl/1.2/Tue Nov 9 14:43:58 2004// -// CVS Reference : /PITC_6079A.pl/1.2/Tue Nov 9 14:43:56 2004// -// CVS Reference : /WDTC_6080A.pl/1.3/Tue Nov 9 14:44:00 2004// -// CVS Reference : /VREG_6085B.pl/1.1/Tue Feb 1 16:05:48 2005// -// CVS Reference : /PDC_6074C.pl/1.2/Thu Feb 3 08:48:54 2005// -// CVS Reference : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005// -// CVS Reference : /SPI_6088D.pl/1.3/Fri May 20 14:08:59 2005// -// CVS Reference : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004// -// CVS Reference : /SSC_6078B.pl/1.1/Wed Jul 13 15:19:19 2005// -// CVS Reference : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004// -// CVS Reference : /TC_6082A.pl/1.7/Fri Mar 11 12:52:17 2005// -// CVS Reference : /CAN_6019B.pl/1.1/Tue Mar 8 12:42:22 2005// -// CVS Reference : /EMACB_6119A.pl/1.6/Wed Jul 13 15:05:35 2005// -// CVS Reference : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003// -// ---------------------------------------------------------------------------- - -#ifndef AT91SAM7X256_H -#define AT91SAM7X256_H - -typedef volatile unsigned int AT91_REG; // Hardware register definition - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR System Peripherals -// ***************************************************************************** -typedef struct _AT91S_SYS -{ - AT91_REG AIC_SMR[32]; // Source Mode Register - AT91_REG AIC_SVR[32]; // Source Vector Register - AT91_REG AIC_IVR; // IRQ Vector Register - AT91_REG AIC_FVR; // FIQ Vector Register - AT91_REG AIC_ISR; // Interrupt Status Register - AT91_REG AIC_IPR; // Interrupt Pending Register - AT91_REG AIC_IMR; // Interrupt Mask Register - AT91_REG AIC_CISR; // Core Interrupt Status Register - AT91_REG Reserved0[2]; // - AT91_REG AIC_IECR; // Interrupt Enable Command Register - AT91_REG AIC_IDCR; // Interrupt Disable Command Register - AT91_REG AIC_ICCR; // Interrupt Clear Command Register - AT91_REG AIC_ISCR; // Interrupt Set Command Register - AT91_REG AIC_EOICR; // End of Interrupt Command Register - AT91_REG AIC_SPU; // Spurious Vector Register - AT91_REG AIC_DCR; // Debug Control Register (Protect) - AT91_REG Reserved1[1]; // - AT91_REG AIC_FFER; // Fast Forcing Enable Register - AT91_REG AIC_FFDR; // Fast Forcing Disable Register - AT91_REG AIC_FFSR; // Fast Forcing Status Register - AT91_REG Reserved2[45]; // - AT91_REG DBGU_CR; // Control Register - AT91_REG DBGU_MR; // Mode Register - AT91_REG DBGU_IER; // Interrupt Enable Register - AT91_REG DBGU_IDR; // Interrupt Disable Register - AT91_REG DBGU_IMR; // Interrupt Mask Register - AT91_REG DBGU_CSR; // Channel Status Register - AT91_REG DBGU_RHR; // Receiver Holding Register - AT91_REG DBGU_THR; // Transmitter Holding Register - AT91_REG DBGU_BRGR; // Baud Rate Generator Register - AT91_REG Reserved3[7]; // - AT91_REG DBGU_CIDR; // Chip ID Register - AT91_REG DBGU_EXID; // Chip ID Extension Register - AT91_REG DBGU_FNTR; // Force NTRST Register - AT91_REG Reserved4[45]; // - AT91_REG DBGU_RPR; // Receive Pointer Register - AT91_REG DBGU_RCR; // Receive Counter Register - AT91_REG DBGU_TPR; // Transmit Pointer Register - AT91_REG DBGU_TCR; // Transmit Counter Register - AT91_REG DBGU_RNPR; // Receive Next Pointer Register - AT91_REG DBGU_RNCR; // Receive Next Counter Register - AT91_REG DBGU_TNPR; // Transmit Next Pointer Register - AT91_REG DBGU_TNCR; // Transmit Next Counter Register - AT91_REG DBGU_PTCR; // PDC Transfer Control Register - AT91_REG DBGU_PTSR; // PDC Transfer Status Register - AT91_REG Reserved5[54]; // - AT91_REG PIOA_PER; // PIO Enable Register - AT91_REG PIOA_PDR; // PIO Disable Register - AT91_REG PIOA_PSR; // PIO Status Register - AT91_REG Reserved6[1]; // - AT91_REG PIOA_OER; // Output Enable Register - AT91_REG PIOA_ODR; // Output Disable Registerr - AT91_REG PIOA_OSR; // Output Status Register - AT91_REG Reserved7[1]; // - AT91_REG PIOA_IFER; // Input Filter Enable Register - AT91_REG PIOA_IFDR; // Input Filter Disable Register - AT91_REG PIOA_IFSR; // Input Filter Status Register - AT91_REG Reserved8[1]; // - AT91_REG PIOA_SODR; // Set Output Data Register - AT91_REG PIOA_CODR; // Clear Output Data Register - AT91_REG PIOA_ODSR; // Output Data Status Register - AT91_REG PIOA_PDSR; // Pin Data Status Register - AT91_REG PIOA_IER; // Interrupt Enable Register - AT91_REG PIOA_IDR; // Interrupt Disable Register - AT91_REG PIOA_IMR; // Interrupt Mask Register - AT91_REG PIOA_ISR; // Interrupt Status Register - AT91_REG PIOA_MDER; // Multi-driver Enable Register - AT91_REG PIOA_MDDR; // Multi-driver Disable Register - AT91_REG PIOA_MDSR; // Multi-driver Status Register - AT91_REG Reserved9[1]; // - AT91_REG PIOA_PPUDR; // Pull-up Disable Register - AT91_REG PIOA_PPUER; // Pull-up Enable Register - AT91_REG PIOA_PPUSR; // Pull-up Status Register - AT91_REG Reserved10[1]; // - AT91_REG PIOA_ASR; // Select A Register - AT91_REG PIOA_BSR; // Select B Register - AT91_REG PIOA_ABSR; // AB Select Status Register - AT91_REG Reserved11[9]; // - AT91_REG PIOA_OWER; // Output Write Enable Register - AT91_REG PIOA_OWDR; // Output Write Disable Register - AT91_REG PIOA_OWSR; // Output Write Status Register - AT91_REG Reserved12[85]; // - AT91_REG PIOB_PER; // PIO Enable Register - AT91_REG PIOB_PDR; // PIO Disable Register - AT91_REG PIOB_PSR; // PIO Status Register - AT91_REG Reserved13[1]; // - AT91_REG PIOB_OER; // Output Enable Register - AT91_REG PIOB_ODR; // Output Disable Registerr - AT91_REG PIOB_OSR; // Output Status Register - AT91_REG Reserved14[1]; // - AT91_REG PIOB_IFER; // Input Filter Enable Register - AT91_REG PIOB_IFDR; // Input Filter Disable Register - AT91_REG PIOB_IFSR; // Input Filter Status Register - AT91_REG Reserved15[1]; // - AT91_REG PIOB_SODR; // Set Output Data Register - AT91_REG PIOB_CODR; // Clear Output Data Register - AT91_REG PIOB_ODSR; // Output Data Status Register - AT91_REG PIOB_PDSR; // Pin Data Status Register - AT91_REG PIOB_IER; // Interrupt Enable Register - AT91_REG PIOB_IDR; // Interrupt Disable Register - AT91_REG PIOB_IMR; // Interrupt Mask Register - AT91_REG PIOB_ISR; // Interrupt Status Register - AT91_REG PIOB_MDER; // Multi-driver Enable Register - AT91_REG PIOB_MDDR; // Multi-driver Disable Register - AT91_REG PIOB_MDSR; // Multi-driver Status Register - AT91_REG Reserved16[1]; // - AT91_REG PIOB_PPUDR; // Pull-up Disable Register - AT91_REG PIOB_PPUER; // Pull-up Enable Register - AT91_REG PIOB_PPUSR; // Pull-up Status Register - AT91_REG Reserved17[1]; // - AT91_REG PIOB_ASR; // Select A Register - AT91_REG PIOB_BSR; // Select B Register - AT91_REG PIOB_ABSR; // AB Select Status Register - AT91_REG Reserved18[9]; // - AT91_REG PIOB_OWER; // Output Write Enable Register - AT91_REG PIOB_OWDR; // Output Write Disable Register - AT91_REG PIOB_OWSR; // Output Write Status Register - AT91_REG Reserved19[341]; // - AT91_REG PMC_SCER; // System Clock Enable Register - AT91_REG PMC_SCDR; // System Clock Disable Register - AT91_REG PMC_SCSR; // System Clock Status Register - AT91_REG Reserved20[1]; // - AT91_REG PMC_PCER; // Peripheral Clock Enable Register - AT91_REG PMC_PCDR; // Peripheral Clock Disable Register - AT91_REG PMC_PCSR; // Peripheral Clock Status Register - AT91_REG Reserved21[1]; // - AT91_REG PMC_MOR; // Main Oscillator Register - AT91_REG PMC_MCFR; // Main Clock Frequency Register - AT91_REG Reserved22[1]; // - AT91_REG PMC_PLLR; // PLL Register - AT91_REG PMC_MCKR; // Master Clock Register - AT91_REG Reserved23[3]; // - AT91_REG PMC_PCKR[4]; // Programmable Clock Register - AT91_REG Reserved24[4]; // - AT91_REG PMC_IER; // Interrupt Enable Register - AT91_REG PMC_IDR; // Interrupt Disable Register - AT91_REG PMC_SR; // Status Register - AT91_REG PMC_IMR; // Interrupt Mask Register - AT91_REG Reserved25[36]; // - AT91_REG RSTC_RCR; // Reset Control Register - AT91_REG RSTC_RSR; // Reset Status Register - AT91_REG RSTC_RMR; // Reset Mode Register - AT91_REG Reserved26[5]; // - AT91_REG RTTC_RTMR; // Real-time Mode Register - AT91_REG RTTC_RTAR; // Real-time Alarm Register - AT91_REG RTTC_RTVR; // Real-time Value Register - AT91_REG RTTC_RTSR; // Real-time Status Register - AT91_REG PITC_PIMR; // Period Interval Mode Register - AT91_REG PITC_PISR; // Period Interval Status Register - AT91_REG PITC_PIVR; // Period Interval Value Register - AT91_REG PITC_PIIR; // Period Interval Image Register - AT91_REG WDTC_WDCR; // Watchdog Control Register - AT91_REG WDTC_WDMR; // Watchdog Mode Register - AT91_REG WDTC_WDSR; // Watchdog Status Register - AT91_REG Reserved27[5]; // - AT91_REG VREG_MR; // Voltage Regulator Mode Register -} AT91S_SYS , *AT91PS_SYS; - - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Advanced Interrupt Controller -// ***************************************************************************** -typedef struct _AT91S_AIC -{ - AT91_REG AIC_SMR[32]; // Source Mode Register - AT91_REG AIC_SVR[32]; // Source Vector Register - AT91_REG AIC_IVR; // IRQ Vector Register - AT91_REG AIC_FVR; // FIQ Vector Register - AT91_REG AIC_ISR; // Interrupt Status Register - AT91_REG AIC_IPR; // Interrupt Pending Register - AT91_REG AIC_IMR; // Interrupt Mask Register - AT91_REG AIC_CISR; // Core Interrupt Status Register - AT91_REG Reserved0[2]; // - AT91_REG AIC_IECR; // Interrupt Enable Command Register - AT91_REG AIC_IDCR; // Interrupt Disable Command Register - AT91_REG AIC_ICCR; // Interrupt Clear Command Register - AT91_REG AIC_ISCR; // Interrupt Set Command Register - AT91_REG AIC_EOICR; // End of Interrupt Command Register - AT91_REG AIC_SPU; // Spurious Vector Register - AT91_REG AIC_DCR; // Debug Control Register (Protect) - AT91_REG Reserved1[1]; // - AT91_REG AIC_FFER; // Fast Forcing Enable Register - AT91_REG AIC_FFDR; // Fast Forcing Disable Register - AT91_REG AIC_FFSR; // Fast Forcing Status Register -} AT91S_AIC , *AT91PS_AIC; - -// -------- AIC_SMR : (AIC Offset: 0x0) Control Register -------- -#define AT91C_AIC_PRIOR ((unsigned int) 0x7 << 0) // (AIC) Priority Level -#define AT91C_AIC_PRIOR_LOWEST ((unsigned int) 0x0) // (AIC) Lowest priority level -#define AT91C_AIC_PRIOR_HIGHEST ((unsigned int) 0x7) // (AIC) Highest priority level -#define AT91C_AIC_SRCTYPE ((unsigned int) 0x3 << 5) // (AIC) Interrupt Source Type -#define AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL ((unsigned int) 0x0 << 5) // (AIC) External Sources Code Label Low-level Sensitive -#define AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL ((unsigned int) 0x0 << 5) // (AIC) Internal Sources Code Label High-level Sensitive -#define AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE ((unsigned int) 0x1 << 5) // (AIC) Internal Sources Code Label Positive Edge triggered -#define AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE ((unsigned int) 0x1 << 5) // (AIC) External Sources Code Label Negative Edge triggered -#define AT91C_AIC_SRCTYPE_HIGH_LEVEL ((unsigned int) 0x2 << 5) // (AIC) Internal Or External Sources Code Label High-level Sensitive -#define AT91C_AIC_SRCTYPE_POSITIVE_EDGE ((unsigned int) 0x3 << 5) // (AIC) Internal Or External Sources Code Label Positive Edge triggered -// -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register -------- -#define AT91C_AIC_NFIQ ((unsigned int) 0x1 << 0) // (AIC) NFIQ Status -#define AT91C_AIC_NIRQ ((unsigned int) 0x1 << 1) // (AIC) NIRQ Status -// -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) -------- -#define AT91C_AIC_DCR_PROT ((unsigned int) 0x1 << 0) // (AIC) Protection Mode -#define AT91C_AIC_DCR_GMSK ((unsigned int) 0x1 << 1) // (AIC) General Mask - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Peripheral DMA Controller -// ***************************************************************************** -typedef struct _AT91S_PDC -{ - AT91_REG PDC_RPR; // Receive Pointer Register - AT91_REG PDC_RCR; // Receive Counter Register - AT91_REG PDC_TPR; // Transmit Pointer Register - AT91_REG PDC_TCR; // Transmit Counter Register - AT91_REG PDC_RNPR; // Receive Next Pointer Register - AT91_REG PDC_RNCR; // Receive Next Counter Register - AT91_REG PDC_TNPR; // Transmit Next Pointer Register - AT91_REG PDC_TNCR; // Transmit Next Counter Register - AT91_REG PDC_PTCR; // PDC Transfer Control Register - AT91_REG PDC_PTSR; // PDC Transfer Status Register -} AT91S_PDC , *AT91PS_PDC; - -// -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register -------- -#define AT91C_PDC_RXTEN ((unsigned int) 0x1 << 0) // (PDC) Receiver Transfer Enable -#define AT91C_PDC_RXTDIS ((unsigned int) 0x1 << 1) // (PDC) Receiver Transfer Disable -#define AT91C_PDC_TXTEN ((unsigned int) 0x1 << 8) // (PDC) Transmitter Transfer Enable -#define AT91C_PDC_TXTDIS ((unsigned int) 0x1 << 9) // (PDC) Transmitter Transfer Disable -// -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register -------- - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Debug Unit -// ***************************************************************************** -typedef struct _AT91S_DBGU -{ - AT91_REG DBGU_CR; // Control Register - AT91_REG DBGU_MR; // Mode Register - AT91_REG DBGU_IER; // Interrupt Enable Register - AT91_REG DBGU_IDR; // Interrupt Disable Register - AT91_REG DBGU_IMR; // Interrupt Mask Register - AT91_REG DBGU_CSR; // Channel Status Register - AT91_REG DBGU_RHR; // Receiver Holding Register - AT91_REG DBGU_THR; // Transmitter Holding Register - AT91_REG DBGU_BRGR; // Baud Rate Generator Register - AT91_REG Reserved0[7]; // - AT91_REG DBGU_CIDR; // Chip ID Register - AT91_REG DBGU_EXID; // Chip ID Extension Register - AT91_REG DBGU_FNTR; // Force NTRST Register - AT91_REG Reserved1[45]; // - AT91_REG DBGU_RPR; // Receive Pointer Register - AT91_REG DBGU_RCR; // Receive Counter Register - AT91_REG DBGU_TPR; // Transmit Pointer Register - AT91_REG DBGU_TCR; // Transmit Counter Register - AT91_REG DBGU_RNPR; // Receive Next Pointer Register - AT91_REG DBGU_RNCR; // Receive Next Counter Register - AT91_REG DBGU_TNPR; // Transmit Next Pointer Register - AT91_REG DBGU_TNCR; // Transmit Next Counter Register - AT91_REG DBGU_PTCR; // PDC Transfer Control Register - AT91_REG DBGU_PTSR; // PDC Transfer Status Register -} AT91S_DBGU , *AT91PS_DBGU; - -// -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register -------- -#define AT91C_US_RSTRX ((unsigned int) 0x1 << 2) // (DBGU) Reset Receiver -#define AT91C_US_RSTTX ((unsigned int) 0x1 << 3) // (DBGU) Reset Transmitter -#define AT91C_US_RXEN ((unsigned int) 0x1 << 4) // (DBGU) Receiver Enable -#define AT91C_US_RXDIS ((unsigned int) 0x1 << 5) // (DBGU) Receiver Disable -#define AT91C_US_TXEN ((unsigned int) 0x1 << 6) // (DBGU) Transmitter Enable -#define AT91C_US_TXDIS ((unsigned int) 0x1 << 7) // (DBGU) Transmitter Disable -#define AT91C_US_RSTSTA ((unsigned int) 0x1 << 8) // (DBGU) Reset Status Bits -// -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register -------- -#define AT91C_US_PAR ((unsigned int) 0x7 << 9) // (DBGU) Parity type -#define AT91C_US_PAR_EVEN ((unsigned int) 0x0 << 9) // (DBGU) Even Parity -#define AT91C_US_PAR_ODD ((unsigned int) 0x1 << 9) // (DBGU) Odd Parity -#define AT91C_US_PAR_SPACE ((unsigned int) 0x2 << 9) // (DBGU) Parity forced to 0 (Space) -#define AT91C_US_PAR_MARK ((unsigned int) 0x3 << 9) // (DBGU) Parity forced to 1 (Mark) -#define AT91C_US_PAR_NONE ((unsigned int) 0x4 << 9) // (DBGU) No Parity -#define AT91C_US_PAR_MULTI_DROP ((unsigned int) 0x6 << 9) // (DBGU) Multi-drop mode -#define AT91C_US_CHMODE ((unsigned int) 0x3 << 14) // (DBGU) Channel Mode -#define AT91C_US_CHMODE_NORMAL ((unsigned int) 0x0 << 14) // (DBGU) Normal Mode: The USART channel operates as an RX/TX USART. -#define AT91C_US_CHMODE_AUTO ((unsigned int) 0x1 << 14) // (DBGU) Automatic Echo: Receiver Data Input is connected to the TXD pin. -#define AT91C_US_CHMODE_LOCAL ((unsigned int) 0x2 << 14) // (DBGU) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal. -#define AT91C_US_CHMODE_REMOTE ((unsigned int) 0x3 << 14) // (DBGU) Remote Loopback: RXD pin is internally connected to TXD pin. -// -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register -------- -#define AT91C_US_RXRDY ((unsigned int) 0x1 << 0) // (DBGU) RXRDY Interrupt -#define AT91C_US_TXRDY ((unsigned int) 0x1 << 1) // (DBGU) TXRDY Interrupt -#define AT91C_US_ENDRX ((unsigned int) 0x1 << 3) // (DBGU) End of Receive Transfer Interrupt -#define AT91C_US_ENDTX ((unsigned int) 0x1 << 4) // (DBGU) End of Transmit Interrupt -#define AT91C_US_OVRE ((unsigned int) 0x1 << 5) // (DBGU) Overrun Interrupt -#define AT91C_US_FRAME ((unsigned int) 0x1 << 6) // (DBGU) Framing Error Interrupt -#define AT91C_US_PARE ((unsigned int) 0x1 << 7) // (DBGU) Parity Error Interrupt -#define AT91C_US_TXEMPTY ((unsigned int) 0x1 << 9) // (DBGU) TXEMPTY Interrupt -#define AT91C_US_TXBUFE ((unsigned int) 0x1 << 11) // (DBGU) TXBUFE Interrupt -#define AT91C_US_RXBUFF ((unsigned int) 0x1 << 12) // (DBGU) RXBUFF Interrupt -#define AT91C_US_COMM_TX ((unsigned int) 0x1 << 30) // (DBGU) COMM_TX Interrupt -#define AT91C_US_COMM_RX ((unsigned int) 0x1 << 31) // (DBGU) COMM_RX Interrupt -// -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register -------- -// -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register -------- -// -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register -------- -// -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register -------- -#define AT91C_US_FORCE_NTRST ((unsigned int) 0x1 << 0) // (DBGU) Force NTRST in JTAG - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Parallel Input Output Controler -// ***************************************************************************** -typedef struct _AT91S_PIO -{ - AT91_REG PIO_PER; // PIO Enable Register - AT91_REG PIO_PDR; // PIO Disable Register - AT91_REG PIO_PSR; // PIO Status Register - AT91_REG Reserved0[1]; // - AT91_REG PIO_OER; // Output Enable Register - AT91_REG PIO_ODR; // Output Disable Registerr - AT91_REG PIO_OSR; // Output Status Register - AT91_REG Reserved1[1]; // - AT91_REG PIO_IFER; // Input Filter Enable Register - AT91_REG PIO_IFDR; // Input Filter Disable Register - AT91_REG PIO_IFSR; // Input Filter Status Register - AT91_REG Reserved2[1]; // - AT91_REG PIO_SODR; // Set Output Data Register - AT91_REG PIO_CODR; // Clear Output Data Register - AT91_REG PIO_ODSR; // Output Data Status Register - AT91_REG PIO_PDSR; // Pin Data Status Register - AT91_REG PIO_IER; // Interrupt Enable Register - AT91_REG PIO_IDR; // Interrupt Disable Register - AT91_REG PIO_IMR; // Interrupt Mask Register - AT91_REG PIO_ISR; // Interrupt Status Register - AT91_REG PIO_MDER; // Multi-driver Enable Register - AT91_REG PIO_MDDR; // Multi-driver Disable Register - AT91_REG PIO_MDSR; // Multi-driver Status Register - AT91_REG Reserved3[1]; // - AT91_REG PIO_PPUDR; // Pull-up Disable Register - AT91_REG PIO_PPUER; // Pull-up Enable Register - AT91_REG PIO_PPUSR; // Pull-up Status Register - AT91_REG Reserved4[1]; // - AT91_REG PIO_ASR; // Select A Register - AT91_REG PIO_BSR; // Select B Register - AT91_REG PIO_ABSR; // AB Select Status Register - AT91_REG Reserved5[9]; // - AT91_REG PIO_OWER; // Output Write Enable Register - AT91_REG PIO_OWDR; // Output Write Disable Register - AT91_REG PIO_OWSR; // Output Write Status Register -} AT91S_PIO , *AT91PS_PIO; - - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Clock Generator Controler -// ***************************************************************************** -typedef struct _AT91S_CKGR -{ - AT91_REG CKGR_MOR; // Main Oscillator Register - AT91_REG CKGR_MCFR; // Main Clock Frequency Register - AT91_REG Reserved0[1]; // - AT91_REG CKGR_PLLR; // PLL Register -} AT91S_CKGR , *AT91PS_CKGR; - -// -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register -------- -#define AT91C_CKGR_MOSCEN ((unsigned int) 0x1 << 0) // (CKGR) Main Oscillator Enable -#define AT91C_CKGR_OSCBYPASS ((unsigned int) 0x1 << 1) // (CKGR) Main Oscillator Bypass -#define AT91C_CKGR_OSCOUNT ((unsigned int) 0xFF << 8) // (CKGR) Main Oscillator Start-up Time -// -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register -------- -#define AT91C_CKGR_MAINF ((unsigned int) 0xFFFF << 0) // (CKGR) Main Clock Frequency -#define AT91C_CKGR_MAINRDY ((unsigned int) 0x1 << 16) // (CKGR) Main Clock Ready -// -------- CKGR_PLLR : (CKGR Offset: 0xc) PLL B Register -------- -#define AT91C_CKGR_DIV ((unsigned int) 0xFF << 0) // (CKGR) Divider Selected -#define AT91C_CKGR_DIV_0 ((unsigned int) 0x0) // (CKGR) Divider output is 0 -#define AT91C_CKGR_DIV_BYPASS ((unsigned int) 0x1) // (CKGR) Divider is bypassed -#define AT91C_CKGR_PLLCOUNT ((unsigned int) 0x3F << 8) // (CKGR) PLL Counter -#define AT91C_CKGR_OUT ((unsigned int) 0x3 << 14) // (CKGR) PLL Output Frequency Range -#define AT91C_CKGR_OUT_0 ((unsigned int) 0x0 << 14) // (CKGR) Please refer to the PLL datasheet -#define AT91C_CKGR_OUT_1 ((unsigned int) 0x1 << 14) // (CKGR) Please refer to the PLL datasheet -#define AT91C_CKGR_OUT_2 ((unsigned int) 0x2 << 14) // (CKGR) Please refer to the PLL datasheet -#define AT91C_CKGR_OUT_3 ((unsigned int) 0x3 << 14) // (CKGR) Please refer to the PLL datasheet -#define AT91C_CKGR_MUL ((unsigned int) 0x7FF << 16) // (CKGR) PLL Multiplier -#define AT91C_CKGR_USBDIV ((unsigned int) 0x3 << 28) // (CKGR) Divider for USB Clocks -#define AT91C_CKGR_USBDIV_0 ((unsigned int) 0x0 << 28) // (CKGR) Divider output is PLL clock output -#define AT91C_CKGR_USBDIV_1 ((unsigned int) 0x1 << 28) // (CKGR) Divider output is PLL clock output divided by 2 -#define AT91C_CKGR_USBDIV_2 ((unsigned int) 0x2 << 28) // (CKGR) Divider output is PLL clock output divided by 4 - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Power Management Controler -// ***************************************************************************** -typedef struct _AT91S_PMC -{ - AT91_REG PMC_SCER; // System Clock Enable Register - AT91_REG PMC_SCDR; // System Clock Disable Register - AT91_REG PMC_SCSR; // System Clock Status Register - AT91_REG Reserved0[1]; // - AT91_REG PMC_PCER; // Peripheral Clock Enable Register - AT91_REG PMC_PCDR; // Peripheral Clock Disable Register - AT91_REG PMC_PCSR; // Peripheral Clock Status Register - AT91_REG Reserved1[1]; // - AT91_REG PMC_MOR; // Main Oscillator Register - AT91_REG PMC_MCFR; // Main Clock Frequency Register - AT91_REG Reserved2[1]; // - AT91_REG PMC_PLLR; // PLL Register - AT91_REG PMC_MCKR; // Master Clock Register - AT91_REG Reserved3[3]; // - AT91_REG PMC_PCKR[4]; // Programmable Clock Register - AT91_REG Reserved4[4]; // - AT91_REG PMC_IER; // Interrupt Enable Register - AT91_REG PMC_IDR; // Interrupt Disable Register - AT91_REG PMC_SR; // Status Register - AT91_REG PMC_IMR; // Interrupt Mask Register -} AT91S_PMC , *AT91PS_PMC; - -// -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register -------- -#define AT91C_PMC_PCK ((unsigned int) 0x1 << 0) // (PMC) Processor Clock -#define AT91C_PMC_UDP ((unsigned int) 0x1 << 7) // (PMC) USB Device Port Clock -#define AT91C_PMC_PCK0 ((unsigned int) 0x1 << 8) // (PMC) Programmable Clock Output -#define AT91C_PMC_PCK1 ((unsigned int) 0x1 << 9) // (PMC) Programmable Clock Output -#define AT91C_PMC_PCK2 ((unsigned int) 0x1 << 10) // (PMC) Programmable Clock Output -#define AT91C_PMC_PCK3 ((unsigned int) 0x1 << 11) // (PMC) Programmable Clock Output -// -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register -------- -// -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register -------- -// -------- CKGR_MOR : (PMC Offset: 0x20) Main Oscillator Register -------- -// -------- CKGR_MCFR : (PMC Offset: 0x24) Main Clock Frequency Register -------- -// -------- CKGR_PLLR : (PMC Offset: 0x2c) PLL B Register -------- -// -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register -------- -#define AT91C_PMC_CSS ((unsigned int) 0x3 << 0) // (PMC) Programmable Clock Selection -#define AT91C_PMC_CSS_SLOW_CLK ((unsigned int) 0x0) // (PMC) Slow Clock is selected -#define AT91C_PMC_CSS_MAIN_CLK ((unsigned int) 0x1) // (PMC) Main Clock is selected -#define AT91C_PMC_CSS_PLL_CLK ((unsigned int) 0x3) // (PMC) Clock from PLL is selected -#define AT91C_PMC_PRES ((unsigned int) 0x7 << 2) // (PMC) Programmable Clock Prescaler -#define AT91C_PMC_PRES_CLK ((unsigned int) 0x0 << 2) // (PMC) Selected clock -#define AT91C_PMC_PRES_CLK_2 ((unsigned int) 0x1 << 2) // (PMC) Selected clock divided by 2 -#define AT91C_PMC_PRES_CLK_4 ((unsigned int) 0x2 << 2) // (PMC) Selected clock divided by 4 -#define AT91C_PMC_PRES_CLK_8 ((unsigned int) 0x3 << 2) // (PMC) Selected clock divided by 8 -#define AT91C_PMC_PRES_CLK_16 ((unsigned int) 0x4 << 2) // (PMC) Selected clock divided by 16 -#define AT91C_PMC_PRES_CLK_32 ((unsigned int) 0x5 << 2) // (PMC) Selected clock divided by 32 -#define AT91C_PMC_PRES_CLK_64 ((unsigned int) 0x6 << 2) // (PMC) Selected clock divided by 64 -// -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register -------- -// -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------- -#define AT91C_PMC_MOSCS ((unsigned int) 0x1 << 0) // (PMC) MOSC Status/Enable/Disable/Mask -#define AT91C_PMC_LOCK ((unsigned int) 0x1 << 2) // (PMC) PLL Status/Enable/Disable/Mask -#define AT91C_PMC_MCKRDY ((unsigned int) 0x1 << 3) // (PMC) MCK_RDY Status/Enable/Disable/Mask -#define AT91C_PMC_PCK0RDY ((unsigned int) 0x1 << 8) // (PMC) PCK0_RDY Status/Enable/Disable/Mask -#define AT91C_PMC_PCK1RDY ((unsigned int) 0x1 << 9) // (PMC) PCK1_RDY Status/Enable/Disable/Mask -#define AT91C_PMC_PCK2RDY ((unsigned int) 0x1 << 10) // (PMC) PCK2_RDY Status/Enable/Disable/Mask -#define AT91C_PMC_PCK3RDY ((unsigned int) 0x1 << 11) // (PMC) PCK3_RDY Status/Enable/Disable/Mask -// -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register -------- -// -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register -------- -// -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register -------- - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Reset Controller Interface -// ***************************************************************************** -typedef struct _AT91S_RSTC -{ - AT91_REG RSTC_RCR; // Reset Control Register - AT91_REG RSTC_RSR; // Reset Status Register - AT91_REG RSTC_RMR; // Reset Mode Register -} AT91S_RSTC , *AT91PS_RSTC; - -// -------- RSTC_RCR : (RSTC Offset: 0x0) Reset Control Register -------- -#define AT91C_RSTC_PROCRST ((unsigned int) 0x1 << 0) // (RSTC) Processor Reset -#define AT91C_RSTC_PERRST ((unsigned int) 0x1 << 2) // (RSTC) Peripheral Reset -#define AT91C_RSTC_EXTRST ((unsigned int) 0x1 << 3) // (RSTC) External Reset -#define AT91C_RSTC_KEY ((unsigned int) 0xFF << 24) // (RSTC) Password -// -------- RSTC_RSR : (RSTC Offset: 0x4) Reset Status Register -------- -#define AT91C_RSTC_URSTS ((unsigned int) 0x1 << 0) // (RSTC) User Reset Status -#define AT91C_RSTC_BODSTS ((unsigned int) 0x1 << 1) // (RSTC) Brownout Detection Status -#define AT91C_RSTC_RSTTYP ((unsigned int) 0x7 << 8) // (RSTC) Reset Type -#define AT91C_RSTC_RSTTYP_POWERUP ((unsigned int) 0x0 << 8) // (RSTC) Power-up Reset. VDDCORE rising. -#define AT91C_RSTC_RSTTYP_WAKEUP ((unsigned int) 0x1 << 8) // (RSTC) WakeUp Reset. VDDCORE rising. -#define AT91C_RSTC_RSTTYP_WATCHDOG ((unsigned int) 0x2 << 8) // (RSTC) Watchdog Reset. Watchdog overflow occured. -#define AT91C_RSTC_RSTTYP_SOFTWARE ((unsigned int) 0x3 << 8) // (RSTC) Software Reset. Processor reset required by the software. -#define AT91C_RSTC_RSTTYP_USER ((unsigned int) 0x4 << 8) // (RSTC) User Reset. NRST pin detected low. -#define AT91C_RSTC_RSTTYP_BROWNOUT ((unsigned int) 0x5 << 8) // (RSTC) Brownout Reset occured. -#define AT91C_RSTC_NRSTL ((unsigned int) 0x1 << 16) // (RSTC) NRST pin level -#define AT91C_RSTC_SRCMP ((unsigned int) 0x1 << 17) // (RSTC) Software Reset Command in Progress. -// -------- RSTC_RMR : (RSTC Offset: 0x8) Reset Mode Register -------- -#define AT91C_RSTC_URSTEN ((unsigned int) 0x1 << 0) // (RSTC) User Reset Enable -#define AT91C_RSTC_URSTIEN ((unsigned int) 0x1 << 4) // (RSTC) User Reset Interrupt Enable -#define AT91C_RSTC_ERSTL ((unsigned int) 0xF << 8) // (RSTC) User Reset Length -#define AT91C_RSTC_BODIEN ((unsigned int) 0x1 << 16) // (RSTC) Brownout Detection Interrupt Enable - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Real Time Timer Controller Interface -// ***************************************************************************** -typedef struct _AT91S_RTTC -{ - AT91_REG RTTC_RTMR; // Real-time Mode Register - AT91_REG RTTC_RTAR; // Real-time Alarm Register - AT91_REG RTTC_RTVR; // Real-time Value Register - AT91_REG RTTC_RTSR; // Real-time Status Register -} AT91S_RTTC , *AT91PS_RTTC; - -// -------- RTTC_RTMR : (RTTC Offset: 0x0) Real-time Mode Register -------- -#define AT91C_RTTC_RTPRES ((unsigned int) 0xFFFF << 0) // (RTTC) Real-time Timer Prescaler Value -#define AT91C_RTTC_ALMIEN ((unsigned int) 0x1 << 16) // (RTTC) Alarm Interrupt Enable -#define AT91C_RTTC_RTTINCIEN ((unsigned int) 0x1 << 17) // (RTTC) Real Time Timer Increment Interrupt Enable -#define AT91C_RTTC_RTTRST ((unsigned int) 0x1 << 18) // (RTTC) Real Time Timer Restart -// -------- RTTC_RTAR : (RTTC Offset: 0x4) Real-time Alarm Register -------- -#define AT91C_RTTC_ALMV ((unsigned int) 0x0 << 0) // (RTTC) Alarm Value -// -------- RTTC_RTVR : (RTTC Offset: 0x8) Current Real-time Value Register -------- -#define AT91C_RTTC_CRTV ((unsigned int) 0x0 << 0) // (RTTC) Current Real-time Value -// -------- RTTC_RTSR : (RTTC Offset: 0xc) Real-time Status Register -------- -#define AT91C_RTTC_ALMS ((unsigned int) 0x1 << 0) // (RTTC) Real-time Alarm Status -#define AT91C_RTTC_RTTINC ((unsigned int) 0x1 << 1) // (RTTC) Real-time Timer Increment - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Periodic Interval Timer Controller Interface -// ***************************************************************************** -typedef struct _AT91S_PITC -{ - AT91_REG PITC_PIMR; // Period Interval Mode Register - AT91_REG PITC_PISR; // Period Interval Status Register - AT91_REG PITC_PIVR; // Period Interval Value Register - AT91_REG PITC_PIIR; // Period Interval Image Register -} AT91S_PITC , *AT91PS_PITC; - -// -------- PITC_PIMR : (PITC Offset: 0x0) Periodic Interval Mode Register -------- -#define AT91C_PITC_PIV ((unsigned int) 0xFFFFF << 0) // (PITC) Periodic Interval Value -#define AT91C_PITC_PITEN ((unsigned int) 0x1 << 24) // (PITC) Periodic Interval Timer Enabled -#define AT91C_PITC_PITIEN ((unsigned int) 0x1 << 25) // (PITC) Periodic Interval Timer Interrupt Enable -// -------- PITC_PISR : (PITC Offset: 0x4) Periodic Interval Status Register -------- -#define AT91C_PITC_PITS ((unsigned int) 0x1 << 0) // (PITC) Periodic Interval Timer Status -// -------- PITC_PIVR : (PITC Offset: 0x8) Periodic Interval Value Register -------- -#define AT91C_PITC_CPIV ((unsigned int) 0xFFFFF << 0) // (PITC) Current Periodic Interval Value -#define AT91C_PITC_PICNT ((unsigned int) 0xFFF << 20) // (PITC) Periodic Interval Counter -// -------- PITC_PIIR : (PITC Offset: 0xc) Periodic Interval Image Register -------- - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Watchdog Timer Controller Interface -// ***************************************************************************** -typedef struct _AT91S_WDTC -{ - AT91_REG WDTC_WDCR; // Watchdog Control Register - AT91_REG WDTC_WDMR; // Watchdog Mode Register - AT91_REG WDTC_WDSR; // Watchdog Status Register -} AT91S_WDTC , *AT91PS_WDTC; - -// -------- WDTC_WDCR : (WDTC Offset: 0x0) Periodic Interval Image Register -------- -#define AT91C_WDTC_WDRSTT ((unsigned int) 0x1 << 0) // (WDTC) Watchdog Restart -#define AT91C_WDTC_KEY ((unsigned int) 0xFF << 24) // (WDTC) Watchdog KEY Password -// -------- WDTC_WDMR : (WDTC Offset: 0x4) Watchdog Mode Register -------- -#define AT91C_WDTC_WDV ((unsigned int) 0xFFF << 0) // (WDTC) Watchdog Timer Restart -#define AT91C_WDTC_WDFIEN ((unsigned int) 0x1 << 12) // (WDTC) Watchdog Fault Interrupt Enable -#define AT91C_WDTC_WDRSTEN ((unsigned int) 0x1 << 13) // (WDTC) Watchdog Reset Enable -#define AT91C_WDTC_WDRPROC ((unsigned int) 0x1 << 14) // (WDTC) Watchdog Timer Restart -#define AT91C_WDTC_WDDIS ((unsigned int) 0x1 << 15) // (WDTC) Watchdog Disable -#define AT91C_WDTC_WDD ((unsigned int) 0xFFF << 16) // (WDTC) Watchdog Delta Value -#define AT91C_WDTC_WDDBGHLT ((unsigned int) 0x1 << 28) // (WDTC) Watchdog Debug Halt -#define AT91C_WDTC_WDIDLEHLT ((unsigned int) 0x1 << 29) // (WDTC) Watchdog Idle Halt -// -------- WDTC_WDSR : (WDTC Offset: 0x8) Watchdog Status Register -------- -#define AT91C_WDTC_WDUNF ((unsigned int) 0x1 << 0) // (WDTC) Watchdog Underflow -#define AT91C_WDTC_WDERR ((unsigned int) 0x1 << 1) // (WDTC) Watchdog Error - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Voltage Regulator Mode Controller Interface -// ***************************************************************************** -typedef struct _AT91S_VREG -{ - AT91_REG VREG_MR; // Voltage Regulator Mode Register -} AT91S_VREG , *AT91PS_VREG; - -// -------- VREG_MR : (VREG Offset: 0x0) Voltage Regulator Mode Register -------- -#define AT91C_VREG_PSTDBY ((unsigned int) 0x1 << 0) // (VREG) Voltage Regulator Power Standby Mode - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Memory Controller Interface -// ***************************************************************************** -typedef struct _AT91S_MC -{ - AT91_REG MC_RCR; // MC Remap Control Register - AT91_REG MC_ASR; // MC Abort Status Register - AT91_REG MC_AASR; // MC Abort Address Status Register - AT91_REG Reserved0[21]; // - AT91_REG MC_FMR; // MC Flash Mode Register - AT91_REG MC_FCR; // MC Flash Command Register - AT91_REG MC_FSR; // MC Flash Status Register -} AT91S_MC , *AT91PS_MC; - -// -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register -------- -#define AT91C_MC_RCB ((unsigned int) 0x1 << 0) // (MC) Remap Command Bit -// -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register -------- -#define AT91C_MC_UNDADD ((unsigned int) 0x1 << 0) // (MC) Undefined Addess Abort Status -#define AT91C_MC_MISADD ((unsigned int) 0x1 << 1) // (MC) Misaligned Addess Abort Status -#define AT91C_MC_ABTSZ ((unsigned int) 0x3 << 8) // (MC) Abort Size Status -#define AT91C_MC_ABTSZ_BYTE ((unsigned int) 0x0 << 8) // (MC) Byte -#define AT91C_MC_ABTSZ_HWORD ((unsigned int) 0x1 << 8) // (MC) Half-word -#define AT91C_MC_ABTSZ_WORD ((unsigned int) 0x2 << 8) // (MC) Word -#define AT91C_MC_ABTTYP ((unsigned int) 0x3 << 10) // (MC) Abort Type Status -#define AT91C_MC_ABTTYP_DATAR ((unsigned int) 0x0 << 10) // (MC) Data Read -#define AT91C_MC_ABTTYP_DATAW ((unsigned int) 0x1 << 10) // (MC) Data Write -#define AT91C_MC_ABTTYP_FETCH ((unsigned int) 0x2 << 10) // (MC) Code Fetch -#define AT91C_MC_MST0 ((unsigned int) 0x1 << 16) // (MC) Master 0 Abort Source -#define AT91C_MC_MST1 ((unsigned int) 0x1 << 17) // (MC) Master 1 Abort Source -#define AT91C_MC_SVMST0 ((unsigned int) 0x1 << 24) // (MC) Saved Master 0 Abort Source -#define AT91C_MC_SVMST1 ((unsigned int) 0x1 << 25) // (MC) Saved Master 1 Abort Source -// -------- MC_FMR : (MC Offset: 0x60) MC Flash Mode Register -------- -#define AT91C_MC_FRDY ((unsigned int) 0x1 << 0) // (MC) Flash Ready -#define AT91C_MC_LOCKE ((unsigned int) 0x1 << 2) // (MC) Lock Error -#define AT91C_MC_PROGE ((unsigned int) 0x1 << 3) // (MC) Programming Error -#define AT91C_MC_NEBP ((unsigned int) 0x1 << 7) // (MC) No Erase Before Programming -#define AT91C_MC_FWS ((unsigned int) 0x3 << 8) // (MC) Flash Wait State -#define AT91C_MC_FWS_0FWS ((unsigned int) 0x0 << 8) // (MC) 1 cycle for Read, 2 for Write operations -#define AT91C_MC_FWS_1FWS ((unsigned int) 0x1 << 8) // (MC) 2 cycles for Read, 3 for Write operations -#define AT91C_MC_FWS_2FWS ((unsigned int) 0x2 << 8) // (MC) 3 cycles for Read, 4 for Write operations -#define AT91C_MC_FWS_3FWS ((unsigned int) 0x3 << 8) // (MC) 4 cycles for Read, 4 for Write operations -#define AT91C_MC_FMCN ((unsigned int) 0xFF << 16) // (MC) Flash Microsecond Cycle Number -// -------- MC_FCR : (MC Offset: 0x64) MC Flash Command Register -------- -#define AT91C_MC_FCMD ((unsigned int) 0xF << 0) // (MC) Flash Command -#define AT91C_MC_FCMD_START_PROG ((unsigned int) 0x1) // (MC) Starts the programming of th epage specified by PAGEN. -#define AT91C_MC_FCMD_LOCK ((unsigned int) 0x2) // (MC) Starts a lock sequence of the sector defined by the bits 4 to 7 of the field PAGEN. -#define AT91C_MC_FCMD_PROG_AND_LOCK ((unsigned int) 0x3) // (MC) The lock sequence automatically happens after the programming sequence is completed. -#define AT91C_MC_FCMD_UNLOCK ((unsigned int) 0x4) // (MC) Starts an unlock sequence of the sector defined by the bits 4 to 7 of the field PAGEN. -#define AT91C_MC_FCMD_ERASE_ALL ((unsigned int) 0x8) // (MC) Starts the erase of the entire flash.If at least a page is locked, the command is cancelled. -#define AT91C_MC_FCMD_SET_GP_NVM ((unsigned int) 0xB) // (MC) Set General Purpose NVM bits. -#define AT91C_MC_FCMD_CLR_GP_NVM ((unsigned int) 0xD) // (MC) Clear General Purpose NVM bits. -#define AT91C_MC_FCMD_SET_SECURITY ((unsigned int) 0xF) // (MC) Set Security Bit. -#define AT91C_MC_PAGEN ((unsigned int) 0x3FF << 8) // (MC) Page Number -#define AT91C_MC_KEY ((unsigned int) 0xFF << 24) // (MC) Writing Protect Key -// -------- MC_FSR : (MC Offset: 0x68) MC Flash Command Register -------- -#define AT91C_MC_SECURITY ((unsigned int) 0x1 << 4) // (MC) Security Bit Status -#define AT91C_MC_GPNVM0 ((unsigned int) 0x1 << 8) // (MC) Sector 0 Lock Status -#define AT91C_MC_GPNVM1 ((unsigned int) 0x1 << 9) // (MC) Sector 1 Lock Status -#define AT91C_MC_GPNVM2 ((unsigned int) 0x1 << 10) // (MC) Sector 2 Lock Status -#define AT91C_MC_GPNVM3 ((unsigned int) 0x1 << 11) // (MC) Sector 3 Lock Status -#define AT91C_MC_GPNVM4 ((unsigned int) 0x1 << 12) // (MC) Sector 4 Lock Status -#define AT91C_MC_GPNVM5 ((unsigned int) 0x1 << 13) // (MC) Sector 5 Lock Status -#define AT91C_MC_GPNVM6 ((unsigned int) 0x1 << 14) // (MC) Sector 6 Lock Status -#define AT91C_MC_GPNVM7 ((unsigned int) 0x1 << 15) // (MC) Sector 7 Lock Status -#define AT91C_MC_LOCKS0 ((unsigned int) 0x1 << 16) // (MC) Sector 0 Lock Status -#define AT91C_MC_LOCKS1 ((unsigned int) 0x1 << 17) // (MC) Sector 1 Lock Status -#define AT91C_MC_LOCKS2 ((unsigned int) 0x1 << 18) // (MC) Sector 2 Lock Status -#define AT91C_MC_LOCKS3 ((unsigned int) 0x1 << 19) // (MC) Sector 3 Lock Status -#define AT91C_MC_LOCKS4 ((unsigned int) 0x1 << 20) // (MC) Sector 4 Lock Status -#define AT91C_MC_LOCKS5 ((unsigned int) 0x1 << 21) // (MC) Sector 5 Lock Status -#define AT91C_MC_LOCKS6 ((unsigned int) 0x1 << 22) // (MC) Sector 6 Lock Status -#define AT91C_MC_LOCKS7 ((unsigned int) 0x1 << 23) // (MC) Sector 7 Lock Status -#define AT91C_MC_LOCKS8 ((unsigned int) 0x1 << 24) // (MC) Sector 8 Lock Status -#define AT91C_MC_LOCKS9 ((unsigned int) 0x1 << 25) // (MC) Sector 9 Lock Status -#define AT91C_MC_LOCKS10 ((unsigned int) 0x1 << 26) // (MC) Sector 10 Lock Status -#define AT91C_MC_LOCKS11 ((unsigned int) 0x1 << 27) // (MC) Sector 11 Lock Status -#define AT91C_MC_LOCKS12 ((unsigned int) 0x1 << 28) // (MC) Sector 12 Lock Status -#define AT91C_MC_LOCKS13 ((unsigned int) 0x1 << 29) // (MC) Sector 13 Lock Status -#define AT91C_MC_LOCKS14 ((unsigned int) 0x1 << 30) // (MC) Sector 14 Lock Status -#define AT91C_MC_LOCKS15 ((unsigned int) 0x1 << 31) // (MC) Sector 15 Lock Status - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Serial Parallel Interface -// ***************************************************************************** -typedef struct _AT91S_SPI -{ - AT91_REG SPI_CR; // Control Register - AT91_REG SPI_MR; // Mode Register - AT91_REG SPI_RDR; // Receive Data Register - AT91_REG SPI_TDR; // Transmit Data Register - AT91_REG SPI_SR; // Status Register - AT91_REG SPI_IER; // Interrupt Enable Register - AT91_REG SPI_IDR; // Interrupt Disable Register - AT91_REG SPI_IMR; // Interrupt Mask Register - AT91_REG Reserved0[4]; // - AT91_REG SPI_CSR[4]; // Chip Select Register - AT91_REG Reserved1[48]; // - AT91_REG SPI_RPR; // Receive Pointer Register - AT91_REG SPI_RCR; // Receive Counter Register - AT91_REG SPI_TPR; // Transmit Pointer Register - AT91_REG SPI_TCR; // Transmit Counter Register - AT91_REG SPI_RNPR; // Receive Next Pointer Register - AT91_REG SPI_RNCR; // Receive Next Counter Register - AT91_REG SPI_TNPR; // Transmit Next Pointer Register - AT91_REG SPI_TNCR; // Transmit Next Counter Register - AT91_REG SPI_PTCR; // PDC Transfer Control Register - AT91_REG SPI_PTSR; // PDC Transfer Status Register -} AT91S_SPI , *AT91PS_SPI; - -// -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register -------- -#define AT91C_SPI_SPIEN ((unsigned int) 0x1 << 0) // (SPI) SPI Enable -#define AT91C_SPI_SPIDIS ((unsigned int) 0x1 << 1) // (SPI) SPI Disable -#define AT91C_SPI_SWRST ((unsigned int) 0x1 << 7) // (SPI) SPI Software reset -#define AT91C_SPI_LASTXFER ((unsigned int) 0x1 << 24) // (SPI) SPI Last Transfer -// -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register -------- -#define AT91C_SPI_MSTR ((unsigned int) 0x1 << 0) // (SPI) Master/Slave Mode -#define AT91C_SPI_PS ((unsigned int) 0x1 << 1) // (SPI) Peripheral Select -#define AT91C_SPI_PS_FIXED ((unsigned int) 0x0 << 1) // (SPI) Fixed Peripheral Select -#define AT91C_SPI_PS_VARIABLE ((unsigned int) 0x1 << 1) // (SPI) Variable Peripheral Select -#define AT91C_SPI_PCSDEC ((unsigned int) 0x1 << 2) // (SPI) Chip Select Decode -#define AT91C_SPI_FDIV ((unsigned int) 0x1 << 3) // (SPI) Clock Selection -#define AT91C_SPI_MODFDIS ((unsigned int) 0x1 << 4) // (SPI) Mode Fault Detection -#define AT91C_SPI_LLB ((unsigned int) 0x1 << 7) // (SPI) Clock Selection -#define AT91C_SPI_PCS ((unsigned int) 0xF << 16) // (SPI) Peripheral Chip Select -#define AT91C_SPI_DLYBCS ((unsigned int) 0xFF << 24) // (SPI) Delay Between Chip Selects -// -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register -------- -#define AT91C_SPI_RD ((unsigned int) 0xFFFF << 0) // (SPI) Receive Data -#define AT91C_SPI_RPCS ((unsigned int) 0xF << 16) // (SPI) Peripheral Chip Select Status -// -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register -------- -#define AT91C_SPI_TD ((unsigned int) 0xFFFF << 0) // (SPI) Transmit Data -#define AT91C_SPI_TPCS ((unsigned int) 0xF << 16) // (SPI) Peripheral Chip Select Status -// -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- -#define AT91C_SPI_RDRF ((unsigned int) 0x1 << 0) // (SPI) Receive Data Register Full -#define AT91C_SPI_TDRE ((unsigned int) 0x1 << 1) // (SPI) Transmit Data Register Empty -#define AT91C_SPI_MODF ((unsigned int) 0x1 << 2) // (SPI) Mode Fault Error -#define AT91C_SPI_OVRES ((unsigned int) 0x1 << 3) // (SPI) Overrun Error Status -#define AT91C_SPI_ENDRX ((unsigned int) 0x1 << 4) // (SPI) End of Receiver Transfer -#define AT91C_SPI_ENDTX ((unsigned int) 0x1 << 5) // (SPI) End of Receiver Transfer -#define AT91C_SPI_RXBUFF ((unsigned int) 0x1 << 6) // (SPI) RXBUFF Interrupt -#define AT91C_SPI_TXBUFE ((unsigned int) 0x1 << 7) // (SPI) TXBUFE Interrupt -#define AT91C_SPI_NSSR ((unsigned int) 0x1 << 8) // (SPI) NSSR Interrupt -#define AT91C_SPI_TXEMPTY ((unsigned int) 0x1 << 9) // (SPI) TXEMPTY Interrupt -#define AT91C_SPI_SPIENS ((unsigned int) 0x1 << 16) // (SPI) Enable Status -// -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- -// -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- -// -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- -// -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- -#define AT91C_SPI_CPOL ((unsigned int) 0x1 << 0) // (SPI) Clock Polarity -#define AT91C_SPI_NCPHA ((unsigned int) 0x1 << 1) // (SPI) Clock Phase -#define AT91C_SPI_CSAAT ((unsigned int) 0x1 << 3) // (SPI) Chip Select Active After Transfer -#define AT91C_SPI_BITS ((unsigned int) 0xF << 4) // (SPI) Bits Per Transfer -#define AT91C_SPI_BITS_8 ((unsigned int) 0x0 << 4) // (SPI) 8 Bits Per transfer -#define AT91C_SPI_BITS_9 ((unsigned int) 0x1 << 4) // (SPI) 9 Bits Per transfer -#define AT91C_SPI_BITS_10 ((unsigned int) 0x2 << 4) // (SPI) 10 Bits Per transfer -#define AT91C_SPI_BITS_11 ((unsigned int) 0x3 << 4) // (SPI) 11 Bits Per transfer -#define AT91C_SPI_BITS_12 ((unsigned int) 0x4 << 4) // (SPI) 12 Bits Per transfer -#define AT91C_SPI_BITS_13 ((unsigned int) 0x5 << 4) // (SPI) 13 Bits Per transfer -#define AT91C_SPI_BITS_14 ((unsigned int) 0x6 << 4) // (SPI) 14 Bits Per transfer -#define AT91C_SPI_BITS_15 ((unsigned int) 0x7 << 4) // (SPI) 15 Bits Per transfer -#define AT91C_SPI_BITS_16 ((unsigned int) 0x8 << 4) // (SPI) 16 Bits Per transfer -#define AT91C_SPI_SCBR ((unsigned int) 0xFF << 8) // (SPI) Serial Clock Baud Rate -#define AT91C_SPI_DLYBS ((unsigned int) 0xFF << 16) // (SPI) Delay Before SPCK -#define AT91C_SPI_DLYBCT ((unsigned int) 0xFF << 24) // (SPI) Delay Between Consecutive Transfers - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Usart -// ***************************************************************************** -typedef struct _AT91S_USART -{ - AT91_REG US_CR; // Control Register - AT91_REG US_MR; // Mode Register - AT91_REG US_IER; // Interrupt Enable Register - AT91_REG US_IDR; // Interrupt Disable Register - AT91_REG US_IMR; // Interrupt Mask Register - AT91_REG US_CSR; // Channel Status Register - AT91_REG US_RHR; // Receiver Holding Register - AT91_REG US_THR; // Transmitter Holding Register - AT91_REG US_BRGR; // Baud Rate Generator Register - AT91_REG US_RTOR; // Receiver Time-out Register - AT91_REG US_TTGR; // Transmitter Time-guard Register - AT91_REG Reserved0[5]; // - AT91_REG US_FIDI; // FI_DI_Ratio Register - AT91_REG US_NER; // Nb Errors Register - AT91_REG Reserved1[1]; // - AT91_REG US_IF; // IRDA_FILTER Register - AT91_REG Reserved2[44]; // - AT91_REG US_RPR; // Receive Pointer Register - AT91_REG US_RCR; // Receive Counter Register - AT91_REG US_TPR; // Transmit Pointer Register - AT91_REG US_TCR; // Transmit Counter Register - AT91_REG US_RNPR; // Receive Next Pointer Register - AT91_REG US_RNCR; // Receive Next Counter Register - AT91_REG US_TNPR; // Transmit Next Pointer Register - AT91_REG US_TNCR; // Transmit Next Counter Register - AT91_REG US_PTCR; // PDC Transfer Control Register - AT91_REG US_PTSR; // PDC Transfer Status Register -} AT91S_USART , *AT91PS_USART; - -// -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register -------- -#define AT91C_US_STTBRK ((unsigned int) 0x1 << 9) // (USART) Start Break -#define AT91C_US_STPBRK ((unsigned int) 0x1 << 10) // (USART) Stop Break -#define AT91C_US_STTTO ((unsigned int) 0x1 << 11) // (USART) Start Time-out -#define AT91C_US_SENDA ((unsigned int) 0x1 << 12) // (USART) Send Address -#define AT91C_US_RSTIT ((unsigned int) 0x1 << 13) // (USART) Reset Iterations -#define AT91C_US_RSTNACK ((unsigned int) 0x1 << 14) // (USART) Reset Non Acknowledge -#define AT91C_US_RETTO ((unsigned int) 0x1 << 15) // (USART) Rearm Time-out -#define AT91C_US_DTREN ((unsigned int) 0x1 << 16) // (USART) Data Terminal ready Enable -#define AT91C_US_DTRDIS ((unsigned int) 0x1 << 17) // (USART) Data Terminal ready Disable -#define AT91C_US_RTSEN ((unsigned int) 0x1 << 18) // (USART) Request to Send enable -#define AT91C_US_RTSDIS ((unsigned int) 0x1 << 19) // (USART) Request to Send Disable -// -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register -------- -#define AT91C_US_USMODE ((unsigned int) 0xF << 0) // (USART) Usart mode -#define AT91C_US_USMODE_NORMAL ((unsigned int) 0x0) // (USART) Normal -#define AT91C_US_USMODE_RS485 ((unsigned int) 0x1) // (USART) RS485 -#define AT91C_US_USMODE_HWHSH ((unsigned int) 0x2) // (USART) Hardware Handshaking -#define AT91C_US_USMODE_MODEM ((unsigned int) 0x3) // (USART) Modem -#define AT91C_US_USMODE_ISO7816_0 ((unsigned int) 0x4) // (USART) ISO7816 protocol: T = 0 -#define AT91C_US_USMODE_ISO7816_1 ((unsigned int) 0x6) // (USART) ISO7816 protocol: T = 1 -#define AT91C_US_USMODE_IRDA ((unsigned int) 0x8) // (USART) IrDA -#define AT91C_US_USMODE_SWHSH ((unsigned int) 0xC) // (USART) Software Handshaking -#define AT91C_US_CLKS ((unsigned int) 0x3 << 4) // (USART) Clock Selection (Baud Rate generator Input Clock -#define AT91C_US_CLKS_CLOCK ((unsigned int) 0x0 << 4) // (USART) Clock -#define AT91C_US_CLKS_FDIV1 ((unsigned int) 0x1 << 4) // (USART) fdiv1 -#define AT91C_US_CLKS_SLOW ((unsigned int) 0x2 << 4) // (USART) slow_clock (ARM) -#define AT91C_US_CLKS_EXT ((unsigned int) 0x3 << 4) // (USART) External (SCK) -#define AT91C_US_CHRL ((unsigned int) 0x3 << 6) // (USART) Clock Selection (Baud Rate generator Input Clock -#define AT91C_US_CHRL_5_BITS ((unsigned int) 0x0 << 6) // (USART) Character Length: 5 bits -#define AT91C_US_CHRL_6_BITS ((unsigned int) 0x1 << 6) // (USART) Character Length: 6 bits -#define AT91C_US_CHRL_7_BITS ((unsigned int) 0x2 << 6) // (USART) Character Length: 7 bits -#define AT91C_US_CHRL_8_BITS ((unsigned int) 0x3 << 6) // (USART) Character Length: 8 bits -#define AT91C_US_SYNC ((unsigned int) 0x1 << 8) // (USART) Synchronous Mode Select -#define AT91C_US_NBSTOP ((unsigned int) 0x3 << 12) // (USART) Number of Stop bits -#define AT91C_US_NBSTOP_1_BIT ((unsigned int) 0x0 << 12) // (USART) 1 stop bit -#define AT91C_US_NBSTOP_15_BIT ((unsigned int) 0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits -#define AT91C_US_NBSTOP_2_BIT ((unsigned int) 0x2 << 12) // (USART) 2 stop bits -#define AT91C_US_MSBF ((unsigned int) 0x1 << 16) // (USART) Bit Order -#define AT91C_US_MODE9 ((unsigned int) 0x1 << 17) // (USART) 9-bit Character length -#define AT91C_US_CKLO ((unsigned int) 0x1 << 18) // (USART) Clock Output Select -#define AT91C_US_OVER ((unsigned int) 0x1 << 19) // (USART) Over Sampling Mode -#define AT91C_US_INACK ((unsigned int) 0x1 << 20) // (USART) Inhibit Non Acknowledge -#define AT91C_US_DSNACK ((unsigned int) 0x1 << 21) // (USART) Disable Successive NACK -#define AT91C_US_MAX_ITER ((unsigned int) 0x1 << 24) // (USART) Number of Repetitions -#define AT91C_US_FILTER ((unsigned int) 0x1 << 28) // (USART) Receive Line Filter -// -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register -------- -#define AT91C_US_RXBRK ((unsigned int) 0x1 << 2) // (USART) Break Received/End of Break -#define AT91C_US_TIMEOUT ((unsigned int) 0x1 << 8) // (USART) Receiver Time-out -#define AT91C_US_ITERATION ((unsigned int) 0x1 << 10) // (USART) Max number of Repetitions Reached -#define AT91C_US_NACK ((unsigned int) 0x1 << 13) // (USART) Non Acknowledge -#define AT91C_US_RIIC ((unsigned int) 0x1 << 16) // (USART) Ring INdicator Input Change Flag -#define AT91C_US_DSRIC ((unsigned int) 0x1 << 17) // (USART) Data Set Ready Input Change Flag -#define AT91C_US_DCDIC ((unsigned int) 0x1 << 18) // (USART) Data Carrier Flag -#define AT91C_US_CTSIC ((unsigned int) 0x1 << 19) // (USART) Clear To Send Input Change Flag -// -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register -------- -// -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register -------- -// -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register -------- -#define AT91C_US_RI ((unsigned int) 0x1 << 20) // (USART) Image of RI Input -#define AT91C_US_DSR ((unsigned int) 0x1 << 21) // (USART) Image of DSR Input -#define AT91C_US_DCD ((unsigned int) 0x1 << 22) // (USART) Image of DCD Input -#define AT91C_US_CTS ((unsigned int) 0x1 << 23) // (USART) Image of CTS Input - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Synchronous Serial Controller Interface -// ***************************************************************************** -typedef struct _AT91S_SSC -{ - AT91_REG SSC_CR; // Control Register - AT91_REG SSC_CMR; // Clock Mode Register - AT91_REG Reserved0[2]; // - AT91_REG SSC_RCMR; // Receive Clock ModeRegister - AT91_REG SSC_RFMR; // Receive Frame Mode Register - AT91_REG SSC_TCMR; // Transmit Clock Mode Register - AT91_REG SSC_TFMR; // Transmit Frame Mode Register - AT91_REG SSC_RHR; // Receive Holding Register - AT91_REG SSC_THR; // Transmit Holding Register - AT91_REG Reserved1[2]; // - AT91_REG SSC_RSHR; // Receive Sync Holding Register - AT91_REG SSC_TSHR; // Transmit Sync Holding Register - AT91_REG Reserved2[2]; // - AT91_REG SSC_SR; // Status Register - AT91_REG SSC_IER; // Interrupt Enable Register - AT91_REG SSC_IDR; // Interrupt Disable Register - AT91_REG SSC_IMR; // Interrupt Mask Register - AT91_REG Reserved3[44]; // - AT91_REG SSC_RPR; // Receive Pointer Register - AT91_REG SSC_RCR; // Receive Counter Register - AT91_REG SSC_TPR; // Transmit Pointer Register - AT91_REG SSC_TCR; // Transmit Counter Register - AT91_REG SSC_RNPR; // Receive Next Pointer Register - AT91_REG SSC_RNCR; // Receive Next Counter Register - AT91_REG SSC_TNPR; // Transmit Next Pointer Register - AT91_REG SSC_TNCR; // Transmit Next Counter Register - AT91_REG SSC_PTCR; // PDC Transfer Control Register - AT91_REG SSC_PTSR; // PDC Transfer Status Register -} AT91S_SSC , *AT91PS_SSC; - -// -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register -------- -#define AT91C_SSC_RXEN ((unsigned int) 0x1 << 0) // (SSC) Receive Enable -#define AT91C_SSC_RXDIS ((unsigned int) 0x1 << 1) // (SSC) Receive Disable -#define AT91C_SSC_TXEN ((unsigned int) 0x1 << 8) // (SSC) Transmit Enable -#define AT91C_SSC_TXDIS ((unsigned int) 0x1 << 9) // (SSC) Transmit Disable -#define AT91C_SSC_SWRST ((unsigned int) 0x1 << 15) // (SSC) Software Reset -// -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register -------- -#define AT91C_SSC_CKS ((unsigned int) 0x3 << 0) // (SSC) Receive/Transmit Clock Selection -#define AT91C_SSC_CKS_DIV ((unsigned int) 0x0) // (SSC) Divided Clock -#define AT91C_SSC_CKS_TK ((unsigned int) 0x1) // (SSC) TK Clock signal -#define AT91C_SSC_CKS_RK ((unsigned int) 0x2) // (SSC) RK pin -#define AT91C_SSC_CKO ((unsigned int) 0x7 << 2) // (SSC) Receive/Transmit Clock Output Mode Selection -#define AT91C_SSC_CKO_NONE ((unsigned int) 0x0 << 2) // (SSC) Receive/Transmit Clock Output Mode: None RK pin: Input-only -#define AT91C_SSC_CKO_CONTINOUS ((unsigned int) 0x1 << 2) // (SSC) Continuous Receive/Transmit Clock RK pin: Output -#define AT91C_SSC_CKO_DATA_TX ((unsigned int) 0x2 << 2) // (SSC) Receive/Transmit Clock only during data transfers RK pin: Output -#define AT91C_SSC_CKI ((unsigned int) 0x1 << 5) // (SSC) Receive/Transmit Clock Inversion -#define AT91C_SSC_CKG ((unsigned int) 0x3 << 6) // (SSC) Receive/Transmit Clock Gating Selection -#define AT91C_SSC_CKG_NONE ((unsigned int) 0x0 << 6) // (SSC) Receive/Transmit Clock Gating: None, continuous clock -#define AT91C_SSC_CKG_LOW ((unsigned int) 0x1 << 6) // (SSC) Receive/Transmit Clock enabled only if RF Low -#define AT91C_SSC_CKG_HIGH ((unsigned int) 0x2 << 6) // (SSC) Receive/Transmit Clock enabled only if RF High -#define AT91C_SSC_START ((unsigned int) 0xF << 8) // (SSC) Receive/Transmit Start Selection -#define AT91C_SSC_START_CONTINOUS ((unsigned int) 0x0 << 8) // (SSC) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data. -#define AT91C_SSC_START_TX ((unsigned int) 0x1 << 8) // (SSC) Transmit/Receive start -#define AT91C_SSC_START_LOW_RF ((unsigned int) 0x2 << 8) // (SSC) Detection of a low level on RF input -#define AT91C_SSC_START_HIGH_RF ((unsigned int) 0x3 << 8) // (SSC) Detection of a high level on RF input -#define AT91C_SSC_START_FALL_RF ((unsigned int) 0x4 << 8) // (SSC) Detection of a falling edge on RF input -#define AT91C_SSC_START_RISE_RF ((unsigned int) 0x5 << 8) // (SSC) Detection of a rising edge on RF input -#define AT91C_SSC_START_LEVEL_RF ((unsigned int) 0x6 << 8) // (SSC) Detection of any level change on RF input -#define AT91C_SSC_START_EDGE_RF ((unsigned int) 0x7 << 8) // (SSC) Detection of any edge on RF input -#define AT91C_SSC_START_0 ((unsigned int) 0x8 << 8) // (SSC) Compare 0 -#define AT91C_SSC_STOP ((unsigned int) 0x1 << 12) // (SSC) Receive Stop Selection -#define AT91C_SSC_STTDLY ((unsigned int) 0xFF << 16) // (SSC) Receive/Transmit Start Delay -#define AT91C_SSC_PERIOD ((unsigned int) 0xFF << 24) // (SSC) Receive/Transmit Period Divider Selection -// -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register -------- -#define AT91C_SSC_DATLEN ((unsigned int) 0x1F << 0) // (SSC) Data Length -#define AT91C_SSC_LOOP ((unsigned int) 0x1 << 5) // (SSC) Loop Mode -#define AT91C_SSC_MSBF ((unsigned int) 0x1 << 7) // (SSC) Most Significant Bit First -#define AT91C_SSC_DATNB ((unsigned int) 0xF << 8) // (SSC) Data Number per Frame -#define AT91C_SSC_FSLEN ((unsigned int) 0xF << 16) // (SSC) Receive/Transmit Frame Sync length -#define AT91C_SSC_FSOS ((unsigned int) 0x7 << 20) // (SSC) Receive/Transmit Frame Sync Output Selection -#define AT91C_SSC_FSOS_NONE ((unsigned int) 0x0 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: None RK pin Input-only -#define AT91C_SSC_FSOS_NEGATIVE ((unsigned int) 0x1 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Negative Pulse -#define AT91C_SSC_FSOS_POSITIVE ((unsigned int) 0x2 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Positive Pulse -#define AT91C_SSC_FSOS_LOW ((unsigned int) 0x3 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver Low during data transfer -#define AT91C_SSC_FSOS_HIGH ((unsigned int) 0x4 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver High during data transfer -#define AT91C_SSC_FSOS_TOGGLE ((unsigned int) 0x5 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Toggling at each start of data transfer -#define AT91C_SSC_FSEDGE ((unsigned int) 0x1 << 24) // (SSC) Frame Sync Edge Detection -// -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register -------- -// -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register -------- -#define AT91C_SSC_DATDEF ((unsigned int) 0x1 << 5) // (SSC) Data Default Value -#define AT91C_SSC_FSDEN ((unsigned int) 0x1 << 23) // (SSC) Frame Sync Data Enable -// -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register -------- -#define AT91C_SSC_TXRDY ((unsigned int) 0x1 << 0) // (SSC) Transmit Ready -#define AT91C_SSC_TXEMPTY ((unsigned int) 0x1 << 1) // (SSC) Transmit Empty -#define AT91C_SSC_ENDTX ((unsigned int) 0x1 << 2) // (SSC) End Of Transmission -#define AT91C_SSC_TXBUFE ((unsigned int) 0x1 << 3) // (SSC) Transmit Buffer Empty -#define AT91C_SSC_RXRDY ((unsigned int) 0x1 << 4) // (SSC) Receive Ready -#define AT91C_SSC_OVRUN ((unsigned int) 0x1 << 5) // (SSC) Receive Overrun -#define AT91C_SSC_ENDRX ((unsigned int) 0x1 << 6) // (SSC) End of Reception -#define AT91C_SSC_RXBUFF ((unsigned int) 0x1 << 7) // (SSC) Receive Buffer Full -#define AT91C_SSC_CP0 ((unsigned int) 0x1 << 8) // (SSC) Compare 0 -#define AT91C_SSC_CP1 ((unsigned int) 0x1 << 9) // (SSC) Compare 1 -#define AT91C_SSC_TXSYN ((unsigned int) 0x1 << 10) // (SSC) Transmit Sync -#define AT91C_SSC_RXSYN ((unsigned int) 0x1 << 11) // (SSC) Receive Sync -#define AT91C_SSC_TXENA ((unsigned int) 0x1 << 16) // (SSC) Transmit Enable -#define AT91C_SSC_RXENA ((unsigned int) 0x1 << 17) // (SSC) Receive Enable -// -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register -------- -// -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register -------- -// -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register -------- - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Two-wire Interface -// ***************************************************************************** -typedef struct _AT91S_TWI -{ - AT91_REG TWI_CR; // Control Register - AT91_REG TWI_MMR; // Master Mode Register - AT91_REG Reserved0[1]; // - AT91_REG TWI_IADR; // Internal Address Register - AT91_REG TWI_CWGR; // Clock Waveform Generator Register - AT91_REG Reserved1[3]; // - AT91_REG TWI_SR; // Status Register - AT91_REG TWI_IER; // Interrupt Enable Register - AT91_REG TWI_IDR; // Interrupt Disable Register - AT91_REG TWI_IMR; // Interrupt Mask Register - AT91_REG TWI_RHR; // Receive Holding Register - AT91_REG TWI_THR; // Transmit Holding Register -} AT91S_TWI , *AT91PS_TWI; - -// -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- -#define AT91C_TWI_START ((unsigned int) 0x1 << 0) // (TWI) Send a START Condition -#define AT91C_TWI_STOP ((unsigned int) 0x1 << 1) // (TWI) Send a STOP Condition -#define AT91C_TWI_MSEN ((unsigned int) 0x1 << 2) // (TWI) TWI Master Transfer Enabled -#define AT91C_TWI_MSDIS ((unsigned int) 0x1 << 3) // (TWI) TWI Master Transfer Disabled -#define AT91C_TWI_SWRST ((unsigned int) 0x1 << 7) // (TWI) Software Reset -// -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- -#define AT91C_TWI_IADRSZ ((unsigned int) 0x3 << 8) // (TWI) Internal Device Address Size -#define AT91C_TWI_IADRSZ_NO ((unsigned int) 0x0 << 8) // (TWI) No internal device address -#define AT91C_TWI_IADRSZ_1_BYTE ((unsigned int) 0x1 << 8) // (TWI) One-byte internal device address -#define AT91C_TWI_IADRSZ_2_BYTE ((unsigned int) 0x2 << 8) // (TWI) Two-byte internal device address -#define AT91C_TWI_IADRSZ_3_BYTE ((unsigned int) 0x3 << 8) // (TWI) Three-byte internal device address -#define AT91C_TWI_MREAD ((unsigned int) 0x1 << 12) // (TWI) Master Read Direction -#define AT91C_TWI_DADR ((unsigned int) 0x7F << 16) // (TWI) Device Address -// -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- -#define AT91C_TWI_CLDIV ((unsigned int) 0xFF << 0) // (TWI) Clock Low Divider -#define AT91C_TWI_CHDIV ((unsigned int) 0xFF << 8) // (TWI) Clock High Divider -#define AT91C_TWI_CKDIV ((unsigned int) 0x7 << 16) // (TWI) Clock Divider -// -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- -#define AT91C_TWI_TXCOMP ((unsigned int) 0x1 << 0) // (TWI) Transmission Completed -#define AT91C_TWI_RXRDY ((unsigned int) 0x1 << 1) // (TWI) Receive holding register ReaDY -#define AT91C_TWI_TXRDY ((unsigned int) 0x1 << 2) // (TWI) Transmit holding register ReaDY -#define AT91C_TWI_OVRE ((unsigned int) 0x1 << 6) // (TWI) Overrun Error -#define AT91C_TWI_UNRE ((unsigned int) 0x1 << 7) // (TWI) Underrun Error -#define AT91C_TWI_NACK ((unsigned int) 0x1 << 8) // (TWI) Not Acknowledged -// -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register -------- -// -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register -------- -// -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register -------- - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR PWMC Channel Interface -// ***************************************************************************** -typedef struct _AT91S_PWMC_CH -{ - AT91_REG PWMC_CMR; // Channel Mode Register - AT91_REG PWMC_CDTYR; // Channel Duty Cycle Register - AT91_REG PWMC_CPRDR; // Channel Period Register - AT91_REG PWMC_CCNTR; // Channel Counter Register - AT91_REG PWMC_CUPDR; // Channel Update Register - AT91_REG PWMC_Reserved[3]; // Reserved -} AT91S_PWMC_CH, *AT91PS_PWMC_CH; - -// -------- PWMC_CMR : (PWMC_CH Offset: 0x0) PWMC Channel Mode Register -------- -#define AT91C_PWMC_CPRE ((unsigned int) 0xF << 0) // (PWMC_CH) Channel Pre-scaler : PWMC_CLKx -#define AT91C_PWMC_CPRE_MCK ((unsigned int) 0x0) // (PWMC_CH) -#define AT91C_PWMC_CPRE_MCKA ((unsigned int) 0xB) // (PWMC_CH) -#define AT91C_PWMC_CPRE_MCKB ((unsigned int) 0xC) // (PWMC_CH) -#define AT91C_PWMC_CALG ((unsigned int) 0x1 << 8) // (PWMC_CH) Channel Alignment -#define AT91C_PWMC_CPOL ((unsigned int) 0x1 << 9) // (PWMC_CH) Channel Polarity -#define AT91C_PWMC_CPD ((unsigned int) 0x1 << 10) // (PWMC_CH) Channel Update Period -// -------- PWMC_CDTYR : (PWMC_CH Offset: 0x4) PWMC Channel Duty Cycle Register -------- -#define AT91C_PWMC_CDTY ((unsigned int) 0x0 << 0) // (PWMC_CH) Channel Duty Cycle -// -------- PWMC_CPRDR : (PWMC_CH Offset: 0x8) PWMC Channel Period Register -------- -#define AT91C_PWMC_CPRD ((unsigned int) 0x0 << 0) // (PWMC_CH) Channel Period -// -------- PWMC_CCNTR : (PWMC_CH Offset: 0xc) PWMC Channel Counter Register -------- -#define AT91C_PWMC_CCNT ((unsigned int) 0x0 << 0) // (PWMC_CH) Channel Counter -// -------- PWMC_CUPDR : (PWMC_CH Offset: 0x10) PWMC Channel Update Register -------- -#define AT91C_PWMC_CUPD ((unsigned int) 0x0 << 0) // (PWMC_CH) Channel Update - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Pulse Width Modulation Controller Interface -// ***************************************************************************** -typedef struct _AT91S_PWMC -{ - AT91_REG PWMC_MR; // PWMC Mode Register - AT91_REG PWMC_ENA; // PWMC Enable Register - AT91_REG PWMC_DIS; // PWMC Disable Register - AT91_REG PWMC_SR; // PWMC Status Register - AT91_REG PWMC_IER; // PWMC Interrupt Enable Register - AT91_REG PWMC_IDR; // PWMC Interrupt Disable Register - AT91_REG PWMC_IMR; // PWMC Interrupt Mask Register - AT91_REG PWMC_ISR; // PWMC Interrupt Status Register - AT91_REG Reserved0[55]; // - AT91_REG PWMC_VR; // PWMC Version Register - AT91_REG Reserved1[64]; // - AT91S_PWMC_CH PWMC_CH[4]; // PWMC Channel -} AT91S_PWMC , *AT91PS_PWMC; - -// -------- PWMC_MR : (PWMC Offset: 0x0) PWMC Mode Register -------- -#define AT91C_PWMC_DIVA ((unsigned int) 0xFF << 0) // (PWMC) CLKA divide factor. -#define AT91C_PWMC_PREA ((unsigned int) 0xF << 8) // (PWMC) Divider Input Clock Prescaler A -#define AT91C_PWMC_PREA_MCK ((unsigned int) 0x0 << 8) // (PWMC) -#define AT91C_PWMC_DIVB ((unsigned int) 0xFF << 16) // (PWMC) CLKB divide factor. -#define AT91C_PWMC_PREB ((unsigned int) 0xF << 24) // (PWMC) Divider Input Clock Prescaler B -#define AT91C_PWMC_PREB_MCK ((unsigned int) 0x0 << 24) // (PWMC) -// -------- PWMC_ENA : (PWMC Offset: 0x4) PWMC Enable Register -------- -#define AT91C_PWMC_CHID0 ((unsigned int) 0x1 << 0) // (PWMC) Channel ID 0 -#define AT91C_PWMC_CHID1 ((unsigned int) 0x1 << 1) // (PWMC) Channel ID 1 -#define AT91C_PWMC_CHID2 ((unsigned int) 0x1 << 2) // (PWMC) Channel ID 2 -#define AT91C_PWMC_CHID3 ((unsigned int) 0x1 << 3) // (PWMC) Channel ID 3 -// -------- PWMC_DIS : (PWMC Offset: 0x8) PWMC Disable Register -------- -// -------- PWMC_SR : (PWMC Offset: 0xc) PWMC Status Register -------- -// -------- PWMC_IER : (PWMC Offset: 0x10) PWMC Interrupt Enable Register -------- -// -------- PWMC_IDR : (PWMC Offset: 0x14) PWMC Interrupt Disable Register -------- -// -------- PWMC_IMR : (PWMC Offset: 0x18) PWMC Interrupt Mask Register -------- -// -------- PWMC_ISR : (PWMC Offset: 0x1c) PWMC Interrupt Status Register -------- - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR USB Device Interface -// ***************************************************************************** -typedef struct _AT91S_UDP -{ - AT91_REG UDP_NUM; // Frame Number Register - AT91_REG UDP_GLBSTATE; // Global State Register - AT91_REG UDP_FADDR; // Function Address Register - AT91_REG Reserved0[1]; // - AT91_REG UDP_IER; // Interrupt Enable Register - AT91_REG UDP_IDR; // Interrupt Disable Register - AT91_REG UDP_IMR; // Interrupt Mask Register - AT91_REG UDP_ISR; // Interrupt Status Register - AT91_REG UDP_ICR; // Interrupt Clear Register - AT91_REG Reserved1[1]; // - AT91_REG UDP_RSTEP; // Reset Endpoint Register - AT91_REG Reserved2[1]; // - AT91_REG UDP_CSR[6]; // Endpoint Control and Status Register - AT91_REG Reserved3[2]; // - AT91_REG UDP_FDR[6]; // Endpoint FIFO Data Register - AT91_REG Reserved4[3]; // - AT91_REG UDP_TXVC; // Transceiver Control Register -} AT91S_UDP , *AT91PS_UDP; - -// -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register -------- -#define AT91C_UDP_FRM_NUM ((unsigned int) 0x7FF << 0) // (UDP) Frame Number as Defined in the Packet Field Formats -#define AT91C_UDP_FRM_ERR ((unsigned int) 0x1 << 16) // (UDP) Frame Error -#define AT91C_UDP_FRM_OK ((unsigned int) 0x1 << 17) // (UDP) Frame OK -// -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register -------- -#define AT91C_UDP_FADDEN ((unsigned int) 0x1 << 0) // (UDP) Function Address Enable -#define AT91C_UDP_CONFG ((unsigned int) 0x1 << 1) // (UDP) Configured -#define AT91C_UDP_ESR ((unsigned int) 0x1 << 2) // (UDP) Enable Send Resume -#define AT91C_UDP_RSMINPR ((unsigned int) 0x1 << 3) // (UDP) A Resume Has Been Sent to the Host -#define AT91C_UDP_RMWUPE ((unsigned int) 0x1 << 4) // (UDP) Remote Wake Up Enable -// -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register -------- -#define AT91C_UDP_FADD ((unsigned int) 0xFF << 0) // (UDP) Function Address Value -#define AT91C_UDP_FEN ((unsigned int) 0x1 << 8) // (UDP) Function Enable -// -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register -------- -#define AT91C_UDP_EPINT0 ((unsigned int) 0x1 << 0) // (UDP) Endpoint 0 Interrupt -#define AT91C_UDP_EPINT1 ((unsigned int) 0x1 << 1) // (UDP) Endpoint 0 Interrupt -#define AT91C_UDP_EPINT2 ((unsigned int) 0x1 << 2) // (UDP) Endpoint 2 Interrupt -#define AT91C_UDP_EPINT3 ((unsigned int) 0x1 << 3) // (UDP) Endpoint 3 Interrupt -#define AT91C_UDP_EPINT4 ((unsigned int) 0x1 << 4) // (UDP) Endpoint 4 Interrupt -#define AT91C_UDP_EPINT5 ((unsigned int) 0x1 << 5) // (UDP) Endpoint 5 Interrupt -#define AT91C_UDP_RXSUSP ((unsigned int) 0x1 << 8) // (UDP) USB Suspend Interrupt -#define AT91C_UDP_RXRSM ((unsigned int) 0x1 << 9) // (UDP) USB Resume Interrupt -#define AT91C_UDP_EXTRSM ((unsigned int) 0x1 << 10) // (UDP) USB External Resume Interrupt -#define AT91C_UDP_SOFINT ((unsigned int) 0x1 << 11) // (UDP) USB Start Of frame Interrupt -#define AT91C_UDP_WAKEUP ((unsigned int) 0x1 << 13) // (UDP) USB Resume Interrupt -// -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register -------- -// -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register -------- -// -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register -------- -#define AT91C_UDP_ENDBUSRES ((unsigned int) 0x1 << 12) // (UDP) USB End Of Bus Reset Interrupt -// -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register -------- -// -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register -------- -#define AT91C_UDP_EP0 ((unsigned int) 0x1 << 0) // (UDP) Reset Endpoint 0 -#define AT91C_UDP_EP1 ((unsigned int) 0x1 << 1) // (UDP) Reset Endpoint 1 -#define AT91C_UDP_EP2 ((unsigned int) 0x1 << 2) // (UDP) Reset Endpoint 2 -#define AT91C_UDP_EP3 ((unsigned int) 0x1 << 3) // (UDP) Reset Endpoint 3 -#define AT91C_UDP_EP4 ((unsigned int) 0x1 << 4) // (UDP) Reset Endpoint 4 -#define AT91C_UDP_EP5 ((unsigned int) 0x1 << 5) // (UDP) Reset Endpoint 5 -// -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register -------- -#define AT91C_UDP_TXCOMP ((unsigned int) 0x1 << 0) // (UDP) Generates an IN packet with data previously written in the DPR -#define AT91C_UDP_RX_DATA_BK0 ((unsigned int) 0x1 << 1) // (UDP) Receive Data Bank 0 -#define AT91C_UDP_RXSETUP ((unsigned int) 0x1 << 2) // (UDP) Sends STALL to the Host (Control endpoints) -#define AT91C_UDP_ISOERROR ((unsigned int) 0x1 << 3) // (UDP) Isochronous error (Isochronous endpoints) -#define AT91C_UDP_TXPKTRDY ((unsigned int) 0x1 << 4) // (UDP) Transmit Packet Ready -#define AT91C_UDP_FORCESTALL ((unsigned int) 0x1 << 5) // (UDP) Force Stall (used by Control, Bulk and Isochronous endpoints). -#define AT91C_UDP_RX_DATA_BK1 ((unsigned int) 0x1 << 6) // (UDP) Receive Data Bank 1 (only used by endpoints with ping-pong attributes). -#define AT91C_UDP_DIR ((unsigned int) 0x1 << 7) // (UDP) Transfer Direction -#define AT91C_UDP_EPTYPE ((unsigned int) 0x7 << 8) // (UDP) Endpoint type -#define AT91C_UDP_EPTYPE_CTRL ((unsigned int) 0x0 << 8) // (UDP) Control -#define AT91C_UDP_EPTYPE_ISO_OUT ((unsigned int) 0x1 << 8) // (UDP) Isochronous OUT -#define AT91C_UDP_EPTYPE_BULK_OUT ((unsigned int) 0x2 << 8) // (UDP) Bulk OUT -#define AT91C_UDP_EPTYPE_INT_OUT ((unsigned int) 0x3 << 8) // (UDP) Interrupt OUT -#define AT91C_UDP_EPTYPE_ISO_IN ((unsigned int) 0x5 << 8) // (UDP) Isochronous IN -#define AT91C_UDP_EPTYPE_BULK_IN ((unsigned int) 0x6 << 8) // (UDP) Bulk IN -#define AT91C_UDP_EPTYPE_INT_IN ((unsigned int) 0x7 << 8) // (UDP) Interrupt IN -#define AT91C_UDP_DTGLE ((unsigned int) 0x1 << 11) // (UDP) Data Toggle -#define AT91C_UDP_EPEDS ((unsigned int) 0x1 << 15) // (UDP) Endpoint Enable Disable -#define AT91C_UDP_RXBYTECNT ((unsigned int) 0x7FF << 16) // (UDP) Number Of Bytes Available in the FIFO -// -------- UDP_TXVC : (UDP Offset: 0x74) Transceiver Control Register -------- -#define AT91C_UDP_TXVDIS ((unsigned int) 0x1 << 8) // (UDP) -#define AT91C_UDP_PUON ((unsigned int) 0x1 << 9) // (UDP) Pull-up ON - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Timer Counter Channel Interface -// ***************************************************************************** -typedef struct _AT91S_TC -{ - AT91_REG TC_CCR; // Channel Control Register - AT91_REG TC_CMR; // Channel Mode Register (Capture Mode / Waveform Mode) - AT91_REG Reserved0[2]; // - AT91_REG TC_CV; // Counter Value - AT91_REG TC_RA; // Register A - AT91_REG TC_RB; // Register B - AT91_REG TC_RC; // Register C - AT91_REG TC_SR; // Status Register - AT91_REG TC_IER; // Interrupt Enable Register - AT91_REG TC_IDR; // Interrupt Disable Register - AT91_REG TC_IMR; // Interrupt Mask Register -} AT91S_TC , *AT91PS_TC; - -// -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register -------- -#define AT91C_TC_CLKEN ((unsigned int) 0x1 << 0) // (TC) Counter Clock Enable Command -#define AT91C_TC_CLKDIS ((unsigned int) 0x1 << 1) // (TC) Counter Clock Disable Command -#define AT91C_TC_SWTRG ((unsigned int) 0x1 << 2) // (TC) Software Trigger Command -// -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode -------- -#define AT91C_TC_CLKS ((unsigned int) 0x7 << 0) // (TC) Clock Selection -#define AT91C_TC_CLKS_TIMER_DIV1_CLOCK ((unsigned int) 0x0) // (TC) Clock selected: TIMER_DIV1_CLOCK -#define AT91C_TC_CLKS_TIMER_DIV2_CLOCK ((unsigned int) 0x1) // (TC) Clock selected: TIMER_DIV2_CLOCK -#define AT91C_TC_CLKS_TIMER_DIV3_CLOCK ((unsigned int) 0x2) // (TC) Clock selected: TIMER_DIV3_CLOCK -#define AT91C_TC_CLKS_TIMER_DIV4_CLOCK ((unsigned int) 0x3) // (TC) Clock selected: TIMER_DIV4_CLOCK -#define AT91C_TC_CLKS_TIMER_DIV5_CLOCK ((unsigned int) 0x4) // (TC) Clock selected: TIMER_DIV5_CLOCK -#define AT91C_TC_CLKS_XC0 ((unsigned int) 0x5) // (TC) Clock selected: XC0 -#define AT91C_TC_CLKS_XC1 ((unsigned int) 0x6) // (TC) Clock selected: XC1 -#define AT91C_TC_CLKS_XC2 ((unsigned int) 0x7) // (TC) Clock selected: XC2 -#define AT91C_TC_CLKI ((unsigned int) 0x1 << 3) // (TC) Clock Invert -#define AT91C_TC_BURST ((unsigned int) 0x3 << 4) // (TC) Burst Signal Selection -#define AT91C_TC_BURST_NONE ((unsigned int) 0x0 << 4) // (TC) The clock is not gated by an external signal -#define AT91C_TC_BURST_XC0 ((unsigned int) 0x1 << 4) // (TC) XC0 is ANDed with the selected clock -#define AT91C_TC_BURST_XC1 ((unsigned int) 0x2 << 4) // (TC) XC1 is ANDed with the selected clock -#define AT91C_TC_BURST_XC2 ((unsigned int) 0x3 << 4) // (TC) XC2 is ANDed with the selected clock -#define AT91C_TC_CPCSTOP ((unsigned int) 0x1 << 6) // (TC) Counter Clock Stopped with RC Compare -#define AT91C_TC_LDBSTOP ((unsigned int) 0x1 << 6) // (TC) Counter Clock Stopped with RB Loading -#define AT91C_TC_LDBDIS ((unsigned int) 0x1 << 7) // (TC) Counter Clock Disabled with RB Loading -#define AT91C_TC_CPCDIS ((unsigned int) 0x1 << 7) // (TC) Counter Clock Disable with RC Compare -#define AT91C_TC_ETRGEDG ((unsigned int) 0x3 << 8) // (TC) External Trigger Edge Selection -#define AT91C_TC_ETRGEDG_NONE ((unsigned int) 0x0 << 8) // (TC) Edge: None -#define AT91C_TC_ETRGEDG_RISING ((unsigned int) 0x1 << 8) // (TC) Edge: rising edge -#define AT91C_TC_ETRGEDG_FALLING ((unsigned int) 0x2 << 8) // (TC) Edge: falling edge -#define AT91C_TC_ETRGEDG_BOTH ((unsigned int) 0x3 << 8) // (TC) Edge: each edge -#define AT91C_TC_EEVTEDG ((unsigned int) 0x3 << 8) // (TC) External Event Edge Selection -#define AT91C_TC_EEVTEDG_NONE ((unsigned int) 0x0 << 8) // (TC) Edge: None -#define AT91C_TC_EEVTEDG_RISING ((unsigned int) 0x1 << 8) // (TC) Edge: rising edge -#define AT91C_TC_EEVTEDG_FALLING ((unsigned int) 0x2 << 8) // (TC) Edge: falling edge -#define AT91C_TC_EEVTEDG_BOTH ((unsigned int) 0x3 << 8) // (TC) Edge: each edge -#define AT91C_TC_ABETRG ((unsigned int) 0x1 << 10) // (TC) TIOA or TIOB External Trigger Selection -#define AT91C_TC_EEVT ((unsigned int) 0x3 << 10) // (TC) External Event Selection -#define AT91C_TC_EEVT_TIOB ((unsigned int) 0x0 << 10) // (TC) Signal selected as external event: TIOB TIOB direction: input -#define AT91C_TC_EEVT_XC0 ((unsigned int) 0x1 << 10) // (TC) Signal selected as external event: XC0 TIOB direction: output -#define AT91C_TC_EEVT_XC1 ((unsigned int) 0x2 << 10) // (TC) Signal selected as external event: XC1 TIOB direction: output -#define AT91C_TC_EEVT_XC2 ((unsigned int) 0x3 << 10) // (TC) Signal selected as external event: XC2 TIOB direction: output -#define AT91C_TC_ENETRG ((unsigned int) 0x1 << 12) // (TC) External Event Trigger enable -#define AT91C_TC_WAVESEL ((unsigned int) 0x3 << 13) // (TC) Waveform Selection -#define AT91C_TC_WAVESEL_UP ((unsigned int) 0x0 << 13) // (TC) UP mode without atomatic trigger on RC Compare -#define AT91C_TC_WAVESEL_UPDOWN ((unsigned int) 0x1 << 13) // (TC) UPDOWN mode without automatic trigger on RC Compare -#define AT91C_TC_WAVESEL_UP_AUTO ((unsigned int) 0x2 << 13) // (TC) UP mode with automatic trigger on RC Compare -#define AT91C_TC_WAVESEL_UPDOWN_AUTO ((unsigned int) 0x3 << 13) // (TC) UPDOWN mode with automatic trigger on RC Compare -#define AT91C_TC_CPCTRG ((unsigned int) 0x1 << 14) // (TC) RC Compare Trigger Enable -#define AT91C_TC_WAVE ((unsigned int) 0x1 << 15) // (TC) -#define AT91C_TC_LDRA ((unsigned int) 0x3 << 16) // (TC) RA Loading Selection -#define AT91C_TC_LDRA_NONE ((unsigned int) 0x0 << 16) // (TC) Edge: None -#define AT91C_TC_LDRA_RISING ((unsigned int) 0x1 << 16) // (TC) Edge: rising edge of TIOA -#define AT91C_TC_LDRA_FALLING ((unsigned int) 0x2 << 16) // (TC) Edge: falling edge of TIOA -#define AT91C_TC_LDRA_BOTH ((unsigned int) 0x3 << 16) // (TC) Edge: each edge of TIOA -#define AT91C_TC_ACPA ((unsigned int) 0x3 << 16) // (TC) RA Compare Effect on TIOA -#define AT91C_TC_ACPA_NONE ((unsigned int) 0x0 << 16) // (TC) Effect: none -#define AT91C_TC_ACPA_SET ((unsigned int) 0x1 << 16) // (TC) Effect: set -#define AT91C_TC_ACPA_CLEAR ((unsigned int) 0x2 << 16) // (TC) Effect: clear -#define AT91C_TC_ACPA_TOGGLE ((unsigned int) 0x3 << 16) // (TC) Effect: toggle -#define AT91C_TC_LDRB ((unsigned int) 0x3 << 18) // (TC) RB Loading Selection -#define AT91C_TC_LDRB_NONE ((unsigned int) 0x0 << 18) // (TC) Edge: None -#define AT91C_TC_LDRB_RISING ((unsigned int) 0x1 << 18) // (TC) Edge: rising edge of TIOA -#define AT91C_TC_LDRB_FALLING ((unsigned int) 0x2 << 18) // (TC) Edge: falling edge of TIOA -#define AT91C_TC_LDRB_BOTH ((unsigned int) 0x3 << 18) // (TC) Edge: each edge of TIOA -#define AT91C_TC_ACPC ((unsigned int) 0x3 << 18) // (TC) RC Compare Effect on TIOA -#define AT91C_TC_ACPC_NONE ((unsigned int) 0x0 << 18) // (TC) Effect: none -#define AT91C_TC_ACPC_SET ((unsigned int) 0x1 << 18) // (TC) Effect: set -#define AT91C_TC_ACPC_CLEAR ((unsigned int) 0x2 << 18) // (TC) Effect: clear -#define AT91C_TC_ACPC_TOGGLE ((unsigned int) 0x3 << 18) // (TC) Effect: toggle -#define AT91C_TC_AEEVT ((unsigned int) 0x3 << 20) // (TC) External Event Effect on TIOA -#define AT91C_TC_AEEVT_NONE ((unsigned int) 0x0 << 20) // (TC) Effect: none -#define AT91C_TC_AEEVT_SET ((unsigned int) 0x1 << 20) // (TC) Effect: set -#define AT91C_TC_AEEVT_CLEAR ((unsigned int) 0x2 << 20) // (TC) Effect: clear -#define AT91C_TC_AEEVT_TOGGLE ((unsigned int) 0x3 << 20) // (TC) Effect: toggle -#define AT91C_TC_ASWTRG ((unsigned int) 0x3 << 22) // (TC) Software Trigger Effect on TIOA -#define AT91C_TC_ASWTRG_NONE ((unsigned int) 0x0 << 22) // (TC) Effect: none -#define AT91C_TC_ASWTRG_SET ((unsigned int) 0x1 << 22) // (TC) Effect: set -#define AT91C_TC_ASWTRG_CLEAR ((unsigned int) 0x2 << 22) // (TC) Effect: clear -#define AT91C_TC_ASWTRG_TOGGLE ((unsigned int) 0x3 << 22) // (TC) Effect: toggle -#define AT91C_TC_BCPB ((unsigned int) 0x3 << 24) // (TC) RB Compare Effect on TIOB -#define AT91C_TC_BCPB_NONE ((unsigned int) 0x0 << 24) // (TC) Effect: none -#define AT91C_TC_BCPB_SET ((unsigned int) 0x1 << 24) // (TC) Effect: set -#define AT91C_TC_BCPB_CLEAR ((unsigned int) 0x2 << 24) // (TC) Effect: clear -#define AT91C_TC_BCPB_TOGGLE ((unsigned int) 0x3 << 24) // (TC) Effect: toggle -#define AT91C_TC_BCPC ((unsigned int) 0x3 << 26) // (TC) RC Compare Effect on TIOB -#define AT91C_TC_BCPC_NONE ((unsigned int) 0x0 << 26) // (TC) Effect: none -#define AT91C_TC_BCPC_SET ((unsigned int) 0x1 << 26) // (TC) Effect: set -#define AT91C_TC_BCPC_CLEAR ((unsigned int) 0x2 << 26) // (TC) Effect: clear -#define AT91C_TC_BCPC_TOGGLE ((unsigned int) 0x3 << 26) // (TC) Effect: toggle -#define AT91C_TC_BEEVT ((unsigned int) 0x3 << 28) // (TC) External Event Effect on TIOB -#define AT91C_TC_BEEVT_NONE ((unsigned int) 0x0 << 28) // (TC) Effect: none -#define AT91C_TC_BEEVT_SET ((unsigned int) 0x1 << 28) // (TC) Effect: set -#define AT91C_TC_BEEVT_CLEAR ((unsigned int) 0x2 << 28) // (TC) Effect: clear -#define AT91C_TC_BEEVT_TOGGLE ((unsigned int) 0x3 << 28) // (TC) Effect: toggle -#define AT91C_TC_BSWTRG ((unsigned int) 0x3 << 30) // (TC) Software Trigger Effect on TIOB -#define AT91C_TC_BSWTRG_NONE ((unsigned int) 0x0 << 30) // (TC) Effect: none -#define AT91C_TC_BSWTRG_SET ((unsigned int) 0x1 << 30) // (TC) Effect: set -#define AT91C_TC_BSWTRG_CLEAR ((unsigned int) 0x2 << 30) // (TC) Effect: clear -#define AT91C_TC_BSWTRG_TOGGLE ((unsigned int) 0x3 << 30) // (TC) Effect: toggle -// -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register -------- -#define AT91C_TC_COVFS ((unsigned int) 0x1 << 0) // (TC) Counter Overflow -#define AT91C_TC_LOVRS ((unsigned int) 0x1 << 1) // (TC) Load Overrun -#define AT91C_TC_CPAS ((unsigned int) 0x1 << 2) // (TC) RA Compare -#define AT91C_TC_CPBS ((unsigned int) 0x1 << 3) // (TC) RB Compare -#define AT91C_TC_CPCS ((unsigned int) 0x1 << 4) // (TC) RC Compare -#define AT91C_TC_LDRAS ((unsigned int) 0x1 << 5) // (TC) RA Loading -#define AT91C_TC_LDRBS ((unsigned int) 0x1 << 6) // (TC) RB Loading -#define AT91C_TC_ETRGS ((unsigned int) 0x1 << 7) // (TC) External Trigger -#define AT91C_TC_CLKSTA ((unsigned int) 0x1 << 16) // (TC) Clock Enabling -#define AT91C_TC_MTIOA ((unsigned int) 0x1 << 17) // (TC) TIOA Mirror -#define AT91C_TC_MTIOB ((unsigned int) 0x1 << 18) // (TC) TIOA Mirror -// -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register -------- -// -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register -------- -// -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register -------- - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Timer Counter Interface -// ***************************************************************************** -typedef struct _AT91S_TCB -{ - AT91S_TC TCB_TC0; // TC Channel 0 - AT91_REG Reserved0[4]; // - AT91S_TC TCB_TC1; // TC Channel 1 - AT91_REG Reserved1[4]; // - AT91S_TC TCB_TC2; // TC Channel 2 - AT91_REG Reserved2[4]; // - AT91_REG TCB_BCR; // TC Block Control Register - AT91_REG TCB_BMR; // TC Block Mode Register -} AT91S_TCB , *AT91PS_TCB; - -// -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register -------- -#define AT91C_TCB_SYNC ((unsigned int) 0x1 << 0) // (TCB) Synchro Command -// -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register -------- -#define AT91C_TCB_TC0XC0S ((unsigned int) 0x3 << 0) // (TCB) External Clock Signal 0 Selection -#define AT91C_TCB_TC0XC0S_TCLK0 ((unsigned int) 0x0) // (TCB) TCLK0 connected to XC0 -#define AT91C_TCB_TC0XC0S_NONE ((unsigned int) 0x1) // (TCB) None signal connected to XC0 -#define AT91C_TCB_TC0XC0S_TIOA1 ((unsigned int) 0x2) // (TCB) TIOA1 connected to XC0 -#define AT91C_TCB_TC0XC0S_TIOA2 ((unsigned int) 0x3) // (TCB) TIOA2 connected to XC0 -#define AT91C_TCB_TC1XC1S ((unsigned int) 0x3 << 2) // (TCB) External Clock Signal 1 Selection -#define AT91C_TCB_TC1XC1S_TCLK1 ((unsigned int) 0x0 << 2) // (TCB) TCLK1 connected to XC1 -#define AT91C_TCB_TC1XC1S_NONE ((unsigned int) 0x1 << 2) // (TCB) None signal connected to XC1 -#define AT91C_TCB_TC1XC1S_TIOA0 ((unsigned int) 0x2 << 2) // (TCB) TIOA0 connected to XC1 -#define AT91C_TCB_TC1XC1S_TIOA2 ((unsigned int) 0x3 << 2) // (TCB) TIOA2 connected to XC1 -#define AT91C_TCB_TC2XC2S ((unsigned int) 0x3 << 4) // (TCB) External Clock Signal 2 Selection -#define AT91C_TCB_TC2XC2S_TCLK2 ((unsigned int) 0x0 << 4) // (TCB) TCLK2 connected to XC2 -#define AT91C_TCB_TC2XC2S_NONE ((unsigned int) 0x1 << 4) // (TCB) None signal connected to XC2 -#define AT91C_TCB_TC2XC2S_TIOA0 ((unsigned int) 0x2 << 4) // (TCB) TIOA0 connected to XC2 -#define AT91C_TCB_TC2XC2S_TIOA1 ((unsigned int) 0x3 << 4) // (TCB) TIOA2 connected to XC2 - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Control Area Network MailBox Interface -// ***************************************************************************** -typedef struct _AT91S_CAN_MB -{ - AT91_REG CAN_MB_MMR; // MailBox Mode Register - AT91_REG CAN_MB_MAM; // MailBox Acceptance Mask Register - AT91_REG CAN_MB_MID; // MailBox ID Register - AT91_REG CAN_MB_MFID; // MailBox Family ID Register - AT91_REG CAN_MB_MSR; // MailBox Status Register - AT91_REG CAN_MB_MDL; // MailBox Data Low Register - AT91_REG CAN_MB_MDH; // MailBox Data High Register - AT91_REG CAN_MB_MCR; // MailBox Control Register -} AT91S_CAN_MB , *AT91PS_CAN_MB; - -// -------- CAN_MMR : (CAN_MB Offset: 0x0) CAN Message Mode Register -------- -#define AT91C_CAN_MTIMEMARK ((unsigned int) 0xFFFF << 0) // (CAN_MB) Mailbox Timemark -#define AT91C_CAN_PRIOR ((unsigned int) 0xF << 16) // (CAN_MB) Mailbox Priority -#define AT91C_CAN_MOT ((unsigned int) 0x7 << 24) // (CAN_MB) Mailbox Object Type -#define AT91C_CAN_MOT_DIS ((unsigned int) 0x0 << 24) // (CAN_MB) -#define AT91C_CAN_MOT_RX ((unsigned int) 0x1 << 24) // (CAN_MB) -#define AT91C_CAN_MOT_RXOVERWRITE ((unsigned int) 0x2 << 24) // (CAN_MB) -#define AT91C_CAN_MOT_TX ((unsigned int) 0x3 << 24) // (CAN_MB) -#define AT91C_CAN_MOT_CONSUMER ((unsigned int) 0x4 << 24) // (CAN_MB) -#define AT91C_CAN_MOT_PRODUCER ((unsigned int) 0x5 << 24) // (CAN_MB) -// -------- CAN_MAM : (CAN_MB Offset: 0x4) CAN Message Acceptance Mask Register -------- -#define AT91C_CAN_MIDvB ((unsigned int) 0x3FFFF << 0) // (CAN_MB) Complementary bits for identifier in extended mode -#define AT91C_CAN_MIDvA ((unsigned int) 0x7FF << 18) // (CAN_MB) Identifier for standard frame mode -#define AT91C_CAN_MIDE ((unsigned int) 0x1 << 29) // (CAN_MB) Identifier Version -// -------- CAN_MID : (CAN_MB Offset: 0x8) CAN Message ID Register -------- -// -------- CAN_MFID : (CAN_MB Offset: 0xc) CAN Message Family ID Register -------- -// -------- CAN_MSR : (CAN_MB Offset: 0x10) CAN Message Status Register -------- -#define AT91C_CAN_MTIMESTAMP ((unsigned int) 0xFFFF << 0) // (CAN_MB) Timer Value -#define AT91C_CAN_MDLC ((unsigned int) 0xF << 16) // (CAN_MB) Mailbox Data Length Code -#define AT91C_CAN_MRTR ((unsigned int) 0x1 << 20) // (CAN_MB) Mailbox Remote Transmission Request -#define AT91C_CAN_MABT ((unsigned int) 0x1 << 22) // (CAN_MB) Mailbox Message Abort -#define AT91C_CAN_MRDY ((unsigned int) 0x1 << 23) // (CAN_MB) Mailbox Ready -#define AT91C_CAN_MMI ((unsigned int) 0x1 << 24) // (CAN_MB) Mailbox Message Ignored -// -------- CAN_MDL : (CAN_MB Offset: 0x14) CAN Message Data Low Register -------- -// -------- CAN_MDH : (CAN_MB Offset: 0x18) CAN Message Data High Register -------- -// -------- CAN_MCR : (CAN_MB Offset: 0x1c) CAN Message Control Register -------- -#define AT91C_CAN_MACR ((unsigned int) 0x1 << 22) // (CAN_MB) Abort Request for Mailbox -#define AT91C_CAN_MTCR ((unsigned int) 0x1 << 23) // (CAN_MB) Mailbox Transfer Command - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Control Area Network Interface -// ***************************************************************************** -typedef struct _AT91S_CAN -{ - AT91_REG CAN_MR; // Mode Register - AT91_REG CAN_IER; // Interrupt Enable Register - AT91_REG CAN_IDR; // Interrupt Disable Register - AT91_REG CAN_IMR; // Interrupt Mask Register - AT91_REG CAN_SR; // Status Register - AT91_REG CAN_BR; // Baudrate Register - AT91_REG CAN_TIM; // Timer Register - AT91_REG CAN_TIMESTP; // Time Stamp Register - AT91_REG CAN_ECR; // Error Counter Register - AT91_REG CAN_TCR; // Transfer Command Register - AT91_REG CAN_ACR; // Abort Command Register - AT91_REG Reserved0[52]; // - AT91_REG CAN_VR; // Version Register - AT91_REG Reserved1[64]; // - AT91S_CAN_MB CAN_MB0; // CAN Mailbox 0 - AT91S_CAN_MB CAN_MB1; // CAN Mailbox 1 - AT91S_CAN_MB CAN_MB2; // CAN Mailbox 2 - AT91S_CAN_MB CAN_MB3; // CAN Mailbox 3 - AT91S_CAN_MB CAN_MB4; // CAN Mailbox 4 - AT91S_CAN_MB CAN_MB5; // CAN Mailbox 5 - AT91S_CAN_MB CAN_MB6; // CAN Mailbox 6 - AT91S_CAN_MB CAN_MB7; // CAN Mailbox 7 - AT91S_CAN_MB CAN_MB8; // CAN Mailbox 8 - AT91S_CAN_MB CAN_MB9; // CAN Mailbox 9 - AT91S_CAN_MB CAN_MB10; // CAN Mailbox 10 - AT91S_CAN_MB CAN_MB11; // CAN Mailbox 11 - AT91S_CAN_MB CAN_MB12; // CAN Mailbox 12 - AT91S_CAN_MB CAN_MB13; // CAN Mailbox 13 - AT91S_CAN_MB CAN_MB14; // CAN Mailbox 14 - AT91S_CAN_MB CAN_MB15; // CAN Mailbox 15 -} AT91S_CAN , *AT91PS_CAN; - -// -------- CAN_MR : (CAN Offset: 0x0) CAN Mode Register -------- -#define AT91C_CAN_CANEN ((unsigned int) 0x1 << 0) // (CAN) CAN Controller Enable -#define AT91C_CAN_LPM ((unsigned int) 0x1 << 1) // (CAN) Disable/Enable Low Power Mode -#define AT91C_CAN_ABM ((unsigned int) 0x1 << 2) // (CAN) Disable/Enable Autobaud/Listen Mode -#define AT91C_CAN_OVL ((unsigned int) 0x1 << 3) // (CAN) Disable/Enable Overload Frame -#define AT91C_CAN_TEOF ((unsigned int) 0x1 << 4) // (CAN) Time Stamp messages at each end of Frame -#define AT91C_CAN_TTM ((unsigned int) 0x1 << 5) // (CAN) Disable/Enable Time Trigger Mode -#define AT91C_CAN_TIMFRZ ((unsigned int) 0x1 << 6) // (CAN) Enable Timer Freeze -#define AT91C_CAN_DRPT ((unsigned int) 0x1 << 7) // (CAN) Disable Repeat -// -------- CAN_IER : (CAN Offset: 0x4) CAN Interrupt Enable Register -------- -#define AT91C_CAN_MB0 ((unsigned int) 0x1 << 0) // (CAN) Mailbox 0 Flag -#define AT91C_CAN_MB1 ((unsigned int) 0x1 << 1) // (CAN) Mailbox 1 Flag -#define AT91C_CAN_MB2 ((unsigned int) 0x1 << 2) // (CAN) Mailbox 2 Flag -#define AT91C_CAN_MB3 ((unsigned int) 0x1 << 3) // (CAN) Mailbox 3 Flag -#define AT91C_CAN_MB4 ((unsigned int) 0x1 << 4) // (CAN) Mailbox 4 Flag -#define AT91C_CAN_MB5 ((unsigned int) 0x1 << 5) // (CAN) Mailbox 5 Flag -#define AT91C_CAN_MB6 ((unsigned int) 0x1 << 6) // (CAN) Mailbox 6 Flag -#define AT91C_CAN_MB7 ((unsigned int) 0x1 << 7) // (CAN) Mailbox 7 Flag -#define AT91C_CAN_MB8 ((unsigned int) 0x1 << 8) // (CAN) Mailbox 8 Flag -#define AT91C_CAN_MB9 ((unsigned int) 0x1 << 9) // (CAN) Mailbox 9 Flag -#define AT91C_CAN_MB10 ((unsigned int) 0x1 << 10) // (CAN) Mailbox 10 Flag -#define AT91C_CAN_MB11 ((unsigned int) 0x1 << 11) // (CAN) Mailbox 11 Flag -#define AT91C_CAN_MB12 ((unsigned int) 0x1 << 12) // (CAN) Mailbox 12 Flag -#define AT91C_CAN_MB13 ((unsigned int) 0x1 << 13) // (CAN) Mailbox 13 Flag -#define AT91C_CAN_MB14 ((unsigned int) 0x1 << 14) // (CAN) Mailbox 14 Flag -#define AT91C_CAN_MB15 ((unsigned int) 0x1 << 15) // (CAN) Mailbox 15 Flag -#define AT91C_CAN_ERRA ((unsigned int) 0x1 << 16) // (CAN) Error Active Mode Flag -#define AT91C_CAN_WARN ((unsigned int) 0x1 << 17) // (CAN) Warning Limit Flag -#define AT91C_CAN_ERRP ((unsigned int) 0x1 << 18) // (CAN) Error Passive Mode Flag -#define AT91C_CAN_BOFF ((unsigned int) 0x1 << 19) // (CAN) Bus Off Mode Flag -#define AT91C_CAN_SLEEP ((unsigned int) 0x1 << 20) // (CAN) Sleep Flag -#define AT91C_CAN_WAKEUP ((unsigned int) 0x1 << 21) // (CAN) Wakeup Flag -#define AT91C_CAN_TOVF ((unsigned int) 0x1 << 22) // (CAN) Timer Overflow Flag -#define AT91C_CAN_TSTP ((unsigned int) 0x1 << 23) // (CAN) Timestamp Flag -#define AT91C_CAN_CERR ((unsigned int) 0x1 << 24) // (CAN) CRC Error -#define AT91C_CAN_SERR ((unsigned int) 0x1 << 25) // (CAN) Stuffing Error -#define AT91C_CAN_AERR ((unsigned int) 0x1 << 26) // (CAN) Acknowledgment Error -#define AT91C_CAN_FERR ((unsigned int) 0x1 << 27) // (CAN) Form Error -#define AT91C_CAN_BERR ((unsigned int) 0x1 << 28) // (CAN) Bit Error -// -------- CAN_IDR : (CAN Offset: 0x8) CAN Interrupt Disable Register -------- -// -------- CAN_IMR : (CAN Offset: 0xc) CAN Interrupt Mask Register -------- -// -------- CAN_SR : (CAN Offset: 0x10) CAN Status Register -------- -#define AT91C_CAN_RBSY ((unsigned int) 0x1 << 29) // (CAN) Receiver Busy -#define AT91C_CAN_TBSY ((unsigned int) 0x1 << 30) // (CAN) Transmitter Busy -#define AT91C_CAN_OVLY ((unsigned int) 0x1 << 31) // (CAN) Overload Busy -// -------- CAN_BR : (CAN Offset: 0x14) CAN Baudrate Register -------- -#define AT91C_CAN_PHASE2 ((unsigned int) 0x7 << 0) // (CAN) Phase 2 segment -#define AT91C_CAN_PHASE1 ((unsigned int) 0x7 << 4) // (CAN) Phase 1 segment -#define AT91C_CAN_PROPAG ((unsigned int) 0x7 << 8) // (CAN) Programmation time segment -#define AT91C_CAN_SYNC ((unsigned int) 0x3 << 12) // (CAN) Re-synchronization jump width segment -#define AT91C_CAN_BRP ((unsigned int) 0x7F << 16) // (CAN) Baudrate Prescaler -#define AT91C_CAN_SMP ((unsigned int) 0x1 << 24) // (CAN) Sampling mode -// -------- CAN_TIM : (CAN Offset: 0x18) CAN Timer Register -------- -#define AT91C_CAN_TIMER ((unsigned int) 0xFFFF << 0) // (CAN) Timer field -// -------- CAN_TIMESTP : (CAN Offset: 0x1c) CAN Timestamp Register -------- -// -------- CAN_ECR : (CAN Offset: 0x20) CAN Error Counter Register -------- -#define AT91C_CAN_REC ((unsigned int) 0xFF << 0) // (CAN) Receive Error Counter -#define AT91C_CAN_TEC ((unsigned int) 0xFF << 16) // (CAN) Transmit Error Counter -// -------- CAN_TCR : (CAN Offset: 0x24) CAN Transfer Command Register -------- -#define AT91C_CAN_TIMRST ((unsigned int) 0x1 << 31) // (CAN) Timer Reset Field -// -------- CAN_ACR : (CAN Offset: 0x28) CAN Abort Command Register -------- - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Ethernet MAC 10/100 -// ***************************************************************************** -typedef struct _AT91S_EMAC -{ - AT91_REG EMAC_NCR; // Network Control Register - AT91_REG EMAC_NCFGR; // Network Configuration Register - AT91_REG EMAC_NSR; // Network Status Register - AT91_REG Reserved0[2]; // - AT91_REG EMAC_TSR; // Transmit Status Register - AT91_REG EMAC_RBQP; // Receive Buffer Queue Pointer - AT91_REG EMAC_TBQP; // Transmit Buffer Queue Pointer - AT91_REG EMAC_RSR; // Receive Status Register - AT91_REG EMAC_ISR; // Interrupt Status Register - AT91_REG EMAC_IER; // Interrupt Enable Register - AT91_REG EMAC_IDR; // Interrupt Disable Register - AT91_REG EMAC_IMR; // Interrupt Mask Register - AT91_REG EMAC_MAN; // PHY Maintenance Register - AT91_REG EMAC_PTR; // Pause Time Register - AT91_REG EMAC_PFR; // Pause Frames received Register - AT91_REG EMAC_FTO; // Frames Transmitted OK Register - AT91_REG EMAC_SCF; // Single Collision Frame Register - AT91_REG EMAC_MCF; // Multiple Collision Frame Register - AT91_REG EMAC_FRO; // Frames Received OK Register - AT91_REG EMAC_FCSE; // Frame Check Sequence Error Register - AT91_REG EMAC_ALE; // Alignment Error Register - AT91_REG EMAC_DTF; // Deferred Transmission Frame Register - AT91_REG EMAC_LCOL; // Late Collision Register - AT91_REG EMAC_ECOL; // Excessive Collision Register - AT91_REG EMAC_TUND; // Transmit Underrun Error Register - AT91_REG EMAC_CSE; // Carrier Sense Error Register - AT91_REG EMAC_RRE; // Receive Ressource Error Register - AT91_REG EMAC_ROV; // Receive Overrun Errors Register - AT91_REG EMAC_RSE; // Receive Symbol Errors Register - AT91_REG EMAC_ELE; // Excessive Length Errors Register - AT91_REG EMAC_RJA; // Receive Jabbers Register - AT91_REG EMAC_USF; // Undersize Frames Register - AT91_REG EMAC_STE; // SQE Test Error Register - AT91_REG EMAC_RLE; // Receive Length Field Mismatch Register - AT91_REG EMAC_TPF; // Transmitted Pause Frames Register - AT91_REG EMAC_HRB; // Hash Address Bottom[31:0] - AT91_REG EMAC_HRT; // Hash Address Top[63:32] - AT91_REG EMAC_SA1L; // Specific Address 1 Bottom, First 4 bytes - AT91_REG EMAC_SA1H; // Specific Address 1 Top, Last 2 bytes - AT91_REG EMAC_SA2L; // Specific Address 2 Bottom, First 4 bytes - AT91_REG EMAC_SA2H; // Specific Address 2 Top, Last 2 bytes - AT91_REG EMAC_SA3L; // Specific Address 3 Bottom, First 4 bytes - AT91_REG EMAC_SA3H; // Specific Address 3 Top, Last 2 bytes - AT91_REG EMAC_SA4L; // Specific Address 4 Bottom, First 4 bytes - AT91_REG EMAC_SA4H; // Specific Address 4 Top, Last 2 bytes - AT91_REG EMAC_TID; // Type ID Checking Register - AT91_REG EMAC_TPQ; // Transmit Pause Quantum Register - AT91_REG EMAC_USRIO; // USER Input/Output Register - AT91_REG EMAC_WOL; // Wake On LAN Register - AT91_REG Reserved1[13]; // - AT91_REG EMAC_REV; // Revision Register -} AT91S_EMAC , *AT91PS_EMAC; - -// -------- EMAC_NCR : (EMAC Offset: 0x0) -------- -#define AT91C_EMAC_LB ((unsigned int) 0x1 << 0) // (EMAC) Loopback. Optional. When set, loopback signal is at high level. -#define AT91C_EMAC_LLB ((unsigned int) 0x1 << 1) // (EMAC) Loopback local. -#define AT91C_EMAC_RE ((unsigned int) 0x1 << 2) // (EMAC) Receive enable. -#define AT91C_EMAC_TE ((unsigned int) 0x1 << 3) // (EMAC) Transmit enable. -#define AT91C_EMAC_MPE ((unsigned int) 0x1 << 4) // (EMAC) Management port enable. -#define AT91C_EMAC_CLRSTAT ((unsigned int) 0x1 << 5) // (EMAC) Clear statistics registers. -#define AT91C_EMAC_INCSTAT ((unsigned int) 0x1 << 6) // (EMAC) Increment statistics registers. -#define AT91C_EMAC_WESTAT ((unsigned int) 0x1 << 7) // (EMAC) Write enable for statistics registers. -#define AT91C_EMAC_BP ((unsigned int) 0x1 << 8) // (EMAC) Back pressure. -#define AT91C_EMAC_TSTART ((unsigned int) 0x1 << 9) // (EMAC) Start Transmission. -#define AT91C_EMAC_THALT ((unsigned int) 0x1 << 10) // (EMAC) Transmission Halt. -#define AT91C_EMAC_TPFR ((unsigned int) 0x1 << 11) // (EMAC) Transmit pause frame -#define AT91C_EMAC_TZQ ((unsigned int) 0x1 << 12) // (EMAC) Transmit zero quantum pause frame -// -------- EMAC_NCFGR : (EMAC Offset: 0x4) Network Configuration Register -------- -#define AT91C_EMAC_SPD ((unsigned int) 0x1 << 0) // (EMAC) Speed. -#define AT91C_EMAC_FD ((unsigned int) 0x1 << 1) // (EMAC) Full duplex. -#define AT91C_EMAC_JFRAME ((unsigned int) 0x1 << 3) // (EMAC) Jumbo Frames. -#define AT91C_EMAC_CAF ((unsigned int) 0x1 << 4) // (EMAC) Copy all frames. -#define AT91C_EMAC_NBC ((unsigned int) 0x1 << 5) // (EMAC) No broadcast. -#define AT91C_EMAC_MTI ((unsigned int) 0x1 << 6) // (EMAC) Multicast hash event enable -#define AT91C_EMAC_UNI ((unsigned int) 0x1 << 7) // (EMAC) Unicast hash enable. -#define AT91C_EMAC_BIG ((unsigned int) 0x1 << 8) // (EMAC) Receive 1522 bytes. -#define AT91C_EMAC_EAE ((unsigned int) 0x1 << 9) // (EMAC) External address match enable. -#define AT91C_EMAC_CLK ((unsigned int) 0x3 << 10) // (EMAC) -#define AT91C_EMAC_CLK_HCLK_8 ((unsigned int) 0x0 << 10) // (EMAC) HCLK divided by 8 -#define AT91C_EMAC_CLK_HCLK_16 ((unsigned int) 0x1 << 10) // (EMAC) HCLK divided by 16 -#define AT91C_EMAC_CLK_HCLK_32 ((unsigned int) 0x2 << 10) // (EMAC) HCLK divided by 32 -#define AT91C_EMAC_CLK_HCLK_64 ((unsigned int) 0x3 << 10) // (EMAC) HCLK divided by 64 -#define AT91C_EMAC_RTY ((unsigned int) 0x1 << 12) // (EMAC) -#define AT91C_EMAC_PAE ((unsigned int) 0x1 << 13) // (EMAC) -#define AT91C_EMAC_RBOF ((unsigned int) 0x3 << 14) // (EMAC) -#define AT91C_EMAC_RBOF_OFFSET_0 ((unsigned int) 0x0 << 14) // (EMAC) no offset from start of receive buffer -#define AT91C_EMAC_RBOF_OFFSET_1 ((unsigned int) 0x1 << 14) // (EMAC) one byte offset from start of receive buffer -#define AT91C_EMAC_RBOF_OFFSET_2 ((unsigned int) 0x2 << 14) // (EMAC) two bytes offset from start of receive buffer -#define AT91C_EMAC_RBOF_OFFSET_3 ((unsigned int) 0x3 << 14) // (EMAC) three bytes offset from start of receive buffer -#define AT91C_EMAC_RLCE ((unsigned int) 0x1 << 16) // (EMAC) Receive Length field Checking Enable -#define AT91C_EMAC_DRFCS ((unsigned int) 0x1 << 17) // (EMAC) Discard Receive FCS -#define AT91C_EMAC_EFRHD ((unsigned int) 0x1 << 18) // (EMAC) -#define AT91C_EMAC_IRXFCS ((unsigned int) 0x1 << 19) // (EMAC) Ignore RX FCS -// -------- EMAC_NSR : (EMAC Offset: 0x8) Network Status Register -------- -#define AT91C_EMAC_LINKR ((unsigned int) 0x1 << 0) // (EMAC) -#define AT91C_EMAC_MDIO ((unsigned int) 0x1 << 1) // (EMAC) -#define AT91C_EMAC_IDLE ((unsigned int) 0x1 << 2) // (EMAC) -// -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Status Register -------- -#define AT91C_EMAC_UBR ((unsigned int) 0x1 << 0) // (EMAC) -#define AT91C_EMAC_COL ((unsigned int) 0x1 << 1) // (EMAC) -#define AT91C_EMAC_RLES ((unsigned int) 0x1 << 2) // (EMAC) -#define AT91C_EMAC_TGO ((unsigned int) 0x1 << 3) // (EMAC) Transmit Go -#define AT91C_EMAC_BEX ((unsigned int) 0x1 << 4) // (EMAC) Buffers exhausted mid frame -#define AT91C_EMAC_COMP ((unsigned int) 0x1 << 5) // (EMAC) -#define AT91C_EMAC_UND ((unsigned int) 0x1 << 6) // (EMAC) -// -------- EMAC_RSR : (EMAC Offset: 0x20) Receive Status Register -------- -#define AT91C_EMAC_BNA ((unsigned int) 0x1 << 0) // (EMAC) -#define AT91C_EMAC_REC ((unsigned int) 0x1 << 1) // (EMAC) -#define AT91C_EMAC_OVR ((unsigned int) 0x1 << 2) // (EMAC) -// -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register -------- -#define AT91C_EMAC_MFD ((unsigned int) 0x1 << 0) // (EMAC) -#define AT91C_EMAC_RCOMP ((unsigned int) 0x1 << 1) // (EMAC) -#define AT91C_EMAC_RXUBR ((unsigned int) 0x1 << 2) // (EMAC) -#define AT91C_EMAC_TXUBR ((unsigned int) 0x1 << 3) // (EMAC) -#define AT91C_EMAC_TUNDR ((unsigned int) 0x1 << 4) // (EMAC) -#define AT91C_EMAC_RLEX ((unsigned int) 0x1 << 5) // (EMAC) -#define AT91C_EMAC_TXERR ((unsigned int) 0x1 << 6) // (EMAC) -#define AT91C_EMAC_TCOMP ((unsigned int) 0x1 << 7) // (EMAC) -#define AT91C_EMAC_LINK ((unsigned int) 0x1 << 9) // (EMAC) -#define AT91C_EMAC_ROVR ((unsigned int) 0x1 << 10) // (EMAC) -#define AT91C_EMAC_HRESP ((unsigned int) 0x1 << 11) // (EMAC) -#define AT91C_EMAC_PFRE ((unsigned int) 0x1 << 12) // (EMAC) -#define AT91C_EMAC_PTZ ((unsigned int) 0x1 << 13) // (EMAC) -// -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register -------- -// -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register -------- -// -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register -------- -// -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register -------- -#define AT91C_EMAC_DATA ((unsigned int) 0xFFFF << 0) // (EMAC) -#define AT91C_EMAC_CODE ((unsigned int) 0x3 << 16) // (EMAC) -#define AT91C_EMAC_REGA ((unsigned int) 0x1F << 18) // (EMAC) -#define AT91C_EMAC_PHYA ((unsigned int) 0x1F << 23) // (EMAC) -#define AT91C_EMAC_RW ((unsigned int) 0x3 << 28) // (EMAC) -#define AT91C_EMAC_SOF ((unsigned int) 0x3 << 30) // (EMAC) -// -------- EMAC_USRIO : (EMAC Offset: 0xc0) USER Input Output Register -------- -#define AT91C_EMAC_RMII ((unsigned int) 0x1 << 0) // (EMAC) Reduce MII -#define AT91C_EMAC_CLKEN ((unsigned int) 0x1 << 1) // (EMAC) Clock Enable -// -------- EMAC_WOL : (EMAC Offset: 0xc4) Wake On LAN Register -------- -#define AT91C_EMAC_IP ((unsigned int) 0xFFFF << 0) // (EMAC) ARP request IP address -#define AT91C_EMAC_MAG ((unsigned int) 0x1 << 16) // (EMAC) Magic packet event enable -#define AT91C_EMAC_ARP ((unsigned int) 0x1 << 17) // (EMAC) ARP request event enable -#define AT91C_EMAC_SA1 ((unsigned int) 0x1 << 18) // (EMAC) Specific address register 1 event enable -// -------- EMAC_REV : (EMAC Offset: 0xfc) Revision Register -------- -#define AT91C_EMAC_REVREF ((unsigned int) 0xFFFF << 0) // (EMAC) -#define AT91C_EMAC_PARTREF ((unsigned int) 0xFFFF << 16) // (EMAC) - -// ***************************************************************************** -// SOFTWARE API DEFINITION FOR Analog to Digital Convertor -// ***************************************************************************** -typedef struct _AT91S_ADC -{ - AT91_REG ADC_CR; // ADC Control Register - AT91_REG ADC_MR; // ADC Mode Register - AT91_REG Reserved0[2]; // - AT91_REG ADC_CHER; // ADC Channel Enable Register - AT91_REG ADC_CHDR; // ADC Channel Disable Register - AT91_REG ADC_CHSR; // ADC Channel Status Register - AT91_REG ADC_SR; // ADC Status Register - AT91_REG ADC_LCDR; // ADC Last Converted Data Register - AT91_REG ADC_IER; // ADC Interrupt Enable Register - AT91_REG ADC_IDR; // ADC Interrupt Disable Register - AT91_REG ADC_IMR; // ADC Interrupt Mask Register - AT91_REG ADC_CDR0; // ADC Channel Data Register 0 - AT91_REG ADC_CDR1; // ADC Channel Data Register 1 - AT91_REG ADC_CDR2; // ADC Channel Data Register 2 - AT91_REG ADC_CDR3; // ADC Channel Data Register 3 - AT91_REG ADC_CDR4; // ADC Channel Data Register 4 - AT91_REG ADC_CDR5; // ADC Channel Data Register 5 - AT91_REG ADC_CDR6; // ADC Channel Data Register 6 - AT91_REG ADC_CDR7; // ADC Channel Data Register 7 - AT91_REG Reserved1[44]; // - AT91_REG ADC_RPR; // Receive Pointer Register - AT91_REG ADC_RCR; // Receive Counter Register - AT91_REG ADC_TPR; // Transmit Pointer Register - AT91_REG ADC_TCR; // Transmit Counter Register - AT91_REG ADC_RNPR; // Receive Next Pointer Register - AT91_REG ADC_RNCR; // Receive Next Counter Register - AT91_REG ADC_TNPR; // Transmit Next Pointer Register - AT91_REG ADC_TNCR; // Transmit Next Counter Register - AT91_REG ADC_PTCR; // PDC Transfer Control Register - AT91_REG ADC_PTSR; // PDC Transfer Status Register -} AT91S_ADC , *AT91PS_ADC; - -// -------- ADC_CR : (ADC Offset: 0x0) ADC Control Register -------- -#define AT91C_ADC_SWRST ((unsigned int) 0x1 << 0) // (ADC) Software Reset -#define AT91C_ADC_START ((unsigned int) 0x1 << 1) // (ADC) Start Conversion -// -------- ADC_MR : (ADC Offset: 0x4) ADC Mode Register -------- -#define AT91C_ADC_TRGEN ((unsigned int) 0x1 << 0) // (ADC) Trigger Enable -#define AT91C_ADC_TRGEN_DIS ((unsigned int) 0x0) // (ADC) Hradware triggers are disabled. Starting a conversion is only possible by software -#define AT91C_ADC_TRGEN_EN ((unsigned int) 0x1) // (ADC) Hardware trigger selected by TRGSEL field is enabled. -#define AT91C_ADC_TRGSEL ((unsigned int) 0x7 << 1) // (ADC) Trigger Selection -#define AT91C_ADC_TRGSEL_TIOA0 ((unsigned int) 0x0 << 1) // (ADC) Selected TRGSEL = TIAO0 -#define AT91C_ADC_TRGSEL_TIOA1 ((unsigned int) 0x1 << 1) // (ADC) Selected TRGSEL = TIAO1 -#define AT91C_ADC_TRGSEL_TIOA2 ((unsigned int) 0x2 << 1) // (ADC) Selected TRGSEL = TIAO2 -#define AT91C_ADC_TRGSEL_TIOA3 ((unsigned int) 0x3 << 1) // (ADC) Selected TRGSEL = TIAO3 -#define AT91C_ADC_TRGSEL_TIOA4 ((unsigned int) 0x4 << 1) // (ADC) Selected TRGSEL = TIAO4 -#define AT91C_ADC_TRGSEL_TIOA5 ((unsigned int) 0x5 << 1) // (ADC) Selected TRGSEL = TIAO5 -#define AT91C_ADC_TRGSEL_EXT ((unsigned int) 0x6 << 1) // (ADC) Selected TRGSEL = External Trigger -#define AT91C_ADC_LOWRES ((unsigned int) 0x1 << 4) // (ADC) Resolution. -#define AT91C_ADC_LOWRES_10_BIT ((unsigned int) 0x0 << 4) // (ADC) 10-bit resolution -#define AT91C_ADC_LOWRES_8_BIT ((unsigned int) 0x1 << 4) // (ADC) 8-bit resolution -#define AT91C_ADC_SLEEP ((unsigned int) 0x1 << 5) // (ADC) Sleep Mode -#define AT91C_ADC_SLEEP_NORMAL_MODE ((unsigned int) 0x0 << 5) // (ADC) Normal Mode -#define AT91C_ADC_SLEEP_MODE ((unsigned int) 0x1 << 5) // (ADC) Sleep Mode -#define AT91C_ADC_PRESCAL ((unsigned int) 0x3F << 8) // (ADC) Prescaler rate selection -#define AT91C_ADC_STARTUP ((unsigned int) 0x1F << 16) // (ADC) Startup Time -#define AT91C_ADC_SHTIM ((unsigned int) 0xF << 24) // (ADC) Sample & Hold Time -// -------- ADC_CHER : (ADC Offset: 0x10) ADC Channel Enable Register -------- -#define AT91C_ADC_CH0 ((unsigned int) 0x1 << 0) // (ADC) Channel 0 -#define AT91C_ADC_CH1 ((unsigned int) 0x1 << 1) // (ADC) Channel 1 -#define AT91C_ADC_CH2 ((unsigned int) 0x1 << 2) // (ADC) Channel 2 -#define AT91C_ADC_CH3 ((unsigned int) 0x1 << 3) // (ADC) Channel 3 -#define AT91C_ADC_CH4 ((unsigned int) 0x1 << 4) // (ADC) Channel 4 -#define AT91C_ADC_CH5 ((unsigned int) 0x1 << 5) // (ADC) Channel 5 -#define AT91C_ADC_CH6 ((unsigned int) 0x1 << 6) // (ADC) Channel 6 -#define AT91C_ADC_CH7 ((unsigned int) 0x1 << 7) // (ADC) Channel 7 -// -------- ADC_CHDR : (ADC Offset: 0x14) ADC Channel Disable Register -------- -// -------- ADC_CHSR : (ADC Offset: 0x18) ADC Channel Status Register -------- -// -------- ADC_SR : (ADC Offset: 0x1c) ADC Status Register -------- -#define AT91C_ADC_EOC0 ((unsigned int) 0x1 << 0) // (ADC) End of Conversion -#define AT91C_ADC_EOC1 ((unsigned int) 0x1 << 1) // (ADC) End of Conversion -#define AT91C_ADC_EOC2 ((unsigned int) 0x1 << 2) // (ADC) End of Conversion -#define AT91C_ADC_EOC3 ((unsigned int) 0x1 << 3) // (ADC) End of Conversion -#define AT91C_ADC_EOC4 ((unsigned int) 0x1 << 4) // (ADC) End of Conversion -#define AT91C_ADC_EOC5 ((unsigned int) 0x1 << 5) // (ADC) End of Conversion -#define AT91C_ADC_EOC6 ((unsigned int) 0x1 << 6) // (ADC) End of Conversion -#define AT91C_ADC_EOC7 ((unsigned int) 0x1 << 7) // (ADC) End of Conversion -#define AT91C_ADC_OVRE0 ((unsigned int) 0x1 << 8) // (ADC) Overrun Error -#define AT91C_ADC_OVRE1 ((unsigned int) 0x1 << 9) // (ADC) Overrun Error -#define AT91C_ADC_OVRE2 ((unsigned int) 0x1 << 10) // (ADC) Overrun Error -#define AT91C_ADC_OVRE3 ((unsigned int) 0x1 << 11) // (ADC) Overrun Error -#define AT91C_ADC_OVRE4 ((unsigned int) 0x1 << 12) // (ADC) Overrun Error -#define AT91C_ADC_OVRE5 ((unsigned int) 0x1 << 13) // (ADC) Overrun Error -#define AT91C_ADC_OVRE6 ((unsigned int) 0x1 << 14) // (ADC) Overrun Error -#define AT91C_ADC_OVRE7 ((unsigned int) 0x1 << 15) // (ADC) Overrun Error -#define AT91C_ADC_DRDY ((unsigned int) 0x1 << 16) // (ADC) Data Ready -#define AT91C_ADC_GOVRE ((unsigned int) 0x1 << 17) // (ADC) General Overrun -#define AT91C_ADC_ENDRX ((unsigned int) 0x1 << 18) // (ADC) End of Receiver Transfer -#define AT91C_ADC_RXBUFF ((unsigned int) 0x1 << 19) // (ADC) RXBUFF Interrupt -// -------- ADC_LCDR : (ADC Offset: 0x20) ADC Last Converted Data Register -------- -#define AT91C_ADC_LDATA ((unsigned int) 0x3FF << 0) // (ADC) Last Data Converted -// -------- ADC_IER : (ADC Offset: 0x24) ADC Interrupt Enable Register -------- -// -------- ADC_IDR : (ADC Offset: 0x28) ADC Interrupt Disable Register -------- -// -------- ADC_IMR : (ADC Offset: 0x2c) ADC Interrupt Mask Register -------- -// -------- ADC_CDR0 : (ADC Offset: 0x30) ADC Channel Data Register 0 -------- -#define AT91C_ADC_DATA ((unsigned int) 0x3FF << 0) // (ADC) Converted Data -// -------- ADC_CDR1 : (ADC Offset: 0x34) ADC Channel Data Register 1 -------- -// -------- ADC_CDR2 : (ADC Offset: 0x38) ADC Channel Data Register 2 -------- -// -------- ADC_CDR3 : (ADC Offset: 0x3c) ADC Channel Data Register 3 -------- -// -------- ADC_CDR4 : (ADC Offset: 0x40) ADC Channel Data Register 4 -------- -// -------- ADC_CDR5 : (ADC Offset: 0x44) ADC Channel Data Register 5 -------- -// -------- ADC_CDR6 : (ADC Offset: 0x48) ADC Channel Data Register 6 -------- -// -------- ADC_CDR7 : (ADC Offset: 0x4c) ADC Channel Data Register 7 -------- - -// ***************************************************************************** -// REGISTER ADDRESS DEFINITION FOR AT91SAM7X256 -// ***************************************************************************** -// ========== Register definition for SYS peripheral ========== -// ========== Register definition for AIC peripheral ========== -#define AT91C_AIC_ICCR ((AT91_REG *) 0xFFFFF128) // (AIC) Interrupt Clear Command Register -#define AT91C_AIC_IECR ((AT91_REG *) 0xFFFFF120) // (AIC) Interrupt Enable Command Register -#define AT91C_AIC_SMR ((AT91_REG *) 0xFFFFF000) // (AIC) Source Mode Register -#define AT91C_AIC_ISCR ((AT91_REG *) 0xFFFFF12C) // (AIC) Interrupt Set Command Register -#define AT91C_AIC_EOICR ((AT91_REG *) 0xFFFFF130) // (AIC) End of Interrupt Command Register -#define AT91C_AIC_DCR ((AT91_REG *) 0xFFFFF138) // (AIC) Debug Control Register (Protect) -#define AT91C_AIC_FFER ((AT91_REG *) 0xFFFFF140) // (AIC) Fast Forcing Enable Register -#define AT91C_AIC_SVR ((AT91_REG *) 0xFFFFF080) // (AIC) Source Vector Register -#define AT91C_AIC_SPU ((AT91_REG *) 0xFFFFF134) // (AIC) Spurious Vector Register -#define AT91C_AIC_FFDR ((AT91_REG *) 0xFFFFF144) // (AIC) Fast Forcing Disable Register -#define AT91C_AIC_FVR ((AT91_REG *) 0xFFFFF104) // (AIC) FIQ Vector Register -#define AT91C_AIC_FFSR ((AT91_REG *) 0xFFFFF148) // (AIC) Fast Forcing Status Register -#define AT91C_AIC_IMR ((AT91_REG *) 0xFFFFF110) // (AIC) Interrupt Mask Register -#define AT91C_AIC_ISR ((AT91_REG *) 0xFFFFF108) // (AIC) Interrupt Status Register -#define AT91C_AIC_IVR ((AT91_REG *) 0xFFFFF100) // (AIC) IRQ Vector Register -#define AT91C_AIC_IDCR ((AT91_REG *) 0xFFFFF124) // (AIC) Interrupt Disable Command Register -#define AT91C_AIC_CISR ((AT91_REG *) 0xFFFFF114) // (AIC) Core Interrupt Status Register -#define AT91C_AIC_IPR ((AT91_REG *) 0xFFFFF10C) // (AIC) Interrupt Pending Register -// ========== Register definition for PDC_DBGU peripheral ========== -#define AT91C_DBGU_TNCR ((AT91_REG *) 0xFFFFF31C) // (PDC_DBGU) Transmit Next Counter Register -#define AT91C_DBGU_RNCR ((AT91_REG *) 0xFFFFF314) // (PDC_DBGU) Receive Next Counter Register -#define AT91C_DBGU_PTCR ((AT91_REG *) 0xFFFFF320) // (PDC_DBGU) PDC Transfer Control Register -#define AT91C_DBGU_PTSR ((AT91_REG *) 0xFFFFF324) // (PDC_DBGU) PDC Transfer Status Register -#define AT91C_DBGU_RCR ((AT91_REG *) 0xFFFFF304) // (PDC_DBGU) Receive Counter Register -#define AT91C_DBGU_TCR ((AT91_REG *) 0xFFFFF30C) // (PDC_DBGU) Transmit Counter Register -#define AT91C_DBGU_RPR ((AT91_REG *) 0xFFFFF300) // (PDC_DBGU) Receive Pointer Register -#define AT91C_DBGU_TPR ((AT91_REG *) 0xFFFFF308) // (PDC_DBGU) Transmit Pointer Register -#define AT91C_DBGU_RNPR ((AT91_REG *) 0xFFFFF310) // (PDC_DBGU) Receive Next Pointer Register -#define AT91C_DBGU_TNPR ((AT91_REG *) 0xFFFFF318) // (PDC_DBGU) Transmit Next Pointer Register -// ========== Register definition for DBGU peripheral ========== -#define AT91C_DBGU_EXID ((AT91_REG *) 0xFFFFF244) // (DBGU) Chip ID Extension Register -#define AT91C_DBGU_THR ((AT91_REG *) 0xFFFFF21C) // (DBGU) Transmitter Holding Register -#define AT91C_DBGU_CSR ((AT91_REG *) 0xFFFFF214) // (DBGU) Channel Status Register -#define AT91C_DBGU_IDR ((AT91_REG *) 0xFFFFF20C) // (DBGU) Interrupt Disable Register -#define AT91C_DBGU_MR ((AT91_REG *) 0xFFFFF204) // (DBGU) Mode Register -#define AT91C_DBGU_FNTR ((AT91_REG *) 0xFFFFF248) // (DBGU) Force NTRST Register -#define AT91C_DBGU_CIDR ((AT91_REG *) 0xFFFFF240) // (DBGU) Chip ID Register -#define AT91C_DBGU_BRGR ((AT91_REG *) 0xFFFFF220) // (DBGU) Baud Rate Generator Register -#define AT91C_DBGU_RHR ((AT91_REG *) 0xFFFFF218) // (DBGU) Receiver Holding Register -#define AT91C_DBGU_IMR ((AT91_REG *) 0xFFFFF210) // (DBGU) Interrupt Mask Register -#define AT91C_DBGU_IER ((AT91_REG *) 0xFFFFF208) // (DBGU) Interrupt Enable Register -#define AT91C_DBGU_CR ((AT91_REG *) 0xFFFFF200) // (DBGU) Control Register -// ========== Register definition for PIOA peripheral ========== -#define AT91C_PIOA_IMR ((AT91_REG *) 0xFFFFF448) // (PIOA) Interrupt Mask Register -#define AT91C_PIOA_IER ((AT91_REG *) 0xFFFFF440) // (PIOA) Interrupt Enable Register -#define AT91C_PIOA_OWDR ((AT91_REG *) 0xFFFFF4A4) // (PIOA) Output Write Disable Register -#define AT91C_PIOA_ISR ((AT91_REG *) 0xFFFFF44C) // (PIOA) Interrupt Status Register -#define AT91C_PIOA_PPUDR ((AT91_REG *) 0xFFFFF460) // (PIOA) Pull-up Disable Register -#define AT91C_PIOA_MDSR ((AT91_REG *) 0xFFFFF458) // (PIOA) Multi-driver Status Register -#define AT91C_PIOA_MDER ((AT91_REG *) 0xFFFFF450) // (PIOA) Multi-driver Enable Register -#define AT91C_PIOA_PER ((AT91_REG *) 0xFFFFF400) // (PIOA) PIO Enable Register -#define AT91C_PIOA_PSR ((AT91_REG *) 0xFFFFF408) // (PIOA) PIO Status Register -#define AT91C_PIOA_OER ((AT91_REG *) 0xFFFFF410) // (PIOA) Output Enable Register -#define AT91C_PIOA_BSR ((AT91_REG *) 0xFFFFF474) // (PIOA) Select B Register -#define AT91C_PIOA_PPUER ((AT91_REG *) 0xFFFFF464) // (PIOA) Pull-up Enable Register -#define AT91C_PIOA_MDDR ((AT91_REG *) 0xFFFFF454) // (PIOA) Multi-driver Disable Register -#define AT91C_PIOA_PDR ((AT91_REG *) 0xFFFFF404) // (PIOA) PIO Disable Register -#define AT91C_PIOA_ODR ((AT91_REG *) 0xFFFFF414) // (PIOA) Output Disable Registerr -#define AT91C_PIOA_IFDR ((AT91_REG *) 0xFFFFF424) // (PIOA) Input Filter Disable Register -#define AT91C_PIOA_ABSR ((AT91_REG *) 0xFFFFF478) // (PIOA) AB Select Status Register -#define AT91C_PIOA_ASR ((AT91_REG *) 0xFFFFF470) // (PIOA) Select A Register -#define AT91C_PIOA_PPUSR ((AT91_REG *) 0xFFFFF468) // (PIOA) Pull-up Status Register -#define AT91C_PIOA_ODSR ((AT91_REG *) 0xFFFFF438) // (PIOA) Output Data Status Register -#define AT91C_PIOA_SODR ((AT91_REG *) 0xFFFFF430) // (PIOA) Set Output Data Register -#define AT91C_PIOA_IFSR ((AT91_REG *) 0xFFFFF428) // (PIOA) Input Filter Status Register -#define AT91C_PIOA_IFER ((AT91_REG *) 0xFFFFF420) // (PIOA) Input Filter Enable Register -#define AT91C_PIOA_OSR ((AT91_REG *) 0xFFFFF418) // (PIOA) Output Status Register -#define AT91C_PIOA_IDR ((AT91_REG *) 0xFFFFF444) // (PIOA) Interrupt Disable Register -#define AT91C_PIOA_PDSR ((AT91_REG *) 0xFFFFF43C) // (PIOA) Pin Data Status Register -#define AT91C_PIOA_CODR ((AT91_REG *) 0xFFFFF434) // (PIOA) Clear Output Data Register -#define AT91C_PIOA_OWSR ((AT91_REG *) 0xFFFFF4A8) // (PIOA) Output Write Status Register -#define AT91C_PIOA_OWER ((AT91_REG *) 0xFFFFF4A0) // (PIOA) Output Write Enable Register -// ========== Register definition for PIOB peripheral ========== -#define AT91C_PIOB_OWSR ((AT91_REG *) 0xFFFFF6A8) // (PIOB) Output Write Status Register -#define AT91C_PIOB_PPUSR ((AT91_REG *) 0xFFFFF668) // (PIOB) Pull-up Status Register -#define AT91C_PIOB_PPUDR ((AT91_REG *) 0xFFFFF660) // (PIOB) Pull-up Disable Register -#define AT91C_PIOB_MDSR ((AT91_REG *) 0xFFFFF658) // (PIOB) Multi-driver Status Register -#define AT91C_PIOB_MDER ((AT91_REG *) 0xFFFFF650) // (PIOB) Multi-driver Enable Register -#define AT91C_PIOB_IMR ((AT91_REG *) 0xFFFFF648) // (PIOB) Interrupt Mask Register -#define AT91C_PIOB_OSR ((AT91_REG *) 0xFFFFF618) // (PIOB) Output Status Register -#define AT91C_PIOB_OER ((AT91_REG *) 0xFFFFF610) // (PIOB) Output Enable Register -#define AT91C_PIOB_PSR ((AT91_REG *) 0xFFFFF608) // (PIOB) PIO Status Register -#define AT91C_PIOB_PER ((AT91_REG *) 0xFFFFF600) // (PIOB) PIO Enable Register -#define AT91C_PIOB_BSR ((AT91_REG *) 0xFFFFF674) // (PIOB) Select B Register -#define AT91C_PIOB_PPUER ((AT91_REG *) 0xFFFFF664) // (PIOB) Pull-up Enable Register -#define AT91C_PIOB_IFDR ((AT91_REG *) 0xFFFFF624) // (PIOB) Input Filter Disable Register -#define AT91C_PIOB_ODR ((AT91_REG *) 0xFFFFF614) // (PIOB) Output Disable Registerr -#define AT91C_PIOB_ABSR ((AT91_REG *) 0xFFFFF678) // (PIOB) AB Select Status Register -#define AT91C_PIOB_ASR ((AT91_REG *) 0xFFFFF670) // (PIOB) Select A Register -#define AT91C_PIOB_IFER ((AT91_REG *) 0xFFFFF620) // (PIOB) Input Filter Enable Register -#define AT91C_PIOB_IFSR ((AT91_REG *) 0xFFFFF628) // (PIOB) Input Filter Status Register -#define AT91C_PIOB_SODR ((AT91_REG *) 0xFFFFF630) // (PIOB) Set Output Data Register -#define AT91C_PIOB_ODSR ((AT91_REG *) 0xFFFFF638) // (PIOB) Output Data Status Register -#define AT91C_PIOB_CODR ((AT91_REG *) 0xFFFFF634) // (PIOB) Clear Output Data Register -#define AT91C_PIOB_PDSR ((AT91_REG *) 0xFFFFF63C) // (PIOB) Pin Data Status Register -#define AT91C_PIOB_OWER ((AT91_REG *) 0xFFFFF6A0) // (PIOB) Output Write Enable Register -#define AT91C_PIOB_IER ((AT91_REG *) 0xFFFFF640) // (PIOB) Interrupt Enable Register -#define AT91C_PIOB_OWDR ((AT91_REG *) 0xFFFFF6A4) // (PIOB) Output Write Disable Register -#define AT91C_PIOB_MDDR ((AT91_REG *) 0xFFFFF654) // (PIOB) Multi-driver Disable Register -#define AT91C_PIOB_ISR ((AT91_REG *) 0xFFFFF64C) // (PIOB) Interrupt Status Register -#define AT91C_PIOB_IDR ((AT91_REG *) 0xFFFFF644) // (PIOB) Interrupt Disable Register -#define AT91C_PIOB_PDR ((AT91_REG *) 0xFFFFF604) // (PIOB) PIO Disable Register -// ========== Register definition for CKGR peripheral ========== -#define AT91C_CKGR_PLLR ((AT91_REG *) 0xFFFFFC2C) // (CKGR) PLL Register -#define AT91C_CKGR_MCFR ((AT91_REG *) 0xFFFFFC24) // (CKGR) Main Clock Frequency Register -#define AT91C_CKGR_MOR ((AT91_REG *) 0xFFFFFC20) // (CKGR) Main Oscillator Register -// ========== Register definition for PMC peripheral ========== -#define AT91C_PMC_SCSR ((AT91_REG *) 0xFFFFFC08) // (PMC) System Clock Status Register -#define AT91C_PMC_SCER ((AT91_REG *) 0xFFFFFC00) // (PMC) System Clock Enable Register -#define AT91C_PMC_IMR ((AT91_REG *) 0xFFFFFC6C) // (PMC) Interrupt Mask Register -#define AT91C_PMC_IDR ((AT91_REG *) 0xFFFFFC64) // (PMC) Interrupt Disable Register -#define AT91C_PMC_PCDR ((AT91_REG *) 0xFFFFFC14) // (PMC) Peripheral Clock Disable Register -#define AT91C_PMC_SCDR ((AT91_REG *) 0xFFFFFC04) // (PMC) System Clock Disable Register -#define AT91C_PMC_SR ((AT91_REG *) 0xFFFFFC68) // (PMC) Status Register -#define AT91C_PMC_IER ((AT91_REG *) 0xFFFFFC60) // (PMC) Interrupt Enable Register -#define AT91C_PMC_MCKR ((AT91_REG *) 0xFFFFFC30) // (PMC) Master Clock Register -#define AT91C_PMC_MOR ((AT91_REG *) 0xFFFFFC20) // (PMC) Main Oscillator Register -#define AT91C_PMC_PCER ((AT91_REG *) 0xFFFFFC10) // (PMC) Peripheral Clock Enable Register -#define AT91C_PMC_PCSR ((AT91_REG *) 0xFFFFFC18) // (PMC) Peripheral Clock Status Register -#define AT91C_PMC_PLLR ((AT91_REG *) 0xFFFFFC2C) // (PMC) PLL Register -#define AT91C_PMC_MCFR ((AT91_REG *) 0xFFFFFC24) // (PMC) Main Clock Frequency Register -#define AT91C_PMC_PCKR ((AT91_REG *) 0xFFFFFC40) // (PMC) Programmable Clock Register -// ========== Register definition for RSTC peripheral ========== -#define AT91C_RSTC_RSR ((AT91_REG *) 0xFFFFFD04) // (RSTC) Reset Status Register -#define AT91C_RSTC_RMR ((AT91_REG *) 0xFFFFFD08) // (RSTC) Reset Mode Register -#define AT91C_RSTC_RCR ((AT91_REG *) 0xFFFFFD00) // (RSTC) Reset Control Register -// ========== Register definition for RTTC peripheral ========== -#define AT91C_RTTC_RTSR ((AT91_REG *) 0xFFFFFD2C) // (RTTC) Real-time Status Register -#define AT91C_RTTC_RTAR ((AT91_REG *) 0xFFFFFD24) // (RTTC) Real-time Alarm Register -#define AT91C_RTTC_RTVR ((AT91_REG *) 0xFFFFFD28) // (RTTC) Real-time Value Register -#define AT91C_RTTC_RTMR ((AT91_REG *) 0xFFFFFD20) // (RTTC) Real-time Mode Register -// ========== Register definition for PITC peripheral ========== -#define AT91C_PITC_PIIR ((AT91_REG *) 0xFFFFFD3C) // (PITC) Period Interval Image Register -#define AT91C_PITC_PISR ((AT91_REG *) 0xFFFFFD34) // (PITC) Period Interval Status Register -#define AT91C_PITC_PIVR ((AT91_REG *) 0xFFFFFD38) // (PITC) Period Interval Value Register -#define AT91C_PITC_PIMR ((AT91_REG *) 0xFFFFFD30) // (PITC) Period Interval Mode Register -// ========== Register definition for WDTC peripheral ========== -#define AT91C_WDTC_WDMR ((AT91_REG *) 0xFFFFFD44) // (WDTC) Watchdog Mode Register -#define AT91C_WDTC_WDSR ((AT91_REG *) 0xFFFFFD48) // (WDTC) Watchdog Status Register -#define AT91C_WDTC_WDCR ((AT91_REG *) 0xFFFFFD40) // (WDTC) Watchdog Control Register -// ========== Register definition for VREG peripheral ========== -#define AT91C_VREG_MR ((AT91_REG *) 0xFFFFFD60) // (VREG) Voltage Regulator Mode Register -// ========== Register definition for MC peripheral ========== -#define AT91C_MC_FCR ((AT91_REG *) 0xFFFFFF64) // (MC) MC Flash Command Register -#define AT91C_MC_ASR ((AT91_REG *) 0xFFFFFF04) // (MC) MC Abort Status Register -#define AT91C_MC_FSR ((AT91_REG *) 0xFFFFFF68) // (MC) MC Flash Status Register -#define AT91C_MC_FMR ((AT91_REG *) 0xFFFFFF60) // (MC) MC Flash Mode Register -#define AT91C_MC_AASR ((AT91_REG *) 0xFFFFFF08) // (MC) MC Abort Address Status Register -#define AT91C_MC_RCR ((AT91_REG *) 0xFFFFFF00) // (MC) MC Remap Control Register -// ========== Register definition for PDC_SPI1 peripheral ========== -#define AT91C_SPI1_RNPR ((AT91_REG *) 0xFFFE4110) // (PDC_SPI1) Receive Next Pointer Register -#define AT91C_SPI1_TPR ((AT91_REG *) 0xFFFE4108) // (PDC_SPI1) Transmit Pointer Register -#define AT91C_SPI1_RPR ((AT91_REG *) 0xFFFE4100) // (PDC_SPI1) Receive Pointer Register -#define AT91C_SPI1_PTSR ((AT91_REG *) 0xFFFE4124) // (PDC_SPI1) PDC Transfer Status Register -#define AT91C_SPI1_RCR ((AT91_REG *) 0xFFFE4104) // (PDC_SPI1) Receive Counter Register -#define AT91C_SPI1_TCR ((AT91_REG *) 0xFFFE410C) // (PDC_SPI1) Transmit Counter Register -#define AT91C_SPI1_RNCR ((AT91_REG *) 0xFFFE4114) // (PDC_SPI1) Receive Next Counter Register -#define AT91C_SPI1_TNCR ((AT91_REG *) 0xFFFE411C) // (PDC_SPI1) Transmit Next Counter Register -#define AT91C_SPI1_TNPR ((AT91_REG *) 0xFFFE4118) // (PDC_SPI1) Transmit Next Pointer Register -#define AT91C_SPI1_PTCR ((AT91_REG *) 0xFFFE4120) // (PDC_SPI1) PDC Transfer Control Register -// ========== Register definition for SPI1 peripheral ========== -#define AT91C_SPI1_CSR ((AT91_REG *) 0xFFFE4030) // (SPI1) Chip Select Register -#define AT91C_SPI1_IDR ((AT91_REG *) 0xFFFE4018) // (SPI1) Interrupt Disable Register -#define AT91C_SPI1_SR ((AT91_REG *) 0xFFFE4010) // (SPI1) Status Register -#define AT91C_SPI1_RDR ((AT91_REG *) 0xFFFE4008) // (SPI1) Receive Data Register -#define AT91C_SPI1_CR ((AT91_REG *) 0xFFFE4000) // (SPI1) Control Register -#define AT91C_SPI1_IMR ((AT91_REG *) 0xFFFE401C) // (SPI1) Interrupt Mask Register -#define AT91C_SPI1_IER ((AT91_REG *) 0xFFFE4014) // (SPI1) Interrupt Enable Register -#define AT91C_SPI1_TDR ((AT91_REG *) 0xFFFE400C) // (SPI1) Transmit Data Register -#define AT91C_SPI1_MR ((AT91_REG *) 0xFFFE4004) // (SPI1) Mode Register -// ========== Register definition for PDC_SPI0 peripheral ========== -#define AT91C_SPI0_PTCR ((AT91_REG *) 0xFFFE0120) // (PDC_SPI0) PDC Transfer Control Register -#define AT91C_SPI0_TNPR ((AT91_REG *) 0xFFFE0118) // (PDC_SPI0) Transmit Next Pointer Register -#define AT91C_SPI0_RNPR ((AT91_REG *) 0xFFFE0110) // (PDC_SPI0) Receive Next Pointer Register -#define AT91C_SPI0_TPR ((AT91_REG *) 0xFFFE0108) // (PDC_SPI0) Transmit Pointer Register -#define AT91C_SPI0_RPR ((AT91_REG *) 0xFFFE0100) // (PDC_SPI0) Receive Pointer Register -#define AT91C_SPI0_PTSR ((AT91_REG *) 0xFFFE0124) // (PDC_SPI0) PDC Transfer Status Register -#define AT91C_SPI0_TNCR ((AT91_REG *) 0xFFFE011C) // (PDC_SPI0) Transmit Next Counter Register -#define AT91C_SPI0_RNCR ((AT91_REG *) 0xFFFE0114) // (PDC_SPI0) Receive Next Counter Register -#define AT91C_SPI0_TCR ((AT91_REG *) 0xFFFE010C) // (PDC_SPI0) Transmit Counter Register -#define AT91C_SPI0_RCR ((AT91_REG *) 0xFFFE0104) // (PDC_SPI0) Receive Counter Register -// ========== Register definition for SPI0 peripheral ========== -#define AT91C_SPI0_CSR ((AT91_REG *) 0xFFFE0030) // (SPI0) Chip Select Register -#define AT91C_SPI0_IDR ((AT91_REG *) 0xFFFE0018) // (SPI0) Interrupt Disable Register -#define AT91C_SPI0_SR ((AT91_REG *) 0xFFFE0010) // (SPI0) Status Register -#define AT91C_SPI0_RDR ((AT91_REG *) 0xFFFE0008) // (SPI0) Receive Data Register -#define AT91C_SPI0_CR ((AT91_REG *) 0xFFFE0000) // (SPI0) Control Register -#define AT91C_SPI0_IMR ((AT91_REG *) 0xFFFE001C) // (SPI0) Interrupt Mask Register -#define AT91C_SPI0_IER ((AT91_REG *) 0xFFFE0014) // (SPI0) Interrupt Enable Register -#define AT91C_SPI0_TDR ((AT91_REG *) 0xFFFE000C) // (SPI0) Transmit Data Register -#define AT91C_SPI0_MR ((AT91_REG *) 0xFFFE0004) // (SPI0) Mode Register -// ========== Register definition for PDC_US1 peripheral ========== -#define AT91C_US1_PTSR ((AT91_REG *) 0xFFFC4124) // (PDC_US1) PDC Transfer Status Register -#define AT91C_US1_TNCR ((AT91_REG *) 0xFFFC411C) // (PDC_US1) Transmit Next Counter Register -#define AT91C_US1_RNCR ((AT91_REG *) 0xFFFC4114) // (PDC_US1) Receive Next Counter Register -#define AT91C_US1_TCR ((AT91_REG *) 0xFFFC410C) // (PDC_US1) Transmit Counter Register -#define AT91C_US1_RCR ((AT91_REG *) 0xFFFC4104) // (PDC_US1) Receive Counter Register -#define AT91C_US1_PTCR ((AT91_REG *) 0xFFFC4120) // (PDC_US1) PDC Transfer Control Register -#define AT91C_US1_TNPR ((AT91_REG *) 0xFFFC4118) // (PDC_US1) Transmit Next Pointer Register -#define AT91C_US1_RNPR ((AT91_REG *) 0xFFFC4110) // (PDC_US1) Receive Next Pointer Register -#define AT91C_US1_TPR ((AT91_REG *) 0xFFFC4108) // (PDC_US1) Transmit Pointer Register -#define AT91C_US1_RPR ((AT91_REG *) 0xFFFC4100) // (PDC_US1) Receive Pointer Register -// ========== Register definition for US1 peripheral ========== -#define AT91C_US1_RHR ((AT91_REG *) 0xFFFC4018) // (US1) Receiver Holding Register -#define AT91C_US1_IMR ((AT91_REG *) 0xFFFC4010) // (US1) Interrupt Mask Register -#define AT91C_US1_IER ((AT91_REG *) 0xFFFC4008) // (US1) Interrupt Enable Register -#define AT91C_US1_CR ((AT91_REG *) 0xFFFC4000) // (US1) Control Register -#define AT91C_US1_RTOR ((AT91_REG *) 0xFFFC4024) // (US1) Receiver Time-out Register -#define AT91C_US1_THR ((AT91_REG *) 0xFFFC401C) // (US1) Transmitter Holding Register -#define AT91C_US1_CSR ((AT91_REG *) 0xFFFC4014) // (US1) Channel Status Register -#define AT91C_US1_IDR ((AT91_REG *) 0xFFFC400C) // (US1) Interrupt Disable Register -#define AT91C_US1_FIDI ((AT91_REG *) 0xFFFC4040) // (US1) FI_DI_Ratio Register -#define AT91C_US1_BRGR ((AT91_REG *) 0xFFFC4020) // (US1) Baud Rate Generator Register -#define AT91C_US1_TTGR ((AT91_REG *) 0xFFFC4028) // (US1) Transmitter Time-guard Register -#define AT91C_US1_IF ((AT91_REG *) 0xFFFC404C) // (US1) IRDA_FILTER Register -#define AT91C_US1_NER ((AT91_REG *) 0xFFFC4044) // (US1) Nb Errors Register -#define AT91C_US1_MR ((AT91_REG *) 0xFFFC4004) // (US1) Mode Register -// ========== Register definition for PDC_US0 peripheral ========== -#define AT91C_US0_PTCR ((AT91_REG *) 0xFFFC0120) // (PDC_US0) PDC Transfer Control Register -#define AT91C_US0_TNPR ((AT91_REG *) 0xFFFC0118) // (PDC_US0) Transmit Next Pointer Register -#define AT91C_US0_RNPR ((AT91_REG *) 0xFFFC0110) // (PDC_US0) Receive Next Pointer Register -#define AT91C_US0_TPR ((AT91_REG *) 0xFFFC0108) // (PDC_US0) Transmit Pointer Register -#define AT91C_US0_RPR ((AT91_REG *) 0xFFFC0100) // (PDC_US0) Receive Pointer Register -#define AT91C_US0_PTSR ((AT91_REG *) 0xFFFC0124) // (PDC_US0) PDC Transfer Status Register -#define AT91C_US0_TNCR ((AT91_REG *) 0xFFFC011C) // (PDC_US0) Transmit Next Counter Register -#define AT91C_US0_RNCR ((AT91_REG *) 0xFFFC0114) // (PDC_US0) Receive Next Counter Register -#define AT91C_US0_TCR ((AT91_REG *) 0xFFFC010C) // (PDC_US0) Transmit Counter Register -#define AT91C_US0_RCR ((AT91_REG *) 0xFFFC0104) // (PDC_US0) Receive Counter Register -// ========== Register definition for US0 peripheral ========== -#define AT91C_US0_TTGR ((AT91_REG *) 0xFFFC0028) // (US0) Transmitter Time-guard Register -#define AT91C_US0_BRGR ((AT91_REG *) 0xFFFC0020) // (US0) Baud Rate Generator Register -#define AT91C_US0_RHR ((AT91_REG *) 0xFFFC0018) // (US0) Receiver Holding Register -#define AT91C_US0_IMR ((AT91_REG *) 0xFFFC0010) // (US0) Interrupt Mask Register -#define AT91C_US0_NER ((AT91_REG *) 0xFFFC0044) // (US0) Nb Errors Register -#define AT91C_US0_RTOR ((AT91_REG *) 0xFFFC0024) // (US0) Receiver Time-out Register -#define AT91C_US0_FIDI ((AT91_REG *) 0xFFFC0040) // (US0) FI_DI_Ratio Register -#define AT91C_US0_CR ((AT91_REG *) 0xFFFC0000) // (US0) Control Register -#define AT91C_US0_IER ((AT91_REG *) 0xFFFC0008) // (US0) Interrupt Enable Register -#define AT91C_US0_IF ((AT91_REG *) 0xFFFC004C) // (US0) IRDA_FILTER Register -#define AT91C_US0_MR ((AT91_REG *) 0xFFFC0004) // (US0) Mode Register -#define AT91C_US0_IDR ((AT91_REG *) 0xFFFC000C) // (US0) Interrupt Disable Register -#define AT91C_US0_CSR ((AT91_REG *) 0xFFFC0014) // (US0) Channel Status Register -#define AT91C_US0_THR ((AT91_REG *) 0xFFFC001C) // (US0) Transmitter Holding Register -// ========== Register definition for PDC_SSC peripheral ========== -#define AT91C_SSC_PTCR ((AT91_REG *) 0xFFFD4120) // (PDC_SSC) PDC Transfer Control Register -#define AT91C_SSC_TNPR ((AT91_REG *) 0xFFFD4118) // (PDC_SSC) Transmit Next Pointer Register -#define AT91C_SSC_RNPR ((AT91_REG *) 0xFFFD4110) // (PDC_SSC) Receive Next Pointer Register -#define AT91C_SSC_TPR ((AT91_REG *) 0xFFFD4108) // (PDC_SSC) Transmit Pointer Register -#define AT91C_SSC_RPR ((AT91_REG *) 0xFFFD4100) // (PDC_SSC) Receive Pointer Register -#define AT91C_SSC_PTSR ((AT91_REG *) 0xFFFD4124) // (PDC_SSC) PDC Transfer Status Register -#define AT91C_SSC_TNCR ((AT91_REG *) 0xFFFD411C) // (PDC_SSC) Transmit Next Counter Register -#define AT91C_SSC_RNCR ((AT91_REG *) 0xFFFD4114) // (PDC_SSC) Receive Next Counter Register -#define AT91C_SSC_TCR ((AT91_REG *) 0xFFFD410C) // (PDC_SSC) Transmit Counter Register -#define AT91C_SSC_RCR ((AT91_REG *) 0xFFFD4104) // (PDC_SSC) Receive Counter Register -// ========== Register definition for SSC peripheral ========== -#define AT91C_SSC_RFMR ((AT91_REG *) 0xFFFD4014) // (SSC) Receive Frame Mode Register -#define AT91C_SSC_CMR ((AT91_REG *) 0xFFFD4004) // (SSC) Clock Mode Register -#define AT91C_SSC_IDR ((AT91_REG *) 0xFFFD4048) // (SSC) Interrupt Disable Register -#define AT91C_SSC_SR ((AT91_REG *) 0xFFFD4040) // (SSC) Status Register -#define AT91C_SSC_RSHR ((AT91_REG *) 0xFFFD4030) // (SSC) Receive Sync Holding Register -#define AT91C_SSC_RHR ((AT91_REG *) 0xFFFD4020) // (SSC) Receive Holding Register -#define AT91C_SSC_TCMR ((AT91_REG *) 0xFFFD4018) // (SSC) Transmit Clock Mode Register -#define AT91C_SSC_RCMR ((AT91_REG *) 0xFFFD4010) // (SSC) Receive Clock ModeRegister -#define AT91C_SSC_CR ((AT91_REG *) 0xFFFD4000) // (SSC) Control Register -#define AT91C_SSC_IMR ((AT91_REG *) 0xFFFD404C) // (SSC) Interrupt Mask Register -#define AT91C_SSC_IER ((AT91_REG *) 0xFFFD4044) // (SSC) Interrupt Enable Register -#define AT91C_SSC_TSHR ((AT91_REG *) 0xFFFD4034) // (SSC) Transmit Sync Holding Register -#define AT91C_SSC_THR ((AT91_REG *) 0xFFFD4024) // (SSC) Transmit Holding Register -#define AT91C_SSC_TFMR ((AT91_REG *) 0xFFFD401C) // (SSC) Transmit Frame Mode Register -// ========== Register definition for TWI peripheral ========== -#define AT91C_TWI_RHR ((AT91_REG *) 0xFFFB8030) // (TWI) Receive Holding Register -#define AT91C_TWI_IDR ((AT91_REG *) 0xFFFB8028) // (TWI) Interrupt Disable Register -#define AT91C_TWI_SR ((AT91_REG *) 0xFFFB8020) // (TWI) Status Register -#define AT91C_TWI_CWGR ((AT91_REG *) 0xFFFB8010) // (TWI) Clock Waveform Generator Register -#define AT91C_TWI_CR ((AT91_REG *) 0xFFFB8000) // (TWI) Control Register -#define AT91C_TWI_THR ((AT91_REG *) 0xFFFB8034) // (TWI) Transmit Holding Register -#define AT91C_TWI_IMR ((AT91_REG *) 0xFFFB802C) // (TWI) Interrupt Mask Register -#define AT91C_TWI_IER ((AT91_REG *) 0xFFFB8024) // (TWI) Interrupt Enable Register -#define AT91C_TWI_IADR ((AT91_REG *) 0xFFFB800C) // (TWI) Internal Address Register -#define AT91C_TWI_MMR ((AT91_REG *) 0xFFFB8004) // (TWI) Master Mode Register -// ========== Register definition for PWMC_CH3 peripheral ========== -#define AT91C_PWMC_CH3_CUPDR ((AT91_REG *) 0xFFFCC270) // (PWMC_CH3) Channel Update Register -#define AT91C_PWMC_CH3_CPRDR ((AT91_REG *) 0xFFFCC268) // (PWMC_CH3) Channel Period Register -#define AT91C_PWMC_CH3_CMR ((AT91_REG *) 0xFFFCC260) // (PWMC_CH3) Channel Mode Register -#define AT91C_PWMC_CH3_Reserved ((AT91_REG *) 0xFFFCC274) // (PWMC_CH3) Reserved -#define AT91C_PWMC_CH3_CCNTR ((AT91_REG *) 0xFFFCC26C) // (PWMC_CH3) Channel Counter Register -#define AT91C_PWMC_CH3_CDTYR ((AT91_REG *) 0xFFFCC264) // (PWMC_CH3) Channel Duty Cycle Register -// ========== Register definition for PWMC_CH2 peripheral ========== -#define AT91C_PWMC_CH2_CUPDR ((AT91_REG *) 0xFFFCC250) // (PWMC_CH2) Channel Update Register -#define AT91C_PWMC_CH2_CPRDR ((AT91_REG *) 0xFFFCC248) // (PWMC_CH2) Channel Period Register -#define AT91C_PWMC_CH2_CMR ((AT91_REG *) 0xFFFCC240) // (PWMC_CH2) Channel Mode Register -#define AT91C_PWMC_CH2_Reserved ((AT91_REG *) 0xFFFCC254) // (PWMC_CH2) Reserved -#define AT91C_PWMC_CH2_CCNTR ((AT91_REG *) 0xFFFCC24C) // (PWMC_CH2) Channel Counter Register -#define AT91C_PWMC_CH2_CDTYR ((AT91_REG *) 0xFFFCC244) // (PWMC_CH2) Channel Duty Cycle Register -// ========== Register definition for PWMC_CH1 peripheral ========== -#define AT91C_PWMC_CH1_CUPDR ((AT91_REG *) 0xFFFCC230) // (PWMC_CH1) Channel Update Register -#define AT91C_PWMC_CH1_CPRDR ((AT91_REG *) 0xFFFCC228) // (PWMC_CH1) Channel Period Register -#define AT91C_PWMC_CH1_CMR ((AT91_REG *) 0xFFFCC220) // (PWMC_CH1) Channel Mode Register -#define AT91C_PWMC_CH1_Reserved ((AT91_REG *) 0xFFFCC234) // (PWMC_CH1) Reserved -#define AT91C_PWMC_CH1_CCNTR ((AT91_REG *) 0xFFFCC22C) // (PWMC_CH1) Channel Counter Register -#define AT91C_PWMC_CH1_CDTYR ((AT91_REG *) 0xFFFCC224) // (PWMC_CH1) Channel Duty Cycle Register -// ========== Register definition for PWMC_CH0 peripheral ========== -#define AT91C_PWMC_CH0_CUPDR ((AT91_REG *) 0xFFFCC210) // (PWMC_CH0) Channel Update Register -#define AT91C_PWMC_CH0_CPRDR ((AT91_REG *) 0xFFFCC208) // (PWMC_CH0) Channel Period Register -#define AT91C_PWMC_CH0_CMR ((AT91_REG *) 0xFFFCC200) // (PWMC_CH0) Channel Mode Register -#define AT91C_PWMC_CH0_Reserved ((AT91_REG *) 0xFFFCC214) // (PWMC_CH0) Reserved -#define AT91C_PWMC_CH0_CCNTR ((AT91_REG *) 0xFFFCC20C) // (PWMC_CH0) Channel Counter Register -#define AT91C_PWMC_CH0_CDTYR ((AT91_REG *) 0xFFFCC204) // (PWMC_CH0) Channel Duty Cycle Register -// ========== Register definition for PWMC peripheral ========== -#define AT91C_PWMC_VR ((AT91_REG *) 0xFFFCC0FC) // (PWMC) PWMC Version Register -#define AT91C_PWMC_ISR ((AT91_REG *) 0xFFFCC01C) // (PWMC) PWMC Interrupt Status Register -#define AT91C_PWMC_IDR ((AT91_REG *) 0xFFFCC014) // (PWMC) PWMC Interrupt Disable Register -#define AT91C_PWMC_SR ((AT91_REG *) 0xFFFCC00C) // (PWMC) PWMC Status Register -#define AT91C_PWMC_ENA ((AT91_REG *) 0xFFFCC004) // (PWMC) PWMC Enable Register -#define AT91C_PWMC_IMR ((AT91_REG *) 0xFFFCC018) // (PWMC) PWMC Interrupt Mask Register -#define AT91C_PWMC_MR ((AT91_REG *) 0xFFFCC000) // (PWMC) PWMC Mode Register -#define AT91C_PWMC_DIS ((AT91_REG *) 0xFFFCC008) // (PWMC) PWMC Disable Register -#define AT91C_PWMC_IER ((AT91_REG *) 0xFFFCC010) // (PWMC) PWMC Interrupt Enable Register -// ========== Register definition for UDP peripheral ========== -#define AT91C_UDP_TXVC ((AT91_REG *) 0xFFFB0074) // (UDP) Transceiver Control Register -#define AT91C_UDP_ISR ((AT91_REG *) 0xFFFB001C) // (UDP) Interrupt Status Register -#define AT91C_UDP_IDR ((AT91_REG *) 0xFFFB0014) // (UDP) Interrupt Disable Register -#define AT91C_UDP_CSR ((AT91_REG *) 0xFFFB0030) // (UDP) Endpoint Control and Status Register -#define AT91C_UDP_RSTEP ((AT91_REG *) 0xFFFB0028) // (UDP) Reset Endpoint Register -#define AT91C_UDP_ICR ((AT91_REG *) 0xFFFB0020) // (UDP) Interrupt Clear Register -#define AT91C_UDP_GLBSTATE ((AT91_REG *) 0xFFFB0004) // (UDP) Global State Register -#define AT91C_UDP_NUM ((AT91_REG *) 0xFFFB0000) // (UDP) Frame Number Register -#define AT91C_UDP_FADDR ((AT91_REG *) 0xFFFB0008) // (UDP) Function Address Register -#define AT91C_UDP_IER ((AT91_REG *) 0xFFFB0010) // (UDP) Interrupt Enable Register -#define AT91C_UDP_IMR ((AT91_REG *) 0xFFFB0018) // (UDP) Interrupt Mask Register -#define AT91C_UDP_FDR ((AT91_REG *) 0xFFFB0050) // (UDP) Endpoint FIFO Data Register -// ========== Register definition for TC0 peripheral ========== -#define AT91C_TC0_IMR ((AT91_REG *) 0xFFFA002C) // (TC0) Interrupt Mask Register -#define AT91C_TC0_IER ((AT91_REG *) 0xFFFA0024) // (TC0) Interrupt Enable Register -#define AT91C_TC0_RC ((AT91_REG *) 0xFFFA001C) // (TC0) Register C -#define AT91C_TC0_RA ((AT91_REG *) 0xFFFA0014) // (TC0) Register A -#define AT91C_TC0_CMR ((AT91_REG *) 0xFFFA0004) // (TC0) Channel Mode Register (Capture Mode / Waveform Mode) -#define AT91C_TC0_IDR ((AT91_REG *) 0xFFFA0028) // (TC0) Interrupt Disable Register -#define AT91C_TC0_SR ((AT91_REG *) 0xFFFA0020) // (TC0) Status Register -#define AT91C_TC0_RB ((AT91_REG *) 0xFFFA0018) // (TC0) Register B -#define AT91C_TC0_CV ((AT91_REG *) 0xFFFA0010) // (TC0) Counter Value -#define AT91C_TC0_CCR ((AT91_REG *) 0xFFFA0000) // (TC0) Channel Control Register -// ========== Register definition for TC1 peripheral ========== -#define AT91C_TC1_IMR ((AT91_REG *) 0xFFFA006C) // (TC1) Interrupt Mask Register -#define AT91C_TC1_IER ((AT91_REG *) 0xFFFA0064) // (TC1) Interrupt Enable Register -#define AT91C_TC1_RC ((AT91_REG *) 0xFFFA005C) // (TC1) Register C -#define AT91C_TC1_RA ((AT91_REG *) 0xFFFA0054) // (TC1) Register A -#define AT91C_TC1_CMR ((AT91_REG *) 0xFFFA0044) // (TC1) Channel Mode Register (Capture Mode / Waveform Mode) -#define AT91C_TC1_IDR ((AT91_REG *) 0xFFFA0068) // (TC1) Interrupt Disable Register -#define AT91C_TC1_SR ((AT91_REG *) 0xFFFA0060) // (TC1) Status Register -#define AT91C_TC1_RB ((AT91_REG *) 0xFFFA0058) // (TC1) Register B -#define AT91C_TC1_CV ((AT91_REG *) 0xFFFA0050) // (TC1) Counter Value -#define AT91C_TC1_CCR ((AT91_REG *) 0xFFFA0040) // (TC1) Channel Control Register -// ========== Register definition for TC2 peripheral ========== -#define AT91C_TC2_IMR ((AT91_REG *) 0xFFFA00AC) // (TC2) Interrupt Mask Register -#define AT91C_TC2_IER ((AT91_REG *) 0xFFFA00A4) // (TC2) Interrupt Enable Register -#define AT91C_TC2_RC ((AT91_REG *) 0xFFFA009C) // (TC2) Register C -#define AT91C_TC2_RA ((AT91_REG *) 0xFFFA0094) // (TC2) Register A -#define AT91C_TC2_CMR ((AT91_REG *) 0xFFFA0084) // (TC2) Channel Mode Register (Capture Mode / Waveform Mode) -#define AT91C_TC2_IDR ((AT91_REG *) 0xFFFA00A8) // (TC2) Interrupt Disable Register -#define AT91C_TC2_SR ((AT91_REG *) 0xFFFA00A0) // (TC2) Status Register -#define AT91C_TC2_RB ((AT91_REG *) 0xFFFA0098) // (TC2) Register B -#define AT91C_TC2_CV ((AT91_REG *) 0xFFFA0090) // (TC2) Counter Value -#define AT91C_TC2_CCR ((AT91_REG *) 0xFFFA0080) // (TC2) Channel Control Register -// ========== Register definition for TCB peripheral ========== -#define AT91C_TCB_BMR ((AT91_REG *) 0xFFFA00C4) // (TCB) TC Block Mode Register -#define AT91C_TCB_BCR ((AT91_REG *) 0xFFFA00C0) // (TCB) TC Block Control Register -// ========== Register definition for CAN_MB0 peripheral ========== -#define AT91C_CAN_MB0_MCR ((AT91_REG *) 0xFFFD021C) // (CAN_MB0) MailBox Control Register -#define AT91C_CAN_MB0_MDL ((AT91_REG *) 0xFFFD0214) // (CAN_MB0) MailBox Data Low Register -#define AT91C_CAN_MB0_MFID ((AT91_REG *) 0xFFFD020C) // (CAN_MB0) MailBox Family ID Register -#define AT91C_CAN_MB0_MAM ((AT91_REG *) 0xFFFD0204) // (CAN_MB0) MailBox Acceptance Mask Register -#define AT91C_CAN_MB0_MDH ((AT91_REG *) 0xFFFD0218) // (CAN_MB0) MailBox Data High Register -#define AT91C_CAN_MB0_MSR ((AT91_REG *) 0xFFFD0210) // (CAN_MB0) MailBox Status Register -#define AT91C_CAN_MB0_MID ((AT91_REG *) 0xFFFD0208) // (CAN_MB0) MailBox ID Register -#define AT91C_CAN_MB0_MMR ((AT91_REG *) 0xFFFD0200) // (CAN_MB0) MailBox Mode Register -// ========== Register definition for CAN_MB1 peripheral ========== -#define AT91C_CAN_MB1_MCR ((AT91_REG *) 0xFFFD023C) // (CAN_MB1) MailBox Control Register -#define AT91C_CAN_MB1_MDL ((AT91_REG *) 0xFFFD0234) // (CAN_MB1) MailBox Data Low Register -#define AT91C_CAN_MB1_MFID ((AT91_REG *) 0xFFFD022C) // (CAN_MB1) MailBox Family ID Register -#define AT91C_CAN_MB1_MAM ((AT91_REG *) 0xFFFD0224) // (CAN_MB1) MailBox Acceptance Mask Register -#define AT91C_CAN_MB1_MDH ((AT91_REG *) 0xFFFD0238) // (CAN_MB1) MailBox Data High Register -#define AT91C_CAN_MB1_MSR ((AT91_REG *) 0xFFFD0230) // (CAN_MB1) MailBox Status Register -#define AT91C_CAN_MB1_MID ((AT91_REG *) 0xFFFD0228) // (CAN_MB1) MailBox ID Register -#define AT91C_CAN_MB1_MMR ((AT91_REG *) 0xFFFD0220) // (CAN_MB1) MailBox Mode Register -// ========== Register definition for CAN_MB2 peripheral ========== -#define AT91C_CAN_MB2_MCR ((AT91_REG *) 0xFFFD025C) // (CAN_MB2) MailBox Control Register -#define AT91C_CAN_MB2_MDL ((AT91_REG *) 0xFFFD0254) // (CAN_MB2) MailBox Data Low Register -#define AT91C_CAN_MB2_MFID ((AT91_REG *) 0xFFFD024C) // (CAN_MB2) MailBox Family ID Register -#define AT91C_CAN_MB2_MAM ((AT91_REG *) 0xFFFD0244) // (CAN_MB2) MailBox Acceptance Mask Register -#define AT91C_CAN_MB2_MDH ((AT91_REG *) 0xFFFD0258) // (CAN_MB2) MailBox Data High Register -#define AT91C_CAN_MB2_MSR ((AT91_REG *) 0xFFFD0250) // (CAN_MB2) MailBox Status Register -#define AT91C_CAN_MB2_MID ((AT91_REG *) 0xFFFD0248) // (CAN_MB2) MailBox ID Register -#define AT91C_CAN_MB2_MMR ((AT91_REG *) 0xFFFD0240) // (CAN_MB2) MailBox Mode Register -// ========== Register definition for CAN_MB3 peripheral ========== -#define AT91C_CAN_MB3_MCR ((AT91_REG *) 0xFFFD027C) // (CAN_MB3) MailBox Control Register -#define AT91C_CAN_MB3_MDL ((AT91_REG *) 0xFFFD0274) // (CAN_MB3) MailBox Data Low Register -#define AT91C_CAN_MB3_MFID ((AT91_REG *) 0xFFFD026C) // (CAN_MB3) MailBox Family ID Register -#define AT91C_CAN_MB3_MAM ((AT91_REG *) 0xFFFD0264) // (CAN_MB3) MailBox Acceptance Mask Register -#define AT91C_CAN_MB3_MDH ((AT91_REG *) 0xFFFD0278) // (CAN_MB3) MailBox Data High Register -#define AT91C_CAN_MB3_MSR ((AT91_REG *) 0xFFFD0270) // (CAN_MB3) MailBox Status Register -#define AT91C_CAN_MB3_MID ((AT91_REG *) 0xFFFD0268) // (CAN_MB3) MailBox ID Register -#define AT91C_CAN_MB3_MMR ((AT91_REG *) 0xFFFD0260) // (CAN_MB3) MailBox Mode Register -// ========== Register definition for CAN_MB4 peripheral ========== -#define AT91C_CAN_MB4_MCR ((AT91_REG *) 0xFFFD029C) // (CAN_MB4) MailBox Control Register -#define AT91C_CAN_MB4_MDL ((AT91_REG *) 0xFFFD0294) // (CAN_MB4) MailBox Data Low Register -#define AT91C_CAN_MB4_MFID ((AT91_REG *) 0xFFFD028C) // (CAN_MB4) MailBox Family ID Register -#define AT91C_CAN_MB4_MAM ((AT91_REG *) 0xFFFD0284) // (CAN_MB4) MailBox Acceptance Mask Register -#define AT91C_CAN_MB4_MDH ((AT91_REG *) 0xFFFD0298) // (CAN_MB4) MailBox Data High Register -#define AT91C_CAN_MB4_MSR ((AT91_REG *) 0xFFFD0290) // (CAN_MB4) MailBox Status Register -#define AT91C_CAN_MB4_MID ((AT91_REG *) 0xFFFD0288) // (CAN_MB4) MailBox ID Register -#define AT91C_CAN_MB4_MMR ((AT91_REG *) 0xFFFD0280) // (CAN_MB4) MailBox Mode Register -// ========== Register definition for CAN_MB5 peripheral ========== -#define AT91C_CAN_MB5_MCR ((AT91_REG *) 0xFFFD02BC) // (CAN_MB5) MailBox Control Register -#define AT91C_CAN_MB5_MDL ((AT91_REG *) 0xFFFD02B4) // (CAN_MB5) MailBox Data Low Register -#define AT91C_CAN_MB5_MFID ((AT91_REG *) 0xFFFD02AC) // (CAN_MB5) MailBox Family ID Register -#define AT91C_CAN_MB5_MAM ((AT91_REG *) 0xFFFD02A4) // (CAN_MB5) MailBox Acceptance Mask Register -#define AT91C_CAN_MB5_MDH ((AT91_REG *) 0xFFFD02B8) // (CAN_MB5) MailBox Data High Register -#define AT91C_CAN_MB5_MSR ((AT91_REG *) 0xFFFD02B0) // (CAN_MB5) MailBox Status Register -#define AT91C_CAN_MB5_MID ((AT91_REG *) 0xFFFD02A8) // (CAN_MB5) MailBox ID Register -#define AT91C_CAN_MB5_MMR ((AT91_REG *) 0xFFFD02A0) // (CAN_MB5) MailBox Mode Register -// ========== Register definition for CAN_MB6 peripheral ========== -#define AT91C_CAN_MB6_MAM ((AT91_REG *) 0xFFFD02C4) // (CAN_MB6) MailBox Acceptance Mask Register -#define AT91C_CAN_MB6_MDH ((AT91_REG *) 0xFFFD02D8) // (CAN_MB6) MailBox Data High Register -#define AT91C_CAN_MB6_MSR ((AT91_REG *) 0xFFFD02D0) // (CAN_MB6) MailBox Status Register -#define AT91C_CAN_MB6_MID ((AT91_REG *) 0xFFFD02C8) // (CAN_MB6) MailBox ID Register -#define AT91C_CAN_MB6_MMR ((AT91_REG *) 0xFFFD02C0) // (CAN_MB6) MailBox Mode Register -#define AT91C_CAN_MB6_MCR ((AT91_REG *) 0xFFFD02DC) // (CAN_MB6) MailBox Control Register -#define AT91C_CAN_MB6_MDL ((AT91_REG *) 0xFFFD02D4) // (CAN_MB6) MailBox Data Low Register -#define AT91C_CAN_MB6_MFID ((AT91_REG *) 0xFFFD02CC) // (CAN_MB6) MailBox Family ID Register -// ========== Register definition for CAN_MB7 peripheral ========== -#define AT91C_CAN_MB7_MDH ((AT91_REG *) 0xFFFD02F8) // (CAN_MB7) MailBox Data High Register -#define AT91C_CAN_MB7_MSR ((AT91_REG *) 0xFFFD02F0) // (CAN_MB7) MailBox Status Register -#define AT91C_CAN_MB7_MID ((AT91_REG *) 0xFFFD02E8) // (CAN_MB7) MailBox ID Register -#define AT91C_CAN_MB7_MMR ((AT91_REG *) 0xFFFD02E0) // (CAN_MB7) MailBox Mode Register -#define AT91C_CAN_MB7_MCR ((AT91_REG *) 0xFFFD02FC) // (CAN_MB7) MailBox Control Register -#define AT91C_CAN_MB7_MDL ((AT91_REG *) 0xFFFD02F4) // (CAN_MB7) MailBox Data Low Register -#define AT91C_CAN_MB7_MFID ((AT91_REG *) 0xFFFD02EC) // (CAN_MB7) MailBox Family ID Register -#define AT91C_CAN_MB7_MAM ((AT91_REG *) 0xFFFD02E4) // (CAN_MB7) MailBox Acceptance Mask Register -// ========== Register definition for CAN peripheral ========== -#define AT91C_CAN_IMR ((AT91_REG *) 0xFFFD000C) // (CAN) Interrupt Mask Register -#define AT91C_CAN_IER ((AT91_REG *) 0xFFFD0004) // (CAN) Interrupt Enable Register -#define AT91C_CAN_ECR ((AT91_REG *) 0xFFFD0020) // (CAN) Error Counter Register -#define AT91C_CAN_TIM ((AT91_REG *) 0xFFFD0018) // (CAN) Timer Register -#define AT91C_CAN_SR ((AT91_REG *) 0xFFFD0010) // (CAN) Status Register -#define AT91C_CAN_IDR ((AT91_REG *) 0xFFFD0008) // (CAN) Interrupt Disable Register -#define AT91C_CAN_MR ((AT91_REG *) 0xFFFD0000) // (CAN) Mode Register -#define AT91C_CAN_BR ((AT91_REG *) 0xFFFD0014) // (CAN) Baudrate Register -#define AT91C_CAN_TIMESTP ((AT91_REG *) 0xFFFD001C) // (CAN) Time Stamp Register -#define AT91C_CAN_TCR ((AT91_REG *) 0xFFFD0024) // (CAN) Transfer Command Register -#define AT91C_CAN_ACR ((AT91_REG *) 0xFFFD0028) // (CAN) Abort Command Register -#define AT91C_CAN_VR ((AT91_REG *) 0xFFFD00FC) // (CAN) Version Register -// ========== Register definition for EMAC peripheral ========== -#define AT91C_EMAC_TID ((AT91_REG *) 0xFFFDC0B8) // (EMAC) Type ID Checking Register -#define AT91C_EMAC_SA3L ((AT91_REG *) 0xFFFDC0A8) // (EMAC) Specific Address 3 Bottom, First 4 bytes -#define AT91C_EMAC_STE ((AT91_REG *) 0xFFFDC084) // (EMAC) SQE Test Error Register -#define AT91C_EMAC_RSE ((AT91_REG *) 0xFFFDC074) // (EMAC) Receive Symbol Errors Register -#define AT91C_EMAC_IDR ((AT91_REG *) 0xFFFDC02C) // (EMAC) Interrupt Disable Register -#define AT91C_EMAC_TBQP ((AT91_REG *) 0xFFFDC01C) // (EMAC) Transmit Buffer Queue Pointer -#define AT91C_EMAC_TPQ ((AT91_REG *) 0xFFFDC0BC) // (EMAC) Transmit Pause Quantum Register -#define AT91C_EMAC_SA1L ((AT91_REG *) 0xFFFDC098) // (EMAC) Specific Address 1 Bottom, First 4 bytes -#define AT91C_EMAC_RLE ((AT91_REG *) 0xFFFDC088) // (EMAC) Receive Length Field Mismatch Register -#define AT91C_EMAC_IMR ((AT91_REG *) 0xFFFDC030) // (EMAC) Interrupt Mask Register -#define AT91C_EMAC_SA1H ((AT91_REG *) 0xFFFDC09C) // (EMAC) Specific Address 1 Top, Last 2 bytes -#define AT91C_EMAC_PFR ((AT91_REG *) 0xFFFDC03C) // (EMAC) Pause Frames received Register -#define AT91C_EMAC_FCSE ((AT91_REG *) 0xFFFDC050) // (EMAC) Frame Check Sequence Error Register -#define AT91C_EMAC_FTO ((AT91_REG *) 0xFFFDC040) // (EMAC) Frames Transmitted OK Register -#define AT91C_EMAC_TUND ((AT91_REG *) 0xFFFDC064) // (EMAC) Transmit Underrun Error Register -#define AT91C_EMAC_ALE ((AT91_REG *) 0xFFFDC054) // (EMAC) Alignment Error Register -#define AT91C_EMAC_SCF ((AT91_REG *) 0xFFFDC044) // (EMAC) Single Collision Frame Register -#define AT91C_EMAC_SA3H ((AT91_REG *) 0xFFFDC0AC) // (EMAC) Specific Address 3 Top, Last 2 bytes -#define AT91C_EMAC_ELE ((AT91_REG *) 0xFFFDC078) // (EMAC) Excessive Length Errors Register -#define AT91C_EMAC_CSE ((AT91_REG *) 0xFFFDC068) // (EMAC) Carrier Sense Error Register -#define AT91C_EMAC_DTF ((AT91_REG *) 0xFFFDC058) // (EMAC) Deferred Transmission Frame Register -#define AT91C_EMAC_RSR ((AT91_REG *) 0xFFFDC020) // (EMAC) Receive Status Register -#define AT91C_EMAC_USRIO ((AT91_REG *) 0xFFFDC0C0) // (EMAC) USER Input/Output Register -#define AT91C_EMAC_SA4L ((AT91_REG *) 0xFFFDC0B0) // (EMAC) Specific Address 4 Bottom, First 4 bytes -#define AT91C_EMAC_RRE ((AT91_REG *) 0xFFFDC06C) // (EMAC) Receive Ressource Error Register -#define AT91C_EMAC_RJA ((AT91_REG *) 0xFFFDC07C) // (EMAC) Receive Jabbers Register -#define AT91C_EMAC_TPF ((AT91_REG *) 0xFFFDC08C) // (EMAC) Transmitted Pause Frames Register -#define AT91C_EMAC_ISR ((AT91_REG *) 0xFFFDC024) // (EMAC) Interrupt Status Register -#define AT91C_EMAC_MAN ((AT91_REG *) 0xFFFDC034) // (EMAC) PHY Maintenance Register -#define AT91C_EMAC_WOL ((AT91_REG *) 0xFFFDC0C4) // (EMAC) Wake On LAN Register -#define AT91C_EMAC_USF ((AT91_REG *) 0xFFFDC080) // (EMAC) Undersize Frames Register -#define AT91C_EMAC_HRB ((AT91_REG *) 0xFFFDC090) // (EMAC) Hash Address Bottom[31:0] -#define AT91C_EMAC_PTR ((AT91_REG *) 0xFFFDC038) // (EMAC) Pause Time Register -#define AT91C_EMAC_HRT ((AT91_REG *) 0xFFFDC094) // (EMAC) Hash Address Top[63:32] -#define AT91C_EMAC_REV ((AT91_REG *) 0xFFFDC0FC) // (EMAC) Revision Register -#define AT91C_EMAC_MCF ((AT91_REG *) 0xFFFDC048) // (EMAC) Multiple Collision Frame Register -#define AT91C_EMAC_SA2L ((AT91_REG *) 0xFFFDC0A0) // (EMAC) Specific Address 2 Bottom, First 4 bytes -#define AT91C_EMAC_NCR ((AT91_REG *) 0xFFFDC000) // (EMAC) Network Control Register -#define AT91C_EMAC_FRO ((AT91_REG *) 0xFFFDC04C) // (EMAC) Frames Received OK Register -#define AT91C_EMAC_LCOL ((AT91_REG *) 0xFFFDC05C) // (EMAC) Late Collision Register -#define AT91C_EMAC_SA4H ((AT91_REG *) 0xFFFDC0B4) // (EMAC) Specific Address 4 Top, Last 2 bytes -#define AT91C_EMAC_NCFGR ((AT91_REG *) 0xFFFDC004) // (EMAC) Network Configuration Register -#define AT91C_EMAC_TSR ((AT91_REG *) 0xFFFDC014) // (EMAC) Transmit Status Register -#define AT91C_EMAC_SA2H ((AT91_REG *) 0xFFFDC0A4) // (EMAC) Specific Address 2 Top, Last 2 bytes -#define AT91C_EMAC_ECOL ((AT91_REG *) 0xFFFDC060) // (EMAC) Excessive Collision Register -#define AT91C_EMAC_ROV ((AT91_REG *) 0xFFFDC070) // (EMAC) Receive Overrun Errors Register -#define AT91C_EMAC_NSR ((AT91_REG *) 0xFFFDC008) // (EMAC) Network Status Register -#define AT91C_EMAC_RBQP ((AT91_REG *) 0xFFFDC018) // (EMAC) Receive Buffer Queue Pointer -#define AT91C_EMAC_IER ((AT91_REG *) 0xFFFDC028) // (EMAC) Interrupt Enable Register -// ========== Register definition for PDC_ADC peripheral ========== -#define AT91C_ADC_PTCR ((AT91_REG *) 0xFFFD8120) // (PDC_ADC) PDC Transfer Control Register -#define AT91C_ADC_TNPR ((AT91_REG *) 0xFFFD8118) // (PDC_ADC) Transmit Next Pointer Register -#define AT91C_ADC_RNPR ((AT91_REG *) 0xFFFD8110) // (PDC_ADC) Receive Next Pointer Register -#define AT91C_ADC_TPR ((AT91_REG *) 0xFFFD8108) // (PDC_ADC) Transmit Pointer Register -#define AT91C_ADC_RPR ((AT91_REG *) 0xFFFD8100) // (PDC_ADC) Receive Pointer Register -#define AT91C_ADC_PTSR ((AT91_REG *) 0xFFFD8124) // (PDC_ADC) PDC Transfer Status Register -#define AT91C_ADC_TNCR ((AT91_REG *) 0xFFFD811C) // (PDC_ADC) Transmit Next Counter Register -#define AT91C_ADC_RNCR ((AT91_REG *) 0xFFFD8114) // (PDC_ADC) Receive Next Counter Register -#define AT91C_ADC_TCR ((AT91_REG *) 0xFFFD810C) // (PDC_ADC) Transmit Counter Register -#define AT91C_ADC_RCR ((AT91_REG *) 0xFFFD8104) // (PDC_ADC) Receive Counter Register -// ========== Register definition for ADC peripheral ========== -#define AT91C_ADC_IMR ((AT91_REG *) 0xFFFD802C) // (ADC) ADC Interrupt Mask Register -#define AT91C_ADC_CDR4 ((AT91_REG *) 0xFFFD8040) // (ADC) ADC Channel Data Register 4 -#define AT91C_ADC_CDR2 ((AT91_REG *) 0xFFFD8038) // (ADC) ADC Channel Data Register 2 -#define AT91C_ADC_CDR0 ((AT91_REG *) 0xFFFD8030) // (ADC) ADC Channel Data Register 0 -#define AT91C_ADC_CDR7 ((AT91_REG *) 0xFFFD804C) // (ADC) ADC Channel Data Register 7 -#define AT91C_ADC_CDR1 ((AT91_REG *) 0xFFFD8034) // (ADC) ADC Channel Data Register 1 -#define AT91C_ADC_CDR3 ((AT91_REG *) 0xFFFD803C) // (ADC) ADC Channel Data Register 3 -#define AT91C_ADC_CDR5 ((AT91_REG *) 0xFFFD8044) // (ADC) ADC Channel Data Register 5 -#define AT91C_ADC_MR ((AT91_REG *) 0xFFFD8004) // (ADC) ADC Mode Register -#define AT91C_ADC_CDR6 ((AT91_REG *) 0xFFFD8048) // (ADC) ADC Channel Data Register 6 -#define AT91C_ADC_CR ((AT91_REG *) 0xFFFD8000) // (ADC) ADC Control Register -#define AT91C_ADC_CHER ((AT91_REG *) 0xFFFD8010) // (ADC) ADC Channel Enable Register -#define AT91C_ADC_CHSR ((AT91_REG *) 0xFFFD8018) // (ADC) ADC Channel Status Register -#define AT91C_ADC_IER ((AT91_REG *) 0xFFFD8024) // (ADC) ADC Interrupt Enable Register -#define AT91C_ADC_SR ((AT91_REG *) 0xFFFD801C) // (ADC) ADC Status Register -#define AT91C_ADC_CHDR ((AT91_REG *) 0xFFFD8014) // (ADC) ADC Channel Disable Register -#define AT91C_ADC_IDR ((AT91_REG *) 0xFFFD8028) // (ADC) ADC Interrupt Disable Register -#define AT91C_ADC_LCDR ((AT91_REG *) 0xFFFD8020) // (ADC) ADC Last Converted Data Register - -// ***************************************************************************** -// PIO DEFINITIONS FOR AT91SAM7X256 -// ***************************************************************************** -#define AT91C_PIO_PA0 ((unsigned int) 1 << 0) // Pin Controlled by PA0 -#define AT91C_PA0_RXD0 ((unsigned int) AT91C_PIO_PA0) // USART 0 Receive Data -#define AT91C_PIO_PA1 ((unsigned int) 1 << 1) // Pin Controlled by PA1 -#define AT91C_PA1_TXD0 ((unsigned int) AT91C_PIO_PA1) // USART 0 Transmit Data -#define AT91C_PIO_PA10 ((unsigned int) 1 << 10) // Pin Controlled by PA10 -#define AT91C_PA10_TWD ((unsigned int) AT91C_PIO_PA10) // TWI Two-wire Serial Data -#define AT91C_PIO_PA11 ((unsigned int) 1 << 11) // Pin Controlled by PA11 -#define AT91C_PA11_TWCK ((unsigned int) AT91C_PIO_PA11) // TWI Two-wire Serial Clock -#define AT91C_PIO_PA12 ((unsigned int) 1 << 12) // Pin Controlled by PA12 -#define AT91C_PA12_SPI0_NPCS0 ((unsigned int) AT91C_PIO_PA12) // SPI 0 Peripheral Chip Select 0 -#define AT91C_PIO_PA13 ((unsigned int) 1 << 13) // Pin Controlled by PA13 -#define AT91C_PA13_SPI0_NPCS1 ((unsigned int) AT91C_PIO_PA13) // SPI 0 Peripheral Chip Select 1 -#define AT91C_PA13_PCK1 ((unsigned int) AT91C_PIO_PA13) // PMC Programmable Clock Output 1 -#define AT91C_PIO_PA14 ((unsigned int) 1 << 14) // Pin Controlled by PA14 -#define AT91C_PA14_SPI0_NPCS2 ((unsigned int) AT91C_PIO_PA14) // SPI 0 Peripheral Chip Select 2 -#define AT91C_PA14_IRQ1 ((unsigned int) AT91C_PIO_PA14) // External Interrupt 1 -#define AT91C_PIO_PA15 ((unsigned int) 1 << 15) // Pin Controlled by PA15 -#define AT91C_PA15_SPI0_NPCS3 ((unsigned int) AT91C_PIO_PA15) // SPI 0 Peripheral Chip Select 3 -#define AT91C_PA15_TCLK2 ((unsigned int) AT91C_PIO_PA15) // Timer Counter 2 external clock input -#define AT91C_PIO_PA16 ((unsigned int) 1 << 16) // Pin Controlled by PA16 -#define AT91C_PA16_SPI0_MISO ((unsigned int) AT91C_PIO_PA16) // SPI 0 Master In Slave -#define AT91C_PIO_PA17 ((unsigned int) 1 << 17) // Pin Controlled by PA17 -#define AT91C_PA17_SPI0_MOSI ((unsigned int) AT91C_PIO_PA17) // SPI 0 Master Out Slave -#define AT91C_PIO_PA18 ((unsigned int) 1 << 18) // Pin Controlled by PA18 -#define AT91C_PA18_SPI0_SPCK ((unsigned int) AT91C_PIO_PA18) // SPI 0 Serial Clock -#define AT91C_PIO_PA19 ((unsigned int) 1 << 19) // Pin Controlled by PA19 -#define AT91C_PA19_CANRX ((unsigned int) AT91C_PIO_PA19) // CAN Receive -#define AT91C_PIO_PA2 ((unsigned int) 1 << 2) // Pin Controlled by PA2 -#define AT91C_PA2_SCK0 ((unsigned int) AT91C_PIO_PA2) // USART 0 Serial Clock -#define AT91C_PA2_SPI1_NPCS1 ((unsigned int) AT91C_PIO_PA2) // SPI 1 Peripheral Chip Select 1 -#define AT91C_PIO_PA20 ((unsigned int) 1 << 20) // Pin Controlled by PA20 -#define AT91C_PA20_CANTX ((unsigned int) AT91C_PIO_PA20) // CAN Transmit -#define AT91C_PIO_PA21 ((unsigned int) 1 << 21) // Pin Controlled by PA21 -#define AT91C_PA21_TF ((unsigned int) AT91C_PIO_PA21) // SSC Transmit Frame Sync -#define AT91C_PA21_SPI1_NPCS0 ((unsigned int) AT91C_PIO_PA21) // SPI 1 Peripheral Chip Select 0 -#define AT91C_PIO_PA22 ((unsigned int) 1 << 22) // Pin Controlled by PA22 -#define AT91C_PA22_TK ((unsigned int) AT91C_PIO_PA22) // SSC Transmit Clock -#define AT91C_PA22_SPI1_SPCK ((unsigned int) AT91C_PIO_PA22) // SPI 1 Serial Clock -#define AT91C_PIO_PA23 ((unsigned int) 1 << 23) // Pin Controlled by PA23 -#define AT91C_PA23_TD ((unsigned int) AT91C_PIO_PA23) // SSC Transmit data -#define AT91C_PA23_SPI1_MOSI ((unsigned int) AT91C_PIO_PA23) // SPI 1 Master Out Slave -#define AT91C_PIO_PA24 ((unsigned int) 1 << 24) // Pin Controlled by PA24 -#define AT91C_PA24_RD ((unsigned int) AT91C_PIO_PA24) // SSC Receive Data -#define AT91C_PA24_SPI1_MISO ((unsigned int) AT91C_PIO_PA24) // SPI 1 Master In Slave -#define AT91C_PIO_PA25 ((unsigned int) 1 << 25) // Pin Controlled by PA25 -#define AT91C_PA25_RK ((unsigned int) AT91C_PIO_PA25) // SSC Receive Clock -#define AT91C_PA25_SPI1_NPCS1 ((unsigned int) AT91C_PIO_PA25) // SPI 1 Peripheral Chip Select 1 -#define AT91C_PIO_PA26 ((unsigned int) 1 << 26) // Pin Controlled by PA26 -#define AT91C_PA26_RF ((unsigned int) AT91C_PIO_PA26) // SSC Receive Frame Sync -#define AT91C_PA26_SPI1_NPCS2 ((unsigned int) AT91C_PIO_PA26) // SPI 1 Peripheral Chip Select 2 -#define AT91C_PIO_PA27 ((unsigned int) 1 << 27) // Pin Controlled by PA27 -#define AT91C_PA27_DRXD ((unsigned int) AT91C_PIO_PA27) // DBGU Debug Receive Data -#define AT91C_PA27_PCK3 ((unsigned int) AT91C_PIO_PA27) // PMC Programmable Clock Output 3 -#define AT91C_PIO_PA28 ((unsigned int) 1 << 28) // Pin Controlled by PA28 -#define AT91C_PA28_DTXD ((unsigned int) AT91C_PIO_PA28) // DBGU Debug Transmit Data -#define AT91C_PIO_PA29 ((unsigned int) 1 << 29) // Pin Controlled by PA29 -#define AT91C_PA29_FIQ ((unsigned int) AT91C_PIO_PA29) // AIC Fast Interrupt Input -#define AT91C_PA29_SPI1_NPCS3 ((unsigned int) AT91C_PIO_PA29) // SPI 1 Peripheral Chip Select 3 -#define AT91C_PIO_PA3 ((unsigned int) 1 << 3) // Pin Controlled by PA3 -#define AT91C_PA3_RTS0 ((unsigned int) AT91C_PIO_PA3) // USART 0 Ready To Send -#define AT91C_PA3_SPI1_NPCS2 ((unsigned int) AT91C_PIO_PA3) // SPI 1 Peripheral Chip Select 2 -#define AT91C_PIO_PA30 ((unsigned int) 1 << 30) // Pin Controlled by PA30 -#define AT91C_PA30_IRQ0 ((unsigned int) AT91C_PIO_PA30) // External Interrupt 0 -#define AT91C_PA30_PCK2 ((unsigned int) AT91C_PIO_PA30) // PMC Programmable Clock Output 2 -#define AT91C_PIO_PA4 ((unsigned int) 1 << 4) // Pin Controlled by PA4 -#define AT91C_PA4_CTS0 ((unsigned int) AT91C_PIO_PA4) // USART 0 Clear To Send -#define AT91C_PA4_SPI1_NPCS3 ((unsigned int) AT91C_PIO_PA4) // SPI 1 Peripheral Chip Select 3 -#define AT91C_PIO_PA5 ((unsigned int) 1 << 5) // Pin Controlled by PA5 -#define AT91C_PA5_RXD1 ((unsigned int) AT91C_PIO_PA5) // USART 1 Receive Data -#define AT91C_PIO_PA6 ((unsigned int) 1 << 6) // Pin Controlled by PA6 -#define AT91C_PA6_TXD1 ((unsigned int) AT91C_PIO_PA6) // USART 1 Transmit Data -#define AT91C_PIO_PA7 ((unsigned int) 1 << 7) // Pin Controlled by PA7 -#define AT91C_PA7_SCK1 ((unsigned int) AT91C_PIO_PA7) // USART 1 Serial Clock -#define AT91C_PA7_SPI0_NPCS1 ((unsigned int) AT91C_PIO_PA7) // SPI 0 Peripheral Chip Select 1 -#define AT91C_PIO_PA8 ((unsigned int) 1 << 8) // Pin Controlled by PA8 -#define AT91C_PA8_RTS1 ((unsigned int) AT91C_PIO_PA8) // USART 1 Ready To Send -#define AT91C_PA8_SPI0_NPCS2 ((unsigned int) AT91C_PIO_PA8) // SPI 0 Peripheral Chip Select 2 -#define AT91C_PIO_PA9 ((unsigned int) 1 << 9) // Pin Controlled by PA9 -#define AT91C_PA9_CTS1 ((unsigned int) AT91C_PIO_PA9) // USART 1 Clear To Send -#define AT91C_PA9_SPI0_NPCS3 ((unsigned int) AT91C_PIO_PA9) // SPI 0 Peripheral Chip Select 3 -#define AT91C_PIO_PB0 ((unsigned int) 1 << 0) // Pin Controlled by PB0 -#define AT91C_PB0_ETXCK_EREFCK ((unsigned int) AT91C_PIO_PB0) // Ethernet MAC Transmit Clock/Reference Clock -#define AT91C_PB0_PCK0 ((unsigned int) AT91C_PIO_PB0) // PMC Programmable Clock Output 0 -#define AT91C_PIO_PB1 ((unsigned int) 1 << 1) // Pin Controlled by PB1 -#define AT91C_PB1_ETXEN ((unsigned int) AT91C_PIO_PB1) // Ethernet MAC Transmit Enable -#define AT91C_PIO_PB10 ((unsigned int) 1 << 10) // Pin Controlled by PB10 -#define AT91C_PB10_ETX2 ((unsigned int) AT91C_PIO_PB10) // Ethernet MAC Transmit Data 2 -#define AT91C_PB10_SPI1_NPCS1 ((unsigned int) AT91C_PIO_PB10) // SPI 1 Peripheral Chip Select 1 -#define AT91C_PIO_PB11 ((unsigned int) 1 << 11) // Pin Controlled by PB11 -#define AT91C_PB11_ETX3 ((unsigned int) AT91C_PIO_PB11) // Ethernet MAC Transmit Data 3 -#define AT91C_PB11_SPI1_NPCS2 ((unsigned int) AT91C_PIO_PB11) // SPI 1 Peripheral Chip Select 2 -#define AT91C_PIO_PB12 ((unsigned int) 1 << 12) // Pin Controlled by PB12 -#define AT91C_PB12_ETXER ((unsigned int) AT91C_PIO_PB12) // Ethernet MAC Transmikt Coding Error -#define AT91C_PB12_TCLK0 ((unsigned int) AT91C_PIO_PB12) // Timer Counter 0 external clock input -#define AT91C_PIO_PB13 ((unsigned int) 1 << 13) // Pin Controlled by PB13 -#define AT91C_PB13_ERX2 ((unsigned int) AT91C_PIO_PB13) // Ethernet MAC Receive Data 2 -#define AT91C_PB13_SPI0_NPCS1 ((unsigned int) AT91C_PIO_PB13) // SPI 0 Peripheral Chip Select 1 -#define AT91C_PIO_PB14 ((unsigned int) 1 << 14) // Pin Controlled by PB14 -#define AT91C_PB14_ERX3 ((unsigned int) AT91C_PIO_PB14) // Ethernet MAC Receive Data 3 -#define AT91C_PB14_SPI0_NPCS2 ((unsigned int) AT91C_PIO_PB14) // SPI 0 Peripheral Chip Select 2 -#define AT91C_PIO_PB15 ((unsigned int) 1 << 15) // Pin Controlled by PB15 -#define AT91C_PB15_ERXDV_ECRSDV ((unsigned int) AT91C_PIO_PB15) // Ethernet MAC Receive Data Valid -#define AT91C_PIO_PB16 ((unsigned int) 1 << 16) // Pin Controlled by PB16 -#define AT91C_PB16_ECOL ((unsigned int) AT91C_PIO_PB16) // Ethernet MAC Collision Detected -#define AT91C_PB16_SPI1_NPCS3 ((unsigned int) AT91C_PIO_PB16) // SPI 1 Peripheral Chip Select 3 -#define AT91C_PIO_PB17 ((unsigned int) 1 << 17) // Pin Controlled by PB17 -#define AT91C_PB17_ERXCK ((unsigned int) AT91C_PIO_PB17) // Ethernet MAC Receive Clock -#define AT91C_PB17_SPI0_NPCS3 ((unsigned int) AT91C_PIO_PB17) // SPI 0 Peripheral Chip Select 3 -#define AT91C_PIO_PB18 ((unsigned int) 1 << 18) // Pin Controlled by PB18 -#define AT91C_PB18_EF100 ((unsigned int) AT91C_PIO_PB18) // Ethernet MAC Force 100 Mbits/sec -#define AT91C_PB18_ADTRG ((unsigned int) AT91C_PIO_PB18) // ADC External Trigger -#define AT91C_PIO_PB19 ((unsigned int) 1 << 19) // Pin Controlled by PB19 -#define AT91C_PB19_PWM0 ((unsigned int) AT91C_PIO_PB19) // PWM Channel 0 -#define AT91C_PB19_TCLK1 ((unsigned int) AT91C_PIO_PB19) // Timer Counter 1 external clock input -#define AT91C_PIO_PB2 ((unsigned int) 1 << 2) // Pin Controlled by PB2 -#define AT91C_PB2_ETX0 ((unsigned int) AT91C_PIO_PB2) // Ethernet MAC Transmit Data 0 -#define AT91C_PIO_PB20 ((unsigned int) 1 << 20) // Pin Controlled by PB20 -#define AT91C_PB20_PWM1 ((unsigned int) AT91C_PIO_PB20) // PWM Channel 1 -#define AT91C_PB20_PCK0 ((unsigned int) AT91C_PIO_PB20) // PMC Programmable Clock Output 0 -#define AT91C_PIO_PB21 ((unsigned int) 1 << 21) // Pin Controlled by PB21 -#define AT91C_PB21_PWM2 ((unsigned int) AT91C_PIO_PB21) // PWM Channel 2 -#define AT91C_PB21_PCK1 ((unsigned int) AT91C_PIO_PB21) // PMC Programmable Clock Output 1 -#define AT91C_PIO_PB22 ((unsigned int) 1 << 22) // Pin Controlled by PB22 -#define AT91C_PB22_PWM3 ((unsigned int) AT91C_PIO_PB22) // PWM Channel 3 -#define AT91C_PB22_PCK2 ((unsigned int) AT91C_PIO_PB22) // PMC Programmable Clock Output 2 -#define AT91C_PIO_PB23 ((unsigned int) 1 << 23) // Pin Controlled by PB23 -#define AT91C_PB23_TIOA0 ((unsigned int) AT91C_PIO_PB23) // Timer Counter 0 Multipurpose Timer I/O Pin A -#define AT91C_PB23_DCD1 ((unsigned int) AT91C_PIO_PB23) // USART 1 Data Carrier Detect -#define AT91C_PIO_PB24 ((unsigned int) 1 << 24) // Pin Controlled by PB24 -#define AT91C_PB24_TIOB0 ((unsigned int) AT91C_PIO_PB24) // Timer Counter 0 Multipurpose Timer I/O Pin B -#define AT91C_PB24_DSR1 ((unsigned int) AT91C_PIO_PB24) // USART 1 Data Set ready -#define AT91C_PIO_PB25 ((unsigned int) 1 << 25) // Pin Controlled by PB25 -#define AT91C_PB25_TIOA1 ((unsigned int) AT91C_PIO_PB25) // Timer Counter 1 Multipurpose Timer I/O Pin A -#define AT91C_PB25_DTR1 ((unsigned int) AT91C_PIO_PB25) // USART 1 Data Terminal ready -#define AT91C_PIO_PB26 ((unsigned int) 1 << 26) // Pin Controlled by PB26 -#define AT91C_PB26_TIOB1 ((unsigned int) AT91C_PIO_PB26) // Timer Counter 1 Multipurpose Timer I/O Pin B -#define AT91C_PB26_RI1 ((unsigned int) AT91C_PIO_PB26) // USART 1 Ring Indicator -#define AT91C_PIO_PB27 ((unsigned int) 1 << 27) // Pin Controlled by PB27 -#define AT91C_PB27_TIOA2 ((unsigned int) AT91C_PIO_PB27) // Timer Counter 2 Multipurpose Timer I/O Pin A -#define AT91C_PB27_PWM0 ((unsigned int) AT91C_PIO_PB27) // PWM Channel 0 -#define AT91C_PIO_PB28 ((unsigned int) 1 << 28) // Pin Controlled by PB28 -#define AT91C_PB28_TIOB2 ((unsigned int) AT91C_PIO_PB28) // Timer Counter 2 Multipurpose Timer I/O Pin B -#define AT91C_PB28_PWM1 ((unsigned int) AT91C_PIO_PB28) // PWM Channel 1 -#define AT91C_PIO_PB29 ((unsigned int) 1 << 29) // Pin Controlled by PB29 -#define AT91C_PB29_PCK1 ((unsigned int) AT91C_PIO_PB29) // PMC Programmable Clock Output 1 -#define AT91C_PB29_PWM2 ((unsigned int) AT91C_PIO_PB29) // PWM Channel 2 -#define AT91C_PIO_PB3 ((unsigned int) 1 << 3) // Pin Controlled by PB3 -#define AT91C_PB3_ETX1 ((unsigned int) AT91C_PIO_PB3) // Ethernet MAC Transmit Data 1 -#define AT91C_PIO_PB30 ((unsigned int) 1 << 30) // Pin Controlled by PB30 -#define AT91C_PB30_PCK2 ((unsigned int) AT91C_PIO_PB30) // PMC Programmable Clock Output 2 -#define AT91C_PB30_PWM3 ((unsigned int) AT91C_PIO_PB30) // PWM Channel 3 -#define AT91C_PIO_PB4 ((unsigned int) 1 << 4) // Pin Controlled by PB4 -#define AT91C_PB4_ECRS ((unsigned int) AT91C_PIO_PB4) // Ethernet MAC Carrier Sense/Carrier Sense and Data Valid -#define AT91C_PIO_PB5 ((unsigned int) 1 << 5) // Pin Controlled by PB5 -#define AT91C_PB5_ERX0 ((unsigned int) AT91C_PIO_PB5) // Ethernet MAC Receive Data 0 -#define AT91C_PIO_PB6 ((unsigned int) 1 << 6) // Pin Controlled by PB6 -#define AT91C_PB6_ERX1 ((unsigned int) AT91C_PIO_PB6) // Ethernet MAC Receive Data 1 -#define AT91C_PIO_PB7 ((unsigned int) 1 << 7) // Pin Controlled by PB7 -#define AT91C_PB7_ERXER ((unsigned int) AT91C_PIO_PB7) // Ethernet MAC Receive Error -#define AT91C_PIO_PB8 ((unsigned int) 1 << 8) // Pin Controlled by PB8 -#define AT91C_PB8_EMDC ((unsigned int) AT91C_PIO_PB8) // Ethernet MAC Management Data Clock -#define AT91C_PIO_PB9 ((unsigned int) 1 << 9) // Pin Controlled by PB9 -#define AT91C_PB9_EMDIO ((unsigned int) AT91C_PIO_PB9) // Ethernet MAC Management Data Input/Output - -// ***************************************************************************** -// PERIPHERAL ID DEFINITIONS FOR AT91SAM7X256 -// ***************************************************************************** -#define AT91C_ID_FIQ ((unsigned int) 0) // Advanced Interrupt Controller (FIQ) -#define AT91C_ID_SYS ((unsigned int) 1) // System Peripheral -#define AT91C_ID_PIOA ((unsigned int) 2) // Parallel IO Controller A -#define AT91C_ID_PIOB ((unsigned int) 3) // Parallel IO Controller B -#define AT91C_ID_SPI0 ((unsigned int) 4) // Serial Peripheral Interface 0 -#define AT91C_ID_SPI1 ((unsigned int) 5) // Serial Peripheral Interface 1 -#define AT91C_ID_US0 ((unsigned int) 6) // USART 0 -#define AT91C_ID_US1 ((unsigned int) 7) // USART 1 -#define AT91C_ID_SSC ((unsigned int) 8) // Serial Synchronous Controller -#define AT91C_ID_TWI ((unsigned int) 9) // Two-Wire Interface -#define AT91C_ID_PWMC ((unsigned int) 10) // PWM Controller -#define AT91C_ID_UDP ((unsigned int) 11) // USB Device Port -#define AT91C_ID_TC0 ((unsigned int) 12) // Timer Counter 0 -#define AT91C_ID_TC1 ((unsigned int) 13) // Timer Counter 1 -#define AT91C_ID_TC2 ((unsigned int) 14) // Timer Counter 2 -#define AT91C_ID_CAN ((unsigned int) 15) // Control Area Network Controller -#define AT91C_ID_EMAC ((unsigned int) 16) // Ethernet MAC -#define AT91C_ID_ADC ((unsigned int) 17) // Analog-to-Digital Converter -#define AT91C_ID_18_Reserved ((unsigned int) 18) // Reserved -#define AT91C_ID_19_Reserved ((unsigned int) 19) // Reserved -#define AT91C_ID_20_Reserved ((unsigned int) 20) // Reserved -#define AT91C_ID_21_Reserved ((unsigned int) 21) // Reserved -#define AT91C_ID_22_Reserved ((unsigned int) 22) // Reserved -#define AT91C_ID_23_Reserved ((unsigned int) 23) // Reserved -#define AT91C_ID_24_Reserved ((unsigned int) 24) // Reserved -#define AT91C_ID_25_Reserved ((unsigned int) 25) // Reserved -#define AT91C_ID_26_Reserved ((unsigned int) 26) // Reserved -#define AT91C_ID_27_Reserved ((unsigned int) 27) // Reserved -#define AT91C_ID_28_Reserved ((unsigned int) 28) // Reserved -#define AT91C_ID_29_Reserved ((unsigned int) 29) // Reserved -#define AT91C_ID_IRQ0 ((unsigned int) 30) // Advanced Interrupt Controller (IRQ0) -#define AT91C_ID_IRQ1 ((unsigned int) 31) // Advanced Interrupt Controller (IRQ1) -#define AT91C_ALL_INT ((unsigned int) 0xC003FFFF) // ALL VALID INTERRUPTS - -// ***************************************************************************** -// BASE ADDRESS DEFINITIONS FOR AT91SAM7X256 -// ***************************************************************************** -#define AT91C_BASE_SYS ((AT91PS_SYS) 0xFFFFF000) // (SYS) Base Address -#define AT91C_BASE_AIC ((AT91PS_AIC) 0xFFFFF000) // (AIC) Base Address -#define AT91C_BASE_PDC_DBGU ((AT91PS_PDC) 0xFFFFF300) // (PDC_DBGU) Base Address -#define AT91C_BASE_DBGU ((AT91PS_DBGU) 0xFFFFF200) // (DBGU) Base Address -#define AT91C_BASE_PIOA ((AT91PS_PIO) 0xFFFFF400) // (PIOA) Base Address -#define AT91C_BASE_PIOB ((AT91PS_PIO) 0xFFFFF600) // (PIOB) Base Address -#define AT91C_BASE_CKGR ((AT91PS_CKGR) 0xFFFFFC20) // (CKGR) Base Address -#define AT91C_BASE_PMC ((AT91PS_PMC) 0xFFFFFC00) // (PMC) Base Address -#define AT91C_BASE_RSTC ((AT91PS_RSTC) 0xFFFFFD00) // (RSTC) Base Address -#define AT91C_BASE_RTTC ((AT91PS_RTTC) 0xFFFFFD20) // (RTTC) Base Address -#define AT91C_BASE_PITC ((AT91PS_PITC) 0xFFFFFD30) // (PITC) Base Address -#define AT91C_BASE_WDTC ((AT91PS_WDTC) 0xFFFFFD40) // (WDTC) Base Address -#define AT91C_BASE_VREG ((AT91PS_VREG) 0xFFFFFD60) // (VREG) Base Address -#define AT91C_BASE_MC ((AT91PS_MC) 0xFFFFFF00) // (MC) Base Address -#define AT91C_BASE_PDC_SPI1 ((AT91PS_PDC) 0xFFFE4100) // (PDC_SPI1) Base Address -#define AT91C_BASE_SPI1 ((AT91PS_SPI) 0xFFFE4000) // (SPI1) Base Address -#define AT91C_BASE_PDC_SPI0 ((AT91PS_PDC) 0xFFFE0100) // (PDC_SPI0) Base Address -#define AT91C_BASE_SPI0 ((AT91PS_SPI) 0xFFFE0000) // (SPI0) Base Address -#define AT91C_BASE_PDC_US1 ((AT91PS_PDC) 0xFFFC4100) // (PDC_US1) Base Address -#define AT91C_BASE_US1 ((AT91PS_USART) 0xFFFC4000) // (US1) Base Address -#define AT91C_BASE_PDC_US0 ((AT91PS_PDC) 0xFFFC0100) // (PDC_US0) Base Address -#define AT91C_BASE_US0 ((AT91PS_USART) 0xFFFC0000) // (US0) Base Address -#define AT91C_BASE_PDC_SSC ((AT91PS_PDC) 0xFFFD4100) // (PDC_SSC) Base Address -#define AT91C_BASE_SSC ((AT91PS_SSC) 0xFFFD4000) // (SSC) Base Address -#define AT91C_BASE_TWI ((AT91PS_TWI) 0xFFFB8000) // (TWI) Base Address -#define AT91C_BASE_PWMC_CH3 ((AT91PS_PWMC_CH) 0xFFFCC260) // (PWMC_CH3) Base Address -#define AT91C_BASE_PWMC_CH2 ((AT91PS_PWMC_CH) 0xFFFCC240) // (PWMC_CH2) Base Address -#define AT91C_BASE_PWMC_CH1 ((AT91PS_PWMC_CH) 0xFFFCC220) // (PWMC_CH1) Base Address -#define AT91C_BASE_PWMC_CH0 ((AT91PS_PWMC_CH) 0xFFFCC200) // (PWMC_CH0) Base Address -#define AT91C_BASE_PWMC ((AT91PS_PWMC) 0xFFFCC000) // (PWMC) Base Address -#define AT91C_BASE_UDP ((AT91PS_UDP) 0xFFFB0000) // (UDP) Base Address -#define AT91C_BASE_TC0 ((AT91PS_TC) 0xFFFA0000) // (TC0) Base Address -#define AT91C_BASE_TC1 ((AT91PS_TC) 0xFFFA0040) // (TC1) Base Address -#define AT91C_BASE_TC2 ((AT91PS_TC) 0xFFFA0080) // (TC2) Base Address -#define AT91C_BASE_TCB ((AT91PS_TCB) 0xFFFA0000) // (TCB) Base Address -#define AT91C_BASE_CAN_MB0 ((AT91PS_CAN_MB) 0xFFFD0200) // (CAN_MB0) Base Address -#define AT91C_BASE_CAN_MB1 ((AT91PS_CAN_MB) 0xFFFD0220) // (CAN_MB1) Base Address -#define AT91C_BASE_CAN_MB2 ((AT91PS_CAN_MB) 0xFFFD0240) // (CAN_MB2) Base Address -#define AT91C_BASE_CAN_MB3 ((AT91PS_CAN_MB) 0xFFFD0260) // (CAN_MB3) Base Address -#define AT91C_BASE_CAN_MB4 ((AT91PS_CAN_MB) 0xFFFD0280) // (CAN_MB4) Base Address -#define AT91C_BASE_CAN_MB5 ((AT91PS_CAN_MB) 0xFFFD02A0) // (CAN_MB5) Base Address -#define AT91C_BASE_CAN_MB6 ((AT91PS_CAN_MB) 0xFFFD02C0) // (CAN_MB6) Base Address -#define AT91C_BASE_CAN_MB7 ((AT91PS_CAN_MB) 0xFFFD02E0) // (CAN_MB7) Base Address -#define AT91C_BASE_CAN ((AT91PS_CAN) 0xFFFD0000) // (CAN) Base Address -#define AT91C_BASE_EMAC ((AT91PS_EMAC) 0xFFFDC000) // (EMAC) Base Address -#define AT91C_BASE_PDC_ADC ((AT91PS_PDC) 0xFFFD8100) // (PDC_ADC) Base Address -#define AT91C_BASE_ADC ((AT91PS_ADC) 0xFFFD8000) // (ADC) Base Address - -// ***************************************************************************** -// MEMORY MAPPING DEFINITIONS FOR AT91SAM7X256 -// ***************************************************************************** -// ISRAM -#define AT91C_ISRAM ((char *) 0x00200000) // Internal SRAM base address -#define AT91C_ISRAM_SIZE ((unsigned int) 0x00010000) // Internal SRAM size in byte (64 Kbytes) -// IFLASH -#define AT91C_IFLASH ((char *) 0x00100000) // Internal FLASH base address -#define AT91C_IFLASH_SIZE ((unsigned int) 0x00040000) // Internal FLASH size in byte (256 Kbytes) -#define AT91C_IFLASH_PAGE_SIZE ((unsigned int) 256) // Internal FLASH Page Size: 256 bytes -#define AT91C_IFLASH_LOCK_REGION_SIZE ((unsigned int) 16384) // Internal FLASH Lock Region Size: 16 Kbytes -#define AT91C_IFLASH_NB_OF_PAGES ((unsigned int) 1024) // Internal FLASH Number of Pages: 1024 bytes -#define AT91C_IFLASH_NB_OF_LOCK_BITS ((unsigned int) 16) // Internal FLASH Number of Lock Bits: 16 bytes - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/support/AT91SAM7_target.js b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/support/AT91SAM7_target.js deleted file mode 100644 index 3fc546e1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/support/AT91SAM7_target.js +++ /dev/null @@ -1,64 +0,0 @@ -/****************************************************************************** - Target Script for Atmel AT91SAM7. - - Copyright (c) 2007 Rowley Associates Limited. - - This file may be distributed under the terms of the License Agreement - provided with this software. - - THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE - WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - ******************************************************************************/ - -function Reset() -{ - /* Mask All interrupt pAic->AIC_IDCR = 0xFFFFFFFF; */ - TargetInterface.pokeWord(0xffffffff,0xFFFFF124); - TargetInterface.pokeWord(0xffffffff,0xFFFFF128); - /* disable peripheral clock Peripheral Clock Disable Register */ - TargetInterface.pokeWord(0xffffffff,0xFFFFFC14); - - /* Reset and stop target */ - TargetInterface.stopAndReset(1); - - CKGR_MOR_VAL = 0x00004001; - CKGR_PLLR_VAL = 0x10483F0E; /* Set up the PLL (MCK, UDPCK = 18.432MHz * 73 / 14 / 2 = 48.05486MHz) */ - CKGR_MCKR_VAL1 = 0x00000004; - CKGR_MCKR_VAL2 = 0x00000007; - - if (TargetInterface.setMaximumJTAGFrequency) - { - /* Configure Clock (post 1.6 version) */ - TargetInterface.setMaximumJTAGFrequency(32768); - TargetInterface.pokeWord(0xFFFFFC20, CKGR_MOR_VAL); - TargetInterface.pokeWord(0xFFFFFC2C, CKGR_PLLR_VAL); - TargetInterface.pokeWord(0xFFFFFC30, CKGR_MCKR_VAL1); - TargetInterface.pokeWord(0xFFFFFC30, CKGR_MCKR_VAL2); - TargetInterface.setMaximumJTAGFrequency(10000000); - } - else - { - /* Configure Clock (1.6 version) */ - TargetInterface.pokeWord(0xFFFFFC20, CKGR_MOR_VAL); - TargetInterface.delay(10); - TargetInterface.pokeWord(0xFFFFFC2C, CKGR_PLLR_VAL); - TargetInterface.delay(10); - TargetInterface.pokeWord(0xFFFFFC30, CKGR_MCKR_VAL1); - TargetInterface.delay(10); - TargetInterface.pokeWord(0xFFFFFC30, CKGR_MCKR_VAL2); - TargetInterface.delay(10); - } -} - -function RAMReset() -{ - Reset(); - /* Remap SRAM to 0x00000000 */ - TargetInterface.pokeWord(0xFFFFFF00, 1); // MC_RCR -} - -function FLASHReset() -{ - Reset(); -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/support/lib_AT91SAM7X256.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/support/lib_AT91SAM7X256.h deleted file mode 100644 index 69c2a0b2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/support/lib_AT91SAM7X256.h +++ /dev/null @@ -1,4119 +0,0 @@ -//* ---------------------------------------------------------------------------- -//* ATMEL Microcontroller Software Support - ROUSSET - -//* ---------------------------------------------------------------------------- -//* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR -//* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -//* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE -//* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, -//* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -//* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, -//* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -//* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -//* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -//* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -//* ---------------------------------------------------------------------------- -//* File Name : lib_AT91SAM7X256.h -//* Object : AT91SAM7X256 inlined functions -//* Generated : AT91 SW Application Group 01/16/2006 (16:36:21) -//* -//* CVS Reference : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004// -//* CVS Reference : /lib_pdc.h/1.2/Tue Jul 2 13:29:40 2002// -//* CVS Reference : /lib_dbgu.h/1.1/Thu Aug 25 12:56:22 2005// -//* CVS Reference : /lib_VREG_6085B.h/1.1/Tue Feb 1 16:20:47 2005// -//* CVS Reference : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003// -//* CVS Reference : /lib_spi2.h/1.2/Tue Aug 23 15:37:28 2005// -//* CVS Reference : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004// -//* CVS Reference : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003// -//* CVS Reference : /lib_pitc_6079A.h/1.2/Tue Nov 9 14:43:56 2004// -//* CVS Reference : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003// -//* CVS Reference : /lib_pmc_SAM7X.h/1.5/Fri Nov 4 09:41:32 2005// -//* CVS Reference : /lib_rstc_6098A.h/1.1/Wed Oct 6 10:39:20 2004// -//* CVS Reference : /lib_rttc_6081A.h/1.1/Wed Oct 6 10:39:38 2004// -//* CVS Reference : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003// -//* CVS Reference : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004// -//* CVS Reference : /lib_wdtc_6080A.h/1.1/Wed Oct 6 10:38:30 2004// -//* CVS Reference : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002// -//* CVS Reference : /lib_udp.h/1.5/Tue Aug 30 12:13:47 2005// -//* CVS Reference : /lib_aic_6075b.h/1.2/Thu Jul 7 07:48:22 2005// -//* CVS Reference : /lib_can_AT91.h/1.5/Tue Aug 23 15:37:07 2005// -//* ---------------------------------------------------------------------------- - -#ifndef lib_AT91SAM7X256_H -#define lib_AT91SAM7X256_H - -#include "AT91SAM7X256.h" - -/* ***************************************************************************** - SOFTWARE API FOR AIC - ***************************************************************************** */ -#define AT91C_AIC_BRANCH_OPCODE ((void (*) ()) 0xE51FFF20) // ldr, pc, [pc, #-&F20] - -//*---------------------------------------------------------------------------- -//* \fn AT91F_AIC_ConfigureIt -//* \brief Interrupt Handler Initialization -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_AIC_ConfigureIt( AT91PS_AIC pAic, // \arg pointer to the AIC registers - unsigned int irq_id, // \arg interrupt number to initialize - unsigned int priority, // \arg priority to give to the interrupt - unsigned int src_type, // \arg activation and sense of activation - void ( *newHandler ) ( ) ) // \arg address of the interrupt handler -{ - unsigned int oldHandler; - unsigned int mask; - - oldHandler = pAic->AIC_SVR[irq_id]; - - mask = 0x1 << irq_id; - //* Disable the interrupt on the interrupt controller - pAic->AIC_IDCR = mask; - //* Save the interrupt handler routine pointer and the interrupt priority - pAic->AIC_SVR[irq_id] = ( unsigned int )newHandler; - //* Store the Source Mode Register - pAic->AIC_SMR[irq_id] = src_type | priority; - //* Clear the interrupt on the interrupt controller - pAic->AIC_ICCR = mask; - - return oldHandler; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_AIC_EnableIt -//* \brief Enable corresponding IT number -//*---------------------------------------------------------------------------- -static __inline void -AT91F_AIC_EnableIt( AT91PS_AIC pAic, // \arg pointer to the AIC registers - unsigned int irq_id ) // \arg interrupt number to initialize -{ - //* Enable the interrupt on the interrupt controller - pAic->AIC_IECR = 0x1 << irq_id; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_AIC_DisableIt -//* \brief Disable corresponding IT number -//*---------------------------------------------------------------------------- -static __inline void -AT91F_AIC_DisableIt( AT91PS_AIC pAic, // \arg pointer to the AIC registers - unsigned int irq_id ) // \arg interrupt number to initialize -{ - unsigned int mask = 0x1 << irq_id; - - //* Disable the interrupt on the interrupt controller - pAic->AIC_IDCR = mask; - //* Clear the interrupt on the Interrupt Controller ( if one is pending ) - pAic->AIC_ICCR = mask; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_AIC_ClearIt -//* \brief Clear corresponding IT number -//*---------------------------------------------------------------------------- -static __inline void -AT91F_AIC_ClearIt( AT91PS_AIC pAic, // \arg pointer to the AIC registers - unsigned int irq_id ) // \arg interrupt number to initialize -{ - //* Clear the interrupt on the Interrupt Controller ( if one is pending ) - pAic->AIC_ICCR = ( 0x1 << irq_id ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_AIC_AcknowledgeIt -//* \brief Acknowledge corresponding IT number -//*---------------------------------------------------------------------------- -static __inline void -AT91F_AIC_AcknowledgeIt( AT91PS_AIC pAic ) // \arg pointer to the AIC registers -{ - pAic->AIC_EOICR = pAic->AIC_EOICR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_AIC_SetExceptionVector -//* \brief Configure vector handler -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_AIC_SetExceptionVector( unsigned int *pVector, // \arg pointer to the AIC registers - void ( *Handler ) ( ) ) // \arg Interrupt Handler -{ - unsigned int oldVector = *pVector; - - if( ( unsigned int )Handler == ( unsigned int )AT91C_AIC_BRANCH_OPCODE ) - *pVector = ( unsigned int )AT91C_AIC_BRANCH_OPCODE; - else - *pVector = - ( ( ( ( ( unsigned int )Handler ) - ( ( unsigned int )pVector ) - 0x8 ) >> 2 ) & 0x00FFFFFF ) | 0xEA000000; - - return oldVector; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_AIC_Trig -//* \brief Trig an IT -//*---------------------------------------------------------------------------- -static __inline void -AT91F_AIC_Trig( AT91PS_AIC pAic, // \arg pointer to the AIC registers - unsigned int irq_id ) // \arg interrupt number -{ - pAic->AIC_ISCR = ( 0x1 << irq_id ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_AIC_IsActive -//* \brief Test if an IT is active -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_AIC_IsActive( AT91PS_AIC pAic, // \arg pointer to the AIC registers - unsigned int irq_id ) // \arg Interrupt Number -{ - return ( pAic->AIC_ISR & ( 0x1 << irq_id ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_AIC_IsPending -//* \brief Test if an IT is pending -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_AIC_IsPending( AT91PS_AIC pAic, // \arg pointer to the AIC registers - unsigned int irq_id ) // \arg Interrupt Number -{ - return ( pAic->AIC_IPR & ( 0x1 << irq_id ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_AIC_Open -//* \brief Set exception vectors and AIC registers to default values -//*---------------------------------------------------------------------------- -static __inline void -AT91F_AIC_Open( AT91PS_AIC pAic, // \arg pointer to the AIC registers - void ( *IrqHandler ) ( ), // \arg Default IRQ vector exception - void ( *FiqHandler ) ( ), // \arg Default FIQ vector exception - void ( *DefaultHandler ) ( ), // \arg Default Handler set in ISR - void ( *SpuriousHandler ) ( ), // \arg Default Spurious Handler - unsigned int protectMode ) // \arg Debug Control Register -{ - int i; - - // Disable all interrupts and set IVR to the default handler - for( i = 0; i < 32; ++i ) - { - AT91F_AIC_DisableIt( pAic, i ); - AT91F_AIC_ConfigureIt( pAic, i, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_HIGH_LEVEL, DefaultHandler ); - } - - // Set the IRQ exception vector - AT91F_AIC_SetExceptionVector( ( unsigned int * )0x18, IrqHandler ); - // Set the Fast Interrupt exception vector - AT91F_AIC_SetExceptionVector( ( unsigned int * )0x1C, FiqHandler ); - - pAic->AIC_SPU = ( unsigned int )SpuriousHandler; - pAic->AIC_DCR = protectMode; -} - -/* ***************************************************************************** - SOFTWARE API FOR PDC - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_SetNextRx -//* \brief Set the next receive transfer descriptor -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PDC_SetNextRx( AT91PS_PDC pPDC, // \arg pointer to a PDC controller - char *address, // \arg address to the next bloc to be received - unsigned int bytes ) // \arg number of bytes to be received -{ - pPDC->PDC_RNPR = ( unsigned int )address; - pPDC->PDC_RNCR = bytes; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_SetNextTx -//* \brief Set the next transmit transfer descriptor -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PDC_SetNextTx( AT91PS_PDC pPDC, // \arg pointer to a PDC controller - char *address, // \arg address to the next bloc to be transmitted - unsigned int bytes ) // \arg number of bytes to be transmitted -{ - pPDC->PDC_TNPR = ( unsigned int )address; - pPDC->PDC_TNCR = bytes; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_SetRx -//* \brief Set the receive transfer descriptor -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PDC_SetRx( AT91PS_PDC pPDC, // \arg pointer to a PDC controller - char *address, // \arg address to the next bloc to be received - unsigned int bytes ) // \arg number of bytes to be received -{ - pPDC->PDC_RPR = ( unsigned int )address; - pPDC->PDC_RCR = bytes; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_SetTx -//* \brief Set the transmit transfer descriptor -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PDC_SetTx( AT91PS_PDC pPDC, // \arg pointer to a PDC controller - char *address, // \arg address to the next bloc to be transmitted - unsigned int bytes ) // \arg number of bytes to be transmitted -{ - pPDC->PDC_TPR = ( unsigned int )address; - pPDC->PDC_TCR = bytes; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_EnableTx -//* \brief Enable transmit -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PDC_EnableTx( AT91PS_PDC pPDC ) // \arg pointer to a PDC controller -{ - pPDC->PDC_PTCR = AT91C_PDC_TXTEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_EnableRx -//* \brief Enable receive -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PDC_EnableRx( AT91PS_PDC pPDC ) // \arg pointer to a PDC controller -{ - pPDC->PDC_PTCR = AT91C_PDC_RXTEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_DisableTx -//* \brief Disable transmit -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PDC_DisableTx( AT91PS_PDC pPDC ) // \arg pointer to a PDC controller -{ - pPDC->PDC_PTCR = AT91C_PDC_TXTDIS; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_DisableRx -//* \brief Disable receive -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PDC_DisableRx( AT91PS_PDC pPDC ) // \arg pointer to a PDC controller -{ - pPDC->PDC_PTCR = AT91C_PDC_RXTDIS; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_IsTxEmpty -//* \brief Test if the current transfer descriptor has been sent -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PDC_IsTxEmpty( // \return return 1 if transfer is complete - AT91PS_PDC pPDC ) // \arg pointer to a PDC controller -{ - return !( pPDC->PDC_TCR ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_IsNextTxEmpty -//* \brief Test if the next transfer descriptor has been moved to the current td -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PDC_IsNextTxEmpty( // \return return 1 if transfer is complete - AT91PS_PDC pPDC ) // \arg pointer to a PDC controller -{ - return !( pPDC->PDC_TNCR ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_IsRxEmpty -//* \brief Test if the current transfer descriptor has been filled -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PDC_IsRxEmpty( // \return return 1 if transfer is complete - AT91PS_PDC pPDC ) // \arg pointer to a PDC controller -{ - return !( pPDC->PDC_RCR ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_IsNextRxEmpty -//* \brief Test if the next transfer descriptor has been moved to the current td -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PDC_IsNextRxEmpty( // \return return 1 if transfer is complete - AT91PS_PDC pPDC ) // \arg pointer to a PDC controller -{ - return !( pPDC->PDC_RNCR ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_Open -//* \brief Open PDC: disable TX and RX reset transfer descriptors, re-enable RX and TX -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PDC_Open( AT91PS_PDC pPDC ) // \arg pointer to a PDC controller -{ - //* Disable the RX and TX PDC transfer requests - AT91F_PDC_DisableRx( pPDC ); - AT91F_PDC_DisableTx( pPDC ); - - //* Reset all Counter register Next buffer first - AT91F_PDC_SetNextTx( pPDC, ( char * )0, 0 ); - AT91F_PDC_SetNextRx( pPDC, ( char * )0, 0 ); - AT91F_PDC_SetTx( pPDC, ( char * )0, 0 ); - AT91F_PDC_SetRx( pPDC, ( char * )0, 0 ); - - //* Enable the RX and TX PDC transfer requests - AT91F_PDC_EnableRx( pPDC ); - AT91F_PDC_EnableTx( pPDC ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_Close -//* \brief Close PDC: disable TX and RX reset transfer descriptors -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PDC_Close( AT91PS_PDC pPDC ) // \arg pointer to a PDC controller -{ - //* Disable the RX and TX PDC transfer requests - AT91F_PDC_DisableRx( pPDC ); - AT91F_PDC_DisableTx( pPDC ); - - //* Reset all Counter register Next buffer first - AT91F_PDC_SetNextTx( pPDC, ( char * )0, 0 ); - AT91F_PDC_SetNextRx( pPDC, ( char * )0, 0 ); - AT91F_PDC_SetTx( pPDC, ( char * )0, 0 ); - AT91F_PDC_SetRx( pPDC, ( char * )0, 0 ); - -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_SendFrame -//* \brief Close PDC: disable TX and RX reset transfer descriptors -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PDC_SendFrame( AT91PS_PDC pPDC, - char *pBuffer, unsigned int szBuffer, char *pNextBuffer, unsigned int szNextBuffer ) -{ - if( AT91F_PDC_IsTxEmpty( pPDC ) ) - { - //* Buffer and next buffer can be initialized - AT91F_PDC_SetTx( pPDC, pBuffer, szBuffer ); - AT91F_PDC_SetNextTx( pPDC, pNextBuffer, szNextBuffer ); - return 2; - } - else if( AT91F_PDC_IsNextTxEmpty( pPDC ) ) - { - //* Only one buffer can be initialized - AT91F_PDC_SetNextTx( pPDC, pBuffer, szBuffer ); - return 1; - } - else - { - //* All buffer are in use... - return 0; - } -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PDC_ReceiveFrame -//* \brief Close PDC: disable TX and RX reset transfer descriptors -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PDC_ReceiveFrame( AT91PS_PDC pPDC, - char *pBuffer, unsigned int szBuffer, char *pNextBuffer, unsigned int szNextBuffer ) -{ - if( AT91F_PDC_IsRxEmpty( pPDC ) ) - { - //* Buffer and next buffer can be initialized - AT91F_PDC_SetRx( pPDC, pBuffer, szBuffer ); - AT91F_PDC_SetNextRx( pPDC, pNextBuffer, szNextBuffer ); - return 2; - } - else if( AT91F_PDC_IsNextRxEmpty( pPDC ) ) - { - //* Only one buffer can be initialized - AT91F_PDC_SetNextRx( pPDC, pBuffer, szBuffer ); - return 1; - } - else - { - //* All buffer are in use... - return 0; - } -} - -/* ***************************************************************************** - SOFTWARE API FOR DBGU - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_DBGU_InterruptEnable -//* \brief Enable DBGU Interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_DBGU_InterruptEnable( AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller - unsigned int flag ) // \arg dbgu interrupt to be enabled -{ - pDbgu->DBGU_IER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_DBGU_InterruptDisable -//* \brief Disable DBGU Interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_DBGU_InterruptDisable( AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller - unsigned int flag ) // \arg dbgu interrupt to be disabled -{ - pDbgu->DBGU_IDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_DBGU_GetInterruptMaskStatus -//* \brief Return DBGU Interrupt Mask Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_DBGU_GetInterruptMaskStatus( // \return DBGU Interrupt Mask Status - AT91PS_DBGU pDbgu ) // \arg pointer to a DBGU controller -{ - return pDbgu->DBGU_IMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_DBGU_IsInterruptMasked -//* \brief Test if DBGU Interrupt is Masked -//*---------------------------------------------------------------------------- -static __inline int -AT91F_DBGU_IsInterruptMasked( AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_DBGU_GetInterruptMaskStatus( pDbgu ) & flag ); -} - -/* ***************************************************************************** - SOFTWARE API FOR PIO - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_CfgPeriph -//* \brief Enable pins to be drived by peripheral -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_CfgPeriph( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int periphAEnable, // \arg PERIPH A to enable - unsigned int periphBEnable ) // \arg PERIPH B to enable -{ - pPio->PIO_ASR = periphAEnable; - pPio->PIO_BSR = periphBEnable; - pPio->PIO_PDR = ( periphAEnable | periphBEnable ); // Set in Periph mode -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_CfgOutput -//* \brief Enable PIO in output mode -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_CfgOutput( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int pioEnable ) // \arg PIO to be enabled -{ - pPio->PIO_PER = pioEnable; // Set in PIO mode - pPio->PIO_OER = pioEnable; // Configure in Output -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_CfgInput -//* \brief Enable PIO in input mode -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_CfgInput( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int inputEnable ) // \arg PIO to be enabled -{ - // Disable output - pPio->PIO_ODR = inputEnable; - pPio->PIO_PER = inputEnable; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_CfgOpendrain -//* \brief Configure PIO in open drain -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_CfgOpendrain( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int multiDrvEnable ) // \arg pio to be configured in open drain -{ - // Configure the multi-drive option - pPio->PIO_MDDR = ~multiDrvEnable; - pPio->PIO_MDER = multiDrvEnable; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_CfgPullup -//* \brief Enable pullup on PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_CfgPullup( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int pullupEnable ) // \arg enable pullup on PIO -{ - // Connect or not Pullup - pPio->PIO_PPUDR = ~pullupEnable; - pPio->PIO_PPUER = pullupEnable; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_CfgDirectDrive -//* \brief Enable direct drive on PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_CfgDirectDrive( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int directDrive ) // \arg PIO to be configured with direct drive -{ - // Configure the Direct Drive - pPio->PIO_OWDR = ~directDrive; - pPio->PIO_OWER = directDrive; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_CfgInputFilter -//* \brief Enable input filter on input PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_CfgInputFilter( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int inputFilter ) // \arg PIO to be configured with input filter -{ - // Configure the Direct Drive - pPio->PIO_IFDR = ~inputFilter; - pPio->PIO_IFER = inputFilter; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_GetInput -//* \brief Return PIO input value -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PIO_GetInput( // \return PIO input - AT91PS_PIO pPio ) // \arg pointer to a PIO controller -{ - return pPio->PIO_PDSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_IsInputSet -//* \brief Test if PIO is input flag is active -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PIO_IsInputSet( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PIO_GetInput( pPio ) & flag ); -} - - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_SetOutput -//* \brief Set to 1 output PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_SetOutput( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg output to be set -{ - pPio->PIO_SODR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_ClearOutput -//* \brief Set to 0 output PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_ClearOutput( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg output to be cleared -{ - pPio->PIO_CODR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_ForceOutput -//* \brief Force output when Direct drive option is enabled -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_ForceOutput( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg output to be forced -{ - pPio->PIO_ODSR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_Enable -//* \brief Enable PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_Enable( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio to be enabled -{ - pPio->PIO_PER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_Disable -//* \brief Disable PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_Disable( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio to be disabled -{ - pPio->PIO_PDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_GetStatus -//* \brief Return PIO Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PIO_GetStatus( // \return PIO Status - AT91PS_PIO pPio ) // \arg pointer to a PIO controller -{ - return pPio->PIO_PSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_IsSet -//* \brief Test if PIO is Set -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PIO_IsSet( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PIO_GetStatus( pPio ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_OutputEnable -//* \brief Output Enable PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_OutputEnable( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio output to be enabled -{ - pPio->PIO_OER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_OutputDisable -//* \brief Output Enable PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_OutputDisable( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio output to be disabled -{ - pPio->PIO_ODR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_GetOutputStatus -//* \brief Return PIO Output Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PIO_GetOutputStatus( // \return PIO Output Status - AT91PS_PIO pPio ) // \arg pointer to a PIO controller -{ - return pPio->PIO_OSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_IsOuputSet -//* \brief Test if PIO Output is Set -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PIO_IsOutputSet( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PIO_GetOutputStatus( pPio ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_InputFilterEnable -//* \brief Input Filter Enable PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_InputFilterEnable( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio input filter to be enabled -{ - pPio->PIO_IFER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_InputFilterDisable -//* \brief Input Filter Disable PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_InputFilterDisable( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio input filter to be disabled -{ - pPio->PIO_IFDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_GetInputFilterStatus -//* \brief Return PIO Input Filter Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PIO_GetInputFilterStatus( // \return PIO Input Filter Status - AT91PS_PIO pPio ) // \arg pointer to a PIO controller -{ - return pPio->PIO_IFSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_IsInputFilterSet -//* \brief Test if PIO Input filter is Set -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PIO_IsInputFilterSet( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PIO_GetInputFilterStatus( pPio ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_GetOutputDataStatus -//* \brief Return PIO Output Data Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PIO_GetOutputDataStatus( // \return PIO Output Data Status - AT91PS_PIO pPio ) // \arg pointer to a PIO controller -{ - return pPio->PIO_ODSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_InterruptEnable -//* \brief Enable PIO Interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_InterruptEnable( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio interrupt to be enabled -{ - pPio->PIO_IER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_InterruptDisable -//* \brief Disable PIO Interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_InterruptDisable( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio interrupt to be disabled -{ - pPio->PIO_IDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_GetInterruptMaskStatus -//* \brief Return PIO Interrupt Mask Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PIO_GetInterruptMaskStatus( // \return PIO Interrupt Mask Status - AT91PS_PIO pPio ) // \arg pointer to a PIO controller -{ - return pPio->PIO_IMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_GetInterruptStatus -//* \brief Return PIO Interrupt Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PIO_GetInterruptStatus( // \return PIO Interrupt Status - AT91PS_PIO pPio ) // \arg pointer to a PIO controller -{ - return pPio->PIO_ISR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_IsInterruptMasked -//* \brief Test if PIO Interrupt is Masked -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PIO_IsInterruptMasked( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PIO_GetInterruptMaskStatus( pPio ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_IsInterruptSet -//* \brief Test if PIO Interrupt is Set -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PIO_IsInterruptSet( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PIO_GetInterruptStatus( pPio ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_MultiDriverEnable -//* \brief Multi Driver Enable PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_MultiDriverEnable( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio to be enabled -{ - pPio->PIO_MDER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_MultiDriverDisable -//* \brief Multi Driver Disable PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_MultiDriverDisable( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio to be disabled -{ - pPio->PIO_MDDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_GetMultiDriverStatus -//* \brief Return PIO Multi Driver Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PIO_GetMultiDriverStatus( // \return PIO Multi Driver Status - AT91PS_PIO pPio ) // \arg pointer to a PIO controller -{ - return pPio->PIO_MDSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_IsMultiDriverSet -//* \brief Test if PIO MultiDriver is Set -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PIO_IsMultiDriverSet( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PIO_GetMultiDriverStatus( pPio ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_A_RegisterSelection -//* \brief PIO A Register Selection -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_A_RegisterSelection( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio A register selection -{ - pPio->PIO_ASR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_B_RegisterSelection -//* \brief PIO B Register Selection -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_B_RegisterSelection( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio B register selection -{ - pPio->PIO_BSR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_Get_AB_RegisterStatus -//* \brief Return PIO Interrupt Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PIO_Get_AB_RegisterStatus( // \return PIO AB Register Status - AT91PS_PIO pPio ) // \arg pointer to a PIO controller -{ - return pPio->PIO_ABSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_IsAB_RegisterSet -//* \brief Test if PIO AB Register is Set -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PIO_IsAB_RegisterSet( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PIO_Get_AB_RegisterStatus( pPio ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_OutputWriteEnable -//* \brief Output Write Enable PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_OutputWriteEnable( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio output write to be enabled -{ - pPio->PIO_OWER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_OutputWriteDisable -//* \brief Output Write Disable PIO -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIO_OutputWriteDisable( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg pio output write to be disabled -{ - pPio->PIO_OWDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_GetOutputWriteStatus -//* \brief Return PIO Output Write Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PIO_GetOutputWriteStatus( // \return PIO Output Write Status - AT91PS_PIO pPio ) // \arg pointer to a PIO controller -{ - return pPio->PIO_OWSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_IsOutputWriteSet -//* \brief Test if PIO OutputWrite is Set -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PIO_IsOutputWriteSet( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PIO_GetOutputWriteStatus( pPio ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_GetCfgPullup -//* \brief Return PIO Configuration Pullup -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PIO_GetCfgPullup( // \return PIO Configuration Pullup - AT91PS_PIO pPio ) // \arg pointer to a PIO controller -{ - return pPio->PIO_PPUSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_IsOutputDataStatusSet -//* \brief Test if PIO Output Data Status is Set -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PIO_IsOutputDataStatusSet( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PIO_GetOutputDataStatus( pPio ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIO_IsCfgPullupStatusSet -//* \brief Test if PIO Configuration Pullup Status is Set -//*---------------------------------------------------------------------------- -static __inline int -AT91F_PIO_IsCfgPullupStatusSet( AT91PS_PIO pPio, // \arg pointer to a PIO controller - unsigned int flag ) // \arg flag to be tested -{ - return ( ~AT91F_PIO_GetCfgPullup( pPio ) & flag ); -} - -/* ***************************************************************************** - SOFTWARE API FOR PMC - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_CfgSysClkEnableReg -//* \brief Configure the System Clock Enable Register of the PMC controller -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PMC_CfgSysClkEnableReg( AT91PS_PMC pPMC, // \arg pointer to PMC controller - unsigned int mode ) -{ - //* Write to the SCER register - pPMC->PMC_SCER = mode; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_CfgSysClkDisableReg -//* \brief Configure the System Clock Disable Register of the PMC controller -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PMC_CfgSysClkDisableReg( AT91PS_PMC pPMC, // \arg pointer to PMC controller - unsigned int mode ) -{ - //* Write to the SCDR register - pPMC->PMC_SCDR = mode; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_GetSysClkStatusReg -//* \brief Return the System Clock Status Register of the PMC controller -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PMC_GetSysClkStatusReg( AT91PS_PMC pPMC // pointer to a CAN controller - ) -{ - return pPMC->PMC_SCSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_EnablePeriphClock -//* \brief Enable peripheral clock -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PMC_EnablePeriphClock( AT91PS_PMC pPMC, // \arg pointer to PMC controller - unsigned int periphIds ) // \arg IDs of peripherals -{ - pPMC->PMC_PCER = periphIds; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_DisablePeriphClock -//* \brief Disable peripheral clock -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PMC_DisablePeriphClock( AT91PS_PMC pPMC, // \arg pointer to PMC controller - unsigned int periphIds ) // \arg IDs of peripherals -{ - pPMC->PMC_PCDR = periphIds; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_GetPeriphClock -//* \brief Get peripheral clock status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PMC_GetPeriphClock( AT91PS_PMC pPMC ) // \arg pointer to PMC controller -{ - return pPMC->PMC_PCSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CKGR_CfgMainOscillatorReg -//* \brief Cfg the main oscillator -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CKGR_CfgMainOscillatorReg( AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller - unsigned int mode ) -{ - pCKGR->CKGR_MOR = mode; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CKGR_GetMainOscillatorReg -//* \brief Cfg the main oscillator -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CKGR_GetMainOscillatorReg( AT91PS_CKGR pCKGR ) // \arg pointer to CKGR controller -{ - return pCKGR->CKGR_MOR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CKGR_EnableMainOscillator -//* \brief Enable the main oscillator -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CKGR_EnableMainOscillator( AT91PS_CKGR pCKGR ) // \arg pointer to CKGR controller -{ - pCKGR->CKGR_MOR |= AT91C_CKGR_MOSCEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CKGR_DisableMainOscillator -//* \brief Disable the main oscillator -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CKGR_DisableMainOscillator( AT91PS_CKGR pCKGR ) // \arg pointer to CKGR controller -{ - pCKGR->CKGR_MOR &= ~AT91C_CKGR_MOSCEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CKGR_CfgMainOscStartUpTime -//* \brief Cfg MOR Register according to the main osc startup time -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CKGR_CfgMainOscStartUpTime( AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller - unsigned int startup_time, // \arg main osc startup time in microsecond (us) - unsigned int slowClock ) // \arg slowClock in Hz -{ - pCKGR->CKGR_MOR &= ~AT91C_CKGR_OSCOUNT; - pCKGR->CKGR_MOR |= ( ( slowClock * startup_time ) / ( 8 * 1000000 ) ) << 8; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CKGR_GetMainClockFreqReg -//* \brief Cfg the main oscillator -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CKGR_GetMainClockFreqReg( AT91PS_CKGR pCKGR ) // \arg pointer to CKGR controller -{ - return pCKGR->CKGR_MCFR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CKGR_GetMainClock -//* \brief Return Main clock in Hz -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CKGR_GetMainClock( AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller - unsigned int slowClock ) // \arg slowClock in Hz -{ - return ( ( pCKGR->CKGR_MCFR & AT91C_CKGR_MAINF ) * slowClock ) >> 4; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_CfgMCKReg -//* \brief Cfg Master Clock Register -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PMC_CfgMCKReg( AT91PS_PMC pPMC, // \arg pointer to PMC controller - unsigned int mode ) -{ - pPMC->PMC_MCKR = mode; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_GetMCKReg -//* \brief Return Master Clock Register -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PMC_GetMCKReg( AT91PS_PMC pPMC ) // \arg pointer to PMC controller -{ - return pPMC->PMC_MCKR; -} - -//*------------------------------------------------------------------------------ -//* \fn AT91F_PMC_GetMasterClock -//* \brief Return master clock in Hz which correponds to processor clock for ARM7 -//*------------------------------------------------------------------------------ -static __inline unsigned int -AT91F_PMC_GetMasterClock( AT91PS_PMC pPMC, // \arg pointer to PMC controller - AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller - unsigned int slowClock ) // \arg slowClock in Hz -{ - unsigned int reg = pPMC->PMC_MCKR; - unsigned int prescaler = ( 1 << ( ( reg & AT91C_PMC_PRES ) >> 2 ) ); - unsigned int pllDivider, pllMultiplier; - - switch ( reg & AT91C_PMC_CSS ) - { - case AT91C_PMC_CSS_SLOW_CLK: // Slow clock selected - return slowClock / prescaler; - case AT91C_PMC_CSS_MAIN_CLK: // Main clock is selected - return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / prescaler; - case AT91C_PMC_CSS_PLL_CLK: // PLLB clock is selected - reg = pCKGR->CKGR_PLLR; - pllDivider = ( reg & AT91C_CKGR_DIV ); - pllMultiplier = ( ( reg & AT91C_CKGR_MUL ) >> 16 ) + 1; - return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / pllDivider * pllMultiplier / prescaler; - } - return 0; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_EnablePCK -//* \brief Enable Programmable Clock x Output -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PMC_EnablePCK( AT91PS_PMC pPMC, // \arg pointer to PMC controller - unsigned int pck, // \arg Programmable Clock x Output - unsigned int mode ) -{ - pPMC->PMC_PCKR[pck] = mode; - pPMC->PMC_SCER = ( 1 << pck ) << 8; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_DisablePCK -//* \brief Disable Programmable Clock x Output -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PMC_DisablePCK( AT91PS_PMC pPMC, // \arg pointer to PMC controller - unsigned int pck ) // \arg Programmable Clock x Output -{ - pPMC->PMC_SCDR = ( 1 << pck ) << 8; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_EnableIt -//* \brief Enable PMC interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PMC_EnableIt( AT91PS_PMC pPMC, // pointer to a PMC controller - unsigned int flag ) // IT to be enabled -{ - //* Write to the IER register - pPMC->PMC_IER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_DisableIt -//* \brief Disable PMC interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PMC_DisableIt( AT91PS_PMC pPMC, // pointer to a PMC controller - unsigned int flag ) // IT to be disabled -{ - //* Write to the IDR register - pPMC->PMC_IDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_GetStatus -//* \brief Return PMC Interrupt Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PMC_GetStatus( // \return PMC Interrupt Status - AT91PS_PMC pPMC ) // pointer to a PMC controller -{ - return pPMC->PMC_SR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_GetInterruptMaskStatus -//* \brief Return PMC Interrupt Mask Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PMC_GetInterruptMaskStatus( // \return PMC Interrupt Mask Status - AT91PS_PMC pPMC ) // pointer to a PMC controller -{ - return pPMC->PMC_IMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_IsInterruptMasked -//* \brief Test if PMC Interrupt is Masked -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PMC_IsInterruptMasked( AT91PS_PMC pPMC, // \arg pointer to a PMC controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PMC_GetInterruptMaskStatus( pPMC ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_IsStatusSet -//* \brief Test if PMC Status is Set -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PMC_IsStatusSet( AT91PS_PMC pPMC, // \arg pointer to a PMC controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PMC_GetStatus( pPMC ) & flag ); -} - -// ---------------------------------------------------------------------------- -// \fn AT91F_CKGR_CfgPLLReg -// \brief Cfg the PLL Register -// ---------------------------------------------------------------------------- -static __inline void -AT91F_CKGR_CfgPLLReg( AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller - unsigned int mode ) -{ - pCKGR->CKGR_PLLR = mode; -} - -// ---------------------------------------------------------------------------- -// \fn AT91F_CKGR_GetPLLReg -// \brief Get the PLL Register -// ---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CKGR_GetPLLReg( AT91PS_CKGR pCKGR ) // \arg pointer to CKGR controller -{ - return pCKGR->CKGR_PLLR; -} - - -/* ***************************************************************************** - SOFTWARE API FOR RSTC - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_RSTSoftReset -//* \brief Start Software Reset -//*---------------------------------------------------------------------------- -static __inline void -AT91F_RSTSoftReset( AT91PS_RSTC pRSTC, unsigned int reset ) -{ - pRSTC->RSTC_RCR = ( 0xA5000000 | reset ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_RSTSetMode -//* \brief Set Reset Mode -//*---------------------------------------------------------------------------- -static __inline void -AT91F_RSTSetMode( AT91PS_RSTC pRSTC, unsigned int mode ) -{ - pRSTC->RSTC_RMR = ( 0xA5000000 | mode ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_RSTGetMode -//* \brief Get Reset Mode -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_RSTGetMode( AT91PS_RSTC pRSTC ) -{ - return ( pRSTC->RSTC_RMR ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_RSTGetStatus -//* \brief Get Reset Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_RSTGetStatus( AT91PS_RSTC pRSTC ) -{ - return ( pRSTC->RSTC_RSR ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_RSTIsSoftRstActive -//* \brief Return !=0 if software reset is still not completed -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_RSTIsSoftRstActive( AT91PS_RSTC pRSTC ) -{ - return ( ( pRSTC->RSTC_RSR ) & AT91C_RSTC_SRCMP ); -} - -/* ***************************************************************************** - SOFTWARE API FOR RTTC - ***************************************************************************** */ -//*-------------------------------------------------------------------------------------- -//* \fn AT91F_SetRTT_TimeBase() -//* \brief Set the RTT prescaler according to the TimeBase in ms -//*-------------------------------------------------------------------------------------- -static __inline unsigned int -AT91F_RTTSetTimeBase( AT91PS_RTTC pRTTC, unsigned int ms ) -{ - if( ms > 2000 ) - return 1; // AT91C_TIME_OUT_OF_RANGE - pRTTC->RTTC_RTMR &= ~0xFFFF; - pRTTC->RTTC_RTMR |= ( ( ( ms << 15 ) / 1000 ) & 0xFFFF ); - return 0; -} - -//*-------------------------------------------------------------------------------------- -//* \fn AT91F_RTTSetPrescaler() -//* \brief Set the new prescaler value -//*-------------------------------------------------------------------------------------- -static __inline unsigned int -AT91F_RTTSetPrescaler( AT91PS_RTTC pRTTC, unsigned int rtpres ) -{ - pRTTC->RTTC_RTMR &= ~0xFFFF; - pRTTC->RTTC_RTMR |= ( rtpres & 0xFFFF ); - return ( pRTTC->RTTC_RTMR ); -} - -//*-------------------------------------------------------------------------------------- -//* \fn AT91F_RTTRestart() -//* \brief Restart the RTT prescaler -//*-------------------------------------------------------------------------------------- -static __inline void -AT91F_RTTRestart( AT91PS_RTTC pRTTC ) -{ - pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTRST; -} - - -//*-------------------------------------------------------------------------------------- -//* \fn AT91F_RTT_SetAlarmINT() -//* \brief Enable RTT Alarm Interrupt -//*-------------------------------------------------------------------------------------- -static __inline void -AT91F_RTTSetAlarmINT( AT91PS_RTTC pRTTC ) -{ - pRTTC->RTTC_RTMR |= AT91C_RTTC_ALMIEN; -} - -//*-------------------------------------------------------------------------------------- -//* \fn AT91F_RTT_ClearAlarmINT() -//* \brief Disable RTT Alarm Interrupt -//*-------------------------------------------------------------------------------------- -static __inline void -AT91F_RTTClearAlarmINT( AT91PS_RTTC pRTTC ) -{ - pRTTC->RTTC_RTMR &= ~AT91C_RTTC_ALMIEN; -} - -//*-------------------------------------------------------------------------------------- -//* \fn AT91F_RTT_SetRttIncINT() -//* \brief Enable RTT INC Interrupt -//*-------------------------------------------------------------------------------------- -static __inline void -AT91F_RTTSetRttIncINT( AT91PS_RTTC pRTTC ) -{ - pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTINCIEN; -} - -//*-------------------------------------------------------------------------------------- -//* \fn AT91F_RTT_ClearRttIncINT() -//* \brief Disable RTT INC Interrupt -//*-------------------------------------------------------------------------------------- -static __inline void -AT91F_RTTClearRttIncINT( AT91PS_RTTC pRTTC ) -{ - pRTTC->RTTC_RTMR &= ~AT91C_RTTC_RTTINCIEN; -} - -//*-------------------------------------------------------------------------------------- -//* \fn AT91F_RTT_SetAlarmValue() -//* \brief Set RTT Alarm Value -//*-------------------------------------------------------------------------------------- -static __inline void -AT91F_RTTSetAlarmValue( AT91PS_RTTC pRTTC, unsigned int alarm ) -{ - pRTTC->RTTC_RTAR = alarm; -} - -//*-------------------------------------------------------------------------------------- -//* \fn AT91F_RTT_GetAlarmValue() -//* \brief Get RTT Alarm Value -//*-------------------------------------------------------------------------------------- -static __inline unsigned int -AT91F_RTTGetAlarmValue( AT91PS_RTTC pRTTC ) -{ - return ( pRTTC->RTTC_RTAR ); -} - -//*-------------------------------------------------------------------------------------- -//* \fn AT91F_RTTGetStatus() -//* \brief Read the RTT status -//*-------------------------------------------------------------------------------------- -static __inline unsigned int -AT91F_RTTGetStatus( AT91PS_RTTC pRTTC ) -{ - return ( pRTTC->RTTC_RTSR ); -} - -//*-------------------------------------------------------------------------------------- -//* \fn AT91F_RTT_ReadValue() -//* \brief Read the RTT value -//*-------------------------------------------------------------------------------------- -static __inline unsigned int -AT91F_RTTReadValue( AT91PS_RTTC pRTTC ) -{ - register volatile unsigned int val1, val2; - - do - { - val1 = pRTTC->RTTC_RTVR; - val2 = pRTTC->RTTC_RTVR; - } - while( val1 != val2 ); - return ( val1 ); -} - -/* ***************************************************************************** - SOFTWARE API FOR PITC - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_PITInit -//* \brief System timer init : period in µsecond, system clock freq in MHz -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PITInit( AT91PS_PITC pPITC, unsigned int period, unsigned int pit_frequency ) -{ - pPITC->PITC_PIMR = period ? ( period * pit_frequency + 8 ) >> 4 : 0; // +8 to avoid %10 and /10 - pPITC->PITC_PIMR |= AT91C_PITC_PITEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PITSetPIV -//* \brief Set the PIT Periodic Interval Value -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PITSetPIV( AT91PS_PITC pPITC, unsigned int piv ) -{ - pPITC->PITC_PIMR = piv | ( pPITC->PITC_PIMR & ( AT91C_PITC_PITEN | AT91C_PITC_PITIEN ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PITEnableInt -//* \brief Enable PIT periodic interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PITEnableInt( AT91PS_PITC pPITC ) -{ - pPITC->PITC_PIMR |= AT91C_PITC_PITIEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PITDisableInt -//* \brief Disable PIT periodic interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PITDisableInt( AT91PS_PITC pPITC ) -{ - pPITC->PITC_PIMR &= ~AT91C_PITC_PITIEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PITGetMode -//* \brief Read PIT mode register -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PITGetMode( AT91PS_PITC pPITC ) -{ - return ( pPITC->PITC_PIMR ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PITGetStatus -//* \brief Read PIT status register -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PITGetStatus( AT91PS_PITC pPITC ) -{ - return ( pPITC->PITC_PISR ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PITGetPIIR -//* \brief Read PIT CPIV and PICNT without ressetting the counters -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PITGetPIIR( AT91PS_PITC pPITC ) -{ - return ( pPITC->PITC_PIIR ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PITGetPIVR -//* \brief Read System timer CPIV and PICNT without ressetting the counters -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PITGetPIVR( AT91PS_PITC pPITC ) -{ - return ( pPITC->PITC_PIVR ); -} - -/* ***************************************************************************** - SOFTWARE API FOR WDTC - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_WDTSetMode -//* \brief Set Watchdog Mode Register -//*---------------------------------------------------------------------------- -static __inline void -AT91F_WDTSetMode( AT91PS_WDTC pWDTC, unsigned int Mode ) -{ - pWDTC->WDTC_WDMR = Mode; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_WDTRestart -//* \brief Restart Watchdog -//*---------------------------------------------------------------------------- -static __inline void -AT91F_WDTRestart( AT91PS_WDTC pWDTC ) -{ - pWDTC->WDTC_WDCR = 0xA5000001; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_WDTSGettatus -//* \brief Get Watchdog Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_WDTSGettatus( AT91PS_WDTC pWDTC ) -{ - return ( pWDTC->WDTC_WDSR & 0x3 ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_WDTGetPeriod -//* \brief Translate ms into Watchdog Compatible value -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_WDTGetPeriod( unsigned int ms ) -{ - if( ( ms < 4 ) || ( ms > 16000 ) ) - return 0; - return ( ( ms << 8 ) / 1000 ); -} - -/* ***************************************************************************** - SOFTWARE API FOR VREG - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_VREG_Enable_LowPowerMode -//* \brief Enable VREG Low Power Mode -//*---------------------------------------------------------------------------- -static __inline void -AT91F_VREG_Enable_LowPowerMode( AT91PS_VREG pVREG ) -{ - pVREG->VREG_MR |= AT91C_VREG_PSTDBY; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_VREG_Disable_LowPowerMode -//* \brief Disable VREG Low Power Mode -//*---------------------------------------------------------------------------- -static __inline void -AT91F_VREG_Disable_LowPowerMode( AT91PS_VREG pVREG ) -{ - pVREG->VREG_MR &= ~AT91C_VREG_PSTDBY; -} /* ***************************************************************************** - SOFTWARE API FOR MC - ***************************************************************************** */ - -#define AT91C_MC_CORRECT_KEY ((unsigned int) 0x5A << 24) // (MC) Correct Protect Key - -//*---------------------------------------------------------------------------- -//* \fn AT91F_MC_Remap -//* \brief Make Remap -//*---------------------------------------------------------------------------- -static __inline void -AT91F_MC_Remap( void ) // -{ - AT91PS_MC pMC = ( AT91PS_MC ) AT91C_BASE_MC; - - pMC->MC_RCR = AT91C_MC_RCB; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_MC_EFC_CfgModeReg -//* \brief Configure the EFC Mode Register of the MC controller -//*---------------------------------------------------------------------------- -static __inline void -AT91F_MC_EFC_CfgModeReg( AT91PS_MC pMC, // pointer to a MC controller - unsigned int mode ) // mode register -{ - // Write to the FMR register - pMC->MC_FMR = mode; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_MC_EFC_GetModeReg -//* \brief Return MC EFC Mode Regsiter -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_MC_EFC_GetModeReg( AT91PS_MC pMC ) // pointer to a MC controller -{ - return pMC->MC_FMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_MC_EFC_ComputeFMCN -//* \brief Return MC EFC Mode Regsiter -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_MC_EFC_ComputeFMCN( int master_clock ) // master clock in Hz -{ - return ( master_clock / 1000000 + 2 ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_MC_EFC_PerformCmd -//* \brief Perform EFC Command -//*---------------------------------------------------------------------------- -static __inline void -AT91F_MC_EFC_PerformCmd( AT91PS_MC pMC, // pointer to a MC controller - unsigned int transfer_cmd ) -{ - pMC->MC_FCR = transfer_cmd; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_MC_EFC_GetStatus -//* \brief Return MC EFC Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_MC_EFC_GetStatus( AT91PS_MC pMC ) // pointer to a MC controller -{ - return pMC->MC_FSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_MC_EFC_IsInterruptMasked -//* \brief Test if EFC MC Interrupt is Masked -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_MC_EFC_IsInterruptMasked( AT91PS_MC pMC, // \arg pointer to a MC controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_MC_EFC_GetModeReg( pMC ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_MC_EFC_IsInterruptSet -//* \brief Test if EFC MC Interrupt is Set -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_MC_EFC_IsInterruptSet( AT91PS_MC pMC, // \arg pointer to a MC controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_MC_EFC_GetStatus( pMC ) & flag ); -} - -/* ***************************************************************************** - SOFTWARE API FOR SPI - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_CfgCs -//* \brief Configure SPI chip select register -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI_CfgCs( AT91PS_SPI pSPI, // pointer to a SPI controller - int cs, // SPI cs number (0 to 3) - int val ) // chip select register -{ - //* Write to the CSR register - *( pSPI->SPI_CSR + cs ) = val; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_EnableIt -//* \brief Enable SPI interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI_EnableIt( AT91PS_SPI pSPI, // pointer to a SPI controller - unsigned int flag ) // IT to be enabled -{ - //* Write to the IER register - pSPI->SPI_IER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_DisableIt -//* \brief Disable SPI interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI_DisableIt( AT91PS_SPI pSPI, // pointer to a SPI controller - unsigned int flag ) // IT to be disabled -{ - //* Write to the IDR register - pSPI->SPI_IDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_Reset -//* \brief Reset the SPI controller -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI_Reset( AT91PS_SPI pSPI // pointer to a SPI controller - ) -{ - //* Write to the CR register - pSPI->SPI_CR = AT91C_SPI_SWRST; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_Enable -//* \brief Enable the SPI controller -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI_Enable( AT91PS_SPI pSPI // pointer to a SPI controller - ) -{ - //* Write to the CR register - pSPI->SPI_CR = AT91C_SPI_SPIEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_Disable -//* \brief Disable the SPI controller -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI_Disable( AT91PS_SPI pSPI // pointer to a SPI controller - ) -{ - //* Write to the CR register - pSPI->SPI_CR = AT91C_SPI_SPIDIS; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_CfgMode -//* \brief Enable the SPI controller -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI_CfgMode( AT91PS_SPI pSPI, // pointer to a SPI controller - int mode ) // mode register -{ - //* Write to the MR register - pSPI->SPI_MR = mode; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_CfgPCS -//* \brief Switch to the correct PCS of SPI Mode Register : Fixed Peripheral Selected -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI_CfgPCS( AT91PS_SPI pSPI, // pointer to a SPI controller - char PCS_Device ) // PCS of the Device -{ - //* Write to the MR register - pSPI->SPI_MR &= 0xFFF0FFFF; - pSPI->SPI_MR |= ( ( PCS_Device << 16 ) & AT91C_SPI_PCS ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_ReceiveFrame -//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_SPI_ReceiveFrame( AT91PS_SPI pSPI, - char *pBuffer, unsigned int szBuffer, char *pNextBuffer, unsigned int szNextBuffer ) -{ - return AT91F_PDC_ReceiveFrame( ( AT91PS_PDC ) & ( pSPI->SPI_RPR ), pBuffer, szBuffer, pNextBuffer, szNextBuffer ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_SendFrame -//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is bSPIy -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_SPI_SendFrame( AT91PS_SPI pSPI, - char *pBuffer, unsigned int szBuffer, char *pNextBuffer, unsigned int szNextBuffer ) -{ - return AT91F_PDC_SendFrame( ( AT91PS_PDC ) & ( pSPI->SPI_RPR ), pBuffer, szBuffer, pNextBuffer, szNextBuffer ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_Close -//* \brief Close SPI: disable IT disable transfert, close PDC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI_Close( AT91PS_SPI pSPI ) // \arg pointer to a SPI controller -{ - //* Reset all the Chip Select register - pSPI->SPI_CSR[0] = 0; - pSPI->SPI_CSR[1] = 0; - pSPI->SPI_CSR[2] = 0; - pSPI->SPI_CSR[3] = 0; - - //* Reset the SPI mode - pSPI->SPI_MR = 0; - - //* Disable all interrupts - pSPI->SPI_IDR = 0xFFFFFFFF; - - //* Abort the Peripheral Data Transfers - AT91F_PDC_Close( ( AT91PS_PDC ) & ( pSPI->SPI_RPR ) ); - - //* Disable receiver and transmitter and stop any activity immediately - pSPI->SPI_CR = AT91C_SPI_SPIDIS; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_PutChar -//* \brief Send a character,does not check if ready to send -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI_PutChar( AT91PS_SPI pSPI, unsigned int character, unsigned int cs_number ) -{ - unsigned int value_for_cs; - - value_for_cs = ( ~( 1 << cs_number ) ) & 0xF; //Place a zero among a 4 ONEs number - pSPI->SPI_TDR = ( character & 0xFFFF ) | ( value_for_cs << 16 ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_GetChar -//* \brief Receive a character,does not check if a character is available -//*---------------------------------------------------------------------------- -static __inline int -AT91F_SPI_GetChar( const AT91PS_SPI pSPI ) -{ - return ( ( pSPI->SPI_RDR ) & 0xFFFF ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_GetInterruptMaskStatus -//* \brief Return SPI Interrupt Mask Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_SPI_GetInterruptMaskStatus( // \return SPI Interrupt Mask Status - AT91PS_SPI pSpi ) // \arg pointer to a SPI controller -{ - return pSpi->SPI_IMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI_IsInterruptMasked -//* \brief Test if SPI Interrupt is Masked -//*---------------------------------------------------------------------------- -static __inline int -AT91F_SPI_IsInterruptMasked( AT91PS_SPI pSpi, // \arg pointer to a SPI controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_SPI_GetInterruptMaskStatus( pSpi ) & flag ); -} - -/* ***************************************************************************** - SOFTWARE API FOR USART - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_Baudrate -//* \brief Calculate the baudrate -//* Standard Asynchronous Mode : 8 bits , 1 stop , no parity -#define AT91C_US_ASYNC_MODE ( AT91C_US_USMODE_NORMAL + \ - AT91C_US_NBSTOP_1_BIT + \ - AT91C_US_PAR_NONE + \ - AT91C_US_CHRL_8_BITS + \ - AT91C_US_CLKS_CLOCK ) - -//* Standard External Asynchronous Mode : 8 bits , 1 stop , no parity -#define AT91C_US_ASYNC_SCK_MODE ( AT91C_US_USMODE_NORMAL + \ - AT91C_US_NBSTOP_1_BIT + \ - AT91C_US_PAR_NONE + \ - AT91C_US_CHRL_8_BITS + \ - AT91C_US_CLKS_EXT ) - -//* Standard Synchronous Mode : 8 bits , 1 stop , no parity -#define AT91C_US_SYNC_MODE ( AT91C_US_SYNC + \ - AT91C_US_USMODE_NORMAL + \ - AT91C_US_NBSTOP_1_BIT + \ - AT91C_US_PAR_NONE + \ - AT91C_US_CHRL_8_BITS + \ - AT91C_US_CLKS_CLOCK ) - -//* SCK used Label -#define AT91C_US_SCK_USED (AT91C_US_CKLO | AT91C_US_CLKS_EXT) - -//* Standard ISO T=0 Mode : 8 bits , 1 stop , parity -#define AT91C_US_ISO_READER_MODE ( AT91C_US_USMODE_ISO7816_0 + \ - AT91C_US_CLKS_CLOCK +\ - AT91C_US_NBSTOP_1_BIT + \ - AT91C_US_PAR_EVEN + \ - AT91C_US_CHRL_8_BITS + \ - AT91C_US_CKLO +\ - AT91C_US_OVER) - -//* Standard IRDA mode -#define AT91C_US_ASYNC_IRDA_MODE ( AT91C_US_USMODE_IRDA + \ - AT91C_US_NBSTOP_1_BIT + \ - AT91C_US_PAR_NONE + \ - AT91C_US_CHRL_8_BITS + \ - AT91C_US_CLKS_CLOCK ) - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_Baudrate -//* \brief Caluculate baud_value according to the main clock and the baud rate -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_US_Baudrate( const unsigned int main_clock, // \arg peripheral clock - const unsigned int baud_rate ) // \arg UART baudrate -{ - unsigned int baud_value = ( ( main_clock * 10 ) / ( baud_rate * 16 ) ); - - if( ( baud_value % 10 ) >= 5 ) - baud_value = ( baud_value / 10 ) + 1; - else - baud_value /= 10; - return baud_value; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_SetBaudrate -//* \brief Set the baudrate according to the CPU clock -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_SetBaudrate( AT91PS_USART pUSART, // \arg pointer to a USART controller - unsigned int mainClock, // \arg peripheral clock - unsigned int speed ) // \arg UART baudrate -{ - //* Define the baud rate divisor register - pUSART->US_BRGR = AT91F_US_Baudrate( mainClock, speed ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_SetTimeguard -//* \brief Set USART timeguard -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_SetTimeguard( AT91PS_USART pUSART, // \arg pointer to a USART controller - unsigned int timeguard ) // \arg timeguard value -{ - //* Write the Timeguard Register - pUSART->US_TTGR = timeguard; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_EnableIt -//* \brief Enable USART IT -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_EnableIt( AT91PS_USART pUSART, // \arg pointer to a USART controller - unsigned int flag ) // \arg IT to be enabled -{ - //* Write to the IER register - pUSART->US_IER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_DisableIt -//* \brief Disable USART IT -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_DisableIt( AT91PS_USART pUSART, // \arg pointer to a USART controller - unsigned int flag ) // \arg IT to be disabled -{ - //* Write to the IER register - pUSART->US_IDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_Configure -//* \brief Configure USART -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_Configure( AT91PS_USART pUSART, // \arg pointer to a USART controller - unsigned int mainClock, // \arg peripheral clock - unsigned int mode, // \arg mode Register to be programmed - unsigned int baudRate, // \arg baudrate to be programmed - unsigned int timeguard ) // \arg timeguard to be programmed -{ - //* Disable interrupts - pUSART->US_IDR = ( unsigned int )-1; - - //* Reset receiver and transmitter - pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS; - - //* Define the baud rate divisor register - AT91F_US_SetBaudrate( pUSART, mainClock, baudRate ); - - //* Write the Timeguard Register - AT91F_US_SetTimeguard( pUSART, timeguard ); - - //* Clear Transmit and Receive Counters - AT91F_PDC_Open( ( AT91PS_PDC ) & ( pUSART->US_RPR ) ); - - //* Define the USART mode - pUSART->US_MR = mode; - -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_EnableRx -//* \brief Enable receiving characters -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_EnableRx( AT91PS_USART pUSART ) // \arg pointer to a USART controller -{ - //* Enable receiver - pUSART->US_CR = AT91C_US_RXEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_EnableTx -//* \brief Enable sending characters -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_EnableTx( AT91PS_USART pUSART ) // \arg pointer to a USART controller -{ - //* Enable transmitter - pUSART->US_CR = AT91C_US_TXEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_ResetRx -//* \brief Reset Receiver and re-enable it -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_ResetRx( AT91PS_USART pUSART ) // \arg pointer to a USART controller -{ - //* Reset receiver - pUSART->US_CR = AT91C_US_RSTRX; - //* Re-Enable receiver - pUSART->US_CR = AT91C_US_RXEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_ResetTx -//* \brief Reset Transmitter and re-enable it -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_ResetTx( AT91PS_USART pUSART ) // \arg pointer to a USART controller -{ - //* Reset transmitter - pUSART->US_CR = AT91C_US_RSTTX; - //* Enable transmitter - pUSART->US_CR = AT91C_US_TXEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_DisableRx -//* \brief Disable Receiver -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_DisableRx( AT91PS_USART pUSART ) // \arg pointer to a USART controller -{ - //* Disable receiver - pUSART->US_CR = AT91C_US_RXDIS; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_DisableTx -//* \brief Disable Transmitter -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_DisableTx( AT91PS_USART pUSART ) // \arg pointer to a USART controller -{ - //* Disable transmitter - pUSART->US_CR = AT91C_US_TXDIS; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_Close -//* \brief Close USART: disable IT disable receiver and transmitter, close PDC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_Close( AT91PS_USART pUSART ) // \arg pointer to a USART controller -{ - //* Reset the baud rate divisor register - pUSART->US_BRGR = 0; - - //* Reset the USART mode - pUSART->US_MR = 0; - - //* Reset the Timeguard Register - pUSART->US_TTGR = 0; - - //* Disable all interrupts - pUSART->US_IDR = 0xFFFFFFFF; - - //* Abort the Peripheral Data Transfers - AT91F_PDC_Close( ( AT91PS_PDC ) & ( pUSART->US_RPR ) ); - - //* Disable receiver and transmitter and stop any activity immediately - pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_TxReady -//* \brief Return 1 if a character can be written in US_THR -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_US_TxReady( AT91PS_USART pUSART ) // \arg pointer to a USART controller -{ - return ( pUSART->US_CSR & AT91C_US_TXRDY ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_RxReady -//* \brief Return 1 if a character can be read in US_RHR -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_US_RxReady( AT91PS_USART pUSART ) // \arg pointer to a USART controller -{ - return ( pUSART->US_CSR & AT91C_US_RXRDY ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_Error -//* \brief Return the error flag -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_US_Error( AT91PS_USART pUSART ) // \arg pointer to a USART controller -{ - return ( pUSART->US_CSR & ( AT91C_US_OVRE | // Overrun error - AT91C_US_FRAME | // Framing error - AT91C_US_PARE ) ); // Parity error -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_PutChar -//* \brief Send a character,does not check if ready to send -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_PutChar( AT91PS_USART pUSART, int character ) -{ - pUSART->US_THR = ( character & 0x1FF ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_GetChar -//* \brief Receive a character,does not check if a character is available -//*---------------------------------------------------------------------------- -static __inline int -AT91F_US_GetChar( const AT91PS_USART pUSART ) -{ - return ( ( pUSART->US_RHR ) & 0x1FF ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_SendFrame -//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_US_SendFrame( AT91PS_USART pUSART, - char *pBuffer, unsigned int szBuffer, char *pNextBuffer, unsigned int szNextBuffer ) -{ - return AT91F_PDC_SendFrame( ( AT91PS_PDC ) & ( pUSART->US_RPR ), pBuffer, szBuffer, pNextBuffer, szNextBuffer ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_ReceiveFrame -//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_US_ReceiveFrame( AT91PS_USART pUSART, - char *pBuffer, unsigned int szBuffer, char *pNextBuffer, unsigned int szNextBuffer ) -{ - return AT91F_PDC_ReceiveFrame( ( AT91PS_PDC ) & ( pUSART->US_RPR ), pBuffer, szBuffer, pNextBuffer, szNextBuffer ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US_SetIrdaFilter -//* \brief Set the value of IrDa filter tregister -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US_SetIrdaFilter( AT91PS_USART pUSART, unsigned char value ) -{ - pUSART->US_IF = value; -} - -/* ***************************************************************************** - SOFTWARE API FOR SSC - ***************************************************************************** */ -//* Define the standard I2S mode configuration - -//* Configuration to set in the SSC Transmit Clock Mode Register -//* Parameters : nb_bit_by_slot : 8, 16 or 32 bits -//* nb_slot_by_frame : number of channels -#define AT91C_I2S_ASY_MASTER_TX_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\ - AT91C_SSC_CKS_DIV +\ - AT91C_SSC_CKO_CONTINOUS +\ - AT91C_SSC_CKG_NONE +\ - AT91C_SSC_START_FALL_RF +\ - AT91C_SSC_STTOUT +\ - ((1<<16) & AT91C_SSC_STTDLY) +\ - ((((nb_bit_by_slot*nb_slot_by_frame)/2)-1) <<24)) - - -//* Configuration to set in the SSC Transmit Frame Mode Register -//* Parameters : nb_bit_by_slot : 8, 16 or 32 bits -//* nb_slot_by_frame : number of channels -#define AT91C_I2S_ASY_TX_FRAME_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\ - (nb_bit_by_slot-1) +\ - AT91C_SSC_MSBF +\ - (((nb_slot_by_frame-1)<<8) & AT91C_SSC_DATNB) +\ - (((nb_bit_by_slot-1)<<16) & AT91C_SSC_FSLEN) +\ - AT91C_SSC_FSOS_NEGATIVE) - - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_SetBaudrate -//* \brief Set the baudrate according to the CPU clock -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SSC_SetBaudrate( AT91PS_SSC pSSC, // \arg pointer to a SSC controller - unsigned int mainClock, // \arg peripheral clock - unsigned int speed ) // \arg SSC baudrate -{ - unsigned int baud_value; - - //* Define the baud rate divisor register - if( speed == 0 ) - baud_value = 0; - else - { - baud_value = ( unsigned int )( mainClock * 10 ) / ( 2 * speed ); - if( ( baud_value % 10 ) >= 5 ) - baud_value = ( baud_value / 10 ) + 1; - else - baud_value /= 10; - } - - pSSC->SSC_CMR = baud_value; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_Configure -//* \brief Configure SSC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SSC_Configure( AT91PS_SSC pSSC, // \arg pointer to a SSC controller - unsigned int syst_clock, // \arg System Clock Frequency - unsigned int baud_rate, // \arg Expected Baud Rate Frequency - unsigned int clock_rx, // \arg Receiver Clock Parameters - unsigned int mode_rx, // \arg mode Register to be programmed - unsigned int clock_tx, // \arg Transmitter Clock Parameters - unsigned int mode_tx ) // \arg mode Register to be programmed -{ - //* Disable interrupts - pSSC->SSC_IDR = ( unsigned int )-1; - - //* Reset receiver and transmitter - pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS; - - //* Define the Clock Mode Register - AT91F_SSC_SetBaudrate( pSSC, syst_clock, baud_rate ); - - //* Write the Receive Clock Mode Register - pSSC->SSC_RCMR = clock_rx; - - //* Write the Transmit Clock Mode Register - pSSC->SSC_TCMR = clock_tx; - - //* Write the Receive Frame Mode Register - pSSC->SSC_RFMR = mode_rx; - - //* Write the Transmit Frame Mode Register - pSSC->SSC_TFMR = mode_tx; - - //* Clear Transmit and Receive Counters - AT91F_PDC_Open( ( AT91PS_PDC ) & ( pSSC->SSC_RPR ) ); - - -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_EnableRx -//* \brief Enable receiving datas -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SSC_EnableRx( AT91PS_SSC pSSC ) // \arg pointer to a SSC controller -{ - //* Enable receiver - pSSC->SSC_CR = AT91C_SSC_RXEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_DisableRx -//* \brief Disable receiving datas -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SSC_DisableRx( AT91PS_SSC pSSC ) // \arg pointer to a SSC controller -{ - //* Disable receiver - pSSC->SSC_CR = AT91C_SSC_RXDIS; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_EnableTx -//* \brief Enable sending datas -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SSC_EnableTx( AT91PS_SSC pSSC ) // \arg pointer to a SSC controller -{ - //* Enable transmitter - pSSC->SSC_CR = AT91C_SSC_TXEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_DisableTx -//* \brief Disable sending datas -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SSC_DisableTx( AT91PS_SSC pSSC ) // \arg pointer to a SSC controller -{ - //* Disable transmitter - pSSC->SSC_CR = AT91C_SSC_TXDIS; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_EnableIt -//* \brief Enable SSC IT -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SSC_EnableIt( AT91PS_SSC pSSC, // \arg pointer to a SSC controller - unsigned int flag ) // \arg IT to be enabled -{ - //* Write to the IER register - pSSC->SSC_IER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_DisableIt -//* \brief Disable SSC IT -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SSC_DisableIt( AT91PS_SSC pSSC, // \arg pointer to a SSC controller - unsigned int flag ) // \arg IT to be disabled -{ - //* Write to the IDR register - pSSC->SSC_IDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_ReceiveFrame -//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_SSC_ReceiveFrame( AT91PS_SSC pSSC, - char *pBuffer, unsigned int szBuffer, char *pNextBuffer, unsigned int szNextBuffer ) -{ - return AT91F_PDC_ReceiveFrame( ( AT91PS_PDC ) & ( pSSC->SSC_RPR ), pBuffer, szBuffer, pNextBuffer, szNextBuffer ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_SendFrame -//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_SSC_SendFrame( AT91PS_SSC pSSC, - char *pBuffer, unsigned int szBuffer, char *pNextBuffer, unsigned int szNextBuffer ) -{ - return AT91F_PDC_SendFrame( ( AT91PS_PDC ) & ( pSSC->SSC_RPR ), pBuffer, szBuffer, pNextBuffer, szNextBuffer ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_GetInterruptMaskStatus -//* \brief Return SSC Interrupt Mask Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_SSC_GetInterruptMaskStatus( // \return SSC Interrupt Mask Status - AT91PS_SSC pSsc ) // \arg pointer to a SSC controller -{ - return pSsc->SSC_IMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_IsInterruptMasked -//* \brief Test if SSC Interrupt is Masked -//*---------------------------------------------------------------------------- -static __inline int -AT91F_SSC_IsInterruptMasked( AT91PS_SSC pSsc, // \arg pointer to a SSC controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_SSC_GetInterruptMaskStatus( pSsc ) & flag ); -} - -/* ***************************************************************************** - SOFTWARE API FOR TWI - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_TWI_EnableIt -//* \brief Enable TWI IT -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TWI_EnableIt( AT91PS_TWI pTWI, // \arg pointer to a TWI controller - unsigned int flag ) // \arg IT to be enabled -{ - //* Write to the IER register - pTWI->TWI_IER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TWI_DisableIt -//* \brief Disable TWI IT -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TWI_DisableIt( AT91PS_TWI pTWI, // \arg pointer to a TWI controller - unsigned int flag ) // \arg IT to be disabled -{ - //* Write to the IDR register - pTWI->TWI_IDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TWI_Configure -//* \brief Configure TWI in master mode -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TWI_Configure( AT91PS_TWI pTWI ) // \arg pointer to a TWI controller -{ - //* Disable interrupts - pTWI->TWI_IDR = ( unsigned int )-1; - - //* Reset peripheral - pTWI->TWI_CR = AT91C_TWI_SWRST; - - //* Set Master mode - pTWI->TWI_CR = AT91C_TWI_MSEN; - -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TWI_GetInterruptMaskStatus -//* \brief Return TWI Interrupt Mask Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_TWI_GetInterruptMaskStatus( // \return TWI Interrupt Mask Status - AT91PS_TWI pTwi ) // \arg pointer to a TWI controller -{ - return pTwi->TWI_IMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TWI_IsInterruptMasked -//* \brief Test if TWI Interrupt is Masked -//*---------------------------------------------------------------------------- -static __inline int -AT91F_TWI_IsInterruptMasked( AT91PS_TWI pTwi, // \arg pointer to a TWI controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_TWI_GetInterruptMaskStatus( pTwi ) & flag ); -} - -/* ***************************************************************************** - SOFTWARE API FOR PWMC - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWM_GetStatus -//* \brief Return PWM Interrupt Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PWMC_GetStatus( // \return PWM Interrupt Status - AT91PS_PWMC pPWM ) // pointer to a PWM controller -{ - return pPWM->PWMC_SR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWM_InterruptEnable -//* \brief Enable PWM Interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PWMC_InterruptEnable( AT91PS_PWMC pPwm, // \arg pointer to a PWM controller - unsigned int flag ) // \arg PWM interrupt to be enabled -{ - pPwm->PWMC_IER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWM_InterruptDisable -//* \brief Disable PWM Interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PWMC_InterruptDisable( AT91PS_PWMC pPwm, // \arg pointer to a PWM controller - unsigned int flag ) // \arg PWM interrupt to be disabled -{ - pPwm->PWMC_IDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWM_GetInterruptMaskStatus -//* \brief Return PWM Interrupt Mask Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PWMC_GetInterruptMaskStatus( // \return PWM Interrupt Mask Status - AT91PS_PWMC pPwm ) // \arg pointer to a PWM controller -{ - return pPwm->PWMC_IMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWM_IsInterruptMasked -//* \brief Test if PWM Interrupt is Masked -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PWMC_IsInterruptMasked( AT91PS_PWMC pPWM, // \arg pointer to a PWM controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PWMC_GetInterruptMaskStatus( pPWM ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWM_IsStatusSet -//* \brief Test if PWM Interrupt is Set -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_PWMC_IsStatusSet( AT91PS_PWMC pPWM, // \arg pointer to a PWM controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_PWMC_GetStatus( pPWM ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWM_CfgChannel -//* \brief Test if PWM Interrupt is Set -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PWMC_CfgChannel( AT91PS_PWMC pPWM, // \arg pointer to a PWM controller - unsigned int channelId, // \arg PWM channel ID - unsigned int mode, // \arg PWM mode - unsigned int period, // \arg PWM period - unsigned int duty ) // \arg PWM duty cycle -{ - pPWM->PWMC_CH[channelId].PWMC_CMR = mode; - pPWM->PWMC_CH[channelId].PWMC_CDTYR = duty; - pPWM->PWMC_CH[channelId].PWMC_CPRDR = period; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWM_StartChannel -//* \brief Enable channel -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PWMC_StartChannel( AT91PS_PWMC pPWM, // \arg pointer to a PWM controller - unsigned int flag ) // \arg Channels IDs to be enabled -{ - pPWM->PWMC_ENA = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWM_StopChannel -//* \brief Disable channel -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PWMC_StopChannel( AT91PS_PWMC pPWM, // \arg pointer to a PWM controller - unsigned int flag ) // \arg Channels IDs to be enabled -{ - pPWM->PWMC_DIS = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWM_UpdateChannel -//* \brief Update Period or Duty Cycle -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PWMC_UpdateChannel( AT91PS_PWMC pPWM, // \arg pointer to a PWM controller - unsigned int channelId, // \arg PWM channel ID - unsigned int update ) // \arg Channels IDs to be enabled -{ - pPWM->PWMC_CH[channelId].PWMC_CUPDR = update; -} - -/* ***************************************************************************** - SOFTWARE API FOR UDP - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_EnableIt -//* \brief Enable UDP IT -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_EnableIt( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned int flag ) // \arg IT to be enabled -{ - //* Write to the IER register - pUDP->UDP_IER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_DisableIt -//* \brief Disable UDP IT -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_DisableIt( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned int flag ) // \arg IT to be disabled -{ - //* Write to the IDR register - pUDP->UDP_IDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_SetAddress -//* \brief Set UDP functional address -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_SetAddress( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned char address ) // \arg new UDP address -{ - pUDP->UDP_FADDR = ( AT91C_UDP_FEN | address ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_EnableEp -//* \brief Enable Endpoint -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_EnableEp( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned char endpoint ) // \arg endpoint number -{ - pUDP->UDP_CSR[endpoint] |= AT91C_UDP_EPEDS; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_DisableEp -//* \brief Enable Endpoint -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_DisableEp( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned char endpoint ) // \arg endpoint number -{ - pUDP->UDP_CSR[endpoint] &= ~AT91C_UDP_EPEDS; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_SetState -//* \brief Set UDP Device state -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_SetState( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned int flag ) // \arg new UDP address -{ - pUDP->UDP_GLBSTATE &= ~( AT91C_UDP_FADDEN | AT91C_UDP_CONFG ); - pUDP->UDP_GLBSTATE |= flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_GetState -//* \brief return UDP Device state -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_UDP_GetState( // \return the UDP device state - AT91PS_UDP pUDP ) // \arg pointer to a UDP controller -{ - return ( pUDP->UDP_GLBSTATE & ( AT91C_UDP_FADDEN | AT91C_UDP_CONFG ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_ResetEp -//* \brief Reset UDP endpoint -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_ResetEp( // \return the UDP device state - AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned int flag ) // \arg Endpoints to be reset -{ - pUDP->UDP_RSTEP = flag; - pUDP->UDP_RSTEP = 0; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_EpStall -//* \brief Endpoint will STALL requests -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_EpStall( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned char endpoint ) // \arg endpoint number -{ - pUDP->UDP_CSR[endpoint] |= AT91C_UDP_FORCESTALL; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_EpWrite -//* \brief Write value in the DPR -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_EpWrite( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned char endpoint, // \arg endpoint number - unsigned char value ) // \arg value to be written in the DPR -{ - pUDP->UDP_FDR[endpoint] = value; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_EpRead -//* \brief Return value from the DPR -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_UDP_EpRead( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned char endpoint ) // \arg endpoint number -{ - return pUDP->UDP_FDR[endpoint]; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_EpEndOfWr -//* \brief Notify the UDP that values in DPR are ready to be sent -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_EpEndOfWr( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned char endpoint ) // \arg endpoint number -{ - pUDP->UDP_CSR[endpoint] |= AT91C_UDP_TXPKTRDY; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_EpClear -//* \brief Clear flag in the endpoint CSR register -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_EpClear( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned char endpoint, // \arg endpoint number - unsigned int flag ) // \arg flag to be cleared -{ - pUDP->UDP_CSR[endpoint] &= ~( flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_EpSet -//* \brief Set flag in the endpoint CSR register -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_EpSet( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned char endpoint, // \arg endpoint number - unsigned int flag ) // \arg flag to be cleared -{ - pUDP->UDP_CSR[endpoint] |= flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_EpStatus -//* \brief Return the endpoint CSR register -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_UDP_EpStatus( AT91PS_UDP pUDP, // \arg pointer to a UDP controller - unsigned char endpoint ) // \arg endpoint number -{ - return pUDP->UDP_CSR[endpoint]; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_GetInterruptMaskStatus -//* \brief Return UDP Interrupt Mask Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_UDP_GetInterruptMaskStatus( AT91PS_UDP pUdp ) // \arg pointer to a UDP controller -{ - return pUdp->UDP_IMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_IsInterruptMasked -//* \brief Test if UDP Interrupt is Masked -//*---------------------------------------------------------------------------- -static __inline int -AT91F_UDP_IsInterruptMasked( AT91PS_UDP pUdp, // \arg pointer to a UDP controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_UDP_GetInterruptMaskStatus( pUdp ) & flag ); -} - -// ---------------------------------------------------------------------------- -// \fn AT91F_UDP_InterruptStatusRegister -// \brief Return the Interrupt Status Register -// ---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_UDP_InterruptStatusRegister( AT91PS_UDP pUDP ) // \arg pointer to a UDP controller -{ - return pUDP->UDP_ISR; -} - -// ---------------------------------------------------------------------------- -// \fn AT91F_UDP_InterruptClearRegister -// \brief Clear Interrupt Register -// ---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_InterruptClearRegister( AT91PS_UDP pUDP, // \arg pointer to UDP controller - unsigned int flag ) // \arg IT to be cleat -{ - pUDP->UDP_ICR = flag; -} - -// ---------------------------------------------------------------------------- -// \fn AT91F_UDP_EnableTransceiver -// \brief Enable transceiver -// ---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_EnableTransceiver( AT91PS_UDP pUDP ) // \arg pointer to a UDP controller -{ - pUDP->UDP_TXVC &= ~AT91C_UDP_TXVDIS; -} - -// ---------------------------------------------------------------------------- -// \fn AT91F_UDP_DisableTransceiver -// \brief Disable transceiver -// ---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_DisableTransceiver( AT91PS_UDP pUDP ) // \arg pointer to a UDP controller -{ - pUDP->UDP_TXVC = AT91C_UDP_TXVDIS; -} - -/* ***************************************************************************** - SOFTWARE API FOR TC - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_TC_InterruptEnable -//* \brief Enable TC Interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TC_InterruptEnable( AT91PS_TC pTc, // \arg pointer to a TC controller - unsigned int flag ) // \arg TC interrupt to be enabled -{ - pTc->TC_IER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TC_InterruptDisable -//* \brief Disable TC Interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TC_InterruptDisable( AT91PS_TC pTc, // \arg pointer to a TC controller - unsigned int flag ) // \arg TC interrupt to be disabled -{ - pTc->TC_IDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TC_GetInterruptMaskStatus -//* \brief Return TC Interrupt Mask Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_TC_GetInterruptMaskStatus( // \return TC Interrupt Mask Status - AT91PS_TC pTc ) // \arg pointer to a TC controller -{ - return pTc->TC_IMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TC_IsInterruptMasked -//* \brief Test if TC Interrupt is Masked -//*---------------------------------------------------------------------------- -static __inline int -AT91F_TC_IsInterruptMasked( AT91PS_TC pTc, // \arg pointer to a TC controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_TC_GetInterruptMaskStatus( pTc ) & flag ); -} - -/* ***************************************************************************** - SOFTWARE API FOR CAN - ***************************************************************************** */ -#define STANDARD_FORMAT 0 -#define EXTENDED_FORMAT 1 - -//*---------------------------------------------------------------------------- -//* \fn AT91F_InitMailboxRegisters() -//* \brief Configure the corresponding mailbox -//*---------------------------------------------------------------------------- -static __inline void -AT91F_InitMailboxRegisters( AT91PS_CAN_MB CAN_Mailbox, - int mode_reg, - int acceptance_mask_reg, int id_reg, int data_low_reg, int data_high_reg, int control_reg ) -{ - CAN_Mailbox->CAN_MB_MCR = 0x0; - CAN_Mailbox->CAN_MB_MMR = mode_reg; - CAN_Mailbox->CAN_MB_MAM = acceptance_mask_reg; - CAN_Mailbox->CAN_MB_MID = id_reg; - CAN_Mailbox->CAN_MB_MDL = data_low_reg; - CAN_Mailbox->CAN_MB_MDH = data_high_reg; - CAN_Mailbox->CAN_MB_MCR = control_reg; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_EnableCAN() -//* \brief -//*---------------------------------------------------------------------------- -static __inline void -AT91F_EnableCAN( AT91PS_CAN pCAN ) // pointer to a CAN controller -{ - pCAN->CAN_MR |= AT91C_CAN_CANEN; - - // Wait for WAKEUP flag raising <=> 11-recessive-bit were scanned by the transceiver - while( ( pCAN->CAN_SR & AT91C_CAN_WAKEUP ) != AT91C_CAN_WAKEUP ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_DisableCAN() -//* \brief -//*---------------------------------------------------------------------------- -static __inline void -AT91F_DisableCAN( AT91PS_CAN pCAN ) // pointer to a CAN controller -{ - pCAN->CAN_MR &= ~AT91C_CAN_CANEN; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_EnableIt -//* \brief Enable CAN interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_EnableIt( AT91PS_CAN pCAN, // pointer to a CAN controller - unsigned int flag ) // IT to be enabled -{ - //* Write to the IER register - pCAN->CAN_IER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_DisableIt -//* \brief Disable CAN interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_DisableIt( AT91PS_CAN pCAN, // pointer to a CAN controller - unsigned int flag ) // IT to be disabled -{ - //* Write to the IDR register - pCAN->CAN_IDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetStatus -//* \brief Return CAN Interrupt Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetStatus( // \return CAN Interrupt Status - AT91PS_CAN pCAN ) // pointer to a CAN controller -{ - return pCAN->CAN_SR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetInterruptMaskStatus -//* \brief Return CAN Interrupt Mask Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetInterruptMaskStatus( // \return CAN Interrupt Mask Status - AT91PS_CAN pCAN ) // pointer to a CAN controller -{ - return pCAN->CAN_IMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_IsInterruptMasked -//* \brief Test if CAN Interrupt is Masked -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_IsInterruptMasked( AT91PS_CAN pCAN, // \arg pointer to a CAN controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_CAN_GetInterruptMaskStatus( pCAN ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_IsStatusSet -//* \brief Test if CAN Interrupt is Set -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_IsStatusSet( AT91PS_CAN pCAN, // \arg pointer to a CAN controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_CAN_GetStatus( pCAN ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_CfgModeReg -//* \brief Configure the Mode Register of the CAN controller -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_CfgModeReg( AT91PS_CAN pCAN, // pointer to a CAN controller - unsigned int mode ) // mode register -{ - //* Write to the MR register - pCAN->CAN_MR = mode; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetModeReg -//* \brief Return the Mode Register of the CAN controller value -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetModeReg( AT91PS_CAN pCAN // pointer to a CAN controller - ) -{ - return pCAN->CAN_MR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_CfgBaudrateReg -//* \brief Configure the Baudrate of the CAN controller for the network -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_CfgBaudrateReg( AT91PS_CAN pCAN, // pointer to a CAN controller - unsigned int baudrate_cfg ) -{ - //* Write to the BR register - pCAN->CAN_BR = baudrate_cfg; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetBaudrate -//* \brief Return the Baudrate of the CAN controller for the network value -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetBaudrate( AT91PS_CAN pCAN // pointer to a CAN controller - ) -{ - return pCAN->CAN_BR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetInternalCounter -//* \brief Return CAN Timer Regsiter Value -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetInternalCounter( AT91PS_CAN pCAN // pointer to a CAN controller - ) -{ - return pCAN->CAN_TIM; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetTimestamp -//* \brief Return CAN Timestamp Register Value -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetTimestamp( AT91PS_CAN pCAN // pointer to a CAN controller - ) -{ - return pCAN->CAN_TIMESTP; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetErrorCounter -//* \brief Return CAN Error Counter Register Value -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetErrorCounter( AT91PS_CAN pCAN // pointer to a CAN controller - ) -{ - return pCAN->CAN_ECR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_InitTransferRequest -//* \brief Request for a transfer on the corresponding mailboxes -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_InitTransferRequest( AT91PS_CAN pCAN, // pointer to a CAN controller - unsigned int transfer_cmd ) -{ - pCAN->CAN_TCR = transfer_cmd; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_InitAbortRequest -//* \brief Abort the corresponding mailboxes -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_InitAbortRequest( AT91PS_CAN pCAN, // pointer to a CAN controller - unsigned int abort_cmd ) -{ - pCAN->CAN_ACR = abort_cmd; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_CfgMessageModeReg -//* \brief Program the Message Mode Register -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_CfgMessageModeReg( AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox - unsigned int mode ) -{ - CAN_Mailbox->CAN_MB_MMR = mode; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetMessageModeReg -//* \brief Return the Message Mode Register -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetMessageModeReg( AT91PS_CAN_MB CAN_Mailbox ) // pointer to a CAN Mailbox -{ - return CAN_Mailbox->CAN_MB_MMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_CfgMessageIDReg -//* \brief Program the Message ID Register -//* \brief Version == 0 for Standard messsage, Version == 1 for Extended -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_CfgMessageIDReg( AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox - unsigned int id, unsigned char version ) -{ - if( version == 0 ) // IDvA Standard Format - CAN_Mailbox->CAN_MB_MID = id << 18; - else // IDvB Extended Format - CAN_Mailbox->CAN_MB_MID = id | ( 1 << 29 ); // set MIDE bit -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetMessageIDReg -//* \brief Return the Message ID Register -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetMessageIDReg( AT91PS_CAN_MB CAN_Mailbox ) // pointer to a CAN Mailbox -{ - return CAN_Mailbox->CAN_MB_MID; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_CfgMessageAcceptanceMaskReg -//* \brief Program the Message Acceptance Mask Register -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_CfgMessageAcceptanceMaskReg( AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox - unsigned int mask ) -{ - CAN_Mailbox->CAN_MB_MAM = mask; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetMessageAcceptanceMaskReg -//* \brief Return the Message Acceptance Mask Register -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetMessageAcceptanceMaskReg( AT91PS_CAN_MB CAN_Mailbox ) // pointer to a CAN Mailbox -{ - return CAN_Mailbox->CAN_MB_MAM; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetFamilyID -//* \brief Return the Message ID Register -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetFamilyID( AT91PS_CAN_MB CAN_Mailbox ) // pointer to a CAN Mailbox -{ - return CAN_Mailbox->CAN_MB_MFID; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_CfgMessageCtrl -//* \brief Request and config for a transfer on the corresponding mailbox -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_CfgMessageCtrlReg( AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox - unsigned int message_ctrl_cmd ) -{ - CAN_Mailbox->CAN_MB_MCR = message_ctrl_cmd; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetMessageStatus -//* \brief Return CAN Mailbox Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetMessageStatus( AT91PS_CAN_MB CAN_Mailbox ) // pointer to a CAN Mailbox -{ - return CAN_Mailbox->CAN_MB_MSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_CfgMessageDataLow -//* \brief Program data low value -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_CfgMessageDataLow( AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox - unsigned int data ) -{ - CAN_Mailbox->CAN_MB_MDL = data; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetMessageDataLow -//* \brief Return data low value -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetMessageDataLow( AT91PS_CAN_MB CAN_Mailbox ) // pointer to a CAN Mailbox -{ - return CAN_Mailbox->CAN_MB_MDL; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_CfgMessageDataHigh -//* \brief Program data high value -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_CfgMessageDataHigh( AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox - unsigned int data ) -{ - CAN_Mailbox->CAN_MB_MDH = data; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_GetMessageDataHigh -//* \brief Return data high value -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_CAN_GetMessageDataHigh( AT91PS_CAN_MB CAN_Mailbox ) // pointer to a CAN Mailbox -{ - return CAN_Mailbox->CAN_MB_MDH; -} - -/* ***************************************************************************** - SOFTWARE API FOR ADC - ***************************************************************************** */ -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_EnableIt -//* \brief Enable ADC interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_ADC_EnableIt( AT91PS_ADC pADC, // pointer to a ADC controller - unsigned int flag ) // IT to be enabled -{ - //* Write to the IER register - pADC->ADC_IER = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_DisableIt -//* \brief Disable ADC interrupt -//*---------------------------------------------------------------------------- -static __inline void -AT91F_ADC_DisableIt( AT91PS_ADC pADC, // pointer to a ADC controller - unsigned int flag ) // IT to be disabled -{ - //* Write to the IDR register - pADC->ADC_IDR = flag; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetStatus -//* \brief Return ADC Interrupt Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetStatus( // \return ADC Interrupt Status - AT91PS_ADC pADC ) // pointer to a ADC controller -{ - return pADC->ADC_SR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetInterruptMaskStatus -//* \brief Return ADC Interrupt Mask Status -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetInterruptMaskStatus( // \return ADC Interrupt Mask Status - AT91PS_ADC pADC ) // pointer to a ADC controller -{ - return pADC->ADC_IMR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_IsInterruptMasked -//* \brief Test if ADC Interrupt is Masked -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_IsInterruptMasked( AT91PS_ADC pADC, // \arg pointer to a ADC controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_ADC_GetInterruptMaskStatus( pADC ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_IsStatusSet -//* \brief Test if ADC Status is Set -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_IsStatusSet( AT91PS_ADC pADC, // \arg pointer to a ADC controller - unsigned int flag ) // \arg flag to be tested -{ - return ( AT91F_ADC_GetStatus( pADC ) & flag ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_CfgModeReg -//* \brief Configure the Mode Register of the ADC controller -//*---------------------------------------------------------------------------- -static __inline void -AT91F_ADC_CfgModeReg( AT91PS_ADC pADC, // pointer to a ADC controller - unsigned int mode ) // mode register -{ - //* Write to the MR register - pADC->ADC_MR = mode; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetModeReg -//* \brief Return the Mode Register of the ADC controller value -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetModeReg( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - return pADC->ADC_MR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_CfgTimings -//* \brief Configure the different necessary timings of the ADC controller -//*---------------------------------------------------------------------------- -static __inline void -AT91F_ADC_CfgTimings( AT91PS_ADC pADC, // pointer to a ADC controller - unsigned int mck_clock, // in MHz - unsigned int adc_clock, // in MHz - unsigned int startup_time, // in us - unsigned int sample_and_hold_time ) // in ns -{ - unsigned int prescal, startup, shtim; - - prescal = mck_clock / ( 2 * adc_clock ) - 1; - startup = adc_clock * startup_time / 8 - 1; - shtim = adc_clock * sample_and_hold_time / 1000 - 1; - - //* Write to the MR register - pADC->ADC_MR = - ( ( prescal << 8 ) & AT91C_ADC_PRESCAL ) | ( ( startup << 16 ) & AT91C_ADC_STARTUP ) | ( ( shtim << 24 ) & - AT91C_ADC_SHTIM ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_EnableChannel -//* \brief Return ADC Timer Register Value -//*---------------------------------------------------------------------------- -static __inline void -AT91F_ADC_EnableChannel( AT91PS_ADC pADC, // pointer to a ADC controller - unsigned int channel ) // mode register -{ - //* Write to the CHER register - pADC->ADC_CHER = channel; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_DisableChannel -//* \brief Return ADC Timer Register Value -//*---------------------------------------------------------------------------- -static __inline void -AT91F_ADC_DisableChannel( AT91PS_ADC pADC, // pointer to a ADC controller - unsigned int channel ) // mode register -{ - //* Write to the CHDR register - pADC->ADC_CHDR = channel; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetChannelStatus -//* \brief Return ADC Timer Register Value -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetChannelStatus( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - return pADC->ADC_CHSR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_StartConversion -//* \brief Software request for a analog to digital conversion -//*---------------------------------------------------------------------------- -static __inline void -AT91F_ADC_StartConversion( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - pADC->ADC_CR = AT91C_ADC_START; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_SoftReset -//* \brief Software reset -//*---------------------------------------------------------------------------- -static __inline void -AT91F_ADC_SoftReset( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - pADC->ADC_CR = AT91C_ADC_SWRST; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetLastConvertedData -//* \brief Return the Last Converted Data -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetLastConvertedData( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - return pADC->ADC_LCDR; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetConvertedDataCH0 -//* \brief Return the Channel 0 Converted Data -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetConvertedDataCH0( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - return pADC->ADC_CDR0; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetConvertedDataCH1 -//* \brief Return the Channel 1 Converted Data -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetConvertedDataCH1( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - return pADC->ADC_CDR1; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetConvertedDataCH2 -//* \brief Return the Channel 2 Converted Data -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetConvertedDataCH2( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - return pADC->ADC_CDR2; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetConvertedDataCH3 -//* \brief Return the Channel 3 Converted Data -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetConvertedDataCH3( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - return pADC->ADC_CDR3; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetConvertedDataCH4 -//* \brief Return the Channel 4 Converted Data -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetConvertedDataCH4( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - return pADC->ADC_CDR4; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetConvertedDataCH5 -//* \brief Return the Channel 5 Converted Data -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetConvertedDataCH5( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - return pADC->ADC_CDR5; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetConvertedDataCH6 -//* \brief Return the Channel 6 Converted Data -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetConvertedDataCH6( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - return pADC->ADC_CDR6; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_GetConvertedDataCH7 -//* \brief Return the Channel 7 Converted Data -//*---------------------------------------------------------------------------- -static __inline unsigned int -AT91F_ADC_GetConvertedDataCH7( AT91PS_ADC pADC // pointer to a ADC controller - ) -{ - return pADC->ADC_CDR7; -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_MC_CfgPMC -//* \brief Enable Peripheral clock in PMC for MC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_MC_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_SYS ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_DBGU_CfgPMC -//* \brief Enable Peripheral clock in PMC for DBGU -//*---------------------------------------------------------------------------- -static __inline void -AT91F_DBGU_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_SYS ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_DBGU_CfgPIO -//* \brief Configure PIO controllers to drive DBGU signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_DBGU_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address - ( ( unsigned int )AT91C_PA28_DTXD ) | ( ( unsigned int )AT91C_PA27_DRXD ), // Peripheral A - 0 ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWMC_CH3_CfgPIO -//* \brief Configure PIO controllers to drive PWMC_CH3 signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PWMC_CH3_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - ( ( unsigned int )AT91C_PB22_PWM3 ), // Peripheral A - ( ( unsigned int )AT91C_PB30_PWM3 ) ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWMC_CH2_CfgPIO -//* \brief Configure PIO controllers to drive PWMC_CH2 signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PWMC_CH2_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - ( ( unsigned int )AT91C_PB21_PWM2 ), // Peripheral A - ( ( unsigned int )AT91C_PB29_PWM2 ) ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWMC_CH1_CfgPIO -//* \brief Configure PIO controllers to drive PWMC_CH1 signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PWMC_CH1_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - ( ( unsigned int )AT91C_PB20_PWM1 ), // Peripheral A - ( ( unsigned int )AT91C_PB28_PWM1 ) ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWMC_CH0_CfgPIO -//* \brief Configure PIO controllers to drive PWMC_CH0 signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PWMC_CH0_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - ( ( unsigned int )AT91C_PB19_PWM0 ), // Peripheral A - ( ( unsigned int )AT91C_PB27_PWM0 ) ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_EMAC_CfgPMC -//* \brief Enable Peripheral clock in PMC for EMAC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_EMAC_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_EMAC ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_EMAC_CfgPIO -//* \brief Configure PIO controllers to drive EMAC signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_EMAC_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - ( ( unsigned int )AT91C_PB9_EMDIO ) | ( ( unsigned int )AT91C_PB17_ERXCK ) | ( ( unsigned int )AT91C_PB15_ERXDV_ECRSDV ) | ( ( unsigned int )AT91C_PB8_EMDC ) | ( ( unsigned int )AT91C_PB16_ECOL ) | ( ( unsigned int )AT91C_PB7_ERXER ) | ( ( unsigned int )AT91C_PB5_ERX0 ) | ( ( unsigned int )AT91C_PB6_ERX1 ) | ( ( unsigned int )AT91C_PB13_ERX2 ) | ( ( unsigned int )AT91C_PB1_ETXEN ) | ( ( unsigned int )AT91C_PB14_ERX3 ) | ( ( unsigned int )AT91C_PB12_ETXER ) | ( ( unsigned int )AT91C_PB2_ETX0 ) | ( ( unsigned int )AT91C_PB3_ETX1 ) | ( ( unsigned int )AT91C_PB10_ETX2 ) | ( ( unsigned int )AT91C_PB18_EF100 ) | ( ( unsigned int )AT91C_PB11_ETX3 ) | ( ( unsigned int )AT91C_PB4_ECRS ) | ( ( unsigned int )AT91C_PB0_ETXCK_EREFCK ), // Peripheral A - 0 ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_VREG_CfgPMC -//* \brief Enable Peripheral clock in PMC for VREG -//*---------------------------------------------------------------------------- -static __inline void -AT91F_VREG_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_SYS ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_CfgPMC -//* \brief Enable Peripheral clock in PMC for SSC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SSC_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_SSC ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SSC_CfgPIO -//* \brief Configure PIO controllers to drive SSC signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SSC_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address - ( ( unsigned int )AT91C_PA23_TD ) | ( ( unsigned int )AT91C_PA21_TF ) | ( ( unsigned int )AT91C_PA25_RK ) | ( ( unsigned int )AT91C_PA24_RD ) | ( ( unsigned int )AT91C_PA26_RF ) | ( ( unsigned int )AT91C_PA22_TK ), // Peripheral A - 0 ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI1_CfgPMC -//* \brief Enable Peripheral clock in PMC for SPI1 -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI1_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_SPI1 ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI1_CfgPIO -//* \brief Configure PIO controllers to drive SPI1 signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI1_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address - 0, // Peripheral A - ( ( unsigned int )AT91C_PA23_SPI1_MOSI ) | ( ( unsigned int )AT91C_PA21_SPI1_NPCS0 ) | ( ( unsigned int )AT91C_PA25_SPI1_NPCS1 ) | ( ( unsigned int )AT91C_PA2_SPI1_NPCS1 ) | ( ( unsigned int )AT91C_PA24_SPI1_MISO ) | ( ( unsigned int )AT91C_PA22_SPI1_SPCK ) | ( ( unsigned int )AT91C_PA26_SPI1_NPCS2 ) | ( ( unsigned int )AT91C_PA3_SPI1_NPCS2 ) | ( ( unsigned int )AT91C_PA29_SPI1_NPCS3 ) | ( ( unsigned int )AT91C_PA4_SPI1_NPCS3 ) ); // Peripheral B - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - 0, // Peripheral A - ( ( unsigned int )AT91C_PB10_SPI1_NPCS1 ) | ( ( unsigned int )AT91C_PB11_SPI1_NPCS2 ) | ( ( unsigned int )AT91C_PB16_SPI1_NPCS3 ) ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI0_CfgPMC -//* \brief Enable Peripheral clock in PMC for SPI0 -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI0_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_SPI0 ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_SPI0_CfgPIO -//* \brief Configure PIO controllers to drive SPI0 signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_SPI0_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address - ( ( unsigned int )AT91C_PA17_SPI0_MOSI ) | ( ( unsigned int )AT91C_PA12_SPI0_NPCS0 ) | ( ( unsigned int )AT91C_PA13_SPI0_NPCS1 ) | ( ( unsigned int )AT91C_PA16_SPI0_MISO ) | ( ( unsigned int )AT91C_PA14_SPI0_NPCS2 ) | ( ( unsigned int )AT91C_PA18_SPI0_SPCK ) | ( ( unsigned int )AT91C_PA15_SPI0_NPCS3 ), // Peripheral A - ( ( unsigned int )AT91C_PA7_SPI0_NPCS1 ) | ( ( unsigned int )AT91C_PA8_SPI0_NPCS2 ) | ( ( unsigned int )AT91C_PA9_SPI0_NPCS3 ) ); // Peripheral B - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - 0, // Peripheral A - ( ( unsigned int )AT91C_PB13_SPI0_NPCS1 ) | ( ( unsigned int )AT91C_PB14_SPI0_NPCS2 ) | ( ( unsigned int )AT91C_PB17_SPI0_NPCS3 ) ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PWMC_CfgPMC -//* \brief Enable Peripheral clock in PMC for PWMC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PWMC_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_PWMC ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TC0_CfgPMC -//* \brief Enable Peripheral clock in PMC for TC0 -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TC0_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_TC0 ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TC0_CfgPIO -//* \brief Configure PIO controllers to drive TC0 signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TC0_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - ( ( unsigned int )AT91C_PB23_TIOA0 ) | ( ( unsigned int )AT91C_PB24_TIOB0 ), // Peripheral A - ( ( unsigned int )AT91C_PB12_TCLK0 ) ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TC1_CfgPMC -//* \brief Enable Peripheral clock in PMC for TC1 -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TC1_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_TC1 ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TC1_CfgPIO -//* \brief Configure PIO controllers to drive TC1 signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TC1_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - ( ( unsigned int )AT91C_PB25_TIOA1 ) | ( ( unsigned int )AT91C_PB26_TIOB1 ), // Peripheral A - ( ( unsigned int )AT91C_PB19_TCLK1 ) ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TC2_CfgPMC -//* \brief Enable Peripheral clock in PMC for TC2 -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TC2_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_TC2 ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TC2_CfgPIO -//* \brief Configure PIO controllers to drive TC2 signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TC2_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address - 0, // Peripheral A - ( ( unsigned int )AT91C_PA15_TCLK2 ) ); // Peripheral B - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - ( ( unsigned int )AT91C_PB27_TIOA2 ) | ( ( unsigned int )AT91C_PB28_TIOB2 ), // Peripheral A - 0 ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PITC_CfgPMC -//* \brief Enable Peripheral clock in PMC for PITC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PITC_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_SYS ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_CfgPMC -//* \brief Enable Peripheral clock in PMC for ADC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_ADC_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_ADC ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_ADC_CfgPIO -//* \brief Configure PIO controllers to drive ADC signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_ADC_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - 0, // Peripheral A - ( ( unsigned int )AT91C_PB18_ADTRG ) ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_CfgPMC -//* \brief Enable Peripheral clock in PMC for PMC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PMC_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_SYS ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PMC_CfgPIO -//* \brief Configure PIO controllers to drive PMC signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PMC_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address - 0, // Peripheral A - ( ( unsigned int )AT91C_PA13_PCK1 ) | ( ( unsigned int )AT91C_PA30_PCK2 ) | ( ( unsigned int )AT91C_PA27_PCK3 ) ); // Peripheral B - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - ( ( unsigned int )AT91C_PB29_PCK1 ) | ( ( unsigned int )AT91C_PB30_PCK2 ), // Peripheral A - ( ( unsigned int )AT91C_PB21_PCK1 ) | ( ( unsigned int )AT91C_PB22_PCK2 ) | ( ( unsigned int )AT91C_PB20_PCK0 ) | ( ( unsigned int )AT91C_PB0_PCK0 ) ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_RSTC_CfgPMC -//* \brief Enable Peripheral clock in PMC for RSTC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_RSTC_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_SYS ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_RTTC_CfgPMC -//* \brief Enable Peripheral clock in PMC for RTTC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_RTTC_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_SYS ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIOA_CfgPMC -//* \brief Enable Peripheral clock in PMC for PIOA -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIOA_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_PIOA ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_PIOB_CfgPMC -//* \brief Enable Peripheral clock in PMC for PIOB -//*---------------------------------------------------------------------------- -static __inline void -AT91F_PIOB_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_PIOB ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TWI_CfgPMC -//* \brief Enable Peripheral clock in PMC for TWI -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TWI_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_TWI ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_TWI_CfgPIO -//* \brief Configure PIO controllers to drive TWI signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_TWI_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address - ( ( unsigned int )AT91C_PA10_TWD ) | ( ( unsigned int )AT91C_PA11_TWCK ), // Peripheral A - 0 ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_WDTC_CfgPMC -//* \brief Enable Peripheral clock in PMC for WDTC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_WDTC_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_SYS ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US1_CfgPMC -//* \brief Enable Peripheral clock in PMC for US1 -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US1_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_US1 ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US1_CfgPIO -//* \brief Configure PIO controllers to drive US1 signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US1_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address - ( ( unsigned int )AT91C_PA5_RXD1 ) | ( ( unsigned int )AT91C_PA6_TXD1 ) | ( ( unsigned int )AT91C_PA8_RTS1 ) | ( ( unsigned int )AT91C_PA7_SCK1 ) | ( ( unsigned int )AT91C_PA9_CTS1 ), // Peripheral A - 0 ); // Peripheral B - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, // PIO controller base address - 0, // Peripheral A - ( ( unsigned int )AT91C_PB25_DTR1 ) | ( ( unsigned int )AT91C_PB23_DCD1 ) | ( ( unsigned int )AT91C_PB24_DSR1 ) | ( ( unsigned int )AT91C_PB26_RI1 ) ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US0_CfgPMC -//* \brief Enable Peripheral clock in PMC for US0 -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US0_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_US0 ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_US0_CfgPIO -//* \brief Configure PIO controllers to drive US0 signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_US0_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address - ( ( unsigned int )AT91C_PA0_RXD0 ) | ( ( unsigned int )AT91C_PA1_TXD0 ) | ( ( unsigned int )AT91C_PA3_RTS0 ) | ( ( unsigned int )AT91C_PA2_SCK0 ) | ( ( unsigned int )AT91C_PA4_CTS0 ), // Peripheral A - 0 ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_UDP_CfgPMC -//* \brief Enable Peripheral clock in PMC for UDP -//*---------------------------------------------------------------------------- -static __inline void -AT91F_UDP_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_UDP ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_AIC_CfgPMC -//* \brief Enable Peripheral clock in PMC for AIC -//*---------------------------------------------------------------------------- -static __inline void -AT91F_AIC_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_IRQ0 ) | - ( ( unsigned int )1 << AT91C_ID_FIQ ) | ( ( unsigned int )1 << AT91C_ID_IRQ1 ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_AIC_CfgPIO -//* \brief Configure PIO controllers to drive AIC signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_AIC_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address - ( ( unsigned int )AT91C_PA30_IRQ0 ) | ( ( unsigned int )AT91C_PA29_FIQ ), // Peripheral A - ( ( unsigned int )AT91C_PA14_IRQ1 ) ); // Peripheral B -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_CfgPMC -//* \brief Enable Peripheral clock in PMC for CAN -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_CfgPMC( void ) -{ - AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address - ( ( unsigned int )1 << AT91C_ID_CAN ) ); -} - -//*---------------------------------------------------------------------------- -//* \fn AT91F_CAN_CfgPIO -//* \brief Configure PIO controllers to drive CAN signals -//*---------------------------------------------------------------------------- -static __inline void -AT91F_CAN_CfgPIO( void ) -{ - // Configure PIO controllers to periph mode - AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address - ( ( unsigned int )AT91C_PA20_CANTX ) | ( ( unsigned int )AT91C_PA19_CANRX ), // Peripheral A - 0 ); // Peripheral B -} - -#endif // lib_AT91SAM7X256_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/system/crt0.s b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/system/crt0.s deleted file mode 100644 index 3488c5a5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/system/crt0.s +++ /dev/null @@ -1,232 +0,0 @@ -/***************************************************************************** - * Copyright (c) 2001, 2002 Rowley Associates Limited. * - * * - * This file may be distributed under the terms of the License Agreement * - * provided with this software. * - * * - * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE * - * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. * - *****************************************************************************/ - -/***************************************************************************** - * Preprocessor Definitions - * ------------------------ - * APP_ENTRY_POINT - * - * Defines the application entry point function, if undefined this setting - * defaults to "main". - * - * INITIALIZE_STACKS - * - * If defined, the contents of the stacks will be initialized to a the - * value 0xCC. - * - * INITIALIZE_SECONDARY_SECTIONS - * - * If defined, the .text2, .data2 and .bss2 sections will be initialized. - * - * SUPERVISOR_START - * - * If defined, the application will start up in supervisor mode. If - * undefined the application will start up in system mode. - * - *****************************************************************************/ - - .section .init, "ax" - .code 32 - .align 4 - -#ifndef APP_ENTRY_POINT -#define APP_ENTRY_POINT main -#endif - - .weak _start - .global __start - .global __gccmain - .extern APP_ENTRY_POINT - .extern exit - -/***************************************************************************** - * Function : _start * - * Description : Main entry point and startup code for C system. * - *****************************************************************************/ -_start: -__start: - mrs r0, cpsr - bic r0, r0, #0x1F - - /* Setup stacks */ - orr r1, r0, #0x1B /* Undefined mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_und_end__ - - orr r1, r0, #0x17 /* Abort mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_abt_end__ - - orr r1, r0, #0x12 /* IRQ mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_irq_end__ - - orr r1, r0, #0x11 /* FIQ mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_fiq_end__ - - orr r1, r0, #0x13 /* Supervisor mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_svc_end__ -#ifdef SUPERVISOR_START - /* Start application in supervisor mode */ - ldr r1, =__stack_end__ /* Setup user/system mode stack */ - mov r2, sp - stmfd r2!, {r1} - ldmfd r2, {sp}^ -#else - /* Start application in system mode */ - orr r1, r0, #0x1F /* System mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_end__ -#endif - -#ifdef INITIALIZE_STACKS - mov r2, #0xCC - ldr r0, =__stack_und_start__ - ldr r1, =__stack_und_end__ - bl memory_set - ldr r0, =__stack_abt_start__ - ldr r1, =__stack_abt_end__ - bl memory_set - ldr r0, =__stack_irq_start__ - ldr r1, =__stack_irq_end__ - bl memory_set - ldr r0, =__stack_fiq_start__ - ldr r1, =__stack_fiq_end__ - bl memory_set - ldr r0, =__stack_svc_start__ - ldr r1, =__stack_svc_end__ - bl memory_set - ldr r0, =__stack_start__ - ldr r1, =__stack_end__ - bl memory_set -#endif - - /* Copy from initialised data section to data section (if necessary). */ - ldr r0, =__data_load_start__ - ldr r1, =__data_start__ - ldr r2, =__data_end__ - bl memory_copy - - /* Copy from initialised text section to text section (if necessary). */ - ldr r0, =__text_load_start__ - ldr r1, =__text_start__ - ldr r2, =__text_end__ - bl memory_copy - - /* Copy from initialised fast_text section to fast_text section (if necessary). */ - ldr r0, =__fast_load_start__ - ldr r1, =__fast_start__ - ldr r2, =__fast_end__ - bl memory_copy - - /* Zero the bss. */ - ldr r0, =__bss_start__ - ldr r1, =__bss_end__ - mov r2, #0 - bl memory_set - -#ifdef INITIALIZE_SECONDARY_SECTIONS - ldr r0, =__data2_load_start__ - ldr r1, =__data2_start__ - ldr r2, =__data2_end__ - bl memory_copy - - /* Copy from initialised text2 section to text2 section (if necessary). */ - ldr r0, =__text2_load_start__ - ldr r1, =__text2_start__ - ldr r2, =__text2_end__ - bl memory_copy - - /* Zero bss2. */ - ldr r0, =__bss2_start__ - ldr r1, =__bss2_end__ - mov r2, #0 - bl memory_set - -#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */ - - /* Initialise the heap */ - ldr r0, = __heap_start__ - ldr r1, = __heap_end__ - sub r1, r1, r0 /* r1 = r1-r0 */ - mov r2, #0 - str r2, [r0], #+4 /* *r0++ = 0 */ - str r1, [r0] /* *r0 = __heap_end__ - __heap_start__ */ - - /* Call constructors */ - ldr r0, =__ctors_start__ - ldr r1, =__ctors_end__ -ctor_loop: - cmp r0, r1 - beq ctor_end - ldr r2, [r0], #+4 - stmfd sp!, {r0-r1} - mov lr, pc - mov pc, r2 - ldmfd sp!, {r0-r1} - b ctor_loop -ctor_end: - - /* Setup initial call frame */ - mov lr, #4 - mov r12, sp - stmfd sp!, {r11-r12, lr-pc} - sub r11, r12, #0x00000004 - -start: - /* Jump to application entry point */ - mov r0, #0 - mov r1, #0 - ldr r2, =APP_ENTRY_POINT - mov lr, pc -#ifdef __ARM_ARCH_3__ - mov pc, r2 -#else - bx r2 -#endif - - /* Call destructors */ - ldr r0, =__dtors_start__ - ldr r1, =__dtors_end__ -dtor_loop: - cmp r0, r1 - beq dtor_end - ldr r2, [r0], #+4 - stmfd sp!, {r0-r1} - mov lr, pc - mov pc, r2 - ldmfd sp!, {r0-r1} - b dtor_loop -dtor_end: - - /* Returned from application entry point, loop forever. */ -exit_loop: - b exit_loop - -memory_copy: - cmp r0, r1 - moveq pc, lr - subs r2, r2, r1 - moveq pc, lr -1: - ldrb r3, [r0], #+1 - strb r3, [r1], #+1 - subs r2, r2, #1 - bne 1b - mov pc, lr - -memory_set: - cmp r0, r1 - moveq pc, lr - strb r2, [r0], #1 - b memory_set - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/system/startup.s b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/system/startup.s deleted file mode 100644 index ce619a06..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AT91SAM7X_ROWLEY/system/startup.s +++ /dev/null @@ -1,236 +0,0 @@ -/***************************************************************************** - Exception handlers and startup code for Atmel AT91SAM7. - - Copyright (c) 2004 Rowley Associates Limited. - - This file may be distributed under the terms of the License Agreement - provided with this software. - - THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE - WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - *****************************************************************************/ - -/***************************************************************************** - * Preprocessor Definitions - * ------------------------ - * - * VECTORED_IRQ_INTERRUPTS - * - * Enable vectored IRQ interrupts. If defined, the PC register will be loaded - * with the contents of the AIC_IVR register on an IRQ exception. - * - * STARTUP_FROM_RESET - * - * If defined, the program will startup from power-on/reset. If not defined - * the program will just loop endlessly from power-on/reset. - * - * This definition is not defined by default on this target because the - * debugger is unable to reset this target and maintain control of it over the - * JTAG interface. The advantage of doing this is that it allows the debugger - * to reset the CPU and run programs from a known reset CPU state on each run. - * It also acts as a safety net if you accidently download a program in FLASH - * that crashes and prevents the debugger from taking control over JTAG - * rendering the target unusable over JTAG. The obvious disadvantage of doing - * this is that your application will not startup without the debugger. - * - * We advise that on this target you keep STARTUP_FROM_RESET undefined whilst - * you are developing and only define STARTUP_FROM_RESET when development is - * complete. - * - * MC_FMR_FMCN_VAL - * - * Override the default Flash Mode Register FMCN value by defining - * MC_FMR_FMCN_VAL. - * - * MC_FMR_FWS_VAL - * - * Override the default Flash Mode Register FWS value by defining - * MC_FMR_FWS_VAL. - * - * CKGR_MOR_VAL - * - * Override the default Main Oscillator Register value by defining - * CKGR_MOR_VAL. - * - * CKGR_PLLR_VAL - * - * Override the default Clock Generator PLL Register value by defining - * CKGR_PLLR_VAL. - * - * NO_WATCHDOG_DISABLE - * - * If defined, the watchdog will not be disabled. - * - * NO_USER_RESET - * - * If defined, user reset will not be enabled. - * - * NO_PROTECTION_MODE - * - * If defined, AIC protection mode will not be enabled. AIC protection - * mode allows the AIC_IVR register to be accessed by the debugger (for - * example through the memory or register window). With protection mode - * disabled accesses of the AIC_IVR register by the debugger are likely - * to disrupt interrupt behaviour. - * - *****************************************************************************/ - -#include - -#ifndef MC_FMR_FMCN_VAL -#define MC_FMR_FMCN_VAL 72 -#endif - -#ifndef MC_FMR_FWS_VAL -#define MC_FMR_FWS_VAL 1 -#endif - -#ifndef CKGR_MOR_VAL -#define CKGR_MOR_VAL (0x40 << CKGR_MOR_OSCOUNT_BIT) | CKGR_MOR_MOSCEN -#endif - -#ifndef CKGR_PLLR_VAL -#if OSCILLATOR_CLOCK_FREQUENCY==18432000 -/* MCK, UDPCK = 18.432MHz * 73 / 14 / 2 = 48.05486MHz */ -#define CKGR_PLLR_VAL (1 << CKGR_PLLR_USBDIV_BIT) | (72 << CKGR_PLLR_MUL_BIT) | (0 << CKGR_PLLR_OUT_BIT) | (63 << CKGR_PLLR_PLLCOUNT_BIT) | (14 << CKGR_PLLR_DIV_BIT) -#else -#error OSCILLATOR_CLOCK_FREQUENCY not supported -#endif -#endif - - .section .vectors, "ax" - .code 32 - .align 0 - .global _vectors - .global reset_handler - -/***************************************************************************** - Exception Vectors - *****************************************************************************/ -_vectors: -#ifdef STARTUP_FROM_RESET - ldr pc, [pc, #reset_handler_address - . - 8] /* reset */ -#else - b . /* reset - infinite loop */ -#endif - ldr pc, [pc, #undef_handler_address - . - 8] /* undefined instruction */ - ldr pc, [pc, #swi_handler_address - . - 8] /* swi handler */ - ldr pc, [pc, #pabort_handler_address - . - 8] /* abort prefetch */ - ldr pc, [pc, #dabort_handler_address - . - 8] /* abort data */ - nop - ldr pc, [pc, #-0xF20] /* irq */ - ldr pc, [pc, #fiq_handler_address - . - 8] /* fiq */ - -reset_handler_address: - .word reset_handler -undef_handler_address: - .word undef_handler -swi_handler_address: - .word swi_handler -pabort_handler_address: - .word pabort_handler -dabort_handler_address: - .word dabort_handler -irq_handler_address: - .word irq_handler -fiq_handler_address: - .word fiq_handler - - .section .init, "ax" - .code 32 - .align 0 - -/****************************************************************************** - Reset handler - ******************************************************************************/ -reset_handler: - /* Set up FLASH wait state */ - ldr r1, =MC_BASE - ldr r0, =(MC_FMR_FMCN_VAL << MC_FMR_FMCN_BIT) | (MC_FMR_FWS_VAL << MC_FMR_FWS_BIT) - str r0, [r1, #MC_FMR_OFFSET] - - /* Disable Watchdog */ - ldr r1, =WDT_BASE - ldr r0, =WDT_MR_WDDIS - str r0, [r1, #WDT_MR_OFFSET] - -#ifndef NO_PROTECTION_MODE - /* Enable protect mode */ - ldr r1, =AIC_BASE - ldr r0, =0x00000001 - str r0, [r1, #AIC_DCR_OFFSET] -#endif - - /* Enable the main oscillator */ - ldr r1, =PMC_BASE - ldr r0, =CKGR_MOR_VAL - str r0, [r1, #CKGR_MOR_OFFSET] - -1:/* Wait for main oscillator to stabilize */ - ldr r0, [r1, #PMC_SR_OFFSET] - tst r0, #PMC_SR_MOSCS - beq 1b - - /* Set up the PLL */ - ldr r0, =CKGR_PLLR_VAL - str r0, [r1, #CKGR_PLLR_OFFSET] - -1:/* Wait for PLL to lock */ - ldr r0, [r1, #PMC_SR_OFFSET] - tst r0, #PMC_SR_LOCK - beq 1b - - /* Set the master clock prescaler */ - ldr r0, =(1 << PMC_MCKR_PRES_BIT) - str r0, [r1, #PMC_MCKR_OFFSET] - -1:/* Wait for MCKRDY */ - ldr r0, [r1, #PMC_SR_OFFSET] - tst r0, #PMC_SR_MCKRDY - beq 1b - - /* Select PLL as clock source */ - ldr r0, =((1 << PMC_MCKR_PRES_BIT) | 3 << PMC_MCKR_CSS_BIT) - str r0, [r1, #PMC_MCKR_OFFSET] - -#ifdef __FLASH_BUILD - /* Copy exception vectors into Internal SRAM */ - mov r8, #0x00200000 - ldr r9, =_vectors - ldmia r9!, {r0-r7} - stmia r8!, {r0-r7} - ldmia r9!, {r0-r6} - stmia r8!, {r0-r6} - - /* Remap Internal SRAM to 0x00000000 */ - ldr r1, =MC_BASE - ldr r0, =1 - strb r0, [r1, #MC_RCR_OFFSET] -#endif - - /* Jump to the default C runtime startup code. */ - b _start - -/****************************************************************************** - Default exception handlers - (These are declared weak symbols so they can be redefined in user code) - ******************************************************************************/ -undef_handler: - b . /* Endless loop */ - -swi_handler: - b . /* Endless loop */ - -pabort_handler: - b . /* Endless loop */ - -dabort_handler: - b . /* Endless loop */ - -irq_handler: - b . /* Endless loop */ - -fiq_handler: - b . /* Endless loop */ - - .weak undef_handler, swi_handler, pabort_handler, dabort_handler, irq_handler, fiq_handler diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/README.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/README.txt deleted file mode 100644 index 49e53ec6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/README.txt +++ /dev/null @@ -1,68 +0,0 @@ - - FREEMODBUS 1.5 ATSAM3S EXAMPLE - ============================== - -REQUIREMENTS -============ - -This example contains a simple demo program for FreeMODBUS for the AT91SAM3S -Cortex M3 controllers on the SAM3S-EK [0] evaluation kit. It requires a wired -RS485 connection to a host processor and a MODBUS master software on the PC -side to be useful. Demo versions of MODBUS master stacks can be found in -[1], [2] and [3]. Commercial MODBUS stacks are available from [4]. - -INSTALLATION -============ -The SAM3S-EK evaluation board should be modified as following to enable RS485 -data transmission. - - - Place Jumpers JP11, JP10 and JP12 - - Place a solder drop accross R25 - -Warning: The RS485 shares data lines with USART1. It is therefore absolutely -necessary to set PA23 to a high level. - -SOURCE -====== - -TESTING -======= - -Start the MODBUS sample application and test if the input registers starting -at protocol address 1000 can be read. There are four registers values avai- -lable and the output should look like: - -Polling slave (Ctrl-C to stop) ... -[1000]: 6474 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... -[1000]: -8831 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... - -The simple testing utility used in the 'demo_rtu.bat' script can be found at -[3]. - -PROBLEMS -======== - -In case you can get no communication working make sure that the RS485 line is -biased correctly. The SAM3S-EK does not populate the RS485 bias resistors by -default and if you have a RS485 master which does not bias the lines either -you will get wrong characters. For this R24 and R30 on the bottom side of the -evaluation kit of the PCB should be populated. - -REFERENCES -========== - -[0] Atmel SAM3S-EK: http://www.atmel.com/dyn/products/tools_card_v2.asp?tool_id=4678 -[1] WinTech ModScan32: http://www.win-tech.com/html/modscan32.htm -[2] Modus Poll: http://www.modbustools.com/modbus_poll.asp -[3] FieldTalk Modpoll: http://www.focus-sw.com/fieldtalk/modpoll.html -[4] Embedded Solutions: http://www.embedded-solutions.at - -Version: $Id: README.txt,v 1.1 2010/06/05 09:57:46 wolti Exp $ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/AT91SAM3S4.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/AT91SAM3S4.h deleted file mode 100644 index a11e72a3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/AT91SAM3S4.h +++ /dev/null @@ -1,7010 +0,0 @@ -/* ---------------------------------------------------------------------------- */ -/* Atmel Microcontroller Software Support */ -/* ---------------------------------------------------------------------------- */ -/* Copyright (c) 2009, Atmel Corporation */ -/* */ -/* All rights reserved. */ -/* */ -/* Redistribution and use in source and binary forms, with or without */ -/* modification, are permitted provided that the following condition is met: */ -/* */ -/* - Redistributions of source code must retain the above copyright notice, */ -/* this list of conditions and the disclaimer below. */ -/* */ -/* Atmel's name may not be used to endorse or promote products derived from */ -/* this software without specific prior written permission. */ -/* */ -/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ -/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ -/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ -/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ -/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ -/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ -/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ -/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ -/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ -/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* ---------------------------------------------------------------------------- */ -/* */ -/* File Name : AT91SAM3S.h */ -/* Object : AT91SAM3S definitions */ -/* Generated by : AT91 SW Application Group */ -/* Generated on : 2009-10-26 */ - -#ifndef AT91SAM3S_H -#define AT91SAM3S_H - -/** \addtogroup AT91SAM3S_definitions AT91SAM3S definitions - This file defines all structures and symbols for AT91SAM3S: - - registers and bitfields - - peripheral base address - - peripheral ID - - PIO definitions -*/ -/*@{*/ - -#ifdef __cplusplus - extern "C" { -#endif - -#ifndef __ASSEMBLY__ -#include -#ifndef __cplusplus -typedef volatile const uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */ -#else -typedef volatile uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */ -#endif -typedef volatile uint32_t WoReg; /**< Write only 32-bit register (volatile unsigned int) */ -typedef volatile uint32_t RwReg; /**< Read-Write 32-bit register (volatile unsigned int) */ -#define CAST(type, value) ((type *) value) -#define REG_ACCESS(type, address) (*(type*)address) /**< C code: Register value */ -#else -#define CAST(type, value) (value) -#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */ -#endif - -/* ***************************************************************************** */ -/* CMSIS DEFINITIONS FOR AT91SAM3S */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3S_cmsis CMSIS Definitions */ - -/*@{*/ - -/** - * \brief Configuration of the Cortex-M3 Processor and Core Peripherals - */ -#define __MPU_PRESENT 0 /**< AT91SAM3S does not provide a MPU present or not */ -#define __NVIC_PRIO_BITS 4 /**< AT91SAM3S uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /**< Set to 1 if different SysTick Config is used */ - -/**< Interrupt Number Definition */ -typedef enum IRQn -{ -/****** Cortex-M3 Processor Exceptions Numbers ***************************************/ - NonMaskableInt_IRQn = -14, /**< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /**< 4 Cortex-M3 Memory Management Interrupt */ - BusFault_IRQn = -11, /**< 5 Cortex-M3 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /**< 6 Cortex-M3 Usage Fault Interrupt */ - SVCall_IRQn = -5, /**< 11 Cortex-M3 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /**< 12 Cortex-M3 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /**< 14 Cortex-M3 Pend SV Interrupt */ - SysTick_IRQn = -1, /**< 15 Cortex-M3 System Tick Interrupt */ -/****** AT91SAM3S specific Interrupt Numbers *****************************************/ - - SUPC_IRQn = 0, /**< 0 AT91SAM3S Supply Controller (SUPC) */ - RSTC_IRQn = 1, /**< 1 AT91SAM3S Reset Controller (RSTC) */ - RTC_IRQn = 2, /**< 2 AT91SAM3S Real Time Clock (RTC) */ - RTT_IRQn = 3, /**< 3 AT91SAM3S Real Time Timer (RTT) */ - WDT_IRQn = 4, /**< 4 AT91SAM3S Watchdog Timer (WDT) */ - PMC_IRQn = 5, /**< 5 AT91SAM3S Power Management Controller (PMC) */ - EFC_IRQn = 6, /**< 6 AT91SAM3S Enhanced Flash Controller (EFC) */ - UART0_IRQn = 8, /**< 8 AT91SAM3S UART 0 (UART0) */ - UART1_IRQn = 9, /**< 9 AT91SAM3S UART 1 (UART1) */ - SMC_IRQn = 10, /**< 10 AT91SAM3S Static Memory Controller (SMC) */ - PIOA_IRQn = 11, /**< 11 AT91SAM3S Parallel I/O Controller A (PIOA) */ - PIOB_IRQn = 12, /**< 12 AT91SAM3S Parallel I/O Controller B (PIOB) */ - PIOC_IRQn = 13, /**< 13 AT91SAM3S Parallel I/O Controller C (PIOC) */ - USART0_IRQn = 14, /**< 14 AT91SAM3S USART 0 (USART0) */ - USART1_IRQn = 15, /**< 15 AT91SAM3S USART 1 (USART1) */ - HSMCI_IRQn = 18, /**< 18 AT91SAM3S Multimedia Card Interface (HSMCI) */ - TWI0_IRQn = 19, /**< 19 AT91SAM3S Two Wire Interface 0 (TWI0) */ - TWI1_IRQn = 20, /**< 20 AT91SAM3S Two Wire Interface 1 (TWI1) */ - SPI_IRQn = 21, /**< 21 AT91SAM3S Serial Peripheral Interface (SPI) */ - SSC_IRQn = 22, /**< 22 AT91SAM3S Synchronous Serial Controler (SSC) */ - TC0_IRQn = 23, /**< 23 AT91SAM3S Timer/Counter 0 (TC0) */ - TC1_IRQn = 24, /**< 24 AT91SAM3S Timer/Counter 1 (TC1) */ - TC2_IRQn = 25, /**< 25 AT91SAM3S Timer/Counter 2 (TC2) */ - TC3_IRQn = 26, /**< 26 AT91SAM3S Timer/Counter 3 (TC3) */ - TC4_IRQn = 27, /**< 27 AT91SAM3S Timer/Counter 4 (TC4) */ - TC5_IRQn = 28, /**< 28 AT91SAM3S Timer/Counter 5 (TC5) */ - ADC_IRQn = 29, /**< 29 AT91SAM3S Analog To Digital Converter (ADC) */ - DACC_IRQn = 30, /**< 30 AT91SAM3S Digital To Analog Converter (DACC) */ - PWM_IRQn = 31, /**< 31 AT91SAM3S Pulse Width Modulation (PWM) */ - CRCCU_IRQn = 32, /**< 32 AT91SAM3S CRC Calculation Unit (CRCCU) */ - ACC_IRQn = 33, /**< 33 AT91SAM3S Analog Comparator (ACC) */ - UDP_IRQn = 34 /**< 34 AT91SAM3S USB Device Port (UDP) */ -} IRQn_Type; -/*@}*/ - -/* ***************************************************************************** */ -/** SOFTWARE PERIPHERAL API DEFINITION FOR AT91SAM3S */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3S_api Peripheral Software API */ -/*@{*/ -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Analog Comparator Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_ACC Analog Comparator Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Acc hardware registers */ -typedef struct { - WoReg ACC_CR; /**< \brief (Acc Offset: 0x00) Control Register */ - RwReg ACC_MR; /**< \brief (Acc Offset: 0x04) Mode Register */ - RwReg Reserved1[7]; - WoReg ACC_IER; /**< \brief (Acc Offset: 0x24) Interrupt Enable Register */ - WoReg ACC_IDR; /**< \brief (Acc Offset: 0x28) Interrupt Disable Register */ - RoReg ACC_IMR; /**< \brief (Acc Offset: 0x2C) Interrupt Mask Register */ - RoReg ACC_ISR; /**< \brief (Acc Offset: 0x30) Interrupt Status Register */ - RwReg Reserved2[24]; - RwReg ACC_ACR; /**< \brief (Acc Offset: 0x94) Analog Control Register */ - RwReg Reserved3[19]; - RwReg ACC_WPMR; /**< \brief (Acc Offset: 0xE4) Write Protect Mode Register */ - RoReg ACC_WPSR; /**< \brief (Acc Offset: 0xE8) Write Protect Status Register */ -} Acc; -#endif /* __ASSEMBLY__ */ -/* -------- ACC_CR : (ACC Offset: 0x00) Control Register -------- */ -#define ACC_CR_SWRST (0x1 << 0) /**< \brief (ACC_CR) SoftWare ReSeT */ -/* -------- ACC_MR : (ACC Offset: 0x04) Mode Register -------- */ -#define ACC_MR_SELPLUS (0x7 << 0) /**< \brief (ACC_MR) SELection for PLUS comparator input */ -#define ACC_MR_SELMINUS (0x7 << 4) /**< \brief (ACC_MR) SELection for MINUS comparator input */ -#define ACC_MR_ACEN (0x1 << 8) /**< \brief (ACC_MR) Analog Comparator ENable */ -#define ACC_MR_ACEN_EN (0x1 << 8) /**< \brief (ACC_MR) Analog Comparator ENable */ -#define ACC_MR_ACEN_DIS (0x0 << 8) /**< \brief (ACC_MR) Analog Comparator Disable */ -#define ACC_MR_EDGETYP (0x3 << 9) /**< \brief (ACC_MR) EDGE TYPe */ -#define ACC_MR_EDGETYP_RISING (0x0 << 9) /**< \brief (ACC_MR) EDGE TYPe ,RISING edge*/ -#define ACC_MR_EDGETYP_FALLING (0x1 << 9) /**< \brief (ACC_MR) EDGE TYPe,falling edge */ -#define ACC_MR_EDGETYP_ANY (0x2 << 9) /**< \brief (ACC_MR) EDGE TYPe,any edge */ -#define ACC_MR_INV (0x1 << 12) /**< \brief (ACC_MR) INVert comparator output */ -#define ACC_MR_INV_EN (0x1 << 12) /**< \brief (ACC_MR) INVert comparator output */ -#define ACC_MR_INV_DIS (0x0 << 12) /**< \brief (ACC_MR) DIRECTLY */ -#define ACC_MR_SELFS (0x1 << 13) /**< \brief (ACC_MR) SELection of Fault Source */ -#define ACC_MR_SELFS_CF (0x0 << 13) /**< \brief (ACC_MR) SELection of Fault Source */ -#define ACC_MR_SELFS_OUTPUT (0x1 << 13) /**< \brief (ACC_MR) SELection of Fault Source */ -#define ACC_MR_FE (0x1 << 14) /**< \brief (ACC_MR) Fault Enable */ -#define ACC_MR_FE_EN (0x1 << 14) /**< \brief (ACC_MR) Fault Enable */ -#define ACC_MR_FE_DIS (0x0 << 14) /**< \brief (ACC_MR) Fault Enable */ -/* -------- ACC_IER : (ACC Offset: 0x24) Interrupt Enable Register -------- */ -#define ACC_IER_CE (0x1 << 0) /**< \brief (ACC_IER) Comparison Edge */ -/* -------- ACC_IDR : (ACC Offset: 0x28) Interrupt Disable Register -------- */ -#define ACC_IDR_CE (0x1 << 0) /**< \brief (ACC_IDR) Comparison Edge */ -/* -------- ACC_IMR : (ACC Offset: 0x2C) Interrupt Mask Register -------- */ -#define ACC_IMR_CE (0x1 << 0) /**< \brief (ACC_IMR) Comparison Edge */ -/* -------- ACC_ISR : (ACC Offset: 0x30) Interrupt Status Register -------- */ -#define ACC_ISR_CE (0x1 << 0) /**< \brief (ACC_ISR) Comparison Edge */ -#define ACC_ISR_SCO (0x1 << 1) /**< \brief (ACC_ISR) Synchronized Comparator Output */ -#define ACC_ISR_MASK (0x1 << 31) /**< \brief (ACC_ISR) */ -/* -------- ACC_ACR : (ACC Offset: 0x94) Analog Control Register -------- */ -#define ACC_ACR_ISEL (0x1 << 0) /**< \brief (ACC_ACR) Current SELection */ -#define ACC_ACR_HYST (0x3 << 1) /**< \brief (ACC_ACR) HYSTeresis selection */ -/* -------- ACC_WPMR : (ACC Offset: 0xE4) Write Protect Mode Register -------- */ -#define ACC_WPMR_WPEN (0x1 << 0) /**< \brief (ACC_WPMR) Write Protect Enable */ -#define ACC_WPMR_WPKEY (0xffffff << 8) /**< \brief (ACC_WPMR) Write Protect KEY */ -/* -------- ACC_WPSR : (ACC Offset: 0xE8) Write Protect Status Register -------- */ -#define ACC_WPSR_WPROTERR (0x1 << 0) /**< \brief (ACC_WPSR) Write PROTection ERRor */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Analog-to-digital Converter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_ADC Analog-to-digital Converter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Adc hardware registers */ -typedef struct { - WoReg ADC_CR; /**< \brief (Adc Offset: 0x00) Control Register */ - RwReg ADC_MR; /**< \brief (Adc Offset: 0x04) Mode Register */ - RwReg ADC_SEQ1R; /**< \brief (Adc Offset: 0x08) Channel Sequence 1Register */ - RwReg ADC_SEQ2R; /**< \brief (Adc Offset: 0x0C) Channel Sequence 2 Register */ - WoReg ADC_CHER; /**< \brief (Adc Offset: 0x10) Channel Enable Register */ - WoReg ADC_CHDR; /**< \brief (Adc Offset: 0x14) Channel Disable Register */ - RoReg ADC_CHSR; /**< \brief (Adc Offset: 0x18) Channel Status Register */ - RwReg Reserved1[1]; - RoReg ADC_LCDR; /**< \brief (Adc Offset: 0x20) Last Converted Data Register */ - WoReg ADC_IER; /**< \brief (Adc Offset: 0x24) Interrupt Enable Register */ - WoReg ADC_IDR; /**< \brief (Adc Offset: 0x28) Interrupt Disable Register */ - RoReg ADC_IMR; /**< \brief (Adc Offset: 0x2C) Interrupt Mask Register */ - RoReg ADC_ISR; /**< \brief (Adc Offset: 0x30) Interrupt Status Register */ - RwReg Reserved2[2]; - RoReg ADC_OVER; /**< \brief (Adc Offset: 0x3C) Overrun Status Register */ - RwReg ADC_EMR; /**< \brief (Adc Offset: 0x40) Extended Mode Register */ - RwReg ADC_CWR; /**< \brief (Adc Offset: 0x44) Compare Window Register */ - RwReg ADC_CGR; /**< \brief (Adc Offset: 0x48) Channel Gain Register */ - RwReg ADC_COR; /**< \brief (Adc Offset: 0x4C) Channel Offset Register */ - RoReg ADC_CDR0; /**< \brief (Adc Offset: 0x50) Channel Data Register 0 */ - RoReg ADC_CDR1; /**< \brief (Adc Offset: 0x54) Channel Data Register 1 */ - RoReg ADC_CDR2; /**< \brief (Adc Offset: 0x58) Channel Data Register 2 */ - RoReg ADC_CDR3; /**< \brief (Adc Offset: 0x5C) Channel Data Register 3 */ - RoReg ADC_CDR4; /**< \brief (Adc Offset: 0x60) Channel Data Register 4 */ - RoReg ADC_CDR5; /**< \brief (Adc Offset: 0x64) Channel Data Register 5 */ - RoReg ADC_CDR6; /**< \brief (Adc Offset: 0x68) Channel Data Register 6 */ - RoReg ADC_CDR7; /**< \brief (Adc Offset: 0x6C) Channel Data Register 7 */ - RoReg ADC_CDR8; /**< \brief (Adc Offset: 0x70) Channel Data Register 8 */ - RoReg ADC_CDR9; /**< \brief (Adc Offset: 0x74) Channel Data Register 9 */ - RoReg ADC_CDR10; /**< \brief (Adc Offset: 0x78) Channel Data Register 10 */ - RoReg ADC_CDR11; /**< \brief (Adc Offset: 0x7C) Channel Data Register 11 */ - RoReg ADC_CDR12; /**< \brief (Adc Offset: 0x80) Channel Data Register 12 */ - RoReg ADC_CDR13; /**< \brief (Adc Offset: 0x84) Channel Data Register 13 */ - RoReg ADC_CDR14; /**< \brief (Adc Offset: 0x88) Channel Data Register 14 */ - RoReg ADC_CDR15; /**< \brief (Adc Offset: 0x8C) Channel Data Register 15 */ - RwReg Reserved3[1]; - RwReg ADC_ACR; /**< \brief (Adc Offset: 0x94) Analog Control Register */ - RwReg Reserved4[19]; - RwReg ADC_WPMR; /**< \brief (Adc Offset: 0xE4) Write Protect Mode Register */ - RoReg ADC_WPSR; /**< \brief (Adc Offset: 0xE8) Write Protect Status Register */ - RwReg Reserved5[5]; - RwReg ADC_RPR; /**< \brief (Adc Offset: 0x100) Receive Pointer Register */ - RwReg ADC_RCR; /**< \brief (Adc Offset: 0x104) Receive Counter Register */ - RwReg ADC_TPR; /**< \brief (Adc Offset: 0x108) Transmit Pointer Register */ - RwReg ADC_TCR; /**< \brief (Adc Offset: 0x10C) Transmit Counter Register */ - RwReg ADC_RNPR; /**< \brief (Adc Offset: 0x110) Receive Next Pointer Register */ - RwReg ADC_RNCR; /**< \brief (Adc Offset: 0x114) Receive Next Counter Register */ - RwReg ADC_TNPR; /**< \brief (Adc Offset: 0x118) Transmit Next Pointer Register */ - RwReg ADC_TNCR; /**< \brief (Adc Offset: 0x11C) Transmit Next Counter Register */ - WoReg ADC_PTCR; /**< \brief (Adc Offset: 0x120) Transfer Control Register */ - RoReg ADC_PTSR; /**< \brief (Adc Offset: 0x124) Transfer Status Register */ -} Adc; -#endif /* __ASSEMBLY__ */ -/* -------- ADC_CR : (ADC Offset: 0x00) Control Register -------- */ -#define ADC_CR_SWRST (0x1 << 0) /**< \brief (ADC_CR) Software Reset */ -#define ADC_CR_START (0x1 << 1) /**< \brief (ADC_CR) Start Conversion */ -/* -------- ADC_MR : (ADC Offset: 0x04) Mode Register -------- */ -#define ADC_MR_TRGEN (0x1 << 0) /**< \brief (ADC_MR) Trigger Enable */ -#define ADC_MR_TRGEN_DIS (0x0 << 0) /**< \brief (ADC_MR) Hardware triggers are disabled. Starting a conversion is only possible by software.*/ -#define ADC_MR_TRGEN_EN (0x1) /**< (ADC) Hardware trigger selected by TRGSEL field is enabled.*/ -#define ADC_MR_TRGSEL (0x7 << 1) /**< \brief (ADC_MR) Trigger Selection */ -#define ADC_MR_TRGSEL_EXT (0x0 << 1) /**< \brief (ADC_MR) Selected TRGSEL = External Trigger*/ -#define ADC_MR_TRGSEL_TIOA0 (0x1 << 1) /**< \brief (ADC_MR) Selected TRGSEL = TIAO0*/ -#define ADC_MR_TRGSEL_TIOA1 (0x2 << 1) /**< \brief (ADC_MR) Selected TRGSEL = TIAO1*/ -#define ADC_MR_TRGSEL_TIOA2 (0x3 << 1) /**< \brief (ADC_MR) Selected TRGSEL = TIAO2*/ -#define ADC_MR_TRGSEL_PWM0_TRIG (0x4 << 1) /**< \brief (ADC_MR) Selected TRGSEL = PWM trigger*/ -#define ADC_MR_TRGSEL_PWM1_TRIG (0x5 << 1) /**< \brief (ADC_MR) Selected TRGSEL = PWM Trigger*/ -#define ADC_MR_TRGSEL_RESERVED (0x6 << 1) /**< \brief (ADC_MR) Selected TRGSEL = Reserved*/ -#define ADC_MR_LOWRES (0x1 << 4) /**< \brief (ADC_MR) Resolution */ -#define ADC_MR_LOWRES_12_BIT (0x0 << 4) /**< \brief (ADC_MR) 12-bit resolution*/ -#define ADC_MR_LOWRES_10_BIT (0x1 << 4) /**< \brief (ADC_MR) 10-bit resolution*/ -#define ADC_MR_SLEEP (0x1 << 5) /**< \brief (ADC_MR) Sleep Mode */ -#define ADC_MR_SLEEP_NORMAL (0x0 << 5) /**< \brief (ADC12B) Normal Mode*/ -#define ADC_MR_FWUP (0x1 << 6) /**< \brief (ADC_MR) Fast Wake Up */ -#define ADC_MR_FREERUN (0x1 << 7) /**< \brief (ADC_MR) Free Run Mode */ -#define ADC_MR_PRESCAL (0xff << 8) /**< \brief (ADC_MR) Prescaler Rate Selection */ -#define ADC_MR_STARTUP (0xf << 16) /**< \brief (ADC_MR) Start Up Time */ -#define ADC_MR_SETTLING (0x3 << 20) /**< \brief (ADC_MR) Analog Settling Time */ -#define ADC_MR_ANACH (0x1 << 23) /**< \brief (ADC_MR) Analog Change */ -#define ADC_MR_TRACKTIM (0xf << 24) /**< \brief (ADC_MR) Tracking Time */ -#define ADC_MR_TRANSFER (0x3 << 28) /**< \brief (ADC_MR) */ -#define ADC_MR_USEQ (0x1 << 31) /**< \brief (ADC_MR) User Sequence Enable */ -/* -------- ADC_SEQ1R : (ADC Offset: 0x08) Channel Sequence 1Register -------- */ -#define ADC_SEQ1R_USCH1 (0x7 << 0) /**< \brief (ADC_SEQ1R) User Sequence Number 1 */ -#define ADC_SEQ1R_USCH2 (0x7 << 4) /**< \brief (ADC_SEQ1R) User Sequence Number 2 */ -#define ADC_SEQ1R_USCH3 (0x7 << 8) /**< \brief (ADC_SEQ1R) User Sequence Number 3 */ -#define ADC_SEQ1R_USCH4 (0x7 << 12) /**< \brief (ADC_SEQ1R) User Sequence Number 4 */ -#define ADC_SEQ1R_USCH5 (0x7 << 16) /**< \brief (ADC_SEQ1R) User Sequence Number 5 */ -#define ADC_SEQ1R_USCH6 (0x7 << 20) /**< \brief (ADC_SEQ1R) User Sequence Number 6 */ -#define ADC_SEQ1R_USCH7 (0x7 << 24) /**< \brief (ADC_SEQ1R) User Sequence Number 7 */ -#define ADC_SEQ1R_USCH8 (0x7 << 28) /**< \brief (ADC_SEQ1R) User Sequence Number 8 */ -/* -------- ADC_SEQ2R : (ADC Offset: 0x0C) Channel Sequence 2 Register -------- */ -#define ADC_SEQ2R_USCH9 (0x7 << 0) /**< \brief (ADC_SEQ2R) User Sequence Number 9 */ -#define ADC_SEQ2R_USCH10 (0x7 << 4) /**< \brief (ADC_SEQ2R) User Sequence Number 10 */ -#define ADC_SEQ2R_USCH11 (0x7 << 8) /**< \brief (ADC_SEQ2R) User Sequence Number 11 */ -#define ADC_SEQ2R_USCH12 (0x7 << 12) /**< \brief (ADC_SEQ2R) User Sequence Number 12 */ -#define ADC_SEQ2R_USCH13 (0x7 << 16) /**< \brief (ADC_SEQ2R) User Sequence Number 13 */ -#define ADC_SEQ2R_USCH14 (0x7 << 20) /**< \brief (ADC_SEQ2R) User Sequence Number 14 */ -#define ADC_SEQ2R_USCH15 (0x7 << 24) /**< \brief (ADC_SEQ2R) User Sequence Number 15 */ -#define ADC_SEQ2R_USCH16 (0x7 << 28) /**< \brief (ADC_SEQ2R) User Sequence Number 16 */ -/* -------- ADC_CHER : (ADC Offset: 0x10) Channel Enable Register -------- */ -#define ADC_CHER_CH0 (0x1 << 0) /**< \brief (ADC_CHER) Channel 0 Enable */ -#define ADC_CHER_CH1 (0x1 << 1) /**< \brief (ADC_CHER) Channel 1 Enable */ -#define ADC_CHER_CH2 (0x1 << 2) /**< \brief (ADC_CHER) Channel 2 Enable */ -#define ADC_CHER_CH3 (0x1 << 3) /**< \brief (ADC_CHER) Channel 3 Enable */ -#define ADC_CHER_CH4 (0x1 << 4) /**< \brief (ADC_CHER) Channel 4 Enable */ -#define ADC_CHER_CH5 (0x1 << 5) /**< \brief (ADC_CHER) Channel 5 Enable */ -#define ADC_CHER_CH6 (0x1 << 6) /**< \brief (ADC_CHER) Channel 6 Enable */ -#define ADC_CHER_CH7 (0x1 << 7) /**< \brief (ADC_CHER) Channel 7 Enable */ -#define ADC_CHER_CH8 (0x1 << 8) /**< \brief (ADC_CHER) Channel 8 Enable */ -#define ADC_CHER_CH9 (0x1 << 9) /**< \brief (ADC_CHER) Channel 9 Enable */ -#define ADC_CHER_CH10 (0x1 << 10) /**< \brief (ADC_CHER) Channel 10 Enable */ -#define ADC_CHER_CH11 (0x1 << 11) /**< \brief (ADC_CHER) Channel 11 Enable */ -#define ADC_CHER_CH12 (0x1 << 12) /**< \brief (ADC_CHER) Channel 12 Enable */ -#define ADC_CHER_CH13 (0x1 << 13) /**< \brief (ADC_CHER) Channel 13 Enable */ -#define ADC_CHER_CH14 (0x1 << 14) /**< \brief (ADC_CHER) Channel 14 Enable */ -#define ADC_CHER_CH15 (0x1 << 15) /**< \brief (ADC_CHER) Channel 15 Enable */ -/* -------- ADC_CHDR : (ADC Offset: 0x14) Channel Disable Register -------- */ -#define ADC_CHDR_CH0 (0x1 << 0) /**< \brief (ADC_CHDR) Channel 0 Disable */ -#define ADC_CHDR_CH1 (0x1 << 1) /**< \brief (ADC_CHDR) Channel 1 Disable */ -#define ADC_CHDR_CH2 (0x1 << 2) /**< \brief (ADC_CHDR) Channel 2 Disable */ -#define ADC_CHDR_CH3 (0x1 << 3) /**< \brief (ADC_CHDR) Channel 3 Disable */ -#define ADC_CHDR_CH4 (0x1 << 4) /**< \brief (ADC_CHDR) Channel 4 Disable */ -#define ADC_CHDR_CH5 (0x1 << 5) /**< \brief (ADC_CHDR) Channel 5 Disable */ -#define ADC_CHDR_CH6 (0x1 << 6) /**< \brief (ADC_CHDR) Channel 6 Disable */ -#define ADC_CHDR_CH7 (0x1 << 7) /**< \brief (ADC_CHDR) Channel 7 Disable */ -#define ADC_CHDR_CH8 (0x1 << 8) /**< \brief (ADC_CHDR) Channel 8 Disable */ -#define ADC_CHDR_CH9 (0x1 << 9) /**< \brief (ADC_CHDR) Channel 9 Disable */ -#define ADC_CHDR_CH10 (0x1 << 10) /**< \brief (ADC_CHDR) Channel 10 Disable */ -#define ADC_CHDR_CH11 (0x1 << 11) /**< \brief (ADC_CHDR) Channel 11 Disable */ -#define ADC_CHDR_CH12 (0x1 << 12) /**< \brief (ADC_CHDR) Channel 12 Disable */ -#define ADC_CHDR_CH13 (0x1 << 13) /**< \brief (ADC_CHDR) Channel 13 Disable */ -#define ADC_CHDR_CH14 (0x1 << 14) /**< \brief (ADC_CHDR) Channel 14 Disable */ -#define ADC_CHDR_CH15 (0x1 << 15) /**< \brief (ADC_CHDR) Channel 15 Disable */ -/* -------- ADC_CHSR : (ADC Offset: 0x18) Channel Status Register -------- */ -#define ADC_CHSR_CH0 (0x1 << 0) /**< \brief (ADC_CHSR) Channel 0 Status */ -#define ADC_CHSR_CH1 (0x1 << 1) /**< \brief (ADC_CHSR) Channel 1 Status */ -#define ADC_CHSR_CH2 (0x1 << 2) /**< \brief (ADC_CHSR) Channel 2 Status */ -#define ADC_CHSR_CH3 (0x1 << 3) /**< \brief (ADC_CHSR) Channel 3 Status */ -#define ADC_CHSR_CH4 (0x1 << 4) /**< \brief (ADC_CHSR) Channel 4 Status */ -#define ADC_CHSR_CH5 (0x1 << 5) /**< \brief (ADC_CHSR) Channel 5 Status */ -#define ADC_CHSR_CH6 (0x1 << 6) /**< \brief (ADC_CHSR) Channel 6 Status */ -#define ADC_CHSR_CH7 (0x1 << 7) /**< \brief (ADC_CHSR) Channel 7 Status */ -#define ADC_CHSR_CH8 (0x1 << 8) /**< \brief (ADC_CHSR) Channel 8 Status */ -#define ADC_CHSR_CH9 (0x1 << 9) /**< \brief (ADC_CHSR) Channel 9 Status */ -#define ADC_CHSR_CH10 (0x1 << 10) /**< \brief (ADC_CHSR) Channel 10 Status */ -#define ADC_CHSR_CH11 (0x1 << 11) /**< \brief (ADC_CHSR) Channel 11 Status */ -#define ADC_CHSR_CH12 (0x1 << 12) /**< \brief (ADC_CHSR) Channel 12 Status */ -#define ADC_CHSR_CH13 (0x1 << 13) /**< \brief (ADC_CHSR) Channel 13 Status */ -#define ADC_CHSR_CH14 (0x1 << 14) /**< \brief (ADC_CHSR) Channel 14 Status */ -#define ADC_CHSR_CH15 (0x1 << 15) /**< \brief (ADC_CHSR) Channel 15 Status */ -/* -------- ADC_LCDR : (ADC Offset: 0x20) Last Converted Data Register -------- */ -#define ADC_LCDR_LDATA (0xfff << 0) /**< \brief (ADC_LCDR) Last Data Converted */ -#define ADC_LCDR_CHNB (0xf << 12) /**< \brief (ADC_LCDR) Channel Number */ -/* -------- ADC_IER : (ADC Offset: 0x24) Interrupt Enable Register -------- */ -#define ADC_IER_EOC0 (0x1 << 0) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 0 */ -#define ADC_IER_EOC1 (0x1 << 1) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 1 */ -#define ADC_IER_EOC2 (0x1 << 2) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 2 */ -#define ADC_IER_EOC3 (0x1 << 3) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 3 */ -#define ADC_IER_EOC4 (0x1 << 4) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 4 */ -#define ADC_IER_EOC5 (0x1 << 5) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 5 */ -#define ADC_IER_EOC6 (0x1 << 6) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 6 */ -#define ADC_IER_EOC7 (0x1 << 7) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 7 */ -#define ADC_IER_EOC8 (0x1 << 8) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 8 */ -#define ADC_IER_EOC9 (0x1 << 9) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 9 */ -#define ADC_IER_EOC10 (0x1 << 10) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 10 */ -#define ADC_IER_EOC11 (0x1 << 11) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 11 */ -#define ADC_IER_EOC12 (0x1 << 12) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 12 */ -#define ADC_IER_EOC13 (0x1 << 13) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 13 */ -#define ADC_IER_EOC14 (0x1 << 14) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 14 */ -#define ADC_IER_EOC15 (0x1 << 15) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 15 */ -#define ADC_IER_DRDY (0x1 << 24) /**< \brief (ADC_IER) Data Ready Interrupt Enable */ -#define ADC_IER_GOVRE (0x1 << 25) /**< \brief (ADC_IER) General Overrun Error Interrupt Enable */ -#define ADC_IER_COMPE (0x1 << 26) /**< \brief (ADC_IER) Comparison Event Interrupt Enable */ -#define ADC_IER_ENDRX (0x1 << 27) /**< \brief (ADC_IER) End of Receive Buffer Interrupt Enable */ -#define ADC_IER_RXBUFF (0x1 << 28) /**< \brief (ADC_IER) Receive Buffer Full Interrupt Enable */ -/* -------- ADC_IDR : (ADC Offset: 0x28) Interrupt Disable Register -------- */ -#define ADC_IDR_EOC0 (0x1 << 0) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 0 */ -#define ADC_IDR_EOC1 (0x1 << 1) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 1 */ -#define ADC_IDR_EOC2 (0x1 << 2) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 2 */ -#define ADC_IDR_EOC3 (0x1 << 3) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 3 */ -#define ADC_IDR_EOC4 (0x1 << 4) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 4 */ -#define ADC_IDR_EOC5 (0x1 << 5) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 5 */ -#define ADC_IDR_EOC6 (0x1 << 6) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 6 */ -#define ADC_IDR_EOC7 (0x1 << 7) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 7 */ -#define ADC_IDR_EOC8 (0x1 << 8) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 8 */ -#define ADC_IDR_EOC9 (0x1 << 9) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 9 */ -#define ADC_IDR_EOC10 (0x1 << 10) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 10 */ -#define ADC_IDR_EOC11 (0x1 << 11) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 11 */ -#define ADC_IDR_EOC12 (0x1 << 12) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 12 */ -#define ADC_IDR_EOC13 (0x1 << 13) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 13 */ -#define ADC_IDR_EOC14 (0x1 << 14) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 14 */ -#define ADC_IDR_EOC15 (0x1 << 15) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 15 */ -#define ADC_IDR_DRDY (0x1 << 24) /**< \brief (ADC_IDR) Data Ready Interrupt Disable */ -#define ADC_IDR_GOVRE (0x1 << 25) /**< \brief (ADC_IDR) General Overrun Error Interrupt Disable */ -#define ADC_IDR_COMPE (0x1 << 26) /**< \brief (ADC_IDR) Comparison Event Interrupt Disable */ -#define ADC_IDR_ENDRX (0x1 << 27) /**< \brief (ADC_IDR) End of Receive Buffer Interrupt Disable */ -#define ADC_IDR_RXBUFF (0x1 << 28) /**< \brief (ADC_IDR) Receive Buffer Full Interrupt Disable */ -/* -------- ADC_IMR : (ADC Offset: 0x2C) Interrupt Mask Register -------- */ -#define ADC_IMR_EOC0 (0x1 << 0) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 0 */ -#define ADC_IMR_EOC1 (0x1 << 1) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 1 */ -#define ADC_IMR_EOC2 (0x1 << 2) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 2 */ -#define ADC_IMR_EOC3 (0x1 << 3) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 3 */ -#define ADC_IMR_EOC4 (0x1 << 4) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 4 */ -#define ADC_IMR_EOC5 (0x1 << 5) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 5 */ -#define ADC_IMR_EOC6 (0x1 << 6) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 6 */ -#define ADC_IMR_EOC7 (0x1 << 7) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 7 */ -#define ADC_IMR_EOC8 (0x1 << 8) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 8 */ -#define ADC_IMR_EOC9 (0x1 << 9) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 9 */ -#define ADC_IMR_EOC10 (0x1 << 10) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 10 */ -#define ADC_IMR_EOC11 (0x1 << 11) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 11 */ -#define ADC_IMR_EOC12 (0x1 << 12) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 12 */ -#define ADC_IMR_EOC13 (0x1 << 13) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 13 */ -#define ADC_IMR_EOC14 (0x1 << 14) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 14 */ -#define ADC_IMR_EOC15 (0x1 << 15) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 15 */ -#define ADC_IMR_DRDY (0x1 << 24) /**< \brief (ADC_IMR) Data Ready Interrupt Mask */ -#define ADC_IMR_GOVRE (0x1 << 25) /**< \brief (ADC_IMR) General Overrun Error Interrupt Mask */ -#define ADC_IMR_COMPE (0x1 << 26) /**< \brief (ADC_IMR) Comparison Event Interrupt Mask */ -#define ADC_IMR_ENDRX (0x1 << 27) /**< \brief (ADC_IMR) End of Receive Buffer Interrupt Mask */ -#define ADC_IMR_RXBUFF (0x1 << 28) /**< \brief (ADC_IMR) Receive Buffer Full Interrupt Mask */ -/* -------- ADC_ISR : (ADC Offset: 0x30) Interrupt Status Register -------- */ -#define ADC_ISR_EOC0 (0x1 << 0) /**< \brief (ADC_ISR) End of Conversion 0 */ -#define ADC_ISR_EOC1 (0x1 << 1) /**< \brief (ADC_ISR) End of Conversion 1 */ -#define ADC_ISR_EOC2 (0x1 << 2) /**< \brief (ADC_ISR) End of Conversion 2 */ -#define ADC_ISR_EOC3 (0x1 << 3) /**< \brief (ADC_ISR) End of Conversion 3 */ -#define ADC_ISR_EOC4 (0x1 << 4) /**< \brief (ADC_ISR) End of Conversion 4 */ -#define ADC_ISR_EOC5 (0x1 << 5) /**< \brief (ADC_ISR) End of Conversion 5 */ -#define ADC_ISR_EOC6 (0x1 << 6) /**< \brief (ADC_ISR) End of Conversion 6 */ -#define ADC_ISR_EOC7 (0x1 << 7) /**< \brief (ADC_ISR) End of Conversion 7 */ -#define ADC_ISR_EOC8 (0x1 << 8) /**< \brief (ADC_ISR) End of Conversion 8 */ -#define ADC_ISR_EOC9 (0x1 << 9) /**< \brief (ADC_ISR) End of Conversion 9 */ -#define ADC_ISR_EOC10 (0x1 << 10) /**< \brief (ADC_ISR) End of Conversion 10 */ -#define ADC_ISR_EOC11 (0x1 << 11) /**< \brief (ADC_ISR) End of Conversion 11 */ -#define ADC_ISR_EOC12 (0x1 << 12) /**< \brief (ADC_ISR) End of Conversion 12 */ -#define ADC_ISR_EOC13 (0x1 << 13) /**< \brief (ADC_ISR) End of Conversion 13 */ -#define ADC_ISR_EOC14 (0x1 << 14) /**< \brief (ADC_ISR) End of Conversion 14 */ -#define ADC_ISR_EOC15 (0x1 << 15) /**< \brief (ADC_ISR) End of Conversion 15 */ -#define ADC_ISR_DRDY (0x1 << 24) /**< \brief (ADC_ISR) Data Ready */ -#define ADC_ISR_GOVRE (0x1 << 25) /**< \brief (ADC_ISR) General Overrun Error */ -#define ADC_ISR_COMPE (0x1 << 26) /**< \brief (ADC_ISR) Comparison Error */ -#define ADC_ISR_ENDRX (0x1 << 27) /**< \brief (ADC_ISR) End of RX Buffer */ -#define ADC_ISR_RXBUFF (0x1 << 28) /**< \brief (ADC_ISR) RX Buffer Full */ -/* -------- ADC_OVER : (ADC Offset: 0x3C) Overrun Status Register -------- */ -#define ADC_OVER_OVRE0 (0x1 << 0) /**< \brief (ADC_OVER) Overrun Error 0 */ -#define ADC_OVER_OVRE1 (0x1 << 1) /**< \brief (ADC_OVER) Overrun Error 1 */ -#define ADC_OVER_OVRE2 (0x1 << 2) /**< \brief (ADC_OVER) Overrun Error 2 */ -#define ADC_OVER_OVRE3 (0x1 << 3) /**< \brief (ADC_OVER) Overrun Error 3 */ -#define ADC_OVER_OVRE4 (0x1 << 4) /**< \brief (ADC_OVER) Overrun Error 4 */ -#define ADC_OVER_OVRE5 (0x1 << 5) /**< \brief (ADC_OVER) Overrun Error 5 */ -#define ADC_OVER_OVRE6 (0x1 << 6) /**< \brief (ADC_OVER) Overrun Error 6 */ -#define ADC_OVER_OVRE7 (0x1 << 7) /**< \brief (ADC_OVER) Overrun Error 7 */ -#define ADC_OVER_OVRE8 (0x1 << 8) /**< \brief (ADC_OVER) Overrun Error 8 */ -#define ADC_OVER_OVRE9 (0x1 << 9) /**< \brief (ADC_OVER) Overrun Error 9 */ -#define ADC_OVER_OVRE10 (0x1 << 10) /**< \brief (ADC_OVER) Overrun Error 10 */ -#define ADC_OVER_OVRE11 (0x1 << 11) /**< \brief (ADC_OVER) Overrun Error 11 */ -#define ADC_OVER_OVRE12 (0x1 << 12) /**< \brief (ADC_OVER) Overrun Error 12 */ -#define ADC_OVER_OVRE13 (0x1 << 13) /**< \brief (ADC_OVER) Overrun Error 13 */ -#define ADC_OVER_OVRE14 (0x1 << 14) /**< \brief (ADC_OVER) Overrun Error 14 */ -#define ADC_OVER_OVRE15 (0x1 << 15) /**< \brief (ADC_OVER) Overrun Error 15 */ -/* -------- ADC_EMR : (ADC Offset: 0x40) Extended Mode Register -------- */ -#define ADC_EMR_CMPMODE (0x3 << 0) /**< \brief (ADC_EMR) Comparison Mode */ -#define ADC_EMR_CMPMODE_LOW (0x0 << 0) /**< \brief (ADC_EMR) Comparison Mode,lower than low threshold */ -#define ADC_EMR_CMPMODE_HIGH (0x1 << 0) /**< \brief (ADC_EMR) Comparison Mode,higher than high threshold */ -#define ADC_EMR_CMPMODE_IN (0x2 << 0) /**< \brief (ADC_EMR) Comparison Mode, in the comparison window */ -#define ADC_EMR_CMPMODE_OUT (0x3 << 0) /**< \brief (ADC_EMR) Comparison Mode, out of the comparison window */ -#define ADC_EMR_CMPSEL (0xf << 4) /**< \brief (ADC_EMR) Comparison Selected Channel */ -#define ADC_EMR_CMPALL (0x1 << 9) /**< \brief (ADC_EMR) Compare All Channels */ -#define ADC_EMR_TAG (0x1 << 24) /**< \brief (ADC_EMR) TAG of ADC_LDCR register */ -/* -------- ADC_CWR : (ADC Offset: 0x44) Compare Window Register -------- */ -#define ADC_CWR_LOWTHRES (0xfff << 0) /**< \brief (ADC_CWR) Low Threshold */ -#define ADC_CWR_HIGHTHRES (0xfff << 16) /**< \brief (ADC_CWR) High Threshold */ -/* -------- ADC_CGR : (ADC Offset: 0x48) Channel Gain Register -------- */ -#define ADC_CGR_GAIN0 (0x3 << 0) /**< \brief (ADC_CGR) Gain for channel 0 */ -#define ADC_CGR_GAIN1 (0x3 << 2) /**< \brief (ADC_CGR) Gain for channel 1 */ -#define ADC_CGR_GAIN2 (0x3 << 4) /**< \brief (ADC_CGR) Gain for channel 2 */ -#define ADC_CGR_GAIN3 (0x3 << 6) /**< \brief (ADC_CGR) Gain for channel 3 */ -#define ADC_CGR_GAIN4 (0x3 << 8) /**< \brief (ADC_CGR) Gain for channel 4 */ -#define ADC_CGR_GAIN5 (0x3 << 10) /**< \brief (ADC_CGR) Gain for channel 5 */ -#define ADC_CGR_GAIN6 (0x3 << 12) /**< \brief (ADC_CGR) Gain for channel 6 */ -#define ADC_CGR_GAIN7 (0x3 << 14) /**< \brief (ADC_CGR) Gain for channel 7 */ -#define ADC_CGR_GAIN8 (0x3 << 16) /**< \brief (ADC_CGR) Gain for channel 8 */ -#define ADC_CGR_GAIN9 (0x3 << 18) /**< \brief (ADC_CGR) Gain for channel 9 */ -#define ADC_CGR_GAIN10 (0x3 << 20) /**< \brief (ADC_CGR) Gain for channel 10 */ -#define ADC_CGR_GAIN11 (0x3 << 22) /**< \brief (ADC_CGR) Gain for channel 11 */ -#define ADC_CGR_GAIN12 (0x3 << 24) /**< \brief (ADC_CGR) Gain for channel 12 */ -#define ADC_CGR_GAIN13 (0x3 << 26) /**< \brief (ADC_CGR) Gain for channel 13 */ -#define ADC_CGR_GAIN14 (0x3 << 28) /**< \brief (ADC_CGR) Gain for channel 14 */ -#define ADC_CGR_GAIN15 (0x3 << 30) /**< \brief (ADC_CGR) Gain for channel 15 */ -/* -------- ADC_COR : (ADC Offset: 0x4C) Channel Offset Register -------- */ -#define ADC_COR_OFF0 (0x1 << 0) /**< \brief (ADC_COR) Offset for channel 0 */ -#define ADC_COR_OFF1 (0x1 << 1) /**< \brief (ADC_COR) Offset for channel 1 */ -#define ADC_COR_OFF2 (0x1 << 2) /**< \brief (ADC_COR) Offset for channel 2 */ -#define ADC_COR_OFF3 (0x1 << 3) /**< \brief (ADC_COR) Offset for channel 3 */ -#define ADC_COR_OFF4 (0x1 << 4) /**< \brief (ADC_COR) Offset for channel 4 */ -#define ADC_COR_OFF5 (0x1 << 5) /**< \brief (ADC_COR) Offset for channel 5 */ -#define ADC_COR_OFF6 (0x1 << 6) /**< \brief (ADC_COR) Offset for channel 6 */ -#define ADC_COR_OFF7 (0x1 << 7) /**< \brief (ADC_COR) Offset for channel 7 */ -#define ADC_COR_OFF8 (0x1 << 8) /**< \brief (ADC_COR) Offset for channel 8 */ -#define ADC_COR_OFF9 (0x1 << 9) /**< \brief (ADC_COR) Offset for channel 9 */ -#define ADC_COR_OFF10 (0x1 << 10) /**< \brief (ADC_COR) Offset for channel 10 */ -#define ADC_COR_OFF11 (0x1 << 11) /**< \brief (ADC_COR) Offset for channel 11 */ -#define ADC_COR_OFF12 (0x1 << 12) /**< \brief (ADC_COR) Offset for channel 12 */ -#define ADC_COR_OFF13 (0x1 << 13) /**< \brief (ADC_COR) Offset for channel 13 */ -#define ADC_COR_OFF14 (0x1 << 14) /**< \brief (ADC_COR) Offset for channel 14 */ -#define ADC_COR_OFF15 (0x1 << 15) /**< \brief (ADC_COR) Offset for channel 15 */ -#define ADC_COR_DIFF0 (0x1 << 16) /**< \brief (ADC_COR) Differential inputs for channel 0 */ -#define ADC_COR_DIFF1 (0x1 << 17) /**< \brief (ADC_COR) Differential inputs for channel 1 */ -#define ADC_COR_DIFF2 (0x1 << 18) /**< \brief (ADC_COR) Differential inputs for channel 2 */ -#define ADC_COR_DIFF3 (0x1 << 19) /**< \brief (ADC_COR) Differential inputs for channel 3 */ -#define ADC_COR_DIFF4 (0x1 << 20) /**< \brief (ADC_COR) Differential inputs for channel 4 */ -#define ADC_COR_DIFF5 (0x1 << 21) /**< \brief (ADC_COR) Differential inputs for channel 5 */ -#define ADC_COR_DIFF6 (0x1 << 22) /**< \brief (ADC_COR) Differential inputs for channel 6 */ -#define ADC_COR_DIFF7 (0x1 << 23) /**< \brief (ADC_COR) Differential inputs for channel 7 */ -#define ADC_COR_DIFF8 (0x1 << 24) /**< \brief (ADC_COR) Differential inputs for channel 8 */ -#define ADC_COR_DIFF9 (0x1 << 25) /**< \brief (ADC_COR) Differential inputs for channel 9 */ -#define ADC_COR_DIFF10 (0x1 << 26) /**< \brief (ADC_COR) Differential inputs for channel 10 */ -#define ADC_COR_DIFF11 (0x1 << 27) /**< \brief (ADC_COR) Differential inputs for channel 11 */ -#define ADC_COR_DIFF12 (0x1 << 28) /**< \brief (ADC_COR) Differential inputs for channel 12 */ -#define ADC_COR_DIFF13 (0x1 << 29) /**< \brief (ADC_COR) Differential inputs for channel 13 */ -#define ADC_COR_DIFF14 (0x1 << 30) /**< \brief (ADC_COR) Differential inputs for channel 14 */ -#define ADC_COR_DIFF15 (0x1 << 31) /**< \brief (ADC_COR) Differential inputs for channel 15 */ -/* -------- ADC_CDR0 : (ADC Offset: 0x50) Channel Data Register 0 -------- */ -#define ADC_CDR0_DATA (0x3ff << 0) /**< \brief (ADC_CDR0) Converted Data */ -/* -------- ADC_CDR1 : (ADC Offset: 0x54) Channel Data Register 1 -------- */ -#define ADC_CDR1_DATA (0x3ff << 0) /**< \brief (ADC_CDR1) Converted Data */ -/* -------- ADC_CDR2 : (ADC Offset: 0x58) Channel Data Register 2 -------- */ -#define ADC_CDR2_DATA (0x3ff << 0) /**< \brief (ADC_CDR2) Converted Data */ -/* -------- ADC_CDR3 : (ADC Offset: 0x5C) Channel Data Register 3 -------- */ -#define ADC_CDR3_DATA (0x3ff << 0) /**< \brief (ADC_CDR3) Converted Data */ -/* -------- ADC_CDR4 : (ADC Offset: 0x60) Channel Data Register 4 -------- */ -#define ADC_CDR4_DATA (0x3ff << 0) /**< \brief (ADC_CDR4) Converted Data */ -/* -------- ADC_CDR5 : (ADC Offset: 0x64) Channel Data Register 5 -------- */ -#define ADC_CDR5_DATA (0x3ff << 0) /**< \brief (ADC_CDR5) Converted Data */ -/* -------- ADC_CDR6 : (ADC Offset: 0x68) Channel Data Register 6 -------- */ -#define ADC_CDR6_DATA (0x3ff << 0) /**< \brief (ADC_CDR6) Converted Data */ -/* -------- ADC_CDR15 : (ADC Offset: 0x6C) Channel Data Register 15 -------- */ -#define ADC_CDR15_DATA (0x3ff << 0) /**< \brief (ADC_CDR15) Converted Data */ -/* -------- ADC_ACR : (ADC Offset: 0x94) Analog Control Register -------- */ -#define ADC_ACR_TSON (0x1 << 4) /**< \brief (ADC_ACR) Temperature Sensor On */ -#define ADC_ACR_IBCTL (0x3 << 8) /**< \brief (ADC_ACR) ADC Bias Current Control */ -/* -------- ADC_WPMR : (ADC Offset: 0xE4) Write Protect Mode Register -------- */ -#define ADC_WPMR_WPEN (0x1 << 0) /**< \brief (ADC_WPMR) Write Protect Enable */ -#define ADC_WPMR_WPKEY (0xffffff << 8) /**< \brief (ADC_WPMR) Write Protect KEY */ -/* -------- ADC_WPSR : (ADC Offset: 0xE8) Write Protect Status Register -------- */ -#define ADC_WPSR_WPVS (0x1 << 0) /**< \brief (ADC_WPSR) Write Protect Violation Status */ -#define ADC_WPSR_WPVSRC (0xffff << 8) /**< \brief (ADC_WPSR) Write Protect Violation Source */ -/* -------- ADC_RPR : (ADC Offset: 0x100) Receive Pointer Register -------- */ -#define ADC_RPR_RXPTR (0xffffffff << 0) /**< \brief (ADC_RPR) Receive Pointer Register */ -/* -------- ADC_RCR : (ADC Offset: 0x104) Receive Counter Register -------- */ -#define ADC_RCR_RXCTR (0xffff << 0) /**< \brief (ADC_RCR) Receive Counter Register */ -/* -------- ADC_TPR : (ADC Offset: 0x108) Transmit Pointer Register -------- */ -#define ADC_TPR_TXPTR (0xffffffff << 0) /**< \brief (ADC_TPR) Transmit Counter Register */ -/* -------- ADC_TCR : (ADC Offset: 0x10C) Transmit Counter Register -------- */ -#define ADC_TCR_TXCTR (0xffff << 0) /**< \brief (ADC_TCR) Transmit Counter Register */ -/* -------- ADC_RNPR : (ADC Offset: 0x110) Receive Next Pointer Register -------- */ -#define ADC_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (ADC_RNPR) Receive Next Pointer */ -/* -------- ADC_RNCR : (ADC Offset: 0x114) Receive Next Counter Register -------- */ -#define ADC_RNCR_RXNCTR (0xffff << 0) /**< \brief (ADC_RNCR) Receive Next Counter */ -/* -------- ADC_TNPR : (ADC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define ADC_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (ADC_TNPR) Transmit Next Pointer */ -/* -------- ADC_TNCR : (ADC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define ADC_TNCR_TXNCTR (0xffff << 0) /**< \brief (ADC_TNCR) Transmit Counter Next */ -/* -------- ADC_PTCR : (ADC Offset: 0x120) Transfer Control Register -------- */ -#define ADC_PTCR_RXTEN (0x1 << 0) /**< \brief (ADC_PTCR) Receiver Transfer Enable */ -#define ADC_PTCR_RXTDIS (0x1 << 1) /**< \brief (ADC_PTCR) Receiver Transfer Disable */ -#define ADC_PTCR_TXTEN (0x1 << 8) /**< \brief (ADC_PTCR) Transmitter Transfer Enable */ -#define ADC_PTCR_TXTDIS (0x1 << 9) /**< \brief (ADC_PTCR) Transmitter Transfer Disable */ -/* -------- ADC_PTSR : (ADC Offset: 0x124) Transfer Status Register -------- */ -#define ADC_PTSR_RXTEN (0x1 << 0) /**< \brief (ADC_PTSR) Receiver Transfer Enable */ -#define ADC_PTSR_TXTEN (0x1 << 8) /**< \brief (ADC_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Chip Identifier */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_CHIPID Chip Identifier */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Chipid hardware registers */ -typedef struct { - RoReg CHIPID_CIDR; /**< \brief (Chipid Offset: 0x0) Chip ID Register */ - RoReg CHIPID_EXID; /**< \brief (Chipid Offset: 0x4) Chip ID Extension Register */ -} Chipid; -#endif /* __ASSEMBLY__ */ -/* -------- CHIPID_CIDR : (CHIPID Offset: 0x0) Chip ID Register -------- */ -#define CHIPID_CIDR_VERSION (0x1f << 0) /**< \brief (CHIPID_CIDR) Version of the Device */ -#define CHIPID_CIDR_EPROC (0x7 << 5) /**< \brief (CHIPID_CIDR) Embedded Processor */ -#define CHIPID_CIDR_NVPSIZ (0xf << 8) /**< \brief (CHIPID_CIDR) Nonvolatile Program Memory Size */ -#define CHIPID_CIDR_NVPSIZ2 (0xf << 12) /**< \brief (CHIPID_CIDR) */ -#define CHIPID_CIDR_SRAMSIZ (0xf << 16) /**< \brief (CHIPID_CIDR) Internal SRAM Size */ -#define CHIPID_CIDR_ARCH (0xff << 20) /**< \brief (CHIPID_CIDR) Architecture Identifier */ -#define CHIPID_CIDR_NVPTYP (0x7 << 28) /**< \brief (CHIPID_CIDR) Nonvolatile Program Memory Type */ -#define CHIPID_CIDR_EXT (0x1 << 31) /**< \brief (CHIPID_CIDR) Extension Flag */ -/* -------- CHIPID_EXID : (CHIPID Offset: 0x4) Chip ID Extension Register -------- */ -#define CHIPID_EXID_EXID (0xffffffff << 0) /**< \brief (CHIPID_EXID) Chip ID Extension */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Cyclic Redundancy Check Calculation Unit */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_CRCCU Cyclic Redundancy Check Calculation Unit */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Crccu hardware registers */ -typedef struct { - RwReg CRCCU_DSCR; /**< \brief (Crccu Offset: 0x00000000) CRCCU Descriptor Base Register */ - RwReg Reserved1[1]; - WoReg CRCCU_DMA_EN; /**< \brief (Crccu Offset: 0x00000008) CRCCU DMA Enable Register */ - WoReg CRCCU_DMA_DIS; /**< \brief (Crccu Offset: 0x0000000C) CRCCU DMA Disable Register */ - RoReg CRCCU_DMA_SR; /**< \brief (Crccu Offset: 0x00000010) CRCCU DMA Status Register */ - WoReg CRCCU_DMA_IER; /**< \brief (Crccu Offset: 0x00000014) CRCCU DMA Interrupt Enable Register */ - WoReg CRCCU_DMA_IDR; /**< \brief (Crccu Offset: 0x00000018) CRCCU DMA Interrupt Disable Register */ - RoReg CRCCU_DMA_IMR; /**< \brief (Crccu Offset: 0x0000001C) CRCCU DMA Interrupt Mask Register */ - RoReg CRCCU_DMA_ISR; /**< \brief (Crccu Offset: 0x00000020) CRCCU DMA Interrupt Status Register */ - RwReg Reserved2[4]; - WoReg CRCCU_CR; /**< \brief (Crccu Offset: 0x00000034) CRCCU Control Register */ - RwReg CRCCU_MR; /**< \brief (Crccu Offset: 0x00000038) CRCCU Mode Register */ - RoReg CRCCU_SR; /**< \brief (Crccu Offset: 0x0000003C) CRCCU Status Register */ - WoReg CRCCU_IER; /**< \brief (Crccu Offset: 0x00000040) CRCCU Interrupt Enable Register */ - WoReg CRCCU_IDR; /**< \brief (Crccu Offset: 0x00000044) CRCCU Interrupt Disable Register */ - RoReg CRCCU_IMR; /**< \brief (Crccu Offset: 0x00000048) CRCCU Interrupt Mask Register */ - RoReg CRCCU_ISR; /**< \brief (Crccu Offset: 0x0000004C) CRCCU Interrupt Status Register */ -} Crccu; -#endif /* __ASSEMBLY__ */ -/* -------- CRCCU_DSCR : (CRCCU Offset: 0x00000000) CRCCU Descriptor Base Register -------- */ -#define CRCCU_DSCR_DSCR (0x7fffff << 9) /**< \brief (CRCCU_DSCR) Descriptor Base Address */ -/* -------- CRCCU_DMA_EN : (CRCCU Offset: 0x00000008) CRCCU DMA Enable Register -------- */ -#define CRCCU_DMA_EN_DMAEN (0x1 << 0) /**< \brief (CRCCU_DMA_EN) DMA Enable Register */ -/* -------- CRCCU_DMA_DIS : (CRCCU Offset: 0x0000000C) CRCCU DMA Disable Register -------- */ -#define CRCCU_DMA_DIS_DMADIS (0x1 << 0) /**< \brief (CRCCU_DMA_DIS) DMA Disable Register */ -/* -------- CRCCU_DMA_SR : (CRCCU Offset: 0x00000010) CRCCU DMA Status Register -------- */ -#define CRCCU_DMA_SR_DMASR (0x1 << 0) /**< \brief (CRCCU_DMA_SR) DMA Status Register */ -/* -------- CRCCU_DMA_IER : (CRCCU Offset: 0x00000014) CRCCU DMA Interrupt Enable Register -------- */ -#define CRCCU_DMA_IER_DMAIER (0x1 << 0) /**< \brief (CRCCU_DMA_IER) Interrupt Enable register */ -/* -------- CRCCU_DMA_IDR : (CRCCU Offset: 0x00000018) CRCCU DMA Interrupt Disable Register -------- */ -#define CRCCU_DMA_IDR_DMAIDR (0x1 << 0) /**< \brief (CRCCU_DMA_IDR) Interrupt Disable register */ -/* -------- CRCCU_DMA_IMR : (CRCCU Offset: 0x0000001C) CRCCU DMA Interrupt Mask Register -------- */ -#define CRCCU_DMA_IMR_DMAIMR (0x1 << 0) /**< \brief (CRCCU_DMA_IMR) Interrupt Mask Register */ -/* -------- CRCCU_DMA_ISR : (CRCCU Offset: 0x00000020) CRCCU DMA Interrupt Status Register -------- */ -#define CRCCU_DMA_ISR_DMAISR (0x1 << 0) /**< \brief (CRCCU_DMA_ISR) Interrupt Status register */ -/* -------- CRCCU_CR : (CRCCU Offset: 0x00000034) CRCCU Control Register -------- */ -#define CRCCU_CR_RESET (0x1 << 0) /**< \brief (CRCCU_CR) CRC Computation Reset */ -/* -------- CRCCU_MR : (CRCCU Offset: 0x00000038) CRCCU Mode Register -------- */ -#define CRCCU_MR_ENABLE (0x1 << 0) /**< \brief (CRCCU_MR) CRC Enable */ -#define CRCCU_MR_COMPARE (0x1 << 1) /**< \brief (CRCCU_MR) CRC Compare */ -#define CRCCU_MR_PTYPE (0x3 << 2) /**< \brief (CRCCU_MR) Primitive Polynomial */ -#define CRCCU_MR_PTYPE_CCIT8023 (0x0 << 2) /**< \brief (CRCCU_MR) Polynom 0x04C11DB7 */ -#define CRCCU_MR_PTYPE_CASTAGNOLI (0x1 << 2) /**< \brief (CRCCU_MR) Polynom 0x1EDC6F41 */ -#define CRCCU_MR_PTYPE_CCIT16 (0x2 << 2) /**< \brief (CRCCU_MR) Polynom 0x1021 */ -#define CRCCU_MR_DIVIDER (0xf << 4) /**< \brief (CRCCU_MR) Request Divider */ -/* -------- CRCCU_SR : (CRCCU Offset: 0x0000003C) CRCCU Status Register -------- */ -#define CRCCU_SR_CRC (0xffffffff << 0) /**< \brief (CRCCU_SR) Cyclic Redundancy Check Value */ -/* -------- CRCCU_IER : (CRCCU Offset: 0x00000040) CRCCU Interrupt Enable Register -------- */ -#define CRCCU_IER_ERRIER (0x1 << 0) /**< \brief (CRCCU_IER) CRC Error Interrupt Enable */ -/* -------- CRCCU_IDR : (CRCCU Offset: 0x00000044) CRCCU Interrupt Disable Register -------- */ -#define CRCCU_IDR_ERRIDR (0x1 << 0) /**< \brief (CRCCU_IDR) CRC Error Interrupt Disable */ -/* -------- CRCCU_IMR : (CRCCU Offset: 0x00000048) CRCCU Interrupt Mask Register -------- */ -#define CRCCU_IMR_ERRIMR (0x1 << 0) /**< \brief (CRCCU_IMR) CRC Error Interrupt Mask */ -/* -------- CRCCU_ISR : (CRCCU Offset: 0x0000004C) CRCCU Interrupt Status Register -------- */ -#define CRCCU_ISR_ERRISR (0x1 << 0) /**< \brief (CRCCU_ISR) CRC Error Interrupt Status */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Digital-to-Analog Converter Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_DACC Digital-to-Analog Converter Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Dacc hardware registers */ -typedef struct { - WoReg DACC_CR; /**< \brief (Dacc Offset: 0x00) Control Register */ - RwReg DACC_MR; /**< \brief (Dacc Offset: 0x04) Mode Register */ - RwReg Reserved1[2]; - WoReg DACC_CHER; /**< \brief (Dacc Offset: 0x10) Channel Enable Register */ - WoReg DACC_CHDR; /**< \brief (Dacc Offset: 0x14) Channel Disable Register */ - RoReg DACC_CHSR; /**< \brief (Dacc Offset: 0x18) Channel Status Register */ - RwReg Reserved2[1]; - WoReg DACC_CDR; /**< \brief (Dacc Offset: 0x20) Conversion Data Register */ - WoReg DACC_IER; /**< \brief (Dacc Offset: 0x24) Interrupt Enable Register */ - WoReg DACC_IDR; /**< \brief (Dacc Offset: 0x28) Interrupt Disable Register */ - RoReg DACC_IMR; /**< \brief (Dacc Offset: 0x2C) Interrupt Mask Register */ - RoReg DACC_ISR; /**< \brief (Dacc Offset: 0x30) Interrupt Status Register */ - RwReg Reserved3[24]; - RwReg DACC_ACR; /**< \brief (Dacc Offset: 0x94) Analog Current Register */ - RwReg Reserved4[19]; - RwReg DACC_WPMR; /**< \brief (Dacc Offset: 0xE4) Write Protect Mode register */ - RoReg DACC_WPSR; /**< \brief (Dacc Offset: 0xE8) Write Protect Status register */ - RwReg Reserved5[5]; - RwReg DACC_RPR; /**< \brief (Dacc Offset: 0x100) Receive Pointer Register */ - RwReg DACC_RCR; /**< \brief (Dacc Offset: 0x104) Receive Counter Register */ - RwReg DACC_TPR; /**< \brief (Dacc Offset: 0x108) Transmit Pointer Register */ - RwReg DACC_TCR; /**< \brief (Dacc Offset: 0x10C) Transmit Counter Register */ - RwReg DACC_RNPR; /**< \brief (Dacc Offset: 0x110) Receive Next Pointer Register */ - RwReg DACC_RNCR; /**< \brief (Dacc Offset: 0x114) Receive Next Counter Register */ - RwReg DACC_TNPR; /**< \brief (Dacc Offset: 0x118) Transmit Next Pointer Register */ - RwReg DACC_TNCR; /**< \brief (Dacc Offset: 0x11C) Transmit Next Counter Register */ - WoReg DACC_PTCR; /**< \brief (Dacc Offset: 0x120) Transfer Control Register */ - RoReg DACC_PTSR; /**< \brief (Dacc Offset: 0x124) Transfer Status Register */ -} Dacc; -#endif /* __ASSEMBLY__ */ -/* -------- DACC_CR : (DACC Offset: 0x00) Control Register -------- */ -#define DACC_CR_SWRST (0x1 << 0) /**< \brief (DACC_CR) Software Reset */ -/* -------- DACC_MR : (DACC Offset: 0x04) Mode Register -------- */ -#define DACC_MR_TRGEN (0x1 << 0) /**< \brief (DACC_MR) Trigger Enable */ -#define DACC_MR_TRGEN_DIS (0x0 << 0) // (DACC_MR) Hardware triggers are disabled. Starting a conversion is only possible by software. -#define DACC_MR_TRGEN_EN (0x1 << 0) // (DACC_MR) Hardware trigger selected by TRGSEL field is enabled. - -#define DACC_MR_TRGSEL (0x7 << 1) /**< \brief (DACC_MR) Trigger Selection */ -#define DACC_MR_TRGSEL_EXT_TRIG (0x0 << 1) // (DACC_MR) External trigger -#define DACC_MR_TRGSEL_TIOA_0 (0x1 << 1) // (DACC_MR) TIO Output of the Timer Counter Channel 0 -#define DACC_MR_TRGSEL_TIOA_1 (0x2 << 1) // (DACC_MR) TIO Output of the Timer Counter Channel 1 -#define DACC_MR_TRGSEL_TIOA_2 (0x3 << 1) // (DACC_MR) TIO Output of the Timer Counter Channel 2 -#define DACC_MR_TRGSEL_PWM_0 (0x4 << 1) // (DACC_MR) PWM Event Line 0 -#define DACC_MR_TRGSEL_PWM_1 (0x5 << 1) // (DACC_MR) PWM Event Line 1 -#define DACC_MR_WORD (0x1 << 4) /**< \brief (DACC_MR) Word Transfer */ -#define DACC_MR_WORD_HALF (0x0 << 4) /**< \brief (DACC_MR) Half-Word Transfer */ -#define DACC_MR_WORD_WORLD (0x1 << 4) /**< \brief (DACC_MR) Word Transfer */ -#define DACC_MR_SLEEP (0x1 << 5) /**< \brief (DACC_MR) Sleep Mode */ -#define DACC_MR_SLEEP_NORMAL (0x0 << 5) // (DACC_MR) Normal Mode -#define DACC_MR_SLEEP_SLEEP (0x1 << 5) // (DACC_MR) Sleep Modes -#define DACC_MR_FASTWKUP (0x1 << 6) /**< \brief (DACC_MR) Fast Wake up Mode */ -#define DACC_MR_REFRESH (0xff << 8) /**< \brief (DACC_MR) Refresh Period */ -#define DACC_MR_USER_SEL (0x3 << 16) /**< \brief (DACC_MR) User Channel Selection */ -#define DACC_MR_USER_SEL_0 (0x0 << 16) /**< \brief (DACC_MR) User Channel Selection */ -#define DACC_MR_USER_SEL_1 (0x1 << 16) /**< \brief (DACC_MR) User Channel Selection */ -#define DACC_MR_TAG (0x1 << 20) /**< \brief (DACC_MR) Tag Selection Mode */ -#define DACC_MR_MAXS (0x1 << 21) /**< \brief (DACC_MR) Max Speed Mode */ -#define DACC_MR_STARTUP (0x3f << 24) /**< \brief (DACC_MR) Startup Time Selection */ -/* -------- DACC_CHER : (DACC Offset: 0x10) Channel Enable Register -------- */ -#define DACC_CHER_CH0 (0x1 << 0) /**< \brief (DACC_CHER) Channel 0 Enable */ -#define DACC_CHER_CH1 (0x1 << 1) /**< \brief (DACC_CHER) Channel 1 Enable */ -#define DACC_CHER_CH2 (0x1 << 2) /**< \brief (DACC_CHER) Channel 2 Enable */ -/* -------- DACC_CHDR : (DACC Offset: 0x14) Channel Disable Register -------- */ -#define DACC_CHDR_CH0 (0x1 << 0) /**< \brief (DACC_CHDR) Channel 0 Disable */ -#define DACC_CHDR_CH1 (0x1 << 1) /**< \brief (DACC_CHDR) Channel 1 Disable */ -#define DACC_CHDR_CH2 (0x1 << 2) /**< \brief (DACC_CHDR) Channel 2 Disable */ -/* -------- DACC_CHSR : (DACC Offset: 0x18) Channel Status Register -------- */ -#define DACC_CHSR_CH0 (0x1 << 0) /**< \brief (DACC_CHSR) Channel 0 Status */ -#define DACC_CHSR_CH1 (0x1 << 1) /**< \brief (DACC_CHSR) Channel 1 Status */ -#define DACC_CHSR_CH2 (0x1 << 2) /**< \brief (DACC_CHSR) Channel 2 Status */ -/* -------- DACC_CDR : (DACC Offset: 0x20) Conversion Data Register -------- */ -#define DACC_CDR_DATA (0xffffffff << 0) /**< \brief (DACC_CDR) Data to Convert */ -/* -------- DACC_IER : (DACC Offset: 0x24) Interrupt Enable Register -------- */ -#define DACC_IER_TXRDY (0x1 << 0) /**< \brief (DACC_IER) Transmit Ready Interrupt Enable */ -#define DACC_IER_EOC (0x1 << 1) /**< \brief (DACC_IER) End of Conversion Interrupt Enable */ -#define DACC_IER_ENDTX (0x1 << 2) /**< \brief (DACC_IER) End of Transmit Buffer Interrupt Enable */ -#define DACC_IER_TXBUFE (0x1 << 3) /**< \brief (DACC_IER) Transmit Buffer Empty Interrupt Enable */ -/* -------- DACC_IDR : (DACC Offset: 0x28) Interrupt Disable Register -------- */ -#define DACC_IDR_TXRDY (0x1 << 0) /**< \brief (DACC_IDR) Transmit Ready Interrupt Disable. */ -#define DACC_IDR_EOC (0x1 << 1) /**< \brief (DACC_IDR) End of Conversion Interrupt Disable */ -#define DACC_IDR_ENDTX (0x1 << 2) /**< \brief (DACC_IDR) End of Transmit Buffer Interrupt Disable */ -#define DACC_IDR_TXBUFE (0x1 << 3) /**< \brief (DACC_IDR) Transmit Buffer Empty Interrupt Disable */ -/* -------- DACC_IMR : (DACC Offset: 0x2C) Interrupt Mask Register -------- */ -#define DACC_IMR_TXRDY (0x1 << 0) /**< \brief (DACC_IMR) Transmit Ready Interrupt Mask */ -#define DACC_IMR_EOC (0x1 << 1) /**< \brief (DACC_IMR) End of Conversion Interrupt Mask */ -#define DACC_IMR_ENDTX (0x1 << 2) /**< \brief (DACC_IMR) End of Transmit Buffer Interrupt Mask */ -#define DACC_IMR_TXBUFE (0x1 << 3) /**< \brief (DACC_IMR) Transmit Buffer Empty Interrupt Mask */ -/* -------- DACC_ISR : (DACC Offset: 0x30) Interrupt Status Register -------- */ -#define DACC_ISR_TXRDY (0x1 << 0) /**< \brief (DACC_ISR) Transmit Ready Interrupt Flag */ -#define DACC_ISR_EOC (0x1 << 1) /**< \brief (DACC_ISR) End of Conversion Interrupt Flag */ -#define DACC_ISR_ENDTX (0x1 << 2) /**< \brief (DACC_ISR) End of DMA Interrupt Flag */ -#define DACC_ISR_TXBUFE (0x1 << 3) /**< \brief (DACC_ISR) Transmit Buffer Empty */ -/* -------- DACC_ACR : (DACC Offset: 0x94) Analog Current Register -------- */ -#define DACC_ACR_IBCTLCH0 (0x3 << 0) /**< \brief (DACC_ACR) Analog Output Current Control */ -#define DACC_ACR_IBCTLCH1 (0x3 << 2) /**< \brief (DACC_ACR) Analog Output Current Control */ -#define DACC_ACR_IBCTLDACCORE (0x3 << 8) /**< \brief (DACC_ACR) Bias Current Control for DAC Core */ -/* -------- DACC_WPMR : (DACC Offset: 0xE4) Write Protect Mode register -------- */ -#define DACC_WPMR_WPEN (0x1 << 0) /**< \brief (DACC_WPMR) Write Protect Enable */ -#define DACC_WPMR_WPKEY (0xffffff << 8) /**< \brief (DACC_WPMR) Write Protect KEY */ -/* -------- DACC_WPSR : (DACC Offset: 0xE8) Write Protect Status register -------- */ -#define DACC_WPSR_WPROTERR (0x1 << 0) /**< \brief (DACC_WPSR) Write protection error */ -#define DACC_WPSR_WPROTADDR (0xff << 8) /**< \brief (DACC_WPSR) Write protection error address */ -/* -------- DACC_RPR : (DACC Offset: 0x100) Receive Pointer Register -------- */ -#define DACC_RPR_RXPTR (0xffffffff << 0) /**< \brief (DACC_RPR) Receive Pointer Register */ -/* -------- DACC_RCR : (DACC Offset: 0x104) Receive Counter Register -------- */ -#define DACC_RCR_RXCTR (0xffff << 0) /**< \brief (DACC_RCR) Receive Counter Register */ -/* -------- DACC_TPR : (DACC Offset: 0x108) Transmit Pointer Register -------- */ -#define DACC_TPR_TXPTR (0xffffffff << 0) /**< \brief (DACC_TPR) Transmit Counter Register */ -/* -------- DACC_TCR : (DACC Offset: 0x10C) Transmit Counter Register -------- */ -#define DACC_TCR_TXCTR (0xffff << 0) /**< \brief (DACC_TCR) Transmit Counter Register */ -/* -------- DACC_RNPR : (DACC Offset: 0x110) Receive Next Pointer Register -------- */ -#define DACC_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (DACC_RNPR) Receive Next Pointer */ -/* -------- DACC_RNCR : (DACC Offset: 0x114) Receive Next Counter Register -------- */ -#define DACC_RNCR_RXNCTR (0xffff << 0) /**< \brief (DACC_RNCR) Receive Next Counter */ -/* -------- DACC_TNPR : (DACC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define DACC_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (DACC_TNPR) Transmit Next Pointer */ -/* -------- DACC_TNCR : (DACC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define DACC_TNCR_TXNCTR (0xffff << 0) /**< \brief (DACC_TNCR) Transmit Counter Next */ -/* -------- DACC_PTCR : (DACC Offset: 0x120) Transfer Control Register -------- */ -#define DACC_PTCR_RXTEN (0x1 << 0) /**< \brief (DACC_PTCR) Receiver Transfer Enable */ -#define DACC_PTCR_RXTDIS (0x1 << 1) /**< \brief (DACC_PTCR) Receiver Transfer Disable */ -#define DACC_PTCR_TXTEN (0x1 << 8) /**< \brief (DACC_PTCR) Transmitter Transfer Enable */ -#define DACC_PTCR_TXTDIS (0x1 << 9) /**< \brief (DACC_PTCR) Transmitter Transfer Disable */ -/* -------- DACC_PTSR : (DACC Offset: 0x124) Transfer Status Register -------- */ -#define DACC_PTSR_RXTEN (0x1 << 0) /**< \brief (DACC_PTSR) Receiver Transfer Enable */ -#define DACC_PTSR_TXTEN (0x1 << 8) /**< \brief (DACC_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Embedded Flash Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_EFC Embedded Flash Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Efc hardware registers */ -typedef struct { - RwReg EEFC_FMR; /**< \brief (Efc Offset: 0x00) EEFC Flash Mode Register */ - WoReg EEFC_FCR; /**< \brief (Efc Offset: 0x04) EEFC Flash Command Register */ - RoReg EEFC_FSR; /**< \brief (Efc Offset: 0x08) EEFC Flash Status Register */ - RoReg EEFC_FRR; /**< \brief (Efc Offset: 0x0C) EEFC Flash Result Register */ -} Efc; -#endif /* __ASSEMBLY__ */ -/* -------- EEFC_FMR : (EFC Offset: 0x00) EEFC Flash Mode Register -------- */ -#define EEFC_FMR_FRDY (0x1 << 0) /**< \brief (EEFC_FMR) Ready Interrupt Enable */ -#define EEFC_FMR_FWS (0xf << 8) /**< \brief (EEFC_FMR) Flash Wait State */ -#define EEFC_FMR_FAM (0x1 << 24) /**< \brief (EEFC_FMR) Flash Access Mode */ -/* -------- EEFC_FCR : (EFC Offset: 0x04) EEFC Flash Command Register -------- */ -#define EEFC_FCR_FCMD (0xff << 0) /**< \brief (EEFC_FCR) Flash Command */ -#define EEFC_FCR_FARG (0xffff << 8) /**< \brief (EEFC_FCR) Flash Command Argument */ -#define EEFC_FCR_FKEY (0xff << 24) /**< \brief (EEFC_FCR) Flash Writing Protection Key */ -/* -------- EEFC_FSR : (EFC Offset: 0x08) EEFC Flash Status Register -------- */ -#define EEFC_FSR_FRDY (0x1 << 0) /**< \brief (EEFC_FSR) Flash Ready Status */ -#define EEFC_FSR_FCMDE (0x1 << 1) /**< \brief (EEFC_FSR) Flash Command Error Status */ -#define EEFC_FSR_FLOCKE (0x1 << 2) /**< \brief (EEFC_FSR) Flash Lock Error Status */ -/* -------- EEFC_FRR : (EFC Offset: 0x0C) EEFC Flash Result Register -------- */ -#define EEFC_FRR_FVALUE (0xffffffff << 0) /**< \brief (EEFC_FRR) Flash Result Value */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR General Purpose Backup Register */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_GPBR General Purpose Backup Register */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Gpbr hardware registers */ -typedef struct { - RwReg SYS_GPBR0; /**< \brief (Gpbr Offset: 0x0) General Purpose Backup Register 0 */ - RwReg SYS_GPBR1; /**< \brief (Gpbr Offset: 0x4) General Purpose Backup Register 1 */ - RwReg SYS_GPBR2; /**< \brief (Gpbr Offset: 0x8) General Purpose Backup Register 2 */ - RwReg SYS_GPBR3; /**< \brief (Gpbr Offset: 0xC) General Purpose Backup Register 3 */ -} Gpbr; -#endif /* __ASSEMBLY__ */ -/* -------- SYS_GPBR0 : (GPBR Offset: 0x0) General Purpose Backup Register 0 -------- */ -#define SYS_GPBR0_GPBR_VALUE0 (0xffffffff << 0) /**< \brief (SYS_GPBR0) Value of GPBR x */ -/* -------- SYS_GPBR1 : (GPBR Offset: 0x4) General Purpose Backup Register 1 -------- */ -#define SYS_GPBR1_GPBR_VALUE1 (0xffffffff << 0) /**< \brief (SYS_GPBR1) Value of GPBR x */ -/* -------- SYS_GPBR2 : (GPBR Offset: 0x8) General Purpose Backup Register 2 -------- */ -#define SYS_GPBR2_GPBR_VALUE2 (0xffffffff << 0) /**< \brief (SYS_GPBR2) Value of GPBR x */ -/* -------- SYS_GPBR3 : (GPBR Offset: 0xC) General Purpose Backup Register 3 -------- */ -#define SYS_GPBR3_GPBR_VALUE3 (0xffffffff << 0) /**< \brief (SYS_GPBR3) Value of GPBR x */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR High Speed MultiMedia Card Interface */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_HSMCI High Speed MultiMedia Card Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Hsmci hardware registers */ -typedef struct { - WoReg HSMCI_CR; /**< \brief (Hsmci Offset: 0x00) Control Register */ - RwReg HSMCI_MR; /**< \brief (Hsmci Offset: 0x04) Mode Register */ - RwReg HSMCI_DTOR; /**< \brief (Hsmci Offset: 0x08) Data Timeout Register */ - RwReg HSMCI_SDCR; /**< \brief (Hsmci Offset: 0x0C) SD/SDIO Card Register */ - RwReg HSMCI_ARGR; /**< \brief (Hsmci Offset: 0x10) Argument Register */ - WoReg HSMCI_CMDR; /**< \brief (Hsmci Offset: 0x14) Command Register */ - RwReg HSMCI_BLKR; /**< \brief (Hsmci Offset: 0x18) Block Register */ - RwReg HSMCI_CSTOR; /**< \brief (Hsmci Offset: 0x1C) Completion Signal Timeout Register */ - RoReg HSMCI_RSPR[4]; /**< \brief (Hsmci Offset: 0x20) Response Register */ - RoReg HSMCI_RDR; /**< \brief (Hsmci Offset: 0x30) Receive Data Register */ - WoReg HSMCI_TDR; /**< \brief (Hsmci Offset: 0x34) Transmit Data Register */ - RwReg Reserved1[2]; - RoReg HSMCI_SR; /**< \brief (Hsmci Offset: 0x40) Status Register */ - WoReg HSMCI_IER; /**< \brief (Hsmci Offset: 0x44) Interrupt Enable Register */ - WoReg HSMCI_IDR; /**< \brief (Hsmci Offset: 0x48) Interrupt Disable Register */ - RoReg HSMCI_IMR; /**< \brief (Hsmci Offset: 0x4C) Interrupt Mask Register */ - RwReg Reserved2[1]; - RwReg HSMCI_CFG; /**< \brief (Hsmci Offset: 0x54) Configuration Register */ - RwReg Reserved3[35]; - RwReg HSMCI_WPMR; /**< \brief (Hsmci Offset: 0xE4) Write Protection Mode Register */ - RoReg HSMCI_WPSR; /**< \brief (Hsmci Offset: 0xE8) Write Protection Status Register */ - RwReg Reserved4[5]; - RwReg HSMCI_RPR; /**< \brief (Hsmci Offset: 0x100) Receive Pointer Register */ - RwReg HSMCI_RCR; /**< \brief (Hsmci Offset: 0x104) Receive Counter Register */ - RwReg HSMCI_TPR; /**< \brief (Hsmci Offset: 0x108) Transmit Pointer Register */ - RwReg HSMCI_TCR; /**< \brief (Hsmci Offset: 0x10C) Transmit Counter Register */ - RwReg HSMCI_RNPR; /**< \brief (Hsmci Offset: 0x110) Receive Next Pointer Register */ - RwReg HSMCI_RNCR; /**< \brief (Hsmci Offset: 0x114) Receive Next Counter Register */ - RwReg HSMCI_TNPR; /**< \brief (Hsmci Offset: 0x118) Transmit Next Pointer Register */ - RwReg HSMCI_TNCR; /**< \brief (Hsmci Offset: 0x11C) Transmit Next Counter Register */ - WoReg HSMCI_PTCR; /**< \brief (Hsmci Offset: 0x120) Transfer Control Register */ - RoReg HSMCI_PTSR; /**< \brief (Hsmci Offset: 0x124) Transfer Status Register */ -} Hsmci; -#endif /* __ASSEMBLY__ */ -/* -------- HSMCI_CR : (HSMCI Offset: 0x00) Control Register -------- */ -#define HSMCI_CR_MCIEN (0x1 << 0) /**< \brief (HSMCI_CR) Multi-Media Interface Enable */ -#define HSMCI_CR_MCIDIS (0x1 << 1) /**< \brief (HSMCI_CR) Multi-Media Interface Disable */ -#define HSMCI_CR_PWSEN (0x1 << 2) /**< \brief (HSMCI_CR) Power Save Mode Enable */ -#define HSMCI_CR_PWSDIS (0x1 << 3) /**< \brief (HSMCI_CR) Power Save Mode Disable */ -#define HSMCI_CR_SWRST (0x1 << 7) /**< \brief (HSMCI_CR) Software Reset */ -/* -------- HSMCI_MR : (HSMCI Offset: 0x04) Mode Register -------- */ -#define HSMCI_MR_CLKDIV (0xff << 0) /**< \brief (HSMCI_MR) Clock Divider */ -#define HSMCI_MR_PWSDIV (0x7 << 8) /**< \brief (HSMCI_MR) Power Saving Divider */ -#define HSMCI_MR_RDPROOF (0x1 << 11) /**< \brief (HSMCI_MR) */ -#define HSMCI_MR_WRPROOF (0x1 << 12) /**< \brief (HSMCI_MR) */ -#define HSMCI_MR_FBYTE (0x1 << 13) /**< \brief (HSMCI_MR) Force Byte Transfer */ -#define HSMCI_MR_PADV (0x1 << 14) /**< \brief (HSMCI_MR) Padding Value */ -#define HSMCI_MR_PDCMODE (0x1 << 15) /**< \brief (HSMCI_MR) PDC-oriented Mode */ -#define HSMCI_MR_BLKLEN (0xffff << 16) /**< \brief (HSMCI_MR) Data Block Length */ -/* -------- HSMCI_DTOR : (HSMCI Offset: 0x08) Data Timeout Register -------- */ -#define HSMCI_DTOR_DTOCYC (0xf << 0) /**< \brief (HSMCI_DTOR) Data Timeout Cycle Number */ -#define HSMCI_DTOR_DTOMUL (0x7 << 4) /**< \brief (HSMCI_DTOR) Data Timeout Multiplier */ -/* -------- HSMCI_SDCR : (HSMCI Offset: 0x0C) SD/SDIO Card Register -------- */ -#define HSMCI_SDCR_SDCSEL (0x3 << 0) /**< \brief (HSMCI_SDCR) SDCard/SDIO Slot */ -#define HSMCI_SDCR_SDCBUS (0x3 << 6) /**< \brief (HSMCI_SDCR) SDCard/SDIO Bus Width */ -/* -------- HSMCI_ARGR : (HSMCI Offset: 0x10) Argument Register -------- */ -#define HSMCI_ARGR_ARG (0xffffffff << 0) /**< \brief (HSMCI_ARGR) Command Argument */ -/* -------- HSMCI_CMDR : (HSMCI Offset: 0x14) Command Register -------- */ -#define HSMCI_CMDR_CMDNB (0x3f << 0) /**< \brief (HSMCI_CMDR) Command Number */ -#define HSMCI_CMDR_RSPTYP (0x3 << 6) /**< \brief (HSMCI_CMDR) Response Type */ -#define HSMCI_CMDR_SPCMD (0x7 << 8) /**< \brief (HSMCI_CMDR) Special Command */ -#define HSMCI_CMDR_OPDCMD (0x1 << 11) /**< \brief (HSMCI_CMDR) Open Drain Command */ -#define HSMCI_CMDR_MAXLAT (0x1 << 12) /**< \brief (HSMCI_CMDR) Max Latency for Command to Response */ -#define HSMCI_CMDR_TRCMD (0x3 << 16) /**< \brief (HSMCI_CMDR) Transfer Command */ -#define HSMCI_CMDR_TRDIR (0x1 << 18) /**< \brief (HSMCI_CMDR) Transfer Direction */ -#define HSMCI_CMDR_TRTYP (0x7 << 19) /**< \brief (HSMCI_CMDR) Transfer Type */ -#define HSMCI_CMDR_IOSPCMD (0x3 << 24) /**< \brief (HSMCI_CMDR) SDIO Special Command */ -#define HSMCI_CMDR_ATACS (0x1 << 26) /**< \brief (HSMCI_CMDR) ATA with Command Completion Signal */ -#define HSMCI_CMDR_BOOT_ACK (0x1 << 27) /**< \brief (HSMCI_CMDR) Boot Operation Acknowledge. */ -/* -------- HSMCI_BLKR : (HSMCI Offset: 0x18) Block Register -------- */ -#define HSMCI_BLKR_BCNT (0xffff << 0) /**< \brief (HSMCI_BLKR) MMC/SDIO Block Count - SDIO Byte Count */ -#define HSMCI_BLKR_BLKLEN (0xffff << 16) /**< \brief (HSMCI_BLKR) Data Block Length */ -/* -------- HSMCI_CSTOR : (HSMCI Offset: 0x1C) Completion Signal Timeout Register -------- */ -#define HSMCI_CSTOR_CSTOCYC (0xf << 0) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Cycle Number */ -#define HSMCI_CSTOR_CSTOMUL (0x7 << 4) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Multiplier */ -/* -------- HSMCI_RSPR[4] : (HSMCI Offset: 0x20) Response Register -------- */ -#define HSMCI_RSPR_RSP (0xffffffff << 0) /**< \brief (HSMCI_RSPR[4]) Response */ -/* -------- HSMCI_RDR : (HSMCI Offset: 0x30) Receive Data Register -------- */ -#define HSMCI_RDR_DATA (0xffffffff << 0) /**< \brief (HSMCI_RDR) Data to Read */ -/* -------- HSMCI_TDR : (HSMCI Offset: 0x34) Transmit Data Register -------- */ -#define HSMCI_TDR_DATA (0xffffffff << 0) /**< \brief (HSMCI_TDR) Data to Write */ -/* -------- HSMCI_SR : (HSMCI Offset: 0x40) Status Register -------- */ -#define HSMCI_SR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_SR) Command Ready */ -#define HSMCI_SR_RXRDY (0x1 << 1) /**< \brief (HSMCI_SR) Receiver Ready */ -#define HSMCI_SR_TXRDY (0x1 << 2) /**< \brief (HSMCI_SR) Transmit Ready */ -#define HSMCI_SR_BLKE (0x1 << 3) /**< \brief (HSMCI_SR) Data Block Ended */ -#define HSMCI_SR_DTIP (0x1 << 4) /**< \brief (HSMCI_SR) Data Transfer in Progress */ -#define HSMCI_SR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_SR) HSMCI Not Busy */ -#define HSMCI_SR_ENDRX (0x1 << 6) /**< \brief (HSMCI_SR) End of RX Buffer */ -#define HSMCI_SR_ENDTX (0x1 << 7) /**< \brief (HSMCI_SR) End of TX Buffer */ -#define HSMCI_SR_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_SR) SDIO Interrupt for Slot A */ -#define HSMCI_SR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_SR) SDIO Read Wait Operation Status */ -#define HSMCI_SR_CSRCV (0x1 << 13) /**< \brief (HSMCI_SR) CE-ATA Completion Signal Received */ -#define HSMCI_SR_RXBUFF (0x1 << 14) /**< \brief (HSMCI_SR) RX Buffer Full */ -#define HSMCI_SR_TXBUFE (0x1 << 15) /**< \brief (HSMCI_SR) TX Buffer Empty */ -#define HSMCI_SR_RINDE (0x1 << 16) /**< \brief (HSMCI_SR) Response Index Error */ -#define HSMCI_SR_RDIRE (0x1 << 17) /**< \brief (HSMCI_SR) Response Direction Error */ -#define HSMCI_SR_RCRCE (0x1 << 18) /**< \brief (HSMCI_SR) Response CRC Error */ -#define HSMCI_SR_RENDE (0x1 << 19) /**< \brief (HSMCI_SR) Response End Bit Error */ -#define HSMCI_SR_RTOE (0x1 << 20) /**< \brief (HSMCI_SR) Response Time-out Error */ -#define HSMCI_SR_DCRCE (0x1 << 21) /**< \brief (HSMCI_SR) Data CRC Error */ -#define HSMCI_SR_DTOE (0x1 << 22) /**< \brief (HSMCI_SR) Data Time-out Error */ -#define HSMCI_SR_CSTOE (0x1 << 23) /**< \brief (HSMCI_SR) Completion Signal Time-out Error */ -#define HSMCI_SR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_SR) FIFO empty flag */ -#define HSMCI_SR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_SR) Transfer Done flag */ -#define HSMCI_SR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_SR) Boot Operation Acknowledge Received */ -#define HSMCI_SR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_SR) Boot Operation Acknowledge Error */ -#define HSMCI_SR_OVRE (0x1 << 30) /**< \brief (HSMCI_SR) Overrun */ -#define HSMCI_SR_UNRE (0x1 << 31) /**< \brief (HSMCI_SR) Underrun */ -/* -------- HSMCI_IER : (HSMCI Offset: 0x44) Interrupt Enable Register -------- */ -#define HSMCI_IER_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IER) Command Ready Interrupt Enable */ -#define HSMCI_IER_RXRDY (0x1 << 1) /**< \brief (HSMCI_IER) Receiver Ready Interrupt Enable */ -#define HSMCI_IER_TXRDY (0x1 << 2) /**< \brief (HSMCI_IER) Transmit Ready Interrupt Enable */ -#define HSMCI_IER_BLKE (0x1 << 3) /**< \brief (HSMCI_IER) Data Block Ended Interrupt Enable */ -#define HSMCI_IER_DTIP (0x1 << 4) /**< \brief (HSMCI_IER) Data Transfer in Progress Interrupt Enable */ -#define HSMCI_IER_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IER) Data Not Busy Interrupt Enable */ -#define HSMCI_IER_ENDRX (0x1 << 6) /**< \brief (HSMCI_IER) End of Receive Buffer Interrupt Enable */ -#define HSMCI_IER_ENDTX (0x1 << 7) /**< \brief (HSMCI_IER) End of Transmit Buffer Interrupt Enable */ -#define HSMCI_IER_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IER) SDIO Interrupt for Slot A Interrupt Enable */ -#define HSMCI_IER_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IER) SDIO Read Wait Operation Status Interrupt Enable */ -#define HSMCI_IER_CSRCV (0x1 << 13) /**< \brief (HSMCI_IER) Completion Signal Received Interrupt Enable */ -#define HSMCI_IER_RXBUFF (0x1 << 14) /**< \brief (HSMCI_IER) Receive Buffer Full Interrupt Enable */ -#define HSMCI_IER_TXBUFE (0x1 << 15) /**< \brief (HSMCI_IER) Transmit Buffer Empty Interrupt Enable */ -#define HSMCI_IER_RINDE (0x1 << 16) /**< \brief (HSMCI_IER) Response Index Error Interrupt Enable */ -#define HSMCI_IER_RDIRE (0x1 << 17) /**< \brief (HSMCI_IER) Response Direction Error Interrupt Enable */ -#define HSMCI_IER_RCRCE (0x1 << 18) /**< \brief (HSMCI_IER) Response CRC Error Interrupt Enable */ -#define HSMCI_IER_RENDE (0x1 << 19) /**< \brief (HSMCI_IER) Response End Bit Error Interrupt Enable */ -#define HSMCI_IER_RTOE (0x1 << 20) /**< \brief (HSMCI_IER) Response Time-out Error Interrupt Enable */ -#define HSMCI_IER_DCRCE (0x1 << 21) /**< \brief (HSMCI_IER) Data CRC Error Interrupt Enable */ -#define HSMCI_IER_DTOE (0x1 << 22) /**< \brief (HSMCI_IER) Data Time-out Error Interrupt Enable */ -#define HSMCI_IER_CSTOE (0x1 << 23) /**< \brief (HSMCI_IER) Completion Signal Timeout Error Interrupt Enable */ -#define HSMCI_IER_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IER) FIFO empty Interrupt enable */ -#define HSMCI_IER_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IER) Transfer Done Interrupt enable */ -#define HSMCI_IER_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IER) Boot Acknowledge Interrupt Enable */ -#define HSMCI_IER_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IER) Boot Acknowledge Error Interrupt Enable */ -#define HSMCI_IER_OVRE (0x1 << 30) /**< \brief (HSMCI_IER) Overrun Interrupt Enable */ -#define HSMCI_IER_UNRE (0x1 << 31) /**< \brief (HSMCI_IER) Underrun Interrupt Enable */ -/* -------- HSMCI_IDR : (HSMCI Offset: 0x48) Interrupt Disable Register -------- */ -#define HSMCI_IDR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IDR) Command Ready Interrupt Disable */ -#define HSMCI_IDR_RXRDY (0x1 << 1) /**< \brief (HSMCI_IDR) Receiver Ready Interrupt Disable */ -#define HSMCI_IDR_TXRDY (0x1 << 2) /**< \brief (HSMCI_IDR) Transmit Ready Interrupt Disable */ -#define HSMCI_IDR_BLKE (0x1 << 3) /**< \brief (HSMCI_IDR) Data Block Ended Interrupt Disable */ -#define HSMCI_IDR_DTIP (0x1 << 4) /**< \brief (HSMCI_IDR) Data Transfer in Progress Interrupt Disable */ -#define HSMCI_IDR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IDR) Data Not Busy Interrupt Disable */ -#define HSMCI_IDR_ENDRX (0x1 << 6) /**< \brief (HSMCI_IDR) End of Receive Buffer Interrupt Disable */ -#define HSMCI_IDR_ENDTX (0x1 << 7) /**< \brief (HSMCI_IDR) End of Transmit Buffer Interrupt Disable */ -#define HSMCI_IDR_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IDR) SDIO Interrupt for Slot A Interrupt Disable */ -#define HSMCI_IDR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IDR) SDIO Read Wait Operation Status Interrupt Disable */ -#define HSMCI_IDR_CSRCV (0x1 << 13) /**< \brief (HSMCI_IDR) Completion Signal received interrupt Disable */ -#define HSMCI_IDR_RXBUFF (0x1 << 14) /**< \brief (HSMCI_IDR) Receive Buffer Full Interrupt Disable */ -#define HSMCI_IDR_TXBUFE (0x1 << 15) /**< \brief (HSMCI_IDR) Transmit Buffer Empty Interrupt Disable */ -#define HSMCI_IDR_RINDE (0x1 << 16) /**< \brief (HSMCI_IDR) Response Index Error Interrupt Disable */ -#define HSMCI_IDR_RDIRE (0x1 << 17) /**< \brief (HSMCI_IDR) Response Direction Error Interrupt Disable */ -#define HSMCI_IDR_RCRCE (0x1 << 18) /**< \brief (HSMCI_IDR) Response CRC Error Interrupt Disable */ -#define HSMCI_IDR_RENDE (0x1 << 19) /**< \brief (HSMCI_IDR) Response End Bit Error Interrupt Disable */ -#define HSMCI_IDR_RTOE (0x1 << 20) /**< \brief (HSMCI_IDR) Response Time-out Error Interrupt Disable */ -#define HSMCI_IDR_DCRCE (0x1 << 21) /**< \brief (HSMCI_IDR) Data CRC Error Interrupt Disable */ -#define HSMCI_IDR_DTOE (0x1 << 22) /**< \brief (HSMCI_IDR) Data Time-out Error Interrupt Disable */ -#define HSMCI_IDR_CSTOE (0x1 << 23) /**< \brief (HSMCI_IDR) Completion Signal Time out Error Interrupt Disable */ -#define HSMCI_IDR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IDR) FIFO empty Interrupt Disable */ -#define HSMCI_IDR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IDR) Transfer Done Interrupt Disable */ -#define HSMCI_IDR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IDR) Boot Acknowledge Interrupt Disable */ -#define HSMCI_IDR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IDR) Boot Acknowledge Error Interrupt Disable */ -#define HSMCI_IDR_OVRE (0x1 << 30) /**< \brief (HSMCI_IDR) Overrun Interrupt Disable */ -#define HSMCI_IDR_UNRE (0x1 << 31) /**< \brief (HSMCI_IDR) Underrun Interrupt Disable */ -/* -------- HSMCI_IMR : (HSMCI Offset: 0x4C) Interrupt Mask Register -------- */ -#define HSMCI_IMR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IMR) Command Ready Interrupt Mask */ -#define HSMCI_IMR_RXRDY (0x1 << 1) /**< \brief (HSMCI_IMR) Receiver Ready Interrupt Mask */ -#define HSMCI_IMR_TXRDY (0x1 << 2) /**< \brief (HSMCI_IMR) Transmit Ready Interrupt Mask */ -#define HSMCI_IMR_BLKE (0x1 << 3) /**< \brief (HSMCI_IMR) Data Block Ended Interrupt Mask */ -#define HSMCI_IMR_DTIP (0x1 << 4) /**< \brief (HSMCI_IMR) Data Transfer in Progress Interrupt Mask */ -#define HSMCI_IMR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IMR) Data Not Busy Interrupt Mask */ -#define HSMCI_IMR_ENDRX (0x1 << 6) /**< \brief (HSMCI_IMR) End of Receive Buffer Interrupt Mask */ -#define HSMCI_IMR_ENDTX (0x1 << 7) /**< \brief (HSMCI_IMR) End of Transmit Buffer Interrupt Mask */ -#define HSMCI_IMR_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IMR) SDIO Interrupt for Slot A Interrupt Mask */ -#define HSMCI_IMR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IMR) SDIO Read Wait Operation Status Interrupt Mask */ -#define HSMCI_IMR_CSRCV (0x1 << 13) /**< \brief (HSMCI_IMR) Completion Signal Received Interrupt Mask */ -#define HSMCI_IMR_RXBUFF (0x1 << 14) /**< \brief (HSMCI_IMR) Receive Buffer Full Interrupt Mask */ -#define HSMCI_IMR_TXBUFE (0x1 << 15) /**< \brief (HSMCI_IMR) Transmit Buffer Empty Interrupt Mask */ -#define HSMCI_IMR_RINDE (0x1 << 16) /**< \brief (HSMCI_IMR) Response Index Error Interrupt Mask */ -#define HSMCI_IMR_RDIRE (0x1 << 17) /**< \brief (HSMCI_IMR) Response Direction Error Interrupt Mask */ -#define HSMCI_IMR_RCRCE (0x1 << 18) /**< \brief (HSMCI_IMR) Response CRC Error Interrupt Mask */ -#define HSMCI_IMR_RENDE (0x1 << 19) /**< \brief (HSMCI_IMR) Response End Bit Error Interrupt Mask */ -#define HSMCI_IMR_RTOE (0x1 << 20) /**< \brief (HSMCI_IMR) Response Time-out Error Interrupt Mask */ -#define HSMCI_IMR_DCRCE (0x1 << 21) /**< \brief (HSMCI_IMR) Data CRC Error Interrupt Mask */ -#define HSMCI_IMR_DTOE (0x1 << 22) /**< \brief (HSMCI_IMR) Data Time-out Error Interrupt Mask */ -#define HSMCI_IMR_CSTOE (0x1 << 23) /**< \brief (HSMCI_IMR) Completion Signal Time-out Error Interrupt Mask */ -#define HSMCI_IMR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IMR) FIFO Empty Interrupt Mask */ -#define HSMCI_IMR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IMR) Transfer Done Interrupt Mask */ -#define HSMCI_IMR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IMR) Boot Operation Acknowledge Received Interrupt Mask */ -#define HSMCI_IMR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IMR) Boot Operation Acknowledge Error Interrupt Mask */ -#define HSMCI_IMR_OVRE (0x1 << 30) /**< \brief (HSMCI_IMR) Overrun Interrupt Mask */ -#define HSMCI_IMR_UNRE (0x1 << 31) /**< \brief (HSMCI_IMR) Underrun Interrupt Mask */ -/* -------- HSMCI_CFG : (HSMCI Offset: 0x54) Configuration Register -------- */ -#define HSMCI_CFG_FIFOMODE (0x1 << 0) /**< \brief (HSMCI_CFG) HSMCI Internal FIFO control mode */ -#define HSMCI_CFG_FERRCTRL (0x1 << 4) /**< \brief (HSMCI_CFG) Flow Error flag reset control mode */ -#define HSMCI_CFG_HSMODE (0x1 << 8) /**< \brief (HSMCI_CFG) High Speed Mode */ -#define HSMCI_CFG_LSYNC (0x1 << 12) /**< \brief (HSMCI_CFG) Synchronize on the last block */ -/* -------- HSMCI_WPMR : (HSMCI Offset: 0xE4) Write Protection Mode Register -------- */ -#define HSMCI_WPMR_WP_EN (0x1 << 0) /**< \brief (HSMCI_WPMR) Write Protection Enable */ -#define HSMCI_WPMR_WP_KEY (0xffffff << 8) /**< \brief (HSMCI_WPMR) Write Protection Key password */ -/* -------- HSMCI_WPSR : (HSMCI Offset: 0xE8) Write Protection Status Register -------- */ -#define HSMCI_WPSR_WP_VS (0xf << 0) /**< \brief (HSMCI_WPSR) Write Protection Violation Status */ -#define HSMCI_WPSR_WP_VSRC (0xffff << 8) /**< \brief (HSMCI_WPSR) Write Protection Violation SouRCe */ -/* -------- HSMCI_RPR : (HSMCI Offset: 0x100) Receive Pointer Register -------- */ -#define HSMCI_RPR_RXPTR (0xffffffff << 0) /**< \brief (HSMCI_RPR) Receive Pointer Register */ -/* -------- HSMCI_RCR : (HSMCI Offset: 0x104) Receive Counter Register -------- */ -#define HSMCI_RCR_RXCTR (0xffff << 0) /**< \brief (HSMCI_RCR) Receive Counter Register */ -/* -------- HSMCI_TPR : (HSMCI Offset: 0x108) Transmit Pointer Register -------- */ -#define HSMCI_TPR_TXPTR (0xffffffff << 0) /**< \brief (HSMCI_TPR) Transmit Counter Register */ -/* -------- HSMCI_TCR : (HSMCI Offset: 0x10C) Transmit Counter Register -------- */ -#define HSMCI_TCR_TXCTR (0xffff << 0) /**< \brief (HSMCI_TCR) Transmit Counter Register */ -/* -------- HSMCI_RNPR : (HSMCI Offset: 0x110) Receive Next Pointer Register -------- */ -#define HSMCI_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (HSMCI_RNPR) Receive Next Pointer */ -/* -------- HSMCI_RNCR : (HSMCI Offset: 0x114) Receive Next Counter Register -------- */ -#define HSMCI_RNCR_RXNCTR (0xffff << 0) /**< \brief (HSMCI_RNCR) Receive Next Counter */ -/* -------- HSMCI_TNPR : (HSMCI Offset: 0x118) Transmit Next Pointer Register -------- */ -#define HSMCI_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (HSMCI_TNPR) Transmit Next Pointer */ -/* -------- HSMCI_TNCR : (HSMCI Offset: 0x11C) Transmit Next Counter Register -------- */ -#define HSMCI_TNCR_TXNCTR (0xffff << 0) /**< \brief (HSMCI_TNCR) Transmit Counter Next */ -/* -------- HSMCI_PTCR : (HSMCI Offset: 0x120) Transfer Control Register -------- */ -#define HSMCI_PTCR_RXTEN (0x1 << 0) /**< \brief (HSMCI_PTCR) Receiver Transfer Enable */ -#define HSMCI_PTCR_RXTDIS (0x1 << 1) /**< \brief (HSMCI_PTCR) Receiver Transfer Disable */ -#define HSMCI_PTCR_TXTEN (0x1 << 8) /**< \brief (HSMCI_PTCR) Transmitter Transfer Enable */ -#define HSMCI_PTCR_TXTDIS (0x1 << 9) /**< \brief (HSMCI_PTCR) Transmitter Transfer Disable */ -/* -------- HSMCI_PTSR : (HSMCI Offset: 0x124) Transfer Status Register -------- */ -#define HSMCI_PTSR_RXTEN (0x1 << 0) /**< \brief (HSMCI_PTSR) Receiver Transfer Enable */ -#define HSMCI_PTSR_TXTEN (0x1 << 8) /**< \brief (HSMCI_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR AHB Bus Matrix */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_MATRIX AHB Bus Matrix */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Matrix hardware registers */ -typedef struct { - RwReg MATRIX_MCFG[4]; /**< \brief (Matrix Offset: 0x0000) Master Configuration Register */ - RwReg Reserved1[12]; - RwReg MATRIX_SCFG[5]; /**< \brief (Matrix Offset: 0x0040) Slave Configuration Register */ - RwReg Reserved2[11]; - RwReg MATRIX_PRAS0; /**< \brief (Matrix Offset: 0x0080) Priority Register A for Slave 0 */ - RwReg Reserved3[1]; - RwReg MATRIX_PRAS1; /**< \brief (Matrix Offset: 0x0088) Priority Register A for Slave 1 */ - RwReg Reserved4[1]; - RwReg MATRIX_PRAS2; /**< \brief (Matrix Offset: 0x0090) Priority Register A for Slave 2 */ - RwReg Reserved5[1]; - RwReg MATRIX_PRAS3; /**< \brief (Matrix Offset: 0x0098) Priority Register A for Slave 3 */ - RwReg Reserved6[1]; - RwReg MATRIX_PRAS4; /**< \brief (Matrix Offset: 0x00A0) Priority Register A for Slave 4 */ - RwReg Reserved7[28]; - RwReg CCFG_SYSIO; /**< \brief (Matrix Offset: 0x0114) System IO Configuration register */ - RwReg Reserved8[1]; - RwReg CCFG_SMCNFCS; /**< \brief (Matrix Offset: 0x011C) SMC Chip Select NAND Flash Assignment Register */ - RwReg Reserved9[49]; - RwReg MATRIX_WPMR; /**< \brief (Matrix Offset: 0x1E4) Write Protect Mode Register */ - RoReg MATRIX_WPSR; /**< \brief (Matrix Offset: 0x1E8) Write Protect Status Register */ -} Matrix; -#endif /* __ASSEMBLY__ */ -/* -------- MATRIX_MCFG[4] : (MATRIX Offset: 0x0000) Master Configuration Register -------- */ -#define MATRIX_MCFG_ULBT (0x7 << 0) /**< \brief (MATRIX_MCFG[4]) Undefined Length Burst Type */ -/* -------- MATRIX_SCFG[5] : (MATRIX Offset: 0x0040) Slave Configuration Register -------- */ -#define MATRIX_SCFG_SLOT_CYCLE (0xff << 0) /**< \brief (MATRIX_SCFG[5]) Maximum Number of Allowed Cycles for a Burst */ -#define MATRIX_SCFG_DEFMSTR_TYPE (0x3 << 16) /**< \brief (MATRIX_SCFG[5]) Default Master Type */ -#define MATRIX_SCFG_FIXED_DEFMSTR (0x7 << 18) /**< \brief (MATRIX_SCFG[5]) Fixed Default Master */ -#define MATRIX_SCFG_ARBT (0x3 << 24) /**< \brief (MATRIX_SCFG[5]) Arbitration Type */ -/* -------- MATRIX_PRAS0 : (MATRIX Offset: 0x0080) Priority Register A for Slave 0 -------- */ -#define MATRIX_PRAS0_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS0) Master 0 Priority */ -#define MATRIX_PRAS0_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS0) Master 1 Priority */ -#define MATRIX_PRAS0_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS0) Master 2 Priority */ -#define MATRIX_PRAS0_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS0) Master 3 Priority */ -#define MATRIX_PRAS0_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS0) Master 4 Priority */ -/* -------- MATRIX_PRAS1 : (MATRIX Offset: 0x0088) Priority Register A for Slave 1 -------- */ -#define MATRIX_PRAS1_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS1) Master 0 Priority */ -#define MATRIX_PRAS1_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS1) Master 1 Priority */ -#define MATRIX_PRAS1_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS1) Master 2 Priority */ -#define MATRIX_PRAS1_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS1) Master 3 Priority */ -#define MATRIX_PRAS1_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS1) Master 4 Priority */ -/* -------- MATRIX_PRAS2 : (MATRIX Offset: 0x0090) Priority Register A for Slave 2 -------- */ -#define MATRIX_PRAS2_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS2) Master 0 Priority */ -#define MATRIX_PRAS2_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS2) Master 1 Priority */ -#define MATRIX_PRAS2_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS2) Master 2 Priority */ -#define MATRIX_PRAS2_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS2) Master 3 Priority */ -#define MATRIX_PRAS2_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS2) Master 4 Priority */ -/* -------- MATRIX_PRAS3 : (MATRIX Offset: 0x0098) Priority Register A for Slave 3 -------- */ -#define MATRIX_PRAS3_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS3) Master 0 Priority */ -#define MATRIX_PRAS3_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS3) Master 1 Priority */ -#define MATRIX_PRAS3_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS3) Master 2 Priority */ -#define MATRIX_PRAS3_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS3) Master 3 Priority */ -#define MATRIX_PRAS3_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS3) Master 4 Priority */ -/* -------- MATRIX_PRAS4 : (MATRIX Offset: 0x00A0) Priority Register A for Slave 4 -------- */ -#define MATRIX_PRAS4_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS4) Master 0 Priority */ -#define MATRIX_PRAS4_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS4) Master 1 Priority */ -#define MATRIX_PRAS4_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS4) Master 2 Priority */ -#define MATRIX_PRAS4_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS4) Master 3 Priority */ -#define MATRIX_PRAS4_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS4) Master 4 Priority */ -/* -------- CCFG_SYSIO : (MATRIX Offset: 0x0114) System IO Configuration register -------- */ -#define CCFG_SYSIO_SYSIO4 (0x1 << 4) /**< \brief (CCFG_SYSIO) PB4 or TDI Assignment */ -#define CCFG_SYSIO_SYSIO5 (0x1 << 5) /**< \brief (CCFG_SYSIO) PB5 or TDO/TRACESWO Assignment */ -#define CCFG_SYSIO_SYSIO6 (0x1 << 6) /**< \brief (CCFG_SYSIO) PB6 or TMS/SWDIO Assignment */ -#define CCFG_SYSIO_SYSIO7 (0x1 << 7) /**< \brief (CCFG_SYSIO) PB7 or TCK/SWCLK Assignment */ -#define CCFG_SYSIO_SYSIO10 (0x1 << 10) /**< \brief (CCFG_SYSIO) PB10 or DDM Assignment */ -#define CCFG_SYSIO_SYSIO11 (0x1 << 11) /**< \brief (CCFG_SYSIO) PB11 or DDP Assignment */ -#define CCFG_SYSIO_SYSIO12 (0x1 << 12) /**< \brief (CCFG_SYSIO) PB12 or ERASE Assignment */ -/* -------- CCFG_SMCNFCS : (MATRIX Offset: 0x011C) SMC Chip Select NAND Flash Assignment Register -------- */ -#define CCFG_SMCNFCS_SMC_NFCS0 (0x1 << 0) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 0 Assignment */ -#define CCFG_SMCNFCS_SMC_NFCS1 (0x1 << 1) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 1 Assignment */ -#define CCFG_SMCNFCS_SMC_NFCS2 (0x1 << 2) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 2 Assignment */ -#define CCFG_SMCNFCS_SMC_NFCS3 (0x1 << 3) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 3 Assignment */ -/* -------- MATRIX_WPMR : (MATRIX Offset: 0x1E4) Write Protect Mode Register -------- */ -#define MATRIX_WPMR_WPEN (0x1 << 0) /**< \brief (MATRIX_WPMR) Write Protect ENable */ -#define MATRIX_WPMR_WPKEY (0xffffff << 8) /**< \brief (MATRIX_WPMR) Write Protect KEY (Write-only) */ -/* -------- MATRIX_WPSR : (MATRIX Offset: 0x1E8) Write Protect Status Register -------- */ -#define MATRIX_WPSR_WPVS (0x1 << 0) /**< \brief (MATRIX_WPSR) Write Protect Violation Status */ -#define MATRIX_WPSR_WPVSRC (0xffff << 8) /**< \brief (MATRIX_WPSR) Write Protect Violation Source */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Peripheral DMA Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_PDC Peripheral DMA Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pdc hardware registers */ -typedef struct { - RwReg Reserved1[64]; - RwReg PERIPH_RPR; /**< \brief (Pdc Offset: 0x100) Receive Pointer Register */ - RwReg PERIPH_RCR; /**< \brief (Pdc Offset: 0x104) Receive Counter Register */ - RwReg PERIPH_TPR; /**< \brief (Pdc Offset: 0x108) Transmit Pointer Register */ - RwReg PERIPH_TCR; /**< \brief (Pdc Offset: 0x10C) Transmit Counter Register */ - RwReg PERIPH_RNPR; /**< \brief (Pdc Offset: 0x110) Receive Next Pointer Register */ - RwReg PERIPH_RNCR; /**< \brief (Pdc Offset: 0x114) Receive Next Counter Register */ - RwReg PERIPH_TNPR; /**< \brief (Pdc Offset: 0x118) Transmit Next Pointer Register */ - RwReg PERIPH_TNCR; /**< \brief (Pdc Offset: 0x11C) Transmit Next Counter Register */ - WoReg PERIPH_PTCR; /**< \brief (Pdc Offset: 0x120) Transfer Control Register */ - RoReg PERIPH_PTSR; /**< \brief (Pdc Offset: 0x124) Transfer Status Register */ -} Pdc; -#endif /* __ASSEMBLY__ */ -/* -------- PERIPH_RPR : (PDC Offset: 0x100) Receive Pointer Register -------- */ -#define PERIPH_RPR_RXPTR (0xffffffff << 0) /**< \brief (PERIPH_RPR) Receive Pointer Register */ -/* -------- PERIPH_RCR : (PDC Offset: 0x104) Receive Counter Register -------- */ -#define PERIPH_RCR_RXCTR (0xffff << 0) /**< \brief (PERIPH_RCR) Receive Counter Register */ -/* -------- PERIPH_TPR : (PDC Offset: 0x108) Transmit Pointer Register -------- */ -#define PERIPH_TPR_TXPTR (0xffffffff << 0) /**< \brief (PERIPH_TPR) Transmit Counter Register */ -/* -------- PERIPH_TCR : (PDC Offset: 0x10C) Transmit Counter Register -------- */ -#define PERIPH_TCR_TXCTR (0xffff << 0) /**< \brief (PERIPH_TCR) Transmit Counter Register */ -/* -------- PERIPH_RNPR : (PDC Offset: 0x110) Receive Next Pointer Register -------- */ -#define PERIPH_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (PERIPH_RNPR) Receive Next Pointer */ -/* -------- PERIPH_RNCR : (PDC Offset: 0x114) Receive Next Counter Register -------- */ -#define PERIPH_RNCR_RXNCTR (0xffff << 0) /**< \brief (PERIPH_RNCR) Receive Next Counter */ -/* -------- PERIPH_TNPR : (PDC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define PERIPH_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (PERIPH_TNPR) Transmit Next Pointer */ -/* -------- PERIPH_TNCR : (PDC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define PERIPH_TNCR_TXNCTR (0xffff << 0) /**< \brief (PERIPH_TNCR) Transmit Counter Next */ -/* -------- PERIPH_PTCR : (PDC Offset: 0x120) Transfer Control Register -------- */ -#define PERIPH_PTCR_RXTEN (0x1 << 0) /**< \brief (PERIPH_PTCR) Receiver Transfer Enable */ -#define PERIPH_PTCR_RXTDIS (0x1 << 1) /**< \brief (PERIPH_PTCR) Receiver Transfer Disable */ -#define PERIPH_PTCR_TXTEN (0x1 << 8) /**< \brief (PERIPH_PTCR) Transmitter Transfer Enable */ -#define PERIPH_PTCR_TXTDIS (0x1 << 9) /**< \brief (PERIPH_PTCR) Transmitter Transfer Disable */ -/* -------- PERIPH_PTSR : (PDC Offset: 0x124) Transfer Status Register -------- */ -#define PERIPH_PTSR_RXTEN (0x1 << 0) /**< \brief (PERIPH_PTSR) Receiver Transfer Enable */ -#define PERIPH_PTSR_TXTEN (0x1 << 8) /**< \brief (PERIPH_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Parallel Input/Output */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_PIO Parallel Input/Output */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pio hardware registers */ -typedef struct { - WoReg PIO_PER; /**< \brief (Pio Offset: 0x0000) PIO Enable Register */ - WoReg PIO_PDR; /**< \brief (Pio Offset: 0x0004) PIO Disable Register */ - RoReg PIO_PSR; /**< \brief (Pio Offset: 0x0008) PIO Status Register */ - RwReg Reserved1[1]; - WoReg PIO_OER; /**< \brief (Pio Offset: 0x0010) Output Enable Register */ - WoReg PIO_ODR; /**< \brief (Pio Offset: 0x0014) Output Disable Register */ - RoReg PIO_OSR; /**< \brief (Pio Offset: 0x0018) Output Status Register */ - RwReg Reserved2[1]; - WoReg PIO_IFER; /**< \brief (Pio Offset: 0x0020) Glitch Input Filter Enable Register */ - WoReg PIO_IFDR; /**< \brief (Pio Offset: 0x0024) Glitch Input Filter Disable Register */ - RoReg PIO_IFSR; /**< \brief (Pio Offset: 0x0028) Glitch Input Filter Status Register */ - RwReg Reserved3[1]; - WoReg PIO_SODR; /**< \brief (Pio Offset: 0x0030) Set Output Data Register */ - WoReg PIO_CODR; /**< \brief (Pio Offset: 0x0034) Clear Output Data Register */ - RwReg PIO_ODSR; /**< \brief (Pio Offset: 0x0038) Output Data Status Register */ - RoReg PIO_PDSR; /**< \brief (Pio Offset: 0x003C) Pin Data Status Register */ - WoReg PIO_IER; /**< \brief (Pio Offset: 0x0040) Interrupt Enable Register */ - WoReg PIO_IDR; /**< \brief (Pio Offset: 0x0044) Interrupt Disable Register */ - RoReg PIO_IMR; /**< \brief (Pio Offset: 0x0048) Interrupt Mask Register */ - RoReg PIO_ISR; /**< \brief (Pio Offset: 0x004C) Interrupt Status Register */ - WoReg PIO_MDER; /**< \brief (Pio Offset: 0x0050) Multi-driver Enable Register */ - WoReg PIO_MDDR; /**< \brief (Pio Offset: 0x0054) Multi-driver Disable Register */ - RoReg PIO_MDSR; /**< \brief (Pio Offset: 0x0058) Multi-driver Status Register */ - RwReg Reserved4[1]; - WoReg PIO_PUDR; /**< \brief (Pio Offset: 0x0060) Pull-up Disable Register */ - WoReg PIO_PUER; /**< \brief (Pio Offset: 0x0064) Pull-up Enable Register */ - RoReg PIO_PUSR; /**< \brief (Pio Offset: 0x0068) Pad Pull-up Status Register */ - RwReg Reserved5[1]; - RwReg PIO_ABCDSR[2]; /**< \brief (Pio Offset: 0x0070) Peripheral Select Register */ - RwReg Reserved6[2]; - WoReg PIO_SCIFSR; /**< \brief (Pio Offset: 0x0080) System Clock Glitch Input Filter Select Register */ - WoReg PIO_DIFSR; /**< \brief (Pio Offset: 0x0084) Debouncing Input Filter Select Register */ - RoReg PIO_IFDGSR; /**< \brief (Pio Offset: 0x0088) Glitch or Debouncing Input Filter Clock Selection Status Register */ - RwReg PIO_SCDR; /**< \brief (Pio Offset: 0x008C) Slow Clock Divider Debouncing Register */ - WoReg PIO_PPDDR; /**< \brief (Pio Offset: 0x0090) Pad Pull-down Disable Register */ - WoReg PIO_PPDER; /**< \brief (Pio Offset: 0x0094) Pad Pull-down Enable Register */ - RoReg PIO_PPDSR; /**< \brief (Pio Offset: 0x0098) Pad Pull-down Status Register */ - RwReg Reserved7[1]; - WoReg PIO_OWER; /**< \brief (Pio Offset: 0x00A0) Output Write Enable */ - WoReg PIO_OWDR; /**< \brief (Pio Offset: 0x00A4) Output Write Disable */ - RoReg PIO_OWSR; /**< \brief (Pio Offset: 0x00A8) Output Write Status Register */ - RwReg Reserved8[1]; - WoReg PIO_AIMER; /**< \brief (Pio Offset: 0x00B0) Additional Interrupt Modes Enable Register */ - WoReg PIO_AIMDR; /**< \brief (Pio Offset: 0x00B4) Additional Interrupt Modes Disables Register */ - RoReg PIO_AIMMR; /**< \brief (Pio Offset: 0x00B8) Additional Interrupt Modes Mask Register */ - RwReg Reserved9[1]; - WoReg PIO_ESR; /**< \brief (Pio Offset: 0x00C0) Edge Select Register */ - WoReg PIO_LSR; /**< \brief (Pio Offset: 0x00C4) Level Select Register */ - RoReg PIO_ELSR; /**< \brief (Pio Offset: 0x00C8) Edge/Level Status Register */ - RwReg Reserved10[1]; - WoReg PIO_FELLSR; /**< \brief (Pio Offset: 0x00D0) Falling Edge/Low Level Select Register */ - WoReg PIO_REHLSR; /**< \brief (Pio Offset: 0x00D4) Rising Edge/ High Level Select Register */ - RoReg PIO_FRLHSR; /**< \brief (Pio Offset: 0x00D8) Fall/Rise - Low/High Status Register */ - RwReg Reserved11[1]; - RoReg PIO_LOCKSR; /**< \brief (Pio Offset: 0x00E0) Lock Status */ - RwReg PIO_WPMR; /**< \brief (Pio Offset: 0x00E4) Write Protect Mode Register */ - RoReg PIO_WPSR; /**< \brief (Pio Offset: 0x00E8) Write Protect Status Register */ - RwReg Reserved12[5]; - RwReg PIO_SCHMITT; /**< \brief (Pio Offset: 0x0100) Schmitt Trigger Register */ - RwReg Reserved13[19]; - RwReg PIO_PCMR; /**< \brief (Pio Offset: 0x150) Parallel Capture Mode Register */ - WoReg PIO_PCIER; /**< \brief (Pio Offset: 0x154) Parallel Capture Interrupt Enable Register */ - WoReg PIO_PCIDR; /**< \brief (Pio Offset: 0x158) Parallel Capture Interrupt Disable Register */ - RoReg PIO_PCIMR; /**< \brief (Pio Offset: 0x15C) Parallel Capture Interrupt Mask Register */ - RoReg PIO_PCISR; /**< \brief (Pio Offset: 0x160) Parallel Capture Interrupt Status Register */ - RoReg PIO_PCRHR; /**< \brief (Pio Offset: 0x164) Parallel Capture Reception Holding Register */ -} Pio; -#endif /* __ASSEMBLY__ */ -/* -------- PIO_PER : (PIO Offset: 0x0000) PIO Enable Register -------- */ -#define PIO_PER_P0 (0x1 << 0) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P1 (0x1 << 1) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P2 (0x1 << 2) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P3 (0x1 << 3) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P4 (0x1 << 4) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P5 (0x1 << 5) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P6 (0x1 << 6) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P7 (0x1 << 7) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P8 (0x1 << 8) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P9 (0x1 << 9) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P10 (0x1 << 10) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P11 (0x1 << 11) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P12 (0x1 << 12) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P13 (0x1 << 13) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P14 (0x1 << 14) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P15 (0x1 << 15) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P16 (0x1 << 16) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P17 (0x1 << 17) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P18 (0x1 << 18) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P19 (0x1 << 19) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P20 (0x1 << 20) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P21 (0x1 << 21) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P22 (0x1 << 22) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P23 (0x1 << 23) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P24 (0x1 << 24) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P25 (0x1 << 25) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P26 (0x1 << 26) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P27 (0x1 << 27) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P28 (0x1 << 28) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P29 (0x1 << 29) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P30 (0x1 << 30) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P31 (0x1 << 31) /**< \brief (PIO_PER) PIO Enable */ -/* -------- PIO_PDR : (PIO Offset: 0x0004) PIO Disable Register -------- */ -#define PIO_PDR_P0 (0x1 << 0) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P1 (0x1 << 1) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P2 (0x1 << 2) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P3 (0x1 << 3) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P4 (0x1 << 4) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P5 (0x1 << 5) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P6 (0x1 << 6) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P7 (0x1 << 7) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P8 (0x1 << 8) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P9 (0x1 << 9) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P10 (0x1 << 10) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P11 (0x1 << 11) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P12 (0x1 << 12) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P13 (0x1 << 13) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P14 (0x1 << 14) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P15 (0x1 << 15) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P16 (0x1 << 16) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P17 (0x1 << 17) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P18 (0x1 << 18) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P19 (0x1 << 19) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P20 (0x1 << 20) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P21 (0x1 << 21) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P22 (0x1 << 22) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P23 (0x1 << 23) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P24 (0x1 << 24) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P25 (0x1 << 25) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P26 (0x1 << 26) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P27 (0x1 << 27) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P28 (0x1 << 28) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P29 (0x1 << 29) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P30 (0x1 << 30) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P31 (0x1 << 31) /**< \brief (PIO_PDR) PIO Disable */ -/* -------- PIO_PSR : (PIO Offset: 0x0008) PIO Status Register -------- */ -#define PIO_PSR_P0 (0x1 << 0) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P1 (0x1 << 1) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P2 (0x1 << 2) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P3 (0x1 << 3) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P4 (0x1 << 4) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P5 (0x1 << 5) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P6 (0x1 << 6) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P7 (0x1 << 7) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P8 (0x1 << 8) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P9 (0x1 << 9) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P10 (0x1 << 10) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P11 (0x1 << 11) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P12 (0x1 << 12) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P13 (0x1 << 13) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P14 (0x1 << 14) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P15 (0x1 << 15) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P16 (0x1 << 16) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P17 (0x1 << 17) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P18 (0x1 << 18) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P19 (0x1 << 19) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P20 (0x1 << 20) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P21 (0x1 << 21) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P22 (0x1 << 22) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P23 (0x1 << 23) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P24 (0x1 << 24) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P25 (0x1 << 25) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P26 (0x1 << 26) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P27 (0x1 << 27) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P28 (0x1 << 28) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P29 (0x1 << 29) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P30 (0x1 << 30) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P31 (0x1 << 31) /**< \brief (PIO_PSR) PIO Status */ -/* -------- PIO_OER : (PIO Offset: 0x0010) Output Enable Register -------- */ -#define PIO_OER_P0 (0x1 << 0) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P1 (0x1 << 1) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P2 (0x1 << 2) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P3 (0x1 << 3) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P4 (0x1 << 4) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P5 (0x1 << 5) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P6 (0x1 << 6) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P7 (0x1 << 7) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P8 (0x1 << 8) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P9 (0x1 << 9) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P10 (0x1 << 10) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P11 (0x1 << 11) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P12 (0x1 << 12) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P13 (0x1 << 13) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P14 (0x1 << 14) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P15 (0x1 << 15) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P16 (0x1 << 16) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P17 (0x1 << 17) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P18 (0x1 << 18) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P19 (0x1 << 19) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P20 (0x1 << 20) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P21 (0x1 << 21) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P22 (0x1 << 22) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P23 (0x1 << 23) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P24 (0x1 << 24) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P25 (0x1 << 25) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P26 (0x1 << 26) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P27 (0x1 << 27) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P28 (0x1 << 28) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P29 (0x1 << 29) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P30 (0x1 << 30) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P31 (0x1 << 31) /**< \brief (PIO_OER) Output Enable */ -/* -------- PIO_ODR : (PIO Offset: 0x0014) Output Disable Register -------- */ -#define PIO_ODR_P0 (0x1 << 0) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P1 (0x1 << 1) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P2 (0x1 << 2) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P3 (0x1 << 3) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P4 (0x1 << 4) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P5 (0x1 << 5) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P6 (0x1 << 6) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P7 (0x1 << 7) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P8 (0x1 << 8) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P9 (0x1 << 9) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P10 (0x1 << 10) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P11 (0x1 << 11) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P12 (0x1 << 12) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P13 (0x1 << 13) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P14 (0x1 << 14) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P15 (0x1 << 15) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P16 (0x1 << 16) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P17 (0x1 << 17) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P18 (0x1 << 18) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P19 (0x1 << 19) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P20 (0x1 << 20) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P21 (0x1 << 21) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P22 (0x1 << 22) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P23 (0x1 << 23) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P24 (0x1 << 24) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P25 (0x1 << 25) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P26 (0x1 << 26) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P27 (0x1 << 27) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P28 (0x1 << 28) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P29 (0x1 << 29) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P30 (0x1 << 30) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P31 (0x1 << 31) /**< \brief (PIO_ODR) Output Disable */ -/* -------- PIO_OSR : (PIO Offset: 0x0018) Output Status Register -------- */ -#define PIO_OSR_P0 (0x1 << 0) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P1 (0x1 << 1) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P2 (0x1 << 2) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P3 (0x1 << 3) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P4 (0x1 << 4) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P5 (0x1 << 5) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P6 (0x1 << 6) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P7 (0x1 << 7) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P8 (0x1 << 8) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P9 (0x1 << 9) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P10 (0x1 << 10) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P11 (0x1 << 11) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P12 (0x1 << 12) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P13 (0x1 << 13) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P14 (0x1 << 14) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P15 (0x1 << 15) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P16 (0x1 << 16) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P17 (0x1 << 17) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P18 (0x1 << 18) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P19 (0x1 << 19) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P20 (0x1 << 20) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P21 (0x1 << 21) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P22 (0x1 << 22) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P23 (0x1 << 23) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P24 (0x1 << 24) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P25 (0x1 << 25) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P26 (0x1 << 26) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P27 (0x1 << 27) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P28 (0x1 << 28) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P29 (0x1 << 29) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P30 (0x1 << 30) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P31 (0x1 << 31) /**< \brief (PIO_OSR) Output Status */ -/* -------- PIO_IFER : (PIO Offset: 0x0020) Glitch Input Filter Enable Register -------- */ -#define PIO_IFER_P0 (0x1 << 0) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P1 (0x1 << 1) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P2 (0x1 << 2) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P3 (0x1 << 3) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P4 (0x1 << 4) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P5 (0x1 << 5) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P6 (0x1 << 6) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P7 (0x1 << 7) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P8 (0x1 << 8) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P9 (0x1 << 9) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P10 (0x1 << 10) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P11 (0x1 << 11) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P12 (0x1 << 12) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P13 (0x1 << 13) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P14 (0x1 << 14) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P15 (0x1 << 15) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P16 (0x1 << 16) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P17 (0x1 << 17) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P18 (0x1 << 18) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P19 (0x1 << 19) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P20 (0x1 << 20) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P21 (0x1 << 21) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P22 (0x1 << 22) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P23 (0x1 << 23) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P24 (0x1 << 24) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P25 (0x1 << 25) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P26 (0x1 << 26) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P27 (0x1 << 27) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P28 (0x1 << 28) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P29 (0x1 << 29) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P30 (0x1 << 30) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P31 (0x1 << 31) /**< \brief (PIO_IFER) Input Filter Enable */ -/* -------- PIO_IFDR : (PIO Offset: 0x0024) Glitch Input Filter Disable Register -------- */ -#define PIO_IFDR_P0 (0x1 << 0) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P1 (0x1 << 1) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P2 (0x1 << 2) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P3 (0x1 << 3) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P4 (0x1 << 4) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P5 (0x1 << 5) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P6 (0x1 << 6) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P7 (0x1 << 7) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P8 (0x1 << 8) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P9 (0x1 << 9) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P10 (0x1 << 10) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P11 (0x1 << 11) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P12 (0x1 << 12) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P13 (0x1 << 13) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P14 (0x1 << 14) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P15 (0x1 << 15) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P16 (0x1 << 16) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P17 (0x1 << 17) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P18 (0x1 << 18) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P19 (0x1 << 19) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P20 (0x1 << 20) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P21 (0x1 << 21) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P22 (0x1 << 22) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P23 (0x1 << 23) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P24 (0x1 << 24) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P25 (0x1 << 25) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P26 (0x1 << 26) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P27 (0x1 << 27) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P28 (0x1 << 28) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P29 (0x1 << 29) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P30 (0x1 << 30) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P31 (0x1 << 31) /**< \brief (PIO_IFDR) Input Filter Disable */ -/* -------- PIO_IFSR : (PIO Offset: 0x0028) Glitch Input Filter Status Register -------- */ -#define PIO_IFSR_P0 (0x1 << 0) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P1 (0x1 << 1) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P2 (0x1 << 2) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P3 (0x1 << 3) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P4 (0x1 << 4) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P5 (0x1 << 5) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P6 (0x1 << 6) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P7 (0x1 << 7) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P8 (0x1 << 8) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P9 (0x1 << 9) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P10 (0x1 << 10) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P11 (0x1 << 11) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P12 (0x1 << 12) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P13 (0x1 << 13) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P14 (0x1 << 14) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P15 (0x1 << 15) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P16 (0x1 << 16) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P17 (0x1 << 17) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P18 (0x1 << 18) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P19 (0x1 << 19) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P20 (0x1 << 20) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P21 (0x1 << 21) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P22 (0x1 << 22) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P23 (0x1 << 23) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P24 (0x1 << 24) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P25 (0x1 << 25) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P26 (0x1 << 26) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P27 (0x1 << 27) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P28 (0x1 << 28) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P29 (0x1 << 29) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P30 (0x1 << 30) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P31 (0x1 << 31) /**< \brief (PIO_IFSR) Input Filer Status */ -/* -------- PIO_SODR : (PIO Offset: 0x0030) Set Output Data Register -------- */ -#define PIO_SODR_P0 (0x1 << 0) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P1 (0x1 << 1) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P2 (0x1 << 2) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P3 (0x1 << 3) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P4 (0x1 << 4) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P5 (0x1 << 5) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P6 (0x1 << 6) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P7 (0x1 << 7) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P8 (0x1 << 8) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P9 (0x1 << 9) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P10 (0x1 << 10) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P11 (0x1 << 11) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P12 (0x1 << 12) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P13 (0x1 << 13) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P14 (0x1 << 14) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P15 (0x1 << 15) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P16 (0x1 << 16) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P17 (0x1 << 17) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P18 (0x1 << 18) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P19 (0x1 << 19) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P20 (0x1 << 20) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P21 (0x1 << 21) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P22 (0x1 << 22) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P23 (0x1 << 23) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P24 (0x1 << 24) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P25 (0x1 << 25) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P26 (0x1 << 26) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P27 (0x1 << 27) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P28 (0x1 << 28) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P29 (0x1 << 29) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P30 (0x1 << 30) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P31 (0x1 << 31) /**< \brief (PIO_SODR) Set Output Data */ -/* -------- PIO_CODR : (PIO Offset: 0x0034) Clear Output Data Register -------- */ -#define PIO_CODR_P0 (0x1 << 0) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P1 (0x1 << 1) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P2 (0x1 << 2) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P3 (0x1 << 3) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P4 (0x1 << 4) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P5 (0x1 << 5) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P6 (0x1 << 6) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P7 (0x1 << 7) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P8 (0x1 << 8) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P9 (0x1 << 9) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P10 (0x1 << 10) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P11 (0x1 << 11) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P12 (0x1 << 12) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P13 (0x1 << 13) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P14 (0x1 << 14) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P15 (0x1 << 15) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P16 (0x1 << 16) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P17 (0x1 << 17) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P18 (0x1 << 18) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P19 (0x1 << 19) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P20 (0x1 << 20) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P21 (0x1 << 21) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P22 (0x1 << 22) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P23 (0x1 << 23) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P24 (0x1 << 24) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P25 (0x1 << 25) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P26 (0x1 << 26) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P27 (0x1 << 27) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P28 (0x1 << 28) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P29 (0x1 << 29) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P30 (0x1 << 30) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P31 (0x1 << 31) /**< \brief (PIO_CODR) Clear Output Data */ -/* -------- PIO_ODSR : (PIO Offset: 0x0038) Output Data Status Register -------- */ -#define PIO_ODSR_P0 (0x1 << 0) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P1 (0x1 << 1) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P2 (0x1 << 2) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P3 (0x1 << 3) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P4 (0x1 << 4) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P5 (0x1 << 5) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P6 (0x1 << 6) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P7 (0x1 << 7) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P8 (0x1 << 8) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P9 (0x1 << 9) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P10 (0x1 << 10) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P11 (0x1 << 11) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P12 (0x1 << 12) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P13 (0x1 << 13) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P14 (0x1 << 14) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P15 (0x1 << 15) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P16 (0x1 << 16) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P17 (0x1 << 17) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P18 (0x1 << 18) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P19 (0x1 << 19) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P20 (0x1 << 20) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P21 (0x1 << 21) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P22 (0x1 << 22) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P23 (0x1 << 23) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P24 (0x1 << 24) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P25 (0x1 << 25) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P26 (0x1 << 26) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P27 (0x1 << 27) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P28 (0x1 << 28) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P29 (0x1 << 29) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P30 (0x1 << 30) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P31 (0x1 << 31) /**< \brief (PIO_ODSR) Output Data Status */ -/* -------- PIO_PDSR : (PIO Offset: 0x003C) Pin Data Status Register -------- */ -#define PIO_PDSR_P0 (0x1 << 0) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P1 (0x1 << 1) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P2 (0x1 << 2) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P3 (0x1 << 3) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P4 (0x1 << 4) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P5 (0x1 << 5) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P6 (0x1 << 6) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P7 (0x1 << 7) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P8 (0x1 << 8) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P9 (0x1 << 9) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P10 (0x1 << 10) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P11 (0x1 << 11) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P12 (0x1 << 12) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P13 (0x1 << 13) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P14 (0x1 << 14) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P15 (0x1 << 15) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P16 (0x1 << 16) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P17 (0x1 << 17) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P18 (0x1 << 18) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P19 (0x1 << 19) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P20 (0x1 << 20) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P21 (0x1 << 21) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P22 (0x1 << 22) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P23 (0x1 << 23) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P24 (0x1 << 24) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P25 (0x1 << 25) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P26 (0x1 << 26) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P27 (0x1 << 27) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P28 (0x1 << 28) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P29 (0x1 << 29) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P30 (0x1 << 30) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P31 (0x1 << 31) /**< \brief (PIO_PDSR) Output Data Status */ -/* -------- PIO_IER : (PIO Offset: 0x0040) Interrupt Enable Register -------- */ -#define PIO_IER_P0 (0x1 << 0) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P1 (0x1 << 1) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P2 (0x1 << 2) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P3 (0x1 << 3) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P4 (0x1 << 4) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P5 (0x1 << 5) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P6 (0x1 << 6) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P7 (0x1 << 7) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P8 (0x1 << 8) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P9 (0x1 << 9) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P10 (0x1 << 10) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P11 (0x1 << 11) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P12 (0x1 << 12) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P13 (0x1 << 13) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P14 (0x1 << 14) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P15 (0x1 << 15) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P16 (0x1 << 16) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P17 (0x1 << 17) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P18 (0x1 << 18) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P19 (0x1 << 19) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P20 (0x1 << 20) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P21 (0x1 << 21) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P22 (0x1 << 22) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P23 (0x1 << 23) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P24 (0x1 << 24) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P25 (0x1 << 25) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P26 (0x1 << 26) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P27 (0x1 << 27) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P28 (0x1 << 28) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P29 (0x1 << 29) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P30 (0x1 << 30) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P31 (0x1 << 31) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -/* -------- PIO_IDR : (PIO Offset: 0x0044) Interrupt Disable Register -------- */ -#define PIO_IDR_P0 (0x1 << 0) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P1 (0x1 << 1) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P2 (0x1 << 2) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P3 (0x1 << 3) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P4 (0x1 << 4) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P5 (0x1 << 5) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P6 (0x1 << 6) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P7 (0x1 << 7) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P8 (0x1 << 8) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P9 (0x1 << 9) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P10 (0x1 << 10) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P11 (0x1 << 11) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P12 (0x1 << 12) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P13 (0x1 << 13) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P14 (0x1 << 14) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P15 (0x1 << 15) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P16 (0x1 << 16) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P17 (0x1 << 17) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P18 (0x1 << 18) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P19 (0x1 << 19) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P20 (0x1 << 20) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P21 (0x1 << 21) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P22 (0x1 << 22) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P23 (0x1 << 23) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P24 (0x1 << 24) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P25 (0x1 << 25) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P26 (0x1 << 26) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P27 (0x1 << 27) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P28 (0x1 << 28) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P29 (0x1 << 29) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P30 (0x1 << 30) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P31 (0x1 << 31) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -/* -------- PIO_IMR : (PIO Offset: 0x0048) Interrupt Mask Register -------- */ -#define PIO_IMR_P0 (0x1 << 0) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P1 (0x1 << 1) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P2 (0x1 << 2) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P3 (0x1 << 3) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P4 (0x1 << 4) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P5 (0x1 << 5) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P6 (0x1 << 6) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P7 (0x1 << 7) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P8 (0x1 << 8) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P9 (0x1 << 9) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P10 (0x1 << 10) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P11 (0x1 << 11) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P12 (0x1 << 12) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P13 (0x1 << 13) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P14 (0x1 << 14) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P15 (0x1 << 15) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P16 (0x1 << 16) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P17 (0x1 << 17) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P18 (0x1 << 18) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P19 (0x1 << 19) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P20 (0x1 << 20) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P21 (0x1 << 21) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P22 (0x1 << 22) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P23 (0x1 << 23) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P24 (0x1 << 24) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P25 (0x1 << 25) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P26 (0x1 << 26) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P27 (0x1 << 27) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P28 (0x1 << 28) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P29 (0x1 << 29) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P30 (0x1 << 30) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P31 (0x1 << 31) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -/* -------- PIO_ISR : (PIO Offset: 0x004C) Interrupt Status Register -------- */ -#define PIO_ISR_P0 (0x1 << 0) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P1 (0x1 << 1) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P2 (0x1 << 2) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P3 (0x1 << 3) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P4 (0x1 << 4) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P5 (0x1 << 5) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P6 (0x1 << 6) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P7 (0x1 << 7) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P8 (0x1 << 8) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P9 (0x1 << 9) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P10 (0x1 << 10) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P11 (0x1 << 11) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P12 (0x1 << 12) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P13 (0x1 << 13) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P14 (0x1 << 14) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P15 (0x1 << 15) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P16 (0x1 << 16) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P17 (0x1 << 17) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P18 (0x1 << 18) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P19 (0x1 << 19) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P20 (0x1 << 20) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P21 (0x1 << 21) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P22 (0x1 << 22) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P23 (0x1 << 23) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P24 (0x1 << 24) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P25 (0x1 << 25) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P26 (0x1 << 26) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P27 (0x1 << 27) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P28 (0x1 << 28) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P29 (0x1 << 29) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P30 (0x1 << 30) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P31 (0x1 << 31) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -/* -------- PIO_MDER : (PIO Offset: 0x0050) Multi-driver Enable Register -------- */ -#define PIO_MDER_P0 (0x1 << 0) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P1 (0x1 << 1) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P2 (0x1 << 2) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P3 (0x1 << 3) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P4 (0x1 << 4) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P5 (0x1 << 5) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P6 (0x1 << 6) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P7 (0x1 << 7) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P8 (0x1 << 8) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P9 (0x1 << 9) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P10 (0x1 << 10) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P11 (0x1 << 11) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P12 (0x1 << 12) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P13 (0x1 << 13) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P14 (0x1 << 14) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P15 (0x1 << 15) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P16 (0x1 << 16) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P17 (0x1 << 17) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P18 (0x1 << 18) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P19 (0x1 << 19) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P20 (0x1 << 20) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P21 (0x1 << 21) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P22 (0x1 << 22) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P23 (0x1 << 23) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P24 (0x1 << 24) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P25 (0x1 << 25) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P26 (0x1 << 26) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P27 (0x1 << 27) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P28 (0x1 << 28) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P29 (0x1 << 29) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P30 (0x1 << 30) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P31 (0x1 << 31) /**< \brief (PIO_MDER) Multi Drive Enable. */ -/* -------- PIO_MDDR : (PIO Offset: 0x0054) Multi-driver Disable Register -------- */ -#define PIO_MDDR_P0 (0x1 << 0) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P1 (0x1 << 1) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P2 (0x1 << 2) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P3 (0x1 << 3) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P4 (0x1 << 4) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P5 (0x1 << 5) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P6 (0x1 << 6) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P7 (0x1 << 7) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P8 (0x1 << 8) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P9 (0x1 << 9) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P10 (0x1 << 10) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P11 (0x1 << 11) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P12 (0x1 << 12) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P13 (0x1 << 13) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P14 (0x1 << 14) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P15 (0x1 << 15) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P16 (0x1 << 16) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P17 (0x1 << 17) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P18 (0x1 << 18) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P19 (0x1 << 19) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P20 (0x1 << 20) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P21 (0x1 << 21) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P22 (0x1 << 22) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P23 (0x1 << 23) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P24 (0x1 << 24) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P25 (0x1 << 25) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P26 (0x1 << 26) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P27 (0x1 << 27) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P28 (0x1 << 28) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P29 (0x1 << 29) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P30 (0x1 << 30) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P31 (0x1 << 31) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -/* -------- PIO_MDSR : (PIO Offset: 0x0058) Multi-driver Status Register -------- */ -#define PIO_MDSR_P0 (0x1 << 0) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P1 (0x1 << 1) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P2 (0x1 << 2) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P3 (0x1 << 3) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P4 (0x1 << 4) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P5 (0x1 << 5) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P6 (0x1 << 6) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P7 (0x1 << 7) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P8 (0x1 << 8) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P9 (0x1 << 9) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P10 (0x1 << 10) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P11 (0x1 << 11) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P12 (0x1 << 12) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P13 (0x1 << 13) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P14 (0x1 << 14) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P15 (0x1 << 15) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P16 (0x1 << 16) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P17 (0x1 << 17) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P18 (0x1 << 18) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P19 (0x1 << 19) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P20 (0x1 << 20) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P21 (0x1 << 21) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P22 (0x1 << 22) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P23 (0x1 << 23) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P24 (0x1 << 24) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P25 (0x1 << 25) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P26 (0x1 << 26) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P27 (0x1 << 27) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P28 (0x1 << 28) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P29 (0x1 << 29) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P30 (0x1 << 30) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P31 (0x1 << 31) /**< \brief (PIO_MDSR) Multi Drive Status. */ -/* -------- PIO_PUDR : (PIO Offset: 0x0060) Pull-up Disable Register -------- */ -#define PIO_PUDR_P0 (0x1 << 0) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P1 (0x1 << 1) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P2 (0x1 << 2) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P3 (0x1 << 3) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P4 (0x1 << 4) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P5 (0x1 << 5) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P6 (0x1 << 6) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P7 (0x1 << 7) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P8 (0x1 << 8) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P9 (0x1 << 9) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P10 (0x1 << 10) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P11 (0x1 << 11) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P12 (0x1 << 12) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P13 (0x1 << 13) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P14 (0x1 << 14) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P15 (0x1 << 15) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P16 (0x1 << 16) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P17 (0x1 << 17) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P18 (0x1 << 18) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P19 (0x1 << 19) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P20 (0x1 << 20) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P21 (0x1 << 21) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P22 (0x1 << 22) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P23 (0x1 << 23) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P24 (0x1 << 24) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P25 (0x1 << 25) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P26 (0x1 << 26) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P27 (0x1 << 27) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P28 (0x1 << 28) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P29 (0x1 << 29) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P30 (0x1 << 30) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P31 (0x1 << 31) /**< \brief (PIO_PUDR) Pull Up Disable. */ -/* -------- PIO_PUER : (PIO Offset: 0x0064) Pull-up Enable Register -------- */ -#define PIO_PUER_P0 (0x1 << 0) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P1 (0x1 << 1) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P2 (0x1 << 2) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P3 (0x1 << 3) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P4 (0x1 << 4) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P5 (0x1 << 5) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P6 (0x1 << 6) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P7 (0x1 << 7) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P8 (0x1 << 8) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P9 (0x1 << 9) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P10 (0x1 << 10) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P11 (0x1 << 11) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P12 (0x1 << 12) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P13 (0x1 << 13) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P14 (0x1 << 14) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P15 (0x1 << 15) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P16 (0x1 << 16) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P17 (0x1 << 17) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P18 (0x1 << 18) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P19 (0x1 << 19) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P20 (0x1 << 20) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P21 (0x1 << 21) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P22 (0x1 << 22) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P23 (0x1 << 23) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P24 (0x1 << 24) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P25 (0x1 << 25) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P26 (0x1 << 26) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P27 (0x1 << 27) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P28 (0x1 << 28) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P29 (0x1 << 29) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P30 (0x1 << 30) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P31 (0x1 << 31) /**< \brief (PIO_PUER) Pull Up Enable. */ -/* -------- PIO_PUSR : (PIO Offset: 0x0068) Pad Pull-up Status Register -------- */ -#define PIO_PUSR_P0 (0x1 << 0) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P1 (0x1 << 1) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P2 (0x1 << 2) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P3 (0x1 << 3) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P4 (0x1 << 4) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P5 (0x1 << 5) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P6 (0x1 << 6) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P7 (0x1 << 7) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P8 (0x1 << 8) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P9 (0x1 << 9) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P10 (0x1 << 10) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P11 (0x1 << 11) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P12 (0x1 << 12) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P13 (0x1 << 13) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P14 (0x1 << 14) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P15 (0x1 << 15) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P16 (0x1 << 16) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P17 (0x1 << 17) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P18 (0x1 << 18) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P19 (0x1 << 19) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P20 (0x1 << 20) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P21 (0x1 << 21) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P22 (0x1 << 22) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P23 (0x1 << 23) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P24 (0x1 << 24) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P25 (0x1 << 25) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P26 (0x1 << 26) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P27 (0x1 << 27) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P28 (0x1 << 28) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P29 (0x1 << 29) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P30 (0x1 << 30) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P31 (0x1 << 31) /**< \brief (PIO_PUSR) Pull Up Status. */ -/* -------- PIO_ABCDSR[2] : (PIO Offset: 0x0070) Peripheral Select Register -------- */ -#define PIO_ABCDSR_P0 (0x1 << 0) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P1 (0x1 << 1) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P2 (0x1 << 2) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P3 (0x1 << 3) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P4 (0x1 << 4) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P5 (0x1 << 5) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P6 (0x1 << 6) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P7 (0x1 << 7) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P8 (0x1 << 8) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P9 (0x1 << 9) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P10 (0x1 << 10) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P11 (0x1 << 11) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P12 (0x1 << 12) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P13 (0x1 << 13) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P14 (0x1 << 14) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P15 (0x1 << 15) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P16 (0x1 << 16) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P17 (0x1 << 17) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P18 (0x1 << 18) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P19 (0x1 << 19) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P20 (0x1 << 20) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P21 (0x1 << 21) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P22 (0x1 << 22) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P23 (0x1 << 23) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P24 (0x1 << 24) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P25 (0x1 << 25) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P26 (0x1 << 26) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P27 (0x1 << 27) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P28 (0x1 << 28) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P29 (0x1 << 29) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P30 (0x1 << 30) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P31 (0x1 << 31) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -/* -------- PIO_SCIFSR : (PIO Offset: 0x0080) System Clock Glitch Input Filter Select Register -------- */ -#define PIO_SCIFSR_P0 (0x1 << 0) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P1 (0x1 << 1) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P2 (0x1 << 2) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P3 (0x1 << 3) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P4 (0x1 << 4) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P5 (0x1 << 5) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P6 (0x1 << 6) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P7 (0x1 << 7) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P8 (0x1 << 8) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P9 (0x1 << 9) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P10 (0x1 << 10) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P11 (0x1 << 11) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P12 (0x1 << 12) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P13 (0x1 << 13) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P14 (0x1 << 14) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P15 (0x1 << 15) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P16 (0x1 << 16) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P17 (0x1 << 17) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P18 (0x1 << 18) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P19 (0x1 << 19) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P20 (0x1 << 20) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P21 (0x1 << 21) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P22 (0x1 << 22) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P23 (0x1 << 23) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P24 (0x1 << 24) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P25 (0x1 << 25) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P26 (0x1 << 26) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P27 (0x1 << 27) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P28 (0x1 << 28) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P29 (0x1 << 29) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P30 (0x1 << 30) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P31 (0x1 << 31) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -/* -------- PIO_DIFSR : (PIO Offset: 0x0084) Debouncing Input Filter Select Register -------- */ -#define PIO_DIFSR_P0 (0x1 << 0) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P1 (0x1 << 1) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P2 (0x1 << 2) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P3 (0x1 << 3) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P4 (0x1 << 4) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P5 (0x1 << 5) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P6 (0x1 << 6) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P7 (0x1 << 7) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P8 (0x1 << 8) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P9 (0x1 << 9) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P10 (0x1 << 10) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P11 (0x1 << 11) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P12 (0x1 << 12) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P13 (0x1 << 13) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P14 (0x1 << 14) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P15 (0x1 << 15) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P16 (0x1 << 16) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P17 (0x1 << 17) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P18 (0x1 << 18) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P19 (0x1 << 19) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P20 (0x1 << 20) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P21 (0x1 << 21) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P22 (0x1 << 22) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P23 (0x1 << 23) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P24 (0x1 << 24) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P25 (0x1 << 25) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P26 (0x1 << 26) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P27 (0x1 << 27) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P28 (0x1 << 28) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P29 (0x1 << 29) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P30 (0x1 << 30) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P31 (0x1 << 31) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -/* -------- PIO_IFDGSR : (PIO Offset: 0x0088) Glitch or Debouncing Input Filter Clock Selection Status Register -------- */ -#define PIO_IFDGSR_P0 (0x1 << 0) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P1 (0x1 << 1) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P2 (0x1 << 2) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P3 (0x1 << 3) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P4 (0x1 << 4) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P5 (0x1 << 5) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P6 (0x1 << 6) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P7 (0x1 << 7) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P8 (0x1 << 8) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P9 (0x1 << 9) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P10 (0x1 << 10) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P11 (0x1 << 11) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P12 (0x1 << 12) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P13 (0x1 << 13) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P14 (0x1 << 14) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P15 (0x1 << 15) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P16 (0x1 << 16) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P17 (0x1 << 17) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P18 (0x1 << 18) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P19 (0x1 << 19) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P20 (0x1 << 20) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P21 (0x1 << 21) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P22 (0x1 << 22) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P23 (0x1 << 23) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P24 (0x1 << 24) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P25 (0x1 << 25) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P26 (0x1 << 26) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P27 (0x1 << 27) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P28 (0x1 << 28) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P29 (0x1 << 29) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P30 (0x1 << 30) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P31 (0x1 << 31) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -/* -------- PIO_SCDR : (PIO Offset: 0x008C) Slow Clock Divider Debouncing Register -------- */ -#define PIO_SCDR_DIV0 (0x1 << 0) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV1 (0x1 << 1) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV2 (0x1 << 2) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV3 (0x1 << 3) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV4 (0x1 << 4) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV5 (0x1 << 5) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV6 (0x1 << 6) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV7 (0x1 << 7) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV8 (0x1 << 8) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV9 (0x1 << 9) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV10 (0x1 << 10) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV11 (0x1 << 11) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV12 (0x1 << 12) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV13 (0x1 << 13) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -/* -------- PIO_PPDDR : (PIO Offset: 0x0090) Pad Pull-down Disable Register -------- */ -#define PIO_PPDDR_P0 (0x1 << 0) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P1 (0x1 << 1) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P2 (0x1 << 2) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P3 (0x1 << 3) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P4 (0x1 << 4) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P5 (0x1 << 5) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P6 (0x1 << 6) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P7 (0x1 << 7) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P8 (0x1 << 8) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P9 (0x1 << 9) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P10 (0x1 << 10) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P11 (0x1 << 11) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P12 (0x1 << 12) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P13 (0x1 << 13) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P14 (0x1 << 14) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P15 (0x1 << 15) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P16 (0x1 << 16) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P17 (0x1 << 17) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P18 (0x1 << 18) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P19 (0x1 << 19) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P20 (0x1 << 20) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P21 (0x1 << 21) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P22 (0x1 << 22) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P23 (0x1 << 23) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P24 (0x1 << 24) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P25 (0x1 << 25) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P26 (0x1 << 26) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P27 (0x1 << 27) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P28 (0x1 << 28) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P29 (0x1 << 29) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P30 (0x1 << 30) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P31 (0x1 << 31) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -/* -------- PIO_PPDER : (PIO Offset: 0x0094) Pad Pull-down Enable Register -------- */ -#define PIO_PPDER_P0 (0x1 << 0) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P1 (0x1 << 1) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P2 (0x1 << 2) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P3 (0x1 << 3) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P4 (0x1 << 4) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P5 (0x1 << 5) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P6 (0x1 << 6) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P7 (0x1 << 7) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P8 (0x1 << 8) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P9 (0x1 << 9) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P10 (0x1 << 10) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P11 (0x1 << 11) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P12 (0x1 << 12) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P13 (0x1 << 13) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P14 (0x1 << 14) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P15 (0x1 << 15) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P16 (0x1 << 16) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P17 (0x1 << 17) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P18 (0x1 << 18) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P19 (0x1 << 19) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P20 (0x1 << 20) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P21 (0x1 << 21) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P22 (0x1 << 22) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P23 (0x1 << 23) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P24 (0x1 << 24) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P25 (0x1 << 25) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P26 (0x1 << 26) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P27 (0x1 << 27) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P28 (0x1 << 28) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P29 (0x1 << 29) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P30 (0x1 << 30) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P31 (0x1 << 31) /**< \brief (PIO_PPDER) Pull Down Enable. */ -/* -------- PIO_PPDSR : (PIO Offset: 0x0098) Pad Pull-down Status Register -------- */ -#define PIO_PPDSR_P0 (0x1 << 0) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P1 (0x1 << 1) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P2 (0x1 << 2) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P3 (0x1 << 3) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P4 (0x1 << 4) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P5 (0x1 << 5) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P6 (0x1 << 6) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P7 (0x1 << 7) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P8 (0x1 << 8) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P9 (0x1 << 9) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P10 (0x1 << 10) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P11 (0x1 << 11) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P12 (0x1 << 12) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P13 (0x1 << 13) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P14 (0x1 << 14) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P15 (0x1 << 15) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P16 (0x1 << 16) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P17 (0x1 << 17) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P18 (0x1 << 18) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P19 (0x1 << 19) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P20 (0x1 << 20) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P21 (0x1 << 21) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P22 (0x1 << 22) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P23 (0x1 << 23) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P24 (0x1 << 24) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P25 (0x1 << 25) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P26 (0x1 << 26) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P27 (0x1 << 27) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P28 (0x1 << 28) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P29 (0x1 << 29) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P30 (0x1 << 30) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P31 (0x1 << 31) /**< \brief (PIO_PPDSR) Pull Down Status. */ -/* -------- PIO_OWER : (PIO Offset: 0x00A0) Output Write Enable -------- */ -#define PIO_OWER_P0 (0x1 << 0) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P1 (0x1 << 1) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P2 (0x1 << 2) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P3 (0x1 << 3) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P4 (0x1 << 4) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P5 (0x1 << 5) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P6 (0x1 << 6) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P7 (0x1 << 7) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P8 (0x1 << 8) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P9 (0x1 << 9) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P10 (0x1 << 10) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P11 (0x1 << 11) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P12 (0x1 << 12) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P13 (0x1 << 13) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P14 (0x1 << 14) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P15 (0x1 << 15) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P16 (0x1 << 16) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P17 (0x1 << 17) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P18 (0x1 << 18) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P19 (0x1 << 19) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P20 (0x1 << 20) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P21 (0x1 << 21) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P22 (0x1 << 22) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P23 (0x1 << 23) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P24 (0x1 << 24) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P25 (0x1 << 25) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P26 (0x1 << 26) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P27 (0x1 << 27) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P28 (0x1 << 28) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P29 (0x1 << 29) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P30 (0x1 << 30) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P31 (0x1 << 31) /**< \brief (PIO_OWER) Output Write Enable. */ -/* -------- PIO_OWDR : (PIO Offset: 0x00A4) Output Write Disable -------- */ -#define PIO_OWDR_P0 (0x1 << 0) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P1 (0x1 << 1) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P2 (0x1 << 2) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P3 (0x1 << 3) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P4 (0x1 << 4) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P5 (0x1 << 5) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P6 (0x1 << 6) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P7 (0x1 << 7) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P8 (0x1 << 8) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P9 (0x1 << 9) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P10 (0x1 << 10) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P11 (0x1 << 11) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P12 (0x1 << 12) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P13 (0x1 << 13) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P14 (0x1 << 14) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P15 (0x1 << 15) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P16 (0x1 << 16) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P17 (0x1 << 17) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P18 (0x1 << 18) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P19 (0x1 << 19) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P20 (0x1 << 20) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P21 (0x1 << 21) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P22 (0x1 << 22) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P23 (0x1 << 23) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P24 (0x1 << 24) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P25 (0x1 << 25) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P26 (0x1 << 26) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P27 (0x1 << 27) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P28 (0x1 << 28) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P29 (0x1 << 29) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P30 (0x1 << 30) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P31 (0x1 << 31) /**< \brief (PIO_OWDR) Output Write Disable. */ -/* -------- PIO_OWSR : (PIO Offset: 0x00A8) Output Write Status Register -------- */ -#define PIO_OWSR_P0 (0x1 << 0) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P1 (0x1 << 1) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P2 (0x1 << 2) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P3 (0x1 << 3) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P4 (0x1 << 4) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P5 (0x1 << 5) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P6 (0x1 << 6) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P7 (0x1 << 7) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P8 (0x1 << 8) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P9 (0x1 << 9) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P10 (0x1 << 10) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P11 (0x1 << 11) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P12 (0x1 << 12) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P13 (0x1 << 13) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P14 (0x1 << 14) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P15 (0x1 << 15) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P16 (0x1 << 16) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P17 (0x1 << 17) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P18 (0x1 << 18) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P19 (0x1 << 19) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P20 (0x1 << 20) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P21 (0x1 << 21) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P22 (0x1 << 22) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P23 (0x1 << 23) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P24 (0x1 << 24) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P25 (0x1 << 25) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P26 (0x1 << 26) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P27 (0x1 << 27) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P28 (0x1 << 28) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P29 (0x1 << 29) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P30 (0x1 << 30) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P31 (0x1 << 31) /**< \brief (PIO_OWSR) Output Write Status. */ -/* -------- PIO_AIMER : (PIO Offset: 0x00B0) Additional Interrupt Modes Enable Register -------- */ -#define PIO_AIMER_P0 (0x1 << 0) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P1 (0x1 << 1) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P2 (0x1 << 2) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P3 (0x1 << 3) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P4 (0x1 << 4) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P5 (0x1 << 5) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P6 (0x1 << 6) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P7 (0x1 << 7) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P8 (0x1 << 8) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P9 (0x1 << 9) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P10 (0x1 << 10) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P11 (0x1 << 11) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P12 (0x1 << 12) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P13 (0x1 << 13) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P14 (0x1 << 14) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P15 (0x1 << 15) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P16 (0x1 << 16) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P17 (0x1 << 17) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P18 (0x1 << 18) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P19 (0x1 << 19) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P20 (0x1 << 20) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P21 (0x1 << 21) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P22 (0x1 << 22) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P23 (0x1 << 23) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P24 (0x1 << 24) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P25 (0x1 << 25) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P26 (0x1 << 26) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P27 (0x1 << 27) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P28 (0x1 << 28) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P29 (0x1 << 29) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P30 (0x1 << 30) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P31 (0x1 << 31) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -/* -------- PIO_AIMDR : (PIO Offset: 0x00B4) Additional Interrupt Modes Disables Register -------- */ -#define PIO_AIMDR_P0 (0x1 << 0) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P1 (0x1 << 1) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P2 (0x1 << 2) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P3 (0x1 << 3) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P4 (0x1 << 4) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P5 (0x1 << 5) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P6 (0x1 << 6) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P7 (0x1 << 7) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P8 (0x1 << 8) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P9 (0x1 << 9) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P10 (0x1 << 10) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P11 (0x1 << 11) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P12 (0x1 << 12) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P13 (0x1 << 13) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P14 (0x1 << 14) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P15 (0x1 << 15) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P16 (0x1 << 16) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P17 (0x1 << 17) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P18 (0x1 << 18) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P19 (0x1 << 19) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P20 (0x1 << 20) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P21 (0x1 << 21) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P22 (0x1 << 22) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P23 (0x1 << 23) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P24 (0x1 << 24) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P25 (0x1 << 25) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P26 (0x1 << 26) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P27 (0x1 << 27) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P28 (0x1 << 28) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P29 (0x1 << 29) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P30 (0x1 << 30) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P31 (0x1 << 31) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -/* -------- PIO_AIMMR : (PIO Offset: 0x00B8) Additional Interrupt Modes Mask Register -------- */ -#define PIO_AIMMR_P0 (0x1 << 0) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P1 (0x1 << 1) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P2 (0x1 << 2) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P3 (0x1 << 3) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P4 (0x1 << 4) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P5 (0x1 << 5) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P6 (0x1 << 6) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P7 (0x1 << 7) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P8 (0x1 << 8) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P9 (0x1 << 9) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P10 (0x1 << 10) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P11 (0x1 << 11) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P12 (0x1 << 12) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P13 (0x1 << 13) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P14 (0x1 << 14) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P15 (0x1 << 15) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P16 (0x1 << 16) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P17 (0x1 << 17) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P18 (0x1 << 18) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P19 (0x1 << 19) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P20 (0x1 << 20) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P21 (0x1 << 21) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P22 (0x1 << 22) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P23 (0x1 << 23) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P24 (0x1 << 24) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P25 (0x1 << 25) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P26 (0x1 << 26) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P27 (0x1 << 27) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P28 (0x1 << 28) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P29 (0x1 << 29) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P30 (0x1 << 30) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P31 (0x1 << 31) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -/* -------- PIO_ESR : (PIO Offset: 0x00C0) Edge Select Register -------- */ -#define PIO_ESR_P0 (0x1 << 0) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P1 (0x1 << 1) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P2 (0x1 << 2) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P3 (0x1 << 3) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P4 (0x1 << 4) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P5 (0x1 << 5) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P6 (0x1 << 6) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P7 (0x1 << 7) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P8 (0x1 << 8) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P9 (0x1 << 9) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P10 (0x1 << 10) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P11 (0x1 << 11) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P12 (0x1 << 12) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P13 (0x1 << 13) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P14 (0x1 << 14) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P15 (0x1 << 15) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P16 (0x1 << 16) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P17 (0x1 << 17) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P18 (0x1 << 18) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P19 (0x1 << 19) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P20 (0x1 << 20) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P21 (0x1 << 21) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P22 (0x1 << 22) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P23 (0x1 << 23) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P24 (0x1 << 24) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P25 (0x1 << 25) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P26 (0x1 << 26) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P27 (0x1 << 27) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P28 (0x1 << 28) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P29 (0x1 << 29) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P30 (0x1 << 30) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P31 (0x1 << 31) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -/* -------- PIO_LSR : (PIO Offset: 0x00C4) Level Select Register -------- */ -#define PIO_LSR_P0 (0x1 << 0) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P1 (0x1 << 1) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P2 (0x1 << 2) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P3 (0x1 << 3) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P4 (0x1 << 4) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P5 (0x1 << 5) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P6 (0x1 << 6) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P7 (0x1 << 7) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P8 (0x1 << 8) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P9 (0x1 << 9) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P10 (0x1 << 10) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P11 (0x1 << 11) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P12 (0x1 << 12) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P13 (0x1 << 13) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P14 (0x1 << 14) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P15 (0x1 << 15) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P16 (0x1 << 16) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P17 (0x1 << 17) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P18 (0x1 << 18) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P19 (0x1 << 19) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P20 (0x1 << 20) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P21 (0x1 << 21) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P22 (0x1 << 22) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P23 (0x1 << 23) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P24 (0x1 << 24) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P25 (0x1 << 25) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P26 (0x1 << 26) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P27 (0x1 << 27) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P28 (0x1 << 28) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P29 (0x1 << 29) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P30 (0x1 << 30) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P31 (0x1 << 31) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -/* -------- PIO_ELSR : (PIO Offset: 0x00C8) Edge/Level Status Register -------- */ -#define PIO_ELSR_P0 (0x1 << 0) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P1 (0x1 << 1) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P2 (0x1 << 2) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P3 (0x1 << 3) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P4 (0x1 << 4) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P5 (0x1 << 5) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P6 (0x1 << 6) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P7 (0x1 << 7) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P8 (0x1 << 8) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P9 (0x1 << 9) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P10 (0x1 << 10) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P11 (0x1 << 11) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P12 (0x1 << 12) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P13 (0x1 << 13) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P14 (0x1 << 14) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P15 (0x1 << 15) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P16 (0x1 << 16) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P17 (0x1 << 17) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P18 (0x1 << 18) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P19 (0x1 << 19) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P20 (0x1 << 20) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P21 (0x1 << 21) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P22 (0x1 << 22) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P23 (0x1 << 23) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P24 (0x1 << 24) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P25 (0x1 << 25) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P26 (0x1 << 26) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P27 (0x1 << 27) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P28 (0x1 << 28) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P29 (0x1 << 29) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P30 (0x1 << 30) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P31 (0x1 << 31) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -/* -------- PIO_FELLSR : (PIO Offset: 0x00D0) Falling Edge/Low Level Select Register -------- */ -#define PIO_FELLSR_P0 (0x1 << 0) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P1 (0x1 << 1) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P2 (0x1 << 2) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P3 (0x1 << 3) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P4 (0x1 << 4) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P5 (0x1 << 5) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P6 (0x1 << 6) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P7 (0x1 << 7) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P8 (0x1 << 8) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P9 (0x1 << 9) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P10 (0x1 << 10) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P11 (0x1 << 11) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P12 (0x1 << 12) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P13 (0x1 << 13) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P14 (0x1 << 14) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P15 (0x1 << 15) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P16 (0x1 << 16) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P17 (0x1 << 17) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P18 (0x1 << 18) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P19 (0x1 << 19) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P20 (0x1 << 20) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P21 (0x1 << 21) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P22 (0x1 << 22) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P23 (0x1 << 23) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P24 (0x1 << 24) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P25 (0x1 << 25) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P26 (0x1 << 26) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P27 (0x1 << 27) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P28 (0x1 << 28) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P29 (0x1 << 29) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P30 (0x1 << 30) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P31 (0x1 << 31) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -/* -------- PIO_REHLSR : (PIO Offset: 0x00D4) Rising Edge/ High Level Select Register -------- */ -#define PIO_REHLSR_P0 (0x1 << 0) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P1 (0x1 << 1) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P2 (0x1 << 2) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P3 (0x1 << 3) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P4 (0x1 << 4) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P5 (0x1 << 5) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P6 (0x1 << 6) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P7 (0x1 << 7) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P8 (0x1 << 8) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P9 (0x1 << 9) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P10 (0x1 << 10) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P11 (0x1 << 11) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P12 (0x1 << 12) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P13 (0x1 << 13) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P14 (0x1 << 14) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P15 (0x1 << 15) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P16 (0x1 << 16) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P17 (0x1 << 17) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P18 (0x1 << 18) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P19 (0x1 << 19) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P20 (0x1 << 20) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P21 (0x1 << 21) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P22 (0x1 << 22) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P23 (0x1 << 23) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P24 (0x1 << 24) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P25 (0x1 << 25) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P26 (0x1 << 26) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P27 (0x1 << 27) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P28 (0x1 << 28) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P29 (0x1 << 29) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P30 (0x1 << 30) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P31 (0x1 << 31) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -/* -------- PIO_FRLHSR : (PIO Offset: 0x00D8) Fall/Rise - Low/High Status Register -------- */ -#define PIO_FRLHSR_P0 (0x1 << 0) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P1 (0x1 << 1) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P2 (0x1 << 2) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P3 (0x1 << 3) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P4 (0x1 << 4) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P5 (0x1 << 5) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P6 (0x1 << 6) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P7 (0x1 << 7) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P8 (0x1 << 8) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P9 (0x1 << 9) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P10 (0x1 << 10) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P11 (0x1 << 11) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P12 (0x1 << 12) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P13 (0x1 << 13) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P14 (0x1 << 14) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P15 (0x1 << 15) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P16 (0x1 << 16) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P17 (0x1 << 17) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P18 (0x1 << 18) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P19 (0x1 << 19) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P20 (0x1 << 20) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P21 (0x1 << 21) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P22 (0x1 << 22) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P23 (0x1 << 23) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P24 (0x1 << 24) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P25 (0x1 << 25) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P26 (0x1 << 26) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P27 (0x1 << 27) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P28 (0x1 << 28) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P29 (0x1 << 29) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P30 (0x1 << 30) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P31 (0x1 << 31) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -/* -------- PIO_LOCKSR : (PIO Offset: 0x00E0) Lock Status -------- */ -#define PIO_LOCKSR_P0 (0x1 << 0) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P1 (0x1 << 1) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P2 (0x1 << 2) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P3 (0x1 << 3) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P4 (0x1 << 4) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P5 (0x1 << 5) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P6 (0x1 << 6) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P7 (0x1 << 7) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P8 (0x1 << 8) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P9 (0x1 << 9) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P10 (0x1 << 10) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P11 (0x1 << 11) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P12 (0x1 << 12) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P13 (0x1 << 13) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P14 (0x1 << 14) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P15 (0x1 << 15) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P16 (0x1 << 16) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P17 (0x1 << 17) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P18 (0x1 << 18) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P19 (0x1 << 19) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P20 (0x1 << 20) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P21 (0x1 << 21) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P22 (0x1 << 22) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P23 (0x1 << 23) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P24 (0x1 << 24) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P25 (0x1 << 25) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P26 (0x1 << 26) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P27 (0x1 << 27) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P28 (0x1 << 28) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P29 (0x1 << 29) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P30 (0x1 << 30) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P31 (0x1 << 31) /**< \brief (PIO_LOCKSR) Lock Status. */ -/* -------- PIO_WPMR : (PIO Offset: 0x00E4) Write Protect Mode Register -------- */ -#define PIO_WPMR_WPEN (0x1 << 0) /**< \brief (PIO_WPMR) Write Protect Enable */ -#define PIO_WPMR_WPKEY (0xffffff << 8) /**< \brief (PIO_WPMR) Write Protect KEY */ -/* -------- PIO_WPSR : (PIO Offset: 0x00E8) Write Protect Status Register -------- */ -#define PIO_WPSR_WPVS (0x1 << 0) /**< \brief (PIO_WPSR) Write Protect Violation Status */ -#define PIO_WPSR_WPVSRC (0xffff << 8) /**< \brief (PIO_WPSR) Write Protect Violation Source */ -/* -------- PIO_SCHMITT : (PIO Offset: 0x0100) Schmitt Trigger Register -------- */ -#define PIO_SCHMITT_SCHMITT0 (0x1 << 0) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT1 (0x1 << 1) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT2 (0x1 << 2) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT3 (0x1 << 3) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT4 (0x1 << 4) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT5 (0x1 << 5) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT6 (0x1 << 6) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT7 (0x1 << 7) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT8 (0x1 << 8) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT9 (0x1 << 9) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT10 (0x1 << 10) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT11 (0x1 << 11) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT12 (0x1 << 12) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT13 (0x1 << 13) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT14 (0x1 << 14) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT15 (0x1 << 15) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT16 (0x1 << 16) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT17 (0x1 << 17) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT18 (0x1 << 18) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT19 (0x1 << 19) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT20 (0x1 << 20) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT21 (0x1 << 21) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT22 (0x1 << 22) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT23 (0x1 << 23) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT24 (0x1 << 24) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT25 (0x1 << 25) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT26 (0x1 << 26) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT27 (0x1 << 27) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT28 (0x1 << 28) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT29 (0x1 << 29) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT30 (0x1 << 30) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT31 (0x1 << 31) /**< \brief (PIO_SCHMITT) */ -/* -------- PIO_PCMR : (PIO Offset: 0x150) Parallel Capture Mode Register -------- */ -#define PIO_PCMR_PCEN (0x1 << 0) /**< \brief (PIO_PCMR) Parallel Capture Mode Enable */ -#define PIO_PCMR_DSIZE (0x3 << 4) /**< \brief (PIO_PCMR) Parallel Capture Mode Data Size */ -#define PIO_PCMR_ALWYS (0x1 << 9) /**< \brief (PIO_PCMR) Parallel Capture Mode Always Sampling */ -#define PIO_PCMR_HALFS (0x1 << 10) /**< \brief (PIO_PCMR) Parallel Capture Mode Half Sampling */ -#define PIO_PCMR_FRSTS (0x1 << 11) /**< \brief (PIO_PCMR) Parallel Capture Mode First Sample */ -/* -------- PIO_PCIER : (PIO Offset: 0x154) Parallel Capture Interrupt Enable Register -------- */ -#define PIO_PCIER_DRDY (0x1 << 0) /**< \brief (PIO_PCIER) Parallel Capture Mode Data Ready Interrupt Enable */ -#define PIO_PCIER_OVRE (0x1 << 1) /**< \brief (PIO_PCIER) Parallel Capture Mode Overrun Error Interrupt Enable */ -#define PIO_PCIER_ENDRX (0x1 << 2) /**< \brief (PIO_PCIER) End of Reception Transfer Interrupt Enable */ -#define PIO_PCIER_RXBUFF (0x1 << 3) /**< \brief (PIO_PCIER) Reception Buffer Full Interrupt Enable */ -/* -------- PIO_PCIDR : (PIO Offset: 0x158) Parallel Capture Interrupt Disable Register -------- */ -#define PIO_PCIDR_DRDY (0x1 << 0) /**< \brief (PIO_PCIDR) Parallel Capture Mode Data Ready Interrupt Disable */ -#define PIO_PCIDR_OVRE (0x1 << 1) /**< \brief (PIO_PCIDR) Parallel Capture Mode Overrun Error Interrupt Disable */ -#define PIO_PCIDR_ENDRX (0x1 << 2) /**< \brief (PIO_PCIDR) End of Reception Transfer Interrupt Disable */ -#define PIO_PCIDR_RXBUFF (0x1 << 3) /**< \brief (PIO_PCIDR) Reception Buffer Full Interrupt Disable */ -/* -------- PIO_PCIMR : (PIO Offset: 0x15C) Parallel Capture Interrupt Mask Register -------- */ -#define PIO_PCIMR_DRDY (0x1 << 0) /**< \brief (PIO_PCIMR) Parallel Capture Mode Data Ready Interrupt Mask */ -#define PIO_PCIMR_OVRE (0x1 << 1) /**< \brief (PIO_PCIMR) Parallel Capture Mode Overrun Error Interrupt Mask */ -#define PIO_PCIMR_ENDRX (0x1 << 2) /**< \brief (PIO_PCIMR) End of Reception Transfer Interrupt Mask */ -#define PIO_PCIMR_RXBUFF (0x1 << 3) /**< \brief (PIO_PCIMR) Reception Buffer Full Interrupt Mask */ -/* -------- PIO_PCISR : (PIO Offset: 0x160) Parallel Capture Interrupt Status Register -------- */ -#define PIO_PCISR_DRDY (0x1 << 0) /**< \brief (PIO_PCISR) Parallel Capture Mode Data Ready */ -#define PIO_PCISR_OVRE (0x1 << 1) /**< \brief (PIO_PCISR) Parallel Capture Mode Overrun Error. */ -#define PIO_PCISR_ENDRX (0x1 << 2) /**< \brief (PIO_PCISR) End of Reception Transfer. */ -#define PIO_PCISR_RXBUFF (0x1 << 3) /**< \brief (PIO_PCISR) Reception Buffer Full */ -/* -------- PIO_PCRHR : (PIO Offset: 0x164) Parallel Capture Reception Holding Register -------- */ -#define PIO_PCRHR_RDATA (0xffffffff << 0) /**< \brief (PIO_PCRHR) Parallel Capture Mode Reception Data. */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Power Management Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_PMC Power Management Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pmc hardware registers */ -typedef struct { - WoReg PMC_SCER; /**< \brief (Pmc Offset: 0x0000) System Clock Enable Register */ - WoReg PMC_SCDR; /**< \brief (Pmc Offset: 0x0004) System Clock Disable Register */ - RoReg PMC_SCSR; /**< \brief (Pmc Offset: 0x0008) System Clock Status Register */ - RwReg Reserved1[1]; - WoReg PMC_PCER0; /**< \brief (Pmc Offset: 0x0010) Peripheral Clock Enable Register 0 */ - WoReg PMC_PCDR0; /**< \brief (Pmc Offset: 0x0014) Peripheral Clock Disable Register 0 */ - RoReg PMC_PCSR0; /**< \brief (Pmc Offset: 0x0018) Peripheral Clock Status Register 0 */ - RwReg Reserved2[1]; - RwReg CKGR_MOR; /**< \brief (Pmc Offset: 0x0020) Main Oscillator Register */ - RoReg CKGR_MCFR; /**< \brief (Pmc Offset: 0x0024) Main Clock Frequency Register */ - RwReg CKGR_PLLAR; /**< \brief (Pmc Offset: 0x0028) PLLA Register */ - RwReg CKGR_PLLBR; /**< \brief (Pmc Offset: 0x002C) PLLB Register */ - RwReg PMC_MCKR; /**< \brief (Pmc Offset: 0x0030) Master Clock Register */ - RwReg Reserved3[1]; - RwReg PMC_USB; /**< \brief (Pmc Offset: 0x0038) USB Clock Register */ - RwReg Reserved4[1]; - RwReg PMC_PCK[3]; /**< \brief (Pmc Offset: 0x0040) Programmable Clock 0 Register */ - RwReg Reserved5[5]; - WoReg PMC_IER; /**< \brief (Pmc Offset: 0x0060) Interrupt Enable Register */ - WoReg PMC_IDR; /**< \brief (Pmc Offset: 0x0064) Interrupt Disable Register */ - RoReg PMC_SR; /**< \brief (Pmc Offset: 0x0068) Status Register */ - RoReg PMC_IMR; /**< \brief (Pmc Offset: 0x006C) Interrupt Mask Register */ - RwReg PMC_FSMR; /**< \brief (Pmc Offset: 0x0070) Fast Startup Mode Register */ - RwReg PMC_FSPR; /**< \brief (Pmc Offset: 0x0074) Fast Startup Polarity Register */ - WoReg PMC_FOCR; /**< \brief (Pmc Offset: 0x0078) Fault Output Clear Register */ - RwReg Reserved6[26]; - RwReg PMC_WPMR; /**< \brief (Pmc Offset: 0x00E4) Write Protect Mode Register */ - RoReg PMC_WPSR; /**< \brief (Pmc Offset: 0x00E8) Write Protect Status Register */ - RwReg Reserved7[5]; - WoReg PMC_PCER1; /**< \brief (Pmc Offset: 0x0100) Peripheral Clock Enable Register 1 */ - WoReg PMC_PCDR1; /**< \brief (Pmc Offset: 0x0104) Peripheral Clock Disable Register 1 */ - RoReg PMC_PCSR1; /**< \brief (Pmc Offset: 0x0108) Peripheral Clock Status Register 1 */ - RwReg Reserved8[1]; - RwReg PMC_OCR; /**< \brief (Pmc Offset: 0x0110) Oscillator Calibration Register */ -} Pmc; -#endif /* __ASSEMBLY__ */ -/* -------- PMC_SCER : (PMC Offset: 0x0000) System Clock Enable Register -------- */ -#define PMC_SCER_UDP (0x1 << 7) /**< \brief (PMC_SCER) USB Device Port Clock Enable */ -#define PMC_SCER_PCK0 (0x1 << 8) /**< \brief (PMC_SCER) Programmable Clock 0 Output Enable */ -#define PMC_SCER_PCK1 (0x1 << 9) /**< \brief (PMC_SCER) Programmable Clock 1 Output Enable */ -#define PMC_SCER_PCK2 (0x1 << 10) /**< \brief (PMC_SCER) Programmable Clock 2 Output Enable */ -/* -------- PMC_SCDR : (PMC Offset: 0x0004) System Clock Disable Register -------- */ -#define PMC_SCDR_UDP (0x1 << 7) /**< \brief (PMC_SCDR) USB Device Port Clock Disable */ -#define PMC_SCDR_PCK0 (0x1 << 8) /**< \brief (PMC_SCDR) Programmable Clock 0 Output Disable */ -#define PMC_SCDR_PCK1 (0x1 << 9) /**< \brief (PMC_SCDR) Programmable Clock 1 Output Disable */ -#define PMC_SCDR_PCK2 (0x1 << 10) /**< \brief (PMC_SCDR) Programmable Clock 2 Output Disable */ -/* -------- PMC_SCSR : (PMC Offset: 0x0008) System Clock Status Register -------- */ -#define PMC_SCSR_UDP (0x1 << 7) /**< \brief (PMC_SCSR) USB Device Port Clock Status */ -#define PMC_SCSR_PCK0 (0x1 << 8) /**< \brief (PMC_SCSR) Programmable Clock 0 Output Status */ -#define PMC_SCSR_PCK1 (0x1 << 9) /**< \brief (PMC_SCSR) Programmable Clock 1 Output Status */ -#define PMC_SCSR_PCK2 (0x1 << 10) /**< \brief (PMC_SCSR) Programmable Clock 2 Output Status */ -/* -------- PMC_PCER0 : (PMC Offset: 0x0010) Peripheral Clock Enable Register 0 -------- */ -#define PMC_PCER0_PID2 (0x1 << 2) /**< \brief (PMC_PCER0) Peripheral Clock 2 Enable */ -#define PMC_PCER0_PID3 (0x1 << 3) /**< \brief (PMC_PCER0) Peripheral Clock 3 Enable */ -#define PMC_PCER0_PID4 (0x1 << 4) /**< \brief (PMC_PCER0) Peripheral Clock 4 Enable */ -#define PMC_PCER0_PID5 (0x1 << 5) /**< \brief (PMC_PCER0) Peripheral Clock 5 Enable */ -#define PMC_PCER0_PID6 (0x1 << 6) /**< \brief (PMC_PCER0) Peripheral Clock 6 Enable */ -#define PMC_PCER0_PID7 (0x1 << 7) /**< \brief (PMC_PCER0) Peripheral Clock 7 Enable */ -#define PMC_PCER0_PID8 (0x1 << 8) /**< \brief (PMC_PCER0) Peripheral Clock 8 Enable */ -#define PMC_PCER0_PID9 (0x1 << 9) /**< \brief (PMC_PCER0) Peripheral Clock 9 Enable */ -#define PMC_PCER0_PID10 (0x1 << 10) /**< \brief (PMC_PCER0) Peripheral Clock 10 Enable */ -#define PMC_PCER0_PID11 (0x1 << 11) /**< \brief (PMC_PCER0) Peripheral Clock 11 Enable */ -#define PMC_PCER0_PID12 (0x1 << 12) /**< \brief (PMC_PCER0) Peripheral Clock 12 Enable */ -#define PMC_PCER0_PID13 (0x1 << 13) /**< \brief (PMC_PCER0) Peripheral Clock 13 Enable */ -#define PMC_PCER0_PID14 (0x1 << 14) /**< \brief (PMC_PCER0) Peripheral Clock 14 Enable */ -#define PMC_PCER0_PID15 (0x1 << 15) /**< \brief (PMC_PCER0) Peripheral Clock 15 Enable */ -#define PMC_PCER0_PID16 (0x1 << 16) /**< \brief (PMC_PCER0) Peripheral Clock 16 Enable */ -#define PMC_PCER0_PID17 (0x1 << 17) /**< \brief (PMC_PCER0) Peripheral Clock 17 Enable */ -#define PMC_PCER0_PID18 (0x1 << 18) /**< \brief (PMC_PCER0) Peripheral Clock 18 Enable */ -#define PMC_PCER0_PID19 (0x1 << 19) /**< \brief (PMC_PCER0) Peripheral Clock 19 Enable */ -#define PMC_PCER0_PID20 (0x1 << 20) /**< \brief (PMC_PCER0) Peripheral Clock 20 Enable */ -#define PMC_PCER0_PID21 (0x1 << 21) /**< \brief (PMC_PCER0) Peripheral Clock 21 Enable */ -#define PMC_PCER0_PID22 (0x1 << 22) /**< \brief (PMC_PCER0) Peripheral Clock 22 Enable */ -#define PMC_PCER0_PID23 (0x1 << 23) /**< \brief (PMC_PCER0) Peripheral Clock 23 Enable */ -#define PMC_PCER0_PID24 (0x1 << 24) /**< \brief (PMC_PCER0) Peripheral Clock 24 Enable */ -#define PMC_PCER0_PID25 (0x1 << 25) /**< \brief (PMC_PCER0) Peripheral Clock 25 Enable */ -#define PMC_PCER0_PID26 (0x1 << 26) /**< \brief (PMC_PCER0) Peripheral Clock 26 Enable */ -#define PMC_PCER0_PID27 (0x1 << 27) /**< \brief (PMC_PCER0) Peripheral Clock 27 Enable */ -#define PMC_PCER0_PID28 (0x1 << 28) /**< \brief (PMC_PCER0) Peripheral Clock 28 Enable */ -#define PMC_PCER0_PID29 (0x1 << 29) /**< \brief (PMC_PCER0) Peripheral Clock 29 Enable */ -#define PMC_PCER0_PID30 (0x1 << 30) /**< \brief (PMC_PCER0) Peripheral Clock 30 Enable */ -#define PMC_PCER0_PID31 (0x1 << 31) /**< \brief (PMC_PCER0) Peripheral Clock 31 Enable */ -/* -------- PMC_PCDR0 : (PMC Offset: 0x0014) Peripheral Clock Disable Register 0 -------- */ -#define PMC_PCDR0_PID2 (0x1 << 2) /**< \brief (PMC_PCDR0) Peripheral Clock 2 Disable */ -#define PMC_PCDR0_PID3 (0x1 << 3) /**< \brief (PMC_PCDR0) Peripheral Clock 3 Disable */ -#define PMC_PCDR0_PID4 (0x1 << 4) /**< \brief (PMC_PCDR0) Peripheral Clock 4 Disable */ -#define PMC_PCDR0_PID5 (0x1 << 5) /**< \brief (PMC_PCDR0) Peripheral Clock 5 Disable */ -#define PMC_PCDR0_PID6 (0x1 << 6) /**< \brief (PMC_PCDR0) Peripheral Clock 6 Disable */ -#define PMC_PCDR0_PID7 (0x1 << 7) /**< \brief (PMC_PCDR0) Peripheral Clock 7 Disable */ -#define PMC_PCDR0_PID8 (0x1 << 8) /**< \brief (PMC_PCDR0) Peripheral Clock 8 Disable */ -#define PMC_PCDR0_PID9 (0x1 << 9) /**< \brief (PMC_PCDR0) Peripheral Clock 9 Disable */ -#define PMC_PCDR0_PID10 (0x1 << 10) /**< \brief (PMC_PCDR0) Peripheral Clock 10 Disable */ -#define PMC_PCDR0_PID11 (0x1 << 11) /**< \brief (PMC_PCDR0) Peripheral Clock 11 Disable */ -#define PMC_PCDR0_PID12 (0x1 << 12) /**< \brief (PMC_PCDR0) Peripheral Clock 12 Disable */ -#define PMC_PCDR0_PID13 (0x1 << 13) /**< \brief (PMC_PCDR0) Peripheral Clock 13 Disable */ -#define PMC_PCDR0_PID14 (0x1 << 14) /**< \brief (PMC_PCDR0) Peripheral Clock 14 Disable */ -#define PMC_PCDR0_PID15 (0x1 << 15) /**< \brief (PMC_PCDR0) Peripheral Clock 15 Disable */ -#define PMC_PCDR0_PID16 (0x1 << 16) /**< \brief (PMC_PCDR0) Peripheral Clock 16 Disable */ -#define PMC_PCDR0_PID17 (0x1 << 17) /**< \brief (PMC_PCDR0) Peripheral Clock 17 Disable */ -#define PMC_PCDR0_PID18 (0x1 << 18) /**< \brief (PMC_PCDR0) Peripheral Clock 18 Disable */ -#define PMC_PCDR0_PID19 (0x1 << 19) /**< \brief (PMC_PCDR0) Peripheral Clock 19 Disable */ -#define PMC_PCDR0_PID20 (0x1 << 20) /**< \brief (PMC_PCDR0) Peripheral Clock 20 Disable */ -#define PMC_PCDR0_PID21 (0x1 << 21) /**< \brief (PMC_PCDR0) Peripheral Clock 21 Disable */ -#define PMC_PCDR0_PID22 (0x1 << 22) /**< \brief (PMC_PCDR0) Peripheral Clock 22 Disable */ -#define PMC_PCDR0_PID23 (0x1 << 23) /**< \brief (PMC_PCDR0) Peripheral Clock 23 Disable */ -#define PMC_PCDR0_PID24 (0x1 << 24) /**< \brief (PMC_PCDR0) Peripheral Clock 24 Disable */ -#define PMC_PCDR0_PID25 (0x1 << 25) /**< \brief (PMC_PCDR0) Peripheral Clock 25 Disable */ -#define PMC_PCDR0_PID26 (0x1 << 26) /**< \brief (PMC_PCDR0) Peripheral Clock 26 Disable */ -#define PMC_PCDR0_PID27 (0x1 << 27) /**< \brief (PMC_PCDR0) Peripheral Clock 27 Disable */ -#define PMC_PCDR0_PID28 (0x1 << 28) /**< \brief (PMC_PCDR0) Peripheral Clock 28 Disable */ -#define PMC_PCDR0_PID29 (0x1 << 29) /**< \brief (PMC_PCDR0) Peripheral Clock 29 Disable */ -#define PMC_PCDR0_PID30 (0x1 << 30) /**< \brief (PMC_PCDR0) Peripheral Clock 30 Disable */ -#define PMC_PCDR0_PID31 (0x1 << 31) /**< \brief (PMC_PCDR0) Peripheral Clock 31 Disable */ -/* -------- PMC_PCSR0 : (PMC Offset: 0x0018) Peripheral Clock Status Register 0 -------- */ -#define PMC_PCSR0_PID2 (0x1 << 2) /**< \brief (PMC_PCSR0) Peripheral Clock 2 Status */ -#define PMC_PCSR0_PID3 (0x1 << 3) /**< \brief (PMC_PCSR0) Peripheral Clock 3 Status */ -#define PMC_PCSR0_PID4 (0x1 << 4) /**< \brief (PMC_PCSR0) Peripheral Clock 4 Status */ -#define PMC_PCSR0_PID5 (0x1 << 5) /**< \brief (PMC_PCSR0) Peripheral Clock 5 Status */ -#define PMC_PCSR0_PID6 (0x1 << 6) /**< \brief (PMC_PCSR0) Peripheral Clock 6 Status */ -#define PMC_PCSR0_PID7 (0x1 << 7) /**< \brief (PMC_PCSR0) Peripheral Clock 7 Status */ -#define PMC_PCSR0_PID8 (0x1 << 8) /**< \brief (PMC_PCSR0) Peripheral Clock 8 Status */ -#define PMC_PCSR0_PID9 (0x1 << 9) /**< \brief (PMC_PCSR0) Peripheral Clock 9 Status */ -#define PMC_PCSR0_PID10 (0x1 << 10) /**< \brief (PMC_PCSR0) Peripheral Clock 10 Status */ -#define PMC_PCSR0_PID11 (0x1 << 11) /**< \brief (PMC_PCSR0) Peripheral Clock 11 Status */ -#define PMC_PCSR0_PID12 (0x1 << 12) /**< \brief (PMC_PCSR0) Peripheral Clock 12 Status */ -#define PMC_PCSR0_PID13 (0x1 << 13) /**< \brief (PMC_PCSR0) Peripheral Clock 13 Status */ -#define PMC_PCSR0_PID14 (0x1 << 14) /**< \brief (PMC_PCSR0) Peripheral Clock 14 Status */ -#define PMC_PCSR0_PID15 (0x1 << 15) /**< \brief (PMC_PCSR0) Peripheral Clock 15 Status */ -#define PMC_PCSR0_PID16 (0x1 << 16) /**< \brief (PMC_PCSR0) Peripheral Clock 16 Status */ -#define PMC_PCSR0_PID17 (0x1 << 17) /**< \brief (PMC_PCSR0) Peripheral Clock 17 Status */ -#define PMC_PCSR0_PID18 (0x1 << 18) /**< \brief (PMC_PCSR0) Peripheral Clock 18 Status */ -#define PMC_PCSR0_PID19 (0x1 << 19) /**< \brief (PMC_PCSR0) Peripheral Clock 19 Status */ -#define PMC_PCSR0_PID20 (0x1 << 20) /**< \brief (PMC_PCSR0) Peripheral Clock 20 Status */ -#define PMC_PCSR0_PID21 (0x1 << 21) /**< \brief (PMC_PCSR0) Peripheral Clock 21 Status */ -#define PMC_PCSR0_PID22 (0x1 << 22) /**< \brief (PMC_PCSR0) Peripheral Clock 22 Status */ -#define PMC_PCSR0_PID23 (0x1 << 23) /**< \brief (PMC_PCSR0) Peripheral Clock 23 Status */ -#define PMC_PCSR0_PID24 (0x1 << 24) /**< \brief (PMC_PCSR0) Peripheral Clock 24 Status */ -#define PMC_PCSR0_PID25 (0x1 << 25) /**< \brief (PMC_PCSR0) Peripheral Clock 25 Status */ -#define PMC_PCSR0_PID26 (0x1 << 26) /**< \brief (PMC_PCSR0) Peripheral Clock 26 Status */ -#define PMC_PCSR0_PID27 (0x1 << 27) /**< \brief (PMC_PCSR0) Peripheral Clock 27 Status */ -#define PMC_PCSR0_PID28 (0x1 << 28) /**< \brief (PMC_PCSR0) Peripheral Clock 28 Status */ -#define PMC_PCSR0_PID29 (0x1 << 29) /**< \brief (PMC_PCSR0) Peripheral Clock 29 Status */ -#define PMC_PCSR0_PID30 (0x1 << 30) /**< \brief (PMC_PCSR0) Peripheral Clock 30 Status */ -#define PMC_PCSR0_PID31 (0x1 << 31) /**< \brief (PMC_PCSR0) Peripheral Clock 31 Status */ -/* -------- CKGR_MOR : (PMC Offset: 0x0020) Main Oscillator Register -------- */ -#define CKGR_MOR_MOSCXTEN (0x1 << 0) /**< \brief (CKGR_MOR) Main Crystal Oscillator Enable */ -#define CKGR_MOR_MOSCXTBY (0x1 << 1) /**< \brief (CKGR_MOR) Main Crystal Oscillator Bypass */ -#define CKGR_MOR_WAITMODE (0x1 << 2) /**< \brief (CKGR_MOR) Wait Mode Command */ -#define CKGR_MOR_MOSCRCEN (0x1 << 3) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Enable */ -#define CKGR_MOR_MOSCRCF (0x7 << 4) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Frequency Selection */ -#define CKGR_MOR_MOSCXTST (0xff << 8) /**< \brief (CKGR_MOR) Main Crystal Oscillator Start-up Time */ -#define CKGR_MOR_KEY (0xff << 16) /**< \brief (CKGR_MOR) Password */ -#define CKGR_MOR_MOSCSEL (0x1 << 24) /**< \brief (CKGR_MOR) Main Oscillator Selection */ -#define CKGR_MOR_CFDEN (0x1 << 25) /**< \brief (CKGR_MOR) Clock Failure Detector Enable */ -/* -------- CKGR_MCFR : (PMC Offset: 0x0024) Main Clock Frequency Register -------- */ -#define CKGR_MCFR_MAINF (0xffff << 0) /**< \brief (CKGR_MCFR) Main Clock Frequency */ -#define CKGR_MCFR_MAINFRDY (0x1 << 16) /**< \brief (CKGR_MCFR) Main Clock Ready */ -/* -------- CKGR_PLLAR : (PMC Offset: 0x0028) PLLA Register -------- */ -#define CKGR_PLLAR_DIVA (0xff << 0) /**< \brief (CKGR_PLLAR) Divider */ -#define CKGR_PLLAR_PLLACOUNT (0x3f << 8) /**< \brief (CKGR_PLLAR) PLLA Counter */ -#define CKGR_PLLAR_MULA (0x7ff << 16) /**< \brief (CKGR_PLLAR) PLLA Multiplier */ -#define CKGR_PLLAR_STUCKTO1 (0x1 << 29) /**< \brief (CKGR_PLLAR) */ -/* -------- CKGR_PLLBR : (PMC Offset: 0x002C) PLLB Register -------- */ -#define CKGR_PLLBR_DIVB (0xff << 0) /**< \brief (CKGR_PLLBR) Divider */ -#define CKGR_PLLBR_PLLBCOUNT (0x3f << 8) /**< \brief (CKGR_PLLBR) PLLB Counter */ -#define CKGR_PLLBR_MULB (0x7ff << 16) /**< \brief (CKGR_PLLBR) PLLB Multiplier */ -/* -------- PMC_MCKR : (PMC Offset: 0x0030) Master Clock Register -------- */ -#define PMC_MCKR_CSS (0x3 << 0) /**< \brief (PMC_MCKR) Master Clock Source Selection */ -#define PMC_MCKR_CSS_SLOW_CLK (0x0 << 0) /**< \brief (PMC_MCKR) Slow Clock is selected */ -#define PMC_MCKR_CSS_MAIN_CLK (0x1 << 0) /**< \brief (PMC_MCKR) Main Clock is selected */ -#define PMC_MCKR_CSS_PLLA_CLK (0x2 << 0) /**< \brief (PMC_MCKR) PLLA Clock is selected */ -#define PMC_MCKR_CSS_PLLB_CLK (0x3 << 0) /**< \brief (PMC_MCKR) PLLB Clock is selected */ -#define PMC_MCKR_PRES (0x7 << 4) /**< \brief (PMC_MCKR) Processor Clock Prescaler */ -#define PMC_MCKR_PRES_CLK (0x0 << 4) /**< \brief (PMC_MCKR) Selected clock */ -#define PMC_MCKR_PRES_CLK_2 (0x1 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 2 */ -#define PMC_MCKR_PRES_CLK_4 (0x2 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 4 */ -#define PMC_MCKR_PRES_CLK_8 (0x3 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 8 */ -#define PMC_MCKR_PRES_CLK_16 (0x4 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 16 */ -#define PMC_MCKR_PRES_CLK_32 (0x5 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 32 */ -#define PMC_MCKR_PRES_CLK_64 (0x6 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 64 */ -#define PMC_MCKR_PLLADIV2 (0x1 << 12) /**< \brief (PMC_MCKR) PLLA Divisor by 2 */ -#define PMC_MCKR_PLLBDIV2 (0x1 << 13) /**< \brief (PMC_MCKR) PLLB Divisor by 2 */ -/* -------- PMC_USB : (PMC Offset: 0x0038) USB Clock Register -------- */ -#define PMC_USB_USBS (0x1 << 0) /**< \brief (PMC_USB) USB Input Clock Selection */ -#define PMC_USB_USBDIV (0xf << 8) /**< \brief (PMC_USB) Divider for USB Clock. */ -/* -------- PMC_PCK[3] : (PMC Offset: 0x0040) Programmable Clock 0 Register -------- */ -#define PMC_PCK_CSS (0x7 << 0) /**< \brief (PMC_PCK[3]) Master Clock Source Selection */ -#define PMC_PCK_PRES (0x7 << 4) /**< \brief (PMC_PCK[3]) Programmable Clock Prescaler */ -/* -------- PMC_IER : (PMC Offset: 0x0060) Interrupt Enable Register -------- */ -#define PMC_IER_MOSCXTS (0x1 << 0) /**< \brief (PMC_IER) Main Crystal Oscillator Status Interrupt Enable */ -#define PMC_IER_LOCKA (0x1 << 1) /**< \brief (PMC_IER) PLLA Lock Interrupt Enable */ -#define PMC_IER_LOCKB (0x1 << 2) /**< \brief (PMC_IER) PLLB Lock Interrupt Enable */ -#define PMC_IER_MCKRDY (0x1 << 3) /**< \brief (PMC_IER) Master Clock Ready Interrupt Enable */ -#define PMC_IER_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IER) Programmable Clock Ready 0 Interrupt Enable */ -#define PMC_IER_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IER) Programmable Clock Ready 1 Interrupt Enable */ -#define PMC_IER_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IER) Programmable Clock Ready 2 Interrupt Enable */ -#define PMC_IER_MOSCSELS (0x1 << 16) /**< \brief (PMC_IER) Main Oscillator Selection Status Interrupt Enable */ -#define PMC_IER_MOSCRCS (0x1 << 17) /**< \brief (PMC_IER) Main On-Chip RC Status Interrupt Enable */ -#define PMC_IER_CFDEV (0x1 << 18) /**< \brief (PMC_IER) Clock Failure Detector Event Interrupt Enable */ -/* -------- PMC_IDR : (PMC Offset: 0x0064) Interrupt Disable Register -------- */ -#define PMC_IDR_MOSCXTS (0x1 << 0) /**< \brief (PMC_IDR) Main Crystal Oscillator Status Interrupt Disable */ -#define PMC_IDR_LOCKA (0x1 << 1) /**< \brief (PMC_IDR) PLLA Lock Interrupt Disable */ -#define PMC_IDR_LOCKB (0x1 << 2) /**< \brief (PMC_IDR) PLLB Lock Interrupt Disable */ -#define PMC_IDR_MCKRDY (0x1 << 3) /**< \brief (PMC_IDR) Master Clock Ready Interrupt Disable */ -#define PMC_IDR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IDR) Programmable Clock Ready 0 Interrupt Disable */ -#define PMC_IDR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IDR) Programmable Clock Ready 1 Interrupt Disable */ -#define PMC_IDR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IDR) Programmable Clock Ready 2 Interrupt Disable */ -#define PMC_IDR_MOSCSELS (0x1 << 16) /**< \brief (PMC_IDR) Main Oscillator Selection Status Interrupt Disable */ -#define PMC_IDR_MOSCRCS (0x1 << 17) /**< \brief (PMC_IDR) Main On-Chip RC Status Interrupt Disable */ -#define PMC_IDR_CFDEV (0x1 << 18) /**< \brief (PMC_IDR) Clock Failure Detector Event Interrupt Disable */ -/* -------- PMC_SR : (PMC Offset: 0x0068) Status Register -------- */ -#define PMC_SR_MOSCXTS (0x1 << 0) /**< \brief (PMC_SR) Main XTAL Oscillator Status */ -#define PMC_SR_LOCKA (0x1 << 1) /**< \brief (PMC_SR) PLLA Lock Status */ -#define PMC_SR_LOCKB (0x1 << 2) /**< \brief (PMC_SR) PLLB Lock Status */ -#define PMC_SR_MCKRDY (0x1 << 3) /**< \brief (PMC_SR) Master Clock Status */ -#define PMC_SR_OSCSELS (0x1 << 7) /**< \brief (PMC_SR) Slow Clock Oscillator Selection */ -#define PMC_SR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_MOSCSELS (0x1 << 16) /**< \brief (PMC_SR) Main Oscillator Selection Status */ -#define PMC_SR_MOSCRCS (0x1 << 17) /**< \brief (PMC_SR) Main On-Chip RC Oscillator Status */ -#define PMC_SR_CFDEV (0x1 << 18) /**< \brief (PMC_SR) Clock Failure Detector Event */ -#define PMC_SR_CFDS (0x1 << 19) /**< \brief (PMC_SR) Clock Failure Detector Status */ -#define PMC_SR_FOS (0x1 << 20) /**< \brief (PMC_SR) Clock Failure Detector Fault Output Status */ -/* -------- PMC_IMR : (PMC Offset: 0x006C) Interrupt Mask Register -------- */ -#define PMC_IMR_MOSCXTS (0x1 << 0) /**< \brief (PMC_IMR) Main Crystal Oscillator Status Interrupt Mask */ -#define PMC_IMR_LOCKA (0x1 << 1) /**< \brief (PMC_IMR) PLLA Lock Interrupt Mask */ -#define PMC_IMR_LOCKB (0x1 << 2) /**< \brief (PMC_IMR) PLLB Lock Interrupt Mask */ -#define PMC_IMR_MCKRDY (0x1 << 3) /**< \brief (PMC_IMR) Master Clock Ready Interrupt Mask */ -#define PMC_IMR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IMR) Programmable Clock Ready 0 Interrupt Mask */ -#define PMC_IMR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IMR) Programmable Clock Ready 1 Interrupt Mask */ -#define PMC_IMR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IMR) Programmable Clock Ready 2 Interrupt Mask */ -#define PMC_IMR_MOSCSELS (0x1 << 16) /**< \brief (PMC_IMR) Main Oscillator Selection Status Interrupt Mask */ -#define PMC_IMR_MOSCRCS (0x1 << 17) /**< \brief (PMC_IMR) Main On-Chip RC Status Interrupt Mask */ -#define PMC_IMR_CFDEV (0x1 << 18) /**< \brief (PMC_IMR) Clock Failure Detector Event Interrupt Mask */ -/* -------- PMC_FSMR : (PMC Offset: 0x0070) Fast Startup Mode Register -------- */ -#define PMC_FSMR_FSTT0 (0x1 << 0) /**< \brief (PMC_FSMR) Fast Startup Input Enable 0 */ -#define PMC_FSMR_FSTT1 (0x1 << 1) /**< \brief (PMC_FSMR) Fast Startup Input Enable 1 */ -#define PMC_FSMR_FSTT2 (0x1 << 2) /**< \brief (PMC_FSMR) Fast Startup Input Enable 2 */ -#define PMC_FSMR_FSTT3 (0x1 << 3) /**< \brief (PMC_FSMR) Fast Startup Input Enable 3 */ -#define PMC_FSMR_FSTT4 (0x1 << 4) /**< \brief (PMC_FSMR) Fast Startup Input Enable 4 */ -#define PMC_FSMR_FSTT5 (0x1 << 5) /**< \brief (PMC_FSMR) Fast Startup Input Enable 5 */ -#define PMC_FSMR_FSTT6 (0x1 << 6) /**< \brief (PMC_FSMR) Fast Startup Input Enable 6 */ -#define PMC_FSMR_FSTT7 (0x1 << 7) /**< \brief (PMC_FSMR) Fast Startup Input Enable 7 */ -#define PMC_FSMR_FSTT8 (0x1 << 8) /**< \brief (PMC_FSMR) Fast Startup Input Enable 8 */ -#define PMC_FSMR_FSTT9 (0x1 << 9) /**< \brief (PMC_FSMR) Fast Startup Input Enable 9 */ -#define PMC_FSMR_FSTT10 (0x1 << 10) /**< \brief (PMC_FSMR) Fast Startup Input Enable 10 */ -#define PMC_FSMR_FSTT11 (0x1 << 11) /**< \brief (PMC_FSMR) Fast Startup Input Enable 11 */ -#define PMC_FSMR_FSTT12 (0x1 << 12) /**< \brief (PMC_FSMR) Fast Startup Input Enable 12 */ -#define PMC_FSMR_FSTT13 (0x1 << 13) /**< \brief (PMC_FSMR) Fast Startup Input Enable 13 */ -#define PMC_FSMR_FSTT14 (0x1 << 14) /**< \brief (PMC_FSMR) Fast Startup Input Enable 14 */ -#define PMC_FSMR_FSTT15 (0x1 << 15) /**< \brief (PMC_FSMR) Fast Startup Input Enable 15 */ -#define PMC_FSMR_RTTAL (0x1 << 16) /**< \brief (PMC_FSMR) RTT Alarm Enable */ -#define PMC_FSMR_RTCAL (0x1 << 17) /**< \brief (PMC_FSMR) RTC Alarm Enable */ -#define PMC_FSMR_USBAL (0x1 << 18) /**< \brief (PMC_FSMR) USB Alarm Enable */ -#define PMC_FSMR_LPM (0x1 << 20) /**< \brief (PMC_FSMR) Low Power Mode */ -/* -------- PMC_FSPR : (PMC Offset: 0x0074) Fast Startup Polarity Register -------- */ -#define PMC_FSPR_FSTP0 (0x1 << 0) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP1 (0x1 << 1) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP2 (0x1 << 2) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP3 (0x1 << 3) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP4 (0x1 << 4) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP5 (0x1 << 5) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP6 (0x1 << 6) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP7 (0x1 << 7) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP8 (0x1 << 8) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP9 (0x1 << 9) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP10 (0x1 << 10) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP11 (0x1 << 11) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP12 (0x1 << 12) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP13 (0x1 << 13) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP14 (0x1 << 14) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP15 (0x1 << 15) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -/* -------- PMC_FOCR : (PMC Offset: 0x0078) Fault Output Clear Register -------- */ -#define PMC_FOCR_FOCLR (0x1 << 0) /**< \brief (PMC_FOCR) Fault Output Clear */ -/* -------- PMC_WPMR : (PMC Offset: 0x00E4) Write Protect Mode Register -------- */ -#define PMC_WPMR_WPEN (0x1 << 0) /**< \brief (PMC_WPMR) Write Protect Enable */ -#define PMC_WPMR_WPKEY (0xffffff << 8) /**< \brief (PMC_WPMR) Write Protect KEY */ -/* -------- PMC_WPSR : (PMC Offset: 0x00E8) Write Protect Status Register -------- */ -#define PMC_WPSR_WPVS (0x1 << 0) /**< \brief (PMC_WPSR) Write Protect Violation Status */ -#define PMC_WPSR_WPVSRC (0xffff << 8) /**< \brief (PMC_WPSR) Write Protect Violation Source */ -/* -------- PMC_PCER1 : (PMC Offset: 0x0100) Peripheral Clock Enable Register 1 -------- */ -#define PMC_PCER1_PID32 (0x1 << 0) /**< \brief (PMC_PCER1) Peripheral Clock 32 Enable */ -#define PMC_PCER1_PID33 (0x1 << 1) /**< \brief (PMC_PCER1) Peripheral Clock 33 Enable */ -#define PMC_PCER1_PID34 (0x1 << 2) /**< \brief (PMC_PCER1) Peripheral Clock 34 Enable */ -#define PMC_PCER1_PID35 (0x1 << 3) /**< \brief (PMC_PCER1) Peripheral Clock 35 Enable */ -#define PMC_PCER1_PID36 (0x1 << 4) /**< \brief (PMC_PCER1) Peripheral Clock 36 Enable */ -#define PMC_PCER1_PID37 (0x1 << 5) /**< \brief (PMC_PCER1) Peripheral Clock 37 Enable */ -#define PMC_PCER1_PID38 (0x1 << 6) /**< \brief (PMC_PCER1) Peripheral Clock 38 Enable */ -#define PMC_PCER1_PID39 (0x1 << 7) /**< \brief (PMC_PCER1) Peripheral Clock 39 Enable */ -#define PMC_PCER1_PID40 (0x1 << 8) /**< \brief (PMC_PCER1) Peripheral Clock 40 Enable */ -#define PMC_PCER1_PID41 (0x1 << 9) /**< \brief (PMC_PCER1) Peripheral Clock 41 Enable */ -#define PMC_PCER1_PID42 (0x1 << 10) /**< \brief (PMC_PCER1) Peripheral Clock 42 Enable */ -#define PMC_PCER1_PID43 (0x1 << 11) /**< \brief (PMC_PCER1) Peripheral Clock 43 Enable */ -#define PMC_PCER1_PID44 (0x1 << 12) /**< \brief (PMC_PCER1) Peripheral Clock 44 Enable */ -#define PMC_PCER1_PID45 (0x1 << 13) /**< \brief (PMC_PCER1) Peripheral Clock 45 Enable */ -#define PMC_PCER1_PID46 (0x1 << 14) /**< \brief (PMC_PCER1) Peripheral Clock 46 Enable */ -#define PMC_PCER1_PID47 (0x1 << 15) /**< \brief (PMC_PCER1) Peripheral Clock 47 Enable */ -#define PMC_PCER1_PID48 (0x1 << 16) /**< \brief (PMC_PCER1) Peripheral Clock 48 Enable */ -#define PMC_PCER1_PID49 (0x1 << 17) /**< \brief (PMC_PCER1) Peripheral Clock 49 Enable */ -#define PMC_PCER1_PID50 (0x1 << 18) /**< \brief (PMC_PCER1) Peripheral Clock 50 Enable */ -#define PMC_PCER1_PID51 (0x1 << 19) /**< \brief (PMC_PCER1) Peripheral Clock 51 Enable */ -#define PMC_PCER1_PID52 (0x1 << 20) /**< \brief (PMC_PCER1) Peripheral Clock 52 Enable */ -#define PMC_PCER1_PID53 (0x1 << 21) /**< \brief (PMC_PCER1) Peripheral Clock 53 Enable */ -#define PMC_PCER1_PID54 (0x1 << 22) /**< \brief (PMC_PCER1) Peripheral Clock 54 Enable */ -#define PMC_PCER1_PID55 (0x1 << 23) /**< \brief (PMC_PCER1) Peripheral Clock 55 Enable */ -#define PMC_PCER1_PID56 (0x1 << 24) /**< \brief (PMC_PCER1) Peripheral Clock 56 Enable */ -#define PMC_PCER1_PID57 (0x1 << 25) /**< \brief (PMC_PCER1) Peripheral Clock 57 Enable */ -#define PMC_PCER1_PID58 (0x1 << 26) /**< \brief (PMC_PCER1) Peripheral Clock 58 Enable */ -#define PMC_PCER1_PID59 (0x1 << 27) /**< \brief (PMC_PCER1) Peripheral Clock 59 Enable */ -#define PMC_PCER1_PID60 (0x1 << 28) /**< \brief (PMC_PCER1) Peripheral Clock 60 Enable */ -#define PMC_PCER1_PID61 (0x1 << 29) /**< \brief (PMC_PCER1) Peripheral Clock 61 Enable */ -#define PMC_PCER1_PID62 (0x1 << 30) /**< \brief (PMC_PCER1) Peripheral Clock 62 Enable */ -#define PMC_PCER1_PID63 (0x1 << 31) /**< \brief (PMC_PCER1) Peripheral Clock 63 Enable */ -/* -------- PMC_PCDR1 : (PMC Offset: 0x0104) Peripheral Clock Disable Register 1 -------- */ -#define PMC_PCDR1_PID32 (0x1 << 0) /**< \brief (PMC_PCDR1) Peripheral Clock 32 Disable */ -#define PMC_PCDR1_PID33 (0x1 << 1) /**< \brief (PMC_PCDR1) Peripheral Clock 33 Disable */ -#define PMC_PCDR1_PID34 (0x1 << 2) /**< \brief (PMC_PCDR1) Peripheral Clock 34 Disable */ -#define PMC_PCDR1_PID35 (0x1 << 3) /**< \brief (PMC_PCDR1) Peripheral Clock 35 Disable */ -#define PMC_PCDR1_PID36 (0x1 << 4) /**< \brief (PMC_PCDR1) Peripheral Clock 36 Disable */ -#define PMC_PCDR1_PID37 (0x1 << 5) /**< \brief (PMC_PCDR1) Peripheral Clock 37 Disable */ -#define PMC_PCDR1_PID38 (0x1 << 6) /**< \brief (PMC_PCDR1) Peripheral Clock 38 Disable */ -#define PMC_PCDR1_PID39 (0x1 << 7) /**< \brief (PMC_PCDR1) Peripheral Clock 39 Disable */ -#define PMC_PCDR1_PID40 (0x1 << 8) /**< \brief (PMC_PCDR1) Peripheral Clock 40 Disable */ -#define PMC_PCDR1_PID41 (0x1 << 9) /**< \brief (PMC_PCDR1) Peripheral Clock 41 Disable */ -#define PMC_PCDR1_PID42 (0x1 << 10) /**< \brief (PMC_PCDR1) Peripheral Clock 42 Disable */ -#define PMC_PCDR1_PID43 (0x1 << 11) /**< \brief (PMC_PCDR1) Peripheral Clock 43 Disable */ -#define PMC_PCDR1_PID44 (0x1 << 12) /**< \brief (PMC_PCDR1) Peripheral Clock 44 Disable */ -#define PMC_PCDR1_PID45 (0x1 << 13) /**< \brief (PMC_PCDR1) Peripheral Clock 45 Disable */ -#define PMC_PCDR1_PID46 (0x1 << 14) /**< \brief (PMC_PCDR1) Peripheral Clock 46 Disable */ -#define PMC_PCDR1_PID47 (0x1 << 15) /**< \brief (PMC_PCDR1) Peripheral Clock 47 Disable */ -#define PMC_PCDR1_PID48 (0x1 << 16) /**< \brief (PMC_PCDR1) Peripheral Clock 48 Disable */ -#define PMC_PCDR1_PID49 (0x1 << 17) /**< \brief (PMC_PCDR1) Peripheral Clock 49 Disable */ -#define PMC_PCDR1_PID50 (0x1 << 18) /**< \brief (PMC_PCDR1) Peripheral Clock 50 Disable */ -#define PMC_PCDR1_PID51 (0x1 << 19) /**< \brief (PMC_PCDR1) Peripheral Clock 51 Disable */ -#define PMC_PCDR1_PID52 (0x1 << 20) /**< \brief (PMC_PCDR1) Peripheral Clock 52 Disable */ -#define PMC_PCDR1_PID53 (0x1 << 21) /**< \brief (PMC_PCDR1) Peripheral Clock 53 Disable */ -#define PMC_PCDR1_PID54 (0x1 << 22) /**< \brief (PMC_PCDR1) Peripheral Clock 54 Disable */ -#define PMC_PCDR1_PID55 (0x1 << 23) /**< \brief (PMC_PCDR1) Peripheral Clock 55 Disable */ -#define PMC_PCDR1_PID56 (0x1 << 24) /**< \brief (PMC_PCDR1) Peripheral Clock 56 Disable */ -#define PMC_PCDR1_PID57 (0x1 << 25) /**< \brief (PMC_PCDR1) Peripheral Clock 57 Disable */ -#define PMC_PCDR1_PID58 (0x1 << 26) /**< \brief (PMC_PCDR1) Peripheral Clock 58 Disable */ -#define PMC_PCDR1_PID59 (0x1 << 27) /**< \brief (PMC_PCDR1) Peripheral Clock 59 Disable */ -#define PMC_PCDR1_PID60 (0x1 << 28) /**< \brief (PMC_PCDR1) Peripheral Clock 60 Disable */ -#define PMC_PCDR1_PID61 (0x1 << 29) /**< \brief (PMC_PCDR1) Peripheral Clock 61 Disable */ -#define PMC_PCDR1_PID62 (0x1 << 30) /**< \brief (PMC_PCDR1) Peripheral Clock 62 Disable */ -#define PMC_PCDR1_PID63 (0x1 << 31) /**< \brief (PMC_PCDR1) Peripheral Clock 63 Disable */ -/* -------- PMC_PCSR1 : (PMC Offset: 0x0108) Peripheral Clock Status Register 1 -------- */ -#define PMC_PCSR1_PID32 (0x1 << 0) /**< \brief (PMC_PCSR1) Peripheral Clock 32 Status */ -#define PMC_PCSR1_PID33 (0x1 << 1) /**< \brief (PMC_PCSR1) Peripheral Clock 33 Status */ -#define PMC_PCSR1_PID34 (0x1 << 2) /**< \brief (PMC_PCSR1) Peripheral Clock 34 Status */ -#define PMC_PCSR1_PID35 (0x1 << 3) /**< \brief (PMC_PCSR1) Peripheral Clock 35 Status */ -#define PMC_PCSR1_PID36 (0x1 << 4) /**< \brief (PMC_PCSR1) Peripheral Clock 36 Status */ -#define PMC_PCSR1_PID37 (0x1 << 5) /**< \brief (PMC_PCSR1) Peripheral Clock 37 Status */ -#define PMC_PCSR1_PID38 (0x1 << 6) /**< \brief (PMC_PCSR1) Peripheral Clock 38 Status */ -#define PMC_PCSR1_PID39 (0x1 << 7) /**< \brief (PMC_PCSR1) Peripheral Clock 39 Status */ -#define PMC_PCSR1_PID40 (0x1 << 8) /**< \brief (PMC_PCSR1) Peripheral Clock 40 Status */ -#define PMC_PCSR1_PID41 (0x1 << 9) /**< \brief (PMC_PCSR1) Peripheral Clock 41 Status */ -#define PMC_PCSR1_PID42 (0x1 << 10) /**< \brief (PMC_PCSR1) Peripheral Clock 42 Status */ -#define PMC_PCSR1_PID43 (0x1 << 11) /**< \brief (PMC_PCSR1) Peripheral Clock 43 Status */ -#define PMC_PCSR1_PID44 (0x1 << 12) /**< \brief (PMC_PCSR1) Peripheral Clock 44 Status */ -#define PMC_PCSR1_PID45 (0x1 << 13) /**< \brief (PMC_PCSR1) Peripheral Clock 45 Status */ -#define PMC_PCSR1_PID46 (0x1 << 14) /**< \brief (PMC_PCSR1) Peripheral Clock 46 Status */ -#define PMC_PCSR1_PID47 (0x1 << 15) /**< \brief (PMC_PCSR1) Peripheral Clock 47 Status */ -#define PMC_PCSR1_PID48 (0x1 << 16) /**< \brief (PMC_PCSR1) Peripheral Clock 48 Status */ -#define PMC_PCSR1_PID49 (0x1 << 17) /**< \brief (PMC_PCSR1) Peripheral Clock 49 Status */ -#define PMC_PCSR1_PID50 (0x1 << 18) /**< \brief (PMC_PCSR1) Peripheral Clock 50 Status */ -#define PMC_PCSR1_PID51 (0x1 << 19) /**< \brief (PMC_PCSR1) Peripheral Clock 51 Status */ -#define PMC_PCSR1_PID52 (0x1 << 20) /**< \brief (PMC_PCSR1) Peripheral Clock 52 Status */ -#define PMC_PCSR1_PID53 (0x1 << 21) /**< \brief (PMC_PCSR1) Peripheral Clock 53 Status */ -#define PMC_PCSR1_PID54 (0x1 << 22) /**< \brief (PMC_PCSR1) Peripheral Clock 54 Status */ -#define PMC_PCSR1_PID55 (0x1 << 23) /**< \brief (PMC_PCSR1) Peripheral Clock 55 Status */ -#define PMC_PCSR1_PID56 (0x1 << 24) /**< \brief (PMC_PCSR1) Peripheral Clock 56 Status */ -#define PMC_PCSR1_PID57 (0x1 << 25) /**< \brief (PMC_PCSR1) Peripheral Clock 57 Status */ -#define PMC_PCSR1_PID58 (0x1 << 26) /**< \brief (PMC_PCSR1) Peripheral Clock 58 Status */ -#define PMC_PCSR1_PID59 (0x1 << 27) /**< \brief (PMC_PCSR1) Peripheral Clock 59 Status */ -#define PMC_PCSR1_PID60 (0x1 << 28) /**< \brief (PMC_PCSR1) Peripheral Clock 60 Status */ -#define PMC_PCSR1_PID61 (0x1 << 29) /**< \brief (PMC_PCSR1) Peripheral Clock 61 Status */ -#define PMC_PCSR1_PID62 (0x1 << 30) /**< \brief (PMC_PCSR1) Peripheral Clock 62 Status */ -#define PMC_PCSR1_PID63 (0x1 << 31) /**< \brief (PMC_PCSR1) Peripheral Clock 63 Status */ -/* -------- PMC_OCR : (PMC Offset: 0x0110) Oscillator Calibration Register -------- */ -#define PMC_OCR_CAL4 (0x7f << 0) /**< \brief (PMC_OCR) RC Oscillator Calibration bits for 4 Mhz */ -#define PMC_OCR_SEL4 (0x1 << 7) /**< \brief (PMC_OCR) Selection of RC Oscillator Calibration bits for 4 Mhz */ -#define PMC_OCR_CAL8 (0x7f << 8) /**< \brief (PMC_OCR) RC Oscillator Calibration bits for 8 Mhz */ -#define PMC_OCR_SEL8 (0x1 << 15) /**< \brief (PMC_OCR) Selection of RC Oscillator Calibration bits for 8 Mhz */ -#define PMC_OCR_CAL12 (0x7f << 16) /**< \brief (PMC_OCR) RC Oscillator Calibration bits for 12 Mhz */ -#define PMC_OCR_SEL12 (0x1 << 23) /**< \brief (PMC_OCR) Selection of RC Oscillator Calibration bits for 12 Mhz */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Pulse Width Modulation Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_PWM Pulse Width Modulation Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief PwmCh_num hardware registers */ -typedef struct { - RwReg PWM_CMR; /**< \brief (PwmCh_num Offset: 0x0) PWM Channel Mode Register */ - RwReg PWM_CDTY; /**< \brief (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register */ - RwReg PWM_CDTYUPD; /**< \brief (PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register */ - RwReg PWM_CPRD; /**< \brief (PwmCh_num Offset: 0xC) PWM Channel Period Register */ - RwReg PWM_CPRDUPD; /**< \brief (PwmCh_num Offset: 0x10) PWM Channel Period Update Register */ - RwReg PWM_CCNT; /**< \brief (PwmCh_num Offset: 0x14) PWM Channel Counter Register */ - RwReg PWM_DT; /**< \brief (PwmCh_num Offset: 0x18) PWM Channel Dead Time Register */ - RwReg PWM_DTUPD; /**< \brief (PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register */ -} PwmCh_num; -/** \brief Pwm hardware registers */ -typedef struct { - RwReg PWM_CLK; /**< \brief (Pwm Offset: 0x00) PWM Clock Register */ - WoReg PWM_ENA; /**< \brief (Pwm Offset: 0x04) PWM Enable Register */ - WoReg PWM_DIS; /**< \brief (Pwm Offset: 0x08) PWM Disable Register */ - RoReg PWM_SR; /**< \brief (Pwm Offset: 0x0C) PWM Status Register */ - WoReg PWM_IER1; /**< \brief (Pwm Offset: 0x10) PWM Interrupt Enable Register 1 */ - WoReg PWM_IDR1; /**< \brief (Pwm Offset: 0x14) PWM Interrupt Disable Register 1 */ - RoReg PWM_IMR1; /**< \brief (Pwm Offset: 0x18) PWM Interrupt Mask Register 1 */ - RoReg PWM_ISR1; /**< \brief (Pwm Offset: 0x1C) PWM Interrupt Status Register 1 */ - RwReg PWM_SCM; /**< \brief (Pwm Offset: 0x20) PWM Sync Channels Mode Register */ - RwReg Reserved1[1]; - RwReg PWM_SCUC; /**< \brief (Pwm Offset: 0x28) PWM Sync Channels Update Control Register */ - RwReg PWM_SCUP; /**< \brief (Pwm Offset: 0x2C) PWM Sync Channels Update Period Register */ - WoReg PWM_SCUPUPD; /**< \brief (Pwm Offset: 0x30) PWM Sync Channels Update Period Update Register */ - WoReg PWM_IER2; /**< \brief (Pwm Offset: 0x34) PWM Interrupt Enable Register 2 */ - WoReg PWM_IDR2; /**< \brief (Pwm Offset: 0x38) PWM Interrupt Disable Register 2 */ - RoReg PWM_IMR2; /**< \brief (Pwm Offset: 0x3C) PWM Interrupt Mask Register 2 */ - RoReg PWM_ISR2; /**< \brief (Pwm Offset: 0x40) PWM Interrupt Status Register 2 */ - RwReg PWM_OOV; /**< \brief (Pwm Offset: 0x44) PWM Output Override Value Register */ - RwReg PWM_OS; /**< \brief (Pwm Offset: 0x48) PWM Output Selection Register */ - WoReg PWM_OSS; /**< \brief (Pwm Offset: 0x4C) PWM Output Selection Set Register */ - WoReg PWM_OSC; /**< \brief (Pwm Offset: 0x50) PWM Output Selection Clear Register */ - WoReg PWM_OSSUPD; /**< \brief (Pwm Offset: 0x54) PWM Output Selection Set Update Register */ - WoReg PWM_OSCUPD; /**< \brief (Pwm Offset: 0x58) PWM Output Selection Clear Update Register */ - RwReg PWM_FMR; /**< \brief (Pwm Offset: 0x5C) PWM Fault Mode Register */ - RoReg PWM_FSR; /**< \brief (Pwm Offset: 0x60) PWM Fault Status Register */ - WoReg PWM_FCR; /**< \brief (Pwm Offset: 0x64) PWM Fault Clear Register */ - RwReg PWM_FPV; /**< \brief (Pwm Offset: 0x68) PWM Fault Protection Value Register */ - RwReg PWM_FPE; /**< \brief (Pwm Offset: 0x6C) PWM Fault Protection Enable Register */ - RwReg Reserved2[3]; - RwReg PWM_ELxMR[2]; /**< \brief (Pwm Offset: 0x7C) PWM Event Line 0 Mode Register */ - RwReg Reserved3[11]; - RwReg PWM_SMMR; /**< \brief (Pwm Offset: 0xB0) PWM Stepper Motor Mode Register */ - RwReg Reserved4[12]; - WoReg PWM_WPCR; /**< \brief (Pwm Offset: 0xE4) PWM Write Protect Control Register */ - RoReg PWM_WPSR; /**< \brief (Pwm Offset: 0xE8) PWM Write Protect Status Register */ - RwReg Reserved5[5]; - RwReg PWM_RPR; /**< \brief (Pwm Offset: 0x100) Receive Pointer Register */ - RwReg PWM_RCR; /**< \brief (Pwm Offset: 0x104) Receive Counter Register */ - RwReg PWM_TPR; /**< \brief (Pwm Offset: 0x108) Transmit Pointer Register */ - RwReg PWM_TCR; /**< \brief (Pwm Offset: 0x10C) Transmit Counter Register */ - RwReg PWM_RNPR; /**< \brief (Pwm Offset: 0x110) Receive Next Pointer Register */ - RwReg PWM_RNCR; /**< \brief (Pwm Offset: 0x114) Receive Next Counter Register */ - RwReg PWM_TNPR; /**< \brief (Pwm Offset: 0x118) Transmit Next Pointer Register */ - RwReg PWM_TNCR; /**< \brief (Pwm Offset: 0x11C) Transmit Next Counter Register */ - WoReg PWM_PTCR; /**< \brief (Pwm Offset: 0x120) Transfer Control Register */ - RoReg PWM_PTSR; /**< \brief (Pwm Offset: 0x124) Transfer Status Register */ - RwReg Reserved6[2]; - RwReg PWM_CMP0V; /**< \brief (Pwm Offset: 0x130) PWM Comparison 0 Value Register */ - WoReg PWM_CMP0VUPD; /**< \brief (Pwm Offset: 0x134) PWM Comparison 0 Value Update Register */ - RwReg PWM_CMP0M; /**< \brief (Pwm Offset: 0x138) PWM Comparison 0 Mode Register */ - WoReg PWM_CMP0MUPD; /**< \brief (Pwm Offset: 0x13C) PWM Comparison 0 Mode Update Register */ - RwReg PWM_CMP1V; /**< \brief (Pwm Offset: 0x140) PWM Comparison 1 Value Register */ - WoReg PWM_CMP1VUPD; /**< \brief (Pwm Offset: 0x144) PWM Comparison 1 Value Update Register */ - RwReg PWM_CMP1M; /**< \brief (Pwm Offset: 0x148) PWM Comparison 1 Mode Register */ - WoReg PWM_CMP1MUPD; /**< \brief (Pwm Offset: 0x14C) PWM Comparison 1 Mode Update Register */ - RwReg PWM_CMP2V; /**< \brief (Pwm Offset: 0x150) PWM Comparison 2 Value Register */ - WoReg PWM_CMP2VUPD; /**< \brief (Pwm Offset: 0x154) PWM Comparison 2 Value Update Register */ - RwReg PWM_CMP2M; /**< \brief (Pwm Offset: 0x158) PWM Comparison 2 Mode Register */ - WoReg PWM_CMP2MUPD; /**< \brief (Pwm Offset: 0x15C) PWM Comparison 2 Mode Update Register */ - RwReg PWM_CMP3V; /**< \brief (Pwm Offset: 0x160) PWM Comparison 3 Value Register */ - WoReg PWM_CMP3VUPD; /**< \brief (Pwm Offset: 0x164) PWM Comparison 3 Value Update Register */ - RwReg PWM_CMP3M; /**< \brief (Pwm Offset: 0x168) PWM Comparison 3 Mode Register */ - WoReg PWM_CMP3MUPD; /**< \brief (Pwm Offset: 0x16C) PWM Comparison 3 Mode Update Register */ - RwReg PWM_CMP4V; /**< \brief (Pwm Offset: 0x170) PWM Comparison 4 Value Register */ - WoReg PWM_CMP4VUPD; /**< \brief (Pwm Offset: 0x174) PWM Comparison 4 Value Update Register */ - RwReg PWM_CMP4M; /**< \brief (Pwm Offset: 0x178) PWM Comparison 4 Mode Register */ - WoReg PWM_CMP4MUPD; /**< \brief (Pwm Offset: 0x17C) PWM Comparison 4 Mode Update Register */ - RwReg PWM_CMP5V; /**< \brief (Pwm Offset: 0x180) PWM Comparison 5 Value Register */ - WoReg PWM_CMP5VUPD; /**< \brief (Pwm Offset: 0x184) PWM Comparison 5 Value Update Register */ - RwReg PWM_CMP5M; /**< \brief (Pwm Offset: 0x188) PWM Comparison 5 Mode Register */ - WoReg PWM_CMP5MUPD; /**< \brief (Pwm Offset: 0x18C) PWM Comparison 5 Mode Update Register */ - RwReg PWM_CMP6V; /**< \brief (Pwm Offset: 0x190) PWM Comparison 6 Value Register */ - WoReg PWM_CMP6VUPD; /**< \brief (Pwm Offset: 0x194) PWM Comparison 6 Value Update Register */ - RwReg PWM_CMP6M; /**< \brief (Pwm Offset: 0x198) PWM Comparison 6 Mode Register */ - WoReg PWM_CMP6MUPD; /**< \brief (Pwm Offset: 0x19C) PWM Comparison 6 Mode Update Register */ - RwReg PWM_CMP7V; /**< \brief (Pwm Offset: 0x1A0) PWM Comparison 7 Value Register */ - WoReg PWM_CMP7VUPD; /**< \brief (Pwm Offset: 0x1A4) PWM Comparison 7 Value Update Register */ - RwReg PWM_CMP7M; /**< \brief (Pwm Offset: 0x1A8) PWM Comparison 7 Mode Register */ - WoReg PWM_CMP7MUPD; /**< \brief (Pwm Offset: 0x1AC) PWM Comparison 7 Mode Update Register */ - RwReg Reserved7[20]; - PwmCh_num PWM_CH_NUM[4]; /**< \brief (Pwm Offset: 0x200) ch_num = 0 .. 3 */ -} Pwm; -#endif /* __ASSEMBLY__ */ -/* -------- PWM_CLK : (PWM Offset: 0x00) PWM Clock Register -------- */ -#define PWM_CLK_DIVA (0xff << 0) /**< \brief (PWM_CLK) CLKA, CLKB Divide Factor */ -#define PWM_CLK_PREA (0xf << 8) /**< \brief (PWM_CLK) CLKA, CLKB Source Clock Selection */ -#define PWM_CLK_DIVB (0xff << 16) /**< \brief (PWM_CLK) CLKA, CLKB Divide Factor */ -#define PWM_CLK_PREB (0xf << 24) /**< \brief (PWM_CLK) CLKA, CLKB Source Clock Selection */ -/* -------- PWM_ENA : (PWM Offset: 0x04) PWM Enable Register -------- */ -#define PWM_ENA_CHID0 (0x1 << 0) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID1 (0x1 << 1) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID2 (0x1 << 2) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID3 (0x1 << 3) /**< \brief (PWM_ENA) Channel ID */ -/* -------- PWM_DIS : (PWM Offset: 0x08) PWM Disable Register -------- */ -#define PWM_DIS_CHID0 (0x1 << 0) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID1 (0x1 << 1) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID2 (0x1 << 2) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID3 (0x1 << 3) /**< \brief (PWM_DIS) Channel ID */ -/* -------- PWM_SR : (PWM Offset: 0x0C) PWM Status Register -------- */ -#define PWM_SR_CHID0 (0x1 << 0) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID1 (0x1 << 1) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID2 (0x1 << 2) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID3 (0x1 << 3) /**< \brief (PWM_SR) Channel ID */ -/* -------- PWM_IER1 : (PWM Offset: 0x10) PWM Interrupt Enable Register 1 -------- */ -#define PWM_IER1_CHID0 (0x1 << 0) /**< \brief (PWM_IER1) Counter Event on Channel 0 Interrupt Enable */ -#define PWM_IER1_CHID1 (0x1 << 1) /**< \brief (PWM_IER1) Counter Event on Channel 1 Interrupt Enable */ -#define PWM_IER1_CHID2 (0x1 << 2) /**< \brief (PWM_IER1) Counter Event on Channel 2 Interrupt Enable */ -#define PWM_IER1_CHID3 (0x1 << 3) /**< \brief (PWM_IER1) Counter Event on Channel 3 Interrupt Enable */ -#define PWM_IER1_FCHID0 (0x1 << 16) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 0 Interrupt Enable */ -#define PWM_IER1_FCHID1 (0x1 << 17) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 1 Interrupt Enable */ -#define PWM_IER1_FCHID2 (0x1 << 18) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 2 Interrupt Enable */ -#define PWM_IER1_FCHID3 (0x1 << 19) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 3 Interrupt Enable */ -/* -------- PWM_IDR1 : (PWM Offset: 0x14) PWM Interrupt Disable Register 1 -------- */ -#define PWM_IDR1_CHID0 (0x1 << 0) /**< \brief (PWM_IDR1) Counter Event on Channel 0 Interrupt Disable */ -#define PWM_IDR1_CHID1 (0x1 << 1) /**< \brief (PWM_IDR1) Counter Event on Channel 1 Interrupt Disable */ -#define PWM_IDR1_CHID2 (0x1 << 2) /**< \brief (PWM_IDR1) Counter Event on Channel 2 Interrupt Disable */ -#define PWM_IDR1_CHID3 (0x1 << 3) /**< \brief (PWM_IDR1) Counter Event on Channel 3 Interrupt Disable */ -#define PWM_IDR1_FCHID0 (0x1 << 16) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 0 Interrupt Disable */ -#define PWM_IDR1_FCHID1 (0x1 << 17) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 1 Interrupt Disable */ -#define PWM_IDR1_FCHID2 (0x1 << 18) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 2 Interrupt Disable */ -#define PWM_IDR1_FCHID3 (0x1 << 19) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 3 Interrupt Disable */ -/* -------- PWM_IMR1 : (PWM Offset: 0x18) PWM Interrupt Mask Register 1 -------- */ -#define PWM_IMR1_CHID0 (0x1 << 0) /**< \brief (PWM_IMR1) Counter Event on Channel 0 Interrupt Mask */ -#define PWM_IMR1_CHID1 (0x1 << 1) /**< \brief (PWM_IMR1) Counter Event on Channel 1 Interrupt Mask */ -#define PWM_IMR1_CHID2 (0x1 << 2) /**< \brief (PWM_IMR1) Counter Event on Channel 2 Interrupt Mask */ -#define PWM_IMR1_CHID3 (0x1 << 3) /**< \brief (PWM_IMR1) Counter Event on Channel 3 Interrupt Mask */ -#define PWM_IMR1_FCHID0 (0x1 << 16) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 0 Interrupt Mask */ -#define PWM_IMR1_FCHID1 (0x1 << 17) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 1 Interrupt Mask */ -#define PWM_IMR1_FCHID2 (0x1 << 18) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 2 Interrupt Mask */ -#define PWM_IMR1_FCHID3 (0x1 << 19) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 3 Interrupt Mask */ -/* -------- PWM_ISR1 : (PWM Offset: 0x1C) PWM Interrupt Status Register 1 -------- */ -#define PWM_ISR1_CHID0 (0x1 << 0) /**< \brief (PWM_ISR1) Counter Event on Channel 0 */ -#define PWM_ISR1_CHID1 (0x1 << 1) /**< \brief (PWM_ISR1) Counter Event on Channel 1 */ -#define PWM_ISR1_CHID2 (0x1 << 2) /**< \brief (PWM_ISR1) Counter Event on Channel 2 */ -#define PWM_ISR1_CHID3 (0x1 << 3) /**< \brief (PWM_ISR1) Counter Event on Channel 3 */ -#define PWM_ISR1_FCHID0 (0x1 << 16) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 0 */ -#define PWM_ISR1_FCHID1 (0x1 << 17) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 1 */ -#define PWM_ISR1_FCHID2 (0x1 << 18) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 2 */ -#define PWM_ISR1_FCHID3 (0x1 << 19) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 3 */ -/* -------- PWM_SCM : (PWM Offset: 0x20) PWM Sync Channels Mode Register -------- */ -#define PWM_SCM_SYNC0 (0x1 << 0) /**< \brief (PWM_SCM) Synchronous Channel 0 */ -#define PWM_SCM_SYNC1 (0x1 << 1) /**< \brief (PWM_SCM) Synchronous Channel 1 */ -#define PWM_SCM_SYNC2 (0x1 << 2) /**< \brief (PWM_SCM) Synchronous Channel 2 */ -#define PWM_SCM_SYNC3 (0x1 << 3) /**< \brief (PWM_SCM) Synchronous Channel 3 */ -#define PWM_SCM_UPDM (0x3 << 16) /**< \brief (PWM_SCM) Synchronous Channels Update Mode */ -#define PWM_SCM_PTRM (0x1 << 20) /**< \brief (PWM_SCM) PDC Transfer Request Mode */ -#define PWM_SCM_PTRCS (0x7 << 21) /**< \brief (PWM_SCM) PDC Transfer Request Comparison Selection */ -/* -------- PWM_SCUC : (PWM Offset: 0x28) PWM Sync Channels Update Control Register -------- */ -#define PWM_SCUC_UPDULOCK (0x1 << 0) /**< \brief (PWM_SCUC) Synchronous Channels Update Unlock */ -/* -------- PWM_SCUP : (PWM Offset: 0x2C) PWM Sync Channels Update Period Register -------- */ -#define PWM_SCUP_UPR (0xf << 0) /**< \brief (PWM_SCUP) Update Period */ -#define PWM_SCUP_UPRCNT (0xf << 4) /**< \brief (PWM_SCUP) Update Period Counter */ -/* -------- PWM_SCUPUPD : (PWM Offset: 0x30) PWM Sync Channels Update Period Update Register -------- */ -#define PWM_SCUPUPD_UPRUPD (0xf << 0) /**< \brief (PWM_SCUPUPD) Update Period Update */ -/* -------- PWM_IER2 : (PWM Offset: 0x34) PWM Interrupt Enable Register 2 -------- */ -#define PWM_IER2_WRDY (0x1 << 0) /**< \brief (PWM_IER2) Write Ready for Synchronous Channels Update Interrupt Enable */ -#define PWM_IER2_ENDTX (0x1 << 1) /**< \brief (PWM_IER2) PDC End of TX Buffer Interrupt Enable */ -#define PWM_IER2_TXBUFE (0x1 << 2) /**< \brief (PWM_IER2) PDC TX Buffer Empty Interrupt Enable */ -#define PWM_IER2_UNRE (0x1 << 3) /**< \brief (PWM_IER2) Synchronous Channels Update Underrun Error Interrupt Enable */ -#define PWM_IER2_CMPM0 (0x1 << 8) /**< \brief (PWM_IER2) Comparison 0 Match Interrupt Enable */ -#define PWM_IER2_CMPM1 (0x1 << 9) /**< \brief (PWM_IER2) Comparison 1 Match Interrupt Enable */ -#define PWM_IER2_CMPM2 (0x1 << 10) /**< \brief (PWM_IER2) Comparison 2 Match Interrupt Enable */ -#define PWM_IER2_CMPM3 (0x1 << 11) /**< \brief (PWM_IER2) Comparison 3 Match Interrupt Enable */ -#define PWM_IER2_CMPM4 (0x1 << 12) /**< \brief (PWM_IER2) Comparison 4 Match Interrupt Enable */ -#define PWM_IER2_CMPM5 (0x1 << 13) /**< \brief (PWM_IER2) Comparison 5 Match Interrupt Enable */ -#define PWM_IER2_CMPM6 (0x1 << 14) /**< \brief (PWM_IER2) Comparison 6 Match Interrupt Enable */ -#define PWM_IER2_CMPM7 (0x1 << 15) /**< \brief (PWM_IER2) Comparison 7 Match Interrupt Enable */ -#define PWM_IER2_CMPU0 (0x1 << 16) /**< \brief (PWM_IER2) Comparison 0 Update Interrupt Enable */ -#define PWM_IER2_CMPU1 (0x1 << 17) /**< \brief (PWM_IER2) Comparison 1 Update Interrupt Enable */ -#define PWM_IER2_CMPU2 (0x1 << 18) /**< \brief (PWM_IER2) Comparison 2 Update Interrupt Enable */ -#define PWM_IER2_CMPU3 (0x1 << 19) /**< \brief (PWM_IER2) Comparison 3 Update Interrupt Enable */ -#define PWM_IER2_CMPU4 (0x1 << 20) /**< \brief (PWM_IER2) Comparison 4 Update Interrupt Enable */ -#define PWM_IER2_CMPU5 (0x1 << 21) /**< \brief (PWM_IER2) Comparison 5 Update Interrupt Enable */ -#define PWM_IER2_CMPU6 (0x1 << 22) /**< \brief (PWM_IER2) Comparison 6 Update Interrupt Enable */ -#define PWM_IER2_CMPU7 (0x1 << 23) /**< \brief (PWM_IER2) Comparison 7 Update Interrupt Enable */ -/* -------- PWM_IDR2 : (PWM Offset: 0x38) PWM Interrupt Disable Register 2 -------- */ -#define PWM_IDR2_WRDY (0x1 << 0) /**< \brief (PWM_IDR2) Write Ready for Synchronous Channels Update Interrupt Disable */ -#define PWM_IDR2_ENDTX (0x1 << 1) /**< \brief (PWM_IDR2) PDC End of TX Buffer Interrupt Disable */ -#define PWM_IDR2_TXBUFE (0x1 << 2) /**< \brief (PWM_IDR2) PDC TX Buffer Empty Interrupt Disable */ -#define PWM_IDR2_UNRE (0x1 << 3) /**< \brief (PWM_IDR2) Synchronous Channels Update Underrun Error Interrupt Disable */ -#define PWM_IDR2_CMPM0 (0x1 << 8) /**< \brief (PWM_IDR2) Comparison 0 Match Interrupt Disable */ -#define PWM_IDR2_CMPM1 (0x1 << 9) /**< \brief (PWM_IDR2) Comparison 1 Match Interrupt Disable */ -#define PWM_IDR2_CMPM2 (0x1 << 10) /**< \brief (PWM_IDR2) Comparison 2 Match Interrupt Disable */ -#define PWM_IDR2_CMPM3 (0x1 << 11) /**< \brief (PWM_IDR2) Comparison 3 Match Interrupt Disable */ -#define PWM_IDR2_CMPM4 (0x1 << 12) /**< \brief (PWM_IDR2) Comparison 4 Match Interrupt Disable */ -#define PWM_IDR2_CMPM5 (0x1 << 13) /**< \brief (PWM_IDR2) Comparison 5 Match Interrupt Disable */ -#define PWM_IDR2_CMPM6 (0x1 << 14) /**< \brief (PWM_IDR2) Comparison 6 Match Interrupt Disable */ -#define PWM_IDR2_CMPM7 (0x1 << 15) /**< \brief (PWM_IDR2) Comparison 7 Match Interrupt Disable */ -#define PWM_IDR2_CMPU0 (0x1 << 16) /**< \brief (PWM_IDR2) Comparison 0 Update Interrupt Disable */ -#define PWM_IDR2_CMPU1 (0x1 << 17) /**< \brief (PWM_IDR2) Comparison 1 Update Interrupt Disable */ -#define PWM_IDR2_CMPU2 (0x1 << 18) /**< \brief (PWM_IDR2) Comparison 2 Update Interrupt Disable */ -#define PWM_IDR2_CMPU3 (0x1 << 19) /**< \brief (PWM_IDR2) Comparison 3 Update Interrupt Disable */ -#define PWM_IDR2_CMPU4 (0x1 << 20) /**< \brief (PWM_IDR2) Comparison 4 Update Interrupt Disable */ -#define PWM_IDR2_CMPU5 (0x1 << 21) /**< \brief (PWM_IDR2) Comparison 5 Update Interrupt Disable */ -#define PWM_IDR2_CMPU6 (0x1 << 22) /**< \brief (PWM_IDR2) Comparison 6 Update Interrupt Disable */ -#define PWM_IDR2_CMPU7 (0x1 << 23) /**< \brief (PWM_IDR2) Comparison 7 Update Interrupt Disable */ -/* -------- PWM_IMR2 : (PWM Offset: 0x3C) PWM Interrupt Mask Register 2 -------- */ -#define PWM_IMR2_WRDY (0x1 << 0) /**< \brief (PWM_IMR2) Write Ready for Synchronous Channels Update Interrupt Mask */ -#define PWM_IMR2_ENDTX (0x1 << 1) /**< \brief (PWM_IMR2) PDC End of TX Buffer Interrupt Mask */ -#define PWM_IMR2_TXBUFE (0x1 << 2) /**< \brief (PWM_IMR2) PDC TX Buffer Empty Interrupt Mask */ -#define PWM_IMR2_UNRE (0x1 << 3) /**< \brief (PWM_IMR2) Synchronous Channels Update Underrun Error Interrupt Mask */ -#define PWM_IMR2_CMPM0 (0x1 << 8) /**< \brief (PWM_IMR2) Comparison 0 Match Interrupt Mask */ -#define PWM_IMR2_CMPM1 (0x1 << 9) /**< \brief (PWM_IMR2) Comparison 1 Match Interrupt Mask */ -#define PWM_IMR2_CMPM2 (0x1 << 10) /**< \brief (PWM_IMR2) Comparison 2 Match Interrupt Mask */ -#define PWM_IMR2_CMPM3 (0x1 << 11) /**< \brief (PWM_IMR2) Comparison 3 Match Interrupt Mask */ -#define PWM_IMR2_CMPM4 (0x1 << 12) /**< \brief (PWM_IMR2) Comparison 4 Match Interrupt Mask */ -#define PWM_IMR2_CMPM5 (0x1 << 13) /**< \brief (PWM_IMR2) Comparison 5 Match Interrupt Mask */ -#define PWM_IMR2_CMPM6 (0x1 << 14) /**< \brief (PWM_IMR2) Comparison 6 Match Interrupt Mask */ -#define PWM_IMR2_CMPM7 (0x1 << 15) /**< \brief (PWM_IMR2) Comparison 7 Match Interrupt Mask */ -#define PWM_IMR2_CMPU0 (0x1 << 16) /**< \brief (PWM_IMR2) Comparison 0 Update Interrupt Mask */ -#define PWM_IMR2_CMPU1 (0x1 << 17) /**< \brief (PWM_IMR2) Comparison 1 Update Interrupt Mask */ -#define PWM_IMR2_CMPU2 (0x1 << 18) /**< \brief (PWM_IMR2) Comparison 2 Update Interrupt Mask */ -#define PWM_IMR2_CMPU3 (0x1 << 19) /**< \brief (PWM_IMR2) Comparison 3 Update Interrupt Mask */ -#define PWM_IMR2_CMPU4 (0x1 << 20) /**< \brief (PWM_IMR2) Comparison 4 Update Interrupt Mask */ -#define PWM_IMR2_CMPU5 (0x1 << 21) /**< \brief (PWM_IMR2) Comparison 5 Update Interrupt Mask */ -#define PWM_IMR2_CMPU6 (0x1 << 22) /**< \brief (PWM_IMR2) Comparison 6 Update Interrupt Mask */ -#define PWM_IMR2_CMPU7 (0x1 << 23) /**< \brief (PWM_IMR2) Comparison 7 Update Interrupt Mask */ -/* -------- PWM_ISR2 : (PWM Offset: 0x40) PWM Interrupt Status Register 2 -------- */ -#define PWM_ISR2_WRDY (0x1 << 0) /**< \brief (PWM_ISR2) Write Ready for Synchronous Channels Update */ -#define PWM_ISR2_ENDTX (0x1 << 1) /**< \brief (PWM_ISR2) PDC End of TX Buffer */ -#define PWM_ISR2_TXBUFE (0x1 << 2) /**< \brief (PWM_ISR2) PDC TX Buffer Empty */ -#define PWM_ISR2_UNRE (0x1 << 3) /**< \brief (PWM_ISR2) Synchronous Channels Update Underrun Error */ -#define PWM_ISR2_CMPM0 (0x1 << 8) /**< \brief (PWM_ISR2) Comparison 0 Match */ -#define PWM_ISR2_CMPM1 (0x1 << 9) /**< \brief (PWM_ISR2) Comparison 1 Match */ -#define PWM_ISR2_CMPM2 (0x1 << 10) /**< \brief (PWM_ISR2) Comparison 2 Match */ -#define PWM_ISR2_CMPM3 (0x1 << 11) /**< \brief (PWM_ISR2) Comparison 3 Match */ -#define PWM_ISR2_CMPM4 (0x1 << 12) /**< \brief (PWM_ISR2) Comparison 4 Match */ -#define PWM_ISR2_CMPM5 (0x1 << 13) /**< \brief (PWM_ISR2) Comparison 5 Match */ -#define PWM_ISR2_CMPM6 (0x1 << 14) /**< \brief (PWM_ISR2) Comparison 6 Match */ -#define PWM_ISR2_CMPM7 (0x1 << 15) /**< \brief (PWM_ISR2) Comparison 7 Match */ -#define PWM_ISR2_CMPU0 (0x1 << 16) /**< \brief (PWM_ISR2) Comparison 0 Update */ -#define PWM_ISR2_CMPU1 (0x1 << 17) /**< \brief (PWM_ISR2) Comparison 1 Update */ -#define PWM_ISR2_CMPU2 (0x1 << 18) /**< \brief (PWM_ISR2) Comparison 2 Update */ -#define PWM_ISR2_CMPU3 (0x1 << 19) /**< \brief (PWM_ISR2) Comparison 3 Update */ -#define PWM_ISR2_CMPU4 (0x1 << 20) /**< \brief (PWM_ISR2) Comparison 4 Update */ -#define PWM_ISR2_CMPU5 (0x1 << 21) /**< \brief (PWM_ISR2) Comparison 5 Update */ -#define PWM_ISR2_CMPU6 (0x1 << 22) /**< \brief (PWM_ISR2) Comparison 6 Update */ -#define PWM_ISR2_CMPU7 (0x1 << 23) /**< \brief (PWM_ISR2) Comparison 7 Update */ -/* -------- PWM_OOV : (PWM Offset: 0x44) PWM Output Override Value Register -------- */ -#define PWM_OOV_OOVH0 (0x1 << 0) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 0 */ -#define PWM_OOV_OOVH1 (0x1 << 1) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 1 */ -#define PWM_OOV_OOVH2 (0x1 << 2) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 2 */ -#define PWM_OOV_OOVH3 (0x1 << 3) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 3 */ -#define PWM_OOV_OOVL0 (0x1 << 16) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 0 */ -#define PWM_OOV_OOVL1 (0x1 << 17) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 1 */ -#define PWM_OOV_OOVL2 (0x1 << 18) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 2 */ -#define PWM_OOV_OOVL3 (0x1 << 19) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 3 */ -/* -------- PWM_OS : (PWM Offset: 0x48) PWM Output Selection Register -------- */ -#define PWM_OS_OSH0 (0x1 << 0) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 0 */ -#define PWM_OS_OSH1 (0x1 << 1) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 1 */ -#define PWM_OS_OSH2 (0x1 << 2) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 2 */ -#define PWM_OS_OSH3 (0x1 << 3) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 3 */ -#define PWM_OS_OSL0 (0x1 << 16) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 0 */ -#define PWM_OS_OSL1 (0x1 << 17) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 1 */ -#define PWM_OS_OSL2 (0x1 << 18) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 2 */ -#define PWM_OS_OSL3 (0x1 << 19) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 3 */ -/* -------- PWM_OSS : (PWM Offset: 0x4C) PWM Output Selection Set Register -------- */ -#define PWM_OSS_OSSH0 (0x1 << 0) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 0 */ -#define PWM_OSS_OSSH1 (0x1 << 1) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 1 */ -#define PWM_OSS_OSSH2 (0x1 << 2) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 2 */ -#define PWM_OSS_OSSH3 (0x1 << 3) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 3 */ -#define PWM_OSS_OSSL0 (0x1 << 16) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 0 */ -#define PWM_OSS_OSSL1 (0x1 << 17) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 1 */ -#define PWM_OSS_OSSL2 (0x1 << 18) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 2 */ -#define PWM_OSS_OSSL3 (0x1 << 19) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 3 */ -/* -------- PWM_OSC : (PWM Offset: 0x50) PWM Output Selection Clear Register -------- */ -#define PWM_OSC_OSCH0 (0x1 << 0) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 0 */ -#define PWM_OSC_OSCH1 (0x1 << 1) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 1 */ -#define PWM_OSC_OSCH2 (0x1 << 2) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 2 */ -#define PWM_OSC_OSCH3 (0x1 << 3) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 3 */ -#define PWM_OSC_OSCL0 (0x1 << 16) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 0 */ -#define PWM_OSC_OSCL1 (0x1 << 17) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 1 */ -#define PWM_OSC_OSCL2 (0x1 << 18) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 2 */ -#define PWM_OSC_OSCL3 (0x1 << 19) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 3 */ -/* -------- PWM_OSSUPD : (PWM Offset: 0x54) PWM Output Selection Set Update Register -------- */ -#define PWM_OSSUPD_OSSUPH0 (0x1 << 0) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 0 */ -#define PWM_OSSUPD_OSSUPH1 (0x1 << 1) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 1 */ -#define PWM_OSSUPD_OSSUPH2 (0x1 << 2) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 2 */ -#define PWM_OSSUPD_OSSUPH3 (0x1 << 3) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 3 */ -#define PWM_OSSUPD_OSSUPL0 (0x1 << 16) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 0 */ -#define PWM_OSSUPD_OSSUPL1 (0x1 << 17) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 1 */ -#define PWM_OSSUPD_OSSUPL2 (0x1 << 18) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 2 */ -#define PWM_OSSUPD_OSSUPL3 (0x1 << 19) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 3 */ -/* -------- PWM_OSCUPD : (PWM Offset: 0x58) PWM Output Selection Clear Update Register -------- */ -#define PWM_OSCUPD_OSCUPH0 (0x1 << 0) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 0 */ -#define PWM_OSCUPD_OSCUPH1 (0x1 << 1) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 1 */ -#define PWM_OSCUPD_OSCUPH2 (0x1 << 2) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 2 */ -#define PWM_OSCUPD_OSCUPH3 (0x1 << 3) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 3 */ -#define PWM_OSCUPD_OSCUPL0 (0x1 << 16) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 0 */ -#define PWM_OSCUPD_OSCUPL1 (0x1 << 17) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 1 */ -#define PWM_OSCUPD_OSCUPL2 (0x1 << 18) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 2 */ -#define PWM_OSCUPD_OSCUPL3 (0x1 << 19) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 3 */ -/* -------- PWM_FMR : (PWM Offset: 0x5C) PWM Fault Mode Register -------- */ -#define PWM_FMR_FPOL0 (0x1 << 0) /**< \brief (PWM_FMR) Fault 0 Polarity */ -#define PWM_FMR_FPOL1 (0x1 << 1) /**< \brief (PWM_FMR) Fault 1 Polarity */ -#define PWM_FMR_FPOL2 (0x1 << 2) /**< \brief (PWM_FMR) Fault 2 Polarity */ -#define PWM_FMR_FPOL3 (0x1 << 3) /**< \brief (PWM_FMR) Fault 3 Polarity */ -#define PWM_FMR_FMOD0 (0x1 << 8) /**< \brief (PWM_FMR) Fault 0 Activation Mode */ -#define PWM_FMR_FMOD1 (0x1 << 9) /**< \brief (PWM_FMR) Fault 1 Activation Mode */ -#define PWM_FMR_FMOD2 (0x1 << 10) /**< \brief (PWM_FMR) Fault 2 Activation Mode */ -#define PWM_FMR_FMOD3 (0x1 << 11) /**< \brief (PWM_FMR) Fault 3 Activation Mode */ -#define PWM_FMR_FFIL0 (0x1 << 16) /**< \brief (PWM_FMR) Fault 0 Filtering */ -#define PWM_FMR_FFIL1 (0x1 << 17) /**< \brief (PWM_FMR) Fault 1 Filtering */ -#define PWM_FMR_FFIL2 (0x1 << 18) /**< \brief (PWM_FMR) Fault 2 Filtering */ -#define PWM_FMR_FFIL3 (0x1 << 19) /**< \brief (PWM_FMR) Fault 3 Filtering */ -/* -------- PWM_FSR : (PWM Offset: 0x60) PWM Fault Status Register -------- */ -#define PWM_FSR_FIV0 (0x1 << 0) /**< \brief (PWM_FSR) Fault Input 0 Value */ -#define PWM_FSR_FIV1 (0x1 << 1) /**< \brief (PWM_FSR) Fault Input 1 Value */ -#define PWM_FSR_FIV2 (0x1 << 2) /**< \brief (PWM_FSR) Fault Input 2 Value */ -#define PWM_FSR_FIV3 (0x1 << 3) /**< \brief (PWM_FSR) Fault Input 3 Value */ -#define PWM_FSR_FS0 (0x1 << 8) /**< \brief (PWM_FSR) Fault 0 Status */ -#define PWM_FSR_FS1 (0x1 << 9) /**< \brief (PWM_FSR) Fault 1 Status */ -#define PWM_FSR_FS2 (0x1 << 10) /**< \brief (PWM_FSR) Fault 2 Status */ -#define PWM_FSR_FS3 (0x1 << 11) /**< \brief (PWM_FSR) Fault 3 Status */ -/* -------- PWM_FCR : (PWM Offset: 0x64) PWM Fault Clear Register -------- */ -#define PWM_FCR_FCLR0 (0x1 << 0) /**< \brief (PWM_FCR) Fault 0 Clear */ -#define PWM_FCR_FCLR1 (0x1 << 1) /**< \brief (PWM_FCR) Fault 1 Clear */ -#define PWM_FCR_FCLR2 (0x1 << 2) /**< \brief (PWM_FCR) Fault 2 Clear */ -#define PWM_FCR_FCLR3 (0x1 << 3) /**< \brief (PWM_FCR) Fault 3 Clear */ -/* -------- PWM_FPV : (PWM Offset: 0x68) PWM Fault Protection Value Register -------- */ -#define PWM_FPV_FPVH0 (0x1 << 0) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 0 */ -#define PWM_FPV_FPVH1 (0x1 << 1) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 1 */ -#define PWM_FPV_FPVH2 (0x1 << 2) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 2 */ -#define PWM_FPV_FPVH3 (0x1 << 3) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 3 */ -#define PWM_FPV_FPVL0 (0x1 << 16) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 0 */ -#define PWM_FPV_FPVL1 (0x1 << 17) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 1 */ -#define PWM_FPV_FPVL2 (0x1 << 18) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 2 */ -#define PWM_FPV_FPVL3 (0x1 << 19) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 3 */ -/* -------- PWM_FPE : (PWM Offset: 0x6C) PWM Fault Protection Enable Register -------- */ -#define PWM_FPE_FPE0 (0xff << 0) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 0 for channel x */ -#define PWM_FPE_FPE1 (0xff << 8) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 1 for channel x */ -#define PWM_FPE_FPE2 (0xff << 16) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 2 for channel x */ -#define PWM_FPE_FPE3 (0xff << 24) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 3 for channel x */ -/* -------- PWM_ELxMR[2] : (PWM Offset: 0x7C) PWM Event Line 0 Mode Register -------- */ -#define PWM_ELxMR_CSEL0 (0x1 << 0) /**< \brief (PWM_ELxMR[2]) Comparison 0 Selection */ -#define PWM_ELxMR_CSEL1 (0x1 << 1) /**< \brief (PWM_ELxMR[2]) Comparison 1 Selection */ -#define PWM_ELxMR_CSEL2 (0x1 << 2) /**< \brief (PWM_ELxMR[2]) Comparison 2 Selection */ -#define PWM_ELxMR_CSEL3 (0x1 << 3) /**< \brief (PWM_ELxMR[2]) Comparison 3 Selection */ -#define PWM_ELxMR_CSEL4 (0x1 << 4) /**< \brief (PWM_ELxMR[2]) Comparison 4 Selection */ -#define PWM_ELxMR_CSEL5 (0x1 << 5) /**< \brief (PWM_ELxMR[2]) Comparison 5 Selection */ -#define PWM_ELxMR_CSEL6 (0x1 << 6) /**< \brief (PWM_ELxMR[2]) Comparison 6 Selection */ -#define PWM_ELxMR_CSEL7 (0x1 << 7) /**< \brief (PWM_ELxMR[2]) Comparison 7 Selection */ -/* -------- PWM_SMMR : (PWM Offset: 0xB0) PWM Stepper Motor Mode Register -------- */ -#define PWM_SMMR_GCEN0 (0x1 << 0) /**< \brief (PWM_SMMR) Gray Count ENable */ -#define PWM_SMMR_GCEN1 (0x1 << 1) /**< \brief (PWM_SMMR) Gray Count ENable */ -#define PWM_SMMR_DOWN0 (0x1 << 16) /**< \brief (PWM_SMMR) DOWN Count */ -#define PWM_SMMR_DOWN1 (0x1 << 17) /**< \brief (PWM_SMMR) DOWN Count */ -/* -------- PWM_WPCR : (PWM Offset: 0xE4) PWM Write Protect Control Register -------- */ -#define PWM_WPCR_WPCMD (0x3 << 0) /**< \brief (PWM_WPCR) Write Protect Command */ -#define PWM_WPCR_WPRG0 (0x1 << 2) /**< \brief (PWM_WPCR) Write Protect Register Group 0 */ -#define PWM_WPCR_WPRG1 (0x1 << 3) /**< \brief (PWM_WPCR) Write Protect Register Group 1 */ -#define PWM_WPCR_WPRG2 (0x1 << 4) /**< \brief (PWM_WPCR) Write Protect Register Group 2 */ -#define PWM_WPCR_WPRG3 (0x1 << 5) /**< \brief (PWM_WPCR) Write Protect Register Group 3 */ -#define PWM_WPCR_WPRG4 (0x1 << 6) /**< \brief (PWM_WPCR) Write Protect Register Group 4 */ -#define PWM_WPCR_WPRG5 (0x1 << 7) /**< \brief (PWM_WPCR) Write Protect Register Group 5 */ -#define PWM_WPCR_WPKEY (0xffffff << 8) /**< \brief (PWM_WPCR) Write Protect Key */ -/* -------- PWM_WPSR : (PWM Offset: 0xE8) PWM Write Protect Status Register -------- */ -#define PWM_WPSR_WPSWS0 (0x1 << 0) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS1 (0x1 << 1) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS2 (0x1 << 2) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS3 (0x1 << 3) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS4 (0x1 << 4) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS5 (0x1 << 5) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPVS (0x1 << 7) /**< \brief (PWM_WPSR) Write Protect Violation Status */ -#define PWM_WPSR_WPHWS0 (0x1 << 8) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS1 (0x1 << 9) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS2 (0x1 << 10) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS3 (0x1 << 11) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS4 (0x1 << 12) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS5 (0x1 << 13) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPVSRC (0xffff << 16) /**< \brief (PWM_WPSR) Write Protect Violation Source */ -/* -------- PWM_RPR : (PWM Offset: 0x100) Receive Pointer Register -------- */ -#define PWM_RPR_RXPTR (0xffffffff << 0) /**< \brief (PWM_RPR) Receive Pointer Register */ -/* -------- PWM_RCR : (PWM Offset: 0x104) Receive Counter Register -------- */ -#define PWM_RCR_RXCTR (0xffff << 0) /**< \brief (PWM_RCR) Receive Counter Register */ -/* -------- PWM_TPR : (PWM Offset: 0x108) Transmit Pointer Register -------- */ -#define PWM_TPR_TXPTR (0xffffffff << 0) /**< \brief (PWM_TPR) Transmit Counter Register */ -/* -------- PWM_TCR : (PWM Offset: 0x10C) Transmit Counter Register -------- */ -#define PWM_TCR_TXCTR (0xffff << 0) /**< \brief (PWM_TCR) Transmit Counter Register */ -/* -------- PWM_RNPR : (PWM Offset: 0x110) Receive Next Pointer Register -------- */ -#define PWM_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (PWM_RNPR) Receive Next Pointer */ -/* -------- PWM_RNCR : (PWM Offset: 0x114) Receive Next Counter Register -------- */ -#define PWM_RNCR_RXNCTR (0xffff << 0) /**< \brief (PWM_RNCR) Receive Next Counter */ -/* -------- PWM_TNPR : (PWM Offset: 0x118) Transmit Next Pointer Register -------- */ -#define PWM_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (PWM_TNPR) Transmit Next Pointer */ -/* -------- PWM_TNCR : (PWM Offset: 0x11C) Transmit Next Counter Register -------- */ -#define PWM_TNCR_TXNCTR (0xffff << 0) /**< \brief (PWM_TNCR) Transmit Counter Next */ -/* -------- PWM_PTCR : (PWM Offset: 0x120) Transfer Control Register -------- */ -#define PWM_PTCR_RXTEN (0x1 << 0) /**< \brief (PWM_PTCR) Receiver Transfer Enable */ -#define PWM_PTCR_RXTDIS (0x1 << 1) /**< \brief (PWM_PTCR) Receiver Transfer Disable */ -#define PWM_PTCR_TXTEN (0x1 << 8) /**< \brief (PWM_PTCR) Transmitter Transfer Enable */ -#define PWM_PTCR_TXTDIS (0x1 << 9) /**< \brief (PWM_PTCR) Transmitter Transfer Disable */ -/* -------- PWM_PTSR : (PWM Offset: 0x124) Transfer Status Register -------- */ -#define PWM_PTSR_RXTEN (0x1 << 0) /**< \brief (PWM_PTSR) Receiver Transfer Enable */ -#define PWM_PTSR_TXTEN (0x1 << 8) /**< \brief (PWM_PTSR) Transmitter Transfer Enable */ -/* -------- PWM_CMP0V : (PWM Offset: 0x130) PWM Comparison 0 Value Register -------- */ -#define PWM_CMP0V_CV (0xffffff << 0) /**< \brief (PWM_CMP0V) Comparison x Value */ -#define PWM_CMP0V_CVM (0x1 << 24) /**< \brief (PWM_CMP0V) Comparison x Value Mode */ -/* -------- PWM_CMP0VUPD : (PWM Offset: 0x134) PWM Comparison 0 Value Update Register -------- */ -#define PWM_CMP0VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP0VUPD) Comparison x Value Update */ -#define PWM_CMP0VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP0VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP0M : (PWM Offset: 0x138) PWM Comparison 0 Mode Register -------- */ -#define PWM_CMP0M_CEN (0x1 << 0) /**< \brief (PWM_CMP0M) Comparison x Enable */ -#define PWM_CMP0M_CTR (0xf << 4) /**< \brief (PWM_CMP0M) Comparison x Trigger */ -#define PWM_CMP0M_CPR (0xf << 8) /**< \brief (PWM_CMP0M) Comparison x Period */ -#define PWM_CMP0M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP0M) Comparison x Period Counter */ -#define PWM_CMP0M_CUPR (0xf << 16) /**< \brief (PWM_CMP0M) Comparison x Update Period */ -#define PWM_CMP0M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP0M) Comparison x Update Period Counter */ -/* -------- PWM_CMP0MUPD : (PWM Offset: 0x13C) PWM Comparison 0 Mode Update Register -------- */ -#define PWM_CMP0MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP0MUPD) Comparison x Enable Update */ -#define PWM_CMP0MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP0MUPD) Comparison x Trigger Update */ -#define PWM_CMP0MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP0MUPD) Comparison x Period Update */ -#define PWM_CMP0MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP0MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP1V : (PWM Offset: 0x140) PWM Comparison 1 Value Register -------- */ -#define PWM_CMP1V_CV (0xffffff << 0) /**< \brief (PWM_CMP1V) Comparison x Value */ -#define PWM_CMP1V_CVM (0x1 << 24) /**< \brief (PWM_CMP1V) Comparison x Value Mode */ -/* -------- PWM_CMP1VUPD : (PWM Offset: 0x144) PWM Comparison 1 Value Update Register -------- */ -#define PWM_CMP1VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP1VUPD) Comparison x Value Update */ -#define PWM_CMP1VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP1VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP1M : (PWM Offset: 0x148) PWM Comparison 1 Mode Register -------- */ -#define PWM_CMP1M_CEN (0x1 << 0) /**< \brief (PWM_CMP1M) Comparison x Enable */ -#define PWM_CMP1M_CTR (0xf << 4) /**< \brief (PWM_CMP1M) Comparison x Trigger */ -#define PWM_CMP1M_CPR (0xf << 8) /**< \brief (PWM_CMP1M) Comparison x Period */ -#define PWM_CMP1M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP1M) Comparison x Period Counter */ -#define PWM_CMP1M_CUPR (0xf << 16) /**< \brief (PWM_CMP1M) Comparison x Update Period */ -#define PWM_CMP1M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP1M) Comparison x Update Period Counter */ -/* -------- PWM_CMP1MUPD : (PWM Offset: 0x14C) PWM Comparison 1 Mode Update Register -------- */ -#define PWM_CMP1MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP1MUPD) Comparison x Enable Update */ -#define PWM_CMP1MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP1MUPD) Comparison x Trigger Update */ -#define PWM_CMP1MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP1MUPD) Comparison x Period Update */ -#define PWM_CMP1MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP1MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP2V : (PWM Offset: 0x150) PWM Comparison 2 Value Register -------- */ -#define PWM_CMP2V_CV (0xffffff << 0) /**< \brief (PWM_CMP2V) Comparison x Value */ -#define PWM_CMP2V_CVM (0x1 << 24) /**< \brief (PWM_CMP2V) Comparison x Value Mode */ -/* -------- PWM_CMP2VUPD : (PWM Offset: 0x154) PWM Comparison 2 Value Update Register -------- */ -#define PWM_CMP2VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP2VUPD) Comparison x Value Update */ -#define PWM_CMP2VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP2VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP2M : (PWM Offset: 0x158) PWM Comparison 2 Mode Register -------- */ -#define PWM_CMP2M_CEN (0x1 << 0) /**< \brief (PWM_CMP2M) Comparison x Enable */ -#define PWM_CMP2M_CTR (0xf << 4) /**< \brief (PWM_CMP2M) Comparison x Trigger */ -#define PWM_CMP2M_CPR (0xf << 8) /**< \brief (PWM_CMP2M) Comparison x Period */ -#define PWM_CMP2M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP2M) Comparison x Period Counter */ -#define PWM_CMP2M_CUPR (0xf << 16) /**< \brief (PWM_CMP2M) Comparison x Update Period */ -#define PWM_CMP2M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP2M) Comparison x Update Period Counter */ -/* -------- PWM_CMP2MUPD : (PWM Offset: 0x15C) PWM Comparison 2 Mode Update Register -------- */ -#define PWM_CMP2MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP2MUPD) Comparison x Enable Update */ -#define PWM_CMP2MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP2MUPD) Comparison x Trigger Update */ -#define PWM_CMP2MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP2MUPD) Comparison x Period Update */ -#define PWM_CMP2MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP2MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP3V : (PWM Offset: 0x160) PWM Comparison 3 Value Register -------- */ -#define PWM_CMP3V_CV (0xffffff << 0) /**< \brief (PWM_CMP3V) Comparison x Value */ -#define PWM_CMP3V_CVM (0x1 << 24) /**< \brief (PWM_CMP3V) Comparison x Value Mode */ -/* -------- PWM_CMP3VUPD : (PWM Offset: 0x164) PWM Comparison 3 Value Update Register -------- */ -#define PWM_CMP3VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP3VUPD) Comparison x Value Update */ -#define PWM_CMP3VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP3VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP3M : (PWM Offset: 0x168) PWM Comparison 3 Mode Register -------- */ -#define PWM_CMP3M_CEN (0x1 << 0) /**< \brief (PWM_CMP3M) Comparison x Enable */ -#define PWM_CMP3M_CTR (0xf << 4) /**< \brief (PWM_CMP3M) Comparison x Trigger */ -#define PWM_CMP3M_CPR (0xf << 8) /**< \brief (PWM_CMP3M) Comparison x Period */ -#define PWM_CMP3M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP3M) Comparison x Period Counter */ -#define PWM_CMP3M_CUPR (0xf << 16) /**< \brief (PWM_CMP3M) Comparison x Update Period */ -#define PWM_CMP3M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP3M) Comparison x Update Period Counter */ -/* -------- PWM_CMP3MUPD : (PWM Offset: 0x16C) PWM Comparison 3 Mode Update Register -------- */ -#define PWM_CMP3MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP3MUPD) Comparison x Enable Update */ -#define PWM_CMP3MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP3MUPD) Comparison x Trigger Update */ -#define PWM_CMP3MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP3MUPD) Comparison x Period Update */ -#define PWM_CMP3MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP3MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP4V : (PWM Offset: 0x170) PWM Comparison 4 Value Register -------- */ -#define PWM_CMP4V_CV (0xffffff << 0) /**< \brief (PWM_CMP4V) Comparison x Value */ -#define PWM_CMP4V_CVM (0x1 << 24) /**< \brief (PWM_CMP4V) Comparison x Value Mode */ -/* -------- PWM_CMP4VUPD : (PWM Offset: 0x174) PWM Comparison 4 Value Update Register -------- */ -#define PWM_CMP4VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP4VUPD) Comparison x Value Update */ -#define PWM_CMP4VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP4VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP4M : (PWM Offset: 0x178) PWM Comparison 4 Mode Register -------- */ -#define PWM_CMP4M_CEN (0x1 << 0) /**< \brief (PWM_CMP4M) Comparison x Enable */ -#define PWM_CMP4M_CTR (0xf << 4) /**< \brief (PWM_CMP4M) Comparison x Trigger */ -#define PWM_CMP4M_CPR (0xf << 8) /**< \brief (PWM_CMP4M) Comparison x Period */ -#define PWM_CMP4M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP4M) Comparison x Period Counter */ -#define PWM_CMP4M_CUPR (0xf << 16) /**< \brief (PWM_CMP4M) Comparison x Update Period */ -#define PWM_CMP4M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP4M) Comparison x Update Period Counter */ -/* -------- PWM_CMP4MUPD : (PWM Offset: 0x17C) PWM Comparison 4 Mode Update Register -------- */ -#define PWM_CMP4MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP4MUPD) Comparison x Enable Update */ -#define PWM_CMP4MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP4MUPD) Comparison x Trigger Update */ -#define PWM_CMP4MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP4MUPD) Comparison x Period Update */ -#define PWM_CMP4MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP4MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP5V : (PWM Offset: 0x180) PWM Comparison 5 Value Register -------- */ -#define PWM_CMP5V_CV (0xffffff << 0) /**< \brief (PWM_CMP5V) Comparison x Value */ -#define PWM_CMP5V_CVM (0x1 << 24) /**< \brief (PWM_CMP5V) Comparison x Value Mode */ -/* -------- PWM_CMP5VUPD : (PWM Offset: 0x184) PWM Comparison 5 Value Update Register -------- */ -#define PWM_CMP5VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP5VUPD) Comparison x Value Update */ -#define PWM_CMP5VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP5VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP5M : (PWM Offset: 0x188) PWM Comparison 5 Mode Register -------- */ -#define PWM_CMP5M_CEN (0x1 << 0) /**< \brief (PWM_CMP5M) Comparison x Enable */ -#define PWM_CMP5M_CTR (0xf << 4) /**< \brief (PWM_CMP5M) Comparison x Trigger */ -#define PWM_CMP5M_CPR (0xf << 8) /**< \brief (PWM_CMP5M) Comparison x Period */ -#define PWM_CMP5M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP5M) Comparison x Period Counter */ -#define PWM_CMP5M_CUPR (0xf << 16) /**< \brief (PWM_CMP5M) Comparison x Update Period */ -#define PWM_CMP5M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP5M) Comparison x Update Period Counter */ -/* -------- PWM_CMP5MUPD : (PWM Offset: 0x18C) PWM Comparison 5 Mode Update Register -------- */ -#define PWM_CMP5MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP5MUPD) Comparison x Enable Update */ -#define PWM_CMP5MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP5MUPD) Comparison x Trigger Update */ -#define PWM_CMP5MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP5MUPD) Comparison x Period Update */ -#define PWM_CMP5MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP5MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP6V : (PWM Offset: 0x190) PWM Comparison 6 Value Register -------- */ -#define PWM_CMP6V_CV (0xffffff << 0) /**< \brief (PWM_CMP6V) Comparison x Value */ -#define PWM_CMP6V_CVM (0x1 << 24) /**< \brief (PWM_CMP6V) Comparison x Value Mode */ -/* -------- PWM_CMP6VUPD : (PWM Offset: 0x194) PWM Comparison 6 Value Update Register -------- */ -#define PWM_CMP6VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP6VUPD) Comparison x Value Update */ -#define PWM_CMP6VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP6VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP6M : (PWM Offset: 0x198) PWM Comparison 6 Mode Register -------- */ -#define PWM_CMP6M_CEN (0x1 << 0) /**< \brief (PWM_CMP6M) Comparison x Enable */ -#define PWM_CMP6M_CTR (0xf << 4) /**< \brief (PWM_CMP6M) Comparison x Trigger */ -#define PWM_CMP6M_CPR (0xf << 8) /**< \brief (PWM_CMP6M) Comparison x Period */ -#define PWM_CMP6M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP6M) Comparison x Period Counter */ -#define PWM_CMP6M_CUPR (0xf << 16) /**< \brief (PWM_CMP6M) Comparison x Update Period */ -#define PWM_CMP6M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP6M) Comparison x Update Period Counter */ -/* -------- PWM_CMP6MUPD : (PWM Offset: 0x19C) PWM Comparison 6 Mode Update Register -------- */ -#define PWM_CMP6MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP6MUPD) Comparison x Enable Update */ -#define PWM_CMP6MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP6MUPD) Comparison x Trigger Update */ -#define PWM_CMP6MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP6MUPD) Comparison x Period Update */ -#define PWM_CMP6MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP6MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP7V : (PWM Offset: 0x1A0) PWM Comparison 7 Value Register -------- */ -#define PWM_CMP7V_CV (0xffffff << 0) /**< \brief (PWM_CMP7V) Comparison x Value */ -#define PWM_CMP7V_CVM (0x1 << 24) /**< \brief (PWM_CMP7V) Comparison x Value Mode */ -/* -------- PWM_CMP7VUPD : (PWM Offset: 0x1A4) PWM Comparison 7 Value Update Register -------- */ -#define PWM_CMP7VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP7VUPD) Comparison x Value Update */ -#define PWM_CMP7VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP7VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP7M : (PWM Offset: 0x1A8) PWM Comparison 7 Mode Register -------- */ -#define PWM_CMP7M_CEN (0x1 << 0) /**< \brief (PWM_CMP7M) Comparison x Enable */ -#define PWM_CMP7M_CTR (0xf << 4) /**< \brief (PWM_CMP7M) Comparison x Trigger */ -#define PWM_CMP7M_CPR (0xf << 8) /**< \brief (PWM_CMP7M) Comparison x Period */ -#define PWM_CMP7M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP7M) Comparison x Period Counter */ -#define PWM_CMP7M_CUPR (0xf << 16) /**< \brief (PWM_CMP7M) Comparison x Update Period */ -#define PWM_CMP7M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP7M) Comparison x Update Period Counter */ -/* -------- PWM_CMP7MUPD : (PWM Offset: 0x1AC) PWM Comparison 7 Mode Update Register -------- */ -#define PWM_CMP7MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP7MUPD) Comparison x Enable Update */ -#define PWM_CMP7MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP7MUPD) Comparison x Trigger Update */ -#define PWM_CMP7MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP7MUPD) Comparison x Period Update */ -#define PWM_CMP7MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP7MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMR0 : (PWM Offset: 0x200) PWM Channel Mode Register (ch_num = 0) -------- */ -#define PWM_CMR0_CPRE (0xf << 0) /**< \brief (PWM_CMR0) Channel Pre-scaler */ -#define PWM_CMR0_CALG (0x1 << 8) /**< \brief (PWM_CMR0) Channel Alignment */ -#define PWM_CMR0_CPOL (0x1 << 9) /**< \brief (PWM_CMR0) Channel Polarity */ -#define PWM_CMR0_CES (0x1 << 10) /**< \brief (PWM_CMR0) Counter Event Selection */ -#define PWM_CMR0_DTE (0x1 << 16) /**< \brief (PWM_CMR0) Dead-Time Generator Enable */ -#define PWM_CMR0_DTHI (0x1 << 17) /**< \brief (PWM_CMR0) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR0_DTLI (0x1 << 18) /**< \brief (PWM_CMR0) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY0 : (PWM Offset: 0x204) PWM Channel Duty Cycle Register (ch_num = 0) -------- */ -#define PWM_CDTY0_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY0) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD0 : (PWM Offset: 0x208) PWM Channel Duty Cycle Update Register (ch_num = 0) -------- */ -#define PWM_CDTYUPD0_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD0) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD0 : (PWM Offset: 0x20C) PWM Channel Period Register (ch_num = 0) -------- */ -#define PWM_CPRD0_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD0) Channel Period */ -/* -------- PWM_CPRDUPD0 : (PWM Offset: 0x210) PWM Channel Period Update Register (ch_num = 0) -------- */ -#define PWM_CPRDUPD0_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD0) Channel Period Update */ -/* -------- PWM_CCNT0 : (PWM Offset: 0x214) PWM Channel Counter Register (ch_num = 0) -------- */ -#define PWM_CCNT0_CNT (0xffffff << 0) /**< \brief (PWM_CCNT0) Channel Counter Register */ -/* -------- PWM_DT0 : (PWM Offset: 0x218) PWM Channel Dead Time Register (ch_num = 0) -------- */ -#define PWM_DT0_DTH (0xffff << 0) /**< \brief (PWM_DT0) Dead-Time Value for PWMHx Output */ -#define PWM_DT0_DTL (0xffff << 16) /**< \brief (PWM_DT0) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD0 : (PWM Offset: 0x21C) PWM Channel Dead Time Update Register (ch_num = 0) -------- */ -#define PWM_DTUPD0_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD0) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD0_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD0) Dead-Time Value Update for PWMLx Output */ -/* -------- PWM_CMR1 : (PWM Offset: 0x220) PWM Channel Mode Register (ch_num = 1) -------- */ -#define PWM_CMR1_CPRE (0xf << 0) /**< \brief (PWM_CMR1) Channel Pre-scaler */ -#define PWM_CMR1_CALG (0x1 << 8) /**< \brief (PWM_CMR1) Channel Alignment */ -#define PWM_CMR1_CPOL (0x1 << 9) /**< \brief (PWM_CMR1) Channel Polarity */ -#define PWM_CMR1_CES (0x1 << 10) /**< \brief (PWM_CMR1) Counter Event Selection */ -#define PWM_CMR1_DTE (0x1 << 16) /**< \brief (PWM_CMR1) Dead-Time Generator Enable */ -#define PWM_CMR1_DTHI (0x1 << 17) /**< \brief (PWM_CMR1) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR1_DTLI (0x1 << 18) /**< \brief (PWM_CMR1) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY1 : (PWM Offset: 0x224) PWM Channel Duty Cycle Register (ch_num = 1) -------- */ -#define PWM_CDTY1_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY1) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD1 : (PWM Offset: 0x228) PWM Channel Duty Cycle Update Register (ch_num = 1) -------- */ -#define PWM_CDTYUPD1_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD1) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD1 : (PWM Offset: 0x22C) PWM Channel Period Register (ch_num = 1) -------- */ -#define PWM_CPRD1_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD1) Channel Period */ -/* -------- PWM_CPRDUPD1 : (PWM Offset: 0x230) PWM Channel Period Update Register (ch_num = 1) -------- */ -#define PWM_CPRDUPD1_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD1) Channel Period Update */ -/* -------- PWM_CCNT1 : (PWM Offset: 0x234) PWM Channel Counter Register (ch_num = 1) -------- */ -#define PWM_CCNT1_CNT (0xffffff << 0) /**< \brief (PWM_CCNT1) Channel Counter Register */ -/* -------- PWM_DT1 : (PWM Offset: 0x238) PWM Channel Dead Time Register (ch_num = 1) -------- */ -#define PWM_DT1_DTH (0xffff << 0) /**< \brief (PWM_DT1) Dead-Time Value for PWMHx Output */ -#define PWM_DT1_DTL (0xffff << 16) /**< \brief (PWM_DT1) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD1 : (PWM Offset: 0x23C) PWM Channel Dead Time Update Register (ch_num = 1) -------- */ -#define PWM_DTUPD1_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD1) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD1_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD1) Dead-Time Value Update for PWMLx Output */ -/* -------- PWM_CMR2 : (PWM Offset: 0x240) PWM Channel Mode Register (ch_num = 2) -------- */ -#define PWM_CMR2_CPRE (0xf << 0) /**< \brief (PWM_CMR2) Channel Pre-scaler */ -#define PWM_CMR2_CALG (0x1 << 8) /**< \brief (PWM_CMR2) Channel Alignment */ -#define PWM_CMR2_CPOL (0x1 << 9) /**< \brief (PWM_CMR2) Channel Polarity */ -#define PWM_CMR2_CES (0x1 << 10) /**< \brief (PWM_CMR2) Counter Event Selection */ -#define PWM_CMR2_DTE (0x1 << 16) /**< \brief (PWM_CMR2) Dead-Time Generator Enable */ -#define PWM_CMR2_DTHI (0x1 << 17) /**< \brief (PWM_CMR2) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR2_DTLI (0x1 << 18) /**< \brief (PWM_CMR2) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY2 : (PWM Offset: 0x244) PWM Channel Duty Cycle Register (ch_num = 2) -------- */ -#define PWM_CDTY2_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY2) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD2 : (PWM Offset: 0x248) PWM Channel Duty Cycle Update Register (ch_num = 2) -------- */ -#define PWM_CDTYUPD2_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD2) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD2 : (PWM Offset: 0x24C) PWM Channel Period Register (ch_num = 2) -------- */ -#define PWM_CPRD2_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD2) Channel Period */ -/* -------- PWM_CPRDUPD2 : (PWM Offset: 0x250) PWM Channel Period Update Register (ch_num = 2) -------- */ -#define PWM_CPRDUPD2_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD2) Channel Period Update */ -/* -------- PWM_CCNT2 : (PWM Offset: 0x254) PWM Channel Counter Register (ch_num = 2) -------- */ -#define PWM_CCNT2_CNT (0xffffff << 0) /**< \brief (PWM_CCNT2) Channel Counter Register */ -/* -------- PWM_DT2 : (PWM Offset: 0x258) PWM Channel Dead Time Register (ch_num = 2) -------- */ -#define PWM_DT2_DTH (0xffff << 0) /**< \brief (PWM_DT2) Dead-Time Value for PWMHx Output */ -#define PWM_DT2_DTL (0xffff << 16) /**< \brief (PWM_DT2) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD2 : (PWM Offset: 0x25C) PWM Channel Dead Time Update Register (ch_num = 2) -------- */ -#define PWM_DTUPD2_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD2) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD2_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD2) Dead-Time Value Update for PWMLx Output */ -/* -------- PWM_CMR3 : (PWM Offset: 0x260) PWM Channel Mode Register (ch_num = 3) -------- */ -#define PWM_CMR3_CPRE (0xf << 0) /**< \brief (PWM_CMR3) Channel Pre-scaler */ -#define PWM_CMR3_CALG (0x1 << 8) /**< \brief (PWM_CMR3) Channel Alignment */ -#define PWM_CMR3_CPOL (0x1 << 9) /**< \brief (PWM_CMR3) Channel Polarity */ -#define PWM_CMR3_CES (0x1 << 10) /**< \brief (PWM_CMR3) Counter Event Selection */ -#define PWM_CMR3_DTE (0x1 << 16) /**< \brief (PWM_CMR3) Dead-Time Generator Enable */ -#define PWM_CMR3_DTHI (0x1 << 17) /**< \brief (PWM_CMR3) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR3_DTLI (0x1 << 18) /**< \brief (PWM_CMR3) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY3 : (PWM Offset: 0x264) PWM Channel Duty Cycle Register (ch_num = 3) -------- */ -#define PWM_CDTY3_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY3) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD3 : (PWM Offset: 0x268) PWM Channel Duty Cycle Update Register (ch_num = 3) -------- */ -#define PWM_CDTYUPD3_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD3) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD3 : (PWM Offset: 0x26C) PWM Channel Period Register (ch_num = 3) -------- */ -#define PWM_CPRD3_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD3) Channel Period */ -/* -------- PWM_CPRDUPD3 : (PWM Offset: 0x270) PWM Channel Period Update Register (ch_num = 3) -------- */ -#define PWM_CPRDUPD3_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD3) Channel Period Update */ -/* -------- PWM_CCNT3 : (PWM Offset: 0x274) PWM Channel Counter Register (ch_num = 3) -------- */ -#define PWM_CCNT3_CNT (0xffffff << 0) /**< \brief (PWM_CCNT3) Channel Counter Register */ -/* -------- PWM_DT3 : (PWM Offset: 0x278) PWM Channel Dead Time Register (ch_num = 3) -------- */ -#define PWM_DT3_DTH (0xffff << 0) /**< \brief (PWM_DT3) Dead-Time Value for PWMHx Output */ -#define PWM_DT3_DTL (0xffff << 16) /**< \brief (PWM_DT3) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD3 : (PWM Offset: 0x27C) PWM Channel Dead Time Update Register (ch_num = 3) -------- */ -#define PWM_DTUPD3_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD3) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD3_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD3) Dead-Time Value Update for PWMLx Output */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Reset Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_RSTC Reset Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rstc hardware registers */ -typedef struct { - WoReg RSTC_CR; /**< \brief (Rstc Offset: 0x00) Control Register */ - RoReg RSTC_SR; /**< \brief (Rstc Offset: 0x04) Status Register */ - RwReg RSTC_MR; /**< \brief (Rstc Offset: 0x08) Mode Register */ -} Rstc; -#endif /* __ASSEMBLY__ */ -/* -------- RSTC_CR : (RSTC Offset: 0x00) Control Register -------- */ -#define RSTC_CR_PROCRST (0x1 << 0) /**< \brief (RSTC_CR) Processor Reset */ -#define RSTC_CR_PERRST (0x1 << 2) /**< \brief (RSTC_CR) Peripheral Reset */ -#define RSTC_CR_EXTRST (0x1 << 3) /**< \brief (RSTC_CR) External Reset */ -#define RSTC_CR_KEY (0xff << 24) /**< \brief (RSTC_CR) Password */ -/* -------- RSTC_SR : (RSTC Offset: 0x04) Status Register -------- */ -#define RSTC_SR_URSTS (0x1 << 0) /**< \brief (RSTC_SR) User Reset Status */ -#define RSTC_SR_RSTTYP (0x7 << 8) /**< \brief (RSTC_SR) Reset Type */ -#define RSTC_SR_NRSTL (0x1 << 16) /**< \brief (RSTC_SR) NRST Pin Level */ -#define RSTC_SR_SRCMP (0x1 << 17) /**< \brief (RSTC_SR) Software Reset Command in Progress */ -/* -------- RSTC_MR : (RSTC Offset: 0x08) Mode Register -------- */ -#define RSTC_MR_URSTEN (0x1 << 0) /**< \brief (RSTC_MR) User Reset Enable */ -#define RSTC_MR_URSTIEN (0x1 << 4) /**< \brief (RSTC_MR) User Reset Interrupt Enable */ -#define RSTC_MR_ERSTL (0xf << 8) /**< \brief (RSTC_MR) External Reset Length */ -#define RSTC_MR_KEY (0xff << 24) /**< \brief (RSTC_MR) Password */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Real-time Clock */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_RTC Real-time Clock */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rtc hardware registers */ -typedef struct { - RwReg RTC_CR; /**< \brief (Rtc Offset: 0x00) Control Register */ - RwReg RTC_MR; /**< \brief (Rtc Offset: 0x04) Mode Register */ - RwReg RTC_TIMR; /**< \brief (Rtc Offset: 0x08) Time Register */ - RwReg RTC_CALR; /**< \brief (Rtc Offset: 0x0C) Calendar Register */ - RwReg RTC_TIMALR; /**< \brief (Rtc Offset: 0x10) Time Alarm Register */ - RwReg RTC_CALALR; /**< \brief (Rtc Offset: 0x14) Calendar Alarm Register */ - RoReg RTC_SR; /**< \brief (Rtc Offset: 0x18) Status Register */ - WoReg RTC_SCCR; /**< \brief (Rtc Offset: 0x1C) Status Clear Command Register */ - WoReg RTC_IER; /**< \brief (Rtc Offset: 0x20) Interrupt Enable Register */ - WoReg RTC_IDR; /**< \brief (Rtc Offset: 0x24) Interrupt Disable Register */ - RoReg RTC_IMR; /**< \brief (Rtc Offset: 0x28) Interrupt Mask Register */ - RoReg RTC_VER; /**< \brief (Rtc Offset: 0x2C) Valid Entry Register */ -} Rtc; -#endif /* __ASSEMBLY__ */ -/* -------- RTC_CR : (RTC Offset: 0x00) Control Register -------- */ -#define RTC_CR_UPDTIM (0x1 << 0) /**< \brief (RTC_CR) Update Request Time Register */ -#define RTC_CR_UPDCAL (0x1 << 1) /**< \brief (RTC_CR) Update Request Calendar Register */ -#define RTC_CR_TIMEVSEL (0x3 << 8) /**< \brief (RTC_CR) Time Event Selection */ -#define RTC_CR_TIMEVSEL_MINUTE (0x0 << 8) /**< \brief (RTC_CR) Minute change. */ -#define RTC_CR_TIMEVSEL_HOUR (0x1 << 8) /**< \brief (RTC_CR) Hour change. */ -#define RTC_CR_TIMEVSEL_DAY24 (0x2 << 8) /**< \brief (RTC_CR) Every day at midnight. */ -#define RTC_CR_TIMEVSEL_DAY12 (0x3 << 8) /**< \brief (RTC_CR) Every day at noon. */ -#define RTC_CR_CALEVSEL (0x3 << 16) /**< \brief (RTC_CR) Calendar Event Selection */ -#define RTC_CR_CALEVSEL_WEEK (0x0 << 16) /**< \brief (RTC_CR) Week change (every Monday at time 00:00:00). */ -#define RTC_CR_CALEVSEL_MONTH (0x1 << 16) /**< \brief (RTC_CR) Month change (every 01 of each month at time 00:00:00). */ -/* -------- RTC_MR : (RTC Offset: 0x04) Mode Register -------- */ -#define RTC_MR_HRMOD (0x1 << 0) /**< \brief (RTC_MR) 12-/24-hour Mode */ -/* -------- RTC_TIMR : (RTC Offset: 0x08) Time Register -------- */ -#define RTC_TIMR_SEC (0x7f << 0) /**< \brief (RTC_TIMR) Current Second */ -#define RTC_TIMR_MIN (0x7f << 8) /**< \brief (RTC_TIMR) Current Minute */ -#define RTC_TIMR_HOUR (0x3f << 16) /**< \brief (RTC_TIMR) Current Hour */ -#define RTC_TIMR_AMPM (0x1 << 22) /**< \brief (RTC_TIMR) Ante Meridiem Post Meridiem Indicator */ -/* -------- RTC_CALR : (RTC Offset: 0x0C) Calendar Register -------- */ -#define RTC_CALR_CENT (0x7f << 0) /**< \brief (RTC_CALR) Current Century */ -#define RTC_CALR_YEAR (0xff << 8) /**< \brief (RTC_CALR) Current Year */ -#define RTC_CALR_MONTH (0x1f << 16) /**< \brief (RTC_CALR) Current Month */ -#define RTC_CALR_DAY (0x7 << 21) /**< \brief (RTC_CALR) Current Day in Current Week */ -#define RTC_CALR_DATE (0x3f << 24) /**< \brief (RTC_CALR) Current Day in Current Month */ -/* -------- RTC_TIMALR : (RTC Offset: 0x10) Time Alarm Register -------- */ -#define RTC_TIMALR_SEC (0x7f << 0) /**< \brief (RTC_TIMALR) Second Alarm */ -#define RTC_TIMALR_SECEN (0x1 << 7) /**< \brief (RTC_TIMALR) Second Alarm Enable */ -#define RTC_TIMALR_MIN (0x7f << 8) /**< \brief (RTC_TIMALR) Minute Alarm */ -#define RTC_TIMALR_MINEN (0x1 << 15) /**< \brief (RTC_TIMALR) Minute Alarm Enable */ -#define RTC_TIMALR_HOUR (0x3f << 16) /**< \brief (RTC_TIMALR) Hour Alarm */ -#define RTC_TIMALR_AMPM (0x1 << 22) /**< \brief (RTC_TIMALR) AM/PM Indicator */ -#define RTC_TIMALR_HOUREN (0x1 << 23) /**< \brief (RTC_TIMALR) Hour Alarm Enable */ -/* -------- RTC_CALALR : (RTC Offset: 0x14) Calendar Alarm Register -------- */ -#define RTC_CALALR_MONTH (0x1f << 16) /**< \brief (RTC_CALALR) Month Alarm */ -#define RTC_CALALR_MTHEN (0x1 << 23) /**< \brief (RTC_CALALR) Month Alarm Enable */ -#define RTC_CALALR_DATE (0x3f << 24) /**< \brief (RTC_CALALR) Date Alarm */ -#define RTC_CALALR_DATEEN (0x1 << 31) /**< \brief (RTC_CALALR) Date Alarm Enable */ -/* -------- RTC_SR : (RTC Offset: 0x18) Status Register -------- */ -#define RTC_SR_ACKUPD (0x1 << 0) /**< \brief (RTC_SR) Acknowledge for Update */ -#define RTC_SR_ALARM (0x1 << 1) /**< \brief (RTC_SR) Alarm Flag */ -#define RTC_SR_SEC (0x1 << 2) /**< \brief (RTC_SR) Second Event */ -#define RTC_SR_TIMEV (0x1 << 3) /**< \brief (RTC_SR) Time Event */ -#define RTC_SR_CALEV (0x1 << 4) /**< \brief (RTC_SR) Calendar Event */ -/* -------- RTC_SCCR : (RTC Offset: 0x1C) Status Clear Command Register -------- */ -#define RTC_SCCR_ACKCLR (0x1 << 0) /**< \brief (RTC_SCCR) Acknowledge Clear */ -#define RTC_SCCR_ALRCLR (0x1 << 1) /**< \brief (RTC_SCCR) Alarm Clear */ -#define RTC_SCCR_SECCLR (0x1 << 2) /**< \brief (RTC_SCCR) Second Clear */ -#define RTC_SCCR_TIMCLR (0x1 << 3) /**< \brief (RTC_SCCR) Time Clear */ -#define RTC_SCCR_CALCLR (0x1 << 4) /**< \brief (RTC_SCCR) Calendar Clear */ -/* -------- RTC_IER : (RTC Offset: 0x20) Interrupt Enable Register -------- */ -#define RTC_IER_ACKEN (0x1 << 0) /**< \brief (RTC_IER) Acknowledge Update Interrupt Enable */ -#define RTC_IER_ALREN (0x1 << 1) /**< \brief (RTC_IER) Alarm Interrupt Enable */ -#define RTC_IER_SECEN (0x1 << 2) /**< \brief (RTC_IER) Second Event Interrupt Enable */ -#define RTC_IER_TIMEN (0x1 << 3) /**< \brief (RTC_IER) Time Event Interrupt Enable */ -#define RTC_IER_CALEN (0x1 << 4) /**< \brief (RTC_IER) Calendar Event Interrupt Enable */ -/* -------- RTC_IDR : (RTC Offset: 0x24) Interrupt Disable Register -------- */ -#define RTC_IDR_ACKDIS (0x1 << 0) /**< \brief (RTC_IDR) Acknowledge Update Interrupt Disable */ -#define RTC_IDR_ALRDIS (0x1 << 1) /**< \brief (RTC_IDR) Alarm Interrupt Disable */ -#define RTC_IDR_SECDIS (0x1 << 2) /**< \brief (RTC_IDR) Second Event Interrupt Disable */ -#define RTC_IDR_TIMDIS (0x1 << 3) /**< \brief (RTC_IDR) Time Event Interrupt Disable */ -#define RTC_IDR_CALDIS (0x1 << 4) /**< \brief (RTC_IDR) Calendar Event Interrupt Disable */ -/* -------- RTC_IMR : (RTC Offset: 0x28) Interrupt Mask Register -------- */ -#define RTC_IMR_ACK (0x1 << 0) /**< \brief (RTC_IMR) Acknowledge Update Interrupt Mask */ -#define RTC_IMR_ALR (0x1 << 1) /**< \brief (RTC_IMR) Alarm Interrupt Mask */ -#define RTC_IMR_SEC (0x1 << 2) /**< \brief (RTC_IMR) Second Event Interrupt Mask */ -#define RTC_IMR_TIM (0x1 << 3) /**< \brief (RTC_IMR) Time Event Interrupt Mask */ -#define RTC_IMR_CAL (0x1 << 4) /**< \brief (RTC_IMR) Calendar Event Interrupt Mask */ -/* -------- RTC_VER : (RTC Offset: 0x2C) Valid Entry Register -------- */ -#define RTC_VER_NVTIM (0x1 << 0) /**< \brief (RTC_VER) Non-valid Time */ -#define RTC_VER_NVCAL (0x1 << 1) /**< \brief (RTC_VER) Non-valid Calendar */ -#define RTC_VER_NVTIMALR (0x1 << 2) /**< \brief (RTC_VER) Non-valid Time Alarm */ -#define RTC_VER_NVCALALR (0x1 << 3) /**< \brief (RTC_VER) Non-valid Calendar Alarm */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Real-time Timer */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_RTT Real-time Timer */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rtt hardware registers */ -typedef struct { - RwReg RTT_MR; /**< \brief (Rtt Offset: 0x00) Mode Register */ - RwReg RTT_AR; /**< \brief (Rtt Offset: 0x04) Alarm Register */ - RoReg RTT_VR; /**< \brief (Rtt Offset: 0x08) Value Register */ - RoReg RTT_SR; /**< \brief (Rtt Offset: 0x0C) Status Register */ -} Rtt; -#endif /* __ASSEMBLY__ */ -/* -------- RTT_MR : (RTT Offset: 0x00) Mode Register -------- */ -#define RTT_MR_RTPRES (0xffff << 0) /**< \brief (RTT_MR) Real-time Timer Prescaler Value */ -#define RTT_MR_ALMIEN (0x1 << 16) /**< \brief (RTT_MR) Alarm Interrupt Enable */ -#define RTT_MR_RTTINCIEN (0x1 << 17) /**< \brief (RTT_MR) Real-time Timer Increment Interrupt Enable */ -#define RTT_MR_RTTRST (0x1 << 18) /**< \brief (RTT_MR) Real-time Timer Restart */ -/* -------- RTT_AR : (RTT Offset: 0x04) Alarm Register -------- */ -#define RTT_AR_ALMV (0xffffffff << 0) /**< \brief (RTT_AR) Alarm Value */ -/* -------- RTT_VR : (RTT Offset: 0x08) Value Register -------- */ -#define RTT_VR_CRTV (0xffffffff << 0) /**< \brief (RTT_VR) Current Real-time Value */ -/* -------- RTT_SR : (RTT Offset: 0x0C) Status Register -------- */ -#define RTT_SR_ALMS (0x1 << 0) /**< \brief (RTT_SR) Real-time Alarm Status */ -#define RTT_SR_RTTINC (0x1 << 1) /**< \brief (RTT_SR) Real-time Timer Increment */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Static Memory Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_SMC Static Memory Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief SmcCs_number hardware registers */ -typedef struct { - RwReg SMC_SETUP; /**< \brief (SmcCs_number Offset: 0x0) SMC Setup Register */ - RwReg SMC_PULSE; /**< \brief (SmcCs_number Offset: 0x4) SMC Pulse Register */ - RwReg SMC_CYCLE; /**< \brief (SmcCs_number Offset: 0x8) SMC Cycle Register */ - RwReg SMC_MODE; /**< \brief (SmcCs_number Offset: 0xC) SMC Mode Register */ -} SmcCs_number; -/** \brief Smc hardware registers */ -typedef struct { - SmcCs_number SMC_CS_NUMBER[5]; /**< \brief (Smc Offset: 0x0) CS_number = 0 .. 4 */ - RwReg Reserved1[12]; - RwReg SMC_OCMS; /**< \brief (Smc Offset: 0x80) SMC OCMS MODE Register */ - WoReg SMC_KEY1; /**< \brief (Smc Offset: 0x84) SMC OCMS KEY1 Register */ - WoReg SMC_KEY2; /**< \brief (Smc Offset: 0x88) SMC OCMS KEY2 Register */ - RwReg Reserved2[22]; - RwReg SMC_WPMR; /**< \brief (Smc Offset: 0xE4) SMC Write Protect Mode Register */ - RoReg SMC_WPSR; /**< \brief (Smc Offset: 0xE8) SMC Write Protect Status Register */ -} Smc; -#endif /* __ASSEMBLY__ */ -/* -------- SMC_SETUP0 : (SMC Offset: 0x0) SMC Setup Register (CS_number = 0) -------- */ -#define SMC_SETUP0_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP0) NWE Setup Length */ -#define SMC_SETUP0_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP0) NCS Setup Length in WRITE Access */ -#define SMC_SETUP0_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP0) NRD Setup Length */ -#define SMC_SETUP0_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP0) NCS Setup Length in READ Access */ -/* -------- SMC_PULSE0 : (SMC Offset: 0x4) SMC Pulse Register (CS_number = 0) -------- */ -#define SMC_PULSE0_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE0) NWE Pulse Length */ -#define SMC_PULSE0_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE0) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE0_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE0) NRD Pulse Length */ -#define SMC_PULSE0_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE0) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE0 : (SMC Offset: 0x8) SMC Cycle Register (CS_number = 0) -------- */ -#define SMC_CYCLE0_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE0) Total Write Cycle Length */ -#define SMC_CYCLE0_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE0) Total Read Cycle Length */ -/* -------- SMC_MODE0 : (SMC Offset: 0xC) SMC Mode Register (CS_number = 0) -------- */ -#define SMC_MODE0_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE0) */ -#define SMC_MODE0_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE0) */ -#define SMC_MODE0_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE0) NWAIT Mode */ -#define SMC_MODE0_DBW (0x3 << 12) /**< \brief (SMC_MODE0) Data Bus Width */ -#define SMC_MODE0_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE0) Data Float Time */ -#define SMC_MODE0_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE0) TDF Optimization */ -#define SMC_MODE0_PMEN (0x1 << 24) /**< \brief (SMC_MODE0) Page Mode Enabled */ -#define SMC_MODE0_PS (0x3 << 28) /**< \brief (SMC_MODE0) Page Size */ -/* -------- SMC_SETUP1 : (SMC Offset: 0x10) SMC Setup Register (CS_number = 1) -------- */ -#define SMC_SETUP1_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP1) NWE Setup Length */ -#define SMC_SETUP1_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP1) NCS Setup Length in WRITE Access */ -#define SMC_SETUP1_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP1) NRD Setup Length */ -#define SMC_SETUP1_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP1) NCS Setup Length in READ Access */ -/* -------- SMC_PULSE1 : (SMC Offset: 0x14) SMC Pulse Register (CS_number = 1) -------- */ -#define SMC_PULSE1_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE1) NWE Pulse Length */ -#define SMC_PULSE1_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE1) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE1_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE1) NRD Pulse Length */ -#define SMC_PULSE1_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE1) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE1 : (SMC Offset: 0x18) SMC Cycle Register (CS_number = 1) -------- */ -#define SMC_CYCLE1_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE1) Total Write Cycle Length */ -#define SMC_CYCLE1_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE1) Total Read Cycle Length */ -/* -------- SMC_MODE1 : (SMC Offset: 0x1C) SMC Mode Register (CS_number = 1) -------- */ -#define SMC_MODE1_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE1) */ -#define SMC_MODE1_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE1) */ -#define SMC_MODE1_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE1) NWAIT Mode */ -#define SMC_MODE1_DBW (0x3 << 12) /**< \brief (SMC_MODE1) Data Bus Width */ -#define SMC_MODE1_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE1) Data Float Time */ -#define SMC_MODE1_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE1) TDF Optimization */ -#define SMC_MODE1_PMEN (0x1 << 24) /**< \brief (SMC_MODE1) Page Mode Enabled */ -#define SMC_MODE1_PS (0x3 << 28) /**< \brief (SMC_MODE1) Page Size */ -/* -------- SMC_SETUP2 : (SMC Offset: 0x20) SMC Setup Register (CS_number = 2) -------- */ -#define SMC_SETUP2_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP2) NWE Setup Length */ -#define SMC_SETUP2_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP2) NCS Setup Length in WRITE Access */ -#define SMC_SETUP2_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP2) NRD Setup Length */ -#define SMC_SETUP2_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP2) NCS Setup Length in READ Access */ -/* -------- SMC_PULSE2 : (SMC Offset: 0x24) SMC Pulse Register (CS_number = 2) -------- */ -#define SMC_PULSE2_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE2) NWE Pulse Length */ -#define SMC_PULSE2_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE2) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE2_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE2) NRD Pulse Length */ -#define SMC_PULSE2_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE2) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE2 : (SMC Offset: 0x28) SMC Cycle Register (CS_number = 2) -------- */ -#define SMC_CYCLE2_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE2) Total Write Cycle Length */ -#define SMC_CYCLE2_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE2) Total Read Cycle Length */ -/* -------- SMC_MODE2 : (SMC Offset: 0x2C) SMC Mode Register (CS_number = 2) -------- */ -#define SMC_MODE2_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE2) */ -#define SMC_MODE2_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE2) */ -#define SMC_MODE2_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE2) NWAIT Mode */ -#define SMC_MODE2_DBW (0x3 << 12) /**< \brief (SMC_MODE2) Data Bus Width */ -#define SMC_MODE2_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE2) Data Float Time */ -#define SMC_MODE2_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE2) TDF Optimization */ -#define SMC_MODE2_PMEN (0x1 << 24) /**< \brief (SMC_MODE2) Page Mode Enabled */ -#define SMC_MODE2_PS (0x3 << 28) /**< \brief (SMC_MODE2) Page Size */ -/* -------- SMC_SETUP3 : (SMC Offset: 0x30) SMC Setup Register (CS_number = 3) -------- */ -#define SMC_SETUP3_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP3) NWE Setup Length */ -#define SMC_SETUP3_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP3) NCS Setup Length in WRITE Access */ -#define SMC_SETUP3_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP3) NRD Setup Length */ -#define SMC_SETUP3_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP3) NCS Setup Length in READ Access */ -/* -------- SMC_PULSE3 : (SMC Offset: 0x34) SMC Pulse Register (CS_number = 3) -------- */ -#define SMC_PULSE3_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE3) NWE Pulse Length */ -#define SMC_PULSE3_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE3) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE3_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE3) NRD Pulse Length */ -#define SMC_PULSE3_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE3) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE3 : (SMC Offset: 0x38) SMC Cycle Register (CS_number = 3) -------- */ -#define SMC_CYCLE3_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE3) Total Write Cycle Length */ -#define SMC_CYCLE3_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE3) Total Read Cycle Length */ -/* -------- SMC_MODE3 : (SMC Offset: 0x3C) SMC Mode Register (CS_number = 3) -------- */ -#define SMC_MODE3_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE3) */ -#define SMC_MODE3_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE3) */ -#define SMC_MODE3_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE3) NWAIT Mode */ -#define SMC_MODE3_DBW (0x3 << 12) /**< \brief (SMC_MODE3) Data Bus Width */ -#define SMC_MODE3_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE3) Data Float Time */ -#define SMC_MODE3_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE3) TDF Optimization */ -#define SMC_MODE3_PMEN (0x1 << 24) /**< \brief (SMC_MODE3) Page Mode Enabled */ -#define SMC_MODE3_PS (0x3 << 28) /**< \brief (SMC_MODE3) Page Size */ -/* -------- SMC_SETUP4 : (SMC Offset: 0x40) SMC Setup Register (CS_number = 4) -------- */ -#define SMC_SETUP4_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP4) NWE Setup Length */ -#define SMC_SETUP4_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP4) NCS Setup Length in WRITE Access */ -#define SMC_SETUP4_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP4) NRD Setup Length */ -#define SMC_SETUP4_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP4) NCS Setup Length in READ Access */ -/* -------- SMC_PULSE4 : (SMC Offset: 0x44) SMC Pulse Register (CS_number = 4) -------- */ -#define SMC_PULSE4_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE4) NWE Pulse Length */ -#define SMC_PULSE4_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE4) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE4_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE4) NRD Pulse Length */ -#define SMC_PULSE4_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE4) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE4 : (SMC Offset: 0x48) SMC Cycle Register (CS_number = 4) -------- */ -#define SMC_CYCLE4_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE4) Total Write Cycle Length */ -#define SMC_CYCLE4_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE4) Total Read Cycle Length */ -/* -------- SMC_MODE4 : (SMC Offset: 0x4C) SMC Mode Register (CS_number = 4) -------- */ -#define SMC_MODE4_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE4) */ -#define SMC_MODE4_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE4) */ -#define SMC_MODE4_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE4) NWAIT Mode */ -#define SMC_MODE4_DBW (0x3 << 12) /**< \brief (SMC_MODE4) Data Bus Width */ -#define SMC_MODE4_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE4) Data Float Time */ -#define SMC_MODE4_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE4) TDF Optimization */ -#define SMC_MODE4_PMEN (0x1 << 24) /**< \brief (SMC_MODE4) Page Mode Enabled */ -#define SMC_MODE4_PS (0x3 << 28) /**< \brief (SMC_MODE4) Page Size */ -/* -------- SMC_OCMS : (SMC Offset: 0x80) SMC OCMS MODE Register -------- */ -#define SMC_OCMS_SMSE (0x1 << 0) /**< \brief (SMC_OCMS) Static Memory Controller Scrambling Enable */ -#define SMC_OCMS_CS0SE (0x1 << 16) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ -#define SMC_OCMS_CS1SE (0x1 << 17) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ -#define SMC_OCMS_CS2SE (0x1 << 18) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ -#define SMC_OCMS_CS3SE (0x1 << 19) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ -/* -------- SMC_KEY1 : (SMC Offset: 0x84) SMC OCMS KEY1 Register -------- */ -#define SMC_KEY1_KEY1 (0xffffffff << 0) /**< \brief (SMC_KEY1) Off Chip Memory Scrambling (OCMS) Key Part 1 */ -/* -------- SMC_KEY2 : (SMC Offset: 0x88) SMC OCMS KEY2 Register -------- */ -#define SMC_KEY2_KEY2 (0xffffffff << 0) /**< \brief (SMC_KEY2) Off Chip Memory Scrambling (OCMS) Key Part 2 */ -/* -------- SMC_WPMR : (SMC Offset: 0xE4) SMC Write Protect Mode Register -------- */ -#define SMC_WPMR_WPEN (0x1 << 0) /**< \brief (SMC_WPMR) Write Protect Enable */ -#define SMC_WPMR_WPKEY (0xffffff << 8) /**< \brief (SMC_WPMR) Write Protect KEY */ -/* -------- SMC_WPSR : (SMC Offset: 0xE8) SMC Write Protect Status Register -------- */ -#define SMC_WPSR_WPVS (0x1 << 0) /**< \brief (SMC_WPSR) Write Protect Enable */ -#define SMC_WPSR_WPVSRC (0xffff << 8) /**< \brief (SMC_WPSR) Write Protect Violation Source */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Serial Peripheral Interface */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_SPI Serial Peripheral Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Spi hardware registers */ -typedef struct { - WoReg SPI_CR; /**< \brief (Spi Offset: 0x00) Control Register */ - RwReg SPI_MR; /**< \brief (Spi Offset: 0x04) Mode Register */ - RoReg SPI_RDR; /**< \brief (Spi Offset: 0x08) Receive Data Register */ - WoReg SPI_TDR; /**< \brief (Spi Offset: 0x0C) Transmit Data Register */ - RoReg SPI_SR; /**< \brief (Spi Offset: 0x10) Status Register */ - WoReg SPI_IER; /**< \brief (Spi Offset: 0x14) Interrupt Enable Register */ - WoReg SPI_IDR; /**< \brief (Spi Offset: 0x18) Interrupt Disable Register */ - RoReg SPI_IMR; /**< \brief (Spi Offset: 0x1C) Interrupt Mask Register */ - RwReg Reserved1[4]; - RwReg SPI_CSR[4]; /**< \brief (Spi Offset: 0x30) Chip Select Register */ - RwReg Reserved2[41]; - RwReg SPI_WPMR; /**< \brief (Spi Offset: 0xE4) Write Protection Control Register */ - RoReg SPI_WPSR; /**< \brief (Spi Offset: 0xE8) Write Protection Status Register */ - RwReg Reserved3[5]; - RwReg SPI_RPR; /**< \brief (Spi Offset: 0x100) Receive Pointer Register */ - RwReg SPI_RCR; /**< \brief (Spi Offset: 0x104) Receive Counter Register */ - RwReg SPI_TPR; /**< \brief (Spi Offset: 0x108) Transmit Pointer Register */ - RwReg SPI_TCR; /**< \brief (Spi Offset: 0x10C) Transmit Counter Register */ - RwReg SPI_RNPR; /**< \brief (Spi Offset: 0x110) Receive Next Pointer Register */ - RwReg SPI_RNCR; /**< \brief (Spi Offset: 0x114) Receive Next Counter Register */ - RwReg SPI_TNPR; /**< \brief (Spi Offset: 0x118) Transmit Next Pointer Register */ - RwReg SPI_TNCR; /**< \brief (Spi Offset: 0x11C) Transmit Next Counter Register */ - WoReg SPI_PTCR; /**< \brief (Spi Offset: 0x120) Transfer Control Register */ - RoReg SPI_PTSR; /**< \brief (Spi Offset: 0x124) Transfer Status Register */ -} Spi; -#endif /* __ASSEMBLY__ */ -/* -------- SPI_CR : (SPI Offset: 0x00) Control Register -------- */ -#define SPI_CR_SPIEN (0x1 << 0) /**< \brief (SPI_CR) SPI Enable */ -#define SPI_CR_SPIDIS (0x1 << 1) /**< \brief (SPI_CR) SPI Disable */ -#define SPI_CR_SWRST (0x1 << 7) /**< \brief (SPI_CR) SPI Software Reset */ -#define SPI_CR_LASTXFER (0x1 << 24) /**< \brief (SPI_CR) Last Transfer */ -/* -------- SPI_MR : (SPI Offset: 0x04) Mode Register -------- */ -#define SPI_MR_MSTR (0x1 << 0) /**< \brief (SPI_MR) Master/Slave Mode */ -#define SPI_MR_PS (0x1 << 1) /**< \brief (SPI_MR) Peripheral Select */ -#define SPI_MR_PS_FIXED (0x0 << 1) /**< \brief (SPI_MR) Fixed Peripheral Select. */ -#define SPI_MR_PS_VARIABLE (0x1 << 1) /**< \brief (SPI_MR) Variable Peripheral Select. */ -#define SPI_MR_PCSDEC (0x1 << 2) /**< \brief (SPI_MR) Chip Select Decode */ -#define SPI_MR_MODFDIS (0x1 << 4) /**< \brief (SPI_MR) Mode Fault Detection */ -#define SPI_MR_WDRBT (0x1 << 5) /**< \brief (SPI_MR) Wait Data Read Before Transfer */ -#define SPI_MR_LLB (0x1 << 7) /**< \brief (SPI_MR) Local Loopback Enable */ -#define SPI_MR_PCS (0xf << 16) /**< \brief (SPI_MR) Peripheral Chip Select */ -#define SPI_MR_DLYBCS (0xff << 24) /**< \brief (SPI_MR) Delay Between Chip Selects */ -/* -------- SPI_RDR : (SPI Offset: 0x08) Receive Data Register -------- */ -#define SPI_RDR_RD (0xffff << 0) /**< \brief (SPI_RDR) Receive Data */ -#define SPI_RDR_PCS (0xf << 16) /**< \brief (SPI_RDR) Peripheral Chip Select */ -/* -------- SPI_TDR : (SPI Offset: 0x0C) Transmit Data Register -------- */ -#define SPI_TDR_TD (0xffff << 0) /**< \brief (SPI_TDR) Transmit Data */ -#define SPI_TDR_PCS (0xf << 16) /**< \brief (SPI_TDR) Peripheral Chip Select */ -#define SPI_TDR_LASTXFER (0x1 << 24) /**< \brief (SPI_TDR) Last Transfer */ -/* -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- */ -#define SPI_SR_RDRF (0x1 << 0) /**< \brief (SPI_SR) Receive Data Register Full */ -#define SPI_SR_TDRE (0x1 << 1) /**< \brief (SPI_SR) Transmit Data Register Empty */ -#define SPI_SR_MODF (0x1 << 2) /**< \brief (SPI_SR) Mode Fault Error */ -#define SPI_SR_OVRES (0x1 << 3) /**< \brief (SPI_SR) Overrun Error Status */ -#define SPI_SR_ENDRX (0x1 << 4) /**< \brief (SPI_SR) End of RX buffer */ -#define SPI_SR_ENDTX (0x1 << 5) /**< \brief (SPI_SR) End of TX buffer */ -#define SPI_SR_RXBUFF (0x1 << 6) /**< \brief (SPI_SR) RX Buffer Full */ -#define SPI_SR_TXBUFE (0x1 << 7) /**< \brief (SPI_SR) TX Buffer Empty */ -#define SPI_SR_NSSR (0x1 << 8) /**< \brief (SPI_SR) NSS Rising */ -#define SPI_SR_TXEMPTY (0x1 << 9) /**< \brief (SPI_SR) Transmission Registers Empty */ -#define SPI_SR_UNDES (0x1 << 10) /**< \brief (SPI_SR) Underrun Error Status (Slave Mode Only) */ -#define SPI_SR_SPIENS (0x1 << 16) /**< \brief (SPI_SR) SPI Enable Status */ -/* -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- */ -#define SPI_IER_RDRF (0x1 << 0) /**< \brief (SPI_IER) Receive Data Register Full Interrupt Enable */ -#define SPI_IER_TDRE (0x1 << 1) /**< \brief (SPI_IER) SPI Transmit Data Register Empty Interrupt Enable */ -#define SPI_IER_MODF (0x1 << 2) /**< \brief (SPI_IER) Mode Fault Error Interrupt Enable */ -#define SPI_IER_OVRES (0x1 << 3) /**< \brief (SPI_IER) Overrun Error Interrupt Enable */ -#define SPI_IER_ENDRX (0x1 << 4) /**< \brief (SPI_IER) End of Receive Buffer Interrupt Enable */ -#define SPI_IER_ENDTX (0x1 << 5) /**< \brief (SPI_IER) End of Transmit Buffer Interrupt Enable */ -#define SPI_IER_RXBUFF (0x1 << 6) /**< \brief (SPI_IER) Receive Buffer Full Interrupt Enable */ -#define SPI_IER_TXBUFE (0x1 << 7) /**< \brief (SPI_IER) Transmit Buffer Empty Interrupt Enable */ -#define SPI_IER_NSSR (0x1 << 8) /**< \brief (SPI_IER) NSS Rising Interrupt Enable */ -#define SPI_IER_TXEMPTY (0x1 << 9) /**< \brief (SPI_IER) Transmission Registers Empty Enable */ -#define SPI_IER_UNDES (0x1 << 10) /**< \brief (SPI_IER) Underrun Error Interrupt Enable */ -/* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- */ -#define SPI_IDR_RDRF (0x1 << 0) /**< \brief (SPI_IDR) Receive Data Register Full Interrupt Disable */ -#define SPI_IDR_TDRE (0x1 << 1) /**< \brief (SPI_IDR) SPI Transmit Data Register Empty Interrupt Disable */ -#define SPI_IDR_MODF (0x1 << 2) /**< \brief (SPI_IDR) Mode Fault Error Interrupt Disable */ -#define SPI_IDR_OVRES (0x1 << 3) /**< \brief (SPI_IDR) Overrun Error Interrupt Disable */ -#define SPI_IDR_ENDRX (0x1 << 4) /**< \brief (SPI_IDR) End of Receive Buffer Interrupt Disable */ -#define SPI_IDR_ENDTX (0x1 << 5) /**< \brief (SPI_IDR) End of Transmit Buffer Interrupt Disable */ -#define SPI_IDR_RXBUFF (0x1 << 6) /**< \brief (SPI_IDR) Receive Buffer Full Interrupt Disable */ -#define SPI_IDR_TXBUFE (0x1 << 7) /**< \brief (SPI_IDR) Transmit Buffer Empty Interrupt Disable */ -#define SPI_IDR_NSSR (0x1 << 8) /**< \brief (SPI_IDR) NSS Rising Interrupt Disable */ -#define SPI_IDR_TXEMPTY (0x1 << 9) /**< \brief (SPI_IDR) Transmission Registers Empty Disable */ -#define SPI_IDR_UNDES (0x1 << 10) /**< \brief (SPI_IDR) Underrun Error Interrupt Disable */ -/* -------- SPI_IMR : (SPI Offset: 0x1C) Interrupt Mask Register -------- */ -#define SPI_IMR_RDRF (0x1 << 0) /**< \brief (SPI_IMR) Receive Data Register Full Interrupt Mask */ -#define SPI_IMR_TDRE (0x1 << 1) /**< \brief (SPI_IMR) SPI Transmit Data Register Empty Interrupt Mask */ -#define SPI_IMR_MODF (0x1 << 2) /**< \brief (SPI_IMR) Mode Fault Error Interrupt Mask */ -#define SPI_IMR_OVRES (0x1 << 3) /**< \brief (SPI_IMR) Overrun Error Interrupt Mask */ -#define SPI_IMR_ENDRX (0x1 << 4) /**< \brief (SPI_IMR) End of Receive Buffer Interrupt Mask */ -#define SPI_IMR_ENDTX (0x1 << 5) /**< \brief (SPI_IMR) End of Transmit Buffer Interrupt Mask */ -#define SPI_IMR_RXBUFF (0x1 << 6) /**< \brief (SPI_IMR) Receive Buffer Full Interrupt Mask */ -#define SPI_IMR_TXBUFE (0x1 << 7) /**< \brief (SPI_IMR) Transmit Buffer Empty Interrupt Mask */ -#define SPI_IMR_NSSR (0x1 << 8) /**< \brief (SPI_IMR) NSS Rising Interrupt Mask */ -#define SPI_IMR_TXEMPTY (0x1 << 9) /**< \brief (SPI_IMR) Transmission Registers Empty Mask */ -#define SPI_IMR_UNDES (0x1 << 10) /**< \brief (SPI_IMR) Underrun Error Interrupt Mask */ -/* -------- SPI_CSR[4] : (SPI Offset: 0x30) Chip Select Register -------- */ -#define SPI_CSR_CPOL (0x1 << 0) /**< \brief (SPI_CSR[4]) Clock Polarity */ -#define SPI_CSR_NCPHA (0x1 << 1) /**< \brief (SPI_CSR[4]) Clock Phase */ -#define SPI_CSR_CSNAAT (0x1 << 2) /**< \brief (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ -#define SPI_CSR_CSAAT (0x1 << 3) /**< \brief (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ -#define SPI_CSR_BITS (0xf << 4) /**< \brief (SPI_CSR[4]) Bits Per Transfer (See the (Note:) below the register table; Section 9.9 "SPI Chip Select Register" on page 35.) */ -#define SPI_CSR_BITS_8 (0x0 << 4) /**< \brief (SPI_CSR[4]) 8 */ -#define SPI_CSR_BITS_9 (0x1 << 4) /**< \brief (SPI_CSR[4]) 9 */ -#define SPI_CSR_BITS_10 (0x2 << 4) /**< \brief (SPI_CSR[4]) 10 */ -#define SPI_CSR_BITS_11 (0x3 << 4) /**< \brief (SPI_CSR[4]) 11 */ -#define SPI_CSR_BITS_12 (0x4 << 4) /**< \brief (SPI_CSR[4]) 12 */ -#define SPI_CSR_BITS_13 (0x5 << 4) /**< \brief (SPI_CSR[4]) 13 */ -#define SPI_CSR_BITS_14 (0x6 << 4) /**< \brief (SPI_CSR[4]) 14 */ -#define SPI_CSR_BITS_15 (0x7 << 4) /**< \brief (SPI_CSR[4]) 15 */ -#define SPI_CSR_BITS_16 (0x8 << 4) /**< \brief (SPI_CSR[4]) 16 */ -#define SPI_CSR_SCBR (0xff << 8) /**< \brief (SPI_CSR[4]) Serial Clock Baud Rate */ -#define SPI_CSR_DLYBS (0xff << 16) /**< \brief (SPI_CSR[4]) Delay Before SPCK */ -#define SPI_CSR_DLYBCT (0xff << 24) /**< \brief (SPI_CSR[4]) Delay Between Consecutive Transfers */ -/* -------- SPI_WPMR : (SPI Offset: 0xE4) Write Protection Control Register -------- */ -#define SPI_WPMR_SPIWPEN (0x1 << 0) /**< \brief (SPI_WPMR) SPI Write Protection Enable */ -#define SPI_WPMR_SPIWPKEY (0xffffff << 8) /**< \brief (SPI_WPMR) SPI Write Protection Key Password */ -/* -------- SPI_WPSR : (SPI Offset: 0xE8) Write Protection Status Register -------- */ -#define SPI_WPSR_SPIWPVS (0x7 << 0) /**< \brief (SPI_WPSR) SPI Write Protection Violation Status */ -#define SPI_WPSR_SPIWPVSRC (0xff << 8) /**< \brief (SPI_WPSR) SPI Write Protection Violation Source */ -/* -------- SPI_RPR : (SPI Offset: 0x100) Receive Pointer Register -------- */ -#define SPI_RPR_RXPTR (0xffffffff << 0) /**< \brief (SPI_RPR) Receive Pointer Register */ -/* -------- SPI_RCR : (SPI Offset: 0x104) Receive Counter Register -------- */ -#define SPI_RCR_RXCTR (0xffff << 0) /**< \brief (SPI_RCR) Receive Counter Register */ -/* -------- SPI_TPR : (SPI Offset: 0x108) Transmit Pointer Register -------- */ -#define SPI_TPR_TXPTR (0xffffffff << 0) /**< \brief (SPI_TPR) Transmit Counter Register */ -/* -------- SPI_TCR : (SPI Offset: 0x10C) Transmit Counter Register -------- */ -#define SPI_TCR_TXCTR (0xffff << 0) /**< \brief (SPI_TCR) Transmit Counter Register */ -/* -------- SPI_RNPR : (SPI Offset: 0x110) Receive Next Pointer Register -------- */ -#define SPI_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (SPI_RNPR) Receive Next Pointer */ -/* -------- SPI_RNCR : (SPI Offset: 0x114) Receive Next Counter Register -------- */ -#define SPI_RNCR_RXNCTR (0xffff << 0) /**< \brief (SPI_RNCR) Receive Next Counter */ -/* -------- SPI_TNPR : (SPI Offset: 0x118) Transmit Next Pointer Register -------- */ -#define SPI_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (SPI_TNPR) Transmit Next Pointer */ -/* -------- SPI_TNCR : (SPI Offset: 0x11C) Transmit Next Counter Register -------- */ -#define SPI_TNCR_TXNCTR (0xffff << 0) /**< \brief (SPI_TNCR) Transmit Counter Next */ -/* -------- SPI_PTCR : (SPI Offset: 0x120) Transfer Control Register -------- */ -#define SPI_PTCR_RXTEN (0x1 << 0) /**< \brief (SPI_PTCR) Receiver Transfer Enable */ -#define SPI_PTCR_RXTDIS (0x1 << 1) /**< \brief (SPI_PTCR) Receiver Transfer Disable */ -#define SPI_PTCR_TXTEN (0x1 << 8) /**< \brief (SPI_PTCR) Transmitter Transfer Enable */ -#define SPI_PTCR_TXTDIS (0x1 << 9) /**< \brief (SPI_PTCR) Transmitter Transfer Disable */ -/* -------- SPI_PTSR : (SPI Offset: 0x124) Transfer Status Register -------- */ -#define SPI_PTSR_RXTEN (0x1 << 0) /**< \brief (SPI_PTSR) Receiver Transfer Enable */ -#define SPI_PTSR_TXTEN (0x1 << 8) /**< \brief (SPI_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Synchronous Serial Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_SSC Synchronous Serial Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Ssc hardware registers */ -typedef struct { - WoReg SSC_CR; /**< \brief (Ssc Offset: 0x0) Control Register */ - RwReg SSC_CMR; /**< \brief (Ssc Offset: 0x4) Clock Mode Register */ - RwReg Reserved1[2]; - RwReg SSC_RCMR; /**< \brief (Ssc Offset: 0x10) Receive Clock Mode Register */ - RwReg SSC_RFMR; /**< \brief (Ssc Offset: 0x14) Receive Frame Mode Register */ - RwReg SSC_TCMR; /**< \brief (Ssc Offset: 0x18) Transmit Clock Mode Register */ - RwReg SSC_TFMR; /**< \brief (Ssc Offset: 0x1C) Transmit Frame Mode Register */ - RoReg SSC_RHR; /**< \brief (Ssc Offset: 0x20) Receive Holding Register */ - WoReg SSC_THR; /**< \brief (Ssc Offset: 0x24) Transmit Holding Register */ - RwReg Reserved2[2]; - RoReg SSC_RSHR; /**< \brief (Ssc Offset: 0x30) Receive Sync. Holding Register */ - RwReg SSC_TSHR; /**< \brief (Ssc Offset: 0x34) Transmit Sync. Holding Register */ - RwReg SSC_RC0R; /**< \brief (Ssc Offset: 0x38) Receive Compare 0 Register */ - RwReg SSC_RC1R; /**< \brief (Ssc Offset: 0x3C) Receive Compare 1 Register */ - RoReg SSC_SR; /**< \brief (Ssc Offset: 0x40) Status Register */ - WoReg SSC_IER; /**< \brief (Ssc Offset: 0x44) Interrupt Enable Register */ - WoReg SSC_IDR; /**< \brief (Ssc Offset: 0x48) Interrupt Disable Register */ - RoReg SSC_IMR; /**< \brief (Ssc Offset: 0x4C) Interrupt Mask Register */ - RwReg Reserved3[37]; - RwReg SSC_WPMR; /**< \brief (Ssc Offset: 0xE4) Write Protect Mode Register */ - RoReg SSC_WPSR; /**< \brief (Ssc Offset: 0xE8) Write Protect Status Register */ - RwReg Reserved4[5]; - RwReg SSC_RPR; /**< \brief (Ssc Offset: 0x100) Receive Pointer Register */ - RwReg SSC_RCR; /**< \brief (Ssc Offset: 0x104) Receive Counter Register */ - RwReg SSC_TPR; /**< \brief (Ssc Offset: 0x108) Transmit Pointer Register */ - RwReg SSC_TCR; /**< \brief (Ssc Offset: 0x10C) Transmit Counter Register */ - RwReg SSC_RNPR; /**< \brief (Ssc Offset: 0x110) Receive Next Pointer Register */ - RwReg SSC_RNCR; /**< \brief (Ssc Offset: 0x114) Receive Next Counter Register */ - RwReg SSC_TNPR; /**< \brief (Ssc Offset: 0x118) Transmit Next Pointer Register */ - RwReg SSC_TNCR; /**< \brief (Ssc Offset: 0x11C) Transmit Next Counter Register */ - WoReg SSC_PTCR; /**< \brief (Ssc Offset: 0x120) Transfer Control Register */ - RoReg SSC_PTSR; /**< \brief (Ssc Offset: 0x124) Transfer Status Register */ -} Ssc; -#endif /* __ASSEMBLY__ */ -/* -------- SSC_CR : (SSC Offset: 0x0) Control Register -------- */ -#define SSC_CR_RXEN (0x1 << 0) /**< \brief (SSC_CR) Receive Enable */ -#define SSC_CR_RXDIS (0x1 << 1) /**< \brief (SSC_CR) Receive Disable */ -#define SSC_CR_TXEN (0x1 << 8) /**< \brief (SSC_CR) Transmit Enable */ -#define SSC_CR_TXDIS (0x1 << 9) /**< \brief (SSC_CR) Transmit Disable */ -#define SSC_CR_SWRST (0x1 << 15) /**< \brief (SSC_CR) Software Reset */ -/* -------- SSC_CMR : (SSC Offset: 0x4) Clock Mode Register -------- */ -#define SSC_CMR_DIV (0xfff << 0) /**< \brief (SSC_CMR) Clock Divider */ -/* -------- SSC_RCMR : (SSC Offset: 0x10) Receive Clock Mode Register -------- */ -#define SSC_RCMR_CKS (0x3 << 0) /**< \brief (SSC_RCMR) Receive Clock Selection */ -#define SSC_RCMR_CKS_DIV (0x0 << 0) /**< \brief (SSC_RCMR) Divided Clock */ -#define SSC_RCMR_CKS_TK (0x1 << 0) /**< \brief (SSC_RCMR) TK Clock signal */ -#define SSC_RCMR_CKS_RK (0x2 << 0) /**< \brief (SSC_RCMR) RK pin */ -#define SSC_RCMR_CKO (0x7 << 2) /**< \brief (SSC_RCMR) Receive Clock Output Mode Selection */ -#define SSC_RCMR_CKI (0x1 << 5) /**< \brief (SSC_RCMR) Receive Clock Inversion */ -#define SSC_RCMR_CKG (0x3 << 6) /**< \brief (SSC_RCMR) Receive Clock Gating Selection */ -#define SSC_RCMR_CKG_NONE (0x0 << 6) /**< \brief (SSC_RCMR) None, continuous clock */ -#define SSC_RCMR_CKG_LOW (0x1 << 6) /**< \brief (SSC_RCMR) Receive Clock enabled only if RF Low */ -#define SSC_RCMR_CKG_HIGH (0x2 << 6) /**< \brief (SSC_RCMR) Receive Clock enabled only if RF High */ -#define SSC_RCMR_START (0xf << 8) /**< \brief (SSC_RCMR) Receive Start Selection */ -#define SSC_RCMR_STOP (0x1 << 12) /**< \brief (SSC_RCMR) Receive Stop Selection */ -#define SSC_RCMR_STTDLY (0xff << 16) /**< \brief (SSC_RCMR) Receive Start Delay */ -#define SSC_RCMR_PERIOD (0xff << 24) /**< \brief (SSC_RCMR) Receive Period Divider Selection */ -/* -------- SSC_RFMR : (SSC Offset: 0x14) Receive Frame Mode Register -------- */ -#define SSC_RFMR_DATLEN (0x1f << 0) /**< \brief (SSC_RFMR) Data Length */ -#define SSC_RFMR_LOOP (0x1 << 5) /**< \brief (SSC_RFMR) Loop Mode */ -#define SSC_RFMR_MSBF (0x1 << 7) /**< \brief (SSC_RFMR) Most Significant Bit First */ -#define SSC_RFMR_DATNB (0xf << 8) /**< \brief (SSC_RFMR) Data Number per Frame */ -#define SSC_RFMR_FSLEN (0xf << 16) /**< \brief (SSC_RFMR) Receive Frame Sync Length */ -#define SSC_RFMR_FSOS (0x7 << 20) /**< \brief (SSC_RFMR) Receive Frame Sync Output Selection */ -#define SSC_RFMR_FSEDGE (0x1 << 24) /**< \brief (SSC_RFMR) Frame Sync Edge Detection */ -#define SSC_RFMR_FSLEN_EXT (0xf << 28) /**< \brief (SSC_RFMR) FSLEN Field Extension */ -/* -------- SSC_TCMR : (SSC Offset: 0x18) Transmit Clock Mode Register -------- */ -#define SSC_TCMR_CKS (0x3 << 0) /**< \brief (SSC_TCMR) Transmit Clock Selection */ -#define SSC_TCMR_CKO (0x7 << 2) /**< \brief (SSC_TCMR) Transmit Clock Output Mode Selection */ -#define SSC_TCMR_CKI (0x1 << 5) /**< \brief (SSC_TCMR) Transmit Clock Inversion */ -#define SSC_TCMR_CKG (0x3 << 6) /**< \brief (SSC_TCMR) Transmit Clock Gating Selection */ -#define SSC_TCMR_START (0xf << 8) /**< \brief (SSC_TCMR) Transmit Start Selection */ -#define SSC_TCMR_STTDLY (0xff << 16) /**< \brief (SSC_TCMR) Transmit Start Delay */ -#define SSC_TCMR_PERIOD (0xff << 24) /**< \brief (SSC_TCMR) Transmit Period Divider Selection */ -/* -------- SSC_TFMR : (SSC Offset: 0x1C) Transmit Frame Mode Register -------- */ -#define SSC_TFMR_DATLEN (0x1f << 0) /**< \brief (SSC_TFMR) Data Length */ -#define SSC_TFMR_DATDEF (0x1 << 5) /**< \brief (SSC_TFMR) Data Default Value */ -#define SSC_TFMR_MSBF (0x1 << 7) /**< \brief (SSC_TFMR) Most Significant Bit First */ -#define SSC_TFMR_DATNB (0xf << 8) /**< \brief (SSC_TFMR) Data Number per frame */ -#define SSC_TFMR_FSLEN (0xf << 16) /**< \brief (SSC_TFMR) Transmit Frame Syn Length */ -#define SSC_TFMR_FSOS (0x7 << 20) /**< \brief (SSC_TFMR) Transmit Frame Sync Output Selection */ -#define SSC_TFMR_FSDEN (0x1 << 23) /**< \brief (SSC_TFMR) Frame Sync Data Enable */ -#define SSC_TFMR_FSEDGE (0x1 << 24) /**< \brief (SSC_TFMR) Frame Sync Edge Detection */ -#define SSC_TFMR_FSLEN_EXT (0xf << 28) /**< \brief (SSC_TFMR) FSLEN Field Extension */ -/* -------- SSC_RHR : (SSC Offset: 0x20) Receive Holding Register -------- */ -#define SSC_RHR_RDAT (0xffffffff << 0) /**< \brief (SSC_RHR) Receive Data */ -/* -------- SSC_THR : (SSC Offset: 0x24) Transmit Holding Register -------- */ -#define SSC_THR_TDAT (0xffffffff << 0) /**< \brief (SSC_THR) Transmit Data */ -/* -------- SSC_RSHR : (SSC Offset: 0x30) Receive Sync. Holding Register -------- */ -#define SSC_RSHR_RSDAT (0xffff << 0) /**< \brief (SSC_RSHR) Receive Synchronization Data */ -/* -------- SSC_TSHR : (SSC Offset: 0x34) Transmit Sync. Holding Register -------- */ -#define SSC_TSHR_TSDAT (0xffff << 0) /**< \brief (SSC_TSHR) Transmit Synchronization Data */ -/* -------- SSC_RC0R : (SSC Offset: 0x38) Receive Compare 0 Register -------- */ -#define SSC_RC0R_CP0 (0xffff << 0) /**< \brief (SSC_RC0R) Receive Compare Data 0 */ -/* -------- SSC_RC1R : (SSC Offset: 0x3C) Receive Compare 1 Register -------- */ -#define SSC_RC1R_CP1 (0xffff << 0) /**< \brief (SSC_RC1R) Receive Compare Data 1 */ -/* -------- SSC_SR : (SSC Offset: 0x40) Status Register -------- */ -#define SSC_SR_TXRDY (0x1 << 0) /**< \brief (SSC_SR) Transmit Ready */ -#define SSC_SR_TXEMPTY (0x1 << 1) /**< \brief (SSC_SR) Transmit Empty */ -#define SSC_SR_ENDTX (0x1 << 2) /**< \brief (SSC_SR) End of Transmission */ -#define SSC_SR_TXBUFE (0x1 << 3) /**< \brief (SSC_SR) Transmit Buffer Empty */ -#define SSC_SR_RXRDY (0x1 << 4) /**< \brief (SSC_SR) Receive Ready */ -#define SSC_SR_OVRUN (0x1 << 5) /**< \brief (SSC_SR) Receive Overrun */ -#define SSC_SR_ENDRX (0x1 << 6) /**< \brief (SSC_SR) End of Reception */ -#define SSC_SR_RXBUFF (0x1 << 7) /**< \brief (SSC_SR) Receive Buffer Full */ -#define SSC_SR_CP0 (0x1 << 8) /**< \brief (SSC_SR) Compare 0 */ -#define SSC_SR_CP1 (0x1 << 9) /**< \brief (SSC_SR) Compare 1 */ -#define SSC_SR_TXSYN (0x1 << 10) /**< \brief (SSC_SR) Transmit Sync */ -#define SSC_SR_RXSYN (0x1 << 11) /**< \brief (SSC_SR) Receive Sync */ -#define SSC_SR_TXEN (0x1 << 16) /**< \brief (SSC_SR) Transmit Enable */ -#define SSC_SR_RXEN (0x1 << 17) /**< \brief (SSC_SR) Receive Enable */ -/* -------- SSC_IER : (SSC Offset: 0x44) Interrupt Enable Register -------- */ -#define SSC_IER_TXRDY (0x1 << 0) /**< \brief (SSC_IER) Transmit Ready Interrupt Enable */ -#define SSC_IER_TXEMPTY (0x1 << 1) /**< \brief (SSC_IER) Transmit Empty Interrupt Enable */ -#define SSC_IER_ENDTX (0x1 << 2) /**< \brief (SSC_IER) End of Transmission Interrupt Enable */ -#define SSC_IER_TXBUFE (0x1 << 3) /**< \brief (SSC_IER) Transmit Buffer Empty Interrupt Enable */ -#define SSC_IER_RXRDY (0x1 << 4) /**< \brief (SSC_IER) Receive Ready Interrupt Enable */ -#define SSC_IER_OVRUN (0x1 << 5) /**< \brief (SSC_IER) Receive Overrun Interrupt Enable */ -#define SSC_IER_ENDRX (0x1 << 6) /**< \brief (SSC_IER) End of Reception Interrupt Enable */ -#define SSC_IER_RXBUFF (0x1 << 7) /**< \brief (SSC_IER) Receive Buffer Full Interrupt Enable */ -#define SSC_IER_CP0 (0x1 << 8) /**< \brief (SSC_IER) Compare 0 Interrupt Enable */ -#define SSC_IER_CP1 (0x1 << 9) /**< \brief (SSC_IER) Compare 1 Interrupt Enable */ -#define SSC_IER_TXSYN (0x1 << 10) /**< \brief (SSC_IER) Tx Sync Interrupt Enable */ -#define SSC_IER_RXSYN (0x1 << 11) /**< \brief (SSC_IER) Rx Sync Interrupt Enable */ -/* -------- SSC_IDR : (SSC Offset: 0x48) Interrupt Disable Register -------- */ -#define SSC_IDR_TXRDY (0x1 << 0) /**< \brief (SSC_IDR) Transmit Ready Interrupt Disable */ -#define SSC_IDR_TXEMPTY (0x1 << 1) /**< \brief (SSC_IDR) Transmit Empty Interrupt Disable */ -#define SSC_IDR_ENDTX (0x1 << 2) /**< \brief (SSC_IDR) End of Transmission Interrupt Disable */ -#define SSC_IDR_TXBUFE (0x1 << 3) /**< \brief (SSC_IDR) Transmit Buffer Empty Interrupt Disable */ -#define SSC_IDR_RXRDY (0x1 << 4) /**< \brief (SSC_IDR) Receive Ready Interrupt Disable */ -#define SSC_IDR_OVRUN (0x1 << 5) /**< \brief (SSC_IDR) Receive Overrun Interrupt Disable */ -#define SSC_IDR_ENDRX (0x1 << 6) /**< \brief (SSC_IDR) End of Reception Interrupt Disable */ -#define SSC_IDR_RXBUFF (0x1 << 7) /**< \brief (SSC_IDR) Receive Buffer Full Interrupt Disable */ -#define SSC_IDR_CP0 (0x1 << 8) /**< \brief (SSC_IDR) Compare 0 Interrupt Disable */ -#define SSC_IDR_CP1 (0x1 << 9) /**< \brief (SSC_IDR) Compare 1 Interrupt Disable */ -#define SSC_IDR_TXSYN (0x1 << 10) /**< \brief (SSC_IDR) Tx Sync Interrupt Enable */ -#define SSC_IDR_RXSYN (0x1 << 11) /**< \brief (SSC_IDR) Rx Sync Interrupt Enable */ -/* -------- SSC_IMR : (SSC Offset: 0x4C) Interrupt Mask Register -------- */ -#define SSC_IMR_TXRDY (0x1 << 0) /**< \brief (SSC_IMR) Transmit Ready Interrupt Mask */ -#define SSC_IMR_TXEMPTY (0x1 << 1) /**< \brief (SSC_IMR) Transmit Empty Interrupt Mask */ -#define SSC_IMR_ENDTX (0x1 << 2) /**< \brief (SSC_IMR) End of Transmission Interrupt Mask */ -#define SSC_IMR_TXBUFE (0x1 << 3) /**< \brief (SSC_IMR) Transmit Buffer Empty Interrupt Mask */ -#define SSC_IMR_RXRDY (0x1 << 4) /**< \brief (SSC_IMR) Receive Ready Interrupt Mask */ -#define SSC_IMR_OVRUN (0x1 << 5) /**< \brief (SSC_IMR) Receive Overrun Interrupt Mask */ -#define SSC_IMR_ENDRX (0x1 << 6) /**< \brief (SSC_IMR) End of Reception Interrupt Mask */ -#define SSC_IMR_RXBUFF (0x1 << 7) /**< \brief (SSC_IMR) Receive Buffer Full Interrupt Mask */ -#define SSC_IMR_CP0 (0x1 << 8) /**< \brief (SSC_IMR) Compare 0 Interrupt Mask */ -#define SSC_IMR_CP1 (0x1 << 9) /**< \brief (SSC_IMR) Compare 1 Interrupt Mask */ -#define SSC_IMR_TXSYN (0x1 << 10) /**< \brief (SSC_IMR) Tx Sync Interrupt Mask */ -#define SSC_IMR_RXSYN (0x1 << 11) /**< \brief (SSC_IMR) Rx Sync Interrupt Mask */ -/* -------- SSC_WPMR : (SSC Offset: 0xE4) Write Protect Mode Register -------- */ -#define SSC_WPMR_WPEN (0x1 << 0) /**< \brief (SSC_WPMR) Write Protect Enable */ -#define SSC_WPMR_WPKEY (0xffffff << 8) /**< \brief (SSC_WPMR) Write Protect KEY */ -/* -------- SSC_WPSR : (SSC Offset: 0xE8) Write Protect Status Register -------- */ -#define SSC_WPSR_WPVS (0x1 << 0) /**< \brief (SSC_WPSR) Write Protect Violation Status */ -#define SSC_WPSR_WPVSRC (0xffff << 8) /**< \brief (SSC_WPSR) Write Protect Violation Source */ -/* -------- SSC_RPR : (SSC Offset: 0x100) Receive Pointer Register -------- */ -#define SSC_RPR_RXPTR (0xffffffff << 0) /**< \brief (SSC_RPR) Receive Pointer Register */ -/* -------- SSC_RCR : (SSC Offset: 0x104) Receive Counter Register -------- */ -#define SSC_RCR_RXCTR (0xffff << 0) /**< \brief (SSC_RCR) Receive Counter Register */ -/* -------- SSC_TPR : (SSC Offset: 0x108) Transmit Pointer Register -------- */ -#define SSC_TPR_TXPTR (0xffffffff << 0) /**< \brief (SSC_TPR) Transmit Counter Register */ -/* -------- SSC_TCR : (SSC Offset: 0x10C) Transmit Counter Register -------- */ -#define SSC_TCR_TXCTR (0xffff << 0) /**< \brief (SSC_TCR) Transmit Counter Register */ -/* -------- SSC_RNPR : (SSC Offset: 0x110) Receive Next Pointer Register -------- */ -#define SSC_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (SSC_RNPR) Receive Next Pointer */ -/* -------- SSC_RNCR : (SSC Offset: 0x114) Receive Next Counter Register -------- */ -#define SSC_RNCR_RXNCTR (0xffff << 0) /**< \brief (SSC_RNCR) Receive Next Counter */ -/* -------- SSC_TNPR : (SSC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define SSC_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (SSC_TNPR) Transmit Next Pointer */ -/* -------- SSC_TNCR : (SSC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define SSC_TNCR_TXNCTR (0xffff << 0) /**< \brief (SSC_TNCR) Transmit Counter Next */ -/* -------- SSC_PTCR : (SSC Offset: 0x120) Transfer Control Register -------- */ -#define SSC_PTCR_RXTEN (0x1 << 0) /**< \brief (SSC_PTCR) Receiver Transfer Enable */ -#define SSC_PTCR_RXTDIS (0x1 << 1) /**< \brief (SSC_PTCR) Receiver Transfer Disable */ -#define SSC_PTCR_TXTEN (0x1 << 8) /**< \brief (SSC_PTCR) Transmitter Transfer Enable */ -#define SSC_PTCR_TXTDIS (0x1 << 9) /**< \brief (SSC_PTCR) Transmitter Transfer Disable */ -/* -------- SSC_PTSR : (SSC Offset: 0x124) Transfer Status Register -------- */ -#define SSC_PTSR_RXTEN (0x1 << 0) /**< \brief (SSC_PTSR) Receiver Transfer Enable */ -#define SSC_PTSR_TXTEN (0x1 << 8) /**< \brief (SSC_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Supply Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_SUPC Supply Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Supc hardware registers */ -typedef struct { - WoReg SUPC_CR; /**< \brief (Supc Offset: 0x00) Supply Controller Control Register */ - RwReg SUPC_SMMR; /**< \brief (Supc Offset: 0x04) Supply Controller Supply Monitor Mode Register */ - RwReg SUPC_MR; /**< \brief (Supc Offset: 0x08) Supply Controller Mode Register */ - RwReg SUPC_WUMR; /**< \brief (Supc Offset: 0x0C) Supply Controller Wake Up Mode Register */ - RwReg SUPC_WUIR; /**< \brief (Supc Offset: 0x10) Supply Controller Wake Up Inputs Register */ - RoReg SUPC_SR; /**< \brief (Supc Offset: 0x14) Supply Controller Status Register */ -} Supc; -#endif /* __ASSEMBLY__ */ -/* -------- SUPC_CR : (SUPC Offset: 0x00) Supply Controller Control Register -------- */ -#define SUPC_CR_VROFF (0x1 << 2) /**< \brief (SUPC_CR) Voltage Regulator Off */ -#define SUPC_CR_VROFF_NO_EFFECT (0x0 << 2) /**< \brief (SUPC_CR) no effect. */ -#define SUPC_CR_VROFF_STOP_VREG (0x1 << 2) /**< \brief (SUPC_CR) if KEY is correct, asserts vddcore_nreset and stops the voltage regulator. */ -#define SUPC_CR_XTALSEL (0x1 << 3) /**< \brief (SUPC_CR) Crystal Oscillator Select */ -#define SUPC_CR_XTALSEL_NO_EFFECT (0x0 << 3) /**< \brief (SUPC_CR) no effect. */ -#define SUPC_CR_XTALSEL_CRYSTAL_SEL (0x1 << 3) /**< \brief (SUPC_CR) if KEY is correct, switches the slow clock on the crystal oscillator output. */ -#define SUPC_CR_KEY (0xff << 24) /**< \brief (SUPC_CR) Password */ -/* -------- SUPC_SMMR : (SUPC Offset: 0x04) Supply Controller Supply Monitor Mode Register -------- */ -#define SUPC_SMMR_SMTH (0xf << 0) /**< \brief (SUPC_SMMR) Supply Monitor Threshold */ -#define SUPC_SMMR_SMTH_1_9V (0x0 << 0) /**< \brief (SUPC_SMMR) 1.9 V */ -#define SUPC_SMMR_SMTH_2_0V (0x1 << 0) /**< \brief (SUPC_SMMR) 2.0 V */ -#define SUPC_SMMR_SMTH_2_1V (0x2 << 0) /**< \brief (SUPC_SMMR) 2.1 V */ -#define SUPC_SMMR_SMTH_2_2V (0x3 << 0) /**< \brief (SUPC_SMMR) 2.2 V */ -#define SUPC_SMMR_SMTH_2_3V (0x4 << 0) /**< \brief (SUPC_SMMR) 2.3 V */ -#define SUPC_SMMR_SMTH_2_4V (0x5 << 0) /**< \brief (SUPC_SMMR) 2.4 V */ -#define SUPC_SMMR_SMTH_2_5V (0x6 << 0) /**< \brief (SUPC_SMMR) 2.5 V */ -#define SUPC_SMMR_SMTH_2_6V (0x7 << 0) /**< \brief (SUPC_SMMR) 2.6 V */ -#define SUPC_SMMR_SMTH_2_7V (0x8 << 0) /**< \brief (SUPC_SMMR) 2.7 V */ -#define SUPC_SMMR_SMTH_2_8V (0x9 << 0) /**< \brief (SUPC_SMMR) 2.8 V */ -#define SUPC_SMMR_SMTH_2_9V (0xA << 0) /**< \brief (SUPC_SMMR) 2.9 V */ -#define SUPC_SMMR_SMTH_3_0V (0xB << 0) /**< \brief (SUPC_SMMR) 3.0 V */ -#define SUPC_SMMR_SMTH_3_1V (0xC << 0) /**< \brief (SUPC_SMMR) 3.1 V */ -#define SUPC_SMMR_SMTH_3_2V (0xD << 0) /**< \brief (SUPC_SMMR) 3.2 V */ -#define SUPC_SMMR_SMTH_3_3V (0xE << 0) /**< \brief (SUPC_SMMR) 3.3 V */ -#define SUPC_SMMR_SMTH_3_4V (0xF << 0) /**< \brief (SUPC_SMMR) 3.4 V */ -#define SUPC_SMMR_SMSMPL (0x7 << 8) /**< \brief (SUPC_SMMR) Supply Monitor Sampling Period */ -#define SUPC_SMMR_SMSMPL_SMD (0x0 << 8) /**< \brief (SUPC_SMMR) Supply Monitor disabled */ -#define SUPC_SMMR_SMSMPL_CSM (0x1 << 8) /**< \brief (SUPC_SMMR) Continuous Supply Monitor */ -#define SUPC_SMMR_SMSMPL_32SLCK (0x2 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 32 SLCK periods */ -#define SUPC_SMMR_SMSMPL_256SLCK (0x3 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 256 SLCK periods */ -#define SUPC_SMMR_SMSMPL_2048SLCK (0x4 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 2,048 SLCK periods */ -#define SUPC_SMMR_SMRSTEN (0x1 << 12) /**< \brief (SUPC_SMMR) Supply Monitor Reset Enable */ -#define SUPC_SMMR_SMRSTEN_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_SMMR) the core reset signal "vddcore_nreset" is not affected when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMRSTEN_ENABLE (0x1 << 12) /**< \brief (SUPC_SMMR) the core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMIEN (0x1 << 13) /**< \brief (SUPC_SMMR) Supply Monitor Interrupt Enable */ -#define SUPC_SMMR_SMIEN_NOT_ENABLE (0x0 << 13) /**< \brief (SUPC_SMMR) the SUPC interrupt signal is not affected when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMIEN_ENABLE (0x1 << 13) /**< \brief (SUPC_SMMR) the SUPC interrupt signal is asserted when a supply monitor detection occurs. */ -/* -------- SUPC_MR : (SUPC Offset: 0x08) Supply Controller Mode Register -------- */ -#define SUPC_MR_BODRSTEN (0x1 << 12) /**< \brief (SUPC_MR) Brownout Detector Reset Enable */ -#define SUPC_MR_BODRSTEN_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_MR) the core reset signal "vddcore_nreset" is not affected when a brownout detection occurs. */ -#define SUPC_MR_BODRSTEN_ENABLE (0x1 << 12) /**< \brief (SUPC_MR) the core reset signal, vddcore_nreset is asserted when a brownout detection occurs. */ -#define SUPC_MR_BODDIS (0x1 << 13) /**< \brief (SUPC_MR) Brownout Detector Disable */ -#define SUPC_MR_BODDIS_ENABLE (0x0 << 13) /**< \brief (SUPC_MR) the core brownout detector is enabled. */ -#define SUPC_MR_BODDIS_DISABLE (0x1 << 13) /**< \brief (SUPC_MR) the core brownout detector is disabled. */ -#define SUPC_MR_ONREG (0x1 << 14) /**< \brief (SUPC_MR) Voltage Regulator enable */ -#define SUPC_MR_ONREG_ONREG_UNUSED (0x0 << 14) /**< \brief (SUPC_MR) Voltage Regulator is not used */ -#define SUPC_MR_ONREG_ONREG_USED (0x1 << 14) /**< \brief (SUPC_MR) Voltage Regulator is used */ -#define SUPC_MR_OSCBYPASS (0x1 << 20) /**< \brief (SUPC_MR) Oscillator Bypass */ -#define SUPC_MR_OSCBYPASS_NO_EFFECT (0x0 << 20) /**< \brief (SUPC_MR) no effect. Clock selection depends on XTALSEL value. */ -#define SUPC_MR_OSCBYPASS_BYPASS (0x1 << 20) /**< \brief (SUPC_MR) the 32-KHz XTAL oscillator is selected and is put in bypass mode. */ -#define SUPC_MR_KEY (0xff << 24) /**< \brief (SUPC_MR) Password Key */ -/* -------- SUPC_WUMR : (SUPC Offset: 0x0C) Supply Controller Wake Up Mode Register -------- */ -#define SUPC_WUMR_SMEN (0x1 << 1) /**< \brief (SUPC_WUMR) Supply Monitor Wake Up Enable */ -#define SUPC_WUMR_SMEN_NOT_ENABLE (0x0 << 1) /**< \brief (SUPC_WUMR) the supply monitor detection has no wake up effect. */ -#define SUPC_WUMR_SMEN_ENABLE (0x1 << 1) /**< \brief (SUPC_WUMR) the supply monitor detection forces the wake up of the core power supply. */ -#define SUPC_WUMR_RTTEN (0x1 << 2) /**< \brief (SUPC_WUMR) Real Time Timer Wake Up Enable */ -#define SUPC_WUMR_RTTEN_NOT_ENABLE (0x0 << 2) /**< \brief (SUPC_WUMR) the RTT alarm signal has no wake up effect. */ -#define SUPC_WUMR_RTTEN_ENABLE (0x1 << 2) /**< \brief (SUPC_WUMR) the RTT alarm signal forces the wake up of the core power supply. */ -#define SUPC_WUMR_RTCEN (0x1 << 3) /**< \brief (SUPC_WUMR) Real Time Clock Wake Up Enable */ -#define SUPC_WUMR_RTCEN_NOT_ENABLE (0x0 << 3) /**< \brief (SUPC_WUMR) the RTC alarm signal has no wake up effect. */ -#define SUPC_WUMR_RTCEN_ENABLE (0x1 << 3) /**< \brief (SUPC_WUMR) the RTC alarm signal forces the wake up of the core power supply. */ -#define SUPC_WUMR_WKUPDBC (0x7 << 12) /**< \brief (SUPC_WUMR) Wake Up Inputs Debouncer */ -#define SUPC_WUMR_WKUPDBC_1SCLK (0x0 << 12) /**< \brief (SUPC_WUMR) Immediate, no debouncing, detected active at least on one Slow Clock edge. */ -#define SUPC_WUMR_WKUPDBC_3SCLK (0x1 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 3 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_32SCLK (0x2 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 32 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_512SCLK (0x3 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 512 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_4096SCLK (0x4 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 4,096 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_32768SCLK (0x5 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 32,768 SLCK periods */ -/* -------- SUPC_WUIR : (SUPC Offset: 0x10) Supply Controller Wake Up Inputs Register -------- */ -#define SUPC_WUIR_WKUPEN0 (0x1 << 0) /**< \brief (SUPC_WUIR) Wake Up Input Enable 0 */ -#define SUPC_WUIR_WKUPEN0_NOT_ENABLE (0x0 << 0) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN0_ENABLE (0x1 << 0) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN1 (0x1 << 1) /**< \brief (SUPC_WUIR) Wake Up Input Enable 1 */ -#define SUPC_WUIR_WKUPEN1_NOT_ENABLE (0x0 << 1) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN1_ENABLE (0x1 << 1) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN2 (0x1 << 2) /**< \brief (SUPC_WUIR) Wake Up Input Enable 2 */ -#define SUPC_WUIR_WKUPEN2_NOT_ENABLE (0x0 << 2) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN2_ENABLE (0x1 << 2) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN3 (0x1 << 3) /**< \brief (SUPC_WUIR) Wake Up Input Enable 3 */ -#define SUPC_WUIR_WKUPEN3_NOT_ENABLE (0x0 << 3) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN3_ENABLE (0x1 << 3) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN4 (0x1 << 4) /**< \brief (SUPC_WUIR) Wake Up Input Enable 4 */ -#define SUPC_WUIR_WKUPEN4_NOT_ENABLE (0x0 << 4) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN4_ENABLE (0x1 << 4) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN5 (0x1 << 5) /**< \brief (SUPC_WUIR) Wake Up Input Enable 5 */ -#define SUPC_WUIR_WKUPEN5_NOT_ENABLE (0x0 << 5) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN5_ENABLE (0x1 << 5) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN6 (0x1 << 6) /**< \brief (SUPC_WUIR) Wake Up Input Enable 6 */ -#define SUPC_WUIR_WKUPEN6_NOT_ENABLE (0x0 << 6) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN6_ENABLE (0x1 << 6) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN7 (0x1 << 7) /**< \brief (SUPC_WUIR) Wake Up Input Enable 7 */ -#define SUPC_WUIR_WKUPEN7_NOT_ENABLE (0x0 << 7) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN7_ENABLE (0x1 << 7) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN8 (0x1 << 8) /**< \brief (SUPC_WUIR) Wake Up Input Enable 8 */ -#define SUPC_WUIR_WKUPEN8_NOT_ENABLE (0x0 << 8) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN8_ENABLE (0x1 << 8) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN9 (0x1 << 9) /**< \brief (SUPC_WUIR) Wake Up Input Enable 9 */ -#define SUPC_WUIR_WKUPEN9_NOT_ENABLE (0x0 << 9) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN9_ENABLE (0x1 << 9) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN10 (0x1 << 10) /**< \brief (SUPC_WUIR) Wake Up Input Enable 10 */ -#define SUPC_WUIR_WKUPEN10_NOT_ENABLE (0x0 << 10) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN10_ENABLE (0x1 << 10) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN11 (0x1 << 11) /**< \brief (SUPC_WUIR) Wake Up Input Enable 11 */ -#define SUPC_WUIR_WKUPEN11_NOT_ENABLE (0x0 << 11) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN11_ENABLE (0x1 << 11) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN12 (0x1 << 12) /**< \brief (SUPC_WUIR) Wake Up Input Enable 12 */ -#define SUPC_WUIR_WKUPEN12_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN12_ENABLE (0x1 << 12) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN13 (0x1 << 13) /**< \brief (SUPC_WUIR) Wake Up Input Enable 13 */ -#define SUPC_WUIR_WKUPEN13_NOT_ENABLE (0x0 << 13) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN13_ENABLE (0x1 << 13) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN14 (0x1 << 14) /**< \brief (SUPC_WUIR) Wake Up Input Enable 14 */ -#define SUPC_WUIR_WKUPEN14_NOT_ENABLE (0x0 << 14) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN14_ENABLE (0x1 << 14) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN15 (0x1 << 15) /**< \brief (SUPC_WUIR) Wake Up Input Enable 15 */ -#define SUPC_WUIR_WKUPEN15_NOT_ENABLE (0x0 << 15) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN15_ENABLE (0x1 << 15) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT0 (0x1 << 16) /**< \brief (SUPC_WUIR) Wake Up Input Transition 0 */ -#define SUPC_WUIR_WKUPT0_HIGH_TO_LOW (0x0 << 16) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT0_LOW_TO_HIGH (0x1 << 16) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT1 (0x1 << 17) /**< \brief (SUPC_WUIR) Wake Up Input Transition 1 */ -#define SUPC_WUIR_WKUPT1_HIGH_TO_LOW (0x0 << 17) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT1_LOW_TO_HIGH (0x1 << 17) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT2 (0x1 << 18) /**< \brief (SUPC_WUIR) Wake Up Input Transition 2 */ -#define SUPC_WUIR_WKUPT2_HIGH_TO_LOW (0x0 << 18) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT2_LOW_TO_HIGH (0x1 << 18) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT3 (0x1 << 19) /**< \brief (SUPC_WUIR) Wake Up Input Transition 3 */ -#define SUPC_WUIR_WKUPT3_HIGH_TO_LOW (0x0 << 19) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT3_LOW_TO_HIGH (0x1 << 19) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT4 (0x1 << 20) /**< \brief (SUPC_WUIR) Wake Up Input Transition 4 */ -#define SUPC_WUIR_WKUPT4_HIGH_TO_LOW (0x0 << 20) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT4_LOW_TO_HIGH (0x1 << 20) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT5 (0x1 << 21) /**< \brief (SUPC_WUIR) Wake Up Input Transition 5 */ -#define SUPC_WUIR_WKUPT5_HIGH_TO_LOW (0x0 << 21) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT5_LOW_TO_HIGH (0x1 << 21) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT6 (0x1 << 22) /**< \brief (SUPC_WUIR) Wake Up Input Transition 6 */ -#define SUPC_WUIR_WKUPT6_HIGH_TO_LOW (0x0 << 22) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT6_LOW_TO_HIGH (0x1 << 22) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT7 (0x1 << 23) /**< \brief (SUPC_WUIR) Wake Up Input Transition 7 */ -#define SUPC_WUIR_WKUPT7_HIGH_TO_LOW (0x0 << 23) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT7_LOW_TO_HIGH (0x1 << 23) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT8 (0x1 << 24) /**< \brief (SUPC_WUIR) Wake Up Input Transition 8 */ -#define SUPC_WUIR_WKUPT8_HIGH_TO_LOW (0x0 << 24) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT8_LOW_TO_HIGH (0x1 << 24) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT9 (0x1 << 25) /**< \brief (SUPC_WUIR) Wake Up Input Transition 9 */ -#define SUPC_WUIR_WKUPT9_HIGH_TO_LOW (0x0 << 25) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT9_LOW_TO_HIGH (0x1 << 25) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT10 (0x1 << 26) /**< \brief (SUPC_WUIR) Wake Up Input Transition 10 */ -#define SUPC_WUIR_WKUPT10_HIGH_TO_LOW (0x0 << 26) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT10_LOW_TO_HIGH (0x1 << 26) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT11 (0x1 << 27) /**< \brief (SUPC_WUIR) Wake Up Input Transition 11 */ -#define SUPC_WUIR_WKUPT11_HIGH_TO_LOW (0x0 << 27) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT11_LOW_TO_HIGH (0x1 << 27) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT12 (0x1 << 28) /**< \brief (SUPC_WUIR) Wake Up Input Transition 12 */ -#define SUPC_WUIR_WKUPT12_HIGH_TO_LOW (0x0 << 28) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT12_LOW_TO_HIGH (0x1 << 28) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT13 (0x1 << 29) /**< \brief (SUPC_WUIR) Wake Up Input Transition 13 */ -#define SUPC_WUIR_WKUPT13_HIGH_TO_LOW (0x0 << 29) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT13_LOW_TO_HIGH (0x1 << 29) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT14 (0x1 << 30) /**< \brief (SUPC_WUIR) Wake Up Input Transition 14 */ -#define SUPC_WUIR_WKUPT14_HIGH_TO_LOW (0x0 << 30) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT14_LOW_TO_HIGH (0x1 << 30) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT15 (0x1 << 31) /**< \brief (SUPC_WUIR) Wake Up Input Transition 15 */ -#define SUPC_WUIR_WKUPT15_HIGH_TO_LOW (0x0 << 31) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT15_LOW_TO_HIGH (0x1 << 31) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -/* -------- SUPC_SR : (SUPC Offset: 0x14) Supply Controller Status Register -------- */ -#define SUPC_SR_WKUPS (0x1 << 1) /**< \brief (SUPC_SR) WKUP Wake Up Status */ -#define SUPC_SR_WKUPS_NO (0x0 << 1) /**< \brief (SUPC_SR) no wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_WKUPS_PRESENT (0x1 << 1) /**< \brief (SUPC_SR) at least one wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_SMWS (0x1 << 2) /**< \brief (SUPC_SR) Supply Monitor Detection Wake Up Status */ -#define SUPC_SR_SMWS_NO (0x0 << 2) /**< \brief (SUPC_SR) no wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_SMWS_PRESENT (0x1 << 2) /**< \brief (SUPC_SR) at least one wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_BODRSTS (0x1 << 3) /**< \brief (SUPC_SR) Brownout Detector Reset Status */ -#define SUPC_SR_BODRSTS_NO (0x0 << 3) /**< \brief (SUPC_SR) no core brownout rising edge event has been detected since the last read of the SUPC_SR. */ -#define SUPC_SR_BODRSTS_PRESENT (0x1 << 3) /**< \brief (SUPC_SR) at least one brownout output rising edge event has been detected since the last read of the SUPC_SR. */ -#define SUPC_SR_SMRSTS (0x1 << 4) /**< \brief (SUPC_SR) Supply Monitor Reset Status */ -#define SUPC_SR_SMRSTS_NO (0x0 << 4) /**< \brief (SUPC_SR) no supply monitor detection has generated a core reset since the last read of the SUPC_SR. */ -#define SUPC_SR_SMRSTS_PRESENT (0x1 << 4) /**< \brief (SUPC_SR) at least one supply monitor detection has generated a core reset since the last read of the SUPC_SR. */ -#define SUPC_SR_SMS (0x1 << 5) /**< \brief (SUPC_SR) Supply Monitor Status */ -#define SUPC_SR_SMS_NO (0x0 << 5) /**< \brief (SUPC_SR) no supply monitor detection since the last read of SUPC_SR. */ -#define SUPC_SR_SMS_PRESENT (0x1 << 5) /**< \brief (SUPC_SR) at least one supply monitor detection since the last read of SUPC_SR. */ -#define SUPC_SR_SMOS (0x1 << 6) /**< \brief (SUPC_SR) Supply Monitor Output Status */ -#define SUPC_SR_SMOS_HIGH (0x0 << 6) /**< \brief (SUPC_SR) the supply monitor detected VDDIO higher than its threshold at its last measurement. */ -#define SUPC_SR_SMOS_LOW (0x1 << 6) /**< \brief (SUPC_SR) the supply monitor detected VDDIO lower than its threshold at its last measurement. */ -#define SUPC_SR_OSCSEL (0x1 << 7) /**< \brief (SUPC_SR) 32-kHz Oscillator Selection Status */ -#define SUPC_SR_OSCSEL_RC (0x0 << 7) /**< \brief (SUPC_SR) the slow clock, SLCK is generated by the embedded 32-kHz RC oscillator. */ -#define SUPC_SR_OSCSEL_CRYST (0x1 << 7) /**< \brief (SUPC_SR) the slow clock, SLCK is generated by the 32-kHz crystal oscillator. */ -#define SUPC_SR_WKUPIS0 (0x1 << 16) /**< \brief (SUPC_SR) WKUP Input Status 0 */ -#define SUPC_SR_WKUPIS0_DIS (0x0 << 16) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS0_EN (0x1 << 16) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS1 (0x1 << 17) /**< \brief (SUPC_SR) WKUP Input Status 1 */ -#define SUPC_SR_WKUPIS1_DIS (0x0 << 17) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS1_EN (0x1 << 17) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS2 (0x1 << 18) /**< \brief (SUPC_SR) WKUP Input Status 2 */ -#define SUPC_SR_WKUPIS2_DIS (0x0 << 18) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS2_EN (0x1 << 18) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS3 (0x1 << 19) /**< \brief (SUPC_SR) WKUP Input Status 3 */ -#define SUPC_SR_WKUPIS3_DIS (0x0 << 19) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS3_EN (0x1 << 19) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS4 (0x1 << 20) /**< \brief (SUPC_SR) WKUP Input Status 4 */ -#define SUPC_SR_WKUPIS4_DIS (0x0 << 20) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS4_EN (0x1 << 20) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS5 (0x1 << 21) /**< \brief (SUPC_SR) WKUP Input Status 5 */ -#define SUPC_SR_WKUPIS5_DIS (0x0 << 21) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS5_EN (0x1 << 21) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS6 (0x1 << 22) /**< \brief (SUPC_SR) WKUP Input Status 6 */ -#define SUPC_SR_WKUPIS6_DIS (0x0 << 22) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS6_EN (0x1 << 22) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS7 (0x1 << 23) /**< \brief (SUPC_SR) WKUP Input Status 7 */ -#define SUPC_SR_WKUPIS7_DIS (0x0 << 23) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS7_EN (0x1 << 23) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS8 (0x1 << 24) /**< \brief (SUPC_SR) WKUP Input Status 8 */ -#define SUPC_SR_WKUPIS8_DIS (0x0 << 24) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS8_EN (0x1 << 24) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS9 (0x1 << 25) /**< \brief (SUPC_SR) WKUP Input Status 9 */ -#define SUPC_SR_WKUPIS9_DIS (0x0 << 25) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS9_EN (0x1 << 25) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS10 (0x1 << 26) /**< \brief (SUPC_SR) WKUP Input Status 10 */ -#define SUPC_SR_WKUPIS10_DIS (0x0 << 26) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS10_EN (0x1 << 26) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS11 (0x1 << 27) /**< \brief (SUPC_SR) WKUP Input Status 11 */ -#define SUPC_SR_WKUPIS11_DIS (0x0 << 27) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS11_EN (0x1 << 27) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS12 (0x1 << 28) /**< \brief (SUPC_SR) WKUP Input Status 12 */ -#define SUPC_SR_WKUPIS12_DIS (0x0 << 28) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS12_EN (0x1 << 28) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS13 (0x1 << 29) /**< \brief (SUPC_SR) WKUP Input Status 13 */ -#define SUPC_SR_WKUPIS13_DIS (0x0 << 29) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS13_EN (0x1 << 29) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS14 (0x1 << 30) /**< \brief (SUPC_SR) WKUP Input Status 14 */ -#define SUPC_SR_WKUPIS14_DIS (0x0 << 30) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS14_EN (0x1 << 30) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS15 (0x1 << 31) /**< \brief (SUPC_SR) WKUP Input Status 15 */ -#define SUPC_SR_WKUPIS15_DIS (0x0 << 31) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS15_EN (0x1 << 31) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Timer Counter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_TC Timer Counter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief TcChannel hardware registers */ -typedef struct { - RwReg TC_CCR; /**< \brief (TcChannel Offset: 0x0) Channel Control Register */ - RwReg TC_CMR; /**< \brief (TcChannel Offset: 0x4) Channel Mode Register */ - RwReg Reserved1[2]; - RwReg TC_CV; /**< \brief (TcChannel Offset: 0x10) Counter Value */ - RwReg TC_RA; /**< \brief (TcChannel Offset: 0x14) Register A */ - RwReg TC_RB; /**< \brief (TcChannel Offset: 0x18) Register B */ - RwReg TC_RC; /**< \brief (TcChannel Offset: 0x1C) Register C */ - RwReg TC_SR; /**< \brief (TcChannel Offset: 0x20) Status Register */ - RwReg TC_IER; /**< \brief (TcChannel Offset: 0x24) Interrupt Enable Register */ - RwReg TC_IDR; /**< \brief (TcChannel Offset: 0x28) Interrupt Disable Register */ - RwReg TC_IMR; /**< \brief (TcChannel Offset: 0x2C) Interrupt Mask Register */ - RwReg Reserved2[4]; -} TcChannel; -/** \brief Tc hardware registers */ -typedef struct { - TcChannel TC_CHANNEL[3]; /**< \brief (Tc Offset: 0x0) channel = 0 .. 2 */ - WoReg TC_BCR; /**< \brief (Tc Offset: 0xC0) Block Control Register */ - RwReg TC_BMR; /**< \brief (Tc Offset: 0xC4) Block Mode Register */ - WoReg TC_QIER; /**< \brief (Tc Offset: 0xC8) QDEC Interrupt Enable Register */ - WoReg TC_QIDR; /**< \brief (Tc Offset: 0xCC) QDEC Interrupt Disable Register */ - RoReg TC_QIMR; /**< \brief (Tc Offset: 0xD0) QDEC Interrupt Mask Register */ - RoReg TC_QISR; /**< \brief (Tc Offset: 0xD4) QDEC Interrupt Status Register */ - RwReg TC_FMR; /**< \brief (Tc Offset: 0xD8) Fault Mode Register */ - RwReg Reserved1[2]; - RwReg TC_WPMR; /**< \brief (Tc Offset: 0xE4) Write Protect Mode Register */ - RwReg Reserved2[5]; - RoReg TC_VER; /**< \brief (Tc Offset: 0xFC) Version Register */ -} Tc; -#endif /* __ASSEMBLY__ */ -/* -------- TC_CCR0 : (TC Offset: 0x0) Channel Control Register (channel = 0) -------- */ -#define TC_CCR0_CLKEN (0x1 << 0) /**< \brief (TC_CCR0) Counter Clock Enable Command */ -#define TC_CCR0_CLKDIS (0x1 << 1) /**< \brief (TC_CCR0) Counter Clock Disable Command */ -#define TC_CCR0_SWTRG (0x1 << 2) /**< \brief (TC_CCR0) Software Trigger Command */ -/* -------- TC_CMR0 : (TC Offset: 0x4) Channel Mode Register (channel = 0) -------- */ -#define TC_CMR0_TCCLKS (0x7 << 0) /**< \brief (TC_CMR0) Clock Selection */ -#define TC_CM0_TCCLKS_TIMER_DIV1_CLOCK (0x0 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV1_CLOCK*/ -#define TC_CM0_TCCLKS_TIMER_DIV2_CLOCK (0x1 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV2_CLOCK*/ -#define TC_CM0_TCCLKS_TIMER_DIV3_CLOCK (0x2 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV3_CLOCK*/ -#define TC_CM0_TCCLKS_TIMER_DIV4_CLOCK (0x3 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV4_CLOCK*/ -#define TC_CM0_TCCLKS_TIMER_DIV5_CLOCK (0x4 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV5_CLOCK*/ -#define TC_CM0_TCCLKS_XC0 (0x5 << 0) /**< (TC_CMR0) Clock selected: XC0*/ -#define TC_CM0_TCCLKS_XC1 (0x6 << 0) /**< (TC_CMR0) Clock selected: XC1*/ -#define TC_CM0_TCCLKS_XC2 (0x7 << 0) /**< (TC_CMR0) Clock selected: XC2*/ -#define TC_CMR0_CLKI (0x1 << 3) /**< \brief (TC_CMR0) Clock Invert */ -#define TC_CMR0_BURST (0x3 << 4) /**< \brief (TC_CMR0) Burst Signal Selection */ -#define TC_CMR0_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR0) The clock is not gated by an external signal. */ -#define TC_CMR0_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR0) XC0 is ANDed with the selected clock. */ -#define TC_CMR0_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR0) XC1 is ANDed with the selected clock. */ -#define TC_CMR0_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR0) XC2 is ANDed with the selected clock. */ -#define TC_CMR0_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR0) Counter Clock Stopped with RB Loading */ -#define TC_CMR0_LDBDIS (0x1 << 7) /**< \brief (TC_CMR0) Counter Clock Disable with RB Loading */ -#define TC_CMR0_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR0) External Trigger Edge Selection */ -#define TC_CMR0_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR0) none */ -#define TC_CMR0_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR0) rising edge */ -#define TC_CMR0_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR0) falling edge */ -#define TC_CMR0_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR0) each edge */ -#define TC_CMR0_ABETRG (0x1 << 10) /**< \brief (TC_CMR0) TIOA or TIOB External Trigger Selection */ -#define TC_CMR0_CPCTRG (0x1 << 14) /**< \brief (TC_CMR0) RC Compare Trigger Enable */ -#define TC_CMR0_WAVE (0x1 << 15) /**< \brief (TC_CMR0) */ -#define TC_CMR0_LDRA (0x3 << 16) /**< \brief (TC_CMR0) RA Loading Selection */ -#define TC_CMR0_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR0) none */ -#define TC_CMR0_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR0) rising edge of TIOA */ -#define TC_CMR0_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR0) falling edge of TIOA */ -#define TC_CMR0_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR0) each edge of TIOA */ -#define TC_CMR0_LDRB (0x3 << 18) /**< \brief (TC_CMR0) RB Loading Selection */ -#define TC_CMR0_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR0) none */ -#define TC_CMR0_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR0) rising edge of TIOA */ -#define TC_CMR0_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR0) falling edge of TIOA */ -#define TC_CMR0_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR0) each edge of TIOA */ - -#define TC_CMR0_ACPA_NONE (0x0 << 16) // (TC) Effect: none -#define TC_CMR0_ACPA_SET (0x1 << 16) // (TC) Effect: set -#define TC_CMR0_ACPA_CLEAR (0x2 << 16) // (TC) Effect: clear -#define TC_CMR0_ACPA_TOGGLE (0x3 << 16) // (TC) Effect: toggle - -#define TC_CMR0_ACPC_NONE (0x0 << 18) // (TC) Effect: none -#define TC_CMR0_ACPC_SET (0x1 << 18) // (TC) Effect: set -#define TC_CMR0_ACPC_CLEAR (0x2 << 18) // (TC) Effect: clear -#define TC_CMR0_ACPC_TOGGLE (0x3 << 18) // (TC) Effect: toggle -/* -------- TC_CV0 : (TC Offset: 0x10) Counter Value (channel = 0) -------- */ -#define TC_CV0_CV (0xffff << 0) /**< \brief (TC_CV0) Counter Value */ -/* -------- TC_RA0 : (TC Offset: 0x14) Register A (channel = 0) -------- */ -#define TC_RA0_RA (0xffff << 0) /**< \brief (TC_RA0) Register A */ -/* -------- TC_RB0 : (TC Offset: 0x18) Register B (channel = 0) -------- */ -#define TC_RB0_RB (0xffff << 0) /**< \brief (TC_RB0) Register B */ -/* -------- TC_RC0 : (TC Offset: 0x1C) Register C (channel = 0) -------- */ -#define TC_RC0_RC (0xffff << 0) /**< \brief (TC_RC0) Register C */ -/* -------- TC_SR0 : (TC Offset: 0x20) Status Register (channel = 0) -------- */ -#define TC_SR0_COVFS (0x1 << 0) /**< \brief (TC_SR0) Counter Overflow Status */ -#define TC_SR0_LOVRS (0x1 << 1) /**< \brief (TC_SR0) Load Overrun Status */ -#define TC_SR0_CPAS (0x1 << 2) /**< \brief (TC_SR0) RA Compare Status */ -#define TC_SR0_CPBS (0x1 << 3) /**< \brief (TC_SR0) RB Compare Status */ -#define TC_SR0_CPCS (0x1 << 4) /**< \brief (TC_SR0) RC Compare Status */ -#define TC_SR0_LDRAS (0x1 << 5) /**< \brief (TC_SR0) RA Loading Status */ -#define TC_SR0_LDRBS (0x1 << 6) /**< \brief (TC_SR0) RB Loading Status */ -#define TC_SR0_ETRGS (0x1 << 7) /**< \brief (TC_SR0) External Trigger Status */ -#define TC_SR0_CLKSTA (0x1 << 16) /**< \brief (TC_SR0) Clock Enabling Status */ -#define TC_SR0_MTIOA (0x1 << 17) /**< \brief (TC_SR0) TIOA Mirror */ -#define TC_SR0_MTIOB (0x1 << 18) /**< \brief (TC_SR0) TIOB Mirror */ -/* -------- TC_IER0 : (TC Offset: 0x24) Interrupt Enable Register (channel = 0) -------- */ -#define TC_IER0_COVFS (0x1 << 0) /**< \brief (TC_IER0) Counter Overflow */ -#define TC_IER0_LOVRS (0x1 << 1) /**< \brief (TC_IER0) Load Overrun */ -#define TC_IER0_CPAS (0x1 << 2) /**< \brief (TC_IER0) RA Compare */ -#define TC_IER0_CPBS (0x1 << 3) /**< \brief (TC_IER0) RB Compare */ -#define TC_IER0_CPCS (0x1 << 4) /**< \brief (TC_IER0) RC Compare */ -#define TC_IER0_LDRAS (0x1 << 5) /**< \brief (TC_IER0) RA Loading */ -#define TC_IER0_LDRBS (0x1 << 6) /**< \brief (TC_IER0) RB Loading */ -#define TC_IER0_ETRGS (0x1 << 7) /**< \brief (TC_IER0) External Trigger */ -/* -------- TC_IDR0 : (TC Offset: 0x28) Interrupt Disable Register (channel = 0) -------- */ -#define TC_IDR0_COVFS (0x1 << 0) /**< \brief (TC_IDR0) Counter Overflow */ -#define TC_IDR0_LOVRS (0x1 << 1) /**< \brief (TC_IDR0) Load Overrun */ -#define TC_IDR0_CPAS (0x1 << 2) /**< \brief (TC_IDR0) RA Compare */ -#define TC_IDR0_CPBS (0x1 << 3) /**< \brief (TC_IDR0) RB Compare */ -#define TC_IDR0_CPCS (0x1 << 4) /**< \brief (TC_IDR0) RC Compare */ -#define TC_IDR0_LDRAS (0x1 << 5) /**< \brief (TC_IDR0) RA Loading */ -#define TC_IDR0_LDRBS (0x1 << 6) /**< \brief (TC_IDR0) RB Loading */ -#define TC_IDR0_ETRGS (0x1 << 7) /**< \brief (TC_IDR0) External Trigger */ -/* -------- TC_IMR0 : (TC Offset: 0x2C) Interrupt Mask Register (channel = 0) -------- */ -#define TC_IMR0_COVFS (0x1 << 0) /**< \brief (TC_IMR0) Counter Overflow */ -#define TC_IMR0_LOVRS (0x1 << 1) /**< \brief (TC_IMR0) Load Overrun */ -#define TC_IMR0_CPAS (0x1 << 2) /**< \brief (TC_IMR0) RA Compare */ -#define TC_IMR0_CPBS (0x1 << 3) /**< \brief (TC_IMR0) RB Compare */ -#define TC_IMR0_CPCS (0x1 << 4) /**< \brief (TC_IMR0) RC Compare */ -#define TC_IMR0_LDRAS (0x1 << 5) /**< \brief (TC_IMR0) RA Loading */ -#define TC_IMR0_LDRBS (0x1 << 6) /**< \brief (TC_IMR0) RB Loading */ -#define TC_IMR0_ETRGS (0x1 << 7) /**< \brief (TC_IMR0) External Trigger */ -/* -------- TC_CCR1 : (TC Offset: 0x40) Channel Control Register (channel = 1) -------- */ -#define TC_CCR1_CLKEN (0x1 << 0) /**< \brief (TC_CCR1) Counter Clock Enable Command */ -#define TC_CCR1_CLKDIS (0x1 << 1) /**< \brief (TC_CCR1) Counter Clock Disable Command */ -#define TC_CCR1_SWTRG (0x1 << 2) /**< \brief (TC_CCR1) Software Trigger Command */ -/* -------- TC_CMR1 : (TC Offset: 0x44) Channel Mode Register (channel = 1) -------- */ -#define TC_CMR1_TCCLKS (0x7 << 0) /**< \brief (TC_CMR1) Clock Selection */ -#define TC_CMR1_CLKI (0x1 << 3) /**< \brief (TC_CMR1) Clock Invert */ -#define TC_CMR1_BURST (0x3 << 4) /**< \brief (TC_CMR1) Burst Signal Selection */ -#define TC_CMR1_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR1) The clock is not gated by an external signal. */ -#define TC_CMR1_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR1) XC0 is ANDed with the selected clock. */ -#define TC_CMR1_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR1) XC1 is ANDed with the selected clock. */ -#define TC_CMR1_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR1) XC2 is ANDed with the selected clock. */ -#define TC_CMR1_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR1) Counter Clock Stopped with RB Loading */ -#define TC_CMR1_LDBDIS (0x1 << 7) /**< \brief (TC_CMR1) Counter Clock Disable with RB Loading */ -#define TC_CMR1_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR1) External Trigger Edge Selection */ -#define TC_CMR1_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR1) none */ -#define TC_CMR1_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR1) rising edge */ -#define TC_CMR1_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR1) falling edge */ -#define TC_CMR1_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR1) each edge */ -#define TC_CMR1_ABETRG (0x1 << 10) /**< \brief (TC_CMR1) TIOA or TIOB External Trigger Selection */ -#define TC_CMR1_CPCTRG (0x1 << 14) /**< \brief (TC_CMR1) RC Compare Trigger Enable */ -#define TC_CMR1_WAVE (0x1 << 15) /**< \brief (TC_CMR1) */ -#define TC_CMR1_LDRA (0x3 << 16) /**< \brief (TC_CMR1) RA Loading Selection */ -#define TC_CMR1_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR1) none */ -#define TC_CMR1_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR1) rising edge of TIOA */ -#define TC_CMR1_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR1) falling edge of TIOA */ -#define TC_CMR1_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR1) each edge of TIOA */ -#define TC_CMR1_LDRB (0x3 << 18) /**< \brief (TC_CMR1) RB Loading Selection */ -#define TC_CMR1_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR1) none */ -#define TC_CMR1_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR1) rising edge of TIOA */ -#define TC_CMR1_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR1) falling edge of TIOA */ -#define TC_CMR1_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR1) each edge of TIOA */ -/* -------- TC_CV1 : (TC Offset: 0x50) Counter Value (channel = 1) -------- */ -#define TC_CV1_CV (0xffff << 0) /**< \brief (TC_CV1) Counter Value */ -/* -------- TC_RA1 : (TC Offset: 0x54) Register A (channel = 1) -------- */ -#define TC_RA1_RA (0xffff << 0) /**< \brief (TC_RA1) Register A */ -/* -------- TC_RB1 : (TC Offset: 0x58) Register B (channel = 1) -------- */ -#define TC_RB1_RB (0xffff << 0) /**< \brief (TC_RB1) Register B */ -/* -------- TC_RC1 : (TC Offset: 0x5C) Register C (channel = 1) -------- */ -#define TC_RC1_RC (0xffff << 0) /**< \brief (TC_RC1) Register C */ -/* -------- TC_SR1 : (TC Offset: 0x60) Status Register (channel = 1) -------- */ -#define TC_SR1_COVFS (0x1 << 0) /**< \brief (TC_SR1) Counter Overflow Status */ -#define TC_SR1_LOVRS (0x1 << 1) /**< \brief (TC_SR1) Load Overrun Status */ -#define TC_SR1_CPAS (0x1 << 2) /**< \brief (TC_SR1) RA Compare Status */ -#define TC_SR1_CPBS (0x1 << 3) /**< \brief (TC_SR1) RB Compare Status */ -#define TC_SR1_CPCS (0x1 << 4) /**< \brief (TC_SR1) RC Compare Status */ -#define TC_SR1_LDRAS (0x1 << 5) /**< \brief (TC_SR1) RA Loading Status */ -#define TC_SR1_LDRBS (0x1 << 6) /**< \brief (TC_SR1) RB Loading Status */ -#define TC_SR1_ETRGS (0x1 << 7) /**< \brief (TC_SR1) External Trigger Status */ -#define TC_SR1_CLKSTA (0x1 << 16) /**< \brief (TC_SR1) Clock Enabling Status */ -#define TC_SR1_MTIOA (0x1 << 17) /**< \brief (TC_SR1) TIOA Mirror */ -#define TC_SR1_MTIOB (0x1 << 18) /**< \brief (TC_SR1) TIOB Mirror */ -/* -------- TC_IER1 : (TC Offset: 0x64) Interrupt Enable Register (channel = 1) -------- */ -#define TC_IER1_COVFS (0x1 << 0) /**< \brief (TC_IER1) Counter Overflow */ -#define TC_IER1_LOVRS (0x1 << 1) /**< \brief (TC_IER1) Load Overrun */ -#define TC_IER1_CPAS (0x1 << 2) /**< \brief (TC_IER1) RA Compare */ -#define TC_IER1_CPBS (0x1 << 3) /**< \brief (TC_IER1) RB Compare */ -#define TC_IER1_CPCS (0x1 << 4) /**< \brief (TC_IER1) RC Compare */ -#define TC_IER1_LDRAS (0x1 << 5) /**< \brief (TC_IER1) RA Loading */ -#define TC_IER1_LDRBS (0x1 << 6) /**< \brief (TC_IER1) RB Loading */ -#define TC_IER1_ETRGS (0x1 << 7) /**< \brief (TC_IER1) External Trigger */ -/* -------- TC_IDR1 : (TC Offset: 0x68) Interrupt Disable Register (channel = 1) -------- */ -#define TC_IDR1_COVFS (0x1 << 0) /**< \brief (TC_IDR1) Counter Overflow */ -#define TC_IDR1_LOVRS (0x1 << 1) /**< \brief (TC_IDR1) Load Overrun */ -#define TC_IDR1_CPAS (0x1 << 2) /**< \brief (TC_IDR1) RA Compare */ -#define TC_IDR1_CPBS (0x1 << 3) /**< \brief (TC_IDR1) RB Compare */ -#define TC_IDR1_CPCS (0x1 << 4) /**< \brief (TC_IDR1) RC Compare */ -#define TC_IDR1_LDRAS (0x1 << 5) /**< \brief (TC_IDR1) RA Loading */ -#define TC_IDR1_LDRBS (0x1 << 6) /**< \brief (TC_IDR1) RB Loading */ -#define TC_IDR1_ETRGS (0x1 << 7) /**< \brief (TC_IDR1) External Trigger */ -/* -------- TC_IMR1 : (TC Offset: 0x6C) Interrupt Mask Register (channel = 1) -------- */ -#define TC_IMR1_COVFS (0x1 << 0) /**< \brief (TC_IMR1) Counter Overflow */ -#define TC_IMR1_LOVRS (0x1 << 1) /**< \brief (TC_IMR1) Load Overrun */ -#define TC_IMR1_CPAS (0x1 << 2) /**< \brief (TC_IMR1) RA Compare */ -#define TC_IMR1_CPBS (0x1 << 3) /**< \brief (TC_IMR1) RB Compare */ -#define TC_IMR1_CPCS (0x1 << 4) /**< \brief (TC_IMR1) RC Compare */ -#define TC_IMR1_LDRAS (0x1 << 5) /**< \brief (TC_IMR1) RA Loading */ -#define TC_IMR1_LDRBS (0x1 << 6) /**< \brief (TC_IMR1) RB Loading */ -#define TC_IMR1_ETRGS (0x1 << 7) /**< \brief (TC_IMR1) External Trigger */ -/* -------- TC_CCR2 : (TC Offset: 0x80) Channel Control Register (channel = 2) -------- */ -#define TC_CCR2_CLKEN (0x1 << 0) /**< \brief (TC_CCR2) Counter Clock Enable Command */ -#define TC_CCR2_CLKDIS (0x1 << 1) /**< \brief (TC_CCR2) Counter Clock Disable Command */ -#define TC_CCR2_SWTRG (0x1 << 2) /**< \brief (TC_CCR2) Software Trigger Command */ -/* -------- TC_CMR2 : (TC Offset: 0x84) Channel Mode Register (channel = 2) -------- */ -#define TC_CMR2_TCCLKS (0x7 << 0) /**< \brief (TC_CMR2) Clock Selection */ -#define TC_CMR2_CLKI (0x1 << 3) /**< \brief (TC_CMR2) Clock Invert */ -#define TC_CMR2_BURST (0x3 << 4) /**< \brief (TC_CMR2) Burst Signal Selection */ -#define TC_CMR2_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR2) The clock is not gated by an external signal. */ -#define TC_CMR2_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR2) XC0 is ANDed with the selected clock. */ -#define TC_CMR2_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR2) XC1 is ANDed with the selected clock. */ -#define TC_CMR2_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR2) XC2 is ANDed with the selected clock. */ -#define TC_CMR2_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR2) Counter Clock Stopped with RB Loading */ -#define TC_CMR2_LDBDIS (0x1 << 7) /**< \brief (TC_CMR2) Counter Clock Disable with RB Loading */ -#define TC_CMR2_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR2) External Trigger Edge Selection */ -#define TC_CMR2_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR2) none */ -#define TC_CMR2_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR2) rising edge */ -#define TC_CMR2_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR2) falling edge */ -#define TC_CMR2_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR2) each edge */ -#define TC_CMR2_ABETRG (0x1 << 10) /**< \brief (TC_CMR2) TIOA or TIOB External Trigger Selection */ -#define TC_CMR2_CPCTRG (0x1 << 14) /**< \brief (TC_CMR2) RC Compare Trigger Enable */ -#define TC_CMR2_WAVE (0x1 << 15) /**< \brief (TC_CMR2) */ -#define TC_CMR2_LDRA (0x3 << 16) /**< \brief (TC_CMR2) RA Loading Selection */ -#define TC_CMR2_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR2) none */ -#define TC_CMR2_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR2) rising edge of TIOA */ -#define TC_CMR2_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR2) falling edge of TIOA */ -#define TC_CMR2_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR2) each edge of TIOA */ -#define TC_CMR2_LDRB (0x3 << 18) /**< \brief (TC_CMR2) RB Loading Selection */ -#define TC_CMR2_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR2) none */ -#define TC_CMR2_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR2) rising edge of TIOA */ -#define TC_CMR2_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR2) falling edge of TIOA */ -#define TC_CMR2_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR2) each edge of TIOA */ -/* -------- TC_CV2 : (TC Offset: 0x90) Counter Value (channel = 2) -------- */ -#define TC_CV2_CV (0xffff << 0) /**< \brief (TC_CV2) Counter Value */ -/* -------- TC_RA2 : (TC Offset: 0x94) Register A (channel = 2) -------- */ -#define TC_RA2_RA (0xffff << 0) /**< \brief (TC_RA2) Register A */ -/* -------- TC_RB2 : (TC Offset: 0x98) Register B (channel = 2) -------- */ -#define TC_RB2_RB (0xffff << 0) /**< \brief (TC_RB2) Register B */ -/* -------- TC_RC2 : (TC Offset: 0x9C) Register C (channel = 2) -------- */ -#define TC_RC2_RC (0xffff << 0) /**< \brief (TC_RC2) Register C */ -/* -------- TC_SR2 : (TC Offset: 0xA0) Status Register (channel = 2) -------- */ -#define TC_SR2_COVFS (0x1 << 0) /**< \brief (TC_SR2) Counter Overflow Status */ -#define TC_SR2_LOVRS (0x1 << 1) /**< \brief (TC_SR2) Load Overrun Status */ -#define TC_SR2_CPAS (0x1 << 2) /**< \brief (TC_SR2) RA Compare Status */ -#define TC_SR2_CPBS (0x1 << 3) /**< \brief (TC_SR2) RB Compare Status */ -#define TC_SR2_CPCS (0x1 << 4) /**< \brief (TC_SR2) RC Compare Status */ -#define TC_SR2_LDRAS (0x1 << 5) /**< \brief (TC_SR2) RA Loading Status */ -#define TC_SR2_LDRBS (0x1 << 6) /**< \brief (TC_SR2) RB Loading Status */ -#define TC_SR2_ETRGS (0x1 << 7) /**< \brief (TC_SR2) External Trigger Status */ -#define TC_SR2_CLKSTA (0x1 << 16) /**< \brief (TC_SR2) Clock Enabling Status */ -#define TC_SR2_MTIOA (0x1 << 17) /**< \brief (TC_SR2) TIOA Mirror */ -#define TC_SR2_MTIOB (0x1 << 18) /**< \brief (TC_SR2) TIOB Mirror */ -/* -------- TC_IER2 : (TC Offset: 0xA4) Interrupt Enable Register (channel = 2) -------- */ -#define TC_IER2_COVFS (0x1 << 0) /**< \brief (TC_IER2) Counter Overflow */ -#define TC_IER2_LOVRS (0x1 << 1) /**< \brief (TC_IER2) Load Overrun */ -#define TC_IER2_CPAS (0x1 << 2) /**< \brief (TC_IER2) RA Compare */ -#define TC_IER2_CPBS (0x1 << 3) /**< \brief (TC_IER2) RB Compare */ -#define TC_IER2_CPCS (0x1 << 4) /**< \brief (TC_IER2) RC Compare */ -#define TC_IER2_LDRAS (0x1 << 5) /**< \brief (TC_IER2) RA Loading */ -#define TC_IER2_LDRBS (0x1 << 6) /**< \brief (TC_IER2) RB Loading */ -#define TC_IER2_ETRGS (0x1 << 7) /**< \brief (TC_IER2) External Trigger */ -/* -------- TC_IDR2 : (TC Offset: 0xA8) Interrupt Disable Register (channel = 2) -------- */ -#define TC_IDR2_COVFS (0x1 << 0) /**< \brief (TC_IDR2) Counter Overflow */ -#define TC_IDR2_LOVRS (0x1 << 1) /**< \brief (TC_IDR2) Load Overrun */ -#define TC_IDR2_CPAS (0x1 << 2) /**< \brief (TC_IDR2) RA Compare */ -#define TC_IDR2_CPBS (0x1 << 3) /**< \brief (TC_IDR2) RB Compare */ -#define TC_IDR2_CPCS (0x1 << 4) /**< \brief (TC_IDR2) RC Compare */ -#define TC_IDR2_LDRAS (0x1 << 5) /**< \brief (TC_IDR2) RA Loading */ -#define TC_IDR2_LDRBS (0x1 << 6) /**< \brief (TC_IDR2) RB Loading */ -#define TC_IDR2_ETRGS (0x1 << 7) /**< \brief (TC_IDR2) External Trigger */ -/* -------- TC_IMR2 : (TC Offset: 0xAC) Interrupt Mask Register (channel = 2) -------- */ -#define TC_IMR2_COVFS (0x1 << 0) /**< \brief (TC_IMR2) Counter Overflow */ -#define TC_IMR2_LOVRS (0x1 << 1) /**< \brief (TC_IMR2) Load Overrun */ -#define TC_IMR2_CPAS (0x1 << 2) /**< \brief (TC_IMR2) RA Compare */ -#define TC_IMR2_CPBS (0x1 << 3) /**< \brief (TC_IMR2) RB Compare */ -#define TC_IMR2_CPCS (0x1 << 4) /**< \brief (TC_IMR2) RC Compare */ -#define TC_IMR2_LDRAS (0x1 << 5) /**< \brief (TC_IMR2) RA Loading */ -#define TC_IMR2_LDRBS (0x1 << 6) /**< \brief (TC_IMR2) RB Loading */ -#define TC_IMR2_ETRGS (0x1 << 7) /**< \brief (TC_IMR2) External Trigger */ -/* -------- TC_BCR : (TC Offset: 0xC0) Block Control Register -------- */ -#define TC_BCR_SYNC (0x1 << 0) /**< \brief (TC_BCR) Synchro Command */ -/* -------- TC_BMR : (TC Offset: 0xC4) Block Mode Register -------- */ -#define TC_BMR_TC0XC0S (0x3 << 0) /**< \brief (TC_BMR) External Clock Signal 0 Selection */ -#define TC_BMR_TC0XC0S_TCLK0 (0x0 << 0) /**< \brief (TC_BMR) TCLK0 */ -#define TC_BMR_TC0XC0S_NONE (0x1 << 0) /**< \brief (TC_BMR) none */ -#define TC_BMR_TC0XC0S_TIOA1 (0x2 << 0) /**< \brief (TC_BMR) TIOA1 */ -#define TC_BMR_TC0XC0S_TIOA2 (0x3 << 0) /**< \brief (TC_BMR) TIOA2 */ -#define TC_BMR_TC1XC1S (0x3 << 2) /**< \brief (TC_BMR) External Clock Signal 1 Selection */ -#define TC_BMR_TC1XC1S_TCLK1 (0x0 << 2) /**< \brief (TC_BMR) TCLK1 */ -#define TC_BMR_TC1XC1S_NONE (0x1 << 2) /**< \brief (TC_BMR) none */ -#define TC_BMR_TC1XC1S_TIOA0 (0x2 << 2) /**< \brief (TC_BMR) TIOA0 */ -#define TC_BMR_TC1XC1S_TIOA2 (0x3 << 2) /**< \brief (TC_BMR) TIOA2 */ -#define TC_BMR_TC2XC2S (0x3 << 4) /**< \brief (TC_BMR) External Clock Signal 2 Selection */ -#define TC_BMR_TC2XC2S_TCLK2 (0x0 << 4) /**< \brief (TC_BMR) TCLK2 */ -#define TC_BMR_TC2XC2S_NONE (0x1 << 4) /**< \brief (TC_BMR) none */ -#define TC_BMR_TC2XC2S_TIOA0 (0x2 << 4) /**< \brief (TC_BMR) TIOA0 */ -#define TC_BMR_TC2XC2S_TIOA1 (0x3 << 4) /**< \brief (TC_BMR) TIOA1 */ -#define TC_BMR_QDEN (0x1 << 8) /**< \brief (TC_BMR) Quadrature Decoder ENabled */ -#define TC_BMR_POSEN (0x1 << 9) /**< \brief (TC_BMR) POSition ENabled */ -#define TC_BMR_SPEEDEN (0x1 << 10) /**< \brief (TC_BMR) SPEED ENabled */ -#define TC_BMR_QDTRANS (0x1 << 11) /**< \brief (TC_BMR) Quadrature Decoding TRANSparent */ -#define TC_BMR_EDGPHA (0x1 << 12) /**< \brief (TC_BMR) EDGe on PHA count mode */ -#define TC_BMR_INVA (0x1 << 13) /**< \brief (TC_BMR) INVerted phA */ -#define TC_BMR_INVB (0x1 << 14) /**< \brief (TC_BMR) INVerted phB */ -#define TC_BMR_INVIDX (0x1 << 15) /**< \brief (TC_BMR) INVerted InDeX */ -#define TC_BMR_SWAP (0x1 << 16) /**< \brief (TC_BMR) SWAP PHA and PHB */ -#define TC_BMR_IDXPHB (0x1 << 17) /**< \brief (TC_BMR) InDeX pin is PHB pin */ -#define TC_BMR_FILTER (0x1 << 19) /**< \brief (TC_BMR) */ -#define TC_BMR_MAXFILT (0x3f << 20) /**< \brief (TC_BMR) MAXimum FILTer */ -/* -------- TC_QIER : (TC Offset: 0xC8) QDEC Interrupt Enable Register -------- */ -#define TC_QIER_IDX (0x1 << 0) /**< \brief (TC_QIER) InDeX */ -#define TC_QIER_DIRCHG (0x1 << 1) /**< \brief (TC_QIER) DIRection CHanGe */ -#define TC_QIER_QERR (0x1 << 2) /**< \brief (TC_QIER) Quadrature ERRor */ -/* -------- TC_QIDR : (TC Offset: 0xCC) QDEC Interrupt Disable Register -------- */ -#define TC_QIDR_IDX (0x1 << 0) /**< \brief (TC_QIDR) InDeX */ -#define TC_QIDR_DIRCHG (0x1 << 1) /**< \brief (TC_QIDR) DIRection CHanGe */ -#define TC_QIDR_QERR (0x1 << 2) /**< \brief (TC_QIDR) Quadrature ERRor */ -/* -------- TC_QIMR : (TC Offset: 0xD0) QDEC Interrupt Mask Register -------- */ -#define TC_QIMR_IDX (0x1 << 0) /**< \brief (TC_QIMR) InDeX */ -#define TC_QIMR_DIRCHG (0x1 << 1) /**< \brief (TC_QIMR) DIRection CHanGe */ -#define TC_QIMR_QERR (0x1 << 2) /**< \brief (TC_QIMR) Quadrature ERRor */ -/* -------- TC_QISR : (TC Offset: 0xD4) QDEC Interrupt Status Register -------- */ -#define TC_QISR_IDX (0x1 << 0) /**< \brief (TC_QISR) InDeX */ -#define TC_QISR_DIRCHG (0x1 << 1) /**< \brief (TC_QISR) DIRection CHanGe */ -#define TC_QISR_QERR (0x1 << 2) /**< \brief (TC_QISR) Quadrature ERRor */ -#define TC_QISR_DIR (0x1 << 8) /**< \brief (TC_QISR) Direction */ -/* -------- TC_FMR : (TC Offset: 0xD8) Fault Mode Register -------- */ -#define TC_FMR_ENCF0 (0x1 << 0) /**< \brief (TC_FMR) ENable Compare Fault Channel 0 */ -#define TC_FMR_ENCF1 (0x1 << 1) /**< \brief (TC_FMR) ENable Compare Fault Channel 1 */ -/* -------- TC_WPMR : (TC Offset: 0xE4) Write Protect Mode Register -------- */ -#define TC_WPMR_WPEN (0x1 << 0) /**< \brief (TC_WPMR) Write Protect Enable */ -#define TC_WPMR_WPKEY (0xffffff << 8) /**< \brief (TC_WPMR) Write Protect KEY */ -/* -------- TC_VER : (TC Offset: 0xFC) Version Register -------- */ -#define TC_VER_VERSION (0xfff << 0) /**< \brief (TC_VER) */ -#define TC_VER_MFN (0x7 << 16) /**< \brief (TC_VER) */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Two-wire Interface */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_TWI Two-wire Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Twi hardware registers */ -typedef struct { - WoReg TWI_CR; /**< \brief (Twi Offset: 0x00) Control Register */ - RwReg TWI_MMR; /**< \brief (Twi Offset: 0x04) Master Mode Register */ - RwReg TWI_SMR; /**< \brief (Twi Offset: 0x08) Slave Mode Register */ - RwReg TWI_IADR; /**< \brief (Twi Offset: 0x0C) Internal Address Register */ - RwReg TWI_CWGR; /**< \brief (Twi Offset: 0x10) Clock Waveform Generator Register */ - RwReg Reserved1[3]; - RoReg TWI_SR; /**< \brief (Twi Offset: 0x20) Status Register */ - WoReg TWI_IER; /**< \brief (Twi Offset: 0x24) Interrupt Enable Register */ - WoReg TWI_IDR; /**< \brief (Twi Offset: 0x28) Interrupt Disable Register */ - RoReg TWI_IMR; /**< \brief (Twi Offset: 0x2C) Interrupt Mask Register */ - RoReg TWI_RHR; /**< \brief (Twi Offset: 0x30) Receive Holding Register */ - WoReg TWI_THR; /**< \brief (Twi Offset: 0x34) Transmit Holding Register */ - RwReg Reserved2[50]; - RwReg TWI_RPR; /**< \brief (Twi Offset: 0x100) Receive Pointer Register */ - RwReg TWI_RCR; /**< \brief (Twi Offset: 0x104) Receive Counter Register */ - RwReg TWI_TPR; /**< \brief (Twi Offset: 0x108) Transmit Pointer Register */ - RwReg TWI_TCR; /**< \brief (Twi Offset: 0x10C) Transmit Counter Register */ - RwReg TWI_RNPR; /**< \brief (Twi Offset: 0x110) Receive Next Pointer Register */ - RwReg TWI_RNCR; /**< \brief (Twi Offset: 0x114) Receive Next Counter Register */ - RwReg TWI_TNPR; /**< \brief (Twi Offset: 0x118) Transmit Next Pointer Register */ - RwReg TWI_TNCR; /**< \brief (Twi Offset: 0x11C) Transmit Next Counter Register */ - WoReg TWI_PTCR; /**< \brief (Twi Offset: 0x120) Transfer Control Register */ - RoReg TWI_PTSR; /**< \brief (Twi Offset: 0x124) Transfer Status Register */ -} Twi; -#endif /* __ASSEMBLY__ */ -/* -------- TWI_CR : (TWI Offset: 0x00) Control Register -------- */ -#define TWI_CR_START (0x1 << 0) /**< \brief (TWI_CR) Send a START Condition */ -#define TWI_CR_STOP (0x1 << 1) /**< \brief (TWI_CR) Send a STOP Condition */ -#define TWI_CR_MSEN (0x1 << 2) /**< \brief (TWI_CR) TWI Master Mode Enabled */ -#define TWI_CR_MSDIS (0x1 << 3) /**< \brief (TWI_CR) TWI Master Mode Disabled */ -#define TWI_CR_SVEN (0x1 << 4) /**< \brief (TWI_CR) TWI Slave Mode Enabled */ -#define TWI_CR_SVDIS (0x1 << 5) /**< \brief (TWI_CR) TWI Slave Mode Disabled */ -#define TWI_CR_QUICK (0x1 << 6) /**< \brief (TWI_CR) SMBUS Quick Command */ -#define TWI_CR_SWRST (0x1 << 7) /**< \brief (TWI_CR) Software Reset */ -/* -------- TWI_MMR : (TWI Offset: 0x04) Master Mode Register -------- */ -#define TWI_MMR_IADRSZ (0x3 << 8) /**< \brief (TWI_MMR) Internal Device Address Size */ -#define TWI_MMR_IADRSZ_NO (0x0 << 8) /**< \brief (TWI_MMR) No internal device address */ -#define TWI_MMR_IADRSZ_1_BYTE (0x1 << 8) /**< \brief (TWI_MMR) One-byte internal device address */ -#define TWI_MMR_IADRSZ_2_BYTE (0x2 << 8) /**< \brief (TWI_MMR) Two-byte internal device address */ -#define TWI_MMR_IADRSZ_3_BYTE (0x3 << 8) /**< \brief (TWI_MMR) Three-byte internal device address */ -#define TWI_MMR_MREAD (0x1 << 12) /**< \brief (TWI_MMR) Master Read Direction */ -#define TWI_MMR_DADR (0x7f << 16) /**< \brief (TWI_MMR) Device Address */ -/* -------- TWI_SMR : (TWI Offset: 0x08) Slave Mode Register -------- */ -#define TWI_SMR_SADR (0x7f << 16) /**< \brief (TWI_SMR) Slave Address */ -/* -------- TWI_IADR : (TWI Offset: 0x0C) Internal Address Register -------- */ -#define TWI_IADR_IADR (0xffffff << 0) /**< \brief (TWI_IADR) Internal Address */ -/* -------- TWI_CWGR : (TWI Offset: 0x10) Clock Waveform Generator Register -------- */ -#define TWI_CWGR_CLDIV (0xff << 0) /**< \brief (TWI_CWGR) Clock Low Divider */ -#define TWI_CWGR_CHDIV (0xff << 8) /**< \brief (TWI_CWGR) Clock High Divider */ -#define TWI_CWGR_CKDIV (0x7 << 16) /**< \brief (TWI_CWGR) Clock Divider */ -/* -------- TWI_SR : (TWI Offset: 0x20) Status Register -------- */ -#define TWI_SR_TXCOMP (0x1 << 0) /**< \brief (TWI_SR) Transmission Completed (automatically set / reset) */ -#define TWI_SR_RXRDY (0x1 << 1) /**< \brief (TWI_SR) Receive Holding Register Ready (automatically set / reset) */ -#define TWI_SR_TXRDY (0x1 << 2) /**< \brief (TWI_SR) Transmit Holding Register Ready (automatically set / reset) */ -#define TWI_SR_SVREAD (0x1 << 3) /**< \brief (TWI_SR) Slave Read (automatically set / reset) */ -#define TWI_SR_SVACC (0x1 << 4) /**< \brief (TWI_SR) Slave Access (automatically set / reset) */ -#define TWI_SR_GACC (0x1 << 5) /**< \brief (TWI_SR) General Call Access (clear on read) */ -#define TWI_SR_OVRE (0x1 << 6) /**< \brief (TWI_SR) Overrun Error (clear on read) */ -#define TWI_SR_NACK (0x1 << 8) /**< \brief (TWI_SR) Not Acknowledged (clear on read) */ -#define TWI_SR_ARBLST (0x1 << 9) /**< \brief (TWI_SR) Arbitration Lost (clear on read) */ -#define TWI_SR_SCLWS (0x1 << 10) /**< \brief (TWI_SR) Clock Wait State (automatically set / reset) */ -#define TWI_SR_EOSACC (0x1 << 11) /**< \brief (TWI_SR) End Of Slave Access (clear on read) */ -#define TWI_SR_ENDRX (0x1 << 12) /**< \brief (TWI_SR) End of RX buffer */ -#define TWI_SR_ENDTX (0x1 << 13) /**< \brief (TWI_SR) End of TX buffer */ -#define TWI_SR_RXBUFF (0x1 << 14) /**< \brief (TWI_SR) RX Buffer Full */ -#define TWI_SR_TXBUFE (0x1 << 15) /**< \brief (TWI_SR) TX Buffer Empty */ -/* -------- TWI_IER : (TWI Offset: 0x24) Interrupt Enable Register -------- */ -#define TWI_IER_TXCOMP (0x1 << 0) /**< \brief (TWI_IER) Transmission Completed Interrupt Enable */ -#define TWI_IER_RXRDY (0x1 << 1) /**< \brief (TWI_IER) Receive Holding Register Ready Interrupt Enable */ -#define TWI_IER_TXRDY (0x1 << 2) /**< \brief (TWI_IER) Transmit Holding Register Ready Interrupt Enable */ -#define TWI_IER_SVACC (0x1 << 4) /**< \brief (TWI_IER) Slave Access Interrupt Enable */ -#define TWI_IER_GACC (0x1 << 5) /**< \brief (TWI_IER) General Call Access Interrupt Enable */ -#define TWI_IER_OVRE (0x1 << 6) /**< \brief (TWI_IER) Overrun Error Interrupt Enable */ -#define TWI_IER_NACK (0x1 << 8) /**< \brief (TWI_IER) Not Acknowledge Interrupt Enable */ -#define TWI_IER_ARBLST (0x1 << 9) /**< \brief (TWI_IER) Arbitration Lost Interrupt Enable */ -#define TWI_IER_SCL_WS (0x1 << 10) /**< \brief (TWI_IER) Clock Wait State Interrupt Enable */ -#define TWI_IER_EOSACC (0x1 << 11) /**< \brief (TWI_IER) End Of Slave Access Interrupt Enable */ -#define TWI_IER_ENDRX (0x1 << 12) /**< \brief (TWI_IER) End of Receive Buffer Interrupt Enable */ -#define TWI_IER_ENDTX (0x1 << 13) /**< \brief (TWI_IER) End of Transmit Buffer Interrupt Enable */ -#define TWI_IER_RXBUFF (0x1 << 14) /**< \brief (TWI_IER) Receive Buffer Full Interrupt Enable */ -#define TWI_IER_TXBUFE (0x1 << 15) /**< \brief (TWI_IER) Transmit Buffer Empty Interrupt Enable */ -/* -------- TWI_IDR : (TWI Offset: 0x28) Interrupt Disable Register -------- */ -#define TWI_IDR_TXCOMP (0x1 << 0) /**< \brief (TWI_IDR) Transmission Completed Interrupt Disable */ -#define TWI_IDR_RXRDY (0x1 << 1) /**< \brief (TWI_IDR) Receive Holding Register Ready Interrupt Disable */ -#define TWI_IDR_TXRDY (0x1 << 2) /**< \brief (TWI_IDR) Transmit Holding Register Ready Interrupt Disable */ -#define TWI_IDR_SVACC (0x1 << 4) /**< \brief (TWI_IDR) Slave Access Interrupt Disable */ -#define TWI_IDR_GACC (0x1 << 5) /**< \brief (TWI_IDR) General Call Access Interrupt Disable */ -#define TWI_IDR_OVRE (0x1 << 6) /**< \brief (TWI_IDR) Overrun Error Interrupt Disable */ -#define TWI_IDR_NACK (0x1 << 8) /**< \brief (TWI_IDR) Not Acknowledge Interrupt Disable */ -#define TWI_IDR_ARBLST (0x1 << 9) /**< \brief (TWI_IDR) Arbitration Lost Interrupt Disable */ -#define TWI_IDR_SCL_WS (0x1 << 10) /**< \brief (TWI_IDR) Clock Wait State Interrupt Disable */ -#define TWI_IDR_EOSACC (0x1 << 11) /**< \brief (TWI_IDR) End Of Slave Access Interrupt Disable */ -#define TWI_IDR_ENDRX (0x1 << 12) /**< \brief (TWI_IDR) End of Receive Buffer Interrupt Disable */ -#define TWI_IDR_ENDTX (0x1 << 13) /**< \brief (TWI_IDR) End of Transmit Buffer Interrupt Disable */ -#define TWI_IDR_RXBUFF (0x1 << 14) /**< \brief (TWI_IDR) Receive Buffer Full Interrupt Disable */ -#define TWI_IDR_TXBUFE (0x1 << 15) /**< \brief (TWI_IDR) Transmit Buffer Empty Interrupt Disable */ -/* -------- TWI_IMR : (TWI Offset: 0x2C) Interrupt Mask Register -------- */ -#define TWI_IMR_TXCOMP (0x1 << 0) /**< \brief (TWI_IMR) Transmission Completed Interrupt Mask */ -#define TWI_IMR_RXRDY (0x1 << 1) /**< \brief (TWI_IMR) Receive Holding Register Ready Interrupt Mask */ -#define TWI_IMR_TXRDY (0x1 << 2) /**< \brief (TWI_IMR) Transmit Holding Register Ready Interrupt Mask */ -#define TWI_IMR_SVACC (0x1 << 4) /**< \brief (TWI_IMR) Slave Access Interrupt Mask */ -#define TWI_IMR_GACC (0x1 << 5) /**< \brief (TWI_IMR) General Call Access Interrupt Mask */ -#define TWI_IMR_OVRE (0x1 << 6) /**< \brief (TWI_IMR) Overrun Error Interrupt Mask */ -#define TWI_IMR_NACK (0x1 << 8) /**< \brief (TWI_IMR) Not Acknowledge Interrupt Mask */ -#define TWI_IMR_ARBLST (0x1 << 9) /**< \brief (TWI_IMR) Arbitration Lost Interrupt Mask */ -#define TWI_IMR_SCL_WS (0x1 << 10) /**< \brief (TWI_IMR) Clock Wait State Interrupt Mask */ -#define TWI_IMR_EOSACC (0x1 << 11) /**< \brief (TWI_IMR) End Of Slave Access Interrupt Mask */ -#define TWI_IMR_ENDRX (0x1 << 12) /**< \brief (TWI_IMR) End of Receive Buffer Interrupt Mask */ -#define TWI_IMR_ENDTX (0x1 << 13) /**< \brief (TWI_IMR) End of Transmit Buffer Interrupt Mask */ -#define TWI_IMR_RXBUFF (0x1 << 14) /**< \brief (TWI_IMR) Receive Buffer Full Interrupt Mask */ -#define TWI_IMR_TXBUFE (0x1 << 15) /**< \brief (TWI_IMR) Transmit Buffer Empty Interrupt Mask */ -/* -------- TWI_RHR : (TWI Offset: 0x30) Receive Holding Register -------- */ -#define TWI_RHR_RXDATA (0xff << 0) /**< \brief (TWI_RHR) Master or Slave Receive Holding Data */ -/* -------- TWI_THR : (TWI Offset: 0x34) Transmit Holding Register -------- */ -#define TWI_THR_TXDATA (0xff << 0) /**< \brief (TWI_THR) Master or Slave Transmit Holding Data */ -/* -------- TWI_RPR : (TWI Offset: 0x100) Receive Pointer Register -------- */ -#define TWI_RPR_RXPTR (0xffffffff << 0) /**< \brief (TWI_RPR) Receive Pointer Register */ -/* -------- TWI_RCR : (TWI Offset: 0x104) Receive Counter Register -------- */ -#define TWI_RCR_RXCTR (0xffff << 0) /**< \brief (TWI_RCR) Receive Counter Register */ -/* -------- TWI_TPR : (TWI Offset: 0x108) Transmit Pointer Register -------- */ -#define TWI_TPR_TXPTR (0xffffffff << 0) /**< \brief (TWI_TPR) Transmit Counter Register */ -/* -------- TWI_TCR : (TWI Offset: 0x10C) Transmit Counter Register -------- */ -#define TWI_TCR_TXCTR (0xffff << 0) /**< \brief (TWI_TCR) Transmit Counter Register */ -/* -------- TWI_RNPR : (TWI Offset: 0x110) Receive Next Pointer Register -------- */ -#define TWI_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (TWI_RNPR) Receive Next Pointer */ -/* -------- TWI_RNCR : (TWI Offset: 0x114) Receive Next Counter Register -------- */ -#define TWI_RNCR_RXNCTR (0xffff << 0) /**< \brief (TWI_RNCR) Receive Next Counter */ -/* -------- TWI_TNPR : (TWI Offset: 0x118) Transmit Next Pointer Register -------- */ -#define TWI_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (TWI_TNPR) Transmit Next Pointer */ -/* -------- TWI_TNCR : (TWI Offset: 0x11C) Transmit Next Counter Register -------- */ -#define TWI_TNCR_TXNCTR (0xffff << 0) /**< \brief (TWI_TNCR) Transmit Counter Next */ -/* -------- TWI_PTCR : (TWI Offset: 0x120) Transfer Control Register -------- */ -#define TWI_PTCR_RXTEN (0x1 << 0) /**< \brief (TWI_PTCR) Receiver Transfer Enable */ -#define TWI_PTCR_RXTDIS (0x1 << 1) /**< \brief (TWI_PTCR) Receiver Transfer Disable */ -#define TWI_PTCR_TXTEN (0x1 << 8) /**< \brief (TWI_PTCR) Transmitter Transfer Enable */ -#define TWI_PTCR_TXTDIS (0x1 << 9) /**< \brief (TWI_PTCR) Transmitter Transfer Disable */ -/* -------- TWI_PTSR : (TWI Offset: 0x124) Transfer Status Register -------- */ -#define TWI_PTSR_RXTEN (0x1 << 0) /**< \brief (TWI_PTSR) Receiver Transfer Enable */ -#define TWI_PTSR_TXTEN (0x1 << 8) /**< \brief (TWI_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Universal Asynchronous Receiver Transmitter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_UART Universal Asynchronous Receiver Transmitter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Uart hardware registers */ -typedef struct { - WoReg UART_CR; /**< \brief (Uart Offset: 0x0000) Control Register */ - RwReg UART_MR; /**< \brief (Uart Offset: 0x0004) Mode Register */ - WoReg UART_IER; /**< \brief (Uart Offset: 0x0008) Interrupt Enable Register */ - WoReg UART_IDR; /**< \brief (Uart Offset: 0x000C) Interrupt Disable Register */ - RoReg UART_IMR; /**< \brief (Uart Offset: 0x0010) Interrupt Mask Register */ - RoReg UART_SR; /**< \brief (Uart Offset: 0x0014) Status Register */ - RoReg UART_RHR; /**< \brief (Uart Offset: 0x0018) Receive Holding Register */ - WoReg UART_THR; /**< \brief (Uart Offset: 0x001C) Transmit Holding Register */ - RwReg UART_BRGR; /**< \brief (Uart Offset: 0x0020) Baud Rate Generator Register */ - RwReg Reserved1[55]; - RwReg UART_RPR; /**< \brief (Uart Offset: 0x100) Receive Pointer Register */ - RwReg UART_RCR; /**< \brief (Uart Offset: 0x104) Receive Counter Register */ - RwReg UART_TPR; /**< \brief (Uart Offset: 0x108) Transmit Pointer Register */ - RwReg UART_TCR; /**< \brief (Uart Offset: 0x10C) Transmit Counter Register */ - RwReg UART_RNPR; /**< \brief (Uart Offset: 0x110) Receive Next Pointer Register */ - RwReg UART_RNCR; /**< \brief (Uart Offset: 0x114) Receive Next Counter Register */ - RwReg UART_TNPR; /**< \brief (Uart Offset: 0x118) Transmit Next Pointer Register */ - RwReg UART_TNCR; /**< \brief (Uart Offset: 0x11C) Transmit Next Counter Register */ - WoReg UART_PTCR; /**< \brief (Uart Offset: 0x120) Transfer Control Register */ - RoReg UART_PTSR; /**< \brief (Uart Offset: 0x124) Transfer Status Register */ -} Uart; -#endif /* __ASSEMBLY__ */ -/* -------- UART_CR : (UART Offset: 0x0000) Control Register -------- */ -#define UART_CR_RSTRX (0x1 << 2) /**< \brief (UART_CR) Reset Receiver */ -#define UART_CR_RSTTX (0x1 << 3) /**< \brief (UART_CR) Reset Transmitter */ -#define UART_CR_RXEN (0x1 << 4) /**< \brief (UART_CR) Receiver Enable */ -#define UART_CR_RXDIS (0x1 << 5) /**< \brief (UART_CR) Receiver Disable */ -#define UART_CR_TXEN (0x1 << 6) /**< \brief (UART_CR) Transmitter Enable */ -#define UART_CR_TXDIS (0x1 << 7) /**< \brief (UART_CR) Transmitter Disable */ -#define UART_CR_RSTSTA (0x1 << 8) /**< \brief (UART_CR) Reset Status Bits */ -/* -------- UART_MR : (UART Offset: 0x0004) Mode Register -------- */ -#define UART_MR_PAR (0x7 << 9) /**< \brief (UART_MR) Parity Type */ -#define UART_MR_CHMODE (0x3 << 14) /**< \brief (UART_MR) Channel Mode */ -/* -------- UART_IER : (UART Offset: 0x0008) Interrupt Enable Register -------- */ -#define UART_IER_RXRDY (0x1 << 0) /**< \brief (UART_IER) Enable RXRDY Interrupt */ -#define UART_IER_TXRDY (0x1 << 1) /**< \brief (UART_IER) Enable TXRDY Interrupt */ -#define UART_IER_ENDRX (0x1 << 3) /**< \brief (UART_IER) Enable End of Receive Transfer Interrupt */ -#define UART_IER_ENDTX (0x1 << 4) /**< \brief (UART_IER) Enable End of Transmit Interrupt */ -#define UART_IER_OVRE (0x1 << 5) /**< \brief (UART_IER) Enable Overrun Error Interrupt */ -#define UART_IER_FRAME (0x1 << 6) /**< \brief (UART_IER) Enable Framing Error Interrupt */ -#define UART_IER_PARE (0x1 << 7) /**< \brief (UART_IER) Enable Parity Error Interrupt */ -#define UART_IER_TXEMPTY (0x1 << 9) /**< \brief (UART_IER) Enable TXEMPTY Interrupt */ -#define UART_IER_TXBUFE (0x1 << 11) /**< \brief (UART_IER) Enable Buffer Empty Interrupt */ -#define UART_IER_RXBUFF (0x1 << 12) /**< \brief (UART_IER) Enable Buffer Full Interrupt */ -/* -------- UART_IDR : (UART Offset: 0x000C) Interrupt Disable Register -------- */ -#define UART_IDR_RXRDY (0x1 << 0) /**< \brief (UART_IDR) Disable RXRDY Interrupt */ -#define UART_IDR_TXRDY (0x1 << 1) /**< \brief (UART_IDR) Disable TXRDY Interrupt */ -#define UART_IDR_ENDRX (0x1 << 3) /**< \brief (UART_IDR) Disable End of Receive Transfer Interrupt */ -#define UART_IDR_ENDTX (0x1 << 4) /**< \brief (UART_IDR) Disable End of Transmit Interrupt */ -#define UART_IDR_OVRE (0x1 << 5) /**< \brief (UART_IDR) Disable Overrun Error Interrupt */ -#define UART_IDR_FRAME (0x1 << 6) /**< \brief (UART_IDR) Disable Framing Error Interrupt */ -#define UART_IDR_PARE (0x1 << 7) /**< \brief (UART_IDR) Disable Parity Error Interrupt */ -#define UART_IDR_TXEMPTY (0x1 << 9) /**< \brief (UART_IDR) Disable TXEMPTY Interrupt */ -#define UART_IDR_TXBUFE (0x1 << 11) /**< \brief (UART_IDR) Disable Buffer Empty Interrupt */ -#define UART_IDR_RXBUFF (0x1 << 12) /**< \brief (UART_IDR) Disable Buffer Full Interrupt */ -/* -------- UART_IMR : (UART Offset: 0x0010) Interrupt Mask Register -------- */ -#define UART_IMR_RXRDY (0x1 << 0) /**< \brief (UART_IMR) Mask RXRDY Interrupt */ -#define UART_IMR_TXRDY (0x1 << 1) /**< \brief (UART_IMR) Disable TXRDY Interrupt */ -#define UART_IMR_ENDRX (0x1 << 3) /**< \brief (UART_IMR) Mask End of Receive Transfer Interrupt */ -#define UART_IMR_ENDTX (0x1 << 4) /**< \brief (UART_IMR) Mask End of Transmit Interrupt */ -#define UART_IMR_OVRE (0x1 << 5) /**< \brief (UART_IMR) Mask Overrun Error Interrupt */ -#define UART_IMR_FRAME (0x1 << 6) /**< \brief (UART_IMR) Mask Framing Error Interrupt */ -#define UART_IMR_PARE (0x1 << 7) /**< \brief (UART_IMR) Mask Parity Error Interrupt */ -#define UART_IMR_TXEMPTY (0x1 << 9) /**< \brief (UART_IMR) Mask TXEMPTY Interrupt */ -#define UART_IMR_TXBUFE (0x1 << 11) /**< \brief (UART_IMR) Mask TXBUFE Interrupt */ -#define UART_IMR_RXBUFF (0x1 << 12) /**< \brief (UART_IMR) Mask RXBUFF Interrupt */ -/* -------- UART_SR : (UART Offset: 0x0014) Status Register -------- */ -#define UART_SR_RXRDY (0x1 << 0) /**< \brief (UART_SR) Receiver Ready */ -#define UART_SR_TXRDY (0x1 << 1) /**< \brief (UART_SR) Transmitter Ready */ -#define UART_SR_ENDRX (0x1 << 3) /**< \brief (UART_SR) End of Receiver Transfer */ -#define UART_SR_ENDTX (0x1 << 4) /**< \brief (UART_SR) End of Transmitter Transfer */ -#define UART_SR_OVRE (0x1 << 5) /**< \brief (UART_SR) Overrun Error */ -#define UART_SR_FRAME (0x1 << 6) /**< \brief (UART_SR) Framing Error */ -#define UART_SR_PARE (0x1 << 7) /**< \brief (UART_SR) Parity Error */ -#define UART_SR_TXEMPTY (0x1 << 9) /**< \brief (UART_SR) Transmitter Empty */ -#define UART_SR_TXBUFE (0x1 << 11) /**< \brief (UART_SR) Transmission Buffer Empty */ -#define UART_SR_RXBUFF (0x1 << 12) /**< \brief (UART_SR) Receive Buffer Full */ -/* -------- UART_RHR : (UART Offset: 0x0018) Receive Holding Register -------- */ -#define UART_RHR_RXCHR (0xff << 0) /**< \brief (UART_RHR) Received Character */ -/* -------- UART_THR : (UART Offset: 0x001C) Transmit Holding Register -------- */ -#define UART_THR_TXCHR (0xff << 0) /**< \brief (UART_THR) Character to be Transmitted */ -/* -------- UART_BRGR : (UART Offset: 0x0020) Baud Rate Generator Register -------- */ -#define UART_BRGR_CD (0xffff << 0) /**< \brief (UART_BRGR) Clock Divisor */ -/* -------- UART_RPR : (UART Offset: 0x100) Receive Pointer Register -------- */ -#define UART_RPR_RXPTR (0xffffffff << 0) /**< \brief (UART_RPR) Receive Pointer Register */ -/* -------- UART_RCR : (UART Offset: 0x104) Receive Counter Register -------- */ -#define UART_RCR_RXCTR (0xffff << 0) /**< \brief (UART_RCR) Receive Counter Register */ -/* -------- UART_TPR : (UART Offset: 0x108) Transmit Pointer Register -------- */ -#define UART_TPR_TXPTR (0xffffffff << 0) /**< \brief (UART_TPR) Transmit Counter Register */ -/* -------- UART_TCR : (UART Offset: 0x10C) Transmit Counter Register -------- */ -#define UART_TCR_TXCTR (0xffff << 0) /**< \brief (UART_TCR) Transmit Counter Register */ -/* -------- UART_RNPR : (UART Offset: 0x110) Receive Next Pointer Register -------- */ -#define UART_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (UART_RNPR) Receive Next Pointer */ -/* -------- UART_RNCR : (UART Offset: 0x114) Receive Next Counter Register -------- */ -#define UART_RNCR_RXNCTR (0xffff << 0) /**< \brief (UART_RNCR) Receive Next Counter */ -/* -------- UART_TNPR : (UART Offset: 0x118) Transmit Next Pointer Register -------- */ -#define UART_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (UART_TNPR) Transmit Next Pointer */ -/* -------- UART_TNCR : (UART Offset: 0x11C) Transmit Next Counter Register -------- */ -#define UART_TNCR_TXNCTR (0xffff << 0) /**< \brief (UART_TNCR) Transmit Counter Next */ -/* -------- UART_PTCR : (UART Offset: 0x120) Transfer Control Register -------- */ -#define UART_PTCR_RXTEN (0x1 << 0) /**< \brief (UART_PTCR) Receiver Transfer Enable */ -#define UART_PTCR_RXTDIS (0x1 << 1) /**< \brief (UART_PTCR) Receiver Transfer Disable */ -#define UART_PTCR_TXTEN (0x1 << 8) /**< \brief (UART_PTCR) Transmitter Transfer Enable */ -#define UART_PTCR_TXTDIS (0x1 << 9) /**< \brief (UART_PTCR) Transmitter Transfer Disable */ -/* -------- UART_PTSR : (UART Offset: 0x124) Transfer Status Register -------- */ -#define UART_PTSR_RXTEN (0x1 << 0) /**< \brief (UART_PTSR) Receiver Transfer Enable */ -#define UART_PTSR_TXTEN (0x1 << 8) /**< \brief (UART_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR USB Device Port */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_UDP USB Device Port */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Udp hardware registers */ -typedef struct { - RoReg UDP_FRM_NUM; /**< \brief (Udp Offset: 0x000) Frame Number Register */ - RwReg UDP_GLB_STAT; /**< \brief (Udp Offset: 0x004) Global State Register */ - RwReg UDP_FADDR; /**< \brief (Udp Offset: 0x008) Function Address Register */ - RwReg Reserved1[1]; - WoReg UDP_IER; /**< \brief (Udp Offset: 0x010) Interrupt Enable Register */ - WoReg UDP_IDR; /**< \brief (Udp Offset: 0x014) Interrupt Disable Register */ - RoReg UDP_IMR; /**< \brief (Udp Offset: 0x018) Interrupt Mask Register */ - RoReg UDP_ISR; /**< \brief (Udp Offset: 0x01C) Interrupt Status Register */ - WoReg UDP_ICR; /**< \brief (Udp Offset: 0x020) Interrupt Clear Register */ - RwReg Reserved2[1]; - RwReg UDP_RST_EP; /**< \brief (Udp Offset: 0x028) Reset Endpoint Register */ - RwReg Reserved3[1]; - RwReg UDP_CSR[8]; /**< \brief (Udp Offset: 0x30) Endpoint Control and Status Register (ept_num = 0) */ - RwReg UDP_FDR[8]; /**< \brief (Udp Offset: 0x50) Endpoint FIFO Data Register (ept_num = 0) */ - RwReg Reserved4[1]; - RwReg UDP_TXVC; /**< \brief (Udp Offset: 0x074) Transceiver Control Register */ -} Udp; -#endif /* __ASSEMBLY__ */ -/* -------- UDP_FRM_NUM : (UDP Offset: 0x000) Frame Number Register -------- */ -#define UDP_FRM_NUM_FRM_NUM (0x7ff << 0) /**< \brief (UDP_FRM_NUM) Frame Number as Defined in the Packet Field Formats */ -#define UDP_FRM_NUM_FRM_ERR (0x1 << 16) /**< \brief (UDP_FRM_NUM) Frame Error */ -#define UDP_FRM_NUM_FRM_OK (0x1 << 17) /**< \brief (UDP_FRM_NUM) Frame OK */ -/* -------- UDP_GLB_STAT : (UDP Offset: 0x004) Global State Register -------- */ -#define UDP_GLB_STAT_FADDEN (0x1 << 0) /**< \brief (UDP_GLB_STAT) Function Address Enable */ -#define UDP_GLB_STAT_CONFG (0x1 << 1) /**< \brief (UDP_GLB_STAT) Configured */ -#define UDP_GLB_STAT_ESR (0x1 << 2) /**< \brief (UDP_GLB_STAT) Enable Send Resume */ -#define UDP_GLB_STAT_RSMINPR (0x1 << 3) /**< \brief (UDP_GLB_STAT) */ -#define UDP_GLB_STAT_RMWUPE (0x1 << 4) /**< \brief (UDP_GLB_STAT) Remote Wake Up Enable */ -/* -------- UDP_FADDR : (UDP Offset: 0x008) Function Address Register -------- */ -#define UDP_FADDR_FADD (0x7f << 0) /**< \brief (UDP_FADDR) Function Address Value */ -#define UDP_FADDR_FEN (0x1 << 8) /**< \brief (UDP_FADDR) Function Enable */ -/* -------- UDP_IER : (UDP Offset: 0x010) Interrupt Enable Register -------- */ -#define UDP_IER_EP0INT (0x1 << 0) /**< \brief (UDP_IER) Enable Endpoint 0 Interrupt */ -#define UDP_IER_EP1INT (0x1 << 1) /**< \brief (UDP_IER) Enable Endpoint 1 Interrupt */ -#define UDP_IER_EP2INT (0x1 << 2) /**< \brief (UDP_IER) Enable Endpoint 2Interrupt */ -#define UDP_IER_EP3INT (0x1 << 3) /**< \brief (UDP_IER) Enable Endpoint 3 Interrupt */ -#define UDP_IER_EP4INT (0x1 << 4) /**< \brief (UDP_IER) Enable Endpoint 4 Interrupt */ -#define UDP_IER_EP5INT (0x1 << 5) /**< \brief (UDP_IER) Enable Endpoint 5 Interrupt */ -#define UDP_IER_EP6INT (0x1 << 6) /**< \brief (UDP_IER) Enable Endpoint 6 Interrupt */ -#define UDP_IER_EP7INT (0x1 << 7) /**< \brief (UDP_IER) Enable Endpoint 7 Interrupt */ -#define UDP_IER_RXSUSP (0x1 << 8) /**< \brief (UDP_IER) Enable UDP Suspend Interrupt */ -#define UDP_IER_RXRSM (0x1 << 9) /**< \brief (UDP_IER) Enable UDP Resume Interrupt */ -#define UDP_IER_EXTRSM (0x1 << 10) /**< \brief (UDP_IER) */ -#define UDP_IER_SOFINT (0x1 << 11) /**< \brief (UDP_IER) Enable Start Of Frame Interrupt */ -#define UDP_IER_WAKEUP (0x1 << 13) /**< \brief (UDP_IER) Enable UDP bus Wakeup Interrupt */ -/* -------- UDP_IDR : (UDP Offset: 0x014) Interrupt Disable Register -------- */ -#define UDP_IDR_EP0INT (0x1 << 0) /**< \brief (UDP_IDR) Disable Endpoint 0 Interrupt */ -#define UDP_IDR_EP1INT (0x1 << 1) /**< \brief (UDP_IDR) Disable Endpoint 1 Interrupt */ -#define UDP_IDR_EP2INT (0x1 << 2) /**< \brief (UDP_IDR) Disable Endpoint 2 Interrupt */ -#define UDP_IDR_EP3INT (0x1 << 3) /**< \brief (UDP_IDR) Disable Endpoint 3 Interrupt */ -#define UDP_IDR_EP4INT (0x1 << 4) /**< \brief (UDP_IDR) Disable Endpoint 4 Interrupt */ -#define UDP_IDR_EP5INT (0x1 << 5) /**< \brief (UDP_IDR) Disable Endpoint 5 Interrupt */ -#define UDP_IDR_EP6INT (0x1 << 6) /**< \brief (UDP_IDR) Disable Endpoint 6 Interrupt */ -#define UDP_IDR_EP7INT (0x1 << 7) /**< \brief (UDP_IDR) Disable Endpoint 7 Interrupt */ -#define UDP_IDR_RXSUSP (0x1 << 8) /**< \brief (UDP_IDR) Disable UDP Suspend Interrupt */ -#define UDP_IDR_RXRSM (0x1 << 9) /**< \brief (UDP_IDR) Disable UDP Resume Interrupt */ -#define UDP_IDR_EXTRSM (0x1 << 10) /**< \brief (UDP_IDR) */ -#define UDP_IDR_SOFINT (0x1 << 11) /**< \brief (UDP_IDR) Disable Start Of Frame Interrupt */ -#define UDP_IDR_WAKEUP (0x1 << 13) /**< \brief (UDP_IDR) Disable USB Bus Interrupt */ -/* -------- UDP_IMR : (UDP Offset: 0x018) Interrupt Mask Register -------- */ -#define UDP_IMR_EP0INT (0x1 << 0) /**< \brief (UDP_IMR) Mask Endpoint 0 Interrupt */ -#define UDP_IMR_EP1INT (0x1 << 1) /**< \brief (UDP_IMR) Mask Endpoint 1 Interrupt */ -#define UDP_IMR_EP2INT (0x1 << 2) /**< \brief (UDP_IMR) Mask Endpoint 2 Interrupt */ -#define UDP_IMR_EP3INT (0x1 << 3) /**< \brief (UDP_IMR) Mask Endpoint 3 Interrupt */ -#define UDP_IMR_EP4INT (0x1 << 4) /**< \brief (UDP_IMR) Mask Endpoint 4 Interrupt */ -#define UDP_IMR_EP5INT (0x1 << 5) /**< \brief (UDP_IMR) Mask Endpoint 5 Interrupt */ -#define UDP_IMR_EP6INT (0x1 << 6) /**< \brief (UDP_IMR) Mask Endpoint 6 Interrupt */ -#define UDP_IMR_EP7INT (0x1 << 7) /**< \brief (UDP_IMR) Mask Endpoint 7 Interrupt */ -#define UDP_IMR_RXSUSP (0x1 << 8) /**< \brief (UDP_IMR) Mask UDP Suspend Interrupt */ -#define UDP_IMR_RXRSM (0x1 << 9) /**< \brief (UDP_IMR) Mask UDP Resume Interrupt. */ -#define UDP_IMR_EXTRSM (0x1 << 10) /**< \brief (UDP_IMR) */ -#define UDP_IMR_SOFINT (0x1 << 11) /**< \brief (UDP_IMR) Mask Start Of Frame Interrupt */ -#define UDP_IMR_BIT12 (0x1 << 12) /**< \brief (UDP_IMR) UDP_IMR Bit 12 */ -#define UDP_IMR_WAKEUP (0x1 << 13) /**< \brief (UDP_IMR) USB Bus WAKEUP Interrupt */ -/* -------- UDP_ISR : (UDP Offset: 0x01C) Interrupt Status Register -------- */ -#define UDP_ISR_EP0INT (0x1 << 0) /**< \brief (UDP_ISR) Endpoint 0 Interrupt Status */ -#define UDP_ISR_EP1INT (0x1 << 1) /**< \brief (UDP_ISR) Endpoint 1 Interrupt Status */ -#define UDP_ISR_EP2INT (0x1 << 2) /**< \brief (UDP_ISR) Endpoint 2 Interrupt Status */ -#define UDP_ISR_EP3INT (0x1 << 3) /**< \brief (UDP_ISR) Endpoint 3 Interrupt Status */ -#define UDP_ISR_EP4INT (0x1 << 4) /**< \brief (UDP_ISR) Endpoint 4 Interrupt Status */ -#define UDP_ISR_EP5INT (0x1 << 5) /**< \brief (UDP_ISR) Endpoint 5 Interrupt Status */ -#define UDP_ISR_EP6INT (0x1 << 6) /**< \brief (UDP_ISR) Endpoint 6 Interrupt Status */ -#define UDP_ISR_EP7INT (0x1 << 7) /**< \brief (UDP_ISR) Endpoint 7Interrupt Status */ -#define UDP_ISR_RXSUSP (0x1 << 8) /**< \brief (UDP_ISR) UDP Suspend Interrupt Status */ -#define UDP_ISR_RXRSM (0x1 << 9) /**< \brief (UDP_ISR) UDP Resume Interrupt Status */ -#define UDP_ISR_EXTRSM (0x1 << 10) /**< \brief (UDP_ISR) */ -#define UDP_ISR_SOFINT (0x1 << 11) /**< \brief (UDP_ISR) Start of Frame Interrupt Status */ -#define UDP_ISR_ENDBUSRES (0x1 << 12) /**< \brief (UDP_ISR) End of BUS Reset Interrupt Status */ -#define UDP_ISR_WAKEUP (0x1 << 13) /**< \brief (UDP_ISR) UDP Resume Interrupt Status */ -/* -------- UDP_ICR : (UDP Offset: 0x020) Interrupt Clear Register -------- */ -#define UDP_ICR_RXSUSP (0x1 << 8) /**< \brief (UDP_ICR) Clear UDP Suspend Interrupt */ -#define UDP_ICR_RXRSM (0x1 << 9) /**< \brief (UDP_ICR) Clear UDP Resume Interrupt */ -#define UDP_ICR_EXTRSM (0x1 << 10) /**< \brief (UDP_ICR) */ -#define UDP_ICR_SOFINT (0x1 << 11) /**< \brief (UDP_ICR) Clear Start Of Frame Interrupt */ -#define UDP_ICR_ENDBUSRES (0x1 << 12) /**< \brief (UDP_ICR) Clear End of Bus Reset Interrupt */ -#define UDP_ICR_WAKEUP (0x1 << 13) /**< \brief (UDP_ICR) Clear Wakeup Interrupt */ -/* -------- UDP_RST_EP : (UDP Offset: 0x028) Reset Endpoint Register -------- */ -#define UDP_RST_EP_EP0 (0x1 << 0) /**< \brief (UDP_RST_EP) Reset Endpoint 0 */ -#define UDP_RST_EP_EP1 (0x1 << 1) /**< \brief (UDP_RST_EP) Reset Endpoint 1 */ -#define UDP_RST_EP_EP2 (0x1 << 2) /**< \brief (UDP_RST_EP) Reset Endpoint 2 */ -#define UDP_RST_EP_EP3 (0x1 << 3) /**< \brief (UDP_RST_EP) Reset Endpoint 3 */ -#define UDP_RST_EP_EP4 (0x1 << 4) /**< \brief (UDP_RST_EP) Reset Endpoint 4 */ -#define UDP_RST_EP_EP5 (0x1 << 5) /**< \brief (UDP_RST_EP) Reset Endpoint 5 */ -#define UDP_RST_EP_EP6 (0x1 << 6) /**< \brief (UDP_RST_EP) Reset Endpoint 6 */ -#define UDP_RST_EP_EP7 (0x1 << 7) /**< \brief (UDP_RST_EP) Reset Endpoint 7 */ -/* -------- UDP_CSR[8] : (UDP Offset: 0x2C) Endpoint Control and Status Register (ept_num = 0) -------- */ -#define UDP_CSR_TXCOMP (0x1 << 0) /**< \brief (UDP_CSR[8]) Generates an IN Packet with Data Previously Written in the DPR */ -#define UDP_CSR_RX_DATA_BK0 (0x1 << 1) /**< \brief (UDP_CSR[8]) Receive Data Bank 0 */ -#define UDP_CSR_RXSETUP (0x1 << 2) /**< \brief (UDP_CSR[8]) Received Setup */ -#define UDP_CSR_STALLSENTISOERROR (0x1 << 3) /**< \brief (UDP_CSR[8]) */ -#define UDP_CSR_TXPKTRDY (0x1 << 4) /**< \brief (UDP_CSR[8]) Transmit Packet Ready */ -#define UDP_CSR_FORCESTALL (0x1 << 5) /**< \brief (UDP_CSR[8]) Force Stall (used by Control, Bulk and Isochronous Endpoints) */ -#define UDP_CSR_RX_DATA_BK1 (0x1 << 6) /**< \brief (UDP_CSR[8]) Receive Data Bank 1 (only used by endpoints with ping-pong attributes) */ -#define UDP_CSR_DIR (0x1 << 7) /**< \brief (UDP_CSR[8]) Transfer Direction (only available for control endpoints) */ -#define UDP_CSR_EPTYPE (0x7 << 8) /**< \brief (UDP_CSR[8]) Endpoint Type */ -#define UDP_CSR_EPTYPE_CTRL (0x0 << 8) /**< \brief (UDP_CSR[8]) Control */ -#define UDP_CSR_EPTYPE_ISO_OUT (0x1 << 8) /**< \brief (UDP_CSR[8]) Isochronous OUT */ -#define UDP_CSR_EPTYPE_BULK_OUT (0x2 << 8) /**< \brief (UDP_CSR[8]) Bulk OUT */ -#define UDP_CSR_EPTYPE_INT_OUT (0x3 << 8) /**< \brief (UDP_CSR[8]) Interrupt OUT */ -#define UDP_CSR_EPTYPE_ISO_IN (0x5 << 8) /**< \brief (UDP_CSR[8]) Isochronous IN */ -#define UDP_CSR_EPTYPE_BULK_IN (0x6 << 8) /**< \brief (UDP_CSR[8]) Bulk IN */ -#define UDP_CSR_EPTYPE_INT_IN (0x7 << 8) /**< \brief (UDP_CSR[8]) Interrupt IN */ -#define UDP_CSR_DTGLE (0x1 << 11) /**< \brief (UDP_CSR[8]) Data Toggle */ -#define UDP_CSR_EPEDS (0x1 << 15) /**< \brief (UDP_CSR[8]) Endpoint Enable Disable */ -#define UDP_CSR_RXBYTECNT (0x7ff << 16) /**< \brief (UDP_CSR[8]) Number of Bytes Available in the FIFO */ -/* -------- UDP_FDR[8] : (UDP Offset: 0x4C) Endpoint FIFO Data Register (ept_num = 0) -------- */ -#define UDP_FDR_FIFO_DATA (0xff << 0) /**< \brief (UDP_FDR[8]) FIFO Data Value */ -/* -------- UDP_TXVC : (UDP Offset: 0x074) Transceiver Control Register -------- */ -#define UDP_TXVC_TXVDIS (0x1 << 8) /**< \brief (UDP_TXVC) Transceiver Disable */ -#define UDP_TXVC_PUON (0x1 << 9) /**< \brief (UDP_TXVC) Pullup On */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Universal Synchronous Asynchronous Receiver Transmitter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_USART Universal Synchronous Asynchronous Receiver Transmitter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Usart hardware registers */ -typedef struct { - WoReg US_CR; /**< \brief (Usart Offset: 0x0000) Control Register */ - RwReg US_MR; /**< \brief (Usart Offset: 0x0004) Mode Register */ - WoReg US_IER; /**< \brief (Usart Offset: 0x0008) Interrupt Enable Register */ - WoReg US_IDR; /**< \brief (Usart Offset: 0x000C) Interrupt Disable Register */ - RoReg US_IMR; /**< \brief (Usart Offset: 0x0010) Interrupt Mask Register */ - RoReg US_CSR; /**< \brief (Usart Offset: 0x0014) Channel Status Register */ - RoReg US_RHR; /**< \brief (Usart Offset: 0x0018) Receiver Holding Register */ - WoReg US_THR; /**< \brief (Usart Offset: 0x001C) Transmitter Holding Register */ - RwReg US_BRGR; /**< \brief (Usart Offset: 0x0020) Baud Rate Generator Register */ - RwReg US_RTOR; /**< \brief (Usart Offset: 0x0024) Receiver Time-out Register */ - RwReg US_TTGR; /**< \brief (Usart Offset: 0x0028) Transmitter Timeguard Register */ - RwReg Reserved1[5]; - RwReg US_FIDI; /**< \brief (Usart Offset: 0x0040) FI DI Ratio Register */ - RoReg US_NER; /**< \brief (Usart Offset: 0x0044) Number of Errors Register */ - RwReg Reserved2[1]; - RwReg US_IF; /**< \brief (Usart Offset: 0x004C) IrDA Filter Register */ - RwReg US_MAN; /**< \brief (Usart Offset: 0x0050) Manchester Encoder Decoder Register */ - RwReg Reserved3[36]; - RwReg US_WPMR; /**< \brief (Usart Offset: 0xE4) Write Protect Mode Register */ - RoReg US_WPSR; /**< \brief (Usart Offset: 0xE8) Write Protect Status Register */ - RwReg Reserved4[4]; - RoReg US_VERSION; /**< \brief (Usart Offset: 0xFC) Version Register */ - RwReg US_RPR; /**< \brief (Usart Offset: 0x100) Receive Pointer Register */ - RwReg US_RCR; /**< \brief (Usart Offset: 0x104) Receive Counter Register */ - RwReg US_TPR; /**< \brief (Usart Offset: 0x108) Transmit Pointer Register */ - RwReg US_TCR; /**< \brief (Usart Offset: 0x10C) Transmit Counter Register */ - RwReg US_RNPR; /**< \brief (Usart Offset: 0x110) Receive Next Pointer Register */ - RwReg US_RNCR; /**< \brief (Usart Offset: 0x114) Receive Next Counter Register */ - RwReg US_TNPR; /**< \brief (Usart Offset: 0x118) Transmit Next Pointer Register */ - RwReg US_TNCR; /**< \brief (Usart Offset: 0x11C) Transmit Next Counter Register */ - WoReg US_PTCR; /**< \brief (Usart Offset: 0x120) Transfer Control Register */ - RoReg US_PTSR; /**< \brief (Usart Offset: 0x124) Transfer Status Register */ -} Usart; -#endif /* __ASSEMBLY__ */ -/* -------- US_CR : (USART Offset: 0x0000) Control Register -------- */ -#define US_CR_RSTRX (0x1 << 2) /**< \brief (US_CR) Reset Receiver */ -#define US_CR_RSTTX (0x1 << 3) /**< \brief (US_CR) Reset Transmitter */ -#define US_CR_RXEN (0x1 << 4) /**< \brief (US_CR) Receiver Enable */ -#define US_CR_RXDIS (0x1 << 5) /**< \brief (US_CR) Receiver Disable */ -#define US_CR_TXEN (0x1 << 6) /**< \brief (US_CR) Transmitter Enable */ -#define US_CR_TXDIS (0x1 << 7) /**< \brief (US_CR) Transmitter Disable */ -#define US_CR_RSTSTA (0x1 << 8) /**< \brief (US_CR) Reset Status Bits */ -#define US_CR_STTBRK (0x1 << 9) /**< \brief (US_CR) Start Break */ -#define US_CR_STPBRK (0x1 << 10) /**< \brief (US_CR) Stop Break */ -#define US_CR_STTTO (0x1 << 11) /**< \brief (US_CR) Start Time-out */ -#define US_CR_SENDA (0x1 << 12) /**< \brief (US_CR) Send Address */ -#define US_CR_RSTIT (0x1 << 13) /**< \brief (US_CR) Reset Iterations */ -#define US_CR_RSTNACK (0x1 << 14) /**< \brief (US_CR) Reset Non Acknowledge */ -#define US_CR_RETTO (0x1 << 15) /**< \brief (US_CR) Rearm Time-out */ -#define US_CR_DTREN (0x1 << 16) /**< \brief (US_CR) Data Terminal Ready Enable */ -#define US_CR_DTRDIS (0x1 << 17) /**< \brief (US_CR) Data Terminal Ready Disable */ -#define US_CR_RTSEN__FCS (0x1 << 18) /**< \brief (US_CR) Request to Send Enable/Force SPI Chip Select */ -#define US_CR_RTSDIS__RCS (0x1 << 19) /**< \brief (US_CR) Request to Send Disable/Release SPI Chip Select */ -/* -------- US_MR : (USART Offset: 0x0004) Mode Register -------- */ -#define US_MR_USART_MODE (0xf << 0) /**< \brief (US_MR) */ -#define US_MR_USART_MODE_NORMAL (0x0) /**< (USART) Normal*/ -#define US_MR_USART_MODE_RS485 (0x1) /**< (USART) RS485*/ -#define US_MR_USART_MODE_HWHSH (0x2) /**< (USART) Hardware Handshaking*/ -#define US_MR_USART_MODE_ISO7816_0 (0x4) /**< (USART) ISO7816 protocol: T = 0*/ -#define US_MR_USART_MODE_ISO7816_1 (0x6) /**< (USART) ISO7816 protocol: T = 1*/ -#define US_MR_USART_MODE_IRDA (0x8) /**< (USART) IrDA*/ -#define US_MR_USART_MODE_SPIM (0xE) /**< (USART) SPI Master*/ -#define US_MR_USART_MODE_SPIS (0xF) /**< (USART) SPI Slave*/ -#define US_MR_USCLKS (0x3 << 4) /**< \brief (US_MR) Clock Selection */ -#define US_MR_USCLKS_CLOCK (0x0 << 4) /**< (USART) MCK*/ -#define US_MR_USCLKS_FDIV1 (0x1 << 4) /**< (USART) MCK/DIV(DIV=8)*/ -#define US_MR_USCLKS_SLOW (0x2 << 4) /**< (USART) Reserved*/ -#define US_MR_USCLKS_EXT (0x3 << 4) /**< (USART) SCK*/ -#define US_MR_CHRL (0x3 << 6) /**< \brief (US_MR) Character Length. */ -#define US_MR_CHRL_5_BITS (0x0 << 6) /**< (USART) Character Length: 5 bits*/ -#define US_MR_CHRL_6_BITS (0x1 << 6) /**< (USART) Character Length: 6 bits*/ -#define US_MR_CHRL_7_BITS (0x2 << 6) /**< (USART) Character Length: 7 bits*/ -#define US_MR_CHRL_8_BITS (0x3 << 6) /**< (USART) Character Length: 8 bits*/ -#define US_MR_SYNC__CPHA (0x1 << 8) /**< \brief (US_MR) Synchronous Mode Select or SPI Clock Phase */ -#define US_MR_PAR (0x7 << 9) /**< \brief (US_MR) Parity Type */ -#define US_MR_PAR_EVEN (0x0 << 9) /**< (USART) Even Parity*/ -#define US_MR_PAR_ODD (0x1 << 9) /**< (USART) Odd Parity*/ -#define US_MR_PAR_SPACE (0x2 << 9) /**< (USART) Parity forced to 0 (Space)*/ -#define US_MR_PAR_MARK (0x3 << 9) /**< (USART) Parity forced to 1 (Mark)*/ -#define US_MR_PAR_NONE (0x4 << 9) /**< (USART) No Parity*/ -#define US_MR_PAR_MULTI_DROP (0x6 << 9) /**< (USART) Multi-drop mode*/ -#define US_MR_NBSTOP (0x3 << 12) /**< \brief (US_MR) Number of Stop Bits */ -#define US_MR_NBSTOP_1_BIT (0x0 << 12) /**< (USART) 1 stop bit*/ -#define US_MR_NBSTOP_15_BIT (0x1 << 12) /**< (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits*/ -#define US_MR_NBSTOP_2_BIT (0x2 << 12) /**< (USART) 2 stop bits*/ -#define US_MR_CHMODE (0x3 << 14) /**< \brief (US_MR) Channel Mode */ -#define US_MR_CHMODE_NORMAL (0x0 << 14) /**< (USART) Normal Mode: The USART channel operates as an RX/TX USART.*/ -#define US_MR_CHMODE_AUTO (0x1 << 14) /**< (USART) Automatic Echo: Receiver Data Input is connected to the TXD pin.*/ -#define US_MR_CHMODE_LOCAL (0x2 << 14) /**< (USART) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.*/ -#define US_MR_CHMODE_REMOTE (0x3 << 14) /**< (USART) Remote Loopback: RXD pin is internally connected to TXD pin.*/ -#define US_MR_MSBF__CPOL (0x1 << 16) /**< \brief (US_MR) Bit Order or SPI Clock Polarity */ -#define US_MR_MODE9 (0x1 << 17) /**< \brief (US_MR) 9-bit Character Length */ -#define US_MR_CLKO (0x1 << 18) /**< \brief (US_MR) Clock Output Select */ -#define US_MR_OVER (0x1 << 19) /**< \brief (US_MR) Oversampling Mode */ -#define US_MR_INACK (0x1 << 20) /**< \brief (US_MR) Inhibit Non Acknowledge */ -#define US_MR_DSNACK (0x1 << 21) /**< \brief (US_MR) Disable Successive NACK */ -#define US_MR_VAR_SYNC (0x1 << 22) /**< \brief (US_MR) Variable Synchronization of Command/Data Sync Start Frame Delimiter */ -#define US_MR_INVDATA (0x1 << 23) /**< \brief (US_MR) INverted Data */ -#define US_MR_MAX_ITERATION (0x7 << 24) /**< \brief (US_MR) */ -#define US_MR_FILTER (0x1 << 28) /**< \brief (US_MR) Infrared Receive Line Filter */ -#define US_MR_MAN (0x1 << 29) /**< \brief (US_MR) Manchester Encoder/Decoder Enable */ -#define US_MR_MODSYNC_ (0x1 << 30) /**< \brief (US_MR) */ -#define US_MR_ONEBIT (0x1 << 31) /**< \brief (US_MR) Start Frame Delimiter Selector */ -/* -------- US_IER : (USART Offset: 0x0008) Interrupt Enable Register -------- */ -#define US_IER_RXRDY (0x1 << 0) /**< \brief (US_IER) RXRDY Interrupt Enable */ -#define US_IER_TXRDY (0x1 << 1) /**< \brief (US_IER) TXRDY Interrupt Enable */ -#define US_IER_RXBRK (0x1 << 2) /**< \brief (US_IER) Receiver Break Interrupt Enable */ -#define US_IER_ENDRX (0x1 << 3) /**< \brief (US_IER) End of Receive Transfer Interrupt Enable */ -#define US_IER_ENDTX (0x1 << 4) /**< \brief (US_IER) End of Transmit Interrupt Enable */ -#define US_IER_OVRE (0x1 << 5) /**< \brief (US_IER) Overrun Error Interrupt Enable */ -#define US_IER_FRAME (0x1 << 6) /**< \brief (US_IER) Framing Error Interrupt Enable */ -#define US_IER_PARE (0x1 << 7) /**< \brief (US_IER) Parity Error Interrupt Enable */ -#define US_IER_TIMEOUT (0x1 << 8) /**< \brief (US_IER) Time-out Interrupt Enable */ -#define US_IER_TXEMPTY (0x1 << 9) /**< \brief (US_IER) TXEMPTY Interrupt Enable */ -#define US_IER_ITER__UNRE (0x1 << 10) /**< \brief (US_IER) Iteration or SPI Underrun Error Interrupt Enable */ -#define US_IER_TXBUFE (0x1 << 11) /**< \brief (US_IER) Buffer Empty Interrupt Enable */ -#define US_IER_RXBUFF (0x1 << 12) /**< \brief (US_IER) Buffer Full Interrupt Enable */ -#define US_IER_NACK (0x1 << 13) /**< \brief (US_IER) Non Acknowledge Interrupt Enable */ -#define US_IER_RIIC (0x1 << 16) /**< \brief (US_IER) Ring Indicator Input Change Enable */ -#define US_IER_DSRIC (0x1 << 17) /**< \brief (US_IER) Data Set Ready Input Change Enable */ -#define US_IER_DCDIC (0x1 << 18) /**< \brief (US_IER) Data Carrier Detect Input Change Interrupt Enable */ -#define US_IER_CTSIC (0x1 << 19) /**< \brief (US_IER) Clear to Send Input Change Interrupt Enable */ -#define US_IER_MANE (0x1 << 24) /**< \brief (US_IER) Manchester Error Interrupt Enable */ -/* -------- US_IDR : (USART Offset: 0x000C) Interrupt Disable Register -------- */ -#define US_IDR_RXRDY (0x1 << 0) /**< \brief (US_IDR) RXRDY Interrupt Disable */ -#define US_IDR_TXRDY (0x1 << 1) /**< \brief (US_IDR) TXRDY Interrupt Disable */ -#define US_IDR_RXBRK (0x1 << 2) /**< \brief (US_IDR) Receiver Break Interrupt Disable */ -#define US_IDR_ENDRX (0x1 << 3) /**< \brief (US_IDR) End of Receive Transfer Interrupt Disable */ -#define US_IDR_ENDTX (0x1 << 4) /**< \brief (US_IDR) End of Transmit Interrupt Disable */ -#define US_IDR_OVRE (0x1 << 5) /**< \brief (US_IDR) Overrun Error Interrupt Disable */ -#define US_IDR_FRAME (0x1 << 6) /**< \brief (US_IDR) Framing Error Interrupt Disable */ -#define US_IDR_PARE (0x1 << 7) /**< \brief (US_IDR) Parity Error Interrupt Disable */ -#define US_IDR_TIMEOUT (0x1 << 8) /**< \brief (US_IDR) Time-out Interrupt Disable */ -#define US_IDR_TXEMPTY (0x1 << 9) /**< \brief (US_IDR) TXEMPTY Interrupt Disable */ -#define US_IDR_ITER__UNRE (0x1 << 10) /**< \brief (US_IDR) Iteration or SPI Underrun Error Interrupt Enable */ -#define US_IDR_TXBUFE (0x1 << 11) /**< \brief (US_IDR) Buffer Empty Interrupt Disable */ -#define US_IDR_RXBUFF (0x1 << 12) /**< \brief (US_IDR) Buffer Full Interrupt Disable */ -#define US_IDR_NACK (0x1 << 13) /**< \brief (US_IDR) Non Acknowledge Interrupt Disable */ -#define US_IDR_RIIC (0x1 << 16) /**< \brief (US_IDR) Ring Indicator Input Change Disable */ -#define US_IDR_DSRIC (0x1 << 17) /**< \brief (US_IDR) Data Set Ready Input Change Disable */ -#define US_IDR_DCDIC (0x1 << 18) /**< \brief (US_IDR) Data Carrier Detect Input Change Interrupt Disable */ -#define US_IDR_CTSIC (0x1 << 19) /**< \brief (US_IDR) Clear to Send Input Change Interrupt Disable */ -#define US_IDR_MANE (0x1 << 24) /**< \brief (US_IDR) Manchester Error Interrupt Disable */ -/* -------- US_IMR : (USART Offset: 0x0010) Interrupt Mask Register -------- */ -#define US_IMR_RXRDY (0x1 << 0) /**< \brief (US_IMR) RXRDY Interrupt Mask */ -#define US_IMR_TXRDY (0x1 << 1) /**< \brief (US_IMR) TXRDY Interrupt Mask */ -#define US_IMR_RXBRK (0x1 << 2) /**< \brief (US_IMR) Receiver Break Interrupt Mask */ -#define US_IMR_ENDRX (0x1 << 3) /**< \brief (US_IMR) End of Receive Transfer Interrupt Mask */ -#define US_IMR_ENDTX (0x1 << 4) /**< \brief (US_IMR) End of Transmit Interrupt Mask */ -#define US_IMR_OVRE (0x1 << 5) /**< \brief (US_IMR) Overrun Error Interrupt Mask */ -#define US_IMR_FRAME (0x1 << 6) /**< \brief (US_IMR) Framing Error Interrupt Mask */ -#define US_IMR_PARE (0x1 << 7) /**< \brief (US_IMR) Parity Error Interrupt Mask */ -#define US_IMR_TIMEOUT (0x1 << 8) /**< \brief (US_IMR) Time-out Interrupt Mask */ -#define US_IMR_TXEMPTY (0x1 << 9) /**< \brief (US_IMR) TXEMPTY Interrupt Mask */ -#define US_IMR_ITER__UNRE (0x1 << 10) /**< \brief (US_IMR) Iteration or SPI Underrun Error Interrupt Enable */ -#define US_IMR_TXBUFE (0x1 << 11) /**< \brief (US_IMR) Buffer Empty Interrupt Mask */ -#define US_IMR_RXBUFF (0x1 << 12) /**< \brief (US_IMR) Buffer Full Interrupt Mask */ -#define US_IMR_NACK (0x1 << 13) /**< \brief (US_IMR) Non Acknowledge Interrupt Mask */ -#define US_IMR_RIIC (0x1 << 16) /**< \brief (US_IMR) Ring Indicator Input Change Mask */ -#define US_IMR_DSRIC (0x1 << 17) /**< \brief (US_IMR) Data Set Ready Input Change Mask */ -#define US_IMR_DCDIC (0x1 << 18) /**< \brief (US_IMR) Data Carrier Detect Input Change Interrupt Mask */ -#define US_IMR_CTSIC (0x1 << 19) /**< \brief (US_IMR) Clear to Send Input Change Interrupt Mask */ -#define US_IMR_MANE (0x1 << 24) /**< \brief (US_IMR) Manchester Error Interrupt Mask */ -/* -------- US_CSR : (USART Offset: 0x0014) Channel Status Register -------- */ -#define US_CSR_RXRDY (0x1 << 0) /**< \brief (US_CSR) Receiver Ready */ -#define US_CSR_TXRDY (0x1 << 1) /**< \brief (US_CSR) Transmitter Ready */ -#define US_CSR_RXBRK (0x1 << 2) /**< \brief (US_CSR) Break Received/End of Break */ -#define US_CSR_ENDRX (0x1 << 3) /**< \brief (US_CSR) End of Receiver Transfer */ -#define US_CSR_ENDTX (0x1 << 4) /**< \brief (US_CSR) End of Transmitter Transfer */ -#define US_CSR_OVRE (0x1 << 5) /**< \brief (US_CSR) Overrun Error */ -#define US_CSR_FRAME (0x1 << 6) /**< \brief (US_CSR) Framing Error */ -#define US_CSR_PARE (0x1 << 7) /**< \brief (US_CSR) Parity Error */ -#define US_CSR_TIMEOUT (0x1 << 8) /**< \brief (US_CSR) Receiver Time-out */ -#define US_CSR_TXEMPTY (0x1 << 9) /**< \brief (US_CSR) Transmitter Empty */ -#define US_CSR_ITER__UNRE (0x1 << 10) /**< \brief (US_CSR) Max number of Repetitions Reached or SPI Underrun Error */ -#define US_CSR_TXBUFE (0x1 << 11) /**< \brief (US_CSR) Transmission Buffer Empty */ -#define US_CSR_RXBUFF (0x1 << 12) /**< \brief (US_CSR) Reception Buffer Full */ -#define US_CSR_NACK (0x1 << 13) /**< \brief (US_CSR) */ -#define US_CSR_RIIC (0x1 << 16) /**< \brief (US_CSR) Ring Indicator Input Change Flag */ -#define US_CSR_DSRIC (0x1 << 17) /**< \brief (US_CSR) Data Set Ready Input Change Flag */ -#define US_CSR_DCDIC (0x1 << 18) /**< \brief (US_CSR) Data Carrier Detect Input Change Flag */ -#define US_CSR_CTSIC (0x1 << 19) /**< \brief (US_CSR) Clear to Send Input Change Flag */ -#define US_CSR_RI (0x1 << 20) /**< \brief (US_CSR) Image of RI Input */ -#define US_CSR_DSR (0x1 << 21) /**< \brief (US_CSR) Image of DSR Input */ -#define US_CSR_DCD (0x1 << 22) /**< \brief (US_CSR) Image of DCD Input */ -#define US_CSR_CTS (0x1 << 23) /**< \brief (US_CSR) Image of CTS Input */ -#define US_CSR_MANERR (0x1 << 24) /**< \brief (US_CSR) Manchester Error */ -/* -------- US_RHR : (USART Offset: 0x0018) Receiver Holding Register -------- */ -#define US_RHR_RXCHR (0x1ff << 0) /**< \brief (US_RHR) Received Character */ -#define US_RHR_RXSYNH (0x1 << 15) /**< \brief (US_RHR) Received Sync */ -/* -------- US_THR : (USART Offset: 0x001C) Transmitter Holding Register -------- */ -#define US_THR_TXCHR (0x1ff << 0) /**< \brief (US_THR) Character to be Transmitted */ -#define US_THR_TXSYNH (0x1 << 15) /**< \brief (US_THR) Sync Field to be transmitted */ -/* -------- US_BRGR : (USART Offset: 0x0020) Baud Rate Generator Register -------- */ -#define US_BRGR_CD (0xffff << 0) /**< \brief (US_BRGR) Clock Divider */ -#define US_BRGR_FP (0x7 << 16) /**< \brief (US_BRGR) Fractional Part */ -/* -------- US_RTOR : (USART Offset: 0x0024) Receiver Time-out Register -------- */ -#define US_RTOR_TO (0xffff << 0) /**< \brief (US_RTOR) Time-out Value */ -/* -------- US_TTGR : (USART Offset: 0x0028) Transmitter Timeguard Register -------- */ -#define US_TTGR_TG (0xff << 0) /**< \brief (US_TTGR) Timeguard Value */ -/* -------- US_FIDI : (USART Offset: 0x0040) FI DI Ratio Register -------- */ -#define US_FIDI_FI_DI_RATIO (0x7ff << 0) /**< \brief (US_FIDI) FI Over DI Ratio Value */ -/* -------- US_NER : (USART Offset: 0x0044) Number of Errors Register -------- */ -#define US_NER_NB_ERRORS (0xff << 0) /**< \brief (US_NER) Number of Errors */ -/* -------- US_IF : (USART Offset: 0x004C) IrDA Filter Register -------- */ -#define US_IF_IRDA_FILTER (0xff << 0) /**< \brief (US_IF) IrDA Filter */ -/* -------- US_MAN : (USART Offset: 0x0050) Manchester Encoder Decoder Register -------- */ -#define US_MAN_TX_PL (0xf << 0) /**< \brief (US_MAN) Transmitter Preamble Length */ -#define US_MAN_TX_PP (0x3 << 8) /**< \brief (US_MAN) Transmitter Preamble Pattern */ -#define US_MAN_TX_MPOL (0x1 << 12) /**< \brief (US_MAN) Transmitter Manchester Polarity */ -#define US_MAN_RX_PL (0xf << 16) /**< \brief (US_MAN) Receiver Preamble Length */ -#define US_MAN_RX_PP (0x3 << 24) /**< \brief (US_MAN) Receiver Preamble Pattern detected */ -#define US_MAN_RX_MPOL (0x1 << 28) /**< \brief (US_MAN) Receiver Manchester Polarity */ -#define US_MAN_STUCKTO1 (0x1 << 29) /**< \brief (US_MAN) */ -#define US_MAN_DRIFT (0x1 << 30) /**< \brief (US_MAN) Drift compensation */ -/* -------- US_WPMR : (USART Offset: 0xE4) Write Protect Mode Register -------- */ -#define US_WPMR_WPEN (0x1 << 0) /**< \brief (US_WPMR) Write Protect Enable */ -#define US_WPMR_WPKEY (0xffffff << 8) /**< \brief (US_WPMR) Write Protect KEY */ -/* -------- US_WPSR : (USART Offset: 0xE8) Write Protect Status Register -------- */ -#define US_WPSR_WPVS (0x1 << 0) /**< \brief (US_WPSR) Write Protect Violation Status */ -#define US_WPSR_WPVSRC (0xffff << 8) /**< \brief (US_WPSR) Write Protect Violation Source */ -/* -------- US_VERSION : (USART Offset: 0xFC) Version Register -------- */ -#define US_VERSION_VERSION (0xfff << 0) /**< \brief (US_VERSION) */ -#define US_VERSION_MFN (0x7 << 16) /**< \brief (US_VERSION) */ -/* -------- US_RPR : (USART Offset: 0x100) Receive Pointer Register -------- */ -#define US_RPR_RXPTR (0xffffffff << 0) /**< \brief (US_RPR) Receive Pointer Register */ -/* -------- US_RCR : (USART Offset: 0x104) Receive Counter Register -------- */ -#define US_RCR_RXCTR (0xffff << 0) /**< \brief (US_RCR) Receive Counter Register */ -/* -------- US_TPR : (USART Offset: 0x108) Transmit Pointer Register -------- */ -#define US_TPR_TXPTR (0xffffffff << 0) /**< \brief (US_TPR) Transmit Counter Register */ -/* -------- US_TCR : (USART Offset: 0x10C) Transmit Counter Register -------- */ -#define US_TCR_TXCTR (0xffff << 0) /**< \brief (US_TCR) Transmit Counter Register */ -/* -------- US_RNPR : (USART Offset: 0x110) Receive Next Pointer Register -------- */ -#define US_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (US_RNPR) Receive Next Pointer */ -/* -------- US_RNCR : (USART Offset: 0x114) Receive Next Counter Register -------- */ -#define US_RNCR_RXNCTR (0xffff << 0) /**< \brief (US_RNCR) Receive Next Counter */ -/* -------- US_TNPR : (USART Offset: 0x118) Transmit Next Pointer Register -------- */ -#define US_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (US_TNPR) Transmit Next Pointer */ -/* -------- US_TNCR : (USART Offset: 0x11C) Transmit Next Counter Register -------- */ -#define US_TNCR_TXNCTR (0xffff << 0) /**< \brief (US_TNCR) Transmit Counter Next */ -/* -------- US_PTCR : (USART Offset: 0x120) Transfer Control Register -------- */ -#define US_PTCR_RXTEN (0x1 << 0) /**< \brief (US_PTCR) Receiver Transfer Enable */ -#define US_PTCR_RXTDIS (0x1 << 1) /**< \brief (US_PTCR) Receiver Transfer Disable */ -#define US_PTCR_TXTEN (0x1 << 8) /**< \brief (US_PTCR) Transmitter Transfer Enable */ -#define US_PTCR_TXTDIS (0x1 << 9) /**< \brief (US_PTCR) Transmitter Transfer Disable */ -/* -------- US_PTSR : (USART Offset: 0x124) Transfer Status Register -------- */ -#define US_PTSR_RXTEN (0x1 << 0) /**< \brief (US_PTSR) Receiver Transfer Enable */ -#define US_PTSR_TXTEN (0x1 << 8) /**< \brief (US_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Watchdog Timer */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_WDT Watchdog Timer */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Wdt hardware registers */ -typedef struct { - WoReg WDT_CR; /**< \brief (Wdt Offset: 0x00) Control Register */ - RwReg WDT_MR; /**< \brief (Wdt Offset: 0x04) Mode Register */ - RoReg WDT_SR; /**< \brief (Wdt Offset: 0x08) Status Register */ -} Wdt; -#endif /* __ASSEMBLY__ */ -/* -------- WDT_CR : (WDT Offset: 0x00) Control Register -------- */ -#define WDT_CR_WDRSTT (0x1 << 0) /**< \brief (WDT_CR) Watchdog Restart */ -#define WDT_CR_KEY (0xff << 24) /**< \brief (WDT_CR) Password */ -/* -------- WDT_MR : (WDT Offset: 0x04) Mode Register -------- */ -#define WDT_MR_WDV (0xfff << 0) /**< \brief (WDT_MR) Watchdog Counter Value */ -#define WDT_MR_WDFIEN (0x1 << 12) /**< \brief (WDT_MR) Watchdog Fault Interrupt Enable */ -#define WDT_MR_WDRSTEN (0x1 << 13) /**< \brief (WDT_MR) Watchdog Reset Enable */ -#define WDT_MR_WDRPROC (0x1 << 14) /**< \brief (WDT_MR) Watchdog Reset Processor */ -#define WDT_MR_WDDIS (0x1 << 15) /**< \brief (WDT_MR) Watchdog Disable */ -#define WDT_MR_WDD (0xfff << 16) /**< \brief (WDT_MR) Watchdog Delta Value */ -#define WDT_MR_WDDBGHLT (0x1 << 28) /**< \brief (WDT_MR) Watchdog Debug Halt */ -#define WDT_MR_WDIDLEHLT (0x1 << 29) /**< \brief (WDT_MR) Watchdog Idle Halt */ -/* -------- WDT_SR : (WDT Offset: 0x08) Status Register -------- */ -#define WDT_SR_WDUNF (0x1 << 0) /**< \brief (WDT_SR) Watchdog Underflow */ -#define WDT_SR_WDERR (0x1 << 1) /**< \brief (WDT_SR) Watchdog Error */ - -/*@}*/ - -/*@}*/ - -/* ***************************************************************************** */ -/* REGISTER ACCESS DEFINITIONS FOR AT91SAM3S */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3S_reg Registers Access Definitions */ -/*@{*/ - -/* ========== Register definition for HSMCI peripheral ========== */ -#define REG_HSMCI_CR REG_ACCESS(WoReg, 0x40000000U) /**< \brief (HSMCI) Control Register */ -#define REG_HSMCI_MR REG_ACCESS(RwReg, 0x40000004U) /**< \brief (HSMCI) Mode Register */ -#define REG_HSMCI_DTOR REG_ACCESS(RwReg, 0x40000008U) /**< \brief (HSMCI) Data Timeout Register */ -#define REG_HSMCI_SDCR REG_ACCESS(RwReg, 0x4000000CU) /**< \brief (HSMCI) SD/SDIO Card Register */ -#define REG_HSMCI_ARGR REG_ACCESS(RwReg, 0x40000010U) /**< \brief (HSMCI) Argument Register */ -#define REG_HSMCI_CMDR REG_ACCESS(WoReg, 0x40000014U) /**< \brief (HSMCI) Command Register */ -#define REG_HSMCI_BLKR REG_ACCESS(RwReg, 0x40000018U) /**< \brief (HSMCI) Block Register */ -#define REG_HSMCI_CSTOR REG_ACCESS(RwReg, 0x4000001CU) /**< \brief (HSMCI) Completion Signal Timeout Register */ -#define REG_HSMCI_RSPR REG_ACCESS(RoReg, 0x40000020U) /**< \brief (HSMCI) Response Register */ -#define REG_HSMCI_RDR REG_ACCESS(RoReg, 0x40000030U) /**< \brief (HSMCI) Receive Data Register */ -#define REG_HSMCI_TDR REG_ACCESS(WoReg, 0x40000034U) /**< \brief (HSMCI) Transmit Data Register */ -#define REG_HSMCI_SR REG_ACCESS(RoReg, 0x40000040U) /**< \brief (HSMCI) Status Register */ -#define REG_HSMCI_IER REG_ACCESS(WoReg, 0x40000044U) /**< \brief (HSMCI) Interrupt Enable Register */ -#define REG_HSMCI_IDR REG_ACCESS(WoReg, 0x40000048U) /**< \brief (HSMCI) Interrupt Disable Register */ -#define REG_HSMCI_IMR REG_ACCESS(RoReg, 0x4000004CU) /**< \brief (HSMCI) Interrupt Mask Register */ -#define REG_HSMCI_CFG REG_ACCESS(RwReg, 0x40000054U) /**< \brief (HSMCI) Configuration Register */ -#define REG_HSMCI_WPMR REG_ACCESS(RwReg, 0x400000E4U) /**< \brief (HSMCI) Write Protection Mode Register */ -#define REG_HSMCI_WPSR REG_ACCESS(RoReg, 0x400000E8U) /**< \brief (HSMCI) Write Protection Status Register */ -#define REG_HSMCI_RPR REG_ACCESS(RwReg, 0x40000100U) /**< \brief (HSMCI) Receive Pointer Register */ -#define REG_HSMCI_RCR REG_ACCESS(RwReg, 0x40000104U) /**< \brief (HSMCI) Receive Counter Register */ -#define REG_HSMCI_TPR REG_ACCESS(RwReg, 0x40000108U) /**< \brief (HSMCI) Transmit Pointer Register */ -#define REG_HSMCI_TCR REG_ACCESS(RwReg, 0x4000010CU) /**< \brief (HSMCI) Transmit Counter Register */ -#define REG_HSMCI_RNPR REG_ACCESS(RwReg, 0x40000110U) /**< \brief (HSMCI) Receive Next Pointer Register */ -#define REG_HSMCI_RNCR REG_ACCESS(RwReg, 0x40000114U) /**< \brief (HSMCI) Receive Next Counter Register */ -#define REG_HSMCI_TNPR REG_ACCESS(RwReg, 0x40000118U) /**< \brief (HSMCI) Transmit Next Pointer Register */ -#define REG_HSMCI_TNCR REG_ACCESS(RwReg, 0x4000011CU) /**< \brief (HSMCI) Transmit Next Counter Register */ -#define REG_HSMCI_PTCR REG_ACCESS(WoReg, 0x40000120U) /**< \brief (HSMCI) Transfer Control Register */ -#define REG_HSMCI_PTSR REG_ACCESS(RoReg, 0x40000124U) /**< \brief (HSMCI) Transfer Status Register */ -/* ========== Register definition for SSC peripheral ========== */ -#define REG_SSC_CR REG_ACCESS(WoReg, 0x40004000U) /**< \brief (SSC) Control Register */ -#define REG_SSC_CMR REG_ACCESS(RwReg, 0x40004004U) /**< \brief (SSC) Clock Mode Register */ -#define REG_SSC_RCMR REG_ACCESS(RwReg, 0x40004010U) /**< \brief (SSC) Receive Clock Mode Register */ -#define REG_SSC_RFMR REG_ACCESS(RwReg, 0x40004014U) /**< \brief (SSC) Receive Frame Mode Register */ -#define REG_SSC_TCMR REG_ACCESS(RwReg, 0x40004018U) /**< \brief (SSC) Transmit Clock Mode Register */ -#define REG_SSC_TFMR REG_ACCESS(RwReg, 0x4000401CU) /**< \brief (SSC) Transmit Frame Mode Register */ -#define REG_SSC_RHR REG_ACCESS(RoReg, 0x40004020U) /**< \brief (SSC) Receive Holding Register */ -#define REG_SSC_THR REG_ACCESS(WoReg, 0x40004024U) /**< \brief (SSC) Transmit Holding Register */ -#define REG_SSC_RSHR REG_ACCESS(RoReg, 0x40004030U) /**< \brief (SSC) Receive Sync. Holding Register */ -#define REG_SSC_TSHR REG_ACCESS(RwReg, 0x40004034U) /**< \brief (SSC) Transmit Sync. Holding Register */ -#define REG_SSC_RC0R REG_ACCESS(RwReg, 0x40004038U) /**< \brief (SSC) Receive Compare 0 Register */ -#define REG_SSC_RC1R REG_ACCESS(RwReg, 0x4000403CU) /**< \brief (SSC) Receive Compare 1 Register */ -#define REG_SSC_SR REG_ACCESS(RoReg, 0x40004040U) /**< \brief (SSC) Status Register */ -#define REG_SSC_IER REG_ACCESS(WoReg, 0x40004044U) /**< \brief (SSC) Interrupt Enable Register */ -#define REG_SSC_IDR REG_ACCESS(WoReg, 0x40004048U) /**< \brief (SSC) Interrupt Disable Register */ -#define REG_SSC_IMR REG_ACCESS(RoReg, 0x4000404CU) /**< \brief (SSC) Interrupt Mask Register */ -#define REG_SSC_WPMR REG_ACCESS(RwReg, 0x400040E4U) /**< \brief (SSC) Write Protect Mode Register */ -#define REG_SSC_WPSR REG_ACCESS(RoReg, 0x400040E8U) /**< \brief (SSC) Write Protect Status Register */ -#define REG_SSC_RPR REG_ACCESS(RwReg, 0x40004100U) /**< \brief (SSC) Receive Pointer Register */ -#define REG_SSC_RCR REG_ACCESS(RwReg, 0x40004104U) /**< \brief (SSC) Receive Counter Register */ -#define REG_SSC_TPR REG_ACCESS(RwReg, 0x40004108U) /**< \brief (SSC) Transmit Pointer Register */ -#define REG_SSC_TCR REG_ACCESS(RwReg, 0x4000410CU) /**< \brief (SSC) Transmit Counter Register */ -#define REG_SSC_RNPR REG_ACCESS(RwReg, 0x40004110U) /**< \brief (SSC) Receive Next Pointer Register */ -#define REG_SSC_RNCR REG_ACCESS(RwReg, 0x40004114U) /**< \brief (SSC) Receive Next Counter Register */ -#define REG_SSC_TNPR REG_ACCESS(RwReg, 0x40004118U) /**< \brief (SSC) Transmit Next Pointer Register */ -#define REG_SSC_TNCR REG_ACCESS(RwReg, 0x4000411CU) /**< \brief (SSC) Transmit Next Counter Register */ -#define REG_SSC_PTCR REG_ACCESS(WoReg, 0x40004120U) /**< \brief (SSC) Transfer Control Register */ -#define REG_SSC_PTSR REG_ACCESS(RoReg, 0x40004124U) /**< \brief (SSC) Transfer Status Register */ -/* ========== Register definition for SPI peripheral ========== */ -#define REG_SPI_CR REG_ACCESS(WoReg, 0x40008000U) /**< \brief (SPI) Control Register */ -#define REG_SPI_MR REG_ACCESS(RwReg, 0x40008004U) /**< \brief (SPI) Mode Register */ -#define REG_SPI_RDR REG_ACCESS(RoReg, 0x40008008U) /**< \brief (SPI) Receive Data Register */ -#define REG_SPI_TDR REG_ACCESS(WoReg, 0x4000800CU) /**< \brief (SPI) Transmit Data Register */ -#define REG_SPI_SR REG_ACCESS(RoReg, 0x40008010U) /**< \brief (SPI) Status Register */ -#define REG_SPI_IER REG_ACCESS(WoReg, 0x40008014U) /**< \brief (SPI) Interrupt Enable Register */ -#define REG_SPI_IDR REG_ACCESS(WoReg, 0x40008018U) /**< \brief (SPI) Interrupt Disable Register */ -#define REG_SPI_IMR REG_ACCESS(RoReg, 0x4000801CU) /**< \brief (SPI) Interrupt Mask Register */ -#define REG_SPI_CSR REG_ACCESS(RwReg, 0x40008030U) /**< \brief (SPI) Chip Select Register */ -#define REG_SPI_WPMR REG_ACCESS(RwReg, 0x400080E4U) /**< \brief (SPI) Write Protection Control Register */ -#define REG_SPI_WPSR REG_ACCESS(RoReg, 0x400080E8U) /**< \brief (SPI) Write Protection Status Register */ -#define REG_SPI_RPR REG_ACCESS(RwReg, 0x40008100U) /**< \brief (SPI) Receive Pointer Register */ -#define REG_SPI_RCR REG_ACCESS(RwReg, 0x40008104U) /**< \brief (SPI) Receive Counter Register */ -#define REG_SPI_TPR REG_ACCESS(RwReg, 0x40008108U) /**< \brief (SPI) Transmit Pointer Register */ -#define REG_SPI_TCR REG_ACCESS(RwReg, 0x4000810CU) /**< \brief (SPI) Transmit Counter Register */ -#define REG_SPI_RNPR REG_ACCESS(RwReg, 0x40008110U) /**< \brief (SPI) Receive Next Pointer Register */ -#define REG_SPI_RNCR REG_ACCESS(RwReg, 0x40008114U) /**< \brief (SPI) Receive Next Counter Register */ -#define REG_SPI_TNPR REG_ACCESS(RwReg, 0x40008118U) /**< \brief (SPI) Transmit Next Pointer Register */ -#define REG_SPI_TNCR REG_ACCESS(RwReg, 0x4000811CU) /**< \brief (SPI) Transmit Next Counter Register */ -#define REG_SPI_PTCR REG_ACCESS(WoReg, 0x40008120U) /**< \brief (SPI) Transfer Control Register */ -#define REG_SPI_PTSR REG_ACCESS(RoReg, 0x40008124U) /**< \brief (SPI) Transfer Status Register */ -/* ========== Register definition for TC0 peripheral ========== */ -#define REG_TC0_CCR0 REG_ACCESS(WoReg, 0x40010000U) /**< \brief (TC0) Channel Control Register (channel = 0) */ -#define REG_TC0_CMR0 REG_ACCESS(RwReg, 0x40010004U) /**< \brief (TC0) Channel Mode Register (channel = 0) */ -#define REG_TC0_CV0 REG_ACCESS(RoReg, 0x40010010U) /**< \brief (TC0) Counter Value (channel = 0) */ -#define REG_TC0_RA0 REG_ACCESS(RwReg, 0x40010014U) /**< \brief (TC0) Register A (channel = 0) */ -#define REG_TC0_RB0 REG_ACCESS(RwReg, 0x40010018U) /**< \brief (TC0) Register B (channel = 0) */ -#define REG_TC0_RC0 REG_ACCESS(RwReg, 0x4001001CU) /**< \brief (TC0) Register C (channel = 0) */ -#define REG_TC0_SR0 REG_ACCESS(RoReg, 0x40010020U) /**< \brief (TC0) Status Register (channel = 0) */ -#define REG_TC0_IER0 REG_ACCESS(WoReg, 0x40010024U) /**< \brief (TC0) Interrupt Enable Register (channel = 0) */ -#define REG_TC0_IDR0 REG_ACCESS(WoReg, 0x40010028U) /**< \brief (TC0) Interrupt Disable Register (channel = 0) */ -#define REG_TC0_IMR0 REG_ACCESS(RoReg, 0x4001002CU) /**< \brief (TC0) Interrupt Mask Register (channel = 0) */ -#define REG_TC0_CCR1 REG_ACCESS(WoReg, 0x40010040U) /**< \brief (TC0) Channel Control Register (channel = 1) */ -#define REG_TC0_CMR1 REG_ACCESS(RwReg, 0x40010044U) /**< \brief (TC0) Channel Mode Register (channel = 1) */ -#define REG_TC0_CV1 REG_ACCESS(RoReg, 0x40010050U) /**< \brief (TC0) Counter Value (channel = 1) */ -#define REG_TC0_RA1 REG_ACCESS(RwReg, 0x40010054U) /**< \brief (TC0) Register A (channel = 1) */ -#define REG_TC0_RB1 REG_ACCESS(RwReg, 0x40010058U) /**< \brief (TC0) Register B (channel = 1) */ -#define REG_TC0_RC1 REG_ACCESS(RwReg, 0x4001005CU) /**< \brief (TC0) Register C (channel = 1) */ -#define REG_TC0_SR1 REG_ACCESS(RoReg, 0x40010060U) /**< \brief (TC0) Status Register (channel = 1) */ -#define REG_TC0_IER1 REG_ACCESS(WoReg, 0x40010064U) /**< \brief (TC0) Interrupt Enable Register (channel = 1) */ -#define REG_TC0_IDR1 REG_ACCESS(WoReg, 0x40010068U) /**< \brief (TC0) Interrupt Disable Register (channel = 1) */ -#define REG_TC0_IMR1 REG_ACCESS(RoReg, 0x4001006CU) /**< \brief (TC0) Interrupt Mask Register (channel = 1) */ -#define REG_TC0_CCR2 REG_ACCESS(WoReg, 0x40010080U) /**< \brief (TC0) Channel Control Register (channel = 2) */ -#define REG_TC0_CMR2 REG_ACCESS(RwReg, 0x40010084U) /**< \brief (TC0) Channel Mode Register (channel = 2) */ -#define REG_TC0_CV2 REG_ACCESS(RoReg, 0x40010090U) /**< \brief (TC0) Counter Value (channel = 2) */ -#define REG_TC0_RA2 REG_ACCESS(RwReg, 0x40010094U) /**< \brief (TC0) Register A (channel = 2) */ -#define REG_TC0_RB2 REG_ACCESS(RwReg, 0x40010098U) /**< \brief (TC0) Register B (channel = 2) */ -#define REG_TC0_RC2 REG_ACCESS(RwReg, 0x4001009CU) /**< \brief (TC0) Register C (channel = 2) */ -#define REG_TC0_SR2 REG_ACCESS(RoReg, 0x400100A0U) /**< \brief (TC0) Status Register (channel = 2) */ -#define REG_TC0_IER2 REG_ACCESS(WoReg, 0x400100A4U) /**< \brief (TC0) Interrupt Enable Register (channel = 2) */ -#define REG_TC0_IDR2 REG_ACCESS(WoReg, 0x400100A8U) /**< \brief (TC0) Interrupt Disable Register (channel = 2) */ -#define REG_TC0_IMR2 REG_ACCESS(RoReg, 0x400100ACU) /**< \brief (TC0) Interrupt Mask Register (channel = 2) */ -#define REG_TC0_BCR REG_ACCESS(WoReg, 0x400100C0U) /**< \brief (TC0) Block Control Register */ -#define REG_TC0_BMR REG_ACCESS(RwReg, 0x400100C4U) /**< \brief (TC0) Block Mode Register */ -#define REG_TC0_QIER REG_ACCESS(WoReg, 0x400100C8U) /**< \brief (TC0) QDEC Interrupt Enable Register */ -#define REG_TC0_QIDR REG_ACCESS(WoReg, 0x400100CCU) /**< \brief (TC0) QDEC Interrupt Disable Register */ -#define REG_TC0_QIMR REG_ACCESS(RoReg, 0x400100D0U) /**< \brief (TC0) QDEC Interrupt Mask Register */ -#define REG_TC0_QISR REG_ACCESS(RoReg, 0x400100D4U) /**< \brief (TC0) QDEC Interrupt Status Register */ -#define REG_TC0_FMR REG_ACCESS(RwReg, 0x400100D8U) /**< \brief (TC0) Fault Mode Register */ -#define REG_TC0_WPMR REG_ACCESS(RwReg, 0x400100E4U) /**< \brief (TC0) Write Protect Mode Register */ -#define REG_TC0_VER REG_ACCESS(RoReg, 0x400100FCU) /**< \brief (TC0) Version Register */ -/* ========== Register definition for TC1 peripheral ========== */ -#define REG_TC1_CCR0 REG_ACCESS(WoReg, 0x40014000U) /**< \brief (TC1) Channel Control Register (channel = 0) */ -#define REG_TC1_CMR0 REG_ACCESS(RwReg, 0x40014004U) /**< \brief (TC1) Channel Mode Register (channel = 0) */ -#define REG_TC1_CV0 REG_ACCESS(RoReg, 0x40014010U) /**< \brief (TC1) Counter Value (channel = 0) */ -#define REG_TC1_RA0 REG_ACCESS(RwReg, 0x40014014U) /**< \brief (TC1) Register A (channel = 0) */ -#define REG_TC1_RB0 REG_ACCESS(RwReg, 0x40014018U) /**< \brief (TC1) Register B (channel = 0) */ -#define REG_TC1_RC0 REG_ACCESS(RwReg, 0x4001401CU) /**< \brief (TC1) Register C (channel = 0) */ -#define REG_TC1_SR0 REG_ACCESS(RoReg, 0x40014020U) /**< \brief (TC1) Status Register (channel = 0) */ -#define REG_TC1_IER0 REG_ACCESS(WoReg, 0x40014024U) /**< \brief (TC1) Interrupt Enable Register (channel = 0) */ -#define REG_TC1_IDR0 REG_ACCESS(WoReg, 0x40014028U) /**< \brief (TC1) Interrupt Disable Register (channel = 0) */ -#define REG_TC1_IMR0 REG_ACCESS(RoReg, 0x4001402CU) /**< \brief (TC1) Interrupt Mask Register (channel = 0) */ -#define REG_TC1_CCR1 REG_ACCESS(WoReg, 0x40014040U) /**< \brief (TC1) Channel Control Register (channel = 1) */ -#define REG_TC1_CMR1 REG_ACCESS(RwReg, 0x40014044U) /**< \brief (TC1) Channel Mode Register (channel = 1) */ -#define REG_TC1_CV1 REG_ACCESS(RoReg, 0x40014050U) /**< \brief (TC1) Counter Value (channel = 1) */ -#define REG_TC1_RA1 REG_ACCESS(RwReg, 0x40014054U) /**< \brief (TC1) Register A (channel = 1) */ -#define REG_TC1_RB1 REG_ACCESS(RwReg, 0x40014058U) /**< \brief (TC1) Register B (channel = 1) */ -#define REG_TC1_RC1 REG_ACCESS(RwReg, 0x4001405CU) /**< \brief (TC1) Register C (channel = 1) */ -#define REG_TC1_SR1 REG_ACCESS(RoReg, 0x40014060U) /**< \brief (TC1) Status Register (channel = 1) */ -#define REG_TC1_IER1 REG_ACCESS(WoReg, 0x40014064U) /**< \brief (TC1) Interrupt Enable Register (channel = 1) */ -#define REG_TC1_IDR1 REG_ACCESS(WoReg, 0x40014068U) /**< \brief (TC1) Interrupt Disable Register (channel = 1) */ -#define REG_TC1_IMR1 REG_ACCESS(RoReg, 0x4001406CU) /**< \brief (TC1) Interrupt Mask Register (channel = 1) */ -#define REG_TC1_CCR2 REG_ACCESS(WoReg, 0x40014080U) /**< \brief (TC1) Channel Control Register (channel = 2) */ -#define REG_TC1_CMR2 REG_ACCESS(RwReg, 0x40014084U) /**< \brief (TC1) Channel Mode Register (channel = 2) */ -#define REG_TC1_CV2 REG_ACCESS(RoReg, 0x40014090U) /**< \brief (TC1) Counter Value (channel = 2) */ -#define REG_TC1_RA2 REG_ACCESS(RwReg, 0x40014094U) /**< \brief (TC1) Register A (channel = 2) */ -#define REG_TC1_RB2 REG_ACCESS(RwReg, 0x40014098U) /**< \brief (TC1) Register B (channel = 2) */ -#define REG_TC1_RC2 REG_ACCESS(RwReg, 0x4001409CU) /**< \brief (TC1) Register C (channel = 2) */ -#define REG_TC1_SR2 REG_ACCESS(RoReg, 0x400140A0U) /**< \brief (TC1) Status Register (channel = 2) */ -#define REG_TC1_IER2 REG_ACCESS(WoReg, 0x400140A4U) /**< \brief (TC1) Interrupt Enable Register (channel = 2) */ -#define REG_TC1_IDR2 REG_ACCESS(WoReg, 0x400140A8U) /**< \brief (TC1) Interrupt Disable Register (channel = 2) */ -#define REG_TC1_IMR2 REG_ACCESS(RoReg, 0x400140ACU) /**< \brief (TC1) Interrupt Mask Register (channel = 2) */ -#define REG_TC1_BCR REG_ACCESS(WoReg, 0x400140C0U) /**< \brief (TC1) Block Control Register */ -#define REG_TC1_BMR REG_ACCESS(RwReg, 0x400140C4U) /**< \brief (TC1) Block Mode Register */ -#define REG_TC1_QIER REG_ACCESS(WoReg, 0x400140C8U) /**< \brief (TC1) QDEC Interrupt Enable Register */ -#define REG_TC1_QIDR REG_ACCESS(WoReg, 0x400140CCU) /**< \brief (TC1) QDEC Interrupt Disable Register */ -#define REG_TC1_QIMR REG_ACCESS(RoReg, 0x400140D0U) /**< \brief (TC1) QDEC Interrupt Mask Register */ -#define REG_TC1_QISR REG_ACCESS(RoReg, 0x400140D4U) /**< \brief (TC1) QDEC Interrupt Status Register */ -#define REG_TC1_FMR REG_ACCESS(RwReg, 0x400140D8U) /**< \brief (TC1) Fault Mode Register */ -#define REG_TC1_WPMR REG_ACCESS(RwReg, 0x400140E4U) /**< \brief (TC1) Write Protect Mode Register */ -#define REG_TC1_VER REG_ACCESS(RoReg, 0x400140FCU) /**< \brief (TC1) Version Register */ -/* ========== Register definition for TWI0 peripheral ========== */ -#define REG_TWI0_CR REG_ACCESS(WoReg, 0x40018000U) /**< \brief (TWI0) Control Register */ -#define REG_TWI0_MMR REG_ACCESS(RwReg, 0x40018004U) /**< \brief (TWI0) Master Mode Register */ -#define REG_TWI0_SMR REG_ACCESS(RwReg, 0x40018008U) /**< \brief (TWI0) Slave Mode Register */ -#define REG_TWI0_IADR REG_ACCESS(RwReg, 0x4001800CU) /**< \brief (TWI0) Internal Address Register */ -#define REG_TWI0_CWGR REG_ACCESS(RwReg, 0x40018010U) /**< \brief (TWI0) Clock Waveform Generator Register */ -#define REG_TWI0_SR REG_ACCESS(RoReg, 0x40018020U) /**< \brief (TWI0) Status Register */ -#define REG_TWI0_IER REG_ACCESS(WoReg, 0x40018024U) /**< \brief (TWI0) Interrupt Enable Register */ -#define REG_TWI0_IDR REG_ACCESS(WoReg, 0x40018028U) /**< \brief (TWI0) Interrupt Disable Register */ -#define REG_TWI0_IMR REG_ACCESS(RoReg, 0x4001802CU) /**< \brief (TWI0) Interrupt Mask Register */ -#define REG_TWI0_RHR REG_ACCESS(RoReg, 0x40018030U) /**< \brief (TWI0) Receive Holding Register */ -#define REG_TWI0_THR REG_ACCESS(WoReg, 0x40018034U) /**< \brief (TWI0) Transmit Holding Register */ -#define REG_TWI0_RPR REG_ACCESS(RwReg, 0x40018100U) /**< \brief (TWI0) Receive Pointer Register */ -#define REG_TWI0_RCR REG_ACCESS(RwReg, 0x40018104U) /**< \brief (TWI0) Receive Counter Register */ -#define REG_TWI0_TPR REG_ACCESS(RwReg, 0x40018108U) /**< \brief (TWI0) Transmit Pointer Register */ -#define REG_TWI0_TCR REG_ACCESS(RwReg, 0x4001810CU) /**< \brief (TWI0) Transmit Counter Register */ -#define REG_TWI0_RNPR REG_ACCESS(RwReg, 0x40018110U) /**< \brief (TWI0) Receive Next Pointer Register */ -#define REG_TWI0_RNCR REG_ACCESS(RwReg, 0x40018114U) /**< \brief (TWI0) Receive Next Counter Register */ -#define REG_TWI0_TNPR REG_ACCESS(RwReg, 0x40018118U) /**< \brief (TWI0) Transmit Next Pointer Register */ -#define REG_TWI0_TNCR REG_ACCESS(RwReg, 0x4001811CU) /**< \brief (TWI0) Transmit Next Counter Register */ -#define REG_TWI0_PTCR REG_ACCESS(WoReg, 0x40018120U) /**< \brief (TWI0) Transfer Control Register */ -#define REG_TWI0_PTSR REG_ACCESS(RoReg, 0x40018124U) /**< \brief (TWI0) Transfer Status Register */ -/* ========== Register definition for TWI1 peripheral ========== */ -#define REG_TWI1_CR REG_ACCESS(WoReg, 0x4001C000U) /**< \brief (TWI1) Control Register */ -#define REG_TWI1_MMR REG_ACCESS(RwReg, 0x4001C004U) /**< \brief (TWI1) Master Mode Register */ -#define REG_TWI1_SMR REG_ACCESS(RwReg, 0x4001C008U) /**< \brief (TWI1) Slave Mode Register */ -#define REG_TWI1_IADR REG_ACCESS(RwReg, 0x4001C00CU) /**< \brief (TWI1) Internal Address Register */ -#define REG_TWI1_CWGR REG_ACCESS(RwReg, 0x4001C010U) /**< \brief (TWI1) Clock Waveform Generator Register */ -#define REG_TWI1_SR REG_ACCESS(RoReg, 0x4001C020U) /**< \brief (TWI1) Status Register */ -#define REG_TWI1_IER REG_ACCESS(WoReg, 0x4001C024U) /**< \brief (TWI1) Interrupt Enable Register */ -#define REG_TWI1_IDR REG_ACCESS(WoReg, 0x4001C028U) /**< \brief (TWI1) Interrupt Disable Register */ -#define REG_TWI1_IMR REG_ACCESS(RoReg, 0x4001C02CU) /**< \brief (TWI1) Interrupt Mask Register */ -#define REG_TWI1_RHR REG_ACCESS(RoReg, 0x4001C030U) /**< \brief (TWI1) Receive Holding Register */ -#define REG_TWI1_THR REG_ACCESS(WoReg, 0x4001C034U) /**< \brief (TWI1) Transmit Holding Register */ -#define REG_TWI1_RPR REG_ACCESS(RwReg, 0x4001C100U) /**< \brief (TWI1) Receive Pointer Register */ -#define REG_TWI1_RCR REG_ACCESS(RwReg, 0x4001C104U) /**< \brief (TWI1) Receive Counter Register */ -#define REG_TWI1_TPR REG_ACCESS(RwReg, 0x4001C108U) /**< \brief (TWI1) Transmit Pointer Register */ -#define REG_TWI1_TCR REG_ACCESS(RwReg, 0x4001C10CU) /**< \brief (TWI1) Transmit Counter Register */ -#define REG_TWI1_RNPR REG_ACCESS(RwReg, 0x4001C110U) /**< \brief (TWI1) Receive Next Pointer Register */ -#define REG_TWI1_RNCR REG_ACCESS(RwReg, 0x4001C114U) /**< \brief (TWI1) Receive Next Counter Register */ -#define REG_TWI1_TNPR REG_ACCESS(RwReg, 0x4001C118U) /**< \brief (TWI1) Transmit Next Pointer Register */ -#define REG_TWI1_TNCR REG_ACCESS(RwReg, 0x4001C11CU) /**< \brief (TWI1) Transmit Next Counter Register */ -#define REG_TWI1_PTCR REG_ACCESS(WoReg, 0x4001C120U) /**< \brief (TWI1) Transfer Control Register */ -#define REG_TWI1_PTSR REG_ACCESS(RoReg, 0x4001C124U) /**< \brief (TWI1) Transfer Status Register */ -/* ========== Register definition for PWM peripheral ========== */ -#define REG_PWM_CLK REG_ACCESS(RwReg, 0x40020000U) /**< \brief (PWM) PWM Clock Register */ -#define REG_PWM_ENA REG_ACCESS(WoReg, 0x40020004U) /**< \brief (PWM) PWM Enable Register */ -#define REG_PWM_DIS REG_ACCESS(WoReg, 0x40020008U) /**< \brief (PWM) PWM Disable Register */ -#define REG_PWM_SR REG_ACCESS(RoReg, 0x4002000CU) /**< \brief (PWM) PWM Status Register */ -#define REG_PWM_IER1 REG_ACCESS(WoReg, 0x40020010U) /**< \brief (PWM) PWM Interrupt Enable Register 1 */ -#define REG_PWM_IDR1 REG_ACCESS(WoReg, 0x40020014U) /**< \brief (PWM) PWM Interrupt Disable Register 1 */ -#define REG_PWM_IMR1 REG_ACCESS(RoReg, 0x40020018U) /**< \brief (PWM) PWM Interrupt Mask Register 1 */ -#define REG_PWM_ISR1 REG_ACCESS(RoReg, 0x4002001CU) /**< \brief (PWM) PWM Interrupt Status Register 1 */ -#define REG_PWM_SCM REG_ACCESS(RwReg, 0x40020020U) /**< \brief (PWM) PWM Sync Channels Mode Register */ -#define REG_PWM_SCUC REG_ACCESS(RwReg, 0x40020028U) /**< \brief (PWM) PWM Sync Channels Update Control Register */ -#define REG_PWM_SCUP REG_ACCESS(RwReg, 0x4002002CU) /**< \brief (PWM) PWM Sync Channels Update Period Register */ -#define REG_PWM_SCUPUPD REG_ACCESS(WoReg, 0x40020030U) /**< \brief (PWM) PWM Sync Channels Update Period Update Register */ -#define REG_PWM_IER2 REG_ACCESS(WoReg, 0x40020034U) /**< \brief (PWM) PWM Interrupt Enable Register 2 */ -#define REG_PWM_IDR2 REG_ACCESS(WoReg, 0x40020038U) /**< \brief (PWM) PWM Interrupt Disable Register 2 */ -#define REG_PWM_IMR2 REG_ACCESS(RoReg, 0x4002003CU) /**< \brief (PWM) PWM Interrupt Mask Register 2 */ -#define REG_PWM_ISR2 REG_ACCESS(RoReg, 0x40020040U) /**< \brief (PWM) PWM Interrupt Status Register 2 */ -#define REG_PWM_OOV REG_ACCESS(RwReg, 0x40020044U) /**< \brief (PWM) PWM Output Override Value Register */ -#define REG_PWM_OS REG_ACCESS(RwReg, 0x40020048U) /**< \brief (PWM) PWM Output Selection Register */ -#define REG_PWM_OSS REG_ACCESS(WoReg, 0x4002004CU) /**< \brief (PWM) PWM Output Selection Set Register */ -#define REG_PWM_OSC REG_ACCESS(WoReg, 0x40020050U) /**< \brief (PWM) PWM Output Selection Clear Register */ -#define REG_PWM_OSSUPD REG_ACCESS(WoReg, 0x40020054U) /**< \brief (PWM) PWM Output Selection Set Update Register */ -#define REG_PWM_OSCUPD REG_ACCESS(WoReg, 0x40020058U) /**< \brief (PWM) PWM Output Selection Clear Update Register */ -#define REG_PWM_FMR REG_ACCESS(RwReg, 0x4002005CU) /**< \brief (PWM) PWM Fault Mode Register */ -#define REG_PWM_FSR REG_ACCESS(RoReg, 0x40020060U) /**< \brief (PWM) PWM Fault Status Register */ -#define REG_PWM_FCR REG_ACCESS(WoReg, 0x40020064U) /**< \brief (PWM) PWM Fault Clear Register */ -#define REG_PWM_FPV REG_ACCESS(RwReg, 0x40020068U) /**< \brief (PWM) PWM Fault Protection Value Register */ -#define REG_PWM_FPE REG_ACCESS(RwReg, 0x4002006CU) /**< \brief (PWM) PWM Fault Protection Enable Register */ -#define REG_PWM_ELxMR REG_ACCESS(RwReg, 0x4002007CU) /**< \brief (PWM) PWM Event Line 0 Mode Register */ -#define REG_PWM_SMMR REG_ACCESS(RwReg, 0x400200B0U) /**< \brief (PWM) PWM Stepper Motor Mode Register */ -#define REG_PWM_WPCR REG_ACCESS(WoReg, 0x400200E4U) /**< \brief (PWM) PWM Write Protect Control Register */ -#define REG_PWM_WPSR REG_ACCESS(RoReg, 0x400200E8U) /**< \brief (PWM) PWM Write Protect Status Register */ -#define REG_PWM_RPR REG_ACCESS(RwReg, 0x40020100U) /**< \brief (PWM) Receive Pointer Register */ -#define REG_PWM_RCR REG_ACCESS(RwReg, 0x40020104U) /**< \brief (PWM) Receive Counter Register */ -#define REG_PWM_TPR REG_ACCESS(RwReg, 0x40020108U) /**< \brief (PWM) Transmit Pointer Register */ -#define REG_PWM_TCR REG_ACCESS(RwReg, 0x4002010CU) /**< \brief (PWM) Transmit Counter Register */ -#define REG_PWM_RNPR REG_ACCESS(RwReg, 0x40020110U) /**< \brief (PWM) Receive Next Pointer Register */ -#define REG_PWM_RNCR REG_ACCESS(RwReg, 0x40020114U) /**< \brief (PWM) Receive Next Counter Register */ -#define REG_PWM_TNPR REG_ACCESS(RwReg, 0x40020118U) /**< \brief (PWM) Transmit Next Pointer Register */ -#define REG_PWM_TNCR REG_ACCESS(RwReg, 0x4002011CU) /**< \brief (PWM) Transmit Next Counter Register */ -#define REG_PWM_PTCR REG_ACCESS(WoReg, 0x40020120U) /**< \brief (PWM) Transfer Control Register */ -#define REG_PWM_PTSR REG_ACCESS(RoReg, 0x40020124U) /**< \brief (PWM) Transfer Status Register */ -#define REG_PWM_CMP0V REG_ACCESS(RwReg, 0x40020130U) /**< \brief (PWM) PWM Comparison 0 Value Register */ -#define REG_PWM_CMP0VUPD REG_ACCESS(WoReg, 0x40020134U) /**< \brief (PWM) PWM Comparison 0 Value Update Register */ -#define REG_PWM_CMP0M REG_ACCESS(RwReg, 0x40020138U) /**< \brief (PWM) PWM Comparison 0 Mode Register */ -#define REG_PWM_CMP0MUPD REG_ACCESS(WoReg, 0x4002013CU) /**< \brief (PWM) PWM Comparison 0 Mode Update Register */ -#define REG_PWM_CMP1V REG_ACCESS(RwReg, 0x40020140U) /**< \brief (PWM) PWM Comparison 1 Value Register */ -#define REG_PWM_CMP1VUPD REG_ACCESS(WoReg, 0x40020144U) /**< \brief (PWM) PWM Comparison 1 Value Update Register */ -#define REG_PWM_CMP1M REG_ACCESS(RwReg, 0x40020148U) /**< \brief (PWM) PWM Comparison 1 Mode Register */ -#define REG_PWM_CMP1MUPD REG_ACCESS(WoReg, 0x4002014CU) /**< \brief (PWM) PWM Comparison 1 Mode Update Register */ -#define REG_PWM_CMP2V REG_ACCESS(RwReg, 0x40020150U) /**< \brief (PWM) PWM Comparison 2 Value Register */ -#define REG_PWM_CMP2VUPD REG_ACCESS(WoReg, 0x40020154U) /**< \brief (PWM) PWM Comparison 2 Value Update Register */ -#define REG_PWM_CMP2M REG_ACCESS(RwReg, 0x40020158U) /**< \brief (PWM) PWM Comparison 2 Mode Register */ -#define REG_PWM_CMP2MUPD REG_ACCESS(WoReg, 0x4002015CU) /**< \brief (PWM) PWM Comparison 2 Mode Update Register */ -#define REG_PWM_CMP3V REG_ACCESS(RwReg, 0x40020160U) /**< \brief (PWM) PWM Comparison 3 Value Register */ -#define REG_PWM_CMP3VUPD REG_ACCESS(WoReg, 0x40020164U) /**< \brief (PWM) PWM Comparison 3 Value Update Register */ -#define REG_PWM_CMP3M REG_ACCESS(RwReg, 0x40020168U) /**< \brief (PWM) PWM Comparison 3 Mode Register */ -#define REG_PWM_CMP3MUPD REG_ACCESS(WoReg, 0x4002016CU) /**< \brief (PWM) PWM Comparison 3 Mode Update Register */ -#define REG_PWM_CMP4V REG_ACCESS(RwReg, 0x40020170U) /**< \brief (PWM) PWM Comparison 4 Value Register */ -#define REG_PWM_CMP4VUPD REG_ACCESS(WoReg, 0x40020174U) /**< \brief (PWM) PWM Comparison 4 Value Update Register */ -#define REG_PWM_CMP4M REG_ACCESS(RwReg, 0x40020178U) /**< \brief (PWM) PWM Comparison 4 Mode Register */ -#define REG_PWM_CMP4MUPD REG_ACCESS(WoReg, 0x4002017CU) /**< \brief (PWM) PWM Comparison 4 Mode Update Register */ -#define REG_PWM_CMP5V REG_ACCESS(RwReg, 0x40020180U) /**< \brief (PWM) PWM Comparison 5 Value Register */ -#define REG_PWM_CMP5VUPD REG_ACCESS(WoReg, 0x40020184U) /**< \brief (PWM) PWM Comparison 5 Value Update Register */ -#define REG_PWM_CMP5M REG_ACCESS(RwReg, 0x40020188U) /**< \brief (PWM) PWM Comparison 5 Mode Register */ -#define REG_PWM_CMP5MUPD REG_ACCESS(WoReg, 0x4002018CU) /**< \brief (PWM) PWM Comparison 5 Mode Update Register */ -#define REG_PWM_CMP6V REG_ACCESS(RwReg, 0x40020190U) /**< \brief (PWM) PWM Comparison 6 Value Register */ -#define REG_PWM_CMP6VUPD REG_ACCESS(WoReg, 0x40020194U) /**< \brief (PWM) PWM Comparison 6 Value Update Register */ -#define REG_PWM_CMP6M REG_ACCESS(RwReg, 0x40020198U) /**< \brief (PWM) PWM Comparison 6 Mode Register */ -#define REG_PWM_CMP6MUPD REG_ACCESS(WoReg, 0x4002019CU) /**< \brief (PWM) PWM Comparison 6 Mode Update Register */ -#define REG_PWM_CMP7V REG_ACCESS(RwReg, 0x400201A0U) /**< \brief (PWM) PWM Comparison 7 Value Register */ -#define REG_PWM_CMP7VUPD REG_ACCESS(WoReg, 0x400201A4U) /**< \brief (PWM) PWM Comparison 7 Value Update Register */ -#define REG_PWM_CMP7M REG_ACCESS(RwReg, 0x400201A8U) /**< \brief (PWM) PWM Comparison 7 Mode Register */ -#define REG_PWM_CMP7MUPD REG_ACCESS(WoReg, 0x400201ACU) /**< \brief (PWM) PWM Comparison 7 Mode Update Register */ -#define REG_PWM_CMR0 REG_ACCESS(RwReg, 0x40020200U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 0) */ -#define REG_PWM_CDTY0 REG_ACCESS(RwReg, 0x40020204U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 0) */ -#define REG_PWM_CDTYUPD0 REG_ACCESS(WoReg, 0x40020208U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 0) */ -#define REG_PWM_CPRD0 REG_ACCESS(RwReg, 0x4002020CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 0) */ -#define REG_PWM_CPRDUPD0 REG_ACCESS(WoReg, 0x40020210U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 0) */ -#define REG_PWM_CCNT0 REG_ACCESS(RoReg, 0x40020214U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 0) */ -#define REG_PWM_DT0 REG_ACCESS(RwReg, 0x40020218U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 0) */ -#define REG_PWM_DTUPD0 REG_ACCESS(WoReg, 0x4002021CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 0) */ -#define REG_PWM_CMR1 REG_ACCESS(RwReg, 0x40020220U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 1) */ -#define REG_PWM_CDTY1 REG_ACCESS(RwReg, 0x40020224U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 1) */ -#define REG_PWM_CDTYUPD1 REG_ACCESS(WoReg, 0x40020228U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 1) */ -#define REG_PWM_CPRD1 REG_ACCESS(RwReg, 0x4002022CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 1) */ -#define REG_PWM_CPRDUPD1 REG_ACCESS(WoReg, 0x40020230U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 1) */ -#define REG_PWM_CCNT1 REG_ACCESS(RoReg, 0x40020234U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 1) */ -#define REG_PWM_DT1 REG_ACCESS(RwReg, 0x40020238U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 1) */ -#define REG_PWM_DTUPD1 REG_ACCESS(WoReg, 0x4002023CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 1) */ -#define REG_PWM_CMR2 REG_ACCESS(RwReg, 0x40020240U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 2) */ -#define REG_PWM_CDTY2 REG_ACCESS(RwReg, 0x40020244U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 2) */ -#define REG_PWM_CDTYUPD2 REG_ACCESS(WoReg, 0x40020248U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 2) */ -#define REG_PWM_CPRD2 REG_ACCESS(RwReg, 0x4002024CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 2) */ -#define REG_PWM_CPRDUPD2 REG_ACCESS(WoReg, 0x40020250U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 2) */ -#define REG_PWM_CCNT2 REG_ACCESS(RoReg, 0x40020254U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 2) */ -#define REG_PWM_DT2 REG_ACCESS(RwReg, 0x40020258U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 2) */ -#define REG_PWM_DTUPD2 REG_ACCESS(WoReg, 0x4002025CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 2) */ -#define REG_PWM_CMR3 REG_ACCESS(RwReg, 0x40020260U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 3) */ -#define REG_PWM_CDTY3 REG_ACCESS(RwReg, 0x40020264U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 3) */ -#define REG_PWM_CDTYUPD3 REG_ACCESS(WoReg, 0x40020268U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 3) */ -#define REG_PWM_CPRD3 REG_ACCESS(RwReg, 0x4002026CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 3) */ -#define REG_PWM_CPRDUPD3 REG_ACCESS(WoReg, 0x40020270U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 3) */ -#define REG_PWM_CCNT3 REG_ACCESS(RoReg, 0x40020274U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 3) */ -#define REG_PWM_DT3 REG_ACCESS(RwReg, 0x40020278U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 3) */ -#define REG_PWM_DTUPD3 REG_ACCESS(WoReg, 0x4002027CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 3) */ -/* ========== Register definition for USART0 peripheral ========== */ -#define REG_USART0_CR REG_ACCESS(WoReg, 0x40024000U) /**< \brief (USART0) Control Register */ -#define REG_USART0_MR REG_ACCESS(RwReg, 0x40024004U) /**< \brief (USART0) Mode Register */ -#define REG_USART0_IER REG_ACCESS(WoReg, 0x40024008U) /**< \brief (USART0) Interrupt Enable Register */ -#define REG_USART0_IDR REG_ACCESS(WoReg, 0x4002400CU) /**< \brief (USART0) Interrupt Disable Register */ -#define REG_USART0_IMR REG_ACCESS(RoReg, 0x40024010U) /**< \brief (USART0) Interrupt Mask Register */ -#define REG_USART0_CSR REG_ACCESS(RoReg, 0x40024014U) /**< \brief (USART0) Channel Status Register */ -#define REG_USART0_RHR REG_ACCESS(RoReg, 0x40024018U) /**< \brief (USART0) Receiver Holding Register */ -#define REG_USART0_THR REG_ACCESS(WoReg, 0x4002401CU) /**< \brief (USART0) Transmitter Holding Register */ -#define REG_USART0_BRGR REG_ACCESS(RwReg, 0x40024020U) /**< \brief (USART0) Baud Rate Generator Register */ -#define REG_USART0_RTOR REG_ACCESS(RwReg, 0x40024024U) /**< \brief (USART0) Receiver Time-out Register */ -#define REG_USART0_TTGR REG_ACCESS(RwReg, 0x40024028U) /**< \brief (USART0) Transmitter Timeguard Register */ -#define REG_USART0_FIDI REG_ACCESS(RwReg, 0x40024040U) /**< \brief (USART0) FI DI Ratio Register */ -#define REG_USART0_NER REG_ACCESS(RoReg, 0x40024044U) /**< \brief (USART0) Number of Errors Register */ -#define REG_USART0_IF REG_ACCESS(RwReg, 0x4002404CU) /**< \brief (USART0) IrDA Filter Register */ -#define REG_USART0_MAN REG_ACCESS(RwReg, 0x40024050U) /**< \brief (USART0) Manchester Encoder Decoder Register */ -#define REG_USART0_WPMR REG_ACCESS(RwReg, 0x400240E4U) /**< \brief (USART0) Write Protect Mode Register */ -#define REG_USART0_WPSR REG_ACCESS(RoReg, 0x400240E8U) /**< \brief (USART0) Write Protect Status Register */ -#define REG_USART0_VERSION REG_ACCESS(RoReg, 0x400240FCU) /**< \brief (USART0) Version Register */ -#define REG_USART0_RPR REG_ACCESS(RwReg, 0x40024100U) /**< \brief (USART0) Receive Pointer Register */ -#define REG_USART0_RCR REG_ACCESS(RwReg, 0x40024104U) /**< \brief (USART0) Receive Counter Register */ -#define REG_USART0_TPR REG_ACCESS(RwReg, 0x40024108U) /**< \brief (USART0) Transmit Pointer Register */ -#define REG_USART0_TCR REG_ACCESS(RwReg, 0x4002410CU) /**< \brief (USART0) Transmit Counter Register */ -#define REG_USART0_RNPR REG_ACCESS(RwReg, 0x40024110U) /**< \brief (USART0) Receive Next Pointer Register */ -#define REG_USART0_RNCR REG_ACCESS(RwReg, 0x40024114U) /**< \brief (USART0) Receive Next Counter Register */ -#define REG_USART0_TNPR REG_ACCESS(RwReg, 0x40024118U) /**< \brief (USART0) Transmit Next Pointer Register */ -#define REG_USART0_TNCR REG_ACCESS(RwReg, 0x4002411CU) /**< \brief (USART0) Transmit Next Counter Register */ -#define REG_USART0_PTCR REG_ACCESS(WoReg, 0x40024120U) /**< \brief (USART0) Transfer Control Register */ -#define REG_USART0_PTSR REG_ACCESS(RoReg, 0x40024124U) /**< \brief (USART0) Transfer Status Register */ -/* ========== Register definition for USART1 peripheral ========== */ -#define REG_USART1_CR REG_ACCESS(WoReg, 0x40028000U) /**< \brief (USART1) Control Register */ -#define REG_USART1_MR REG_ACCESS(RwReg, 0x40028004U) /**< \brief (USART1) Mode Register */ -#define REG_USART1_IER REG_ACCESS(WoReg, 0x40028008U) /**< \brief (USART1) Interrupt Enable Register */ -#define REG_USART1_IDR REG_ACCESS(WoReg, 0x4002800CU) /**< \brief (USART1) Interrupt Disable Register */ -#define REG_USART1_IMR REG_ACCESS(RoReg, 0x40028010U) /**< \brief (USART1) Interrupt Mask Register */ -#define REG_USART1_CSR REG_ACCESS(RoReg, 0x40028014U) /**< \brief (USART1) Channel Status Register */ -#define REG_USART1_RHR REG_ACCESS(RoReg, 0x40028018U) /**< \brief (USART1) Receiver Holding Register */ -#define REG_USART1_THR REG_ACCESS(WoReg, 0x4002801CU) /**< \brief (USART1) Transmitter Holding Register */ -#define REG_USART1_BRGR REG_ACCESS(RwReg, 0x40028020U) /**< \brief (USART1) Baud Rate Generator Register */ -#define REG_USART1_RTOR REG_ACCESS(RwReg, 0x40028024U) /**< \brief (USART1) Receiver Time-out Register */ -#define REG_USART1_TTGR REG_ACCESS(RwReg, 0x40028028U) /**< \brief (USART1) Transmitter Timeguard Register */ -#define REG_USART1_FIDI REG_ACCESS(RwReg, 0x40028040U) /**< \brief (USART1) FI DI Ratio Register */ -#define REG_USART1_NER REG_ACCESS(RoReg, 0x40028044U) /**< \brief (USART1) Number of Errors Register */ -#define REG_USART1_IF REG_ACCESS(RwReg, 0x4002804CU) /**< \brief (USART1) IrDA Filter Register */ -#define REG_USART1_MAN REG_ACCESS(RwReg, 0x40028050U) /**< \brief (USART1) Manchester Encoder Decoder Register */ -#define REG_USART1_WPMR REG_ACCESS(RwReg, 0x400280E4U) /**< \brief (USART1) Write Protect Mode Register */ -#define REG_USART1_WPSR REG_ACCESS(RoReg, 0x400280E8U) /**< \brief (USART1) Write Protect Status Register */ -#define REG_USART1_VERSION REG_ACCESS(RoReg, 0x400280FCU) /**< \brief (USART1) Version Register */ -#define REG_USART1_RPR REG_ACCESS(RwReg, 0x40028100U) /**< \brief (USART1) Receive Pointer Register */ -#define REG_USART1_RCR REG_ACCESS(RwReg, 0x40028104U) /**< \brief (USART1) Receive Counter Register */ -#define REG_USART1_TPR REG_ACCESS(RwReg, 0x40028108U) /**< \brief (USART1) Transmit Pointer Register */ -#define REG_USART1_TCR REG_ACCESS(RwReg, 0x4002810CU) /**< \brief (USART1) Transmit Counter Register */ -#define REG_USART1_RNPR REG_ACCESS(RwReg, 0x40028110U) /**< \brief (USART1) Receive Next Pointer Register */ -#define REG_USART1_RNCR REG_ACCESS(RwReg, 0x40028114U) /**< \brief (USART1) Receive Next Counter Register */ -#define REG_USART1_TNPR REG_ACCESS(RwReg, 0x40028118U) /**< \brief (USART1) Transmit Next Pointer Register */ -#define REG_USART1_TNCR REG_ACCESS(RwReg, 0x4002811CU) /**< \brief (USART1) Transmit Next Counter Register */ -#define REG_USART1_PTCR REG_ACCESS(WoReg, 0x40028120U) /**< \brief (USART1) Transfer Control Register */ -#define REG_USART1_PTSR REG_ACCESS(RoReg, 0x40028124U) /**< \brief (USART1) Transfer Status Register */ -/* ========== Register definition for UDP peripheral ========== */ -#define REG_UDP_FRM_NUM REG_ACCESS(RoReg, 0x40034000U) /**< \brief (UDP) Frame Number Register */ -#define REG_UDP_GLB_STAT REG_ACCESS(RwReg, 0x40034004U) /**< \brief (UDP) Global State Register */ -#define REG_UDP_FADDR REG_ACCESS(RwReg, 0x40034008U) /**< \brief (UDP) Function Address Register */ -#define REG_UDP_IER REG_ACCESS(WoReg, 0x40034010U) /**< \brief (UDP) Interrupt Enable Register */ -#define REG_UDP_IDR REG_ACCESS(WoReg, 0x40034014U) /**< \brief (UDP) Interrupt Disable Register */ -#define REG_UDP_IMR REG_ACCESS(RoReg, 0x40034018U) /**< \brief (UDP) Interrupt Mask Register */ -#define REG_UDP_ISR REG_ACCESS(RoReg, 0x4003401CU) /**< \brief (UDP) Interrupt Status Register */ -#define REG_UDP_ICR REG_ACCESS(WoReg, 0x40034020U) /**< \brief (UDP) Interrupt Clear Register */ -#define REG_UDP_RST_EP REG_ACCESS(RwReg, 0x40034028U) /**< \brief (UDP) Reset Endpoint Register */ -#define REG_UDP_CSR REG_ACCESS(RwReg, 0x4003402CU) /**< \brief (UDP) Endpoint Control and Status Register (ept_num = 0) */ -#define REG_UDP_FDR REG_ACCESS(RwReg, 0x4003404CU) /**< \brief (UDP) Endpoint FIFO Data Register (ept_num = 0) */ -#define REG_UDP_TXVC REG_ACCESS(RwReg, 0x40034074U) /**< \brief (UDP) Transceiver Control Register */ -/* ========== Register definition for ADC peripheral ========== */ -#define REG_ADC_CR REG_ACCESS(WoReg, 0x40038000U) /**< \brief (ADC) Control Register */ -#define REG_ADC_MR REG_ACCESS(RwReg, 0x40038004U) /**< \brief (ADC) Mode Register */ -#define REG_ADC_SEQ1R REG_ACCESS(RwReg, 0x40038008U) /**< \brief (ADC) Channel Sequence 1Register */ -#define REG_ADC_SEQ2R REG_ACCESS(RwReg, 0x4003800CU) /**< \brief (ADC) Channel Sequence 2 Register */ -#define REG_ADC_CHER REG_ACCESS(WoReg, 0x40038010U) /**< \brief (ADC) Channel Enable Register */ -#define REG_ADC_CHDR REG_ACCESS(WoReg, 0x40038014U) /**< \brief (ADC) Channel Disable Register */ -#define REG_ADC_CHSR REG_ACCESS(RoReg, 0x40038018U) /**< \brief (ADC) Channel Status Register */ -#define REG_ADC_LCDR REG_ACCESS(RoReg, 0x40038020U) /**< \brief (ADC) Last Converted Data Register */ -#define REG_ADC_IER REG_ACCESS(WoReg, 0x40038024U) /**< \brief (ADC) Interrupt Enable Register */ -#define REG_ADC_IDR REG_ACCESS(WoReg, 0x40038028U) /**< \brief (ADC) Interrupt Disable Register */ -#define REG_ADC_IMR REG_ACCESS(RoReg, 0x4003802CU) /**< \brief (ADC) Interrupt Mask Register */ -#define REG_ADC_ISR REG_ACCESS(RoReg, 0x40038030U) /**< \brief (ADC) Interrupt Status Register */ -#define REG_ADC_OVER REG_ACCESS(RoReg, 0x4003803CU) /**< \brief (ADC) Overrun Status Register */ -#define REG_ADC_EMR REG_ACCESS(RwReg, 0x40038040U) /**< \brief (ADC) Extended Mode Register */ -#define REG_ADC_CWR REG_ACCESS(RwReg, 0x40038044U) /**< \brief (ADC) Compare Window Register */ -#define REG_ADC_CGR REG_ACCESS(RwReg, 0x40038048U) /**< \brief (ADC) Channel Gain Register */ -#define REG_ADC_COR REG_ACCESS(RwReg, 0x4003804CU) /**< \brief (ADC) Channel Offset Register */ -#define REG_ADC_CDR0 REG_ACCESS(RoReg, 0x40038050U) /**< \brief (ADC) Channel Data Register 0 */ -#define REG_ADC_CDR1 REG_ACCESS(RoReg, 0x40038054U) /**< \brief (ADC) Channel Data Register 1 */ -#define REG_ADC_CDR2 REG_ACCESS(RoReg, 0x40038058U) /**< \brief (ADC) Channel Data Register 2 */ -#define REG_ADC_CDR3 REG_ACCESS(RoReg, 0x4003805CU) /**< \brief (ADC) Channel Data Register 3 */ -#define REG_ADC_CDR4 REG_ACCESS(RoReg, 0x40038060U) /**< \brief (ADC) Channel Data Register 4 */ -#define REG_ADC_CDR5 REG_ACCESS(RoReg, 0x40038064U) /**< \brief (ADC) Channel Data Register 5 */ -#define REG_ADC_CDR6 REG_ACCESS(RoReg, 0x40038068U) /**< \brief (ADC) Channel Data Register 6 */ -#define REG_ADC_CDR15 REG_ACCESS(RoReg, 0x4003806CU) /**< \brief (ADC) Channel Data Register 15 */ -#define REG_ADC_ACR REG_ACCESS(RwReg, 0x40038094U) /**< \brief (ADC) Analog Control Register */ -#define REG_ADC_WPMR REG_ACCESS(RwReg, 0x400380E4U) /**< \brief (ADC) Write Protect Mode Register */ -#define REG_ADC_WPSR REG_ACCESS(RoReg, 0x400380E8U) /**< \brief (ADC) Write Protect Status Register */ -#define REG_ADC_RPR REG_ACCESS(RwReg, 0x40038100U) /**< \brief (ADC) Receive Pointer Register */ -#define REG_ADC_RCR REG_ACCESS(RwReg, 0x40038104U) /**< \brief (ADC) Receive Counter Register */ -#define REG_ADC_TPR REG_ACCESS(RwReg, 0x40038108U) /**< \brief (ADC) Transmit Pointer Register */ -#define REG_ADC_TCR REG_ACCESS(RwReg, 0x4003810CU) /**< \brief (ADC) Transmit Counter Register */ -#define REG_ADC_RNPR REG_ACCESS(RwReg, 0x40038110U) /**< \brief (ADC) Receive Next Pointer Register */ -#define REG_ADC_RNCR REG_ACCESS(RwReg, 0x40038114U) /**< \brief (ADC) Receive Next Counter Register */ -#define REG_ADC_TNPR REG_ACCESS(RwReg, 0x40038118U) /**< \brief (ADC) Transmit Next Pointer Register */ -#define REG_ADC_TNCR REG_ACCESS(RwReg, 0x4003811CU) /**< \brief (ADC) Transmit Next Counter Register */ -#define REG_ADC_PTCR REG_ACCESS(WoReg, 0x40038120U) /**< \brief (ADC) Transfer Control Register */ -#define REG_ADC_PTSR REG_ACCESS(RoReg, 0x40038124U) /**< \brief (ADC) Transfer Status Register */ -/* ========== Register definition for DACC peripheral ========== */ -#define REG_DACC_CR REG_ACCESS(WoReg, 0x4003C000U) /**< \brief (DACC) Control Register */ -#define REG_DACC_MR REG_ACCESS(RwReg, 0x4003C004U) /**< \brief (DACC) Mode Register */ -#define REG_DACC_CHER REG_ACCESS(WoReg, 0x4003C010U) /**< \brief (DACC) Channel Enable Register */ -#define REG_DACC_CHDR REG_ACCESS(WoReg, 0x4003C014U) /**< \brief (DACC) Channel Disable Register */ -#define REG_DACC_CHSR REG_ACCESS(RoReg, 0x4003C018U) /**< \brief (DACC) Channel Status Register */ -#define REG_DACC_CDR REG_ACCESS(WoReg, 0x4003C020U) /**< \brief (DACC) Conversion Data Register */ -#define REG_DACC_IER REG_ACCESS(WoReg, 0x4003C024U) /**< \brief (DACC) Interrupt Enable Register */ -#define REG_DACC_IDR REG_ACCESS(WoReg, 0x4003C028U) /**< \brief (DACC) Interrupt Disable Register */ -#define REG_DACC_IMR REG_ACCESS(RoReg, 0x4003C02CU) /**< \brief (DACC) Interrupt Mask Register */ -#define REG_DACC_ISR REG_ACCESS(RoReg, 0x4003C030U) /**< \brief (DACC) Interrupt Status Register */ -#define REG_DACC_ACR REG_ACCESS(RwReg, 0x4003C094U) /**< \brief (DACC) Analog Current Register */ -#define REG_DACC_WPMR REG_ACCESS(RwReg, 0x4003C0E4U) /**< \brief (DACC) Write Protect Mode register */ -#define REG_DACC_WPSR REG_ACCESS(RoReg, 0x4003C0E8U) /**< \brief (DACC) Write Protect Status register */ -#define REG_DACC_RPR REG_ACCESS(RwReg, 0x4003C100U) /**< \brief (DACC) Receive Pointer Register */ -#define REG_DACC_RCR REG_ACCESS(RwReg, 0x4003C104U) /**< \brief (DACC) Receive Counter Register */ -#define REG_DACC_TPR REG_ACCESS(RwReg, 0x4003C108U) /**< \brief (DACC) Transmit Pointer Register */ -#define REG_DACC_TCR REG_ACCESS(RwReg, 0x4003C10CU) /**< \brief (DACC) Transmit Counter Register */ -#define REG_DACC_RNPR REG_ACCESS(RwReg, 0x4003C110U) /**< \brief (DACC) Receive Next Pointer Register */ -#define REG_DACC_RNCR REG_ACCESS(RwReg, 0x4003C114U) /**< \brief (DACC) Receive Next Counter Register */ -#define REG_DACC_TNPR REG_ACCESS(RwReg, 0x4003C118U) /**< \brief (DACC) Transmit Next Pointer Register */ -#define REG_DACC_TNCR REG_ACCESS(RwReg, 0x4003C11CU) /**< \brief (DACC) Transmit Next Counter Register */ -#define REG_DACC_PTCR REG_ACCESS(WoReg, 0x4003C120U) /**< \brief (DACC) Transfer Control Register */ -#define REG_DACC_PTSR REG_ACCESS(RoReg, 0x4003C124U) /**< \brief (DACC) Transfer Status Register */ -/* ========== Register definition for ACC peripheral ========== */ -#define REG_ACC_CR REG_ACCESS(WoReg, 0x40040000U) /**< \brief (ACC) Control Register */ -#define REG_ACC_MR REG_ACCESS(RwReg, 0x40040004U) /**< \brief (ACC) Mode Register */ -#define REG_ACC_IER REG_ACCESS(WoReg, 0x40040024U) /**< \brief (ACC) Interrupt Enable Register */ -#define REG_ACC_IDR REG_ACCESS(WoReg, 0x40040028U) /**< \brief (ACC) Interrupt Disable Register */ -#define REG_ACC_IMR REG_ACCESS(RoReg, 0x4004002CU) /**< \brief (ACC) Interrupt Mask Register */ -#define REG_ACC_ISR REG_ACCESS(RoReg, 0x40040030U) /**< \brief (ACC) Interrupt Status Register */ -#define REG_ACC_ACR REG_ACCESS(RwReg, 0x40040094U) /**< \brief (ACC) Analog Control Register */ -#define REG_ACC_WPMR REG_ACCESS(RwReg, 0x400400E4U) /**< \brief (ACC) Write Protect Mode Register */ -#define REG_ACC_WPSR REG_ACCESS(RoReg, 0x400400E8U) /**< \brief (ACC) Write Protect Status Register */ -/* ========== Register definition for CRCCU peripheral ========== */ -#define REG_CRCCU_DSCR REG_ACCESS(RwReg, 0x40044000U) /**< \brief (CRCCU) CRCCU Descriptor Base Register */ -#define REG_CRCCU_DMA_EN REG_ACCESS(WoReg, 0x40044008U) /**< \brief (CRCCU) CRCCU DMA Enable Register */ -#define REG_CRCCU_DMA_DIS REG_ACCESS(WoReg, 0x4004400CU) /**< \brief (CRCCU) CRCCU DMA Disable Register */ -#define REG_CRCCU_DMA_SR REG_ACCESS(RoReg, 0x40044010U) /**< \brief (CRCCU) CRCCU DMA Status Register */ -#define REG_CRCCU_DMA_IER REG_ACCESS(WoReg, 0x40044014U) /**< \brief (CRCCU) CRCCU DMA Interrupt Enable Register */ -#define REG_CRCCU_DMA_IDR REG_ACCESS(WoReg, 0x40044018U) /**< \brief (CRCCU) CRCCU DMA Interrupt Disable Register */ -#define REG_CRCCU_DMA_IMR REG_ACCESS(RoReg, 0x4004401CU) /**< \brief (CRCCU) CRCCU DMA Interrupt Mask Register */ -#define REG_CRCCU_DMA_ISR REG_ACCESS(RoReg, 0x40044020U) /**< \brief (CRCCU) CRCCU DMA Interrupt Status Register */ -#define REG_CRCCU_CR REG_ACCESS(WoReg, 0x40044034U) /**< \brief (CRCCU) CRCCU Control Register */ -#define REG_CRCCU_MR REG_ACCESS(RwReg, 0x40044038U) /**< \brief (CRCCU) CRCCU Mode Register */ -#define REG_CRCCU_SR REG_ACCESS(RoReg, 0x4004403CU) /**< \brief (CRCCU) CRCCU Status Register */ -#define REG_CRCCU_IER REG_ACCESS(WoReg, 0x40044040U) /**< \brief (CRCCU) CRCCU Interrupt Enable Register */ -#define REG_CRCCU_IDR REG_ACCESS(WoReg, 0x40044044U) /**< \brief (CRCCU) CRCCU Interrupt Disable Register */ -#define REG_CRCCU_IMR REG_ACCESS(RoReg, 0x40044048U) /**< \brief (CRCCU) CRCCU Interrupt Mask Register */ -#define REG_CRCCU_ISR REG_ACCESS(RoReg, 0x4004404CU) /**< \brief (CRCCU) CRCCU Interrupt Status Register */ -/* ========== Register definition for SMC peripheral ========== */ -#define REG_SMC_SETUP0 REG_ACCESS(RwReg, 0x400E0000U) /**< \brief (SMC) SMC Setup Register (CS_number = 0) */ -#define REG_SMC_PULSE0 REG_ACCESS(RwReg, 0x400E0004U) /**< \brief (SMC) SMC Pulse Register (CS_number = 0) */ -#define REG_SMC_CYCLE0 REG_ACCESS(RwReg, 0x400E0008U) /**< \brief (SMC) SMC Cycle Register (CS_number = 0) */ -#define REG_SMC_MODE0 REG_ACCESS(RwReg, 0x400E000CU) /**< \brief (SMC) SMC Mode Register (CS_number = 0) */ -#define REG_SMC_SETUP1 REG_ACCESS(RwReg, 0x400E0010U) /**< \brief (SMC) SMC Setup Register (CS_number = 1) */ -#define REG_SMC_PULSE1 REG_ACCESS(RwReg, 0x400E0014U) /**< \brief (SMC) SMC Pulse Register (CS_number = 1) */ -#define REG_SMC_CYCLE1 REG_ACCESS(RwReg, 0x400E0018U) /**< \brief (SMC) SMC Cycle Register (CS_number = 1) */ -#define REG_SMC_MODE1 REG_ACCESS(RwReg, 0x400E001CU) /**< \brief (SMC) SMC Mode Register (CS_number = 1) */ -#define REG_SMC_SETUP2 REG_ACCESS(RwReg, 0x400E0020U) /**< \brief (SMC) SMC Setup Register (CS_number = 2) */ -#define REG_SMC_PULSE2 REG_ACCESS(RwReg, 0x400E0024U) /**< \brief (SMC) SMC Pulse Register (CS_number = 2) */ -#define REG_SMC_CYCLE2 REG_ACCESS(RwReg, 0x400E0028U) /**< \brief (SMC) SMC Cycle Register (CS_number = 2) */ -#define REG_SMC_MODE2 REG_ACCESS(RwReg, 0x400E002CU) /**< \brief (SMC) SMC Mode Register (CS_number = 2) */ -#define REG_SMC_SETUP3 REG_ACCESS(RwReg, 0x400E0030U) /**< \brief (SMC) SMC Setup Register (CS_number = 3) */ -#define REG_SMC_PULSE3 REG_ACCESS(RwReg, 0x400E0034U) /**< \brief (SMC) SMC Pulse Register (CS_number = 3) */ -#define REG_SMC_CYCLE3 REG_ACCESS(RwReg, 0x400E0038U) /**< \brief (SMC) SMC Cycle Register (CS_number = 3) */ -#define REG_SMC_MODE3 REG_ACCESS(RwReg, 0x400E003CU) /**< \brief (SMC) SMC Mode Register (CS_number = 3) */ -#define REG_SMC_SETUP4 REG_ACCESS(RwReg, 0x400E0040U) /**< \brief (SMC) SMC Setup Register (CS_number = 4) */ -#define REG_SMC_PULSE4 REG_ACCESS(RwReg, 0x400E0044U) /**< \brief (SMC) SMC Pulse Register (CS_number = 4) */ -#define REG_SMC_CYCLE4 REG_ACCESS(RwReg, 0x400E0048U) /**< \brief (SMC) SMC Cycle Register (CS_number = 4) */ -#define REG_SMC_MODE4 REG_ACCESS(RwReg, 0x400E004CU) /**< \brief (SMC) SMC Mode Register (CS_number = 4) */ -#define REG_SMC_OCMS REG_ACCESS(RwReg, 0x400E0080U) /**< \brief (SMC) SMC OCMS MODE Register */ -#define REG_SMC_KEY1 REG_ACCESS(WoReg, 0x400E0084U) /**< \brief (SMC) SMC OCMS KEY1 Register */ -#define REG_SMC_KEY2 REG_ACCESS(WoReg, 0x400E0088U) /**< \brief (SMC) SMC OCMS KEY2 Register */ -#define REG_SMC_WPMR REG_ACCESS(RwReg, 0x400E00E4U) /**< \brief (SMC) SMC Write Protect Mode Register */ -#define REG_SMC_WPSR REG_ACCESS(RoReg, 0x400E00E8U) /**< \brief (SMC) SMC Write Protect Status Register */ -/* ========== Register definition for MATRIX peripheral ========== */ -#define REG_MATRIX_MCFG REG_ACCESS(RwReg, 0x400E0200U) /**< \brief (MATRIX) Master Configuration Register */ -#define REG_MATRIX_SCFG REG_ACCESS(RwReg, 0x400E0240U) /**< \brief (MATRIX) Slave Configuration Register */ -#define REG_MATRIX_PRAS0 REG_ACCESS(RwReg, 0x400E0280U) /**< \brief (MATRIX) Priority Register A for Slave 0 */ -#define REG_MATRIX_PRAS1 REG_ACCESS(RwReg, 0x400E0288U) /**< \brief (MATRIX) Priority Register A for Slave 1 */ -#define REG_MATRIX_PRAS2 REG_ACCESS(RwReg, 0x400E0290U) /**< \brief (MATRIX) Priority Register A for Slave 2 */ -#define REG_MATRIX_PRAS3 REG_ACCESS(RwReg, 0x400E0298U) /**< \brief (MATRIX) Priority Register A for Slave 3 */ -#define REG_MATRIX_PRAS4 REG_ACCESS(RwReg, 0x400E02A0U) /**< \brief (MATRIX) Priority Register A for Slave 4 */ -#define REG_MATRIX_SYSIO REG_ACCESS(RwReg, 0x400E0314U) /**< \brief (MATRIX) System IO Configuration register */ -#define REG_MATRIX_SMCNFCS REG_ACCESS(RwReg, 0x400E031CU) /**< \brief (MATRIX) SMC Chip Select NAND Flash Assignment Register */ -#define REG_MATRIX_WPMR REG_ACCESS(RwReg, 0x400E03E4U) /**< \brief (MATRIX) Write Protect Mode Register */ -#define REG_MATRIX_WPSR REG_ACCESS(RoReg, 0x400E03E8U) /**< \brief (MATRIX) Write Protect Status Register */ -/* ========== Register definition for PMC peripheral ========== */ -#define REG_PMC_SCER REG_ACCESS(WoReg, 0x400E0400U) /**< \brief (PMC) System Clock Enable Register */ -#define REG_PMC_SCDR REG_ACCESS(WoReg, 0x400E0404U) /**< \brief (PMC) System Clock Disable Register */ -#define REG_PMC_SCSR REG_ACCESS(RoReg, 0x400E0408U) /**< \brief (PMC) System Clock Status Register */ -#define REG_PMC_PCER0 REG_ACCESS(WoReg, 0x400E0410U) /**< \brief (PMC) Peripheral Clock Enable Register 0 */ -#define REG_PMC_PCDR0 REG_ACCESS(WoReg, 0x400E0414U) /**< \brief (PMC) Peripheral Clock Disable Register 0 */ -#define REG_PMC_PCSR0 REG_ACCESS(RoReg, 0x400E0418U) /**< \brief (PMC) Peripheral Clock Status Register 0 */ -#define REG_PMC_MOR REG_ACCESS(RwReg, 0x400E0420U) /**< \brief (PMC) Main Oscillator Register */ -#define REG_PMC_MCFR REG_ACCESS(RoReg, 0x400E0424U) /**< \brief (PMC) Main Clock Frequency Register */ -#define REG_PMC_PLLAR REG_ACCESS(RwReg, 0x400E0428U) /**< \brief (PMC) PLLA Register */ -#define REG_PMC_PLLBR REG_ACCESS(RwReg, 0x400E042CU) /**< \brief (PMC) PLLB Register */ -#define REG_PMC_MCKR REG_ACCESS(RwReg, 0x400E0430U) /**< \brief (PMC) Master Clock Register */ -#define REG_PMC_USB REG_ACCESS(RwReg, 0x400E0438U) /**< \brief (PMC) USB Clock Register */ -#define REG_PMC_PCK REG_ACCESS(RwReg, 0x400E0440U) /**< \brief (PMC) Programmable Clock 0 Register */ -#define REG_PMC_IER REG_ACCESS(WoReg, 0x400E0460U) /**< \brief (PMC) Interrupt Enable Register */ -#define REG_PMC_IDR REG_ACCESS(WoReg, 0x400E0464U) /**< \brief (PMC) Interrupt Disable Register */ -#define REG_PMC_SR REG_ACCESS(RoReg, 0x400E0468U) /**< \brief (PMC) Status Register */ -#define REG_PMC_IMR REG_ACCESS(RoReg, 0x400E046CU) /**< \brief (PMC) Interrupt Mask Register */ -#define REG_PMC_FSMR REG_ACCESS(RwReg, 0x400E0470U) /**< \brief (PMC) Fast Startup Mode Register */ -#define REG_PMC_FSPR REG_ACCESS(RwReg, 0x400E0474U) /**< \brief (PMC) Fast Startup Polarity Register */ -#define REG_PMC_FOCR REG_ACCESS(WoReg, 0x400E0478U) /**< \brief (PMC) Fault Output Clear Register */ -#define REG_PMC_WPMR REG_ACCESS(RwReg, 0x400E04E4U) /**< \brief (PMC) Write Protect Mode Register */ -#define REG_PMC_WPSR REG_ACCESS(RoReg, 0x400E04E8U) /**< \brief (PMC) Write Protect Status Register */ -#define REG_PMC_PCER1 REG_ACCESS(WoReg, 0x400E0500U) /**< \brief (PMC) Peripheral Clock Enable Register 1 */ -#define REG_PMC_PCDR1 REG_ACCESS(WoReg, 0x400E0504U) /**< \brief (PMC) Peripheral Clock Disable Register 1 */ -#define REG_PMC_PCSR1 REG_ACCESS(RoReg, 0x400E0508U) /**< \brief (PMC) Peripheral Clock Status Register 1 */ -#define REG_PMC_OCR REG_ACCESS(RwReg, 0x400E0510U) /**< \brief (PMC) Oscillator Calibration Register */ -/* ========== Register definition for UART0 peripheral ========== */ -#define REG_UART0_CR REG_ACCESS(WoReg, 0x400E0600U) /**< \brief (UART0) Control Register */ -#define REG_UART0_MR REG_ACCESS(RwReg, 0x400E0604U) /**< \brief (UART0) Mode Register */ -#define REG_UART0_IER REG_ACCESS(WoReg, 0x400E0608U) /**< \brief (UART0) Interrupt Enable Register */ -#define REG_UART0_IDR REG_ACCESS(WoReg, 0x400E060CU) /**< \brief (UART0) Interrupt Disable Register */ -#define REG_UART0_IMR REG_ACCESS(RoReg, 0x400E0610U) /**< \brief (UART0) Interrupt Mask Register */ -#define REG_UART0_SR REG_ACCESS(RoReg, 0x400E0614U) /**< \brief (UART0) Status Register */ -#define REG_UART0_RHR REG_ACCESS(RoReg, 0x400E0618U) /**< \brief (UART0) Receive Holding Register */ -#define REG_UART0_THR REG_ACCESS(WoReg, 0x400E061CU) /**< \brief (UART0) Transmit Holding Register */ -#define REG_UART0_BRGR REG_ACCESS(RwReg, 0x400E0620U) /**< \brief (UART0) Baud Rate Generator Register */ -#define REG_UART0_RPR REG_ACCESS(RwReg, 0x400E0700U) /**< \brief (UART0) Receive Pointer Register */ -#define REG_UART0_RCR REG_ACCESS(RwReg, 0x400E0704U) /**< \brief (UART0) Receive Counter Register */ -#define REG_UART0_TPR REG_ACCESS(RwReg, 0x400E0708U) /**< \brief (UART0) Transmit Pointer Register */ -#define REG_UART0_TCR REG_ACCESS(RwReg, 0x400E070CU) /**< \brief (UART0) Transmit Counter Register */ -#define REG_UART0_RNPR REG_ACCESS(RwReg, 0x400E0710U) /**< \brief (UART0) Receive Next Pointer Register */ -#define REG_UART0_RNCR REG_ACCESS(RwReg, 0x400E0714U) /**< \brief (UART0) Receive Next Counter Register */ -#define REG_UART0_TNPR REG_ACCESS(RwReg, 0x400E0718U) /**< \brief (UART0) Transmit Next Pointer Register */ -#define REG_UART0_TNCR REG_ACCESS(RwReg, 0x400E071CU) /**< \brief (UART0) Transmit Next Counter Register */ -#define REG_UART0_PTCR REG_ACCESS(WoReg, 0x400E0720U) /**< \brief (UART0) Transfer Control Register */ -#define REG_UART0_PTSR REG_ACCESS(RoReg, 0x400E0724U) /**< \brief (UART0) Transfer Status Register */ -/* ========== Register definition for CHIPID peripheral ========== */ -#define REG_CHIPID_CIDR REG_ACCESS(RoReg, 0x400E0740U) /**< \brief (CHIPID) Chip ID Register */ -#define REG_CHIPID_EXID REG_ACCESS(RoReg, 0x400E0744U) /**< \brief (CHIPID) Chip ID Extension Register */ -/* ========== Register definition for UART1 peripheral ========== */ -#define REG_UART1_CR REG_ACCESS(WoReg, 0x400E0800U) /**< \brief (UART1) Control Register */ -#define REG_UART1_MR REG_ACCESS(RwReg, 0x400E0804U) /**< \brief (UART1) Mode Register */ -#define REG_UART1_IER REG_ACCESS(WoReg, 0x400E0808U) /**< \brief (UART1) Interrupt Enable Register */ -#define REG_UART1_IDR REG_ACCESS(WoReg, 0x400E080CU) /**< \brief (UART1) Interrupt Disable Register */ -#define REG_UART1_IMR REG_ACCESS(RoReg, 0x400E0810U) /**< \brief (UART1) Interrupt Mask Register */ -#define REG_UART1_SR REG_ACCESS(RoReg, 0x400E0814U) /**< \brief (UART1) Status Register */ -#define REG_UART1_RHR REG_ACCESS(RoReg, 0x400E0818U) /**< \brief (UART1) Receive Holding Register */ -#define REG_UART1_THR REG_ACCESS(WoReg, 0x400E081CU) /**< \brief (UART1) Transmit Holding Register */ -#define REG_UART1_BRGR REG_ACCESS(RwReg, 0x400E0820U) /**< \brief (UART1) Baud Rate Generator Register */ -#define REG_UART1_RPR REG_ACCESS(RwReg, 0x400E0900U) /**< \brief (UART1) Receive Pointer Register */ -#define REG_UART1_RCR REG_ACCESS(RwReg, 0x400E0904U) /**< \brief (UART1) Receive Counter Register */ -#define REG_UART1_TPR REG_ACCESS(RwReg, 0x400E0908U) /**< \brief (UART1) Transmit Pointer Register */ -#define REG_UART1_TCR REG_ACCESS(RwReg, 0x400E090CU) /**< \brief (UART1) Transmit Counter Register */ -#define REG_UART1_RNPR REG_ACCESS(RwReg, 0x400E0910U) /**< \brief (UART1) Receive Next Pointer Register */ -#define REG_UART1_RNCR REG_ACCESS(RwReg, 0x400E0914U) /**< \brief (UART1) Receive Next Counter Register */ -#define REG_UART1_TNPR REG_ACCESS(RwReg, 0x400E0918U) /**< \brief (UART1) Transmit Next Pointer Register */ -#define REG_UART1_TNCR REG_ACCESS(RwReg, 0x400E091CU) /**< \brief (UART1) Transmit Next Counter Register */ -#define REG_UART1_PTCR REG_ACCESS(WoReg, 0x400E0920U) /**< \brief (UART1) Transfer Control Register */ -#define REG_UART1_PTSR REG_ACCESS(RoReg, 0x400E0924U) /**< \brief (UART1) Transfer Status Register */ -/* ========== Register definition for EFC peripheral ========== */ -#define REG_EFC_FMR REG_ACCESS(RwReg, 0x400E0A00U) /**< \brief (EFC) EEFC Flash Mode Register */ -#define REG_EFC_FCR REG_ACCESS(WoReg, 0x400E0A04U) /**< \brief (EFC) EEFC Flash Command Register */ -#define REG_EFC_FSR REG_ACCESS(RoReg, 0x400E0A08U) /**< \brief (EFC) EEFC Flash Status Register */ -#define REG_EFC_FRR REG_ACCESS(RoReg, 0x400E0A0CU) /**< \brief (EFC) EEFC Flash Result Register */ -/* ========== Register definition for PIOA peripheral ========== */ -#define REG_PIOA_PER REG_ACCESS(WoReg, 0x400E0E00U) /**< \brief (PIOA) PIO Enable Register */ -#define REG_PIOA_PDR REG_ACCESS(WoReg, 0x400E0E04U) /**< \brief (PIOA) PIO Disable Register */ -#define REG_PIOA_PSR REG_ACCESS(RoReg, 0x400E0E08U) /**< \brief (PIOA) PIO Status Register */ -#define REG_PIOA_OER REG_ACCESS(WoReg, 0x400E0E10U) /**< \brief (PIOA) Output Enable Register */ -#define REG_PIOA_ODR REG_ACCESS(WoReg, 0x400E0E14U) /**< \brief (PIOA) Output Disable Register */ -#define REG_PIOA_OSR REG_ACCESS(RoReg, 0x400E0E18U) /**< \brief (PIOA) Output Status Register */ -#define REG_PIOA_IFER REG_ACCESS(WoReg, 0x400E0E20U) /**< \brief (PIOA) Glitch Input Filter Enable Register */ -#define REG_PIOA_IFDR REG_ACCESS(WoReg, 0x400E0E24U) /**< \brief (PIOA) Glitch Input Filter Disable Register */ -#define REG_PIOA_IFSR REG_ACCESS(RoReg, 0x400E0E28U) /**< \brief (PIOA) Glitch Input Filter Status Register */ -#define REG_PIOA_SODR REG_ACCESS(WoReg, 0x400E0E30U) /**< \brief (PIOA) Set Output Data Register */ -#define REG_PIOA_CODR REG_ACCESS(WoReg, 0x400E0E34U) /**< \brief (PIOA) Clear Output Data Register */ -#define REG_PIOA_ODSR REG_ACCESS(RwReg, 0x400E0E38U) /**< \brief (PIOA) Output Data Status Register */ -#define REG_PIOA_PDSR REG_ACCESS(RoReg, 0x400E0E3CU) /**< \brief (PIOA) Pin Data Status Register */ -#define REG_PIOA_IER REG_ACCESS(WoReg, 0x400E0E40U) /**< \brief (PIOA) Interrupt Enable Register */ -#define REG_PIOA_IDR REG_ACCESS(WoReg, 0x400E0E44U) /**< \brief (PIOA) Interrupt Disable Register */ -#define REG_PIOA_IMR REG_ACCESS(RoReg, 0x400E0E48U) /**< \brief (PIOA) Interrupt Mask Register */ -#define REG_PIOA_ISR REG_ACCESS(RoReg, 0x400E0E4CU) /**< \brief (PIOA) Interrupt Status Register */ -#define REG_PIOA_MDER REG_ACCESS(WoReg, 0x400E0E50U) /**< \brief (PIOA) Multi-driver Enable Register */ -#define REG_PIOA_MDDR REG_ACCESS(WoReg, 0x400E0E54U) /**< \brief (PIOA) Multi-driver Disable Register */ -#define REG_PIOA_MDSR REG_ACCESS(RoReg, 0x400E0E58U) /**< \brief (PIOA) Multi-driver Status Register */ -#define REG_PIOA_PUDR REG_ACCESS(WoReg, 0x400E0E60U) /**< \brief (PIOA) Pull-up Disable Register */ -#define REG_PIOA_PUER REG_ACCESS(WoReg, 0x400E0E64U) /**< \brief (PIOA) Pull-up Enable Register */ -#define REG_PIOA_PUSR REG_ACCESS(RoReg, 0x400E0E68U) /**< \brief (PIOA) Pad Pull-up Status Register */ -#define REG_PIOA_ABCDSR REG_ACCESS(RwReg, 0x400E0E70U) /**< \brief (PIOA) Peripheral Select Register */ -#define REG_PIOA_SCIFSR REG_ACCESS(WoReg, 0x400E0E80U) /**< \brief (PIOA) System Clock Glitch Input Filter Select Register */ -#define REG_PIOA_DIFSR REG_ACCESS(WoReg, 0x400E0E84U) /**< \brief (PIOA) Debouncing Input Filter Select Register */ -#define REG_PIOA_IFDGSR REG_ACCESS(RoReg, 0x400E0E88U) /**< \brief (PIOA) Glitch or Debouncing Input Filter Clock Selection Status Register */ -#define REG_PIOA_SCDR REG_ACCESS(RwReg, 0x400E0E8CU) /**< \brief (PIOA) Slow Clock Divider Debouncing Register */ -#define REG_PIOA_PPDDR REG_ACCESS(WoReg, 0x400E0E90U) /**< \brief (PIOA) Pad Pull-down Disable Register */ -#define REG_PIOA_PPDER REG_ACCESS(WoReg, 0x400E0E94U) /**< \brief (PIOA) Pad Pull-down Enable Register */ -#define REG_PIOA_PPDSR REG_ACCESS(RoReg, 0x400E0E98U) /**< \brief (PIOA) Pad Pull-down Status Register */ -#define REG_PIOA_OWER REG_ACCESS(WoReg, 0x400E0EA0U) /**< \brief (PIOA) Output Write Enable */ -#define REG_PIOA_OWDR REG_ACCESS(WoReg, 0x400E0EA4U) /**< \brief (PIOA) Output Write Disable */ -#define REG_PIOA_OWSR REG_ACCESS(RoReg, 0x400E0EA8U) /**< \brief (PIOA) Output Write Status Register */ -#define REG_PIOA_AIMER REG_ACCESS(WoReg, 0x400E0EB0U) /**< \brief (PIOA) Additional Interrupt Modes Enable Register */ -#define REG_PIOA_AIMDR REG_ACCESS(WoReg, 0x400E0EB4U) /**< \brief (PIOA) Additional Interrupt Modes Disables Register */ -#define REG_PIOA_AIMMR REG_ACCESS(RoReg, 0x400E0EB8U) /**< \brief (PIOA) Additional Interrupt Modes Mask Register */ -#define REG_PIOA_ESR REG_ACCESS(WoReg, 0x400E0EC0U) /**< \brief (PIOA) Edge Select Register */ -#define REG_PIOA_LSR REG_ACCESS(WoReg, 0x400E0EC4U) /**< \brief (PIOA) Level Select Register */ -#define REG_PIOA_ELSR REG_ACCESS(RoReg, 0x400E0EC8U) /**< \brief (PIOA) Edge/Level Status Register */ -#define REG_PIOA_FELLSR REG_ACCESS(WoReg, 0x400E0ED0U) /**< \brief (PIOA) Falling Edge/Low Level Select Register */ -#define REG_PIOA_REHLSR REG_ACCESS(WoReg, 0x400E0ED4U) /**< \brief (PIOA) Rising Edge/ High Level Select Register */ -#define REG_PIOA_FRLHSR REG_ACCESS(RoReg, 0x400E0ED8U) /**< \brief (PIOA) Fall/Rise - Low/High Status Register */ -#define REG_PIOA_LOCKSR REG_ACCESS(RoReg, 0x400E0EE0U) /**< \brief (PIOA) Lock Status */ -#define REG_PIOA_WPMR REG_ACCESS(RwReg, 0x400E0EE4U) /**< \brief (PIOA) Write Protect Mode Register */ -#define REG_PIOA_WPSR REG_ACCESS(RoReg, 0x400E0EE8U) /**< \brief (PIOA) Write Protect Status Register */ -#define REG_PIOA_SCHMITT REG_ACCESS(RwReg, 0x400E0F00U) /**< \brief (PIOA) Schmitt Trigger Register */ -#define REG_PIOA_PCMR REG_ACCESS(RwReg, 0x400E0F50U) /**< \brief (PIOA) Parallel Capture Mode Register */ -#define REG_PIOA_PCIER REG_ACCESS(WoReg, 0x400E0F54U) /**< \brief (PIOA) Parallel Capture Interrupt Enable Register */ -#define REG_PIOA_PCIDR REG_ACCESS(WoReg, 0x400E0F58U) /**< \brief (PIOA) Parallel Capture Interrupt Disable Register */ -#define REG_PIOA_PCIMR REG_ACCESS(RoReg, 0x400E0F5CU) /**< \brief (PIOA) Parallel Capture Interrupt Mask Register */ -#define REG_PIOA_PCISR REG_ACCESS(RoReg, 0x400E0F60U) /**< \brief (PIOA) Parallel Capture Interrupt Status Register */ -#define REG_PIOA_PCRHR REG_ACCESS(RoReg, 0x400E0F64U) /**< \brief (PIOA) Parallel Capture Reception Holding Register */ -/* ========== Register definition for PIOB peripheral ========== */ -#define REG_PIOB_PER REG_ACCESS(WoReg, 0x400E1000U) /**< \brief (PIOB) PIO Enable Register */ -#define REG_PIOB_PDR REG_ACCESS(WoReg, 0x400E1004U) /**< \brief (PIOB) PIO Disable Register */ -#define REG_PIOB_PSR REG_ACCESS(RoReg, 0x400E1008U) /**< \brief (PIOB) PIO Status Register */ -#define REG_PIOB_OER REG_ACCESS(WoReg, 0x400E1010U) /**< \brief (PIOB) Output Enable Register */ -#define REG_PIOB_ODR REG_ACCESS(WoReg, 0x400E1014U) /**< \brief (PIOB) Output Disable Register */ -#define REG_PIOB_OSR REG_ACCESS(RoReg, 0x400E1018U) /**< \brief (PIOB) Output Status Register */ -#define REG_PIOB_IFER REG_ACCESS(WoReg, 0x400E1020U) /**< \brief (PIOB) Glitch Input Filter Enable Register */ -#define REG_PIOB_IFDR REG_ACCESS(WoReg, 0x400E1024U) /**< \brief (PIOB) Glitch Input Filter Disable Register */ -#define REG_PIOB_IFSR REG_ACCESS(RoReg, 0x400E1028U) /**< \brief (PIOB) Glitch Input Filter Status Register */ -#define REG_PIOB_SODR REG_ACCESS(WoReg, 0x400E1030U) /**< \brief (PIOB) Set Output Data Register */ -#define REG_PIOB_CODR REG_ACCESS(WoReg, 0x400E1034U) /**< \brief (PIOB) Clear Output Data Register */ -#define REG_PIOB_ODSR REG_ACCESS(RwReg, 0x400E1038U) /**< \brief (PIOB) Output Data Status Register */ -#define REG_PIOB_PDSR REG_ACCESS(RoReg, 0x400E103CU) /**< \brief (PIOB) Pin Data Status Register */ -#define REG_PIOB_IER REG_ACCESS(WoReg, 0x400E1040U) /**< \brief (PIOB) Interrupt Enable Register */ -#define REG_PIOB_IDR REG_ACCESS(WoReg, 0x400E1044U) /**< \brief (PIOB) Interrupt Disable Register */ -#define REG_PIOB_IMR REG_ACCESS(RoReg, 0x400E1048U) /**< \brief (PIOB) Interrupt Mask Register */ -#define REG_PIOB_ISR REG_ACCESS(RoReg, 0x400E104CU) /**< \brief (PIOB) Interrupt Status Register */ -#define REG_PIOB_MDER REG_ACCESS(WoReg, 0x400E1050U) /**< \brief (PIOB) Multi-driver Enable Register */ -#define REG_PIOB_MDDR REG_ACCESS(WoReg, 0x400E1054U) /**< \brief (PIOB) Multi-driver Disable Register */ -#define REG_PIOB_MDSR REG_ACCESS(RoReg, 0x400E1058U) /**< \brief (PIOB) Multi-driver Status Register */ -#define REG_PIOB_PUDR REG_ACCESS(WoReg, 0x400E1060U) /**< \brief (PIOB) Pull-up Disable Register */ -#define REG_PIOB_PUER REG_ACCESS(WoReg, 0x400E1064U) /**< \brief (PIOB) Pull-up Enable Register */ -#define REG_PIOB_PUSR REG_ACCESS(RoReg, 0x400E1068U) /**< \brief (PIOB) Pad Pull-up Status Register */ -#define REG_PIOB_ABCDSR REG_ACCESS(RwReg, 0x400E1070U) /**< \brief (PIOB) Peripheral Select Register */ -#define REG_PIOB_SCIFSR REG_ACCESS(WoReg, 0x400E1080U) /**< \brief (PIOB) System Clock Glitch Input Filter Select Register */ -#define REG_PIOB_DIFSR REG_ACCESS(WoReg, 0x400E1084U) /**< \brief (PIOB) Debouncing Input Filter Select Register */ -#define REG_PIOB_IFDGSR REG_ACCESS(RoReg, 0x400E1088U) /**< \brief (PIOB) Glitch or Debouncing Input Filter Clock Selection Status Register */ -#define REG_PIOB_SCDR REG_ACCESS(RwReg, 0x400E108CU) /**< \brief (PIOB) Slow Clock Divider Debouncing Register */ -#define REG_PIOB_PPDDR REG_ACCESS(WoReg, 0x400E1090U) /**< \brief (PIOB) Pad Pull-down Disable Register */ -#define REG_PIOB_PPDER REG_ACCESS(WoReg, 0x400E1094U) /**< \brief (PIOB) Pad Pull-down Enable Register */ -#define REG_PIOB_PPDSR REG_ACCESS(RoReg, 0x400E1098U) /**< \brief (PIOB) Pad Pull-down Status Register */ -#define REG_PIOB_OWER REG_ACCESS(WoReg, 0x400E10A0U) /**< \brief (PIOB) Output Write Enable */ -#define REG_PIOB_OWDR REG_ACCESS(WoReg, 0x400E10A4U) /**< \brief (PIOB) Output Write Disable */ -#define REG_PIOB_OWSR REG_ACCESS(RoReg, 0x400E10A8U) /**< \brief (PIOB) Output Write Status Register */ -#define REG_PIOB_AIMER REG_ACCESS(WoReg, 0x400E10B0U) /**< \brief (PIOB) Additional Interrupt Modes Enable Register */ -#define REG_PIOB_AIMDR REG_ACCESS(WoReg, 0x400E10B4U) /**< \brief (PIOB) Additional Interrupt Modes Disables Register */ -#define REG_PIOB_AIMMR REG_ACCESS(RoReg, 0x400E10B8U) /**< \brief (PIOB) Additional Interrupt Modes Mask Register */ -#define REG_PIOB_ESR REG_ACCESS(WoReg, 0x400E10C0U) /**< \brief (PIOB) Edge Select Register */ -#define REG_PIOB_LSR REG_ACCESS(WoReg, 0x400E10C4U) /**< \brief (PIOB) Level Select Register */ -#define REG_PIOB_ELSR REG_ACCESS(RoReg, 0x400E10C8U) /**< \brief (PIOB) Edge/Level Status Register */ -#define REG_PIOB_FELLSR REG_ACCESS(WoReg, 0x400E10D0U) /**< \brief (PIOB) Falling Edge/Low Level Select Register */ -#define REG_PIOB_REHLSR REG_ACCESS(WoReg, 0x400E10D4U) /**< \brief (PIOB) Rising Edge/ High Level Select Register */ -#define REG_PIOB_FRLHSR REG_ACCESS(RoReg, 0x400E10D8U) /**< \brief (PIOB) Fall/Rise - Low/High Status Register */ -#define REG_PIOB_LOCKSR REG_ACCESS(RoReg, 0x400E10E0U) /**< \brief (PIOB) Lock Status */ -#define REG_PIOB_WPMR REG_ACCESS(RwReg, 0x400E10E4U) /**< \brief (PIOB) Write Protect Mode Register */ -#define REG_PIOB_WPSR REG_ACCESS(RoReg, 0x400E10E8U) /**< \brief (PIOB) Write Protect Status Register */ -#define REG_PIOB_SCHMITT REG_ACCESS(RwReg, 0x400E1100U) /**< \brief (PIOB) Schmitt Trigger Register */ -#define REG_PIOB_PCMR REG_ACCESS(RwReg, 0x400E1150U) /**< \brief (PIOB) Parallel Capture Mode Register */ -#define REG_PIOB_PCIER REG_ACCESS(WoReg, 0x400E1154U) /**< \brief (PIOB) Parallel Capture Interrupt Enable Register */ -#define REG_PIOB_PCIDR REG_ACCESS(WoReg, 0x400E1158U) /**< \brief (PIOB) Parallel Capture Interrupt Disable Register */ -#define REG_PIOB_PCIMR REG_ACCESS(RoReg, 0x400E115CU) /**< \brief (PIOB) Parallel Capture Interrupt Mask Register */ -#define REG_PIOB_PCISR REG_ACCESS(RoReg, 0x400E1160U) /**< \brief (PIOB) Parallel Capture Interrupt Status Register */ -#define REG_PIOB_PCRHR REG_ACCESS(RoReg, 0x400E1164U) /**< \brief (PIOB) Parallel Capture Reception Holding Register */ -/* ========== Register definition for PIOC peripheral ========== */ -#define REG_PIOC_PER REG_ACCESS(WoReg, 0x400E1200U) /**< \brief (PIOC) PIO Enable Register */ -#define REG_PIOC_PDR REG_ACCESS(WoReg, 0x400E1204U) /**< \brief (PIOC) PIO Disable Register */ -#define REG_PIOC_PSR REG_ACCESS(RoReg, 0x400E1208U) /**< \brief (PIOC) PIO Status Register */ -#define REG_PIOC_OER REG_ACCESS(WoReg, 0x400E1210U) /**< \brief (PIOC) Output Enable Register */ -#define REG_PIOC_ODR REG_ACCESS(WoReg, 0x400E1214U) /**< \brief (PIOC) Output Disable Register */ -#define REG_PIOC_OSR REG_ACCESS(RoReg, 0x400E1218U) /**< \brief (PIOC) Output Status Register */ -#define REG_PIOC_IFER REG_ACCESS(WoReg, 0x400E1220U) /**< \brief (PIOC) Glitch Input Filter Enable Register */ -#define REG_PIOC_IFDR REG_ACCESS(WoReg, 0x400E1224U) /**< \brief (PIOC) Glitch Input Filter Disable Register */ -#define REG_PIOC_IFSR REG_ACCESS(RoReg, 0x400E1228U) /**< \brief (PIOC) Glitch Input Filter Status Register */ -#define REG_PIOC_SODR REG_ACCESS(WoReg, 0x400E1230U) /**< \brief (PIOC) Set Output Data Register */ -#define REG_PIOC_CODR REG_ACCESS(WoReg, 0x400E1234U) /**< \brief (PIOC) Clear Output Data Register */ -#define REG_PIOC_ODSR REG_ACCESS(RwReg, 0x400E1238U) /**< \brief (PIOC) Output Data Status Register */ -#define REG_PIOC_PDSR REG_ACCESS(RoReg, 0x400E123CU) /**< \brief (PIOC) Pin Data Status Register */ -#define REG_PIOC_IER REG_ACCESS(WoReg, 0x400E1240U) /**< \brief (PIOC) Interrupt Enable Register */ -#define REG_PIOC_IDR REG_ACCESS(WoReg, 0x400E1244U) /**< \brief (PIOC) Interrupt Disable Register */ -#define REG_PIOC_IMR REG_ACCESS(RoReg, 0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register */ -#define REG_PIOC_ISR REG_ACCESS(RoReg, 0x400E124CU) /**< \brief (PIOC) Interrupt Status Register */ -#define REG_PIOC_MDER REG_ACCESS(WoReg, 0x400E1250U) /**< \brief (PIOC) Multi-driver Enable Register */ -#define REG_PIOC_MDDR REG_ACCESS(WoReg, 0x400E1254U) /**< \brief (PIOC) Multi-driver Disable Register */ -#define REG_PIOC_MDSR REG_ACCESS(RoReg, 0x400E1258U) /**< \brief (PIOC) Multi-driver Status Register */ -#define REG_PIOC_PUDR REG_ACCESS(WoReg, 0x400E1260U) /**< \brief (PIOC) Pull-up Disable Register */ -#define REG_PIOC_PUER REG_ACCESS(WoReg, 0x400E1264U) /**< \brief (PIOC) Pull-up Enable Register */ -#define REG_PIOC_PUSR REG_ACCESS(RoReg, 0x400E1268U) /**< \brief (PIOC) Pad Pull-up Status Register */ -#define REG_PIOC_ABCDSR REG_ACCESS(RwReg, 0x400E1270U) /**< \brief (PIOC) Peripheral Select Register */ -#define REG_PIOC_SCIFSR REG_ACCESS(WoReg, 0x400E1280U) /**< \brief (PIOC) System Clock Glitch Input Filter Select Register */ -#define REG_PIOC_DIFSR REG_ACCESS(WoReg, 0x400E1284U) /**< \brief (PIOC) Debouncing Input Filter Select Register */ -#define REG_PIOC_IFDGSR REG_ACCESS(RoReg, 0x400E1288U) /**< \brief (PIOC) Glitch or Debouncing Input Filter Clock Selection Status Register */ -#define REG_PIOC_SCDR REG_ACCESS(RwReg, 0x400E128CU) /**< \brief (PIOC) Slow Clock Divider Debouncing Register */ -#define REG_PIOC_PPDDR REG_ACCESS(WoReg, 0x400E1290U) /**< \brief (PIOC) Pad Pull-down Disable Register */ -#define REG_PIOC_PPDER REG_ACCESS(WoReg, 0x400E1294U) /**< \brief (PIOC) Pad Pull-down Enable Register */ -#define REG_PIOC_PPDSR REG_ACCESS(RoReg, 0x400E1298U) /**< \brief (PIOC) Pad Pull-down Status Register */ -#define REG_PIOC_OWER REG_ACCESS(WoReg, 0x400E12A0U) /**< \brief (PIOC) Output Write Enable */ -#define REG_PIOC_OWDR REG_ACCESS(WoReg, 0x400E12A4U) /**< \brief (PIOC) Output Write Disable */ -#define REG_PIOC_OWSR REG_ACCESS(RoReg, 0x400E12A8U) /**< \brief (PIOC) Output Write Status Register */ -#define REG_PIOC_AIMER REG_ACCESS(WoReg, 0x400E12B0U) /**< \brief (PIOC) Additional Interrupt Modes Enable Register */ -#define REG_PIOC_AIMDR REG_ACCESS(WoReg, 0x400E12B4U) /**< \brief (PIOC) Additional Interrupt Modes Disables Register */ -#define REG_PIOC_AIMMR REG_ACCESS(RoReg, 0x400E12B8U) /**< \brief (PIOC) Additional Interrupt Modes Mask Register */ -#define REG_PIOC_ESR REG_ACCESS(WoReg, 0x400E12C0U) /**< \brief (PIOC) Edge Select Register */ -#define REG_PIOC_LSR REG_ACCESS(WoReg, 0x400E12C4U) /**< \brief (PIOC) Level Select Register */ -#define REG_PIOC_ELSR REG_ACCESS(RoReg, 0x400E12C8U) /**< \brief (PIOC) Edge/Level Status Register */ -#define REG_PIOC_FELLSR REG_ACCESS(WoReg, 0x400E12D0U) /**< \brief (PIOC) Falling Edge/Low Level Select Register */ -#define REG_PIOC_REHLSR REG_ACCESS(WoReg, 0x400E12D4U) /**< \brief (PIOC) Rising Edge/ High Level Select Register */ -#define REG_PIOC_FRLHSR REG_ACCESS(RoReg, 0x400E12D8U) /**< \brief (PIOC) Fall/Rise - Low/High Status Register */ -#define REG_PIOC_LOCKSR REG_ACCESS(RoReg, 0x400E12E0U) /**< \brief (PIOC) Lock Status */ -#define REG_PIOC_WPMR REG_ACCESS(RwReg, 0x400E12E4U) /**< \brief (PIOC) Write Protect Mode Register */ -#define REG_PIOC_WPSR REG_ACCESS(RoReg, 0x400E12E8U) /**< \brief (PIOC) Write Protect Status Register */ -#define REG_PIOC_SCHMITT REG_ACCESS(RwReg, 0x400E1300U) /**< \brief (PIOC) Schmitt Trigger Register */ -#define REG_PIOC_PCMR REG_ACCESS(RwReg, 0x400E1350U) /**< \brief (PIOC) Parallel Capture Mode Register */ -#define REG_PIOC_PCIER REG_ACCESS(WoReg, 0x400E1354U) /**< \brief (PIOC) Parallel Capture Interrupt Enable Register */ -#define REG_PIOC_PCIDR REG_ACCESS(WoReg, 0x400E1358U) /**< \brief (PIOC) Parallel Capture Interrupt Disable Register */ -#define REG_PIOC_PCIMR REG_ACCESS(RoReg, 0x400E135CU) /**< \brief (PIOC) Parallel Capture Interrupt Mask Register */ -#define REG_PIOC_PCISR REG_ACCESS(RoReg, 0x400E1360U) /**< \brief (PIOC) Parallel Capture Interrupt Status Register */ -#define REG_PIOC_PCRHR REG_ACCESS(RoReg, 0x400E1364U) /**< \brief (PIOC) Parallel Capture Reception Holding Register */ -/* ========== Register definition for RSTC peripheral ========== */ -#define REG_RSTC_CR REG_ACCESS(WoReg, 0x400E1400U) /**< \brief (RSTC) Control Register */ -#define REG_RSTC_SR REG_ACCESS(RoReg, 0x400E1404U) /**< \brief (RSTC) Status Register */ -#define REG_RSTC_MR REG_ACCESS(RwReg, 0x400E1408U) /**< \brief (RSTC) Mode Register */ -/* ========== Register definition for SUPC peripheral ========== */ -#define REG_SUPC_CR REG_ACCESS(WoReg, 0x400E1410U) /**< \brief (SUPC) Supply Controller Control Register */ -#define REG_SUPC_SMMR REG_ACCESS(RwReg, 0x400E1414U) /**< \brief (SUPC) Supply Controller Supply Monitor Mode Register */ -#define REG_SUPC_MR REG_ACCESS(RwReg, 0x400E1418U) /**< \brief (SUPC) Supply Controller Mode Register */ -#define REG_SUPC_WUMR REG_ACCESS(RwReg, 0x400E141CU) /**< \brief (SUPC) Supply Controller Wake Up Mode Register */ -#define REG_SUPC_WUIR REG_ACCESS(RwReg, 0x400E1420U) /**< \brief (SUPC) Supply Controller Wake Up Inputs Register */ -#define REG_SUPC_SR REG_ACCESS(RoReg, 0x400E1424U) /**< \brief (SUPC) Supply Controller Status Register */ -/* ========== Register definition for RTT peripheral ========== */ -#define REG_RTT_MR REG_ACCESS(RwReg, 0x400E1430U) /**< \brief (RTT) Mode Register */ -#define REG_RTT_AR REG_ACCESS(RwReg, 0x400E1434U) /**< \brief (RTT) Alarm Register */ -#define REG_RTT_VR REG_ACCESS(RoReg, 0x400E1438U) /**< \brief (RTT) Value Register */ -#define REG_RTT_SR REG_ACCESS(RoReg, 0x400E143CU) /**< \brief (RTT) Status Register */ -/* ========== Register definition for WDT peripheral ========== */ -#define REG_WDT_CR REG_ACCESS(WoReg, 0x400E1450U) /**< \brief (WDT) Control Register */ -#define REG_WDT_MR REG_ACCESS(RwReg, 0x400E1454U) /**< \brief (WDT) Mode Register */ -#define REG_WDT_SR REG_ACCESS(RoReg, 0x400E1458U) /**< \brief (WDT) Status Register */ -/* ========== Register definition for RTC peripheral ========== */ -#define REG_RTC_CR REG_ACCESS(RwReg, 0x400E1460U) /**< \brief (RTC) Control Register */ -#define REG_RTC_MR REG_ACCESS(RwReg, 0x400E1464U) /**< \brief (RTC) Mode Register */ -#define REG_RTC_TIMR REG_ACCESS(RwReg, 0x400E1468U) /**< \brief (RTC) Time Register */ -#define REG_RTC_CALR REG_ACCESS(RwReg, 0x400E146CU) /**< \brief (RTC) Calendar Register */ -#define REG_RTC_TIMALR REG_ACCESS(RwReg, 0x400E1470U) /**< \brief (RTC) Time Alarm Register */ -#define REG_RTC_CALALR REG_ACCESS(RwReg, 0x400E1474U) /**< \brief (RTC) Calendar Alarm Register */ -#define REG_RTC_SR REG_ACCESS(RoReg, 0x400E1478U) /**< \brief (RTC) Status Register */ -#define REG_RTC_SCCR REG_ACCESS(WoReg, 0x400E147CU) /**< \brief (RTC) Status Clear Command Register */ -#define REG_RTC_IER REG_ACCESS(WoReg, 0x400E1480U) /**< \brief (RTC) Interrupt Enable Register */ -#define REG_RTC_IDR REG_ACCESS(WoReg, 0x400E1484U) /**< \brief (RTC) Interrupt Disable Register */ -#define REG_RTC_IMR REG_ACCESS(RoReg, 0x400E1488U) /**< \brief (RTC) Interrupt Mask Register */ -#define REG_RTC_VER REG_ACCESS(RoReg, 0x400E148CU) /**< \brief (RTC) Valid Entry Register */ -/* ========== Register definition for GPBR peripheral ========== */ -#define REG_GPBR_GPBR0 REG_ACCESS(RwReg, 0x400E1490U) /**< \brief (GPBR) General Purpose Backup Register 0 */ -#define REG_GPBR_GPBR1 REG_ACCESS(RwReg, 0x400E1494U) /**< \brief (GPBR) General Purpose Backup Register 1 */ -#define REG_GPBR_GPBR2 REG_ACCESS(RwReg, 0x400E1498U) /**< \brief (GPBR) General Purpose Backup Register 2 */ -#define REG_GPBR_GPBR3 REG_ACCESS(RwReg, 0x400E149CU) /**< \brief (GPBR) General Purpose Backup Register 3 */ -/*@}*/ - -/* ***************************************************************************** */ -/* PERIPHERAL ID DEFINITIONS FOR AT91SAM3S */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3S_id Peripheral Ids Definitions */ -/*@{*/ - -#define ID_SUPC ( 0) /**< \brief Supply Controller (SUPC) */ -#define ID_RSTC ( 1) /**< \brief Reset Controller (RSTC) */ -#define ID_RTC ( 2) /**< \brief Real Time Clock (RTC) */ -#define ID_RTT ( 3) /**< \brief Real Time Timer (RTT) */ -#define ID_WDT ( 4) /**< \brief Watchdog Timer (WDT) */ -#define ID_PMC ( 5) /**< \brief Power Management Controller (PMC) */ -#define ID_EFC ( 6) /**< \brief Enhanced Flash Controller (EFC) */ -#define ID_UART0 ( 8) /**< \brief UART 0 (UART0) */ -#define ID_UART1 ( 9) /**< \brief UART 1 (UART1) */ -#define ID_SMC (10) /**< \brief Static Memory Controller (SMC) */ -#define ID_PIOA (11) /**< \brief Parallel I/O Controller A (PIOA) */ -#define ID_PIOB (12) /**< \brief Parallel I/O Controller B (PIOB) */ -#define ID_PIOC (13) /**< \brief Parallel I/O Controller C (PIOC) */ -#define ID_USART0 (14) /**< \brief USART 0 (USART0) */ -#define ID_USART1 (15) /**< \brief USART 1 (USART1) */ -#define ID_HSMCI (18) /**< \brief Multimedia Card Interface (HSMCI) */ -#define ID_TWI0 (19) /**< \brief Two Wire Interface 0 (TWI0) */ -#define ID_TWI1 (20) /**< \brief Two Wire Interface 1 (TWI1) */ -#define ID_SPI (21) /**< \brief Serial Peripheral Interface (SPI) */ -#define ID_SSC (22) /**< \brief Synchronous Serial Controler (SSC) */ -#define ID_TC0 (23) /**< \brief Timer/Counter 0 (TC0) */ -#define ID_TC1 (24) /**< \brief Timer/Counter 1 (TC1) */ -#define ID_TC2 (25) /**< \brief Timer/Counter 2 (TC2) */ -#define ID_TC3 (26) /**< \brief Timer/Counter 3 (TC3) */ -#define ID_TC4 (27) /**< \brief Timer/Counter 4 (TC4) */ -#define ID_TC5 (28) /**< \brief Timer/Counter 5 (TC5) */ -#define ID_ADC (29) /**< \brief Analog To Digital Converter (ADC) */ -#define ID_DACC (30) /**< \brief Digital To Analog Converter (DACC) */ -#define ID_PWM (31) /**< \brief Pulse Width Modulation (PWM) */ -#define ID_CRCCU (32) /**< \brief CRC Calculation Unit (CRCCU) */ -#define ID_ACC (33) /**< \brief Analog Comparator (ACC) */ -#define ID_UDP (34) /**< \brief USB Device Port (UDP) */ -/*@}*/ - -/* ***************************************************************************** */ -/* BASE ADDRESS DEFINITIONS FOR AT91SAM3S */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3S_base Peripheral Base Address Definitions */ -/*@{*/ - -#define HSMCI CAST(Hsmci , 0x40000000U) /**< \brief (HSMCI ) Base Address */ -#define PDC_HSMCI CAST(Pdc , 0x40000100U) /**< \brief (PDC_HSMCI ) Base Address */ -#define SSC CAST(Ssc , 0x40004000U) /**< \brief (SSC ) Base Address */ -#define PDC_SSC CAST(Pdc , 0x40004100U) /**< \brief (PDC_SSC ) Base Address */ -#define SPI CAST(Spi , 0x40008000U) /**< \brief (SPI ) Base Address */ -#define PDC_SPI CAST(Pdc , 0x40008100U) /**< \brief (PDC_SPI ) Base Address */ -#define TC0 CAST(Tc , 0x40010000U) /**< \brief (TC0 ) Base Address */ -#define TC1 CAST(Tc , 0x40014000U) /**< \brief (TC1 ) Base Address */ -#define TWI0 CAST(Twi , 0x40018000U) /**< \brief (TWI0 ) Base Address */ -#define PDC_TWI0 CAST(Pdc , 0x40018100U) /**< \brief (PDC_TWI0 ) Base Address */ -#define TWI1 CAST(Twi , 0x4001C000U) /**< \brief (TWI1 ) Base Address */ -#define PDC_TWI1 CAST(Pdc , 0x4001C100U) /**< \brief (PDC_TWI1 ) Base Address */ -#define PWM CAST(Pwm , 0x40020000U) /**< \brief (PWM ) Base Address */ -#define PDC_PWM CAST(Pdc , 0x40020100U) /**< \brief (PDC_PWM ) Base Address */ -#define USART0 CAST(Usart , 0x40024000U) /**< \brief (USART0 ) Base Address */ -#define PDC_USART0 CAST(Pdc , 0x40024100U) /**< \brief (PDC_USART0) Base Address */ -#define USART1 CAST(Usart , 0x40028000U) /**< \brief (USART1 ) Base Address */ -#define PDC_USART1 CAST(Pdc , 0x40028100U) /**< \brief (PDC_USART1) Base Address */ -#define UDP CAST(Udp , 0x40034000U) /**< \brief (UDP ) Base Address */ -#define ADC CAST(Adc , 0x40038000U) /**< \brief (ADC ) Base Address */ -#define PDC_ADC CAST(Pdc , 0x40038100U) /**< \brief (PDC_ADC ) Base Address */ -#define DACC CAST(Dacc , 0x4003C000U) /**< \brief (DACC ) Base Address */ -#define PDC_DACC CAST(Pdc , 0x4003C100U) /**< \brief (PDC_DACC ) Base Address */ -#define ACC CAST(Acc , 0x40040000U) /**< \brief (ACC ) Base Address */ -#define CRCCU CAST(Crccu , 0x40044000U) /**< \brief (CRCCU ) Base Address */ -#define SMC CAST(Smc , 0x400E0000U) /**< \brief (SMC ) Base Address */ -#define MATRIX CAST(Matrix , 0x400E0200U) /**< \brief (MATRIX ) Base Address */ -#define PMC CAST(Pmc , 0x400E0400U) /**< \brief (PMC ) Base Address */ -#define UART0 CAST(Uart , 0x400E0600U) /**< \brief (UART0 ) Base Address */ -#define PDC_UART0 CAST(Pdc , 0x400E0700U) /**< \brief (PDC_UART0 ) Base Address */ -#define CHIPID CAST(Chipid , 0x400E0740U) /**< \brief (CHIPID ) Base Address */ -#define UART1 CAST(Uart , 0x400E0800U) /**< \brief (UART1 ) Base Address */ -#define PDC_UART1 CAST(Pdc , 0x400E0900U) /**< \brief (PDC_UART1 ) Base Address */ -#define EFC CAST(Efc , 0x400E0A00U) /**< \brief (EFC ) Base Address */ -#define PIOA CAST(Pio , 0x400E0E00U) /**< \brief (PIOA ) Base Address */ -#define PIOB CAST(Pio , 0x400E1000U) /**< \brief (PIOB ) Base Address */ -#define PIOC CAST(Pio , 0x400E1200U) /**< \brief (PIOC ) Base Address */ -#define RSTC CAST(Rstc , 0x400E1400U) /**< \brief (RSTC ) Base Address */ -#define SUPC CAST(Supc , 0x400E1410U) /**< \brief (SUPC ) Base Address */ -#define RTT CAST(Rtt , 0x400E1430U) /**< \brief (RTT ) Base Address */ -#define WDT CAST(Wdt , 0x400E1450U) /**< \brief (WDT ) Base Address */ -#define RTC CAST(Rtc , 0x400E1460U) /**< \brief (RTC ) Base Address */ -#define GPBR CAST(Gpbr , 0x400E1490U) /**< \brief (GPBR ) Base Address */ -/*@}*/ - -/* ***************************************************************************** */ -/* PIO DEFINITIONS FOR AT91SAM3S */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3S_pio Peripheral Pio Definitions */ -/*@{*/ - -#define PIO_PA0 (1 << 0) /**< \brief Pin Controlled by PA0 */ -#define PIO_PA1 (1 << 1) /**< \brief Pin Controlled by PA1 */ -#define PIO_PA2 (1 << 2) /**< \brief Pin Controlled by PA2 */ -#define PIO_PA3 (1 << 3) /**< \brief Pin Controlled by PA3 */ -#define PIO_PA4 (1 << 4) /**< \brief Pin Controlled by PA4 */ -#define PIO_PA5 (1 << 5) /**< \brief Pin Controlled by PA5 */ -#define PIO_PA6 (1 << 6) /**< \brief Pin Controlled by PA6 */ -#define PIO_PA7 (1 << 7) /**< \brief Pin Controlled by PA7 */ -#define PIO_PA8 (1 << 8) /**< \brief Pin Controlled by PA8 */ -#define PIO_PA9 (1 << 9) /**< \brief Pin Controlled by PA9 */ -#define PIO_PA10 (1 << 10) /**< \brief Pin Controlled by PA10 */ -#define PIO_PA11 (1 << 11) /**< \brief Pin Controlled by PA11 */ -#define PIO_PA12 (1 << 12) /**< \brief Pin Controlled by PA12 */ -#define PIO_PA13 (1 << 13) /**< \brief Pin Controlled by PA13 */ -#define PIO_PA14 (1 << 14) /**< \brief Pin Controlled by PA14 */ -#define PIO_PA15 (1 << 15) /**< \brief Pin Controlled by PA15 */ -#define PIO_PA16 (1 << 16) /**< \brief Pin Controlled by PA16 */ -#define PIO_PA17 (1 << 17) /**< \brief Pin Controlled by PA17 */ -#define PIO_PA18 (1 << 18) /**< \brief Pin Controlled by PA18 */ -#define PIO_PA19 (1 << 19) /**< \brief Pin Controlled by PA19 */ -#define PIO_PA20 (1 << 20) /**< \brief Pin Controlled by PA20 */ -#define PIO_PA21 (1 << 21) /**< \brief Pin Controlled by PA21 */ -#define PIO_PA22 (1 << 22) /**< \brief Pin Controlled by PA22 */ -#define PIO_PA23 (1 << 23) /**< \brief Pin Controlled by PA23 */ -#define PIO_PA24 (1 << 24) /**< \brief Pin Controlled by PA24 */ -#define PIO_PA25 (1 << 25) /**< \brief Pin Controlled by PA25 */ -#define PIO_PA26 (1 << 26) /**< \brief Pin Controlled by PA26 */ -#define PIO_PA27 (1 << 27) /**< \brief Pin Controlled by PA27 */ -#define PIO_PA28 (1 << 28) /**< \brief Pin Controlled by PA28 */ -#define PIO_PA29 (1 << 29) /**< \brief Pin Controlled by PA29 */ -#define PIO_PA30 (1 << 30) /**< \brief Pin Controlled by PA30 */ -#define PIO_PA31 (1 << 31) /**< \brief Pin Controlled by PA31 */ -#define PIO_PB0 (1 << 0) /**< \brief Pin Controlled by PB0 */ -#define PIO_PB1 (1 << 1) /**< \brief Pin Controlled by PB1 */ -#define PIO_PB2 (1 << 2) /**< \brief Pin Controlled by PB2 */ -#define PIO_PB3 (1 << 3) /**< \brief Pin Controlled by PB3 */ -#define PIO_PB4 (1 << 4) /**< \brief Pin Controlled by PB4 */ -#define PIO_PB5 (1 << 5) /**< \brief Pin Controlled by PB5 */ -#define PIO_PB6 (1 << 6) /**< \brief Pin Controlled by PB6 */ -#define PIO_PB7 (1 << 7) /**< \brief Pin Controlled by PB7 */ -#define PIO_PB8 (1 << 8) /**< \brief Pin Controlled by PB8 */ -#define PIO_PB9 (1 << 9) /**< \brief Pin Controlled by PB9 */ -#define PIO_PB10 (1 << 10) /**< \brief Pin Controlled by PB10 */ -#define PIO_PB11 (1 << 11) /**< \brief Pin Controlled by PB11 */ -#define PIO_PB12 (1 << 12) /**< \brief Pin Controlled by PB12 */ -#define PIO_PB13 (1 << 13) /**< \brief Pin Controlled by PB13 */ -#define PIO_PB14 (1 << 14) /**< \brief Pin Controlled by PB14 */ -#define PIO_PC0 (1 << 0) /**< \brief Pin Controlled by PC0 */ -#define PIO_PC1 (1 << 1) /**< \brief Pin Controlled by PC1 */ -#define PIO_PC2 (1 << 2) /**< \brief Pin Controlled by PC2 */ -#define PIO_PC3 (1 << 3) /**< \brief Pin Controlled by PC3 */ -#define PIO_PC4 (1 << 4) /**< \brief Pin Controlled by PC4 */ -#define PIO_PC5 (1 << 5) /**< \brief Pin Controlled by PC5 */ -#define PIO_PC6 (1 << 6) /**< \brief Pin Controlled by PC6 */ -#define PIO_PC7 (1 << 7) /**< \brief Pin Controlled by PC7 */ -#define PIO_PC8 (1 << 8) /**< \brief Pin Controlled by PC8 */ -#define PIO_PC9 (1 << 9) /**< \brief Pin Controlled by PC9 */ -#define PIO_PC10 (1 << 10) /**< \brief Pin Controlled by PC10 */ -#define PIO_PC11 (1 << 11) /**< \brief Pin Controlled by PC11 */ -#define PIO_PC12 (1 << 12) /**< \brief Pin Controlled by PC12 */ -#define PIO_PC13 (1 << 13) /**< \brief Pin Controlled by PC13 */ -#define PIO_PC14 (1 << 14) /**< \brief Pin Controlled by PC14 */ -#define PIO_PC15 (1 << 15) /**< \brief Pin Controlled by PC15 */ -#define PIO_PC16 (1 << 16) /**< \brief Pin Controlled by PC16 */ -#define PIO_PC17 (1 << 17) /**< \brief Pin Controlled by PC17 */ -#define PIO_PC18 (1 << 18) /**< \brief Pin Controlled by PC18 */ -#define PIO_PC19 (1 << 19) /**< \brief Pin Controlled by PC19 */ -#define PIO_PC20 (1 << 20) /**< \brief Pin Controlled by PC20 */ -#define PIO_PC21 (1 << 21) /**< \brief Pin Controlled by PC21 */ -#define PIO_PC22 (1 << 22) /**< \brief Pin Controlled by PC22 */ -#define PIO_PC23 (1 << 23) /**< \brief Pin Controlled by PC23 */ -#define PIO_PC24 (1 << 24) /**< \brief Pin Controlled by PC24 */ -#define PIO_PC25 (1 << 25) /**< \brief Pin Controlled by PC25 */ -#define PIO_PC26 (1 << 26) /**< \brief Pin Controlled by PC26 */ -#define PIO_PC27 (1 << 27) /**< \brief Pin Controlled by PC27 */ -#define PIO_PC28 (1 << 28) /**< \brief Pin Controlled by PC28 */ -#define PIO_PC29 (1 << 29) /**< \brief Pin Controlled by PC29 */ -#define PIO_PC30 (1 << 30) /**< \brief Pin Controlled by PC30 */ -#define PIO_PC31 (1 << 31) /**< \brief Pin Controlled by PC31 */ -/* ========== Pio definition for HSMCI peripheral ========== */ -#define PIO_PA28C_MCCDA (1 << 28) /**< \brief Hsmci signal: MCCDA */ -#define PIO_PA29C_MCCK (1 << 29) /**< \brief Hsmci signal: MCCK */ -#define PIO_PA30C_MCDA0 (1 << 30) /**< \brief Hsmci signal: MCDA0 */ -#define PIO_PA31C_MCDA1 (1 << 31) /**< \brief Hsmci signal: MCDA1 */ -#define PIO_PA26C_MCDA2 (1 << 26) /**< \brief Hsmci signal: MCDA2 */ -#define PIO_PA27C_MCDA3 (1 << 27) /**< \brief Hsmci signal: MCDA3 */ -/* ========== Pio definition for SSC peripheral ========== */ -#define PIO_PA18A_RD (1 << 18) /**< \brief Ssc signal: RD */ -#define PIO_PA20A_RF (1 << 20) /**< \brief Ssc signal: RF */ -#define PIO_PA19A_RK (1 << 19) /**< \brief Ssc signal: RK */ -#define PIO_PA17A_TD (1 << 17) /**< \brief Ssc signal: TD */ -#define PIO_PA15A_TF (1 << 15) /**< \brief Ssc signal: TF */ -#define PIO_PA16A_TK (1 << 16) /**< \brief Ssc signal: TK */ -/* ========== Pio definition for SPI peripheral ========== */ -#define PIO_PA12A_MISO (1 << 12) /**< \brief Spi signal: MISO */ -#define PIO_PA13A_MOSI (1 << 13) /**< \brief Spi signal: MOSI */ -#define PIO_PA11A_NPCS0 (1 << 11) /**< \brief Spi signal: NPCS0 */ -#define PIO_PA31A_NPCS1 (1 << 31) /**< \brief Spi signal: NPCS1 */ -#define PIO_PA9B_NPCS1 (1 << 9) /**< \brief Spi signal: NPCS1 */ -#define PIO_PB14A_NPCS1 (1 << 14) /**< \brief Spi signal: NPCS1 */ -#define PIO_PC4B_NPCS1 (1 << 4) /**< \brief Spi signal: NPCS1 */ -#define PIO_PA10B_NPCS2 (1 << 10) /**< \brief Spi signal: NPCS2 */ -#define PIO_PA30B_NPCS2 (1 << 30) /**< \brief Spi signal: NPCS2 */ -#define PIO_PB2B_NPCS2 (1 << 2) /**< \brief Spi signal: NPCS2 */ -#define PIO_PA22B_NPCS3 (1 << 22) /**< \brief Spi signal: NPCS3 */ -#define PIO_PA3B_NPCS3 (1 << 3) /**< \brief Spi signal: NPCS3 */ -#define PIO_PA5B_NPCS3 (1 << 5) /**< \brief Spi signal: NPCS3 */ -#define PIO_PA14A_SPCK (1 << 14) /**< \brief Spi signal: SPCK */ -/* ========== Pio definition for TC0 peripheral ========== */ -#define PIO_PA4B_TCLK0 (1 << 4) /**< \brief Tc0 signal: TCLK0 */ -#define PIO_PA28B_TCLK1 (1 << 28) /**< \brief Tc0 signal: TCLK1 */ -#define PIO_PA29B_TCLK2 (1 << 29) /**< \brief Tc0 signal: TCLK2 */ -#define PIO_PA0B_TIOA0 (1 << 0) /**< \brief Tc0 signal: TIOA0 */ -#define PIO_PA15B_TIOA1 (1 << 15) /**< \brief Tc0 signal: TIOA1 */ -#define PIO_PA26B_TIOA2 (1 << 26) /**< \brief Tc0 signal: TIOA2 */ -#define PIO_PA1B_TIOB0 (1 << 1) /**< \brief Tc0 signal: TIOB0 */ -#define PIO_PA16B_TIOB1 (1 << 16) /**< \brief Tc0 signal: TIOB1 */ -#define PIO_PA27B_TIOB2 (1 << 27) /**< \brief Tc0 signal: TIOB2 */ -/* ========== Pio definition for TC1 peripheral ========== */ -#define PIO_PC25B_TCLK3 (1 << 25) /**< \brief Tc1 signal: TCLK3 */ -#define PIO_PC28B_TCLK4 (1 << 28) /**< \brief Tc1 signal: TCLK4 */ -#define PIO_PC31B_TCLK5 (1 << 31) /**< \brief Tc1 signal: TCLK5 */ -#define PIO_PC23B_TIOA3 (1 << 23) /**< \brief Tc1 signal: TIOA3 */ -#define PIO_PC26B_TIOA4 (1 << 26) /**< \brief Tc1 signal: TIOA4 */ -#define PIO_PC29B_TIOA5 (1 << 29) /**< \brief Tc1 signal: TIOA5 */ -#define PIO_PC24B_TIOB3 (1 << 24) /**< \brief Tc1 signal: TIOB3 */ -#define PIO_PC27B_TIOB4 (1 << 27) /**< \brief Tc1 signal: TIOB4 */ -#define PIO_PC30B_TIOB5 (1 << 30) /**< \brief Tc1 signal: TIOB5 */ -/* ========== Pio definition for TWI0 peripheral ========== */ -#define PIO_PA4A_TWCK0 (1 << 4) /**< \brief Twi0 signal: TWCK0 */ -#define PIO_PA3A_TWD0 (1 << 3) /**< \brief Twi0 signal: TWD0 */ -/* ========== Pio definition for TWI1 peripheral ========== */ -#define PIO_PB5A_TWCK1 (1 << 5) /**< \brief Twi1 signal: TWCK1 */ -#define PIO_PB4A_TWD1 (1 << 4) /**< \brief Twi1 signal: TWD1 */ -/* ========== Pio definition for PWM peripheral ========== */ -#define PIO_PA9C_PWMFI0 (1 << 9) /**< \brief Pwm signal: PWMFI0 */ -#define PIO_PA0A_PWMH0 (1 << 0) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA11B_PWMH0 (1 << 11) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA23B_PWMH0 (1 << 23) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PB0A_PWMH0 (1 << 0) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PC18B_PWMH0 (1 << 18) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA1A_PWMH1 (1 << 1) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA12B_PWMH1 (1 << 12) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA24B_PWMH1 (1 << 24) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PB1A_PWMH1 (1 << 1) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PC19B_PWMH1 (1 << 19) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA13B_PWMH2 (1 << 13) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA2A_PWMH2 (1 << 2) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA25B_PWMH2 (1 << 25) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PB4B_PWMH2 (1 << 4) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PC20B_PWMH2 (1 << 20) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA14B_PWMH3 (1 << 14) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PA17C_PWMH3 (1 << 17) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PA7B_PWMH3 (1 << 7) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PB14B_PWMH3 (1 << 14) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PC21B_PWMH3 (1 << 21) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PA19B_PWML0 (1 << 19) /**< \brief Pwm signal: PWML0 */ -#define PIO_PB5B_PWML0 (1 << 5) /**< \brief Pwm signal: PWML0 */ -#define PIO_PC0B_PWML0 (1 << 0) /**< \brief Pwm signal: PWML0 */ -#define PIO_PC13B_PWML0 (1 << 13) /**< \brief Pwm signal: PWML0 */ -#define PIO_PA20B_PWML1 (1 << 20) /**< \brief Pwm signal: PWML1 */ -#define PIO_PB12A_PWML1 (1 << 12) /**< \brief Pwm signal: PWML1 */ -#define PIO_PC1B_PWML1 (1 << 1) /**< \brief Pwm signal: PWML1 */ -#define PIO_PC15B_PWML1 (1 << 15) /**< \brief Pwm signal: PWML1 */ -#define PIO_PA16C_PWML2 (1 << 16) /**< \brief Pwm signal: PWML2 */ -#define PIO_PA30A_PWML2 (1 << 30) /**< \brief Pwm signal: PWML2 */ -#define PIO_PB13A_PWML2 (1 << 13) /**< \brief Pwm signal: PWML2 */ -#define PIO_PC2B_PWML2 (1 << 2) /**< \brief Pwm signal: PWML2 */ -#define PIO_PA15C_PWML3 (1 << 15) /**< \brief Pwm signal: PWML3 */ -#define PIO_PC22B_PWML3 (1 << 22) /**< \brief Pwm signal: PWML3 */ -#define PIO_PC3B_PWML3 (1 << 3) /**< \brief Pwm signal: PWML3 */ -/* ========== Pio definition for USART0 peripheral ========== */ -#define PIO_PA8A_CTS0 (1 << 8) /**< \brief Usart0 signal: CTS0 */ -#define PIO_PA7A_RTS0 (1 << 7) /**< \brief Usart0 signal: RTS0 */ -#define PIO_PA5A_RXD0 (1 << 5) /**< \brief Usart0 signal: RXD0 */ -#define PIO_PA2B_SCK0 (1 << 2) /**< \brief Usart0 signal: SCK0 */ -#define PIO_PA6A_TXD0 (1 << 6) /**< \brief Usart0 signal: TXD0 */ -/* ========== Pio definition for USART1 peripheral ========== */ -#define PIO_PA25A_CTS1 (1 << 25) /**< \brief Usart1 signal: CTS1 */ -#define PIO_PA26A_DCD1 (1 << 26) /**< \brief Usart1 signal: DCD1 */ -#define PIO_PA28A_DSR1 (1 << 28) /**< \brief Usart1 signal: DSR1 */ -#define PIO_PA27A_DTR1 (1 << 27) /**< \brief Usart1 signal: DTR1 */ -#define PIO_PA29A_RI1 (1 << 29) /**< \brief Usart1 signal: RI1 */ -#define PIO_PA24A_RTS1 (1 << 24) /**< \brief Usart1 signal: RTS1 */ -#define PIO_PA21A_RXD1 (1 << 21) /**< \brief Usart1 signal: RXD1 */ -#define PIO_PA23A_SCK1 (1 << 23) /**< \brief Usart1 signal: SCK1 */ -#define PIO_PA22A_TXD1 (1 << 22) /**< \brief Usart1 signal: TXD1 */ -/* ========== Pio definition for ADC peripheral ========== */ -#define PIO_PA17X1_AD0 (1 << 17) /**< \brief Adc signal: AD0 */ -#define PIO_PA18X1_AD1 (1 << 18) /**< \brief Adc signal: AD1 */ -#define PIO_PC13X1_AD10 (1 << 13) /**< \brief Adc signal: AD10 */ -#define PIO_PC15X1_AD11 (1 << 15) /**< \brief Adc signal: AD11 */ -#define PIO_PC12X1_AD12 (1 << 12) /**< \brief Adc signal: AD12 */ -#define PIO_PC29X1_AD13 (1 << 29) /**< \brief Adc signal: AD13 */ -#define PIO_PC30X1_AD14 (1 << 30) /**< \brief Adc signal: AD14 */ -#define PIO_PA19X1_AD2 (1 << 19) /**< \brief Adc signal: AD2 */ -#define PIO_PA20X1_AD3 (1 << 20) /**< \brief Adc signal: AD3 */ -#define PIO_PB0X1_AD4 (1 << 0) /**< \brief Adc signal: AD4 */ -#define PIO_PB1X1_AD5 (1 << 1) /**< \brief Adc signal: AD5 */ -#define PIO_PB2X1_AD6 (1 << 2) /**< \brief Adc signal: AD6 */ -#define PIO_PB3X1_AD7 (1 << 3) /**< \brief Adc signal: AD7 */ -#define PIO_PA21X1_AD8 (1 << 21) /**< \brief Adc signal: AD8 */ -#define PIO_PA22X1_AD9 (1 << 22) /**< \brief Adc signal: AD9 */ -#define PIO_PA8B_ADTRG (1 << 8) /**< \brief Adc signal: ADTRG */ -/* ========== Pio definition for DACC peripheral ========== */ -#define PIO_PB13X1_DAC0 (1 << 13) /**< \brief Dacc signal: DAC0 */ -#define PIO_PB14X1_DAC1 (1 << 14) /**< \brief Dacc signal: DAC1 */ -#define PIO_PA2C_DATRG (1 << 2) /**< \brief Dacc signal: DATRG */ -/* ========== Pio definition for PMC peripheral ========== */ -#define PIO_PA6B_PCK0 (1 << 6) /**< \brief Pmc signal: PCK0 */ -#define PIO_PB13B_PCK0 (1 << 13) /**< \brief Pmc signal: PCK0 */ -#define PIO_PA17B_PCK1 (1 << 17) /**< \brief Pmc signal: PCK1 */ -#define PIO_PA21B_PCK1 (1 << 21) /**< \brief Pmc signal: PCK1 */ -#define PIO_PA18B_PCK2 (1 << 18) /**< \brief Pmc signal: PCK2 */ -#define PIO_PA31B_PCK2 (1 << 31) /**< \brief Pmc signal: PCK2 */ -#define PIO_PB3B_PCK2 (1 << 3) /**< \brief Pmc signal: PCK2 */ -/* ========== Pio definition for UART0 peripheral ========== */ -#define PIO_PA9A_URXD0 (1 << 9) /**< \brief Uart0 signal: URXD0 */ -#define PIO_PA10A_UTXD0 (1 << 10) /**< \brief Uart0 signal: UTXD0 */ -/* ========== Pio definition for UART1 peripheral ========== */ -#define PIO_PB2A_URXD1 (1 << 2) /**< \brief Uart1 signal: URXD1 */ -#define PIO_PB3A_UTXD1 (1 << 3) /**< \brief Uart1 signal: UTXD1 */ -/* ========== Pio definition for PIOA peripheral ========== */ -#define PIO_PA24X1_PIODC0 (1 << 24) /**< \brief Pioa signal: PIODC0 */ -#define PIO_PA25X1_PIODC1 (1 << 25) /**< \brief Pioa signal: PIODC1 */ -#define PIO_PA26X1_PIODC2 (1 << 26) /**< \brief Pioa signal: PIODC2 */ -#define PIO_PA27X1_PIODC3 (1 << 27) /**< \brief Pioa signal: PIODC3 */ -#define PIO_PA28X1_PIODC4 (1 << 28) /**< \brief Pioa signal: PIODC4 */ -#define PIO_PA29X1_PIODC5 (1 << 29) /**< \brief Pioa signal: PIODC5 */ -#define PIO_PA30X1_PIODC6 (1 << 30) /**< \brief Pioa signal: PIODC6 */ -#define PIO_PA31X1_PIODC7 (1 << 31) /**< \brief Pioa signal: PIODC7 */ -#define PIO_PA23X1_PIODCCLK (1 << 23) /**< \brief Pioa signal: PIODCCLK */ -#define PIO_PA15X1_PIODCEN1 (1 << 15) /**< \brief Pioa signal: PIODCEN1 */ -#define PIO_PA16X1_PIODCEN2 (1 << 16) /**< \brief Pioa signal: PIODCEN2 */ -/*@}*/ - -/* ***************************************************************************** */ -/* MEMORY MAPPING DEFINITIONS FOR AT91SAM3S */ -/* ***************************************************************************** */ - -#define AT91C_IRAM (0x20000000) /**< Internal RAM base address */ -#define AT91C_IFLASH (0x00400000) /**< Internal Flash base address */ -#define AT91C_IROM (0x00800000) /**< Internal ROM base address */ -#define AT91C_IRAM (0x20000000) /**< Internal RAM base address */ -#define AT91C_EBI_CS0 (0x60000000) /**< EBI Chip Select 0 base address */ -#define AT91C_EBI_CS1 (0x61000000) /**< EBI Chip Select 1 base address */ -#define AT91C_EBI_CS2 (0x62000000) /**< EBI Chip Select 2 base address */ -#define AT91C_EBI_CS3 (0x63000000) /**< EBI Chip Select 3 base address */ - -#ifdef __cplusplus -} -#endif - -/*@}*/ - -#endif /* AT91SAM3S_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/chip.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/chip.h deleted file mode 100644 index 8b698408..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/chip.h +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// !Purpose -/// -/// Definition of AT91SAM3S4 characteristics and features -/// -/// !Usage -/// -# For ARM core feature, see "AT91SAM3S4 - ARM core features". -/// -# For IP features, see "AT91SAM3S4 - IP features". -/// -# For misc, see "AT91SAM3S4 - Misc". -//------------------------------------------------------------------------------ - -#ifndef CHIP_H -#define CHIP_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \page "AT91SAM3S4 - ARM core features" -/// This page lists several characteristics related to the ARM core -/// - -//ARM core features - -/// ARM core definition. -#define cortexm3 - -/// family definition. -#define at91sam3s - -//------------------------------------------------------------------------------ -/// \page "AT91SAM3S4 - IP features" -/// This page lists several characteristics related to the embedded IP -/// - -//IP FEATURES - -// EFC GPNVM number -#define CHIP_EFC_NUM_GPNVMS 3 - -/// Indicates chip has an Enhanced EFC. -#define CHIP_FLASH_EEFC - -// DMA channels number -#define CHIP_DMA_CHANNEL_NUM 4 - -// Indicate chip's MCI interface. -#define MCI2_INTERFACE - -// Indicate chip SSC has DMA interface. -#define CHIP_SSC_DMA - -// Indicate chip SPI has DMA interface. -#define CHIP_SPI_DMA - -/// Indicates chip has an UDP Full Speed. -#define CHIP_USB_UDP - -/// Indicates chip has an internal pull-up. -#define CHIP_USB_PULLUP_INTERNAL - -/// Number of USB endpoints -#define CHIP_USB_NUMENDPOINTS 8 - -/// Endpoints max paxcket size -#define CHIP_USB_ENDPOINTS_MAXPACKETSIZE(i) \ - ((i == 0) ? 64 : \ - ((i == 1) ? 64 : \ - ((i == 2) ? 64 : \ - ((i == 3) ? 64 : \ - ((i == 4) ? 512 : \ - ((i == 5) ? 512 : \ - ((i == 6) ? 64 : \ - ((i == 7) ? 64 : 0 )))))))) - -/// Endpoints Number of Bank -#define CHIP_USB_ENDPOINTS_BANKS(i) \ - ((i == 0) ? 1 : \ - ((i == 1) ? 2 : \ - ((i == 2) ? 2 : \ - ((i == 3) ? 1 : \ - ((i == 4) ? 2 : \ - ((i == 5) ? 2 : \ - ((i == 6) ? 2 : \ - ((i == 7) ? 2 : 0 )))))))) - -//------------------------------------------------------------------------------ -/// \page "AT91SAM3S4 - Misc " -/// This page lists misc features -/// - -//Misc - -#endif //#ifndef CHIP_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/flash.icf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/flash.icf deleted file mode 100644 index 65ac3312..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/flash.icf +++ /dev/null @@ -1,30 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ -/*-Vector table start*/ -define symbol __ICFEDIT_vector_start__ = 0x000400000; /*Add for CMSIS*/ -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; -define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; -define symbol __ICFEDIT_region_ROM_start__ = 0x00400000; -define symbol __ICFEDIT_region_ROM_end__ = 0x0043FFFF; -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x800; -define symbol __ICFEDIT_size_heap__ = 0x200; - -export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/ -/**** End of ICF editor section. ###ICF###*/ - -define memory mem with size = 4G; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; -define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; - -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - -initialize by copy { readwrite }; -do not initialize { section .noinit }; - -place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; /*Add for CMSIS*/ -place in ROM_region { readonly }; -place in RAM_region { readwrite,,block CSTACK, block HEAP }; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/flash.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/flash.lds deleted file mode 100644 index 9d01841e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/flash.lds +++ /dev/null @@ -1,81 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal FLASH on the AT91SAM3S4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(ResetException) - -/* Memory Spaces Definitions */ -MEMORY -{ - sram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x0000C000 /* sram, 48K */ - flash (W!RX) : ORIGIN = 0x00400000, LENGTH = 0x00040000 /* Flash, 256K */ -} - -SECTIONS -{ - .fixed : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) - *(.text*) - *(.rodata*) - *(.glue_7) - *(.glue_7t) - . = ALIGN(4); - _efixed = .; /* End of text section */ - } >flash - - .relocate : AT (_efixed) - { - . = ALIGN(4); - _srelocate = .; - *(.ramfunc); - *(.data); - . = ALIGN(4); - _erelocate = .; - } >sram - - .bss (NOLOAD) : { - . = ALIGN(4); - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >sram - - /* Stack in the end of SRAM */ - _estack = 0x2000BFFC; -} -end = .; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/sram.icf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/sram.icf deleted file mode 100644 index 22eb374b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/sram.icf +++ /dev/null @@ -1,27 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ -/*-Vector table start*/ -define symbol __ICFEDIT_vector_start__ = 0x20000000; -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; -define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x900; -define symbol __ICFEDIT_size_heap__ = 0x200; -/*-Exports-*/ -export symbol __ICFEDIT_vector_start__; -/**** End of ICF editor section. ###ICF###*/ - -define memory mem with size = 4G; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; - -/* define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { }; */ -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - -initialize by copy { readwrite }; -do not initialize { section .noinit }; - -place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; -place in RAM_region { readonly, readwrite, block CSTACK, block HEAP }; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/sram.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/sram.lds deleted file mode 100644 index 2d38cfcc..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/sram.lds +++ /dev/null @@ -1,81 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal SRAM on the AT91SAM3S4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(ResetException) - -/* Memory Spaces Definitions */ -MEMORY -{ - sram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x0000C000 /* sram, 48K */ -} - -SECTIONS -{ - .fixed : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) - *(.text*) - *(.ramfunc) - *(.rodata*) - *(.glue_7) - *(.glue_7t) - . = ALIGN(4); - _efixed = .; /* End of text section */ - } > sram - - .relocate : AT (_efixed) - { - . = ALIGN(4); - _srelocate = .; - *(.data) - . = ALIGN(4); - _erelocate = .; - } >sram - - .bss (NOLOAD) : { - . = ALIGN(4); - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >sram - - /* Stack in the end of SRAM */ - _estack = 0x2000BFFC; - -} -end = .; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/sram_flashloader.icf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/sram_flashloader.icf deleted file mode 100644 index a954d2cb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/sram_flashloader.icf +++ /dev/null @@ -1,33 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ -/*-Specials-*/ -define symbol __ICFEDIT_intvec_start__ = 0x20000000; -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_ROM_start__ = 0x0; -define symbol __ICFEDIT_region_ROM_end__ = 0x0; -define symbol __ICFEDIT_region_RAM_start__ = 0x20000040; -define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; - -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x0200; -define symbol __ICFEDIT_size_heap__ = 0x000; -/**** End of ICF editor section. ###ICF###*/ - - -define memory mem with size = 4G; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; - -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - -//initialize by copy { readwrite }; -do not initialize { section .noinit }; - -place at address mem:__ICFEDIT_intvec_start__ { section .intvec }; - -place at start of RAM_region { block RamTop with fixed order {readonly, section LOWEND}}; -place at end of RAM_region { block RamBottom with fixed order {section HIGHSTART, readwrite, section .init, - block CSTACK, block HEAP}}; - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/sram_samba.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/sram_samba.lds deleted file mode 100644 index 16b1dc96..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3s4/sram_samba.lds +++ /dev/null @@ -1,91 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal SRAM on the AT91SAM3S4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(entry) - -/* Memory Spaces Definitions */ -MEMORY -{ - romcodesram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x01000 - sram (W!RX) : ORIGIN = 0x20001000, LENGTH = 0x0000B000 /* sram, 48K - sizeof(romcodesram) */ -} - -/* Entry point */ -/*ENTRY (ResetException)*/ - -SECTIONS -{ - /* startup code in the .isr_vector */ - .text : - { - . = ALIGN(4); - _stext = .; - KEEP(*(.isr_vector .isr_vector.*)) - *(.mailbox) - *(.text .text.*) - *(.rodata .rodata.*) - *(.glue_7) - *(.glue_7t) - *(.gcc_except_table) - *(.rodata .rodata*) - *(.gnu.linkonce.r.*) - . = ALIGN(4); - _etext = .; - } > sram - - /* data */ - .data : - { - . = ALIGN(4); - _sidata = .; - _sdata = .; - - *(.data) - *(.data.*) - . = ALIGN(4); - _edata = .; - } > sram - - .bss (NOLOAD) : { - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >sram - - /* Stack in SRAM */ - _sstack = 0x2000BFFC; -} -end = .; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/AT91SAM3U4.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/AT91SAM3U4.h deleted file mode 100644 index 64101aa0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/AT91SAM3U4.h +++ /dev/null @@ -1,7439 +0,0 @@ -/* ---------------------------------------------------------------------------- */ -/* Atmel Microcontroller Software Support */ -/* ---------------------------------------------------------------------------- */ -/* Copyright (c) 2009, Atmel Corporation */ -/* */ -/* All rights reserved. */ -/* */ -/* Redistribution and use in source and binary forms, with or without */ -/* modification, are permitted provided that the following condition is met: */ -/* */ -/* - Redistributions of source code must retain the above copyright notice, */ -/* this list of conditions and the disclaimer below. */ -/* */ -/* Atmel's name may not be used to endorse or promote products derived from */ -/* this software without specific prior written permission. */ -/* */ -/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ -/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ -/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ -/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ -/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ -/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ -/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ -/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ -/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ -/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* ---------------------------------------------------------------------------- */ -/* */ -/* File Name : AT91SAM3U.h */ -/* Object : AT91SAM3U definitions */ -/* Generated by : AT91 SW Application Group */ -/* Generated on : 2009-09-10 */ - -#ifndef AT91SAM3U_H -#define AT91SAM3U_H - -/** \addtogroup AT91SAM3U_definitions AT91SAM3U definitions - This file defines all structures and symbols for AT91SAM3U: - - registers and bitfields - - peripheral base address - - peripheral ID - - PIO definitions -*/ -/*@{*/ - -#ifdef __cplusplus - extern "C" { -#endif - -#ifndef __ASSEMBLY__ -#include -#ifndef __cplusplus -typedef volatile const uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */ -#else -typedef volatile uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */ -#endif -typedef volatile uint32_t WoReg; /**< Write only 32-bit register (volatile unsigned int) */ -typedef volatile uint32_t RwReg; /**< Read-Write 32-bit register (volatile unsigned int) */ -#define CAST(type, value) ((type *) value) -#define REG_ACCESS(type, address) (*(type*)address) /**< C code: Register value */ -#else -#define CAST(type, value) (value) -#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */ -#endif - -/* ***************************************************************************** */ -/* CMSIS DEFINITIONS FOR AT91SAM3U */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3U_cmsis CMSIS Definitions */ - -/*@{*/ - -/** - * \brief Configuration of the Cortex-M3 Processor and Core Peripherals - */ -#define __MPU_PRESENT 0 /**< AT91SAM3U does not provide a MPU present or not */ -#define __NVIC_PRIO_BITS 4 /**< AT91SAM3U uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /**< Set to 1 if different SysTick Config is used */ - -/**< Interrupt Number Definition */ -typedef enum IRQn -{ -/****** Cortex-M3 Processor Exceptions Numbers ***************************************/ - NonMaskableInt_IRQn = -14, /**< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /**< 4 Cortex-M3 Memory Management Interrupt */ - BusFault_IRQn = -11, /**< 5 Cortex-M3 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /**< 6 Cortex-M3 Usage Fault Interrupt */ - SVCall_IRQn = -5, /**< 11 Cortex-M3 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /**< 12 Cortex-M3 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /**< 14 Cortex-M3 Pend SV Interrupt */ - SysTick_IRQn = -1, /**< 15 Cortex-M3 System Tick Interrupt */ -/****** AT91SAM3U specific Interrupt Numbers *****************************************/ - - SUPC_IRQn = 0, /**< 0 AT91SAM3U Supply Controller (SUPC) */ - RSTC_IRQn = 1, /**< 1 AT91SAM3U Reset Controller (RSTC) */ - RTC_IRQn = 2, /**< 2 AT91SAM3U Real Time Clock (RTC) */ - RTT_IRQn = 3, /**< 3 AT91SAM3U Real Time Timer (RTT) */ - WDT_IRQn = 4, /**< 4 AT91SAM3U Watchdog Timer (WDT) */ - PMC_IRQn = 5, /**< 5 AT91SAM3U Power Management Controller (PMC) */ - EFC0_IRQn = 6, /**< 6 AT91SAM3U Enhanced Embedded Flash Controller 0 (EFC0) */ - EFC1_IRQn = 7, /**< 7 AT91SAM3U Enhanced Embedded Flash Controller 1 (EFC1) */ - UART_IRQn = 8, /**< 8 AT91SAM3U Universal Asynchronous Receiver Transmitter (UART) */ - SMC_IRQn = 9, /**< 9 AT91SAM3U Static Memory Controller (SMC) */ - PIOA_IRQn = 10, /**< 10 AT91SAM3U Parallel I/O Controller A, (PIOA) */ - PIOB_IRQn = 11, /**< 11 AT91SAM3U Parallel I/O Controller B (PIOB) */ - PIOC_IRQn = 12, /**< 12 AT91SAM3U Parallel I/O Controller C (PIOC) */ - USART0_IRQn = 13, /**< 13 AT91SAM3U USART 0 (USART0) */ - USART1_IRQn = 14, /**< 14 AT91SAM3U USART 1 (USART1) */ - USART2_IRQn = 15, /**< 15 AT91SAM3U USART 2 (USART2) */ - USART3_IRQn = 16, /**< 16 AT91SAM3U USART 3 (USART3) */ - HSMCI_IRQn = 17, /**< 17 AT91SAM3U High Speed Multimedia Card Interface (HSMCI) */ - TWI0_IRQn = 18, /**< 18 AT91SAM3U Two-Wire Interface 0 (TWI0) */ - TWI1_IRQn = 19, /**< 19 AT91SAM3U Two-Wire Interface 1 (TWI1) */ - SPI_IRQn = 20, /**< 20 AT91SAM3U Serial Peripheral Interface (SPI) */ - SSC_IRQn = 21, /**< 21 AT91SAM3U Synchronous Serial Controller (SSC) */ - TC0_IRQn = 22, /**< 22 AT91SAM3U Timer Counter 0 (TC0) */ - TC1_IRQn = 23, /**< 23 AT91SAM3U Timer Counter 1 (TC1) */ - TC2_IRQn = 24, /**< 24 AT91SAM3U Timer Counter 2 (TC2) */ - PWM_IRQn = 25, /**< 25 AT91SAM3U Pulse Width Modulation Controller (PWM) */ - ADC12B_IRQn = 26, /**< 26 AT91SAM3U 12-bit ADC Controller (ADC12B) */ - ADC_IRQn = 27, /**< 27 AT91SAM3U 10-bit ADC Controller (ADC) */ - DMAC_IRQn = 28, /**< 28 AT91SAM3U DMA Controller (DMAC) */ - UDPHS_IRQn = 29, /**< 29 AT91SAM3U USB Device High Speed (UDPHS) */ -} IRQn_Type; -/*@}*/ - -/* ***************************************************************************** */ -/** SOFTWARE PERIPHERAL API DEFINITION FOR AT91SAM3U */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3U_api Peripheral Software API */ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Analog-to-digital Converter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_ADC12B Analog-to-digital Converter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Adc12b hardware registers */ -typedef struct { - WoReg ADC_CR; /**< \brief (Adc12b Offset: 0x00) Control Register */ - RwReg ADC_MR; /**< \brief (Adc12b Offset: 0x04) Mode Register */ - RwReg Reserved1[2]; - WoReg ADC_CHER; /**< \brief (Adc12b Offset: 0x10) Channel Enable Register */ - WoReg ADC_CHDR; /**< \brief (Adc12b Offset: 0x14) Channel Disable Register */ - RoReg ADC_CHSR; /**< \brief (Adc12b Offset: 0x18) Channel Status Register */ - RoReg ADC_SR; /**< \brief (Adc12b Offset: 0x1C) Status Register */ - RoReg ADC_LCDR; /**< \brief (Adc12b Offset: 0x20) Last Converted Data Register */ - WoReg ADC_IER; /**< \brief (Adc12b Offset: 0x24) Interrupt Enable Register */ - WoReg ADC_IDR; /**< \brief (Adc12b Offset: 0x28) Interrupt Disable Register */ - RoReg ADC_IMR; /**< \brief (Adc12b Offset: 0x2C) Interrupt Mask Register */ - RoReg ADC_CDR[8]; /**< \brief (Adc12b Offset: 0x30) Channel Data Register */ - RwReg Reserved2[5]; - RwReg ADC_ACR; /**< \brief (Adc12b Offset: 0x64) Analog Control Register */ - RwReg ADC_EMR; /**< \brief (Adc12b Offset: 0x68) Extended Mode Register */ - RwReg Reserved3[37]; - RwReg ADC_RPR; /**< \brief (Adc12b Offset: 0x100) Receive Pointer Register */ - RwReg ADC_RCR; /**< \brief (Adc12b Offset: 0x104) Receive Counter Register */ - RwReg ADC_TPR; /**< \brief (Adc12b Offset: 0x108) Transmit Pointer Register */ - RwReg ADC_TCR; /**< \brief (Adc12b Offset: 0x10C) Transmit Counter Register */ - RwReg ADC_RNPR; /**< \brief (Adc12b Offset: 0x110) Receive Next Pointer Register */ - RwReg ADC_RNCR; /**< \brief (Adc12b Offset: 0x114) Receive Next Counter Register */ - RwReg ADC_TNPR; /**< \brief (Adc12b Offset: 0x118) Transmit Next Pointer Register */ - RwReg ADC_TNCR; /**< \brief (Adc12b Offset: 0x11C) Transmit Next Counter Register */ - WoReg ADC_PTCR; /**< \brief (Adc12b Offset: 0x120) Transfer Control Register */ - RoReg ADC_PTSR; /**< \brief (Adc12b Offset: 0x124) Transfer Status Register */ -} Adc12b; -#endif /* __ASSEMBLY__ */ -/* -------- ADC_CR : (ADC12B Offset: 0x00) Control Register -------- */ -#define ADC_CR_SWRST (0x1 << 0) /**< \brief (ADC_CR) Software Reset */ -#define ADC_CR_START (0x1 << 1) /**< \brief (ADC_CR) Start Conversion */ -/* -------- ADC_MR : (ADC12B Offset: 0x04) Mode Register -------- */ -#define ADC_MR_TRGEN (0x1 << 0) /**< \brief (ADC_MR) Trigger Enable */ -#define ADC_MR_TRGSEL (0x7 << 1) /**< \brief (ADC_MR) Trigger Selection */ -#define ADC_MR_LOWRES (0x1 << 4) /**< \brief (ADC_MR) Resolution */ -#define ADC_MR_SLEEP (0x1 << 5) /**< \brief (ADC_MR) Sleep Mode */ -#define ADC_MR_PRESCAL (0xff << 8) /**< \brief (ADC_MR) Prescaler Rate Selection */ -#define ADC_MR_STARTUP (0xff << 16) /**< \brief (ADC_MR) Start Up Time */ -#define ADC_MR_SHTIM (0xf << 24) /**< \brief (ADC_MR) Sample & Hold Time */ -/* -------- ADC_CHER : (ADC12B Offset: 0x10) Channel Enable Register -------- */ -#define ADC_CHER_CH0 (0x1 << 0) /**< \brief (ADC_CHER) Channel 0 Enable */ -#define ADC_CHER_CH1 (0x1 << 1) /**< \brief (ADC_CHER) Channel 1 Enable */ -#define ADC_CHER_CH2 (0x1 << 2) /**< \brief (ADC_CHER) Channel 2 Enable */ -#define ADC_CHER_CH3 (0x1 << 3) /**< \brief (ADC_CHER) Channel 3 Enable */ -#define ADC_CHER_CH4 (0x1 << 4) /**< \brief (ADC_CHER) Channel 4 Enable */ -#define ADC_CHER_CH5 (0x1 << 5) /**< \brief (ADC_CHER) Channel 5 Enable */ -#define ADC_CHER_CH6 (0x1 << 6) /**< \brief (ADC_CHER) Channel 6 Enable */ -#define ADC_CHER_CH7 (0x1 << 7) /**< \brief (ADC_CHER) Channel 7 Enable */ -/* -------- ADC_CHDR : (ADC12B Offset: 0x14) Channel Disable Register -------- */ -#define ADC_CHDR_CH0 (0x1 << 0) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH1 (0x1 << 1) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH2 (0x1 << 2) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH3 (0x1 << 3) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH4 (0x1 << 4) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH5 (0x1 << 5) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH6 (0x1 << 6) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH7 (0x1 << 7) /**< \brief (ADC_CHDR) */ -/* -------- ADC_CHSR : (ADC12B Offset: 0x18) Channel Status Register -------- */ -#define ADC_CHSR_CH0 (0x1 << 0) /**< \brief (ADC_CHSR) Channel 0 Status */ -#define ADC_CHSR_CH1 (0x1 << 1) /**< \brief (ADC_CHSR) Channel 1 Status */ -#define ADC_CHSR_CH2 (0x1 << 2) /**< \brief (ADC_CHSR) Channel 2 Status */ -#define ADC_CHSR_CH3 (0x1 << 3) /**< \brief (ADC_CHSR) Channel 3 Status */ -#define ADC_CHSR_CH4 (0x1 << 4) /**< \brief (ADC_CHSR) Channel 4 Status */ -#define ADC_CHSR_CH5 (0x1 << 5) /**< \brief (ADC_CHSR) Channel 5 Status */ -#define ADC_CHSR_CH6 (0x1 << 6) /**< \brief (ADC_CHSR) Channel 6 Status */ -#define ADC_CHSR_CH7 (0x1 << 7) /**< \brief (ADC_CHSR) Channel 7 Status */ -/* -------- ADC_SR : (ADC12B Offset: 0x1C) Status Register -------- */ -#define ADC_SR_EOC0 (0x1 << 0) /**< \brief (ADC_SR) End of Conversion 0 */ -#define ADC_SR_EOC1 (0x1 << 1) /**< \brief (ADC_SR) End of Conversion 1 */ -#define ADC_SR_EOC2 (0x1 << 2) /**< \brief (ADC_SR) End of Conversion 2 */ -#define ADC_SR_EOC3 (0x1 << 3) /**< \brief (ADC_SR) End of Conversion 3 */ -#define ADC_SR_EOC4 (0x1 << 4) /**< \brief (ADC_SR) End of Conversion 4 */ -#define ADC_SR_EOC5 (0x1 << 5) /**< \brief (ADC_SR) End of Conversion 5 */ -#define ADC_SR_EOC6 (0x1 << 6) /**< \brief (ADC_SR) End of Conversion 6 */ -#define ADC_SR_EOC7 (0x1 << 7) /**< \brief (ADC_SR) End of Conversion 7 */ -#define ADC_SR_OVRE0 (0x1 << 8) /**< \brief (ADC_SR) Overrun Error 0 */ -#define ADC_SR_OVRE1 (0x1 << 9) /**< \brief (ADC_SR) Overrun Error 1 */ -#define ADC_SR_OVRE2 (0x1 << 10) /**< \brief (ADC_SR) Overrun Error 2 */ -#define ADC_SR_OVRE3 (0x1 << 11) /**< \brief (ADC_SR) Overrun Error 3 */ -#define ADC_SR_OVRE4 (0x1 << 12) /**< \brief (ADC_SR) Overrun Error 4 */ -#define ADC_SR_OVRE5 (0x1 << 13) /**< \brief (ADC_SR) Overrun Error 5 */ -#define ADC_SR_OVRE6 (0x1 << 14) /**< \brief (ADC_SR) Overrun Error 6 */ -#define ADC_SR_OVRE7 (0x1 << 15) /**< \brief (ADC_SR) Overrun Error 7 */ -#define ADC_SR_DRDY (0x1 << 16) /**< \brief (ADC_SR) Data Ready */ -#define ADC_SR_GOVRE (0x1 << 17) /**< \brief (ADC_SR) General Overrun Error */ -#define ADC_SR_ENDRX (0x1 << 18) /**< \brief (ADC_SR) End of RX Buffer */ -#define ADC_SR_RXBUFF (0x1 << 19) /**< \brief (ADC_SR) RX Buffer Full */ -/* -------- ADC_LCDR : (ADC12B Offset: 0x20) Last Converted Data Register -------- */ -#define ADC_LCDR_LDATA (0xfff << 0) /**< \brief (ADC_LCDR) Last Data Converted */ -/* -------- ADC_IER : (ADC12B Offset: 0x24) Interrupt Enable Register -------- */ -#define ADC_IER_EOC0 (0x1 << 0) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 0 */ -#define ADC_IER_EOC1 (0x1 << 1) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 1 */ -#define ADC_IER_EOC2 (0x1 << 2) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 2 */ -#define ADC_IER_EOC3 (0x1 << 3) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 3 */ -#define ADC_IER_EOC4 (0x1 << 4) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 4 */ -#define ADC_IER_EOC5 (0x1 << 5) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 5 */ -#define ADC_IER_EOC6 (0x1 << 6) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 6 */ -#define ADC_IER_EOC7 (0x1 << 7) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 7 */ -#define ADC_IER_OVRE0 (0x1 << 8) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 0 */ -#define ADC_IER_OVRE1 (0x1 << 9) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 1 */ -#define ADC_IER_OVRE2 (0x1 << 10) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 2 */ -#define ADC_IER_OVRE3 (0x1 << 11) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 3 */ -#define ADC_IER_OVRE4 (0x1 << 12) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 4 */ -#define ADC_IER_OVRE5 (0x1 << 13) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 5 */ -#define ADC_IER_OVRE6 (0x1 << 14) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 6 */ -#define ADC_IER_OVRE7 (0x1 << 15) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 7 */ -#define ADC_IER_DRDY (0x1 << 16) /**< \brief (ADC_IER) Data Ready Interrupt Enable */ -#define ADC_IER_GOVRE (0x1 << 17) /**< \brief (ADC_IER) General Overrun Error Interrupt Enable */ -#define ADC_IER_ENDRX (0x1 << 18) /**< \brief (ADC_IER) End of Receive Buffer Interrupt Enable */ -#define ADC_IER_RXBUFF (0x1 << 19) /**< \brief (ADC_IER) Receive Buffer Full Interrupt Enable */ -/* -------- ADC_IDR : (ADC12B Offset: 0x28) Interrupt Disable Register -------- */ -#define ADC_IDR_EOC0 (0x1 << 0) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 0 */ -#define ADC_IDR_EOC1 (0x1 << 1) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 1 */ -#define ADC_IDR_EOC2 (0x1 << 2) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 2 */ -#define ADC_IDR_EOC3 (0x1 << 3) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 3 */ -#define ADC_IDR_EOC4 (0x1 << 4) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 4 */ -#define ADC_IDR_EOC5 (0x1 << 5) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 5 */ -#define ADC_IDR_EOC6 (0x1 << 6) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 6 */ -#define ADC_IDR_EOC7 (0x1 << 7) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 7 */ -#define ADC_IDR_OVRE0 (0x1 << 8) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 0 */ -#define ADC_IDR_OVRE1 (0x1 << 9) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 1 */ -#define ADC_IDR_OVRE2 (0x1 << 10) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 2 */ -#define ADC_IDR_OVRE3 (0x1 << 11) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 3 */ -#define ADC_IDR_OVRE4 (0x1 << 12) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 4 */ -#define ADC_IDR_OVRE5 (0x1 << 13) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 5 */ -#define ADC_IDR_OVRE6 (0x1 << 14) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 6 */ -#define ADC_IDR_OVRE7 (0x1 << 15) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 7 */ -#define ADC_IDR_DRDY (0x1 << 16) /**< \brief (ADC_IDR) Data Ready Interrupt Disable */ -#define ADC_IDR_GOVRE (0x1 << 17) /**< \brief (ADC_IDR) General Overrun Error Interrupt Disable */ -#define ADC_IDR_ENDRX (0x1 << 18) /**< \brief (ADC_IDR) End of Receive Buffer Interrupt Disable */ -#define ADC_IDR_RXBUFF (0x1 << 19) /**< \brief (ADC_IDR) Receive Buffer Full Interrupt Disable */ -/* -------- ADC_IMR : (ADC12B Offset: 0x2C) Interrupt Mask Register -------- */ -#define ADC_IMR_EOC0 (0x1 << 0) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 0 */ -#define ADC_IMR_EOC1 (0x1 << 1) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 1 */ -#define ADC_IMR_EOC2 (0x1 << 2) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 2 */ -#define ADC_IMR_EOC3 (0x1 << 3) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 3 */ -#define ADC_IMR_EOC4 (0x1 << 4) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 4 */ -#define ADC_IMR_EOC5 (0x1 << 5) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 5 */ -#define ADC_IMR_EOC6 (0x1 << 6) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 6 */ -#define ADC_IMR_EOC7 (0x1 << 7) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 7 */ -#define ADC_IMR_OVRE0 (0x1 << 8) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 0 */ -#define ADC_IMR_OVRE1 (0x1 << 9) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 1 */ -#define ADC_IMR_OVRE2 (0x1 << 10) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 2 */ -#define ADC_IMR_OVRE3 (0x1 << 11) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 3 */ -#define ADC_IMR_OVRE4 (0x1 << 12) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 4 */ -#define ADC_IMR_OVRE5 (0x1 << 13) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 5 */ -#define ADC_IMR_OVRE6 (0x1 << 14) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 6 */ -#define ADC_IMR_OVRE7 (0x1 << 15) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 7 */ -#define ADC_IMR_DRDY (0x1 << 16) /**< \brief (ADC_IMR) Data Ready Interrupt Mask */ -#define ADC_IMR_GOVRE (0x1 << 17) /**< \brief (ADC_IMR) General Overrun Error Interrupt Mask */ -#define ADC_IMR_ENDRX (0x1 << 18) /**< \brief (ADC_IMR) End of Receive Buffer Interrupt Mask */ -#define ADC_IMR_RXBUFF (0x1 << 19) /**< \brief (ADC_IMR) Receive Buffer Full Interrupt Mask */ -/* -------- ADC_CDR[8] : (ADC12B Offset: 0x30) Channel Data Register -------- */ -#define ADC_CDR_DATA (0xfff << 0) /**< \brief (ADC_CDR[8]) Converted Data */ -/* -------- ADC_ACR : (ADC12B Offset: 0x64) Analog Control Register -------- */ -#define ADC_ACR_GAIN (0x3 << 0) /**< \brief (ADC_ACR) Input Gain */ -#define ADC_ACR_IBCTL (0x3 << 6) /**< \brief (ADC_ACR) Bias Current Control */ -#define ADC_ACR_DIFF (0x1 << 16) /**< \brief (ADC_ACR) Differential Mode */ -#define ADC_ACR_OFFSET (0x1 << 17) /**< \brief (ADC_ACR) Input OFFSET */ -/* -------- ADC_EMR : (ADC12B Offset: 0x68) Extended Mode Register -------- */ -#define ADC_EMR_OFFMODES (0x1 << 0) /**< \brief (ADC_EMR) Off Mode if Sleep Bit (ADC_MR) = 1 */ -#define ADC_EMR_OFF_MODE_STARTUP_TIME (0xff << 16) /**< \brief (ADC_EMR) Startup Time */ -/* -------- ADC_RPR : (ADC12B Offset: 0x100) Receive Pointer Register -------- */ -#define ADC_RPR_RXPTR (0xffffffff << 0) /**< \brief (ADC_RPR) Receive Pointer Register */ -/* -------- ADC_RCR : (ADC12B Offset: 0x104) Receive Counter Register -------- */ -#define ADC_RCR_RXCTR (0xffff << 0) /**< \brief (ADC_RCR) Receive Counter Register */ -/* -------- ADC_TPR : (ADC12B Offset: 0x108) Transmit Pointer Register -------- */ -#define ADC_TPR_TXPTR (0xffffffff << 0) /**< \brief (ADC_TPR) Transmit Counter Register */ -/* -------- ADC_TCR : (ADC12B Offset: 0x10C) Transmit Counter Register -------- */ -#define ADC_TCR_TXCTR (0xffff << 0) /**< \brief (ADC_TCR) Transmit Counter Register */ -/* -------- ADC_RNPR : (ADC12B Offset: 0x110) Receive Next Pointer Register -------- */ -#define ADC_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (ADC_RNPR) Receive Next Pointer */ -/* -------- ADC_RNCR : (ADC12B Offset: 0x114) Receive Next Counter Register -------- */ -#define ADC_RNCR_RXNCTR (0xffff << 0) /**< \brief (ADC_RNCR) Receive Next Counter */ -/* -------- ADC_TNPR : (ADC12B Offset: 0x118) Transmit Next Pointer Register -------- */ -#define ADC_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (ADC_TNPR) Transmit Next Pointer */ -/* -------- ADC_TNCR : (ADC12B Offset: 0x11C) Transmit Next Counter Register -------- */ -#define ADC_TNCR_TXNCTR (0xffff << 0) /**< \brief (ADC_TNCR) Transmit Counter Next */ -/* -------- ADC_PTCR : (ADC12B Offset: 0x120) Transfer Control Register -------- */ -#define ADC_PTCR_RXTEN (0x1 << 0) /**< \brief (ADC_PTCR) Receiver Transfer Enable */ -#define ADC_PTCR_RXTDIS (0x1 << 1) /**< \brief (ADC_PTCR) Receiver Transfer Disable */ -#define ADC_PTCR_TXTEN (0x1 << 8) /**< \brief (ADC_PTCR) Transmitter Transfer Enable */ -#define ADC_PTCR_TXTDIS (0x1 << 9) /**< \brief (ADC_PTCR) Transmitter Transfer Disable */ -/* -------- ADC_PTSR : (ADC12B Offset: 0x124) Transfer Status Register -------- */ -#define ADC_PTSR_RXTEN (0x1 << 0) /**< \brief (ADC_PTSR) Receiver Transfer Enable */ -#define ADC_PTSR_TXTEN (0x1 << 8) /**< \brief (ADC_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Chip Identifier */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_CHIPID Chip Identifier */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Chipid hardware registers */ -typedef struct { - RoReg CHIPID_CIDR; /**< \brief (Chipid Offset: 0x0) Chip ID Register */ - RoReg CHIPID_EXID; /**< \brief (Chipid Offset: 0x4) Chip ID Extension Register */ -} Chipid; -#endif /* __ASSEMBLY__ */ -/* -------- CHIPID_CIDR : (CHIPID Offset: 0x0) Chip ID Register -------- */ -#define CHIPID_CIDR_VERSION (0x1f << 0) /**< \brief (CHIPID_CIDR) Version of the Device */ -#define CHIPID_CIDR_EPROC (0x7 << 5) /**< \brief (CHIPID_CIDR) Embedded Processor */ -#define CHIPID_CIDR_NVPSIZ (0xf << 8) /**< \brief (CHIPID_CIDR) Nonvolatile Program Memory Size */ -#define CHIPID_CIDR_NVPSIZ2 (0xf << 12) /**< \brief (CHIPID_CIDR) */ -#define CHIPID_CIDR_SRAMSIZ (0xf << 16) /**< \brief (CHIPID_CIDR) Internal SRAM Size */ -#define CHIPID_CIDR_ARCH (0xff << 20) /**< \brief (CHIPID_CIDR) Architecture Identifier */ -#define CHIPID_CIDR_NVPTYP (0x7 << 28) /**< \brief (CHIPID_CIDR) Nonvolatile Program Memory Type */ -#define CHIPID_CIDR_EXT (0x1 << 31) /**< \brief (CHIPID_CIDR) Extension Flag */ -/* -------- CHIPID_EXID : (CHIPID Offset: 0x4) Chip ID Extension Register -------- */ -#define CHIPID_EXID_EXID (0xffffffff << 0) /**< \brief (CHIPID_EXID) Chip ID Extension */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR DMA Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_DMAC DMA Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief DmacCh_num hardware registers */ -typedef struct { - RwReg DMAC_SADDR; /**< \brief (DmacCh_num Offset: 0x0) DMAC Channel Source Address Register */ - RwReg DMAC_DADDR; /**< \brief (DmacCh_num Offset: 0x4) DMAC Channel Destination Address Register */ - RwReg DMAC_DSCR; /**< \brief (DmacCh_num Offset: 0x8) DMAC Channel Descriptor Address Register */ - RwReg DMAC_CTRLA; /**< \brief (DmacCh_num Offset: 0xC) DMAC Channel Control A Register */ - RwReg DMAC_CTRLB; /**< \brief (DmacCh_num Offset: 0x10) DMAC Channel Control B Register */ - RwReg DMAC_CFG; /**< \brief (DmacCh_num Offset: 0x14) DMAC Channel Configuration Register */ - RwReg Reserved1[4]; -} DmacCh_num; -/** \brief Dmac hardware registers */ -typedef struct { - RwReg DMAC_GCFG; /**< \brief (Dmac Offset: 0x000) DMAC Global Configuration Register */ - RwReg DMAC_EN; /**< \brief (Dmac Offset: 0x004) DMAC Enable Register */ - RwReg DMAC_SREQ; /**< \brief (Dmac Offset: 0x008) DMAC Software Single Request Register */ - RwReg DMAC_CREQ; /**< \brief (Dmac Offset: 0x00C) DMAC Software Chunk Transfer Request Register */ - RwReg DMAC_LAST; /**< \brief (Dmac Offset: 0x010) DMAC Software Last Transfer Flag Register */ - RwReg Reserved1[1]; - WoReg DMAC_EBCIER; /**< \brief (Dmac Offset: 0x018) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Enable register. */ - WoReg DMAC_EBCIDR; /**< \brief (Dmac Offset: 0x01C) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Disable register. */ - RoReg DMAC_EBCIMR; /**< \brief (Dmac Offset: 0x020) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Mask Register. */ - RoReg DMAC_EBCISR; /**< \brief (Dmac Offset: 0x024) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Status Register. */ - WoReg DMAC_CHER; /**< \brief (Dmac Offset: 0x028) DMAC Channel Handler Enable Register */ - WoReg DMAC_CHDR; /**< \brief (Dmac Offset: 0x02C) DMAC Channel Handler Disable Register */ - RoReg DMAC_CHSR; /**< \brief (Dmac Offset: 0x030) DMAC Channel Handler Status Register */ - RwReg Reserved2[2]; - DmacCh_num DMAC_CH_NUM[4]; /**< \brief (Dmac Offset: 0x3C) ch_num = 0 .. 3 */ -} Dmac; -#endif /* __ASSEMBLY__ */ -/* -------- DMAC_GCFG : (DMAC Offset: 0x000) DMAC Global Configuration Register -------- */ -#define DMAC_GCFG_ARB_CFG (0x1 << 4) /**< \brief (DMAC_GCFG) */ -/* -------- DMAC_EN : (DMAC Offset: 0x004) DMAC Enable Register -------- */ -#define DMAC_EN_ENABLE (0x1 << 0) /**< \brief (DMAC_EN) */ -/* -------- DMAC_SREQ : (DMAC Offset: 0x008) DMAC Software Single Request Register -------- */ -#define DMAC_SREQ_SSREQ0 (0x1 << 0) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_DSREQ0 (0x1 << 1) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_SSREQ1 (0x1 << 2) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_DSREQ1 (0x1 << 3) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_SSREQ2_ (0x1 << 4) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_DSREQ2_ (0x1 << 5) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_SSREQ3 (0x1 << 6) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_DSREQ3 (0x1 << 7) /**< \brief (DMAC_SREQ) */ -/* -------- DMAC_CREQ : (DMAC Offset: 0x00C) DMAC Software Chunk Transfer Request Register -------- */ -#define DMAC_CREQ_SCREQ0 (0x1 << 0) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_DCREQ0 (0x1 << 1) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_SCREQ1 (0x1 << 2) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_DCREQ1 (0x1 << 3) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_SCREQ2_ (0x1 << 4) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_DCREQ2_ (0x1 << 5) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_SCREQ3 (0x1 << 6) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_DCREQ3 (0x1 << 7) /**< \brief (DMAC_CREQ) */ -/* -------- DMAC_LAST : (DMAC Offset: 0x010) DMAC Software Last Transfer Flag Register -------- */ -#define DMAC_LAST_SLAST0 (0x1 << 0) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_DLAST0 (0x1 << 1) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_SLAST1 (0x1 << 2) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_DLAST1 (0x1 << 3) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_SLAST2 (0x1 << 4) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_DLAST2 (0x1 << 5) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_SLAST3 (0x1 << 6) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_DLAST3 (0x1 << 7) /**< \brief (DMAC_LAST) */ -/* -------- DMAC_EBCIER : (DMAC Offset: 0x018) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Enable register. -------- */ -#define DMAC_EBCIER_BTC0 (0x1 << 0) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_BTC1 (0x1 << 1) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_BTC2 (0x1 << 2) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_BTC3 (0x1 << 3) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_CBTC0 (0x1 << 8) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_CBTC1 (0x1 << 9) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_CBTC2 (0x1 << 10) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_CBTC3 (0x1 << 11) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_ERR0 (0x1 << 16) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_ERR1 (0x1 << 17) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_ERR2 (0x1 << 18) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_ERR3 (0x1 << 19) /**< \brief (DMAC_EBCIER) */ -/* -------- DMAC_EBCIDR : (DMAC Offset: 0x01C) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Disable register. -------- */ -#define DMAC_EBCIDR_BTC0 (0x1 << 0) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_BTC1 (0x1 << 1) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_BTC2 (0x1 << 2) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_BTC3 (0x1 << 3) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_CBTC0 (0x1 << 8) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_CBTC1 (0x1 << 9) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_CBTC2 (0x1 << 10) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_CBTC3 (0x1 << 11) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_ERR0 (0x1 << 16) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_ERR1 (0x1 << 17) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_ERR2 (0x1 << 18) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_ERR3 (0x1 << 19) /**< \brief (DMAC_EBCIDR) */ -/* -------- DMAC_EBCIMR : (DMAC Offset: 0x020) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Mask Register. -------- */ -#define DMAC_EBCIMR_BTC0 (0x1 << 0) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_BTC1 (0x1 << 1) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_BTC2 (0x1 << 2) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_BTC3 (0x1 << 3) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_CBTC0 (0x1 << 8) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_CBTC1 (0x1 << 9) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_CBTC2 (0x1 << 10) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_CBTC3 (0x1 << 11) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_ERR0 (0x1 << 16) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_ERR1 (0x1 << 17) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_ERR2 (0x1 << 18) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_ERR3 (0x1 << 19) /**< \brief (DMAC_EBCIMR) */ -/* -------- DMAC_EBCISR : (DMAC Offset: 0x024) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Status Register. -------- */ -#define DMAC_EBCISR_BTC0 (0x1 << 0) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_BTC1 (0x1 << 1) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_BTC2 (0x1 << 2) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_BTC3 (0x1 << 3) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_CBTC0 (0x1 << 8) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_CBTC1 (0x1 << 9) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_CBTC2 (0x1 << 10) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_CBTC3 (0x1 << 11) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_ERR0 (0x1 << 16) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_ERR1 (0x1 << 17) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_ERR2 (0x1 << 18) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_ERR3 (0x1 << 19) /**< \brief (DMAC_EBCISR) */ -/* -------- DMAC_CHER : (DMAC Offset: 0x028) DMAC Channel Handler Enable Register -------- */ -#define DMAC_CHER_ENA0 (0x1 << 0) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_ENA1 (0x1 << 1) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_ENA2 (0x1 << 2) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_ENA3 (0x1 << 3) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_SUSP0 (0x1 << 8) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_SUSP1 (0x1 << 9) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_SUSP2 (0x1 << 10) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_SUSP3 (0x1 << 11) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_KEEP0 (0x1 << 24) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_KEEP1 (0x1 << 25) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_KEEP2 (0x1 << 26) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_KEEP3 (0x1 << 27) /**< \brief (DMAC_CHER) */ -/* -------- DMAC_CHDR : (DMAC Offset: 0x02C) DMAC Channel Handler Disable Register -------- */ -#define DMAC_CHDR_DIS0 (0x1 << 0) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_DIS1 (0x1 << 1) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_DIS2 (0x1 << 2) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_DIS3 (0x1 << 3) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_RES0 (0x1 << 8) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_RES1 (0x1 << 9) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_RES2 (0x1 << 10) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_RES3 (0x1 << 11) /**< \brief (DMAC_CHDR) */ -/* -------- DMAC_CHSR : (DMAC Offset: 0x030) DMAC Channel Handler Status Register -------- */ -#define DMAC_CHSR_ENA0 (0x1 << 0) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_ENA1 (0x1 << 1) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_ENA2 (0x1 << 2) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_ENA3 (0x1 << 3) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_SUSP0 (0x1 << 8) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_SUSP1 (0x1 << 9) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_SUSP2 (0x1 << 10) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_SUSP3 (0x1 << 11) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_EMPT0 (0x1 << 16) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_EMPT1 (0x1 << 17) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_EMPT2 (0x1 << 18) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_EMPT3 (0x1 << 19) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_STAL0 (0x1 << 24) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_STAL1 (0x1 << 25) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_STAL2 (0x1 << 26) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_STAL3 (0x1 << 27) /**< \brief (DMAC_CHSR) */ -/* -------- DMAC_SADDR0 : (DMAC Offset: 0x3C) DMAC Channel Source Address Register (ch_num = 0) -------- */ -#define DMAC_SADDR0_SADDRx (0xffffffff << 0) /**< \brief (DMAC_SADDR0) */ -/* -------- DMAC_DADDR0 : (DMAC Offset: 0x40) DMAC Channel Destination Address Register (ch_num = 0) -------- */ -#define DMAC_DADDR0_DADDRx (0xffffffff << 0) /**< \brief (DMAC_DADDR0) */ -/* -------- DMAC_DSCR0 : (DMAC Offset: 0x44) DMAC Channel Descriptor Address Register (ch_num = 0) -------- */ -#define DMAC_DSCR0_DSCRx (0x3fffffff << 2) /**< \brief (DMAC_DSCR0) */ -/* -------- DMAC_CTRLA0 : (DMAC Offset: 0x48) DMAC Channel Control A Register (ch_num = 0) -------- */ -#define DMAC_CTRLA0_BTSIZE (0xfff << 0) /**< \brief (DMAC_CTRLA0) */ -#define DMAC_CTRLA0_SCSIZE (0x1 << 16) /**< \brief (DMAC_CTRLA0) */ -#define DMAC_CTRLA0_DCSIZE (0x1 << 20) /**< \brief (DMAC_CTRLA0) */ -#define DMAC_CTRLA0_SRC_WIDTH (0x3 << 24) /**< \brief (DMAC_CTRLA0) */ -#define DMAC_CTRLA0_DST_WIDTH (0x3 << 28) /**< \brief (DMAC_CTRLA0) */ -#define DMAC_CTRLA0_DONE (0x1 << 31) /**< \brief (DMAC_CTRLA0) */ -/* -------- DMAC_CTRLB0 : (DMAC Offset: 0x4C) DMAC Channel Control B Register (ch_num = 0) -------- */ -#define DMAC_CTRLB0_SRC_DSCR (0x1 << 16) /**< \brief (DMAC_CTRLB0) */ -#define DMAC_CTRLB0_DST_DSCR (0x1 << 20) /**< \brief (DMAC_CTRLB0) */ -#define DMAC_CTRLB0_FC (0x3 << 21) /**< \brief (DMAC_CTRLB0) */ -#define DMAC_CTRLB0_SRC_INCR (0x3 << 24) /**< \brief (DMAC_CTRLB0) */ -#define DMAC_CTRLB0_DST_INCR (0x3 << 28) /**< \brief (DMAC_CTRLB0) */ -#define DMAC_CTRLB0_IEN (0x1 << 30) /**< \brief (DMAC_CTRLB0) */ -/* -------- DMAC_CFG0 : (DMAC Offset: 0x50) DMAC Channel Configuration Register (ch_num = 0) -------- */ -#define DMAC_CFG0_SRC_PER (0xf << 0) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_DST_PER (0xf << 4) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_SRC_H2SEL (0x1 << 9) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_DST_H2SEL (0x1 << 13) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_SOD (0x1 << 16) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_LOCK_IF (0x1 << 20) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_LOCK_B (0x1 << 21) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_LOCK_IF_L (0x1 << 22) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_AHB_PROT (0x7 << 24) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_FIFOCFG (0x3 << 28) /**< \brief (DMAC_CFG0) */ -/* -------- DMAC_SADDR1 : (DMAC Offset: 0x64) DMAC Channel Source Address Register (ch_num = 1) -------- */ -#define DMAC_SADDR1_SADDRx (0xffffffff << 0) /**< \brief (DMAC_SADDR1) */ -/* -------- DMAC_DADDR1 : (DMAC Offset: 0x68) DMAC Channel Destination Address Register (ch_num = 1) -------- */ -#define DMAC_DADDR1_DADDRx (0xffffffff << 0) /**< \brief (DMAC_DADDR1) */ -/* -------- DMAC_DSCR1 : (DMAC Offset: 0x6C) DMAC Channel Descriptor Address Register (ch_num = 1) -------- */ -#define DMAC_DSCR1_DSCRx (0x3fffffff << 2) /**< \brief (DMAC_DSCR1) */ -/* -------- DMAC_CTRLA1 : (DMAC Offset: 0x70) DMAC Channel Control A Register (ch_num = 1) -------- */ -#define DMAC_CTRLA1_BTSIZE (0xfff << 0) /**< \brief (DMAC_CTRLA1) */ -#define DMAC_CTRLA1_SCSIZE (0x1 << 16) /**< \brief (DMAC_CTRLA1) */ -#define DMAC_CTRLA1_DCSIZE (0x1 << 20) /**< \brief (DMAC_CTRLA1) */ -#define DMAC_CTRLA1_SRC_WIDTH (0x3 << 24) /**< \brief (DMAC_CTRLA1) */ -#define DMAC_CTRLA1_DST_WIDTH (0x3 << 28) /**< \brief (DMAC_CTRLA1) */ -#define DMAC_CTRLA1_DONE (0x1 << 31) /**< \brief (DMAC_CTRLA1) */ -/* -------- DMAC_CTRLB1 : (DMAC Offset: 0x74) DMAC Channel Control B Register (ch_num = 1) -------- */ -#define DMAC_CTRLB1_SRC_DSCR (0x1 << 16) /**< \brief (DMAC_CTRLB1) */ -#define DMAC_CTRLB1_DST_DSCR (0x1 << 20) /**< \brief (DMAC_CTRLB1) */ -#define DMAC_CTRLB1_FC (0x3 << 21) /**< \brief (DMAC_CTRLB1) */ -#define DMAC_CTRLB1_SRC_INCR (0x3 << 24) /**< \brief (DMAC_CTRLB1) */ -#define DMAC_CTRLB1_DST_INCR (0x3 << 28) /**< \brief (DMAC_CTRLB1) */ -#define DMAC_CTRLB1_IEN (0x1 << 30) /**< \brief (DMAC_CTRLB1) */ -/* -------- DMAC_CFG1 : (DMAC Offset: 0x78) DMAC Channel Configuration Register (ch_num = 1) -------- */ -#define DMAC_CFG1_SRC_PER (0xf << 0) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_DST_PER (0xf << 4) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_SRC_H2SEL (0x1 << 9) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_DST_H2SEL (0x1 << 13) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_SOD (0x1 << 16) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_LOCK_IF (0x1 << 20) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_LOCK_B (0x1 << 21) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_LOCK_IF_L (0x1 << 22) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_AHB_PROT (0x7 << 24) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_FIFOCFG (0x3 << 28) /**< \brief (DMAC_CFG1) */ -/* -------- DMAC_SADDR2 : (DMAC Offset: 0x8C) DMAC Channel Source Address Register (ch_num = 2) -------- */ -#define DMAC_SADDR2_SADDRx (0xffffffff << 0) /**< \brief (DMAC_SADDR2) */ -/* -------- DMAC_DADDR2 : (DMAC Offset: 0x90) DMAC Channel Destination Address Register (ch_num = 2) -------- */ -#define DMAC_DADDR2_DADDRx (0xffffffff << 0) /**< \brief (DMAC_DADDR2) */ -/* -------- DMAC_DSCR2 : (DMAC Offset: 0x94) DMAC Channel Descriptor Address Register (ch_num = 2) -------- */ -#define DMAC_DSCR2_DSCRx (0x3fffffff << 2) /**< \brief (DMAC_DSCR2) */ -/* -------- DMAC_CTRLA2 : (DMAC Offset: 0x98) DMAC Channel Control A Register (ch_num = 2) -------- */ -#define DMAC_CTRLA2_BTSIZE (0xfff << 0) /**< \brief (DMAC_CTRLA2) */ -#define DMAC_CTRLA2_SCSIZE (0x1 << 16) /**< \brief (DMAC_CTRLA2) */ -#define DMAC_CTRLA2_DCSIZE (0x1 << 20) /**< \brief (DMAC_CTRLA2) */ -#define DMAC_CTRLA2_SRC_WIDTH (0x3 << 24) /**< \brief (DMAC_CTRLA2) */ -#define DMAC_CTRLA2_DST_WIDTH (0x3 << 28) /**< \brief (DMAC_CTRLA2) */ -#define DMAC_CTRLA2_DONE (0x1 << 31) /**< \brief (DMAC_CTRLA2) */ -/* -------- DMAC_CTRLB2 : (DMAC Offset: 0x9C) DMAC Channel Control B Register (ch_num = 2) -------- */ -#define DMAC_CTRLB2_SRC_DSCR (0x1 << 16) /**< \brief (DMAC_CTRLB2) */ -#define DMAC_CTRLB2_DST_DSCR (0x1 << 20) /**< \brief (DMAC_CTRLB2) */ -#define DMAC_CTRLB2_FC (0x3 << 21) /**< \brief (DMAC_CTRLB2) */ -#define DMAC_CTRLB2_SRC_INCR (0x3 << 24) /**< \brief (DMAC_CTRLB2) */ -#define DMAC_CTRLB2_DST_INCR (0x3 << 28) /**< \brief (DMAC_CTRLB2) */ -#define DMAC_CTRLB2_IEN (0x1 << 30) /**< \brief (DMAC_CTRLB2) */ -/* -------- DMAC_CFG2 : (DMAC Offset: 0xA0) DMAC Channel Configuration Register (ch_num = 2) -------- */ -#define DMAC_CFG2_SRC_PER (0xf << 0) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_DST_PER (0xf << 4) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_SRC_H2SEL (0x1 << 9) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_DST_H2SEL (0x1 << 13) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_SOD (0x1 << 16) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_LOCK_IF (0x1 << 20) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_LOCK_B (0x1 << 21) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_LOCK_IF_L (0x1 << 22) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_AHB_PROT (0x7 << 24) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_FIFOCFG (0x3 << 28) /**< \brief (DMAC_CFG2) */ -/* -------- DMAC_SADDR3 : (DMAC Offset: 0xB4) DMAC Channel Source Address Register (ch_num = 3) -------- */ -#define DMAC_SADDR3_SADDRx (0xffffffff << 0) /**< \brief (DMAC_SADDR3) */ -/* -------- DMAC_DADDR3 : (DMAC Offset: 0xB8) DMAC Channel Destination Address Register (ch_num = 3) -------- */ -#define DMAC_DADDR3_DADDRx (0xffffffff << 0) /**< \brief (DMAC_DADDR3) */ -/* -------- DMAC_DSCR3 : (DMAC Offset: 0xBC) DMAC Channel Descriptor Address Register (ch_num = 3) -------- */ -#define DMAC_DSCR3_DSCRx (0x3fffffff << 2) /**< \brief (DMAC_DSCR3) */ -/* -------- DMAC_CTRLA3 : (DMAC Offset: 0xC0) DMAC Channel Control A Register (ch_num = 3) -------- */ -#define DMAC_CTRLA3_BTSIZE (0xfff << 0) /**< \brief (DMAC_CTRLA3) */ -#define DMAC_CTRLA3_SCSIZE (0x1 << 16) /**< \brief (DMAC_CTRLA3) */ -#define DMAC_CTRLA3_DCSIZE (0x1 << 20) /**< \brief (DMAC_CTRLA3) */ -#define DMAC_CTRLA3_SRC_WIDTH (0x3 << 24) /**< \brief (DMAC_CTRLA3) */ -#define DMAC_CTRLA3_DST_WIDTH (0x3 << 28) /**< \brief (DMAC_CTRLA3) */ -#define DMAC_CTRLA3_DONE (0x1 << 31) /**< \brief (DMAC_CTRLA3) */ -/* -------- DMAC_CTRLB3 : (DMAC Offset: 0xC4) DMAC Channel Control B Register (ch_num = 3) -------- */ -#define DMAC_CTRLB3_SRC_DSCR (0x1 << 16) /**< \brief (DMAC_CTRLB3) */ -#define DMAC_CTRLB3_DST_DSCR (0x1 << 20) /**< \brief (DMAC_CTRLB3) */ -#define DMAC_CTRLB3_FC (0x3 << 21) /**< \brief (DMAC_CTRLB3) */ -#define DMAC_CTRLB3_SRC_INCR (0x3 << 24) /**< \brief (DMAC_CTRLB3) */ -#define DMAC_CTRLB3_DST_INCR (0x3 << 28) /**< \brief (DMAC_CTRLB3) */ -#define DMAC_CTRLB3_IEN (0x1 << 30) /**< \brief (DMAC_CTRLB3) */ -/* -------- DMAC_CFG3 : (DMAC Offset: 0xC8) DMAC Channel Configuration Register (ch_num = 3) -------- */ -#define DMAC_CFG3_SRC_PER (0xf << 0) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_DST_PER (0xf << 4) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_SRC_H2SEL (0x1 << 9) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_DST_H2SEL (0x1 << 13) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_SOD (0x1 << 16) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_LOCK_IF (0x1 << 20) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_LOCK_B (0x1 << 21) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_LOCK_IF_L (0x1 << 22) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_AHB_PROT (0x7 << 24) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_FIFOCFG (0x3 << 28) /**< \brief (DMAC_CFG3) */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Embedded Flash Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_EFC Embedded Flash Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Efc hardware registers */ -typedef struct { - RwReg EEFC_FMR; /**< \brief (Efc Offset: 0x00) EEFC Flash Mode Register */ - WoReg EEFC_FCR; /**< \brief (Efc Offset: 0x04) EEFC Flash Command Register */ - RoReg EEFC_FSR; /**< \brief (Efc Offset: 0x08) EEFC Flash Status Register */ - RoReg EEFC_FRR; /**< \brief (Efc Offset: 0x0C) EEFC Flash Result Register */ -} Efc; -#endif /* __ASSEMBLY__ */ -/* -------- EEFC_FMR : (EFC Offset: 0x00) EEFC Flash Mode Register -------- */ -#define EEFC_FMR_FRDY (0x1 << 0) /**< \brief (EEFC_FMR) Ready Interrupt Enable */ -#define EEFC_FMR_FWS (0xf << 8) /**< \brief (EEFC_FMR) Flash Wait State */ -#define EEFC_FMR_FAM (0x1 << 24) /**< \brief (EEFC_FMR) Flash Access Mode */ -/* -------- EEFC_FCR : (EFC Offset: 0x04) EEFC Flash Command Register -------- */ -#define EEFC_FCR_FCMD (0xff << 0) /**< \brief (EEFC_FCR) Flash Command */ -#define EEFC_FCR_FARG (0xffff << 8) /**< \brief (EEFC_FCR) Flash Command Argument */ -#define EEFC_FCR_FKEY (0xff << 24) /**< \brief (EEFC_FCR) Flash Writing Protection Key */ -/* -------- EEFC_FSR : (EFC Offset: 0x08) EEFC Flash Status Register -------- */ -#define EEFC_FSR_FRDY (0x1 << 0) /**< \brief (EEFC_FSR) Flash Ready Status */ -#define EEFC_FSR_FCMDE (0x1 << 1) /**< \brief (EEFC_FSR) Flash Command Error Status */ -#define EEFC_FSR_FLOCKE (0x1 << 2) /**< \brief (EEFC_FSR) Flash Lock Error Status */ -/* -------- EEFC_FRR : (EFC Offset: 0x0C) EEFC Flash Result Register -------- */ -#define EEFC_FRR_FVALUE (0xffffffff << 0) /**< \brief (EEFC_FRR) Flash Result Value */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR General Purpose Backup Register */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_GPBR General Purpose Backup Register */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Gpbr hardware registers */ -typedef struct { - RwReg SYS_GPBR0; /**< \brief (Gpbr Offset: 0x0) General Purpose Backup Register 0 */ - RwReg SYS_GPBR1; /**< \brief (Gpbr Offset: 0x4) General Purpose Backup Register 1 */ - RwReg SYS_GPBR2; /**< \brief (Gpbr Offset: 0x8) General Purpose Backup Register 2 */ - RwReg SYS_GPBR3; /**< \brief (Gpbr Offset: 0xC) General Purpose Backup Register 3 */ -} Gpbr; -#endif /* __ASSEMBLY__ */ -/* -------- SYS_GPBR0 : (GPBR Offset: 0x0) General Purpose Backup Register 0 -------- */ -#define SYS_GPBR0_GPBR_VALUE0 (0xffffffff << 0) /**< \brief (SYS_GPBR0) Value of GPBR x */ -/* -------- SYS_GPBR1 : (GPBR Offset: 0x4) General Purpose Backup Register 1 -------- */ -#define SYS_GPBR1_GPBR_VALUE1 (0xffffffff << 0) /**< \brief (SYS_GPBR1) Value of GPBR x */ -/* -------- SYS_GPBR2 : (GPBR Offset: 0x8) General Purpose Backup Register 2 -------- */ -#define SYS_GPBR2_GPBR_VALUE2 (0xffffffff << 0) /**< \brief (SYS_GPBR2) Value of GPBR x */ -/* -------- SYS_GPBR3 : (GPBR Offset: 0xC) General Purpose Backup Register 3 -------- */ -#define SYS_GPBR3_GPBR_VALUE3 (0xffffffff << 0) /**< \brief (SYS_GPBR3) Value of GPBR x */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR MultiMedia Card Interface */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_HSMCI MultiMedia Card Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Hsmci hardware registers */ -typedef struct { - WoReg HSMCI_CR; /**< \brief (Hsmci Offset: 0x00) Control Register */ - RwReg HSMCI_MR; /**< \brief (Hsmci Offset: 0x04) Mode Register */ - RwReg HSMCI_DTOR; /**< \brief (Hsmci Offset: 0x08) Data Timeout Register */ - RwReg HSMCI_SDCR; /**< \brief (Hsmci Offset: 0x0C) SD/SDIO Card Register */ - RwReg HSMCI_ARGR; /**< \brief (Hsmci Offset: 0x10) Argument Register */ - WoReg HSMCI_CMDR; /**< \brief (Hsmci Offset: 0x14) Command Register */ - RwReg HSMCI_BLKR; /**< \brief (Hsmci Offset: 0x18) Block Register */ - RwReg HSMCI_CSTOR; /**< \brief (Hsmci Offset: 0x1C) Completion Signal Timeout Register */ - RoReg HSMCI_RSPR[4]; /**< \brief (Hsmci Offset: 0x20) Response Register */ - RoReg HSMCI_RDR; /**< \brief (Hsmci Offset: 0x30) Receive Data Register */ - WoReg HSMCI_TDR; /**< \brief (Hsmci Offset: 0x34) Transmit Data Register */ - RwReg Reserved1[2]; - RoReg HSMCI_SR; /**< \brief (Hsmci Offset: 0x40) Status Register */ - WoReg HSMCI_IER; /**< \brief (Hsmci Offset: 0x44) Interrupt Enable Register */ - WoReg HSMCI_IDR; /**< \brief (Hsmci Offset: 0x48) Interrupt Disable Register */ - RoReg HSMCI_IMR; /**< \brief (Hsmci Offset: 0x4C) Interrupt Mask Register */ - RwReg HSMCI_DMA; /**< \brief (Hsmci Offset: 0x50) DMA Configuration Register */ - RwReg HSMCI_CFG; /**< \brief (Hsmci Offset: 0x54) Configuration Register */ - RwReg Reserved2[35]; - RwReg HSMCI_WPMR; /**< \brief (Hsmci Offset: 0xE4) Write Protection Mode Register */ - RoReg HSMCI_WPSR; /**< \brief (Hsmci Offset: 0xE8) Write Protection Status Register */ -} Hsmci; -#endif /* __ASSEMBLY__ */ -/* -------- HSMCI_CR : (HSMCI Offset: 0x00) Control Register -------- */ -#define HSMCI_CR_MCIEN (0x1 << 0) /**< \brief (HSMCI_CR) Multi-Media Interface Enable */ -#define HSMCI_CR_HSMCIDIS (0x1 << 1) /**< \brief (HSMCI_CR) */ -#define HSMCI_CR_PWSEN (0x1 << 2) /**< \brief (HSMCI_CR) Power Save Mode Enable */ -#define HSMCI_CR_PWSDIS (0x1 << 3) /**< \brief (HSMCI_CR) Power Save Mode Disable */ -#define HSMCI_CR_SWRST (0x1 << 7) /**< \brief (HSMCI_CR) Software Reset */ -/* -------- HSMCI_MR : (HSMCI Offset: 0x04) Mode Register -------- */ -#define HSMCI_MR_CLKDIV (0xff << 0) /**< \brief (HSMCI_MR) Clock Divider */ -#define HSMCI_MR_PWSDIV (0x7 << 8) /**< \brief (HSMCI_MR) Power Saving Divider */ -#define HSMCI_MR_RDPROOF (0x1 << 11) /**< \brief (HSMCI_MR) */ -#define HSMCI_MR_WRPROOF (0x1 << 12) /**< \brief (HSMCI_MR) */ -#define HSMCI_MR_FBYTE (0x1 << 13) /**< \brief (HSMCI_MR) Force Byte Transfer */ -#define HSMCI_MR_PADV (0x1 << 14) /**< \brief (HSMCI_MR) Padding Value */ -#define HSMCI_MR_BLKLEN (0xffff << 16) /**< \brief (HSMCI_MR) Data Block Length */ -/* -------- HSMCI_DTOR : (HSMCI Offset: 0x08) Data Timeout Register -------- */ -#define HSMCI_DTOR_DTOCYC (0xf << 0) /**< \brief (HSMCI_DTOR) Data Timeout Cycle Number */ -#define HSMCI_DTOR_DTOMUL (0x7 << 4) /**< \brief (HSMCI_DTOR) Data Timeout Multiplier */ -/* -------- HSMCI_SDCR : (HSMCI Offset: 0x0C) SD/SDIO Card Register -------- */ -#define HSMCI_SDCR_SDCSEL (0x3 << 0) /**< \brief (HSMCI_SDCR) SDCard/SDIO Slot */ -#define HSMCI_SDCR_SDCBUS (0x3 << 6) /**< \brief (HSMCI_SDCR) SDCard/SDIO Bus Width */ -/* -------- HSMCI_ARGR : (HSMCI Offset: 0x10) Argument Register -------- */ -#define HSMCI_ARGR_ARG (0xffffffff << 0) /**< \brief (HSMCI_ARGR) Command Argument */ -/* -------- HSMCI_CMDR : (HSMCI Offset: 0x14) Command Register -------- */ -#define HSMCI_CMDR_CMDNB (0x3f << 0) /**< \brief (HSMCI_CMDR) Command Number */ -#define HSMCI_CMDR_RSPTYP (0x3 << 6) /**< \brief (HSMCI_CMDR) Response Type */ -#define HSMCI_CMDR_SPCMD (0x7 << 8) /**< \brief (HSMCI_CMDR) Special Command */ -#define HSMCI_CMDR_OPDCMD (0x1 << 11) /**< \brief (HSMCI_CMDR) Open Drain Command */ -#define HSMCI_CMDR_MAXLAT (0x1 << 12) /**< \brief (HSMCI_CMDR) Max Latency for Command to Response */ -#define HSMCI_CMDR_TRCMD (0x3 << 16) /**< \brief (HSMCI_CMDR) Transfer Command */ -#define HSMCI_CMDR_TRDIR (0x1 << 18) /**< \brief (HSMCI_CMDR) Transfer Direction */ -#define HSMCI_CMDR_TRTYP (0x7 << 19) /**< \brief (HSMCI_CMDR) Transfer Type */ -#define HSMCI_CMDR_IOSPCMD (0x3 << 24) /**< \brief (HSMCI_CMDR) SDIO Special Command */ -#define HSMCI_CMDR_ATACS (0x1 << 26) /**< \brief (HSMCI_CMDR) ATA with Command Completion Signal */ -#define HSMCI_CMDR_BOOT_ACK (0x1 << 27) /**< \brief (HSMCI_CMDR) Boot Operation Acknowledge. */ -/* -------- HSMCI_BLKR : (HSMCI Offset: 0x18) Block Register -------- */ -#define HSMCI_BLKR_BCNT (0xffff << 0) /**< \brief (HSMCI_BLKR) MMC/SDIO Block Count - SDIO Byte Count */ -#define HSMCI_BLKR_BLKLEN (0xffff << 16) /**< \brief (HSMCI_BLKR) Data Block Length */ -/* -------- HSMCI_CSTOR : (HSMCI Offset: 0x1C) Completion Signal Timeout Register -------- */ -#define HSMCI_CSTOR_CSTOCYC (0xf << 0) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Cycle Number */ -#define HSMCI_CSTOR_CSTOMUL (0x7 << 4) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Multiplier */ -/* -------- HSMCI_RSPR[4] : (HSMCI Offset: 0x20) Response Register -------- */ -#define HSMCI_RSPR_RSP (0xffffffff << 0) /**< \brief (HSMCI_RSPR[4]) Response */ -/* -------- HSMCI_RDR : (HSMCI Offset: 0x30) Receive Data Register -------- */ -#define HSMCI_RDR_DATA (0xffffffff << 0) /**< \brief (HSMCI_RDR) Data to Read */ -/* -------- HSMCI_TDR : (HSMCI Offset: 0x34) Transmit Data Register -------- */ -#define HSMCI_TDR_DATA (0xffffffff << 0) /**< \brief (HSMCI_TDR) Data to Write */ -/* -------- HSMCI_SR : (HSMCI Offset: 0x40) Status Register -------- */ -#define HSMCI_SR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_SR) Command Ready */ -#define HSMCI_SR_RXRDY (0x1 << 1) /**< \brief (HSMCI_SR) Receiver Ready */ -#define HSMCI_SR_TXRDY (0x1 << 2) /**< \brief (HSMCI_SR) Transmit Ready */ -#define HSMCI_SR_BLKE (0x1 << 3) /**< \brief (HSMCI_SR) Data Block Ended */ -#define HSMCI_SR_DTIP (0x1 << 4) /**< \brief (HSMCI_SR) Data Transfer in Progress */ -#define HSMCI_SR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_SR) HSMCI Not Busy */ -#define HSMCI_SR_MCI_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_SR) */ -#define HSMCI_SR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_SR) SDIO Read Wait Operation Status */ -#define HSMCI_SR_CSRCV (0x1 << 13) /**< \brief (HSMCI_SR) CE-ATA Completion Signal Received */ -#define HSMCI_SR_RINDE (0x1 << 16) /**< \brief (HSMCI_SR) Response Index Error */ -#define HSMCI_SR_RDIRE (0x1 << 17) /**< \brief (HSMCI_SR) Response Direction Error */ -#define HSMCI_SR_RCRCE (0x1 << 18) /**< \brief (HSMCI_SR) Response CRC Error */ -#define HSMCI_SR_RENDE (0x1 << 19) /**< \brief (HSMCI_SR) Response End Bit Error */ -#define HSMCI_SR_RTOE (0x1 << 20) /**< \brief (HSMCI_SR) Response Time-out Error */ -#define HSMCI_SR_DCRCE (0x1 << 21) /**< \brief (HSMCI_SR) Data CRC Error */ -#define HSMCI_SR_DTOE (0x1 << 22) /**< \brief (HSMCI_SR) Data Time-out Error */ -#define HSMCI_SR_CSTOE (0x1 << 23) /**< \brief (HSMCI_SR) Completion Signal Time-out Error */ -#define HSMCI_SR_BLKOVRE (0x1 << 24) /**< \brief (HSMCI_SR) DMA Block Overrun Error */ -#define HSMCI_SR_DMADONE (0x1 << 25) /**< \brief (HSMCI_SR) DMA Transfer done */ -#define HSMCI_SR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_SR) FIFO empty flag */ -#define HSMCI_SR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_SR) Transfer Done flag */ -#define HSMCI_SR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_SR) Boot Operation Acknowledge Received */ -#define HSMCI_SR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_SR) Boot Operation Acknowledge Error */ -#define HSMCI_SR_OVRE (0x1 << 30) /**< \brief (HSMCI_SR) Overrun */ -#define HSMCI_SR_UNRE (0x1 << 31) /**< \brief (HSMCI_SR) Underrun */ -/* -------- HSMCI_IER : (HSMCI Offset: 0x44) Interrupt Enable Register -------- */ -#define HSMCI_IER_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IER) Command Ready Interrupt Enable */ -#define HSMCI_IER_RXRDY (0x1 << 1) /**< \brief (HSMCI_IER) Receiver Ready Interrupt Enable */ -#define HSMCI_IER_TXRDY (0x1 << 2) /**< \brief (HSMCI_IER) Transmit Ready Interrupt Enable */ -#define HSMCI_IER_BLKE (0x1 << 3) /**< \brief (HSMCI_IER) Data Block Ended Interrupt Enable */ -#define HSMCI_IER_DTIP (0x1 << 4) /**< \brief (HSMCI_IER) Data Transfer in Progress Interrupt Enable */ -#define HSMCI_IER_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IER) Data Not Busy Interrupt Enable */ -#define HSMCI_IER_MCI_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IER) */ -#define HSMCI_IER_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IER) SDIO Read Wait Operation Status Interrupt Enable */ -#define HSMCI_IER_CSRCV (0x1 << 13) /**< \brief (HSMCI_IER) Completion Signal Received Interrupt Enable */ -#define HSMCI_IER_RINDE (0x1 << 16) /**< \brief (HSMCI_IER) Response Index Error Interrupt Enable */ -#define HSMCI_IER_RDIRE (0x1 << 17) /**< \brief (HSMCI_IER) Response Direction Error Interrupt Enable */ -#define HSMCI_IER_RCRCE (0x1 << 18) /**< \brief (HSMCI_IER) Response CRC Error Interrupt Enable */ -#define HSMCI_IER_RENDE (0x1 << 19) /**< \brief (HSMCI_IER) Response End Bit Error Interrupt Enable */ -#define HSMCI_IER_RTOE (0x1 << 20) /**< \brief (HSMCI_IER) Response Time-out Error Interrupt Enable */ -#define HSMCI_IER_DCRCE (0x1 << 21) /**< \brief (HSMCI_IER) Data CRC Error Interrupt Enable */ -#define HSMCI_IER_DTOE (0x1 << 22) /**< \brief (HSMCI_IER) Data Time-out Error Interrupt Enable */ -#define HSMCI_IER_CSTOE (0x1 << 23) /**< \brief (HSMCI_IER) Completion Signal Timeout Error Interrupt Enable */ -#define HSMCI_IER_BLKOVRE (0x1 << 24) /**< \brief (HSMCI_IER) DMA Block Overrun Error Interrupt Enable */ -#define HSMCI_IER_DMADONE (0x1 << 25) /**< \brief (HSMCI_IER) DMA Transfer completed Interrupt Enable */ -#define HSMCI_IER_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IER) FIFO empty Interrupt enable */ -#define HSMCI_IER_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IER) Transfer Done Interrupt enable */ -#define HSMCI_IER_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IER) Boot Acknowledge Interrupt Enable */ -#define HSMCI_IER_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IER) Boot Acknowledge Error Interrupt Enable */ -#define HSMCI_IER_OVRE (0x1 << 30) /**< \brief (HSMCI_IER) Overrun Interrupt Enable */ -#define HSMCI_IER_UNRE (0x1 << 31) /**< \brief (HSMCI_IER) Underrun Interrupt Enable */ -/* -------- HSMCI_IDR : (HSMCI Offset: 0x48) Interrupt Disable Register -------- */ -#define HSMCI_IDR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IDR) Command Ready Interrupt Disable */ -#define HSMCI_IDR_RXRDY (0x1 << 1) /**< \brief (HSMCI_IDR) Receiver Ready Interrupt Disable */ -#define HSMCI_IDR_TXRDY (0x1 << 2) /**< \brief (HSMCI_IDR) Transmit Ready Interrupt Disable */ -#define HSMCI_IDR_BLKE (0x1 << 3) /**< \brief (HSMCI_IDR) Data Block Ended Interrupt Disable */ -#define HSMCI_IDR_DTIP (0x1 << 4) /**< \brief (HSMCI_IDR) Data Transfer in Progress Interrupt Disable */ -#define HSMCI_IDR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IDR) Data Not Busy Interrupt Disable */ -#define HSMCI_IDR_MCI_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IDR) */ -#define HSMCI_IDR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IDR) SDIO Read Wait Operation Status Interrupt Disable */ -#define HSMCI_IDR_CSRCV (0x1 << 13) /**< \brief (HSMCI_IDR) Completion Signal received interrupt disable */ -#define HSMCI_IDR_RINDE (0x1 << 16) /**< \brief (HSMCI_IDR) Response Index Error Interrupt Disable */ -#define HSMCI_IDR_RDIRE (0x1 << 17) /**< \brief (HSMCI_IDR) Response Direction Error Interrupt Disable */ -#define HSMCI_IDR_RCRCE (0x1 << 18) /**< \brief (HSMCI_IDR) Response CRC Error Interrupt Disable */ -#define HSMCI_IDR_RENDE (0x1 << 19) /**< \brief (HSMCI_IDR) Response End Bit Error Interrupt Disable */ -#define HSMCI_IDR_RTOE (0x1 << 20) /**< \brief (HSMCI_IDR) Response Time-out Error Interrupt Disable */ -#define HSMCI_IDR_DCRCE (0x1 << 21) /**< \brief (HSMCI_IDR) Data CRC Error Interrupt Disable */ -#define HSMCI_IDR_DTOE (0x1 << 22) /**< \brief (HSMCI_IDR) Data Time-out Error Interrupt Disable */ -#define HSMCI_IDR_CSTOE (0x1 << 23) /**< \brief (HSMCI_IDR) Completion Signal Time out Error Interrupt Disable */ -#define HSMCI_IDR_BLKOVRE (0x1 << 24) /**< \brief (HSMCI_IDR) DMA Block Overrun Error Interrupt Disable */ -#define HSMCI_IDR_DMADONE (0x1 << 25) /**< \brief (HSMCI_IDR) DMA Transfer completed Interrupt Disable */ -#define HSMCI_IDR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IDR) FIFO empty Interrupt Disable */ -#define HSMCI_IDR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IDR) Transfer Done Interrupt Disable */ -#define HSMCI_IDR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IDR) Boot Acknowledge Interrupt Disable */ -#define HSMCI_IDR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IDR) Boot Acknowledge Error Interrupt Disable */ -#define HSMCI_IDR_OVRE (0x1 << 30) /**< \brief (HSMCI_IDR) Overrun Interrupt Disable */ -#define HSMCI_IDR_UNRE (0x1 << 31) /**< \brief (HSMCI_IDR) Underrun Interrupt Disable */ -/* -------- HSMCI_IMR : (HSMCI Offset: 0x4C) Interrupt Mask Register -------- */ -#define HSMCI_IMR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IMR) Command Ready Interrupt Mask */ -#define HSMCI_IMR_RXRDY (0x1 << 1) /**< \brief (HSMCI_IMR) Receiver Ready Interrupt Mask */ -#define HSMCI_IMR_TXRDY (0x1 << 2) /**< \brief (HSMCI_IMR) Transmit Ready Interrupt Mask */ -#define HSMCI_IMR_BLKE (0x1 << 3) /**< \brief (HSMCI_IMR) Data Block Ended Interrupt Mask */ -#define HSMCI_IMR_DTIP (0x1 << 4) /**< \brief (HSMCI_IMR) Data Transfer in Progress Interrupt Mask */ -#define HSMCI_IMR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IMR) Data Not Busy Interrupt Mask */ -#define HSMCI_IMR_MCI_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IMR) */ -#define HSMCI_IMR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IMR) SDIO Read Wait Operation Status Interrupt Mask */ -#define HSMCI_IMR_CSRCV (0x1 << 13) /**< \brief (HSMCI_IMR) Completion Signal Received Interrupt Mask */ -#define HSMCI_IMR_RINDE (0x1 << 16) /**< \brief (HSMCI_IMR) Response Index Error Interrupt Mask */ -#define HSMCI_IMR_RDIRE (0x1 << 17) /**< \brief (HSMCI_IMR) Response Direction Error Interrupt Mask */ -#define HSMCI_IMR_RCRCE (0x1 << 18) /**< \brief (HSMCI_IMR) Response CRC Error Interrupt Mask */ -#define HSMCI_IMR_RENDE (0x1 << 19) /**< \brief (HSMCI_IMR) Response End Bit Error Interrupt Mask */ -#define HSMCI_IMR_RTOE (0x1 << 20) /**< \brief (HSMCI_IMR) Response Time-out Error Interrupt Mask */ -#define HSMCI_IMR_DCRCE (0x1 << 21) /**< \brief (HSMCI_IMR) Data CRC Error Interrupt Mask */ -#define HSMCI_IMR_DTOE (0x1 << 22) /**< \brief (HSMCI_IMR) Data Time-out Error Interrupt Mask */ -#define HSMCI_IMR_CSTOE (0x1 << 23) /**< \brief (HSMCI_IMR) Completion Signal Time-out Error Interrupt Mask */ -#define HSMCI_IMR_BLKOVRE (0x1 << 24) /**< \brief (HSMCI_IMR) DMA Block Overrun Error Interrupt Mask */ -#define HSMCI_IMR_DMADONE (0x1 << 25) /**< \brief (HSMCI_IMR) DMA Transfer Completed Interrupt Mask */ -#define HSMCI_IMR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IMR) FIFO Empty Interrupt Mask */ -#define HSMCI_IMR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IMR) Transfer Done Interrupt Mask */ -#define HSMCI_IMR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IMR) Boot Operation Acknowledge Received Interrupt Mask */ -#define HSMCI_IMR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IMR) Boot Operation Acknowledge Error Interrupt Mask */ -#define HSMCI_IMR_OVRE (0x1 << 30) /**< \brief (HSMCI_IMR) Overrun Interrupt Mask */ -#define HSMCI_IMR_UNRE (0x1 << 31) /**< \brief (HSMCI_IMR) Underrun Interrupt Mask */ -/* -------- HSMCI_DMA : (HSMCI Offset: 0x50) DMA Configuration Register -------- */ -#define HSMCI_DMA_OFFSET (0x3 << 0) /**< \brief (HSMCI_DMA) DMA Write Buffer Offset */ -#define HSMCI_DMA_CHKSIZE (0x1 << 4) /**< \brief (HSMCI_DMA) DMA Channel Read and Write Chunk Size */ -#define HSMCI_DMA_DMAEN (0x1 << 8) /**< \brief (HSMCI_DMA) DMA Hardware Handshaking Enable */ -#define HSMCI_DMA_ROPT (0x1 << 12) /**< \brief (HSMCI_DMA) Read Optimization with padding */ -/* -------- HSMCI_CFG : (HSMCI Offset: 0x54) Configuration Register -------- */ -#define HSMCI_CFG_FIFOMODE (0x1 << 0) /**< \brief (HSMCI_CFG) HSMCI Internal FIFO control mode */ -#define HSMCI_CFG_FERRCTRL (0x1 << 4) /**< \brief (HSMCI_CFG) Flow Error flag reset control mode */ -#define HSMCI_CFG_HSMODE (0x1 << 8) /**< \brief (HSMCI_CFG) High Speed Mode */ -#define HSMCI_CFG_LSYNC (0x1 << 12) /**< \brief (HSMCI_CFG) Synchronize on the last block */ -/* -------- HSMCI_WPMR : (HSMCI Offset: 0xE4) Write Protection Mode Register -------- */ -#define HSMCI_WPMR_WP_EN (0x1 << 0) /**< \brief (HSMCI_WPMR) Write Protection Enable */ -#define HSMCI_WPMR_WP_KEY (0xffffff << 8) /**< \brief (HSMCI_WPMR) Write Protection Key password */ -/* -------- HSMCI_WPSR : (HSMCI Offset: 0xE8) Write Protection Status Register -------- */ -#define HSMCI_WPSR_WP_VS (0xf << 0) /**< \brief (HSMCI_WPSR) */ -#define HSMCI_WPSR_WP_VSRC (0xffff << 8) /**< \brief (HSMCI_WPSR) Write Protection Violation Status */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR AHB Bus Matrix */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_MATRIX AHB Bus Matrix */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Matrix hardware registers */ -typedef struct { - RwReg MATRIX_MCFG[5]; /**< \brief (Matrix Offset: 0x0000) Master Configuration Register */ - RwReg Reserved1[11]; - RwReg MATRIX_SCFG[10]; /**< \brief (Matrix Offset: 0x0040) Slave Configuration Register */ - RwReg Reserved2[6]; - RwReg MATRIX_PRAS0; /**< \brief (Matrix Offset: 0x0080) Priority Register A for Slave 0 */ - RwReg Reserved3[1]; - RwReg MATRIX_PRAS1; /**< \brief (Matrix Offset: 0x0088) Priority Register A for Slave 1 */ - RwReg Reserved4[1]; - RwReg MATRIX_PRAS2; /**< \brief (Matrix Offset: 0x0090) Priority Register A for Slave 2 */ - RwReg Reserved5[1]; - RwReg MATRIX_PRAS3; /**< \brief (Matrix Offset: 0x0098) Priority Register A for Slave 3 */ - RwReg Reserved6[1]; - RwReg MATRIX_PRAS4; /**< \brief (Matrix Offset: 0x00A0) Priority Register A for Slave 4 */ - RwReg Reserved7[1]; - RwReg MATRIX_PRAS5; /**< \brief (Matrix Offset: 0x00A8) Priority Register A for Slave 5 */ - RwReg Reserved8[1]; - RwReg MATRIX_PRAS6; /**< \brief (Matrix Offset: 0x00B0) Priority Register A for Slave 6 */ - RwReg Reserved9[1]; - RwReg MATRIX_PRAS7; /**< \brief (Matrix Offset: 0x00B8) Priority Register A for Slave 7 */ - RwReg Reserved10[1]; - RwReg MATRIX_PRAS8; /**< \brief (Matrix Offset: 0x00C0) Priority Register A for Slave 8 */ - RwReg Reserved11[1]; - RwReg MATRIX_PRAS9; /**< \brief (Matrix Offset: 0x00C8) Priority Register A for Slave 9 */ - RwReg Reserved12[13]; - RwReg MATRIX_MRCR; /**< \brief (Matrix Offset: 0x0100) Master Remap Control Register */ -} Matrix; -#endif /* __ASSEMBLY__ */ -/* -------- MATRIX_MCFG[5] : (MATRIX Offset: 0x0000) Master Configuration Register -------- */ -#define MATRIX_MCFG_ULBT (0x7 << 0) /**< \brief (MATRIX_MCFG[5]) Undefined Length Burst Type */ -/* -------- MATRIX_SCFG[10] : (MATRIX Offset: 0x0040) Slave Configuration Register -------- */ -#define MATRIX_SCFG_SLOT_CYCLE (0xff << 0) /**< \brief (MATRIX_SCFG[10]) Maximum Number of Allowed Cycles for a Burst */ -#define MATRIX_SCFG_DEFMSTR_TYPE (0x3 << 16) /**< \brief (MATRIX_SCFG[10]) Default Master Type */ -#define MATRIX_SCFG_FIXED_DEFMSTR (0x7 << 18) /**< \brief (MATRIX_SCFG[10]) Fixed Default Master */ -#define MATRIX_SCFG_ARBT (0x3 << 24) /**< \brief (MATRIX_SCFG[10]) Arbitration Type */ -/* -------- MATRIX_PRAS0 : (MATRIX Offset: 0x0080) Priority Register A for Slave 0 -------- */ -#define MATRIX_PRAS0_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS0) Master 0 Priority */ -#define MATRIX_PRAS0_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS0) Master 1 Priority */ -#define MATRIX_PRAS0_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS0) Master 2 Priority */ -#define MATRIX_PRAS0_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS0) Master 3 Priority */ -#define MATRIX_PRAS0_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS0) Master 4 Priority */ -/* -------- MATRIX_PRAS1 : (MATRIX Offset: 0x0088) Priority Register A for Slave 1 -------- */ -#define MATRIX_PRAS1_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS1) Master 0 Priority */ -#define MATRIX_PRAS1_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS1) Master 1 Priority */ -#define MATRIX_PRAS1_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS1) Master 2 Priority */ -#define MATRIX_PRAS1_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS1) Master 3 Priority */ -#define MATRIX_PRAS1_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS1) Master 4 Priority */ -/* -------- MATRIX_PRAS2 : (MATRIX Offset: 0x0090) Priority Register A for Slave 2 -------- */ -#define MATRIX_PRAS2_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS2) Master 0 Priority */ -#define MATRIX_PRAS2_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS2) Master 1 Priority */ -#define MATRIX_PRAS2_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS2) Master 2 Priority */ -#define MATRIX_PRAS2_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS2) Master 3 Priority */ -#define MATRIX_PRAS2_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS2) Master 4 Priority */ -/* -------- MATRIX_PRAS3 : (MATRIX Offset: 0x0098) Priority Register A for Slave 3 -------- */ -#define MATRIX_PRAS3_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS3) Master 0 Priority */ -#define MATRIX_PRAS3_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS3) Master 1 Priority */ -#define MATRIX_PRAS3_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS3) Master 2 Priority */ -#define MATRIX_PRAS3_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS3) Master 3 Priority */ -#define MATRIX_PRAS3_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS3) Master 4 Priority */ -/* -------- MATRIX_PRAS4 : (MATRIX Offset: 0x00A0) Priority Register A for Slave 4 -------- */ -#define MATRIX_PRAS4_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS4) Master 0 Priority */ -#define MATRIX_PRAS4_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS4) Master 1 Priority */ -#define MATRIX_PRAS4_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS4) Master 2 Priority */ -#define MATRIX_PRAS4_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS4) Master 3 Priority */ -#define MATRIX_PRAS4_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS4) Master 4 Priority */ -/* -------- MATRIX_PRAS5 : (MATRIX Offset: 0x00A8) Priority Register A for Slave 5 -------- */ -#define MATRIX_PRAS5_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS5) Master 0 Priority */ -#define MATRIX_PRAS5_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS5) Master 1 Priority */ -#define MATRIX_PRAS5_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS5) Master 2 Priority */ -#define MATRIX_PRAS5_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS5) Master 3 Priority */ -#define MATRIX_PRAS5_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS5) Master 4 Priority */ -/* -------- MATRIX_PRAS6 : (MATRIX Offset: 0x00B0) Priority Register A for Slave 6 -------- */ -#define MATRIX_PRAS6_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS6) Master 0 Priority */ -#define MATRIX_PRAS6_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS6) Master 1 Priority */ -#define MATRIX_PRAS6_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS6) Master 2 Priority */ -#define MATRIX_PRAS6_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS6) Master 3 Priority */ -#define MATRIX_PRAS6_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS6) Master 4 Priority */ -/* -------- MATRIX_PRAS7 : (MATRIX Offset: 0x00B8) Priority Register A for Slave 7 -------- */ -#define MATRIX_PRAS7_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS7) Master 0 Priority */ -#define MATRIX_PRAS7_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS7) Master 1 Priority */ -#define MATRIX_PRAS7_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS7) Master 2 Priority */ -#define MATRIX_PRAS7_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS7) Master 3 Priority */ -#define MATRIX_PRAS7_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS7) Master 4 Priority */ -/* -------- MATRIX_PRAS8 : (MATRIX Offset: 0x00C0) Priority Register A for Slave 8 -------- */ -#define MATRIX_PRAS8_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS8) Master 0 Priority */ -#define MATRIX_PRAS8_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS8) Master 1 Priority */ -#define MATRIX_PRAS8_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS8) Master 2 Priority */ -#define MATRIX_PRAS8_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS8) Master 3 Priority */ -#define MATRIX_PRAS8_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS8) Master 4 Priority */ -/* -------- MATRIX_PRAS9 : (MATRIX Offset: 0x00C8) Priority Register A for Slave 9 -------- */ -#define MATRIX_PRAS9_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS9) Master 0 Priority */ -#define MATRIX_PRAS9_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS9) Master 1 Priority */ -#define MATRIX_PRAS9_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS9) Master 2 Priority */ -#define MATRIX_PRAS9_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS9) Master 3 Priority */ -#define MATRIX_PRAS9_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS9) Master 4 Priority */ -/* -------- MATRIX_MRCR : (MATRIX Offset: 0x0100) Master Remap Control Register -------- */ -#define MATRIX_MRCR_RCB0 (0x1 << 0) /**< \brief (MATRIX_MRCR) Remap Command Bit for AHB Master 0 */ -#define MATRIX_MRCR_RCB1 (0x1 << 1) /**< \brief (MATRIX_MRCR) Remap Command Bit for AHB Master 1 */ -#define MATRIX_MRCR_RCB2 (0x1 << 2) /**< \brief (MATRIX_MRCR) Remap Command Bit for AHB Master 2 */ -#define MATRIX_MRCR_RCB3 (0x1 << 3) /**< \brief (MATRIX_MRCR) Remap Command Bit for AHB Master 3 */ -#define MATRIX_MRCR_RCB4 (0x1 << 4) /**< \brief (MATRIX_MRCR) Remap Command Bit for AHB Master 4 */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Peripheral DMA Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_PDC Peripheral DMA Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pdc hardware registers */ -typedef struct { - RwReg Reserved1[64]; - RwReg PERIPH_RPR; /**< \brief (Pdc Offset: 0x100) Receive Pointer Register */ - RwReg PERIPH_RCR; /**< \brief (Pdc Offset: 0x104) Receive Counter Register */ - RwReg PERIPH_TPR; /**< \brief (Pdc Offset: 0x108) Transmit Pointer Register */ - RwReg PERIPH_TCR; /**< \brief (Pdc Offset: 0x10C) Transmit Counter Register */ - RwReg PERIPH_RNPR; /**< \brief (Pdc Offset: 0x110) Receive Next Pointer Register */ - RwReg PERIPH_RNCR; /**< \brief (Pdc Offset: 0x114) Receive Next Counter Register */ - RwReg PERIPH_TNPR; /**< \brief (Pdc Offset: 0x118) Transmit Next Pointer Register */ - RwReg PERIPH_TNCR; /**< \brief (Pdc Offset: 0x11C) Transmit Next Counter Register */ - WoReg PERIPH_PTCR; /**< \brief (Pdc Offset: 0x120) Transfer Control Register */ - RoReg PERIPH_PTSR; /**< \brief (Pdc Offset: 0x124) Transfer Status Register */ -} Pdc; -#endif /* __ASSEMBLY__ */ -/* -------- PERIPH_RPR : (PDC Offset: 0x100) Receive Pointer Register -------- */ -#define PERIPH_RPR_RXPTR (0xffffffff << 0) /**< \brief (PERIPH_RPR) Receive Pointer Register */ -/* -------- PERIPH_RCR : (PDC Offset: 0x104) Receive Counter Register -------- */ -#define PERIPH_RCR_RXCTR (0xffff << 0) /**< \brief (PERIPH_RCR) Receive Counter Register */ -/* -------- PERIPH_TPR : (PDC Offset: 0x108) Transmit Pointer Register -------- */ -#define PERIPH_TPR_TXPTR (0xffffffff << 0) /**< \brief (PERIPH_TPR) Transmit Counter Register */ -/* -------- PERIPH_TCR : (PDC Offset: 0x10C) Transmit Counter Register -------- */ -#define PERIPH_TCR_TXCTR (0xffff << 0) /**< \brief (PERIPH_TCR) Transmit Counter Register */ -/* -------- PERIPH_RNPR : (PDC Offset: 0x110) Receive Next Pointer Register -------- */ -#define PERIPH_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (PERIPH_RNPR) Receive Next Pointer */ -/* -------- PERIPH_RNCR : (PDC Offset: 0x114) Receive Next Counter Register -------- */ -#define PERIPH_RNCR_RXNCTR (0xffff << 0) /**< \brief (PERIPH_RNCR) Receive Next Counter */ -/* -------- PERIPH_TNPR : (PDC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define PERIPH_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (PERIPH_TNPR) Transmit Next Pointer */ -/* -------- PERIPH_TNCR : (PDC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define PERIPH_TNCR_TXNCTR (0xffff << 0) /**< \brief (PERIPH_TNCR) Transmit Counter Next */ -/* -------- PERIPH_PTCR : (PDC Offset: 0x120) Transfer Control Register -------- */ -#define PERIPH_PTCR_RXTEN (0x1 << 0) /**< \brief (PERIPH_PTCR) Receiver Transfer Enable */ -#define PERIPH_PTCR_RXTDIS (0x1 << 1) /**< \brief (PERIPH_PTCR) Receiver Transfer Disable */ -#define PERIPH_PTCR_TXTEN (0x1 << 8) /**< \brief (PERIPH_PTCR) Transmitter Transfer Enable */ -#define PERIPH_PTCR_TXTDIS (0x1 << 9) /**< \brief (PERIPH_PTCR) Transmitter Transfer Disable */ -/* -------- PERIPH_PTSR : (PDC Offset: 0x124) Transfer Status Register -------- */ -#define PERIPH_PTSR_RXTEN (0x1 << 0) /**< \brief (PERIPH_PTSR) Receiver Transfer Enable */ -#define PERIPH_PTSR_TXTEN (0x1 << 8) /**< \brief (PERIPH_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Parallel Input/Output */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_PIO Parallel Input/Output */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pio hardware registers */ -typedef struct { - WoReg PIO_PER; /**< \brief (Pio Offset: 0x0000) PIO Enable Register */ - WoReg PIO_PDR; /**< \brief (Pio Offset: 0x0004) PIO Disable Register */ - RoReg PIO_PSR; /**< \brief (Pio Offset: 0x0008) PIO Status Register */ - RwReg Reserved1[1]; - WoReg PIO_OER; /**< \brief (Pio Offset: 0x0010) Output Enable Register */ - WoReg PIO_ODR; /**< \brief (Pio Offset: 0x0014) Output Disable Register */ - RoReg PIO_OSR; /**< \brief (Pio Offset: 0x0018) Output Status Register */ - RwReg Reserved2[1]; - WoReg PIO_IFER; /**< \brief (Pio Offset: 0x0020) Glitch Input Filter Enable Register */ - WoReg PIO_IFDR; /**< \brief (Pio Offset: 0x0024) Glitch Input Filter Disable Register */ - RoReg PIO_IFSR; /**< \brief (Pio Offset: 0x0028) Glitch Input Filter Status Register */ - RwReg Reserved3[1]; - WoReg PIO_SODR; /**< \brief (Pio Offset: 0x0030) Set Output Data Register */ - WoReg PIO_CODR; /**< \brief (Pio Offset: 0x0034) Clear Output Data Register */ - RwReg PIO_ODSR; /**< \brief (Pio Offset: 0x0038) Output Data Status Register */ - RoReg PIO_PDSR; /**< \brief (Pio Offset: 0x003C) Pin Data Status Register */ - WoReg PIO_IER; /**< \brief (Pio Offset: 0x0040) Interrupt Enable Register */ - WoReg PIO_IDR; /**< \brief (Pio Offset: 0x0044) Interrupt Disable Register */ - RoReg PIO_IMR; /**< \brief (Pio Offset: 0x0048) Interrupt Mask Register */ - RoReg PIO_ISR; /**< \brief (Pio Offset: 0x004C) Interrupt Status Register */ - WoReg PIO_MDER; /**< \brief (Pio Offset: 0x0050) Multi-driver Enable Register */ - WoReg PIO_MDDR; /**< \brief (Pio Offset: 0x0054) Multi-driver Disable Register */ - RoReg PIO_MDSR; /**< \brief (Pio Offset: 0x0058) Multi-driver Status Register */ - RwReg Reserved4[1]; - WoReg PIO_PUDR; /**< \brief (Pio Offset: 0x0060) Pull-up Disable Register */ - WoReg PIO_PUER; /**< \brief (Pio Offset: 0x0064) Pull-up Enable Register */ - RoReg PIO_PUSR; /**< \brief (Pio Offset: 0x0068) Pad Pull-up Status Register */ - RwReg Reserved5[1]; - RwReg PIO_ABSR; /**< \brief (Pio Offset: 0x0070) Peripheral AB Select Register */ - RwReg Reserved6[3]; - WoReg PIO_SCIFSR; /**< \brief (Pio Offset: 0x0080) System Clock Glitch Input Filter Select Register */ - WoReg PIO_DIFSR; /**< \brief (Pio Offset: 0x0084) Debouncing Input Filter Select Register */ - RoReg PIO_IFDGSR; /**< \brief (Pio Offset: 0x0088) Glitch or Debouncing Input Filter Clock Selection Status Register */ - RwReg PIO_SCDR; /**< \brief (Pio Offset: 0x008C) Slow Clock Divider Debouncing Register */ - RwReg Reserved7[4]; - WoReg PIO_OWER; /**< \brief (Pio Offset: 0x00A0) Output Write Enable */ - WoReg PIO_OWDR; /**< \brief (Pio Offset: 0x00A4) Output Write Disable */ - RoReg PIO_OWSR; /**< \brief (Pio Offset: 0x00A8) Output Write Status Register */ - RwReg Reserved8[1]; - WoReg PIO_AIMER; /**< \brief (Pio Offset: 0x00B0) Additional Interrupt Modes Enable Register */ - WoReg PIO_AIMDR; /**< \brief (Pio Offset: 0x00B4) Additional Interrupt Modes Disables Register */ - RoReg PIO_AIMMR; /**< \brief (Pio Offset: 0x00B8) Additional Interrupt Modes Mask Register */ - RwReg Reserved9[1]; - WoReg PIO_ESR; /**< \brief (Pio Offset: 0x00C0) Edge Select Register */ - WoReg PIO_LSR; /**< \brief (Pio Offset: 0x00C4) Level Select Register */ - RoReg PIO_ELSR; /**< \brief (Pio Offset: 0x00C8) Edge/Level Status Register */ - RwReg Reserved10[1]; - WoReg PIO_FELLSR; /**< \brief (Pio Offset: 0x00D0) Falling Edge/Low Level Select Register */ - WoReg PIO_REHLSR; /**< \brief (Pio Offset: 0x00D4) Rising Edge/ High Level Select Register */ - RoReg PIO_FRLHSR; /**< \brief (Pio Offset: 0x00D8) Fall/Rise - Low/High Status Register */ - RwReg Reserved11[1]; - RoReg PIO_LOCKSR; /**< \brief (Pio Offset: 0x00E0) Lock Status */ - RwReg PIO_WPMR; /**< \brief (Pio Offset: 0x00E4) Write Protect Mode Register */ - RoReg PIO_WPSR; /**< \brief (Pio Offset: 0x00E8) Write Protect Status Register */ -} Pio; -#endif /* __ASSEMBLY__ */ -/* -------- PIO_PER : (PIO Offset: 0x0000) PIO Enable Register -------- */ -#define PIO_PER_P0 (0x1 << 0) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P1 (0x1 << 1) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P2 (0x1 << 2) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P3 (0x1 << 3) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P4 (0x1 << 4) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P5 (0x1 << 5) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P6 (0x1 << 6) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P7 (0x1 << 7) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P8 (0x1 << 8) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P9 (0x1 << 9) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P10 (0x1 << 10) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P11 (0x1 << 11) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P12 (0x1 << 12) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P13 (0x1 << 13) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P14 (0x1 << 14) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P15 (0x1 << 15) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P16 (0x1 << 16) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P17 (0x1 << 17) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P18 (0x1 << 18) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P19 (0x1 << 19) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P20 (0x1 << 20) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P21 (0x1 << 21) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P22 (0x1 << 22) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P23 (0x1 << 23) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P24 (0x1 << 24) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P25 (0x1 << 25) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P26 (0x1 << 26) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P27 (0x1 << 27) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P28 (0x1 << 28) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P29 (0x1 << 29) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P30 (0x1 << 30) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P31 (0x1 << 31) /**< \brief (PIO_PER) PIO Enable */ -/* -------- PIO_PDR : (PIO Offset: 0x0004) PIO Disable Register -------- */ -#define PIO_PDR_P0 (0x1 << 0) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P1 (0x1 << 1) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P2 (0x1 << 2) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P3 (0x1 << 3) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P4 (0x1 << 4) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P5 (0x1 << 5) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P6 (0x1 << 6) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P7 (0x1 << 7) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P8 (0x1 << 8) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P9 (0x1 << 9) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P10 (0x1 << 10) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P11 (0x1 << 11) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P12 (0x1 << 12) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P13 (0x1 << 13) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P14 (0x1 << 14) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P15 (0x1 << 15) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P16 (0x1 << 16) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P17 (0x1 << 17) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P18 (0x1 << 18) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P19 (0x1 << 19) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P20 (0x1 << 20) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P21 (0x1 << 21) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P22 (0x1 << 22) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P23 (0x1 << 23) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P24 (0x1 << 24) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P25 (0x1 << 25) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P26 (0x1 << 26) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P27 (0x1 << 27) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P28 (0x1 << 28) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P29 (0x1 << 29) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P30 (0x1 << 30) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P31 (0x1 << 31) /**< \brief (PIO_PDR) PIO Disable */ -/* -------- PIO_PSR : (PIO Offset: 0x0008) PIO Status Register -------- */ -#define PIO_PSR_P0 (0x1 << 0) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P1 (0x1 << 1) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P2 (0x1 << 2) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P3 (0x1 << 3) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P4 (0x1 << 4) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P5 (0x1 << 5) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P6 (0x1 << 6) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P7 (0x1 << 7) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P8 (0x1 << 8) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P9 (0x1 << 9) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P10 (0x1 << 10) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P11 (0x1 << 11) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P12 (0x1 << 12) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P13 (0x1 << 13) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P14 (0x1 << 14) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P15 (0x1 << 15) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P16 (0x1 << 16) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P17 (0x1 << 17) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P18 (0x1 << 18) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P19 (0x1 << 19) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P20 (0x1 << 20) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P21 (0x1 << 21) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P22 (0x1 << 22) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P23 (0x1 << 23) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P24 (0x1 << 24) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P25 (0x1 << 25) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P26 (0x1 << 26) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P27 (0x1 << 27) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P28 (0x1 << 28) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P29 (0x1 << 29) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P30 (0x1 << 30) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P31 (0x1 << 31) /**< \brief (PIO_PSR) PIO Status */ -/* -------- PIO_OER : (PIO Offset: 0x0010) Output Enable Register -------- */ -#define PIO_OER_P0 (0x1 << 0) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P1 (0x1 << 1) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P2 (0x1 << 2) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P3 (0x1 << 3) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P4 (0x1 << 4) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P5 (0x1 << 5) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P6 (0x1 << 6) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P7 (0x1 << 7) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P8 (0x1 << 8) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P9 (0x1 << 9) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P10 (0x1 << 10) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P11 (0x1 << 11) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P12 (0x1 << 12) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P13 (0x1 << 13) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P14 (0x1 << 14) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P15 (0x1 << 15) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P16 (0x1 << 16) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P17 (0x1 << 17) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P18 (0x1 << 18) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P19 (0x1 << 19) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P20 (0x1 << 20) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P21 (0x1 << 21) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P22 (0x1 << 22) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P23 (0x1 << 23) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P24 (0x1 << 24) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P25 (0x1 << 25) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P26 (0x1 << 26) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P27 (0x1 << 27) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P28 (0x1 << 28) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P29 (0x1 << 29) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P30 (0x1 << 30) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P31 (0x1 << 31) /**< \brief (PIO_OER) Output Enable */ -/* -------- PIO_ODR : (PIO Offset: 0x0014) Output Disable Register -------- */ -#define PIO_ODR_P0 (0x1 << 0) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P1 (0x1 << 1) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P2 (0x1 << 2) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P3 (0x1 << 3) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P4 (0x1 << 4) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P5 (0x1 << 5) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P6 (0x1 << 6) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P7 (0x1 << 7) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P8 (0x1 << 8) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P9 (0x1 << 9) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P10 (0x1 << 10) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P11 (0x1 << 11) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P12 (0x1 << 12) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P13 (0x1 << 13) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P14 (0x1 << 14) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P15 (0x1 << 15) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P16 (0x1 << 16) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P17 (0x1 << 17) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P18 (0x1 << 18) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P19 (0x1 << 19) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P20 (0x1 << 20) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P21 (0x1 << 21) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P22 (0x1 << 22) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P23 (0x1 << 23) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P24 (0x1 << 24) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P25 (0x1 << 25) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P26 (0x1 << 26) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P27 (0x1 << 27) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P28 (0x1 << 28) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P29 (0x1 << 29) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P30 (0x1 << 30) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P31 (0x1 << 31) /**< \brief (PIO_ODR) Output Disable */ -/* -------- PIO_OSR : (PIO Offset: 0x0018) Output Status Register -------- */ -#define PIO_OSR_P0 (0x1 << 0) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P1 (0x1 << 1) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P2 (0x1 << 2) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P3 (0x1 << 3) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P4 (0x1 << 4) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P5 (0x1 << 5) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P6 (0x1 << 6) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P7 (0x1 << 7) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P8 (0x1 << 8) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P9 (0x1 << 9) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P10 (0x1 << 10) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P11 (0x1 << 11) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P12 (0x1 << 12) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P13 (0x1 << 13) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P14 (0x1 << 14) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P15 (0x1 << 15) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P16 (0x1 << 16) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P17 (0x1 << 17) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P18 (0x1 << 18) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P19 (0x1 << 19) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P20 (0x1 << 20) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P21 (0x1 << 21) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P22 (0x1 << 22) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P23 (0x1 << 23) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P24 (0x1 << 24) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P25 (0x1 << 25) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P26 (0x1 << 26) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P27 (0x1 << 27) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P28 (0x1 << 28) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P29 (0x1 << 29) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P30 (0x1 << 30) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P31 (0x1 << 31) /**< \brief (PIO_OSR) Output Status */ -/* -------- PIO_IFER : (PIO Offset: 0x0020) Glitch Input Filter Enable Register -------- */ -#define PIO_IFER_P0 (0x1 << 0) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P1 (0x1 << 1) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P2 (0x1 << 2) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P3 (0x1 << 3) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P4 (0x1 << 4) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P5 (0x1 << 5) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P6 (0x1 << 6) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P7 (0x1 << 7) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P8 (0x1 << 8) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P9 (0x1 << 9) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P10 (0x1 << 10) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P11 (0x1 << 11) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P12 (0x1 << 12) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P13 (0x1 << 13) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P14 (0x1 << 14) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P15 (0x1 << 15) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P16 (0x1 << 16) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P17 (0x1 << 17) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P18 (0x1 << 18) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P19 (0x1 << 19) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P20 (0x1 << 20) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P21 (0x1 << 21) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P22 (0x1 << 22) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P23 (0x1 << 23) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P24 (0x1 << 24) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P25 (0x1 << 25) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P26 (0x1 << 26) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P27 (0x1 << 27) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P28 (0x1 << 28) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P29 (0x1 << 29) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P30 (0x1 << 30) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P31 (0x1 << 31) /**< \brief (PIO_IFER) Input Filter Enable */ -/* -------- PIO_IFDR : (PIO Offset: 0x0024) Glitch Input Filter Disable Register -------- */ -#define PIO_IFDR_P0 (0x1 << 0) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P1 (0x1 << 1) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P2 (0x1 << 2) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P3 (0x1 << 3) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P4 (0x1 << 4) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P5 (0x1 << 5) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P6 (0x1 << 6) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P7 (0x1 << 7) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P8 (0x1 << 8) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P9 (0x1 << 9) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P10 (0x1 << 10) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P11 (0x1 << 11) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P12 (0x1 << 12) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P13 (0x1 << 13) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P14 (0x1 << 14) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P15 (0x1 << 15) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P16 (0x1 << 16) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P17 (0x1 << 17) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P18 (0x1 << 18) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P19 (0x1 << 19) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P20 (0x1 << 20) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P21 (0x1 << 21) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P22 (0x1 << 22) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P23 (0x1 << 23) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P24 (0x1 << 24) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P25 (0x1 << 25) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P26 (0x1 << 26) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P27 (0x1 << 27) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P28 (0x1 << 28) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P29 (0x1 << 29) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P30 (0x1 << 30) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P31 (0x1 << 31) /**< \brief (PIO_IFDR) Input Filter Disable */ -/* -------- PIO_IFSR : (PIO Offset: 0x0028) Glitch Input Filter Status Register -------- */ -#define PIO_IFSR_P0 (0x1 << 0) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P1 (0x1 << 1) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P2 (0x1 << 2) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P3 (0x1 << 3) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P4 (0x1 << 4) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P5 (0x1 << 5) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P6 (0x1 << 6) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P7 (0x1 << 7) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P8 (0x1 << 8) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P9 (0x1 << 9) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P10 (0x1 << 10) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P11 (0x1 << 11) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P12 (0x1 << 12) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P13 (0x1 << 13) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P14 (0x1 << 14) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P15 (0x1 << 15) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P16 (0x1 << 16) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P17 (0x1 << 17) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P18 (0x1 << 18) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P19 (0x1 << 19) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P20 (0x1 << 20) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P21 (0x1 << 21) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P22 (0x1 << 22) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P23 (0x1 << 23) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P24 (0x1 << 24) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P25 (0x1 << 25) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P26 (0x1 << 26) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P27 (0x1 << 27) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P28 (0x1 << 28) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P29 (0x1 << 29) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P30 (0x1 << 30) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P31 (0x1 << 31) /**< \brief (PIO_IFSR) Input Filer Status */ -/* -------- PIO_SODR : (PIO Offset: 0x0030) Set Output Data Register -------- */ -#define PIO_SODR_P0 (0x1 << 0) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P1 (0x1 << 1) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P2 (0x1 << 2) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P3 (0x1 << 3) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P4 (0x1 << 4) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P5 (0x1 << 5) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P6 (0x1 << 6) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P7 (0x1 << 7) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P8 (0x1 << 8) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P9 (0x1 << 9) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P10 (0x1 << 10) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P11 (0x1 << 11) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P12 (0x1 << 12) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P13 (0x1 << 13) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P14 (0x1 << 14) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P15 (0x1 << 15) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P16 (0x1 << 16) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P17 (0x1 << 17) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P18 (0x1 << 18) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P19 (0x1 << 19) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P20 (0x1 << 20) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P21 (0x1 << 21) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P22 (0x1 << 22) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P23 (0x1 << 23) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P24 (0x1 << 24) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P25 (0x1 << 25) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P26 (0x1 << 26) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P27 (0x1 << 27) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P28 (0x1 << 28) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P29 (0x1 << 29) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P30 (0x1 << 30) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P31 (0x1 << 31) /**< \brief (PIO_SODR) Set Output Data */ -/* -------- PIO_CODR : (PIO Offset: 0x0034) Clear Output Data Register -------- */ -#define PIO_CODR_P0 (0x1 << 0) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P1 (0x1 << 1) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P2 (0x1 << 2) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P3 (0x1 << 3) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P4 (0x1 << 4) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P5 (0x1 << 5) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P6 (0x1 << 6) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P7 (0x1 << 7) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P8 (0x1 << 8) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P9 (0x1 << 9) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P10 (0x1 << 10) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P11 (0x1 << 11) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P12 (0x1 << 12) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P13 (0x1 << 13) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P14 (0x1 << 14) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P15 (0x1 << 15) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P16 (0x1 << 16) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P17 (0x1 << 17) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P18 (0x1 << 18) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P19 (0x1 << 19) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P20 (0x1 << 20) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P21 (0x1 << 21) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P22 (0x1 << 22) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P23 (0x1 << 23) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P24 (0x1 << 24) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P25 (0x1 << 25) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P26 (0x1 << 26) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P27 (0x1 << 27) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P28 (0x1 << 28) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P29 (0x1 << 29) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P30 (0x1 << 30) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P31 (0x1 << 31) /**< \brief (PIO_CODR) Clear Output Data */ -/* -------- PIO_ODSR : (PIO Offset: 0x0038) Output Data Status Register -------- */ -#define PIO_ODSR_P0 (0x1 << 0) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P1 (0x1 << 1) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P2 (0x1 << 2) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P3 (0x1 << 3) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P4 (0x1 << 4) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P5 (0x1 << 5) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P6 (0x1 << 6) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P7 (0x1 << 7) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P8 (0x1 << 8) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P9 (0x1 << 9) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P10 (0x1 << 10) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P11 (0x1 << 11) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P12 (0x1 << 12) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P13 (0x1 << 13) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P14 (0x1 << 14) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P15 (0x1 << 15) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P16 (0x1 << 16) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P17 (0x1 << 17) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P18 (0x1 << 18) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P19 (0x1 << 19) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P20 (0x1 << 20) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P21 (0x1 << 21) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P22 (0x1 << 22) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P23 (0x1 << 23) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P24 (0x1 << 24) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P25 (0x1 << 25) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P26 (0x1 << 26) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P27 (0x1 << 27) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P28 (0x1 << 28) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P29 (0x1 << 29) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P30 (0x1 << 30) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P31 (0x1 << 31) /**< \brief (PIO_ODSR) Output Data Status */ -/* -------- PIO_PDSR : (PIO Offset: 0x003C) Pin Data Status Register -------- */ -#define PIO_PDSR_P0 (0x1 << 0) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P1 (0x1 << 1) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P2 (0x1 << 2) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P3 (0x1 << 3) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P4 (0x1 << 4) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P5 (0x1 << 5) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P6 (0x1 << 6) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P7 (0x1 << 7) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P8 (0x1 << 8) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P9 (0x1 << 9) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P10 (0x1 << 10) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P11 (0x1 << 11) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P12 (0x1 << 12) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P13 (0x1 << 13) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P14 (0x1 << 14) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P15 (0x1 << 15) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P16 (0x1 << 16) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P17 (0x1 << 17) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P18 (0x1 << 18) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P19 (0x1 << 19) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P20 (0x1 << 20) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P21 (0x1 << 21) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P22 (0x1 << 22) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P23 (0x1 << 23) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P24 (0x1 << 24) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P25 (0x1 << 25) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P26 (0x1 << 26) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P27 (0x1 << 27) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P28 (0x1 << 28) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P29 (0x1 << 29) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P30 (0x1 << 30) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P31 (0x1 << 31) /**< \brief (PIO_PDSR) Output Data Status */ -/* -------- PIO_IER : (PIO Offset: 0x0040) Interrupt Enable Register -------- */ -#define PIO_IER_P0 (0x1 << 0) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P1 (0x1 << 1) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P2 (0x1 << 2) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P3 (0x1 << 3) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P4 (0x1 << 4) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P5 (0x1 << 5) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P6 (0x1 << 6) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P7 (0x1 << 7) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P8 (0x1 << 8) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P9 (0x1 << 9) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P10 (0x1 << 10) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P11 (0x1 << 11) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P12 (0x1 << 12) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P13 (0x1 << 13) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P14 (0x1 << 14) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P15 (0x1 << 15) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P16 (0x1 << 16) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P17 (0x1 << 17) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P18 (0x1 << 18) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P19 (0x1 << 19) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P20 (0x1 << 20) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P21 (0x1 << 21) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P22 (0x1 << 22) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P23 (0x1 << 23) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P24 (0x1 << 24) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P25 (0x1 << 25) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P26 (0x1 << 26) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P27 (0x1 << 27) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P28 (0x1 << 28) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P29 (0x1 << 29) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P30 (0x1 << 30) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P31 (0x1 << 31) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -/* -------- PIO_IDR : (PIO Offset: 0x0044) Interrupt Disable Register -------- */ -#define PIO_IDR_P0 (0x1 << 0) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P1 (0x1 << 1) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P2 (0x1 << 2) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P3 (0x1 << 3) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P4 (0x1 << 4) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P5 (0x1 << 5) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P6 (0x1 << 6) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P7 (0x1 << 7) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P8 (0x1 << 8) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P9 (0x1 << 9) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P10 (0x1 << 10) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P11 (0x1 << 11) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P12 (0x1 << 12) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P13 (0x1 << 13) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P14 (0x1 << 14) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P15 (0x1 << 15) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P16 (0x1 << 16) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P17 (0x1 << 17) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P18 (0x1 << 18) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P19 (0x1 << 19) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P20 (0x1 << 20) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P21 (0x1 << 21) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P22 (0x1 << 22) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P23 (0x1 << 23) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P24 (0x1 << 24) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P25 (0x1 << 25) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P26 (0x1 << 26) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P27 (0x1 << 27) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P28 (0x1 << 28) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P29 (0x1 << 29) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P30 (0x1 << 30) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P31 (0x1 << 31) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -/* -------- PIO_IMR : (PIO Offset: 0x0048) Interrupt Mask Register -------- */ -#define PIO_IMR_P0 (0x1 << 0) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P1 (0x1 << 1) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P2 (0x1 << 2) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P3 (0x1 << 3) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P4 (0x1 << 4) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P5 (0x1 << 5) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P6 (0x1 << 6) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P7 (0x1 << 7) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P8 (0x1 << 8) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P9 (0x1 << 9) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P10 (0x1 << 10) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P11 (0x1 << 11) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P12 (0x1 << 12) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P13 (0x1 << 13) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P14 (0x1 << 14) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P15 (0x1 << 15) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P16 (0x1 << 16) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P17 (0x1 << 17) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P18 (0x1 << 18) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P19 (0x1 << 19) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P20 (0x1 << 20) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P21 (0x1 << 21) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P22 (0x1 << 22) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P23 (0x1 << 23) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P24 (0x1 << 24) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P25 (0x1 << 25) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P26 (0x1 << 26) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P27 (0x1 << 27) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P28 (0x1 << 28) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P29 (0x1 << 29) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P30 (0x1 << 30) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P31 (0x1 << 31) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -/* -------- PIO_ISR : (PIO Offset: 0x004C) Interrupt Status Register -------- */ -#define PIO_ISR_P0 (0x1 << 0) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P1 (0x1 << 1) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P2 (0x1 << 2) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P3 (0x1 << 3) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P4 (0x1 << 4) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P5 (0x1 << 5) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P6 (0x1 << 6) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P7 (0x1 << 7) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P8 (0x1 << 8) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P9 (0x1 << 9) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P10 (0x1 << 10) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P11 (0x1 << 11) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P12 (0x1 << 12) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P13 (0x1 << 13) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P14 (0x1 << 14) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P15 (0x1 << 15) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P16 (0x1 << 16) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P17 (0x1 << 17) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P18 (0x1 << 18) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P19 (0x1 << 19) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P20 (0x1 << 20) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P21 (0x1 << 21) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P22 (0x1 << 22) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P23 (0x1 << 23) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P24 (0x1 << 24) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P25 (0x1 << 25) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P26 (0x1 << 26) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P27 (0x1 << 27) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P28 (0x1 << 28) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P29 (0x1 << 29) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P30 (0x1 << 30) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P31 (0x1 << 31) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -/* -------- PIO_MDER : (PIO Offset: 0x0050) Multi-driver Enable Register -------- */ -#define PIO_MDER_P0 (0x1 << 0) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P1 (0x1 << 1) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P2 (0x1 << 2) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P3 (0x1 << 3) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P4 (0x1 << 4) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P5 (0x1 << 5) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P6 (0x1 << 6) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P7 (0x1 << 7) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P8 (0x1 << 8) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P9 (0x1 << 9) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P10 (0x1 << 10) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P11 (0x1 << 11) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P12 (0x1 << 12) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P13 (0x1 << 13) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P14 (0x1 << 14) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P15 (0x1 << 15) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P16 (0x1 << 16) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P17 (0x1 << 17) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P18 (0x1 << 18) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P19 (0x1 << 19) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P20 (0x1 << 20) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P21 (0x1 << 21) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P22 (0x1 << 22) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P23 (0x1 << 23) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P24 (0x1 << 24) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P25 (0x1 << 25) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P26 (0x1 << 26) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P27 (0x1 << 27) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P28 (0x1 << 28) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P29 (0x1 << 29) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P30 (0x1 << 30) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P31 (0x1 << 31) /**< \brief (PIO_MDER) Multi Drive Enable. */ -/* -------- PIO_MDDR : (PIO Offset: 0x0054) Multi-driver Disable Register -------- */ -#define PIO_MDDR_P0 (0x1 << 0) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P1 (0x1 << 1) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P2 (0x1 << 2) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P3 (0x1 << 3) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P4 (0x1 << 4) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P5 (0x1 << 5) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P6 (0x1 << 6) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P7 (0x1 << 7) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P8 (0x1 << 8) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P9 (0x1 << 9) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P10 (0x1 << 10) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P11 (0x1 << 11) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P12 (0x1 << 12) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P13 (0x1 << 13) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P14 (0x1 << 14) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P15 (0x1 << 15) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P16 (0x1 << 16) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P17 (0x1 << 17) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P18 (0x1 << 18) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P19 (0x1 << 19) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P20 (0x1 << 20) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P21 (0x1 << 21) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P22 (0x1 << 22) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P23 (0x1 << 23) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P24 (0x1 << 24) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P25 (0x1 << 25) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P26 (0x1 << 26) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P27 (0x1 << 27) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P28 (0x1 << 28) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P29 (0x1 << 29) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P30 (0x1 << 30) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P31 (0x1 << 31) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -/* -------- PIO_MDSR : (PIO Offset: 0x0058) Multi-driver Status Register -------- */ -#define PIO_MDSR_P0 (0x1 << 0) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P1 (0x1 << 1) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P2 (0x1 << 2) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P3 (0x1 << 3) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P4 (0x1 << 4) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P5 (0x1 << 5) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P6 (0x1 << 6) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P7 (0x1 << 7) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P8 (0x1 << 8) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P9 (0x1 << 9) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P10 (0x1 << 10) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P11 (0x1 << 11) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P12 (0x1 << 12) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P13 (0x1 << 13) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P14 (0x1 << 14) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P15 (0x1 << 15) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P16 (0x1 << 16) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P17 (0x1 << 17) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P18 (0x1 << 18) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P19 (0x1 << 19) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P20 (0x1 << 20) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P21 (0x1 << 21) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P22 (0x1 << 22) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P23 (0x1 << 23) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P24 (0x1 << 24) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P25 (0x1 << 25) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P26 (0x1 << 26) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P27 (0x1 << 27) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P28 (0x1 << 28) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P29 (0x1 << 29) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P30 (0x1 << 30) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P31 (0x1 << 31) /**< \brief (PIO_MDSR) Multi Drive Status. */ -/* -------- PIO_PUDR : (PIO Offset: 0x0060) Pull-up Disable Register -------- */ -#define PIO_PUDR_P0 (0x1 << 0) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P1 (0x1 << 1) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P2 (0x1 << 2) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P3 (0x1 << 3) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P4 (0x1 << 4) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P5 (0x1 << 5) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P6 (0x1 << 6) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P7 (0x1 << 7) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P8 (0x1 << 8) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P9 (0x1 << 9) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P10 (0x1 << 10) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P11 (0x1 << 11) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P12 (0x1 << 12) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P13 (0x1 << 13) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P14 (0x1 << 14) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P15 (0x1 << 15) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P16 (0x1 << 16) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P17 (0x1 << 17) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P18 (0x1 << 18) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P19 (0x1 << 19) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P20 (0x1 << 20) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P21 (0x1 << 21) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P22 (0x1 << 22) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P23 (0x1 << 23) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P24 (0x1 << 24) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P25 (0x1 << 25) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P26 (0x1 << 26) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P27 (0x1 << 27) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P28 (0x1 << 28) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P29 (0x1 << 29) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P30 (0x1 << 30) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P31 (0x1 << 31) /**< \brief (PIO_PUDR) Pull Up Disable. */ -/* -------- PIO_PUER : (PIO Offset: 0x0064) Pull-up Enable Register -------- */ -#define PIO_PUER_P0 (0x1 << 0) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P1 (0x1 << 1) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P2 (0x1 << 2) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P3 (0x1 << 3) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P4 (0x1 << 4) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P5 (0x1 << 5) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P6 (0x1 << 6) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P7 (0x1 << 7) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P8 (0x1 << 8) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P9 (0x1 << 9) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P10 (0x1 << 10) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P11 (0x1 << 11) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P12 (0x1 << 12) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P13 (0x1 << 13) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P14 (0x1 << 14) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P15 (0x1 << 15) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P16 (0x1 << 16) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P17 (0x1 << 17) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P18 (0x1 << 18) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P19 (0x1 << 19) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P20 (0x1 << 20) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P21 (0x1 << 21) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P22 (0x1 << 22) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P23 (0x1 << 23) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P24 (0x1 << 24) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P25 (0x1 << 25) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P26 (0x1 << 26) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P27 (0x1 << 27) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P28 (0x1 << 28) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P29 (0x1 << 29) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P30 (0x1 << 30) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P31 (0x1 << 31) /**< \brief (PIO_PUER) Pull Up Enable. */ -/* -------- PIO_PUSR : (PIO Offset: 0x0068) Pad Pull-up Status Register -------- */ -#define PIO_PUSR_P0 (0x1 << 0) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P1 (0x1 << 1) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P2 (0x1 << 2) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P3 (0x1 << 3) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P4 (0x1 << 4) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P5 (0x1 << 5) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P6 (0x1 << 6) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P7 (0x1 << 7) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P8 (0x1 << 8) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P9 (0x1 << 9) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P10 (0x1 << 10) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P11 (0x1 << 11) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P12 (0x1 << 12) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P13 (0x1 << 13) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P14 (0x1 << 14) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P15 (0x1 << 15) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P16 (0x1 << 16) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P17 (0x1 << 17) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P18 (0x1 << 18) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P19 (0x1 << 19) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P20 (0x1 << 20) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P21 (0x1 << 21) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P22 (0x1 << 22) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P23 (0x1 << 23) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P24 (0x1 << 24) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P25 (0x1 << 25) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P26 (0x1 << 26) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P27 (0x1 << 27) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P28 (0x1 << 28) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P29 (0x1 << 29) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P30 (0x1 << 30) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P31 (0x1 << 31) /**< \brief (PIO_PUSR) Pull Up Status. */ -/* -------- PIO_ABSR : (PIO Offset: 0x0070) Peripheral AB Select Register -------- */ -#define PIO_ABSR_P0 (0x1 << 0) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P1 (0x1 << 1) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P2 (0x1 << 2) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P3 (0x1 << 3) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P4 (0x1 << 4) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P5 (0x1 << 5) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P6 (0x1 << 6) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P7 (0x1 << 7) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P8 (0x1 << 8) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P9 (0x1 << 9) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P10 (0x1 << 10) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P11 (0x1 << 11) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P12 (0x1 << 12) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P13 (0x1 << 13) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P14 (0x1 << 14) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P15 (0x1 << 15) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P16 (0x1 << 16) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P17 (0x1 << 17) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P18 (0x1 << 18) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P19 (0x1 << 19) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P20 (0x1 << 20) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P21 (0x1 << 21) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P22 (0x1 << 22) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P23 (0x1 << 23) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P24 (0x1 << 24) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P25 (0x1 << 25) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P26 (0x1 << 26) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P27 (0x1 << 27) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P28 (0x1 << 28) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P29 (0x1 << 29) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P30 (0x1 << 30) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P31 (0x1 << 31) /**< \brief (PIO_ABSR) Peripheral A Select. */ -/* -------- PIO_SCIFSR : (PIO Offset: 0x0080) System Clock Glitch Input Filter Select Register -------- */ -#define PIO_SCIFSR_P0 (0x1 << 0) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P1 (0x1 << 1) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P2 (0x1 << 2) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P3 (0x1 << 3) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P4 (0x1 << 4) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P5 (0x1 << 5) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P6 (0x1 << 6) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P7 (0x1 << 7) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P8 (0x1 << 8) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P9 (0x1 << 9) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P10 (0x1 << 10) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P11 (0x1 << 11) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P12 (0x1 << 12) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P13 (0x1 << 13) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P14 (0x1 << 14) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P15 (0x1 << 15) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P16 (0x1 << 16) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P17 (0x1 << 17) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P18 (0x1 << 18) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P19 (0x1 << 19) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P20 (0x1 << 20) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P21 (0x1 << 21) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P22 (0x1 << 22) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P23 (0x1 << 23) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P24 (0x1 << 24) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P25 (0x1 << 25) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P26 (0x1 << 26) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P27 (0x1 << 27) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P28 (0x1 << 28) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P29 (0x1 << 29) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P30 (0x1 << 30) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P31 (0x1 << 31) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -/* -------- PIO_DIFSR : (PIO Offset: 0x0084) Debouncing Input Filter Select Register -------- */ -#define PIO_DIFSR_P0 (0x1 << 0) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P1 (0x1 << 1) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P2 (0x1 << 2) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P3 (0x1 << 3) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P4 (0x1 << 4) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P5 (0x1 << 5) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P6 (0x1 << 6) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P7 (0x1 << 7) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P8 (0x1 << 8) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P9 (0x1 << 9) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P10 (0x1 << 10) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P11 (0x1 << 11) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P12 (0x1 << 12) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P13 (0x1 << 13) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P14 (0x1 << 14) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P15 (0x1 << 15) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P16 (0x1 << 16) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P17 (0x1 << 17) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P18 (0x1 << 18) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P19 (0x1 << 19) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P20 (0x1 << 20) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P21 (0x1 << 21) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P22 (0x1 << 22) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P23 (0x1 << 23) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P24 (0x1 << 24) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P25 (0x1 << 25) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P26 (0x1 << 26) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P27 (0x1 << 27) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P28 (0x1 << 28) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P29 (0x1 << 29) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P30 (0x1 << 30) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P31 (0x1 << 31) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -/* -------- PIO_IFDGSR : (PIO Offset: 0x0088) Glitch or Debouncing Input Filter Clock Selection Status Register -------- */ -#define PIO_IFDGSR_P0 (0x1 << 0) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P1 (0x1 << 1) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P2 (0x1 << 2) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P3 (0x1 << 3) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P4 (0x1 << 4) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P5 (0x1 << 5) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P6 (0x1 << 6) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P7 (0x1 << 7) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P8 (0x1 << 8) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P9 (0x1 << 9) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P10 (0x1 << 10) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P11 (0x1 << 11) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P12 (0x1 << 12) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P13 (0x1 << 13) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P14 (0x1 << 14) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P15 (0x1 << 15) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P16 (0x1 << 16) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P17 (0x1 << 17) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P18 (0x1 << 18) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P19 (0x1 << 19) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P20 (0x1 << 20) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P21 (0x1 << 21) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P22 (0x1 << 22) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P23 (0x1 << 23) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P24 (0x1 << 24) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P25 (0x1 << 25) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P26 (0x1 << 26) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P27 (0x1 << 27) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P28 (0x1 << 28) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P29 (0x1 << 29) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P30 (0x1 << 30) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P31 (0x1 << 31) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -/* -------- PIO_SCDR : (PIO Offset: 0x008C) Slow Clock Divider Debouncing Register -------- */ -#define PIO_SCDR_DIV0 (0x1 << 0) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV1 (0x1 << 1) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV2 (0x1 << 2) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV3 (0x1 << 3) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV4 (0x1 << 4) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV5 (0x1 << 5) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV6 (0x1 << 6) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV7 (0x1 << 7) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV8 (0x1 << 8) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV9 (0x1 << 9) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV10 (0x1 << 10) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV11 (0x1 << 11) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV12 (0x1 << 12) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV13 (0x1 << 13) /**< \brief (PIO_SCDR) */ -/* -------- PIO_OWER : (PIO Offset: 0x00A0) Output Write Enable -------- */ -#define PIO_OWER_P0 (0x1 << 0) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P1 (0x1 << 1) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P2 (0x1 << 2) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P3 (0x1 << 3) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P4 (0x1 << 4) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P5 (0x1 << 5) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P6 (0x1 << 6) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P7 (0x1 << 7) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P8 (0x1 << 8) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P9 (0x1 << 9) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P10 (0x1 << 10) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P11 (0x1 << 11) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P12 (0x1 << 12) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P13 (0x1 << 13) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P14 (0x1 << 14) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P15 (0x1 << 15) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P16 (0x1 << 16) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P17 (0x1 << 17) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P18 (0x1 << 18) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P19 (0x1 << 19) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P20 (0x1 << 20) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P21 (0x1 << 21) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P22 (0x1 << 22) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P23 (0x1 << 23) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P24 (0x1 << 24) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P25 (0x1 << 25) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P26 (0x1 << 26) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P27 (0x1 << 27) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P28 (0x1 << 28) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P29 (0x1 << 29) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P30 (0x1 << 30) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P31 (0x1 << 31) /**< \brief (PIO_OWER) Output Write Enable. */ -/* -------- PIO_OWDR : (PIO Offset: 0x00A4) Output Write Disable -------- */ -#define PIO_OWDR_P0 (0x1 << 0) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P1 (0x1 << 1) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P2 (0x1 << 2) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P3 (0x1 << 3) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P4 (0x1 << 4) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P5 (0x1 << 5) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P6 (0x1 << 6) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P7 (0x1 << 7) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P8 (0x1 << 8) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P9 (0x1 << 9) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P10 (0x1 << 10) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P11 (0x1 << 11) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P12 (0x1 << 12) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P13 (0x1 << 13) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P14 (0x1 << 14) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P15 (0x1 << 15) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P16 (0x1 << 16) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P17 (0x1 << 17) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P18 (0x1 << 18) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P19 (0x1 << 19) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P20 (0x1 << 20) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P21 (0x1 << 21) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P22 (0x1 << 22) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P23 (0x1 << 23) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P24 (0x1 << 24) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P25 (0x1 << 25) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P26 (0x1 << 26) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P27 (0x1 << 27) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P28 (0x1 << 28) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P29 (0x1 << 29) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P30 (0x1 << 30) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P31 (0x1 << 31) /**< \brief (PIO_OWDR) Output Write Disable. */ -/* -------- PIO_OWSR : (PIO Offset: 0x00A8) Output Write Status Register -------- */ -#define PIO_OWSR_P0 (0x1 << 0) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P1 (0x1 << 1) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P2 (0x1 << 2) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P3 (0x1 << 3) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P4 (0x1 << 4) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P5 (0x1 << 5) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P6 (0x1 << 6) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P7 (0x1 << 7) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P8 (0x1 << 8) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P9 (0x1 << 9) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P10 (0x1 << 10) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P11 (0x1 << 11) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P12 (0x1 << 12) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P13 (0x1 << 13) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P14 (0x1 << 14) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P15 (0x1 << 15) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P16 (0x1 << 16) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P17 (0x1 << 17) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P18 (0x1 << 18) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P19 (0x1 << 19) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P20 (0x1 << 20) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P21 (0x1 << 21) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P22 (0x1 << 22) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P23 (0x1 << 23) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P24 (0x1 << 24) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P25 (0x1 << 25) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P26 (0x1 << 26) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P27 (0x1 << 27) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P28 (0x1 << 28) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P29 (0x1 << 29) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P30 (0x1 << 30) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P31 (0x1 << 31) /**< \brief (PIO_OWSR) Output Write Status. */ -/* -------- PIO_AIMER : (PIO Offset: 0x00B0) Additional Interrupt Modes Enable Register -------- */ -#define PIO_AIMER_P0 (0x1 << 0) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P1 (0x1 << 1) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P2 (0x1 << 2) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P3 (0x1 << 3) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P4 (0x1 << 4) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P5 (0x1 << 5) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P6 (0x1 << 6) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P7 (0x1 << 7) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P8 (0x1 << 8) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P9 (0x1 << 9) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P10 (0x1 << 10) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P11 (0x1 << 11) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P12 (0x1 << 12) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P13 (0x1 << 13) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P14 (0x1 << 14) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P15 (0x1 << 15) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P16 (0x1 << 16) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P17 (0x1 << 17) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P18 (0x1 << 18) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P19 (0x1 << 19) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P20 (0x1 << 20) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P21 (0x1 << 21) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P22 (0x1 << 22) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P23 (0x1 << 23) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P24 (0x1 << 24) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P25 (0x1 << 25) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P26 (0x1 << 26) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P27 (0x1 << 27) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P28 (0x1 << 28) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P29 (0x1 << 29) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P30 (0x1 << 30) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P31 (0x1 << 31) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -/* -------- PIO_AIMDR : (PIO Offset: 0x00B4) Additional Interrupt Modes Disables Register -------- */ -#define PIO_AIMDR_P0 (0x1 << 0) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P1 (0x1 << 1) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P2 (0x1 << 2) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P3 (0x1 << 3) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P4 (0x1 << 4) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P5 (0x1 << 5) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P6 (0x1 << 6) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P7 (0x1 << 7) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P8 (0x1 << 8) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P9 (0x1 << 9) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P10 (0x1 << 10) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P11 (0x1 << 11) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P12 (0x1 << 12) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P13 (0x1 << 13) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P14 (0x1 << 14) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P15 (0x1 << 15) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P16 (0x1 << 16) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P17 (0x1 << 17) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P18 (0x1 << 18) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P19 (0x1 << 19) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P20 (0x1 << 20) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P21 (0x1 << 21) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P22 (0x1 << 22) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P23 (0x1 << 23) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P24 (0x1 << 24) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P25 (0x1 << 25) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P26 (0x1 << 26) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P27 (0x1 << 27) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P28 (0x1 << 28) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P29 (0x1 << 29) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P30 (0x1 << 30) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P31 (0x1 << 31) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -/* -------- PIO_AIMMR : (PIO Offset: 0x00B8) Additional Interrupt Modes Mask Register -------- */ -#define PIO_AIMMR_P0 (0x1 << 0) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P1 (0x1 << 1) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P2 (0x1 << 2) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P3 (0x1 << 3) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P4 (0x1 << 4) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P5 (0x1 << 5) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P6 (0x1 << 6) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P7 (0x1 << 7) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P8 (0x1 << 8) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P9 (0x1 << 9) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P10 (0x1 << 10) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P11 (0x1 << 11) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P12 (0x1 << 12) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P13 (0x1 << 13) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P14 (0x1 << 14) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P15 (0x1 << 15) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P16 (0x1 << 16) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P17 (0x1 << 17) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P18 (0x1 << 18) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P19 (0x1 << 19) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P20 (0x1 << 20) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P21 (0x1 << 21) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P22 (0x1 << 22) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P23 (0x1 << 23) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P24 (0x1 << 24) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P25 (0x1 << 25) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P26 (0x1 << 26) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P27 (0x1 << 27) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P28 (0x1 << 28) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P29 (0x1 << 29) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P30 (0x1 << 30) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P31 (0x1 << 31) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -/* -------- PIO_ESR : (PIO Offset: 0x00C0) Edge Select Register -------- */ -#define PIO_ESR_P0 (0x1 << 0) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P1 (0x1 << 1) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P2 (0x1 << 2) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P3 (0x1 << 3) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P4 (0x1 << 4) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P5 (0x1 << 5) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P6 (0x1 << 6) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P7 (0x1 << 7) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P8 (0x1 << 8) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P9 (0x1 << 9) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P10 (0x1 << 10) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P11 (0x1 << 11) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P12 (0x1 << 12) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P13 (0x1 << 13) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P14 (0x1 << 14) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P15 (0x1 << 15) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P16 (0x1 << 16) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P17 (0x1 << 17) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P18 (0x1 << 18) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P19 (0x1 << 19) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P20 (0x1 << 20) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P21 (0x1 << 21) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P22 (0x1 << 22) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P23 (0x1 << 23) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P24 (0x1 << 24) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P25 (0x1 << 25) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P26 (0x1 << 26) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P27 (0x1 << 27) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P28 (0x1 << 28) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P29 (0x1 << 29) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P30 (0x1 << 30) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P31 (0x1 << 31) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -/* -------- PIO_LSR : (PIO Offset: 0x00C4) Level Select Register -------- */ -#define PIO_LSR_P0 (0x1 << 0) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P1 (0x1 << 1) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P2 (0x1 << 2) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P3 (0x1 << 3) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P4 (0x1 << 4) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P5 (0x1 << 5) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P6 (0x1 << 6) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P7 (0x1 << 7) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P8 (0x1 << 8) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P9 (0x1 << 9) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P10 (0x1 << 10) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P11 (0x1 << 11) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P12 (0x1 << 12) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P13 (0x1 << 13) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P14 (0x1 << 14) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P15 (0x1 << 15) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P16 (0x1 << 16) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P17 (0x1 << 17) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P18 (0x1 << 18) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P19 (0x1 << 19) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P20 (0x1 << 20) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P21 (0x1 << 21) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P22 (0x1 << 22) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P23 (0x1 << 23) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P24 (0x1 << 24) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P25 (0x1 << 25) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P26 (0x1 << 26) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P27 (0x1 << 27) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P28 (0x1 << 28) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P29 (0x1 << 29) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P30 (0x1 << 30) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P31 (0x1 << 31) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -/* -------- PIO_ELSR : (PIO Offset: 0x00C8) Edge/Level Status Register -------- */ -#define PIO_ELSR_P0 (0x1 << 0) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P1 (0x1 << 1) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P2 (0x1 << 2) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P3 (0x1 << 3) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P4 (0x1 << 4) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P5 (0x1 << 5) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P6 (0x1 << 6) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P7 (0x1 << 7) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P8 (0x1 << 8) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P9 (0x1 << 9) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P10 (0x1 << 10) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P11 (0x1 << 11) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P12 (0x1 << 12) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P13 (0x1 << 13) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P14 (0x1 << 14) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P15 (0x1 << 15) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P16 (0x1 << 16) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P17 (0x1 << 17) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P18 (0x1 << 18) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P19 (0x1 << 19) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P20 (0x1 << 20) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P21 (0x1 << 21) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P22 (0x1 << 22) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P23 (0x1 << 23) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P24 (0x1 << 24) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P25 (0x1 << 25) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P26 (0x1 << 26) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P27 (0x1 << 27) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P28 (0x1 << 28) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P29 (0x1 << 29) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P30 (0x1 << 30) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P31 (0x1 << 31) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -/* -------- PIO_FELLSR : (PIO Offset: 0x00D0) Falling Edge/Low Level Select Register -------- */ -#define PIO_FELLSR_P0 (0x1 << 0) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P1 (0x1 << 1) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P2 (0x1 << 2) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P3 (0x1 << 3) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P4 (0x1 << 4) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P5 (0x1 << 5) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P6 (0x1 << 6) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P7 (0x1 << 7) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P8 (0x1 << 8) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P9 (0x1 << 9) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P10 (0x1 << 10) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P11 (0x1 << 11) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P12 (0x1 << 12) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P13 (0x1 << 13) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P14 (0x1 << 14) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P15 (0x1 << 15) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P16 (0x1 << 16) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P17 (0x1 << 17) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P18 (0x1 << 18) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P19 (0x1 << 19) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P20 (0x1 << 20) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P21 (0x1 << 21) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P22 (0x1 << 22) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P23 (0x1 << 23) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P24 (0x1 << 24) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P25 (0x1 << 25) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P26 (0x1 << 26) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P27 (0x1 << 27) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P28 (0x1 << 28) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P29 (0x1 << 29) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P30 (0x1 << 30) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P31 (0x1 << 31) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -/* -------- PIO_REHLSR : (PIO Offset: 0x00D4) Rising Edge/ High Level Select Register -------- */ -#define PIO_REHLSR_P0 (0x1 << 0) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P1 (0x1 << 1) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P2 (0x1 << 2) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P3 (0x1 << 3) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P4 (0x1 << 4) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P5 (0x1 << 5) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P6 (0x1 << 6) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P7 (0x1 << 7) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P8 (0x1 << 8) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P9 (0x1 << 9) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P10 (0x1 << 10) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P11 (0x1 << 11) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P12 (0x1 << 12) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P13 (0x1 << 13) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P14 (0x1 << 14) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P15 (0x1 << 15) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P16 (0x1 << 16) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P17 (0x1 << 17) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P18 (0x1 << 18) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P19 (0x1 << 19) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P20 (0x1 << 20) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P21 (0x1 << 21) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P22 (0x1 << 22) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P23 (0x1 << 23) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P24 (0x1 << 24) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P25 (0x1 << 25) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P26 (0x1 << 26) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P27 (0x1 << 27) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P28 (0x1 << 28) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P29 (0x1 << 29) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P30 (0x1 << 30) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P31 (0x1 << 31) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -/* -------- PIO_FRLHSR : (PIO Offset: 0x00D8) Fall/Rise - Low/High Status Register -------- */ -#define PIO_FRLHSR_P0 (0x1 << 0) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P1 (0x1 << 1) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P2 (0x1 << 2) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P3 (0x1 << 3) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P4 (0x1 << 4) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P5 (0x1 << 5) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P6 (0x1 << 6) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P7 (0x1 << 7) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P8 (0x1 << 8) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P9 (0x1 << 9) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P10 (0x1 << 10) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P11 (0x1 << 11) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P12 (0x1 << 12) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P13 (0x1 << 13) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P14 (0x1 << 14) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P15 (0x1 << 15) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P16 (0x1 << 16) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P17 (0x1 << 17) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P18 (0x1 << 18) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P19 (0x1 << 19) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P20 (0x1 << 20) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P21 (0x1 << 21) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P22 (0x1 << 22) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P23 (0x1 << 23) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P24 (0x1 << 24) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P25 (0x1 << 25) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P26 (0x1 << 26) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P27 (0x1 << 27) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P28 (0x1 << 28) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P29 (0x1 << 29) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P30 (0x1 << 30) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P31 (0x1 << 31) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -/* -------- PIO_LOCKSR : (PIO Offset: 0x00E0) Lock Status -------- */ -#define PIO_LOCKSR_P0 (0x1 << 0) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P1 (0x1 << 1) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P2 (0x1 << 2) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P3 (0x1 << 3) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P4 (0x1 << 4) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P5 (0x1 << 5) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P6 (0x1 << 6) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P7 (0x1 << 7) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P8 (0x1 << 8) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P9 (0x1 << 9) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P10 (0x1 << 10) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P11 (0x1 << 11) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P12 (0x1 << 12) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P13 (0x1 << 13) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P14 (0x1 << 14) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P15 (0x1 << 15) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P16 (0x1 << 16) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P17 (0x1 << 17) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P18 (0x1 << 18) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P19 (0x1 << 19) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P20 (0x1 << 20) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P21 (0x1 << 21) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P22 (0x1 << 22) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P23 (0x1 << 23) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P24 (0x1 << 24) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P25 (0x1 << 25) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P26 (0x1 << 26) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P27 (0x1 << 27) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P28 (0x1 << 28) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P29 (0x1 << 29) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P30 (0x1 << 30) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P31 (0x1 << 31) /**< \brief (PIO_LOCKSR) Lock Status. */ -/* -------- PIO_WPMR : (PIO Offset: 0x00E4) Write Protect Mode Register -------- */ -#define PIO_WPMR_WPEN (0x1 << 0) /**< \brief (PIO_WPMR) Write Protect Enable */ -#define PIO_WPMR_WPKEY (0xffffff << 8) /**< \brief (PIO_WPMR) Write Protect KEY */ -/* -------- PIO_WPSR : (PIO Offset: 0x00E8) Write Protect Status Register -------- */ -#define PIO_WPSR_WPVS (0x1 << 0) /**< \brief (PIO_WPSR) Write Protect Violation Status */ -#define PIO_WPSR_WPVSRC (0xffff << 8) /**< \brief (PIO_WPSR) Write Protect Violation Source */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Power Management Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_PMC Power Management Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pmc hardware registers */ -typedef struct { - WoReg PMC_SCER; /**< \brief (Pmc Offset: 0x0000) System Clock Enable Register */ - WoReg PMC_SCDR; /**< \brief (Pmc Offset: 0x0004) System Clock Disable Register */ - RoReg PMC_SCSR; /**< \brief (Pmc Offset: 0x0008) System Clock Status Register */ - RwReg Reserved1[1]; - WoReg PMC_PCER; /**< \brief (Pmc Offset: 0x0010) Peripheral Clock Enable Register */ - WoReg PMC_PCDR; /**< \brief (Pmc Offset: 0x0014) Peripheral Clock Disable Register */ - RoReg PMC_PCSR; /**< \brief (Pmc Offset: 0x0018) Peripheral Clock Status Register */ - RwReg CKGR_UCKR; /**< \brief (Pmc Offset: 0x001C) UTMI Clock Register */ - RwReg CKGR_MOR; /**< \brief (Pmc Offset: 0x0020) Main Oscillator Register */ - RoReg CKGR_MCFR; /**< \brief (Pmc Offset: 0x0024) Main Clock Frequency Register */ - RwReg CKGR_PLLAR; /**< \brief (Pmc Offset: 0x0028) PLLA Register */ - RwReg Reserved2[1]; - RwReg PMC_MCKR; /**< \brief (Pmc Offset: 0x0030) Master Clock Register */ - RwReg Reserved3[3]; - RwReg PMC_PCK[3]; /**< \brief (Pmc Offset: 0x0040) Programmable Clock 0 Register */ - RwReg Reserved4[5]; - WoReg PMC_IER; /**< \brief (Pmc Offset: 0x0060) Interrupt Enable Register */ - WoReg PMC_IDR; /**< \brief (Pmc Offset: 0x0064) Interrupt Disable Register */ - RoReg PMC_SR; /**< \brief (Pmc Offset: 0x0068) Status Register */ - RoReg PMC_IMR; /**< \brief (Pmc Offset: 0x006C) Interrupt Mask Register */ - RwReg PMC_FSMR; /**< \brief (Pmc Offset: 0x0070) Fast Startup Mode Register */ - RwReg PMC_FSPR; /**< \brief (Pmc Offset: 0x0074) Fast Startup Polarity Register */ - WoReg PMC_FOCR; /**< \brief (Pmc Offset: 0x0078) Fault Output Clear Register */ -} Pmc; -#endif /* __ASSEMBLY__ */ -/* -------- PMC_SCER : (PMC Offset: 0x0000) System Clock Enable Register -------- */ -#define PMC_SCER_PCK0 (0x1 << 8) /**< \brief (PMC_SCER) Programmable Clock 0 Output Enable */ -#define PMC_SCER_PCK1 (0x1 << 9) /**< \brief (PMC_SCER) Programmable Clock 1 Output Enable */ -#define PMC_SCER_PCK2 (0x1 << 10) /**< \brief (PMC_SCER) Programmable Clock 2 Output Enable */ -/* -------- PMC_SCDR : (PMC Offset: 0x0004) System Clock Disable Register -------- */ -#define PMC_SCDR_PCK0 (0x1 << 8) /**< \brief (PMC_SCDR) Programmable Clock 0 Output Disable */ -#define PMC_SCDR_PCK1 (0x1 << 9) /**< \brief (PMC_SCDR) Programmable Clock 1 Output Disable */ -#define PMC_SCDR_PCK2 (0x1 << 10) /**< \brief (PMC_SCDR) Programmable Clock 2 Output Disable */ -/* -------- PMC_SCSR : (PMC Offset: 0x0008) System Clock Status Register -------- */ -#define PMC_SCSR_PCK0 (0x1 << 8) /**< \brief (PMC_SCSR) Programmable Clock 0 Output Status */ -#define PMC_SCSR_PCK1 (0x1 << 9) /**< \brief (PMC_SCSR) Programmable Clock 1 Output Status */ -#define PMC_SCSR_PCK2 (0x1 << 10) /**< \brief (PMC_SCSR) Programmable Clock 2 Output Status */ -/* -------- PMC_PCER : (PMC Offset: 0x0010) Peripheral Clock Enable Register -------- */ -#define PMC_PCER_PID2 (0x1 << 2) /**< \brief (PMC_PCER) Peripheral Clock 2 Enable */ -#define PMC_PCER_PID3 (0x1 << 3) /**< \brief (PMC_PCER) Peripheral Clock 3 Enable */ -#define PMC_PCER_PID4 (0x1 << 4) /**< \brief (PMC_PCER) Peripheral Clock 4 Enable */ -#define PMC_PCER_PID5 (0x1 << 5) /**< \brief (PMC_PCER) Peripheral Clock 5 Enable */ -#define PMC_PCER_PID6 (0x1 << 6) /**< \brief (PMC_PCER) Peripheral Clock 6 Enable */ -#define PMC_PCER_PID7 (0x1 << 7) /**< \brief (PMC_PCER) Peripheral Clock 7 Enable */ -#define PMC_PCER_PID8 (0x1 << 8) /**< \brief (PMC_PCER) Peripheral Clock 8 Enable */ -#define PMC_PCER_PID9 (0x1 << 9) /**< \brief (PMC_PCER) Peripheral Clock 9 Enable */ -#define PMC_PCER_PID10 (0x1 << 10) /**< \brief (PMC_PCER) Peripheral Clock 10 Enable */ -#define PMC_PCER_PID11 (0x1 << 11) /**< \brief (PMC_PCER) Peripheral Clock 11 Enable */ -#define PMC_PCER_PID12 (0x1 << 12) /**< \brief (PMC_PCER) Peripheral Clock 12 Enable */ -#define PMC_PCER_PID13 (0x1 << 13) /**< \brief (PMC_PCER) Peripheral Clock 13 Enable */ -#define PMC_PCER_PID14 (0x1 << 14) /**< \brief (PMC_PCER) Peripheral Clock 14 Enable */ -#define PMC_PCER_PID15 (0x1 << 15) /**< \brief (PMC_PCER) Peripheral Clock 15 Enable */ -#define PMC_PCER_PID16 (0x1 << 16) /**< \brief (PMC_PCER) Peripheral Clock 16 Enable */ -#define PMC_PCER_PID17 (0x1 << 17) /**< \brief (PMC_PCER) Peripheral Clock 17 Enable */ -#define PMC_PCER_PID18 (0x1 << 18) /**< \brief (PMC_PCER) Peripheral Clock 18 Enable */ -#define PMC_PCER_PID19 (0x1 << 19) /**< \brief (PMC_PCER) Peripheral Clock 19 Enable */ -#define PMC_PCER_PID20 (0x1 << 20) /**< \brief (PMC_PCER) Peripheral Clock 20 Enable */ -#define PMC_PCER_PID21 (0x1 << 21) /**< \brief (PMC_PCER) Peripheral Clock 21 Enable */ -#define PMC_PCER_PID22 (0x1 << 22) /**< \brief (PMC_PCER) Peripheral Clock 22 Enable */ -#define PMC_PCER_PID23 (0x1 << 23) /**< \brief (PMC_PCER) Peripheral Clock 23 Enable */ -#define PMC_PCER_PID24 (0x1 << 24) /**< \brief (PMC_PCER) Peripheral Clock 24 Enable */ -#define PMC_PCER_PID25 (0x1 << 25) /**< \brief (PMC_PCER) Peripheral Clock 25 Enable */ -#define PMC_PCER_PID26 (0x1 << 26) /**< \brief (PMC_PCER) Peripheral Clock 26 Enable */ -#define PMC_PCER_PID27 (0x1 << 27) /**< \brief (PMC_PCER) Peripheral Clock 27 Enable */ -#define PMC_PCER_PID28 (0x1 << 28) /**< \brief (PMC_PCER) Peripheral Clock 28 Enable */ -#define PMC_PCER_PID29 (0x1 << 29) /**< \brief (PMC_PCER) Peripheral Clock 29 Enable */ -#define PMC_PCER_PID30 (0x1 << 30) /**< \brief (PMC_PCER) Peripheral Clock 30 Enable */ -#define PMC_PCER_PID31 (0x1 << 31) /**< \brief (PMC_PCER) Peripheral Clock 31 Enable */ -/* -------- PMC_PCDR : (PMC Offset: 0x0014) Peripheral Clock Disable Register -------- */ -#define PMC_PCDR_PID2 (0x1 << 2) /**< \brief (PMC_PCDR) Peripheral Clock 2 Disable */ -#define PMC_PCDR_PID3 (0x1 << 3) /**< \brief (PMC_PCDR) Peripheral Clock 3 Disable */ -#define PMC_PCDR_PID4 (0x1 << 4) /**< \brief (PMC_PCDR) Peripheral Clock 4 Disable */ -#define PMC_PCDR_PID5 (0x1 << 5) /**< \brief (PMC_PCDR) Peripheral Clock 5 Disable */ -#define PMC_PCDR_PID6 (0x1 << 6) /**< \brief (PMC_PCDR) Peripheral Clock 6 Disable */ -#define PMC_PCDR_PID7 (0x1 << 7) /**< \brief (PMC_PCDR) Peripheral Clock 7 Disable */ -#define PMC_PCDR_PID8 (0x1 << 8) /**< \brief (PMC_PCDR) Peripheral Clock 8 Disable */ -#define PMC_PCDR_PID9 (0x1 << 9) /**< \brief (PMC_PCDR) Peripheral Clock 9 Disable */ -#define PMC_PCDR_PID10 (0x1 << 10) /**< \brief (PMC_PCDR) Peripheral Clock 10 Disable */ -#define PMC_PCDR_PID11 (0x1 << 11) /**< \brief (PMC_PCDR) Peripheral Clock 11 Disable */ -#define PMC_PCDR_PID12 (0x1 << 12) /**< \brief (PMC_PCDR) Peripheral Clock 12 Disable */ -#define PMC_PCDR_PID13 (0x1 << 13) /**< \brief (PMC_PCDR) Peripheral Clock 13 Disable */ -#define PMC_PCDR_PID14 (0x1 << 14) /**< \brief (PMC_PCDR) Peripheral Clock 14 Disable */ -#define PMC_PCDR_PID15 (0x1 << 15) /**< \brief (PMC_PCDR) Peripheral Clock 15 Disable */ -#define PMC_PCDR_PID16 (0x1 << 16) /**< \brief (PMC_PCDR) Peripheral Clock 16 Disable */ -#define PMC_PCDR_PID17 (0x1 << 17) /**< \brief (PMC_PCDR) Peripheral Clock 17 Disable */ -#define PMC_PCDR_PID18 (0x1 << 18) /**< \brief (PMC_PCDR) Peripheral Clock 18 Disable */ -#define PMC_PCDR_PID19 (0x1 << 19) /**< \brief (PMC_PCDR) Peripheral Clock 19 Disable */ -#define PMC_PCDR_PID20 (0x1 << 20) /**< \brief (PMC_PCDR) Peripheral Clock 20 Disable */ -#define PMC_PCDR_PID21 (0x1 << 21) /**< \brief (PMC_PCDR) Peripheral Clock 21 Disable */ -#define PMC_PCDR_PID22 (0x1 << 22) /**< \brief (PMC_PCDR) Peripheral Clock 22 Disable */ -#define PMC_PCDR_PID23 (0x1 << 23) /**< \brief (PMC_PCDR) Peripheral Clock 23 Disable */ -#define PMC_PCDR_PID24 (0x1 << 24) /**< \brief (PMC_PCDR) Peripheral Clock 24 Disable */ -#define PMC_PCDR_PID25 (0x1 << 25) /**< \brief (PMC_PCDR) Peripheral Clock 25 Disable */ -#define PMC_PCDR_PID26 (0x1 << 26) /**< \brief (PMC_PCDR) Peripheral Clock 26 Disable */ -#define PMC_PCDR_PID27 (0x1 << 27) /**< \brief (PMC_PCDR) Peripheral Clock 27 Disable */ -#define PMC_PCDR_PID28 (0x1 << 28) /**< \brief (PMC_PCDR) Peripheral Clock 28 Disable */ -#define PMC_PCDR_PID29 (0x1 << 29) /**< \brief (PMC_PCDR) Peripheral Clock 29 Disable */ -#define PMC_PCDR_PID30 (0x1 << 30) /**< \brief (PMC_PCDR) Peripheral Clock 30 Disable */ -#define PMC_PCDR_PID31 (0x1 << 31) /**< \brief (PMC_PCDR) Peripheral Clock 31 Disable */ -/* -------- PMC_PCSR : (PMC Offset: 0x0018) Peripheral Clock Status Register -------- */ -#define PMC_PCSR_PID2 (0x1 << 2) /**< \brief (PMC_PCSR) Peripheral Clock 2 Status */ -#define PMC_PCSR_PID3 (0x1 << 3) /**< \brief (PMC_PCSR) Peripheral Clock 3 Status */ -#define PMC_PCSR_PID4 (0x1 << 4) /**< \brief (PMC_PCSR) Peripheral Clock 4 Status */ -#define PMC_PCSR_PID5 (0x1 << 5) /**< \brief (PMC_PCSR) Peripheral Clock 5 Status */ -#define PMC_PCSR_PID6 (0x1 << 6) /**< \brief (PMC_PCSR) Peripheral Clock 6 Status */ -#define PMC_PCSR_PID7 (0x1 << 7) /**< \brief (PMC_PCSR) Peripheral Clock 7 Status */ -#define PMC_PCSR_PID8 (0x1 << 8) /**< \brief (PMC_PCSR) Peripheral Clock 8 Status */ -#define PMC_PCSR_PID9 (0x1 << 9) /**< \brief (PMC_PCSR) Peripheral Clock 9 Status */ -#define PMC_PCSR_PID10 (0x1 << 10) /**< \brief (PMC_PCSR) Peripheral Clock 10 Status */ -#define PMC_PCSR_PID11 (0x1 << 11) /**< \brief (PMC_PCSR) Peripheral Clock 11 Status */ -#define PMC_PCSR_PID12 (0x1 << 12) /**< \brief (PMC_PCSR) Peripheral Clock 12 Status */ -#define PMC_PCSR_PID13 (0x1 << 13) /**< \brief (PMC_PCSR) Peripheral Clock 13 Status */ -#define PMC_PCSR_PID14 (0x1 << 14) /**< \brief (PMC_PCSR) Peripheral Clock 14 Status */ -#define PMC_PCSR_PID15 (0x1 << 15) /**< \brief (PMC_PCSR) Peripheral Clock 15 Status */ -#define PMC_PCSR_PID16 (0x1 << 16) /**< \brief (PMC_PCSR) Peripheral Clock 16 Status */ -#define PMC_PCSR_PID17 (0x1 << 17) /**< \brief (PMC_PCSR) Peripheral Clock 17 Status */ -#define PMC_PCSR_PID18 (0x1 << 18) /**< \brief (PMC_PCSR) Peripheral Clock 18 Status */ -#define PMC_PCSR_PID19 (0x1 << 19) /**< \brief (PMC_PCSR) Peripheral Clock 19 Status */ -#define PMC_PCSR_PID20 (0x1 << 20) /**< \brief (PMC_PCSR) Peripheral Clock 20 Status */ -#define PMC_PCSR_PID21 (0x1 << 21) /**< \brief (PMC_PCSR) Peripheral Clock 21 Status */ -#define PMC_PCSR_PID22 (0x1 << 22) /**< \brief (PMC_PCSR) Peripheral Clock 22 Status */ -#define PMC_PCSR_PID23 (0x1 << 23) /**< \brief (PMC_PCSR) Peripheral Clock 23 Status */ -#define PMC_PCSR_PID24 (0x1 << 24) /**< \brief (PMC_PCSR) Peripheral Clock 24 Status */ -#define PMC_PCSR_PID25 (0x1 << 25) /**< \brief (PMC_PCSR) Peripheral Clock 25 Status */ -#define PMC_PCSR_PID26 (0x1 << 26) /**< \brief (PMC_PCSR) Peripheral Clock 26 Status */ -#define PMC_PCSR_PID27 (0x1 << 27) /**< \brief (PMC_PCSR) Peripheral Clock 27 Status */ -#define PMC_PCSR_PID28 (0x1 << 28) /**< \brief (PMC_PCSR) Peripheral Clock 28 Status */ -#define PMC_PCSR_PID29 (0x1 << 29) /**< \brief (PMC_PCSR) Peripheral Clock 29 Status */ -#define PMC_PCSR_PID30 (0x1 << 30) /**< \brief (PMC_PCSR) Peripheral Clock 30 Status */ -#define PMC_PCSR_PID31 (0x1 << 31) /**< \brief (PMC_PCSR) Peripheral Clock 31 Status */ -/* -------- CKGR_UCKR : (PMC Offset: 0x001C) UTMI Clock Register -------- */ -#define CKGR_UCKR_UPLLEN (0x1 << 16) /**< \brief (CKGR_UCKR) UTMI PLL Enable */ -#define CKGR_UCKR_UPLLCOUNT (0xf << 20) /**< \brief (CKGR_UCKR) UTMI PLL Start-up Time */ -/* -------- CKGR_MOR : (PMC Offset: 0x0020) Main Oscillator Register -------- */ -#define CKGR_MOR_MOSCXTEN (0x1 << 0) /**< \brief (CKGR_MOR) Main Crystal Oscillator Enable */ -#define CKGR_MOR_MOSCXTBY (0x1 << 1) /**< \brief (CKGR_MOR) Main Crystal Oscillator Bypass */ -#define CKGR_MOR_WAITMODE (0x1 << 2) /**< \brief (CKGR_MOR) Wait Mode Command */ -#define CKGR_MOR_MOSCRCEN (0x1 << 3) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Enable */ -#define CKGR_MOR_MOSCRCF (0x7 << 4) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Frequency Selection */ -#define CKGR_MOR_MOSCXTST (0xff << 8) /**< \brief (CKGR_MOR) Main Crystal Oscillator Start-up Time */ -#define CKGR_MOR_KEY (0xff << 16) /**< \brief (CKGR_MOR) Password */ -#define CKGR_MOR_MOSCSEL (0x1 << 24) /**< \brief (CKGR_MOR) Main Oscillator Selection */ -#define CKGR_MOR_CFDEN (0x1 << 25) /**< \brief (CKGR_MOR) Clock Failure Detector Enable */ -/* -------- CKGR_MCFR : (PMC Offset: 0x0024) Main Clock Frequency Register -------- */ -#define CKGR_MCFR_MAINF (0xffff << 0) /**< \brief (CKGR_MCFR) Main Clock Frequency */ -#define CKGR_MCFR_MAINFRDY (0x1 << 16) /**< \brief (CKGR_MCFR) Main Clock Ready */ -/* -------- CKGR_PLLAR : (PMC Offset: 0x0028) PLLA Register -------- */ -#define CKGR_PLLAR_DIVA (0xff << 0) /**< \brief (CKGR_PLLAR) Divider */ -#define CKGR_PLLAR_PLLACOUNT (0x3f << 8) /**< \brief (CKGR_PLLAR) PLLA Counter */ -#define CKGR_PLLAR_STMODE (0x3 << 14) /**< \brief (CKGR_PLLAR) Start Mode */ -#define CKGR_PLLAR_MULA (0x7ff << 16) /**< \brief (CKGR_PLLAR) PLLA Multiplier */ -#define CKGR_PLLAR_STUCKTO1 (0x1 << 29) /**< \brief (CKGR_PLLAR) */ -/* -------- PMC_MCKR : (PMC Offset: 0x0030) Master Clock Register -------- */ -#define PMC_MCKR_CSS (0x3 << 0) /**< \brief (PMC_MCKR) Master Clock Source Selection */ -#define PMC_MCKR_CSS_SLOW_CLK (0x0 << 0) /**< \brief (PMC_MCKR) Slow Clock is selected */ -#define PMC_MCKR_CSS_MAIN_CLK (0x1 << 0) /**< \brief (PMC_MCKR) Main Clock is selected */ -#define PMC_MCKR_CSS_PLLA_CLK (0x2 << 0) /**< \brief (PMC_MCKR) PLLA Clock is selected */ -#define PMC_MCKR_CSS_PLLB_CLK (0x3 << 0) /**< \brief (PMC_MCKR) UPLL Clock is selected */ -#define PMC_MCKR_PRES (0x7 << 4) /**< \brief (PMC_MCKR) Processor Clock Prescaler */ -#define PMC_MCKR_PRES_CLK (0x0 << 4) /**< \brief (PMC_MCKR) Selected clock */ -#define PMC_MCKR_PRES_CLK_2 (0x1 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 2 */ -#define PMC_MCKR_PRES_CLK_4 (0x2 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 4 */ -#define PMC_MCKR_PRES_CLK_8 (0x3 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 8 */ -#define PMC_MCKR_PRES_CLK_16 (0x4 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 16 */ -#define PMC_MCKR_PRES_CLK_32 (0x5 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 32 */ -#define PMC_MCKR_PRES_CLK_64 (0x6 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 64 */ -/* -------- PMC_PCK[3] : (PMC Offset: 0x0040) Programmable Clock 0 Register -------- */ -#define PMC_PCK_CSS (0x7 << 0) /**< \brief (PMC_PCK[3]) Master Clock Source Selection */ -#define PMC_PCK_PRES (0x7 << 4) /**< \brief (PMC_PCK[3]) Programmable Clock Prescaler */ -/* -------- PMC_IER : (PMC Offset: 0x0060) Interrupt Enable Register -------- */ -#define PMC_IER_MOSCXTS (0x1 << 0) /**< \brief (PMC_IER) Main Crystal Oscillator Status Interrupt Enable */ -#define PMC_IER_LOCKA (0x1 << 1) /**< \brief (PMC_IER) PLL A Lock Interrupt Enable */ -#define PMC_IER_MCKRDY (0x1 << 3) /**< \brief (PMC_IER) Master Clock Ready Interrupt Enable */ -#define PMC_IER_LOCKU (0x1 << 6) /**< \brief (PMC_IER) UTMI PLL Lock Interrupt Enable */ -#define PMC_IER_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IER) Programmable Clock Ready 0 Interrupt Enable */ -#define PMC_IER_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IER) Programmable Clock Ready 1 Interrupt Enable */ -#define PMC_IER_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IER) Programmable Clock Ready 2 Interrupt Enable */ -#define PMC_IER_MOSCSELS (0x1 << 16) /**< \brief (PMC_IER) Main Oscillator Selection Status Interrupt Enable */ -#define PMC_IER_MOSCRCS (0x1 << 17) /**< \brief (PMC_IER) Main On-Chip RC Status Interrupt Enable */ -#define PMC_IER_CFDEV (0x1 << 18) /**< \brief (PMC_IER) Clock Failure Detector Event Interrupt Enable */ -/* -------- PMC_IDR : (PMC Offset: 0x0064) Interrupt Disable Register -------- */ -#define PMC_IDR_MOSCXTS (0x1 << 0) /**< \brief (PMC_IDR) Main Crystal Oscillator Status Interrupt Disable */ -#define PMC_IDR_LOCKA (0x1 << 1) /**< \brief (PMC_IDR) PLL A Lock Interrupt Disable */ -#define PMC_IDR_MCKRDY (0x1 << 3) /**< \brief (PMC_IDR) Master Clock Ready Interrupt Disable */ -#define PMC_IDR_LOCKU (0x1 << 6) /**< \brief (PMC_IDR) UTMI PLL Lock Interrupt Disable */ -#define PMC_IDR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IDR) Programmable Clock Ready 0 Interrupt Disable */ -#define PMC_IDR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IDR) Programmable Clock Ready 1 Interrupt Disable */ -#define PMC_IDR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IDR) Programmable Clock Ready 2 Interrupt Disable */ -#define PMC_IDR_MOSCSELS (0x1 << 16) /**< \brief (PMC_IDR) Main Oscillator Selection Status Interrupt Disable */ -#define PMC_IDR_MOSCRCS (0x1 << 17) /**< \brief (PMC_IDR) Main On-Chip RC Status Interrupt Disable */ -#define PMC_IDR_CFDEV (0x1 << 18) /**< \brief (PMC_IDR) Clock Failure Detector Event Interrupt Disable */ -/* -------- PMC_SR : (PMC Offset: 0x0068) Status Register -------- */ -#define PMC_SR_MOSCXTS (0x1 << 0) /**< \brief (PMC_SR) Main XTAL Oscillator Status */ -#define PMC_SR_LOCKA (0x1 << 1) /**< \brief (PMC_SR) PLL A Lock Status */ -#define PMC_SR_MCKRDY (0x1 << 3) /**< \brief (PMC_SR) Master Clock Status */ -#define PMC_SR_LOCKU (0x1 << 6) /**< \brief (PMC_SR) UTMI PLL Lock Status */ -#define PMC_SR_OSCSELS (0x1 << 7) /**< \brief (PMC_SR) Slow Clock Oscillator Selection */ -#define PMC_SR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_MOSCSELS (0x1 << 16) /**< \brief (PMC_SR) Main Oscillator Selection Status */ -#define PMC_SR_MOSCRCS (0x1 << 17) /**< \brief (PMC_SR) Main On-Chip RC Oscillator Status */ -#define PMC_SR_CFDEV (0x1 << 18) /**< \brief (PMC_SR) Clock Failure Detector Event */ -#define PMC_SR_CFDS (0x1 << 19) /**< \brief (PMC_SR) Clock Failure Detector Status */ -#define PMC_SR_FOS (0x1 << 20) /**< \brief (PMC_SR) Clock Failure Detector Fault Output Status */ -/* -------- PMC_IMR : (PMC Offset: 0x006C) Interrupt Mask Register -------- */ -#define PMC_IMR_MOSCXTS (0x1 << 0) /**< \brief (PMC_IMR) Main Crystal Oscillator Status Interrupt Mask */ -#define PMC_IMR_LOCKA (0x1 << 1) /**< \brief (PMC_IMR) PLL A Lock Interrupt Mask */ -#define PMC_IMR_MCKRDY (0x1 << 3) /**< \brief (PMC_IMR) Master Clock Ready Interrupt Mask */ -#define PMC_IMR_LOCKU (0x1 << 6) /**< \brief (PMC_IMR) UTMI PLL Lock Interrupt Mask */ -#define PMC_IMR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IMR) Programmable Clock Ready 0 Interrupt Mask */ -#define PMC_IMR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IMR) Programmable Clock Ready 1 Interrupt Mask */ -#define PMC_IMR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IMR) Programmable Clock Ready 2 Interrupt Mask */ -#define PMC_IMR_MOSCSELS (0x1 << 16) /**< \brief (PMC_IMR) Main Oscillator Selection Status Interrupt Mask */ -#define PMC_IMR_MOSCRCS (0x1 << 17) /**< \brief (PMC_IMR) Main On-Chip RC Status Interrupt Mask */ -#define PMC_IMR_CFDEV (0x1 << 18) /**< \brief (PMC_IMR) Clock Failure Detector Event Interrupt Mask */ -/* -------- PMC_FSMR : (PMC Offset: 0x0070) Fast Startup Mode Register -------- */ -#define PMC_FSMR_FSTT0 (0x1 << 0) /**< \brief (PMC_FSMR) Fast Startup Input Enable 0 */ -#define PMC_FSMR_FSTT1 (0x1 << 1) /**< \brief (PMC_FSMR) Fast Startup Input Enable 1 */ -#define PMC_FSMR_FSTT2 (0x1 << 2) /**< \brief (PMC_FSMR) Fast Startup Input Enable 2 */ -#define PMC_FSMR_FSTT3 (0x1 << 3) /**< \brief (PMC_FSMR) Fast Startup Input Enable 3 */ -#define PMC_FSMR_FSTT4 (0x1 << 4) /**< \brief (PMC_FSMR) Fast Startup Input Enable 4 */ -#define PMC_FSMR_FSTT5 (0x1 << 5) /**< \brief (PMC_FSMR) Fast Startup Input Enable 5 */ -#define PMC_FSMR_FSTT6 (0x1 << 6) /**< \brief (PMC_FSMR) Fast Startup Input Enable 6 */ -#define PMC_FSMR_FSTT7 (0x1 << 7) /**< \brief (PMC_FSMR) Fast Startup Input Enable 7 */ -#define PMC_FSMR_FSTT8 (0x1 << 8) /**< \brief (PMC_FSMR) Fast Startup Input Enable 8 */ -#define PMC_FSMR_FSTT9 (0x1 << 9) /**< \brief (PMC_FSMR) Fast Startup Input Enable 9 */ -#define PMC_FSMR_FSTT10 (0x1 << 10) /**< \brief (PMC_FSMR) Fast Startup Input Enable 10 */ -#define PMC_FSMR_FSTT11 (0x1 << 11) /**< \brief (PMC_FSMR) Fast Startup Input Enable 11 */ -#define PMC_FSMR_FSTT12 (0x1 << 12) /**< \brief (PMC_FSMR) Fast Startup Input Enable 12 */ -#define PMC_FSMR_FSTT13 (0x1 << 13) /**< \brief (PMC_FSMR) Fast Startup Input Enable 13 */ -#define PMC_FSMR_FSTT14 (0x1 << 14) /**< \brief (PMC_FSMR) Fast Startup Input Enable 14 */ -#define PMC_FSMR_FSTT15 (0x1 << 15) /**< \brief (PMC_FSMR) Fast Startup Input Enable 15 */ -#define PMC_FSMR_RTTAL (0x1 << 16) /**< \brief (PMC_FSMR) RTT Alarm Enable */ -#define PMC_FSMR_RTCAL (0x1 << 17) /**< \brief (PMC_FSMR) RTC Alarm Enable */ -#define PMC_FSMR_USBAL (0x1 << 18) /**< \brief (PMC_FSMR) USB Alarm Enable */ -#define PMC_FSMR_LPM (0x1 << 20) /**< \brief (PMC_FSMR) Low Power Mode */ -/* -------- PMC_FSPR : (PMC Offset: 0x0074) Fast Startup Polarity Register -------- */ -#define PMC_FSPR_FSTP0 (0x1 << 0) /**< \brief (PMC_FSPR) Fast Startup Input Polarity 0 */ -#define PMC_FSPR_FSTP1 (0x1 << 1) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP2 (0x1 << 2) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP3 (0x1 << 3) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP4 (0x1 << 4) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP5 (0x1 << 5) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP6 (0x1 << 6) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP7 (0x1 << 7) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP8 (0x1 << 8) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP9 (0x1 << 9) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP10 (0x1 << 10) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP11 (0x1 << 11) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP12 (0x1 << 12) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP13 (0x1 << 13) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP14 (0x1 << 14) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP15 (0x1 << 15) /**< \brief (PMC_FSPR) */ -/* -------- PMC_FOCR : (PMC Offset: 0x0078) Fault Output Clear Register -------- */ -#define PMC_FOCR_FOCLR (0x1 << 0) /**< \brief (PMC_FOCR) Fault Output Clear */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Pulse Width Modulation Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_PWM Pulse Width Modulation Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief PwmCh_num hardware registers */ -typedef struct { - RwReg PWM_CMR; /**< \brief (PwmCh_num Offset: 0x0) PWM Channel Mode Register */ - RwReg PWM_CDTY; /**< \brief (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register */ - RwReg PWM_CDTYUPD; /**< \brief (PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register */ - RwReg PWM_CPRD; /**< \brief (PwmCh_num Offset: 0xC) PWM Channel Period Register */ - RwReg PWM_CPRDUPD; /**< \brief (PwmCh_num Offset: 0x10) PWM Channel Period Update Register */ - RwReg PWM_CCNT; /**< \brief (PwmCh_num Offset: 0x14) PWM Channel Counter Register */ - RwReg PWM_DT; /**< \brief (PwmCh_num Offset: 0x18) PWM Channel Dead Time Register */ - RwReg PWM_DTUPD; /**< \brief (PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register */ -} PwmCh_num; -/** \brief Pwm hardware registers */ -typedef struct { - RwReg PWM_CLK; /**< \brief (Pwm Offset: 0x00) PWM Clock Register */ - WoReg PWM_ENA; /**< \brief (Pwm Offset: 0x04) PWM Enable Register */ - WoReg PWM_DIS; /**< \brief (Pwm Offset: 0x08) PWM Disable Register */ - RoReg PWM_SR; /**< \brief (Pwm Offset: 0x0C) PWM Status Register */ - WoReg PWM_IER1; /**< \brief (Pwm Offset: 0x10) PWM Interrupt Enable Register 1 */ - WoReg PWM_IDR1; /**< \brief (Pwm Offset: 0x14) PWM Interrupt Disable Register 1 */ - RoReg PWM_IMR1; /**< \brief (Pwm Offset: 0x18) PWM Interrupt Mask Register 1 */ - RoReg PWM_ISR1; /**< \brief (Pwm Offset: 0x1C) PWM Interrupt Status Register 1 */ - RwReg PWM_SCM; /**< \brief (Pwm Offset: 0x20) PWM Sync Channels Mode Register */ - RwReg Reserved1[1]; - RwReg PWM_SCUC; /**< \brief (Pwm Offset: 0x28) PWM Sync Channels Update Control Register */ - RwReg PWM_SCUP; /**< \brief (Pwm Offset: 0x2C) PWM Sync Channels Update Period Register */ - WoReg PWM_SCUPUPD; /**< \brief (Pwm Offset: 0x30) PWM Sync Channels Update Period Update Register */ - WoReg PWM_IER2; /**< \brief (Pwm Offset: 0x34) PWM Interrupt Enable Register 2 */ - WoReg PWM_IDR2; /**< \brief (Pwm Offset: 0x38) PWM Interrupt Disable Register 2 */ - RoReg PWM_IMR2; /**< \brief (Pwm Offset: 0x3C) PWM Interrupt Mask Register 2 */ - RoReg PWM_ISR2; /**< \brief (Pwm Offset: 0x40) PWM Interrupt Status Register 2 */ - RwReg PWM_OOV; /**< \brief (Pwm Offset: 0x44) PWM Output Override Value Register */ - RwReg PWM_OS; /**< \brief (Pwm Offset: 0x48) PWM Output Selection Register */ - WoReg PWM_OSS; /**< \brief (Pwm Offset: 0x4C) PWM Output Selection Set Register */ - WoReg PWM_OSC; /**< \brief (Pwm Offset: 0x50) PWM Output Selection Clear Register */ - WoReg PWM_OSSUPD; /**< \brief (Pwm Offset: 0x54) PWM Output Selection Set Update Register */ - WoReg PWM_OSCUPD; /**< \brief (Pwm Offset: 0x58) PWM Output Selection Clear Update Register */ - RwReg PWM_FMR; /**< \brief (Pwm Offset: 0x5C) PWM Fault Mode Register */ - RoReg PWM_FSR; /**< \brief (Pwm Offset: 0x60) PWM Fault Status Register */ - WoReg PWM_FCR; /**< \brief (Pwm Offset: 0x64) PWM Fault Clear Register */ - RwReg PWM_FPV; /**< \brief (Pwm Offset: 0x68) PWM Fault Protection Value Register */ - RwReg PWM_FPE; /**< \brief (Pwm Offset: 0x6C) PWM Fault Protection Enable Register */ - RwReg Reserved2[3]; - RwReg PWM_ELxMR[2]; /**< \brief (Pwm Offset: 0x7C) PWM Event Line 0 Mode Register */ - RwReg Reserved3[24]; - WoReg PWM_WPCR; /**< \brief (Pwm Offset: 0xE4) PWM Write Protect Control Register */ - RoReg PWM_WPSR; /**< \brief (Pwm Offset: 0xE8) PWM Write Protect Status Register */ - RwReg Reserved4[5]; - RwReg PWM_RPR; /**< \brief (Pwm Offset: 0x100) Receive Pointer Register */ - RwReg PWM_RCR; /**< \brief (Pwm Offset: 0x104) Receive Counter Register */ - RwReg PWM_TPR; /**< \brief (Pwm Offset: 0x108) Transmit Pointer Register */ - RwReg PWM_TCR; /**< \brief (Pwm Offset: 0x10C) Transmit Counter Register */ - RwReg PWM_RNPR; /**< \brief (Pwm Offset: 0x110) Receive Next Pointer Register */ - RwReg PWM_RNCR; /**< \brief (Pwm Offset: 0x114) Receive Next Counter Register */ - RwReg PWM_TNPR; /**< \brief (Pwm Offset: 0x118) Transmit Next Pointer Register */ - RwReg PWM_TNCR; /**< \brief (Pwm Offset: 0x11C) Transmit Next Counter Register */ - WoReg PWM_PTCR; /**< \brief (Pwm Offset: 0x120) Transfer Control Register */ - RoReg PWM_PTSR; /**< \brief (Pwm Offset: 0x124) Transfer Status Register */ - RwReg Reserved5[2]; - RwReg PWM_CMP0V; /**< \brief (Pwm Offset: 0x130) PWM Comparison 0 Value Register */ - WoReg PWM_CMP0VUPD; /**< \brief (Pwm Offset: 0x134) PWM Comparison 0 Value Update Register */ - RwReg PWM_CMP0M; /**< \brief (Pwm Offset: 0x138) PWM Comparison 0 Mode Register */ - WoReg PWM_CMP0MUPD; /**< \brief (Pwm Offset: 0x13C) PWM Comparison 0 Mode Update Register */ - RwReg PWM_CMP1V; /**< \brief (Pwm Offset: 0x140) PWM Comparison 1 Value Register */ - WoReg PWM_CMP1VUPD; /**< \brief (Pwm Offset: 0x144) PWM Comparison 1 Value Update Register */ - RwReg PWM_CMP1M; /**< \brief (Pwm Offset: 0x148) PWM Comparison 1 Mode Register */ - WoReg PWM_CMP1MUPD; /**< \brief (Pwm Offset: 0x14C) PWM Comparison 1 Mode Update Register */ - RwReg PWM_CMP2V; /**< \brief (Pwm Offset: 0x150) PWM Comparison 2 Value Register */ - WoReg PWM_CMP2VUPD; /**< \brief (Pwm Offset: 0x154) PWM Comparison 2 Value Update Register */ - RwReg PWM_CMP2M; /**< \brief (Pwm Offset: 0x158) PWM Comparison 2 Mode Register */ - WoReg PWM_CMP2MUPD; /**< \brief (Pwm Offset: 0x15C) PWM Comparison 2 Mode Update Register */ - RwReg PWM_CMP3V; /**< \brief (Pwm Offset: 0x160) PWM Comparison 3 Value Register */ - WoReg PWM_CMP3VUPD; /**< \brief (Pwm Offset: 0x164) PWM Comparison 3 Value Update Register */ - RwReg PWM_CMP3M; /**< \brief (Pwm Offset: 0x168) PWM Comparison 3 Mode Register */ - WoReg PWM_CMP3MUPD; /**< \brief (Pwm Offset: 0x16C) PWM Comparison 3 Mode Update Register */ - RwReg PWM_CMP4V; /**< \brief (Pwm Offset: 0x170) PWM Comparison 4 Value Register */ - WoReg PWM_CMP4VUPD; /**< \brief (Pwm Offset: 0x174) PWM Comparison 4 Value Update Register */ - RwReg PWM_CMP4M; /**< \brief (Pwm Offset: 0x178) PWM Comparison 4 Mode Register */ - WoReg PWM_CMP4MUPD; /**< \brief (Pwm Offset: 0x17C) PWM Comparison 4 Mode Update Register */ - RwReg PWM_CMP5V; /**< \brief (Pwm Offset: 0x180) PWM Comparison 5 Value Register */ - WoReg PWM_CMP5VUPD; /**< \brief (Pwm Offset: 0x184) PWM Comparison 5 Value Update Register */ - RwReg PWM_CMP5M; /**< \brief (Pwm Offset: 0x188) PWM Comparison 5 Mode Register */ - WoReg PWM_CMP5MUPD; /**< \brief (Pwm Offset: 0x18C) PWM Comparison 5 Mode Update Register */ - RwReg PWM_CMP6V; /**< \brief (Pwm Offset: 0x190) PWM Comparison 6 Value Register */ - WoReg PWM_CMP6VUPD; /**< \brief (Pwm Offset: 0x194) PWM Comparison 6 Value Update Register */ - RwReg PWM_CMP6M; /**< \brief (Pwm Offset: 0x198) PWM Comparison 6 Mode Register */ - WoReg PWM_CMP6MUPD; /**< \brief (Pwm Offset: 0x19C) PWM Comparison 6 Mode Update Register */ - RwReg PWM_CMP7V; /**< \brief (Pwm Offset: 0x1A0) PWM Comparison 7 Value Register */ - WoReg PWM_CMP7VUPD; /**< \brief (Pwm Offset: 0x1A4) PWM Comparison 7 Value Update Register */ - RwReg PWM_CMP7M; /**< \brief (Pwm Offset: 0x1A8) PWM Comparison 7 Mode Register */ - WoReg PWM_CMP7MUPD; /**< \brief (Pwm Offset: 0x1AC) PWM Comparison 7 Mode Update Register */ - RwReg Reserved6[20]; - PwmCh_num PWM_CH_NUM[4]; /**< \brief (Pwm Offset: 0x200) ch_num = 0 .. 3 */ -} Pwm; -#endif /* __ASSEMBLY__ */ -/* -------- PWM_CLK : (PWM Offset: 0x00) PWM Clock Register -------- */ -#define PWM_CLK_DIVA (0xff << 0) /**< \brief (PWM_CLK) CLKA, CLKB Divide Factor */ -#define PWM_CLK_PREA (0xf << 8) /**< \brief (PWM_CLK) CLKA, CLKB Source Clock Selection */ -#define PWM_CLK_DIVB (0xff << 16) /**< \brief (PWM_CLK) CLKA, CLKB Divide Factor */ -#define PWM_CLK_PREB (0xf << 24) /**< \brief (PWM_CLK) CLKA, CLKB Source Clock Selection */ -/* -------- PWM_ENA : (PWM Offset: 0x04) PWM Enable Register -------- */ -#define PWM_ENA_CHID0 (0x1 << 0) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID1 (0x1 << 1) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID2 (0x1 << 2) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID3 (0x1 << 3) /**< \brief (PWM_ENA) Channel ID */ -/* -------- PWM_DIS : (PWM Offset: 0x08) PWM Disable Register -------- */ -#define PWM_DIS_CHID0 (0x1 << 0) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID1 (0x1 << 1) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID2 (0x1 << 2) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID3 (0x1 << 3) /**< \brief (PWM_DIS) Channel ID */ -/* -------- PWM_SR : (PWM Offset: 0x0C) PWM Status Register -------- */ -#define PWM_SR_CHID0 (0x1 << 0) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID1 (0x1 << 1) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID2 (0x1 << 2) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID3 (0x1 << 3) /**< \brief (PWM_SR) Channel ID */ -/* -------- PWM_IER1 : (PWM Offset: 0x10) PWM Interrupt Enable Register 1 -------- */ -#define PWM_IER1_CHID0 (0x1 << 0) /**< \brief (PWM_IER1) Counter Event on Channel 0 Interrupt Enable */ -#define PWM_IER1_CHID1 (0x1 << 1) /**< \brief (PWM_IER1) Counter Event on Channel 1 Interrupt Enable */ -#define PWM_IER1_CHID2 (0x1 << 2) /**< \brief (PWM_IER1) Counter Event on Channel 2 Interrupt Enable */ -#define PWM_IER1_CHID3 (0x1 << 3) /**< \brief (PWM_IER1) Counter Event on Channel 3 Interrupt Enable */ -#define PWM_IER1_FCHID0 (0x1 << 16) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 0 Interrupt Enable */ -#define PWM_IER1_FCHID1 (0x1 << 17) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 1 Interrupt Enable */ -#define PWM_IER1_FCHID2 (0x1 << 18) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 2 Interrupt Enable */ -#define PWM_IER1_FCHID3 (0x1 << 19) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 3 Interrupt Enable */ -/* -------- PWM_IDR1 : (PWM Offset: 0x14) PWM Interrupt Disable Register 1 -------- */ -#define PWM_IDR1_CHID0 (0x1 << 0) /**< \brief (PWM_IDR1) Counter Event on Channel 0 Interrupt Disable */ -#define PWM_IDR1_CHID1 (0x1 << 1) /**< \brief (PWM_IDR1) Counter Event on Channel 1 Interrupt Disable */ -#define PWM_IDR1_CHID2 (0x1 << 2) /**< \brief (PWM_IDR1) Counter Event on Channel 2 Interrupt Disable */ -#define PWM_IDR1_CHID3 (0x1 << 3) /**< \brief (PWM_IDR1) Counter Event on Channel 3 Interrupt Disable */ -#define PWM_IDR1_FCHID0 (0x1 << 16) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 0 Interrupt Disable */ -#define PWM_IDR1_FCHID1 (0x1 << 17) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 1 Interrupt Disable */ -#define PWM_IDR1_FCHID2 (0x1 << 18) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 2 Interrupt Disable */ -#define PWM_IDR1_FCHID3 (0x1 << 19) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 3 Interrupt Disable */ -/* -------- PWM_IMR1 : (PWM Offset: 0x18) PWM Interrupt Mask Register 1 -------- */ -#define PWM_IMR1_CHID0 (0x1 << 0) /**< \brief (PWM_IMR1) Counter Event on Channel 0 Interrupt Mask */ -#define PWM_IMR1_CHID1 (0x1 << 1) /**< \brief (PWM_IMR1) Counter Event on Channel 1 Interrupt Mask */ -#define PWM_IMR1_CHID2 (0x1 << 2) /**< \brief (PWM_IMR1) Counter Event on Channel 2 Interrupt Mask */ -#define PWM_IMR1_CHID3 (0x1 << 3) /**< \brief (PWM_IMR1) Counter Event on Channel 3 Interrupt Mask */ -#define PWM_IMR1_FCHID0 (0x1 << 16) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 0 Interrupt Mask */ -#define PWM_IMR1_FCHID1 (0x1 << 17) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 1 Interrupt Mask */ -#define PWM_IMR1_FCHID2 (0x1 << 18) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 2 Interrupt Mask */ -#define PWM_IMR1_FCHID3 (0x1 << 19) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 3 Interrupt Mask */ -/* -------- PWM_ISR1 : (PWM Offset: 0x1C) PWM Interrupt Status Register 1 -------- */ -#define PWM_ISR1_CHID0 (0x1 << 0) /**< \brief (PWM_ISR1) Counter Event on Channel 0 */ -#define PWM_ISR1_CHID1 (0x1 << 1) /**< \brief (PWM_ISR1) Counter Event on Channel 1 */ -#define PWM_ISR1_CHID2 (0x1 << 2) /**< \brief (PWM_ISR1) Counter Event on Channel 2 */ -#define PWM_ISR1_CHID3 (0x1 << 3) /**< \brief (PWM_ISR1) Counter Event on Channel 3 */ -#define PWM_ISR1_FCHID0 (0x1 << 16) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 0 */ -#define PWM_ISR1_FCHID1 (0x1 << 17) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 1 */ -#define PWM_ISR1_FCHID2 (0x1 << 18) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 2 */ -#define PWM_ISR1_FCHID3 (0x1 << 19) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 3 */ -/* -------- PWM_SCM : (PWM Offset: 0x20) PWM Sync Channels Mode Register -------- */ -#define PWM_SCM_SYNC0 (0x1 << 0) /**< \brief (PWM_SCM) Synchronous Channel 0 */ -#define PWM_SCM_SYNC1 (0x1 << 1) /**< \brief (PWM_SCM) Synchronous Channel 1 */ -#define PWM_SCM_SYNC2 (0x1 << 2) /**< \brief (PWM_SCM) Synchronous Channel 2 */ -#define PWM_SCM_SYNC3 (0x1 << 3) /**< \brief (PWM_SCM) Synchronous Channel 3 */ -#define PWM_SCM_UPDM (0x3 << 16) /**< \brief (PWM_SCM) Synchronous Channels Update Mode */ -#define PWM_SCM_UPDM_MODE0 (0x0 << 16) // (PWMC) Manual write of data and manual trigger of the update -#define PWM_SCM_UPDM_MODE1 (0x1 << 16) // (PWMC) Manual write of data and automatic trigger of the update -#define PWM_SCM_UPDM_MODE2 (0x2 << 16) // (PWMC) Automatic write of data and automatic trigger of the update -#define PWM_SCM_PTRM (0x1 << 20) /**< \brief (PWM_SCM) PDC Transfer Request Mode */ -#define PWM_SCM_PTRCS (0x7 << 21) /**< \brief (PWM_SCM) PDC Transfer Request Comparison Selection */ -/* -------- PWM_SCUC : (PWM Offset: 0x28) PWM Sync Channels Update Control Register -------- */ -#define PWM_SCUC_UPDULOCK (0x1 << 0) /**< \brief (PWM_SCUC) Synchronous Channels Update Unlock */ -/* -------- PWM_SCUP : (PWM Offset: 0x2C) PWM Sync Channels Update Period Register -------- */ -#define PWM_SCUP_UPR (0xf << 0) /**< \brief (PWM_SCUP) Update Period */ -#define PWM_SCUP_UPRCNT (0xf << 4) /**< \brief (PWM_SCUP) Update Period Counter */ -/* -------- PWM_SCUPUPD : (PWM Offset: 0x30) PWM Sync Channels Update Period Update Register -------- */ -#define PWM_SCUPUPD_UPRUPD (0xf << 0) /**< \brief (PWM_SCUPUPD) Update Period Update */ -/* -------- PWM_IER2 : (PWM Offset: 0x34) PWM Interrupt Enable Register 2 -------- */ -#define PWM_IER2_WRDY (0x1 << 0) /**< \brief (PWM_IER2) Write Ready for Synchronous Channels Update Interrupt Enable */ -#define PWM_IER2_ENDTX (0x1 << 1) /**< \brief (PWM_IER2) PDC End of TX Buffer Interrupt Enable */ -#define PWM_IER2_TXBUFE (0x1 << 2) /**< \brief (PWM_IER2) PDC TX Buffer Empty Interrupt Enable */ -#define PWM_IER2_UNRE (0x1 << 3) /**< \brief (PWM_IER2) Synchronous Channels Update Underrun Error Interrupt Enable */ -#define PWM_IER2_CMPM0 (0x1 << 8) /**< \brief (PWM_IER2) Comparison 0 Match Interrupt Enable */ -#define PWM_IER2_CMPM1 (0x1 << 9) /**< \brief (PWM_IER2) Comparison 1 Match Interrupt Enable */ -#define PWM_IER2_CMPM2 (0x1 << 10) /**< \brief (PWM_IER2) Comparison 2 Match Interrupt Enable */ -#define PWM_IER2_CMPM3 (0x1 << 11) /**< \brief (PWM_IER2) Comparison 3 Match Interrupt Enable */ -#define PWM_IER2_CMPM4 (0x1 << 12) /**< \brief (PWM_IER2) Comparison 4 Match Interrupt Enable */ -#define PWM_IER2_CMPM5 (0x1 << 13) /**< \brief (PWM_IER2) Comparison 5 Match Interrupt Enable */ -#define PWM_IER2_CMPM6 (0x1 << 14) /**< \brief (PWM_IER2) Comparison 6 Match Interrupt Enable */ -#define PWM_IER2_CMPM7 (0x1 << 15) /**< \brief (PWM_IER2) Comparison 7 Match Interrupt Enable */ -#define PWM_IER2_CMPU0 (0x1 << 16) /**< \brief (PWM_IER2) Comparison 0 Update Interrupt Enable */ -#define PWM_IER2_CMPU1 (0x1 << 17) /**< \brief (PWM_IER2) Comparison 1 Update Interrupt Enable */ -#define PWM_IER2_CMPU2 (0x1 << 18) /**< \brief (PWM_IER2) Comparison 2 Update Interrupt Enable */ -#define PWM_IER2_CMPU3 (0x1 << 19) /**< \brief (PWM_IER2) Comparison 3 Update Interrupt Enable */ -#define PWM_IER2_CMPU4 (0x1 << 20) /**< \brief (PWM_IER2) Comparison 4 Update Interrupt Enable */ -#define PWM_IER2_CMPU5 (0x1 << 21) /**< \brief (PWM_IER2) Comparison 5 Update Interrupt Enable */ -#define PWM_IER2_CMPU6 (0x1 << 22) /**< \brief (PWM_IER2) Comparison 6 Update Interrupt Enable */ -#define PWM_IER2_CMPU7 (0x1 << 23) /**< \brief (PWM_IER2) Comparison 7 Update Interrupt Enable */ -/* -------- PWM_IDR2 : (PWM Offset: 0x38) PWM Interrupt Disable Register 2 -------- */ -#define PWM_IDR2_WRDY (0x1 << 0) /**< \brief (PWM_IDR2) Write Ready for Synchronous Channels Update Interrupt Disable */ -#define PWM_IDR2_ENDTX (0x1 << 1) /**< \brief (PWM_IDR2) PDC End of TX Buffer Interrupt Disable */ -#define PWM_IDR2_TXBUFE (0x1 << 2) /**< \brief (PWM_IDR2) PDC TX Buffer Empty Interrupt Disable */ -#define PWM_IDR2_UNRE (0x1 << 3) /**< \brief (PWM_IDR2) Synchronous Channels Update Underrun Error Interrupt Disable */ -#define PWM_IDR2_CMPM0 (0x1 << 8) /**< \brief (PWM_IDR2) Comparison 0 Match Interrupt Disable */ -#define PWM_IDR2_CMPM1 (0x1 << 9) /**< \brief (PWM_IDR2) Comparison 1 Match Interrupt Disable */ -#define PWM_IDR2_CMPM2 (0x1 << 10) /**< \brief (PWM_IDR2) Comparison 2 Match Interrupt Disable */ -#define PWM_IDR2_CMPM3 (0x1 << 11) /**< \brief (PWM_IDR2) Comparison 3 Match Interrupt Disable */ -#define PWM_IDR2_CMPM4 (0x1 << 12) /**< \brief (PWM_IDR2) Comparison 4 Match Interrupt Disable */ -#define PWM_IDR2_CMPM5 (0x1 << 13) /**< \brief (PWM_IDR2) Comparison 5 Match Interrupt Disable */ -#define PWM_IDR2_CMPM6 (0x1 << 14) /**< \brief (PWM_IDR2) Comparison 6 Match Interrupt Disable */ -#define PWM_IDR2_CMPM7 (0x1 << 15) /**< \brief (PWM_IDR2) Comparison 7 Match Interrupt Disable */ -#define PWM_IDR2_CMPU0 (0x1 << 16) /**< \brief (PWM_IDR2) Comparison 0 Update Interrupt Disable */ -#define PWM_IDR2_CMPU1 (0x1 << 17) /**< \brief (PWM_IDR2) Comparison 1 Update Interrupt Disable */ -#define PWM_IDR2_CMPU2 (0x1 << 18) /**< \brief (PWM_IDR2) Comparison 2 Update Interrupt Disable */ -#define PWM_IDR2_CMPU3 (0x1 << 19) /**< \brief (PWM_IDR2) Comparison 3 Update Interrupt Disable */ -#define PWM_IDR2_CMPU4 (0x1 << 20) /**< \brief (PWM_IDR2) Comparison 4 Update Interrupt Disable */ -#define PWM_IDR2_CMPU5 (0x1 << 21) /**< \brief (PWM_IDR2) Comparison 5 Update Interrupt Disable */ -#define PWM_IDR2_CMPU6 (0x1 << 22) /**< \brief (PWM_IDR2) Comparison 6 Update Interrupt Disable */ -#define PWM_IDR2_CMPU7 (0x1 << 23) /**< \brief (PWM_IDR2) Comparison 7 Update Interrupt Disable */ -/* -------- PWM_IMR2 : (PWM Offset: 0x3C) PWM Interrupt Mask Register 2 -------- */ -#define PWM_IMR2_WRDY (0x1 << 0) /**< \brief (PWM_IMR2) Write Ready for Synchronous Channels Update Interrupt Mask */ -#define PWM_IMR2_ENDTX (0x1 << 1) /**< \brief (PWM_IMR2) PDC End of TX Buffer Interrupt Mask */ -#define PWM_IMR2_TXBUFE (0x1 << 2) /**< \brief (PWM_IMR2) PDC TX Buffer Empty Interrupt Mask */ -#define PWM_IMR2_UNRE (0x1 << 3) /**< \brief (PWM_IMR2) Synchronous Channels Update Underrun Error Interrupt Mask */ -#define PWM_IMR2_CMPM0 (0x1 << 8) /**< \brief (PWM_IMR2) Comparison 0 Match Interrupt Mask */ -#define PWM_IMR2_CMPM1 (0x1 << 9) /**< \brief (PWM_IMR2) Comparison 1 Match Interrupt Mask */ -#define PWM_IMR2_CMPM2 (0x1 << 10) /**< \brief (PWM_IMR2) Comparison 2 Match Interrupt Mask */ -#define PWM_IMR2_CMPM3 (0x1 << 11) /**< \brief (PWM_IMR2) Comparison 3 Match Interrupt Mask */ -#define PWM_IMR2_CMPM4 (0x1 << 12) /**< \brief (PWM_IMR2) Comparison 4 Match Interrupt Mask */ -#define PWM_IMR2_CMPM5 (0x1 << 13) /**< \brief (PWM_IMR2) Comparison 5 Match Interrupt Mask */ -#define PWM_IMR2_CMPM6 (0x1 << 14) /**< \brief (PWM_IMR2) Comparison 6 Match Interrupt Mask */ -#define PWM_IMR2_CMPM7 (0x1 << 15) /**< \brief (PWM_IMR2) Comparison 7 Match Interrupt Mask */ -#define PWM_IMR2_CMPU0 (0x1 << 16) /**< \brief (PWM_IMR2) Comparison 0 Update Interrupt Mask */ -#define PWM_IMR2_CMPU1 (0x1 << 17) /**< \brief (PWM_IMR2) Comparison 1 Update Interrupt Mask */ -#define PWM_IMR2_CMPU2 (0x1 << 18) /**< \brief (PWM_IMR2) Comparison 2 Update Interrupt Mask */ -#define PWM_IMR2_CMPU3 (0x1 << 19) /**< \brief (PWM_IMR2) Comparison 3 Update Interrupt Mask */ -#define PWM_IMR2_CMPU4 (0x1 << 20) /**< \brief (PWM_IMR2) Comparison 4 Update Interrupt Mask */ -#define PWM_IMR2_CMPU5 (0x1 << 21) /**< \brief (PWM_IMR2) Comparison 5 Update Interrupt Mask */ -#define PWM_IMR2_CMPU6 (0x1 << 22) /**< \brief (PWM_IMR2) Comparison 6 Update Interrupt Mask */ -#define PWM_IMR2_CMPU7 (0x1 << 23) /**< \brief (PWM_IMR2) Comparison 7 Update Interrupt Mask */ -/* -------- PWM_ISR2 : (PWM Offset: 0x40) PWM Interrupt Status Register 2 -------- */ -#define PWM_ISR2_WRDY (0x1 << 0) /**< \brief (PWM_ISR2) Write Ready for Synchronous Channels Update */ -#define PWM_ISR2_ENDTX (0x1 << 1) /**< \brief (PWM_ISR2) PDC End of TX Buffer */ -#define PWM_ISR2_TXBUFE (0x1 << 2) /**< \brief (PWM_ISR2) PDC TX Buffer Empty */ -#define PWM_ISR2_UNRE (0x1 << 3) /**< \brief (PWM_ISR2) Synchronous Channels Update Underrun Error */ -#define PWM_ISR2_CMPM0 (0x1 << 8) /**< \brief (PWM_ISR2) Comparison 0 Match */ -#define PWM_ISR2_CMPM1 (0x1 << 9) /**< \brief (PWM_ISR2) Comparison 1 Match */ -#define PWM_ISR2_CMPM2 (0x1 << 10) /**< \brief (PWM_ISR2) Comparison 2 Match */ -#define PWM_ISR2_CMPM3 (0x1 << 11) /**< \brief (PWM_ISR2) Comparison 3 Match */ -#define PWM_ISR2_CMPM4 (0x1 << 12) /**< \brief (PWM_ISR2) Comparison 4 Match */ -#define PWM_ISR2_CMPM5 (0x1 << 13) /**< \brief (PWM_ISR2) Comparison 5 Match */ -#define PWM_ISR2_CMPM6 (0x1 << 14) /**< \brief (PWM_ISR2) Comparison 6 Match */ -#define PWM_ISR2_CMPM7 (0x1 << 15) /**< \brief (PWM_ISR2) Comparison 7 Match */ -#define PWM_ISR2_CMPU0 (0x1 << 16) /**< \brief (PWM_ISR2) Comparison 0 Update */ -#define PWM_ISR2_CMPU1 (0x1 << 17) /**< \brief (PWM_ISR2) Comparison 1 Update */ -#define PWM_ISR2_CMPU2 (0x1 << 18) /**< \brief (PWM_ISR2) Comparison 2 Update */ -#define PWM_ISR2_CMPU3 (0x1 << 19) /**< \brief (PWM_ISR2) Comparison 3 Update */ -#define PWM_ISR2_CMPU4 (0x1 << 20) /**< \brief (PWM_ISR2) Comparison 4 Update */ -#define PWM_ISR2_CMPU5 (0x1 << 21) /**< \brief (PWM_ISR2) Comparison 5 Update */ -#define PWM_ISR2_CMPU6 (0x1 << 22) /**< \brief (PWM_ISR2) Comparison 6 Update */ -#define PWM_ISR2_CMPU7 (0x1 << 23) /**< \brief (PWM_ISR2) Comparison 7 Update */ -/* -------- PWM_OOV : (PWM Offset: 0x44) PWM Output Override Value Register -------- */ -#define PWM_OOV_OOVH0 (0x1 << 0) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 0 */ -#define PWM_OOV_OOVH1 (0x1 << 1) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 1 */ -#define PWM_OOV_OOVH2 (0x1 << 2) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 2 */ -#define PWM_OOV_OOVH3 (0x1 << 3) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 3 */ -#define PWM_OOV_OOVL0 (0x1 << 16) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 0 */ -#define PWM_OOV_OOVL1 (0x1 << 17) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 1 */ -#define PWM_OOV_OOVL2 (0x1 << 18) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 2 */ -#define PWM_OOV_OOVL3 (0x1 << 19) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 3 */ -/* -------- PWM_OS : (PWM Offset: 0x48) PWM Output Selection Register -------- */ -#define PWM_OS_OSH0 (0x1 << 0) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 0 */ -#define PWM_OS_OSH1 (0x1 << 1) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 1 */ -#define PWM_OS_OSH2 (0x1 << 2) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 2 */ -#define PWM_OS_OSH3 (0x1 << 3) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 3 */ -#define PWM_OS_OSL0 (0x1 << 16) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 0 */ -#define PWM_OS_OSL1 (0x1 << 17) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 1 */ -#define PWM_OS_OSL2 (0x1 << 18) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 2 */ -#define PWM_OS_OSL3 (0x1 << 19) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 3 */ -/* -------- PWM_OSS : (PWM Offset: 0x4C) PWM Output Selection Set Register -------- */ -#define PWM_OSS_OSSH0 (0x1 << 0) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 0 */ -#define PWM_OSS_OSSH1 (0x1 << 1) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 1 */ -#define PWM_OSS_OSSH2 (0x1 << 2) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 2 */ -#define PWM_OSS_OSSH3 (0x1 << 3) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 3 */ -#define PWM_OSS_OSSL0 (0x1 << 16) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 0 */ -#define PWM_OSS_OSSL1 (0x1 << 17) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 1 */ -#define PWM_OSS_OSSL2 (0x1 << 18) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 2 */ -#define PWM_OSS_OSSL3 (0x1 << 19) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 3 */ -/* -------- PWM_OSC : (PWM Offset: 0x50) PWM Output Selection Clear Register -------- */ -#define PWM_OSC_OSCH0 (0x1 << 0) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 0 */ -#define PWM_OSC_OSCH1 (0x1 << 1) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 1 */ -#define PWM_OSC_OSCH2 (0x1 << 2) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 2 */ -#define PWM_OSC_OSCH3 (0x1 << 3) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 3 */ -#define PWM_OSC_OSCL0 (0x1 << 16) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 0 */ -#define PWM_OSC_OSCL1 (0x1 << 17) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 1 */ -#define PWM_OSC_OSCL2 (0x1 << 18) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 2 */ -#define PWM_OSC_OSCL3 (0x1 << 19) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 3 */ -/* -------- PWM_OSSUPD : (PWM Offset: 0x54) PWM Output Selection Set Update Register -------- */ -#define PWM_OSSUPD_OSSUPH0 (0x1 << 0) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 0 */ -#define PWM_OSSUPD_OSSUPH1 (0x1 << 1) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 1 */ -#define PWM_OSSUPD_OSSUPH2 (0x1 << 2) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 2 */ -#define PWM_OSSUPD_OSSUPH3 (0x1 << 3) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 3 */ -#define PWM_OSSUPD_OSSUPL0 (0x1 << 16) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 0 */ -#define PWM_OSSUPD_OSSUPL1 (0x1 << 17) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 1 */ -#define PWM_OSSUPD_OSSUPL2 (0x1 << 18) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 2 */ -#define PWM_OSSUPD_OSSUPL3 (0x1 << 19) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 3 */ -/* -------- PWM_OSCUPD : (PWM Offset: 0x58) PWM Output Selection Clear Update Register -------- */ -#define PWM_OSCUPD_OSCUPH0 (0x1 << 0) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 0 */ -#define PWM_OSCUPD_OSCUPH1 (0x1 << 1) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 1 */ -#define PWM_OSCUPD_OSCUPH2 (0x1 << 2) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 2 */ -#define PWM_OSCUPD_OSCUPH3 (0x1 << 3) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 3 */ -#define PWM_OSCUPD_OSCUPL0 (0x1 << 16) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 0 */ -#define PWM_OSCUPD_OSCUPL1 (0x1 << 17) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 1 */ -#define PWM_OSCUPD_OSCUPL2 (0x1 << 18) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 2 */ -#define PWM_OSCUPD_OSCUPL3 (0x1 << 19) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 3 */ -/* -------- PWM_FMR : (PWM Offset: 0x5C) PWM Fault Mode Register -------- */ -#define PWM_FMR_FPOL0 (0x1 << 0) /**< \brief (PWM_FMR) Fault 0 Polarity */ -#define PWM_FMR_FPOL1 (0x1 << 1) /**< \brief (PWM_FMR) Fault 1 Polarity */ -#define PWM_FMR_FPOL2 (0x1 << 2) /**< \brief (PWM_FMR) Fault 2 Polarity */ -#define PWM_FMR_FPOL3 (0x1 << 3) /**< \brief (PWM_FMR) Fault 3 Polarity */ -#define PWM_FMR_FMOD0 (0x1 << 8) /**< \brief (PWM_FMR) Fault 0 Activation Mode */ -#define PWM_FMR_FMOD1 (0x1 << 9) /**< \brief (PWM_FMR) Fault 1 Activation Mode */ -#define PWM_FMR_FMOD2 (0x1 << 10) /**< \brief (PWM_FMR) Fault 2 Activation Mode */ -#define PWM_FMR_FMOD3 (0x1 << 11) /**< \brief (PWM_FMR) Fault 3 Activation Mode */ -#define PWM_FMR_FFIL0 (0x1 << 16) /**< \brief (PWM_FMR) Fault 0 Filtering */ -#define PWM_FMR_FFIL1 (0x1 << 17) /**< \brief (PWM_FMR) Fault 1 Filtering */ -#define PWM_FMR_FFIL2 (0x1 << 18) /**< \brief (PWM_FMR) Fault 2 Filtering */ -#define PWM_FMR_FFIL3 (0x1 << 19) /**< \brief (PWM_FMR) Fault 3 Filtering */ -/* -------- PWM_FSR : (PWM Offset: 0x60) PWM Fault Status Register -------- */ -#define PWM_FSR_FIV0 (0x1 << 0) /**< \brief (PWM_FSR) Fault Input 0 Value */ -#define PWM_FSR_FIV1 (0x1 << 1) /**< \brief (PWM_FSR) Fault Input 1 Value */ -#define PWM_FSR_FIV2 (0x1 << 2) /**< \brief (PWM_FSR) Fault Input 2 Value */ -#define PWM_FSR_FIV3 (0x1 << 3) /**< \brief (PWM_FSR) Fault Input 3 Value */ -#define PWM_FSR_FS0 (0x1 << 8) /**< \brief (PWM_FSR) Fault 0 Status */ -#define PWM_FSR_FS1 (0x1 << 9) /**< \brief (PWM_FSR) Fault 1 Status */ -#define PWM_FSR_FS2 (0x1 << 10) /**< \brief (PWM_FSR) Fault 2 Status */ -#define PWM_FSR_FS3 (0x1 << 11) /**< \brief (PWM_FSR) Fault 3 Status */ -/* -------- PWM_FCR : (PWM Offset: 0x64) PWM Fault Clear Register -------- */ -#define PWM_FCR_FCLR0 (0x1 << 0) /**< \brief (PWM_FCR) Fault 0 Clear */ -#define PWM_FCR_FCLR1 (0x1 << 1) /**< \brief (PWM_FCR) Fault 1 Clear */ -#define PWM_FCR_FCLR2 (0x1 << 2) /**< \brief (PWM_FCR) Fault 2 Clear */ -#define PWM_FCR_FCLR3 (0x1 << 3) /**< \brief (PWM_FCR) Fault 3 Clear */ -/* -------- PWM_FPV : (PWM Offset: 0x68) PWM Fault Protection Value Register -------- */ -#define PWM_FPV_FPVH0 (0x1 << 0) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 0 */ -#define PWM_FPV_FPVH1 (0x1 << 1) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 1 */ -#define PWM_FPV_FPVH2 (0x1 << 2) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 2 */ -#define PWM_FPV_FPVH3 (0x1 << 3) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 3 */ -#define PWM_FPV_FPVL0 (0x1 << 16) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 0 */ -#define PWM_FPV_FPVL1 (0x1 << 17) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 1 */ -#define PWM_FPV_FPVL2 (0x1 << 18) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 2 */ -#define PWM_FPV_FPVL3 (0x1 << 19) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 3 */ -/* -------- PWM_FPE : (PWM Offset: 0x6C) PWM Fault Protection Enable Register -------- */ -#define PWM_FPE_FPE0 (0xff << 0) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 0 for channel x */ -#define PWM_FPE_FPE1 (0xff << 8) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 1 for channel x */ -#define PWM_FPE_FPE2 (0xff << 16) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 2 for channel x */ -#define PWM_FPE_FPE3 (0xff << 24) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 3 for channel x */ -/* -------- PWM_ELxMR[2] : (PWM Offset: 0x7C) PWM Event Line 0 Mode Register -------- */ -#define PWM_ELxMR_CSEL0 (0x1 << 0) /**< \brief (PWM_ELxMR[2]) Comparison 0 Selection */ -#define PWM_ELxMR_CSEL1 (0x1 << 1) /**< \brief (PWM_ELxMR[2]) Comparison 1 Selection */ -#define PWM_ELxMR_CSEL2 (0x1 << 2) /**< \brief (PWM_ELxMR[2]) Comparison 2 Selection */ -#define PWM_ELxMR_CSEL3 (0x1 << 3) /**< \brief (PWM_ELxMR[2]) Comparison 3 Selection */ -#define PWM_ELxMR_CSEL4 (0x1 << 4) /**< \brief (PWM_ELxMR[2]) Comparison 4 Selection */ -#define PWM_ELxMR_CSEL5 (0x1 << 5) /**< \brief (PWM_ELxMR[2]) Comparison 5 Selection */ -#define PWM_ELxMR_CSEL6 (0x1 << 6) /**< \brief (PWM_ELxMR[2]) Comparison 6 Selection */ -#define PWM_ELxMR_CSEL7 (0x1 << 7) /**< \brief (PWM_ELxMR[2]) Comparison 7 Selection */ -/* -------- PWM_WPCR : (PWM Offset: 0xE4) PWM Write Protect Control Register -------- */ -#define PWM_WPCR_WPCMD (0x3 << 0) /**< \brief (PWM_WPCR) Write Protect Command */ -#define PWM_WPCR_WPRG0 (0x1 << 2) /**< \brief (PWM_WPCR) Write Protect Register Group 0 */ -#define PWM_WPCR_WPRG1 (0x1 << 3) /**< \brief (PWM_WPCR) Write Protect Register Group 1 */ -#define PWM_WPCR_WPRG2 (0x1 << 4) /**< \brief (PWM_WPCR) Write Protect Register Group 2 */ -#define PWM_WPCR_WPRG3 (0x1 << 5) /**< \brief (PWM_WPCR) Write Protect Register Group 3 */ -#define PWM_WPCR_WPRG4 (0x1 << 6) /**< \brief (PWM_WPCR) Write Protect Register Group 4 */ -#define PWM_WPCR_WPRG5 (0x1 << 7) /**< \brief (PWM_WPCR) Write Protect Register Group 5 */ -#define PWM_WPCR_WPKEY (0xffffff << 8) /**< \brief (PWM_WPCR) Write Protect Key */ -/* -------- PWM_WPSR : (PWM Offset: 0xE8) PWM Write Protect Status Register -------- */ -#define PWM_WPSR_WPSWS0 (0x1 << 0) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS1 (0x1 << 1) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS2 (0x1 << 2) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS3 (0x1 << 3) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS4 (0x1 << 4) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS5 (0x1 << 5) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPVS (0x1 << 7) /**< \brief (PWM_WPSR) Write Protect Violation Status */ -#define PWM_WPSR_WPHWS0 (0x1 << 8) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS1 (0x1 << 9) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS2 (0x1 << 10) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS3 (0x1 << 11) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS4 (0x1 << 12) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS5 (0x1 << 13) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPVSRC (0xffff << 16) /**< \brief (PWM_WPSR) Write Protect Violation Source */ -/* -------- PWM_RPR : (PWM Offset: 0x100) Receive Pointer Register -------- */ -#define PWM_RPR_RXPTR (0xffffffff << 0) /**< \brief (PWM_RPR) Receive Pointer Register */ -/* -------- PWM_RCR : (PWM Offset: 0x104) Receive Counter Register -------- */ -#define PWM_RCR_RXCTR (0xffff << 0) /**< \brief (PWM_RCR) Receive Counter Register */ -/* -------- PWM_TPR : (PWM Offset: 0x108) Transmit Pointer Register -------- */ -#define PWM_TPR_TXPTR (0xffffffff << 0) /**< \brief (PWM_TPR) Transmit Counter Register */ -/* -------- PWM_TCR : (PWM Offset: 0x10C) Transmit Counter Register -------- */ -#define PWM_TCR_TXCTR (0xffff << 0) /**< \brief (PWM_TCR) Transmit Counter Register */ -/* -------- PWM_RNPR : (PWM Offset: 0x110) Receive Next Pointer Register -------- */ -#define PWM_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (PWM_RNPR) Receive Next Pointer */ -/* -------- PWM_RNCR : (PWM Offset: 0x114) Receive Next Counter Register -------- */ -#define PWM_RNCR_RXNCTR (0xffff << 0) /**< \brief (PWM_RNCR) Receive Next Counter */ -/* -------- PWM_TNPR : (PWM Offset: 0x118) Transmit Next Pointer Register -------- */ -#define PWM_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (PWM_TNPR) Transmit Next Pointer */ -/* -------- PWM_TNCR : (PWM Offset: 0x11C) Transmit Next Counter Register -------- */ -#define PWM_TNCR_TXNCTR (0xffff << 0) /**< \brief (PWM_TNCR) Transmit Counter Next */ -/* -------- PWM_PTCR : (PWM Offset: 0x120) Transfer Control Register -------- */ -#define PWM_PTCR_RXTEN (0x1 << 0) /**< \brief (PWM_PTCR) Receiver Transfer Enable */ -#define PWM_PTCR_RXTDIS (0x1 << 1) /**< \brief (PWM_PTCR) Receiver Transfer Disable */ -#define PWM_PTCR_TXTEN (0x1 << 8) /**< \brief (PWM_PTCR) Transmitter Transfer Enable */ -#define PWM_PTCR_TXTDIS (0x1 << 9) /**< \brief (PWM_PTCR) Transmitter Transfer Disable */ -/* -------- PWM_PTSR : (PWM Offset: 0x124) Transfer Status Register -------- */ -#define PWM_PTSR_RXTEN (0x1 << 0) /**< \brief (PWM_PTSR) Receiver Transfer Enable */ -#define PWM_PTSR_TXTEN (0x1 << 8) /**< \brief (PWM_PTSR) Transmitter Transfer Enable */ -/* -------- PWM_CMP0V : (PWM Offset: 0x130) PWM Comparison 0 Value Register -------- */ -#define PWM_CMP0V_CV (0xffffff << 0) /**< \brief (PWM_CMP0V) Comparison x Value */ -#define PWM_CMP0V_CVM (0x1 << 24) /**< \brief (PWM_CMP0V) Comparison x Value Mode */ -/* -------- PWM_CMP0VUPD : (PWM Offset: 0x134) PWM Comparison 0 Value Update Register -------- */ -#define PWM_CMP0VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP0VUPD) Comparison x Value Update */ -#define PWM_CMP0VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP0VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP0M : (PWM Offset: 0x138) PWM Comparison 0 Mode Register -------- */ -#define PWM_CMP0M_CEN (0x1 << 0) /**< \brief (PWM_CMP0M) Comparison x Enable */ -#define PWM_CMP0M_CTR (0xf << 4) /**< \brief (PWM_CMP0M) Comparison x Trigger */ -#define PWM_CMP0M_CPR (0xf << 8) /**< \brief (PWM_CMP0M) Comparison x Period */ -#define PWM_CMP0M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP0M) Comparison x Period Counter */ -#define PWM_CMP0M_CUPR (0xf << 16) /**< \brief (PWM_CMP0M) Comparison x Update Period */ -#define PWM_CMP0M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP0M) Comparison x Update Period Counter */ -/* -------- PWM_CMP0MUPD : (PWM Offset: 0x13C) PWM Comparison 0 Mode Update Register -------- */ -#define PWM_CMP0MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP0MUPD) Comparison x Enable Update */ -#define PWM_CMP0MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP0MUPD) Comparison x Trigger Update */ -#define PWM_CMP0MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP0MUPD) Comparison x Period Update */ -#define PWM_CMP0MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP0MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP1V : (PWM Offset: 0x140) PWM Comparison 1 Value Register -------- */ -#define PWM_CMP1V_CV (0xffffff << 0) /**< \brief (PWM_CMP1V) Comparison x Value */ -#define PWM_CMP1V_CVM (0x1 << 24) /**< \brief (PWM_CMP1V) Comparison x Value Mode */ -/* -------- PWM_CMP1VUPD : (PWM Offset: 0x144) PWM Comparison 1 Value Update Register -------- */ -#define PWM_CMP1VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP1VUPD) Comparison x Value Update */ -#define PWM_CMP1VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP1VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP1M : (PWM Offset: 0x148) PWM Comparison 1 Mode Register -------- */ -#define PWM_CMP1M_CEN (0x1 << 0) /**< \brief (PWM_CMP1M) Comparison x Enable */ -#define PWM_CMP1M_CTR (0xf << 4) /**< \brief (PWM_CMP1M) Comparison x Trigger */ -#define PWM_CMP1M_CPR (0xf << 8) /**< \brief (PWM_CMP1M) Comparison x Period */ -#define PWM_CMP1M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP1M) Comparison x Period Counter */ -#define PWM_CMP1M_CUPR (0xf << 16) /**< \brief (PWM_CMP1M) Comparison x Update Period */ -#define PWM_CMP1M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP1M) Comparison x Update Period Counter */ -/* -------- PWM_CMP1MUPD : (PWM Offset: 0x14C) PWM Comparison 1 Mode Update Register -------- */ -#define PWM_CMP1MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP1MUPD) Comparison x Enable Update */ -#define PWM_CMP1MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP1MUPD) Comparison x Trigger Update */ -#define PWM_CMP1MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP1MUPD) Comparison x Period Update */ -#define PWM_CMP1MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP1MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP2V : (PWM Offset: 0x150) PWM Comparison 2 Value Register -------- */ -#define PWM_CMP2V_CV (0xffffff << 0) /**< \brief (PWM_CMP2V) Comparison x Value */ -#define PWM_CMP2V_CVM (0x1 << 24) /**< \brief (PWM_CMP2V) Comparison x Value Mode */ -/* -------- PWM_CMP2VUPD : (PWM Offset: 0x154) PWM Comparison 2 Value Update Register -------- */ -#define PWM_CMP2VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP2VUPD) Comparison x Value Update */ -#define PWM_CMP2VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP2VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP2M : (PWM Offset: 0x158) PWM Comparison 2 Mode Register -------- */ -#define PWM_CMP2M_CEN (0x1 << 0) /**< \brief (PWM_CMP2M) Comparison x Enable */ -#define PWM_CMP2M_CTR (0xf << 4) /**< \brief (PWM_CMP2M) Comparison x Trigger */ -#define PWM_CMP2M_CPR (0xf << 8) /**< \brief (PWM_CMP2M) Comparison x Period */ -#define PWM_CMP2M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP2M) Comparison x Period Counter */ -#define PWM_CMP2M_CUPR (0xf << 16) /**< \brief (PWM_CMP2M) Comparison x Update Period */ -#define PWM_CMP2M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP2M) Comparison x Update Period Counter */ -/* -------- PWM_CMP2MUPD : (PWM Offset: 0x15C) PWM Comparison 2 Mode Update Register -------- */ -#define PWM_CMP2MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP2MUPD) Comparison x Enable Update */ -#define PWM_CMP2MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP2MUPD) Comparison x Trigger Update */ -#define PWM_CMP2MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP2MUPD) Comparison x Period Update */ -#define PWM_CMP2MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP2MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP3V : (PWM Offset: 0x160) PWM Comparison 3 Value Register -------- */ -#define PWM_CMP3V_CV (0xffffff << 0) /**< \brief (PWM_CMP3V) Comparison x Value */ -#define PWM_CMP3V_CVM (0x1 << 24) /**< \brief (PWM_CMP3V) Comparison x Value Mode */ -/* -------- PWM_CMP3VUPD : (PWM Offset: 0x164) PWM Comparison 3 Value Update Register -------- */ -#define PWM_CMP3VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP3VUPD) Comparison x Value Update */ -#define PWM_CMP3VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP3VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP3M : (PWM Offset: 0x168) PWM Comparison 3 Mode Register -------- */ -#define PWM_CMP3M_CEN (0x1 << 0) /**< \brief (PWM_CMP3M) Comparison x Enable */ -#define PWM_CMP3M_CTR (0xf << 4) /**< \brief (PWM_CMP3M) Comparison x Trigger */ -#define PWM_CMP3M_CPR (0xf << 8) /**< \brief (PWM_CMP3M) Comparison x Period */ -#define PWM_CMP3M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP3M) Comparison x Period Counter */ -#define PWM_CMP3M_CUPR (0xf << 16) /**< \brief (PWM_CMP3M) Comparison x Update Period */ -#define PWM_CMP3M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP3M) Comparison x Update Period Counter */ -/* -------- PWM_CMP3MUPD : (PWM Offset: 0x16C) PWM Comparison 3 Mode Update Register -------- */ -#define PWM_CMP3MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP3MUPD) Comparison x Enable Update */ -#define PWM_CMP3MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP3MUPD) Comparison x Trigger Update */ -#define PWM_CMP3MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP3MUPD) Comparison x Period Update */ -#define PWM_CMP3MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP3MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP4V : (PWM Offset: 0x170) PWM Comparison 4 Value Register -------- */ -#define PWM_CMP4V_CV (0xffffff << 0) /**< \brief (PWM_CMP4V) Comparison x Value */ -#define PWM_CMP4V_CVM (0x1 << 24) /**< \brief (PWM_CMP4V) Comparison x Value Mode */ -/* -------- PWM_CMP4VUPD : (PWM Offset: 0x174) PWM Comparison 4 Value Update Register -------- */ -#define PWM_CMP4VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP4VUPD) Comparison x Value Update */ -#define PWM_CMP4VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP4VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP4M : (PWM Offset: 0x178) PWM Comparison 4 Mode Register -------- */ -#define PWM_CMP4M_CEN (0x1 << 0) /**< \brief (PWM_CMP4M) Comparison x Enable */ -#define PWM_CMP4M_CTR (0xf << 4) /**< \brief (PWM_CMP4M) Comparison x Trigger */ -#define PWM_CMP4M_CPR (0xf << 8) /**< \brief (PWM_CMP4M) Comparison x Period */ -#define PWM_CMP4M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP4M) Comparison x Period Counter */ -#define PWM_CMP4M_CUPR (0xf << 16) /**< \brief (PWM_CMP4M) Comparison x Update Period */ -#define PWM_CMP4M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP4M) Comparison x Update Period Counter */ -/* -------- PWM_CMP4MUPD : (PWM Offset: 0x17C) PWM Comparison 4 Mode Update Register -------- */ -#define PWM_CMP4MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP4MUPD) Comparison x Enable Update */ -#define PWM_CMP4MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP4MUPD) Comparison x Trigger Update */ -#define PWM_CMP4MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP4MUPD) Comparison x Period Update */ -#define PWM_CMP4MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP4MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP5V : (PWM Offset: 0x180) PWM Comparison 5 Value Register -------- */ -#define PWM_CMP5V_CV (0xffffff << 0) /**< \brief (PWM_CMP5V) Comparison x Value */ -#define PWM_CMP5V_CVM (0x1 << 24) /**< \brief (PWM_CMP5V) Comparison x Value Mode */ -/* -------- PWM_CMP5VUPD : (PWM Offset: 0x184) PWM Comparison 5 Value Update Register -------- */ -#define PWM_CMP5VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP5VUPD) Comparison x Value Update */ -#define PWM_CMP5VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP5VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP5M : (PWM Offset: 0x188) PWM Comparison 5 Mode Register -------- */ -#define PWM_CMP5M_CEN (0x1 << 0) /**< \brief (PWM_CMP5M) Comparison x Enable */ -#define PWM_CMP5M_CTR (0xf << 4) /**< \brief (PWM_CMP5M) Comparison x Trigger */ -#define PWM_CMP5M_CPR (0xf << 8) /**< \brief (PWM_CMP5M) Comparison x Period */ -#define PWM_CMP5M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP5M) Comparison x Period Counter */ -#define PWM_CMP5M_CUPR (0xf << 16) /**< \brief (PWM_CMP5M) Comparison x Update Period */ -#define PWM_CMP5M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP5M) Comparison x Update Period Counter */ -/* -------- PWM_CMP5MUPD : (PWM Offset: 0x18C) PWM Comparison 5 Mode Update Register -------- */ -#define PWM_CMP5MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP5MUPD) Comparison x Enable Update */ -#define PWM_CMP5MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP5MUPD) Comparison x Trigger Update */ -#define PWM_CMP5MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP5MUPD) Comparison x Period Update */ -#define PWM_CMP5MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP5MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP6V : (PWM Offset: 0x190) PWM Comparison 6 Value Register -------- */ -#define PWM_CMP6V_CV (0xffffff << 0) /**< \brief (PWM_CMP6V) Comparison x Value */ -#define PWM_CMP6V_CVM (0x1 << 24) /**< \brief (PWM_CMP6V) Comparison x Value Mode */ -/* -------- PWM_CMP6VUPD : (PWM Offset: 0x194) PWM Comparison 6 Value Update Register -------- */ -#define PWM_CMP6VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP6VUPD) Comparison x Value Update */ -#define PWM_CMP6VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP6VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP6M : (PWM Offset: 0x198) PWM Comparison 6 Mode Register -------- */ -#define PWM_CMP6M_CEN (0x1 << 0) /**< \brief (PWM_CMP6M) Comparison x Enable */ -#define PWM_CMP6M_CTR (0xf << 4) /**< \brief (PWM_CMP6M) Comparison x Trigger */ -#define PWM_CMP6M_CPR (0xf << 8) /**< \brief (PWM_CMP6M) Comparison x Period */ -#define PWM_CMP6M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP6M) Comparison x Period Counter */ -#define PWM_CMP6M_CUPR (0xf << 16) /**< \brief (PWM_CMP6M) Comparison x Update Period */ -#define PWM_CMP6M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP6M) Comparison x Update Period Counter */ -/* -------- PWM_CMP6MUPD : (PWM Offset: 0x19C) PWM Comparison 6 Mode Update Register -------- */ -#define PWM_CMP6MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP6MUPD) Comparison x Enable Update */ -#define PWM_CMP6MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP6MUPD) Comparison x Trigger Update */ -#define PWM_CMP6MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP6MUPD) Comparison x Period Update */ -#define PWM_CMP6MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP6MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP7V : (PWM Offset: 0x1A0) PWM Comparison 7 Value Register -------- */ -#define PWM_CMP7V_CV (0xffffff << 0) /**< \brief (PWM_CMP7V) Comparison x Value */ -#define PWM_CMP7V_CVM (0x1 << 24) /**< \brief (PWM_CMP7V) Comparison x Value Mode */ -/* -------- PWM_CMP7VUPD : (PWM Offset: 0x1A4) PWM Comparison 7 Value Update Register -------- */ -#define PWM_CMP7VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP7VUPD) Comparison x Value Update */ -#define PWM_CMP7VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP7VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP7M : (PWM Offset: 0x1A8) PWM Comparison 7 Mode Register -------- */ -#define PWM_CMP7M_CEN (0x1 << 0) /**< \brief (PWM_CMP7M) Comparison x Enable */ -#define PWM_CMP7M_CTR (0xf << 4) /**< \brief (PWM_CMP7M) Comparison x Trigger */ -#define PWM_CMP7M_CPR (0xf << 8) /**< \brief (PWM_CMP7M) Comparison x Period */ -#define PWM_CMP7M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP7M) Comparison x Period Counter */ -#define PWM_CMP7M_CUPR (0xf << 16) /**< \brief (PWM_CMP7M) Comparison x Update Period */ -#define PWM_CMP7M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP7M) Comparison x Update Period Counter */ -/* -------- PWM_CMP7MUPD : (PWM Offset: 0x1AC) PWM Comparison 7 Mode Update Register -------- */ -#define PWM_CMP7MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP7MUPD) Comparison x Enable Update */ -#define PWM_CMP7MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP7MUPD) Comparison x Trigger Update */ -#define PWM_CMP7MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP7MUPD) Comparison x Period Update */ -#define PWM_CMP7MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP7MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMR0 : (PWM Offset: 0x200) PWM Channel Mode Register (ch_num = 0) -------- */ -#define PWM_CMR0_CPRE (0xf << 0) /**< \brief (PWM_CMR0) Channel Pre-scaler */ -#define PWM_CMR0_CPRE_MCK_DIV_2 (0x1) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_4 (0x2) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_8 (0x3) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_16 (0x4) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_32 (0x5) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_64 (0x6) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_128 (0x7) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_256 (0x8) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_512 (0x9) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_1024 (0xA) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCKA (0xB) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCKB (0xC) // (PWMC_CH) -#define PWM_CMR0_CALG (0x1 << 8) /**< \brief (PWM_CMR0) Channel Alignment */ -#define PWM_CMR0_CPOL (0x1 << 9) /**< \brief (PWM_CMR0) Channel Polarity */ -#define PWM_CMR0_CES (0x1 << 10) /**< \brief (PWM_CMR0) Counter Event Selection */ -#define PWM_CMR0_DTE (0x1 << 16) /**< \brief (PWM_CMR0) Dead-Time Generator Enable */ -#define PWM_CMR0_DTHI (0x1 << 17) /**< \brief (PWM_CMR0) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR0_DTLI (0x1 << 18) /**< \brief (PWM_CMR0) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY0 : (PWM Offset: 0x204) PWM Channel Duty Cycle Register (ch_num = 0) -------- */ -#define PWM_CDTY0_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY0) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD0 : (PWM Offset: 0x208) PWM Channel Duty Cycle Update Register (ch_num = 0) -------- */ -#define PWM_CDTYUPD0_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD0) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD0 : (PWM Offset: 0x20C) PWM Channel Period Register (ch_num = 0) -------- */ -#define PWM_CPRD0_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD0) Channel Period */ -/* -------- PWM_CPRDUPD0 : (PWM Offset: 0x210) PWM Channel Period Update Register (ch_num = 0) -------- */ -#define PWM_CPRDUPD0_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD0) Channel Period Update */ -/* -------- PWM_CCNT0 : (PWM Offset: 0x214) PWM Channel Counter Register (ch_num = 0) -------- */ -#define PWM_CCNT0_CNT (0xffffff << 0) /**< \brief (PWM_CCNT0) Channel Counter Register */ -/* -------- PWM_DT0 : (PWM Offset: 0x218) PWM Channel Dead Time Register (ch_num = 0) -------- */ -#define PWM_DT0_DTH (0xffff << 0) /**< \brief (PWM_DT0) Dead-Time Value for PWMHx Output */ -#define PWM_DT0_DTL (0xffff << 16) /**< \brief (PWM_DT0) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD0 : (PWM Offset: 0x21C) PWM Channel Dead Time Update Register (ch_num = 0) -------- */ -#define PWM_DTUPD0_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD0) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD0_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD0) Dead-Time Value Update for PWMLx Output */ -/* -------- PWM_CMR1 : (PWM Offset: 0x220) PWM Channel Mode Register (ch_num = 1) -------- */ -#define PWM_CMR1_CPRE (0xf << 0) /**< \brief (PWM_CMR1) Channel Pre-scaler */ -#define PWM_CMR1_CPRE_MCK_DIV_2 (0x1) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_4 (0x2) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_8 (0x3) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_16 (0x4) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_32 (0x5) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_64 (0x6) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_128 (0x7) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_256 (0x8) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_512 (0x9) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_1024 (0xA) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCKA (0xB) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCKB (0xC) // (PWMC_CH) -#define PWM_CMR1_CALG (0x1 << 8) /**< \brief (PWM_CMR1) Channel Alignment */ -#define PWM_CMR1_CPOL (0x1 << 9) /**< \brief (PWM_CMR1) Channel Polarity */ -#define PWM_CMR1_CES (0x1 << 10) /**< \brief (PWM_CMR1) Counter Event Selection */ -#define PWM_CMR1_DTE (0x1 << 16) /**< \brief (PWM_CMR1) Dead-Time Generator Enable */ -#define PWM_CMR1_DTHI (0x1 << 17) /**< \brief (PWM_CMR1) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR1_DTLI (0x1 << 18) /**< \brief (PWM_CMR1) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY1 : (PWM Offset: 0x224) PWM Channel Duty Cycle Register (ch_num = 1) -------- */ -#define PWM_CDTY1_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY1) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD1 : (PWM Offset: 0x228) PWM Channel Duty Cycle Update Register (ch_num = 1) -------- */ -#define PWM_CDTYUPD1_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD1) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD1 : (PWM Offset: 0x22C) PWM Channel Period Register (ch_num = 1) -------- */ -#define PWM_CPRD1_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD1) Channel Period */ -/* -------- PWM_CPRDUPD1 : (PWM Offset: 0x230) PWM Channel Period Update Register (ch_num = 1) -------- */ -#define PWM_CPRDUPD1_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD1) Channel Period Update */ -/* -------- PWM_CCNT1 : (PWM Offset: 0x234) PWM Channel Counter Register (ch_num = 1) -------- */ -#define PWM_CCNT1_CNT (0xffffff << 0) /**< \brief (PWM_CCNT1) Channel Counter Register */ -/* -------- PWM_DT1 : (PWM Offset: 0x238) PWM Channel Dead Time Register (ch_num = 1) -------- */ -#define PWM_DT1_DTH (0xffff << 0) /**< \brief (PWM_DT1) Dead-Time Value for PWMHx Output */ -#define PWM_DT1_DTL (0xffff << 16) /**< \brief (PWM_DT1) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD1 : (PWM Offset: 0x23C) PWM Channel Dead Time Update Register (ch_num = 1) -------- */ -#define PWM_DTUPD1_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD1) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD1_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD1) Dead-Time Value Update for PWMLx Output */ -/* -------- PWM_CMR2 : (PWM Offset: 0x240) PWM Channel Mode Register (ch_num = 2) -------- */ -#define PWM_CMR2_CPRE (0xf << 0) /**< \brief (PWM_CMR2) Channel Pre-scaler */ -#define PWM_CMR2_CPRE_MCK_DIV_2 (0x1) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_4 (0x2) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_8 (0x3) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_16 (0x4) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_32 (0x5) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_64 (0x6) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_128 (0x7) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_256 (0x8) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_512 (0x9) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_1024 (0xA) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCKA (0xB) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCKB (0xC) // (PWMC_CH) -#define PWM_CMR2_CALG (0x1 << 8) /**< \brief (PWM_CMR2) Channel Alignment */ -#define PWM_CMR2_CPOL (0x1 << 9) /**< \brief (PWM_CMR2) Channel Polarity */ -#define PWM_CMR2_CES (0x1 << 10) /**< \brief (PWM_CMR2) Counter Event Selection */ -#define PWM_CMR2_DTE (0x1 << 16) /**< \brief (PWM_CMR2) Dead-Time Generator Enable */ -#define PWM_CMR2_DTHI (0x1 << 17) /**< \brief (PWM_CMR2) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR2_DTLI (0x1 << 18) /**< \brief (PWM_CMR2) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY2 : (PWM Offset: 0x244) PWM Channel Duty Cycle Register (ch_num = 2) -------- */ -#define PWM_CDTY2_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY2) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD2 : (PWM Offset: 0x248) PWM Channel Duty Cycle Update Register (ch_num = 2) -------- */ -#define PWM_CDTYUPD2_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD2) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD2 : (PWM Offset: 0x24C) PWM Channel Period Register (ch_num = 2) -------- */ -#define PWM_CPRD2_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD2) Channel Period */ -/* -------- PWM_CPRDUPD2 : (PWM Offset: 0x250) PWM Channel Period Update Register (ch_num = 2) -------- */ -#define PWM_CPRDUPD2_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD2) Channel Period Update */ -/* -------- PWM_CCNT2 : (PWM Offset: 0x254) PWM Channel Counter Register (ch_num = 2) -------- */ -#define PWM_CCNT2_CNT (0xffffff << 0) /**< \brief (PWM_CCNT2) Channel Counter Register */ -/* -------- PWM_DT2 : (PWM Offset: 0x258) PWM Channel Dead Time Register (ch_num = 2) -------- */ -#define PWM_DT2_DTH (0xffff << 0) /**< \brief (PWM_DT2) Dead-Time Value for PWMHx Output */ -#define PWM_DT2_DTL (0xffff << 16) /**< \brief (PWM_DT2) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD2 : (PWM Offset: 0x25C) PWM Channel Dead Time Update Register (ch_num = 2) -------- */ -#define PWM_DTUPD2_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD2) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD2_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD2) Dead-Time Value Update for PWMLx Output */ -/* -------- PWM_CMR3 : (PWM Offset: 0x260) PWM Channel Mode Register (ch_num = 3) -------- */ -#define PWM_CMR3_CPRE (0xf << 0) /**< \brief (PWM_CMR3) Channel Pre-scaler */ -#define PWM_CMR3_CPRE_MCK_DIV_2 (0x1) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_4 (0x2) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_8 (0x3) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_16 (0x4) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_32 (0x5) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_64 (0x6) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_128 (0x7) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_256 (0x8) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_512 (0x9) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_1024 (0xA) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCKA (0xB) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCKB (0xC) // (PWMC_CH) -#define PWM_CMR3_CALG (0x1 << 8) /**< \brief (PWM_CMR3) Channel Alignment */ -#define PWM_CMR3_CPOL (0x1 << 9) /**< \brief (PWM_CMR3) Channel Polarity */ -#define PWM_CMR3_CES (0x1 << 10) /**< \brief (PWM_CMR3) Counter Event Selection */ -#define PWM_CMR3_DTE (0x1 << 16) /**< \brief (PWM_CMR3) Dead-Time Generator Enable */ -#define PWM_CMR3_DTHI (0x1 << 17) /**< \brief (PWM_CMR3) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR3_DTLI (0x1 << 18) /**< \brief (PWM_CMR3) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY3 : (PWM Offset: 0x264) PWM Channel Duty Cycle Register (ch_num = 3) -------- */ -#define PWM_CDTY3_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY3) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD3 : (PWM Offset: 0x268) PWM Channel Duty Cycle Update Register (ch_num = 3) -------- */ -#define PWM_CDTYUPD3_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD3) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD3 : (PWM Offset: 0x26C) PWM Channel Period Register (ch_num = 3) -------- */ -#define PWM_CPRD3_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD3) Channel Period */ -/* -------- PWM_CPRDUPD3 : (PWM Offset: 0x270) PWM Channel Period Update Register (ch_num = 3) -------- */ -#define PWM_CPRDUPD3_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD3) Channel Period Update */ -/* -------- PWM_CCNT3 : (PWM Offset: 0x274) PWM Channel Counter Register (ch_num = 3) -------- */ -#define PWM_CCNT3_CNT (0xffffff << 0) /**< \brief (PWM_CCNT3) Channel Counter Register */ -/* -------- PWM_DT3 : (PWM Offset: 0x278) PWM Channel Dead Time Register (ch_num = 3) -------- */ -#define PWM_DT3_DTH (0xffff << 0) /**< \brief (PWM_DT3) Dead-Time Value for PWMHx Output */ -#define PWM_DT3_DTL (0xffff << 16) /**< \brief (PWM_DT3) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD3 : (PWM Offset: 0x27C) PWM Channel Dead Time Update Register (ch_num = 3) -------- */ -#define PWM_DTUPD3_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD3) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD3_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD3) Dead-Time Value Update for PWMLx Output */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Reset Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_RSTC Reset Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rstc hardware registers */ -typedef struct { - WoReg RSTC_CR; /**< \brief (Rstc Offset: 0x00) Control Register */ - RoReg RSTC_SR; /**< \brief (Rstc Offset: 0x04) Status Register */ - RwReg RSTC_MR; /**< \brief (Rstc Offset: 0x08) Mode Register */ -} Rstc; -#endif /* __ASSEMBLY__ */ -/* -------- RSTC_CR : (RSTC Offset: 0x00) Control Register -------- */ -#define RSTC_CR_PROCRST (0x1 << 0) /**< \brief (RSTC_CR) Processor Reset */ -#define RSTC_CR_PERRST (0x1 << 2) /**< \brief (RSTC_CR) Peripheral Reset */ -#define RSTC_CR_EXTRST (0x1 << 3) /**< \brief (RSTC_CR) External Reset */ -#define RSTC_CR_KEY (0xff << 24) /**< \brief (RSTC_CR) Password */ -/* -------- RSTC_SR : (RSTC Offset: 0x04) Status Register -------- */ -#define RSTC_SR_URSTS (0x1 << 0) /**< \brief (RSTC_SR) User Reset Status */ -#define RSTC_SR_RSTTYP (0x7 << 8) /**< \brief (RSTC_SR) Reset Type */ -#define RSTC_SR_NRSTL (0x1 << 16) /**< \brief (RSTC_SR) NRST Pin Level */ -#define RSTC_SR_SRCMP (0x1 << 17) /**< \brief (RSTC_SR) Software Reset Command in Progress */ -/* -------- RSTC_MR : (RSTC Offset: 0x08) Mode Register -------- */ -#define RSTC_MR_URSTEN (0x1 << 0) /**< \brief (RSTC_MR) User Reset Enable */ -#define RSTC_MR_URSTIEN (0x1 << 4) /**< \brief (RSTC_MR) User Reset Interrupt Enable */ -#define RSTC_MR_ERSTL (0xf << 8) /**< \brief (RSTC_MR) External Reset Length */ -#define RSTC_MR_KEY (0xff << 24) /**< \brief (RSTC_MR) Password */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Real-time Clock */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_RTC Real-time Clock */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rtc hardware registers */ -typedef struct { - RwReg RTC_CR; /**< \brief (Rtc Offset: 0x00) Control Register */ - RwReg RTC_MR; /**< \brief (Rtc Offset: 0x04) Mode Register */ - RwReg RTC_TIMR; /**< \brief (Rtc Offset: 0x08) Time Register */ - RwReg RTC_CALR; /**< \brief (Rtc Offset: 0x0C) Calendar Register */ - RwReg RTC_TIMALR; /**< \brief (Rtc Offset: 0x10) Time Alarm Register */ - RwReg RTC_CALALR; /**< \brief (Rtc Offset: 0x14) Calendar Alarm Register */ - RoReg RTC_SR; /**< \brief (Rtc Offset: 0x18) Status Register */ - WoReg RTC_SCCR; /**< \brief (Rtc Offset: 0x1C) Status Clear Command Register */ - WoReg RTC_IER; /**< \brief (Rtc Offset: 0x20) Interrupt Enable Register */ - WoReg RTC_IDR; /**< \brief (Rtc Offset: 0x24) Interrupt Disable Register */ - RoReg RTC_IMR; /**< \brief (Rtc Offset: 0x28) Interrupt Mask Register */ - RoReg RTC_VER; /**< \brief (Rtc Offset: 0x2C) Valid Entry Register */ -} Rtc; -#endif /* __ASSEMBLY__ */ -/* -------- RTC_CR : (RTC Offset: 0x00) Control Register -------- */ -#define RTC_CR_UPDTIM (0x1 << 0) /**< \brief (RTC_CR) Update Request Time Register */ -#define RTC_CR_UPDCAL (0x1 << 1) /**< \brief (RTC_CR) Update Request Calendar Register */ -#define RTC_CR_TIMEVSEL (0x3 << 8) /**< \brief (RTC_CR) Time Event Selection */ -#define RTC_CR_TIMEVSEL_MINUTE (0x0 << 8) /**< \brief (RTC_CR) Minute change. */ -#define RTC_CR_TIMEVSEL_HOUR (0x1 << 8) /**< \brief (RTC_CR) Hour change. */ -#define RTC_CR_TIMEVSEL_DAY24 (0x2 << 8) /**< \brief (RTC_CR) Every day at midnight. */ -#define RTC_CR_TIMEVSEL_DAY12 (0x3 << 8) /**< \brief (RTC_CR) Every day at noon. */ -#define RTC_CR_CALEVSEL (0x3 << 16) /**< \brief (RTC_CR) Calendar Event Selection */ -#define RTC_CR_CALEVSEL_WEEK (0x0 << 16) /**< \brief (RTC_CR) Week change (every Monday at time 00:00:00). */ -#define RTC_CR_CALEVSEL_MONTH (0x1 << 16) /**< \brief (RTC_CR) Month change (every 01 of each month at time 00:00:00). */ -/* -------- RTC_MR : (RTC Offset: 0x04) Mode Register -------- */ -#define RTC_MR_HRMOD (0x1 << 0) /**< \brief (RTC_MR) 12-/24-hour Mode */ -/* -------- RTC_TIMR : (RTC Offset: 0x08) Time Register -------- */ -#define RTC_TIMR_SEC (0x7f << 0) /**< \brief (RTC_TIMR) Current Second */ -#define RTC_TIMR_MIN (0x7f << 8) /**< \brief (RTC_TIMR) Current Minute */ -#define RTC_TIMR_HOUR (0x3f << 16) /**< \brief (RTC_TIMR) Current Hour */ -#define RTC_TIMR_AMPM (0x1 << 22) /**< \brief (RTC_TIMR) Ante Meridiem Post Meridiem Indicator */ -/* -------- RTC_CALR : (RTC Offset: 0x0C) Calendar Register -------- */ -#define RTC_CALR_CENT (0x7f << 0) /**< \brief (RTC_CALR) Current Century */ -#define RTC_CALR_YEAR (0xff << 8) /**< \brief (RTC_CALR) Current Year */ -#define RTC_CALR_MONTH (0x1f << 16) /**< \brief (RTC_CALR) Current Month */ -#define RTC_CALR_DAY (0x7 << 21) /**< \brief (RTC_CALR) Current Day in Current Week */ -#define RTC_CALR_DATE (0x3f << 24) /**< \brief (RTC_CALR) Current Day in Current Month */ -/* -------- RTC_TIMALR : (RTC Offset: 0x10) Time Alarm Register -------- */ -#define RTC_TIMALR_SEC (0x7f << 0) /**< \brief (RTC_TIMALR) Second Alarm */ -#define RTC_TIMALR_SECEN (0x1 << 7) /**< \brief (RTC_TIMALR) Second Alarm Enable */ -#define RTC_TIMALR_MIN (0x7f << 8) /**< \brief (RTC_TIMALR) Minute Alarm */ -#define RTC_TIMALR_MINEN (0x1 << 15) /**< \brief (RTC_TIMALR) Minute Alarm Enable */ -#define RTC_TIMALR_HOUR (0x3f << 16) /**< \brief (RTC_TIMALR) Hour Alarm */ -#define RTC_TIMALR_AMPM (0x1 << 22) /**< \brief (RTC_TIMALR) AM/PM Indicator */ -#define RTC_TIMALR_HOUREN (0x1 << 23) /**< \brief (RTC_TIMALR) Hour Alarm Enable */ -/* -------- RTC_CALALR : (RTC Offset: 0x14) Calendar Alarm Register -------- */ -#define RTC_CALALR_MONTH (0x1f << 16) /**< \brief (RTC_CALALR) Month Alarm */ -#define RTC_CALALR_MTHEN (0x1 << 23) /**< \brief (RTC_CALALR) Month Alarm Enable */ -#define RTC_CALALR_DATE (0x3f << 24) /**< \brief (RTC_CALALR) Date Alarm */ -#define RTC_CALALR_DATEEN (0x1 << 31) /**< \brief (RTC_CALALR) Date Alarm Enable */ -/* -------- RTC_SR : (RTC Offset: 0x18) Status Register -------- */ -#define RTC_SR_ACKUPD (0x1 << 0) /**< \brief (RTC_SR) Acknowledge for Update */ -#define RTC_SR_ALARM (0x1 << 1) /**< \brief (RTC_SR) Alarm Flag */ -#define RTC_SR_SEC (0x1 << 2) /**< \brief (RTC_SR) Second Event */ -#define RTC_SR_TIMEV (0x1 << 3) /**< \brief (RTC_SR) Time Event */ -#define RTC_SR_CALEV (0x1 << 4) /**< \brief (RTC_SR) Calendar Event */ -/* -------- RTC_SCCR : (RTC Offset: 0x1C) Status Clear Command Register -------- */ -#define RTC_SCCR_ACKCLR (0x1 << 0) /**< \brief (RTC_SCCR) Acknowledge Clear */ -#define RTC_SCCR_ALRCLR (0x1 << 1) /**< \brief (RTC_SCCR) Alarm Clear */ -#define RTC_SCCR_SECCLR (0x1 << 2) /**< \brief (RTC_SCCR) Second Clear */ -#define RTC_SCCR_TIMCLR (0x1 << 3) /**< \brief (RTC_SCCR) Time Clear */ -#define RTC_SCCR_CALCLR (0x1 << 4) /**< \brief (RTC_SCCR) Calendar Clear */ -/* -------- RTC_IER : (RTC Offset: 0x20) Interrupt Enable Register -------- */ -#define RTC_IER_ACKEN (0x1 << 0) /**< \brief (RTC_IER) Acknowledge Update Interrupt Enable */ -#define RTC_IER_ALREN (0x1 << 1) /**< \brief (RTC_IER) Alarm Interrupt Enable */ -#define RTC_IER_SECEN (0x1 << 2) /**< \brief (RTC_IER) Second Event Interrupt Enable */ -#define RTC_IER_TIMEN (0x1 << 3) /**< \brief (RTC_IER) Time Event Interrupt Enable */ -#define RTC_IER_CALEN (0x1 << 4) /**< \brief (RTC_IER) Calendar Event Interrupt Enable */ -/* -------- RTC_IDR : (RTC Offset: 0x24) Interrupt Disable Register -------- */ -#define RTC_IDR_ACKDIS (0x1 << 0) /**< \brief (RTC_IDR) Acknowledge Update Interrupt Disable */ -#define RTC_IDR_ALRDIS (0x1 << 1) /**< \brief (RTC_IDR) Alarm Interrupt Disable */ -#define RTC_IDR_SECDIS (0x1 << 2) /**< \brief (RTC_IDR) Second Event Interrupt Disable */ -#define RTC_IDR_TIMDIS (0x1 << 3) /**< \brief (RTC_IDR) Time Event Interrupt Disable */ -#define RTC_IDR_CALDIS (0x1 << 4) /**< \brief (RTC_IDR) Calendar Event Interrupt Disable */ -/* -------- RTC_IMR : (RTC Offset: 0x28) Interrupt Mask Register -------- */ -#define RTC_IMR_ACK (0x1 << 0) /**< \brief (RTC_IMR) Acknowledge Update Interrupt Mask */ -#define RTC_IMR_ALR (0x1 << 1) /**< \brief (RTC_IMR) Alarm Interrupt Mask */ -#define RTC_IMR_SEC (0x1 << 2) /**< \brief (RTC_IMR) Second Event Interrupt Mask */ -#define RTC_IMR_TIM (0x1 << 3) /**< \brief (RTC_IMR) Time Event Interrupt Mask */ -#define RTC_IMR_CAL (0x1 << 4) /**< \brief (RTC_IMR) Calendar Event Interrupt Mask */ -/* -------- RTC_VER : (RTC Offset: 0x2C) Valid Entry Register -------- */ -#define RTC_VER_NVTIM (0x1 << 0) /**< \brief (RTC_VER) Non-valid Time */ -#define RTC_VER_NVCAL (0x1 << 1) /**< \brief (RTC_VER) Non-valid Calendar */ -#define RTC_VER_NVTIMALR (0x1 << 2) /**< \brief (RTC_VER) Non-valid Time Alarm */ -#define RTC_VER_NVCALALR (0x1 << 3) /**< \brief (RTC_VER) Non-valid Calendar Alarm */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Real-time Timer */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_RTT Real-time Timer */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rtt hardware registers */ -typedef struct { - RwReg RTT_MR; /**< \brief (Rtt Offset: 0x00) Mode Register */ - RwReg RTT_AR; /**< \brief (Rtt Offset: 0x04) Alarm Register */ - RoReg RTT_VR; /**< \brief (Rtt Offset: 0x08) Value Register */ - RoReg RTT_SR; /**< \brief (Rtt Offset: 0x0C) Status Register */ -} Rtt; -#endif /* __ASSEMBLY__ */ -/* -------- RTT_MR : (RTT Offset: 0x00) Mode Register -------- */ -#define RTT_MR_RTPRES (0xffff << 0) /**< \brief (RTT_MR) Real-time Timer Prescaler Value */ -#define RTT_MR_ALMIEN (0x1 << 16) /**< \brief (RTT_MR) Alarm Interrupt Enable */ -#define RTT_MR_RTTINCIEN (0x1 << 17) /**< \brief (RTT_MR) Real-time Timer Increment Interrupt Enable */ -#define RTT_MR_RTTRST (0x1 << 18) /**< \brief (RTT_MR) Real-time Timer Restart */ -/* -------- RTT_AR : (RTT Offset: 0x04) Alarm Register -------- */ -#define RTT_AR_ALMV (0xffffffff << 0) /**< \brief (RTT_AR) Alarm Value */ -/* -------- RTT_VR : (RTT Offset: 0x08) Value Register -------- */ -#define RTT_VR_CRTV (0xffffffff << 0) /**< \brief (RTT_VR) Current Real-time Value */ -/* -------- RTT_SR : (RTT Offset: 0x0C) Status Register -------- */ -#define RTT_SR_ALMS (0x1 << 0) /**< \brief (RTT_SR) Real-time Alarm Status */ -#define RTT_SR_RTTINC (0x1 << 1) /**< \brief (RTT_SR) Real-time Timer Increment */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Static Memory Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_SMC Static Memory Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief SmcCs_number hardware registers */ -typedef struct { - RwReg SMC_SETUP; /**< \brief (SmcCs_number Offset: 0x0) SMC SETUP Register */ - RwReg SMC_PULSE; /**< \brief (SmcCs_number Offset: 0x4) SMC PULSE Register */ - RwReg SMC_CYCLE; /**< \brief (SmcCs_number Offset: 0x8) SMC CYCLE Register */ - RwReg SMC_TIMINGS; /**< \brief (SmcCs_number Offset: 0xC) SMC TIMINGS Register */ - RwReg SMC_MODE; /**< \brief (SmcCs_number Offset: 0x10) SMC MODE Register */ -} SmcCs_number; -/** \brief Smc hardware registers */ -typedef struct { - RwReg SMC_CFG; /**< \brief (Smc Offset: 0x000) SMC NFC Configuration Register */ - WoReg SMC_CTRL; /**< \brief (Smc Offset: 0x004) SMC NFC Control Register */ - RoReg SMC_SR; /**< \brief (Smc Offset: 0x008) SMC NFC Status Register */ - WoReg SMC_IER; /**< \brief (Smc Offset: 0x00C) SMC NFC Interrupt Enable Register */ - WoReg SMC_IDR; /**< \brief (Smc Offset: 0x010) SMC NFC Interrupt Disable Register */ - RoReg SMC_IMR; /**< \brief (Smc Offset: 0x014) SMC NFC Interrupt Mask Register */ - RwReg SMC_ADDR; /**< \brief (Smc Offset: 0x018) SMC NFC Address Cycle Zero Register */ - RwReg SMC_BANK; /**< \brief (Smc Offset: 0x01C) SMC Bank Address Register */ - WoReg SMC_ECC_CTRL; /**< \brief (Smc Offset: 0x020) SMC ECC Control Register */ - RwReg SMC_ECC_MD; /**< \brief (Smc Offset: 0x024) SMC ECC Mode Register */ - RoReg SMC_ECC_SR1; /**< \brief (Smc Offset: 0x028) SMC ECC Status 1 Register */ - RoReg SMC_ECC_PR0; /**< \brief (Smc Offset: 0x02C) SMC ECC Parity 0 Register */ - RoReg SMC_ECC_PR1; /**< \brief (Smc Offset: 0x030) SMC ECC parity 1 Register */ - RoReg SMC_ECC_SR2; /**< \brief (Smc Offset: 0x034) SMC ECC status 2 Register */ - RoReg SMC_ECC_PR2; /**< \brief (Smc Offset: 0x038) SMC ECC parity 2 Register */ - RoReg SMC_ECC_PR3; /**< \brief (Smc Offset: 0x03C) SMC ECC parity 3 Register */ - RoReg SMC_ECC_PR4; /**< \brief (Smc Offset: 0x040) SMC ECC parity 4 Register */ - RoReg SMC_ECC_PR5; /**< \brief (Smc Offset: 0x044) SMC ECC parity 5 Register */ - RoReg SMC_ECC_PR6; /**< \brief (Smc Offset: 0x048) SMC ECC parity 6 Register */ - RoReg SMC_ECC_PR7; /**< \brief (Smc Offset: 0x04C) SMC ECC parity 7 Register */ - RoReg SMC_ECC_PR8; /**< \brief (Smc Offset: 0x050) SMC ECC parity 8 Register */ - RoReg SMC_ECC_PR9; /**< \brief (Smc Offset: 0x054) SMC ECC parity 9 Register */ - RoReg SMC_ECC_PR10; /**< \brief (Smc Offset: 0x058) SMC ECC parity 10 Register */ - RoReg SMC_ECC_PR11; /**< \brief (Smc Offset: 0x05C) SMC ECC parity 11 Register */ - RoReg SMC_ECC_PR12; /**< \brief (Smc Offset: 0x060) SMC ECC parity 12 Register */ - RoReg SMC_ECC_PR13; /**< \brief (Smc Offset: 0x064) SMC ECC parity 13 Register */ - RoReg SMC_ECC_PR14; /**< \brief (Smc Offset: 0x068) SMC ECC parity 14 Register */ - RoReg SMC_ECC_PR15; /**< \brief (Smc Offset: 0x06C) SMC ECC parity 15 Register */ - SmcCs_number SMC_CS_NUMBER[4]; /**< \brief (Smc Offset: 0x70) CS_number = 0 .. 3 */ - RwReg Reserved1[20]; - RwReg SMC_OCMS; /**< \brief (Smc Offset: 0x110) SMC OCMS MODE Register */ - WoReg SMC_KEY1; /**< \brief (Smc Offset: 0x114) SMC KEY1 Register */ - WoReg SMC_KEY2; /**< \brief (Smc Offset: 0x118) SMC KEY2 Register */ - RwReg Reserved2[50]; - WoReg SMC_WPCR; /**< \brief (Smc Offset: 0x1E4) Write Protection Control Register */ - RoReg SMC_WPSR; /**< \brief (Smc Offset: 0x1E8) Write Protection Status Register */ -} Smc; -#endif /* __ASSEMBLY__ */ -/* -------- SMC_CFG : (SMC Offset: 0x000) SMC NFC Configuration Register -------- */ -#define SMC_CFG_PAGESIZE (0x3 << 0) /**< \brief (SMC_CFG) */ -#define SMC_CFG_WSPARE (0x1 << 8) /**< \brief (SMC_CFG) Write Spare Area */ -#define SMC_CFG_RSPARE (0x1 << 9) /**< \brief (SMC_CFG) Read Spare Area */ -#define SMC_CFG_EDGECTRL (0x1 << 12) /**< \brief (SMC_CFG) Rising/Falling Edge Detection Control */ -#define SMC_CFG_RBEDGE (0x1 << 13) /**< \brief (SMC_CFG) Ready/Busy Signal Edge Detection */ -#define SMC_CFG_DTOCYC (0xf << 16) /**< \brief (SMC_CFG) Data Timeout Cycle Number */ -#define SMC_CFG_DTOMUL (0x7 << 20) /**< \brief (SMC_CFG) Data Timeout Multiplier */ -/* -------- SMC_CTRL : (SMC Offset: 0x004) SMC NFC Control Register -------- */ -#define SMC_CTRL_NFCEN (0x1 << 0) /**< \brief (SMC_CTRL) NAND Flash Controller Enable */ -#define SMC_CTRL_NFCDIS (0x1 << 1) /**< \brief (SMC_CTRL) NAND Flash Controller Disable */ -/* -------- SMC_SR : (SMC Offset: 0x008) SMC NFC Status Register -------- */ -#define SMC_SR_SMCSTS (0x1 << 0) /**< \brief (SMC_SR) NAND Flash Controller status (this field cannot be reset) */ -#define SMC_SR_RB_RISE (0x1 << 4) /**< \brief (SMC_SR) Selected Ready Busy Rising Edge Detected */ -#define SMC_SR_RB_FALL (0x1 << 5) /**< \brief (SMC_SR) Selected Ready Busy Falling Edge Detected */ -#define SMC_SR_NFCBUSY (0x1 << 8) /**< \brief (SMC_SR) NFC Busy (this field cannot be reset) */ -#define SMC_SR_NFCWR (0x1 << 11) /**< \brief (SMC_SR) NFC Write/Read Operation (this field cannot be reset) */ -#define SMC_SR_NFCSID (0x7 << 12) /**< \brief (SMC_SR) NFC Chip Select ID (this field cannot be reset) */ -#define SMC_SR_XFRDONE (0x1 << 16) /**< \brief (SMC_SR) NFC Data Transfer Terminated */ -#define SMC_SR_CMDDONE (0x1 << 17) /**< \brief (SMC_SR) Command Done */ -#define SMC_SR_DTOE (0x1 << 20) /**< \brief (SMC_SR) Data Timeout Error */ -#define SMC_SR_UNDEF (0x1 << 21) /**< \brief (SMC_SR) Undefined Area Error */ -#define SMC_SR_AWB (0x1 << 22) /**< \brief (SMC_SR) Accessing While Busy */ -#define SMC_SR_NFCASE (0x1 << 23) /**< \brief (SMC_SR) NFC Access Size Error */ -#define SMC_SR_RB_EDGE0 (0x1 << 24) /**< \brief (SMC_SR) Ready/Busy Line 0 Edge Detected */ -/* -------- SMC_IER : (SMC Offset: 0x00C) SMC NFC Interrupt Enable Register -------- */ -#define SMC_IER_RB_RISE (0x1 << 4) /**< \brief (SMC_IER) Ready Busy Rising Edge Detection Interrupt Enable */ -#define SMC_IER_RB_FALL (0x1 << 5) /**< \brief (SMC_IER) Ready Busy Falling Edge Detection Interrupt Enable */ -#define SMC_IER_XFRDONE (0x1 << 16) /**< \brief (SMC_IER) Transfer Done Interrupt Enable */ -#define SMC_IER_CMDDONE (0x1 << 17) /**< \brief (SMC_IER) Command Done Interrupt Enable */ -#define SMC_IER_DTOE (0x1 << 20) /**< \brief (SMC_IER) Data Timeout Error Interrupt Enable */ -#define SMC_IER_UNDEF (0x1 << 21) /**< \brief (SMC_IER) Undefined Area Access Interrupt Enable */ -#define SMC_IER_AWB (0x1 << 22) /**< \brief (SMC_IER) Accessing While Busy Interrupt Enable */ -#define SMC_IER_NFCASE (0x1 << 23) /**< \brief (SMC_IER) NFC Access Size Error Interrupt Enable */ -#define SMC_IER_RB_EDGE0 (0x1 << 24) /**< \brief (SMC_IER) Ready/Busy Line 0 Interrupt Enable */ -/* -------- SMC_IDR : (SMC Offset: 0x010) SMC NFC Interrupt Disable Register -------- */ -#define SMC_IDR_RB_RISE (0x1 << 4) /**< \brief (SMC_IDR) Ready Busy Rising Edge Detection Interrupt Disable */ -#define SMC_IDR_RB_FALL (0x1 << 5) /**< \brief (SMC_IDR) Ready Busy Falling Edge Detection Interrupt Disable */ -#define SMC_IDR_XFRDONE (0x1 << 16) /**< \brief (SMC_IDR) Transfer Done Interrupt Disable */ -#define SMC_IDR_CMDDONE (0x1 << 17) /**< \brief (SMC_IDR) Command Done Interrupt Disable */ -#define SMC_IDR_DTOE (0x1 << 20) /**< \brief (SMC_IDR) Data Timeout Error Interrupt Disable */ -#define SMC_IDR_UNDEF (0x1 << 21) /**< \brief (SMC_IDR) Undefined Area Access Interrupt Disable */ -#define SMC_IDR_AWB (0x1 << 22) /**< \brief (SMC_IDR) Accessing While Busy Interrupt Disable */ -#define SMC_IDR_NFCASE (0x1 << 23) /**< \brief (SMC_IDR) NFC Access Size Error Interrupt Disable */ -#define SMC_IDR_RB_EDGE0 (0x1 << 24) /**< \brief (SMC_IDR) Ready/Busy Line 0 Interrupt Disable */ -/* -------- SMC_IMR : (SMC Offset: 0x014) SMC NFC Interrupt Mask Register -------- */ -#define SMC_IMR_RB_RISE (0x1 << 4) /**< \brief (SMC_IMR) Ready Busy Rising Edge Detection Interrupt Mask */ -#define SMC_IMR_RB_FALL (0x1 << 5) /**< \brief (SMC_IMR) Ready Busy Falling Edge Detection Interrupt Mask */ -#define SMC_IMR_XFRDONE (0x1 << 16) /**< \brief (SMC_IMR) Transfer Done Interrupt Mask */ -#define SMC_IMR_CMDDONE (0x1 << 17) /**< \brief (SMC_IMR) Command Done Interrupt Mask */ -#define SMC_IMR_DTOE (0x1 << 20) /**< \brief (SMC_IMR) Data Timeout Error Interrupt Mask */ -#define SMC_IMR_UNDEF (0x1 << 21) /**< \brief (SMC_IMR) Undefined Area Access Interrupt Mask5 */ -#define SMC_IMR_AWB (0x1 << 22) /**< \brief (SMC_IMR) Accessing While Busy Interrupt Mask */ -#define SMC_IMR_NFCASE (0x1 << 23) /**< \brief (SMC_IMR) NFC Access Size Error Interrupt Mask */ -#define SMC_IMR_RB_EDGE0 (0x1 << 24) /**< \brief (SMC_IMR) Ready/Busy Line 0 Interrupt Mask */ -/* -------- SMC_ADDR : (SMC Offset: 0x018) SMC NFC Address Cycle Zero Register -------- */ -#define SMC_ADDR_ADDR_CYCLE0 (0xff << 0) /**< \brief (SMC_ADDR) NAND Flash Array Address cycle 0 */ -/* -------- SMC_BANK : (SMC Offset: 0x01C) SMC Bank Address Register -------- */ -#define SMC_BANK_BANK (0x7 << 0) /**< \brief (SMC_BANK) Bank Identifier */ -/* -------- SMC_ECC_CTRL : (SMC Offset: 0x020) SMC ECC Control Register -------- */ -#define SMC_ECC_CTRL_RST (0x1 << 0) /**< \brief (SMC_ECC_CTRL) Reset ECC */ -#define SMC_ECC_CTRL_SWRST (0x1 << 1) /**< \brief (SMC_ECC_CTRL) Software Reset */ -/* -------- SMC_ECC_MD : (SMC Offset: 0x024) SMC ECC Mode Register -------- */ -#define SMC_ECC_MD_ECC_PAGESIZE (0x3 << 0) /**< \brief (SMC_ECC_MD) */ -#define SMC_ECC_MD_TYPCORREC (0x3 << 4) /**< \brief (SMC_ECC_MD) type of correction */ -/* -------- SMC_ECC_SR1 : (SMC Offset: 0x028) SMC ECC Status 1 Register -------- */ -#define SMC_ECC_SR1_RECERR0 (0x1 << 0) /**< \brief (SMC_ECC_SR1) Recoverable Error */ -#define SMC_ECC_SR1_ECCERR0 (0x3 << 1) /**< \brief (SMC_ECC_SR1) ECC Error */ -#define SMC_ECC_SR1_RECERR1 (0x1 << 4) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 256th and the 511th bytes or the 512nd and the 1023rd bytes */ -#define SMC_ECC_SR1_ECCERR1 (0x1 << 5) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 256th and the 511th bytes or between the 512nd and the 1023rd bytes */ -#define SMC_ECC_SR1_MULERR1 (0x1 << 6) /**< \brief (SMC_ECC_SR1) Multiple Error in the page between the 256th and the 511th bytes or between the 512nd and the 1023rd bytes */ -#define SMC_ECC_SR1_RECERR2 (0x1 << 8) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 512nd and the 767th bytes or between the 1024th and the 1535th bytes */ -#define SMC_ECC_SR1_ECCERR2 (0x1 << 9) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 512nd and the 767th bytes or between the 1024th and the 1535th bytes */ -#define SMC_ECC_SR1_MULERR2 (0x1 << 10) /**< \brief (SMC_ECC_SR1) Multiple Error in the page between the 512nd and the 767th bytes or between the 1024th and the 1535th bytes */ -#define SMC_ECC_SR1_RECERR3 (0x1 << 12) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 768th and the 1023rd bytes or between the 1536th and the 2047th bytes */ -#define SMC_ECC_SR1_ECCERR3 (0x1 << 13) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 768th and the 1023rd bytes or between the 1536th and the 2047th bytes */ -#define SMC_ECC_SR1_MULERR3 (0x1 << 14) /**< \brief (SMC_ECC_SR1) Multiple Error in the page between the 768th and the 1023rd bytes or between the 1536th and the 2047th bytes */ -#define SMC_ECC_SR1_RECERR4 (0x1 << 16) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 1024th and the 1279th bytes or between the 2048th and the 2559th bytes */ -#define SMC_ECC_SR1_ECCERR4 (0x3 << 17) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 1024th and the 1279th bytes or between the 2048th and the 2559th bytes */ -#define SMC_ECC_SR1_RECERR5 (0x1 << 20) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 1280th and the 1535th bytes or between the 2560th and the 3071st bytes */ -#define SMC_ECC_SR1_ECCERR5 (0x3 << 21) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 1280th and the 1535th bytes or between the 2560th and the 3071st bytes */ -#define SMC_ECC_SR1_RECERR6 (0x1 << 24) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 1536th and the 1791st bytes or between the 3072nd and the 3583rd bytes */ -#define SMC_ECC_SR1_ECCERR6 (0x3 << 25) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 1536th and the 1791st bytes or between the 3072nd and the 3583rd bytes */ -#define SMC_ECC_SR1_RECERR7 (0x1 << 28) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 1792nd and the 2047th bytes or between the 3584th and the 4095th bytes */ -#define SMC_ECC_SR1_ECCERR7 (0x3 << 29) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 1792nd and the 2047th bytes or between the 3584th and the 4095th bytes */ -/* -------- SMC_ECC_PR0 : (SMC Offset: 0x02C) SMC ECC Parity 0 Register -------- */ -#define SMC_ECC_PR0_BITADDR (0xf << 0) /**< \brief (SMC_ECC_PR0) Bit Address */ -#define SMC_ECC_PR0_WORDADDR (0xfff << 4) /**< \brief (SMC_ECC_PR0) Word Address */ -/* -------- SMC_ECC_PR1 : (SMC Offset: 0x030) SMC ECC parity 1 Register -------- */ -#define SMC_ECC_PR1_NPARITY (0xffff << 0) /**< \brief (SMC_ECC_PR1) */ -/* -------- SMC_ECC_SR2 : (SMC Offset: 0x034) SMC ECC status 2 Register -------- */ -#define SMC_ECC_SR2_RECERR8 (0x1 << 0) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 2048th and the 2303rd bytes */ -#define SMC_ECC_SR2_ECCERR8 (0x3 << 1) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 2048th and the 2303rd bytes */ -#define SMC_ECC_SR2_RECERR9 (0x1 << 4) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 2304th and the 2559th bytes */ -#define SMC_ECC_SR2_ECCERR9 (0x1 << 5) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 2304th and the 2559th bytes */ -#define SMC_ECC_SR2_MULERR9 (0x1 << 6) /**< \brief (SMC_ECC_SR2) Multiple Error in the page between the 2304th and the 2559th bytes */ -#define SMC_ECC_SR2_RECERR10 (0x1 << 8) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 2560th and the 2815th bytes */ -#define SMC_ECC_SR2_ECCERR10 (0x1 << 9) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 2560th and the 2815th bytes */ -#define SMC_ECC_SR2_MULERR10 (0x1 << 10) /**< \brief (SMC_ECC_SR2) Multiple Error in the page between the 2560th and the 2815th bytes */ -#define SMC_ECC_SR2_RECERR11 (0x1 << 12) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 2816th and the 3071st bytes */ -#define SMC_ECC_SR2_ECCERR11 (0x1 << 13) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 2816th and the 3071st bytes */ -#define SMC_ECC_SR2_MULERR11 (0x1 << 14) /**< \brief (SMC_ECC_SR2) Multiple Error in the page between the 2816th and the 3071st bytes */ -#define SMC_ECC_SR2_RECERR12 (0x1 << 16) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 3072nd and the 3327th bytes */ -#define SMC_ECC_SR2_ECCERR12 (0x3 << 17) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 3072nd and the 3327th bytes */ -#define SMC_ECC_SR2_RECERR13 (0x1 << 20) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 3328th and the 3583rd bytes */ -#define SMC_ECC_SR2_ECCERR13 (0x3 << 21) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 3328th and the 3583rd bytes */ -#define SMC_ECC_SR2_RECERR14 (0x1 << 24) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 3584th and the 3839th bytes */ -#define SMC_ECC_SR2_ECCERR14 (0x3 << 25) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 3584th and the 3839th bytes */ -#define SMC_ECC_SR2_RECERR15 (0x1 << 28) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 3840th and the 4095th bytes */ -#define SMC_ECC_SR2_ECCERR15 (0x3 << 29) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 3840th and the 4095th bytes */ -/* -------- SMC_ECC_PR2 : (SMC Offset: 0x038) SMC ECC parity 2 Register -------- */ -/* -------- SMC_ECC_PR3 : (SMC Offset: 0x03C) SMC ECC parity 3 Register -------- */ -/* -------- SMC_ECC_PR4 : (SMC Offset: 0x040) SMC ECC parity 4 Register -------- */ -/* -------- SMC_ECC_PR5 : (SMC Offset: 0x044) SMC ECC parity 5 Register -------- */ -/* -------- SMC_ECC_PR6 : (SMC Offset: 0x048) SMC ECC parity 6 Register -------- */ -/* -------- SMC_ECC_PR7 : (SMC Offset: 0x04C) SMC ECC parity 7 Register -------- */ -/* -------- SMC_ECC_PR8 : (SMC Offset: 0x050) SMC ECC parity 8 Register -------- */ -/* -------- SMC_ECC_PR9 : (SMC Offset: 0x054) SMC ECC parity 9 Register -------- */ -/* -------- SMC_ECC_PR10 : (SMC Offset: 0x058) SMC ECC parity 10 Register -------- */ -/* -------- SMC_ECC_PR11 : (SMC Offset: 0x05C) SMC ECC parity 11 Register -------- */ -/* -------- SMC_ECC_PR12 : (SMC Offset: 0x060) SMC ECC parity 12 Register -------- */ -/* -------- SMC_ECC_PR13 : (SMC Offset: 0x064) SMC ECC parity 13 Register -------- */ -/* -------- SMC_ECC_PR14 : (SMC Offset: 0x068) SMC ECC parity 14 Register -------- */ -/* -------- SMC_ECC_PR15 : (SMC Offset: 0x06C) SMC ECC parity 15 Register -------- */ -/* -------- SMC_SETUP0 : (SMC Offset: 0x70) SMC SETUP Register (CS_number = 0) -------- */ -#define SMC_SETUP0_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP0) NWE Setup length */ -#define SMC_SETUP0_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP0) NCS Setup length in Write access */ -#define SMC_SETUP0_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP0) NRD Setup length */ -#define SMC_SETUP0_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP0) NCS Setup length in Read access */ -/* -------- SMC_PULSE0 : (SMC Offset: 0x74) SMC PULSE Register (CS_number = 0) -------- */ -#define SMC_PULSE0_NWE_PULSE (0x3f << 0) /**< \brief (SMC_PULSE0) NWE Pulse Length */ -#define SMC_PULSE0_NCS_WR_PULSE (0x3f << 8) /**< \brief (SMC_PULSE0) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE0_NRD_PULSE (0x3f << 16) /**< \brief (SMC_PULSE0) NRD Pulse Length */ -#define SMC_PULSE0_NCS_RD_PULSE (0x3f << 24) /**< \brief (SMC_PULSE0) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE0 : (SMC Offset: 0x78) SMC CYCLE Register (CS_number = 0) -------- */ -#define SMC_CYCLE0_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE0) Total Write Cycle Length */ -#define SMC_CYCLE0_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE0) Total Read Cycle Length */ -/* -------- SMC_TIMINGS0 : (SMC Offset: 0x7C) SMC TIMINGS Register (CS_number = 0) -------- */ -#define SMC_TIMINGS0_TCLR (0xf << 0) /**< \brief (SMC_TIMINGS0) CLE to REN Low Delay */ -#define SMC_TIMINGS0_TADL (0xf << 4) /**< \brief (SMC_TIMINGS0) ALE to Data Start */ -#define SMC_TIMINGS0_TAR (0xf << 8) /**< \brief (SMC_TIMINGS0) ALE to REN Low Delay */ -#define SMC_TIMINGS0_OCMS (0x1 << 12) /**< \brief (SMC_TIMINGS0) Off Chip Memory Scrambling Enable */ -#define SMC_TIMINGS0_TRR (0xf << 16) /**< \brief (SMC_TIMINGS0) Ready to REN Low Delay */ -#define SMC_TIMINGS0_TWB (0xf << 24) /**< \brief (SMC_TIMINGS0) WEN High to REN to Busy */ -#define SMC_TIMINGS0_RBNSEL (0x7 << 28) /**< \brief (SMC_TIMINGS0) Ready/Busy Line Selection */ -#define SMC_TIMINGS0_NFSEL (0x1 << 31) /**< \brief (SMC_TIMINGS0) NAND Flash Selection */ -/* -------- SMC_MODE0 : (SMC Offset: 0x80) SMC MODE Register (CS_number = 0) -------- */ -#define SMC_MODE0_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE0) */ -#define SMC_MODE0_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE0) */ -#define SMC_MODE0_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE0) NWAIT Mode */ -#define SMC_MODE0_BAT (0x1 << 8) /**< \brief (SMC_MODE0) Byte Access Type */ -#define SMC_MODE0_DBW (0x1 << 12) /**< \brief (SMC_MODE0) Data Bus Width */ -#define SMC_MODE0_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE0) Data Float Time */ -#define SMC_MODE0_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE0) TDF Optimization */ -/* -------- SMC_SETUP1 : (SMC Offset: 0x84) SMC SETUP Register (CS_number = 1) -------- */ -#define SMC_SETUP1_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP1) NWE Setup length */ -#define SMC_SETUP1_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP1) NCS Setup length in Write access */ -#define SMC_SETUP1_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP1) NRD Setup length */ -#define SMC_SETUP1_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP1) NCS Setup length in Read access */ -/* -------- SMC_PULSE1 : (SMC Offset: 0x88) SMC PULSE Register (CS_number = 1) -------- */ -#define SMC_PULSE1_NWE_PULSE (0x3f << 0) /**< \brief (SMC_PULSE1) NWE Pulse Length */ -#define SMC_PULSE1_NCS_WR_PULSE (0x3f << 8) /**< \brief (SMC_PULSE1) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE1_NRD_PULSE (0x3f << 16) /**< \brief (SMC_PULSE1) NRD Pulse Length */ -#define SMC_PULSE1_NCS_RD_PULSE (0x3f << 24) /**< \brief (SMC_PULSE1) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE1 : (SMC Offset: 0x8C) SMC CYCLE Register (CS_number = 1) -------- */ -#define SMC_CYCLE1_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE1) Total Write Cycle Length */ -#define SMC_CYCLE1_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE1) Total Read Cycle Length */ -/* -------- SMC_TIMINGS1 : (SMC Offset: 0x90) SMC TIMINGS Register (CS_number = 1) -------- */ -#define SMC_TIMINGS1_TCLR (0xf << 0) /**< \brief (SMC_TIMINGS1) CLE to REN Low Delay */ -#define SMC_TIMINGS1_TADL (0xf << 4) /**< \brief (SMC_TIMINGS1) ALE to Data Start */ -#define SMC_TIMINGS1_TAR (0xf << 8) /**< \brief (SMC_TIMINGS1) ALE to REN Low Delay */ -#define SMC_TIMINGS1_OCMS (0x1 << 12) /**< \brief (SMC_TIMINGS1) Off Chip Memory Scrambling Enable */ -#define SMC_TIMINGS1_TRR (0xf << 16) /**< \brief (SMC_TIMINGS1) Ready to REN Low Delay */ -#define SMC_TIMINGS1_TWB (0xf << 24) /**< \brief (SMC_TIMINGS1) WEN High to REN to Busy */ -#define SMC_TIMINGS1_RBNSEL (0x7 << 28) /**< \brief (SMC_TIMINGS1) Ready/Busy Line Selection */ -#define SMC_TIMINGS1_NFSEL (0x1 << 31) /**< \brief (SMC_TIMINGS1) NAND Flash Selection */ -/* -------- SMC_MODE1 : (SMC Offset: 0x94) SMC MODE Register (CS_number = 1) -------- */ -#define SMC_MODE1_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE1) */ -#define SMC_MODE1_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE1) */ -#define SMC_MODE1_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE1) NWAIT Mode */ -#define SMC_MODE1_BAT (0x1 << 8) /**< \brief (SMC_MODE1) Byte Access Type */ -#define SMC_MODE1_DBW (0x1 << 12) /**< \brief (SMC_MODE1) Data Bus Width */ -#define SMC_MODE1_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE1) Data Float Time */ -#define SMC_MODE1_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE1) TDF Optimization */ -/* -------- SMC_SETUP2 : (SMC Offset: 0x98) SMC SETUP Register (CS_number = 2) -------- */ -#define SMC_SETUP2_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP2) NWE Setup length */ -#define SMC_SETUP2_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP2) NCS Setup length in Write access */ -#define SMC_SETUP2_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP2) NRD Setup length */ -#define SMC_SETUP2_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP2) NCS Setup length in Read access */ -/* -------- SMC_PULSE2 : (SMC Offset: 0x9C) SMC PULSE Register (CS_number = 2) -------- */ -#define SMC_PULSE2_NWE_PULSE (0x3f << 0) /**< \brief (SMC_PULSE2) NWE Pulse Length */ -#define SMC_PULSE2_NCS_WR_PULSE (0x3f << 8) /**< \brief (SMC_PULSE2) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE2_NRD_PULSE (0x3f << 16) /**< \brief (SMC_PULSE2) NRD Pulse Length */ -#define SMC_PULSE2_NCS_RD_PULSE (0x3f << 24) /**< \brief (SMC_PULSE2) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE2 : (SMC Offset: 0xA0) SMC CYCLE Register (CS_number = 2) -------- */ -#define SMC_CYCLE2_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE2) Total Write Cycle Length */ -#define SMC_CYCLE2_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE2) Total Read Cycle Length */ -/* -------- SMC_TIMINGS2 : (SMC Offset: 0xA4) SMC TIMINGS Register (CS_number = 2) -------- */ -#define SMC_TIMINGS2_TCLR (0xf << 0) /**< \brief (SMC_TIMINGS2) CLE to REN Low Delay */ -#define SMC_TIMINGS2_TADL (0xf << 4) /**< \brief (SMC_TIMINGS2) ALE to Data Start */ -#define SMC_TIMINGS2_TAR (0xf << 8) /**< \brief (SMC_TIMINGS2) ALE to REN Low Delay */ -#define SMC_TIMINGS2_OCMS (0x1 << 12) /**< \brief (SMC_TIMINGS2) Off Chip Memory Scrambling Enable */ -#define SMC_TIMINGS2_TRR (0xf << 16) /**< \brief (SMC_TIMINGS2) Ready to REN Low Delay */ -#define SMC_TIMINGS2_TWB (0xf << 24) /**< \brief (SMC_TIMINGS2) WEN High to REN to Busy */ -#define SMC_TIMINGS2_RBNSEL (0x7 << 28) /**< \brief (SMC_TIMINGS2) Ready/Busy Line Selection */ -#define SMC_TIMINGS2_NFSEL (0x1 << 31) /**< \brief (SMC_TIMINGS2) NAND Flash Selection */ -/* -------- SMC_MODE2 : (SMC Offset: 0xA8) SMC MODE Register (CS_number = 2) -------- */ -#define SMC_MODE2_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE2) */ -#define SMC_MODE2_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE2) */ -#define SMC_MODE2_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE2) NWAIT Mode */ -#define SMC_MODE2_BAT (0x1 << 8) /**< \brief (SMC_MODE2) Byte Access Type */ -#define SMC_MODE2_DBW (0x1 << 12) /**< \brief (SMC_MODE2) Data Bus Width */ -#define SMC_MODE2_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE2) Data Float Time */ -#define SMC_MODE2_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE2) TDF Optimization */ -/* -------- SMC_SETUP3 : (SMC Offset: 0xAC) SMC SETUP Register (CS_number = 3) -------- */ -#define SMC_SETUP3_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP3) NWE Setup length */ -#define SMC_SETUP3_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP3) NCS Setup length in Write access */ -#define SMC_SETUP3_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP3) NRD Setup length */ -#define SMC_SETUP3_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP3) NCS Setup length in Read access */ -/* -------- SMC_PULSE3 : (SMC Offset: 0xB0) SMC PULSE Register (CS_number = 3) -------- */ -#define SMC_PULSE3_NWE_PULSE (0x3f << 0) /**< \brief (SMC_PULSE3) NWE Pulse Length */ -#define SMC_PULSE3_NCS_WR_PULSE (0x3f << 8) /**< \brief (SMC_PULSE3) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE3_NRD_PULSE (0x3f << 16) /**< \brief (SMC_PULSE3) NRD Pulse Length */ -#define SMC_PULSE3_NCS_RD_PULSE (0x3f << 24) /**< \brief (SMC_PULSE3) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE3 : (SMC Offset: 0xB4) SMC CYCLE Register (CS_number = 3) -------- */ -#define SMC_CYCLE3_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE3) Total Write Cycle Length */ -#define SMC_CYCLE3_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE3) Total Read Cycle Length */ -/* -------- SMC_TIMINGS3 : (SMC Offset: 0xB8) SMC TIMINGS Register (CS_number = 3) -------- */ -#define SMC_TIMINGS3_TCLR (0xf << 0) /**< \brief (SMC_TIMINGS3) CLE to REN Low Delay */ -#define SMC_TIMINGS3_TADL (0xf << 4) /**< \brief (SMC_TIMINGS3) ALE to Data Start */ -#define SMC_TIMINGS3_TAR (0xf << 8) /**< \brief (SMC_TIMINGS3) ALE to REN Low Delay */ -#define SMC_TIMINGS3_OCMS (0x1 << 12) /**< \brief (SMC_TIMINGS3) Off Chip Memory Scrambling Enable */ -#define SMC_TIMINGS3_TRR (0xf << 16) /**< \brief (SMC_TIMINGS3) Ready to REN Low Delay */ -#define SMC_TIMINGS3_TWB (0xf << 24) /**< \brief (SMC_TIMINGS3) WEN High to REN to Busy */ -#define SMC_TIMINGS3_RBNSEL (0x7 << 28) /**< \brief (SMC_TIMINGS3) Ready/Busy Line Selection */ -#define SMC_TIMINGS3_NFSEL (0x1 << 31) /**< \brief (SMC_TIMINGS3) NAND Flash Selection */ -/* -------- SMC_MODE3 : (SMC Offset: 0xBC) SMC MODE Register (CS_number = 3) -------- */ -#define SMC_MODE3_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE3) */ -#define SMC_MODE3_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE3) */ -#define SMC_MODE3_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE3) NWAIT Mode */ -#define SMC_MODE3_BAT (0x1 << 8) /**< \brief (SMC_MODE3) Byte Access Type */ -#define SMC_MODE3_DBW (0x1 << 12) /**< \brief (SMC_MODE3) Data Bus Width */ -#define SMC_MODE3_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE3) Data Float Time */ -#define SMC_MODE3_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE3) TDF Optimization */ -/* -------- SMC_OCMS : (SMC Offset: 0x110) SMC OCMS MODE Register -------- */ -#define SMC_OCMS_SMSE (0x1 << 0) /**< \brief (SMC_OCMS) Static Memory Controller Scrambling Enable */ -#define SMC_OCMS_SRSE (0x1 << 1) /**< \brief (SMC_OCMS) SRAM Scrambling Enable */ -/* -------- SMC_KEY1 : (SMC Offset: 0x114) SMC KEY1 Register -------- */ -#define SMC_KEY1_KEY1 (0xffffffff << 0) /**< \brief (SMC_KEY1) Off Chip Memory Scrambling (OCMS) Key Part 1 */ -/* -------- SMC_KEY2 : (SMC Offset: 0x118) SMC KEY2 Register -------- */ -#define SMC_KEY2_KEY2 (0xffffffff << 0) /**< \brief (SMC_KEY2) Off Chip Memory Scrambling (OCMS) Key Part 2 */ -/* -------- SMC_WPCR : (SMC Offset: 0x1E4) Write Protection Control Register -------- */ -#define SMC_WPCR_WP_EN (0x1 << 0) /**< \brief (SMC_WPCR) */ -#define SMC_WPCR_WP_KEY (0xffffff << 8) /**< \brief (SMC_WPCR) Write Protection KEY password */ -/* -------- SMC_WPSR : (SMC Offset: 0x1E8) Write Protection Status Register -------- */ -#define SMC_WPSR_WP_VS (0xf << 0) /**< \brief (SMC_WPSR) Write Protection Violation Status */ -#define SMC_WPSR_WP_VSRC (0xffff << 8) /**< \brief (SMC_WPSR) Write Protection Violation SouRCe */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Serial Peripheral Interface */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_SPI Serial Peripheral Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Spi hardware registers */ -typedef struct { - WoReg SPI_CR; /**< \brief (Spi Offset: 0x00) Control Register */ - RwReg SPI_MR; /**< \brief (Spi Offset: 0x04) Mode Register */ - RoReg SPI_RDR; /**< \brief (Spi Offset: 0x08) Receive Data Register */ - WoReg SPI_TDR; /**< \brief (Spi Offset: 0x0C) Transmit Data Register */ - RoReg SPI_SR; /**< \brief (Spi Offset: 0x10) Status Register */ - WoReg SPI_IER; /**< \brief (Spi Offset: 0x14) Interrupt Enable Register */ - WoReg SPI_IDR; /**< \brief (Spi Offset: 0x18) Interrupt Disable Register */ - RoReg SPI_IMR; /**< \brief (Spi Offset: 0x1C) Interrupt Mask Register */ - RwReg Reserved1[4]; - RwReg SPI_CSR[4]; /**< \brief (Spi Offset: 0x30) Chip Select Register */ - RwReg Reserved2[41]; - RwReg SPI_WPCR; /**< \brief (Spi Offset: 0xE4) Write Protection Control Register */ - RoReg SPI_WPSR; /**< \brief (Spi Offset: 0xE8) Write Protection Status Register */ -} Spi; -#endif /* __ASSEMBLY__ */ -/* -------- SPI_CR : (SPI Offset: 0x00) Control Register -------- */ -#define SPI_CR_SPIEN (0x1 << 0) /**< \brief (SPI_CR) SPI Enable */ -#define SPI_CR_SPIDIS (0x1 << 1) /**< \brief (SPI_CR) SPI Disable */ -#define SPI_CR_SWRST (0x1 << 7) /**< \brief (SPI_CR) SPI Software Reset */ -#define SPI_CR_LASTXFER (0x1 << 24) /**< \brief (SPI_CR) Last Transfer */ -/* -------- SPI_MR : (SPI Offset: 0x04) Mode Register -------- */ -#define SPI_MR_MSTR (0x1 << 0) /**< \brief (SPI_MR) Master/Slave Mode */ -#define SPI_MR_PS (0x1 << 1) /**< \brief (SPI_MR) Peripheral Select */ -#define SPI_MR_PS_FIXED (0x0 << 1) /**< \brief (SPI_MR) Fixed Peripheral Select. */ -#define SPI_MR_PS_VARIABLE (0x1 << 1) /**< \brief (SPI_MR) Variable Peripheral Select. */ -#define SPI_MR_PCSDEC (0x1 << 2) /**< \brief (SPI_MR) Chip Select Decode */ -#define SPI_MR_MODFDIS (0x1 << 4) /**< \brief (SPI_MR) Mode Fault Detection */ -#define SPI_MR_WDRBT (0x1 << 5) /**< \brief (SPI_MR) Wait Data Read Before Transfer */ -#define SPI_MR_LLB (0x1 << 7) /**< \brief (SPI_MR) Local Loopback Enable */ -#define SPI_MR_PCS (0xf << 16) /**< \brief (SPI_MR) Peripheral Chip Select */ -#define SPI_MR_DLYBCS (0xff << 24) /**< \brief (SPI_MR) Delay Between Chip Selects */ -/* -------- SPI_RDR : (SPI Offset: 0x08) Receive Data Register -------- */ -#define SPI_RDR_RD (0xffff << 0) /**< \brief (SPI_RDR) Receive Data */ -#define SPI_RDR_PCS (0xf << 16) /**< \brief (SPI_RDR) Peripheral Chip Select */ -/* -------- SPI_TDR : (SPI Offset: 0x0C) Transmit Data Register -------- */ -#define SPI_TDR_TD (0xffff << 0) /**< \brief (SPI_TDR) Transmit Data */ -#define SPI_TDR_PCS (0xf << 16) /**< \brief (SPI_TDR) Peripheral Chip Select */ -#define SPI_TDR_LASTXFER (0x1 << 24) /**< \brief (SPI_TDR) Last Transfer */ -/* -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- */ -#define SPI_SR_RDRF (0x1 << 0) /**< \brief (SPI_SR) Receive Data Register Full */ -#define SPI_SR_TDRE (0x1 << 1) /**< \brief (SPI_SR) Transmit Data Register Empty */ -#define SPI_SR_MODF (0x1 << 2) /**< \brief (SPI_SR) Mode Fault Error */ -#define SPI_SR_OVRES (0x1 << 3) /**< \brief (SPI_SR) Overrun Error Status */ -#define SPI_SR_RXBUFF (0x1 << 6) /**< \brief (SPI_SR) */ -#define SPI_SR_NSSR (0x1 << 8) /**< \brief (SPI_SR) NSS Rising */ -#define SPI_SR_TXEMPTY (0x1 << 9) /**< \brief (SPI_SR) Transmission Registers Empty */ -#define SPI_SR_UNDES (0x1 << 10) /**< \brief (SPI_SR) Underrun Error Status (Slave Mode Only) */ -#define SPI_SR_SPIENS (0x1 << 16) /**< \brief (SPI_SR) SPI Enable Status */ -/* -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- */ -#define SPI_IER_RDRF (0x1 << 0) /**< \brief (SPI_IER) Receive Data Register Full Interrupt Enable */ -#define SPI_IER_TDRE (0x1 << 1) /**< \brief (SPI_IER) SPI Transmit Data Register Empty Interrupt Enable */ -#define SPI_IER_MODF (0x1 << 2) /**< \brief (SPI_IER) Mode Fault Error Interrupt Enable */ -#define SPI_IER_OVRES (0x1 << 3) /**< \brief (SPI_IER) Overrun Error Interrupt Enable */ -#define SPI_IER_RXBUFF (0x1 << 6) /**< \brief (SPI_IER) */ -#define SPI_IER_NSSR (0x1 << 8) /**< \brief (SPI_IER) NSS Rising Interrupt Enable */ -#define SPI_IER_TXEMPTY (0x1 << 9) /**< \brief (SPI_IER) Transmission Registers Empty Enable */ -#define SPI_IER_UNDES (0x1 << 10) /**< \brief (SPI_IER) Underrun Error Interrupt Enable */ -/* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- */ -#define SPI_IDR_RDRF (0x1 << 0) /**< \brief (SPI_IDR) Receive Data Register Full Interrupt Disable */ -#define SPI_IDR_TDRE (0x1 << 1) /**< \brief (SPI_IDR) SPI Transmit Data Register Empty Interrupt Disable */ -#define SPI_IDR_MODF (0x1 << 2) /**< \brief (SPI_IDR) Mode Fault Error Interrupt Disable */ -#define SPI_IDR_OVRES (0x1 << 3) /**< \brief (SPI_IDR) Overrun Error Interrupt Disable */ -#define SPI_IDR_RXBUFF (0x1 << 6) /**< \brief (SPI_IDR) */ -#define SPI_IDR_NSSR (0x1 << 8) /**< \brief (SPI_IDR) NSS Rising Interrupt Disable */ -#define SPI_IDR_TXEMPTY (0x1 << 9) /**< \brief (SPI_IDR) Transmission Registers Empty Disable */ -#define SPI_IDR_UNDES (0x1 << 10) /**< \brief (SPI_IDR) Underrun Error Interrupt Disable */ -/* -------- SPI_IMR : (SPI Offset: 0x1C) Interrupt Mask Register -------- */ -#define SPI_IMR_RDRF (0x1 << 0) /**< \brief (SPI_IMR) Receive Data Register Full Interrupt Mask */ -#define SPI_IMR_TDRE (0x1 << 1) /**< \brief (SPI_IMR) SPI Transmit Data Register Empty Interrupt Mask */ -#define SPI_IMR_MODF (0x1 << 2) /**< \brief (SPI_IMR) Mode Fault Error Interrupt Mask */ -#define SPI_IMR_OVRES (0x1 << 3) /**< \brief (SPI_IMR) Overrun Error Interrupt Mask */ -#define SPI_IMR_RXBUFF (0x1 << 6) /**< \brief (SPI_IMR) */ -#define SPI_IMR_NSSR (0x1 << 8) /**< \brief (SPI_IMR) NSS Rising Interrupt Mask */ -#define SPI_IMR_TXEMPTY (0x1 << 9) /**< \brief (SPI_IMR) Transmission Registers Empty Mask */ -#define SPI_IMR_UNDES (0x1 << 10) /**< \brief (SPI_IMR) Underrun Error Interrupt Mask */ -/* -------- SPI_CSR[4] : (SPI Offset: 0x30) Chip Select Register -------- */ -#define SPI_CSR_CPOL (0x1 << 0) /**< \brief (SPI_CSR[4]) Clock Polarity */ -#define SPI_CSR_NCPHA (0x1 << 1) /**< \brief (SPI_CSR[4]) Clock Phase */ -#define SPI_CSR_CSNAAT (0x1 << 2) /**< \brief (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ -#define SPI_CSR_CSAAT (0x1 << 3) /**< \brief (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ -#define SPI_CSR_BITS (0xf << 4) /**< \brief (SPI_CSR[4]) Bits Per Transfer (See the (Note:) below the register table; Section 9.9 "SPI Chip Select Register" on page 37.) */ -#define SPI_CSR_BITS_8 (0x0 << 4) /**< \brief (SPI_CSR[4]) 8 */ -#define SPI_CSR_BITS_9 (0x1 << 4) /**< \brief (SPI_CSR[4]) 9 */ -#define SPI_CSR_BITS_10 (0x2 << 4) /**< \brief (SPI_CSR[4]) 10 */ -#define SPI_CSR_BITS_11 (0x3 << 4) /**< \brief (SPI_CSR[4]) 11 */ -#define SPI_CSR_BITS_12 (0x4 << 4) /**< \brief (SPI_CSR[4]) 12 */ -#define SPI_CSR_BITS_13 (0x5 << 4) /**< \brief (SPI_CSR[4]) 13 */ -#define SPI_CSR_BITS_14 (0x6 << 4) /**< \brief (SPI_CSR[4]) 14 */ -#define SPI_CSR_BITS_15 (0x7 << 4) /**< \brief (SPI_CSR[4]) 15 */ -#define SPI_CSR_BITS_16 (0x8 << 4) /**< \brief (SPI_CSR[4]) 16 */ -#define SPI_CSR_SCBR (0xff << 8) /**< \brief (SPI_CSR[4]) Serial Clock Baud Rate */ -#define SPI_CSR_DLYBS (0xff << 16) /**< \brief (SPI_CSR[4]) Delay Before SPCK */ -#define SPI_CSR_DLYBCT (0xff << 24) /**< \brief (SPI_CSR[4]) Delay Between Consecutive Transfers */ -/* -------- SPI_WPCR : (SPI Offset: 0xE4) Write Protection Control Register -------- */ -#define SPI_WPCR_SPIWPEN (0x1 << 0) /**< \brief (SPI_WPCR) SPI Write Protection Enable */ -#define SPI_WPCR_SPIWPKEY (0xffffff << 8) /**< \brief (SPI_WPCR) SPI Write Protection Key Password */ -/* -------- SPI_WPSR : (SPI Offset: 0xE8) Write Protection Status Register -------- */ -#define SPI_WPSR_SPIWPVS (0x7 << 0) /**< \brief (SPI_WPSR) SPI Write Protection Violation Status */ -#define SPI_WPSR_SPIWPVSRC (0xff << 8) /**< \brief (SPI_WPSR) SPI Write Protection Violation Source */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Synchronous Serial Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_SSC Synchronous Serial Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Ssc hardware registers */ -typedef struct { - WoReg SSC_CR; /**< \brief (Ssc Offset: 0x0) Control Register */ - RwReg SSC_CMR; /**< \brief (Ssc Offset: 0x4) Clock Mode Register */ - RwReg Reserved1[2]; - RwReg SSC_RCMR; /**< \brief (Ssc Offset: 0x10) Receive Clock Mode Register */ - RwReg SSC_RFMR; /**< \brief (Ssc Offset: 0x14) Receive Frame Mode Register */ - RwReg SSC_TCMR; /**< \brief (Ssc Offset: 0x18) Transmit Clock Mode Register */ - RwReg SSC_TFMR; /**< \brief (Ssc Offset: 0x1C) Transmit Frame Mode Register */ - RoReg SSC_RHR; /**< \brief (Ssc Offset: 0x20) Receive Holding Register */ - WoReg SSC_THR; /**< \brief (Ssc Offset: 0x24) Transmit Holding Register */ - RwReg Reserved2[2]; - RoReg SSC_RSHR; /**< \brief (Ssc Offset: 0x30) Receive Sync. Holding Register */ - RwReg SSC_TSHR; /**< \brief (Ssc Offset: 0x34) Transmit Sync. Holding Register */ - RwReg SSC_RC0R; /**< \brief (Ssc Offset: 0x38) Receive Compare 0 Register */ - RwReg SSC_RC1R; /**< \brief (Ssc Offset: 0x3C) Receive Compare 1 Register */ - RoReg SSC_SR; /**< \brief (Ssc Offset: 0x40) Status Register */ - WoReg SSC_IER; /**< \brief (Ssc Offset: 0x44) Interrupt Enable Register */ - WoReg SSC_IDR; /**< \brief (Ssc Offset: 0x48) Interrupt Disable Register */ - RoReg SSC_IMR; /**< \brief (Ssc Offset: 0x4C) Interrupt Mask Register */ - RwReg Reserved3[37]; - RwReg SSC_WPMR; /**< \brief (Ssc Offset: 0xE4) Write Protect Mode Register */ - RoReg SSC_WPSR; /**< \brief (Ssc Offset: 0xE8) Write Protect Status Register */ -} Ssc; -#endif /* __ASSEMBLY__ */ -/* -------- SSC_CR : (SSC Offset: 0x0) Control Register -------- */ -#define SSC_CR_RXEN (0x1 << 0) /**< \brief (SSC_CR) Receive Enable */ -#define SSC_CR_RXDIS (0x1 << 1) /**< \brief (SSC_CR) Receive Disable */ -#define SSC_CR_TXEN (0x1 << 8) /**< \brief (SSC_CR) Transmit Enable */ -#define SSC_CR_TXDIS (0x1 << 9) /**< \brief (SSC_CR) Transmit Disable */ -#define SSC_CR_SWRST (0x1 << 15) /**< \brief (SSC_CR) Software Reset */ -/* -------- SSC_CMR : (SSC Offset: 0x4) Clock Mode Register -------- */ -#define SSC_CMR_DIV (0xfff << 0) /**< \brief (SSC_CMR) Clock Divider */ -/* -------- SSC_RCMR : (SSC Offset: 0x10) Receive Clock Mode Register -------- */ -#define SSC_RCMR_CKS (0x3 << 0) /**< \brief (SSC_RCMR) Receive Clock Selection */ -#define SSC_RCMR_CKS_DIV (0x0 << 0) /**< \brief (SSC_RCMR) Divided Clock */ -#define SSC_RCMR_CKS_TK (0x1 << 0) /**< \brief (SSC_RCMR) TK Clock signal */ -#define SSC_RCMR_CKS_RK (0x2 << 0) /**< \brief (SSC_RCMR) RK pin */ -#define SSC_RCMR_CKO (0x7 << 2) /**< \brief (SSC_RCMR) Receive Clock Output Mode Selection */ -#define SSC_RCMR_CKI (0x1 << 5) /**< \brief (SSC_RCMR) Receive Clock Inversion */ -#define SSC_RCMR_CKG (0x3 << 6) /**< \brief (SSC_RCMR) Receive Clock Gating Selection */ -#define SSC_RCMR_CKG_NONE (0x0 << 6) /**< \brief (SSC_RCMR) None, continuous clock */ -#define SSC_RCMR_CKG_LOW (0x1 << 6) /**< \brief (SSC_RCMR) Receive Clock enabled only if RF Low */ -#define SSC_RCMR_CKG_HIGH (0x2 << 6) /**< \brief (SSC_RCMR) Receive Clock enabled only if RF High */ -#define SSC_RCMR_START (0xf << 8) /**< \brief (SSC_RCMR) Receive Start Selection */ -#define SSC_RCMR_STOP (0x1 << 12) /**< \brief (SSC_RCMR) Receive Stop Selection */ -#define SSC_RCMR_STTDLY (0xff << 16) /**< \brief (SSC_RCMR) Receive Start Delay */ -#define SSC_RCMR_PERIOD (0xff << 24) /**< \brief (SSC_RCMR) Receive Period Divider Selection */ -/* -------- SSC_RFMR : (SSC Offset: 0x14) Receive Frame Mode Register -------- */ -#define SSC_RFMR_DATLEN (0x1f << 0) /**< \brief (SSC_RFMR) Data Length */ -#define SSC_RFMR_LOOP (0x1 << 5) /**< \brief (SSC_RFMR) Loop Mode */ -#define SSC_RFMR_MSBF (0x1 << 7) /**< \brief (SSC_RFMR) Most Significant Bit First */ -#define SSC_RFMR_DATNB (0xf << 8) /**< \brief (SSC_RFMR) Data Number per Frame */ -#define SSC_RFMR_FSLEN (0xf << 16) /**< \brief (SSC_RFMR) Receive Frame Sync Length */ -#define SSC_RFMR_FSOS (0x7 << 20) /**< \brief (SSC_RFMR) Receive Frame Sync Output Selection */ -#define SSC_RFMR_FSEDGE (0x1 << 24) /**< \brief (SSC_RFMR) Frame Sync Edge Detection */ -#define SSC_RFMR_FSLEN_EXT (0xf << 28) /**< \brief (SSC_RFMR) FSLEN Field Extension */ -/* -------- SSC_TCMR : (SSC Offset: 0x18) Transmit Clock Mode Register -------- */ -#define SSC_TCMR_CKS (0x3 << 0) /**< \brief (SSC_TCMR) Transmit Clock Selection */ -#define SSC_TCMR_CKO (0x7 << 2) /**< \brief (SSC_TCMR) Transmit Clock Output Mode Selection */ -#define SSC_TCMR_CKI (0x1 << 5) /**< \brief (SSC_TCMR) Transmit Clock Inversion */ -#define SSC_TCMR_CKG (0x3 << 6) /**< \brief (SSC_TCMR) Transmit Clock Gating Selection */ -#define SSC_TCMR_START (0xf << 8) /**< \brief (SSC_TCMR) Transmit Start Selection */ -#define SSC_TCMR_STTDLY (0xff << 16) /**< \brief (SSC_TCMR) Transmit Start Delay */ -#define SSC_TCMR_PERIOD (0xff << 24) /**< \brief (SSC_TCMR) Transmit Period Divider Selection */ -/* -------- SSC_TFMR : (SSC Offset: 0x1C) Transmit Frame Mode Register -------- */ -#define SSC_TFMR_DATLEN (0x1f << 0) /**< \brief (SSC_TFMR) Data Length */ -#define SSC_TFMR_DATDEF (0x1 << 5) /**< \brief (SSC_TFMR) Data Default Value */ -#define SSC_TFMR_MSBF (0x1 << 7) /**< \brief (SSC_TFMR) Most Significant Bit First */ -#define SSC_TFMR_DATNB (0xf << 8) /**< \brief (SSC_TFMR) Data Number per frame */ -#define SSC_TFMR_FSLEN (0xf << 16) /**< \brief (SSC_TFMR) Transmit Frame Syn Length */ -#define SSC_TFMR_FSOS (0x7 << 20) /**< \brief (SSC_TFMR) Transmit Frame Sync Output Selection */ -#define SSC_TFMR_FSDEN (0x1 << 23) /**< \brief (SSC_TFMR) Frame Sync Data Enable */ -#define SSC_TFMR_FSEDGE (0x1 << 24) /**< \brief (SSC_TFMR) Frame Sync Edge Detection */ -#define SSC_TFMR_FSLEN_EXT (0xf << 28) /**< \brief (SSC_TFMR) FSLEN Field Extension */ -/* -------- SSC_RHR : (SSC Offset: 0x20) Receive Holding Register -------- */ -#define SSC_RHR_RDAT (0xffffffff << 0) /**< \brief (SSC_RHR) Receive Data */ -/* -------- SSC_THR : (SSC Offset: 0x24) Transmit Holding Register -------- */ -#define SSC_THR_TDAT (0xffffffff << 0) /**< \brief (SSC_THR) Transmit Data */ -/* -------- SSC_RSHR : (SSC Offset: 0x30) Receive Sync. Holding Register -------- */ -#define SSC_RSHR_RSDAT (0xffff << 0) /**< \brief (SSC_RSHR) Receive Synchronization Data */ -/* -------- SSC_TSHR : (SSC Offset: 0x34) Transmit Sync. Holding Register -------- */ -#define SSC_TSHR_TSDAT (0xffff << 0) /**< \brief (SSC_TSHR) Transmit Synchronization Data */ -/* -------- SSC_RC0R : (SSC Offset: 0x38) Receive Compare 0 Register -------- */ -#define SSC_RC0R_CP0 (0xffff << 0) /**< \brief (SSC_RC0R) Receive Compare Data 0 */ -/* -------- SSC_RC1R : (SSC Offset: 0x3C) Receive Compare 1 Register -------- */ -#define SSC_RC1R_CP1 (0xffff << 0) /**< \brief (SSC_RC1R) Receive Compare Data 1 */ -/* -------- SSC_SR : (SSC Offset: 0x40) Status Register -------- */ -#define SSC_SR_TXRDY (0x1 << 0) /**< \brief (SSC_SR) Transmit Ready */ -#define SSC_SR_TXEMPTY (0x1 << 1) /**< \brief (SSC_SR) Transmit Empty */ -#define SSC_SR_ENDTX (0x1 << 2) /**< \brief (SSC_SR) End of Transmission */ -#define SSC_SR_TXBUFE (0x1 << 3) /**< \brief (SSC_SR) Transmit Buffer Empty */ -#define SSC_SR_RXRDY (0x1 << 4) /**< \brief (SSC_SR) Receive Ready */ -#define SSC_SR_OVRUN (0x1 << 5) /**< \brief (SSC_SR) Receive Overrun */ -#define SSC_SR_ENDRX (0x1 << 6) /**< \brief (SSC_SR) End of Reception */ -#define SSC_SR_RXBUFF (0x1 << 7) /**< \brief (SSC_SR) Receive Buffer Full */ -#define SSC_SR_CP0 (0x1 << 8) /**< \brief (SSC_SR) Compare 0 */ -#define SSC_SR_CP1 (0x1 << 9) /**< \brief (SSC_SR) Compare 1 */ -#define SSC_SR_TXSYN (0x1 << 10) /**< \brief (SSC_SR) Transmit Sync */ -#define SSC_SR_RXSYN (0x1 << 11) /**< \brief (SSC_SR) Receive Sync */ -#define SSC_SR_TXEN (0x1 << 16) /**< \brief (SSC_SR) Transmit Enable */ -#define SSC_SR_RXEN (0x1 << 17) /**< \brief (SSC_SR) Receive Enable */ -/* -------- SSC_IER : (SSC Offset: 0x44) Interrupt Enable Register -------- */ -#define SSC_IER_TXRDY (0x1 << 0) /**< \brief (SSC_IER) Transmit Ready Interrupt Enable */ -#define SSC_IER_TXEMPTY (0x1 << 1) /**< \brief (SSC_IER) Transmit Empty Interrupt Enable */ -#define SSC_IER_ENDTX (0x1 << 2) /**< \brief (SSC_IER) End of Transmission Interrupt Enable */ -#define SSC_IER_TXBUFE (0x1 << 3) /**< \brief (SSC_IER) Transmit Buffer Empty Interrupt Enable */ -#define SSC_IER_RXRDY (0x1 << 4) /**< \brief (SSC_IER) Receive Ready Interrupt Enable */ -#define SSC_IER_OVRUN (0x1 << 5) /**< \brief (SSC_IER) Receive Overrun Interrupt Enable */ -#define SSC_IER_ENDRX (0x1 << 6) /**< \brief (SSC_IER) End of Reception Interrupt Enable */ -#define SSC_IER_RXBUFF (0x1 << 7) /**< \brief (SSC_IER) Receive Buffer Full Interrupt Enable */ -#define SSC_IER_CP0 (0x1 << 8) /**< \brief (SSC_IER) Compare 0 Interrupt Enable */ -#define SSC_IER_CP1 (0x1 << 9) /**< \brief (SSC_IER) Compare 1 Interrupt Enable */ -#define SSC_IER_TXSYN (0x1 << 10) /**< \brief (SSC_IER) Tx Sync Interrupt Enable */ -#define SSC_IER_RXSYN (0x1 << 11) /**< \brief (SSC_IER) Rx Sync Interrupt Enable */ -/* -------- SSC_IDR : (SSC Offset: 0x48) Interrupt Disable Register -------- */ -#define SSC_IDR_TXRDY (0x1 << 0) /**< \brief (SSC_IDR) Transmit Ready Interrupt Disable */ -#define SSC_IDR_TXEMPTY (0x1 << 1) /**< \brief (SSC_IDR) Transmit Empty Interrupt Disable */ -#define SSC_IDR_ENDTX (0x1 << 2) /**< \brief (SSC_IDR) End of Transmission Interrupt Disable */ -#define SSC_IDR_TXBUFE (0x1 << 3) /**< \brief (SSC_IDR) Transmit Buffer Empty Interrupt Disable */ -#define SSC_IDR_RXRDY (0x1 << 4) /**< \brief (SSC_IDR) Receive Ready Interrupt Disable */ -#define SSC_IDR_OVRUN (0x1 << 5) /**< \brief (SSC_IDR) Receive Overrun Interrupt Disable */ -#define SSC_IDR_ENDRX (0x1 << 6) /**< \brief (SSC_IDR) End of Reception Interrupt Disable */ -#define SSC_IDR_RXBUFF (0x1 << 7) /**< \brief (SSC_IDR) Receive Buffer Full Interrupt Disable */ -#define SSC_IDR_CP0 (0x1 << 8) /**< \brief (SSC_IDR) Compare 0 Interrupt Disable */ -#define SSC_IDR_CP1 (0x1 << 9) /**< \brief (SSC_IDR) Compare 1 Interrupt Disable */ -#define SSC_IDR_TXSYN (0x1 << 10) /**< \brief (SSC_IDR) Tx Sync Interrupt Enable */ -#define SSC_IDR_RXSYN (0x1 << 11) /**< \brief (SSC_IDR) Rx Sync Interrupt Enable */ -/* -------- SSC_IMR : (SSC Offset: 0x4C) Interrupt Mask Register -------- */ -#define SSC_IMR_TXRDY (0x1 << 0) /**< \brief (SSC_IMR) Transmit Ready Interrupt Mask */ -#define SSC_IMR_TXEMPTY (0x1 << 1) /**< \brief (SSC_IMR) Transmit Empty Interrupt Mask */ -#define SSC_IMR_ENDTX (0x1 << 2) /**< \brief (SSC_IMR) End of Transmission Interrupt Mask */ -#define SSC_IMR_TXBUFE (0x1 << 3) /**< \brief (SSC_IMR) Transmit Buffer Empty Interrupt Mask */ -#define SSC_IMR_RXRDY (0x1 << 4) /**< \brief (SSC_IMR) Receive Ready Interrupt Mask */ -#define SSC_IMR_OVRUN (0x1 << 5) /**< \brief (SSC_IMR) Receive Overrun Interrupt Mask */ -#define SSC_IMR_ENDRX (0x1 << 6) /**< \brief (SSC_IMR) End of Reception Interrupt Mask */ -#define SSC_IMR_RXBUFF (0x1 << 7) /**< \brief (SSC_IMR) Receive Buffer Full Interrupt Mask */ -#define SSC_IMR_CP0 (0x1 << 8) /**< \brief (SSC_IMR) Compare 0 Interrupt Mask */ -#define SSC_IMR_CP1 (0x1 << 9) /**< \brief (SSC_IMR) Compare 1 Interrupt Mask */ -#define SSC_IMR_TXSYN (0x1 << 10) /**< \brief (SSC_IMR) Tx Sync Interrupt Mask */ -#define SSC_IMR_RXSYN (0x1 << 11) /**< \brief (SSC_IMR) Rx Sync Interrupt Mask */ -/* -------- SSC_WPMR : (SSC Offset: 0xE4) Write Protect Mode Register -------- */ -#define SSC_WPMR_WPEN (0x1 << 0) /**< \brief (SSC_WPMR) Write Protect Enable */ -#define SSC_WPMR_WPKEY (0xffffff << 8) /**< \brief (SSC_WPMR) Write Protect KEY */ -/* -------- SSC_WPSR : (SSC Offset: 0xE8) Write Protect Status Register -------- */ -#define SSC_WPSR_WPVS (0x1 << 0) /**< \brief (SSC_WPSR) Write Protect Violation Status */ -#define SSC_WPSR_WPVSRC (0xffff << 8) /**< \brief (SSC_WPSR) Write Protect Violation Source */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Supply Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_SUPC Supply Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Supc hardware registers */ -typedef struct { - WoReg SUPC_CR; /**< \brief (Supc Offset: 0x00) Supply Controller Control Register */ - RwReg SUPC_SMMR; /**< \brief (Supc Offset: 0x04) Supply Controller Supply Monitor Mode Register */ - RwReg SUPC_MR; /**< \brief (Supc Offset: 0x08) Supply Controller Mode Register */ - RwReg SUPC_WUMR; /**< \brief (Supc Offset: 0x0C) Supply Controller Wake Up Mode Register */ - RwReg SUPC_WUIR; /**< \brief (Supc Offset: 0x10) Supply Controller Wake Up Inputs Register */ - RoReg SUPC_SR; /**< \brief (Supc Offset: 0x14) Supply Controller Status Register */ -} Supc; -#endif /* __ASSEMBLY__ */ -/* -------- SUPC_CR : (SUPC Offset: 0x00) Supply Controller Control Register -------- */ -#define SUPC_CR_VROFF (0x1 << 2) /**< \brief (SUPC_CR) Voltage Regulator Off */ -#define SUPC_CR_VROFF_NO_EFFECT (0x0 << 2) /**< \brief (SUPC_CR) no effect. */ -#define SUPC_CR_VROFF_STOP_VREG (0x1 << 2) /**< \brief (SUPC_CR) if KEY is correct, asserts vddcore_nreset and stops the voltage regulator. */ -#define SUPC_CR_XTALSEL (0x1 << 3) /**< \brief (SUPC_CR) Crystal Oscillator Select */ -#define SUPC_CR_XTALSEL_NO_EFFECT (0x0 << 3) /**< \brief (SUPC_CR) no effect. */ -#define SUPC_CR_XTALSEL_CRYSTAL_SEL (0x1 << 3) /**< \brief (SUPC_CR) if KEY is correct, switches the slow clock on the crystal oscillator output. */ -#define SUPC_CR_KEY (0xff << 24) /**< \brief (SUPC_CR) Password */ -/* -------- SUPC_SMMR : (SUPC Offset: 0x04) Supply Controller Supply Monitor Mode Register -------- */ -#define SUPC_SMMR_SMTH (0xf << 0) /**< \brief (SUPC_SMMR) Supply Monitor Threshold */ -#define SUPC_SMMR_SMTH_1_9V (0x0 << 0) /**< \brief (SUPC_SMMR) 1.9 V */ -#define SUPC_SMMR_SMTH_2_0V (0x1 << 0) /**< \brief (SUPC_SMMR) 2.0 V */ -#define SUPC_SMMR_SMTH_2_1V (0x2 << 0) /**< \brief (SUPC_SMMR) 2.1 V */ -#define SUPC_SMMR_SMTH_2_2V (0x3 << 0) /**< \brief (SUPC_SMMR) 2.2 V */ -#define SUPC_SMMR_SMTH_2_3V (0x4 << 0) /**< \brief (SUPC_SMMR) 2.3 V */ -#define SUPC_SMMR_SMTH_2_4V (0x5 << 0) /**< \brief (SUPC_SMMR) 2.4 V */ -#define SUPC_SMMR_SMTH_2_5V (0x6 << 0) /**< \brief (SUPC_SMMR) 2.5 V */ -#define SUPC_SMMR_SMTH_2_6V (0x7 << 0) /**< \brief (SUPC_SMMR) 2.6 V */ -#define SUPC_SMMR_SMTH_2_7V (0x8 << 0) /**< \brief (SUPC_SMMR) 2.7 V */ -#define SUPC_SMMR_SMTH_2_8V (0x9 << 0) /**< \brief (SUPC_SMMR) 2.8 V */ -#define SUPC_SMMR_SMTH_2_9V (0xA << 0) /**< \brief (SUPC_SMMR) 2.9 V */ -#define SUPC_SMMR_SMTH_3_0V (0xB << 0) /**< \brief (SUPC_SMMR) 3.0 V */ -#define SUPC_SMMR_SMTH_3_1V (0xC << 0) /**< \brief (SUPC_SMMR) 3.1 V */ -#define SUPC_SMMR_SMTH_3_2V (0xD << 0) /**< \brief (SUPC_SMMR) 3.2 V */ -#define SUPC_SMMR_SMTH_3_3V (0xE << 0) /**< \brief (SUPC_SMMR) 3.3 V */ -#define SUPC_SMMR_SMTH_3_4V (0xF << 0) /**< \brief (SUPC_SMMR) 3.4 V */ -#define SUPC_SMMR_SMSMPL (0x7 << 8) /**< \brief (SUPC_SMMR) Supply Monitor Sampling Period */ -#define SUPC_SMMR_SMSMPL_SMD (0x0 << 8) /**< \brief (SUPC_SMMR) Supply Monitor disabled */ -#define SUPC_SMMR_SMSMPL_CSM (0x1 << 8) /**< \brief (SUPC_SMMR) Continuous Supply Monitor */ -#define SUPC_SMMR_SMSMPL_32SLCK (0x2 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 32 SLCK periods */ -#define SUPC_SMMR_SMSMPL_256SLCK (0x3 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 256 SLCK periods */ -#define SUPC_SMMR_SMSMPL_2048SLCK (0x4 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 2,048 SLCK periods */ -#define SUPC_SMMR_SMRSTEN (0x1 << 12) /**< \brief (SUPC_SMMR) Supply Monitor Reset Enable */ -#define SUPC_SMMR_SMRSTEN_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_SMMR) the core reset signal "vddcore_nreset" is not affected when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMRSTEN_ENABLE (0x1 << 12) /**< \brief (SUPC_SMMR) the core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMIEN (0x1 << 13) /**< \brief (SUPC_SMMR) Supply Monitor Interrupt Enable */ -#define SUPC_SMMR_SMIEN_NOT_ENABLE (0x0 << 13) /**< \brief (SUPC_SMMR) the SUPC interrupt signal is not affected when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMIEN_ENABLE (0x1 << 13) /**< \brief (SUPC_SMMR) the SUPC interrupt signal is asserted when a supply monitor detection occurs. */ -/* -------- SUPC_MR : (SUPC Offset: 0x08) Supply Controller Mode Register -------- */ -#define SUPC_MR_BODRSTEN (0x1 << 12) /**< \brief (SUPC_MR) Brownout Detector Reset Enable */ -#define SUPC_MR_BODRSTEN_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_MR) the core reset signal "vddcore_nreset" is not affected when a brownout detection occurs. */ -#define SUPC_MR_BODRSTEN_ENABLE (0x1 << 12) /**< \brief (SUPC_MR) the core reset signal, vddcore_nreset is asserted when a brownout detection occurs. */ -#define SUPC_MR_BODDIS (0x1 << 13) /**< \brief (SUPC_MR) Brownout Detector Disable */ -#define SUPC_MR_BODDIS_ENABLE (0x0 << 13) /**< \brief (SUPC_MR) the core brownout detector is enabled. */ -#define SUPC_MR_BODDIS_DISABLE (0x1 << 13) /**< \brief (SUPC_MR) the core brownout detector is disabled. */ -#define SUPC_MR_VDDIORDY (0x1 << 14) /**< \brief (SUPC_MR) VDDIO Ready */ -#define SUPC_MR_VDDIORDY_VDDIO_REMOVED (0x0 << 14) /**< \brief (SUPC_MR) VDDIO is removed (used before going to backup mode when backup batteries are used) */ -#define SUPC_MR_VDDIORDY_VDDIO_PRESENT (0x1 << 14) /**< \brief (SUPC_MR) VDDIO is present (used before going to backup mode when backup batteries are used) */ -#define SUPC_MR_OSCBYPASS (0x1 << 20) /**< \brief (SUPC_MR) Oscillator Bypass */ -#define SUPC_MR_OSCBYPASS_NO_EFFECT (0x0 << 20) /**< \brief (SUPC_MR) no effect. Clock selection depends on XTALSEL value. */ -#define SUPC_MR_OSCBYPASS_BYPASS (0x1 << 20) /**< \brief (SUPC_MR) the 32-KHz XTAL oscillator is selected and is put in bypass mode. */ -#define SUPC_MR_KEY (0xff << 24) /**< \brief (SUPC_MR) Password Key */ -/* -------- SUPC_WUMR : (SUPC Offset: 0x0C) Supply Controller Wake Up Mode Register -------- */ -#define SUPC_WUMR_FWUPEN (0x1 << 0) /**< \brief (SUPC_WUMR) Force Wake Up Enable */ -#define SUPC_WUMR_FWUPEN_NOT_ENABLE (0x0 << 0) /**< \brief (SUPC_WUMR) the Force Wake Up pin has no wake up effect. */ -#define SUPC_WUMR_FWUPEN_ENABLE (0x1 << 0) /**< \brief (SUPC_WUMR) the Force Wake Up pin low forces the wake up of the core power supply. */ -#define SUPC_WUMR_SMEN (0x1 << 1) /**< \brief (SUPC_WUMR) Supply Monitor Wake Up Enable */ -#define SUPC_WUMR_SMEN_NOT_ENABLE (0x0 << 1) /**< \brief (SUPC_WUMR) the supply monitor detection has no wake up effect. */ -#define SUPC_WUMR_SMEN_ENABLE (0x1 << 1) /**< \brief (SUPC_WUMR) the supply monitor detection forces the wake up of the core power supply. */ -#define SUPC_WUMR_RTTEN (0x1 << 2) /**< \brief (SUPC_WUMR) Real Time Timer Wake Up Enable */ -#define SUPC_WUMR_RTTEN_NOT_ENABLE (0x0 << 2) /**< \brief (SUPC_WUMR) the RTT alarm signal has no wake up effect. */ -#define SUPC_WUMR_RTTEN_ENABLE (0x1 << 2) /**< \brief (SUPC_WUMR) the RTT alarm signal forces the wake up of the core power supply. */ -#define SUPC_WUMR_RTCEN (0x1 << 3) /**< \brief (SUPC_WUMR) Real Time Clock Wake Up Enable */ -#define SUPC_WUMR_RTCEN_NOT_ENABLE (0x0 << 3) /**< \brief (SUPC_WUMR) the RTC alarm signal has no wake up effect. */ -#define SUPC_WUMR_RTCEN_ENABLE (0x1 << 3) /**< \brief (SUPC_WUMR) the RTC alarm signal forces the wake up of the core power supply. */ -#define SUPC_WUMR_FWUPDBC (0x7 << 8) /**< \brief (SUPC_WUMR) Force Wake Up Debouncer */ -#define SUPC_WUMR_FWUPDBC_1SCLK (0x0 << 8) /**< \brief (SUPC_WUMR) Immediate, no debouncing, detected active at least on one Slow Clock edge. */ -#define SUPC_WUMR_FWUPDBC_3SCLK (0x1 << 8) /**< \brief (SUPC_WUMR) FWUP shall be low for at least 3 SLCK periods */ -#define SUPC_WUMR_FWUPDBC_32SCLK (0x2 << 8) /**< \brief (SUPC_WUMR) FWUP shall be low for at least 32 SLCK periods */ -#define SUPC_WUMR_FWUPDBC_512SCLK (0x3 << 8) /**< \brief (SUPC_WUMR) FWUP shall be low for at least 512 SLCK periods */ -#define SUPC_WUMR_FWUPDBC_4096SCLK (0x4 << 8) /**< \brief (SUPC_WUMR) FWUP shall be low for at least 4,096 SLCK periods */ -#define SUPC_WUMR_FWUPDBC_32768SCLK (0x5 << 8) /**< \brief (SUPC_WUMR) FWUP shall be low for at least 32,768 SLCK periods */ -#define SUPC_WUMR_WKUPDBC (0x7 << 12) /**< \brief (SUPC_WUMR) Wake Up Inputs Debouncer */ -#define SUPC_WUMR_WKUPDBC_1SCLK (0x0 << 12) /**< \brief (SUPC_WUMR) Immediate, no debouncing, detected active at least on one Slow Clock edge. */ -#define SUPC_WUMR_WKUPDBC_3SCLK (0x1 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 3 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_32SCLK (0x2 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 32 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_512SCLK (0x3 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 512 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_4096SCLK (0x4 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 4,096 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_32768SCLK (0x5 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 32,768 SLCK periods */ -/* -------- SUPC_WUIR : (SUPC Offset: 0x10) Supply Controller Wake Up Inputs Register -------- */ -#define SUPC_WUIR_WKUPEN0 (0x1 << 0) /**< \brief (SUPC_WUIR) Wake Up Input Enable 0 */ -#define SUPC_WUIR_WKUPEN0_NOT_ENABLE (0x0 << 0) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN0_ENABLE (0x1 << 0) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN1 (0x1 << 1) /**< \brief (SUPC_WUIR) Wake Up Input Enable 1 */ -#define SUPC_WUIR_WKUPEN1_NOT_ENABLE (0x0 << 1) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN1_ENABLE (0x1 << 1) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN2 (0x1 << 2) /**< \brief (SUPC_WUIR) Wake Up Input Enable 2 */ -#define SUPC_WUIR_WKUPEN2_NOT_ENABLE (0x0 << 2) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN2_ENABLE (0x1 << 2) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN3 (0x1 << 3) /**< \brief (SUPC_WUIR) Wake Up Input Enable 3 */ -#define SUPC_WUIR_WKUPEN3_NOT_ENABLE (0x0 << 3) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN3_ENABLE (0x1 << 3) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN4 (0x1 << 4) /**< \brief (SUPC_WUIR) Wake Up Input Enable 4 */ -#define SUPC_WUIR_WKUPEN4_NOT_ENABLE (0x0 << 4) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN4_ENABLE (0x1 << 4) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN5 (0x1 << 5) /**< \brief (SUPC_WUIR) Wake Up Input Enable 5 */ -#define SUPC_WUIR_WKUPEN5_NOT_ENABLE (0x0 << 5) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN5_ENABLE (0x1 << 5) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN6 (0x1 << 6) /**< \brief (SUPC_WUIR) Wake Up Input Enable 6 */ -#define SUPC_WUIR_WKUPEN6_NOT_ENABLE (0x0 << 6) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN6_ENABLE (0x1 << 6) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN7 (0x1 << 7) /**< \brief (SUPC_WUIR) Wake Up Input Enable 7 */ -#define SUPC_WUIR_WKUPEN7_NOT_ENABLE (0x0 << 7) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN7_ENABLE (0x1 << 7) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN8 (0x1 << 8) /**< \brief (SUPC_WUIR) Wake Up Input Enable 8 */ -#define SUPC_WUIR_WKUPEN8_NOT_ENABLE (0x0 << 8) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN8_ENABLE (0x1 << 8) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN9 (0x1 << 9) /**< \brief (SUPC_WUIR) Wake Up Input Enable 9 */ -#define SUPC_WUIR_WKUPEN9_NOT_ENABLE (0x0 << 9) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN9_ENABLE (0x1 << 9) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN10 (0x1 << 10) /**< \brief (SUPC_WUIR) Wake Up Input Enable 10 */ -#define SUPC_WUIR_WKUPEN10_NOT_ENABLE (0x0 << 10) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN10_ENABLE (0x1 << 10) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN11 (0x1 << 11) /**< \brief (SUPC_WUIR) Wake Up Input Enable 11 */ -#define SUPC_WUIR_WKUPEN11_NOT_ENABLE (0x0 << 11) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN11_ENABLE (0x1 << 11) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN12 (0x1 << 12) /**< \brief (SUPC_WUIR) Wake Up Input Enable 12 */ -#define SUPC_WUIR_WKUPEN12_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN12_ENABLE (0x1 << 12) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN13 (0x1 << 13) /**< \brief (SUPC_WUIR) Wake Up Input Enable 13 */ -#define SUPC_WUIR_WKUPEN13_NOT_ENABLE (0x0 << 13) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN13_ENABLE (0x1 << 13) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN14 (0x1 << 14) /**< \brief (SUPC_WUIR) Wake Up Input Enable 14 */ -#define SUPC_WUIR_WKUPEN14_NOT_ENABLE (0x0 << 14) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN14_ENABLE (0x1 << 14) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN15 (0x1 << 15) /**< \brief (SUPC_WUIR) Wake Up Input Enable 15 */ -#define SUPC_WUIR_WKUPEN15_NOT_ENABLE (0x0 << 15) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN15_ENABLE (0x1 << 15) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT0 (0x1 << 16) /**< \brief (SUPC_WUIR) Wake Up Input Transition 0 */ -#define SUPC_WUIR_WKUPT0_HIGH_TO_LOW (0x0 << 16) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT0_LOW_TO_HIGH (0x1 << 16) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT1 (0x1 << 17) /**< \brief (SUPC_WUIR) Wake Up Input Transition 1 */ -#define SUPC_WUIR_WKUPT1_HIGH_TO_LOW (0x0 << 17) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT1_LOW_TO_HIGH (0x1 << 17) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT2 (0x1 << 18) /**< \brief (SUPC_WUIR) Wake Up Input Transition 2 */ -#define SUPC_WUIR_WKUPT2_HIGH_TO_LOW (0x0 << 18) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT2_LOW_TO_HIGH (0x1 << 18) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT3 (0x1 << 19) /**< \brief (SUPC_WUIR) Wake Up Input Transition 3 */ -#define SUPC_WUIR_WKUPT3_HIGH_TO_LOW (0x0 << 19) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT3_LOW_TO_HIGH (0x1 << 19) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT4 (0x1 << 20) /**< \brief (SUPC_WUIR) Wake Up Input Transition 4 */ -#define SUPC_WUIR_WKUPT4_HIGH_TO_LOW (0x0 << 20) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT4_LOW_TO_HIGH (0x1 << 20) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT5 (0x1 << 21) /**< \brief (SUPC_WUIR) Wake Up Input Transition 5 */ -#define SUPC_WUIR_WKUPT5_HIGH_TO_LOW (0x0 << 21) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT5_LOW_TO_HIGH (0x1 << 21) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT6 (0x1 << 22) /**< \brief (SUPC_WUIR) Wake Up Input Transition 6 */ -#define SUPC_WUIR_WKUPT6_HIGH_TO_LOW (0x0 << 22) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT6_LOW_TO_HIGH (0x1 << 22) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT7 (0x1 << 23) /**< \brief (SUPC_WUIR) Wake Up Input Transition 7 */ -#define SUPC_WUIR_WKUPT7_HIGH_TO_LOW (0x0 << 23) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT7_LOW_TO_HIGH (0x1 << 23) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT8 (0x1 << 24) /**< \brief (SUPC_WUIR) Wake Up Input Transition 8 */ -#define SUPC_WUIR_WKUPT8_HIGH_TO_LOW (0x0 << 24) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT8_LOW_TO_HIGH (0x1 << 24) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT9 (0x1 << 25) /**< \brief (SUPC_WUIR) Wake Up Input Transition 9 */ -#define SUPC_WUIR_WKUPT9_HIGH_TO_LOW (0x0 << 25) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT9_LOW_TO_HIGH (0x1 << 25) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT10 (0x1 << 26) /**< \brief (SUPC_WUIR) Wake Up Input Transition 10 */ -#define SUPC_WUIR_WKUPT10_HIGH_TO_LOW (0x0 << 26) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT10_LOW_TO_HIGH (0x1 << 26) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT11 (0x1 << 27) /**< \brief (SUPC_WUIR) Wake Up Input Transition 11 */ -#define SUPC_WUIR_WKUPT11_HIGH_TO_LOW (0x0 << 27) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT11_LOW_TO_HIGH (0x1 << 27) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT12 (0x1 << 28) /**< \brief (SUPC_WUIR) Wake Up Input Transition 12 */ -#define SUPC_WUIR_WKUPT12_HIGH_TO_LOW (0x0 << 28) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT12_LOW_TO_HIGH (0x1 << 28) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT13 (0x1 << 29) /**< \brief (SUPC_WUIR) Wake Up Input Transition 13 */ -#define SUPC_WUIR_WKUPT13_HIGH_TO_LOW (0x0 << 29) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT13_LOW_TO_HIGH (0x1 << 29) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT14 (0x1 << 30) /**< \brief (SUPC_WUIR) Wake Up Input Transition 14 */ -#define SUPC_WUIR_WKUPT14_HIGH_TO_LOW (0x0 << 30) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT14_LOW_TO_HIGH (0x1 << 30) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT15 (0x1 << 31) /**< \brief (SUPC_WUIR) Wake Up Input Transition 15 */ -#define SUPC_WUIR_WKUPT15_HIGH_TO_LOW (0x0 << 31) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT15_LOW_TO_HIGH (0x1 << 31) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -/* -------- SUPC_SR : (SUPC Offset: 0x14) Supply Controller Status Register -------- */ -#define SUPC_SR_FWUPS (0x1 << 0) /**< \brief (SUPC_SR) FWUP Wake Up Status */ -#define SUPC_SR_FWUPS_NO (0x0 << 0) /**< \brief (SUPC_SR) no wake up due to the assertion of the FWUP pin has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_FWUPS_PRESENT (0x1 << 0) /**< \brief (SUPC_SR) at least one wake up due to the assertion of the FWUP pin has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_WKUPS (0x1 << 1) /**< \brief (SUPC_SR) WKUP Wake Up Status */ -#define SUPC_SR_WKUPS_NO (0x0 << 1) /**< \brief (SUPC_SR) no wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_WKUPS_PRESENT (0x1 << 1) /**< \brief (SUPC_SR) at least one wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_SMWS (0x1 << 2) /**< \brief (SUPC_SR) Supply Monitor Detection Wake Up Status */ -#define SUPC_SR_SMWS_NO (0x0 << 2) /**< \brief (SUPC_SR) no wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_SMWS_PRESENT (0x1 << 2) /**< \brief (SUPC_SR) at least one wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_BODRSTS (0x1 << 3) /**< \brief (SUPC_SR) Brownout Detector Reset Status */ -#define SUPC_SR_BODRSTS_NO (0x0 << 3) /**< \brief (SUPC_SR) no core brownout rising edge event has been detected since the last read of the SUPC_SR. */ -#define SUPC_SR_BODRSTS_PRESENT (0x1 << 3) /**< \brief (SUPC_SR) at least one brownout output rising edge event has been detected since the last read of the SUPC_SR. */ -#define SUPC_SR_SMRSTS (0x1 << 4) /**< \brief (SUPC_SR) Supply Monitor Reset Status */ -#define SUPC_SR_SMRSTS_NO (0x0 << 4) /**< \brief (SUPC_SR) no supply monitor detection has generated a core reset since the last read of the SUPC_SR. */ -#define SUPC_SR_SMRSTS_PRESENT (0x1 << 4) /**< \brief (SUPC_SR) at least one supply monitor detection has generated a core reset since the last read of the SUPC_SR. */ -#define SUPC_SR_SMS (0x1 << 5) /**< \brief (SUPC_SR) Supply Monitor Status */ -#define SUPC_SR_SMS_NO (0x0 << 5) /**< \brief (SUPC_SR) no supply monitor detection since the last read of SUPC_SR. */ -#define SUPC_SR_SMS_PRESENT (0x1 << 5) /**< \brief (SUPC_SR) at least one supply monitor detection since the last read of SUPC_SR. */ -#define SUPC_SR_SMOS (0x1 << 6) /**< \brief (SUPC_SR) Supply Monitor Output Status */ -#define SUPC_SR_SMOS_HIGH (0x0 << 6) /**< \brief (SUPC_SR) the supply monitor detected VDDUTMI higher than its threshold at its last measurement. */ -#define SUPC_SR_SMOS_LOW (0x1 << 6) /**< \brief (SUPC_SR) the supply monitor detected VDDUTMI lower than its threshold at its last measurement. */ -#define SUPC_SR_OSCSEL (0x1 << 7) /**< \brief (SUPC_SR) 32-kHz Oscillator Selection Status */ -#define SUPC_SR_OSCSEL_RC (0x0 << 7) /**< \brief (SUPC_SR) the slow clock, SLCK is generated by the embedded 32-kHz RC oscillator. */ -#define SUPC_SR_OSCSEL_CRYST (0x1 << 7) /**< \brief (SUPC_SR) the slow clock, SLCK is generated by the 32-kHz crystal oscillator. */ -#define SUPC_SR_FWUPIS (0x1 << 12) /**< \brief (SUPC_SR) FWUP Input Status */ -#define SUPC_SR_FWUPIS_LOW (0x0 << 12) /**< \brief (SUPC_SR) FWUP input is tied low. */ -#define SUPC_SR_FWUPIS_HIGH (0x1 << 12) /**< \brief (SUPC_SR) FWUP input is tied high. */ -#define SUPC_SR_WKUPIS0 (0x1 << 16) /**< \brief (SUPC_SR) WKUP Input Status 0 */ -#define SUPC_SR_WKUPIS0_DIS (0x0 << 16) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS0_EN (0x1 << 16) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS1 (0x1 << 17) /**< \brief (SUPC_SR) WKUP Input Status 1 */ -#define SUPC_SR_WKUPIS1_DIS (0x0 << 17) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS1_EN (0x1 << 17) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS2 (0x1 << 18) /**< \brief (SUPC_SR) WKUP Input Status 2 */ -#define SUPC_SR_WKUPIS2_DIS (0x0 << 18) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS2_EN (0x1 << 18) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS3 (0x1 << 19) /**< \brief (SUPC_SR) WKUP Input Status 3 */ -#define SUPC_SR_WKUPIS3_DIS (0x0 << 19) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS3_EN (0x1 << 19) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS4 (0x1 << 20) /**< \brief (SUPC_SR) WKUP Input Status 4 */ -#define SUPC_SR_WKUPIS4_DIS (0x0 << 20) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS4_EN (0x1 << 20) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS5 (0x1 << 21) /**< \brief (SUPC_SR) WKUP Input Status 5 */ -#define SUPC_SR_WKUPIS5_DIS (0x0 << 21) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS5_EN (0x1 << 21) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS6 (0x1 << 22) /**< \brief (SUPC_SR) WKUP Input Status 6 */ -#define SUPC_SR_WKUPIS6_DIS (0x0 << 22) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS6_EN (0x1 << 22) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS7 (0x1 << 23) /**< \brief (SUPC_SR) WKUP Input Status 7 */ -#define SUPC_SR_WKUPIS7_DIS (0x0 << 23) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS7_EN (0x1 << 23) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS8 (0x1 << 24) /**< \brief (SUPC_SR) WKUP Input Status 8 */ -#define SUPC_SR_WKUPIS8_DIS (0x0 << 24) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS8_EN (0x1 << 24) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS9 (0x1 << 25) /**< \brief (SUPC_SR) WKUP Input Status 9 */ -#define SUPC_SR_WKUPIS9_DIS (0x0 << 25) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS9_EN (0x1 << 25) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS10 (0x1 << 26) /**< \brief (SUPC_SR) WKUP Input Status 10 */ -#define SUPC_SR_WKUPIS10_DIS (0x0 << 26) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS10_EN (0x1 << 26) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS11 (0x1 << 27) /**< \brief (SUPC_SR) WKUP Input Status 11 */ -#define SUPC_SR_WKUPIS11_DIS (0x0 << 27) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS11_EN (0x1 << 27) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS12 (0x1 << 28) /**< \brief (SUPC_SR) WKUP Input Status 12 */ -#define SUPC_SR_WKUPIS12_DIS (0x0 << 28) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS12_EN (0x1 << 28) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS13 (0x1 << 29) /**< \brief (SUPC_SR) WKUP Input Status 13 */ -#define SUPC_SR_WKUPIS13_DIS (0x0 << 29) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS13_EN (0x1 << 29) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS14 (0x1 << 30) /**< \brief (SUPC_SR) WKUP Input Status 14 */ -#define SUPC_SR_WKUPIS14_DIS (0x0 << 30) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS14_EN (0x1 << 30) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS15 (0x1 << 31) /**< \brief (SUPC_SR) WKUP Input Status 15 */ -#define SUPC_SR_WKUPIS15_DIS (0x0 << 31) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS15_EN (0x1 << 31) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Timer Counter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_TC Timer Counter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief TcChannel hardware registers */ -typedef struct { - RwReg TC_CCR; /**< \brief (TcChannel Offset: 0x0) Channel Control Register */ - RwReg TC_CMR; /**< \brief (TcChannel Offset: 0x4) Channel Mode Register */ - RwReg Reserved1[2]; - RwReg TC_CV; /**< \brief (TcChannel Offset: 0x10) Counter Value */ - RwReg TC_RA; /**< \brief (TcChannel Offset: 0x14) Register A */ - RwReg TC_RB; /**< \brief (TcChannel Offset: 0x18) Register B */ - RwReg TC_RC; /**< \brief (TcChannel Offset: 0x1C) Register C */ - RwReg TC_SR; /**< \brief (TcChannel Offset: 0x20) Status Register */ - RwReg TC_IER; /**< \brief (TcChannel Offset: 0x24) Interrupt Enable Register */ - RwReg TC_IDR; /**< \brief (TcChannel Offset: 0x28) Interrupt Disable Register */ - RwReg TC_IMR; /**< \brief (TcChannel Offset: 0x2C) Interrupt Mask Register */ - RwReg Reserved2[4]; -} TcChannel; -/** \brief Tc hardware registers */ -typedef struct { - TcChannel TC_CHANNEL[3]; /**< \brief (Tc Offset: 0x0) channel = 0 .. 2 */ - WoReg TC_BCR; /**< \brief (Tc Offset: 0xC0) Block Control Register */ - RwReg TC_BMR; /**< \brief (Tc Offset: 0xC4) Block Mode Register */ - WoReg TC_QIER; /**< \brief (Tc Offset: 0xC8) QDEC Interrupt Enable Register */ - WoReg TC_QIDR; /**< \brief (Tc Offset: 0xCC) QDEC Interrupt Disable Register */ - RoReg TC_QIMR; /**< \brief (Tc Offset: 0xD0) QDEC Interrupt Mask Register */ - RoReg TC_QISR; /**< \brief (Tc Offset: 0xD4) QDEC Interrupt Status Register */ - RwReg Reserved1[9]; - RoReg TC_VER; /**< \brief (Tc Offset: 0xFC) Version Register */ -} Tc; -#endif /* __ASSEMBLY__ */ -/* -------- TC_CCR0 : (TC Offset: 0x0) Channel Control Register (channel = 0) -------- */ -#define TC_CCR0_CLKEN (0x1 << 0) /**< \brief (TC_CCR0) Counter Clock Enable Command */ -#define TC_CCR0_CLKDIS (0x1 << 1) /**< \brief (TC_CCR0) Counter Clock Disable Command */ -#define TC_CCR0_SWTRG (0x1 << 2) /**< \brief (TC_CCR0) Software Trigger Command */ -/* -------- TC_CMR0 : (TC Offset: 0x4) Channel Mode Register (channel = 0) -------- */ -#define TC_CMR0_TCCLKS (0x7 << 0) /**< \brief (TC_CMR0) Clock Selection */ -#define TC_CMR0_CLKI (0x1 << 3) /**< \brief (TC_CMR0) Clock Invert */ -#define TC_CMR0_BURST (0x3 << 4) /**< \brief (TC_CMR0) Burst Signal Selection */ -#define TC_CMR0_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR0) The clock is not gated by an external signal. */ -#define TC_CMR0_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR0) XC0 is ANDed with the selected clock. */ -#define TC_CMR0_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR0) XC1 is ANDed with the selected clock. */ -#define TC_CMR0_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR0) XC2 is ANDed with the selected clock. */ -#define TC_CMR0_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR0) Counter Clock Stopped with RB Loading */ -#define TC_CMR0_LDBDIS (0x1 << 7) /**< \brief (TC_CMR0) Counter Clock Disable with RB Loading */ -#define TC_CMR0_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR0) External Trigger Edge Selection */ -#define TC_CMR0_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR0) none */ -#define TC_CMR0_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR0) rising edge */ -#define TC_CMR0_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR0) falling edge */ -#define TC_CMR0_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR0) each edge */ -#define TC_CMR0_ABETRG (0x1 << 10) /**< \brief (TC_CMR0) TIOA or TIOB External Trigger Selection */ -#define TC_CMR0_CPCTRG (0x1 << 14) /**< \brief (TC_CMR0) RC Compare Trigger Enable */ -#define TC_CMR0_WAVE (0x1 << 15) /**< \brief (TC_CMR0) */ -#define TC_CMR0_LDRA (0x3 << 16) /**< \brief (TC_CMR0) RA Loading Selection */ -#define TC_CMR0_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR0) none */ -#define TC_CMR0_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR0) rising edge of TIOA */ -#define TC_CMR0_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR0) falling edge of TIOA */ -#define TC_CMR0_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR0) each edge of TIOA */ -#define TC_CMR0_LDRB (0x3 << 18) /**< \brief (TC_CMR0) RB Loading Selection */ -#define TC_CMR0_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR0) none */ -#define TC_CMR0_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR0) rising edge of TIOA */ -#define TC_CMR0_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR0) falling edge of TIOA */ -#define TC_CMR0_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR0) each edge of TIOA */ -/* -------- TC_CV0 : (TC Offset: 0x10) Counter Value (channel = 0) -------- */ -#define TC_CV0_CV (0xffff << 0) /**< \brief (TC_CV0) Counter Value */ -/* -------- TC_RA0 : (TC Offset: 0x14) Register A (channel = 0) -------- */ -#define TC_RA0_RA (0xffff << 0) /**< \brief (TC_RA0) Register A */ -/* -------- TC_RB0 : (TC Offset: 0x18) Register B (channel = 0) -------- */ -#define TC_RB0_RB (0xffff << 0) /**< \brief (TC_RB0) Register B */ -/* -------- TC_RC0 : (TC Offset: 0x1C) Register C (channel = 0) -------- */ -#define TC_RC0_RC (0xffff << 0) /**< \brief (TC_RC0) Register C */ -/* -------- TC_SR0 : (TC Offset: 0x20) Status Register (channel = 0) -------- */ -#define TC_SR0_COVFS (0x1 << 0) /**< \brief (TC_SR0) Counter Overflow Status */ -#define TC_SR0_LOVRS (0x1 << 1) /**< \brief (TC_SR0) Load Overrun Status */ -#define TC_SR0_CPAS (0x1 << 2) /**< \brief (TC_SR0) RA Compare Status */ -#define TC_SR0_CPBS (0x1 << 3) /**< \brief (TC_SR0) RB Compare Status */ -#define TC_SR0_CPCS (0x1 << 4) /**< \brief (TC_SR0) RC Compare Status */ -#define TC_SR0_LDRAS (0x1 << 5) /**< \brief (TC_SR0) RA Loading Status */ -#define TC_SR0_LDRBS (0x1 << 6) /**< \brief (TC_SR0) RB Loading Status */ -#define TC_SR0_ETRGS (0x1 << 7) /**< \brief (TC_SR0) External Trigger Status */ -#define TC_SR0_CLKSTA (0x1 << 16) /**< \brief (TC_SR0) Clock Enabling Status */ -#define TC_SR0_MTIOA (0x1 << 17) /**< \brief (TC_SR0) TIOA Mirror */ -#define TC_SR0_MTIOB (0x1 << 18) /**< \brief (TC_SR0) TIOB Mirror */ -/* -------- TC_IER0 : (TC Offset: 0x24) Interrupt Enable Register (channel = 0) -------- */ -#define TC_IER0_COVFS (0x1 << 0) /**< \brief (TC_IER0) Counter Overflow */ -#define TC_IER0_LOVRS (0x1 << 1) /**< \brief (TC_IER0) Load Overrun */ -#define TC_IER0_CPAS (0x1 << 2) /**< \brief (TC_IER0) RA Compare */ -#define TC_IER0_CPBS (0x1 << 3) /**< \brief (TC_IER0) RB Compare */ -#define TC_IER0_CPCS (0x1 << 4) /**< \brief (TC_IER0) RC Compare */ -#define TC_IER0_LDRAS (0x1 << 5) /**< \brief (TC_IER0) RA Loading */ -#define TC_IER0_LDRBS (0x1 << 6) /**< \brief (TC_IER0) RB Loading */ -#define TC_IER0_ETRGS (0x1 << 7) /**< \brief (TC_IER0) External Trigger */ -/* -------- TC_IDR0 : (TC Offset: 0x28) Interrupt Disable Register (channel = 0) -------- */ -#define TC_IDR0_COVFS (0x1 << 0) /**< \brief (TC_IDR0) Counter Overflow */ -#define TC_IDR0_LOVRS (0x1 << 1) /**< \brief (TC_IDR0) Load Overrun */ -#define TC_IDR0_CPAS (0x1 << 2) /**< \brief (TC_IDR0) RA Compare */ -#define TC_IDR0_CPBS (0x1 << 3) /**< \brief (TC_IDR0) RB Compare */ -#define TC_IDR0_CPCS (0x1 << 4) /**< \brief (TC_IDR0) RC Compare */ -#define TC_IDR0_LDRAS (0x1 << 5) /**< \brief (TC_IDR0) RA Loading */ -#define TC_IDR0_LDRBS (0x1 << 6) /**< \brief (TC_IDR0) RB Loading */ -#define TC_IDR0_ETRGS (0x1 << 7) /**< \brief (TC_IDR0) External Trigger */ -/* -------- TC_IMR0 : (TC Offset: 0x2C) Interrupt Mask Register (channel = 0) -------- */ -#define TC_IMR0_COVFS (0x1 << 0) /**< \brief (TC_IMR0) Counter Overflow */ -#define TC_IMR0_LOVRS (0x1 << 1) /**< \brief (TC_IMR0) Load Overrun */ -#define TC_IMR0_CPAS (0x1 << 2) /**< \brief (TC_IMR0) RA Compare */ -#define TC_IMR0_CPBS (0x1 << 3) /**< \brief (TC_IMR0) RB Compare */ -#define TC_IMR0_CPCS (0x1 << 4) /**< \brief (TC_IMR0) RC Compare */ -#define TC_IMR0_LDRAS (0x1 << 5) /**< \brief (TC_IMR0) RA Loading */ -#define TC_IMR0_LDRBS (0x1 << 6) /**< \brief (TC_IMR0) RB Loading */ -#define TC_IMR0_ETRGS (0x1 << 7) /**< \brief (TC_IMR0) External Trigger */ -/* -------- TC_CCR1 : (TC Offset: 0x40) Channel Control Register (channel = 1) -------- */ -#define TC_CCR1_CLKEN (0x1 << 0) /**< \brief (TC_CCR1) Counter Clock Enable Command */ -#define TC_CCR1_CLKDIS (0x1 << 1) /**< \brief (TC_CCR1) Counter Clock Disable Command */ -#define TC_CCR1_SWTRG (0x1 << 2) /**< \brief (TC_CCR1) Software Trigger Command */ -/* -------- TC_CMR1 : (TC Offset: 0x44) Channel Mode Register (channel = 1) -------- */ -#define TC_CMR1_TCCLKS (0x7 << 0) /**< \brief (TC_CMR1) Clock Selection */ -#define TC_CMR1_CLKI (0x1 << 3) /**< \brief (TC_CMR1) Clock Invert */ -#define TC_CMR1_BURST (0x3 << 4) /**< \brief (TC_CMR1) Burst Signal Selection */ -#define TC_CMR1_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR1) The clock is not gated by an external signal. */ -#define TC_CMR1_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR1) XC0 is ANDed with the selected clock. */ -#define TC_CMR1_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR1) XC1 is ANDed with the selected clock. */ -#define TC_CMR1_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR1) XC2 is ANDed with the selected clock. */ -#define TC_CMR1_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR1) Counter Clock Stopped with RB Loading */ -#define TC_CMR1_LDBDIS (0x1 << 7) /**< \brief (TC_CMR1) Counter Clock Disable with RB Loading */ -#define TC_CMR1_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR1) External Trigger Edge Selection */ -#define TC_CMR1_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR1) none */ -#define TC_CMR1_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR1) rising edge */ -#define TC_CMR1_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR1) falling edge */ -#define TC_CMR1_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR1) each edge */ -#define TC_CMR1_ABETRG (0x1 << 10) /**< \brief (TC_CMR1) TIOA or TIOB External Trigger Selection */ -#define TC_CMR1_CPCTRG (0x1 << 14) /**< \brief (TC_CMR1) RC Compare Trigger Enable */ -#define TC_CMR1_WAVE (0x1 << 15) /**< \brief (TC_CMR1) */ -#define TC_CMR1_LDRA (0x3 << 16) /**< \brief (TC_CMR1) RA Loading Selection */ -#define TC_CMR1_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR1) none */ -#define TC_CMR1_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR1) rising edge of TIOA */ -#define TC_CMR1_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR1) falling edge of TIOA */ -#define TC_CMR1_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR1) each edge of TIOA */ -#define TC_CMR1_LDRB (0x3 << 18) /**< \brief (TC_CMR1) RB Loading Selection */ -#define TC_CMR1_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR1) none */ -#define TC_CMR1_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR1) rising edge of TIOA */ -#define TC_CMR1_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR1) falling edge of TIOA */ -#define TC_CMR1_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR1) each edge of TIOA */ -/* -------- TC_CV1 : (TC Offset: 0x50) Counter Value (channel = 1) -------- */ -#define TC_CV1_CV (0xffff << 0) /**< \brief (TC_CV1) Counter Value */ -/* -------- TC_RA1 : (TC Offset: 0x54) Register A (channel = 1) -------- */ -#define TC_RA1_RA (0xffff << 0) /**< \brief (TC_RA1) Register A */ -/* -------- TC_RB1 : (TC Offset: 0x58) Register B (channel = 1) -------- */ -#define TC_RB1_RB (0xffff << 0) /**< \brief (TC_RB1) Register B */ -/* -------- TC_RC1 : (TC Offset: 0x5C) Register C (channel = 1) -------- */ -#define TC_RC1_RC (0xffff << 0) /**< \brief (TC_RC1) Register C */ -/* -------- TC_SR1 : (TC Offset: 0x60) Status Register (channel = 1) -------- */ -#define TC_SR1_COVFS (0x1 << 0) /**< \brief (TC_SR1) Counter Overflow Status */ -#define TC_SR1_LOVRS (0x1 << 1) /**< \brief (TC_SR1) Load Overrun Status */ -#define TC_SR1_CPAS (0x1 << 2) /**< \brief (TC_SR1) RA Compare Status */ -#define TC_SR1_CPBS (0x1 << 3) /**< \brief (TC_SR1) RB Compare Status */ -#define TC_SR1_CPCS (0x1 << 4) /**< \brief (TC_SR1) RC Compare Status */ -#define TC_SR1_LDRAS (0x1 << 5) /**< \brief (TC_SR1) RA Loading Status */ -#define TC_SR1_LDRBS (0x1 << 6) /**< \brief (TC_SR1) RB Loading Status */ -#define TC_SR1_ETRGS (0x1 << 7) /**< \brief (TC_SR1) External Trigger Status */ -#define TC_SR1_CLKSTA (0x1 << 16) /**< \brief (TC_SR1) Clock Enabling Status */ -#define TC_SR1_MTIOA (0x1 << 17) /**< \brief (TC_SR1) TIOA Mirror */ -#define TC_SR1_MTIOB (0x1 << 18) /**< \brief (TC_SR1) TIOB Mirror */ -/* -------- TC_IER1 : (TC Offset: 0x64) Interrupt Enable Register (channel = 1) -------- */ -#define TC_IER1_COVFS (0x1 << 0) /**< \brief (TC_IER1) Counter Overflow */ -#define TC_IER1_LOVRS (0x1 << 1) /**< \brief (TC_IER1) Load Overrun */ -#define TC_IER1_CPAS (0x1 << 2) /**< \brief (TC_IER1) RA Compare */ -#define TC_IER1_CPBS (0x1 << 3) /**< \brief (TC_IER1) RB Compare */ -#define TC_IER1_CPCS (0x1 << 4) /**< \brief (TC_IER1) RC Compare */ -#define TC_IER1_LDRAS (0x1 << 5) /**< \brief (TC_IER1) RA Loading */ -#define TC_IER1_LDRBS (0x1 << 6) /**< \brief (TC_IER1) RB Loading */ -#define TC_IER1_ETRGS (0x1 << 7) /**< \brief (TC_IER1) External Trigger */ -/* -------- TC_IDR1 : (TC Offset: 0x68) Interrupt Disable Register (channel = 1) -------- */ -#define TC_IDR1_COVFS (0x1 << 0) /**< \brief (TC_IDR1) Counter Overflow */ -#define TC_IDR1_LOVRS (0x1 << 1) /**< \brief (TC_IDR1) Load Overrun */ -#define TC_IDR1_CPAS (0x1 << 2) /**< \brief (TC_IDR1) RA Compare */ -#define TC_IDR1_CPBS (0x1 << 3) /**< \brief (TC_IDR1) RB Compare */ -#define TC_IDR1_CPCS (0x1 << 4) /**< \brief (TC_IDR1) RC Compare */ -#define TC_IDR1_LDRAS (0x1 << 5) /**< \brief (TC_IDR1) RA Loading */ -#define TC_IDR1_LDRBS (0x1 << 6) /**< \brief (TC_IDR1) RB Loading */ -#define TC_IDR1_ETRGS (0x1 << 7) /**< \brief (TC_IDR1) External Trigger */ -/* -------- TC_IMR1 : (TC Offset: 0x6C) Interrupt Mask Register (channel = 1) -------- */ -#define TC_IMR1_COVFS (0x1 << 0) /**< \brief (TC_IMR1) Counter Overflow */ -#define TC_IMR1_LOVRS (0x1 << 1) /**< \brief (TC_IMR1) Load Overrun */ -#define TC_IMR1_CPAS (0x1 << 2) /**< \brief (TC_IMR1) RA Compare */ -#define TC_IMR1_CPBS (0x1 << 3) /**< \brief (TC_IMR1) RB Compare */ -#define TC_IMR1_CPCS (0x1 << 4) /**< \brief (TC_IMR1) RC Compare */ -#define TC_IMR1_LDRAS (0x1 << 5) /**< \brief (TC_IMR1) RA Loading */ -#define TC_IMR1_LDRBS (0x1 << 6) /**< \brief (TC_IMR1) RB Loading */ -#define TC_IMR1_ETRGS (0x1 << 7) /**< \brief (TC_IMR1) External Trigger */ -/* -------- TC_CCR2 : (TC Offset: 0x80) Channel Control Register (channel = 2) -------- */ -#define TC_CCR2_CLKEN (0x1 << 0) /**< \brief (TC_CCR2) Counter Clock Enable Command */ -#define TC_CCR2_CLKDIS (0x1 << 1) /**< \brief (TC_CCR2) Counter Clock Disable Command */ -#define TC_CCR2_SWTRG (0x1 << 2) /**< \brief (TC_CCR2) Software Trigger Command */ -/* -------- TC_CMR2 : (TC Offset: 0x84) Channel Mode Register (channel = 2) -------- */ -#define TC_CMR2_TCCLKS (0x7 << 0) /**< \brief (TC_CMR2) Clock Selection */ -#define TC_CMR2_CLKI (0x1 << 3) /**< \brief (TC_CMR2) Clock Invert */ -#define TC_CMR2_BURST (0x3 << 4) /**< \brief (TC_CMR2) Burst Signal Selection */ -#define TC_CMR2_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR2) The clock is not gated by an external signal. */ -#define TC_CMR2_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR2) XC0 is ANDed with the selected clock. */ -#define TC_CMR2_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR2) XC1 is ANDed with the selected clock. */ -#define TC_CMR2_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR2) XC2 is ANDed with the selected clock. */ -#define TC_CMR2_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR2) Counter Clock Stopped with RB Loading */ -#define TC_CMR2_LDBDIS (0x1 << 7) /**< \brief (TC_CMR2) Counter Clock Disable with RB Loading */ -#define TC_CMR2_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR2) External Trigger Edge Selection */ -#define TC_CMR2_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR2) none */ -#define TC_CMR2_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR2) rising edge */ -#define TC_CMR2_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR2) falling edge */ -#define TC_CMR2_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR2) each edge */ -#define TC_CMR2_ABETRG (0x1 << 10) /**< \brief (TC_CMR2) TIOA or TIOB External Trigger Selection */ -#define TC_CMR2_CPCTRG (0x1 << 14) /**< \brief (TC_CMR2) RC Compare Trigger Enable */ -#define TC_CMR2_WAVE (0x1 << 15) /**< \brief (TC_CMR2) */ -#define TC_CMR2_LDRA (0x3 << 16) /**< \brief (TC_CMR2) RA Loading Selection */ -#define TC_CMR2_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR2) none */ -#define TC_CMR2_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR2) rising edge of TIOA */ -#define TC_CMR2_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR2) falling edge of TIOA */ -#define TC_CMR2_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR2) each edge of TIOA */ -#define TC_CMR2_LDRB (0x3 << 18) /**< \brief (TC_CMR2) RB Loading Selection */ -#define TC_CMR2_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR2) none */ -#define TC_CMR2_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR2) rising edge of TIOA */ -#define TC_CMR2_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR2) falling edge of TIOA */ -#define TC_CMR2_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR2) each edge of TIOA */ -/* -------- TC_CV2 : (TC Offset: 0x90) Counter Value (channel = 2) -------- */ -#define TC_CV2_CV (0xffff << 0) /**< \brief (TC_CV2) Counter Value */ -/* -------- TC_RA2 : (TC Offset: 0x94) Register A (channel = 2) -------- */ -#define TC_RA2_RA (0xffff << 0) /**< \brief (TC_RA2) Register A */ -/* -------- TC_RB2 : (TC Offset: 0x98) Register B (channel = 2) -------- */ -#define TC_RB2_RB (0xffff << 0) /**< \brief (TC_RB2) Register B */ -/* -------- TC_RC2 : (TC Offset: 0x9C) Register C (channel = 2) -------- */ -#define TC_RC2_RC (0xffff << 0) /**< \brief (TC_RC2) Register C */ -/* -------- TC_SR2 : (TC Offset: 0xA0) Status Register (channel = 2) -------- */ -#define TC_SR2_COVFS (0x1 << 0) /**< \brief (TC_SR2) Counter Overflow Status */ -#define TC_SR2_LOVRS (0x1 << 1) /**< \brief (TC_SR2) Load Overrun Status */ -#define TC_SR2_CPAS (0x1 << 2) /**< \brief (TC_SR2) RA Compare Status */ -#define TC_SR2_CPBS (0x1 << 3) /**< \brief (TC_SR2) RB Compare Status */ -#define TC_SR2_CPCS (0x1 << 4) /**< \brief (TC_SR2) RC Compare Status */ -#define TC_SR2_LDRAS (0x1 << 5) /**< \brief (TC_SR2) RA Loading Status */ -#define TC_SR2_LDRBS (0x1 << 6) /**< \brief (TC_SR2) RB Loading Status */ -#define TC_SR2_ETRGS (0x1 << 7) /**< \brief (TC_SR2) External Trigger Status */ -#define TC_SR2_CLKSTA (0x1 << 16) /**< \brief (TC_SR2) Clock Enabling Status */ -#define TC_SR2_MTIOA (0x1 << 17) /**< \brief (TC_SR2) TIOA Mirror */ -#define TC_SR2_MTIOB (0x1 << 18) /**< \brief (TC_SR2) TIOB Mirror */ -/* -------- TC_IER2 : (TC Offset: 0xA4) Interrupt Enable Register (channel = 2) -------- */ -#define TC_IER2_COVFS (0x1 << 0) /**< \brief (TC_IER2) Counter Overflow */ -#define TC_IER2_LOVRS (0x1 << 1) /**< \brief (TC_IER2) Load Overrun */ -#define TC_IER2_CPAS (0x1 << 2) /**< \brief (TC_IER2) RA Compare */ -#define TC_IER2_CPBS (0x1 << 3) /**< \brief (TC_IER2) RB Compare */ -#define TC_IER2_CPCS (0x1 << 4) /**< \brief (TC_IER2) RC Compare */ -#define TC_IER2_LDRAS (0x1 << 5) /**< \brief (TC_IER2) RA Loading */ -#define TC_IER2_LDRBS (0x1 << 6) /**< \brief (TC_IER2) RB Loading */ -#define TC_IER2_ETRGS (0x1 << 7) /**< \brief (TC_IER2) External Trigger */ -/* -------- TC_IDR2 : (TC Offset: 0xA8) Interrupt Disable Register (channel = 2) -------- */ -#define TC_IDR2_COVFS (0x1 << 0) /**< \brief (TC_IDR2) Counter Overflow */ -#define TC_IDR2_LOVRS (0x1 << 1) /**< \brief (TC_IDR2) Load Overrun */ -#define TC_IDR2_CPAS (0x1 << 2) /**< \brief (TC_IDR2) RA Compare */ -#define TC_IDR2_CPBS (0x1 << 3) /**< \brief (TC_IDR2) RB Compare */ -#define TC_IDR2_CPCS (0x1 << 4) /**< \brief (TC_IDR2) RC Compare */ -#define TC_IDR2_LDRAS (0x1 << 5) /**< \brief (TC_IDR2) RA Loading */ -#define TC_IDR2_LDRBS (0x1 << 6) /**< \brief (TC_IDR2) RB Loading */ -#define TC_IDR2_ETRGS (0x1 << 7) /**< \brief (TC_IDR2) External Trigger */ -/* -------- TC_IMR2 : (TC Offset: 0xAC) Interrupt Mask Register (channel = 2) -------- */ -#define TC_IMR2_COVFS (0x1 << 0) /**< \brief (TC_IMR2) Counter Overflow */ -#define TC_IMR2_LOVRS (0x1 << 1) /**< \brief (TC_IMR2) Load Overrun */ -#define TC_IMR2_CPAS (0x1 << 2) /**< \brief (TC_IMR2) RA Compare */ -#define TC_IMR2_CPBS (0x1 << 3) /**< \brief (TC_IMR2) RB Compare */ -#define TC_IMR2_CPCS (0x1 << 4) /**< \brief (TC_IMR2) RC Compare */ -#define TC_IMR2_LDRAS (0x1 << 5) /**< \brief (TC_IMR2) RA Loading */ -#define TC_IMR2_LDRBS (0x1 << 6) /**< \brief (TC_IMR2) RB Loading */ -#define TC_IMR2_ETRGS (0x1 << 7) /**< \brief (TC_IMR2) External Trigger */ -/* -------- TC_BCR : (TC Offset: 0xC0) Block Control Register -------- */ -#define TC_BCR_SYNC (0x1 << 0) /**< \brief (TC_BCR) Synchro Command */ -/* -------- TC_BMR : (TC Offset: 0xC4) Block Mode Register -------- */ -#define TC_BMR_TC0XC0S (0x3 << 0) /**< \brief (TC_BMR) External Clock Signal 0 Selection */ -#define TC_BMR_TC0XC0S_TCLK0 (0x0 << 0) /**< \brief (TC_BMR) TCLK0 */ -#define TC_BMR_TC0XC0S_NONE (0x1 << 0) /**< \brief (TC_BMR) none */ -#define TC_BMR_TC0XC0S_TIOA1 (0x2 << 0) /**< \brief (TC_BMR) TIOA1 */ -#define TC_BMR_TC0XC0S_TIOA2 (0x3 << 0) /**< \brief (TC_BMR) TIOA2 */ -#define TC_BMR_TC1XC1S (0x3 << 2) /**< \brief (TC_BMR) External Clock Signal 1 Selection */ -#define TC_BMR_TC1XC1S_TCLK1 (0x0 << 2) /**< \brief (TC_BMR) TCLK1 */ -#define TC_BMR_TC1XC1S_NONE (0x1 << 2) /**< \brief (TC_BMR) none */ -#define TC_BMR_TC1XC1S_TIOA0 (0x2 << 2) /**< \brief (TC_BMR) TIOA0 */ -#define TC_BMR_TC1XC1S_TIOA2 (0x3 << 2) /**< \brief (TC_BMR) TIOA2 */ -#define TC_BMR_TC2XC2S (0x3 << 4) /**< \brief (TC_BMR) External Clock Signal 2 Selection */ -#define TC_BMR_TC2XC2S_TCLK2 (0x0 << 4) /**< \brief (TC_BMR) TCLK2 */ -#define TC_BMR_TC2XC2S_NONE (0x1 << 4) /**< \brief (TC_BMR) none */ -#define TC_BMR_TC2XC2S_TIOA0 (0x2 << 4) /**< \brief (TC_BMR) TIOA0 */ -#define TC_BMR_TC2XC2S_TIOA1 (0x3 << 4) /**< \brief (TC_BMR) TIOA1 */ -#define TC_BMR_QDEN (0x1 << 8) /**< \brief (TC_BMR) Quadrature Decoder ENabled */ -#define TC_BMR_POSEN (0x1 << 9) /**< \brief (TC_BMR) POSition ENabled */ -#define TC_BMR_SPEEDEN (0x1 << 10) /**< \brief (TC_BMR) SPEED ENabled */ -#define TC_BMR_QDTRANS (0x1 << 11) /**< \brief (TC_BMR) Quadrature Decoding TRANSparent */ -#define TC_BMR_EDGPHA (0x1 << 12) /**< \brief (TC_BMR) EDGe on PHA count mode */ -#define TC_BMR_INVA (0x1 << 13) /**< \brief (TC_BMR) INVerted phA */ -#define TC_BMR_INVB (0x1 << 14) /**< \brief (TC_BMR) INVerted phB */ -#define TC_BMR_INVIDX (0x1 << 15) /**< \brief (TC_BMR) INVerted InDeX */ -#define TC_BMR_SWAP (0x1 << 16) /**< \brief (TC_BMR) SWAP PHA and PHB */ -#define TC_BMR_IDXPHB (0x1 << 17) /**< \brief (TC_BMR) InDeX pin is PHB pin */ -#define TC_BMR_FILTER (0x1 << 19) /**< \brief (TC_BMR) */ -#define TC_BMR_MAXFILT (0x3f << 20) /**< \brief (TC_BMR) MAXimum FILTer */ -/* -------- TC_QIER : (TC Offset: 0xC8) QDEC Interrupt Enable Register -------- */ -#define TC_QIER_IDX (0x1 << 0) /**< \brief (TC_QIER) InDeX */ -#define TC_QIER_DIRCHG (0x1 << 1) /**< \brief (TC_QIER) DIRection CHanGe */ -#define TC_QIER_QERR (0x1 << 2) /**< \brief (TC_QIER) Quadrature ERRor */ -/* -------- TC_QIDR : (TC Offset: 0xCC) QDEC Interrupt Disable Register -------- */ -#define TC_QIDR_IDX (0x1 << 0) /**< \brief (TC_QIDR) InDeX */ -#define TC_QIDR_DIRCHG (0x1 << 1) /**< \brief (TC_QIDR) DIRection CHanGe */ -#define TC_QIDR_QERR (0x1 << 2) /**< \brief (TC_QIDR) Quadrature ERRor */ -/* -------- TC_QIMR : (TC Offset: 0xD0) QDEC Interrupt Mask Register -------- */ -#define TC_QIMR_IDX (0x1 << 0) /**< \brief (TC_QIMR) InDeX */ -#define TC_QIMR_DIRCHG (0x1 << 1) /**< \brief (TC_QIMR) DIRection CHanGe */ -#define TC_QIMR_QERR (0x1 << 2) /**< \brief (TC_QIMR) Quadrature ERRor */ -/* -------- TC_QISR : (TC Offset: 0xD4) QDEC Interrupt Status Register -------- */ -#define TC_QISR_IDX (0x1 << 0) /**< \brief (TC_QISR) InDeX */ -#define TC_QISR_DIRCHG (0x1 << 1) /**< \brief (TC_QISR) DIRection CHanGe */ -#define TC_QISR_QERR (0x1 << 2) /**< \brief (TC_QISR) Quadrature ERRor */ -#define TC_QISR_DIR (0x1 << 8) /**< \brief (TC_QISR) Direction */ -/* -------- TC_VER : (TC Offset: 0xFC) Version Register -------- */ -#define TC_VER_VERSION (0xfff << 0) /**< \brief (TC_VER) */ -#define TC_VER_MFN (0x7 << 16) /**< \brief (TC_VER) */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Two-wire Interface */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_TWI Two-wire Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Twi hardware registers */ -typedef struct { - WoReg TWI_CR; /**< \brief (Twi Offset: 0x00) Control Register */ - RwReg TWI_MMR; /**< \brief (Twi Offset: 0x04) Master Mode Register */ - RwReg TWI_SMR; /**< \brief (Twi Offset: 0x08) Slave Mode Register */ - RwReg TWI_IADR; /**< \brief (Twi Offset: 0x0C) Internal Address Register */ - RwReg TWI_CWGR; /**< \brief (Twi Offset: 0x10) Clock Waveform Generator Register */ - RwReg Reserved1[3]; - RoReg TWI_SR; /**< \brief (Twi Offset: 0x20) Status Register */ - WoReg TWI_IER; /**< \brief (Twi Offset: 0x24) Interrupt Enable Register */ - WoReg TWI_IDR; /**< \brief (Twi Offset: 0x28) Interrupt Disable Register */ - RoReg TWI_IMR; /**< \brief (Twi Offset: 0x2C) Interrupt Mask Register */ - RoReg TWI_RHR; /**< \brief (Twi Offset: 0x30) Receive Holding Register */ - WoReg TWI_THR; /**< \brief (Twi Offset: 0x34) Transmit Holding Register */ - RwReg Reserved2[50]; - RwReg TWI_RPR; /**< \brief (Twi Offset: 0x100) Receive Pointer Register */ - RwReg TWI_RCR; /**< \brief (Twi Offset: 0x104) Receive Counter Register */ - RwReg TWI_TPR; /**< \brief (Twi Offset: 0x108) Transmit Pointer Register */ - RwReg TWI_TCR; /**< \brief (Twi Offset: 0x10C) Transmit Counter Register */ - RwReg TWI_RNPR; /**< \brief (Twi Offset: 0x110) Receive Next Pointer Register */ - RwReg TWI_RNCR; /**< \brief (Twi Offset: 0x114) Receive Next Counter Register */ - RwReg TWI_TNPR; /**< \brief (Twi Offset: 0x118) Transmit Next Pointer Register */ - RwReg TWI_TNCR; /**< \brief (Twi Offset: 0x11C) Transmit Next Counter Register */ - WoReg TWI_PTCR; /**< \brief (Twi Offset: 0x120) Transfer Control Register */ - RoReg TWI_PTSR; /**< \brief (Twi Offset: 0x124) Transfer Status Register */ -} Twi; -#endif /* __ASSEMBLY__ */ -/* -------- TWI_CR : (TWI Offset: 0x00) Control Register -------- */ -#define TWI_CR_START (0x1 << 0) /**< \brief (TWI_CR) Send a START Condition */ -#define TWI_CR_STOP (0x1 << 1) /**< \brief (TWI_CR) Send a STOP Condition */ -#define TWI_CR_MSEN (0x1 << 2) /**< \brief (TWI_CR) TWI Master Mode Enabled */ -#define TWI_CR_MSDIS (0x1 << 3) /**< \brief (TWI_CR) TWI Master Mode Disabled */ -#define TWI_CR_SVEN (0x1 << 4) /**< \brief (TWI_CR) TWI Slave Mode Enabled */ -#define TWI_CR_SVDIS (0x1 << 5) /**< \brief (TWI_CR) TWI Slave Mode Disabled */ -#define TWI_CR_QUICK (0x1 << 6) /**< \brief (TWI_CR) SMBUS Quick Command */ -#define TWI_CR_SWRST (0x1 << 7) /**< \brief (TWI_CR) Software Reset */ -/* -------- TWI_MMR : (TWI Offset: 0x04) Master Mode Register -------- */ -#define TWI_MMR_IADRSZ (0x3 << 8) /**< \brief (TWI_MMR) Internal Device Address Size */ -#define TWI_MMR_IADRSZ_NO (0x0 << 8) /**< \brief (TWI_MMR) No internal device address */ -#define TWI_MMR_IADRSZ_1_BYTE (0x1 << 8) /**< \brief (TWI_MMR) One-byte internal device address */ -#define TWI_MMR_IADRSZ_2_BYTE (0x2 << 8) /**< \brief (TWI_MMR) Two-byte internal device address */ -#define TWI_MMR_IADRSZ_3_BYTE (0x3 << 8) /**< \brief (TWI_MMR) Three-byte internal device address */ -#define TWI_MMR_MREAD (0x1 << 12) /**< \brief (TWI_MMR) Master Read Direction */ -#define TWI_MMR_DADR (0x7f << 16) /**< \brief (TWI_MMR) Device Address */ -/* -------- TWI_SMR : (TWI Offset: 0x08) Slave Mode Register -------- */ -#define TWI_SMR_SADR (0x7f << 16) /**< \brief (TWI_SMR) Slave Address */ -/* -------- TWI_IADR : (TWI Offset: 0x0C) Internal Address Register -------- */ -#define TWI_IADR_IADR (0xffffff << 0) /**< \brief (TWI_IADR) Internal Address */ -/* -------- TWI_CWGR : (TWI Offset: 0x10) Clock Waveform Generator Register -------- */ -#define TWI_CWGR_CLDIV (0xff << 0) /**< \brief (TWI_CWGR) Clock Low Divider */ -#define TWI_CWGR_CHDIV (0xff << 8) /**< \brief (TWI_CWGR) Clock High Divider */ -#define TWI_CWGR_CKDIV (0x7 << 16) /**< \brief (TWI_CWGR) Clock Divider */ -/* -------- TWI_SR : (TWI Offset: 0x20) Status Register -------- */ -#define TWI_SR_TXCOMP (0x1 << 0) /**< \brief (TWI_SR) Transmission Completed (automatically set / reset) */ -#define TWI_SR_RXRDY (0x1 << 1) /**< \brief (TWI_SR) Receive Holding Register Ready (automatically set / reset) */ -#define TWI_SR_TXRDY (0x1 << 2) /**< \brief (TWI_SR) Transmit Holding Register Ready (automatically set / reset) */ -#define TWI_SR_SVREAD (0x1 << 3) /**< \brief (TWI_SR) Slave Read (automatically set / reset) */ -#define TWI_SR_SVACC (0x1 << 4) /**< \brief (TWI_SR) Slave Access (automatically set / reset) */ -#define TWI_SR_GACC (0x1 << 5) /**< \brief (TWI_SR) General Call Access (clear on read) */ -#define TWI_SR_OVRE (0x1 << 6) /**< \brief (TWI_SR) Overrun Error (clear on read) */ -#define TWI_SR_NACK (0x1 << 8) /**< \brief (TWI_SR) Not Acknowledged (clear on read) */ -#define TWI_SR_ARBLST (0x1 << 9) /**< \brief (TWI_SR) Arbitration Lost (clear on read) */ -#define TWI_SR_SCLWS (0x1 << 10) /**< \brief (TWI_SR) Clock Wait State (automatically set / reset) */ -#define TWI_SR_EOSACC (0x1 << 11) /**< \brief (TWI_SR) End Of Slave Access (clear on read) */ -#define TWI_SR_ENDRX (0x1 << 12) /**< \brief (TWI_SR) End of RX buffer */ -#define TWI_SR_ENDTX (0x1 << 13) /**< \brief (TWI_SR) End of TX buffer */ -#define TWI_SR_RXBUFF (0x1 << 14) /**< \brief (TWI_SR) RX Buffer Full */ -#define TWI_SR_TXBUFE (0x1 << 15) /**< \brief (TWI_SR) TX Buffer Empty */ -/* -------- TWI_IER : (TWI Offset: 0x24) Interrupt Enable Register -------- */ -#define TWI_IER_TXCOMP (0x1 << 0) /**< \brief (TWI_IER) Transmission Completed Interrupt Enable */ -#define TWI_IER_RXRDY (0x1 << 1) /**< \brief (TWI_IER) Receive Holding Register Ready Interrupt Enable */ -#define TWI_IER_TXRDY (0x1 << 2) /**< \brief (TWI_IER) Transmit Holding Register Ready Interrupt Enable */ -#define TWI_IER_SVACC (0x1 << 4) /**< \brief (TWI_IER) Slave Access Interrupt Enable */ -#define TWI_IER_GACC (0x1 << 5) /**< \brief (TWI_IER) General Call Access Interrupt Enable */ -#define TWI_IER_OVRE (0x1 << 6) /**< \brief (TWI_IER) Overrun Error Interrupt Enable */ -#define TWI_IER_NACK (0x1 << 8) /**< \brief (TWI_IER) Not Acknowledge Interrupt Enable */ -#define TWI_IER_ARBLST (0x1 << 9) /**< \brief (TWI_IER) Arbitration Lost Interrupt Enable */ -#define TWI_IER_SCL_WS (0x1 << 10) /**< \brief (TWI_IER) Clock Wait State Interrupt Enable */ -#define TWI_IER_EOSACC (0x1 << 11) /**< \brief (TWI_IER) End Of Slave Access Interrupt Enable */ -#define TWI_IER_ENDRX (0x1 << 12) /**< \brief (TWI_IER) End of Receive Buffer Interrupt Enable */ -#define TWI_IER_ENDTX (0x1 << 13) /**< \brief (TWI_IER) End of Transmit Buffer Interrupt Enable */ -#define TWI_IER_RXBUFF (0x1 << 14) /**< \brief (TWI_IER) Receive Buffer Full Interrupt Enable */ -#define TWI_IER_TXBUFE (0x1 << 15) /**< \brief (TWI_IER) Transmit Buffer Empty Interrupt Enable */ -/* -------- TWI_IDR : (TWI Offset: 0x28) Interrupt Disable Register -------- */ -#define TWI_IDR_TXCOMP (0x1 << 0) /**< \brief (TWI_IDR) Transmission Completed Interrupt Disable */ -#define TWI_IDR_RXRDY (0x1 << 1) /**< \brief (TWI_IDR) Receive Holding Register Ready Interrupt Disable */ -#define TWI_IDR_TXRDY (0x1 << 2) /**< \brief (TWI_IDR) Transmit Holding Register Ready Interrupt Disable */ -#define TWI_IDR_SVACC (0x1 << 4) /**< \brief (TWI_IDR) Slave Access Interrupt Disable */ -#define TWI_IDR_GACC (0x1 << 5) /**< \brief (TWI_IDR) General Call Access Interrupt Disable */ -#define TWI_IDR_OVRE (0x1 << 6) /**< \brief (TWI_IDR) Overrun Error Interrupt Disable */ -#define TWI_IDR_NACK (0x1 << 8) /**< \brief (TWI_IDR) Not Acknowledge Interrupt Disable */ -#define TWI_IDR_ARBLST (0x1 << 9) /**< \brief (TWI_IDR) Arbitration Lost Interrupt Disable */ -#define TWI_IDR_SCL_WS (0x1 << 10) /**< \brief (TWI_IDR) Clock Wait State Interrupt Disable */ -#define TWI_IDR_EOSACC (0x1 << 11) /**< \brief (TWI_IDR) End Of Slave Access Interrupt Disable */ -#define TWI_IDR_ENDRX (0x1 << 12) /**< \brief (TWI_IDR) End of Receive Buffer Interrupt Disable */ -#define TWI_IDR_ENDTX (0x1 << 13) /**< \brief (TWI_IDR) End of Transmit Buffer Interrupt Disable */ -#define TWI_IDR_RXBUFF (0x1 << 14) /**< \brief (TWI_IDR) Receive Buffer Full Interrupt Disable */ -#define TWI_IDR_TXBUFE (0x1 << 15) /**< \brief (TWI_IDR) Transmit Buffer Empty Interrupt Disable */ -/* -------- TWI_IMR : (TWI Offset: 0x2C) Interrupt Mask Register -------- */ -#define TWI_IMR_TXCOMP (0x1 << 0) /**< \brief (TWI_IMR) Transmission Completed Interrupt Mask */ -#define TWI_IMR_RXRDY (0x1 << 1) /**< \brief (TWI_IMR) Receive Holding Register Ready Interrupt Mask */ -#define TWI_IMR_TXRDY (0x1 << 2) /**< \brief (TWI_IMR) Transmit Holding Register Ready Interrupt Mask */ -#define TWI_IMR_SVACC (0x1 << 4) /**< \brief (TWI_IMR) Slave Access Interrupt Mask */ -#define TWI_IMR_GACC (0x1 << 5) /**< \brief (TWI_IMR) General Call Access Interrupt Mask */ -#define TWI_IMR_OVRE (0x1 << 6) /**< \brief (TWI_IMR) Overrun Error Interrupt Mask */ -#define TWI_IMR_NACK (0x1 << 8) /**< \brief (TWI_IMR) Not Acknowledge Interrupt Mask */ -#define TWI_IMR_ARBLST (0x1 << 9) /**< \brief (TWI_IMR) Arbitration Lost Interrupt Mask */ -#define TWI_IMR_SCL_WS (0x1 << 10) /**< \brief (TWI_IMR) Clock Wait State Interrupt Mask */ -#define TWI_IMR_EOSACC (0x1 << 11) /**< \brief (TWI_IMR) End Of Slave Access Interrupt Mask */ -#define TWI_IMR_ENDRX (0x1 << 12) /**< \brief (TWI_IMR) End of Receive Buffer Interrupt Mask */ -#define TWI_IMR_ENDTX (0x1 << 13) /**< \brief (TWI_IMR) End of Transmit Buffer Interrupt Mask */ -#define TWI_IMR_RXBUFF (0x1 << 14) /**< \brief (TWI_IMR) Receive Buffer Full Interrupt Mask */ -#define TWI_IMR_TXBUFE (0x1 << 15) /**< \brief (TWI_IMR) Transmit Buffer Empty Interrupt Mask */ -/* -------- TWI_RHR : (TWI Offset: 0x30) Receive Holding Register -------- */ -#define TWI_RHR_RXDATA (0xff << 0) /**< \brief (TWI_RHR) Master or Slave Receive Holding Data */ -/* -------- TWI_THR : (TWI Offset: 0x34) Transmit Holding Register -------- */ -#define TWI_THR_TXDATA (0xff << 0) /**< \brief (TWI_THR) Master or Slave Transmit Holding Data */ -/* -------- TWI_RPR : (TWI Offset: 0x100) Receive Pointer Register -------- */ -#define TWI_RPR_RXPTR (0xffffffff << 0) /**< \brief (TWI_RPR) Receive Pointer Register */ -/* -------- TWI_RCR : (TWI Offset: 0x104) Receive Counter Register -------- */ -#define TWI_RCR_RXCTR (0xffff << 0) /**< \brief (TWI_RCR) Receive Counter Register */ -/* -------- TWI_TPR : (TWI Offset: 0x108) Transmit Pointer Register -------- */ -#define TWI_TPR_TXPTR (0xffffffff << 0) /**< \brief (TWI_TPR) Transmit Counter Register */ -/* -------- TWI_TCR : (TWI Offset: 0x10C) Transmit Counter Register -------- */ -#define TWI_TCR_TXCTR (0xffff << 0) /**< \brief (TWI_TCR) Transmit Counter Register */ -/* -------- TWI_RNPR : (TWI Offset: 0x110) Receive Next Pointer Register -------- */ -#define TWI_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (TWI_RNPR) Receive Next Pointer */ -/* -------- TWI_RNCR : (TWI Offset: 0x114) Receive Next Counter Register -------- */ -#define TWI_RNCR_RXNCTR (0xffff << 0) /**< \brief (TWI_RNCR) Receive Next Counter */ -/* -------- TWI_TNPR : (TWI Offset: 0x118) Transmit Next Pointer Register -------- */ -#define TWI_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (TWI_TNPR) Transmit Next Pointer */ -/* -------- TWI_TNCR : (TWI Offset: 0x11C) Transmit Next Counter Register -------- */ -#define TWI_TNCR_TXNCTR (0xffff << 0) /**< \brief (TWI_TNCR) Transmit Counter Next */ -/* -------- TWI_PTCR : (TWI Offset: 0x120) Transfer Control Register -------- */ -#define TWI_PTCR_RXTEN (0x1 << 0) /**< \brief (TWI_PTCR) Receiver Transfer Enable */ -#define TWI_PTCR_RXTDIS (0x1 << 1) /**< \brief (TWI_PTCR) Receiver Transfer Disable */ -#define TWI_PTCR_TXTEN (0x1 << 8) /**< \brief (TWI_PTCR) Transmitter Transfer Enable */ -#define TWI_PTCR_TXTDIS (0x1 << 9) /**< \brief (TWI_PTCR) Transmitter Transfer Disable */ -/* -------- TWI_PTSR : (TWI Offset: 0x124) Transfer Status Register -------- */ -#define TWI_PTSR_RXTEN (0x1 << 0) /**< \brief (TWI_PTSR) Receiver Transfer Enable */ -#define TWI_PTSR_TXTEN (0x1 << 8) /**< \brief (TWI_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Universal Asynchronous Receiver Transmitter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_UART Universal Asynchronous Receiver Transmitter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Uart hardware registers */ -typedef struct { - WoReg UART_CR; /**< \brief (Uart Offset: 0x0000) Control Register */ - RwReg UART_MR; /**< \brief (Uart Offset: 0x0004) Mode Register */ - WoReg UART_IER; /**< \brief (Uart Offset: 0x0008) Interrupt Enable Register */ - WoReg UART_IDR; /**< \brief (Uart Offset: 0x000C) Interrupt Disable Register */ - RoReg UART_IMR; /**< \brief (Uart Offset: 0x0010) Interrupt Mask Register */ - RoReg UART_SR; /**< \brief (Uart Offset: 0x0014) Status Register */ - RoReg UART_RHR; /**< \brief (Uart Offset: 0x0018) Receive Holding Register */ - WoReg UART_THR; /**< \brief (Uart Offset: 0x001C) Transmit Holding Register */ - RwReg UART_BRGR; /**< \brief (Uart Offset: 0x0020) Baud Rate Generator Register */ - RwReg Reserved1[55]; - RwReg UART_RPR; /**< \brief (Uart Offset: 0x100) Receive Pointer Register */ - RwReg UART_RCR; /**< \brief (Uart Offset: 0x104) Receive Counter Register */ - RwReg UART_TPR; /**< \brief (Uart Offset: 0x108) Transmit Pointer Register */ - RwReg UART_TCR; /**< \brief (Uart Offset: 0x10C) Transmit Counter Register */ - RwReg UART_RNPR; /**< \brief (Uart Offset: 0x110) Receive Next Pointer Register */ - RwReg UART_RNCR; /**< \brief (Uart Offset: 0x114) Receive Next Counter Register */ - RwReg UART_TNPR; /**< \brief (Uart Offset: 0x118) Transmit Next Pointer Register */ - RwReg UART_TNCR; /**< \brief (Uart Offset: 0x11C) Transmit Next Counter Register */ - WoReg UART_PTCR; /**< \brief (Uart Offset: 0x120) Transfer Control Register */ - RoReg UART_PTSR; /**< \brief (Uart Offset: 0x124) Transfer Status Register */ -} Uart; -#endif /* __ASSEMBLY__ */ -/* -------- UART_CR : (UART Offset: 0x0000) Control Register -------- */ -#define UART_CR_RSTRX (0x1 << 2) /**< \brief (UART_CR) Reset Receiver */ -#define UART_CR_RSTTX (0x1 << 3) /**< \brief (UART_CR) Reset Transmitter */ -#define UART_CR_RXEN (0x1 << 4) /**< \brief (UART_CR) Receiver Enable */ -#define UART_CR_RXDIS (0x1 << 5) /**< \brief (UART_CR) Receiver Disable */ -#define UART_CR_TXEN (0x1 << 6) /**< \brief (UART_CR) Transmitter Enable */ -#define UART_CR_TXDIS (0x1 << 7) /**< \brief (UART_CR) Transmitter Disable */ -#define UART_CR_RSTSTA (0x1 << 8) /**< \brief (UART_CR) Reset Status Bits */ -/* -------- UART_MR : (UART Offset: 0x0004) Mode Register -------- */ -#define UART_MR_PAR (0x7 << 9) /**< \brief (UART_MR) Parity Type */ -#define UART_MR_CHMODE (0x3 << 14) /**< \brief (UART_MR) Channel Mode */ -/* -------- UART_IER : (UART Offset: 0x0008) Interrupt Enable Register -------- */ -#define UART_IER_RXRDY (0x1 << 0) /**< \brief (UART_IER) Enable RXRDY Interrupt */ -#define UART_IER_TXRDY (0x1 << 1) /**< \brief (UART_IER) Enable TXRDY Interrupt */ -#define UART_IER_ENDRX (0x1 << 3) /**< \brief (UART_IER) Enable End of Receive Transfer Interrupt */ -#define UART_IER_ENDTX (0x1 << 4) /**< \brief (UART_IER) Enable End of Transmit Interrupt */ -#define UART_IER_OVRE (0x1 << 5) /**< \brief (UART_IER) Enable Overrun Error Interrupt */ -#define UART_IER_FRAME (0x1 << 6) /**< \brief (UART_IER) Enable Framing Error Interrupt */ -#define UART_IER_PARE (0x1 << 7) /**< \brief (UART_IER) Enable Parity Error Interrupt */ -#define UART_IER_TXEMPTY (0x1 << 9) /**< \brief (UART_IER) Enable TXEMPTY Interrupt */ -#define UART_IER_TXBUFE (0x1 << 11) /**< \brief (UART_IER) Enable Buffer Empty Interrupt */ -#define UART_IER_RXBUFF (0x1 << 12) /**< \brief (UART_IER) Enable Buffer Full Interrupt */ -/* -------- UART_IDR : (UART Offset: 0x000C) Interrupt Disable Register -------- */ -#define UART_IDR_RXRDY (0x1 << 0) /**< \brief (UART_IDR) Disable RXRDY Interrupt */ -#define UART_IDR_TXRDY (0x1 << 1) /**< \brief (UART_IDR) Disable TXRDY Interrupt */ -#define UART_IDR_ENDRX (0x1 << 3) /**< \brief (UART_IDR) Disable End of Receive Transfer Interrupt */ -#define UART_IDR_ENDTX (0x1 << 4) /**< \brief (UART_IDR) Disable End of Transmit Interrupt */ -#define UART_IDR_OVRE (0x1 << 5) /**< \brief (UART_IDR) Disable Overrun Error Interrupt */ -#define UART_IDR_FRAME (0x1 << 6) /**< \brief (UART_IDR) Disable Framing Error Interrupt */ -#define UART_IDR_PARE (0x1 << 7) /**< \brief (UART_IDR) Disable Parity Error Interrupt */ -#define UART_IDR_TXEMPTY (0x1 << 9) /**< \brief (UART_IDR) Disable TXEMPTY Interrupt */ -#define UART_IDR_TXBUFE (0x1 << 11) /**< \brief (UART_IDR) Disable Buffer Empty Interrupt */ -#define UART_IDR_RXBUFF (0x1 << 12) /**< \brief (UART_IDR) Disable Buffer Full Interrupt */ -/* -------- UART_IMR : (UART Offset: 0x0010) Interrupt Mask Register -------- */ -#define UART_IMR_RXRDY (0x1 << 0) /**< \brief (UART_IMR) Mask RXRDY Interrupt */ -#define UART_IMR_TXRDY (0x1 << 1) /**< \brief (UART_IMR) Disable TXRDY Interrupt */ -#define UART_IMR_ENDRX (0x1 << 3) /**< \brief (UART_IMR) Mask End of Receive Transfer Interrupt */ -#define UART_IMR_ENDTX (0x1 << 4) /**< \brief (UART_IMR) Mask End of Transmit Interrupt */ -#define UART_IMR_OVRE (0x1 << 5) /**< \brief (UART_IMR) Mask Overrun Error Interrupt */ -#define UART_IMR_FRAME (0x1 << 6) /**< \brief (UART_IMR) Mask Framing Error Interrupt */ -#define UART_IMR_PARE (0x1 << 7) /**< \brief (UART_IMR) Mask Parity Error Interrupt */ -#define UART_IMR_TXEMPTY (0x1 << 9) /**< \brief (UART_IMR) Mask TXEMPTY Interrupt */ -#define UART_IMR_TXBUFE (0x1 << 11) /**< \brief (UART_IMR) Mask TXBUFE Interrupt */ -#define UART_IMR_RXBUFF (0x1 << 12) /**< \brief (UART_IMR) Mask RXBUFF Interrupt */ -/* -------- UART_SR : (UART Offset: 0x0014) Status Register -------- */ -#define UART_SR_RXRDY (0x1 << 0) /**< \brief (UART_SR) Receiver Ready */ -#define UART_SR_TXRDY (0x1 << 1) /**< \brief (UART_SR) Transmitter Ready */ -#define UART_SR_ENDRX (0x1 << 3) /**< \brief (UART_SR) End of Receiver Transfer */ -#define UART_SR_ENDTX (0x1 << 4) /**< \brief (UART_SR) End of Transmitter Transfer */ -#define UART_SR_OVRE (0x1 << 5) /**< \brief (UART_SR) Overrun Error */ -#define UART_SR_FRAME (0x1 << 6) /**< \brief (UART_SR) Framing Error */ -#define UART_SR_PARE (0x1 << 7) /**< \brief (UART_SR) Parity Error */ -#define UART_SR_TXEMPTY (0x1 << 9) /**< \brief (UART_SR) Transmitter Empty */ -#define UART_SR_TXBUFE (0x1 << 11) /**< \brief (UART_SR) Transmission Buffer Empty */ -#define UART_SR_RXBUFF (0x1 << 12) /**< \brief (UART_SR) Receive Buffer Full */ -/* -------- UART_RHR : (UART Offset: 0x0018) Receive Holding Register -------- */ -#define UART_RHR_RXCHR (0xff << 0) /**< \brief (UART_RHR) Received Character */ -/* -------- UART_THR : (UART Offset: 0x001C) Transmit Holding Register -------- */ -#define UART_THR_TXCHR (0xff << 0) /**< \brief (UART_THR) Character to be Transmitted */ -/* -------- UART_BRGR : (UART Offset: 0x0020) Baud Rate Generator Register -------- */ -#define UART_BRGR_CD (0xffff << 0) /**< \brief (UART_BRGR) Clock Divisor */ -/* -------- UART_RPR : (UART Offset: 0x100) Receive Pointer Register -------- */ -#define UART_RPR_RXPTR (0xffffffff << 0) /**< \brief (UART_RPR) Receive Pointer Register */ -/* -------- UART_RCR : (UART Offset: 0x104) Receive Counter Register -------- */ -#define UART_RCR_RXCTR (0xffff << 0) /**< \brief (UART_RCR) Receive Counter Register */ -/* -------- UART_TPR : (UART Offset: 0x108) Transmit Pointer Register -------- */ -#define UART_TPR_TXPTR (0xffffffff << 0) /**< \brief (UART_TPR) Transmit Counter Register */ -/* -------- UART_TCR : (UART Offset: 0x10C) Transmit Counter Register -------- */ -#define UART_TCR_TXCTR (0xffff << 0) /**< \brief (UART_TCR) Transmit Counter Register */ -/* -------- UART_RNPR : (UART Offset: 0x110) Receive Next Pointer Register -------- */ -#define UART_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (UART_RNPR) Receive Next Pointer */ -/* -------- UART_RNCR : (UART Offset: 0x114) Receive Next Counter Register -------- */ -#define UART_RNCR_RXNCTR (0xffff << 0) /**< \brief (UART_RNCR) Receive Next Counter */ -/* -------- UART_TNPR : (UART Offset: 0x118) Transmit Next Pointer Register -------- */ -#define UART_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (UART_TNPR) Transmit Next Pointer */ -/* -------- UART_TNCR : (UART Offset: 0x11C) Transmit Next Counter Register -------- */ -#define UART_TNCR_TXNCTR (0xffff << 0) /**< \brief (UART_TNCR) Transmit Counter Next */ -/* -------- UART_PTCR : (UART Offset: 0x120) Transfer Control Register -------- */ -#define UART_PTCR_RXTEN (0x1 << 0) /**< \brief (UART_PTCR) Receiver Transfer Enable */ -#define UART_PTCR_RXTDIS (0x1 << 1) /**< \brief (UART_PTCR) Receiver Transfer Disable */ -#define UART_PTCR_TXTEN (0x1 << 8) /**< \brief (UART_PTCR) Transmitter Transfer Enable */ -#define UART_PTCR_TXTDIS (0x1 << 9) /**< \brief (UART_PTCR) Transmitter Transfer Disable */ -/* -------- UART_PTSR : (UART Offset: 0x124) Transfer Status Register -------- */ -#define UART_PTSR_RXTEN (0x1 << 0) /**< \brief (UART_PTSR) Receiver Transfer Enable */ -#define UART_PTSR_TXTEN (0x1 << 8) /**< \brief (UART_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR USB High Speed Device Port */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_UDPHS USB High Speed Device Port */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief UdphsDma hardware registers */ -typedef struct { - RwReg UDPHS_DMANXTDSC; /**< \brief (UdphsDma Offset: 0x0) UDPHS DMA Next Descriptor Address Register */ - RwReg UDPHS_DMAADDRESS; /**< \brief (UdphsDma Offset: 0x4) UDPHS DMA Channel Address Register */ - RwReg UDPHS_DMACONTROL; /**< \brief (UdphsDma Offset: 0x8) UDPHS DMA Channel Control Register */ - RwReg UDPHS_DMASTATUS; /**< \brief (UdphsDma Offset: 0xC) UDPHS DMA Channel Status Register */ -} UdphsDma; -/** \brief UdphsEpt hardware registers */ -typedef struct { - RwReg UDPHS_EPTCFG; /**< \brief (UdphsEpt Offset: 0x0) UDPHS Endpoint Configuration Register */ - RwReg UDPHS_EPTCTLENB; /**< \brief (UdphsEpt Offset: 0x4) UDPHS Endpoint Control Enable Register */ - RwReg UDPHS_EPTCTLDIS; /**< \brief (UdphsEpt Offset: 0x8) UDPHS Endpoint Control Disable Register */ - RwReg UDPHS_EPTCTL; /**< \brief (UdphsEpt Offset: 0xC) UDPHS Endpoint Control Register */ - RwReg Reserved1[1]; - RwReg UDPHS_EPTSETSTA; /**< \brief (UdphsEpt Offset: 0x14) UDPHS Endpoint Set Status Register */ - RwReg UDPHS_EPTCLRSTA; /**< \brief (UdphsEpt Offset: 0x18) UDPHS Endpoint Clear Status Register */ - RwReg UDPHS_EPTSTA; /**< \brief (UdphsEpt Offset: 0x1C) UDPHS Endpoint Status Register */ -} UdphsEpt; -/** \brief Udphs hardware registers */ -typedef struct { - RwReg UDPHS_CTRL; /**< \brief (Udphs Offset: 0x00) UDPHS Control Register */ - RoReg UDPHS_FNUM; /**< \brief (Udphs Offset: 0x04) UDPHS Frame Number Register */ - RwReg Reserved1[2]; - RwReg UDPHS_IEN; /**< \brief (Udphs Offset: 0x10) UDPHS Interrupt Enable Register */ - RoReg UDPHS_INTSTA; /**< \brief (Udphs Offset: 0x14) UDPHS Interrupt Status Register */ - WoReg UDPHS_CLRINT; /**< \brief (Udphs Offset: 0x18) UDPHS Clear Interrupt Register */ - WoReg UDPHS_EPTRST; /**< \brief (Udphs Offset: 0x1C) UDPHS Endpoints Reset Register */ - RwReg Reserved2[48]; - RwReg UDPHS_TST; /**< \brief (Udphs Offset: 0xE0) UDPHS Test Register */ - RwReg Reserved3[3]; - RoReg UDPHS_IPNAME1; /**< \brief (Udphs Offset: 0xF0) UDPHS Name1 Register */ - RoReg UDPHS_IPNAME2; /**< \brief (Udphs Offset: 0xF4) UDPHS Name2 Register */ - RoReg UDPHS_IPFEATURES; /**< \brief (Udphs Offset: 0xF8) UDPHS Features Register */ - RwReg Reserved4[1]; - UdphsEpt UDPHS_EPT[7]; /**< \brief (Udphs Offset: 0x100) endpoint = 0 .. 6 */ - RwReg Reserved5[80]; - UdphsDma UDPHS_DMA[5]; /**< \brief (Udphs Offset: 0x320) channel = 1 .. 5 */ -} Udphs; -#endif /* __ASSEMBLY__ */ -/* -------- UDPHS_CTRL : (UDPHS Offset: 0x00) UDPHS Control Register -------- */ -#define UDPHS_CTRL_DEV_ADDR (0x7f << 0) /**< \brief (UDPHS_CTRL) UDPHS Address */ -#define UDPHS_CTRL_FADDR_EN (0x1 << 7) /**< \brief (UDPHS_CTRL) Function Address Enable */ -#define UDPHS_CTRL_EN_UDPHS (0x1 << 8) /**< \brief (UDPHS_CTRL) UDPHS Enable */ -#define UDPHS_CTRL_DETACH (0x1 << 9) /**< \brief (UDPHS_CTRL) Detach Command */ -#define UDPHS_CTRL_REWAKEUP (0x1 << 10) /**< \brief (UDPHS_CTRL) Send Remote Wake Up */ -#define UDPHS_CTRL_PULLD_DIS (0x1 << 11) /**< \brief (UDPHS_CTRL) Pull-Down Disable */ -/* -------- UDPHS_FNUM : (UDPHS Offset: 0x04) UDPHS Frame Number Register -------- */ -#define UDPHS_FNUM_MICRO_FRAME_NUM (0x7 << 0) /**< \brief (UDPHS_FNUM) Microframe Number */ -#define UDPHS_FNUM_FRAME_NUMBER (0x7ff << 3) /**< \brief (UDPHS_FNUM) Frame Number as defined in the Packet Field Formats */ -#define UDPHS_FNUM_FNUM_ERR (0x1 << 31) /**< \brief (UDPHS_FNUM) Frame Number CRC Error */ -/* -------- UDPHS_IEN : (UDPHS Offset: 0x10) UDPHS Interrupt Enable Register -------- */ -#define UDPHS_IEN_DET_SUSPD (0x1 << 1) /**< \brief (UDPHS_IEN) Suspend Interrupt Enable */ -#define UDPHS_IEN_MICRO_SOF (0x1 << 2) /**< \brief (UDPHS_IEN) Micro-SOF Interrupt Enable */ -#define UDPHS_IEN_INT_SOF (0x1 << 3) /**< \brief (UDPHS_IEN) SOF Interrupt Enable */ -#define UDPHS_IEN_ENDRESET (0x1 << 4) /**< \brief (UDPHS_IEN) End Of Reset Interrupt Enable */ -#define UDPHS_IEN_WAKE_UP (0x1 << 5) /**< \brief (UDPHS_IEN) Wake Up CPU Interrupt Enable */ -#define UDPHS_IEN_ENDOFRSM (0x1 << 6) /**< \brief (UDPHS_IEN) End Of Resume Interrupt Enable */ -#define UDPHS_IEN_UPSTR_RES (0x1 << 7) /**< \brief (UDPHS_IEN) Upstream Resume Interrupt Enable */ -#define UDPHS_IEN_EPT_0 (0x1 << 8) /**< \brief (UDPHS_IEN) Endpoint 0 Interrupt Enable */ -#define UDPHS_IEN_EPT_1 (0x1 << 9) /**< \brief (UDPHS_IEN) Endpoint 1 Interrupt Enable */ -#define UDPHS_IEN_EPT_2 (0x1 << 10) /**< \brief (UDPHS_IEN) Endpoint 2 Interrupt Enable */ -#define UDPHS_IEN_EPT_3 (0x1 << 11) /**< \brief (UDPHS_IEN) Endpoint 3 Interrupt Enable */ -#define UDPHS_IEN_EPT_4 (0x1 << 12) /**< \brief (UDPHS_IEN) Endpoint 4 Interrupt Enable */ -#define UDPHS_IEN_EPT_5 (0x1 << 13) /**< \brief (UDPHS_IEN) Endpoint 5 Interrupt Enable */ -#define UDPHS_IEN_EPT_6 (0x1 << 14) /**< \brief (UDPHS_IEN) Endpoint 6 Interrupt Enable */ -#define UDPHS_IEN_DMA_1 (0x1 << 25) /**< \brief (UDPHS_IEN) DMA Channel 1 Interrupt Enable */ -#define UDPHS_IEN_DMA_2 (0x1 << 26) /**< \brief (UDPHS_IEN) DMA Channel 2 Interrupt Enable */ -#define UDPHS_IEN_DMA_3 (0x1 << 27) /**< \brief (UDPHS_IEN) DMA Channel 3 Interrupt Enable */ -#define UDPHS_IEN_DMA_4 (0x1 << 28) /**< \brief (UDPHS_IEN) DMA Channel 4 Interrupt Enable */ -#define UDPHS_IEN_DMA_5 (0x1 << 29) /**< \brief (UDPHS_IEN) DMA Channel 5 Interrupt Enable */ -#define UDPHS_IEN_DMA_6 (0x1 << 30) /**< \brief (UDPHS_IEN) DMA Channel 6 Interrupt Enable */ -/* -------- UDPHS_INTSTA : (UDPHS Offset: 0x14) UDPHS Interrupt Status Register -------- */ -#define UDPHS_INTSTA_SPEED (0x1 << 0) /**< \brief (UDPHS_INTSTA) Speed Status */ -#define UDPHS_INTSTA_DET_SUSPD (0x1 << 1) /**< \brief (UDPHS_INTSTA) Suspend Interrupt */ -#define UDPHS_INTSTA_MICRO_SOF (0x1 << 2) /**< \brief (UDPHS_INTSTA) Micro Start Of Frame Interrupt */ -#define UDPHS_INTSTA_INT_SOF (0x1 << 3) /**< \brief (UDPHS_INTSTA) Start Of Frame Interrupt */ -#define UDPHS_INTSTA_ENDRESET (0x1 << 4) /**< \brief (UDPHS_INTSTA) End Of Reset Interrupt */ -#define UDPHS_INTSTA_WAKE_UP (0x1 << 5) /**< \brief (UDPHS_INTSTA) Wake Up CPU Interrupt */ -#define UDPHS_INTSTA_ENDOFRSM (0x1 << 6) /**< \brief (UDPHS_INTSTA) End Of Resume Interrupt */ -#define UDPHS_INTSTA_UPSTR_RES (0x1 << 7) /**< \brief (UDPHS_INTSTA) Upstream Resume Interrupt */ -#define UDPHS_INTSTA_EPT_0 (0x1 << 8) /**< \brief (UDPHS_INTSTA) Endpoint 0 Interrupt */ -#define UDPHS_INTSTA_EPT_1 (0x1 << 9) /**< \brief (UDPHS_INTSTA) Endpoint 1 Interrupt */ -#define UDPHS_INTSTA_EPT_2 (0x1 << 10) /**< \brief (UDPHS_INTSTA) Endpoint 2 Interrupt */ -#define UDPHS_INTSTA_EPT_3 (0x1 << 11) /**< \brief (UDPHS_INTSTA) Endpoint 3 Interrupt */ -#define UDPHS_INTSTA_EPT_4 (0x1 << 12) /**< \brief (UDPHS_INTSTA) Endpoint 4 Interrupt */ -#define UDPHS_INTSTA_EPT_5 (0x1 << 13) /**< \brief (UDPHS_INTSTA) Endpoint 5 Interrupt */ -#define UDPHS_INTSTA_EPT_6 (0x1 << 14) /**< \brief (UDPHS_INTSTA) Endpoint 6 Interrupt */ -#define UDPHS_INTSTA_DMA_1 (0x1 << 25) /**< \brief (UDPHS_INTSTA) DMA Channel 1 Interrupt */ -#define UDPHS_INTSTA_DMA_2 (0x1 << 26) /**< \brief (UDPHS_INTSTA) DMA Channel 2 Interrupt */ -#define UDPHS_INTSTA_DMA_3 (0x1 << 27) /**< \brief (UDPHS_INTSTA) DMA Channel 3 Interrupt */ -#define UDPHS_INTSTA_DMA_4 (0x1 << 28) /**< \brief (UDPHS_INTSTA) DMA Channel 4 Interrupt */ -#define UDPHS_INTSTA_DMA_5 (0x1 << 29) /**< \brief (UDPHS_INTSTA) DMA Channel 5 Interrupt */ -#define UDPHS_INTSTA_DMA_6 (0x1 << 30) /**< \brief (UDPHS_INTSTA) DMA Channel 6 Interrupt */ -/* -------- UDPHS_CLRINT : (UDPHS Offset: 0x18) UDPHS Clear Interrupt Register -------- */ -#define UDPHS_CLRINT_DET_SUSPD (0x1 << 1) /**< \brief (UDPHS_CLRINT) Suspend Interrupt Clear */ -#define UDPHS_CLRINT_MICRO_SOF (0x1 << 2) /**< \brief (UDPHS_CLRINT) Micro Start Of Frame Interrupt Clear */ -#define UDPHS_CLRINT_INT_SOF (0x1 << 3) /**< \brief (UDPHS_CLRINT) Start Of Frame Interrupt Clear */ -#define UDPHS_CLRINT_ENDRESET (0x1 << 4) /**< \brief (UDPHS_CLRINT) End Of Reset Interrupt Clear */ -#define UDPHS_CLRINT_WAKE_UP (0x1 << 5) /**< \brief (UDPHS_CLRINT) Wake Up CPU Interrupt Clear */ -#define UDPHS_CLRINT_ENDOFRSM (0x1 << 6) /**< \brief (UDPHS_CLRINT) End Of Resume Interrupt Clear */ -#define UDPHS_CLRINT_UPSTR_RES (0x1 << 7) /**< \brief (UDPHS_CLRINT) Upstream Resume Interrupt Clear */ -/* -------- UDPHS_EPTRST : (UDPHS Offset: 0x1C) UDPHS Endpoints Reset Register -------- */ -#define UDPHS_EPTRST_EPT_0 (0x1 << 0) /**< \brief (UDPHS_EPTRST) Endpoint 0 Reset */ -#define UDPHS_EPTRST_EPT_1 (0x1 << 1) /**< \brief (UDPHS_EPTRST) Endpoint 1 Reset */ -#define UDPHS_EPTRST_EPT_2 (0x1 << 2) /**< \brief (UDPHS_EPTRST) Endpoint 2 Reset */ -#define UDPHS_EPTRST_EPT_3 (0x1 << 3) /**< \brief (UDPHS_EPTRST) Endpoint 3 Reset */ -#define UDPHS_EPTRST_EPT_4 (0x1 << 4) /**< \brief (UDPHS_EPTRST) Endpoint 4 Reset */ -#define UDPHS_EPTRST_EPT_5 (0x1 << 5) /**< \brief (UDPHS_EPTRST) Endpoint 5 Reset */ -#define UDPHS_EPTRST_EPT_6 (0x1 << 6) /**< \brief (UDPHS_EPTRST) Endpoint 6 Reset */ -/* -------- UDPHS_TST : (UDPHS Offset: 0xE0) UDPHS Test Register -------- */ -#define UDPHS_TST_SPEED_CFG (0x3 << 0) /**< \brief (UDPHS_TST) Speed Configuration */ -#define UDPHS_TST_TST_J (0x1 << 2) /**< \brief (UDPHS_TST) Test J Mode */ -#define UDPHS_TST_TST_K (0x1 << 3) /**< \brief (UDPHS_TST) Test K Mode */ -#define UDPHS_TST_TST_PKT (0x1 << 4) /**< \brief (UDPHS_TST) Test Packet Mode */ -#define UDPHS_TST_OPMODE2 (0x1 << 5) /**< \brief (UDPHS_TST) OpMode2 */ -/* -------- UDPHS_IPNAME1 : (UDPHS Offset: 0xF0) UDPHS Name1 Register -------- */ -#define UDPHS_IPNAME1_IP_NAME1 (0xffffffff << 0) /**< \brief (UDPHS_IPNAME1) */ -/* -------- UDPHS_IPNAME2 : (UDPHS Offset: 0xF4) UDPHS Name2 Register -------- */ -#define UDPHS_IPNAME2_IP_NAME2 (0xffffffff << 0) /**< \brief (UDPHS_IPNAME2) */ -/* -------- UDPHS_IPFEATURES : (UDPHS Offset: 0xF8) UDPHS Features Register -------- */ -#define UDPHS_IPFEATURES_EPT_NBR_MAX (0xf << 0) /**< \brief (UDPHS_IPFEATURES) Max Number of Endpoints */ -#define UDPHS_IPFEATURES_DMA_CHANNEL_NBR (0x7 << 4) /**< \brief (UDPHS_IPFEATURES) Number of DMA Channels */ -#define UDPHS_IPFEATURES_DMA_B_SIZ (0x1 << 7) /**< \brief (UDPHS_IPFEATURES) DMA Buffer Size */ -#define UDPHS_IPFEATURES_DMA_FIFO_WORD_DEPTH (0xf << 8) /**< \brief (UDPHS_IPFEATURES) DMA FIFO Depth in Words */ -#define UDPHS_IPFEATURES_FIFO_MAX_SIZE (0x7 << 12) /**< \brief (UDPHS_IPFEATURES) DPRAM Size */ -#define UDPHS_IPFEATURES_BW_DPRAM (0x1 << 15) /**< \brief (UDPHS_IPFEATURES) DPRAM Byte Write Capability */ -#define UDPHS_IPFEATURES_DATAB16_8 (0x1 << 16) /**< \brief (UDPHS_IPFEATURES) UTMI DataBus16_8 */ -#define UDPHS_IPFEATURES_ISO_EPT_1 (0x1 << 17) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_2 (0x1 << 18) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_3 (0x1 << 19) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_4 (0x1 << 20) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_5 (0x1 << 21) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_6 (0x1 << 22) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_7 (0x1 << 23) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_8 (0x1 << 24) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_9 (0x1 << 25) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_10 (0x1 << 26) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_11 (0x1 << 27) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_12 (0x1 << 28) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_13 (0x1 << 29) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_14 (0x1 << 30) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_15 (0x1 << 31) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -/* -------- UDPHS_EPTCFG0 : (UDPHS Offset: 0x100) UDPHS Endpoint Configuration Register (endpoint = 0) -------- */ -#define UDPHS_EPTCFG0_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG0) Endpoint Size */ -#define UDPHS_EPTCFG0_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG0) 8 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG0) 16 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG0) 32 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG0) 64 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG0) 128 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG0) 256 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG0) 512 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG0) 1024 bytes */ -#define UDPHS_EPTCFG0_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG0) Endpoint Direction */ -#define UDPHS_EPTCFG0_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG0) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG0_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG0) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG0_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG0) Endpoint Type */ -#define UDPHS_EPTCFG0_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG0) Control endpoint */ -#define UDPHS_EPTCFG0_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG0) Isochronous endpoint */ -#define UDPHS_EPTCFG0_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG0) Bulk endpoint */ -#define UDPHS_EPTCFG0_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG0) Interrupt endpoint */ -#define UDPHS_EPTCFG0_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG0) Number of Banks */ -#define UDPHS_EPTCFG0_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG0) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG0_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG0) One bank (bank 0) */ -#define UDPHS_EPTCFG0_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG0) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG0_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG0) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG0_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG0) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG0_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG0) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB0 : (UDPHS Offset: 0x104) UDPHS Endpoint Control Enable Register (endpoint = 0) -------- */ -#define UDPHS_EPTCTLENB0_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB0) Endpoint Enable */ -#define UDPHS_EPTCTLENB0_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB0) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB0_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB0) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB0_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB0) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB0_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB0) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB0_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB0) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB0_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB0) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB0_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB0) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB0_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB0) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB0_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB0) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB0_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB0) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB0_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB0) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB0_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB0) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB0_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB0) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB0_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB0) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB0_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB0) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS0 : (UDPHS Offset: 0x108) UDPHS Endpoint Control Disable Register (endpoint = 0) -------- */ -#define UDPHS_EPTCTLDIS0_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS0) Endpoint Disable */ -#define UDPHS_EPTCTLDIS0_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS0) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS0_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS0) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS0_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS0) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS0_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS0) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS0_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS0) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS0_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS0) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS0) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS0) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS0) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS0) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS0) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS0) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS0) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS0) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS0) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL0 : (UDPHS Offset: 0x10C) UDPHS Endpoint Control Register (endpoint = 0) -------- */ -#define UDPHS_EPTCTL0_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL0) Endpoint Enable */ -#define UDPHS_EPTCTL0_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL0) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL0_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL0) Interrupt Disables DMA */ -#define UDPHS_EPTCTL0_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL0) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL0_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL0) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL0_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL0) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL0_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL0) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL0_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL0) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL0_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL0) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL0_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL0) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL0_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL0) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL0_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL0) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL0_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL0) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL0_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL0) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL0_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL0) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL0_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL0) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA0 : (UDPHS Offset: 0x114) UDPHS Endpoint Set Status Register (endpoint = 0) -------- */ -#define UDPHS_EPTSETSTA0_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA0) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA0_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA0) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA0_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA0) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA0 : (UDPHS Offset: 0x118) UDPHS Endpoint Clear Status Register (endpoint = 0) -------- */ -#define UDPHS_EPTCLRSTA0_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA0) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA0_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA0) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA0_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA0) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA0_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA0) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA0_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA0) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA0_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA0) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA0_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA0) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA0_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA0) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA0 : (UDPHS Offset: 0x11C) UDPHS Endpoint Status Register (endpoint = 0) -------- */ -#define UDPHS_EPTSTA0_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA0) Stall Handshake Request */ -#define UDPHS_EPTSTA0_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA0) Toggle Sequencing */ -#define UDPHS_EPTSTA0_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA0) Overflow Error */ -#define UDPHS_EPTSTA0_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA0) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA0_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA0) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA0_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA0) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA0_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA0) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA0_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA0) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA0_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA0) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA0_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA0) NAK OUT */ -#define UDPHS_EPTSTA0_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA0) Current Bank/Control Direction */ -#define UDPHS_EPTSTA0_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA0) Busy Bank Number */ -#define UDPHS_EPTSTA0_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA0) UDPHS Byte Count */ -#define UDPHS_EPTSTA0_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA0) Short Packet */ -/* -------- UDPHS_EPTCFG1 : (UDPHS Offset: 0x120) UDPHS Endpoint Configuration Register (endpoint = 1) -------- */ -#define UDPHS_EPTCFG1_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG1) Endpoint Size */ -#define UDPHS_EPTCFG1_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG1) 8 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG1) 16 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG1) 32 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG1) 64 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG1) 128 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG1) 256 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG1) 512 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG1) 1024 bytes */ -#define UDPHS_EPTCFG1_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG1) Endpoint Direction */ -#define UDPHS_EPTCFG1_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG1) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG1_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG1) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG1_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG1) Endpoint Type */ -#define UDPHS_EPTCFG1_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG1) Control endpoint */ -#define UDPHS_EPTCFG1_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG1) Isochronous endpoint */ -#define UDPHS_EPTCFG1_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG1) Bulk endpoint */ -#define UDPHS_EPTCFG1_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG1) Interrupt endpoint */ -#define UDPHS_EPTCFG1_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG1) Number of Banks */ -#define UDPHS_EPTCFG1_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG1) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG1_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG1) One bank (bank 0) */ -#define UDPHS_EPTCFG1_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG1) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG1_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG1) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG1_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG1) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG1_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG1) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB1 : (UDPHS Offset: 0x124) UDPHS Endpoint Control Enable Register (endpoint = 1) -------- */ -#define UDPHS_EPTCTLENB1_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB1) Endpoint Enable */ -#define UDPHS_EPTCTLENB1_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB1) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB1_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB1) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB1_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB1) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB1_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB1) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB1_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB1) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB1_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB1) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB1_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB1) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB1_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB1) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB1_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB1) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB1_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB1) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB1_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB1) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB1_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB1) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB1_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB1) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB1_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB1) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB1_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB1) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS1 : (UDPHS Offset: 0x128) UDPHS Endpoint Control Disable Register (endpoint = 1) -------- */ -#define UDPHS_EPTCTLDIS1_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS1) Endpoint Disable */ -#define UDPHS_EPTCTLDIS1_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS1) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS1_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS1) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS1_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS1) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS1_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS1) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS1_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS1) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS1_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS1) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS1) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS1) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS1) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS1) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS1) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS1) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS1) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS1) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS1) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL1 : (UDPHS Offset: 0x12C) UDPHS Endpoint Control Register (endpoint = 1) -------- */ -#define UDPHS_EPTCTL1_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL1) Endpoint Enable */ -#define UDPHS_EPTCTL1_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL1) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL1_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL1) Interrupt Disables DMA */ -#define UDPHS_EPTCTL1_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL1) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL1_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL1) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL1_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL1) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL1_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL1) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL1_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL1) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL1_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL1) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL1_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL1) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL1_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL1) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL1_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL1) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL1_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL1) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL1_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL1) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL1_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL1) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL1_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL1) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA1 : (UDPHS Offset: 0x134) UDPHS Endpoint Set Status Register (endpoint = 1) -------- */ -#define UDPHS_EPTSETSTA1_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA1) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA1_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA1) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA1_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA1) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA1 : (UDPHS Offset: 0x138) UDPHS Endpoint Clear Status Register (endpoint = 1) -------- */ -#define UDPHS_EPTCLRSTA1_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA1) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA1_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA1) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA1_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA1) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA1_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA1) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA1_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA1) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA1_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA1) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA1_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA1) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA1_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA1) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA1 : (UDPHS Offset: 0x13C) UDPHS Endpoint Status Register (endpoint = 1) -------- */ -#define UDPHS_EPTSTA1_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA1) Stall Handshake Request */ -#define UDPHS_EPTSTA1_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA1) Toggle Sequencing */ -#define UDPHS_EPTSTA1_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA1) Overflow Error */ -#define UDPHS_EPTSTA1_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA1) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA1_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA1) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA1_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA1) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA1_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA1) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA1_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA1) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA1_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA1) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA1_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA1) NAK OUT */ -#define UDPHS_EPTSTA1_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA1) Current Bank/Control Direction */ -#define UDPHS_EPTSTA1_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA1) Busy Bank Number */ -#define UDPHS_EPTSTA1_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA1) UDPHS Byte Count */ -#define UDPHS_EPTSTA1_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA1) Short Packet */ -/* -------- UDPHS_EPTCFG2 : (UDPHS Offset: 0x140) UDPHS Endpoint Configuration Register (endpoint = 2) -------- */ -#define UDPHS_EPTCFG2_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG2) Endpoint Size */ -#define UDPHS_EPTCFG2_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG2) 8 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG2) 16 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG2) 32 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG2) 64 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG2) 128 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG2) 256 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG2) 512 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG2) 1024 bytes */ -#define UDPHS_EPTCFG2_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG2) Endpoint Direction */ -#define UDPHS_EPTCFG2_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG2) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG2_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG2) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG2_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG2) Endpoint Type */ -#define UDPHS_EPTCFG2_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG2) Control endpoint */ -#define UDPHS_EPTCFG2_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG2) Isochronous endpoint */ -#define UDPHS_EPTCFG2_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG2) Bulk endpoint */ -#define UDPHS_EPTCFG2_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG2) Interrupt endpoint */ -#define UDPHS_EPTCFG2_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG2) Number of Banks */ -#define UDPHS_EPTCFG2_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG2) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG2_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG2) One bank (bank 0) */ -#define UDPHS_EPTCFG2_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG2) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG2_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG2) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG2_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG2) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG2_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG2) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB2 : (UDPHS Offset: 0x144) UDPHS Endpoint Control Enable Register (endpoint = 2) -------- */ -#define UDPHS_EPTCTLENB2_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB2) Endpoint Enable */ -#define UDPHS_EPTCTLENB2_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB2) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB2_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB2) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB2_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB2) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB2_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB2) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB2_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB2) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB2_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB2) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB2_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB2) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB2_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB2) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB2_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB2) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB2_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB2) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB2_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB2) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB2_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB2) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB2_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB2) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB2_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB2) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB2_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB2) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS2 : (UDPHS Offset: 0x148) UDPHS Endpoint Control Disable Register (endpoint = 2) -------- */ -#define UDPHS_EPTCTLDIS2_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS2) Endpoint Disable */ -#define UDPHS_EPTCTLDIS2_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS2) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS2_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS2) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS2_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS2) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS2_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS2) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS2_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS2) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS2_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS2) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS2) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS2) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS2) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS2) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS2) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS2) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS2) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS2) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS2) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL2 : (UDPHS Offset: 0x14C) UDPHS Endpoint Control Register (endpoint = 2) -------- */ -#define UDPHS_EPTCTL2_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL2) Endpoint Enable */ -#define UDPHS_EPTCTL2_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL2) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL2_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL2) Interrupt Disables DMA */ -#define UDPHS_EPTCTL2_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL2) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL2_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL2) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL2_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL2) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL2_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL2) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL2_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL2) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL2_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL2) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL2_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL2) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL2_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL2) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL2_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL2) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL2_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL2) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL2_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL2) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL2_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL2) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL2_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL2) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA2 : (UDPHS Offset: 0x154) UDPHS Endpoint Set Status Register (endpoint = 2) -------- */ -#define UDPHS_EPTSETSTA2_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA2) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA2_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA2) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA2_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA2) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA2 : (UDPHS Offset: 0x158) UDPHS Endpoint Clear Status Register (endpoint = 2) -------- */ -#define UDPHS_EPTCLRSTA2_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA2) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA2_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA2) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA2_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA2) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA2_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA2) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA2_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA2) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA2_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA2) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA2_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA2) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA2_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA2) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA2 : (UDPHS Offset: 0x15C) UDPHS Endpoint Status Register (endpoint = 2) -------- */ -#define UDPHS_EPTSTA2_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA2) Stall Handshake Request */ -#define UDPHS_EPTSTA2_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA2) Toggle Sequencing */ -#define UDPHS_EPTSTA2_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA2) Overflow Error */ -#define UDPHS_EPTSTA2_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA2) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA2_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA2) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA2_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA2) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA2_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA2) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA2_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA2) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA2_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA2) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA2_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA2) NAK OUT */ -#define UDPHS_EPTSTA2_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA2) Current Bank/Control Direction */ -#define UDPHS_EPTSTA2_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA2) Busy Bank Number */ -#define UDPHS_EPTSTA2_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA2) UDPHS Byte Count */ -#define UDPHS_EPTSTA2_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA2) Short Packet */ -/* -------- UDPHS_EPTCFG3 : (UDPHS Offset: 0x160) UDPHS Endpoint Configuration Register (endpoint = 3) -------- */ -#define UDPHS_EPTCFG3_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG3) Endpoint Size */ -#define UDPHS_EPTCFG3_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG3) 8 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG3) 16 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG3) 32 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG3) 64 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG3) 128 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG3) 256 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG3) 512 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG3) 1024 bytes */ -#define UDPHS_EPTCFG3_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG3) Endpoint Direction */ -#define UDPHS_EPTCFG3_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG3) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG3_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG3) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG3_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG3) Endpoint Type */ -#define UDPHS_EPTCFG3_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG3) Control endpoint */ -#define UDPHS_EPTCFG3_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG3) Isochronous endpoint */ -#define UDPHS_EPTCFG3_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG3) Bulk endpoint */ -#define UDPHS_EPTCFG3_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG3) Interrupt endpoint */ -#define UDPHS_EPTCFG3_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG3) Number of Banks */ -#define UDPHS_EPTCFG3_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG3) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG3_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG3) One bank (bank 0) */ -#define UDPHS_EPTCFG3_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG3) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG3_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG3) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG3_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG3) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG3_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG3) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB3 : (UDPHS Offset: 0x164) UDPHS Endpoint Control Enable Register (endpoint = 3) -------- */ -#define UDPHS_EPTCTLENB3_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB3) Endpoint Enable */ -#define UDPHS_EPTCTLENB3_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB3) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB3_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB3) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB3_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB3) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB3_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB3) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB3_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB3) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB3_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB3) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB3_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB3) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB3_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB3) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB3_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB3) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB3_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB3) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB3_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB3) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB3_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB3) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB3_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB3) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB3_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB3) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB3_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB3) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS3 : (UDPHS Offset: 0x168) UDPHS Endpoint Control Disable Register (endpoint = 3) -------- */ -#define UDPHS_EPTCTLDIS3_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS3) Endpoint Disable */ -#define UDPHS_EPTCTLDIS3_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS3) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS3_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS3) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS3_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS3) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS3_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS3) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS3_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS3) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS3_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS3) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS3) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS3) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS3) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS3) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS3) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS3) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS3) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS3) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS3) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL3 : (UDPHS Offset: 0x16C) UDPHS Endpoint Control Register (endpoint = 3) -------- */ -#define UDPHS_EPTCTL3_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL3) Endpoint Enable */ -#define UDPHS_EPTCTL3_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL3) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL3_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL3) Interrupt Disables DMA */ -#define UDPHS_EPTCTL3_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL3) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL3_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL3) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL3_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL3) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL3_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL3) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL3_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL3) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL3_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL3) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL3_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL3) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL3_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL3) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL3_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL3) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL3_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL3) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL3_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL3) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL3_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL3) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL3_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL3) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA3 : (UDPHS Offset: 0x174) UDPHS Endpoint Set Status Register (endpoint = 3) -------- */ -#define UDPHS_EPTSETSTA3_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA3) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA3_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA3) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA3_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA3) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA3 : (UDPHS Offset: 0x178) UDPHS Endpoint Clear Status Register (endpoint = 3) -------- */ -#define UDPHS_EPTCLRSTA3_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA3) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA3_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA3) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA3_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA3) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA3_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA3) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA3_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA3) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA3_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA3) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA3_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA3) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA3_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA3) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA3 : (UDPHS Offset: 0x17C) UDPHS Endpoint Status Register (endpoint = 3) -------- */ -#define UDPHS_EPTSTA3_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA3) Stall Handshake Request */ -#define UDPHS_EPTSTA3_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA3) Toggle Sequencing */ -#define UDPHS_EPTSTA3_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA3) Overflow Error */ -#define UDPHS_EPTSTA3_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA3) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA3_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA3) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA3_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA3) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA3_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA3) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA3_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA3) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA3_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA3) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA3_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA3) NAK OUT */ -#define UDPHS_EPTSTA3_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA3) Current Bank/Control Direction */ -#define UDPHS_EPTSTA3_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA3) Busy Bank Number */ -#define UDPHS_EPTSTA3_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA3) UDPHS Byte Count */ -#define UDPHS_EPTSTA3_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA3) Short Packet */ -/* -------- UDPHS_EPTCFG4 : (UDPHS Offset: 0x180) UDPHS Endpoint Configuration Register (endpoint = 4) -------- */ -#define UDPHS_EPTCFG4_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG4) Endpoint Size */ -#define UDPHS_EPTCFG4_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG4) 8 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG4) 16 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG4) 32 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG4) 64 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG4) 128 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG4) 256 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG4) 512 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG4) 1024 bytes */ -#define UDPHS_EPTCFG4_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG4) Endpoint Direction */ -#define UDPHS_EPTCFG4_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG4) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG4_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG4) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG4_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG4) Endpoint Type */ -#define UDPHS_EPTCFG4_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG4) Control endpoint */ -#define UDPHS_EPTCFG4_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG4) Isochronous endpoint */ -#define UDPHS_EPTCFG4_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG4) Bulk endpoint */ -#define UDPHS_EPTCFG4_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG4) Interrupt endpoint */ -#define UDPHS_EPTCFG4_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG4) Number of Banks */ -#define UDPHS_EPTCFG4_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG4) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG4_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG4) One bank (bank 0) */ -#define UDPHS_EPTCFG4_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG4) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG4_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG4) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG4_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG4) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG4_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG4) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB4 : (UDPHS Offset: 0x184) UDPHS Endpoint Control Enable Register (endpoint = 4) -------- */ -#define UDPHS_EPTCTLENB4_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB4) Endpoint Enable */ -#define UDPHS_EPTCTLENB4_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB4) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB4_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB4) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB4_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB4) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB4_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB4) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB4_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB4) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB4_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB4) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB4_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB4) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB4_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB4) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB4_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB4) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB4_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB4) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB4_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB4) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB4_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB4) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB4_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB4) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB4_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB4) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB4_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB4) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS4 : (UDPHS Offset: 0x188) UDPHS Endpoint Control Disable Register (endpoint = 4) -------- */ -#define UDPHS_EPTCTLDIS4_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS4) Endpoint Disable */ -#define UDPHS_EPTCTLDIS4_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS4) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS4_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS4) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS4_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS4) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS4_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS4) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS4_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS4) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS4_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS4) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS4) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS4) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS4) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS4) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS4) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS4) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS4) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS4) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS4) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL4 : (UDPHS Offset: 0x18C) UDPHS Endpoint Control Register (endpoint = 4) -------- */ -#define UDPHS_EPTCTL4_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL4) Endpoint Enable */ -#define UDPHS_EPTCTL4_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL4) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL4_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL4) Interrupt Disables DMA */ -#define UDPHS_EPTCTL4_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL4) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL4_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL4) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL4_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL4) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL4_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL4) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL4_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL4) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL4_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL4) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL4_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL4) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL4_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL4) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL4_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL4) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL4_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL4) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL4_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL4) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL4_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL4) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL4_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL4) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA4 : (UDPHS Offset: 0x194) UDPHS Endpoint Set Status Register (endpoint = 4) -------- */ -#define UDPHS_EPTSETSTA4_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA4) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA4_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA4) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA4_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA4) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA4 : (UDPHS Offset: 0x198) UDPHS Endpoint Clear Status Register (endpoint = 4) -------- */ -#define UDPHS_EPTCLRSTA4_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA4) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA4_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA4) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA4_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA4) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA4_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA4) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA4_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA4) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA4_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA4) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA4_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA4) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA4_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA4) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA4 : (UDPHS Offset: 0x19C) UDPHS Endpoint Status Register (endpoint = 4) -------- */ -#define UDPHS_EPTSTA4_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA4) Stall Handshake Request */ -#define UDPHS_EPTSTA4_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA4) Toggle Sequencing */ -#define UDPHS_EPTSTA4_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA4) Overflow Error */ -#define UDPHS_EPTSTA4_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA4) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA4_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA4) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA4_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA4) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA4_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA4) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA4_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA4) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA4_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA4) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA4_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA4) NAK OUT */ -#define UDPHS_EPTSTA4_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA4) Current Bank/Control Direction */ -#define UDPHS_EPTSTA4_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA4) Busy Bank Number */ -#define UDPHS_EPTSTA4_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA4) UDPHS Byte Count */ -#define UDPHS_EPTSTA4_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA4) Short Packet */ -/* -------- UDPHS_EPTCFG5 : (UDPHS Offset: 0x1A0) UDPHS Endpoint Configuration Register (endpoint = 5) -------- */ -#define UDPHS_EPTCFG5_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG5) Endpoint Size */ -#define UDPHS_EPTCFG5_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG5) 8 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG5) 16 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG5) 32 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG5) 64 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG5) 128 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG5) 256 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG5) 512 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG5) 1024 bytes */ -#define UDPHS_EPTCFG5_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG5) Endpoint Direction */ -#define UDPHS_EPTCFG5_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG5) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG5_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG5) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG5_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG5) Endpoint Type */ -#define UDPHS_EPTCFG5_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG5) Control endpoint */ -#define UDPHS_EPTCFG5_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG5) Isochronous endpoint */ -#define UDPHS_EPTCFG5_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG5) Bulk endpoint */ -#define UDPHS_EPTCFG5_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG5) Interrupt endpoint */ -#define UDPHS_EPTCFG5_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG5) Number of Banks */ -#define UDPHS_EPTCFG5_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG5) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG5_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG5) One bank (bank 0) */ -#define UDPHS_EPTCFG5_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG5) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG5_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG5) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG5_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG5) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG5_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG5) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB5 : (UDPHS Offset: 0x1A4) UDPHS Endpoint Control Enable Register (endpoint = 5) -------- */ -#define UDPHS_EPTCTLENB5_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB5) Endpoint Enable */ -#define UDPHS_EPTCTLENB5_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB5) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB5_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB5) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB5_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB5) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB5_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB5) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB5_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB5) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB5_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB5) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB5_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB5) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB5_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB5) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB5_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB5) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB5_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB5) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB5_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB5) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB5_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB5) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB5_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB5) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB5_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB5) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB5_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB5) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS5 : (UDPHS Offset: 0x1A8) UDPHS Endpoint Control Disable Register (endpoint = 5) -------- */ -#define UDPHS_EPTCTLDIS5_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS5) Endpoint Disable */ -#define UDPHS_EPTCTLDIS5_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS5) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS5_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS5) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS5_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS5) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS5_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS5) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS5_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS5) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS5_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS5) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS5) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS5) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS5) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS5) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS5) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS5) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS5) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS5) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS5) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL5 : (UDPHS Offset: 0x1AC) UDPHS Endpoint Control Register (endpoint = 5) -------- */ -#define UDPHS_EPTCTL5_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL5) Endpoint Enable */ -#define UDPHS_EPTCTL5_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL5) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL5_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL5) Interrupt Disables DMA */ -#define UDPHS_EPTCTL5_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL5) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL5_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL5) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL5_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL5) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL5_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL5) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL5_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL5) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL5_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL5) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL5_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL5) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL5_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL5) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL5_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL5) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL5_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL5) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL5_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL5) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL5_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL5) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL5_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL5) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA5 : (UDPHS Offset: 0x1B4) UDPHS Endpoint Set Status Register (endpoint = 5) -------- */ -#define UDPHS_EPTSETSTA5_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA5) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA5_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA5) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA5_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA5) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA5 : (UDPHS Offset: 0x1B8) UDPHS Endpoint Clear Status Register (endpoint = 5) -------- */ -#define UDPHS_EPTCLRSTA5_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA5) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA5_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA5) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA5_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA5) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA5_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA5) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA5_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA5) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA5_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA5) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA5_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA5) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA5_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA5) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA5 : (UDPHS Offset: 0x1BC) UDPHS Endpoint Status Register (endpoint = 5) -------- */ -#define UDPHS_EPTSTA5_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA5) Stall Handshake Request */ -#define UDPHS_EPTSTA5_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA5) Toggle Sequencing */ -#define UDPHS_EPTSTA5_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA5) Overflow Error */ -#define UDPHS_EPTSTA5_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA5) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA5_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA5) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA5_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA5) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA5_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA5) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA5_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA5) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA5_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA5) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA5_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA5) NAK OUT */ -#define UDPHS_EPTSTA5_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA5) Current Bank/Control Direction */ -#define UDPHS_EPTSTA5_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA5) Busy Bank Number */ -#define UDPHS_EPTSTA5_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA5) UDPHS Byte Count */ -#define UDPHS_EPTSTA5_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA5) Short Packet */ -/* -------- UDPHS_EPTCFG6 : (UDPHS Offset: 0x1C0) UDPHS Endpoint Configuration Register (endpoint = 6) -------- */ -#define UDPHS_EPTCFG6_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG6) Endpoint Size */ -#define UDPHS_EPTCFG6_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG6) 8 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG6) 16 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG6) 32 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG6) 64 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG6) 128 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG6) 256 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG6) 512 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG6) 1024 bytes */ -#define UDPHS_EPTCFG6_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG6) Endpoint Direction */ -#define UDPHS_EPTCFG6_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG6) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG6_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG6) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG6_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG6) Endpoint Type */ -#define UDPHS_EPTCFG6_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG6) Control endpoint */ -#define UDPHS_EPTCFG6_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG6) Isochronous endpoint */ -#define UDPHS_EPTCFG6_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG6) Bulk endpoint */ -#define UDPHS_EPTCFG6_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG6) Interrupt endpoint */ -#define UDPHS_EPTCFG6_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG6) Number of Banks */ -#define UDPHS_EPTCFG6_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG6) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG6_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG6) One bank (bank 0) */ -#define UDPHS_EPTCFG6_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG6) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG6_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG6) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG6_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG6) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG6_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG6) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB6 : (UDPHS Offset: 0x1C4) UDPHS Endpoint Control Enable Register (endpoint = 6) -------- */ -#define UDPHS_EPTCTLENB6_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB6) Endpoint Enable */ -#define UDPHS_EPTCTLENB6_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB6) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB6_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB6) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB6_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB6) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB6_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB6) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB6_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB6) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB6_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB6) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB6_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB6) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB6_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB6) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB6_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB6) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB6_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB6) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB6_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB6) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB6_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB6) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB6_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB6) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB6_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB6) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB6_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB6) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS6 : (UDPHS Offset: 0x1C8) UDPHS Endpoint Control Disable Register (endpoint = 6) -------- */ -#define UDPHS_EPTCTLDIS6_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS6) Endpoint Disable */ -#define UDPHS_EPTCTLDIS6_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS6) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS6_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS6) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS6_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS6) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS6_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS6) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS6_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS6) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS6_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS6) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS6) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS6) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS6) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS6) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS6) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS6) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS6) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS6) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS6) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL6 : (UDPHS Offset: 0x1CC) UDPHS Endpoint Control Register (endpoint = 6) -------- */ -#define UDPHS_EPTCTL6_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL6) Endpoint Enable */ -#define UDPHS_EPTCTL6_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL6) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL6_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL6) Interrupt Disables DMA */ -#define UDPHS_EPTCTL6_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL6) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL6_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL6) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL6_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL6) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL6_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL6) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL6_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL6) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL6_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL6) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL6_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL6) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL6_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL6) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL6_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL6) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL6_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL6) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL6_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL6) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL6_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL6) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL6_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL6) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA6 : (UDPHS Offset: 0x1D4) UDPHS Endpoint Set Status Register (endpoint = 6) -------- */ -#define UDPHS_EPTSETSTA6_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA6) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA6_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA6) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA6_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA6) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA6 : (UDPHS Offset: 0x1D8) UDPHS Endpoint Clear Status Register (endpoint = 6) -------- */ -#define UDPHS_EPTCLRSTA6_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA6) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA6_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA6) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA6_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA6) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA6_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA6) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA6_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA6) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA6_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA6) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA6_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA6) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA6_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA6) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA6 : (UDPHS Offset: 0x1DC) UDPHS Endpoint Status Register (endpoint = 6) -------- */ -#define UDPHS_EPTSTA6_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA6) Stall Handshake Request */ -#define UDPHS_EPTSTA6_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA6) Toggle Sequencing */ -#define UDPHS_EPTSTA6_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA6) Overflow Error */ -#define UDPHS_EPTSTA6_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA6) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA6_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA6) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA6_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA6) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA6_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA6) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA6_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA6) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA6_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA6) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA6_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA6) NAK OUT */ -#define UDPHS_EPTSTA6_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA6) Current Bank/Control Direction */ -#define UDPHS_EPTSTA6_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA6) Busy Bank Number */ -#define UDPHS_EPTSTA6_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA6) UDPHS Byte Count */ -#define UDPHS_EPTSTA6_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA6) Short Packet */ -/* -------- UDPHS_DMANXTDSC1 : (UDPHS Offset: 0x320) UDPHS DMA Next Descriptor Address Register (channel = 1) -------- */ -#define UDPHS_DMANXTDSC1_NXT_DSC_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMANXTDSC1) */ -/* -------- UDPHS_DMAADDRESS1 : (UDPHS Offset: 0x324) UDPHS DMA Channel Address Register (channel = 1) -------- */ -#define UDPHS_DMAADDRESS1_BUFF_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMAADDRESS1) */ -/* -------- UDPHS_DMACONTROL1 : (UDPHS Offset: 0x328) UDPHS DMA Channel Control Register (channel = 1) -------- */ -#define UDPHS_DMACONTROL1_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMACONTROL1) */ -#define UDPHS_DMACONTROL1_LDNXT_DSC (0x1 << 1) /**< \brief (UDPHS_DMACONTROL1) Load Next Channel Transfer Descriptor Enable (Command) */ -#define UDPHS_DMACONTROL1_END_TR_EN (0x1 << 2) /**< \brief (UDPHS_DMACONTROL1) End of Transfer Enable (Control) */ -#define UDPHS_DMACONTROL1_END_B_EN (0x1 << 3) /**< \brief (UDPHS_DMACONTROL1) End of Buffer Enable (Control) */ -#define UDPHS_DMACONTROL1_END_TR_IT (0x1 << 4) /**< \brief (UDPHS_DMACONTROL1) End of Transfer Interrupt Enable */ -#define UDPHS_DMACONTROL1_END_BUFFIT (0x1 << 5) /**< \brief (UDPHS_DMACONTROL1) End of Buffer Interrupt Enable */ -#define UDPHS_DMACONTROL1_DESC_LD_IT (0x1 << 6) /**< \brief (UDPHS_DMACONTROL1) Descriptor Loaded Interrupt Enable */ -#define UDPHS_DMACONTROL1_BURST_LCK (0x1 << 7) /**< \brief (UDPHS_DMACONTROL1) Burst Lock Enable */ -#define UDPHS_DMACONTROL1_BUFF_LENGTH (0xffff << 16) /**< \brief (UDPHS_DMACONTROL1) Buffer Byte Length (Write-only) */ -/* -------- UDPHS_DMASTATUS1 : (UDPHS Offset: 0x32C) UDPHS DMA Channel Status Register (channel = 1) -------- */ -#define UDPHS_DMASTATUS1_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMASTATUS1) Channel Enable Status */ -#define UDPHS_DMASTATUS1_CHANN_ACT (0x1 << 1) /**< \brief (UDPHS_DMASTATUS1) Channel Active Status */ -#define UDPHS_DMASTATUS1_END_TR_ST (0x1 << 4) /**< \brief (UDPHS_DMASTATUS1) End of Channel Transfer Status */ -#define UDPHS_DMASTATUS1_END_BF_ST (0x1 << 5) /**< \brief (UDPHS_DMASTATUS1) End of Channel Buffer Status */ -#define UDPHS_DMASTATUS1_DESC_LDST (0x1 << 6) /**< \brief (UDPHS_DMASTATUS1) Descriptor Loaded Status */ -#define UDPHS_DMASTATUS1_BUFF_COUNT (0xffff << 16) /**< \brief (UDPHS_DMASTATUS1) Buffer Byte Count */ -/* -------- UDPHS_DMANXTDSC2 : (UDPHS Offset: 0x330) UDPHS DMA Next Descriptor Address Register (channel = 2) -------- */ -#define UDPHS_DMANXTDSC2_NXT_DSC_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMANXTDSC2) */ -/* -------- UDPHS_DMAADDRESS2 : (UDPHS Offset: 0x334) UDPHS DMA Channel Address Register (channel = 2) -------- */ -#define UDPHS_DMAADDRESS2_BUFF_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMAADDRESS2) */ -/* -------- UDPHS_DMACONTROL2 : (UDPHS Offset: 0x338) UDPHS DMA Channel Control Register (channel = 2) -------- */ -#define UDPHS_DMACONTROL2_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMACONTROL2) */ -#define UDPHS_DMACONTROL2_LDNXT_DSC (0x1 << 1) /**< \brief (UDPHS_DMACONTROL2) Load Next Channel Transfer Descriptor Enable (Command) */ -#define UDPHS_DMACONTROL2_END_TR_EN (0x1 << 2) /**< \brief (UDPHS_DMACONTROL2) End of Transfer Enable (Control) */ -#define UDPHS_DMACONTROL2_END_B_EN (0x1 << 3) /**< \brief (UDPHS_DMACONTROL2) End of Buffer Enable (Control) */ -#define UDPHS_DMACONTROL2_END_TR_IT (0x1 << 4) /**< \brief (UDPHS_DMACONTROL2) End of Transfer Interrupt Enable */ -#define UDPHS_DMACONTROL2_END_BUFFIT (0x1 << 5) /**< \brief (UDPHS_DMACONTROL2) End of Buffer Interrupt Enable */ -#define UDPHS_DMACONTROL2_DESC_LD_IT (0x1 << 6) /**< \brief (UDPHS_DMACONTROL2) Descriptor Loaded Interrupt Enable */ -#define UDPHS_DMACONTROL2_BURST_LCK (0x1 << 7) /**< \brief (UDPHS_DMACONTROL2) Burst Lock Enable */ -#define UDPHS_DMACONTROL2_BUFF_LENGTH (0xffff << 16) /**< \brief (UDPHS_DMACONTROL2) Buffer Byte Length (Write-only) */ -/* -------- UDPHS_DMASTATUS2 : (UDPHS Offset: 0x33C) UDPHS DMA Channel Status Register (channel = 2) -------- */ -#define UDPHS_DMASTATUS2_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMASTATUS2) Channel Enable Status */ -#define UDPHS_DMASTATUS2_CHANN_ACT (0x1 << 1) /**< \brief (UDPHS_DMASTATUS2) Channel Active Status */ -#define UDPHS_DMASTATUS2_END_TR_ST (0x1 << 4) /**< \brief (UDPHS_DMASTATUS2) End of Channel Transfer Status */ -#define UDPHS_DMASTATUS2_END_BF_ST (0x1 << 5) /**< \brief (UDPHS_DMASTATUS2) End of Channel Buffer Status */ -#define UDPHS_DMASTATUS2_DESC_LDST (0x1 << 6) /**< \brief (UDPHS_DMASTATUS2) Descriptor Loaded Status */ -#define UDPHS_DMASTATUS2_BUFF_COUNT (0xffff << 16) /**< \brief (UDPHS_DMASTATUS2) Buffer Byte Count */ -/* -------- UDPHS_DMANXTDSC3 : (UDPHS Offset: 0x340) UDPHS DMA Next Descriptor Address Register (channel = 3) -------- */ -#define UDPHS_DMANXTDSC3_NXT_DSC_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMANXTDSC3) */ -/* -------- UDPHS_DMAADDRESS3 : (UDPHS Offset: 0x344) UDPHS DMA Channel Address Register (channel = 3) -------- */ -#define UDPHS_DMAADDRESS3_BUFF_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMAADDRESS3) */ -/* -------- UDPHS_DMACONTROL3 : (UDPHS Offset: 0x348) UDPHS DMA Channel Control Register (channel = 3) -------- */ -#define UDPHS_DMACONTROL3_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMACONTROL3) */ -#define UDPHS_DMACONTROL3_LDNXT_DSC (0x1 << 1) /**< \brief (UDPHS_DMACONTROL3) Load Next Channel Transfer Descriptor Enable (Command) */ -#define UDPHS_DMACONTROL3_END_TR_EN (0x1 << 2) /**< \brief (UDPHS_DMACONTROL3) End of Transfer Enable (Control) */ -#define UDPHS_DMACONTROL3_END_B_EN (0x1 << 3) /**< \brief (UDPHS_DMACONTROL3) End of Buffer Enable (Control) */ -#define UDPHS_DMACONTROL3_END_TR_IT (0x1 << 4) /**< \brief (UDPHS_DMACONTROL3) End of Transfer Interrupt Enable */ -#define UDPHS_DMACONTROL3_END_BUFFIT (0x1 << 5) /**< \brief (UDPHS_DMACONTROL3) End of Buffer Interrupt Enable */ -#define UDPHS_DMACONTROL3_DESC_LD_IT (0x1 << 6) /**< \brief (UDPHS_DMACONTROL3) Descriptor Loaded Interrupt Enable */ -#define UDPHS_DMACONTROL3_BURST_LCK (0x1 << 7) /**< \brief (UDPHS_DMACONTROL3) Burst Lock Enable */ -#define UDPHS_DMACONTROL3_BUFF_LENGTH (0xffff << 16) /**< \brief (UDPHS_DMACONTROL3) Buffer Byte Length (Write-only) */ -/* -------- UDPHS_DMASTATUS3 : (UDPHS Offset: 0x34C) UDPHS DMA Channel Status Register (channel = 3) -------- */ -#define UDPHS_DMASTATUS3_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMASTATUS3) Channel Enable Status */ -#define UDPHS_DMASTATUS3_CHANN_ACT (0x1 << 1) /**< \brief (UDPHS_DMASTATUS3) Channel Active Status */ -#define UDPHS_DMASTATUS3_END_TR_ST (0x1 << 4) /**< \brief (UDPHS_DMASTATUS3) End of Channel Transfer Status */ -#define UDPHS_DMASTATUS3_END_BF_ST (0x1 << 5) /**< \brief (UDPHS_DMASTATUS3) End of Channel Buffer Status */ -#define UDPHS_DMASTATUS3_DESC_LDST (0x1 << 6) /**< \brief (UDPHS_DMASTATUS3) Descriptor Loaded Status */ -#define UDPHS_DMASTATUS3_BUFF_COUNT (0xffff << 16) /**< \brief (UDPHS_DMASTATUS3) Buffer Byte Count */ -/* -------- UDPHS_DMANXTDSC4 : (UDPHS Offset: 0x350) UDPHS DMA Next Descriptor Address Register (channel = 4) -------- */ -#define UDPHS_DMANXTDSC4_NXT_DSC_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMANXTDSC4) */ -/* -------- UDPHS_DMAADDRESS4 : (UDPHS Offset: 0x354) UDPHS DMA Channel Address Register (channel = 4) -------- */ -#define UDPHS_DMAADDRESS4_BUFF_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMAADDRESS4) */ -/* -------- UDPHS_DMACONTROL4 : (UDPHS Offset: 0x358) UDPHS DMA Channel Control Register (channel = 4) -------- */ -#define UDPHS_DMACONTROL4_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMACONTROL4) */ -#define UDPHS_DMACONTROL4_LDNXT_DSC (0x1 << 1) /**< \brief (UDPHS_DMACONTROL4) Load Next Channel Transfer Descriptor Enable (Command) */ -#define UDPHS_DMACONTROL4_END_TR_EN (0x1 << 2) /**< \brief (UDPHS_DMACONTROL4) End of Transfer Enable (Control) */ -#define UDPHS_DMACONTROL4_END_B_EN (0x1 << 3) /**< \brief (UDPHS_DMACONTROL4) End of Buffer Enable (Control) */ -#define UDPHS_DMACONTROL4_END_TR_IT (0x1 << 4) /**< \brief (UDPHS_DMACONTROL4) End of Transfer Interrupt Enable */ -#define UDPHS_DMACONTROL4_END_BUFFIT (0x1 << 5) /**< \brief (UDPHS_DMACONTROL4) End of Buffer Interrupt Enable */ -#define UDPHS_DMACONTROL4_DESC_LD_IT (0x1 << 6) /**< \brief (UDPHS_DMACONTROL4) Descriptor Loaded Interrupt Enable */ -#define UDPHS_DMACONTROL4_BURST_LCK (0x1 << 7) /**< \brief (UDPHS_DMACONTROL4) Burst Lock Enable */ -#define UDPHS_DMACONTROL4_BUFF_LENGTH (0xffff << 16) /**< \brief (UDPHS_DMACONTROL4) Buffer Byte Length (Write-only) */ -/* -------- UDPHS_DMASTATUS4 : (UDPHS Offset: 0x35C) UDPHS DMA Channel Status Register (channel = 4) -------- */ -#define UDPHS_DMASTATUS4_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMASTATUS4) Channel Enable Status */ -#define UDPHS_DMASTATUS4_CHANN_ACT (0x1 << 1) /**< \brief (UDPHS_DMASTATUS4) Channel Active Status */ -#define UDPHS_DMASTATUS4_END_TR_ST (0x1 << 4) /**< \brief (UDPHS_DMASTATUS4) End of Channel Transfer Status */ -#define UDPHS_DMASTATUS4_END_BF_ST (0x1 << 5) /**< \brief (UDPHS_DMASTATUS4) End of Channel Buffer Status */ -#define UDPHS_DMASTATUS4_DESC_LDST (0x1 << 6) /**< \brief (UDPHS_DMASTATUS4) Descriptor Loaded Status */ -#define UDPHS_DMASTATUS4_BUFF_COUNT (0xffff << 16) /**< \brief (UDPHS_DMASTATUS4) Buffer Byte Count */ -/* -------- UDPHS_DMANXTDSC5 : (UDPHS Offset: 0x360) UDPHS DMA Next Descriptor Address Register (channel = 5) -------- */ -#define UDPHS_DMANXTDSC5_NXT_DSC_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMANXTDSC5) */ -/* -------- UDPHS_DMAADDRESS5 : (UDPHS Offset: 0x364) UDPHS DMA Channel Address Register (channel = 5) -------- */ -#define UDPHS_DMAADDRESS5_BUFF_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMAADDRESS5) */ -/* -------- UDPHS_DMACONTROL5 : (UDPHS Offset: 0x368) UDPHS DMA Channel Control Register (channel = 5) -------- */ -#define UDPHS_DMACONTROL5_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMACONTROL5) */ -#define UDPHS_DMACONTROL5_LDNXT_DSC (0x1 << 1) /**< \brief (UDPHS_DMACONTROL5) Load Next Channel Transfer Descriptor Enable (Command) */ -#define UDPHS_DMACONTROL5_END_TR_EN (0x1 << 2) /**< \brief (UDPHS_DMACONTROL5) End of Transfer Enable (Control) */ -#define UDPHS_DMACONTROL5_END_B_EN (0x1 << 3) /**< \brief (UDPHS_DMACONTROL5) End of Buffer Enable (Control) */ -#define UDPHS_DMACONTROL5_END_TR_IT (0x1 << 4) /**< \brief (UDPHS_DMACONTROL5) End of Transfer Interrupt Enable */ -#define UDPHS_DMACONTROL5_END_BUFFIT (0x1 << 5) /**< \brief (UDPHS_DMACONTROL5) End of Buffer Interrupt Enable */ -#define UDPHS_DMACONTROL5_DESC_LD_IT (0x1 << 6) /**< \brief (UDPHS_DMACONTROL5) Descriptor Loaded Interrupt Enable */ -#define UDPHS_DMACONTROL5_BURST_LCK (0x1 << 7) /**< \brief (UDPHS_DMACONTROL5) Burst Lock Enable */ -#define UDPHS_DMACONTROL5_BUFF_LENGTH (0xffff << 16) /**< \brief (UDPHS_DMACONTROL5) Buffer Byte Length (Write-only) */ -/* -------- UDPHS_DMASTATUS5 : (UDPHS Offset: 0x36C) UDPHS DMA Channel Status Register (channel = 5) -------- */ -#define UDPHS_DMASTATUS5_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMASTATUS5) Channel Enable Status */ -#define UDPHS_DMASTATUS5_CHANN_ACT (0x1 << 1) /**< \brief (UDPHS_DMASTATUS5) Channel Active Status */ -#define UDPHS_DMASTATUS5_END_TR_ST (0x1 << 4) /**< \brief (UDPHS_DMASTATUS5) End of Channel Transfer Status */ -#define UDPHS_DMASTATUS5_END_BF_ST (0x1 << 5) /**< \brief (UDPHS_DMASTATUS5) End of Channel Buffer Status */ -#define UDPHS_DMASTATUS5_DESC_LDST (0x1 << 6) /**< \brief (UDPHS_DMASTATUS5) Descriptor Loaded Status */ -#define UDPHS_DMASTATUS5_BUFF_COUNT (0xffff << 16) /**< \brief (UDPHS_DMASTATUS5) Buffer Byte Count */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Universal Synchronous Asynchronous Receiver Transmitter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_USART Universal Synchronous Asynchronous Receiver Transmitter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Usart hardware registers */ -typedef struct { - WoReg US_CR; /**< \brief (Usart Offset: 0x0000) Control Register */ - RwReg US_MR; /**< \brief (Usart Offset: 0x0004) Mode Register */ - WoReg US_IER; /**< \brief (Usart Offset: 0x0008) Interrupt Enable Register */ - WoReg US_IDR; /**< \brief (Usart Offset: 0x000C) Interrupt Disable Register */ - RoReg US_IMR; /**< \brief (Usart Offset: 0x0010) Interrupt Mask Register */ - RoReg US_CSR; /**< \brief (Usart Offset: 0x0014) Channel Status Register */ - RoReg US_RHR; /**< \brief (Usart Offset: 0x0018) Receiver Holding Register */ - WoReg US_THR; /**< \brief (Usart Offset: 0x001C) Transmitter Holding Register */ - RwReg US_BRGR; /**< \brief (Usart Offset: 0x0020) Baud Rate Generator Register */ - RwReg US_RTOR; /**< \brief (Usart Offset: 0x0024) Receiver Time-out Register */ - RwReg US_TTGR; /**< \brief (Usart Offset: 0x0028) Transmitter Timeguard Register */ - RwReg Reserved1[5]; - RwReg US_FIDI; /**< \brief (Usart Offset: 0x0040) FI DI Ratio Register */ - RoReg US_NER; /**< \brief (Usart Offset: 0x0044) Number of Errors Register */ - RwReg Reserved2[1]; - RwReg US_IF; /**< \brief (Usart Offset: 0x004C) IrDA Filter Register */ - RwReg US_MAN; /**< \brief (Usart Offset: 0x0050) Manchester Encoder Decoder Register */ - RwReg Reserved3[36]; - RwReg US_WPMR; /**< \brief (Usart Offset: 0xE4) Write Protect Mode Register */ - RoReg US_WPSR; /**< \brief (Usart Offset: 0xE8) Write Protect Status Register */ - RwReg Reserved4[4]; - RoReg US_VERSION; /**< \brief (Usart Offset: 0xFC) Version Register */ - RwReg US_RPR; /**< \brief (Usart Offset: 0x100) Receive Pointer Register */ - RwReg US_RCR; /**< \brief (Usart Offset: 0x104) Receive Counter Register */ - RwReg US_TPR; /**< \brief (Usart Offset: 0x108) Transmit Pointer Register */ - RwReg US_TCR; /**< \brief (Usart Offset: 0x10C) Transmit Counter Register */ - RwReg US_RNPR; /**< \brief (Usart Offset: 0x110) Receive Next Pointer Register */ - RwReg US_RNCR; /**< \brief (Usart Offset: 0x114) Receive Next Counter Register */ - RwReg US_TNPR; /**< \brief (Usart Offset: 0x118) Transmit Next Pointer Register */ - RwReg US_TNCR; /**< \brief (Usart Offset: 0x11C) Transmit Next Counter Register */ - WoReg US_PTCR; /**< \brief (Usart Offset: 0x120) Transfer Control Register */ - RoReg US_PTSR; /**< \brief (Usart Offset: 0x124) Transfer Status Register */ -} Usart; -#endif /* __ASSEMBLY__ */ -/* -------- US_CR : (USART Offset: 0x0000) Control Register -------- */ -#define US_CR_RSTRX (0x1 << 2) /**< \brief (US_CR) Reset Receiver */ -#define US_CR_RSTTX (0x1 << 3) /**< \brief (US_CR) Reset Transmitter */ -#define US_CR_RXEN (0x1 << 4) /**< \brief (US_CR) Receiver Enable */ -#define US_CR_RXDIS (0x1 << 5) /**< \brief (US_CR) Receiver Disable */ -#define US_CR_TXEN (0x1 << 6) /**< \brief (US_CR) Transmitter Enable */ -#define US_CR_TXDIS (0x1 << 7) /**< \brief (US_CR) Transmitter Disable */ -#define US_CR_RSTSTA (0x1 << 8) /**< \brief (US_CR) Reset Status Bits */ -#define US_CR_STTBRK (0x1 << 9) /**< \brief (US_CR) Start Break */ -#define US_CR_STPBRK (0x1 << 10) /**< \brief (US_CR) Stop Break */ -#define US_CR_STTTO (0x1 << 11) /**< \brief (US_CR) Start Time-out */ -#define US_CR_SENDA (0x1 << 12) /**< \brief (US_CR) Send Address */ -#define US_CR_RSTIT (0x1 << 13) /**< \brief (US_CR) Reset Iterations */ -#define US_CR_RSTNACK (0x1 << 14) /**< \brief (US_CR) Reset Non Acknowledge */ -#define US_CR_RETTO (0x1 << 15) /**< \brief (US_CR) Rearm Time-out */ -#define US_CR_RTSEN__FCS (0x1 << 18) /**< \brief (US_CR) Request to Send Enable/Force SPI Chip Select */ -#define US_CR_RTSDIS__RCS (0x1 << 19) /**< \brief (US_CR) Request to Send Disable/Release SPI Chip Select */ -/* -------- US_MR : (USART Offset: 0x0004) Mode Register -------- */ -#define US_MR_USART_MODE (0xf << 0) /**< \brief (US_MR) */ -#define US_MR_USCLKS (0x3 << 4) /**< \brief (US_MR) Clock Selection */ -#define US_MR_CHRL (0x3 << 6) /**< \brief (US_MR) Character Length. */ -#define US_MR_SYNC__CPHA (0x1 << 8) /**< \brief (US_MR) Synchronous Mode Select or SPI Clock Phase */ -#define US_MR_PAR (0x7 << 9) /**< \brief (US_MR) Parity Type */ -#define US_MR_NBSTOP (0x3 << 12) /**< \brief (US_MR) Number of Stop Bits */ -#define US_MR_CHMODE (0x3 << 14) /**< \brief (US_MR) Channel Mode */ -#define US_MR_MSBF__CPOL (0x1 << 16) /**< \brief (US_MR) Bit Order or SPI Clock Polarity */ -#define US_MR_MODE9 (0x1 << 17) /**< \brief (US_MR) 9-bit Character Length */ -#define US_MR_CLKO (0x1 << 18) /**< \brief (US_MR) Clock Output Select */ -#define US_MR_OVER (0x1 << 19) /**< \brief (US_MR) Oversampling Mode */ -#define US_MR_INACK (0x1 << 20) /**< \brief (US_MR) Inhibit Non Acknowledge */ -#define US_MR_DSNACK (0x1 << 21) /**< \brief (US_MR) Disable Successive NACK */ -#define US_MR_VAR_SYNC (0x1 << 22) /**< \brief (US_MR) Variable Synchronization of Command/Data Sync Start Frame Delimiter */ -#define US_MR_INVDATA (0x1 << 23) /**< \brief (US_MR) INverted Data */ -#define US_MR_MAX_ITERATION (0x7 << 24) /**< \brief (US_MR) */ -#define US_MR_FILTER (0x1 << 28) /**< \brief (US_MR) Infrared Receive Line Filter */ -#define US_MR_MAN (0x1 << 29) /**< \brief (US_MR) Manchester Encoder/Decoder Enable */ -#define US_MR_MODSYNC_ (0x1 << 30) /**< \brief (US_MR) */ -#define US_MR_ONEBIT (0x1 << 31) /**< \brief (US_MR) Start Frame Delimiter Selector */ -/* -------- US_IER : (USART Offset: 0x0008) Interrupt Enable Register -------- */ -#define US_IER_RXRDY (0x1 << 0) /**< \brief (US_IER) RXRDY Interrupt Enable */ -#define US_IER_TXRDY (0x1 << 1) /**< \brief (US_IER) TXRDY Interrupt Enable */ -#define US_IER_RXBRK (0x1 << 2) /**< \brief (US_IER) Receiver Break Interrupt Enable */ -#define US_IER_ENDRX (0x1 << 3) /**< \brief (US_IER) End of Receive Transfer Interrupt Enable */ -#define US_IER_ENDTX (0x1 << 4) /**< \brief (US_IER) End of Transmit Interrupt Enable */ -#define US_IER_OVRE (0x1 << 5) /**< \brief (US_IER) Overrun Error Interrupt Enable */ -#define US_IER_FRAME (0x1 << 6) /**< \brief (US_IER) Framing Error Interrupt Enable */ -#define US_IER_PARE (0x1 << 7) /**< \brief (US_IER) Parity Error Interrupt Enable */ -#define US_IER_TIMEOUT (0x1 << 8) /**< \brief (US_IER) Time-out Interrupt Enable */ -#define US_IER_TXEMPTY (0x1 << 9) /**< \brief (US_IER) TXEMPTY Interrupt Enable */ -#define US_IER_ITER__UNRE (0x1 << 10) /**< \brief (US_IER) Iteration or SPI Underrun Error Interrupt Enable */ -#define US_IER_TXBUFE (0x1 << 11) /**< \brief (US_IER) Buffer Empty Interrupt Enable */ -#define US_IER_RXBUFF (0x1 << 12) /**< \brief (US_IER) Buffer Full Interrupt Enable */ -#define US_IER_NACK (0x1 << 13) /**< \brief (US_IER) Non Acknowledge Interrupt Enable */ -#define US_IER_CTSIC (0x1 << 19) /**< \brief (US_IER) Clear to Send Input Change Interrupt Enable */ -#define US_IER_MANE (0x1 << 24) /**< \brief (US_IER) Manchester Error Interrupt Enable */ -/* -------- US_IDR : (USART Offset: 0x000C) Interrupt Disable Register -------- */ -#define US_IDR_RXRDY (0x1 << 0) /**< \brief (US_IDR) RXRDY Interrupt Disable */ -#define US_IDR_TXRDY (0x1 << 1) /**< \brief (US_IDR) TXRDY Interrupt Disable */ -#define US_IDR_RXBRK (0x1 << 2) /**< \brief (US_IDR) Receiver Break Interrupt Disable */ -#define US_IDR_ENDRX (0x1 << 3) /**< \brief (US_IDR) End of Receive Transfer Interrupt Disable */ -#define US_IDR_ENDTX (0x1 << 4) /**< \brief (US_IDR) End of Transmit Interrupt Disable */ -#define US_IDR_OVRE (0x1 << 5) /**< \brief (US_IDR) Overrun Error Interrupt Disable */ -#define US_IDR_FRAME (0x1 << 6) /**< \brief (US_IDR) Framing Error Interrupt Disable */ -#define US_IDR_PARE (0x1 << 7) /**< \brief (US_IDR) Parity Error Interrupt Disable */ -#define US_IDR_TIMEOUT (0x1 << 8) /**< \brief (US_IDR) Time-out Interrupt Disable */ -#define US_IDR_TXEMPTY (0x1 << 9) /**< \brief (US_IDR) TXEMPTY Interrupt Disable */ -#define US_IDR_ITER__UNRE (0x1 << 10) /**< \brief (US_IDR) Iteration or SPI Underrun Error Interrupt Enable */ -#define US_IDR_TXBUFE (0x1 << 11) /**< \brief (US_IDR) Buffer Empty Interrupt Disable */ -#define US_IDR_RXBUFF (0x1 << 12) /**< \brief (US_IDR) Buffer Full Interrupt Disable */ -#define US_IDR_NACK (0x1 << 13) /**< \brief (US_IDR) Non Acknowledge Interrupt Disable */ -#define US_IDR_CTSIC (0x1 << 19) /**< \brief (US_IDR) Clear to Send Input Change Interrupt Disable */ -#define US_IDR_MANE (0x1 << 24) /**< \brief (US_IDR) Manchester Error Interrupt Disable */ -/* -------- US_IMR : (USART Offset: 0x0010) Interrupt Mask Register -------- */ -#define US_IMR_RXRDY (0x1 << 0) /**< \brief (US_IMR) RXRDY Interrupt Mask */ -#define US_IMR_TXRDY (0x1 << 1) /**< \brief (US_IMR) TXRDY Interrupt Mask */ -#define US_IMR_RXBRK (0x1 << 2) /**< \brief (US_IMR) Receiver Break Interrupt Mask */ -#define US_IMR_ENDRX (0x1 << 3) /**< \brief (US_IMR) End of Receive Transfer Interrupt Mask */ -#define US_IMR_ENDTX (0x1 << 4) /**< \brief (US_IMR) End of Transmit Interrupt Mask */ -#define US_IMR_OVRE (0x1 << 5) /**< \brief (US_IMR) Overrun Error Interrupt Mask */ -#define US_IMR_FRAME (0x1 << 6) /**< \brief (US_IMR) Framing Error Interrupt Mask */ -#define US_IMR_PARE (0x1 << 7) /**< \brief (US_IMR) Parity Error Interrupt Mask */ -#define US_IMR_TIMEOUT (0x1 << 8) /**< \brief (US_IMR) Time-out Interrupt Mask */ -#define US_IMR_TXEMPTY (0x1 << 9) /**< \brief (US_IMR) TXEMPTY Interrupt Mask */ -#define US_IMR_ITER__UNRE (0x1 << 10) /**< \brief (US_IMR) Iteration or SPI Underrun Error Interrupt Enable */ -#define US_IMR_TXBUFE (0x1 << 11) /**< \brief (US_IMR) Buffer Empty Interrupt Mask */ -#define US_IMR_RXBUFF (0x1 << 12) /**< \brief (US_IMR) Buffer Full Interrupt Mask */ -#define US_IMR_NACK (0x1 << 13) /**< \brief (US_IMR) Non Acknowledge Interrupt Mask */ -#define US_IMR_CTSIC (0x1 << 19) /**< \brief (US_IMR) Clear to Send Input Change Interrupt Mask */ -#define US_IMR_MANE (0x1 << 24) /**< \brief (US_IMR) Manchester Error Interrupt Mask */ -/* -------- US_CSR : (USART Offset: 0x0014) Channel Status Register -------- */ -#define US_CSR_RXRDY (0x1 << 0) /**< \brief (US_CSR) Receiver Ready */ -#define US_CSR_TXRDY (0x1 << 1) /**< \brief (US_CSR) Transmitter Ready */ -#define US_CSR_RXBRK (0x1 << 2) /**< \brief (US_CSR) Break Received/End of Break */ -#define US_CSR_ENDRX (0x1 << 3) /**< \brief (US_CSR) End of Receiver Transfer */ -#define US_CSR_ENDTX (0x1 << 4) /**< \brief (US_CSR) End of Transmitter Transfer */ -#define US_CSR_OVRE (0x1 << 5) /**< \brief (US_CSR) Overrun Error */ -#define US_CSR_FRAME (0x1 << 6) /**< \brief (US_CSR) Framing Error */ -#define US_CSR_PARE (0x1 << 7) /**< \brief (US_CSR) Parity Error */ -#define US_CSR_TIMEOUT (0x1 << 8) /**< \brief (US_CSR) Receiver Time-out */ -#define US_CSR_TXEMPTY (0x1 << 9) /**< \brief (US_CSR) Transmitter Empty */ -#define US_CSR_ITER__UNRE (0x1 << 10) /**< \brief (US_CSR) Max number of Repetitions Reached or SPI Underrun Error */ -#define US_CSR_TXBUFE (0x1 << 11) /**< \brief (US_CSR) Transmission Buffer Empty */ -#define US_CSR_RXBUFF (0x1 << 12) /**< \brief (US_CSR) Reception Buffer Full */ -#define US_CSR_NACK (0x1 << 13) /**< \brief (US_CSR) */ -#define US_CSR_CTSIC (0x1 << 19) /**< \brief (US_CSR) Clear to Send Input Change Flag */ -#define US_CSR_CTS (0x1 << 23) /**< \brief (US_CSR) Image of CTS Input */ -#define US_CSR_MANERR (0x1 << 24) /**< \brief (US_CSR) Manchester Error */ -/* -------- US_RHR : (USART Offset: 0x0018) Receiver Holding Register -------- */ -#define US_RHR_RXCHR (0x1ff << 0) /**< \brief (US_RHR) Received Character */ -#define US_RHR_RXSYNH (0x1 << 15) /**< \brief (US_RHR) Received Sync */ -/* -------- US_THR : (USART Offset: 0x001C) Transmitter Holding Register -------- */ -#define US_THR_TXCHR (0x1ff << 0) /**< \brief (US_THR) Character to be Transmitted */ -#define US_THR_TXSYNH (0x1 << 15) /**< \brief (US_THR) Sync Field to be transmitted */ -/* -------- US_BRGR : (USART Offset: 0x0020) Baud Rate Generator Register -------- */ -#define US_BRGR_CD (0xffff << 0) /**< \brief (US_BRGR) Clock Divider */ -#define US_BRGR_FP (0x7 << 16) /**< \brief (US_BRGR) Fractional Part */ -/* -------- US_RTOR : (USART Offset: 0x0024) Receiver Time-out Register -------- */ -#define US_RTOR_TO (0xffff << 0) /**< \brief (US_RTOR) Time-out Value */ -/* -------- US_TTGR : (USART Offset: 0x0028) Transmitter Timeguard Register -------- */ -#define US_TTGR_TG (0xff << 0) /**< \brief (US_TTGR) Timeguard Value */ -/* -------- US_FIDI : (USART Offset: 0x0040) FI DI Ratio Register -------- */ -#define US_FIDI_FI_DI_RATIO (0x7ff << 0) /**< \brief (US_FIDI) FI Over DI Ratio Value */ -/* -------- US_NER : (USART Offset: 0x0044) Number of Errors Register -------- */ -#define US_NER_NB_ERRORS (0xff << 0) /**< \brief (US_NER) Number of Errors */ -/* -------- US_IF : (USART Offset: 0x004C) IrDA Filter Register -------- */ -#define US_IF_IRDA_FILTER (0xff << 0) /**< \brief (US_IF) IrDA Filter */ -/* -------- US_MAN : (USART Offset: 0x0050) Manchester Encoder Decoder Register -------- */ -#define US_MAN_TX_PL (0xf << 0) /**< \brief (US_MAN) Transmitter Preamble Length */ -#define US_MAN_TX_PP (0x3 << 8) /**< \brief (US_MAN) Transmitter Preamble Pattern */ -#define US_MAN_TX_MPOL (0x1 << 12) /**< \brief (US_MAN) Transmitter Manchester Polarity */ -#define US_MAN_RX_PL (0xf << 16) /**< \brief (US_MAN) Receiver Preamble Length */ -#define US_MAN_RX_PP (0x3 << 24) /**< \brief (US_MAN) Receiver Preamble Pattern detected */ -#define US_MAN_RX_MPOL (0x1 << 28) /**< \brief (US_MAN) Receiver Manchester Polarity */ -#define US_MAN_STUCKTO1 (0x1 << 29) /**< \brief (US_MAN) */ -#define US_MAN_DRIFT (0x1 << 30) /**< \brief (US_MAN) Drift compensation */ -/* -------- US_WPMR : (USART Offset: 0xE4) Write Protect Mode Register -------- */ -#define US_WPMR_WPEN (0x1 << 0) /**< \brief (US_WPMR) Write Protect Enable */ -#define US_WPMR_WPKEY (0xffffff << 8) /**< \brief (US_WPMR) Write Protect KEY */ -/* -------- US_WPSR : (USART Offset: 0xE8) Write Protect Status Register -------- */ -#define US_WPSR_WPVS (0x1 << 0) /**< \brief (US_WPSR) Write Protect Violation Status */ -#define US_WPSR_WPVSRC (0xffff << 8) /**< \brief (US_WPSR) Write Protect Violation Source */ -/* -------- US_VERSION : (USART Offset: 0xFC) Version Register -------- */ -#define US_VERSION_VERSION (0xfff << 0) /**< \brief (US_VERSION) */ -#define US_VERSION_MFN (0x7 << 16) /**< \brief (US_VERSION) */ -/* -------- US_RPR : (USART Offset: 0x100) Receive Pointer Register -------- */ -#define US_RPR_RXPTR (0xffffffff << 0) /**< \brief (US_RPR) Receive Pointer Register */ -/* -------- US_RCR : (USART Offset: 0x104) Receive Counter Register -------- */ -#define US_RCR_RXCTR (0xffff << 0) /**< \brief (US_RCR) Receive Counter Register */ -/* -------- US_TPR : (USART Offset: 0x108) Transmit Pointer Register -------- */ -#define US_TPR_TXPTR (0xffffffff << 0) /**< \brief (US_TPR) Transmit Counter Register */ -/* -------- US_TCR : (USART Offset: 0x10C) Transmit Counter Register -------- */ -#define US_TCR_TXCTR (0xffff << 0) /**< \brief (US_TCR) Transmit Counter Register */ -/* -------- US_RNPR : (USART Offset: 0x110) Receive Next Pointer Register -------- */ -#define US_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (US_RNPR) Receive Next Pointer */ -/* -------- US_RNCR : (USART Offset: 0x114) Receive Next Counter Register -------- */ -#define US_RNCR_RXNCTR (0xffff << 0) /**< \brief (US_RNCR) Receive Next Counter */ -/* -------- US_TNPR : (USART Offset: 0x118) Transmit Next Pointer Register -------- */ -#define US_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (US_TNPR) Transmit Next Pointer */ -/* -------- US_TNCR : (USART Offset: 0x11C) Transmit Next Counter Register -------- */ -#define US_TNCR_TXNCTR (0xffff << 0) /**< \brief (US_TNCR) Transmit Counter Next */ -/* -------- US_PTCR : (USART Offset: 0x120) Transfer Control Register -------- */ -#define US_PTCR_RXTEN (0x1 << 0) /**< \brief (US_PTCR) Receiver Transfer Enable */ -#define US_PTCR_RXTDIS (0x1 << 1) /**< \brief (US_PTCR) Receiver Transfer Disable */ -#define US_PTCR_TXTEN (0x1 << 8) /**< \brief (US_PTCR) Transmitter Transfer Enable */ -#define US_PTCR_TXTDIS (0x1 << 9) /**< \brief (US_PTCR) Transmitter Transfer Disable */ -/* -------- US_PTSR : (USART Offset: 0x124) Transfer Status Register -------- */ -#define US_PTSR_RXTEN (0x1 << 0) /**< \brief (US_PTSR) Receiver Transfer Enable */ -#define US_PTSR_TXTEN (0x1 << 8) /**< \brief (US_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Watchdog Timer */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_WDT Watchdog Timer */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Wdt hardware registers */ -typedef struct { - WoReg WDT_CR; /**< \brief (Wdt Offset: 0x00) Control Register */ - RwReg WDT_MR; /**< \brief (Wdt Offset: 0x04) Mode Register */ - RoReg WDT_SR; /**< \brief (Wdt Offset: 0x08) Status Register */ -} Wdt; -#endif /* __ASSEMBLY__ */ -/* -------- WDT_CR : (WDT Offset: 0x00) Control Register -------- */ -#define WDT_CR_WDRSTT (0x1 << 0) /**< \brief (WDT_CR) Watchdog Restart */ -#define WDT_CR_KEY (0xff << 24) /**< \brief (WDT_CR) Password */ -/* -------- WDT_MR : (WDT Offset: 0x04) Mode Register -------- */ -#define WDT_MR_WDV (0xfff << 0) /**< \brief (WDT_MR) Watchdog Counter Value */ -#define WDT_MR_WDFIEN (0x1 << 12) /**< \brief (WDT_MR) Watchdog Fault Interrupt Enable */ -#define WDT_MR_WDRSTEN (0x1 << 13) /**< \brief (WDT_MR) Watchdog Reset Enable */ -#define WDT_MR_WDRPROC (0x1 << 14) /**< \brief (WDT_MR) Watchdog Reset Processor */ -#define WDT_MR_WDDIS (0x1 << 15) /**< \brief (WDT_MR) Watchdog Disable */ -#define WDT_MR_WDD (0xfff << 16) /**< \brief (WDT_MR) Watchdog Delta Value */ -#define WDT_MR_WDDBGHLT (0x1 << 28) /**< \brief (WDT_MR) Watchdog Debug Halt */ -#define WDT_MR_WDIDLEHLT (0x1 << 29) /**< \brief (WDT_MR) Watchdog Idle Halt */ -/* -------- WDT_SR : (WDT Offset: 0x08) Status Register -------- */ -#define WDT_SR_WDUNF (0x1 << 0) /**< \brief (WDT_SR) Watchdog Underflow */ -#define WDT_SR_WDERR (0x1 << 1) /**< \brief (WDT_SR) Watchdog Error */ - -/*@}*/ - -/*@}*/ - -/* ***************************************************************************** */ -/* REGISTER ACCESS DEFINITIONS FOR AT91SAM3U */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3U_reg Registers Access Definitions */ -/*@{*/ - -/* ========== Register definition for HSMCI peripheral ========== */ -#define REG_HSMCI_CR REG_ACCESS(WoReg, 0x40000000U) /**< \brief (HSMCI) Control Register */ -#define REG_HSMCI_MR REG_ACCESS(RwReg, 0x40000004U) /**< \brief (HSMCI) Mode Register */ -#define REG_HSMCI_DTOR REG_ACCESS(RwReg, 0x40000008U) /**< \brief (HSMCI) Data Timeout Register */ -#define REG_HSMCI_SDCR REG_ACCESS(RwReg, 0x4000000CU) /**< \brief (HSMCI) SD/SDIO Card Register */ -#define REG_HSMCI_ARGR REG_ACCESS(RwReg, 0x40000010U) /**< \brief (HSMCI) Argument Register */ -#define REG_HSMCI_CMDR REG_ACCESS(WoReg, 0x40000014U) /**< \brief (HSMCI) Command Register */ -#define REG_HSMCI_BLKR REG_ACCESS(RwReg, 0x40000018U) /**< \brief (HSMCI) Block Register */ -#define REG_HSMCI_CSTOR REG_ACCESS(RwReg, 0x4000001CU) /**< \brief (HSMCI) Completion Signal Timeout Register */ -#define REG_HSMCI_RSPR REG_ACCESS(RoReg, 0x40000020U) /**< \brief (HSMCI) Response Register */ -#define REG_HSMCI_RDR REG_ACCESS(RoReg, 0x40000030U) /**< \brief (HSMCI) Receive Data Register */ -#define REG_HSMCI_TDR REG_ACCESS(WoReg, 0x40000034U) /**< \brief (HSMCI) Transmit Data Register */ -#define REG_HSMCI_SR REG_ACCESS(RoReg, 0x40000040U) /**< \brief (HSMCI) Status Register */ -#define REG_HSMCI_IER REG_ACCESS(WoReg, 0x40000044U) /**< \brief (HSMCI) Interrupt Enable Register */ -#define REG_HSMCI_IDR REG_ACCESS(WoReg, 0x40000048U) /**< \brief (HSMCI) Interrupt Disable Register */ -#define REG_HSMCI_IMR REG_ACCESS(RoReg, 0x4000004CU) /**< \brief (HSMCI) Interrupt Mask Register */ -#define REG_HSMCI_DMA REG_ACCESS(RwReg, 0x40000050U) /**< \brief (HSMCI) DMA Configuration Register */ -#define REG_HSMCI_CFG REG_ACCESS(RwReg, 0x40000054U) /**< \brief (HSMCI) Configuration Register */ -#define REG_HSMCI_WPMR REG_ACCESS(RwReg, 0x400000E4U) /**< \brief (HSMCI) Write Protection Mode Register */ -#define REG_HSMCI_WPSR REG_ACCESS(RoReg, 0x400000E8U) /**< \brief (HSMCI) Write Protection Status Register */ -/* ========== Register definition for SSC peripheral ========== */ -#define REG_SSC_CR REG_ACCESS(WoReg, 0x40004000U) /**< \brief (SSC) Control Register */ -#define REG_SSC_CMR REG_ACCESS(RwReg, 0x40004004U) /**< \brief (SSC) Clock Mode Register */ -#define REG_SSC_RCMR REG_ACCESS(RwReg, 0x40004010U) /**< \brief (SSC) Receive Clock Mode Register */ -#define REG_SSC_RFMR REG_ACCESS(RwReg, 0x40004014U) /**< \brief (SSC) Receive Frame Mode Register */ -#define REG_SSC_TCMR REG_ACCESS(RwReg, 0x40004018U) /**< \brief (SSC) Transmit Clock Mode Register */ -#define REG_SSC_TFMR REG_ACCESS(RwReg, 0x4000401CU) /**< \brief (SSC) Transmit Frame Mode Register */ -#define REG_SSC_RHR REG_ACCESS(RoReg, 0x40004020U) /**< \brief (SSC) Receive Holding Register */ -#define REG_SSC_THR REG_ACCESS(WoReg, 0x40004024U) /**< \brief (SSC) Transmit Holding Register */ -#define REG_SSC_RSHR REG_ACCESS(RoReg, 0x40004030U) /**< \brief (SSC) Receive Sync. Holding Register */ -#define REG_SSC_TSHR REG_ACCESS(RwReg, 0x40004034U) /**< \brief (SSC) Transmit Sync. Holding Register */ -#define REG_SSC_RC0R REG_ACCESS(RwReg, 0x40004038U) /**< \brief (SSC) Receive Compare 0 Register */ -#define REG_SSC_RC1R REG_ACCESS(RwReg, 0x4000403CU) /**< \brief (SSC) Receive Compare 1 Register */ -#define REG_SSC_SR REG_ACCESS(RoReg, 0x40004040U) /**< \brief (SSC) Status Register */ -#define REG_SSC_IER REG_ACCESS(WoReg, 0x40004044U) /**< \brief (SSC) Interrupt Enable Register */ -#define REG_SSC_IDR REG_ACCESS(WoReg, 0x40004048U) /**< \brief (SSC) Interrupt Disable Register */ -#define REG_SSC_IMR REG_ACCESS(RoReg, 0x4000404CU) /**< \brief (SSC) Interrupt Mask Register */ -#define REG_SSC_WPMR REG_ACCESS(RwReg, 0x400040E4U) /**< \brief (SSC) Write Protect Mode Register */ -#define REG_SSC_WPSR REG_ACCESS(RoReg, 0x400040E8U) /**< \brief (SSC) Write Protect Status Register */ -/* ========== Register definition for SPI peripheral ========== */ -#define REG_SPI_CR REG_ACCESS(WoReg, 0x40008000U) /**< \brief (SPI) Control Register */ -#define REG_SPI_MR REG_ACCESS(RwReg, 0x40008004U) /**< \brief (SPI) Mode Register */ -#define REG_SPI_RDR REG_ACCESS(RoReg, 0x40008008U) /**< \brief (SPI) Receive Data Register */ -#define REG_SPI_TDR REG_ACCESS(WoReg, 0x4000800CU) /**< \brief (SPI) Transmit Data Register */ -#define REG_SPI_SR REG_ACCESS(RoReg, 0x40008010U) /**< \brief (SPI) Status Register */ -#define REG_SPI_IER REG_ACCESS(WoReg, 0x40008014U) /**< \brief (SPI) Interrupt Enable Register */ -#define REG_SPI_IDR REG_ACCESS(WoReg, 0x40008018U) /**< \brief (SPI) Interrupt Disable Register */ -#define REG_SPI_IMR REG_ACCESS(RoReg, 0x4000801CU) /**< \brief (SPI) Interrupt Mask Register */ -#define REG_SPI_CSR REG_ACCESS(RwReg, 0x40008030U) /**< \brief (SPI) Chip Select Register */ -#define REG_SPI_WPCR REG_ACCESS(RwReg, 0x400080E4U) /**< \brief (SPI) Write Protection Control Register */ -#define REG_SPI_WPSR REG_ACCESS(RoReg, 0x400080E8U) /**< \brief (SPI) Write Protection Status Register */ -/* ========== Register definition for TC0 peripheral ========== */ -#define REG_TC0_CCR0 REG_ACCESS(WoReg, 0x40080000U) /**< \brief (TC0) Channel Control Register (channel = 0) */ -#define REG_TC0_CMR0 REG_ACCESS(RwReg, 0x40080004U) /**< \brief (TC0) Channel Mode Register (channel = 0) */ -#define REG_TC0_CV0 REG_ACCESS(RoReg, 0x40080010U) /**< \brief (TC0) Counter Value (channel = 0) */ -#define REG_TC0_RA0 REG_ACCESS(RwReg, 0x40080014U) /**< \brief (TC0) Register A (channel = 0) */ -#define REG_TC0_RB0 REG_ACCESS(RwReg, 0x40080018U) /**< \brief (TC0) Register B (channel = 0) */ -#define REG_TC0_RC0 REG_ACCESS(RwReg, 0x4008001CU) /**< \brief (TC0) Register C (channel = 0) */ -#define REG_TC0_SR0 REG_ACCESS(RoReg, 0x40080020U) /**< \brief (TC0) Status Register (channel = 0) */ -#define REG_TC0_IER0 REG_ACCESS(WoReg, 0x40080024U) /**< \brief (TC0) Interrupt Enable Register (channel = 0) */ -#define REG_TC0_IDR0 REG_ACCESS(WoReg, 0x40080028U) /**< \brief (TC0) Interrupt Disable Register (channel = 0) */ -#define REG_TC0_IMR0 REG_ACCESS(RoReg, 0x4008002CU) /**< \brief (TC0) Interrupt Mask Register (channel = 0) */ -#define REG_TC0_CCR1 REG_ACCESS(WoReg, 0x40080040U) /**< \brief (TC0) Channel Control Register (channel = 1) */ -#define REG_TC0_CMR1 REG_ACCESS(RwReg, 0x40080044U) /**< \brief (TC0) Channel Mode Register (channel = 1) */ -#define REG_TC0_CV1 REG_ACCESS(RoReg, 0x40080050U) /**< \brief (TC0) Counter Value (channel = 1) */ -#define REG_TC0_RA1 REG_ACCESS(RwReg, 0x40080054U) /**< \brief (TC0) Register A (channel = 1) */ -#define REG_TC0_RB1 REG_ACCESS(RwReg, 0x40080058U) /**< \brief (TC0) Register B (channel = 1) */ -#define REG_TC0_RC1 REG_ACCESS(RwReg, 0x4008005CU) /**< \brief (TC0) Register C (channel = 1) */ -#define REG_TC0_SR1 REG_ACCESS(RoReg, 0x40080060U) /**< \brief (TC0) Status Register (channel = 1) */ -#define REG_TC0_IER1 REG_ACCESS(WoReg, 0x40080064U) /**< \brief (TC0) Interrupt Enable Register (channel = 1) */ -#define REG_TC0_IDR1 REG_ACCESS(WoReg, 0x40080068U) /**< \brief (TC0) Interrupt Disable Register (channel = 1) */ -#define REG_TC0_IMR1 REG_ACCESS(RoReg, 0x4008006CU) /**< \brief (TC0) Interrupt Mask Register (channel = 1) */ -#define REG_TC0_CCR2 REG_ACCESS(WoReg, 0x40080080U) /**< \brief (TC0) Channel Control Register (channel = 2) */ -#define REG_TC0_CMR2 REG_ACCESS(RwReg, 0x40080084U) /**< \brief (TC0) Channel Mode Register (channel = 2) */ -#define REG_TC0_CV2 REG_ACCESS(RoReg, 0x40080090U) /**< \brief (TC0) Counter Value (channel = 2) */ -#define REG_TC0_RA2 REG_ACCESS(RwReg, 0x40080094U) /**< \brief (TC0) Register A (channel = 2) */ -#define REG_TC0_RB2 REG_ACCESS(RwReg, 0x40080098U) /**< \brief (TC0) Register B (channel = 2) */ -#define REG_TC0_RC2 REG_ACCESS(RwReg, 0x4008009CU) /**< \brief (TC0) Register C (channel = 2) */ -#define REG_TC0_SR2 REG_ACCESS(RoReg, 0x400800A0U) /**< \brief (TC0) Status Register (channel = 2) */ -#define REG_TC0_IER2 REG_ACCESS(WoReg, 0x400800A4U) /**< \brief (TC0) Interrupt Enable Register (channel = 2) */ -#define REG_TC0_IDR2 REG_ACCESS(WoReg, 0x400800A8U) /**< \brief (TC0) Interrupt Disable Register (channel = 2) */ -#define REG_TC0_IMR2 REG_ACCESS(RoReg, 0x400800ACU) /**< \brief (TC0) Interrupt Mask Register (channel = 2) */ -#define REG_TC0_BCR REG_ACCESS(WoReg, 0x400800C0U) /**< \brief (TC0) Block Control Register */ -#define REG_TC0_BMR REG_ACCESS(RwReg, 0x400800C4U) /**< \brief (TC0) Block Mode Register */ -#define REG_TC0_QIER REG_ACCESS(WoReg, 0x400800C8U) /**< \brief (TC0) QDEC Interrupt Enable Register */ -#define REG_TC0_QIDR REG_ACCESS(WoReg, 0x400800CCU) /**< \brief (TC0) QDEC Interrupt Disable Register */ -#define REG_TC0_QIMR REG_ACCESS(RoReg, 0x400800D0U) /**< \brief (TC0) QDEC Interrupt Mask Register */ -#define REG_TC0_QISR REG_ACCESS(RoReg, 0x400800D4U) /**< \brief (TC0) QDEC Interrupt Status Register */ -#define REG_TC0_VER REG_ACCESS(RoReg, 0x400800FCU) /**< \brief (TC0) Version Register */ -/* ========== Register definition for TWI0 peripheral ========== */ -#define REG_TWI0_CR REG_ACCESS(WoReg, 0x40084000U) /**< \brief (TWI0) Control Register */ -#define REG_TWI0_MMR REG_ACCESS(RwReg, 0x40084004U) /**< \brief (TWI0) Master Mode Register */ -#define REG_TWI0_SMR REG_ACCESS(RwReg, 0x40084008U) /**< \brief (TWI0) Slave Mode Register */ -#define REG_TWI0_IADR REG_ACCESS(RwReg, 0x4008400CU) /**< \brief (TWI0) Internal Address Register */ -#define REG_TWI0_CWGR REG_ACCESS(RwReg, 0x40084010U) /**< \brief (TWI0) Clock Waveform Generator Register */ -#define REG_TWI0_SR REG_ACCESS(RoReg, 0x40084020U) /**< \brief (TWI0) Status Register */ -#define REG_TWI0_IER REG_ACCESS(WoReg, 0x40084024U) /**< \brief (TWI0) Interrupt Enable Register */ -#define REG_TWI0_IDR REG_ACCESS(WoReg, 0x40084028U) /**< \brief (TWI0) Interrupt Disable Register */ -#define REG_TWI0_IMR REG_ACCESS(RoReg, 0x4008402CU) /**< \brief (TWI0) Interrupt Mask Register */ -#define REG_TWI0_RHR REG_ACCESS(RoReg, 0x40084030U) /**< \brief (TWI0) Receive Holding Register */ -#define REG_TWI0_THR REG_ACCESS(WoReg, 0x40084034U) /**< \brief (TWI0) Transmit Holding Register */ -#define REG_TWI0_RPR REG_ACCESS(RwReg, 0x40084100U) /**< \brief (TWI0) Receive Pointer Register */ -#define REG_TWI0_RCR REG_ACCESS(RwReg, 0x40084104U) /**< \brief (TWI0) Receive Counter Register */ -#define REG_TWI0_TPR REG_ACCESS(RwReg, 0x40084108U) /**< \brief (TWI0) Transmit Pointer Register */ -#define REG_TWI0_TCR REG_ACCESS(RwReg, 0x4008410CU) /**< \brief (TWI0) Transmit Counter Register */ -#define REG_TWI0_RNPR REG_ACCESS(RwReg, 0x40084110U) /**< \brief (TWI0) Receive Next Pointer Register */ -#define REG_TWI0_RNCR REG_ACCESS(RwReg, 0x40084114U) /**< \brief (TWI0) Receive Next Counter Register */ -#define REG_TWI0_TNPR REG_ACCESS(RwReg, 0x40084118U) /**< \brief (TWI0) Transmit Next Pointer Register */ -#define REG_TWI0_TNCR REG_ACCESS(RwReg, 0x4008411CU) /**< \brief (TWI0) Transmit Next Counter Register */ -#define REG_TWI0_PTCR REG_ACCESS(WoReg, 0x40084120U) /**< \brief (TWI0) Transfer Control Register */ -#define REG_TWI0_PTSR REG_ACCESS(RoReg, 0x40084124U) /**< \brief (TWI0) Transfer Status Register */ -/* ========== Register definition for TWI1 peripheral ========== */ -#define REG_TWI1_CR REG_ACCESS(WoReg, 0x40088000U) /**< \brief (TWI1) Control Register */ -#define REG_TWI1_MMR REG_ACCESS(RwReg, 0x40088004U) /**< \brief (TWI1) Master Mode Register */ -#define REG_TWI1_SMR REG_ACCESS(RwReg, 0x40088008U) /**< \brief (TWI1) Slave Mode Register */ -#define REG_TWI1_IADR REG_ACCESS(RwReg, 0x4008800CU) /**< \brief (TWI1) Internal Address Register */ -#define REG_TWI1_CWGR REG_ACCESS(RwReg, 0x40088010U) /**< \brief (TWI1) Clock Waveform Generator Register */ -#define REG_TWI1_SR REG_ACCESS(RoReg, 0x40088020U) /**< \brief (TWI1) Status Register */ -#define REG_TWI1_IER REG_ACCESS(WoReg, 0x40088024U) /**< \brief (TWI1) Interrupt Enable Register */ -#define REG_TWI1_IDR REG_ACCESS(WoReg, 0x40088028U) /**< \brief (TWI1) Interrupt Disable Register */ -#define REG_TWI1_IMR REG_ACCESS(RoReg, 0x4008802CU) /**< \brief (TWI1) Interrupt Mask Register */ -#define REG_TWI1_RHR REG_ACCESS(RoReg, 0x40088030U) /**< \brief (TWI1) Receive Holding Register */ -#define REG_TWI1_THR REG_ACCESS(WoReg, 0x40088034U) /**< \brief (TWI1) Transmit Holding Register */ -#define REG_TWI1_RPR REG_ACCESS(RwReg, 0x40088100U) /**< \brief (TWI1) Receive Pointer Register */ -#define REG_TWI1_RCR REG_ACCESS(RwReg, 0x40088104U) /**< \brief (TWI1) Receive Counter Register */ -#define REG_TWI1_TPR REG_ACCESS(RwReg, 0x40088108U) /**< \brief (TWI1) Transmit Pointer Register */ -#define REG_TWI1_TCR REG_ACCESS(RwReg, 0x4008810CU) /**< \brief (TWI1) Transmit Counter Register */ -#define REG_TWI1_RNPR REG_ACCESS(RwReg, 0x40088110U) /**< \brief (TWI1) Receive Next Pointer Register */ -#define REG_TWI1_RNCR REG_ACCESS(RwReg, 0x40088114U) /**< \brief (TWI1) Receive Next Counter Register */ -#define REG_TWI1_TNPR REG_ACCESS(RwReg, 0x40088118U) /**< \brief (TWI1) Transmit Next Pointer Register */ -#define REG_TWI1_TNCR REG_ACCESS(RwReg, 0x4008811CU) /**< \brief (TWI1) Transmit Next Counter Register */ -#define REG_TWI1_PTCR REG_ACCESS(WoReg, 0x40088120U) /**< \brief (TWI1) Transfer Control Register */ -#define REG_TWI1_PTSR REG_ACCESS(RoReg, 0x40088124U) /**< \brief (TWI1) Transfer Status Register */ -/* ========== Register definition for PWM peripheral ========== */ -#define REG_PWM_CLK REG_ACCESS(RwReg, 0x4008C000U) /**< \brief (PWM) PWM Clock Register */ -#define REG_PWM_ENA REG_ACCESS(WoReg, 0x4008C004U) /**< \brief (PWM) PWM Enable Register */ -#define REG_PWM_DIS REG_ACCESS(WoReg, 0x4008C008U) /**< \brief (PWM) PWM Disable Register */ -#define REG_PWM_SR REG_ACCESS(RoReg, 0x4008C00CU) /**< \brief (PWM) PWM Status Register */ -#define REG_PWM_IER1 REG_ACCESS(WoReg, 0x4008C010U) /**< \brief (PWM) PWM Interrupt Enable Register 1 */ -#define REG_PWM_IDR1 REG_ACCESS(WoReg, 0x4008C014U) /**< \brief (PWM) PWM Interrupt Disable Register 1 */ -#define REG_PWM_IMR1 REG_ACCESS(RoReg, 0x4008C018U) /**< \brief (PWM) PWM Interrupt Mask Register 1 */ -#define REG_PWM_ISR1 REG_ACCESS(RoReg, 0x4008C01CU) /**< \brief (PWM) PWM Interrupt Status Register 1 */ -#define REG_PWM_SCM REG_ACCESS(RwReg, 0x4008C020U) /**< \brief (PWM) PWM Sync Channels Mode Register */ -#define REG_PWM_SCUC REG_ACCESS(RwReg, 0x4008C028U) /**< \brief (PWM) PWM Sync Channels Update Control Register */ -#define REG_PWM_SCUP REG_ACCESS(RwReg, 0x4008C02CU) /**< \brief (PWM) PWM Sync Channels Update Period Register */ -#define REG_PWM_SCUPUPD REG_ACCESS(WoReg, 0x4008C030U) /**< \brief (PWM) PWM Sync Channels Update Period Update Register */ -#define REG_PWM_IER2 REG_ACCESS(WoReg, 0x4008C034U) /**< \brief (PWM) PWM Interrupt Enable Register 2 */ -#define REG_PWM_IDR2 REG_ACCESS(WoReg, 0x4008C038U) /**< \brief (PWM) PWM Interrupt Disable Register 2 */ -#define REG_PWM_IMR2 REG_ACCESS(RoReg, 0x4008C03CU) /**< \brief (PWM) PWM Interrupt Mask Register 2 */ -#define REG_PWM_ISR2 REG_ACCESS(RoReg, 0x4008C040U) /**< \brief (PWM) PWM Interrupt Status Register 2 */ -#define REG_PWM_OOV REG_ACCESS(RwReg, 0x4008C044U) /**< \brief (PWM) PWM Output Override Value Register */ -#define REG_PWM_OS REG_ACCESS(RwReg, 0x4008C048U) /**< \brief (PWM) PWM Output Selection Register */ -#define REG_PWM_OSS REG_ACCESS(WoReg, 0x4008C04CU) /**< \brief (PWM) PWM Output Selection Set Register */ -#define REG_PWM_OSC REG_ACCESS(WoReg, 0x4008C050U) /**< \brief (PWM) PWM Output Selection Clear Register */ -#define REG_PWM_OSSUPD REG_ACCESS(WoReg, 0x4008C054U) /**< \brief (PWM) PWM Output Selection Set Update Register */ -#define REG_PWM_OSCUPD REG_ACCESS(WoReg, 0x4008C058U) /**< \brief (PWM) PWM Output Selection Clear Update Register */ -#define REG_PWM_FMR REG_ACCESS(RwReg, 0x4008C05CU) /**< \brief (PWM) PWM Fault Mode Register */ -#define REG_PWM_FSR REG_ACCESS(RoReg, 0x4008C060U) /**< \brief (PWM) PWM Fault Status Register */ -#define REG_PWM_FCR REG_ACCESS(WoReg, 0x4008C064U) /**< \brief (PWM) PWM Fault Clear Register */ -#define REG_PWM_FPV REG_ACCESS(RwReg, 0x4008C068U) /**< \brief (PWM) PWM Fault Protection Value Register */ -#define REG_PWM_FPE REG_ACCESS(RwReg, 0x4008C06CU) /**< \brief (PWM) PWM Fault Protection Enable Register */ -#define REG_PWM_ELxMR REG_ACCESS(RwReg, 0x4008C07CU) /**< \brief (PWM) PWM Event Line 0 Mode Register */ -#define REG_PWM_WPCR REG_ACCESS(WoReg, 0x4008C0E4U) /**< \brief (PWM) PWM Write Protect Control Register */ -#define REG_PWM_WPSR REG_ACCESS(RoReg, 0x4008C0E8U) /**< \brief (PWM) PWM Write Protect Status Register */ -#define REG_PWM_RPR REG_ACCESS(RwReg, 0x4008C100U) /**< \brief (PWM) Receive Pointer Register */ -#define REG_PWM_RCR REG_ACCESS(RwReg, 0x4008C104U) /**< \brief (PWM) Receive Counter Register */ -#define REG_PWM_TPR REG_ACCESS(RwReg, 0x4008C108U) /**< \brief (PWM) Transmit Pointer Register */ -#define REG_PWM_TCR REG_ACCESS(RwReg, 0x4008C10CU) /**< \brief (PWM) Transmit Counter Register */ -#define REG_PWM_RNPR REG_ACCESS(RwReg, 0x4008C110U) /**< \brief (PWM) Receive Next Pointer Register */ -#define REG_PWM_RNCR REG_ACCESS(RwReg, 0x4008C114U) /**< \brief (PWM) Receive Next Counter Register */ -#define REG_PWM_TNPR REG_ACCESS(RwReg, 0x4008C118U) /**< \brief (PWM) Transmit Next Pointer Register */ -#define REG_PWM_TNCR REG_ACCESS(RwReg, 0x4008C11CU) /**< \brief (PWM) Transmit Next Counter Register */ -#define REG_PWM_PTCR REG_ACCESS(WoReg, 0x4008C120U) /**< \brief (PWM) Transfer Control Register */ -#define REG_PWM_PTSR REG_ACCESS(RoReg, 0x4008C124U) /**< \brief (PWM) Transfer Status Register */ -#define REG_PWM_CMP0V REG_ACCESS(RwReg, 0x4008C130U) /**< \brief (PWM) PWM Comparison 0 Value Register */ -#define REG_PWM_CMP0VUPD REG_ACCESS(WoReg, 0x4008C134U) /**< \brief (PWM) PWM Comparison 0 Value Update Register */ -#define REG_PWM_CMP0M REG_ACCESS(RwReg, 0x4008C138U) /**< \brief (PWM) PWM Comparison 0 Mode Register */ -#define REG_PWM_CMP0MUPD REG_ACCESS(WoReg, 0x4008C13CU) /**< \brief (PWM) PWM Comparison 0 Mode Update Register */ -#define REG_PWM_CMP1V REG_ACCESS(RwReg, 0x4008C140U) /**< \brief (PWM) PWM Comparison 1 Value Register */ -#define REG_PWM_CMP1VUPD REG_ACCESS(WoReg, 0x4008C144U) /**< \brief (PWM) PWM Comparison 1 Value Update Register */ -#define REG_PWM_CMP1M REG_ACCESS(RwReg, 0x4008C148U) /**< \brief (PWM) PWM Comparison 1 Mode Register */ -#define REG_PWM_CMP1MUPD REG_ACCESS(WoReg, 0x4008C14CU) /**< \brief (PWM) PWM Comparison 1 Mode Update Register */ -#define REG_PWM_CMP2V REG_ACCESS(RwReg, 0x4008C150U) /**< \brief (PWM) PWM Comparison 2 Value Register */ -#define REG_PWM_CMP2VUPD REG_ACCESS(WoReg, 0x4008C154U) /**< \brief (PWM) PWM Comparison 2 Value Update Register */ -#define REG_PWM_CMP2M REG_ACCESS(RwReg, 0x4008C158U) /**< \brief (PWM) PWM Comparison 2 Mode Register */ -#define REG_PWM_CMP2MUPD REG_ACCESS(WoReg, 0x4008C15CU) /**< \brief (PWM) PWM Comparison 2 Mode Update Register */ -#define REG_PWM_CMP3V REG_ACCESS(RwReg, 0x4008C160U) /**< \brief (PWM) PWM Comparison 3 Value Register */ -#define REG_PWM_CMP3VUPD REG_ACCESS(WoReg, 0x4008C164U) /**< \brief (PWM) PWM Comparison 3 Value Update Register */ -#define REG_PWM_CMP3M REG_ACCESS(RwReg, 0x4008C168U) /**< \brief (PWM) PWM Comparison 3 Mode Register */ -#define REG_PWM_CMP3MUPD REG_ACCESS(WoReg, 0x4008C16CU) /**< \brief (PWM) PWM Comparison 3 Mode Update Register */ -#define REG_PWM_CMP4V REG_ACCESS(RwReg, 0x4008C170U) /**< \brief (PWM) PWM Comparison 4 Value Register */ -#define REG_PWM_CMP4VUPD REG_ACCESS(WoReg, 0x4008C174U) /**< \brief (PWM) PWM Comparison 4 Value Update Register */ -#define REG_PWM_CMP4M REG_ACCESS(RwReg, 0x4008C178U) /**< \brief (PWM) PWM Comparison 4 Mode Register */ -#define REG_PWM_CMP4MUPD REG_ACCESS(WoReg, 0x4008C17CU) /**< \brief (PWM) PWM Comparison 4 Mode Update Register */ -#define REG_PWM_CMP5V REG_ACCESS(RwReg, 0x4008C180U) /**< \brief (PWM) PWM Comparison 5 Value Register */ -#define REG_PWM_CMP5VUPD REG_ACCESS(WoReg, 0x4008C184U) /**< \brief (PWM) PWM Comparison 5 Value Update Register */ -#define REG_PWM_CMP5M REG_ACCESS(RwReg, 0x4008C188U) /**< \brief (PWM) PWM Comparison 5 Mode Register */ -#define REG_PWM_CMP5MUPD REG_ACCESS(WoReg, 0x4008C18CU) /**< \brief (PWM) PWM Comparison 5 Mode Update Register */ -#define REG_PWM_CMP6V REG_ACCESS(RwReg, 0x4008C190U) /**< \brief (PWM) PWM Comparison 6 Value Register */ -#define REG_PWM_CMP6VUPD REG_ACCESS(WoReg, 0x4008C194U) /**< \brief (PWM) PWM Comparison 6 Value Update Register */ -#define REG_PWM_CMP6M REG_ACCESS(RwReg, 0x4008C198U) /**< \brief (PWM) PWM Comparison 6 Mode Register */ -#define REG_PWM_CMP6MUPD REG_ACCESS(WoReg, 0x4008C19CU) /**< \brief (PWM) PWM Comparison 6 Mode Update Register */ -#define REG_PWM_CMP7V REG_ACCESS(RwReg, 0x4008C1A0U) /**< \brief (PWM) PWM Comparison 7 Value Register */ -#define REG_PWM_CMP7VUPD REG_ACCESS(WoReg, 0x4008C1A4U) /**< \brief (PWM) PWM Comparison 7 Value Update Register */ -#define REG_PWM_CMP7M REG_ACCESS(RwReg, 0x4008C1A8U) /**< \brief (PWM) PWM Comparison 7 Mode Register */ -#define REG_PWM_CMP7MUPD REG_ACCESS(WoReg, 0x4008C1ACU) /**< \brief (PWM) PWM Comparison 7 Mode Update Register */ -#define REG_PWM_CMR0 REG_ACCESS(RwReg, 0x4008C200U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 0) */ -#define REG_PWM_CDTY0 REG_ACCESS(RwReg, 0x4008C204U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 0) */ -#define REG_PWM_CDTYUPD0 REG_ACCESS(WoReg, 0x4008C208U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 0) */ -#define REG_PWM_CPRD0 REG_ACCESS(RwReg, 0x4008C20CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 0) */ -#define REG_PWM_CPRDUPD0 REG_ACCESS(WoReg, 0x4008C210U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 0) */ -#define REG_PWM_CCNT0 REG_ACCESS(RoReg, 0x4008C214U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 0) */ -#define REG_PWM_DT0 REG_ACCESS(RwReg, 0x4008C218U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 0) */ -#define REG_PWM_DTUPD0 REG_ACCESS(WoReg, 0x4008C21CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 0) */ -#define REG_PWM_CMR1 REG_ACCESS(RwReg, 0x4008C220U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 1) */ -#define REG_PWM_CDTY1 REG_ACCESS(RwReg, 0x4008C224U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 1) */ -#define REG_PWM_CDTYUPD1 REG_ACCESS(WoReg, 0x4008C228U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 1) */ -#define REG_PWM_CPRD1 REG_ACCESS(RwReg, 0x4008C22CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 1) */ -#define REG_PWM_CPRDUPD1 REG_ACCESS(WoReg, 0x4008C230U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 1) */ -#define REG_PWM_CCNT1 REG_ACCESS(RoReg, 0x4008C234U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 1) */ -#define REG_PWM_DT1 REG_ACCESS(RwReg, 0x4008C238U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 1) */ -#define REG_PWM_DTUPD1 REG_ACCESS(WoReg, 0x4008C23CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 1) */ -#define REG_PWM_CMR2 REG_ACCESS(RwReg, 0x4008C240U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 2) */ -#define REG_PWM_CDTY2 REG_ACCESS(RwReg, 0x4008C244U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 2) */ -#define REG_PWM_CDTYUPD2 REG_ACCESS(WoReg, 0x4008C248U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 2) */ -#define REG_PWM_CPRD2 REG_ACCESS(RwReg, 0x4008C24CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 2) */ -#define REG_PWM_CPRDUPD2 REG_ACCESS(WoReg, 0x4008C250U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 2) */ -#define REG_PWM_CCNT2 REG_ACCESS(RoReg, 0x4008C254U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 2) */ -#define REG_PWM_DT2 REG_ACCESS(RwReg, 0x4008C258U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 2) */ -#define REG_PWM_DTUPD2 REG_ACCESS(WoReg, 0x4008C25CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 2) */ -#define REG_PWM_CMR3 REG_ACCESS(RwReg, 0x4008C260U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 3) */ -#define REG_PWM_CDTY3 REG_ACCESS(RwReg, 0x4008C264U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 3) */ -#define REG_PWM_CDTYUPD3 REG_ACCESS(WoReg, 0x4008C268U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 3) */ -#define REG_PWM_CPRD3 REG_ACCESS(RwReg, 0x4008C26CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 3) */ -#define REG_PWM_CPRDUPD3 REG_ACCESS(WoReg, 0x4008C270U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 3) */ -#define REG_PWM_CCNT3 REG_ACCESS(RoReg, 0x4008C274U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 3) */ -#define REG_PWM_DT3 REG_ACCESS(RwReg, 0x4008C278U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 3) */ -#define REG_PWM_DTUPD3 REG_ACCESS(WoReg, 0x4008C27CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 3) */ -/* ========== Register definition for USART0 peripheral ========== */ -#define REG_USART0_CR REG_ACCESS(WoReg, 0x40090000U) /**< \brief (USART0) Control Register */ -#define REG_USART0_MR REG_ACCESS(RwReg, 0x40090004U) /**< \brief (USART0) Mode Register */ -#define REG_USART0_IER REG_ACCESS(WoReg, 0x40090008U) /**< \brief (USART0) Interrupt Enable Register */ -#define REG_USART0_IDR REG_ACCESS(WoReg, 0x4009000CU) /**< \brief (USART0) Interrupt Disable Register */ -#define REG_USART0_IMR REG_ACCESS(RoReg, 0x40090010U) /**< \brief (USART0) Interrupt Mask Register */ -#define REG_USART0_CSR REG_ACCESS(RoReg, 0x40090014U) /**< \brief (USART0) Channel Status Register */ -#define REG_USART0_RHR REG_ACCESS(RoReg, 0x40090018U) /**< \brief (USART0) Receiver Holding Register */ -#define REG_USART0_THR REG_ACCESS(WoReg, 0x4009001CU) /**< \brief (USART0) Transmitter Holding Register */ -#define REG_USART0_BRGR REG_ACCESS(RwReg, 0x40090020U) /**< \brief (USART0) Baud Rate Generator Register */ -#define REG_USART0_RTOR REG_ACCESS(RwReg, 0x40090024U) /**< \brief (USART0) Receiver Time-out Register */ -#define REG_USART0_TTGR REG_ACCESS(RwReg, 0x40090028U) /**< \brief (USART0) Transmitter Timeguard Register */ -#define REG_USART0_FIDI REG_ACCESS(RwReg, 0x40090040U) /**< \brief (USART0) FI DI Ratio Register */ -#define REG_USART0_NER REG_ACCESS(RoReg, 0x40090044U) /**< \brief (USART0) Number of Errors Register */ -#define REG_USART0_IF REG_ACCESS(RwReg, 0x4009004CU) /**< \brief (USART0) IrDA Filter Register */ -#define REG_USART0_MAN REG_ACCESS(RwReg, 0x40090050U) /**< \brief (USART0) Manchester Encoder Decoder Register */ -#define REG_USART0_WPMR REG_ACCESS(RwReg, 0x400900E4U) /**< \brief (USART0) Write Protect Mode Register */ -#define REG_USART0_WPSR REG_ACCESS(RoReg, 0x400900E8U) /**< \brief (USART0) Write Protect Status Register */ -#define REG_USART0_VERSION REG_ACCESS(RoReg, 0x400900FCU) /**< \brief (USART0) Version Register */ -#define REG_USART0_RPR REG_ACCESS(RwReg, 0x40090100U) /**< \brief (USART0) Receive Pointer Register */ -#define REG_USART0_RCR REG_ACCESS(RwReg, 0x40090104U) /**< \brief (USART0) Receive Counter Register */ -#define REG_USART0_TPR REG_ACCESS(RwReg, 0x40090108U) /**< \brief (USART0) Transmit Pointer Register */ -#define REG_USART0_TCR REG_ACCESS(RwReg, 0x4009010CU) /**< \brief (USART0) Transmit Counter Register */ -#define REG_USART0_RNPR REG_ACCESS(RwReg, 0x40090110U) /**< \brief (USART0) Receive Next Pointer Register */ -#define REG_USART0_RNCR REG_ACCESS(RwReg, 0x40090114U) /**< \brief (USART0) Receive Next Counter Register */ -#define REG_USART0_TNPR REG_ACCESS(RwReg, 0x40090118U) /**< \brief (USART0) Transmit Next Pointer Register */ -#define REG_USART0_TNCR REG_ACCESS(RwReg, 0x4009011CU) /**< \brief (USART0) Transmit Next Counter Register */ -#define REG_USART0_PTCR REG_ACCESS(WoReg, 0x40090120U) /**< \brief (USART0) Transfer Control Register */ -#define REG_USART0_PTSR REG_ACCESS(RoReg, 0x40090124U) /**< \brief (USART0) Transfer Status Register */ -/* ========== Register definition for USART1 peripheral ========== */ -#define REG_USART1_CR REG_ACCESS(WoReg, 0x40094000U) /**< \brief (USART1) Control Register */ -#define REG_USART1_MR REG_ACCESS(RwReg, 0x40094004U) /**< \brief (USART1) Mode Register */ -#define REG_USART1_IER REG_ACCESS(WoReg, 0x40094008U) /**< \brief (USART1) Interrupt Enable Register */ -#define REG_USART1_IDR REG_ACCESS(WoReg, 0x4009400CU) /**< \brief (USART1) Interrupt Disable Register */ -#define REG_USART1_IMR REG_ACCESS(RoReg, 0x40094010U) /**< \brief (USART1) Interrupt Mask Register */ -#define REG_USART1_CSR REG_ACCESS(RoReg, 0x40094014U) /**< \brief (USART1) Channel Status Register */ -#define REG_USART1_RHR REG_ACCESS(RoReg, 0x40094018U) /**< \brief (USART1) Receiver Holding Register */ -#define REG_USART1_THR REG_ACCESS(WoReg, 0x4009401CU) /**< \brief (USART1) Transmitter Holding Register */ -#define REG_USART1_BRGR REG_ACCESS(RwReg, 0x40094020U) /**< \brief (USART1) Baud Rate Generator Register */ -#define REG_USART1_RTOR REG_ACCESS(RwReg, 0x40094024U) /**< \brief (USART1) Receiver Time-out Register */ -#define REG_USART1_TTGR REG_ACCESS(RwReg, 0x40094028U) /**< \brief (USART1) Transmitter Timeguard Register */ -#define REG_USART1_FIDI REG_ACCESS(RwReg, 0x40094040U) /**< \brief (USART1) FI DI Ratio Register */ -#define REG_USART1_NER REG_ACCESS(RoReg, 0x40094044U) /**< \brief (USART1) Number of Errors Register */ -#define REG_USART1_IF REG_ACCESS(RwReg, 0x4009404CU) /**< \brief (USART1) IrDA Filter Register */ -#define REG_USART1_MAN REG_ACCESS(RwReg, 0x40094050U) /**< \brief (USART1) Manchester Encoder Decoder Register */ -#define REG_USART1_WPMR REG_ACCESS(RwReg, 0x400940E4U) /**< \brief (USART1) Write Protect Mode Register */ -#define REG_USART1_WPSR REG_ACCESS(RoReg, 0x400940E8U) /**< \brief (USART1) Write Protect Status Register */ -#define REG_USART1_VERSION REG_ACCESS(RoReg, 0x400940FCU) /**< \brief (USART1) Version Register */ -#define REG_USART1_RPR REG_ACCESS(RwReg, 0x40094100U) /**< \brief (USART1) Receive Pointer Register */ -#define REG_USART1_RCR REG_ACCESS(RwReg, 0x40094104U) /**< \brief (USART1) Receive Counter Register */ -#define REG_USART1_TPR REG_ACCESS(RwReg, 0x40094108U) /**< \brief (USART1) Transmit Pointer Register */ -#define REG_USART1_TCR REG_ACCESS(RwReg, 0x4009410CU) /**< \brief (USART1) Transmit Counter Register */ -#define REG_USART1_RNPR REG_ACCESS(RwReg, 0x40094110U) /**< \brief (USART1) Receive Next Pointer Register */ -#define REG_USART1_RNCR REG_ACCESS(RwReg, 0x40094114U) /**< \brief (USART1) Receive Next Counter Register */ -#define REG_USART1_TNPR REG_ACCESS(RwReg, 0x40094118U) /**< \brief (USART1) Transmit Next Pointer Register */ -#define REG_USART1_TNCR REG_ACCESS(RwReg, 0x4009411CU) /**< \brief (USART1) Transmit Next Counter Register */ -#define REG_USART1_PTCR REG_ACCESS(WoReg, 0x40094120U) /**< \brief (USART1) Transfer Control Register */ -#define REG_USART1_PTSR REG_ACCESS(RoReg, 0x40094124U) /**< \brief (USART1) Transfer Status Register */ -/* ========== Register definition for USART2 peripheral ========== */ -#define REG_USART2_CR REG_ACCESS(WoReg, 0x40098000U) /**< \brief (USART2) Control Register */ -#define REG_USART2_MR REG_ACCESS(RwReg, 0x40098004U) /**< \brief (USART2) Mode Register */ -#define REG_USART2_IER REG_ACCESS(WoReg, 0x40098008U) /**< \brief (USART2) Interrupt Enable Register */ -#define REG_USART2_IDR REG_ACCESS(WoReg, 0x4009800CU) /**< \brief (USART2) Interrupt Disable Register */ -#define REG_USART2_IMR REG_ACCESS(RoReg, 0x40098010U) /**< \brief (USART2) Interrupt Mask Register */ -#define REG_USART2_CSR REG_ACCESS(RoReg, 0x40098014U) /**< \brief (USART2) Channel Status Register */ -#define REG_USART2_RHR REG_ACCESS(RoReg, 0x40098018U) /**< \brief (USART2) Receiver Holding Register */ -#define REG_USART2_THR REG_ACCESS(WoReg, 0x4009801CU) /**< \brief (USART2) Transmitter Holding Register */ -#define REG_USART2_BRGR REG_ACCESS(RwReg, 0x40098020U) /**< \brief (USART2) Baud Rate Generator Register */ -#define REG_USART2_RTOR REG_ACCESS(RwReg, 0x40098024U) /**< \brief (USART2) Receiver Time-out Register */ -#define REG_USART2_TTGR REG_ACCESS(RwReg, 0x40098028U) /**< \brief (USART2) Transmitter Timeguard Register */ -#define REG_USART2_FIDI REG_ACCESS(RwReg, 0x40098040U) /**< \brief (USART2) FI DI Ratio Register */ -#define REG_USART2_NER REG_ACCESS(RoReg, 0x40098044U) /**< \brief (USART2) Number of Errors Register */ -#define REG_USART2_IF REG_ACCESS(RwReg, 0x4009804CU) /**< \brief (USART2) IrDA Filter Register */ -#define REG_USART2_MAN REG_ACCESS(RwReg, 0x40098050U) /**< \brief (USART2) Manchester Encoder Decoder Register */ -#define REG_USART2_WPMR REG_ACCESS(RwReg, 0x400980E4U) /**< \brief (USART2) Write Protect Mode Register */ -#define REG_USART2_WPSR REG_ACCESS(RoReg, 0x400980E8U) /**< \brief (USART2) Write Protect Status Register */ -#define REG_USART2_VERSION REG_ACCESS(RoReg, 0x400980FCU) /**< \brief (USART2) Version Register */ -#define REG_USART2_RPR REG_ACCESS(RwReg, 0x40098100U) /**< \brief (USART2) Receive Pointer Register */ -#define REG_USART2_RCR REG_ACCESS(RwReg, 0x40098104U) /**< \brief (USART2) Receive Counter Register */ -#define REG_USART2_TPR REG_ACCESS(RwReg, 0x40098108U) /**< \brief (USART2) Transmit Pointer Register */ -#define REG_USART2_TCR REG_ACCESS(RwReg, 0x4009810CU) /**< \brief (USART2) Transmit Counter Register */ -#define REG_USART2_RNPR REG_ACCESS(RwReg, 0x40098110U) /**< \brief (USART2) Receive Next Pointer Register */ -#define REG_USART2_RNCR REG_ACCESS(RwReg, 0x40098114U) /**< \brief (USART2) Receive Next Counter Register */ -#define REG_USART2_TNPR REG_ACCESS(RwReg, 0x40098118U) /**< \brief (USART2) Transmit Next Pointer Register */ -#define REG_USART2_TNCR REG_ACCESS(RwReg, 0x4009811CU) /**< \brief (USART2) Transmit Next Counter Register */ -#define REG_USART2_PTCR REG_ACCESS(WoReg, 0x40098120U) /**< \brief (USART2) Transfer Control Register */ -#define REG_USART2_PTSR REG_ACCESS(RoReg, 0x40098124U) /**< \brief (USART2) Transfer Status Register */ -/* ========== Register definition for USART3 peripheral ========== */ -#define REG_USART3_CR REG_ACCESS(WoReg, 0x4009C000U) /**< \brief (USART3) Control Register */ -#define REG_USART3_MR REG_ACCESS(RwReg, 0x4009C004U) /**< \brief (USART3) Mode Register */ -#define REG_USART3_IER REG_ACCESS(WoReg, 0x4009C008U) /**< \brief (USART3) Interrupt Enable Register */ -#define REG_USART3_IDR REG_ACCESS(WoReg, 0x4009C00CU) /**< \brief (USART3) Interrupt Disable Register */ -#define REG_USART3_IMR REG_ACCESS(RoReg, 0x4009C010U) /**< \brief (USART3) Interrupt Mask Register */ -#define REG_USART3_CSR REG_ACCESS(RoReg, 0x4009C014U) /**< \brief (USART3) Channel Status Register */ -#define REG_USART3_RHR REG_ACCESS(RoReg, 0x4009C018U) /**< \brief (USART3) Receiver Holding Register */ -#define REG_USART3_THR REG_ACCESS(WoReg, 0x4009C01CU) /**< \brief (USART3) Transmitter Holding Register */ -#define REG_USART3_BRGR REG_ACCESS(RwReg, 0x4009C020U) /**< \brief (USART3) Baud Rate Generator Register */ -#define REG_USART3_RTOR REG_ACCESS(RwReg, 0x4009C024U) /**< \brief (USART3) Receiver Time-out Register */ -#define REG_USART3_TTGR REG_ACCESS(RwReg, 0x4009C028U) /**< \brief (USART3) Transmitter Timeguard Register */ -#define REG_USART3_FIDI REG_ACCESS(RwReg, 0x4009C040U) /**< \brief (USART3) FI DI Ratio Register */ -#define REG_USART3_NER REG_ACCESS(RoReg, 0x4009C044U) /**< \brief (USART3) Number of Errors Register */ -#define REG_USART3_IF REG_ACCESS(RwReg, 0x4009C04CU) /**< \brief (USART3) IrDA Filter Register */ -#define REG_USART3_MAN REG_ACCESS(RwReg, 0x4009C050U) /**< \brief (USART3) Manchester Encoder Decoder Register */ -#define REG_USART3_WPMR REG_ACCESS(RwReg, 0x4009C0E4U) /**< \brief (USART3) Write Protect Mode Register */ -#define REG_USART3_WPSR REG_ACCESS(RoReg, 0x4009C0E8U) /**< \brief (USART3) Write Protect Status Register */ -#define REG_USART3_VERSION REG_ACCESS(RoReg, 0x4009C0FCU) /**< \brief (USART3) Version Register */ -#define REG_USART3_RPR REG_ACCESS(RwReg, 0x4009C100U) /**< \brief (USART3) Receive Pointer Register */ -#define REG_USART3_RCR REG_ACCESS(RwReg, 0x4009C104U) /**< \brief (USART3) Receive Counter Register */ -#define REG_USART3_TPR REG_ACCESS(RwReg, 0x4009C108U) /**< \brief (USART3) Transmit Pointer Register */ -#define REG_USART3_TCR REG_ACCESS(RwReg, 0x4009C10CU) /**< \brief (USART3) Transmit Counter Register */ -#define REG_USART3_RNPR REG_ACCESS(RwReg, 0x4009C110U) /**< \brief (USART3) Receive Next Pointer Register */ -#define REG_USART3_RNCR REG_ACCESS(RwReg, 0x4009C114U) /**< \brief (USART3) Receive Next Counter Register */ -#define REG_USART3_TNPR REG_ACCESS(RwReg, 0x4009C118U) /**< \brief (USART3) Transmit Next Pointer Register */ -#define REG_USART3_TNCR REG_ACCESS(RwReg, 0x4009C11CU) /**< \brief (USART3) Transmit Next Counter Register */ -#define REG_USART3_PTCR REG_ACCESS(WoReg, 0x4009C120U) /**< \brief (USART3) Transfer Control Register */ -#define REG_USART3_PTSR REG_ACCESS(RoReg, 0x4009C124U) /**< \brief (USART3) Transfer Status Register */ -/* ========== Register definition for UDPHS peripheral ========== */ -#define REG_UDPHS_CTRL REG_ACCESS(RwReg, 0x400A4000U) /**< \brief (UDPHS) UDPHS Control Register */ -#define REG_UDPHS_FNUM REG_ACCESS(RoReg, 0x400A4004U) /**< \brief (UDPHS) UDPHS Frame Number Register */ -#define REG_UDPHS_IEN REG_ACCESS(RwReg, 0x400A4010U) /**< \brief (UDPHS) UDPHS Interrupt Enable Register */ -#define REG_UDPHS_INTSTA REG_ACCESS(RoReg, 0x400A4014U) /**< \brief (UDPHS) UDPHS Interrupt Status Register */ -#define REG_UDPHS_CLRINT REG_ACCESS(WoReg, 0x400A4018U) /**< \brief (UDPHS) UDPHS Clear Interrupt Register */ -#define REG_UDPHS_EPTRST REG_ACCESS(WoReg, 0x400A401CU) /**< \brief (UDPHS) UDPHS Endpoints Reset Register */ -#define REG_UDPHS_TST REG_ACCESS(RwReg, 0x400A40E0U) /**< \brief (UDPHS) UDPHS Test Register */ -#define REG_UDPHS_IPNAME1 REG_ACCESS(RoReg, 0x400A40F0U) /**< \brief (UDPHS) UDPHS Name1 Register */ -#define REG_UDPHS_IPNAME2 REG_ACCESS(RoReg, 0x400A40F4U) /**< \brief (UDPHS) UDPHS Name2 Register */ -#define REG_UDPHS_IPFEATURES REG_ACCESS(RoReg, 0x400A40F8U) /**< \brief (UDPHS) UDPHS Features Register */ -#define REG_UDPHS_EPTCFG0 REG_ACCESS(RwReg, 0x400A4100U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 0) */ -#define REG_UDPHS_EPTCTLENB0 REG_ACCESS(WoReg, 0x400A4104U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 0) */ -#define REG_UDPHS_EPTCTLDIS0 REG_ACCESS(WoReg, 0x400A4108U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 0) */ -#define REG_UDPHS_EPTCTL0 REG_ACCESS(RoReg, 0x400A410CU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 0) */ -#define REG_UDPHS_EPTSETSTA0 REG_ACCESS(WoReg, 0x400A4114U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 0) */ -#define REG_UDPHS_EPTCLRSTA0 REG_ACCESS(WoReg, 0x400A4118U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 0) */ -#define REG_UDPHS_EPTSTA0 REG_ACCESS(RoReg, 0x400A411CU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 0) */ -#define REG_UDPHS_EPTCFG1 REG_ACCESS(RwReg, 0x400A4120U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 1) */ -#define REG_UDPHS_EPTCTLENB1 REG_ACCESS(WoReg, 0x400A4124U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 1) */ -#define REG_UDPHS_EPTCTLDIS1 REG_ACCESS(WoReg, 0x400A4128U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 1) */ -#define REG_UDPHS_EPTCTL1 REG_ACCESS(RoReg, 0x400A412CU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 1) */ -#define REG_UDPHS_EPTSETSTA1 REG_ACCESS(WoReg, 0x400A4134U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 1) */ -#define REG_UDPHS_EPTCLRSTA1 REG_ACCESS(WoReg, 0x400A4138U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 1) */ -#define REG_UDPHS_EPTSTA1 REG_ACCESS(RoReg, 0x400A413CU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 1) */ -#define REG_UDPHS_EPTCFG2 REG_ACCESS(RwReg, 0x400A4140U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 2) */ -#define REG_UDPHS_EPTCTLENB2 REG_ACCESS(WoReg, 0x400A4144U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 2) */ -#define REG_UDPHS_EPTCTLDIS2 REG_ACCESS(WoReg, 0x400A4148U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 2) */ -#define REG_UDPHS_EPTCTL2 REG_ACCESS(RoReg, 0x400A414CU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 2) */ -#define REG_UDPHS_EPTSETSTA2 REG_ACCESS(WoReg, 0x400A4154U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 2) */ -#define REG_UDPHS_EPTCLRSTA2 REG_ACCESS(WoReg, 0x400A4158U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 2) */ -#define REG_UDPHS_EPTSTA2 REG_ACCESS(RoReg, 0x400A415CU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 2) */ -#define REG_UDPHS_EPTCFG3 REG_ACCESS(RwReg, 0x400A4160U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 3) */ -#define REG_UDPHS_EPTCTLENB3 REG_ACCESS(WoReg, 0x400A4164U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 3) */ -#define REG_UDPHS_EPTCTLDIS3 REG_ACCESS(WoReg, 0x400A4168U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 3) */ -#define REG_UDPHS_EPTCTL3 REG_ACCESS(RoReg, 0x400A416CU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 3) */ -#define REG_UDPHS_EPTSETSTA3 REG_ACCESS(WoReg, 0x400A4174U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 3) */ -#define REG_UDPHS_EPTCLRSTA3 REG_ACCESS(WoReg, 0x400A4178U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 3) */ -#define REG_UDPHS_EPTSTA3 REG_ACCESS(RoReg, 0x400A417CU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 3) */ -#define REG_UDPHS_EPTCFG4 REG_ACCESS(RwReg, 0x400A4180U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 4) */ -#define REG_UDPHS_EPTCTLENB4 REG_ACCESS(WoReg, 0x400A4184U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 4) */ -#define REG_UDPHS_EPTCTLDIS4 REG_ACCESS(WoReg, 0x400A4188U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 4) */ -#define REG_UDPHS_EPTCTL4 REG_ACCESS(RoReg, 0x400A418CU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 4) */ -#define REG_UDPHS_EPTSETSTA4 REG_ACCESS(WoReg, 0x400A4194U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 4) */ -#define REG_UDPHS_EPTCLRSTA4 REG_ACCESS(WoReg, 0x400A4198U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 4) */ -#define REG_UDPHS_EPTSTA4 REG_ACCESS(RoReg, 0x400A419CU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 4) */ -#define REG_UDPHS_EPTCFG5 REG_ACCESS(RwReg, 0x400A41A0U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 5) */ -#define REG_UDPHS_EPTCTLENB5 REG_ACCESS(WoReg, 0x400A41A4U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 5) */ -#define REG_UDPHS_EPTCTLDIS5 REG_ACCESS(WoReg, 0x400A41A8U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 5) */ -#define REG_UDPHS_EPTCTL5 REG_ACCESS(RoReg, 0x400A41ACU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 5) */ -#define REG_UDPHS_EPTSETSTA5 REG_ACCESS(WoReg, 0x400A41B4U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 5) */ -#define REG_UDPHS_EPTCLRSTA5 REG_ACCESS(WoReg, 0x400A41B8U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 5) */ -#define REG_UDPHS_EPTSTA5 REG_ACCESS(RoReg, 0x400A41BCU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 5) */ -#define REG_UDPHS_EPTCFG6 REG_ACCESS(RwReg, 0x400A41C0U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 6) */ -#define REG_UDPHS_EPTCTLENB6 REG_ACCESS(WoReg, 0x400A41C4U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 6) */ -#define REG_UDPHS_EPTCTLDIS6 REG_ACCESS(WoReg, 0x400A41C8U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 6) */ -#define REG_UDPHS_EPTCTL6 REG_ACCESS(RoReg, 0x400A41CCU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 6) */ -#define REG_UDPHS_EPTSETSTA6 REG_ACCESS(WoReg, 0x400A41D4U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 6) */ -#define REG_UDPHS_EPTCLRSTA6 REG_ACCESS(WoReg, 0x400A41D8U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 6) */ -#define REG_UDPHS_EPTSTA6 REG_ACCESS(RoReg, 0x400A41DCU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 6) */ -#define REG_UDPHS_DMANXTDSC1 REG_ACCESS(RwReg, 0x400A4320U) /**< \brief (UDPHS) UDPHS DMA Next Descriptor Address Register (channel = 1) */ -#define REG_UDPHS_DMAADDRESS1 REG_ACCESS(RwReg, 0x400A4324U) /**< \brief (UDPHS) UDPHS DMA Channel Address Register (channel = 1) */ -#define REG_UDPHS_DMACONTROL1 REG_ACCESS(RwReg, 0x400A4328U) /**< \brief (UDPHS) UDPHS DMA Channel Control Register (channel = 1) */ -#define REG_UDPHS_DMASTATUS1 REG_ACCESS(RwReg, 0x400A432CU) /**< \brief (UDPHS) UDPHS DMA Channel Status Register (channel = 1) */ -#define REG_UDPHS_DMANXTDSC2 REG_ACCESS(RwReg, 0x400A4330U) /**< \brief (UDPHS) UDPHS DMA Next Descriptor Address Register (channel = 2) */ -#define REG_UDPHS_DMAADDRESS2 REG_ACCESS(RwReg, 0x400A4334U) /**< \brief (UDPHS) UDPHS DMA Channel Address Register (channel = 2) */ -#define REG_UDPHS_DMACONTROL2 REG_ACCESS(RwReg, 0x400A4338U) /**< \brief (UDPHS) UDPHS DMA Channel Control Register (channel = 2) */ -#define REG_UDPHS_DMASTATUS2 REG_ACCESS(RwReg, 0x400A433CU) /**< \brief (UDPHS) UDPHS DMA Channel Status Register (channel = 2) */ -#define REG_UDPHS_DMANXTDSC3 REG_ACCESS(RwReg, 0x400A4340U) /**< \brief (UDPHS) UDPHS DMA Next Descriptor Address Register (channel = 3) */ -#define REG_UDPHS_DMAADDRESS3 REG_ACCESS(RwReg, 0x400A4344U) /**< \brief (UDPHS) UDPHS DMA Channel Address Register (channel = 3) */ -#define REG_UDPHS_DMACONTROL3 REG_ACCESS(RwReg, 0x400A4348U) /**< \brief (UDPHS) UDPHS DMA Channel Control Register (channel = 3) */ -#define REG_UDPHS_DMASTATUS3 REG_ACCESS(RwReg, 0x400A434CU) /**< \brief (UDPHS) UDPHS DMA Channel Status Register (channel = 3) */ -#define REG_UDPHS_DMANXTDSC4 REG_ACCESS(RwReg, 0x400A4350U) /**< \brief (UDPHS) UDPHS DMA Next Descriptor Address Register (channel = 4) */ -#define REG_UDPHS_DMAADDRESS4 REG_ACCESS(RwReg, 0x400A4354U) /**< \brief (UDPHS) UDPHS DMA Channel Address Register (channel = 4) */ -#define REG_UDPHS_DMACONTROL4 REG_ACCESS(RwReg, 0x400A4358U) /**< \brief (UDPHS) UDPHS DMA Channel Control Register (channel = 4) */ -#define REG_UDPHS_DMASTATUS4 REG_ACCESS(RwReg, 0x400A435CU) /**< \brief (UDPHS) UDPHS DMA Channel Status Register (channel = 4) */ -#define REG_UDPHS_DMANXTDSC5 REG_ACCESS(RwReg, 0x400A4360U) /**< \brief (UDPHS) UDPHS DMA Next Descriptor Address Register (channel = 5) */ -#define REG_UDPHS_DMAADDRESS5 REG_ACCESS(RwReg, 0x400A4364U) /**< \brief (UDPHS) UDPHS DMA Channel Address Register (channel = 5) */ -#define REG_UDPHS_DMACONTROL5 REG_ACCESS(RwReg, 0x400A4368U) /**< \brief (UDPHS) UDPHS DMA Channel Control Register (channel = 5) */ -#define REG_UDPHS_DMASTATUS5 REG_ACCESS(RwReg, 0x400A436CU) /**< \brief (UDPHS) UDPHS DMA Channel Status Register (channel = 5) */ -/* ========== Register definition for ADC12B peripheral ========== */ -#define REG_ADC12B_CR REG_ACCESS(WoReg, 0x400A8000U) /**< \brief (ADC12B) Control Register */ -#define REG_ADC12B_MR REG_ACCESS(RwReg, 0x400A8004U) /**< \brief (ADC12B) Mode Register */ -#define REG_ADC12B_CHER REG_ACCESS(WoReg, 0x400A8010U) /**< \brief (ADC12B) Channel Enable Register */ -#define REG_ADC12B_CHDR REG_ACCESS(WoReg, 0x400A8014U) /**< \brief (ADC12B) Channel Disable Register */ -#define REG_ADC12B_CHSR REG_ACCESS(RoReg, 0x400A8018U) /**< \brief (ADC12B) Channel Status Register */ -#define REG_ADC12B_SR REG_ACCESS(RoReg, 0x400A801CU) /**< \brief (ADC12B) Status Register */ -#define REG_ADC12B_LCDR REG_ACCESS(RoReg, 0x400A8020U) /**< \brief (ADC12B) Last Converted Data Register */ -#define REG_ADC12B_IER REG_ACCESS(WoReg, 0x400A8024U) /**< \brief (ADC12B) Interrupt Enable Register */ -#define REG_ADC12B_IDR REG_ACCESS(WoReg, 0x400A8028U) /**< \brief (ADC12B) Interrupt Disable Register */ -#define REG_ADC12B_IMR REG_ACCESS(RoReg, 0x400A802CU) /**< \brief (ADC12B) Interrupt Mask Register */ -#define REG_ADC12B_CDR REG_ACCESS(RoReg, 0x400A8030U) /**< \brief (ADC12B) Channel Data Register */ -#define REG_ADC12B_ACR REG_ACCESS(RwReg, 0x400A8064U) /**< \brief (ADC12B) Analog Control Register */ -#define REG_ADC12B_EMR REG_ACCESS(RwReg, 0x400A8068U) /**< \brief (ADC12B) Extended Mode Register */ -#define REG_ADC12B_RPR REG_ACCESS(RwReg, 0x400A8100U) /**< \brief (ADC12B) Receive Pointer Register */ -#define REG_ADC12B_RCR REG_ACCESS(RwReg, 0x400A8104U) /**< \brief (ADC12B) Receive Counter Register */ -#define REG_ADC12B_TPR REG_ACCESS(RwReg, 0x400A8108U) /**< \brief (ADC12B) Transmit Pointer Register */ -#define REG_ADC12B_TCR REG_ACCESS(RwReg, 0x400A810CU) /**< \brief (ADC12B) Transmit Counter Register */ -#define REG_ADC12B_RNPR REG_ACCESS(RwReg, 0x400A8110U) /**< \brief (ADC12B) Receive Next Pointer Register */ -#define REG_ADC12B_RNCR REG_ACCESS(RwReg, 0x400A8114U) /**< \brief (ADC12B) Receive Next Counter Register */ -#define REG_ADC12B_TNPR REG_ACCESS(RwReg, 0x400A8118U) /**< \brief (ADC12B) Transmit Next Pointer Register */ -#define REG_ADC12B_TNCR REG_ACCESS(RwReg, 0x400A811CU) /**< \brief (ADC12B) Transmit Next Counter Register */ -#define REG_ADC12B_PTCR REG_ACCESS(WoReg, 0x400A8120U) /**< \brief (ADC12B) Transfer Control Register */ -#define REG_ADC12B_PTSR REG_ACCESS(RoReg, 0x400A8124U) /**< \brief (ADC12B) Transfer Status Register */ -/* ========== Register definition for ADC peripheral ========== */ -#define REG_ADC_CR REG_ACCESS(WoReg, 0x400AC000U) /**< \brief (ADC) Control Register */ -#define REG_ADC_MR REG_ACCESS(RwReg, 0x400AC004U) /**< \brief (ADC) Mode Register */ -#define REG_ADC_CHER REG_ACCESS(WoReg, 0x400AC010U) /**< \brief (ADC) Channel Enable Register */ -#define REG_ADC_CHDR REG_ACCESS(WoReg, 0x400AC014U) /**< \brief (ADC) Channel Disable Register */ -#define REG_ADC_CHSR REG_ACCESS(RoReg, 0x400AC018U) /**< \brief (ADC) Channel Status Register */ -#define REG_ADC_SR REG_ACCESS(RoReg, 0x400AC01CU) /**< \brief (ADC) Status Register */ -#define REG_ADC_LCDR REG_ACCESS(RoReg, 0x400AC020U) /**< \brief (ADC) Last Converted Data Register */ -#define REG_ADC_IER REG_ACCESS(WoReg, 0x400AC024U) /**< \brief (ADC) Interrupt Enable Register */ -#define REG_ADC_IDR REG_ACCESS(WoReg, 0x400AC028U) /**< \brief (ADC) Interrupt Disable Register */ -#define REG_ADC_IMR REG_ACCESS(RoReg, 0x400AC02CU) /**< \brief (ADC) Interrupt Mask Register */ -#define REG_ADC_CDR REG_ACCESS(RoReg, 0x400AC030U) /**< \brief (ADC) Channel Data Register */ -#define REG_ADC_RPR REG_ACCESS(RwReg, 0x400AC100U) /**< \brief (ADC) Receive Pointer Register */ -#define REG_ADC_RCR REG_ACCESS(RwReg, 0x400AC104U) /**< \brief (ADC) Receive Counter Register */ -#define REG_ADC_TPR REG_ACCESS(RwReg, 0x400AC108U) /**< \brief (ADC) Transmit Pointer Register */ -#define REG_ADC_TCR REG_ACCESS(RwReg, 0x400AC10CU) /**< \brief (ADC) Transmit Counter Register */ -#define REG_ADC_RNPR REG_ACCESS(RwReg, 0x400AC110U) /**< \brief (ADC) Receive Next Pointer Register */ -#define REG_ADC_RNCR REG_ACCESS(RwReg, 0x400AC114U) /**< \brief (ADC) Receive Next Counter Register */ -#define REG_ADC_TNPR REG_ACCESS(RwReg, 0x400AC118U) /**< \brief (ADC) Transmit Next Pointer Register */ -#define REG_ADC_TNCR REG_ACCESS(RwReg, 0x400AC11CU) /**< \brief (ADC) Transmit Next Counter Register */ -#define REG_ADC_PTCR REG_ACCESS(WoReg, 0x400AC120U) /**< \brief (ADC) Transfer Control Register */ -#define REG_ADC_PTSR REG_ACCESS(RoReg, 0x400AC124U) /**< \brief (ADC) Transfer Status Register */ -/* ========== Register definition for DMAC peripheral ========== */ -#define REG_DMAC_GCFG REG_ACCESS(RwReg, 0x400B0000U) /**< \brief (DMAC) DMAC Global Configuration Register */ -#define REG_DMAC_EN REG_ACCESS(RwReg, 0x400B0004U) /**< \brief (DMAC) DMAC Enable Register */ -#define REG_DMAC_SREQ REG_ACCESS(RwReg, 0x400B0008U) /**< \brief (DMAC) DMAC Software Single Request Register */ -#define REG_DMAC_CREQ REG_ACCESS(RwReg, 0x400B000CU) /**< \brief (DMAC) DMAC Software Chunk Transfer Request Register */ -#define REG_DMAC_LAST REG_ACCESS(RwReg, 0x400B0010U) /**< \brief (DMAC) DMAC Software Last Transfer Flag Register */ -#define REG_DMAC_EBCIER REG_ACCESS(WoReg, 0x400B0018U) /**< \brief (DMAC) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Enable register. */ -#define REG_DMAC_EBCIDR REG_ACCESS(WoReg, 0x400B001CU) /**< \brief (DMAC) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Disable register. */ -#define REG_DMAC_EBCIMR REG_ACCESS(RoReg, 0x400B0020U) /**< \brief (DMAC) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Mask Register. */ -#define REG_DMAC_EBCISR REG_ACCESS(RoReg, 0x400B0024U) /**< \brief (DMAC) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Status Register. */ -#define REG_DMAC_CHER REG_ACCESS(WoReg, 0x400B0028U) /**< \brief (DMAC) DMAC Channel Handler Enable Register */ -#define REG_DMAC_CHDR REG_ACCESS(WoReg, 0x400B002CU) /**< \brief (DMAC) DMAC Channel Handler Disable Register */ -#define REG_DMAC_CHSR REG_ACCESS(RoReg, 0x400B0030U) /**< \brief (DMAC) DMAC Channel Handler Status Register */ -#define REG_DMAC_SADDR0 REG_ACCESS(RwReg, 0x400B003CU) /**< \brief (DMAC) DMAC Channel Source Address Register (ch_num = 0) */ -#define REG_DMAC_DADDR0 REG_ACCESS(RwReg, 0x400B0040U) /**< \brief (DMAC) DMAC Channel Destination Address Register (ch_num = 0) */ -#define REG_DMAC_DSCR0 REG_ACCESS(RwReg, 0x400B0044U) /**< \brief (DMAC) DMAC Channel Descriptor Address Register (ch_num = 0) */ -#define REG_DMAC_CTRLA0 REG_ACCESS(RwReg, 0x400B0048U) /**< \brief (DMAC) DMAC Channel Control A Register (ch_num = 0) */ -#define REG_DMAC_CTRLB0 REG_ACCESS(RwReg, 0x400B004CU) /**< \brief (DMAC) DMAC Channel Control B Register (ch_num = 0) */ -#define REG_DMAC_CFG0 REG_ACCESS(RwReg, 0x400B0050U) /**< \brief (DMAC) DMAC Channel Configuration Register (ch_num = 0) */ -#define REG_DMAC_SADDR1 REG_ACCESS(RwReg, 0x400B0064U) /**< \brief (DMAC) DMAC Channel Source Address Register (ch_num = 1) */ -#define REG_DMAC_DADDR1 REG_ACCESS(RwReg, 0x400B0068U) /**< \brief (DMAC) DMAC Channel Destination Address Register (ch_num = 1) */ -#define REG_DMAC_DSCR1 REG_ACCESS(RwReg, 0x400B006CU) /**< \brief (DMAC) DMAC Channel Descriptor Address Register (ch_num = 1) */ -#define REG_DMAC_CTRLA1 REG_ACCESS(RwReg, 0x400B0070U) /**< \brief (DMAC) DMAC Channel Control A Register (ch_num = 1) */ -#define REG_DMAC_CTRLB1 REG_ACCESS(RwReg, 0x400B0074U) /**< \brief (DMAC) DMAC Channel Control B Register (ch_num = 1) */ -#define REG_DMAC_CFG1 REG_ACCESS(RwReg, 0x400B0078U) /**< \brief (DMAC) DMAC Channel Configuration Register (ch_num = 1) */ -#define REG_DMAC_SADDR2 REG_ACCESS(RwReg, 0x400B008CU) /**< \brief (DMAC) DMAC Channel Source Address Register (ch_num = 2) */ -#define REG_DMAC_DADDR2 REG_ACCESS(RwReg, 0x400B0090U) /**< \brief (DMAC) DMAC Channel Destination Address Register (ch_num = 2) */ -#define REG_DMAC_DSCR2 REG_ACCESS(RwReg, 0x400B0094U) /**< \brief (DMAC) DMAC Channel Descriptor Address Register (ch_num = 2) */ -#define REG_DMAC_CTRLA2 REG_ACCESS(RwReg, 0x400B0098U) /**< \brief (DMAC) DMAC Channel Control A Register (ch_num = 2) */ -#define REG_DMAC_CTRLB2 REG_ACCESS(RwReg, 0x400B009CU) /**< \brief (DMAC) DMAC Channel Control B Register (ch_num = 2) */ -#define REG_DMAC_CFG2 REG_ACCESS(RwReg, 0x400B00A0U) /**< \brief (DMAC) DMAC Channel Configuration Register (ch_num = 2) */ -#define REG_DMAC_SADDR3 REG_ACCESS(RwReg, 0x400B00B4U) /**< \brief (DMAC) DMAC Channel Source Address Register (ch_num = 3) */ -#define REG_DMAC_DADDR3 REG_ACCESS(RwReg, 0x400B00B8U) /**< \brief (DMAC) DMAC Channel Destination Address Register (ch_num = 3) */ -#define REG_DMAC_DSCR3 REG_ACCESS(RwReg, 0x400B00BCU) /**< \brief (DMAC) DMAC Channel Descriptor Address Register (ch_num = 3) */ -#define REG_DMAC_CTRLA3 REG_ACCESS(RwReg, 0x400B00C0U) /**< \brief (DMAC) DMAC Channel Control A Register (ch_num = 3) */ -#define REG_DMAC_CTRLB3 REG_ACCESS(RwReg, 0x400B00C4U) /**< \brief (DMAC) DMAC Channel Control B Register (ch_num = 3) */ -#define REG_DMAC_CFG3 REG_ACCESS(RwReg, 0x400B00C8U) /**< \brief (DMAC) DMAC Channel Configuration Register (ch_num = 3) */ -/* ========== Register definition for SMC peripheral ========== */ -#define REG_SMC_CFG REG_ACCESS(RwReg, 0x400E0000U) /**< \brief (SMC) SMC NFC Configuration Register */ -#define REG_SMC_CTRL REG_ACCESS(WoReg, 0x400E0004U) /**< \brief (SMC) SMC NFC Control Register */ -#define REG_SMC_SR REG_ACCESS(RoReg, 0x400E0008U) /**< \brief (SMC) SMC NFC Status Register */ -#define REG_SMC_IER REG_ACCESS(WoReg, 0x400E000CU) /**< \brief (SMC) SMC NFC Interrupt Enable Register */ -#define REG_SMC_IDR REG_ACCESS(WoReg, 0x400E0010U) /**< \brief (SMC) SMC NFC Interrupt Disable Register */ -#define REG_SMC_IMR REG_ACCESS(RoReg, 0x400E0014U) /**< \brief (SMC) SMC NFC Interrupt Mask Register */ -#define REG_SMC_ADDR REG_ACCESS(RwReg, 0x400E0018U) /**< \brief (SMC) SMC NFC Address Cycle Zero Register */ -#define REG_SMC_BANK REG_ACCESS(RwReg, 0x400E001CU) /**< \brief (SMC) SMC Bank Address Register */ -#define REG_SMC_ECC_CTRL REG_ACCESS(WoReg, 0x400E0020U) /**< \brief (SMC) SMC ECC Control Register */ -#define REG_SMC_ECC_MD REG_ACCESS(RwReg, 0x400E0024U) /**< \brief (SMC) SMC ECC Mode Register */ -#define REG_SMC_ECC_SR1 REG_ACCESS(RoReg, 0x400E0028U) /**< \brief (SMC) SMC ECC Status 1 Register */ -#define REG_SMC_ECC_PR0 REG_ACCESS(RoReg, 0x400E002CU) /**< \brief (SMC) SMC ECC Parity 0 Register */ -#define REG_SMC_ECC_PR1 REG_ACCESS(RoReg, 0x400E0030U) /**< \brief (SMC) SMC ECC parity 1 Register */ -#define REG_SMC_ECC_SR2 REG_ACCESS(RoReg, 0x400E0034U) /**< \brief (SMC) SMC ECC status 2 Register */ -#define REG_SMC_ECC_PR2 REG_ACCESS(RoReg, 0x400E0038U) /**< \brief (SMC) SMC ECC parity 2 Register */ -#define REG_SMC_ECC_PR3 REG_ACCESS(RoReg, 0x400E003CU) /**< \brief (SMC) SMC ECC parity 3 Register */ -#define REG_SMC_ECC_PR4 REG_ACCESS(RoReg, 0x400E0040U) /**< \brief (SMC) SMC ECC parity 4 Register */ -#define REG_SMC_ECC_PR5 REG_ACCESS(RoReg, 0x400E0044U) /**< \brief (SMC) SMC ECC parity 5 Register */ -#define REG_SMC_ECC_PR6 REG_ACCESS(RoReg, 0x400E0048U) /**< \brief (SMC) SMC ECC parity 6 Register */ -#define REG_SMC_ECC_PR7 REG_ACCESS(RoReg, 0x400E004CU) /**< \brief (SMC) SMC ECC parity 7 Register */ -#define REG_SMC_ECC_PR8 REG_ACCESS(RoReg, 0x400E0050U) /**< \brief (SMC) SMC ECC parity 8 Register */ -#define REG_SMC_ECC_PR9 REG_ACCESS(RoReg, 0x400E0054U) /**< \brief (SMC) SMC ECC parity 9 Register */ -#define REG_SMC_ECC_PR10 REG_ACCESS(RoReg, 0x400E0058U) /**< \brief (SMC) SMC ECC parity 10 Register */ -#define REG_SMC_ECC_PR11 REG_ACCESS(RoReg, 0x400E005CU) /**< \brief (SMC) SMC ECC parity 11 Register */ -#define REG_SMC_ECC_PR12 REG_ACCESS(RoReg, 0x400E0060U) /**< \brief (SMC) SMC ECC parity 12 Register */ -#define REG_SMC_ECC_PR13 REG_ACCESS(RoReg, 0x400E0064U) /**< \brief (SMC) SMC ECC parity 13 Register */ -#define REG_SMC_ECC_PR14 REG_ACCESS(RoReg, 0x400E0068U) /**< \brief (SMC) SMC ECC parity 14 Register */ -#define REG_SMC_ECC_PR15 REG_ACCESS(RoReg, 0x400E006CU) /**< \brief (SMC) SMC ECC parity 15 Register */ -#define REG_SMC_SETUP0 REG_ACCESS(RwReg, 0x400E0070U) /**< \brief (SMC) SMC SETUP Register (CS_number = 0) */ -#define REG_SMC_PULSE0 REG_ACCESS(RwReg, 0x400E0074U) /**< \brief (SMC) SMC PULSE Register (CS_number = 0) */ -#define REG_SMC_CYCLE0 REG_ACCESS(RwReg, 0x400E0078U) /**< \brief (SMC) SMC CYCLE Register (CS_number = 0) */ -#define REG_SMC_TIMINGS0 REG_ACCESS(RwReg, 0x400E007CU) /**< \brief (SMC) SMC TIMINGS Register (CS_number = 0) */ -#define REG_SMC_MODE0 REG_ACCESS(RwReg, 0x400E0080U) /**< \brief (SMC) SMC MODE Register (CS_number = 0) */ -#define REG_SMC_SETUP1 REG_ACCESS(RwReg, 0x400E0084U) /**< \brief (SMC) SMC SETUP Register (CS_number = 1) */ -#define REG_SMC_PULSE1 REG_ACCESS(RwReg, 0x400E0088U) /**< \brief (SMC) SMC PULSE Register (CS_number = 1) */ -#define REG_SMC_CYCLE1 REG_ACCESS(RwReg, 0x400E008CU) /**< \brief (SMC) SMC CYCLE Register (CS_number = 1) */ -#define REG_SMC_TIMINGS1 REG_ACCESS(RwReg, 0x400E0090U) /**< \brief (SMC) SMC TIMINGS Register (CS_number = 1) */ -#define REG_SMC_MODE1 REG_ACCESS(RwReg, 0x400E0094U) /**< \brief (SMC) SMC MODE Register (CS_number = 1) */ -#define REG_SMC_SETUP2 REG_ACCESS(RwReg, 0x400E0098U) /**< \brief (SMC) SMC SETUP Register (CS_number = 2) */ -#define REG_SMC_PULSE2 REG_ACCESS(RwReg, 0x400E009CU) /**< \brief (SMC) SMC PULSE Register (CS_number = 2) */ -#define REG_SMC_CYCLE2 REG_ACCESS(RwReg, 0x400E00A0U) /**< \brief (SMC) SMC CYCLE Register (CS_number = 2) */ -#define REG_SMC_TIMINGS2 REG_ACCESS(RwReg, 0x400E00A4U) /**< \brief (SMC) SMC TIMINGS Register (CS_number = 2) */ -#define REG_SMC_MODE2 REG_ACCESS(RwReg, 0x400E00A8U) /**< \brief (SMC) SMC MODE Register (CS_number = 2) */ -#define REG_SMC_SETUP3 REG_ACCESS(RwReg, 0x400E00ACU) /**< \brief (SMC) SMC SETUP Register (CS_number = 3) */ -#define REG_SMC_PULSE3 REG_ACCESS(RwReg, 0x400E00B0U) /**< \brief (SMC) SMC PULSE Register (CS_number = 3) */ -#define REG_SMC_CYCLE3 REG_ACCESS(RwReg, 0x400E00B4U) /**< \brief (SMC) SMC CYCLE Register (CS_number = 3) */ -#define REG_SMC_TIMINGS3 REG_ACCESS(RwReg, 0x400E00B8U) /**< \brief (SMC) SMC TIMINGS Register (CS_number = 3) */ -#define REG_SMC_MODE3 REG_ACCESS(RwReg, 0x400E00BCU) /**< \brief (SMC) SMC MODE Register (CS_number = 3) */ -#define REG_SMC_OCMS REG_ACCESS(RwReg, 0x400E0110U) /**< \brief (SMC) SMC OCMS MODE Register */ -#define REG_SMC_KEY1 REG_ACCESS(WoReg, 0x400E0114U) /**< \brief (SMC) SMC KEY1 Register */ -#define REG_SMC_KEY2 REG_ACCESS(WoReg, 0x400E0118U) /**< \brief (SMC) SMC KEY2 Register */ -#define REG_SMC_WPCR REG_ACCESS(WoReg, 0x400E01E4U) /**< \brief (SMC) Write Protection Control Register */ -#define REG_SMC_WPSR REG_ACCESS(RoReg, 0x400E01E8U) /**< \brief (SMC) Write Protection Status Register */ -/* ========== Register definition for MATRIX peripheral ========== */ -#define REG_MATRIX_MCFG REG_ACCESS(RwReg, 0x400E0200U) /**< \brief (MATRIX) Master Configuration Register */ -#define REG_MATRIX_SCFG REG_ACCESS(RwReg, 0x400E0240U) /**< \brief (MATRIX) Slave Configuration Register */ -#define REG_MATRIX_PRAS0 REG_ACCESS(RwReg, 0x400E0280U) /**< \brief (MATRIX) Priority Register A for Slave 0 */ -#define REG_MATRIX_PRAS1 REG_ACCESS(RwReg, 0x400E0288U) /**< \brief (MATRIX) Priority Register A for Slave 1 */ -#define REG_MATRIX_PRAS2 REG_ACCESS(RwReg, 0x400E0290U) /**< \brief (MATRIX) Priority Register A for Slave 2 */ -#define REG_MATRIX_PRAS3 REG_ACCESS(RwReg, 0x400E0298U) /**< \brief (MATRIX) Priority Register A for Slave 3 */ -#define REG_MATRIX_PRAS4 REG_ACCESS(RwReg, 0x400E02A0U) /**< \brief (MATRIX) Priority Register A for Slave 4 */ -#define REG_MATRIX_PRAS5 REG_ACCESS(RwReg, 0x400E02A8U) /**< \brief (MATRIX) Priority Register A for Slave 5 */ -#define REG_MATRIX_PRAS6 REG_ACCESS(RwReg, 0x400E02B0U) /**< \brief (MATRIX) Priority Register A for Slave 6 */ -#define REG_MATRIX_PRAS7 REG_ACCESS(RwReg, 0x400E02B8U) /**< \brief (MATRIX) Priority Register A for Slave 7 */ -#define REG_MATRIX_PRAS8 REG_ACCESS(RwReg, 0x400E02C0U) /**< \brief (MATRIX) Priority Register A for Slave 8 */ -#define REG_MATRIX_PRAS9 REG_ACCESS(RwReg, 0x400E02C8U) /**< \brief (MATRIX) Priority Register A for Slave 9 */ -#define REG_MATRIX_MRCR REG_ACCESS(RwReg, 0x400E0300U) /**< \brief (MATRIX) Master Remap Control Register */ -/* ========== Register definition for PMC peripheral ========== */ -#define REG_PMC_SCER REG_ACCESS(WoReg, 0x400E0400U) /**< \brief (PMC) System Clock Enable Register */ -#define REG_PMC_SCDR REG_ACCESS(WoReg, 0x400E0404U) /**< \brief (PMC) System Clock Disable Register */ -#define REG_PMC_SCSR REG_ACCESS(RoReg, 0x400E0408U) /**< \brief (PMC) System Clock Status Register */ -#define REG_PMC_PCER REG_ACCESS(WoReg, 0x400E0410U) /**< \brief (PMC) Peripheral Clock Enable Register */ -#define REG_PMC_PCDR REG_ACCESS(WoReg, 0x400E0414U) /**< \brief (PMC) Peripheral Clock Disable Register */ -//#define REG_PMC_PCSR REG_ACCESS(RoReg, 0x400E0418U) /**< \brief (PMC) Peripheral Clock Status Register */ -#define REG_PMC_UCKR REG_ACCESS(RwReg, 0x400E041CU) /**< \brief (PMC) UTMI Clock Register */ -#define REG_PMC_MOR REG_ACCESS(RwReg, 0x400E0420U) /**< \brief (PMC) Main Oscillator Register */ -#define REG_PMC_MCFR REG_ACCESS(RoReg, 0x400E0424U) /**< \brief (PMC) Main Clock Frequency Register */ -#define REG_PMC_PLLAR REG_ACCESS(RwReg, 0x400E0428U) /**< \brief (PMC) PLLA Register */ -#define REG_PMC_MCKR REG_ACCESS(RwReg, 0x400E0430U) /**< \brief (PMC) Master Clock Register */ -#define REG_PMC_PCK REG_ACCESS(RwReg, 0x400E0440U) /**< \brief (PMC) Programmable Clock 0 Register */ -#define REG_PMC_IER REG_ACCESS(WoReg, 0x400E0460U) /**< \brief (PMC) Interrupt Enable Register */ -#define REG_PMC_IDR REG_ACCESS(WoReg, 0x400E0464U) /**< \brief (PMC) Interrupt Disable Register */ -#define REG_PMC_SR REG_ACCESS(RoReg, 0x400E0468U) /**< \brief (PMC) Status Register */ -#define REG_PMC_IMR REG_ACCESS(RoReg, 0x400E046CU) /**< \brief (PMC) Interrupt Mask Register */ -#define REG_PMC_FSMR REG_ACCESS(RwReg, 0x400E0470U) /**< \brief (PMC) Fast Startup Mode Register */ -#define REG_PMC_FSPR REG_ACCESS(RwReg, 0x400E0474U) /**< \brief (PMC) Fast Startup Polarity Register */ -#define REG_PMC_FOCR REG_ACCESS(WoReg, 0x400E0478U) /**< \brief (PMC) Fault Output Clear Register */ -/* ========== Register definition for UART peripheral ========== */ -#define REG_UART_CR REG_ACCESS(WoReg, 0x400E0600U) /**< \brief (UART) Control Register */ -#define REG_UART_MR REG_ACCESS(RwReg, 0x400E0604U) /**< \brief (UART) Mode Register */ -#define REG_UART_IER REG_ACCESS(WoReg, 0x400E0608U) /**< \brief (UART) Interrupt Enable Register */ -#define REG_UART_IDR REG_ACCESS(WoReg, 0x400E060CU) /**< \brief (UART) Interrupt Disable Register */ -#define REG_UART_IMR REG_ACCESS(RoReg, 0x400E0610U) /**< \brief (UART) Interrupt Mask Register */ -#define REG_UART_SR REG_ACCESS(RoReg, 0x400E0614U) /**< \brief (UART) Status Register */ -#define REG_UART_RHR REG_ACCESS(RoReg, 0x400E0618U) /**< \brief (UART) Receive Holding Register */ -#define REG_UART_THR REG_ACCESS(WoReg, 0x400E061CU) /**< \brief (UART) Transmit Holding Register */ -#define REG_UART_BRGR REG_ACCESS(RwReg, 0x400E0620U) /**< \brief (UART) Baud Rate Generator Register */ -#define REG_UART_RPR REG_ACCESS(RwReg, 0x400E0700U) /**< \brief (UART) Receive Pointer Register */ -#define REG_UART_RCR REG_ACCESS(RwReg, 0x400E0704U) /**< \brief (UART) Receive Counter Register */ -#define REG_UART_TPR REG_ACCESS(RwReg, 0x400E0708U) /**< \brief (UART) Transmit Pointer Register */ -#define REG_UART_TCR REG_ACCESS(RwReg, 0x400E070CU) /**< \brief (UART) Transmit Counter Register */ -#define REG_UART_RNPR REG_ACCESS(RwReg, 0x400E0710U) /**< \brief (UART) Receive Next Pointer Register */ -#define REG_UART_RNCR REG_ACCESS(RwReg, 0x400E0714U) /**< \brief (UART) Receive Next Counter Register */ -#define REG_UART_TNPR REG_ACCESS(RwReg, 0x400E0718U) /**< \brief (UART) Transmit Next Pointer Register */ -#define REG_UART_TNCR REG_ACCESS(RwReg, 0x400E071CU) /**< \brief (UART) Transmit Next Counter Register */ -#define REG_UART_PTCR REG_ACCESS(WoReg, 0x400E0720U) /**< \brief (UART) Transfer Control Register */ -#define REG_UART_PTSR REG_ACCESS(RoReg, 0x400E0724U) /**< \brief (UART) Transfer Status Register */ -/* ========== Register definition for CHIPID peripheral ========== */ -#define REG_CHIPID_CIDR REG_ACCESS(RoReg, 0x400E0740U) /**< \brief (CHIPID) Chip ID Register */ -#define REG_CHIPID_EXID REG_ACCESS(RoReg, 0x400E0744U) /**< \brief (CHIPID) Chip ID Extension Register */ -/* ========== Register definition for EFC0 peripheral ========== */ -#define REG_EFC0_FMR REG_ACCESS(RwReg, 0x400E0800U) /**< \brief (EFC0) EEFC Flash Mode Register */ -#define REG_EFC0_FCR REG_ACCESS(WoReg, 0x400E0804U) /**< \brief (EFC0) EEFC Flash Command Register */ -#define REG_EFC0_FSR REG_ACCESS(RoReg, 0x400E0808U) /**< \brief (EFC0) EEFC Flash Status Register */ -#define REG_EFC0_FRR REG_ACCESS(RoReg, 0x400E080CU) /**< \brief (EFC0) EEFC Flash Result Register */ -/* ========== Register definition for EFC1 peripheral ========== */ -#define REG_EFC1_FMR REG_ACCESS(RwReg, 0x400E0A00U) /**< \brief (EFC1) EEFC Flash Mode Register */ -#define REG_EFC1_FCR REG_ACCESS(WoReg, 0x400E0A04U) /**< \brief (EFC1) EEFC Flash Command Register */ -#define REG_EFC1_FSR REG_ACCESS(RoReg, 0x400E0A08U) /**< \brief (EFC1) EEFC Flash Status Register */ -#define REG_EFC1_FRR REG_ACCESS(RoReg, 0x400E0A0CU) /**< \brief (EFC1) EEFC Flash Result Register */ -/* ========== Register definition for PIOA peripheral ========== */ -#define REG_PIOA_PER REG_ACCESS(WoReg, 0x400E0C00U) /**< \brief (PIOA) PIO Enable Register */ -#define REG_PIOA_PDR REG_ACCESS(WoReg, 0x400E0C04U) /**< \brief (PIOA) PIO Disable Register */ -#define REG_PIOA_PSR REG_ACCESS(RoReg, 0x400E0C08U) /**< \brief (PIOA) PIO Status Register */ -#define REG_PIOA_OER REG_ACCESS(WoReg, 0x400E0C10U) /**< \brief (PIOA) Output Enable Register */ -#define REG_PIOA_ODR REG_ACCESS(WoReg, 0x400E0C14U) /**< \brief (PIOA) Output Disable Register */ -#define REG_PIOA_OSR REG_ACCESS(RoReg, 0x400E0C18U) /**< \brief (PIOA) Output Status Register */ -#define REG_PIOA_IFER REG_ACCESS(WoReg, 0x400E0C20U) /**< \brief (PIOA) Glitch Input Filter Enable Register */ -#define REG_PIOA_IFDR REG_ACCESS(WoReg, 0x400E0C24U) /**< \brief (PIOA) Glitch Input Filter Disable Register */ -#define REG_PIOA_IFSR REG_ACCESS(RoReg, 0x400E0C28U) /**< \brief (PIOA) Glitch Input Filter Status Register */ -#define REG_PIOA_SODR REG_ACCESS(WoReg, 0x400E0C30U) /**< \brief (PIOA) Set Output Data Register */ -#define REG_PIOA_CODR REG_ACCESS(WoReg, 0x400E0C34U) /**< \brief (PIOA) Clear Output Data Register */ -#define REG_PIOA_ODSR REG_ACCESS(RwReg, 0x400E0C38U) /**< \brief (PIOA) Output Data Status Register */ -#define REG_PIOA_PDSR REG_ACCESS(RoReg, 0x400E0C3CU) /**< \brief (PIOA) Pin Data Status Register */ -#define REG_PIOA_IER REG_ACCESS(WoReg, 0x400E0C40U) /**< \brief (PIOA) Interrupt Enable Register */ -#define REG_PIOA_IDR REG_ACCESS(WoReg, 0x400E0C44U) /**< \brief (PIOA) Interrupt Disable Register */ -#define REG_PIOA_IMR REG_ACCESS(RoReg, 0x400E0C48U) /**< \brief (PIOA) Interrupt Mask Register */ -#define REG_PIOA_ISR REG_ACCESS(RoReg, 0x400E0C4CU) /**< \brief (PIOA) Interrupt Status Register */ -#define REG_PIOA_MDER REG_ACCESS(WoReg, 0x400E0C50U) /**< \brief (PIOA) Multi-driver Enable Register */ -#define REG_PIOA_MDDR REG_ACCESS(WoReg, 0x400E0C54U) /**< \brief (PIOA) Multi-driver Disable Register */ -#define REG_PIOA_MDSR REG_ACCESS(RoReg, 0x400E0C58U) /**< \brief (PIOA) Multi-driver Status Register */ -#define REG_PIOA_PUDR REG_ACCESS(WoReg, 0x400E0C60U) /**< \brief (PIOA) Pull-up Disable Register */ -#define REG_PIOA_PUER REG_ACCESS(WoReg, 0x400E0C64U) /**< \brief (PIOA) Pull-up Enable Register */ -#define REG_PIOA_PUSR REG_ACCESS(RoReg, 0x400E0C68U) /**< \brief (PIOA) Pad Pull-up Status Register */ -#define REG_PIOA_ABSR REG_ACCESS(RwReg, 0x400E0C70U) /**< \brief (PIOA) Peripheral AB Select Register */ -#define REG_PIOA_SCIFSR REG_ACCESS(WoReg, 0x400E0C80U) /**< \brief (PIOA) System Clock Glitch Input Filter Select Register */ -#define REG_PIOA_DIFSR REG_ACCESS(WoReg, 0x400E0C84U) /**< \brief (PIOA) Debouncing Input Filter Select Register */ -#define REG_PIOA_IFDGSR REG_ACCESS(RoReg, 0x400E0C88U) /**< \brief (PIOA) Glitch or Debouncing Input Filter Clock Selection Status Register */ -#define REG_PIOA_SCDR REG_ACCESS(RwReg, 0x400E0C8CU) /**< \brief (PIOA) Slow Clock Divider Debouncing Register */ -#define REG_PIOA_OWER REG_ACCESS(WoReg, 0x400E0CA0U) /**< \brief (PIOA) Output Write Enable */ -#define REG_PIOA_OWDR REG_ACCESS(WoReg, 0x400E0CA4U) /**< \brief (PIOA) Output Write Disable */ -#define REG_PIOA_OWSR REG_ACCESS(RoReg, 0x400E0CA8U) /**< \brief (PIOA) Output Write Status Register */ -#define REG_PIOA_AIMER REG_ACCESS(WoReg, 0x400E0CB0U) /**< \brief (PIOA) Additional Interrupt Modes Enable Register */ -#define REG_PIOA_AIMDR REG_ACCESS(WoReg, 0x400E0CB4U) /**< \brief (PIOA) Additional Interrupt Modes Disables Register */ -#define REG_PIOA_AIMMR REG_ACCESS(RoReg, 0x400E0CB8U) /**< \brief (PIOA) Additional Interrupt Modes Mask Register */ -#define REG_PIOA_ESR REG_ACCESS(WoReg, 0x400E0CC0U) /**< \brief (PIOA) Edge Select Register */ -#define REG_PIOA_LSR REG_ACCESS(WoReg, 0x400E0CC4U) /**< \brief (PIOA) Level Select Register */ -#define REG_PIOA_ELSR REG_ACCESS(RoReg, 0x400E0CC8U) /**< \brief (PIOA) Edge/Level Status Register */ -#define REG_PIOA_FELLSR REG_ACCESS(WoReg, 0x400E0CD0U) /**< \brief (PIOA) Falling Edge/Low Level Select Register */ -#define REG_PIOA_REHLSR REG_ACCESS(WoReg, 0x400E0CD4U) /**< \brief (PIOA) Rising Edge/ High Level Select Register */ -#define REG_PIOA_FRLHSR REG_ACCESS(RoReg, 0x400E0CD8U) /**< \brief (PIOA) Fall/Rise - Low/High Status Register */ -#define REG_PIOA_LOCKSR REG_ACCESS(RoReg, 0x400E0CE0U) /**< \brief (PIOA) Lock Status */ -#define REG_PIOA_WPMR REG_ACCESS(RwReg, 0x400E0CE4U) /**< \brief (PIOA) Write Protect Mode Register */ -#define REG_PIOA_WPSR REG_ACCESS(RoReg, 0x400E0CE8U) /**< \brief (PIOA) Write Protect Status Register */ -/* ========== Register definition for PIOB peripheral ========== */ -#define REG_PIOB_PER REG_ACCESS(WoReg, 0x400E0E00U) /**< \brief (PIOB) PIO Enable Register */ -#define REG_PIOB_PDR REG_ACCESS(WoReg, 0x400E0E04U) /**< \brief (PIOB) PIO Disable Register */ -#define REG_PIOB_PSR REG_ACCESS(RoReg, 0x400E0E08U) /**< \brief (PIOB) PIO Status Register */ -#define REG_PIOB_OER REG_ACCESS(WoReg, 0x400E0E10U) /**< \brief (PIOB) Output Enable Register */ -#define REG_PIOB_ODR REG_ACCESS(WoReg, 0x400E0E14U) /**< \brief (PIOB) Output Disable Register */ -#define REG_PIOB_OSR REG_ACCESS(RoReg, 0x400E0E18U) /**< \brief (PIOB) Output Status Register */ -#define REG_PIOB_IFER REG_ACCESS(WoReg, 0x400E0E20U) /**< \brief (PIOB) Glitch Input Filter Enable Register */ -#define REG_PIOB_IFDR REG_ACCESS(WoReg, 0x400E0E24U) /**< \brief (PIOB) Glitch Input Filter Disable Register */ -#define REG_PIOB_IFSR REG_ACCESS(RoReg, 0x400E0E28U) /**< \brief (PIOB) Glitch Input Filter Status Register */ -#define REG_PIOB_SODR REG_ACCESS(WoReg, 0x400E0E30U) /**< \brief (PIOB) Set Output Data Register */ -#define REG_PIOB_CODR REG_ACCESS(WoReg, 0x400E0E34U) /**< \brief (PIOB) Clear Output Data Register */ -#define REG_PIOB_ODSR REG_ACCESS(RwReg, 0x400E0E38U) /**< \brief (PIOB) Output Data Status Register */ -#define REG_PIOB_PDSR REG_ACCESS(RoReg, 0x400E0E3CU) /**< \brief (PIOB) Pin Data Status Register */ -#define REG_PIOB_IER REG_ACCESS(WoReg, 0x400E0E40U) /**< \brief (PIOB) Interrupt Enable Register */ -#define REG_PIOB_IDR REG_ACCESS(WoReg, 0x400E0E44U) /**< \brief (PIOB) Interrupt Disable Register */ -#define REG_PIOB_IMR REG_ACCESS(RoReg, 0x400E0E48U) /**< \brief (PIOB) Interrupt Mask Register */ -#define REG_PIOB_ISR REG_ACCESS(RoReg, 0x400E0E4CU) /**< \brief (PIOB) Interrupt Status Register */ -#define REG_PIOB_MDER REG_ACCESS(WoReg, 0x400E0E50U) /**< \brief (PIOB) Multi-driver Enable Register */ -#define REG_PIOB_MDDR REG_ACCESS(WoReg, 0x400E0E54U) /**< \brief (PIOB) Multi-driver Disable Register */ -#define REG_PIOB_MDSR REG_ACCESS(RoReg, 0x400E0E58U) /**< \brief (PIOB) Multi-driver Status Register */ -#define REG_PIOB_PUDR REG_ACCESS(WoReg, 0x400E0E60U) /**< \brief (PIOB) Pull-up Disable Register */ -#define REG_PIOB_PUER REG_ACCESS(WoReg, 0x400E0E64U) /**< \brief (PIOB) Pull-up Enable Register */ -#define REG_PIOB_PUSR REG_ACCESS(RoReg, 0x400E0E68U) /**< \brief (PIOB) Pad Pull-up Status Register */ -#define REG_PIOB_ABSR REG_ACCESS(RwReg, 0x400E0E70U) /**< \brief (PIOB) Peripheral AB Select Register */ -#define REG_PIOB_SCIFSR REG_ACCESS(WoReg, 0x400E0E80U) /**< \brief (PIOB) System Clock Glitch Input Filter Select Register */ -#define REG_PIOB_DIFSR REG_ACCESS(WoReg, 0x400E0E84U) /**< \brief (PIOB) Debouncing Input Filter Select Register */ -#define REG_PIOB_IFDGSR REG_ACCESS(RoReg, 0x400E0E88U) /**< \brief (PIOB) Glitch or Debouncing Input Filter Clock Selection Status Register */ -#define REG_PIOB_SCDR REG_ACCESS(RwReg, 0x400E0E8CU) /**< \brief (PIOB) Slow Clock Divider Debouncing Register */ -#define REG_PIOB_OWER REG_ACCESS(WoReg, 0x400E0EA0U) /**< \brief (PIOB) Output Write Enable */ -#define REG_PIOB_OWDR REG_ACCESS(WoReg, 0x400E0EA4U) /**< \brief (PIOB) Output Write Disable */ -#define REG_PIOB_OWSR REG_ACCESS(RoReg, 0x400E0EA8U) /**< \brief (PIOB) Output Write Status Register */ -#define REG_PIOB_AIMER REG_ACCESS(WoReg, 0x400E0EB0U) /**< \brief (PIOB) Additional Interrupt Modes Enable Register */ -#define REG_PIOB_AIMDR REG_ACCESS(WoReg, 0x400E0EB4U) /**< \brief (PIOB) Additional Interrupt Modes Disables Register */ -#define REG_PIOB_AIMMR REG_ACCESS(RoReg, 0x400E0EB8U) /**< \brief (PIOB) Additional Interrupt Modes Mask Register */ -#define REG_PIOB_ESR REG_ACCESS(WoReg, 0x400E0EC0U) /**< \brief (PIOB) Edge Select Register */ -#define REG_PIOB_LSR REG_ACCESS(WoReg, 0x400E0EC4U) /**< \brief (PIOB) Level Select Register */ -#define REG_PIOB_ELSR REG_ACCESS(RoReg, 0x400E0EC8U) /**< \brief (PIOB) Edge/Level Status Register */ -#define REG_PIOB_FELLSR REG_ACCESS(WoReg, 0x400E0ED0U) /**< \brief (PIOB) Falling Edge/Low Level Select Register */ -#define REG_PIOB_REHLSR REG_ACCESS(WoReg, 0x400E0ED4U) /**< \brief (PIOB) Rising Edge/ High Level Select Register */ -#define REG_PIOB_FRLHSR REG_ACCESS(RoReg, 0x400E0ED8U) /**< \brief (PIOB) Fall/Rise - Low/High Status Register */ -#define REG_PIOB_LOCKSR REG_ACCESS(RoReg, 0x400E0EE0U) /**< \brief (PIOB) Lock Status */ -#define REG_PIOB_WPMR REG_ACCESS(RwReg, 0x400E0EE4U) /**< \brief (PIOB) Write Protect Mode Register */ -#define REG_PIOB_WPSR REG_ACCESS(RoReg, 0x400E0EE8U) /**< \brief (PIOB) Write Protect Status Register */ -/* ========== Register definition for PIOC peripheral ========== */ -#define REG_PIOC_PER REG_ACCESS(WoReg, 0x400E1000U) /**< \brief (PIOC) PIO Enable Register */ -#define REG_PIOC_PDR REG_ACCESS(WoReg, 0x400E1004U) /**< \brief (PIOC) PIO Disable Register */ -#define REG_PIOC_PSR REG_ACCESS(RoReg, 0x400E1008U) /**< \brief (PIOC) PIO Status Register */ -#define REG_PIOC_OER REG_ACCESS(WoReg, 0x400E1010U) /**< \brief (PIOC) Output Enable Register */ -#define REG_PIOC_ODR REG_ACCESS(WoReg, 0x400E1014U) /**< \brief (PIOC) Output Disable Register */ -#define REG_PIOC_OSR REG_ACCESS(RoReg, 0x400E1018U) /**< \brief (PIOC) Output Status Register */ -#define REG_PIOC_IFER REG_ACCESS(WoReg, 0x400E1020U) /**< \brief (PIOC) Glitch Input Filter Enable Register */ -#define REG_PIOC_IFDR REG_ACCESS(WoReg, 0x400E1024U) /**< \brief (PIOC) Glitch Input Filter Disable Register */ -#define REG_PIOC_IFSR REG_ACCESS(RoReg, 0x400E1028U) /**< \brief (PIOC) Glitch Input Filter Status Register */ -#define REG_PIOC_SODR REG_ACCESS(WoReg, 0x400E1030U) /**< \brief (PIOC) Set Output Data Register */ -#define REG_PIOC_CODR REG_ACCESS(WoReg, 0x400E1034U) /**< \brief (PIOC) Clear Output Data Register */ -#define REG_PIOC_ODSR REG_ACCESS(RwReg, 0x400E1038U) /**< \brief (PIOC) Output Data Status Register */ -#define REG_PIOC_PDSR REG_ACCESS(RoReg, 0x400E103CU) /**< \brief (PIOC) Pin Data Status Register */ -#define REG_PIOC_IER REG_ACCESS(WoReg, 0x400E1040U) /**< \brief (PIOC) Interrupt Enable Register */ -#define REG_PIOC_IDR REG_ACCESS(WoReg, 0x400E1044U) /**< \brief (PIOC) Interrupt Disable Register */ -#define REG_PIOC_IMR REG_ACCESS(RoReg, 0x400E1048U) /**< \brief (PIOC) Interrupt Mask Register */ -#define REG_PIOC_ISR REG_ACCESS(RoReg, 0x400E104CU) /**< \brief (PIOC) Interrupt Status Register */ -#define REG_PIOC_MDER REG_ACCESS(WoReg, 0x400E1050U) /**< \brief (PIOC) Multi-driver Enable Register */ -#define REG_PIOC_MDDR REG_ACCESS(WoReg, 0x400E1054U) /**< \brief (PIOC) Multi-driver Disable Register */ -#define REG_PIOC_MDSR REG_ACCESS(RoReg, 0x400E1058U) /**< \brief (PIOC) Multi-driver Status Register */ -#define REG_PIOC_PUDR REG_ACCESS(WoReg, 0x400E1060U) /**< \brief (PIOC) Pull-up Disable Register */ -#define REG_PIOC_PUER REG_ACCESS(WoReg, 0x400E1064U) /**< \brief (PIOC) Pull-up Enable Register */ -#define REG_PIOC_PUSR REG_ACCESS(RoReg, 0x400E1068U) /**< \brief (PIOC) Pad Pull-up Status Register */ -#define REG_PIOC_ABSR REG_ACCESS(RwReg, 0x400E1070U) /**< \brief (PIOC) Peripheral AB Select Register */ -#define REG_PIOC_SCIFSR REG_ACCESS(WoReg, 0x400E1080U) /**< \brief (PIOC) System Clock Glitch Input Filter Select Register */ -#define REG_PIOC_DIFSR REG_ACCESS(WoReg, 0x400E1084U) /**< \brief (PIOC) Debouncing Input Filter Select Register */ -#define REG_PIOC_IFDGSR REG_ACCESS(RoReg, 0x400E1088U) /**< \brief (PIOC) Glitch or Debouncing Input Filter Clock Selection Status Register */ -#define REG_PIOC_SCDR REG_ACCESS(RwReg, 0x400E108CU) /**< \brief (PIOC) Slow Clock Divider Debouncing Register */ -#define REG_PIOC_OWER REG_ACCESS(WoReg, 0x400E10A0U) /**< \brief (PIOC) Output Write Enable */ -#define REG_PIOC_OWDR REG_ACCESS(WoReg, 0x400E10A4U) /**< \brief (PIOC) Output Write Disable */ -#define REG_PIOC_OWSR REG_ACCESS(RoReg, 0x400E10A8U) /**< \brief (PIOC) Output Write Status Register */ -#define REG_PIOC_AIMER REG_ACCESS(WoReg, 0x400E10B0U) /**< \brief (PIOC) Additional Interrupt Modes Enable Register */ -#define REG_PIOC_AIMDR REG_ACCESS(WoReg, 0x400E10B4U) /**< \brief (PIOC) Additional Interrupt Modes Disables Register */ -#define REG_PIOC_AIMMR REG_ACCESS(RoReg, 0x400E10B8U) /**< \brief (PIOC) Additional Interrupt Modes Mask Register */ -#define REG_PIOC_ESR REG_ACCESS(WoReg, 0x400E10C0U) /**< \brief (PIOC) Edge Select Register */ -#define REG_PIOC_LSR REG_ACCESS(WoReg, 0x400E10C4U) /**< \brief (PIOC) Level Select Register */ -#define REG_PIOC_ELSR REG_ACCESS(RoReg, 0x400E10C8U) /**< \brief (PIOC) Edge/Level Status Register */ -#define REG_PIOC_FELLSR REG_ACCESS(WoReg, 0x400E10D0U) /**< \brief (PIOC) Falling Edge/Low Level Select Register */ -#define REG_PIOC_REHLSR REG_ACCESS(WoReg, 0x400E10D4U) /**< \brief (PIOC) Rising Edge/ High Level Select Register */ -#define REG_PIOC_FRLHSR REG_ACCESS(RoReg, 0x400E10D8U) /**< \brief (PIOC) Fall/Rise - Low/High Status Register */ -#define REG_PIOC_LOCKSR REG_ACCESS(RoReg, 0x400E10E0U) /**< \brief (PIOC) Lock Status */ -#define REG_PIOC_WPMR REG_ACCESS(RwReg, 0x400E10E4U) /**< \brief (PIOC) Write Protect Mode Register */ -#define REG_PIOC_WPSR REG_ACCESS(RoReg, 0x400E10E8U) /**< \brief (PIOC) Write Protect Status Register */ -/* ========== Register definition for RSTC peripheral ========== */ -#define REG_RSTC_CR REG_ACCESS(WoReg, 0x400E1200U) /**< \brief (RSTC) Control Register */ -#define REG_RSTC_SR REG_ACCESS(RoReg, 0x400E1204U) /**< \brief (RSTC) Status Register */ -#define REG_RSTC_MR REG_ACCESS(RwReg, 0x400E1208U) /**< \brief (RSTC) Mode Register */ -/* ========== Register definition for SUPC peripheral ========== */ -#define REG_SUPC_CR REG_ACCESS(WoReg, 0x400E1210U) /**< \brief (SUPC) Supply Controller Control Register */ -#define REG_SUPC_SMMR REG_ACCESS(RwReg, 0x400E1214U) /**< \brief (SUPC) Supply Controller Supply Monitor Mode Register */ -#define REG_SUPC_MR REG_ACCESS(RwReg, 0x400E1218U) /**< \brief (SUPC) Supply Controller Mode Register */ -#define REG_SUPC_WUMR REG_ACCESS(RwReg, 0x400E121CU) /**< \brief (SUPC) Supply Controller Wake Up Mode Register */ -#define REG_SUPC_WUIR REG_ACCESS(RwReg, 0x400E1220U) /**< \brief (SUPC) Supply Controller Wake Up Inputs Register */ -#define REG_SUPC_SR REG_ACCESS(RoReg, 0x400E1224U) /**< \brief (SUPC) Supply Controller Status Register */ -/* ========== Register definition for RTT peripheral ========== */ -#define REG_RTT_MR REG_ACCESS(RwReg, 0x400E1230U) /**< \brief (RTT) Mode Register */ -#define REG_RTT_AR REG_ACCESS(RwReg, 0x400E1234U) /**< \brief (RTT) Alarm Register */ -#define REG_RTT_VR REG_ACCESS(RoReg, 0x400E1238U) /**< \brief (RTT) Value Register */ -#define REG_RTT_SR REG_ACCESS(RoReg, 0x400E123CU) /**< \brief (RTT) Status Register */ -/* ========== Register definition for WDT peripheral ========== */ -#define REG_WDT_CR REG_ACCESS(WoReg, 0x400E1250U) /**< \brief (WDT) Control Register */ -#define REG_WDT_MR REG_ACCESS(RwReg, 0x400E1254U) /**< \brief (WDT) Mode Register */ -#define REG_WDT_SR REG_ACCESS(RoReg, 0x400E1258U) /**< \brief (WDT) Status Register */ -/* ========== Register definition for RTC peripheral ========== */ -#define REG_RTC_CR REG_ACCESS(RwReg, 0x400E1260U) /**< \brief (RTC) Control Register */ -#define REG_RTC_MR REG_ACCESS(RwReg, 0x400E1264U) /**< \brief (RTC) Mode Register */ -#define REG_RTC_TIMR REG_ACCESS(RwReg, 0x400E1268U) /**< \brief (RTC) Time Register */ -#define REG_RTC_CALR REG_ACCESS(RwReg, 0x400E126CU) /**< \brief (RTC) Calendar Register */ -#define REG_RTC_TIMALR REG_ACCESS(RwReg, 0x400E1270U) /**< \brief (RTC) Time Alarm Register */ -#define REG_RTC_CALALR REG_ACCESS(RwReg, 0x400E1274U) /**< \brief (RTC) Calendar Alarm Register */ -#define REG_RTC_SR REG_ACCESS(RoReg, 0x400E1278U) /**< \brief (RTC) Status Register */ -#define REG_RTC_SCCR REG_ACCESS(WoReg, 0x400E127CU) /**< \brief (RTC) Status Clear Command Register */ -#define REG_RTC_IER REG_ACCESS(WoReg, 0x400E1280U) /**< \brief (RTC) Interrupt Enable Register */ -#define REG_RTC_IDR REG_ACCESS(WoReg, 0x400E1284U) /**< \brief (RTC) Interrupt Disable Register */ -#define REG_RTC_IMR REG_ACCESS(RoReg, 0x400E1288U) /**< \brief (RTC) Interrupt Mask Register */ -#define REG_RTC_VER REG_ACCESS(RoReg, 0x400E128CU) /**< \brief (RTC) Valid Entry Register */ -/* ========== Register definition for GPBR peripheral ========== */ -#define REG_GPBR_GPBR0 REG_ACCESS(RwReg, 0x400E1290U) /**< \brief (GPBR) General Purpose Backup Register 0 */ -#define REG_GPBR_GPBR1 REG_ACCESS(RwReg, 0x400E1294U) /**< \brief (GPBR) General Purpose Backup Register 1 */ -#define REG_GPBR_GPBR2 REG_ACCESS(RwReg, 0x400E1298U) /**< \brief (GPBR) General Purpose Backup Register 2 */ -#define REG_GPBR_GPBR3 REG_ACCESS(RwReg, 0x400E129CU) /**< \brief (GPBR) General Purpose Backup Register 3 */ -/*@}*/ - -/* ***************************************************************************** */ -/* PERIPHERAL ID DEFINITIONS FOR AT91SAM3U */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3U_id Peripheral Ids Definitions */ -/*@{*/ - -#define ID_SUPC ( 0) /**< \brief Supply Controller (SUPC) */ -#define ID_RSTC ( 1) /**< \brief Reset Controller (RSTC) */ -#define ID_RTC ( 2) /**< \brief Real Time Clock (RTC) */ -#define ID_RTT ( 3) /**< \brief Real Time Timer (RTT) */ -#define ID_WDT ( 4) /**< \brief Watchdog Timer (WDT) */ -#define ID_PMC ( 5) /**< \brief Power Management Controller (PMC) */ -#define ID_EFC0 ( 6) /**< \brief Enhanced Embedded Flash Controller 0 (EFC0) */ -#define ID_EFC1 ( 7) /**< \brief Enhanced Embedded Flash Controller 1 (EFC1) */ -#define ID_UART ( 8) /**< \brief Universal Asynchronous Receiver Transmitter (UART) */ -#define ID_SMC ( 9) /**< \brief Static Memory Controller (SMC) */ -#define ID_PIOA (10) /**< \brief Parallel I/O Controller A, (PIOA) */ -#define ID_PIOB (11) /**< \brief Parallel I/O Controller B (PIOB) */ -#define ID_PIOC (12) /**< \brief Parallel I/O Controller C (PIOC) */ -#define ID_USART0 (13) /**< \brief USART 0 (USART0) */ -#define ID_USART1 (14) /**< \brief USART 1 (USART1) */ -#define ID_USART2 (15) /**< \brief USART 2 (USART2) */ -#define ID_USART3 (16) /**< \brief USART 3 (USART3) */ -#define ID_HSMCI (17) /**< \brief High Speed Multimedia Card Interface (HSMCI) */ -#define ID_TWI0 (18) /**< \brief Two-Wire Interface 0 (TWI0) */ -#define ID_TWI1 (19) /**< \brief Two-Wire Interface 1 (TWI1) */ -#define ID_SPI (20) /**< \brief Serial Peripheral Interface (SPI) */ -#define ID_SSC (21) /**< \brief Synchronous Serial Controller (SSC) */ -#define ID_TC0 (22) /**< \brief Timer Counter 0 (TC0) */ -#define ID_TC1 (23) /**< \brief Timer Counter 1 (TC1) */ -#define ID_TC2 (24) /**< \brief Timer Counter 2 (TC2) */ -#define ID_PWM (25) /**< \brief Pulse Width Modulation Controller (PWM) */ -#define ID_ADC12B (26) /**< \brief 12-bit ADC Controller (ADC12B) */ -#define ID_ADC (27) /**< \brief 10-bit ADC Controller (ADC) */ -#define ID_DMAC (28) /**< \brief DMA Controller (DMAC) */ -#define ID_UDPHS (29) /**< \brief USB Device High Speed (UDPHS) */ -/*@}*/ - -/* ***************************************************************************** */ -/* BASE ADDRESS DEFINITIONS FOR AT91SAM3U */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3U_base Peripheral Base Address Definitions */ -/*@{*/ - -#define HSMCI CAST(Hsmci , 0x40000000U) /**< \brief (HSMCI ) Base Address */ -#define SSC CAST(Ssc , 0x40004000U) /**< \brief (SSC ) Base Address */ -#define SPI CAST(Spi , 0x40008000U) /**< \brief (SPI ) Base Address */ -#define TC0 CAST(Tc , 0x40080000U) /**< \brief (TC0 ) Base Address */ -#define TWI0 CAST(Twi , 0x40084000U) /**< \brief (TWI0 ) Base Address */ -#define PDC_TWI0 CAST(Pdc , 0x40084100U) /**< \brief (PDC_TWI0 ) Base Address */ -#define TWI1 CAST(Twi , 0x40088000U) /**< \brief (TWI1 ) Base Address */ -#define PDC_TWI1 CAST(Pdc , 0x40088100U) /**< \brief (PDC_TWI1 ) Base Address */ -#define PWM CAST(Pwm , 0x4008C000U) /**< \brief (PWM ) Base Address */ -#define PDC_PWM CAST(Pdc , 0x4008C100U) /**< \brief (PDC_PWM ) Base Address */ -#define USART0 CAST(Usart , 0x40090000U) /**< \brief (USART0 ) Base Address */ -#define PDC_USART0 CAST(Pdc , 0x40090100U) /**< \brief (PDC_USART0) Base Address */ -#define USART1 CAST(Usart , 0x40094000U) /**< \brief (USART1 ) Base Address */ -#define PDC_USART1 CAST(Pdc , 0x40094100U) /**< \brief (PDC_USART1) Base Address */ -#define USART2 CAST(Usart , 0x40098000U) /**< \brief (USART2 ) Base Address */ -#define PDC_USART2 CAST(Pdc , 0x40098100U) /**< \brief (PDC_USART2) Base Address */ -#define USART3 CAST(Usart , 0x4009C000U) /**< \brief (USART3 ) Base Address */ -#define PDC_USART3 CAST(Pdc , 0x4009C100U) /**< \brief (PDC_USART3) Base Address */ -#define UDPHS CAST(Udphs , 0x400A4000U) /**< \brief (UDPHS ) Base Address */ -#define ADC12B CAST(Adc12b , 0x400A8000U) /**< \brief (ADC12B ) Base Address */ -#define PDC_ADC12B CAST(Pdc , 0x400A8100U) /**< \brief (PDC_ADC12B) Base Address */ -#define ADC CAST(Adc , 0x400AC000U) /**< \brief (ADC ) Base Address */ -#define PDC_ADC CAST(Pdc , 0x400AC100U) /**< \brief (PDC_ADC ) Base Address */ -#define DMAC CAST(Dmac , 0x400B0000U) /**< \brief (DMAC ) Base Address */ -#define SMC CAST(Smc , 0x400E0000U) /**< \brief (SMC ) Base Address */ -#define MATRIX CAST(Matrix , 0x400E0200U) /**< \brief (MATRIX ) Base Address */ -#define PMC CAST(Pmc , 0x400E0400U) /**< \brief (PMC ) Base Address */ -#define UART CAST(Uart , 0x400E0600U) /**< \brief (UART ) Base Address */ -#define PDC_UART CAST(Pdc , 0x400E0700U) /**< \brief (PDC_UART ) Base Address */ -#define CHIPID CAST(Chipid , 0x400E0740U) /**< \brief (CHIPID ) Base Address */ -#define EFC0 CAST(Efc , 0x400E0800U) /**< \brief (EFC0 ) Base Address */ -#define EFC1 CAST(Efc , 0x400E0A00U) /**< \brief (EFC1 ) Base Address */ -#define PIOA CAST(Pio , 0x400E0C00U) /**< \brief (PIOA ) Base Address */ -#define PIOB CAST(Pio , 0x400E0E00U) /**< \brief (PIOB ) Base Address */ -#define PIOC CAST(Pio , 0x400E1000U) /**< \brief (PIOC ) Base Address */ -#define RSTC CAST(Rstc , 0x400E1200U) /**< \brief (RSTC ) Base Address */ -#define SUPC CAST(Supc , 0x400E1210U) /**< \brief (SUPC ) Base Address */ -#define RTT CAST(Rtt , 0x400E1230U) /**< \brief (RTT ) Base Address */ -#define WDT CAST(Wdt , 0x400E1250U) /**< \brief (WDT ) Base Address */ -#define RTC CAST(Rtc , 0x400E1260U) /**< \brief (RTC ) Base Address */ -#define GPBR CAST(Gpbr , 0x400E1290U) /**< \brief (GPBR ) Base Address */ -/*@}*/ - -/* ***************************************************************************** */ -/* PIO DEFINITIONS FOR AT91SAM3U */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3U_pio Peripheral Pio Definitions */ -/*@{*/ - -#define PIO_PA0 (1 << 0) /**< \brief Pin Controlled by PA0 */ -#define PIO_PA1 (1 << 1) /**< \brief Pin Controlled by PA1 */ -#define PIO_PA2 (1 << 2) /**< \brief Pin Controlled by PA2 */ -#define PIO_PA3 (1 << 3) /**< \brief Pin Controlled by PA3 */ -#define PIO_PA4 (1 << 4) /**< \brief Pin Controlled by PA4 */ -#define PIO_PA5 (1 << 5) /**< \brief Pin Controlled by PA5 */ -#define PIO_PA6 (1 << 6) /**< \brief Pin Controlled by PA6 */ -#define PIO_PA7 (1 << 7) /**< \brief Pin Controlled by PA7 */ -#define PIO_PA8 (1 << 8) /**< \brief Pin Controlled by PA8 */ -#define PIO_PA9 (1 << 9) /**< \brief Pin Controlled by PA9 */ -#define PIO_PA10 (1 << 10) /**< \brief Pin Controlled by PA10 */ -#define PIO_PA11 (1 << 11) /**< \brief Pin Controlled by PA11 */ -#define PIO_PA12 (1 << 12) /**< \brief Pin Controlled by PA12 */ -#define PIO_PA13 (1 << 13) /**< \brief Pin Controlled by PA13 */ -#define PIO_PA14 (1 << 14) /**< \brief Pin Controlled by PA14 */ -#define PIO_PA15 (1 << 15) /**< \brief Pin Controlled by PA15 */ -#define PIO_PA16 (1 << 16) /**< \brief Pin Controlled by PA16 */ -#define PIO_PA17 (1 << 17) /**< \brief Pin Controlled by PA17 */ -#define PIO_PA18 (1 << 18) /**< \brief Pin Controlled by PA18 */ -#define PIO_PA19 (1 << 19) /**< \brief Pin Controlled by PA19 */ -#define PIO_PA20 (1 << 20) /**< \brief Pin Controlled by PA20 */ -#define PIO_PA21 (1 << 21) /**< \brief Pin Controlled by PA21 */ -#define PIO_PA22 (1 << 22) /**< \brief Pin Controlled by PA22 */ -#define PIO_PA23 (1 << 23) /**< \brief Pin Controlled by PA23 */ -#define PIO_PA24 (1 << 24) /**< \brief Pin Controlled by PA24 */ -#define PIO_PA25 (1 << 25) /**< \brief Pin Controlled by PA25 */ -#define PIO_PA26 (1 << 26) /**< \brief Pin Controlled by PA26 */ -#define PIO_PA27 (1 << 27) /**< \brief Pin Controlled by PA27 */ -#define PIO_PA28 (1 << 28) /**< \brief Pin Controlled by PA28 */ -#define PIO_PA29 (1 << 29) /**< \brief Pin Controlled by PA29 */ -#define PIO_PA30 (1 << 30) /**< \brief Pin Controlled by PA30 */ -#define PIO_PA31 (1 << 31) /**< \brief Pin Controlled by PA31 */ -#define PIO_PB0 (1 << 0) /**< \brief Pin Controlled by PB0 */ -#define PIO_PB1 (1 << 1) /**< \brief Pin Controlled by PB1 */ -#define PIO_PB2 (1 << 2) /**< \brief Pin Controlled by PB2 */ -#define PIO_PB3 (1 << 3) /**< \brief Pin Controlled by PB3 */ -#define PIO_PB4 (1 << 4) /**< \brief Pin Controlled by PB4 */ -#define PIO_PB5 (1 << 5) /**< \brief Pin Controlled by PB5 */ -#define PIO_PB6 (1 << 6) /**< \brief Pin Controlled by PB6 */ -#define PIO_PB7 (1 << 7) /**< \brief Pin Controlled by PB7 */ -#define PIO_PB8 (1 << 8) /**< \brief Pin Controlled by PB8 */ -#define PIO_PB9 (1 << 9) /**< \brief Pin Controlled by PB9 */ -#define PIO_PB10 (1 << 10) /**< \brief Pin Controlled by PB10 */ -#define PIO_PB11 (1 << 11) /**< \brief Pin Controlled by PB11 */ -#define PIO_PB12 (1 << 12) /**< \brief Pin Controlled by PB12 */ -#define PIO_PB13 (1 << 13) /**< \brief Pin Controlled by PB13 */ -#define PIO_PB14 (1 << 14) /**< \brief Pin Controlled by PB14 */ -#define PIO_PB15 (1 << 15) /**< \brief Pin Controlled by PB15 */ -#define PIO_PB16 (1 << 16) /**< \brief Pin Controlled by PB16 */ -#define PIO_PB17 (1 << 17) /**< \brief Pin Controlled by PB17 */ -#define PIO_PB18 (1 << 18) /**< \brief Pin Controlled by PB18 */ -#define PIO_PB19 (1 << 19) /**< \brief Pin Controlled by PB19 */ -#define PIO_PB20 (1 << 20) /**< \brief Pin Controlled by PB20 */ -#define PIO_PB21 (1 << 21) /**< \brief Pin Controlled by PB21 */ -#define PIO_PB22 (1 << 22) /**< \brief Pin Controlled by PB22 */ -#define PIO_PB23 (1 << 23) /**< \brief Pin Controlled by PB23 */ -#define PIO_PB24 (1 << 24) /**< \brief Pin Controlled by PB24 */ -#define PIO_PB25 (1 << 25) /**< \brief Pin Controlled by PB25 */ -#define PIO_PB26 (1 << 26) /**< \brief Pin Controlled by PB26 */ -#define PIO_PB27 (1 << 27) /**< \brief Pin Controlled by PB27 */ -#define PIO_PB28 (1 << 28) /**< \brief Pin Controlled by PB28 */ -#define PIO_PB29 (1 << 29) /**< \brief Pin Controlled by PB29 */ -#define PIO_PB30 (1 << 30) /**< \brief Pin Controlled by PB30 */ -#define PIO_PB31 (1 << 31) /**< \brief Pin Controlled by PB31 */ -#define PIO_PC0 (1 << 0) /**< \brief Pin Controlled by PC0 */ -#define PIO_PC1 (1 << 1) /**< \brief Pin Controlled by PC1 */ -#define PIO_PC2 (1 << 2) /**< \brief Pin Controlled by PC2 */ -#define PIO_PC3 (1 << 3) /**< \brief Pin Controlled by PC3 */ -#define PIO_PC4 (1 << 4) /**< \brief Pin Controlled by PC4 */ -#define PIO_PC5 (1 << 5) /**< \brief Pin Controlled by PC5 */ -#define PIO_PC6 (1 << 6) /**< \brief Pin Controlled by PC6 */ -#define PIO_PC7 (1 << 7) /**< \brief Pin Controlled by PC7 */ -#define PIO_PC8 (1 << 8) /**< \brief Pin Controlled by PC8 */ -#define PIO_PC9 (1 << 9) /**< \brief Pin Controlled by PC9 */ -#define PIO_PC10 (1 << 10) /**< \brief Pin Controlled by PC10 */ -#define PIO_PC11 (1 << 11) /**< \brief Pin Controlled by PC11 */ -#define PIO_PC12 (1 << 12) /**< \brief Pin Controlled by PC12 */ -#define PIO_PC13 (1 << 13) /**< \brief Pin Controlled by PC13 */ -#define PIO_PC14 (1 << 14) /**< \brief Pin Controlled by PC14 */ -#define PIO_PC15 (1 << 15) /**< \brief Pin Controlled by PC15 */ -#define PIO_PC16 (1 << 16) /**< \brief Pin Controlled by PC16 */ -#define PIO_PC17 (1 << 17) /**< \brief Pin Controlled by PC17 */ -#define PIO_PC18 (1 << 18) /**< \brief Pin Controlled by PC18 */ -#define PIO_PC19 (1 << 19) /**< \brief Pin Controlled by PC19 */ -#define PIO_PC20 (1 << 20) /**< \brief Pin Controlled by PC20 */ -#define PIO_PC21 (1 << 21) /**< \brief Pin Controlled by PC21 */ -#define PIO_PC22 (1 << 22) /**< \brief Pin Controlled by PC22 */ -#define PIO_PC23 (1 << 23) /**< \brief Pin Controlled by PC23 */ -#define PIO_PC24 (1 << 24) /**< \brief Pin Controlled by PC24 */ -#define PIO_PC25 (1 << 25) /**< \brief Pin Controlled by PC25 */ -#define PIO_PC26 (1 << 26) /**< \brief Pin Controlled by PC26 */ -#define PIO_PC27 (1 << 27) /**< \brief Pin Controlled by PC27 */ -#define PIO_PC28 (1 << 28) /**< \brief Pin Controlled by PC28 */ -#define PIO_PC29 (1 << 29) /**< \brief Pin Controlled by PC29 */ -#define PIO_PC30 (1 << 30) /**< \brief Pin Controlled by PC30 */ -#define PIO_PC31 (1 << 31) /**< \brief Pin Controlled by PC31 */ -/* ========== Pio definition for HSMCI peripheral ========== */ -#define PIO_PA4A_MCCDA (1 << 4) /**< \brief Hsmci signal: MCCDA */ -#define PIO_PA3A_MCCK (1 << 3) /**< \brief Hsmci signal: MCCK */ -#define PIO_PA5A_MCDA0 (1 << 5) /**< \brief Hsmci signal: MCDA0 */ -#define PIO_PA6A_MCDA1 (1 << 6) /**< \brief Hsmci signal: MCDA1 */ -#define PIO_PA7A_MCDA2 (1 << 7) /**< \brief Hsmci signal: MCDA2 */ -#define PIO_PA8A_MCDA3 (1 << 8) /**< \brief Hsmci signal: MCDA3 */ -#define PIO_PC28B_MCDA4 (1 << 28) /**< \brief Hsmci signal: MCDA4 */ -#define PIO_PC29B_MCDA5 (1 << 29) /**< \brief Hsmci signal: MCDA5 */ -#define PIO_PC30B_MCDA6 (1 << 30) /**< \brief Hsmci signal: MCDA6 */ -#define PIO_PC31B_MCDA7 (1 << 31) /**< \brief Hsmci signal: MCDA7 */ -/* ========== Pio definition for SSC peripheral ========== */ -#define PIO_PA27A_RD (1 << 27) /**< \brief Ssc signal: RD */ -#define PIO_PA31A_RF (1 << 31) /**< \brief Ssc signal: RF */ -#define PIO_PA29A_RK (1 << 29) /**< \brief Ssc signal: RK */ -#define PIO_PA26A_TD (1 << 26) /**< \brief Ssc signal: TD */ -#define PIO_PA30A_TF (1 << 30) /**< \brief Ssc signal: TF */ -#define PIO_PA28A_TK (1 << 28) /**< \brief Ssc signal: TK */ -/* ========== Pio definition for SPI peripheral ========== */ -#define PIO_PA13A_MISO (1 << 13) /**< \brief Spi signal: MISO */ -#define PIO_PA14A_MOSI (1 << 14) /**< \brief Spi signal: MOSI */ -#define PIO_PA16A_NPCS0 (1 << 16) /**< \brief Spi signal: NPCS0 */ -#define PIO_PA0B_NPCS1 (1 << 0) /**< \brief Spi signal: NPCS1 */ -#define PIO_PC19B_NPCS1 (1 << 19) /**< \brief Spi signal: NPCS1 */ -#define PIO_PC3B_NPCS1 (1 << 3) /**< \brief Spi signal: NPCS1 */ -#define PIO_PA1B_NPCS2 (1 << 1) /**< \brief Spi signal: NPCS2 */ -#define PIO_PC14B_NPCS2 (1 << 14) /**< \brief Spi signal: NPCS2 */ -#define PIO_PC4B_NPCS2 (1 << 4) /**< \brief Spi signal: NPCS2 */ -#define PIO_PA19B_NPCS3 (1 << 19) /**< \brief Spi signal: NPCS3 */ -#define PIO_PC5B_NPCS3 (1 << 5) /**< \brief Spi signal: NPCS3 */ -#define PIO_PA15A_SPCK (1 << 15) /**< \brief Spi signal: SPCK */ -/* ========== Pio definition for TC0 peripheral ========== */ -#define PIO_PA2A_TCLK0 (1 << 2) /**< \brief Tc0 signal: TCLK0 */ -#define PIO_PB4A_TCLK1 (1 << 4) /**< \brief Tc0 signal: TCLK1 */ -#define PIO_PA26B_TCLK2 (1 << 26) /**< \brief Tc0 signal: TCLK2 */ -#define PIO_PA1A_TIOA0 (1 << 1) /**< \brief Tc0 signal: TIOA0 */ -#define PIO_PB5A_TIOA1 (1 << 5) /**< \brief Tc0 signal: TIOA1 */ -#define PIO_PA30B_TIOA2 (1 << 30) /**< \brief Tc0 signal: TIOA2 */ -#define PIO_PA0A_TIOB0 (1 << 0) /**< \brief Tc0 signal: TIOB0 */ -#define PIO_PB6A_TIOB1 (1 << 6) /**< \brief Tc0 signal: TIOB1 */ -#define PIO_PA31B_TIOB2 (1 << 31) /**< \brief Tc0 signal: TIOB2 */ -/* ========== Pio definition for TWI0 peripheral ========== */ -#define PIO_PA10A_TWCK0 (1 << 10) /**< \brief Twi0 signal: TWCK0 */ -#define PIO_PA9A_TWD0 (1 << 9) /**< \brief Twi0 signal: TWD0 */ -/* ========== Pio definition for TWI1 peripheral ========== */ -#define PIO_PA25A_TWCK1 (1 << 25) /**< \brief Twi1 signal: TWCK1 */ -#define PIO_PA24A_TWD1 (1 << 24) /**< \brief Twi1 signal: TWD1 */ -/* ========== Pio definition for PWM peripheral ========== */ -#define PIO_PA11B_PWMFI0 (1 << 11) /**< \brief Pwm signal: PWMFI0 */ -#define PIO_PA12B_PWMFI1 (1 << 12) /**< \brief Pwm signal: PWMFI1 */ -#define PIO_PA18B_PWMFI2 (1 << 18) /**< \brief Pwm signal: PWMFI2 */ -#define PIO_PA28B_PWMH0 (1 << 28) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA4B_PWMH0 (1 << 4) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PB0A_PWMH0 (1 << 0) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PB13B_PWMH0 (1 << 13) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PC24B_PWMH0 (1 << 24) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA29B_PWMH1 (1 << 29) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA5B_PWMH1 (1 << 5) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PB1A_PWMH1 (1 << 1) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PB14B_PWMH1 (1 << 14) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PC25B_PWMH1 (1 << 25) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA15B_PWMH2 (1 << 15) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA6B_PWMH2 (1 << 6) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PB15B_PWMH2 (1 << 15) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PB2A_PWMH2 (1 << 2) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PC26B_PWMH2 (1 << 26) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA20B_PWMH3 (1 << 20) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PB16B_PWMH3 (1 << 16) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PB3A_PWMH3 (1 << 3) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PC27B_PWMH3 (1 << 27) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PA7B_PWML0 (1 << 7) /**< \brief Pwm signal: PWML0 */ -#define PIO_PB17B_PWML0 (1 << 17) /**< \brief Pwm signal: PWML0 */ -#define PIO_PB25B_PWML0 (1 << 25) /**< \brief Pwm signal: PWML0 */ -#define PIO_PC29A_PWML0 (1 << 29) /**< \brief Pwm signal: PWML0 */ -#define PIO_PC6B_PWML0 (1 << 6) /**< \brief Pwm signal: PWML0 */ -#define PIO_PA8B_PWML1 (1 << 8) /**< \brief Pwm signal: PWML1 */ -#define PIO_PB18B_PWML1 (1 << 18) /**< \brief Pwm signal: PWML1 */ -#define PIO_PB26B_PWML1 (1 << 26) /**< \brief Pwm signal: PWML1 */ -#define PIO_PC30A_PWML1 (1 << 30) /**< \brief Pwm signal: PWML1 */ -#define PIO_PC7B_PWML1 (1 << 7) /**< \brief Pwm signal: PWML1 */ -#define PIO_PA9B_PWML2 (1 << 9) /**< \brief Pwm signal: PWML2 */ -#define PIO_PB19B_PWML2 (1 << 19) /**< \brief Pwm signal: PWML2 */ -#define PIO_PB27B_PWML2 (1 << 27) /**< \brief Pwm signal: PWML2 */ -#define PIO_PC31A_PWML2 (1 << 31) /**< \brief Pwm signal: PWML2 */ -#define PIO_PC8B_PWML2 (1 << 8) /**< \brief Pwm signal: PWML2 */ -#define PIO_PA10B_PWML3 (1 << 10) /**< \brief Pwm signal: PWML3 */ -#define PIO_PB20B_PWML3 (1 << 20) /**< \brief Pwm signal: PWML3 */ -#define PIO_PB28B_PWML3 (1 << 28) /**< \brief Pwm signal: PWML3 */ -#define PIO_PC16B_PWML3 (1 << 16) /**< \brief Pwm signal: PWML3 */ -#define PIO_PC9B_PWML3 (1 << 9) /**< \brief Pwm signal: PWML3 */ -/* ========== Pio definition for USART0 peripheral ========== */ -#define PIO_PB8A_CTS0 (1 << 8) /**< \brief Usart0 signal: CTS0 */ -#define PIO_PB11B_DCD0 (1 << 11) /**< \brief Usart0 signal: DCD0 */ -#define PIO_PB10B_DSR0 (1 << 10) /**< \brief Usart0 signal: DSR0 */ -#define PIO_PB9B_DTR0 (1 << 9) /**< \brief Usart0 signal: DTR0 */ -#define PIO_PB12B_RI0 (1 << 12) /**< \brief Usart0 signal: RI0 */ -#define PIO_PB7A_RTS0 (1 << 7) /**< \brief Usart0 signal: RTS0 */ -#define PIO_PA19A_RXD0 (1 << 19) /**< \brief Usart0 signal: RXD0 */ -#define PIO_PA17A_SCK0 (1 << 17) /**< \brief Usart0 signal: SCK0 */ -#define PIO_PA18A_TXD0 (1 << 18) /**< \brief Usart0 signal: TXD0 */ -/* ========== Pio definition for USART1 peripheral ========== */ -#define PIO_PA23B_CTS1 (1 << 23) /**< \brief Usart1 signal: CTS1 */ -#define PIO_PA22B_RTS1 (1 << 22) /**< \brief Usart1 signal: RTS1 */ -#define PIO_PA21A_RXD1 (1 << 21) /**< \brief Usart1 signal: RXD1 */ -#define PIO_PA24B_SCK1 (1 << 24) /**< \brief Usart1 signal: SCK1 */ -#define PIO_PA20A_TXD1 (1 << 20) /**< \brief Usart1 signal: TXD1 */ -/* ========== Pio definition for USART2 peripheral ========== */ -#define PIO_PB22B_CTS2 (1 << 22) /**< \brief Usart2 signal: CTS2 */ -#define PIO_PB21B_RTS2 (1 << 21) /**< \brief Usart2 signal: RTS2 */ -#define PIO_PA23A_RXD2 (1 << 23) /**< \brief Usart2 signal: RXD2 */ -#define PIO_PA25B_SCK2 (1 << 25) /**< \brief Usart2 signal: SCK2 */ -#define PIO_PA22A_TXD2 (1 << 22) /**< \brief Usart2 signal: TXD2 */ -/* ========== Pio definition for USART3 peripheral ========== */ -#define PIO_PC10B_CTS3 (1 << 10) /**< \brief Usart3 signal: CTS3 */ -#define PIO_PC11B_RTS3 (1 << 11) /**< \brief Usart3 signal: RTS3 */ -#define PIO_PC13B_RXD3 (1 << 13) /**< \brief Usart3 signal: RXD3 */ -#define PIO_PC19A_SCK3 (1 << 19) /**< \brief Usart3 signal: SCK3 */ -#define PIO_PC12B_TXD3 (1 << 12) /**< \brief Usart3 signal: TXD3 */ -/* ========== Pio definition for ADC12B peripheral ========== */ -#define PIO_PA2B_AD12BTRG (1 << 2) /**< \brief Adc12b signal: AD12BTRG */ -/* ========== Pio definition for ADC peripheral ========== */ -#define PIO_PA17B_ADTRG (1 << 17) /**< \brief Adc signal: ADTRG */ -/* ========== Pio definition for PMC peripheral ========== */ -#define PIO_PA21B_PCK0 (1 << 21) /**< \brief Pmc signal: PCK0 */ -#define PIO_PA27B_PCK0 (1 << 27) /**< \brief Pmc signal: PCK0 */ -#define PIO_PA3B_PCK1 (1 << 3) /**< \brief Pmc signal: PCK1 */ -#define PIO_PB24B_PCK1 (1 << 24) /**< \brief Pmc signal: PCK1 */ -#define PIO_PB23B_PCK2 (1 << 23) /**< \brief Pmc signal: PCK2 */ -/* ========== Pio definition for UART peripheral ========== */ -#define PIO_PA11A_URXD (1 << 11) /**< \brief Uart signal: URXD */ -#define PIO_PA12A_UTXD (1 << 12) /**< \brief Uart signal: UTXD */ -/*@}*/ - -/* ***************************************************************************** */ -/* MEMORY MAPPING DEFINITIONS FOR AT91SAM3U */ -/* ***************************************************************************** */ - -#define AT91C_IRAM (0x20000000) /**< Internal RAM base address */ -#define AT91C_IFLASH (0x00080000) /**< Internal Flash base address */ -//#define AT91C_IFLASH (0x00100000) /**< Internal Flash base address */ -#define AT91C_IROM (0x00180000) /**< Internal ROM base address */ -//#define AT91C_IRAM (0x20000000) /**< Internal RAM base address */ -//#define AT91C_IRAM (0x20080000) /**< Internal RAM base address */ - -#ifdef __cplusplus -} -#endif - -/*@}*/ - -#endif /* AT91SAM3U_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/chip.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/chip.h deleted file mode 100644 index 03133de4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/chip.h +++ /dev/null @@ -1,77 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - -#ifndef CHIP_H -#define CHIP_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ - - -//ARM core features - -// ARM core definition. -#define cortexm3 - -// family definition. -#define at91sam3u - -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ - -//IP FEATURES - -// EFC GPNVM number -#define CHIP_EFC_NUM_GPNVMS 3 - -// Indicates chip has an Enhanced EFC. -#define CHIP_FLASH_EEFC - -// DMA channels number -#define CHIP_DMA_CHANNEL_NUM 4 - -// Indicate chip has a nandflash controller. -#define CHIP_NAND_CTRL - -//------------------------------------------------------------------------------ - - -//Misc - -//------------------------------------------------------------------------------ - -#endif //#ifndef CHIP_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/flash.icf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/flash.icf deleted file mode 100644 index a8911758..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/flash.icf +++ /dev/null @@ -1,47 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ -/*-Vector table start*/ -define symbol __ICFEDIT_vector_start__ = 0x00080000; /*Add for CMSIS*/ -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000; -define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF; -define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000; -define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF; -define symbol __ICFEDIT_region_ROM0_start__ = 0x00080000; -define symbol __ICFEDIT_region_ROM0_end__ = 0x0009FFFF; -define symbol __ICFEDIT_region_ROM1_start__ = 0x00100000; -define symbol __ICFEDIT_region_ROM1_end__ = 0x0011FFFF; -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x800; -define symbol __ICFEDIT_size_heap__ = 0x200; -/*-Specials-*/ -/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/ -/*define symbol __ICFEDIT_size_vectors__ = 0x100;*/ /*Referenced for CMSIS*/ -/*-Exports-*/ -/*export symbol __ICFEDIT_region_RAM_VECT_start__;*/ -export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/ -/**** End of ICF editor section. ###ICF###*/ - -define memory mem with size = 4G; -/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ /*Referenced for CMSIS*/ -/*define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/ -define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__]; -define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; -/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] | - mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/ -define region ROM0_region = mem:[from __ICFEDIT_region_ROM0_start__ to __ICFEDIT_region_ROM0_end__]; -define region ROM1_region = mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__]; - -/*define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { };*/ -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - -initialize by copy { readwrite }; -do not initialize { section .noinit }; - -/*place at start of ROM0_region { readonly section .vectors };*/ /*Referenced for CMSIS*/ -place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; /*Add for CMSIS*/ -place in ROM0_region { readonly }; -place in RAM0_region { readwrite, block CSTACK, block HEAP }; -/*place in RAM_VECT_region { block RamVect };*/ /*Referenced for CMSIS*/ \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/flash.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/flash.lds deleted file mode 100644 index 0355f922..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/flash.lds +++ /dev/null @@ -1,87 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal FLASH on the AT91SAM3U4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(ResetException) - -/* Vector Definition */ -/* vector is put at very begin adress of SRAM0, the preserved size is 0x100 */ -_vect_start = 0x20000000; - -/* Memory Spaces Definitions */ -MEMORY -{ - sram0 (W!RX) : ORIGIN = 0x20000100, LENGTH = 0x00007F00 /* Sram0, 32K */ - sram1 (W!RX) : ORIGIN = 0x20080000, LENGTH = 0x00004000 /* Sram1, 16K */ - flash0 (W!RX) : ORIGIN = 0x00080000, LENGTH = 0x00020000 /* Flash0, 128K */ - flash1 (W!RX) : ORIGIN = 0x00100000, LENGTH = 0x00020000 /* Flash1, 128K */ -} - -SECTIONS -{ - .fixed : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) - *(.text*) - *(.rodata*) - *(.glue_7) - *(.glue_7t) - . = ALIGN(4); - _efixed = .; /* End of text section */ - } >flash0 - - .relocate : AT (_efixed) - { - . = ALIGN(4); - _srelocate = .; - *(.ramfunc); - *(.data); - . = ALIGN(4); - _erelocate = .; - } >sram0 - - .bss (NOLOAD) : { - . = ALIGN(4); - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >sram0 - - /* Stack in the end of SRAM0 */ - _estack = 0x20007FFC; -} -end = .; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/flash.sct b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/flash.sct deleted file mode 100644 index 3ec4fac7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/flash.sct +++ /dev/null @@ -1,58 +0,0 @@ -; * ---------------------------------------------------------------------------- -; * ATMEL Microcontroller Software Support -; * ---------------------------------------------------------------------------- -; * Copyright (c) 2008, Atmel Corporation -; * -; * All rights reserved. -; * -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * -; * - Redistributions of source code must retain the above copyright notice, -; * this list of conditions and the disclaimer below. -; * -; * Atmel's name may not be used to endorse or promote products derived from -; * this software without specific prior written permission. -; * -; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR -; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE -; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, -; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, -; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -; * ---------------------------------------------------------------------------- - -; *------------------------------------------------------------------------------ -; * Linker scatter for running in internal SRAM on the AT91SAM3U4 -; *----------------------------------------------------------------------------*/ - -; /* vector is put at very begin adress of SRAM0, the preserved size is 0x100 */ -Load_region 0x80000 0x20000 -{ - ; Flash 128K - Vector_region 0x80000 - { - board_cstartup_keil.o (vectors, +FIRST) - } - Fixed_region +0 - { - .ANY (+RO) - } - ; SRAM0 32K - Relocate_region 0x20000100 (0x8000-0x100) - { - .ANY (+RW +ZI) - } - ; Configure Stack and Heap - ARM_LIB_HEAP 0x20007000 EMPTY 0x400 - { - } - - ARM_LIB_STACK 0x20007FFC EMPTY -0x400 - { - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/psram.icf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/psram.icf deleted file mode 100644 index bdd5f4d1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/psram.icf +++ /dev/null @@ -1,43 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ -/*-Vector table start*/ -define symbol __ICFEDIT_vector_start__ = 0x60000000; /*Add for CMSIS*/ -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000; -define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF; -define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000; -define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF; -define symbol __ICFEDIT_region_PSRAM_start__ = 0x60000000; -define symbol __ICFEDIT_region_RSRAM_end__ = 0x600FFFFF; -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x400; -define symbol __ICFEDIT_size_heap__ = 0x200; -/*-Specials-*/ -/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/ -/*define symbol __ICFEDIT_size_vectors__ = 0x100;*/ /*Referenced for CMSIS*/ -/*-Exports-*/ -export symbol __ICFEDIT_region_RAM_VECT_start__; /*Add for CMSIS*/ -/**** End of ICF editor section. ###ICF###*/ - -define memory mem with size = 4G; -/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ -/*define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/ -define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__]; -define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; -/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] | - mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/ -define region PSRAM_region = mem:[from __ICFEDIT_region_PSRAM_start__ to __ICFEDIT_region_RSRAM_end__]; - -/*define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { };*/ /*Referenced for CMSIS*/ -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - -initialize by copy { readwrite }; -do not initialize { section .noinit }; - -/*place at start of PSRAM_region { readonly section .vectors };*/ /*Referenced for CMSIS*/ -place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; /*Add for CMSIS*/ -place in PSRAM_region { readonly }; -place in PSRAM_region { readwrite, block CSTACK, block HEAP }; -/*place in RAM_VECT_region { block RamVect };*/ /*Referenced for CMSIS*/ \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/psram.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/psram.lds deleted file mode 100644 index b5b8c8d5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/psram.lds +++ /dev/null @@ -1,86 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal PSRAM on the AT91SAM3U4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(ResetException) - -/* Vector Definition */ -/* vector is put at very begin adress of SRAM0, the preserved size is 0x100 */ -_vect_start = 0x20000000; - -/* Memory Spaces Definitions */ -MEMORY -{ - sram0 (W!RX) : ORIGIN = 0x20000100, LENGTH = 0x00007F00 /* Sram0, 32K */ - sram1 (W!RX) : ORIGIN = 0x20080000, LENGTH = 0x00004000 /* Sram1, 16K */ - psram (W!RX) : ORIGIN = 0x60000000, LENGTH = 0x00100000 /* PSRAM, 1M */ -} - -SECTIONS -{ - .fixed : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) - *(.text*) - *(.rodata*) - *(.glue_7) - *(.glue_7t) - *(.data) - . = ALIGN(4); - _efixed = .; /* End of text section */ - } >psram - - .relocate : AT (_efixed) - { - . = ALIGN(4); - _srelocate = .; - *(.ramfunc); - . = ALIGN(4); - _erelocate = .; - } >sram0 - - .bss (NOLOAD) : { - . = ALIGN(4); - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >psram - - /* Stack in the end of SRAM0 */ - _estack = 0x20007FFC; -} -end = .; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/psram.sct b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/psram.sct deleted file mode 100644 index 162f57b6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/psram.sct +++ /dev/null @@ -1,59 +0,0 @@ -; * ---------------------------------------------------------------------------- -; * ATMEL Microcontroller Software Support -; * ---------------------------------------------------------------------------- -; * Copyright (c) 2008, Atmel Corporation -; * -; * All rights reserved. -; * -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * -; * - Redistributions of source code must retain the above copyright notice, -; * this list of conditions and the disclaimer below. -; * -; * Atmel's name may not be used to endorse or promote products derived from -; * this software without specific prior written permission. -; * -; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR -; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE -; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, -; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, -; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -; * ---------------------------------------------------------------------------- - -; *------------------------------------------------------------------------------ -; * Linker scatter for running in internal SRAM on the AT91SAM3U4 -; *----------------------------------------------------------------------------*/ - -; /* vector is put at very begin adress of SRAM0, the preserved size is 0x100 */ -Load_region 0x60000000 0x100000 -{ - ; PSRAM 1M - Vector_region 0x60000000 - { - board_cstartup_keil.o (vectors, +FIRST) - } - - Fixed_region +0 - { - .ANY (+RO) - .ANY (+RW +ZI) - } - - ; SRAM0 32K - IVector_region 0x20000000 0x100 {} - - ; Configure Stack and Heap - ARM_LIB_HEAP 0x20007000 EMPTY 0x400 - { - } - - ARM_LIB_STACK 0x20007FFC EMPTY -0x400 - { - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/sram.icf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/sram.icf deleted file mode 100644 index 242942af..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/sram.icf +++ /dev/null @@ -1,33 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ -/*-Vector table start*/ -define symbol __ICFEDIT_vector_start__ = 0x20000000; -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000; -define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF; -define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000; -define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF; -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x400; -define symbol __ICFEDIT_size_heap__ = 0x200; -/*-Exports-*/ -export symbol __ICFEDIT_vector_start__; -/**** End of ICF editor section. ###ICF###*/ - -define memory mem with size = 4G; -define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__]; -define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; -/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] | - mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ - -/* define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { }; */ -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - -initialize by copy { readwrite }; -do not initialize { section .noinit }; - -place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; -place in RAM0_region { readonly }; -place in RAM1_region { readwrite, block CSTACK, block HEAP }; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/sram.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/sram.lds deleted file mode 100644 index 12029473..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/sram.lds +++ /dev/null @@ -1,84 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal SRAM on the AT91SAM3U4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(ResetException) - -/* Vector Definition */ -_vect_start = 0x20000000; - -/* Memory Spaces Definitions */ -MEMORY -{ - sram0 (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x00008000 /* Sram0, 32K */ - sram1 (W!RX) : ORIGIN = 0x20080000, LENGTH = 0x00004000 /* Sram1, 16K */ -} - -SECTIONS -{ - .fixed : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) - *(.text*) - *(.ramfunc) - *(.rodata*) - *(.glue_7) - *(.glue_7t) - . = ALIGN(4); - _efixed = .; /* End of text section */ - } > sram0 - - .relocate : AT (_efixed) - { - . = ALIGN(4); - _srelocate = .; - *(.data) - . = ALIGN(4); - _erelocate = .; - } >sram1 - - .bss (NOLOAD) : { - . = ALIGN(4); - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >sram1 - - /* Stack in the end of SRAM1 */ - _estack = 0x20083FFC; -} -end = .; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/sram.sct b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/sram.sct deleted file mode 100644 index f279cf79..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/sram.sct +++ /dev/null @@ -1,60 +0,0 @@ -; * ---------------------------------------------------------------------------- -; * ATMEL Microcontroller Software Support -; * ---------------------------------------------------------------------------- -; * Copyright (c) 2008, Atmel Corporation -; * -; * All rights reserved. -; * -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * -; * - Redistributions of source code must retain the above copyright notice, -; * this list of conditions and the disclaimer below. -; * -; * Atmel's name may not be used to endorse or promote products derived from -; * this software without specific prior written permission. -; * -; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR -; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE -; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, -; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, -; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -; * ---------------------------------------------------------------------------- - -; *------------------------------------------------------------------------------ -; * Linker scatter for running in internal SRAM on the AT91SAM3U4 -; *----------------------------------------------------------------------------*/ - -Load_region 0x20000000 0x8000 -{ - ; RAM0 32K - Vector_region 0x20000000 0x100 - { - board_cstartup_keil.o (vectors, +FIRST) - } - - Fixed_region +0 - { - .ANY (+RO) - } - - ; RAM1 16K - Relocate_region 0x20080000 0x4000 - { - .ANY (+RW +ZI) - } - - ; Configure Stack and Heap - ARM_LIB_HEAP 0x20083000 EMPTY 0x400 - { - } - - ARM_LIB_STACK 0x20083FFC EMPTY -0x400 - { - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/sram_samba.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/sram_samba.lds deleted file mode 100644 index 226b4595..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/at91sam3u4/sram_samba.lds +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal SRAM on the AT91SAM3U4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(entry) - -/* Memory Spaces Definitions */ -MEMORY -{ - romcodesram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x01000 - sram0 (W!RX) : ORIGIN = 0x20001000, LENGTH = 0x00007000 /* Sram0, 32K */ -} - -/* Entry point */ -/*ENTRY (ResetException)*/ - -SECTIONS -{ - /* startup code in the .isr_vector */ - .text : - { - . = ALIGN(4); - _stext = .; - KEEP(*(.isr_vector .isr_vector.*)) - *(.mailbox) - *(.text .text.*) - *(.rodata .rodata.*) - *(.glue_7) - *(.glue_7t) - *(.gcc_except_table) - *(.rodata .rodata*) - *(.gnu.linkonce.r.*) - . = ALIGN(4); - _etext = .; - } > sram0 - - /* data */ - .data : - { - . = ALIGN(4); - _sidata = .; - _sdata = .; - - *(.data) - *(.data.*) - . = ALIGN(4); - _edata = .; - } > sram0 - - .bss (NOLOAD) : { - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >sram0 - - /* Stack in SRAM0 */ - _sstack = 0x20008000; -} -end = .; - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board.h deleted file mode 100644 index 766ae474..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board.h +++ /dev/null @@ -1,665 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/** - * \page sam3s_ek_board_desc "SAM3S-EK - Board Description" - * - * \section - * A file is dedicated to descibe the AT91SAM3S-EK board. - * - * \section Contents - * - The code for booting the board is provided by board_cstartup.S and - * board_lowlevel.c. - * - For using board PIOs, board characteristics (clock, etc.) and external - * components, see board.h. - * - For manipulating memories (remapping, SDRAM, etc.), see board_memories.h. - * - * To get more software details and the full list of parameters related to the - * SAM3S-EK board configuration, please have a look at the source file: \n - * \ref board.h\n - * - * This file can be used as a template and modified to fit a custom board, with - * specific PIOs usage or memory connections. - **/ -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -/// \file board.h -/// -/// \par Purpose -/// -/// Definition of AT91SAM3S-EK characteristics, AT91SAM3S-dependant PIOs and -/// external components interfacing. -/// -/// \par Usage -/// -# For operating frequency information, see "SAM3S-EK - Operating frequencies". -/// -# For using portable PIO definitions, see "SAM3S-EK - PIO definitions". -/// -# Several USB definitions are included here (see "SAM3S-EK - USB device"). -//------------------------------------------------------------------------------ - -#ifndef BOARD_H -#define BOARD_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */ -#include -#include - -#if defined(at91sam3s4) - #include "at91sam3s4/chip.h" - #include "at91sam3s4/AT91SAM3S4.h" -#else - #error Board does not support the specified chip. -#endif - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \par -/// This page lists several definition related to the board description. -/// -/// Definitions -/// - BOARD_NAME - -/// Name of the board. -#define BOARD_NAME "AT91SAM3S-EK" -/// Board definition. -#define at91sam3sek -/// Family definition (already defined). -#define at91sam3s -/// Core definition -#define cortexm3 - -//#define BOARD_REV_A -#define BOARD_REV_B - -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \par sam3s_ek_opfreq "SAM3S-EK - Operating frequencies" -/// This page lists several definition related to the board operating frequency -/// (when using the initialization done by board_lowlevel.c). -/// -/// !Definitions -/// - BOARD_MAINOSC -/// - BOARD_MCK - -/// Frequency of the board main oscillator. -#define BOARD_MAINOSC 12000000 - -/// Master clock frequency (when using board_lowlevel.c). -//#define BOARD_MCK 48000000 -#define BOARD_MCK 64000000 - -//------------------------------------------------------------------------------ -// ADC -//------------------------------------------------------------------------------ - -/// Startup time max, return from Idle mode (in µs) -#define ADC_STARTUP_TIME_MAX 15 -/// Track and hold Acquisition Time min (in ns) -#define ADC_TRACK_HOLD_TIME_MIN 1200 - -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// USB attributes configuration descriptor (bus or self powered, remote wakeup) -//#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP -#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \par sam3s_ek_piodef "SAM3S-EK - PIO definitions" -/// This pages lists all the pio definitions contained in board.h. The constants -/// are named using the following convention: PIN_* for a constant which defines -/// a single Pin instance (but may include several PIOs sharing the same -/// controller), and PINS_* for a list of Pin instances. -/// -/// !ADC -/// - PIN_ADC0_AD0 -/// - PIN_ADC0_AD1 -/// - PIN_ADC0_AD2 -/// - PIN_ADC0_AD3 -/// - PIN_ADC0_AD4 -/// - PIN_ADC0_AD5 -/// - PIN_ADC0_AD6 -/// - PIN_ADC0_AD7 -/// - PINS_ADC0 -/// -/// !UART -/// - PINS_UART -/// -/// !EBI -/// - PIN_EBI_DATA_BUS -/// - PIN_EBI_NCS0 -/// - PIN_EBI_NRD -/// - PIN_EBI_NWE -/// - PIN_EBI_ADDR_BUS -/// - PIN_EBI_PSRAM_NBS -/// - PIN_EBI_A1 -/// - PIN_EBI_LCD_RS -/// -/// !LEDs -/// - PIN_LED_0 -/// - PIN_LED_1 -/// - PIN_LED_2 -/// - PINS_LEDS -/// -/// !MCI -/// - PINS_MCI -/// -/// !Push buttons -/// - PIN_PUSHBUTTON_1 -/// - PIN_PUSHBUTTON_2 -/// - PINS_PUSHBUTTONS -/// - PUSHBUTTON_BP1 -/// - PUSHBUTTON_BP2 -/// -/// !PWMC -/// - PIN_PWMC_PWMH0 -/// - PIN_PWMC_PWML0 -/// - PIN_PWMC_PWMH1 -/// - PIN_PWMC_PWML1 -/// - PIN_PWMC_PWMH2 -/// - PIN_PWMC_PWML2 -/// - PIN_PWMC_PWMH3 -/// - PIN_PWMC_PWML3 -/// - PIN_PWM_LED0 -/// - PIN_PWM_LED1 -/// - PIN_PWM_LED2 -/// - CHANNEL_PWM_LED0 -/// - CHANNEL_PWM_LED1 -/// - CHANNEL_PWM_LED2 -/// -/// !SPI -/// - PIN_SPI_MISO -/// - PIN_SPI_MOSI -/// - PIN_SPI_SPCK -/// - PINS_SPI -/// - PIN_SPI_NPCS0_PA11 -/// -/// ! SSC -/// - PIN_SSC_TD -/// - PIN_SSC_TK -/// - PIN_SSC_TF -/// - PINS_SSC_CODEC -/// -/// ! PCK0 -/// - PIN_PCK0 -/// -/// !TWI -/// - PIN_TWI_TWD0 -/// - PIN_TWI_TWCK0 -/// - PINS_TWI -/// -/// !USART0 -/// - PIN_USART0_RXD -/// - PIN_USART0_TXD -/// - PIN_USART0_CTS -/// - PIN_USART0_RTS -/// - PIN_USART0_SCK -/// -/// !USB -/// - PIN_USB_PULLUP -/// - -/// ADC_AD0 pin definition. -#define PIN_ADC0_AD0 {1 << 21, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD1 pin definition. -#define PIN_ADC0_AD1 {1 << 30, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD2 pin definition. -#define PIN_ADC0_AD2 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD3 pin definition. -#define PIN_ADC0_AD3 {1 << 4, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD4 pin definition. -#define PIN_ADC0_AD4 {1 << 15, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD5 pin definition. -#define PIN_ADC0_AD5 {1 << 16, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD6 pin definition. -#define PIN_ADC0_AD6 {1 << 17, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD7 pin definition. -#define PIN_ADC0_AD7 {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} - -/// Pins ADC -#define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7 - -/** UART pins (UTXD0 and URXD0) definitions, PA9,10. */ -#define PINS_UART {0x00000600, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} - -/// EBI -#define PIN_EBI_DATA_BUS {0xFF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_NRD {1 << 11, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_NWE {1 << 8, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} - -#define PIN_EBI_NCS0 {1 << 20, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_PSRAM_ADDR_BUS {0x3f00fff, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_PSRAM_NBS {1 << 7, PIOB, ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}, \ - {1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_A1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} - -#define PIN_EBI_NCS1 {1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD CS pin */ -#define PIN_EBI_LCD_RS {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD RS pin */ - -#ifdef BOARD_REV_A -/** LED #0 pin definition. */ -#define PIN_LED_0 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} -/** LED #1 pin definition. */ -#define PIN_LED_1 {1 << 21, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} -/** LED #2 pin definition. */ -#define PIN_LED_2 {1 << 22, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} -#endif -#ifdef BOARD_REV_B -/** LED #0 pin definition. */ -#define PIN_LED_0 {1 << 19, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} -/** LED #1 pin definition. */ -#define PIN_LED_1 {1 << 20, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} -/** LED #2 pin definition. */ -#define PIN_LED_2 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} -#endif - -/** List of all LEDs definitions. */ -#define PINS_LEDS PIN_LED_0, PIN_LED_1, PIN_LED_2 - -/// MCI pins definition. -#define PINS_MCI {0x1f8, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}, \ - {1 << 3, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} - -/// MCI pin Card Detect -#define PIN_MCI_CD \ - {AT91C_PIO_PA25, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP} - -/** Push button #0 definition. Attributes = pull-up + debounce + interrupt on rising edge. */ -#define PIN_PUSHBUTTON_1 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE} -/** Push button #1 definition. Attributes = pull-up + debounce + interrupt on falling edge. */ -#define PIN_PUSHBUTTON_2 {1 << 12, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE} -/** List of all push button definitions. */ -#define PINS_PUSHBUTTONS PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2 - -/** Push button #1 index. */ -#define PUSHBUTTON_BP1 0 -/** Push button #2 index. */ -#define PUSHBUTTON_BP2 1 - -/// Simulated joystick LEFT index. -#define JOYSTICK_LEFT 0 -/// Simulated joystick RIGHT index. -#define JOYSTICK_RIGHT 1 - -/** PWMC PWM0 pin definition. */ -#define PIN_PWMC_PWMH0 {1 << 18, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} -#define PIN_PWMC_PWML0 {1 << 19, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} -/** PWMC PWM1 pin definition. */ -#define PIN_PWMC_PWMH1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} -#define PIN_PWMC_PWML1 {1 << 20, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} -/** PWMC PWM2 pin definition. */ -#define PIN_PWMC_PWMH2 {1 << 20, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} -#define PIN_PWMC_PWML2 {1 << 16, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT} -/** PWMC PWM3 pin definition. */ -#define PIN_PWMC_PWMH3 {1 << 21, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} -#define PIN_PWMC_PWML3 {1 << 15, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT} -/** PWM pin definition for LED0 */ -#define PIN_PWM_LED0 PIN_PWMC_PWMH0, PIN_PWMC_PWML0 -/** PWM pin definition for LED1 */ -#define PIN_PWM_LED1 PIN_PWMC_PWMH2, PIN_PWMC_PWML2 -/** PWM pin definition for LED2 */ -#define PIN_PWM_LED2 PIN_PWMC_PWMH3, PIN_PWMC_PWML3 -/** PWM channel for LED0 */ -#define CHANNEL_PWM_LED0 0 -/** PWM channel for LED1 */ -#define CHANNEL_PWM_LED1 2 -/** PWM channel for LED2 */ -#define CHANNEL_PWM_LED2 3 - -/** SPI MISO pin definition. */ -#define PIN_SPI_MISO {1 << 12, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -/** SPI MOSI pin definition. */ -#define PIN_SPI_MOSI {1 << 13, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -/** SPI SPCK pin definition. */ -#define PIN_SPI_SPCK {1 << 14, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -/** SPI chip select pin definition. */ -#define PIN_SPI_NPCS0_PA11 {1 << 11, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -/** List of SPI pin definitions (MISO, MOSI & SPCK). */ -#define PINS_SPI PIN_SPI_MISO, PIN_SPI_MOSI, PIN_SPI_SPCK - -/// SSC pins definition. -#define PIN_SSC_TD {0x1 << 26, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_SSC_TK {0x1 << 28, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_SSC_TF {0x1 << 30, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PINS_SSC_CODEC PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF - -/// PCK0 -#define PIN_PCK0 {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} - -/// TWI pins definition. -#define TWI_V3XX -#define PIN_TWI_TWD0 {0x1 << 9, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_TWI_TWCK0 {0x1 << 10, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PINS_TWI0 PIN_TWI_TWD0, PIN_TWI_TWCK0 -#define PIN_TWI_TWD1 {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_TWI_TWCK1 {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PINS_TWI1 PIN_TWI_TWD1, PIN_TWI_TWCK1 - -/// USART0 -#define PIN_USART0_RXD {0x1 << 19, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART0_TXD {0x1 << 18, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART0_CTS {0x1 << 8, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART0_RTS {0x1 << 7, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART0_SCK {0x1 << 17, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} - -/// USART1 -#define PIN_USART1_RXD {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART1_TXD {0x1 << 22, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART1_CTS {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART1_RTS {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART1_EN {0x1 << 23, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} - - - -/// USB VBus monitoring pin definition. -#ifdef BOARD_REV_A -#define PIN_USB_VBUS {1 << 23, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} -#endif -#ifdef BOARD_REV_B -#define PIN_USB_VBUS {1 << 21, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} -#endif - -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \par sam3s_ek_extcomp "SAM3S-EK - External components" -/// This page lists the definitions related to external on-board components -/// located in the board.h file for the AT91SAM3S-EK. -/// -/// !AT45 Dataflash Card -/// - BOARD_AT45_A_SPI_BASE -/// - BOARD_AT45_A_SPI_ID -/// - BOARD_AT45_A_SPI_PINS -/// - BOARD_AT45_A_SPI -/// - BOARD_AT45_A_NPCS -/// - BOARD_AT45_A_NPCS_PIN -/// -/// !AT45 Dataflash (serial onboard DataFlash) -/// - BOARD_AT45_B_SPI_BASE -/// - BOARD_AT45_B_SPI_ID -/// - BOARD_AT45_B_SPI_PINS -/// - BOARD_AT45_B_SPI -/// - BOARD_AT45_B_NPCS -/// - BOARD_AT45_B_NPCS_PIN -/// -/// !AT26 Serial Flash -/// - BOARD_AT26_A_SPI_BASE -/// - BOARD_AT26_A_SPI_ID -/// - BOARD_AT26_A_SPI_PINS -/// - BOARD_AT26_A_SPI -/// - BOARD_AT26_A_NPCS -/// - BOARD_AT26_A_NPCS_PIN -/// -/// !SD Card -/// - MCI2_INTERFACE -/// - BOARD_SD_MCI_BASE -/// - BOARD_SD_MCI_ID -/// - BOARD_SD_PINS -/// - BOARD_SD_SLOT -/// -/// !PSRAM -/// - BOARD_PSRAM_PINS -/// -/// !LCD -/// - BOARD_LCD_ILI9325 -/// - BOARD_LCD_PINS -/// - BOARD_BACKLIGHT_PIN -/// - BOARD_LCD_BASE -/// - BOARD_LCD_RS -/// - BOARD_LCD_WIDTH -/// - BOARD_LCD_HEIGHT -/// -/// !TouchScreen -/// - BOARD_TSC_ADS7843 -/// - PIN_TCS_IRQ -/// - PIN_TCS_BUSY -/// - BOARD_TSC_SPI_BASE -/// - BOARD_TSC_SPI_ID -/// - BOARD_TSC_SPI_PINS -/// - BOARD_TSC_NPCS -/// - BOARD_TSC_NPCS_PIN -/// -/// Base address of SPI peripheral connected to the dataflash. -//#define BOARD_AT45_A_SPI_BASE SPI0 -///// Identifier of SPI peripheral connected to the dataflash. -//#define BOARD_AT45_A_SPI_ID ID_SPI0 -///// Pins of the SPI peripheral connected to the dataflash. -//#define BOARD_AT45_A_SPI_PINS PINS_SPI0 -///// Dataflahs SPI number. -//#define BOARD_AT45_A_SPI 0 -///// Chip select connected to the dataflash. -//#define BOARD_AT45_A_NPCS 3 -///// Chip select pin connected to the dataflash. -//#define BOARD_AT45_A_NPCS_PIN PIN_SPI0_NPCS3 - -/// Base address of SPI peripheral connected to the dataflash. -//#define BOARD_AT45_B_SPI_BASE SPI1 -///// Identifier of SPI peripheral connected to the dataflash. -//#define BOARD_AT45_B_SPI_ID ID_SPI1 -///// Pins of the SPI peripheral connected to the dataflash. -//#define BOARD_AT45_B_SPI_PINS PINS_SPI1 -///// Dataflahs SPI number. -//#define BOARD_AT45_B_SPI 1 -///// Chip select connected to the dataflash. -//#define BOARD_AT45_B_NPCS 3 -///// Chip select pin connected to the dataflash. -//#define BOARD_AT45_B_NPCS_PIN PIN_SPI1_NPCS3 - -/// Base address of SPI peripheral connected to the serialflash. -//#define BOARD_AT26_A_SPI_BASE SPI0 -///// Identifier of SPI peripheral connected to the serialflash. -//#define BOARD_AT26_A_SPI_ID ID_SPI0 -///// Pins of the SPI peripheral connected to the serialflash. -//#define BOARD_AT26_A_SPI_PINS PINS_SPI0 -///// Serialflash SPI number. -//#define BOARD_AT26_A_SPI 0 -///// Chip select connected to the serialflash. -//#define BOARD_AT26_A_NPCS 3 -///// Chip select pin connected to the serialflash. -//#define BOARD_AT26_A_NPCS_PIN PIN_SPI0_NPCS3 - -/// ISO7816 -/// - PIN_SMARTCARD_CONNECT -/// - PIN_ISO7816_RSTMC -/// - PINS_ISO7816 - -/// Smartcard detection pin -//#define PIN_SMARTCARD_CONNECT {1 << 5, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT} -/// PIN used for reset the smartcard -//#define PIN_ISO7816_RSTMC {1 << 7, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} -/// Pins used for connect the smartcard -//#define PINS_ISO7816 PIN_USART0_TXD, PIN_USART0_SCK, PIN_ISO7816_RSTMC - -/// Dma channel number -#define BOARD_MCI_DMA_CHANNEL 0 -/// MCI0 DMA hardware handshaking ID -#define DMA_HW_SRC_REQ_ID_MCI0 AT91C_HDMA_SRC_PER_0 -#define DMA_HW_DEST_REQ_ID_MCI0 AT91C_HDMA_DST_PER_0 -/// MCI1 DMA hardware handshaking ID -#define DMA_HW_SRC_REQ_ID_MCI1 AT91C_HDMA_SRC_PER_13 -#define DMA_HW_DEST_REQ_ID_MCI1 AT91C_HDMA_DST_PER_13 -/// SD DMA hardware handshaking ID -#define BOARD_SD_DMA_HW_SRC_REQ_ID DMA_HW_SRC_REQ_ID_MCI0 -#define BOARD_SD_DMA_HW_DEST_REQ_ID DMA_HW_DEST_REQ_ID_MCI0 - - -/// HS MCI interface -#define MCI2_INTERFACE -/// Base address of the MCI peripheral connected to the SD card. -#define BOARD_SD_MCI_BASE MCI0//MCI -///// Peripheral identifier of the MCI connected to the SD card. -#define BOARD_SD_MCI_ID ID_MCI0 //ID_MCI -///// MCI pins that shall be configured to access the SD card. -#define BOARD_SD_PINS PINS_MCI -///// MCI slot to which the SD card is connected to. -#define BOARD_SD_SLOT MCI_SD_SLOTA -///// MCI Card Detect pin. -#define BOARD_SD_PIN_CD PIN_MCI_CD - -//#define BOARD_PSRAM_PINS PIN_EBI_DATA_BUS, PIN_EBI_NCS0, PIN_EBI_NRD, PIN_EBI_NWE, \ - PIN_EBI_PSRAM_ADDR_BUS, PIN_EBI_PSRAM_NBS, PIN_EBI_A1 - -/** Indicates board has an ILI9325 external component to manage LCD. */ -#define BOARD_LCD_ILI9325 - -/** LCD pins definition. */ -#define BOARD_LCD_PINS PIN_EBI_DATA_BUS, PIN_EBI_NRD, PIN_EBI_NWE, \ - PIN_EBI_NCS1, PIN_EBI_LCD_RS -/** Backlight pin definition. */ -#define BOARD_BACKLIGHT_PIN {1 << 13, PIOC, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT} -/** Define ILI9325 base address. */ -#define BOARD_LCD_BASE 0x61000000 -/** Define ILI9325 register select signal. */ -#define BOARD_LCD_RS (1 << 1) -/** Display width in pixels. */ -#define BOARD_LCD_WIDTH 240 -/** Display height in pixels. */ -#define BOARD_LCD_HEIGHT 320 - -/** Indicates board has an ADS7843 external component to manage Touch Screen */ -#define BOARD_TSC_ADS7843 - -#ifdef BOARD_REV_A -/** Touchscreen controller IRQ pin definition. */ -#define PIN_TCS_IRQ {PIO_PA4, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE} -#define PIN_TCS_IRQ_WUP_ID (1 << 3) -/** Touchscreen controller Busy pin definition. */ -#define PIN_TCS_BUSY {PIO_PA5, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP} -#endif -#ifdef BOARD_REV_B -/** Touchscreen controller IRQ pin definition. */ -#define PIN_TCS_IRQ {PIO_PA16, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE} -#define PIN_TCS_IRQ_WUP_ID (1 << 15) -/** Touchscreen controller Busy pin definition. */ -#define PIN_TCS_BUSY {PIO_PA17, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP} -#endif - -/** Base address of SPI peripheral connected to the touchscreen controller. */ -#define BOARD_TSC_SPI_BASE SPI -/** Identifier of SPI peripheral connected to the touchscreen controller. */ -#define BOARD_TSC_SPI_ID ID_SPI -/** Pins of the SPI peripheral connected to the touchscreen controller. */ -#define BOARD_TSC_SPI_PINS PINS_SPI -/** Chip select connected to the touchscreen controller. */ -#define BOARD_TSC_NPCS 0 -/** Chip select pin connected to the touchscreen controller. */ -#define BOARD_TSC_NPCS_PIN PIN_SPI_NPCS0_PA11 - -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \par sam3s_ek_mem "SAM3S-EK - Memories" -/// This page lists definitions related to internal & external on-board memories. -/// -/// !Embedded Flash -/// - BOARD_FLASH_EFC - -/// Internal SRAM address -#define AT91C_ISRAM AT91C_IRAM -#define AT91C_ISRAM_SIZE 0x00008000 - -#define AT91C_IFLASH_SIZE (0x40000) -#define AT91C_IFLASH_PAGE_SIZE (256) // Internal FLASH 0 Page Size: 256 bytes -#define AT91C_IFLASH_NB_OF_PAGES (1024) // Internal FLASH 0 Number of Pages: 512 -#define AT91C_IFLASH_LOCK_REGION_SIZE (16384) // Internal FLASH 0 Lock Region Size: 16 Kbytes -#define AT91C_IFLASH_NB_OF_LOCK_BITS (16) // Internal FLASH 0 Number of Lock Bits: 16 - -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -/// \section sam3s_ek_extcomp "SAM3S-EK - External components" -/// This page lists the definitions related to external on-board components -/// located in the board.h file for the SAM3S-EK. -/// -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \par sam3s_ek_chipdef "SAM3S-EK - Individual chip definition" -/// This page lists the definitions related to different chip's definition -/// located in the board.h file for the SAM3S-EK. - -/// DBGU -#define BOARD_DBGU_ID ID_DBGU - -/// Rtc -#define BOARD_RTC_ID ID_RTC - -/// Twi eeprom -#define BOARD_ID_TWI_EEPROM ID_TWI1 -#define BOARD_BASE_TWI_EEPROM TWI1 -#define BOARD_PINS_TWI_EEPROM PINS_TWI1 - -/// USART -#define BOARD_PIN_USART_RXD PIN_USART1_RXD -#define BOARD_PIN_USART_TXD PIN_USART1_TXD -#define BOARD_PIN_USART_CTS PIN_USART1_CTS -#define BOARD_PIN_USART_RTS PIN_USART1_RTS -#define BOARD_PIN_USART_EN PIN_USART1_EN -#define BOARD_USART_BASE USART1 -#define BOARD_ID_USART ID_USART1 - -//------------------------------------------------------------------------------ - - -#define PIN_EBI_NANDOE {1 << 9, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_NANDWE {1 << 10, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_NANDCLE {1 << 17, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_NANDALE {1 << 16, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_NANDIO {0x000000FF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} - -/// Nandflash chip enable pin definition. -#define BOARD_NF_CE_PIN {1 << 14, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} -/// Nandflash ready/busy pin definition. -#define BOARD_NF_RB_PIN {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP} - -/// Nandflash controller peripheral pins definition. -#define PINS_NANDFLASH PIN_EBI_NANDIO, BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, \ - PIN_EBI_NANDWE, PIN_EBI_NANDCLE, PIN_EBI_NANDALE - -/// Address for transferring command bytes to the nandflash. -#define BOARD_NF_COMMAND_ADDR 0x60400000 -/// Address for transferring address bytes to the nandflash. -#define BOARD_NF_ADDRESS_ADDR 0x60200000 -/// Address for transferring data bytes to the nandflash. -#define BOARD_NF_DATA_ADDR 0x60000000 - -#endif //#ifndef BOARD_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_cstartup_gnu.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_cstartup_gnu.c deleted file mode 100644 index 632cdaca..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_cstartup_gnu.c +++ /dev/null @@ -1,172 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" -#include "exceptions.h" -#include "board_lowlevel.h" - -#include - -/*---------------------------------------------------------------------------- - * Exported variables - *----------------------------------------------------------------------------*/ - -/* Stack top */ -extern uint32_t _estack; - -/* Initialize segments */ -extern uint32_t _sfixed; -extern uint32_t _sfixed; -extern uint32_t _efixed; -extern uint32_t _srelocate; -extern uint32_t _erelocate; -extern uint32_t _szero; -extern uint32_t _ezero; - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/* The mask of VTOR register */ -#define SCB_VTOR_MASK 0x3FFFFFF8 - -/*---------------------------------------------------------------------------- - * ProtoTypes - *----------------------------------------------------------------------------*/ - -extern int main(void); -void ResetException(void); - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/* Exception Table */ -__attribute__((section(".vectors"))) -IntFunc exception_table[] = { - - /* Configure Initial Stack Pointer, using linker-generated symbols */ - (IntFunc)&_estack, - ResetException, - - NMI_Handler, - HardFault_Handler, - MemManage_Handler, - BusFault_Handler, - UsageFault_Handler, - 0, 0, 0, 0, /* Reserved */ - SVC_Handler, - DebugMon_Handler, - 0, /* Reserved */ - PendSV_Handler, - SysTick_Handler, - - /* Configurable interrupts */ - SUPC_IrqHandler, /* 0 Supply Controller */ - RSTC_IrqHandler, /* 1 Reset Controller */ - RTC_IrqHandler, /* 2 Real Time Clock */ - RTT_IrqHandler, /* 3 Real Time Timer */ - WDT_IrqHandler, /* 4 Watchdog Timer */ - PMC_IrqHandler, /* 5 PMC */ - EEFC_IrqHandler, /* 6 EEFC */ - IrqHandlerNotUsed, /* 7 Reserved */ - UART0_IrqHandler, /* 8 UART0 */ - UART1_IrqHandler, /* 9 UART1 */ - SMC_IrqHandler, /* 10 SMC */ - PIOA_IrqHandler, /* 11 Parallel IO Controller A */ - PIOB_IrqHandler, /* 12 Parallel IO Controller B */ - PIOC_IrqHandler, /* 13 Parallel IO Controller C */ - USART0_IrqHandler, /* 14 USART 0 */ - USART1_IrqHandler, /* 15 USART 1 */ - IrqHandlerNotUsed, /* 16 Reserved */ - IrqHandlerNotUsed, /* 17 Reserved */ - MCI_IrqHandler, /* 18 MCI */ - TWI0_IrqHandler, /* 19 TWI 0 */ - TWI1_IrqHandler, /* 20 TWI 1 */ - SPI_IrqHandler, /* 21 SPI */ - SSC_IrqHandler, /* 22 SSC */ - TC0_IrqHandler, /* 23 Timer Counter 0 */ - TC1_IrqHandler, /* 24 Timer Counter 1 */ - TC2_IrqHandler, /* 25 Timer Counter 2 */ - TC3_IrqHandler, /* 26 Timer Counter 3 */ - TC4_IrqHandler, /* 27 Timer Counter 4 */ - TC5_IrqHandler, /* 28 Timer Counter 5 */ - ADC_IrqHandler, /* 29 ADC controller */ - DAC_IrqHandler, /* 30 DAC controller */ - PWM_IrqHandler, /* 31 PWM */ - CRCCU_IrqHandler, /* 32 CRC Calculation Unit */ - ACC_IrqHandler, /* 33 Analog Comparator */ - USBD_IrqHandler, /* 34 USB Device Port */ - IrqHandlerNotUsed /* 35 not used */ -}; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief This is the code that gets called on processor reset. - * To initialize the device, and call the main() routine. - */ -void ResetException(void) -{ - uint32_t *pSrc, *pDest; - - LowLevelInit(); - - /* Initialize the relocate segment */ - pSrc = &_efixed; - pDest = &_srelocate; - if (pSrc != pDest) { - for(; pDest < &_erelocate;) { - - *pDest++ = *pSrc++; - } - } - - /* Clear the zero segment */ - for(pDest = &_szero; pDest < &_ezero;) { - - *pDest++ = 0; - } - - /* Set the vector table base address */ - pSrc = (uint32_t *)&_sfixed; - SCB->VTOR = ((uint32_t)(pSrc)) & 0x2FFFFFF8; - - /* Branch to main function */ - main(); - - /* Infinite loop */ - while(1); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_cstartup_iar.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_cstartup_iar.c deleted file mode 100644 index fbfcca21..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_cstartup_iar.c +++ /dev/null @@ -1,143 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "board.h" -#include - -#include "exceptions.h" -#include "board_lowlevel.h" - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ -typedef union { IntFunc __fun; void * __ptr; } IntVector; - -/*------------------------------------------------------------------------------ - * ProtoTypes - *------------------------------------------------------------------------------*/ -extern void __iar_program_start( void ); - -int __low_level_init( void ); - -/*------------------------------------------------------------------------------ - * Variables - *------------------------------------------------------------------------------*/ -extern unsigned int __ICFEDIT_vector_start__; - - -/*------------------------------------------------------------------------------ - * Exception Table - *------------------------------------------------------------------------------*/ -#pragma language=extended -#pragma segment="CSTACK" - -/* The name "__vector_table" has special meaning for C-SPY: */ -/* it is where the SP start value is found, and the NVIC vector */ -/* table register (VTOR) is initialized to this address if != 0. */ - -#pragma section = ".vectors" -#pragma location = ".vectors" -const IntVector __vector_table[] = -{ - { .__ptr = __sfe( "CSTACK" ) }, - __iar_program_start, - - NMI_Handler, - HardFault_Handler, - MemManage_Handler, - BusFault_Handler, - UsageFault_Handler, - 0, 0, 0, 0, /* Reserved */ - SVC_Handler, - DebugMon_Handler, - 0, /* Reserved */ - PendSV_Handler, - SysTick_Handler, - - /* Configurable interrupts */ - SUPC_IrqHandler, /* 0 SUPPLY CONTROLLER */ - RSTC_IrqHandler, /* 1 RESET CONTROLLER */ - RTC_IrqHandler, /* 2 REAL TIME CLOCK */ - RTT_IrqHandler, /* 3 REAL TIME TIMER */ - WDT_IrqHandler, /* 4 WATCHDOG TIMER */ - PMC_IrqHandler, /* 5 PMC */ - EEFC_IrqHandler, /* 6 EEFC */ - IrqHandlerNotUsed, /* 7 Reserved */ - UART0_IrqHandler, /* 8 UART0 */ - UART1_IrqHandler, /* 9 UART1 */ - SMC_IrqHandler, /* 10 SMC */ - PIOA_IrqHandler, /* 11 Parallel IO Controller A */ - PIOB_IrqHandler, /* 12 Parallel IO Controller B */ - PIOC_IrqHandler, /* 13 Parallel IO Controller C */ - USART0_IrqHandler, /* 14 USART 0 */ - USART1_IrqHandler, /* 15 USART 1 */ - IrqHandlerNotUsed, /* 16 Reserved */ - IrqHandlerNotUsed, /* 17 Reserved */ - MCI_IrqHandler, /* 18 MCI */ - TWI0_IrqHandler, /* 19 TWI 0 */ - TWI1_IrqHandler, /* 20 TWI 1 */ - SPI_IrqHandler, /* 21 SPI */ - SSC_IrqHandler, /* 22 SSC */ - TC0_IrqHandler, /* 23 Timer Counter 0 */ - TC1_IrqHandler, /* 24 Timer Counter 1 */ - TC2_IrqHandler, /* 25 Timer Counter 2 */ - TC3_IrqHandler, /* 26 Timer Counter 3 */ - TC4_IrqHandler, /* 27 Timer Counter 4 */ - TC5_IrqHandler, /* 28 Timer Counter 5 */ - ADC_IrqHandler, /* 29 ADC controller */ - DAC_IrqHandler, /* 30 DAC controller */ - PWM_IrqHandler, /* 31 PWM */ - CRCCU_IrqHandler, /* 32 CRC Calculation Unit */ - ACC_IrqHandler, /* 33 Analog Comparator */ - USBD_IrqHandler, /* 34 USB Device Port */ - IrqHandlerNotUsed /* 35 not used */ -}; - -/*------------------------------------------------------------------------------ - * Exception Table - *------------------------------------------------------------------------------*/ - -/**------------------------------------------------------------------------------ - * This is the code that gets called on processor reset. To initialize the - * device. - *------------------------------------------------------------------------------*/ -int __low_level_init( void ) -{ - unsigned int * src = __section_begin(".vectors"); - - LowLevelInit(); - - SCB->VTOR = ((unsigned int)(src)) | (0x0 << 7); - - return 1; /* if return 0, the data sections will not be initialized. */ -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_cstartup_keil.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_cstartup_keil.c deleted file mode 100644 index aeb93586..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_cstartup_keil.c +++ /dev/null @@ -1,131 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ -#include "board.h" -#include "exceptions.h" -#include "board_lowlevel.h" - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Types -//------------------------------------------------------------------------------ -typedef union { IntFunc __fun; void * __ptr; } IrqVector; - -//------------------------------------------------------------------------------ -// ProtoTypes -//------------------------------------------------------------------------------ -extern int Image$$ARM_LIB_STACK$$ZI$$Limit; -extern int Image$$Vector_region$$Base; -extern int Image$$Vector_region$$Limit; - -extern void __main(void); -void resetHandler( void ); - -//------------------------------------------------------------------------------ -// Variables -//------------------------------------------------------------------------------ - -#pragma arm section rodata="vectors" -const IrqVector __vector_table[] = -{ - (IntFunc)&Image$$ARM_LIB_STACK$$ZI$$Limit, - resetHandler, - - NMI_Handler, - HardFault_Handler, - MemManage_Handler, - BusFault_Handler, - UsageFault_Handler, - 0, 0, 0, 0, // Reserved - SVC_Handler, - DebugMon_Handler, - 0, // Reserved - PendSV_Handler, - SysTick_Handler, - - // Configurable interrupts - SUPC_IrqHandler, // 0 SUPPLY CONTROLLER - RSTC_IrqHandler, // 1 RESET CONTROLLER - RTC_IrqHandler, // 2 REAL TIME CLOCK - RTT_IrqHandler, // 3 REAL TIME TIMER - WDT_IrqHandler, // 4 WATCHDOG TIMER - PMC_IrqHandler, // 5 PMC - EFC0_IrqHandler, // 6 EFC0 - EFC1_IrqHandler, // 7 EFC1 - DBGU_IrqHandler, // 8 DBGU - HSMC4_IrqHandler, // 9 HSMC4 - PIOA_IrqHandler, // 10 Parallel IO Controller A - PIOB_IrqHandler, // 11 Parallel IO Controller B - PIOC_IrqHandler, // 12 Parallel IO Controller C - USART0_IrqHandler, // 13 USART 0 - USART1_IrqHandler, // 14 USART 1 - USART2_IrqHandler, // 15 USART 2 - USART3_IrqHandler, // 16 USART 3 - MCI0_IrqHandler, // 17 Multimedia Card Interface - TWI0_IrqHandler, // 18 TWI 0 - TWI1_IrqHandler, // 19 TWI 1 - SPI0_IrqHandler, // 20 Serial Peripheral Interface - SSC0_IrqHandler, // 21 Serial Synchronous Controller 0 - TC0_IrqHandler, // 22 Timer Counter 0 - TC1_IrqHandler, // 23 Timer Counter 1 - TC2_IrqHandler, // 24 Timer Counter 2 - PWM_IrqHandler, // 25 Pulse Width Modulation Controller - ADCC0_IrqHandler, // 26 ADC controller0 - ADCC1_IrqHandler, // 27 ADC controller1 - HDMA_IrqHandler, // 28 HDMA - UDPD_IrqHandler, // 29 USB Device High Speed UDP_HS - IrqHandlerNotUsed // 30 not used -}; -#pragma arm section - -//------------------------------------------------------------------------------ -/// This is the code that gets called on processor reset. To initialize the -/// device. -//------------------------------------------------------------------------------ -void resetHandler( void ) -{ - unsigned int *pSrc = (unsigned int *)&Image$$Vector_region$$Base; - - // Low level Initialize - LowLevelInit(); - - AT91C_BASE_NVIC->NVIC_VTOFFR = ((unsigned int)(pSrc)) | (0x0 << 7); - - // Enter C library entry point - __main(); - - /* Infinite loop */ - while(1); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_lowlevel.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_lowlevel.c deleted file mode 100644 index 63ce7117..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_lowlevel.c +++ /dev/null @@ -1,141 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" -#include "board_memories.h" -#include "board_lowlevel.h" -#include - -/*---------------------------------------------------------------------------- - * Local definitions - *----------------------------------------------------------------------------*/ -/** Define clock timeout */ -#define CLOCK_TIMEOUT 5000 - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ -static void BOARD_ConfigurePmc(void) -{ - -#define AT91C_CKGR_MUL_SHIFT 16 -#define AT91C_CKGR_PLLCOUNT_SHIFT 8 -#define AT91C_CKGR_DIV_SHIFT 0 - -// Settings at 64 MHz for MCK - -#define BOARD_OSCOUNT (CKGR_MOR_MOSCXTST & (0x8 << 8)) - -// PLLA Settings 64 MHz : 12 / 3 * 32 -#define BOARD_PLLAR ((1 << 29) | (0x1F << AT91C_CKGR_MUL_SHIFT) \ - | (0x1 << AT91C_CKGR_PLLCOUNT_SHIFT) | (0x3 << AT91C_CKGR_DIV_SHIFT)) - -// PLLB Settings 96 MHz -#define BOARD_PLLBR ((1 << 29) | (0x7 << AT91C_CKGR_MUL_SHIFT) \ - | (0x1 << AT91C_CKGR_PLLCOUNT_SHIFT) | (0x1 << AT91C_CKGR_DIV_SHIFT)) - -// USB on PLLB, MCK/PCK on PLLA -#define BOARD_MCKR ( PMC_MCKR_PRES_CLK_2 | PMC_MCKR_CSS_PLLA_CLK) - -// Define clock timeout -#undef CLOCK_TIMEOUT -#define CLOCK_TIMEOUT 0xFFFFFFFF - - uint32_t timeout = 0; - - /* Enable NRST reset - ************************************/ - //AT91C_BASE_RSTC->RSTC_RMR |= AT91C_RSTC_URSTEN; - - /* Initialize main oscillator - ****************************/ - if(!(PMC->CKGR_MOR & CKGR_MOR_MOSCSEL)) - { - - PMC->CKGR_MOR = (0x37 << 16) | BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_MOSCXTS) && (timeout++ < CLOCK_TIMEOUT)); - - } - - /* Switch to 3-20MHz Xtal oscillator */ - PMC->CKGR_MOR = (0x37 << 16) | BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN | CKGR_MOR_MOSCSEL; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_MOSCSELS) && (timeout++ < CLOCK_TIMEOUT)); - PMC->PMC_MCKR = (PMC->PMC_MCKR & ~(uint32_t)PMC_MCKR_CSS) | PMC_MCKR_CSS_MAIN_CLK; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT)); - - /** Set 3 WS for Embedded Flash Access */ - EFC->EEFC_FMR = (3 << 8); - - /* Initialize PLLA */ - PMC->CKGR_PLLAR = BOARD_PLLAR; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_LOCKA) && (timeout++ < CLOCK_TIMEOUT)); - - /* Initialize PLLB */ - PMC->CKGR_PLLBR = BOARD_PLLBR; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_LOCKB) && (timeout++ < CLOCK_TIMEOUT)); - - // Set USB clock on PLLB - REG_PMC_USB = PMC_USB_USBS | (PMC_USB_USBDIV & (1 << 8)); - - /* Switch to fast clock - **********************/ - PMC->PMC_MCKR = (BOARD_MCKR & ~PMC_MCKR_CSS) | PMC_MCKR_CSS_MAIN_CLK; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT)); - - PMC->PMC_MCKR = BOARD_MCKR; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT)); - -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/*----------------------------------------------------------------------------*/ -/** - * \brief Performs the low-level initialization of the chip. This includes EFC, - * master clock and watchdog configuration. - */ -/*----------------------------------------------------------------------------*/ -void LowLevelInit (void) -{ - /** Configure PMC */ - BOARD_ConfigurePmc(); -} \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_lowlevel.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_lowlevel.h deleted file mode 100644 index c7effdf1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_lowlevel.h +++ /dev/null @@ -1,49 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !!!Purpose -/// -/// Collection of methods for lowlevel. -/// -//------------------------------------------------------------------------------ - -#ifndef BOARD_LOWLEVEL_H -#define BOARD_LOWLEVEL_H - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ -extern void LowLevelInit(void); -extern void OptimizeCpuSpeed(void); - -#endif // BOARD_LOWLEVEL_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_memories.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_memories.c deleted file mode 100644 index 6c224263..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_memories.c +++ /dev/null @@ -1,96 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/* - Title: Memories implementation -*/ -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include -#include "board_memories.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - - -/** - * \brief Configures the EBI for NandFlash access. - * - */ -extern void BOARD_ConfigureNandFlash( void ) -{ - // Open EBI clock - PMC->PMC_PCER0 = (1<< ID_SMC); - // NCS0 is assigned to a NAND Flash (NANDOE and NANWE used for NCS0) - MATRIX->CCFG_SMCNFCS = CCFG_SMCNFCS_SMC_NFCS0; - -#if 0 - SMC->SMC_CS_NUMBER[0].SMC_SETUP = 0 - | ((0 << 0) & SMC_SETUP0_NWE_SETUP) - | ((1 << 8) & SMC_SETUP0_NCS_WR_SETUP) - | ((0 << 16) & SMC_SETUP0_NRD_SETUP) - | ((1 << 24) & SMC_SETUP0_NCS_RD_SETUP); - - SMC->SMC_CS_NUMBER[0].SMC_PULSE = 0 - | ((2 << 0) & SMC_PULSE0_NWE_PULSE) - | ((3 << 8) & SMC_PULSE0_NCS_WR_PULSE) - | ((4 << 16) & SMC_PULSE0_NRD_PULSE) - | ((4 << 24) & SMC_PULSE0_NCS_RD_PULSE); - - SMC->SMC_CS_NUMBER[0].SMC_CYCLE = 0 - | ((4 << 0) & SMC_CYCLE0_NWE_CYCLE) - | ((7 << 16) & SMC_CYCLE0_NRD_CYCLE); - - SMC->SMC_CS_NUMBER[0].SMC_MODE = SMC_MODE0_READ_MODE | SMC_MODE0_WRITE_MODE; -#else - SMC->SMC_CS_NUMBER[0].SMC_SETUP = 0 - | ((0 << 0) & SMC_SETUP0_NWE_SETUP) - | ((0 << 8) & SMC_SETUP0_NCS_WR_SETUP) - | ((0 << 16) & SMC_SETUP0_NRD_SETUP) - | ((0 << 24) & SMC_SETUP0_NCS_RD_SETUP); - - SMC->SMC_CS_NUMBER[0].SMC_PULSE = 0 - | ((2 << 0) & SMC_PULSE0_NWE_PULSE) - | ((2 << 8) & SMC_PULSE0_NCS_WR_PULSE) - | ((2 << 16) & SMC_PULSE0_NRD_PULSE) - | ((2 << 24) & SMC_PULSE0_NCS_RD_PULSE); - - SMC->SMC_CS_NUMBER[0].SMC_CYCLE = 0 - | ((3 << 0) & SMC_CYCLE0_NWE_CYCLE) - | ((3 << 16) & SMC_CYCLE0_NRD_CYCLE); - - SMC->SMC_CS_NUMBER[0].SMC_MODE = SMC_MODE1_READ_MODE | SMC_MODE1_WRITE_MODE; -#endif - - - -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_memories.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_memories.h deleted file mode 100644 index b9f472ff..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/board_memories.h +++ /dev/null @@ -1,49 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// !Purpose -/// -/// -/// !Usage -/// -//------------------------------------------------------------------------------ - -#ifndef BOARD_MEMORIES_H -#define BOARD_MEMORIES_H - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -extern void BOARD_ConfigureNandFlash( void ) ; - -#endif //#ifndef BOARD_MEMORIES_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/exceptions.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/exceptions.c deleted file mode 100644 index b9b329bf..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/exceptions.c +++ /dev/null @@ -1,385 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * This file contains the default exception handlers. - * - * \note - * The exception handler has weak aliases. - * As they are weak aliases, any function with the same name will override - * this definition. - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "exceptions.h" -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Default interrupt handler for not used irq. - */ -void IrqHandlerNotUsed(void) -{ - while(1); -} - -/** - * \brief Default NMI interrupt handler. - */ -WEAK void NMI_Handler(void) -{ - while(1); -} - -/** - * \brief Default HardFault interrupt handler. - */ -WEAK void HardFault_Handler(void) -{ - while(1); -} - -/** - * \brief Default MemManage interrupt handler. - */ -WEAK void MemManage_Handler(void) -{ - while(1); -} - -/** - * \brief Default BusFault interrupt handler. - */ -WEAK void BusFault_Handler(void) -{ - while(1); -} - -/** - * \brief Default UsageFault interrupt handler. - */ -WEAK void UsageFault_Handler(void) -{ - while(1); -} - -/** - * \brief Default SVC interrupt handler. - */ -WEAK void SVC_Handler(void) -{ - while(1); -} - -/** - * \brief Default DebugMon interrupt handler. - */ -WEAK void DebugMon_Handler(void) -{ - while(1); -} - -/** - * \brief Default PendSV interrupt handler. - */ -WEAK void PendSV_Handler(void) -{ - while(1); -} - -/** - * \brief Default SysTick interrupt handler. - */ -WEAK void SysTick_Handler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for Supply Controller. - */ -WEAK void SUPC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for Reset Controller. - */ -WEAK void RSTC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for Real Time Clock. - */ -WEAK void RTC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for Real Time Timer. - */ -WEAK void RTT_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for Watchdog Timer. - */ -WEAK void WDT_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for PMC. - */ -WEAK void PMC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for EEFC. - */ -WEAK void EEFC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for UART0. - */ -WEAK void UART0_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for UART1. - */ -WEAK void UART1_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for SMC. - */ -WEAK void SMC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for PIOA Controller. - */ -WEAK void PIOA_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for PIOB Controller. - */ -WEAK void PIOB_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for PIOC Controller. - */ -WEAK void PIOC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for USART0. - */ -WEAK void USART0_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for USART1. - */ -WEAK void USART1_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for MCI. - */ -WEAK void MCI_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for TWI0. - */ -WEAK void TWI0_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for TWI1. - */ -WEAK void TWI1_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for SPI. - */ -WEAK void SPI_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for SSC. - */ -WEAK void SSC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for TC0. - */ -WEAK void TC0_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for TC1. - */ -WEAK void TC1_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for TC2. - */ -WEAK void TC2_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for TC3. - */ -WEAK void TC3_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for TC4. - */ -WEAK void TC4_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for TC5. - */ -WEAK void TC5_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for ADC. - */ -WEAK void ADC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for DAC. - */ -WEAK void DAC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for PWM. - */ -WEAK void PWM_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for CRCCU. - */ -WEAK void CRCCU_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for ACC. - */ -WEAK void ACC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for USBD. - */ -WEAK void USBD_IrqHandler(void) -{ - while(1); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/exceptions.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/exceptions.h deleted file mode 100644 index b6b366c6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/board/exceptions.h +++ /dev/null @@ -1,103 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * Interface for default exception handlers. - */ - -#ifndef EXCEPTIONS_H -#define EXCEPTIONS_H - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/* Function prototype for exception table items (interrupt handler). */ -typedef void( *IntFunc )( void ); - -/* Define WEAK attribute */ -#if defined ( __CC_ARM ) - #define WEAK __attribute__ ((weak)) -#elif defined ( __ICCARM__ ) - #define WEAK __weak -#elif defined ( __GNUC__ ) - #define WEAK __attribute__ ((weak)) -#endif - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void IrqHandlerNotUsed(void); - -extern WEAK void NMI_Handler( void ); -extern WEAK void HardFault_Handler( void ); -extern WEAK void MemManage_Handler( void ); -extern WEAK void BusFault_Handler( void ); -extern WEAK void UsageFault_Handler( void ); -extern WEAK void SVC_Handler( void ); -extern WEAK void DebugMon_Handler( void ); -extern WEAK void PendSV_Handler( void ); -extern WEAK void SysTick_Handler( void ); - -extern WEAK void SUPC_IrqHandler(void); -extern WEAK void RSTC_IrqHandler(void); -extern WEAK void RTC_IrqHandler(void); -extern WEAK void RTT_IrqHandler(void); -extern WEAK void WDT_IrqHandler(void); -extern WEAK void PMC_IrqHandler(void); -extern WEAK void EEFC_IrqHandler(void); -extern WEAK void UART0_IrqHandler(void); -extern WEAK void UART1_IrqHandler(void); -extern WEAK void SMC_IrqHandler(void); -extern WEAK void PIOA_IrqHandler(void); -extern WEAK void PIOB_IrqHandler(void); -extern WEAK void PIOC_IrqHandler(void); -extern WEAK void USART0_IrqHandler(void); -extern WEAK void USART1_IrqHandler(void); -extern WEAK void MCI_IrqHandler(void); -extern WEAK void TWI0_IrqHandler(void); -extern WEAK void TWI1_IrqHandler(void); -extern WEAK void SPI_IrqHandler(void); -extern WEAK void SSC_IrqHandler(void); -extern WEAK void TC0_IrqHandler(void); -extern WEAK void TC1_IrqHandler(void); -extern WEAK void TC2_IrqHandler(void); -extern WEAK void TC3_IrqHandler(void); -extern WEAK void TC4_IrqHandler(void); -extern WEAK void TC5_IrqHandler(void); -extern WEAK void ADC_IrqHandler(void); -extern WEAK void DAC_IrqHandler(void); -extern WEAK void PWM_IrqHandler(void); -extern WEAK void CRCCU_IrqHandler(void); -extern WEAK void ACC_IrqHandler(void); -extern WEAK void USBD_IrqHandler(void); - -#endif /* #ifndef EXCEPTIONS_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/demo.c deleted file mode 100644 index 0d4ea843..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/demo.c +++ /dev/null @@ -1,187 +0,0 @@ -/* - * FreeModbus Libary: Atmel AT91SAM3S Demo Application - * Copyright (C) 2010 Christian Walter - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * IF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - -/* ----------------------- AT91SAM3S includes -------------------------------*/ -#include -#include - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_INPUT_START ( 1000 ) -#define REG_INPUT_NREGS ( 64 ) - -#define REG_HOLDING_START ( 1 ) -#define REG_HOLDING_NREGS ( 32 ) - -/* ----------------------- Static functions ---------------------------------*/ -static void _SetupHardware( void ); - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; -static USHORT usRegHoldingStart = REG_HOLDING_START; -static USHORT usRegHoldingBuf[REG_HOLDING_NREGS]; - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - _SetupHardware( ); - - const UCHAR ucSlaveID[] = { 0xAA, 0xBB, 0xCC }; - eMBErrorCode eStatus; - - for( ;; ) - { - if( MB_ENOERR != ( eStatus = eMBInit( MB_RTU, 0x0A, 1, 38400, MB_PAR_EVEN ) ) ) - { - /* Can not initialize. Add error handling code here. */ - } - else - { - if( MB_ENOERR != ( eStatus = eMBSetSlaveID( 0x34, TRUE, ucSlaveID, 3 ) ) ) - { - /* Can not set slave id. Check arguments */ - } - else if( MB_ENOERR != ( eStatus = eMBEnable( ) ) ) - { - /* Enable failed. */ - } - else - { - usRegHoldingBuf[0] = 1; - do - { - ( void )eMBPoll( ); - - /* Here we simply count the number of poll cycles. */ - usRegInputBuf[0]++; - } - while( usRegHoldingBuf[0] ); - ( void )eMBDisable( ); - ( void )eMBClose( ); - } - } - } - return 1; -} - -void _SetupHardware( void ) -{ - WDT_Disable( ); - - uint32_t i = 0; - for( i = 0; i < 35; i++ ) - { - NVIC_SetPriority( (IRQn_Type)i, 0xF << 4 ) ; - } -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = - ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = - ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_HOLDING_START ) && ( usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegHoldingStart ); - switch ( eMode ) - { - case MB_REG_READ: - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegHoldingBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegHoldingBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - break; - - case MB_REG_WRITE: - while( usNRegs > 0 ) - { - usRegHoldingBuf[iRegIndex] = *pucRegBuffer++ << 8; - usRegHoldingBuf[iRegIndex] |= *pucRegBuffer++; - iRegIndex++; - usNRegs--; - } - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/demo.ewp b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/demo.ewp deleted file mode 100644 index 861dd43a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/demo.ewp +++ /dev/null @@ -1,1758 +0,0 @@ - - - - 2 - - Debug - - ARM - - 1 - - General - 3 - - 17 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 22 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 7 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 1 - - - - - - - - - CUSTOM - 3 - - - - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 9 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - - Release - - ARM - - 0 - - General - 3 - - 17 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 22 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 7 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - - - board - - $PROJ_DIR$\board\board_cstartup_iar.c - - - $PROJ_DIR$\board\board_lowlevel.c - - - $PROJ_DIR$\board\board_memories.c - - - $PROJ_DIR$\board\exceptions.c - - - - drivers - - $PROJ_DIR$\libraries\drivers\pio\pio.c - - - $PROJ_DIR$\libraries\drivers\pmc\pmc.c - - - $PROJ_DIR$\libraries\drivers\tc\tc.c - - - $PROJ_DIR$\libraries\drivers\usart\usart.c - - - $PROJ_DIR$\libraries\drivers\wdt\wdt.c - - - - modbus - - $PROJ_DIR$\..\..\modbus\mb.c - - - $PROJ_DIR$\..\..\modbus\include\mb.h - - - $PROJ_DIR$\..\..\modbus\ascii\mbascii.c - - - $PROJ_DIR$\..\..\modbus\ascii\mbascii.h - - - $PROJ_DIR$\..\..\modbus\include\mbconfig.h - - - $PROJ_DIR$\..\..\modbus\rtu\mbcrc.c - - - $PROJ_DIR$\..\..\modbus\rtu\mbcrc.h - - - $PROJ_DIR$\..\..\modbus\include\mbframe.h - - - $PROJ_DIR$\..\..\modbus\include\mbfunc.h - - - $PROJ_DIR$\..\..\modbus\functions\mbfunccoils.c - - - $PROJ_DIR$\..\..\modbus\functions\mbfuncdiag.c - - - $PROJ_DIR$\..\..\modbus\functions\mbfuncdisc.c - - - $PROJ_DIR$\..\..\modbus\functions\mbfuncholding.c - - - $PROJ_DIR$\..\..\modbus\functions\mbfuncinput.c - - - $PROJ_DIR$\..\..\modbus\functions\mbfuncother.c - - - $PROJ_DIR$\..\..\modbus\include\mbport.h - - - $PROJ_DIR$\..\..\modbus\include\mbproto.h - - - $PROJ_DIR$\..\..\modbus\rtu\mbrtu.c - - - $PROJ_DIR$\..\..\modbus\rtu\mbrtu.h - - - $PROJ_DIR$\..\..\modbus\functions\mbutils.c - - - $PROJ_DIR$\..\..\modbus\include\mbutils.h - - - - port - - $PROJ_DIR$\port\port.h - - - $PROJ_DIR$\port\portevent.c - - - $PROJ_DIR$\port\portother.c - - - $PROJ_DIR$\port\portserial.c - - - $PROJ_DIR$\port\porttimer.c - - - - $PROJ_DIR$\demo.c - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/demo.eww b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/demo.eww deleted file mode 100644 index 2b25c134..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/demo.eww +++ /dev/null @@ -1,10 +0,0 @@ - - - - - $WS_DIR$\demo.ewp - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/demo_rtu.bat b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/demo_rtu.bat deleted file mode 100644 index 402b4757..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/demo_rtu.bat +++ /dev/null @@ -1 +0,0 @@ -..\..\tools\modpoll.exe -m rtu -a 10 -r 1000 -c 4 -t 3 -b 38400 -d 8 -p even COM1 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/cmsis/core_cm3.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/cmsis/core_cm3.c deleted file mode 100644 index b3a9a886..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/cmsis/core_cm3.c +++ /dev/null @@ -1,804 +0,0 @@ -/****************************************************************************** - * @file: core_cm3.c - * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Source File - * @version: V1.10 - * @date: 24. Feb. 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-Mx - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - - -#include - -/* define compiler specific symbols */ -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for armcc */ - #define __INLINE __inline /*!< inline keyword for armcc */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for iarcc */ - #define __INLINE inline /*!< inline keyword for iarcc. Only avaiable in High optimization mode! */ - #define __nop __no_operation /*!< no operation intrinsic in iarcc */ - -#elif defined ( __GNUC__ ) - #define __ASM asm /*!< asm keyword for gcc */ - #define __INLINE inline /*!< inline keyword for gcc */ -#endif - - - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -__ASM uint32_t __get_PSP(void) -{ - mrs r0, psp - bx lr -} - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -__ASM void __set_PSP(uint32_t topOfProcStack) -{ - msr psp, r0 - bx lr -} - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -__ASM uint32_t __get_MSP(void) -{ - mrs r0, msp - bx lr -} - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -__ASM void __set_MSP(uint32_t mainStackPointer) -{ - msr msp, r0 - bx lr -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -__ASM uint32_t __REV16(uint16_t value) -{ - rev16 r0, r0 - bx lr -} - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param int16_t value to reverse - * @return int32_t reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -__ASM int32_t __REVSH(int16_t value) -{ - revsh r0, r0 - bx lr -} - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * @param none - * @return none - * - * Removes the exclusive lock which is created by ldrex. - */ -__ASM void __CLREX(void) -{ - clrex -} - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -__ASM uint32_t __get_BASEPRI(void) -{ - mrs r0, basepri - bx lr -} - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -__ASM void __set_BASEPRI(uint32_t basePri) -{ - msr basepri, r0 - bx lr -} - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -__ASM uint32_t __get_PRIMASK(void) -{ - mrs r0, primask - bx lr -} - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -__ASM void __set_PRIMASK(uint32_t priMask) -{ - msr primask, r0 - bx lr -} - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -__ASM uint32_t __get_FAULTMASK(void) -{ - mrs r0, faultmask - bx lr -} - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -__ASM void __set_FAULTMASK(uint32_t faultMask) -{ - msr faultmask, r0 - bx lr -} - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -__ASM uint32_t __get_CONTROL(void) -{ - mrs r0, control - bx lr -} - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -__ASM void __set_CONTROL(uint32_t control) -{ - msr control, r0 - bx lr -} - -#endif /* __ARMCC_VERSION */ - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -#pragma diag_suppress=Pe940 - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -uint32_t __get_PSP(void) -{ - __ASM("mrs r0, psp"); - __ASM("bx lr"); -} - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -void __set_PSP(uint32_t topOfProcStack) -{ - __ASM("msr psp, r0"); - __ASM("bx lr"); -} - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -uint32_t __get_MSP(void) -{ - __ASM("mrs r0, msp"); - __ASM("bx lr"); -} - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -void __set_MSP(uint32_t topOfMainStack) -{ - __ASM("msr msp, r0"); - __ASM("bx lr"); -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -uint32_t __REV16(uint16_t value) -{ - __ASM("rev16 r0, r0"); - __ASM("bx lr"); -} - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -uint32_t __RBIT(uint32_t value) -{ - __ASM("rbit r0, r0"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -uint8_t __LDREXB(uint8_t *addr) -{ - __ASM("ldrexb r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -uint16_t __LDREXH(uint16_t *addr) -{ - __ASM("ldrexh r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -uint32_t __LDREXW(uint32_t *addr) -{ - __ASM("ldrex r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXB(uint8_t value, uint8_t *addr) -{ - __ASM("strexb r0, r0, [r1]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXH(uint16_t value, uint16_t *addr) -{ - __ASM("strexh r0, r0, [r1]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXW(uint32_t value, uint32_t *addr) -{ - __ASM("strex r0, r0, [r1]"); - __ASM("bx lr"); -} - -#pragma diag_default=Pe940 - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -uint32_t __get_PSP(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, psp" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -void __set_PSP(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) ); -} - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -uint32_t __get_MSP(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, msp" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -void __set_MSP(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) ); -} - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -uint32_t __get_BASEPRI(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -void __set_BASEPRI(uint32_t value) -{ - __ASM volatile ("MSR basepri, %0" : : "r" (value) ); -} - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -uint32_t __get_PRIMASK(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -void __set_PRIMASK(uint32_t priMask) -{ - __ASM volatile ("MSR primask, %0" : : "r" (priMask) ); -} - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -uint32_t __get_FAULTMASK(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -void __set_FAULTMASK(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) ); -} - -/** - * @brief Reverse byte order in integer value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in integer value - */ -uint32_t __REV(uint32_t value) -{ - uint32_t result=0; - - __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -uint32_t __REV16(uint16_t value) -{ - uint32_t result=0; - - __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param int32_t value to reverse - * @return int32_t reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -int32_t __REVSH(int16_t value) -{ - uint32_t result=0; - - __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -uint32_t __RBIT(uint32_t value) -{ - uint32_t result=0; - - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -uint8_t __LDREXB(uint8_t *addr) -{ - uint8_t result=0; - - __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -uint16_t __LDREXH(uint16_t *addr) -{ - uint16_t result=0; - - __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -uint32_t __LDREXW(uint32_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXB(uint8_t value, uint8_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXH(uint16_t value, uint16_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXW(uint32_t value, uint32_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -uint32_t __get_CONTROL(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, control" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -void __set_CONTROL(uint32_t control) -{ - __ASM volatile ("MSR control, %0" : : "r" (control) ); -} - -#endif - - - - - - - - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/cmsis/core_cm3.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/cmsis/core_cm3.h deleted file mode 100644 index 59b054de..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/cmsis/core_cm3.h +++ /dev/null @@ -1,1265 +0,0 @@ -/****************************************************************************** - * @file: core_cm3.h - * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version: V1.10 - * @date: 24. Feb. 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-Mx - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - - - -#ifndef __CM3_CORE_H__ -#define __CM3_CORE_H__ - - -#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ -#define __CM3_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */ -#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x03) /*!< Cortex core */ - -/** - * Lint configuration \n - * ----------------------- \n - * - * The following Lint messages will be suppressed and not shown: \n - * \n - * --- Error 10: --- \n - * register uint32_t __regBasePri __asm("basepri"); \n - * Error 10: Expecting ';' \n - * \n - * --- Error 530: --- \n - * return(__regBasePri); \n - * Warning 530: Symbol '__regBasePri' (line 264) not initialized \n - * \n - * --- Error 550: --- \n - * __regBasePri = (basePri & 0x1ff); \n - * } \n - * Warning 550: Symbol '__regBasePri' (line 271) not accessed \n - * \n - * --- Error 754: --- \n - * uint32_t RESERVED0[24]; \n - * Info 754: local structure member '' (line 109, file ./cm3_core.h) not referenced \n - * \n - * --- Error 750: --- \n - * #define __CM3_CORE_H__ \n - * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced \n - * \n - * --- Error 528: --- \n - * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n - * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced \n - * \n - * --- Error 751: --- \n - * } InterruptType_Type; \n - * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced \n - * \n - * \n - * Note: To re-enable a Message, insert a space before 'lint' * \n - * - */ - -/*lint -save */ -/*lint -e10 */ -/*lint -e530 */ -/*lint -e550 */ -/*lint -e754 */ -/*lint -e750 */ -/*lint -e528 */ -/*lint -e751 */ - - -#include /* Include standard types */ - -#if defined (__ICCARM__) - #include /* IAR Intrinsics */ -#endif - - -#ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ -#endif - - - - -/** - * IO definitions - * - * define access restrictions to peripheral registers - */ - -#define __I volatile const /*!< defines 'read only' permissions */ -#define __O volatile /*!< defines 'write only' permissions */ -#define __IO volatile /*!< defines 'read / write' permissions */ - - - -/******************************************************************************* - * Register Abstraction - ******************************************************************************/ - - -/* System Reset */ -#define NVIC_VECTRESET 0 /*!< Vector Reset Bit */ -#define NVIC_SYSRESETREQ 2 /*!< System Reset Request */ -#define NVIC_AIRCR_VECTKEY (0x5FA << 16) /*!< AIRCR Key for write access */ -#define NVIC_AIRCR_ENDIANESS 15 /*!< Endianess */ - -/* Core Debug */ -#define CoreDebug_DEMCR_TRCENA (1 << 24) /*!< DEMCR TRCENA enable */ -#define ITM_TCR_ITMENA 1 /*!< ITM enable */ - - - - -/* memory mapping struct for Nested Vectored Interrupt Controller (NVIC) */ -typedef struct -{ - __IO uint32_t ISER[8]; /*!< Interrupt Set Enable Register */ - uint32_t RESERVED0[24]; - __IO uint32_t ICER[8]; /*!< Interrupt Clear Enable Register */ - uint32_t RSERVED1[24]; - __IO uint32_t ISPR[8]; /*!< Interrupt Set Pending Register */ - uint32_t RESERVED2[24]; - __IO uint32_t ICPR[8]; /*!< Interrupt Clear Pending Register */ - uint32_t RESERVED3[24]; - __IO uint32_t IABR[8]; /*!< Interrupt Active bit Register */ - uint32_t RESERVED4[56]; - __IO uint8_t IP[240]; /*!< Interrupt Priority Register, 8Bit wide */ - uint32_t RESERVED5[644]; - __O uint32_t STIR; /*!< Software Trigger Interrupt Register */ -} NVIC_Type; - - -/* memory mapping struct for System Control Block */ -typedef struct -{ - __I uint32_t CPUID; /*!< CPU ID Base Register */ - __IO uint32_t ICSR; /*!< Interrupt Control State Register */ - __IO uint32_t VTOR; /*!< Vector Table Offset Register */ - __IO uint32_t AIRCR; /*!< Application Interrupt / Reset Control Register */ - __IO uint32_t SCR; /*!< System Control Register */ - __IO uint32_t CCR; /*!< Configuration Control Register */ - __IO uint8_t SHP[12]; /*!< System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IO uint32_t SHCSR; /*!< System Handler Control and State Register */ - __IO uint32_t CFSR; /*!< Configurable Fault Status Register */ - __IO uint32_t HFSR; /*!< Hard Fault Status Register */ - __IO uint32_t DFSR; /*!< Debug Fault Status Register */ - __IO uint32_t MMFAR; /*!< Mem Manage Address Register */ - __IO uint32_t BFAR; /*!< Bus Fault Address Register */ - __IO uint32_t AFSR; /*!< Auxiliary Fault Status Register */ - __I uint32_t PFR[2]; /*!< Processor Feature Register */ - __I uint32_t DFR; /*!< Debug Feature Register */ - __I uint32_t ADR; /*!< Auxiliary Feature Register */ - __I uint32_t MMFR[4]; /*!< Memory Model Feature Register */ - __I uint32_t ISAR[5]; /*!< ISA Feature Register */ -} SCB_Type; - - -/* memory mapping struct for SysTick */ -typedef struct -{ - __IO uint32_t CTRL; /*!< SysTick Control and Status Register */ - __IO uint32_t LOAD; /*!< SysTick Reload Value Register */ - __IO uint32_t VAL; /*!< SysTick Current Value Register */ - __I uint32_t CALIB; /*!< SysTick Calibration Register */ -} SysTick_Type; - - -/* memory mapping structur for ITM */ -typedef struct -{ - __O union - { - __O uint8_t u8; /*!< ITM Stimulus Port 8-bit */ - __O uint16_t u16; /*!< ITM Stimulus Port 16-bit */ - __O uint32_t u32; /*!< ITM Stimulus Port 32-bit */ - } PORT [32]; /*!< ITM Stimulus Port Registers */ - uint32_t RESERVED0[864]; - __IO uint32_t TER; /*!< ITM Trace Enable Register */ - uint32_t RESERVED1[15]; - __IO uint32_t TPR; /*!< ITM Trace Privilege Register */ - uint32_t RESERVED2[15]; - __IO uint32_t TCR; /*!< ITM Trace Control Register */ - uint32_t RESERVED3[29]; - __IO uint32_t IWR; /*!< ITM Integration Write Register */ - __IO uint32_t IRR; /*!< ITM Integration Read Register */ - __IO uint32_t IMCR; /*!< ITM Integration Mode Control Register */ - uint32_t RESERVED4[43]; - __IO uint32_t LAR; /*!< ITM Lock Access Register */ - __IO uint32_t LSR; /*!< ITM Lock Status Register */ - uint32_t RESERVED5[6]; - __I uint32_t PID4; /*!< ITM Product ID Registers */ - __I uint32_t PID5; - __I uint32_t PID6; - __I uint32_t PID7; - __I uint32_t PID0; - __I uint32_t PID1; - __I uint32_t PID2; - __I uint32_t PID3; - __I uint32_t CID0; - __I uint32_t CID1; - __I uint32_t CID2; - __I uint32_t CID3; -} ITM_Type; - - -/* memory mapped struct for Interrupt Type */ -typedef struct -{ - uint32_t RESERVED0; - __I uint32_t ICTR; /*!< Interrupt Control Type Register */ -#if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) - __IO uint32_t ACTLR; /*!< Auxiliary Control Register */ -#else - uint32_t RESERVED1; -#endif -} InterruptType_Type; - - -/* Memory Protection Unit */ -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) -typedef struct -{ - __I uint32_t TYPE; /*!< MPU Type Register */ - __IO uint32_t CTRL; /*!< MPU Control Register */ - __IO uint32_t RNR; /*!< MPU Region RNRber Register */ - __IO uint32_t RBAR; /*!< MPU Region Base Address Register */ - __IO uint32_t RASR; /*!< MPU Region Attribute and Size Register */ - __IO uint32_t RBAR_A1; /*!< MPU Alias 1 Region Base Address Register */ - __IO uint32_t RASR_A1; /*!< MPU Alias 1 Region Attribute and Size Register */ - __IO uint32_t RBAR_A2; /*!< MPU Alias 2 Region Base Address Register */ - __IO uint32_t RASR_A2; /*!< MPU Alias 2 Region Attribute and Size Register */ - __IO uint32_t RBAR_A3; /*!< MPU Alias 3 Region Base Address Register */ - __IO uint32_t RASR_A3; /*!< MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; -#endif - - -/* Core Debug Register */ -typedef struct -{ - __IO uint32_t DHCSR; /*!< Debug Halting Control and Status Register */ - __O uint32_t DCRSR; /*!< Debug Core Register Selector Register */ - __IO uint32_t DCRDR; /*!< Debug Core Register Data Register */ - __IO uint32_t DEMCR; /*!< Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000) /*!< ITM Base Address */ -#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ - -#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ -#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) - #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ -#endif - - - -/******************************************************************************* - * Hardware Abstraction Layer - ******************************************************************************/ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - #define __NOP __no_operation /*!< no operation intrinsic in IAR Compiler */ - -#elif defined ( __GNUC__ ) - #define __ASM asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ -/* ARM armcc specific functions */ - -#define __enable_fault_irq __enable_fiq -#define __disable_fault_irq __disable_fiq - -#define __NOP __nop -#define __WFI __wfi -#define __WFE __wfe -#define __SEV __sev -#define __ISB() __isb(0) -#define __DSB() __dsb(0) -#define __DMB() __dmb(0) -#define __REV __rev -#define __RBIT __rbit -#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) -#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) -#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) -#define __STREXB(value, ptr) __strex(value, ptr) -#define __STREXH(value, ptr) __strex(value, ptr) -#define __STREXW(value, ptr) __strex(value, ptr) - - - /* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ - /* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ - /* intrinsic void __enable_irq(); */ - /* intrinsic void __disable_irq(); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/* - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param int16_t value to reverse - * @return int32_t reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * @param none - * @return none - * - * Removes the exclusive lock which is created by ldrex. - */ -extern void __CLREX(void); - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -#else /* (__ARMCC_VERSION >= 400000) */ - - -/** - * @brief Remove the exclusive lock created by ldrex - * - * @param none - * @return none - * - * Removes the exclusive lock which is created by ldrex. - */ -#define __CLREX __clrex - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -static __INLINE uint32_t __get_BASEPRI(void) -{ - register uint32_t __regBasePri __ASM("basepri"); - return(__regBasePri); -} - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -static __INLINE void __set_BASEPRI(uint32_t basePri) -{ - register uint32_t __regBasePri __ASM("basepri"); - __regBasePri = (basePri & 0x1ff); -} - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -static __INLINE uint32_t __get_PRIMASK(void) -{ - register uint32_t __regPriMask __ASM("primask"); - return(__regPriMask); -} - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -static __INLINE void __set_PRIMASK(uint32_t priMask) -{ - register uint32_t __regPriMask __ASM("primask"); - __regPriMask = (priMask); -} - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -static __INLINE uint32_t __get_FAULTMASK(void) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - return(__regFaultMask); -} - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -static __INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - __regFaultMask = (faultMask & 1); -} - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -static __INLINE uint32_t __get_CONTROL(void) -{ - register uint32_t __regControl __ASM("control"); - return(__regControl); -} - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -static __INLINE void __set_CONTROL(uint32_t control) -{ - register uint32_t __regControl __ASM("control"); - __regControl = control; -} - -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -/* IAR iccarm specific functions */ - -#define __enable_irq __enable_interrupt /*!< global Interrupt enable */ -#define __disable_irq __disable_interrupt /*!< global Interrupt disable */ - -static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } - -static __INLINE void __WFI() { __ASM ("wfi"); } -static __INLINE void __WFE() { __ASM ("wfe"); } -static __INLINE void __SEV() { __ASM ("sev"); } -static __INLINE void __CLREX() { __ASM ("clrex"); } - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - -/* intrinsic void __set_PRIMASK(); */ -/* intrinsic void __get_PRIMASK(); */ -/* intrinsic void __set_FAULTMASK(); */ -/* intrinsic void __get_FAULTMASK(); */ -/* intrinsic uint32_t __REV(uint32_t value); */ -/* intrinsic uint32_t __REVSH(uint32_t value); */ -/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ -/* intrinsic unsigned long __LDREX(unsigned long *); */ - - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* GNU gcc specific functions */ - -static __INLINE void __NOP() { __ASM volatile ("nop"); } -static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } -static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } - -static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } - -static __INLINE void __WFI() { __ASM volatile ("wfi"); } -static __INLINE void __WFE() { __ASM volatile ("wfe"); } -static __INLINE void __SEV() { __ASM volatile ("sev"); } -static __INLINE void __ISB(arg) { __ASM volatile ("isb"); } -static __INLINE void __DSB(arg) { __ASM volatile ("dsb"); } -static __INLINE void __DMB(arg) { __ASM volatile ("dmb"); } -static __INLINE void __CLREX() { __ASM volatile ("clrex"); } - - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value -* -* @param none -* @return uint32_t Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -/** - * @brief Reverse byte order in integer value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in integer value - */ -extern uint32_t __REV(uint32_t value); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/* - * Reverse byte order in signed short value with sign extension to integer - * - * @param int16_t value to reverse - * @return int32_t reversed value - * - * @brief Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - -#endif - - - -/* ########################## NVIC functions #################################### */ - -/** - * @brief Set the Priority Grouping in NVIC Interrupt Controller - * - * @param uint32_t priority_grouping is priority grouping field - * @return - * - * Set the priority grouping field using the required unlock sequence. - * The parameter priority_grouping is assigned to the field - * SCB->AIRCR [10:8] PRIGROUP field. - */ -static __INLINE void NVIC_SetPriorityGrouping(uint32_t priority_grouping) -{ - uint32_t reg_value=0; - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((0xFFFFU << 16) | (0x0F << 8)); /* clear bits to change */ - reg_value = ((reg_value | NVIC_AIRCR_VECTKEY | (priority_grouping << 8))); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - -/** - * @brief Enable Interrupt in NVIC Interrupt Controller - * - * @param IRQn_Type IRQn specifies the interrupt number - * @return none - * - * Enable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ -} - -/** - * @brief Disable the interrupt line for external interrupt specified - * - * @param IRQn_Type IRQn is the positive number of the external interrupt - * @return none - * - * Disable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ -} - -/** - * @brief Read the interrupt pending bit for a device specific interrupt source - * - * @param IRQn_Type IRQn is the number of the device specifc interrupt - * @return IRQn_Type Number of pending interrupt or zero - * - * Read the pending register in NVIC and return the number of the - * specified interrupt if its status is pending, otherwise it returns - * zero. The interrupt number cannot be a negative value. - */ -static __INLINE IRQn_Type NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((IRQn_Type) (NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))); /* Return Interrupt bit or 'zero' */ -} - -/** - * @brief Set the pending bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return none - * - * Set the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ -} - -/** - * @brief Clear the pending bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return none - * - * Clear the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ -} - -/** - * @brief Read the active bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return IRQn_Type Number of pending interrupt or zero - * - * Read the active register in NVIC and returns the number of the - * specified interrupt if its status is active, otherwise it - * returns zero. The interrupt number cannot be a negative value. - */ -static __INLINE IRQn_Type NVIC_GetActive(IRQn_Type IRQn) -{ - return((IRQn_Type)(NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))); /* Return Interruptnumber or 'zero' */ -} - -/** - * @brief Set the priority for an interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @param priority is the priority for the interrupt - * @return none - * - * Set the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. \n - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, int32_t priority) -{ - if(IRQn < 0) { - SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ - else { - //NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ - NVIC->IP[(uint32_t)(IRQn)] = (priority & 0xff); } /* set Priority for device specific Interrupts */ -} - -/** - * @brief Read the priority for an interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return priority is the priority for the interrupt - * - * Read the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * The returned priority value is automatically aligned to the implemented - * priority bits of the microcontroller. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if(IRQn < 0) { - return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ - else { - return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ -} - - - -/* ################################## SysTick function ############################################ */ - -#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) - -/* SysTick constants */ -#define SYSTICK_ENABLE 0 /* Config-Bit to start or stop the SysTick Timer */ -#define SYSTICK_TICKINT 1 /* Config-Bit to enable or disable the SysTick interrupt */ -#define SYSTICK_CLKSOURCE 2 /* Clocksource has the offset 2 in SysTick Control and Status Register */ -#define SYSTICK_MAXCOUNT ((1<<24) -1) /* SysTick MaxCount */ - -/** - * @brief Initialize and start the SysTick counter and its interrupt. - * - * @param uint32_t ticks is the number of ticks between two interrupts - * @return none - * - * Initialise the system tick timer and its interrupt and start the - * system tick timer / counter in free running mode to generate - * periodical interrupts. - */ -static __INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if (ticks > SYSTICK_MAXCOUNT) return (1); /* Reload value impossible */ - - SysTick->LOAD = (ticks & SYSTICK_MAXCOUNT) - 1; /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ - SysTick->VAL = (0x00); /* Load the SysTick Counter Value */ - SysTick->CTRL = (1 << SYSTICK_CLKSOURCE) | (1<AIRCR = (NVIC_AIRCR_VECTKEY | (SCB->AIRCR & (0x700)) | (1<DEMCR & CoreDebug_DEMCR_TRCENA) && - (ITM->TCR & ITM_TCR_ITMENA) && - (ITM->TER & (1UL << 0)) ) - { - while (ITM->PORT[0].u32 == 0); - ITM->PORT[0].u8 = (uint8_t) ch; - } - return (ch); -} - -#endif - -/*lint -restore */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/acc/acc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/acc/acc.c deleted file mode 100644 index 2c3e0080..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/acc/acc.c +++ /dev/null @@ -1,164 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup adc_module Working with ACC - * The ACC driver provides the interface to configure and use the ACC peripheral.\n - * - * It converts the analog input to digital format. The converted result could be 12bit - * or 10bit. The ACC supports up to 16 analog lines. - * - * To Enable a ACC conversion,the user has to follow these few steps: - *
    - *
  • Select an appropriate reference voltage on ADVREF
    • - *
  • Configure the ACC according to its requirements and special needs,which could be - broken down into several parts: - * -# Select the resolution by setting or clearing ACC_MR_LOWRES bit in ACC_MR (Mode Register) - * -# Set ACC clock by setting ACC_MR_PRESCAL bits in ACC_MR, the clock is caculated with - ACCClock = MCK / ( (PRESCAL+1) * 2 ) - * -# Set Startup Time,Tracking Clock cycles and Transfer Clock respeticively in ACC_MR. -
    • - *
  • Start conversion by setting ACC_CR_START in ACC_CR.
    • - *
- * - * For more accurate information, please look at the ACC section of the - * Datasheet. - * - * Related files :\n - * \ref adc.c\n - * \ref adc.h\n -*/ -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include -#include - - - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initialize the ACC controller - * \param pAcc Pointer to an Acc instance. - * \param idAcc ACC identifier - * \param selplus input connected to inp, 0~7 - * \param selminus input connected to inm,0~7 - * \param ac_en Analog comprator enabled/disabled,use pattern - * \param edge CF flag triggering mode,use pattern - * \param invert INVert comparator output,use pattern defined in the device header - file -*/ -void ACC_Configure(Acc *pAcc, - uint8_t idAcc, - uint8_t selplus, - uint8_t selminus, - uint16_t ac_en, - uint16_t edge, - uint16_t invert) -{ - - /* Enable peripheral clock*/ - PMC->PMC_PCER1 = 1 << (idAcc-32); - - /* Reset the controller */ - pAcc->ACC_CR |= ACC_CR_SWRST; - - /* Write to the MR register */ - ACC_CfgModeReg( pAcc, - ( selplus & ACC_MR_SELPLUS) - | (( selminus<<4) & ACC_MR_SELMINUS) - | ( ac_en & ACC_MR_ACEN) - | ( edge & ACC_MR_EDGETYP) - | ( invert & ACC_MR_INV) ); - //pAcc->ACC_MR |= (ACC_MR_SELFS_OUTPUT|ACC_MR_FE_EN); - - pAcc->ACC_ACR = 0x7; - - while(pAcc->ACC_ISR & (uint32_t)ACC_ISR_MASK); -} - - -/** - * Return the Channel Converted Data - * \param pAdc Pointer to an Adc instance. - * \param channel channel to get converted value - * \return Channel converted data of the specified channel - */ -void ACC_SetComparisionPair(Acc *pAcc, uint8_t selplus,uint8_t selminus) -{ - - uint32_t temp; - - ASSERT(selplus < 8 && selminus < 8,"The assigned channel number is invalid!"); - - temp = pAcc->ACC_MR; - - pAcc->ACC_MR = temp & (~ACC_MR_SELMINUS)&(~ACC_MR_SELPLUS); - - pAcc->ACC_MR |= ((selplus & ACC_MR_SELPLUS)|((selminus<<4) & ACC_MR_SELMINUS)); - -} -/** - * Return Comparison Result - * \param pAcc Pointer to an Acc instance. - * \param status value of ACC_ISR - */ -uint8_t ACC_GetComparisionResult(Acc *pAcc,uint32_t status) -{ - uint32_t temp = pAcc->ACC_MR; - if( (temp & ACC_MR_INV)== ACC_MR_INV) - { - - if( status & ACC_ISR_SCO) - { - return 0; /* inn>inp*/ - } - else return 1;/* inp>inn*/ - - } - else - { - - if( status & ACC_ISR_SCO) - { - return 1; /* inp>inn*/ - } - else return 0;/* inn>inp*/ - } - -} - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/acc/acc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/acc/acc.h deleted file mode 100644 index 284d8d44..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/acc/acc.h +++ /dev/null @@ -1,144 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \unit - * - * !Purpose - * - * Interface for configuration the Analog-to-Digital Converter (ACC) peripheral. - * - * !Usage - * - * -# Configurate the pins for ACC - * -# Initialize the ACC with ACC_Initialize(). - * -# Select the active channel using ACC_EnableChannel() - * -# Start the conversion with ACC_StartConversion() - * -# Wait the end of the conversion by polling status with ACC_GetStatus() - * -# Finally, get the converted data using ACC_GetConvertedData() - * -*/ -#ifndef ACC_H -#define ACC_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ -#define ACC_SELPLUS_AD12B0 0 -#define ACC_SELPLUS_AD12B1 1 -#define ACC_SELPLUS_AD12B2 2 -#define ACC_SELPLUS_AD12B3 3 -#define ACC_SELPLUS_AD12B4 4 -#define ACC_SELPLUS_AD12B5 5 -#define ACC_SELPLUS_AD12B6 6 -#define ACC_SELPLUS_AD12B7 7 -#define ACC_SELMINUS_TS 0 -#define ACC_SELMINUS_ADVREF 1 -#define ACC_SELMINUS_DAC0 2 -#define ACC_SELMINUS_DAC1 3 -#define ACC_SELMINUS_AD12B0 4 -#define ACC_SELMINUS_AD12B1 5 -#define ACC_SELMINUS_AD12B2 6 -#define ACC_SELMINUS_AD12B3 7 - - -/*------------------------------------------------------------------------------ - * Macros function of register access - *------------------------------------------------------------------------------*/ -#define ACC_CfgModeReg(pAcc, mode) { \ - (pAcc)->ACC_MR = (mode);\ - } - -#define ACC_GetModeReg(pAcc) ((pAcc)->ACC_MR) - -#define ACC_StartConversion(pAcc) ((pAcc)->ACC_CR = ACC_CR_START) - -#define ACC_SoftReset(pAcc) ((pAcc)->ACC_CR = ACC_CR_SWRST) - -#define ACC_EnableChannel(pAcc, channel) {\ - ASSERT(channel < 16, "ACC Channel not exist");\ - (pAcc)->ACC_CHER = (1 << (channel));\ - } - -#define ACC_DisableChannel (pAcc, channel) {\ - ASSERT((channel) < 16, "ACC Channel not exist");\ - (pAcc)->ACC_CHDR = (1 << (channel));\ - } - -#define ACC_EnableIt(pAcc, mode) {\ - ASSERT(((mode)&0xFFF00000)== 0, "ACC bad interrupt IER");\ - (pAcc)->ACC_IER = (mode);\ - } - -#define ACC_DisableIt(pAcc, mode) {\ - ASSERT(((mode)&0xFFF00000)== 0, "ACC bad interrupt IDR");\ - (pAcc)->ACC_IDR = (mode);\ - } - -#define ACC_EnableDataReadyIt(pAcc) ((pAcc)->ACC_IER = AT91C_ACC_DRDY) - -#define ACC_GetStatus(pAcc) ((pAcc)->ACC_ISR) - -#define ACC_GetChannelStatus(pAcc) ((pAcc)->ACC_CHSR) - -#define ACC_GetInterruptMaskStatus(pAcc) ((pAcc)->ACC_IMR) - -#define ACC_GetLastConvertedData(pAcc) ((pAcc)->ACC_LCDR) - -#define ACC_CfgAnalogCtrlReg(pAcc,mode) {\ - ASSERT(((mode) & 0xFFFCFF3C)==0, "ACC bad analog control config");\ - (pAcc)->ACC_ACR = (mode);\ - } - -#define ACC_CfgExtModeReg(pAcc, extmode) {\ - ASSERT(((extmode) & 0xFF00FFFE)==0, "ACC bad extended mode config");\ - (pAcc)->ACC_EMR = (extmode);\ - } - -#define ACC_GetAnalogCtrlReg(pAcc) ((pAcc)->ACC_ACR) - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -void ACC_Configure(Acc *pAcc, - uint8_t idAcc, - uint8_t selplus, - uint8_t selminus, - uint16_t ac_en, - uint16_t edge, - uint16_t invert); - -extern uint8_t ACC_GetComparisionResult(Acc *pAcc,uint32_t status); - -#endif //#ifndef ACC_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/adc/adc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/adc/adc.c deleted file mode 100644 index 241a8d93..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/adc/adc.c +++ /dev/null @@ -1,231 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup adc_module Working with ADC - * The ADC driver provides the interface to configure and use the ADC peripheral. - * \n - * - * It converts the analog input to digital format. The converted result could be - * 12bit or 10bit. The ADC supports up to 16 analog lines. - * - * To Enable a ADC conversion,the user has to follow these few steps: - *
    - *
  • Select an appropriate reference voltage on ADVREF
    • - *
  • Configure the ADC according to its requirements and special needs,which - * could be broken down into several parts: - * -# Select the resolution by setting or clearing ADC_MR_LOWRES bit in - * ADC_MR (Mode Register) - * -# Set ADC clock by setting ADC_MR_PRESCAL bits in ADC_MR, the clock is - * calculated with ADCClock = MCK / ( (PRESCAL+1) * 2 ) - * -# Set Startup Time,Tracking Clock cycles and Transfer Clock respectively - * in ADC_MR. -
    • - *
  • Start conversion by setting ADC_CR_START in ADC_CR.
    • - *
- * - * For more accurate information, please look at the ADC section of the - * Datasheet. - * - * Related files :\n - * \ref adc.c\n - * \ref adc.h\n -*/ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initialize the ADC controller - * \param pAdc Pointer to an Adc instance. - * \param trgEn trigger mode, software or Hardware - * \param trgSel hardware trigger selection - * \param sleepMode sleep mode selection - * \param resolution resolution selection 10 bits or 12 bits - * \param mckClock value of MCK in Hz - * \param adcClock value of the ADC clock in Hz - * \param startupTime value of the start up time (in ADCClock) (see datasheet) - * \param trackingt Tracking Time (in ADCClock cycle) -*/ -void ADC_Initialize(Adc *pAdc, uint8_t idAdc, uint8_t trgEn, uint8_t trgSel, - uint8_t sleepMode, uint8_t resolution, uint32_t mckClock, - uint32_t adcClock, uint32_t startup, uint32_t tracking) { - uint32_t prescal; - prescal = (mckClock / (2*adcClock)) - 1; - - ASSERT( (prescal<0x3F), "ADC Bad PRESCAL\n\r"); - - TRACE_DEBUG("adcClock:%lu MasterClock:%lu\n\r", (mckClock/((prescal+1)*2)), - mckClock); - - if( adcClock != (mckClock/((prescal+1)*2)) ) { - TRACE_WARNING("User and calculated adcClocks are different : " - "user=%lu calc=%lu\n\r", - adcClock, (mckClock/((prescal+1)*2))); - } - - /* Enable peripheral clock*/ - PMC->PMC_PCER0 = 1 << idAdc; - - /* Reset the controller */ - ADC_SoftReset(pAdc); - - /* Write to the MR register */ - ADC_CfgModeReg( pAdc, - ( trgEn & ADC_MR_TRGEN) - | ( trgSel & ADC_MR_TRGSEL) - | ( resolution & ADC_MR_LOWRES) - | ( sleepMode & ADC_MR_SLEEP) - | ( (prescal<<8) & ADC_MR_PRESCAL) - | ( (startup<<16) & ADC_MR_STARTUP) - | ( (tracking<<24) & ADC_MR_TRACKTIM) ); -} - -/** - * Return the Channel Converted Data - * \param pAdc Pointer to an Adc instance. - * \param channel channel to get converted value - */ -uint32_t ADC_GetConvertedData(Adc *pAdc, uint32_t channel) { - uint32_t data=0; - - if (15 >= channel) { - data = *((RoReg *)((uint32_t)&(pAdc->ADC_CDR0)+ channel*4)); - } - return data; -} -/** - * Set compare channel - * \param pAdc Pointer to an Adc instance. - * \param channel channel number to be set,16 for all channels - */ -void ADC_SetCompareChannel(Adc *pAdc, uint8_t channel) { - ASSERT(channel<=16, "Invalid channel number"); - if (channel < 16) { - pAdc->ADC_EMR &= ~(ADC_EMR_CMPALL); - pAdc->ADC_EMR &= ~(ADC_EMR_CMPSEL); - pAdc->ADC_EMR |= (channel << 4); - } else { - pAdc->ADC_EMR |= ADC_EMR_CMPALL; - } -} -/** - * Set compare mode - * \param pAdc Pointer to an Adc instance. - * \param mode compare mode - */ -void ADC_SetCompareMode(Adc *pAdc, uint8_t mode) { - pAdc->ADC_EMR &= ~(ADC_EMR_CMPMODE); - pAdc->ADC_EMR |= mode; -} -/** - * Set comparsion window,one thereshold each time - * \param pAdc Pointer to an Adc instance. - * \param hi_lo Comparison Window - */ -void ADC_SetComparisonWindow(Adc *pAdc, uint32_t hi_lo) { - pAdc->ADC_CWR = hi_lo; -} - -/**---------------------------------------------------------------------------- -* Test if ADC Interrupt is Masked -* \param pAdc Pointer to an Adc instance. -* \param flag flag to be tested -* \return 1 if interrupt is masked, otherwise 0 -*/ -uint32_t ADC_IsInterruptMasked(Adc *pAdc, uint32_t flag) { - return (ADC_GetInterruptMaskStatus(pAdc) & flag); -} - -/**---------------------------------------------------------------------------- -* Test if ADC Status is Set -* \param pAdc Pointer to an Adc instance. -* \param flag flag to be tested -* \return 1 if the staus is set; 0 otherwise -*/ -uint32_t ADC_IsStatusSet(Adc *pAdc, uint32_t flag) { - return (ADC_GetStatus(pAdc) & flag); -} - -/**---------------------------------------------------------------------------- -* Test if ADC channel interrupt Status is Set -* \param adc_sr Value of SR register -* \param channel Channel to be tested -* \return 1 if interrupt status is set, otherwise 0 -*/ -uint8_t ADC_IsChannelInterruptStatusSet(uint32_t adc_sr, uint32_t channel) { - uint8_t status; - - if((adc_sr & (1<ADC_RCR == 0) && (pADC->ADC_RNCR == 0)) { - - pADC->ADC_RPR = (uint32_t) pBuffer; - pADC->ADC_RCR = size; - pADC->ADC_PTCR = ADC_PTCR_RXTEN; - - return 1; - } - /* Check if the second PDC bank is free*/ - else if (pADC->ADC_RNCR == 0) { - - pADC->ADC_RNPR = (uint32_t) pBuffer; - pADC->ADC_RNCR = size; - - return 1; - } else { - - return 0; - } - -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/adc/adc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/adc/adc.h deleted file mode 100644 index 702143f0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/adc/adc.h +++ /dev/null @@ -1,158 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \unit - * - * !Purpose - * - * Interface for configuration the Analog-to-Digital Converter (ADC) peripheral. - * - * !Usage - * - * -# Configurate the pins for ADC - * -# Initialize the ADC with ADC_Initialize(). - * -# Select the active channel using ADC_EnableChannel() - * -# Start the conversion with ADC_StartConversion() - * -# Wait the end of the conversion by polling status with ADC_GetStatus() - * -# Finally, get the converted data using ADC_GetConvertedData() - * -*/ -#ifndef ADC_H -#define ADC_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ -#define ADC_CHANNEL_0 0 -#define ADC_CHANNEL_1 1 -#define ADC_CHANNEL_2 2 -#define ADC_CHANNEL_3 3 -#define ADC_CHANNEL_4 4 -#define ADC_CHANNEL_5 5 -#define ADC_CHANNEL_6 6 -#define ADC_CHANNEL_7 7 -#define ADC_CHANNEL_8 8 -#define ADC_CHANNEL_9 9 -#define ADC_CHANNEL_10 10 -#define ADC_CHANNEL_11 11 -#define ADC_CHANNEL_12 12 -#define ADC_CHANNEL_13 13 -#define ADC_CHANNEL_14 14 -#define ADC_CHANNEL_15 15 - -/*------------------------------------------------------------------------------ - * Macros function of register access - *------------------------------------------------------------------------------*/ -#define ADC_CfgModeReg(pAdc, mode) { \ - ASSERT(((mode)&0xF00000C0)== 0, "ADC Bad configuration ADC MR");\ - (pAdc)->ADC_MR = (mode);\ - } - -#define ADC_GetModeReg(pAdc) ((pAdc)->ADC_MR) - -#define ADC_StartConversion(pAdc) ((pAdc)->ADC_CR = ADC_CR_START) - -#define ADC_SoftReset(pAdc) ((pAdc)->ADC_CR = ADC_CR_SWRST) - -#define ADC_EnableChannel(pAdc, channel) {\ - ASSERT(channel < 16, "ADC Channel not exist");\ - (pAdc)->ADC_CHER = (1 << (channel));\ - } - -#define ADC_DisableChannel (pAdc, channel) {\ - ASSERT((channel) < 16, "ADC Channel not exist");\ - (pAdc)->ADC_CHDR = (1 << (channel));\ - } - -#define ADC_EnableIt(pAdc, mode) {\ - (pAdc)->ADC_IER = (mode);\ - } - -#define ADC_DisableIt(pAdc, mode) {\ - (pAdc)->ADC_IDR = (mode);\ - } - -#define ADC_EnbaleTS(pAdc,mode) {\ - (pAdc)->ADC_ACR |= mode;\ - } - -#define ADC_EnableDataReadyIt(pAdc) ((pAdc)->ADC_IER = AT91C_ADC_DRDY) - -#define ADC_GetStatus(pAdc) ((pAdc)->ADC_ISR) - -#define ADC_GetCompareMode(pAdc) (((pAdc)->ADC_EMR)& (ADC_EMR_CMPMODE)) - -#define ADC_GetChannelStatus(pAdc) ((pAdc)->ADC_CHSR) - -#define ADC_GetInterruptMaskStatus(pAdc) ((pAdc)->ADC_IMR) - -#define ADC_GetLastConvertedData(pAdc) ((pAdc)->ADC_LCDR) - -#define ADC_CfgAnalogCtrlReg(pAdc,mode) {\ - ASSERT(((mode) & 0xFFFCFF3C)==0, "ADC bad analog control config");\ - (pAdc)->ADC_ACR = (mode);\ - } - -#define ADC_CfgExtModeReg(pAdc, extmode) {\ - ASSERT(((extmode) & 0xFF00FFFE)==0, "ADC bad extended mode config");\ - (pAdc)->ADC_EMR = (extmode);\ - } - -#define ADC_GetAnalogCtrlReg(pAdc) ((pAdc)->ADC_ACR) - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -extern void ADC_Initialize (Adc *pAdc, - uint8_t idAdc, - uint8_t trgEn, - uint8_t trgSel, - uint8_t sleepMode, - uint8_t resolution, - uint32_t mckClock, - uint32_t adcClock, - uint32_t startupTime, - uint32_t sampleAndHoldTime); -extern uint32_t ADC_GetConvertedData(Adc *pAdc, uint32_t channel); -extern void ADC_SetCompareChannel(Adc *pAdc, uint8_t channel); -extern void ADC_SetCompareMode(Adc *pAdc, uint8_t mode); -extern void ADC_SetComparisonWindow(Adc *pAdc, uint32_t hi_lo); -extern uint32_t ADC_IsInterruptMasked(Adc *pAdc, uint32_t flag); -extern uint32_t ADC_IsStatusSet(Adc *pAdc, uint32_t flag); -extern uint8_t ADC_IsChannelInterruptStatusSet(uint32_t adc_sr, - uint32_t channel); -extern int8_t ADC_ReadBuffer(Adc *pADC,int16_t *pBuffer,int32_t size); - -#endif //#ifndef ADC_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/async/async.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/async/async.c deleted file mode 100644 index 65ba73a6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/async/async.c +++ /dev/null @@ -1,54 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Provide a routine for asynchronos transfer. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include -#include "async.h" - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ - /** - * \brief Returns 1 if the given transfer has ended; otherwise returns 0. - * \param pAsync Pointer to an Async instance. - */ -uint8_t ASYNC_IsFinished(Async *pAsync) -{ - return (pAsync->status != ASYNC_STATUS_PENDING); -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/async/async.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/async/async.h deleted file mode 100644 index af03d0e2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/async/async.h +++ /dev/null @@ -1,67 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - /** - * \file - * - * Provide a routine for asynchronos transfer. - * - */ - -#ifndef ASYNC_H -#define ASYNC_H - - -/*---------------------------------------------------------------------------- - * Definition - *----------------------------------------------------------------------------*/ -/** Transfer is still pending.*/ -#define ASYNC_STATUS_PENDING 0xFF - -/*---------------------------------------------------------------------------- - * Type - *----------------------------------------------------------------------------*/ -/** Asynchronous transfer descriptor. */ -typedef struct _Async { - - /** Asynchronous transfer status.*/ - volatile uint8_t status; - /** Callback function to invoke when transfer completes or fails.*/ - void *callback; - /** Driver storage area; do not use.*/ - uint32_t pStorage[4]; -} Async; - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ -extern uint8_t ASYNC_IsFinished(Async *pAsync); - -#endif //#ifndef ASYNC_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/crccu/crccu.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/crccu/crccu.c deleted file mode 100644 index 0e4acec8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/crccu/crccu.c +++ /dev/null @@ -1,134 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup crccu_module Working with CRCCU - * The CRCCU driver provides the interface to configure and use the CRCCU - * peripheral. - * - * It performs a CRC computation on a Memory Area. CRC computation is performed - * from the LSB to MSB bit. Three different polynomials are available: - * CCIT802.3, CASTAGNOLI and CCIT16. - * - * To computes CRC of a buffer, the user has to follow these few steps: - *
    - *
  • Reset initial CRC by setting RESET bit in CRCCU_CRC_CR,
    • - *
  • Configure CRC descriptor and working mode,
    • - *
  • Start to compute CRC by setting DMAEN in CRCCU_DMA_EN,
    • - *
  • Get CRC value in CRCCU_CRC_SR.
    • - *
- * - * For more accurate information, please look at the CRCCU section of the - * Datasheet. - * - * Related files :\n - * \ref crccu.c\n - * \ref crccu.h.\n -*/ -/*@{*/ -/*@}*/ - -/** - * \file - * - * Implementation of Cyclic Redundancy Check Calculation Unit (CRCCU). - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "crccu.h" -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ -#define CRCCU_TIMEOUT 0xFFFFFFFF - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -/** - * \brief Reset initial CRC to 0xFFFFFFFF. - */ -void CRCCU_ResetCrcValue(void) -{ - Crccu *pCrccu = CRCCU; - - pCrccu->CRCCU_CR = CRCCU_CR_RESET; -} - -/** - * \brief Configure the CRCCU. - * - * \param dscrAddr CRC decscriptor address. - * \param mode CRC work mode - */ -void CRCCU_Configure(uint32_t dscrAddr, uint32_t mode) -{ - Crccu *pCrccu = CRCCU; - - pCrccu->CRCCU_DSCR = dscrAddr; - pCrccu->CRCCU_MR = mode; -} - -/** - * \brief Start to compute the CRC of a buffer. - * - * \return The CRC of the buffer. - */ -uint32_t CRCCU_ComputeCrc(void) -{ - Crccu *pCrccu = CRCCU; - uint32_t timeout = 0; - - pCrccu->CRCCU_DMA_EN = CRCCU_DMA_EN_DMAEN; - while (((pCrccu->CRCCU_DMA_SR & CRCCU_DMA_SR_DMASR) == CRCCU_DMA_SR_DMASR) - && (timeout++ < CRCCU_TIMEOUT)); - - return (pCrccu->CRCCU_SR); -} - -/** - * \brief Compare the CRC of a buffer is match to reference CRC. - * - * \return if 0 CRC is match, else dismatch. - */ -uint32_t CRCCU_CompareCrc(void) -{ - Crccu *pCrccu = CRCCU; - - if ((pCrccu->CRCCU_ISR & CRCCU_ISR_ERRISR) == CRCCU_ISR_ERRISR) { - return 1; - } else { - return 0; - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/crccu/crccu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/crccu/crccu.h deleted file mode 100644 index 7298f610..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/crccu/crccu.h +++ /dev/null @@ -1,66 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Cyclic Redundancy Check Calculation Unit (CRCCU). - */ - -#ifndef CRCCU_H -#define CRCCU_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -typedef struct { - unsigned int TR_ADDR; - unsigned int TR_CTRL; - unsigned int reserved[2]; - unsigned int TR_CRC; -} CrcDscr; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -void CRCCU_ResetCrcValue(void); -void CRCCU_Configure(uint32_t dscrAddr, uint32_t mode); -uint32_t CRCCU_ComputeCrc(void); -uint32_t CRCCU_CompareCrc(void); - -#endif /* #ifndef CRCCU_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/dacc/dacc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/dacc/dacc.c deleted file mode 100644 index f576aa49..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/dacc/dacc.c +++ /dev/null @@ -1,172 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup dacc_module Working with DACC - * The DACC driver provides the interface to configure and use the DACC peripheral.\n - * - * The DACC(Digital-to-Analog Converter Controller) converts digital code to analog output. - * The data to be converted are sent in a common register for all channels. It offers up to 2 - * analog outputs.The output voltage ranges from (1/6)ADVREF to (5/6)ADVREF. - * - * To Enable a DACC conversion,the user has to follow these few steps: - *
    - *
  • Select an appropriate reference voltage on ADVREF
    • - *
  • Configure the DACC according to its requirements and special needs,which could be - broken down into several parts: - * -# Enable DACC in free running mode by clearing TRGEN in DACC_MR; - * -# Configure Startup Time and Refresh Period through setting STARTUP and REFRESH fields - * in DACC_MR; The refresh mechanism is used to protect the output analog value from - * decreasing. - * -# Enable channels and write digital code to DACC_CDR,in free running mode, the conversion - * is started right after at least one channel is enabled and data is written . -
    • - *
- * - * For more accurate information, please look at the DACC section of the - * Datasheet. - * - * Related files :\n - * \ref DACC.c\n - * \ref DACC.h\n -*/ -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include -#include - - - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initialize the DACC controller - * \param pDACC Pointer to an DACC instance. - * \param idDACC identifier of DAC peripheral - * \param trgEn trigger mode, free running mode or external Hardware trigger - * \param word transfer size,word or half word - * \param trgSel hardware trigger selection - * \param sleepMode sleep mode selection - * \param mck value of MCK in Hz - * \param refresh refresh period - * \param user_sel user channel selection ,0 or 1 - * \param startup value of the start up time (in DACCClock) (see datasheet) -*/ -void DACC_Initialize (Dacc *pDACC, - uint8_t idDACC, - uint8_t trgEn, - uint8_t trgSel, - uint8_t word, - uint8_t sleepMode, - uint32_t mck, - uint8_t refresh,/*refresh period*/ - uint8_t user_sel,/*user channel selection*/ - uint32_t startup - ) -{ - ASSERT(1024*refresh*1000/(mck/2)<20,"Refresh preriod is too big!"); - - - /* Enable peripheral clock*/ - PMC->PMC_PCER0 = 1 << idDACC; - - /* Reset the controller */ - DACC_SoftReset(pDACC); - - /* Write to the MR register */ - DACC_CfgModeReg( pDACC, - ( trgEn & DACC_MR_TRGEN) - | ( trgSel & DACC_MR_TRGSEL) - | ( word & DACC_MR_WORD) - | ( sleepMode & DACC_MR_SLEEP) - | ( (refresh<<8) & DACC_MR_REFRESH) - | ( (user_sel<<16)& DACC_MR_USER_SEL) - | ( (startup<<24) & DACC_MR_STARTUP)); -} - - -/** - * Set the Conversion Data - * \param pDACC Pointer to an Dacc instance. - * \param channel channel to get converted value - * \return Channel converted data of the specified channel - */ -void DACC_SetConversionData(Dacc *pDACC, uint32_t data) -{ - uint32_t mr = pDACC->DACC_MR; - - if(mr & DACC_MR_WORD) - { - pDACC->DACC_CDR = data; - } - else - { - pDACC->DACC_CDR = (data&0xFFFF); - } -} - - -/** - * \brief Write converted data through PDC channel - * \param pDACC the pointer of DACC peripheral - * \param pBuffer the destination buffer - * \param size the size of the buffer -*/ -int8_t DACC_WriteBuffer(Dacc *pDACC,int16_t *pBuffer,int32_t size) -{ - - /* Check if the first PDC bank is free*/ - if ((pDACC->DACC_TCR == 0) && (pDACC->DACC_TNCR == 0)) { - - pDACC->DACC_TPR = (uint32_t) pBuffer; - pDACC->DACC_TCR = size; - pDACC->DACC_PTCR = DACC_PTCR_RXTEN; - - return 1; - } - /* Check if the second PDC bank is free*/ - else if (pDACC->DACC_TNCR == 0) { - - pDACC->DACC_TNPR = (uint32_t) pBuffer; - pDACC->DACC_TNCR = size; - - return 1; - } - else { - - return 0; - } - -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/dacc/dacc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/dacc/dacc.h deleted file mode 100644 index c2aebada..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/dacc/dacc.h +++ /dev/null @@ -1,133 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \unit - * - * !Purpose - * - * Interface for configuration the Analog-to-Digital Converter (DACC) peripheral. - * - * !Usage - * - * -# Configurate the pins for DACC - * -# Initialize the DACC with DACC_Initialize(). - * -# Select the active channel using DACC_EnableChannel() - * -# Start the conversion with DACC_StartConversion() - * -# Wait the end of the conversion by polling status with DACC_GetStatus() - * -# Finally, get the converted data using DACC_GetConvertedData() - * -*/ -#ifndef DACC_H -#define DACC_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ -#define DACC_CHANNEL_0 0 -#define DACC_CHANNEL_1 1 - - -/*------------------------------------------------------------------------------ - * Macros function of register access - *------------------------------------------------------------------------------*/ -#define DACC_CfgModeReg(pDACC, mode) { \ - (pDACC)->DACC_MR = (mode);\ - } - -#define DACC_GetModeReg(pDACC) ((pDACC)->DACC_MR) - -#define DACC_StartConversion(pDACC) ((pDACC)->DACC_CR = DACC_CR_START) - -#define DACC_SoftReset(pDACC) ((pDACC)->DACC_CR = DACC_CR_SWRST) - -#define DACC_EnableChannel(pDACC, channel) {\ - (pDACC)->DACC_CHER = (1 << (channel));\ - } - -#define DACC_DisableChannel (pDACC, channel) {\ - (pDACC)->DACC_CHDR = (1 << (channel));\ - } - -#define DACC_EnableIt(pDACC, mode) {\ - ASSERT(((mode)&0xFFF00000)== 0, "DACC bad interrupt IER");\ - (pDACC)->DACC_IER = (mode);\ - } - -#define DACC_DisableIt(pDACC, mode) {\ - ASSERT(((mode)&0xFFF00000)== 0, "DACC bad interrupt IDR");\ - (pDACC)->DACC_IDR = (mode);\ - } - -#define DACC_EnableDataReadyIt(pDACC) ((pDACC)->DACC_IER = AT91C_DACC_DRDY) - -#define DACC_GetStatus(pDACC) ((pDACC)->DACC_ISR) - -#define DACC_GetChannelStatus(pDACC) ((pDACC)->DACC_CHSR) - -#define DACC_GetInterruptMaskStatus(pDACC) ((pDACC)->DACC_IMR) - -#define DACC_GetLastConvertedData(pDACC) ((pDACC)->DACC_LCDR) - -#define DACC_CfgAnalogCtrlReg(pDACC,mode) {\ - ASSERT(((mode) & 0xFFFCFF3C)==0, "DACC bad analog control config");\ - (pDACC)->DACC_ACR = (mode);\ - } - -#define DACC_CfgExtModeReg(pDACC, extmode) {\ - ASSERT(((extmode) & 0xFF00FFFE)==0, "DACC bad extended mode config");\ - (pDACC)->DACC_EMR = (extmode);\ - } - -#define DACC_GetAnalogCtrlReg(pDACC) ((pDACC)->DACC_ACR) - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -extern void DACC_Initialize (Dacc *pDACC, - uint8_t idDACC, - uint8_t trgEn, - uint8_t trgSel, - uint8_t word, - uint8_t sleepMode, - uint32_t mck, - uint8_t refresh,/*refresh period*/ - uint8_t user_sel,/*user channel selection*/ - uint32_t startup - ); - - -extern void DACC_SetConversionData(Dacc *pDACC, uint32_t data); - -#endif //#ifndef DACC_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/efc/efc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/efc/efc.c deleted file mode 100644 index 56ace4b0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/efc/efc.c +++ /dev/null @@ -1,286 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup efc_module Working with Enhanced Embedded Flash - * The EEFC driver provides the interface to configure and use the EEFC - * peripheral. - * - * The user needs to set the number of wait states depending on the frequency used.\n - * Configure number of cycles for flash read/write operations in the FWS field of EEFC_FMR. - * - * It offers a function to send flash command to EEFC and waits for the - * flash to be ready. - * - * To send flash command, the user could do in either of following way: - *
    - *
  • Write a correct key, command and argument in EEFC_FCR.
    • - *
  • Or, Use IAP (In Application Programming) function which is executed from - * ROM directly, this allows flash programming to be done by code running in flash.
    • - *
  • Once the command is achieved, it can be detected even by polling EEFC_FSR or interrupt. - *
- * - * The command argument could be a page number,GPNVM number or nothing, it depends on - * the command itself. Some useful functions in this driver could help user tranlate physical - * flash address into a page number and vice verse. - * - * For more accurate information, please look at the EEFC section of the - * Datasheet. - * - * Related files :\n - * \ref efc.c\n - * \ref efc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of Emhance embedded Flash (EEFC) controller. - * - */ - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include -#include "efc.h" -#include -#include - - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Enables the flash ready interrupt source on the EEFC peripheral. - * - * \param efc Pointer to a Efc instance - */ -void EFC_EnableFrdyIt(Efc *efc) -{ - efc->EEFC_FMR |= EEFC_FMR_FRDY; -} - -/** - * \brief Disables the flash ready interrupt source on the EEFC peripheral. - * - * \param efc Pointer to a Efc instance - */ - -void EFC_DisableFrdyIt(Efc *efc) -{ - efc->EEFC_FMR &= ~EEFC_FMR_FRDY; -} - - -/** - * \brief Set read/write wait state on the EEFC perpherial. - * - * \param efc Pointer to a Efc instance - * \param cycles the number of wait states in cycle. - */ - -void EFC_SetWaitState(Efc *efc, uint8_t cycles) -{ - uint32_t value; - value = efc->EEFC_FMR; - value &= ~EEFC_FMR_FWS; - value |= cycles << 8; - efc->EEFC_FMR = value; -} - -/** - * \brief Returns the current status of the EEFC. - * - * \note Keep in mind that this function clears the value of some status bits (LOCKE, PROGE). - * - * \param efc Pointer to a Efc instance - */ -uint32_t EFC_GetStatus(Efc *efc) -{ - return efc->EEFC_FSR; -} - -/** - * \brief Returns the result of the last executed command. - * - * \param efc Pointer to a Efc instance - */ -uint32_t EFC_GetResult(Efc *efc) { - - return efc->EEFC_FRR; -} - -/** - * \brief Translates the given address page and offset values. - * \note The resulting values are stored in the provided variables if they are not null. - * - * \param efc Pointer to a Efc instance - * \param address Address to translate. - * \param pPage First page accessed. - * \param pOffset Byte offset in first page. - */ -void EFC_TranslateAddress( - Efc **efc, - uint32_t address, - unsigned short *pPage, - unsigned short *pOffset) -{ - Efc *pEfc; - unsigned short page; - unsigned short offset; - - SANITY_CHECK(address >= AT91C_IFLASH); - SANITY_CHECK(address <= (AT91C_IFLASH + AT91C_IFLASH_SIZE)); - - pEfc = EFC; - page = (address - AT91C_IFLASH) / AT91C_IFLASH_PAGE_SIZE; - offset = (address - AT91C_IFLASH) % AT91C_IFLASH_PAGE_SIZE; - - TRACE_DEBUG("Translated 0x%08X to page=%d and offset=%d\n\r", address, page, offset); - // Store values - if (pEfc) { - *efc = pEfc; - } - if (pPage) { - *pPage = page; - } - if (pOffset) { - *pOffset = offset; - } -} - -/** - * \brief Computes the address of a flash access given the page and offset. - * - * \param efc Pointer to a Efc instance - * \param page Page number. - * \param offset Byte offset inside page. - * \param pAddress Computed address (optional). - */ -void EFC_ComputeAddress( - Efc *efc, - unsigned short page, - unsigned short offset, - uint32_t *pAddress) -{ - uint32_t address; - SANITY_CHECK(efc); - SANITY_CHECK(page <= AT91C_IFLASH_NB_OF_PAGES); - SANITY_CHECK(offset < AT91C_IFLASH_PAGE_SIZE); - // Compute address - address = AT91C_IFLASH + page * AT91C_IFLASH_PAGE_SIZE + offset; - // Store result - if (pAddress) { - *pAddress = address; - } -} - -/** - * \brief Starts the executing the given command on the EEFC and returns as soon as the command is started. - * - * \note It does NOT set the FMCN field automatically. - * \param efc Pointer to a Efc instance - * \param command Command to execute. - * \param argument Command argument (should be 0 if not used). - */ -void EFC_StartCommand(Efc *efc, uint8_t command, unsigned short argument) -{ - // Check command & argument - switch (command) { - - case EFC_FCMD_WP: - case EFC_FCMD_WPL: - case EFC_FCMD_EWP: - case EFC_FCMD_EWPL: - case EFC_FCMD_SLB: - case EFC_FCMD_CLB: - ASSERT(argument < AT91C_IFLASH_NB_OF_PAGES, - "-F- Embedded flash has only %d pages\n\r", - AT91C_IFLASH_NB_OF_PAGES); - break; - - case EFC_FCMD_SFB: - case EFC_FCMD_CFB: - ASSERT(argument < 2, "-F- Embedded flash has only %d GPNVMs\n\r", 2); - break; - - case EFC_FCMD_GETD: - case EFC_FCMD_EA: - case EFC_FCMD_GLB: - case EFC_FCMD_GFB: - case EFC_FCMD_STUI: - ASSERT(argument == 0, "-F- Argument is meaningless for the given command.\n\r"); - break; - - default: ASSERT(0, "-F- Unknown command %d\n\r", command); - } - - // Start command Embedded flash - ASSERT((efc->EEFC_FSR & EEFC_FMR_FRDY) == EEFC_FMR_FRDY, "-F- EEFC is not ready\n\r"); - efc->EEFC_FCR = (0x5A << 24) | (argument << 8) | command; -} - -/** - * \brief Performs the given command and wait until its completion (or an error). - * - * \param efc Pointer to a Efc instance - * \param command Command to perform. - * \param argument Optional command argument. - * \return 0 if successful, otherwise returns an error code. - */ - -uint8_t EFC_PerformCommand(Efc *efc, uint8_t command, unsigned short argument) -{ - -#if defined(flash) || defined(USE_IAP_FEATURE) - // Pointer on IAP function in ROM - static uint32_t (*IAP_PerformCommand)(uint32_t, uint32_t); - IAP_PerformCommand = (uint32_t (*)(uint32_t, uint32_t)) *((uint32_t *) CHIP_FLASH_IAP_ADDRESS); - IAP_PerformCommand(0, (0x5A << 24) | (argument << 8) | command); - return (efc->EEFC_FSR & (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE)); - -#else - uint32_t status; - efc->EEFC_FCR = (0x5A << 24) | (argument << 8) | command; - do { - - status = efc->EEFC_FSR; - } - while ((status & EEFC_FSR_FRDY) != EEFC_FSR_FRDY); - - return (status & (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE)); -#endif -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/efc/efc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/efc/efc.h deleted file mode 100644 index 84fabc38..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/efc/efc.h +++ /dev/null @@ -1,112 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * Interface for configuration the Enhanced Embedded Flash Controller (EEFC) peripheral. - * - * \par Usage - * - * -# Enable/disable %flash ready interrupt sources using EFC_EnableFrdyIt() - * and EFC_DisableFrdyIt(). - * -# Translates the given address into which EEFC, page and offset values - * for difference density %flash memory using EFC_TranslateAddress(). - * -# Computes the address of a %flash access given the EFC, page and offset - * for difference density %flash memory using EFC_ComputeAddress(). - * -# Start the executing command with EFC_StartCommand() - * -# Retrieve the current status of the EFC using EFC_GetStatus(). - * -# Retrieve the result of the last executed command with EFC_GetResult(). - */ - -#ifndef EFC_H -#define EFC_H - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ -/* EFC command */ -#define EFC_FCMD_GETD 0x00 -#define EFC_FCMD_WP 0x01 -#define EFC_FCMD_WPL 0x02 -#define EFC_FCMD_EWP 0x03 -#define EFC_FCMD_EWPL 0x04 -#define EFC_FCMD_EA 0x05 -#define EFC_FCMD_SLB 0x08 -#define EFC_FCMD_CLB 0x09 -#define EFC_FCMD_GLB 0x0A -#define EFC_FCMD_SFB 0x0B -#define EFC_FCMD_CFB 0x0C -#define EFC_FCMD_GFB 0x0D -#define EFC_FCMD_STUI 0x0E -#define EFC_FCMD_SPUI 0x0F - -/* The IAP function entry addreass */ -#define CHIP_FLASH_IAP_ADDRESS (0x00800008) - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void EFC_EnableFrdyIt(Efc *efc); - -extern void EFC_DisableFrdyIt(Efc *efc); - -extern void EFC_SetWaitState(Efc *efc, uint8_t cycles); - -extern void EFC_TranslateAddress( - Efc **pEfc, - uint32_t address, - unsigned short *pPage, - unsigned short *pOffset); - -extern void EFC_ComputeAddress( - Efc *efc, - unsigned short page, - unsigned short offset, - uint32_t *pAddress); - -extern void EFC_StartCommand( - Efc *efc, - uint8_t command, - unsigned short argument); - -extern uint8_t EFC_PerformCommand( - Efc *efc, - uint8_t command, - unsigned short argument); - -extern uint32_t EFC_GetStatus(Efc *efc); - -extern uint32_t EFC_GetResult(Efc *efc); - -#endif //#ifndef EFC_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/flash/flashd.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/flash/flashd.c deleted file mode 100644 index c0e66913..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/flash/flashd.c +++ /dev/null @@ -1,494 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup flashd_module Flash Memory Interface - * The flash driver manages the programming, erasing, locking and unlocking sequences - * with dedicated commands. - * - * To implement flash programing operation, the user has to follow these few steps : - *
    - *
  • Configue flash wait states to initializes the flash.
    • - *
  • Checks whether a region to be programmed is locked.
    • - *
  • Unlocks the user region to be programmed if the region have locked before.
    • - *
  • Erases the user page before program (optional).
    • - *
  • Writes the user page from the page buffer.
    • - *
  • Locks the region of programmed area if any.
    • - *
- * - * Writing 8-bit and 16-bit data is not allowed and may lead to unpredictable data corruption. - * A check of this validity and padding for 32-bit alignment should be done in write algorithm. - - * Lock/unlock range associated with the user address range is automatically translated. - * - * This security bit can be enabled through the command "Set General Purpose NVM Bit 0". - * - * A 128-bit factory programmed unique ID could be read to serve several purposes. - * - * The driver accesses the flash memory by calling the lowlevel module provided in \ref efc_module. - * For more accurate information, please look at the EEFC section of the Datasheet. - * - * Related files :\n - * \ref flashd.c\n - * \ref flashd.h.\n - * \ref efc.c\n - * \ref efc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * The flash driver provides the unified interface for flash program operations. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "flashd.h" -#include - -#include -#include -#include -#include - -#include - - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Computes the lock range associated with the given address range. - * - * \param start Start address of lock range. - * \param end End address of lock range. - * \param pActualStart Actual start address of lock range. - * \param pActualEnd Actual end address of lock range. - */ -static void ComputeLockRange( - uint32_t start, - uint32_t end, - uint32_t *pActualStart, - uint32_t *pActualEnd) -{ - Efc *pStartEfc, *pEndEfc; - uint16_t startPage, endPage; - uint16_t numPagesInRegion; - uint16_t actualStartPage, actualEndPage; - - // Convert start and end address in page numbers - EFC_TranslateAddress(&pStartEfc, start, &startPage, 0); - EFC_TranslateAddress(&pEndEfc, end, &endPage, 0); - - // Find out the first page of the first region to lock - numPagesInRegion = AT91C_IFLASH_LOCK_REGION_SIZE / AT91C_IFLASH_PAGE_SIZE; - actualStartPage = startPage - (startPage % numPagesInRegion); - actualEndPage = endPage; - if ((endPage % numPagesInRegion) != 0) { - - actualEndPage += numPagesInRegion - (endPage % numPagesInRegion); - } - // Store actual page numbers - EFC_ComputeAddress(pStartEfc, actualStartPage, 0, pActualStart); - EFC_ComputeAddress(pEndEfc, actualEndPage, 0, pActualEnd); - TRACE_DEBUG("Actual lock range is 0x%06X - 0x%06X\n\r", *pActualStart, *pActualEnd); -} - - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initializes the flash driver. - * - * \param mck Master clock frequency in Hz. - */ - -void FLASHD_Initialize(uint32_t mck) -{ - EFC_DisableFrdyIt(EFC); - if ((mck/1000000) >= 64) { - EFC_SetWaitState(EFC, 2); - } - else if ((mck/1000000) >= 50) { - EFC_SetWaitState(EFC, 1); - } - else { - EFC_SetWaitState(EFC, 0); - } -} - -/** - * \brief Erases the entire flash. - * - * \param address Flash start address. - * \return 0 if successful; otherwise returns an error code. - */ -uint8_t FLASHD_Erase(uint32_t address) -{ - Efc *pEfc; - uint16_t page; - uint16_t offset; - uint8_t error; - SANITY_CHECK((address >=AT91C_IFLASH) || (address <= (AT91C_IFLASH + AT91C_IFLASH_SIZE))); - // Translate write address - EFC_TranslateAddress(&pEfc, address, &page, &offset); - error = EFC_PerformCommand(pEfc, EFC_FCMD_EA, 0); - return error; -} - - -static uint8_t pPageBuffer[AT91C_IFLASH_PAGE_SIZE]; -/** - * \brief Writes a data buffer in the internal flash - * - * \note This function works in polling mode, and thus only returns when the - * data has been effectively written. - * \param address Write address. - * \param pBuffer Data buffer. - * \param size Size of data buffer in bytes. - * \return 0 if successful, otherwise returns an error code. - */ -uint8_t FLASHD_Write( - uint32_t address, - const void *pBuffer, - uint32_t size) -{ - Efc *pEfc; - uint16_t page; - uint16_t offset; - uint32_t writeSize; - uint32_t pageAddress; - uint16_t padding; - uint8_t error; - - uint32_t sizeTmp; - uint32_t *pAlignedDestination; - uint32_t *pAlignedSource; - - SANITY_CHECK(pBuffer); - SANITY_CHECK(address >=AT91C_IFLASH); - SANITY_CHECK((address + size) <= (AT91C_IFLASH + AT91C_IFLASH_SIZE)); - // Translate write address - EFC_TranslateAddress(&pEfc, address, &page, &offset); - - // Write all pages - while (size > 0) { - - // Copy data in temporary buffer to avoid alignment problems - writeSize = min(AT91C_IFLASH_PAGE_SIZE - offset, size); - EFC_ComputeAddress(pEfc, page, 0, &pageAddress); - padding = AT91C_IFLASH_PAGE_SIZE - offset - writeSize; - - // Pre-buffer data - memcpy(pPageBuffer, (void *) pageAddress, offset); - - // Buffer data - memcpy(pPageBuffer + offset, pBuffer, writeSize); - - // Post-buffer data - memcpy(pPageBuffer + offset + writeSize, (void *) (pageAddress + offset + writeSize), padding); - - // Write page - // Writing 8-bit and 16-bit data is not allowed - // and may lead to unpredictable data corruption - pAlignedDestination = (uint32_t*)pageAddress; - pAlignedSource = (uint32_t*)pPageBuffer; - sizeTmp = AT91C_IFLASH_PAGE_SIZE; - while (sizeTmp >= 4) { - - *pAlignedDestination++ = *pAlignedSource++; - sizeTmp -= 4; - } - - // Send writing command - error = EFC_PerformCommand(pEfc, EFC_FCMD_EWP, page); - if (error) { - - return error; - } - - // Progression - address += AT91C_IFLASH_PAGE_SIZE; - pBuffer = (void *) ((uint32_t) pBuffer + writeSize); - size -= writeSize; - page++; - offset = 0; - } - - return 0; -} -/** - * \brief Locks all the regions in the given address range. The actual lock range is - * reported through two output parameters. - * \param address Start address of lock range. - * \param end End address of lock range. - * \param pActualStart Start address of the actual lock range (optional). - * \param pActualEnd End address of the actual lock range (optional). - * \return 0 if successful, otherwise returns an error code. - */ -uint8_t FLASHD_Lock( - uint32_t start, - uint32_t end, - uint32_t *pActualStart, - uint32_t *pActualEnd) -{ - Efc *pEfc; - uint32_t actualStart, actualEnd; - uint16_t startPage, endPage; - uint8_t error; - uint16_t numPagesInRegion = AT91C_IFLASH_LOCK_REGION_SIZE / AT91C_IFLASH_PAGE_SIZE; - - // Compute actual lock range and store it - ComputeLockRange(start, end, &actualStart, &actualEnd); - if (pActualStart) { - - *pActualStart = actualStart; - } - if (pActualEnd) { - - *pActualEnd = actualEnd; - } - - // Compute page numbers - EFC_TranslateAddress(&pEfc, actualStart, &startPage, 0); - EFC_TranslateAddress(0, actualEnd, &endPage, 0); - - // Lock all pages - while (startPage < endPage) { - - error = EFC_PerformCommand(pEfc, EFC_FCMD_SLB, startPage); - if (error) { - - return error; - } - startPage += numPagesInRegion; - } - - return 0; -} - -/** - * \brief Unlocks all the regions in the given address range. The actual unlock range is - * reported through two output parameters. - * \param address Start address of unlock range. - * \param end End address of unlock range. - * \param pActualStart Start address of the actual unlock range (optional). - * \param pActualEnd End address of the actual unlock range (optional). - * \return 0 if successful, otherwise returns an error code. - */ -uint8_t FLASHD_Unlock( - uint32_t start, - uint32_t end, - uint32_t *pActualStart, - uint32_t *pActualEnd) -{ - Efc *pEfc; - uint32_t actualStart, actualEnd; - uint16_t startPage, endPage; - uint8_t error; - uint16_t numPagesInRegion = AT91C_IFLASH_LOCK_REGION_SIZE / AT91C_IFLASH_PAGE_SIZE; - - // Compute actual unlock range and store it - ComputeLockRange(start, end, &actualStart, &actualEnd); - if (pActualStart) { - - *pActualStart = actualStart; - } - if (pActualEnd) { - - *pActualEnd = actualEnd; - } - - // Compute page numbers - EFC_TranslateAddress(&pEfc, actualStart, &startPage, 0); - EFC_TranslateAddress(0, actualEnd, &endPage, 0); - - // Unlock all pages - while (startPage < endPage) { - - error = EFC_PerformCommand(pEfc, EFC_FCMD_CLB, startPage); - if (error) { - - return error; - } - startPage += numPagesInRegion; - } - return 0; -} - -/** - * \brief Returns the number of locked regions inside the given address range. - * - * \param address Start address of range - * \param end End address of range. - */ -uint8_t FLASHD_IsLocked(uint32_t start, uint32_t end) -{ - Efc *pEfc; - uint16_t startPage, endPage; - uint8_t startRegion, endRegion; - uint32_t numPagesInRegion; - uint32_t status; - uint8_t error; - uint32_t numLockedRegions = 0; - - SANITY_CHECK(end >= start); - SANITY_CHECK((start >=AT91C_IFLASH) && (end <= AT91C_IFLASH + AT91C_IFLASH_SIZE)); - - // Compute page numbers - EFC_TranslateAddress(&pEfc, start, &startPage, 0); - EFC_TranslateAddress(0, end, &endPage, 0); - - // Compute region numbers - numPagesInRegion = AT91C_IFLASH_LOCK_REGION_SIZE / AT91C_IFLASH_PAGE_SIZE; - startRegion = startPage / numPagesInRegion; - endRegion = endPage / numPagesInRegion; - if ((endPage % numPagesInRegion) != 0) { - - endRegion++; - } - - // Retrieve lock status - error = EFC_PerformCommand(pEfc, EFC_FCMD_GLB, 0); - ASSERT(!error, "-F- Error while trying to fetch lock bits status (0x%02X)\n\r", error); - status = EFC_GetResult(pEfc); - - // Check status of each involved region - while (startRegion < endRegion) { - - if ((status & (1 << startRegion)) != 0) { - - numLockedRegions++; - } - startRegion++; - } - - return numLockedRegions; -} - -/** - * \brief Check if the given GPNVM bit is set or not. - * - * \param gpnvm GPNVM bit index. - * \returns 1 if the given GPNVM bit is currently set; otherwise returns 0. - */ -uint8_t FLASHD_IsGPNVMSet(uint8_t gpnvm) -{ - uint8_t error; - uint32_t status; - - SANITY_CHECK(gpnvm < 2); - - // Get GPNVMs status - error = EFC_PerformCommand(EFC, EFC_FCMD_GFB, 0); - ASSERT(!error, "-F- Error while trying to fetch GPNVMs status (0x%02X)\n\r", error); - status = EFC_GetResult(EFC); - - // Check if GPNVM is set - if ((status & (1 << gpnvm)) != 0) { - return 1; - } - else { - return 0; - } -} -/** - * \brief Sets the selected GPNVM bit. - * - * \param gpnvm GPNVM bit index. - * \returns 0 if successful; otherwise returns an error code. - */ -uint8_t FLASHD_SetGPNVM(uint8_t gpnvm) -{ - SANITY_CHECK(gpnvm < 2); - - if (!FLASHD_IsGPNVMSet(gpnvm)) { - - return EFC_PerformCommand(EFC, EFC_FCMD_SFB, gpnvm); - } - else { - - return 0; - } -} - -/** - * \brief Clears the selected GPNVM bit. - * - * \param gpnvm GPNVM bit index. - * \returns 0 if successful; otherwise returns an error code. - */ -uint8_t FLASHD_ClearGPNVM(uint8_t gpnvm) -{ - SANITY_CHECK(gpnvm < 2); - - if (FLASHD_IsGPNVMSet(gpnvm)) { - - return EFC_PerformCommand(EFC, EFC_FCMD_CFB, gpnvm); - } - else { - - return 0; - } -} -/** - * \brief Read the unique ID. - * - * \param uniqueID pointer on a 4bytes char containing the unique ID value. - * \returns 0 if successful; otherwise returns an error code. - */ -uint8_t FLASHD_ReadUniqueID (uint32_t * uniqueID) -{ - uint8_t error; - SANITY_CHECK(uniqueID != NULL); - - uniqueID[0] = 0; - uniqueID[1] = 0; - uniqueID[2] = 0; - uniqueID[3] = 0; - - EFC_StartCommand(EFC, EFC_FCMD_STUI, 0); - - uniqueID[0] = *(uint32_t *)AT91C_IFLASH; - uniqueID[1] = *(uint32_t *)(AT91C_IFLASH + 4); - uniqueID[2] = *(uint32_t *)(AT91C_IFLASH + 8); - uniqueID[3] = *(uint32_t *)(AT91C_IFLASH + 12); - - error = EFC_PerformCommand(EFC, EFC_FCMD_SPUI, 0); - if (error) return error; - - return 0; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/flash/flashd.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/flash/flashd.h deleted file mode 100644 index 14b765b2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/flash/flashd.h +++ /dev/null @@ -1,84 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- -*/ - -/** - * \file - * - * The flash driver provides the unified interface for flash program operations. - * - */ - -#ifndef FLASHD_H -#define FLASHD_H - -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void FLASHD_Initialize(uint32_t mck); - -extern uint8_t FLASHD_Erase(uint32_t address); - -extern uint8_t FLASHD_Write( - uint32_t address, - const void *pBuffer, - uint32_t size); - -extern uint8_t FLASHD_Lock( - uint32_t start, - uint32_t end, - uint32_t *pActualStart, - uint32_t *pActualEnd); - -extern uint8_t FLASHD_Unlock( - uint32_t start, - uint32_t end, - uint32_t *pActualStart, - uint32_t *pActualEnd); - -extern uint8_t FLASHD_IsLocked( - uint32_t start, - uint32_t end); - -extern uint8_t FLASHD_SetGPNVM(uint8_t gpnvm); - -extern uint8_t FLASHD_ClearGPNVM(uint8_t gpnvm); - -extern uint8_t FLASHD_IsGPNVMSet(uint8_t gpnvm); - -#define FLASHD_IsSecurityBitSet() FLASHD_IsGPNVMSet(0) - -#define FLASHD_SetSecurityBit() FLASHD_SetGPNVM(0) - -extern uint8_t FLASHD_ReadUniqueID(uint32_t * uniqueID); - -#endif //#ifndef FLASHD_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/color.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/color.h deleted file mode 100644 index 3258b82c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/color.h +++ /dev/null @@ -1,85 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef COLOR_H -#define COLOR_H - -/** - * \file - * - * RGB 24-bits color table definition. - * - */ - -/* - * RGB 24 Bpp - * RGB 888 - * R7R6R5R4 R3R2R1R0 G7G6G5G4 G3G2G1G0 B7B6B5B4 B3B2B1B0 - */ -#define COLOR_BLACK 0x000000 -#define COLOR_WHITE 0xFFFFFF - -#define COLOR_BLUE 0x0000FF -#define COLOR_GREEN 0x00FF00 -#define COLOR_RED 0xFF0000 - -#define COLOR_NAVY 0x000080 -#define COLOR_DARKBLUE 0x00008B -#define COLOR_DARKGREEN 0x006400 -#define COLOR_DARKCYAN 0x008B8B -#define COLOR_CYAN 0x00FFFF -#define COLOR_TURQUOISE 0x40E0D0 -#define COLOR_INDIGO 0x4B0082 -#define COLOR_DARKRED 0x800000 -#define COLOR_OLIVE 0x808000 -#define COLOR_GRAY 0x808080 -#define COLOR_SKYBLUE 0x87CEEB -#define COLOR_BLUEVIOLET 0x8A2BE2 -#define COLOR_LIGHTGREEN 0x90EE90 -#define COLOR_DARKVIOLET 0x9400D3 -#define COLOR_YELLOWGREEN 0x9ACD32 -#define COLOR_BROWN 0xA52A2A -#define COLOR_DARKGRAY 0xA9A9A9 -#define COLOR_SIENNA 0xA0522D -#define COLOR_LIGHTBLUE 0xADD8E6 -#define COLOR_GREENYELLOW 0xADFF2F -#define COLOR_SILVER 0xC0C0C0 -#define COLOR_LIGHTGREY 0xD3D3D3 -#define COLOR_LIGHTCYAN 0xE0FFFF -#define COLOR_VIOLET 0xEE82EE -#define COLOR_AZUR 0xF0FFFF -#define COLOR_BEIGE 0xF5F5DC -#define COLOR_MAGENTA 0xFF00FF -#define COLOR_TOMATO 0xFF6347 -#define COLOR_GOLD 0xFFD700 -#define COLOR_ORANGE 0xFFA500 -#define COLOR_SNOW 0xFFFAFA -#define COLOR_YELLOW 0xFFFF00 - -#endif /* #define COLOR_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/draw.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/draw.c deleted file mode 100644 index 4e1975be..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/draw.c +++ /dev/null @@ -1,333 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of draw function on LCD, Include draw text, image - * and basic shapes (line, rectangle, circle). - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include - -#include "draw.h" -#include "font.h" -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Fills the given LCD buffer with a particular color. - * - * \param color Fill color. - */ -void LCDD_Fill(uint32_t color) -{ - uint32_t i; - - LCD_SetCursor(0, 0); - LCD_WriteRAM_Prepare(); - for (i = 0; i < (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT); i++) { - - LCD_WriteRAM(color); - } -} - -/** - * \brief Draw a pixel on LCD of given color. - * - * \param x X-coordinate of pixel. - * \param y Y-coordinate of pixel. - * \param color Pixel color. - */ -void LCDD_DrawPixel( - uint32_t x, - uint32_t y, - uint32_t color) -{ - LCD_SetCursor(x, y); - LCD_WriteRAM_Prepare(); - LCD_WriteRAM(color); -} - -/** - * \brief Read a pixel from LCD. - * - * \param x X-coordinate of pixel. - * \param y Y-coordinate of pixel. - * - * \return color Readed pixel color. - */ -uint32_t LCDD_ReadPixel( - uint32_t x, - uint32_t y) -{ - uint32_t color; - - LCD_SetCursor(x, y); - LCD_ReadRAM_Prepare(); - color = LCD_ReadRAM(); - - return color; -} - -/* - * \brief Draw a line on LCD, horizontal and vertical line are supported. - * - * \param x X-coordinate of line start. - * \param y Y-coordinate of line start. - * \param length line length. - * \param direction line direction: 0 - horizontal, 1 - vertical. - * \param color Pixel color. - */ -void LCDD_DrawLine( - uint32_t x, - uint32_t y, - uint32_t length, - uint32_t direction, - uint32_t color) -{ - uint32_t i = 0; - - LCD_SetCursor(x, y); - - if(direction == DIRECTION_HLINE) { - LCD_WriteRAM_Prepare(); - for(i = 0; i < length; i++) { - LCD_WriteRAM(color); - } - } - else { - for(i = 0; i < length; i++) { - LCD_WriteRAM_Prepare(); - LCD_WriteRAM(color); - y++; - LCD_SetCursor(x, y); - } - } -} - -/* - * \brief Draws a rectangle on LCD, at the given coordinates. - * - * \param x X-coordinate of upper-left rectangle corner. - * \param y Y-coordinate of upper-left rectangle corner. - * \param width Rectangle width in pixels. - * \param height Rectangle height in pixels. - * \param color Rectangle color. - */ -void LCDD_DrawRectangle( - uint32_t x, - uint32_t y, - uint32_t width, - uint32_t height, - uint32_t color) -{ - LCDD_DrawLine(x, y, width, DIRECTION_HLINE, color); - LCDD_DrawLine(x, (y + height), width, DIRECTION_HLINE, color); - - LCDD_DrawLine(x, y, height, DIRECTION_VLINE, color); - LCDD_DrawLine((x + width), y, height, DIRECTION_VLINE, color); -} - -/* - * \brief Draws a rectangle with fill inside on LCD, at the given coordinates. - * - * \param x X-coordinate of upper-left rectangle corner. - * \param y Y-coordinate of upper-left rectangle corner. - * \param width Rectangle width in pixels. - * \param height Rectangle height in pixels. - * \param color Rectangle color. - */ -void LCDD_DrawRectangleWithFill( - uint32_t x, - uint32_t y, - uint32_t width, - uint32_t height, - uint32_t color) -{ - uint32_t i; - - for (i = 0; i < height; i++) { - LCDD_DrawLine(x, y+i, width, DIRECTION_HLINE, color); - } -} - -/** - * \brief Draws a circle on LCD, at the given coordinates. - * - * \param x X-coordinate of circle center. - * \param y Y-coordinate of circle center. - * \param r circle radius. - * \param color circle color. - */ -void LCDD_DrawCircle( - uint32_t x, - uint32_t y, - uint32_t r, - uint32_t color) -{ - signed int d; /* Decision Variable */ - uint32_t curX; /* Current X Value */ - uint32_t curY; /* Current Y Value */ - - d = 3 - (r << 1); - curX = 0; - curY = r; - - while (curX <= curY) - { - LCDD_DrawPixel(x + curX, y + curY, color); - LCDD_DrawPixel(x + curX, y - curY, color); - LCDD_DrawPixel(x - curX, y + curY, color); - LCDD_DrawPixel(x - curX, y - curY, color); - LCDD_DrawPixel(x + curY, y + curX, color); - LCDD_DrawPixel(x + curY, y - curX, color); - LCDD_DrawPixel(x - curY, y + curX, color); - LCDD_DrawPixel(x - curY, y - curX, color); - - if (d < 0) { - d += (curX << 2) + 6; - } - else { - d += ((curX - curY) << 2) + 10; - curY--; - } - curX++; - } -} - -/** - * \brief Draws a string inside a LCD buffer, at the given coordinates. Line breaks - * will be honored. - * - * \param x X-coordinate of string top-left corner. - * \param y Y-coordinate of string top-left corner. - * \param pString String to display. - * \param color String color. - */ -void LCDD_DrawString( - uint32_t x, - uint32_t y, - const uint8_t *pString, - uint32_t color) -{ - unsigned xorg = x; - - while (*pString != 0) { - if (*pString == '\n') { - - y += gFont.height + 2; - x = xorg; - } - else { - - LCDD_DrawChar(x, y, *pString, color); - x += gFont.width + 2; - } - pString++; - } -} - -/** - * \brief Returns the width & height in pixels that a string will occupy on the screen - * if drawn using LCDD_DrawString. - * - * \param pString String. - * \param pWidth Pointer for storing the string width (optional). - * \param pHeight Pointer for storing the string height (optional). - * - * \return String width in pixels. - */ -void LCDD_GetStringSize( - const uint8_t *pString, - uint32_t *pWidth, - uint32_t *pHeight) -{ - uint32_t width = 0; - uint32_t height = gFont.height; - - while (*pString != 0) { - - if (*pString == '\n') { - - height += gFont.height + 2; - } - else { - - width += gFont.width + 2; - } - pString++; - } - - if (width > 0) width -= 2; - - if (pWidth) *pWidth = width; - if (pHeight) *pHeight = height; -} - -/* - * \brief Draw a raw image at given position on LCD. - * - * \param x X-coordinate of image start. - * \param y Y-coordinate of image start. - * \param pImage Image buffer. - * \param width Image width. - * \param height Image height. - */ -void LCDD_DrawImage( - uint32_t x, - uint32_t y, - const uint8_t *pImage, - uint32_t width, - uint32_t height) -{ - uint32_t row, col; - - for(row = y; row < (y + height); row++) { - LCD_SetCursor(x, row); - LCD_WriteRAM_Prepare(); - for(col = x; col < (x + width); col++) { - LCD_D() = *pImage++; - LCD_D() = *pImage++; - LCD_D() = *pImage++; - } - } -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/draw.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/draw.h deleted file mode 100644 index e7fb7a57..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/draw.h +++ /dev/null @@ -1,114 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - /** - * \file - * - * Interface for draw function on LCD. - * - */ - -#ifndef DRAW_H -#define DRAW_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** Horizontal direction line definition */ -#define DIRECTION_HLINE 0 -/** Vertical direction line definition */ -#define DIRECTION_VLINE 1 - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -extern void LCDD_Fill(uint32_t color); - -extern void LCDD_DrawPixel( - uint32_t x, - uint32_t y, - uint32_t c); - -extern uint32_t LCDD_ReadPixel( - uint32_t x, - uint32_t y); - -extern void LCDD_DrawLine( - uint32_t x, - uint32_t y, - uint32_t length, - uint32_t direction, - uint32_t color); - -extern void LCDD_DrawRectangle( - uint32_t x, - uint32_t y, - uint32_t width, - uint32_t height, - uint32_t color); - -extern void LCDD_DrawRectangleWithFill( - uint32_t x, - uint32_t y, - uint32_t width, - uint32_t height, - uint32_t color); - -extern void LCDD_DrawCircle( - uint32_t x, - uint32_t y, - uint32_t r, - uint32_t color); - -extern void LCDD_DrawString( - uint32_t x, - uint32_t y, - const uint8_t *pString, - uint32_t color); - -extern void LCDD_GetStringSize( - const uint8_t *pString, - uint32_t *pWidth, - uint32_t *pHeight); - -extern void LCDD_DrawImage( - uint32_t x, - uint32_t y, - const uint8_t *pImage, - uint32_t width, - uint32_t height); - -#endif /* #ifndef DRAW_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/font.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/font.c deleted file mode 100644 index 4a161298..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/font.c +++ /dev/null @@ -1,95 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of draw font on LCD. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "color.h" -#include "font.h" -#include "draw.h" -#include "font10x14.h" -#include - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** Global variable describing the font being instancied. */ -const Font gFont = {10, 14}; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Draws an ASCII character on LCD. - * - * \param x X-coordinate of character upper-left corner. - * \param y Y-coordinate of character upper-left corner. - * \param c Character to output. - * \param color Character color. -*/ -void LCDD_DrawChar( - uint32_t x, - uint32_t y, - uint8_t c, - uint32_t color) -{ - uint32_t row, col; - - SANITY_CHECK((c >= 0x20) && (c <= 0x7F)); - - for (col = 0; col < 10; col++) { - - for (row = 0; row < 8; row++) { - - if ((pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1) { - - LCDD_DrawPixel(x+col, y+row, color); - } - } - for (row = 0; row < 6; row++) { - - if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1) { - - LCDD_DrawPixel(x+col, y+row+8, color); - } - } - } -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/font.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/font.h deleted file mode 100644 index d46cf6c4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/font.h +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for draw font on LCD. - * - */ - -/** - * - * \section Purpose - * - * The font.h files declares a font structure and a LCDD_DrawChar function - * that must be implemented by a font definition file to be used with the - * LCDD_DrawString method of draw.h. - * - * The font10x14.c implements the necessary variable and function for a 10x14 - * font. - * - * \section Usage - * - * -# Declare a gFont global variable with the necessary Font information. - * -# Implement an LCDD_DrawChar function which displays the specified - * character on the LCD. - * -# Use the LCDD_DrawString method defined in draw.h to display a complete - * string. - */ - -#ifndef FONT_H -#define FONT_H - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - - -/** Describes the font (width, height, supported characters, etc.) used by - * the LCD driver draw API. - */ -typedef struct _Font { - /* Font width in pixels. */ - uint8_t width; - /* Font height in pixels. */ - uint8_t height; -} Font; - -/*---------------------------------------------------------------------------- - * Variables - *----------------------------------------------------------------------------*/ - -/** Global variable describing the font being instancied. */ -extern const Font gFont; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void LCDD_DrawChar( - uint32_t x, - uint32_t y, - uint8_t c, - uint32_t color); - -#endif /* #ifndef FONT_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/font10x14.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/font10x14.h deleted file mode 100644 index 2ce2589e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/font10x14.h +++ /dev/null @@ -1,236 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - /** - * \file - * - * Font 10x14 table definition. - * - */ - -#ifndef LCD_FONT_10x14_H -#define LCD_FONT_10x14_H - -/** Char set of font 10x14 */ -const uint8_t pCharset10x14[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xCC, - 0xFF, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0C, 0xC0, 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, - 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, - 0x0C, 0x60, 0x1E, 0x70, 0x3F, 0x30, 0x33, 0x30, 0xFF, 0xFC, - 0xFF, 0xFC, 0x33, 0x30, 0x33, 0xF0, 0x39, 0xE0, 0x18, 0xC0, - 0x60, 0x00, 0xF0, 0x0C, 0xF0, 0x3C, 0x60, 0xF0, 0x03, 0xC0, - 0x0F, 0x00, 0x3C, 0x18, 0xF0, 0x3C, 0xC0, 0x3C, 0x00, 0x18, - 0x3C, 0xF0, 0x7F, 0xF8, 0xC3, 0x1C, 0xC7, 0x8C, 0xCF, 0xCC, - 0xDC, 0xEC, 0x78, 0x78, 0x30, 0x30, 0x00, 0xFC, 0x00, 0xCC, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xEC, 0x00, - 0xF8, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0F, 0xC0, 0x3F, 0xF0, 0x78, 0x78, - 0x60, 0x18, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0x60, 0x18, - 0x78, 0x78, 0x3F, 0xF0, 0x0F, 0xC0, 0x00, 0x00, 0x00, 0x00, - 0x0C, 0x60, 0x0E, 0xE0, 0x07, 0xC0, 0x03, 0x80, 0x3F, 0xF8, - 0x3F, 0xF8, 0x03, 0x80, 0x07, 0xC0, 0x0E, 0xE0, 0x0C, 0x60, - 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3F, 0xF0, - 0x3F, 0xF0, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, - 0x00, 0x44, 0x00, 0xEC, 0x00, 0xF8, 0x00, 0x70, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, - 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, - 0x00, 0x18, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x18, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x0C, 0x00, 0x3C, 0x00, 0xF0, 0x03, 0xC0, - 0x0F, 0x00, 0x3C, 0x00, 0xF0, 0x00, 0xC0, 0x00, 0x00, 0x00, - 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0xFC, 0xC1, 0xCC, 0xC3, 0x8C, - 0xC7, 0x0C, 0xCE, 0x0C, 0xFC, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0, - 0x00, 0x00, 0x00, 0x00, 0x30, 0x0C, 0x70, 0x0C, 0xFF, 0xFC, - 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, - 0x30, 0x0C, 0x70, 0x1C, 0xE0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, - 0xC1, 0xCC, 0xC3, 0x8C, 0xE7, 0x0C, 0x7E, 0x0C, 0x3C, 0x0C, - 0x30, 0x30, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x7F, 0xF8, 0x3C, 0xF0, - 0x03, 0xC0, 0x07, 0xC0, 0x0E, 0xC0, 0x1C, 0xC0, 0x38, 0xC0, - 0x70, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xC0, 0x00, 0xC0, - 0xFC, 0x30, 0xFC, 0x38, 0xCC, 0x1C, 0xCC, 0x0C, 0xCC, 0x0C, - 0xCC, 0x0C, 0xCC, 0x0C, 0xCE, 0x1C, 0xC7, 0xF8, 0xC3, 0xF0, - 0x3F, 0xF0, 0x7F, 0xF8, 0xE3, 0x1C, 0xC3, 0x0C, 0xC3, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x9C, 0x71, 0xF8, 0x30, 0xF0, - 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC3, 0xFC, - 0xC7, 0xFC, 0xCE, 0x00, 0xDC, 0x00, 0xF8, 0x00, 0xF0, 0x00, - 0x3C, 0xF0, 0x7F, 0xF8, 0xE7, 0x9C, 0xC3, 0x0C, 0xC3, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0, - 0x3C, 0x00, 0x7E, 0x00, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x1C, - 0xC3, 0x38, 0xC3, 0x70, 0xE7, 0xE0, 0x7F, 0xC0, 0x3F, 0x80, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x60, 0x3C, 0xF0, - 0x3C, 0xF0, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x44, 0x3C, 0xEC, - 0x3C, 0xF8, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, - 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0x00, 0x00, - 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, - 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, - 0x00, 0x00, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x38, 0x70, - 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00, - 0x30, 0x00, 0x70, 0x00, 0xE0, 0x00, 0xC0, 0x00, 0xC1, 0xEC, - 0xC3, 0xEC, 0xC3, 0x00, 0xE6, 0x00, 0x7E, 0x00, 0x3C, 0x00, - 0x30, 0xF0, 0x71, 0xF8, 0xE3, 0x9C, 0xC3, 0x0C, 0xC3, 0xFC, - 0xC3, 0xFC, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0, - 0x3F, 0xFC, 0x7F, 0xFC, 0xE0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0, - 0xC0, 0xC0, 0xC0, 0xC0, 0xE0, 0xC0, 0x7F, 0xFC, 0x3F, 0xFC, - 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0, - 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, - 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x30, 0x30, - 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, - 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0, - 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, - 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, - 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, 0xC0, 0x00, 0xC0, 0x00, - 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x73, 0xF8, 0x33, 0xF0, - 0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, - 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, - 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC, - 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x30, 0x00, 0x38, 0xC0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, - 0xC0, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0, 0xC0, 0x00, 0xC0, 0x00, - 0xFF, 0xFC, 0xFF, 0xFC, 0x07, 0x80, 0x07, 0x80, 0x0F, 0xC0, - 0x1C, 0xE0, 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, - 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, - 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0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC -}; - -#endif /* #ifdef _LCD_FONT_10x14_h */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/lcdd.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/lcdd.c deleted file mode 100644 index 1d7b158a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/lcdd.c +++ /dev/null @@ -1,149 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of LCD driver, Include LCD initialization, - * LCD on/off and LCD backlight control. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "lcdd.h" -#include -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initializes the LCD controller. - * Configure SMC to access LCD controller at 64MHz MCK. - */ -void LCDD_Initialize(void) -{ - const Pin pPins[] = {BOARD_LCD_PINS}; - Smc *pSmc = SMC; - - /* Enable pins */ - PIO_Configure(pPins, PIO_LISTSIZE(pPins)); - - /* Enable peripheral clock */ - PMC_EnablePeripheral(ID_SMC); - - /* EBI SMC Configuration */ - pSmc->SMC_CS_NUMBER[1].SMC_SETUP = 0 - | ((2 << 0) & SMC_SETUP1_NWE_SETUP) - | ((2 << 8) & SMC_SETUP1_NCS_WR_SETUP) - | ((2 << 16) & SMC_SETUP1_NRD_SETUP) - | ((2 << 24) & SMC_SETUP1_NCS_RD_SETUP) - ; - - pSmc->SMC_CS_NUMBER[1].SMC_PULSE = 0 - | ((4 << 0) & SMC_PULSE1_NWE_PULSE) - | ((4 << 8) & SMC_PULSE1_NCS_WR_PULSE) - | ((10 << 16) & SMC_PULSE1_NRD_PULSE) - | ((10 << 24) & SMC_PULSE1_NCS_RD_PULSE) - ; - - pSmc->SMC_CS_NUMBER[1].SMC_CYCLE = 0 - | ((10 << 0) & SMC_CYCLE1_NWE_CYCLE) - | ((22 << 16) & SMC_CYCLE1_NRD_CYCLE) - ; - - pSmc->SMC_CS_NUMBER[1].SMC_MODE = 0 - | (SMC_MODE1_READ_MODE) - | (SMC_MODE1_WRITE_MODE) - | (0) /* Set 8 bit width. TODO: replace with definition in device header file */ - ; - - /* Initialize LCD controller */ - LCD_Initialize(); - - /* Set LCD backlight */ - LCDD_SetBacklight(2); -} - -/** - * \brief Turn on the LCD. - */ -void LCDD_On(void) -{ - LCD_On(); -} - -/** - * \brief Turn off the LCD. - */ -void LCDD_Off(void) -{ - LCD_Off(); -} - -/** - * \brief Set the backlight of the LCD. - * - * \param level Backlight brightness level [1..16], 1 means maximum brightness. - */ -void LCDD_SetBacklight (uint32_t level) -{ - uint32_t i; - const Pin pPins[] = {BOARD_BACKLIGHT_PIN}; - - /* Ensure valid level */ - level = (level < 1) ? 1 : level; - level = (level > 16) ? 16 : level; - - /* Enable pins */ - PIO_Configure(pPins, PIO_LISTSIZE(pPins)); - - /* Switch off backlight */ - PIO_Clear(pPins); - i = 600 * (BOARD_MCK / 1000000); /* wait for at least 500us */ - while(i--); - - /* Set new backlight level */ - for (i = 0; i < level; i++) { - PIO_Clear(pPins); - PIO_Clear(pPins); - PIO_Clear(pPins); - - PIO_Set(pPins); - PIO_Set(pPins); - PIO_Set(pPins); - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/lcdd.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/lcdd.h deleted file mode 100644 index 8ba19f05..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/lcd/lcdd.h +++ /dev/null @@ -1,52 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for LCD driver. - * - */ - -#ifndef LCDD_H -#define LCDD_H - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void LCDD_Initialize(void); - -extern void LCDD_On(void); - -extern void LCDD_Off(void); - -extern void LCDD_SetBacklight (uint32_t step); - -#endif /* #ifndef LCDD_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio.c deleted file mode 100644 index db13b2b4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio.c +++ /dev/null @@ -1,464 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/// \file - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "pio.h" -#include -#include - -//------------------------------------------------------------------------------ -// Local Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Configures one or more pin(s) of a PIO controller as being controlled by -/// peripheral A. Optionally, the corresponding internal pull-up(s) can be -/// enabled. -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask of one or more pin(s) to configure. -/// \param enablePullUp Indicates if the pin(s) internal pull-up shall be -/// configured. -//------------------------------------------------------------------------------ -static void PIO_SetPeripheralA( - Pio *pio, - unsigned int mask, - unsigned char enablePullUp) -{ - unsigned int abcdsr; - // Disable interrupts on the pin(s) - pio->PIO_IDR = mask; - - // Enable the pull-up(s) if necessary - if (enablePullUp) { - pio->PIO_PUER = mask; - } - else { - - pio->PIO_PUDR = mask; - } - - abcdsr = pio->PIO_ABCDSR[0]; - pio->PIO_ABCDSR[0] &= (~mask & abcdsr); - abcdsr = pio->PIO_ABCDSR[1]; - pio->PIO_ABCDSR[1] &= (~mask & abcdsr); - pio->PIO_PDR = mask; -} - -//------------------------------------------------------------------------------ -/// Configures one or more pin(s) of a PIO controller as being controlled by -/// peripheral B. Optionally, the corresponding internal pull-up(s) can be -/// enabled. -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask of one or more pin(s) to configure. -/// \param enablePullUp Indicates if the pin(s) internal pull-up shall be -/// configured. -//------------------------------------------------------------------------------ -static void PIO_SetPeripheralB( - Pio *pio, - unsigned int mask, - unsigned char enablePullUp) -{ - unsigned int abcdsr; - // Disable interrupts on the pin(s) - pio->PIO_IDR = mask; - - // Enable the pull-up(s) if necessary - if (enablePullUp) { - - pio->PIO_PUER = mask; - } - else { - - pio->PIO_PUDR = mask; - } - - abcdsr = pio->PIO_ABCDSR[0]; - pio->PIO_ABCDSR[0] = (mask | abcdsr); - abcdsr = pio->PIO_ABCDSR[1]; - pio->PIO_ABCDSR[1] &= (~mask & abcdsr); - - pio->PIO_PDR = mask; -} - -//------------------------------------------------------------------------------ -/// Configures one or more pin(s) of a PIO controller as being controlled by -/// peripheral C. Optionally, the corresponding internal pull-up(s) can be -/// enabled. -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask of one or more pin(s) to configure. -/// \param enablePullUp Indicates if the pin(s) internal pull-up shall be -/// configured. -//------------------------------------------------------------------------------ -static void PIO_SetPeripheralC( - Pio *pio, - unsigned int mask, - unsigned char enablePullUp) -{ - unsigned int abcdsr; - // Disable interrupts on the pin(s) - pio->PIO_IDR = mask; - - // Enable the pull-up(s) if necessary - if (enablePullUp) { - - pio->PIO_PUER = mask; - } - else { - - pio->PIO_PUDR = mask; - } - - abcdsr = pio->PIO_ABCDSR[0]; - pio->PIO_ABCDSR[0] &= (~mask & abcdsr); - abcdsr = pio->PIO_ABCDSR[1]; - pio->PIO_ABCDSR[1] = (mask | abcdsr); - - pio->PIO_PDR = mask; -} - -//------------------------------------------------------------------------------ -/// Configures one or more pin(s) of a PIO controller as being controlled by -/// peripheral D. Optionally, the corresponding internal pull-up(s) can be -/// enabled. -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask of one or more pin(s) to configure. -/// \param enablePullUp Indicates if the pin(s) internal pull-up shall be -/// configured. -//------------------------------------------------------------------------------ -static void PIO_SetPeripheralD( - Pio *pio, - unsigned int mask, - unsigned char enablePullUp) -{ - unsigned int abcdsr; - // Disable interrupts on the pin(s) - pio->PIO_IDR = mask; - - // Enable the pull-up(s) if necessary - if (enablePullUp) { - - pio->PIO_PUER = mask; - } - else { - - pio->PIO_PUDR = mask; - } - - abcdsr = pio->PIO_ABCDSR[0]; - pio->PIO_ABCDSR[0] = (mask | abcdsr); - abcdsr = pio->PIO_ABCDSR[1]; - pio->PIO_ABCDSR[1] = (mask | abcdsr); - - pio->PIO_PDR = mask; -} - -//------------------------------------------------------------------------------ -/// Configures one or more pin(s) or a PIO controller as inputs. Optionally, -/// the corresponding internal pull-up(s) and glitch filter(s) can be -/// enabled. -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask indicating which pin(s) to configure as input(s). -/// \param enablePullUp Indicates if the internal pull-up(s) must be enabled. -/// \param enableFilter Indicates if the glitch filter(s) must be enabled. -//------------------------------------------------------------------------------ -static void PIO_SetInput( - Pio *pio, - unsigned int mask, - unsigned char attribute) -{ - // Disable interrupts - pio->PIO_IDR = mask; - - // Enable pull-up(s) if necessary - if (attribute & PIO_PULLUP) - pio->PIO_PUER = mask; - else - pio->PIO_PUDR = mask; - - // Enable de-glitch(s) if necessary - if (attribute & PIO_DEGLITCH) - pio->PIO_IFER = mask; - else - pio->PIO_IFDR = mask; - - // Enable de-bounce if necessary - if (attribute & PIO_DEBOUNCE) { - pio->PIO_DIFSR = mask; - } - - // Configure pin as input - pio->PIO_ODR = mask; - pio->PIO_PER = mask; -} - -//------------------------------------------------------------------------------ -/// Configures one or more pin(s) of a PIO controller as outputs, with the -/// given default value. Optionally, the multi-drive feature can be enabled -/// on the pin(s). -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask indicating which pin(s) to configure. -/// \param defaultValue Default level on the pin(s). -/// \param enableMultiDrive Indicates if the pin(s) shall be configured as -/// open-drain. -/// \param enablePullUp Indicates if the pin shall have its pull-up activated. -//------------------------------------------------------------------------------ -static void PIO_SetOutput( - Pio *pio, - unsigned int mask, - unsigned char defaultValue, - unsigned char enableMultiDrive, - unsigned char enablePullUp) -{ - // Disable interrupts - pio->PIO_IDR = mask; - - // Enable pull-up(s) if necessary - if (enablePullUp) { - - pio->PIO_PUER = mask; - } - else { - - pio->PIO_PUDR = mask; - } - - // Enable multi-drive if necessary - if (enableMultiDrive) { - - pio->PIO_MDER = mask; - } - else { - - pio->PIO_MDDR = mask; - } - - // Set default value - if (defaultValue) { - - pio->PIO_SODR = mask; - } - else { - - pio->PIO_CODR = mask; - } - - // Configure pin(s) as output(s) - pio->PIO_OER = mask; - pio->PIO_PER = mask; -} - -//------------------------------------------------------------------------------ -/// Configures interrupt mode for input Pins -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask indicating which pin(s) to configure. -/// \param additionnalItMode Enable Pio Additionnal It Mode. -/// \param edgeMode Enable the edge mode. -/// \param risingEdgeOrHighLevel Enable IT on rising edge or high level. -//------------------------------------------------------------------------------ -static void PIO_SetInterrupt( - Pio *pio, - unsigned int mask, - unsigned char additionnalItMode, - unsigned char edgeMode, - unsigned char risingEdgeOrHighLevel) -{ - /* Configure the Interrupt mode in the PIO controller */ - if (additionnalItMode) { - /* enable additional interrupt mode */ - pio->PIO_AIMER = mask; - - /* if bit field of selected pin is 1, set as Rising Edge/High level detection event */ - if (risingEdgeOrHighLevel) - pio->PIO_REHLSR = mask; - else - pio->PIO_FELLSR = mask; - - /* if bit field of selected pin is 1, set as edge detection source */ - if (edgeMode) - pio->PIO_ESR = mask; - else - pio->PIO_LSR = mask; - } else { - /* disable additional interrupt mode */ - pio->PIO_AIMDR = mask; - } -} - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Configures a list of Pin instances, each of which can either hold a single -/// pin or a group of pins, depending on the mask value; all pins are configured -/// by this function. The size of the array must also be provided and is easily -/// computed using PIO_LISTSIZE whenever its length is not known in advance. -/// \param list Pointer to a list of Pin instances. -/// \param size Size of the Pin list (calculated using PIO_LISTSIZE). -/// \return 1 if the pins have been configured properly; otherwise 0. -//------------------------------------------------------------------------------ -unsigned char PIO_Configure(const Pin *list, unsigned int size) -{ - // Configure pins - while (size > 0) { - - switch (list->type) { - - case PIO_PERIPH_A: - PIO_SetPeripheralA(list->pio, - list->mask, - (list->attribute & PIO_PULLUP) ? 1 : 0); - break; - - case PIO_PERIPH_B: - PIO_SetPeripheralB(list->pio, - list->mask, - (list->attribute & PIO_PULLUP) ? 1 : 0); - break; - - case PIO_PERIPH_C: - PIO_SetPeripheralC(list->pio, - list->mask, - (list->attribute & PIO_PULLUP) ? 1 : 0); - break; - - case PIO_PERIPH_D: - PIO_SetPeripheralD(list->pio, - list->mask, - (list->attribute & PIO_PULLUP) ? 1 : 0); - break; - case PIO_INPUT: - PMC_EnablePeripheral(list->id); - PIO_SetInput(list->pio, - list->mask, - list->attribute); - PIO_SetInterrupt(list->pio, - list->mask, - (list->attribute & PIO_IT_AIME) ? 1 : 0, - (list->attribute & PIO_IT_EDGE) ? 1 : 0, - (list->attribute & PIO_IT_RE_OR_HL) ? 1 : 0); - break; - - case PIO_OUTPUT_0: - case PIO_OUTPUT_1: - PIO_SetOutput(list->pio, - list->mask, - (list->type == PIO_OUTPUT_1), - (list->attribute & PIO_OPENDRAIN) ? 1 : 0, - (list->attribute & PIO_PULLUP) ? 1 : 0); - break; - - default: return 0; - } - - list++; - size--; - } - - return 1; -} - -//------------------------------------------------------------------------------ -/// Sets a high output level on all the PIOs defined in the given Pin instance. -/// This has no immediate effects on PIOs that are not output, but the PIO -/// controller will memorize the value they are changed to outputs. -/// \param pin Pointer to a Pin instance describing one or more pins. -//------------------------------------------------------------------------------ -void PIO_Set(const Pin *pin) -{ - pin->pio->PIO_SODR = pin->mask; -} - -//------------------------------------------------------------------------------ -/// Sets a low output level on all the PIOs defined in the given Pin instance. -/// This has no immediate effects on PIOs that are not output, but the PIO -/// controller will memorize the value they are changed to outputs. -/// \param pin Pointer to a Pin instance describing one or more pins. -//------------------------------------------------------------------------------ -void PIO_Clear(const Pin *pin) -{ - pin->pio->PIO_CODR = pin->mask; -} - -//------------------------------------------------------------------------------ -/// Returns 1 if one or more PIO of the given Pin instance currently have a high -/// level; otherwise returns 0. This method returns the actual value that is -/// being read on the pin. To return the supposed output value of a pin, use -/// PIO_GetOutputDataStatus() instead. -/// \param pin Pointer to a Pin instance describing one or more pins. -/// \return 1 if the Pin instance contains at least one PIO that currently has -/// a high level; otherwise 0. -//------------------------------------------------------------------------------ -unsigned char PIO_Get(const Pin *pin) -{ - unsigned int reg; - if ((pin->type == PIO_OUTPUT_0) || (pin->type == PIO_OUTPUT_1)) { - - reg = pin->pio->PIO_ODSR; - } - else { - - reg = pin->pio->PIO_PDSR; - } - - if ((reg & pin->mask) == 0) { - - return 0; - } - else { - - return 1; - } -} - - -//------------------------------------------------------------------------------ -/// Returns 1 if one or more PIO of the given Pin are configured to output a -/// high level (even if they are not output). -/// To get the actual value of the pin, use PIO_Get() instead. -/// \param pin Pointer to a Pin instance describing one or more pins. -/// \return 1 if the Pin instance contains at least one PIO that is configured -/// to output a high level; otherwise 0. -//------------------------------------------------------------------------------ -unsigned char PIO_GetOutputDataStatus(const Pin *pin) -{ - if ((pin->pio->PIO_ODSR & pin->mask) == 0) { - - return 0; - } - else { - - return 1; - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio.h deleted file mode 100644 index 52fd593b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio.h +++ /dev/null @@ -1,215 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \file -/// -/// \par Purpose -/// -/// This file provides a basic API for PIO configuration and usage of -/// user-controlled pins. Please refer to the board.h file for a list of -/// available pin definitions. -/// -/// \par Usage -/// -/// -# Define a constant pin description array such as the following one, using -/// the existing definitions provided by the board.h file if possible: -/// \code -/// const Pin pPins[] = {PIN_USART0_TXD, PIN_USART0_RXD}; -/// \endcode -/// Alternatively, it is possible to add new pins by provided the full Pin -/// structure: -/// \code -/// // Pin instance to configure PA10 & PA11 as inputs with the internal -/// // pull-up enabled. -/// const Pin pPins = { -/// (1 << 10) | (1 << 11), -/// REG_PIOA, -/// ID_PIOA, -/// PIO_INPUT, -/// PIO_PULLUP -/// }; -/// \endcode -/// -# Configure a pin array by calling PIO_Configure() with a pointer to the -/// array and its size (which is computed using the PIO_LISTSIZE macro). -/// -# Change and get the value of a user-controlled pin using the PIO_Set, -/// PIO_Clear and PIO_Get methods. -/// -# Get the level being currently output by a user-controlled pin configured -/// as an output using PIO_GetOutputDataStatus(). -//------------------------------------------------------------------------------ - -#ifndef PIO_H -#define PIO_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include - -//------------------------------------------------------------------------------ -// Global Definitions -//------------------------------------------------------------------------------ - -/// The pin is controlled by the associated signal of peripheral A. -#define PIO_PERIPH_A 0 -/// The pin is controlled by the associated signal of peripheral B. -#define PIO_PERIPH_B 1 -/// The pin is controlled by the associated signal of peripheral C. -#define PIO_PERIPH_C 2 -/// The pin is controlled by the associated signal of peripheral D. -#define PIO_PERIPH_D 3 -/// The pin is an input. -#define PIO_INPUT 4 -/// The pin is an output and has a default level of 0. -#define PIO_OUTPUT_0 5 -/// The pin is an output and has a default level of 1. -#define PIO_OUTPUT_1 6 - -/// Default pin configuration (no attribute). -#define PIO_DEFAULT (0 << 0) -/// The internal pin pull-up is active. -#define PIO_PULLUP (1 << 0) -/// The internal glitch filter is active. -#define PIO_DEGLITCH (1 << 1) -/// The pin is open-drain. -#define PIO_OPENDRAIN (1 << 2) - -/// The internal debouncing filter is active. -#define PIO_DEBOUNCE (1 << 3) - -/// Enable additional interrupt modes. -#define PIO_IT_AIME (1 << 4) - -/// Interrupt High Level/Rising Edge detection is active. -#define PIO_IT_RE_OR_HL (1 << 5) -/// Interrupt Edge detection is active. -#define PIO_IT_EDGE (1 << 6) - -/// Low level interrupt is active -#define PIO_IT_LOW_LEVEL (0 | 0 | PIO_IT_AIME) -/// High level interrupt is active -#define PIO_IT_HIGH_LEVEL (PIO_IT_RE_OR_HL | 0 | PIO_IT_AIME) -/// Falling edge interrupt is active -#define PIO_IT_FALL_EDGE (0 | PIO_IT_EDGE | PIO_IT_AIME) -/// Rising edge interrupt is active -#define PIO_IT_RISE_EDGE (PIO_IT_RE_OR_HL | PIO_IT_EDGE | PIO_IT_AIME) - -//------------------------------------------------------------------------------ -// Global Macros -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Calculates the size of an array of Pin instances. The array must be defined -/// locally (i.e. not a pointer), otherwise the computation will not be correct. -/// \param pPins Local array of Pin instances. -/// \return Number of elements in array. -//------------------------------------------------------------------------------ -#define PIO_LISTSIZE(pPins) (sizeof(pPins) / sizeof(Pin)) - -//------------------------------------------------------------------------------ -// Global Types -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -/// Describes the type and attribute of one PIO pin or a group of similar pins. -/// The #type# field can have the following values: -/// - PIO_PERIPH_A -/// - PIO_PERIPH_B -/// - PIO_OUTPUT_0 -/// - PIO_OUTPUT_1 -/// - PIO_INPUT -/// -/// The #attribute# field is a bitmask that can either be set to PIO_DEFAULt, -/// or combine (using bitwise OR '|') any number of the following constants: -/// - PIO_PULLUP -/// - PIO_DEGLITCH -/// - PIO_DEBOUNCE -/// - PIO_OPENDRAIN -/// - PIO_IT_LOW_LEVEL -/// - PIO_IT_HIGH_LEVEL -/// - PIO_IT_FALL_EDGE -/// - PIO_IT_RISE_EDGE -//------------------------------------------------------------------------------ -typedef struct { - - /// Bitmask indicating which pin(s) to configure. - unsigned int mask; - /// Pointer to the PIO controller which has the pin(s). - Pio *pio; - /// Peripheral ID of the PIO controller which has the pin(s). - unsigned char id; - /// Pin type. - unsigned char type; - /// Pin attribute. - unsigned char attribute; -} Pin; - -//------------------------------------------------------------------------------ -// Global Access Macros -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -/// Configures Glitch or Debouncing filter for input -/// \param pin Pointer to a Pin instance describing one or more pins. -/// \param cuttoff Cutt off frequency for debounce filter -//------------------------------------------------------------------------------ -static inline void PIO_SetDebounceFilter( - const Pin *pin, - unsigned int cuttoff) - { - Pio *pio = pin->pio; - - pio->PIO_DIFSR = pin->mask;//set Debouncing, 0 bit field no effect - pio->PIO_SCDR = ((32678/(2*(cuttoff))) - 1) & 0x3FFF;//the lowest 14 bits work -} - - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -extern unsigned char PIO_Configure(const Pin *list, unsigned int size); - -extern void PIO_Set(const Pin *pin); - -extern void PIO_Clear(const Pin *pin); - -extern unsigned char PIO_Get(const Pin *pin); - -//extern unsigned int PIO_GetISR(const Pin *pin); - -extern unsigned char PIO_GetOutputDataStatus(const Pin *pin); - -extern void PIO_EnableDebounce(const Pin *pin, unsigned int clkDiv); - -#endif //#ifndef PIO_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio_it.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio_it.c deleted file mode 100644 index e04a07c5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio_it.c +++ /dev/null @@ -1,411 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/// \file - -/// Disable traces for this file -#undef TRACE_LEVEL -#define TRACE_LEVEL 0 - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "pio_it.h" -#include "pio.h" -#include -#include -#include -#include -#include - -//------------------------------------------------------------------------------ -// Local definitions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Local types -//------------------------------------------------------------------------------ -/* Define WEAK attribute */ -#if defined ( __CC_ARM ) - #define WEAK __attribute__ ((weak)) -#elif defined ( __ICCARM__ ) - #define WEAK __weak -#elif defined ( __GNUC__ ) - #define WEAK __attribute__ ((weak)) -#endif - - -//------------------------------------------------------------------------------ -// Local variables -//------------------------------------------------------------------------------ -typedef void (*PioHandler) (unsigned char id); - -/* Default PIO handlers defined as weak functions which have to be redefined by - * the application */ -WEAK void PIOA_Irq0Handler(unsigned char id) {} -WEAK void PIOA_Irq1Handler(unsigned char id) {} -WEAK void PIOA_Irq2Handler(unsigned char id) {} -WEAK void PIOA_Irq3Handler(unsigned char id) {} -WEAK void PIOA_Irq4Handler(unsigned char id) {} -WEAK void PIOA_Irq5Handler(unsigned char id) {} -WEAK void PIOA_Irq6Handler(unsigned char id) {} -WEAK void PIOA_Irq7Handler(unsigned char id) {} -WEAK void PIOA_Irq8Handler(unsigned char id) {} -WEAK void PIOA_Irq9Handler(unsigned char id) {} -WEAK void PIOA_Irq10Handler(unsigned char id) {} -WEAK void PIOA_Irq11Handler(unsigned char id) {} -WEAK void PIOA_Irq12Handler(unsigned char id) {} -WEAK void PIOA_Irq13Handler(unsigned char id) {} -WEAK void PIOA_Irq14Handler(unsigned char id) {} -WEAK void PIOA_Irq15Handler(unsigned char id) {} -WEAK void PIOA_Irq16Handler(unsigned char id) {} -WEAK void PIOA_Irq17Handler(unsigned char id) {} -WEAK void PIOA_Irq18Handler(unsigned char id) {} -WEAK void PIOA_Irq19Handler(unsigned char id) {} -WEAK void PIOA_Irq20Handler(unsigned char id) {} -WEAK void PIOA_Irq21Handler(unsigned char id) {} -WEAK void PIOA_Irq22Handler(unsigned char id) {} -WEAK void PIOA_Irq23Handler(unsigned char id) {} -WEAK void PIOA_Irq24Handler(unsigned char id) {} -WEAK void PIOA_Irq25Handler(unsigned char id) {} -WEAK void PIOA_Irq26Handler(unsigned char id) {} -WEAK void PIOA_Irq27Handler(unsigned char id) {} -WEAK void PIOA_Irq28Handler(unsigned char id) {} -WEAK void PIOA_Irq29Handler(unsigned char id) {} -WEAK void PIOA_Irq30Handler(unsigned char id) {} -WEAK void PIOA_Irq31Handler(unsigned char id) {} - - -/** pioAHandlers records ISR routines for each PIO Id for PIO controller A */ -static const PioHandler pioAHandlers[32] = { - (PioHandler) PIOA_Irq0Handler, /**< PA0 IT Handler */ - (PioHandler) PIOA_Irq1Handler, /**< PA1 IT Handler */ - (PioHandler) PIOA_Irq2Handler, /**< PA2 IT Handler */ - (PioHandler) PIOA_Irq3Handler, /**< PA3 IT Handler */ - (PioHandler) PIOA_Irq4Handler, /**< PA4 IT Handler */ - (PioHandler) PIOA_Irq5Handler, /**< PA5 IT Handler */ - (PioHandler) PIOA_Irq6Handler, /**< PA6 IT Handler */ - (PioHandler) PIOA_Irq7Handler, /**< PA7 IT Handler */ - (PioHandler) PIOA_Irq8Handler, /**< PA8 IT Handler */ - (PioHandler) PIOA_Irq9Handler, /**< PA9 IT Handler */ - (PioHandler) PIOA_Irq10Handler, /**< PA10 IT Handler */ - (PioHandler) PIOA_Irq11Handler, /**< PA11 IT Handler */ - (PioHandler) PIOA_Irq12Handler, /**< PA12 IT Handler */ - (PioHandler) PIOA_Irq13Handler, /**< PA13 IT Handler */ - (PioHandler) PIOA_Irq14Handler, /**< PA14 IT Handler */ - (PioHandler) PIOA_Irq15Handler, /**< PA15 IT Handler */ - (PioHandler) PIOA_Irq16Handler, /**< PA16 IT Handler */ - (PioHandler) PIOA_Irq17Handler, /**< PA17 IT Handler */ - (PioHandler) PIOA_Irq18Handler, /**< PA18 IT Handler */ - (PioHandler) PIOA_Irq19Handler, /**< PA19 IT Handler */ - (PioHandler) PIOA_Irq20Handler, /**< PA20 IT Handler */ - (PioHandler) PIOA_Irq21Handler, /**< PA21 IT Handler */ - (PioHandler) PIOA_Irq22Handler, /**< PA22 IT Handler */ - (PioHandler) PIOA_Irq23Handler, /**< PA23 IT Handler */ - (PioHandler) PIOA_Irq24Handler, /**< PA24 IT Handler */ - (PioHandler) PIOA_Irq25Handler, /**< PA25 IT Handler */ - (PioHandler) PIOA_Irq26Handler, /**< PA26 IT Handler */ - (PioHandler) PIOA_Irq27Handler, /**< PA27 IT Handler */ - (PioHandler) PIOA_Irq28Handler, /**< PA28 IT Handler */ - (PioHandler) PIOA_Irq29Handler, /**< PA29 IT Handler */ - (PioHandler) PIOA_Irq30Handler, /**< PA30 IT Handler */ - (PioHandler) PIOA_Irq31Handler /**< PA31 IT Handler */ -}; - -/* Default PIO handlers defined as weak functions which have to be redefined by - * the application */ -WEAK void PIOB_Irq0Handler(unsigned char id) {} -WEAK void PIOB_Irq1Handler(unsigned char id) {} -WEAK void PIOB_Irq2Handler(unsigned char id) {} -WEAK void PIOB_Irq3Handler(unsigned char id) {} -WEAK void PIOB_Irq4Handler(unsigned char id) {} -WEAK void PIOB_Irq5Handler(unsigned char id) {} -WEAK void PIOB_Irq6Handler(unsigned char id) {} -WEAK void PIOB_Irq7Handler(unsigned char id) {} -WEAK void PIOB_Irq8Handler(unsigned char id) {} -WEAK void PIOB_Irq9Handler(unsigned char id) {} -WEAK void PIOB_Irq10Handler(unsigned char id) {} -WEAK void PIOB_Irq11Handler(unsigned char id) {} -WEAK void PIOB_Irq12Handler(unsigned char id) {} -WEAK void PIOB_Irq13Handler(unsigned char id) {} -WEAK void PIOB_Irq14Handler(unsigned char id) {} -WEAK void PIOB_Irq15Handler(unsigned char id) {} -WEAK void PIOB_Irq16Handler(unsigned char id) {} -WEAK void PIOB_Irq17Handler(unsigned char id) {} -WEAK void PIOB_Irq18Handler(unsigned char id) {} -WEAK void PIOB_Irq19Handler(unsigned char id) {} -WEAK void PIOB_Irq20Handler(unsigned char id) {} -WEAK void PIOB_Irq21Handler(unsigned char id) {} -WEAK void PIOB_Irq22Handler(unsigned char id) {} -WEAK void PIOB_Irq23Handler(unsigned char id) {} -WEAK void PIOB_Irq24Handler(unsigned char id) {} -WEAK void PIOB_Irq25Handler(unsigned char id) {} -WEAK void PIOB_Irq26Handler(unsigned char id) {} -WEAK void PIOB_Irq27Handler(unsigned char id) {} -WEAK void PIOB_Irq28Handler(unsigned char id) {} -WEAK void PIOB_Irq29Handler(unsigned char id) {} -WEAK void PIOB_Irq30Handler(unsigned char id) {} -WEAK void PIOB_Irq31Handler(unsigned char id) {} - - -/** PIOBHandlers records ISR routines for each PIO Id for PIO controller A */ -static const PioHandler pioBHandlers[32] = { - (PioHandler) PIOB_Irq0Handler, /**< PB0 IT Handler */ - (PioHandler) PIOB_Irq1Handler, /**< PB1 IT Handler */ - (PioHandler) PIOB_Irq2Handler, /**< PB2 IT Handler */ - (PioHandler) PIOB_Irq3Handler, /**< PB3 IT Handler */ - (PioHandler) PIOB_Irq4Handler, /**< PB4 IT Handler */ - (PioHandler) PIOB_Irq5Handler, /**< PB5 IT Handler */ - (PioHandler) PIOB_Irq6Handler, /**< PB6 IT Handler */ - (PioHandler) PIOB_Irq7Handler, /**< PB7 IT Handler */ - (PioHandler) PIOB_Irq8Handler, /**< PB8 IT Handler */ - (PioHandler) PIOB_Irq9Handler, /**< PB9 IT Handler */ - (PioHandler) PIOB_Irq10Handler, /**< PB10 IT Handler */ - (PioHandler) PIOB_Irq11Handler, /**< PB11 IT Handler */ - (PioHandler) PIOB_Irq12Handler, /**< PB12 IT Handler */ - (PioHandler) PIOB_Irq13Handler, /**< PB13 IT Handler */ - (PioHandler) PIOB_Irq14Handler, /**< PB14 IT Handler */ - (PioHandler) PIOB_Irq15Handler, /**< PB15 IT Handler */ - (PioHandler) PIOB_Irq16Handler, /**< PB16 IT Handler */ - (PioHandler) PIOB_Irq17Handler, /**< PB17 IT Handler */ - (PioHandler) PIOB_Irq18Handler, /**< PB18 IT Handler */ - (PioHandler) PIOB_Irq19Handler, /**< PB19 IT Handler */ - (PioHandler) PIOB_Irq20Handler, /**< PB20 IT Handler */ - (PioHandler) PIOB_Irq21Handler, /**< PB21 IT Handler */ - (PioHandler) PIOB_Irq22Handler, /**< PB22 IT Handler */ - (PioHandler) PIOB_Irq23Handler, /**< PB23 IT Handler */ - (PioHandler) PIOB_Irq24Handler, /**< PB24 IT Handler */ - (PioHandler) PIOB_Irq25Handler, /**< PB25 IT Handler */ - (PioHandler) PIOB_Irq26Handler, /**< PB26 IT Handler */ - (PioHandler) PIOB_Irq27Handler, /**< PB27 IT Handler */ - (PioHandler) PIOB_Irq28Handler, /**< PB28 IT Handler */ - (PioHandler) PIOB_Irq29Handler, /**< PB29 IT Handler */ - (PioHandler) PIOB_Irq30Handler, /**< PB30 IT Handler */ - (PioHandler) PIOB_Irq31Handler /**< PB31 IT Handler */ -}; - -/* Default PIO handlers defined as weak functions which have to be redefined by - * the application */ -WEAK void PIOC_Irq0Handler(unsigned char id) {} -WEAK void PIOC_Irq1Handler(unsigned char id) {} -WEAK void PIOC_Irq2Handler(unsigned char id) {} -WEAK void PIOC_Irq3Handler(unsigned char id) {} -WEAK void PIOC_Irq4Handler(unsigned char id) {} -WEAK void PIOC_Irq5Handler(unsigned char id) {} -WEAK void PIOC_Irq6Handler(unsigned char id) {} -WEAK void PIOC_Irq7Handler(unsigned char id) {} -WEAK void PIOC_Irq8Handler(unsigned char id) {} -WEAK void PIOC_Irq9Handler(unsigned char id) {} -WEAK void PIOC_Irq10Handler(unsigned char id) {} -WEAK void PIOC_Irq11Handler(unsigned char id) {} -WEAK void PIOC_Irq12Handler(unsigned char id) {} -WEAK void PIOC_Irq13Handler(unsigned char id) {} -WEAK void PIOC_Irq14Handler(unsigned char id) {} -WEAK void PIOC_Irq15Handler(unsigned char id) {} -WEAK void PIOC_Irq16Handler(unsigned char id) {} -WEAK void PIOC_Irq17Handler(unsigned char id) {} -WEAK void PIOC_Irq18Handler(unsigned char id) {} -WEAK void PIOC_Irq19Handler(unsigned char id) {} -WEAK void PIOC_Irq20Handler(unsigned char id) {} -WEAK void PIOC_Irq21Handler(unsigned char id) {} -WEAK void PIOC_Irq22Handler(unsigned char id) {} -WEAK void PIOC_Irq23Handler(unsigned char id) {} -WEAK void PIOC_Irq24Handler(unsigned char id) {} -WEAK void PIOC_Irq25Handler(unsigned char id) {} -WEAK void PIOC_Irq26Handler(unsigned char id) {} -WEAK void PIOC_Irq27Handler(unsigned char id) {} -WEAK void PIOC_Irq28Handler(unsigned char id) {} -WEAK void PIOC_Irq29Handler(unsigned char id) {} -WEAK void PIOC_Irq30Handler(unsigned char id) {} -WEAK void PIOC_Irq31Handler(unsigned char id) {} - - -/** PIOCHandlers records ISR routines for each PIO Id for PIO controller A */ -static const PioHandler pioCHandlers[32] = { - (PioHandler) PIOC_Irq0Handler, /**< PC0 IT Handler */ - (PioHandler) PIOC_Irq1Handler, /**< PC1 IT Handler */ - (PioHandler) PIOC_Irq2Handler, /**< PC2 IT Handler */ - (PioHandler) PIOC_Irq3Handler, /**< PC3 IT Handler */ - (PioHandler) PIOC_Irq4Handler, /**< PC4 IT Handler */ - (PioHandler) PIOC_Irq5Handler, /**< PC5 IT Handler */ - (PioHandler) PIOC_Irq6Handler, /**< PC6 IT Handler */ - (PioHandler) PIOC_Irq7Handler, /**< PC7 IT Handler */ - (PioHandler) PIOC_Irq8Handler, /**< PC8 IT Handler */ - (PioHandler) PIOC_Irq9Handler, /**< PC9 IT Handler */ - (PioHandler) PIOC_Irq10Handler, /**< PC10 IT Handler */ - (PioHandler) PIOC_Irq11Handler, /**< PC11 IT Handler */ - (PioHandler) PIOC_Irq12Handler, /**< PC12 IT Handler */ - (PioHandler) PIOC_Irq13Handler, /**< PC13 IT Handler */ - (PioHandler) PIOC_Irq14Handler, /**< PC14 IT Handler */ - (PioHandler) PIOC_Irq15Handler, /**< PC15 IT Handler */ - (PioHandler) PIOC_Irq16Handler, /**< PC16 IT Handler */ - (PioHandler) PIOC_Irq17Handler, /**< PC17 IT Handler */ - (PioHandler) PIOC_Irq18Handler, /**< PC18 IT Handler */ - (PioHandler) PIOC_Irq19Handler, /**< PC19 IT Handler */ - (PioHandler) PIOC_Irq20Handler, /**< PC20 IT Handler */ - (PioHandler) PIOC_Irq21Handler, /**< PC21 IT Handler */ - (PioHandler) PIOC_Irq22Handler, /**< PC22 IT Handler */ - (PioHandler) PIOC_Irq23Handler, /**< PC23 IT Handler */ - (PioHandler) PIOC_Irq24Handler, /**< PC24 IT Handler */ - (PioHandler) PIOC_Irq25Handler, /**< PC25 IT Handler */ - (PioHandler) PIOC_Irq26Handler, /**< PC26 IT Handler */ - (PioHandler) PIOC_Irq27Handler, /**< PC27 IT Handler */ - (PioHandler) PIOC_Irq28Handler, /**< PC28 IT Handler */ - (PioHandler) PIOC_Irq29Handler, /**< PC29 IT Handler */ - (PioHandler) PIOC_Irq30Handler, /**< PC30 IT Handler */ - (PioHandler) PIOC_Irq31Handler /**< PC31 IT Handler */ -}; - -//------------------------------------------------------------------------------ -/// \brief Generic PIO Handler. -/// The NVIC branches to the PIOx_IrqHandler() registered in exeption.c -/// PIOx_IrqHandler() invokes PIO_IrqHandler which scans which id has triggered -/// an interrupt and call the corresponding routine for the Id (<=> for the pin) -/// \param pPio PIO controller base address. -/// \param pPioHandlers Constant table which contains IT routines for each PIO Id -//------------------------------------------------------------------------------ -static void PIO_IrqHandler(Pio *pPio, const PioHandler *pPioHandlers) -{ - unsigned int status, id; - - status = pPio->PIO_ISR; - status &= pPio->PIO_IMR; - - for (id = 0; id < 32; ++id) { - if (status & (1 << id)) { - pPioHandlers[id](id); - } - } - -} - -//------------------------------------------------------------------------------ -// Global functions -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -/// \brief Parallel IO Controller A interrupt handler -/// Redefined PIOA interrupt handler for NVIC interrupt table. -//------------------------------------------------------------------------------ -void PIOA_IrqHandler(void) -{ - PIO_IrqHandler(PIOA, pioAHandlers); -} - -//------------------------------------------------------------------------------ -/// \brief Parallel IO Controller B interrupt handler -/// Redefined PIOB interrupt handler for NVIC interrupt table. -//------------------------------------------------------------------------------ -void PIOB_IrqHandler(void) -{ - PIO_IrqHandler(PIOB, pioBHandlers); -} - -//------------------------------------------------------------------------------ -/// \brief Parallel IO Controller C interrupt handler -/// Redefined PIOC interrupt handler for NVIC interrupt table. -//------------------------------------------------------------------------------ -void PIOC_IrqHandler(void) -{ - PIO_IrqHandler(PIOC, pioCHandlers); -} - -//------------------------------------------------------------------------------ -/// Enables the given interrupt source. The status -/// register of the corresponding PIO controller is cleared prior to enabling -/// the interrupt. -/// \param pPin Interrupt source to enable. -//------------------------------------------------------------------------------ -void PIO_EnableIt(const Pin *pPin) -{ - Pio* pio = pPin->pio; - TRACE_DEBUG("PIO_EnableIt()\n\r"); - -// SANITY_CHECK(pPin); - - /* Enable the interrupt in the PIO controller */ - pio->PIO_ISR; - pio->PIO_IER = pPin->mask; - - -} - -//------------------------------------------------------------------------------ -/// Disables a given interrupt source, with no added side effects. -/// \param pPin Interrupt source to disable. -//------------------------------------------------------------------------------ -void PIO_DisableIt(const Pin *pPin) -{ - Pio* pio = pPin->pio; - SANITY_CHECK(pPin); - - TRACE_DEBUG("PIO_DisableIt()\n\r"); - - /* Disable the interrupt in the PIO controller */ - pio->PIO_IDR = pPin->mask; -} - -//------------------------------------------------------------------------------ -/// \brief Initializes the PIO interrupt management logic -/// The desired priority of PIO interrupts must be provided. -/// Calling this function multiple times result in the reset of currently -/// configured interrupts. -/// \param priority PIO controller interrupts priority. -//------------------------------------------------------------------------------ -void PIO_InitializeInterrupts(unsigned int priority) -{ - TRACE_DEBUG("PIO_Initialize()\n\r"); - - // Configure PIO interrupt sources - TRACE_DEBUG("PIO_Initialize: Configuring PIOA\n\r"); - PIOA->PIO_ISR; - PIOA->PIO_IDR = 0xFFFFFFFF; - NVIC_DisableIRQ(PIOA_IRQn); - NVIC_ClearPendingIRQ(PIOA_IRQn); - NVIC_SetPriority(PIOA_IRQn, priority); - NVIC_EnableIRQ(PIOA_IRQn); - - TRACE_DEBUG("PIO_Initialize: Configuring PIOB\n\r"); - PIOB->PIO_ISR; - PIOB->PIO_IDR = 0xFFFFFFFF; - NVIC_DisableIRQ(PIOB_IRQn); - NVIC_ClearPendingIRQ(PIOB_IRQn); - NVIC_SetPriority(PIOB_IRQn, priority); - NVIC_EnableIRQ(PIOB_IRQn); - - TRACE_DEBUG("PIO_Initialize: Configuring PIOC\n\r"); - PIOC->PIO_ISR; - PIOC->PIO_IDR = 0xFFFFFFFF; - NVIC_DisableIRQ(PIOC_IRQn); - NVIC_ClearPendingIRQ(PIOC_IRQn); - NVIC_SetPriority(PIOC_IRQn, priority); - NVIC_EnableIRQ(PIOC_IRQn); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio_it.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio_it.h deleted file mode 100644 index cc44903a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio_it.h +++ /dev/null @@ -1,153 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \file -/// -/// \par Purpose -/// -/// Configuration and handling of interrupts on PIO status changes. The API -/// provided here have several advantages over the traditional PIO interrupt -/// configuration approach: -/// - It is highly portable -/// - It automatically demultiplexes interrupts when multiples pins have been -/// configured on a single PIO controller -/// - It allows a group of pins to share the same interrupt -/// -/// However, it also has several minor drawbacks that may prevent from using it -/// in particular applications: -/// - It enables the clocks of all PIO controllers -/// - PIO controllers all share the same interrupt handler, which does the -/// demultiplexing and can be slower than direct configuration -/// - It reserves space for a fixed number of interrupts, which can be -/// increased by modifying the appropriate constant in pio_it.c. -/// -/// \par Usage -/// -/// -# Initialize the PIO interrupt mechanism using PIO_InitializeInterrupts() -/// with the desired priority (0 ... 7). -/// -# Configure a status change interrupt on one or more pin(s) with -/// PIO_ConfigureIt(). -/// -# Enable & disable interrupts on pins using PIO_EnableIt() and -/// PIO_DisableIt(). -//------------------------------------------------------------------------------ - -#ifndef PIO_IT_H -#define PIO_IT_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "pio.h" - -//------------------------------------------------------------------------------ -// Global functions -//------------------------------------------------------------------------------ - -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/// \file - -/// Disable traces for this file -#undef TRACE_LEVEL -#define TRACE_LEVEL 0 - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "pio_it.h" -#include "pio.h" - -//------------------------------------------------------------------------------ -/// \brief Parallel IO Controller A interrupt handler -/// Redefined PIOA interrupt handler for NVIC interrupt table. -//------------------------------------------------------------------------------ -extern void PIOA_IrqHandler(void); -//------------------------------------------------------------------------------ -/// \brief Parallel IO Controller B interrupt handler -/// Redefined PIOB interrupt handler for NVIC interrupt table. -//------------------------------------------------------------------------------ -extern void PIOB_IrqHandler(void); -//------------------------------------------------------------------------------ -/// \brief Parallel IO Controller C interrupt handler -/// Redefined PIOC interrupt handler for NVIC interrupt table. -//------------------------------------------------------------------------------ -extern void PIOC_IrqHandler(void); -//------------------------------------------------------------------------------ -/// Configures and enables the given interrupt source. The status -/// register of the corresponding PIO controller is cleared prior to enabling -/// the interrupt. -/// \param pPin Interrupt source to enable. -//------------------------------------------------------------------------------ -extern void PIO_EnableIt(const Pin *pPin); -//------------------------------------------------------------------------------ -/// Disables a given interrupt source, with no added side effects. -/// \param pPin Interrupt source to disable. -//------------------------------------------------------------------------------ -extern void PIO_DisableIt(const Pin *pPin); -//------------------------------------------------------------------------------ -/// \brief Initializes the PIO interrupt management logic -/// The desired priority of PIO interrupts must be provided. -/// Calling this function multiple times result in the reset of currently -/// configured interrupts. -/// \param priority PIO controller interrupts priority. -//------------------------------------------------------------------------------ -extern void PIO_InitializeInterrupts(unsigned int priority); - -#endif //#ifndef PIO_IT_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio_keypad.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio_keypad.c deleted file mode 100644 index e0fad267..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio_keypad.c +++ /dev/null @@ -1,147 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include -#include "pio.h" -#include "pio_keypad.h" - - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Configures keypad controller -/// \param pPIO Pointer to a PIO instance -/// \param config Configuration data for given pin,see head file for detail -//------------------------------------------------------------------------------ -void PIO_KeyPadConfig(AT91S_PIO *pPIO, KeyPadConfig *config) -{ - //enable/disable keypad controller - pPIO->PIO_KER = config->enable; - - //if enable, set keypad matrix and debouncing - if(config->enable == TRUE) { - //set key matrix - pPIO->PIO_KRCR = (config->row | config->col<<8) ; - - //set debouncing - pPIO->PIO_KDR = config->debouncing; - - } -} - - -//------------------------------------------------------------------------------ -/// Get Key Press/Release status -/// \param pPIO Pointer to a PIO instance -/// \param event Pointer to a instance of KeyEvent for storing keypad status -//------------------------------------------------------------------------------ -void PIO_GetKeyStatus(AT91S_PIO *pPIO, KeyEvent *event) -{ - int i,j; - - //get key press event - event->kdEvent.press = (pPIO->KSR&0x1)?TRUE:FALSE; - event->kdEvent.keyPressNum = (pPIO->KSR>>8)&0x3; - j=event->kdEvent.keyPressNum+1; - for(i=0; ikdEvent.preKeyMatrix[i].row = ((pPIO->KKPR) >> (8*i)) & 0x7; - event->kdEvent.preKeyMatrix[i].col = ((pPIO->KKPR) >> (8*i+4)) & 0x7; - } - - //get key release event - event->kuEvent.release = ((pPIO->KSR>>1) & 0x1)?TRUE:FALSE; - event->kuEvent.keyRelNum = (pPIO->KSR>>16)&0x3; - j=event->kdEvent.keyPressNum+1; - for(i=0;ikuEvent.relKeyMatrix[i].row = ((pPIO->KKRR) >> (8*i)) & 0x7; - event->kuEvent.relKeyMatrix[i].col = ((pPIO->KKRR) >> (8*i+4)) & 0x7; - } - -} - - -//------------------------------------------------------------------------------ -/// Enable keypad interrupt as Key Press Interrupt or Key Release Interrupt or both -/// \param pPIO Pointer to a PIO instance -/// \param mode Select key interrupt mode to enable, -/// 0x1 Key Press Interrupt -/// 0x2 Key Release Interrupt -/// 0x3 both of two type -//------------------------------------------------------------------------------ -void PIO_KeypadEnableIt(AT91S_PIO *pPIO, unsigned int mode) -{ - switch(mode){ - case 1:PIO_KeyPadEnableKPIt(pPIO); - break; - - case 2:PIO_KeyPadEnableKRIt(pPIO); - break; - - case 3:PIO_KeyPadEnableKPIt(pPIO); - PIO_KeyPadEnableKRIt(pPIO); - break; - - default:break; - } - -} - -//------------------------------------------------------------------------------ -/// Disable Key Press Interrupt or Key Release Interrupt or both of them -/// \param pPIO Pointer to a PIO instance -/// \param mode Select key interrupt mode to disable, -/// 0x1 Key Press Interrupt -/// 0x2 Key Release Interrupt -/// 0x3 both of two type -//------------------------------------------------------------------------------ -void PIO_KeypadDisableIt(AT91S_PIO *pPIO, unsigned int mode) -{ - switch(mode){ - case 1:PIO_KeyPadDisableKPIt(pPIO); - break; - - case 2:PIO_KeyPadDisableKRIt(pPIO); - break; - - case 3:PIO_KeyPadDisableKPIt(pPIO); - PIO_KeyPadDisableKRIt(pPIO); - break; - - default:break; - } - -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio_keypad.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio_keypad.h deleted file mode 100644 index 54021f6b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pio/pio_keypad.h +++ /dev/null @@ -1,153 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef PIO_KEYPAD_H -#define PIO_KEYPAD_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include - -//------------------------------------------------------------------------------ -// Global Definitions -//------------------------------------------------------------------------------ - - - - -//------------------------------------------------------------------------------ -// Global Macros -//------------------------------------------------------------------------------ -//enable keypad press interrupt -#define PIO_KeyPadEnableKPIt(pPIO) ((pPIO)->KIER = 1<<0) - -//enable keypad release interrupt -#define PIO_KeyPadEnableKRIt(pPIO) ((pPIO)->KIER = 1<<1) - -//disable keypad press interrupt -#define PIO_KeyPadDisableKPIt(pPIO) ((pPIO)->KIDR = 1<<0) - -//disable keypad release interrupt -#define PIO_KeyPadDisableKRIt(pPIO) ((pPIO)->KIDR = 1<<1) - -//enable keypad controller interrupt -#define PIO_KeyPadEnableIt(pPIO, mode) {switch(mode):\ - case 1:PIO_KeyPadEnableKPIt(pPIO);break;\ - case 2:PIO_KeyPadEnableKRIt(pPIO);break;\ - case 3:PIO_KeyPadEnableKPIt(pPIO);\ - PIO_KeyPadEnableKRIt(pPIO);break;\ - default:break;\ - } - -//disable keypad controller interrupt -#define PIO_KeyPadDisableIt(pPIO, mode) {switch(mode):\ - case 1:PIO_KeyPadDisableKPIt(pPIO);break;\ - case 2:PIO_KeyPadDisableKRIt(pPIO);break;\ - case 3:PIO_KeyPadDisableKPIt(pPIO);\ - PIO_KeyPadDisableKRIt(pPIO);break;\ - default:break;\ - } - -//get keypad controller interrupt mask -#define PIO_KeyPadGetItMask(pPIO) ((pPIO)->PIO_KIMR) - - -//------------------------------------------------------------------------------ -/// Calculates the size of an array of Pin instances. The array must be defined -/// locally (i.e. not a pointer), otherwise the computation will not be correct. -/// \param pPins Local array of Pin instances. -/// \return Number of elements in array. -//------------------------------------------------------------------------------ -#define PIO_LISTSIZE(pPins) (sizeof(pPins) / sizeof(Pin)) - -//------------------------------------------------------------------------------ -// Global Types -//------------------------------------------------------------------------------ -typedef enum { - FALSE, - TRUE -} bool; - -typedef struct _KeyPadConfig { - bool enable;//keypad controller enable or disable - unsigned char col:3;//config column size - unsigned char row:3;//config row size - unsigned int debouncing;//config debouncing -} KeyPadConfig; - - -typedef struct _KeyColRow { - unsigned char row:3; - unsigned char col:3; -} KeyColRow; - - -typedef struct _KeyDownEvent { - bool press;//at least 1 pressed key detected, or 0 - unsigned char keyPressNum;//simultaneously pressed key number - KeyColRow preKeyMatrix[4];//pressed key matrix -} KeyDownEvent; - - - -typedef struct _KeyUpEvent { - bool release;//at least 1 released key detected, or 0 - unsigned char keyRelNum;//simultaneously released key number - KeyColRow relKeyMatrix[4];//released key matrix -} KeyUpEvent; - - - -typedef struct _KeyEvent { - KeyDownEvent kdEvent; - KeyUpEvent kuEvent; -} KeyEvent; - -//------------------------------------------------------------------------------ -// Global Access Macros -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -void PIO_KeyPadConfig(AT91S_PIO *pPIO, KeyPadConfig *config); - -void PIO_GetKeyStatus(AT91S_PIO *pPIO, KeyEvent *event); - -void PIO_KeypadEnableIt(AT91S_PIO *pio, unsigned int mode); - -void PIO_KeypadDisableIt(AT91S_PIO *pio, unsigned int mode); - - -#endif //#ifndef PIO_KEYPAD_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pmc/pmc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pmc/pmc.c deleted file mode 100644 index 2c72eff3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pmc/pmc.c +++ /dev/null @@ -1,143 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "pmc.h" -#include -#include - -//------------------------------------------------------------------------------ -// Local definitions -//------------------------------------------------------------------------------ -#define MASK_STATUS0 0xFFFFFFFC -#define MASK_STATUS1 0xFFFFFFFF - - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Enables the clock of a peripheral. The peripheral ID is used - * to identify which peripheral is targetted. - * \note The ID must NOT be shifted (i.e. 1 << ID_xxx). - * \param id Peripheral ID (ID_xxx). - */ -void PMC_EnablePeripheral(unsigned int id) -{ - SANITY_CHECK(id < 35); - if (id < 32) { - if ((PMC->PMC_PCSR0 & (1 << id)) == (1 << id)) { - - TRACE_DEBUG("PMC_EnablePeripheral: clock of peripheral" " %u is already enabled\n\r", id); - } - else { - PMC->PMC_PCER0 = 1 << id; - } - } - else { - id -= 32; - if ((PMC->PMC_PCSR1 & (1 << id)) == (1 << id)) { - - TRACE_DEBUG("PMC_EnablePeripheral: clock of peripheral" " %u is already enabled\n\r", id + 32); - } - else { - PMC->PMC_PCER1 = 1 << id; - } - } -} - -/** - * \brief Disables the clock of a peripheral. The peripheral ID is used - * to identify which peripheral is targetted. - * \note The ID must NOT be shifted (i.e. 1 << ID_xxx). - * \param id Peripheral ID (ID_xxx). - */ -void PMC_DisablePeripheral(unsigned int id) -{ - SANITY_CHECK(id < 35); - if (id < 32) { - if ((PMC->PMC_PCSR0 & (1 << id)) != (1 << id)) { - TRACE_DEBUG("PMC_DisablePeripheral: clock of peripheral" " %u is not enabled\n\r", id); - } - else { - PMC->PMC_PCDR0 = 1 << id; - } - } - else { - id -= 32; - if ((PMC->PMC_PCSR1 & (1 << id)) != (1 << id)) { - TRACE_DEBUG("PMC_DisablePeripheral: clock of peripheral" " %u is not enabled\n\r", id + 32); - } - else { - PMC->PMC_PCDR1 = 1 << id; - } - } -} - -/** - * \brief Enable all the periph clock via PMC - */ -void PMC_EnableAllPeripherals(void) -{ - PMC->PMC_PCER0 = MASK_STATUS0; - while( (PMC->PMC_PCSR0 & MASK_STATUS0) != MASK_STATUS0); - PMC->PMC_PCER1 = MASK_STATUS1; - while( (PMC->PMC_PCSR1 & MASK_STATUS1) != MASK_STATUS1); - TRACE_DEBUG("Enable all periph clocks\n\r"); -} -/** - * \brief Disable all the periph clock via PMC - */ -void PMC_DisableAllPeripherals(void) -{ - PMC->PMC_PCDR0 = MASK_STATUS0; - while((PMC->PMC_PCSR0 & MASK_STATUS0) != 0); - PMC->PMC_PCDR1 = MASK_STATUS1; - while((PMC->PMC_PCSR1 & MASK_STATUS1) != 0); - TRACE_DEBUG("Disable all periph clocks\n\r"); -} - -/** - * \brief Get Periph Status for the given peripheral ID. - * \param id Peripheral ID (ID_xxx). - */ -unsigned int PMC_IsPeriphEnabled(unsigned int id) -{ - SANITY_CHECK(id < 35); - if (id < 32) { - return (PMC->PMC_PCSR0 & (1 << id)); - } - else { - return (PMC->PMC_PCSR1 & (1 << (id - 32))); - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pmc/pmc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pmc/pmc.h deleted file mode 100644 index 0e5bd33e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pmc/pmc.h +++ /dev/null @@ -1,62 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef PMC_H -#define PMC_H - -//------------------------------------------------------------------------------ -// Global functions -//------------------------------------------------------------------------------ - -#if defined(at91sam7l64) || defined(at91sam7l128) -extern void PMC_SetFastWakeUpInputs(unsigned int inputs); -extern void PMC_DisableMainOscillator(void); -extern -#ifdef __ICCARM__ -__ramfunc -#endif //__ICCARM__ -void PMC_DisableMainOscillatorForWaitMode(void); -#endif // at91sam7l64 at91sam7l128 - -extern void PMC_DisableProcessorClock(void); -extern void PMC_EnablePeripheral(unsigned int id); -extern void PMC_DisablePeripheral(unsigned int id); -extern void PMC_CPUInIdleMode(void); - - -extern void PMC_EnableAllPeripherals(void); - -extern void PMC_DisableAllPeripherals(void); - -extern unsigned int PMC_IsAllPeriphEnabled(void); - -extern unsigned int PMC_IsPeriphEnabled(unsigned int id); - -#endif //#ifndef PMC_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pwmc/pwmc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pwmc/pwmc.c deleted file mode 100644 index 406a5c8a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pwmc/pwmc.c +++ /dev/null @@ -1,648 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup pwm_module Working with PWM - * The PWM driver provides the interface to configure and use the PWM - * peripheral. - * - * The PWM macrocell controls square output waveforms of 4 channels. - * Characteristics of output waveforms such as period, duty-cycle, - * dead-time can be configured.\n - * Some of PWM channels can be linked together as synchronous channel and - * duty-cycle of synchronous channels can be updated by PDC automaticly. - * - * Before enabling the channels, they must have been configured first. - * The main settings include: - *
    - *
  • Configuration of the clock generator.
    • - *
  • Selection of the clock for each channel.
    • - *
  • Configuration of output waveform characteristics, such as period, duty-cycle etc.
    • - *
  • Configuration for synchronous channels if needed.
    • - * - Selection of the synchronous channels. - * - Selection of the moment when the WRDY flag and the corresponding PDC - * transfer request are set (PTRM and PTRCS in the PWM_SCM register). - * - Configuration of the update mode (UPDM in the PWM_SCM register). - * - Configuration of the update period (UPR in the PWM_SCUP register). - *
- * - * After the channels is enabled, the user must use respective update registers - * to change the wave characteristics to prevent unexpected output waveform. - * i.e. PWM_CDTYUPDx register should be used if user want to change duty-cycle - * when the channel is enabled. - * - * For more accurate information, please look at the PWM section of the - * Datasheet. - * - * Related files :\n - * \ref pwmc.c\n - * \ref pwmc.h.\n - */ -/*@{*/ -/*@}*/ - -/** - * \file - * - * Implementation of the Pulse Width Modulation Controller (PWM) peripheral. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include "pwmc.h" -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Finds a prescaler/divisor couple to generate the desired frequency - * from MCK. - * - * Returns the value to enter in PWM_CLK or 0 if the configuration cannot be - * met. - * - * \param frequency Desired frequency in Hz. - * \param mck Master clock frequency in Hz. - */ -static uint16_t FindClockConfiguration( - uint32_t frequency, - uint32_t mck) -{ - uint32_t divisors[11] = {1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024}; - uint8_t divisor = 0; - uint32_t prescaler; - - SANITY_CHECK(frequency < mck); - - /* Find prescaler and divisor values */ - prescaler = (mck / divisors[divisor]) / frequency; - while ((prescaler > 255) && (divisor < 11)) { - - divisor++; - prescaler = (mck / divisors[divisor]) / frequency; - } - - /* Return result */ - if (divisor < 11) { - - TRACE_DEBUG("Found divisor=%u and prescaler=%u for freq=%uHz\n\r", - divisors[divisor], prescaler, frequency); - return prescaler | (divisor << 8); - } - else { - - return 0; - } -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Configures PWM a channel with the given parameters, basic configure function. - * - * The PWM controller must have been clocked in the PMC prior to calling this - * function. - * Beware: this function disables the channel. It waits until disable is effective. - * - * \param channel Channel number. - * \param prescaler Channel prescaler. - * \param alignment Channel alignment. - * \param polarity Channel polarity. - */ -void PWMC_ConfigureChannel( - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity) -{ - SANITY_CHECK(prescaler < PWM_CMR0_CPRE_MCKB); - SANITY_CHECK((alignment & ~PWM_CMR0_CALG) == 0); - SANITY_CHECK((polarity & ~PWM_CMR0_CPOL) == 0); - - /* Disable channel (effective at the end of the current period) */ - if ((PWM->PWM_SR & (1 << channel)) != 0) { - PWM->PWM_DIS = 1 << channel; - while ((PWM->PWM_SR & (1 << channel)) != 0); - } - - /* Configure channel */ - PWM->PWM_CH_NUM[channel].PWM_CMR = prescaler | alignment | polarity; -} - -/** - * \brief Configures PWM a channel with the given parameters, extend configure function. - * - * The PWM controller must have been clocked in the PMC prior to calling this - * function. - * Beware: this function disables the channel. It waits until disable is effective. - * - * \param channel Channel number. - * \param prescaler Channel prescaler. - * \param alignment Channel alignment. - * \param polarity Channel polarity. - * \param countEventSelect Channel counter event selection. - * \param DTEnable Channel dead time generator enable. - * \param DTHInverte Channel Dead-Time PWMHx output Inverted. - * \param DTLInverte Channel Dead-Time PWMHx output Inverted. - */ -void PWMC_ConfigureChannelExt( - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity, - uint32_t countEventSelect, - uint32_t DTEnable, - uint32_t DTHInverte, - uint32_t DTLInverte) -{ - SANITY_CHECK(prescaler < PWM_CMR0_CPRE_MCKB); - SANITY_CHECK((alignment & ~PWM_CMR0_CALG) == 0); - SANITY_CHECK((polarity & ~PWM_CMR0_CPOL) == 0); - SANITY_CHECK((countEventSelect & ~PWM_CMR0_CES) == 0); - SANITY_CHECK((DTEnable & ~PWM_CMR0_DTE) == 0); - SANITY_CHECK((DTHInverte & ~PWM_CMR0_DTHI) == 0); - SANITY_CHECK((DTLInverte & ~PWM_CMR0_DTLI) == 0); - - /* Disable channel (effective at the end of the current period) */ - if ((PWM->PWM_SR & (1 << channel)) != 0) { - PWM->PWM_DIS = 1 << channel; - while ((PWM->PWM_SR & (1 << channel)) != 0); - } - - /* Configure channel */ - PWM->PWM_CH_NUM[channel].PWM_CMR = prescaler | alignment | polarity | - countEventSelect | DTEnable | DTHInverte | DTLInverte; -} - -/** - * \brief Configures PWM clocks A & B to run at the given frequencies. - * - * This function finds the best MCK divisor and prescaler values automatically. - * - * \param clka Desired clock A frequency (0 if not used). - * \param clkb Desired clock B frequency (0 if not used). - * \param mck Master clock frequency. - */ -void PWMC_ConfigureClocks(uint32_t clka, uint32_t clkb, uint32_t mck) -{ - uint32_t mode = 0; - uint32_t result; - - /* Clock A */ - if (clka != 0) { - - result = FindClockConfiguration(clka, mck); - ASSERT(result != 0, "-F- Could not generate the desired PWM frequency (%uHz)\n\r", (unsigned int)clka); - mode |= result; - } - - /* Clock B */ - if (clkb != 0) { - - result = FindClockConfiguration(clkb, mck); - ASSERT(result != 0, "-F- Could not generate the desired PWM frequency (%uHz)\n\r", (unsigned int)clkb); - mode |= (result << 16); - } - - /* Configure clocks */ - TRACE_DEBUG("Setting PWM_CLK = 0x%08X\n\r", mode); - PWM->PWM_CLK = mode; -} - -/** - * \brief Sets the period value used by a PWM channel. - * - * This function writes directly to the CPRD register if the channel is disabled; - * otherwise, it uses the update register CPRDUPD. - * - * \param channel Channel number. - * \param period Period value. - */ -void PWMC_SetPeriod(uint8_t channel, uint16_t period) -{ - /* If channel is disabled, write to CPRD */ - if ((PWM->PWM_SR & (1 << channel)) == 0) { - - PWM->PWM_CH_NUM[channel].PWM_CPRD = period; - } - /* Otherwise use update register */ - else { - - PWM->PWM_CH_NUM[channel].PWM_CPRDUPD = period; - } -} - -/** - * \brief Sets the duty cycle used by a PWM channel. - * This function writes directly to the CDTY register if the channel is disabled; - * otherwise it uses the update register CDTYUPD. - * Note that the duty cycle must always be inferior or equal to the channel - * period. - * - * \param channel Channel number. - * \param duty Duty cycle value. - */ -void PWMC_SetDutyCycle(uint8_t channel, uint16_t duty) -{ - SANITY_CHECK(duty <= PWM->PWM_CH_NUM[channel].PWM_CPRD); - - /* If channel is disabled, write to CDTY */ - if ((PWM->PWM_SR & (1 << channel)) == 0) { - - PWM->PWM_CH_NUM[channel].PWM_CDTY = duty; - } - /* Otherwise use update register */ - else { - - PWM->PWM_CH_NUM[channel].PWM_CDTYUPD = duty; - } -} - -/** - * \brief Sets the dead time used by a PWM channel. - * This function writes directly to the DT register if the channel is disabled; - * otherwise it uses the update register DTUPD. - * Note that the dead time must always be inferior or equal to the channel - * period. - * - * \param channel Channel number. - * \param timeH Dead time value for PWMHx output. - * \param timeL Dead time value for PWMLx output. - */ -void PWMC_SetDeadTime(uint8_t channel, uint16_t timeH, uint16_t timeL) -{ - SANITY_CHECK(timeH <= PWM->PWM_CH_NUM[channel].PWM_CPRD); - SANITY_CHECK(timeL <= PWM->PWM_CH_NUM[channel].PWM_CPRD); - - /* If channel is disabled, write to DT */ - if ((PWM->PWM_SR & (1 << channel)) == 0) { - - PWM->PWM_CH_NUM[channel].PWM_DT = timeH | (timeL << 16); - } - /* Otherwise use update register */ - else { - PWM->PWM_CH_NUM[channel].PWM_DTUPD = timeH | (timeL << 16); - } -} - -/** - * \brief Configures Syncronous channel with the given parameters. - * Beware: At this time, the channels should be disabled. - * - * \param channels Bitwise OR of Syncronous channels. - * \param updateMode Syncronous channel update mode. - * \param requestMode PDC transfer request mode. - * \param requestComparisonSelect PDC transfer request comparison selection. - */ -void PWMC_ConfigureSyncChannel( - uint32_t channels, - uint32_t updateMode, - uint32_t requestMode, - uint32_t requestComparisonSelect) -{ - PWM->PWM_SCM = channels | updateMode | requestMode - | requestComparisonSelect; -} - -/** - * \brief Sets the update period of the synchronous channels. - * This function writes directly to the SCUP register if the channel #0 is disabled; - * otherwise it uses the update register SCUPUPD. - * - * \param period update period. - */ -void PWMC_SetSyncChannelUpdatePeriod(uint8_t period) -{ - /* If channel is disabled, write to SCUP */ - if ((PWM->PWM_SR & (1 << 0)) == 0) { - - PWM->PWM_SCUP = period; - } - /* Otherwise use update register */ - else { - - PWM->PWM_SCUPUPD = period; - } -} - -/** - * \brief Sets synchronous channels update unlock. - * - * Note: If the UPDM field is set to 0, writing the UPDULOCK bit to 1 - * triggers the update of the period value, the duty-cycle and - * the dead-time values of synchronous channels at the beginning - * of the next PWM period. If the field UPDM is set to 1 or 2, - * writing the UPDULOCK bit to 1 triggers only the update of - * the period value and of the dead-time values of synchronous channels. - * This bit is automatically reset when the update is done. - */ -void PWMC_SetSyncChannelUpdateUnlock(void) -{ - PWM->PWM_SCUC = PWM_SCUC_UPDULOCK; -} - -/** - * \brief Enables the given PWM channel. - * - * This does NOT enable the corresponding pin;this must be done in the user code. - * - * \param channel Channel number. - */ -void PWMC_EnableChannel(uint8_t channel) -{ - PWM->PWM_ENA = 1 << channel; -} - -/** - * \brief Disables the given PWM channel. - * - * Beware, channel will be effectively disabled at the end of the current period. - * Application can check channel is disabled using the following wait loop: - * while ((PWM->PWM_SR & (1 << channel)) != 0); - * - * \param channel Channel number. - */ -void PWMC_DisableChannel(uint8_t channel) -{ - PWM->PWM_DIS = 1 << channel; -} - -/** - * \brief Enables the period interrupt for the given PWM channel. - * - * \param channel Channel number. - */ -void PWMC_EnableChannelIt(uint8_t channel) -{ - PWM->PWM_IER1 = 1 << channel; -} - -/** - * \brief Disables the period interrupt for the given PWM channel. - * - * \param channel Channel number. - */ -void PWMC_DisableChannelIt(uint8_t channel) -{ - PWM->PWM_IDR1 = 1 << channel; -} - -/** - * \brief Enables the selected interrupts sources on a PWMC peripheral. - * - * \param sources1 Bitwise OR of selected interrupt sources of PWM_IER1. - * \param sources2 Bitwise OR of selected interrupt sources of PWM_IER2. - */ -void PWMC_EnableIt(uint32_t sources1, uint32_t sources2) -{ - PWM->PWM_IER1 = sources1; - PWM->PWM_IER2 = sources2; -} - -/** - * \brief Disables the selected interrupts sources on a PWMC peripheral. - * - * \param sources1 Bitwise OR of selected interrupt sources of PWM_IDR1. - * \param sources2 Bitwise OR of selected interrupt sources of PWM_IDR2. - */ -void PWMC_DisableIt(uint32_t sources1, uint32_t sources2) -{ - PWM->PWM_IDR1 = sources1; - PWM->PWM_IDR2 = sources2; -} - -/** - * \brief Sends the contents of buffer through a PWMC peripheral, using the PDC to - * take care of the transfer. - * - * Note: Duty cycle of syncronous channels can update by PDC - * when the field UPDM (Update Mode) in the PWM_SCM register is set to 2. - * - * \param pwmc Pointer to an Pwm instance. - * \param buffer Data buffer to send. - * \param length Length of the data buffer. - */ -uint8_t PWMC_WriteBuffer(Pwm *pwmc, - void *buffer, - uint32_t length) -{ - /* Check if first bank is free */ - if (pwmc->PWM_TCR == 0) { - - pwmc->PWM_TPR = (uint32_t) buffer; - pwmc->PWM_TCR = length; - pwmc->PWM_PTCR = PERIPH_PTCR_TXTEN; - return 1; - } - /* Check if second bank is free */ - else if (pwmc->PWM_TNCR == 0) { - - pwmc->PWM_TNPR = (uint32_t) buffer; - pwmc->PWM_TNCR = length; - return 1; - } - - /* No free banks */ - return 0; -} - -/** - * \brief Set PWM output override value. - * - * \param value Bitwise OR of output override value. - */ -void PWMC_SetOverrideValue(uint32_t value) -{ - PWM->PWM_OOV = value; -} - -/** - * \brief Enalbe override output. - * - * \param value Bitwise OR of output selection. - * \param sync 0: enable the output asyncronously, 1: enable it syncronously - */ -void PWMC_EnableOverrideOutput(uint32_t value, uint32_t sync) -{ - if (sync) { - - PWM->PWM_OSSUPD = value; - } else { - - PWM->PWM_OSS = value; - } -} - -/** - * \brief Disalbe override output. - * - * \param value Bitwise OR of output selection. - * \param sync 0: enable the output asyncronously, 1: enable it syncronously - */ -void PWMC_DisableOverrideOutput(uint32_t value, uint32_t sync) -{ - if (sync) { - - PWM->PWM_OSCUPD = value; - } else { - - PWM->PWM_OSC = value; - } -} - -/** - * \brief Set PWM fault mode. - * - * \param mode Bitwise OR of fault mode. - */ -void PWMC_SetFaultMode(uint32_t mode) -{ - PWM->PWM_FMR = mode; -} - -/** - * \brief PWM fault clear. - * - * \param fault Bitwise OR of fault to clear. - */ -void PWMC_FaultClear(uint32_t fault) -{ - PWM->PWM_FCR = fault; -} - -/** - * \brief Set PWM fault protection value. - * - * \param value Bitwise OR of fault protection value. - */ -void PWMC_SetFaultProtectionValue(uint32_t value) -{ - PWM->PWM_FPV = value; -} - -/** - * \brief Enable PWM fault protection. - * - * \param value Bitwise OR of FPEx[y]. - */ -void PWMC_EnableFaultProtection(uint32_t value) -{ - PWM->PWM_FPE = value; -} - -/** - * \brief Configure comparison unit. - * - * \param x comparison x index - * \param value comparison x value. - * \param mode comparison x mode - */ -void PWMC_ConfigureComparisonUnit(uint32_t x, uint32_t value, uint32_t mode) -{ - /* If channel is disabled, write to CMPxM & CMPxV */ - if ((PWM->PWM_SR & (1 << 0)) == 0) { - if (x == 0) { - PWM->PWM_CMP0M = mode; - PWM->PWM_CMP0V = value; - } else if (x == 1) { - PWM->PWM_CMP1M = mode; - PWM->PWM_CMP1V = value; - } else if (x == 2) { - PWM->PWM_CMP2M = mode; - PWM->PWM_CMP2V = value; - } else if (x == 3) { - PWM->PWM_CMP3M = mode; - PWM->PWM_CMP3V = value; - } else if (x == 4) { - PWM->PWM_CMP4M = mode; - PWM->PWM_CMP4V = value; - } else if (x == 5) { - PWM->PWM_CMP5M = mode; - PWM->PWM_CMP5V = value; - } else if (x == 6) { - PWM->PWM_CMP6M = mode; - PWM->PWM_CMP6V = value; - } else if (x == 7) { - PWM->PWM_CMP7M = mode; - PWM->PWM_CMP7V = value; - } - } - /* Otherwise use update register */ - else { - if (x == 0) { - PWM->PWM_CMP0MUPD = mode; - PWM->PWM_CMP0VUPD = value; - } else if (x == 1) { - PWM->PWM_CMP1MUPD = mode; - PWM->PWM_CMP1VUPD = value; - } else if (x == 2) { - PWM->PWM_CMP2MUPD = mode; - PWM->PWM_CMP2VUPD = value; - } else if (x == 3) { - PWM->PWM_CMP3MUPD = mode; - PWM->PWM_CMP3VUPD = value; - } else if (x == 4) { - PWM->PWM_CMP4MUPD = mode; - PWM->PWM_CMP4VUPD = value; - } else if (x == 5) { - PWM->PWM_CMP5MUPD = mode; - PWM->PWM_CMP5VUPD = value; - } else if (x == 6) { - PWM->PWM_CMP6MUPD = mode; - PWM->PWM_CMP6VUPD = value; - } else if (x == 7) { - PWM->PWM_CMP7MUPD = mode; - PWM->PWM_CMP7VUPD = value; - } - } -} - -/** - * \brief Configure event line mode. - * - * \param x Line x - * \param mode Bitwise OR of line mode selection - */ -void PWMC_ConfigureEventLineMode(uint32_t x, uint32_t mode) -{ - SANITY_CHECK(x < 2); - - PWM->PWM_ELxMR[x] = mode; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pwmc/pwmc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pwmc/pwmc.h deleted file mode 100644 index 1c0a5b29..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/pwmc/pwmc.h +++ /dev/null @@ -1,159 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * Interface for configuration the Pulse Width Modulation Controller (PWM) peripheral. - * - * \par Usage - * - * -# Configures PWM clocks A & B to run at the given frequencies using - * \ref PWMC_ConfigureClocks(). - * -# Configure PWMC channel using \ref PWMC_ConfigureChannel(), \ref PWMC_ConfigureChannelExt() - * \ref PWMC_SetPeriod(), \ref PWMC_SetDutyCycle() and \ref PWMC_SetDeadTime(). - * -# Enable & disable channel using \ref PWMC_EnableChannel() and - * \ref PWMC_DisableChannel(). - * -# Enable & disable the period interrupt for the given PWM channel using - * \ref PWMC_EnableChannelIt() and \ref PWMC_DisableChannelIt(). - * -# Enable & disable the selected interrupts sources on a PWMC peripheral - * using \ref PWMC_EnableIt() and \ref PWMC_DisableIt(). - * -# Control syncronous channel using \ref PWMC_ConfigureSyncChannel(), - * \ref PWMC_SetSyncChannelUpdatePeriod() and \ref PWMC_SetSyncChannelUpdateUnlock(). - * -# Control PWM override output using \ref PWMC_SetOverrideValue(), - * \ref PWMC_EnableOverrideOutput() and \ref PWMC_DisableOverrideOutput(). - * -# \ref Send data through the transmitter using \ref PWMC_WriteBuffer(). - * - */ - -#ifndef PWMC_H -#define PWMC_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/* PWM sub-bit field definition. begin */ -/* TODO: remove them when AT91SAM3S4.h have the definitions. */ -// PWM_CMRx -#define PWM_CMR0_CPRE_MCKA (0xB) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCKB (0xC) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCKA (0xB) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCKA (0xB) // (PWMC_CH) -// PWM_SCM -#define PWM_SCM_UPDM_MODE0 (0x0 << 16) // (PWMC) Manual write of data and manual trigger of the update -#define PWM_SCM_UPDM_MODE1 (0x1 << 16) // (PWMC) Manual write of data and automatic trigger of the update -#define PWM_SCM_UPDM_MODE2 (0x2 << 16) // (PWMC) Automatic write of data and automatic trigger of the update -/* end */ - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void PWMC_ConfigureChannel( - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity); - -extern void PWMC_ConfigureChannelExt( - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity, - uint32_t countEventSelect, - uint32_t DTEnable, - uint32_t DTHInverte, - uint32_t DTLInverte); - -extern void PWMC_ConfigureClocks - (uint32_t clka, - uint32_t clkb, - uint32_t mck); - -extern void PWMC_SetPeriod(uint8_t channel, uint16_t period); - -extern void PWMC_SetDutyCycle(uint8_t channel, uint16_t duty); - -extern void PWMC_SetDeadTime(uint8_t channel, uint16_t timeH, uint16_t timeL); - -extern void PWMC_ConfigureSyncChannel( - uint32_t channels, - uint32_t updateMode, - uint32_t requestMode, - uint32_t requestComparisonSelect); - -extern void PWMC_SetSyncChannelUpdatePeriod(uint8_t period); - -extern void PWMC_SetSyncChannelUpdateUnlock(void); - -extern void PWMC_EnableChannel(uint8_t channel); - -extern void PWMC_DisableChannel(uint8_t channel); - -extern void PWMC_EnableChannelIt(uint8_t channel); - -extern void PWMC_DisableChannelIt(uint8_t channel); - -extern void PWMC_EnableIt(uint32_t sources1, uint32_t sources2); - -extern void PWMC_DisableIt(uint32_t sources1, uint32_t sources2); - -extern uint8_t PWMC_WriteBuffer(Pwm *pwmc, - void *buffer, - uint32_t length); - -extern void PWMC_SetOverrideValue(uint32_t value); - -extern void PWMC_EnableOverrideOutput(uint32_t value, uint32_t sync); - -extern void PWMC_DisableOverrideOutput(uint32_t value, uint32_t sync); - -extern void PWMC_SetFaultMode(uint32_t mode); - -extern void PWMC_FaultClear(uint32_t fault); - -extern void PWMC_SetFaultProtectionValue(uint32_t value); - -extern void PWMC_EnableFaultProtection(uint32_t value); - -extern void PWMC_ConfigureComparisonUnit(uint32_t x, uint32_t value, uint32_t mode); - -extern void PWMC_ConfigureEventLineMode(uint32_t x, uint32_t mode); - -#endif /* #ifndef PWMC_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/qtouch/libQTouchIarCfg3SRevABeta1.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/qtouch/libQTouchIarCfg3SRevABeta1.txt deleted file mode 100644 index a0aa300d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/qtouch/libQTouchIarCfg3SRevABeta1.txt +++ /dev/null @@ -1,6 +0,0 @@ -QTouch library for AT91SAM3S-EK board version A. -Modified board. - -Burst pulses 5 CPU cycles wide. - -Slider on pins PA0, PA1, PA2, PA3, PA4, PA5 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/qtouch/libQTouchIarCfg3SRevABeta2.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/qtouch/libQTouchIarCfg3SRevABeta2.txt deleted file mode 100644 index 3ae67b9d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/qtouch/libQTouchIarCfg3SRevABeta2.txt +++ /dev/null @@ -1,10 +0,0 @@ -QTouch library for AT91SAM3S-EK board version A. -Modified board. - -Burst pulses 5 CPU cycles wide. - -A Valid key on pins PC22 and PC23 -A UP key on pins PC24 and PC25 -A Down key on pins PC26 and PC27 -A Left key on pins PC28 and PC29 -A right key on pins PC30 and PC31 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/qtouch/libQTouchIarCfg3SRevB.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/qtouch/libQTouchIarCfg3SRevB.txt deleted file mode 100644 index b05f3865..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/qtouch/libQTouchIarCfg3SRevB.txt +++ /dev/null @@ -1,11 +0,0 @@ -QTouch library for AT91SAM3S-EK board version B. - -Burst pulses 5 CPU cycles wide. - -Slider on pins PA0, PA1, PA2, PA3, PA4, PA5 - -A Valid key on pins PC22 and PC23 -A UP key on pins PC24 and PC25 -A Down key on pins PC26 and PC27 -A Left key on pins PC28 and PC29 -A right key on pins PC30 and PC31 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/rtc/rtc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/rtc/rtc.c deleted file mode 100644 index 8ed4d430..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/rtc/rtc.c +++ /dev/null @@ -1,467 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup rtc_module Working with RTC - * The RTC driver provides the interface to configure and use the RTC - * peripheral. - * - * It manages date, time, and alarms.\n - * This timer is clocked by the 32kHz system clock, and is not impacted by - * power management settings (PMC). To be accurate, it is better to use an - * external 32kHz crystal instead of the internal 32kHz RC.\n - * - * It uses BCD format, and time can be set in AM/PM or 24h mode through a - * configuration bit in the mode register.\n - * - * To update date or time, the user has to follow these few steps : - *
    - *
  • Set UPDTIM and/or UPDCAL bit(s) in RTC_CR,
    • - *
  • Polling or IRQ on the ACKUPD bit of RTC_CR,
    • - *
  • Clear ACKUPD bit in RTC_SCCR,
    • - *
  • Update Time and/or Calendar values in RTC_TIMR/RTC_CALR (BCD format),
    • - *
  • Clear UPDTIM and/or UPDCAL bit in RTC_CR.
    • - *
- * An alarm can be set to happen on month, date, hours, minutes or seconds, - * by setting the proper "Enable" bit of each of these fields in the Time and - * Calendar registers. - * This allows a large number of configurations to be available for the user. - * Alarm occurence can be detected even by polling or interrupt. - * - * A check of the validity of the date and time format and values written by the user is automatically done. - * Errors are reported through the Valid Entry Register. - * - * For more accurate information, please look at the RTC section of the - * Datasheet. - * - * Related files :\n - * \ref rtc.c\n - * \ref rtc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of Real Time Clock (RTC) controller. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include "rtc.h" -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Sets the RTC in either 12 or 24 hour mode. - * - * \param mode Hour mode. - */ -void RTC_SetHourMode(uint32_t mode) -{ - SANITY_CHECK((mode & 0xFFFFFFFE) == 0); - - TRACE_DEBUG("RTC_SetHourMode()\n\r"); - - RTC->RTC_MR = mode; -} - -/** - * \brief Gets the RTC mode. - * - * \return Hour mode. - */ -uint32_t RTC_GetHourMode( void ) -{ - uint32_t hmode; - - TRACE_DEBUG("RTC_SetHourMode()\n\r"); - - hmode = RTC->RTC_MR; - hmode &= 0xFFFFFFFE; - - return hmode; -} - -/** - * \brief Enables the selected interrupt sources of the RTC. - * - * \param sources Interrupt sources to enable. - */ -void RTC_EnableIt(uint32_t sources) -{ - SANITY_CHECK((sources & ~0x1F) == 0); - - TRACE_DEBUG("RTC_EnableIt()\n\r"); - - RTC->RTC_IER = sources; -} - -/** -* \brief Disables the selected interrupt sources of the RTC. -* -* \param sources Interrupt sources to disable. -*/ -void RTC_DisableIt(uint32_t sources) -{ - SANITY_CHECK((sources & ~0x1F) == 0); - - TRACE_DEBUG("RTC_DisableIt()\n\r"); - - RTC->RTC_IDR = sources; -} - -/** - * \brief Sets the current time in the RTC. - * - * \param hour Current hour in 12 or 24 hour mode. - * \param minute Current minute. - * \param second Current second. - * \return 0 sucess, 1 fail to set - */ -int RTC_SetTime(uint8_t hour, uint8_t minute, uint8_t second) -{ - uint32_t time=0; - uint8_t hour_bcd; - uint8_t min_bcd; - uint8_t sec_bcd; - - TRACE_DEBUG("RTC_SetTime(%02d:%02d:%02d)\n\r", hour, minute, second); - - /* if 12-hour mode, set AMPM bit */ - if ((RTC->RTC_MR & RTC_MR_HRMOD) == RTC_MR_HRMOD) { - - if (hour > 12) { - - hour -= 12; - time |= RTC_TIMR_AMPM; - } - } - hour_bcd = (hour%10) | ((hour/10)<<4); - min_bcd = (minute%10) | ((minute/10)<<4); - sec_bcd = (second%10) | ((second/10)<<4); - - /* value overflow */ - if((hour_bcd & (uint8_t)(~RTC_HOUR_BIT_LEN_MASK)) | - (min_bcd & (uint8_t)(~RTC_MIN_BIT_LEN_MASK)) | - (sec_bcd & (uint8_t)(~RTC_SEC_BIT_LEN_MASK))) - return 1; - - time = sec_bcd | (min_bcd << 8) | (hour_bcd<<16); - - /* Set time */ - while ((RTC->RTC_SR & RTC_SR_SEC) != RTC_SR_SEC); /* wait from previous set */ - RTC->RTC_CR |= RTC_CR_UPDTIM; - while ((RTC->RTC_SR & RTC_SR_ACKUPD) != RTC_SR_ACKUPD); - RTC->RTC_SCCR = RTC_SCCR_ACKCLR; - RTC->RTC_TIMR = time; - RTC->RTC_CR &= ~RTC_CR_UPDTIM; - RTC->RTC_SCCR |= RTC_SCCR_SECCLR; /* clear SECENV in SCCR */ - - return (int)(RTC->RTC_VER & RTC_VER_NVTIM); -} - -/** - * \brief Retrieves the current time as stored in the RTC in several variables. - * - * \param pHour If not null, current hour is stored in this variable. - * \param pMinute If not null, current minute is stored in this variable. - * \param pSecond If not null, current second is stored in this variable. - */ -void RTC_GetTime( - uint8_t *pHour, - uint8_t *pMinute, - uint8_t *pSecond) -{ - uint32_t time; - - TRACE_DEBUG("RTC_GetTime()\n\r"); - - /* Get current RTC time */ - time = RTC->RTC_TIMR; - while (time != RTC->RTC_TIMR) { - - time = RTC->RTC_TIMR; - } - - /* Hour */ - if (pHour) { - - *pHour = ((time & 0x00300000) >> 20) * 10 - + ((time & 0x000F0000) >> 16); - if ((time & RTC_TIMR_AMPM) == RTC_TIMR_AMPM) { - - *pHour += 12; - } - } - - /* Minute */ - if (pMinute) { - - *pMinute = ((time & 0x00007000) >> 12) * 10 - + ((time & 0x00000F00) >> 8); - } - - /* Second */ - if (pSecond) { - - *pSecond = ((time & 0x00000070) >> 4) * 10 - + (time & 0x0000000F); - } -} - -/** - * \brief Sets a time alarm on the RTC. - * The match is performed only on the provided variables; - * Setting all pointers to 0 disables the time alarm. - * - * \note In AM/PM mode, the hour value must have bit #7 set for PM, cleared for - * AM (as expected in the time registers). - * - * \param pHour If not null, the time alarm will hour-match this value. - * \param pMinute If not null, the time alarm will minute-match this value. - * \param pSecond If not null, the time alarm will second-match this value. - * \return 0 success, 1 fail to set - */ -int RTC_SetTimeAlarm( - uint8_t *pHour, - uint8_t *pMinute, - uint8_t *pSecond) -{ - uint32_t alarm = 0; - - TRACE_DEBUG("RTC_SetTimeAlarm()\n\r"); - - /* Hour */ - if (pHour) { - - alarm |= RTC_TIMALR_HOUREN | ((*pHour / 10) << 20) | ((*pHour % 10) << 16); - } - - /* Minute */ - if (pMinute) { - - alarm |= RTC_TIMALR_MINEN | ((*pMinute / 10) << 12) | ((*pMinute % 10) << 8); - } - - /* Second */ - if (pSecond) { - - alarm |= RTC_TIMALR_SECEN | ((*pSecond / 10) << 4) | (*pSecond % 10); - } - - RTC->RTC_TIMALR = alarm; - - return (int)(RTC->RTC_VER & RTC_VER_NVTIMALR); -} - -/** - * \brief Retrieves the current year, month and day from the RTC. - * Month, day and week values are numbered starting at 1. - * - * \param pYear Current year (optional). - * \param pMonth Current month (optional). - * \param pDay Current day (optional). - * \param pWeek Current day in current week (optional). - */ -void RTC_GetDate( - unsigned short *pYear, - uint8_t *pMonth, - uint8_t *pDay, - uint8_t *pWeek) -{ - uint32_t date; - - /* Get current date (multiple reads are necessary to insure a stable value) */ - do { - - date = RTC->RTC_CALR; - } - while (date != RTC->RTC_CALR); - - /* Retrieve year */ - if (pYear) { - - *pYear = (((date >> 4) & 0x7) * 1000) - + ((date & 0xF) * 100) - + (((date >> 12) & 0xF) * 10) - + ((date >> 8) & 0xF); - } - - /* Retrieve month */ - if (pMonth) { - - *pMonth = (((date >> 20) & 1) * 10) + ((date >> 16) & 0xF); - } - - /* Retrieve day */ - if (pDay) { - - *pDay = (((date >> 28) & 0x3) * 10) + ((date >> 24) & 0xF); - } - - /* Retrieve week */ - if (pWeek) { - - *pWeek = ((date >> 21) & 0x7); - } -} - -/** - * \brief Sets the current year, month and day in the RTC. - * Month, day and week values must be numbered starting from 1. - * - * \param year Current year. - * \param month Current month. - * \param day Current day. - * \param week Day number in current week. - * \return 0 success, 1 fail to set - */ -int RTC_SetDate( - unsigned short year, - uint8_t month, - uint8_t day, - uint8_t week) -{ - uint32_t date; - uint8_t cent_bcd; - uint8_t year_bcd; - uint8_t month_bcd; - uint8_t day_bcd; - uint8_t week_bcd; - - cent_bcd = ((year/100)%10) | ((year/1000)<<4); - year_bcd = (year%10) | (((year/10)%10)<<4); - month_bcd = ((month%10) | (month/10)<<4); - day_bcd = ((day%10) | (day/10)<<4); - week_bcd = ((week%10) | (week/10)<<4); - - /* value over flow */ - if((cent_bcd & (uint8_t)(~RTC_CENT_BIT_LEN_MASK)) | - (year_bcd & (uint8_t)(~RTC_YEAR_BIT_LEN_MASK)) | - (month_bcd & (uint8_t)(~RTC_MONTH_BIT_LEN_MASK)) | - (week_bcd & (uint8_t)(~RTC_WEEK_BIT_LEN_MASK)) | - (day_bcd & (uint8_t)(~RTC_DATE_BIT_LEN_MASK))) - return 1; - - - /* Convert values to date register value */ - date = cent_bcd | - (year_bcd << 8) | - (month_bcd << 16) | - (week_bcd << 21) | - (day_bcd << 24); - - - /* Update calendar register */ - while ((RTC->RTC_SR & RTC_SR_SEC) != RTC_SR_SEC); /* wait from previous set */ - RTC->RTC_CR |= RTC_CR_UPDCAL; - while ((RTC->RTC_SR & RTC_SR_ACKUPD) != RTC_SR_ACKUPD); - RTC->RTC_SCCR = RTC_SCCR_ACKCLR; - RTC->RTC_CALR = date; - RTC->RTC_CR &= ~RTC_CR_UPDCAL; - RTC->RTC_SCCR |= RTC_SCCR_SECCLR; /* clear SECENV in SCCR */ - - return (int)(RTC->RTC_VER & RTC_VER_NVCAL); -} - -/** - * \brief Sets a date alarm in the RTC. - * The alarm will match only the provided values; - * Passing a null-pointer disables the corresponding field match. - * - * \param pMonth If not null, the RTC alarm will month-match this value. - * \param pDay If not null, the RTC alarm will day-match this value. - * \return 0 success, 1 fail to set - */ -int RTC_SetDateAlarm(uint8_t *pMonth, uint8_t *pDay) -{ - uint32_t alarm; - - alarm = ((pMonth) || (pDay)) ? (0) : (0x01010000); - - TRACE_DEBUG("RTC_SetDateAlarm()\n\r"); - - /* Compute alarm field value */ - if (pMonth) { - - alarm |= RTC_CALALR_MTHEN | ((*pMonth / 10) << 20) | ((*pMonth % 10) << 16); - } - if (pDay) { - - alarm |= RTC_CALALR_DATEEN | ((*pDay / 10) << 28) | ((*pDay % 10) << 24); - } - - /* Set alarm */ - RTC->RTC_CALALR = alarm; - - return (int)(RTC->RTC_VER & RTC_VER_NVCALALR); -} - -/** - * \brief Clear flag bits of status clear command register in the RTC. - * - * \param mask Bits mask of cleared events - */ -void RTC_ClearSCCR(uint32_t mask) -{ - /* Clear all flag bits in status clear command register */ - mask &= RTC_SCCR_ACKCLR | RTC_SCCR_ALRCLR | RTC_SCCR_SECCLR | \ - RTC_SCCR_TIMCLR | RTC_SCCR_CALCLR; - - RTC->RTC_SCCR = mask; -} - -/** - * \brief Get flag bits of status register in the RTC. - * - * \param mask Bits mask of Status Register - * \return Status register & mask - */ -uint32_t RTC_GetSR(uint32_t mask) -{ - uint32_t event; - - event = RTC->RTC_SR; - - return (event & mask); -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/rtc/rtc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/rtc/rtc.h deleted file mode 100644 index 5f821d3d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/rtc/rtc.h +++ /dev/null @@ -1,99 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Real Time Clock (RTC) controller. - * - */ - -#ifndef RTC_H -#define RTC_H - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -#define RTC_HOUR_BIT_LEN_MASK 0x3F -#define RTC_MIN_BIT_LEN_MASK 0x7F -#define RTC_SEC_BIT_LEN_MASK 0x7F -#define RTC_CENT_BIT_LEN_MASK 0x7F -#define RTC_YEAR_BIT_LEN_MASK 0xFF -#define RTC_MONTH_BIT_LEN_MASK 0x1F -#define RTC_DATE_BIT_LEN_MASK 0x3F -#define RTC_WEEK_BIT_LEN_MASK 0x07 - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void RTC_SetHourMode(uint32_t mode); - -extern uint32_t RTC_GetHourMode( void ) ; - -extern void RTC_EnableIt(uint32_t sources); - -extern void RTC_DisableIt(uint32_t sources); - -extern int RTC_SetTime( - uint8_t hour, - uint8_t minute, - uint8_t second); - -extern void RTC_GetTime( - uint8_t *pHour, - uint8_t *pMinute, - uint8_t *pSecond); - -extern int RTC_SetTimeAlarm( - uint8_t *pHour, - uint8_t *pMinute, - uint8_t *pSecond); - -extern void RTC_GetDate( - unsigned short *pYear, - uint8_t *pMonth, - uint8_t *pDay, - uint8_t *pWeek); - -extern int RTC_SetDate( - unsigned short year, - uint8_t month, - uint8_t day, - uint8_t week); - -extern int RTC_SetDateAlarm(uint8_t *pMonth, uint8_t *pDay); - -extern void RTC_ClearSCCR(uint32_t mask); - -extern uint32_t RTC_GetSR(uint32_t mask); - -#endif /* #ifndef RTC_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/rtt/rtt.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/rtt/rtt.c deleted file mode 100644 index f225ad35..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/rtt/rtt.c +++ /dev/null @@ -1,136 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup rtt_module Working with RTT - * The RTT driver provides the interface to configure and use the RTT - * peripheral. - * - * The Real-time Timer is used to count elapsed seconds.\n - * This timer is clocked by the 32kHz system clock divided by a programmable - * 16-bit balue. To be accurate, it is better to use an - * external 32kHz crystal instead of the internal 32kHz RC.\n - * - * To count elapsed seconds, the user could follow these few steps: - *
    - *
  • Programming PTPRES in RTT_MR to feeding the timer with a 1Hz signal.
    • - *
  • Writing the bit RTTRST in RTT_MR to restart the timer with new settings.
    • - *
- * - * An alarm can be set to happen on second by setting alarm value in RTT_AR. - * Alarm occurence can be detected by polling or interrupt. - * - * For more accurate information, please look at the RTT section of the - * Datasheet. - * - * Related files :\n - * \ref rtt.c\n - * \ref rtt.h.\n - */ -/*@{*/ -/*@}*/ - -/** - * \file - * - * Implementation of Real Time Timer (RTT) controller. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include "rtt.h" -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Changes the prescaler value of the given RTT and restarts it. - * - * \note This function disables RTT interrupt sources. - * - * \param rtt Pointer to a Rtt instance. - * \param prescaler Prescaler value for the RTT. - */ -void RTT_SetPrescaler(Rtt *rtt, uint16_t prescaler) -{ - rtt->RTT_MR = (prescaler | RTT_MR_RTTRST); -} - -/** - * \brief Returns the current value of the RTT timer value. - * - * \param rtt Pointer to a Rtt instance. - */ -uint32_t RTT_GetTime(Rtt *rtt) -{ - return rtt->RTT_VR; -} - -/** - * \brief Enables the specified RTT interrupt sources. - * - * \param rtt Pointer to a Rtt instance. - * \param sources Bitmask of interrupts to enable. - */ -void RTT_EnableIT(Rtt *rtt, uint32_t sources) -{ - ASSERT((sources & 0x0004FFFF) == 0, - "RTT_EnableIT: Wrong sources value.\n\r"); - rtt->RTT_MR |= sources; -} - -/** - * \brief Returns the status register value of the given RTT. - * - * \param rtt Pointer to an Rtt instance. - */ -uint32_t RTT_GetStatus(Rtt *rtt) -{ - return rtt->RTT_SR; -} - -/** - * \brief Configures the RTT to generate an alarm at the given time. - * - * \param pRtt Pointer to an Rtt instance. - * \param time Alarm time. - */ -void RTT_SetAlarm(Rtt *pRtt, uint32_t time) -{ - SANITY_CHECK(time > 0); - - pRtt->RTT_AR = time - 1; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/rtt/rtt.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/rtt/rtt.h deleted file mode 100644 index 13d4b716..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/rtt/rtt.h +++ /dev/null @@ -1,80 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * Interface for Real Time Timer (RTT) controller. - * - * \par Usage - * - * -# Changes the prescaler value of the given RTT and restarts it - * using \ref RTT_SetPrescaler(). - * -# Get current value of the RTT using \ref RTT_GetTime(). - * -# Enables the specified RTT interrupt using \ref RTT_EnableIT(). - * -# Get the status register value of the given RTT using \ref RTT_GetStatus(). - * -# Configures the RTT to generate an alarm at the given time - * using \ref RTT_SetAlarm(). - */ - -#ifndef RTT_H -#define RTT_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -#ifndef AT91C_BASE_RTTC - #define AT91C_BASE_RTTC RTT -#endif - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void RTT_SetPrescaler(Rtt *rtt, uint16_t prescaler); - -extern uint32_t RTT_GetTime(Rtt *rtt); - -extern void RTT_EnableIT(Rtt *rtt, uint32_t sources); - -extern uint32_t RTT_GetStatus(Rtt *rtt); - -extern void RTT_SetAlarm(Rtt *pRtt, uint32_t time); - -#endif /* #ifndef RTT_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/at45d.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/at45d.c deleted file mode 100644 index 4a608837..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/at45d.c +++ /dev/null @@ -1,253 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup at45d_module AT45 driver. - * The AT45 Dataflash driver is based on the corresponding AT45 driver. - * A AT45 instance has to be initialized using the Dataflash levle function - * AT45_Configure(). AT45 Dataflash can be automatically detected using - * the AT45_FindDevice() function. Then AT45 dataflash operations such as - * read, write and erase DF can be launched using AT45_SendCommand function - * with corresponding AT45 command set. - * - * \usage - *
    - *
  • Reads data from the At45 at the specified address using AT45D_Read().
    • - *
  • Writes data on the At45 at the specified address using AT45D_Write().
    • - *
  • Erases a page of data at the given address using AT45D_Erase().
    • - *
  • Poll until the At45 has completed of corresponding operations using - * AT45D_WaitReady().
    • - *
  • Retrieves and returns the At45 current using AT45D_GetStatus().
    • - *
- * Related files :\n - * \ref at45d.c\n - * \ref at45d.h.\n - */ - /*@{*/ - /*@}*/ - - -/** - * \file - * - * Implementation of At45 driver. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "spi_at45.h" -#include "at45d.h" -#include -#include - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Wait for transfer to finish calling the SPI driver ISR (interrupts are - * disabled). - * - * \param pAt45 Pointer to an AT45 driver instance. - */ -static void AT45D_Wait(At45 *pAt45) -{ - SANITY_CHECK(pAt45); - - /* Wait for transfer to finish*/ - while (AT45_IsBusy(pAt45)) { - - SPID_Handler(pAt45->pSpid); - } -} - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Waits for the At45 to be ready to accept new commands. - * - * \param pAt45 Pointer to an AT45 driver instance. - */ -void AT45D_WaitReady(At45 *pAt45) -{ - uint8_t ready = 0; - - SANITY_CHECK(pAt45); - /* Poll device until it is ready.*/ - while (!ready) { - ready = AT45_STATUS_READY(AT45D_GetStatus(pAt45)); - } -} - -/** - * \brief Retrieves and returns the At45 current status, or 0 if an error happened. - * - * \param pAt45 Pointer to an AT45 driver instance. - */ -uint8_t AT45D_GetStatus(At45 *pAt45) -{ - uint8_t error; - uint8_t status; - - SANITY_CHECK(pAt45); - - /* Issue a status register read command*/ - error = AT45_SendCommand(pAt45, AT45_STATUS_READ, 1, &status, 1, 0, 0, 0); - ASSERT(!error, "-F- AT45_GetStatus: Failed to issue command.\n\r"); - - /* Wait for command to terminate*/ - while (AT45_IsBusy(pAt45)) { - AT45D_Wait(pAt45); - } - return status; -} - -/** - * \brief Reads data from the At45 inside the provided buffer. Since a continuous - * read command is used, there is no restriction on the buffer size and read address. - * - * \param pAt45 Pointer to an AT45 driver instance. - * \param pBuffer Data buffer. - * \param size Number of bytes to read. - * \param address Address at which data shall be read. - */ -void AT45D_Read( - At45 *pAt45, - uint8_t *pBuffer, - uint32_t size, - uint32_t address) -{ - uint8_t error; - - SANITY_CHECK(pAt45); - SANITY_CHECK(pBuffer); - - /* Issue a continuous read array command.*/ - error = AT45_SendCommand(pAt45, AT45_CONTINUOUS_READ_LEG, 8, pBuffer, size, address, 0, 0); - ASSERT(!error, "-F- AT45_Read: Failed to issue command\n\r"); - - /* Wait for the read command to execute.*/ - while (AT45_IsBusy(pAt45)) { - - AT45D_Wait(pAt45); - } -} - -/** - * \brief Writes data on the At45 at the specified address. Only one page of - * data is written that way; if the address is not at the beginning of the - * page, the data is written starting from this address and wraps around to - * the beginning of the page. - * \param pAt45 Pointer to an AT45 driver instance. - * \param pBuffer Data buffer. - * \param size Number of bytes to write. - * \param address Destination address on the At45. - */ -void AT45D_Write( - At45 *pAt45, - uint8_t *pBuffer, - uint32_t size, - uint32_t address) -{ - uint8_t error; - - SANITY_CHECK(pAt45); - SANITY_CHECK(pBuffer); - SANITY_CHECK(size <= pAt45->pDesc->pageSize); - - /* Issue a page write through buffer 1 command. */ - error = AT45_SendCommand(pAt45, AT45_PAGE_WRITE_BUF1, 4, pBuffer, size, address, 0, 0); - ASSERT(!error, "-F- AT45_Write: Could not issue command.\n\r"); - - /* Wait until the command is sent. */ - while (AT45_IsBusy(pAt45)) { - - AT45D_Wait(pAt45); - } - - /* Wait until the At45 becomes ready again.*/ - AT45D_WaitReady(pAt45); -} - -/** - * \brief Erases a page of data at the given address in the At45. - * - * \param pAt45 Pointer to an AT45 driver instance. - * \param address Address of page to erase. - */ -void AT45D_Erase(At45 *pAt45, uint32_t address) -{ - uint8_t error; - - SANITY_CHECK(pAt45); - - /* Issue a page erase command. */ - error = AT45_SendCommand(pAt45, AT45_PAGE_ERASE, 4, 0, 0, address, 0, 0); - ASSERT(!error, "-F- AT45_Erase: Could not issue command.\n\r"); - - /* Wait for end of transfer. */ - while (AT45_IsBusy(pAt45)) { - - AT45D_Wait(pAt45); - } - - /* Poll until the At45 has completed the erase operation.*/ - AT45D_WaitReady(pAt45); -} - -/** - * \brief Configure power-of-2 binary page size in the At45. - * - * \param pAt45 Pointer to an AT45 driver instance. - */ -void AT45D_BinaryPage(At45 *pAt45) -{ - uint8_t error; - uint8_t opcode[3]= {AT45_BINARY_PAGE}; - SANITY_CHECK(pAt45); - - /* Issue a binary page command. */ - - error = AT45_SendCommand(pAt45, AT45_BINARY_PAGE_FIRST_OPCODE, 1, opcode, 3, 0, 0, 0); - - ASSERT(!error, "-F- AT45_Erase: Could not issue command.\n\r"); - - /* Wait for end of transfer.*/ - while (AT45_IsBusy(pAt45)) { - - AT45D_Wait(pAt45); - } - - /* Wait until the At45 becomes ready again.*/ - AT45D_WaitReady(pAt45); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/at45d.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/at45d.h deleted file mode 100644 index 31a06ab6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/at45d.h +++ /dev/null @@ -1,72 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of At45 driver. - * - */ - - -#ifndef AT45D_H -#define AT45D_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "spi_at45.h" - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ - -extern void AT45D_WaitReady(At45 *pAt45); - -extern uint8_t AT45D_GetStatus(At45 *pAt45); - -extern void AT45D_Read( - At45 *pAt45, - uint8_t *pBuffer, - uint32_t size, - uint32_t address); - -extern void AT45D_Write( - At45 *pAt45, - uint8_t *pBuffer, - uint32_t size, - uint32_t address); - -extern void AT45D_Erase(At45 *pAt45, uint32_t address); - -extern void AT45D_BinaryPage(At45 *pAt45); - -#endif //#ifndef AT45D_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/spi_at45.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/spi_at45.c deleted file mode 100644 index 679a7d78..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/spi_at45.c +++ /dev/null @@ -1,311 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup spi_at45_module SPI AT45 driver. - * The Dataflash driver is based on top of the corresponding Spi driver. - * A Dataflash structure instance has to be initialized using the DF_Init - * function. Then basic dataflash operations can be launched using macros such - * as DF_continuous_read. These macros invoke the DF_Command() function which - * invokes the DPI low driver using the SPI_SendCommand() function. - * Beware to compute the dataflash internal address, the dataflash sector - * description must be known (DataflashDesc). Dataflash can be automatically - * detected using the DF_Scan() function. - * - * \usage - *
    - *
  • Initializes an AT45 instance and configures SPI chip select pin - * using AT45_Configure().
    • - *
  • Detect DF and returns DF description corresponding to the device - * connected using AT45_FindDevice().This function shall be called by - * the application before AT45_SendCommand.
    • - *
  • Sends a command to the DF through the SPI using AT45_SendCommand(). - * The command is identified by its command code and the number of - * bytes to transfer.
    • - *
  • Example code for sending command to write a page to DF.
    • - * \code - * // Issue a page write through buffer 1 command - * error = AT45_SendCommand(pAt45, AT45_PAGE_WRITE_BUF1, 4, - * pBuffer, size, address, 0, 0); - * \endcode - *
  • Example code for sending command to read a page from DF. - * If data needs to be received, then a data buffer must be - * provided.
    • - * \code - * // Issue a continuous read array command - * error = AT45_SendCommand(pAt45, AT45_CONTINUOUS_READ_LEG, 8, - * pBuffer, size, address, 0, 0); - * \endcode - *
  • This function does not block; its optional callback will - * be invoked when the transfer completes.
    • - *
  • Check the AT45 driver is ready or not by polling AT45_IsBusy(). - *
- * Related files :\n - * \ref spi_at45.c\n - * \ref spi_at45.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of SPI At45 driver. - * - */ - - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "spi_at45.h" -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Internal definitions - *----------------------------------------------------------------------------*/ - -/** Number of dataflash which can be recognized.*/ -#define NUMDATAFLASH (sizeof(at45Devices) / sizeof(At45Desc)) - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** indicate if the device is configured as binary page or not.*/ -static uint8_t configuredBinaryPage; - -/** At45 device descriptor structure. */ -static const At45Desc at45Devices[] = { - { 512, 1, 264, 9, 0x0C, "AT45DB011D"}, - { 1024, 1, 264, 9, 0x14, "AT45DB021D"}, - { 2048, 1, 264, 9, 0x1C, "AT45DB041D"}, - { 4096, 1, 264, 9, 0x24, "AT45DB081D"}, - { 4096, 1, 528, 10, 0x2C, "AT45DB161D"}, - { 8192, 1, 528, 10, 0x34, "AT45DB321D"}, - { 8192, 1, 1056, 11, 0x3C, "AT45DB642D"}, - {16384, 1, 1056, 11, 0x10, "AT45DB1282"}, - {16384, 1, 2112, 12, 0x18, "AT45DB2562"}, - {32768, 1, 2112, 12, 0x20, "AT45DB5122"} -}; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initializes an AT45 instance and configures SPI chip select register. - * - * \param pAt45 Pointer to the At45 instance to initialize. - * \param pSpid Pointer to the underlying SPI driver. - * \param spiCs Chip select value to connect to the At45. - * \return 0. - */ -uint8_t AT45_Configure(At45 *pAt45, Spid *pSpid, uint8_t spiCs) -{ - SpidCmd *pCommand; - - /* Sanity checks */ - ASSERT(pSpid, "AT45_Configure: pSpid is 0.\n\r"); - ASSERT(pAt45, "AT45_Configure: pAt45 is 0.\n\r"); - - /* Initialize the At45 instance */ - pAt45->pSpid = pSpid; - pAt45->pDesc = 0; - memset(pAt45->pCmdBuffer, 0, 8); - - /* Initialize the spidCmd structure*/ - pCommand = &(pAt45->command); - pCommand->pCmd = pAt45->pCmdBuffer; - pCommand->callback = 0; - pCommand->pArgument = 0; - pCommand->spiCs = spiCs; - - return 0; -} - -/** - * \brief Check if the At45 driver is in busy. - * - * \param pAt45 Pointer to the At45 instance to initialize. - * \return 1 if the At45 driver is not executing any command,otherwise it returns 0. - */ -uint8_t AT45_IsBusy(At45 *pAt45) -{ - return SPID_IsBusy(pAt45->pSpid); -} - -/** - * \brief Sends a command to the dataflash through the SPI. - * The command is identified by its command code and the number of bytes to transfer - * (1 + number of address bytes + number of dummy bytes).If data needs to be received, - * then a data buffer must be provided. - * \note This function does not block; its optional callback will be invoked when - * the transfer completes. - * \param pAt45 Pointer to the At45 instance to initialize. - * \param cmd Command code. - * \param cmdSize Size of command code + address bytes + dummy bytes. - * \param pData Data buffer. - * \param dataSize Number of data bytes to send/receive. - * \param address Address at which the command is performed if meaningful. - * \param callback Optional callback to invoke at end of transfer. - * \param pArgument Optional parameter to the callback function. - * \return 0. - */ -uint8_t AT45_SendCommand( - At45 *pAt45, - uint8_t cmd, - uint8_t cmdSize, - uint8_t *pData, - uint32_t dataSize, - uint32_t address, - SpidCallback callback, - void *pArgument) -{ - SpidCmd *pCommand; - const At45Desc *pDesc = pAt45->pDesc; - uint32_t dfAddress = 0; - - /* Sanity checks*/ - ASSERT(pAt45, "AT45_Command: pAt45 is 0.\n\r"); - ASSERT(pDesc || (cmd == AT45_STATUS_READ), - "AT45_Command: Device has no descriptor, only STATUS_READ command allowed\n\r"); - - /* Check if the SPI driver is available*/ - if (AT45_IsBusy(pAt45)) { - - return AT45_ERROR_LOCK; - } - - /* Compute command pattern*/ - pAt45->pCmdBuffer[0] = cmd; - - /* Add address bytes if necessary*/ - if (cmdSize > 1) { - - ASSERT(pDesc, "AT45_Command: No descriptor for dataflash.\n\r"); - if (!configuredBinaryPage) { - dfAddress = - ((address / (pDesc->pageSize)) << pDesc->pageOffset) - + (address % (pDesc->pageSize)); - } - else { - dfAddress = address; - } - /* Write address bytes*/ - if (pDesc->pageNumber >= 16384) { - - pAt45->pCmdBuffer[1] = ((dfAddress & 0x0F000000) >> 24); - pAt45->pCmdBuffer[2] = ((dfAddress & 0x00FF0000) >> 16); - pAt45->pCmdBuffer[3] = ((dfAddress & 0x0000FF00) >> 8); - pAt45->pCmdBuffer[4] = ((dfAddress & 0x000000FF) >> 0); - - if ((cmd != AT45_CONTINUOUS_READ) && (cmd != AT45_PAGE_READ)) { - - cmdSize++; - } - } - else { - - pAt45->pCmdBuffer[1] = ((dfAddress & 0x00FF0000) >> 16); - pAt45->pCmdBuffer[2] = ((dfAddress & 0x0000FF00) >> 8); - pAt45->pCmdBuffer[3] = ((dfAddress & 0x000000FF) >> 0); - } - } - - /* Update the SPI Transfer descriptors*/ - pCommand = &(pAt45->command); - pCommand->cmdSize = cmdSize; - pCommand->pData = pData; - pCommand->dataSize = dataSize; - pCommand->callback = callback; - pCommand->pArgument = pArgument; - - /* Send Command and data through the SPI*/ - if (SPID_SendCommand(pAt45->pSpid, pCommand)) { - - return AT45_ERROR_SPI; - } - - return 0; -} - -/** - * \brief returns the At45Desc structure corresponding to the device connected. - * It automatically initializes pAt45->pDesc field structure. - * \note This function shall be called by the application before AT45_SendCommand. - * \param pAt45 Pointer to the At45 instance to initialize. - * \param status Device status register value. - * \return 0 if successful; Otherwise, returns AT45_ERROR_LOCK if the At45 - * driver is in use or AT45_ERROR_SPI if there was an error with the SPI driver. - */ -const At45Desc * AT45_FindDevice(At45 *pAt45, uint8_t status) -{ - uint32_t i; - uint8_t id = AT45_STATUS_ID(status); - - /* Check if status is all one; in which case, it is assumed that no device is connected*/ - if (status == 0xFF) { - - return 0; - } - - /* Look in device array */ - i = 0; - pAt45->pDesc = 0; - while ((i < NUMDATAFLASH) && !(pAt45->pDesc)) { - - if (at45Devices[i].id == id) { - - pAt45->pDesc = &(at45Devices[i]); - } - i++; - } - configuredBinaryPage = AT45_STATUS_BINARY(status); - return pAt45->pDesc; -} - -/** - * \brief returns the pagesize corresponding to the device connected. - * \param pAt45 Pointer to the At45 instance to initialize. - * \param status Device status register value. - * \return page size. - */ -uint32_t AT45_PageSize(At45 *pAt45) -{ - uint32_t pagesize = pAt45->pDesc->pageSize; - if(((pAt45->pDesc->hasBinaryPage) == 0) || !configuredBinaryPage){ - return pagesize; - } - return ((pagesize >> 8) << 8); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/spi_at45.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/spi_at45.h deleted file mode 100644 index fc1fca4e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/spi_at45.h +++ /dev/null @@ -1,202 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of SPI At45 driver. - * - */ - -#ifndef SPI_AT45_H -#define SPI_AT45_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "spi_pdc.h" - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ -/** Returns 1 if the device is ready; otherwise 0.*/ -#define AT45_STATUS_READY(status) (status & 0x80) -/** Returns the device ID code.*/ -#define AT45_STATUS_ID(status) (status & 0x3c) -/** Returns 1 if the device is configured in binary page mode; otherwise 0.*/ -#define AT45_STATUS_BINARY(status) (status & 0x01) - -#define AT45_PageOffset(pAt45) ((pAt45)->pDesc->pageOffset) -#define AT45_PageNumber(pAt45) ((pAt45)->pDesc->pageNumber) - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** The dataflash driver is currently in use.*/ -#define AT45_ERROR_LOCK 1 -/** There was an error with the SPI driver.*/ -#define AT45_ERROR_SPI 2 - -/** AT45 dataflash SPI CSR settings given MCK and SPCK.*/ -#define AT45_CSR(mck, spck) (SPI_CSR_NCPHA | SPID_CSR_DLYBCT(mck, 250) | SPID_CSR_DLYBS(mck, 250) | SPID_CSR_SCBR(mck, spck)) - -/** Main memory page read command code. */ -#define AT45_PAGE_READ 0xD2 -/** Continous array read (legacy) command code.*/ -#define AT45_CONTINUOUS_READ_LEG 0xE8 -/** Continous array read (low frequency) command code.*/ -#define AT45_CONTINUOUS_READ_LF 0x03 -/** Continous array read command code.*/ -#define AT45_CONTINUOUS_READ 0x0B -/** Buffer 1 read (low frequency) command code.*/ -#define AT45_BUF1_READ_LF 0xD1 -/** Buffer 2 read (low frequency) command code.*/ -#define AT45_BUF2_READ_LF 0xD3 -/** Buffer 1 read (serial) command code.*/ -#define AT45_BUF1_READ_SER 0xD4 -/** Buffer 2 read (serial) command code.*/ -#define AT45_BUF2_READ_SER 0xD6 -/** Buffer 1 read (8-bit) command code.*/ -#define AT45_BUF1_READ_8B 0x54 -/** Buffer 2 read (8-bit) command code.*/ -#define AT45_BUF2_READ_8B 0x56 - -/** Buffer 1 write command code.*/ -#define AT45_BUF1_WRITE 0x84 -/** Buffer 2 write command code.*/ -#define AT45_BUF2_WRITE 0x87 -/** Buffer 1 to main memory page program with erase command code.*/ -#define AT45_BUF1_MEM_ERASE 0x83 -/** Buffer 2 to main memory page program with erase command code.*/ -#define AT45_BUF2_MEM_ERASE 0x86 -/** Buffer 1 to main memory page program without erase command code.*/ -#define AT45_BUF1_MEM_NOERASE 0x88 -/** Buffer 2 to main memory page program without erase command code.*/ -#define AT45_BUF2_MEM_NOERASE 0x89 -/** Page erase command code.*/ -#define AT45_PAGE_ERASE 0x81 -/** Block erase command code.*/ -#define AT45_BLOCK_ERASE 0x50 -/** Sector erase command code.*/ -#define AT45_SECTOR_ERASE 0x7C -/** Chip erase command code.*/ -#define AT45_CHIP_ERASE 0xC7, 0x94, 0x80, 0x9A -/** Main memory page program through buffer 1 command code.*/ -#define AT45_PAGE_WRITE_BUF1 0x82 -/** Main memory page program through buffer 2 command code.*/ -#define AT45_PAGE_WRITE_BUF2 0x85 - -/** Main memory page to buffer 1 transfer command code.*/ -#define AT45_PAGE_BUF1_TX 0x53 -/** Main memory page to buffer 2 transfer command code.*/ -#define AT45_PAGE_BUF2_TX 0x55 -/** Main memory page to buffer 1 compare command code.*/ -#define AT45_PAGE_BUF1_CMP 0x60 -/** Main memory page to buffer 2 compare command code.*/ -#define AT45_PAGE_BUF2_CMP 0x61 -/** Auto page rewrite through buffer 1 command code.*/ -#define AT45_AUTO_REWRITE_BUF1 0x58 -/** Auto page rewrite through buffer 2 command code.*/ -#define AT45_AUTO_REWRITE_BUF2 0x59 -/** Deep power-down command code.*/ -#define AT45_DEEP_PDOWN 0xB9 -/** Resume from deep power-down command code.*/ -#define AT45_RES_DEEP_PDOWN 0xAB -/** Status register read command code.*/ -#define AT45_STATUS_READ 0xD7 -/** Manufacturer and device ID read command code.*/ -#define AT45_ID_READ 0x9F - -/** Power-of-2 binary page size configuration command code.*/ -#define AT45_BINARY_PAGE_FIRST_OPCODE 0x3D -#define AT45_BINARY_PAGE 0x2A, 0x80, 0xA6 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** Dataflash description. A constant array of DataflashDesc instance is defined - in at45.c. The DF_Scan() function returns the corresponding descriptor according - to the dataflash ID detected. This description (page_size, page_offset) is used - to compute the internal dataflash address by the DF_Command() function. */ -typedef struct { - /** dataflash page number. */ - uint32_t pageNumber; - // indicate if power-of-2 binary page supported.*/ - uint32_t hasBinaryPage; - /** dataflash page size.*/ - uint32_t pageSize; - /** page offset in command.*/ - uint32_t pageOffset; - /** Dataflash ID.*/ - uint8_t id; - /** Identifier.*/ - const char *name; -} At45Desc; - -/** Dataflash driver structure. It holds the current command being processed. - This structure is initialized by the DF_Init() command. - pDfDesc field can be initialized by the DF_Scan() function. - cmdBuffer is a private driver area used to compute the dataflash address to - be sent to the dataflash. Beware the PDC master must have access to this area.*/ -typedef struct _Dataflash { - /** Pointer to Spi Structure (SPI low level driver).*/ - Spid *pSpid; - /** Current SPI command sent to the SPI low level driver.*/ - SpidCmd command; - /** Pointer to the dataflash description.*/ - const At45Desc *pDesc; - /** Buffer to store the current command (opcode + dataflash address.*/ - uint8_t pCmdBuffer[8]; -} At45; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern uint8_t AT45_Configure(At45 *pAt45, Spid *pSpid, uint8_t spiCs); - -extern uint8_t AT45_IsBusy(At45 *pAt45); - -extern uint8_t AT45_SendCommand( - At45 *pAt45, - uint8_t cmd, - uint8_t cmdSize, - uint8_t *pData, - uint32_t dataSize, - uint32_t address, - SpidCallback callback, - void *pArgument); - -extern const At45Desc * AT45_FindDevice(At45 *pAt45, uint8_t status); - -extern uint32_t AT45_PageSize(At45 *pAt45); -#endif // #ifndef SPI_AT45_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/spi_pdc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/spi_pdc.c deleted file mode 100644 index d0998b04..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/spi_pdc.c +++ /dev/null @@ -1,275 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup spi_pdc_module SPI PDC driver - * The Spi driver is a low level spi driver which performs SPI device Initializes, - * spi transfer and receive. It can be used by upper SPI driver such as AT45 - * driver and AT26 driver. - * - * \usage - *
    - *
  • Initializes a SPI instance and the corresponding SPI hardware, - * Configure SPI in Master Mode using SPID_Configure().
    • - *
  • Configures the SPI characteristics (such as Clock Polarity, Phase, - * transfers delay and Baud Rate) for the device corresponding to the - * chip select using SPID_ConfigureCS().
    • - *
  • Starts a SPI master transfer using SPID_SendCommand(). - * The transfer is performed using the PDC channels.
    • - *
  • It enable the SPI clock.
    • - *
  • Set the corresponding peripheral chip select.
    • - *
  • Initialize the two SPI PDC buffers.
    • - *
  • Initialize SPI_TPR and SPI_TCR with SPI command data and size - * to send command data first.
    • - *
  • Initialize SPI_RPR and SPI_RCR with SPI command data and size - * as dummy value.
    • - *
  • Initialize SPI_TNPR and SPI_TNCR with rest of the data to be - * transfered.(if the data specified in cmd structure)
    • - *
  • Initialize SPI_RNPR and SPI_RNCR with rest of the data to be - * received.(if the data specified in cmd structure)
    • - *
  • Initialize the callback function if specified.
    • - *
  • Enable transmitter and receiver.
    • - *
  • Example for sending a command to the dataflash through the SPI.
    • - * \code - * /// Build command to be sent. - * ... - * // Send Command and data through the SPI - * if (SPID_SendCommand(pAt45->pSpid, pCommand)) { - * return AT45_ERROR_SPI; - * } - * \endcode - *
  • The SPI_Handler() must be called by the SPI Interrupt Service Routine - * with the corresponding Spi instance. It is invokes to check for pending - * interrupts.
    • - *
  • Example for initializing SPI interrupt handler in upper application.
    • - * \code - * AIC_ConfigureIT(AT91C_ID_SPI, 0, SPI_Handler); - * \endcode - *
- * Related files :\n - * \ref spi_pdc.c\n - * \ref spi_pdc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of SPI PDC driver. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "spi_pdc.h" -#include - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ - -/** Write PMC register*/ -#define WRITE_PMC(pPmc, regName, value) pPmc->regName = (value) - -/** Write SPI register*/ -#define WRITE_SPI(pSpi, regName, value) pSpi->regName = (value) - -/** Read SPI registers */ -#define READ_SPI(pSpi, regName) (pSpi->regName) - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initializes the Spid structure and the corresponding SPI hardware. - * - * \param pSpid Pointer to a Spid instance. - * \param pSpiHw Associated SPI peripheral. - * \param spiId SPI peripheral identifier. - * \return 0. - */ -uint8_t SPID_Configure(Spid *pSpid, Spi *pSpiHw, uint8_t spiId) -{ - /* Initialize the SPI structure*/ - pSpid->pSpiHw = pSpiHw; - pSpid->spiId = spiId; - pSpid->semaphore = 1; - pSpid->pCurrentCommand = 0; - - /* Enable the SPI clock*/ - WRITE_PMC(PMC, PMC_PCER0, (1 << pSpid->spiId)); - - /* Execute a software reset of the SPI twice */ - WRITE_SPI(pSpiHw, SPI_CR, SPI_CR_SWRST); - WRITE_SPI(pSpiHw, SPI_CR, SPI_CR_SWRST); - - /* Configure SPI in Master Mode with No CS selected !!! */ - WRITE_SPI(pSpiHw, SPI_MR, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PCS); - - /* Enable the SPI*/ - WRITE_SPI(pSpiHw, SPI_CR, SPI_CR_SPIEN); - - /* Enable the SPI clock*/ - WRITE_PMC(PMC, PMC_PCDR0, (1 << pSpid->spiId)); - - return 0; -} - -/** - * \brief Configures the parameters for the device corresponding to the cs. - * - * \param pSpid Pointer to a Spid instance. - * \param cs number corresponding to the SPI chip select. - * \param csr SPI_CSR value to setup. - */ -void SPID_ConfigureCS(Spid *pSpid, uint8_t cs, uint32_t csr) -{ - Spi *pSpiHw = pSpid->pSpiHw; - WRITE_SPI(pSpiHw, SPI_CSR[cs], csr); -} - -/** - * \brief Starts a SPI master transfer. This is a non blocking function. It will - * return as soon as the transfer is started. - * - * \param pSpid Pointer to a Spid instance. - * \param pCommand Pointer to the SPI command to execute. - * \return 0 if the transfer has been started successfully; otherwise returns - * SPID_ERROR_LOCK is the driver is in use, or SPID_ERROR if the command is not - * valid. - */ -uint8_t SPID_SendCommand(Spid *pSpid, SpidCmd *pCommand) -{ - Spi *pSpiHw = pSpid->pSpiHw; - uint32_t spiMr; - - /* Try to get the dataflash semaphore */ - if (pSpid->semaphore == 0) { - - return SPID_ERROR_LOCK; - } - pSpid->semaphore--; - - /* Enable the SPI clock */ - WRITE_PMC(PMC, PMC_PCER0, (1 << pSpid->spiId)); - - /* Disable transmitter and receiver*/ - WRITE_SPI(pSpiHw, SPI_PTCR, SPI_PTCR_RXTDIS | SPI_PTCR_TXTDIS); - - /* Write to the MR register*/ - spiMr = READ_SPI(pSpiHw, SPI_MR); - spiMr |= SPI_MR_PCS; - spiMr &= ~((1 << pCommand->spiCs) << 16); - WRITE_SPI(pSpiHw, SPI_MR, spiMr); - - /* Initialize the two SPI PDC buffer*/ - WRITE_SPI(pSpiHw, SPI_RPR, (int) pCommand->pCmd); - WRITE_SPI(pSpiHw, SPI_RCR, pCommand->cmdSize); - WRITE_SPI(pSpiHw, SPI_TPR, (int) pCommand->pCmd); - WRITE_SPI(pSpiHw, SPI_TCR, pCommand->cmdSize); - - WRITE_SPI(pSpiHw, SPI_RNPR, (int) pCommand->pData); - WRITE_SPI(pSpiHw, SPI_RNCR, pCommand->dataSize); - WRITE_SPI(pSpiHw, SPI_TNPR, (int) pCommand->pData); - WRITE_SPI(pSpiHw, SPI_TNCR, pCommand->dataSize); - - /* Initialize the callback*/ - pSpid->pCurrentCommand = pCommand; - - /* Enable transmitter and receiver*/ - WRITE_SPI(pSpiHw, SPI_PTCR, SPI_PTCR_RXTEN | SPI_PTCR_TXTEN); - - /* Enable buffer complete interrupt*/ - WRITE_SPI(pSpiHw, SPI_IER, SPI_IER_RXBUFF); - - return 0; -} - - -/** - * \brief The SPI_Handler must be called by the SPI Interrupt Service Routine with the - * corresponding Spi instance. - * - * \note The SPI_Handler will unlock the Spi semaphore and invoke the upper application - * callback. - * \param pSpid Pointer to a Spid instance. - */ -void SPID_Handler(Spid *pSpid) -{ - SpidCmd *pSpidCmd = pSpid->pCurrentCommand; - Spi *pSpiHw = pSpid->pSpiHw; - volatile uint32_t spiSr; - - /* Read the status register*/ - spiSr = READ_SPI(pSpiHw, SPI_SR); - if (spiSr & SPI_SR_RXBUFF) { - - /* Disable transmitter and receiver */ - WRITE_SPI(pSpiHw, SPI_PTCR, SPI_PTCR_RXTDIS | SPI_PTCR_TXTDIS); - - /* Disable the SPI clock*/ - WRITE_PMC(PMC, PMC_PCDR0, (1 << pSpid->spiId)); - - /* Disable buffer complete interrupt */ - WRITE_SPI(pSpiHw, SPI_IDR, SPI_IDR_RXBUFF); - - /* Release the dataflash semaphore*/ - pSpid->semaphore++; - - /* Invoke the callback associated with the current command*/ - if (pSpidCmd && pSpidCmd->callback) { - - pSpidCmd->callback(0, pSpidCmd->pArgument); - } - - /* Nothing must be done after. A new DF operation may have been started - in the callback function.*/ - } -} - -/** - * \brief Returns 1 if the SPI driver is currently busy executing a command; otherwise - * returns 0. - * \param pSpid Pointer to a Spid instance. - */ -uint8_t SPID_IsBusy(const Spid *pSpid) -{ - if (pSpid->semaphore == 0) { - - return 1; - } - else { - - return 0; - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/spi_pdc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/spi_pdc.h deleted file mode 100644 index bace9efc..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi-flash/spi_pdc.h +++ /dev/null @@ -1,133 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of SPI PDC driver. - * - */ - -#ifndef SPI_PDC_H -#define SPI_PDC_H - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** An unspecified error has occured.*/ -#define SPID_ERROR 1 - -/** SPI driver is currently in use.*/ -#define SPID_ERROR_LOCK 2 - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ - -/** Calculates the value of the SCBR field of the Chip Select Register given MCK and SPCK.*/ -#define SPID_CSR_SCBR(mck, spck) ((((mck) / (spck)) << 8) & SPI_CSR_SCBR) - -/** Calculates the value of the DLYBS field of the Chip Select Register given delay in ns and MCK.*/ -#define SPID_CSR_DLYBS(mck, delay) ((((((delay) * ((mck) / 1000000)) / 1000) + 1) << 16) & SPI_CSR_DLYBS) - -/** Calculates the value of the DLYBCT field of the Chip Select Register given delay in ns and MCK.*/ -#define SPID_CSR_DLYBCT(mck, delay) ((((((delay) / 32 * ((mck) / 1000000)) / 1000) + 1) << 24) & SPI_CSR_DLYBCT) - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** SPI transfer complete callback.*/ -typedef void (*SpidCallback )(uint8_t, void *); - -/** Spi Transfer Request prepared by the application upper layer. This structure - is sent to the SPI_SendCommand function to start the transfer. At the end of - the transfer, the callback is invoked by the interrupt handler.*/ -typedef struct _SpidCmd { - - /** Pointer to the command data.*/ - uint8_t *pCmd; - /** Command size in bytes.*/ - uint8_t cmdSize; - /** Pointer to the data to be sent.*/ - uint8_t *pData; - /** Data size in bytes.*/ - unsigned short dataSize; - /** SPI chip select.*/ - uint8_t spiCs; - /** Callback function invoked at the end of transfer.*/ - SpidCallback callback; - /** Callback arguments.*/ - void *pArgument; - -} SpidCmd; - -/** Constant structure associated with SPI port. This structure prevents - client applications to have access in the same time.*/ -typedef struct { - - /** Pointer to SPI Hardware registers*/ - Spi *pSpiHw; - /** SPI Id as defined in the product datasheet*/ - char spiId; - /** Current SpiCommand being processed*/ - SpidCmd *pCurrentCommand; - /** Mutual exclusion semaphore.*/ - volatile char semaphore; - -} Spid; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern uint8_t SPID_Configure( - Spid *pSpid, - Spi *pSpiHw, - uint8_t spiId); - -extern void SPID_ConfigureCS(Spid *pSpid, uint8_t cs, uint32_t csr); - -extern uint8_t SPID_SendCommand( - Spid *pSpid, - SpidCmd *pCommand); - -extern void SPID_Handler(Spid *pSpid); - -extern uint8_t SPID_IsBusy(const Spid *pSpid); - -#endif // #ifndef SPI_PDC_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi/spi.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi/spi.c deleted file mode 100644 index 4e6ba29a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi/spi.c +++ /dev/null @@ -1,241 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup spi_module Working with SPI - * The SPI driver provides the interface to configure and use the SPI - * peripheral. - * - * The Serial Peripheral Interface (SPI) circuit is a synchronous serial - * data link that provides communication with external devices in Master - * or Slave Mode. - * - * To use the SPI, the user has to follow these few steps: - * -# Enable the SPI pins required by the application (see pio.h). - * -# Configure the SPI using the \ref SPI_Configure(). This enables the - * peripheral clock. The mode register is loaded with the given value. - * -# Configure all the necessary chip selects with \ref SPI_ConfigureNPCS(). - * -# Enable the SPI by calling \ref SPI_Enable(). - * -# Send/receive data using \ref SPI_Write() and \ref SPI_Read(). Note that \ref SPI_Read() - * must be called after \ref SPI_Write() to retrieve the last value read. - * -# Send/receive data using the PDC with the \ref SPI_WriteBuffer() and - * \ref SPI_ReadBuffer() functions. - * -# Disable the SPI by calling \ref SPI_Disable(). - * - * For more accurate information, please look at the SPI section of the - * Datasheet. - * - * Related files :\n - * \ref spi.c\n - * \ref spi.h.\n -*/ -/*@{*/ -/*@}*/ - -/** - * \file - * - * Implementation of Serial Peripheral Interface (SPI) controller. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "spi.h" -#include "pmc/pmc.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Enables a SPI peripheral. - * - * \param spi Pointer to an Spi instance. - */ -void SPI_Enable(Spi *spi) -{ - spi->SPI_CR = SPI_CR_SPIEN; -} - -/** - * \brief Disables a SPI peripheral. - * - * \param spi Pointer to an Spi instance. - */ -void SPI_Disable(Spi *spi) -{ - spi->SPI_CR = SPI_CR_SPIDIS; -} - -/** - * \brief Configures a SPI peripheral as specified. The configuration can be computed - * using several macros (see \ref spi_configuration_macros). - * - * \param spi Pointer to an Spi instance. - * \param id Peripheral ID of the SPI. - * \param configuration Value of the SPI configuration register. - */ -void SPI_Configure(Spi *spi, - uint32_t id, - uint32_t configuration) -{ - PMC_EnablePeripheral(ID_SPI); - spi->SPI_CR = SPI_CR_SPIDIS; - - /* Execute a software reset of the SPI twice */ - spi->SPI_CR = SPI_CR_SWRST; - spi->SPI_CR = SPI_CR_SWRST; - spi->SPI_MR = configuration; -} - -/** - * \brief Configures a chip select of a SPI peripheral. The chip select configuration - * is computed using several macros (see \ref spi_configuration_macros). - * - * \param spi Pointer to an Spi instance. - * \param npcs Chip select to configure (0, 1, 2 or 3). - * \param configuration Desired chip select configuration. - */ -void SPI_ConfigureNPCS(Spi *spi, - uint32_t npcs, - uint32_t configuration) -{ - spi->SPI_CSR[npcs] = configuration; -} - -/** - * \brief Sends data through a SPI peripheral. If the SPI is configured to use a fixed - * peripheral select, the npcs value is meaningless. Otherwise, it identifies - * the component which shall be addressed. - * - * \param spi Pointer to an Spi instance. - * \param npcs Chip select of the component to address (0, 1, 2 or 3). - * \param data Word of data to send. - */ -void SPI_Write(Spi *spi, uint32_t npcs, uint16_t data) -{ - /* Send data */ - while ((spi->SPI_SR & SPI_SR_TXEMPTY) == 0); - spi->SPI_TDR = data | SPI_PCS(npcs); - while ((spi->SPI_SR & SPI_SR_TDRE) == 0); -} - -/** - * \brief Sends the contents of buffer through a SPI peripheral, using the PDC to - * take care of the transfer. - * - * \param spi Pointer to an Spi instance. - * \param buffer Data buffer to send. - * \param length Length of the data buffer. - */ -uint8_t SPI_WriteBuffer(Spi *spi, - void *buffer, - uint32_t length) -{ - /* Check if first bank is free */ - if (spi->SPI_TCR == 0) { - - spi->SPI_TPR = (uint32_t) buffer; - spi->SPI_TCR = length; - spi->SPI_PTCR = PERIPH_PTCR_TXTEN; - return 1; - } - /* Check if second bank is free */ - else if (spi->SPI_TNCR == 0) { - - spi->SPI_TNPR = (uint32_t) buffer; - spi->SPI_TNCR = length; - return 1; - } - - /* No free banks */ - return 0; -} - -/** - * \brief Check if SPI transfer finish. - * - * \param spi Pointer to an Spi instance. - * - * \return Returns 1 if there is no pending write operation on the SPI; otherwise - * returns 0. - */ -uint8_t SPI_IsFinished(Spi *spi) -{ - return ((spi->SPI_SR & SPI_SR_TXEMPTY) != 0); -} - -/** - * \brief Reads and returns the last word of data received by a SPI peripheral. This - * method must be called after a successful SPI_Write call. - * - * \param spi Pointer to an Spi instance. - * - * \return readed data. - */ -uint16_t SPI_Read(Spi *spi) -{ - while ((spi->SPI_SR & SPI_SR_RDRF) == 0); - return spi->SPI_RDR & 0xFFFF; -} - -/** - * \brief Reads data from a SPI peripheral until the provided buffer is filled. This - * method does NOT need to be called after SPI_Write or SPI_WriteBuffer. - * - * \param spi Pointer to an Spi instance. - * \param buffer Data buffer to store incoming bytes. - * \param length Length in bytes of the data buffer. - */ -uint8_t SPI_ReadBuffer(Spi *spi, - void *buffer, - uint32_t length) -{ - /* Check if the first bank is free */ - if (spi->SPI_RCR == 0) { - - spi->SPI_RPR = (uint32_t) buffer; - spi->SPI_RCR = length; - spi->SPI_PTCR = PERIPH_PTCR_RXTEN; - return 1; - } - /* Check if second bank is free */ - else if (spi->SPI_RNCR == 0) { - - spi->SPI_RNPR = (uint32_t) buffer; - spi->SPI_RNCR = length; - return 1; - } - - /* No free bank */ - return 0; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi/spi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi/spi.h deleted file mode 100644 index f78a34ba..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/spi/spi.h +++ /dev/null @@ -1,104 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Serial Peripheral Interface (SPI) controller. - * - */ - -#ifndef SPI_H -#define SPI_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ - -/** - * \page spi_configuration_macros SPI configuration macros - * - * This page lists several macros which should be used when configuring a SPI - * peripheral. - * - * \par Macros: - * - \ref SPI_PCS - * - \ref SPI_SCBR - * - \ref SPI_DLYBS - * - \ref SPI_DLYBCT - */ - -/** Calculate the PCS field value given the chip select NPCS value */ -#define SPI_PCS(npcs) ((~(1 << npcs) & 0xF) << 16) - -/** Calculates the value of the CSR SCBR field given the baudrate and MCK. */ -#define SPI_SCBR(baudrate, masterClock) \ - ((uint32_t) (masterClock / baudrate) << 8) - -/** Calculates the value of the CSR DLYBS field given the desired delay (in ns) */ -#define SPI_DLYBS(delay, masterClock) \ - ((uint32_t) (((masterClock / 1000000) * delay) / 1000) << 16) - -/** Calculates the value of the CSR DLYBCT field given the desired delay (in ns) */ -#define SPI_DLYBCT(delay, masterClock) \ - ((uint32_t) (((masterClock / 1000000) * delay) / 32000) << 24) -/*------------------------------------------------------------------------------ */ - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void SPI_Enable(Spi *spi); -extern void SPI_Disable(Spi *spi); -extern void SPI_Configure(Spi *spi, - uint32_t id, - uint32_t configuration); -extern void SPI_ConfigureNPCS(Spi *spi, - uint32_t npcs, - uint32_t configuration); -extern void SPI_Write(Spi *spi, uint32_t npcs, uint16_t data); -extern uint8_t SPI_WriteBuffer(Spi *spi, - void *buffer, - uint32_t length); - -extern uint8_t SPI_IsFinished(Spi *pSpi); - -extern uint16_t SPI_Read(Spi *spi); -extern uint8_t SPI_ReadBuffer(Spi *spi, - void *buffer, - uint32_t length); - -#endif /* #ifndef SPI_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/ssc/ssc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/ssc/ssc.c deleted file mode 100644 index 3fb0cc04..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/ssc/ssc.c +++ /dev/null @@ -1,248 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup ssc module Working with SSC - * The SSC driver provides the interface to configure and use the SSC - * peripheral. - * - * !Usage - * - * -# Enable the SSC interface pins. - * -# Configure the SSC to operate at a specific frequency by calling - * SSC_Configure(). This function enables the peripheral clock of the SSC, - * but not its PIOs. - * -# Configure the transmitter and/or the receiver using the - * SSC_ConfigureTransmitter() and SSC_ConfigureEmitter() functions. - * -# Enable the PIOs or the transmitter and/or the received. - * -# Enable the transmitter and/or the receiver using SSC_EnableTransmitter() - * and SSC_EnableReceiver() - * -# Send data through the transmitter using SSC_Write() and SSC_WriteBuffer() - * -# Receive data from the receiver using SSC_Read() and SSC_ReadBuffer() - * -# Disable the transmitter and/or the receiver using SSC_DisableTransmitter() - * and SSC_DisableReceiver() - * - * For more accurate information, please look at the RTC section of the - * Datasheet. - * - * Related files :\n - * \ref ssc.c\n - * \ref ssc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of Synchronous Serial (SSC) controller. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "ssc.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Configures a SSC peripheral.If the divided clock is not used, the master - * clock frequency can be set to 0. - * \note The emitter and transmitter are disabled by this function. - * \param bitRate bit rate. - * \param masterClock master clock. - */ -void SSC_Configure(uint32_t bitRate, uint32_t masterClock) -{ - /* Enable SSC peripheral clock */ - PMC->PMC_PCER0 = 1 << ID_SSC; - - /* Reset, disable receiver & transmitter */ - SSC->SSC_CR = SSC_CR_RXDIS | SSC_CR_TXDIS | SSC_CR_SWRST; - - SSC->SSC_PTCR = SSC_PTCR_RXTDIS | SSC_PTCR_TXTDIS; - /* Configure clock frequency */ - if (bitRate != 0) { - - SSC->SSC_CMR = masterClock / (2 * bitRate); - } - else { - - SSC->SSC_CMR = 0; - } -} - -/** - * \brief Configures the transmitter of a SSC peripheral. - * \param tcmr Transmit Clock Mode Register value. - * \param tfmr Transmit Frame Mode Register value. - */ -void SSC_ConfigureTransmitter(uint32_t tcmr, uint32_t tfmr) -{ - SSC->SSC_TCMR = tcmr; - SSC->SSC_TFMR = tfmr; -} - -/** - * \brief Configures the receiver of a SSC peripheral. - * \param rcmr Receive Clock Mode Register value. - * \param rfmr Receive Frame Mode Register value. - */ -void SSC_ConfigureReceiver(uint32_t rcmr, uint32_t rfmr) -{ - SSC->SSC_RCMR = rcmr; - SSC->SSC_RFMR = rfmr; -} - -/** - * \brief Enables the transmitter of a SSC peripheral. - */ -void SSC_EnableTransmitter(void) -{ - SSC->SSC_CR = SSC_CR_TXEN; -} - -/** - * \brief Disables the transmitter of a SSC peripheral. - */ -void SSC_DisableTransmitter(void) -{ - SSC->SSC_CR = SSC_CR_TXDIS; -} - -/** - * \brief Enables the receiver of a SSC peripheral. - */ -void SSC_EnableReceiver(void) -{ - SSC->SSC_CR = SSC_CR_RXEN; -} - -/** - * \brief Disables the receiver of a SSC peripheral. - */ -void SSC_DisableReceiver(void) -{ - SSC->SSC_CR = SSC_CR_RXDIS; -} - -/** - * \brief Enables one or more interrupt sources of a SSC peripheral. - * \param Bitwise OR of selected interrupt sources. - */ -void SSC_EnableInterrupts(uint32_t sources) -{ - SSC->SSC_IER = sources; -} - -/** - * \brief Disables one or more interrupt sources of a SSC peripheral. - * \param Bitwise OR of selected interrupt sources. - */ -void SSC_DisableInterrupts(uint32_t sources) -{ - SSC->SSC_IDR = sources; -} - -/** - * \brief Sends one data frame through a SSC peripheral. If another frame is currently - * being sent, this function waits for the previous transfer to complete. - * \param frame Data frame to send. - */ -void SSC_Write(uint32_t frame) -{ - while ((SSC->SSC_SR & SSC_SR_TXRDY) == 0); - SSC->SSC_THR = frame; -} - -/** - * \brief Waits until one frame is received on a SSC peripheral, and returns it. - */ -uint32_t SSC_Read(void) -{ - while ((SSC->SSC_SR & SSC_SR_RXRDY) == 0); - return SSC->SSC_RHR; -} - -/** - * \brief Sends the contents of a data buffer a SSC peripheral, using the PDC. - * \param buffer Data buffer to send. - * \param length Size of the data buffer. - * \return 1 if the buffer has been queued for transmission; otherwise returns 0. - */ -uint8_t SSC_WriteBuffer(void *buffer, uint32_t length) -{ - /* Check if first bank is free*/ - if (SSC->SSC_TCR == 0) { - - SSC->SSC_TPR = (uint32_t) buffer; - SSC->SSC_TCR = length; - SSC->SSC_PTCR = SSC_PTCR_TXTEN; - return 1; - } - /* Check if second bank is free*/ - else if (SSC->SSC_TNCR == 0) { - - SSC->SSC_TNPR = (uint32_t) buffer; - SSC->SSC_TNCR = length; - return 1; - } - return 0; -} - -/** - * \brief Reads data coming from a SSC peripheral receiver and stores it into the - * giving buffer with PDC. - * \param buffer ata buffer used for reception. - * \param length Size of the data buffer. - * \return 1 if the buffer has been queued for reception; otherwise returns 0. - */ -uint8_t SSC_ReadBuffer(void *buffer, uint32_t length) -{ - /* Check if the first bank is free*/ - if (SSC->SSC_RCR == 0) { - - SSC->SSC_RPR = (uint32_t) buffer; - SSC->SSC_RCR = length; - SSC->SSC_PTCR = SSC_PTCR_RXTEN; - return 1; - } - /* Check if second bank is free*/ - else if (SSC->SSC_RNCR == 0) { - SSC->SSC_RNPR = (uint32_t) buffer; - SSC->SSC_RNCR = length; - return 1; - } - return 0; -} \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/ssc/ssc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/ssc/ssc.h deleted file mode 100644 index 1dd5185c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/ssc/ssc.h +++ /dev/null @@ -1,58 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Synchronous Serial (SSC) controller. - * - */ - -#ifndef SSC_H -#define SSC_H - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -extern void SSC_Configure(uint32_t bitRate, uint32_t masterClock); -extern void SSC_ConfigureTransmitter(uint32_t tcmr, uint32_t tfmr); -extern void SSC_ConfigureReceiver(uint32_t rcmr, uint32_t rfmr); -extern void SSC_EnableTransmitter(void); -extern void SSC_DisableTransmitter(void); -extern void SSC_EnableReceiver(void); -extern void SSC_DisableReceiver(void); -extern void SSC_EnableInterrupts(uint32_t sources); -extern void SSC_DisableInterrupts(uint32_t sources); -extern void SSC_Write(uint32_t frame); -extern uint32_t SSC_Read(void); -extern uint8_t SSC_WriteBuffer(void *buffer, uint32_t length); -extern uint8_t SSC_ReadBuffer(void *buffer, uint32_t length); - -#endif //#ifndef SSC_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tc/tc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tc/tc.c deleted file mode 100644 index 70ed8fa3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tc/tc.c +++ /dev/null @@ -1,148 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "tc.h" - -/*------------------------------------------------------------------------------ - * Global functions - *------------------------------------------------------------------------------*/ - -/**------------------------------------------------------------------------------ - * \brief Configures a Timer Counter Channel - * Configures a Timer Counter to operate in the given mode. Timer is stopped - * after configuration and must be restarted with TC_Start(). All the - * interrupts of the timer are also disabled. - * \param pTc Pointer to an AT91S_TC instance. - * \param channel Channel number. - * \param mode Operating mode (TC_CMR value). - *------------------------------------------------------------------------------*/ -void TC_Configure(Tc *pTc, unsigned char channel, unsigned int mode) -{ - TcChannel *pTcCh = &pTc->TC_CHANNEL[channel]; - - /* Disable TC clock */ - pTcCh->TC_CCR = TC_CCR0_CLKDIS; - - /* Disable interrupts */ - pTcCh->TC_IDR = 0xFFFFFFFF; - - /* Clear status register */ - pTcCh->TC_SR; - - /* Set mode */ - pTcCh->TC_CMR = mode; -} - -/**------------------------------------------------------------------------------ - * \brief Reset and Start the TC Channel - * Enables the timer clock and performs a software reset to start the counting. - * \param pTc Pointer to an AT91S_TC instance. - * \param channel Channel number. - *------------------------------------------------------------------------------*/ -void TC_Start(Tc *pTc, unsigned char channel) -{ - TcChannel *pTcCh = &pTc->TC_CHANNEL[channel]; - pTcCh->TC_CCR = TC_CCR0_CLKEN | TC_CCR0_SWTRG; -} - -/**------------------------------------------------------------------------------ - * \brief Stop TC Channel - * Disables the timer clock, stopping the counting. - * \param pTc Pointer to an AT91S_TC instance. - * \param channel Channel number. - *------------------------------------------------------------------------------*/ -void TC_Stop(Tc *pTc, unsigned char channel) -{ - TcChannel *pTcCh = &pTc->TC_CHANNEL[channel]; - pTcCh->TC_CCR = TC_CCR0_CLKDIS; -} - -/**------------------------------------------------------------------------------ - * \brief Find best MCK divisor - * Finds the best MCK divisor given the timer frequency and MCK. The result - * is guaranteed to satisfy the following equation: - * \pre - * (MCK / (DIV * 65536)) <= freq <= (MCK / DIV) - * \endpre - * with DIV being the highest possible value. - * \param freq Desired timer frequency. - * \param mck Master clock frequency. - * \param div Divisor value. - * \param tcclks TCCLKS field value for divisor. - * \return 1 if a proper divisor has been found; otherwise 0. - *------------------------------------------------------------------------------*/ -unsigned char TC_FindMckDivisor( - unsigned int freq, - unsigned int mck, - unsigned int *div, - unsigned int *tcclks) -{ - const unsigned int divisors[5] = {2, 8, 32, 128,BOARD_MCK / 32768}; - - unsigned int index = 0; - - /* Satisfy lower bound */ - while (freq < ((mck / divisors[index]) / 65536)) { - - index++; - - /* If no divisor can be found, return 0 */ - if (index == 5) { - - return 0; - } - } - - /* Try to maximize DIV while satisfying upper bound */ - while (index < 4) { - - if (freq > (mck / divisors[index + 1])) { - - break; - } - index++; - } - - /* Store results */ - if (div) { - - *div = divisors[index]; - } - if (tcclks) { - - *tcclks = index; - } - - return 1; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tc/tc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tc/tc.h deleted file mode 100644 index 43cb83df..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tc/tc.h +++ /dev/null @@ -1,70 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**------------------------------------------------------------------------------ - * \unit - * - * Purpose - * - * API for configuring and using Timer Counter (TC) peripherals. - * - * Usage - * -# Optionally, use TC_FindMckDivisor() to let the program find the best - * TCCLKS field value automatically. - * -# Configure a Timer Counter in the desired mode using TC_Configure(). - * -# Start or stop the timer clock using TC_Start() and TC_Stop(). - *------------------------------------------------------------------------------*/ - -#ifndef TC_H -#define TC_H - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -/*------------------------------------------------------------------------------ - * Global functions - *------------------------------------------------------------------------------*/ - -extern void TC_Configure(Tc *pTc, unsigned char ch, unsigned int mode); - -extern void TC_Start(Tc *pTc, unsigned char ch); - -extern void TC_Stop(Tc *pTc, unsigned char ch); - -extern unsigned char TC_FindMckDivisor( - unsigned int freq, - unsigned int mck, - unsigned int *div, - unsigned int *tcclks); - -#endif /* #ifndef TC_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd.h deleted file mode 100644 index 38f0d8df..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd.h +++ /dev/null @@ -1,69 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for touchscreen driver which includes touchscreen calibration, - * retrieving measurements etc. - * - * \par Usage - * - * -# Call TSD_Initialize() whenever the touchscreen should start the - * calibration process (as it is done in the function). - * -# Declare a global TSD_PenPressed function anywhere in your code. This - * function will get called every time the pen is pressed on the screen. - * -# Declare a global TSD_PenMoved function, which will get called whenever - * the pen stays in contact with the screen but changes position. - * -# Declare a global TSD_PenReleased function, which will be invoked as the - * pen is lifted from the screen. - */ - -#ifndef TSD_H -#define TSD_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "tsd_com.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void TSD_Initialize(int8_t calEn); - -extern uint8_t TSD_Calibrate(void); - -extern void TSD_Reset(void); - -extern void TSD_TimerHandler(void); - -#endif /* #ifndef TSD_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd_ads7843.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd_ads7843.c deleted file mode 100644 index ee0fc869..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd_ads7843.c +++ /dev/null @@ -1,302 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of ADS7843 driver. - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include -#include - -#ifdef BOARD_TSC_ADS7843 - -#include "tsd.h" -#include "tsd_com.h" -#include -#include -#include -#include -#include -#include -#include "tsd/tsd_ads7843.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** Delay for pushbutton debouncing (the time-base is 10 ms). */ -#define DEBOUNCE_TIME 6 /* 10 * 6 = 60 ms */ - -/** Color of calibration points. */ -#define POINTS_COLOR 0x0000FF - -/** Size in pixels of calibration points. */ -#define POINTS_SIZE 4 - -/** Maximum difference in pixels between the test point and the measured point. */ -#define POINTS_MAX_ERROR 5 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** pen state */ -typedef enum { - STATE_PEN_RELEASED = 0, - STATE_PEN_PRESSED = 1, - STATE_PEN_DEBOUNCE = 2 -} e_pen_state; - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** Pins used by Interrupt Signal for Touch Screen Controller */ -static const Pin pinPenIRQ = PIN_TCS_IRQ; - -/** Global timestamp in milliseconds since start of application. */ -static volatile uint32_t timestamp = 0; - -/** last time when the pen is pressed on the touchscreen */ -static volatile uint32_t timePress = 0; - -/** last time when the pen is released */ -static volatile uint32_t timeRelease = 0; - -/** pen state */ -static volatile e_pen_state penState = STATE_PEN_RELEASED; - -/** Touch screen initiallized flag */ -static uint32_t tsInitFlag = 0; - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Timer handler for touch screen. Increments the timestamp counter. - * Determine the state "Pen Pressed" or "Pen Released". To change state, - * the penIRQ has to keep the same value during DEBOUNCE_TIME. - * - * \note External timer interrupt should call it per 10ms. - */ -extern void TSD_TimerHandler( void ) -{ - uint32_t data[2]; - static uint32_t point[2]; - - if (!tsInitFlag) return; - - timestamp++; - /* Get the current position of the pen if penIRQ has low value (pen pressed) */ - if (PIO_Get(&pinPenIRQ) == 0) { - /* Get the current position of the pressed pen */ - if(TSDCom_IsCalibrationOk()) { - TSD_GetRawMeasurement(data); - TSDCom_InterpolateMeasurement(data, point); - } - - /* call the callback function */ - if(penState == STATE_PEN_PRESSED) { - if(TSDCom_IsCalibrationOk()) { - TSD_PenMoved(point[0], point[1]); - } - } - } - - /* Determine the pen state */ - if (PIO_Get(&pinPenIRQ) == 0) { - - /* reinit the last time when release */ - timeRelease = timestamp; - if(penState == STATE_PEN_DEBOUNCE) { - if( (timestamp - timePress) > DEBOUNCE_TIME) { - /* pen is pressed during an enough time : the state change */ - penState = STATE_PEN_PRESSED; - /* call the callback function */ - if(TSDCom_IsCalibrationOk()) { - TSD_PenPressed(point[0], point[1]); - } - } - } - } - else { - /* reinit the last time when release */ - timePress = timestamp; - - if(penState == STATE_PEN_DEBOUNCE) { - if( (timestamp - timeRelease) > DEBOUNCE_TIME) { - /* pen is released during an enough time : the state change */ - penState = STATE_PEN_RELEASED; - /* call the callback function */ - if(TSDCom_IsCalibrationOk()) { - TSD_PenReleased(point[0], point[1]); - } - } - } - } -} - -/** - * \breif Interrupt handler for Touchscreen. - */ -static void ISR_PenIRQ(void) -{ - /* Check if the pen has been pressed */ - if (!PIO_Get(&pinPenIRQ)) { - if(penState == STATE_PEN_RELEASED) { - - timePress = timestamp; - penState = STATE_PEN_DEBOUNCE; - } - } - else { - if(penState == STATE_PEN_PRESSED) { - - timeRelease = timestamp; - penState = STATE_PEN_DEBOUNCE; - } - } -} - -/** - * \brief Configure PENIRQ for interrupt. - */ -static void ConfigurePenIRQ(void) -{ - /* Configure pios */ - PIO_Configure(&pinPenIRQ, PIO_LISTSIZE(pinPenIRQ)); - - /* Initialize interrupts */ - PIO_InitializeInterrupts(0); - PIO_ConfigureIt(&pinPenIRQ, (void (*)(const Pin *)) ISR_PenIRQ); - - /* Enable the interrupt */ - PIO_EnableIt(&pinPenIRQ); -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Reads and store a touchscreen measurement in the provided array. - * - * \param pData Array where the measurements will be stored - */ -extern void TSD_GetRawMeasurement(uint32_t *pData) -{ - /* Get the current position of the pressed pen */ - PIO_DisableIt(&pinPenIRQ); - ADS7843_GetPosition(&pData[0], &pData[1]); - PIO_EnableIt(&pinPenIRQ); -} - -/** - * \brief Wait pen pressed. - */ -extern void TSD_WaitPenPressed( void ) -{ - /* Wait for touch & end of conversion */ - while (penState != STATE_PEN_RELEASED); - /*while (penState != STATE_PEN_PRESSED); */ - while (penState != STATE_PEN_PRESSED) { - } -} - -/** - * \brief Wait pen released. - */ -extern void TSD_WaitPenReleased( void ) -{ - /* Wait for contact loss */ - while (penState != STATE_PEN_PRESSED); - while (penState != STATE_PEN_RELEASED); -} - -/** - * \brief Do calibration. - * - * \return 1 if calibration is Ok, 0 else. - */ -uint8_t TSD_Calibrate(void) -{ - uint8_t ret = 0; - - /* Calibration is done only once */ - if(TSDCom_IsCalibrationOk()) { - return 1; - } - - /* Do calibration */ - ret = TSDCom_Calibrate(); - - return ret; -} - -/** - * \brief Initializes the touchscreen driver and starts the calibration process. When - * finished, the touchscreen is operational. - * - * \note Important: the LCD driver must have been initialized prior to calling this - * function. - */ -extern void TSD_Initialize( int8_t calEn ) -{ - ADS7843_Initialize(); - ConfigurePenIRQ(); - - tsInitFlag = 1; - - /* Calibration */ - if(calEn) { - while (!TSD_Calibrate()); - } -} - -/** - * \brief Stop the Touchscreen, disable interrupt. - */ -void TSD_Reset(void) -{ - /* Disable SPI 0 */ - ADS7843_Reset(); - - /* Disable the interrupt */ - PIO_DisableIt(&pinPenIRQ); -} - -#endif /* #ifdef BOARD_TSC_ADS7843 */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd_ads7843.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd_ads7843.h deleted file mode 100644 index 3f4bf2ef..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd_ads7843.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef _TSD_ADS7843_ -#define _TSD_ADS7843_ - -/*---------------------------------------------------------------------------- - * External functions - *----------------------------------------------------------------------------*/ -extern void TSD_PenPressed( uint32_t dwX, uint32_t dwY ) ; -extern void TSD_PenMoved( uint32_t dwX, uint32_t dwY ) ; -extern void TSD_PenReleased( uint32_t dwX, uint32_t dwY ) ; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -extern void TSD_WaitPenPressed( void ) ; -extern void TSD_WaitPenReleased( void ) ; -extern void TSD_GetRawMeasurement( uint32_t *pData ) ; -extern void TSD_Initialize( int8_t calEn ) ; - - -#endif // _TSD_ADS7843_ \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd_com.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd_com.c deleted file mode 100644 index 2e0360fe..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd_com.c +++ /dev/null @@ -1,380 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of touchscreen driver device irrelevance code. - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include - -#include "tsd.h" -#include -#include -#include -#include -#include -#include -#include -#include "tsd/tsd_ads7843.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** Size in pixels of calibration points. */ -#define POINTS_SIZE 4 -/** Maximum difference in pixels between the test point and the measured point. */ -#define POINTS_MAX_ERROR 8 - -/** Delay at the end of calibartion for result display */ -#define DELAY_RESULT_DISPLAY 4000000 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** Point used during the touchscreen calibration process. */ -typedef struct _CalibrationPoint { - - /** Coordinate of point along the X-axis of the screen. */ - uint32_t x; - /** Coordinate of point along the Y-axis of the screen. */ - uint32_t y; - /** Calibration data of point. */ - uint32_t data[2]; - -} CalibrationPoint; - -/*---------------------------------------------------------------------------- - * Variables - *----------------------------------------------------------------------------*/ - -/** indicates if the touch screen has been calibrated. */ -/** If not, Callback functions are not called. */ -static volatile uint8_t bCalibrationOk = 1 ; //0; -/** Slope for interpoling touchscreen measurements along the X-axis. */ -static int32_t xSlope; -/** Slope for interpoling touchscreen measurements along the Y-axis. */ -static int32_t ySlope; - -/** Calibration points. */ -static CalibrationPoint calibrationPoints[] = { - - /* Top-left corner calibration point */ - { - BOARD_LCD_WIDTH / 10, - BOARD_LCD_HEIGHT / 10, - {0, 0} - }, - /* Top-right corner calibration point */ - { - BOARD_LCD_WIDTH - BOARD_LCD_WIDTH / 10, - BOARD_LCD_HEIGHT / 10, - {0, 0} - }, - /* Bottom-right corner calibration point */ - { - BOARD_LCD_WIDTH - BOARD_LCD_WIDTH / 10, - BOARD_LCD_HEIGHT - BOARD_LCD_HEIGHT / 10, - {0, 0} - }, - /* Bottom-left corner calibration point */ - { - BOARD_LCD_WIDTH / 10, - BOARD_LCD_HEIGHT - BOARD_LCD_HEIGHT / 10, - {0, 0} - } -}; - -/** Test point */ -static const CalibrationPoint testPoint = { - BOARD_LCD_WIDTH / 2, - BOARD_LCD_HEIGHT / 2, - {0, 0} -}; - -/*---------------------------------------------------------------------------- - * External functions - *----------------------------------------------------------------------------*/ - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/* - * \brief Display a calibration point on the given buffer. - * - * \param pPoint Calibration point to display. - */ -static void DrawCalibrationPoint(const CalibrationPoint *pPoint) -{ - LCDD_DrawRectangleWithFill(pPoint->x - POINTS_SIZE / 2, - pPoint->y - POINTS_SIZE / 2, - POINTS_SIZE, - POINTS_SIZE, - COLOR_RED); -} - -/** - * \brief Clears a calibration point from the given buffer. - * - * \param pPoint Calibration point to clear. - */ -static void ClearCalibrationPoint(const CalibrationPoint *pPoint) -{ - LCDD_DrawRectangleWithFill(pPoint->x - POINTS_SIZE / 2, - pPoint->y - POINTS_SIZE / 2, - POINTS_SIZE, - POINTS_SIZE, - COLOR_WHITE); -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \breif Indicates if the calibration of the touch screen is Ok. - * - * \return 1 calibration Ok, 0 if not. - */ -uint8_t TSDCom_IsCalibrationOk(void) -{ - if (bCalibrationOk == 1) { - return 1; - } else { - return 0; - } -} - -/** - * \brief Interpolates the provided raw measurements using the previously calculated - * slope. The resulting x and y coordinates are stored in an array. - * - * \param pData Raw measurement data, as returned by TSD_GetRawMeasurement(). - * \param pPoint Array in which x and y will be stored. - */ -void TSDCom_InterpolateMeasurement(const uint32_t *pData, uint32_t *pPoint) -{ - pPoint[0] = calibrationPoints[0].x - - (((int32_t) calibrationPoints[0].data[0] - (int32_t) pData[0]) * 1024) - / xSlope; - - pPoint[1] = calibrationPoints[0].y - - (((int32_t) calibrationPoints[0].data[1] - (int32_t) pData[1]) * 1024) - / ySlope; - - if(pPoint[0] & 0x80000000) /* Is pPoint[0] negative ? */ - { - pPoint[0] = 0; - } - - if(pPoint[0] > BOARD_LCD_WIDTH) /* Is pPoint[0] bigger than the LCD width ? */ - { - pPoint[0] = BOARD_LCD_WIDTH; - } - - if(pPoint[1] & 0x80000000) /* Is pPoint[1] negative ? */ - { - pPoint[1] = 0; - } - - if(pPoint[1] > BOARD_LCD_HEIGHT) /* Is pPoint[1] bigger than the LCD width ? */ - { - pPoint[1] = BOARD_LCD_HEIGHT; - } -} - -/** - * \brief Performs the calibration process using the provided buffer to display - * information. - * - * \return True if calibration was successful; otherwise false. - */ -uint8_t TSDCom_Calibrate(void) -{ - volatile uint32_t i; /* to keep the tempo with gcc code optimisation */ - int32_t slope1, slope2; - CalibrationPoint measuredPoint; - uint8_t xOk, yOk; - int32_t xDiff, yDiff; - - /* Calibration setup */ - LCDD_Fill(COLOR_WHITE); - LCDD_DrawString(30, 50, (uint8_t *)"LCD calibration", COLOR_BLACK); - LCDD_DrawString(1, 140, (uint8_t *)"Touch the dots to\ncalibrate the screen", COLOR_DARKBLUE); - - /* Calibration points */ - for (i=0; i < 4; i++) { - - DrawCalibrationPoint(&calibrationPoints[i]); - - /* Wait for touch & end of conversion */ - TSD_WaitPenPressed(); - TSD_GetRawMeasurement(calibrationPoints[i].data); - ClearCalibrationPoint(&calibrationPoints[i]); - - /* Wait for contact loss */ - TSD_WaitPenReleased(); - } - - /** - * Calculate slopes using the calibration data - * Theory behind those calculations: - * - We suppose the touchscreen measurements are linear, so the following equations are true (simple - * linear regression) for any two 'a' and 'b' points of the screen: - * dx = (a.data[0] - b.data[0]) / (a.x - b.x) - * dy = (a.data[1] - b.data[1]) / (a.y - b.y) - * - * - We calculate dx and dy (called xslope and yslope here) using the calibration points. - * - * - We can then use dx and dy to infer the position of a point 'p' given the measurements performed - * by the touchscreen ('c' is any of the calibration points): - * dx = (p.data[0] - c.data[0]) / (p.x - c.x) - * dy = (p.data[1] - c.data[1]) / (p.y - c.y) - * Thus: - * p.x = c.x - (p.data[0] - c.data[0]) / dx - * p.y = c.y - (p.data[1] - c.data[1]) / dy - * - * - Since there are four calibration points, dx and dy can be calculated twice, so we average - * the two values. - */ - slope1 = ((int32_t) calibrationPoints[0].data[0]) - ((int32_t) calibrationPoints[1].data[0]); - slope1 *= 1024; - slope1 /= ((int32_t) calibrationPoints[0].x) - ((int32_t) calibrationPoints[1].x); - slope2 = ((int32_t) calibrationPoints[2].data[0]) - ((int32_t) calibrationPoints[3].data[0]); - slope2 *= 1024; - slope2 /= ((int32_t) calibrationPoints[2].x) - ((int32_t) calibrationPoints[3].x); - xSlope = (slope1 + slope2) / 2; - - slope1 = ((int32_t) calibrationPoints[0].data[1]) - ((int32_t) calibrationPoints[2].data[1]); - slope1 *= 1024; - slope1 /= ((int32_t) calibrationPoints[0].y) - ((int32_t) calibrationPoints[2].y); - slope2 = ((int32_t) calibrationPoints[1].data[1]) - ((int32_t) calibrationPoints[3].data[1]); - slope2 *= 1024; - slope2 /= ((int32_t) calibrationPoints[1].y) - ((int32_t) calibrationPoints[3].y); - ySlope = (slope1 + slope2) / 2; - - /* Test point */ - LCDD_Fill(0xFFFFFF); - LCDD_DrawString(30, 50, (uint8_t *)"LCD calibration", COLOR_BLACK); - LCDD_DrawString(1, 100, (uint8_t *)" Touch the point to\nvalidate calibration", COLOR_DARKBLUE); - DrawCalibrationPoint(&testPoint); - - /* Wait for touch & end of conversion */ - TSD_WaitPenPressed(); - - TSD_GetRawMeasurement(measuredPoint.data); - TSDCom_InterpolateMeasurement(measuredPoint.data, (uint32_t *) &measuredPoint); - DrawCalibrationPoint(&measuredPoint); - - /* Check resulting x and y */ - xDiff = (int32_t) measuredPoint.x - (int32_t) testPoint.x; - yDiff = (int32_t) measuredPoint.y - (int32_t) testPoint.y; - xOk = (xDiff >= -POINTS_MAX_ERROR) && (xDiff <= POINTS_MAX_ERROR); - yOk = (yDiff >= -POINTS_MAX_ERROR) && (yDiff <= POINTS_MAX_ERROR); - - /* Wait for contact loss */ - TSD_WaitPenReleased(); - - /* Check calibration result */ - if (xOk && yOk) { - - bCalibrationOk = 1; - LCDD_Fill(COLOR_WHITE); - LCDD_DrawString(30, 50, (uint8_t *)"LCD calibration", COLOR_BLACK); - LCDD_DrawString(80, 140, (uint8_t *)"Success !", COLOR_GREEN); - - } - else { - - bCalibrationOk = 0; - LCDD_Fill(COLOR_WHITE); - LCDD_DrawString(30, 50, (uint8_t *)"LCD calibration", COLOR_BLACK); - LCDD_DrawString(40, 140, (uint8_t *)"Error too big", COLOR_RED); - } - - /* Slight delay */ - for (i = 0; i < DELAY_RESULT_DISPLAY; i++); - - return (xOk && yOk); -} - -/** - * \brief Read calibrate data to buffer. - * - * \param pBuffer Data buffer. - * \param size Size of data buffer in bytes. - */ -void TSDCom_ReadCalibrateData(void *pBuffer, uint32_t size) -{ - uint8_t *pDest = (uint8_t *)pBuffer; - - SANITY_CHECK((sizeof(bCalibrationOk) + sizeof(xSlope) + - sizeof(ySlope) + sizeof(calibrationPoints[0].data)) < size); - - memcpy(pDest, (void const *)&bCalibrationOk, sizeof(bCalibrationOk)); - pDest += sizeof(bCalibrationOk); - memcpy(pDest, &xSlope, sizeof(xSlope)); - pDest += sizeof(xSlope); - memcpy(pDest, &ySlope, sizeof(ySlope)); - pDest += sizeof(ySlope); - memcpy(pDest, &calibrationPoints[0].data, sizeof(calibrationPoints[0].data)); - pDest += sizeof(calibrationPoints[0].data); -} - -/** - * \brief Restore calibrate data with buffer data. - * - * \param pBuffer Data buffer. - * \param size Size of data buffer in bytes. - */ -void TSDCom_RestoreCalibrateData(void *pBuffer, uint32_t size) -{ - uint8_t *pSrc = (uint8_t *)pBuffer; - - SANITY_CHECK((sizeof(bCalibrationOk) + sizeof(xSlope) + - sizeof(ySlope) + sizeof(calibrationPoints[0].data)) < size); - - memcpy((void *)&bCalibrationOk, pSrc, sizeof(bCalibrationOk)); - pSrc += sizeof(bCalibrationOk); - memcpy(&xSlope, pSrc, sizeof(xSlope)); - pSrc += sizeof(xSlope); - memcpy(&ySlope, pSrc, sizeof(ySlope)); - pSrc += sizeof(ySlope); - memcpy(&calibrationPoints[0].data, pSrc, sizeof(calibrationPoints[0].data)); - pSrc += sizeof(calibrationPoints[0].data); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd_com.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd_com.h deleted file mode 100644 index ca6f285d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/tsd/tsd_com.h +++ /dev/null @@ -1,54 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for touchscreen driver device irrelevance code. - */ - -#ifndef TSD_COM_H -#define TSD_COM_H - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void TSDCom_InterpolateMeasurement( - const uint32_t *pData, - uint32_t *pPoint); - -uint8_t TSDCom_Calibrate(void); - -uint8_t TSDCom_IsCalibrationOk(void); - -void TSDCom_ReadCalibrateData(void *pBuffer, uint32_t size); -void TSDCom_RestoreCalibrateData(void *pBuffer, uint32_t size); - -#endif /* #ifndef TSD_COM_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/twi/twi.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/twi/twi.c deleted file mode 100644 index 5de7b2ee..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/twi/twi.c +++ /dev/null @@ -1,377 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup twi_module Working with TWI - * The TWI driver provides the interface to configure and use the TWI - * peripheral. - * - * \usage - *
    - *
  • Configures a TWI peripheral to operate in master mode, at the given - * frequency (in Hz) using TWI_Configure().
    • - *
  • Sends a STOP condition on the TWI using TWI_Stop().
    • - *
  • Starts a read operation on the TWI bus with the specified slave using - * TWI_StartRead(). Data must then be read using TWI_ReadByte() whenever - * a byte is available (poll using TWI_ByteReceived()).
    • - *
  • Starts a write operation on the TWI to access the selected slave using - * TWI_StartWrite(). A byte of data must be provided to start the write; - * other bytes are written next.
    • - *
  • Sends a byte of data to one of the TWI slaves on the bus using TWI_WriteByte(). - * This function must be called once before TWI_StartWrite() with the first byte of data - * to send, then it shall be called repeatedly after that to send the remaining bytes.
    • - *
  • Check if a byte has been received and can be read on the given TWI - * peripheral using TWI_ByteReceived().< - * Check if a byte has been sent using TWI_ByteSent().
    • - *
  • Check if the current transmission is complete (the STOP has been sent) - * using TWI_TransferComplete().
    • - *
  • Enables & disable the selected interrupts sources on a TWI peripheral - * using TWI_EnableIt() and TWI_DisableIt().
    • - *
  • Get current status register of the given TWI peripheral using - * TWI_GetStatus(). Get current status register of the given TWI peripheral, but - * masking interrupt sources which are not currently enabled using - * TWI_GetMaskedStatus().
    • - *
- * For more accurate information, please look at the TWI section of the - * Datasheet. - * - * Related files :\n - * \ref twi.c\n - * \ref twi.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of Two Wire Interface (TWI). - * - */ - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "twi.h" -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Configures a TWI peripheral to operate in master mode, at the given - * frequency (in Hz). The duty cycle of the TWI clock is set to 50%. - * \param pTwi Pointer to an Twi instance. - * \param twck Desired TWI clock frequency. - * \param mck Master clock frequency. - */ -void TWI_ConfigureMaster(Twi *pTwi, uint32_t twck, uint32_t mck) -{ - uint32_t ckdiv = 0; - uint32_t cldiv; - uint8_t ok = 0; - - TRACE_DEBUG("TWI_ConfigureMaster()\n\r"); - SANITY_CHECK(pTwi); - - /* SVEN: TWI Slave Mode Enabled */ - pTwi->TWI_CR = TWI_CR_SVEN; - /* Reset the TWI*/ - pTwi->TWI_CR = TWI_CR_SWRST; - pTwi->TWI_RHR; - - /* TWI Slave Mode Disabled, TWI Master Mode Disabled. */ - pTwi->TWI_CR = TWI_CR_SVDIS; - pTwi->TWI_CR = TWI_CR_MSDIS; - - /* Set master mode */ - pTwi->TWI_CR = TWI_CR_MSEN; - - /* Configure clock */ - while (!ok) { - cldiv = ((mck / (2 * twck)) - 3) / power(2, ckdiv); - if (cldiv <= 255) { - ok = 1; - } - else { - ckdiv++; - } - } - ASSERT(ckdiv < 8, "-F- Cannot find valid TWI clock parameters\n\r"); - TRACE_DEBUG("Using CKDIV = %u and CLDIV/CHDIV = %u\n\r", ckdiv, cldiv); - pTwi->TWI_CWGR = 0; - pTwi->TWI_CWGR = (ckdiv << 16) | (cldiv << 8) | cldiv; -} - -/** - * \brief Configures a TWI peripheral to operate in slave mode. - * \param pTwi Pointer to an Twi instance. - * \param slaveAddress Slave address. - */ -void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress) -{ - uint32_t i; - - /* TWI software reset */ - pTwi->TWI_CR = TWI_CR_SWRST; - pTwi->TWI_RHR; - - /* Wait at least 10 ms */ - for (i=0; i < 1000000; i++); - - /* TWI Slave Mode Disabled, TWI Master Mode Disabled*/ - pTwi->TWI_CR = TWI_CR_SVDIS | TWI_CR_MSDIS; - - /* Configure slave address. */ - pTwi->TWI_SMR = 0; - pTwi->TWI_SMR = (slaveAddress << 16) & TWI_SMR_SADR; - - /* SVEN: TWI Slave Mode Enabled */ - pTwi->TWI_CR = TWI_CR_SVEN; - - /* Wait at least 10 ms */ - for (i=0; i < 1000000; i++); - ASSERT( (pTwi->TWI_CR & TWI_CR_SVDIS)!= TWI_CR_SVDIS, "Can't configure TWI slave mode"); -} - -/** - * \brief Sends a STOP condition on the TWI. - * \param pTwi Pointer to an Twi instance. - */ -void TWI_Stop(Twi *pTwi) -{ - SANITY_CHECK(pTwi); - pTwi->TWI_CR = TWI_CR_STOP; -} - -/** - * \brief Starts a read operation on the TWI bus with the specified slave, it returns - * immediately. Data must then be read using TWI_ReadByte() whenever a byte is - * available (poll using TWI_ByteReceived()). - * \param pTwi Pointer to an Twi instance. - * \param address Slave address on the bus. - * \param iaddress Optional internal address bytes. - * \param isize Number of internal address bytes. - */ -void TWI_StartRead( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize) -{ - SANITY_CHECK(pTwi); - SANITY_CHECK((address & 0x80) == 0); - SANITY_CHECK((iaddress & 0xFF000000) == 0); - SANITY_CHECK(isize < 4); - - /* Set slave address and number of internal address bytes. */ - pTwi->TWI_MMR = 0; - pTwi->TWI_MMR = (isize << 8) | TWI_MMR_MREAD | (address << 16); - - /* Set internal address bytes */ - pTwi->TWI_IADR = 0; - pTwi->TWI_IADR = iaddress; - - /* Send START condition */ - pTwi->TWI_CR = TWI_CR_START; -} - -/** - * \brief Reads a byte from the TWI bus. The read operation must have been started - * using TWI_StartRead() and a byte must be available (check with TWI_ByteReceived()). - * \param pTwi Pointer to an Twi instance. - * \return byte read. - */ -uint8_t TWI_ReadByte(Twi *pTwi) -{ - SANITY_CHECK(pTwi); - - return pTwi->TWI_RHR; -} - -/** - * \brief Sends a byte of data to one of the TWI slaves on the bus. - * \note This function must be called once before TWI_StartWrite() with - * the first byte of data to send, then it shall be called repeatedly - * after that to send the remaining bytes. - * \param pTwi Pointer to an Twi instance. - * \param byte Byte to send. - */ -void TWI_WriteByte(Twi *pTwi, uint8_t byte) -{ - SANITY_CHECK(pTwi); - - pTwi->TWI_THR = byte; -} - -/** - * \brief Starts a write operation on the TWI to access the selected slave, then - * returns immediately. A byte of data must be provided to start the write; - * other bytes are written next. - * after that to send the remaining bytes. - * \param pTwi Pointer to an Twi instance. - * \param address Address of slave to acccess on the bus. - * \param iaddress Optional slave internal address. - * \param isize Number of internal address bytes. - * \param byte First byte to send. - */ -void TWI_StartWrite( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t byte) -{ - SANITY_CHECK(pTwi); - SANITY_CHECK((address & 0x80) == 0); - SANITY_CHECK((iaddress & 0xFF000000) == 0); - SANITY_CHECK(isize < 4); - - /* Set slave address and number of internal address bytes. */ - pTwi->TWI_MMR = 0; - pTwi->TWI_MMR = (isize << 8) | (address << 16); - - /* Set internal address bytes. */ - pTwi->TWI_IADR = 0; - pTwi->TWI_IADR = iaddress; - - /* Write first byte to send.*/ - TWI_WriteByte(pTwi, byte); -} - -/** - * \brief Check if a byte have been receiced from TWI. - * \param pTwi Pointer to an Twi instance. - * \return 1 if a byte has been received and can be read on the given TWI - * peripheral; otherwise, returns 0. This function resets the status register. - */ -uint8_t TWI_ByteReceived(Twi *pTwi) -{ - return ((pTwi->TWI_SR & TWI_SR_RXRDY) == TWI_SR_RXRDY); -} - -/** - * \brief Check if a byte have been sent to TWI. - * \param pTwi Pointer to an Twi instance. - * \return 1 if a byte has been sent so another one can be stored for - * transmission; otherwise returns 0. This function clears the status register. - */ -uint8_t TWI_ByteSent(Twi *pTwi) -{ - return ((pTwi->TWI_SR & TWI_SR_TXRDY) == TWI_SR_TXRDY); -} - -/** - * \brief Check if current transmission is complet. - * \param pTwi Pointer to an Twi instance. - * \return 1 if the current transmission is complete (the STOP has been sent); - * otherwise returns 0. - */ -uint8_t TWI_TransferComplete(Twi *pTwi) -{ - return ((pTwi->TWI_SR & TWI_SR_TXCOMP) == TWI_SR_TXCOMP); -} - -/** - * \brief Enables the selected interrupts sources on a TWI peripheral. - * \param pTwi Pointer to an Twi instance. - * \param sources Bitwise OR of selected interrupt sources. - */ -void TWI_EnableIt(Twi *pTwi, uint32_t sources) -{ - SANITY_CHECK(pTwi); - SANITY_CHECK((sources & 0xFFFFF088) == 0); - - pTwi->TWI_IER = sources; -} - -/** - * \brief Disables the selected interrupts sources on a TWI peripheral. - * \param pTwi Pointer to an Twi instance. - * \param sources Bitwise OR of selected interrupt sources. - */ -void TWI_DisableIt(Twi *pTwi, uint32_t sources) -{ - SANITY_CHECK(pTwi); - SANITY_CHECK((sources & 0xFFFFF088) == 0); - - pTwi->TWI_IDR = sources; -} - -/** - * \brief Get the current status register of the given TWI peripheral. - * \note This resets the internal value of the status register, so further - * read may yield different values. - * \param pTwi Pointer to an Twi instance. - * \return TWI status register. - */ -uint32_t TWI_GetStatus(Twi *pTwi) -{ - SANITY_CHECK(pTwi); - - return pTwi->TWI_SR; -} - -/** - * \brief Returns the current status register of the given TWI peripheral, but - * masking interrupt sources which are not currently enabled. - * \note This resets the internal value of the status register, so further - * read may yield different values. - * \param pTwi Pointer to an Twi instance. - */ -uint32_t TWI_GetMaskedStatus(Twi *pTwi) -{ - uint32_t status; - - SANITY_CHECK(pTwi); - - status = pTwi->TWI_SR; - status &= pTwi->TWI_IMR; - - return status; -} - -/** - * \brief Sends a STOP condition. STOP Condition is sent just after completing - * the current byte transmission in master read mode. - * \param pTwi Pointer to an Twi instance. - */ -void TWI_SendSTOPCondition(Twi *pTwi) -{ - SANITY_CHECK(pTwi); - - pTwi->TWI_CR |= TWI_CR_STOP; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/twi/twi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/twi/twi.h deleted file mode 100644 index a2374048..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/twi/twi.h +++ /dev/null @@ -1,95 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for configuration the Two Wire Interface (TWI) peripheral. - * - */ - -#ifndef TWI_H -#define TWI_H - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ -/* Returns 1 if the TXRDY bit (ready to transmit data) is set in the given status register value.*/ -#define TWI_STATUS_TXRDY(status) ((status & TWI_SR_TXRDY) == TWI_SR_TXRDY) - -/* Returns 1 if the RXRDY bit (ready to receive data) is set in the given status register value.*/ -#define TWI_STATUS_RXRDY(status) ((status & TWI_SR_RXRDY) == TWI_SR_RXRDY) - -/* Returns 1 if the TXCOMP bit (transfer complete) is set in the given status register value.*/ -#define TWI_STATUS_TXCOMP(status) ((status & TWI_SR_TXCOMP) == TWI_SR_TXCOMP) - -/*---------------------------------------------------------------------------- - * External function - *----------------------------------------------------------------------------*/ - -extern void TWI_ConfigureMaster(Twi *pTwi, uint32_t twck, uint32_t mck); - -extern void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress); - -extern void TWI_Stop(Twi *pTwi); - -extern void TWI_StartRead( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize); - -extern uint8_t TWI_ReadByte(Twi *pTwi); - -extern void TWI_WriteByte(Twi *pTwi, uint8_t byte); - -extern void TWI_StartWrite( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t byte); - -extern uint8_t TWI_ByteReceived(Twi *pTwi); - -extern uint8_t TWI_ByteSent(Twi *pTwi); - -extern uint8_t TWI_TransferComplete(Twi *pTwi); - -extern void TWI_EnableIt(Twi *pTwi, uint32_t sources); - -extern void TWI_DisableIt(Twi *pTwi, uint32_t sources); - -extern uint32_t TWI_GetStatus(Twi *pTwi); - -extern uint32_t TWI_GetMaskedStatus(Twi *pTwi); - -extern void TWI_SendSTOPCondition(Twi *pTwi); - -#endif //#ifndef TWI_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/twi/twid.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/twi/twid.c deleted file mode 100644 index 6d1774de..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/twi/twid.c +++ /dev/null @@ -1,342 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - - - - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "twid.h" -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Definition - *----------------------------------------------------------------------------*/ -#define TWITIMEOUTMAX 50000 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** TWI driver callback function.*/ -typedef void (*TwiCallback)(Async *); - -/** TWI asynchronous transfer descriptor.*/ -typedef struct _AsyncTwi { - - /** Asynchronous transfer status. */ - volatile uint8_t status; - // Callback function to invoke when transfer completes or fails.*/ - TwiCallback callback; - /** Pointer to the data buffer.*/ - uint8_t *pData; - /** Total number of bytes to transfer.*/ - uint32_t num; - /** Number of already transferred bytes.*/ - uint32_t transferred; - -} AsyncTwi; - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ -/** - * \brief Initializes a TWI driver instance, using the given TWI peripheral. - * \note The peripheral must have been initialized properly before calling this function. - * \param pTwid Pointer to the Twid instance to initialize. - * \param pTwi Pointer to the TWI peripheral to use. - */ -void TWID_Initialize(Twid *pTwid, Twi *pTwi) -{ - TRACE_DEBUG("TWID_Initialize()\n\r"); - SANITY_CHECK(pTwid); - SANITY_CHECK(pTwi); - - /* Initialize driver. */ - pTwid->pTwi = pTwi; - pTwid->pTransfer = 0; -} - - -/** - * \brief Interrupt handler for a TWI peripheral. Manages asynchronous transfer - * occuring on the bus. This function MUST be called by the interrupt service - * routine of the TWI peripheral if asynchronous read/write are needed. - * \param pTwid Pointer to a Twid instance. - */ -void TWID_Handler(Twid *pTwid) -{ - uint8_t status; - AsyncTwi *pTransfer = (AsyncTwi *) pTwid->pTransfer; - Twi *pTwi = pTwid->pTwi; - - SANITY_CHECK(pTwid); - - /* Retrieve interrupt status */ - status = TWI_GetMaskedStatus(pTwi); - - /* Byte received */ - if (TWI_STATUS_RXRDY(status)) { - - pTransfer->pData[pTransfer->transferred] = TWI_ReadByte(pTwi); - pTransfer->transferred++; - - /* check for transfer finish */ - if (pTransfer->transferred == pTransfer->num) { - - TWI_DisableIt(pTwi, TWI_IDR_RXRDY); - TWI_EnableIt(pTwi, TWI_IER_TXCOMP); - } - /* Last byte? */ - else if (pTransfer->transferred == (pTransfer->num - 1)) { - - TWI_Stop(pTwi); - } - } - /* Byte sent*/ - else if (TWI_STATUS_TXRDY(status)) { - - /* Transfer finished ? */ - if (pTransfer->transferred == pTransfer->num) { - - TWI_DisableIt(pTwi, TWI_IDR_TXRDY); - TWI_EnableIt(pTwi, TWI_IER_TXCOMP); - TWI_SendSTOPCondition(pTwi); - } - /* Bytes remaining */ - else { - - TWI_WriteByte(pTwi, pTransfer->pData[pTransfer->transferred]); - pTransfer->transferred++; - } - } - /* Transfer complete*/ - else if (TWI_STATUS_TXCOMP(status)) { - - TWI_DisableIt(pTwi, TWI_IDR_TXCOMP); - pTransfer->status = 0; - if (pTransfer->callback) { - - pTransfer->callback((Async *) pTransfer); - } - pTwid->pTransfer = 0; - } -} - -/** - * \brief Asynchronously reads data from a slave on the TWI bus. An optional - * callback function is triggered when the transfer is complete. - * \param pTwid Pointer to a Twid instance. - * \param address TWI slave address. - * \param iaddress Optional slave internal address. - * \param isize Internal address size in bytes. - * \param pData Data buffer for storing received bytes. - * \param num Number of bytes to read. - * \param pAsync Asynchronous transfer descriptor. - * \return 0 if the transfer has been started; otherwise returns a TWI error code. - */ -uint8_t TWID_Read( - Twid *pTwid, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t *pData, - uint32_t num, - Async *pAsync) -{ - Twi *pTwi = pTwid->pTwi; - AsyncTwi *pTransfer = (AsyncTwi *) pTwid->pTransfer; - uint32_t timeout; - - SANITY_CHECK(pTwid); - SANITY_CHECK((address & 0x80) == 0); - SANITY_CHECK((iaddress & 0xFF000000) == 0); - SANITY_CHECK(isize < 4); - - /* Check that no transfer is already pending*/ - if (pTransfer) { - - TRACE_ERROR("TWID_Read: A transfer is already pending\n\r"); - return TWID_ERROR_BUSY; - } - - /* Set STOP signal if only one byte is sent*/ - if (num == 1) { - - TWI_Stop(pTwi); - } - - /* Asynchronous transfer*/ - if (pAsync) { - - /* Update the transfer descriptor */ - pTwid->pTransfer = pAsync; - pTransfer = (AsyncTwi *) pAsync; - pTransfer->status = ASYNC_STATUS_PENDING; - pTransfer->pData = pData; - pTransfer->num = num; - pTransfer->transferred = 0; - - /* Enable read interrupt and start the transfer */ - TWI_EnableIt(pTwi, TWI_IER_RXRDY); - TWI_StartRead(pTwi, address, iaddress, isize); - } - /* Synchronous transfer*/ - else { - - /* Start read*/ - TWI_StartRead(pTwi, address, iaddress, isize); - - /* Read all bytes, setting STOP before the last byte*/ - while (num > 0) { - - /* Last byte ?*/ - if (num == 1) { - - TWI_Stop(pTwi); - } - - /* Wait for byte then read and store it*/ - timeout = 0; - while( !TWI_ByteReceived(pTwi) && (++timeoutpTwi; - AsyncTwi *pTransfer = (AsyncTwi *) pTwid->pTransfer; - uint32_t timeout; - - SANITY_CHECK(pTwi); - SANITY_CHECK((address & 0x80) == 0); - SANITY_CHECK((iaddress & 0xFF000000) == 0); - SANITY_CHECK(isize < 4); - - /* Check that no transfer is already pending */ - if (pTransfer) { - - TRACE_ERROR("TWI_Write: A transfer is already pending\n\r"); - return TWID_ERROR_BUSY; - } - - /* Asynchronous transfer */ - if (pAsync) { - - /* Update the transfer descriptor */ - pTwid->pTransfer = pAsync; - pTransfer = (AsyncTwi *) pAsync; - pTransfer->status = ASYNC_STATUS_PENDING; - pTransfer->pData = pData; - pTransfer->num = num; - pTransfer->transferred = 1; - - /* Enable write interrupt and start the transfer */ - TWI_StartWrite(pTwi, address, iaddress, isize, *pData); - TWI_EnableIt(pTwi, TWI_IER_TXRDY); - } - /* Synchronous transfer*/ - else { - - // Start write - TWI_StartWrite(pTwi, address, iaddress, isize, *pData++); - num--; - - /* Send all bytes */ - while (num > 0) { - - /* Wait before sending the next byte */ - timeout = 0; - while( !TWI_ByteSent(pTwi) && (++timeout -#include - -/*---------------------------------------------------------------------------- - * Definition - *----------------------------------------------------------------------------*/ - -/** TWI driver is currently busy. */ -#define TWID_ERROR_BUSY 1 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** TWI driver structure. Holds the internal state of the driver.*/ -typedef struct _Twid { - /** Pointer to the underlying TWI peripheral.*/ - Twi *pTwi; - /** Current asynchronous transfer being processed.*/ - Async *pTransfer; - -} Twid; - -/*---------------------------------------------------------------------------- - * Export functions - *----------------------------------------------------------------------------*/ -extern void TWID_Initialize(Twid *pTwid, Twi *pTwi); - -extern void TWID_Handler(Twid *pTwid); - -extern uint8_t TWID_Read( - Twid *pTwid, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t *pData, - uint32_t num, - Async *pAsync); - -extern uint8_t TWID_Write( - Twid *pTwid, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t *pData, - uint32_t num, - Async *pAsync); - -#endif //#ifndef TWID_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/usart/uart_console.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/usart/uart_console.c deleted file mode 100644 index 07eaeec3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/usart/uart_console.c +++ /dev/null @@ -1,288 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implements UART console. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include -#include -#include -#include -#include - -#include "usart/uart_console.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** Console baudrate always using 115200. */ -#define CONSOLE_BAUDRATE 115200 -/** Usart Hw interface used by the console (UART0). */ -#define CONSOLE_USART UART0 -/** Usart Hw ID used by the console (UART0). */ -#define CONSOLE_ID ID_UART0 -/** Pins description corresponding to Rxd,Txd, (UART pins) */ -#define CONSOLE_PINS {PINS_UART} - -/*---------------------------------------------------------------------------- - * Variables - *----------------------------------------------------------------------------*/ - -/** Is Console Initialized. */ -static uint8_t isConsolInitialized = 0; - -/** - * \brief Configures an USART peripheral with the specified parameters. - * - * \param baudrate Baudrate at which the USART should operate (in Hz). - * \param masterClock Frequency of the system master clock (in Hz). - */ -static void UART_Configure( uint32_t baudrate, - uint32_t masterClock) -{ - const Pin pPins[] = CONSOLE_PINS; - Uart *pUart = CONSOLE_USART; - - /* Configure PIO */ - PIO_Configure(pPins, PIO_LISTSIZE(pPins)); - - /* Configure PMC */ - PMC->PMC_PCER0 = 1 << CONSOLE_ID; - - /* Reset and disable receiver & transmitter */ - pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX - | UART_CR_RXDIS | UART_CR_TXDIS; - - /* Configure mode */ - pUart->UART_MR = (0x4 << 9); /* TODO: Change with new symbols: AT91C_UART_CHRL_8_BITS | AT91C_UART_PAR_NONE */ - - /* Configure baudrate */ - /* Asynchronous, no oversampling */ - pUart->UART_BRGR = (masterClock / baudrate) / 16; - - /* Disable PDC channel */ - pUart->UART_PTCR = UART_PTCR_RXTDIS | UART_PTCR_TXTDIS; - - /* Enable receiver and transmitter */ - pUart->UART_CR = UART_CR_RXEN | UART_CR_TXEN; - - isConsolInitialized = 1; -} - -/** - * \brief Outputs a character on the UART line. - * - * \note This function is synchronous (i.e. uses polling). - * \param c Character to send. - */ -void UART_PutChar(uint8_t c) -{ - Uart *pUart = CONSOLE_USART; - - if (!isConsolInitialized) - UART_Configure(CONSOLE_BAUDRATE, BOARD_MCK); - - /* Wait for the transmitter to be ready */ - while ((pUart->UART_SR & UART_SR_TXEMPTY) == 0); - - /* Send character */ - pUart->UART_THR = c; - -} - -/** - * \brief Input a character from the UART line. - * - * \note This function is synchronous - * \return character received. - */ -uint8_t UART_GetChar(void) -{ - Uart *pUart = CONSOLE_USART; - - if (!isConsolInitialized) - UART_Configure(CONSOLE_BAUDRATE, BOARD_MCK); - - while((pUart->UART_SR & UART_SR_RXRDY) == 0); - return pUart->UART_RHR; -} - -/** - * \brief Check if there is Input from UART line. - * - * \return true if there is Input. - */ -bool UART_IsRxReady(void) -{ - Uart *pUart = CONSOLE_USART; - - if (!isConsolInitialized) - UART_Configure(CONSOLE_BAUDRATE, BOARD_MCK); - - return (pUart->UART_SR & UART_SR_RXRDY) > 0; -} - -/* \cond NOFPUT */ -#ifndef NOFPUT -#include -#include -/** - * \brief Implementation of fputc using the UART as the standard output. Required - * for printf(). - * - * \param c Character to write. - * \param pStream Output stream. - * - * \return The character written if successful, or -1 if the output stream is - * not stdout or stderr. - */ -int fputc ( int c, FILE * pStream ) -{ - if ((pStream == stdout) || (pStream == stderr)) { - UART_PutChar(c); - return c; - } - else { - - return EOF; - } -} - -/** - * \brief Implementation of fputs using the UART as the standard output. Required - * for printf(). Does NOT currently use the PDC. - * - * \param pStr String to write. - * \param pStream Output stream. - * - * \return Number of characters written if successful, or -1 if the output - * stream is not stdout or stderr. - */ -signed int fputs(const char *pStr, FILE *pStream) -{ - signed int num = 0; - - while (*pStr != 0) { - - if (fputc(*pStr, pStream) == -1) { - - return -1; - } - num++; - pStr++; - } - - return num; -} - -#undef putchar - -/** - * \brief Outputs a character on the UART. - * - * \param c Character to output. - * - * \return The character that was output. - */ -signed int putchar(signed int c) -{ - return fputc(c, stdout); -} - -/* The char which has been ungotten, or EOF. */ -static int _UngetChar = EOF; - -/** - * \brief Implementation of fputc using the UART as the standard output. Required - * for printf(). - * - * \param c Character to write. - * \param pStream Output stream. - * - * \return The character written if successful, or -1 if the output stream is - * not stdout or stderr. - */ -int fgetc (FILE * pStream ) -{ - int c; - - if (pStream == stdin) { - c = UART_GetChar(); - return c; - } - else { - - return EOF; - } -} - -#undef getchar -/** - * \brief Get a character from UART. - * - * \return The character received. - */ -signed int getchar(void) -{ - if (_UngetChar != EOF) - { - int res = _UngetChar; - _UngetChar = EOF; - return res; - } - else - { - return fgetc(stdin); - } -} - -#undef __ungetchar -/** - * \brief Unget a character from stdin. - * - * \return The unget character. - */ -signed int __ungetchar(int c) -{ - _UngetChar = c; - return c; -} - -#endif /* #ifndef NOFPUT */ -/* \endcond */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/usart/uart_console.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/usart/uart_console.h deleted file mode 100644 index dfa19217..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/usart/uart_console.h +++ /dev/null @@ -1,38 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - -#ifndef UART_CONSOLE_H_ -#define UART_CONSOLE_H_ - -extern void UART_PutChar(uint8_t c); -extern uint8_t UART_GetChar(void); -extern bool UART_IsRxReady(void); - -#endif /* UART_CONSOLE_H_ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/usart/usart.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/usart/usart.c deleted file mode 100644 index 5aa10e5d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/usart/usart.c +++ /dev/null @@ -1,395 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup usart_module Working with USART - * The USART driver provides the interface to configure and use the USART peripheral.\n - * - * The USART supports several kinds of comminication modes such as full-duplex asynchronous/ - * synchronous serial commnunication,RS485 with driver control signal,ISO7816,SPI and Test modes. - * - * To start a USART transfer with \ref AT91SAM3S_PDC "PDC" support, the user could follow these steps: - *
    - *
  • Configure USART with expected mode and baudrate(see \ref USART_Configure), which could be done by: - * -# Resetting and disabling transmitter and receiver by setting US_CR(Control Register).
    • - * -# Conifguring the USART in a specific mode by setting USART_MODE bits in US_MR(Mode Register) - * -# Setting baudrate which is different from mode to mode. - - *
  • Enable transmitter or receiver respectively by set US_CR_TXEN or US_CR_RXEN in US_CR.
    • - *
  • Read from or write to the peripheral with \ref USART_ReadBuffer or \ref USART_WriteBuffer. - These operations could be done by polling or interruption.
    • - *
  • For polling, check the status bit US_CSR_ENDRX/US_CSR_RXBUFF (READ) or US_CSR_ENDTX/ - US_CSR_TXBUFE (WRITE).
    • - *
  • For interruption,"enable" the status bit through US_IER and - realize the hanler with USARTx_IrqHandler according to IRQ vector - table which is defined in board_cstartup_.c - To enable the interruption of USART,it should be configured with priority and enabled first through - NVIC .
    • - *
- * - * For more accurate information, please look at the USART section of the - * Datasheet. - * - * Related files :\n - * \ref usart.c\n - * \ref usart.h\n -*/ - - - -/** - * \file - * - * Implementation of USART (Universal Synchronous Asynchronous Receiver Transmitter) - * controller. - * - */ -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ -#include - -#include "usart.h" -#include -#include - -/*---------------------------------------------------------------------------- - * Local definitions - *----------------------------------------------------------------------------*/ - - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * \brief Configures an USART peripheral with the specified parameters. - * - * - * \param usart Pointer to the USART peripheral to configure. - * \param mode Desired value for the USART mode register (see the datasheet). - * \param baudrate Baudrate at which the USART should operate (in Hz). - * \param masterClock Frequency of the system master clock (in Hz). - */ -void USART_Configure(Usart *usart, - uint32_t mode, - uint32_t baudrate, - uint32_t masterClock) -{ - /* Reset and disable receiver & transmitter*/ - usart->US_CR = US_CR_RSTRX | US_CR_RSTTX - | US_CR_RXDIS | US_CR_TXDIS; - - /* Configure mode*/ - usart->US_MR = mode; - - /* Configure baudrate*/ - /* Asynchronous, no oversampling*/ - if (((mode & US_MR_SYNC__CPHA) == 0) - && ((mode & US_MR_OVER) == 0)) { - - usart->US_BRGR = (masterClock / baudrate) / 16; - } - /* TODO other modes*/ -} -/** - * \brief Enables or disables the transmitter of an USART peripheral. - * - * - * \param usart Pointer to an USART peripheral - * \param enabled If true, the transmitter is enabled; otherwise it is - * disabled. - */ -void USART_SetTransmitterEnabled(Usart *usart, uint8_t enabled) -{ - if (enabled) { - - usart->US_CR = US_CR_TXEN; - } - else { - - usart->US_CR = US_CR_TXDIS; - } -} - -/** - * \brief Enables or disables the receiver of an USART peripheral - * - * - * \param usart Pointer to an USART peripheral - * \param enabled If true, the receiver is enabled; otherwise it is disabled. - */ -void USART_SetReceiverEnabled(Usart *usart, - uint8_t enabled) -{ - if (enabled) { - - usart->US_CR = US_CR_RXEN; - } - else { - - usart->US_CR = US_CR_RXDIS; - } -} - -/** - * \brief Sends one packet of data through the specified USART peripheral. This - * function operates synchronously, so it only returns when the data has been - * actually sent. - * - * - * \param usart Pointer to an USART peripheral. - * \param data Data to send including 9nth bit and sync field if necessary (in - * the same format as the US_THR register in the datasheet). - * \param timeOut Time out value (0 = no timeout). - */ -void USART_Write( - Usart *usart, - uint16_t data, - volatile uint32_t timeOut) -{ - if (timeOut == 0) { - - while ((usart->US_CSR & US_CSR_TXEMPTY) == 0); - } - else { - - while ((usart->US_CSR & US_CSR_TXEMPTY) == 0) { - - if (timeOut == 0) { - - TRACE_ERROR("USART_Write: Timed out.\n\r"); - return; - } - timeOut--; - } - } - - usart->US_THR = data; -} - -/** - * \brief Sends the contents of a data buffer through the specified USART peripheral. - * This function returns immediately (1 if the buffer has been queued, 0 - * otherwise); poll the ENDTX and TXBUFE bits of the USART status register - * to check for the transfer completion. - * - * \param usart Pointer to an USART peripheral. - * \param buffer Pointer to the data buffer to send. - * \param size Size of the data buffer (in bytes). - */ -uint8_t USART_WriteBuffer( - Usart *usart, - void *buffer, - uint32_t size) -{ - /* Check if the first PDC bank is free*/ - if ((usart->US_TCR == 0) && (usart->US_TNCR == 0)) { - - usart->US_TPR = (uint32_t) buffer; - usart->US_TCR = size; - usart->US_PTCR = US_PTCR_TXTEN; - - return 1; - } - /* Check if the second PDC bank is free*/ - else if (usart->US_TNCR == 0) { - - usart->US_TNPR = (uint32_t) buffer; - usart->US_TNCR = size; - - return 1; - } - else { - - return 0; - } -} - - -/** - * \brief Reads and return a packet of data on the specified USART peripheral. This - * function operates asynchronously, so it waits until some data has been - * received. - * - * \param usart Pointer to an USART peripheral. - * \param timeOut Time out value (0 -> no timeout). - */ -uint16_t USART_Read( - Usart *usart, - volatile uint32_t timeOut) -{ - if (timeOut == 0) { - - while ((usart->US_CSR & US_CSR_RXRDY) == 0); - } - else { - - while ((usart->US_CSR & US_CSR_RXRDY) == 0) { - - if (timeOut == 0) { - - TRACE_ERROR("USART_Read: Timed out.\n\r"); - return 0; - } - timeOut--; - } - } - - return usart->US_RHR; -} - -/** - * \brief Reads data from an USART peripheral, filling the provided buffer until it - * becomes full. This function returns immediately with 1 if the buffer has - * been queued for transmission; otherwise 0. - * - * \param usart Pointer to an USART peripheral. - * \param buffer Pointer to the buffer where the received data will be stored. - * \param size Size of the data buffer (in bytes). - */ -uint8_t USART_ReadBuffer(Usart *usart, - void *buffer, - uint32_t size) -{ - /* Check if the first PDC bank is free*/ - if ((usart->US_RCR == 0) && (usart->US_RNCR == 0)) { - - usart->US_RPR = (uint32_t) buffer; - usart->US_RCR = size; - usart->US_PTCR = US_PTCR_RXTEN; - - return 1; - } - /* Check if the second PDC bank is free*/ - else if (usart->US_RNCR == 0) { - - usart->US_RNPR = (uint32_t) buffer; - usart->US_RNCR = size; - - return 1; - } - else { - - return 0; - } -} - -/** - * \brief Returns 1 if some data has been received and can be read from an USART; - * otherwise returns 0. - * - * \param usart Pointer to an Usart instance. - */ -uint8_t USART_IsDataAvailable(Usart *usart) -{ - if ((usart->US_CSR & US_CSR_RXRDY) != 0) { - - return 1; - } - else { - - return 0; - } -} - -/** - * \brief Sets the filter value for the IRDA demodulator. - * - * \param pUsart Pointer to an Usart instance. - * \param filter Filter value. - */ -void USART_SetIrdaFilter(Usart *pUsart, uint8_t filter) -{ - SANITY_CHECK(pUsart); - - pUsart->US_IF = filter; -} - -/** - * \brief Sends one packet of data through the specified USART peripheral. This - * function operates synchronously, so it only returns when the data has been - * actually sent. - * - * \param usart Pointer to an USART peripheral. - * \param c Character to send - */ -void USART_PutChar( - Usart *usart, - uint8_t c) -{ - /* Wait for the transmitter to be ready*/ - while ((usart->US_CSR & US_CSR_TXEMPTY) == 0); - - /* Send character*/ - usart->US_THR = c; - - /* Wait for the transfer to complete*/ - while ((usart->US_CSR & US_CSR_TXEMPTY) == 0); -} - -/** - * \brief Return 1 if a character can be read in USART - */ -uint32_t USART_IsRxReady(Usart *usart) -{ - return (usart->US_CSR & US_CSR_RXRDY); -} -/** - * \brief Get present status - */ -uint32_t USART_GetStatus(Usart *usart) -{ - return usart->US_CSR; -} -/** - * \brief Enable interrupt - */ -void USART_EnableIt(Usart *usart,uint32_t mode) -{ - usart->US_IER = mode; -} -/** - * \brief Disable interrupt - */ -void USART_DisableIt(Usart *usart,uint32_t mode) -{ - usart->US_IDR = mode; -} -/** - * \brief Reads and returns a character from the USART. - * - * \note This function is synchronous (i.e. uses polling). - * \param usart Pointer to an USART peripheral. - * \return Character received. - */ -uint8_t USART_GetChar(Usart *usart) -{ - while ((usart->US_CSR & US_CSR_RXRDY) == 0); - return usart->US_RHR; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/usart/usart.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/usart/usart.h deleted file mode 100644 index 8c50f87e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/usart/usart.h +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * This module provides several definitions and methods for using an USART - * peripheral. - * - * \par Usage - * - * -# Enable the USART peripheral clock in the PMC. - * -# Enable the required USART PIOs (see pio.h). - * -# Configure the UART by calling USART_Configure. - * -# Enable the transmitter and/or the receiver of the USART using - * USART_SetTransmitterEnabled and USART_SetReceiverEnabled. - * -# Send data through the USART using the USART_Write and - * USART_WriteBuffer methods. - * -# Receive data from the USART using the USART_Read and - * USART_ReadBuffer functions; the availability of data can be polled - * with USART_IsDataAvailable. - * -# Disable the transmitter and/or the receiver of the USART with - * USART_SetTransmitterEnabled and USART_SetReceiverEnabled. - */ - -#ifndef USART_H -#define USART_H - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** \section USART_mode USART modes - * This section lists several common operating modes for an USART peripheral. - * - * \b Modes - * - USART_MODE_ASYNCHRONOUS - * - USART_MODE_IRDA - */ - -/** Basic asynchronous mode, i.e. 8 bits no parity.*/ -#define USART_MODE_ASYNCHRONOUS (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE) - -/** IRDA mode*/ -#define USART_MODE_IRDA (AT91C_US_USMODE_IRDA | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_FILTER) - - -/*------------------------------------------------------------------------------*/ -/* Exported functions*/ -/*------------------------------------------------------------------------------*/ - -extern void USART_Configure( - Usart *usart, - uint32_t mode, - uint32_t baudrate, - uint32_t masterClock); -extern uint32_t USART_GetStatus(Usart *usart); -extern void USART_EnableIt(Usart *usart,uint32_t mode); -extern void USART_DisableIt(Usart *usart,uint32_t mode); -extern void USART_SetTransmitterEnabled(Usart *usart, uint8_t enabled); - -extern void USART_SetReceiverEnabled(Usart *usart, uint8_t enabled); - -extern void USART_Write( - Usart *usart, - uint16_t data, - volatile uint32_t timeOut); - -extern uint8_t USART_WriteBuffer( - Usart *usart, - void *buffer, - uint32_t size); - -extern uint16_t USART_Read( - Usart *usart, - volatile uint32_t timeOut); - -extern uint8_t USART_ReadBuffer( - Usart *usart, - void *buffer, - uint32_t size); - -extern uint8_t USART_IsDataAvailable(Usart *usart); - -extern void USART_SetIrdaFilter(Usart *pUsart, uint8_t filter); - -extern void USART_PutChar(Usart *usart, uint8_t c); - -extern uint32_t USART_IsRxReady(Usart *usart); - -extern uint8_t USART_GetChar(Usart *usart); - - -#endif /*#ifndef USART_H*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/assert.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/assert.h deleted file mode 100644 index 5c21781d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/assert.h +++ /dev/null @@ -1,114 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Definition of the ASSERT() and SANITY_CHECK() macros, which are used for -/// runtime condition & parameter verifying. -/// -/// !Usage -/// -/// -# Use ASSERT() in your code to check the value of function parameters, -/// return values, etc. *Warning:* the ASSERT() condition must not have -/// any side-effect; otherwise, the program may not work properly -/// anymore when assertions are disabled. -/// -# Use SANITY_CHECK() to perform checks with a default error message -/// (outputs the file and line number where the error occured). This -/// reduces memory overhead caused by assertion error strings. -/// -# Initialize the dbgu to see failed assertions at run-time. -/// -# Assertions can be entirely disabled by defining the NOASSERT symbol -/// at compilation time. -//------------------------------------------------------------------------------ - -#ifndef ASSERT_H -#define ASSERT_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include -#include "trace.h" - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ -#if defined(NOASSERT) - #define ASSERT(...) - #define SANITY_CHECK(...) -#else - - #if (TRACE_LEVEL == 0) - /// Checks that the given condition is true, - /// otherwise stops the program execution. - /// \param condition Condition to verify. - #define ASSERT(condition, ...) { \ - if (!(condition)) { \ - while (1); \ - } \ - } - - /// Performs the same duty as the ASSERT() macro - /// \param condition Condition to verify. - #define SANITY_CHECK(condition) ASSERT(condition, ...) - - #else - /// Checks that the given condition is true, otherwise displays an error - /// message and stops the program execution. - /// \param condition Condition to verify. - #define ASSERT(condition, ...) { \ - if (!(condition)) { \ - printf("-F- ASSERT: "); \ - printf(__VA_ARGS__); \ - while (1); \ - } \ - } - #define SANITY_ERROR "Sanity check failed at %s:%d\n\r" - - /// Performs the same duty as the ASSERT() macro, except a default error - /// message is output if the condition is false. - /// \param condition Condition to verify. - #define SANITY_CHECK(condition) ASSERT(condition, SANITY_ERROR, __FILE__, __LINE__) - #endif -#endif - - - - - - - - - - -#endif //#ifndef ASSERT_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/bitbanding.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/bitbanding.h deleted file mode 100644 index 8ef5976c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/bitbanding.h +++ /dev/null @@ -1,108 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef BITBANDING_H -#define BITBANDING_H - -//------------------------------------------------------------------------------ -/// \file bitbanding.h -/// Include Defines & macros for bit-banding. -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Header files -//------------------------------------------------------------------------------ - -#include - -//------------------------------------------------------------------------------ -// Global Macros -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \def IS_BITBAND_SRAM_ADDR(x) -/// \brief Check if the address is in bit banding sram region. -/// \note The address should be in area of 0x2000000 ~ 0x200FFFFF -/// \param x The address to check. -//------------------------------------------------------------------------------ -#define IS_BITBAND_SRAM_ADDR(x) \ - ( ((uint32_t)(x)) >= 0x20000000 && \ - ((uint32_t)(x)) < (0x20000000+0x100000) ) - -//------------------------------------------------------------------------------ -/// \def IS_BITBAND_PERIPH_ADDR(x) -/// \brief Check if the address is in bit banding peripheral region -/// \note The address should be in area of 0x4000000 ~ 0x400FFFFF -/// \param x The address to check -//------------------------------------------------------------------------------ -#define IS_BITBAND_PERIPH_ADDR(x) \ - ( ((uint32_t)(x)) >= 0x40000000 && \ - ((uint32_t)(x)) < (0x40000000+0x100000) ) - -//------------------------------------------------------------------------------ -/// \def BITBAND_ALIAS_ADDRESS(addr, bit) -/// \brief Calculate bit band alias address. -/// -/// Calculate the bit band alias address and return a pointer address to word. -/// \param addr The byte address of bitbanding bit. -/// \param bit The bit position of bitbanding bit. -/// \callergraph -//------------------------------------------------------------------------------ -#define BITBAND_ALIAS_ADDRESS(addr, bit) \ - ((volatile uint32_t*)((((uint32_t)(addr) & 0xF0000000) + 0x02000000) \ - +((((uint32_t)(addr)&0xFFFFF)*32)\ - +( (uint32_t)(bit)*4)))) - -//------------------------------------------------------------------------------ -/// \def WRITE_BITBANDING(addr32, bit, val) -/// \brief Bit write through bit banding. -/// \param addr32 32-bit aligned byte address where the bit exists. -/// \param bit Bit position. -/// \param val The value that the bit is set to. -/// \callergraph -//------------------------------------------------------------------------------ -#define WRITE_BITBANDING(addr32, bit, val) do {\ - *BITBAND_ALIAS_ADDRESS(addr32,bit) = (val); \ - } while (0); - -//------------------------------------------------------------------------------ -/// \def TOGGLE_BITBANDING(addr32, bit) -/// \brief Toggle bit through bit banding -/// \param addr32 32-bit aligned byte address where the bit exists. -/// \param bit Bit position. -//------------------------------------------------------------------------------ -#define TOGGLE_BITBANDING(addr32, bit) do {\ - volatile uint32_t * p = \ - BITBAND_ALIAS_ADDRESS(addr32,bit); \ - if (*p) *p = 0; \ - else *p = 1; \ - }while(0); - -#endif //#ifndef BITBANDING_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/bmp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/bmp.c deleted file mode 100644 index fe305875..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/bmp.c +++ /dev/null @@ -1,322 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "bmp.h" -#include -#include - -#include - -//----------------------------------------------------------------------------- -// Define -//----------------------------------------------------------------------------- -/// BMP offset for header -#define IMAGE_OFFSET 0x100 - - -//------------------------------------------------------------------------------ -// Internal constants -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -// Internal types -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Describe the BMP palette -//------------------------------------------------------------------------------ -struct BMPPaletteEntry { - - /// Blue value - unsigned char b; - /// Green value - unsigned char g; - /// Red value - unsigned char r; - /// Filler character value - unsigned char filler; -}; - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Test if BMP is valid -/// \param file Buffer holding the file to examinate. -/// \return 1 if the header of a BMP file is valid; otherwise returns 0. -//------------------------------------------------------------------------------ -unsigned char BMP_IsValid(void *file) -{ - return ((struct BMPHeader *) file)->type == BMP_TYPE; -} - -//------------------------------------------------------------------------------ -/// Returns the size of a BMP image given at least its header (the file does -/// not have to be complete). -/// \param file Pointer to the buffer which holds the BMP file. -/// \return size of BMP image -//------------------------------------------------------------------------------ -unsigned int BMP_GetFileSize(void *file) -{ - return ((struct BMPHeader *) file)->fileSize; -} - -//----------------------------------------------------------------------------- -/// Write a BMP header -/// \param pAddressHeader Begin address of the BMP -/// \param bmpHSize BMP heigth size -/// \param bmpVSize BMP width size -/// \param bmpRgb Type of BMP (YUV or RGB) -/// \param nbByte_Pixels Number of byte per pixels -//----------------------------------------------------------------------------- -void WriteBMPheader(unsigned int* pAddressHeader, - unsigned int bmpHSize, - unsigned int bmpVSize, - unsigned char bmpRgb, - unsigned char nbByte_Pixels) -{ - unsigned int i; - unsigned int* fill; - struct BMPHeader *Header; - - fill = pAddressHeader; - for (i=0; itype = BMP_TYPE; - Header->fileSize = (bmpHSize * bmpVSize * nbByte_Pixels) + IMAGE_OFFSET; - Header->reserved1 = 0; - Header->reserved2 = 0; - Header->offset = IMAGE_OFFSET; - Header->headerSize = BITMAPINFOHEADER; - Header->width = bmpHSize; - Header->height = bmpVSize; - Header->planes = 1; - Header->bits = nbByte_Pixels * 8; - Header->compression = 0; - Header->imageSize = bmpHSize * bmpVSize * nbByte_Pixels; - Header->xresolution = 0; - Header->yresolution = 0; - Header->ncolours = 0; - Header->importantcolours = 0; -} - - -//------------------------------------------------------------------------------ -/// debug function, dislay BMP header -/// \param pAddressHeader Address of the BMP -//------------------------------------------------------------------------------ -void BMP_displayHeader(unsigned int* pAddressHeader) -{ - struct BMPHeader *header; - - header = (struct BMPHeader*) pAddressHeader; - - TRACE_INFO("BMP\n\r"); - TRACE_INFO("type 0x%X \n\r", header->type); - TRACE_INFO("fileSize %d \n\r", header->fileSize); - TRACE_INFO("reserved1 %d \n\r", header->reserved1); - TRACE_INFO("reserved2 %d \n\r", header->reserved2); - TRACE_INFO("offset %d \n\r", header->offset); - TRACE_INFO("headerSize %d \n\r", header->headerSize); - TRACE_INFO("width %d \n\r", header->width); - TRACE_INFO("height %d \n\r", header->height); - TRACE_INFO("planes %d \n\r", header->planes); - TRACE_INFO("bits %d \n\r", header->bits); - TRACE_INFO("compression %d \n\r", header->compression); - TRACE_INFO("imageSize %d \n\r", header->imageSize); - TRACE_INFO("xresolution %d \n\r", header->xresolution); - TRACE_INFO("yresolution %d \n\r", header->yresolution); - TRACE_INFO("ncolours %d \n\r", header->ncolours); - TRACE_INFO("importantcolours %d\n\r", header->importantcolours); -} - - -//------------------------------------------------------------------------------ -/// Loads a BMP image located at the given address, decodes it and stores the -/// resulting image inside the provided buffer. Image must have the specified -/// width & height. -/// If no buffer is provided, this function simply checks if it is able to -/// decode the image. -/// \param file Buffer which holds the BMP file. -/// \param buffer Buffer in which to store the decoded image. -/// \param width Buffer width in pixels. -/// \param height Buffer height in pixels. -/// \param bpp Number of bits per pixels that the buffer stores. -/// \return 0 if the image has been loaded; otherwise returns an error code. -//------------------------------------------------------------------------------ -unsigned char BMP_Decode( - void *file, - unsigned char *buffer, - unsigned int width, - unsigned int height, - unsigned char bpp) -{ - struct BMPHeader *header; - unsigned int i, j; - unsigned char r, g, b; - unsigned char *image; - - // Read header information - header = (struct BMPHeader *) file; - - // Verify that the file is valid - if (!BMP_IsValid(file)) { - - TRACE_ERROR("BMP_Decode: File type is not 'BM' (0x%04X).\n\r",header->type); - return 1; - } - - // Check that parameters match - if ((header->compression != 0) - || (header->width != width) - || (header->height != height)) { - - TRACE_ERROR("BMP_Decode: File format not supported\n\r"); - TRACE_ERROR(" -> .compression = %u\n\r", header->compression); - TRACE_ERROR(" -> .width = %u\n\r", header->width); - TRACE_ERROR(" -> .height = %u\n\r", header->height); - TRACE_ERROR(" -> .bits = %d\n\r", header->bits); - return 2; - } - - // Get image data - image = (unsigned char *) ((unsigned int) file + header->offset); - - // Check that the bpp resolution is supported - // Only a 24-bit output & 24- or 8-bit input are supported - if (bpp != 24) { - - TRACE_ERROR("BMP_Decode: Output resolution not supported\n\r"); - return 3; - } - else if (header->bits == 24) { - - // Decoding is ok - if (!buffer) return 0; - - // Get image data (swapping red & blue) - for (i=0; i < height; i++) { - for (j=0; j < width; j++) { - - r = image[((height - i - 1) * width + j) * 3 + 2]; - g = image[((height - i - 1) * width + j) * 3 + 1]; - b = image[((height - i - 1) * width + j) * 3]; - -#if defined(BOARD_LCD_RGB565) - // Interlacing - r = ((r << 1) & 0xF0) | ((g & 0x80) >> 4) | ((r & 0x80) >> 5); - g = (g << 1) & 0xF8; - b = b & 0xF8; - - buffer[(i * width + j) * 3] = b; - buffer[(i * width + j) * 3 + 1] = g; - buffer[(i * width + j) * 3 + 2] = r; - -#else - buffer[(i * width + j) * 3] = r; - buffer[(i * width + j) * 3 + 1] = g; - buffer[(i * width + j) * 3 + 2] = b; -#endif //#if defined(BOARD_LCD_RGB565) - } - } - } - else if (header->bits == 8) { - - // Decoding is ok - if (!buffer) return 0; - - // Retrieve palette - struct BMPPaletteEntry palette[256]; - memcpy(palette, - (unsigned char *) ((unsigned int) file + sizeof(struct BMPHeader)), - header->offset - sizeof(struct BMPHeader)); - - // Decode image (reversing row order) - for (i=0; i < height; i++) { - for (j=0; j < width; j++) { - - r = palette[image[(height - i - 1) * width + j]].r; - g = palette[image[(height - i - 1) * width + j]].g; - b = palette[image[(height - i - 1) * width + j]].b; - - buffer[(i * width + j) * 3] = r; - buffer[(i * width + j) * 3 + 1] = g; - buffer[(i * width + j) * 3 + 2] = b; - } - } - } - else { - - TRACE_ERROR("BMP_Decode: Input resolution not supported\n\r"); - TRACE_INFO("header->bits 0x%X \n\r", header->bits); - return 4; - } - - return 0; -} - -//------------------------------------------------------------------------------ -/// Convert RGB 565 to RGB 555 (RGB 555 is adapted to LCD) -/// \param fileSource Buffer which holds the RGB file -/// \param fileDestination Buffer in which to store the decoded image -/// \param width Buffer width in pixels. -/// \param height Buffer height in pixels. -/// \param bpp Number of bits per pixels that the buffer stores. -//------------------------------------------------------------------------------ -void RGB565toBGR555( - unsigned char *fileSource, - unsigned char *fileDestination, - unsigned int width, - unsigned int height, - unsigned char bpp) -{ - unsigned int i; - unsigned int j; - unsigned int row; - - for (i=0; i < height*(bpp/8); i++) { - row = (i*width*(bpp/8)); - for (j=0; j <= width*(bpp/8); j+=2) { - fileDestination[row+j] = ((fileSource[row+j+1]>>3)&0x1F) - | (fileSource[row+j]&0xE0); - fileDestination[row+j+1] = (fileSource[row+j+1]&0x03) - | ((fileSource[row+j]&0x1F)<<2); - } - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/bmp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/bmp.h deleted file mode 100644 index 81280b22..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/bmp.h +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !!!Purpose -/// -/// Utility for BMP -/// -//------------------------------------------------------------------------------ - -#ifndef BMP_H -#define BMP_H - -/// BMP magic number ('BM'). -#define BMP_TYPE 0x4D42 - -/// headerSize must be set to 40 -#define BITMAPINFOHEADER 40 - -//------------------------------------------------------------------------------ -// Exported types -//------------------------------------------------------------------------------ - -#ifdef __ICCARM__ // IAR -#pragma pack(1) // IAR -#define __attribute__(...) // IAR -#endif // IAR - -// BMP (Windows) Header Format -struct BMPHeader { - /// signature, must be 4D42 hex - unsigned short type; - /// size of BMP file in bytes (unreliable) - unsigned int fileSize; - /// reserved, must be zero - unsigned short reserved1; - /// reserved, must be zero - unsigned short reserved2; - /// offset to start of image data in bytes - unsigned int offset; - /// size of BITMAPINFOHEADER structure, must be 40 - unsigned int headerSize; - /// image width in pixels - unsigned int width; - /// image height in pixels - unsigned int height; - /// number of planes in the image, must be 1 - unsigned short planes; - /// number of bits per pixel (1, 4, 8, 16, 24, 32) - unsigned short bits; - /// compression type (0=none, 1=RLE-8, 2=RLE-4) - unsigned int compression; - /// size of image data in bytes (including padding) - unsigned int imageSize; - /// horizontal resolution in pixels per meter (unreliable) - unsigned int xresolution; - /// vertical resolution in pixels per meter (unreliable) - unsigned int yresolution; - /// number of colors in image, or zero - unsigned int ncolours; - /// number of important colors, or zero - unsigned int importantcolours; - -} __attribute__ ((packed)); // GCC - -#ifdef __ICCARM__ // IAR -#pragma pack() // IAR -#endif // IAR - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -extern unsigned char BMP_IsValid(void *file); - -extern unsigned int BMP_GetFileSize(void *file); - -extern unsigned char BMP_Decode( - void *file, - unsigned char *buffer, - unsigned int width, - unsigned int height, - unsigned char bpp); - -extern void WriteBMPheader(unsigned int* pAddressHeader, - unsigned int bmpHSize, - unsigned int bmpVSize, - unsigned char bmpRgb, - unsigned char nbByte_Pixels); - -extern void BMP_displayHeader(unsigned int* pAddressHeader); - -extern void RGB565toBGR555( - unsigned char *fileSource, - unsigned char *fileDestination, - unsigned int width, - unsigned int height, - unsigned char bpp); - - -#endif //#ifndef BMP_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/clock.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/clock.c deleted file mode 100644 index c298fb79..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/clock.c +++ /dev/null @@ -1,259 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "clock.h" -#include -#include - -//------------------------------------------------------------------------------ -// Internal types -//------------------------------------------------------------------------------ -int currentConfig = 0; // 0 have to be the default configuration - -//------------------------------------------------------------------------------ -/// Describes a possible clock configuration (processor clock & master clock), -/// including the necessary register values. -//------------------------------------------------------------------------------ -struct ClockConfiguration { - - /// Processor clock frequency (in MHz). - unsigned short pck; - /// Master clock frequency (in MHz). - unsigned short mck; - /// CKGR_PLL reqister value. - unsigned int pllr; - /// PMC_MCKR register value. - unsigned int mckr; -}; - -//------------------------------------------------------------------------------ -// Internal variables -//------------------------------------------------------------------------------ - -// Clock configurations for the AT91SAM9263-EK -#if defined(at91sam9263) - -#define AT91C_CKGR_PLLR AT91C_CKGR_PLLAR -#define AT91C_PMC_LOCK AT91C_PMC_LOCKA - -static const struct ClockConfiguration clockConfigurations[] = { - // PCK = 200 MHz, MCK = 100 MHz - {200, 100, 0x206DBF09, 0x00000102}, - // PCK = 240 MHz, MCK = 120 MHz - {240, 120, 0x202BC003, 0x00000102}, - // PCK = 120 MHz, MCK = 120 MHz - {120, 120, 0x20156003, 0x00000002}, - // PCK = 96 MHz, MCK = 48 MHz - {96, 48, 0x2057400F, 0x00000102}, - // PCK = 48 MHz, MCK = 48 MHz - {48, 48, 0x2057400F, 0x00000006} -}; - -// Clock configurations for the AT91SAM9G20-EK -#elif defined(at91sam9g20) - -#define AT91C_CKGR_PLLR AT91C_CKGR_PLLAR -#define AT91C_PMC_LOCK AT91C_PMC_LOCKA - -static const struct ClockConfiguration clockConfigurations[] = { - - // PCK = 400 MHz, MCK = 133 MHz - {400, 133, 0x202A0101, 0x00001302}, - // PCK = 200 MHz, MCK = 100 MHz - {200, 100, 0x202A3F01, 0x0000010A}, - // PCK = 96 MHz, MCK = 48 MHz - {96, 48, 0x207C3F03, 0x0000010E}, - // PCK = 48 MHz, MCK = 48 MHz - {48, 48, 0x207C3F03, 0x00000012} -}; - -// Clock configurations for the AT91SAM9XE-EK, AT91SAM9261-EK -#elif defined(at91sam9xe128) || \ - defined(at91sam9xe256) || \ - defined(at91sam9xe512) || \ - defined(at91sam9261) - -#define AT91C_CKGR_PLLR AT91C_CKGR_PLLAR -#define AT91C_PMC_LOCK AT91C_PMC_LOCKA - -static const struct ClockConfiguration clockConfigurations[] = { - - // PCK = 200 MHz, MCK = 100 MHz - {200, 100, 0x208CBF0D, 0x00000102}, - // PCK = 100 MHz, MCK = 100 MHz - {100, 100, 0x20273F07, 0x00000002}, - // PCK = 96 MHz, MCK = 48 MHz - {96, 48, 0x20483F0E, 0x00000102}, - // PCK = 48 MHz, MCK = 48 MHz - {48, 48, 0x20483F0E, 0x00000006} -}; - -// Clock configurations for the AT91SAM9RL64-EK, AT91CAP9-DK, AT91CAP9-STK -#elif defined(at91sam9rl64) || \ - defined(at91cap9) - -#define AT91C_CKGR_PLLR AT91C_CKGR_PLLAR -#define AT91C_PMC_LOCK AT91C_PMC_LOCKA - -static const struct ClockConfiguration clockConfigurations[] = { - - // PCK = 200 MHz, MCK = 100 MHz - {200, 100, 0x2031BF03, 0x00000102}, - // PCK = 100 MHz, MCK = 100 MHz - {100, 100, 0x20183F03, 0x00000002}, - // PCK = 96 MHz, MCK = 48 MHz - {96, 48, 0x20073F01, 0x00000102}, - // PCK = 48 MHz, MCK = 48 MHz - {48, 48, 0x20073F01, 0x00000006} -}; - -// Clock configuration for the AT91SAM7X-EK, AT91SAM7S-EK, AT91SAM7SE-EK -#elif defined(at91sam7x128) || defined(at91sam7x256) || defined(at91sam7x512) \ - || defined(at91sam7xc128) || defined(at91sam7xc256) || defined(at91sam7xc512) \ - || defined(at91sam7s16) || defined(at91sam7s161) || defined(at91sam7s32) \ - || defined(at91sam7s321) || defined(at91sam7s64) || defined(at91sam7s128) \ - || defined(at91sam7s256) || defined(at91sam7s512) || defined(at91sam7se32) \ - || defined(at91sam7se256) || defined(at91sam7se512) - -static const struct ClockConfiguration clockConfigurations[] = { - - // PCK = 55 MHz, MCK = 55 MHz - {55, 55, 0x006A3F12, 0x00000007}, - // PCK = 48 MHz, MCK = 48 MHz - {48, 48, 0x00483F0E, 0x00000007}, -}; - -// Clock configuration for the AT91SAM7A3 -#elif defined(at91sam7a3) - -static const struct ClockConfiguration clockConfigurations[] = { - - // PCK = 60 MHz, MCK = 60 MHz - {60, 60, 0x000C3F02, 0x00000007}, - // PCK = 48 MHz, MCK = 48 MHz - {48, 48, 0x00483F0E, 0x00000007} -}; - -// No clock configuration -#else - #error No clock configuration for this board. -#endif - -/// Number of available clock configurations -#define NB_CLOCK_CONFIGURATION (sizeof(clockConfigurations)/sizeof(clockConfigurations[0])) - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Sets the specified clock configuration. -/// \param configuration Index of the configuration to set. -//------------------------------------------------------------------------------ -void CLOCK_SetConfig(unsigned char configuration) -{ - printf("Setting clock configuration #%d ... ", configuration); - currentConfig = configuration; - - // Switch to main oscillator in two operations - PMC->PMC_MCKR = (PMC->PMC_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK; - while ((PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0); - - // Configure PLL - *AT91C_CKGR_PLLAR = clockConfigurations[configuration].pllr; - while ((PMC->PMC_SR & AT91C_PMC_LOCKA) == 0); - - // Configure master clock in two operations - PMC->PMC_MCKR = (clockConfigurations[configuration].mckr & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK; - while ((PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0); - PMC->PMC_MCKR = clockConfigurations[configuration].mckr; - while ((PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0); - - // DBGU reconfiguration - DBGU_Configure(DBGU_STANDARD, 115200, clockConfigurations[configuration].mck*1000000); - printf("done.\n\r"); -} - -//------------------------------------------------------------------------------ -/// Display the user menu on the DBGU. -//------------------------------------------------------------------------------ -void CLOCK_DisplayMenu(void) -{ - unsigned int i; - - printf("\n\rMenu Clock configuration:\n\r"); - for (i = 0; i < NB_CLOCK_CONFIGURATION; i++) { - - printf(" %d: Set PCK = %3d MHz, MCK = %3d MHz %s\n\r", - i, - clockConfigurations[i].pck, - clockConfigurations[i].mck, - (currentConfig==i)?"(curr)":""); - } -} - -//------------------------------------------------------------------------------ -/// Get the current MCK -//------------------------------------------------------------------------------ -unsigned short CLOCK_GetCurrMCK(void) -{ - return clockConfigurations[currentConfig].mck; -} - -//------------------------------------------------------------------------------ -/// Get the current PCK -//------------------------------------------------------------------------------ -unsigned short CLOCK_GetCurrPCK(void) -{ - return clockConfigurations[currentConfig].pck; -} - -//------------------------------------------------------------------------------ -/// Change clock configuration. -//------------------------------------------------------------------------------ -void CLOCK_UserChangeConfig(void) -{ - unsigned char key = 0; - - while (1) - { - CLOCK_DisplayMenu(); - key = DBGU_GetChar(); - - if ((key >= '0') && (key <= ('0' + NB_CLOCK_CONFIGURATION - 1))) - { - CLOCK_SetConfig(key - '0'); - break; - } - } -} \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/clock.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/clock.h deleted file mode 100644 index 54083008..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/clock.h +++ /dev/null @@ -1,47 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef CLOCK_H -#define CLOCK_H - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -extern void CLOCK_SetConfig(unsigned char configuration); - -extern void CLOCK_DisplayMenu(void); - -extern void CLOCK_UserChangeConfig(void); - -extern unsigned short CLOCK_GetCurrMCK(void); - -extern unsigned short CLOCK_GetCurrPCK(void); - -#endif //#ifndef FREQCONF_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/aes_hardware.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/aes_hardware.c deleted file mode 100644 index 1501afef..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/aes_hardware.c +++ /dev/null @@ -1,316 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Function: Firmware encryption using hardware acceleration -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ - -#include "aes_hardware.h" - -#if defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_HARD) -#include -#include -#include -#include -#include -#include -#include - -//------------------------------------------------------------------------------ -// Inline functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Converts an ASCII value to an hexadecimal one -/// \param ASCII string -/// \param Buffer to store integer value -/// \param Length of string -//------------------------------------------------------------------------------ -static inline void ASCII2Hex(const unsigned char * ascii, - unsigned char * binary, - unsigned int length) -{ - unsigned int i; - - for (i=0; i < length; i++) { - if (ascii[i*2] >= 'A') { - binary[i] = ascii[i*2] - 'A' + 10; - } - else { - binary[i] = ascii[i*2] - '0'; - } - binary[i] <<= 4; - if (ascii[i*2+1] >= 'A') { - binary[i] += ascii[i*2+1] - 'A' + 10; - } - else { - binary[i] += ascii[i*2+1] - '0'; - } - } -} - -//------------------------------------------------------------------------------ -// Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Initializes the AES peripheral -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -void aes_hard_init(void) -{ - unsigned char key[16]; - -#if defined(ENCRYPTION_CTR) || defined(ENCRYPTION_CBC) - unsigned char IV[16]; -#endif - - TRACE_DEBUG("AES/HARD: Initializing ...\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode -#if defined(ENCRYPTION_ECB) - //AES_Configure(AT91C_AES_CIPHER, AT91C_AES_SMOD_PDC, AT91C_AES_OPMOD_ECB); - - AT91C_BASE_AES->AES_MR = AT91C_AES_SMOD_PDC | AT91C_AES_OPMOD_ECB; -#elif defined(ENCRYPTION_CBC) - AT91C_BASE_AES->AES_MR = AT91C_AES_SMOD_PDC | AT91C_AES_OPMOD_CBC; -#elif defined(ENCRYPTION_CTR) - AT91C_BASE_AES->AES_MR = AT91C_AES_SMOD_PDC | AT91C_AES_OPMOD_CTR; -#endif - - // Convert and load key - ASCII2Hex((unsigned char*)ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - AES_SetKey((unsigned int*)key); - - // Convert and load IV -#if defined(ENCRYPTION_CTR) || defined(ENCRYPTION_CBC) - ASCII2Hex((unsigned char*)ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - AES_SetVector((unsigned int*)IV); -#endif - - TRACE_DEBUG("AES/HARD: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the AES peripheral for CBC mode -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -#if defined(ENCRYPTION_CBC) -void aes_hard_init_CBC(void) -{ - unsigned char key[16]; - unsigned char IV[16]; - - TRACE_DEBUG("aes_hard_init_CBC\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode - AT91C_BASE_AES->AES_MR = AT91C_AES_SMOD_PDC | AT91C_AES_OPMOD_CBC; - - // Convert and load key - ASCII2Hex((unsigned char*)ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - AES_SetKey((unsigned int*)key); - - // Convert and load IV - ASCII2Hex((unsigned char*)ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - AES_SetVector((unsigned int*)IV); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the AES peripheral for CTR mode -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -void aes_hard_init_CTR(void) -{ - unsigned char key[16]; - unsigned char IV[16]; - - TRACE_DEBUG("aes_hard_init_CTR\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode - AT91C_BASE_AES->AES_MR = AT91C_AES_SMOD_PDC | AT91C_AES_OPMOD_CTR; - - // Convert and load key - ASCII2Hex((unsigned char*)ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - AES_SetKey((unsigned int*)key); - - // Convert and load IV - ASCII2Hex((unsigned char*)ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - AES_SetVector((unsigned int*)IV); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the AES peripheral for ECB mode -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -void aes_hard_init_ECB(void) -{ - unsigned char key[16]; - - TRACE_DEBUG("aes_hard_init_ECB\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode - //AES_Configure(AT91C_AES_CIPHER, AT91C_AES_SMOD_MANUAL, AT91C_AES_OPMOD_ECB); - AT91C_BASE_AES->AES_MR = AT91C_AES_SMOD_PDC | AT91C_AES_OPMOD_ECB; - - // Convert and load key - ASCII2Hex((unsigned char*)ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - AES_SetKey((unsigned int*)key); -} -#endif -#endif // ONLY_ONE_ENCRYPTION - -//------------------------------------------------------------------------------ -/// Cleans up the AES peripheral -//------------------------------------------------------------------------------ -void aes_hard_cleanup(void) -{ - TRACE_DEBUG("AES/HARD: Cleaning up ...\n\r"); - - AT91C_BASE_AES->AES_MR = 0; - -#ifdef AT91C_ID_AES - PMC_DisablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_DisablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_DisablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Close PDC - AT91C_BASE_PDC_AES->PDC_PTCR = AT91C_PDC_RXTDIS; - AT91C_BASE_PDC_AES->PDC_PTCR = AT91C_PDC_TXTDIS; - - // Reset all Counter register Next buffer first - AT91C_BASE_PDC_AES->PDC_TNPR = 0; - AT91C_BASE_PDC_AES->PDC_TNCR = 0; - AT91C_BASE_PDC_AES->PDC_RPR = 0; - AT91C_BASE_PDC_AES->PDC_RCR = 0; - AT91C_BASE_PDC_AES->PDC_TPR = 0; - AT91C_BASE_PDC_AES->PDC_TCR = 0; - AT91C_BASE_PDC_AES->PDC_RPR = 0; - AT91C_BASE_PDC_AES->PDC_RCR = 0; - - TRACE_DEBUG("AES/HARD: Cleanup done.\n\r"); -} - -//------------------------------------------------------------------------------ -/// Decrypts a variable-length cipher text -/// \param pCipherText text to decrypt -/// \param pPlainText to store plain text -/// \param length of cipher text (in bytes) -/// \return: 1 if ok, 0 if error -//------------------------------------------------------------------------------ -int aes_hard_decrypt(const unsigned char *pCipherText, - unsigned char *pPlainText, - unsigned int length) -{ - TRACE_DEBUG("aes_hard_decrypt\n\r"); - - // Check parameters - if ((pCipherText == NULL) || (pPlainText == NULL)) { - return 0; - } - - // Set source and destination buffers in PDC - AT91C_BASE_PDC_AES->PDC_TPR = (unsigned int) pCipherText; - AT91C_BASE_PDC_AES->PDC_RPR = (unsigned int) pPlainText; - - AT91C_BASE_PDC_AES->PDC_TCR = length >> 2; - AT91C_BASE_PDC_AES->PDC_RCR = length >> 2; - - // Start decryption and wait - AT91C_BASE_PDC_AES->PDC_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN; - while (((AES_GetStatus()) & AT91C_AES_ENDRX) == 0); - - return 1; -} - -#endif // defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_HARD) - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/aes_hardware.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/aes_hardware.h deleted file mode 100644 index 62f38a7f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/aes_hardware.h +++ /dev/null @@ -1,100 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Firmware encryption using AES hardware acceleration -/// This code is based on the AES reference implementation published by Paulo -/// Barreto and Vincent Rijmen. -/// -/// !Usage -/// -/// -# aes_hard_init: Initialize AES hardware -/// -# aes_hard_init_CBC: for the CBC mode -/// -# aes_hard_init_CTR: for the CTR mode -/// -# aes_hard_init_ECB: for the ECB mode -/// -# aes_hard_cleanup: Cleans up AES -/// -# aes_hard_decrypt: Decrypts a variable-length cipher text -//------------------------------------------------------------------------------ - -#ifndef BOOTLOADER_AES_HARDWARE_H -#define BOOTLOADER_AES_HARDWARE_H - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ -#include "config.h" - -#if defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_HARD) - -//------------------------------------------------------------------------------ -// Check configuration -//------------------------------------------------------------------------------ -#if (ENCRYPTION_KEY_LENGTH != 16) - #error Hardware AES acceleration only supports 128 bits keys. -#endif - -#if (ENCRYPTION_BLOCK_LENGTH != 16) - #error Hardware AES acceleration only supports 128 bits blocks. -#endif - -#if !defined(ENCRYPTION_ECB) && \ - !defined(ENCRYPTION_CBC) && \ - !defined(ENCRYPTION_CTR) - #error Only ECB, CBC & CTR modes are supported. -#endif - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -#define ENCRYPTION_INIT aes_hard_init -#define ENCRYPTION_CLEANUP aes_hard_cleanup -#define ENCRYPTION_DECRYPT aes_hard_decrypt -#endif - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ -extern void aes_hard_init(void); -#ifndef ONLY_ONE_ENCRYPTION -extern void aes_hard_init_CBC(void); -extern void aes_hard_init_CTR(void); -extern void aes_hard_init_ECB(void); -#endif -extern void aes_hard_cleanup(void); -extern int aes_hard_decrypt(const unsigned char *, unsigned char *, unsigned int); - -#endif // defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_HARD) -#endif // BOOTLOADER_AES_HARDWARE_H - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/aes_reference.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/aes_reference.c deleted file mode 100644 index a94844ab..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/aes_reference.c +++ /dev/null @@ -1,801 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Firmware encryption using AES reference implementation -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ -#include "aes_reference.h" - -#if defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_REF) -#include -#include -#include -#include -#include -#include - -//------------------------------------------------------------------------------ -// Global variables -//------------------------------------------------------------------------------ -#define word8 static unsigned char -#define word32 static unsigned int - -#include "boxes-ref.dat" - -static unsigned char shifts[3][2][4] = { - {{0,1,2,3}, {0,3,2,1}}, - {{0,1,2,3}, {0,5,4,3}}, - {{0,7,5,5}, {0,1,3,4}} -}; - -static unsigned char key[KC][4]; -static unsigned char expandedKey[ROUNDS+1][BC][4]; -static unsigned int T0[256], T1[256], T2[256], T3[256], TF[256]; - -#if defined(ENCRYPTION_CBC) || defined(ENCRYPTION_CTR) -static unsigned char IV[BC][4]; -#endif - -//------------------------------------------------------------------------------ -// Inline functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Multiply two elements of GF(2^m) needed for MixColumn and InvMixColumn -/// \param a first element -/// \param b second element -/// \return result of operation -//------------------------------------------------------------------------------ -static unsigned char mul(unsigned char a, unsigned char b) -{ - if (a && b) { - return Alogtable[(Logtable[a] + Logtable[b])%255]; - } - else { - return 0; - } -} - -//------------------------------------------------------------------------------ -/// Returns the minimum between two numbers -/// \param First number -/// \param Second number -/// \return Minimum between the two operands -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -static unsigned int min(unsigned int number1, unsigned int number2) -{ - if (number1 > number2) { - return number2; - } - else { - return number1; - } -} -#endif - -//------------------------------------------------------------------------------ -/// XOR text and round key together -/// \param Plain text -/// \param Round key -//------------------------------------------------------------------------------ -static inline void addRoundKey(unsigned char a[BC][4], const unsigned char rk[BC][4]) -{ - unsigned int i; - - for (i=0; i < BC; i++) { - ((int *) a)[i] ^= ((int *) rk)[i]; - } -} - -//------------------------------------------------------------------------------ -/// Performs the AES key schedule -/// \param Key to use -/// \param Buffer to store expanded key schedule -//------------------------------------------------------------------------------ -static inline void keySchedule(unsigned char k[KC][4], unsigned char W[ROUNDS+1][BC][4]) -{ - int t; - int rconpointer = 0; - unsigned int j; - unsigned char tk[KC][4]; - - for(j=0; j < KC; j++) { - ((int *) tk)[j] = ((int *) k)[j]; - } - - t = 0; - /* copy values into round key array */ - for(j=0; (j < KC) && (t < (ROUNDS+1)*BC); j++, t++) { - ((int *) W[t / BC])[t%BC] = ((int *) tk)[j]; - } - - while (t < (ROUNDS+1)*BC) { - - tk[0][0] ^= S[tk[KC-1][1]] ^ rcon[rconpointer++]; - tk[0][1] ^= S[tk[KC-1][2]]; - tk[0][2] ^= S[tk[KC-1][3]]; - tk[0][3] ^= S[tk[KC-1][0]]; - - if (KC != 8) { - for(j=1; j < KC; j++) { - ((int *) tk)[j] ^= ((int *) tk)[j-1]; - } - } - else { - for(j=1; j < KC/2; j++) { - ((int *) tk)[j] ^= ((int *) tk)[j-1]; - } - tk[KC/2][0] ^= S[tk[KC/2 - 1][0]]; - tk[KC/2][1] ^= S[tk[KC/2 - 1][1]]; - tk[KC/2][2] ^= S[tk[KC/2 - 1][2]]; - tk[KC/2][3] ^= S[tk[KC/2 - 1][3]]; - - for(j=KC/2+1; j < KC; j++) { - ((int *) tk)[j] ^= ((int *) tk)[j-1]; - } - } - - // copy values into round key array - for(j=0; (j < KC) && (t < (ROUNDS+1)*BC); j++, t++) { - ((int *) W[t/BC])[t%BC] = ((int *) tk)[j]; - } - } -} - -//------------------------------------------------------------------------------ -/// Performs the AES inverse key schedule -/// \param Key to use -/// \param Buffer to store expanded key schedule -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) || defined(ENCRYPTION_CBC) -static inline void invKeySchedule(unsigned char k[KC][4], - unsigned char W[ROUNDS+1][BC][4]) -{ - unsigned int r; - unsigned int j; - unsigned char tmp[4]; - - // Expand key normally - keySchedule(k, W); - - // Apply invMixColumns to all rounds except first and last one - for (r=1; r < ROUNDS; r++) { - for (j=0; j < BC; j++) { - tmp[0] = mul(0x0E, W[r][j][0]) ^ mul(0x0B, W[r][j][1]) ^ - mul(0x0D, W[r][j][2]) ^ mul(0x09, W[r][j][3]); - tmp[1] = mul(0x0E, W[r][j][1]) ^ mul(0x0B, W[r][j][2]) ^ - mul(0x0D, W[r][j][3]) ^ mul(0x09, W[r][j][0]); - tmp[2] = mul(0x0E, W[r][j][2]) ^ mul(0x0B, W[r][j][3]) ^ - mul(0x0D, W[r][j][0]) ^ mul(0x09, W[r][j][1]); - tmp[3] = mul(0x0E, W[r][j][3]) ^ mul(0x0B, W[r][j][0]) ^ - mul(0x0D, W[r][j][1]) ^ mul(0x09, W[r][j][2]); - W[r][j][0] = tmp[0]; - W[r][j][1] = tmp[1]; - W[r][j][2] = tmp[2]; - W[r][j][3] = tmp[3]; - } - } -} -#endif - -//------------------------------------------------------------------------------ -/// Perform the RotBytes operation needed by the AES cipher -/// \param input to rotate -/// \return Rotated word -//------------------------------------------------------------------------------ -static inline unsigned int rotBytes(unsigned int input) -{ - return ((input << 8) | (input >> 24)); -} - -//------------------------------------------------------------------------------ -/// Generates the lookup tables needed for encryption -/// \param Pointer to t0 -/// \param Pointer to t1 -/// \param Pointer to t2 -/// \param Pointer to t3 -/// \param Pointer to tf -/// \param Box -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -static inline void generateEncryptionLUTs(unsigned int * t0, - unsigned int * t1, - unsigned int * t2, - unsigned int * t3, - unsigned int * tf, - unsigned char box[256]) -{ - unsigned int a; - - for (a=0; a <= 255; a++) { - // Calc t0 - t0[a] = (mul(2, box[a])) | - (box[a] << 8) | - (box[a] << 16) | - (mul(3, box[a]) << 24); - - // Calc t1, t2, t3 - t1[a] = rotBytes(t0[a]); - t2[a] = rotBytes(t1[a]); - t3[a] = rotBytes(t2[a]); - - // Calc tf - tf[a] = box[a] | (box[a] << 8) | (box[a] << 16) | (box[a] << 24); - } -} -#endif - -//------------------------------------------------------------------------------ -/// Generates the lookup tables needed for decryption -/// \param Pointer to t0 -/// \param Pointer to t1 -/// \param Pointer to t2 -/// \param Pointer to t3 -/// \param Pointer to tf -/// \param Box -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) || defined(ENCRYPTION_CBC) -static inline void generateDecryptionLUTs(unsigned int * t0, - unsigned int * t1, - unsigned int * t2, - unsigned int * t3, - unsigned int * tf, - unsigned char box[256]) -{ - unsigned int a; - - for (a=0; a <= 255; a++) { - - // Calc t0 - t0[a] = (mul(0x0E, box[a])) | - (mul(0x09, box[a]) << 8) | - (mul(0x0D, box[a]) << 16) | - (mul(0x0B, box[a]) << 24); - - // Calc t1, t2, t3 - t1[a] = rotBytes(t0[a]); - t2[a] = rotBytes(t1[a]); - t3[a] = rotBytes(t2[a]); - - // Calc tf - tf[a] = box[a] | (box[a] << 8) | (box[a] << 16) | (box[a] << 24); - } -} -#endif - -//------------------------------------------------------------------------------ -/// Copies a block to a buffer -/// \param Block to copy -/// \param Buffer to store copy -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -static void copyBlock(unsigned char input[BC][4], unsigned char output[BC][4]) -{ - unsigned int j; - - for (j=0; j < BC; j++) { - ((int *) output)[j] = ((int *) input)[j]; - } -} -#endif - -//------------------------------------------------------------------------------ -/// Encrypts a block of plain text using precalculated LUTs -/// \param Block of plain text to encrypt -/// \param Expanded key -/// \param Pointer to t0 -/// \param Pointer to t1 -/// \param Pointer to t2 -/// \param Pointer to t3 -/// \param Pointer to tf -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -static inline void encrypt(unsigned char a[BC][4], - const unsigned char rk[ROUNDS+1][BC][4], - unsigned int * t0, - unsigned int * t1, - unsigned int * t2, - unsigned int * t3, - unsigned int * tf) -{ - unsigned char b[BC][4]; - unsigned int r; - unsigned int j; - - // First key addition - addRoundKey(a, rk[0]); - - // ROUNDS-1 ordinary rounds - for(r=1; r < ROUNDS; r++) { - for (j=0; j < BC; j++) { - - ((int *) b)[j] = t0[a[j][0]] ^ - t1[a[(j+shifts[SC][0][1])%BC][1]] ^ - t2[a[(j+shifts[SC][0][2])%BC][2]] ^ - t3[a[(j+shifts[SC][0][3])%BC][3]] ^ - ((int *) rk[r])[j]; - } - if ((++r) == ROUNDS) { - break; - } - for (j=0; j < BC; j++) { - ((int *) a)[j] = t0[b[j][0]] ^ - t1[b[(j+shifts[SC][0][1])%BC][1]] ^ - t2[b[(j+shifts[SC][0][2])%BC][2]] ^ - t3[b[(j+shifts[SC][0][3])%BC][3]] ^ - ((int *) rk[r])[j]; - } - } - - // Last round (no MixColumns) - for (j=0; j < BC; j++) { - ((int *) a)[j] = (t0f[b[j][0]]) ^ - (t1f[b[(j+shifts[SC][0][1])%BC][1]]) ^ - (t2f[b[(j+shifts[SC][0][2])%BC][2]]) ^ - (t3f[b[(j+shifts[SC][0][3])%BC][3]]) ^ - ((int *) rk[ROUNDS])[j]; - } -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a block of plain text using precalculated LUTs -/// \param Block of cipher text to decrypt -/// \param Expanded key -/// \param Pointer to t0 -/// \param Pointer to t1 -/// \param Pointer to t2 -/// \param Pointer to t3 -/// \param Pointer to tf -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) || defined(ENCRYPTION_CBC) -static inline void decrypt(unsigned char a[BC][4], - const unsigned char rk[ROUNDS+1][BC][4], - unsigned int * t0, - unsigned int * t1, - unsigned int * t2, - unsigned int * t3, - unsigned int * tf) -{ - unsigned char b[BC][4]; - unsigned int r; - unsigned int j; - - // First key addition - addRoundKey(a, rk[ROUNDS]); - - // ROUNDS-1 ordinary rounds - for(r=ROUNDS-1; r > 0; r--) { - for (j=0; j < BC; j++) { - ((int *) b)[j] = t0[a[j][0]] ^ - t1[a[(j+shifts[SC][1][1])%BC][1]] ^ - t2[a[(j+shifts[SC][1][2])%BC][2]] ^ - t3[a[(j+shifts[SC][1][3])%BC][3]] ^ - ((int *) rk[r])[j]; - } - if ((--r) == 0) { - break; - } - for (j=0; j < BC; j++) { - ((int *) a)[j] = t0[b[j][0]] ^ - t1[b[(j+shifts[SC][1][1])%BC][1]] ^ - t2[b[(j+shifts[SC][1][2])%BC][2]] ^ - t3[b[(j+shifts[SC][1][3])%BC][3]] ^ - ((int *) rk[r])[j]; - } - } - // Last round (no MixColumns) - for (j=0; j < BC; j++) { - ((int *) a)[j] = (t0f[b[j][0]]) ^ - (t1f[b[(j+shifts[SC][1][1])%BC][1]]) ^ - (t2f[b[(j+shifts[SC][1][2])%BC][2]]) ^ - (t3f[b[(j+shifts[SC][1][3])%BC][3]]) ^ - ((int *) rk[0])[j]; - } -} -#endif - -//------------------------------------------------------------------------------ -/// Converts an ASCII hexadecimal representation to a raw binary one -/// \param ASCII value -/// \param Buffer to store binary value -/// \param Size of value -//------------------------------------------------------------------------------ -static void ASCII2RawHex(const unsigned char * ascii, - unsigned char * binary, - unsigned int length) -{ - unsigned char * ptr; - unsigned int i; - - ptr = (unsigned char *) binary; - for (i=0; i < length; i++, ptr++, ascii++) { - if (*ascii >= 'A') { - *ptr = *ascii - 'A' + 10; - } - else { - *ptr = *ascii - '0'; - } - *ptr <<= 4; - ascii++; - if (*ascii >= 'A') { - *ptr += *ascii - 'A' + 10; - } - else { - *ptr += *ascii - '0'; - } - } -} - -//------------------------------------------------------------------------------ -/// Decrypts a cipher text using ECB mode -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text -/// \param Expanded key to use -/// \return 0 if successful, 0 otherwise -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -static unsigned int ecb_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length, - unsigned char expandedKey[ROUNDS+1][BC][4]) -{ - unsigned char block[BC][4]; - unsigned int i; - unsigned int l; - - // Check input parameters - if ((cipherText == NULL) || (plainText == NULL) || (expandedKey == NULL)) { - TRACE_DEBUG("AES/REF: NULL parameter(s).\n\r"); - return 0; - } - if (length%ENCRYPTION_BLOCK_LENGTH != 0) { - TRACE_DEBUG("AES/REF: Data length must be a multiple of the cipher block size.\n\r"); - return 0; - } - // ECB decryption - for (l=0; l < length;) { - // Copy cipher text block, decrypt it and copy result - for (i=0; i < ENCRYPTION_BLOCK_LENGTH; i++) { - ((char *) block)[i] = cipherText[l+i]; - } - decrypt(block, expandedKey, T0, T1, T2, T3, TF); - for (i=0; i < ENCRYPTION_BLOCK_LENGTH; i++) { - plainText[l+i] = ((char *) block)[i]; - } - l += ENCRYPTION_BLOCK_LENGTH; - } - - return 1; -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a cipher text using CBC mode -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -/// \param Expanded key to use -/// \param Initialization vector to use -/// \return 1 if successful, 0 otherwise */ -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CBC) -static unsigned int cbc_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length, - const unsigned char expandedKey[ROUNDS+1][BC][4], - unsigned char IV[BC][4]) -{ - unsigned char block[BC][4]; - unsigned int i; - unsigned int l; - - // Check input parameters - if ((cipherText == NULL) || (plainText == NULL)) { - TRACE_DEBUG("AES/REF: NULL parameter(s).\n\r"); - return 0; - } - if (length%ENCRYPTION_BLOCK_LENGTH != 0) { - TRACE_DEBUG("AES/REF: Cipher text length must be a multiple of the cipher block length.\n\r"); - return 0; - } - // Decrypt data - for (l=0; l < length;) { - // Copy and decrypt a block of cipher text - for (i=0; i < BC; i++) { - ((int *) block)[i] = ((int *) &cipherText[l])[i]; - } - decrypt(block, expandedKey, T0, T1, T2, T3, TF); - // Xor decrypted text & IV, copy new IV - for (i=0; i < BC; i++) { - unsigned int tmp = ((int *) block)[i] ^ ((int *) IV)[i]; - ((int *) IV)[i] = ((int *) &cipherText[l])[i]; - ((int *) &plainText[l])[i] = tmp; - } - - // Loop progression - l += ENCRYPTION_BLOCK_LENGTH; - } - return 1; -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a cipher text using CTR mode -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text -/// \param Expanded key to use -/// \param Initialization vector to use -/// \return 1 if successful, 0 otherwise -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -static unsigned int ctr_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length, - const unsigned char expandedKey[ROUNDS+1][BC][4], - unsigned char IV[BC][4]) -{ - unsigned char block[BC][4]; - unsigned int bytes; - unsigned int i; - unsigned int l; - int k; - - // Check input parameters - if ((cipherText == NULL) || (plainText == NULL)) { - return 0; - } - for (l=0; l < length;) { - // Copy counter and encrypt it - copyBlock(IV, block); - encrypt(block, expandedKey, T0, T1, T2, T3, TF); - - // XOR current plain text block with encrypted counter - bytes = min(length - l, ENCRYPTION_BLOCK_LENGTH); - - for (i=0; i < bytes; i++) { - plainText[l+i] = cipherText[l+i] ^ ((char *) block)[i]; - } - // Increment counter (big-endian) and number of encrypted bytes - for (k=ENCRYPTION_BLOCK_LENGTH-1; k >= 0; k--) { - if (++((char *) IV)[k] != 0) { - break; - } - } - l += bytes; - } - return 1; -} -#endif - -//------------------------------------------------------------------------------ -// Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Initializes the AES algorithm -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -void aes_ref_init(void) -{ - TRACE_DEBUG("AES/REF: Initializing ...\n\r"); - - ASCII2RawHex((unsigned char*)ENCRYPTION_KEY, (unsigned char*)key, ENCRYPTION_KEY_LENGTH); - -#if defined(ENCRYPTION_ECB) || defined(ENCRYPTION_CBC) - - // Initialize key schedule - invKeySchedule(key, expandedKey); - - // Generate lookup tables - generateDecryptionLUTs(T0, T1, T2, T3, TF, Si); - -#elif defined(ENCRYPTION_CTR) - - // Initialize key schedule - keySchedule(key, expandedKey); - - // Generate lookup tables - generateEncryptionLUTs(T0, T1, T2, T3, TF, S); -#endif - -#if defined(ENCRYPTION_CBC) || defined(ENCRYPTION_CTR) - // Initialize counter - ASCII2RawHex((unsigned char*)ENCRYPTION_IV, (unsigned char*)IV, ENCRYPTION_BLOCK_LENGTH); -#endif - - TRACE_DEBUG("AES/REF: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the AES algorithm mode CBC -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -#if defined(ENCRYPTION_CBC) -void aes_ref_init_CBC(void) -{ - TRACE_DEBUG("aes_ref_init_CBC\n\r"); - - ASCII2RawHex((unsigned char*)ENCRYPTION_KEY, (unsigned char*)key, ENCRYPTION_KEY_LENGTH); - - // Initialize key schedule - invKeySchedule(key, expandedKey); - - // Generate lookup tables - generateDecryptionLUTs(T0, T1, T2, T3, TF, Si); - - // Initialize counter - ASCII2RawHex((unsigned char*)ENCRYPTION_IV, (unsigned char*)IV, ENCRYPTION_BLOCK_LENGTH); - - TRACE_DEBUG("AES/REF: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the AES algorithm mode ECB -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -void aes_ref_init_ECB(void) -{ - TRACE_DEBUG("aes_ref_init_ECB\n\r"); - - ASCII2RawHex((unsigned char*)ENCRYPTION_KEY, (unsigned char*)key, ENCRYPTION_KEY_LENGTH); - - // Initialize key schedule - invKeySchedule(key, expandedKey); - - // Generate lookup tables - generateDecryptionLUTs(T0, T1, T2, T3, TF, Si); - - TRACE_DEBUG("AES/REF: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the AES algorithm mode CTR -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -void aes_ref_init_CTR(void) -{ - TRACE_DEBUG("aes_ref_init_CTR\n\r"); - - ASCII2RawHex((unsigned char*)ENCRYPTION_KEY, (unsigned char*)key, ENCRYPTION_KEY_LENGTH); - - // Initialize key schedule - keySchedule(key, expandedKey); - - // Generate lookup tables - generateEncryptionLUTs(T0, T1, T2, T3, TF, S); - - // Initialize counter - ASCII2RawHex((unsigned char*)ENCRYPTION_IV, (unsigned char*)IV, ENCRYPTION_BLOCK_LENGTH); - - TRACE_DEBUG("AES/REF: Initialization done.\n\r"); -} -#endif -#endif // ONLY_ONE_ENCRYPTION - -//------------------------------------------------------------------------------ -/// Cleanup the AES algorithm -//------------------------------------------------------------------------------ -void aes_ref_cleanup(void) -{ - TRACE_DEBUG("AES/REF: Cleaning up ...\n\r"); - TRACE_DEBUG("AES/REF: Cleanup done.\n\r"); -} - -//------------------------------------------------------------------------------ -/// Decrypt a cipher text of variable length -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -/// \return 1 if decryption was successful, 0 otherwise. -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -int aes_ref_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - TRACE_DEBUG("aes_ref_decrypt\n\r"); -#if defined(ENCRYPTION_ECB) - return ecb_decrypt(cipherText, plainText, length, expandedKey); -#elif defined(ENCRYPTION_CBC) - return cbc_decrypt(cipherText, plainText, length, expandedKey, IV);; -#elif defined(ENCRYPTION_CTR) - return ctr_decrypt(cipherText, plainText, length, expandedKey, IV); -#endif -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypt a cipher text of variable length, mode CBC -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -/// \return 1 if decryption was successful, 0 otherwise. -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -#if defined(ENCRYPTION_CBC) -int aes_ref_decrypt_CBC(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - TRACE_DEBUG("aes_ref_decrypt_CBC\n\r"); - return cbc_decrypt(cipherText, plainText, length, expandedKey, IV);; -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypt a cipher text of variable length, mode ECB -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -/// \return 1 if decryption was successful, 0 otherwise. -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -int aes_ref_decrypt_ECB(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - TRACE_DEBUG("aes_ref_decrypt_ECB\n\r"); - return ecb_decrypt(cipherText, plainText, length, expandedKey); -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypt a cipher text of variable length, mode CTR -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -/// \return 1 if decryption was successful, 0 otherwise. -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -int aes_ref_decrypt_CTR(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - TRACE_DEBUG("aes_ref_decrypt_CTR\n\r"); - return ctr_decrypt(cipherText, plainText, length, expandedKey, IV); -} -#endif - -#endif // ONLY_ONE_ENCRYPTION - -#endif // defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_REF) - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/aes_reference.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/aes_reference.h deleted file mode 100644 index a47907bd..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/aes_reference.h +++ /dev/null @@ -1,132 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Firmware encryption using AES reference implementation -/// -/// !Usage -/// -/// -# aes_ref_init: Initialize AES hardware -/// -# aes_ref_init_CBC: for the CBC mode -/// -# aes_ref_init_ECB: for the CTR mode -/// -# aes_ref_init_CTR: for the ECB mode -/// -# aes_ref_cleanup: Cleans up AES -/// -# aes_ref_decrypt: Decrypts a variable-length cipher text -/// -# aes_ref_decrypt_CBC: for CBC mode -/// -# aes_ref_decrypt_ECB: for ECB mode -/// -# aes_ref_decrypt_CTR: for CTR mode -//------------------------------------------------------------------------------ - -#ifndef BOOTLOADER_AES_REFERENCE_H -#define BOOTLOADER_AES_REFERENCE_H - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ -#include "config.h" - - -#if defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_REF) - -//------------------------------------------------------------------------------ -// Check configuration -//------------------------------------------------------------------------------ - -// Supported modes -#if !defined(ENCRYPTION_ECB) && \ - !defined(ENCRYPTION_CBC) && \ - !defined(ENCRYPTION_CTR) - #error No other mode than ECB, CBC & CTR are supported. -#endif - -// Supported key length -#if (ENCRYPTION_KEY_LENGTH != 16) && \ - (ENCRYPTION_KEY_LENGTH != 24) && \ - (ENCRYPTION_KEY_LENGTH != 32) - #error Only key lengths of 128, 192 or 256 bits are supported. -#endif - -// Supported block length -#if (ENCRYPTION_BLOCK_LENGTH != 16) - #error Only block length of 128 bits is supported. -#endif - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ -#define BC (ENCRYPTION_BLOCK_LENGTH / 4) -#define SC ((BC - 4) >> 1) -#define KC (ENCRYPTION_KEY_LENGTH / 4) -#define t0f 0x000000FF & tf -#define t1f 0x0000FF00 & tf -#define t2f 0x00FF0000 & tf -#define t3f 0xFF000000 & tf - -#if (KC >= BC) - #define ROUNDS (KC + 6) -#else - #define ROUNDS (BC + 6) -#endif - -#ifdef ONLY_ONE_ENCRYPTION -#define ENCRYPTION_INIT aes_ref_init -#define ENCRYPTION_CLEANUP aes_ref_cleanup -#define ENCRYPTION_DECRYPT aes_ref_decrypt -#endif - -//------------------------------------------------------------------------------ -// Prototypes -//------------------------------------------------------------------------------ -extern void aes_ref_init(void); -extern void aes_ref_init_CBC(void); -extern void aes_ref_init_ECB(void); -extern void aes_ref_init_CTR(void); -extern void aes_ref_cleanup(void); -extern int aes_ref_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); -extern int aes_ref_decrypt_CBC(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); -extern int aes_ref_decrypt_ECB(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); -extern int aes_ref_decrypt_CTR(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); - -#endif // defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_REF) - -#endif // BOOTLOADER_AES_REFERENCE_H - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/encryption.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/encryption.h deleted file mode 100644 index 8b285009..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/encryption.h +++ /dev/null @@ -1,98 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Firmware encryption -/// -/// !Usage -/// -/// This file must include the header of every encryption module implemented for -/// the bootloader. It is also responsible for defining mock functions if no -/// encryption module is selected, as well as checking that parameters are -/// correctly set. -// -/// An encryption module must define the following functions: -/// -# void encryption_init(void); -/// -# void encryption_cleanup(void); -/// -# int encryption_decrypt(const unsigned char *, unsigned char *, unsigned int) -//------------------------------------------------------------------------------ - -#ifndef BOOTLOADER_ENCRYPTION_H -#define BOOTLOADER_ENCRYPTION_H - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ -#include "config.h" - - -//------------------------------------------------------------------------------ -// Check configuration -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -#if !defined(ENCRYPTION_INIT) && !defined(USE_ENCRYPTION) - #define ENCRYPTION_INIT(); - #define ENCRYPTION_CLEANUP(); - #define ENCRYPTION_DECRYPT(...) 1 - -#elif !defined(ENCRYPTION_INIT) && defined(USE_ENCRYPTION) - #error USE_ENCRYPTION defined but no encryption method selected. - -#elif !defined(ENCRYPTION_AES_LTC) && \ - !defined(ENCRYPTION_AES_REF) && \ - !defined(ENCRYPTION_AES_HARD) && \ - !defined(ENCRYPTION_3DES_LTC) && \ - !defined(ENCRYPTION_3DES_HARD) - #error No algorithm selected. - -#elif !defined(ENCRYPTION_ECB) && \ - !defined(ENCRYPTION_CBC) && \ - !defined(ENCRYPTION_CTR) - #error No encryption mode selected. - -#elif !defined(ENCRYPTION_KEY) - #error No key defined. - -#elif !defined(ENCRYPTION_KEY_LENGTH) - #error No key length selected. - -#elif !defined(ENCRYPTION_IV) - #error No initialization vector defined. - -#elif !defined(ENCRYPTION_BLOCK_LENGTH) - #error No block length selected. - -#endif -#endif // ONLY_ONE_ENCRYPTION -#endif // BOOTLOADER_ENCRYPTION_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/libtomcrypt.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/libtomcrypt.c deleted file mode 100644 index c21b20c9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/libtomcrypt.c +++ /dev/null @@ -1,445 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Function: Firmware encryption using libTomCrypt -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ - -#include "libtomcrypt.h" -#include -#include -#include "config.h" - -#if defined(USE_ENCRYPTION) && (defined(ENCRYPTION_AES_LTC) || defined(ENCRYPTION_3DES_LTC)) -#include -#include -#include -#include -#include - -//------------------------------------------------------------------------------ -// Global variables -//------------------------------------------------------------------------------ - -#if defined(ENCRYPTION_ECB) - symmetric_ECB sECB; -#endif -#if defined(ENCRYPTION_CBC) - symmetric_CBC sCBC; -#endif -#if defined(ENCRYPTION_CTR) - symmetric_CTR sCTR; -#endif - -//------------------------------------------------------------------------------ -// Inline functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Converts an ASCII string to an hexadecimal value -/// \param ASCII string to convert -/// \param Buffer to store converted value -/// \param Length of buffer -//------------------------------------------------------------------------------ -static inline void ASCII2Hex(const char * ascii, unsigned char * binary, unsigned int length) -{ - unsigned int i; - - for (i=0; i < length; i++) { - if (ascii[i*2] >= 'A') { - binary[i] = ascii[i*2] - 'A' + 10; - } - else { - binary[i] = ascii[i*2] - '0'; - } - binary[i] <<= 4; - if (ascii[i*2+1] >= 'A') { - binary[i] += ascii[i*2+1] - 'A' + 10; - } - else { - binary[i] += ascii[i*2+1] - '0'; - } - } -} - -//------------------------------------------------------------------------------ -// Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Initializes the decryption process -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -void ltc_init(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - -#if defined(ENCRYPTION_CTR) || defined(ENCRYPTION_CBC) - unsigned char IV[ENCRYPTION_BLOCK_LENGTH]; -#endif - - TRACE_DEBUG("LTC: Initializing ...\n\r"); - - // Register cipher - register_cipher(&CIPHER_DESC); - cipherID = find_cipher(CIPHER_NAME); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - -#if defined(ENCRYPTION_CTR) || defined(ENCRYPTION_CBC) - // Load IV - ASCII2Hex(ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); -#endif - - // Start decryption mode -#if defined(ENCRYPTION_ECB) - ecb_start(cipherID, key, ENCRYPTION_KEY_LENGTH, 0, &sECB); -#elif defined(ENCRYPTION_CBC) - cbc_start(cipherID, IV, key, ENCRYPTION_KEY_LENGTH, 0, &sCBC); -#elif defined(ENCRYPTION_CTR) - ctr_start(cipherID, IV, key, ENCRYPTION_KEY_LENGTH, 0, CTR_COUNTER_BIG_ENDIAN, &sCTR); -#endif - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif // ONLY_ONE_ENCRYPTION - -//------------------------------------------------------------------------------ -/// Initializes the decryption process for AES, mode CBC -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -#if defined(ENCRYPTION_CBC) -void ltc_init_AES_CBC(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - unsigned char IV[ENCRYPTION_BLOCK_LENGTH]; - - TRACE_DEBUG("LTC: Initializing CBC...\n\r"); - - // Register cipher - register_cipher(&rijndael_desc); - cipherID = find_cipher("rijndael"); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - // Load IV - ASCII2Hex(ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - // Start decryption mode - cbc_start(cipherID, IV, key, ENCRYPTION_KEY_LENGTH, 0, &sCBC); - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the decryption process for AES, mode CTR -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -void ltc_init_AES_CTR(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - unsigned char IV[ENCRYPTION_BLOCK_LENGTH]; - - TRACE_DEBUG("LTC: Initializing CTR...\n\r"); - - // Register cipher - register_cipher(&rijndael_desc); - cipherID = find_cipher("rijndael"); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - // Load IV - ASCII2Hex(ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - // Start decryption mode - ctr_start(cipherID, IV, key, ENCRYPTION_KEY_LENGTH, 0, CTR_COUNTER_BIG_ENDIAN, &sCTR); - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the decryption process for AES, mode ECB -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -void ltc_init_AES_ECB(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - - TRACE_DEBUG("LTC: Initializing ECB...\n\r"); - - // Register cipher - register_cipher(&rijndael_desc); - cipherID = find_cipher("rijndael"); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - // Start decryption mode - ecb_start(cipherID, key, ENCRYPTION_KEY_LENGTH, 0, &sECB); - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the decryption process for 3DES, mode CBC -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CBC) -void ltc_init_3DES_CBC(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - unsigned char IV[ENCRYPTION_BLOCK_LENGTH]; - - TRACE_DEBUG("LTC: Initializing CBC...\n\r"); - - // Register cipher - register_cipher(&des3_desc); - cipherID = find_cipher("3des"); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - // Load IV - ASCII2Hex(ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - // Start decryption mode - cbc_start(cipherID, IV, key, ENCRYPTION_KEY_LENGTH, 0, &sCBC); - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the decryption process for 3DES, mode CTR -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -void ltc_init_3DES_CTR(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - unsigned char IV[ENCRYPTION_BLOCK_LENGTH]; - - TRACE_DEBUG("LTC: Initializing CTR...\n\r"); - - // Register cipher - register_cipher(&des3_desc); - cipherID = find_cipher("3des"); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - // Load IV - ASCII2Hex(ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - // Start decryption mode - ctr_start(cipherID, IV, key, ENCRYPTION_KEY_LENGTH, 0, CTR_COUNTER_BIG_ENDIAN, &sCTR); - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the decryption process for 3DES, mode ECB -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -void ltc_init_3DES_ECB(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - - TRACE_DEBUG("LTC: Initializing ECB...\n\r"); - - // Register cipher - register_cipher(&des3_desc); - cipherID = find_cipher("3des"); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - // Start decryption mode - ecb_start(cipherID, key, ENCRYPTION_KEY_LENGTH, 0, &sECB); - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif -#endif // ONLY_ONE_ENCRYPTION - - -//------------------------------------------------------------------------------ -/// Terminates the decryption process -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -void ltc_cleanup(void) -{ - TRACE_DEBUG("LTC: Cleaning up ...\n\r"); - -#if defined(ENCRYPTION_ECB) - ecb_done(&sECB); -#elif defined(ENCRYPTION_CBC) - cbc_done(&sCBC); -#elif defined(ENCRYPTION_CTR) - ctr_done(&sCTR); -#endif - - TRACE_DEBUG("LTC: Cleanup done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Terminates the decryption process for mode CBC -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -#if defined(ENCRYPTION_CBC) -void ltc_cleanup_CBC(void) -{ - TRACE_DEBUG("LTC: Cleaning up CBC...\n\r"); - cbc_done(&sCBC); - TRACE_DEBUG("LTC: Cleanup done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Terminates the decryption process for mode CTR -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -void ltc_cleanup_CTR(void) -{ - TRACE_DEBUG("LTC: Cleaning up CTR...\n\r"); - ctr_done(&sCTR); - TRACE_DEBUG("LTC: Cleanup done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Terminates the decryption process for mode ECB -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -void ltc_cleanup_ECB(void) -{ - TRACE_DEBUG("LTC: Cleaning up ECB...\n\r"); - ecb_done(&sECB); - TRACE_DEBUG("LTC: Cleanup done.\n\r"); -} -#endif -#endif // ONLY_ONE_ENCRYPTION - -//------------------------------------------------------------------------------ -/// Decrypts a block of data -/// \param Data to decrypt -/// \param Buffer to store decrypted data -/// \param Length of data -/// \return 1 if successful, 0 otherwise. -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -int ltc_decrypt(const unsigned char * cipherText, unsigned char * plainText, unsigned int length) -{ -#if defined(ENCRYPTION_ECB) - if (ecb_decrypt(cipherText, plainText, length, &sECB) != CRYPT_OK) { -#elif defined(ENCRYPTION_CBC) - if (cbc_decrypt(cipherText, plainText, length, &sCBC) != CRYPT_OK) { -#elif defined(ENCRYPTION_CTR) - if (ctr_decrypt(cipherText, plainText, length, &sCTR) != CRYPT_OK) { -#endif - return 0; - } - else { - return 1; - } -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a block of data in CBC mode -/// \param Data to decrypt -/// \param Buffer to store decrypted data -/// \param Length of data -/// \return 1 if successful, 0 otherwise. -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -int ltc_decrypt_CBC(const unsigned char * cipherText, unsigned char * plainText, unsigned int length) -{ - if (cbc_decrypt(cipherText, plainText, length, &sCBC) != CRYPT_OK) { - return 0; - } - else { - return 1; - } -} - -//------------------------------------------------------------------------------ -/// Decrypts a block of data in CTR mode -/// \param Data to decrypt -/// \param Buffer to store decrypted data -/// \param Length of data -/// \return 1 if successful, 0 otherwise. -//------------------------------------------------------------------------------ -int ltc_decrypt_CTR(const unsigned char * cipherText, unsigned char * plainText, unsigned int length) -{ - if (ctr_decrypt(cipherText, plainText, length, &sCTR) != CRYPT_OK) { - return 0; - } - else { - return 1; - } -} - -//------------------------------------------------------------------------------ -/// Decrypts a block of data in ECB mode -/// \param Data to decrypt -/// \param Buffer to store decrypted data -/// \param Length of data -/// \return 1 if successful, 0 otherwise. -//------------------------------------------------------------------------------ -int ltc_decrypt_ECB(const unsigned char * cipherText, unsigned char * plainText, unsigned int length) -{ - if (ecb_decrypt(cipherText, plainText, length, &sECB) != CRYPT_OK) { - return 0; - } - else { - return 1; - } -} -#endif // ONLY_ONE_ENCRYPTION - -#endif // defined(USE_ENCRYPTION) && (defined(ENCRYPTION_AES_LTC) || defined(ENCRYPTION_3DES_LTC)) - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/libtomcrypt.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/libtomcrypt.h deleted file mode 100644 index 317b79f2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/libtomcrypt.h +++ /dev/null @@ -1,149 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Firmware encryption using libTomCrypt -/// -/// !Usage -/// -/// -# ltc_init: Initialize LibTomCrypt -/// -# ltc_init_AES_CBC -/// -# ltc_init_AES_CTR -/// -# ltc_init_AES_ECB -/// -# ltc_init_3DES_CBC -/// -# ltc_init_3DES_CTR -/// -# ltc_init_3DES_ECB -/// -# ltc_cleanup -/// -# ltc_cleanup_CBC -/// -# ltc_cleanup_CTR -/// -# ltc_cleanup_ECB -/// -# ltc_decrypt -/// -# ltc_decrypt_CBC -/// -# ltc_decrypt_CTR -/// -# ltc_decrypt_ECB -//------------------------------------------------------------------------------ - -#ifndef BOOTLOADER_LIBTOMCRYPT_H -#define BOOTLOADER_LIBTOMCRYPT_H - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ - -#include "config.h" - -#if defined(USE_ENCRYPTION) && (defined(ENCRYPTION_AES_LTC) || defined(ENCRYPTION_3DES_LTC)) - -//------------------------------------------------------------------------------ -// Check configuration -//------------------------------------------------------------------------------ - -// Supported modes -#if !defined(ENCRYPTION_CTR) && \ - !defined(ENCRYPTION_CBC) && \ - !defined(ENCRYPTION_ECB) - #error No other mode than ECB, CBC & CTR are supported. -#endif - -// Supported key length -#if defined(ENCRYPTION_AES_LTC) - #if (ENCRYPTION_KEY_LENGTH != 16) && \ - (ENCRYPTION_KEY_LENGTH != 24) && \ - (ENCRYPTION_KEY_LENGTH != 32) - #error Only a key length of 128, 192 or 256 bits are supported with AES. - #endif -#elif defined(ENCRYPTION_3DES_LTC) - #if (ENCRYPTION_KEY_LENGTH != 16) && \ - (ENCRYPTION_KEY_LENGTH != 24) - #error Only a key length of 128 or 192 bits are supported with Triple-DES. - #endif -#endif - -// Supported block length -#if defined(ENCRYPTION_AES_LTC) - #if (ENCRYPTION_BLOCK_LENGTH != 16) - #error Only a block length of 128 bits is supported with AES. - #endif -#elif defined(ENCRYPTION_3DES_LTC) - #if (ENCRYPTION_BLOCK_LENGTH != 8) - #error Only a block length of 64 bits is supported with Triple-DES. - #endif -#endif - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ - -// Functions -#ifdef ONLY_ONE_ENCRYPTION -#define ENCRYPTION_INIT ltc_init -#define ENCRYPTION_CLEANUP ltc_cleanup -#define ENCRYPTION_DECRYPT ltc_decrypt - -#if defined(ENCRYPTION_AES_LTC) - #define CIPHER_NAME "rijndael" - #define CIPHER_DESC rijndael_desc -#elif defined(ENCRYPTION_3DES_LTC) - #define CIPHER_NAME "3des" - #define CIPHER_DESC des3_desc -#endif -#endif - -//------------------------------------------------------------------------------ -// Prototypes -//------------------------------------------------------------------------------ - -#ifdef ONLY_ONE_ENCRYPTION -extern void ltc_init(void); -#endif -extern void ltc_init_AES_CBC(void); -extern void ltc_init_AES_CTR(void); -extern void ltc_init_AES_ECB(void); -extern void ltc_init_3DES_CBC(void); -extern void ltc_init_3DES_CTR(void); -extern void ltc_init_3DES_ECB(void); - -extern void ltc_cleanup(void); -extern void ltc_cleanup_CBC(void); -extern void ltc_cleanup_CTR(void); -extern void ltc_cleanup_ECB(void); - -extern int ltc_decrypt(const unsigned char * cipherText, unsigned char * plainText, unsigned int length); -extern int ltc_decrypt_CBC(const unsigned char * cipherText, unsigned char * plainText, unsigned int length); -extern int ltc_decrypt_CTR(const unsigned char * cipherText, unsigned char * plainText, unsigned int length); -extern int ltc_decrypt_ECB(const unsigned char * cipherText, unsigned char * plainText, unsigned int length); - -#endif // defined(USE_ENCRYPTION) && (defined(ENCRYPTION_AES_LTC) || defined(ENCRYPTION_3DES_LTC)) -#endif // BOOTLOADER_AES_LIBTOMCRYPT_H - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/tdes_hardware.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/tdes_hardware.c deleted file mode 100644 index 7b570103..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/tdes_hardware.c +++ /dev/null @@ -1,520 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Function: Firmware encryption using TDES hardware acceleration -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ - -#include "tdes_hardware.h" - -#if defined(USE_ENCRYPTION) && defined(ENCRYPTION_3DES_HARD) -#include -#include -#include -#include -#include -#include - -//------------------------------------------------------------------------------ -// Global variables -//------------------------------------------------------------------------------ - -#ifdef ENCRYPTION_CTR - unsigned char CTR[ENCRYPTION_BLOCK_LENGTH]; -#endif - -//------------------------------------------------------------------------------ -// Inline functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Converts an ASCII value to an hexadecimal one -/// \param ASCII string -/// \param Buffer to store integer value -/// \param Length of string -//------------------------------------------------------------------------------ -static inline void ASCII2Hex(const unsigned char * ascii, unsigned char * binary, unsigned int length) -{ - unsigned int i; - - for (i=0; i < length; i++) { - if (ascii[i*2] >= 'A') { - binary[i] = ascii[i*2] - 'A' + 10; - } - else { - binary[i] = ascii[i*2] - '0'; - } - binary[i] <<= 4; - if (ascii[i*2+1] >= 'A') { - binary[i] += ascii[i*2+1] - 'A' + 10; - } - else { - binary[i] += ascii[i*2+1] - '0'; - } - } -} -//------------------------------------------------------------------------------ -// Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Initializes the TDES peripheral -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -void tdes_hard_init(void) -{ - unsigned char key[ENCRYPTION_KEY_LENGTH]; - - TRACE_DEBUG("TDES/HARD: Initializing ...\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES/TDES undefined -#endif - - // Load mode -#if (ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | TDES_MODE - | AT91C_TDES_TDESMOD | TDES_CIPHER; -#else - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | TDES_MODE | AT91C_TDES_KEYMOD - | AT91C_TDES_TDESMOD | TDES_CIPHER; -#endif - - // Convert and load key - ASCII2Hex((unsigned char*)ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - AT91C_BASE_TDES->TDES_KEY1WxR[0] = ((int *) key)[0]; - AT91C_BASE_TDES->TDES_KEY1WxR[1] = ((int *) key)[1]; - AT91C_BASE_TDES->TDES_KEY2WxR[0] = ((int *) key)[2]; - AT91C_BASE_TDES->TDES_KEY2WxR[1] = ((int *) key)[3]; - -#if (ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_KEY3WxR[0] = ((int *) key)[4]; - AT91C_BASE_TDES->TDES_KEY3WxR[1] = ((int *) key)[5]; -#endif - -#if defined(ENCRYPTION_CBC) - unsigned char IV[8]; - ASCII2Hex((unsigned char*)ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - AT91C_BASE_TDES->TDES_IVxR[0] = ((int *) IV)[0]; - AT91C_BASE_TDES->TDES_IVxR[1] = ((int *) IV)[1]; - -#elif defined(ENCRYPTION_CTR) - // Convert IV - ASCII2Hex((unsigned char*)ENCRYPTION_IV, CTR, ENCRYPTION_BLOCK_LENGTH); -#endif - - TRACE_DEBUG("TDES/HARD: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the DES peripheral for CBC mode -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -void tdes_hard_init_CBC(void) -{ - unsigned char key[TDES_ENCRYPTION_KEY_LENGTH]; - - TRACE_DEBUG("tdes_hard_init_CBC\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode -#if (TDES_ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | AT91C_TDES_OPMOD_CBC - | AT91C_TDES_TDESMOD | 0; -#else - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | AT91C_TDES_OPMOD_CBC | AT91C_TDES_KEYMOD - | AT91C_TDES_TDESMOD | 0; -#endif - - // Convert and load key - ASCII2Hex((unsigned char*)TDES_ENCRYPTION_KEY, key, TDES_ENCRYPTION_KEY_LENGTH); - - AT91C_BASE_TDES->TDES_KEY1WxR[0] = ((int *) key)[0]; - AT91C_BASE_TDES->TDES_KEY1WxR[1] = ((int *) key)[1]; - AT91C_BASE_TDES->TDES_KEY2WxR[0] = ((int *) key)[2]; - AT91C_BASE_TDES->TDES_KEY2WxR[1] = ((int *) key)[3]; - -#if (TDES_ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_KEY3WxR[0] = ((int *) key)[4]; - AT91C_BASE_TDES->TDES_KEY3WxR[1] = ((int *) key)[5]; -#endif - - unsigned char IV[8]; - ASCII2Hex((unsigned char*)ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - AT91C_BASE_TDES->TDES_IVxR[0] = ((int *) IV)[0]; - AT91C_BASE_TDES->TDES_IVxR[1] = ((int *) IV)[1]; -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the DES peripheral for CTR mode -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -void tdes_hard_init_CTR(void) -{ - unsigned char key[TDES_ENCRYPTION_KEY_LENGTH]; - - TRACE_DEBUG("tdes_hard_init_CTR\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode -#if (TDES_ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | AT91C_TDES_OPMOD_ECB - | AT91C_TDES_TDESMOD | AT91C_TDES_CIPHER; -#else - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | AT91C_TDES_OPMOD_ECB | AT91C_TDES_KEYMOD - | AT91C_TDES_TDESMOD | AT91C_TDES_CIPHER; -#endif - - // Convert and load key - ASCII2Hex((unsigned char*)TDES_ENCRYPTION_KEY, key, TDES_ENCRYPTION_KEY_LENGTH); - - AT91C_BASE_TDES->TDES_KEY1WxR[0] = ((int *) key)[0]; - AT91C_BASE_TDES->TDES_KEY1WxR[1] = ((int *) key)[1]; - AT91C_BASE_TDES->TDES_KEY2WxR[0] = ((int *) key)[2]; - AT91C_BASE_TDES->TDES_KEY2WxR[1] = ((int *) key)[3]; - -#if (TDES_ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_KEY3WxR[0] = ((int *) key)[4]; - AT91C_BASE_TDES->TDES_KEY3WxR[1] = ((int *) key)[5]; -#endif - - // Convert IV - ASCII2Hex((unsigned char*)ENCRYPTION_IV, CTR, ENCRYPTION_BLOCK_LENGTH); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the DES peripheral for ECB mode -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -void tdes_hard_init_ECB(void) -{ - unsigned char key[TDES_ENCRYPTION_KEY_LENGTH]; - - TRACE_DEBUG("tdes_hard_init_ECB\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode -#if (TDES_ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | AT91C_TDES_OPMOD_ECB - | AT91C_TDES_TDESMOD | 0; -#else - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | AT91C_TDES_OPMOD_ECB | AT91C_TDES_KEYMOD - | AT91C_TDES_TDESMOD | 0; -#endif - - // Convert and load key - ASCII2Hex((unsigned char*)TDES_ENCRYPTION_KEY, key, TDES_ENCRYPTION_KEY_LENGTH); - - AT91C_BASE_TDES->TDES_KEY1WxR[0] = ((int *) key)[0]; - AT91C_BASE_TDES->TDES_KEY1WxR[1] = ((int *) key)[1]; - AT91C_BASE_TDES->TDES_KEY2WxR[0] = ((int *) key)[2]; - AT91C_BASE_TDES->TDES_KEY2WxR[1] = ((int *) key)[3]; - -#if (TDES_ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_KEY3WxR[0] = ((int *) key)[4]; - AT91C_BASE_TDES->TDES_KEY3WxR[1] = ((int *) key)[5]; -#endif -} -#endif - -//------------------------------------------------------------------------------ -/// Cleans up the DES peripheral -//------------------------------------------------------------------------------ -void tdes_hard_cleanup(void) -{ - TRACE_DEBUG("TDES/HARD: Cleaning up ...\n\r"); - AT91C_BASE_TDES->TDES_MR = 0; -#ifdef AT91C_ID_AES - PMC_DisablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_DisablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_DisablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - TRACE_DEBUG("TDES/HARD: Cleanup done.\n\r"); -} - -//------------------------------------------------------------------------------ -/// Decrypts a variable-length cipher text -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -int tdes_hard_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - unsigned int l; - - TRACE_DEBUG("tdes_hard_decrypt\n\r"); - -#if defined(ENCRYPTION_ECB) || defined(ENCRYPTION_CBC) - for (l=0; l < length;) { - - // Load counter and encrypt it - AT91C_BASE_TDES->TDES_IDATAxR[0] = ((int *) &cipherText[l])[0]; - AT91C_BASE_TDES->TDES_IDATAxR[1] = ((int *) &cipherText[l])[1]; - - // Start processing - AT91C_BASE_TDES->TDES_CR = AT91C_TDES_START; - - while (!((AT91C_BASE_TDES->TDES_ISR) & AT91C_TDES_DATRDY)); - - ((int *) &plainText[l])[0] = AT91C_BASE_TDES->TDES_ODATAxR[0]; - ((int *) &plainText[l])[1] = AT91C_BASE_TDES->TDES_ODATAxR[1]; - - l += ENCRYPTION_BLOCK_LENGTH; - } - -#elif defined(ENCRYPTION_CTR) - unsigned int bytes; - unsigned char block[ENCRYPTION_BLOCK_LENGTH]; - unsigned int e; - unsigned int i; - int k; - - // Decrypt - for (e=0; e < length;) { - - // Load counter and encrypt it - AT91C_BASE_TDES->TDES_IDATAxR[0] = ((int *) CTR)[0]; - AT91C_BASE_TDES->TDES_IDATAxR[1] = ((int *) CTR)[1]; - - AT91C_BASE_TDES->TDES_CR = AT91C_TDES_START; - while (!(AT91C_BASE_TDES->TDES_ISR & AT91C_TDES_DATRDY)); - - ((int *) block)[0] = AT91C_BASE_TDES->TDES_ODATAxR[0]; - ((int *) block)[1] = AT91C_BASE_TDES->TDES_ODATAxR[1]; - - // XOR current plain text block with encrypted counter - if ((length-e) < ENCRYPTION_BLOCK_LENGTH) { - bytes = length - e; - } - else { - bytes = ENCRYPTION_BLOCK_LENGTH; - } - - for (i=0; i < bytes; i++) { - plainText[e+i] = cipherText[e+i] ^ ((char *) block)[i]; - } - - // Increment counter (big-endian) and number of encrypted bytes - for (k=ENCRYPTION_BLOCK_LENGTH-1; k >= 0; k--) { - if (++((char *) CTR)[k] != 0) { - break; - } - } - e += bytes; - } -#endif // ENCRYPTION_CTR - - return 1; -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a variable-length cipher text for CBC mode -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -int tdes_hard_decrypt_CBC(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - unsigned int l; - - TRACE_DEBUG("tdes_hard_decrypt_CBC\n\r"); - - for (l=0; l < length;) { - // Load counter and encrypt it - AT91C_BASE_TDES->TDES_IDATAxR[0] = ((int *) &cipherText[l])[0]; - AT91C_BASE_TDES->TDES_IDATAxR[1] = ((int *) &cipherText[l])[1]; - - // Start processing - AT91C_BASE_TDES->TDES_CR = AT91C_TDES_START; - - while (!((AT91C_BASE_TDES->TDES_ISR) & AT91C_TDES_DATRDY)); - - ((int *) &plainText[l])[0] = AT91C_BASE_TDES->TDES_ODATAxR[0]; - ((int *) &plainText[l])[1] = AT91C_BASE_TDES->TDES_ODATAxR[1]; - - l += ENCRYPTION_BLOCK_LENGTH; - } - return 1; -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a variable-length cipher text for CTR mode -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -int tdes_hard_decrypt_CTR(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - unsigned int bytes; - unsigned char block[ENCRYPTION_BLOCK_LENGTH]; - unsigned int e; - unsigned int i; - int k; - - TRACE_DEBUG("tdes_hard_decrypt_CTR\n\r"); - - // Decrypt - for (e=0; e < length;) { - - // Load counter and encrypt it - AT91C_BASE_TDES->TDES_IDATAxR[0] = ((int *) CTR)[0]; - AT91C_BASE_TDES->TDES_IDATAxR[1] = ((int *) CTR)[1]; - - AT91C_BASE_TDES->TDES_CR = AT91C_TDES_START; - while (!(AT91C_BASE_TDES->TDES_ISR & AT91C_TDES_DATRDY)); - - ((int *) block)[0] = AT91C_BASE_TDES->TDES_ODATAxR[0]; - ((int *) block)[1] = AT91C_BASE_TDES->TDES_ODATAxR[1]; - - // XOR current plain text block with encrypted counter - if ((length-e) < ENCRYPTION_BLOCK_LENGTH) { - bytes = length - e; - } - else { - bytes = ENCRYPTION_BLOCK_LENGTH; - } - - for (i=0; i < bytes; i++) { - plainText[e+i] = cipherText[e+i] ^ ((char *) block)[i]; - } - - // Increment counter (big-endian) and number of encrypted bytes - for (k=ENCRYPTION_BLOCK_LENGTH-1; k >= 0; k--) { - if (++((char *) CTR)[k] != 0) { - break; - } - } - e += bytes; - } - - return 1; -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a variable-length cipher text for ECB mode -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -int tdes_hard_decrypt_ECB(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - unsigned int l; - - TRACE_DEBUG("tdes_hard_decrypt_ECB\n\r"); - - for (l=0; l < length;) { - - // Load counter and encrypt it - AT91C_BASE_TDES->TDES_IDATAxR[0] = ((int *) &cipherText[l])[0]; - AT91C_BASE_TDES->TDES_IDATAxR[1] = ((int *) &cipherText[l])[1]; - - // Start processing - AT91C_BASE_TDES->TDES_CR = AT91C_TDES_START; - - while (!((AT91C_BASE_TDES->TDES_ISR) & AT91C_TDES_DATRDY)); - - ((int *) &plainText[l])[0] = AT91C_BASE_TDES->TDES_ODATAxR[0]; - ((int *) &plainText[l])[1] = AT91C_BASE_TDES->TDES_ODATAxR[1]; - - l += ENCRYPTION_BLOCK_LENGTH; - } - return 1; -} -#endif - -#endif // defined(USE_ENCRYPTION) && defined(ENCRYPTION_3DES_HARD) - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/tdes_hardware.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/tdes_hardware.h deleted file mode 100644 index 28fb774b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/encryption/tdes_hardware.h +++ /dev/null @@ -1,125 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Firmware encryption using TDES hardware acceleration -/// -/// !Usage -/// -/// -# tdes_hard_init: Initialize TDES hardware -/// -# tdes_hard_init_CBC: for the CBC mode -/// -# tdes_hard_init_ECB: for the CTR mode -/// -# tdes_hard_init_CTR: for the ECB mode -/// -# tdes_hard_cleanup: Cleans up DES -/// -# tdes_hard_decrypt: Decrypts a variable-length cipher text -/// -# tdes_hard_decrypt_CBC: for CBC mode -/// -# tdes_hard_decrypt_ECB: for ECB mode -/// -# tdes_hard_decrypt_CTR: for CTR mode -//------------------------------------------------------------------------------ -#ifndef BOOTLOADER_TDES_HARDWARE_H -#define BOOTLOADER_TDES_HARDWARE_H - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ - -#include "config.h" - -#if defined(USE_ENCRYPTION) && defined(ENCRYPTION_3DES_HARD) - -//------------------------------------------------------------------------------ -// Check configuration -//------------------------------------------------------------------------------ - -#ifdef ONLY_ONE_ENCRYPTION -#if (ENCRYPTION_KEY_LENGTH != 16) && (ENCRYPTION_KEY_LENGTH != 24) - #error Triple-DES hardware acceleration only supports 128 and 192 bits keys. -#endif - -#if (ENCRYPTION_BLOCK_LENGTH != 8) - #error Triple-DES hardware acceleration only supports 64 bits blocks. -#endif - -#if !defined(ENCRYPTION_ECB) && \ - !defined(ENCRYPTION_CBC) && \ - !defined(ENCRYPTION_CTR) - #error Only ECB, CBC & CTR mode are supported. -#endif - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ -#define ENCRYPTION_INIT tdes_hard_init -#define ENCRYPTION_CLEANUP tdes_hard_cleanup -#define ENCRYPTION_DECRYPT tdes_hard_decrypt - -#if defined(ENCRYPTION_ECB) - #define TDES_MODE AT91C_TDES_OPMOD_ECB - #define TDES_CIPHER 0 -#elif defined(ENCRYPTION_CBC) - #define TDES_MODE AT91C_TDES_OPMOD_CBC - #define TDES_CIPHER 0 -#elif defined(ENCRYPTION_CTR) - #define TDES_MODE AT91C_TDES_OPMOD_ECB - #define TDES_CIPHER AT91C_TDES_CIPHER -#endif - -#endif // ONLY_ONE_ENCRYPTION - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -extern void tdes_hard_init(void); -#endif -extern void tdes_hard_init_CBC(void); -extern void tdes_hard_init_CTR(void); -extern void tdes_hard_init_ECB(void); -extern void tdes_hard_cleanup(void); -extern int tdes_hard_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); -extern int tdes_hard_decrypt_CBC(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); -extern int tdes_hard_decrypt_CTR(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); -extern int tdes_hard_decrypt_ECB(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); - - -#endif // defined(USE_ENCRYPTION) && defined(ENCRYPTION_3DES_HARD) -#endif // BOOTLOADER_DES_HARDWARE_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/hamming.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/hamming.c deleted file mode 100644 index 2b1b8905..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/hamming.c +++ /dev/null @@ -1,335 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "hamming.h" -#include -#include - -//------------------------------------------------------------------------------ -// Internal function -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Counts and return the number of bits set to '1' in the given byte. -/// \param byte Byte to count. -//------------------------------------------------------------------------------ -static unsigned char CountBitsInByte(unsigned char byte) -{ - unsigned char count = 0; - while (byte > 0) { - - if (byte & 1) { - - count++; - } - byte >>= 1; - } - - return count; -} - -//------------------------------------------------------------------------------ -/// Counts and return the number of bits set to '1' in the given hamming code. -/// \param code Hamming code. -//------------------------------------------------------------------------------ -static unsigned char CountBitsInCode256(unsigned char *code) -{ - return CountBitsInByte(code[0]) - + CountBitsInByte(code[1]) - + CountBitsInByte(code[2]); -} - -//------------------------------------------------------------------------------ -/// Calculates the 22-bit hamming code for a 256-bytes block of data. -/// \param data Data buffer to calculate code for. -/// \param code Pointer to a buffer where the code should be stored. -//------------------------------------------------------------------------------ -static void Compute256(const unsigned char *data, unsigned char *code) -{ - unsigned int i; - unsigned char columnSum = 0; - unsigned char evenLineCode = 0; - unsigned char oddLineCode = 0; - unsigned char evenColumnCode = 0; - unsigned char oddColumnCode = 0; - - // Xor all bytes together to get the column sum; - // At the same time, calculate the even and odd line codes - for (i=0; i < 256; i++) { - - columnSum ^= data[i]; - - // If the xor sum of the byte is 0, then this byte has no incidence on - // the computed code; so check if the sum is 1. - if ((CountBitsInByte(data[i]) & 1) == 1) { - - // Parity groups are formed by forcing a particular index bit to 0 - // (even) or 1 (odd). - // Example on one byte: - // - // bits (dec) 7 6 5 4 3 2 1 0 - // (bin) 111 110 101 100 011 010 001 000 - // '---'---'---'----------. - // | - // groups P4' ooooooooooooooo eeeeeeeeeeeeeee P4 | - // P2' ooooooo eeeeeee ooooooo eeeeeee P2 | - // P1' ooo eee ooo eee ooo eee ooo eee P1 | - // | - // We can see that: | - // - P4 -> bit 2 of index is 0 --------------------' - // - P4' -> bit 2 of index is 1. - // - P2 -> bit 1 of index if 0. - // - etc... - // We deduce that a bit position has an impact on all even Px if - // the log2(x)nth bit of its index is 0 - // ex: log2(4) = 2, bit2 of the index must be 0 (-> 0 1 2 3) - // and on all odd Px' if the log2(x)nth bit of its index is 1 - // ex: log2(2) = 1, bit1 of the index must be 1 (-> 0 1 4 5) - // - // As such, we calculate all the possible Px and Px' values at the - // same time in two variables, evenLineCode and oddLineCode, such as - // evenLineCode bits: P128 P64 P32 P16 P8 P4 P2 P1 - // oddLineCode bits: P128' P64' P32' P16' P8' P4' P2' P1' - // - evenLineCode ^= (255 - i); - oddLineCode ^= i; - } - } - - // At this point, we have the line parities, and the column sum. First, We - // must caculate the parity group values on the column sum. - for (i=0; i < 8; i++) { - - if (columnSum & 1) { - - evenColumnCode ^= (7 - i); - oddColumnCode ^= i; - } - columnSum >>= 1; - } - - // Now, we must interleave the parity values, to obtain the following layout: - // Code[0] = Line1 - // Code[1] = Line2 - // Code[2] = Column - // Line = Px' Px P(x-1)- P(x-1) ... - // Column = P4' P4 P2' P2 P1' P1 PadBit PadBit - code[0] = 0; - code[1] = 0; - code[2] = 0; - - for (i=0; i < 4; i++) { - - code[0] <<= 2; - code[1] <<= 2; - code[2] <<= 2; - - // Line 1 - if ((oddLineCode & 0x80) != 0) { - - code[0] |= 2; - } - if ((evenLineCode & 0x80) != 0) { - - code[0] |= 1; - } - - // Line 2 - if ((oddLineCode & 0x08) != 0) { - - code[1] |= 2; - } - if ((evenLineCode & 0x08) != 0) { - - code[1] |= 1; - } - - // Column - if ((oddColumnCode & 0x04) != 0) { - - code[2] |= 2; - } - if ((evenColumnCode & 0x04) != 0) { - - code[2] |= 1; - } - - oddLineCode <<= 1; - evenLineCode <<= 1; - oddColumnCode <<= 1; - evenColumnCode <<= 1; - } - - // Invert codes (linux compatibility) - code[0] = ~code[0]; - code[1] = ~code[1]; - code[2] = ~code[2]; - - TRACE_DEBUG("Computed code = %02X %02X %02X\n\r", - code[0], code[1], code[2]); -} - -//------------------------------------------------------------------------------ -/// Verifies and corrects a 256-bytes block of data using the given 22-bits -/// hamming code. -/// Returns 0 if there is no error, otherwise returns a HAMMING_ERROR code. -/// \param data Data buffer to check. -/// \param originalCode Hamming code to use for verifying the data. -//------------------------------------------------------------------------------ -static unsigned char Verify256( - unsigned char *data, - const unsigned char *originalCode) -{ - // Calculate new code - unsigned char computedCode[3]; - unsigned char correctionCode[3]; - Compute256(data, computedCode); - - // Xor both codes together - correctionCode[0] = computedCode[0] ^ originalCode[0]; - correctionCode[1] = computedCode[1] ^ originalCode[1]; - correctionCode[2] = computedCode[2] ^ originalCode[2]; - - TRACE_DEBUG("Correction code = %02X %02X %02X\n\r", - correctionCode[0], correctionCode[1], correctionCode[2]); - - // If all bytes are 0, there is no error - if ((correctionCode[0] == 0) - && (correctionCode[1] == 0) - && (correctionCode[2] == 0)) { - - return 0; - } - // If there is a single bit error, there are 11 bits set to 1 - if (CountBitsInCode256(correctionCode) == 11) { - - // Get byte and bit indexes - unsigned char byte = correctionCode[0] & 0x80; - byte |= (correctionCode[0] << 1) & 0x40; - byte |= (correctionCode[0] << 2) & 0x20; - byte |= (correctionCode[0] << 3) & 0x10; - - byte |= (correctionCode[1] >> 4) & 0x08; - byte |= (correctionCode[1] >> 3) & 0x04; - byte |= (correctionCode[1] >> 2) & 0x02; - byte |= (correctionCode[1] >> 1) & 0x01; - - unsigned char bit = (correctionCode[2] >> 5) & 0x04; - bit |= (correctionCode[2] >> 4) & 0x02; - bit |= (correctionCode[2] >> 3) & 0x01; - - // Correct bit - TRACE_DEBUG("Correcting byte #%d at bit %d\n\r", byte, bit); - data[byte] ^= (1 << bit); - - return Hamming_ERROR_SINGLEBIT; - } - // Check if ECC has been corrupted - if (CountBitsInCode256(correctionCode) == 1) { - - return Hamming_ERROR_ECC; - } - // Otherwise, this is a multi-bit error - else { - - return Hamming_ERROR_MULTIPLEBITS; - } -} - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Computes 3-bytes hamming codes for a data block whose size is multiple of -/// 256 bytes. Each 256 bytes block gets its own code. -/// \param data Data to compute code for. -/// \param size Data size in bytes. -/// \param code Codes buffer. -//------------------------------------------------------------------------------ -void Hamming_Compute256x( - const unsigned char *data, - unsigned int size, - unsigned char *code) -{ - TRACE_DEBUG("Hamming_Compute256x()\n\r"); - - while (size > 0) { - - Compute256(data, code); - data += 256; - code += 3; - size -= 256; - } -} - -//------------------------------------------------------------------------------ -/// Verifies 3-bytes hamming codes for a data block whose size is multiple of -/// 256 bytes. Each 256-bytes block is verified with its own code. -/// Returns 0 if the data is correct, Hamming_ERROR_SINGLEBIT if one or more -/// block(s) have had a single bit corrected, or either Hamming_ERROR_ECC -/// or Hamming_ERROR_MULTIPLEBITS. -/// \param data Data buffer to verify. -/// \param size Size of the data in bytes. -/// \param code Original codes. -//------------------------------------------------------------------------------ -unsigned char Hamming_Verify256x( - unsigned char *data, - unsigned int size, - const unsigned char *code) -{ - unsigned char error; - unsigned char result = 0; - - TRACE_DEBUG("Hamming_Verify256x()\n\r"); - - while (size > 0) { - - error = Verify256(data, code); - if (error == Hamming_ERROR_SINGLEBIT) { - - result = Hamming_ERROR_SINGLEBIT; - } - else if (error) { - - return error; - } - - data += 256; - code += 3; - size -= 256; - } - - return result; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/hamming.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/hamming.h deleted file mode 100644 index 6e0125d9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/hamming.h +++ /dev/null @@ -1,72 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef HAMMING_H -#define HAMMING_H - -//------------------------------------------------------------------------------ -// Defines -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \page "Hamming Code Errors" -/// These are the possible errors when trying to verify a block of data encoded -/// using a Hamming code: -/// -/// !Errors: -/// - Hamming_ERROR_SINGLEBIT -/// - Hamming_ERROR_ECC -/// - Hamming_ERROR_MULTIPLEBITS - -/// A single bit was incorrect but has been recovered. -#define Hamming_ERROR_SINGLEBIT 1 - -/// The original code has been corrupted. -#define Hamming_ERROR_ECC 2 - -/// Multiple bits are incorrect in the data and they cannot be corrected. -#define Hamming_ERROR_MULTIPLEBITS 3 -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -extern void Hamming_Compute256x( - const unsigned char *data, - unsigned int size, - unsigned char *code); - -extern unsigned char Hamming_Verify256x( - unsigned char *data, - unsigned int size, - const unsigned char *code); - -#endif //#ifndef HAMMING_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/iap.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/iap.c deleted file mode 100644 index c4657e22..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/iap.c +++ /dev/null @@ -1,98 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/* - Title: IAP implementation - - About: Purpose - IAP feature is avalaible on ATMEL chip with internal FLASH. This allows - the FLASH memory to be programmed even when the code is also running in - FLASH, without writing some SRAM relocated functions. - The IAP function entry point is written in the 3rd exception vector - (SWI at 0x300008), and is retrieved just by reading the value at this - address. - - ROM function algorithm : - // Send Command - AT91_BASE_MC->MC_FCR = FlashCmd - // Wait Flash is ready - while ((AT91C_BASE_MC->MC_FSR & AT91C_MC_FRDY) != AT91C_MC_FRDY) - return -*/ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "iap.h" -#include -#include - -//------------------------------------------------------------------------------ -// Internal variables -//------------------------------------------------------------------------------ - - - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ -/* - Function: IAP_PerformCmd - Perform a FLASH command through the IAP function. - - Returns: - 0 if the IAP function has executed correctly. - -1 if the IAP feature is not implemented in the ROM code. -*/ -unsigned long IAP_PerformCmd(unsigned long FlashCmd) -{ - // Pointer on IAP function in ROM - static void (*IAP_Function)(unsigned int) = 0; - - if (IAP_Function == 0) { - - IAP_Function = (void (*)(unsigned int)) (*((unsigned int *) IAP_FUNC_ADDR)); - TRACE_DEBUG("IAP_PerformCmd : IAP function address in ROM : 0x%08X\n\r", (unsigned int) IAP_Function); - - /* Check if IAP function is implemented (opcode in SWI != 'b' or 'ldr') */ - if ((((((unsigned long)IAP_Function >> 24) & 0xFF) == 0xEA) || - (((unsigned long)IAP_Function >> 24) & 0xFF) == 0xE5)) { - TRACE_ERROR("IAP_PerformCmd : no IAP function address found in ROM\n\r"); - IAP_Function = 0; - return -1; - } - } - - /* Perform FLASH command */ - IAP_Function(FlashCmd); - - return 0; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/iap.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/iap.h deleted file mode 100644 index 87a6bcd5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/iap.h +++ /dev/null @@ -1,51 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/* - Title: IAP - - About: Purpose - Small function for using IAP feature. - - About: Usage - Perform a FLASH command using . - -*/ - -#ifndef IAP_H -#define IAP_H - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -extern unsigned long IAP_PerformCmd (unsigned long FlashCmd); - -#endif //#ifndef IAP_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/led.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/led.c deleted file mode 100644 index a216b2a0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/led.c +++ /dev/null @@ -1,164 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/// \file - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "led.h" -#include -#include - -//------------------------------------------------------------------------------ -// Local Variables -//------------------------------------------------------------------------------ - -#ifdef PINS_LEDS -static const Pin pinsLeds[] = {PINS_LEDS}; -static const unsigned int numLeds = PIO_LISTSIZE(pinsLeds); -#endif - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Configures the pin associated with the given LED number. If the LED does -/// not exist on the board, the function does nothing. -/// \param led Number of the LED to configure. -/// \return 1 if the LED exists and has been configured; otherwise 0. -//------------------------------------------------------------------------------ -unsigned char LED_Configure(unsigned int led) -{ -#ifdef PINS_LEDS - // Check that LED exists - if (led >= numLeds) { - - return 0; - } - - // Configure LED - return (PIO_Configure(&pinsLeds[led], 1)); -#else - return 0; -#endif -} - -//------------------------------------------------------------------------------ -/// Turns the given LED on if it exists; otherwise does nothing. -/// \param led Number of the LED to turn on. -/// \return 1 if the LED has been turned on; 0 otherwise. -//------------------------------------------------------------------------------ -unsigned char LED_Set(unsigned int led) -{ -#ifdef PINS_LEDS - // Check if LED exists - if (led >= numLeds) { - - return 0; - } - - // Turn LED on - if (pinsLeds[led].type == PIO_OUTPUT_0) { - - PIO_Set(&pinsLeds[led]); - } - else { - - PIO_Clear(&pinsLeds[led]); - } - - return 1; -#else - return 0; -#endif -} - -//------------------------------------------------------------------------------ -/// Turns a LED off. -/// \param led Number of the LED to turn off. -/// \param 1 if the LED has been turned off; 0 otherwise. -//------------------------------------------------------------------------------ -unsigned char LED_Clear(unsigned int led) -{ -#ifdef PINS_LEDS - // Check if LED exists - if (led >= numLeds) { - - return 0; - } - - // Turn LED off - if (pinsLeds[led].type == PIO_OUTPUT_0) { - - PIO_Clear(&pinsLeds[led]); - } - else { - - PIO_Set(&pinsLeds[led]); - } - - return 1; -#else - return 0; -#endif -} - -//------------------------------------------------------------------------------ -/// Toggles the current state of a LED. -/// \param led Number of the LED to toggle. -/// \return 1 if the LED has been toggled; otherwise 0. -//------------------------------------------------------------------------------ -unsigned char LED_Toggle(unsigned int led) -{ -#ifdef PINS_LEDS - // Check if LED exists - if (led >= numLeds) { - - return 0; - } - - // Toggle LED - if (PIO_GetOutputDataStatus(&pinsLeds[led])) { - - PIO_Clear(&pinsLeds[led]); - } - else { - - PIO_Set(&pinsLeds[led]); - } - - return 1; -#else - return 0; -#endif -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/led.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/led.h deleted file mode 100644 index 9a08a82d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/led.h +++ /dev/null @@ -1,70 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \file -/// -/// \par Purpose -/// -/// Small set of functions for simple and portable LED usage. -/// -/// \par Usage -/// -/// -# Configure one or more LEDs using LED_Configure and -/// LED_ConfigureAll. -/// -# Set, clear and toggle LEDs using LED_Set, LED_Clear and -/// LED_Toggle. -/// -/// LEDs are numbered starting from 0; the number of LEDs depend on the -/// board being used. All the functions defined here will compile properly -/// regardless of whether the LED is defined or not; they will simply -/// return 0 when a LED which does not exist is given as an argument. -/// Also, these functions take into account how each LED is connected on to -/// board; thus, might change the level on the corresponding pin -/// to 0 or 1, but it will always light the LED on; same thing for the other -/// methods. -//------------------------------------------------------------------------------ - -#ifndef LED_H -#define LED_H - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -extern unsigned char LED_Configure(unsigned int led); - -extern unsigned char LED_Set(unsigned int led); - -extern unsigned char LED_Clear(unsigned int led); - -extern unsigned char LED_Toggle(unsigned int led); - -#endif //#ifndef LED_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/math.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/math.c deleted file mode 100644 index 39bed568..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/math.c +++ /dev/null @@ -1,91 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "math.h" -#include "trace.h" - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Returns the minimum value between two integers. -/// \param a First integer to compare. -/// \param b Second integer to compare. -//------------------------------------------------------------------------------ -unsigned int min(unsigned int a, unsigned int b) -{ - if (a < b) { - - return a; - } - else { - - return b; - } -} - -//------------------------------------------------------------------------------ -/// Returns the absolute value of an integer. -/// \param value Integer value. -//------------------------------------------------------------------------------ -// Do not call this function "abs", problem with gcc ! -unsigned int absv(signed int value) -{ - if (value < 0) { - - return -value; - } - else { - - return value; - } -} - -//------------------------------------------------------------------------------ -/// Computes and returns x power of y. -/// \param x Value. -/// \param y Power. -//------------------------------------------------------------------------------ -unsigned int power(unsigned int x, unsigned int y) -{ - unsigned int result = 1; - - while (y > 0) { - - result *= x; - y--; - } - return result; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/math.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/math.h deleted file mode 100644 index 6394f299..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/math.h +++ /dev/null @@ -1,41 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef MATH_H -#define MATH_H - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -extern unsigned int min(unsigned int a, unsigned int b); -extern unsigned int absv(signed int value); -extern unsigned int power(unsigned int x, unsigned int y); -#endif //#ifndef MATH_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/rand.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/rand.c deleted file mode 100644 index 9a0f986d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/rand.c +++ /dev/null @@ -1,60 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#include "rand.h" - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -static unsigned long int next = 1; - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Initialize the seed for rand generator. -/// \param seed rand initiation seed -//------------------------------------------------------------------------------ -void srand(unsigned int seed) -{ - next = seed; -} - -//------------------------------------------------------------------------------ -/// Return a random number, maxinum assumed to be 65536 -//------------------------------------------------------------------------------ - -int rand(void) -{ - next = next * 1103515245 + 12345; - return (unsigned int)(next/131072) % 65536; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/rand.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/rand.h deleted file mode 100644 index 8a8b21e2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/rand.h +++ /dev/null @@ -1,49 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !!!Purpose -/// -/// Small function for gererating random number. -/// -//------------------------------------------------------------------------------ - -#ifndef RAND_H -#define RAND_H - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -extern void srand(unsigned int seed); -extern int rand(void); - -#endif //#ifndef RAND_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/retarget.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/retarget.c deleted file mode 100644 index 1ca875ec..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/retarget.c +++ /dev/null @@ -1,88 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// This file Configures the target-dependent low level functions for character I/O. -/// -/// !Contents -/// The code implement the lower-level functions as follows: -/// - fputc -/// - ferror -/// - _ttywrch -/// - _sys_exit -/// -/// -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ -#include -#include - -// Disable semihosting -#pragma import(__use_no_semihosting_swi) - -struct __FILE { int handle;} ; -FILE __stdout; -FILE __stderr; - -//------------------------------------------------------------------------------ -/// Outputs a character to a file. -//------------------------------------------------------------------------------ -int fputc(int ch, FILE *f) { - if ((f == stdout) || (f == stderr)) { - DBGU_PutChar(ch); - return ch; - } - else { - return EOF; - } -} - -//------------------------------------------------------------------------------ -/// Returns the error status accumulated during file I/O. -//------------------------------------------------------------------------------ -int ferror(FILE *f) { - return EOF; -} - - -void _ttywrch(int ch) { - DBGU_PutChar((unsigned char)ch); -} - - -void _sys_exit(int return_code) { - label: goto label; /* endless loop */ -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/stdio.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/stdio.c deleted file mode 100644 index defbbc08..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/stdio.c +++ /dev/null @@ -1,511 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Implementation of several stdio.h methods, such as printf(), sprintf() and -/// so on. This reduces the memory footprint of the binary when using those -/// methods, compared to the libc implementation. -/// -/// !Usage -/// -/// Adds stdio.c to the list of file to compile for the project. This will -/// automatically replace libc methods by the custom ones. -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include -#include - -//------------------------------------------------------------------------------ -// Local Definitions -//------------------------------------------------------------------------------ - -// Maximum string size allowed (in bytes). -#define MAX_STRING_SIZE 100 - -//------------------------------------------------------------------------------ -// Global Variables -//------------------------------------------------------------------------------ - -// Required for proper compilation. -struct _reent r = {0, (FILE *) 0, (FILE *) 1, (FILE *) 0}; -struct _reent *_impure_ptr = &r; - -//------------------------------------------------------------------------------ -// Local Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Writes a character inside the given string. Returns 1. -// \param pStr Storage string. -// \param c Character to write. -//------------------------------------------------------------------------------ -signed int PutChar(char *pStr, char c) -{ - *pStr = c; - return 1; -} - -//------------------------------------------------------------------------------ -// Writes a string inside the given string. -// Returns the size of the written -// string. -// \param pStr Storage string. -// \param pSource Source string. -//------------------------------------------------------------------------------ -signed int PutString(char *pStr, const char *pSource) -{ - signed int num = 0; - - while (*pSource != 0) { - - *pStr++ = *pSource++; - num++; - } - - return num; -} - -//------------------------------------------------------------------------------ -// Writes an unsigned int inside the given string, using the provided fill & -// width parameters. -// Returns the size in characters of the written integer. -// \param pStr Storage string. -// \param fill Fill character. -// \param width Minimum integer width. -// \param value Integer value. -//------------------------------------------------------------------------------ -signed int PutUnsignedInt( - char *pStr, - char fill, - signed int width, - unsigned int value) -{ - signed int num = 0; - - // Take current digit into account when calculating width - width--; - - // Recursively write upper digits - if ((value / 10) > 0) { - - num = PutUnsignedInt(pStr, fill, width, value / 10); - pStr += num; - } - // Write filler characters - else { - - while (width > 0) { - - PutChar(pStr, fill); - pStr++; - num++; - width--; - } - } - - // Write lower digit - num += PutChar(pStr, (value % 10) + '0'); - - return num; -} - -//------------------------------------------------------------------------------ -// Writes a signed int inside the given string, using the provided fill & width -// parameters. -// Returns the size of the written integer. -// \param pStr Storage string. -// \param fill Fill character. -// \param width Minimum integer width. -// \param value Signed integer value. -//------------------------------------------------------------------------------ -signed int PutSignedInt( - char *pStr, - char fill, - signed int width, - signed int value) -{ - signed int num = 0; - unsigned int absolute; - - // Compute absolute value - if (value < 0) { - - absolute = -value; - } - else { - - absolute = value; - } - - // Take current digit into account when calculating width - width--; - - // Recursively write upper digits - if ((absolute / 10) > 0) { - - if (value < 0) { - - num = PutSignedInt(pStr, fill, width, -(absolute / 10)); - } - else { - - num = PutSignedInt(pStr, fill, width, absolute / 10); - } - pStr += num; - } - else { - - // Reserve space for sign - if (value < 0) { - - width--; - } - - // Write filler characters - while (width > 0) { - - PutChar(pStr, fill); - pStr++; - num++; - width--; - } - - // Write sign - if (value < 0) { - - num += PutChar(pStr, '-'); - pStr++; - } - } - - // Write lower digit - num += PutChar(pStr, (absolute % 10) + '0'); - - return num; -} - -//------------------------------------------------------------------------------ -// Writes an hexadecimal value into a string, using the given fill, width & -// capital parameters. -// Returns the number of char written. -// \param pStr Storage string. -// \param fill Fill character. -// \param width Minimum integer width. -// \param maj Indicates if the letters must be printed in lower- or upper-case. -// \param value Hexadecimal value. -//------------------------------------------------------------------------------ -signed int PutHexa( - char *pStr, - char fill, - signed int width, - unsigned char maj, - unsigned int value) -{ - signed int num = 0; - - // Decrement width - width--; - - // Recursively output upper digits - if ((value >> 4) > 0) { - - num += PutHexa(pStr, fill, width, maj, value >> 4); - pStr += num; - } - // Write filler chars - else { - - while (width > 0) { - - PutChar(pStr, fill); - pStr++; - num++; - width--; - } - } - - // Write current digit - if ((value & 0xF) < 10) { - - PutChar(pStr, (value & 0xF) + '0'); - } - else if (maj) { - - PutChar(pStr, (value & 0xF) - 10 + 'A'); - } - else { - - PutChar(pStr, (value & 0xF) - 10 + 'a'); - } - num++; - - return num; -} - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Stores the result of a formatted string into another string. Format -/// arguments are given in a va_list instance. -/// Return the number of characters written. -/// \param pStr Destination string. -/// \param length Length of Destination string. -/// \param pFormat Format string. -/// \param ap Argument list. -//------------------------------------------------------------------------------ -signed int vsnprintf(char *pStr, size_t length, const char *pFormat, va_list ap) -{ - char fill; - unsigned char width; - signed int num = 0; - signed int size = 0; - - // Clear the string - if (pStr) { - - *pStr = 0; - } - - // Phase string - while (*pFormat != 0 && size < length) { - - // Normal character - if (*pFormat != '%') { - - *pStr++ = *pFormat++; - size++; - } - // Escaped '%' - else if (*(pFormat+1) == '%') { - - *pStr++ = '%'; - pFormat += 2; - size++; - } - // Token delimiter - else { - - fill = ' '; - width = 0; - pFormat++; - - // Parse filler - if (*pFormat == '0') { - - fill = '0'; - pFormat++; - } - - // Parse width - while ((*pFormat >= '0') && (*pFormat <= '9')) { - - width = (width*10) + *pFormat-'0'; - pFormat++; - } - - // Check if there is enough space - if (size + width > length) { - - width = length - size; - } - - // Parse type - switch (*pFormat) { - case 'd': - case 'i': num = PutSignedInt(pStr, fill, width, va_arg(ap, signed int)); break; - case 'u': num = PutUnsignedInt(pStr, fill, width, va_arg(ap, unsigned int)); break; - case 'x': num = PutHexa(pStr, fill, width, 0, va_arg(ap, unsigned int)); break; - case 'X': num = PutHexa(pStr, fill, width, 1, va_arg(ap, unsigned int)); break; - case 's': num = PutString(pStr, va_arg(ap, char *)); break; - case 'c': num = PutChar(pStr, va_arg(ap, unsigned int)); break; - default: - return EOF; - } - - pFormat++; - pStr += num; - size += num; - } - } - - // NULL-terminated (final \0 is not counted) - if (size < length) { - - *pStr = 0; - } - else { - - *(--pStr) = 0; - size--; - } - - return size; -} - -//------------------------------------------------------------------------------ -/// Stores the result of a formatted string into another string. Format -/// arguments are given in a va_list instance. -/// Return the number of characters written. -/// \param pString Destination string. -/// \param length Length of Destination string. -/// \param pFormat Format string. -/// \param ... Other arguments -//------------------------------------------------------------------------------ -signed int snprintf(char *pString, size_t length, const char *pFormat, ...) -{ - va_list ap; - signed int rc; - - va_start(ap, pFormat); - rc = vsnprintf(pString, length, pFormat, ap); - va_end(ap); - - return rc; -} - -//------------------------------------------------------------------------------ -/// Stores the result of a formatted string into another string. Format -/// arguments are given in a va_list instance. -/// Return the number of characters written. -/// \param pString Destination string. -/// \param pFormat Format string. -/// \param ap Argument list. -//------------------------------------------------------------------------------ -signed int vsprintf(char *pString, const char *pFormat, va_list ap) -{ - return vsnprintf(pString, MAX_STRING_SIZE, pFormat, ap); -} - -//------------------------------------------------------------------------------ -/// Outputs a formatted string on the given stream. Format arguments are given -/// in a va_list instance. -/// \param pStream Output stream. -/// \param pFormat Format string -/// \param ap Argument list. -//------------------------------------------------------------------------------ -signed int vfprintf(FILE *pStream, const char *pFormat, va_list ap) -{ - char pStr[MAX_STRING_SIZE]; - char pError[] = "stdio.c: increase MAX_STRING_SIZE\n\r"; - - // Write formatted string in buffer - if (vsprintf(pStr, pFormat, ap) >= MAX_STRING_SIZE) { - - fputs(pError, stderr); - while (1); // Increase MAX_STRING_SIZE - } - - // Display string - return fputs(pStr, pStream); -} - -//------------------------------------------------------------------------------ -/// Outputs a formatted string on the DBGU stream. Format arguments are given -/// in a va_list instance. -/// \param pFormat Format string -/// \param ap Argument list. -//------------------------------------------------------------------------------ -signed int vprintf(const char *pFormat, va_list ap) -{ - return vfprintf(stdout, pFormat, ap); -} - -//------------------------------------------------------------------------------ -/// Outputs a formatted string on the given stream, using a variable number of -/// arguments. -/// \param pStream Output stream. -/// \param pFormat Format string. -//------------------------------------------------------------------------------ -signed int fprintf(FILE *pStream, const char *pFormat, ...) -{ - va_list ap; - signed int result; - - // Forward call to vfprintf - va_start(ap, pFormat); - result = vfprintf(pStream, pFormat, ap); - va_end(ap); - - return result; -} - -//------------------------------------------------------------------------------ -/// Outputs a formatted string on the DBGU stream, using a variable number of -/// arguments. -/// \param pFormat Format string. -//------------------------------------------------------------------------------ -signed int printf(const char *pFormat, ...) -{ - va_list ap; - signed int result; - - // Forward call to vprintf - va_start(ap, pFormat); - result = vprintf(pFormat, ap); - va_end(ap); - - return result; -} - -//------------------------------------------------------------------------------ -/// Writes a formatted string inside another string. -/// \param pStr Storage string. -/// \param pFormat Format string. -//------------------------------------------------------------------------------ -signed int sprintf(char *pStr, const char *pFormat, ...) -{ - va_list ap; - signed int result; - - // Forward call to vsprintf - va_start(ap, pFormat); - result = vsprintf(pStr, pFormat, ap); - va_end(ap); - - return result; -} - -//------------------------------------------------------------------------------ -/// Outputs a string on stdout. -/// \param pStr String to output. -//------------------------------------------------------------------------------ -signed int puts(const char *pStr) -{ - return fputs(pStr, stdout); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/string.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/string.c deleted file mode 100644 index dbbb0e9e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/string.c +++ /dev/null @@ -1,239 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Implementation of several methods defined in string.h, for reducing the -/// memory footprint when using them (since the whole libc.o file gets included -/// even when using a single method). -/// -/// !Usage -/// -/// Add string.c to the list of files to compile for the project. This will -/// automatically replace standard libc methods by the custom ones. -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Copies data from a source buffer into a destination buffer. The two buffers -/// must NOT overlap. Returns the destination buffer. -/// \param pDestination Destination buffer. -/// \param pSource Source buffer. -/// \param num Number of bytes to copy. -//------------------------------------------------------------------------------ -void * memcpy(void *pDestination, const void *pSource, size_t num) -{ - unsigned char *pByteDestination; - unsigned char *pByteSource; - unsigned int *pAlignedSource = (unsigned int *) pSource; - unsigned int *pAlignedDestination = (unsigned int *) pDestination; - - // If num is more than 4 bytes, and both dest. and source are aligned, - // then copy dwords - if ((((unsigned int) pAlignedDestination & 0x3) == 0) - && (((unsigned int) pAlignedSource & 0x3) == 0) - && (num >= 4)) { - - while (num >= 4) { - - *pAlignedDestination++ = *pAlignedSource++; - num -= 4; - } - } - - // Copy remaining bytes - pByteDestination = (unsigned char *) pAlignedDestination; - pByteSource = (unsigned char *) pAlignedSource; - while (num--) { - - *pByteDestination++ = *pByteSource++; - } - - return pDestination; -} - -//------------------------------------------------------------------------------ -/// Fills a memory region with the given value. Returns a pointer to the -/// memory region. -/// \param pBuffer Pointer to the start of the memory region to fill -/// \param value Value to fill the region with -/// \param num Size to fill in bytes -//------------------------------------------------------------------------------ -void * memset(void *pBuffer, int value, size_t num) -{ - unsigned char *pByteDestination; - unsigned int *pAlignedDestination = (unsigned int *) pBuffer; - unsigned int alignedValue = (value << 24) | (value << 16) | (value << 8) | value; - - // Set words if possible - if ((((unsigned int) pAlignedDestination & 0x3) == 0) && (num >= 4)) { - while (num >= 4) { - *pAlignedDestination++ = alignedValue; - num -= 4; - } - } - // Set remaining bytes - pByteDestination = (unsigned char *) pAlignedDestination; - while (num--) { - *pByteDestination++ = value; - } - return pBuffer; -} - -//----------------------------------------------------------------------------- -/// Search a character in the given string. -/// Returns a pointer to the character location. -/// \param pString Pointer to the start of the string to search. -/// \param character The character to find. -//----------------------------------------------------------------------------- -char * strchr(const char *pString, int character) -{ - char * p = (char *)pString; - char c = character & 0xFF; - - while(*p != c) { - if (*p == 0) { - return 0; - } - p++; - } - return p; -} - -//----------------------------------------------------------------------------- -/// Return the length of a given string -/// \param pString Pointer to the start of the string. -//----------------------------------------------------------------------------- -size_t strlen(const char *pString) -{ - unsigned int length = 0; - - while(*pString++ != 0) { - length++; - } - return length; -} - - -//----------------------------------------------------------------------------- -/// Search a character backword from the end of given string. -/// Returns a pointer to the character location. -/// \param pString Pointer to the start of the string to search. -/// \param character The character to find. -//----------------------------------------------------------------------------- -char * strrchr(const char *pString, int character) -{ - char *p = 0; - - while(*pString != 0) { - if (*pString++ == character) { - p = (char*)pString; - } - } - return p; -} - -//----------------------------------------------------------------------------- -/// Copy from source string to destination string -/// Return a pointer to the destination string -/// \param pDestination Pointer to the destination string. -/// \param pSource Pointer to the source string. -//----------------------------------------------------------------------------- -char * strcpy(char *pDestination, const char *pSource) -{ - char *pSaveDest = pDestination; - - for(; (*pDestination = *pSource) != 0; ++pSource, ++pDestination); - return pSaveDest; -} - -//----------------------------------------------------------------------------- -/// Compare the first specified bytes of 2 given strings -/// Return 0 if equals -/// Return >0 if 1st string > 2nd string -/// Return <0 if 1st string < 2nd string -/// \param pString1 Pointer to the start of the 1st string. -/// \param pString2 Pointer to the start of the 2nd string. -/// \param count Number of bytes that should be compared. -//----------------------------------------------------------------------------- -int strncmp(const char *pString1, const char *pString2, size_t count) -{ - int r; - - while(count) { - r = *pString1 - *pString2; - if (r == 0) { - if (*pString1 == 0) { - break; - } - pString1++; - pString2++; - count--; - continue; - } - return r; - } - return 0; -} - -//----------------------------------------------------------------------------- -/// Copy the first number of bytes from source string to destination string -/// Return the pointer to the destination string. -/// \param pDestination Pointer to the start of destination string. -/// \param pSource Pointer to the start of the source string. -/// \param count Number of bytes that should be copied. -//----------------------------------------------------------------------------- -char * strncpy(char *pDestination, const char *pSource, size_t count) -{ - char *pSaveDest = pDestination; - - while (count) { - *pDestination = *pSource; - if (*pSource == 0) { - break; - } - pDestination++; - pSource++; - count--; - } - return pSaveDest; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/trace.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/trace.c deleted file mode 100644 index 4073bb9b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/trace.c +++ /dev/null @@ -1,45 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "trace.h" - -//------------------------------------------------------------------------------ -// Internal variables -//------------------------------------------------------------------------------ - -/// Trace level can be set at applet initialization -#if !defined(NOTRACE) && (DYN_TRACES == 1) - unsigned int traceLevel = TRACE_LEVEL; -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/trace.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/trace.h deleted file mode 100644 index 63e7617a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/trace.h +++ /dev/null @@ -1,241 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \file -/// -/// \par Purpose -/// -/// Standard output methods for reporting debug information, warnings and -/// errors, which can be easily be turned on/off. -/// -/// \par Usage -/// -# Initialize the DBGU using TRACE_CONFIGURE() if you intend to eventually -/// disable ALL traces; otherwise use DBGU_Configure(). -/// -# Uses the TRACE_DEBUG(), TRACE_INFO(), TRACE_WARNING(), TRACE_ERROR() -/// TRACE_FATAL() macros to output traces throughout the program. -/// -# Each type of trace has a level : Debug 5, Info 4, Warning 3, Error 2 -/// and Fatal 1. Disable a group of traces by changing the value of -/// TRACE_LEVEL during compilation; traces with a level bigger than TRACE_LEVEL -/// are not generated. To generate no trace, use the reserved value 0. -/// -# Trace disabling can be static or dynamic. If dynamic disabling is selected -/// the trace level can be modified in runtime. If static disabling is selected -/// the disabled traces are not compiled. -/// -/// \par traceLevels Trace level description -/// -# TRACE_DEBUG (5): Traces whose only purpose is for debugging the program, -/// and which do not produce meaningful information otherwise. -/// -# TRACE_INFO (4): Informational trace about the program execution. Should -/// enable the user to see the execution flow. -/// -# TRACE_WARNING (3): Indicates that a minor error has happened. In most case -/// it can be discarded safely; it may even be expected. -/// -# TRACE_ERROR (2): Indicates an error which may not stop the program execution, -/// but which indicates there is a problem with the code. -/// -# TRACE_FATAL (1): Indicates a major error which prevents the program from going -/// any further. - -//------------------------------------------------------------------------------ - -#ifndef TRACE_H -#define TRACE_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include -#include -#include - -//------------------------------------------------------------------------------ -// Global Definitions -//------------------------------------------------------------------------------ - -/// Softpack Version -#define SOFTPACK_VERSION "1.0beta1" - -#define TRACE_LEVEL_DEBUG 5 -#define TRACE_LEVEL_INFO 4 -#define TRACE_LEVEL_WARNING 3 -#define TRACE_LEVEL_ERROR 2 -#define TRACE_LEVEL_FATAL 1 -#define TRACE_LEVEL_NO_TRACE 0 - -// By default, all traces are output except the debug one. -#if !defined(TRACE_LEVEL) -#define TRACE_LEVEL TRACE_LEVEL_INFO -#endif - -// By default, trace level is static (not dynamic) -#if !defined(DYN_TRACES) -#define DYN_TRACES 0 -#endif - -#if defined(NOTRACE) -#error "Error: NOTRACE has to be not defined !" -#endif - -#undef NOTRACE -#if (DYN_TRACES==0) - #if (TRACE_LEVEL == TRACE_LEVEL_NO_TRACE) - #define NOTRACE - #endif -#endif - - - -//------------------------------------------------------------------------------ -// Global Macros -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Initializes the DBGU -/// \param mode DBGU mode. -/// \param baudrate DBGU baudrate. -/// \param mck Master clock frequency. -//------------------------------------------------------------------------------ -#define TRACE_CONFIGURE(mode, baudrate, mck) { \ - const Pin pinsDbgu[] = {PINS_DBGU}; \ - PIO_Configure(pinsDbgu, PIO_LISTSIZE(pinsDbgu)); \ - DBGU_Configure(mode, baudrate, mck); \ - } - -//------------------------------------------------------------------------------ -/// Initializes the DBGU for ISP project -/// \param mode DBGU mode. -/// \param baudrate DBGU baudrate. -/// \param mck Master clock frequency. -//------------------------------------------------------------------------------ -#ifndef DYNTRACE -#define DYNTRACE 0 -#endif - -#if (TRACE_LEVEL==0) && (DYNTRACE==0) -#define TRACE_CONFIGURE_ISP(mode, baudrate, mck) {} -#else -#define TRACE_CONFIGURE_ISP(mode, baudrate, mck) { \ - const Pin pinsDbgu[] = {PINS_DBGU}; \ - PIO_Configure(pinsDbgu, PIO_LISTSIZE(pinsDbgu)); \ - DBGU_Configure(mode, baudrate, mck); \ - } -#endif - -//------------------------------------------------------------------------------ -/// Outputs a formatted string using if the log level is high -/// enough. Can be disabled by defining TRACE_LEVEL=0 during compilation. -/// \param format Formatted string to output. -/// \param ... Additional parameters depending on formatted string. -//------------------------------------------------------------------------------ -#if defined(NOTRACE) - -// Empty macro -#define TRACE_DEBUG(...) { } -#define TRACE_INFO(...) { } -#define TRACE_WARNING(...) { } -#define TRACE_ERROR(...) { } -#define TRACE_FATAL(...) { while(1); } - -#define TRACE_DEBUG_WP(...) { } -#define TRACE_INFO_WP(...) { } -#define TRACE_WARNING_WP(...) { } -#define TRACE_ERROR_WP(...) { } -#define TRACE_FATAL_WP(...) { while(1); } - -#elif (DYN_TRACES == 1) - -// Trace output depends on traceLevel value -#define TRACE_DEBUG(...) { if (traceLevel >= TRACE_LEVEL_DEBUG) { printf("-D- " __VA_ARGS__); } } -#define TRACE_INFO(...) { if (traceLevel >= TRACE_LEVEL_INFO) { printf("-I- " __VA_ARGS__); } } -#define TRACE_WARNING(...) { if (traceLevel >= TRACE_LEVEL_WARNING) { printf("-W- " __VA_ARGS__); } } -#define TRACE_ERROR(...) { if (traceLevel >= TRACE_LEVEL_ERROR) { printf("-E- " __VA_ARGS__); } } -#define TRACE_FATAL(...) { if (traceLevel >= TRACE_LEVEL_FATAL) { printf("-F- " __VA_ARGS__); while(1); } } - -#define TRACE_DEBUG_WP(...) { if (traceLevel >= TRACE_LEVEL_DEBUG) { printf(__VA_ARGS__); } } -#define TRACE_INFO_WP(...) { if (traceLevel >= TRACE_LEVEL_INFO) { printf(__VA_ARGS__); } } -#define TRACE_WARNING_WP(...) { if (traceLevel >= TRACE_LEVEL_WARNING) { printf(__VA_ARGS__); } } -#define TRACE_ERROR_WP(...) { if (traceLevel >= TRACE_LEVEL_ERROR) { printf(__VA_ARGS__); } } -#define TRACE_FATAL_WP(...) { if (traceLevel >= TRACE_LEVEL_FATAL) { printf(__VA_ARGS__); while(1); } } - -#else - -// Trace compilation depends on TRACE_LEVEL value -#if (TRACE_LEVEL >= TRACE_LEVEL_DEBUG) -#define TRACE_DEBUG(...) { printf("-D- " __VA_ARGS__); } -#define TRACE_DEBUG_WP(...) { printf(__VA_ARGS__); } -#else -#define TRACE_DEBUG(...) { } -#define TRACE_DEBUG_WP(...) { } -#endif - -#if (TRACE_LEVEL >= TRACE_LEVEL_INFO) -#define TRACE_INFO(...) { printf("-I- " __VA_ARGS__); } -#define TRACE_INFO_WP(...) { printf(__VA_ARGS__); } -#else -#define TRACE_INFO(...) { } -#define TRACE_INFO_WP(...) { } -#endif - -#if (TRACE_LEVEL >= TRACE_LEVEL_WARNING) -#define TRACE_WARNING(...) { printf("-W- " __VA_ARGS__); } -#define TRACE_WARNING_WP(...) { printf(__VA_ARGS__); } -#else -#define TRACE_WARNING(...) { } -#define TRACE_WARNING_WP(...) { } -#endif - -#if (TRACE_LEVEL >= TRACE_LEVEL_ERROR) -#define TRACE_ERROR(...) { printf("-E- " __VA_ARGS__); } -#define TRACE_ERROR_WP(...) { printf(__VA_ARGS__); } -#else -#define TRACE_ERROR(...) { } -#define TRACE_ERROR_WP(...) { } -#endif - -#if (TRACE_LEVEL >= TRACE_LEVEL_FATAL) -#define TRACE_FATAL(...) { printf("-F- " __VA_ARGS__); while(1); } -#define TRACE_FATAL_WP(...) { printf(__VA_ARGS__); while(1); } -#else -#define TRACE_FATAL(...) { while(1); } -#define TRACE_FATAL_WP(...) { while(1); } -#endif - -#endif - - -//------------------------------------------------------------------------------ -// Exported variables -//------------------------------------------------------------------------------ -// Depending on DYN_TRACES, traceLevel is a modifable runtime variable -// or a define -#if !defined(NOTRACE) && (DYN_TRACES == 1) - extern unsigned int traceLevel; -#endif - -#endif //#ifndef TRACE_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/util.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/util.c deleted file mode 100644 index b2bd0dea..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/util.c +++ /dev/null @@ -1,223 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ -#include -#include -#include - -//------------------------------------------------------------------------------ -// Local Variables -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Print char if printable. If not print a point -/// \param c char to -//------------------------------------------------------------------------------ -static void PrintChar(unsigned char c) -{ - if( (/*c >= 0x00 &&*/ c <= 0x1F) || - (c >= 0xB0 && c <= 0xDF) ) { - - printf("."); - } - else { - - printf("%c", c); - } -} - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Displays the content of the given frame on the DBGU. -/// \param pBuffer Pointer to the frame to dump. -/// \param size Buffer size in bytes. -//------------------------------------------------------------------------------ -void UTIL_DbguDumpFrame(unsigned char *pFrame, unsigned int size) -{ - unsigned int i; - - for (i=0; i < size; i++) { - printf("%02X ", pFrame[i]); - } - - printf("\n\r"); -} - -//------------------------------------------------------------------------------ -/// Displays the content of the given buffer on the DBGU. -/// \param pBuffer Pointer to the buffer to dump. -/// \param size Buffer size in bytes. -/// \param address Start address to display -//------------------------------------------------------------------------------ -void UTIL_DbguDumpMemory( - unsigned char *pBuffer, - unsigned int size, - unsigned int address - ) -{ - unsigned int i, j; - unsigned int lastLineStart; - unsigned char* pTmp; - - for (i=0; i < (size / 16); i++) { - - printf("0x%08X: ", address + (i*16)); - pTmp = (unsigned char*)&pBuffer[i*16]; - for (j=0; j < 4; j++) { - printf("%02X%02X%02X%02X ", pTmp[0],pTmp[1],pTmp[2],pTmp[3]); - pTmp += 4; - } - - pTmp = (unsigned char*)&pBuffer[i*16]; - for (j=0; j < 16; j++) { - PrintChar(*pTmp++); - } - - printf("\n\r"); - } - - if( (size%16) != 0) { - lastLineStart = size - (size%16); - printf("0x%08X: ", address + lastLineStart); - - for (j= lastLineStart; j < lastLineStart+16; j++) { - - if( (j!=lastLineStart) && (j%4 == 0) ) { - printf(" "); - } - if(j= '0' && key <= '9' ) { - value = (value * 10) + (key - '0'); - nbNb++; - } - else if(key == 0x0D || key == ' ') { - if(nbNb == 0) { - printf("\n\rWrite a number and press ENTER or SPACE!\n\r"); - return 0; - } else { - printf("\n\r"); - *pValue = value; - return 1; - } - } else { - printf("\n\r'%c' not a number!\n\r", key); - return 0; - } - } -} - -//------------------------------------------------------------------------------ -/// Reads an integer and check the value -//------------------------------------------------------------------------------ -unsigned char UTIL_DbguGetIntegerMinMax( - unsigned int *pValue, - unsigned int min, - unsigned int max - ) -{ - unsigned int value = 0; - - if( UTIL_DbguGetInteger(&value) == 0) { - return 0; - } - - if(value < min || value > max) { - printf("\n\rThe number have to be between %d and %d\n\r", min, max); - return 0; - } - - printf("\n\r"); - *pValue = value; - return 1; -} - -//------------------------------------------------------------------------------ -/// Reads an hexadecimal number -//------------------------------------------------------------------------------ -unsigned char UTIL_DbguGetHexa32(unsigned int *pValue) -{ - unsigned char key; - unsigned int i = 0; - unsigned int value = 0; - for(i = 0; i < 8; i++) { - key = DBGU_GetChar(); - DBGU_PutChar(key); - if(key >= '0' && key <= '9' ) { - value = (value * 16) + (key - '0'); - } - else if(key >= 'A' && key <= 'F' ) { - value = (value * 16) + (key - 'A' + 10) ; - } - else if(key >= 'a' && key <= 'f' ) { - value = (value * 16) + (key - 'a' + 10) ; - } - else { - printf("\n\rIt is not a hexa character!\n\r"); - return 0; - } - } - - printf("\n\r"); - *pValue = value; - return 1; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/util.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/util.h deleted file mode 100644 index f79ffd3f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/util.h +++ /dev/null @@ -1,48 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef UTIL_H -#define UTIL_H - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -extern void UTIL_DbguDumpFrame(unsigned char *pFrame, unsigned int size); - -extern void UTIL_DbguDumpMemory(unsigned char *pBuffer, unsigned int size, unsigned int address); - -extern unsigned char UTIL_DbguGetInteger(unsigned int *pValue); - -extern unsigned char UTIL_DbguGetIntegerMinMax(unsigned int *pValue, unsigned int min, unsigned int max); - -extern unsigned char UTIL_DbguGetHexa32(unsigned int *pValue); - -#endif //#ifndef UTIL_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/utility.dir b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/utility.dir deleted file mode 100644 index 344ef5a6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/utility.dir +++ /dev/null @@ -1,50 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \dir -/// -/// !!!Purpose -/// -/// The utility directory contains several very small APIs for performing -/// specific tasks, such as LED configuration, BMP header decoding, etc. -/// -/// !!!Contents -/// -/// Most modules contained here are very small and do not fit in any of the -/// other at91lib categories. They primarily provide helper functions -/// (e.g. for handling BMP and WAV files) and re-implementation of libc code for -/// reducing code size (math, stdio, string). -/// -/// Two important files are assert.h and trace.h. The first one provides macros -/// for run-time verifications of parameters & values. Trace.h enables the -/// programmer to add debug traces to APIs that can be easily turned on or off -/// depending on the debugging needs. -//------------------------------------------------------------------------------ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/video.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/video.c deleted file mode 100644 index 49ec1da2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/video.c +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ -#include "video.h" - -//----------------------------------------------------------------------------- -/// Conversion YCrCb to RGB:
-/// R = 1.164(Yi – 16) + 1.596(Cr – 128)
-/// G = 1.164(Yi – 16) – 0.813(Cr – 128) – 0.391(Cb – 128)
-/// B = 1.164(Yi – 16) + 2.018(Cb – 128)
-/// -/// Pixel i+1:
-/// YCrCb to RGB:
-/// R = 1.164(Yi+1 – 16) + 1.596(Cr – 128)
-/// G = 1.164(Yi+1 – 16) – 0.813(Cr – 128) – 0.391(Cb – 128)
-/// B = 1.164(Yi+1 – 16) + 2.018(Cb – 128) -/// \param ycc Source buffer (YCC) -/// \param rgb Destination buffer (RGB) -/// \param len Length of buffer -//----------------------------------------------------------------------------- -void VIDEO_Ycc2Rgb(unsigned char *ycc, unsigned short *rgb, unsigned int len) -{ - int r_calc_i; - int g_calc_i; - int b_calc_i; - int r_calc_i_incr; - int g_calc_i_incr; - int b_calc_i_incr; - int cr_i; - int y_i; - int cb_i; - int y_i_incr; - int val; - int val1; - int val2; - int val3; - int val4; - int val5; - int i; - - for(i=0; i 255) - r_calc_i = 255; - - if (g_calc_i < 0) - g_calc_i = 0; - else if (g_calc_i > 255) - g_calc_i = 255; - - if (b_calc_i < 0) - b_calc_i = 0; - else if (b_calc_i > 255) - b_calc_i = 255; - - if (r_calc_i_incr < 0) - r_calc_i_incr = 0; - else if (r_calc_i_incr > 255) - r_calc_i_incr = 255; - - if (g_calc_i_incr < 0) - g_calc_i_incr = 0; - else if (g_calc_i_incr > 255) - g_calc_i_incr = 255; - - if (b_calc_i_incr < 0) - b_calc_i_incr = 0; - else if (b_calc_i_incr > 255) - b_calc_i_incr = 255; - - *rgb++ = (((unsigned short )r_calc_i & 0xF8) >> 3) - | ((((unsigned short)g_calc_i & 0xF8) >> 3) << 5) - | ((((unsigned short)b_calc_i & 0xF8) >> 3) << 10); - - *rgb++ = (((unsigned short )r_calc_i_incr & 0xF8) >> 3) - | ((((unsigned short)g_calc_i_incr & 0xF8) >> 3) << 5) - | ((((unsigned short)b_calc_i_incr & 0xF8) >> 3) << 10); - } -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/video.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/video.h deleted file mode 100644 index c4940e51..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/video.h +++ /dev/null @@ -1,89 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !!!Purpose -/// -/// Video structure, used for LCD and ISI. -/// Conversion Video from YCC to RGB -/// -//------------------------------------------------------------------------------ - -#ifndef _VIDEO_H -#define _VIDEO_H - -//----------------------------------------------------------------------------- -// Definitions -//----------------------------------------------------------------------------- -/// Type of video is YUV -#define YUV 0 -/// Type of video is RGB -#define RGB 1 - -//----------------------------------------------------------------------------- -/// Video structure -//----------------------------------------------------------------------------- -typedef struct _AT91S_VIDEO -{ - /// LCD Vertical Size - unsigned int lcd_vsize; - /// LCD Horizontal Size - unsigned int lcd_hsize; - /// LCD Number of Bit Per Pixel - unsigned int lcd_nbpp; - /// LCD Frame Buffer Address - unsigned int lcd_fb_addr; - /// Base address for the frame buffer descriptors list - unsigned int Isi_fbd_base; - /// Start of Line Delay - unsigned int Hblank; - /// Start of frame Delay - unsigned int Vblank; - /// Vertical size of the Image sensor [0..2047] - unsigned int codec_vsize; - /// Horizontal size of the Image sensor [0..2047] - unsigned int codec_hsize; - /// Base address for codec DMA - unsigned int codec_fb_addr; - /// Buffer index - unsigned int IsiPrevBuffIndex; - /// Type of video - unsigned char rgb_or_yuv; -}AT91S_VIDEO, *AT91PS_VIDEO; - - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ -extern void VIDEO_Ycc2Rgb(unsigned char *ycc, unsigned short *rgb, unsigned int len); - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/wav.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/wav.c deleted file mode 100644 index cd75b151..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/wav.c +++ /dev/null @@ -1,84 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "wav.h" -#include - -//------------------------------------------------------------------------------ -// Internal constants -//------------------------------------------------------------------------------ - -/// WAV letters "RIFF" -#define WAV_CHUNKID 0x46464952 -/// WAV letters "WAVE" -#define WAV_FORMAT 0x45564157 -/// WAV letters "fmt " -#define WAV_SUBCHUNKID 0x20746D66 - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Returns 1 if the header of a Wav file is valid; otherwise returns 0. -/// \param file Buffer holding the file to examinate. -//------------------------------------------------------------------------------ -unsigned char WAV_IsValid(const WavHeader *header) -{ - return ((header->chunkID == WAV_CHUNKID) - && (header->format == WAV_FORMAT) - && (header->subchunk1Size == 0x10)); -} - -//------------------------------------------------------------------------------ -/// Display the information of the WAV file (sample rate, stereo/mono and frame -/// size). -//------------------------------------------------------------------------------ -void WAV_DisplayInfo(const WavHeader *header) -{ - printf( "Wave file header information\n\r"); - printf( "--------------------------------\n\r"); - printf( " - Chunk ID = 0x%08X\n\r", header->chunkID); - printf( " - Chunk Size = %d\n\r", header->chunkSize); - printf( " - Format = 0x%08X\n\r", header->format); - printf( " - SubChunk ID = 0x%08X\n\r", header->subchunk1ID); - printf( " - Subchunk1 Size = %d\n\r", header->subchunk1Size); - printf( " - Audio Format = 0x%04X\n\r", header->audioFormat); - printf( " - Num. Channels = %d\n\r", header->numChannels); - printf( " - Sample Rate = %d\n\r", header->sampleRate); - printf( " - Byte Rate = %d\n\r", header->byteRate); - printf( " - Block Align = %d\n\r", header->blockAlign); - printf( " - Bits Per Sample = %d\n\r", header->bitsPerSample); - printf( " - Subchunk2 ID = 0x%08X\n\r", header->subchunk2ID); - printf( " - Subchunk2 Size = %d\n\r", header->subchunk2Size); -} \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/wav.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/wav.h deleted file mode 100644 index 4d26e84c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/utility/wav.h +++ /dev/null @@ -1,82 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef WAV_H -#define WAV_H - -//------------------------------------------------------------------------------ -// Exported types -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Standard WAV file header information. -//------------------------------------------------------------------------------ -typedef struct _WavHeader -{ - /// Contains the letters "RIFF" in ASCII form. - unsigned int chunkID; - /// Size of the rest of the chunk following this number. - unsigned int chunkSize; - /// Contains the letters "WAVE". - unsigned int format; - /// Contains the letters "fmt ". - unsigned int subchunk1ID; - /// 16 for PCM. This is the size of the rest of the Subchunk - /// which follows this number. - unsigned int subchunk1Size; - /// PCM = 1 (i.e. Linear quantization). Values other than 1 indicate some - /// form of compression. - unsigned short audioFormat; - /// Mono = 1, Stereo = 2, etc. - unsigned short numChannels; - /// 8000, 44100, etc. - unsigned int sampleRate; - /// SampleRate * NumChannels * BitsPerSample/8 - unsigned int byteRate; - /// NumChannels * BitsPerSample/8 - unsigned short blockAlign; - /// 8 bits = 8, 16 bits = 16, etc. - unsigned short bitsPerSample; - /// Contains the letters "data". - unsigned int subchunk2ID; - /// Number of bytes in the data. - unsigned int subchunk2Size; - -} WavHeader; - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -extern unsigned char WAV_IsValid(const WavHeader *header); - -extern void WAV_DisplayInfo(const WavHeader *header); - -#endif //#ifndef WAV_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/wdt/wdt.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/wdt/wdt.c deleted file mode 100644 index 6d4f4a3d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/wdt/wdt.c +++ /dev/null @@ -1,141 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of Watchdog Timer (WDT) controller. - * - */ - -/** \addtogroup wdt_module Working with WDT - * The WDT driver provides the interface to configure and use the WDT - * peripheral. - * - * The WDT can be used to prevent system lock-up if the software becomes - * trapped in a deadlock. It can generate a general reset or a processor - * reset only. It is clocked by slow clock divided by 128. - * - * The WDT is running at reset with 16 seconds watchdog period (slow clock at 32.768 kHz) - * and external reset generation enabled. The user must either disable it or - * reprogram it to meet the application requires. - * - * To use the WDT, the user could follow these few steps: - *
    - *
  • Enable watchdog with given mode using \ref WDT_Enable(). - *
  • Restart the watchdog using \ref WDT_Restart() within the watchdog period. - *
- * - * For more accurate information, please look at the WDT section of the - * Datasheet. - * - * \note - * The Watchdog Mode Register (WDT_MR) can be written only once.\n - * - * Related files :\n - * \ref wdt.c\n - * \ref wdt.h.\n - */ -/*@{*/ -/*@}*/ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include -#include "wdt.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Enable watchdog with given mode. - * - * \note The Watchdog Mode Register (WDT_MR) can be written only once. - * Only a processor reset resets it. - * - * \param mode WDT mode to be set - */ -void WDT_Enable(uint32_t mode) -{ - Wdt *pWDT = WDT; - - pWDT->WDT_MR = mode; -} - -/** - * \brief Disable watchdog. - * - * \note The Watchdog Mode Register (WDT_MR) can be written only once. - * Only a processor reset resets it. - */ -void WDT_Disable(void) -{ - Wdt *pWDT = WDT; - - pWDT->WDT_MR = WDT_MR_WDDIS; -} - -/** - * \brief Watchdog restart. - */ -void WDT_Restart(void) -{ - Wdt *pWDT = WDT; - - pWDT->WDT_CR = 0xA5000001; -} - -/** - * \brief Watchdog get status. - */ -uint32_t WDT_GetStatus(void) -{ - Wdt *pWDT = WDT; - - return(pWDT->WDT_SR & 0x3); -} - -/** - * \brief Watchdog get period. - * - * \param ms desired watchdog period in millisecond. - */ -uint32_t WDT_GetPeriod(uint32_t ms) -{ - if ((ms < 4) || (ms > 16000)) { - return 0; - } - return((ms << 8) / 1000); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/wdt/wdt.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/wdt/wdt.h deleted file mode 100644 index ed30bb51..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/libraries/drivers/wdt/wdt.h +++ /dev/null @@ -1,61 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * Interface for Watchdog Timer (WDT) controller. - * - * \par Usage - * -# Enable watchdog with given mode using \ref WDT_Enable(). - * -# Disable watchdog using \ref WDT_Disable() - * -# Restart the watchdog using \ref WDT_Restart(). - * -# Get watchdog status using \ref WDT_GetStatus(). - * -# Caculate watchdog period value using \ref WDT_GetPeriod(). - */ - -#ifndef WDT_H -#define WDT_H - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void WDT_Enable(uint32_t mode); - -extern void WDT_Disable(void); - -extern void WDT_Restart(void); - -extern uint32_t WDT_GetStatus(void); - -extern uint32_t WDT_GetPeriod(uint32_t ms); - -#endif /* #ifndef WDT_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/port.h deleted file mode 100644 index b13410ec..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/port.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * FreeModbus Libary: Atmel AT91SAM3S Demo Application - * Copyright (C) 2010 Christian Walter - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * IF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -/* ----------------------- Platform includes --------------------------------*/ -#include -#include -#include -#include -#include -#include -#include - -/* ----------------------- Defines ------------------------------------------*/ -#define INLINE inline -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#define ENTER_CRITICAL_SECTION( ) vMBPortEnterCritical() -#define EXIT_CRITICAL_SECTION( ) vMBPortExitCritical() - -#define assert( x ) - -typedef char BOOL; - -typedef unsigned char UCHAR; -typedef char CHAR; - -typedef unsigned short USHORT; -typedef short SHORT; - -typedef unsigned long ULONG; -typedef long LONG; - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#define MB_PORT_HAS_CLOSE 1 -#define MB_ASCII_TIMEOUT_WAIT_BEFORE_SEND_MS 2 - -/* ----------------------- Prototypes ---------------------------------------*/ -void vMBPortEnterCritical( void ); -void vMBPortExitCritical( void ); - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/portevent.c deleted file mode 100644 index 643eec73..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/portevent.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * FreeModbus Libary: Atmel AT91SAM3S Demo Application - * Copyright (C) 2010 Christian Walter - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * IF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/portother.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/portother.c deleted file mode 100644 index d6b2fb7b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/portother.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * FreeModbus Libary: Atmel AT91SAM3S Demo Application - * Copyright (C) 2010 Christian Walter - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * IF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include - -/* ----------------------- Variables ----------------------------------------*/ -static ULONG ulNesting; -static __istate_t xOldState; - -/* ----------------------- Start implementation -----------------------------*/ -void -vMBPortEnterCritical( void ) -{ - __istate_t xCurState; - xCurState = __get_interrupt_state( ); - __disable_interrupt( ); - if( ulNesting == 0 ) - { - xOldState = xCurState; - } - ulNesting++; -} - -void -vMBPortExitCritical( void ) -{ - ulNesting--; - if( 0 == ulNesting ) - { - __set_interrupt_state( xOldState ); - } -} - -void -vMBPortClose( void ) -{ - extern void vMBPortSerialClose( void ); - extern void vMBPortTimerClose( void ); - vMBPortSerialClose( ); - vMBPortTimerClose( ); -} \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/portserial.c deleted file mode 100644 index 53fe5fea..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/portserial.c +++ /dev/null @@ -1,273 +0,0 @@ -/* - * FreeModbus Libary: Atmel AT91SAM3S Demo Application - * Copyright (C) 2010 Christian Walter - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * IF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - -/* ----------------------- Platform includes --------------------------------*/ -#include -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define USART0_ENABLED ( 1 ) -#define USART0_IDX ( 0 ) - -#define USART1_ENABLED ( 1 ) -#define USART1_IDX ( USART0_IDX + USART0_ENABLED * 1 ) - -#define USART_IDX_LAST ( USART1_IDX ) - -#define USART_INVALID_PORT ( 0xFF ) -#define USART_NOT_RE_IDX ( 3 ) -#define USART_DE_IDX ( 4 ) - -/* ----------------------- Static variables ---------------------------------*/ - -#if USART1_ENABLED == 1 -const Pin xUSART0Pins[] = { - PIN_USART0_TXD, - PIN_USART0_RXD -}; -#endif - -#if USART1_ENABLED == 1 -const Pin xUSART1NotREPin = { 1 << 25, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT }; -const Pin xUSART1DEPin = { 1 << 24, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT }; - -const Pin xUSART1Pins[] = { - PIN_USART1_TXD, - PIN_USART1_RXD, - {1 << 23, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} -}; -#endif - -const struct xUSARTHWMappings_t -{ - Usart *pUsart; - unsigned int xUSARTID; - IRQn_Type xUSARTIrq; - const Pin *USARTNotREPin; - const Pin *USARTDEPin; - const Pin *xUSARTPins; - uint32_t xUSARTPinsCnt; - - -} xUSARTHWMappings[] = -{ -#if USART0_ENABLED == 1 - { - USART0, ID_USART0, USART0_IRQn, NULL, NULL, &xUSART0Pins[0], PIO_LISTSIZE( xUSART0Pins )}, -#endif -#if USART1_ENABLED == 1 - { - USART1, ID_USART1, USART1_IRQn, &xUSART1NotREPin, &xUSART1DEPin, &xUSART1Pins[0], PIO_LISTSIZE( xUSART1Pins )}, -#endif -}; - -static UCHAR ucUsedPort = USART_INVALID_PORT; - -void -vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ - - if( xRxEnable ) - { - USART_SetReceiverEnabled( xUSARTHWMappings[ucUsedPort].pUsart, 1 ); - USART_EnableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IDR_RXRDY ); - } - else - { - USART_DisableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IDR_RXRDY ); - USART_SetReceiverEnabled( xUSARTHWMappings[ucUsedPort].pUsart, 0 ); - } - - if( xTxEnable ) - { - if( NULL != xUSARTHWMappings[ucUsedPort].USARTNotREPin ) - { - PIO_Set( xUSARTHWMappings[ucUsedPort].USARTNotREPin ); - } - if( NULL != xUSARTHWMappings[ucUsedPort].USARTDEPin ) - { - PIO_Set( xUSARTHWMappings[ucUsedPort].USARTDEPin ); - } - USART_SetTransmitterEnabled( xUSARTHWMappings[ucUsedPort].pUsart, 1 ); - USART_EnableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IER_TXRDY ); - USART_DisableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IER_TXEMPTY ); - } - else - { - USART_DisableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IDR_TXRDY ); - USART_EnableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IER_TXEMPTY ); - } -} - -BOOL -xMBPortSerialInit( UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - BOOL bStatus = FALSE; - uint32_t uiMode = US_MR_USART_MODE_NORMAL; - if( ( ucPORT <= USART_IDX_LAST ) ) - { - bStatus = TRUE; - switch ( eParity ) - { - case MB_PAR_NONE: - uiMode |= US_MR_PAR_NONE | US_MR_NBSTOP_2_BIT; - break; - case MB_PAR_ODD: - uiMode |= US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT; - break; - case MB_PAR_EVEN: - uiMode |= US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT; - break; - default: - bStatus = FALSE; - break; - } - - switch ( ucDataBits ) - { - case 8: - uiMode |= US_MR_CHRL_8_BITS; - break; - case 7: - uiMode |= US_MR_CHRL_7_BITS; - break; - default: - bStatus = FALSE; - } - - if( TRUE == bStatus ) - { - ucUsedPort = ucPORT; - - NVIC_DisableIRQ( xUSARTHWMappings[ucUsedPort].xUSARTIrq ); - - PIO_Configure( xUSARTHWMappings[ucUsedPort].xUSARTPins, xUSARTHWMappings[ucUsedPort].xUSARTPinsCnt ); - if( NULL != xUSARTHWMappings[ucUsedPort].USARTNotREPin ) - { - PIO_Configure( xUSARTHWMappings[ucUsedPort].USARTNotREPin, 1 ); - } - if( NULL != xUSARTHWMappings[ucUsedPort].USARTDEPin ) - { - PIO_Configure( xUSARTHWMappings[ucUsedPort].USARTDEPin, 1 ); - } - PMC_EnablePeripheral( xUSARTHWMappings[ucUsedPort].xUSARTID ); - USART_Configure( xUSARTHWMappings[ucUsedPort].pUsart, uiMode, ulBaudRate, BOARD_MCK ); - - NVIC_ClearPendingIRQ( xUSARTHWMappings[ucUsedPort].xUSARTIrq ); - NVIC_SetPriority( xUSARTHWMappings[ucUsedPort].xUSARTIrq, 0xF << 4 ); - NVIC_EnableIRQ( xUSARTHWMappings[ucUsedPort].xUSARTIrq ); - } - } - - return bStatus; -} - -void -vMBPortSerialClose( void ) -{ - if( USART_INVALID_PORT != ucUsedPort ) - { - NVIC_DisableIRQ( xUSARTHWMappings[ucUsedPort].xUSARTIrq ); - PMC_DisablePeripheral( xUSARTHWMappings[ucUsedPort].xUSARTID ); - if( NULL != xUSARTHWMappings[ucUsedPort].USARTNotREPin ) - { - PIO_Clear( xUSARTHWMappings[ucUsedPort].USARTDEPin ); - } - if( NULL != xUSARTHWMappings[ucUsedPort].USARTDEPin ) - { - PIO_Clear( xUSARTHWMappings[ucUsedPort].USARTNotREPin ); - } - ucUsedPort = USART_INVALID_PORT; - } -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - USART1->US_THR = ucByte; - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - *pucByte = USART1->US_RHR; - return TRUE; -} - -void -vUSARTHandler( void ) -{ - uint32_t uiCSR; - uint32_t uiIMR; - uiCSR = xUSARTHWMappings[ucUsedPort].pUsart->US_CSR; - uiIMR = xUSARTHWMappings[ucUsedPort].pUsart->US_IMR; - uint32_t uiCSRMasked = uiCSR & uiIMR; - if( uiCSRMasked & US_CSR_RXRDY ) - { - pxMBFrameCBByteReceived( ); - } - if( uiCSRMasked & US_CSR_TXRDY ) - { - pxMBFrameCBTransmitterEmpty( ); - } - if( uiCSRMasked & US_CSR_TXEMPTY ) - { - if( NULL != xUSARTHWMappings[ucUsedPort].USARTDEPin ) - { - PIO_Clear( xUSARTHWMappings[ucUsedPort].USARTDEPin ); - } - if( NULL != xUSARTHWMappings[ucUsedPort].USARTNotREPin ) - { - PIO_Clear( xUSARTHWMappings[ucUsedPort].USARTNotREPin ); - } - USART_DisableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IER_TXEMPTY ); - } -} - -#if USART1_ENABLED == 1 -void -USART1_IrqHandler( void ) -{ - vUSARTHandler( ); -} -#endif - -#if USART0_ENABLED == 1 -void -USART0_IrqHandler( void ) -{ - vUSARTHandler( ); -} -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/porttimer.c deleted file mode 100644 index aa239304..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S/port/porttimer.c +++ /dev/null @@ -1,149 +0,0 @@ -/* - * FreeModbus Libary: Atmel AT91SAM3S Demo Application - * Copyright (C) 2010 Christian Walter - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * IF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "port.h" -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ - - -#define MB_TIMER_DEBUG ( 0 ) -#define MB_TIMER_PRESCALER ( 128UL ) -#define MB_TIMER_TICKS ( BOARD_MCK / MB_TIMER_PRESCALER ) -#define MB_50US_TICKS ( 20000UL ) - -#define TCX ( TC0 ) -#define TCXIRQ ( TC0_IRQn ) -#define TCCHANNEL ( 0 ) -#define TCX_IRQHANDLER TC0_IrqHandler - -#define TC_CMRX_WAVE ( 0x1 << 15 ) -#define TC_CMRX_TCCLKS_TIMER_DIV4_CLOCK ( 0x3 << 0 ) -#define TC_CMRX_CPCSTOP ( 0x1 << 6 ) -#define TC_CMRX_WAVESEL_UP_RC ( 0x2 << 13 ) - -#define TC_IERX_CPCS ( 0x1 << 4 ) -#define TC_IERX_CPAS ( 0x1 << 2 ) -#define TC_SRX_CPAS ( 0x1 << 2 ) -#if MB_TIMER_DEBUG == 1 -#define TIMER_PIN { 1 << 6, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT } -#endif - -#ifndef SYSTICK_COUNTFLAG -/* missing in CMSIS */ -#define SYSTICK_COUNTFLAG ( 16 ) -#endif -/* ----------------------- Static variables ---------------------------------*/ -#if MB_TIMER_DEBUG == 1 -const static Pin xTimerDebugPins[] = { TIMER_PIN }; -#endif - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ -#if MB_TIMER_DEBUG == 1 - PIO_Configure( xTimerDebugPins, PIO_LISTSIZE( xTimerDebugPins ) ); -#endif - NVIC_DisableIRQ( TCXIRQ ); - - PMC_EnablePeripheral( ID_TC0 ); - TC_Configure( TCX, 0, TC_CMRX_WAVE | TC_CMRX_TCCLKS_TIMER_DIV4_CLOCK | TC_CMRX_WAVESEL_UP_RC | TC_CMRX_CPCSTOP ); - TCX->TC_CHANNEL[TCCHANNEL].TC_RA = ( MB_TIMER_TICKS * usTim1Timerout50us ) / ( MB_50US_TICKS ); - TCX->TC_CHANNEL[TCCHANNEL].TC_RC = ( MB_TIMER_TICKS * usTim1Timerout50us ) / ( MB_50US_TICKS ); - - NVIC_ClearPendingIRQ( TCXIRQ ); - NVIC_SetPriority( TCXIRQ, 0xF << 4 ); - NVIC_EnableIRQ( TCXIRQ ); - - return TRUE; -} - -void -vMBPortTimerClose( void ) -{ - NVIC_DisableIRQ( TCXIRQ ); - PMC_DisablePeripheral( ID_TC0 ); -} - -void -vMBPortTimersEnable( ) -{ -#if MB_TIMER_DEBUG == 1 - PIO_Set( &xTimerDebugPins[0] ); -#endif - TCX->TC_CHANNEL[TCCHANNEL].TC_IER = TC_IERX_CPAS; - TC_Start( TCX, 0 ); -} - -void -vMBPortTimersDisable( ) -{ - TC_Stop( TCX, 0 ); -#if MB_TIMER_DEBUG == 1 - PIO_Clear( &xTimerDebugPins[0] ); -#endif -} - -void -vMBPortTimersDelay( USHORT usTimeOutMS ) -{ - - SysTick->CTRL = 0; - SysTick->LOAD = BOARD_MCK / 1000; - SysTick->VAL = 0; /* Clear COUNTFLAG */ - SysTick->CTRL = ( 1 << SYSTICK_CLKSOURCE) | ( 1<CTRL & ( 1 << SYSTICK_COUNTFLAG ) ) ); - SysTick->VAL = 0; - usTimeOutMS--; - } -} - -void -TCX_IRQHANDLER( void ) -{ - uint32_t xTCX_IMRX = TCX->TC_CHANNEL[TCCHANNEL].TC_IMR; - uint32_t xTCX_SRX = TCX->TC_CHANNEL[TCCHANNEL].TC_SR; - uint32_t uiSRMasked = xTCX_SRX & xTCX_IMRX; - - if( ( uiSRMasked & TC_SRX_CPAS ) > 0 ) - { -#if MB_TIMER_DEBUG == 1 - PIO_Clear( &xTimerDebugPins[0] ); -#endif - ( void )pxMBPortCBTimerExpired( ); - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/README.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/README.txt deleted file mode 100644 index f459c700..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/README.txt +++ /dev/null @@ -1,68 +0,0 @@ - - FREEMODBUS 1.5 ATSAM3S EXAMPLE - ============================== - -REQUIREMENTS -============ - -This example contains a simple demo program for FreeMODBUS for the AT91SAM3S -Cortex M3 controllers on the SAM3S-EK [0] evaluation kit. It requires a wired -RS485 connection to a host processor and a MODBUS master software on the PC -side to be useful. Demo versions of MODBUS master stacks can be found in -[1], [2] and [3]. Commercial MODBUS stacks are available from [4]. - -INSTALLATION -============ -The SAM3S-EK evaluation board should be modified as following to enable RS485 -data transmission. - - - Place Jumpers JP11, JP10 and JP12 - - Place a solder drop accross R25 - -Warning: The RS485 shares data lines with USART1. It is therefore absolutely -necessary to set PA23 to a high level. - -SOURCE -====== - -TESTING -======= - -Start the MODBUS sample application and test if the input registers starting -at protocol address 1000 can be read. There are four registers values avai- -lable and the output should look like: - -Polling slave (Ctrl-C to stop) ... -[1000]: 6474 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... -[1000]: -8831 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... - -The simple testing utility used in the 'demo_rtu.bat' script can be found at -[3]. - -PROBLEMS -======== - -In case you can get no communication working make sure that the RS485 line is -biased correctly. The SAM3S-EK does not populate the RS485 bias resistors by -default and if you have a RS485 master which does not bias the lines either -you will get wrong characters. For this R24 and R30 on the bottom side of the -evaluation kit of the PCB should be populated. - -REFERENCES -========== - -[0] Atmel SAM3S-EK: http://www.atmel.com/dyn/products/tools_card_v2.asp?tool_id=4678 -[1] WinTech ModScan32: http://www.win-tech.com/html/modscan32.htm -[2] Modus Poll: http://www.modbustools.com/modbus_poll.asp -[3] FieldTalk Modpoll: http://www.focus-sw.com/fieldtalk/modpoll.html -[4] Embedded Solutions: http://www.embedded-solutions.at - -Version: $Id: README.txt,v 1.1 2010/06/06 13:07:19 wolti Exp $ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/AT91SAM3S4.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/AT91SAM3S4.h deleted file mode 100644 index a11e72a3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/AT91SAM3S4.h +++ /dev/null @@ -1,7010 +0,0 @@ -/* ---------------------------------------------------------------------------- */ -/* Atmel Microcontroller Software Support */ -/* ---------------------------------------------------------------------------- */ -/* Copyright (c) 2009, Atmel Corporation */ -/* */ -/* All rights reserved. */ -/* */ -/* Redistribution and use in source and binary forms, with or without */ -/* modification, are permitted provided that the following condition is met: */ -/* */ -/* - Redistributions of source code must retain the above copyright notice, */ -/* this list of conditions and the disclaimer below. */ -/* */ -/* Atmel's name may not be used to endorse or promote products derived from */ -/* this software without specific prior written permission. */ -/* */ -/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ -/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ -/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ -/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ -/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ -/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ -/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ -/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ -/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ -/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* ---------------------------------------------------------------------------- */ -/* */ -/* File Name : AT91SAM3S.h */ -/* Object : AT91SAM3S definitions */ -/* Generated by : AT91 SW Application Group */ -/* Generated on : 2009-10-26 */ - -#ifndef AT91SAM3S_H -#define AT91SAM3S_H - -/** \addtogroup AT91SAM3S_definitions AT91SAM3S definitions - This file defines all structures and symbols for AT91SAM3S: - - registers and bitfields - - peripheral base address - - peripheral ID - - PIO definitions -*/ -/*@{*/ - -#ifdef __cplusplus - extern "C" { -#endif - -#ifndef __ASSEMBLY__ -#include -#ifndef __cplusplus -typedef volatile const uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */ -#else -typedef volatile uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */ -#endif -typedef volatile uint32_t WoReg; /**< Write only 32-bit register (volatile unsigned int) */ -typedef volatile uint32_t RwReg; /**< Read-Write 32-bit register (volatile unsigned int) */ -#define CAST(type, value) ((type *) value) -#define REG_ACCESS(type, address) (*(type*)address) /**< C code: Register value */ -#else -#define CAST(type, value) (value) -#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */ -#endif - -/* ***************************************************************************** */ -/* CMSIS DEFINITIONS FOR AT91SAM3S */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3S_cmsis CMSIS Definitions */ - -/*@{*/ - -/** - * \brief Configuration of the Cortex-M3 Processor and Core Peripherals - */ -#define __MPU_PRESENT 0 /**< AT91SAM3S does not provide a MPU present or not */ -#define __NVIC_PRIO_BITS 4 /**< AT91SAM3S uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /**< Set to 1 if different SysTick Config is used */ - -/**< Interrupt Number Definition */ -typedef enum IRQn -{ -/****** Cortex-M3 Processor Exceptions Numbers ***************************************/ - NonMaskableInt_IRQn = -14, /**< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /**< 4 Cortex-M3 Memory Management Interrupt */ - BusFault_IRQn = -11, /**< 5 Cortex-M3 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /**< 6 Cortex-M3 Usage Fault Interrupt */ - SVCall_IRQn = -5, /**< 11 Cortex-M3 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /**< 12 Cortex-M3 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /**< 14 Cortex-M3 Pend SV Interrupt */ - SysTick_IRQn = -1, /**< 15 Cortex-M3 System Tick Interrupt */ -/****** AT91SAM3S specific Interrupt Numbers *****************************************/ - - SUPC_IRQn = 0, /**< 0 AT91SAM3S Supply Controller (SUPC) */ - RSTC_IRQn = 1, /**< 1 AT91SAM3S Reset Controller (RSTC) */ - RTC_IRQn = 2, /**< 2 AT91SAM3S Real Time Clock (RTC) */ - RTT_IRQn = 3, /**< 3 AT91SAM3S Real Time Timer (RTT) */ - WDT_IRQn = 4, /**< 4 AT91SAM3S Watchdog Timer (WDT) */ - PMC_IRQn = 5, /**< 5 AT91SAM3S Power Management Controller (PMC) */ - EFC_IRQn = 6, /**< 6 AT91SAM3S Enhanced Flash Controller (EFC) */ - UART0_IRQn = 8, /**< 8 AT91SAM3S UART 0 (UART0) */ - UART1_IRQn = 9, /**< 9 AT91SAM3S UART 1 (UART1) */ - SMC_IRQn = 10, /**< 10 AT91SAM3S Static Memory Controller (SMC) */ - PIOA_IRQn = 11, /**< 11 AT91SAM3S Parallel I/O Controller A (PIOA) */ - PIOB_IRQn = 12, /**< 12 AT91SAM3S Parallel I/O Controller B (PIOB) */ - PIOC_IRQn = 13, /**< 13 AT91SAM3S Parallel I/O Controller C (PIOC) */ - USART0_IRQn = 14, /**< 14 AT91SAM3S USART 0 (USART0) */ - USART1_IRQn = 15, /**< 15 AT91SAM3S USART 1 (USART1) */ - HSMCI_IRQn = 18, /**< 18 AT91SAM3S Multimedia Card Interface (HSMCI) */ - TWI0_IRQn = 19, /**< 19 AT91SAM3S Two Wire Interface 0 (TWI0) */ - TWI1_IRQn = 20, /**< 20 AT91SAM3S Two Wire Interface 1 (TWI1) */ - SPI_IRQn = 21, /**< 21 AT91SAM3S Serial Peripheral Interface (SPI) */ - SSC_IRQn = 22, /**< 22 AT91SAM3S Synchronous Serial Controler (SSC) */ - TC0_IRQn = 23, /**< 23 AT91SAM3S Timer/Counter 0 (TC0) */ - TC1_IRQn = 24, /**< 24 AT91SAM3S Timer/Counter 1 (TC1) */ - TC2_IRQn = 25, /**< 25 AT91SAM3S Timer/Counter 2 (TC2) */ - TC3_IRQn = 26, /**< 26 AT91SAM3S Timer/Counter 3 (TC3) */ - TC4_IRQn = 27, /**< 27 AT91SAM3S Timer/Counter 4 (TC4) */ - TC5_IRQn = 28, /**< 28 AT91SAM3S Timer/Counter 5 (TC5) */ - ADC_IRQn = 29, /**< 29 AT91SAM3S Analog To Digital Converter (ADC) */ - DACC_IRQn = 30, /**< 30 AT91SAM3S Digital To Analog Converter (DACC) */ - PWM_IRQn = 31, /**< 31 AT91SAM3S Pulse Width Modulation (PWM) */ - CRCCU_IRQn = 32, /**< 32 AT91SAM3S CRC Calculation Unit (CRCCU) */ - ACC_IRQn = 33, /**< 33 AT91SAM3S Analog Comparator (ACC) */ - UDP_IRQn = 34 /**< 34 AT91SAM3S USB Device Port (UDP) */ -} IRQn_Type; -/*@}*/ - -/* ***************************************************************************** */ -/** SOFTWARE PERIPHERAL API DEFINITION FOR AT91SAM3S */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3S_api Peripheral Software API */ -/*@{*/ -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Analog Comparator Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_ACC Analog Comparator Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Acc hardware registers */ -typedef struct { - WoReg ACC_CR; /**< \brief (Acc Offset: 0x00) Control Register */ - RwReg ACC_MR; /**< \brief (Acc Offset: 0x04) Mode Register */ - RwReg Reserved1[7]; - WoReg ACC_IER; /**< \brief (Acc Offset: 0x24) Interrupt Enable Register */ - WoReg ACC_IDR; /**< \brief (Acc Offset: 0x28) Interrupt Disable Register */ - RoReg ACC_IMR; /**< \brief (Acc Offset: 0x2C) Interrupt Mask Register */ - RoReg ACC_ISR; /**< \brief (Acc Offset: 0x30) Interrupt Status Register */ - RwReg Reserved2[24]; - RwReg ACC_ACR; /**< \brief (Acc Offset: 0x94) Analog Control Register */ - RwReg Reserved3[19]; - RwReg ACC_WPMR; /**< \brief (Acc Offset: 0xE4) Write Protect Mode Register */ - RoReg ACC_WPSR; /**< \brief (Acc Offset: 0xE8) Write Protect Status Register */ -} Acc; -#endif /* __ASSEMBLY__ */ -/* -------- ACC_CR : (ACC Offset: 0x00) Control Register -------- */ -#define ACC_CR_SWRST (0x1 << 0) /**< \brief (ACC_CR) SoftWare ReSeT */ -/* -------- ACC_MR : (ACC Offset: 0x04) Mode Register -------- */ -#define ACC_MR_SELPLUS (0x7 << 0) /**< \brief (ACC_MR) SELection for PLUS comparator input */ -#define ACC_MR_SELMINUS (0x7 << 4) /**< \brief (ACC_MR) SELection for MINUS comparator input */ -#define ACC_MR_ACEN (0x1 << 8) /**< \brief (ACC_MR) Analog Comparator ENable */ -#define ACC_MR_ACEN_EN (0x1 << 8) /**< \brief (ACC_MR) Analog Comparator ENable */ -#define ACC_MR_ACEN_DIS (0x0 << 8) /**< \brief (ACC_MR) Analog Comparator Disable */ -#define ACC_MR_EDGETYP (0x3 << 9) /**< \brief (ACC_MR) EDGE TYPe */ -#define ACC_MR_EDGETYP_RISING (0x0 << 9) /**< \brief (ACC_MR) EDGE TYPe ,RISING edge*/ -#define ACC_MR_EDGETYP_FALLING (0x1 << 9) /**< \brief (ACC_MR) EDGE TYPe,falling edge */ -#define ACC_MR_EDGETYP_ANY (0x2 << 9) /**< \brief (ACC_MR) EDGE TYPe,any edge */ -#define ACC_MR_INV (0x1 << 12) /**< \brief (ACC_MR) INVert comparator output */ -#define ACC_MR_INV_EN (0x1 << 12) /**< \brief (ACC_MR) INVert comparator output */ -#define ACC_MR_INV_DIS (0x0 << 12) /**< \brief (ACC_MR) DIRECTLY */ -#define ACC_MR_SELFS (0x1 << 13) /**< \brief (ACC_MR) SELection of Fault Source */ -#define ACC_MR_SELFS_CF (0x0 << 13) /**< \brief (ACC_MR) SELection of Fault Source */ -#define ACC_MR_SELFS_OUTPUT (0x1 << 13) /**< \brief (ACC_MR) SELection of Fault Source */ -#define ACC_MR_FE (0x1 << 14) /**< \brief (ACC_MR) Fault Enable */ -#define ACC_MR_FE_EN (0x1 << 14) /**< \brief (ACC_MR) Fault Enable */ -#define ACC_MR_FE_DIS (0x0 << 14) /**< \brief (ACC_MR) Fault Enable */ -/* -------- ACC_IER : (ACC Offset: 0x24) Interrupt Enable Register -------- */ -#define ACC_IER_CE (0x1 << 0) /**< \brief (ACC_IER) Comparison Edge */ -/* -------- ACC_IDR : (ACC Offset: 0x28) Interrupt Disable Register -------- */ -#define ACC_IDR_CE (0x1 << 0) /**< \brief (ACC_IDR) Comparison Edge */ -/* -------- ACC_IMR : (ACC Offset: 0x2C) Interrupt Mask Register -------- */ -#define ACC_IMR_CE (0x1 << 0) /**< \brief (ACC_IMR) Comparison Edge */ -/* -------- ACC_ISR : (ACC Offset: 0x30) Interrupt Status Register -------- */ -#define ACC_ISR_CE (0x1 << 0) /**< \brief (ACC_ISR) Comparison Edge */ -#define ACC_ISR_SCO (0x1 << 1) /**< \brief (ACC_ISR) Synchronized Comparator Output */ -#define ACC_ISR_MASK (0x1 << 31) /**< \brief (ACC_ISR) */ -/* -------- ACC_ACR : (ACC Offset: 0x94) Analog Control Register -------- */ -#define ACC_ACR_ISEL (0x1 << 0) /**< \brief (ACC_ACR) Current SELection */ -#define ACC_ACR_HYST (0x3 << 1) /**< \brief (ACC_ACR) HYSTeresis selection */ -/* -------- ACC_WPMR : (ACC Offset: 0xE4) Write Protect Mode Register -------- */ -#define ACC_WPMR_WPEN (0x1 << 0) /**< \brief (ACC_WPMR) Write Protect Enable */ -#define ACC_WPMR_WPKEY (0xffffff << 8) /**< \brief (ACC_WPMR) Write Protect KEY */ -/* -------- ACC_WPSR : (ACC Offset: 0xE8) Write Protect Status Register -------- */ -#define ACC_WPSR_WPROTERR (0x1 << 0) /**< \brief (ACC_WPSR) Write PROTection ERRor */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Analog-to-digital Converter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_ADC Analog-to-digital Converter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Adc hardware registers */ -typedef struct { - WoReg ADC_CR; /**< \brief (Adc Offset: 0x00) Control Register */ - RwReg ADC_MR; /**< \brief (Adc Offset: 0x04) Mode Register */ - RwReg ADC_SEQ1R; /**< \brief (Adc Offset: 0x08) Channel Sequence 1Register */ - RwReg ADC_SEQ2R; /**< \brief (Adc Offset: 0x0C) Channel Sequence 2 Register */ - WoReg ADC_CHER; /**< \brief (Adc Offset: 0x10) Channel Enable Register */ - WoReg ADC_CHDR; /**< \brief (Adc Offset: 0x14) Channel Disable Register */ - RoReg ADC_CHSR; /**< \brief (Adc Offset: 0x18) Channel Status Register */ - RwReg Reserved1[1]; - RoReg ADC_LCDR; /**< \brief (Adc Offset: 0x20) Last Converted Data Register */ - WoReg ADC_IER; /**< \brief (Adc Offset: 0x24) Interrupt Enable Register */ - WoReg ADC_IDR; /**< \brief (Adc Offset: 0x28) Interrupt Disable Register */ - RoReg ADC_IMR; /**< \brief (Adc Offset: 0x2C) Interrupt Mask Register */ - RoReg ADC_ISR; /**< \brief (Adc Offset: 0x30) Interrupt Status Register */ - RwReg Reserved2[2]; - RoReg ADC_OVER; /**< \brief (Adc Offset: 0x3C) Overrun Status Register */ - RwReg ADC_EMR; /**< \brief (Adc Offset: 0x40) Extended Mode Register */ - RwReg ADC_CWR; /**< \brief (Adc Offset: 0x44) Compare Window Register */ - RwReg ADC_CGR; /**< \brief (Adc Offset: 0x48) Channel Gain Register */ - RwReg ADC_COR; /**< \brief (Adc Offset: 0x4C) Channel Offset Register */ - RoReg ADC_CDR0; /**< \brief (Adc Offset: 0x50) Channel Data Register 0 */ - RoReg ADC_CDR1; /**< \brief (Adc Offset: 0x54) Channel Data Register 1 */ - RoReg ADC_CDR2; /**< \brief (Adc Offset: 0x58) Channel Data Register 2 */ - RoReg ADC_CDR3; /**< \brief (Adc Offset: 0x5C) Channel Data Register 3 */ - RoReg ADC_CDR4; /**< \brief (Adc Offset: 0x60) Channel Data Register 4 */ - RoReg ADC_CDR5; /**< \brief (Adc Offset: 0x64) Channel Data Register 5 */ - RoReg ADC_CDR6; /**< \brief (Adc Offset: 0x68) Channel Data Register 6 */ - RoReg ADC_CDR7; /**< \brief (Adc Offset: 0x6C) Channel Data Register 7 */ - RoReg ADC_CDR8; /**< \brief (Adc Offset: 0x70) Channel Data Register 8 */ - RoReg ADC_CDR9; /**< \brief (Adc Offset: 0x74) Channel Data Register 9 */ - RoReg ADC_CDR10; /**< \brief (Adc Offset: 0x78) Channel Data Register 10 */ - RoReg ADC_CDR11; /**< \brief (Adc Offset: 0x7C) Channel Data Register 11 */ - RoReg ADC_CDR12; /**< \brief (Adc Offset: 0x80) Channel Data Register 12 */ - RoReg ADC_CDR13; /**< \brief (Adc Offset: 0x84) Channel Data Register 13 */ - RoReg ADC_CDR14; /**< \brief (Adc Offset: 0x88) Channel Data Register 14 */ - RoReg ADC_CDR15; /**< \brief (Adc Offset: 0x8C) Channel Data Register 15 */ - RwReg Reserved3[1]; - RwReg ADC_ACR; /**< \brief (Adc Offset: 0x94) Analog Control Register */ - RwReg Reserved4[19]; - RwReg ADC_WPMR; /**< \brief (Adc Offset: 0xE4) Write Protect Mode Register */ - RoReg ADC_WPSR; /**< \brief (Adc Offset: 0xE8) Write Protect Status Register */ - RwReg Reserved5[5]; - RwReg ADC_RPR; /**< \brief (Adc Offset: 0x100) Receive Pointer Register */ - RwReg ADC_RCR; /**< \brief (Adc Offset: 0x104) Receive Counter Register */ - RwReg ADC_TPR; /**< \brief (Adc Offset: 0x108) Transmit Pointer Register */ - RwReg ADC_TCR; /**< \brief (Adc Offset: 0x10C) Transmit Counter Register */ - RwReg ADC_RNPR; /**< \brief (Adc Offset: 0x110) Receive Next Pointer Register */ - RwReg ADC_RNCR; /**< \brief (Adc Offset: 0x114) Receive Next Counter Register */ - RwReg ADC_TNPR; /**< \brief (Adc Offset: 0x118) Transmit Next Pointer Register */ - RwReg ADC_TNCR; /**< \brief (Adc Offset: 0x11C) Transmit Next Counter Register */ - WoReg ADC_PTCR; /**< \brief (Adc Offset: 0x120) Transfer Control Register */ - RoReg ADC_PTSR; /**< \brief (Adc Offset: 0x124) Transfer Status Register */ -} Adc; -#endif /* __ASSEMBLY__ */ -/* -------- ADC_CR : (ADC Offset: 0x00) Control Register -------- */ -#define ADC_CR_SWRST (0x1 << 0) /**< \brief (ADC_CR) Software Reset */ -#define ADC_CR_START (0x1 << 1) /**< \brief (ADC_CR) Start Conversion */ -/* -------- ADC_MR : (ADC Offset: 0x04) Mode Register -------- */ -#define ADC_MR_TRGEN (0x1 << 0) /**< \brief (ADC_MR) Trigger Enable */ -#define ADC_MR_TRGEN_DIS (0x0 << 0) /**< \brief (ADC_MR) Hardware triggers are disabled. Starting a conversion is only possible by software.*/ -#define ADC_MR_TRGEN_EN (0x1) /**< (ADC) Hardware trigger selected by TRGSEL field is enabled.*/ -#define ADC_MR_TRGSEL (0x7 << 1) /**< \brief (ADC_MR) Trigger Selection */ -#define ADC_MR_TRGSEL_EXT (0x0 << 1) /**< \brief (ADC_MR) Selected TRGSEL = External Trigger*/ -#define ADC_MR_TRGSEL_TIOA0 (0x1 << 1) /**< \brief (ADC_MR) Selected TRGSEL = TIAO0*/ -#define ADC_MR_TRGSEL_TIOA1 (0x2 << 1) /**< \brief (ADC_MR) Selected TRGSEL = TIAO1*/ -#define ADC_MR_TRGSEL_TIOA2 (0x3 << 1) /**< \brief (ADC_MR) Selected TRGSEL = TIAO2*/ -#define ADC_MR_TRGSEL_PWM0_TRIG (0x4 << 1) /**< \brief (ADC_MR) Selected TRGSEL = PWM trigger*/ -#define ADC_MR_TRGSEL_PWM1_TRIG (0x5 << 1) /**< \brief (ADC_MR) Selected TRGSEL = PWM Trigger*/ -#define ADC_MR_TRGSEL_RESERVED (0x6 << 1) /**< \brief (ADC_MR) Selected TRGSEL = Reserved*/ -#define ADC_MR_LOWRES (0x1 << 4) /**< \brief (ADC_MR) Resolution */ -#define ADC_MR_LOWRES_12_BIT (0x0 << 4) /**< \brief (ADC_MR) 12-bit resolution*/ -#define ADC_MR_LOWRES_10_BIT (0x1 << 4) /**< \brief (ADC_MR) 10-bit resolution*/ -#define ADC_MR_SLEEP (0x1 << 5) /**< \brief (ADC_MR) Sleep Mode */ -#define ADC_MR_SLEEP_NORMAL (0x0 << 5) /**< \brief (ADC12B) Normal Mode*/ -#define ADC_MR_FWUP (0x1 << 6) /**< \brief (ADC_MR) Fast Wake Up */ -#define ADC_MR_FREERUN (0x1 << 7) /**< \brief (ADC_MR) Free Run Mode */ -#define ADC_MR_PRESCAL (0xff << 8) /**< \brief (ADC_MR) Prescaler Rate Selection */ -#define ADC_MR_STARTUP (0xf << 16) /**< \brief (ADC_MR) Start Up Time */ -#define ADC_MR_SETTLING (0x3 << 20) /**< \brief (ADC_MR) Analog Settling Time */ -#define ADC_MR_ANACH (0x1 << 23) /**< \brief (ADC_MR) Analog Change */ -#define ADC_MR_TRACKTIM (0xf << 24) /**< \brief (ADC_MR) Tracking Time */ -#define ADC_MR_TRANSFER (0x3 << 28) /**< \brief (ADC_MR) */ -#define ADC_MR_USEQ (0x1 << 31) /**< \brief (ADC_MR) User Sequence Enable */ -/* -------- ADC_SEQ1R : (ADC Offset: 0x08) Channel Sequence 1Register -------- */ -#define ADC_SEQ1R_USCH1 (0x7 << 0) /**< \brief (ADC_SEQ1R) User Sequence Number 1 */ -#define ADC_SEQ1R_USCH2 (0x7 << 4) /**< \brief (ADC_SEQ1R) User Sequence Number 2 */ -#define ADC_SEQ1R_USCH3 (0x7 << 8) /**< \brief (ADC_SEQ1R) User Sequence Number 3 */ -#define ADC_SEQ1R_USCH4 (0x7 << 12) /**< \brief (ADC_SEQ1R) User Sequence Number 4 */ -#define ADC_SEQ1R_USCH5 (0x7 << 16) /**< \brief (ADC_SEQ1R) User Sequence Number 5 */ -#define ADC_SEQ1R_USCH6 (0x7 << 20) /**< \brief (ADC_SEQ1R) User Sequence Number 6 */ -#define ADC_SEQ1R_USCH7 (0x7 << 24) /**< \brief (ADC_SEQ1R) User Sequence Number 7 */ -#define ADC_SEQ1R_USCH8 (0x7 << 28) /**< \brief (ADC_SEQ1R) User Sequence Number 8 */ -/* -------- ADC_SEQ2R : (ADC Offset: 0x0C) Channel Sequence 2 Register -------- */ -#define ADC_SEQ2R_USCH9 (0x7 << 0) /**< \brief (ADC_SEQ2R) User Sequence Number 9 */ -#define ADC_SEQ2R_USCH10 (0x7 << 4) /**< \brief (ADC_SEQ2R) User Sequence Number 10 */ -#define ADC_SEQ2R_USCH11 (0x7 << 8) /**< \brief (ADC_SEQ2R) User Sequence Number 11 */ -#define ADC_SEQ2R_USCH12 (0x7 << 12) /**< \brief (ADC_SEQ2R) User Sequence Number 12 */ -#define ADC_SEQ2R_USCH13 (0x7 << 16) /**< \brief (ADC_SEQ2R) User Sequence Number 13 */ -#define ADC_SEQ2R_USCH14 (0x7 << 20) /**< \brief (ADC_SEQ2R) User Sequence Number 14 */ -#define ADC_SEQ2R_USCH15 (0x7 << 24) /**< \brief (ADC_SEQ2R) User Sequence Number 15 */ -#define ADC_SEQ2R_USCH16 (0x7 << 28) /**< \brief (ADC_SEQ2R) User Sequence Number 16 */ -/* -------- ADC_CHER : (ADC Offset: 0x10) Channel Enable Register -------- */ -#define ADC_CHER_CH0 (0x1 << 0) /**< \brief (ADC_CHER) Channel 0 Enable */ -#define ADC_CHER_CH1 (0x1 << 1) /**< \brief (ADC_CHER) Channel 1 Enable */ -#define ADC_CHER_CH2 (0x1 << 2) /**< \brief (ADC_CHER) Channel 2 Enable */ -#define ADC_CHER_CH3 (0x1 << 3) /**< \brief (ADC_CHER) Channel 3 Enable */ -#define ADC_CHER_CH4 (0x1 << 4) /**< \brief (ADC_CHER) Channel 4 Enable */ -#define ADC_CHER_CH5 (0x1 << 5) /**< \brief (ADC_CHER) Channel 5 Enable */ -#define ADC_CHER_CH6 (0x1 << 6) /**< \brief (ADC_CHER) Channel 6 Enable */ -#define ADC_CHER_CH7 (0x1 << 7) /**< \brief (ADC_CHER) Channel 7 Enable */ -#define ADC_CHER_CH8 (0x1 << 8) /**< \brief (ADC_CHER) Channel 8 Enable */ -#define ADC_CHER_CH9 (0x1 << 9) /**< \brief (ADC_CHER) Channel 9 Enable */ -#define ADC_CHER_CH10 (0x1 << 10) /**< \brief (ADC_CHER) Channel 10 Enable */ -#define ADC_CHER_CH11 (0x1 << 11) /**< \brief (ADC_CHER) Channel 11 Enable */ -#define ADC_CHER_CH12 (0x1 << 12) /**< \brief (ADC_CHER) Channel 12 Enable */ -#define ADC_CHER_CH13 (0x1 << 13) /**< \brief (ADC_CHER) Channel 13 Enable */ -#define ADC_CHER_CH14 (0x1 << 14) /**< \brief (ADC_CHER) Channel 14 Enable */ -#define ADC_CHER_CH15 (0x1 << 15) /**< \brief (ADC_CHER) Channel 15 Enable */ -/* -------- ADC_CHDR : (ADC Offset: 0x14) Channel Disable Register -------- */ -#define ADC_CHDR_CH0 (0x1 << 0) /**< \brief (ADC_CHDR) Channel 0 Disable */ -#define ADC_CHDR_CH1 (0x1 << 1) /**< \brief (ADC_CHDR) Channel 1 Disable */ -#define ADC_CHDR_CH2 (0x1 << 2) /**< \brief (ADC_CHDR) Channel 2 Disable */ -#define ADC_CHDR_CH3 (0x1 << 3) /**< \brief (ADC_CHDR) Channel 3 Disable */ -#define ADC_CHDR_CH4 (0x1 << 4) /**< \brief (ADC_CHDR) Channel 4 Disable */ -#define ADC_CHDR_CH5 (0x1 << 5) /**< \brief (ADC_CHDR) Channel 5 Disable */ -#define ADC_CHDR_CH6 (0x1 << 6) /**< \brief (ADC_CHDR) Channel 6 Disable */ -#define ADC_CHDR_CH7 (0x1 << 7) /**< \brief (ADC_CHDR) Channel 7 Disable */ -#define ADC_CHDR_CH8 (0x1 << 8) /**< \brief (ADC_CHDR) Channel 8 Disable */ -#define ADC_CHDR_CH9 (0x1 << 9) /**< \brief (ADC_CHDR) Channel 9 Disable */ -#define ADC_CHDR_CH10 (0x1 << 10) /**< \brief (ADC_CHDR) Channel 10 Disable */ -#define ADC_CHDR_CH11 (0x1 << 11) /**< \brief (ADC_CHDR) Channel 11 Disable */ -#define ADC_CHDR_CH12 (0x1 << 12) /**< \brief (ADC_CHDR) Channel 12 Disable */ -#define ADC_CHDR_CH13 (0x1 << 13) /**< \brief (ADC_CHDR) Channel 13 Disable */ -#define ADC_CHDR_CH14 (0x1 << 14) /**< \brief (ADC_CHDR) Channel 14 Disable */ -#define ADC_CHDR_CH15 (0x1 << 15) /**< \brief (ADC_CHDR) Channel 15 Disable */ -/* -------- ADC_CHSR : (ADC Offset: 0x18) Channel Status Register -------- */ -#define ADC_CHSR_CH0 (0x1 << 0) /**< \brief (ADC_CHSR) Channel 0 Status */ -#define ADC_CHSR_CH1 (0x1 << 1) /**< \brief (ADC_CHSR) Channel 1 Status */ -#define ADC_CHSR_CH2 (0x1 << 2) /**< \brief (ADC_CHSR) Channel 2 Status */ -#define ADC_CHSR_CH3 (0x1 << 3) /**< \brief (ADC_CHSR) Channel 3 Status */ -#define ADC_CHSR_CH4 (0x1 << 4) /**< \brief (ADC_CHSR) Channel 4 Status */ -#define ADC_CHSR_CH5 (0x1 << 5) /**< \brief (ADC_CHSR) Channel 5 Status */ -#define ADC_CHSR_CH6 (0x1 << 6) /**< \brief (ADC_CHSR) Channel 6 Status */ -#define ADC_CHSR_CH7 (0x1 << 7) /**< \brief (ADC_CHSR) Channel 7 Status */ -#define ADC_CHSR_CH8 (0x1 << 8) /**< \brief (ADC_CHSR) Channel 8 Status */ -#define ADC_CHSR_CH9 (0x1 << 9) /**< \brief (ADC_CHSR) Channel 9 Status */ -#define ADC_CHSR_CH10 (0x1 << 10) /**< \brief (ADC_CHSR) Channel 10 Status */ -#define ADC_CHSR_CH11 (0x1 << 11) /**< \brief (ADC_CHSR) Channel 11 Status */ -#define ADC_CHSR_CH12 (0x1 << 12) /**< \brief (ADC_CHSR) Channel 12 Status */ -#define ADC_CHSR_CH13 (0x1 << 13) /**< \brief (ADC_CHSR) Channel 13 Status */ -#define ADC_CHSR_CH14 (0x1 << 14) /**< \brief (ADC_CHSR) Channel 14 Status */ -#define ADC_CHSR_CH15 (0x1 << 15) /**< \brief (ADC_CHSR) Channel 15 Status */ -/* -------- ADC_LCDR : (ADC Offset: 0x20) Last Converted Data Register -------- */ -#define ADC_LCDR_LDATA (0xfff << 0) /**< \brief (ADC_LCDR) Last Data Converted */ -#define ADC_LCDR_CHNB (0xf << 12) /**< \brief (ADC_LCDR) Channel Number */ -/* -------- ADC_IER : (ADC Offset: 0x24) Interrupt Enable Register -------- */ -#define ADC_IER_EOC0 (0x1 << 0) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 0 */ -#define ADC_IER_EOC1 (0x1 << 1) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 1 */ -#define ADC_IER_EOC2 (0x1 << 2) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 2 */ -#define ADC_IER_EOC3 (0x1 << 3) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 3 */ -#define ADC_IER_EOC4 (0x1 << 4) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 4 */ -#define ADC_IER_EOC5 (0x1 << 5) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 5 */ -#define ADC_IER_EOC6 (0x1 << 6) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 6 */ -#define ADC_IER_EOC7 (0x1 << 7) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 7 */ -#define ADC_IER_EOC8 (0x1 << 8) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 8 */ -#define ADC_IER_EOC9 (0x1 << 9) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 9 */ -#define ADC_IER_EOC10 (0x1 << 10) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 10 */ -#define ADC_IER_EOC11 (0x1 << 11) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 11 */ -#define ADC_IER_EOC12 (0x1 << 12) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 12 */ -#define ADC_IER_EOC13 (0x1 << 13) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 13 */ -#define ADC_IER_EOC14 (0x1 << 14) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 14 */ -#define ADC_IER_EOC15 (0x1 << 15) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 15 */ -#define ADC_IER_DRDY (0x1 << 24) /**< \brief (ADC_IER) Data Ready Interrupt Enable */ -#define ADC_IER_GOVRE (0x1 << 25) /**< \brief (ADC_IER) General Overrun Error Interrupt Enable */ -#define ADC_IER_COMPE (0x1 << 26) /**< \brief (ADC_IER) Comparison Event Interrupt Enable */ -#define ADC_IER_ENDRX (0x1 << 27) /**< \brief (ADC_IER) End of Receive Buffer Interrupt Enable */ -#define ADC_IER_RXBUFF (0x1 << 28) /**< \brief (ADC_IER) Receive Buffer Full Interrupt Enable */ -/* -------- ADC_IDR : (ADC Offset: 0x28) Interrupt Disable Register -------- */ -#define ADC_IDR_EOC0 (0x1 << 0) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 0 */ -#define ADC_IDR_EOC1 (0x1 << 1) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 1 */ -#define ADC_IDR_EOC2 (0x1 << 2) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 2 */ -#define ADC_IDR_EOC3 (0x1 << 3) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 3 */ -#define ADC_IDR_EOC4 (0x1 << 4) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 4 */ -#define ADC_IDR_EOC5 (0x1 << 5) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 5 */ -#define ADC_IDR_EOC6 (0x1 << 6) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 6 */ -#define ADC_IDR_EOC7 (0x1 << 7) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 7 */ -#define ADC_IDR_EOC8 (0x1 << 8) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 8 */ -#define ADC_IDR_EOC9 (0x1 << 9) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 9 */ -#define ADC_IDR_EOC10 (0x1 << 10) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 10 */ -#define ADC_IDR_EOC11 (0x1 << 11) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 11 */ -#define ADC_IDR_EOC12 (0x1 << 12) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 12 */ -#define ADC_IDR_EOC13 (0x1 << 13) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 13 */ -#define ADC_IDR_EOC14 (0x1 << 14) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 14 */ -#define ADC_IDR_EOC15 (0x1 << 15) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 15 */ -#define ADC_IDR_DRDY (0x1 << 24) /**< \brief (ADC_IDR) Data Ready Interrupt Disable */ -#define ADC_IDR_GOVRE (0x1 << 25) /**< \brief (ADC_IDR) General Overrun Error Interrupt Disable */ -#define ADC_IDR_COMPE (0x1 << 26) /**< \brief (ADC_IDR) Comparison Event Interrupt Disable */ -#define ADC_IDR_ENDRX (0x1 << 27) /**< \brief (ADC_IDR) End of Receive Buffer Interrupt Disable */ -#define ADC_IDR_RXBUFF (0x1 << 28) /**< \brief (ADC_IDR) Receive Buffer Full Interrupt Disable */ -/* -------- ADC_IMR : (ADC Offset: 0x2C) Interrupt Mask Register -------- */ -#define ADC_IMR_EOC0 (0x1 << 0) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 0 */ -#define ADC_IMR_EOC1 (0x1 << 1) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 1 */ -#define ADC_IMR_EOC2 (0x1 << 2) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 2 */ -#define ADC_IMR_EOC3 (0x1 << 3) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 3 */ -#define ADC_IMR_EOC4 (0x1 << 4) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 4 */ -#define ADC_IMR_EOC5 (0x1 << 5) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 5 */ -#define ADC_IMR_EOC6 (0x1 << 6) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 6 */ -#define ADC_IMR_EOC7 (0x1 << 7) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 7 */ -#define ADC_IMR_EOC8 (0x1 << 8) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 8 */ -#define ADC_IMR_EOC9 (0x1 << 9) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 9 */ -#define ADC_IMR_EOC10 (0x1 << 10) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 10 */ -#define ADC_IMR_EOC11 (0x1 << 11) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 11 */ -#define ADC_IMR_EOC12 (0x1 << 12) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 12 */ -#define ADC_IMR_EOC13 (0x1 << 13) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 13 */ -#define ADC_IMR_EOC14 (0x1 << 14) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 14 */ -#define ADC_IMR_EOC15 (0x1 << 15) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 15 */ -#define ADC_IMR_DRDY (0x1 << 24) /**< \brief (ADC_IMR) Data Ready Interrupt Mask */ -#define ADC_IMR_GOVRE (0x1 << 25) /**< \brief (ADC_IMR) General Overrun Error Interrupt Mask */ -#define ADC_IMR_COMPE (0x1 << 26) /**< \brief (ADC_IMR) Comparison Event Interrupt Mask */ -#define ADC_IMR_ENDRX (0x1 << 27) /**< \brief (ADC_IMR) End of Receive Buffer Interrupt Mask */ -#define ADC_IMR_RXBUFF (0x1 << 28) /**< \brief (ADC_IMR) Receive Buffer Full Interrupt Mask */ -/* -------- ADC_ISR : (ADC Offset: 0x30) Interrupt Status Register -------- */ -#define ADC_ISR_EOC0 (0x1 << 0) /**< \brief (ADC_ISR) End of Conversion 0 */ -#define ADC_ISR_EOC1 (0x1 << 1) /**< \brief (ADC_ISR) End of Conversion 1 */ -#define ADC_ISR_EOC2 (0x1 << 2) /**< \brief (ADC_ISR) End of Conversion 2 */ -#define ADC_ISR_EOC3 (0x1 << 3) /**< \brief (ADC_ISR) End of Conversion 3 */ -#define ADC_ISR_EOC4 (0x1 << 4) /**< \brief (ADC_ISR) End of Conversion 4 */ -#define ADC_ISR_EOC5 (0x1 << 5) /**< \brief (ADC_ISR) End of Conversion 5 */ -#define ADC_ISR_EOC6 (0x1 << 6) /**< \brief (ADC_ISR) End of Conversion 6 */ -#define ADC_ISR_EOC7 (0x1 << 7) /**< \brief (ADC_ISR) End of Conversion 7 */ -#define ADC_ISR_EOC8 (0x1 << 8) /**< \brief (ADC_ISR) End of Conversion 8 */ -#define ADC_ISR_EOC9 (0x1 << 9) /**< \brief (ADC_ISR) End of Conversion 9 */ -#define ADC_ISR_EOC10 (0x1 << 10) /**< \brief (ADC_ISR) End of Conversion 10 */ -#define ADC_ISR_EOC11 (0x1 << 11) /**< \brief (ADC_ISR) End of Conversion 11 */ -#define ADC_ISR_EOC12 (0x1 << 12) /**< \brief (ADC_ISR) End of Conversion 12 */ -#define ADC_ISR_EOC13 (0x1 << 13) /**< \brief (ADC_ISR) End of Conversion 13 */ -#define ADC_ISR_EOC14 (0x1 << 14) /**< \brief (ADC_ISR) End of Conversion 14 */ -#define ADC_ISR_EOC15 (0x1 << 15) /**< \brief (ADC_ISR) End of Conversion 15 */ -#define ADC_ISR_DRDY (0x1 << 24) /**< \brief (ADC_ISR) Data Ready */ -#define ADC_ISR_GOVRE (0x1 << 25) /**< \brief (ADC_ISR) General Overrun Error */ -#define ADC_ISR_COMPE (0x1 << 26) /**< \brief (ADC_ISR) Comparison Error */ -#define ADC_ISR_ENDRX (0x1 << 27) /**< \brief (ADC_ISR) End of RX Buffer */ -#define ADC_ISR_RXBUFF (0x1 << 28) /**< \brief (ADC_ISR) RX Buffer Full */ -/* -------- ADC_OVER : (ADC Offset: 0x3C) Overrun Status Register -------- */ -#define ADC_OVER_OVRE0 (0x1 << 0) /**< \brief (ADC_OVER) Overrun Error 0 */ -#define ADC_OVER_OVRE1 (0x1 << 1) /**< \brief (ADC_OVER) Overrun Error 1 */ -#define ADC_OVER_OVRE2 (0x1 << 2) /**< \brief (ADC_OVER) Overrun Error 2 */ -#define ADC_OVER_OVRE3 (0x1 << 3) /**< \brief (ADC_OVER) Overrun Error 3 */ -#define ADC_OVER_OVRE4 (0x1 << 4) /**< \brief (ADC_OVER) Overrun Error 4 */ -#define ADC_OVER_OVRE5 (0x1 << 5) /**< \brief (ADC_OVER) Overrun Error 5 */ -#define ADC_OVER_OVRE6 (0x1 << 6) /**< \brief (ADC_OVER) Overrun Error 6 */ -#define ADC_OVER_OVRE7 (0x1 << 7) /**< \brief (ADC_OVER) Overrun Error 7 */ -#define ADC_OVER_OVRE8 (0x1 << 8) /**< \brief (ADC_OVER) Overrun Error 8 */ -#define ADC_OVER_OVRE9 (0x1 << 9) /**< \brief (ADC_OVER) Overrun Error 9 */ -#define ADC_OVER_OVRE10 (0x1 << 10) /**< \brief (ADC_OVER) Overrun Error 10 */ -#define ADC_OVER_OVRE11 (0x1 << 11) /**< \brief (ADC_OVER) Overrun Error 11 */ -#define ADC_OVER_OVRE12 (0x1 << 12) /**< \brief (ADC_OVER) Overrun Error 12 */ -#define ADC_OVER_OVRE13 (0x1 << 13) /**< \brief (ADC_OVER) Overrun Error 13 */ -#define ADC_OVER_OVRE14 (0x1 << 14) /**< \brief (ADC_OVER) Overrun Error 14 */ -#define ADC_OVER_OVRE15 (0x1 << 15) /**< \brief (ADC_OVER) Overrun Error 15 */ -/* -------- ADC_EMR : (ADC Offset: 0x40) Extended Mode Register -------- */ -#define ADC_EMR_CMPMODE (0x3 << 0) /**< \brief (ADC_EMR) Comparison Mode */ -#define ADC_EMR_CMPMODE_LOW (0x0 << 0) /**< \brief (ADC_EMR) Comparison Mode,lower than low threshold */ -#define ADC_EMR_CMPMODE_HIGH (0x1 << 0) /**< \brief (ADC_EMR) Comparison Mode,higher than high threshold */ -#define ADC_EMR_CMPMODE_IN (0x2 << 0) /**< \brief (ADC_EMR) Comparison Mode, in the comparison window */ -#define ADC_EMR_CMPMODE_OUT (0x3 << 0) /**< \brief (ADC_EMR) Comparison Mode, out of the comparison window */ -#define ADC_EMR_CMPSEL (0xf << 4) /**< \brief (ADC_EMR) Comparison Selected Channel */ -#define ADC_EMR_CMPALL (0x1 << 9) /**< \brief (ADC_EMR) Compare All Channels */ -#define ADC_EMR_TAG (0x1 << 24) /**< \brief (ADC_EMR) TAG of ADC_LDCR register */ -/* -------- ADC_CWR : (ADC Offset: 0x44) Compare Window Register -------- */ -#define ADC_CWR_LOWTHRES (0xfff << 0) /**< \brief (ADC_CWR) Low Threshold */ -#define ADC_CWR_HIGHTHRES (0xfff << 16) /**< \brief (ADC_CWR) High Threshold */ -/* -------- ADC_CGR : (ADC Offset: 0x48) Channel Gain Register -------- */ -#define ADC_CGR_GAIN0 (0x3 << 0) /**< \brief (ADC_CGR) Gain for channel 0 */ -#define ADC_CGR_GAIN1 (0x3 << 2) /**< \brief (ADC_CGR) Gain for channel 1 */ -#define ADC_CGR_GAIN2 (0x3 << 4) /**< \brief (ADC_CGR) Gain for channel 2 */ -#define ADC_CGR_GAIN3 (0x3 << 6) /**< \brief (ADC_CGR) Gain for channel 3 */ -#define ADC_CGR_GAIN4 (0x3 << 8) /**< \brief (ADC_CGR) Gain for channel 4 */ -#define ADC_CGR_GAIN5 (0x3 << 10) /**< \brief (ADC_CGR) Gain for channel 5 */ -#define ADC_CGR_GAIN6 (0x3 << 12) /**< \brief (ADC_CGR) Gain for channel 6 */ -#define ADC_CGR_GAIN7 (0x3 << 14) /**< \brief (ADC_CGR) Gain for channel 7 */ -#define ADC_CGR_GAIN8 (0x3 << 16) /**< \brief (ADC_CGR) Gain for channel 8 */ -#define ADC_CGR_GAIN9 (0x3 << 18) /**< \brief (ADC_CGR) Gain for channel 9 */ -#define ADC_CGR_GAIN10 (0x3 << 20) /**< \brief (ADC_CGR) Gain for channel 10 */ -#define ADC_CGR_GAIN11 (0x3 << 22) /**< \brief (ADC_CGR) Gain for channel 11 */ -#define ADC_CGR_GAIN12 (0x3 << 24) /**< \brief (ADC_CGR) Gain for channel 12 */ -#define ADC_CGR_GAIN13 (0x3 << 26) /**< \brief (ADC_CGR) Gain for channel 13 */ -#define ADC_CGR_GAIN14 (0x3 << 28) /**< \brief (ADC_CGR) Gain for channel 14 */ -#define ADC_CGR_GAIN15 (0x3 << 30) /**< \brief (ADC_CGR) Gain for channel 15 */ -/* -------- ADC_COR : (ADC Offset: 0x4C) Channel Offset Register -------- */ -#define ADC_COR_OFF0 (0x1 << 0) /**< \brief (ADC_COR) Offset for channel 0 */ -#define ADC_COR_OFF1 (0x1 << 1) /**< \brief (ADC_COR) Offset for channel 1 */ -#define ADC_COR_OFF2 (0x1 << 2) /**< \brief (ADC_COR) Offset for channel 2 */ -#define ADC_COR_OFF3 (0x1 << 3) /**< \brief (ADC_COR) Offset for channel 3 */ -#define ADC_COR_OFF4 (0x1 << 4) /**< \brief (ADC_COR) Offset for channel 4 */ -#define ADC_COR_OFF5 (0x1 << 5) /**< \brief (ADC_COR) Offset for channel 5 */ -#define ADC_COR_OFF6 (0x1 << 6) /**< \brief (ADC_COR) Offset for channel 6 */ -#define ADC_COR_OFF7 (0x1 << 7) /**< \brief (ADC_COR) Offset for channel 7 */ -#define ADC_COR_OFF8 (0x1 << 8) /**< \brief (ADC_COR) Offset for channel 8 */ -#define ADC_COR_OFF9 (0x1 << 9) /**< \brief (ADC_COR) Offset for channel 9 */ -#define ADC_COR_OFF10 (0x1 << 10) /**< \brief (ADC_COR) Offset for channel 10 */ -#define ADC_COR_OFF11 (0x1 << 11) /**< \brief (ADC_COR) Offset for channel 11 */ -#define ADC_COR_OFF12 (0x1 << 12) /**< \brief (ADC_COR) Offset for channel 12 */ -#define ADC_COR_OFF13 (0x1 << 13) /**< \brief (ADC_COR) Offset for channel 13 */ -#define ADC_COR_OFF14 (0x1 << 14) /**< \brief (ADC_COR) Offset for channel 14 */ -#define ADC_COR_OFF15 (0x1 << 15) /**< \brief (ADC_COR) Offset for channel 15 */ -#define ADC_COR_DIFF0 (0x1 << 16) /**< \brief (ADC_COR) Differential inputs for channel 0 */ -#define ADC_COR_DIFF1 (0x1 << 17) /**< \brief (ADC_COR) Differential inputs for channel 1 */ -#define ADC_COR_DIFF2 (0x1 << 18) /**< \brief (ADC_COR) Differential inputs for channel 2 */ -#define ADC_COR_DIFF3 (0x1 << 19) /**< \brief (ADC_COR) Differential inputs for channel 3 */ -#define ADC_COR_DIFF4 (0x1 << 20) /**< \brief (ADC_COR) Differential inputs for channel 4 */ -#define ADC_COR_DIFF5 (0x1 << 21) /**< \brief (ADC_COR) Differential inputs for channel 5 */ -#define ADC_COR_DIFF6 (0x1 << 22) /**< \brief (ADC_COR) Differential inputs for channel 6 */ -#define ADC_COR_DIFF7 (0x1 << 23) /**< \brief (ADC_COR) Differential inputs for channel 7 */ -#define ADC_COR_DIFF8 (0x1 << 24) /**< \brief (ADC_COR) Differential inputs for channel 8 */ -#define ADC_COR_DIFF9 (0x1 << 25) /**< \brief (ADC_COR) Differential inputs for channel 9 */ -#define ADC_COR_DIFF10 (0x1 << 26) /**< \brief (ADC_COR) Differential inputs for channel 10 */ -#define ADC_COR_DIFF11 (0x1 << 27) /**< \brief (ADC_COR) Differential inputs for channel 11 */ -#define ADC_COR_DIFF12 (0x1 << 28) /**< \brief (ADC_COR) Differential inputs for channel 12 */ -#define ADC_COR_DIFF13 (0x1 << 29) /**< \brief (ADC_COR) Differential inputs for channel 13 */ -#define ADC_COR_DIFF14 (0x1 << 30) /**< \brief (ADC_COR) Differential inputs for channel 14 */ -#define ADC_COR_DIFF15 (0x1 << 31) /**< \brief (ADC_COR) Differential inputs for channel 15 */ -/* -------- ADC_CDR0 : (ADC Offset: 0x50) Channel Data Register 0 -------- */ -#define ADC_CDR0_DATA (0x3ff << 0) /**< \brief (ADC_CDR0) Converted Data */ -/* -------- ADC_CDR1 : (ADC Offset: 0x54) Channel Data Register 1 -------- */ -#define ADC_CDR1_DATA (0x3ff << 0) /**< \brief (ADC_CDR1) Converted Data */ -/* -------- ADC_CDR2 : (ADC Offset: 0x58) Channel Data Register 2 -------- */ -#define ADC_CDR2_DATA (0x3ff << 0) /**< \brief (ADC_CDR2) Converted Data */ -/* -------- ADC_CDR3 : (ADC Offset: 0x5C) Channel Data Register 3 -------- */ -#define ADC_CDR3_DATA (0x3ff << 0) /**< \brief (ADC_CDR3) Converted Data */ -/* -------- ADC_CDR4 : (ADC Offset: 0x60) Channel Data Register 4 -------- */ -#define ADC_CDR4_DATA (0x3ff << 0) /**< \brief (ADC_CDR4) Converted Data */ -/* -------- ADC_CDR5 : (ADC Offset: 0x64) Channel Data Register 5 -------- */ -#define ADC_CDR5_DATA (0x3ff << 0) /**< \brief (ADC_CDR5) Converted Data */ -/* -------- ADC_CDR6 : (ADC Offset: 0x68) Channel Data Register 6 -------- */ -#define ADC_CDR6_DATA (0x3ff << 0) /**< \brief (ADC_CDR6) Converted Data */ -/* -------- ADC_CDR15 : (ADC Offset: 0x6C) Channel Data Register 15 -------- */ -#define ADC_CDR15_DATA (0x3ff << 0) /**< \brief (ADC_CDR15) Converted Data */ -/* -------- ADC_ACR : (ADC Offset: 0x94) Analog Control Register -------- */ -#define ADC_ACR_TSON (0x1 << 4) /**< \brief (ADC_ACR) Temperature Sensor On */ -#define ADC_ACR_IBCTL (0x3 << 8) /**< \brief (ADC_ACR) ADC Bias Current Control */ -/* -------- ADC_WPMR : (ADC Offset: 0xE4) Write Protect Mode Register -------- */ -#define ADC_WPMR_WPEN (0x1 << 0) /**< \brief (ADC_WPMR) Write Protect Enable */ -#define ADC_WPMR_WPKEY (0xffffff << 8) /**< \brief (ADC_WPMR) Write Protect KEY */ -/* -------- ADC_WPSR : (ADC Offset: 0xE8) Write Protect Status Register -------- */ -#define ADC_WPSR_WPVS (0x1 << 0) /**< \brief (ADC_WPSR) Write Protect Violation Status */ -#define ADC_WPSR_WPVSRC (0xffff << 8) /**< \brief (ADC_WPSR) Write Protect Violation Source */ -/* -------- ADC_RPR : (ADC Offset: 0x100) Receive Pointer Register -------- */ -#define ADC_RPR_RXPTR (0xffffffff << 0) /**< \brief (ADC_RPR) Receive Pointer Register */ -/* -------- ADC_RCR : (ADC Offset: 0x104) Receive Counter Register -------- */ -#define ADC_RCR_RXCTR (0xffff << 0) /**< \brief (ADC_RCR) Receive Counter Register */ -/* -------- ADC_TPR : (ADC Offset: 0x108) Transmit Pointer Register -------- */ -#define ADC_TPR_TXPTR (0xffffffff << 0) /**< \brief (ADC_TPR) Transmit Counter Register */ -/* -------- ADC_TCR : (ADC Offset: 0x10C) Transmit Counter Register -------- */ -#define ADC_TCR_TXCTR (0xffff << 0) /**< \brief (ADC_TCR) Transmit Counter Register */ -/* -------- ADC_RNPR : (ADC Offset: 0x110) Receive Next Pointer Register -------- */ -#define ADC_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (ADC_RNPR) Receive Next Pointer */ -/* -------- ADC_RNCR : (ADC Offset: 0x114) Receive Next Counter Register -------- */ -#define ADC_RNCR_RXNCTR (0xffff << 0) /**< \brief (ADC_RNCR) Receive Next Counter */ -/* -------- ADC_TNPR : (ADC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define ADC_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (ADC_TNPR) Transmit Next Pointer */ -/* -------- ADC_TNCR : (ADC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define ADC_TNCR_TXNCTR (0xffff << 0) /**< \brief (ADC_TNCR) Transmit Counter Next */ -/* -------- ADC_PTCR : (ADC Offset: 0x120) Transfer Control Register -------- */ -#define ADC_PTCR_RXTEN (0x1 << 0) /**< \brief (ADC_PTCR) Receiver Transfer Enable */ -#define ADC_PTCR_RXTDIS (0x1 << 1) /**< \brief (ADC_PTCR) Receiver Transfer Disable */ -#define ADC_PTCR_TXTEN (0x1 << 8) /**< \brief (ADC_PTCR) Transmitter Transfer Enable */ -#define ADC_PTCR_TXTDIS (0x1 << 9) /**< \brief (ADC_PTCR) Transmitter Transfer Disable */ -/* -------- ADC_PTSR : (ADC Offset: 0x124) Transfer Status Register -------- */ -#define ADC_PTSR_RXTEN (0x1 << 0) /**< \brief (ADC_PTSR) Receiver Transfer Enable */ -#define ADC_PTSR_TXTEN (0x1 << 8) /**< \brief (ADC_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Chip Identifier */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_CHIPID Chip Identifier */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Chipid hardware registers */ -typedef struct { - RoReg CHIPID_CIDR; /**< \brief (Chipid Offset: 0x0) Chip ID Register */ - RoReg CHIPID_EXID; /**< \brief (Chipid Offset: 0x4) Chip ID Extension Register */ -} Chipid; -#endif /* __ASSEMBLY__ */ -/* -------- CHIPID_CIDR : (CHIPID Offset: 0x0) Chip ID Register -------- */ -#define CHIPID_CIDR_VERSION (0x1f << 0) /**< \brief (CHIPID_CIDR) Version of the Device */ -#define CHIPID_CIDR_EPROC (0x7 << 5) /**< \brief (CHIPID_CIDR) Embedded Processor */ -#define CHIPID_CIDR_NVPSIZ (0xf << 8) /**< \brief (CHIPID_CIDR) Nonvolatile Program Memory Size */ -#define CHIPID_CIDR_NVPSIZ2 (0xf << 12) /**< \brief (CHIPID_CIDR) */ -#define CHIPID_CIDR_SRAMSIZ (0xf << 16) /**< \brief (CHIPID_CIDR) Internal SRAM Size */ -#define CHIPID_CIDR_ARCH (0xff << 20) /**< \brief (CHIPID_CIDR) Architecture Identifier */ -#define CHIPID_CIDR_NVPTYP (0x7 << 28) /**< \brief (CHIPID_CIDR) Nonvolatile Program Memory Type */ -#define CHIPID_CIDR_EXT (0x1 << 31) /**< \brief (CHIPID_CIDR) Extension Flag */ -/* -------- CHIPID_EXID : (CHIPID Offset: 0x4) Chip ID Extension Register -------- */ -#define CHIPID_EXID_EXID (0xffffffff << 0) /**< \brief (CHIPID_EXID) Chip ID Extension */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Cyclic Redundancy Check Calculation Unit */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_CRCCU Cyclic Redundancy Check Calculation Unit */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Crccu hardware registers */ -typedef struct { - RwReg CRCCU_DSCR; /**< \brief (Crccu Offset: 0x00000000) CRCCU Descriptor Base Register */ - RwReg Reserved1[1]; - WoReg CRCCU_DMA_EN; /**< \brief (Crccu Offset: 0x00000008) CRCCU DMA Enable Register */ - WoReg CRCCU_DMA_DIS; /**< \brief (Crccu Offset: 0x0000000C) CRCCU DMA Disable Register */ - RoReg CRCCU_DMA_SR; /**< \brief (Crccu Offset: 0x00000010) CRCCU DMA Status Register */ - WoReg CRCCU_DMA_IER; /**< \brief (Crccu Offset: 0x00000014) CRCCU DMA Interrupt Enable Register */ - WoReg CRCCU_DMA_IDR; /**< \brief (Crccu Offset: 0x00000018) CRCCU DMA Interrupt Disable Register */ - RoReg CRCCU_DMA_IMR; /**< \brief (Crccu Offset: 0x0000001C) CRCCU DMA Interrupt Mask Register */ - RoReg CRCCU_DMA_ISR; /**< \brief (Crccu Offset: 0x00000020) CRCCU DMA Interrupt Status Register */ - RwReg Reserved2[4]; - WoReg CRCCU_CR; /**< \brief (Crccu Offset: 0x00000034) CRCCU Control Register */ - RwReg CRCCU_MR; /**< \brief (Crccu Offset: 0x00000038) CRCCU Mode Register */ - RoReg CRCCU_SR; /**< \brief (Crccu Offset: 0x0000003C) CRCCU Status Register */ - WoReg CRCCU_IER; /**< \brief (Crccu Offset: 0x00000040) CRCCU Interrupt Enable Register */ - WoReg CRCCU_IDR; /**< \brief (Crccu Offset: 0x00000044) CRCCU Interrupt Disable Register */ - RoReg CRCCU_IMR; /**< \brief (Crccu Offset: 0x00000048) CRCCU Interrupt Mask Register */ - RoReg CRCCU_ISR; /**< \brief (Crccu Offset: 0x0000004C) CRCCU Interrupt Status Register */ -} Crccu; -#endif /* __ASSEMBLY__ */ -/* -------- CRCCU_DSCR : (CRCCU Offset: 0x00000000) CRCCU Descriptor Base Register -------- */ -#define CRCCU_DSCR_DSCR (0x7fffff << 9) /**< \brief (CRCCU_DSCR) Descriptor Base Address */ -/* -------- CRCCU_DMA_EN : (CRCCU Offset: 0x00000008) CRCCU DMA Enable Register -------- */ -#define CRCCU_DMA_EN_DMAEN (0x1 << 0) /**< \brief (CRCCU_DMA_EN) DMA Enable Register */ -/* -------- CRCCU_DMA_DIS : (CRCCU Offset: 0x0000000C) CRCCU DMA Disable Register -------- */ -#define CRCCU_DMA_DIS_DMADIS (0x1 << 0) /**< \brief (CRCCU_DMA_DIS) DMA Disable Register */ -/* -------- CRCCU_DMA_SR : (CRCCU Offset: 0x00000010) CRCCU DMA Status Register -------- */ -#define CRCCU_DMA_SR_DMASR (0x1 << 0) /**< \brief (CRCCU_DMA_SR) DMA Status Register */ -/* -------- CRCCU_DMA_IER : (CRCCU Offset: 0x00000014) CRCCU DMA Interrupt Enable Register -------- */ -#define CRCCU_DMA_IER_DMAIER (0x1 << 0) /**< \brief (CRCCU_DMA_IER) Interrupt Enable register */ -/* -------- CRCCU_DMA_IDR : (CRCCU Offset: 0x00000018) CRCCU DMA Interrupt Disable Register -------- */ -#define CRCCU_DMA_IDR_DMAIDR (0x1 << 0) /**< \brief (CRCCU_DMA_IDR) Interrupt Disable register */ -/* -------- CRCCU_DMA_IMR : (CRCCU Offset: 0x0000001C) CRCCU DMA Interrupt Mask Register -------- */ -#define CRCCU_DMA_IMR_DMAIMR (0x1 << 0) /**< \brief (CRCCU_DMA_IMR) Interrupt Mask Register */ -/* -------- CRCCU_DMA_ISR : (CRCCU Offset: 0x00000020) CRCCU DMA Interrupt Status Register -------- */ -#define CRCCU_DMA_ISR_DMAISR (0x1 << 0) /**< \brief (CRCCU_DMA_ISR) Interrupt Status register */ -/* -------- CRCCU_CR : (CRCCU Offset: 0x00000034) CRCCU Control Register -------- */ -#define CRCCU_CR_RESET (0x1 << 0) /**< \brief (CRCCU_CR) CRC Computation Reset */ -/* -------- CRCCU_MR : (CRCCU Offset: 0x00000038) CRCCU Mode Register -------- */ -#define CRCCU_MR_ENABLE (0x1 << 0) /**< \brief (CRCCU_MR) CRC Enable */ -#define CRCCU_MR_COMPARE (0x1 << 1) /**< \brief (CRCCU_MR) CRC Compare */ -#define CRCCU_MR_PTYPE (0x3 << 2) /**< \brief (CRCCU_MR) Primitive Polynomial */ -#define CRCCU_MR_PTYPE_CCIT8023 (0x0 << 2) /**< \brief (CRCCU_MR) Polynom 0x04C11DB7 */ -#define CRCCU_MR_PTYPE_CASTAGNOLI (0x1 << 2) /**< \brief (CRCCU_MR) Polynom 0x1EDC6F41 */ -#define CRCCU_MR_PTYPE_CCIT16 (0x2 << 2) /**< \brief (CRCCU_MR) Polynom 0x1021 */ -#define CRCCU_MR_DIVIDER (0xf << 4) /**< \brief (CRCCU_MR) Request Divider */ -/* -------- CRCCU_SR : (CRCCU Offset: 0x0000003C) CRCCU Status Register -------- */ -#define CRCCU_SR_CRC (0xffffffff << 0) /**< \brief (CRCCU_SR) Cyclic Redundancy Check Value */ -/* -------- CRCCU_IER : (CRCCU Offset: 0x00000040) CRCCU Interrupt Enable Register -------- */ -#define CRCCU_IER_ERRIER (0x1 << 0) /**< \brief (CRCCU_IER) CRC Error Interrupt Enable */ -/* -------- CRCCU_IDR : (CRCCU Offset: 0x00000044) CRCCU Interrupt Disable Register -------- */ -#define CRCCU_IDR_ERRIDR (0x1 << 0) /**< \brief (CRCCU_IDR) CRC Error Interrupt Disable */ -/* -------- CRCCU_IMR : (CRCCU Offset: 0x00000048) CRCCU Interrupt Mask Register -------- */ -#define CRCCU_IMR_ERRIMR (0x1 << 0) /**< \brief (CRCCU_IMR) CRC Error Interrupt Mask */ -/* -------- CRCCU_ISR : (CRCCU Offset: 0x0000004C) CRCCU Interrupt Status Register -------- */ -#define CRCCU_ISR_ERRISR (0x1 << 0) /**< \brief (CRCCU_ISR) CRC Error Interrupt Status */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Digital-to-Analog Converter Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_DACC Digital-to-Analog Converter Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Dacc hardware registers */ -typedef struct { - WoReg DACC_CR; /**< \brief (Dacc Offset: 0x00) Control Register */ - RwReg DACC_MR; /**< \brief (Dacc Offset: 0x04) Mode Register */ - RwReg Reserved1[2]; - WoReg DACC_CHER; /**< \brief (Dacc Offset: 0x10) Channel Enable Register */ - WoReg DACC_CHDR; /**< \brief (Dacc Offset: 0x14) Channel Disable Register */ - RoReg DACC_CHSR; /**< \brief (Dacc Offset: 0x18) Channel Status Register */ - RwReg Reserved2[1]; - WoReg DACC_CDR; /**< \brief (Dacc Offset: 0x20) Conversion Data Register */ - WoReg DACC_IER; /**< \brief (Dacc Offset: 0x24) Interrupt Enable Register */ - WoReg DACC_IDR; /**< \brief (Dacc Offset: 0x28) Interrupt Disable Register */ - RoReg DACC_IMR; /**< \brief (Dacc Offset: 0x2C) Interrupt Mask Register */ - RoReg DACC_ISR; /**< \brief (Dacc Offset: 0x30) Interrupt Status Register */ - RwReg Reserved3[24]; - RwReg DACC_ACR; /**< \brief (Dacc Offset: 0x94) Analog Current Register */ - RwReg Reserved4[19]; - RwReg DACC_WPMR; /**< \brief (Dacc Offset: 0xE4) Write Protect Mode register */ - RoReg DACC_WPSR; /**< \brief (Dacc Offset: 0xE8) Write Protect Status register */ - RwReg Reserved5[5]; - RwReg DACC_RPR; /**< \brief (Dacc Offset: 0x100) Receive Pointer Register */ - RwReg DACC_RCR; /**< \brief (Dacc Offset: 0x104) Receive Counter Register */ - RwReg DACC_TPR; /**< \brief (Dacc Offset: 0x108) Transmit Pointer Register */ - RwReg DACC_TCR; /**< \brief (Dacc Offset: 0x10C) Transmit Counter Register */ - RwReg DACC_RNPR; /**< \brief (Dacc Offset: 0x110) Receive Next Pointer Register */ - RwReg DACC_RNCR; /**< \brief (Dacc Offset: 0x114) Receive Next Counter Register */ - RwReg DACC_TNPR; /**< \brief (Dacc Offset: 0x118) Transmit Next Pointer Register */ - RwReg DACC_TNCR; /**< \brief (Dacc Offset: 0x11C) Transmit Next Counter Register */ - WoReg DACC_PTCR; /**< \brief (Dacc Offset: 0x120) Transfer Control Register */ - RoReg DACC_PTSR; /**< \brief (Dacc Offset: 0x124) Transfer Status Register */ -} Dacc; -#endif /* __ASSEMBLY__ */ -/* -------- DACC_CR : (DACC Offset: 0x00) Control Register -------- */ -#define DACC_CR_SWRST (0x1 << 0) /**< \brief (DACC_CR) Software Reset */ -/* -------- DACC_MR : (DACC Offset: 0x04) Mode Register -------- */ -#define DACC_MR_TRGEN (0x1 << 0) /**< \brief (DACC_MR) Trigger Enable */ -#define DACC_MR_TRGEN_DIS (0x0 << 0) // (DACC_MR) Hardware triggers are disabled. Starting a conversion is only possible by software. -#define DACC_MR_TRGEN_EN (0x1 << 0) // (DACC_MR) Hardware trigger selected by TRGSEL field is enabled. - -#define DACC_MR_TRGSEL (0x7 << 1) /**< \brief (DACC_MR) Trigger Selection */ -#define DACC_MR_TRGSEL_EXT_TRIG (0x0 << 1) // (DACC_MR) External trigger -#define DACC_MR_TRGSEL_TIOA_0 (0x1 << 1) // (DACC_MR) TIO Output of the Timer Counter Channel 0 -#define DACC_MR_TRGSEL_TIOA_1 (0x2 << 1) // (DACC_MR) TIO Output of the Timer Counter Channel 1 -#define DACC_MR_TRGSEL_TIOA_2 (0x3 << 1) // (DACC_MR) TIO Output of the Timer Counter Channel 2 -#define DACC_MR_TRGSEL_PWM_0 (0x4 << 1) // (DACC_MR) PWM Event Line 0 -#define DACC_MR_TRGSEL_PWM_1 (0x5 << 1) // (DACC_MR) PWM Event Line 1 -#define DACC_MR_WORD (0x1 << 4) /**< \brief (DACC_MR) Word Transfer */ -#define DACC_MR_WORD_HALF (0x0 << 4) /**< \brief (DACC_MR) Half-Word Transfer */ -#define DACC_MR_WORD_WORLD (0x1 << 4) /**< \brief (DACC_MR) Word Transfer */ -#define DACC_MR_SLEEP (0x1 << 5) /**< \brief (DACC_MR) Sleep Mode */ -#define DACC_MR_SLEEP_NORMAL (0x0 << 5) // (DACC_MR) Normal Mode -#define DACC_MR_SLEEP_SLEEP (0x1 << 5) // (DACC_MR) Sleep Modes -#define DACC_MR_FASTWKUP (0x1 << 6) /**< \brief (DACC_MR) Fast Wake up Mode */ -#define DACC_MR_REFRESH (0xff << 8) /**< \brief (DACC_MR) Refresh Period */ -#define DACC_MR_USER_SEL (0x3 << 16) /**< \brief (DACC_MR) User Channel Selection */ -#define DACC_MR_USER_SEL_0 (0x0 << 16) /**< \brief (DACC_MR) User Channel Selection */ -#define DACC_MR_USER_SEL_1 (0x1 << 16) /**< \brief (DACC_MR) User Channel Selection */ -#define DACC_MR_TAG (0x1 << 20) /**< \brief (DACC_MR) Tag Selection Mode */ -#define DACC_MR_MAXS (0x1 << 21) /**< \brief (DACC_MR) Max Speed Mode */ -#define DACC_MR_STARTUP (0x3f << 24) /**< \brief (DACC_MR) Startup Time Selection */ -/* -------- DACC_CHER : (DACC Offset: 0x10) Channel Enable Register -------- */ -#define DACC_CHER_CH0 (0x1 << 0) /**< \brief (DACC_CHER) Channel 0 Enable */ -#define DACC_CHER_CH1 (0x1 << 1) /**< \brief (DACC_CHER) Channel 1 Enable */ -#define DACC_CHER_CH2 (0x1 << 2) /**< \brief (DACC_CHER) Channel 2 Enable */ -/* -------- DACC_CHDR : (DACC Offset: 0x14) Channel Disable Register -------- */ -#define DACC_CHDR_CH0 (0x1 << 0) /**< \brief (DACC_CHDR) Channel 0 Disable */ -#define DACC_CHDR_CH1 (0x1 << 1) /**< \brief (DACC_CHDR) Channel 1 Disable */ -#define DACC_CHDR_CH2 (0x1 << 2) /**< \brief (DACC_CHDR) Channel 2 Disable */ -/* -------- DACC_CHSR : (DACC Offset: 0x18) Channel Status Register -------- */ -#define DACC_CHSR_CH0 (0x1 << 0) /**< \brief (DACC_CHSR) Channel 0 Status */ -#define DACC_CHSR_CH1 (0x1 << 1) /**< \brief (DACC_CHSR) Channel 1 Status */ -#define DACC_CHSR_CH2 (0x1 << 2) /**< \brief (DACC_CHSR) Channel 2 Status */ -/* -------- DACC_CDR : (DACC Offset: 0x20) Conversion Data Register -------- */ -#define DACC_CDR_DATA (0xffffffff << 0) /**< \brief (DACC_CDR) Data to Convert */ -/* -------- DACC_IER : (DACC Offset: 0x24) Interrupt Enable Register -------- */ -#define DACC_IER_TXRDY (0x1 << 0) /**< \brief (DACC_IER) Transmit Ready Interrupt Enable */ -#define DACC_IER_EOC (0x1 << 1) /**< \brief (DACC_IER) End of Conversion Interrupt Enable */ -#define DACC_IER_ENDTX (0x1 << 2) /**< \brief (DACC_IER) End of Transmit Buffer Interrupt Enable */ -#define DACC_IER_TXBUFE (0x1 << 3) /**< \brief (DACC_IER) Transmit Buffer Empty Interrupt Enable */ -/* -------- DACC_IDR : (DACC Offset: 0x28) Interrupt Disable Register -------- */ -#define DACC_IDR_TXRDY (0x1 << 0) /**< \brief (DACC_IDR) Transmit Ready Interrupt Disable. */ -#define DACC_IDR_EOC (0x1 << 1) /**< \brief (DACC_IDR) End of Conversion Interrupt Disable */ -#define DACC_IDR_ENDTX (0x1 << 2) /**< \brief (DACC_IDR) End of Transmit Buffer Interrupt Disable */ -#define DACC_IDR_TXBUFE (0x1 << 3) /**< \brief (DACC_IDR) Transmit Buffer Empty Interrupt Disable */ -/* -------- DACC_IMR : (DACC Offset: 0x2C) Interrupt Mask Register -------- */ -#define DACC_IMR_TXRDY (0x1 << 0) /**< \brief (DACC_IMR) Transmit Ready Interrupt Mask */ -#define DACC_IMR_EOC (0x1 << 1) /**< \brief (DACC_IMR) End of Conversion Interrupt Mask */ -#define DACC_IMR_ENDTX (0x1 << 2) /**< \brief (DACC_IMR) End of Transmit Buffer Interrupt Mask */ -#define DACC_IMR_TXBUFE (0x1 << 3) /**< \brief (DACC_IMR) Transmit Buffer Empty Interrupt Mask */ -/* -------- DACC_ISR : (DACC Offset: 0x30) Interrupt Status Register -------- */ -#define DACC_ISR_TXRDY (0x1 << 0) /**< \brief (DACC_ISR) Transmit Ready Interrupt Flag */ -#define DACC_ISR_EOC (0x1 << 1) /**< \brief (DACC_ISR) End of Conversion Interrupt Flag */ -#define DACC_ISR_ENDTX (0x1 << 2) /**< \brief (DACC_ISR) End of DMA Interrupt Flag */ -#define DACC_ISR_TXBUFE (0x1 << 3) /**< \brief (DACC_ISR) Transmit Buffer Empty */ -/* -------- DACC_ACR : (DACC Offset: 0x94) Analog Current Register -------- */ -#define DACC_ACR_IBCTLCH0 (0x3 << 0) /**< \brief (DACC_ACR) Analog Output Current Control */ -#define DACC_ACR_IBCTLCH1 (0x3 << 2) /**< \brief (DACC_ACR) Analog Output Current Control */ -#define DACC_ACR_IBCTLDACCORE (0x3 << 8) /**< \brief (DACC_ACR) Bias Current Control for DAC Core */ -/* -------- DACC_WPMR : (DACC Offset: 0xE4) Write Protect Mode register -------- */ -#define DACC_WPMR_WPEN (0x1 << 0) /**< \brief (DACC_WPMR) Write Protect Enable */ -#define DACC_WPMR_WPKEY (0xffffff << 8) /**< \brief (DACC_WPMR) Write Protect KEY */ -/* -------- DACC_WPSR : (DACC Offset: 0xE8) Write Protect Status register -------- */ -#define DACC_WPSR_WPROTERR (0x1 << 0) /**< \brief (DACC_WPSR) Write protection error */ -#define DACC_WPSR_WPROTADDR (0xff << 8) /**< \brief (DACC_WPSR) Write protection error address */ -/* -------- DACC_RPR : (DACC Offset: 0x100) Receive Pointer Register -------- */ -#define DACC_RPR_RXPTR (0xffffffff << 0) /**< \brief (DACC_RPR) Receive Pointer Register */ -/* -------- DACC_RCR : (DACC Offset: 0x104) Receive Counter Register -------- */ -#define DACC_RCR_RXCTR (0xffff << 0) /**< \brief (DACC_RCR) Receive Counter Register */ -/* -------- DACC_TPR : (DACC Offset: 0x108) Transmit Pointer Register -------- */ -#define DACC_TPR_TXPTR (0xffffffff << 0) /**< \brief (DACC_TPR) Transmit Counter Register */ -/* -------- DACC_TCR : (DACC Offset: 0x10C) Transmit Counter Register -------- */ -#define DACC_TCR_TXCTR (0xffff << 0) /**< \brief (DACC_TCR) Transmit Counter Register */ -/* -------- DACC_RNPR : (DACC Offset: 0x110) Receive Next Pointer Register -------- */ -#define DACC_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (DACC_RNPR) Receive Next Pointer */ -/* -------- DACC_RNCR : (DACC Offset: 0x114) Receive Next Counter Register -------- */ -#define DACC_RNCR_RXNCTR (0xffff << 0) /**< \brief (DACC_RNCR) Receive Next Counter */ -/* -------- DACC_TNPR : (DACC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define DACC_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (DACC_TNPR) Transmit Next Pointer */ -/* -------- DACC_TNCR : (DACC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define DACC_TNCR_TXNCTR (0xffff << 0) /**< \brief (DACC_TNCR) Transmit Counter Next */ -/* -------- DACC_PTCR : (DACC Offset: 0x120) Transfer Control Register -------- */ -#define DACC_PTCR_RXTEN (0x1 << 0) /**< \brief (DACC_PTCR) Receiver Transfer Enable */ -#define DACC_PTCR_RXTDIS (0x1 << 1) /**< \brief (DACC_PTCR) Receiver Transfer Disable */ -#define DACC_PTCR_TXTEN (0x1 << 8) /**< \brief (DACC_PTCR) Transmitter Transfer Enable */ -#define DACC_PTCR_TXTDIS (0x1 << 9) /**< \brief (DACC_PTCR) Transmitter Transfer Disable */ -/* -------- DACC_PTSR : (DACC Offset: 0x124) Transfer Status Register -------- */ -#define DACC_PTSR_RXTEN (0x1 << 0) /**< \brief (DACC_PTSR) Receiver Transfer Enable */ -#define DACC_PTSR_TXTEN (0x1 << 8) /**< \brief (DACC_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Embedded Flash Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_EFC Embedded Flash Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Efc hardware registers */ -typedef struct { - RwReg EEFC_FMR; /**< \brief (Efc Offset: 0x00) EEFC Flash Mode Register */ - WoReg EEFC_FCR; /**< \brief (Efc Offset: 0x04) EEFC Flash Command Register */ - RoReg EEFC_FSR; /**< \brief (Efc Offset: 0x08) EEFC Flash Status Register */ - RoReg EEFC_FRR; /**< \brief (Efc Offset: 0x0C) EEFC Flash Result Register */ -} Efc; -#endif /* __ASSEMBLY__ */ -/* -------- EEFC_FMR : (EFC Offset: 0x00) EEFC Flash Mode Register -------- */ -#define EEFC_FMR_FRDY (0x1 << 0) /**< \brief (EEFC_FMR) Ready Interrupt Enable */ -#define EEFC_FMR_FWS (0xf << 8) /**< \brief (EEFC_FMR) Flash Wait State */ -#define EEFC_FMR_FAM (0x1 << 24) /**< \brief (EEFC_FMR) Flash Access Mode */ -/* -------- EEFC_FCR : (EFC Offset: 0x04) EEFC Flash Command Register -------- */ -#define EEFC_FCR_FCMD (0xff << 0) /**< \brief (EEFC_FCR) Flash Command */ -#define EEFC_FCR_FARG (0xffff << 8) /**< \brief (EEFC_FCR) Flash Command Argument */ -#define EEFC_FCR_FKEY (0xff << 24) /**< \brief (EEFC_FCR) Flash Writing Protection Key */ -/* -------- EEFC_FSR : (EFC Offset: 0x08) EEFC Flash Status Register -------- */ -#define EEFC_FSR_FRDY (0x1 << 0) /**< \brief (EEFC_FSR) Flash Ready Status */ -#define EEFC_FSR_FCMDE (0x1 << 1) /**< \brief (EEFC_FSR) Flash Command Error Status */ -#define EEFC_FSR_FLOCKE (0x1 << 2) /**< \brief (EEFC_FSR) Flash Lock Error Status */ -/* -------- EEFC_FRR : (EFC Offset: 0x0C) EEFC Flash Result Register -------- */ -#define EEFC_FRR_FVALUE (0xffffffff << 0) /**< \brief (EEFC_FRR) Flash Result Value */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR General Purpose Backup Register */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_GPBR General Purpose Backup Register */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Gpbr hardware registers */ -typedef struct { - RwReg SYS_GPBR0; /**< \brief (Gpbr Offset: 0x0) General Purpose Backup Register 0 */ - RwReg SYS_GPBR1; /**< \brief (Gpbr Offset: 0x4) General Purpose Backup Register 1 */ - RwReg SYS_GPBR2; /**< \brief (Gpbr Offset: 0x8) General Purpose Backup Register 2 */ - RwReg SYS_GPBR3; /**< \brief (Gpbr Offset: 0xC) General Purpose Backup Register 3 */ -} Gpbr; -#endif /* __ASSEMBLY__ */ -/* -------- SYS_GPBR0 : (GPBR Offset: 0x0) General Purpose Backup Register 0 -------- */ -#define SYS_GPBR0_GPBR_VALUE0 (0xffffffff << 0) /**< \brief (SYS_GPBR0) Value of GPBR x */ -/* -------- SYS_GPBR1 : (GPBR Offset: 0x4) General Purpose Backup Register 1 -------- */ -#define SYS_GPBR1_GPBR_VALUE1 (0xffffffff << 0) /**< \brief (SYS_GPBR1) Value of GPBR x */ -/* -------- SYS_GPBR2 : (GPBR Offset: 0x8) General Purpose Backup Register 2 -------- */ -#define SYS_GPBR2_GPBR_VALUE2 (0xffffffff << 0) /**< \brief (SYS_GPBR2) Value of GPBR x */ -/* -------- SYS_GPBR3 : (GPBR Offset: 0xC) General Purpose Backup Register 3 -------- */ -#define SYS_GPBR3_GPBR_VALUE3 (0xffffffff << 0) /**< \brief (SYS_GPBR3) Value of GPBR x */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR High Speed MultiMedia Card Interface */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_HSMCI High Speed MultiMedia Card Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Hsmci hardware registers */ -typedef struct { - WoReg HSMCI_CR; /**< \brief (Hsmci Offset: 0x00) Control Register */ - RwReg HSMCI_MR; /**< \brief (Hsmci Offset: 0x04) Mode Register */ - RwReg HSMCI_DTOR; /**< \brief (Hsmci Offset: 0x08) Data Timeout Register */ - RwReg HSMCI_SDCR; /**< \brief (Hsmci Offset: 0x0C) SD/SDIO Card Register */ - RwReg HSMCI_ARGR; /**< \brief (Hsmci Offset: 0x10) Argument Register */ - WoReg HSMCI_CMDR; /**< \brief (Hsmci Offset: 0x14) Command Register */ - RwReg HSMCI_BLKR; /**< \brief (Hsmci Offset: 0x18) Block Register */ - RwReg HSMCI_CSTOR; /**< \brief (Hsmci Offset: 0x1C) Completion Signal Timeout Register */ - RoReg HSMCI_RSPR[4]; /**< \brief (Hsmci Offset: 0x20) Response Register */ - RoReg HSMCI_RDR; /**< \brief (Hsmci Offset: 0x30) Receive Data Register */ - WoReg HSMCI_TDR; /**< \brief (Hsmci Offset: 0x34) Transmit Data Register */ - RwReg Reserved1[2]; - RoReg HSMCI_SR; /**< \brief (Hsmci Offset: 0x40) Status Register */ - WoReg HSMCI_IER; /**< \brief (Hsmci Offset: 0x44) Interrupt Enable Register */ - WoReg HSMCI_IDR; /**< \brief (Hsmci Offset: 0x48) Interrupt Disable Register */ - RoReg HSMCI_IMR; /**< \brief (Hsmci Offset: 0x4C) Interrupt Mask Register */ - RwReg Reserved2[1]; - RwReg HSMCI_CFG; /**< \brief (Hsmci Offset: 0x54) Configuration Register */ - RwReg Reserved3[35]; - RwReg HSMCI_WPMR; /**< \brief (Hsmci Offset: 0xE4) Write Protection Mode Register */ - RoReg HSMCI_WPSR; /**< \brief (Hsmci Offset: 0xE8) Write Protection Status Register */ - RwReg Reserved4[5]; - RwReg HSMCI_RPR; /**< \brief (Hsmci Offset: 0x100) Receive Pointer Register */ - RwReg HSMCI_RCR; /**< \brief (Hsmci Offset: 0x104) Receive Counter Register */ - RwReg HSMCI_TPR; /**< \brief (Hsmci Offset: 0x108) Transmit Pointer Register */ - RwReg HSMCI_TCR; /**< \brief (Hsmci Offset: 0x10C) Transmit Counter Register */ - RwReg HSMCI_RNPR; /**< \brief (Hsmci Offset: 0x110) Receive Next Pointer Register */ - RwReg HSMCI_RNCR; /**< \brief (Hsmci Offset: 0x114) Receive Next Counter Register */ - RwReg HSMCI_TNPR; /**< \brief (Hsmci Offset: 0x118) Transmit Next Pointer Register */ - RwReg HSMCI_TNCR; /**< \brief (Hsmci Offset: 0x11C) Transmit Next Counter Register */ - WoReg HSMCI_PTCR; /**< \brief (Hsmci Offset: 0x120) Transfer Control Register */ - RoReg HSMCI_PTSR; /**< \brief (Hsmci Offset: 0x124) Transfer Status Register */ -} Hsmci; -#endif /* __ASSEMBLY__ */ -/* -------- HSMCI_CR : (HSMCI Offset: 0x00) Control Register -------- */ -#define HSMCI_CR_MCIEN (0x1 << 0) /**< \brief (HSMCI_CR) Multi-Media Interface Enable */ -#define HSMCI_CR_MCIDIS (0x1 << 1) /**< \brief (HSMCI_CR) Multi-Media Interface Disable */ -#define HSMCI_CR_PWSEN (0x1 << 2) /**< \brief (HSMCI_CR) Power Save Mode Enable */ -#define HSMCI_CR_PWSDIS (0x1 << 3) /**< \brief (HSMCI_CR) Power Save Mode Disable */ -#define HSMCI_CR_SWRST (0x1 << 7) /**< \brief (HSMCI_CR) Software Reset */ -/* -------- HSMCI_MR : (HSMCI Offset: 0x04) Mode Register -------- */ -#define HSMCI_MR_CLKDIV (0xff << 0) /**< \brief (HSMCI_MR) Clock Divider */ -#define HSMCI_MR_PWSDIV (0x7 << 8) /**< \brief (HSMCI_MR) Power Saving Divider */ -#define HSMCI_MR_RDPROOF (0x1 << 11) /**< \brief (HSMCI_MR) */ -#define HSMCI_MR_WRPROOF (0x1 << 12) /**< \brief (HSMCI_MR) */ -#define HSMCI_MR_FBYTE (0x1 << 13) /**< \brief (HSMCI_MR) Force Byte Transfer */ -#define HSMCI_MR_PADV (0x1 << 14) /**< \brief (HSMCI_MR) Padding Value */ -#define HSMCI_MR_PDCMODE (0x1 << 15) /**< \brief (HSMCI_MR) PDC-oriented Mode */ -#define HSMCI_MR_BLKLEN (0xffff << 16) /**< \brief (HSMCI_MR) Data Block Length */ -/* -------- HSMCI_DTOR : (HSMCI Offset: 0x08) Data Timeout Register -------- */ -#define HSMCI_DTOR_DTOCYC (0xf << 0) /**< \brief (HSMCI_DTOR) Data Timeout Cycle Number */ -#define HSMCI_DTOR_DTOMUL (0x7 << 4) /**< \brief (HSMCI_DTOR) Data Timeout Multiplier */ -/* -------- HSMCI_SDCR : (HSMCI Offset: 0x0C) SD/SDIO Card Register -------- */ -#define HSMCI_SDCR_SDCSEL (0x3 << 0) /**< \brief (HSMCI_SDCR) SDCard/SDIO Slot */ -#define HSMCI_SDCR_SDCBUS (0x3 << 6) /**< \brief (HSMCI_SDCR) SDCard/SDIO Bus Width */ -/* -------- HSMCI_ARGR : (HSMCI Offset: 0x10) Argument Register -------- */ -#define HSMCI_ARGR_ARG (0xffffffff << 0) /**< \brief (HSMCI_ARGR) Command Argument */ -/* -------- HSMCI_CMDR : (HSMCI Offset: 0x14) Command Register -------- */ -#define HSMCI_CMDR_CMDNB (0x3f << 0) /**< \brief (HSMCI_CMDR) Command Number */ -#define HSMCI_CMDR_RSPTYP (0x3 << 6) /**< \brief (HSMCI_CMDR) Response Type */ -#define HSMCI_CMDR_SPCMD (0x7 << 8) /**< \brief (HSMCI_CMDR) Special Command */ -#define HSMCI_CMDR_OPDCMD (0x1 << 11) /**< \brief (HSMCI_CMDR) Open Drain Command */ -#define HSMCI_CMDR_MAXLAT (0x1 << 12) /**< \brief (HSMCI_CMDR) Max Latency for Command to Response */ -#define HSMCI_CMDR_TRCMD (0x3 << 16) /**< \brief (HSMCI_CMDR) Transfer Command */ -#define HSMCI_CMDR_TRDIR (0x1 << 18) /**< \brief (HSMCI_CMDR) Transfer Direction */ -#define HSMCI_CMDR_TRTYP (0x7 << 19) /**< \brief (HSMCI_CMDR) Transfer Type */ -#define HSMCI_CMDR_IOSPCMD (0x3 << 24) /**< \brief (HSMCI_CMDR) SDIO Special Command */ -#define HSMCI_CMDR_ATACS (0x1 << 26) /**< \brief (HSMCI_CMDR) ATA with Command Completion Signal */ -#define HSMCI_CMDR_BOOT_ACK (0x1 << 27) /**< \brief (HSMCI_CMDR) Boot Operation Acknowledge. */ -/* -------- HSMCI_BLKR : (HSMCI Offset: 0x18) Block Register -------- */ -#define HSMCI_BLKR_BCNT (0xffff << 0) /**< \brief (HSMCI_BLKR) MMC/SDIO Block Count - SDIO Byte Count */ -#define HSMCI_BLKR_BLKLEN (0xffff << 16) /**< \brief (HSMCI_BLKR) Data Block Length */ -/* -------- HSMCI_CSTOR : (HSMCI Offset: 0x1C) Completion Signal Timeout Register -------- */ -#define HSMCI_CSTOR_CSTOCYC (0xf << 0) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Cycle Number */ -#define HSMCI_CSTOR_CSTOMUL (0x7 << 4) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Multiplier */ -/* -------- HSMCI_RSPR[4] : (HSMCI Offset: 0x20) Response Register -------- */ -#define HSMCI_RSPR_RSP (0xffffffff << 0) /**< \brief (HSMCI_RSPR[4]) Response */ -/* -------- HSMCI_RDR : (HSMCI Offset: 0x30) Receive Data Register -------- */ -#define HSMCI_RDR_DATA (0xffffffff << 0) /**< \brief (HSMCI_RDR) Data to Read */ -/* -------- HSMCI_TDR : (HSMCI Offset: 0x34) Transmit Data Register -------- */ -#define HSMCI_TDR_DATA (0xffffffff << 0) /**< \brief (HSMCI_TDR) Data to Write */ -/* -------- HSMCI_SR : (HSMCI Offset: 0x40) Status Register -------- */ -#define HSMCI_SR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_SR) Command Ready */ -#define HSMCI_SR_RXRDY (0x1 << 1) /**< \brief (HSMCI_SR) Receiver Ready */ -#define HSMCI_SR_TXRDY (0x1 << 2) /**< \brief (HSMCI_SR) Transmit Ready */ -#define HSMCI_SR_BLKE (0x1 << 3) /**< \brief (HSMCI_SR) Data Block Ended */ -#define HSMCI_SR_DTIP (0x1 << 4) /**< \brief (HSMCI_SR) Data Transfer in Progress */ -#define HSMCI_SR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_SR) HSMCI Not Busy */ -#define HSMCI_SR_ENDRX (0x1 << 6) /**< \brief (HSMCI_SR) End of RX Buffer */ -#define HSMCI_SR_ENDTX (0x1 << 7) /**< \brief (HSMCI_SR) End of TX Buffer */ -#define HSMCI_SR_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_SR) SDIO Interrupt for Slot A */ -#define HSMCI_SR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_SR) SDIO Read Wait Operation Status */ -#define HSMCI_SR_CSRCV (0x1 << 13) /**< \brief (HSMCI_SR) CE-ATA Completion Signal Received */ -#define HSMCI_SR_RXBUFF (0x1 << 14) /**< \brief (HSMCI_SR) RX Buffer Full */ -#define HSMCI_SR_TXBUFE (0x1 << 15) /**< \brief (HSMCI_SR) TX Buffer Empty */ -#define HSMCI_SR_RINDE (0x1 << 16) /**< \brief (HSMCI_SR) Response Index Error */ -#define HSMCI_SR_RDIRE (0x1 << 17) /**< \brief (HSMCI_SR) Response Direction Error */ -#define HSMCI_SR_RCRCE (0x1 << 18) /**< \brief (HSMCI_SR) Response CRC Error */ -#define HSMCI_SR_RENDE (0x1 << 19) /**< \brief (HSMCI_SR) Response End Bit Error */ -#define HSMCI_SR_RTOE (0x1 << 20) /**< \brief (HSMCI_SR) Response Time-out Error */ -#define HSMCI_SR_DCRCE (0x1 << 21) /**< \brief (HSMCI_SR) Data CRC Error */ -#define HSMCI_SR_DTOE (0x1 << 22) /**< \brief (HSMCI_SR) Data Time-out Error */ -#define HSMCI_SR_CSTOE (0x1 << 23) /**< \brief (HSMCI_SR) Completion Signal Time-out Error */ -#define HSMCI_SR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_SR) FIFO empty flag */ -#define HSMCI_SR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_SR) Transfer Done flag */ -#define HSMCI_SR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_SR) Boot Operation Acknowledge Received */ -#define HSMCI_SR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_SR) Boot Operation Acknowledge Error */ -#define HSMCI_SR_OVRE (0x1 << 30) /**< \brief (HSMCI_SR) Overrun */ -#define HSMCI_SR_UNRE (0x1 << 31) /**< \brief (HSMCI_SR) Underrun */ -/* -------- HSMCI_IER : (HSMCI Offset: 0x44) Interrupt Enable Register -------- */ -#define HSMCI_IER_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IER) Command Ready Interrupt Enable */ -#define HSMCI_IER_RXRDY (0x1 << 1) /**< \brief (HSMCI_IER) Receiver Ready Interrupt Enable */ -#define HSMCI_IER_TXRDY (0x1 << 2) /**< \brief (HSMCI_IER) Transmit Ready Interrupt Enable */ -#define HSMCI_IER_BLKE (0x1 << 3) /**< \brief (HSMCI_IER) Data Block Ended Interrupt Enable */ -#define HSMCI_IER_DTIP (0x1 << 4) /**< \brief (HSMCI_IER) Data Transfer in Progress Interrupt Enable */ -#define HSMCI_IER_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IER) Data Not Busy Interrupt Enable */ -#define HSMCI_IER_ENDRX (0x1 << 6) /**< \brief (HSMCI_IER) End of Receive Buffer Interrupt Enable */ -#define HSMCI_IER_ENDTX (0x1 << 7) /**< \brief (HSMCI_IER) End of Transmit Buffer Interrupt Enable */ -#define HSMCI_IER_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IER) SDIO Interrupt for Slot A Interrupt Enable */ -#define HSMCI_IER_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IER) SDIO Read Wait Operation Status Interrupt Enable */ -#define HSMCI_IER_CSRCV (0x1 << 13) /**< \brief (HSMCI_IER) Completion Signal Received Interrupt Enable */ -#define HSMCI_IER_RXBUFF (0x1 << 14) /**< \brief (HSMCI_IER) Receive Buffer Full Interrupt Enable */ -#define HSMCI_IER_TXBUFE (0x1 << 15) /**< \brief (HSMCI_IER) Transmit Buffer Empty Interrupt Enable */ -#define HSMCI_IER_RINDE (0x1 << 16) /**< \brief (HSMCI_IER) Response Index Error Interrupt Enable */ -#define HSMCI_IER_RDIRE (0x1 << 17) /**< \brief (HSMCI_IER) Response Direction Error Interrupt Enable */ -#define HSMCI_IER_RCRCE (0x1 << 18) /**< \brief (HSMCI_IER) Response CRC Error Interrupt Enable */ -#define HSMCI_IER_RENDE (0x1 << 19) /**< \brief (HSMCI_IER) Response End Bit Error Interrupt Enable */ -#define HSMCI_IER_RTOE (0x1 << 20) /**< \brief (HSMCI_IER) Response Time-out Error Interrupt Enable */ -#define HSMCI_IER_DCRCE (0x1 << 21) /**< \brief (HSMCI_IER) Data CRC Error Interrupt Enable */ -#define HSMCI_IER_DTOE (0x1 << 22) /**< \brief (HSMCI_IER) Data Time-out Error Interrupt Enable */ -#define HSMCI_IER_CSTOE (0x1 << 23) /**< \brief (HSMCI_IER) Completion Signal Timeout Error Interrupt Enable */ -#define HSMCI_IER_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IER) FIFO empty Interrupt enable */ -#define HSMCI_IER_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IER) Transfer Done Interrupt enable */ -#define HSMCI_IER_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IER) Boot Acknowledge Interrupt Enable */ -#define HSMCI_IER_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IER) Boot Acknowledge Error Interrupt Enable */ -#define HSMCI_IER_OVRE (0x1 << 30) /**< \brief (HSMCI_IER) Overrun Interrupt Enable */ -#define HSMCI_IER_UNRE (0x1 << 31) /**< \brief (HSMCI_IER) Underrun Interrupt Enable */ -/* -------- HSMCI_IDR : (HSMCI Offset: 0x48) Interrupt Disable Register -------- */ -#define HSMCI_IDR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IDR) Command Ready Interrupt Disable */ -#define HSMCI_IDR_RXRDY (0x1 << 1) /**< \brief (HSMCI_IDR) Receiver Ready Interrupt Disable */ -#define HSMCI_IDR_TXRDY (0x1 << 2) /**< \brief (HSMCI_IDR) Transmit Ready Interrupt Disable */ -#define HSMCI_IDR_BLKE (0x1 << 3) /**< \brief (HSMCI_IDR) Data Block Ended Interrupt Disable */ -#define HSMCI_IDR_DTIP (0x1 << 4) /**< \brief (HSMCI_IDR) Data Transfer in Progress Interrupt Disable */ -#define HSMCI_IDR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IDR) Data Not Busy Interrupt Disable */ -#define HSMCI_IDR_ENDRX (0x1 << 6) /**< \brief (HSMCI_IDR) End of Receive Buffer Interrupt Disable */ -#define HSMCI_IDR_ENDTX (0x1 << 7) /**< \brief (HSMCI_IDR) End of Transmit Buffer Interrupt Disable */ -#define HSMCI_IDR_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IDR) SDIO Interrupt for Slot A Interrupt Disable */ -#define HSMCI_IDR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IDR) SDIO Read Wait Operation Status Interrupt Disable */ -#define HSMCI_IDR_CSRCV (0x1 << 13) /**< \brief (HSMCI_IDR) Completion Signal received interrupt Disable */ -#define HSMCI_IDR_RXBUFF (0x1 << 14) /**< \brief (HSMCI_IDR) Receive Buffer Full Interrupt Disable */ -#define HSMCI_IDR_TXBUFE (0x1 << 15) /**< \brief (HSMCI_IDR) Transmit Buffer Empty Interrupt Disable */ -#define HSMCI_IDR_RINDE (0x1 << 16) /**< \brief (HSMCI_IDR) Response Index Error Interrupt Disable */ -#define HSMCI_IDR_RDIRE (0x1 << 17) /**< \brief (HSMCI_IDR) Response Direction Error Interrupt Disable */ -#define HSMCI_IDR_RCRCE (0x1 << 18) /**< \brief (HSMCI_IDR) Response CRC Error Interrupt Disable */ -#define HSMCI_IDR_RENDE (0x1 << 19) /**< \brief (HSMCI_IDR) Response End Bit Error Interrupt Disable */ -#define HSMCI_IDR_RTOE (0x1 << 20) /**< \brief (HSMCI_IDR) Response Time-out Error Interrupt Disable */ -#define HSMCI_IDR_DCRCE (0x1 << 21) /**< \brief (HSMCI_IDR) Data CRC Error Interrupt Disable */ -#define HSMCI_IDR_DTOE (0x1 << 22) /**< \brief (HSMCI_IDR) Data Time-out Error Interrupt Disable */ -#define HSMCI_IDR_CSTOE (0x1 << 23) /**< \brief (HSMCI_IDR) Completion Signal Time out Error Interrupt Disable */ -#define HSMCI_IDR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IDR) FIFO empty Interrupt Disable */ -#define HSMCI_IDR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IDR) Transfer Done Interrupt Disable */ -#define HSMCI_IDR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IDR) Boot Acknowledge Interrupt Disable */ -#define HSMCI_IDR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IDR) Boot Acknowledge Error Interrupt Disable */ -#define HSMCI_IDR_OVRE (0x1 << 30) /**< \brief (HSMCI_IDR) Overrun Interrupt Disable */ -#define HSMCI_IDR_UNRE (0x1 << 31) /**< \brief (HSMCI_IDR) Underrun Interrupt Disable */ -/* -------- HSMCI_IMR : (HSMCI Offset: 0x4C) Interrupt Mask Register -------- */ -#define HSMCI_IMR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IMR) Command Ready Interrupt Mask */ -#define HSMCI_IMR_RXRDY (0x1 << 1) /**< \brief (HSMCI_IMR) Receiver Ready Interrupt Mask */ -#define HSMCI_IMR_TXRDY (0x1 << 2) /**< \brief (HSMCI_IMR) Transmit Ready Interrupt Mask */ -#define HSMCI_IMR_BLKE (0x1 << 3) /**< \brief (HSMCI_IMR) Data Block Ended Interrupt Mask */ -#define HSMCI_IMR_DTIP (0x1 << 4) /**< \brief (HSMCI_IMR) Data Transfer in Progress Interrupt Mask */ -#define HSMCI_IMR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IMR) Data Not Busy Interrupt Mask */ -#define HSMCI_IMR_ENDRX (0x1 << 6) /**< \brief (HSMCI_IMR) End of Receive Buffer Interrupt Mask */ -#define HSMCI_IMR_ENDTX (0x1 << 7) /**< \brief (HSMCI_IMR) End of Transmit Buffer Interrupt Mask */ -#define HSMCI_IMR_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IMR) SDIO Interrupt for Slot A Interrupt Mask */ -#define HSMCI_IMR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IMR) SDIO Read Wait Operation Status Interrupt Mask */ -#define HSMCI_IMR_CSRCV (0x1 << 13) /**< \brief (HSMCI_IMR) Completion Signal Received Interrupt Mask */ -#define HSMCI_IMR_RXBUFF (0x1 << 14) /**< \brief (HSMCI_IMR) Receive Buffer Full Interrupt Mask */ -#define HSMCI_IMR_TXBUFE (0x1 << 15) /**< \brief (HSMCI_IMR) Transmit Buffer Empty Interrupt Mask */ -#define HSMCI_IMR_RINDE (0x1 << 16) /**< \brief (HSMCI_IMR) Response Index Error Interrupt Mask */ -#define HSMCI_IMR_RDIRE (0x1 << 17) /**< \brief (HSMCI_IMR) Response Direction Error Interrupt Mask */ -#define HSMCI_IMR_RCRCE (0x1 << 18) /**< \brief (HSMCI_IMR) Response CRC Error Interrupt Mask */ -#define HSMCI_IMR_RENDE (0x1 << 19) /**< \brief (HSMCI_IMR) Response End Bit Error Interrupt Mask */ -#define HSMCI_IMR_RTOE (0x1 << 20) /**< \brief (HSMCI_IMR) Response Time-out Error Interrupt Mask */ -#define HSMCI_IMR_DCRCE (0x1 << 21) /**< \brief (HSMCI_IMR) Data CRC Error Interrupt Mask */ -#define HSMCI_IMR_DTOE (0x1 << 22) /**< \brief (HSMCI_IMR) Data Time-out Error Interrupt Mask */ -#define HSMCI_IMR_CSTOE (0x1 << 23) /**< \brief (HSMCI_IMR) Completion Signal Time-out Error Interrupt Mask */ -#define HSMCI_IMR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IMR) FIFO Empty Interrupt Mask */ -#define HSMCI_IMR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IMR) Transfer Done Interrupt Mask */ -#define HSMCI_IMR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IMR) Boot Operation Acknowledge Received Interrupt Mask */ -#define HSMCI_IMR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IMR) Boot Operation Acknowledge Error Interrupt Mask */ -#define HSMCI_IMR_OVRE (0x1 << 30) /**< \brief (HSMCI_IMR) Overrun Interrupt Mask */ -#define HSMCI_IMR_UNRE (0x1 << 31) /**< \brief (HSMCI_IMR) Underrun Interrupt Mask */ -/* -------- HSMCI_CFG : (HSMCI Offset: 0x54) Configuration Register -------- */ -#define HSMCI_CFG_FIFOMODE (0x1 << 0) /**< \brief (HSMCI_CFG) HSMCI Internal FIFO control mode */ -#define HSMCI_CFG_FERRCTRL (0x1 << 4) /**< \brief (HSMCI_CFG) Flow Error flag reset control mode */ -#define HSMCI_CFG_HSMODE (0x1 << 8) /**< \brief (HSMCI_CFG) High Speed Mode */ -#define HSMCI_CFG_LSYNC (0x1 << 12) /**< \brief (HSMCI_CFG) Synchronize on the last block */ -/* -------- HSMCI_WPMR : (HSMCI Offset: 0xE4) Write Protection Mode Register -------- */ -#define HSMCI_WPMR_WP_EN (0x1 << 0) /**< \brief (HSMCI_WPMR) Write Protection Enable */ -#define HSMCI_WPMR_WP_KEY (0xffffff << 8) /**< \brief (HSMCI_WPMR) Write Protection Key password */ -/* -------- HSMCI_WPSR : (HSMCI Offset: 0xE8) Write Protection Status Register -------- */ -#define HSMCI_WPSR_WP_VS (0xf << 0) /**< \brief (HSMCI_WPSR) Write Protection Violation Status */ -#define HSMCI_WPSR_WP_VSRC (0xffff << 8) /**< \brief (HSMCI_WPSR) Write Protection Violation SouRCe */ -/* -------- HSMCI_RPR : (HSMCI Offset: 0x100) Receive Pointer Register -------- */ -#define HSMCI_RPR_RXPTR (0xffffffff << 0) /**< \brief (HSMCI_RPR) Receive Pointer Register */ -/* -------- HSMCI_RCR : (HSMCI Offset: 0x104) Receive Counter Register -------- */ -#define HSMCI_RCR_RXCTR (0xffff << 0) /**< \brief (HSMCI_RCR) Receive Counter Register */ -/* -------- HSMCI_TPR : (HSMCI Offset: 0x108) Transmit Pointer Register -------- */ -#define HSMCI_TPR_TXPTR (0xffffffff << 0) /**< \brief (HSMCI_TPR) Transmit Counter Register */ -/* -------- HSMCI_TCR : (HSMCI Offset: 0x10C) Transmit Counter Register -------- */ -#define HSMCI_TCR_TXCTR (0xffff << 0) /**< \brief (HSMCI_TCR) Transmit Counter Register */ -/* -------- HSMCI_RNPR : (HSMCI Offset: 0x110) Receive Next Pointer Register -------- */ -#define HSMCI_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (HSMCI_RNPR) Receive Next Pointer */ -/* -------- HSMCI_RNCR : (HSMCI Offset: 0x114) Receive Next Counter Register -------- */ -#define HSMCI_RNCR_RXNCTR (0xffff << 0) /**< \brief (HSMCI_RNCR) Receive Next Counter */ -/* -------- HSMCI_TNPR : (HSMCI Offset: 0x118) Transmit Next Pointer Register -------- */ -#define HSMCI_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (HSMCI_TNPR) Transmit Next Pointer */ -/* -------- HSMCI_TNCR : (HSMCI Offset: 0x11C) Transmit Next Counter Register -------- */ -#define HSMCI_TNCR_TXNCTR (0xffff << 0) /**< \brief (HSMCI_TNCR) Transmit Counter Next */ -/* -------- HSMCI_PTCR : (HSMCI Offset: 0x120) Transfer Control Register -------- */ -#define HSMCI_PTCR_RXTEN (0x1 << 0) /**< \brief (HSMCI_PTCR) Receiver Transfer Enable */ -#define HSMCI_PTCR_RXTDIS (0x1 << 1) /**< \brief (HSMCI_PTCR) Receiver Transfer Disable */ -#define HSMCI_PTCR_TXTEN (0x1 << 8) /**< \brief (HSMCI_PTCR) Transmitter Transfer Enable */ -#define HSMCI_PTCR_TXTDIS (0x1 << 9) /**< \brief (HSMCI_PTCR) Transmitter Transfer Disable */ -/* -------- HSMCI_PTSR : (HSMCI Offset: 0x124) Transfer Status Register -------- */ -#define HSMCI_PTSR_RXTEN (0x1 << 0) /**< \brief (HSMCI_PTSR) Receiver Transfer Enable */ -#define HSMCI_PTSR_TXTEN (0x1 << 8) /**< \brief (HSMCI_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR AHB Bus Matrix */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_MATRIX AHB Bus Matrix */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Matrix hardware registers */ -typedef struct { - RwReg MATRIX_MCFG[4]; /**< \brief (Matrix Offset: 0x0000) Master Configuration Register */ - RwReg Reserved1[12]; - RwReg MATRIX_SCFG[5]; /**< \brief (Matrix Offset: 0x0040) Slave Configuration Register */ - RwReg Reserved2[11]; - RwReg MATRIX_PRAS0; /**< \brief (Matrix Offset: 0x0080) Priority Register A for Slave 0 */ - RwReg Reserved3[1]; - RwReg MATRIX_PRAS1; /**< \brief (Matrix Offset: 0x0088) Priority Register A for Slave 1 */ - RwReg Reserved4[1]; - RwReg MATRIX_PRAS2; /**< \brief (Matrix Offset: 0x0090) Priority Register A for Slave 2 */ - RwReg Reserved5[1]; - RwReg MATRIX_PRAS3; /**< \brief (Matrix Offset: 0x0098) Priority Register A for Slave 3 */ - RwReg Reserved6[1]; - RwReg MATRIX_PRAS4; /**< \brief (Matrix Offset: 0x00A0) Priority Register A for Slave 4 */ - RwReg Reserved7[28]; - RwReg CCFG_SYSIO; /**< \brief (Matrix Offset: 0x0114) System IO Configuration register */ - RwReg Reserved8[1]; - RwReg CCFG_SMCNFCS; /**< \brief (Matrix Offset: 0x011C) SMC Chip Select NAND Flash Assignment Register */ - RwReg Reserved9[49]; - RwReg MATRIX_WPMR; /**< \brief (Matrix Offset: 0x1E4) Write Protect Mode Register */ - RoReg MATRIX_WPSR; /**< \brief (Matrix Offset: 0x1E8) Write Protect Status Register */ -} Matrix; -#endif /* __ASSEMBLY__ */ -/* -------- MATRIX_MCFG[4] : (MATRIX Offset: 0x0000) Master Configuration Register -------- */ -#define MATRIX_MCFG_ULBT (0x7 << 0) /**< \brief (MATRIX_MCFG[4]) Undefined Length Burst Type */ -/* -------- MATRIX_SCFG[5] : (MATRIX Offset: 0x0040) Slave Configuration Register -------- */ -#define MATRIX_SCFG_SLOT_CYCLE (0xff << 0) /**< \brief (MATRIX_SCFG[5]) Maximum Number of Allowed Cycles for a Burst */ -#define MATRIX_SCFG_DEFMSTR_TYPE (0x3 << 16) /**< \brief (MATRIX_SCFG[5]) Default Master Type */ -#define MATRIX_SCFG_FIXED_DEFMSTR (0x7 << 18) /**< \brief (MATRIX_SCFG[5]) Fixed Default Master */ -#define MATRIX_SCFG_ARBT (0x3 << 24) /**< \brief (MATRIX_SCFG[5]) Arbitration Type */ -/* -------- MATRIX_PRAS0 : (MATRIX Offset: 0x0080) Priority Register A for Slave 0 -------- */ -#define MATRIX_PRAS0_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS0) Master 0 Priority */ -#define MATRIX_PRAS0_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS0) Master 1 Priority */ -#define MATRIX_PRAS0_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS0) Master 2 Priority */ -#define MATRIX_PRAS0_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS0) Master 3 Priority */ -#define MATRIX_PRAS0_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS0) Master 4 Priority */ -/* -------- MATRIX_PRAS1 : (MATRIX Offset: 0x0088) Priority Register A for Slave 1 -------- */ -#define MATRIX_PRAS1_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS1) Master 0 Priority */ -#define MATRIX_PRAS1_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS1) Master 1 Priority */ -#define MATRIX_PRAS1_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS1) Master 2 Priority */ -#define MATRIX_PRAS1_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS1) Master 3 Priority */ -#define MATRIX_PRAS1_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS1) Master 4 Priority */ -/* -------- MATRIX_PRAS2 : (MATRIX Offset: 0x0090) Priority Register A for Slave 2 -------- */ -#define MATRIX_PRAS2_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS2) Master 0 Priority */ -#define MATRIX_PRAS2_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS2) Master 1 Priority */ -#define MATRIX_PRAS2_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS2) Master 2 Priority */ -#define MATRIX_PRAS2_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS2) Master 3 Priority */ -#define MATRIX_PRAS2_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS2) Master 4 Priority */ -/* -------- MATRIX_PRAS3 : (MATRIX Offset: 0x0098) Priority Register A for Slave 3 -------- */ -#define MATRIX_PRAS3_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS3) Master 0 Priority */ -#define MATRIX_PRAS3_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS3) Master 1 Priority */ -#define MATRIX_PRAS3_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS3) Master 2 Priority */ -#define MATRIX_PRAS3_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS3) Master 3 Priority */ -#define MATRIX_PRAS3_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS3) Master 4 Priority */ -/* -------- MATRIX_PRAS4 : (MATRIX Offset: 0x00A0) Priority Register A for Slave 4 -------- */ -#define MATRIX_PRAS4_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS4) Master 0 Priority */ -#define MATRIX_PRAS4_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS4) Master 1 Priority */ -#define MATRIX_PRAS4_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS4) Master 2 Priority */ -#define MATRIX_PRAS4_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS4) Master 3 Priority */ -#define MATRIX_PRAS4_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS4) Master 4 Priority */ -/* -------- CCFG_SYSIO : (MATRIX Offset: 0x0114) System IO Configuration register -------- */ -#define CCFG_SYSIO_SYSIO4 (0x1 << 4) /**< \brief (CCFG_SYSIO) PB4 or TDI Assignment */ -#define CCFG_SYSIO_SYSIO5 (0x1 << 5) /**< \brief (CCFG_SYSIO) PB5 or TDO/TRACESWO Assignment */ -#define CCFG_SYSIO_SYSIO6 (0x1 << 6) /**< \brief (CCFG_SYSIO) PB6 or TMS/SWDIO Assignment */ -#define CCFG_SYSIO_SYSIO7 (0x1 << 7) /**< \brief (CCFG_SYSIO) PB7 or TCK/SWCLK Assignment */ -#define CCFG_SYSIO_SYSIO10 (0x1 << 10) /**< \brief (CCFG_SYSIO) PB10 or DDM Assignment */ -#define CCFG_SYSIO_SYSIO11 (0x1 << 11) /**< \brief (CCFG_SYSIO) PB11 or DDP Assignment */ -#define CCFG_SYSIO_SYSIO12 (0x1 << 12) /**< \brief (CCFG_SYSIO) PB12 or ERASE Assignment */ -/* -------- CCFG_SMCNFCS : (MATRIX Offset: 0x011C) SMC Chip Select NAND Flash Assignment Register -------- */ -#define CCFG_SMCNFCS_SMC_NFCS0 (0x1 << 0) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 0 Assignment */ -#define CCFG_SMCNFCS_SMC_NFCS1 (0x1 << 1) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 1 Assignment */ -#define CCFG_SMCNFCS_SMC_NFCS2 (0x1 << 2) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 2 Assignment */ -#define CCFG_SMCNFCS_SMC_NFCS3 (0x1 << 3) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 3 Assignment */ -/* -------- MATRIX_WPMR : (MATRIX Offset: 0x1E4) Write Protect Mode Register -------- */ -#define MATRIX_WPMR_WPEN (0x1 << 0) /**< \brief (MATRIX_WPMR) Write Protect ENable */ -#define MATRIX_WPMR_WPKEY (0xffffff << 8) /**< \brief (MATRIX_WPMR) Write Protect KEY (Write-only) */ -/* -------- MATRIX_WPSR : (MATRIX Offset: 0x1E8) Write Protect Status Register -------- */ -#define MATRIX_WPSR_WPVS (0x1 << 0) /**< \brief (MATRIX_WPSR) Write Protect Violation Status */ -#define MATRIX_WPSR_WPVSRC (0xffff << 8) /**< \brief (MATRIX_WPSR) Write Protect Violation Source */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Peripheral DMA Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_PDC Peripheral DMA Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pdc hardware registers */ -typedef struct { - RwReg Reserved1[64]; - RwReg PERIPH_RPR; /**< \brief (Pdc Offset: 0x100) Receive Pointer Register */ - RwReg PERIPH_RCR; /**< \brief (Pdc Offset: 0x104) Receive Counter Register */ - RwReg PERIPH_TPR; /**< \brief (Pdc Offset: 0x108) Transmit Pointer Register */ - RwReg PERIPH_TCR; /**< \brief (Pdc Offset: 0x10C) Transmit Counter Register */ - RwReg PERIPH_RNPR; /**< \brief (Pdc Offset: 0x110) Receive Next Pointer Register */ - RwReg PERIPH_RNCR; /**< \brief (Pdc Offset: 0x114) Receive Next Counter Register */ - RwReg PERIPH_TNPR; /**< \brief (Pdc Offset: 0x118) Transmit Next Pointer Register */ - RwReg PERIPH_TNCR; /**< \brief (Pdc Offset: 0x11C) Transmit Next Counter Register */ - WoReg PERIPH_PTCR; /**< \brief (Pdc Offset: 0x120) Transfer Control Register */ - RoReg PERIPH_PTSR; /**< \brief (Pdc Offset: 0x124) Transfer Status Register */ -} Pdc; -#endif /* __ASSEMBLY__ */ -/* -------- PERIPH_RPR : (PDC Offset: 0x100) Receive Pointer Register -------- */ -#define PERIPH_RPR_RXPTR (0xffffffff << 0) /**< \brief (PERIPH_RPR) Receive Pointer Register */ -/* -------- PERIPH_RCR : (PDC Offset: 0x104) Receive Counter Register -------- */ -#define PERIPH_RCR_RXCTR (0xffff << 0) /**< \brief (PERIPH_RCR) Receive Counter Register */ -/* -------- PERIPH_TPR : (PDC Offset: 0x108) Transmit Pointer Register -------- */ -#define PERIPH_TPR_TXPTR (0xffffffff << 0) /**< \brief (PERIPH_TPR) Transmit Counter Register */ -/* -------- PERIPH_TCR : (PDC Offset: 0x10C) Transmit Counter Register -------- */ -#define PERIPH_TCR_TXCTR (0xffff << 0) /**< \brief (PERIPH_TCR) Transmit Counter Register */ -/* -------- PERIPH_RNPR : (PDC Offset: 0x110) Receive Next Pointer Register -------- */ -#define PERIPH_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (PERIPH_RNPR) Receive Next Pointer */ -/* -------- PERIPH_RNCR : (PDC Offset: 0x114) Receive Next Counter Register -------- */ -#define PERIPH_RNCR_RXNCTR (0xffff << 0) /**< \brief (PERIPH_RNCR) Receive Next Counter */ -/* -------- PERIPH_TNPR : (PDC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define PERIPH_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (PERIPH_TNPR) Transmit Next Pointer */ -/* -------- PERIPH_TNCR : (PDC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define PERIPH_TNCR_TXNCTR (0xffff << 0) /**< \brief (PERIPH_TNCR) Transmit Counter Next */ -/* -------- PERIPH_PTCR : (PDC Offset: 0x120) Transfer Control Register -------- */ -#define PERIPH_PTCR_RXTEN (0x1 << 0) /**< \brief (PERIPH_PTCR) Receiver Transfer Enable */ -#define PERIPH_PTCR_RXTDIS (0x1 << 1) /**< \brief (PERIPH_PTCR) Receiver Transfer Disable */ -#define PERIPH_PTCR_TXTEN (0x1 << 8) /**< \brief (PERIPH_PTCR) Transmitter Transfer Enable */ -#define PERIPH_PTCR_TXTDIS (0x1 << 9) /**< \brief (PERIPH_PTCR) Transmitter Transfer Disable */ -/* -------- PERIPH_PTSR : (PDC Offset: 0x124) Transfer Status Register -------- */ -#define PERIPH_PTSR_RXTEN (0x1 << 0) /**< \brief (PERIPH_PTSR) Receiver Transfer Enable */ -#define PERIPH_PTSR_TXTEN (0x1 << 8) /**< \brief (PERIPH_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Parallel Input/Output */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_PIO Parallel Input/Output */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pio hardware registers */ -typedef struct { - WoReg PIO_PER; /**< \brief (Pio Offset: 0x0000) PIO Enable Register */ - WoReg PIO_PDR; /**< \brief (Pio Offset: 0x0004) PIO Disable Register */ - RoReg PIO_PSR; /**< \brief (Pio Offset: 0x0008) PIO Status Register */ - RwReg Reserved1[1]; - WoReg PIO_OER; /**< \brief (Pio Offset: 0x0010) Output Enable Register */ - WoReg PIO_ODR; /**< \brief (Pio Offset: 0x0014) Output Disable Register */ - RoReg PIO_OSR; /**< \brief (Pio Offset: 0x0018) Output Status Register */ - RwReg Reserved2[1]; - WoReg PIO_IFER; /**< \brief (Pio Offset: 0x0020) Glitch Input Filter Enable Register */ - WoReg PIO_IFDR; /**< \brief (Pio Offset: 0x0024) Glitch Input Filter Disable Register */ - RoReg PIO_IFSR; /**< \brief (Pio Offset: 0x0028) Glitch Input Filter Status Register */ - RwReg Reserved3[1]; - WoReg PIO_SODR; /**< \brief (Pio Offset: 0x0030) Set Output Data Register */ - WoReg PIO_CODR; /**< \brief (Pio Offset: 0x0034) Clear Output Data Register */ - RwReg PIO_ODSR; /**< \brief (Pio Offset: 0x0038) Output Data Status Register */ - RoReg PIO_PDSR; /**< \brief (Pio Offset: 0x003C) Pin Data Status Register */ - WoReg PIO_IER; /**< \brief (Pio Offset: 0x0040) Interrupt Enable Register */ - WoReg PIO_IDR; /**< \brief (Pio Offset: 0x0044) Interrupt Disable Register */ - RoReg PIO_IMR; /**< \brief (Pio Offset: 0x0048) Interrupt Mask Register */ - RoReg PIO_ISR; /**< \brief (Pio Offset: 0x004C) Interrupt Status Register */ - WoReg PIO_MDER; /**< \brief (Pio Offset: 0x0050) Multi-driver Enable Register */ - WoReg PIO_MDDR; /**< \brief (Pio Offset: 0x0054) Multi-driver Disable Register */ - RoReg PIO_MDSR; /**< \brief (Pio Offset: 0x0058) Multi-driver Status Register */ - RwReg Reserved4[1]; - WoReg PIO_PUDR; /**< \brief (Pio Offset: 0x0060) Pull-up Disable Register */ - WoReg PIO_PUER; /**< \brief (Pio Offset: 0x0064) Pull-up Enable Register */ - RoReg PIO_PUSR; /**< \brief (Pio Offset: 0x0068) Pad Pull-up Status Register */ - RwReg Reserved5[1]; - RwReg PIO_ABCDSR[2]; /**< \brief (Pio Offset: 0x0070) Peripheral Select Register */ - RwReg Reserved6[2]; - WoReg PIO_SCIFSR; /**< \brief (Pio Offset: 0x0080) System Clock Glitch Input Filter Select Register */ - WoReg PIO_DIFSR; /**< \brief (Pio Offset: 0x0084) Debouncing Input Filter Select Register */ - RoReg PIO_IFDGSR; /**< \brief (Pio Offset: 0x0088) Glitch or Debouncing Input Filter Clock Selection Status Register */ - RwReg PIO_SCDR; /**< \brief (Pio Offset: 0x008C) Slow Clock Divider Debouncing Register */ - WoReg PIO_PPDDR; /**< \brief (Pio Offset: 0x0090) Pad Pull-down Disable Register */ - WoReg PIO_PPDER; /**< \brief (Pio Offset: 0x0094) Pad Pull-down Enable Register */ - RoReg PIO_PPDSR; /**< \brief (Pio Offset: 0x0098) Pad Pull-down Status Register */ - RwReg Reserved7[1]; - WoReg PIO_OWER; /**< \brief (Pio Offset: 0x00A0) Output Write Enable */ - WoReg PIO_OWDR; /**< \brief (Pio Offset: 0x00A4) Output Write Disable */ - RoReg PIO_OWSR; /**< \brief (Pio Offset: 0x00A8) Output Write Status Register */ - RwReg Reserved8[1]; - WoReg PIO_AIMER; /**< \brief (Pio Offset: 0x00B0) Additional Interrupt Modes Enable Register */ - WoReg PIO_AIMDR; /**< \brief (Pio Offset: 0x00B4) Additional Interrupt Modes Disables Register */ - RoReg PIO_AIMMR; /**< \brief (Pio Offset: 0x00B8) Additional Interrupt Modes Mask Register */ - RwReg Reserved9[1]; - WoReg PIO_ESR; /**< \brief (Pio Offset: 0x00C0) Edge Select Register */ - WoReg PIO_LSR; /**< \brief (Pio Offset: 0x00C4) Level Select Register */ - RoReg PIO_ELSR; /**< \brief (Pio Offset: 0x00C8) Edge/Level Status Register */ - RwReg Reserved10[1]; - WoReg PIO_FELLSR; /**< \brief (Pio Offset: 0x00D0) Falling Edge/Low Level Select Register */ - WoReg PIO_REHLSR; /**< \brief (Pio Offset: 0x00D4) Rising Edge/ High Level Select Register */ - RoReg PIO_FRLHSR; /**< \brief (Pio Offset: 0x00D8) Fall/Rise - Low/High Status Register */ - RwReg Reserved11[1]; - RoReg PIO_LOCKSR; /**< \brief (Pio Offset: 0x00E0) Lock Status */ - RwReg PIO_WPMR; /**< \brief (Pio Offset: 0x00E4) Write Protect Mode Register */ - RoReg PIO_WPSR; /**< \brief (Pio Offset: 0x00E8) Write Protect Status Register */ - RwReg Reserved12[5]; - RwReg PIO_SCHMITT; /**< \brief (Pio Offset: 0x0100) Schmitt Trigger Register */ - RwReg Reserved13[19]; - RwReg PIO_PCMR; /**< \brief (Pio Offset: 0x150) Parallel Capture Mode Register */ - WoReg PIO_PCIER; /**< \brief (Pio Offset: 0x154) Parallel Capture Interrupt Enable Register */ - WoReg PIO_PCIDR; /**< \brief (Pio Offset: 0x158) Parallel Capture Interrupt Disable Register */ - RoReg PIO_PCIMR; /**< \brief (Pio Offset: 0x15C) Parallel Capture Interrupt Mask Register */ - RoReg PIO_PCISR; /**< \brief (Pio Offset: 0x160) Parallel Capture Interrupt Status Register */ - RoReg PIO_PCRHR; /**< \brief (Pio Offset: 0x164) Parallel Capture Reception Holding Register */ -} Pio; -#endif /* __ASSEMBLY__ */ -/* -------- PIO_PER : (PIO Offset: 0x0000) PIO Enable Register -------- */ -#define PIO_PER_P0 (0x1 << 0) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P1 (0x1 << 1) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P2 (0x1 << 2) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P3 (0x1 << 3) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P4 (0x1 << 4) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P5 (0x1 << 5) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P6 (0x1 << 6) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P7 (0x1 << 7) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P8 (0x1 << 8) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P9 (0x1 << 9) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P10 (0x1 << 10) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P11 (0x1 << 11) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P12 (0x1 << 12) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P13 (0x1 << 13) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P14 (0x1 << 14) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P15 (0x1 << 15) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P16 (0x1 << 16) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P17 (0x1 << 17) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P18 (0x1 << 18) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P19 (0x1 << 19) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P20 (0x1 << 20) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P21 (0x1 << 21) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P22 (0x1 << 22) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P23 (0x1 << 23) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P24 (0x1 << 24) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P25 (0x1 << 25) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P26 (0x1 << 26) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P27 (0x1 << 27) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P28 (0x1 << 28) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P29 (0x1 << 29) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P30 (0x1 << 30) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P31 (0x1 << 31) /**< \brief (PIO_PER) PIO Enable */ -/* -------- PIO_PDR : (PIO Offset: 0x0004) PIO Disable Register -------- */ -#define PIO_PDR_P0 (0x1 << 0) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P1 (0x1 << 1) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P2 (0x1 << 2) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P3 (0x1 << 3) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P4 (0x1 << 4) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P5 (0x1 << 5) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P6 (0x1 << 6) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P7 (0x1 << 7) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P8 (0x1 << 8) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P9 (0x1 << 9) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P10 (0x1 << 10) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P11 (0x1 << 11) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P12 (0x1 << 12) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P13 (0x1 << 13) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P14 (0x1 << 14) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P15 (0x1 << 15) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P16 (0x1 << 16) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P17 (0x1 << 17) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P18 (0x1 << 18) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P19 (0x1 << 19) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P20 (0x1 << 20) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P21 (0x1 << 21) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P22 (0x1 << 22) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P23 (0x1 << 23) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P24 (0x1 << 24) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P25 (0x1 << 25) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P26 (0x1 << 26) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P27 (0x1 << 27) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P28 (0x1 << 28) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P29 (0x1 << 29) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P30 (0x1 << 30) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P31 (0x1 << 31) /**< \brief (PIO_PDR) PIO Disable */ -/* -------- PIO_PSR : (PIO Offset: 0x0008) PIO Status Register -------- */ -#define PIO_PSR_P0 (0x1 << 0) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P1 (0x1 << 1) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P2 (0x1 << 2) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P3 (0x1 << 3) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P4 (0x1 << 4) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P5 (0x1 << 5) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P6 (0x1 << 6) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P7 (0x1 << 7) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P8 (0x1 << 8) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P9 (0x1 << 9) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P10 (0x1 << 10) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P11 (0x1 << 11) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P12 (0x1 << 12) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P13 (0x1 << 13) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P14 (0x1 << 14) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P15 (0x1 << 15) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P16 (0x1 << 16) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P17 (0x1 << 17) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P18 (0x1 << 18) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P19 (0x1 << 19) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P20 (0x1 << 20) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P21 (0x1 << 21) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P22 (0x1 << 22) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P23 (0x1 << 23) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P24 (0x1 << 24) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P25 (0x1 << 25) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P26 (0x1 << 26) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P27 (0x1 << 27) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P28 (0x1 << 28) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P29 (0x1 << 29) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P30 (0x1 << 30) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P31 (0x1 << 31) /**< \brief (PIO_PSR) PIO Status */ -/* -------- PIO_OER : (PIO Offset: 0x0010) Output Enable Register -------- */ -#define PIO_OER_P0 (0x1 << 0) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P1 (0x1 << 1) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P2 (0x1 << 2) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P3 (0x1 << 3) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P4 (0x1 << 4) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P5 (0x1 << 5) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P6 (0x1 << 6) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P7 (0x1 << 7) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P8 (0x1 << 8) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P9 (0x1 << 9) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P10 (0x1 << 10) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P11 (0x1 << 11) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P12 (0x1 << 12) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P13 (0x1 << 13) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P14 (0x1 << 14) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P15 (0x1 << 15) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P16 (0x1 << 16) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P17 (0x1 << 17) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P18 (0x1 << 18) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P19 (0x1 << 19) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P20 (0x1 << 20) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P21 (0x1 << 21) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P22 (0x1 << 22) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P23 (0x1 << 23) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P24 (0x1 << 24) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P25 (0x1 << 25) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P26 (0x1 << 26) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P27 (0x1 << 27) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P28 (0x1 << 28) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P29 (0x1 << 29) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P30 (0x1 << 30) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P31 (0x1 << 31) /**< \brief (PIO_OER) Output Enable */ -/* -------- PIO_ODR : (PIO Offset: 0x0014) Output Disable Register -------- */ -#define PIO_ODR_P0 (0x1 << 0) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P1 (0x1 << 1) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P2 (0x1 << 2) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P3 (0x1 << 3) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P4 (0x1 << 4) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P5 (0x1 << 5) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P6 (0x1 << 6) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P7 (0x1 << 7) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P8 (0x1 << 8) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P9 (0x1 << 9) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P10 (0x1 << 10) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P11 (0x1 << 11) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P12 (0x1 << 12) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P13 (0x1 << 13) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P14 (0x1 << 14) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P15 (0x1 << 15) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P16 (0x1 << 16) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P17 (0x1 << 17) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P18 (0x1 << 18) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P19 (0x1 << 19) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P20 (0x1 << 20) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P21 (0x1 << 21) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P22 (0x1 << 22) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P23 (0x1 << 23) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P24 (0x1 << 24) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P25 (0x1 << 25) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P26 (0x1 << 26) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P27 (0x1 << 27) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P28 (0x1 << 28) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P29 (0x1 << 29) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P30 (0x1 << 30) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P31 (0x1 << 31) /**< \brief (PIO_ODR) Output Disable */ -/* -------- PIO_OSR : (PIO Offset: 0x0018) Output Status Register -------- */ -#define PIO_OSR_P0 (0x1 << 0) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P1 (0x1 << 1) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P2 (0x1 << 2) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P3 (0x1 << 3) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P4 (0x1 << 4) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P5 (0x1 << 5) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P6 (0x1 << 6) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P7 (0x1 << 7) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P8 (0x1 << 8) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P9 (0x1 << 9) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P10 (0x1 << 10) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P11 (0x1 << 11) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P12 (0x1 << 12) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P13 (0x1 << 13) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P14 (0x1 << 14) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P15 (0x1 << 15) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P16 (0x1 << 16) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P17 (0x1 << 17) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P18 (0x1 << 18) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P19 (0x1 << 19) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P20 (0x1 << 20) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P21 (0x1 << 21) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P22 (0x1 << 22) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P23 (0x1 << 23) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P24 (0x1 << 24) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P25 (0x1 << 25) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P26 (0x1 << 26) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P27 (0x1 << 27) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P28 (0x1 << 28) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P29 (0x1 << 29) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P30 (0x1 << 30) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P31 (0x1 << 31) /**< \brief (PIO_OSR) Output Status */ -/* -------- PIO_IFER : (PIO Offset: 0x0020) Glitch Input Filter Enable Register -------- */ -#define PIO_IFER_P0 (0x1 << 0) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P1 (0x1 << 1) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P2 (0x1 << 2) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P3 (0x1 << 3) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P4 (0x1 << 4) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P5 (0x1 << 5) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P6 (0x1 << 6) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P7 (0x1 << 7) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P8 (0x1 << 8) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P9 (0x1 << 9) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P10 (0x1 << 10) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P11 (0x1 << 11) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P12 (0x1 << 12) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P13 (0x1 << 13) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P14 (0x1 << 14) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P15 (0x1 << 15) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P16 (0x1 << 16) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P17 (0x1 << 17) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P18 (0x1 << 18) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P19 (0x1 << 19) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P20 (0x1 << 20) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P21 (0x1 << 21) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P22 (0x1 << 22) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P23 (0x1 << 23) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P24 (0x1 << 24) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P25 (0x1 << 25) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P26 (0x1 << 26) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P27 (0x1 << 27) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P28 (0x1 << 28) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P29 (0x1 << 29) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P30 (0x1 << 30) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P31 (0x1 << 31) /**< \brief (PIO_IFER) Input Filter Enable */ -/* -------- PIO_IFDR : (PIO Offset: 0x0024) Glitch Input Filter Disable Register -------- */ -#define PIO_IFDR_P0 (0x1 << 0) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P1 (0x1 << 1) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P2 (0x1 << 2) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P3 (0x1 << 3) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P4 (0x1 << 4) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P5 (0x1 << 5) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P6 (0x1 << 6) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P7 (0x1 << 7) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P8 (0x1 << 8) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P9 (0x1 << 9) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P10 (0x1 << 10) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P11 (0x1 << 11) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P12 (0x1 << 12) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P13 (0x1 << 13) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P14 (0x1 << 14) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P15 (0x1 << 15) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P16 (0x1 << 16) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P17 (0x1 << 17) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P18 (0x1 << 18) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P19 (0x1 << 19) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P20 (0x1 << 20) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P21 (0x1 << 21) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P22 (0x1 << 22) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P23 (0x1 << 23) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P24 (0x1 << 24) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P25 (0x1 << 25) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P26 (0x1 << 26) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P27 (0x1 << 27) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P28 (0x1 << 28) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P29 (0x1 << 29) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P30 (0x1 << 30) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P31 (0x1 << 31) /**< \brief (PIO_IFDR) Input Filter Disable */ -/* -------- PIO_IFSR : (PIO Offset: 0x0028) Glitch Input Filter Status Register -------- */ -#define PIO_IFSR_P0 (0x1 << 0) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P1 (0x1 << 1) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P2 (0x1 << 2) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P3 (0x1 << 3) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P4 (0x1 << 4) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P5 (0x1 << 5) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P6 (0x1 << 6) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P7 (0x1 << 7) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P8 (0x1 << 8) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P9 (0x1 << 9) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P10 (0x1 << 10) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P11 (0x1 << 11) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P12 (0x1 << 12) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P13 (0x1 << 13) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P14 (0x1 << 14) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P15 (0x1 << 15) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P16 (0x1 << 16) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P17 (0x1 << 17) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P18 (0x1 << 18) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P19 (0x1 << 19) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P20 (0x1 << 20) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P21 (0x1 << 21) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P22 (0x1 << 22) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P23 (0x1 << 23) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P24 (0x1 << 24) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P25 (0x1 << 25) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P26 (0x1 << 26) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P27 (0x1 << 27) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P28 (0x1 << 28) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P29 (0x1 << 29) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P30 (0x1 << 30) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P31 (0x1 << 31) /**< \brief (PIO_IFSR) Input Filer Status */ -/* -------- PIO_SODR : (PIO Offset: 0x0030) Set Output Data Register -------- */ -#define PIO_SODR_P0 (0x1 << 0) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P1 (0x1 << 1) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P2 (0x1 << 2) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P3 (0x1 << 3) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P4 (0x1 << 4) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P5 (0x1 << 5) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P6 (0x1 << 6) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P7 (0x1 << 7) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P8 (0x1 << 8) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P9 (0x1 << 9) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P10 (0x1 << 10) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P11 (0x1 << 11) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P12 (0x1 << 12) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P13 (0x1 << 13) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P14 (0x1 << 14) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P15 (0x1 << 15) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P16 (0x1 << 16) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P17 (0x1 << 17) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P18 (0x1 << 18) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P19 (0x1 << 19) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P20 (0x1 << 20) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P21 (0x1 << 21) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P22 (0x1 << 22) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P23 (0x1 << 23) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P24 (0x1 << 24) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P25 (0x1 << 25) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P26 (0x1 << 26) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P27 (0x1 << 27) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P28 (0x1 << 28) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P29 (0x1 << 29) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P30 (0x1 << 30) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P31 (0x1 << 31) /**< \brief (PIO_SODR) Set Output Data */ -/* -------- PIO_CODR : (PIO Offset: 0x0034) Clear Output Data Register -------- */ -#define PIO_CODR_P0 (0x1 << 0) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P1 (0x1 << 1) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P2 (0x1 << 2) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P3 (0x1 << 3) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P4 (0x1 << 4) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P5 (0x1 << 5) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P6 (0x1 << 6) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P7 (0x1 << 7) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P8 (0x1 << 8) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P9 (0x1 << 9) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P10 (0x1 << 10) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P11 (0x1 << 11) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P12 (0x1 << 12) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P13 (0x1 << 13) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P14 (0x1 << 14) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P15 (0x1 << 15) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P16 (0x1 << 16) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P17 (0x1 << 17) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P18 (0x1 << 18) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P19 (0x1 << 19) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P20 (0x1 << 20) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P21 (0x1 << 21) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P22 (0x1 << 22) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P23 (0x1 << 23) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P24 (0x1 << 24) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P25 (0x1 << 25) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P26 (0x1 << 26) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P27 (0x1 << 27) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P28 (0x1 << 28) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P29 (0x1 << 29) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P30 (0x1 << 30) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P31 (0x1 << 31) /**< \brief (PIO_CODR) Clear Output Data */ -/* -------- PIO_ODSR : (PIO Offset: 0x0038) Output Data Status Register -------- */ -#define PIO_ODSR_P0 (0x1 << 0) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P1 (0x1 << 1) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P2 (0x1 << 2) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P3 (0x1 << 3) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P4 (0x1 << 4) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P5 (0x1 << 5) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P6 (0x1 << 6) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P7 (0x1 << 7) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P8 (0x1 << 8) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P9 (0x1 << 9) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P10 (0x1 << 10) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P11 (0x1 << 11) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P12 (0x1 << 12) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P13 (0x1 << 13) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P14 (0x1 << 14) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P15 (0x1 << 15) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P16 (0x1 << 16) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P17 (0x1 << 17) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P18 (0x1 << 18) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P19 (0x1 << 19) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P20 (0x1 << 20) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P21 (0x1 << 21) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P22 (0x1 << 22) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P23 (0x1 << 23) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P24 (0x1 << 24) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P25 (0x1 << 25) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P26 (0x1 << 26) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P27 (0x1 << 27) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P28 (0x1 << 28) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P29 (0x1 << 29) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P30 (0x1 << 30) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P31 (0x1 << 31) /**< \brief (PIO_ODSR) Output Data Status */ -/* -------- PIO_PDSR : (PIO Offset: 0x003C) Pin Data Status Register -------- */ -#define PIO_PDSR_P0 (0x1 << 0) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P1 (0x1 << 1) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P2 (0x1 << 2) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P3 (0x1 << 3) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P4 (0x1 << 4) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P5 (0x1 << 5) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P6 (0x1 << 6) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P7 (0x1 << 7) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P8 (0x1 << 8) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P9 (0x1 << 9) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P10 (0x1 << 10) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P11 (0x1 << 11) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P12 (0x1 << 12) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P13 (0x1 << 13) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P14 (0x1 << 14) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P15 (0x1 << 15) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P16 (0x1 << 16) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P17 (0x1 << 17) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P18 (0x1 << 18) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P19 (0x1 << 19) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P20 (0x1 << 20) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P21 (0x1 << 21) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P22 (0x1 << 22) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P23 (0x1 << 23) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P24 (0x1 << 24) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P25 (0x1 << 25) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P26 (0x1 << 26) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P27 (0x1 << 27) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P28 (0x1 << 28) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P29 (0x1 << 29) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P30 (0x1 << 30) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P31 (0x1 << 31) /**< \brief (PIO_PDSR) Output Data Status */ -/* -------- PIO_IER : (PIO Offset: 0x0040) Interrupt Enable Register -------- */ -#define PIO_IER_P0 (0x1 << 0) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P1 (0x1 << 1) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P2 (0x1 << 2) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P3 (0x1 << 3) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P4 (0x1 << 4) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P5 (0x1 << 5) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P6 (0x1 << 6) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P7 (0x1 << 7) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P8 (0x1 << 8) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P9 (0x1 << 9) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P10 (0x1 << 10) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P11 (0x1 << 11) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P12 (0x1 << 12) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P13 (0x1 << 13) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P14 (0x1 << 14) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P15 (0x1 << 15) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P16 (0x1 << 16) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P17 (0x1 << 17) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P18 (0x1 << 18) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P19 (0x1 << 19) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P20 (0x1 << 20) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P21 (0x1 << 21) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P22 (0x1 << 22) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P23 (0x1 << 23) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P24 (0x1 << 24) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P25 (0x1 << 25) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P26 (0x1 << 26) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P27 (0x1 << 27) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P28 (0x1 << 28) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P29 (0x1 << 29) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P30 (0x1 << 30) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P31 (0x1 << 31) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -/* -------- PIO_IDR : (PIO Offset: 0x0044) Interrupt Disable Register -------- */ -#define PIO_IDR_P0 (0x1 << 0) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P1 (0x1 << 1) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P2 (0x1 << 2) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P3 (0x1 << 3) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P4 (0x1 << 4) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P5 (0x1 << 5) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P6 (0x1 << 6) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P7 (0x1 << 7) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P8 (0x1 << 8) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P9 (0x1 << 9) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P10 (0x1 << 10) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P11 (0x1 << 11) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P12 (0x1 << 12) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P13 (0x1 << 13) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P14 (0x1 << 14) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P15 (0x1 << 15) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P16 (0x1 << 16) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P17 (0x1 << 17) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P18 (0x1 << 18) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P19 (0x1 << 19) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P20 (0x1 << 20) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P21 (0x1 << 21) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P22 (0x1 << 22) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P23 (0x1 << 23) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P24 (0x1 << 24) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P25 (0x1 << 25) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P26 (0x1 << 26) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P27 (0x1 << 27) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P28 (0x1 << 28) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P29 (0x1 << 29) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P30 (0x1 << 30) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P31 (0x1 << 31) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -/* -------- PIO_IMR : (PIO Offset: 0x0048) Interrupt Mask Register -------- */ -#define PIO_IMR_P0 (0x1 << 0) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P1 (0x1 << 1) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P2 (0x1 << 2) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P3 (0x1 << 3) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P4 (0x1 << 4) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P5 (0x1 << 5) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P6 (0x1 << 6) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P7 (0x1 << 7) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P8 (0x1 << 8) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P9 (0x1 << 9) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P10 (0x1 << 10) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P11 (0x1 << 11) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P12 (0x1 << 12) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P13 (0x1 << 13) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P14 (0x1 << 14) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P15 (0x1 << 15) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P16 (0x1 << 16) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P17 (0x1 << 17) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P18 (0x1 << 18) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P19 (0x1 << 19) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P20 (0x1 << 20) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P21 (0x1 << 21) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P22 (0x1 << 22) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P23 (0x1 << 23) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P24 (0x1 << 24) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P25 (0x1 << 25) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P26 (0x1 << 26) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P27 (0x1 << 27) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P28 (0x1 << 28) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P29 (0x1 << 29) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P30 (0x1 << 30) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P31 (0x1 << 31) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -/* -------- PIO_ISR : (PIO Offset: 0x004C) Interrupt Status Register -------- */ -#define PIO_ISR_P0 (0x1 << 0) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P1 (0x1 << 1) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P2 (0x1 << 2) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P3 (0x1 << 3) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P4 (0x1 << 4) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P5 (0x1 << 5) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P6 (0x1 << 6) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P7 (0x1 << 7) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P8 (0x1 << 8) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P9 (0x1 << 9) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P10 (0x1 << 10) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P11 (0x1 << 11) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P12 (0x1 << 12) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P13 (0x1 << 13) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P14 (0x1 << 14) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P15 (0x1 << 15) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P16 (0x1 << 16) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P17 (0x1 << 17) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P18 (0x1 << 18) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P19 (0x1 << 19) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P20 (0x1 << 20) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P21 (0x1 << 21) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P22 (0x1 << 22) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P23 (0x1 << 23) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P24 (0x1 << 24) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P25 (0x1 << 25) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P26 (0x1 << 26) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P27 (0x1 << 27) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P28 (0x1 << 28) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P29 (0x1 << 29) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P30 (0x1 << 30) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P31 (0x1 << 31) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -/* -------- PIO_MDER : (PIO Offset: 0x0050) Multi-driver Enable Register -------- */ -#define PIO_MDER_P0 (0x1 << 0) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P1 (0x1 << 1) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P2 (0x1 << 2) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P3 (0x1 << 3) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P4 (0x1 << 4) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P5 (0x1 << 5) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P6 (0x1 << 6) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P7 (0x1 << 7) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P8 (0x1 << 8) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P9 (0x1 << 9) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P10 (0x1 << 10) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P11 (0x1 << 11) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P12 (0x1 << 12) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P13 (0x1 << 13) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P14 (0x1 << 14) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P15 (0x1 << 15) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P16 (0x1 << 16) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P17 (0x1 << 17) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P18 (0x1 << 18) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P19 (0x1 << 19) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P20 (0x1 << 20) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P21 (0x1 << 21) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P22 (0x1 << 22) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P23 (0x1 << 23) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P24 (0x1 << 24) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P25 (0x1 << 25) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P26 (0x1 << 26) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P27 (0x1 << 27) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P28 (0x1 << 28) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P29 (0x1 << 29) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P30 (0x1 << 30) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P31 (0x1 << 31) /**< \brief (PIO_MDER) Multi Drive Enable. */ -/* -------- PIO_MDDR : (PIO Offset: 0x0054) Multi-driver Disable Register -------- */ -#define PIO_MDDR_P0 (0x1 << 0) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P1 (0x1 << 1) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P2 (0x1 << 2) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P3 (0x1 << 3) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P4 (0x1 << 4) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P5 (0x1 << 5) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P6 (0x1 << 6) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P7 (0x1 << 7) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P8 (0x1 << 8) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P9 (0x1 << 9) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P10 (0x1 << 10) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P11 (0x1 << 11) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P12 (0x1 << 12) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P13 (0x1 << 13) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P14 (0x1 << 14) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P15 (0x1 << 15) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P16 (0x1 << 16) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P17 (0x1 << 17) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P18 (0x1 << 18) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P19 (0x1 << 19) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P20 (0x1 << 20) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P21 (0x1 << 21) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P22 (0x1 << 22) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P23 (0x1 << 23) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P24 (0x1 << 24) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P25 (0x1 << 25) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P26 (0x1 << 26) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P27 (0x1 << 27) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P28 (0x1 << 28) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P29 (0x1 << 29) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P30 (0x1 << 30) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P31 (0x1 << 31) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -/* -------- PIO_MDSR : (PIO Offset: 0x0058) Multi-driver Status Register -------- */ -#define PIO_MDSR_P0 (0x1 << 0) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P1 (0x1 << 1) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P2 (0x1 << 2) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P3 (0x1 << 3) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P4 (0x1 << 4) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P5 (0x1 << 5) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P6 (0x1 << 6) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P7 (0x1 << 7) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P8 (0x1 << 8) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P9 (0x1 << 9) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P10 (0x1 << 10) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P11 (0x1 << 11) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P12 (0x1 << 12) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P13 (0x1 << 13) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P14 (0x1 << 14) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P15 (0x1 << 15) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P16 (0x1 << 16) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P17 (0x1 << 17) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P18 (0x1 << 18) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P19 (0x1 << 19) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P20 (0x1 << 20) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P21 (0x1 << 21) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P22 (0x1 << 22) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P23 (0x1 << 23) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P24 (0x1 << 24) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P25 (0x1 << 25) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P26 (0x1 << 26) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P27 (0x1 << 27) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P28 (0x1 << 28) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P29 (0x1 << 29) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P30 (0x1 << 30) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P31 (0x1 << 31) /**< \brief (PIO_MDSR) Multi Drive Status. */ -/* -------- PIO_PUDR : (PIO Offset: 0x0060) Pull-up Disable Register -------- */ -#define PIO_PUDR_P0 (0x1 << 0) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P1 (0x1 << 1) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P2 (0x1 << 2) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P3 (0x1 << 3) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P4 (0x1 << 4) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P5 (0x1 << 5) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P6 (0x1 << 6) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P7 (0x1 << 7) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P8 (0x1 << 8) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P9 (0x1 << 9) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P10 (0x1 << 10) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P11 (0x1 << 11) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P12 (0x1 << 12) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P13 (0x1 << 13) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P14 (0x1 << 14) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P15 (0x1 << 15) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P16 (0x1 << 16) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P17 (0x1 << 17) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P18 (0x1 << 18) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P19 (0x1 << 19) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P20 (0x1 << 20) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P21 (0x1 << 21) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P22 (0x1 << 22) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P23 (0x1 << 23) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P24 (0x1 << 24) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P25 (0x1 << 25) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P26 (0x1 << 26) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P27 (0x1 << 27) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P28 (0x1 << 28) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P29 (0x1 << 29) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P30 (0x1 << 30) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P31 (0x1 << 31) /**< \brief (PIO_PUDR) Pull Up Disable. */ -/* -------- PIO_PUER : (PIO Offset: 0x0064) Pull-up Enable Register -------- */ -#define PIO_PUER_P0 (0x1 << 0) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P1 (0x1 << 1) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P2 (0x1 << 2) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P3 (0x1 << 3) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P4 (0x1 << 4) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P5 (0x1 << 5) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P6 (0x1 << 6) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P7 (0x1 << 7) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P8 (0x1 << 8) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P9 (0x1 << 9) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P10 (0x1 << 10) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P11 (0x1 << 11) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P12 (0x1 << 12) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P13 (0x1 << 13) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P14 (0x1 << 14) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P15 (0x1 << 15) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P16 (0x1 << 16) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P17 (0x1 << 17) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P18 (0x1 << 18) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P19 (0x1 << 19) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P20 (0x1 << 20) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P21 (0x1 << 21) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P22 (0x1 << 22) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P23 (0x1 << 23) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P24 (0x1 << 24) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P25 (0x1 << 25) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P26 (0x1 << 26) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P27 (0x1 << 27) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P28 (0x1 << 28) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P29 (0x1 << 29) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P30 (0x1 << 30) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P31 (0x1 << 31) /**< \brief (PIO_PUER) Pull Up Enable. */ -/* -------- PIO_PUSR : (PIO Offset: 0x0068) Pad Pull-up Status Register -------- */ -#define PIO_PUSR_P0 (0x1 << 0) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P1 (0x1 << 1) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P2 (0x1 << 2) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P3 (0x1 << 3) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P4 (0x1 << 4) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P5 (0x1 << 5) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P6 (0x1 << 6) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P7 (0x1 << 7) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P8 (0x1 << 8) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P9 (0x1 << 9) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P10 (0x1 << 10) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P11 (0x1 << 11) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P12 (0x1 << 12) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P13 (0x1 << 13) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P14 (0x1 << 14) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P15 (0x1 << 15) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P16 (0x1 << 16) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P17 (0x1 << 17) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P18 (0x1 << 18) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P19 (0x1 << 19) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P20 (0x1 << 20) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P21 (0x1 << 21) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P22 (0x1 << 22) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P23 (0x1 << 23) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P24 (0x1 << 24) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P25 (0x1 << 25) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P26 (0x1 << 26) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P27 (0x1 << 27) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P28 (0x1 << 28) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P29 (0x1 << 29) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P30 (0x1 << 30) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P31 (0x1 << 31) /**< \brief (PIO_PUSR) Pull Up Status. */ -/* -------- PIO_ABCDSR[2] : (PIO Offset: 0x0070) Peripheral Select Register -------- */ -#define PIO_ABCDSR_P0 (0x1 << 0) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P1 (0x1 << 1) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P2 (0x1 << 2) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P3 (0x1 << 3) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P4 (0x1 << 4) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P5 (0x1 << 5) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P6 (0x1 << 6) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P7 (0x1 << 7) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P8 (0x1 << 8) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P9 (0x1 << 9) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P10 (0x1 << 10) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P11 (0x1 << 11) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P12 (0x1 << 12) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P13 (0x1 << 13) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P14 (0x1 << 14) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P15 (0x1 << 15) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P16 (0x1 << 16) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P17 (0x1 << 17) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P18 (0x1 << 18) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P19 (0x1 << 19) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P20 (0x1 << 20) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P21 (0x1 << 21) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P22 (0x1 << 22) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P23 (0x1 << 23) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P24 (0x1 << 24) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P25 (0x1 << 25) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P26 (0x1 << 26) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P27 (0x1 << 27) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P28 (0x1 << 28) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P29 (0x1 << 29) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P30 (0x1 << 30) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P31 (0x1 << 31) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -/* -------- PIO_SCIFSR : (PIO Offset: 0x0080) System Clock Glitch Input Filter Select Register -------- */ -#define PIO_SCIFSR_P0 (0x1 << 0) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P1 (0x1 << 1) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P2 (0x1 << 2) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P3 (0x1 << 3) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P4 (0x1 << 4) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P5 (0x1 << 5) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P6 (0x1 << 6) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P7 (0x1 << 7) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P8 (0x1 << 8) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P9 (0x1 << 9) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P10 (0x1 << 10) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P11 (0x1 << 11) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P12 (0x1 << 12) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P13 (0x1 << 13) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P14 (0x1 << 14) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P15 (0x1 << 15) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P16 (0x1 << 16) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P17 (0x1 << 17) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P18 (0x1 << 18) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P19 (0x1 << 19) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P20 (0x1 << 20) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P21 (0x1 << 21) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P22 (0x1 << 22) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P23 (0x1 << 23) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P24 (0x1 << 24) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P25 (0x1 << 25) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P26 (0x1 << 26) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P27 (0x1 << 27) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P28 (0x1 << 28) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P29 (0x1 << 29) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P30 (0x1 << 30) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P31 (0x1 << 31) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -/* -------- PIO_DIFSR : (PIO Offset: 0x0084) Debouncing Input Filter Select Register -------- */ -#define PIO_DIFSR_P0 (0x1 << 0) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P1 (0x1 << 1) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P2 (0x1 << 2) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P3 (0x1 << 3) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P4 (0x1 << 4) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P5 (0x1 << 5) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P6 (0x1 << 6) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P7 (0x1 << 7) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P8 (0x1 << 8) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P9 (0x1 << 9) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P10 (0x1 << 10) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P11 (0x1 << 11) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P12 (0x1 << 12) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P13 (0x1 << 13) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P14 (0x1 << 14) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P15 (0x1 << 15) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P16 (0x1 << 16) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P17 (0x1 << 17) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P18 (0x1 << 18) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P19 (0x1 << 19) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P20 (0x1 << 20) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P21 (0x1 << 21) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P22 (0x1 << 22) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P23 (0x1 << 23) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P24 (0x1 << 24) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P25 (0x1 << 25) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P26 (0x1 << 26) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P27 (0x1 << 27) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P28 (0x1 << 28) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P29 (0x1 << 29) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P30 (0x1 << 30) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P31 (0x1 << 31) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -/* -------- PIO_IFDGSR : (PIO Offset: 0x0088) Glitch or Debouncing Input Filter Clock Selection Status Register -------- */ -#define PIO_IFDGSR_P0 (0x1 << 0) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P1 (0x1 << 1) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P2 (0x1 << 2) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P3 (0x1 << 3) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P4 (0x1 << 4) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P5 (0x1 << 5) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P6 (0x1 << 6) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P7 (0x1 << 7) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P8 (0x1 << 8) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P9 (0x1 << 9) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P10 (0x1 << 10) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P11 (0x1 << 11) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P12 (0x1 << 12) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P13 (0x1 << 13) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P14 (0x1 << 14) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P15 (0x1 << 15) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P16 (0x1 << 16) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P17 (0x1 << 17) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P18 (0x1 << 18) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P19 (0x1 << 19) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P20 (0x1 << 20) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P21 (0x1 << 21) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P22 (0x1 << 22) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P23 (0x1 << 23) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P24 (0x1 << 24) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P25 (0x1 << 25) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P26 (0x1 << 26) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P27 (0x1 << 27) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P28 (0x1 << 28) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P29 (0x1 << 29) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P30 (0x1 << 30) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P31 (0x1 << 31) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -/* -------- PIO_SCDR : (PIO Offset: 0x008C) Slow Clock Divider Debouncing Register -------- */ -#define PIO_SCDR_DIV0 (0x1 << 0) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV1 (0x1 << 1) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV2 (0x1 << 2) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV3 (0x1 << 3) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV4 (0x1 << 4) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV5 (0x1 << 5) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV6 (0x1 << 6) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV7 (0x1 << 7) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV8 (0x1 << 8) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV9 (0x1 << 9) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV10 (0x1 << 10) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV11 (0x1 << 11) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV12 (0x1 << 12) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV13 (0x1 << 13) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -/* -------- PIO_PPDDR : (PIO Offset: 0x0090) Pad Pull-down Disable Register -------- */ -#define PIO_PPDDR_P0 (0x1 << 0) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P1 (0x1 << 1) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P2 (0x1 << 2) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P3 (0x1 << 3) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P4 (0x1 << 4) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P5 (0x1 << 5) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P6 (0x1 << 6) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P7 (0x1 << 7) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P8 (0x1 << 8) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P9 (0x1 << 9) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P10 (0x1 << 10) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P11 (0x1 << 11) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P12 (0x1 << 12) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P13 (0x1 << 13) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P14 (0x1 << 14) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P15 (0x1 << 15) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P16 (0x1 << 16) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P17 (0x1 << 17) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P18 (0x1 << 18) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P19 (0x1 << 19) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P20 (0x1 << 20) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P21 (0x1 << 21) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P22 (0x1 << 22) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P23 (0x1 << 23) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P24 (0x1 << 24) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P25 (0x1 << 25) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P26 (0x1 << 26) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P27 (0x1 << 27) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P28 (0x1 << 28) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P29 (0x1 << 29) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P30 (0x1 << 30) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P31 (0x1 << 31) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -/* -------- PIO_PPDER : (PIO Offset: 0x0094) Pad Pull-down Enable Register -------- */ -#define PIO_PPDER_P0 (0x1 << 0) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P1 (0x1 << 1) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P2 (0x1 << 2) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P3 (0x1 << 3) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P4 (0x1 << 4) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P5 (0x1 << 5) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P6 (0x1 << 6) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P7 (0x1 << 7) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P8 (0x1 << 8) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P9 (0x1 << 9) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P10 (0x1 << 10) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P11 (0x1 << 11) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P12 (0x1 << 12) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P13 (0x1 << 13) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P14 (0x1 << 14) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P15 (0x1 << 15) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P16 (0x1 << 16) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P17 (0x1 << 17) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P18 (0x1 << 18) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P19 (0x1 << 19) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P20 (0x1 << 20) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P21 (0x1 << 21) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P22 (0x1 << 22) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P23 (0x1 << 23) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P24 (0x1 << 24) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P25 (0x1 << 25) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P26 (0x1 << 26) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P27 (0x1 << 27) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P28 (0x1 << 28) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P29 (0x1 << 29) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P30 (0x1 << 30) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P31 (0x1 << 31) /**< \brief (PIO_PPDER) Pull Down Enable. */ -/* -------- PIO_PPDSR : (PIO Offset: 0x0098) Pad Pull-down Status Register -------- */ -#define PIO_PPDSR_P0 (0x1 << 0) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P1 (0x1 << 1) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P2 (0x1 << 2) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P3 (0x1 << 3) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P4 (0x1 << 4) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P5 (0x1 << 5) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P6 (0x1 << 6) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P7 (0x1 << 7) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P8 (0x1 << 8) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P9 (0x1 << 9) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P10 (0x1 << 10) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P11 (0x1 << 11) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P12 (0x1 << 12) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P13 (0x1 << 13) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P14 (0x1 << 14) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P15 (0x1 << 15) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P16 (0x1 << 16) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P17 (0x1 << 17) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P18 (0x1 << 18) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P19 (0x1 << 19) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P20 (0x1 << 20) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P21 (0x1 << 21) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P22 (0x1 << 22) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P23 (0x1 << 23) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P24 (0x1 << 24) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P25 (0x1 << 25) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P26 (0x1 << 26) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P27 (0x1 << 27) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P28 (0x1 << 28) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P29 (0x1 << 29) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P30 (0x1 << 30) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P31 (0x1 << 31) /**< \brief (PIO_PPDSR) Pull Down Status. */ -/* -------- PIO_OWER : (PIO Offset: 0x00A0) Output Write Enable -------- */ -#define PIO_OWER_P0 (0x1 << 0) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P1 (0x1 << 1) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P2 (0x1 << 2) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P3 (0x1 << 3) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P4 (0x1 << 4) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P5 (0x1 << 5) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P6 (0x1 << 6) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P7 (0x1 << 7) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P8 (0x1 << 8) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P9 (0x1 << 9) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P10 (0x1 << 10) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P11 (0x1 << 11) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P12 (0x1 << 12) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P13 (0x1 << 13) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P14 (0x1 << 14) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P15 (0x1 << 15) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P16 (0x1 << 16) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P17 (0x1 << 17) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P18 (0x1 << 18) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P19 (0x1 << 19) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P20 (0x1 << 20) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P21 (0x1 << 21) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P22 (0x1 << 22) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P23 (0x1 << 23) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P24 (0x1 << 24) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P25 (0x1 << 25) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P26 (0x1 << 26) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P27 (0x1 << 27) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P28 (0x1 << 28) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P29 (0x1 << 29) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P30 (0x1 << 30) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P31 (0x1 << 31) /**< \brief (PIO_OWER) Output Write Enable. */ -/* -------- PIO_OWDR : (PIO Offset: 0x00A4) Output Write Disable -------- */ -#define PIO_OWDR_P0 (0x1 << 0) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P1 (0x1 << 1) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P2 (0x1 << 2) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P3 (0x1 << 3) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P4 (0x1 << 4) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P5 (0x1 << 5) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P6 (0x1 << 6) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P7 (0x1 << 7) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P8 (0x1 << 8) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P9 (0x1 << 9) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P10 (0x1 << 10) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P11 (0x1 << 11) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P12 (0x1 << 12) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P13 (0x1 << 13) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P14 (0x1 << 14) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P15 (0x1 << 15) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P16 (0x1 << 16) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P17 (0x1 << 17) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P18 (0x1 << 18) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P19 (0x1 << 19) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P20 (0x1 << 20) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P21 (0x1 << 21) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P22 (0x1 << 22) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P23 (0x1 << 23) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P24 (0x1 << 24) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P25 (0x1 << 25) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P26 (0x1 << 26) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P27 (0x1 << 27) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P28 (0x1 << 28) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P29 (0x1 << 29) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P30 (0x1 << 30) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P31 (0x1 << 31) /**< \brief (PIO_OWDR) Output Write Disable. */ -/* -------- PIO_OWSR : (PIO Offset: 0x00A8) Output Write Status Register -------- */ -#define PIO_OWSR_P0 (0x1 << 0) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P1 (0x1 << 1) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P2 (0x1 << 2) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P3 (0x1 << 3) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P4 (0x1 << 4) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P5 (0x1 << 5) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P6 (0x1 << 6) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P7 (0x1 << 7) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P8 (0x1 << 8) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P9 (0x1 << 9) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P10 (0x1 << 10) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P11 (0x1 << 11) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P12 (0x1 << 12) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P13 (0x1 << 13) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P14 (0x1 << 14) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P15 (0x1 << 15) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P16 (0x1 << 16) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P17 (0x1 << 17) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P18 (0x1 << 18) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P19 (0x1 << 19) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P20 (0x1 << 20) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P21 (0x1 << 21) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P22 (0x1 << 22) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P23 (0x1 << 23) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P24 (0x1 << 24) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P25 (0x1 << 25) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P26 (0x1 << 26) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P27 (0x1 << 27) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P28 (0x1 << 28) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P29 (0x1 << 29) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P30 (0x1 << 30) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P31 (0x1 << 31) /**< \brief (PIO_OWSR) Output Write Status. */ -/* -------- PIO_AIMER : (PIO Offset: 0x00B0) Additional Interrupt Modes Enable Register -------- */ -#define PIO_AIMER_P0 (0x1 << 0) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P1 (0x1 << 1) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P2 (0x1 << 2) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P3 (0x1 << 3) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P4 (0x1 << 4) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P5 (0x1 << 5) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P6 (0x1 << 6) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P7 (0x1 << 7) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P8 (0x1 << 8) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P9 (0x1 << 9) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P10 (0x1 << 10) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P11 (0x1 << 11) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P12 (0x1 << 12) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P13 (0x1 << 13) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P14 (0x1 << 14) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P15 (0x1 << 15) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P16 (0x1 << 16) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P17 (0x1 << 17) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P18 (0x1 << 18) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P19 (0x1 << 19) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P20 (0x1 << 20) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P21 (0x1 << 21) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P22 (0x1 << 22) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P23 (0x1 << 23) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P24 (0x1 << 24) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P25 (0x1 << 25) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P26 (0x1 << 26) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P27 (0x1 << 27) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P28 (0x1 << 28) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P29 (0x1 << 29) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P30 (0x1 << 30) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P31 (0x1 << 31) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -/* -------- PIO_AIMDR : (PIO Offset: 0x00B4) Additional Interrupt Modes Disables Register -------- */ -#define PIO_AIMDR_P0 (0x1 << 0) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P1 (0x1 << 1) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P2 (0x1 << 2) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P3 (0x1 << 3) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P4 (0x1 << 4) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P5 (0x1 << 5) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P6 (0x1 << 6) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P7 (0x1 << 7) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P8 (0x1 << 8) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P9 (0x1 << 9) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P10 (0x1 << 10) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P11 (0x1 << 11) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P12 (0x1 << 12) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P13 (0x1 << 13) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P14 (0x1 << 14) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P15 (0x1 << 15) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P16 (0x1 << 16) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P17 (0x1 << 17) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P18 (0x1 << 18) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P19 (0x1 << 19) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P20 (0x1 << 20) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P21 (0x1 << 21) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P22 (0x1 << 22) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P23 (0x1 << 23) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P24 (0x1 << 24) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P25 (0x1 << 25) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P26 (0x1 << 26) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P27 (0x1 << 27) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P28 (0x1 << 28) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P29 (0x1 << 29) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P30 (0x1 << 30) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P31 (0x1 << 31) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -/* -------- PIO_AIMMR : (PIO Offset: 0x00B8) Additional Interrupt Modes Mask Register -------- */ -#define PIO_AIMMR_P0 (0x1 << 0) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P1 (0x1 << 1) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P2 (0x1 << 2) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P3 (0x1 << 3) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P4 (0x1 << 4) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P5 (0x1 << 5) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P6 (0x1 << 6) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P7 (0x1 << 7) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P8 (0x1 << 8) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P9 (0x1 << 9) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P10 (0x1 << 10) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P11 (0x1 << 11) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P12 (0x1 << 12) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P13 (0x1 << 13) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P14 (0x1 << 14) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P15 (0x1 << 15) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P16 (0x1 << 16) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P17 (0x1 << 17) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P18 (0x1 << 18) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P19 (0x1 << 19) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P20 (0x1 << 20) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P21 (0x1 << 21) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P22 (0x1 << 22) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P23 (0x1 << 23) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P24 (0x1 << 24) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P25 (0x1 << 25) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P26 (0x1 << 26) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P27 (0x1 << 27) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P28 (0x1 << 28) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P29 (0x1 << 29) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P30 (0x1 << 30) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P31 (0x1 << 31) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -/* -------- PIO_ESR : (PIO Offset: 0x00C0) Edge Select Register -------- */ -#define PIO_ESR_P0 (0x1 << 0) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P1 (0x1 << 1) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P2 (0x1 << 2) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P3 (0x1 << 3) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P4 (0x1 << 4) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P5 (0x1 << 5) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P6 (0x1 << 6) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P7 (0x1 << 7) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P8 (0x1 << 8) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P9 (0x1 << 9) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P10 (0x1 << 10) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P11 (0x1 << 11) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P12 (0x1 << 12) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P13 (0x1 << 13) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P14 (0x1 << 14) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P15 (0x1 << 15) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P16 (0x1 << 16) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P17 (0x1 << 17) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P18 (0x1 << 18) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P19 (0x1 << 19) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P20 (0x1 << 20) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P21 (0x1 << 21) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P22 (0x1 << 22) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P23 (0x1 << 23) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P24 (0x1 << 24) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P25 (0x1 << 25) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P26 (0x1 << 26) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P27 (0x1 << 27) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P28 (0x1 << 28) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P29 (0x1 << 29) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P30 (0x1 << 30) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P31 (0x1 << 31) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -/* -------- PIO_LSR : (PIO Offset: 0x00C4) Level Select Register -------- */ -#define PIO_LSR_P0 (0x1 << 0) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P1 (0x1 << 1) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P2 (0x1 << 2) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P3 (0x1 << 3) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P4 (0x1 << 4) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P5 (0x1 << 5) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P6 (0x1 << 6) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P7 (0x1 << 7) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P8 (0x1 << 8) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P9 (0x1 << 9) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P10 (0x1 << 10) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P11 (0x1 << 11) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P12 (0x1 << 12) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P13 (0x1 << 13) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P14 (0x1 << 14) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P15 (0x1 << 15) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P16 (0x1 << 16) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P17 (0x1 << 17) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P18 (0x1 << 18) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P19 (0x1 << 19) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P20 (0x1 << 20) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P21 (0x1 << 21) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P22 (0x1 << 22) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P23 (0x1 << 23) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P24 (0x1 << 24) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P25 (0x1 << 25) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P26 (0x1 << 26) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P27 (0x1 << 27) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P28 (0x1 << 28) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P29 (0x1 << 29) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P30 (0x1 << 30) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P31 (0x1 << 31) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -/* -------- PIO_ELSR : (PIO Offset: 0x00C8) Edge/Level Status Register -------- */ -#define PIO_ELSR_P0 (0x1 << 0) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P1 (0x1 << 1) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P2 (0x1 << 2) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P3 (0x1 << 3) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P4 (0x1 << 4) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P5 (0x1 << 5) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P6 (0x1 << 6) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P7 (0x1 << 7) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P8 (0x1 << 8) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P9 (0x1 << 9) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P10 (0x1 << 10) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P11 (0x1 << 11) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P12 (0x1 << 12) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P13 (0x1 << 13) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P14 (0x1 << 14) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P15 (0x1 << 15) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P16 (0x1 << 16) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P17 (0x1 << 17) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P18 (0x1 << 18) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P19 (0x1 << 19) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P20 (0x1 << 20) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P21 (0x1 << 21) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P22 (0x1 << 22) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P23 (0x1 << 23) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P24 (0x1 << 24) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P25 (0x1 << 25) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P26 (0x1 << 26) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P27 (0x1 << 27) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P28 (0x1 << 28) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P29 (0x1 << 29) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P30 (0x1 << 30) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P31 (0x1 << 31) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -/* -------- PIO_FELLSR : (PIO Offset: 0x00D0) Falling Edge/Low Level Select Register -------- */ -#define PIO_FELLSR_P0 (0x1 << 0) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P1 (0x1 << 1) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P2 (0x1 << 2) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P3 (0x1 << 3) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P4 (0x1 << 4) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P5 (0x1 << 5) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P6 (0x1 << 6) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P7 (0x1 << 7) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P8 (0x1 << 8) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P9 (0x1 << 9) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P10 (0x1 << 10) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P11 (0x1 << 11) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P12 (0x1 << 12) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P13 (0x1 << 13) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P14 (0x1 << 14) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P15 (0x1 << 15) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P16 (0x1 << 16) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P17 (0x1 << 17) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P18 (0x1 << 18) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P19 (0x1 << 19) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P20 (0x1 << 20) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P21 (0x1 << 21) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P22 (0x1 << 22) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P23 (0x1 << 23) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P24 (0x1 << 24) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P25 (0x1 << 25) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P26 (0x1 << 26) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P27 (0x1 << 27) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P28 (0x1 << 28) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P29 (0x1 << 29) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P30 (0x1 << 30) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P31 (0x1 << 31) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -/* -------- PIO_REHLSR : (PIO Offset: 0x00D4) Rising Edge/ High Level Select Register -------- */ -#define PIO_REHLSR_P0 (0x1 << 0) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P1 (0x1 << 1) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P2 (0x1 << 2) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P3 (0x1 << 3) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P4 (0x1 << 4) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P5 (0x1 << 5) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P6 (0x1 << 6) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P7 (0x1 << 7) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P8 (0x1 << 8) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P9 (0x1 << 9) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P10 (0x1 << 10) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P11 (0x1 << 11) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P12 (0x1 << 12) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P13 (0x1 << 13) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P14 (0x1 << 14) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P15 (0x1 << 15) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P16 (0x1 << 16) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P17 (0x1 << 17) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P18 (0x1 << 18) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P19 (0x1 << 19) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P20 (0x1 << 20) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P21 (0x1 << 21) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P22 (0x1 << 22) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P23 (0x1 << 23) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P24 (0x1 << 24) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P25 (0x1 << 25) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P26 (0x1 << 26) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P27 (0x1 << 27) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P28 (0x1 << 28) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P29 (0x1 << 29) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P30 (0x1 << 30) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P31 (0x1 << 31) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -/* -------- PIO_FRLHSR : (PIO Offset: 0x00D8) Fall/Rise - Low/High Status Register -------- */ -#define PIO_FRLHSR_P0 (0x1 << 0) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P1 (0x1 << 1) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P2 (0x1 << 2) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P3 (0x1 << 3) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P4 (0x1 << 4) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P5 (0x1 << 5) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P6 (0x1 << 6) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P7 (0x1 << 7) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P8 (0x1 << 8) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P9 (0x1 << 9) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P10 (0x1 << 10) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P11 (0x1 << 11) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P12 (0x1 << 12) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P13 (0x1 << 13) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P14 (0x1 << 14) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P15 (0x1 << 15) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P16 (0x1 << 16) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P17 (0x1 << 17) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P18 (0x1 << 18) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P19 (0x1 << 19) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P20 (0x1 << 20) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P21 (0x1 << 21) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P22 (0x1 << 22) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P23 (0x1 << 23) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P24 (0x1 << 24) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P25 (0x1 << 25) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P26 (0x1 << 26) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P27 (0x1 << 27) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P28 (0x1 << 28) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P29 (0x1 << 29) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P30 (0x1 << 30) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P31 (0x1 << 31) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -/* -------- PIO_LOCKSR : (PIO Offset: 0x00E0) Lock Status -------- */ -#define PIO_LOCKSR_P0 (0x1 << 0) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P1 (0x1 << 1) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P2 (0x1 << 2) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P3 (0x1 << 3) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P4 (0x1 << 4) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P5 (0x1 << 5) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P6 (0x1 << 6) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P7 (0x1 << 7) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P8 (0x1 << 8) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P9 (0x1 << 9) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P10 (0x1 << 10) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P11 (0x1 << 11) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P12 (0x1 << 12) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P13 (0x1 << 13) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P14 (0x1 << 14) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P15 (0x1 << 15) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P16 (0x1 << 16) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P17 (0x1 << 17) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P18 (0x1 << 18) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P19 (0x1 << 19) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P20 (0x1 << 20) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P21 (0x1 << 21) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P22 (0x1 << 22) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P23 (0x1 << 23) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P24 (0x1 << 24) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P25 (0x1 << 25) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P26 (0x1 << 26) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P27 (0x1 << 27) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P28 (0x1 << 28) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P29 (0x1 << 29) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P30 (0x1 << 30) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P31 (0x1 << 31) /**< \brief (PIO_LOCKSR) Lock Status. */ -/* -------- PIO_WPMR : (PIO Offset: 0x00E4) Write Protect Mode Register -------- */ -#define PIO_WPMR_WPEN (0x1 << 0) /**< \brief (PIO_WPMR) Write Protect Enable */ -#define PIO_WPMR_WPKEY (0xffffff << 8) /**< \brief (PIO_WPMR) Write Protect KEY */ -/* -------- PIO_WPSR : (PIO Offset: 0x00E8) Write Protect Status Register -------- */ -#define PIO_WPSR_WPVS (0x1 << 0) /**< \brief (PIO_WPSR) Write Protect Violation Status */ -#define PIO_WPSR_WPVSRC (0xffff << 8) /**< \brief (PIO_WPSR) Write Protect Violation Source */ -/* -------- PIO_SCHMITT : (PIO Offset: 0x0100) Schmitt Trigger Register -------- */ -#define PIO_SCHMITT_SCHMITT0 (0x1 << 0) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT1 (0x1 << 1) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT2 (0x1 << 2) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT3 (0x1 << 3) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT4 (0x1 << 4) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT5 (0x1 << 5) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT6 (0x1 << 6) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT7 (0x1 << 7) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT8 (0x1 << 8) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT9 (0x1 << 9) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT10 (0x1 << 10) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT11 (0x1 << 11) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT12 (0x1 << 12) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT13 (0x1 << 13) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT14 (0x1 << 14) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT15 (0x1 << 15) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT16 (0x1 << 16) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT17 (0x1 << 17) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT18 (0x1 << 18) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT19 (0x1 << 19) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT20 (0x1 << 20) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT21 (0x1 << 21) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT22 (0x1 << 22) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT23 (0x1 << 23) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT24 (0x1 << 24) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT25 (0x1 << 25) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT26 (0x1 << 26) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT27 (0x1 << 27) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT28 (0x1 << 28) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT29 (0x1 << 29) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT30 (0x1 << 30) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT31 (0x1 << 31) /**< \brief (PIO_SCHMITT) */ -/* -------- PIO_PCMR : (PIO Offset: 0x150) Parallel Capture Mode Register -------- */ -#define PIO_PCMR_PCEN (0x1 << 0) /**< \brief (PIO_PCMR) Parallel Capture Mode Enable */ -#define PIO_PCMR_DSIZE (0x3 << 4) /**< \brief (PIO_PCMR) Parallel Capture Mode Data Size */ -#define PIO_PCMR_ALWYS (0x1 << 9) /**< \brief (PIO_PCMR) Parallel Capture Mode Always Sampling */ -#define PIO_PCMR_HALFS (0x1 << 10) /**< \brief (PIO_PCMR) Parallel Capture Mode Half Sampling */ -#define PIO_PCMR_FRSTS (0x1 << 11) /**< \brief (PIO_PCMR) Parallel Capture Mode First Sample */ -/* -------- PIO_PCIER : (PIO Offset: 0x154) Parallel Capture Interrupt Enable Register -------- */ -#define PIO_PCIER_DRDY (0x1 << 0) /**< \brief (PIO_PCIER) Parallel Capture Mode Data Ready Interrupt Enable */ -#define PIO_PCIER_OVRE (0x1 << 1) /**< \brief (PIO_PCIER) Parallel Capture Mode Overrun Error Interrupt Enable */ -#define PIO_PCIER_ENDRX (0x1 << 2) /**< \brief (PIO_PCIER) End of Reception Transfer Interrupt Enable */ -#define PIO_PCIER_RXBUFF (0x1 << 3) /**< \brief (PIO_PCIER) Reception Buffer Full Interrupt Enable */ -/* -------- PIO_PCIDR : (PIO Offset: 0x158) Parallel Capture Interrupt Disable Register -------- */ -#define PIO_PCIDR_DRDY (0x1 << 0) /**< \brief (PIO_PCIDR) Parallel Capture Mode Data Ready Interrupt Disable */ -#define PIO_PCIDR_OVRE (0x1 << 1) /**< \brief (PIO_PCIDR) Parallel Capture Mode Overrun Error Interrupt Disable */ -#define PIO_PCIDR_ENDRX (0x1 << 2) /**< \brief (PIO_PCIDR) End of Reception Transfer Interrupt Disable */ -#define PIO_PCIDR_RXBUFF (0x1 << 3) /**< \brief (PIO_PCIDR) Reception Buffer Full Interrupt Disable */ -/* -------- PIO_PCIMR : (PIO Offset: 0x15C) Parallel Capture Interrupt Mask Register -------- */ -#define PIO_PCIMR_DRDY (0x1 << 0) /**< \brief (PIO_PCIMR) Parallel Capture Mode Data Ready Interrupt Mask */ -#define PIO_PCIMR_OVRE (0x1 << 1) /**< \brief (PIO_PCIMR) Parallel Capture Mode Overrun Error Interrupt Mask */ -#define PIO_PCIMR_ENDRX (0x1 << 2) /**< \brief (PIO_PCIMR) End of Reception Transfer Interrupt Mask */ -#define PIO_PCIMR_RXBUFF (0x1 << 3) /**< \brief (PIO_PCIMR) Reception Buffer Full Interrupt Mask */ -/* -------- PIO_PCISR : (PIO Offset: 0x160) Parallel Capture Interrupt Status Register -------- */ -#define PIO_PCISR_DRDY (0x1 << 0) /**< \brief (PIO_PCISR) Parallel Capture Mode Data Ready */ -#define PIO_PCISR_OVRE (0x1 << 1) /**< \brief (PIO_PCISR) Parallel Capture Mode Overrun Error. */ -#define PIO_PCISR_ENDRX (0x1 << 2) /**< \brief (PIO_PCISR) End of Reception Transfer. */ -#define PIO_PCISR_RXBUFF (0x1 << 3) /**< \brief (PIO_PCISR) Reception Buffer Full */ -/* -------- PIO_PCRHR : (PIO Offset: 0x164) Parallel Capture Reception Holding Register -------- */ -#define PIO_PCRHR_RDATA (0xffffffff << 0) /**< \brief (PIO_PCRHR) Parallel Capture Mode Reception Data. */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Power Management Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_PMC Power Management Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pmc hardware registers */ -typedef struct { - WoReg PMC_SCER; /**< \brief (Pmc Offset: 0x0000) System Clock Enable Register */ - WoReg PMC_SCDR; /**< \brief (Pmc Offset: 0x0004) System Clock Disable Register */ - RoReg PMC_SCSR; /**< \brief (Pmc Offset: 0x0008) System Clock Status Register */ - RwReg Reserved1[1]; - WoReg PMC_PCER0; /**< \brief (Pmc Offset: 0x0010) Peripheral Clock Enable Register 0 */ - WoReg PMC_PCDR0; /**< \brief (Pmc Offset: 0x0014) Peripheral Clock Disable Register 0 */ - RoReg PMC_PCSR0; /**< \brief (Pmc Offset: 0x0018) Peripheral Clock Status Register 0 */ - RwReg Reserved2[1]; - RwReg CKGR_MOR; /**< \brief (Pmc Offset: 0x0020) Main Oscillator Register */ - RoReg CKGR_MCFR; /**< \brief (Pmc Offset: 0x0024) Main Clock Frequency Register */ - RwReg CKGR_PLLAR; /**< \brief (Pmc Offset: 0x0028) PLLA Register */ - RwReg CKGR_PLLBR; /**< \brief (Pmc Offset: 0x002C) PLLB Register */ - RwReg PMC_MCKR; /**< \brief (Pmc Offset: 0x0030) Master Clock Register */ - RwReg Reserved3[1]; - RwReg PMC_USB; /**< \brief (Pmc Offset: 0x0038) USB Clock Register */ - RwReg Reserved4[1]; - RwReg PMC_PCK[3]; /**< \brief (Pmc Offset: 0x0040) Programmable Clock 0 Register */ - RwReg Reserved5[5]; - WoReg PMC_IER; /**< \brief (Pmc Offset: 0x0060) Interrupt Enable Register */ - WoReg PMC_IDR; /**< \brief (Pmc Offset: 0x0064) Interrupt Disable Register */ - RoReg PMC_SR; /**< \brief (Pmc Offset: 0x0068) Status Register */ - RoReg PMC_IMR; /**< \brief (Pmc Offset: 0x006C) Interrupt Mask Register */ - RwReg PMC_FSMR; /**< \brief (Pmc Offset: 0x0070) Fast Startup Mode Register */ - RwReg PMC_FSPR; /**< \brief (Pmc Offset: 0x0074) Fast Startup Polarity Register */ - WoReg PMC_FOCR; /**< \brief (Pmc Offset: 0x0078) Fault Output Clear Register */ - RwReg Reserved6[26]; - RwReg PMC_WPMR; /**< \brief (Pmc Offset: 0x00E4) Write Protect Mode Register */ - RoReg PMC_WPSR; /**< \brief (Pmc Offset: 0x00E8) Write Protect Status Register */ - RwReg Reserved7[5]; - WoReg PMC_PCER1; /**< \brief (Pmc Offset: 0x0100) Peripheral Clock Enable Register 1 */ - WoReg PMC_PCDR1; /**< \brief (Pmc Offset: 0x0104) Peripheral Clock Disable Register 1 */ - RoReg PMC_PCSR1; /**< \brief (Pmc Offset: 0x0108) Peripheral Clock Status Register 1 */ - RwReg Reserved8[1]; - RwReg PMC_OCR; /**< \brief (Pmc Offset: 0x0110) Oscillator Calibration Register */ -} Pmc; -#endif /* __ASSEMBLY__ */ -/* -------- PMC_SCER : (PMC Offset: 0x0000) System Clock Enable Register -------- */ -#define PMC_SCER_UDP (0x1 << 7) /**< \brief (PMC_SCER) USB Device Port Clock Enable */ -#define PMC_SCER_PCK0 (0x1 << 8) /**< \brief (PMC_SCER) Programmable Clock 0 Output Enable */ -#define PMC_SCER_PCK1 (0x1 << 9) /**< \brief (PMC_SCER) Programmable Clock 1 Output Enable */ -#define PMC_SCER_PCK2 (0x1 << 10) /**< \brief (PMC_SCER) Programmable Clock 2 Output Enable */ -/* -------- PMC_SCDR : (PMC Offset: 0x0004) System Clock Disable Register -------- */ -#define PMC_SCDR_UDP (0x1 << 7) /**< \brief (PMC_SCDR) USB Device Port Clock Disable */ -#define PMC_SCDR_PCK0 (0x1 << 8) /**< \brief (PMC_SCDR) Programmable Clock 0 Output Disable */ -#define PMC_SCDR_PCK1 (0x1 << 9) /**< \brief (PMC_SCDR) Programmable Clock 1 Output Disable */ -#define PMC_SCDR_PCK2 (0x1 << 10) /**< \brief (PMC_SCDR) Programmable Clock 2 Output Disable */ -/* -------- PMC_SCSR : (PMC Offset: 0x0008) System Clock Status Register -------- */ -#define PMC_SCSR_UDP (0x1 << 7) /**< \brief (PMC_SCSR) USB Device Port Clock Status */ -#define PMC_SCSR_PCK0 (0x1 << 8) /**< \brief (PMC_SCSR) Programmable Clock 0 Output Status */ -#define PMC_SCSR_PCK1 (0x1 << 9) /**< \brief (PMC_SCSR) Programmable Clock 1 Output Status */ -#define PMC_SCSR_PCK2 (0x1 << 10) /**< \brief (PMC_SCSR) Programmable Clock 2 Output Status */ -/* -------- PMC_PCER0 : (PMC Offset: 0x0010) Peripheral Clock Enable Register 0 -------- */ -#define PMC_PCER0_PID2 (0x1 << 2) /**< \brief (PMC_PCER0) Peripheral Clock 2 Enable */ -#define PMC_PCER0_PID3 (0x1 << 3) /**< \brief (PMC_PCER0) Peripheral Clock 3 Enable */ -#define PMC_PCER0_PID4 (0x1 << 4) /**< \brief (PMC_PCER0) Peripheral Clock 4 Enable */ -#define PMC_PCER0_PID5 (0x1 << 5) /**< \brief (PMC_PCER0) Peripheral Clock 5 Enable */ -#define PMC_PCER0_PID6 (0x1 << 6) /**< \brief (PMC_PCER0) Peripheral Clock 6 Enable */ -#define PMC_PCER0_PID7 (0x1 << 7) /**< \brief (PMC_PCER0) Peripheral Clock 7 Enable */ -#define PMC_PCER0_PID8 (0x1 << 8) /**< \brief (PMC_PCER0) Peripheral Clock 8 Enable */ -#define PMC_PCER0_PID9 (0x1 << 9) /**< \brief (PMC_PCER0) Peripheral Clock 9 Enable */ -#define PMC_PCER0_PID10 (0x1 << 10) /**< \brief (PMC_PCER0) Peripheral Clock 10 Enable */ -#define PMC_PCER0_PID11 (0x1 << 11) /**< \brief (PMC_PCER0) Peripheral Clock 11 Enable */ -#define PMC_PCER0_PID12 (0x1 << 12) /**< \brief (PMC_PCER0) Peripheral Clock 12 Enable */ -#define PMC_PCER0_PID13 (0x1 << 13) /**< \brief (PMC_PCER0) Peripheral Clock 13 Enable */ -#define PMC_PCER0_PID14 (0x1 << 14) /**< \brief (PMC_PCER0) Peripheral Clock 14 Enable */ -#define PMC_PCER0_PID15 (0x1 << 15) /**< \brief (PMC_PCER0) Peripheral Clock 15 Enable */ -#define PMC_PCER0_PID16 (0x1 << 16) /**< \brief (PMC_PCER0) Peripheral Clock 16 Enable */ -#define PMC_PCER0_PID17 (0x1 << 17) /**< \brief (PMC_PCER0) Peripheral Clock 17 Enable */ -#define PMC_PCER0_PID18 (0x1 << 18) /**< \brief (PMC_PCER0) Peripheral Clock 18 Enable */ -#define PMC_PCER0_PID19 (0x1 << 19) /**< \brief (PMC_PCER0) Peripheral Clock 19 Enable */ -#define PMC_PCER0_PID20 (0x1 << 20) /**< \brief (PMC_PCER0) Peripheral Clock 20 Enable */ -#define PMC_PCER0_PID21 (0x1 << 21) /**< \brief (PMC_PCER0) Peripheral Clock 21 Enable */ -#define PMC_PCER0_PID22 (0x1 << 22) /**< \brief (PMC_PCER0) Peripheral Clock 22 Enable */ -#define PMC_PCER0_PID23 (0x1 << 23) /**< \brief (PMC_PCER0) Peripheral Clock 23 Enable */ -#define PMC_PCER0_PID24 (0x1 << 24) /**< \brief (PMC_PCER0) Peripheral Clock 24 Enable */ -#define PMC_PCER0_PID25 (0x1 << 25) /**< \brief (PMC_PCER0) Peripheral Clock 25 Enable */ -#define PMC_PCER0_PID26 (0x1 << 26) /**< \brief (PMC_PCER0) Peripheral Clock 26 Enable */ -#define PMC_PCER0_PID27 (0x1 << 27) /**< \brief (PMC_PCER0) Peripheral Clock 27 Enable */ -#define PMC_PCER0_PID28 (0x1 << 28) /**< \brief (PMC_PCER0) Peripheral Clock 28 Enable */ -#define PMC_PCER0_PID29 (0x1 << 29) /**< \brief (PMC_PCER0) Peripheral Clock 29 Enable */ -#define PMC_PCER0_PID30 (0x1 << 30) /**< \brief (PMC_PCER0) Peripheral Clock 30 Enable */ -#define PMC_PCER0_PID31 (0x1 << 31) /**< \brief (PMC_PCER0) Peripheral Clock 31 Enable */ -/* -------- PMC_PCDR0 : (PMC Offset: 0x0014) Peripheral Clock Disable Register 0 -------- */ -#define PMC_PCDR0_PID2 (0x1 << 2) /**< \brief (PMC_PCDR0) Peripheral Clock 2 Disable */ -#define PMC_PCDR0_PID3 (0x1 << 3) /**< \brief (PMC_PCDR0) Peripheral Clock 3 Disable */ -#define PMC_PCDR0_PID4 (0x1 << 4) /**< \brief (PMC_PCDR0) Peripheral Clock 4 Disable */ -#define PMC_PCDR0_PID5 (0x1 << 5) /**< \brief (PMC_PCDR0) Peripheral Clock 5 Disable */ -#define PMC_PCDR0_PID6 (0x1 << 6) /**< \brief (PMC_PCDR0) Peripheral Clock 6 Disable */ -#define PMC_PCDR0_PID7 (0x1 << 7) /**< \brief (PMC_PCDR0) Peripheral Clock 7 Disable */ -#define PMC_PCDR0_PID8 (0x1 << 8) /**< \brief (PMC_PCDR0) Peripheral Clock 8 Disable */ -#define PMC_PCDR0_PID9 (0x1 << 9) /**< \brief (PMC_PCDR0) Peripheral Clock 9 Disable */ -#define PMC_PCDR0_PID10 (0x1 << 10) /**< \brief (PMC_PCDR0) Peripheral Clock 10 Disable */ -#define PMC_PCDR0_PID11 (0x1 << 11) /**< \brief (PMC_PCDR0) Peripheral Clock 11 Disable */ -#define PMC_PCDR0_PID12 (0x1 << 12) /**< \brief (PMC_PCDR0) Peripheral Clock 12 Disable */ -#define PMC_PCDR0_PID13 (0x1 << 13) /**< \brief (PMC_PCDR0) Peripheral Clock 13 Disable */ -#define PMC_PCDR0_PID14 (0x1 << 14) /**< \brief (PMC_PCDR0) Peripheral Clock 14 Disable */ -#define PMC_PCDR0_PID15 (0x1 << 15) /**< \brief (PMC_PCDR0) Peripheral Clock 15 Disable */ -#define PMC_PCDR0_PID16 (0x1 << 16) /**< \brief (PMC_PCDR0) Peripheral Clock 16 Disable */ -#define PMC_PCDR0_PID17 (0x1 << 17) /**< \brief (PMC_PCDR0) Peripheral Clock 17 Disable */ -#define PMC_PCDR0_PID18 (0x1 << 18) /**< \brief (PMC_PCDR0) Peripheral Clock 18 Disable */ -#define PMC_PCDR0_PID19 (0x1 << 19) /**< \brief (PMC_PCDR0) Peripheral Clock 19 Disable */ -#define PMC_PCDR0_PID20 (0x1 << 20) /**< \brief (PMC_PCDR0) Peripheral Clock 20 Disable */ -#define PMC_PCDR0_PID21 (0x1 << 21) /**< \brief (PMC_PCDR0) Peripheral Clock 21 Disable */ -#define PMC_PCDR0_PID22 (0x1 << 22) /**< \brief (PMC_PCDR0) Peripheral Clock 22 Disable */ -#define PMC_PCDR0_PID23 (0x1 << 23) /**< \brief (PMC_PCDR0) Peripheral Clock 23 Disable */ -#define PMC_PCDR0_PID24 (0x1 << 24) /**< \brief (PMC_PCDR0) Peripheral Clock 24 Disable */ -#define PMC_PCDR0_PID25 (0x1 << 25) /**< \brief (PMC_PCDR0) Peripheral Clock 25 Disable */ -#define PMC_PCDR0_PID26 (0x1 << 26) /**< \brief (PMC_PCDR0) Peripheral Clock 26 Disable */ -#define PMC_PCDR0_PID27 (0x1 << 27) /**< \brief (PMC_PCDR0) Peripheral Clock 27 Disable */ -#define PMC_PCDR0_PID28 (0x1 << 28) /**< \brief (PMC_PCDR0) Peripheral Clock 28 Disable */ -#define PMC_PCDR0_PID29 (0x1 << 29) /**< \brief (PMC_PCDR0) Peripheral Clock 29 Disable */ -#define PMC_PCDR0_PID30 (0x1 << 30) /**< \brief (PMC_PCDR0) Peripheral Clock 30 Disable */ -#define PMC_PCDR0_PID31 (0x1 << 31) /**< \brief (PMC_PCDR0) Peripheral Clock 31 Disable */ -/* -------- PMC_PCSR0 : (PMC Offset: 0x0018) Peripheral Clock Status Register 0 -------- */ -#define PMC_PCSR0_PID2 (0x1 << 2) /**< \brief (PMC_PCSR0) Peripheral Clock 2 Status */ -#define PMC_PCSR0_PID3 (0x1 << 3) /**< \brief (PMC_PCSR0) Peripheral Clock 3 Status */ -#define PMC_PCSR0_PID4 (0x1 << 4) /**< \brief (PMC_PCSR0) Peripheral Clock 4 Status */ -#define PMC_PCSR0_PID5 (0x1 << 5) /**< \brief (PMC_PCSR0) Peripheral Clock 5 Status */ -#define PMC_PCSR0_PID6 (0x1 << 6) /**< \brief (PMC_PCSR0) Peripheral Clock 6 Status */ -#define PMC_PCSR0_PID7 (0x1 << 7) /**< \brief (PMC_PCSR0) Peripheral Clock 7 Status */ -#define PMC_PCSR0_PID8 (0x1 << 8) /**< \brief (PMC_PCSR0) Peripheral Clock 8 Status */ -#define PMC_PCSR0_PID9 (0x1 << 9) /**< \brief (PMC_PCSR0) Peripheral Clock 9 Status */ -#define PMC_PCSR0_PID10 (0x1 << 10) /**< \brief (PMC_PCSR0) Peripheral Clock 10 Status */ -#define PMC_PCSR0_PID11 (0x1 << 11) /**< \brief (PMC_PCSR0) Peripheral Clock 11 Status */ -#define PMC_PCSR0_PID12 (0x1 << 12) /**< \brief (PMC_PCSR0) Peripheral Clock 12 Status */ -#define PMC_PCSR0_PID13 (0x1 << 13) /**< \brief (PMC_PCSR0) Peripheral Clock 13 Status */ -#define PMC_PCSR0_PID14 (0x1 << 14) /**< \brief (PMC_PCSR0) Peripheral Clock 14 Status */ -#define PMC_PCSR0_PID15 (0x1 << 15) /**< \brief (PMC_PCSR0) Peripheral Clock 15 Status */ -#define PMC_PCSR0_PID16 (0x1 << 16) /**< \brief (PMC_PCSR0) Peripheral Clock 16 Status */ -#define PMC_PCSR0_PID17 (0x1 << 17) /**< \brief (PMC_PCSR0) Peripheral Clock 17 Status */ -#define PMC_PCSR0_PID18 (0x1 << 18) /**< \brief (PMC_PCSR0) Peripheral Clock 18 Status */ -#define PMC_PCSR0_PID19 (0x1 << 19) /**< \brief (PMC_PCSR0) Peripheral Clock 19 Status */ -#define PMC_PCSR0_PID20 (0x1 << 20) /**< \brief (PMC_PCSR0) Peripheral Clock 20 Status */ -#define PMC_PCSR0_PID21 (0x1 << 21) /**< \brief (PMC_PCSR0) Peripheral Clock 21 Status */ -#define PMC_PCSR0_PID22 (0x1 << 22) /**< \brief (PMC_PCSR0) Peripheral Clock 22 Status */ -#define PMC_PCSR0_PID23 (0x1 << 23) /**< \brief (PMC_PCSR0) Peripheral Clock 23 Status */ -#define PMC_PCSR0_PID24 (0x1 << 24) /**< \brief (PMC_PCSR0) Peripheral Clock 24 Status */ -#define PMC_PCSR0_PID25 (0x1 << 25) /**< \brief (PMC_PCSR0) Peripheral Clock 25 Status */ -#define PMC_PCSR0_PID26 (0x1 << 26) /**< \brief (PMC_PCSR0) Peripheral Clock 26 Status */ -#define PMC_PCSR0_PID27 (0x1 << 27) /**< \brief (PMC_PCSR0) Peripheral Clock 27 Status */ -#define PMC_PCSR0_PID28 (0x1 << 28) /**< \brief (PMC_PCSR0) Peripheral Clock 28 Status */ -#define PMC_PCSR0_PID29 (0x1 << 29) /**< \brief (PMC_PCSR0) Peripheral Clock 29 Status */ -#define PMC_PCSR0_PID30 (0x1 << 30) /**< \brief (PMC_PCSR0) Peripheral Clock 30 Status */ -#define PMC_PCSR0_PID31 (0x1 << 31) /**< \brief (PMC_PCSR0) Peripheral Clock 31 Status */ -/* -------- CKGR_MOR : (PMC Offset: 0x0020) Main Oscillator Register -------- */ -#define CKGR_MOR_MOSCXTEN (0x1 << 0) /**< \brief (CKGR_MOR) Main Crystal Oscillator Enable */ -#define CKGR_MOR_MOSCXTBY (0x1 << 1) /**< \brief (CKGR_MOR) Main Crystal Oscillator Bypass */ -#define CKGR_MOR_WAITMODE (0x1 << 2) /**< \brief (CKGR_MOR) Wait Mode Command */ -#define CKGR_MOR_MOSCRCEN (0x1 << 3) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Enable */ -#define CKGR_MOR_MOSCRCF (0x7 << 4) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Frequency Selection */ -#define CKGR_MOR_MOSCXTST (0xff << 8) /**< \brief (CKGR_MOR) Main Crystal Oscillator Start-up Time */ -#define CKGR_MOR_KEY (0xff << 16) /**< \brief (CKGR_MOR) Password */ -#define CKGR_MOR_MOSCSEL (0x1 << 24) /**< \brief (CKGR_MOR) Main Oscillator Selection */ -#define CKGR_MOR_CFDEN (0x1 << 25) /**< \brief (CKGR_MOR) Clock Failure Detector Enable */ -/* -------- CKGR_MCFR : (PMC Offset: 0x0024) Main Clock Frequency Register -------- */ -#define CKGR_MCFR_MAINF (0xffff << 0) /**< \brief (CKGR_MCFR) Main Clock Frequency */ -#define CKGR_MCFR_MAINFRDY (0x1 << 16) /**< \brief (CKGR_MCFR) Main Clock Ready */ -/* -------- CKGR_PLLAR : (PMC Offset: 0x0028) PLLA Register -------- */ -#define CKGR_PLLAR_DIVA (0xff << 0) /**< \brief (CKGR_PLLAR) Divider */ -#define CKGR_PLLAR_PLLACOUNT (0x3f << 8) /**< \brief (CKGR_PLLAR) PLLA Counter */ -#define CKGR_PLLAR_MULA (0x7ff << 16) /**< \brief (CKGR_PLLAR) PLLA Multiplier */ -#define CKGR_PLLAR_STUCKTO1 (0x1 << 29) /**< \brief (CKGR_PLLAR) */ -/* -------- CKGR_PLLBR : (PMC Offset: 0x002C) PLLB Register -------- */ -#define CKGR_PLLBR_DIVB (0xff << 0) /**< \brief (CKGR_PLLBR) Divider */ -#define CKGR_PLLBR_PLLBCOUNT (0x3f << 8) /**< \brief (CKGR_PLLBR) PLLB Counter */ -#define CKGR_PLLBR_MULB (0x7ff << 16) /**< \brief (CKGR_PLLBR) PLLB Multiplier */ -/* -------- PMC_MCKR : (PMC Offset: 0x0030) Master Clock Register -------- */ -#define PMC_MCKR_CSS (0x3 << 0) /**< \brief (PMC_MCKR) Master Clock Source Selection */ -#define PMC_MCKR_CSS_SLOW_CLK (0x0 << 0) /**< \brief (PMC_MCKR) Slow Clock is selected */ -#define PMC_MCKR_CSS_MAIN_CLK (0x1 << 0) /**< \brief (PMC_MCKR) Main Clock is selected */ -#define PMC_MCKR_CSS_PLLA_CLK (0x2 << 0) /**< \brief (PMC_MCKR) PLLA Clock is selected */ -#define PMC_MCKR_CSS_PLLB_CLK (0x3 << 0) /**< \brief (PMC_MCKR) PLLB Clock is selected */ -#define PMC_MCKR_PRES (0x7 << 4) /**< \brief (PMC_MCKR) Processor Clock Prescaler */ -#define PMC_MCKR_PRES_CLK (0x0 << 4) /**< \brief (PMC_MCKR) Selected clock */ -#define PMC_MCKR_PRES_CLK_2 (0x1 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 2 */ -#define PMC_MCKR_PRES_CLK_4 (0x2 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 4 */ -#define PMC_MCKR_PRES_CLK_8 (0x3 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 8 */ -#define PMC_MCKR_PRES_CLK_16 (0x4 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 16 */ -#define PMC_MCKR_PRES_CLK_32 (0x5 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 32 */ -#define PMC_MCKR_PRES_CLK_64 (0x6 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 64 */ -#define PMC_MCKR_PLLADIV2 (0x1 << 12) /**< \brief (PMC_MCKR) PLLA Divisor by 2 */ -#define PMC_MCKR_PLLBDIV2 (0x1 << 13) /**< \brief (PMC_MCKR) PLLB Divisor by 2 */ -/* -------- PMC_USB : (PMC Offset: 0x0038) USB Clock Register -------- */ -#define PMC_USB_USBS (0x1 << 0) /**< \brief (PMC_USB) USB Input Clock Selection */ -#define PMC_USB_USBDIV (0xf << 8) /**< \brief (PMC_USB) Divider for USB Clock. */ -/* -------- PMC_PCK[3] : (PMC Offset: 0x0040) Programmable Clock 0 Register -------- */ -#define PMC_PCK_CSS (0x7 << 0) /**< \brief (PMC_PCK[3]) Master Clock Source Selection */ -#define PMC_PCK_PRES (0x7 << 4) /**< \brief (PMC_PCK[3]) Programmable Clock Prescaler */ -/* -------- PMC_IER : (PMC Offset: 0x0060) Interrupt Enable Register -------- */ -#define PMC_IER_MOSCXTS (0x1 << 0) /**< \brief (PMC_IER) Main Crystal Oscillator Status Interrupt Enable */ -#define PMC_IER_LOCKA (0x1 << 1) /**< \brief (PMC_IER) PLLA Lock Interrupt Enable */ -#define PMC_IER_LOCKB (0x1 << 2) /**< \brief (PMC_IER) PLLB Lock Interrupt Enable */ -#define PMC_IER_MCKRDY (0x1 << 3) /**< \brief (PMC_IER) Master Clock Ready Interrupt Enable */ -#define PMC_IER_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IER) Programmable Clock Ready 0 Interrupt Enable */ -#define PMC_IER_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IER) Programmable Clock Ready 1 Interrupt Enable */ -#define PMC_IER_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IER) Programmable Clock Ready 2 Interrupt Enable */ -#define PMC_IER_MOSCSELS (0x1 << 16) /**< \brief (PMC_IER) Main Oscillator Selection Status Interrupt Enable */ -#define PMC_IER_MOSCRCS (0x1 << 17) /**< \brief (PMC_IER) Main On-Chip RC Status Interrupt Enable */ -#define PMC_IER_CFDEV (0x1 << 18) /**< \brief (PMC_IER) Clock Failure Detector Event Interrupt Enable */ -/* -------- PMC_IDR : (PMC Offset: 0x0064) Interrupt Disable Register -------- */ -#define PMC_IDR_MOSCXTS (0x1 << 0) /**< \brief (PMC_IDR) Main Crystal Oscillator Status Interrupt Disable */ -#define PMC_IDR_LOCKA (0x1 << 1) /**< \brief (PMC_IDR) PLLA Lock Interrupt Disable */ -#define PMC_IDR_LOCKB (0x1 << 2) /**< \brief (PMC_IDR) PLLB Lock Interrupt Disable */ -#define PMC_IDR_MCKRDY (0x1 << 3) /**< \brief (PMC_IDR) Master Clock Ready Interrupt Disable */ -#define PMC_IDR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IDR) Programmable Clock Ready 0 Interrupt Disable */ -#define PMC_IDR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IDR) Programmable Clock Ready 1 Interrupt Disable */ -#define PMC_IDR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IDR) Programmable Clock Ready 2 Interrupt Disable */ -#define PMC_IDR_MOSCSELS (0x1 << 16) /**< \brief (PMC_IDR) Main Oscillator Selection Status Interrupt Disable */ -#define PMC_IDR_MOSCRCS (0x1 << 17) /**< \brief (PMC_IDR) Main On-Chip RC Status Interrupt Disable */ -#define PMC_IDR_CFDEV (0x1 << 18) /**< \brief (PMC_IDR) Clock Failure Detector Event Interrupt Disable */ -/* -------- PMC_SR : (PMC Offset: 0x0068) Status Register -------- */ -#define PMC_SR_MOSCXTS (0x1 << 0) /**< \brief (PMC_SR) Main XTAL Oscillator Status */ -#define PMC_SR_LOCKA (0x1 << 1) /**< \brief (PMC_SR) PLLA Lock Status */ -#define PMC_SR_LOCKB (0x1 << 2) /**< \brief (PMC_SR) PLLB Lock Status */ -#define PMC_SR_MCKRDY (0x1 << 3) /**< \brief (PMC_SR) Master Clock Status */ -#define PMC_SR_OSCSELS (0x1 << 7) /**< \brief (PMC_SR) Slow Clock Oscillator Selection */ -#define PMC_SR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_MOSCSELS (0x1 << 16) /**< \brief (PMC_SR) Main Oscillator Selection Status */ -#define PMC_SR_MOSCRCS (0x1 << 17) /**< \brief (PMC_SR) Main On-Chip RC Oscillator Status */ -#define PMC_SR_CFDEV (0x1 << 18) /**< \brief (PMC_SR) Clock Failure Detector Event */ -#define PMC_SR_CFDS (0x1 << 19) /**< \brief (PMC_SR) Clock Failure Detector Status */ -#define PMC_SR_FOS (0x1 << 20) /**< \brief (PMC_SR) Clock Failure Detector Fault Output Status */ -/* -------- PMC_IMR : (PMC Offset: 0x006C) Interrupt Mask Register -------- */ -#define PMC_IMR_MOSCXTS (0x1 << 0) /**< \brief (PMC_IMR) Main Crystal Oscillator Status Interrupt Mask */ -#define PMC_IMR_LOCKA (0x1 << 1) /**< \brief (PMC_IMR) PLLA Lock Interrupt Mask */ -#define PMC_IMR_LOCKB (0x1 << 2) /**< \brief (PMC_IMR) PLLB Lock Interrupt Mask */ -#define PMC_IMR_MCKRDY (0x1 << 3) /**< \brief (PMC_IMR) Master Clock Ready Interrupt Mask */ -#define PMC_IMR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IMR) Programmable Clock Ready 0 Interrupt Mask */ -#define PMC_IMR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IMR) Programmable Clock Ready 1 Interrupt Mask */ -#define PMC_IMR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IMR) Programmable Clock Ready 2 Interrupt Mask */ -#define PMC_IMR_MOSCSELS (0x1 << 16) /**< \brief (PMC_IMR) Main Oscillator Selection Status Interrupt Mask */ -#define PMC_IMR_MOSCRCS (0x1 << 17) /**< \brief (PMC_IMR) Main On-Chip RC Status Interrupt Mask */ -#define PMC_IMR_CFDEV (0x1 << 18) /**< \brief (PMC_IMR) Clock Failure Detector Event Interrupt Mask */ -/* -------- PMC_FSMR : (PMC Offset: 0x0070) Fast Startup Mode Register -------- */ -#define PMC_FSMR_FSTT0 (0x1 << 0) /**< \brief (PMC_FSMR) Fast Startup Input Enable 0 */ -#define PMC_FSMR_FSTT1 (0x1 << 1) /**< \brief (PMC_FSMR) Fast Startup Input Enable 1 */ -#define PMC_FSMR_FSTT2 (0x1 << 2) /**< \brief (PMC_FSMR) Fast Startup Input Enable 2 */ -#define PMC_FSMR_FSTT3 (0x1 << 3) /**< \brief (PMC_FSMR) Fast Startup Input Enable 3 */ -#define PMC_FSMR_FSTT4 (0x1 << 4) /**< \brief (PMC_FSMR) Fast Startup Input Enable 4 */ -#define PMC_FSMR_FSTT5 (0x1 << 5) /**< \brief (PMC_FSMR) Fast Startup Input Enable 5 */ -#define PMC_FSMR_FSTT6 (0x1 << 6) /**< \brief (PMC_FSMR) Fast Startup Input Enable 6 */ -#define PMC_FSMR_FSTT7 (0x1 << 7) /**< \brief (PMC_FSMR) Fast Startup Input Enable 7 */ -#define PMC_FSMR_FSTT8 (0x1 << 8) /**< \brief (PMC_FSMR) Fast Startup Input Enable 8 */ -#define PMC_FSMR_FSTT9 (0x1 << 9) /**< \brief (PMC_FSMR) Fast Startup Input Enable 9 */ -#define PMC_FSMR_FSTT10 (0x1 << 10) /**< \brief (PMC_FSMR) Fast Startup Input Enable 10 */ -#define PMC_FSMR_FSTT11 (0x1 << 11) /**< \brief (PMC_FSMR) Fast Startup Input Enable 11 */ -#define PMC_FSMR_FSTT12 (0x1 << 12) /**< \brief (PMC_FSMR) Fast Startup Input Enable 12 */ -#define PMC_FSMR_FSTT13 (0x1 << 13) /**< \brief (PMC_FSMR) Fast Startup Input Enable 13 */ -#define PMC_FSMR_FSTT14 (0x1 << 14) /**< \brief (PMC_FSMR) Fast Startup Input Enable 14 */ -#define PMC_FSMR_FSTT15 (0x1 << 15) /**< \brief (PMC_FSMR) Fast Startup Input Enable 15 */ -#define PMC_FSMR_RTTAL (0x1 << 16) /**< \brief (PMC_FSMR) RTT Alarm Enable */ -#define PMC_FSMR_RTCAL (0x1 << 17) /**< \brief (PMC_FSMR) RTC Alarm Enable */ -#define PMC_FSMR_USBAL (0x1 << 18) /**< \brief (PMC_FSMR) USB Alarm Enable */ -#define PMC_FSMR_LPM (0x1 << 20) /**< \brief (PMC_FSMR) Low Power Mode */ -/* -------- PMC_FSPR : (PMC Offset: 0x0074) Fast Startup Polarity Register -------- */ -#define PMC_FSPR_FSTP0 (0x1 << 0) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP1 (0x1 << 1) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP2 (0x1 << 2) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP3 (0x1 << 3) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP4 (0x1 << 4) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP5 (0x1 << 5) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP6 (0x1 << 6) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP7 (0x1 << 7) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP8 (0x1 << 8) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP9 (0x1 << 9) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP10 (0x1 << 10) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP11 (0x1 << 11) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP12 (0x1 << 12) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP13 (0x1 << 13) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP14 (0x1 << 14) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP15 (0x1 << 15) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -/* -------- PMC_FOCR : (PMC Offset: 0x0078) Fault Output Clear Register -------- */ -#define PMC_FOCR_FOCLR (0x1 << 0) /**< \brief (PMC_FOCR) Fault Output Clear */ -/* -------- PMC_WPMR : (PMC Offset: 0x00E4) Write Protect Mode Register -------- */ -#define PMC_WPMR_WPEN (0x1 << 0) /**< \brief (PMC_WPMR) Write Protect Enable */ -#define PMC_WPMR_WPKEY (0xffffff << 8) /**< \brief (PMC_WPMR) Write Protect KEY */ -/* -------- PMC_WPSR : (PMC Offset: 0x00E8) Write Protect Status Register -------- */ -#define PMC_WPSR_WPVS (0x1 << 0) /**< \brief (PMC_WPSR) Write Protect Violation Status */ -#define PMC_WPSR_WPVSRC (0xffff << 8) /**< \brief (PMC_WPSR) Write Protect Violation Source */ -/* -------- PMC_PCER1 : (PMC Offset: 0x0100) Peripheral Clock Enable Register 1 -------- */ -#define PMC_PCER1_PID32 (0x1 << 0) /**< \brief (PMC_PCER1) Peripheral Clock 32 Enable */ -#define PMC_PCER1_PID33 (0x1 << 1) /**< \brief (PMC_PCER1) Peripheral Clock 33 Enable */ -#define PMC_PCER1_PID34 (0x1 << 2) /**< \brief (PMC_PCER1) Peripheral Clock 34 Enable */ -#define PMC_PCER1_PID35 (0x1 << 3) /**< \brief (PMC_PCER1) Peripheral Clock 35 Enable */ -#define PMC_PCER1_PID36 (0x1 << 4) /**< \brief (PMC_PCER1) Peripheral Clock 36 Enable */ -#define PMC_PCER1_PID37 (0x1 << 5) /**< \brief (PMC_PCER1) Peripheral Clock 37 Enable */ -#define PMC_PCER1_PID38 (0x1 << 6) /**< \brief (PMC_PCER1) Peripheral Clock 38 Enable */ -#define PMC_PCER1_PID39 (0x1 << 7) /**< \brief (PMC_PCER1) Peripheral Clock 39 Enable */ -#define PMC_PCER1_PID40 (0x1 << 8) /**< \brief (PMC_PCER1) Peripheral Clock 40 Enable */ -#define PMC_PCER1_PID41 (0x1 << 9) /**< \brief (PMC_PCER1) Peripheral Clock 41 Enable */ -#define PMC_PCER1_PID42 (0x1 << 10) /**< \brief (PMC_PCER1) Peripheral Clock 42 Enable */ -#define PMC_PCER1_PID43 (0x1 << 11) /**< \brief (PMC_PCER1) Peripheral Clock 43 Enable */ -#define PMC_PCER1_PID44 (0x1 << 12) /**< \brief (PMC_PCER1) Peripheral Clock 44 Enable */ -#define PMC_PCER1_PID45 (0x1 << 13) /**< \brief (PMC_PCER1) Peripheral Clock 45 Enable */ -#define PMC_PCER1_PID46 (0x1 << 14) /**< \brief (PMC_PCER1) Peripheral Clock 46 Enable */ -#define PMC_PCER1_PID47 (0x1 << 15) /**< \brief (PMC_PCER1) Peripheral Clock 47 Enable */ -#define PMC_PCER1_PID48 (0x1 << 16) /**< \brief (PMC_PCER1) Peripheral Clock 48 Enable */ -#define PMC_PCER1_PID49 (0x1 << 17) /**< \brief (PMC_PCER1) Peripheral Clock 49 Enable */ -#define PMC_PCER1_PID50 (0x1 << 18) /**< \brief (PMC_PCER1) Peripheral Clock 50 Enable */ -#define PMC_PCER1_PID51 (0x1 << 19) /**< \brief (PMC_PCER1) Peripheral Clock 51 Enable */ -#define PMC_PCER1_PID52 (0x1 << 20) /**< \brief (PMC_PCER1) Peripheral Clock 52 Enable */ -#define PMC_PCER1_PID53 (0x1 << 21) /**< \brief (PMC_PCER1) Peripheral Clock 53 Enable */ -#define PMC_PCER1_PID54 (0x1 << 22) /**< \brief (PMC_PCER1) Peripheral Clock 54 Enable */ -#define PMC_PCER1_PID55 (0x1 << 23) /**< \brief (PMC_PCER1) Peripheral Clock 55 Enable */ -#define PMC_PCER1_PID56 (0x1 << 24) /**< \brief (PMC_PCER1) Peripheral Clock 56 Enable */ -#define PMC_PCER1_PID57 (0x1 << 25) /**< \brief (PMC_PCER1) Peripheral Clock 57 Enable */ -#define PMC_PCER1_PID58 (0x1 << 26) /**< \brief (PMC_PCER1) Peripheral Clock 58 Enable */ -#define PMC_PCER1_PID59 (0x1 << 27) /**< \brief (PMC_PCER1) Peripheral Clock 59 Enable */ -#define PMC_PCER1_PID60 (0x1 << 28) /**< \brief (PMC_PCER1) Peripheral Clock 60 Enable */ -#define PMC_PCER1_PID61 (0x1 << 29) /**< \brief (PMC_PCER1) Peripheral Clock 61 Enable */ -#define PMC_PCER1_PID62 (0x1 << 30) /**< \brief (PMC_PCER1) Peripheral Clock 62 Enable */ -#define PMC_PCER1_PID63 (0x1 << 31) /**< \brief (PMC_PCER1) Peripheral Clock 63 Enable */ -/* -------- PMC_PCDR1 : (PMC Offset: 0x0104) Peripheral Clock Disable Register 1 -------- */ -#define PMC_PCDR1_PID32 (0x1 << 0) /**< \brief (PMC_PCDR1) Peripheral Clock 32 Disable */ -#define PMC_PCDR1_PID33 (0x1 << 1) /**< \brief (PMC_PCDR1) Peripheral Clock 33 Disable */ -#define PMC_PCDR1_PID34 (0x1 << 2) /**< \brief (PMC_PCDR1) Peripheral Clock 34 Disable */ -#define PMC_PCDR1_PID35 (0x1 << 3) /**< \brief (PMC_PCDR1) Peripheral Clock 35 Disable */ -#define PMC_PCDR1_PID36 (0x1 << 4) /**< \brief (PMC_PCDR1) Peripheral Clock 36 Disable */ -#define PMC_PCDR1_PID37 (0x1 << 5) /**< \brief (PMC_PCDR1) Peripheral Clock 37 Disable */ -#define PMC_PCDR1_PID38 (0x1 << 6) /**< \brief (PMC_PCDR1) Peripheral Clock 38 Disable */ -#define PMC_PCDR1_PID39 (0x1 << 7) /**< \brief (PMC_PCDR1) Peripheral Clock 39 Disable */ -#define PMC_PCDR1_PID40 (0x1 << 8) /**< \brief (PMC_PCDR1) Peripheral Clock 40 Disable */ -#define PMC_PCDR1_PID41 (0x1 << 9) /**< \brief (PMC_PCDR1) Peripheral Clock 41 Disable */ -#define PMC_PCDR1_PID42 (0x1 << 10) /**< \brief (PMC_PCDR1) Peripheral Clock 42 Disable */ -#define PMC_PCDR1_PID43 (0x1 << 11) /**< \brief (PMC_PCDR1) Peripheral Clock 43 Disable */ -#define PMC_PCDR1_PID44 (0x1 << 12) /**< \brief (PMC_PCDR1) Peripheral Clock 44 Disable */ -#define PMC_PCDR1_PID45 (0x1 << 13) /**< \brief (PMC_PCDR1) Peripheral Clock 45 Disable */ -#define PMC_PCDR1_PID46 (0x1 << 14) /**< \brief (PMC_PCDR1) Peripheral Clock 46 Disable */ -#define PMC_PCDR1_PID47 (0x1 << 15) /**< \brief (PMC_PCDR1) Peripheral Clock 47 Disable */ -#define PMC_PCDR1_PID48 (0x1 << 16) /**< \brief (PMC_PCDR1) Peripheral Clock 48 Disable */ -#define PMC_PCDR1_PID49 (0x1 << 17) /**< \brief (PMC_PCDR1) Peripheral Clock 49 Disable */ -#define PMC_PCDR1_PID50 (0x1 << 18) /**< \brief (PMC_PCDR1) Peripheral Clock 50 Disable */ -#define PMC_PCDR1_PID51 (0x1 << 19) /**< \brief (PMC_PCDR1) Peripheral Clock 51 Disable */ -#define PMC_PCDR1_PID52 (0x1 << 20) /**< \brief (PMC_PCDR1) Peripheral Clock 52 Disable */ -#define PMC_PCDR1_PID53 (0x1 << 21) /**< \brief (PMC_PCDR1) Peripheral Clock 53 Disable */ -#define PMC_PCDR1_PID54 (0x1 << 22) /**< \brief (PMC_PCDR1) Peripheral Clock 54 Disable */ -#define PMC_PCDR1_PID55 (0x1 << 23) /**< \brief (PMC_PCDR1) Peripheral Clock 55 Disable */ -#define PMC_PCDR1_PID56 (0x1 << 24) /**< \brief (PMC_PCDR1) Peripheral Clock 56 Disable */ -#define PMC_PCDR1_PID57 (0x1 << 25) /**< \brief (PMC_PCDR1) Peripheral Clock 57 Disable */ -#define PMC_PCDR1_PID58 (0x1 << 26) /**< \brief (PMC_PCDR1) Peripheral Clock 58 Disable */ -#define PMC_PCDR1_PID59 (0x1 << 27) /**< \brief (PMC_PCDR1) Peripheral Clock 59 Disable */ -#define PMC_PCDR1_PID60 (0x1 << 28) /**< \brief (PMC_PCDR1) Peripheral Clock 60 Disable */ -#define PMC_PCDR1_PID61 (0x1 << 29) /**< \brief (PMC_PCDR1) Peripheral Clock 61 Disable */ -#define PMC_PCDR1_PID62 (0x1 << 30) /**< \brief (PMC_PCDR1) Peripheral Clock 62 Disable */ -#define PMC_PCDR1_PID63 (0x1 << 31) /**< \brief (PMC_PCDR1) Peripheral Clock 63 Disable */ -/* -------- PMC_PCSR1 : (PMC Offset: 0x0108) Peripheral Clock Status Register 1 -------- */ -#define PMC_PCSR1_PID32 (0x1 << 0) /**< \brief (PMC_PCSR1) Peripheral Clock 32 Status */ -#define PMC_PCSR1_PID33 (0x1 << 1) /**< \brief (PMC_PCSR1) Peripheral Clock 33 Status */ -#define PMC_PCSR1_PID34 (0x1 << 2) /**< \brief (PMC_PCSR1) Peripheral Clock 34 Status */ -#define PMC_PCSR1_PID35 (0x1 << 3) /**< \brief (PMC_PCSR1) Peripheral Clock 35 Status */ -#define PMC_PCSR1_PID36 (0x1 << 4) /**< \brief (PMC_PCSR1) Peripheral Clock 36 Status */ -#define PMC_PCSR1_PID37 (0x1 << 5) /**< \brief (PMC_PCSR1) Peripheral Clock 37 Status */ -#define PMC_PCSR1_PID38 (0x1 << 6) /**< \brief (PMC_PCSR1) Peripheral Clock 38 Status */ -#define PMC_PCSR1_PID39 (0x1 << 7) /**< \brief (PMC_PCSR1) Peripheral Clock 39 Status */ -#define PMC_PCSR1_PID40 (0x1 << 8) /**< \brief (PMC_PCSR1) Peripheral Clock 40 Status */ -#define PMC_PCSR1_PID41 (0x1 << 9) /**< \brief (PMC_PCSR1) Peripheral Clock 41 Status */ -#define PMC_PCSR1_PID42 (0x1 << 10) /**< \brief (PMC_PCSR1) Peripheral Clock 42 Status */ -#define PMC_PCSR1_PID43 (0x1 << 11) /**< \brief (PMC_PCSR1) Peripheral Clock 43 Status */ -#define PMC_PCSR1_PID44 (0x1 << 12) /**< \brief (PMC_PCSR1) Peripheral Clock 44 Status */ -#define PMC_PCSR1_PID45 (0x1 << 13) /**< \brief (PMC_PCSR1) Peripheral Clock 45 Status */ -#define PMC_PCSR1_PID46 (0x1 << 14) /**< \brief (PMC_PCSR1) Peripheral Clock 46 Status */ -#define PMC_PCSR1_PID47 (0x1 << 15) /**< \brief (PMC_PCSR1) Peripheral Clock 47 Status */ -#define PMC_PCSR1_PID48 (0x1 << 16) /**< \brief (PMC_PCSR1) Peripheral Clock 48 Status */ -#define PMC_PCSR1_PID49 (0x1 << 17) /**< \brief (PMC_PCSR1) Peripheral Clock 49 Status */ -#define PMC_PCSR1_PID50 (0x1 << 18) /**< \brief (PMC_PCSR1) Peripheral Clock 50 Status */ -#define PMC_PCSR1_PID51 (0x1 << 19) /**< \brief (PMC_PCSR1) Peripheral Clock 51 Status */ -#define PMC_PCSR1_PID52 (0x1 << 20) /**< \brief (PMC_PCSR1) Peripheral Clock 52 Status */ -#define PMC_PCSR1_PID53 (0x1 << 21) /**< \brief (PMC_PCSR1) Peripheral Clock 53 Status */ -#define PMC_PCSR1_PID54 (0x1 << 22) /**< \brief (PMC_PCSR1) Peripheral Clock 54 Status */ -#define PMC_PCSR1_PID55 (0x1 << 23) /**< \brief (PMC_PCSR1) Peripheral Clock 55 Status */ -#define PMC_PCSR1_PID56 (0x1 << 24) /**< \brief (PMC_PCSR1) Peripheral Clock 56 Status */ -#define PMC_PCSR1_PID57 (0x1 << 25) /**< \brief (PMC_PCSR1) Peripheral Clock 57 Status */ -#define PMC_PCSR1_PID58 (0x1 << 26) /**< \brief (PMC_PCSR1) Peripheral Clock 58 Status */ -#define PMC_PCSR1_PID59 (0x1 << 27) /**< \brief (PMC_PCSR1) Peripheral Clock 59 Status */ -#define PMC_PCSR1_PID60 (0x1 << 28) /**< \brief (PMC_PCSR1) Peripheral Clock 60 Status */ -#define PMC_PCSR1_PID61 (0x1 << 29) /**< \brief (PMC_PCSR1) Peripheral Clock 61 Status */ -#define PMC_PCSR1_PID62 (0x1 << 30) /**< \brief (PMC_PCSR1) Peripheral Clock 62 Status */ -#define PMC_PCSR1_PID63 (0x1 << 31) /**< \brief (PMC_PCSR1) Peripheral Clock 63 Status */ -/* -------- PMC_OCR : (PMC Offset: 0x0110) Oscillator Calibration Register -------- */ -#define PMC_OCR_CAL4 (0x7f << 0) /**< \brief (PMC_OCR) RC Oscillator Calibration bits for 4 Mhz */ -#define PMC_OCR_SEL4 (0x1 << 7) /**< \brief (PMC_OCR) Selection of RC Oscillator Calibration bits for 4 Mhz */ -#define PMC_OCR_CAL8 (0x7f << 8) /**< \brief (PMC_OCR) RC Oscillator Calibration bits for 8 Mhz */ -#define PMC_OCR_SEL8 (0x1 << 15) /**< \brief (PMC_OCR) Selection of RC Oscillator Calibration bits for 8 Mhz */ -#define PMC_OCR_CAL12 (0x7f << 16) /**< \brief (PMC_OCR) RC Oscillator Calibration bits for 12 Mhz */ -#define PMC_OCR_SEL12 (0x1 << 23) /**< \brief (PMC_OCR) Selection of RC Oscillator Calibration bits for 12 Mhz */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Pulse Width Modulation Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_PWM Pulse Width Modulation Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief PwmCh_num hardware registers */ -typedef struct { - RwReg PWM_CMR; /**< \brief (PwmCh_num Offset: 0x0) PWM Channel Mode Register */ - RwReg PWM_CDTY; /**< \brief (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register */ - RwReg PWM_CDTYUPD; /**< \brief (PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register */ - RwReg PWM_CPRD; /**< \brief (PwmCh_num Offset: 0xC) PWM Channel Period Register */ - RwReg PWM_CPRDUPD; /**< \brief (PwmCh_num Offset: 0x10) PWM Channel Period Update Register */ - RwReg PWM_CCNT; /**< \brief (PwmCh_num Offset: 0x14) PWM Channel Counter Register */ - RwReg PWM_DT; /**< \brief (PwmCh_num Offset: 0x18) PWM Channel Dead Time Register */ - RwReg PWM_DTUPD; /**< \brief (PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register */ -} PwmCh_num; -/** \brief Pwm hardware registers */ -typedef struct { - RwReg PWM_CLK; /**< \brief (Pwm Offset: 0x00) PWM Clock Register */ - WoReg PWM_ENA; /**< \brief (Pwm Offset: 0x04) PWM Enable Register */ - WoReg PWM_DIS; /**< \brief (Pwm Offset: 0x08) PWM Disable Register */ - RoReg PWM_SR; /**< \brief (Pwm Offset: 0x0C) PWM Status Register */ - WoReg PWM_IER1; /**< \brief (Pwm Offset: 0x10) PWM Interrupt Enable Register 1 */ - WoReg PWM_IDR1; /**< \brief (Pwm Offset: 0x14) PWM Interrupt Disable Register 1 */ - RoReg PWM_IMR1; /**< \brief (Pwm Offset: 0x18) PWM Interrupt Mask Register 1 */ - RoReg PWM_ISR1; /**< \brief (Pwm Offset: 0x1C) PWM Interrupt Status Register 1 */ - RwReg PWM_SCM; /**< \brief (Pwm Offset: 0x20) PWM Sync Channels Mode Register */ - RwReg Reserved1[1]; - RwReg PWM_SCUC; /**< \brief (Pwm Offset: 0x28) PWM Sync Channels Update Control Register */ - RwReg PWM_SCUP; /**< \brief (Pwm Offset: 0x2C) PWM Sync Channels Update Period Register */ - WoReg PWM_SCUPUPD; /**< \brief (Pwm Offset: 0x30) PWM Sync Channels Update Period Update Register */ - WoReg PWM_IER2; /**< \brief (Pwm Offset: 0x34) PWM Interrupt Enable Register 2 */ - WoReg PWM_IDR2; /**< \brief (Pwm Offset: 0x38) PWM Interrupt Disable Register 2 */ - RoReg PWM_IMR2; /**< \brief (Pwm Offset: 0x3C) PWM Interrupt Mask Register 2 */ - RoReg PWM_ISR2; /**< \brief (Pwm Offset: 0x40) PWM Interrupt Status Register 2 */ - RwReg PWM_OOV; /**< \brief (Pwm Offset: 0x44) PWM Output Override Value Register */ - RwReg PWM_OS; /**< \brief (Pwm Offset: 0x48) PWM Output Selection Register */ - WoReg PWM_OSS; /**< \brief (Pwm Offset: 0x4C) PWM Output Selection Set Register */ - WoReg PWM_OSC; /**< \brief (Pwm Offset: 0x50) PWM Output Selection Clear Register */ - WoReg PWM_OSSUPD; /**< \brief (Pwm Offset: 0x54) PWM Output Selection Set Update Register */ - WoReg PWM_OSCUPD; /**< \brief (Pwm Offset: 0x58) PWM Output Selection Clear Update Register */ - RwReg PWM_FMR; /**< \brief (Pwm Offset: 0x5C) PWM Fault Mode Register */ - RoReg PWM_FSR; /**< \brief (Pwm Offset: 0x60) PWM Fault Status Register */ - WoReg PWM_FCR; /**< \brief (Pwm Offset: 0x64) PWM Fault Clear Register */ - RwReg PWM_FPV; /**< \brief (Pwm Offset: 0x68) PWM Fault Protection Value Register */ - RwReg PWM_FPE; /**< \brief (Pwm Offset: 0x6C) PWM Fault Protection Enable Register */ - RwReg Reserved2[3]; - RwReg PWM_ELxMR[2]; /**< \brief (Pwm Offset: 0x7C) PWM Event Line 0 Mode Register */ - RwReg Reserved3[11]; - RwReg PWM_SMMR; /**< \brief (Pwm Offset: 0xB0) PWM Stepper Motor Mode Register */ - RwReg Reserved4[12]; - WoReg PWM_WPCR; /**< \brief (Pwm Offset: 0xE4) PWM Write Protect Control Register */ - RoReg PWM_WPSR; /**< \brief (Pwm Offset: 0xE8) PWM Write Protect Status Register */ - RwReg Reserved5[5]; - RwReg PWM_RPR; /**< \brief (Pwm Offset: 0x100) Receive Pointer Register */ - RwReg PWM_RCR; /**< \brief (Pwm Offset: 0x104) Receive Counter Register */ - RwReg PWM_TPR; /**< \brief (Pwm Offset: 0x108) Transmit Pointer Register */ - RwReg PWM_TCR; /**< \brief (Pwm Offset: 0x10C) Transmit Counter Register */ - RwReg PWM_RNPR; /**< \brief (Pwm Offset: 0x110) Receive Next Pointer Register */ - RwReg PWM_RNCR; /**< \brief (Pwm Offset: 0x114) Receive Next Counter Register */ - RwReg PWM_TNPR; /**< \brief (Pwm Offset: 0x118) Transmit Next Pointer Register */ - RwReg PWM_TNCR; /**< \brief (Pwm Offset: 0x11C) Transmit Next Counter Register */ - WoReg PWM_PTCR; /**< \brief (Pwm Offset: 0x120) Transfer Control Register */ - RoReg PWM_PTSR; /**< \brief (Pwm Offset: 0x124) Transfer Status Register */ - RwReg Reserved6[2]; - RwReg PWM_CMP0V; /**< \brief (Pwm Offset: 0x130) PWM Comparison 0 Value Register */ - WoReg PWM_CMP0VUPD; /**< \brief (Pwm Offset: 0x134) PWM Comparison 0 Value Update Register */ - RwReg PWM_CMP0M; /**< \brief (Pwm Offset: 0x138) PWM Comparison 0 Mode Register */ - WoReg PWM_CMP0MUPD; /**< \brief (Pwm Offset: 0x13C) PWM Comparison 0 Mode Update Register */ - RwReg PWM_CMP1V; /**< \brief (Pwm Offset: 0x140) PWM Comparison 1 Value Register */ - WoReg PWM_CMP1VUPD; /**< \brief (Pwm Offset: 0x144) PWM Comparison 1 Value Update Register */ - RwReg PWM_CMP1M; /**< \brief (Pwm Offset: 0x148) PWM Comparison 1 Mode Register */ - WoReg PWM_CMP1MUPD; /**< \brief (Pwm Offset: 0x14C) PWM Comparison 1 Mode Update Register */ - RwReg PWM_CMP2V; /**< \brief (Pwm Offset: 0x150) PWM Comparison 2 Value Register */ - WoReg PWM_CMP2VUPD; /**< \brief (Pwm Offset: 0x154) PWM Comparison 2 Value Update Register */ - RwReg PWM_CMP2M; /**< \brief (Pwm Offset: 0x158) PWM Comparison 2 Mode Register */ - WoReg PWM_CMP2MUPD; /**< \brief (Pwm Offset: 0x15C) PWM Comparison 2 Mode Update Register */ - RwReg PWM_CMP3V; /**< \brief (Pwm Offset: 0x160) PWM Comparison 3 Value Register */ - WoReg PWM_CMP3VUPD; /**< \brief (Pwm Offset: 0x164) PWM Comparison 3 Value Update Register */ - RwReg PWM_CMP3M; /**< \brief (Pwm Offset: 0x168) PWM Comparison 3 Mode Register */ - WoReg PWM_CMP3MUPD; /**< \brief (Pwm Offset: 0x16C) PWM Comparison 3 Mode Update Register */ - RwReg PWM_CMP4V; /**< \brief (Pwm Offset: 0x170) PWM Comparison 4 Value Register */ - WoReg PWM_CMP4VUPD; /**< \brief (Pwm Offset: 0x174) PWM Comparison 4 Value Update Register */ - RwReg PWM_CMP4M; /**< \brief (Pwm Offset: 0x178) PWM Comparison 4 Mode Register */ - WoReg PWM_CMP4MUPD; /**< \brief (Pwm Offset: 0x17C) PWM Comparison 4 Mode Update Register */ - RwReg PWM_CMP5V; /**< \brief (Pwm Offset: 0x180) PWM Comparison 5 Value Register */ - WoReg PWM_CMP5VUPD; /**< \brief (Pwm Offset: 0x184) PWM Comparison 5 Value Update Register */ - RwReg PWM_CMP5M; /**< \brief (Pwm Offset: 0x188) PWM Comparison 5 Mode Register */ - WoReg PWM_CMP5MUPD; /**< \brief (Pwm Offset: 0x18C) PWM Comparison 5 Mode Update Register */ - RwReg PWM_CMP6V; /**< \brief (Pwm Offset: 0x190) PWM Comparison 6 Value Register */ - WoReg PWM_CMP6VUPD; /**< \brief (Pwm Offset: 0x194) PWM Comparison 6 Value Update Register */ - RwReg PWM_CMP6M; /**< \brief (Pwm Offset: 0x198) PWM Comparison 6 Mode Register */ - WoReg PWM_CMP6MUPD; /**< \brief (Pwm Offset: 0x19C) PWM Comparison 6 Mode Update Register */ - RwReg PWM_CMP7V; /**< \brief (Pwm Offset: 0x1A0) PWM Comparison 7 Value Register */ - WoReg PWM_CMP7VUPD; /**< \brief (Pwm Offset: 0x1A4) PWM Comparison 7 Value Update Register */ - RwReg PWM_CMP7M; /**< \brief (Pwm Offset: 0x1A8) PWM Comparison 7 Mode Register */ - WoReg PWM_CMP7MUPD; /**< \brief (Pwm Offset: 0x1AC) PWM Comparison 7 Mode Update Register */ - RwReg Reserved7[20]; - PwmCh_num PWM_CH_NUM[4]; /**< \brief (Pwm Offset: 0x200) ch_num = 0 .. 3 */ -} Pwm; -#endif /* __ASSEMBLY__ */ -/* -------- PWM_CLK : (PWM Offset: 0x00) PWM Clock Register -------- */ -#define PWM_CLK_DIVA (0xff << 0) /**< \brief (PWM_CLK) CLKA, CLKB Divide Factor */ -#define PWM_CLK_PREA (0xf << 8) /**< \brief (PWM_CLK) CLKA, CLKB Source Clock Selection */ -#define PWM_CLK_DIVB (0xff << 16) /**< \brief (PWM_CLK) CLKA, CLKB Divide Factor */ -#define PWM_CLK_PREB (0xf << 24) /**< \brief (PWM_CLK) CLKA, CLKB Source Clock Selection */ -/* -------- PWM_ENA : (PWM Offset: 0x04) PWM Enable Register -------- */ -#define PWM_ENA_CHID0 (0x1 << 0) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID1 (0x1 << 1) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID2 (0x1 << 2) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID3 (0x1 << 3) /**< \brief (PWM_ENA) Channel ID */ -/* -------- PWM_DIS : (PWM Offset: 0x08) PWM Disable Register -------- */ -#define PWM_DIS_CHID0 (0x1 << 0) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID1 (0x1 << 1) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID2 (0x1 << 2) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID3 (0x1 << 3) /**< \brief (PWM_DIS) Channel ID */ -/* -------- PWM_SR : (PWM Offset: 0x0C) PWM Status Register -------- */ -#define PWM_SR_CHID0 (0x1 << 0) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID1 (0x1 << 1) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID2 (0x1 << 2) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID3 (0x1 << 3) /**< \brief (PWM_SR) Channel ID */ -/* -------- PWM_IER1 : (PWM Offset: 0x10) PWM Interrupt Enable Register 1 -------- */ -#define PWM_IER1_CHID0 (0x1 << 0) /**< \brief (PWM_IER1) Counter Event on Channel 0 Interrupt Enable */ -#define PWM_IER1_CHID1 (0x1 << 1) /**< \brief (PWM_IER1) Counter Event on Channel 1 Interrupt Enable */ -#define PWM_IER1_CHID2 (0x1 << 2) /**< \brief (PWM_IER1) Counter Event on Channel 2 Interrupt Enable */ -#define PWM_IER1_CHID3 (0x1 << 3) /**< \brief (PWM_IER1) Counter Event on Channel 3 Interrupt Enable */ -#define PWM_IER1_FCHID0 (0x1 << 16) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 0 Interrupt Enable */ -#define PWM_IER1_FCHID1 (0x1 << 17) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 1 Interrupt Enable */ -#define PWM_IER1_FCHID2 (0x1 << 18) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 2 Interrupt Enable */ -#define PWM_IER1_FCHID3 (0x1 << 19) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 3 Interrupt Enable */ -/* -------- PWM_IDR1 : (PWM Offset: 0x14) PWM Interrupt Disable Register 1 -------- */ -#define PWM_IDR1_CHID0 (0x1 << 0) /**< \brief (PWM_IDR1) Counter Event on Channel 0 Interrupt Disable */ -#define PWM_IDR1_CHID1 (0x1 << 1) /**< \brief (PWM_IDR1) Counter Event on Channel 1 Interrupt Disable */ -#define PWM_IDR1_CHID2 (0x1 << 2) /**< \brief (PWM_IDR1) Counter Event on Channel 2 Interrupt Disable */ -#define PWM_IDR1_CHID3 (0x1 << 3) /**< \brief (PWM_IDR1) Counter Event on Channel 3 Interrupt Disable */ -#define PWM_IDR1_FCHID0 (0x1 << 16) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 0 Interrupt Disable */ -#define PWM_IDR1_FCHID1 (0x1 << 17) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 1 Interrupt Disable */ -#define PWM_IDR1_FCHID2 (0x1 << 18) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 2 Interrupt Disable */ -#define PWM_IDR1_FCHID3 (0x1 << 19) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 3 Interrupt Disable */ -/* -------- PWM_IMR1 : (PWM Offset: 0x18) PWM Interrupt Mask Register 1 -------- */ -#define PWM_IMR1_CHID0 (0x1 << 0) /**< \brief (PWM_IMR1) Counter Event on Channel 0 Interrupt Mask */ -#define PWM_IMR1_CHID1 (0x1 << 1) /**< \brief (PWM_IMR1) Counter Event on Channel 1 Interrupt Mask */ -#define PWM_IMR1_CHID2 (0x1 << 2) /**< \brief (PWM_IMR1) Counter Event on Channel 2 Interrupt Mask */ -#define PWM_IMR1_CHID3 (0x1 << 3) /**< \brief (PWM_IMR1) Counter Event on Channel 3 Interrupt Mask */ -#define PWM_IMR1_FCHID0 (0x1 << 16) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 0 Interrupt Mask */ -#define PWM_IMR1_FCHID1 (0x1 << 17) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 1 Interrupt Mask */ -#define PWM_IMR1_FCHID2 (0x1 << 18) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 2 Interrupt Mask */ -#define PWM_IMR1_FCHID3 (0x1 << 19) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 3 Interrupt Mask */ -/* -------- PWM_ISR1 : (PWM Offset: 0x1C) PWM Interrupt Status Register 1 -------- */ -#define PWM_ISR1_CHID0 (0x1 << 0) /**< \brief (PWM_ISR1) Counter Event on Channel 0 */ -#define PWM_ISR1_CHID1 (0x1 << 1) /**< \brief (PWM_ISR1) Counter Event on Channel 1 */ -#define PWM_ISR1_CHID2 (0x1 << 2) /**< \brief (PWM_ISR1) Counter Event on Channel 2 */ -#define PWM_ISR1_CHID3 (0x1 << 3) /**< \brief (PWM_ISR1) Counter Event on Channel 3 */ -#define PWM_ISR1_FCHID0 (0x1 << 16) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 0 */ -#define PWM_ISR1_FCHID1 (0x1 << 17) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 1 */ -#define PWM_ISR1_FCHID2 (0x1 << 18) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 2 */ -#define PWM_ISR1_FCHID3 (0x1 << 19) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 3 */ -/* -------- PWM_SCM : (PWM Offset: 0x20) PWM Sync Channels Mode Register -------- */ -#define PWM_SCM_SYNC0 (0x1 << 0) /**< \brief (PWM_SCM) Synchronous Channel 0 */ -#define PWM_SCM_SYNC1 (0x1 << 1) /**< \brief (PWM_SCM) Synchronous Channel 1 */ -#define PWM_SCM_SYNC2 (0x1 << 2) /**< \brief (PWM_SCM) Synchronous Channel 2 */ -#define PWM_SCM_SYNC3 (0x1 << 3) /**< \brief (PWM_SCM) Synchronous Channel 3 */ -#define PWM_SCM_UPDM (0x3 << 16) /**< \brief (PWM_SCM) Synchronous Channels Update Mode */ -#define PWM_SCM_PTRM (0x1 << 20) /**< \brief (PWM_SCM) PDC Transfer Request Mode */ -#define PWM_SCM_PTRCS (0x7 << 21) /**< \brief (PWM_SCM) PDC Transfer Request Comparison Selection */ -/* -------- PWM_SCUC : (PWM Offset: 0x28) PWM Sync Channels Update Control Register -------- */ -#define PWM_SCUC_UPDULOCK (0x1 << 0) /**< \brief (PWM_SCUC) Synchronous Channels Update Unlock */ -/* -------- PWM_SCUP : (PWM Offset: 0x2C) PWM Sync Channels Update Period Register -------- */ -#define PWM_SCUP_UPR (0xf << 0) /**< \brief (PWM_SCUP) Update Period */ -#define PWM_SCUP_UPRCNT (0xf << 4) /**< \brief (PWM_SCUP) Update Period Counter */ -/* -------- PWM_SCUPUPD : (PWM Offset: 0x30) PWM Sync Channels Update Period Update Register -------- */ -#define PWM_SCUPUPD_UPRUPD (0xf << 0) /**< \brief (PWM_SCUPUPD) Update Period Update */ -/* -------- PWM_IER2 : (PWM Offset: 0x34) PWM Interrupt Enable Register 2 -------- */ -#define PWM_IER2_WRDY (0x1 << 0) /**< \brief (PWM_IER2) Write Ready for Synchronous Channels Update Interrupt Enable */ -#define PWM_IER2_ENDTX (0x1 << 1) /**< \brief (PWM_IER2) PDC End of TX Buffer Interrupt Enable */ -#define PWM_IER2_TXBUFE (0x1 << 2) /**< \brief (PWM_IER2) PDC TX Buffer Empty Interrupt Enable */ -#define PWM_IER2_UNRE (0x1 << 3) /**< \brief (PWM_IER2) Synchronous Channels Update Underrun Error Interrupt Enable */ -#define PWM_IER2_CMPM0 (0x1 << 8) /**< \brief (PWM_IER2) Comparison 0 Match Interrupt Enable */ -#define PWM_IER2_CMPM1 (0x1 << 9) /**< \brief (PWM_IER2) Comparison 1 Match Interrupt Enable */ -#define PWM_IER2_CMPM2 (0x1 << 10) /**< \brief (PWM_IER2) Comparison 2 Match Interrupt Enable */ -#define PWM_IER2_CMPM3 (0x1 << 11) /**< \brief (PWM_IER2) Comparison 3 Match Interrupt Enable */ -#define PWM_IER2_CMPM4 (0x1 << 12) /**< \brief (PWM_IER2) Comparison 4 Match Interrupt Enable */ -#define PWM_IER2_CMPM5 (0x1 << 13) /**< \brief (PWM_IER2) Comparison 5 Match Interrupt Enable */ -#define PWM_IER2_CMPM6 (0x1 << 14) /**< \brief (PWM_IER2) Comparison 6 Match Interrupt Enable */ -#define PWM_IER2_CMPM7 (0x1 << 15) /**< \brief (PWM_IER2) Comparison 7 Match Interrupt Enable */ -#define PWM_IER2_CMPU0 (0x1 << 16) /**< \brief (PWM_IER2) Comparison 0 Update Interrupt Enable */ -#define PWM_IER2_CMPU1 (0x1 << 17) /**< \brief (PWM_IER2) Comparison 1 Update Interrupt Enable */ -#define PWM_IER2_CMPU2 (0x1 << 18) /**< \brief (PWM_IER2) Comparison 2 Update Interrupt Enable */ -#define PWM_IER2_CMPU3 (0x1 << 19) /**< \brief (PWM_IER2) Comparison 3 Update Interrupt Enable */ -#define PWM_IER2_CMPU4 (0x1 << 20) /**< \brief (PWM_IER2) Comparison 4 Update Interrupt Enable */ -#define PWM_IER2_CMPU5 (0x1 << 21) /**< \brief (PWM_IER2) Comparison 5 Update Interrupt Enable */ -#define PWM_IER2_CMPU6 (0x1 << 22) /**< \brief (PWM_IER2) Comparison 6 Update Interrupt Enable */ -#define PWM_IER2_CMPU7 (0x1 << 23) /**< \brief (PWM_IER2) Comparison 7 Update Interrupt Enable */ -/* -------- PWM_IDR2 : (PWM Offset: 0x38) PWM Interrupt Disable Register 2 -------- */ -#define PWM_IDR2_WRDY (0x1 << 0) /**< \brief (PWM_IDR2) Write Ready for Synchronous Channels Update Interrupt Disable */ -#define PWM_IDR2_ENDTX (0x1 << 1) /**< \brief (PWM_IDR2) PDC End of TX Buffer Interrupt Disable */ -#define PWM_IDR2_TXBUFE (0x1 << 2) /**< \brief (PWM_IDR2) PDC TX Buffer Empty Interrupt Disable */ -#define PWM_IDR2_UNRE (0x1 << 3) /**< \brief (PWM_IDR2) Synchronous Channels Update Underrun Error Interrupt Disable */ -#define PWM_IDR2_CMPM0 (0x1 << 8) /**< \brief (PWM_IDR2) Comparison 0 Match Interrupt Disable */ -#define PWM_IDR2_CMPM1 (0x1 << 9) /**< \brief (PWM_IDR2) Comparison 1 Match Interrupt Disable */ -#define PWM_IDR2_CMPM2 (0x1 << 10) /**< \brief (PWM_IDR2) Comparison 2 Match Interrupt Disable */ -#define PWM_IDR2_CMPM3 (0x1 << 11) /**< \brief (PWM_IDR2) Comparison 3 Match Interrupt Disable */ -#define PWM_IDR2_CMPM4 (0x1 << 12) /**< \brief (PWM_IDR2) Comparison 4 Match Interrupt Disable */ -#define PWM_IDR2_CMPM5 (0x1 << 13) /**< \brief (PWM_IDR2) Comparison 5 Match Interrupt Disable */ -#define PWM_IDR2_CMPM6 (0x1 << 14) /**< \brief (PWM_IDR2) Comparison 6 Match Interrupt Disable */ -#define PWM_IDR2_CMPM7 (0x1 << 15) /**< \brief (PWM_IDR2) Comparison 7 Match Interrupt Disable */ -#define PWM_IDR2_CMPU0 (0x1 << 16) /**< \brief (PWM_IDR2) Comparison 0 Update Interrupt Disable */ -#define PWM_IDR2_CMPU1 (0x1 << 17) /**< \brief (PWM_IDR2) Comparison 1 Update Interrupt Disable */ -#define PWM_IDR2_CMPU2 (0x1 << 18) /**< \brief (PWM_IDR2) Comparison 2 Update Interrupt Disable */ -#define PWM_IDR2_CMPU3 (0x1 << 19) /**< \brief (PWM_IDR2) Comparison 3 Update Interrupt Disable */ -#define PWM_IDR2_CMPU4 (0x1 << 20) /**< \brief (PWM_IDR2) Comparison 4 Update Interrupt Disable */ -#define PWM_IDR2_CMPU5 (0x1 << 21) /**< \brief (PWM_IDR2) Comparison 5 Update Interrupt Disable */ -#define PWM_IDR2_CMPU6 (0x1 << 22) /**< \brief (PWM_IDR2) Comparison 6 Update Interrupt Disable */ -#define PWM_IDR2_CMPU7 (0x1 << 23) /**< \brief (PWM_IDR2) Comparison 7 Update Interrupt Disable */ -/* -------- PWM_IMR2 : (PWM Offset: 0x3C) PWM Interrupt Mask Register 2 -------- */ -#define PWM_IMR2_WRDY (0x1 << 0) /**< \brief (PWM_IMR2) Write Ready for Synchronous Channels Update Interrupt Mask */ -#define PWM_IMR2_ENDTX (0x1 << 1) /**< \brief (PWM_IMR2) PDC End of TX Buffer Interrupt Mask */ -#define PWM_IMR2_TXBUFE (0x1 << 2) /**< \brief (PWM_IMR2) PDC TX Buffer Empty Interrupt Mask */ -#define PWM_IMR2_UNRE (0x1 << 3) /**< \brief (PWM_IMR2) Synchronous Channels Update Underrun Error Interrupt Mask */ -#define PWM_IMR2_CMPM0 (0x1 << 8) /**< \brief (PWM_IMR2) Comparison 0 Match Interrupt Mask */ -#define PWM_IMR2_CMPM1 (0x1 << 9) /**< \brief (PWM_IMR2) Comparison 1 Match Interrupt Mask */ -#define PWM_IMR2_CMPM2 (0x1 << 10) /**< \brief (PWM_IMR2) Comparison 2 Match Interrupt Mask */ -#define PWM_IMR2_CMPM3 (0x1 << 11) /**< \brief (PWM_IMR2) Comparison 3 Match Interrupt Mask */ -#define PWM_IMR2_CMPM4 (0x1 << 12) /**< \brief (PWM_IMR2) Comparison 4 Match Interrupt Mask */ -#define PWM_IMR2_CMPM5 (0x1 << 13) /**< \brief (PWM_IMR2) Comparison 5 Match Interrupt Mask */ -#define PWM_IMR2_CMPM6 (0x1 << 14) /**< \brief (PWM_IMR2) Comparison 6 Match Interrupt Mask */ -#define PWM_IMR2_CMPM7 (0x1 << 15) /**< \brief (PWM_IMR2) Comparison 7 Match Interrupt Mask */ -#define PWM_IMR2_CMPU0 (0x1 << 16) /**< \brief (PWM_IMR2) Comparison 0 Update Interrupt Mask */ -#define PWM_IMR2_CMPU1 (0x1 << 17) /**< \brief (PWM_IMR2) Comparison 1 Update Interrupt Mask */ -#define PWM_IMR2_CMPU2 (0x1 << 18) /**< \brief (PWM_IMR2) Comparison 2 Update Interrupt Mask */ -#define PWM_IMR2_CMPU3 (0x1 << 19) /**< \brief (PWM_IMR2) Comparison 3 Update Interrupt Mask */ -#define PWM_IMR2_CMPU4 (0x1 << 20) /**< \brief (PWM_IMR2) Comparison 4 Update Interrupt Mask */ -#define PWM_IMR2_CMPU5 (0x1 << 21) /**< \brief (PWM_IMR2) Comparison 5 Update Interrupt Mask */ -#define PWM_IMR2_CMPU6 (0x1 << 22) /**< \brief (PWM_IMR2) Comparison 6 Update Interrupt Mask */ -#define PWM_IMR2_CMPU7 (0x1 << 23) /**< \brief (PWM_IMR2) Comparison 7 Update Interrupt Mask */ -/* -------- PWM_ISR2 : (PWM Offset: 0x40) PWM Interrupt Status Register 2 -------- */ -#define PWM_ISR2_WRDY (0x1 << 0) /**< \brief (PWM_ISR2) Write Ready for Synchronous Channels Update */ -#define PWM_ISR2_ENDTX (0x1 << 1) /**< \brief (PWM_ISR2) PDC End of TX Buffer */ -#define PWM_ISR2_TXBUFE (0x1 << 2) /**< \brief (PWM_ISR2) PDC TX Buffer Empty */ -#define PWM_ISR2_UNRE (0x1 << 3) /**< \brief (PWM_ISR2) Synchronous Channels Update Underrun Error */ -#define PWM_ISR2_CMPM0 (0x1 << 8) /**< \brief (PWM_ISR2) Comparison 0 Match */ -#define PWM_ISR2_CMPM1 (0x1 << 9) /**< \brief (PWM_ISR2) Comparison 1 Match */ -#define PWM_ISR2_CMPM2 (0x1 << 10) /**< \brief (PWM_ISR2) Comparison 2 Match */ -#define PWM_ISR2_CMPM3 (0x1 << 11) /**< \brief (PWM_ISR2) Comparison 3 Match */ -#define PWM_ISR2_CMPM4 (0x1 << 12) /**< \brief (PWM_ISR2) Comparison 4 Match */ -#define PWM_ISR2_CMPM5 (0x1 << 13) /**< \brief (PWM_ISR2) Comparison 5 Match */ -#define PWM_ISR2_CMPM6 (0x1 << 14) /**< \brief (PWM_ISR2) Comparison 6 Match */ -#define PWM_ISR2_CMPM7 (0x1 << 15) /**< \brief (PWM_ISR2) Comparison 7 Match */ -#define PWM_ISR2_CMPU0 (0x1 << 16) /**< \brief (PWM_ISR2) Comparison 0 Update */ -#define PWM_ISR2_CMPU1 (0x1 << 17) /**< \brief (PWM_ISR2) Comparison 1 Update */ -#define PWM_ISR2_CMPU2 (0x1 << 18) /**< \brief (PWM_ISR2) Comparison 2 Update */ -#define PWM_ISR2_CMPU3 (0x1 << 19) /**< \brief (PWM_ISR2) Comparison 3 Update */ -#define PWM_ISR2_CMPU4 (0x1 << 20) /**< \brief (PWM_ISR2) Comparison 4 Update */ -#define PWM_ISR2_CMPU5 (0x1 << 21) /**< \brief (PWM_ISR2) Comparison 5 Update */ -#define PWM_ISR2_CMPU6 (0x1 << 22) /**< \brief (PWM_ISR2) Comparison 6 Update */ -#define PWM_ISR2_CMPU7 (0x1 << 23) /**< \brief (PWM_ISR2) Comparison 7 Update */ -/* -------- PWM_OOV : (PWM Offset: 0x44) PWM Output Override Value Register -------- */ -#define PWM_OOV_OOVH0 (0x1 << 0) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 0 */ -#define PWM_OOV_OOVH1 (0x1 << 1) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 1 */ -#define PWM_OOV_OOVH2 (0x1 << 2) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 2 */ -#define PWM_OOV_OOVH3 (0x1 << 3) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 3 */ -#define PWM_OOV_OOVL0 (0x1 << 16) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 0 */ -#define PWM_OOV_OOVL1 (0x1 << 17) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 1 */ -#define PWM_OOV_OOVL2 (0x1 << 18) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 2 */ -#define PWM_OOV_OOVL3 (0x1 << 19) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 3 */ -/* -------- PWM_OS : (PWM Offset: 0x48) PWM Output Selection Register -------- */ -#define PWM_OS_OSH0 (0x1 << 0) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 0 */ -#define PWM_OS_OSH1 (0x1 << 1) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 1 */ -#define PWM_OS_OSH2 (0x1 << 2) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 2 */ -#define PWM_OS_OSH3 (0x1 << 3) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 3 */ -#define PWM_OS_OSL0 (0x1 << 16) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 0 */ -#define PWM_OS_OSL1 (0x1 << 17) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 1 */ -#define PWM_OS_OSL2 (0x1 << 18) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 2 */ -#define PWM_OS_OSL3 (0x1 << 19) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 3 */ -/* -------- PWM_OSS : (PWM Offset: 0x4C) PWM Output Selection Set Register -------- */ -#define PWM_OSS_OSSH0 (0x1 << 0) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 0 */ -#define PWM_OSS_OSSH1 (0x1 << 1) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 1 */ -#define PWM_OSS_OSSH2 (0x1 << 2) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 2 */ -#define PWM_OSS_OSSH3 (0x1 << 3) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 3 */ -#define PWM_OSS_OSSL0 (0x1 << 16) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 0 */ -#define PWM_OSS_OSSL1 (0x1 << 17) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 1 */ -#define PWM_OSS_OSSL2 (0x1 << 18) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 2 */ -#define PWM_OSS_OSSL3 (0x1 << 19) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 3 */ -/* -------- PWM_OSC : (PWM Offset: 0x50) PWM Output Selection Clear Register -------- */ -#define PWM_OSC_OSCH0 (0x1 << 0) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 0 */ -#define PWM_OSC_OSCH1 (0x1 << 1) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 1 */ -#define PWM_OSC_OSCH2 (0x1 << 2) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 2 */ -#define PWM_OSC_OSCH3 (0x1 << 3) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 3 */ -#define PWM_OSC_OSCL0 (0x1 << 16) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 0 */ -#define PWM_OSC_OSCL1 (0x1 << 17) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 1 */ -#define PWM_OSC_OSCL2 (0x1 << 18) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 2 */ -#define PWM_OSC_OSCL3 (0x1 << 19) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 3 */ -/* -------- PWM_OSSUPD : (PWM Offset: 0x54) PWM Output Selection Set Update Register -------- */ -#define PWM_OSSUPD_OSSUPH0 (0x1 << 0) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 0 */ -#define PWM_OSSUPD_OSSUPH1 (0x1 << 1) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 1 */ -#define PWM_OSSUPD_OSSUPH2 (0x1 << 2) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 2 */ -#define PWM_OSSUPD_OSSUPH3 (0x1 << 3) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 3 */ -#define PWM_OSSUPD_OSSUPL0 (0x1 << 16) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 0 */ -#define PWM_OSSUPD_OSSUPL1 (0x1 << 17) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 1 */ -#define PWM_OSSUPD_OSSUPL2 (0x1 << 18) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 2 */ -#define PWM_OSSUPD_OSSUPL3 (0x1 << 19) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 3 */ -/* -------- PWM_OSCUPD : (PWM Offset: 0x58) PWM Output Selection Clear Update Register -------- */ -#define PWM_OSCUPD_OSCUPH0 (0x1 << 0) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 0 */ -#define PWM_OSCUPD_OSCUPH1 (0x1 << 1) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 1 */ -#define PWM_OSCUPD_OSCUPH2 (0x1 << 2) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 2 */ -#define PWM_OSCUPD_OSCUPH3 (0x1 << 3) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 3 */ -#define PWM_OSCUPD_OSCUPL0 (0x1 << 16) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 0 */ -#define PWM_OSCUPD_OSCUPL1 (0x1 << 17) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 1 */ -#define PWM_OSCUPD_OSCUPL2 (0x1 << 18) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 2 */ -#define PWM_OSCUPD_OSCUPL3 (0x1 << 19) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 3 */ -/* -------- PWM_FMR : (PWM Offset: 0x5C) PWM Fault Mode Register -------- */ -#define PWM_FMR_FPOL0 (0x1 << 0) /**< \brief (PWM_FMR) Fault 0 Polarity */ -#define PWM_FMR_FPOL1 (0x1 << 1) /**< \brief (PWM_FMR) Fault 1 Polarity */ -#define PWM_FMR_FPOL2 (0x1 << 2) /**< \brief (PWM_FMR) Fault 2 Polarity */ -#define PWM_FMR_FPOL3 (0x1 << 3) /**< \brief (PWM_FMR) Fault 3 Polarity */ -#define PWM_FMR_FMOD0 (0x1 << 8) /**< \brief (PWM_FMR) Fault 0 Activation Mode */ -#define PWM_FMR_FMOD1 (0x1 << 9) /**< \brief (PWM_FMR) Fault 1 Activation Mode */ -#define PWM_FMR_FMOD2 (0x1 << 10) /**< \brief (PWM_FMR) Fault 2 Activation Mode */ -#define PWM_FMR_FMOD3 (0x1 << 11) /**< \brief (PWM_FMR) Fault 3 Activation Mode */ -#define PWM_FMR_FFIL0 (0x1 << 16) /**< \brief (PWM_FMR) Fault 0 Filtering */ -#define PWM_FMR_FFIL1 (0x1 << 17) /**< \brief (PWM_FMR) Fault 1 Filtering */ -#define PWM_FMR_FFIL2 (0x1 << 18) /**< \brief (PWM_FMR) Fault 2 Filtering */ -#define PWM_FMR_FFIL3 (0x1 << 19) /**< \brief (PWM_FMR) Fault 3 Filtering */ -/* -------- PWM_FSR : (PWM Offset: 0x60) PWM Fault Status Register -------- */ -#define PWM_FSR_FIV0 (0x1 << 0) /**< \brief (PWM_FSR) Fault Input 0 Value */ -#define PWM_FSR_FIV1 (0x1 << 1) /**< \brief (PWM_FSR) Fault Input 1 Value */ -#define PWM_FSR_FIV2 (0x1 << 2) /**< \brief (PWM_FSR) Fault Input 2 Value */ -#define PWM_FSR_FIV3 (0x1 << 3) /**< \brief (PWM_FSR) Fault Input 3 Value */ -#define PWM_FSR_FS0 (0x1 << 8) /**< \brief (PWM_FSR) Fault 0 Status */ -#define PWM_FSR_FS1 (0x1 << 9) /**< \brief (PWM_FSR) Fault 1 Status */ -#define PWM_FSR_FS2 (0x1 << 10) /**< \brief (PWM_FSR) Fault 2 Status */ -#define PWM_FSR_FS3 (0x1 << 11) /**< \brief (PWM_FSR) Fault 3 Status */ -/* -------- PWM_FCR : (PWM Offset: 0x64) PWM Fault Clear Register -------- */ -#define PWM_FCR_FCLR0 (0x1 << 0) /**< \brief (PWM_FCR) Fault 0 Clear */ -#define PWM_FCR_FCLR1 (0x1 << 1) /**< \brief (PWM_FCR) Fault 1 Clear */ -#define PWM_FCR_FCLR2 (0x1 << 2) /**< \brief (PWM_FCR) Fault 2 Clear */ -#define PWM_FCR_FCLR3 (0x1 << 3) /**< \brief (PWM_FCR) Fault 3 Clear */ -/* -------- PWM_FPV : (PWM Offset: 0x68) PWM Fault Protection Value Register -------- */ -#define PWM_FPV_FPVH0 (0x1 << 0) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 0 */ -#define PWM_FPV_FPVH1 (0x1 << 1) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 1 */ -#define PWM_FPV_FPVH2 (0x1 << 2) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 2 */ -#define PWM_FPV_FPVH3 (0x1 << 3) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 3 */ -#define PWM_FPV_FPVL0 (0x1 << 16) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 0 */ -#define PWM_FPV_FPVL1 (0x1 << 17) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 1 */ -#define PWM_FPV_FPVL2 (0x1 << 18) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 2 */ -#define PWM_FPV_FPVL3 (0x1 << 19) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 3 */ -/* -------- PWM_FPE : (PWM Offset: 0x6C) PWM Fault Protection Enable Register -------- */ -#define PWM_FPE_FPE0 (0xff << 0) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 0 for channel x */ -#define PWM_FPE_FPE1 (0xff << 8) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 1 for channel x */ -#define PWM_FPE_FPE2 (0xff << 16) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 2 for channel x */ -#define PWM_FPE_FPE3 (0xff << 24) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 3 for channel x */ -/* -------- PWM_ELxMR[2] : (PWM Offset: 0x7C) PWM Event Line 0 Mode Register -------- */ -#define PWM_ELxMR_CSEL0 (0x1 << 0) /**< \brief (PWM_ELxMR[2]) Comparison 0 Selection */ -#define PWM_ELxMR_CSEL1 (0x1 << 1) /**< \brief (PWM_ELxMR[2]) Comparison 1 Selection */ -#define PWM_ELxMR_CSEL2 (0x1 << 2) /**< \brief (PWM_ELxMR[2]) Comparison 2 Selection */ -#define PWM_ELxMR_CSEL3 (0x1 << 3) /**< \brief (PWM_ELxMR[2]) Comparison 3 Selection */ -#define PWM_ELxMR_CSEL4 (0x1 << 4) /**< \brief (PWM_ELxMR[2]) Comparison 4 Selection */ -#define PWM_ELxMR_CSEL5 (0x1 << 5) /**< \brief (PWM_ELxMR[2]) Comparison 5 Selection */ -#define PWM_ELxMR_CSEL6 (0x1 << 6) /**< \brief (PWM_ELxMR[2]) Comparison 6 Selection */ -#define PWM_ELxMR_CSEL7 (0x1 << 7) /**< \brief (PWM_ELxMR[2]) Comparison 7 Selection */ -/* -------- PWM_SMMR : (PWM Offset: 0xB0) PWM Stepper Motor Mode Register -------- */ -#define PWM_SMMR_GCEN0 (0x1 << 0) /**< \brief (PWM_SMMR) Gray Count ENable */ -#define PWM_SMMR_GCEN1 (0x1 << 1) /**< \brief (PWM_SMMR) Gray Count ENable */ -#define PWM_SMMR_DOWN0 (0x1 << 16) /**< \brief (PWM_SMMR) DOWN Count */ -#define PWM_SMMR_DOWN1 (0x1 << 17) /**< \brief (PWM_SMMR) DOWN Count */ -/* -------- PWM_WPCR : (PWM Offset: 0xE4) PWM Write Protect Control Register -------- */ -#define PWM_WPCR_WPCMD (0x3 << 0) /**< \brief (PWM_WPCR) Write Protect Command */ -#define PWM_WPCR_WPRG0 (0x1 << 2) /**< \brief (PWM_WPCR) Write Protect Register Group 0 */ -#define PWM_WPCR_WPRG1 (0x1 << 3) /**< \brief (PWM_WPCR) Write Protect Register Group 1 */ -#define PWM_WPCR_WPRG2 (0x1 << 4) /**< \brief (PWM_WPCR) Write Protect Register Group 2 */ -#define PWM_WPCR_WPRG3 (0x1 << 5) /**< \brief (PWM_WPCR) Write Protect Register Group 3 */ -#define PWM_WPCR_WPRG4 (0x1 << 6) /**< \brief (PWM_WPCR) Write Protect Register Group 4 */ -#define PWM_WPCR_WPRG5 (0x1 << 7) /**< \brief (PWM_WPCR) Write Protect Register Group 5 */ -#define PWM_WPCR_WPKEY (0xffffff << 8) /**< \brief (PWM_WPCR) Write Protect Key */ -/* -------- PWM_WPSR : (PWM Offset: 0xE8) PWM Write Protect Status Register -------- */ -#define PWM_WPSR_WPSWS0 (0x1 << 0) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS1 (0x1 << 1) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS2 (0x1 << 2) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS3 (0x1 << 3) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS4 (0x1 << 4) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS5 (0x1 << 5) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPVS (0x1 << 7) /**< \brief (PWM_WPSR) Write Protect Violation Status */ -#define PWM_WPSR_WPHWS0 (0x1 << 8) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS1 (0x1 << 9) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS2 (0x1 << 10) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS3 (0x1 << 11) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS4 (0x1 << 12) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS5 (0x1 << 13) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPVSRC (0xffff << 16) /**< \brief (PWM_WPSR) Write Protect Violation Source */ -/* -------- PWM_RPR : (PWM Offset: 0x100) Receive Pointer Register -------- */ -#define PWM_RPR_RXPTR (0xffffffff << 0) /**< \brief (PWM_RPR) Receive Pointer Register */ -/* -------- PWM_RCR : (PWM Offset: 0x104) Receive Counter Register -------- */ -#define PWM_RCR_RXCTR (0xffff << 0) /**< \brief (PWM_RCR) Receive Counter Register */ -/* -------- PWM_TPR : (PWM Offset: 0x108) Transmit Pointer Register -------- */ -#define PWM_TPR_TXPTR (0xffffffff << 0) /**< \brief (PWM_TPR) Transmit Counter Register */ -/* -------- PWM_TCR : (PWM Offset: 0x10C) Transmit Counter Register -------- */ -#define PWM_TCR_TXCTR (0xffff << 0) /**< \brief (PWM_TCR) Transmit Counter Register */ -/* -------- PWM_RNPR : (PWM Offset: 0x110) Receive Next Pointer Register -------- */ -#define PWM_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (PWM_RNPR) Receive Next Pointer */ -/* -------- PWM_RNCR : (PWM Offset: 0x114) Receive Next Counter Register -------- */ -#define PWM_RNCR_RXNCTR (0xffff << 0) /**< \brief (PWM_RNCR) Receive Next Counter */ -/* -------- PWM_TNPR : (PWM Offset: 0x118) Transmit Next Pointer Register -------- */ -#define PWM_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (PWM_TNPR) Transmit Next Pointer */ -/* -------- PWM_TNCR : (PWM Offset: 0x11C) Transmit Next Counter Register -------- */ -#define PWM_TNCR_TXNCTR (0xffff << 0) /**< \brief (PWM_TNCR) Transmit Counter Next */ -/* -------- PWM_PTCR : (PWM Offset: 0x120) Transfer Control Register -------- */ -#define PWM_PTCR_RXTEN (0x1 << 0) /**< \brief (PWM_PTCR) Receiver Transfer Enable */ -#define PWM_PTCR_RXTDIS (0x1 << 1) /**< \brief (PWM_PTCR) Receiver Transfer Disable */ -#define PWM_PTCR_TXTEN (0x1 << 8) /**< \brief (PWM_PTCR) Transmitter Transfer Enable */ -#define PWM_PTCR_TXTDIS (0x1 << 9) /**< \brief (PWM_PTCR) Transmitter Transfer Disable */ -/* -------- PWM_PTSR : (PWM Offset: 0x124) Transfer Status Register -------- */ -#define PWM_PTSR_RXTEN (0x1 << 0) /**< \brief (PWM_PTSR) Receiver Transfer Enable */ -#define PWM_PTSR_TXTEN (0x1 << 8) /**< \brief (PWM_PTSR) Transmitter Transfer Enable */ -/* -------- PWM_CMP0V : (PWM Offset: 0x130) PWM Comparison 0 Value Register -------- */ -#define PWM_CMP0V_CV (0xffffff << 0) /**< \brief (PWM_CMP0V) Comparison x Value */ -#define PWM_CMP0V_CVM (0x1 << 24) /**< \brief (PWM_CMP0V) Comparison x Value Mode */ -/* -------- PWM_CMP0VUPD : (PWM Offset: 0x134) PWM Comparison 0 Value Update Register -------- */ -#define PWM_CMP0VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP0VUPD) Comparison x Value Update */ -#define PWM_CMP0VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP0VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP0M : (PWM Offset: 0x138) PWM Comparison 0 Mode Register -------- */ -#define PWM_CMP0M_CEN (0x1 << 0) /**< \brief (PWM_CMP0M) Comparison x Enable */ -#define PWM_CMP0M_CTR (0xf << 4) /**< \brief (PWM_CMP0M) Comparison x Trigger */ -#define PWM_CMP0M_CPR (0xf << 8) /**< \brief (PWM_CMP0M) Comparison x Period */ -#define PWM_CMP0M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP0M) Comparison x Period Counter */ -#define PWM_CMP0M_CUPR (0xf << 16) /**< \brief (PWM_CMP0M) Comparison x Update Period */ -#define PWM_CMP0M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP0M) Comparison x Update Period Counter */ -/* -------- PWM_CMP0MUPD : (PWM Offset: 0x13C) PWM Comparison 0 Mode Update Register -------- */ -#define PWM_CMP0MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP0MUPD) Comparison x Enable Update */ -#define PWM_CMP0MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP0MUPD) Comparison x Trigger Update */ -#define PWM_CMP0MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP0MUPD) Comparison x Period Update */ -#define PWM_CMP0MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP0MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP1V : (PWM Offset: 0x140) PWM Comparison 1 Value Register -------- */ -#define PWM_CMP1V_CV (0xffffff << 0) /**< \brief (PWM_CMP1V) Comparison x Value */ -#define PWM_CMP1V_CVM (0x1 << 24) /**< \brief (PWM_CMP1V) Comparison x Value Mode */ -/* -------- PWM_CMP1VUPD : (PWM Offset: 0x144) PWM Comparison 1 Value Update Register -------- */ -#define PWM_CMP1VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP1VUPD) Comparison x Value Update */ -#define PWM_CMP1VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP1VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP1M : (PWM Offset: 0x148) PWM Comparison 1 Mode Register -------- */ -#define PWM_CMP1M_CEN (0x1 << 0) /**< \brief (PWM_CMP1M) Comparison x Enable */ -#define PWM_CMP1M_CTR (0xf << 4) /**< \brief (PWM_CMP1M) Comparison x Trigger */ -#define PWM_CMP1M_CPR (0xf << 8) /**< \brief (PWM_CMP1M) Comparison x Period */ -#define PWM_CMP1M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP1M) Comparison x Period Counter */ -#define PWM_CMP1M_CUPR (0xf << 16) /**< \brief (PWM_CMP1M) Comparison x Update Period */ -#define PWM_CMP1M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP1M) Comparison x Update Period Counter */ -/* -------- PWM_CMP1MUPD : (PWM Offset: 0x14C) PWM Comparison 1 Mode Update Register -------- */ -#define PWM_CMP1MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP1MUPD) Comparison x Enable Update */ -#define PWM_CMP1MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP1MUPD) Comparison x Trigger Update */ -#define PWM_CMP1MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP1MUPD) Comparison x Period Update */ -#define PWM_CMP1MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP1MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP2V : (PWM Offset: 0x150) PWM Comparison 2 Value Register -------- */ -#define PWM_CMP2V_CV (0xffffff << 0) /**< \brief (PWM_CMP2V) Comparison x Value */ -#define PWM_CMP2V_CVM (0x1 << 24) /**< \brief (PWM_CMP2V) Comparison x Value Mode */ -/* -------- PWM_CMP2VUPD : (PWM Offset: 0x154) PWM Comparison 2 Value Update Register -------- */ -#define PWM_CMP2VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP2VUPD) Comparison x Value Update */ -#define PWM_CMP2VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP2VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP2M : (PWM Offset: 0x158) PWM Comparison 2 Mode Register -------- */ -#define PWM_CMP2M_CEN (0x1 << 0) /**< \brief (PWM_CMP2M) Comparison x Enable */ -#define PWM_CMP2M_CTR (0xf << 4) /**< \brief (PWM_CMP2M) Comparison x Trigger */ -#define PWM_CMP2M_CPR (0xf << 8) /**< \brief (PWM_CMP2M) Comparison x Period */ -#define PWM_CMP2M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP2M) Comparison x Period Counter */ -#define PWM_CMP2M_CUPR (0xf << 16) /**< \brief (PWM_CMP2M) Comparison x Update Period */ -#define PWM_CMP2M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP2M) Comparison x Update Period Counter */ -/* -------- PWM_CMP2MUPD : (PWM Offset: 0x15C) PWM Comparison 2 Mode Update Register -------- */ -#define PWM_CMP2MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP2MUPD) Comparison x Enable Update */ -#define PWM_CMP2MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP2MUPD) Comparison x Trigger Update */ -#define PWM_CMP2MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP2MUPD) Comparison x Period Update */ -#define PWM_CMP2MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP2MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP3V : (PWM Offset: 0x160) PWM Comparison 3 Value Register -------- */ -#define PWM_CMP3V_CV (0xffffff << 0) /**< \brief (PWM_CMP3V) Comparison x Value */ -#define PWM_CMP3V_CVM (0x1 << 24) /**< \brief (PWM_CMP3V) Comparison x Value Mode */ -/* -------- PWM_CMP3VUPD : (PWM Offset: 0x164) PWM Comparison 3 Value Update Register -------- */ -#define PWM_CMP3VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP3VUPD) Comparison x Value Update */ -#define PWM_CMP3VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP3VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP3M : (PWM Offset: 0x168) PWM Comparison 3 Mode Register -------- */ -#define PWM_CMP3M_CEN (0x1 << 0) /**< \brief (PWM_CMP3M) Comparison x Enable */ -#define PWM_CMP3M_CTR (0xf << 4) /**< \brief (PWM_CMP3M) Comparison x Trigger */ -#define PWM_CMP3M_CPR (0xf << 8) /**< \brief (PWM_CMP3M) Comparison x Period */ -#define PWM_CMP3M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP3M) Comparison x Period Counter */ -#define PWM_CMP3M_CUPR (0xf << 16) /**< \brief (PWM_CMP3M) Comparison x Update Period */ -#define PWM_CMP3M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP3M) Comparison x Update Period Counter */ -/* -------- PWM_CMP3MUPD : (PWM Offset: 0x16C) PWM Comparison 3 Mode Update Register -------- */ -#define PWM_CMP3MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP3MUPD) Comparison x Enable Update */ -#define PWM_CMP3MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP3MUPD) Comparison x Trigger Update */ -#define PWM_CMP3MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP3MUPD) Comparison x Period Update */ -#define PWM_CMP3MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP3MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP4V : (PWM Offset: 0x170) PWM Comparison 4 Value Register -------- */ -#define PWM_CMP4V_CV (0xffffff << 0) /**< \brief (PWM_CMP4V) Comparison x Value */ -#define PWM_CMP4V_CVM (0x1 << 24) /**< \brief (PWM_CMP4V) Comparison x Value Mode */ -/* -------- PWM_CMP4VUPD : (PWM Offset: 0x174) PWM Comparison 4 Value Update Register -------- */ -#define PWM_CMP4VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP4VUPD) Comparison x Value Update */ -#define PWM_CMP4VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP4VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP4M : (PWM Offset: 0x178) PWM Comparison 4 Mode Register -------- */ -#define PWM_CMP4M_CEN (0x1 << 0) /**< \brief (PWM_CMP4M) Comparison x Enable */ -#define PWM_CMP4M_CTR (0xf << 4) /**< \brief (PWM_CMP4M) Comparison x Trigger */ -#define PWM_CMP4M_CPR (0xf << 8) /**< \brief (PWM_CMP4M) Comparison x Period */ -#define PWM_CMP4M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP4M) Comparison x Period Counter */ -#define PWM_CMP4M_CUPR (0xf << 16) /**< \brief (PWM_CMP4M) Comparison x Update Period */ -#define PWM_CMP4M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP4M) Comparison x Update Period Counter */ -/* -------- PWM_CMP4MUPD : (PWM Offset: 0x17C) PWM Comparison 4 Mode Update Register -------- */ -#define PWM_CMP4MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP4MUPD) Comparison x Enable Update */ -#define PWM_CMP4MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP4MUPD) Comparison x Trigger Update */ -#define PWM_CMP4MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP4MUPD) Comparison x Period Update */ -#define PWM_CMP4MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP4MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP5V : (PWM Offset: 0x180) PWM Comparison 5 Value Register -------- */ -#define PWM_CMP5V_CV (0xffffff << 0) /**< \brief (PWM_CMP5V) Comparison x Value */ -#define PWM_CMP5V_CVM (0x1 << 24) /**< \brief (PWM_CMP5V) Comparison x Value Mode */ -/* -------- PWM_CMP5VUPD : (PWM Offset: 0x184) PWM Comparison 5 Value Update Register -------- */ -#define PWM_CMP5VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP5VUPD) Comparison x Value Update */ -#define PWM_CMP5VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP5VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP5M : (PWM Offset: 0x188) PWM Comparison 5 Mode Register -------- */ -#define PWM_CMP5M_CEN (0x1 << 0) /**< \brief (PWM_CMP5M) Comparison x Enable */ -#define PWM_CMP5M_CTR (0xf << 4) /**< \brief (PWM_CMP5M) Comparison x Trigger */ -#define PWM_CMP5M_CPR (0xf << 8) /**< \brief (PWM_CMP5M) Comparison x Period */ -#define PWM_CMP5M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP5M) Comparison x Period Counter */ -#define PWM_CMP5M_CUPR (0xf << 16) /**< \brief (PWM_CMP5M) Comparison x Update Period */ -#define PWM_CMP5M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP5M) Comparison x Update Period Counter */ -/* -------- PWM_CMP5MUPD : (PWM Offset: 0x18C) PWM Comparison 5 Mode Update Register -------- */ -#define PWM_CMP5MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP5MUPD) Comparison x Enable Update */ -#define PWM_CMP5MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP5MUPD) Comparison x Trigger Update */ -#define PWM_CMP5MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP5MUPD) Comparison x Period Update */ -#define PWM_CMP5MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP5MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP6V : (PWM Offset: 0x190) PWM Comparison 6 Value Register -------- */ -#define PWM_CMP6V_CV (0xffffff << 0) /**< \brief (PWM_CMP6V) Comparison x Value */ -#define PWM_CMP6V_CVM (0x1 << 24) /**< \brief (PWM_CMP6V) Comparison x Value Mode */ -/* -------- PWM_CMP6VUPD : (PWM Offset: 0x194) PWM Comparison 6 Value Update Register -------- */ -#define PWM_CMP6VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP6VUPD) Comparison x Value Update */ -#define PWM_CMP6VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP6VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP6M : (PWM Offset: 0x198) PWM Comparison 6 Mode Register -------- */ -#define PWM_CMP6M_CEN (0x1 << 0) /**< \brief (PWM_CMP6M) Comparison x Enable */ -#define PWM_CMP6M_CTR (0xf << 4) /**< \brief (PWM_CMP6M) Comparison x Trigger */ -#define PWM_CMP6M_CPR (0xf << 8) /**< \brief (PWM_CMP6M) Comparison x Period */ -#define PWM_CMP6M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP6M) Comparison x Period Counter */ -#define PWM_CMP6M_CUPR (0xf << 16) /**< \brief (PWM_CMP6M) Comparison x Update Period */ -#define PWM_CMP6M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP6M) Comparison x Update Period Counter */ -/* -------- PWM_CMP6MUPD : (PWM Offset: 0x19C) PWM Comparison 6 Mode Update Register -------- */ -#define PWM_CMP6MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP6MUPD) Comparison x Enable Update */ -#define PWM_CMP6MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP6MUPD) Comparison x Trigger Update */ -#define PWM_CMP6MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP6MUPD) Comparison x Period Update */ -#define PWM_CMP6MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP6MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP7V : (PWM Offset: 0x1A0) PWM Comparison 7 Value Register -------- */ -#define PWM_CMP7V_CV (0xffffff << 0) /**< \brief (PWM_CMP7V) Comparison x Value */ -#define PWM_CMP7V_CVM (0x1 << 24) /**< \brief (PWM_CMP7V) Comparison x Value Mode */ -/* -------- PWM_CMP7VUPD : (PWM Offset: 0x1A4) PWM Comparison 7 Value Update Register -------- */ -#define PWM_CMP7VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP7VUPD) Comparison x Value Update */ -#define PWM_CMP7VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP7VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP7M : (PWM Offset: 0x1A8) PWM Comparison 7 Mode Register -------- */ -#define PWM_CMP7M_CEN (0x1 << 0) /**< \brief (PWM_CMP7M) Comparison x Enable */ -#define PWM_CMP7M_CTR (0xf << 4) /**< \brief (PWM_CMP7M) Comparison x Trigger */ -#define PWM_CMP7M_CPR (0xf << 8) /**< \brief (PWM_CMP7M) Comparison x Period */ -#define PWM_CMP7M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP7M) Comparison x Period Counter */ -#define PWM_CMP7M_CUPR (0xf << 16) /**< \brief (PWM_CMP7M) Comparison x Update Period */ -#define PWM_CMP7M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP7M) Comparison x Update Period Counter */ -/* -------- PWM_CMP7MUPD : (PWM Offset: 0x1AC) PWM Comparison 7 Mode Update Register -------- */ -#define PWM_CMP7MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP7MUPD) Comparison x Enable Update */ -#define PWM_CMP7MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP7MUPD) Comparison x Trigger Update */ -#define PWM_CMP7MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP7MUPD) Comparison x Period Update */ -#define PWM_CMP7MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP7MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMR0 : (PWM Offset: 0x200) PWM Channel Mode Register (ch_num = 0) -------- */ -#define PWM_CMR0_CPRE (0xf << 0) /**< \brief (PWM_CMR0) Channel Pre-scaler */ -#define PWM_CMR0_CALG (0x1 << 8) /**< \brief (PWM_CMR0) Channel Alignment */ -#define PWM_CMR0_CPOL (0x1 << 9) /**< \brief (PWM_CMR0) Channel Polarity */ -#define PWM_CMR0_CES (0x1 << 10) /**< \brief (PWM_CMR0) Counter Event Selection */ -#define PWM_CMR0_DTE (0x1 << 16) /**< \brief (PWM_CMR0) Dead-Time Generator Enable */ -#define PWM_CMR0_DTHI (0x1 << 17) /**< \brief (PWM_CMR0) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR0_DTLI (0x1 << 18) /**< \brief (PWM_CMR0) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY0 : (PWM Offset: 0x204) PWM Channel Duty Cycle Register (ch_num = 0) -------- */ -#define PWM_CDTY0_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY0) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD0 : (PWM Offset: 0x208) PWM Channel Duty Cycle Update Register (ch_num = 0) -------- */ -#define PWM_CDTYUPD0_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD0) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD0 : (PWM Offset: 0x20C) PWM Channel Period Register (ch_num = 0) -------- */ -#define PWM_CPRD0_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD0) Channel Period */ -/* -------- PWM_CPRDUPD0 : (PWM Offset: 0x210) PWM Channel Period Update Register (ch_num = 0) -------- */ -#define PWM_CPRDUPD0_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD0) Channel Period Update */ -/* -------- PWM_CCNT0 : (PWM Offset: 0x214) PWM Channel Counter Register (ch_num = 0) -------- */ -#define PWM_CCNT0_CNT (0xffffff << 0) /**< \brief (PWM_CCNT0) Channel Counter Register */ -/* -------- PWM_DT0 : (PWM Offset: 0x218) PWM Channel Dead Time Register (ch_num = 0) -------- */ -#define PWM_DT0_DTH (0xffff << 0) /**< \brief (PWM_DT0) Dead-Time Value for PWMHx Output */ -#define PWM_DT0_DTL (0xffff << 16) /**< \brief (PWM_DT0) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD0 : (PWM Offset: 0x21C) PWM Channel Dead Time Update Register (ch_num = 0) -------- */ -#define PWM_DTUPD0_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD0) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD0_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD0) Dead-Time Value Update for PWMLx Output */ -/* -------- PWM_CMR1 : (PWM Offset: 0x220) PWM Channel Mode Register (ch_num = 1) -------- */ -#define PWM_CMR1_CPRE (0xf << 0) /**< \brief (PWM_CMR1) Channel Pre-scaler */ -#define PWM_CMR1_CALG (0x1 << 8) /**< \brief (PWM_CMR1) Channel Alignment */ -#define PWM_CMR1_CPOL (0x1 << 9) /**< \brief (PWM_CMR1) Channel Polarity */ -#define PWM_CMR1_CES (0x1 << 10) /**< \brief (PWM_CMR1) Counter Event Selection */ -#define PWM_CMR1_DTE (0x1 << 16) /**< \brief (PWM_CMR1) Dead-Time Generator Enable */ -#define PWM_CMR1_DTHI (0x1 << 17) /**< \brief (PWM_CMR1) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR1_DTLI (0x1 << 18) /**< \brief (PWM_CMR1) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY1 : (PWM Offset: 0x224) PWM Channel Duty Cycle Register (ch_num = 1) -------- */ -#define PWM_CDTY1_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY1) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD1 : (PWM Offset: 0x228) PWM Channel Duty Cycle Update Register (ch_num = 1) -------- */ -#define PWM_CDTYUPD1_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD1) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD1 : (PWM Offset: 0x22C) PWM Channel Period Register (ch_num = 1) -------- */ -#define PWM_CPRD1_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD1) Channel Period */ -/* -------- PWM_CPRDUPD1 : (PWM Offset: 0x230) PWM Channel Period Update Register (ch_num = 1) -------- */ -#define PWM_CPRDUPD1_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD1) Channel Period Update */ -/* -------- PWM_CCNT1 : (PWM Offset: 0x234) PWM Channel Counter Register (ch_num = 1) -------- */ -#define PWM_CCNT1_CNT (0xffffff << 0) /**< \brief (PWM_CCNT1) Channel Counter Register */ -/* -------- PWM_DT1 : (PWM Offset: 0x238) PWM Channel Dead Time Register (ch_num = 1) -------- */ -#define PWM_DT1_DTH (0xffff << 0) /**< \brief (PWM_DT1) Dead-Time Value for PWMHx Output */ -#define PWM_DT1_DTL (0xffff << 16) /**< \brief (PWM_DT1) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD1 : (PWM Offset: 0x23C) PWM Channel Dead Time Update Register (ch_num = 1) -------- */ -#define PWM_DTUPD1_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD1) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD1_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD1) Dead-Time Value Update for PWMLx Output */ -/* -------- PWM_CMR2 : (PWM Offset: 0x240) PWM Channel Mode Register (ch_num = 2) -------- */ -#define PWM_CMR2_CPRE (0xf << 0) /**< \brief (PWM_CMR2) Channel Pre-scaler */ -#define PWM_CMR2_CALG (0x1 << 8) /**< \brief (PWM_CMR2) Channel Alignment */ -#define PWM_CMR2_CPOL (0x1 << 9) /**< \brief (PWM_CMR2) Channel Polarity */ -#define PWM_CMR2_CES (0x1 << 10) /**< \brief (PWM_CMR2) Counter Event Selection */ -#define PWM_CMR2_DTE (0x1 << 16) /**< \brief (PWM_CMR2) Dead-Time Generator Enable */ -#define PWM_CMR2_DTHI (0x1 << 17) /**< \brief (PWM_CMR2) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR2_DTLI (0x1 << 18) /**< \brief (PWM_CMR2) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY2 : (PWM Offset: 0x244) PWM Channel Duty Cycle Register (ch_num = 2) -------- */ -#define PWM_CDTY2_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY2) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD2 : (PWM Offset: 0x248) PWM Channel Duty Cycle Update Register (ch_num = 2) -------- */ -#define PWM_CDTYUPD2_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD2) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD2 : (PWM Offset: 0x24C) PWM Channel Period Register (ch_num = 2) -------- */ -#define PWM_CPRD2_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD2) Channel Period */ -/* -------- PWM_CPRDUPD2 : (PWM Offset: 0x250) PWM Channel Period Update Register (ch_num = 2) -------- */ -#define PWM_CPRDUPD2_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD2) Channel Period Update */ -/* -------- PWM_CCNT2 : (PWM Offset: 0x254) PWM Channel Counter Register (ch_num = 2) -------- */ -#define PWM_CCNT2_CNT (0xffffff << 0) /**< \brief (PWM_CCNT2) Channel Counter Register */ -/* -------- PWM_DT2 : (PWM Offset: 0x258) PWM Channel Dead Time Register (ch_num = 2) -------- */ -#define PWM_DT2_DTH (0xffff << 0) /**< \brief (PWM_DT2) Dead-Time Value for PWMHx Output */ -#define PWM_DT2_DTL (0xffff << 16) /**< \brief (PWM_DT2) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD2 : (PWM Offset: 0x25C) PWM Channel Dead Time Update Register (ch_num = 2) -------- */ -#define PWM_DTUPD2_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD2) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD2_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD2) Dead-Time Value Update for PWMLx Output */ -/* -------- PWM_CMR3 : (PWM Offset: 0x260) PWM Channel Mode Register (ch_num = 3) -------- */ -#define PWM_CMR3_CPRE (0xf << 0) /**< \brief (PWM_CMR3) Channel Pre-scaler */ -#define PWM_CMR3_CALG (0x1 << 8) /**< \brief (PWM_CMR3) Channel Alignment */ -#define PWM_CMR3_CPOL (0x1 << 9) /**< \brief (PWM_CMR3) Channel Polarity */ -#define PWM_CMR3_CES (0x1 << 10) /**< \brief (PWM_CMR3) Counter Event Selection */ -#define PWM_CMR3_DTE (0x1 << 16) /**< \brief (PWM_CMR3) Dead-Time Generator Enable */ -#define PWM_CMR3_DTHI (0x1 << 17) /**< \brief (PWM_CMR3) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR3_DTLI (0x1 << 18) /**< \brief (PWM_CMR3) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY3 : (PWM Offset: 0x264) PWM Channel Duty Cycle Register (ch_num = 3) -------- */ -#define PWM_CDTY3_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY3) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD3 : (PWM Offset: 0x268) PWM Channel Duty Cycle Update Register (ch_num = 3) -------- */ -#define PWM_CDTYUPD3_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD3) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD3 : (PWM Offset: 0x26C) PWM Channel Period Register (ch_num = 3) -------- */ -#define PWM_CPRD3_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD3) Channel Period */ -/* -------- PWM_CPRDUPD3 : (PWM Offset: 0x270) PWM Channel Period Update Register (ch_num = 3) -------- */ -#define PWM_CPRDUPD3_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD3) Channel Period Update */ -/* -------- PWM_CCNT3 : (PWM Offset: 0x274) PWM Channel Counter Register (ch_num = 3) -------- */ -#define PWM_CCNT3_CNT (0xffffff << 0) /**< \brief (PWM_CCNT3) Channel Counter Register */ -/* -------- PWM_DT3 : (PWM Offset: 0x278) PWM Channel Dead Time Register (ch_num = 3) -------- */ -#define PWM_DT3_DTH (0xffff << 0) /**< \brief (PWM_DT3) Dead-Time Value for PWMHx Output */ -#define PWM_DT3_DTL (0xffff << 16) /**< \brief (PWM_DT3) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD3 : (PWM Offset: 0x27C) PWM Channel Dead Time Update Register (ch_num = 3) -------- */ -#define PWM_DTUPD3_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD3) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD3_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD3) Dead-Time Value Update for PWMLx Output */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Reset Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_RSTC Reset Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rstc hardware registers */ -typedef struct { - WoReg RSTC_CR; /**< \brief (Rstc Offset: 0x00) Control Register */ - RoReg RSTC_SR; /**< \brief (Rstc Offset: 0x04) Status Register */ - RwReg RSTC_MR; /**< \brief (Rstc Offset: 0x08) Mode Register */ -} Rstc; -#endif /* __ASSEMBLY__ */ -/* -------- RSTC_CR : (RSTC Offset: 0x00) Control Register -------- */ -#define RSTC_CR_PROCRST (0x1 << 0) /**< \brief (RSTC_CR) Processor Reset */ -#define RSTC_CR_PERRST (0x1 << 2) /**< \brief (RSTC_CR) Peripheral Reset */ -#define RSTC_CR_EXTRST (0x1 << 3) /**< \brief (RSTC_CR) External Reset */ -#define RSTC_CR_KEY (0xff << 24) /**< \brief (RSTC_CR) Password */ -/* -------- RSTC_SR : (RSTC Offset: 0x04) Status Register -------- */ -#define RSTC_SR_URSTS (0x1 << 0) /**< \brief (RSTC_SR) User Reset Status */ -#define RSTC_SR_RSTTYP (0x7 << 8) /**< \brief (RSTC_SR) Reset Type */ -#define RSTC_SR_NRSTL (0x1 << 16) /**< \brief (RSTC_SR) NRST Pin Level */ -#define RSTC_SR_SRCMP (0x1 << 17) /**< \brief (RSTC_SR) Software Reset Command in Progress */ -/* -------- RSTC_MR : (RSTC Offset: 0x08) Mode Register -------- */ -#define RSTC_MR_URSTEN (0x1 << 0) /**< \brief (RSTC_MR) User Reset Enable */ -#define RSTC_MR_URSTIEN (0x1 << 4) /**< \brief (RSTC_MR) User Reset Interrupt Enable */ -#define RSTC_MR_ERSTL (0xf << 8) /**< \brief (RSTC_MR) External Reset Length */ -#define RSTC_MR_KEY (0xff << 24) /**< \brief (RSTC_MR) Password */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Real-time Clock */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_RTC Real-time Clock */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rtc hardware registers */ -typedef struct { - RwReg RTC_CR; /**< \brief (Rtc Offset: 0x00) Control Register */ - RwReg RTC_MR; /**< \brief (Rtc Offset: 0x04) Mode Register */ - RwReg RTC_TIMR; /**< \brief (Rtc Offset: 0x08) Time Register */ - RwReg RTC_CALR; /**< \brief (Rtc Offset: 0x0C) Calendar Register */ - RwReg RTC_TIMALR; /**< \brief (Rtc Offset: 0x10) Time Alarm Register */ - RwReg RTC_CALALR; /**< \brief (Rtc Offset: 0x14) Calendar Alarm Register */ - RoReg RTC_SR; /**< \brief (Rtc Offset: 0x18) Status Register */ - WoReg RTC_SCCR; /**< \brief (Rtc Offset: 0x1C) Status Clear Command Register */ - WoReg RTC_IER; /**< \brief (Rtc Offset: 0x20) Interrupt Enable Register */ - WoReg RTC_IDR; /**< \brief (Rtc Offset: 0x24) Interrupt Disable Register */ - RoReg RTC_IMR; /**< \brief (Rtc Offset: 0x28) Interrupt Mask Register */ - RoReg RTC_VER; /**< \brief (Rtc Offset: 0x2C) Valid Entry Register */ -} Rtc; -#endif /* __ASSEMBLY__ */ -/* -------- RTC_CR : (RTC Offset: 0x00) Control Register -------- */ -#define RTC_CR_UPDTIM (0x1 << 0) /**< \brief (RTC_CR) Update Request Time Register */ -#define RTC_CR_UPDCAL (0x1 << 1) /**< \brief (RTC_CR) Update Request Calendar Register */ -#define RTC_CR_TIMEVSEL (0x3 << 8) /**< \brief (RTC_CR) Time Event Selection */ -#define RTC_CR_TIMEVSEL_MINUTE (0x0 << 8) /**< \brief (RTC_CR) Minute change. */ -#define RTC_CR_TIMEVSEL_HOUR (0x1 << 8) /**< \brief (RTC_CR) Hour change. */ -#define RTC_CR_TIMEVSEL_DAY24 (0x2 << 8) /**< \brief (RTC_CR) Every day at midnight. */ -#define RTC_CR_TIMEVSEL_DAY12 (0x3 << 8) /**< \brief (RTC_CR) Every day at noon. */ -#define RTC_CR_CALEVSEL (0x3 << 16) /**< \brief (RTC_CR) Calendar Event Selection */ -#define RTC_CR_CALEVSEL_WEEK (0x0 << 16) /**< \brief (RTC_CR) Week change (every Monday at time 00:00:00). */ -#define RTC_CR_CALEVSEL_MONTH (0x1 << 16) /**< \brief (RTC_CR) Month change (every 01 of each month at time 00:00:00). */ -/* -------- RTC_MR : (RTC Offset: 0x04) Mode Register -------- */ -#define RTC_MR_HRMOD (0x1 << 0) /**< \brief (RTC_MR) 12-/24-hour Mode */ -/* -------- RTC_TIMR : (RTC Offset: 0x08) Time Register -------- */ -#define RTC_TIMR_SEC (0x7f << 0) /**< \brief (RTC_TIMR) Current Second */ -#define RTC_TIMR_MIN (0x7f << 8) /**< \brief (RTC_TIMR) Current Minute */ -#define RTC_TIMR_HOUR (0x3f << 16) /**< \brief (RTC_TIMR) Current Hour */ -#define RTC_TIMR_AMPM (0x1 << 22) /**< \brief (RTC_TIMR) Ante Meridiem Post Meridiem Indicator */ -/* -------- RTC_CALR : (RTC Offset: 0x0C) Calendar Register -------- */ -#define RTC_CALR_CENT (0x7f << 0) /**< \brief (RTC_CALR) Current Century */ -#define RTC_CALR_YEAR (0xff << 8) /**< \brief (RTC_CALR) Current Year */ -#define RTC_CALR_MONTH (0x1f << 16) /**< \brief (RTC_CALR) Current Month */ -#define RTC_CALR_DAY (0x7 << 21) /**< \brief (RTC_CALR) Current Day in Current Week */ -#define RTC_CALR_DATE (0x3f << 24) /**< \brief (RTC_CALR) Current Day in Current Month */ -/* -------- RTC_TIMALR : (RTC Offset: 0x10) Time Alarm Register -------- */ -#define RTC_TIMALR_SEC (0x7f << 0) /**< \brief (RTC_TIMALR) Second Alarm */ -#define RTC_TIMALR_SECEN (0x1 << 7) /**< \brief (RTC_TIMALR) Second Alarm Enable */ -#define RTC_TIMALR_MIN (0x7f << 8) /**< \brief (RTC_TIMALR) Minute Alarm */ -#define RTC_TIMALR_MINEN (0x1 << 15) /**< \brief (RTC_TIMALR) Minute Alarm Enable */ -#define RTC_TIMALR_HOUR (0x3f << 16) /**< \brief (RTC_TIMALR) Hour Alarm */ -#define RTC_TIMALR_AMPM (0x1 << 22) /**< \brief (RTC_TIMALR) AM/PM Indicator */ -#define RTC_TIMALR_HOUREN (0x1 << 23) /**< \brief (RTC_TIMALR) Hour Alarm Enable */ -/* -------- RTC_CALALR : (RTC Offset: 0x14) Calendar Alarm Register -------- */ -#define RTC_CALALR_MONTH (0x1f << 16) /**< \brief (RTC_CALALR) Month Alarm */ -#define RTC_CALALR_MTHEN (0x1 << 23) /**< \brief (RTC_CALALR) Month Alarm Enable */ -#define RTC_CALALR_DATE (0x3f << 24) /**< \brief (RTC_CALALR) Date Alarm */ -#define RTC_CALALR_DATEEN (0x1 << 31) /**< \brief (RTC_CALALR) Date Alarm Enable */ -/* -------- RTC_SR : (RTC Offset: 0x18) Status Register -------- */ -#define RTC_SR_ACKUPD (0x1 << 0) /**< \brief (RTC_SR) Acknowledge for Update */ -#define RTC_SR_ALARM (0x1 << 1) /**< \brief (RTC_SR) Alarm Flag */ -#define RTC_SR_SEC (0x1 << 2) /**< \brief (RTC_SR) Second Event */ -#define RTC_SR_TIMEV (0x1 << 3) /**< \brief (RTC_SR) Time Event */ -#define RTC_SR_CALEV (0x1 << 4) /**< \brief (RTC_SR) Calendar Event */ -/* -------- RTC_SCCR : (RTC Offset: 0x1C) Status Clear Command Register -------- */ -#define RTC_SCCR_ACKCLR (0x1 << 0) /**< \brief (RTC_SCCR) Acknowledge Clear */ -#define RTC_SCCR_ALRCLR (0x1 << 1) /**< \brief (RTC_SCCR) Alarm Clear */ -#define RTC_SCCR_SECCLR (0x1 << 2) /**< \brief (RTC_SCCR) Second Clear */ -#define RTC_SCCR_TIMCLR (0x1 << 3) /**< \brief (RTC_SCCR) Time Clear */ -#define RTC_SCCR_CALCLR (0x1 << 4) /**< \brief (RTC_SCCR) Calendar Clear */ -/* -------- RTC_IER : (RTC Offset: 0x20) Interrupt Enable Register -------- */ -#define RTC_IER_ACKEN (0x1 << 0) /**< \brief (RTC_IER) Acknowledge Update Interrupt Enable */ -#define RTC_IER_ALREN (0x1 << 1) /**< \brief (RTC_IER) Alarm Interrupt Enable */ -#define RTC_IER_SECEN (0x1 << 2) /**< \brief (RTC_IER) Second Event Interrupt Enable */ -#define RTC_IER_TIMEN (0x1 << 3) /**< \brief (RTC_IER) Time Event Interrupt Enable */ -#define RTC_IER_CALEN (0x1 << 4) /**< \brief (RTC_IER) Calendar Event Interrupt Enable */ -/* -------- RTC_IDR : (RTC Offset: 0x24) Interrupt Disable Register -------- */ -#define RTC_IDR_ACKDIS (0x1 << 0) /**< \brief (RTC_IDR) Acknowledge Update Interrupt Disable */ -#define RTC_IDR_ALRDIS (0x1 << 1) /**< \brief (RTC_IDR) Alarm Interrupt Disable */ -#define RTC_IDR_SECDIS (0x1 << 2) /**< \brief (RTC_IDR) Second Event Interrupt Disable */ -#define RTC_IDR_TIMDIS (0x1 << 3) /**< \brief (RTC_IDR) Time Event Interrupt Disable */ -#define RTC_IDR_CALDIS (0x1 << 4) /**< \brief (RTC_IDR) Calendar Event Interrupt Disable */ -/* -------- RTC_IMR : (RTC Offset: 0x28) Interrupt Mask Register -------- */ -#define RTC_IMR_ACK (0x1 << 0) /**< \brief (RTC_IMR) Acknowledge Update Interrupt Mask */ -#define RTC_IMR_ALR (0x1 << 1) /**< \brief (RTC_IMR) Alarm Interrupt Mask */ -#define RTC_IMR_SEC (0x1 << 2) /**< \brief (RTC_IMR) Second Event Interrupt Mask */ -#define RTC_IMR_TIM (0x1 << 3) /**< \brief (RTC_IMR) Time Event Interrupt Mask */ -#define RTC_IMR_CAL (0x1 << 4) /**< \brief (RTC_IMR) Calendar Event Interrupt Mask */ -/* -------- RTC_VER : (RTC Offset: 0x2C) Valid Entry Register -------- */ -#define RTC_VER_NVTIM (0x1 << 0) /**< \brief (RTC_VER) Non-valid Time */ -#define RTC_VER_NVCAL (0x1 << 1) /**< \brief (RTC_VER) Non-valid Calendar */ -#define RTC_VER_NVTIMALR (0x1 << 2) /**< \brief (RTC_VER) Non-valid Time Alarm */ -#define RTC_VER_NVCALALR (0x1 << 3) /**< \brief (RTC_VER) Non-valid Calendar Alarm */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Real-time Timer */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_RTT Real-time Timer */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rtt hardware registers */ -typedef struct { - RwReg RTT_MR; /**< \brief (Rtt Offset: 0x00) Mode Register */ - RwReg RTT_AR; /**< \brief (Rtt Offset: 0x04) Alarm Register */ - RoReg RTT_VR; /**< \brief (Rtt Offset: 0x08) Value Register */ - RoReg RTT_SR; /**< \brief (Rtt Offset: 0x0C) Status Register */ -} Rtt; -#endif /* __ASSEMBLY__ */ -/* -------- RTT_MR : (RTT Offset: 0x00) Mode Register -------- */ -#define RTT_MR_RTPRES (0xffff << 0) /**< \brief (RTT_MR) Real-time Timer Prescaler Value */ -#define RTT_MR_ALMIEN (0x1 << 16) /**< \brief (RTT_MR) Alarm Interrupt Enable */ -#define RTT_MR_RTTINCIEN (0x1 << 17) /**< \brief (RTT_MR) Real-time Timer Increment Interrupt Enable */ -#define RTT_MR_RTTRST (0x1 << 18) /**< \brief (RTT_MR) Real-time Timer Restart */ -/* -------- RTT_AR : (RTT Offset: 0x04) Alarm Register -------- */ -#define RTT_AR_ALMV (0xffffffff << 0) /**< \brief (RTT_AR) Alarm Value */ -/* -------- RTT_VR : (RTT Offset: 0x08) Value Register -------- */ -#define RTT_VR_CRTV (0xffffffff << 0) /**< \brief (RTT_VR) Current Real-time Value */ -/* -------- RTT_SR : (RTT Offset: 0x0C) Status Register -------- */ -#define RTT_SR_ALMS (0x1 << 0) /**< \brief (RTT_SR) Real-time Alarm Status */ -#define RTT_SR_RTTINC (0x1 << 1) /**< \brief (RTT_SR) Real-time Timer Increment */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Static Memory Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_SMC Static Memory Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief SmcCs_number hardware registers */ -typedef struct { - RwReg SMC_SETUP; /**< \brief (SmcCs_number Offset: 0x0) SMC Setup Register */ - RwReg SMC_PULSE; /**< \brief (SmcCs_number Offset: 0x4) SMC Pulse Register */ - RwReg SMC_CYCLE; /**< \brief (SmcCs_number Offset: 0x8) SMC Cycle Register */ - RwReg SMC_MODE; /**< \brief (SmcCs_number Offset: 0xC) SMC Mode Register */ -} SmcCs_number; -/** \brief Smc hardware registers */ -typedef struct { - SmcCs_number SMC_CS_NUMBER[5]; /**< \brief (Smc Offset: 0x0) CS_number = 0 .. 4 */ - RwReg Reserved1[12]; - RwReg SMC_OCMS; /**< \brief (Smc Offset: 0x80) SMC OCMS MODE Register */ - WoReg SMC_KEY1; /**< \brief (Smc Offset: 0x84) SMC OCMS KEY1 Register */ - WoReg SMC_KEY2; /**< \brief (Smc Offset: 0x88) SMC OCMS KEY2 Register */ - RwReg Reserved2[22]; - RwReg SMC_WPMR; /**< \brief (Smc Offset: 0xE4) SMC Write Protect Mode Register */ - RoReg SMC_WPSR; /**< \brief (Smc Offset: 0xE8) SMC Write Protect Status Register */ -} Smc; -#endif /* __ASSEMBLY__ */ -/* -------- SMC_SETUP0 : (SMC Offset: 0x0) SMC Setup Register (CS_number = 0) -------- */ -#define SMC_SETUP0_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP0) NWE Setup Length */ -#define SMC_SETUP0_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP0) NCS Setup Length in WRITE Access */ -#define SMC_SETUP0_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP0) NRD Setup Length */ -#define SMC_SETUP0_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP0) NCS Setup Length in READ Access */ -/* -------- SMC_PULSE0 : (SMC Offset: 0x4) SMC Pulse Register (CS_number = 0) -------- */ -#define SMC_PULSE0_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE0) NWE Pulse Length */ -#define SMC_PULSE0_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE0) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE0_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE0) NRD Pulse Length */ -#define SMC_PULSE0_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE0) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE0 : (SMC Offset: 0x8) SMC Cycle Register (CS_number = 0) -------- */ -#define SMC_CYCLE0_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE0) Total Write Cycle Length */ -#define SMC_CYCLE0_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE0) Total Read Cycle Length */ -/* -------- SMC_MODE0 : (SMC Offset: 0xC) SMC Mode Register (CS_number = 0) -------- */ -#define SMC_MODE0_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE0) */ -#define SMC_MODE0_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE0) */ -#define SMC_MODE0_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE0) NWAIT Mode */ -#define SMC_MODE0_DBW (0x3 << 12) /**< \brief (SMC_MODE0) Data Bus Width */ -#define SMC_MODE0_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE0) Data Float Time */ -#define SMC_MODE0_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE0) TDF Optimization */ -#define SMC_MODE0_PMEN (0x1 << 24) /**< \brief (SMC_MODE0) Page Mode Enabled */ -#define SMC_MODE0_PS (0x3 << 28) /**< \brief (SMC_MODE0) Page Size */ -/* -------- SMC_SETUP1 : (SMC Offset: 0x10) SMC Setup Register (CS_number = 1) -------- */ -#define SMC_SETUP1_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP1) NWE Setup Length */ -#define SMC_SETUP1_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP1) NCS Setup Length in WRITE Access */ -#define SMC_SETUP1_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP1) NRD Setup Length */ -#define SMC_SETUP1_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP1) NCS Setup Length in READ Access */ -/* -------- SMC_PULSE1 : (SMC Offset: 0x14) SMC Pulse Register (CS_number = 1) -------- */ -#define SMC_PULSE1_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE1) NWE Pulse Length */ -#define SMC_PULSE1_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE1) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE1_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE1) NRD Pulse Length */ -#define SMC_PULSE1_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE1) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE1 : (SMC Offset: 0x18) SMC Cycle Register (CS_number = 1) -------- */ -#define SMC_CYCLE1_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE1) Total Write Cycle Length */ -#define SMC_CYCLE1_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE1) Total Read Cycle Length */ -/* -------- SMC_MODE1 : (SMC Offset: 0x1C) SMC Mode Register (CS_number = 1) -------- */ -#define SMC_MODE1_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE1) */ -#define SMC_MODE1_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE1) */ -#define SMC_MODE1_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE1) NWAIT Mode */ -#define SMC_MODE1_DBW (0x3 << 12) /**< \brief (SMC_MODE1) Data Bus Width */ -#define SMC_MODE1_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE1) Data Float Time */ -#define SMC_MODE1_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE1) TDF Optimization */ -#define SMC_MODE1_PMEN (0x1 << 24) /**< \brief (SMC_MODE1) Page Mode Enabled */ -#define SMC_MODE1_PS (0x3 << 28) /**< \brief (SMC_MODE1) Page Size */ -/* -------- SMC_SETUP2 : (SMC Offset: 0x20) SMC Setup Register (CS_number = 2) -------- */ -#define SMC_SETUP2_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP2) NWE Setup Length */ -#define SMC_SETUP2_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP2) NCS Setup Length in WRITE Access */ -#define SMC_SETUP2_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP2) NRD Setup Length */ -#define SMC_SETUP2_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP2) NCS Setup Length in READ Access */ -/* -------- SMC_PULSE2 : (SMC Offset: 0x24) SMC Pulse Register (CS_number = 2) -------- */ -#define SMC_PULSE2_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE2) NWE Pulse Length */ -#define SMC_PULSE2_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE2) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE2_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE2) NRD Pulse Length */ -#define SMC_PULSE2_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE2) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE2 : (SMC Offset: 0x28) SMC Cycle Register (CS_number = 2) -------- */ -#define SMC_CYCLE2_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE2) Total Write Cycle Length */ -#define SMC_CYCLE2_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE2) Total Read Cycle Length */ -/* -------- SMC_MODE2 : (SMC Offset: 0x2C) SMC Mode Register (CS_number = 2) -------- */ -#define SMC_MODE2_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE2) */ -#define SMC_MODE2_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE2) */ -#define SMC_MODE2_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE2) NWAIT Mode */ -#define SMC_MODE2_DBW (0x3 << 12) /**< \brief (SMC_MODE2) Data Bus Width */ -#define SMC_MODE2_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE2) Data Float Time */ -#define SMC_MODE2_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE2) TDF Optimization */ -#define SMC_MODE2_PMEN (0x1 << 24) /**< \brief (SMC_MODE2) Page Mode Enabled */ -#define SMC_MODE2_PS (0x3 << 28) /**< \brief (SMC_MODE2) Page Size */ -/* -------- SMC_SETUP3 : (SMC Offset: 0x30) SMC Setup Register (CS_number = 3) -------- */ -#define SMC_SETUP3_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP3) NWE Setup Length */ -#define SMC_SETUP3_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP3) NCS Setup Length in WRITE Access */ -#define SMC_SETUP3_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP3) NRD Setup Length */ -#define SMC_SETUP3_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP3) NCS Setup Length in READ Access */ -/* -------- SMC_PULSE3 : (SMC Offset: 0x34) SMC Pulse Register (CS_number = 3) -------- */ -#define SMC_PULSE3_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE3) NWE Pulse Length */ -#define SMC_PULSE3_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE3) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE3_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE3) NRD Pulse Length */ -#define SMC_PULSE3_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE3) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE3 : (SMC Offset: 0x38) SMC Cycle Register (CS_number = 3) -------- */ -#define SMC_CYCLE3_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE3) Total Write Cycle Length */ -#define SMC_CYCLE3_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE3) Total Read Cycle Length */ -/* -------- SMC_MODE3 : (SMC Offset: 0x3C) SMC Mode Register (CS_number = 3) -------- */ -#define SMC_MODE3_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE3) */ -#define SMC_MODE3_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE3) */ -#define SMC_MODE3_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE3) NWAIT Mode */ -#define SMC_MODE3_DBW (0x3 << 12) /**< \brief (SMC_MODE3) Data Bus Width */ -#define SMC_MODE3_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE3) Data Float Time */ -#define SMC_MODE3_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE3) TDF Optimization */ -#define SMC_MODE3_PMEN (0x1 << 24) /**< \brief (SMC_MODE3) Page Mode Enabled */ -#define SMC_MODE3_PS (0x3 << 28) /**< \brief (SMC_MODE3) Page Size */ -/* -------- SMC_SETUP4 : (SMC Offset: 0x40) SMC Setup Register (CS_number = 4) -------- */ -#define SMC_SETUP4_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP4) NWE Setup Length */ -#define SMC_SETUP4_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP4) NCS Setup Length in WRITE Access */ -#define SMC_SETUP4_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP4) NRD Setup Length */ -#define SMC_SETUP4_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP4) NCS Setup Length in READ Access */ -/* -------- SMC_PULSE4 : (SMC Offset: 0x44) SMC Pulse Register (CS_number = 4) -------- */ -#define SMC_PULSE4_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE4) NWE Pulse Length */ -#define SMC_PULSE4_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE4) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE4_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE4) NRD Pulse Length */ -#define SMC_PULSE4_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE4) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE4 : (SMC Offset: 0x48) SMC Cycle Register (CS_number = 4) -------- */ -#define SMC_CYCLE4_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE4) Total Write Cycle Length */ -#define SMC_CYCLE4_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE4) Total Read Cycle Length */ -/* -------- SMC_MODE4 : (SMC Offset: 0x4C) SMC Mode Register (CS_number = 4) -------- */ -#define SMC_MODE4_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE4) */ -#define SMC_MODE4_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE4) */ -#define SMC_MODE4_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE4) NWAIT Mode */ -#define SMC_MODE4_DBW (0x3 << 12) /**< \brief (SMC_MODE4) Data Bus Width */ -#define SMC_MODE4_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE4) Data Float Time */ -#define SMC_MODE4_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE4) TDF Optimization */ -#define SMC_MODE4_PMEN (0x1 << 24) /**< \brief (SMC_MODE4) Page Mode Enabled */ -#define SMC_MODE4_PS (0x3 << 28) /**< \brief (SMC_MODE4) Page Size */ -/* -------- SMC_OCMS : (SMC Offset: 0x80) SMC OCMS MODE Register -------- */ -#define SMC_OCMS_SMSE (0x1 << 0) /**< \brief (SMC_OCMS) Static Memory Controller Scrambling Enable */ -#define SMC_OCMS_CS0SE (0x1 << 16) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ -#define SMC_OCMS_CS1SE (0x1 << 17) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ -#define SMC_OCMS_CS2SE (0x1 << 18) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ -#define SMC_OCMS_CS3SE (0x1 << 19) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ -/* -------- SMC_KEY1 : (SMC Offset: 0x84) SMC OCMS KEY1 Register -------- */ -#define SMC_KEY1_KEY1 (0xffffffff << 0) /**< \brief (SMC_KEY1) Off Chip Memory Scrambling (OCMS) Key Part 1 */ -/* -------- SMC_KEY2 : (SMC Offset: 0x88) SMC OCMS KEY2 Register -------- */ -#define SMC_KEY2_KEY2 (0xffffffff << 0) /**< \brief (SMC_KEY2) Off Chip Memory Scrambling (OCMS) Key Part 2 */ -/* -------- SMC_WPMR : (SMC Offset: 0xE4) SMC Write Protect Mode Register -------- */ -#define SMC_WPMR_WPEN (0x1 << 0) /**< \brief (SMC_WPMR) Write Protect Enable */ -#define SMC_WPMR_WPKEY (0xffffff << 8) /**< \brief (SMC_WPMR) Write Protect KEY */ -/* -------- SMC_WPSR : (SMC Offset: 0xE8) SMC Write Protect Status Register -------- */ -#define SMC_WPSR_WPVS (0x1 << 0) /**< \brief (SMC_WPSR) Write Protect Enable */ -#define SMC_WPSR_WPVSRC (0xffff << 8) /**< \brief (SMC_WPSR) Write Protect Violation Source */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Serial Peripheral Interface */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_SPI Serial Peripheral Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Spi hardware registers */ -typedef struct { - WoReg SPI_CR; /**< \brief (Spi Offset: 0x00) Control Register */ - RwReg SPI_MR; /**< \brief (Spi Offset: 0x04) Mode Register */ - RoReg SPI_RDR; /**< \brief (Spi Offset: 0x08) Receive Data Register */ - WoReg SPI_TDR; /**< \brief (Spi Offset: 0x0C) Transmit Data Register */ - RoReg SPI_SR; /**< \brief (Spi Offset: 0x10) Status Register */ - WoReg SPI_IER; /**< \brief (Spi Offset: 0x14) Interrupt Enable Register */ - WoReg SPI_IDR; /**< \brief (Spi Offset: 0x18) Interrupt Disable Register */ - RoReg SPI_IMR; /**< \brief (Spi Offset: 0x1C) Interrupt Mask Register */ - RwReg Reserved1[4]; - RwReg SPI_CSR[4]; /**< \brief (Spi Offset: 0x30) Chip Select Register */ - RwReg Reserved2[41]; - RwReg SPI_WPMR; /**< \brief (Spi Offset: 0xE4) Write Protection Control Register */ - RoReg SPI_WPSR; /**< \brief (Spi Offset: 0xE8) Write Protection Status Register */ - RwReg Reserved3[5]; - RwReg SPI_RPR; /**< \brief (Spi Offset: 0x100) Receive Pointer Register */ - RwReg SPI_RCR; /**< \brief (Spi Offset: 0x104) Receive Counter Register */ - RwReg SPI_TPR; /**< \brief (Spi Offset: 0x108) Transmit Pointer Register */ - RwReg SPI_TCR; /**< \brief (Spi Offset: 0x10C) Transmit Counter Register */ - RwReg SPI_RNPR; /**< \brief (Spi Offset: 0x110) Receive Next Pointer Register */ - RwReg SPI_RNCR; /**< \brief (Spi Offset: 0x114) Receive Next Counter Register */ - RwReg SPI_TNPR; /**< \brief (Spi Offset: 0x118) Transmit Next Pointer Register */ - RwReg SPI_TNCR; /**< \brief (Spi Offset: 0x11C) Transmit Next Counter Register */ - WoReg SPI_PTCR; /**< \brief (Spi Offset: 0x120) Transfer Control Register */ - RoReg SPI_PTSR; /**< \brief (Spi Offset: 0x124) Transfer Status Register */ -} Spi; -#endif /* __ASSEMBLY__ */ -/* -------- SPI_CR : (SPI Offset: 0x00) Control Register -------- */ -#define SPI_CR_SPIEN (0x1 << 0) /**< \brief (SPI_CR) SPI Enable */ -#define SPI_CR_SPIDIS (0x1 << 1) /**< \brief (SPI_CR) SPI Disable */ -#define SPI_CR_SWRST (0x1 << 7) /**< \brief (SPI_CR) SPI Software Reset */ -#define SPI_CR_LASTXFER (0x1 << 24) /**< \brief (SPI_CR) Last Transfer */ -/* -------- SPI_MR : (SPI Offset: 0x04) Mode Register -------- */ -#define SPI_MR_MSTR (0x1 << 0) /**< \brief (SPI_MR) Master/Slave Mode */ -#define SPI_MR_PS (0x1 << 1) /**< \brief (SPI_MR) Peripheral Select */ -#define SPI_MR_PS_FIXED (0x0 << 1) /**< \brief (SPI_MR) Fixed Peripheral Select. */ -#define SPI_MR_PS_VARIABLE (0x1 << 1) /**< \brief (SPI_MR) Variable Peripheral Select. */ -#define SPI_MR_PCSDEC (0x1 << 2) /**< \brief (SPI_MR) Chip Select Decode */ -#define SPI_MR_MODFDIS (0x1 << 4) /**< \brief (SPI_MR) Mode Fault Detection */ -#define SPI_MR_WDRBT (0x1 << 5) /**< \brief (SPI_MR) Wait Data Read Before Transfer */ -#define SPI_MR_LLB (0x1 << 7) /**< \brief (SPI_MR) Local Loopback Enable */ -#define SPI_MR_PCS (0xf << 16) /**< \brief (SPI_MR) Peripheral Chip Select */ -#define SPI_MR_DLYBCS (0xff << 24) /**< \brief (SPI_MR) Delay Between Chip Selects */ -/* -------- SPI_RDR : (SPI Offset: 0x08) Receive Data Register -------- */ -#define SPI_RDR_RD (0xffff << 0) /**< \brief (SPI_RDR) Receive Data */ -#define SPI_RDR_PCS (0xf << 16) /**< \brief (SPI_RDR) Peripheral Chip Select */ -/* -------- SPI_TDR : (SPI Offset: 0x0C) Transmit Data Register -------- */ -#define SPI_TDR_TD (0xffff << 0) /**< \brief (SPI_TDR) Transmit Data */ -#define SPI_TDR_PCS (0xf << 16) /**< \brief (SPI_TDR) Peripheral Chip Select */ -#define SPI_TDR_LASTXFER (0x1 << 24) /**< \brief (SPI_TDR) Last Transfer */ -/* -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- */ -#define SPI_SR_RDRF (0x1 << 0) /**< \brief (SPI_SR) Receive Data Register Full */ -#define SPI_SR_TDRE (0x1 << 1) /**< \brief (SPI_SR) Transmit Data Register Empty */ -#define SPI_SR_MODF (0x1 << 2) /**< \brief (SPI_SR) Mode Fault Error */ -#define SPI_SR_OVRES (0x1 << 3) /**< \brief (SPI_SR) Overrun Error Status */ -#define SPI_SR_ENDRX (0x1 << 4) /**< \brief (SPI_SR) End of RX buffer */ -#define SPI_SR_ENDTX (0x1 << 5) /**< \brief (SPI_SR) End of TX buffer */ -#define SPI_SR_RXBUFF (0x1 << 6) /**< \brief (SPI_SR) RX Buffer Full */ -#define SPI_SR_TXBUFE (0x1 << 7) /**< \brief (SPI_SR) TX Buffer Empty */ -#define SPI_SR_NSSR (0x1 << 8) /**< \brief (SPI_SR) NSS Rising */ -#define SPI_SR_TXEMPTY (0x1 << 9) /**< \brief (SPI_SR) Transmission Registers Empty */ -#define SPI_SR_UNDES (0x1 << 10) /**< \brief (SPI_SR) Underrun Error Status (Slave Mode Only) */ -#define SPI_SR_SPIENS (0x1 << 16) /**< \brief (SPI_SR) SPI Enable Status */ -/* -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- */ -#define SPI_IER_RDRF (0x1 << 0) /**< \brief (SPI_IER) Receive Data Register Full Interrupt Enable */ -#define SPI_IER_TDRE (0x1 << 1) /**< \brief (SPI_IER) SPI Transmit Data Register Empty Interrupt Enable */ -#define SPI_IER_MODF (0x1 << 2) /**< \brief (SPI_IER) Mode Fault Error Interrupt Enable */ -#define SPI_IER_OVRES (0x1 << 3) /**< \brief (SPI_IER) Overrun Error Interrupt Enable */ -#define SPI_IER_ENDRX (0x1 << 4) /**< \brief (SPI_IER) End of Receive Buffer Interrupt Enable */ -#define SPI_IER_ENDTX (0x1 << 5) /**< \brief (SPI_IER) End of Transmit Buffer Interrupt Enable */ -#define SPI_IER_RXBUFF (0x1 << 6) /**< \brief (SPI_IER) Receive Buffer Full Interrupt Enable */ -#define SPI_IER_TXBUFE (0x1 << 7) /**< \brief (SPI_IER) Transmit Buffer Empty Interrupt Enable */ -#define SPI_IER_NSSR (0x1 << 8) /**< \brief (SPI_IER) NSS Rising Interrupt Enable */ -#define SPI_IER_TXEMPTY (0x1 << 9) /**< \brief (SPI_IER) Transmission Registers Empty Enable */ -#define SPI_IER_UNDES (0x1 << 10) /**< \brief (SPI_IER) Underrun Error Interrupt Enable */ -/* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- */ -#define SPI_IDR_RDRF (0x1 << 0) /**< \brief (SPI_IDR) Receive Data Register Full Interrupt Disable */ -#define SPI_IDR_TDRE (0x1 << 1) /**< \brief (SPI_IDR) SPI Transmit Data Register Empty Interrupt Disable */ -#define SPI_IDR_MODF (0x1 << 2) /**< \brief (SPI_IDR) Mode Fault Error Interrupt Disable */ -#define SPI_IDR_OVRES (0x1 << 3) /**< \brief (SPI_IDR) Overrun Error Interrupt Disable */ -#define SPI_IDR_ENDRX (0x1 << 4) /**< \brief (SPI_IDR) End of Receive Buffer Interrupt Disable */ -#define SPI_IDR_ENDTX (0x1 << 5) /**< \brief (SPI_IDR) End of Transmit Buffer Interrupt Disable */ -#define SPI_IDR_RXBUFF (0x1 << 6) /**< \brief (SPI_IDR) Receive Buffer Full Interrupt Disable */ -#define SPI_IDR_TXBUFE (0x1 << 7) /**< \brief (SPI_IDR) Transmit Buffer Empty Interrupt Disable */ -#define SPI_IDR_NSSR (0x1 << 8) /**< \brief (SPI_IDR) NSS Rising Interrupt Disable */ -#define SPI_IDR_TXEMPTY (0x1 << 9) /**< \brief (SPI_IDR) Transmission Registers Empty Disable */ -#define SPI_IDR_UNDES (0x1 << 10) /**< \brief (SPI_IDR) Underrun Error Interrupt Disable */ -/* -------- SPI_IMR : (SPI Offset: 0x1C) Interrupt Mask Register -------- */ -#define SPI_IMR_RDRF (0x1 << 0) /**< \brief (SPI_IMR) Receive Data Register Full Interrupt Mask */ -#define SPI_IMR_TDRE (0x1 << 1) /**< \brief (SPI_IMR) SPI Transmit Data Register Empty Interrupt Mask */ -#define SPI_IMR_MODF (0x1 << 2) /**< \brief (SPI_IMR) Mode Fault Error Interrupt Mask */ -#define SPI_IMR_OVRES (0x1 << 3) /**< \brief (SPI_IMR) Overrun Error Interrupt Mask */ -#define SPI_IMR_ENDRX (0x1 << 4) /**< \brief (SPI_IMR) End of Receive Buffer Interrupt Mask */ -#define SPI_IMR_ENDTX (0x1 << 5) /**< \brief (SPI_IMR) End of Transmit Buffer Interrupt Mask */ -#define SPI_IMR_RXBUFF (0x1 << 6) /**< \brief (SPI_IMR) Receive Buffer Full Interrupt Mask */ -#define SPI_IMR_TXBUFE (0x1 << 7) /**< \brief (SPI_IMR) Transmit Buffer Empty Interrupt Mask */ -#define SPI_IMR_NSSR (0x1 << 8) /**< \brief (SPI_IMR) NSS Rising Interrupt Mask */ -#define SPI_IMR_TXEMPTY (0x1 << 9) /**< \brief (SPI_IMR) Transmission Registers Empty Mask */ -#define SPI_IMR_UNDES (0x1 << 10) /**< \brief (SPI_IMR) Underrun Error Interrupt Mask */ -/* -------- SPI_CSR[4] : (SPI Offset: 0x30) Chip Select Register -------- */ -#define SPI_CSR_CPOL (0x1 << 0) /**< \brief (SPI_CSR[4]) Clock Polarity */ -#define SPI_CSR_NCPHA (0x1 << 1) /**< \brief (SPI_CSR[4]) Clock Phase */ -#define SPI_CSR_CSNAAT (0x1 << 2) /**< \brief (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ -#define SPI_CSR_CSAAT (0x1 << 3) /**< \brief (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ -#define SPI_CSR_BITS (0xf << 4) /**< \brief (SPI_CSR[4]) Bits Per Transfer (See the (Note:) below the register table; Section 9.9 "SPI Chip Select Register" on page 35.) */ -#define SPI_CSR_BITS_8 (0x0 << 4) /**< \brief (SPI_CSR[4]) 8 */ -#define SPI_CSR_BITS_9 (0x1 << 4) /**< \brief (SPI_CSR[4]) 9 */ -#define SPI_CSR_BITS_10 (0x2 << 4) /**< \brief (SPI_CSR[4]) 10 */ -#define SPI_CSR_BITS_11 (0x3 << 4) /**< \brief (SPI_CSR[4]) 11 */ -#define SPI_CSR_BITS_12 (0x4 << 4) /**< \brief (SPI_CSR[4]) 12 */ -#define SPI_CSR_BITS_13 (0x5 << 4) /**< \brief (SPI_CSR[4]) 13 */ -#define SPI_CSR_BITS_14 (0x6 << 4) /**< \brief (SPI_CSR[4]) 14 */ -#define SPI_CSR_BITS_15 (0x7 << 4) /**< \brief (SPI_CSR[4]) 15 */ -#define SPI_CSR_BITS_16 (0x8 << 4) /**< \brief (SPI_CSR[4]) 16 */ -#define SPI_CSR_SCBR (0xff << 8) /**< \brief (SPI_CSR[4]) Serial Clock Baud Rate */ -#define SPI_CSR_DLYBS (0xff << 16) /**< \brief (SPI_CSR[4]) Delay Before SPCK */ -#define SPI_CSR_DLYBCT (0xff << 24) /**< \brief (SPI_CSR[4]) Delay Between Consecutive Transfers */ -/* -------- SPI_WPMR : (SPI Offset: 0xE4) Write Protection Control Register -------- */ -#define SPI_WPMR_SPIWPEN (0x1 << 0) /**< \brief (SPI_WPMR) SPI Write Protection Enable */ -#define SPI_WPMR_SPIWPKEY (0xffffff << 8) /**< \brief (SPI_WPMR) SPI Write Protection Key Password */ -/* -------- SPI_WPSR : (SPI Offset: 0xE8) Write Protection Status Register -------- */ -#define SPI_WPSR_SPIWPVS (0x7 << 0) /**< \brief (SPI_WPSR) SPI Write Protection Violation Status */ -#define SPI_WPSR_SPIWPVSRC (0xff << 8) /**< \brief (SPI_WPSR) SPI Write Protection Violation Source */ -/* -------- SPI_RPR : (SPI Offset: 0x100) Receive Pointer Register -------- */ -#define SPI_RPR_RXPTR (0xffffffff << 0) /**< \brief (SPI_RPR) Receive Pointer Register */ -/* -------- SPI_RCR : (SPI Offset: 0x104) Receive Counter Register -------- */ -#define SPI_RCR_RXCTR (0xffff << 0) /**< \brief (SPI_RCR) Receive Counter Register */ -/* -------- SPI_TPR : (SPI Offset: 0x108) Transmit Pointer Register -------- */ -#define SPI_TPR_TXPTR (0xffffffff << 0) /**< \brief (SPI_TPR) Transmit Counter Register */ -/* -------- SPI_TCR : (SPI Offset: 0x10C) Transmit Counter Register -------- */ -#define SPI_TCR_TXCTR (0xffff << 0) /**< \brief (SPI_TCR) Transmit Counter Register */ -/* -------- SPI_RNPR : (SPI Offset: 0x110) Receive Next Pointer Register -------- */ -#define SPI_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (SPI_RNPR) Receive Next Pointer */ -/* -------- SPI_RNCR : (SPI Offset: 0x114) Receive Next Counter Register -------- */ -#define SPI_RNCR_RXNCTR (0xffff << 0) /**< \brief (SPI_RNCR) Receive Next Counter */ -/* -------- SPI_TNPR : (SPI Offset: 0x118) Transmit Next Pointer Register -------- */ -#define SPI_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (SPI_TNPR) Transmit Next Pointer */ -/* -------- SPI_TNCR : (SPI Offset: 0x11C) Transmit Next Counter Register -------- */ -#define SPI_TNCR_TXNCTR (0xffff << 0) /**< \brief (SPI_TNCR) Transmit Counter Next */ -/* -------- SPI_PTCR : (SPI Offset: 0x120) Transfer Control Register -------- */ -#define SPI_PTCR_RXTEN (0x1 << 0) /**< \brief (SPI_PTCR) Receiver Transfer Enable */ -#define SPI_PTCR_RXTDIS (0x1 << 1) /**< \brief (SPI_PTCR) Receiver Transfer Disable */ -#define SPI_PTCR_TXTEN (0x1 << 8) /**< \brief (SPI_PTCR) Transmitter Transfer Enable */ -#define SPI_PTCR_TXTDIS (0x1 << 9) /**< \brief (SPI_PTCR) Transmitter Transfer Disable */ -/* -------- SPI_PTSR : (SPI Offset: 0x124) Transfer Status Register -------- */ -#define SPI_PTSR_RXTEN (0x1 << 0) /**< \brief (SPI_PTSR) Receiver Transfer Enable */ -#define SPI_PTSR_TXTEN (0x1 << 8) /**< \brief (SPI_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Synchronous Serial Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_SSC Synchronous Serial Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Ssc hardware registers */ -typedef struct { - WoReg SSC_CR; /**< \brief (Ssc Offset: 0x0) Control Register */ - RwReg SSC_CMR; /**< \brief (Ssc Offset: 0x4) Clock Mode Register */ - RwReg Reserved1[2]; - RwReg SSC_RCMR; /**< \brief (Ssc Offset: 0x10) Receive Clock Mode Register */ - RwReg SSC_RFMR; /**< \brief (Ssc Offset: 0x14) Receive Frame Mode Register */ - RwReg SSC_TCMR; /**< \brief (Ssc Offset: 0x18) Transmit Clock Mode Register */ - RwReg SSC_TFMR; /**< \brief (Ssc Offset: 0x1C) Transmit Frame Mode Register */ - RoReg SSC_RHR; /**< \brief (Ssc Offset: 0x20) Receive Holding Register */ - WoReg SSC_THR; /**< \brief (Ssc Offset: 0x24) Transmit Holding Register */ - RwReg Reserved2[2]; - RoReg SSC_RSHR; /**< \brief (Ssc Offset: 0x30) Receive Sync. Holding Register */ - RwReg SSC_TSHR; /**< \brief (Ssc Offset: 0x34) Transmit Sync. Holding Register */ - RwReg SSC_RC0R; /**< \brief (Ssc Offset: 0x38) Receive Compare 0 Register */ - RwReg SSC_RC1R; /**< \brief (Ssc Offset: 0x3C) Receive Compare 1 Register */ - RoReg SSC_SR; /**< \brief (Ssc Offset: 0x40) Status Register */ - WoReg SSC_IER; /**< \brief (Ssc Offset: 0x44) Interrupt Enable Register */ - WoReg SSC_IDR; /**< \brief (Ssc Offset: 0x48) Interrupt Disable Register */ - RoReg SSC_IMR; /**< \brief (Ssc Offset: 0x4C) Interrupt Mask Register */ - RwReg Reserved3[37]; - RwReg SSC_WPMR; /**< \brief (Ssc Offset: 0xE4) Write Protect Mode Register */ - RoReg SSC_WPSR; /**< \brief (Ssc Offset: 0xE8) Write Protect Status Register */ - RwReg Reserved4[5]; - RwReg SSC_RPR; /**< \brief (Ssc Offset: 0x100) Receive Pointer Register */ - RwReg SSC_RCR; /**< \brief (Ssc Offset: 0x104) Receive Counter Register */ - RwReg SSC_TPR; /**< \brief (Ssc Offset: 0x108) Transmit Pointer Register */ - RwReg SSC_TCR; /**< \brief (Ssc Offset: 0x10C) Transmit Counter Register */ - RwReg SSC_RNPR; /**< \brief (Ssc Offset: 0x110) Receive Next Pointer Register */ - RwReg SSC_RNCR; /**< \brief (Ssc Offset: 0x114) Receive Next Counter Register */ - RwReg SSC_TNPR; /**< \brief (Ssc Offset: 0x118) Transmit Next Pointer Register */ - RwReg SSC_TNCR; /**< \brief (Ssc Offset: 0x11C) Transmit Next Counter Register */ - WoReg SSC_PTCR; /**< \brief (Ssc Offset: 0x120) Transfer Control Register */ - RoReg SSC_PTSR; /**< \brief (Ssc Offset: 0x124) Transfer Status Register */ -} Ssc; -#endif /* __ASSEMBLY__ */ -/* -------- SSC_CR : (SSC Offset: 0x0) Control Register -------- */ -#define SSC_CR_RXEN (0x1 << 0) /**< \brief (SSC_CR) Receive Enable */ -#define SSC_CR_RXDIS (0x1 << 1) /**< \brief (SSC_CR) Receive Disable */ -#define SSC_CR_TXEN (0x1 << 8) /**< \brief (SSC_CR) Transmit Enable */ -#define SSC_CR_TXDIS (0x1 << 9) /**< \brief (SSC_CR) Transmit Disable */ -#define SSC_CR_SWRST (0x1 << 15) /**< \brief (SSC_CR) Software Reset */ -/* -------- SSC_CMR : (SSC Offset: 0x4) Clock Mode Register -------- */ -#define SSC_CMR_DIV (0xfff << 0) /**< \brief (SSC_CMR) Clock Divider */ -/* -------- SSC_RCMR : (SSC Offset: 0x10) Receive Clock Mode Register -------- */ -#define SSC_RCMR_CKS (0x3 << 0) /**< \brief (SSC_RCMR) Receive Clock Selection */ -#define SSC_RCMR_CKS_DIV (0x0 << 0) /**< \brief (SSC_RCMR) Divided Clock */ -#define SSC_RCMR_CKS_TK (0x1 << 0) /**< \brief (SSC_RCMR) TK Clock signal */ -#define SSC_RCMR_CKS_RK (0x2 << 0) /**< \brief (SSC_RCMR) RK pin */ -#define SSC_RCMR_CKO (0x7 << 2) /**< \brief (SSC_RCMR) Receive Clock Output Mode Selection */ -#define SSC_RCMR_CKI (0x1 << 5) /**< \brief (SSC_RCMR) Receive Clock Inversion */ -#define SSC_RCMR_CKG (0x3 << 6) /**< \brief (SSC_RCMR) Receive Clock Gating Selection */ -#define SSC_RCMR_CKG_NONE (0x0 << 6) /**< \brief (SSC_RCMR) None, continuous clock */ -#define SSC_RCMR_CKG_LOW (0x1 << 6) /**< \brief (SSC_RCMR) Receive Clock enabled only if RF Low */ -#define SSC_RCMR_CKG_HIGH (0x2 << 6) /**< \brief (SSC_RCMR) Receive Clock enabled only if RF High */ -#define SSC_RCMR_START (0xf << 8) /**< \brief (SSC_RCMR) Receive Start Selection */ -#define SSC_RCMR_STOP (0x1 << 12) /**< \brief (SSC_RCMR) Receive Stop Selection */ -#define SSC_RCMR_STTDLY (0xff << 16) /**< \brief (SSC_RCMR) Receive Start Delay */ -#define SSC_RCMR_PERIOD (0xff << 24) /**< \brief (SSC_RCMR) Receive Period Divider Selection */ -/* -------- SSC_RFMR : (SSC Offset: 0x14) Receive Frame Mode Register -------- */ -#define SSC_RFMR_DATLEN (0x1f << 0) /**< \brief (SSC_RFMR) Data Length */ -#define SSC_RFMR_LOOP (0x1 << 5) /**< \brief (SSC_RFMR) Loop Mode */ -#define SSC_RFMR_MSBF (0x1 << 7) /**< \brief (SSC_RFMR) Most Significant Bit First */ -#define SSC_RFMR_DATNB (0xf << 8) /**< \brief (SSC_RFMR) Data Number per Frame */ -#define SSC_RFMR_FSLEN (0xf << 16) /**< \brief (SSC_RFMR) Receive Frame Sync Length */ -#define SSC_RFMR_FSOS (0x7 << 20) /**< \brief (SSC_RFMR) Receive Frame Sync Output Selection */ -#define SSC_RFMR_FSEDGE (0x1 << 24) /**< \brief (SSC_RFMR) Frame Sync Edge Detection */ -#define SSC_RFMR_FSLEN_EXT (0xf << 28) /**< \brief (SSC_RFMR) FSLEN Field Extension */ -/* -------- SSC_TCMR : (SSC Offset: 0x18) Transmit Clock Mode Register -------- */ -#define SSC_TCMR_CKS (0x3 << 0) /**< \brief (SSC_TCMR) Transmit Clock Selection */ -#define SSC_TCMR_CKO (0x7 << 2) /**< \brief (SSC_TCMR) Transmit Clock Output Mode Selection */ -#define SSC_TCMR_CKI (0x1 << 5) /**< \brief (SSC_TCMR) Transmit Clock Inversion */ -#define SSC_TCMR_CKG (0x3 << 6) /**< \brief (SSC_TCMR) Transmit Clock Gating Selection */ -#define SSC_TCMR_START (0xf << 8) /**< \brief (SSC_TCMR) Transmit Start Selection */ -#define SSC_TCMR_STTDLY (0xff << 16) /**< \brief (SSC_TCMR) Transmit Start Delay */ -#define SSC_TCMR_PERIOD (0xff << 24) /**< \brief (SSC_TCMR) Transmit Period Divider Selection */ -/* -------- SSC_TFMR : (SSC Offset: 0x1C) Transmit Frame Mode Register -------- */ -#define SSC_TFMR_DATLEN (0x1f << 0) /**< \brief (SSC_TFMR) Data Length */ -#define SSC_TFMR_DATDEF (0x1 << 5) /**< \brief (SSC_TFMR) Data Default Value */ -#define SSC_TFMR_MSBF (0x1 << 7) /**< \brief (SSC_TFMR) Most Significant Bit First */ -#define SSC_TFMR_DATNB (0xf << 8) /**< \brief (SSC_TFMR) Data Number per frame */ -#define SSC_TFMR_FSLEN (0xf << 16) /**< \brief (SSC_TFMR) Transmit Frame Syn Length */ -#define SSC_TFMR_FSOS (0x7 << 20) /**< \brief (SSC_TFMR) Transmit Frame Sync Output Selection */ -#define SSC_TFMR_FSDEN (0x1 << 23) /**< \brief (SSC_TFMR) Frame Sync Data Enable */ -#define SSC_TFMR_FSEDGE (0x1 << 24) /**< \brief (SSC_TFMR) Frame Sync Edge Detection */ -#define SSC_TFMR_FSLEN_EXT (0xf << 28) /**< \brief (SSC_TFMR) FSLEN Field Extension */ -/* -------- SSC_RHR : (SSC Offset: 0x20) Receive Holding Register -------- */ -#define SSC_RHR_RDAT (0xffffffff << 0) /**< \brief (SSC_RHR) Receive Data */ -/* -------- SSC_THR : (SSC Offset: 0x24) Transmit Holding Register -------- */ -#define SSC_THR_TDAT (0xffffffff << 0) /**< \brief (SSC_THR) Transmit Data */ -/* -------- SSC_RSHR : (SSC Offset: 0x30) Receive Sync. Holding Register -------- */ -#define SSC_RSHR_RSDAT (0xffff << 0) /**< \brief (SSC_RSHR) Receive Synchronization Data */ -/* -------- SSC_TSHR : (SSC Offset: 0x34) Transmit Sync. Holding Register -------- */ -#define SSC_TSHR_TSDAT (0xffff << 0) /**< \brief (SSC_TSHR) Transmit Synchronization Data */ -/* -------- SSC_RC0R : (SSC Offset: 0x38) Receive Compare 0 Register -------- */ -#define SSC_RC0R_CP0 (0xffff << 0) /**< \brief (SSC_RC0R) Receive Compare Data 0 */ -/* -------- SSC_RC1R : (SSC Offset: 0x3C) Receive Compare 1 Register -------- */ -#define SSC_RC1R_CP1 (0xffff << 0) /**< \brief (SSC_RC1R) Receive Compare Data 1 */ -/* -------- SSC_SR : (SSC Offset: 0x40) Status Register -------- */ -#define SSC_SR_TXRDY (0x1 << 0) /**< \brief (SSC_SR) Transmit Ready */ -#define SSC_SR_TXEMPTY (0x1 << 1) /**< \brief (SSC_SR) Transmit Empty */ -#define SSC_SR_ENDTX (0x1 << 2) /**< \brief (SSC_SR) End of Transmission */ -#define SSC_SR_TXBUFE (0x1 << 3) /**< \brief (SSC_SR) Transmit Buffer Empty */ -#define SSC_SR_RXRDY (0x1 << 4) /**< \brief (SSC_SR) Receive Ready */ -#define SSC_SR_OVRUN (0x1 << 5) /**< \brief (SSC_SR) Receive Overrun */ -#define SSC_SR_ENDRX (0x1 << 6) /**< \brief (SSC_SR) End of Reception */ -#define SSC_SR_RXBUFF (0x1 << 7) /**< \brief (SSC_SR) Receive Buffer Full */ -#define SSC_SR_CP0 (0x1 << 8) /**< \brief (SSC_SR) Compare 0 */ -#define SSC_SR_CP1 (0x1 << 9) /**< \brief (SSC_SR) Compare 1 */ -#define SSC_SR_TXSYN (0x1 << 10) /**< \brief (SSC_SR) Transmit Sync */ -#define SSC_SR_RXSYN (0x1 << 11) /**< \brief (SSC_SR) Receive Sync */ -#define SSC_SR_TXEN (0x1 << 16) /**< \brief (SSC_SR) Transmit Enable */ -#define SSC_SR_RXEN (0x1 << 17) /**< \brief (SSC_SR) Receive Enable */ -/* -------- SSC_IER : (SSC Offset: 0x44) Interrupt Enable Register -------- */ -#define SSC_IER_TXRDY (0x1 << 0) /**< \brief (SSC_IER) Transmit Ready Interrupt Enable */ -#define SSC_IER_TXEMPTY (0x1 << 1) /**< \brief (SSC_IER) Transmit Empty Interrupt Enable */ -#define SSC_IER_ENDTX (0x1 << 2) /**< \brief (SSC_IER) End of Transmission Interrupt Enable */ -#define SSC_IER_TXBUFE (0x1 << 3) /**< \brief (SSC_IER) Transmit Buffer Empty Interrupt Enable */ -#define SSC_IER_RXRDY (0x1 << 4) /**< \brief (SSC_IER) Receive Ready Interrupt Enable */ -#define SSC_IER_OVRUN (0x1 << 5) /**< \brief (SSC_IER) Receive Overrun Interrupt Enable */ -#define SSC_IER_ENDRX (0x1 << 6) /**< \brief (SSC_IER) End of Reception Interrupt Enable */ -#define SSC_IER_RXBUFF (0x1 << 7) /**< \brief (SSC_IER) Receive Buffer Full Interrupt Enable */ -#define SSC_IER_CP0 (0x1 << 8) /**< \brief (SSC_IER) Compare 0 Interrupt Enable */ -#define SSC_IER_CP1 (0x1 << 9) /**< \brief (SSC_IER) Compare 1 Interrupt Enable */ -#define SSC_IER_TXSYN (0x1 << 10) /**< \brief (SSC_IER) Tx Sync Interrupt Enable */ -#define SSC_IER_RXSYN (0x1 << 11) /**< \brief (SSC_IER) Rx Sync Interrupt Enable */ -/* -------- SSC_IDR : (SSC Offset: 0x48) Interrupt Disable Register -------- */ -#define SSC_IDR_TXRDY (0x1 << 0) /**< \brief (SSC_IDR) Transmit Ready Interrupt Disable */ -#define SSC_IDR_TXEMPTY (0x1 << 1) /**< \brief (SSC_IDR) Transmit Empty Interrupt Disable */ -#define SSC_IDR_ENDTX (0x1 << 2) /**< \brief (SSC_IDR) End of Transmission Interrupt Disable */ -#define SSC_IDR_TXBUFE (0x1 << 3) /**< \brief (SSC_IDR) Transmit Buffer Empty Interrupt Disable */ -#define SSC_IDR_RXRDY (0x1 << 4) /**< \brief (SSC_IDR) Receive Ready Interrupt Disable */ -#define SSC_IDR_OVRUN (0x1 << 5) /**< \brief (SSC_IDR) Receive Overrun Interrupt Disable */ -#define SSC_IDR_ENDRX (0x1 << 6) /**< \brief (SSC_IDR) End of Reception Interrupt Disable */ -#define SSC_IDR_RXBUFF (0x1 << 7) /**< \brief (SSC_IDR) Receive Buffer Full Interrupt Disable */ -#define SSC_IDR_CP0 (0x1 << 8) /**< \brief (SSC_IDR) Compare 0 Interrupt Disable */ -#define SSC_IDR_CP1 (0x1 << 9) /**< \brief (SSC_IDR) Compare 1 Interrupt Disable */ -#define SSC_IDR_TXSYN (0x1 << 10) /**< \brief (SSC_IDR) Tx Sync Interrupt Enable */ -#define SSC_IDR_RXSYN (0x1 << 11) /**< \brief (SSC_IDR) Rx Sync Interrupt Enable */ -/* -------- SSC_IMR : (SSC Offset: 0x4C) Interrupt Mask Register -------- */ -#define SSC_IMR_TXRDY (0x1 << 0) /**< \brief (SSC_IMR) Transmit Ready Interrupt Mask */ -#define SSC_IMR_TXEMPTY (0x1 << 1) /**< \brief (SSC_IMR) Transmit Empty Interrupt Mask */ -#define SSC_IMR_ENDTX (0x1 << 2) /**< \brief (SSC_IMR) End of Transmission Interrupt Mask */ -#define SSC_IMR_TXBUFE (0x1 << 3) /**< \brief (SSC_IMR) Transmit Buffer Empty Interrupt Mask */ -#define SSC_IMR_RXRDY (0x1 << 4) /**< \brief (SSC_IMR) Receive Ready Interrupt Mask */ -#define SSC_IMR_OVRUN (0x1 << 5) /**< \brief (SSC_IMR) Receive Overrun Interrupt Mask */ -#define SSC_IMR_ENDRX (0x1 << 6) /**< \brief (SSC_IMR) End of Reception Interrupt Mask */ -#define SSC_IMR_RXBUFF (0x1 << 7) /**< \brief (SSC_IMR) Receive Buffer Full Interrupt Mask */ -#define SSC_IMR_CP0 (0x1 << 8) /**< \brief (SSC_IMR) Compare 0 Interrupt Mask */ -#define SSC_IMR_CP1 (0x1 << 9) /**< \brief (SSC_IMR) Compare 1 Interrupt Mask */ -#define SSC_IMR_TXSYN (0x1 << 10) /**< \brief (SSC_IMR) Tx Sync Interrupt Mask */ -#define SSC_IMR_RXSYN (0x1 << 11) /**< \brief (SSC_IMR) Rx Sync Interrupt Mask */ -/* -------- SSC_WPMR : (SSC Offset: 0xE4) Write Protect Mode Register -------- */ -#define SSC_WPMR_WPEN (0x1 << 0) /**< \brief (SSC_WPMR) Write Protect Enable */ -#define SSC_WPMR_WPKEY (0xffffff << 8) /**< \brief (SSC_WPMR) Write Protect KEY */ -/* -------- SSC_WPSR : (SSC Offset: 0xE8) Write Protect Status Register -------- */ -#define SSC_WPSR_WPVS (0x1 << 0) /**< \brief (SSC_WPSR) Write Protect Violation Status */ -#define SSC_WPSR_WPVSRC (0xffff << 8) /**< \brief (SSC_WPSR) Write Protect Violation Source */ -/* -------- SSC_RPR : (SSC Offset: 0x100) Receive Pointer Register -------- */ -#define SSC_RPR_RXPTR (0xffffffff << 0) /**< \brief (SSC_RPR) Receive Pointer Register */ -/* -------- SSC_RCR : (SSC Offset: 0x104) Receive Counter Register -------- */ -#define SSC_RCR_RXCTR (0xffff << 0) /**< \brief (SSC_RCR) Receive Counter Register */ -/* -------- SSC_TPR : (SSC Offset: 0x108) Transmit Pointer Register -------- */ -#define SSC_TPR_TXPTR (0xffffffff << 0) /**< \brief (SSC_TPR) Transmit Counter Register */ -/* -------- SSC_TCR : (SSC Offset: 0x10C) Transmit Counter Register -------- */ -#define SSC_TCR_TXCTR (0xffff << 0) /**< \brief (SSC_TCR) Transmit Counter Register */ -/* -------- SSC_RNPR : (SSC Offset: 0x110) Receive Next Pointer Register -------- */ -#define SSC_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (SSC_RNPR) Receive Next Pointer */ -/* -------- SSC_RNCR : (SSC Offset: 0x114) Receive Next Counter Register -------- */ -#define SSC_RNCR_RXNCTR (0xffff << 0) /**< \brief (SSC_RNCR) Receive Next Counter */ -/* -------- SSC_TNPR : (SSC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define SSC_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (SSC_TNPR) Transmit Next Pointer */ -/* -------- SSC_TNCR : (SSC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define SSC_TNCR_TXNCTR (0xffff << 0) /**< \brief (SSC_TNCR) Transmit Counter Next */ -/* -------- SSC_PTCR : (SSC Offset: 0x120) Transfer Control Register -------- */ -#define SSC_PTCR_RXTEN (0x1 << 0) /**< \brief (SSC_PTCR) Receiver Transfer Enable */ -#define SSC_PTCR_RXTDIS (0x1 << 1) /**< \brief (SSC_PTCR) Receiver Transfer Disable */ -#define SSC_PTCR_TXTEN (0x1 << 8) /**< \brief (SSC_PTCR) Transmitter Transfer Enable */ -#define SSC_PTCR_TXTDIS (0x1 << 9) /**< \brief (SSC_PTCR) Transmitter Transfer Disable */ -/* -------- SSC_PTSR : (SSC Offset: 0x124) Transfer Status Register -------- */ -#define SSC_PTSR_RXTEN (0x1 << 0) /**< \brief (SSC_PTSR) Receiver Transfer Enable */ -#define SSC_PTSR_TXTEN (0x1 << 8) /**< \brief (SSC_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Supply Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_SUPC Supply Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Supc hardware registers */ -typedef struct { - WoReg SUPC_CR; /**< \brief (Supc Offset: 0x00) Supply Controller Control Register */ - RwReg SUPC_SMMR; /**< \brief (Supc Offset: 0x04) Supply Controller Supply Monitor Mode Register */ - RwReg SUPC_MR; /**< \brief (Supc Offset: 0x08) Supply Controller Mode Register */ - RwReg SUPC_WUMR; /**< \brief (Supc Offset: 0x0C) Supply Controller Wake Up Mode Register */ - RwReg SUPC_WUIR; /**< \brief (Supc Offset: 0x10) Supply Controller Wake Up Inputs Register */ - RoReg SUPC_SR; /**< \brief (Supc Offset: 0x14) Supply Controller Status Register */ -} Supc; -#endif /* __ASSEMBLY__ */ -/* -------- SUPC_CR : (SUPC Offset: 0x00) Supply Controller Control Register -------- */ -#define SUPC_CR_VROFF (0x1 << 2) /**< \brief (SUPC_CR) Voltage Regulator Off */ -#define SUPC_CR_VROFF_NO_EFFECT (0x0 << 2) /**< \brief (SUPC_CR) no effect. */ -#define SUPC_CR_VROFF_STOP_VREG (0x1 << 2) /**< \brief (SUPC_CR) if KEY is correct, asserts vddcore_nreset and stops the voltage regulator. */ -#define SUPC_CR_XTALSEL (0x1 << 3) /**< \brief (SUPC_CR) Crystal Oscillator Select */ -#define SUPC_CR_XTALSEL_NO_EFFECT (0x0 << 3) /**< \brief (SUPC_CR) no effect. */ -#define SUPC_CR_XTALSEL_CRYSTAL_SEL (0x1 << 3) /**< \brief (SUPC_CR) if KEY is correct, switches the slow clock on the crystal oscillator output. */ -#define SUPC_CR_KEY (0xff << 24) /**< \brief (SUPC_CR) Password */ -/* -------- SUPC_SMMR : (SUPC Offset: 0x04) Supply Controller Supply Monitor Mode Register -------- */ -#define SUPC_SMMR_SMTH (0xf << 0) /**< \brief (SUPC_SMMR) Supply Monitor Threshold */ -#define SUPC_SMMR_SMTH_1_9V (0x0 << 0) /**< \brief (SUPC_SMMR) 1.9 V */ -#define SUPC_SMMR_SMTH_2_0V (0x1 << 0) /**< \brief (SUPC_SMMR) 2.0 V */ -#define SUPC_SMMR_SMTH_2_1V (0x2 << 0) /**< \brief (SUPC_SMMR) 2.1 V */ -#define SUPC_SMMR_SMTH_2_2V (0x3 << 0) /**< \brief (SUPC_SMMR) 2.2 V */ -#define SUPC_SMMR_SMTH_2_3V (0x4 << 0) /**< \brief (SUPC_SMMR) 2.3 V */ -#define SUPC_SMMR_SMTH_2_4V (0x5 << 0) /**< \brief (SUPC_SMMR) 2.4 V */ -#define SUPC_SMMR_SMTH_2_5V (0x6 << 0) /**< \brief (SUPC_SMMR) 2.5 V */ -#define SUPC_SMMR_SMTH_2_6V (0x7 << 0) /**< \brief (SUPC_SMMR) 2.6 V */ -#define SUPC_SMMR_SMTH_2_7V (0x8 << 0) /**< \brief (SUPC_SMMR) 2.7 V */ -#define SUPC_SMMR_SMTH_2_8V (0x9 << 0) /**< \brief (SUPC_SMMR) 2.8 V */ -#define SUPC_SMMR_SMTH_2_9V (0xA << 0) /**< \brief (SUPC_SMMR) 2.9 V */ -#define SUPC_SMMR_SMTH_3_0V (0xB << 0) /**< \brief (SUPC_SMMR) 3.0 V */ -#define SUPC_SMMR_SMTH_3_1V (0xC << 0) /**< \brief (SUPC_SMMR) 3.1 V */ -#define SUPC_SMMR_SMTH_3_2V (0xD << 0) /**< \brief (SUPC_SMMR) 3.2 V */ -#define SUPC_SMMR_SMTH_3_3V (0xE << 0) /**< \brief (SUPC_SMMR) 3.3 V */ -#define SUPC_SMMR_SMTH_3_4V (0xF << 0) /**< \brief (SUPC_SMMR) 3.4 V */ -#define SUPC_SMMR_SMSMPL (0x7 << 8) /**< \brief (SUPC_SMMR) Supply Monitor Sampling Period */ -#define SUPC_SMMR_SMSMPL_SMD (0x0 << 8) /**< \brief (SUPC_SMMR) Supply Monitor disabled */ -#define SUPC_SMMR_SMSMPL_CSM (0x1 << 8) /**< \brief (SUPC_SMMR) Continuous Supply Monitor */ -#define SUPC_SMMR_SMSMPL_32SLCK (0x2 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 32 SLCK periods */ -#define SUPC_SMMR_SMSMPL_256SLCK (0x3 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 256 SLCK periods */ -#define SUPC_SMMR_SMSMPL_2048SLCK (0x4 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 2,048 SLCK periods */ -#define SUPC_SMMR_SMRSTEN (0x1 << 12) /**< \brief (SUPC_SMMR) Supply Monitor Reset Enable */ -#define SUPC_SMMR_SMRSTEN_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_SMMR) the core reset signal "vddcore_nreset" is not affected when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMRSTEN_ENABLE (0x1 << 12) /**< \brief (SUPC_SMMR) the core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMIEN (0x1 << 13) /**< \brief (SUPC_SMMR) Supply Monitor Interrupt Enable */ -#define SUPC_SMMR_SMIEN_NOT_ENABLE (0x0 << 13) /**< \brief (SUPC_SMMR) the SUPC interrupt signal is not affected when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMIEN_ENABLE (0x1 << 13) /**< \brief (SUPC_SMMR) the SUPC interrupt signal is asserted when a supply monitor detection occurs. */ -/* -------- SUPC_MR : (SUPC Offset: 0x08) Supply Controller Mode Register -------- */ -#define SUPC_MR_BODRSTEN (0x1 << 12) /**< \brief (SUPC_MR) Brownout Detector Reset Enable */ -#define SUPC_MR_BODRSTEN_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_MR) the core reset signal "vddcore_nreset" is not affected when a brownout detection occurs. */ -#define SUPC_MR_BODRSTEN_ENABLE (0x1 << 12) /**< \brief (SUPC_MR) the core reset signal, vddcore_nreset is asserted when a brownout detection occurs. */ -#define SUPC_MR_BODDIS (0x1 << 13) /**< \brief (SUPC_MR) Brownout Detector Disable */ -#define SUPC_MR_BODDIS_ENABLE (0x0 << 13) /**< \brief (SUPC_MR) the core brownout detector is enabled. */ -#define SUPC_MR_BODDIS_DISABLE (0x1 << 13) /**< \brief (SUPC_MR) the core brownout detector is disabled. */ -#define SUPC_MR_ONREG (0x1 << 14) /**< \brief (SUPC_MR) Voltage Regulator enable */ -#define SUPC_MR_ONREG_ONREG_UNUSED (0x0 << 14) /**< \brief (SUPC_MR) Voltage Regulator is not used */ -#define SUPC_MR_ONREG_ONREG_USED (0x1 << 14) /**< \brief (SUPC_MR) Voltage Regulator is used */ -#define SUPC_MR_OSCBYPASS (0x1 << 20) /**< \brief (SUPC_MR) Oscillator Bypass */ -#define SUPC_MR_OSCBYPASS_NO_EFFECT (0x0 << 20) /**< \brief (SUPC_MR) no effect. Clock selection depends on XTALSEL value. */ -#define SUPC_MR_OSCBYPASS_BYPASS (0x1 << 20) /**< \brief (SUPC_MR) the 32-KHz XTAL oscillator is selected and is put in bypass mode. */ -#define SUPC_MR_KEY (0xff << 24) /**< \brief (SUPC_MR) Password Key */ -/* -------- SUPC_WUMR : (SUPC Offset: 0x0C) Supply Controller Wake Up Mode Register -------- */ -#define SUPC_WUMR_SMEN (0x1 << 1) /**< \brief (SUPC_WUMR) Supply Monitor Wake Up Enable */ -#define SUPC_WUMR_SMEN_NOT_ENABLE (0x0 << 1) /**< \brief (SUPC_WUMR) the supply monitor detection has no wake up effect. */ -#define SUPC_WUMR_SMEN_ENABLE (0x1 << 1) /**< \brief (SUPC_WUMR) the supply monitor detection forces the wake up of the core power supply. */ -#define SUPC_WUMR_RTTEN (0x1 << 2) /**< \brief (SUPC_WUMR) Real Time Timer Wake Up Enable */ -#define SUPC_WUMR_RTTEN_NOT_ENABLE (0x0 << 2) /**< \brief (SUPC_WUMR) the RTT alarm signal has no wake up effect. */ -#define SUPC_WUMR_RTTEN_ENABLE (0x1 << 2) /**< \brief (SUPC_WUMR) the RTT alarm signal forces the wake up of the core power supply. */ -#define SUPC_WUMR_RTCEN (0x1 << 3) /**< \brief (SUPC_WUMR) Real Time Clock Wake Up Enable */ -#define SUPC_WUMR_RTCEN_NOT_ENABLE (0x0 << 3) /**< \brief (SUPC_WUMR) the RTC alarm signal has no wake up effect. */ -#define SUPC_WUMR_RTCEN_ENABLE (0x1 << 3) /**< \brief (SUPC_WUMR) the RTC alarm signal forces the wake up of the core power supply. */ -#define SUPC_WUMR_WKUPDBC (0x7 << 12) /**< \brief (SUPC_WUMR) Wake Up Inputs Debouncer */ -#define SUPC_WUMR_WKUPDBC_1SCLK (0x0 << 12) /**< \brief (SUPC_WUMR) Immediate, no debouncing, detected active at least on one Slow Clock edge. */ -#define SUPC_WUMR_WKUPDBC_3SCLK (0x1 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 3 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_32SCLK (0x2 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 32 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_512SCLK (0x3 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 512 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_4096SCLK (0x4 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 4,096 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_32768SCLK (0x5 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 32,768 SLCK periods */ -/* -------- SUPC_WUIR : (SUPC Offset: 0x10) Supply Controller Wake Up Inputs Register -------- */ -#define SUPC_WUIR_WKUPEN0 (0x1 << 0) /**< \brief (SUPC_WUIR) Wake Up Input Enable 0 */ -#define SUPC_WUIR_WKUPEN0_NOT_ENABLE (0x0 << 0) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN0_ENABLE (0x1 << 0) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN1 (0x1 << 1) /**< \brief (SUPC_WUIR) Wake Up Input Enable 1 */ -#define SUPC_WUIR_WKUPEN1_NOT_ENABLE (0x0 << 1) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN1_ENABLE (0x1 << 1) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN2 (0x1 << 2) /**< \brief (SUPC_WUIR) Wake Up Input Enable 2 */ -#define SUPC_WUIR_WKUPEN2_NOT_ENABLE (0x0 << 2) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN2_ENABLE (0x1 << 2) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN3 (0x1 << 3) /**< \brief (SUPC_WUIR) Wake Up Input Enable 3 */ -#define SUPC_WUIR_WKUPEN3_NOT_ENABLE (0x0 << 3) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN3_ENABLE (0x1 << 3) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN4 (0x1 << 4) /**< \brief (SUPC_WUIR) Wake Up Input Enable 4 */ -#define SUPC_WUIR_WKUPEN4_NOT_ENABLE (0x0 << 4) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN4_ENABLE (0x1 << 4) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN5 (0x1 << 5) /**< \brief (SUPC_WUIR) Wake Up Input Enable 5 */ -#define SUPC_WUIR_WKUPEN5_NOT_ENABLE (0x0 << 5) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN5_ENABLE (0x1 << 5) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN6 (0x1 << 6) /**< \brief (SUPC_WUIR) Wake Up Input Enable 6 */ -#define SUPC_WUIR_WKUPEN6_NOT_ENABLE (0x0 << 6) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN6_ENABLE (0x1 << 6) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN7 (0x1 << 7) /**< \brief (SUPC_WUIR) Wake Up Input Enable 7 */ -#define SUPC_WUIR_WKUPEN7_NOT_ENABLE (0x0 << 7) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN7_ENABLE (0x1 << 7) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN8 (0x1 << 8) /**< \brief (SUPC_WUIR) Wake Up Input Enable 8 */ -#define SUPC_WUIR_WKUPEN8_NOT_ENABLE (0x0 << 8) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN8_ENABLE (0x1 << 8) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN9 (0x1 << 9) /**< \brief (SUPC_WUIR) Wake Up Input Enable 9 */ -#define SUPC_WUIR_WKUPEN9_NOT_ENABLE (0x0 << 9) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN9_ENABLE (0x1 << 9) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN10 (0x1 << 10) /**< \brief (SUPC_WUIR) Wake Up Input Enable 10 */ -#define SUPC_WUIR_WKUPEN10_NOT_ENABLE (0x0 << 10) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN10_ENABLE (0x1 << 10) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN11 (0x1 << 11) /**< \brief (SUPC_WUIR) Wake Up Input Enable 11 */ -#define SUPC_WUIR_WKUPEN11_NOT_ENABLE (0x0 << 11) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN11_ENABLE (0x1 << 11) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN12 (0x1 << 12) /**< \brief (SUPC_WUIR) Wake Up Input Enable 12 */ -#define SUPC_WUIR_WKUPEN12_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN12_ENABLE (0x1 << 12) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN13 (0x1 << 13) /**< \brief (SUPC_WUIR) Wake Up Input Enable 13 */ -#define SUPC_WUIR_WKUPEN13_NOT_ENABLE (0x0 << 13) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN13_ENABLE (0x1 << 13) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN14 (0x1 << 14) /**< \brief (SUPC_WUIR) Wake Up Input Enable 14 */ -#define SUPC_WUIR_WKUPEN14_NOT_ENABLE (0x0 << 14) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN14_ENABLE (0x1 << 14) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN15 (0x1 << 15) /**< \brief (SUPC_WUIR) Wake Up Input Enable 15 */ -#define SUPC_WUIR_WKUPEN15_NOT_ENABLE (0x0 << 15) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN15_ENABLE (0x1 << 15) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT0 (0x1 << 16) /**< \brief (SUPC_WUIR) Wake Up Input Transition 0 */ -#define SUPC_WUIR_WKUPT0_HIGH_TO_LOW (0x0 << 16) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT0_LOW_TO_HIGH (0x1 << 16) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT1 (0x1 << 17) /**< \brief (SUPC_WUIR) Wake Up Input Transition 1 */ -#define SUPC_WUIR_WKUPT1_HIGH_TO_LOW (0x0 << 17) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT1_LOW_TO_HIGH (0x1 << 17) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT2 (0x1 << 18) /**< \brief (SUPC_WUIR) Wake Up Input Transition 2 */ -#define SUPC_WUIR_WKUPT2_HIGH_TO_LOW (0x0 << 18) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT2_LOW_TO_HIGH (0x1 << 18) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT3 (0x1 << 19) /**< \brief (SUPC_WUIR) Wake Up Input Transition 3 */ -#define SUPC_WUIR_WKUPT3_HIGH_TO_LOW (0x0 << 19) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT3_LOW_TO_HIGH (0x1 << 19) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT4 (0x1 << 20) /**< \brief (SUPC_WUIR) Wake Up Input Transition 4 */ -#define SUPC_WUIR_WKUPT4_HIGH_TO_LOW (0x0 << 20) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT4_LOW_TO_HIGH (0x1 << 20) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT5 (0x1 << 21) /**< \brief (SUPC_WUIR) Wake Up Input Transition 5 */ -#define SUPC_WUIR_WKUPT5_HIGH_TO_LOW (0x0 << 21) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT5_LOW_TO_HIGH (0x1 << 21) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT6 (0x1 << 22) /**< \brief (SUPC_WUIR) Wake Up Input Transition 6 */ -#define SUPC_WUIR_WKUPT6_HIGH_TO_LOW (0x0 << 22) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT6_LOW_TO_HIGH (0x1 << 22) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT7 (0x1 << 23) /**< \brief (SUPC_WUIR) Wake Up Input Transition 7 */ -#define SUPC_WUIR_WKUPT7_HIGH_TO_LOW (0x0 << 23) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT7_LOW_TO_HIGH (0x1 << 23) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT8 (0x1 << 24) /**< \brief (SUPC_WUIR) Wake Up Input Transition 8 */ -#define SUPC_WUIR_WKUPT8_HIGH_TO_LOW (0x0 << 24) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT8_LOW_TO_HIGH (0x1 << 24) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT9 (0x1 << 25) /**< \brief (SUPC_WUIR) Wake Up Input Transition 9 */ -#define SUPC_WUIR_WKUPT9_HIGH_TO_LOW (0x0 << 25) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT9_LOW_TO_HIGH (0x1 << 25) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT10 (0x1 << 26) /**< \brief (SUPC_WUIR) Wake Up Input Transition 10 */ -#define SUPC_WUIR_WKUPT10_HIGH_TO_LOW (0x0 << 26) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT10_LOW_TO_HIGH (0x1 << 26) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT11 (0x1 << 27) /**< \brief (SUPC_WUIR) Wake Up Input Transition 11 */ -#define SUPC_WUIR_WKUPT11_HIGH_TO_LOW (0x0 << 27) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT11_LOW_TO_HIGH (0x1 << 27) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT12 (0x1 << 28) /**< \brief (SUPC_WUIR) Wake Up Input Transition 12 */ -#define SUPC_WUIR_WKUPT12_HIGH_TO_LOW (0x0 << 28) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT12_LOW_TO_HIGH (0x1 << 28) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT13 (0x1 << 29) /**< \brief (SUPC_WUIR) Wake Up Input Transition 13 */ -#define SUPC_WUIR_WKUPT13_HIGH_TO_LOW (0x0 << 29) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT13_LOW_TO_HIGH (0x1 << 29) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT14 (0x1 << 30) /**< \brief (SUPC_WUIR) Wake Up Input Transition 14 */ -#define SUPC_WUIR_WKUPT14_HIGH_TO_LOW (0x0 << 30) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT14_LOW_TO_HIGH (0x1 << 30) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT15 (0x1 << 31) /**< \brief (SUPC_WUIR) Wake Up Input Transition 15 */ -#define SUPC_WUIR_WKUPT15_HIGH_TO_LOW (0x0 << 31) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT15_LOW_TO_HIGH (0x1 << 31) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -/* -------- SUPC_SR : (SUPC Offset: 0x14) Supply Controller Status Register -------- */ -#define SUPC_SR_WKUPS (0x1 << 1) /**< \brief (SUPC_SR) WKUP Wake Up Status */ -#define SUPC_SR_WKUPS_NO (0x0 << 1) /**< \brief (SUPC_SR) no wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_WKUPS_PRESENT (0x1 << 1) /**< \brief (SUPC_SR) at least one wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_SMWS (0x1 << 2) /**< \brief (SUPC_SR) Supply Monitor Detection Wake Up Status */ -#define SUPC_SR_SMWS_NO (0x0 << 2) /**< \brief (SUPC_SR) no wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_SMWS_PRESENT (0x1 << 2) /**< \brief (SUPC_SR) at least one wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_BODRSTS (0x1 << 3) /**< \brief (SUPC_SR) Brownout Detector Reset Status */ -#define SUPC_SR_BODRSTS_NO (0x0 << 3) /**< \brief (SUPC_SR) no core brownout rising edge event has been detected since the last read of the SUPC_SR. */ -#define SUPC_SR_BODRSTS_PRESENT (0x1 << 3) /**< \brief (SUPC_SR) at least one brownout output rising edge event has been detected since the last read of the SUPC_SR. */ -#define SUPC_SR_SMRSTS (0x1 << 4) /**< \brief (SUPC_SR) Supply Monitor Reset Status */ -#define SUPC_SR_SMRSTS_NO (0x0 << 4) /**< \brief (SUPC_SR) no supply monitor detection has generated a core reset since the last read of the SUPC_SR. */ -#define SUPC_SR_SMRSTS_PRESENT (0x1 << 4) /**< \brief (SUPC_SR) at least one supply monitor detection has generated a core reset since the last read of the SUPC_SR. */ -#define SUPC_SR_SMS (0x1 << 5) /**< \brief (SUPC_SR) Supply Monitor Status */ -#define SUPC_SR_SMS_NO (0x0 << 5) /**< \brief (SUPC_SR) no supply monitor detection since the last read of SUPC_SR. */ -#define SUPC_SR_SMS_PRESENT (0x1 << 5) /**< \brief (SUPC_SR) at least one supply monitor detection since the last read of SUPC_SR. */ -#define SUPC_SR_SMOS (0x1 << 6) /**< \brief (SUPC_SR) Supply Monitor Output Status */ -#define SUPC_SR_SMOS_HIGH (0x0 << 6) /**< \brief (SUPC_SR) the supply monitor detected VDDIO higher than its threshold at its last measurement. */ -#define SUPC_SR_SMOS_LOW (0x1 << 6) /**< \brief (SUPC_SR) the supply monitor detected VDDIO lower than its threshold at its last measurement. */ -#define SUPC_SR_OSCSEL (0x1 << 7) /**< \brief (SUPC_SR) 32-kHz Oscillator Selection Status */ -#define SUPC_SR_OSCSEL_RC (0x0 << 7) /**< \brief (SUPC_SR) the slow clock, SLCK is generated by the embedded 32-kHz RC oscillator. */ -#define SUPC_SR_OSCSEL_CRYST (0x1 << 7) /**< \brief (SUPC_SR) the slow clock, SLCK is generated by the 32-kHz crystal oscillator. */ -#define SUPC_SR_WKUPIS0 (0x1 << 16) /**< \brief (SUPC_SR) WKUP Input Status 0 */ -#define SUPC_SR_WKUPIS0_DIS (0x0 << 16) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS0_EN (0x1 << 16) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS1 (0x1 << 17) /**< \brief (SUPC_SR) WKUP Input Status 1 */ -#define SUPC_SR_WKUPIS1_DIS (0x0 << 17) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS1_EN (0x1 << 17) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS2 (0x1 << 18) /**< \brief (SUPC_SR) WKUP Input Status 2 */ -#define SUPC_SR_WKUPIS2_DIS (0x0 << 18) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS2_EN (0x1 << 18) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS3 (0x1 << 19) /**< \brief (SUPC_SR) WKUP Input Status 3 */ -#define SUPC_SR_WKUPIS3_DIS (0x0 << 19) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS3_EN (0x1 << 19) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS4 (0x1 << 20) /**< \brief (SUPC_SR) WKUP Input Status 4 */ -#define SUPC_SR_WKUPIS4_DIS (0x0 << 20) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS4_EN (0x1 << 20) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS5 (0x1 << 21) /**< \brief (SUPC_SR) WKUP Input Status 5 */ -#define SUPC_SR_WKUPIS5_DIS (0x0 << 21) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS5_EN (0x1 << 21) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS6 (0x1 << 22) /**< \brief (SUPC_SR) WKUP Input Status 6 */ -#define SUPC_SR_WKUPIS6_DIS (0x0 << 22) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS6_EN (0x1 << 22) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS7 (0x1 << 23) /**< \brief (SUPC_SR) WKUP Input Status 7 */ -#define SUPC_SR_WKUPIS7_DIS (0x0 << 23) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS7_EN (0x1 << 23) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS8 (0x1 << 24) /**< \brief (SUPC_SR) WKUP Input Status 8 */ -#define SUPC_SR_WKUPIS8_DIS (0x0 << 24) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS8_EN (0x1 << 24) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS9 (0x1 << 25) /**< \brief (SUPC_SR) WKUP Input Status 9 */ -#define SUPC_SR_WKUPIS9_DIS (0x0 << 25) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS9_EN (0x1 << 25) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS10 (0x1 << 26) /**< \brief (SUPC_SR) WKUP Input Status 10 */ -#define SUPC_SR_WKUPIS10_DIS (0x0 << 26) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS10_EN (0x1 << 26) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS11 (0x1 << 27) /**< \brief (SUPC_SR) WKUP Input Status 11 */ -#define SUPC_SR_WKUPIS11_DIS (0x0 << 27) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS11_EN (0x1 << 27) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS12 (0x1 << 28) /**< \brief (SUPC_SR) WKUP Input Status 12 */ -#define SUPC_SR_WKUPIS12_DIS (0x0 << 28) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS12_EN (0x1 << 28) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS13 (0x1 << 29) /**< \brief (SUPC_SR) WKUP Input Status 13 */ -#define SUPC_SR_WKUPIS13_DIS (0x0 << 29) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS13_EN (0x1 << 29) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS14 (0x1 << 30) /**< \brief (SUPC_SR) WKUP Input Status 14 */ -#define SUPC_SR_WKUPIS14_DIS (0x0 << 30) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS14_EN (0x1 << 30) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS15 (0x1 << 31) /**< \brief (SUPC_SR) WKUP Input Status 15 */ -#define SUPC_SR_WKUPIS15_DIS (0x0 << 31) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS15_EN (0x1 << 31) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Timer Counter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_TC Timer Counter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief TcChannel hardware registers */ -typedef struct { - RwReg TC_CCR; /**< \brief (TcChannel Offset: 0x0) Channel Control Register */ - RwReg TC_CMR; /**< \brief (TcChannel Offset: 0x4) Channel Mode Register */ - RwReg Reserved1[2]; - RwReg TC_CV; /**< \brief (TcChannel Offset: 0x10) Counter Value */ - RwReg TC_RA; /**< \brief (TcChannel Offset: 0x14) Register A */ - RwReg TC_RB; /**< \brief (TcChannel Offset: 0x18) Register B */ - RwReg TC_RC; /**< \brief (TcChannel Offset: 0x1C) Register C */ - RwReg TC_SR; /**< \brief (TcChannel Offset: 0x20) Status Register */ - RwReg TC_IER; /**< \brief (TcChannel Offset: 0x24) Interrupt Enable Register */ - RwReg TC_IDR; /**< \brief (TcChannel Offset: 0x28) Interrupt Disable Register */ - RwReg TC_IMR; /**< \brief (TcChannel Offset: 0x2C) Interrupt Mask Register */ - RwReg Reserved2[4]; -} TcChannel; -/** \brief Tc hardware registers */ -typedef struct { - TcChannel TC_CHANNEL[3]; /**< \brief (Tc Offset: 0x0) channel = 0 .. 2 */ - WoReg TC_BCR; /**< \brief (Tc Offset: 0xC0) Block Control Register */ - RwReg TC_BMR; /**< \brief (Tc Offset: 0xC4) Block Mode Register */ - WoReg TC_QIER; /**< \brief (Tc Offset: 0xC8) QDEC Interrupt Enable Register */ - WoReg TC_QIDR; /**< \brief (Tc Offset: 0xCC) QDEC Interrupt Disable Register */ - RoReg TC_QIMR; /**< \brief (Tc Offset: 0xD0) QDEC Interrupt Mask Register */ - RoReg TC_QISR; /**< \brief (Tc Offset: 0xD4) QDEC Interrupt Status Register */ - RwReg TC_FMR; /**< \brief (Tc Offset: 0xD8) Fault Mode Register */ - RwReg Reserved1[2]; - RwReg TC_WPMR; /**< \brief (Tc Offset: 0xE4) Write Protect Mode Register */ - RwReg Reserved2[5]; - RoReg TC_VER; /**< \brief (Tc Offset: 0xFC) Version Register */ -} Tc; -#endif /* __ASSEMBLY__ */ -/* -------- TC_CCR0 : (TC Offset: 0x0) Channel Control Register (channel = 0) -------- */ -#define TC_CCR0_CLKEN (0x1 << 0) /**< \brief (TC_CCR0) Counter Clock Enable Command */ -#define TC_CCR0_CLKDIS (0x1 << 1) /**< \brief (TC_CCR0) Counter Clock Disable Command */ -#define TC_CCR0_SWTRG (0x1 << 2) /**< \brief (TC_CCR0) Software Trigger Command */ -/* -------- TC_CMR0 : (TC Offset: 0x4) Channel Mode Register (channel = 0) -------- */ -#define TC_CMR0_TCCLKS (0x7 << 0) /**< \brief (TC_CMR0) Clock Selection */ -#define TC_CM0_TCCLKS_TIMER_DIV1_CLOCK (0x0 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV1_CLOCK*/ -#define TC_CM0_TCCLKS_TIMER_DIV2_CLOCK (0x1 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV2_CLOCK*/ -#define TC_CM0_TCCLKS_TIMER_DIV3_CLOCK (0x2 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV3_CLOCK*/ -#define TC_CM0_TCCLKS_TIMER_DIV4_CLOCK (0x3 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV4_CLOCK*/ -#define TC_CM0_TCCLKS_TIMER_DIV5_CLOCK (0x4 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV5_CLOCK*/ -#define TC_CM0_TCCLKS_XC0 (0x5 << 0) /**< (TC_CMR0) Clock selected: XC0*/ -#define TC_CM0_TCCLKS_XC1 (0x6 << 0) /**< (TC_CMR0) Clock selected: XC1*/ -#define TC_CM0_TCCLKS_XC2 (0x7 << 0) /**< (TC_CMR0) Clock selected: XC2*/ -#define TC_CMR0_CLKI (0x1 << 3) /**< \brief (TC_CMR0) Clock Invert */ -#define TC_CMR0_BURST (0x3 << 4) /**< \brief (TC_CMR0) Burst Signal Selection */ -#define TC_CMR0_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR0) The clock is not gated by an external signal. */ -#define TC_CMR0_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR0) XC0 is ANDed with the selected clock. */ -#define TC_CMR0_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR0) XC1 is ANDed with the selected clock. */ -#define TC_CMR0_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR0) XC2 is ANDed with the selected clock. */ -#define TC_CMR0_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR0) Counter Clock Stopped with RB Loading */ -#define TC_CMR0_LDBDIS (0x1 << 7) /**< \brief (TC_CMR0) Counter Clock Disable with RB Loading */ -#define TC_CMR0_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR0) External Trigger Edge Selection */ -#define TC_CMR0_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR0) none */ -#define TC_CMR0_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR0) rising edge */ -#define TC_CMR0_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR0) falling edge */ -#define TC_CMR0_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR0) each edge */ -#define TC_CMR0_ABETRG (0x1 << 10) /**< \brief (TC_CMR0) TIOA or TIOB External Trigger Selection */ -#define TC_CMR0_CPCTRG (0x1 << 14) /**< \brief (TC_CMR0) RC Compare Trigger Enable */ -#define TC_CMR0_WAVE (0x1 << 15) /**< \brief (TC_CMR0) */ -#define TC_CMR0_LDRA (0x3 << 16) /**< \brief (TC_CMR0) RA Loading Selection */ -#define TC_CMR0_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR0) none */ -#define TC_CMR0_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR0) rising edge of TIOA */ -#define TC_CMR0_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR0) falling edge of TIOA */ -#define TC_CMR0_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR0) each edge of TIOA */ -#define TC_CMR0_LDRB (0x3 << 18) /**< \brief (TC_CMR0) RB Loading Selection */ -#define TC_CMR0_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR0) none */ -#define TC_CMR0_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR0) rising edge of TIOA */ -#define TC_CMR0_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR0) falling edge of TIOA */ -#define TC_CMR0_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR0) each edge of TIOA */ - -#define TC_CMR0_ACPA_NONE (0x0 << 16) // (TC) Effect: none -#define TC_CMR0_ACPA_SET (0x1 << 16) // (TC) Effect: set -#define TC_CMR0_ACPA_CLEAR (0x2 << 16) // (TC) Effect: clear -#define TC_CMR0_ACPA_TOGGLE (0x3 << 16) // (TC) Effect: toggle - -#define TC_CMR0_ACPC_NONE (0x0 << 18) // (TC) Effect: none -#define TC_CMR0_ACPC_SET (0x1 << 18) // (TC) Effect: set -#define TC_CMR0_ACPC_CLEAR (0x2 << 18) // (TC) Effect: clear -#define TC_CMR0_ACPC_TOGGLE (0x3 << 18) // (TC) Effect: toggle -/* -------- TC_CV0 : (TC Offset: 0x10) Counter Value (channel = 0) -------- */ -#define TC_CV0_CV (0xffff << 0) /**< \brief (TC_CV0) Counter Value */ -/* -------- TC_RA0 : (TC Offset: 0x14) Register A (channel = 0) -------- */ -#define TC_RA0_RA (0xffff << 0) /**< \brief (TC_RA0) Register A */ -/* -------- TC_RB0 : (TC Offset: 0x18) Register B (channel = 0) -------- */ -#define TC_RB0_RB (0xffff << 0) /**< \brief (TC_RB0) Register B */ -/* -------- TC_RC0 : (TC Offset: 0x1C) Register C (channel = 0) -------- */ -#define TC_RC0_RC (0xffff << 0) /**< \brief (TC_RC0) Register C */ -/* -------- TC_SR0 : (TC Offset: 0x20) Status Register (channel = 0) -------- */ -#define TC_SR0_COVFS (0x1 << 0) /**< \brief (TC_SR0) Counter Overflow Status */ -#define TC_SR0_LOVRS (0x1 << 1) /**< \brief (TC_SR0) Load Overrun Status */ -#define TC_SR0_CPAS (0x1 << 2) /**< \brief (TC_SR0) RA Compare Status */ -#define TC_SR0_CPBS (0x1 << 3) /**< \brief (TC_SR0) RB Compare Status */ -#define TC_SR0_CPCS (0x1 << 4) /**< \brief (TC_SR0) RC Compare Status */ -#define TC_SR0_LDRAS (0x1 << 5) /**< \brief (TC_SR0) RA Loading Status */ -#define TC_SR0_LDRBS (0x1 << 6) /**< \brief (TC_SR0) RB Loading Status */ -#define TC_SR0_ETRGS (0x1 << 7) /**< \brief (TC_SR0) External Trigger Status */ -#define TC_SR0_CLKSTA (0x1 << 16) /**< \brief (TC_SR0) Clock Enabling Status */ -#define TC_SR0_MTIOA (0x1 << 17) /**< \brief (TC_SR0) TIOA Mirror */ -#define TC_SR0_MTIOB (0x1 << 18) /**< \brief (TC_SR0) TIOB Mirror */ -/* -------- TC_IER0 : (TC Offset: 0x24) Interrupt Enable Register (channel = 0) -------- */ -#define TC_IER0_COVFS (0x1 << 0) /**< \brief (TC_IER0) Counter Overflow */ -#define TC_IER0_LOVRS (0x1 << 1) /**< \brief (TC_IER0) Load Overrun */ -#define TC_IER0_CPAS (0x1 << 2) /**< \brief (TC_IER0) RA Compare */ -#define TC_IER0_CPBS (0x1 << 3) /**< \brief (TC_IER0) RB Compare */ -#define TC_IER0_CPCS (0x1 << 4) /**< \brief (TC_IER0) RC Compare */ -#define TC_IER0_LDRAS (0x1 << 5) /**< \brief (TC_IER0) RA Loading */ -#define TC_IER0_LDRBS (0x1 << 6) /**< \brief (TC_IER0) RB Loading */ -#define TC_IER0_ETRGS (0x1 << 7) /**< \brief (TC_IER0) External Trigger */ -/* -------- TC_IDR0 : (TC Offset: 0x28) Interrupt Disable Register (channel = 0) -------- */ -#define TC_IDR0_COVFS (0x1 << 0) /**< \brief (TC_IDR0) Counter Overflow */ -#define TC_IDR0_LOVRS (0x1 << 1) /**< \brief (TC_IDR0) Load Overrun */ -#define TC_IDR0_CPAS (0x1 << 2) /**< \brief (TC_IDR0) RA Compare */ -#define TC_IDR0_CPBS (0x1 << 3) /**< \brief (TC_IDR0) RB Compare */ -#define TC_IDR0_CPCS (0x1 << 4) /**< \brief (TC_IDR0) RC Compare */ -#define TC_IDR0_LDRAS (0x1 << 5) /**< \brief (TC_IDR0) RA Loading */ -#define TC_IDR0_LDRBS (0x1 << 6) /**< \brief (TC_IDR0) RB Loading */ -#define TC_IDR0_ETRGS (0x1 << 7) /**< \brief (TC_IDR0) External Trigger */ -/* -------- TC_IMR0 : (TC Offset: 0x2C) Interrupt Mask Register (channel = 0) -------- */ -#define TC_IMR0_COVFS (0x1 << 0) /**< \brief (TC_IMR0) Counter Overflow */ -#define TC_IMR0_LOVRS (0x1 << 1) /**< \brief (TC_IMR0) Load Overrun */ -#define TC_IMR0_CPAS (0x1 << 2) /**< \brief (TC_IMR0) RA Compare */ -#define TC_IMR0_CPBS (0x1 << 3) /**< \brief (TC_IMR0) RB Compare */ -#define TC_IMR0_CPCS (0x1 << 4) /**< \brief (TC_IMR0) RC Compare */ -#define TC_IMR0_LDRAS (0x1 << 5) /**< \brief (TC_IMR0) RA Loading */ -#define TC_IMR0_LDRBS (0x1 << 6) /**< \brief (TC_IMR0) RB Loading */ -#define TC_IMR0_ETRGS (0x1 << 7) /**< \brief (TC_IMR0) External Trigger */ -/* -------- TC_CCR1 : (TC Offset: 0x40) Channel Control Register (channel = 1) -------- */ -#define TC_CCR1_CLKEN (0x1 << 0) /**< \brief (TC_CCR1) Counter Clock Enable Command */ -#define TC_CCR1_CLKDIS (0x1 << 1) /**< \brief (TC_CCR1) Counter Clock Disable Command */ -#define TC_CCR1_SWTRG (0x1 << 2) /**< \brief (TC_CCR1) Software Trigger Command */ -/* -------- TC_CMR1 : (TC Offset: 0x44) Channel Mode Register (channel = 1) -------- */ -#define TC_CMR1_TCCLKS (0x7 << 0) /**< \brief (TC_CMR1) Clock Selection */ -#define TC_CMR1_CLKI (0x1 << 3) /**< \brief (TC_CMR1) Clock Invert */ -#define TC_CMR1_BURST (0x3 << 4) /**< \brief (TC_CMR1) Burst Signal Selection */ -#define TC_CMR1_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR1) The clock is not gated by an external signal. */ -#define TC_CMR1_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR1) XC0 is ANDed with the selected clock. */ -#define TC_CMR1_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR1) XC1 is ANDed with the selected clock. */ -#define TC_CMR1_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR1) XC2 is ANDed with the selected clock. */ -#define TC_CMR1_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR1) Counter Clock Stopped with RB Loading */ -#define TC_CMR1_LDBDIS (0x1 << 7) /**< \brief (TC_CMR1) Counter Clock Disable with RB Loading */ -#define TC_CMR1_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR1) External Trigger Edge Selection */ -#define TC_CMR1_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR1) none */ -#define TC_CMR1_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR1) rising edge */ -#define TC_CMR1_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR1) falling edge */ -#define TC_CMR1_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR1) each edge */ -#define TC_CMR1_ABETRG (0x1 << 10) /**< \brief (TC_CMR1) TIOA or TIOB External Trigger Selection */ -#define TC_CMR1_CPCTRG (0x1 << 14) /**< \brief (TC_CMR1) RC Compare Trigger Enable */ -#define TC_CMR1_WAVE (0x1 << 15) /**< \brief (TC_CMR1) */ -#define TC_CMR1_LDRA (0x3 << 16) /**< \brief (TC_CMR1) RA Loading Selection */ -#define TC_CMR1_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR1) none */ -#define TC_CMR1_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR1) rising edge of TIOA */ -#define TC_CMR1_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR1) falling edge of TIOA */ -#define TC_CMR1_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR1) each edge of TIOA */ -#define TC_CMR1_LDRB (0x3 << 18) /**< \brief (TC_CMR1) RB Loading Selection */ -#define TC_CMR1_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR1) none */ -#define TC_CMR1_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR1) rising edge of TIOA */ -#define TC_CMR1_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR1) falling edge of TIOA */ -#define TC_CMR1_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR1) each edge of TIOA */ -/* -------- TC_CV1 : (TC Offset: 0x50) Counter Value (channel = 1) -------- */ -#define TC_CV1_CV (0xffff << 0) /**< \brief (TC_CV1) Counter Value */ -/* -------- TC_RA1 : (TC Offset: 0x54) Register A (channel = 1) -------- */ -#define TC_RA1_RA (0xffff << 0) /**< \brief (TC_RA1) Register A */ -/* -------- TC_RB1 : (TC Offset: 0x58) Register B (channel = 1) -------- */ -#define TC_RB1_RB (0xffff << 0) /**< \brief (TC_RB1) Register B */ -/* -------- TC_RC1 : (TC Offset: 0x5C) Register C (channel = 1) -------- */ -#define TC_RC1_RC (0xffff << 0) /**< \brief (TC_RC1) Register C */ -/* -------- TC_SR1 : (TC Offset: 0x60) Status Register (channel = 1) -------- */ -#define TC_SR1_COVFS (0x1 << 0) /**< \brief (TC_SR1) Counter Overflow Status */ -#define TC_SR1_LOVRS (0x1 << 1) /**< \brief (TC_SR1) Load Overrun Status */ -#define TC_SR1_CPAS (0x1 << 2) /**< \brief (TC_SR1) RA Compare Status */ -#define TC_SR1_CPBS (0x1 << 3) /**< \brief (TC_SR1) RB Compare Status */ -#define TC_SR1_CPCS (0x1 << 4) /**< \brief (TC_SR1) RC Compare Status */ -#define TC_SR1_LDRAS (0x1 << 5) /**< \brief (TC_SR1) RA Loading Status */ -#define TC_SR1_LDRBS (0x1 << 6) /**< \brief (TC_SR1) RB Loading Status */ -#define TC_SR1_ETRGS (0x1 << 7) /**< \brief (TC_SR1) External Trigger Status */ -#define TC_SR1_CLKSTA (0x1 << 16) /**< \brief (TC_SR1) Clock Enabling Status */ -#define TC_SR1_MTIOA (0x1 << 17) /**< \brief (TC_SR1) TIOA Mirror */ -#define TC_SR1_MTIOB (0x1 << 18) /**< \brief (TC_SR1) TIOB Mirror */ -/* -------- TC_IER1 : (TC Offset: 0x64) Interrupt Enable Register (channel = 1) -------- */ -#define TC_IER1_COVFS (0x1 << 0) /**< \brief (TC_IER1) Counter Overflow */ -#define TC_IER1_LOVRS (0x1 << 1) /**< \brief (TC_IER1) Load Overrun */ -#define TC_IER1_CPAS (0x1 << 2) /**< \brief (TC_IER1) RA Compare */ -#define TC_IER1_CPBS (0x1 << 3) /**< \brief (TC_IER1) RB Compare */ -#define TC_IER1_CPCS (0x1 << 4) /**< \brief (TC_IER1) RC Compare */ -#define TC_IER1_LDRAS (0x1 << 5) /**< \brief (TC_IER1) RA Loading */ -#define TC_IER1_LDRBS (0x1 << 6) /**< \brief (TC_IER1) RB Loading */ -#define TC_IER1_ETRGS (0x1 << 7) /**< \brief (TC_IER1) External Trigger */ -/* -------- TC_IDR1 : (TC Offset: 0x68) Interrupt Disable Register (channel = 1) -------- */ -#define TC_IDR1_COVFS (0x1 << 0) /**< \brief (TC_IDR1) Counter Overflow */ -#define TC_IDR1_LOVRS (0x1 << 1) /**< \brief (TC_IDR1) Load Overrun */ -#define TC_IDR1_CPAS (0x1 << 2) /**< \brief (TC_IDR1) RA Compare */ -#define TC_IDR1_CPBS (0x1 << 3) /**< \brief (TC_IDR1) RB Compare */ -#define TC_IDR1_CPCS (0x1 << 4) /**< \brief (TC_IDR1) RC Compare */ -#define TC_IDR1_LDRAS (0x1 << 5) /**< \brief (TC_IDR1) RA Loading */ -#define TC_IDR1_LDRBS (0x1 << 6) /**< \brief (TC_IDR1) RB Loading */ -#define TC_IDR1_ETRGS (0x1 << 7) /**< \brief (TC_IDR1) External Trigger */ -/* -------- TC_IMR1 : (TC Offset: 0x6C) Interrupt Mask Register (channel = 1) -------- */ -#define TC_IMR1_COVFS (0x1 << 0) /**< \brief (TC_IMR1) Counter Overflow */ -#define TC_IMR1_LOVRS (0x1 << 1) /**< \brief (TC_IMR1) Load Overrun */ -#define TC_IMR1_CPAS (0x1 << 2) /**< \brief (TC_IMR1) RA Compare */ -#define TC_IMR1_CPBS (0x1 << 3) /**< \brief (TC_IMR1) RB Compare */ -#define TC_IMR1_CPCS (0x1 << 4) /**< \brief (TC_IMR1) RC Compare */ -#define TC_IMR1_LDRAS (0x1 << 5) /**< \brief (TC_IMR1) RA Loading */ -#define TC_IMR1_LDRBS (0x1 << 6) /**< \brief (TC_IMR1) RB Loading */ -#define TC_IMR1_ETRGS (0x1 << 7) /**< \brief (TC_IMR1) External Trigger */ -/* -------- TC_CCR2 : (TC Offset: 0x80) Channel Control Register (channel = 2) -------- */ -#define TC_CCR2_CLKEN (0x1 << 0) /**< \brief (TC_CCR2) Counter Clock Enable Command */ -#define TC_CCR2_CLKDIS (0x1 << 1) /**< \brief (TC_CCR2) Counter Clock Disable Command */ -#define TC_CCR2_SWTRG (0x1 << 2) /**< \brief (TC_CCR2) Software Trigger Command */ -/* -------- TC_CMR2 : (TC Offset: 0x84) Channel Mode Register (channel = 2) -------- */ -#define TC_CMR2_TCCLKS (0x7 << 0) /**< \brief (TC_CMR2) Clock Selection */ -#define TC_CMR2_CLKI (0x1 << 3) /**< \brief (TC_CMR2) Clock Invert */ -#define TC_CMR2_BURST (0x3 << 4) /**< \brief (TC_CMR2) Burst Signal Selection */ -#define TC_CMR2_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR2) The clock is not gated by an external signal. */ -#define TC_CMR2_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR2) XC0 is ANDed with the selected clock. */ -#define TC_CMR2_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR2) XC1 is ANDed with the selected clock. */ -#define TC_CMR2_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR2) XC2 is ANDed with the selected clock. */ -#define TC_CMR2_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR2) Counter Clock Stopped with RB Loading */ -#define TC_CMR2_LDBDIS (0x1 << 7) /**< \brief (TC_CMR2) Counter Clock Disable with RB Loading */ -#define TC_CMR2_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR2) External Trigger Edge Selection */ -#define TC_CMR2_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR2) none */ -#define TC_CMR2_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR2) rising edge */ -#define TC_CMR2_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR2) falling edge */ -#define TC_CMR2_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR2) each edge */ -#define TC_CMR2_ABETRG (0x1 << 10) /**< \brief (TC_CMR2) TIOA or TIOB External Trigger Selection */ -#define TC_CMR2_CPCTRG (0x1 << 14) /**< \brief (TC_CMR2) RC Compare Trigger Enable */ -#define TC_CMR2_WAVE (0x1 << 15) /**< \brief (TC_CMR2) */ -#define TC_CMR2_LDRA (0x3 << 16) /**< \brief (TC_CMR2) RA Loading Selection */ -#define TC_CMR2_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR2) none */ -#define TC_CMR2_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR2) rising edge of TIOA */ -#define TC_CMR2_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR2) falling edge of TIOA */ -#define TC_CMR2_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR2) each edge of TIOA */ -#define TC_CMR2_LDRB (0x3 << 18) /**< \brief (TC_CMR2) RB Loading Selection */ -#define TC_CMR2_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR2) none */ -#define TC_CMR2_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR2) rising edge of TIOA */ -#define TC_CMR2_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR2) falling edge of TIOA */ -#define TC_CMR2_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR2) each edge of TIOA */ -/* -------- TC_CV2 : (TC Offset: 0x90) Counter Value (channel = 2) -------- */ -#define TC_CV2_CV (0xffff << 0) /**< \brief (TC_CV2) Counter Value */ -/* -------- TC_RA2 : (TC Offset: 0x94) Register A (channel = 2) -------- */ -#define TC_RA2_RA (0xffff << 0) /**< \brief (TC_RA2) Register A */ -/* -------- TC_RB2 : (TC Offset: 0x98) Register B (channel = 2) -------- */ -#define TC_RB2_RB (0xffff << 0) /**< \brief (TC_RB2) Register B */ -/* -------- TC_RC2 : (TC Offset: 0x9C) Register C (channel = 2) -------- */ -#define TC_RC2_RC (0xffff << 0) /**< \brief (TC_RC2) Register C */ -/* -------- TC_SR2 : (TC Offset: 0xA0) Status Register (channel = 2) -------- */ -#define TC_SR2_COVFS (0x1 << 0) /**< \brief (TC_SR2) Counter Overflow Status */ -#define TC_SR2_LOVRS (0x1 << 1) /**< \brief (TC_SR2) Load Overrun Status */ -#define TC_SR2_CPAS (0x1 << 2) /**< \brief (TC_SR2) RA Compare Status */ -#define TC_SR2_CPBS (0x1 << 3) /**< \brief (TC_SR2) RB Compare Status */ -#define TC_SR2_CPCS (0x1 << 4) /**< \brief (TC_SR2) RC Compare Status */ -#define TC_SR2_LDRAS (0x1 << 5) /**< \brief (TC_SR2) RA Loading Status */ -#define TC_SR2_LDRBS (0x1 << 6) /**< \brief (TC_SR2) RB Loading Status */ -#define TC_SR2_ETRGS (0x1 << 7) /**< \brief (TC_SR2) External Trigger Status */ -#define TC_SR2_CLKSTA (0x1 << 16) /**< \brief (TC_SR2) Clock Enabling Status */ -#define TC_SR2_MTIOA (0x1 << 17) /**< \brief (TC_SR2) TIOA Mirror */ -#define TC_SR2_MTIOB (0x1 << 18) /**< \brief (TC_SR2) TIOB Mirror */ -/* -------- TC_IER2 : (TC Offset: 0xA4) Interrupt Enable Register (channel = 2) -------- */ -#define TC_IER2_COVFS (0x1 << 0) /**< \brief (TC_IER2) Counter Overflow */ -#define TC_IER2_LOVRS (0x1 << 1) /**< \brief (TC_IER2) Load Overrun */ -#define TC_IER2_CPAS (0x1 << 2) /**< \brief (TC_IER2) RA Compare */ -#define TC_IER2_CPBS (0x1 << 3) /**< \brief (TC_IER2) RB Compare */ -#define TC_IER2_CPCS (0x1 << 4) /**< \brief (TC_IER2) RC Compare */ -#define TC_IER2_LDRAS (0x1 << 5) /**< \brief (TC_IER2) RA Loading */ -#define TC_IER2_LDRBS (0x1 << 6) /**< \brief (TC_IER2) RB Loading */ -#define TC_IER2_ETRGS (0x1 << 7) /**< \brief (TC_IER2) External Trigger */ -/* -------- TC_IDR2 : (TC Offset: 0xA8) Interrupt Disable Register (channel = 2) -------- */ -#define TC_IDR2_COVFS (0x1 << 0) /**< \brief (TC_IDR2) Counter Overflow */ -#define TC_IDR2_LOVRS (0x1 << 1) /**< \brief (TC_IDR2) Load Overrun */ -#define TC_IDR2_CPAS (0x1 << 2) /**< \brief (TC_IDR2) RA Compare */ -#define TC_IDR2_CPBS (0x1 << 3) /**< \brief (TC_IDR2) RB Compare */ -#define TC_IDR2_CPCS (0x1 << 4) /**< \brief (TC_IDR2) RC Compare */ -#define TC_IDR2_LDRAS (0x1 << 5) /**< \brief (TC_IDR2) RA Loading */ -#define TC_IDR2_LDRBS (0x1 << 6) /**< \brief (TC_IDR2) RB Loading */ -#define TC_IDR2_ETRGS (0x1 << 7) /**< \brief (TC_IDR2) External Trigger */ -/* -------- TC_IMR2 : (TC Offset: 0xAC) Interrupt Mask Register (channel = 2) -------- */ -#define TC_IMR2_COVFS (0x1 << 0) /**< \brief (TC_IMR2) Counter Overflow */ -#define TC_IMR2_LOVRS (0x1 << 1) /**< \brief (TC_IMR2) Load Overrun */ -#define TC_IMR2_CPAS (0x1 << 2) /**< \brief (TC_IMR2) RA Compare */ -#define TC_IMR2_CPBS (0x1 << 3) /**< \brief (TC_IMR2) RB Compare */ -#define TC_IMR2_CPCS (0x1 << 4) /**< \brief (TC_IMR2) RC Compare */ -#define TC_IMR2_LDRAS (0x1 << 5) /**< \brief (TC_IMR2) RA Loading */ -#define TC_IMR2_LDRBS (0x1 << 6) /**< \brief (TC_IMR2) RB Loading */ -#define TC_IMR2_ETRGS (0x1 << 7) /**< \brief (TC_IMR2) External Trigger */ -/* -------- TC_BCR : (TC Offset: 0xC0) Block Control Register -------- */ -#define TC_BCR_SYNC (0x1 << 0) /**< \brief (TC_BCR) Synchro Command */ -/* -------- TC_BMR : (TC Offset: 0xC4) Block Mode Register -------- */ -#define TC_BMR_TC0XC0S (0x3 << 0) /**< \brief (TC_BMR) External Clock Signal 0 Selection */ -#define TC_BMR_TC0XC0S_TCLK0 (0x0 << 0) /**< \brief (TC_BMR) TCLK0 */ -#define TC_BMR_TC0XC0S_NONE (0x1 << 0) /**< \brief (TC_BMR) none */ -#define TC_BMR_TC0XC0S_TIOA1 (0x2 << 0) /**< \brief (TC_BMR) TIOA1 */ -#define TC_BMR_TC0XC0S_TIOA2 (0x3 << 0) /**< \brief (TC_BMR) TIOA2 */ -#define TC_BMR_TC1XC1S (0x3 << 2) /**< \brief (TC_BMR) External Clock Signal 1 Selection */ -#define TC_BMR_TC1XC1S_TCLK1 (0x0 << 2) /**< \brief (TC_BMR) TCLK1 */ -#define TC_BMR_TC1XC1S_NONE (0x1 << 2) /**< \brief (TC_BMR) none */ -#define TC_BMR_TC1XC1S_TIOA0 (0x2 << 2) /**< \brief (TC_BMR) TIOA0 */ -#define TC_BMR_TC1XC1S_TIOA2 (0x3 << 2) /**< \brief (TC_BMR) TIOA2 */ -#define TC_BMR_TC2XC2S (0x3 << 4) /**< \brief (TC_BMR) External Clock Signal 2 Selection */ -#define TC_BMR_TC2XC2S_TCLK2 (0x0 << 4) /**< \brief (TC_BMR) TCLK2 */ -#define TC_BMR_TC2XC2S_NONE (0x1 << 4) /**< \brief (TC_BMR) none */ -#define TC_BMR_TC2XC2S_TIOA0 (0x2 << 4) /**< \brief (TC_BMR) TIOA0 */ -#define TC_BMR_TC2XC2S_TIOA1 (0x3 << 4) /**< \brief (TC_BMR) TIOA1 */ -#define TC_BMR_QDEN (0x1 << 8) /**< \brief (TC_BMR) Quadrature Decoder ENabled */ -#define TC_BMR_POSEN (0x1 << 9) /**< \brief (TC_BMR) POSition ENabled */ -#define TC_BMR_SPEEDEN (0x1 << 10) /**< \brief (TC_BMR) SPEED ENabled */ -#define TC_BMR_QDTRANS (0x1 << 11) /**< \brief (TC_BMR) Quadrature Decoding TRANSparent */ -#define TC_BMR_EDGPHA (0x1 << 12) /**< \brief (TC_BMR) EDGe on PHA count mode */ -#define TC_BMR_INVA (0x1 << 13) /**< \brief (TC_BMR) INVerted phA */ -#define TC_BMR_INVB (0x1 << 14) /**< \brief (TC_BMR) INVerted phB */ -#define TC_BMR_INVIDX (0x1 << 15) /**< \brief (TC_BMR) INVerted InDeX */ -#define TC_BMR_SWAP (0x1 << 16) /**< \brief (TC_BMR) SWAP PHA and PHB */ -#define TC_BMR_IDXPHB (0x1 << 17) /**< \brief (TC_BMR) InDeX pin is PHB pin */ -#define TC_BMR_FILTER (0x1 << 19) /**< \brief (TC_BMR) */ -#define TC_BMR_MAXFILT (0x3f << 20) /**< \brief (TC_BMR) MAXimum FILTer */ -/* -------- TC_QIER : (TC Offset: 0xC8) QDEC Interrupt Enable Register -------- */ -#define TC_QIER_IDX (0x1 << 0) /**< \brief (TC_QIER) InDeX */ -#define TC_QIER_DIRCHG (0x1 << 1) /**< \brief (TC_QIER) DIRection CHanGe */ -#define TC_QIER_QERR (0x1 << 2) /**< \brief (TC_QIER) Quadrature ERRor */ -/* -------- TC_QIDR : (TC Offset: 0xCC) QDEC Interrupt Disable Register -------- */ -#define TC_QIDR_IDX (0x1 << 0) /**< \brief (TC_QIDR) InDeX */ -#define TC_QIDR_DIRCHG (0x1 << 1) /**< \brief (TC_QIDR) DIRection CHanGe */ -#define TC_QIDR_QERR (0x1 << 2) /**< \brief (TC_QIDR) Quadrature ERRor */ -/* -------- TC_QIMR : (TC Offset: 0xD0) QDEC Interrupt Mask Register -------- */ -#define TC_QIMR_IDX (0x1 << 0) /**< \brief (TC_QIMR) InDeX */ -#define TC_QIMR_DIRCHG (0x1 << 1) /**< \brief (TC_QIMR) DIRection CHanGe */ -#define TC_QIMR_QERR (0x1 << 2) /**< \brief (TC_QIMR) Quadrature ERRor */ -/* -------- TC_QISR : (TC Offset: 0xD4) QDEC Interrupt Status Register -------- */ -#define TC_QISR_IDX (0x1 << 0) /**< \brief (TC_QISR) InDeX */ -#define TC_QISR_DIRCHG (0x1 << 1) /**< \brief (TC_QISR) DIRection CHanGe */ -#define TC_QISR_QERR (0x1 << 2) /**< \brief (TC_QISR) Quadrature ERRor */ -#define TC_QISR_DIR (0x1 << 8) /**< \brief (TC_QISR) Direction */ -/* -------- TC_FMR : (TC Offset: 0xD8) Fault Mode Register -------- */ -#define TC_FMR_ENCF0 (0x1 << 0) /**< \brief (TC_FMR) ENable Compare Fault Channel 0 */ -#define TC_FMR_ENCF1 (0x1 << 1) /**< \brief (TC_FMR) ENable Compare Fault Channel 1 */ -/* -------- TC_WPMR : (TC Offset: 0xE4) Write Protect Mode Register -------- */ -#define TC_WPMR_WPEN (0x1 << 0) /**< \brief (TC_WPMR) Write Protect Enable */ -#define TC_WPMR_WPKEY (0xffffff << 8) /**< \brief (TC_WPMR) Write Protect KEY */ -/* -------- TC_VER : (TC Offset: 0xFC) Version Register -------- */ -#define TC_VER_VERSION (0xfff << 0) /**< \brief (TC_VER) */ -#define TC_VER_MFN (0x7 << 16) /**< \brief (TC_VER) */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Two-wire Interface */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_TWI Two-wire Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Twi hardware registers */ -typedef struct { - WoReg TWI_CR; /**< \brief (Twi Offset: 0x00) Control Register */ - RwReg TWI_MMR; /**< \brief (Twi Offset: 0x04) Master Mode Register */ - RwReg TWI_SMR; /**< \brief (Twi Offset: 0x08) Slave Mode Register */ - RwReg TWI_IADR; /**< \brief (Twi Offset: 0x0C) Internal Address Register */ - RwReg TWI_CWGR; /**< \brief (Twi Offset: 0x10) Clock Waveform Generator Register */ - RwReg Reserved1[3]; - RoReg TWI_SR; /**< \brief (Twi Offset: 0x20) Status Register */ - WoReg TWI_IER; /**< \brief (Twi Offset: 0x24) Interrupt Enable Register */ - WoReg TWI_IDR; /**< \brief (Twi Offset: 0x28) Interrupt Disable Register */ - RoReg TWI_IMR; /**< \brief (Twi Offset: 0x2C) Interrupt Mask Register */ - RoReg TWI_RHR; /**< \brief (Twi Offset: 0x30) Receive Holding Register */ - WoReg TWI_THR; /**< \brief (Twi Offset: 0x34) Transmit Holding Register */ - RwReg Reserved2[50]; - RwReg TWI_RPR; /**< \brief (Twi Offset: 0x100) Receive Pointer Register */ - RwReg TWI_RCR; /**< \brief (Twi Offset: 0x104) Receive Counter Register */ - RwReg TWI_TPR; /**< \brief (Twi Offset: 0x108) Transmit Pointer Register */ - RwReg TWI_TCR; /**< \brief (Twi Offset: 0x10C) Transmit Counter Register */ - RwReg TWI_RNPR; /**< \brief (Twi Offset: 0x110) Receive Next Pointer Register */ - RwReg TWI_RNCR; /**< \brief (Twi Offset: 0x114) Receive Next Counter Register */ - RwReg TWI_TNPR; /**< \brief (Twi Offset: 0x118) Transmit Next Pointer Register */ - RwReg TWI_TNCR; /**< \brief (Twi Offset: 0x11C) Transmit Next Counter Register */ - WoReg TWI_PTCR; /**< \brief (Twi Offset: 0x120) Transfer Control Register */ - RoReg TWI_PTSR; /**< \brief (Twi Offset: 0x124) Transfer Status Register */ -} Twi; -#endif /* __ASSEMBLY__ */ -/* -------- TWI_CR : (TWI Offset: 0x00) Control Register -------- */ -#define TWI_CR_START (0x1 << 0) /**< \brief (TWI_CR) Send a START Condition */ -#define TWI_CR_STOP (0x1 << 1) /**< \brief (TWI_CR) Send a STOP Condition */ -#define TWI_CR_MSEN (0x1 << 2) /**< \brief (TWI_CR) TWI Master Mode Enabled */ -#define TWI_CR_MSDIS (0x1 << 3) /**< \brief (TWI_CR) TWI Master Mode Disabled */ -#define TWI_CR_SVEN (0x1 << 4) /**< \brief (TWI_CR) TWI Slave Mode Enabled */ -#define TWI_CR_SVDIS (0x1 << 5) /**< \brief (TWI_CR) TWI Slave Mode Disabled */ -#define TWI_CR_QUICK (0x1 << 6) /**< \brief (TWI_CR) SMBUS Quick Command */ -#define TWI_CR_SWRST (0x1 << 7) /**< \brief (TWI_CR) Software Reset */ -/* -------- TWI_MMR : (TWI Offset: 0x04) Master Mode Register -------- */ -#define TWI_MMR_IADRSZ (0x3 << 8) /**< \brief (TWI_MMR) Internal Device Address Size */ -#define TWI_MMR_IADRSZ_NO (0x0 << 8) /**< \brief (TWI_MMR) No internal device address */ -#define TWI_MMR_IADRSZ_1_BYTE (0x1 << 8) /**< \brief (TWI_MMR) One-byte internal device address */ -#define TWI_MMR_IADRSZ_2_BYTE (0x2 << 8) /**< \brief (TWI_MMR) Two-byte internal device address */ -#define TWI_MMR_IADRSZ_3_BYTE (0x3 << 8) /**< \brief (TWI_MMR) Three-byte internal device address */ -#define TWI_MMR_MREAD (0x1 << 12) /**< \brief (TWI_MMR) Master Read Direction */ -#define TWI_MMR_DADR (0x7f << 16) /**< \brief (TWI_MMR) Device Address */ -/* -------- TWI_SMR : (TWI Offset: 0x08) Slave Mode Register -------- */ -#define TWI_SMR_SADR (0x7f << 16) /**< \brief (TWI_SMR) Slave Address */ -/* -------- TWI_IADR : (TWI Offset: 0x0C) Internal Address Register -------- */ -#define TWI_IADR_IADR (0xffffff << 0) /**< \brief (TWI_IADR) Internal Address */ -/* -------- TWI_CWGR : (TWI Offset: 0x10) Clock Waveform Generator Register -------- */ -#define TWI_CWGR_CLDIV (0xff << 0) /**< \brief (TWI_CWGR) Clock Low Divider */ -#define TWI_CWGR_CHDIV (0xff << 8) /**< \brief (TWI_CWGR) Clock High Divider */ -#define TWI_CWGR_CKDIV (0x7 << 16) /**< \brief (TWI_CWGR) Clock Divider */ -/* -------- TWI_SR : (TWI Offset: 0x20) Status Register -------- */ -#define TWI_SR_TXCOMP (0x1 << 0) /**< \brief (TWI_SR) Transmission Completed (automatically set / reset) */ -#define TWI_SR_RXRDY (0x1 << 1) /**< \brief (TWI_SR) Receive Holding Register Ready (automatically set / reset) */ -#define TWI_SR_TXRDY (0x1 << 2) /**< \brief (TWI_SR) Transmit Holding Register Ready (automatically set / reset) */ -#define TWI_SR_SVREAD (0x1 << 3) /**< \brief (TWI_SR) Slave Read (automatically set / reset) */ -#define TWI_SR_SVACC (0x1 << 4) /**< \brief (TWI_SR) Slave Access (automatically set / reset) */ -#define TWI_SR_GACC (0x1 << 5) /**< \brief (TWI_SR) General Call Access (clear on read) */ -#define TWI_SR_OVRE (0x1 << 6) /**< \brief (TWI_SR) Overrun Error (clear on read) */ -#define TWI_SR_NACK (0x1 << 8) /**< \brief (TWI_SR) Not Acknowledged (clear on read) */ -#define TWI_SR_ARBLST (0x1 << 9) /**< \brief (TWI_SR) Arbitration Lost (clear on read) */ -#define TWI_SR_SCLWS (0x1 << 10) /**< \brief (TWI_SR) Clock Wait State (automatically set / reset) */ -#define TWI_SR_EOSACC (0x1 << 11) /**< \brief (TWI_SR) End Of Slave Access (clear on read) */ -#define TWI_SR_ENDRX (0x1 << 12) /**< \brief (TWI_SR) End of RX buffer */ -#define TWI_SR_ENDTX (0x1 << 13) /**< \brief (TWI_SR) End of TX buffer */ -#define TWI_SR_RXBUFF (0x1 << 14) /**< \brief (TWI_SR) RX Buffer Full */ -#define TWI_SR_TXBUFE (0x1 << 15) /**< \brief (TWI_SR) TX Buffer Empty */ -/* -------- TWI_IER : (TWI Offset: 0x24) Interrupt Enable Register -------- */ -#define TWI_IER_TXCOMP (0x1 << 0) /**< \brief (TWI_IER) Transmission Completed Interrupt Enable */ -#define TWI_IER_RXRDY (0x1 << 1) /**< \brief (TWI_IER) Receive Holding Register Ready Interrupt Enable */ -#define TWI_IER_TXRDY (0x1 << 2) /**< \brief (TWI_IER) Transmit Holding Register Ready Interrupt Enable */ -#define TWI_IER_SVACC (0x1 << 4) /**< \brief (TWI_IER) Slave Access Interrupt Enable */ -#define TWI_IER_GACC (0x1 << 5) /**< \brief (TWI_IER) General Call Access Interrupt Enable */ -#define TWI_IER_OVRE (0x1 << 6) /**< \brief (TWI_IER) Overrun Error Interrupt Enable */ -#define TWI_IER_NACK (0x1 << 8) /**< \brief (TWI_IER) Not Acknowledge Interrupt Enable */ -#define TWI_IER_ARBLST (0x1 << 9) /**< \brief (TWI_IER) Arbitration Lost Interrupt Enable */ -#define TWI_IER_SCL_WS (0x1 << 10) /**< \brief (TWI_IER) Clock Wait State Interrupt Enable */ -#define TWI_IER_EOSACC (0x1 << 11) /**< \brief (TWI_IER) End Of Slave Access Interrupt Enable */ -#define TWI_IER_ENDRX (0x1 << 12) /**< \brief (TWI_IER) End of Receive Buffer Interrupt Enable */ -#define TWI_IER_ENDTX (0x1 << 13) /**< \brief (TWI_IER) End of Transmit Buffer Interrupt Enable */ -#define TWI_IER_RXBUFF (0x1 << 14) /**< \brief (TWI_IER) Receive Buffer Full Interrupt Enable */ -#define TWI_IER_TXBUFE (0x1 << 15) /**< \brief (TWI_IER) Transmit Buffer Empty Interrupt Enable */ -/* -------- TWI_IDR : (TWI Offset: 0x28) Interrupt Disable Register -------- */ -#define TWI_IDR_TXCOMP (0x1 << 0) /**< \brief (TWI_IDR) Transmission Completed Interrupt Disable */ -#define TWI_IDR_RXRDY (0x1 << 1) /**< \brief (TWI_IDR) Receive Holding Register Ready Interrupt Disable */ -#define TWI_IDR_TXRDY (0x1 << 2) /**< \brief (TWI_IDR) Transmit Holding Register Ready Interrupt Disable */ -#define TWI_IDR_SVACC (0x1 << 4) /**< \brief (TWI_IDR) Slave Access Interrupt Disable */ -#define TWI_IDR_GACC (0x1 << 5) /**< \brief (TWI_IDR) General Call Access Interrupt Disable */ -#define TWI_IDR_OVRE (0x1 << 6) /**< \brief (TWI_IDR) Overrun Error Interrupt Disable */ -#define TWI_IDR_NACK (0x1 << 8) /**< \brief (TWI_IDR) Not Acknowledge Interrupt Disable */ -#define TWI_IDR_ARBLST (0x1 << 9) /**< \brief (TWI_IDR) Arbitration Lost Interrupt Disable */ -#define TWI_IDR_SCL_WS (0x1 << 10) /**< \brief (TWI_IDR) Clock Wait State Interrupt Disable */ -#define TWI_IDR_EOSACC (0x1 << 11) /**< \brief (TWI_IDR) End Of Slave Access Interrupt Disable */ -#define TWI_IDR_ENDRX (0x1 << 12) /**< \brief (TWI_IDR) End of Receive Buffer Interrupt Disable */ -#define TWI_IDR_ENDTX (0x1 << 13) /**< \brief (TWI_IDR) End of Transmit Buffer Interrupt Disable */ -#define TWI_IDR_RXBUFF (0x1 << 14) /**< \brief (TWI_IDR) Receive Buffer Full Interrupt Disable */ -#define TWI_IDR_TXBUFE (0x1 << 15) /**< \brief (TWI_IDR) Transmit Buffer Empty Interrupt Disable */ -/* -------- TWI_IMR : (TWI Offset: 0x2C) Interrupt Mask Register -------- */ -#define TWI_IMR_TXCOMP (0x1 << 0) /**< \brief (TWI_IMR) Transmission Completed Interrupt Mask */ -#define TWI_IMR_RXRDY (0x1 << 1) /**< \brief (TWI_IMR) Receive Holding Register Ready Interrupt Mask */ -#define TWI_IMR_TXRDY (0x1 << 2) /**< \brief (TWI_IMR) Transmit Holding Register Ready Interrupt Mask */ -#define TWI_IMR_SVACC (0x1 << 4) /**< \brief (TWI_IMR) Slave Access Interrupt Mask */ -#define TWI_IMR_GACC (0x1 << 5) /**< \brief (TWI_IMR) General Call Access Interrupt Mask */ -#define TWI_IMR_OVRE (0x1 << 6) /**< \brief (TWI_IMR) Overrun Error Interrupt Mask */ -#define TWI_IMR_NACK (0x1 << 8) /**< \brief (TWI_IMR) Not Acknowledge Interrupt Mask */ -#define TWI_IMR_ARBLST (0x1 << 9) /**< \brief (TWI_IMR) Arbitration Lost Interrupt Mask */ -#define TWI_IMR_SCL_WS (0x1 << 10) /**< \brief (TWI_IMR) Clock Wait State Interrupt Mask */ -#define TWI_IMR_EOSACC (0x1 << 11) /**< \brief (TWI_IMR) End Of Slave Access Interrupt Mask */ -#define TWI_IMR_ENDRX (0x1 << 12) /**< \brief (TWI_IMR) End of Receive Buffer Interrupt Mask */ -#define TWI_IMR_ENDTX (0x1 << 13) /**< \brief (TWI_IMR) End of Transmit Buffer Interrupt Mask */ -#define TWI_IMR_RXBUFF (0x1 << 14) /**< \brief (TWI_IMR) Receive Buffer Full Interrupt Mask */ -#define TWI_IMR_TXBUFE (0x1 << 15) /**< \brief (TWI_IMR) Transmit Buffer Empty Interrupt Mask */ -/* -------- TWI_RHR : (TWI Offset: 0x30) Receive Holding Register -------- */ -#define TWI_RHR_RXDATA (0xff << 0) /**< \brief (TWI_RHR) Master or Slave Receive Holding Data */ -/* -------- TWI_THR : (TWI Offset: 0x34) Transmit Holding Register -------- */ -#define TWI_THR_TXDATA (0xff << 0) /**< \brief (TWI_THR) Master or Slave Transmit Holding Data */ -/* -------- TWI_RPR : (TWI Offset: 0x100) Receive Pointer Register -------- */ -#define TWI_RPR_RXPTR (0xffffffff << 0) /**< \brief (TWI_RPR) Receive Pointer Register */ -/* -------- TWI_RCR : (TWI Offset: 0x104) Receive Counter Register -------- */ -#define TWI_RCR_RXCTR (0xffff << 0) /**< \brief (TWI_RCR) Receive Counter Register */ -/* -------- TWI_TPR : (TWI Offset: 0x108) Transmit Pointer Register -------- */ -#define TWI_TPR_TXPTR (0xffffffff << 0) /**< \brief (TWI_TPR) Transmit Counter Register */ -/* -------- TWI_TCR : (TWI Offset: 0x10C) Transmit Counter Register -------- */ -#define TWI_TCR_TXCTR (0xffff << 0) /**< \brief (TWI_TCR) Transmit Counter Register */ -/* -------- TWI_RNPR : (TWI Offset: 0x110) Receive Next Pointer Register -------- */ -#define TWI_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (TWI_RNPR) Receive Next Pointer */ -/* -------- TWI_RNCR : (TWI Offset: 0x114) Receive Next Counter Register -------- */ -#define TWI_RNCR_RXNCTR (0xffff << 0) /**< \brief (TWI_RNCR) Receive Next Counter */ -/* -------- TWI_TNPR : (TWI Offset: 0x118) Transmit Next Pointer Register -------- */ -#define TWI_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (TWI_TNPR) Transmit Next Pointer */ -/* -------- TWI_TNCR : (TWI Offset: 0x11C) Transmit Next Counter Register -------- */ -#define TWI_TNCR_TXNCTR (0xffff << 0) /**< \brief (TWI_TNCR) Transmit Counter Next */ -/* -------- TWI_PTCR : (TWI Offset: 0x120) Transfer Control Register -------- */ -#define TWI_PTCR_RXTEN (0x1 << 0) /**< \brief (TWI_PTCR) Receiver Transfer Enable */ -#define TWI_PTCR_RXTDIS (0x1 << 1) /**< \brief (TWI_PTCR) Receiver Transfer Disable */ -#define TWI_PTCR_TXTEN (0x1 << 8) /**< \brief (TWI_PTCR) Transmitter Transfer Enable */ -#define TWI_PTCR_TXTDIS (0x1 << 9) /**< \brief (TWI_PTCR) Transmitter Transfer Disable */ -/* -------- TWI_PTSR : (TWI Offset: 0x124) Transfer Status Register -------- */ -#define TWI_PTSR_RXTEN (0x1 << 0) /**< \brief (TWI_PTSR) Receiver Transfer Enable */ -#define TWI_PTSR_TXTEN (0x1 << 8) /**< \brief (TWI_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Universal Asynchronous Receiver Transmitter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_UART Universal Asynchronous Receiver Transmitter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Uart hardware registers */ -typedef struct { - WoReg UART_CR; /**< \brief (Uart Offset: 0x0000) Control Register */ - RwReg UART_MR; /**< \brief (Uart Offset: 0x0004) Mode Register */ - WoReg UART_IER; /**< \brief (Uart Offset: 0x0008) Interrupt Enable Register */ - WoReg UART_IDR; /**< \brief (Uart Offset: 0x000C) Interrupt Disable Register */ - RoReg UART_IMR; /**< \brief (Uart Offset: 0x0010) Interrupt Mask Register */ - RoReg UART_SR; /**< \brief (Uart Offset: 0x0014) Status Register */ - RoReg UART_RHR; /**< \brief (Uart Offset: 0x0018) Receive Holding Register */ - WoReg UART_THR; /**< \brief (Uart Offset: 0x001C) Transmit Holding Register */ - RwReg UART_BRGR; /**< \brief (Uart Offset: 0x0020) Baud Rate Generator Register */ - RwReg Reserved1[55]; - RwReg UART_RPR; /**< \brief (Uart Offset: 0x100) Receive Pointer Register */ - RwReg UART_RCR; /**< \brief (Uart Offset: 0x104) Receive Counter Register */ - RwReg UART_TPR; /**< \brief (Uart Offset: 0x108) Transmit Pointer Register */ - RwReg UART_TCR; /**< \brief (Uart Offset: 0x10C) Transmit Counter Register */ - RwReg UART_RNPR; /**< \brief (Uart Offset: 0x110) Receive Next Pointer Register */ - RwReg UART_RNCR; /**< \brief (Uart Offset: 0x114) Receive Next Counter Register */ - RwReg UART_TNPR; /**< \brief (Uart Offset: 0x118) Transmit Next Pointer Register */ - RwReg UART_TNCR; /**< \brief (Uart Offset: 0x11C) Transmit Next Counter Register */ - WoReg UART_PTCR; /**< \brief (Uart Offset: 0x120) Transfer Control Register */ - RoReg UART_PTSR; /**< \brief (Uart Offset: 0x124) Transfer Status Register */ -} Uart; -#endif /* __ASSEMBLY__ */ -/* -------- UART_CR : (UART Offset: 0x0000) Control Register -------- */ -#define UART_CR_RSTRX (0x1 << 2) /**< \brief (UART_CR) Reset Receiver */ -#define UART_CR_RSTTX (0x1 << 3) /**< \brief (UART_CR) Reset Transmitter */ -#define UART_CR_RXEN (0x1 << 4) /**< \brief (UART_CR) Receiver Enable */ -#define UART_CR_RXDIS (0x1 << 5) /**< \brief (UART_CR) Receiver Disable */ -#define UART_CR_TXEN (0x1 << 6) /**< \brief (UART_CR) Transmitter Enable */ -#define UART_CR_TXDIS (0x1 << 7) /**< \brief (UART_CR) Transmitter Disable */ -#define UART_CR_RSTSTA (0x1 << 8) /**< \brief (UART_CR) Reset Status Bits */ -/* -------- UART_MR : (UART Offset: 0x0004) Mode Register -------- */ -#define UART_MR_PAR (0x7 << 9) /**< \brief (UART_MR) Parity Type */ -#define UART_MR_CHMODE (0x3 << 14) /**< \brief (UART_MR) Channel Mode */ -/* -------- UART_IER : (UART Offset: 0x0008) Interrupt Enable Register -------- */ -#define UART_IER_RXRDY (0x1 << 0) /**< \brief (UART_IER) Enable RXRDY Interrupt */ -#define UART_IER_TXRDY (0x1 << 1) /**< \brief (UART_IER) Enable TXRDY Interrupt */ -#define UART_IER_ENDRX (0x1 << 3) /**< \brief (UART_IER) Enable End of Receive Transfer Interrupt */ -#define UART_IER_ENDTX (0x1 << 4) /**< \brief (UART_IER) Enable End of Transmit Interrupt */ -#define UART_IER_OVRE (0x1 << 5) /**< \brief (UART_IER) Enable Overrun Error Interrupt */ -#define UART_IER_FRAME (0x1 << 6) /**< \brief (UART_IER) Enable Framing Error Interrupt */ -#define UART_IER_PARE (0x1 << 7) /**< \brief (UART_IER) Enable Parity Error Interrupt */ -#define UART_IER_TXEMPTY (0x1 << 9) /**< \brief (UART_IER) Enable TXEMPTY Interrupt */ -#define UART_IER_TXBUFE (0x1 << 11) /**< \brief (UART_IER) Enable Buffer Empty Interrupt */ -#define UART_IER_RXBUFF (0x1 << 12) /**< \brief (UART_IER) Enable Buffer Full Interrupt */ -/* -------- UART_IDR : (UART Offset: 0x000C) Interrupt Disable Register -------- */ -#define UART_IDR_RXRDY (0x1 << 0) /**< \brief (UART_IDR) Disable RXRDY Interrupt */ -#define UART_IDR_TXRDY (0x1 << 1) /**< \brief (UART_IDR) Disable TXRDY Interrupt */ -#define UART_IDR_ENDRX (0x1 << 3) /**< \brief (UART_IDR) Disable End of Receive Transfer Interrupt */ -#define UART_IDR_ENDTX (0x1 << 4) /**< \brief (UART_IDR) Disable End of Transmit Interrupt */ -#define UART_IDR_OVRE (0x1 << 5) /**< \brief (UART_IDR) Disable Overrun Error Interrupt */ -#define UART_IDR_FRAME (0x1 << 6) /**< \brief (UART_IDR) Disable Framing Error Interrupt */ -#define UART_IDR_PARE (0x1 << 7) /**< \brief (UART_IDR) Disable Parity Error Interrupt */ -#define UART_IDR_TXEMPTY (0x1 << 9) /**< \brief (UART_IDR) Disable TXEMPTY Interrupt */ -#define UART_IDR_TXBUFE (0x1 << 11) /**< \brief (UART_IDR) Disable Buffer Empty Interrupt */ -#define UART_IDR_RXBUFF (0x1 << 12) /**< \brief (UART_IDR) Disable Buffer Full Interrupt */ -/* -------- UART_IMR : (UART Offset: 0x0010) Interrupt Mask Register -------- */ -#define UART_IMR_RXRDY (0x1 << 0) /**< \brief (UART_IMR) Mask RXRDY Interrupt */ -#define UART_IMR_TXRDY (0x1 << 1) /**< \brief (UART_IMR) Disable TXRDY Interrupt */ -#define UART_IMR_ENDRX (0x1 << 3) /**< \brief (UART_IMR) Mask End of Receive Transfer Interrupt */ -#define UART_IMR_ENDTX (0x1 << 4) /**< \brief (UART_IMR) Mask End of Transmit Interrupt */ -#define UART_IMR_OVRE (0x1 << 5) /**< \brief (UART_IMR) Mask Overrun Error Interrupt */ -#define UART_IMR_FRAME (0x1 << 6) /**< \brief (UART_IMR) Mask Framing Error Interrupt */ -#define UART_IMR_PARE (0x1 << 7) /**< \brief (UART_IMR) Mask Parity Error Interrupt */ -#define UART_IMR_TXEMPTY (0x1 << 9) /**< \brief (UART_IMR) Mask TXEMPTY Interrupt */ -#define UART_IMR_TXBUFE (0x1 << 11) /**< \brief (UART_IMR) Mask TXBUFE Interrupt */ -#define UART_IMR_RXBUFF (0x1 << 12) /**< \brief (UART_IMR) Mask RXBUFF Interrupt */ -/* -------- UART_SR : (UART Offset: 0x0014) Status Register -------- */ -#define UART_SR_RXRDY (0x1 << 0) /**< \brief (UART_SR) Receiver Ready */ -#define UART_SR_TXRDY (0x1 << 1) /**< \brief (UART_SR) Transmitter Ready */ -#define UART_SR_ENDRX (0x1 << 3) /**< \brief (UART_SR) End of Receiver Transfer */ -#define UART_SR_ENDTX (0x1 << 4) /**< \brief (UART_SR) End of Transmitter Transfer */ -#define UART_SR_OVRE (0x1 << 5) /**< \brief (UART_SR) Overrun Error */ -#define UART_SR_FRAME (0x1 << 6) /**< \brief (UART_SR) Framing Error */ -#define UART_SR_PARE (0x1 << 7) /**< \brief (UART_SR) Parity Error */ -#define UART_SR_TXEMPTY (0x1 << 9) /**< \brief (UART_SR) Transmitter Empty */ -#define UART_SR_TXBUFE (0x1 << 11) /**< \brief (UART_SR) Transmission Buffer Empty */ -#define UART_SR_RXBUFF (0x1 << 12) /**< \brief (UART_SR) Receive Buffer Full */ -/* -------- UART_RHR : (UART Offset: 0x0018) Receive Holding Register -------- */ -#define UART_RHR_RXCHR (0xff << 0) /**< \brief (UART_RHR) Received Character */ -/* -------- UART_THR : (UART Offset: 0x001C) Transmit Holding Register -------- */ -#define UART_THR_TXCHR (0xff << 0) /**< \brief (UART_THR) Character to be Transmitted */ -/* -------- UART_BRGR : (UART Offset: 0x0020) Baud Rate Generator Register -------- */ -#define UART_BRGR_CD (0xffff << 0) /**< \brief (UART_BRGR) Clock Divisor */ -/* -------- UART_RPR : (UART Offset: 0x100) Receive Pointer Register -------- */ -#define UART_RPR_RXPTR (0xffffffff << 0) /**< \brief (UART_RPR) Receive Pointer Register */ -/* -------- UART_RCR : (UART Offset: 0x104) Receive Counter Register -------- */ -#define UART_RCR_RXCTR (0xffff << 0) /**< \brief (UART_RCR) Receive Counter Register */ -/* -------- UART_TPR : (UART Offset: 0x108) Transmit Pointer Register -------- */ -#define UART_TPR_TXPTR (0xffffffff << 0) /**< \brief (UART_TPR) Transmit Counter Register */ -/* -------- UART_TCR : (UART Offset: 0x10C) Transmit Counter Register -------- */ -#define UART_TCR_TXCTR (0xffff << 0) /**< \brief (UART_TCR) Transmit Counter Register */ -/* -------- UART_RNPR : (UART Offset: 0x110) Receive Next Pointer Register -------- */ -#define UART_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (UART_RNPR) Receive Next Pointer */ -/* -------- UART_RNCR : (UART Offset: 0x114) Receive Next Counter Register -------- */ -#define UART_RNCR_RXNCTR (0xffff << 0) /**< \brief (UART_RNCR) Receive Next Counter */ -/* -------- UART_TNPR : (UART Offset: 0x118) Transmit Next Pointer Register -------- */ -#define UART_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (UART_TNPR) Transmit Next Pointer */ -/* -------- UART_TNCR : (UART Offset: 0x11C) Transmit Next Counter Register -------- */ -#define UART_TNCR_TXNCTR (0xffff << 0) /**< \brief (UART_TNCR) Transmit Counter Next */ -/* -------- UART_PTCR : (UART Offset: 0x120) Transfer Control Register -------- */ -#define UART_PTCR_RXTEN (0x1 << 0) /**< \brief (UART_PTCR) Receiver Transfer Enable */ -#define UART_PTCR_RXTDIS (0x1 << 1) /**< \brief (UART_PTCR) Receiver Transfer Disable */ -#define UART_PTCR_TXTEN (0x1 << 8) /**< \brief (UART_PTCR) Transmitter Transfer Enable */ -#define UART_PTCR_TXTDIS (0x1 << 9) /**< \brief (UART_PTCR) Transmitter Transfer Disable */ -/* -------- UART_PTSR : (UART Offset: 0x124) Transfer Status Register -------- */ -#define UART_PTSR_RXTEN (0x1 << 0) /**< \brief (UART_PTSR) Receiver Transfer Enable */ -#define UART_PTSR_TXTEN (0x1 << 8) /**< \brief (UART_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR USB Device Port */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_UDP USB Device Port */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Udp hardware registers */ -typedef struct { - RoReg UDP_FRM_NUM; /**< \brief (Udp Offset: 0x000) Frame Number Register */ - RwReg UDP_GLB_STAT; /**< \brief (Udp Offset: 0x004) Global State Register */ - RwReg UDP_FADDR; /**< \brief (Udp Offset: 0x008) Function Address Register */ - RwReg Reserved1[1]; - WoReg UDP_IER; /**< \brief (Udp Offset: 0x010) Interrupt Enable Register */ - WoReg UDP_IDR; /**< \brief (Udp Offset: 0x014) Interrupt Disable Register */ - RoReg UDP_IMR; /**< \brief (Udp Offset: 0x018) Interrupt Mask Register */ - RoReg UDP_ISR; /**< \brief (Udp Offset: 0x01C) Interrupt Status Register */ - WoReg UDP_ICR; /**< \brief (Udp Offset: 0x020) Interrupt Clear Register */ - RwReg Reserved2[1]; - RwReg UDP_RST_EP; /**< \brief (Udp Offset: 0x028) Reset Endpoint Register */ - RwReg Reserved3[1]; - RwReg UDP_CSR[8]; /**< \brief (Udp Offset: 0x30) Endpoint Control and Status Register (ept_num = 0) */ - RwReg UDP_FDR[8]; /**< \brief (Udp Offset: 0x50) Endpoint FIFO Data Register (ept_num = 0) */ - RwReg Reserved4[1]; - RwReg UDP_TXVC; /**< \brief (Udp Offset: 0x074) Transceiver Control Register */ -} Udp; -#endif /* __ASSEMBLY__ */ -/* -------- UDP_FRM_NUM : (UDP Offset: 0x000) Frame Number Register -------- */ -#define UDP_FRM_NUM_FRM_NUM (0x7ff << 0) /**< \brief (UDP_FRM_NUM) Frame Number as Defined in the Packet Field Formats */ -#define UDP_FRM_NUM_FRM_ERR (0x1 << 16) /**< \brief (UDP_FRM_NUM) Frame Error */ -#define UDP_FRM_NUM_FRM_OK (0x1 << 17) /**< \brief (UDP_FRM_NUM) Frame OK */ -/* -------- UDP_GLB_STAT : (UDP Offset: 0x004) Global State Register -------- */ -#define UDP_GLB_STAT_FADDEN (0x1 << 0) /**< \brief (UDP_GLB_STAT) Function Address Enable */ -#define UDP_GLB_STAT_CONFG (0x1 << 1) /**< \brief (UDP_GLB_STAT) Configured */ -#define UDP_GLB_STAT_ESR (0x1 << 2) /**< \brief (UDP_GLB_STAT) Enable Send Resume */ -#define UDP_GLB_STAT_RSMINPR (0x1 << 3) /**< \brief (UDP_GLB_STAT) */ -#define UDP_GLB_STAT_RMWUPE (0x1 << 4) /**< \brief (UDP_GLB_STAT) Remote Wake Up Enable */ -/* -------- UDP_FADDR : (UDP Offset: 0x008) Function Address Register -------- */ -#define UDP_FADDR_FADD (0x7f << 0) /**< \brief (UDP_FADDR) Function Address Value */ -#define UDP_FADDR_FEN (0x1 << 8) /**< \brief (UDP_FADDR) Function Enable */ -/* -------- UDP_IER : (UDP Offset: 0x010) Interrupt Enable Register -------- */ -#define UDP_IER_EP0INT (0x1 << 0) /**< \brief (UDP_IER) Enable Endpoint 0 Interrupt */ -#define UDP_IER_EP1INT (0x1 << 1) /**< \brief (UDP_IER) Enable Endpoint 1 Interrupt */ -#define UDP_IER_EP2INT (0x1 << 2) /**< \brief (UDP_IER) Enable Endpoint 2Interrupt */ -#define UDP_IER_EP3INT (0x1 << 3) /**< \brief (UDP_IER) Enable Endpoint 3 Interrupt */ -#define UDP_IER_EP4INT (0x1 << 4) /**< \brief (UDP_IER) Enable Endpoint 4 Interrupt */ -#define UDP_IER_EP5INT (0x1 << 5) /**< \brief (UDP_IER) Enable Endpoint 5 Interrupt */ -#define UDP_IER_EP6INT (0x1 << 6) /**< \brief (UDP_IER) Enable Endpoint 6 Interrupt */ -#define UDP_IER_EP7INT (0x1 << 7) /**< \brief (UDP_IER) Enable Endpoint 7 Interrupt */ -#define UDP_IER_RXSUSP (0x1 << 8) /**< \brief (UDP_IER) Enable UDP Suspend Interrupt */ -#define UDP_IER_RXRSM (0x1 << 9) /**< \brief (UDP_IER) Enable UDP Resume Interrupt */ -#define UDP_IER_EXTRSM (0x1 << 10) /**< \brief (UDP_IER) */ -#define UDP_IER_SOFINT (0x1 << 11) /**< \brief (UDP_IER) Enable Start Of Frame Interrupt */ -#define UDP_IER_WAKEUP (0x1 << 13) /**< \brief (UDP_IER) Enable UDP bus Wakeup Interrupt */ -/* -------- UDP_IDR : (UDP Offset: 0x014) Interrupt Disable Register -------- */ -#define UDP_IDR_EP0INT (0x1 << 0) /**< \brief (UDP_IDR) Disable Endpoint 0 Interrupt */ -#define UDP_IDR_EP1INT (0x1 << 1) /**< \brief (UDP_IDR) Disable Endpoint 1 Interrupt */ -#define UDP_IDR_EP2INT (0x1 << 2) /**< \brief (UDP_IDR) Disable Endpoint 2 Interrupt */ -#define UDP_IDR_EP3INT (0x1 << 3) /**< \brief (UDP_IDR) Disable Endpoint 3 Interrupt */ -#define UDP_IDR_EP4INT (0x1 << 4) /**< \brief (UDP_IDR) Disable Endpoint 4 Interrupt */ -#define UDP_IDR_EP5INT (0x1 << 5) /**< \brief (UDP_IDR) Disable Endpoint 5 Interrupt */ -#define UDP_IDR_EP6INT (0x1 << 6) /**< \brief (UDP_IDR) Disable Endpoint 6 Interrupt */ -#define UDP_IDR_EP7INT (0x1 << 7) /**< \brief (UDP_IDR) Disable Endpoint 7 Interrupt */ -#define UDP_IDR_RXSUSP (0x1 << 8) /**< \brief (UDP_IDR) Disable UDP Suspend Interrupt */ -#define UDP_IDR_RXRSM (0x1 << 9) /**< \brief (UDP_IDR) Disable UDP Resume Interrupt */ -#define UDP_IDR_EXTRSM (0x1 << 10) /**< \brief (UDP_IDR) */ -#define UDP_IDR_SOFINT (0x1 << 11) /**< \brief (UDP_IDR) Disable Start Of Frame Interrupt */ -#define UDP_IDR_WAKEUP (0x1 << 13) /**< \brief (UDP_IDR) Disable USB Bus Interrupt */ -/* -------- UDP_IMR : (UDP Offset: 0x018) Interrupt Mask Register -------- */ -#define UDP_IMR_EP0INT (0x1 << 0) /**< \brief (UDP_IMR) Mask Endpoint 0 Interrupt */ -#define UDP_IMR_EP1INT (0x1 << 1) /**< \brief (UDP_IMR) Mask Endpoint 1 Interrupt */ -#define UDP_IMR_EP2INT (0x1 << 2) /**< \brief (UDP_IMR) Mask Endpoint 2 Interrupt */ -#define UDP_IMR_EP3INT (0x1 << 3) /**< \brief (UDP_IMR) Mask Endpoint 3 Interrupt */ -#define UDP_IMR_EP4INT (0x1 << 4) /**< \brief (UDP_IMR) Mask Endpoint 4 Interrupt */ -#define UDP_IMR_EP5INT (0x1 << 5) /**< \brief (UDP_IMR) Mask Endpoint 5 Interrupt */ -#define UDP_IMR_EP6INT (0x1 << 6) /**< \brief (UDP_IMR) Mask Endpoint 6 Interrupt */ -#define UDP_IMR_EP7INT (0x1 << 7) /**< \brief (UDP_IMR) Mask Endpoint 7 Interrupt */ -#define UDP_IMR_RXSUSP (0x1 << 8) /**< \brief (UDP_IMR) Mask UDP Suspend Interrupt */ -#define UDP_IMR_RXRSM (0x1 << 9) /**< \brief (UDP_IMR) Mask UDP Resume Interrupt. */ -#define UDP_IMR_EXTRSM (0x1 << 10) /**< \brief (UDP_IMR) */ -#define UDP_IMR_SOFINT (0x1 << 11) /**< \brief (UDP_IMR) Mask Start Of Frame Interrupt */ -#define UDP_IMR_BIT12 (0x1 << 12) /**< \brief (UDP_IMR) UDP_IMR Bit 12 */ -#define UDP_IMR_WAKEUP (0x1 << 13) /**< \brief (UDP_IMR) USB Bus WAKEUP Interrupt */ -/* -------- UDP_ISR : (UDP Offset: 0x01C) Interrupt Status Register -------- */ -#define UDP_ISR_EP0INT (0x1 << 0) /**< \brief (UDP_ISR) Endpoint 0 Interrupt Status */ -#define UDP_ISR_EP1INT (0x1 << 1) /**< \brief (UDP_ISR) Endpoint 1 Interrupt Status */ -#define UDP_ISR_EP2INT (0x1 << 2) /**< \brief (UDP_ISR) Endpoint 2 Interrupt Status */ -#define UDP_ISR_EP3INT (0x1 << 3) /**< \brief (UDP_ISR) Endpoint 3 Interrupt Status */ -#define UDP_ISR_EP4INT (0x1 << 4) /**< \brief (UDP_ISR) Endpoint 4 Interrupt Status */ -#define UDP_ISR_EP5INT (0x1 << 5) /**< \brief (UDP_ISR) Endpoint 5 Interrupt Status */ -#define UDP_ISR_EP6INT (0x1 << 6) /**< \brief (UDP_ISR) Endpoint 6 Interrupt Status */ -#define UDP_ISR_EP7INT (0x1 << 7) /**< \brief (UDP_ISR) Endpoint 7Interrupt Status */ -#define UDP_ISR_RXSUSP (0x1 << 8) /**< \brief (UDP_ISR) UDP Suspend Interrupt Status */ -#define UDP_ISR_RXRSM (0x1 << 9) /**< \brief (UDP_ISR) UDP Resume Interrupt Status */ -#define UDP_ISR_EXTRSM (0x1 << 10) /**< \brief (UDP_ISR) */ -#define UDP_ISR_SOFINT (0x1 << 11) /**< \brief (UDP_ISR) Start of Frame Interrupt Status */ -#define UDP_ISR_ENDBUSRES (0x1 << 12) /**< \brief (UDP_ISR) End of BUS Reset Interrupt Status */ -#define UDP_ISR_WAKEUP (0x1 << 13) /**< \brief (UDP_ISR) UDP Resume Interrupt Status */ -/* -------- UDP_ICR : (UDP Offset: 0x020) Interrupt Clear Register -------- */ -#define UDP_ICR_RXSUSP (0x1 << 8) /**< \brief (UDP_ICR) Clear UDP Suspend Interrupt */ -#define UDP_ICR_RXRSM (0x1 << 9) /**< \brief (UDP_ICR) Clear UDP Resume Interrupt */ -#define UDP_ICR_EXTRSM (0x1 << 10) /**< \brief (UDP_ICR) */ -#define UDP_ICR_SOFINT (0x1 << 11) /**< \brief (UDP_ICR) Clear Start Of Frame Interrupt */ -#define UDP_ICR_ENDBUSRES (0x1 << 12) /**< \brief (UDP_ICR) Clear End of Bus Reset Interrupt */ -#define UDP_ICR_WAKEUP (0x1 << 13) /**< \brief (UDP_ICR) Clear Wakeup Interrupt */ -/* -------- UDP_RST_EP : (UDP Offset: 0x028) Reset Endpoint Register -------- */ -#define UDP_RST_EP_EP0 (0x1 << 0) /**< \brief (UDP_RST_EP) Reset Endpoint 0 */ -#define UDP_RST_EP_EP1 (0x1 << 1) /**< \brief (UDP_RST_EP) Reset Endpoint 1 */ -#define UDP_RST_EP_EP2 (0x1 << 2) /**< \brief (UDP_RST_EP) Reset Endpoint 2 */ -#define UDP_RST_EP_EP3 (0x1 << 3) /**< \brief (UDP_RST_EP) Reset Endpoint 3 */ -#define UDP_RST_EP_EP4 (0x1 << 4) /**< \brief (UDP_RST_EP) Reset Endpoint 4 */ -#define UDP_RST_EP_EP5 (0x1 << 5) /**< \brief (UDP_RST_EP) Reset Endpoint 5 */ -#define UDP_RST_EP_EP6 (0x1 << 6) /**< \brief (UDP_RST_EP) Reset Endpoint 6 */ -#define UDP_RST_EP_EP7 (0x1 << 7) /**< \brief (UDP_RST_EP) Reset Endpoint 7 */ -/* -------- UDP_CSR[8] : (UDP Offset: 0x2C) Endpoint Control and Status Register (ept_num = 0) -------- */ -#define UDP_CSR_TXCOMP (0x1 << 0) /**< \brief (UDP_CSR[8]) Generates an IN Packet with Data Previously Written in the DPR */ -#define UDP_CSR_RX_DATA_BK0 (0x1 << 1) /**< \brief (UDP_CSR[8]) Receive Data Bank 0 */ -#define UDP_CSR_RXSETUP (0x1 << 2) /**< \brief (UDP_CSR[8]) Received Setup */ -#define UDP_CSR_STALLSENTISOERROR (0x1 << 3) /**< \brief (UDP_CSR[8]) */ -#define UDP_CSR_TXPKTRDY (0x1 << 4) /**< \brief (UDP_CSR[8]) Transmit Packet Ready */ -#define UDP_CSR_FORCESTALL (0x1 << 5) /**< \brief (UDP_CSR[8]) Force Stall (used by Control, Bulk and Isochronous Endpoints) */ -#define UDP_CSR_RX_DATA_BK1 (0x1 << 6) /**< \brief (UDP_CSR[8]) Receive Data Bank 1 (only used by endpoints with ping-pong attributes) */ -#define UDP_CSR_DIR (0x1 << 7) /**< \brief (UDP_CSR[8]) Transfer Direction (only available for control endpoints) */ -#define UDP_CSR_EPTYPE (0x7 << 8) /**< \brief (UDP_CSR[8]) Endpoint Type */ -#define UDP_CSR_EPTYPE_CTRL (0x0 << 8) /**< \brief (UDP_CSR[8]) Control */ -#define UDP_CSR_EPTYPE_ISO_OUT (0x1 << 8) /**< \brief (UDP_CSR[8]) Isochronous OUT */ -#define UDP_CSR_EPTYPE_BULK_OUT (0x2 << 8) /**< \brief (UDP_CSR[8]) Bulk OUT */ -#define UDP_CSR_EPTYPE_INT_OUT (0x3 << 8) /**< \brief (UDP_CSR[8]) Interrupt OUT */ -#define UDP_CSR_EPTYPE_ISO_IN (0x5 << 8) /**< \brief (UDP_CSR[8]) Isochronous IN */ -#define UDP_CSR_EPTYPE_BULK_IN (0x6 << 8) /**< \brief (UDP_CSR[8]) Bulk IN */ -#define UDP_CSR_EPTYPE_INT_IN (0x7 << 8) /**< \brief (UDP_CSR[8]) Interrupt IN */ -#define UDP_CSR_DTGLE (0x1 << 11) /**< \brief (UDP_CSR[8]) Data Toggle */ -#define UDP_CSR_EPEDS (0x1 << 15) /**< \brief (UDP_CSR[8]) Endpoint Enable Disable */ -#define UDP_CSR_RXBYTECNT (0x7ff << 16) /**< \brief (UDP_CSR[8]) Number of Bytes Available in the FIFO */ -/* -------- UDP_FDR[8] : (UDP Offset: 0x4C) Endpoint FIFO Data Register (ept_num = 0) -------- */ -#define UDP_FDR_FIFO_DATA (0xff << 0) /**< \brief (UDP_FDR[8]) FIFO Data Value */ -/* -------- UDP_TXVC : (UDP Offset: 0x074) Transceiver Control Register -------- */ -#define UDP_TXVC_TXVDIS (0x1 << 8) /**< \brief (UDP_TXVC) Transceiver Disable */ -#define UDP_TXVC_PUON (0x1 << 9) /**< \brief (UDP_TXVC) Pullup On */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Universal Synchronous Asynchronous Receiver Transmitter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_USART Universal Synchronous Asynchronous Receiver Transmitter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Usart hardware registers */ -typedef struct { - WoReg US_CR; /**< \brief (Usart Offset: 0x0000) Control Register */ - RwReg US_MR; /**< \brief (Usart Offset: 0x0004) Mode Register */ - WoReg US_IER; /**< \brief (Usart Offset: 0x0008) Interrupt Enable Register */ - WoReg US_IDR; /**< \brief (Usart Offset: 0x000C) Interrupt Disable Register */ - RoReg US_IMR; /**< \brief (Usart Offset: 0x0010) Interrupt Mask Register */ - RoReg US_CSR; /**< \brief (Usart Offset: 0x0014) Channel Status Register */ - RoReg US_RHR; /**< \brief (Usart Offset: 0x0018) Receiver Holding Register */ - WoReg US_THR; /**< \brief (Usart Offset: 0x001C) Transmitter Holding Register */ - RwReg US_BRGR; /**< \brief (Usart Offset: 0x0020) Baud Rate Generator Register */ - RwReg US_RTOR; /**< \brief (Usart Offset: 0x0024) Receiver Time-out Register */ - RwReg US_TTGR; /**< \brief (Usart Offset: 0x0028) Transmitter Timeguard Register */ - RwReg Reserved1[5]; - RwReg US_FIDI; /**< \brief (Usart Offset: 0x0040) FI DI Ratio Register */ - RoReg US_NER; /**< \brief (Usart Offset: 0x0044) Number of Errors Register */ - RwReg Reserved2[1]; - RwReg US_IF; /**< \brief (Usart Offset: 0x004C) IrDA Filter Register */ - RwReg US_MAN; /**< \brief (Usart Offset: 0x0050) Manchester Encoder Decoder Register */ - RwReg Reserved3[36]; - RwReg US_WPMR; /**< \brief (Usart Offset: 0xE4) Write Protect Mode Register */ - RoReg US_WPSR; /**< \brief (Usart Offset: 0xE8) Write Protect Status Register */ - RwReg Reserved4[4]; - RoReg US_VERSION; /**< \brief (Usart Offset: 0xFC) Version Register */ - RwReg US_RPR; /**< \brief (Usart Offset: 0x100) Receive Pointer Register */ - RwReg US_RCR; /**< \brief (Usart Offset: 0x104) Receive Counter Register */ - RwReg US_TPR; /**< \brief (Usart Offset: 0x108) Transmit Pointer Register */ - RwReg US_TCR; /**< \brief (Usart Offset: 0x10C) Transmit Counter Register */ - RwReg US_RNPR; /**< \brief (Usart Offset: 0x110) Receive Next Pointer Register */ - RwReg US_RNCR; /**< \brief (Usart Offset: 0x114) Receive Next Counter Register */ - RwReg US_TNPR; /**< \brief (Usart Offset: 0x118) Transmit Next Pointer Register */ - RwReg US_TNCR; /**< \brief (Usart Offset: 0x11C) Transmit Next Counter Register */ - WoReg US_PTCR; /**< \brief (Usart Offset: 0x120) Transfer Control Register */ - RoReg US_PTSR; /**< \brief (Usart Offset: 0x124) Transfer Status Register */ -} Usart; -#endif /* __ASSEMBLY__ */ -/* -------- US_CR : (USART Offset: 0x0000) Control Register -------- */ -#define US_CR_RSTRX (0x1 << 2) /**< \brief (US_CR) Reset Receiver */ -#define US_CR_RSTTX (0x1 << 3) /**< \brief (US_CR) Reset Transmitter */ -#define US_CR_RXEN (0x1 << 4) /**< \brief (US_CR) Receiver Enable */ -#define US_CR_RXDIS (0x1 << 5) /**< \brief (US_CR) Receiver Disable */ -#define US_CR_TXEN (0x1 << 6) /**< \brief (US_CR) Transmitter Enable */ -#define US_CR_TXDIS (0x1 << 7) /**< \brief (US_CR) Transmitter Disable */ -#define US_CR_RSTSTA (0x1 << 8) /**< \brief (US_CR) Reset Status Bits */ -#define US_CR_STTBRK (0x1 << 9) /**< \brief (US_CR) Start Break */ -#define US_CR_STPBRK (0x1 << 10) /**< \brief (US_CR) Stop Break */ -#define US_CR_STTTO (0x1 << 11) /**< \brief (US_CR) Start Time-out */ -#define US_CR_SENDA (0x1 << 12) /**< \brief (US_CR) Send Address */ -#define US_CR_RSTIT (0x1 << 13) /**< \brief (US_CR) Reset Iterations */ -#define US_CR_RSTNACK (0x1 << 14) /**< \brief (US_CR) Reset Non Acknowledge */ -#define US_CR_RETTO (0x1 << 15) /**< \brief (US_CR) Rearm Time-out */ -#define US_CR_DTREN (0x1 << 16) /**< \brief (US_CR) Data Terminal Ready Enable */ -#define US_CR_DTRDIS (0x1 << 17) /**< \brief (US_CR) Data Terminal Ready Disable */ -#define US_CR_RTSEN__FCS (0x1 << 18) /**< \brief (US_CR) Request to Send Enable/Force SPI Chip Select */ -#define US_CR_RTSDIS__RCS (0x1 << 19) /**< \brief (US_CR) Request to Send Disable/Release SPI Chip Select */ -/* -------- US_MR : (USART Offset: 0x0004) Mode Register -------- */ -#define US_MR_USART_MODE (0xf << 0) /**< \brief (US_MR) */ -#define US_MR_USART_MODE_NORMAL (0x0) /**< (USART) Normal*/ -#define US_MR_USART_MODE_RS485 (0x1) /**< (USART) RS485*/ -#define US_MR_USART_MODE_HWHSH (0x2) /**< (USART) Hardware Handshaking*/ -#define US_MR_USART_MODE_ISO7816_0 (0x4) /**< (USART) ISO7816 protocol: T = 0*/ -#define US_MR_USART_MODE_ISO7816_1 (0x6) /**< (USART) ISO7816 protocol: T = 1*/ -#define US_MR_USART_MODE_IRDA (0x8) /**< (USART) IrDA*/ -#define US_MR_USART_MODE_SPIM (0xE) /**< (USART) SPI Master*/ -#define US_MR_USART_MODE_SPIS (0xF) /**< (USART) SPI Slave*/ -#define US_MR_USCLKS (0x3 << 4) /**< \brief (US_MR) Clock Selection */ -#define US_MR_USCLKS_CLOCK (0x0 << 4) /**< (USART) MCK*/ -#define US_MR_USCLKS_FDIV1 (0x1 << 4) /**< (USART) MCK/DIV(DIV=8)*/ -#define US_MR_USCLKS_SLOW (0x2 << 4) /**< (USART) Reserved*/ -#define US_MR_USCLKS_EXT (0x3 << 4) /**< (USART) SCK*/ -#define US_MR_CHRL (0x3 << 6) /**< \brief (US_MR) Character Length. */ -#define US_MR_CHRL_5_BITS (0x0 << 6) /**< (USART) Character Length: 5 bits*/ -#define US_MR_CHRL_6_BITS (0x1 << 6) /**< (USART) Character Length: 6 bits*/ -#define US_MR_CHRL_7_BITS (0x2 << 6) /**< (USART) Character Length: 7 bits*/ -#define US_MR_CHRL_8_BITS (0x3 << 6) /**< (USART) Character Length: 8 bits*/ -#define US_MR_SYNC__CPHA (0x1 << 8) /**< \brief (US_MR) Synchronous Mode Select or SPI Clock Phase */ -#define US_MR_PAR (0x7 << 9) /**< \brief (US_MR) Parity Type */ -#define US_MR_PAR_EVEN (0x0 << 9) /**< (USART) Even Parity*/ -#define US_MR_PAR_ODD (0x1 << 9) /**< (USART) Odd Parity*/ -#define US_MR_PAR_SPACE (0x2 << 9) /**< (USART) Parity forced to 0 (Space)*/ -#define US_MR_PAR_MARK (0x3 << 9) /**< (USART) Parity forced to 1 (Mark)*/ -#define US_MR_PAR_NONE (0x4 << 9) /**< (USART) No Parity*/ -#define US_MR_PAR_MULTI_DROP (0x6 << 9) /**< (USART) Multi-drop mode*/ -#define US_MR_NBSTOP (0x3 << 12) /**< \brief (US_MR) Number of Stop Bits */ -#define US_MR_NBSTOP_1_BIT (0x0 << 12) /**< (USART) 1 stop bit*/ -#define US_MR_NBSTOP_15_BIT (0x1 << 12) /**< (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits*/ -#define US_MR_NBSTOP_2_BIT (0x2 << 12) /**< (USART) 2 stop bits*/ -#define US_MR_CHMODE (0x3 << 14) /**< \brief (US_MR) Channel Mode */ -#define US_MR_CHMODE_NORMAL (0x0 << 14) /**< (USART) Normal Mode: The USART channel operates as an RX/TX USART.*/ -#define US_MR_CHMODE_AUTO (0x1 << 14) /**< (USART) Automatic Echo: Receiver Data Input is connected to the TXD pin.*/ -#define US_MR_CHMODE_LOCAL (0x2 << 14) /**< (USART) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.*/ -#define US_MR_CHMODE_REMOTE (0x3 << 14) /**< (USART) Remote Loopback: RXD pin is internally connected to TXD pin.*/ -#define US_MR_MSBF__CPOL (0x1 << 16) /**< \brief (US_MR) Bit Order or SPI Clock Polarity */ -#define US_MR_MODE9 (0x1 << 17) /**< \brief (US_MR) 9-bit Character Length */ -#define US_MR_CLKO (0x1 << 18) /**< \brief (US_MR) Clock Output Select */ -#define US_MR_OVER (0x1 << 19) /**< \brief (US_MR) Oversampling Mode */ -#define US_MR_INACK (0x1 << 20) /**< \brief (US_MR) Inhibit Non Acknowledge */ -#define US_MR_DSNACK (0x1 << 21) /**< \brief (US_MR) Disable Successive NACK */ -#define US_MR_VAR_SYNC (0x1 << 22) /**< \brief (US_MR) Variable Synchronization of Command/Data Sync Start Frame Delimiter */ -#define US_MR_INVDATA (0x1 << 23) /**< \brief (US_MR) INverted Data */ -#define US_MR_MAX_ITERATION (0x7 << 24) /**< \brief (US_MR) */ -#define US_MR_FILTER (0x1 << 28) /**< \brief (US_MR) Infrared Receive Line Filter */ -#define US_MR_MAN (0x1 << 29) /**< \brief (US_MR) Manchester Encoder/Decoder Enable */ -#define US_MR_MODSYNC_ (0x1 << 30) /**< \brief (US_MR) */ -#define US_MR_ONEBIT (0x1 << 31) /**< \brief (US_MR) Start Frame Delimiter Selector */ -/* -------- US_IER : (USART Offset: 0x0008) Interrupt Enable Register -------- */ -#define US_IER_RXRDY (0x1 << 0) /**< \brief (US_IER) RXRDY Interrupt Enable */ -#define US_IER_TXRDY (0x1 << 1) /**< \brief (US_IER) TXRDY Interrupt Enable */ -#define US_IER_RXBRK (0x1 << 2) /**< \brief (US_IER) Receiver Break Interrupt Enable */ -#define US_IER_ENDRX (0x1 << 3) /**< \brief (US_IER) End of Receive Transfer Interrupt Enable */ -#define US_IER_ENDTX (0x1 << 4) /**< \brief (US_IER) End of Transmit Interrupt Enable */ -#define US_IER_OVRE (0x1 << 5) /**< \brief (US_IER) Overrun Error Interrupt Enable */ -#define US_IER_FRAME (0x1 << 6) /**< \brief (US_IER) Framing Error Interrupt Enable */ -#define US_IER_PARE (0x1 << 7) /**< \brief (US_IER) Parity Error Interrupt Enable */ -#define US_IER_TIMEOUT (0x1 << 8) /**< \brief (US_IER) Time-out Interrupt Enable */ -#define US_IER_TXEMPTY (0x1 << 9) /**< \brief (US_IER) TXEMPTY Interrupt Enable */ -#define US_IER_ITER__UNRE (0x1 << 10) /**< \brief (US_IER) Iteration or SPI Underrun Error Interrupt Enable */ -#define US_IER_TXBUFE (0x1 << 11) /**< \brief (US_IER) Buffer Empty Interrupt Enable */ -#define US_IER_RXBUFF (0x1 << 12) /**< \brief (US_IER) Buffer Full Interrupt Enable */ -#define US_IER_NACK (0x1 << 13) /**< \brief (US_IER) Non Acknowledge Interrupt Enable */ -#define US_IER_RIIC (0x1 << 16) /**< \brief (US_IER) Ring Indicator Input Change Enable */ -#define US_IER_DSRIC (0x1 << 17) /**< \brief (US_IER) Data Set Ready Input Change Enable */ -#define US_IER_DCDIC (0x1 << 18) /**< \brief (US_IER) Data Carrier Detect Input Change Interrupt Enable */ -#define US_IER_CTSIC (0x1 << 19) /**< \brief (US_IER) Clear to Send Input Change Interrupt Enable */ -#define US_IER_MANE (0x1 << 24) /**< \brief (US_IER) Manchester Error Interrupt Enable */ -/* -------- US_IDR : (USART Offset: 0x000C) Interrupt Disable Register -------- */ -#define US_IDR_RXRDY (0x1 << 0) /**< \brief (US_IDR) RXRDY Interrupt Disable */ -#define US_IDR_TXRDY (0x1 << 1) /**< \brief (US_IDR) TXRDY Interrupt Disable */ -#define US_IDR_RXBRK (0x1 << 2) /**< \brief (US_IDR) Receiver Break Interrupt Disable */ -#define US_IDR_ENDRX (0x1 << 3) /**< \brief (US_IDR) End of Receive Transfer Interrupt Disable */ -#define US_IDR_ENDTX (0x1 << 4) /**< \brief (US_IDR) End of Transmit Interrupt Disable */ -#define US_IDR_OVRE (0x1 << 5) /**< \brief (US_IDR) Overrun Error Interrupt Disable */ -#define US_IDR_FRAME (0x1 << 6) /**< \brief (US_IDR) Framing Error Interrupt Disable */ -#define US_IDR_PARE (0x1 << 7) /**< \brief (US_IDR) Parity Error Interrupt Disable */ -#define US_IDR_TIMEOUT (0x1 << 8) /**< \brief (US_IDR) Time-out Interrupt Disable */ -#define US_IDR_TXEMPTY (0x1 << 9) /**< \brief (US_IDR) TXEMPTY Interrupt Disable */ -#define US_IDR_ITER__UNRE (0x1 << 10) /**< \brief (US_IDR) Iteration or SPI Underrun Error Interrupt Enable */ -#define US_IDR_TXBUFE (0x1 << 11) /**< \brief (US_IDR) Buffer Empty Interrupt Disable */ -#define US_IDR_RXBUFF (0x1 << 12) /**< \brief (US_IDR) Buffer Full Interrupt Disable */ -#define US_IDR_NACK (0x1 << 13) /**< \brief (US_IDR) Non Acknowledge Interrupt Disable */ -#define US_IDR_RIIC (0x1 << 16) /**< \brief (US_IDR) Ring Indicator Input Change Disable */ -#define US_IDR_DSRIC (0x1 << 17) /**< \brief (US_IDR) Data Set Ready Input Change Disable */ -#define US_IDR_DCDIC (0x1 << 18) /**< \brief (US_IDR) Data Carrier Detect Input Change Interrupt Disable */ -#define US_IDR_CTSIC (0x1 << 19) /**< \brief (US_IDR) Clear to Send Input Change Interrupt Disable */ -#define US_IDR_MANE (0x1 << 24) /**< \brief (US_IDR) Manchester Error Interrupt Disable */ -/* -------- US_IMR : (USART Offset: 0x0010) Interrupt Mask Register -------- */ -#define US_IMR_RXRDY (0x1 << 0) /**< \brief (US_IMR) RXRDY Interrupt Mask */ -#define US_IMR_TXRDY (0x1 << 1) /**< \brief (US_IMR) TXRDY Interrupt Mask */ -#define US_IMR_RXBRK (0x1 << 2) /**< \brief (US_IMR) Receiver Break Interrupt Mask */ -#define US_IMR_ENDRX (0x1 << 3) /**< \brief (US_IMR) End of Receive Transfer Interrupt Mask */ -#define US_IMR_ENDTX (0x1 << 4) /**< \brief (US_IMR) End of Transmit Interrupt Mask */ -#define US_IMR_OVRE (0x1 << 5) /**< \brief (US_IMR) Overrun Error Interrupt Mask */ -#define US_IMR_FRAME (0x1 << 6) /**< \brief (US_IMR) Framing Error Interrupt Mask */ -#define US_IMR_PARE (0x1 << 7) /**< \brief (US_IMR) Parity Error Interrupt Mask */ -#define US_IMR_TIMEOUT (0x1 << 8) /**< \brief (US_IMR) Time-out Interrupt Mask */ -#define US_IMR_TXEMPTY (0x1 << 9) /**< \brief (US_IMR) TXEMPTY Interrupt Mask */ -#define US_IMR_ITER__UNRE (0x1 << 10) /**< \brief (US_IMR) Iteration or SPI Underrun Error Interrupt Enable */ -#define US_IMR_TXBUFE (0x1 << 11) /**< \brief (US_IMR) Buffer Empty Interrupt Mask */ -#define US_IMR_RXBUFF (0x1 << 12) /**< \brief (US_IMR) Buffer Full Interrupt Mask */ -#define US_IMR_NACK (0x1 << 13) /**< \brief (US_IMR) Non Acknowledge Interrupt Mask */ -#define US_IMR_RIIC (0x1 << 16) /**< \brief (US_IMR) Ring Indicator Input Change Mask */ -#define US_IMR_DSRIC (0x1 << 17) /**< \brief (US_IMR) Data Set Ready Input Change Mask */ -#define US_IMR_DCDIC (0x1 << 18) /**< \brief (US_IMR) Data Carrier Detect Input Change Interrupt Mask */ -#define US_IMR_CTSIC (0x1 << 19) /**< \brief (US_IMR) Clear to Send Input Change Interrupt Mask */ -#define US_IMR_MANE (0x1 << 24) /**< \brief (US_IMR) Manchester Error Interrupt Mask */ -/* -------- US_CSR : (USART Offset: 0x0014) Channel Status Register -------- */ -#define US_CSR_RXRDY (0x1 << 0) /**< \brief (US_CSR) Receiver Ready */ -#define US_CSR_TXRDY (0x1 << 1) /**< \brief (US_CSR) Transmitter Ready */ -#define US_CSR_RXBRK (0x1 << 2) /**< \brief (US_CSR) Break Received/End of Break */ -#define US_CSR_ENDRX (0x1 << 3) /**< \brief (US_CSR) End of Receiver Transfer */ -#define US_CSR_ENDTX (0x1 << 4) /**< \brief (US_CSR) End of Transmitter Transfer */ -#define US_CSR_OVRE (0x1 << 5) /**< \brief (US_CSR) Overrun Error */ -#define US_CSR_FRAME (0x1 << 6) /**< \brief (US_CSR) Framing Error */ -#define US_CSR_PARE (0x1 << 7) /**< \brief (US_CSR) Parity Error */ -#define US_CSR_TIMEOUT (0x1 << 8) /**< \brief (US_CSR) Receiver Time-out */ -#define US_CSR_TXEMPTY (0x1 << 9) /**< \brief (US_CSR) Transmitter Empty */ -#define US_CSR_ITER__UNRE (0x1 << 10) /**< \brief (US_CSR) Max number of Repetitions Reached or SPI Underrun Error */ -#define US_CSR_TXBUFE (0x1 << 11) /**< \brief (US_CSR) Transmission Buffer Empty */ -#define US_CSR_RXBUFF (0x1 << 12) /**< \brief (US_CSR) Reception Buffer Full */ -#define US_CSR_NACK (0x1 << 13) /**< \brief (US_CSR) */ -#define US_CSR_RIIC (0x1 << 16) /**< \brief (US_CSR) Ring Indicator Input Change Flag */ -#define US_CSR_DSRIC (0x1 << 17) /**< \brief (US_CSR) Data Set Ready Input Change Flag */ -#define US_CSR_DCDIC (0x1 << 18) /**< \brief (US_CSR) Data Carrier Detect Input Change Flag */ -#define US_CSR_CTSIC (0x1 << 19) /**< \brief (US_CSR) Clear to Send Input Change Flag */ -#define US_CSR_RI (0x1 << 20) /**< \brief (US_CSR) Image of RI Input */ -#define US_CSR_DSR (0x1 << 21) /**< \brief (US_CSR) Image of DSR Input */ -#define US_CSR_DCD (0x1 << 22) /**< \brief (US_CSR) Image of DCD Input */ -#define US_CSR_CTS (0x1 << 23) /**< \brief (US_CSR) Image of CTS Input */ -#define US_CSR_MANERR (0x1 << 24) /**< \brief (US_CSR) Manchester Error */ -/* -------- US_RHR : (USART Offset: 0x0018) Receiver Holding Register -------- */ -#define US_RHR_RXCHR (0x1ff << 0) /**< \brief (US_RHR) Received Character */ -#define US_RHR_RXSYNH (0x1 << 15) /**< \brief (US_RHR) Received Sync */ -/* -------- US_THR : (USART Offset: 0x001C) Transmitter Holding Register -------- */ -#define US_THR_TXCHR (0x1ff << 0) /**< \brief (US_THR) Character to be Transmitted */ -#define US_THR_TXSYNH (0x1 << 15) /**< \brief (US_THR) Sync Field to be transmitted */ -/* -------- US_BRGR : (USART Offset: 0x0020) Baud Rate Generator Register -------- */ -#define US_BRGR_CD (0xffff << 0) /**< \brief (US_BRGR) Clock Divider */ -#define US_BRGR_FP (0x7 << 16) /**< \brief (US_BRGR) Fractional Part */ -/* -------- US_RTOR : (USART Offset: 0x0024) Receiver Time-out Register -------- */ -#define US_RTOR_TO (0xffff << 0) /**< \brief (US_RTOR) Time-out Value */ -/* -------- US_TTGR : (USART Offset: 0x0028) Transmitter Timeguard Register -------- */ -#define US_TTGR_TG (0xff << 0) /**< \brief (US_TTGR) Timeguard Value */ -/* -------- US_FIDI : (USART Offset: 0x0040) FI DI Ratio Register -------- */ -#define US_FIDI_FI_DI_RATIO (0x7ff << 0) /**< \brief (US_FIDI) FI Over DI Ratio Value */ -/* -------- US_NER : (USART Offset: 0x0044) Number of Errors Register -------- */ -#define US_NER_NB_ERRORS (0xff << 0) /**< \brief (US_NER) Number of Errors */ -/* -------- US_IF : (USART Offset: 0x004C) IrDA Filter Register -------- */ -#define US_IF_IRDA_FILTER (0xff << 0) /**< \brief (US_IF) IrDA Filter */ -/* -------- US_MAN : (USART Offset: 0x0050) Manchester Encoder Decoder Register -------- */ -#define US_MAN_TX_PL (0xf << 0) /**< \brief (US_MAN) Transmitter Preamble Length */ -#define US_MAN_TX_PP (0x3 << 8) /**< \brief (US_MAN) Transmitter Preamble Pattern */ -#define US_MAN_TX_MPOL (0x1 << 12) /**< \brief (US_MAN) Transmitter Manchester Polarity */ -#define US_MAN_RX_PL (0xf << 16) /**< \brief (US_MAN) Receiver Preamble Length */ -#define US_MAN_RX_PP (0x3 << 24) /**< \brief (US_MAN) Receiver Preamble Pattern detected */ -#define US_MAN_RX_MPOL (0x1 << 28) /**< \brief (US_MAN) Receiver Manchester Polarity */ -#define US_MAN_STUCKTO1 (0x1 << 29) /**< \brief (US_MAN) */ -#define US_MAN_DRIFT (0x1 << 30) /**< \brief (US_MAN) Drift compensation */ -/* -------- US_WPMR : (USART Offset: 0xE4) Write Protect Mode Register -------- */ -#define US_WPMR_WPEN (0x1 << 0) /**< \brief (US_WPMR) Write Protect Enable */ -#define US_WPMR_WPKEY (0xffffff << 8) /**< \brief (US_WPMR) Write Protect KEY */ -/* -------- US_WPSR : (USART Offset: 0xE8) Write Protect Status Register -------- */ -#define US_WPSR_WPVS (0x1 << 0) /**< \brief (US_WPSR) Write Protect Violation Status */ -#define US_WPSR_WPVSRC (0xffff << 8) /**< \brief (US_WPSR) Write Protect Violation Source */ -/* -------- US_VERSION : (USART Offset: 0xFC) Version Register -------- */ -#define US_VERSION_VERSION (0xfff << 0) /**< \brief (US_VERSION) */ -#define US_VERSION_MFN (0x7 << 16) /**< \brief (US_VERSION) */ -/* -------- US_RPR : (USART Offset: 0x100) Receive Pointer Register -------- */ -#define US_RPR_RXPTR (0xffffffff << 0) /**< \brief (US_RPR) Receive Pointer Register */ -/* -------- US_RCR : (USART Offset: 0x104) Receive Counter Register -------- */ -#define US_RCR_RXCTR (0xffff << 0) /**< \brief (US_RCR) Receive Counter Register */ -/* -------- US_TPR : (USART Offset: 0x108) Transmit Pointer Register -------- */ -#define US_TPR_TXPTR (0xffffffff << 0) /**< \brief (US_TPR) Transmit Counter Register */ -/* -------- US_TCR : (USART Offset: 0x10C) Transmit Counter Register -------- */ -#define US_TCR_TXCTR (0xffff << 0) /**< \brief (US_TCR) Transmit Counter Register */ -/* -------- US_RNPR : (USART Offset: 0x110) Receive Next Pointer Register -------- */ -#define US_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (US_RNPR) Receive Next Pointer */ -/* -------- US_RNCR : (USART Offset: 0x114) Receive Next Counter Register -------- */ -#define US_RNCR_RXNCTR (0xffff << 0) /**< \brief (US_RNCR) Receive Next Counter */ -/* -------- US_TNPR : (USART Offset: 0x118) Transmit Next Pointer Register -------- */ -#define US_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (US_TNPR) Transmit Next Pointer */ -/* -------- US_TNCR : (USART Offset: 0x11C) Transmit Next Counter Register -------- */ -#define US_TNCR_TXNCTR (0xffff << 0) /**< \brief (US_TNCR) Transmit Counter Next */ -/* -------- US_PTCR : (USART Offset: 0x120) Transfer Control Register -------- */ -#define US_PTCR_RXTEN (0x1 << 0) /**< \brief (US_PTCR) Receiver Transfer Enable */ -#define US_PTCR_RXTDIS (0x1 << 1) /**< \brief (US_PTCR) Receiver Transfer Disable */ -#define US_PTCR_TXTEN (0x1 << 8) /**< \brief (US_PTCR) Transmitter Transfer Enable */ -#define US_PTCR_TXTDIS (0x1 << 9) /**< \brief (US_PTCR) Transmitter Transfer Disable */ -/* -------- US_PTSR : (USART Offset: 0x124) Transfer Status Register -------- */ -#define US_PTSR_RXTEN (0x1 << 0) /**< \brief (US_PTSR) Receiver Transfer Enable */ -#define US_PTSR_TXTEN (0x1 << 8) /**< \brief (US_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Watchdog Timer */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3S_WDT Watchdog Timer */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Wdt hardware registers */ -typedef struct { - WoReg WDT_CR; /**< \brief (Wdt Offset: 0x00) Control Register */ - RwReg WDT_MR; /**< \brief (Wdt Offset: 0x04) Mode Register */ - RoReg WDT_SR; /**< \brief (Wdt Offset: 0x08) Status Register */ -} Wdt; -#endif /* __ASSEMBLY__ */ -/* -------- WDT_CR : (WDT Offset: 0x00) Control Register -------- */ -#define WDT_CR_WDRSTT (0x1 << 0) /**< \brief (WDT_CR) Watchdog Restart */ -#define WDT_CR_KEY (0xff << 24) /**< \brief (WDT_CR) Password */ -/* -------- WDT_MR : (WDT Offset: 0x04) Mode Register -------- */ -#define WDT_MR_WDV (0xfff << 0) /**< \brief (WDT_MR) Watchdog Counter Value */ -#define WDT_MR_WDFIEN (0x1 << 12) /**< \brief (WDT_MR) Watchdog Fault Interrupt Enable */ -#define WDT_MR_WDRSTEN (0x1 << 13) /**< \brief (WDT_MR) Watchdog Reset Enable */ -#define WDT_MR_WDRPROC (0x1 << 14) /**< \brief (WDT_MR) Watchdog Reset Processor */ -#define WDT_MR_WDDIS (0x1 << 15) /**< \brief (WDT_MR) Watchdog Disable */ -#define WDT_MR_WDD (0xfff << 16) /**< \brief (WDT_MR) Watchdog Delta Value */ -#define WDT_MR_WDDBGHLT (0x1 << 28) /**< \brief (WDT_MR) Watchdog Debug Halt */ -#define WDT_MR_WDIDLEHLT (0x1 << 29) /**< \brief (WDT_MR) Watchdog Idle Halt */ -/* -------- WDT_SR : (WDT Offset: 0x08) Status Register -------- */ -#define WDT_SR_WDUNF (0x1 << 0) /**< \brief (WDT_SR) Watchdog Underflow */ -#define WDT_SR_WDERR (0x1 << 1) /**< \brief (WDT_SR) Watchdog Error */ - -/*@}*/ - -/*@}*/ - -/* ***************************************************************************** */ -/* REGISTER ACCESS DEFINITIONS FOR AT91SAM3S */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3S_reg Registers Access Definitions */ -/*@{*/ - -/* ========== Register definition for HSMCI peripheral ========== */ -#define REG_HSMCI_CR REG_ACCESS(WoReg, 0x40000000U) /**< \brief (HSMCI) Control Register */ -#define REG_HSMCI_MR REG_ACCESS(RwReg, 0x40000004U) /**< \brief (HSMCI) Mode Register */ -#define REG_HSMCI_DTOR REG_ACCESS(RwReg, 0x40000008U) /**< \brief (HSMCI) Data Timeout Register */ -#define REG_HSMCI_SDCR REG_ACCESS(RwReg, 0x4000000CU) /**< \brief (HSMCI) SD/SDIO Card Register */ -#define REG_HSMCI_ARGR REG_ACCESS(RwReg, 0x40000010U) /**< \brief (HSMCI) Argument Register */ -#define REG_HSMCI_CMDR REG_ACCESS(WoReg, 0x40000014U) /**< \brief (HSMCI) Command Register */ -#define REG_HSMCI_BLKR REG_ACCESS(RwReg, 0x40000018U) /**< \brief (HSMCI) Block Register */ -#define REG_HSMCI_CSTOR REG_ACCESS(RwReg, 0x4000001CU) /**< \brief (HSMCI) Completion Signal Timeout Register */ -#define REG_HSMCI_RSPR REG_ACCESS(RoReg, 0x40000020U) /**< \brief (HSMCI) Response Register */ -#define REG_HSMCI_RDR REG_ACCESS(RoReg, 0x40000030U) /**< \brief (HSMCI) Receive Data Register */ -#define REG_HSMCI_TDR REG_ACCESS(WoReg, 0x40000034U) /**< \brief (HSMCI) Transmit Data Register */ -#define REG_HSMCI_SR REG_ACCESS(RoReg, 0x40000040U) /**< \brief (HSMCI) Status Register */ -#define REG_HSMCI_IER REG_ACCESS(WoReg, 0x40000044U) /**< \brief (HSMCI) Interrupt Enable Register */ -#define REG_HSMCI_IDR REG_ACCESS(WoReg, 0x40000048U) /**< \brief (HSMCI) Interrupt Disable Register */ -#define REG_HSMCI_IMR REG_ACCESS(RoReg, 0x4000004CU) /**< \brief (HSMCI) Interrupt Mask Register */ -#define REG_HSMCI_CFG REG_ACCESS(RwReg, 0x40000054U) /**< \brief (HSMCI) Configuration Register */ -#define REG_HSMCI_WPMR REG_ACCESS(RwReg, 0x400000E4U) /**< \brief (HSMCI) Write Protection Mode Register */ -#define REG_HSMCI_WPSR REG_ACCESS(RoReg, 0x400000E8U) /**< \brief (HSMCI) Write Protection Status Register */ -#define REG_HSMCI_RPR REG_ACCESS(RwReg, 0x40000100U) /**< \brief (HSMCI) Receive Pointer Register */ -#define REG_HSMCI_RCR REG_ACCESS(RwReg, 0x40000104U) /**< \brief (HSMCI) Receive Counter Register */ -#define REG_HSMCI_TPR REG_ACCESS(RwReg, 0x40000108U) /**< \brief (HSMCI) Transmit Pointer Register */ -#define REG_HSMCI_TCR REG_ACCESS(RwReg, 0x4000010CU) /**< \brief (HSMCI) Transmit Counter Register */ -#define REG_HSMCI_RNPR REG_ACCESS(RwReg, 0x40000110U) /**< \brief (HSMCI) Receive Next Pointer Register */ -#define REG_HSMCI_RNCR REG_ACCESS(RwReg, 0x40000114U) /**< \brief (HSMCI) Receive Next Counter Register */ -#define REG_HSMCI_TNPR REG_ACCESS(RwReg, 0x40000118U) /**< \brief (HSMCI) Transmit Next Pointer Register */ -#define REG_HSMCI_TNCR REG_ACCESS(RwReg, 0x4000011CU) /**< \brief (HSMCI) Transmit Next Counter Register */ -#define REG_HSMCI_PTCR REG_ACCESS(WoReg, 0x40000120U) /**< \brief (HSMCI) Transfer Control Register */ -#define REG_HSMCI_PTSR REG_ACCESS(RoReg, 0x40000124U) /**< \brief (HSMCI) Transfer Status Register */ -/* ========== Register definition for SSC peripheral ========== */ -#define REG_SSC_CR REG_ACCESS(WoReg, 0x40004000U) /**< \brief (SSC) Control Register */ -#define REG_SSC_CMR REG_ACCESS(RwReg, 0x40004004U) /**< \brief (SSC) Clock Mode Register */ -#define REG_SSC_RCMR REG_ACCESS(RwReg, 0x40004010U) /**< \brief (SSC) Receive Clock Mode Register */ -#define REG_SSC_RFMR REG_ACCESS(RwReg, 0x40004014U) /**< \brief (SSC) Receive Frame Mode Register */ -#define REG_SSC_TCMR REG_ACCESS(RwReg, 0x40004018U) /**< \brief (SSC) Transmit Clock Mode Register */ -#define REG_SSC_TFMR REG_ACCESS(RwReg, 0x4000401CU) /**< \brief (SSC) Transmit Frame Mode Register */ -#define REG_SSC_RHR REG_ACCESS(RoReg, 0x40004020U) /**< \brief (SSC) Receive Holding Register */ -#define REG_SSC_THR REG_ACCESS(WoReg, 0x40004024U) /**< \brief (SSC) Transmit Holding Register */ -#define REG_SSC_RSHR REG_ACCESS(RoReg, 0x40004030U) /**< \brief (SSC) Receive Sync. Holding Register */ -#define REG_SSC_TSHR REG_ACCESS(RwReg, 0x40004034U) /**< \brief (SSC) Transmit Sync. Holding Register */ -#define REG_SSC_RC0R REG_ACCESS(RwReg, 0x40004038U) /**< \brief (SSC) Receive Compare 0 Register */ -#define REG_SSC_RC1R REG_ACCESS(RwReg, 0x4000403CU) /**< \brief (SSC) Receive Compare 1 Register */ -#define REG_SSC_SR REG_ACCESS(RoReg, 0x40004040U) /**< \brief (SSC) Status Register */ -#define REG_SSC_IER REG_ACCESS(WoReg, 0x40004044U) /**< \brief (SSC) Interrupt Enable Register */ -#define REG_SSC_IDR REG_ACCESS(WoReg, 0x40004048U) /**< \brief (SSC) Interrupt Disable Register */ -#define REG_SSC_IMR REG_ACCESS(RoReg, 0x4000404CU) /**< \brief (SSC) Interrupt Mask Register */ -#define REG_SSC_WPMR REG_ACCESS(RwReg, 0x400040E4U) /**< \brief (SSC) Write Protect Mode Register */ -#define REG_SSC_WPSR REG_ACCESS(RoReg, 0x400040E8U) /**< \brief (SSC) Write Protect Status Register */ -#define REG_SSC_RPR REG_ACCESS(RwReg, 0x40004100U) /**< \brief (SSC) Receive Pointer Register */ -#define REG_SSC_RCR REG_ACCESS(RwReg, 0x40004104U) /**< \brief (SSC) Receive Counter Register */ -#define REG_SSC_TPR REG_ACCESS(RwReg, 0x40004108U) /**< \brief (SSC) Transmit Pointer Register */ -#define REG_SSC_TCR REG_ACCESS(RwReg, 0x4000410CU) /**< \brief (SSC) Transmit Counter Register */ -#define REG_SSC_RNPR REG_ACCESS(RwReg, 0x40004110U) /**< \brief (SSC) Receive Next Pointer Register */ -#define REG_SSC_RNCR REG_ACCESS(RwReg, 0x40004114U) /**< \brief (SSC) Receive Next Counter Register */ -#define REG_SSC_TNPR REG_ACCESS(RwReg, 0x40004118U) /**< \brief (SSC) Transmit Next Pointer Register */ -#define REG_SSC_TNCR REG_ACCESS(RwReg, 0x4000411CU) /**< \brief (SSC) Transmit Next Counter Register */ -#define REG_SSC_PTCR REG_ACCESS(WoReg, 0x40004120U) /**< \brief (SSC) Transfer Control Register */ -#define REG_SSC_PTSR REG_ACCESS(RoReg, 0x40004124U) /**< \brief (SSC) Transfer Status Register */ -/* ========== Register definition for SPI peripheral ========== */ -#define REG_SPI_CR REG_ACCESS(WoReg, 0x40008000U) /**< \brief (SPI) Control Register */ -#define REG_SPI_MR REG_ACCESS(RwReg, 0x40008004U) /**< \brief (SPI) Mode Register */ -#define REG_SPI_RDR REG_ACCESS(RoReg, 0x40008008U) /**< \brief (SPI) Receive Data Register */ -#define REG_SPI_TDR REG_ACCESS(WoReg, 0x4000800CU) /**< \brief (SPI) Transmit Data Register */ -#define REG_SPI_SR REG_ACCESS(RoReg, 0x40008010U) /**< \brief (SPI) Status Register */ -#define REG_SPI_IER REG_ACCESS(WoReg, 0x40008014U) /**< \brief (SPI) Interrupt Enable Register */ -#define REG_SPI_IDR REG_ACCESS(WoReg, 0x40008018U) /**< \brief (SPI) Interrupt Disable Register */ -#define REG_SPI_IMR REG_ACCESS(RoReg, 0x4000801CU) /**< \brief (SPI) Interrupt Mask Register */ -#define REG_SPI_CSR REG_ACCESS(RwReg, 0x40008030U) /**< \brief (SPI) Chip Select Register */ -#define REG_SPI_WPMR REG_ACCESS(RwReg, 0x400080E4U) /**< \brief (SPI) Write Protection Control Register */ -#define REG_SPI_WPSR REG_ACCESS(RoReg, 0x400080E8U) /**< \brief (SPI) Write Protection Status Register */ -#define REG_SPI_RPR REG_ACCESS(RwReg, 0x40008100U) /**< \brief (SPI) Receive Pointer Register */ -#define REG_SPI_RCR REG_ACCESS(RwReg, 0x40008104U) /**< \brief (SPI) Receive Counter Register */ -#define REG_SPI_TPR REG_ACCESS(RwReg, 0x40008108U) /**< \brief (SPI) Transmit Pointer Register */ -#define REG_SPI_TCR REG_ACCESS(RwReg, 0x4000810CU) /**< \brief (SPI) Transmit Counter Register */ -#define REG_SPI_RNPR REG_ACCESS(RwReg, 0x40008110U) /**< \brief (SPI) Receive Next Pointer Register */ -#define REG_SPI_RNCR REG_ACCESS(RwReg, 0x40008114U) /**< \brief (SPI) Receive Next Counter Register */ -#define REG_SPI_TNPR REG_ACCESS(RwReg, 0x40008118U) /**< \brief (SPI) Transmit Next Pointer Register */ -#define REG_SPI_TNCR REG_ACCESS(RwReg, 0x4000811CU) /**< \brief (SPI) Transmit Next Counter Register */ -#define REG_SPI_PTCR REG_ACCESS(WoReg, 0x40008120U) /**< \brief (SPI) Transfer Control Register */ -#define REG_SPI_PTSR REG_ACCESS(RoReg, 0x40008124U) /**< \brief (SPI) Transfer Status Register */ -/* ========== Register definition for TC0 peripheral ========== */ -#define REG_TC0_CCR0 REG_ACCESS(WoReg, 0x40010000U) /**< \brief (TC0) Channel Control Register (channel = 0) */ -#define REG_TC0_CMR0 REG_ACCESS(RwReg, 0x40010004U) /**< \brief (TC0) Channel Mode Register (channel = 0) */ -#define REG_TC0_CV0 REG_ACCESS(RoReg, 0x40010010U) /**< \brief (TC0) Counter Value (channel = 0) */ -#define REG_TC0_RA0 REG_ACCESS(RwReg, 0x40010014U) /**< \brief (TC0) Register A (channel = 0) */ -#define REG_TC0_RB0 REG_ACCESS(RwReg, 0x40010018U) /**< \brief (TC0) Register B (channel = 0) */ -#define REG_TC0_RC0 REG_ACCESS(RwReg, 0x4001001CU) /**< \brief (TC0) Register C (channel = 0) */ -#define REG_TC0_SR0 REG_ACCESS(RoReg, 0x40010020U) /**< \brief (TC0) Status Register (channel = 0) */ -#define REG_TC0_IER0 REG_ACCESS(WoReg, 0x40010024U) /**< \brief (TC0) Interrupt Enable Register (channel = 0) */ -#define REG_TC0_IDR0 REG_ACCESS(WoReg, 0x40010028U) /**< \brief (TC0) Interrupt Disable Register (channel = 0) */ -#define REG_TC0_IMR0 REG_ACCESS(RoReg, 0x4001002CU) /**< \brief (TC0) Interrupt Mask Register (channel = 0) */ -#define REG_TC0_CCR1 REG_ACCESS(WoReg, 0x40010040U) /**< \brief (TC0) Channel Control Register (channel = 1) */ -#define REG_TC0_CMR1 REG_ACCESS(RwReg, 0x40010044U) /**< \brief (TC0) Channel Mode Register (channel = 1) */ -#define REG_TC0_CV1 REG_ACCESS(RoReg, 0x40010050U) /**< \brief (TC0) Counter Value (channel = 1) */ -#define REG_TC0_RA1 REG_ACCESS(RwReg, 0x40010054U) /**< \brief (TC0) Register A (channel = 1) */ -#define REG_TC0_RB1 REG_ACCESS(RwReg, 0x40010058U) /**< \brief (TC0) Register B (channel = 1) */ -#define REG_TC0_RC1 REG_ACCESS(RwReg, 0x4001005CU) /**< \brief (TC0) Register C (channel = 1) */ -#define REG_TC0_SR1 REG_ACCESS(RoReg, 0x40010060U) /**< \brief (TC0) Status Register (channel = 1) */ -#define REG_TC0_IER1 REG_ACCESS(WoReg, 0x40010064U) /**< \brief (TC0) Interrupt Enable Register (channel = 1) */ -#define REG_TC0_IDR1 REG_ACCESS(WoReg, 0x40010068U) /**< \brief (TC0) Interrupt Disable Register (channel = 1) */ -#define REG_TC0_IMR1 REG_ACCESS(RoReg, 0x4001006CU) /**< \brief (TC0) Interrupt Mask Register (channel = 1) */ -#define REG_TC0_CCR2 REG_ACCESS(WoReg, 0x40010080U) /**< \brief (TC0) Channel Control Register (channel = 2) */ -#define REG_TC0_CMR2 REG_ACCESS(RwReg, 0x40010084U) /**< \brief (TC0) Channel Mode Register (channel = 2) */ -#define REG_TC0_CV2 REG_ACCESS(RoReg, 0x40010090U) /**< \brief (TC0) Counter Value (channel = 2) */ -#define REG_TC0_RA2 REG_ACCESS(RwReg, 0x40010094U) /**< \brief (TC0) Register A (channel = 2) */ -#define REG_TC0_RB2 REG_ACCESS(RwReg, 0x40010098U) /**< \brief (TC0) Register B (channel = 2) */ -#define REG_TC0_RC2 REG_ACCESS(RwReg, 0x4001009CU) /**< \brief (TC0) Register C (channel = 2) */ -#define REG_TC0_SR2 REG_ACCESS(RoReg, 0x400100A0U) /**< \brief (TC0) Status Register (channel = 2) */ -#define REG_TC0_IER2 REG_ACCESS(WoReg, 0x400100A4U) /**< \brief (TC0) Interrupt Enable Register (channel = 2) */ -#define REG_TC0_IDR2 REG_ACCESS(WoReg, 0x400100A8U) /**< \brief (TC0) Interrupt Disable Register (channel = 2) */ -#define REG_TC0_IMR2 REG_ACCESS(RoReg, 0x400100ACU) /**< \brief (TC0) Interrupt Mask Register (channel = 2) */ -#define REG_TC0_BCR REG_ACCESS(WoReg, 0x400100C0U) /**< \brief (TC0) Block Control Register */ -#define REG_TC0_BMR REG_ACCESS(RwReg, 0x400100C4U) /**< \brief (TC0) Block Mode Register */ -#define REG_TC0_QIER REG_ACCESS(WoReg, 0x400100C8U) /**< \brief (TC0) QDEC Interrupt Enable Register */ -#define REG_TC0_QIDR REG_ACCESS(WoReg, 0x400100CCU) /**< \brief (TC0) QDEC Interrupt Disable Register */ -#define REG_TC0_QIMR REG_ACCESS(RoReg, 0x400100D0U) /**< \brief (TC0) QDEC Interrupt Mask Register */ -#define REG_TC0_QISR REG_ACCESS(RoReg, 0x400100D4U) /**< \brief (TC0) QDEC Interrupt Status Register */ -#define REG_TC0_FMR REG_ACCESS(RwReg, 0x400100D8U) /**< \brief (TC0) Fault Mode Register */ -#define REG_TC0_WPMR REG_ACCESS(RwReg, 0x400100E4U) /**< \brief (TC0) Write Protect Mode Register */ -#define REG_TC0_VER REG_ACCESS(RoReg, 0x400100FCU) /**< \brief (TC0) Version Register */ -/* ========== Register definition for TC1 peripheral ========== */ -#define REG_TC1_CCR0 REG_ACCESS(WoReg, 0x40014000U) /**< \brief (TC1) Channel Control Register (channel = 0) */ -#define REG_TC1_CMR0 REG_ACCESS(RwReg, 0x40014004U) /**< \brief (TC1) Channel Mode Register (channel = 0) */ -#define REG_TC1_CV0 REG_ACCESS(RoReg, 0x40014010U) /**< \brief (TC1) Counter Value (channel = 0) */ -#define REG_TC1_RA0 REG_ACCESS(RwReg, 0x40014014U) /**< \brief (TC1) Register A (channel = 0) */ -#define REG_TC1_RB0 REG_ACCESS(RwReg, 0x40014018U) /**< \brief (TC1) Register B (channel = 0) */ -#define REG_TC1_RC0 REG_ACCESS(RwReg, 0x4001401CU) /**< \brief (TC1) Register C (channel = 0) */ -#define REG_TC1_SR0 REG_ACCESS(RoReg, 0x40014020U) /**< \brief (TC1) Status Register (channel = 0) */ -#define REG_TC1_IER0 REG_ACCESS(WoReg, 0x40014024U) /**< \brief (TC1) Interrupt Enable Register (channel = 0) */ -#define REG_TC1_IDR0 REG_ACCESS(WoReg, 0x40014028U) /**< \brief (TC1) Interrupt Disable Register (channel = 0) */ -#define REG_TC1_IMR0 REG_ACCESS(RoReg, 0x4001402CU) /**< \brief (TC1) Interrupt Mask Register (channel = 0) */ -#define REG_TC1_CCR1 REG_ACCESS(WoReg, 0x40014040U) /**< \brief (TC1) Channel Control Register (channel = 1) */ -#define REG_TC1_CMR1 REG_ACCESS(RwReg, 0x40014044U) /**< \brief (TC1) Channel Mode Register (channel = 1) */ -#define REG_TC1_CV1 REG_ACCESS(RoReg, 0x40014050U) /**< \brief (TC1) Counter Value (channel = 1) */ -#define REG_TC1_RA1 REG_ACCESS(RwReg, 0x40014054U) /**< \brief (TC1) Register A (channel = 1) */ -#define REG_TC1_RB1 REG_ACCESS(RwReg, 0x40014058U) /**< \brief (TC1) Register B (channel = 1) */ -#define REG_TC1_RC1 REG_ACCESS(RwReg, 0x4001405CU) /**< \brief (TC1) Register C (channel = 1) */ -#define REG_TC1_SR1 REG_ACCESS(RoReg, 0x40014060U) /**< \brief (TC1) Status Register (channel = 1) */ -#define REG_TC1_IER1 REG_ACCESS(WoReg, 0x40014064U) /**< \brief (TC1) Interrupt Enable Register (channel = 1) */ -#define REG_TC1_IDR1 REG_ACCESS(WoReg, 0x40014068U) /**< \brief (TC1) Interrupt Disable Register (channel = 1) */ -#define REG_TC1_IMR1 REG_ACCESS(RoReg, 0x4001406CU) /**< \brief (TC1) Interrupt Mask Register (channel = 1) */ -#define REG_TC1_CCR2 REG_ACCESS(WoReg, 0x40014080U) /**< \brief (TC1) Channel Control Register (channel = 2) */ -#define REG_TC1_CMR2 REG_ACCESS(RwReg, 0x40014084U) /**< \brief (TC1) Channel Mode Register (channel = 2) */ -#define REG_TC1_CV2 REG_ACCESS(RoReg, 0x40014090U) /**< \brief (TC1) Counter Value (channel = 2) */ -#define REG_TC1_RA2 REG_ACCESS(RwReg, 0x40014094U) /**< \brief (TC1) Register A (channel = 2) */ -#define REG_TC1_RB2 REG_ACCESS(RwReg, 0x40014098U) /**< \brief (TC1) Register B (channel = 2) */ -#define REG_TC1_RC2 REG_ACCESS(RwReg, 0x4001409CU) /**< \brief (TC1) Register C (channel = 2) */ -#define REG_TC1_SR2 REG_ACCESS(RoReg, 0x400140A0U) /**< \brief (TC1) Status Register (channel = 2) */ -#define REG_TC1_IER2 REG_ACCESS(WoReg, 0x400140A4U) /**< \brief (TC1) Interrupt Enable Register (channel = 2) */ -#define REG_TC1_IDR2 REG_ACCESS(WoReg, 0x400140A8U) /**< \brief (TC1) Interrupt Disable Register (channel = 2) */ -#define REG_TC1_IMR2 REG_ACCESS(RoReg, 0x400140ACU) /**< \brief (TC1) Interrupt Mask Register (channel = 2) */ -#define REG_TC1_BCR REG_ACCESS(WoReg, 0x400140C0U) /**< \brief (TC1) Block Control Register */ -#define REG_TC1_BMR REG_ACCESS(RwReg, 0x400140C4U) /**< \brief (TC1) Block Mode Register */ -#define REG_TC1_QIER REG_ACCESS(WoReg, 0x400140C8U) /**< \brief (TC1) QDEC Interrupt Enable Register */ -#define REG_TC1_QIDR REG_ACCESS(WoReg, 0x400140CCU) /**< \brief (TC1) QDEC Interrupt Disable Register */ -#define REG_TC1_QIMR REG_ACCESS(RoReg, 0x400140D0U) /**< \brief (TC1) QDEC Interrupt Mask Register */ -#define REG_TC1_QISR REG_ACCESS(RoReg, 0x400140D4U) /**< \brief (TC1) QDEC Interrupt Status Register */ -#define REG_TC1_FMR REG_ACCESS(RwReg, 0x400140D8U) /**< \brief (TC1) Fault Mode Register */ -#define REG_TC1_WPMR REG_ACCESS(RwReg, 0x400140E4U) /**< \brief (TC1) Write Protect Mode Register */ -#define REG_TC1_VER REG_ACCESS(RoReg, 0x400140FCU) /**< \brief (TC1) Version Register */ -/* ========== Register definition for TWI0 peripheral ========== */ -#define REG_TWI0_CR REG_ACCESS(WoReg, 0x40018000U) /**< \brief (TWI0) Control Register */ -#define REG_TWI0_MMR REG_ACCESS(RwReg, 0x40018004U) /**< \brief (TWI0) Master Mode Register */ -#define REG_TWI0_SMR REG_ACCESS(RwReg, 0x40018008U) /**< \brief (TWI0) Slave Mode Register */ -#define REG_TWI0_IADR REG_ACCESS(RwReg, 0x4001800CU) /**< \brief (TWI0) Internal Address Register */ -#define REG_TWI0_CWGR REG_ACCESS(RwReg, 0x40018010U) /**< \brief (TWI0) Clock Waveform Generator Register */ -#define REG_TWI0_SR REG_ACCESS(RoReg, 0x40018020U) /**< \brief (TWI0) Status Register */ -#define REG_TWI0_IER REG_ACCESS(WoReg, 0x40018024U) /**< \brief (TWI0) Interrupt Enable Register */ -#define REG_TWI0_IDR REG_ACCESS(WoReg, 0x40018028U) /**< \brief (TWI0) Interrupt Disable Register */ -#define REG_TWI0_IMR REG_ACCESS(RoReg, 0x4001802CU) /**< \brief (TWI0) Interrupt Mask Register */ -#define REG_TWI0_RHR REG_ACCESS(RoReg, 0x40018030U) /**< \brief (TWI0) Receive Holding Register */ -#define REG_TWI0_THR REG_ACCESS(WoReg, 0x40018034U) /**< \brief (TWI0) Transmit Holding Register */ -#define REG_TWI0_RPR REG_ACCESS(RwReg, 0x40018100U) /**< \brief (TWI0) Receive Pointer Register */ -#define REG_TWI0_RCR REG_ACCESS(RwReg, 0x40018104U) /**< \brief (TWI0) Receive Counter Register */ -#define REG_TWI0_TPR REG_ACCESS(RwReg, 0x40018108U) /**< \brief (TWI0) Transmit Pointer Register */ -#define REG_TWI0_TCR REG_ACCESS(RwReg, 0x4001810CU) /**< \brief (TWI0) Transmit Counter Register */ -#define REG_TWI0_RNPR REG_ACCESS(RwReg, 0x40018110U) /**< \brief (TWI0) Receive Next Pointer Register */ -#define REG_TWI0_RNCR REG_ACCESS(RwReg, 0x40018114U) /**< \brief (TWI0) Receive Next Counter Register */ -#define REG_TWI0_TNPR REG_ACCESS(RwReg, 0x40018118U) /**< \brief (TWI0) Transmit Next Pointer Register */ -#define REG_TWI0_TNCR REG_ACCESS(RwReg, 0x4001811CU) /**< \brief (TWI0) Transmit Next Counter Register */ -#define REG_TWI0_PTCR REG_ACCESS(WoReg, 0x40018120U) /**< \brief (TWI0) Transfer Control Register */ -#define REG_TWI0_PTSR REG_ACCESS(RoReg, 0x40018124U) /**< \brief (TWI0) Transfer Status Register */ -/* ========== Register definition for TWI1 peripheral ========== */ -#define REG_TWI1_CR REG_ACCESS(WoReg, 0x4001C000U) /**< \brief (TWI1) Control Register */ -#define REG_TWI1_MMR REG_ACCESS(RwReg, 0x4001C004U) /**< \brief (TWI1) Master Mode Register */ -#define REG_TWI1_SMR REG_ACCESS(RwReg, 0x4001C008U) /**< \brief (TWI1) Slave Mode Register */ -#define REG_TWI1_IADR REG_ACCESS(RwReg, 0x4001C00CU) /**< \brief (TWI1) Internal Address Register */ -#define REG_TWI1_CWGR REG_ACCESS(RwReg, 0x4001C010U) /**< \brief (TWI1) Clock Waveform Generator Register */ -#define REG_TWI1_SR REG_ACCESS(RoReg, 0x4001C020U) /**< \brief (TWI1) Status Register */ -#define REG_TWI1_IER REG_ACCESS(WoReg, 0x4001C024U) /**< \brief (TWI1) Interrupt Enable Register */ -#define REG_TWI1_IDR REG_ACCESS(WoReg, 0x4001C028U) /**< \brief (TWI1) Interrupt Disable Register */ -#define REG_TWI1_IMR REG_ACCESS(RoReg, 0x4001C02CU) /**< \brief (TWI1) Interrupt Mask Register */ -#define REG_TWI1_RHR REG_ACCESS(RoReg, 0x4001C030U) /**< \brief (TWI1) Receive Holding Register */ -#define REG_TWI1_THR REG_ACCESS(WoReg, 0x4001C034U) /**< \brief (TWI1) Transmit Holding Register */ -#define REG_TWI1_RPR REG_ACCESS(RwReg, 0x4001C100U) /**< \brief (TWI1) Receive Pointer Register */ -#define REG_TWI1_RCR REG_ACCESS(RwReg, 0x4001C104U) /**< \brief (TWI1) Receive Counter Register */ -#define REG_TWI1_TPR REG_ACCESS(RwReg, 0x4001C108U) /**< \brief (TWI1) Transmit Pointer Register */ -#define REG_TWI1_TCR REG_ACCESS(RwReg, 0x4001C10CU) /**< \brief (TWI1) Transmit Counter Register */ -#define REG_TWI1_RNPR REG_ACCESS(RwReg, 0x4001C110U) /**< \brief (TWI1) Receive Next Pointer Register */ -#define REG_TWI1_RNCR REG_ACCESS(RwReg, 0x4001C114U) /**< \brief (TWI1) Receive Next Counter Register */ -#define REG_TWI1_TNPR REG_ACCESS(RwReg, 0x4001C118U) /**< \brief (TWI1) Transmit Next Pointer Register */ -#define REG_TWI1_TNCR REG_ACCESS(RwReg, 0x4001C11CU) /**< \brief (TWI1) Transmit Next Counter Register */ -#define REG_TWI1_PTCR REG_ACCESS(WoReg, 0x4001C120U) /**< \brief (TWI1) Transfer Control Register */ -#define REG_TWI1_PTSR REG_ACCESS(RoReg, 0x4001C124U) /**< \brief (TWI1) Transfer Status Register */ -/* ========== Register definition for PWM peripheral ========== */ -#define REG_PWM_CLK REG_ACCESS(RwReg, 0x40020000U) /**< \brief (PWM) PWM Clock Register */ -#define REG_PWM_ENA REG_ACCESS(WoReg, 0x40020004U) /**< \brief (PWM) PWM Enable Register */ -#define REG_PWM_DIS REG_ACCESS(WoReg, 0x40020008U) /**< \brief (PWM) PWM Disable Register */ -#define REG_PWM_SR REG_ACCESS(RoReg, 0x4002000CU) /**< \brief (PWM) PWM Status Register */ -#define REG_PWM_IER1 REG_ACCESS(WoReg, 0x40020010U) /**< \brief (PWM) PWM Interrupt Enable Register 1 */ -#define REG_PWM_IDR1 REG_ACCESS(WoReg, 0x40020014U) /**< \brief (PWM) PWM Interrupt Disable Register 1 */ -#define REG_PWM_IMR1 REG_ACCESS(RoReg, 0x40020018U) /**< \brief (PWM) PWM Interrupt Mask Register 1 */ -#define REG_PWM_ISR1 REG_ACCESS(RoReg, 0x4002001CU) /**< \brief (PWM) PWM Interrupt Status Register 1 */ -#define REG_PWM_SCM REG_ACCESS(RwReg, 0x40020020U) /**< \brief (PWM) PWM Sync Channels Mode Register */ -#define REG_PWM_SCUC REG_ACCESS(RwReg, 0x40020028U) /**< \brief (PWM) PWM Sync Channels Update Control Register */ -#define REG_PWM_SCUP REG_ACCESS(RwReg, 0x4002002CU) /**< \brief (PWM) PWM Sync Channels Update Period Register */ -#define REG_PWM_SCUPUPD REG_ACCESS(WoReg, 0x40020030U) /**< \brief (PWM) PWM Sync Channels Update Period Update Register */ -#define REG_PWM_IER2 REG_ACCESS(WoReg, 0x40020034U) /**< \brief (PWM) PWM Interrupt Enable Register 2 */ -#define REG_PWM_IDR2 REG_ACCESS(WoReg, 0x40020038U) /**< \brief (PWM) PWM Interrupt Disable Register 2 */ -#define REG_PWM_IMR2 REG_ACCESS(RoReg, 0x4002003CU) /**< \brief (PWM) PWM Interrupt Mask Register 2 */ -#define REG_PWM_ISR2 REG_ACCESS(RoReg, 0x40020040U) /**< \brief (PWM) PWM Interrupt Status Register 2 */ -#define REG_PWM_OOV REG_ACCESS(RwReg, 0x40020044U) /**< \brief (PWM) PWM Output Override Value Register */ -#define REG_PWM_OS REG_ACCESS(RwReg, 0x40020048U) /**< \brief (PWM) PWM Output Selection Register */ -#define REG_PWM_OSS REG_ACCESS(WoReg, 0x4002004CU) /**< \brief (PWM) PWM Output Selection Set Register */ -#define REG_PWM_OSC REG_ACCESS(WoReg, 0x40020050U) /**< \brief (PWM) PWM Output Selection Clear Register */ -#define REG_PWM_OSSUPD REG_ACCESS(WoReg, 0x40020054U) /**< \brief (PWM) PWM Output Selection Set Update Register */ -#define REG_PWM_OSCUPD REG_ACCESS(WoReg, 0x40020058U) /**< \brief (PWM) PWM Output Selection Clear Update Register */ -#define REG_PWM_FMR REG_ACCESS(RwReg, 0x4002005CU) /**< \brief (PWM) PWM Fault Mode Register */ -#define REG_PWM_FSR REG_ACCESS(RoReg, 0x40020060U) /**< \brief (PWM) PWM Fault Status Register */ -#define REG_PWM_FCR REG_ACCESS(WoReg, 0x40020064U) /**< \brief (PWM) PWM Fault Clear Register */ -#define REG_PWM_FPV REG_ACCESS(RwReg, 0x40020068U) /**< \brief (PWM) PWM Fault Protection Value Register */ -#define REG_PWM_FPE REG_ACCESS(RwReg, 0x4002006CU) /**< \brief (PWM) PWM Fault Protection Enable Register */ -#define REG_PWM_ELxMR REG_ACCESS(RwReg, 0x4002007CU) /**< \brief (PWM) PWM Event Line 0 Mode Register */ -#define REG_PWM_SMMR REG_ACCESS(RwReg, 0x400200B0U) /**< \brief (PWM) PWM Stepper Motor Mode Register */ -#define REG_PWM_WPCR REG_ACCESS(WoReg, 0x400200E4U) /**< \brief (PWM) PWM Write Protect Control Register */ -#define REG_PWM_WPSR REG_ACCESS(RoReg, 0x400200E8U) /**< \brief (PWM) PWM Write Protect Status Register */ -#define REG_PWM_RPR REG_ACCESS(RwReg, 0x40020100U) /**< \brief (PWM) Receive Pointer Register */ -#define REG_PWM_RCR REG_ACCESS(RwReg, 0x40020104U) /**< \brief (PWM) Receive Counter Register */ -#define REG_PWM_TPR REG_ACCESS(RwReg, 0x40020108U) /**< \brief (PWM) Transmit Pointer Register */ -#define REG_PWM_TCR REG_ACCESS(RwReg, 0x4002010CU) /**< \brief (PWM) Transmit Counter Register */ -#define REG_PWM_RNPR REG_ACCESS(RwReg, 0x40020110U) /**< \brief (PWM) Receive Next Pointer Register */ -#define REG_PWM_RNCR REG_ACCESS(RwReg, 0x40020114U) /**< \brief (PWM) Receive Next Counter Register */ -#define REG_PWM_TNPR REG_ACCESS(RwReg, 0x40020118U) /**< \brief (PWM) Transmit Next Pointer Register */ -#define REG_PWM_TNCR REG_ACCESS(RwReg, 0x4002011CU) /**< \brief (PWM) Transmit Next Counter Register */ -#define REG_PWM_PTCR REG_ACCESS(WoReg, 0x40020120U) /**< \brief (PWM) Transfer Control Register */ -#define REG_PWM_PTSR REG_ACCESS(RoReg, 0x40020124U) /**< \brief (PWM) Transfer Status Register */ -#define REG_PWM_CMP0V REG_ACCESS(RwReg, 0x40020130U) /**< \brief (PWM) PWM Comparison 0 Value Register */ -#define REG_PWM_CMP0VUPD REG_ACCESS(WoReg, 0x40020134U) /**< \brief (PWM) PWM Comparison 0 Value Update Register */ -#define REG_PWM_CMP0M REG_ACCESS(RwReg, 0x40020138U) /**< \brief (PWM) PWM Comparison 0 Mode Register */ -#define REG_PWM_CMP0MUPD REG_ACCESS(WoReg, 0x4002013CU) /**< \brief (PWM) PWM Comparison 0 Mode Update Register */ -#define REG_PWM_CMP1V REG_ACCESS(RwReg, 0x40020140U) /**< \brief (PWM) PWM Comparison 1 Value Register */ -#define REG_PWM_CMP1VUPD REG_ACCESS(WoReg, 0x40020144U) /**< \brief (PWM) PWM Comparison 1 Value Update Register */ -#define REG_PWM_CMP1M REG_ACCESS(RwReg, 0x40020148U) /**< \brief (PWM) PWM Comparison 1 Mode Register */ -#define REG_PWM_CMP1MUPD REG_ACCESS(WoReg, 0x4002014CU) /**< \brief (PWM) PWM Comparison 1 Mode Update Register */ -#define REG_PWM_CMP2V REG_ACCESS(RwReg, 0x40020150U) /**< \brief (PWM) PWM Comparison 2 Value Register */ -#define REG_PWM_CMP2VUPD REG_ACCESS(WoReg, 0x40020154U) /**< \brief (PWM) PWM Comparison 2 Value Update Register */ -#define REG_PWM_CMP2M REG_ACCESS(RwReg, 0x40020158U) /**< \brief (PWM) PWM Comparison 2 Mode Register */ -#define REG_PWM_CMP2MUPD REG_ACCESS(WoReg, 0x4002015CU) /**< \brief (PWM) PWM Comparison 2 Mode Update Register */ -#define REG_PWM_CMP3V REG_ACCESS(RwReg, 0x40020160U) /**< \brief (PWM) PWM Comparison 3 Value Register */ -#define REG_PWM_CMP3VUPD REG_ACCESS(WoReg, 0x40020164U) /**< \brief (PWM) PWM Comparison 3 Value Update Register */ -#define REG_PWM_CMP3M REG_ACCESS(RwReg, 0x40020168U) /**< \brief (PWM) PWM Comparison 3 Mode Register */ -#define REG_PWM_CMP3MUPD REG_ACCESS(WoReg, 0x4002016CU) /**< \brief (PWM) PWM Comparison 3 Mode Update Register */ -#define REG_PWM_CMP4V REG_ACCESS(RwReg, 0x40020170U) /**< \brief (PWM) PWM Comparison 4 Value Register */ -#define REG_PWM_CMP4VUPD REG_ACCESS(WoReg, 0x40020174U) /**< \brief (PWM) PWM Comparison 4 Value Update Register */ -#define REG_PWM_CMP4M REG_ACCESS(RwReg, 0x40020178U) /**< \brief (PWM) PWM Comparison 4 Mode Register */ -#define REG_PWM_CMP4MUPD REG_ACCESS(WoReg, 0x4002017CU) /**< \brief (PWM) PWM Comparison 4 Mode Update Register */ -#define REG_PWM_CMP5V REG_ACCESS(RwReg, 0x40020180U) /**< \brief (PWM) PWM Comparison 5 Value Register */ -#define REG_PWM_CMP5VUPD REG_ACCESS(WoReg, 0x40020184U) /**< \brief (PWM) PWM Comparison 5 Value Update Register */ -#define REG_PWM_CMP5M REG_ACCESS(RwReg, 0x40020188U) /**< \brief (PWM) PWM Comparison 5 Mode Register */ -#define REG_PWM_CMP5MUPD REG_ACCESS(WoReg, 0x4002018CU) /**< \brief (PWM) PWM Comparison 5 Mode Update Register */ -#define REG_PWM_CMP6V REG_ACCESS(RwReg, 0x40020190U) /**< \brief (PWM) PWM Comparison 6 Value Register */ -#define REG_PWM_CMP6VUPD REG_ACCESS(WoReg, 0x40020194U) /**< \brief (PWM) PWM Comparison 6 Value Update Register */ -#define REG_PWM_CMP6M REG_ACCESS(RwReg, 0x40020198U) /**< \brief (PWM) PWM Comparison 6 Mode Register */ -#define REG_PWM_CMP6MUPD REG_ACCESS(WoReg, 0x4002019CU) /**< \brief (PWM) PWM Comparison 6 Mode Update Register */ -#define REG_PWM_CMP7V REG_ACCESS(RwReg, 0x400201A0U) /**< \brief (PWM) PWM Comparison 7 Value Register */ -#define REG_PWM_CMP7VUPD REG_ACCESS(WoReg, 0x400201A4U) /**< \brief (PWM) PWM Comparison 7 Value Update Register */ -#define REG_PWM_CMP7M REG_ACCESS(RwReg, 0x400201A8U) /**< \brief (PWM) PWM Comparison 7 Mode Register */ -#define REG_PWM_CMP7MUPD REG_ACCESS(WoReg, 0x400201ACU) /**< \brief (PWM) PWM Comparison 7 Mode Update Register */ -#define REG_PWM_CMR0 REG_ACCESS(RwReg, 0x40020200U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 0) */ -#define REG_PWM_CDTY0 REG_ACCESS(RwReg, 0x40020204U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 0) */ -#define REG_PWM_CDTYUPD0 REG_ACCESS(WoReg, 0x40020208U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 0) */ -#define REG_PWM_CPRD0 REG_ACCESS(RwReg, 0x4002020CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 0) */ -#define REG_PWM_CPRDUPD0 REG_ACCESS(WoReg, 0x40020210U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 0) */ -#define REG_PWM_CCNT0 REG_ACCESS(RoReg, 0x40020214U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 0) */ -#define REG_PWM_DT0 REG_ACCESS(RwReg, 0x40020218U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 0) */ -#define REG_PWM_DTUPD0 REG_ACCESS(WoReg, 0x4002021CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 0) */ -#define REG_PWM_CMR1 REG_ACCESS(RwReg, 0x40020220U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 1) */ -#define REG_PWM_CDTY1 REG_ACCESS(RwReg, 0x40020224U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 1) */ -#define REG_PWM_CDTYUPD1 REG_ACCESS(WoReg, 0x40020228U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 1) */ -#define REG_PWM_CPRD1 REG_ACCESS(RwReg, 0x4002022CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 1) */ -#define REG_PWM_CPRDUPD1 REG_ACCESS(WoReg, 0x40020230U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 1) */ -#define REG_PWM_CCNT1 REG_ACCESS(RoReg, 0x40020234U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 1) */ -#define REG_PWM_DT1 REG_ACCESS(RwReg, 0x40020238U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 1) */ -#define REG_PWM_DTUPD1 REG_ACCESS(WoReg, 0x4002023CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 1) */ -#define REG_PWM_CMR2 REG_ACCESS(RwReg, 0x40020240U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 2) */ -#define REG_PWM_CDTY2 REG_ACCESS(RwReg, 0x40020244U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 2) */ -#define REG_PWM_CDTYUPD2 REG_ACCESS(WoReg, 0x40020248U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 2) */ -#define REG_PWM_CPRD2 REG_ACCESS(RwReg, 0x4002024CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 2) */ -#define REG_PWM_CPRDUPD2 REG_ACCESS(WoReg, 0x40020250U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 2) */ -#define REG_PWM_CCNT2 REG_ACCESS(RoReg, 0x40020254U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 2) */ -#define REG_PWM_DT2 REG_ACCESS(RwReg, 0x40020258U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 2) */ -#define REG_PWM_DTUPD2 REG_ACCESS(WoReg, 0x4002025CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 2) */ -#define REG_PWM_CMR3 REG_ACCESS(RwReg, 0x40020260U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 3) */ -#define REG_PWM_CDTY3 REG_ACCESS(RwReg, 0x40020264U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 3) */ -#define REG_PWM_CDTYUPD3 REG_ACCESS(WoReg, 0x40020268U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 3) */ -#define REG_PWM_CPRD3 REG_ACCESS(RwReg, 0x4002026CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 3) */ -#define REG_PWM_CPRDUPD3 REG_ACCESS(WoReg, 0x40020270U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 3) */ -#define REG_PWM_CCNT3 REG_ACCESS(RoReg, 0x40020274U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 3) */ -#define REG_PWM_DT3 REG_ACCESS(RwReg, 0x40020278U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 3) */ -#define REG_PWM_DTUPD3 REG_ACCESS(WoReg, 0x4002027CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 3) */ -/* ========== Register definition for USART0 peripheral ========== */ -#define REG_USART0_CR REG_ACCESS(WoReg, 0x40024000U) /**< \brief (USART0) Control Register */ -#define REG_USART0_MR REG_ACCESS(RwReg, 0x40024004U) /**< \brief (USART0) Mode Register */ -#define REG_USART0_IER REG_ACCESS(WoReg, 0x40024008U) /**< \brief (USART0) Interrupt Enable Register */ -#define REG_USART0_IDR REG_ACCESS(WoReg, 0x4002400CU) /**< \brief (USART0) Interrupt Disable Register */ -#define REG_USART0_IMR REG_ACCESS(RoReg, 0x40024010U) /**< \brief (USART0) Interrupt Mask Register */ -#define REG_USART0_CSR REG_ACCESS(RoReg, 0x40024014U) /**< \brief (USART0) Channel Status Register */ -#define REG_USART0_RHR REG_ACCESS(RoReg, 0x40024018U) /**< \brief (USART0) Receiver Holding Register */ -#define REG_USART0_THR REG_ACCESS(WoReg, 0x4002401CU) /**< \brief (USART0) Transmitter Holding Register */ -#define REG_USART0_BRGR REG_ACCESS(RwReg, 0x40024020U) /**< \brief (USART0) Baud Rate Generator Register */ -#define REG_USART0_RTOR REG_ACCESS(RwReg, 0x40024024U) /**< \brief (USART0) Receiver Time-out Register */ -#define REG_USART0_TTGR REG_ACCESS(RwReg, 0x40024028U) /**< \brief (USART0) Transmitter Timeguard Register */ -#define REG_USART0_FIDI REG_ACCESS(RwReg, 0x40024040U) /**< \brief (USART0) FI DI Ratio Register */ -#define REG_USART0_NER REG_ACCESS(RoReg, 0x40024044U) /**< \brief (USART0) Number of Errors Register */ -#define REG_USART0_IF REG_ACCESS(RwReg, 0x4002404CU) /**< \brief (USART0) IrDA Filter Register */ -#define REG_USART0_MAN REG_ACCESS(RwReg, 0x40024050U) /**< \brief (USART0) Manchester Encoder Decoder Register */ -#define REG_USART0_WPMR REG_ACCESS(RwReg, 0x400240E4U) /**< \brief (USART0) Write Protect Mode Register */ -#define REG_USART0_WPSR REG_ACCESS(RoReg, 0x400240E8U) /**< \brief (USART0) Write Protect Status Register */ -#define REG_USART0_VERSION REG_ACCESS(RoReg, 0x400240FCU) /**< \brief (USART0) Version Register */ -#define REG_USART0_RPR REG_ACCESS(RwReg, 0x40024100U) /**< \brief (USART0) Receive Pointer Register */ -#define REG_USART0_RCR REG_ACCESS(RwReg, 0x40024104U) /**< \brief (USART0) Receive Counter Register */ -#define REG_USART0_TPR REG_ACCESS(RwReg, 0x40024108U) /**< \brief (USART0) Transmit Pointer Register */ -#define REG_USART0_TCR REG_ACCESS(RwReg, 0x4002410CU) /**< \brief (USART0) Transmit Counter Register */ -#define REG_USART0_RNPR REG_ACCESS(RwReg, 0x40024110U) /**< \brief (USART0) Receive Next Pointer Register */ -#define REG_USART0_RNCR REG_ACCESS(RwReg, 0x40024114U) /**< \brief (USART0) Receive Next Counter Register */ -#define REG_USART0_TNPR REG_ACCESS(RwReg, 0x40024118U) /**< \brief (USART0) Transmit Next Pointer Register */ -#define REG_USART0_TNCR REG_ACCESS(RwReg, 0x4002411CU) /**< \brief (USART0) Transmit Next Counter Register */ -#define REG_USART0_PTCR REG_ACCESS(WoReg, 0x40024120U) /**< \brief (USART0) Transfer Control Register */ -#define REG_USART0_PTSR REG_ACCESS(RoReg, 0x40024124U) /**< \brief (USART0) Transfer Status Register */ -/* ========== Register definition for USART1 peripheral ========== */ -#define REG_USART1_CR REG_ACCESS(WoReg, 0x40028000U) /**< \brief (USART1) Control Register */ -#define REG_USART1_MR REG_ACCESS(RwReg, 0x40028004U) /**< \brief (USART1) Mode Register */ -#define REG_USART1_IER REG_ACCESS(WoReg, 0x40028008U) /**< \brief (USART1) Interrupt Enable Register */ -#define REG_USART1_IDR REG_ACCESS(WoReg, 0x4002800CU) /**< \brief (USART1) Interrupt Disable Register */ -#define REG_USART1_IMR REG_ACCESS(RoReg, 0x40028010U) /**< \brief (USART1) Interrupt Mask Register */ -#define REG_USART1_CSR REG_ACCESS(RoReg, 0x40028014U) /**< \brief (USART1) Channel Status Register */ -#define REG_USART1_RHR REG_ACCESS(RoReg, 0x40028018U) /**< \brief (USART1) Receiver Holding Register */ -#define REG_USART1_THR REG_ACCESS(WoReg, 0x4002801CU) /**< \brief (USART1) Transmitter Holding Register */ -#define REG_USART1_BRGR REG_ACCESS(RwReg, 0x40028020U) /**< \brief (USART1) Baud Rate Generator Register */ -#define REG_USART1_RTOR REG_ACCESS(RwReg, 0x40028024U) /**< \brief (USART1) Receiver Time-out Register */ -#define REG_USART1_TTGR REG_ACCESS(RwReg, 0x40028028U) /**< \brief (USART1) Transmitter Timeguard Register */ -#define REG_USART1_FIDI REG_ACCESS(RwReg, 0x40028040U) /**< \brief (USART1) FI DI Ratio Register */ -#define REG_USART1_NER REG_ACCESS(RoReg, 0x40028044U) /**< \brief (USART1) Number of Errors Register */ -#define REG_USART1_IF REG_ACCESS(RwReg, 0x4002804CU) /**< \brief (USART1) IrDA Filter Register */ -#define REG_USART1_MAN REG_ACCESS(RwReg, 0x40028050U) /**< \brief (USART1) Manchester Encoder Decoder Register */ -#define REG_USART1_WPMR REG_ACCESS(RwReg, 0x400280E4U) /**< \brief (USART1) Write Protect Mode Register */ -#define REG_USART1_WPSR REG_ACCESS(RoReg, 0x400280E8U) /**< \brief (USART1) Write Protect Status Register */ -#define REG_USART1_VERSION REG_ACCESS(RoReg, 0x400280FCU) /**< \brief (USART1) Version Register */ -#define REG_USART1_RPR REG_ACCESS(RwReg, 0x40028100U) /**< \brief (USART1) Receive Pointer Register */ -#define REG_USART1_RCR REG_ACCESS(RwReg, 0x40028104U) /**< \brief (USART1) Receive Counter Register */ -#define REG_USART1_TPR REG_ACCESS(RwReg, 0x40028108U) /**< \brief (USART1) Transmit Pointer Register */ -#define REG_USART1_TCR REG_ACCESS(RwReg, 0x4002810CU) /**< \brief (USART1) Transmit Counter Register */ -#define REG_USART1_RNPR REG_ACCESS(RwReg, 0x40028110U) /**< \brief (USART1) Receive Next Pointer Register */ -#define REG_USART1_RNCR REG_ACCESS(RwReg, 0x40028114U) /**< \brief (USART1) Receive Next Counter Register */ -#define REG_USART1_TNPR REG_ACCESS(RwReg, 0x40028118U) /**< \brief (USART1) Transmit Next Pointer Register */ -#define REG_USART1_TNCR REG_ACCESS(RwReg, 0x4002811CU) /**< \brief (USART1) Transmit Next Counter Register */ -#define REG_USART1_PTCR REG_ACCESS(WoReg, 0x40028120U) /**< \brief (USART1) Transfer Control Register */ -#define REG_USART1_PTSR REG_ACCESS(RoReg, 0x40028124U) /**< \brief (USART1) Transfer Status Register */ -/* ========== Register definition for UDP peripheral ========== */ -#define REG_UDP_FRM_NUM REG_ACCESS(RoReg, 0x40034000U) /**< \brief (UDP) Frame Number Register */ -#define REG_UDP_GLB_STAT REG_ACCESS(RwReg, 0x40034004U) /**< \brief (UDP) Global State Register */ -#define REG_UDP_FADDR REG_ACCESS(RwReg, 0x40034008U) /**< \brief (UDP) Function Address Register */ -#define REG_UDP_IER REG_ACCESS(WoReg, 0x40034010U) /**< \brief (UDP) Interrupt Enable Register */ -#define REG_UDP_IDR REG_ACCESS(WoReg, 0x40034014U) /**< \brief (UDP) Interrupt Disable Register */ -#define REG_UDP_IMR REG_ACCESS(RoReg, 0x40034018U) /**< \brief (UDP) Interrupt Mask Register */ -#define REG_UDP_ISR REG_ACCESS(RoReg, 0x4003401CU) /**< \brief (UDP) Interrupt Status Register */ -#define REG_UDP_ICR REG_ACCESS(WoReg, 0x40034020U) /**< \brief (UDP) Interrupt Clear Register */ -#define REG_UDP_RST_EP REG_ACCESS(RwReg, 0x40034028U) /**< \brief (UDP) Reset Endpoint Register */ -#define REG_UDP_CSR REG_ACCESS(RwReg, 0x4003402CU) /**< \brief (UDP) Endpoint Control and Status Register (ept_num = 0) */ -#define REG_UDP_FDR REG_ACCESS(RwReg, 0x4003404CU) /**< \brief (UDP) Endpoint FIFO Data Register (ept_num = 0) */ -#define REG_UDP_TXVC REG_ACCESS(RwReg, 0x40034074U) /**< \brief (UDP) Transceiver Control Register */ -/* ========== Register definition for ADC peripheral ========== */ -#define REG_ADC_CR REG_ACCESS(WoReg, 0x40038000U) /**< \brief (ADC) Control Register */ -#define REG_ADC_MR REG_ACCESS(RwReg, 0x40038004U) /**< \brief (ADC) Mode Register */ -#define REG_ADC_SEQ1R REG_ACCESS(RwReg, 0x40038008U) /**< \brief (ADC) Channel Sequence 1Register */ -#define REG_ADC_SEQ2R REG_ACCESS(RwReg, 0x4003800CU) /**< \brief (ADC) Channel Sequence 2 Register */ -#define REG_ADC_CHER REG_ACCESS(WoReg, 0x40038010U) /**< \brief (ADC) Channel Enable Register */ -#define REG_ADC_CHDR REG_ACCESS(WoReg, 0x40038014U) /**< \brief (ADC) Channel Disable Register */ -#define REG_ADC_CHSR REG_ACCESS(RoReg, 0x40038018U) /**< \brief (ADC) Channel Status Register */ -#define REG_ADC_LCDR REG_ACCESS(RoReg, 0x40038020U) /**< \brief (ADC) Last Converted Data Register */ -#define REG_ADC_IER REG_ACCESS(WoReg, 0x40038024U) /**< \brief (ADC) Interrupt Enable Register */ -#define REG_ADC_IDR REG_ACCESS(WoReg, 0x40038028U) /**< \brief (ADC) Interrupt Disable Register */ -#define REG_ADC_IMR REG_ACCESS(RoReg, 0x4003802CU) /**< \brief (ADC) Interrupt Mask Register */ -#define REG_ADC_ISR REG_ACCESS(RoReg, 0x40038030U) /**< \brief (ADC) Interrupt Status Register */ -#define REG_ADC_OVER REG_ACCESS(RoReg, 0x4003803CU) /**< \brief (ADC) Overrun Status Register */ -#define REG_ADC_EMR REG_ACCESS(RwReg, 0x40038040U) /**< \brief (ADC) Extended Mode Register */ -#define REG_ADC_CWR REG_ACCESS(RwReg, 0x40038044U) /**< \brief (ADC) Compare Window Register */ -#define REG_ADC_CGR REG_ACCESS(RwReg, 0x40038048U) /**< \brief (ADC) Channel Gain Register */ -#define REG_ADC_COR REG_ACCESS(RwReg, 0x4003804CU) /**< \brief (ADC) Channel Offset Register */ -#define REG_ADC_CDR0 REG_ACCESS(RoReg, 0x40038050U) /**< \brief (ADC) Channel Data Register 0 */ -#define REG_ADC_CDR1 REG_ACCESS(RoReg, 0x40038054U) /**< \brief (ADC) Channel Data Register 1 */ -#define REG_ADC_CDR2 REG_ACCESS(RoReg, 0x40038058U) /**< \brief (ADC) Channel Data Register 2 */ -#define REG_ADC_CDR3 REG_ACCESS(RoReg, 0x4003805CU) /**< \brief (ADC) Channel Data Register 3 */ -#define REG_ADC_CDR4 REG_ACCESS(RoReg, 0x40038060U) /**< \brief (ADC) Channel Data Register 4 */ -#define REG_ADC_CDR5 REG_ACCESS(RoReg, 0x40038064U) /**< \brief (ADC) Channel Data Register 5 */ -#define REG_ADC_CDR6 REG_ACCESS(RoReg, 0x40038068U) /**< \brief (ADC) Channel Data Register 6 */ -#define REG_ADC_CDR15 REG_ACCESS(RoReg, 0x4003806CU) /**< \brief (ADC) Channel Data Register 15 */ -#define REG_ADC_ACR REG_ACCESS(RwReg, 0x40038094U) /**< \brief (ADC) Analog Control Register */ -#define REG_ADC_WPMR REG_ACCESS(RwReg, 0x400380E4U) /**< \brief (ADC) Write Protect Mode Register */ -#define REG_ADC_WPSR REG_ACCESS(RoReg, 0x400380E8U) /**< \brief (ADC) Write Protect Status Register */ -#define REG_ADC_RPR REG_ACCESS(RwReg, 0x40038100U) /**< \brief (ADC) Receive Pointer Register */ -#define REG_ADC_RCR REG_ACCESS(RwReg, 0x40038104U) /**< \brief (ADC) Receive Counter Register */ -#define REG_ADC_TPR REG_ACCESS(RwReg, 0x40038108U) /**< \brief (ADC) Transmit Pointer Register */ -#define REG_ADC_TCR REG_ACCESS(RwReg, 0x4003810CU) /**< \brief (ADC) Transmit Counter Register */ -#define REG_ADC_RNPR REG_ACCESS(RwReg, 0x40038110U) /**< \brief (ADC) Receive Next Pointer Register */ -#define REG_ADC_RNCR REG_ACCESS(RwReg, 0x40038114U) /**< \brief (ADC) Receive Next Counter Register */ -#define REG_ADC_TNPR REG_ACCESS(RwReg, 0x40038118U) /**< \brief (ADC) Transmit Next Pointer Register */ -#define REG_ADC_TNCR REG_ACCESS(RwReg, 0x4003811CU) /**< \brief (ADC) Transmit Next Counter Register */ -#define REG_ADC_PTCR REG_ACCESS(WoReg, 0x40038120U) /**< \brief (ADC) Transfer Control Register */ -#define REG_ADC_PTSR REG_ACCESS(RoReg, 0x40038124U) /**< \brief (ADC) Transfer Status Register */ -/* ========== Register definition for DACC peripheral ========== */ -#define REG_DACC_CR REG_ACCESS(WoReg, 0x4003C000U) /**< \brief (DACC) Control Register */ -#define REG_DACC_MR REG_ACCESS(RwReg, 0x4003C004U) /**< \brief (DACC) Mode Register */ -#define REG_DACC_CHER REG_ACCESS(WoReg, 0x4003C010U) /**< \brief (DACC) Channel Enable Register */ -#define REG_DACC_CHDR REG_ACCESS(WoReg, 0x4003C014U) /**< \brief (DACC) Channel Disable Register */ -#define REG_DACC_CHSR REG_ACCESS(RoReg, 0x4003C018U) /**< \brief (DACC) Channel Status Register */ -#define REG_DACC_CDR REG_ACCESS(WoReg, 0x4003C020U) /**< \brief (DACC) Conversion Data Register */ -#define REG_DACC_IER REG_ACCESS(WoReg, 0x4003C024U) /**< \brief (DACC) Interrupt Enable Register */ -#define REG_DACC_IDR REG_ACCESS(WoReg, 0x4003C028U) /**< \brief (DACC) Interrupt Disable Register */ -#define REG_DACC_IMR REG_ACCESS(RoReg, 0x4003C02CU) /**< \brief (DACC) Interrupt Mask Register */ -#define REG_DACC_ISR REG_ACCESS(RoReg, 0x4003C030U) /**< \brief (DACC) Interrupt Status Register */ -#define REG_DACC_ACR REG_ACCESS(RwReg, 0x4003C094U) /**< \brief (DACC) Analog Current Register */ -#define REG_DACC_WPMR REG_ACCESS(RwReg, 0x4003C0E4U) /**< \brief (DACC) Write Protect Mode register */ -#define REG_DACC_WPSR REG_ACCESS(RoReg, 0x4003C0E8U) /**< \brief (DACC) Write Protect Status register */ -#define REG_DACC_RPR REG_ACCESS(RwReg, 0x4003C100U) /**< \brief (DACC) Receive Pointer Register */ -#define REG_DACC_RCR REG_ACCESS(RwReg, 0x4003C104U) /**< \brief (DACC) Receive Counter Register */ -#define REG_DACC_TPR REG_ACCESS(RwReg, 0x4003C108U) /**< \brief (DACC) Transmit Pointer Register */ -#define REG_DACC_TCR REG_ACCESS(RwReg, 0x4003C10CU) /**< \brief (DACC) Transmit Counter Register */ -#define REG_DACC_RNPR REG_ACCESS(RwReg, 0x4003C110U) /**< \brief (DACC) Receive Next Pointer Register */ -#define REG_DACC_RNCR REG_ACCESS(RwReg, 0x4003C114U) /**< \brief (DACC) Receive Next Counter Register */ -#define REG_DACC_TNPR REG_ACCESS(RwReg, 0x4003C118U) /**< \brief (DACC) Transmit Next Pointer Register */ -#define REG_DACC_TNCR REG_ACCESS(RwReg, 0x4003C11CU) /**< \brief (DACC) Transmit Next Counter Register */ -#define REG_DACC_PTCR REG_ACCESS(WoReg, 0x4003C120U) /**< \brief (DACC) Transfer Control Register */ -#define REG_DACC_PTSR REG_ACCESS(RoReg, 0x4003C124U) /**< \brief (DACC) Transfer Status Register */ -/* ========== Register definition for ACC peripheral ========== */ -#define REG_ACC_CR REG_ACCESS(WoReg, 0x40040000U) /**< \brief (ACC) Control Register */ -#define REG_ACC_MR REG_ACCESS(RwReg, 0x40040004U) /**< \brief (ACC) Mode Register */ -#define REG_ACC_IER REG_ACCESS(WoReg, 0x40040024U) /**< \brief (ACC) Interrupt Enable Register */ -#define REG_ACC_IDR REG_ACCESS(WoReg, 0x40040028U) /**< \brief (ACC) Interrupt Disable Register */ -#define REG_ACC_IMR REG_ACCESS(RoReg, 0x4004002CU) /**< \brief (ACC) Interrupt Mask Register */ -#define REG_ACC_ISR REG_ACCESS(RoReg, 0x40040030U) /**< \brief (ACC) Interrupt Status Register */ -#define REG_ACC_ACR REG_ACCESS(RwReg, 0x40040094U) /**< \brief (ACC) Analog Control Register */ -#define REG_ACC_WPMR REG_ACCESS(RwReg, 0x400400E4U) /**< \brief (ACC) Write Protect Mode Register */ -#define REG_ACC_WPSR REG_ACCESS(RoReg, 0x400400E8U) /**< \brief (ACC) Write Protect Status Register */ -/* ========== Register definition for CRCCU peripheral ========== */ -#define REG_CRCCU_DSCR REG_ACCESS(RwReg, 0x40044000U) /**< \brief (CRCCU) CRCCU Descriptor Base Register */ -#define REG_CRCCU_DMA_EN REG_ACCESS(WoReg, 0x40044008U) /**< \brief (CRCCU) CRCCU DMA Enable Register */ -#define REG_CRCCU_DMA_DIS REG_ACCESS(WoReg, 0x4004400CU) /**< \brief (CRCCU) CRCCU DMA Disable Register */ -#define REG_CRCCU_DMA_SR REG_ACCESS(RoReg, 0x40044010U) /**< \brief (CRCCU) CRCCU DMA Status Register */ -#define REG_CRCCU_DMA_IER REG_ACCESS(WoReg, 0x40044014U) /**< \brief (CRCCU) CRCCU DMA Interrupt Enable Register */ -#define REG_CRCCU_DMA_IDR REG_ACCESS(WoReg, 0x40044018U) /**< \brief (CRCCU) CRCCU DMA Interrupt Disable Register */ -#define REG_CRCCU_DMA_IMR REG_ACCESS(RoReg, 0x4004401CU) /**< \brief (CRCCU) CRCCU DMA Interrupt Mask Register */ -#define REG_CRCCU_DMA_ISR REG_ACCESS(RoReg, 0x40044020U) /**< \brief (CRCCU) CRCCU DMA Interrupt Status Register */ -#define REG_CRCCU_CR REG_ACCESS(WoReg, 0x40044034U) /**< \brief (CRCCU) CRCCU Control Register */ -#define REG_CRCCU_MR REG_ACCESS(RwReg, 0x40044038U) /**< \brief (CRCCU) CRCCU Mode Register */ -#define REG_CRCCU_SR REG_ACCESS(RoReg, 0x4004403CU) /**< \brief (CRCCU) CRCCU Status Register */ -#define REG_CRCCU_IER REG_ACCESS(WoReg, 0x40044040U) /**< \brief (CRCCU) CRCCU Interrupt Enable Register */ -#define REG_CRCCU_IDR REG_ACCESS(WoReg, 0x40044044U) /**< \brief (CRCCU) CRCCU Interrupt Disable Register */ -#define REG_CRCCU_IMR REG_ACCESS(RoReg, 0x40044048U) /**< \brief (CRCCU) CRCCU Interrupt Mask Register */ -#define REG_CRCCU_ISR REG_ACCESS(RoReg, 0x4004404CU) /**< \brief (CRCCU) CRCCU Interrupt Status Register */ -/* ========== Register definition for SMC peripheral ========== */ -#define REG_SMC_SETUP0 REG_ACCESS(RwReg, 0x400E0000U) /**< \brief (SMC) SMC Setup Register (CS_number = 0) */ -#define REG_SMC_PULSE0 REG_ACCESS(RwReg, 0x400E0004U) /**< \brief (SMC) SMC Pulse Register (CS_number = 0) */ -#define REG_SMC_CYCLE0 REG_ACCESS(RwReg, 0x400E0008U) /**< \brief (SMC) SMC Cycle Register (CS_number = 0) */ -#define REG_SMC_MODE0 REG_ACCESS(RwReg, 0x400E000CU) /**< \brief (SMC) SMC Mode Register (CS_number = 0) */ -#define REG_SMC_SETUP1 REG_ACCESS(RwReg, 0x400E0010U) /**< \brief (SMC) SMC Setup Register (CS_number = 1) */ -#define REG_SMC_PULSE1 REG_ACCESS(RwReg, 0x400E0014U) /**< \brief (SMC) SMC Pulse Register (CS_number = 1) */ -#define REG_SMC_CYCLE1 REG_ACCESS(RwReg, 0x400E0018U) /**< \brief (SMC) SMC Cycle Register (CS_number = 1) */ -#define REG_SMC_MODE1 REG_ACCESS(RwReg, 0x400E001CU) /**< \brief (SMC) SMC Mode Register (CS_number = 1) */ -#define REG_SMC_SETUP2 REG_ACCESS(RwReg, 0x400E0020U) /**< \brief (SMC) SMC Setup Register (CS_number = 2) */ -#define REG_SMC_PULSE2 REG_ACCESS(RwReg, 0x400E0024U) /**< \brief (SMC) SMC Pulse Register (CS_number = 2) */ -#define REG_SMC_CYCLE2 REG_ACCESS(RwReg, 0x400E0028U) /**< \brief (SMC) SMC Cycle Register (CS_number = 2) */ -#define REG_SMC_MODE2 REG_ACCESS(RwReg, 0x400E002CU) /**< \brief (SMC) SMC Mode Register (CS_number = 2) */ -#define REG_SMC_SETUP3 REG_ACCESS(RwReg, 0x400E0030U) /**< \brief (SMC) SMC Setup Register (CS_number = 3) */ -#define REG_SMC_PULSE3 REG_ACCESS(RwReg, 0x400E0034U) /**< \brief (SMC) SMC Pulse Register (CS_number = 3) */ -#define REG_SMC_CYCLE3 REG_ACCESS(RwReg, 0x400E0038U) /**< \brief (SMC) SMC Cycle Register (CS_number = 3) */ -#define REG_SMC_MODE3 REG_ACCESS(RwReg, 0x400E003CU) /**< \brief (SMC) SMC Mode Register (CS_number = 3) */ -#define REG_SMC_SETUP4 REG_ACCESS(RwReg, 0x400E0040U) /**< \brief (SMC) SMC Setup Register (CS_number = 4) */ -#define REG_SMC_PULSE4 REG_ACCESS(RwReg, 0x400E0044U) /**< \brief (SMC) SMC Pulse Register (CS_number = 4) */ -#define REG_SMC_CYCLE4 REG_ACCESS(RwReg, 0x400E0048U) /**< \brief (SMC) SMC Cycle Register (CS_number = 4) */ -#define REG_SMC_MODE4 REG_ACCESS(RwReg, 0x400E004CU) /**< \brief (SMC) SMC Mode Register (CS_number = 4) */ -#define REG_SMC_OCMS REG_ACCESS(RwReg, 0x400E0080U) /**< \brief (SMC) SMC OCMS MODE Register */ -#define REG_SMC_KEY1 REG_ACCESS(WoReg, 0x400E0084U) /**< \brief (SMC) SMC OCMS KEY1 Register */ -#define REG_SMC_KEY2 REG_ACCESS(WoReg, 0x400E0088U) /**< \brief (SMC) SMC OCMS KEY2 Register */ -#define REG_SMC_WPMR REG_ACCESS(RwReg, 0x400E00E4U) /**< \brief (SMC) SMC Write Protect Mode Register */ -#define REG_SMC_WPSR REG_ACCESS(RoReg, 0x400E00E8U) /**< \brief (SMC) SMC Write Protect Status Register */ -/* ========== Register definition for MATRIX peripheral ========== */ -#define REG_MATRIX_MCFG REG_ACCESS(RwReg, 0x400E0200U) /**< \brief (MATRIX) Master Configuration Register */ -#define REG_MATRIX_SCFG REG_ACCESS(RwReg, 0x400E0240U) /**< \brief (MATRIX) Slave Configuration Register */ -#define REG_MATRIX_PRAS0 REG_ACCESS(RwReg, 0x400E0280U) /**< \brief (MATRIX) Priority Register A for Slave 0 */ -#define REG_MATRIX_PRAS1 REG_ACCESS(RwReg, 0x400E0288U) /**< \brief (MATRIX) Priority Register A for Slave 1 */ -#define REG_MATRIX_PRAS2 REG_ACCESS(RwReg, 0x400E0290U) /**< \brief (MATRIX) Priority Register A for Slave 2 */ -#define REG_MATRIX_PRAS3 REG_ACCESS(RwReg, 0x400E0298U) /**< \brief (MATRIX) Priority Register A for Slave 3 */ -#define REG_MATRIX_PRAS4 REG_ACCESS(RwReg, 0x400E02A0U) /**< \brief (MATRIX) Priority Register A for Slave 4 */ -#define REG_MATRIX_SYSIO REG_ACCESS(RwReg, 0x400E0314U) /**< \brief (MATRIX) System IO Configuration register */ -#define REG_MATRIX_SMCNFCS REG_ACCESS(RwReg, 0x400E031CU) /**< \brief (MATRIX) SMC Chip Select NAND Flash Assignment Register */ -#define REG_MATRIX_WPMR REG_ACCESS(RwReg, 0x400E03E4U) /**< \brief (MATRIX) Write Protect Mode Register */ -#define REG_MATRIX_WPSR REG_ACCESS(RoReg, 0x400E03E8U) /**< \brief (MATRIX) Write Protect Status Register */ -/* ========== Register definition for PMC peripheral ========== */ -#define REG_PMC_SCER REG_ACCESS(WoReg, 0x400E0400U) /**< \brief (PMC) System Clock Enable Register */ -#define REG_PMC_SCDR REG_ACCESS(WoReg, 0x400E0404U) /**< \brief (PMC) System Clock Disable Register */ -#define REG_PMC_SCSR REG_ACCESS(RoReg, 0x400E0408U) /**< \brief (PMC) System Clock Status Register */ -#define REG_PMC_PCER0 REG_ACCESS(WoReg, 0x400E0410U) /**< \brief (PMC) Peripheral Clock Enable Register 0 */ -#define REG_PMC_PCDR0 REG_ACCESS(WoReg, 0x400E0414U) /**< \brief (PMC) Peripheral Clock Disable Register 0 */ -#define REG_PMC_PCSR0 REG_ACCESS(RoReg, 0x400E0418U) /**< \brief (PMC) Peripheral Clock Status Register 0 */ -#define REG_PMC_MOR REG_ACCESS(RwReg, 0x400E0420U) /**< \brief (PMC) Main Oscillator Register */ -#define REG_PMC_MCFR REG_ACCESS(RoReg, 0x400E0424U) /**< \brief (PMC) Main Clock Frequency Register */ -#define REG_PMC_PLLAR REG_ACCESS(RwReg, 0x400E0428U) /**< \brief (PMC) PLLA Register */ -#define REG_PMC_PLLBR REG_ACCESS(RwReg, 0x400E042CU) /**< \brief (PMC) PLLB Register */ -#define REG_PMC_MCKR REG_ACCESS(RwReg, 0x400E0430U) /**< \brief (PMC) Master Clock Register */ -#define REG_PMC_USB REG_ACCESS(RwReg, 0x400E0438U) /**< \brief (PMC) USB Clock Register */ -#define REG_PMC_PCK REG_ACCESS(RwReg, 0x400E0440U) /**< \brief (PMC) Programmable Clock 0 Register */ -#define REG_PMC_IER REG_ACCESS(WoReg, 0x400E0460U) /**< \brief (PMC) Interrupt Enable Register */ -#define REG_PMC_IDR REG_ACCESS(WoReg, 0x400E0464U) /**< \brief (PMC) Interrupt Disable Register */ -#define REG_PMC_SR REG_ACCESS(RoReg, 0x400E0468U) /**< \brief (PMC) Status Register */ -#define REG_PMC_IMR REG_ACCESS(RoReg, 0x400E046CU) /**< \brief (PMC) Interrupt Mask Register */ -#define REG_PMC_FSMR REG_ACCESS(RwReg, 0x400E0470U) /**< \brief (PMC) Fast Startup Mode Register */ -#define REG_PMC_FSPR REG_ACCESS(RwReg, 0x400E0474U) /**< \brief (PMC) Fast Startup Polarity Register */ -#define REG_PMC_FOCR REG_ACCESS(WoReg, 0x400E0478U) /**< \brief (PMC) Fault Output Clear Register */ -#define REG_PMC_WPMR REG_ACCESS(RwReg, 0x400E04E4U) /**< \brief (PMC) Write Protect Mode Register */ -#define REG_PMC_WPSR REG_ACCESS(RoReg, 0x400E04E8U) /**< \brief (PMC) Write Protect Status Register */ -#define REG_PMC_PCER1 REG_ACCESS(WoReg, 0x400E0500U) /**< \brief (PMC) Peripheral Clock Enable Register 1 */ -#define REG_PMC_PCDR1 REG_ACCESS(WoReg, 0x400E0504U) /**< \brief (PMC) Peripheral Clock Disable Register 1 */ -#define REG_PMC_PCSR1 REG_ACCESS(RoReg, 0x400E0508U) /**< \brief (PMC) Peripheral Clock Status Register 1 */ -#define REG_PMC_OCR REG_ACCESS(RwReg, 0x400E0510U) /**< \brief (PMC) Oscillator Calibration Register */ -/* ========== Register definition for UART0 peripheral ========== */ -#define REG_UART0_CR REG_ACCESS(WoReg, 0x400E0600U) /**< \brief (UART0) Control Register */ -#define REG_UART0_MR REG_ACCESS(RwReg, 0x400E0604U) /**< \brief (UART0) Mode Register */ -#define REG_UART0_IER REG_ACCESS(WoReg, 0x400E0608U) /**< \brief (UART0) Interrupt Enable Register */ -#define REG_UART0_IDR REG_ACCESS(WoReg, 0x400E060CU) /**< \brief (UART0) Interrupt Disable Register */ -#define REG_UART0_IMR REG_ACCESS(RoReg, 0x400E0610U) /**< \brief (UART0) Interrupt Mask Register */ -#define REG_UART0_SR REG_ACCESS(RoReg, 0x400E0614U) /**< \brief (UART0) Status Register */ -#define REG_UART0_RHR REG_ACCESS(RoReg, 0x400E0618U) /**< \brief (UART0) Receive Holding Register */ -#define REG_UART0_THR REG_ACCESS(WoReg, 0x400E061CU) /**< \brief (UART0) Transmit Holding Register */ -#define REG_UART0_BRGR REG_ACCESS(RwReg, 0x400E0620U) /**< \brief (UART0) Baud Rate Generator Register */ -#define REG_UART0_RPR REG_ACCESS(RwReg, 0x400E0700U) /**< \brief (UART0) Receive Pointer Register */ -#define REG_UART0_RCR REG_ACCESS(RwReg, 0x400E0704U) /**< \brief (UART0) Receive Counter Register */ -#define REG_UART0_TPR REG_ACCESS(RwReg, 0x400E0708U) /**< \brief (UART0) Transmit Pointer Register */ -#define REG_UART0_TCR REG_ACCESS(RwReg, 0x400E070CU) /**< \brief (UART0) Transmit Counter Register */ -#define REG_UART0_RNPR REG_ACCESS(RwReg, 0x400E0710U) /**< \brief (UART0) Receive Next Pointer Register */ -#define REG_UART0_RNCR REG_ACCESS(RwReg, 0x400E0714U) /**< \brief (UART0) Receive Next Counter Register */ -#define REG_UART0_TNPR REG_ACCESS(RwReg, 0x400E0718U) /**< \brief (UART0) Transmit Next Pointer Register */ -#define REG_UART0_TNCR REG_ACCESS(RwReg, 0x400E071CU) /**< \brief (UART0) Transmit Next Counter Register */ -#define REG_UART0_PTCR REG_ACCESS(WoReg, 0x400E0720U) /**< \brief (UART0) Transfer Control Register */ -#define REG_UART0_PTSR REG_ACCESS(RoReg, 0x400E0724U) /**< \brief (UART0) Transfer Status Register */ -/* ========== Register definition for CHIPID peripheral ========== */ -#define REG_CHIPID_CIDR REG_ACCESS(RoReg, 0x400E0740U) /**< \brief (CHIPID) Chip ID Register */ -#define REG_CHIPID_EXID REG_ACCESS(RoReg, 0x400E0744U) /**< \brief (CHIPID) Chip ID Extension Register */ -/* ========== Register definition for UART1 peripheral ========== */ -#define REG_UART1_CR REG_ACCESS(WoReg, 0x400E0800U) /**< \brief (UART1) Control Register */ -#define REG_UART1_MR REG_ACCESS(RwReg, 0x400E0804U) /**< \brief (UART1) Mode Register */ -#define REG_UART1_IER REG_ACCESS(WoReg, 0x400E0808U) /**< \brief (UART1) Interrupt Enable Register */ -#define REG_UART1_IDR REG_ACCESS(WoReg, 0x400E080CU) /**< \brief (UART1) Interrupt Disable Register */ -#define REG_UART1_IMR REG_ACCESS(RoReg, 0x400E0810U) /**< \brief (UART1) Interrupt Mask Register */ -#define REG_UART1_SR REG_ACCESS(RoReg, 0x400E0814U) /**< \brief (UART1) Status Register */ -#define REG_UART1_RHR REG_ACCESS(RoReg, 0x400E0818U) /**< \brief (UART1) Receive Holding Register */ -#define REG_UART1_THR REG_ACCESS(WoReg, 0x400E081CU) /**< \brief (UART1) Transmit Holding Register */ -#define REG_UART1_BRGR REG_ACCESS(RwReg, 0x400E0820U) /**< \brief (UART1) Baud Rate Generator Register */ -#define REG_UART1_RPR REG_ACCESS(RwReg, 0x400E0900U) /**< \brief (UART1) Receive Pointer Register */ -#define REG_UART1_RCR REG_ACCESS(RwReg, 0x400E0904U) /**< \brief (UART1) Receive Counter Register */ -#define REG_UART1_TPR REG_ACCESS(RwReg, 0x400E0908U) /**< \brief (UART1) Transmit Pointer Register */ -#define REG_UART1_TCR REG_ACCESS(RwReg, 0x400E090CU) /**< \brief (UART1) Transmit Counter Register */ -#define REG_UART1_RNPR REG_ACCESS(RwReg, 0x400E0910U) /**< \brief (UART1) Receive Next Pointer Register */ -#define REG_UART1_RNCR REG_ACCESS(RwReg, 0x400E0914U) /**< \brief (UART1) Receive Next Counter Register */ -#define REG_UART1_TNPR REG_ACCESS(RwReg, 0x400E0918U) /**< \brief (UART1) Transmit Next Pointer Register */ -#define REG_UART1_TNCR REG_ACCESS(RwReg, 0x400E091CU) /**< \brief (UART1) Transmit Next Counter Register */ -#define REG_UART1_PTCR REG_ACCESS(WoReg, 0x400E0920U) /**< \brief (UART1) Transfer Control Register */ -#define REG_UART1_PTSR REG_ACCESS(RoReg, 0x400E0924U) /**< \brief (UART1) Transfer Status Register */ -/* ========== Register definition for EFC peripheral ========== */ -#define REG_EFC_FMR REG_ACCESS(RwReg, 0x400E0A00U) /**< \brief (EFC) EEFC Flash Mode Register */ -#define REG_EFC_FCR REG_ACCESS(WoReg, 0x400E0A04U) /**< \brief (EFC) EEFC Flash Command Register */ -#define REG_EFC_FSR REG_ACCESS(RoReg, 0x400E0A08U) /**< \brief (EFC) EEFC Flash Status Register */ -#define REG_EFC_FRR REG_ACCESS(RoReg, 0x400E0A0CU) /**< \brief (EFC) EEFC Flash Result Register */ -/* ========== Register definition for PIOA peripheral ========== */ -#define REG_PIOA_PER REG_ACCESS(WoReg, 0x400E0E00U) /**< \brief (PIOA) PIO Enable Register */ -#define REG_PIOA_PDR REG_ACCESS(WoReg, 0x400E0E04U) /**< \brief (PIOA) PIO Disable Register */ -#define REG_PIOA_PSR REG_ACCESS(RoReg, 0x400E0E08U) /**< \brief (PIOA) PIO Status Register */ -#define REG_PIOA_OER REG_ACCESS(WoReg, 0x400E0E10U) /**< \brief (PIOA) Output Enable Register */ -#define REG_PIOA_ODR REG_ACCESS(WoReg, 0x400E0E14U) /**< \brief (PIOA) Output Disable Register */ -#define REG_PIOA_OSR REG_ACCESS(RoReg, 0x400E0E18U) /**< \brief (PIOA) Output Status Register */ -#define REG_PIOA_IFER REG_ACCESS(WoReg, 0x400E0E20U) /**< \brief (PIOA) Glitch Input Filter Enable Register */ -#define REG_PIOA_IFDR REG_ACCESS(WoReg, 0x400E0E24U) /**< \brief (PIOA) Glitch Input Filter Disable Register */ -#define REG_PIOA_IFSR REG_ACCESS(RoReg, 0x400E0E28U) /**< \brief (PIOA) Glitch Input Filter Status Register */ -#define REG_PIOA_SODR REG_ACCESS(WoReg, 0x400E0E30U) /**< \brief (PIOA) Set Output Data Register */ -#define REG_PIOA_CODR REG_ACCESS(WoReg, 0x400E0E34U) /**< \brief (PIOA) Clear Output Data Register */ -#define REG_PIOA_ODSR REG_ACCESS(RwReg, 0x400E0E38U) /**< \brief (PIOA) Output Data Status Register */ -#define REG_PIOA_PDSR REG_ACCESS(RoReg, 0x400E0E3CU) /**< \brief (PIOA) Pin Data Status Register */ -#define REG_PIOA_IER REG_ACCESS(WoReg, 0x400E0E40U) /**< \brief (PIOA) Interrupt Enable Register */ -#define REG_PIOA_IDR REG_ACCESS(WoReg, 0x400E0E44U) /**< \brief (PIOA) Interrupt Disable Register */ -#define REG_PIOA_IMR REG_ACCESS(RoReg, 0x400E0E48U) /**< \brief (PIOA) Interrupt Mask Register */ -#define REG_PIOA_ISR REG_ACCESS(RoReg, 0x400E0E4CU) /**< \brief (PIOA) Interrupt Status Register */ -#define REG_PIOA_MDER REG_ACCESS(WoReg, 0x400E0E50U) /**< \brief (PIOA) Multi-driver Enable Register */ -#define REG_PIOA_MDDR REG_ACCESS(WoReg, 0x400E0E54U) /**< \brief (PIOA) Multi-driver Disable Register */ -#define REG_PIOA_MDSR REG_ACCESS(RoReg, 0x400E0E58U) /**< \brief (PIOA) Multi-driver Status Register */ -#define REG_PIOA_PUDR REG_ACCESS(WoReg, 0x400E0E60U) /**< \brief (PIOA) Pull-up Disable Register */ -#define REG_PIOA_PUER REG_ACCESS(WoReg, 0x400E0E64U) /**< \brief (PIOA) Pull-up Enable Register */ -#define REG_PIOA_PUSR REG_ACCESS(RoReg, 0x400E0E68U) /**< \brief (PIOA) Pad Pull-up Status Register */ -#define REG_PIOA_ABCDSR REG_ACCESS(RwReg, 0x400E0E70U) /**< \brief (PIOA) Peripheral Select Register */ -#define REG_PIOA_SCIFSR REG_ACCESS(WoReg, 0x400E0E80U) /**< \brief (PIOA) System Clock Glitch Input Filter Select Register */ -#define REG_PIOA_DIFSR REG_ACCESS(WoReg, 0x400E0E84U) /**< \brief (PIOA) Debouncing Input Filter Select Register */ -#define REG_PIOA_IFDGSR REG_ACCESS(RoReg, 0x400E0E88U) /**< \brief (PIOA) Glitch or Debouncing Input Filter Clock Selection Status Register */ -#define REG_PIOA_SCDR REG_ACCESS(RwReg, 0x400E0E8CU) /**< \brief (PIOA) Slow Clock Divider Debouncing Register */ -#define REG_PIOA_PPDDR REG_ACCESS(WoReg, 0x400E0E90U) /**< \brief (PIOA) Pad Pull-down Disable Register */ -#define REG_PIOA_PPDER REG_ACCESS(WoReg, 0x400E0E94U) /**< \brief (PIOA) Pad Pull-down Enable Register */ -#define REG_PIOA_PPDSR REG_ACCESS(RoReg, 0x400E0E98U) /**< \brief (PIOA) Pad Pull-down Status Register */ -#define REG_PIOA_OWER REG_ACCESS(WoReg, 0x400E0EA0U) /**< \brief (PIOA) Output Write Enable */ -#define REG_PIOA_OWDR REG_ACCESS(WoReg, 0x400E0EA4U) /**< \brief (PIOA) Output Write Disable */ -#define REG_PIOA_OWSR REG_ACCESS(RoReg, 0x400E0EA8U) /**< \brief (PIOA) Output Write Status Register */ -#define REG_PIOA_AIMER REG_ACCESS(WoReg, 0x400E0EB0U) /**< \brief (PIOA) Additional Interrupt Modes Enable Register */ -#define REG_PIOA_AIMDR REG_ACCESS(WoReg, 0x400E0EB4U) /**< \brief (PIOA) Additional Interrupt Modes Disables Register */ -#define REG_PIOA_AIMMR REG_ACCESS(RoReg, 0x400E0EB8U) /**< \brief (PIOA) Additional Interrupt Modes Mask Register */ -#define REG_PIOA_ESR REG_ACCESS(WoReg, 0x400E0EC0U) /**< \brief (PIOA) Edge Select Register */ -#define REG_PIOA_LSR REG_ACCESS(WoReg, 0x400E0EC4U) /**< \brief (PIOA) Level Select Register */ -#define REG_PIOA_ELSR REG_ACCESS(RoReg, 0x400E0EC8U) /**< \brief (PIOA) Edge/Level Status Register */ -#define REG_PIOA_FELLSR REG_ACCESS(WoReg, 0x400E0ED0U) /**< \brief (PIOA) Falling Edge/Low Level Select Register */ -#define REG_PIOA_REHLSR REG_ACCESS(WoReg, 0x400E0ED4U) /**< \brief (PIOA) Rising Edge/ High Level Select Register */ -#define REG_PIOA_FRLHSR REG_ACCESS(RoReg, 0x400E0ED8U) /**< \brief (PIOA) Fall/Rise - Low/High Status Register */ -#define REG_PIOA_LOCKSR REG_ACCESS(RoReg, 0x400E0EE0U) /**< \brief (PIOA) Lock Status */ -#define REG_PIOA_WPMR REG_ACCESS(RwReg, 0x400E0EE4U) /**< \brief (PIOA) Write Protect Mode Register */ -#define REG_PIOA_WPSR REG_ACCESS(RoReg, 0x400E0EE8U) /**< \brief (PIOA) Write Protect Status Register */ -#define REG_PIOA_SCHMITT REG_ACCESS(RwReg, 0x400E0F00U) /**< \brief (PIOA) Schmitt Trigger Register */ -#define REG_PIOA_PCMR REG_ACCESS(RwReg, 0x400E0F50U) /**< \brief (PIOA) Parallel Capture Mode Register */ -#define REG_PIOA_PCIER REG_ACCESS(WoReg, 0x400E0F54U) /**< \brief (PIOA) Parallel Capture Interrupt Enable Register */ -#define REG_PIOA_PCIDR REG_ACCESS(WoReg, 0x400E0F58U) /**< \brief (PIOA) Parallel Capture Interrupt Disable Register */ -#define REG_PIOA_PCIMR REG_ACCESS(RoReg, 0x400E0F5CU) /**< \brief (PIOA) Parallel Capture Interrupt Mask Register */ -#define REG_PIOA_PCISR REG_ACCESS(RoReg, 0x400E0F60U) /**< \brief (PIOA) Parallel Capture Interrupt Status Register */ -#define REG_PIOA_PCRHR REG_ACCESS(RoReg, 0x400E0F64U) /**< \brief (PIOA) Parallel Capture Reception Holding Register */ -/* ========== Register definition for PIOB peripheral ========== */ -#define REG_PIOB_PER REG_ACCESS(WoReg, 0x400E1000U) /**< \brief (PIOB) PIO Enable Register */ -#define REG_PIOB_PDR REG_ACCESS(WoReg, 0x400E1004U) /**< \brief (PIOB) PIO Disable Register */ -#define REG_PIOB_PSR REG_ACCESS(RoReg, 0x400E1008U) /**< \brief (PIOB) PIO Status Register */ -#define REG_PIOB_OER REG_ACCESS(WoReg, 0x400E1010U) /**< \brief (PIOB) Output Enable Register */ -#define REG_PIOB_ODR REG_ACCESS(WoReg, 0x400E1014U) /**< \brief (PIOB) Output Disable Register */ -#define REG_PIOB_OSR REG_ACCESS(RoReg, 0x400E1018U) /**< \brief (PIOB) Output Status Register */ -#define REG_PIOB_IFER REG_ACCESS(WoReg, 0x400E1020U) /**< \brief (PIOB) Glitch Input Filter Enable Register */ -#define REG_PIOB_IFDR REG_ACCESS(WoReg, 0x400E1024U) /**< \brief (PIOB) Glitch Input Filter Disable Register */ -#define REG_PIOB_IFSR REG_ACCESS(RoReg, 0x400E1028U) /**< \brief (PIOB) Glitch Input Filter Status Register */ -#define REG_PIOB_SODR REG_ACCESS(WoReg, 0x400E1030U) /**< \brief (PIOB) Set Output Data Register */ -#define REG_PIOB_CODR REG_ACCESS(WoReg, 0x400E1034U) /**< \brief (PIOB) Clear Output Data Register */ -#define REG_PIOB_ODSR REG_ACCESS(RwReg, 0x400E1038U) /**< \brief (PIOB) Output Data Status Register */ -#define REG_PIOB_PDSR REG_ACCESS(RoReg, 0x400E103CU) /**< \brief (PIOB) Pin Data Status Register */ -#define REG_PIOB_IER REG_ACCESS(WoReg, 0x400E1040U) /**< \brief (PIOB) Interrupt Enable Register */ -#define REG_PIOB_IDR REG_ACCESS(WoReg, 0x400E1044U) /**< \brief (PIOB) Interrupt Disable Register */ -#define REG_PIOB_IMR REG_ACCESS(RoReg, 0x400E1048U) /**< \brief (PIOB) Interrupt Mask Register */ -#define REG_PIOB_ISR REG_ACCESS(RoReg, 0x400E104CU) /**< \brief (PIOB) Interrupt Status Register */ -#define REG_PIOB_MDER REG_ACCESS(WoReg, 0x400E1050U) /**< \brief (PIOB) Multi-driver Enable Register */ -#define REG_PIOB_MDDR REG_ACCESS(WoReg, 0x400E1054U) /**< \brief (PIOB) Multi-driver Disable Register */ -#define REG_PIOB_MDSR REG_ACCESS(RoReg, 0x400E1058U) /**< \brief (PIOB) Multi-driver Status Register */ -#define REG_PIOB_PUDR REG_ACCESS(WoReg, 0x400E1060U) /**< \brief (PIOB) Pull-up Disable Register */ -#define REG_PIOB_PUER REG_ACCESS(WoReg, 0x400E1064U) /**< \brief (PIOB) Pull-up Enable Register */ -#define REG_PIOB_PUSR REG_ACCESS(RoReg, 0x400E1068U) /**< \brief (PIOB) Pad Pull-up Status Register */ -#define REG_PIOB_ABCDSR REG_ACCESS(RwReg, 0x400E1070U) /**< \brief (PIOB) Peripheral Select Register */ -#define REG_PIOB_SCIFSR REG_ACCESS(WoReg, 0x400E1080U) /**< \brief (PIOB) System Clock Glitch Input Filter Select Register */ -#define REG_PIOB_DIFSR REG_ACCESS(WoReg, 0x400E1084U) /**< \brief (PIOB) Debouncing Input Filter Select Register */ -#define REG_PIOB_IFDGSR REG_ACCESS(RoReg, 0x400E1088U) /**< \brief (PIOB) Glitch or Debouncing Input Filter Clock Selection Status Register */ -#define REG_PIOB_SCDR REG_ACCESS(RwReg, 0x400E108CU) /**< \brief (PIOB) Slow Clock Divider Debouncing Register */ -#define REG_PIOB_PPDDR REG_ACCESS(WoReg, 0x400E1090U) /**< \brief (PIOB) Pad Pull-down Disable Register */ -#define REG_PIOB_PPDER REG_ACCESS(WoReg, 0x400E1094U) /**< \brief (PIOB) Pad Pull-down Enable Register */ -#define REG_PIOB_PPDSR REG_ACCESS(RoReg, 0x400E1098U) /**< \brief (PIOB) Pad Pull-down Status Register */ -#define REG_PIOB_OWER REG_ACCESS(WoReg, 0x400E10A0U) /**< \brief (PIOB) Output Write Enable */ -#define REG_PIOB_OWDR REG_ACCESS(WoReg, 0x400E10A4U) /**< \brief (PIOB) Output Write Disable */ -#define REG_PIOB_OWSR REG_ACCESS(RoReg, 0x400E10A8U) /**< \brief (PIOB) Output Write Status Register */ -#define REG_PIOB_AIMER REG_ACCESS(WoReg, 0x400E10B0U) /**< \brief (PIOB) Additional Interrupt Modes Enable Register */ -#define REG_PIOB_AIMDR REG_ACCESS(WoReg, 0x400E10B4U) /**< \brief (PIOB) Additional Interrupt Modes Disables Register */ -#define REG_PIOB_AIMMR REG_ACCESS(RoReg, 0x400E10B8U) /**< \brief (PIOB) Additional Interrupt Modes Mask Register */ -#define REG_PIOB_ESR REG_ACCESS(WoReg, 0x400E10C0U) /**< \brief (PIOB) Edge Select Register */ -#define REG_PIOB_LSR REG_ACCESS(WoReg, 0x400E10C4U) /**< \brief (PIOB) Level Select Register */ -#define REG_PIOB_ELSR REG_ACCESS(RoReg, 0x400E10C8U) /**< \brief (PIOB) Edge/Level Status Register */ -#define REG_PIOB_FELLSR REG_ACCESS(WoReg, 0x400E10D0U) /**< \brief (PIOB) Falling Edge/Low Level Select Register */ -#define REG_PIOB_REHLSR REG_ACCESS(WoReg, 0x400E10D4U) /**< \brief (PIOB) Rising Edge/ High Level Select Register */ -#define REG_PIOB_FRLHSR REG_ACCESS(RoReg, 0x400E10D8U) /**< \brief (PIOB) Fall/Rise - Low/High Status Register */ -#define REG_PIOB_LOCKSR REG_ACCESS(RoReg, 0x400E10E0U) /**< \brief (PIOB) Lock Status */ -#define REG_PIOB_WPMR REG_ACCESS(RwReg, 0x400E10E4U) /**< \brief (PIOB) Write Protect Mode Register */ -#define REG_PIOB_WPSR REG_ACCESS(RoReg, 0x400E10E8U) /**< \brief (PIOB) Write Protect Status Register */ -#define REG_PIOB_SCHMITT REG_ACCESS(RwReg, 0x400E1100U) /**< \brief (PIOB) Schmitt Trigger Register */ -#define REG_PIOB_PCMR REG_ACCESS(RwReg, 0x400E1150U) /**< \brief (PIOB) Parallel Capture Mode Register */ -#define REG_PIOB_PCIER REG_ACCESS(WoReg, 0x400E1154U) /**< \brief (PIOB) Parallel Capture Interrupt Enable Register */ -#define REG_PIOB_PCIDR REG_ACCESS(WoReg, 0x400E1158U) /**< \brief (PIOB) Parallel Capture Interrupt Disable Register */ -#define REG_PIOB_PCIMR REG_ACCESS(RoReg, 0x400E115CU) /**< \brief (PIOB) Parallel Capture Interrupt Mask Register */ -#define REG_PIOB_PCISR REG_ACCESS(RoReg, 0x400E1160U) /**< \brief (PIOB) Parallel Capture Interrupt Status Register */ -#define REG_PIOB_PCRHR REG_ACCESS(RoReg, 0x400E1164U) /**< \brief (PIOB) Parallel Capture Reception Holding Register */ -/* ========== Register definition for PIOC peripheral ========== */ -#define REG_PIOC_PER REG_ACCESS(WoReg, 0x400E1200U) /**< \brief (PIOC) PIO Enable Register */ -#define REG_PIOC_PDR REG_ACCESS(WoReg, 0x400E1204U) /**< \brief (PIOC) PIO Disable Register */ -#define REG_PIOC_PSR REG_ACCESS(RoReg, 0x400E1208U) /**< \brief (PIOC) PIO Status Register */ -#define REG_PIOC_OER REG_ACCESS(WoReg, 0x400E1210U) /**< \brief (PIOC) Output Enable Register */ -#define REG_PIOC_ODR REG_ACCESS(WoReg, 0x400E1214U) /**< \brief (PIOC) Output Disable Register */ -#define REG_PIOC_OSR REG_ACCESS(RoReg, 0x400E1218U) /**< \brief (PIOC) Output Status Register */ -#define REG_PIOC_IFER REG_ACCESS(WoReg, 0x400E1220U) /**< \brief (PIOC) Glitch Input Filter Enable Register */ -#define REG_PIOC_IFDR REG_ACCESS(WoReg, 0x400E1224U) /**< \brief (PIOC) Glitch Input Filter Disable Register */ -#define REG_PIOC_IFSR REG_ACCESS(RoReg, 0x400E1228U) /**< \brief (PIOC) Glitch Input Filter Status Register */ -#define REG_PIOC_SODR REG_ACCESS(WoReg, 0x400E1230U) /**< \brief (PIOC) Set Output Data Register */ -#define REG_PIOC_CODR REG_ACCESS(WoReg, 0x400E1234U) /**< \brief (PIOC) Clear Output Data Register */ -#define REG_PIOC_ODSR REG_ACCESS(RwReg, 0x400E1238U) /**< \brief (PIOC) Output Data Status Register */ -#define REG_PIOC_PDSR REG_ACCESS(RoReg, 0x400E123CU) /**< \brief (PIOC) Pin Data Status Register */ -#define REG_PIOC_IER REG_ACCESS(WoReg, 0x400E1240U) /**< \brief (PIOC) Interrupt Enable Register */ -#define REG_PIOC_IDR REG_ACCESS(WoReg, 0x400E1244U) /**< \brief (PIOC) Interrupt Disable Register */ -#define REG_PIOC_IMR REG_ACCESS(RoReg, 0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register */ -#define REG_PIOC_ISR REG_ACCESS(RoReg, 0x400E124CU) /**< \brief (PIOC) Interrupt Status Register */ -#define REG_PIOC_MDER REG_ACCESS(WoReg, 0x400E1250U) /**< \brief (PIOC) Multi-driver Enable Register */ -#define REG_PIOC_MDDR REG_ACCESS(WoReg, 0x400E1254U) /**< \brief (PIOC) Multi-driver Disable Register */ -#define REG_PIOC_MDSR REG_ACCESS(RoReg, 0x400E1258U) /**< \brief (PIOC) Multi-driver Status Register */ -#define REG_PIOC_PUDR REG_ACCESS(WoReg, 0x400E1260U) /**< \brief (PIOC) Pull-up Disable Register */ -#define REG_PIOC_PUER REG_ACCESS(WoReg, 0x400E1264U) /**< \brief (PIOC) Pull-up Enable Register */ -#define REG_PIOC_PUSR REG_ACCESS(RoReg, 0x400E1268U) /**< \brief (PIOC) Pad Pull-up Status Register */ -#define REG_PIOC_ABCDSR REG_ACCESS(RwReg, 0x400E1270U) /**< \brief (PIOC) Peripheral Select Register */ -#define REG_PIOC_SCIFSR REG_ACCESS(WoReg, 0x400E1280U) /**< \brief (PIOC) System Clock Glitch Input Filter Select Register */ -#define REG_PIOC_DIFSR REG_ACCESS(WoReg, 0x400E1284U) /**< \brief (PIOC) Debouncing Input Filter Select Register */ -#define REG_PIOC_IFDGSR REG_ACCESS(RoReg, 0x400E1288U) /**< \brief (PIOC) Glitch or Debouncing Input Filter Clock Selection Status Register */ -#define REG_PIOC_SCDR REG_ACCESS(RwReg, 0x400E128CU) /**< \brief (PIOC) Slow Clock Divider Debouncing Register */ -#define REG_PIOC_PPDDR REG_ACCESS(WoReg, 0x400E1290U) /**< \brief (PIOC) Pad Pull-down Disable Register */ -#define REG_PIOC_PPDER REG_ACCESS(WoReg, 0x400E1294U) /**< \brief (PIOC) Pad Pull-down Enable Register */ -#define REG_PIOC_PPDSR REG_ACCESS(RoReg, 0x400E1298U) /**< \brief (PIOC) Pad Pull-down Status Register */ -#define REG_PIOC_OWER REG_ACCESS(WoReg, 0x400E12A0U) /**< \brief (PIOC) Output Write Enable */ -#define REG_PIOC_OWDR REG_ACCESS(WoReg, 0x400E12A4U) /**< \brief (PIOC) Output Write Disable */ -#define REG_PIOC_OWSR REG_ACCESS(RoReg, 0x400E12A8U) /**< \brief (PIOC) Output Write Status Register */ -#define REG_PIOC_AIMER REG_ACCESS(WoReg, 0x400E12B0U) /**< \brief (PIOC) Additional Interrupt Modes Enable Register */ -#define REG_PIOC_AIMDR REG_ACCESS(WoReg, 0x400E12B4U) /**< \brief (PIOC) Additional Interrupt Modes Disables Register */ -#define REG_PIOC_AIMMR REG_ACCESS(RoReg, 0x400E12B8U) /**< \brief (PIOC) Additional Interrupt Modes Mask Register */ -#define REG_PIOC_ESR REG_ACCESS(WoReg, 0x400E12C0U) /**< \brief (PIOC) Edge Select Register */ -#define REG_PIOC_LSR REG_ACCESS(WoReg, 0x400E12C4U) /**< \brief (PIOC) Level Select Register */ -#define REG_PIOC_ELSR REG_ACCESS(RoReg, 0x400E12C8U) /**< \brief (PIOC) Edge/Level Status Register */ -#define REG_PIOC_FELLSR REG_ACCESS(WoReg, 0x400E12D0U) /**< \brief (PIOC) Falling Edge/Low Level Select Register */ -#define REG_PIOC_REHLSR REG_ACCESS(WoReg, 0x400E12D4U) /**< \brief (PIOC) Rising Edge/ High Level Select Register */ -#define REG_PIOC_FRLHSR REG_ACCESS(RoReg, 0x400E12D8U) /**< \brief (PIOC) Fall/Rise - Low/High Status Register */ -#define REG_PIOC_LOCKSR REG_ACCESS(RoReg, 0x400E12E0U) /**< \brief (PIOC) Lock Status */ -#define REG_PIOC_WPMR REG_ACCESS(RwReg, 0x400E12E4U) /**< \brief (PIOC) Write Protect Mode Register */ -#define REG_PIOC_WPSR REG_ACCESS(RoReg, 0x400E12E8U) /**< \brief (PIOC) Write Protect Status Register */ -#define REG_PIOC_SCHMITT REG_ACCESS(RwReg, 0x400E1300U) /**< \brief (PIOC) Schmitt Trigger Register */ -#define REG_PIOC_PCMR REG_ACCESS(RwReg, 0x400E1350U) /**< \brief (PIOC) Parallel Capture Mode Register */ -#define REG_PIOC_PCIER REG_ACCESS(WoReg, 0x400E1354U) /**< \brief (PIOC) Parallel Capture Interrupt Enable Register */ -#define REG_PIOC_PCIDR REG_ACCESS(WoReg, 0x400E1358U) /**< \brief (PIOC) Parallel Capture Interrupt Disable Register */ -#define REG_PIOC_PCIMR REG_ACCESS(RoReg, 0x400E135CU) /**< \brief (PIOC) Parallel Capture Interrupt Mask Register */ -#define REG_PIOC_PCISR REG_ACCESS(RoReg, 0x400E1360U) /**< \brief (PIOC) Parallel Capture Interrupt Status Register */ -#define REG_PIOC_PCRHR REG_ACCESS(RoReg, 0x400E1364U) /**< \brief (PIOC) Parallel Capture Reception Holding Register */ -/* ========== Register definition for RSTC peripheral ========== */ -#define REG_RSTC_CR REG_ACCESS(WoReg, 0x400E1400U) /**< \brief (RSTC) Control Register */ -#define REG_RSTC_SR REG_ACCESS(RoReg, 0x400E1404U) /**< \brief (RSTC) Status Register */ -#define REG_RSTC_MR REG_ACCESS(RwReg, 0x400E1408U) /**< \brief (RSTC) Mode Register */ -/* ========== Register definition for SUPC peripheral ========== */ -#define REG_SUPC_CR REG_ACCESS(WoReg, 0x400E1410U) /**< \brief (SUPC) Supply Controller Control Register */ -#define REG_SUPC_SMMR REG_ACCESS(RwReg, 0x400E1414U) /**< \brief (SUPC) Supply Controller Supply Monitor Mode Register */ -#define REG_SUPC_MR REG_ACCESS(RwReg, 0x400E1418U) /**< \brief (SUPC) Supply Controller Mode Register */ -#define REG_SUPC_WUMR REG_ACCESS(RwReg, 0x400E141CU) /**< \brief (SUPC) Supply Controller Wake Up Mode Register */ -#define REG_SUPC_WUIR REG_ACCESS(RwReg, 0x400E1420U) /**< \brief (SUPC) Supply Controller Wake Up Inputs Register */ -#define REG_SUPC_SR REG_ACCESS(RoReg, 0x400E1424U) /**< \brief (SUPC) Supply Controller Status Register */ -/* ========== Register definition for RTT peripheral ========== */ -#define REG_RTT_MR REG_ACCESS(RwReg, 0x400E1430U) /**< \brief (RTT) Mode Register */ -#define REG_RTT_AR REG_ACCESS(RwReg, 0x400E1434U) /**< \brief (RTT) Alarm Register */ -#define REG_RTT_VR REG_ACCESS(RoReg, 0x400E1438U) /**< \brief (RTT) Value Register */ -#define REG_RTT_SR REG_ACCESS(RoReg, 0x400E143CU) /**< \brief (RTT) Status Register */ -/* ========== Register definition for WDT peripheral ========== */ -#define REG_WDT_CR REG_ACCESS(WoReg, 0x400E1450U) /**< \brief (WDT) Control Register */ -#define REG_WDT_MR REG_ACCESS(RwReg, 0x400E1454U) /**< \brief (WDT) Mode Register */ -#define REG_WDT_SR REG_ACCESS(RoReg, 0x400E1458U) /**< \brief (WDT) Status Register */ -/* ========== Register definition for RTC peripheral ========== */ -#define REG_RTC_CR REG_ACCESS(RwReg, 0x400E1460U) /**< \brief (RTC) Control Register */ -#define REG_RTC_MR REG_ACCESS(RwReg, 0x400E1464U) /**< \brief (RTC) Mode Register */ -#define REG_RTC_TIMR REG_ACCESS(RwReg, 0x400E1468U) /**< \brief (RTC) Time Register */ -#define REG_RTC_CALR REG_ACCESS(RwReg, 0x400E146CU) /**< \brief (RTC) Calendar Register */ -#define REG_RTC_TIMALR REG_ACCESS(RwReg, 0x400E1470U) /**< \brief (RTC) Time Alarm Register */ -#define REG_RTC_CALALR REG_ACCESS(RwReg, 0x400E1474U) /**< \brief (RTC) Calendar Alarm Register */ -#define REG_RTC_SR REG_ACCESS(RoReg, 0x400E1478U) /**< \brief (RTC) Status Register */ -#define REG_RTC_SCCR REG_ACCESS(WoReg, 0x400E147CU) /**< \brief (RTC) Status Clear Command Register */ -#define REG_RTC_IER REG_ACCESS(WoReg, 0x400E1480U) /**< \brief (RTC) Interrupt Enable Register */ -#define REG_RTC_IDR REG_ACCESS(WoReg, 0x400E1484U) /**< \brief (RTC) Interrupt Disable Register */ -#define REG_RTC_IMR REG_ACCESS(RoReg, 0x400E1488U) /**< \brief (RTC) Interrupt Mask Register */ -#define REG_RTC_VER REG_ACCESS(RoReg, 0x400E148CU) /**< \brief (RTC) Valid Entry Register */ -/* ========== Register definition for GPBR peripheral ========== */ -#define REG_GPBR_GPBR0 REG_ACCESS(RwReg, 0x400E1490U) /**< \brief (GPBR) General Purpose Backup Register 0 */ -#define REG_GPBR_GPBR1 REG_ACCESS(RwReg, 0x400E1494U) /**< \brief (GPBR) General Purpose Backup Register 1 */ -#define REG_GPBR_GPBR2 REG_ACCESS(RwReg, 0x400E1498U) /**< \brief (GPBR) General Purpose Backup Register 2 */ -#define REG_GPBR_GPBR3 REG_ACCESS(RwReg, 0x400E149CU) /**< \brief (GPBR) General Purpose Backup Register 3 */ -/*@}*/ - -/* ***************************************************************************** */ -/* PERIPHERAL ID DEFINITIONS FOR AT91SAM3S */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3S_id Peripheral Ids Definitions */ -/*@{*/ - -#define ID_SUPC ( 0) /**< \brief Supply Controller (SUPC) */ -#define ID_RSTC ( 1) /**< \brief Reset Controller (RSTC) */ -#define ID_RTC ( 2) /**< \brief Real Time Clock (RTC) */ -#define ID_RTT ( 3) /**< \brief Real Time Timer (RTT) */ -#define ID_WDT ( 4) /**< \brief Watchdog Timer (WDT) */ -#define ID_PMC ( 5) /**< \brief Power Management Controller (PMC) */ -#define ID_EFC ( 6) /**< \brief Enhanced Flash Controller (EFC) */ -#define ID_UART0 ( 8) /**< \brief UART 0 (UART0) */ -#define ID_UART1 ( 9) /**< \brief UART 1 (UART1) */ -#define ID_SMC (10) /**< \brief Static Memory Controller (SMC) */ -#define ID_PIOA (11) /**< \brief Parallel I/O Controller A (PIOA) */ -#define ID_PIOB (12) /**< \brief Parallel I/O Controller B (PIOB) */ -#define ID_PIOC (13) /**< \brief Parallel I/O Controller C (PIOC) */ -#define ID_USART0 (14) /**< \brief USART 0 (USART0) */ -#define ID_USART1 (15) /**< \brief USART 1 (USART1) */ -#define ID_HSMCI (18) /**< \brief Multimedia Card Interface (HSMCI) */ -#define ID_TWI0 (19) /**< \brief Two Wire Interface 0 (TWI0) */ -#define ID_TWI1 (20) /**< \brief Two Wire Interface 1 (TWI1) */ -#define ID_SPI (21) /**< \brief Serial Peripheral Interface (SPI) */ -#define ID_SSC (22) /**< \brief Synchronous Serial Controler (SSC) */ -#define ID_TC0 (23) /**< \brief Timer/Counter 0 (TC0) */ -#define ID_TC1 (24) /**< \brief Timer/Counter 1 (TC1) */ -#define ID_TC2 (25) /**< \brief Timer/Counter 2 (TC2) */ -#define ID_TC3 (26) /**< \brief Timer/Counter 3 (TC3) */ -#define ID_TC4 (27) /**< \brief Timer/Counter 4 (TC4) */ -#define ID_TC5 (28) /**< \brief Timer/Counter 5 (TC5) */ -#define ID_ADC (29) /**< \brief Analog To Digital Converter (ADC) */ -#define ID_DACC (30) /**< \brief Digital To Analog Converter (DACC) */ -#define ID_PWM (31) /**< \brief Pulse Width Modulation (PWM) */ -#define ID_CRCCU (32) /**< \brief CRC Calculation Unit (CRCCU) */ -#define ID_ACC (33) /**< \brief Analog Comparator (ACC) */ -#define ID_UDP (34) /**< \brief USB Device Port (UDP) */ -/*@}*/ - -/* ***************************************************************************** */ -/* BASE ADDRESS DEFINITIONS FOR AT91SAM3S */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3S_base Peripheral Base Address Definitions */ -/*@{*/ - -#define HSMCI CAST(Hsmci , 0x40000000U) /**< \brief (HSMCI ) Base Address */ -#define PDC_HSMCI CAST(Pdc , 0x40000100U) /**< \brief (PDC_HSMCI ) Base Address */ -#define SSC CAST(Ssc , 0x40004000U) /**< \brief (SSC ) Base Address */ -#define PDC_SSC CAST(Pdc , 0x40004100U) /**< \brief (PDC_SSC ) Base Address */ -#define SPI CAST(Spi , 0x40008000U) /**< \brief (SPI ) Base Address */ -#define PDC_SPI CAST(Pdc , 0x40008100U) /**< \brief (PDC_SPI ) Base Address */ -#define TC0 CAST(Tc , 0x40010000U) /**< \brief (TC0 ) Base Address */ -#define TC1 CAST(Tc , 0x40014000U) /**< \brief (TC1 ) Base Address */ -#define TWI0 CAST(Twi , 0x40018000U) /**< \brief (TWI0 ) Base Address */ -#define PDC_TWI0 CAST(Pdc , 0x40018100U) /**< \brief (PDC_TWI0 ) Base Address */ -#define TWI1 CAST(Twi , 0x4001C000U) /**< \brief (TWI1 ) Base Address */ -#define PDC_TWI1 CAST(Pdc , 0x4001C100U) /**< \brief (PDC_TWI1 ) Base Address */ -#define PWM CAST(Pwm , 0x40020000U) /**< \brief (PWM ) Base Address */ -#define PDC_PWM CAST(Pdc , 0x40020100U) /**< \brief (PDC_PWM ) Base Address */ -#define USART0 CAST(Usart , 0x40024000U) /**< \brief (USART0 ) Base Address */ -#define PDC_USART0 CAST(Pdc , 0x40024100U) /**< \brief (PDC_USART0) Base Address */ -#define USART1 CAST(Usart , 0x40028000U) /**< \brief (USART1 ) Base Address */ -#define PDC_USART1 CAST(Pdc , 0x40028100U) /**< \brief (PDC_USART1) Base Address */ -#define UDP CAST(Udp , 0x40034000U) /**< \brief (UDP ) Base Address */ -#define ADC CAST(Adc , 0x40038000U) /**< \brief (ADC ) Base Address */ -#define PDC_ADC CAST(Pdc , 0x40038100U) /**< \brief (PDC_ADC ) Base Address */ -#define DACC CAST(Dacc , 0x4003C000U) /**< \brief (DACC ) Base Address */ -#define PDC_DACC CAST(Pdc , 0x4003C100U) /**< \brief (PDC_DACC ) Base Address */ -#define ACC CAST(Acc , 0x40040000U) /**< \brief (ACC ) Base Address */ -#define CRCCU CAST(Crccu , 0x40044000U) /**< \brief (CRCCU ) Base Address */ -#define SMC CAST(Smc , 0x400E0000U) /**< \brief (SMC ) Base Address */ -#define MATRIX CAST(Matrix , 0x400E0200U) /**< \brief (MATRIX ) Base Address */ -#define PMC CAST(Pmc , 0x400E0400U) /**< \brief (PMC ) Base Address */ -#define UART0 CAST(Uart , 0x400E0600U) /**< \brief (UART0 ) Base Address */ -#define PDC_UART0 CAST(Pdc , 0x400E0700U) /**< \brief (PDC_UART0 ) Base Address */ -#define CHIPID CAST(Chipid , 0x400E0740U) /**< \brief (CHIPID ) Base Address */ -#define UART1 CAST(Uart , 0x400E0800U) /**< \brief (UART1 ) Base Address */ -#define PDC_UART1 CAST(Pdc , 0x400E0900U) /**< \brief (PDC_UART1 ) Base Address */ -#define EFC CAST(Efc , 0x400E0A00U) /**< \brief (EFC ) Base Address */ -#define PIOA CAST(Pio , 0x400E0E00U) /**< \brief (PIOA ) Base Address */ -#define PIOB CAST(Pio , 0x400E1000U) /**< \brief (PIOB ) Base Address */ -#define PIOC CAST(Pio , 0x400E1200U) /**< \brief (PIOC ) Base Address */ -#define RSTC CAST(Rstc , 0x400E1400U) /**< \brief (RSTC ) Base Address */ -#define SUPC CAST(Supc , 0x400E1410U) /**< \brief (SUPC ) Base Address */ -#define RTT CAST(Rtt , 0x400E1430U) /**< \brief (RTT ) Base Address */ -#define WDT CAST(Wdt , 0x400E1450U) /**< \brief (WDT ) Base Address */ -#define RTC CAST(Rtc , 0x400E1460U) /**< \brief (RTC ) Base Address */ -#define GPBR CAST(Gpbr , 0x400E1490U) /**< \brief (GPBR ) Base Address */ -/*@}*/ - -/* ***************************************************************************** */ -/* PIO DEFINITIONS FOR AT91SAM3S */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3S_pio Peripheral Pio Definitions */ -/*@{*/ - -#define PIO_PA0 (1 << 0) /**< \brief Pin Controlled by PA0 */ -#define PIO_PA1 (1 << 1) /**< \brief Pin Controlled by PA1 */ -#define PIO_PA2 (1 << 2) /**< \brief Pin Controlled by PA2 */ -#define PIO_PA3 (1 << 3) /**< \brief Pin Controlled by PA3 */ -#define PIO_PA4 (1 << 4) /**< \brief Pin Controlled by PA4 */ -#define PIO_PA5 (1 << 5) /**< \brief Pin Controlled by PA5 */ -#define PIO_PA6 (1 << 6) /**< \brief Pin Controlled by PA6 */ -#define PIO_PA7 (1 << 7) /**< \brief Pin Controlled by PA7 */ -#define PIO_PA8 (1 << 8) /**< \brief Pin Controlled by PA8 */ -#define PIO_PA9 (1 << 9) /**< \brief Pin Controlled by PA9 */ -#define PIO_PA10 (1 << 10) /**< \brief Pin Controlled by PA10 */ -#define PIO_PA11 (1 << 11) /**< \brief Pin Controlled by PA11 */ -#define PIO_PA12 (1 << 12) /**< \brief Pin Controlled by PA12 */ -#define PIO_PA13 (1 << 13) /**< \brief Pin Controlled by PA13 */ -#define PIO_PA14 (1 << 14) /**< \brief Pin Controlled by PA14 */ -#define PIO_PA15 (1 << 15) /**< \brief Pin Controlled by PA15 */ -#define PIO_PA16 (1 << 16) /**< \brief Pin Controlled by PA16 */ -#define PIO_PA17 (1 << 17) /**< \brief Pin Controlled by PA17 */ -#define PIO_PA18 (1 << 18) /**< \brief Pin Controlled by PA18 */ -#define PIO_PA19 (1 << 19) /**< \brief Pin Controlled by PA19 */ -#define PIO_PA20 (1 << 20) /**< \brief Pin Controlled by PA20 */ -#define PIO_PA21 (1 << 21) /**< \brief Pin Controlled by PA21 */ -#define PIO_PA22 (1 << 22) /**< \brief Pin Controlled by PA22 */ -#define PIO_PA23 (1 << 23) /**< \brief Pin Controlled by PA23 */ -#define PIO_PA24 (1 << 24) /**< \brief Pin Controlled by PA24 */ -#define PIO_PA25 (1 << 25) /**< \brief Pin Controlled by PA25 */ -#define PIO_PA26 (1 << 26) /**< \brief Pin Controlled by PA26 */ -#define PIO_PA27 (1 << 27) /**< \brief Pin Controlled by PA27 */ -#define PIO_PA28 (1 << 28) /**< \brief Pin Controlled by PA28 */ -#define PIO_PA29 (1 << 29) /**< \brief Pin Controlled by PA29 */ -#define PIO_PA30 (1 << 30) /**< \brief Pin Controlled by PA30 */ -#define PIO_PA31 (1 << 31) /**< \brief Pin Controlled by PA31 */ -#define PIO_PB0 (1 << 0) /**< \brief Pin Controlled by PB0 */ -#define PIO_PB1 (1 << 1) /**< \brief Pin Controlled by PB1 */ -#define PIO_PB2 (1 << 2) /**< \brief Pin Controlled by PB2 */ -#define PIO_PB3 (1 << 3) /**< \brief Pin Controlled by PB3 */ -#define PIO_PB4 (1 << 4) /**< \brief Pin Controlled by PB4 */ -#define PIO_PB5 (1 << 5) /**< \brief Pin Controlled by PB5 */ -#define PIO_PB6 (1 << 6) /**< \brief Pin Controlled by PB6 */ -#define PIO_PB7 (1 << 7) /**< \brief Pin Controlled by PB7 */ -#define PIO_PB8 (1 << 8) /**< \brief Pin Controlled by PB8 */ -#define PIO_PB9 (1 << 9) /**< \brief Pin Controlled by PB9 */ -#define PIO_PB10 (1 << 10) /**< \brief Pin Controlled by PB10 */ -#define PIO_PB11 (1 << 11) /**< \brief Pin Controlled by PB11 */ -#define PIO_PB12 (1 << 12) /**< \brief Pin Controlled by PB12 */ -#define PIO_PB13 (1 << 13) /**< \brief Pin Controlled by PB13 */ -#define PIO_PB14 (1 << 14) /**< \brief Pin Controlled by PB14 */ -#define PIO_PC0 (1 << 0) /**< \brief Pin Controlled by PC0 */ -#define PIO_PC1 (1 << 1) /**< \brief Pin Controlled by PC1 */ -#define PIO_PC2 (1 << 2) /**< \brief Pin Controlled by PC2 */ -#define PIO_PC3 (1 << 3) /**< \brief Pin Controlled by PC3 */ -#define PIO_PC4 (1 << 4) /**< \brief Pin Controlled by PC4 */ -#define PIO_PC5 (1 << 5) /**< \brief Pin Controlled by PC5 */ -#define PIO_PC6 (1 << 6) /**< \brief Pin Controlled by PC6 */ -#define PIO_PC7 (1 << 7) /**< \brief Pin Controlled by PC7 */ -#define PIO_PC8 (1 << 8) /**< \brief Pin Controlled by PC8 */ -#define PIO_PC9 (1 << 9) /**< \brief Pin Controlled by PC9 */ -#define PIO_PC10 (1 << 10) /**< \brief Pin Controlled by PC10 */ -#define PIO_PC11 (1 << 11) /**< \brief Pin Controlled by PC11 */ -#define PIO_PC12 (1 << 12) /**< \brief Pin Controlled by PC12 */ -#define PIO_PC13 (1 << 13) /**< \brief Pin Controlled by PC13 */ -#define PIO_PC14 (1 << 14) /**< \brief Pin Controlled by PC14 */ -#define PIO_PC15 (1 << 15) /**< \brief Pin Controlled by PC15 */ -#define PIO_PC16 (1 << 16) /**< \brief Pin Controlled by PC16 */ -#define PIO_PC17 (1 << 17) /**< \brief Pin Controlled by PC17 */ -#define PIO_PC18 (1 << 18) /**< \brief Pin Controlled by PC18 */ -#define PIO_PC19 (1 << 19) /**< \brief Pin Controlled by PC19 */ -#define PIO_PC20 (1 << 20) /**< \brief Pin Controlled by PC20 */ -#define PIO_PC21 (1 << 21) /**< \brief Pin Controlled by PC21 */ -#define PIO_PC22 (1 << 22) /**< \brief Pin Controlled by PC22 */ -#define PIO_PC23 (1 << 23) /**< \brief Pin Controlled by PC23 */ -#define PIO_PC24 (1 << 24) /**< \brief Pin Controlled by PC24 */ -#define PIO_PC25 (1 << 25) /**< \brief Pin Controlled by PC25 */ -#define PIO_PC26 (1 << 26) /**< \brief Pin Controlled by PC26 */ -#define PIO_PC27 (1 << 27) /**< \brief Pin Controlled by PC27 */ -#define PIO_PC28 (1 << 28) /**< \brief Pin Controlled by PC28 */ -#define PIO_PC29 (1 << 29) /**< \brief Pin Controlled by PC29 */ -#define PIO_PC30 (1 << 30) /**< \brief Pin Controlled by PC30 */ -#define PIO_PC31 (1 << 31) /**< \brief Pin Controlled by PC31 */ -/* ========== Pio definition for HSMCI peripheral ========== */ -#define PIO_PA28C_MCCDA (1 << 28) /**< \brief Hsmci signal: MCCDA */ -#define PIO_PA29C_MCCK (1 << 29) /**< \brief Hsmci signal: MCCK */ -#define PIO_PA30C_MCDA0 (1 << 30) /**< \brief Hsmci signal: MCDA0 */ -#define PIO_PA31C_MCDA1 (1 << 31) /**< \brief Hsmci signal: MCDA1 */ -#define PIO_PA26C_MCDA2 (1 << 26) /**< \brief Hsmci signal: MCDA2 */ -#define PIO_PA27C_MCDA3 (1 << 27) /**< \brief Hsmci signal: MCDA3 */ -/* ========== Pio definition for SSC peripheral ========== */ -#define PIO_PA18A_RD (1 << 18) /**< \brief Ssc signal: RD */ -#define PIO_PA20A_RF (1 << 20) /**< \brief Ssc signal: RF */ -#define PIO_PA19A_RK (1 << 19) /**< \brief Ssc signal: RK */ -#define PIO_PA17A_TD (1 << 17) /**< \brief Ssc signal: TD */ -#define PIO_PA15A_TF (1 << 15) /**< \brief Ssc signal: TF */ -#define PIO_PA16A_TK (1 << 16) /**< \brief Ssc signal: TK */ -/* ========== Pio definition for SPI peripheral ========== */ -#define PIO_PA12A_MISO (1 << 12) /**< \brief Spi signal: MISO */ -#define PIO_PA13A_MOSI (1 << 13) /**< \brief Spi signal: MOSI */ -#define PIO_PA11A_NPCS0 (1 << 11) /**< \brief Spi signal: NPCS0 */ -#define PIO_PA31A_NPCS1 (1 << 31) /**< \brief Spi signal: NPCS1 */ -#define PIO_PA9B_NPCS1 (1 << 9) /**< \brief Spi signal: NPCS1 */ -#define PIO_PB14A_NPCS1 (1 << 14) /**< \brief Spi signal: NPCS1 */ -#define PIO_PC4B_NPCS1 (1 << 4) /**< \brief Spi signal: NPCS1 */ -#define PIO_PA10B_NPCS2 (1 << 10) /**< \brief Spi signal: NPCS2 */ -#define PIO_PA30B_NPCS2 (1 << 30) /**< \brief Spi signal: NPCS2 */ -#define PIO_PB2B_NPCS2 (1 << 2) /**< \brief Spi signal: NPCS2 */ -#define PIO_PA22B_NPCS3 (1 << 22) /**< \brief Spi signal: NPCS3 */ -#define PIO_PA3B_NPCS3 (1 << 3) /**< \brief Spi signal: NPCS3 */ -#define PIO_PA5B_NPCS3 (1 << 5) /**< \brief Spi signal: NPCS3 */ -#define PIO_PA14A_SPCK (1 << 14) /**< \brief Spi signal: SPCK */ -/* ========== Pio definition for TC0 peripheral ========== */ -#define PIO_PA4B_TCLK0 (1 << 4) /**< \brief Tc0 signal: TCLK0 */ -#define PIO_PA28B_TCLK1 (1 << 28) /**< \brief Tc0 signal: TCLK1 */ -#define PIO_PA29B_TCLK2 (1 << 29) /**< \brief Tc0 signal: TCLK2 */ -#define PIO_PA0B_TIOA0 (1 << 0) /**< \brief Tc0 signal: TIOA0 */ -#define PIO_PA15B_TIOA1 (1 << 15) /**< \brief Tc0 signal: TIOA1 */ -#define PIO_PA26B_TIOA2 (1 << 26) /**< \brief Tc0 signal: TIOA2 */ -#define PIO_PA1B_TIOB0 (1 << 1) /**< \brief Tc0 signal: TIOB0 */ -#define PIO_PA16B_TIOB1 (1 << 16) /**< \brief Tc0 signal: TIOB1 */ -#define PIO_PA27B_TIOB2 (1 << 27) /**< \brief Tc0 signal: TIOB2 */ -/* ========== Pio definition for TC1 peripheral ========== */ -#define PIO_PC25B_TCLK3 (1 << 25) /**< \brief Tc1 signal: TCLK3 */ -#define PIO_PC28B_TCLK4 (1 << 28) /**< \brief Tc1 signal: TCLK4 */ -#define PIO_PC31B_TCLK5 (1 << 31) /**< \brief Tc1 signal: TCLK5 */ -#define PIO_PC23B_TIOA3 (1 << 23) /**< \brief Tc1 signal: TIOA3 */ -#define PIO_PC26B_TIOA4 (1 << 26) /**< \brief Tc1 signal: TIOA4 */ -#define PIO_PC29B_TIOA5 (1 << 29) /**< \brief Tc1 signal: TIOA5 */ -#define PIO_PC24B_TIOB3 (1 << 24) /**< \brief Tc1 signal: TIOB3 */ -#define PIO_PC27B_TIOB4 (1 << 27) /**< \brief Tc1 signal: TIOB4 */ -#define PIO_PC30B_TIOB5 (1 << 30) /**< \brief Tc1 signal: TIOB5 */ -/* ========== Pio definition for TWI0 peripheral ========== */ -#define PIO_PA4A_TWCK0 (1 << 4) /**< \brief Twi0 signal: TWCK0 */ -#define PIO_PA3A_TWD0 (1 << 3) /**< \brief Twi0 signal: TWD0 */ -/* ========== Pio definition for TWI1 peripheral ========== */ -#define PIO_PB5A_TWCK1 (1 << 5) /**< \brief Twi1 signal: TWCK1 */ -#define PIO_PB4A_TWD1 (1 << 4) /**< \brief Twi1 signal: TWD1 */ -/* ========== Pio definition for PWM peripheral ========== */ -#define PIO_PA9C_PWMFI0 (1 << 9) /**< \brief Pwm signal: PWMFI0 */ -#define PIO_PA0A_PWMH0 (1 << 0) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA11B_PWMH0 (1 << 11) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA23B_PWMH0 (1 << 23) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PB0A_PWMH0 (1 << 0) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PC18B_PWMH0 (1 << 18) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA1A_PWMH1 (1 << 1) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA12B_PWMH1 (1 << 12) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA24B_PWMH1 (1 << 24) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PB1A_PWMH1 (1 << 1) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PC19B_PWMH1 (1 << 19) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA13B_PWMH2 (1 << 13) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA2A_PWMH2 (1 << 2) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA25B_PWMH2 (1 << 25) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PB4B_PWMH2 (1 << 4) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PC20B_PWMH2 (1 << 20) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA14B_PWMH3 (1 << 14) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PA17C_PWMH3 (1 << 17) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PA7B_PWMH3 (1 << 7) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PB14B_PWMH3 (1 << 14) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PC21B_PWMH3 (1 << 21) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PA19B_PWML0 (1 << 19) /**< \brief Pwm signal: PWML0 */ -#define PIO_PB5B_PWML0 (1 << 5) /**< \brief Pwm signal: PWML0 */ -#define PIO_PC0B_PWML0 (1 << 0) /**< \brief Pwm signal: PWML0 */ -#define PIO_PC13B_PWML0 (1 << 13) /**< \brief Pwm signal: PWML0 */ -#define PIO_PA20B_PWML1 (1 << 20) /**< \brief Pwm signal: PWML1 */ -#define PIO_PB12A_PWML1 (1 << 12) /**< \brief Pwm signal: PWML1 */ -#define PIO_PC1B_PWML1 (1 << 1) /**< \brief Pwm signal: PWML1 */ -#define PIO_PC15B_PWML1 (1 << 15) /**< \brief Pwm signal: PWML1 */ -#define PIO_PA16C_PWML2 (1 << 16) /**< \brief Pwm signal: PWML2 */ -#define PIO_PA30A_PWML2 (1 << 30) /**< \brief Pwm signal: PWML2 */ -#define PIO_PB13A_PWML2 (1 << 13) /**< \brief Pwm signal: PWML2 */ -#define PIO_PC2B_PWML2 (1 << 2) /**< \brief Pwm signal: PWML2 */ -#define PIO_PA15C_PWML3 (1 << 15) /**< \brief Pwm signal: PWML3 */ -#define PIO_PC22B_PWML3 (1 << 22) /**< \brief Pwm signal: PWML3 */ -#define PIO_PC3B_PWML3 (1 << 3) /**< \brief Pwm signal: PWML3 */ -/* ========== Pio definition for USART0 peripheral ========== */ -#define PIO_PA8A_CTS0 (1 << 8) /**< \brief Usart0 signal: CTS0 */ -#define PIO_PA7A_RTS0 (1 << 7) /**< \brief Usart0 signal: RTS0 */ -#define PIO_PA5A_RXD0 (1 << 5) /**< \brief Usart0 signal: RXD0 */ -#define PIO_PA2B_SCK0 (1 << 2) /**< \brief Usart0 signal: SCK0 */ -#define PIO_PA6A_TXD0 (1 << 6) /**< \brief Usart0 signal: TXD0 */ -/* ========== Pio definition for USART1 peripheral ========== */ -#define PIO_PA25A_CTS1 (1 << 25) /**< \brief Usart1 signal: CTS1 */ -#define PIO_PA26A_DCD1 (1 << 26) /**< \brief Usart1 signal: DCD1 */ -#define PIO_PA28A_DSR1 (1 << 28) /**< \brief Usart1 signal: DSR1 */ -#define PIO_PA27A_DTR1 (1 << 27) /**< \brief Usart1 signal: DTR1 */ -#define PIO_PA29A_RI1 (1 << 29) /**< \brief Usart1 signal: RI1 */ -#define PIO_PA24A_RTS1 (1 << 24) /**< \brief Usart1 signal: RTS1 */ -#define PIO_PA21A_RXD1 (1 << 21) /**< \brief Usart1 signal: RXD1 */ -#define PIO_PA23A_SCK1 (1 << 23) /**< \brief Usart1 signal: SCK1 */ -#define PIO_PA22A_TXD1 (1 << 22) /**< \brief Usart1 signal: TXD1 */ -/* ========== Pio definition for ADC peripheral ========== */ -#define PIO_PA17X1_AD0 (1 << 17) /**< \brief Adc signal: AD0 */ -#define PIO_PA18X1_AD1 (1 << 18) /**< \brief Adc signal: AD1 */ -#define PIO_PC13X1_AD10 (1 << 13) /**< \brief Adc signal: AD10 */ -#define PIO_PC15X1_AD11 (1 << 15) /**< \brief Adc signal: AD11 */ -#define PIO_PC12X1_AD12 (1 << 12) /**< \brief Adc signal: AD12 */ -#define PIO_PC29X1_AD13 (1 << 29) /**< \brief Adc signal: AD13 */ -#define PIO_PC30X1_AD14 (1 << 30) /**< \brief Adc signal: AD14 */ -#define PIO_PA19X1_AD2 (1 << 19) /**< \brief Adc signal: AD2 */ -#define PIO_PA20X1_AD3 (1 << 20) /**< \brief Adc signal: AD3 */ -#define PIO_PB0X1_AD4 (1 << 0) /**< \brief Adc signal: AD4 */ -#define PIO_PB1X1_AD5 (1 << 1) /**< \brief Adc signal: AD5 */ -#define PIO_PB2X1_AD6 (1 << 2) /**< \brief Adc signal: AD6 */ -#define PIO_PB3X1_AD7 (1 << 3) /**< \brief Adc signal: AD7 */ -#define PIO_PA21X1_AD8 (1 << 21) /**< \brief Adc signal: AD8 */ -#define PIO_PA22X1_AD9 (1 << 22) /**< \brief Adc signal: AD9 */ -#define PIO_PA8B_ADTRG (1 << 8) /**< \brief Adc signal: ADTRG */ -/* ========== Pio definition for DACC peripheral ========== */ -#define PIO_PB13X1_DAC0 (1 << 13) /**< \brief Dacc signal: DAC0 */ -#define PIO_PB14X1_DAC1 (1 << 14) /**< \brief Dacc signal: DAC1 */ -#define PIO_PA2C_DATRG (1 << 2) /**< \brief Dacc signal: DATRG */ -/* ========== Pio definition for PMC peripheral ========== */ -#define PIO_PA6B_PCK0 (1 << 6) /**< \brief Pmc signal: PCK0 */ -#define PIO_PB13B_PCK0 (1 << 13) /**< \brief Pmc signal: PCK0 */ -#define PIO_PA17B_PCK1 (1 << 17) /**< \brief Pmc signal: PCK1 */ -#define PIO_PA21B_PCK1 (1 << 21) /**< \brief Pmc signal: PCK1 */ -#define PIO_PA18B_PCK2 (1 << 18) /**< \brief Pmc signal: PCK2 */ -#define PIO_PA31B_PCK2 (1 << 31) /**< \brief Pmc signal: PCK2 */ -#define PIO_PB3B_PCK2 (1 << 3) /**< \brief Pmc signal: PCK2 */ -/* ========== Pio definition for UART0 peripheral ========== */ -#define PIO_PA9A_URXD0 (1 << 9) /**< \brief Uart0 signal: URXD0 */ -#define PIO_PA10A_UTXD0 (1 << 10) /**< \brief Uart0 signal: UTXD0 */ -/* ========== Pio definition for UART1 peripheral ========== */ -#define PIO_PB2A_URXD1 (1 << 2) /**< \brief Uart1 signal: URXD1 */ -#define PIO_PB3A_UTXD1 (1 << 3) /**< \brief Uart1 signal: UTXD1 */ -/* ========== Pio definition for PIOA peripheral ========== */ -#define PIO_PA24X1_PIODC0 (1 << 24) /**< \brief Pioa signal: PIODC0 */ -#define PIO_PA25X1_PIODC1 (1 << 25) /**< \brief Pioa signal: PIODC1 */ -#define PIO_PA26X1_PIODC2 (1 << 26) /**< \brief Pioa signal: PIODC2 */ -#define PIO_PA27X1_PIODC3 (1 << 27) /**< \brief Pioa signal: PIODC3 */ -#define PIO_PA28X1_PIODC4 (1 << 28) /**< \brief Pioa signal: PIODC4 */ -#define PIO_PA29X1_PIODC5 (1 << 29) /**< \brief Pioa signal: PIODC5 */ -#define PIO_PA30X1_PIODC6 (1 << 30) /**< \brief Pioa signal: PIODC6 */ -#define PIO_PA31X1_PIODC7 (1 << 31) /**< \brief Pioa signal: PIODC7 */ -#define PIO_PA23X1_PIODCCLK (1 << 23) /**< \brief Pioa signal: PIODCCLK */ -#define PIO_PA15X1_PIODCEN1 (1 << 15) /**< \brief Pioa signal: PIODCEN1 */ -#define PIO_PA16X1_PIODCEN2 (1 << 16) /**< \brief Pioa signal: PIODCEN2 */ -/*@}*/ - -/* ***************************************************************************** */ -/* MEMORY MAPPING DEFINITIONS FOR AT91SAM3S */ -/* ***************************************************************************** */ - -#define AT91C_IRAM (0x20000000) /**< Internal RAM base address */ -#define AT91C_IFLASH (0x00400000) /**< Internal Flash base address */ -#define AT91C_IROM (0x00800000) /**< Internal ROM base address */ -#define AT91C_IRAM (0x20000000) /**< Internal RAM base address */ -#define AT91C_EBI_CS0 (0x60000000) /**< EBI Chip Select 0 base address */ -#define AT91C_EBI_CS1 (0x61000000) /**< EBI Chip Select 1 base address */ -#define AT91C_EBI_CS2 (0x62000000) /**< EBI Chip Select 2 base address */ -#define AT91C_EBI_CS3 (0x63000000) /**< EBI Chip Select 3 base address */ - -#ifdef __cplusplus -} -#endif - -/*@}*/ - -#endif /* AT91SAM3S_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/chip.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/chip.h deleted file mode 100644 index 8b698408..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/chip.h +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// !Purpose -/// -/// Definition of AT91SAM3S4 characteristics and features -/// -/// !Usage -/// -# For ARM core feature, see "AT91SAM3S4 - ARM core features". -/// -# For IP features, see "AT91SAM3S4 - IP features". -/// -# For misc, see "AT91SAM3S4 - Misc". -//------------------------------------------------------------------------------ - -#ifndef CHIP_H -#define CHIP_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \page "AT91SAM3S4 - ARM core features" -/// This page lists several characteristics related to the ARM core -/// - -//ARM core features - -/// ARM core definition. -#define cortexm3 - -/// family definition. -#define at91sam3s - -//------------------------------------------------------------------------------ -/// \page "AT91SAM3S4 - IP features" -/// This page lists several characteristics related to the embedded IP -/// - -//IP FEATURES - -// EFC GPNVM number -#define CHIP_EFC_NUM_GPNVMS 3 - -/// Indicates chip has an Enhanced EFC. -#define CHIP_FLASH_EEFC - -// DMA channels number -#define CHIP_DMA_CHANNEL_NUM 4 - -// Indicate chip's MCI interface. -#define MCI2_INTERFACE - -// Indicate chip SSC has DMA interface. -#define CHIP_SSC_DMA - -// Indicate chip SPI has DMA interface. -#define CHIP_SPI_DMA - -/// Indicates chip has an UDP Full Speed. -#define CHIP_USB_UDP - -/// Indicates chip has an internal pull-up. -#define CHIP_USB_PULLUP_INTERNAL - -/// Number of USB endpoints -#define CHIP_USB_NUMENDPOINTS 8 - -/// Endpoints max paxcket size -#define CHIP_USB_ENDPOINTS_MAXPACKETSIZE(i) \ - ((i == 0) ? 64 : \ - ((i == 1) ? 64 : \ - ((i == 2) ? 64 : \ - ((i == 3) ? 64 : \ - ((i == 4) ? 512 : \ - ((i == 5) ? 512 : \ - ((i == 6) ? 64 : \ - ((i == 7) ? 64 : 0 )))))))) - -/// Endpoints Number of Bank -#define CHIP_USB_ENDPOINTS_BANKS(i) \ - ((i == 0) ? 1 : \ - ((i == 1) ? 2 : \ - ((i == 2) ? 2 : \ - ((i == 3) ? 1 : \ - ((i == 4) ? 2 : \ - ((i == 5) ? 2 : \ - ((i == 6) ? 2 : \ - ((i == 7) ? 2 : 0 )))))))) - -//------------------------------------------------------------------------------ -/// \page "AT91SAM3S4 - Misc " -/// This page lists misc features -/// - -//Misc - -#endif //#ifndef CHIP_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/flash.icf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/flash.icf deleted file mode 100644 index 65ac3312..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/flash.icf +++ /dev/null @@ -1,30 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ -/*-Vector table start*/ -define symbol __ICFEDIT_vector_start__ = 0x000400000; /*Add for CMSIS*/ -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; -define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; -define symbol __ICFEDIT_region_ROM_start__ = 0x00400000; -define symbol __ICFEDIT_region_ROM_end__ = 0x0043FFFF; -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x800; -define symbol __ICFEDIT_size_heap__ = 0x200; - -export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/ -/**** End of ICF editor section. ###ICF###*/ - -define memory mem with size = 4G; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; -define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; - -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - -initialize by copy { readwrite }; -do not initialize { section .noinit }; - -place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; /*Add for CMSIS*/ -place in ROM_region { readonly }; -place in RAM_region { readwrite,,block CSTACK, block HEAP }; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/flash.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/flash.lds deleted file mode 100644 index 9d01841e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/flash.lds +++ /dev/null @@ -1,81 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal FLASH on the AT91SAM3S4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(ResetException) - -/* Memory Spaces Definitions */ -MEMORY -{ - sram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x0000C000 /* sram, 48K */ - flash (W!RX) : ORIGIN = 0x00400000, LENGTH = 0x00040000 /* Flash, 256K */ -} - -SECTIONS -{ - .fixed : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) - *(.text*) - *(.rodata*) - *(.glue_7) - *(.glue_7t) - . = ALIGN(4); - _efixed = .; /* End of text section */ - } >flash - - .relocate : AT (_efixed) - { - . = ALIGN(4); - _srelocate = .; - *(.ramfunc); - *(.data); - . = ALIGN(4); - _erelocate = .; - } >sram - - .bss (NOLOAD) : { - . = ALIGN(4); - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >sram - - /* Stack in the end of SRAM */ - _estack = 0x2000BFFC; -} -end = .; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/sram.icf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/sram.icf deleted file mode 100644 index 22eb374b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/sram.icf +++ /dev/null @@ -1,27 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ -/*-Vector table start*/ -define symbol __ICFEDIT_vector_start__ = 0x20000000; -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; -define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x900; -define symbol __ICFEDIT_size_heap__ = 0x200; -/*-Exports-*/ -export symbol __ICFEDIT_vector_start__; -/**** End of ICF editor section. ###ICF###*/ - -define memory mem with size = 4G; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; - -/* define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { }; */ -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - -initialize by copy { readwrite }; -do not initialize { section .noinit }; - -place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; -place in RAM_region { readonly, readwrite, block CSTACK, block HEAP }; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/sram.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/sram.lds deleted file mode 100644 index 2d38cfcc..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/sram.lds +++ /dev/null @@ -1,81 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal SRAM on the AT91SAM3S4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(ResetException) - -/* Memory Spaces Definitions */ -MEMORY -{ - sram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x0000C000 /* sram, 48K */ -} - -SECTIONS -{ - .fixed : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) - *(.text*) - *(.ramfunc) - *(.rodata*) - *(.glue_7) - *(.glue_7t) - . = ALIGN(4); - _efixed = .; /* End of text section */ - } > sram - - .relocate : AT (_efixed) - { - . = ALIGN(4); - _srelocate = .; - *(.data) - . = ALIGN(4); - _erelocate = .; - } >sram - - .bss (NOLOAD) : { - . = ALIGN(4); - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >sram - - /* Stack in the end of SRAM */ - _estack = 0x2000BFFC; - -} -end = .; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/sram_flashloader.icf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/sram_flashloader.icf deleted file mode 100644 index a954d2cb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/sram_flashloader.icf +++ /dev/null @@ -1,33 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ -/*-Specials-*/ -define symbol __ICFEDIT_intvec_start__ = 0x20000000; -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_ROM_start__ = 0x0; -define symbol __ICFEDIT_region_ROM_end__ = 0x0; -define symbol __ICFEDIT_region_RAM_start__ = 0x20000040; -define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; - -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x0200; -define symbol __ICFEDIT_size_heap__ = 0x000; -/**** End of ICF editor section. ###ICF###*/ - - -define memory mem with size = 4G; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; - -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - -//initialize by copy { readwrite }; -do not initialize { section .noinit }; - -place at address mem:__ICFEDIT_intvec_start__ { section .intvec }; - -place at start of RAM_region { block RamTop with fixed order {readonly, section LOWEND}}; -place at end of RAM_region { block RamBottom with fixed order {section HIGHSTART, readwrite, section .init, - block CSTACK, block HEAP}}; - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/sram_samba.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/sram_samba.lds deleted file mode 100644 index 16b1dc96..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3s4/sram_samba.lds +++ /dev/null @@ -1,91 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal SRAM on the AT91SAM3S4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(entry) - -/* Memory Spaces Definitions */ -MEMORY -{ - romcodesram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x01000 - sram (W!RX) : ORIGIN = 0x20001000, LENGTH = 0x0000B000 /* sram, 48K - sizeof(romcodesram) */ -} - -/* Entry point */ -/*ENTRY (ResetException)*/ - -SECTIONS -{ - /* startup code in the .isr_vector */ - .text : - { - . = ALIGN(4); - _stext = .; - KEEP(*(.isr_vector .isr_vector.*)) - *(.mailbox) - *(.text .text.*) - *(.rodata .rodata.*) - *(.glue_7) - *(.glue_7t) - *(.gcc_except_table) - *(.rodata .rodata*) - *(.gnu.linkonce.r.*) - . = ALIGN(4); - _etext = .; - } > sram - - /* data */ - .data : - { - . = ALIGN(4); - _sidata = .; - _sdata = .; - - *(.data) - *(.data.*) - . = ALIGN(4); - _edata = .; - } > sram - - .bss (NOLOAD) : { - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >sram - - /* Stack in SRAM */ - _sstack = 0x2000BFFC; -} -end = .; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/AT91SAM3U4.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/AT91SAM3U4.h deleted file mode 100644 index 64101aa0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/AT91SAM3U4.h +++ /dev/null @@ -1,7439 +0,0 @@ -/* ---------------------------------------------------------------------------- */ -/* Atmel Microcontroller Software Support */ -/* ---------------------------------------------------------------------------- */ -/* Copyright (c) 2009, Atmel Corporation */ -/* */ -/* All rights reserved. */ -/* */ -/* Redistribution and use in source and binary forms, with or without */ -/* modification, are permitted provided that the following condition is met: */ -/* */ -/* - Redistributions of source code must retain the above copyright notice, */ -/* this list of conditions and the disclaimer below. */ -/* */ -/* Atmel's name may not be used to endorse or promote products derived from */ -/* this software without specific prior written permission. */ -/* */ -/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ -/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ -/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ -/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ -/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ -/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ -/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ -/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ -/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ -/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* ---------------------------------------------------------------------------- */ -/* */ -/* File Name : AT91SAM3U.h */ -/* Object : AT91SAM3U definitions */ -/* Generated by : AT91 SW Application Group */ -/* Generated on : 2009-09-10 */ - -#ifndef AT91SAM3U_H -#define AT91SAM3U_H - -/** \addtogroup AT91SAM3U_definitions AT91SAM3U definitions - This file defines all structures and symbols for AT91SAM3U: - - registers and bitfields - - peripheral base address - - peripheral ID - - PIO definitions -*/ -/*@{*/ - -#ifdef __cplusplus - extern "C" { -#endif - -#ifndef __ASSEMBLY__ -#include -#ifndef __cplusplus -typedef volatile const uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */ -#else -typedef volatile uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */ -#endif -typedef volatile uint32_t WoReg; /**< Write only 32-bit register (volatile unsigned int) */ -typedef volatile uint32_t RwReg; /**< Read-Write 32-bit register (volatile unsigned int) */ -#define CAST(type, value) ((type *) value) -#define REG_ACCESS(type, address) (*(type*)address) /**< C code: Register value */ -#else -#define CAST(type, value) (value) -#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */ -#endif - -/* ***************************************************************************** */ -/* CMSIS DEFINITIONS FOR AT91SAM3U */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3U_cmsis CMSIS Definitions */ - -/*@{*/ - -/** - * \brief Configuration of the Cortex-M3 Processor and Core Peripherals - */ -#define __MPU_PRESENT 0 /**< AT91SAM3U does not provide a MPU present or not */ -#define __NVIC_PRIO_BITS 4 /**< AT91SAM3U uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /**< Set to 1 if different SysTick Config is used */ - -/**< Interrupt Number Definition */ -typedef enum IRQn -{ -/****** Cortex-M3 Processor Exceptions Numbers ***************************************/ - NonMaskableInt_IRQn = -14, /**< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /**< 4 Cortex-M3 Memory Management Interrupt */ - BusFault_IRQn = -11, /**< 5 Cortex-M3 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /**< 6 Cortex-M3 Usage Fault Interrupt */ - SVCall_IRQn = -5, /**< 11 Cortex-M3 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /**< 12 Cortex-M3 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /**< 14 Cortex-M3 Pend SV Interrupt */ - SysTick_IRQn = -1, /**< 15 Cortex-M3 System Tick Interrupt */ -/****** AT91SAM3U specific Interrupt Numbers *****************************************/ - - SUPC_IRQn = 0, /**< 0 AT91SAM3U Supply Controller (SUPC) */ - RSTC_IRQn = 1, /**< 1 AT91SAM3U Reset Controller (RSTC) */ - RTC_IRQn = 2, /**< 2 AT91SAM3U Real Time Clock (RTC) */ - RTT_IRQn = 3, /**< 3 AT91SAM3U Real Time Timer (RTT) */ - WDT_IRQn = 4, /**< 4 AT91SAM3U Watchdog Timer (WDT) */ - PMC_IRQn = 5, /**< 5 AT91SAM3U Power Management Controller (PMC) */ - EFC0_IRQn = 6, /**< 6 AT91SAM3U Enhanced Embedded Flash Controller 0 (EFC0) */ - EFC1_IRQn = 7, /**< 7 AT91SAM3U Enhanced Embedded Flash Controller 1 (EFC1) */ - UART_IRQn = 8, /**< 8 AT91SAM3U Universal Asynchronous Receiver Transmitter (UART) */ - SMC_IRQn = 9, /**< 9 AT91SAM3U Static Memory Controller (SMC) */ - PIOA_IRQn = 10, /**< 10 AT91SAM3U Parallel I/O Controller A, (PIOA) */ - PIOB_IRQn = 11, /**< 11 AT91SAM3U Parallel I/O Controller B (PIOB) */ - PIOC_IRQn = 12, /**< 12 AT91SAM3U Parallel I/O Controller C (PIOC) */ - USART0_IRQn = 13, /**< 13 AT91SAM3U USART 0 (USART0) */ - USART1_IRQn = 14, /**< 14 AT91SAM3U USART 1 (USART1) */ - USART2_IRQn = 15, /**< 15 AT91SAM3U USART 2 (USART2) */ - USART3_IRQn = 16, /**< 16 AT91SAM3U USART 3 (USART3) */ - HSMCI_IRQn = 17, /**< 17 AT91SAM3U High Speed Multimedia Card Interface (HSMCI) */ - TWI0_IRQn = 18, /**< 18 AT91SAM3U Two-Wire Interface 0 (TWI0) */ - TWI1_IRQn = 19, /**< 19 AT91SAM3U Two-Wire Interface 1 (TWI1) */ - SPI_IRQn = 20, /**< 20 AT91SAM3U Serial Peripheral Interface (SPI) */ - SSC_IRQn = 21, /**< 21 AT91SAM3U Synchronous Serial Controller (SSC) */ - TC0_IRQn = 22, /**< 22 AT91SAM3U Timer Counter 0 (TC0) */ - TC1_IRQn = 23, /**< 23 AT91SAM3U Timer Counter 1 (TC1) */ - TC2_IRQn = 24, /**< 24 AT91SAM3U Timer Counter 2 (TC2) */ - PWM_IRQn = 25, /**< 25 AT91SAM3U Pulse Width Modulation Controller (PWM) */ - ADC12B_IRQn = 26, /**< 26 AT91SAM3U 12-bit ADC Controller (ADC12B) */ - ADC_IRQn = 27, /**< 27 AT91SAM3U 10-bit ADC Controller (ADC) */ - DMAC_IRQn = 28, /**< 28 AT91SAM3U DMA Controller (DMAC) */ - UDPHS_IRQn = 29, /**< 29 AT91SAM3U USB Device High Speed (UDPHS) */ -} IRQn_Type; -/*@}*/ - -/* ***************************************************************************** */ -/** SOFTWARE PERIPHERAL API DEFINITION FOR AT91SAM3U */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3U_api Peripheral Software API */ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Analog-to-digital Converter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_ADC12B Analog-to-digital Converter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Adc12b hardware registers */ -typedef struct { - WoReg ADC_CR; /**< \brief (Adc12b Offset: 0x00) Control Register */ - RwReg ADC_MR; /**< \brief (Adc12b Offset: 0x04) Mode Register */ - RwReg Reserved1[2]; - WoReg ADC_CHER; /**< \brief (Adc12b Offset: 0x10) Channel Enable Register */ - WoReg ADC_CHDR; /**< \brief (Adc12b Offset: 0x14) Channel Disable Register */ - RoReg ADC_CHSR; /**< \brief (Adc12b Offset: 0x18) Channel Status Register */ - RoReg ADC_SR; /**< \brief (Adc12b Offset: 0x1C) Status Register */ - RoReg ADC_LCDR; /**< \brief (Adc12b Offset: 0x20) Last Converted Data Register */ - WoReg ADC_IER; /**< \brief (Adc12b Offset: 0x24) Interrupt Enable Register */ - WoReg ADC_IDR; /**< \brief (Adc12b Offset: 0x28) Interrupt Disable Register */ - RoReg ADC_IMR; /**< \brief (Adc12b Offset: 0x2C) Interrupt Mask Register */ - RoReg ADC_CDR[8]; /**< \brief (Adc12b Offset: 0x30) Channel Data Register */ - RwReg Reserved2[5]; - RwReg ADC_ACR; /**< \brief (Adc12b Offset: 0x64) Analog Control Register */ - RwReg ADC_EMR; /**< \brief (Adc12b Offset: 0x68) Extended Mode Register */ - RwReg Reserved3[37]; - RwReg ADC_RPR; /**< \brief (Adc12b Offset: 0x100) Receive Pointer Register */ - RwReg ADC_RCR; /**< \brief (Adc12b Offset: 0x104) Receive Counter Register */ - RwReg ADC_TPR; /**< \brief (Adc12b Offset: 0x108) Transmit Pointer Register */ - RwReg ADC_TCR; /**< \brief (Adc12b Offset: 0x10C) Transmit Counter Register */ - RwReg ADC_RNPR; /**< \brief (Adc12b Offset: 0x110) Receive Next Pointer Register */ - RwReg ADC_RNCR; /**< \brief (Adc12b Offset: 0x114) Receive Next Counter Register */ - RwReg ADC_TNPR; /**< \brief (Adc12b Offset: 0x118) Transmit Next Pointer Register */ - RwReg ADC_TNCR; /**< \brief (Adc12b Offset: 0x11C) Transmit Next Counter Register */ - WoReg ADC_PTCR; /**< \brief (Adc12b Offset: 0x120) Transfer Control Register */ - RoReg ADC_PTSR; /**< \brief (Adc12b Offset: 0x124) Transfer Status Register */ -} Adc12b; -#endif /* __ASSEMBLY__ */ -/* -------- ADC_CR : (ADC12B Offset: 0x00) Control Register -------- */ -#define ADC_CR_SWRST (0x1 << 0) /**< \brief (ADC_CR) Software Reset */ -#define ADC_CR_START (0x1 << 1) /**< \brief (ADC_CR) Start Conversion */ -/* -------- ADC_MR : (ADC12B Offset: 0x04) Mode Register -------- */ -#define ADC_MR_TRGEN (0x1 << 0) /**< \brief (ADC_MR) Trigger Enable */ -#define ADC_MR_TRGSEL (0x7 << 1) /**< \brief (ADC_MR) Trigger Selection */ -#define ADC_MR_LOWRES (0x1 << 4) /**< \brief (ADC_MR) Resolution */ -#define ADC_MR_SLEEP (0x1 << 5) /**< \brief (ADC_MR) Sleep Mode */ -#define ADC_MR_PRESCAL (0xff << 8) /**< \brief (ADC_MR) Prescaler Rate Selection */ -#define ADC_MR_STARTUP (0xff << 16) /**< \brief (ADC_MR) Start Up Time */ -#define ADC_MR_SHTIM (0xf << 24) /**< \brief (ADC_MR) Sample & Hold Time */ -/* -------- ADC_CHER : (ADC12B Offset: 0x10) Channel Enable Register -------- */ -#define ADC_CHER_CH0 (0x1 << 0) /**< \brief (ADC_CHER) Channel 0 Enable */ -#define ADC_CHER_CH1 (0x1 << 1) /**< \brief (ADC_CHER) Channel 1 Enable */ -#define ADC_CHER_CH2 (0x1 << 2) /**< \brief (ADC_CHER) Channel 2 Enable */ -#define ADC_CHER_CH3 (0x1 << 3) /**< \brief (ADC_CHER) Channel 3 Enable */ -#define ADC_CHER_CH4 (0x1 << 4) /**< \brief (ADC_CHER) Channel 4 Enable */ -#define ADC_CHER_CH5 (0x1 << 5) /**< \brief (ADC_CHER) Channel 5 Enable */ -#define ADC_CHER_CH6 (0x1 << 6) /**< \brief (ADC_CHER) Channel 6 Enable */ -#define ADC_CHER_CH7 (0x1 << 7) /**< \brief (ADC_CHER) Channel 7 Enable */ -/* -------- ADC_CHDR : (ADC12B Offset: 0x14) Channel Disable Register -------- */ -#define ADC_CHDR_CH0 (0x1 << 0) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH1 (0x1 << 1) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH2 (0x1 << 2) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH3 (0x1 << 3) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH4 (0x1 << 4) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH5 (0x1 << 5) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH6 (0x1 << 6) /**< \brief (ADC_CHDR) */ -#define ADC_CHDR_CH7 (0x1 << 7) /**< \brief (ADC_CHDR) */ -/* -------- ADC_CHSR : (ADC12B Offset: 0x18) Channel Status Register -------- */ -#define ADC_CHSR_CH0 (0x1 << 0) /**< \brief (ADC_CHSR) Channel 0 Status */ -#define ADC_CHSR_CH1 (0x1 << 1) /**< \brief (ADC_CHSR) Channel 1 Status */ -#define ADC_CHSR_CH2 (0x1 << 2) /**< \brief (ADC_CHSR) Channel 2 Status */ -#define ADC_CHSR_CH3 (0x1 << 3) /**< \brief (ADC_CHSR) Channel 3 Status */ -#define ADC_CHSR_CH4 (0x1 << 4) /**< \brief (ADC_CHSR) Channel 4 Status */ -#define ADC_CHSR_CH5 (0x1 << 5) /**< \brief (ADC_CHSR) Channel 5 Status */ -#define ADC_CHSR_CH6 (0x1 << 6) /**< \brief (ADC_CHSR) Channel 6 Status */ -#define ADC_CHSR_CH7 (0x1 << 7) /**< \brief (ADC_CHSR) Channel 7 Status */ -/* -------- ADC_SR : (ADC12B Offset: 0x1C) Status Register -------- */ -#define ADC_SR_EOC0 (0x1 << 0) /**< \brief (ADC_SR) End of Conversion 0 */ -#define ADC_SR_EOC1 (0x1 << 1) /**< \brief (ADC_SR) End of Conversion 1 */ -#define ADC_SR_EOC2 (0x1 << 2) /**< \brief (ADC_SR) End of Conversion 2 */ -#define ADC_SR_EOC3 (0x1 << 3) /**< \brief (ADC_SR) End of Conversion 3 */ -#define ADC_SR_EOC4 (0x1 << 4) /**< \brief (ADC_SR) End of Conversion 4 */ -#define ADC_SR_EOC5 (0x1 << 5) /**< \brief (ADC_SR) End of Conversion 5 */ -#define ADC_SR_EOC6 (0x1 << 6) /**< \brief (ADC_SR) End of Conversion 6 */ -#define ADC_SR_EOC7 (0x1 << 7) /**< \brief (ADC_SR) End of Conversion 7 */ -#define ADC_SR_OVRE0 (0x1 << 8) /**< \brief (ADC_SR) Overrun Error 0 */ -#define ADC_SR_OVRE1 (0x1 << 9) /**< \brief (ADC_SR) Overrun Error 1 */ -#define ADC_SR_OVRE2 (0x1 << 10) /**< \brief (ADC_SR) Overrun Error 2 */ -#define ADC_SR_OVRE3 (0x1 << 11) /**< \brief (ADC_SR) Overrun Error 3 */ -#define ADC_SR_OVRE4 (0x1 << 12) /**< \brief (ADC_SR) Overrun Error 4 */ -#define ADC_SR_OVRE5 (0x1 << 13) /**< \brief (ADC_SR) Overrun Error 5 */ -#define ADC_SR_OVRE6 (0x1 << 14) /**< \brief (ADC_SR) Overrun Error 6 */ -#define ADC_SR_OVRE7 (0x1 << 15) /**< \brief (ADC_SR) Overrun Error 7 */ -#define ADC_SR_DRDY (0x1 << 16) /**< \brief (ADC_SR) Data Ready */ -#define ADC_SR_GOVRE (0x1 << 17) /**< \brief (ADC_SR) General Overrun Error */ -#define ADC_SR_ENDRX (0x1 << 18) /**< \brief (ADC_SR) End of RX Buffer */ -#define ADC_SR_RXBUFF (0x1 << 19) /**< \brief (ADC_SR) RX Buffer Full */ -/* -------- ADC_LCDR : (ADC12B Offset: 0x20) Last Converted Data Register -------- */ -#define ADC_LCDR_LDATA (0xfff << 0) /**< \brief (ADC_LCDR) Last Data Converted */ -/* -------- ADC_IER : (ADC12B Offset: 0x24) Interrupt Enable Register -------- */ -#define ADC_IER_EOC0 (0x1 << 0) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 0 */ -#define ADC_IER_EOC1 (0x1 << 1) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 1 */ -#define ADC_IER_EOC2 (0x1 << 2) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 2 */ -#define ADC_IER_EOC3 (0x1 << 3) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 3 */ -#define ADC_IER_EOC4 (0x1 << 4) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 4 */ -#define ADC_IER_EOC5 (0x1 << 5) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 5 */ -#define ADC_IER_EOC6 (0x1 << 6) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 6 */ -#define ADC_IER_EOC7 (0x1 << 7) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 7 */ -#define ADC_IER_OVRE0 (0x1 << 8) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 0 */ -#define ADC_IER_OVRE1 (0x1 << 9) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 1 */ -#define ADC_IER_OVRE2 (0x1 << 10) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 2 */ -#define ADC_IER_OVRE3 (0x1 << 11) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 3 */ -#define ADC_IER_OVRE4 (0x1 << 12) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 4 */ -#define ADC_IER_OVRE5 (0x1 << 13) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 5 */ -#define ADC_IER_OVRE6 (0x1 << 14) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 6 */ -#define ADC_IER_OVRE7 (0x1 << 15) /**< \brief (ADC_IER) Overrun Error Interrupt Enable 7 */ -#define ADC_IER_DRDY (0x1 << 16) /**< \brief (ADC_IER) Data Ready Interrupt Enable */ -#define ADC_IER_GOVRE (0x1 << 17) /**< \brief (ADC_IER) General Overrun Error Interrupt Enable */ -#define ADC_IER_ENDRX (0x1 << 18) /**< \brief (ADC_IER) End of Receive Buffer Interrupt Enable */ -#define ADC_IER_RXBUFF (0x1 << 19) /**< \brief (ADC_IER) Receive Buffer Full Interrupt Enable */ -/* -------- ADC_IDR : (ADC12B Offset: 0x28) Interrupt Disable Register -------- */ -#define ADC_IDR_EOC0 (0x1 << 0) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 0 */ -#define ADC_IDR_EOC1 (0x1 << 1) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 1 */ -#define ADC_IDR_EOC2 (0x1 << 2) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 2 */ -#define ADC_IDR_EOC3 (0x1 << 3) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 3 */ -#define ADC_IDR_EOC4 (0x1 << 4) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 4 */ -#define ADC_IDR_EOC5 (0x1 << 5) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 5 */ -#define ADC_IDR_EOC6 (0x1 << 6) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 6 */ -#define ADC_IDR_EOC7 (0x1 << 7) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 7 */ -#define ADC_IDR_OVRE0 (0x1 << 8) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 0 */ -#define ADC_IDR_OVRE1 (0x1 << 9) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 1 */ -#define ADC_IDR_OVRE2 (0x1 << 10) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 2 */ -#define ADC_IDR_OVRE3 (0x1 << 11) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 3 */ -#define ADC_IDR_OVRE4 (0x1 << 12) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 4 */ -#define ADC_IDR_OVRE5 (0x1 << 13) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 5 */ -#define ADC_IDR_OVRE6 (0x1 << 14) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 6 */ -#define ADC_IDR_OVRE7 (0x1 << 15) /**< \brief (ADC_IDR) Overrun Error Interrupt Disable 7 */ -#define ADC_IDR_DRDY (0x1 << 16) /**< \brief (ADC_IDR) Data Ready Interrupt Disable */ -#define ADC_IDR_GOVRE (0x1 << 17) /**< \brief (ADC_IDR) General Overrun Error Interrupt Disable */ -#define ADC_IDR_ENDRX (0x1 << 18) /**< \brief (ADC_IDR) End of Receive Buffer Interrupt Disable */ -#define ADC_IDR_RXBUFF (0x1 << 19) /**< \brief (ADC_IDR) Receive Buffer Full Interrupt Disable */ -/* -------- ADC_IMR : (ADC12B Offset: 0x2C) Interrupt Mask Register -------- */ -#define ADC_IMR_EOC0 (0x1 << 0) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 0 */ -#define ADC_IMR_EOC1 (0x1 << 1) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 1 */ -#define ADC_IMR_EOC2 (0x1 << 2) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 2 */ -#define ADC_IMR_EOC3 (0x1 << 3) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 3 */ -#define ADC_IMR_EOC4 (0x1 << 4) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 4 */ -#define ADC_IMR_EOC5 (0x1 << 5) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 5 */ -#define ADC_IMR_EOC6 (0x1 << 6) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 6 */ -#define ADC_IMR_EOC7 (0x1 << 7) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 7 */ -#define ADC_IMR_OVRE0 (0x1 << 8) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 0 */ -#define ADC_IMR_OVRE1 (0x1 << 9) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 1 */ -#define ADC_IMR_OVRE2 (0x1 << 10) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 2 */ -#define ADC_IMR_OVRE3 (0x1 << 11) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 3 */ -#define ADC_IMR_OVRE4 (0x1 << 12) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 4 */ -#define ADC_IMR_OVRE5 (0x1 << 13) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 5 */ -#define ADC_IMR_OVRE6 (0x1 << 14) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 6 */ -#define ADC_IMR_OVRE7 (0x1 << 15) /**< \brief (ADC_IMR) Overrun Error Interrupt Mask 7 */ -#define ADC_IMR_DRDY (0x1 << 16) /**< \brief (ADC_IMR) Data Ready Interrupt Mask */ -#define ADC_IMR_GOVRE (0x1 << 17) /**< \brief (ADC_IMR) General Overrun Error Interrupt Mask */ -#define ADC_IMR_ENDRX (0x1 << 18) /**< \brief (ADC_IMR) End of Receive Buffer Interrupt Mask */ -#define ADC_IMR_RXBUFF (0x1 << 19) /**< \brief (ADC_IMR) Receive Buffer Full Interrupt Mask */ -/* -------- ADC_CDR[8] : (ADC12B Offset: 0x30) Channel Data Register -------- */ -#define ADC_CDR_DATA (0xfff << 0) /**< \brief (ADC_CDR[8]) Converted Data */ -/* -------- ADC_ACR : (ADC12B Offset: 0x64) Analog Control Register -------- */ -#define ADC_ACR_GAIN (0x3 << 0) /**< \brief (ADC_ACR) Input Gain */ -#define ADC_ACR_IBCTL (0x3 << 6) /**< \brief (ADC_ACR) Bias Current Control */ -#define ADC_ACR_DIFF (0x1 << 16) /**< \brief (ADC_ACR) Differential Mode */ -#define ADC_ACR_OFFSET (0x1 << 17) /**< \brief (ADC_ACR) Input OFFSET */ -/* -------- ADC_EMR : (ADC12B Offset: 0x68) Extended Mode Register -------- */ -#define ADC_EMR_OFFMODES (0x1 << 0) /**< \brief (ADC_EMR) Off Mode if Sleep Bit (ADC_MR) = 1 */ -#define ADC_EMR_OFF_MODE_STARTUP_TIME (0xff << 16) /**< \brief (ADC_EMR) Startup Time */ -/* -------- ADC_RPR : (ADC12B Offset: 0x100) Receive Pointer Register -------- */ -#define ADC_RPR_RXPTR (0xffffffff << 0) /**< \brief (ADC_RPR) Receive Pointer Register */ -/* -------- ADC_RCR : (ADC12B Offset: 0x104) Receive Counter Register -------- */ -#define ADC_RCR_RXCTR (0xffff << 0) /**< \brief (ADC_RCR) Receive Counter Register */ -/* -------- ADC_TPR : (ADC12B Offset: 0x108) Transmit Pointer Register -------- */ -#define ADC_TPR_TXPTR (0xffffffff << 0) /**< \brief (ADC_TPR) Transmit Counter Register */ -/* -------- ADC_TCR : (ADC12B Offset: 0x10C) Transmit Counter Register -------- */ -#define ADC_TCR_TXCTR (0xffff << 0) /**< \brief (ADC_TCR) Transmit Counter Register */ -/* -------- ADC_RNPR : (ADC12B Offset: 0x110) Receive Next Pointer Register -------- */ -#define ADC_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (ADC_RNPR) Receive Next Pointer */ -/* -------- ADC_RNCR : (ADC12B Offset: 0x114) Receive Next Counter Register -------- */ -#define ADC_RNCR_RXNCTR (0xffff << 0) /**< \brief (ADC_RNCR) Receive Next Counter */ -/* -------- ADC_TNPR : (ADC12B Offset: 0x118) Transmit Next Pointer Register -------- */ -#define ADC_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (ADC_TNPR) Transmit Next Pointer */ -/* -------- ADC_TNCR : (ADC12B Offset: 0x11C) Transmit Next Counter Register -------- */ -#define ADC_TNCR_TXNCTR (0xffff << 0) /**< \brief (ADC_TNCR) Transmit Counter Next */ -/* -------- ADC_PTCR : (ADC12B Offset: 0x120) Transfer Control Register -------- */ -#define ADC_PTCR_RXTEN (0x1 << 0) /**< \brief (ADC_PTCR) Receiver Transfer Enable */ -#define ADC_PTCR_RXTDIS (0x1 << 1) /**< \brief (ADC_PTCR) Receiver Transfer Disable */ -#define ADC_PTCR_TXTEN (0x1 << 8) /**< \brief (ADC_PTCR) Transmitter Transfer Enable */ -#define ADC_PTCR_TXTDIS (0x1 << 9) /**< \brief (ADC_PTCR) Transmitter Transfer Disable */ -/* -------- ADC_PTSR : (ADC12B Offset: 0x124) Transfer Status Register -------- */ -#define ADC_PTSR_RXTEN (0x1 << 0) /**< \brief (ADC_PTSR) Receiver Transfer Enable */ -#define ADC_PTSR_TXTEN (0x1 << 8) /**< \brief (ADC_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Chip Identifier */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_CHIPID Chip Identifier */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Chipid hardware registers */ -typedef struct { - RoReg CHIPID_CIDR; /**< \brief (Chipid Offset: 0x0) Chip ID Register */ - RoReg CHIPID_EXID; /**< \brief (Chipid Offset: 0x4) Chip ID Extension Register */ -} Chipid; -#endif /* __ASSEMBLY__ */ -/* -------- CHIPID_CIDR : (CHIPID Offset: 0x0) Chip ID Register -------- */ -#define CHIPID_CIDR_VERSION (0x1f << 0) /**< \brief (CHIPID_CIDR) Version of the Device */ -#define CHIPID_CIDR_EPROC (0x7 << 5) /**< \brief (CHIPID_CIDR) Embedded Processor */ -#define CHIPID_CIDR_NVPSIZ (0xf << 8) /**< \brief (CHIPID_CIDR) Nonvolatile Program Memory Size */ -#define CHIPID_CIDR_NVPSIZ2 (0xf << 12) /**< \brief (CHIPID_CIDR) */ -#define CHIPID_CIDR_SRAMSIZ (0xf << 16) /**< \brief (CHIPID_CIDR) Internal SRAM Size */ -#define CHIPID_CIDR_ARCH (0xff << 20) /**< \brief (CHIPID_CIDR) Architecture Identifier */ -#define CHIPID_CIDR_NVPTYP (0x7 << 28) /**< \brief (CHIPID_CIDR) Nonvolatile Program Memory Type */ -#define CHIPID_CIDR_EXT (0x1 << 31) /**< \brief (CHIPID_CIDR) Extension Flag */ -/* -------- CHIPID_EXID : (CHIPID Offset: 0x4) Chip ID Extension Register -------- */ -#define CHIPID_EXID_EXID (0xffffffff << 0) /**< \brief (CHIPID_EXID) Chip ID Extension */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR DMA Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_DMAC DMA Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief DmacCh_num hardware registers */ -typedef struct { - RwReg DMAC_SADDR; /**< \brief (DmacCh_num Offset: 0x0) DMAC Channel Source Address Register */ - RwReg DMAC_DADDR; /**< \brief (DmacCh_num Offset: 0x4) DMAC Channel Destination Address Register */ - RwReg DMAC_DSCR; /**< \brief (DmacCh_num Offset: 0x8) DMAC Channel Descriptor Address Register */ - RwReg DMAC_CTRLA; /**< \brief (DmacCh_num Offset: 0xC) DMAC Channel Control A Register */ - RwReg DMAC_CTRLB; /**< \brief (DmacCh_num Offset: 0x10) DMAC Channel Control B Register */ - RwReg DMAC_CFG; /**< \brief (DmacCh_num Offset: 0x14) DMAC Channel Configuration Register */ - RwReg Reserved1[4]; -} DmacCh_num; -/** \brief Dmac hardware registers */ -typedef struct { - RwReg DMAC_GCFG; /**< \brief (Dmac Offset: 0x000) DMAC Global Configuration Register */ - RwReg DMAC_EN; /**< \brief (Dmac Offset: 0x004) DMAC Enable Register */ - RwReg DMAC_SREQ; /**< \brief (Dmac Offset: 0x008) DMAC Software Single Request Register */ - RwReg DMAC_CREQ; /**< \brief (Dmac Offset: 0x00C) DMAC Software Chunk Transfer Request Register */ - RwReg DMAC_LAST; /**< \brief (Dmac Offset: 0x010) DMAC Software Last Transfer Flag Register */ - RwReg Reserved1[1]; - WoReg DMAC_EBCIER; /**< \brief (Dmac Offset: 0x018) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Enable register. */ - WoReg DMAC_EBCIDR; /**< \brief (Dmac Offset: 0x01C) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Disable register. */ - RoReg DMAC_EBCIMR; /**< \brief (Dmac Offset: 0x020) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Mask Register. */ - RoReg DMAC_EBCISR; /**< \brief (Dmac Offset: 0x024) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Status Register. */ - WoReg DMAC_CHER; /**< \brief (Dmac Offset: 0x028) DMAC Channel Handler Enable Register */ - WoReg DMAC_CHDR; /**< \brief (Dmac Offset: 0x02C) DMAC Channel Handler Disable Register */ - RoReg DMAC_CHSR; /**< \brief (Dmac Offset: 0x030) DMAC Channel Handler Status Register */ - RwReg Reserved2[2]; - DmacCh_num DMAC_CH_NUM[4]; /**< \brief (Dmac Offset: 0x3C) ch_num = 0 .. 3 */ -} Dmac; -#endif /* __ASSEMBLY__ */ -/* -------- DMAC_GCFG : (DMAC Offset: 0x000) DMAC Global Configuration Register -------- */ -#define DMAC_GCFG_ARB_CFG (0x1 << 4) /**< \brief (DMAC_GCFG) */ -/* -------- DMAC_EN : (DMAC Offset: 0x004) DMAC Enable Register -------- */ -#define DMAC_EN_ENABLE (0x1 << 0) /**< \brief (DMAC_EN) */ -/* -------- DMAC_SREQ : (DMAC Offset: 0x008) DMAC Software Single Request Register -------- */ -#define DMAC_SREQ_SSREQ0 (0x1 << 0) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_DSREQ0 (0x1 << 1) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_SSREQ1 (0x1 << 2) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_DSREQ1 (0x1 << 3) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_SSREQ2_ (0x1 << 4) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_DSREQ2_ (0x1 << 5) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_SSREQ3 (0x1 << 6) /**< \brief (DMAC_SREQ) */ -#define DMAC_SREQ_DSREQ3 (0x1 << 7) /**< \brief (DMAC_SREQ) */ -/* -------- DMAC_CREQ : (DMAC Offset: 0x00C) DMAC Software Chunk Transfer Request Register -------- */ -#define DMAC_CREQ_SCREQ0 (0x1 << 0) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_DCREQ0 (0x1 << 1) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_SCREQ1 (0x1 << 2) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_DCREQ1 (0x1 << 3) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_SCREQ2_ (0x1 << 4) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_DCREQ2_ (0x1 << 5) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_SCREQ3 (0x1 << 6) /**< \brief (DMAC_CREQ) */ -#define DMAC_CREQ_DCREQ3 (0x1 << 7) /**< \brief (DMAC_CREQ) */ -/* -------- DMAC_LAST : (DMAC Offset: 0x010) DMAC Software Last Transfer Flag Register -------- */ -#define DMAC_LAST_SLAST0 (0x1 << 0) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_DLAST0 (0x1 << 1) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_SLAST1 (0x1 << 2) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_DLAST1 (0x1 << 3) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_SLAST2 (0x1 << 4) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_DLAST2 (0x1 << 5) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_SLAST3 (0x1 << 6) /**< \brief (DMAC_LAST) */ -#define DMAC_LAST_DLAST3 (0x1 << 7) /**< \brief (DMAC_LAST) */ -/* -------- DMAC_EBCIER : (DMAC Offset: 0x018) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Enable register. -------- */ -#define DMAC_EBCIER_BTC0 (0x1 << 0) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_BTC1 (0x1 << 1) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_BTC2 (0x1 << 2) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_BTC3 (0x1 << 3) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_CBTC0 (0x1 << 8) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_CBTC1 (0x1 << 9) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_CBTC2 (0x1 << 10) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_CBTC3 (0x1 << 11) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_ERR0 (0x1 << 16) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_ERR1 (0x1 << 17) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_ERR2 (0x1 << 18) /**< \brief (DMAC_EBCIER) */ -#define DMAC_EBCIER_ERR3 (0x1 << 19) /**< \brief (DMAC_EBCIER) */ -/* -------- DMAC_EBCIDR : (DMAC Offset: 0x01C) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Disable register. -------- */ -#define DMAC_EBCIDR_BTC0 (0x1 << 0) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_BTC1 (0x1 << 1) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_BTC2 (0x1 << 2) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_BTC3 (0x1 << 3) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_CBTC0 (0x1 << 8) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_CBTC1 (0x1 << 9) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_CBTC2 (0x1 << 10) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_CBTC3 (0x1 << 11) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_ERR0 (0x1 << 16) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_ERR1 (0x1 << 17) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_ERR2 (0x1 << 18) /**< \brief (DMAC_EBCIDR) */ -#define DMAC_EBCIDR_ERR3 (0x1 << 19) /**< \brief (DMAC_EBCIDR) */ -/* -------- DMAC_EBCIMR : (DMAC Offset: 0x020) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Mask Register. -------- */ -#define DMAC_EBCIMR_BTC0 (0x1 << 0) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_BTC1 (0x1 << 1) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_BTC2 (0x1 << 2) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_BTC3 (0x1 << 3) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_CBTC0 (0x1 << 8) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_CBTC1 (0x1 << 9) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_CBTC2 (0x1 << 10) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_CBTC3 (0x1 << 11) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_ERR0 (0x1 << 16) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_ERR1 (0x1 << 17) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_ERR2 (0x1 << 18) /**< \brief (DMAC_EBCIMR) */ -#define DMAC_EBCIMR_ERR3 (0x1 << 19) /**< \brief (DMAC_EBCIMR) */ -/* -------- DMAC_EBCISR : (DMAC Offset: 0x024) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Status Register. -------- */ -#define DMAC_EBCISR_BTC0 (0x1 << 0) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_BTC1 (0x1 << 1) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_BTC2 (0x1 << 2) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_BTC3 (0x1 << 3) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_CBTC0 (0x1 << 8) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_CBTC1 (0x1 << 9) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_CBTC2 (0x1 << 10) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_CBTC3 (0x1 << 11) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_ERR0 (0x1 << 16) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_ERR1 (0x1 << 17) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_ERR2 (0x1 << 18) /**< \brief (DMAC_EBCISR) */ -#define DMAC_EBCISR_ERR3 (0x1 << 19) /**< \brief (DMAC_EBCISR) */ -/* -------- DMAC_CHER : (DMAC Offset: 0x028) DMAC Channel Handler Enable Register -------- */ -#define DMAC_CHER_ENA0 (0x1 << 0) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_ENA1 (0x1 << 1) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_ENA2 (0x1 << 2) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_ENA3 (0x1 << 3) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_SUSP0 (0x1 << 8) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_SUSP1 (0x1 << 9) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_SUSP2 (0x1 << 10) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_SUSP3 (0x1 << 11) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_KEEP0 (0x1 << 24) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_KEEP1 (0x1 << 25) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_KEEP2 (0x1 << 26) /**< \brief (DMAC_CHER) */ -#define DMAC_CHER_KEEP3 (0x1 << 27) /**< \brief (DMAC_CHER) */ -/* -------- DMAC_CHDR : (DMAC Offset: 0x02C) DMAC Channel Handler Disable Register -------- */ -#define DMAC_CHDR_DIS0 (0x1 << 0) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_DIS1 (0x1 << 1) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_DIS2 (0x1 << 2) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_DIS3 (0x1 << 3) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_RES0 (0x1 << 8) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_RES1 (0x1 << 9) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_RES2 (0x1 << 10) /**< \brief (DMAC_CHDR) */ -#define DMAC_CHDR_RES3 (0x1 << 11) /**< \brief (DMAC_CHDR) */ -/* -------- DMAC_CHSR : (DMAC Offset: 0x030) DMAC Channel Handler Status Register -------- */ -#define DMAC_CHSR_ENA0 (0x1 << 0) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_ENA1 (0x1 << 1) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_ENA2 (0x1 << 2) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_ENA3 (0x1 << 3) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_SUSP0 (0x1 << 8) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_SUSP1 (0x1 << 9) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_SUSP2 (0x1 << 10) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_SUSP3 (0x1 << 11) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_EMPT0 (0x1 << 16) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_EMPT1 (0x1 << 17) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_EMPT2 (0x1 << 18) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_EMPT3 (0x1 << 19) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_STAL0 (0x1 << 24) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_STAL1 (0x1 << 25) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_STAL2 (0x1 << 26) /**< \brief (DMAC_CHSR) */ -#define DMAC_CHSR_STAL3 (0x1 << 27) /**< \brief (DMAC_CHSR) */ -/* -------- DMAC_SADDR0 : (DMAC Offset: 0x3C) DMAC Channel Source Address Register (ch_num = 0) -------- */ -#define DMAC_SADDR0_SADDRx (0xffffffff << 0) /**< \brief (DMAC_SADDR0) */ -/* -------- DMAC_DADDR0 : (DMAC Offset: 0x40) DMAC Channel Destination Address Register (ch_num = 0) -------- */ -#define DMAC_DADDR0_DADDRx (0xffffffff << 0) /**< \brief (DMAC_DADDR0) */ -/* -------- DMAC_DSCR0 : (DMAC Offset: 0x44) DMAC Channel Descriptor Address Register (ch_num = 0) -------- */ -#define DMAC_DSCR0_DSCRx (0x3fffffff << 2) /**< \brief (DMAC_DSCR0) */ -/* -------- DMAC_CTRLA0 : (DMAC Offset: 0x48) DMAC Channel Control A Register (ch_num = 0) -------- */ -#define DMAC_CTRLA0_BTSIZE (0xfff << 0) /**< \brief (DMAC_CTRLA0) */ -#define DMAC_CTRLA0_SCSIZE (0x1 << 16) /**< \brief (DMAC_CTRLA0) */ -#define DMAC_CTRLA0_DCSIZE (0x1 << 20) /**< \brief (DMAC_CTRLA0) */ -#define DMAC_CTRLA0_SRC_WIDTH (0x3 << 24) /**< \brief (DMAC_CTRLA0) */ -#define DMAC_CTRLA0_DST_WIDTH (0x3 << 28) /**< \brief (DMAC_CTRLA0) */ -#define DMAC_CTRLA0_DONE (0x1 << 31) /**< \brief (DMAC_CTRLA0) */ -/* -------- DMAC_CTRLB0 : (DMAC Offset: 0x4C) DMAC Channel Control B Register (ch_num = 0) -------- */ -#define DMAC_CTRLB0_SRC_DSCR (0x1 << 16) /**< \brief (DMAC_CTRLB0) */ -#define DMAC_CTRLB0_DST_DSCR (0x1 << 20) /**< \brief (DMAC_CTRLB0) */ -#define DMAC_CTRLB0_FC (0x3 << 21) /**< \brief (DMAC_CTRLB0) */ -#define DMAC_CTRLB0_SRC_INCR (0x3 << 24) /**< \brief (DMAC_CTRLB0) */ -#define DMAC_CTRLB0_DST_INCR (0x3 << 28) /**< \brief (DMAC_CTRLB0) */ -#define DMAC_CTRLB0_IEN (0x1 << 30) /**< \brief (DMAC_CTRLB0) */ -/* -------- DMAC_CFG0 : (DMAC Offset: 0x50) DMAC Channel Configuration Register (ch_num = 0) -------- */ -#define DMAC_CFG0_SRC_PER (0xf << 0) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_DST_PER (0xf << 4) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_SRC_H2SEL (0x1 << 9) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_DST_H2SEL (0x1 << 13) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_SOD (0x1 << 16) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_LOCK_IF (0x1 << 20) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_LOCK_B (0x1 << 21) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_LOCK_IF_L (0x1 << 22) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_AHB_PROT (0x7 << 24) /**< \brief (DMAC_CFG0) */ -#define DMAC_CFG0_FIFOCFG (0x3 << 28) /**< \brief (DMAC_CFG0) */ -/* -------- DMAC_SADDR1 : (DMAC Offset: 0x64) DMAC Channel Source Address Register (ch_num = 1) -------- */ -#define DMAC_SADDR1_SADDRx (0xffffffff << 0) /**< \brief (DMAC_SADDR1) */ -/* -------- DMAC_DADDR1 : (DMAC Offset: 0x68) DMAC Channel Destination Address Register (ch_num = 1) -------- */ -#define DMAC_DADDR1_DADDRx (0xffffffff << 0) /**< \brief (DMAC_DADDR1) */ -/* -------- DMAC_DSCR1 : (DMAC Offset: 0x6C) DMAC Channel Descriptor Address Register (ch_num = 1) -------- */ -#define DMAC_DSCR1_DSCRx (0x3fffffff << 2) /**< \brief (DMAC_DSCR1) */ -/* -------- DMAC_CTRLA1 : (DMAC Offset: 0x70) DMAC Channel Control A Register (ch_num = 1) -------- */ -#define DMAC_CTRLA1_BTSIZE (0xfff << 0) /**< \brief (DMAC_CTRLA1) */ -#define DMAC_CTRLA1_SCSIZE (0x1 << 16) /**< \brief (DMAC_CTRLA1) */ -#define DMAC_CTRLA1_DCSIZE (0x1 << 20) /**< \brief (DMAC_CTRLA1) */ -#define DMAC_CTRLA1_SRC_WIDTH (0x3 << 24) /**< \brief (DMAC_CTRLA1) */ -#define DMAC_CTRLA1_DST_WIDTH (0x3 << 28) /**< \brief (DMAC_CTRLA1) */ -#define DMAC_CTRLA1_DONE (0x1 << 31) /**< \brief (DMAC_CTRLA1) */ -/* -------- DMAC_CTRLB1 : (DMAC Offset: 0x74) DMAC Channel Control B Register (ch_num = 1) -------- */ -#define DMAC_CTRLB1_SRC_DSCR (0x1 << 16) /**< \brief (DMAC_CTRLB1) */ -#define DMAC_CTRLB1_DST_DSCR (0x1 << 20) /**< \brief (DMAC_CTRLB1) */ -#define DMAC_CTRLB1_FC (0x3 << 21) /**< \brief (DMAC_CTRLB1) */ -#define DMAC_CTRLB1_SRC_INCR (0x3 << 24) /**< \brief (DMAC_CTRLB1) */ -#define DMAC_CTRLB1_DST_INCR (0x3 << 28) /**< \brief (DMAC_CTRLB1) */ -#define DMAC_CTRLB1_IEN (0x1 << 30) /**< \brief (DMAC_CTRLB1) */ -/* -------- DMAC_CFG1 : (DMAC Offset: 0x78) DMAC Channel Configuration Register (ch_num = 1) -------- */ -#define DMAC_CFG1_SRC_PER (0xf << 0) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_DST_PER (0xf << 4) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_SRC_H2SEL (0x1 << 9) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_DST_H2SEL (0x1 << 13) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_SOD (0x1 << 16) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_LOCK_IF (0x1 << 20) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_LOCK_B (0x1 << 21) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_LOCK_IF_L (0x1 << 22) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_AHB_PROT (0x7 << 24) /**< \brief (DMAC_CFG1) */ -#define DMAC_CFG1_FIFOCFG (0x3 << 28) /**< \brief (DMAC_CFG1) */ -/* -------- DMAC_SADDR2 : (DMAC Offset: 0x8C) DMAC Channel Source Address Register (ch_num = 2) -------- */ -#define DMAC_SADDR2_SADDRx (0xffffffff << 0) /**< \brief (DMAC_SADDR2) */ -/* -------- DMAC_DADDR2 : (DMAC Offset: 0x90) DMAC Channel Destination Address Register (ch_num = 2) -------- */ -#define DMAC_DADDR2_DADDRx (0xffffffff << 0) /**< \brief (DMAC_DADDR2) */ -/* -------- DMAC_DSCR2 : (DMAC Offset: 0x94) DMAC Channel Descriptor Address Register (ch_num = 2) -------- */ -#define DMAC_DSCR2_DSCRx (0x3fffffff << 2) /**< \brief (DMAC_DSCR2) */ -/* -------- DMAC_CTRLA2 : (DMAC Offset: 0x98) DMAC Channel Control A Register (ch_num = 2) -------- */ -#define DMAC_CTRLA2_BTSIZE (0xfff << 0) /**< \brief (DMAC_CTRLA2) */ -#define DMAC_CTRLA2_SCSIZE (0x1 << 16) /**< \brief (DMAC_CTRLA2) */ -#define DMAC_CTRLA2_DCSIZE (0x1 << 20) /**< \brief (DMAC_CTRLA2) */ -#define DMAC_CTRLA2_SRC_WIDTH (0x3 << 24) /**< \brief (DMAC_CTRLA2) */ -#define DMAC_CTRLA2_DST_WIDTH (0x3 << 28) /**< \brief (DMAC_CTRLA2) */ -#define DMAC_CTRLA2_DONE (0x1 << 31) /**< \brief (DMAC_CTRLA2) */ -/* -------- DMAC_CTRLB2 : (DMAC Offset: 0x9C) DMAC Channel Control B Register (ch_num = 2) -------- */ -#define DMAC_CTRLB2_SRC_DSCR (0x1 << 16) /**< \brief (DMAC_CTRLB2) */ -#define DMAC_CTRLB2_DST_DSCR (0x1 << 20) /**< \brief (DMAC_CTRLB2) */ -#define DMAC_CTRLB2_FC (0x3 << 21) /**< \brief (DMAC_CTRLB2) */ -#define DMAC_CTRLB2_SRC_INCR (0x3 << 24) /**< \brief (DMAC_CTRLB2) */ -#define DMAC_CTRLB2_DST_INCR (0x3 << 28) /**< \brief (DMAC_CTRLB2) */ -#define DMAC_CTRLB2_IEN (0x1 << 30) /**< \brief (DMAC_CTRLB2) */ -/* -------- DMAC_CFG2 : (DMAC Offset: 0xA0) DMAC Channel Configuration Register (ch_num = 2) -------- */ -#define DMAC_CFG2_SRC_PER (0xf << 0) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_DST_PER (0xf << 4) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_SRC_H2SEL (0x1 << 9) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_DST_H2SEL (0x1 << 13) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_SOD (0x1 << 16) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_LOCK_IF (0x1 << 20) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_LOCK_B (0x1 << 21) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_LOCK_IF_L (0x1 << 22) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_AHB_PROT (0x7 << 24) /**< \brief (DMAC_CFG2) */ -#define DMAC_CFG2_FIFOCFG (0x3 << 28) /**< \brief (DMAC_CFG2) */ -/* -------- DMAC_SADDR3 : (DMAC Offset: 0xB4) DMAC Channel Source Address Register (ch_num = 3) -------- */ -#define DMAC_SADDR3_SADDRx (0xffffffff << 0) /**< \brief (DMAC_SADDR3) */ -/* -------- DMAC_DADDR3 : (DMAC Offset: 0xB8) DMAC Channel Destination Address Register (ch_num = 3) -------- */ -#define DMAC_DADDR3_DADDRx (0xffffffff << 0) /**< \brief (DMAC_DADDR3) */ -/* -------- DMAC_DSCR3 : (DMAC Offset: 0xBC) DMAC Channel Descriptor Address Register (ch_num = 3) -------- */ -#define DMAC_DSCR3_DSCRx (0x3fffffff << 2) /**< \brief (DMAC_DSCR3) */ -/* -------- DMAC_CTRLA3 : (DMAC Offset: 0xC0) DMAC Channel Control A Register (ch_num = 3) -------- */ -#define DMAC_CTRLA3_BTSIZE (0xfff << 0) /**< \brief (DMAC_CTRLA3) */ -#define DMAC_CTRLA3_SCSIZE (0x1 << 16) /**< \brief (DMAC_CTRLA3) */ -#define DMAC_CTRLA3_DCSIZE (0x1 << 20) /**< \brief (DMAC_CTRLA3) */ -#define DMAC_CTRLA3_SRC_WIDTH (0x3 << 24) /**< \brief (DMAC_CTRLA3) */ -#define DMAC_CTRLA3_DST_WIDTH (0x3 << 28) /**< \brief (DMAC_CTRLA3) */ -#define DMAC_CTRLA3_DONE (0x1 << 31) /**< \brief (DMAC_CTRLA3) */ -/* -------- DMAC_CTRLB3 : (DMAC Offset: 0xC4) DMAC Channel Control B Register (ch_num = 3) -------- */ -#define DMAC_CTRLB3_SRC_DSCR (0x1 << 16) /**< \brief (DMAC_CTRLB3) */ -#define DMAC_CTRLB3_DST_DSCR (0x1 << 20) /**< \brief (DMAC_CTRLB3) */ -#define DMAC_CTRLB3_FC (0x3 << 21) /**< \brief (DMAC_CTRLB3) */ -#define DMAC_CTRLB3_SRC_INCR (0x3 << 24) /**< \brief (DMAC_CTRLB3) */ -#define DMAC_CTRLB3_DST_INCR (0x3 << 28) /**< \brief (DMAC_CTRLB3) */ -#define DMAC_CTRLB3_IEN (0x1 << 30) /**< \brief (DMAC_CTRLB3) */ -/* -------- DMAC_CFG3 : (DMAC Offset: 0xC8) DMAC Channel Configuration Register (ch_num = 3) -------- */ -#define DMAC_CFG3_SRC_PER (0xf << 0) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_DST_PER (0xf << 4) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_SRC_H2SEL (0x1 << 9) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_DST_H2SEL (0x1 << 13) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_SOD (0x1 << 16) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_LOCK_IF (0x1 << 20) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_LOCK_B (0x1 << 21) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_LOCK_IF_L (0x1 << 22) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_AHB_PROT (0x7 << 24) /**< \brief (DMAC_CFG3) */ -#define DMAC_CFG3_FIFOCFG (0x3 << 28) /**< \brief (DMAC_CFG3) */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Embedded Flash Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_EFC Embedded Flash Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Efc hardware registers */ -typedef struct { - RwReg EEFC_FMR; /**< \brief (Efc Offset: 0x00) EEFC Flash Mode Register */ - WoReg EEFC_FCR; /**< \brief (Efc Offset: 0x04) EEFC Flash Command Register */ - RoReg EEFC_FSR; /**< \brief (Efc Offset: 0x08) EEFC Flash Status Register */ - RoReg EEFC_FRR; /**< \brief (Efc Offset: 0x0C) EEFC Flash Result Register */ -} Efc; -#endif /* __ASSEMBLY__ */ -/* -------- EEFC_FMR : (EFC Offset: 0x00) EEFC Flash Mode Register -------- */ -#define EEFC_FMR_FRDY (0x1 << 0) /**< \brief (EEFC_FMR) Ready Interrupt Enable */ -#define EEFC_FMR_FWS (0xf << 8) /**< \brief (EEFC_FMR) Flash Wait State */ -#define EEFC_FMR_FAM (0x1 << 24) /**< \brief (EEFC_FMR) Flash Access Mode */ -/* -------- EEFC_FCR : (EFC Offset: 0x04) EEFC Flash Command Register -------- */ -#define EEFC_FCR_FCMD (0xff << 0) /**< \brief (EEFC_FCR) Flash Command */ -#define EEFC_FCR_FARG (0xffff << 8) /**< \brief (EEFC_FCR) Flash Command Argument */ -#define EEFC_FCR_FKEY (0xff << 24) /**< \brief (EEFC_FCR) Flash Writing Protection Key */ -/* -------- EEFC_FSR : (EFC Offset: 0x08) EEFC Flash Status Register -------- */ -#define EEFC_FSR_FRDY (0x1 << 0) /**< \brief (EEFC_FSR) Flash Ready Status */ -#define EEFC_FSR_FCMDE (0x1 << 1) /**< \brief (EEFC_FSR) Flash Command Error Status */ -#define EEFC_FSR_FLOCKE (0x1 << 2) /**< \brief (EEFC_FSR) Flash Lock Error Status */ -/* -------- EEFC_FRR : (EFC Offset: 0x0C) EEFC Flash Result Register -------- */ -#define EEFC_FRR_FVALUE (0xffffffff << 0) /**< \brief (EEFC_FRR) Flash Result Value */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR General Purpose Backup Register */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_GPBR General Purpose Backup Register */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Gpbr hardware registers */ -typedef struct { - RwReg SYS_GPBR0; /**< \brief (Gpbr Offset: 0x0) General Purpose Backup Register 0 */ - RwReg SYS_GPBR1; /**< \brief (Gpbr Offset: 0x4) General Purpose Backup Register 1 */ - RwReg SYS_GPBR2; /**< \brief (Gpbr Offset: 0x8) General Purpose Backup Register 2 */ - RwReg SYS_GPBR3; /**< \brief (Gpbr Offset: 0xC) General Purpose Backup Register 3 */ -} Gpbr; -#endif /* __ASSEMBLY__ */ -/* -------- SYS_GPBR0 : (GPBR Offset: 0x0) General Purpose Backup Register 0 -------- */ -#define SYS_GPBR0_GPBR_VALUE0 (0xffffffff << 0) /**< \brief (SYS_GPBR0) Value of GPBR x */ -/* -------- SYS_GPBR1 : (GPBR Offset: 0x4) General Purpose Backup Register 1 -------- */ -#define SYS_GPBR1_GPBR_VALUE1 (0xffffffff << 0) /**< \brief (SYS_GPBR1) Value of GPBR x */ -/* -------- SYS_GPBR2 : (GPBR Offset: 0x8) General Purpose Backup Register 2 -------- */ -#define SYS_GPBR2_GPBR_VALUE2 (0xffffffff << 0) /**< \brief (SYS_GPBR2) Value of GPBR x */ -/* -------- SYS_GPBR3 : (GPBR Offset: 0xC) General Purpose Backup Register 3 -------- */ -#define SYS_GPBR3_GPBR_VALUE3 (0xffffffff << 0) /**< \brief (SYS_GPBR3) Value of GPBR x */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR MultiMedia Card Interface */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_HSMCI MultiMedia Card Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Hsmci hardware registers */ -typedef struct { - WoReg HSMCI_CR; /**< \brief (Hsmci Offset: 0x00) Control Register */ - RwReg HSMCI_MR; /**< \brief (Hsmci Offset: 0x04) Mode Register */ - RwReg HSMCI_DTOR; /**< \brief (Hsmci Offset: 0x08) Data Timeout Register */ - RwReg HSMCI_SDCR; /**< \brief (Hsmci Offset: 0x0C) SD/SDIO Card Register */ - RwReg HSMCI_ARGR; /**< \brief (Hsmci Offset: 0x10) Argument Register */ - WoReg HSMCI_CMDR; /**< \brief (Hsmci Offset: 0x14) Command Register */ - RwReg HSMCI_BLKR; /**< \brief (Hsmci Offset: 0x18) Block Register */ - RwReg HSMCI_CSTOR; /**< \brief (Hsmci Offset: 0x1C) Completion Signal Timeout Register */ - RoReg HSMCI_RSPR[4]; /**< \brief (Hsmci Offset: 0x20) Response Register */ - RoReg HSMCI_RDR; /**< \brief (Hsmci Offset: 0x30) Receive Data Register */ - WoReg HSMCI_TDR; /**< \brief (Hsmci Offset: 0x34) Transmit Data Register */ - RwReg Reserved1[2]; - RoReg HSMCI_SR; /**< \brief (Hsmci Offset: 0x40) Status Register */ - WoReg HSMCI_IER; /**< \brief (Hsmci Offset: 0x44) Interrupt Enable Register */ - WoReg HSMCI_IDR; /**< \brief (Hsmci Offset: 0x48) Interrupt Disable Register */ - RoReg HSMCI_IMR; /**< \brief (Hsmci Offset: 0x4C) Interrupt Mask Register */ - RwReg HSMCI_DMA; /**< \brief (Hsmci Offset: 0x50) DMA Configuration Register */ - RwReg HSMCI_CFG; /**< \brief (Hsmci Offset: 0x54) Configuration Register */ - RwReg Reserved2[35]; - RwReg HSMCI_WPMR; /**< \brief (Hsmci Offset: 0xE4) Write Protection Mode Register */ - RoReg HSMCI_WPSR; /**< \brief (Hsmci Offset: 0xE8) Write Protection Status Register */ -} Hsmci; -#endif /* __ASSEMBLY__ */ -/* -------- HSMCI_CR : (HSMCI Offset: 0x00) Control Register -------- */ -#define HSMCI_CR_MCIEN (0x1 << 0) /**< \brief (HSMCI_CR) Multi-Media Interface Enable */ -#define HSMCI_CR_HSMCIDIS (0x1 << 1) /**< \brief (HSMCI_CR) */ -#define HSMCI_CR_PWSEN (0x1 << 2) /**< \brief (HSMCI_CR) Power Save Mode Enable */ -#define HSMCI_CR_PWSDIS (0x1 << 3) /**< \brief (HSMCI_CR) Power Save Mode Disable */ -#define HSMCI_CR_SWRST (0x1 << 7) /**< \brief (HSMCI_CR) Software Reset */ -/* -------- HSMCI_MR : (HSMCI Offset: 0x04) Mode Register -------- */ -#define HSMCI_MR_CLKDIV (0xff << 0) /**< \brief (HSMCI_MR) Clock Divider */ -#define HSMCI_MR_PWSDIV (0x7 << 8) /**< \brief (HSMCI_MR) Power Saving Divider */ -#define HSMCI_MR_RDPROOF (0x1 << 11) /**< \brief (HSMCI_MR) */ -#define HSMCI_MR_WRPROOF (0x1 << 12) /**< \brief (HSMCI_MR) */ -#define HSMCI_MR_FBYTE (0x1 << 13) /**< \brief (HSMCI_MR) Force Byte Transfer */ -#define HSMCI_MR_PADV (0x1 << 14) /**< \brief (HSMCI_MR) Padding Value */ -#define HSMCI_MR_BLKLEN (0xffff << 16) /**< \brief (HSMCI_MR) Data Block Length */ -/* -------- HSMCI_DTOR : (HSMCI Offset: 0x08) Data Timeout Register -------- */ -#define HSMCI_DTOR_DTOCYC (0xf << 0) /**< \brief (HSMCI_DTOR) Data Timeout Cycle Number */ -#define HSMCI_DTOR_DTOMUL (0x7 << 4) /**< \brief (HSMCI_DTOR) Data Timeout Multiplier */ -/* -------- HSMCI_SDCR : (HSMCI Offset: 0x0C) SD/SDIO Card Register -------- */ -#define HSMCI_SDCR_SDCSEL (0x3 << 0) /**< \brief (HSMCI_SDCR) SDCard/SDIO Slot */ -#define HSMCI_SDCR_SDCBUS (0x3 << 6) /**< \brief (HSMCI_SDCR) SDCard/SDIO Bus Width */ -/* -------- HSMCI_ARGR : (HSMCI Offset: 0x10) Argument Register -------- */ -#define HSMCI_ARGR_ARG (0xffffffff << 0) /**< \brief (HSMCI_ARGR) Command Argument */ -/* -------- HSMCI_CMDR : (HSMCI Offset: 0x14) Command Register -------- */ -#define HSMCI_CMDR_CMDNB (0x3f << 0) /**< \brief (HSMCI_CMDR) Command Number */ -#define HSMCI_CMDR_RSPTYP (0x3 << 6) /**< \brief (HSMCI_CMDR) Response Type */ -#define HSMCI_CMDR_SPCMD (0x7 << 8) /**< \brief (HSMCI_CMDR) Special Command */ -#define HSMCI_CMDR_OPDCMD (0x1 << 11) /**< \brief (HSMCI_CMDR) Open Drain Command */ -#define HSMCI_CMDR_MAXLAT (0x1 << 12) /**< \brief (HSMCI_CMDR) Max Latency for Command to Response */ -#define HSMCI_CMDR_TRCMD (0x3 << 16) /**< \brief (HSMCI_CMDR) Transfer Command */ -#define HSMCI_CMDR_TRDIR (0x1 << 18) /**< \brief (HSMCI_CMDR) Transfer Direction */ -#define HSMCI_CMDR_TRTYP (0x7 << 19) /**< \brief (HSMCI_CMDR) Transfer Type */ -#define HSMCI_CMDR_IOSPCMD (0x3 << 24) /**< \brief (HSMCI_CMDR) SDIO Special Command */ -#define HSMCI_CMDR_ATACS (0x1 << 26) /**< \brief (HSMCI_CMDR) ATA with Command Completion Signal */ -#define HSMCI_CMDR_BOOT_ACK (0x1 << 27) /**< \brief (HSMCI_CMDR) Boot Operation Acknowledge. */ -/* -------- HSMCI_BLKR : (HSMCI Offset: 0x18) Block Register -------- */ -#define HSMCI_BLKR_BCNT (0xffff << 0) /**< \brief (HSMCI_BLKR) MMC/SDIO Block Count - SDIO Byte Count */ -#define HSMCI_BLKR_BLKLEN (0xffff << 16) /**< \brief (HSMCI_BLKR) Data Block Length */ -/* -------- HSMCI_CSTOR : (HSMCI Offset: 0x1C) Completion Signal Timeout Register -------- */ -#define HSMCI_CSTOR_CSTOCYC (0xf << 0) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Cycle Number */ -#define HSMCI_CSTOR_CSTOMUL (0x7 << 4) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Multiplier */ -/* -------- HSMCI_RSPR[4] : (HSMCI Offset: 0x20) Response Register -------- */ -#define HSMCI_RSPR_RSP (0xffffffff << 0) /**< \brief (HSMCI_RSPR[4]) Response */ -/* -------- HSMCI_RDR : (HSMCI Offset: 0x30) Receive Data Register -------- */ -#define HSMCI_RDR_DATA (0xffffffff << 0) /**< \brief (HSMCI_RDR) Data to Read */ -/* -------- HSMCI_TDR : (HSMCI Offset: 0x34) Transmit Data Register -------- */ -#define HSMCI_TDR_DATA (0xffffffff << 0) /**< \brief (HSMCI_TDR) Data to Write */ -/* -------- HSMCI_SR : (HSMCI Offset: 0x40) Status Register -------- */ -#define HSMCI_SR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_SR) Command Ready */ -#define HSMCI_SR_RXRDY (0x1 << 1) /**< \brief (HSMCI_SR) Receiver Ready */ -#define HSMCI_SR_TXRDY (0x1 << 2) /**< \brief (HSMCI_SR) Transmit Ready */ -#define HSMCI_SR_BLKE (0x1 << 3) /**< \brief (HSMCI_SR) Data Block Ended */ -#define HSMCI_SR_DTIP (0x1 << 4) /**< \brief (HSMCI_SR) Data Transfer in Progress */ -#define HSMCI_SR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_SR) HSMCI Not Busy */ -#define HSMCI_SR_MCI_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_SR) */ -#define HSMCI_SR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_SR) SDIO Read Wait Operation Status */ -#define HSMCI_SR_CSRCV (0x1 << 13) /**< \brief (HSMCI_SR) CE-ATA Completion Signal Received */ -#define HSMCI_SR_RINDE (0x1 << 16) /**< \brief (HSMCI_SR) Response Index Error */ -#define HSMCI_SR_RDIRE (0x1 << 17) /**< \brief (HSMCI_SR) Response Direction Error */ -#define HSMCI_SR_RCRCE (0x1 << 18) /**< \brief (HSMCI_SR) Response CRC Error */ -#define HSMCI_SR_RENDE (0x1 << 19) /**< \brief (HSMCI_SR) Response End Bit Error */ -#define HSMCI_SR_RTOE (0x1 << 20) /**< \brief (HSMCI_SR) Response Time-out Error */ -#define HSMCI_SR_DCRCE (0x1 << 21) /**< \brief (HSMCI_SR) Data CRC Error */ -#define HSMCI_SR_DTOE (0x1 << 22) /**< \brief (HSMCI_SR) Data Time-out Error */ -#define HSMCI_SR_CSTOE (0x1 << 23) /**< \brief (HSMCI_SR) Completion Signal Time-out Error */ -#define HSMCI_SR_BLKOVRE (0x1 << 24) /**< \brief (HSMCI_SR) DMA Block Overrun Error */ -#define HSMCI_SR_DMADONE (0x1 << 25) /**< \brief (HSMCI_SR) DMA Transfer done */ -#define HSMCI_SR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_SR) FIFO empty flag */ -#define HSMCI_SR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_SR) Transfer Done flag */ -#define HSMCI_SR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_SR) Boot Operation Acknowledge Received */ -#define HSMCI_SR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_SR) Boot Operation Acknowledge Error */ -#define HSMCI_SR_OVRE (0x1 << 30) /**< \brief (HSMCI_SR) Overrun */ -#define HSMCI_SR_UNRE (0x1 << 31) /**< \brief (HSMCI_SR) Underrun */ -/* -------- HSMCI_IER : (HSMCI Offset: 0x44) Interrupt Enable Register -------- */ -#define HSMCI_IER_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IER) Command Ready Interrupt Enable */ -#define HSMCI_IER_RXRDY (0x1 << 1) /**< \brief (HSMCI_IER) Receiver Ready Interrupt Enable */ -#define HSMCI_IER_TXRDY (0x1 << 2) /**< \brief (HSMCI_IER) Transmit Ready Interrupt Enable */ -#define HSMCI_IER_BLKE (0x1 << 3) /**< \brief (HSMCI_IER) Data Block Ended Interrupt Enable */ -#define HSMCI_IER_DTIP (0x1 << 4) /**< \brief (HSMCI_IER) Data Transfer in Progress Interrupt Enable */ -#define HSMCI_IER_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IER) Data Not Busy Interrupt Enable */ -#define HSMCI_IER_MCI_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IER) */ -#define HSMCI_IER_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IER) SDIO Read Wait Operation Status Interrupt Enable */ -#define HSMCI_IER_CSRCV (0x1 << 13) /**< \brief (HSMCI_IER) Completion Signal Received Interrupt Enable */ -#define HSMCI_IER_RINDE (0x1 << 16) /**< \brief (HSMCI_IER) Response Index Error Interrupt Enable */ -#define HSMCI_IER_RDIRE (0x1 << 17) /**< \brief (HSMCI_IER) Response Direction Error Interrupt Enable */ -#define HSMCI_IER_RCRCE (0x1 << 18) /**< \brief (HSMCI_IER) Response CRC Error Interrupt Enable */ -#define HSMCI_IER_RENDE (0x1 << 19) /**< \brief (HSMCI_IER) Response End Bit Error Interrupt Enable */ -#define HSMCI_IER_RTOE (0x1 << 20) /**< \brief (HSMCI_IER) Response Time-out Error Interrupt Enable */ -#define HSMCI_IER_DCRCE (0x1 << 21) /**< \brief (HSMCI_IER) Data CRC Error Interrupt Enable */ -#define HSMCI_IER_DTOE (0x1 << 22) /**< \brief (HSMCI_IER) Data Time-out Error Interrupt Enable */ -#define HSMCI_IER_CSTOE (0x1 << 23) /**< \brief (HSMCI_IER) Completion Signal Timeout Error Interrupt Enable */ -#define HSMCI_IER_BLKOVRE (0x1 << 24) /**< \brief (HSMCI_IER) DMA Block Overrun Error Interrupt Enable */ -#define HSMCI_IER_DMADONE (0x1 << 25) /**< \brief (HSMCI_IER) DMA Transfer completed Interrupt Enable */ -#define HSMCI_IER_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IER) FIFO empty Interrupt enable */ -#define HSMCI_IER_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IER) Transfer Done Interrupt enable */ -#define HSMCI_IER_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IER) Boot Acknowledge Interrupt Enable */ -#define HSMCI_IER_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IER) Boot Acknowledge Error Interrupt Enable */ -#define HSMCI_IER_OVRE (0x1 << 30) /**< \brief (HSMCI_IER) Overrun Interrupt Enable */ -#define HSMCI_IER_UNRE (0x1 << 31) /**< \brief (HSMCI_IER) Underrun Interrupt Enable */ -/* -------- HSMCI_IDR : (HSMCI Offset: 0x48) Interrupt Disable Register -------- */ -#define HSMCI_IDR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IDR) Command Ready Interrupt Disable */ -#define HSMCI_IDR_RXRDY (0x1 << 1) /**< \brief (HSMCI_IDR) Receiver Ready Interrupt Disable */ -#define HSMCI_IDR_TXRDY (0x1 << 2) /**< \brief (HSMCI_IDR) Transmit Ready Interrupt Disable */ -#define HSMCI_IDR_BLKE (0x1 << 3) /**< \brief (HSMCI_IDR) Data Block Ended Interrupt Disable */ -#define HSMCI_IDR_DTIP (0x1 << 4) /**< \brief (HSMCI_IDR) Data Transfer in Progress Interrupt Disable */ -#define HSMCI_IDR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IDR) Data Not Busy Interrupt Disable */ -#define HSMCI_IDR_MCI_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IDR) */ -#define HSMCI_IDR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IDR) SDIO Read Wait Operation Status Interrupt Disable */ -#define HSMCI_IDR_CSRCV (0x1 << 13) /**< \brief (HSMCI_IDR) Completion Signal received interrupt disable */ -#define HSMCI_IDR_RINDE (0x1 << 16) /**< \brief (HSMCI_IDR) Response Index Error Interrupt Disable */ -#define HSMCI_IDR_RDIRE (0x1 << 17) /**< \brief (HSMCI_IDR) Response Direction Error Interrupt Disable */ -#define HSMCI_IDR_RCRCE (0x1 << 18) /**< \brief (HSMCI_IDR) Response CRC Error Interrupt Disable */ -#define HSMCI_IDR_RENDE (0x1 << 19) /**< \brief (HSMCI_IDR) Response End Bit Error Interrupt Disable */ -#define HSMCI_IDR_RTOE (0x1 << 20) /**< \brief (HSMCI_IDR) Response Time-out Error Interrupt Disable */ -#define HSMCI_IDR_DCRCE (0x1 << 21) /**< \brief (HSMCI_IDR) Data CRC Error Interrupt Disable */ -#define HSMCI_IDR_DTOE (0x1 << 22) /**< \brief (HSMCI_IDR) Data Time-out Error Interrupt Disable */ -#define HSMCI_IDR_CSTOE (0x1 << 23) /**< \brief (HSMCI_IDR) Completion Signal Time out Error Interrupt Disable */ -#define HSMCI_IDR_BLKOVRE (0x1 << 24) /**< \brief (HSMCI_IDR) DMA Block Overrun Error Interrupt Disable */ -#define HSMCI_IDR_DMADONE (0x1 << 25) /**< \brief (HSMCI_IDR) DMA Transfer completed Interrupt Disable */ -#define HSMCI_IDR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IDR) FIFO empty Interrupt Disable */ -#define HSMCI_IDR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IDR) Transfer Done Interrupt Disable */ -#define HSMCI_IDR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IDR) Boot Acknowledge Interrupt Disable */ -#define HSMCI_IDR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IDR) Boot Acknowledge Error Interrupt Disable */ -#define HSMCI_IDR_OVRE (0x1 << 30) /**< \brief (HSMCI_IDR) Overrun Interrupt Disable */ -#define HSMCI_IDR_UNRE (0x1 << 31) /**< \brief (HSMCI_IDR) Underrun Interrupt Disable */ -/* -------- HSMCI_IMR : (HSMCI Offset: 0x4C) Interrupt Mask Register -------- */ -#define HSMCI_IMR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IMR) Command Ready Interrupt Mask */ -#define HSMCI_IMR_RXRDY (0x1 << 1) /**< \brief (HSMCI_IMR) Receiver Ready Interrupt Mask */ -#define HSMCI_IMR_TXRDY (0x1 << 2) /**< \brief (HSMCI_IMR) Transmit Ready Interrupt Mask */ -#define HSMCI_IMR_BLKE (0x1 << 3) /**< \brief (HSMCI_IMR) Data Block Ended Interrupt Mask */ -#define HSMCI_IMR_DTIP (0x1 << 4) /**< \brief (HSMCI_IMR) Data Transfer in Progress Interrupt Mask */ -#define HSMCI_IMR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IMR) Data Not Busy Interrupt Mask */ -#define HSMCI_IMR_MCI_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IMR) */ -#define HSMCI_IMR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IMR) SDIO Read Wait Operation Status Interrupt Mask */ -#define HSMCI_IMR_CSRCV (0x1 << 13) /**< \brief (HSMCI_IMR) Completion Signal Received Interrupt Mask */ -#define HSMCI_IMR_RINDE (0x1 << 16) /**< \brief (HSMCI_IMR) Response Index Error Interrupt Mask */ -#define HSMCI_IMR_RDIRE (0x1 << 17) /**< \brief (HSMCI_IMR) Response Direction Error Interrupt Mask */ -#define HSMCI_IMR_RCRCE (0x1 << 18) /**< \brief (HSMCI_IMR) Response CRC Error Interrupt Mask */ -#define HSMCI_IMR_RENDE (0x1 << 19) /**< \brief (HSMCI_IMR) Response End Bit Error Interrupt Mask */ -#define HSMCI_IMR_RTOE (0x1 << 20) /**< \brief (HSMCI_IMR) Response Time-out Error Interrupt Mask */ -#define HSMCI_IMR_DCRCE (0x1 << 21) /**< \brief (HSMCI_IMR) Data CRC Error Interrupt Mask */ -#define HSMCI_IMR_DTOE (0x1 << 22) /**< \brief (HSMCI_IMR) Data Time-out Error Interrupt Mask */ -#define HSMCI_IMR_CSTOE (0x1 << 23) /**< \brief (HSMCI_IMR) Completion Signal Time-out Error Interrupt Mask */ -#define HSMCI_IMR_BLKOVRE (0x1 << 24) /**< \brief (HSMCI_IMR) DMA Block Overrun Error Interrupt Mask */ -#define HSMCI_IMR_DMADONE (0x1 << 25) /**< \brief (HSMCI_IMR) DMA Transfer Completed Interrupt Mask */ -#define HSMCI_IMR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IMR) FIFO Empty Interrupt Mask */ -#define HSMCI_IMR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IMR) Transfer Done Interrupt Mask */ -#define HSMCI_IMR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IMR) Boot Operation Acknowledge Received Interrupt Mask */ -#define HSMCI_IMR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IMR) Boot Operation Acknowledge Error Interrupt Mask */ -#define HSMCI_IMR_OVRE (0x1 << 30) /**< \brief (HSMCI_IMR) Overrun Interrupt Mask */ -#define HSMCI_IMR_UNRE (0x1 << 31) /**< \brief (HSMCI_IMR) Underrun Interrupt Mask */ -/* -------- HSMCI_DMA : (HSMCI Offset: 0x50) DMA Configuration Register -------- */ -#define HSMCI_DMA_OFFSET (0x3 << 0) /**< \brief (HSMCI_DMA) DMA Write Buffer Offset */ -#define HSMCI_DMA_CHKSIZE (0x1 << 4) /**< \brief (HSMCI_DMA) DMA Channel Read and Write Chunk Size */ -#define HSMCI_DMA_DMAEN (0x1 << 8) /**< \brief (HSMCI_DMA) DMA Hardware Handshaking Enable */ -#define HSMCI_DMA_ROPT (0x1 << 12) /**< \brief (HSMCI_DMA) Read Optimization with padding */ -/* -------- HSMCI_CFG : (HSMCI Offset: 0x54) Configuration Register -------- */ -#define HSMCI_CFG_FIFOMODE (0x1 << 0) /**< \brief (HSMCI_CFG) HSMCI Internal FIFO control mode */ -#define HSMCI_CFG_FERRCTRL (0x1 << 4) /**< \brief (HSMCI_CFG) Flow Error flag reset control mode */ -#define HSMCI_CFG_HSMODE (0x1 << 8) /**< \brief (HSMCI_CFG) High Speed Mode */ -#define HSMCI_CFG_LSYNC (0x1 << 12) /**< \brief (HSMCI_CFG) Synchronize on the last block */ -/* -------- HSMCI_WPMR : (HSMCI Offset: 0xE4) Write Protection Mode Register -------- */ -#define HSMCI_WPMR_WP_EN (0x1 << 0) /**< \brief (HSMCI_WPMR) Write Protection Enable */ -#define HSMCI_WPMR_WP_KEY (0xffffff << 8) /**< \brief (HSMCI_WPMR) Write Protection Key password */ -/* -------- HSMCI_WPSR : (HSMCI Offset: 0xE8) Write Protection Status Register -------- */ -#define HSMCI_WPSR_WP_VS (0xf << 0) /**< \brief (HSMCI_WPSR) */ -#define HSMCI_WPSR_WP_VSRC (0xffff << 8) /**< \brief (HSMCI_WPSR) Write Protection Violation Status */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR AHB Bus Matrix */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_MATRIX AHB Bus Matrix */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Matrix hardware registers */ -typedef struct { - RwReg MATRIX_MCFG[5]; /**< \brief (Matrix Offset: 0x0000) Master Configuration Register */ - RwReg Reserved1[11]; - RwReg MATRIX_SCFG[10]; /**< \brief (Matrix Offset: 0x0040) Slave Configuration Register */ - RwReg Reserved2[6]; - RwReg MATRIX_PRAS0; /**< \brief (Matrix Offset: 0x0080) Priority Register A for Slave 0 */ - RwReg Reserved3[1]; - RwReg MATRIX_PRAS1; /**< \brief (Matrix Offset: 0x0088) Priority Register A for Slave 1 */ - RwReg Reserved4[1]; - RwReg MATRIX_PRAS2; /**< \brief (Matrix Offset: 0x0090) Priority Register A for Slave 2 */ - RwReg Reserved5[1]; - RwReg MATRIX_PRAS3; /**< \brief (Matrix Offset: 0x0098) Priority Register A for Slave 3 */ - RwReg Reserved6[1]; - RwReg MATRIX_PRAS4; /**< \brief (Matrix Offset: 0x00A0) Priority Register A for Slave 4 */ - RwReg Reserved7[1]; - RwReg MATRIX_PRAS5; /**< \brief (Matrix Offset: 0x00A8) Priority Register A for Slave 5 */ - RwReg Reserved8[1]; - RwReg MATRIX_PRAS6; /**< \brief (Matrix Offset: 0x00B0) Priority Register A for Slave 6 */ - RwReg Reserved9[1]; - RwReg MATRIX_PRAS7; /**< \brief (Matrix Offset: 0x00B8) Priority Register A for Slave 7 */ - RwReg Reserved10[1]; - RwReg MATRIX_PRAS8; /**< \brief (Matrix Offset: 0x00C0) Priority Register A for Slave 8 */ - RwReg Reserved11[1]; - RwReg MATRIX_PRAS9; /**< \brief (Matrix Offset: 0x00C8) Priority Register A for Slave 9 */ - RwReg Reserved12[13]; - RwReg MATRIX_MRCR; /**< \brief (Matrix Offset: 0x0100) Master Remap Control Register */ -} Matrix; -#endif /* __ASSEMBLY__ */ -/* -------- MATRIX_MCFG[5] : (MATRIX Offset: 0x0000) Master Configuration Register -------- */ -#define MATRIX_MCFG_ULBT (0x7 << 0) /**< \brief (MATRIX_MCFG[5]) Undefined Length Burst Type */ -/* -------- MATRIX_SCFG[10] : (MATRIX Offset: 0x0040) Slave Configuration Register -------- */ -#define MATRIX_SCFG_SLOT_CYCLE (0xff << 0) /**< \brief (MATRIX_SCFG[10]) Maximum Number of Allowed Cycles for a Burst */ -#define MATRIX_SCFG_DEFMSTR_TYPE (0x3 << 16) /**< \brief (MATRIX_SCFG[10]) Default Master Type */ -#define MATRIX_SCFG_FIXED_DEFMSTR (0x7 << 18) /**< \brief (MATRIX_SCFG[10]) Fixed Default Master */ -#define MATRIX_SCFG_ARBT (0x3 << 24) /**< \brief (MATRIX_SCFG[10]) Arbitration Type */ -/* -------- MATRIX_PRAS0 : (MATRIX Offset: 0x0080) Priority Register A for Slave 0 -------- */ -#define MATRIX_PRAS0_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS0) Master 0 Priority */ -#define MATRIX_PRAS0_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS0) Master 1 Priority */ -#define MATRIX_PRAS0_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS0) Master 2 Priority */ -#define MATRIX_PRAS0_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS0) Master 3 Priority */ -#define MATRIX_PRAS0_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS0) Master 4 Priority */ -/* -------- MATRIX_PRAS1 : (MATRIX Offset: 0x0088) Priority Register A for Slave 1 -------- */ -#define MATRIX_PRAS1_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS1) Master 0 Priority */ -#define MATRIX_PRAS1_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS1) Master 1 Priority */ -#define MATRIX_PRAS1_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS1) Master 2 Priority */ -#define MATRIX_PRAS1_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS1) Master 3 Priority */ -#define MATRIX_PRAS1_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS1) Master 4 Priority */ -/* -------- MATRIX_PRAS2 : (MATRIX Offset: 0x0090) Priority Register A for Slave 2 -------- */ -#define MATRIX_PRAS2_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS2) Master 0 Priority */ -#define MATRIX_PRAS2_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS2) Master 1 Priority */ -#define MATRIX_PRAS2_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS2) Master 2 Priority */ -#define MATRIX_PRAS2_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS2) Master 3 Priority */ -#define MATRIX_PRAS2_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS2) Master 4 Priority */ -/* -------- MATRIX_PRAS3 : (MATRIX Offset: 0x0098) Priority Register A for Slave 3 -------- */ -#define MATRIX_PRAS3_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS3) Master 0 Priority */ -#define MATRIX_PRAS3_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS3) Master 1 Priority */ -#define MATRIX_PRAS3_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS3) Master 2 Priority */ -#define MATRIX_PRAS3_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS3) Master 3 Priority */ -#define MATRIX_PRAS3_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS3) Master 4 Priority */ -/* -------- MATRIX_PRAS4 : (MATRIX Offset: 0x00A0) Priority Register A for Slave 4 -------- */ -#define MATRIX_PRAS4_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS4) Master 0 Priority */ -#define MATRIX_PRAS4_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS4) Master 1 Priority */ -#define MATRIX_PRAS4_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS4) Master 2 Priority */ -#define MATRIX_PRAS4_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS4) Master 3 Priority */ -#define MATRIX_PRAS4_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS4) Master 4 Priority */ -/* -------- MATRIX_PRAS5 : (MATRIX Offset: 0x00A8) Priority Register A for Slave 5 -------- */ -#define MATRIX_PRAS5_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS5) Master 0 Priority */ -#define MATRIX_PRAS5_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS5) Master 1 Priority */ -#define MATRIX_PRAS5_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS5) Master 2 Priority */ -#define MATRIX_PRAS5_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS5) Master 3 Priority */ -#define MATRIX_PRAS5_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS5) Master 4 Priority */ -/* -------- MATRIX_PRAS6 : (MATRIX Offset: 0x00B0) Priority Register A for Slave 6 -------- */ -#define MATRIX_PRAS6_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS6) Master 0 Priority */ -#define MATRIX_PRAS6_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS6) Master 1 Priority */ -#define MATRIX_PRAS6_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS6) Master 2 Priority */ -#define MATRIX_PRAS6_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS6) Master 3 Priority */ -#define MATRIX_PRAS6_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS6) Master 4 Priority */ -/* -------- MATRIX_PRAS7 : (MATRIX Offset: 0x00B8) Priority Register A for Slave 7 -------- */ -#define MATRIX_PRAS7_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS7) Master 0 Priority */ -#define MATRIX_PRAS7_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS7) Master 1 Priority */ -#define MATRIX_PRAS7_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS7) Master 2 Priority */ -#define MATRIX_PRAS7_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS7) Master 3 Priority */ -#define MATRIX_PRAS7_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS7) Master 4 Priority */ -/* -------- MATRIX_PRAS8 : (MATRIX Offset: 0x00C0) Priority Register A for Slave 8 -------- */ -#define MATRIX_PRAS8_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS8) Master 0 Priority */ -#define MATRIX_PRAS8_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS8) Master 1 Priority */ -#define MATRIX_PRAS8_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS8) Master 2 Priority */ -#define MATRIX_PRAS8_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS8) Master 3 Priority */ -#define MATRIX_PRAS8_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS8) Master 4 Priority */ -/* -------- MATRIX_PRAS9 : (MATRIX Offset: 0x00C8) Priority Register A for Slave 9 -------- */ -#define MATRIX_PRAS9_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS9) Master 0 Priority */ -#define MATRIX_PRAS9_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS9) Master 1 Priority */ -#define MATRIX_PRAS9_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS9) Master 2 Priority */ -#define MATRIX_PRAS9_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS9) Master 3 Priority */ -#define MATRIX_PRAS9_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS9) Master 4 Priority */ -/* -------- MATRIX_MRCR : (MATRIX Offset: 0x0100) Master Remap Control Register -------- */ -#define MATRIX_MRCR_RCB0 (0x1 << 0) /**< \brief (MATRIX_MRCR) Remap Command Bit for AHB Master 0 */ -#define MATRIX_MRCR_RCB1 (0x1 << 1) /**< \brief (MATRIX_MRCR) Remap Command Bit for AHB Master 1 */ -#define MATRIX_MRCR_RCB2 (0x1 << 2) /**< \brief (MATRIX_MRCR) Remap Command Bit for AHB Master 2 */ -#define MATRIX_MRCR_RCB3 (0x1 << 3) /**< \brief (MATRIX_MRCR) Remap Command Bit for AHB Master 3 */ -#define MATRIX_MRCR_RCB4 (0x1 << 4) /**< \brief (MATRIX_MRCR) Remap Command Bit for AHB Master 4 */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Peripheral DMA Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_PDC Peripheral DMA Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pdc hardware registers */ -typedef struct { - RwReg Reserved1[64]; - RwReg PERIPH_RPR; /**< \brief (Pdc Offset: 0x100) Receive Pointer Register */ - RwReg PERIPH_RCR; /**< \brief (Pdc Offset: 0x104) Receive Counter Register */ - RwReg PERIPH_TPR; /**< \brief (Pdc Offset: 0x108) Transmit Pointer Register */ - RwReg PERIPH_TCR; /**< \brief (Pdc Offset: 0x10C) Transmit Counter Register */ - RwReg PERIPH_RNPR; /**< \brief (Pdc Offset: 0x110) Receive Next Pointer Register */ - RwReg PERIPH_RNCR; /**< \brief (Pdc Offset: 0x114) Receive Next Counter Register */ - RwReg PERIPH_TNPR; /**< \brief (Pdc Offset: 0x118) Transmit Next Pointer Register */ - RwReg PERIPH_TNCR; /**< \brief (Pdc Offset: 0x11C) Transmit Next Counter Register */ - WoReg PERIPH_PTCR; /**< \brief (Pdc Offset: 0x120) Transfer Control Register */ - RoReg PERIPH_PTSR; /**< \brief (Pdc Offset: 0x124) Transfer Status Register */ -} Pdc; -#endif /* __ASSEMBLY__ */ -/* -------- PERIPH_RPR : (PDC Offset: 0x100) Receive Pointer Register -------- */ -#define PERIPH_RPR_RXPTR (0xffffffff << 0) /**< \brief (PERIPH_RPR) Receive Pointer Register */ -/* -------- PERIPH_RCR : (PDC Offset: 0x104) Receive Counter Register -------- */ -#define PERIPH_RCR_RXCTR (0xffff << 0) /**< \brief (PERIPH_RCR) Receive Counter Register */ -/* -------- PERIPH_TPR : (PDC Offset: 0x108) Transmit Pointer Register -------- */ -#define PERIPH_TPR_TXPTR (0xffffffff << 0) /**< \brief (PERIPH_TPR) Transmit Counter Register */ -/* -------- PERIPH_TCR : (PDC Offset: 0x10C) Transmit Counter Register -------- */ -#define PERIPH_TCR_TXCTR (0xffff << 0) /**< \brief (PERIPH_TCR) Transmit Counter Register */ -/* -------- PERIPH_RNPR : (PDC Offset: 0x110) Receive Next Pointer Register -------- */ -#define PERIPH_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (PERIPH_RNPR) Receive Next Pointer */ -/* -------- PERIPH_RNCR : (PDC Offset: 0x114) Receive Next Counter Register -------- */ -#define PERIPH_RNCR_RXNCTR (0xffff << 0) /**< \brief (PERIPH_RNCR) Receive Next Counter */ -/* -------- PERIPH_TNPR : (PDC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define PERIPH_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (PERIPH_TNPR) Transmit Next Pointer */ -/* -------- PERIPH_TNCR : (PDC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define PERIPH_TNCR_TXNCTR (0xffff << 0) /**< \brief (PERIPH_TNCR) Transmit Counter Next */ -/* -------- PERIPH_PTCR : (PDC Offset: 0x120) Transfer Control Register -------- */ -#define PERIPH_PTCR_RXTEN (0x1 << 0) /**< \brief (PERIPH_PTCR) Receiver Transfer Enable */ -#define PERIPH_PTCR_RXTDIS (0x1 << 1) /**< \brief (PERIPH_PTCR) Receiver Transfer Disable */ -#define PERIPH_PTCR_TXTEN (0x1 << 8) /**< \brief (PERIPH_PTCR) Transmitter Transfer Enable */ -#define PERIPH_PTCR_TXTDIS (0x1 << 9) /**< \brief (PERIPH_PTCR) Transmitter Transfer Disable */ -/* -------- PERIPH_PTSR : (PDC Offset: 0x124) Transfer Status Register -------- */ -#define PERIPH_PTSR_RXTEN (0x1 << 0) /**< \brief (PERIPH_PTSR) Receiver Transfer Enable */ -#define PERIPH_PTSR_TXTEN (0x1 << 8) /**< \brief (PERIPH_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Parallel Input/Output */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_PIO Parallel Input/Output */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pio hardware registers */ -typedef struct { - WoReg PIO_PER; /**< \brief (Pio Offset: 0x0000) PIO Enable Register */ - WoReg PIO_PDR; /**< \brief (Pio Offset: 0x0004) PIO Disable Register */ - RoReg PIO_PSR; /**< \brief (Pio Offset: 0x0008) PIO Status Register */ - RwReg Reserved1[1]; - WoReg PIO_OER; /**< \brief (Pio Offset: 0x0010) Output Enable Register */ - WoReg PIO_ODR; /**< \brief (Pio Offset: 0x0014) Output Disable Register */ - RoReg PIO_OSR; /**< \brief (Pio Offset: 0x0018) Output Status Register */ - RwReg Reserved2[1]; - WoReg PIO_IFER; /**< \brief (Pio Offset: 0x0020) Glitch Input Filter Enable Register */ - WoReg PIO_IFDR; /**< \brief (Pio Offset: 0x0024) Glitch Input Filter Disable Register */ - RoReg PIO_IFSR; /**< \brief (Pio Offset: 0x0028) Glitch Input Filter Status Register */ - RwReg Reserved3[1]; - WoReg PIO_SODR; /**< \brief (Pio Offset: 0x0030) Set Output Data Register */ - WoReg PIO_CODR; /**< \brief (Pio Offset: 0x0034) Clear Output Data Register */ - RwReg PIO_ODSR; /**< \brief (Pio Offset: 0x0038) Output Data Status Register */ - RoReg PIO_PDSR; /**< \brief (Pio Offset: 0x003C) Pin Data Status Register */ - WoReg PIO_IER; /**< \brief (Pio Offset: 0x0040) Interrupt Enable Register */ - WoReg PIO_IDR; /**< \brief (Pio Offset: 0x0044) Interrupt Disable Register */ - RoReg PIO_IMR; /**< \brief (Pio Offset: 0x0048) Interrupt Mask Register */ - RoReg PIO_ISR; /**< \brief (Pio Offset: 0x004C) Interrupt Status Register */ - WoReg PIO_MDER; /**< \brief (Pio Offset: 0x0050) Multi-driver Enable Register */ - WoReg PIO_MDDR; /**< \brief (Pio Offset: 0x0054) Multi-driver Disable Register */ - RoReg PIO_MDSR; /**< \brief (Pio Offset: 0x0058) Multi-driver Status Register */ - RwReg Reserved4[1]; - WoReg PIO_PUDR; /**< \brief (Pio Offset: 0x0060) Pull-up Disable Register */ - WoReg PIO_PUER; /**< \brief (Pio Offset: 0x0064) Pull-up Enable Register */ - RoReg PIO_PUSR; /**< \brief (Pio Offset: 0x0068) Pad Pull-up Status Register */ - RwReg Reserved5[1]; - RwReg PIO_ABSR; /**< \brief (Pio Offset: 0x0070) Peripheral AB Select Register */ - RwReg Reserved6[3]; - WoReg PIO_SCIFSR; /**< \brief (Pio Offset: 0x0080) System Clock Glitch Input Filter Select Register */ - WoReg PIO_DIFSR; /**< \brief (Pio Offset: 0x0084) Debouncing Input Filter Select Register */ - RoReg PIO_IFDGSR; /**< \brief (Pio Offset: 0x0088) Glitch or Debouncing Input Filter Clock Selection Status Register */ - RwReg PIO_SCDR; /**< \brief (Pio Offset: 0x008C) Slow Clock Divider Debouncing Register */ - RwReg Reserved7[4]; - WoReg PIO_OWER; /**< \brief (Pio Offset: 0x00A0) Output Write Enable */ - WoReg PIO_OWDR; /**< \brief (Pio Offset: 0x00A4) Output Write Disable */ - RoReg PIO_OWSR; /**< \brief (Pio Offset: 0x00A8) Output Write Status Register */ - RwReg Reserved8[1]; - WoReg PIO_AIMER; /**< \brief (Pio Offset: 0x00B0) Additional Interrupt Modes Enable Register */ - WoReg PIO_AIMDR; /**< \brief (Pio Offset: 0x00B4) Additional Interrupt Modes Disables Register */ - RoReg PIO_AIMMR; /**< \brief (Pio Offset: 0x00B8) Additional Interrupt Modes Mask Register */ - RwReg Reserved9[1]; - WoReg PIO_ESR; /**< \brief (Pio Offset: 0x00C0) Edge Select Register */ - WoReg PIO_LSR; /**< \brief (Pio Offset: 0x00C4) Level Select Register */ - RoReg PIO_ELSR; /**< \brief (Pio Offset: 0x00C8) Edge/Level Status Register */ - RwReg Reserved10[1]; - WoReg PIO_FELLSR; /**< \brief (Pio Offset: 0x00D0) Falling Edge/Low Level Select Register */ - WoReg PIO_REHLSR; /**< \brief (Pio Offset: 0x00D4) Rising Edge/ High Level Select Register */ - RoReg PIO_FRLHSR; /**< \brief (Pio Offset: 0x00D8) Fall/Rise - Low/High Status Register */ - RwReg Reserved11[1]; - RoReg PIO_LOCKSR; /**< \brief (Pio Offset: 0x00E0) Lock Status */ - RwReg PIO_WPMR; /**< \brief (Pio Offset: 0x00E4) Write Protect Mode Register */ - RoReg PIO_WPSR; /**< \brief (Pio Offset: 0x00E8) Write Protect Status Register */ -} Pio; -#endif /* __ASSEMBLY__ */ -/* -------- PIO_PER : (PIO Offset: 0x0000) PIO Enable Register -------- */ -#define PIO_PER_P0 (0x1 << 0) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P1 (0x1 << 1) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P2 (0x1 << 2) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P3 (0x1 << 3) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P4 (0x1 << 4) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P5 (0x1 << 5) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P6 (0x1 << 6) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P7 (0x1 << 7) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P8 (0x1 << 8) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P9 (0x1 << 9) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P10 (0x1 << 10) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P11 (0x1 << 11) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P12 (0x1 << 12) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P13 (0x1 << 13) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P14 (0x1 << 14) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P15 (0x1 << 15) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P16 (0x1 << 16) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P17 (0x1 << 17) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P18 (0x1 << 18) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P19 (0x1 << 19) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P20 (0x1 << 20) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P21 (0x1 << 21) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P22 (0x1 << 22) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P23 (0x1 << 23) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P24 (0x1 << 24) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P25 (0x1 << 25) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P26 (0x1 << 26) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P27 (0x1 << 27) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P28 (0x1 << 28) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P29 (0x1 << 29) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P30 (0x1 << 30) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P31 (0x1 << 31) /**< \brief (PIO_PER) PIO Enable */ -/* -------- PIO_PDR : (PIO Offset: 0x0004) PIO Disable Register -------- */ -#define PIO_PDR_P0 (0x1 << 0) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P1 (0x1 << 1) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P2 (0x1 << 2) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P3 (0x1 << 3) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P4 (0x1 << 4) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P5 (0x1 << 5) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P6 (0x1 << 6) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P7 (0x1 << 7) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P8 (0x1 << 8) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P9 (0x1 << 9) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P10 (0x1 << 10) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P11 (0x1 << 11) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P12 (0x1 << 12) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P13 (0x1 << 13) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P14 (0x1 << 14) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P15 (0x1 << 15) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P16 (0x1 << 16) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P17 (0x1 << 17) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P18 (0x1 << 18) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P19 (0x1 << 19) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P20 (0x1 << 20) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P21 (0x1 << 21) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P22 (0x1 << 22) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P23 (0x1 << 23) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P24 (0x1 << 24) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P25 (0x1 << 25) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P26 (0x1 << 26) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P27 (0x1 << 27) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P28 (0x1 << 28) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P29 (0x1 << 29) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P30 (0x1 << 30) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P31 (0x1 << 31) /**< \brief (PIO_PDR) PIO Disable */ -/* -------- PIO_PSR : (PIO Offset: 0x0008) PIO Status Register -------- */ -#define PIO_PSR_P0 (0x1 << 0) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P1 (0x1 << 1) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P2 (0x1 << 2) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P3 (0x1 << 3) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P4 (0x1 << 4) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P5 (0x1 << 5) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P6 (0x1 << 6) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P7 (0x1 << 7) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P8 (0x1 << 8) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P9 (0x1 << 9) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P10 (0x1 << 10) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P11 (0x1 << 11) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P12 (0x1 << 12) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P13 (0x1 << 13) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P14 (0x1 << 14) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P15 (0x1 << 15) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P16 (0x1 << 16) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P17 (0x1 << 17) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P18 (0x1 << 18) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P19 (0x1 << 19) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P20 (0x1 << 20) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P21 (0x1 << 21) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P22 (0x1 << 22) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P23 (0x1 << 23) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P24 (0x1 << 24) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P25 (0x1 << 25) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P26 (0x1 << 26) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P27 (0x1 << 27) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P28 (0x1 << 28) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P29 (0x1 << 29) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P30 (0x1 << 30) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P31 (0x1 << 31) /**< \brief (PIO_PSR) PIO Status */ -/* -------- PIO_OER : (PIO Offset: 0x0010) Output Enable Register -------- */ -#define PIO_OER_P0 (0x1 << 0) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P1 (0x1 << 1) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P2 (0x1 << 2) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P3 (0x1 << 3) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P4 (0x1 << 4) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P5 (0x1 << 5) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P6 (0x1 << 6) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P7 (0x1 << 7) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P8 (0x1 << 8) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P9 (0x1 << 9) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P10 (0x1 << 10) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P11 (0x1 << 11) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P12 (0x1 << 12) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P13 (0x1 << 13) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P14 (0x1 << 14) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P15 (0x1 << 15) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P16 (0x1 << 16) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P17 (0x1 << 17) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P18 (0x1 << 18) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P19 (0x1 << 19) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P20 (0x1 << 20) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P21 (0x1 << 21) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P22 (0x1 << 22) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P23 (0x1 << 23) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P24 (0x1 << 24) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P25 (0x1 << 25) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P26 (0x1 << 26) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P27 (0x1 << 27) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P28 (0x1 << 28) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P29 (0x1 << 29) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P30 (0x1 << 30) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P31 (0x1 << 31) /**< \brief (PIO_OER) Output Enable */ -/* -------- PIO_ODR : (PIO Offset: 0x0014) Output Disable Register -------- */ -#define PIO_ODR_P0 (0x1 << 0) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P1 (0x1 << 1) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P2 (0x1 << 2) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P3 (0x1 << 3) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P4 (0x1 << 4) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P5 (0x1 << 5) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P6 (0x1 << 6) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P7 (0x1 << 7) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P8 (0x1 << 8) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P9 (0x1 << 9) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P10 (0x1 << 10) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P11 (0x1 << 11) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P12 (0x1 << 12) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P13 (0x1 << 13) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P14 (0x1 << 14) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P15 (0x1 << 15) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P16 (0x1 << 16) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P17 (0x1 << 17) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P18 (0x1 << 18) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P19 (0x1 << 19) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P20 (0x1 << 20) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P21 (0x1 << 21) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P22 (0x1 << 22) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P23 (0x1 << 23) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P24 (0x1 << 24) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P25 (0x1 << 25) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P26 (0x1 << 26) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P27 (0x1 << 27) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P28 (0x1 << 28) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P29 (0x1 << 29) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P30 (0x1 << 30) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P31 (0x1 << 31) /**< \brief (PIO_ODR) Output Disable */ -/* -------- PIO_OSR : (PIO Offset: 0x0018) Output Status Register -------- */ -#define PIO_OSR_P0 (0x1 << 0) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P1 (0x1 << 1) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P2 (0x1 << 2) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P3 (0x1 << 3) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P4 (0x1 << 4) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P5 (0x1 << 5) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P6 (0x1 << 6) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P7 (0x1 << 7) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P8 (0x1 << 8) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P9 (0x1 << 9) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P10 (0x1 << 10) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P11 (0x1 << 11) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P12 (0x1 << 12) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P13 (0x1 << 13) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P14 (0x1 << 14) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P15 (0x1 << 15) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P16 (0x1 << 16) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P17 (0x1 << 17) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P18 (0x1 << 18) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P19 (0x1 << 19) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P20 (0x1 << 20) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P21 (0x1 << 21) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P22 (0x1 << 22) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P23 (0x1 << 23) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P24 (0x1 << 24) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P25 (0x1 << 25) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P26 (0x1 << 26) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P27 (0x1 << 27) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P28 (0x1 << 28) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P29 (0x1 << 29) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P30 (0x1 << 30) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P31 (0x1 << 31) /**< \brief (PIO_OSR) Output Status */ -/* -------- PIO_IFER : (PIO Offset: 0x0020) Glitch Input Filter Enable Register -------- */ -#define PIO_IFER_P0 (0x1 << 0) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P1 (0x1 << 1) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P2 (0x1 << 2) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P3 (0x1 << 3) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P4 (0x1 << 4) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P5 (0x1 << 5) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P6 (0x1 << 6) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P7 (0x1 << 7) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P8 (0x1 << 8) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P9 (0x1 << 9) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P10 (0x1 << 10) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P11 (0x1 << 11) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P12 (0x1 << 12) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P13 (0x1 << 13) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P14 (0x1 << 14) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P15 (0x1 << 15) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P16 (0x1 << 16) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P17 (0x1 << 17) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P18 (0x1 << 18) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P19 (0x1 << 19) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P20 (0x1 << 20) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P21 (0x1 << 21) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P22 (0x1 << 22) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P23 (0x1 << 23) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P24 (0x1 << 24) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P25 (0x1 << 25) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P26 (0x1 << 26) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P27 (0x1 << 27) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P28 (0x1 << 28) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P29 (0x1 << 29) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P30 (0x1 << 30) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P31 (0x1 << 31) /**< \brief (PIO_IFER) Input Filter Enable */ -/* -------- PIO_IFDR : (PIO Offset: 0x0024) Glitch Input Filter Disable Register -------- */ -#define PIO_IFDR_P0 (0x1 << 0) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P1 (0x1 << 1) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P2 (0x1 << 2) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P3 (0x1 << 3) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P4 (0x1 << 4) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P5 (0x1 << 5) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P6 (0x1 << 6) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P7 (0x1 << 7) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P8 (0x1 << 8) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P9 (0x1 << 9) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P10 (0x1 << 10) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P11 (0x1 << 11) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P12 (0x1 << 12) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P13 (0x1 << 13) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P14 (0x1 << 14) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P15 (0x1 << 15) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P16 (0x1 << 16) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P17 (0x1 << 17) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P18 (0x1 << 18) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P19 (0x1 << 19) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P20 (0x1 << 20) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P21 (0x1 << 21) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P22 (0x1 << 22) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P23 (0x1 << 23) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P24 (0x1 << 24) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P25 (0x1 << 25) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P26 (0x1 << 26) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P27 (0x1 << 27) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P28 (0x1 << 28) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P29 (0x1 << 29) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P30 (0x1 << 30) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P31 (0x1 << 31) /**< \brief (PIO_IFDR) Input Filter Disable */ -/* -------- PIO_IFSR : (PIO Offset: 0x0028) Glitch Input Filter Status Register -------- */ -#define PIO_IFSR_P0 (0x1 << 0) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P1 (0x1 << 1) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P2 (0x1 << 2) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P3 (0x1 << 3) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P4 (0x1 << 4) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P5 (0x1 << 5) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P6 (0x1 << 6) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P7 (0x1 << 7) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P8 (0x1 << 8) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P9 (0x1 << 9) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P10 (0x1 << 10) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P11 (0x1 << 11) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P12 (0x1 << 12) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P13 (0x1 << 13) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P14 (0x1 << 14) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P15 (0x1 << 15) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P16 (0x1 << 16) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P17 (0x1 << 17) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P18 (0x1 << 18) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P19 (0x1 << 19) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P20 (0x1 << 20) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P21 (0x1 << 21) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P22 (0x1 << 22) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P23 (0x1 << 23) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P24 (0x1 << 24) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P25 (0x1 << 25) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P26 (0x1 << 26) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P27 (0x1 << 27) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P28 (0x1 << 28) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P29 (0x1 << 29) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P30 (0x1 << 30) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P31 (0x1 << 31) /**< \brief (PIO_IFSR) Input Filer Status */ -/* -------- PIO_SODR : (PIO Offset: 0x0030) Set Output Data Register -------- */ -#define PIO_SODR_P0 (0x1 << 0) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P1 (0x1 << 1) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P2 (0x1 << 2) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P3 (0x1 << 3) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P4 (0x1 << 4) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P5 (0x1 << 5) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P6 (0x1 << 6) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P7 (0x1 << 7) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P8 (0x1 << 8) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P9 (0x1 << 9) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P10 (0x1 << 10) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P11 (0x1 << 11) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P12 (0x1 << 12) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P13 (0x1 << 13) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P14 (0x1 << 14) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P15 (0x1 << 15) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P16 (0x1 << 16) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P17 (0x1 << 17) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P18 (0x1 << 18) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P19 (0x1 << 19) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P20 (0x1 << 20) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P21 (0x1 << 21) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P22 (0x1 << 22) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P23 (0x1 << 23) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P24 (0x1 << 24) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P25 (0x1 << 25) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P26 (0x1 << 26) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P27 (0x1 << 27) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P28 (0x1 << 28) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P29 (0x1 << 29) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P30 (0x1 << 30) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P31 (0x1 << 31) /**< \brief (PIO_SODR) Set Output Data */ -/* -------- PIO_CODR : (PIO Offset: 0x0034) Clear Output Data Register -------- */ -#define PIO_CODR_P0 (0x1 << 0) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P1 (0x1 << 1) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P2 (0x1 << 2) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P3 (0x1 << 3) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P4 (0x1 << 4) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P5 (0x1 << 5) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P6 (0x1 << 6) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P7 (0x1 << 7) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P8 (0x1 << 8) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P9 (0x1 << 9) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P10 (0x1 << 10) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P11 (0x1 << 11) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P12 (0x1 << 12) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P13 (0x1 << 13) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P14 (0x1 << 14) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P15 (0x1 << 15) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P16 (0x1 << 16) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P17 (0x1 << 17) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P18 (0x1 << 18) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P19 (0x1 << 19) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P20 (0x1 << 20) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P21 (0x1 << 21) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P22 (0x1 << 22) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P23 (0x1 << 23) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P24 (0x1 << 24) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P25 (0x1 << 25) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P26 (0x1 << 26) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P27 (0x1 << 27) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P28 (0x1 << 28) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P29 (0x1 << 29) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P30 (0x1 << 30) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P31 (0x1 << 31) /**< \brief (PIO_CODR) Clear Output Data */ -/* -------- PIO_ODSR : (PIO Offset: 0x0038) Output Data Status Register -------- */ -#define PIO_ODSR_P0 (0x1 << 0) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P1 (0x1 << 1) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P2 (0x1 << 2) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P3 (0x1 << 3) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P4 (0x1 << 4) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P5 (0x1 << 5) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P6 (0x1 << 6) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P7 (0x1 << 7) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P8 (0x1 << 8) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P9 (0x1 << 9) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P10 (0x1 << 10) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P11 (0x1 << 11) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P12 (0x1 << 12) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P13 (0x1 << 13) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P14 (0x1 << 14) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P15 (0x1 << 15) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P16 (0x1 << 16) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P17 (0x1 << 17) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P18 (0x1 << 18) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P19 (0x1 << 19) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P20 (0x1 << 20) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P21 (0x1 << 21) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P22 (0x1 << 22) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P23 (0x1 << 23) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P24 (0x1 << 24) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P25 (0x1 << 25) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P26 (0x1 << 26) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P27 (0x1 << 27) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P28 (0x1 << 28) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P29 (0x1 << 29) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P30 (0x1 << 30) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P31 (0x1 << 31) /**< \brief (PIO_ODSR) Output Data Status */ -/* -------- PIO_PDSR : (PIO Offset: 0x003C) Pin Data Status Register -------- */ -#define PIO_PDSR_P0 (0x1 << 0) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P1 (0x1 << 1) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P2 (0x1 << 2) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P3 (0x1 << 3) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P4 (0x1 << 4) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P5 (0x1 << 5) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P6 (0x1 << 6) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P7 (0x1 << 7) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P8 (0x1 << 8) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P9 (0x1 << 9) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P10 (0x1 << 10) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P11 (0x1 << 11) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P12 (0x1 << 12) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P13 (0x1 << 13) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P14 (0x1 << 14) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P15 (0x1 << 15) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P16 (0x1 << 16) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P17 (0x1 << 17) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P18 (0x1 << 18) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P19 (0x1 << 19) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P20 (0x1 << 20) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P21 (0x1 << 21) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P22 (0x1 << 22) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P23 (0x1 << 23) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P24 (0x1 << 24) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P25 (0x1 << 25) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P26 (0x1 << 26) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P27 (0x1 << 27) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P28 (0x1 << 28) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P29 (0x1 << 29) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P30 (0x1 << 30) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P31 (0x1 << 31) /**< \brief (PIO_PDSR) Output Data Status */ -/* -------- PIO_IER : (PIO Offset: 0x0040) Interrupt Enable Register -------- */ -#define PIO_IER_P0 (0x1 << 0) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P1 (0x1 << 1) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P2 (0x1 << 2) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P3 (0x1 << 3) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P4 (0x1 << 4) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P5 (0x1 << 5) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P6 (0x1 << 6) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P7 (0x1 << 7) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P8 (0x1 << 8) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P9 (0x1 << 9) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P10 (0x1 << 10) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P11 (0x1 << 11) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P12 (0x1 << 12) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P13 (0x1 << 13) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P14 (0x1 << 14) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P15 (0x1 << 15) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P16 (0x1 << 16) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P17 (0x1 << 17) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P18 (0x1 << 18) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P19 (0x1 << 19) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P20 (0x1 << 20) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P21 (0x1 << 21) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P22 (0x1 << 22) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P23 (0x1 << 23) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P24 (0x1 << 24) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P25 (0x1 << 25) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P26 (0x1 << 26) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P27 (0x1 << 27) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P28 (0x1 << 28) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P29 (0x1 << 29) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P30 (0x1 << 30) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P31 (0x1 << 31) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -/* -------- PIO_IDR : (PIO Offset: 0x0044) Interrupt Disable Register -------- */ -#define PIO_IDR_P0 (0x1 << 0) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P1 (0x1 << 1) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P2 (0x1 << 2) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P3 (0x1 << 3) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P4 (0x1 << 4) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P5 (0x1 << 5) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P6 (0x1 << 6) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P7 (0x1 << 7) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P8 (0x1 << 8) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P9 (0x1 << 9) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P10 (0x1 << 10) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P11 (0x1 << 11) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P12 (0x1 << 12) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P13 (0x1 << 13) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P14 (0x1 << 14) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P15 (0x1 << 15) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P16 (0x1 << 16) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P17 (0x1 << 17) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P18 (0x1 << 18) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P19 (0x1 << 19) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P20 (0x1 << 20) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P21 (0x1 << 21) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P22 (0x1 << 22) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P23 (0x1 << 23) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P24 (0x1 << 24) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P25 (0x1 << 25) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P26 (0x1 << 26) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P27 (0x1 << 27) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P28 (0x1 << 28) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P29 (0x1 << 29) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P30 (0x1 << 30) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P31 (0x1 << 31) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -/* -------- PIO_IMR : (PIO Offset: 0x0048) Interrupt Mask Register -------- */ -#define PIO_IMR_P0 (0x1 << 0) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P1 (0x1 << 1) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P2 (0x1 << 2) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P3 (0x1 << 3) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P4 (0x1 << 4) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P5 (0x1 << 5) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P6 (0x1 << 6) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P7 (0x1 << 7) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P8 (0x1 << 8) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P9 (0x1 << 9) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P10 (0x1 << 10) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P11 (0x1 << 11) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P12 (0x1 << 12) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P13 (0x1 << 13) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P14 (0x1 << 14) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P15 (0x1 << 15) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P16 (0x1 << 16) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P17 (0x1 << 17) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P18 (0x1 << 18) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P19 (0x1 << 19) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P20 (0x1 << 20) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P21 (0x1 << 21) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P22 (0x1 << 22) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P23 (0x1 << 23) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P24 (0x1 << 24) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P25 (0x1 << 25) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P26 (0x1 << 26) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P27 (0x1 << 27) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P28 (0x1 << 28) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P29 (0x1 << 29) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P30 (0x1 << 30) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P31 (0x1 << 31) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -/* -------- PIO_ISR : (PIO Offset: 0x004C) Interrupt Status Register -------- */ -#define PIO_ISR_P0 (0x1 << 0) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P1 (0x1 << 1) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P2 (0x1 << 2) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P3 (0x1 << 3) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P4 (0x1 << 4) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P5 (0x1 << 5) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P6 (0x1 << 6) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P7 (0x1 << 7) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P8 (0x1 << 8) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P9 (0x1 << 9) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P10 (0x1 << 10) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P11 (0x1 << 11) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P12 (0x1 << 12) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P13 (0x1 << 13) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P14 (0x1 << 14) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P15 (0x1 << 15) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P16 (0x1 << 16) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P17 (0x1 << 17) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P18 (0x1 << 18) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P19 (0x1 << 19) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P20 (0x1 << 20) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P21 (0x1 << 21) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P22 (0x1 << 22) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P23 (0x1 << 23) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P24 (0x1 << 24) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P25 (0x1 << 25) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P26 (0x1 << 26) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P27 (0x1 << 27) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P28 (0x1 << 28) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P29 (0x1 << 29) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P30 (0x1 << 30) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P31 (0x1 << 31) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -/* -------- PIO_MDER : (PIO Offset: 0x0050) Multi-driver Enable Register -------- */ -#define PIO_MDER_P0 (0x1 << 0) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P1 (0x1 << 1) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P2 (0x1 << 2) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P3 (0x1 << 3) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P4 (0x1 << 4) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P5 (0x1 << 5) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P6 (0x1 << 6) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P7 (0x1 << 7) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P8 (0x1 << 8) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P9 (0x1 << 9) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P10 (0x1 << 10) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P11 (0x1 << 11) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P12 (0x1 << 12) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P13 (0x1 << 13) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P14 (0x1 << 14) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P15 (0x1 << 15) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P16 (0x1 << 16) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P17 (0x1 << 17) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P18 (0x1 << 18) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P19 (0x1 << 19) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P20 (0x1 << 20) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P21 (0x1 << 21) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P22 (0x1 << 22) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P23 (0x1 << 23) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P24 (0x1 << 24) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P25 (0x1 << 25) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P26 (0x1 << 26) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P27 (0x1 << 27) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P28 (0x1 << 28) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P29 (0x1 << 29) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P30 (0x1 << 30) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P31 (0x1 << 31) /**< \brief (PIO_MDER) Multi Drive Enable. */ -/* -------- PIO_MDDR : (PIO Offset: 0x0054) Multi-driver Disable Register -------- */ -#define PIO_MDDR_P0 (0x1 << 0) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P1 (0x1 << 1) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P2 (0x1 << 2) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P3 (0x1 << 3) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P4 (0x1 << 4) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P5 (0x1 << 5) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P6 (0x1 << 6) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P7 (0x1 << 7) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P8 (0x1 << 8) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P9 (0x1 << 9) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P10 (0x1 << 10) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P11 (0x1 << 11) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P12 (0x1 << 12) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P13 (0x1 << 13) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P14 (0x1 << 14) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P15 (0x1 << 15) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P16 (0x1 << 16) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P17 (0x1 << 17) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P18 (0x1 << 18) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P19 (0x1 << 19) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P20 (0x1 << 20) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P21 (0x1 << 21) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P22 (0x1 << 22) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P23 (0x1 << 23) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P24 (0x1 << 24) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P25 (0x1 << 25) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P26 (0x1 << 26) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P27 (0x1 << 27) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P28 (0x1 << 28) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P29 (0x1 << 29) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P30 (0x1 << 30) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P31 (0x1 << 31) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -/* -------- PIO_MDSR : (PIO Offset: 0x0058) Multi-driver Status Register -------- */ -#define PIO_MDSR_P0 (0x1 << 0) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P1 (0x1 << 1) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P2 (0x1 << 2) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P3 (0x1 << 3) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P4 (0x1 << 4) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P5 (0x1 << 5) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P6 (0x1 << 6) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P7 (0x1 << 7) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P8 (0x1 << 8) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P9 (0x1 << 9) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P10 (0x1 << 10) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P11 (0x1 << 11) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P12 (0x1 << 12) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P13 (0x1 << 13) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P14 (0x1 << 14) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P15 (0x1 << 15) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P16 (0x1 << 16) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P17 (0x1 << 17) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P18 (0x1 << 18) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P19 (0x1 << 19) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P20 (0x1 << 20) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P21 (0x1 << 21) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P22 (0x1 << 22) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P23 (0x1 << 23) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P24 (0x1 << 24) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P25 (0x1 << 25) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P26 (0x1 << 26) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P27 (0x1 << 27) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P28 (0x1 << 28) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P29 (0x1 << 29) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P30 (0x1 << 30) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P31 (0x1 << 31) /**< \brief (PIO_MDSR) Multi Drive Status. */ -/* -------- PIO_PUDR : (PIO Offset: 0x0060) Pull-up Disable Register -------- */ -#define PIO_PUDR_P0 (0x1 << 0) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P1 (0x1 << 1) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P2 (0x1 << 2) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P3 (0x1 << 3) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P4 (0x1 << 4) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P5 (0x1 << 5) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P6 (0x1 << 6) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P7 (0x1 << 7) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P8 (0x1 << 8) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P9 (0x1 << 9) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P10 (0x1 << 10) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P11 (0x1 << 11) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P12 (0x1 << 12) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P13 (0x1 << 13) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P14 (0x1 << 14) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P15 (0x1 << 15) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P16 (0x1 << 16) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P17 (0x1 << 17) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P18 (0x1 << 18) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P19 (0x1 << 19) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P20 (0x1 << 20) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P21 (0x1 << 21) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P22 (0x1 << 22) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P23 (0x1 << 23) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P24 (0x1 << 24) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P25 (0x1 << 25) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P26 (0x1 << 26) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P27 (0x1 << 27) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P28 (0x1 << 28) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P29 (0x1 << 29) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P30 (0x1 << 30) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P31 (0x1 << 31) /**< \brief (PIO_PUDR) Pull Up Disable. */ -/* -------- PIO_PUER : (PIO Offset: 0x0064) Pull-up Enable Register -------- */ -#define PIO_PUER_P0 (0x1 << 0) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P1 (0x1 << 1) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P2 (0x1 << 2) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P3 (0x1 << 3) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P4 (0x1 << 4) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P5 (0x1 << 5) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P6 (0x1 << 6) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P7 (0x1 << 7) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P8 (0x1 << 8) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P9 (0x1 << 9) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P10 (0x1 << 10) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P11 (0x1 << 11) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P12 (0x1 << 12) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P13 (0x1 << 13) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P14 (0x1 << 14) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P15 (0x1 << 15) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P16 (0x1 << 16) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P17 (0x1 << 17) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P18 (0x1 << 18) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P19 (0x1 << 19) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P20 (0x1 << 20) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P21 (0x1 << 21) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P22 (0x1 << 22) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P23 (0x1 << 23) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P24 (0x1 << 24) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P25 (0x1 << 25) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P26 (0x1 << 26) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P27 (0x1 << 27) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P28 (0x1 << 28) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P29 (0x1 << 29) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P30 (0x1 << 30) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P31 (0x1 << 31) /**< \brief (PIO_PUER) Pull Up Enable. */ -/* -------- PIO_PUSR : (PIO Offset: 0x0068) Pad Pull-up Status Register -------- */ -#define PIO_PUSR_P0 (0x1 << 0) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P1 (0x1 << 1) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P2 (0x1 << 2) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P3 (0x1 << 3) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P4 (0x1 << 4) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P5 (0x1 << 5) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P6 (0x1 << 6) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P7 (0x1 << 7) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P8 (0x1 << 8) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P9 (0x1 << 9) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P10 (0x1 << 10) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P11 (0x1 << 11) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P12 (0x1 << 12) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P13 (0x1 << 13) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P14 (0x1 << 14) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P15 (0x1 << 15) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P16 (0x1 << 16) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P17 (0x1 << 17) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P18 (0x1 << 18) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P19 (0x1 << 19) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P20 (0x1 << 20) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P21 (0x1 << 21) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P22 (0x1 << 22) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P23 (0x1 << 23) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P24 (0x1 << 24) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P25 (0x1 << 25) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P26 (0x1 << 26) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P27 (0x1 << 27) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P28 (0x1 << 28) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P29 (0x1 << 29) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P30 (0x1 << 30) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P31 (0x1 << 31) /**< \brief (PIO_PUSR) Pull Up Status. */ -/* -------- PIO_ABSR : (PIO Offset: 0x0070) Peripheral AB Select Register -------- */ -#define PIO_ABSR_P0 (0x1 << 0) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P1 (0x1 << 1) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P2 (0x1 << 2) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P3 (0x1 << 3) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P4 (0x1 << 4) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P5 (0x1 << 5) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P6 (0x1 << 6) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P7 (0x1 << 7) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P8 (0x1 << 8) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P9 (0x1 << 9) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P10 (0x1 << 10) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P11 (0x1 << 11) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P12 (0x1 << 12) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P13 (0x1 << 13) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P14 (0x1 << 14) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P15 (0x1 << 15) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P16 (0x1 << 16) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P17 (0x1 << 17) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P18 (0x1 << 18) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P19 (0x1 << 19) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P20 (0x1 << 20) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P21 (0x1 << 21) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P22 (0x1 << 22) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P23 (0x1 << 23) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P24 (0x1 << 24) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P25 (0x1 << 25) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P26 (0x1 << 26) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P27 (0x1 << 27) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P28 (0x1 << 28) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P29 (0x1 << 29) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P30 (0x1 << 30) /**< \brief (PIO_ABSR) Peripheral A Select. */ -#define PIO_ABSR_P31 (0x1 << 31) /**< \brief (PIO_ABSR) Peripheral A Select. */ -/* -------- PIO_SCIFSR : (PIO Offset: 0x0080) System Clock Glitch Input Filter Select Register -------- */ -#define PIO_SCIFSR_P0 (0x1 << 0) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P1 (0x1 << 1) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P2 (0x1 << 2) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P3 (0x1 << 3) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P4 (0x1 << 4) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P5 (0x1 << 5) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P6 (0x1 << 6) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P7 (0x1 << 7) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P8 (0x1 << 8) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P9 (0x1 << 9) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P10 (0x1 << 10) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P11 (0x1 << 11) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P12 (0x1 << 12) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P13 (0x1 << 13) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P14 (0x1 << 14) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P15 (0x1 << 15) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P16 (0x1 << 16) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P17 (0x1 << 17) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P18 (0x1 << 18) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P19 (0x1 << 19) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P20 (0x1 << 20) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P21 (0x1 << 21) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P22 (0x1 << 22) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P23 (0x1 << 23) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P24 (0x1 << 24) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P25 (0x1 << 25) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P26 (0x1 << 26) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P27 (0x1 << 27) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P28 (0x1 << 28) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P29 (0x1 << 29) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P30 (0x1 << 30) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -#define PIO_SCIFSR_P31 (0x1 << 31) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ -/* -------- PIO_DIFSR : (PIO Offset: 0x0084) Debouncing Input Filter Select Register -------- */ -#define PIO_DIFSR_P0 (0x1 << 0) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P1 (0x1 << 1) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P2 (0x1 << 2) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P3 (0x1 << 3) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P4 (0x1 << 4) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P5 (0x1 << 5) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P6 (0x1 << 6) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P7 (0x1 << 7) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P8 (0x1 << 8) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P9 (0x1 << 9) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P10 (0x1 << 10) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P11 (0x1 << 11) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P12 (0x1 << 12) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P13 (0x1 << 13) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P14 (0x1 << 14) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P15 (0x1 << 15) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P16 (0x1 << 16) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P17 (0x1 << 17) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P18 (0x1 << 18) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P19 (0x1 << 19) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P20 (0x1 << 20) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P21 (0x1 << 21) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P22 (0x1 << 22) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P23 (0x1 << 23) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P24 (0x1 << 24) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P25 (0x1 << 25) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P26 (0x1 << 26) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P27 (0x1 << 27) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P28 (0x1 << 28) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P29 (0x1 << 29) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P30 (0x1 << 30) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -#define PIO_DIFSR_P31 (0x1 << 31) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ -/* -------- PIO_IFDGSR : (PIO Offset: 0x0088) Glitch or Debouncing Input Filter Clock Selection Status Register -------- */ -#define PIO_IFDGSR_P0 (0x1 << 0) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P1 (0x1 << 1) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P2 (0x1 << 2) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P3 (0x1 << 3) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P4 (0x1 << 4) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P5 (0x1 << 5) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P6 (0x1 << 6) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P7 (0x1 << 7) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P8 (0x1 << 8) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P9 (0x1 << 9) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P10 (0x1 << 10) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P11 (0x1 << 11) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P12 (0x1 << 12) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P13 (0x1 << 13) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P14 (0x1 << 14) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P15 (0x1 << 15) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P16 (0x1 << 16) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P17 (0x1 << 17) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P18 (0x1 << 18) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P19 (0x1 << 19) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P20 (0x1 << 20) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P21 (0x1 << 21) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P22 (0x1 << 22) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P23 (0x1 << 23) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P24 (0x1 << 24) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P25 (0x1 << 25) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P26 (0x1 << 26) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P27 (0x1 << 27) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P28 (0x1 << 28) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P29 (0x1 << 29) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P30 (0x1 << 30) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFDGSR_P31 (0x1 << 31) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ -/* -------- PIO_SCDR : (PIO Offset: 0x008C) Slow Clock Divider Debouncing Register -------- */ -#define PIO_SCDR_DIV0 (0x1 << 0) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV1 (0x1 << 1) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV2 (0x1 << 2) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV3 (0x1 << 3) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV4 (0x1 << 4) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV5 (0x1 << 5) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV6 (0x1 << 6) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV7 (0x1 << 7) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV8 (0x1 << 8) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV9 (0x1 << 9) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV10 (0x1 << 10) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV11 (0x1 << 11) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV12 (0x1 << 12) /**< \brief (PIO_SCDR) */ -#define PIO_SCDR_DIV13 (0x1 << 13) /**< \brief (PIO_SCDR) */ -/* -------- PIO_OWER : (PIO Offset: 0x00A0) Output Write Enable -------- */ -#define PIO_OWER_P0 (0x1 << 0) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P1 (0x1 << 1) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P2 (0x1 << 2) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P3 (0x1 << 3) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P4 (0x1 << 4) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P5 (0x1 << 5) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P6 (0x1 << 6) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P7 (0x1 << 7) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P8 (0x1 << 8) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P9 (0x1 << 9) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P10 (0x1 << 10) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P11 (0x1 << 11) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P12 (0x1 << 12) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P13 (0x1 << 13) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P14 (0x1 << 14) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P15 (0x1 << 15) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P16 (0x1 << 16) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P17 (0x1 << 17) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P18 (0x1 << 18) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P19 (0x1 << 19) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P20 (0x1 << 20) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P21 (0x1 << 21) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P22 (0x1 << 22) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P23 (0x1 << 23) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P24 (0x1 << 24) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P25 (0x1 << 25) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P26 (0x1 << 26) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P27 (0x1 << 27) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P28 (0x1 << 28) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P29 (0x1 << 29) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P30 (0x1 << 30) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P31 (0x1 << 31) /**< \brief (PIO_OWER) Output Write Enable. */ -/* -------- PIO_OWDR : (PIO Offset: 0x00A4) Output Write Disable -------- */ -#define PIO_OWDR_P0 (0x1 << 0) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P1 (0x1 << 1) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P2 (0x1 << 2) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P3 (0x1 << 3) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P4 (0x1 << 4) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P5 (0x1 << 5) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P6 (0x1 << 6) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P7 (0x1 << 7) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P8 (0x1 << 8) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P9 (0x1 << 9) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P10 (0x1 << 10) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P11 (0x1 << 11) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P12 (0x1 << 12) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P13 (0x1 << 13) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P14 (0x1 << 14) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P15 (0x1 << 15) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P16 (0x1 << 16) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P17 (0x1 << 17) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P18 (0x1 << 18) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P19 (0x1 << 19) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P20 (0x1 << 20) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P21 (0x1 << 21) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P22 (0x1 << 22) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P23 (0x1 << 23) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P24 (0x1 << 24) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P25 (0x1 << 25) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P26 (0x1 << 26) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P27 (0x1 << 27) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P28 (0x1 << 28) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P29 (0x1 << 29) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P30 (0x1 << 30) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P31 (0x1 << 31) /**< \brief (PIO_OWDR) Output Write Disable. */ -/* -------- PIO_OWSR : (PIO Offset: 0x00A8) Output Write Status Register -------- */ -#define PIO_OWSR_P0 (0x1 << 0) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P1 (0x1 << 1) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P2 (0x1 << 2) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P3 (0x1 << 3) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P4 (0x1 << 4) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P5 (0x1 << 5) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P6 (0x1 << 6) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P7 (0x1 << 7) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P8 (0x1 << 8) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P9 (0x1 << 9) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P10 (0x1 << 10) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P11 (0x1 << 11) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P12 (0x1 << 12) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P13 (0x1 << 13) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P14 (0x1 << 14) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P15 (0x1 << 15) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P16 (0x1 << 16) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P17 (0x1 << 17) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P18 (0x1 << 18) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P19 (0x1 << 19) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P20 (0x1 << 20) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P21 (0x1 << 21) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P22 (0x1 << 22) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P23 (0x1 << 23) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P24 (0x1 << 24) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P25 (0x1 << 25) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P26 (0x1 << 26) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P27 (0x1 << 27) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P28 (0x1 << 28) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P29 (0x1 << 29) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P30 (0x1 << 30) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P31 (0x1 << 31) /**< \brief (PIO_OWSR) Output Write Status. */ -/* -------- PIO_AIMER : (PIO Offset: 0x00B0) Additional Interrupt Modes Enable Register -------- */ -#define PIO_AIMER_P0 (0x1 << 0) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P1 (0x1 << 1) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P2 (0x1 << 2) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P3 (0x1 << 3) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P4 (0x1 << 4) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P5 (0x1 << 5) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P6 (0x1 << 6) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P7 (0x1 << 7) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P8 (0x1 << 8) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P9 (0x1 << 9) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P10 (0x1 << 10) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P11 (0x1 << 11) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P12 (0x1 << 12) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P13 (0x1 << 13) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P14 (0x1 << 14) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P15 (0x1 << 15) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P16 (0x1 << 16) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P17 (0x1 << 17) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P18 (0x1 << 18) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P19 (0x1 << 19) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P20 (0x1 << 20) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P21 (0x1 << 21) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P22 (0x1 << 22) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P23 (0x1 << 23) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P24 (0x1 << 24) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P25 (0x1 << 25) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P26 (0x1 << 26) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P27 (0x1 << 27) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P28 (0x1 << 28) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P29 (0x1 << 29) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P30 (0x1 << 30) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P31 (0x1 << 31) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -/* -------- PIO_AIMDR : (PIO Offset: 0x00B4) Additional Interrupt Modes Disables Register -------- */ -#define PIO_AIMDR_P0 (0x1 << 0) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P1 (0x1 << 1) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P2 (0x1 << 2) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P3 (0x1 << 3) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P4 (0x1 << 4) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P5 (0x1 << 5) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P6 (0x1 << 6) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P7 (0x1 << 7) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P8 (0x1 << 8) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P9 (0x1 << 9) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P10 (0x1 << 10) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P11 (0x1 << 11) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P12 (0x1 << 12) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P13 (0x1 << 13) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P14 (0x1 << 14) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P15 (0x1 << 15) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P16 (0x1 << 16) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P17 (0x1 << 17) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P18 (0x1 << 18) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P19 (0x1 << 19) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P20 (0x1 << 20) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P21 (0x1 << 21) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P22 (0x1 << 22) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P23 (0x1 << 23) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P24 (0x1 << 24) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P25 (0x1 << 25) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P26 (0x1 << 26) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P27 (0x1 << 27) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P28 (0x1 << 28) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P29 (0x1 << 29) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P30 (0x1 << 30) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P31 (0x1 << 31) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -/* -------- PIO_AIMMR : (PIO Offset: 0x00B8) Additional Interrupt Modes Mask Register -------- */ -#define PIO_AIMMR_P0 (0x1 << 0) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P1 (0x1 << 1) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P2 (0x1 << 2) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P3 (0x1 << 3) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P4 (0x1 << 4) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P5 (0x1 << 5) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P6 (0x1 << 6) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P7 (0x1 << 7) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P8 (0x1 << 8) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P9 (0x1 << 9) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P10 (0x1 << 10) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P11 (0x1 << 11) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P12 (0x1 << 12) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P13 (0x1 << 13) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P14 (0x1 << 14) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P15 (0x1 << 15) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P16 (0x1 << 16) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P17 (0x1 << 17) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P18 (0x1 << 18) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P19 (0x1 << 19) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P20 (0x1 << 20) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P21 (0x1 << 21) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P22 (0x1 << 22) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P23 (0x1 << 23) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P24 (0x1 << 24) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P25 (0x1 << 25) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P26 (0x1 << 26) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P27 (0x1 << 27) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P28 (0x1 << 28) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P29 (0x1 << 29) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P30 (0x1 << 30) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P31 (0x1 << 31) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -/* -------- PIO_ESR : (PIO Offset: 0x00C0) Edge Select Register -------- */ -#define PIO_ESR_P0 (0x1 << 0) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P1 (0x1 << 1) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P2 (0x1 << 2) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P3 (0x1 << 3) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P4 (0x1 << 4) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P5 (0x1 << 5) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P6 (0x1 << 6) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P7 (0x1 << 7) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P8 (0x1 << 8) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P9 (0x1 << 9) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P10 (0x1 << 10) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P11 (0x1 << 11) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P12 (0x1 << 12) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P13 (0x1 << 13) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P14 (0x1 << 14) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P15 (0x1 << 15) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P16 (0x1 << 16) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P17 (0x1 << 17) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P18 (0x1 << 18) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P19 (0x1 << 19) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P20 (0x1 << 20) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P21 (0x1 << 21) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P22 (0x1 << 22) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P23 (0x1 << 23) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P24 (0x1 << 24) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P25 (0x1 << 25) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P26 (0x1 << 26) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P27 (0x1 << 27) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P28 (0x1 << 28) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P29 (0x1 << 29) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P30 (0x1 << 30) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P31 (0x1 << 31) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -/* -------- PIO_LSR : (PIO Offset: 0x00C4) Level Select Register -------- */ -#define PIO_LSR_P0 (0x1 << 0) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P1 (0x1 << 1) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P2 (0x1 << 2) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P3 (0x1 << 3) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P4 (0x1 << 4) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P5 (0x1 << 5) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P6 (0x1 << 6) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P7 (0x1 << 7) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P8 (0x1 << 8) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P9 (0x1 << 9) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P10 (0x1 << 10) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P11 (0x1 << 11) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P12 (0x1 << 12) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P13 (0x1 << 13) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P14 (0x1 << 14) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P15 (0x1 << 15) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P16 (0x1 << 16) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P17 (0x1 << 17) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P18 (0x1 << 18) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P19 (0x1 << 19) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P20 (0x1 << 20) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P21 (0x1 << 21) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P22 (0x1 << 22) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P23 (0x1 << 23) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P24 (0x1 << 24) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P25 (0x1 << 25) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P26 (0x1 << 26) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P27 (0x1 << 27) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P28 (0x1 << 28) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P29 (0x1 << 29) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P30 (0x1 << 30) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P31 (0x1 << 31) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -/* -------- PIO_ELSR : (PIO Offset: 0x00C8) Edge/Level Status Register -------- */ -#define PIO_ELSR_P0 (0x1 << 0) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P1 (0x1 << 1) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P2 (0x1 << 2) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P3 (0x1 << 3) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P4 (0x1 << 4) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P5 (0x1 << 5) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P6 (0x1 << 6) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P7 (0x1 << 7) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P8 (0x1 << 8) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P9 (0x1 << 9) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P10 (0x1 << 10) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P11 (0x1 << 11) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P12 (0x1 << 12) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P13 (0x1 << 13) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P14 (0x1 << 14) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P15 (0x1 << 15) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P16 (0x1 << 16) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P17 (0x1 << 17) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P18 (0x1 << 18) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P19 (0x1 << 19) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P20 (0x1 << 20) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P21 (0x1 << 21) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P22 (0x1 << 22) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P23 (0x1 << 23) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P24 (0x1 << 24) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P25 (0x1 << 25) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P26 (0x1 << 26) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P27 (0x1 << 27) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P28 (0x1 << 28) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P29 (0x1 << 29) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P30 (0x1 << 30) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P31 (0x1 << 31) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -/* -------- PIO_FELLSR : (PIO Offset: 0x00D0) Falling Edge/Low Level Select Register -------- */ -#define PIO_FELLSR_P0 (0x1 << 0) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P1 (0x1 << 1) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P2 (0x1 << 2) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P3 (0x1 << 3) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P4 (0x1 << 4) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P5 (0x1 << 5) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P6 (0x1 << 6) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P7 (0x1 << 7) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P8 (0x1 << 8) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P9 (0x1 << 9) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P10 (0x1 << 10) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P11 (0x1 << 11) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P12 (0x1 << 12) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P13 (0x1 << 13) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P14 (0x1 << 14) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P15 (0x1 << 15) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P16 (0x1 << 16) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P17 (0x1 << 17) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P18 (0x1 << 18) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P19 (0x1 << 19) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P20 (0x1 << 20) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P21 (0x1 << 21) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P22 (0x1 << 22) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P23 (0x1 << 23) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P24 (0x1 << 24) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P25 (0x1 << 25) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P26 (0x1 << 26) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P27 (0x1 << 27) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P28 (0x1 << 28) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P29 (0x1 << 29) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P30 (0x1 << 30) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P31 (0x1 << 31) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -/* -------- PIO_REHLSR : (PIO Offset: 0x00D4) Rising Edge/ High Level Select Register -------- */ -#define PIO_REHLSR_P0 (0x1 << 0) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P1 (0x1 << 1) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P2 (0x1 << 2) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P3 (0x1 << 3) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P4 (0x1 << 4) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P5 (0x1 << 5) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P6 (0x1 << 6) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P7 (0x1 << 7) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P8 (0x1 << 8) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P9 (0x1 << 9) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P10 (0x1 << 10) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P11 (0x1 << 11) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P12 (0x1 << 12) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P13 (0x1 << 13) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P14 (0x1 << 14) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P15 (0x1 << 15) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P16 (0x1 << 16) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P17 (0x1 << 17) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P18 (0x1 << 18) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P19 (0x1 << 19) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P20 (0x1 << 20) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P21 (0x1 << 21) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P22 (0x1 << 22) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P23 (0x1 << 23) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P24 (0x1 << 24) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P25 (0x1 << 25) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P26 (0x1 << 26) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P27 (0x1 << 27) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P28 (0x1 << 28) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P29 (0x1 << 29) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P30 (0x1 << 30) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P31 (0x1 << 31) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -/* -------- PIO_FRLHSR : (PIO Offset: 0x00D8) Fall/Rise - Low/High Status Register -------- */ -#define PIO_FRLHSR_P0 (0x1 << 0) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P1 (0x1 << 1) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P2 (0x1 << 2) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P3 (0x1 << 3) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P4 (0x1 << 4) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P5 (0x1 << 5) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P6 (0x1 << 6) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P7 (0x1 << 7) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P8 (0x1 << 8) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P9 (0x1 << 9) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P10 (0x1 << 10) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P11 (0x1 << 11) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P12 (0x1 << 12) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P13 (0x1 << 13) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P14 (0x1 << 14) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P15 (0x1 << 15) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P16 (0x1 << 16) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P17 (0x1 << 17) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P18 (0x1 << 18) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P19 (0x1 << 19) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P20 (0x1 << 20) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P21 (0x1 << 21) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P22 (0x1 << 22) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P23 (0x1 << 23) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P24 (0x1 << 24) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P25 (0x1 << 25) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P26 (0x1 << 26) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P27 (0x1 << 27) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P28 (0x1 << 28) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P29 (0x1 << 29) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P30 (0x1 << 30) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P31 (0x1 << 31) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -/* -------- PIO_LOCKSR : (PIO Offset: 0x00E0) Lock Status -------- */ -#define PIO_LOCKSR_P0 (0x1 << 0) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P1 (0x1 << 1) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P2 (0x1 << 2) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P3 (0x1 << 3) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P4 (0x1 << 4) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P5 (0x1 << 5) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P6 (0x1 << 6) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P7 (0x1 << 7) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P8 (0x1 << 8) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P9 (0x1 << 9) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P10 (0x1 << 10) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P11 (0x1 << 11) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P12 (0x1 << 12) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P13 (0x1 << 13) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P14 (0x1 << 14) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P15 (0x1 << 15) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P16 (0x1 << 16) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P17 (0x1 << 17) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P18 (0x1 << 18) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P19 (0x1 << 19) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P20 (0x1 << 20) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P21 (0x1 << 21) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P22 (0x1 << 22) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P23 (0x1 << 23) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P24 (0x1 << 24) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P25 (0x1 << 25) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P26 (0x1 << 26) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P27 (0x1 << 27) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P28 (0x1 << 28) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P29 (0x1 << 29) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P30 (0x1 << 30) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P31 (0x1 << 31) /**< \brief (PIO_LOCKSR) Lock Status. */ -/* -------- PIO_WPMR : (PIO Offset: 0x00E4) Write Protect Mode Register -------- */ -#define PIO_WPMR_WPEN (0x1 << 0) /**< \brief (PIO_WPMR) Write Protect Enable */ -#define PIO_WPMR_WPKEY (0xffffff << 8) /**< \brief (PIO_WPMR) Write Protect KEY */ -/* -------- PIO_WPSR : (PIO Offset: 0x00E8) Write Protect Status Register -------- */ -#define PIO_WPSR_WPVS (0x1 << 0) /**< \brief (PIO_WPSR) Write Protect Violation Status */ -#define PIO_WPSR_WPVSRC (0xffff << 8) /**< \brief (PIO_WPSR) Write Protect Violation Source */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Power Management Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_PMC Power Management Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pmc hardware registers */ -typedef struct { - WoReg PMC_SCER; /**< \brief (Pmc Offset: 0x0000) System Clock Enable Register */ - WoReg PMC_SCDR; /**< \brief (Pmc Offset: 0x0004) System Clock Disable Register */ - RoReg PMC_SCSR; /**< \brief (Pmc Offset: 0x0008) System Clock Status Register */ - RwReg Reserved1[1]; - WoReg PMC_PCER; /**< \brief (Pmc Offset: 0x0010) Peripheral Clock Enable Register */ - WoReg PMC_PCDR; /**< \brief (Pmc Offset: 0x0014) Peripheral Clock Disable Register */ - RoReg PMC_PCSR; /**< \brief (Pmc Offset: 0x0018) Peripheral Clock Status Register */ - RwReg CKGR_UCKR; /**< \brief (Pmc Offset: 0x001C) UTMI Clock Register */ - RwReg CKGR_MOR; /**< \brief (Pmc Offset: 0x0020) Main Oscillator Register */ - RoReg CKGR_MCFR; /**< \brief (Pmc Offset: 0x0024) Main Clock Frequency Register */ - RwReg CKGR_PLLAR; /**< \brief (Pmc Offset: 0x0028) PLLA Register */ - RwReg Reserved2[1]; - RwReg PMC_MCKR; /**< \brief (Pmc Offset: 0x0030) Master Clock Register */ - RwReg Reserved3[3]; - RwReg PMC_PCK[3]; /**< \brief (Pmc Offset: 0x0040) Programmable Clock 0 Register */ - RwReg Reserved4[5]; - WoReg PMC_IER; /**< \brief (Pmc Offset: 0x0060) Interrupt Enable Register */ - WoReg PMC_IDR; /**< \brief (Pmc Offset: 0x0064) Interrupt Disable Register */ - RoReg PMC_SR; /**< \brief (Pmc Offset: 0x0068) Status Register */ - RoReg PMC_IMR; /**< \brief (Pmc Offset: 0x006C) Interrupt Mask Register */ - RwReg PMC_FSMR; /**< \brief (Pmc Offset: 0x0070) Fast Startup Mode Register */ - RwReg PMC_FSPR; /**< \brief (Pmc Offset: 0x0074) Fast Startup Polarity Register */ - WoReg PMC_FOCR; /**< \brief (Pmc Offset: 0x0078) Fault Output Clear Register */ -} Pmc; -#endif /* __ASSEMBLY__ */ -/* -------- PMC_SCER : (PMC Offset: 0x0000) System Clock Enable Register -------- */ -#define PMC_SCER_PCK0 (0x1 << 8) /**< \brief (PMC_SCER) Programmable Clock 0 Output Enable */ -#define PMC_SCER_PCK1 (0x1 << 9) /**< \brief (PMC_SCER) Programmable Clock 1 Output Enable */ -#define PMC_SCER_PCK2 (0x1 << 10) /**< \brief (PMC_SCER) Programmable Clock 2 Output Enable */ -/* -------- PMC_SCDR : (PMC Offset: 0x0004) System Clock Disable Register -------- */ -#define PMC_SCDR_PCK0 (0x1 << 8) /**< \brief (PMC_SCDR) Programmable Clock 0 Output Disable */ -#define PMC_SCDR_PCK1 (0x1 << 9) /**< \brief (PMC_SCDR) Programmable Clock 1 Output Disable */ -#define PMC_SCDR_PCK2 (0x1 << 10) /**< \brief (PMC_SCDR) Programmable Clock 2 Output Disable */ -/* -------- PMC_SCSR : (PMC Offset: 0x0008) System Clock Status Register -------- */ -#define PMC_SCSR_PCK0 (0x1 << 8) /**< \brief (PMC_SCSR) Programmable Clock 0 Output Status */ -#define PMC_SCSR_PCK1 (0x1 << 9) /**< \brief (PMC_SCSR) Programmable Clock 1 Output Status */ -#define PMC_SCSR_PCK2 (0x1 << 10) /**< \brief (PMC_SCSR) Programmable Clock 2 Output Status */ -/* -------- PMC_PCER : (PMC Offset: 0x0010) Peripheral Clock Enable Register -------- */ -#define PMC_PCER_PID2 (0x1 << 2) /**< \brief (PMC_PCER) Peripheral Clock 2 Enable */ -#define PMC_PCER_PID3 (0x1 << 3) /**< \brief (PMC_PCER) Peripheral Clock 3 Enable */ -#define PMC_PCER_PID4 (0x1 << 4) /**< \brief (PMC_PCER) Peripheral Clock 4 Enable */ -#define PMC_PCER_PID5 (0x1 << 5) /**< \brief (PMC_PCER) Peripheral Clock 5 Enable */ -#define PMC_PCER_PID6 (0x1 << 6) /**< \brief (PMC_PCER) Peripheral Clock 6 Enable */ -#define PMC_PCER_PID7 (0x1 << 7) /**< \brief (PMC_PCER) Peripheral Clock 7 Enable */ -#define PMC_PCER_PID8 (0x1 << 8) /**< \brief (PMC_PCER) Peripheral Clock 8 Enable */ -#define PMC_PCER_PID9 (0x1 << 9) /**< \brief (PMC_PCER) Peripheral Clock 9 Enable */ -#define PMC_PCER_PID10 (0x1 << 10) /**< \brief (PMC_PCER) Peripheral Clock 10 Enable */ -#define PMC_PCER_PID11 (0x1 << 11) /**< \brief (PMC_PCER) Peripheral Clock 11 Enable */ -#define PMC_PCER_PID12 (0x1 << 12) /**< \brief (PMC_PCER) Peripheral Clock 12 Enable */ -#define PMC_PCER_PID13 (0x1 << 13) /**< \brief (PMC_PCER) Peripheral Clock 13 Enable */ -#define PMC_PCER_PID14 (0x1 << 14) /**< \brief (PMC_PCER) Peripheral Clock 14 Enable */ -#define PMC_PCER_PID15 (0x1 << 15) /**< \brief (PMC_PCER) Peripheral Clock 15 Enable */ -#define PMC_PCER_PID16 (0x1 << 16) /**< \brief (PMC_PCER) Peripheral Clock 16 Enable */ -#define PMC_PCER_PID17 (0x1 << 17) /**< \brief (PMC_PCER) Peripheral Clock 17 Enable */ -#define PMC_PCER_PID18 (0x1 << 18) /**< \brief (PMC_PCER) Peripheral Clock 18 Enable */ -#define PMC_PCER_PID19 (0x1 << 19) /**< \brief (PMC_PCER) Peripheral Clock 19 Enable */ -#define PMC_PCER_PID20 (0x1 << 20) /**< \brief (PMC_PCER) Peripheral Clock 20 Enable */ -#define PMC_PCER_PID21 (0x1 << 21) /**< \brief (PMC_PCER) Peripheral Clock 21 Enable */ -#define PMC_PCER_PID22 (0x1 << 22) /**< \brief (PMC_PCER) Peripheral Clock 22 Enable */ -#define PMC_PCER_PID23 (0x1 << 23) /**< \brief (PMC_PCER) Peripheral Clock 23 Enable */ -#define PMC_PCER_PID24 (0x1 << 24) /**< \brief (PMC_PCER) Peripheral Clock 24 Enable */ -#define PMC_PCER_PID25 (0x1 << 25) /**< \brief (PMC_PCER) Peripheral Clock 25 Enable */ -#define PMC_PCER_PID26 (0x1 << 26) /**< \brief (PMC_PCER) Peripheral Clock 26 Enable */ -#define PMC_PCER_PID27 (0x1 << 27) /**< \brief (PMC_PCER) Peripheral Clock 27 Enable */ -#define PMC_PCER_PID28 (0x1 << 28) /**< \brief (PMC_PCER) Peripheral Clock 28 Enable */ -#define PMC_PCER_PID29 (0x1 << 29) /**< \brief (PMC_PCER) Peripheral Clock 29 Enable */ -#define PMC_PCER_PID30 (0x1 << 30) /**< \brief (PMC_PCER) Peripheral Clock 30 Enable */ -#define PMC_PCER_PID31 (0x1 << 31) /**< \brief (PMC_PCER) Peripheral Clock 31 Enable */ -/* -------- PMC_PCDR : (PMC Offset: 0x0014) Peripheral Clock Disable Register -------- */ -#define PMC_PCDR_PID2 (0x1 << 2) /**< \brief (PMC_PCDR) Peripheral Clock 2 Disable */ -#define PMC_PCDR_PID3 (0x1 << 3) /**< \brief (PMC_PCDR) Peripheral Clock 3 Disable */ -#define PMC_PCDR_PID4 (0x1 << 4) /**< \brief (PMC_PCDR) Peripheral Clock 4 Disable */ -#define PMC_PCDR_PID5 (0x1 << 5) /**< \brief (PMC_PCDR) Peripheral Clock 5 Disable */ -#define PMC_PCDR_PID6 (0x1 << 6) /**< \brief (PMC_PCDR) Peripheral Clock 6 Disable */ -#define PMC_PCDR_PID7 (0x1 << 7) /**< \brief (PMC_PCDR) Peripheral Clock 7 Disable */ -#define PMC_PCDR_PID8 (0x1 << 8) /**< \brief (PMC_PCDR) Peripheral Clock 8 Disable */ -#define PMC_PCDR_PID9 (0x1 << 9) /**< \brief (PMC_PCDR) Peripheral Clock 9 Disable */ -#define PMC_PCDR_PID10 (0x1 << 10) /**< \brief (PMC_PCDR) Peripheral Clock 10 Disable */ -#define PMC_PCDR_PID11 (0x1 << 11) /**< \brief (PMC_PCDR) Peripheral Clock 11 Disable */ -#define PMC_PCDR_PID12 (0x1 << 12) /**< \brief (PMC_PCDR) Peripheral Clock 12 Disable */ -#define PMC_PCDR_PID13 (0x1 << 13) /**< \brief (PMC_PCDR) Peripheral Clock 13 Disable */ -#define PMC_PCDR_PID14 (0x1 << 14) /**< \brief (PMC_PCDR) Peripheral Clock 14 Disable */ -#define PMC_PCDR_PID15 (0x1 << 15) /**< \brief (PMC_PCDR) Peripheral Clock 15 Disable */ -#define PMC_PCDR_PID16 (0x1 << 16) /**< \brief (PMC_PCDR) Peripheral Clock 16 Disable */ -#define PMC_PCDR_PID17 (0x1 << 17) /**< \brief (PMC_PCDR) Peripheral Clock 17 Disable */ -#define PMC_PCDR_PID18 (0x1 << 18) /**< \brief (PMC_PCDR) Peripheral Clock 18 Disable */ -#define PMC_PCDR_PID19 (0x1 << 19) /**< \brief (PMC_PCDR) Peripheral Clock 19 Disable */ -#define PMC_PCDR_PID20 (0x1 << 20) /**< \brief (PMC_PCDR) Peripheral Clock 20 Disable */ -#define PMC_PCDR_PID21 (0x1 << 21) /**< \brief (PMC_PCDR) Peripheral Clock 21 Disable */ -#define PMC_PCDR_PID22 (0x1 << 22) /**< \brief (PMC_PCDR) Peripheral Clock 22 Disable */ -#define PMC_PCDR_PID23 (0x1 << 23) /**< \brief (PMC_PCDR) Peripheral Clock 23 Disable */ -#define PMC_PCDR_PID24 (0x1 << 24) /**< \brief (PMC_PCDR) Peripheral Clock 24 Disable */ -#define PMC_PCDR_PID25 (0x1 << 25) /**< \brief (PMC_PCDR) Peripheral Clock 25 Disable */ -#define PMC_PCDR_PID26 (0x1 << 26) /**< \brief (PMC_PCDR) Peripheral Clock 26 Disable */ -#define PMC_PCDR_PID27 (0x1 << 27) /**< \brief (PMC_PCDR) Peripheral Clock 27 Disable */ -#define PMC_PCDR_PID28 (0x1 << 28) /**< \brief (PMC_PCDR) Peripheral Clock 28 Disable */ -#define PMC_PCDR_PID29 (0x1 << 29) /**< \brief (PMC_PCDR) Peripheral Clock 29 Disable */ -#define PMC_PCDR_PID30 (0x1 << 30) /**< \brief (PMC_PCDR) Peripheral Clock 30 Disable */ -#define PMC_PCDR_PID31 (0x1 << 31) /**< \brief (PMC_PCDR) Peripheral Clock 31 Disable */ -/* -------- PMC_PCSR : (PMC Offset: 0x0018) Peripheral Clock Status Register -------- */ -#define PMC_PCSR_PID2 (0x1 << 2) /**< \brief (PMC_PCSR) Peripheral Clock 2 Status */ -#define PMC_PCSR_PID3 (0x1 << 3) /**< \brief (PMC_PCSR) Peripheral Clock 3 Status */ -#define PMC_PCSR_PID4 (0x1 << 4) /**< \brief (PMC_PCSR) Peripheral Clock 4 Status */ -#define PMC_PCSR_PID5 (0x1 << 5) /**< \brief (PMC_PCSR) Peripheral Clock 5 Status */ -#define PMC_PCSR_PID6 (0x1 << 6) /**< \brief (PMC_PCSR) Peripheral Clock 6 Status */ -#define PMC_PCSR_PID7 (0x1 << 7) /**< \brief (PMC_PCSR) Peripheral Clock 7 Status */ -#define PMC_PCSR_PID8 (0x1 << 8) /**< \brief (PMC_PCSR) Peripheral Clock 8 Status */ -#define PMC_PCSR_PID9 (0x1 << 9) /**< \brief (PMC_PCSR) Peripheral Clock 9 Status */ -#define PMC_PCSR_PID10 (0x1 << 10) /**< \brief (PMC_PCSR) Peripheral Clock 10 Status */ -#define PMC_PCSR_PID11 (0x1 << 11) /**< \brief (PMC_PCSR) Peripheral Clock 11 Status */ -#define PMC_PCSR_PID12 (0x1 << 12) /**< \brief (PMC_PCSR) Peripheral Clock 12 Status */ -#define PMC_PCSR_PID13 (0x1 << 13) /**< \brief (PMC_PCSR) Peripheral Clock 13 Status */ -#define PMC_PCSR_PID14 (0x1 << 14) /**< \brief (PMC_PCSR) Peripheral Clock 14 Status */ -#define PMC_PCSR_PID15 (0x1 << 15) /**< \brief (PMC_PCSR) Peripheral Clock 15 Status */ -#define PMC_PCSR_PID16 (0x1 << 16) /**< \brief (PMC_PCSR) Peripheral Clock 16 Status */ -#define PMC_PCSR_PID17 (0x1 << 17) /**< \brief (PMC_PCSR) Peripheral Clock 17 Status */ -#define PMC_PCSR_PID18 (0x1 << 18) /**< \brief (PMC_PCSR) Peripheral Clock 18 Status */ -#define PMC_PCSR_PID19 (0x1 << 19) /**< \brief (PMC_PCSR) Peripheral Clock 19 Status */ -#define PMC_PCSR_PID20 (0x1 << 20) /**< \brief (PMC_PCSR) Peripheral Clock 20 Status */ -#define PMC_PCSR_PID21 (0x1 << 21) /**< \brief (PMC_PCSR) Peripheral Clock 21 Status */ -#define PMC_PCSR_PID22 (0x1 << 22) /**< \brief (PMC_PCSR) Peripheral Clock 22 Status */ -#define PMC_PCSR_PID23 (0x1 << 23) /**< \brief (PMC_PCSR) Peripheral Clock 23 Status */ -#define PMC_PCSR_PID24 (0x1 << 24) /**< \brief (PMC_PCSR) Peripheral Clock 24 Status */ -#define PMC_PCSR_PID25 (0x1 << 25) /**< \brief (PMC_PCSR) Peripheral Clock 25 Status */ -#define PMC_PCSR_PID26 (0x1 << 26) /**< \brief (PMC_PCSR) Peripheral Clock 26 Status */ -#define PMC_PCSR_PID27 (0x1 << 27) /**< \brief (PMC_PCSR) Peripheral Clock 27 Status */ -#define PMC_PCSR_PID28 (0x1 << 28) /**< \brief (PMC_PCSR) Peripheral Clock 28 Status */ -#define PMC_PCSR_PID29 (0x1 << 29) /**< \brief (PMC_PCSR) Peripheral Clock 29 Status */ -#define PMC_PCSR_PID30 (0x1 << 30) /**< \brief (PMC_PCSR) Peripheral Clock 30 Status */ -#define PMC_PCSR_PID31 (0x1 << 31) /**< \brief (PMC_PCSR) Peripheral Clock 31 Status */ -/* -------- CKGR_UCKR : (PMC Offset: 0x001C) UTMI Clock Register -------- */ -#define CKGR_UCKR_UPLLEN (0x1 << 16) /**< \brief (CKGR_UCKR) UTMI PLL Enable */ -#define CKGR_UCKR_UPLLCOUNT (0xf << 20) /**< \brief (CKGR_UCKR) UTMI PLL Start-up Time */ -/* -------- CKGR_MOR : (PMC Offset: 0x0020) Main Oscillator Register -------- */ -#define CKGR_MOR_MOSCXTEN (0x1 << 0) /**< \brief (CKGR_MOR) Main Crystal Oscillator Enable */ -#define CKGR_MOR_MOSCXTBY (0x1 << 1) /**< \brief (CKGR_MOR) Main Crystal Oscillator Bypass */ -#define CKGR_MOR_WAITMODE (0x1 << 2) /**< \brief (CKGR_MOR) Wait Mode Command */ -#define CKGR_MOR_MOSCRCEN (0x1 << 3) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Enable */ -#define CKGR_MOR_MOSCRCF (0x7 << 4) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Frequency Selection */ -#define CKGR_MOR_MOSCXTST (0xff << 8) /**< \brief (CKGR_MOR) Main Crystal Oscillator Start-up Time */ -#define CKGR_MOR_KEY (0xff << 16) /**< \brief (CKGR_MOR) Password */ -#define CKGR_MOR_MOSCSEL (0x1 << 24) /**< \brief (CKGR_MOR) Main Oscillator Selection */ -#define CKGR_MOR_CFDEN (0x1 << 25) /**< \brief (CKGR_MOR) Clock Failure Detector Enable */ -/* -------- CKGR_MCFR : (PMC Offset: 0x0024) Main Clock Frequency Register -------- */ -#define CKGR_MCFR_MAINF (0xffff << 0) /**< \brief (CKGR_MCFR) Main Clock Frequency */ -#define CKGR_MCFR_MAINFRDY (0x1 << 16) /**< \brief (CKGR_MCFR) Main Clock Ready */ -/* -------- CKGR_PLLAR : (PMC Offset: 0x0028) PLLA Register -------- */ -#define CKGR_PLLAR_DIVA (0xff << 0) /**< \brief (CKGR_PLLAR) Divider */ -#define CKGR_PLLAR_PLLACOUNT (0x3f << 8) /**< \brief (CKGR_PLLAR) PLLA Counter */ -#define CKGR_PLLAR_STMODE (0x3 << 14) /**< \brief (CKGR_PLLAR) Start Mode */ -#define CKGR_PLLAR_MULA (0x7ff << 16) /**< \brief (CKGR_PLLAR) PLLA Multiplier */ -#define CKGR_PLLAR_STUCKTO1 (0x1 << 29) /**< \brief (CKGR_PLLAR) */ -/* -------- PMC_MCKR : (PMC Offset: 0x0030) Master Clock Register -------- */ -#define PMC_MCKR_CSS (0x3 << 0) /**< \brief (PMC_MCKR) Master Clock Source Selection */ -#define PMC_MCKR_CSS_SLOW_CLK (0x0 << 0) /**< \brief (PMC_MCKR) Slow Clock is selected */ -#define PMC_MCKR_CSS_MAIN_CLK (0x1 << 0) /**< \brief (PMC_MCKR) Main Clock is selected */ -#define PMC_MCKR_CSS_PLLA_CLK (0x2 << 0) /**< \brief (PMC_MCKR) PLLA Clock is selected */ -#define PMC_MCKR_CSS_PLLB_CLK (0x3 << 0) /**< \brief (PMC_MCKR) UPLL Clock is selected */ -#define PMC_MCKR_PRES (0x7 << 4) /**< \brief (PMC_MCKR) Processor Clock Prescaler */ -#define PMC_MCKR_PRES_CLK (0x0 << 4) /**< \brief (PMC_MCKR) Selected clock */ -#define PMC_MCKR_PRES_CLK_2 (0x1 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 2 */ -#define PMC_MCKR_PRES_CLK_4 (0x2 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 4 */ -#define PMC_MCKR_PRES_CLK_8 (0x3 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 8 */ -#define PMC_MCKR_PRES_CLK_16 (0x4 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 16 */ -#define PMC_MCKR_PRES_CLK_32 (0x5 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 32 */ -#define PMC_MCKR_PRES_CLK_64 (0x6 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 64 */ -/* -------- PMC_PCK[3] : (PMC Offset: 0x0040) Programmable Clock 0 Register -------- */ -#define PMC_PCK_CSS (0x7 << 0) /**< \brief (PMC_PCK[3]) Master Clock Source Selection */ -#define PMC_PCK_PRES (0x7 << 4) /**< \brief (PMC_PCK[3]) Programmable Clock Prescaler */ -/* -------- PMC_IER : (PMC Offset: 0x0060) Interrupt Enable Register -------- */ -#define PMC_IER_MOSCXTS (0x1 << 0) /**< \brief (PMC_IER) Main Crystal Oscillator Status Interrupt Enable */ -#define PMC_IER_LOCKA (0x1 << 1) /**< \brief (PMC_IER) PLL A Lock Interrupt Enable */ -#define PMC_IER_MCKRDY (0x1 << 3) /**< \brief (PMC_IER) Master Clock Ready Interrupt Enable */ -#define PMC_IER_LOCKU (0x1 << 6) /**< \brief (PMC_IER) UTMI PLL Lock Interrupt Enable */ -#define PMC_IER_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IER) Programmable Clock Ready 0 Interrupt Enable */ -#define PMC_IER_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IER) Programmable Clock Ready 1 Interrupt Enable */ -#define PMC_IER_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IER) Programmable Clock Ready 2 Interrupt Enable */ -#define PMC_IER_MOSCSELS (0x1 << 16) /**< \brief (PMC_IER) Main Oscillator Selection Status Interrupt Enable */ -#define PMC_IER_MOSCRCS (0x1 << 17) /**< \brief (PMC_IER) Main On-Chip RC Status Interrupt Enable */ -#define PMC_IER_CFDEV (0x1 << 18) /**< \brief (PMC_IER) Clock Failure Detector Event Interrupt Enable */ -/* -------- PMC_IDR : (PMC Offset: 0x0064) Interrupt Disable Register -------- */ -#define PMC_IDR_MOSCXTS (0x1 << 0) /**< \brief (PMC_IDR) Main Crystal Oscillator Status Interrupt Disable */ -#define PMC_IDR_LOCKA (0x1 << 1) /**< \brief (PMC_IDR) PLL A Lock Interrupt Disable */ -#define PMC_IDR_MCKRDY (0x1 << 3) /**< \brief (PMC_IDR) Master Clock Ready Interrupt Disable */ -#define PMC_IDR_LOCKU (0x1 << 6) /**< \brief (PMC_IDR) UTMI PLL Lock Interrupt Disable */ -#define PMC_IDR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IDR) Programmable Clock Ready 0 Interrupt Disable */ -#define PMC_IDR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IDR) Programmable Clock Ready 1 Interrupt Disable */ -#define PMC_IDR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IDR) Programmable Clock Ready 2 Interrupt Disable */ -#define PMC_IDR_MOSCSELS (0x1 << 16) /**< \brief (PMC_IDR) Main Oscillator Selection Status Interrupt Disable */ -#define PMC_IDR_MOSCRCS (0x1 << 17) /**< \brief (PMC_IDR) Main On-Chip RC Status Interrupt Disable */ -#define PMC_IDR_CFDEV (0x1 << 18) /**< \brief (PMC_IDR) Clock Failure Detector Event Interrupt Disable */ -/* -------- PMC_SR : (PMC Offset: 0x0068) Status Register -------- */ -#define PMC_SR_MOSCXTS (0x1 << 0) /**< \brief (PMC_SR) Main XTAL Oscillator Status */ -#define PMC_SR_LOCKA (0x1 << 1) /**< \brief (PMC_SR) PLL A Lock Status */ -#define PMC_SR_MCKRDY (0x1 << 3) /**< \brief (PMC_SR) Master Clock Status */ -#define PMC_SR_LOCKU (0x1 << 6) /**< \brief (PMC_SR) UTMI PLL Lock Status */ -#define PMC_SR_OSCSELS (0x1 << 7) /**< \brief (PMC_SR) Slow Clock Oscillator Selection */ -#define PMC_SR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_MOSCSELS (0x1 << 16) /**< \brief (PMC_SR) Main Oscillator Selection Status */ -#define PMC_SR_MOSCRCS (0x1 << 17) /**< \brief (PMC_SR) Main On-Chip RC Oscillator Status */ -#define PMC_SR_CFDEV (0x1 << 18) /**< \brief (PMC_SR) Clock Failure Detector Event */ -#define PMC_SR_CFDS (0x1 << 19) /**< \brief (PMC_SR) Clock Failure Detector Status */ -#define PMC_SR_FOS (0x1 << 20) /**< \brief (PMC_SR) Clock Failure Detector Fault Output Status */ -/* -------- PMC_IMR : (PMC Offset: 0x006C) Interrupt Mask Register -------- */ -#define PMC_IMR_MOSCXTS (0x1 << 0) /**< \brief (PMC_IMR) Main Crystal Oscillator Status Interrupt Mask */ -#define PMC_IMR_LOCKA (0x1 << 1) /**< \brief (PMC_IMR) PLL A Lock Interrupt Mask */ -#define PMC_IMR_MCKRDY (0x1 << 3) /**< \brief (PMC_IMR) Master Clock Ready Interrupt Mask */ -#define PMC_IMR_LOCKU (0x1 << 6) /**< \brief (PMC_IMR) UTMI PLL Lock Interrupt Mask */ -#define PMC_IMR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IMR) Programmable Clock Ready 0 Interrupt Mask */ -#define PMC_IMR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IMR) Programmable Clock Ready 1 Interrupt Mask */ -#define PMC_IMR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IMR) Programmable Clock Ready 2 Interrupt Mask */ -#define PMC_IMR_MOSCSELS (0x1 << 16) /**< \brief (PMC_IMR) Main Oscillator Selection Status Interrupt Mask */ -#define PMC_IMR_MOSCRCS (0x1 << 17) /**< \brief (PMC_IMR) Main On-Chip RC Status Interrupt Mask */ -#define PMC_IMR_CFDEV (0x1 << 18) /**< \brief (PMC_IMR) Clock Failure Detector Event Interrupt Mask */ -/* -------- PMC_FSMR : (PMC Offset: 0x0070) Fast Startup Mode Register -------- */ -#define PMC_FSMR_FSTT0 (0x1 << 0) /**< \brief (PMC_FSMR) Fast Startup Input Enable 0 */ -#define PMC_FSMR_FSTT1 (0x1 << 1) /**< \brief (PMC_FSMR) Fast Startup Input Enable 1 */ -#define PMC_FSMR_FSTT2 (0x1 << 2) /**< \brief (PMC_FSMR) Fast Startup Input Enable 2 */ -#define PMC_FSMR_FSTT3 (0x1 << 3) /**< \brief (PMC_FSMR) Fast Startup Input Enable 3 */ -#define PMC_FSMR_FSTT4 (0x1 << 4) /**< \brief (PMC_FSMR) Fast Startup Input Enable 4 */ -#define PMC_FSMR_FSTT5 (0x1 << 5) /**< \brief (PMC_FSMR) Fast Startup Input Enable 5 */ -#define PMC_FSMR_FSTT6 (0x1 << 6) /**< \brief (PMC_FSMR) Fast Startup Input Enable 6 */ -#define PMC_FSMR_FSTT7 (0x1 << 7) /**< \brief (PMC_FSMR) Fast Startup Input Enable 7 */ -#define PMC_FSMR_FSTT8 (0x1 << 8) /**< \brief (PMC_FSMR) Fast Startup Input Enable 8 */ -#define PMC_FSMR_FSTT9 (0x1 << 9) /**< \brief (PMC_FSMR) Fast Startup Input Enable 9 */ -#define PMC_FSMR_FSTT10 (0x1 << 10) /**< \brief (PMC_FSMR) Fast Startup Input Enable 10 */ -#define PMC_FSMR_FSTT11 (0x1 << 11) /**< \brief (PMC_FSMR) Fast Startup Input Enable 11 */ -#define PMC_FSMR_FSTT12 (0x1 << 12) /**< \brief (PMC_FSMR) Fast Startup Input Enable 12 */ -#define PMC_FSMR_FSTT13 (0x1 << 13) /**< \brief (PMC_FSMR) Fast Startup Input Enable 13 */ -#define PMC_FSMR_FSTT14 (0x1 << 14) /**< \brief (PMC_FSMR) Fast Startup Input Enable 14 */ -#define PMC_FSMR_FSTT15 (0x1 << 15) /**< \brief (PMC_FSMR) Fast Startup Input Enable 15 */ -#define PMC_FSMR_RTTAL (0x1 << 16) /**< \brief (PMC_FSMR) RTT Alarm Enable */ -#define PMC_FSMR_RTCAL (0x1 << 17) /**< \brief (PMC_FSMR) RTC Alarm Enable */ -#define PMC_FSMR_USBAL (0x1 << 18) /**< \brief (PMC_FSMR) USB Alarm Enable */ -#define PMC_FSMR_LPM (0x1 << 20) /**< \brief (PMC_FSMR) Low Power Mode */ -/* -------- PMC_FSPR : (PMC Offset: 0x0074) Fast Startup Polarity Register -------- */ -#define PMC_FSPR_FSTP0 (0x1 << 0) /**< \brief (PMC_FSPR) Fast Startup Input Polarity 0 */ -#define PMC_FSPR_FSTP1 (0x1 << 1) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP2 (0x1 << 2) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP3 (0x1 << 3) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP4 (0x1 << 4) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP5 (0x1 << 5) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP6 (0x1 << 6) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP7 (0x1 << 7) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP8 (0x1 << 8) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP9 (0x1 << 9) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP10 (0x1 << 10) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP11 (0x1 << 11) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP12 (0x1 << 12) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP13 (0x1 << 13) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP14 (0x1 << 14) /**< \brief (PMC_FSPR) */ -#define PMC_FSPR_FSTP15 (0x1 << 15) /**< \brief (PMC_FSPR) */ -/* -------- PMC_FOCR : (PMC Offset: 0x0078) Fault Output Clear Register -------- */ -#define PMC_FOCR_FOCLR (0x1 << 0) /**< \brief (PMC_FOCR) Fault Output Clear */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Pulse Width Modulation Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_PWM Pulse Width Modulation Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief PwmCh_num hardware registers */ -typedef struct { - RwReg PWM_CMR; /**< \brief (PwmCh_num Offset: 0x0) PWM Channel Mode Register */ - RwReg PWM_CDTY; /**< \brief (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register */ - RwReg PWM_CDTYUPD; /**< \brief (PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register */ - RwReg PWM_CPRD; /**< \brief (PwmCh_num Offset: 0xC) PWM Channel Period Register */ - RwReg PWM_CPRDUPD; /**< \brief (PwmCh_num Offset: 0x10) PWM Channel Period Update Register */ - RwReg PWM_CCNT; /**< \brief (PwmCh_num Offset: 0x14) PWM Channel Counter Register */ - RwReg PWM_DT; /**< \brief (PwmCh_num Offset: 0x18) PWM Channel Dead Time Register */ - RwReg PWM_DTUPD; /**< \brief (PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register */ -} PwmCh_num; -/** \brief Pwm hardware registers */ -typedef struct { - RwReg PWM_CLK; /**< \brief (Pwm Offset: 0x00) PWM Clock Register */ - WoReg PWM_ENA; /**< \brief (Pwm Offset: 0x04) PWM Enable Register */ - WoReg PWM_DIS; /**< \brief (Pwm Offset: 0x08) PWM Disable Register */ - RoReg PWM_SR; /**< \brief (Pwm Offset: 0x0C) PWM Status Register */ - WoReg PWM_IER1; /**< \brief (Pwm Offset: 0x10) PWM Interrupt Enable Register 1 */ - WoReg PWM_IDR1; /**< \brief (Pwm Offset: 0x14) PWM Interrupt Disable Register 1 */ - RoReg PWM_IMR1; /**< \brief (Pwm Offset: 0x18) PWM Interrupt Mask Register 1 */ - RoReg PWM_ISR1; /**< \brief (Pwm Offset: 0x1C) PWM Interrupt Status Register 1 */ - RwReg PWM_SCM; /**< \brief (Pwm Offset: 0x20) PWM Sync Channels Mode Register */ - RwReg Reserved1[1]; - RwReg PWM_SCUC; /**< \brief (Pwm Offset: 0x28) PWM Sync Channels Update Control Register */ - RwReg PWM_SCUP; /**< \brief (Pwm Offset: 0x2C) PWM Sync Channels Update Period Register */ - WoReg PWM_SCUPUPD; /**< \brief (Pwm Offset: 0x30) PWM Sync Channels Update Period Update Register */ - WoReg PWM_IER2; /**< \brief (Pwm Offset: 0x34) PWM Interrupt Enable Register 2 */ - WoReg PWM_IDR2; /**< \brief (Pwm Offset: 0x38) PWM Interrupt Disable Register 2 */ - RoReg PWM_IMR2; /**< \brief (Pwm Offset: 0x3C) PWM Interrupt Mask Register 2 */ - RoReg PWM_ISR2; /**< \brief (Pwm Offset: 0x40) PWM Interrupt Status Register 2 */ - RwReg PWM_OOV; /**< \brief (Pwm Offset: 0x44) PWM Output Override Value Register */ - RwReg PWM_OS; /**< \brief (Pwm Offset: 0x48) PWM Output Selection Register */ - WoReg PWM_OSS; /**< \brief (Pwm Offset: 0x4C) PWM Output Selection Set Register */ - WoReg PWM_OSC; /**< \brief (Pwm Offset: 0x50) PWM Output Selection Clear Register */ - WoReg PWM_OSSUPD; /**< \brief (Pwm Offset: 0x54) PWM Output Selection Set Update Register */ - WoReg PWM_OSCUPD; /**< \brief (Pwm Offset: 0x58) PWM Output Selection Clear Update Register */ - RwReg PWM_FMR; /**< \brief (Pwm Offset: 0x5C) PWM Fault Mode Register */ - RoReg PWM_FSR; /**< \brief (Pwm Offset: 0x60) PWM Fault Status Register */ - WoReg PWM_FCR; /**< \brief (Pwm Offset: 0x64) PWM Fault Clear Register */ - RwReg PWM_FPV; /**< \brief (Pwm Offset: 0x68) PWM Fault Protection Value Register */ - RwReg PWM_FPE; /**< \brief (Pwm Offset: 0x6C) PWM Fault Protection Enable Register */ - RwReg Reserved2[3]; - RwReg PWM_ELxMR[2]; /**< \brief (Pwm Offset: 0x7C) PWM Event Line 0 Mode Register */ - RwReg Reserved3[24]; - WoReg PWM_WPCR; /**< \brief (Pwm Offset: 0xE4) PWM Write Protect Control Register */ - RoReg PWM_WPSR; /**< \brief (Pwm Offset: 0xE8) PWM Write Protect Status Register */ - RwReg Reserved4[5]; - RwReg PWM_RPR; /**< \brief (Pwm Offset: 0x100) Receive Pointer Register */ - RwReg PWM_RCR; /**< \brief (Pwm Offset: 0x104) Receive Counter Register */ - RwReg PWM_TPR; /**< \brief (Pwm Offset: 0x108) Transmit Pointer Register */ - RwReg PWM_TCR; /**< \brief (Pwm Offset: 0x10C) Transmit Counter Register */ - RwReg PWM_RNPR; /**< \brief (Pwm Offset: 0x110) Receive Next Pointer Register */ - RwReg PWM_RNCR; /**< \brief (Pwm Offset: 0x114) Receive Next Counter Register */ - RwReg PWM_TNPR; /**< \brief (Pwm Offset: 0x118) Transmit Next Pointer Register */ - RwReg PWM_TNCR; /**< \brief (Pwm Offset: 0x11C) Transmit Next Counter Register */ - WoReg PWM_PTCR; /**< \brief (Pwm Offset: 0x120) Transfer Control Register */ - RoReg PWM_PTSR; /**< \brief (Pwm Offset: 0x124) Transfer Status Register */ - RwReg Reserved5[2]; - RwReg PWM_CMP0V; /**< \brief (Pwm Offset: 0x130) PWM Comparison 0 Value Register */ - WoReg PWM_CMP0VUPD; /**< \brief (Pwm Offset: 0x134) PWM Comparison 0 Value Update Register */ - RwReg PWM_CMP0M; /**< \brief (Pwm Offset: 0x138) PWM Comparison 0 Mode Register */ - WoReg PWM_CMP0MUPD; /**< \brief (Pwm Offset: 0x13C) PWM Comparison 0 Mode Update Register */ - RwReg PWM_CMP1V; /**< \brief (Pwm Offset: 0x140) PWM Comparison 1 Value Register */ - WoReg PWM_CMP1VUPD; /**< \brief (Pwm Offset: 0x144) PWM Comparison 1 Value Update Register */ - RwReg PWM_CMP1M; /**< \brief (Pwm Offset: 0x148) PWM Comparison 1 Mode Register */ - WoReg PWM_CMP1MUPD; /**< \brief (Pwm Offset: 0x14C) PWM Comparison 1 Mode Update Register */ - RwReg PWM_CMP2V; /**< \brief (Pwm Offset: 0x150) PWM Comparison 2 Value Register */ - WoReg PWM_CMP2VUPD; /**< \brief (Pwm Offset: 0x154) PWM Comparison 2 Value Update Register */ - RwReg PWM_CMP2M; /**< \brief (Pwm Offset: 0x158) PWM Comparison 2 Mode Register */ - WoReg PWM_CMP2MUPD; /**< \brief (Pwm Offset: 0x15C) PWM Comparison 2 Mode Update Register */ - RwReg PWM_CMP3V; /**< \brief (Pwm Offset: 0x160) PWM Comparison 3 Value Register */ - WoReg PWM_CMP3VUPD; /**< \brief (Pwm Offset: 0x164) PWM Comparison 3 Value Update Register */ - RwReg PWM_CMP3M; /**< \brief (Pwm Offset: 0x168) PWM Comparison 3 Mode Register */ - WoReg PWM_CMP3MUPD; /**< \brief (Pwm Offset: 0x16C) PWM Comparison 3 Mode Update Register */ - RwReg PWM_CMP4V; /**< \brief (Pwm Offset: 0x170) PWM Comparison 4 Value Register */ - WoReg PWM_CMP4VUPD; /**< \brief (Pwm Offset: 0x174) PWM Comparison 4 Value Update Register */ - RwReg PWM_CMP4M; /**< \brief (Pwm Offset: 0x178) PWM Comparison 4 Mode Register */ - WoReg PWM_CMP4MUPD; /**< \brief (Pwm Offset: 0x17C) PWM Comparison 4 Mode Update Register */ - RwReg PWM_CMP5V; /**< \brief (Pwm Offset: 0x180) PWM Comparison 5 Value Register */ - WoReg PWM_CMP5VUPD; /**< \brief (Pwm Offset: 0x184) PWM Comparison 5 Value Update Register */ - RwReg PWM_CMP5M; /**< \brief (Pwm Offset: 0x188) PWM Comparison 5 Mode Register */ - WoReg PWM_CMP5MUPD; /**< \brief (Pwm Offset: 0x18C) PWM Comparison 5 Mode Update Register */ - RwReg PWM_CMP6V; /**< \brief (Pwm Offset: 0x190) PWM Comparison 6 Value Register */ - WoReg PWM_CMP6VUPD; /**< \brief (Pwm Offset: 0x194) PWM Comparison 6 Value Update Register */ - RwReg PWM_CMP6M; /**< \brief (Pwm Offset: 0x198) PWM Comparison 6 Mode Register */ - WoReg PWM_CMP6MUPD; /**< \brief (Pwm Offset: 0x19C) PWM Comparison 6 Mode Update Register */ - RwReg PWM_CMP7V; /**< \brief (Pwm Offset: 0x1A0) PWM Comparison 7 Value Register */ - WoReg PWM_CMP7VUPD; /**< \brief (Pwm Offset: 0x1A4) PWM Comparison 7 Value Update Register */ - RwReg PWM_CMP7M; /**< \brief (Pwm Offset: 0x1A8) PWM Comparison 7 Mode Register */ - WoReg PWM_CMP7MUPD; /**< \brief (Pwm Offset: 0x1AC) PWM Comparison 7 Mode Update Register */ - RwReg Reserved6[20]; - PwmCh_num PWM_CH_NUM[4]; /**< \brief (Pwm Offset: 0x200) ch_num = 0 .. 3 */ -} Pwm; -#endif /* __ASSEMBLY__ */ -/* -------- PWM_CLK : (PWM Offset: 0x00) PWM Clock Register -------- */ -#define PWM_CLK_DIVA (0xff << 0) /**< \brief (PWM_CLK) CLKA, CLKB Divide Factor */ -#define PWM_CLK_PREA (0xf << 8) /**< \brief (PWM_CLK) CLKA, CLKB Source Clock Selection */ -#define PWM_CLK_DIVB (0xff << 16) /**< \brief (PWM_CLK) CLKA, CLKB Divide Factor */ -#define PWM_CLK_PREB (0xf << 24) /**< \brief (PWM_CLK) CLKA, CLKB Source Clock Selection */ -/* -------- PWM_ENA : (PWM Offset: 0x04) PWM Enable Register -------- */ -#define PWM_ENA_CHID0 (0x1 << 0) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID1 (0x1 << 1) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID2 (0x1 << 2) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID3 (0x1 << 3) /**< \brief (PWM_ENA) Channel ID */ -/* -------- PWM_DIS : (PWM Offset: 0x08) PWM Disable Register -------- */ -#define PWM_DIS_CHID0 (0x1 << 0) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID1 (0x1 << 1) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID2 (0x1 << 2) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID3 (0x1 << 3) /**< \brief (PWM_DIS) Channel ID */ -/* -------- PWM_SR : (PWM Offset: 0x0C) PWM Status Register -------- */ -#define PWM_SR_CHID0 (0x1 << 0) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID1 (0x1 << 1) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID2 (0x1 << 2) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID3 (0x1 << 3) /**< \brief (PWM_SR) Channel ID */ -/* -------- PWM_IER1 : (PWM Offset: 0x10) PWM Interrupt Enable Register 1 -------- */ -#define PWM_IER1_CHID0 (0x1 << 0) /**< \brief (PWM_IER1) Counter Event on Channel 0 Interrupt Enable */ -#define PWM_IER1_CHID1 (0x1 << 1) /**< \brief (PWM_IER1) Counter Event on Channel 1 Interrupt Enable */ -#define PWM_IER1_CHID2 (0x1 << 2) /**< \brief (PWM_IER1) Counter Event on Channel 2 Interrupt Enable */ -#define PWM_IER1_CHID3 (0x1 << 3) /**< \brief (PWM_IER1) Counter Event on Channel 3 Interrupt Enable */ -#define PWM_IER1_FCHID0 (0x1 << 16) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 0 Interrupt Enable */ -#define PWM_IER1_FCHID1 (0x1 << 17) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 1 Interrupt Enable */ -#define PWM_IER1_FCHID2 (0x1 << 18) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 2 Interrupt Enable */ -#define PWM_IER1_FCHID3 (0x1 << 19) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 3 Interrupt Enable */ -/* -------- PWM_IDR1 : (PWM Offset: 0x14) PWM Interrupt Disable Register 1 -------- */ -#define PWM_IDR1_CHID0 (0x1 << 0) /**< \brief (PWM_IDR1) Counter Event on Channel 0 Interrupt Disable */ -#define PWM_IDR1_CHID1 (0x1 << 1) /**< \brief (PWM_IDR1) Counter Event on Channel 1 Interrupt Disable */ -#define PWM_IDR1_CHID2 (0x1 << 2) /**< \brief (PWM_IDR1) Counter Event on Channel 2 Interrupt Disable */ -#define PWM_IDR1_CHID3 (0x1 << 3) /**< \brief (PWM_IDR1) Counter Event on Channel 3 Interrupt Disable */ -#define PWM_IDR1_FCHID0 (0x1 << 16) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 0 Interrupt Disable */ -#define PWM_IDR1_FCHID1 (0x1 << 17) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 1 Interrupt Disable */ -#define PWM_IDR1_FCHID2 (0x1 << 18) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 2 Interrupt Disable */ -#define PWM_IDR1_FCHID3 (0x1 << 19) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 3 Interrupt Disable */ -/* -------- PWM_IMR1 : (PWM Offset: 0x18) PWM Interrupt Mask Register 1 -------- */ -#define PWM_IMR1_CHID0 (0x1 << 0) /**< \brief (PWM_IMR1) Counter Event on Channel 0 Interrupt Mask */ -#define PWM_IMR1_CHID1 (0x1 << 1) /**< \brief (PWM_IMR1) Counter Event on Channel 1 Interrupt Mask */ -#define PWM_IMR1_CHID2 (0x1 << 2) /**< \brief (PWM_IMR1) Counter Event on Channel 2 Interrupt Mask */ -#define PWM_IMR1_CHID3 (0x1 << 3) /**< \brief (PWM_IMR1) Counter Event on Channel 3 Interrupt Mask */ -#define PWM_IMR1_FCHID0 (0x1 << 16) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 0 Interrupt Mask */ -#define PWM_IMR1_FCHID1 (0x1 << 17) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 1 Interrupt Mask */ -#define PWM_IMR1_FCHID2 (0x1 << 18) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 2 Interrupt Mask */ -#define PWM_IMR1_FCHID3 (0x1 << 19) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 3 Interrupt Mask */ -/* -------- PWM_ISR1 : (PWM Offset: 0x1C) PWM Interrupt Status Register 1 -------- */ -#define PWM_ISR1_CHID0 (0x1 << 0) /**< \brief (PWM_ISR1) Counter Event on Channel 0 */ -#define PWM_ISR1_CHID1 (0x1 << 1) /**< \brief (PWM_ISR1) Counter Event on Channel 1 */ -#define PWM_ISR1_CHID2 (0x1 << 2) /**< \brief (PWM_ISR1) Counter Event on Channel 2 */ -#define PWM_ISR1_CHID3 (0x1 << 3) /**< \brief (PWM_ISR1) Counter Event on Channel 3 */ -#define PWM_ISR1_FCHID0 (0x1 << 16) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 0 */ -#define PWM_ISR1_FCHID1 (0x1 << 17) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 1 */ -#define PWM_ISR1_FCHID2 (0x1 << 18) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 2 */ -#define PWM_ISR1_FCHID3 (0x1 << 19) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 3 */ -/* -------- PWM_SCM : (PWM Offset: 0x20) PWM Sync Channels Mode Register -------- */ -#define PWM_SCM_SYNC0 (0x1 << 0) /**< \brief (PWM_SCM) Synchronous Channel 0 */ -#define PWM_SCM_SYNC1 (0x1 << 1) /**< \brief (PWM_SCM) Synchronous Channel 1 */ -#define PWM_SCM_SYNC2 (0x1 << 2) /**< \brief (PWM_SCM) Synchronous Channel 2 */ -#define PWM_SCM_SYNC3 (0x1 << 3) /**< \brief (PWM_SCM) Synchronous Channel 3 */ -#define PWM_SCM_UPDM (0x3 << 16) /**< \brief (PWM_SCM) Synchronous Channels Update Mode */ -#define PWM_SCM_UPDM_MODE0 (0x0 << 16) // (PWMC) Manual write of data and manual trigger of the update -#define PWM_SCM_UPDM_MODE1 (0x1 << 16) // (PWMC) Manual write of data and automatic trigger of the update -#define PWM_SCM_UPDM_MODE2 (0x2 << 16) // (PWMC) Automatic write of data and automatic trigger of the update -#define PWM_SCM_PTRM (0x1 << 20) /**< \brief (PWM_SCM) PDC Transfer Request Mode */ -#define PWM_SCM_PTRCS (0x7 << 21) /**< \brief (PWM_SCM) PDC Transfer Request Comparison Selection */ -/* -------- PWM_SCUC : (PWM Offset: 0x28) PWM Sync Channels Update Control Register -------- */ -#define PWM_SCUC_UPDULOCK (0x1 << 0) /**< \brief (PWM_SCUC) Synchronous Channels Update Unlock */ -/* -------- PWM_SCUP : (PWM Offset: 0x2C) PWM Sync Channels Update Period Register -------- */ -#define PWM_SCUP_UPR (0xf << 0) /**< \brief (PWM_SCUP) Update Period */ -#define PWM_SCUP_UPRCNT (0xf << 4) /**< \brief (PWM_SCUP) Update Period Counter */ -/* -------- PWM_SCUPUPD : (PWM Offset: 0x30) PWM Sync Channels Update Period Update Register -------- */ -#define PWM_SCUPUPD_UPRUPD (0xf << 0) /**< \brief (PWM_SCUPUPD) Update Period Update */ -/* -------- PWM_IER2 : (PWM Offset: 0x34) PWM Interrupt Enable Register 2 -------- */ -#define PWM_IER2_WRDY (0x1 << 0) /**< \brief (PWM_IER2) Write Ready for Synchronous Channels Update Interrupt Enable */ -#define PWM_IER2_ENDTX (0x1 << 1) /**< \brief (PWM_IER2) PDC End of TX Buffer Interrupt Enable */ -#define PWM_IER2_TXBUFE (0x1 << 2) /**< \brief (PWM_IER2) PDC TX Buffer Empty Interrupt Enable */ -#define PWM_IER2_UNRE (0x1 << 3) /**< \brief (PWM_IER2) Synchronous Channels Update Underrun Error Interrupt Enable */ -#define PWM_IER2_CMPM0 (0x1 << 8) /**< \brief (PWM_IER2) Comparison 0 Match Interrupt Enable */ -#define PWM_IER2_CMPM1 (0x1 << 9) /**< \brief (PWM_IER2) Comparison 1 Match Interrupt Enable */ -#define PWM_IER2_CMPM2 (0x1 << 10) /**< \brief (PWM_IER2) Comparison 2 Match Interrupt Enable */ -#define PWM_IER2_CMPM3 (0x1 << 11) /**< \brief (PWM_IER2) Comparison 3 Match Interrupt Enable */ -#define PWM_IER2_CMPM4 (0x1 << 12) /**< \brief (PWM_IER2) Comparison 4 Match Interrupt Enable */ -#define PWM_IER2_CMPM5 (0x1 << 13) /**< \brief (PWM_IER2) Comparison 5 Match Interrupt Enable */ -#define PWM_IER2_CMPM6 (0x1 << 14) /**< \brief (PWM_IER2) Comparison 6 Match Interrupt Enable */ -#define PWM_IER2_CMPM7 (0x1 << 15) /**< \brief (PWM_IER2) Comparison 7 Match Interrupt Enable */ -#define PWM_IER2_CMPU0 (0x1 << 16) /**< \brief (PWM_IER2) Comparison 0 Update Interrupt Enable */ -#define PWM_IER2_CMPU1 (0x1 << 17) /**< \brief (PWM_IER2) Comparison 1 Update Interrupt Enable */ -#define PWM_IER2_CMPU2 (0x1 << 18) /**< \brief (PWM_IER2) Comparison 2 Update Interrupt Enable */ -#define PWM_IER2_CMPU3 (0x1 << 19) /**< \brief (PWM_IER2) Comparison 3 Update Interrupt Enable */ -#define PWM_IER2_CMPU4 (0x1 << 20) /**< \brief (PWM_IER2) Comparison 4 Update Interrupt Enable */ -#define PWM_IER2_CMPU5 (0x1 << 21) /**< \brief (PWM_IER2) Comparison 5 Update Interrupt Enable */ -#define PWM_IER2_CMPU6 (0x1 << 22) /**< \brief (PWM_IER2) Comparison 6 Update Interrupt Enable */ -#define PWM_IER2_CMPU7 (0x1 << 23) /**< \brief (PWM_IER2) Comparison 7 Update Interrupt Enable */ -/* -------- PWM_IDR2 : (PWM Offset: 0x38) PWM Interrupt Disable Register 2 -------- */ -#define PWM_IDR2_WRDY (0x1 << 0) /**< \brief (PWM_IDR2) Write Ready for Synchronous Channels Update Interrupt Disable */ -#define PWM_IDR2_ENDTX (0x1 << 1) /**< \brief (PWM_IDR2) PDC End of TX Buffer Interrupt Disable */ -#define PWM_IDR2_TXBUFE (0x1 << 2) /**< \brief (PWM_IDR2) PDC TX Buffer Empty Interrupt Disable */ -#define PWM_IDR2_UNRE (0x1 << 3) /**< \brief (PWM_IDR2) Synchronous Channels Update Underrun Error Interrupt Disable */ -#define PWM_IDR2_CMPM0 (0x1 << 8) /**< \brief (PWM_IDR2) Comparison 0 Match Interrupt Disable */ -#define PWM_IDR2_CMPM1 (0x1 << 9) /**< \brief (PWM_IDR2) Comparison 1 Match Interrupt Disable */ -#define PWM_IDR2_CMPM2 (0x1 << 10) /**< \brief (PWM_IDR2) Comparison 2 Match Interrupt Disable */ -#define PWM_IDR2_CMPM3 (0x1 << 11) /**< \brief (PWM_IDR2) Comparison 3 Match Interrupt Disable */ -#define PWM_IDR2_CMPM4 (0x1 << 12) /**< \brief (PWM_IDR2) Comparison 4 Match Interrupt Disable */ -#define PWM_IDR2_CMPM5 (0x1 << 13) /**< \brief (PWM_IDR2) Comparison 5 Match Interrupt Disable */ -#define PWM_IDR2_CMPM6 (0x1 << 14) /**< \brief (PWM_IDR2) Comparison 6 Match Interrupt Disable */ -#define PWM_IDR2_CMPM7 (0x1 << 15) /**< \brief (PWM_IDR2) Comparison 7 Match Interrupt Disable */ -#define PWM_IDR2_CMPU0 (0x1 << 16) /**< \brief (PWM_IDR2) Comparison 0 Update Interrupt Disable */ -#define PWM_IDR2_CMPU1 (0x1 << 17) /**< \brief (PWM_IDR2) Comparison 1 Update Interrupt Disable */ -#define PWM_IDR2_CMPU2 (0x1 << 18) /**< \brief (PWM_IDR2) Comparison 2 Update Interrupt Disable */ -#define PWM_IDR2_CMPU3 (0x1 << 19) /**< \brief (PWM_IDR2) Comparison 3 Update Interrupt Disable */ -#define PWM_IDR2_CMPU4 (0x1 << 20) /**< \brief (PWM_IDR2) Comparison 4 Update Interrupt Disable */ -#define PWM_IDR2_CMPU5 (0x1 << 21) /**< \brief (PWM_IDR2) Comparison 5 Update Interrupt Disable */ -#define PWM_IDR2_CMPU6 (0x1 << 22) /**< \brief (PWM_IDR2) Comparison 6 Update Interrupt Disable */ -#define PWM_IDR2_CMPU7 (0x1 << 23) /**< \brief (PWM_IDR2) Comparison 7 Update Interrupt Disable */ -/* -------- PWM_IMR2 : (PWM Offset: 0x3C) PWM Interrupt Mask Register 2 -------- */ -#define PWM_IMR2_WRDY (0x1 << 0) /**< \brief (PWM_IMR2) Write Ready for Synchronous Channels Update Interrupt Mask */ -#define PWM_IMR2_ENDTX (0x1 << 1) /**< \brief (PWM_IMR2) PDC End of TX Buffer Interrupt Mask */ -#define PWM_IMR2_TXBUFE (0x1 << 2) /**< \brief (PWM_IMR2) PDC TX Buffer Empty Interrupt Mask */ -#define PWM_IMR2_UNRE (0x1 << 3) /**< \brief (PWM_IMR2) Synchronous Channels Update Underrun Error Interrupt Mask */ -#define PWM_IMR2_CMPM0 (0x1 << 8) /**< \brief (PWM_IMR2) Comparison 0 Match Interrupt Mask */ -#define PWM_IMR2_CMPM1 (0x1 << 9) /**< \brief (PWM_IMR2) Comparison 1 Match Interrupt Mask */ -#define PWM_IMR2_CMPM2 (0x1 << 10) /**< \brief (PWM_IMR2) Comparison 2 Match Interrupt Mask */ -#define PWM_IMR2_CMPM3 (0x1 << 11) /**< \brief (PWM_IMR2) Comparison 3 Match Interrupt Mask */ -#define PWM_IMR2_CMPM4 (0x1 << 12) /**< \brief (PWM_IMR2) Comparison 4 Match Interrupt Mask */ -#define PWM_IMR2_CMPM5 (0x1 << 13) /**< \brief (PWM_IMR2) Comparison 5 Match Interrupt Mask */ -#define PWM_IMR2_CMPM6 (0x1 << 14) /**< \brief (PWM_IMR2) Comparison 6 Match Interrupt Mask */ -#define PWM_IMR2_CMPM7 (0x1 << 15) /**< \brief (PWM_IMR2) Comparison 7 Match Interrupt Mask */ -#define PWM_IMR2_CMPU0 (0x1 << 16) /**< \brief (PWM_IMR2) Comparison 0 Update Interrupt Mask */ -#define PWM_IMR2_CMPU1 (0x1 << 17) /**< \brief (PWM_IMR2) Comparison 1 Update Interrupt Mask */ -#define PWM_IMR2_CMPU2 (0x1 << 18) /**< \brief (PWM_IMR2) Comparison 2 Update Interrupt Mask */ -#define PWM_IMR2_CMPU3 (0x1 << 19) /**< \brief (PWM_IMR2) Comparison 3 Update Interrupt Mask */ -#define PWM_IMR2_CMPU4 (0x1 << 20) /**< \brief (PWM_IMR2) Comparison 4 Update Interrupt Mask */ -#define PWM_IMR2_CMPU5 (0x1 << 21) /**< \brief (PWM_IMR2) Comparison 5 Update Interrupt Mask */ -#define PWM_IMR2_CMPU6 (0x1 << 22) /**< \brief (PWM_IMR2) Comparison 6 Update Interrupt Mask */ -#define PWM_IMR2_CMPU7 (0x1 << 23) /**< \brief (PWM_IMR2) Comparison 7 Update Interrupt Mask */ -/* -------- PWM_ISR2 : (PWM Offset: 0x40) PWM Interrupt Status Register 2 -------- */ -#define PWM_ISR2_WRDY (0x1 << 0) /**< \brief (PWM_ISR2) Write Ready for Synchronous Channels Update */ -#define PWM_ISR2_ENDTX (0x1 << 1) /**< \brief (PWM_ISR2) PDC End of TX Buffer */ -#define PWM_ISR2_TXBUFE (0x1 << 2) /**< \brief (PWM_ISR2) PDC TX Buffer Empty */ -#define PWM_ISR2_UNRE (0x1 << 3) /**< \brief (PWM_ISR2) Synchronous Channels Update Underrun Error */ -#define PWM_ISR2_CMPM0 (0x1 << 8) /**< \brief (PWM_ISR2) Comparison 0 Match */ -#define PWM_ISR2_CMPM1 (0x1 << 9) /**< \brief (PWM_ISR2) Comparison 1 Match */ -#define PWM_ISR2_CMPM2 (0x1 << 10) /**< \brief (PWM_ISR2) Comparison 2 Match */ -#define PWM_ISR2_CMPM3 (0x1 << 11) /**< \brief (PWM_ISR2) Comparison 3 Match */ -#define PWM_ISR2_CMPM4 (0x1 << 12) /**< \brief (PWM_ISR2) Comparison 4 Match */ -#define PWM_ISR2_CMPM5 (0x1 << 13) /**< \brief (PWM_ISR2) Comparison 5 Match */ -#define PWM_ISR2_CMPM6 (0x1 << 14) /**< \brief (PWM_ISR2) Comparison 6 Match */ -#define PWM_ISR2_CMPM7 (0x1 << 15) /**< \brief (PWM_ISR2) Comparison 7 Match */ -#define PWM_ISR2_CMPU0 (0x1 << 16) /**< \brief (PWM_ISR2) Comparison 0 Update */ -#define PWM_ISR2_CMPU1 (0x1 << 17) /**< \brief (PWM_ISR2) Comparison 1 Update */ -#define PWM_ISR2_CMPU2 (0x1 << 18) /**< \brief (PWM_ISR2) Comparison 2 Update */ -#define PWM_ISR2_CMPU3 (0x1 << 19) /**< \brief (PWM_ISR2) Comparison 3 Update */ -#define PWM_ISR2_CMPU4 (0x1 << 20) /**< \brief (PWM_ISR2) Comparison 4 Update */ -#define PWM_ISR2_CMPU5 (0x1 << 21) /**< \brief (PWM_ISR2) Comparison 5 Update */ -#define PWM_ISR2_CMPU6 (0x1 << 22) /**< \brief (PWM_ISR2) Comparison 6 Update */ -#define PWM_ISR2_CMPU7 (0x1 << 23) /**< \brief (PWM_ISR2) Comparison 7 Update */ -/* -------- PWM_OOV : (PWM Offset: 0x44) PWM Output Override Value Register -------- */ -#define PWM_OOV_OOVH0 (0x1 << 0) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 0 */ -#define PWM_OOV_OOVH1 (0x1 << 1) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 1 */ -#define PWM_OOV_OOVH2 (0x1 << 2) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 2 */ -#define PWM_OOV_OOVH3 (0x1 << 3) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 3 */ -#define PWM_OOV_OOVL0 (0x1 << 16) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 0 */ -#define PWM_OOV_OOVL1 (0x1 << 17) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 1 */ -#define PWM_OOV_OOVL2 (0x1 << 18) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 2 */ -#define PWM_OOV_OOVL3 (0x1 << 19) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 3 */ -/* -------- PWM_OS : (PWM Offset: 0x48) PWM Output Selection Register -------- */ -#define PWM_OS_OSH0 (0x1 << 0) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 0 */ -#define PWM_OS_OSH1 (0x1 << 1) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 1 */ -#define PWM_OS_OSH2 (0x1 << 2) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 2 */ -#define PWM_OS_OSH3 (0x1 << 3) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 3 */ -#define PWM_OS_OSL0 (0x1 << 16) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 0 */ -#define PWM_OS_OSL1 (0x1 << 17) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 1 */ -#define PWM_OS_OSL2 (0x1 << 18) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 2 */ -#define PWM_OS_OSL3 (0x1 << 19) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 3 */ -/* -------- PWM_OSS : (PWM Offset: 0x4C) PWM Output Selection Set Register -------- */ -#define PWM_OSS_OSSH0 (0x1 << 0) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 0 */ -#define PWM_OSS_OSSH1 (0x1 << 1) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 1 */ -#define PWM_OSS_OSSH2 (0x1 << 2) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 2 */ -#define PWM_OSS_OSSH3 (0x1 << 3) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 3 */ -#define PWM_OSS_OSSL0 (0x1 << 16) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 0 */ -#define PWM_OSS_OSSL1 (0x1 << 17) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 1 */ -#define PWM_OSS_OSSL2 (0x1 << 18) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 2 */ -#define PWM_OSS_OSSL3 (0x1 << 19) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 3 */ -/* -------- PWM_OSC : (PWM Offset: 0x50) PWM Output Selection Clear Register -------- */ -#define PWM_OSC_OSCH0 (0x1 << 0) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 0 */ -#define PWM_OSC_OSCH1 (0x1 << 1) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 1 */ -#define PWM_OSC_OSCH2 (0x1 << 2) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 2 */ -#define PWM_OSC_OSCH3 (0x1 << 3) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 3 */ -#define PWM_OSC_OSCL0 (0x1 << 16) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 0 */ -#define PWM_OSC_OSCL1 (0x1 << 17) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 1 */ -#define PWM_OSC_OSCL2 (0x1 << 18) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 2 */ -#define PWM_OSC_OSCL3 (0x1 << 19) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 3 */ -/* -------- PWM_OSSUPD : (PWM Offset: 0x54) PWM Output Selection Set Update Register -------- */ -#define PWM_OSSUPD_OSSUPH0 (0x1 << 0) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 0 */ -#define PWM_OSSUPD_OSSUPH1 (0x1 << 1) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 1 */ -#define PWM_OSSUPD_OSSUPH2 (0x1 << 2) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 2 */ -#define PWM_OSSUPD_OSSUPH3 (0x1 << 3) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 3 */ -#define PWM_OSSUPD_OSSUPL0 (0x1 << 16) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 0 */ -#define PWM_OSSUPD_OSSUPL1 (0x1 << 17) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 1 */ -#define PWM_OSSUPD_OSSUPL2 (0x1 << 18) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 2 */ -#define PWM_OSSUPD_OSSUPL3 (0x1 << 19) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 3 */ -/* -------- PWM_OSCUPD : (PWM Offset: 0x58) PWM Output Selection Clear Update Register -------- */ -#define PWM_OSCUPD_OSCUPH0 (0x1 << 0) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 0 */ -#define PWM_OSCUPD_OSCUPH1 (0x1 << 1) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 1 */ -#define PWM_OSCUPD_OSCUPH2 (0x1 << 2) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 2 */ -#define PWM_OSCUPD_OSCUPH3 (0x1 << 3) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 3 */ -#define PWM_OSCUPD_OSCUPL0 (0x1 << 16) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 0 */ -#define PWM_OSCUPD_OSCUPL1 (0x1 << 17) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 1 */ -#define PWM_OSCUPD_OSCUPL2 (0x1 << 18) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 2 */ -#define PWM_OSCUPD_OSCUPL3 (0x1 << 19) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 3 */ -/* -------- PWM_FMR : (PWM Offset: 0x5C) PWM Fault Mode Register -------- */ -#define PWM_FMR_FPOL0 (0x1 << 0) /**< \brief (PWM_FMR) Fault 0 Polarity */ -#define PWM_FMR_FPOL1 (0x1 << 1) /**< \brief (PWM_FMR) Fault 1 Polarity */ -#define PWM_FMR_FPOL2 (0x1 << 2) /**< \brief (PWM_FMR) Fault 2 Polarity */ -#define PWM_FMR_FPOL3 (0x1 << 3) /**< \brief (PWM_FMR) Fault 3 Polarity */ -#define PWM_FMR_FMOD0 (0x1 << 8) /**< \brief (PWM_FMR) Fault 0 Activation Mode */ -#define PWM_FMR_FMOD1 (0x1 << 9) /**< \brief (PWM_FMR) Fault 1 Activation Mode */ -#define PWM_FMR_FMOD2 (0x1 << 10) /**< \brief (PWM_FMR) Fault 2 Activation Mode */ -#define PWM_FMR_FMOD3 (0x1 << 11) /**< \brief (PWM_FMR) Fault 3 Activation Mode */ -#define PWM_FMR_FFIL0 (0x1 << 16) /**< \brief (PWM_FMR) Fault 0 Filtering */ -#define PWM_FMR_FFIL1 (0x1 << 17) /**< \brief (PWM_FMR) Fault 1 Filtering */ -#define PWM_FMR_FFIL2 (0x1 << 18) /**< \brief (PWM_FMR) Fault 2 Filtering */ -#define PWM_FMR_FFIL3 (0x1 << 19) /**< \brief (PWM_FMR) Fault 3 Filtering */ -/* -------- PWM_FSR : (PWM Offset: 0x60) PWM Fault Status Register -------- */ -#define PWM_FSR_FIV0 (0x1 << 0) /**< \brief (PWM_FSR) Fault Input 0 Value */ -#define PWM_FSR_FIV1 (0x1 << 1) /**< \brief (PWM_FSR) Fault Input 1 Value */ -#define PWM_FSR_FIV2 (0x1 << 2) /**< \brief (PWM_FSR) Fault Input 2 Value */ -#define PWM_FSR_FIV3 (0x1 << 3) /**< \brief (PWM_FSR) Fault Input 3 Value */ -#define PWM_FSR_FS0 (0x1 << 8) /**< \brief (PWM_FSR) Fault 0 Status */ -#define PWM_FSR_FS1 (0x1 << 9) /**< \brief (PWM_FSR) Fault 1 Status */ -#define PWM_FSR_FS2 (0x1 << 10) /**< \brief (PWM_FSR) Fault 2 Status */ -#define PWM_FSR_FS3 (0x1 << 11) /**< \brief (PWM_FSR) Fault 3 Status */ -/* -------- PWM_FCR : (PWM Offset: 0x64) PWM Fault Clear Register -------- */ -#define PWM_FCR_FCLR0 (0x1 << 0) /**< \brief (PWM_FCR) Fault 0 Clear */ -#define PWM_FCR_FCLR1 (0x1 << 1) /**< \brief (PWM_FCR) Fault 1 Clear */ -#define PWM_FCR_FCLR2 (0x1 << 2) /**< \brief (PWM_FCR) Fault 2 Clear */ -#define PWM_FCR_FCLR3 (0x1 << 3) /**< \brief (PWM_FCR) Fault 3 Clear */ -/* -------- PWM_FPV : (PWM Offset: 0x68) PWM Fault Protection Value Register -------- */ -#define PWM_FPV_FPVH0 (0x1 << 0) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 0 */ -#define PWM_FPV_FPVH1 (0x1 << 1) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 1 */ -#define PWM_FPV_FPVH2 (0x1 << 2) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 2 */ -#define PWM_FPV_FPVH3 (0x1 << 3) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 3 */ -#define PWM_FPV_FPVL0 (0x1 << 16) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 0 */ -#define PWM_FPV_FPVL1 (0x1 << 17) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 1 */ -#define PWM_FPV_FPVL2 (0x1 << 18) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 2 */ -#define PWM_FPV_FPVL3 (0x1 << 19) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 3 */ -/* -------- PWM_FPE : (PWM Offset: 0x6C) PWM Fault Protection Enable Register -------- */ -#define PWM_FPE_FPE0 (0xff << 0) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 0 for channel x */ -#define PWM_FPE_FPE1 (0xff << 8) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 1 for channel x */ -#define PWM_FPE_FPE2 (0xff << 16) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 2 for channel x */ -#define PWM_FPE_FPE3 (0xff << 24) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 3 for channel x */ -/* -------- PWM_ELxMR[2] : (PWM Offset: 0x7C) PWM Event Line 0 Mode Register -------- */ -#define PWM_ELxMR_CSEL0 (0x1 << 0) /**< \brief (PWM_ELxMR[2]) Comparison 0 Selection */ -#define PWM_ELxMR_CSEL1 (0x1 << 1) /**< \brief (PWM_ELxMR[2]) Comparison 1 Selection */ -#define PWM_ELxMR_CSEL2 (0x1 << 2) /**< \brief (PWM_ELxMR[2]) Comparison 2 Selection */ -#define PWM_ELxMR_CSEL3 (0x1 << 3) /**< \brief (PWM_ELxMR[2]) Comparison 3 Selection */ -#define PWM_ELxMR_CSEL4 (0x1 << 4) /**< \brief (PWM_ELxMR[2]) Comparison 4 Selection */ -#define PWM_ELxMR_CSEL5 (0x1 << 5) /**< \brief (PWM_ELxMR[2]) Comparison 5 Selection */ -#define PWM_ELxMR_CSEL6 (0x1 << 6) /**< \brief (PWM_ELxMR[2]) Comparison 6 Selection */ -#define PWM_ELxMR_CSEL7 (0x1 << 7) /**< \brief (PWM_ELxMR[2]) Comparison 7 Selection */ -/* -------- PWM_WPCR : (PWM Offset: 0xE4) PWM Write Protect Control Register -------- */ -#define PWM_WPCR_WPCMD (0x3 << 0) /**< \brief (PWM_WPCR) Write Protect Command */ -#define PWM_WPCR_WPRG0 (0x1 << 2) /**< \brief (PWM_WPCR) Write Protect Register Group 0 */ -#define PWM_WPCR_WPRG1 (0x1 << 3) /**< \brief (PWM_WPCR) Write Protect Register Group 1 */ -#define PWM_WPCR_WPRG2 (0x1 << 4) /**< \brief (PWM_WPCR) Write Protect Register Group 2 */ -#define PWM_WPCR_WPRG3 (0x1 << 5) /**< \brief (PWM_WPCR) Write Protect Register Group 3 */ -#define PWM_WPCR_WPRG4 (0x1 << 6) /**< \brief (PWM_WPCR) Write Protect Register Group 4 */ -#define PWM_WPCR_WPRG5 (0x1 << 7) /**< \brief (PWM_WPCR) Write Protect Register Group 5 */ -#define PWM_WPCR_WPKEY (0xffffff << 8) /**< \brief (PWM_WPCR) Write Protect Key */ -/* -------- PWM_WPSR : (PWM Offset: 0xE8) PWM Write Protect Status Register -------- */ -#define PWM_WPSR_WPSWS0 (0x1 << 0) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS1 (0x1 << 1) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS2 (0x1 << 2) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS3 (0x1 << 3) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS4 (0x1 << 4) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS5 (0x1 << 5) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPVS (0x1 << 7) /**< \brief (PWM_WPSR) Write Protect Violation Status */ -#define PWM_WPSR_WPHWS0 (0x1 << 8) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS1 (0x1 << 9) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS2 (0x1 << 10) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS3 (0x1 << 11) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS4 (0x1 << 12) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS5 (0x1 << 13) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPVSRC (0xffff << 16) /**< \brief (PWM_WPSR) Write Protect Violation Source */ -/* -------- PWM_RPR : (PWM Offset: 0x100) Receive Pointer Register -------- */ -#define PWM_RPR_RXPTR (0xffffffff << 0) /**< \brief (PWM_RPR) Receive Pointer Register */ -/* -------- PWM_RCR : (PWM Offset: 0x104) Receive Counter Register -------- */ -#define PWM_RCR_RXCTR (0xffff << 0) /**< \brief (PWM_RCR) Receive Counter Register */ -/* -------- PWM_TPR : (PWM Offset: 0x108) Transmit Pointer Register -------- */ -#define PWM_TPR_TXPTR (0xffffffff << 0) /**< \brief (PWM_TPR) Transmit Counter Register */ -/* -------- PWM_TCR : (PWM Offset: 0x10C) Transmit Counter Register -------- */ -#define PWM_TCR_TXCTR (0xffff << 0) /**< \brief (PWM_TCR) Transmit Counter Register */ -/* -------- PWM_RNPR : (PWM Offset: 0x110) Receive Next Pointer Register -------- */ -#define PWM_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (PWM_RNPR) Receive Next Pointer */ -/* -------- PWM_RNCR : (PWM Offset: 0x114) Receive Next Counter Register -------- */ -#define PWM_RNCR_RXNCTR (0xffff << 0) /**< \brief (PWM_RNCR) Receive Next Counter */ -/* -------- PWM_TNPR : (PWM Offset: 0x118) Transmit Next Pointer Register -------- */ -#define PWM_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (PWM_TNPR) Transmit Next Pointer */ -/* -------- PWM_TNCR : (PWM Offset: 0x11C) Transmit Next Counter Register -------- */ -#define PWM_TNCR_TXNCTR (0xffff << 0) /**< \brief (PWM_TNCR) Transmit Counter Next */ -/* -------- PWM_PTCR : (PWM Offset: 0x120) Transfer Control Register -------- */ -#define PWM_PTCR_RXTEN (0x1 << 0) /**< \brief (PWM_PTCR) Receiver Transfer Enable */ -#define PWM_PTCR_RXTDIS (0x1 << 1) /**< \brief (PWM_PTCR) Receiver Transfer Disable */ -#define PWM_PTCR_TXTEN (0x1 << 8) /**< \brief (PWM_PTCR) Transmitter Transfer Enable */ -#define PWM_PTCR_TXTDIS (0x1 << 9) /**< \brief (PWM_PTCR) Transmitter Transfer Disable */ -/* -------- PWM_PTSR : (PWM Offset: 0x124) Transfer Status Register -------- */ -#define PWM_PTSR_RXTEN (0x1 << 0) /**< \brief (PWM_PTSR) Receiver Transfer Enable */ -#define PWM_PTSR_TXTEN (0x1 << 8) /**< \brief (PWM_PTSR) Transmitter Transfer Enable */ -/* -------- PWM_CMP0V : (PWM Offset: 0x130) PWM Comparison 0 Value Register -------- */ -#define PWM_CMP0V_CV (0xffffff << 0) /**< \brief (PWM_CMP0V) Comparison x Value */ -#define PWM_CMP0V_CVM (0x1 << 24) /**< \brief (PWM_CMP0V) Comparison x Value Mode */ -/* -------- PWM_CMP0VUPD : (PWM Offset: 0x134) PWM Comparison 0 Value Update Register -------- */ -#define PWM_CMP0VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP0VUPD) Comparison x Value Update */ -#define PWM_CMP0VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP0VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP0M : (PWM Offset: 0x138) PWM Comparison 0 Mode Register -------- */ -#define PWM_CMP0M_CEN (0x1 << 0) /**< \brief (PWM_CMP0M) Comparison x Enable */ -#define PWM_CMP0M_CTR (0xf << 4) /**< \brief (PWM_CMP0M) Comparison x Trigger */ -#define PWM_CMP0M_CPR (0xf << 8) /**< \brief (PWM_CMP0M) Comparison x Period */ -#define PWM_CMP0M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP0M) Comparison x Period Counter */ -#define PWM_CMP0M_CUPR (0xf << 16) /**< \brief (PWM_CMP0M) Comparison x Update Period */ -#define PWM_CMP0M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP0M) Comparison x Update Period Counter */ -/* -------- PWM_CMP0MUPD : (PWM Offset: 0x13C) PWM Comparison 0 Mode Update Register -------- */ -#define PWM_CMP0MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP0MUPD) Comparison x Enable Update */ -#define PWM_CMP0MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP0MUPD) Comparison x Trigger Update */ -#define PWM_CMP0MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP0MUPD) Comparison x Period Update */ -#define PWM_CMP0MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP0MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP1V : (PWM Offset: 0x140) PWM Comparison 1 Value Register -------- */ -#define PWM_CMP1V_CV (0xffffff << 0) /**< \brief (PWM_CMP1V) Comparison x Value */ -#define PWM_CMP1V_CVM (0x1 << 24) /**< \brief (PWM_CMP1V) Comparison x Value Mode */ -/* -------- PWM_CMP1VUPD : (PWM Offset: 0x144) PWM Comparison 1 Value Update Register -------- */ -#define PWM_CMP1VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP1VUPD) Comparison x Value Update */ -#define PWM_CMP1VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP1VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP1M : (PWM Offset: 0x148) PWM Comparison 1 Mode Register -------- */ -#define PWM_CMP1M_CEN (0x1 << 0) /**< \brief (PWM_CMP1M) Comparison x Enable */ -#define PWM_CMP1M_CTR (0xf << 4) /**< \brief (PWM_CMP1M) Comparison x Trigger */ -#define PWM_CMP1M_CPR (0xf << 8) /**< \brief (PWM_CMP1M) Comparison x Period */ -#define PWM_CMP1M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP1M) Comparison x Period Counter */ -#define PWM_CMP1M_CUPR (0xf << 16) /**< \brief (PWM_CMP1M) Comparison x Update Period */ -#define PWM_CMP1M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP1M) Comparison x Update Period Counter */ -/* -------- PWM_CMP1MUPD : (PWM Offset: 0x14C) PWM Comparison 1 Mode Update Register -------- */ -#define PWM_CMP1MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP1MUPD) Comparison x Enable Update */ -#define PWM_CMP1MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP1MUPD) Comparison x Trigger Update */ -#define PWM_CMP1MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP1MUPD) Comparison x Period Update */ -#define PWM_CMP1MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP1MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP2V : (PWM Offset: 0x150) PWM Comparison 2 Value Register -------- */ -#define PWM_CMP2V_CV (0xffffff << 0) /**< \brief (PWM_CMP2V) Comparison x Value */ -#define PWM_CMP2V_CVM (0x1 << 24) /**< \brief (PWM_CMP2V) Comparison x Value Mode */ -/* -------- PWM_CMP2VUPD : (PWM Offset: 0x154) PWM Comparison 2 Value Update Register -------- */ -#define PWM_CMP2VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP2VUPD) Comparison x Value Update */ -#define PWM_CMP2VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP2VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP2M : (PWM Offset: 0x158) PWM Comparison 2 Mode Register -------- */ -#define PWM_CMP2M_CEN (0x1 << 0) /**< \brief (PWM_CMP2M) Comparison x Enable */ -#define PWM_CMP2M_CTR (0xf << 4) /**< \brief (PWM_CMP2M) Comparison x Trigger */ -#define PWM_CMP2M_CPR (0xf << 8) /**< \brief (PWM_CMP2M) Comparison x Period */ -#define PWM_CMP2M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP2M) Comparison x Period Counter */ -#define PWM_CMP2M_CUPR (0xf << 16) /**< \brief (PWM_CMP2M) Comparison x Update Period */ -#define PWM_CMP2M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP2M) Comparison x Update Period Counter */ -/* -------- PWM_CMP2MUPD : (PWM Offset: 0x15C) PWM Comparison 2 Mode Update Register -------- */ -#define PWM_CMP2MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP2MUPD) Comparison x Enable Update */ -#define PWM_CMP2MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP2MUPD) Comparison x Trigger Update */ -#define PWM_CMP2MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP2MUPD) Comparison x Period Update */ -#define PWM_CMP2MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP2MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP3V : (PWM Offset: 0x160) PWM Comparison 3 Value Register -------- */ -#define PWM_CMP3V_CV (0xffffff << 0) /**< \brief (PWM_CMP3V) Comparison x Value */ -#define PWM_CMP3V_CVM (0x1 << 24) /**< \brief (PWM_CMP3V) Comparison x Value Mode */ -/* -------- PWM_CMP3VUPD : (PWM Offset: 0x164) PWM Comparison 3 Value Update Register -------- */ -#define PWM_CMP3VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP3VUPD) Comparison x Value Update */ -#define PWM_CMP3VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP3VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP3M : (PWM Offset: 0x168) PWM Comparison 3 Mode Register -------- */ -#define PWM_CMP3M_CEN (0x1 << 0) /**< \brief (PWM_CMP3M) Comparison x Enable */ -#define PWM_CMP3M_CTR (0xf << 4) /**< \brief (PWM_CMP3M) Comparison x Trigger */ -#define PWM_CMP3M_CPR (0xf << 8) /**< \brief (PWM_CMP3M) Comparison x Period */ -#define PWM_CMP3M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP3M) Comparison x Period Counter */ -#define PWM_CMP3M_CUPR (0xf << 16) /**< \brief (PWM_CMP3M) Comparison x Update Period */ -#define PWM_CMP3M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP3M) Comparison x Update Period Counter */ -/* -------- PWM_CMP3MUPD : (PWM Offset: 0x16C) PWM Comparison 3 Mode Update Register -------- */ -#define PWM_CMP3MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP3MUPD) Comparison x Enable Update */ -#define PWM_CMP3MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP3MUPD) Comparison x Trigger Update */ -#define PWM_CMP3MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP3MUPD) Comparison x Period Update */ -#define PWM_CMP3MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP3MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP4V : (PWM Offset: 0x170) PWM Comparison 4 Value Register -------- */ -#define PWM_CMP4V_CV (0xffffff << 0) /**< \brief (PWM_CMP4V) Comparison x Value */ -#define PWM_CMP4V_CVM (0x1 << 24) /**< \brief (PWM_CMP4V) Comparison x Value Mode */ -/* -------- PWM_CMP4VUPD : (PWM Offset: 0x174) PWM Comparison 4 Value Update Register -------- */ -#define PWM_CMP4VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP4VUPD) Comparison x Value Update */ -#define PWM_CMP4VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP4VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP4M : (PWM Offset: 0x178) PWM Comparison 4 Mode Register -------- */ -#define PWM_CMP4M_CEN (0x1 << 0) /**< \brief (PWM_CMP4M) Comparison x Enable */ -#define PWM_CMP4M_CTR (0xf << 4) /**< \brief (PWM_CMP4M) Comparison x Trigger */ -#define PWM_CMP4M_CPR (0xf << 8) /**< \brief (PWM_CMP4M) Comparison x Period */ -#define PWM_CMP4M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP4M) Comparison x Period Counter */ -#define PWM_CMP4M_CUPR (0xf << 16) /**< \brief (PWM_CMP4M) Comparison x Update Period */ -#define PWM_CMP4M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP4M) Comparison x Update Period Counter */ -/* -------- PWM_CMP4MUPD : (PWM Offset: 0x17C) PWM Comparison 4 Mode Update Register -------- */ -#define PWM_CMP4MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP4MUPD) Comparison x Enable Update */ -#define PWM_CMP4MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP4MUPD) Comparison x Trigger Update */ -#define PWM_CMP4MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP4MUPD) Comparison x Period Update */ -#define PWM_CMP4MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP4MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP5V : (PWM Offset: 0x180) PWM Comparison 5 Value Register -------- */ -#define PWM_CMP5V_CV (0xffffff << 0) /**< \brief (PWM_CMP5V) Comparison x Value */ -#define PWM_CMP5V_CVM (0x1 << 24) /**< \brief (PWM_CMP5V) Comparison x Value Mode */ -/* -------- PWM_CMP5VUPD : (PWM Offset: 0x184) PWM Comparison 5 Value Update Register -------- */ -#define PWM_CMP5VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP5VUPD) Comparison x Value Update */ -#define PWM_CMP5VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP5VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP5M : (PWM Offset: 0x188) PWM Comparison 5 Mode Register -------- */ -#define PWM_CMP5M_CEN (0x1 << 0) /**< \brief (PWM_CMP5M) Comparison x Enable */ -#define PWM_CMP5M_CTR (0xf << 4) /**< \brief (PWM_CMP5M) Comparison x Trigger */ -#define PWM_CMP5M_CPR (0xf << 8) /**< \brief (PWM_CMP5M) Comparison x Period */ -#define PWM_CMP5M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP5M) Comparison x Period Counter */ -#define PWM_CMP5M_CUPR (0xf << 16) /**< \brief (PWM_CMP5M) Comparison x Update Period */ -#define PWM_CMP5M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP5M) Comparison x Update Period Counter */ -/* -------- PWM_CMP5MUPD : (PWM Offset: 0x18C) PWM Comparison 5 Mode Update Register -------- */ -#define PWM_CMP5MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP5MUPD) Comparison x Enable Update */ -#define PWM_CMP5MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP5MUPD) Comparison x Trigger Update */ -#define PWM_CMP5MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP5MUPD) Comparison x Period Update */ -#define PWM_CMP5MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP5MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP6V : (PWM Offset: 0x190) PWM Comparison 6 Value Register -------- */ -#define PWM_CMP6V_CV (0xffffff << 0) /**< \brief (PWM_CMP6V) Comparison x Value */ -#define PWM_CMP6V_CVM (0x1 << 24) /**< \brief (PWM_CMP6V) Comparison x Value Mode */ -/* -------- PWM_CMP6VUPD : (PWM Offset: 0x194) PWM Comparison 6 Value Update Register -------- */ -#define PWM_CMP6VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP6VUPD) Comparison x Value Update */ -#define PWM_CMP6VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP6VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP6M : (PWM Offset: 0x198) PWM Comparison 6 Mode Register -------- */ -#define PWM_CMP6M_CEN (0x1 << 0) /**< \brief (PWM_CMP6M) Comparison x Enable */ -#define PWM_CMP6M_CTR (0xf << 4) /**< \brief (PWM_CMP6M) Comparison x Trigger */ -#define PWM_CMP6M_CPR (0xf << 8) /**< \brief (PWM_CMP6M) Comparison x Period */ -#define PWM_CMP6M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP6M) Comparison x Period Counter */ -#define PWM_CMP6M_CUPR (0xf << 16) /**< \brief (PWM_CMP6M) Comparison x Update Period */ -#define PWM_CMP6M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP6M) Comparison x Update Period Counter */ -/* -------- PWM_CMP6MUPD : (PWM Offset: 0x19C) PWM Comparison 6 Mode Update Register -------- */ -#define PWM_CMP6MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP6MUPD) Comparison x Enable Update */ -#define PWM_CMP6MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP6MUPD) Comparison x Trigger Update */ -#define PWM_CMP6MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP6MUPD) Comparison x Period Update */ -#define PWM_CMP6MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP6MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMP7V : (PWM Offset: 0x1A0) PWM Comparison 7 Value Register -------- */ -#define PWM_CMP7V_CV (0xffffff << 0) /**< \brief (PWM_CMP7V) Comparison x Value */ -#define PWM_CMP7V_CVM (0x1 << 24) /**< \brief (PWM_CMP7V) Comparison x Value Mode */ -/* -------- PWM_CMP7VUPD : (PWM Offset: 0x1A4) PWM Comparison 7 Value Update Register -------- */ -#define PWM_CMP7VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP7VUPD) Comparison x Value Update */ -#define PWM_CMP7VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP7VUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMP7M : (PWM Offset: 0x1A8) PWM Comparison 7 Mode Register -------- */ -#define PWM_CMP7M_CEN (0x1 << 0) /**< \brief (PWM_CMP7M) Comparison x Enable */ -#define PWM_CMP7M_CTR (0xf << 4) /**< \brief (PWM_CMP7M) Comparison x Trigger */ -#define PWM_CMP7M_CPR (0xf << 8) /**< \brief (PWM_CMP7M) Comparison x Period */ -#define PWM_CMP7M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP7M) Comparison x Period Counter */ -#define PWM_CMP7M_CUPR (0xf << 16) /**< \brief (PWM_CMP7M) Comparison x Update Period */ -#define PWM_CMP7M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP7M) Comparison x Update Period Counter */ -/* -------- PWM_CMP7MUPD : (PWM Offset: 0x1AC) PWM Comparison 7 Mode Update Register -------- */ -#define PWM_CMP7MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP7MUPD) Comparison x Enable Update */ -#define PWM_CMP7MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP7MUPD) Comparison x Trigger Update */ -#define PWM_CMP7MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP7MUPD) Comparison x Period Update */ -#define PWM_CMP7MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP7MUPD) Comparison x Update Period Update */ -/* -------- PWM_CMR0 : (PWM Offset: 0x200) PWM Channel Mode Register (ch_num = 0) -------- */ -#define PWM_CMR0_CPRE (0xf << 0) /**< \brief (PWM_CMR0) Channel Pre-scaler */ -#define PWM_CMR0_CPRE_MCK_DIV_2 (0x1) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_4 (0x2) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_8 (0x3) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_16 (0x4) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_32 (0x5) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_64 (0x6) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_128 (0x7) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_256 (0x8) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_512 (0x9) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCK_DIV_1024 (0xA) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCKA (0xB) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCKB (0xC) // (PWMC_CH) -#define PWM_CMR0_CALG (0x1 << 8) /**< \brief (PWM_CMR0) Channel Alignment */ -#define PWM_CMR0_CPOL (0x1 << 9) /**< \brief (PWM_CMR0) Channel Polarity */ -#define PWM_CMR0_CES (0x1 << 10) /**< \brief (PWM_CMR0) Counter Event Selection */ -#define PWM_CMR0_DTE (0x1 << 16) /**< \brief (PWM_CMR0) Dead-Time Generator Enable */ -#define PWM_CMR0_DTHI (0x1 << 17) /**< \brief (PWM_CMR0) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR0_DTLI (0x1 << 18) /**< \brief (PWM_CMR0) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY0 : (PWM Offset: 0x204) PWM Channel Duty Cycle Register (ch_num = 0) -------- */ -#define PWM_CDTY0_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY0) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD0 : (PWM Offset: 0x208) PWM Channel Duty Cycle Update Register (ch_num = 0) -------- */ -#define PWM_CDTYUPD0_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD0) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD0 : (PWM Offset: 0x20C) PWM Channel Period Register (ch_num = 0) -------- */ -#define PWM_CPRD0_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD0) Channel Period */ -/* -------- PWM_CPRDUPD0 : (PWM Offset: 0x210) PWM Channel Period Update Register (ch_num = 0) -------- */ -#define PWM_CPRDUPD0_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD0) Channel Period Update */ -/* -------- PWM_CCNT0 : (PWM Offset: 0x214) PWM Channel Counter Register (ch_num = 0) -------- */ -#define PWM_CCNT0_CNT (0xffffff << 0) /**< \brief (PWM_CCNT0) Channel Counter Register */ -/* -------- PWM_DT0 : (PWM Offset: 0x218) PWM Channel Dead Time Register (ch_num = 0) -------- */ -#define PWM_DT0_DTH (0xffff << 0) /**< \brief (PWM_DT0) Dead-Time Value for PWMHx Output */ -#define PWM_DT0_DTL (0xffff << 16) /**< \brief (PWM_DT0) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD0 : (PWM Offset: 0x21C) PWM Channel Dead Time Update Register (ch_num = 0) -------- */ -#define PWM_DTUPD0_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD0) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD0_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD0) Dead-Time Value Update for PWMLx Output */ -/* -------- PWM_CMR1 : (PWM Offset: 0x220) PWM Channel Mode Register (ch_num = 1) -------- */ -#define PWM_CMR1_CPRE (0xf << 0) /**< \brief (PWM_CMR1) Channel Pre-scaler */ -#define PWM_CMR1_CPRE_MCK_DIV_2 (0x1) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_4 (0x2) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_8 (0x3) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_16 (0x4) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_32 (0x5) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_64 (0x6) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_128 (0x7) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_256 (0x8) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_512 (0x9) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCK_DIV_1024 (0xA) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCKA (0xB) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCKB (0xC) // (PWMC_CH) -#define PWM_CMR1_CALG (0x1 << 8) /**< \brief (PWM_CMR1) Channel Alignment */ -#define PWM_CMR1_CPOL (0x1 << 9) /**< \brief (PWM_CMR1) Channel Polarity */ -#define PWM_CMR1_CES (0x1 << 10) /**< \brief (PWM_CMR1) Counter Event Selection */ -#define PWM_CMR1_DTE (0x1 << 16) /**< \brief (PWM_CMR1) Dead-Time Generator Enable */ -#define PWM_CMR1_DTHI (0x1 << 17) /**< \brief (PWM_CMR1) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR1_DTLI (0x1 << 18) /**< \brief (PWM_CMR1) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY1 : (PWM Offset: 0x224) PWM Channel Duty Cycle Register (ch_num = 1) -------- */ -#define PWM_CDTY1_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY1) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD1 : (PWM Offset: 0x228) PWM Channel Duty Cycle Update Register (ch_num = 1) -------- */ -#define PWM_CDTYUPD1_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD1) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD1 : (PWM Offset: 0x22C) PWM Channel Period Register (ch_num = 1) -------- */ -#define PWM_CPRD1_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD1) Channel Period */ -/* -------- PWM_CPRDUPD1 : (PWM Offset: 0x230) PWM Channel Period Update Register (ch_num = 1) -------- */ -#define PWM_CPRDUPD1_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD1) Channel Period Update */ -/* -------- PWM_CCNT1 : (PWM Offset: 0x234) PWM Channel Counter Register (ch_num = 1) -------- */ -#define PWM_CCNT1_CNT (0xffffff << 0) /**< \brief (PWM_CCNT1) Channel Counter Register */ -/* -------- PWM_DT1 : (PWM Offset: 0x238) PWM Channel Dead Time Register (ch_num = 1) -------- */ -#define PWM_DT1_DTH (0xffff << 0) /**< \brief (PWM_DT1) Dead-Time Value for PWMHx Output */ -#define PWM_DT1_DTL (0xffff << 16) /**< \brief (PWM_DT1) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD1 : (PWM Offset: 0x23C) PWM Channel Dead Time Update Register (ch_num = 1) -------- */ -#define PWM_DTUPD1_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD1) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD1_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD1) Dead-Time Value Update for PWMLx Output */ -/* -------- PWM_CMR2 : (PWM Offset: 0x240) PWM Channel Mode Register (ch_num = 2) -------- */ -#define PWM_CMR2_CPRE (0xf << 0) /**< \brief (PWM_CMR2) Channel Pre-scaler */ -#define PWM_CMR2_CPRE_MCK_DIV_2 (0x1) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_4 (0x2) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_8 (0x3) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_16 (0x4) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_32 (0x5) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_64 (0x6) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_128 (0x7) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_256 (0x8) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_512 (0x9) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCK_DIV_1024 (0xA) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCKA (0xB) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCKB (0xC) // (PWMC_CH) -#define PWM_CMR2_CALG (0x1 << 8) /**< \brief (PWM_CMR2) Channel Alignment */ -#define PWM_CMR2_CPOL (0x1 << 9) /**< \brief (PWM_CMR2) Channel Polarity */ -#define PWM_CMR2_CES (0x1 << 10) /**< \brief (PWM_CMR2) Counter Event Selection */ -#define PWM_CMR2_DTE (0x1 << 16) /**< \brief (PWM_CMR2) Dead-Time Generator Enable */ -#define PWM_CMR2_DTHI (0x1 << 17) /**< \brief (PWM_CMR2) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR2_DTLI (0x1 << 18) /**< \brief (PWM_CMR2) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY2 : (PWM Offset: 0x244) PWM Channel Duty Cycle Register (ch_num = 2) -------- */ -#define PWM_CDTY2_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY2) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD2 : (PWM Offset: 0x248) PWM Channel Duty Cycle Update Register (ch_num = 2) -------- */ -#define PWM_CDTYUPD2_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD2) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD2 : (PWM Offset: 0x24C) PWM Channel Period Register (ch_num = 2) -------- */ -#define PWM_CPRD2_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD2) Channel Period */ -/* -------- PWM_CPRDUPD2 : (PWM Offset: 0x250) PWM Channel Period Update Register (ch_num = 2) -------- */ -#define PWM_CPRDUPD2_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD2) Channel Period Update */ -/* -------- PWM_CCNT2 : (PWM Offset: 0x254) PWM Channel Counter Register (ch_num = 2) -------- */ -#define PWM_CCNT2_CNT (0xffffff << 0) /**< \brief (PWM_CCNT2) Channel Counter Register */ -/* -------- PWM_DT2 : (PWM Offset: 0x258) PWM Channel Dead Time Register (ch_num = 2) -------- */ -#define PWM_DT2_DTH (0xffff << 0) /**< \brief (PWM_DT2) Dead-Time Value for PWMHx Output */ -#define PWM_DT2_DTL (0xffff << 16) /**< \brief (PWM_DT2) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD2 : (PWM Offset: 0x25C) PWM Channel Dead Time Update Register (ch_num = 2) -------- */ -#define PWM_DTUPD2_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD2) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD2_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD2) Dead-Time Value Update for PWMLx Output */ -/* -------- PWM_CMR3 : (PWM Offset: 0x260) PWM Channel Mode Register (ch_num = 3) -------- */ -#define PWM_CMR3_CPRE (0xf << 0) /**< \brief (PWM_CMR3) Channel Pre-scaler */ -#define PWM_CMR3_CPRE_MCK_DIV_2 (0x1) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_4 (0x2) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_8 (0x3) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_16 (0x4) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_32 (0x5) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_64 (0x6) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_128 (0x7) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_256 (0x8) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_512 (0x9) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCK_DIV_1024 (0xA) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCKA (0xB) // (PWMC_CH) -#define PWM_CMR3_CPRE_MCKB (0xC) // (PWMC_CH) -#define PWM_CMR3_CALG (0x1 << 8) /**< \brief (PWM_CMR3) Channel Alignment */ -#define PWM_CMR3_CPOL (0x1 << 9) /**< \brief (PWM_CMR3) Channel Polarity */ -#define PWM_CMR3_CES (0x1 << 10) /**< \brief (PWM_CMR3) Counter Event Selection */ -#define PWM_CMR3_DTE (0x1 << 16) /**< \brief (PWM_CMR3) Dead-Time Generator Enable */ -#define PWM_CMR3_DTHI (0x1 << 17) /**< \brief (PWM_CMR3) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR3_DTLI (0x1 << 18) /**< \brief (PWM_CMR3) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY3 : (PWM Offset: 0x264) PWM Channel Duty Cycle Register (ch_num = 3) -------- */ -#define PWM_CDTY3_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY3) Channel Duty-Cycle */ -/* -------- PWM_CDTYUPD3 : (PWM Offset: 0x268) PWM Channel Duty Cycle Update Register (ch_num = 3) -------- */ -#define PWM_CDTYUPD3_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD3) Channel Duty-Cycle Update */ -/* -------- PWM_CPRD3 : (PWM Offset: 0x26C) PWM Channel Period Register (ch_num = 3) -------- */ -#define PWM_CPRD3_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD3) Channel Period */ -/* -------- PWM_CPRDUPD3 : (PWM Offset: 0x270) PWM Channel Period Update Register (ch_num = 3) -------- */ -#define PWM_CPRDUPD3_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD3) Channel Period Update */ -/* -------- PWM_CCNT3 : (PWM Offset: 0x274) PWM Channel Counter Register (ch_num = 3) -------- */ -#define PWM_CCNT3_CNT (0xffffff << 0) /**< \brief (PWM_CCNT3) Channel Counter Register */ -/* -------- PWM_DT3 : (PWM Offset: 0x278) PWM Channel Dead Time Register (ch_num = 3) -------- */ -#define PWM_DT3_DTH (0xffff << 0) /**< \brief (PWM_DT3) Dead-Time Value for PWMHx Output */ -#define PWM_DT3_DTL (0xffff << 16) /**< \brief (PWM_DT3) Dead-Time Value for PWMLx Output */ -/* -------- PWM_DTUPD3 : (PWM Offset: 0x27C) PWM Channel Dead Time Update Register (ch_num = 3) -------- */ -#define PWM_DTUPD3_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD3) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD3_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD3) Dead-Time Value Update for PWMLx Output */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Reset Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_RSTC Reset Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rstc hardware registers */ -typedef struct { - WoReg RSTC_CR; /**< \brief (Rstc Offset: 0x00) Control Register */ - RoReg RSTC_SR; /**< \brief (Rstc Offset: 0x04) Status Register */ - RwReg RSTC_MR; /**< \brief (Rstc Offset: 0x08) Mode Register */ -} Rstc; -#endif /* __ASSEMBLY__ */ -/* -------- RSTC_CR : (RSTC Offset: 0x00) Control Register -------- */ -#define RSTC_CR_PROCRST (0x1 << 0) /**< \brief (RSTC_CR) Processor Reset */ -#define RSTC_CR_PERRST (0x1 << 2) /**< \brief (RSTC_CR) Peripheral Reset */ -#define RSTC_CR_EXTRST (0x1 << 3) /**< \brief (RSTC_CR) External Reset */ -#define RSTC_CR_KEY (0xff << 24) /**< \brief (RSTC_CR) Password */ -/* -------- RSTC_SR : (RSTC Offset: 0x04) Status Register -------- */ -#define RSTC_SR_URSTS (0x1 << 0) /**< \brief (RSTC_SR) User Reset Status */ -#define RSTC_SR_RSTTYP (0x7 << 8) /**< \brief (RSTC_SR) Reset Type */ -#define RSTC_SR_NRSTL (0x1 << 16) /**< \brief (RSTC_SR) NRST Pin Level */ -#define RSTC_SR_SRCMP (0x1 << 17) /**< \brief (RSTC_SR) Software Reset Command in Progress */ -/* -------- RSTC_MR : (RSTC Offset: 0x08) Mode Register -------- */ -#define RSTC_MR_URSTEN (0x1 << 0) /**< \brief (RSTC_MR) User Reset Enable */ -#define RSTC_MR_URSTIEN (0x1 << 4) /**< \brief (RSTC_MR) User Reset Interrupt Enable */ -#define RSTC_MR_ERSTL (0xf << 8) /**< \brief (RSTC_MR) External Reset Length */ -#define RSTC_MR_KEY (0xff << 24) /**< \brief (RSTC_MR) Password */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Real-time Clock */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_RTC Real-time Clock */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rtc hardware registers */ -typedef struct { - RwReg RTC_CR; /**< \brief (Rtc Offset: 0x00) Control Register */ - RwReg RTC_MR; /**< \brief (Rtc Offset: 0x04) Mode Register */ - RwReg RTC_TIMR; /**< \brief (Rtc Offset: 0x08) Time Register */ - RwReg RTC_CALR; /**< \brief (Rtc Offset: 0x0C) Calendar Register */ - RwReg RTC_TIMALR; /**< \brief (Rtc Offset: 0x10) Time Alarm Register */ - RwReg RTC_CALALR; /**< \brief (Rtc Offset: 0x14) Calendar Alarm Register */ - RoReg RTC_SR; /**< \brief (Rtc Offset: 0x18) Status Register */ - WoReg RTC_SCCR; /**< \brief (Rtc Offset: 0x1C) Status Clear Command Register */ - WoReg RTC_IER; /**< \brief (Rtc Offset: 0x20) Interrupt Enable Register */ - WoReg RTC_IDR; /**< \brief (Rtc Offset: 0x24) Interrupt Disable Register */ - RoReg RTC_IMR; /**< \brief (Rtc Offset: 0x28) Interrupt Mask Register */ - RoReg RTC_VER; /**< \brief (Rtc Offset: 0x2C) Valid Entry Register */ -} Rtc; -#endif /* __ASSEMBLY__ */ -/* -------- RTC_CR : (RTC Offset: 0x00) Control Register -------- */ -#define RTC_CR_UPDTIM (0x1 << 0) /**< \brief (RTC_CR) Update Request Time Register */ -#define RTC_CR_UPDCAL (0x1 << 1) /**< \brief (RTC_CR) Update Request Calendar Register */ -#define RTC_CR_TIMEVSEL (0x3 << 8) /**< \brief (RTC_CR) Time Event Selection */ -#define RTC_CR_TIMEVSEL_MINUTE (0x0 << 8) /**< \brief (RTC_CR) Minute change. */ -#define RTC_CR_TIMEVSEL_HOUR (0x1 << 8) /**< \brief (RTC_CR) Hour change. */ -#define RTC_CR_TIMEVSEL_DAY24 (0x2 << 8) /**< \brief (RTC_CR) Every day at midnight. */ -#define RTC_CR_TIMEVSEL_DAY12 (0x3 << 8) /**< \brief (RTC_CR) Every day at noon. */ -#define RTC_CR_CALEVSEL (0x3 << 16) /**< \brief (RTC_CR) Calendar Event Selection */ -#define RTC_CR_CALEVSEL_WEEK (0x0 << 16) /**< \brief (RTC_CR) Week change (every Monday at time 00:00:00). */ -#define RTC_CR_CALEVSEL_MONTH (0x1 << 16) /**< \brief (RTC_CR) Month change (every 01 of each month at time 00:00:00). */ -/* -------- RTC_MR : (RTC Offset: 0x04) Mode Register -------- */ -#define RTC_MR_HRMOD (0x1 << 0) /**< \brief (RTC_MR) 12-/24-hour Mode */ -/* -------- RTC_TIMR : (RTC Offset: 0x08) Time Register -------- */ -#define RTC_TIMR_SEC (0x7f << 0) /**< \brief (RTC_TIMR) Current Second */ -#define RTC_TIMR_MIN (0x7f << 8) /**< \brief (RTC_TIMR) Current Minute */ -#define RTC_TIMR_HOUR (0x3f << 16) /**< \brief (RTC_TIMR) Current Hour */ -#define RTC_TIMR_AMPM (0x1 << 22) /**< \brief (RTC_TIMR) Ante Meridiem Post Meridiem Indicator */ -/* -------- RTC_CALR : (RTC Offset: 0x0C) Calendar Register -------- */ -#define RTC_CALR_CENT (0x7f << 0) /**< \brief (RTC_CALR) Current Century */ -#define RTC_CALR_YEAR (0xff << 8) /**< \brief (RTC_CALR) Current Year */ -#define RTC_CALR_MONTH (0x1f << 16) /**< \brief (RTC_CALR) Current Month */ -#define RTC_CALR_DAY (0x7 << 21) /**< \brief (RTC_CALR) Current Day in Current Week */ -#define RTC_CALR_DATE (0x3f << 24) /**< \brief (RTC_CALR) Current Day in Current Month */ -/* -------- RTC_TIMALR : (RTC Offset: 0x10) Time Alarm Register -------- */ -#define RTC_TIMALR_SEC (0x7f << 0) /**< \brief (RTC_TIMALR) Second Alarm */ -#define RTC_TIMALR_SECEN (0x1 << 7) /**< \brief (RTC_TIMALR) Second Alarm Enable */ -#define RTC_TIMALR_MIN (0x7f << 8) /**< \brief (RTC_TIMALR) Minute Alarm */ -#define RTC_TIMALR_MINEN (0x1 << 15) /**< \brief (RTC_TIMALR) Minute Alarm Enable */ -#define RTC_TIMALR_HOUR (0x3f << 16) /**< \brief (RTC_TIMALR) Hour Alarm */ -#define RTC_TIMALR_AMPM (0x1 << 22) /**< \brief (RTC_TIMALR) AM/PM Indicator */ -#define RTC_TIMALR_HOUREN (0x1 << 23) /**< \brief (RTC_TIMALR) Hour Alarm Enable */ -/* -------- RTC_CALALR : (RTC Offset: 0x14) Calendar Alarm Register -------- */ -#define RTC_CALALR_MONTH (0x1f << 16) /**< \brief (RTC_CALALR) Month Alarm */ -#define RTC_CALALR_MTHEN (0x1 << 23) /**< \brief (RTC_CALALR) Month Alarm Enable */ -#define RTC_CALALR_DATE (0x3f << 24) /**< \brief (RTC_CALALR) Date Alarm */ -#define RTC_CALALR_DATEEN (0x1 << 31) /**< \brief (RTC_CALALR) Date Alarm Enable */ -/* -------- RTC_SR : (RTC Offset: 0x18) Status Register -------- */ -#define RTC_SR_ACKUPD (0x1 << 0) /**< \brief (RTC_SR) Acknowledge for Update */ -#define RTC_SR_ALARM (0x1 << 1) /**< \brief (RTC_SR) Alarm Flag */ -#define RTC_SR_SEC (0x1 << 2) /**< \brief (RTC_SR) Second Event */ -#define RTC_SR_TIMEV (0x1 << 3) /**< \brief (RTC_SR) Time Event */ -#define RTC_SR_CALEV (0x1 << 4) /**< \brief (RTC_SR) Calendar Event */ -/* -------- RTC_SCCR : (RTC Offset: 0x1C) Status Clear Command Register -------- */ -#define RTC_SCCR_ACKCLR (0x1 << 0) /**< \brief (RTC_SCCR) Acknowledge Clear */ -#define RTC_SCCR_ALRCLR (0x1 << 1) /**< \brief (RTC_SCCR) Alarm Clear */ -#define RTC_SCCR_SECCLR (0x1 << 2) /**< \brief (RTC_SCCR) Second Clear */ -#define RTC_SCCR_TIMCLR (0x1 << 3) /**< \brief (RTC_SCCR) Time Clear */ -#define RTC_SCCR_CALCLR (0x1 << 4) /**< \brief (RTC_SCCR) Calendar Clear */ -/* -------- RTC_IER : (RTC Offset: 0x20) Interrupt Enable Register -------- */ -#define RTC_IER_ACKEN (0x1 << 0) /**< \brief (RTC_IER) Acknowledge Update Interrupt Enable */ -#define RTC_IER_ALREN (0x1 << 1) /**< \brief (RTC_IER) Alarm Interrupt Enable */ -#define RTC_IER_SECEN (0x1 << 2) /**< \brief (RTC_IER) Second Event Interrupt Enable */ -#define RTC_IER_TIMEN (0x1 << 3) /**< \brief (RTC_IER) Time Event Interrupt Enable */ -#define RTC_IER_CALEN (0x1 << 4) /**< \brief (RTC_IER) Calendar Event Interrupt Enable */ -/* -------- RTC_IDR : (RTC Offset: 0x24) Interrupt Disable Register -------- */ -#define RTC_IDR_ACKDIS (0x1 << 0) /**< \brief (RTC_IDR) Acknowledge Update Interrupt Disable */ -#define RTC_IDR_ALRDIS (0x1 << 1) /**< \brief (RTC_IDR) Alarm Interrupt Disable */ -#define RTC_IDR_SECDIS (0x1 << 2) /**< \brief (RTC_IDR) Second Event Interrupt Disable */ -#define RTC_IDR_TIMDIS (0x1 << 3) /**< \brief (RTC_IDR) Time Event Interrupt Disable */ -#define RTC_IDR_CALDIS (0x1 << 4) /**< \brief (RTC_IDR) Calendar Event Interrupt Disable */ -/* -------- RTC_IMR : (RTC Offset: 0x28) Interrupt Mask Register -------- */ -#define RTC_IMR_ACK (0x1 << 0) /**< \brief (RTC_IMR) Acknowledge Update Interrupt Mask */ -#define RTC_IMR_ALR (0x1 << 1) /**< \brief (RTC_IMR) Alarm Interrupt Mask */ -#define RTC_IMR_SEC (0x1 << 2) /**< \brief (RTC_IMR) Second Event Interrupt Mask */ -#define RTC_IMR_TIM (0x1 << 3) /**< \brief (RTC_IMR) Time Event Interrupt Mask */ -#define RTC_IMR_CAL (0x1 << 4) /**< \brief (RTC_IMR) Calendar Event Interrupt Mask */ -/* -------- RTC_VER : (RTC Offset: 0x2C) Valid Entry Register -------- */ -#define RTC_VER_NVTIM (0x1 << 0) /**< \brief (RTC_VER) Non-valid Time */ -#define RTC_VER_NVCAL (0x1 << 1) /**< \brief (RTC_VER) Non-valid Calendar */ -#define RTC_VER_NVTIMALR (0x1 << 2) /**< \brief (RTC_VER) Non-valid Time Alarm */ -#define RTC_VER_NVCALALR (0x1 << 3) /**< \brief (RTC_VER) Non-valid Calendar Alarm */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Real-time Timer */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_RTT Real-time Timer */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rtt hardware registers */ -typedef struct { - RwReg RTT_MR; /**< \brief (Rtt Offset: 0x00) Mode Register */ - RwReg RTT_AR; /**< \brief (Rtt Offset: 0x04) Alarm Register */ - RoReg RTT_VR; /**< \brief (Rtt Offset: 0x08) Value Register */ - RoReg RTT_SR; /**< \brief (Rtt Offset: 0x0C) Status Register */ -} Rtt; -#endif /* __ASSEMBLY__ */ -/* -------- RTT_MR : (RTT Offset: 0x00) Mode Register -------- */ -#define RTT_MR_RTPRES (0xffff << 0) /**< \brief (RTT_MR) Real-time Timer Prescaler Value */ -#define RTT_MR_ALMIEN (0x1 << 16) /**< \brief (RTT_MR) Alarm Interrupt Enable */ -#define RTT_MR_RTTINCIEN (0x1 << 17) /**< \brief (RTT_MR) Real-time Timer Increment Interrupt Enable */ -#define RTT_MR_RTTRST (0x1 << 18) /**< \brief (RTT_MR) Real-time Timer Restart */ -/* -------- RTT_AR : (RTT Offset: 0x04) Alarm Register -------- */ -#define RTT_AR_ALMV (0xffffffff << 0) /**< \brief (RTT_AR) Alarm Value */ -/* -------- RTT_VR : (RTT Offset: 0x08) Value Register -------- */ -#define RTT_VR_CRTV (0xffffffff << 0) /**< \brief (RTT_VR) Current Real-time Value */ -/* -------- RTT_SR : (RTT Offset: 0x0C) Status Register -------- */ -#define RTT_SR_ALMS (0x1 << 0) /**< \brief (RTT_SR) Real-time Alarm Status */ -#define RTT_SR_RTTINC (0x1 << 1) /**< \brief (RTT_SR) Real-time Timer Increment */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Static Memory Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_SMC Static Memory Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief SmcCs_number hardware registers */ -typedef struct { - RwReg SMC_SETUP; /**< \brief (SmcCs_number Offset: 0x0) SMC SETUP Register */ - RwReg SMC_PULSE; /**< \brief (SmcCs_number Offset: 0x4) SMC PULSE Register */ - RwReg SMC_CYCLE; /**< \brief (SmcCs_number Offset: 0x8) SMC CYCLE Register */ - RwReg SMC_TIMINGS; /**< \brief (SmcCs_number Offset: 0xC) SMC TIMINGS Register */ - RwReg SMC_MODE; /**< \brief (SmcCs_number Offset: 0x10) SMC MODE Register */ -} SmcCs_number; -/** \brief Smc hardware registers */ -typedef struct { - RwReg SMC_CFG; /**< \brief (Smc Offset: 0x000) SMC NFC Configuration Register */ - WoReg SMC_CTRL; /**< \brief (Smc Offset: 0x004) SMC NFC Control Register */ - RoReg SMC_SR; /**< \brief (Smc Offset: 0x008) SMC NFC Status Register */ - WoReg SMC_IER; /**< \brief (Smc Offset: 0x00C) SMC NFC Interrupt Enable Register */ - WoReg SMC_IDR; /**< \brief (Smc Offset: 0x010) SMC NFC Interrupt Disable Register */ - RoReg SMC_IMR; /**< \brief (Smc Offset: 0x014) SMC NFC Interrupt Mask Register */ - RwReg SMC_ADDR; /**< \brief (Smc Offset: 0x018) SMC NFC Address Cycle Zero Register */ - RwReg SMC_BANK; /**< \brief (Smc Offset: 0x01C) SMC Bank Address Register */ - WoReg SMC_ECC_CTRL; /**< \brief (Smc Offset: 0x020) SMC ECC Control Register */ - RwReg SMC_ECC_MD; /**< \brief (Smc Offset: 0x024) SMC ECC Mode Register */ - RoReg SMC_ECC_SR1; /**< \brief (Smc Offset: 0x028) SMC ECC Status 1 Register */ - RoReg SMC_ECC_PR0; /**< \brief (Smc Offset: 0x02C) SMC ECC Parity 0 Register */ - RoReg SMC_ECC_PR1; /**< \brief (Smc Offset: 0x030) SMC ECC parity 1 Register */ - RoReg SMC_ECC_SR2; /**< \brief (Smc Offset: 0x034) SMC ECC status 2 Register */ - RoReg SMC_ECC_PR2; /**< \brief (Smc Offset: 0x038) SMC ECC parity 2 Register */ - RoReg SMC_ECC_PR3; /**< \brief (Smc Offset: 0x03C) SMC ECC parity 3 Register */ - RoReg SMC_ECC_PR4; /**< \brief (Smc Offset: 0x040) SMC ECC parity 4 Register */ - RoReg SMC_ECC_PR5; /**< \brief (Smc Offset: 0x044) SMC ECC parity 5 Register */ - RoReg SMC_ECC_PR6; /**< \brief (Smc Offset: 0x048) SMC ECC parity 6 Register */ - RoReg SMC_ECC_PR7; /**< \brief (Smc Offset: 0x04C) SMC ECC parity 7 Register */ - RoReg SMC_ECC_PR8; /**< \brief (Smc Offset: 0x050) SMC ECC parity 8 Register */ - RoReg SMC_ECC_PR9; /**< \brief (Smc Offset: 0x054) SMC ECC parity 9 Register */ - RoReg SMC_ECC_PR10; /**< \brief (Smc Offset: 0x058) SMC ECC parity 10 Register */ - RoReg SMC_ECC_PR11; /**< \brief (Smc Offset: 0x05C) SMC ECC parity 11 Register */ - RoReg SMC_ECC_PR12; /**< \brief (Smc Offset: 0x060) SMC ECC parity 12 Register */ - RoReg SMC_ECC_PR13; /**< \brief (Smc Offset: 0x064) SMC ECC parity 13 Register */ - RoReg SMC_ECC_PR14; /**< \brief (Smc Offset: 0x068) SMC ECC parity 14 Register */ - RoReg SMC_ECC_PR15; /**< \brief (Smc Offset: 0x06C) SMC ECC parity 15 Register */ - SmcCs_number SMC_CS_NUMBER[4]; /**< \brief (Smc Offset: 0x70) CS_number = 0 .. 3 */ - RwReg Reserved1[20]; - RwReg SMC_OCMS; /**< \brief (Smc Offset: 0x110) SMC OCMS MODE Register */ - WoReg SMC_KEY1; /**< \brief (Smc Offset: 0x114) SMC KEY1 Register */ - WoReg SMC_KEY2; /**< \brief (Smc Offset: 0x118) SMC KEY2 Register */ - RwReg Reserved2[50]; - WoReg SMC_WPCR; /**< \brief (Smc Offset: 0x1E4) Write Protection Control Register */ - RoReg SMC_WPSR; /**< \brief (Smc Offset: 0x1E8) Write Protection Status Register */ -} Smc; -#endif /* __ASSEMBLY__ */ -/* -------- SMC_CFG : (SMC Offset: 0x000) SMC NFC Configuration Register -------- */ -#define SMC_CFG_PAGESIZE (0x3 << 0) /**< \brief (SMC_CFG) */ -#define SMC_CFG_WSPARE (0x1 << 8) /**< \brief (SMC_CFG) Write Spare Area */ -#define SMC_CFG_RSPARE (0x1 << 9) /**< \brief (SMC_CFG) Read Spare Area */ -#define SMC_CFG_EDGECTRL (0x1 << 12) /**< \brief (SMC_CFG) Rising/Falling Edge Detection Control */ -#define SMC_CFG_RBEDGE (0x1 << 13) /**< \brief (SMC_CFG) Ready/Busy Signal Edge Detection */ -#define SMC_CFG_DTOCYC (0xf << 16) /**< \brief (SMC_CFG) Data Timeout Cycle Number */ -#define SMC_CFG_DTOMUL (0x7 << 20) /**< \brief (SMC_CFG) Data Timeout Multiplier */ -/* -------- SMC_CTRL : (SMC Offset: 0x004) SMC NFC Control Register -------- */ -#define SMC_CTRL_NFCEN (0x1 << 0) /**< \brief (SMC_CTRL) NAND Flash Controller Enable */ -#define SMC_CTRL_NFCDIS (0x1 << 1) /**< \brief (SMC_CTRL) NAND Flash Controller Disable */ -/* -------- SMC_SR : (SMC Offset: 0x008) SMC NFC Status Register -------- */ -#define SMC_SR_SMCSTS (0x1 << 0) /**< \brief (SMC_SR) NAND Flash Controller status (this field cannot be reset) */ -#define SMC_SR_RB_RISE (0x1 << 4) /**< \brief (SMC_SR) Selected Ready Busy Rising Edge Detected */ -#define SMC_SR_RB_FALL (0x1 << 5) /**< \brief (SMC_SR) Selected Ready Busy Falling Edge Detected */ -#define SMC_SR_NFCBUSY (0x1 << 8) /**< \brief (SMC_SR) NFC Busy (this field cannot be reset) */ -#define SMC_SR_NFCWR (0x1 << 11) /**< \brief (SMC_SR) NFC Write/Read Operation (this field cannot be reset) */ -#define SMC_SR_NFCSID (0x7 << 12) /**< \brief (SMC_SR) NFC Chip Select ID (this field cannot be reset) */ -#define SMC_SR_XFRDONE (0x1 << 16) /**< \brief (SMC_SR) NFC Data Transfer Terminated */ -#define SMC_SR_CMDDONE (0x1 << 17) /**< \brief (SMC_SR) Command Done */ -#define SMC_SR_DTOE (0x1 << 20) /**< \brief (SMC_SR) Data Timeout Error */ -#define SMC_SR_UNDEF (0x1 << 21) /**< \brief (SMC_SR) Undefined Area Error */ -#define SMC_SR_AWB (0x1 << 22) /**< \brief (SMC_SR) Accessing While Busy */ -#define SMC_SR_NFCASE (0x1 << 23) /**< \brief (SMC_SR) NFC Access Size Error */ -#define SMC_SR_RB_EDGE0 (0x1 << 24) /**< \brief (SMC_SR) Ready/Busy Line 0 Edge Detected */ -/* -------- SMC_IER : (SMC Offset: 0x00C) SMC NFC Interrupt Enable Register -------- */ -#define SMC_IER_RB_RISE (0x1 << 4) /**< \brief (SMC_IER) Ready Busy Rising Edge Detection Interrupt Enable */ -#define SMC_IER_RB_FALL (0x1 << 5) /**< \brief (SMC_IER) Ready Busy Falling Edge Detection Interrupt Enable */ -#define SMC_IER_XFRDONE (0x1 << 16) /**< \brief (SMC_IER) Transfer Done Interrupt Enable */ -#define SMC_IER_CMDDONE (0x1 << 17) /**< \brief (SMC_IER) Command Done Interrupt Enable */ -#define SMC_IER_DTOE (0x1 << 20) /**< \brief (SMC_IER) Data Timeout Error Interrupt Enable */ -#define SMC_IER_UNDEF (0x1 << 21) /**< \brief (SMC_IER) Undefined Area Access Interrupt Enable */ -#define SMC_IER_AWB (0x1 << 22) /**< \brief (SMC_IER) Accessing While Busy Interrupt Enable */ -#define SMC_IER_NFCASE (0x1 << 23) /**< \brief (SMC_IER) NFC Access Size Error Interrupt Enable */ -#define SMC_IER_RB_EDGE0 (0x1 << 24) /**< \brief (SMC_IER) Ready/Busy Line 0 Interrupt Enable */ -/* -------- SMC_IDR : (SMC Offset: 0x010) SMC NFC Interrupt Disable Register -------- */ -#define SMC_IDR_RB_RISE (0x1 << 4) /**< \brief (SMC_IDR) Ready Busy Rising Edge Detection Interrupt Disable */ -#define SMC_IDR_RB_FALL (0x1 << 5) /**< \brief (SMC_IDR) Ready Busy Falling Edge Detection Interrupt Disable */ -#define SMC_IDR_XFRDONE (0x1 << 16) /**< \brief (SMC_IDR) Transfer Done Interrupt Disable */ -#define SMC_IDR_CMDDONE (0x1 << 17) /**< \brief (SMC_IDR) Command Done Interrupt Disable */ -#define SMC_IDR_DTOE (0x1 << 20) /**< \brief (SMC_IDR) Data Timeout Error Interrupt Disable */ -#define SMC_IDR_UNDEF (0x1 << 21) /**< \brief (SMC_IDR) Undefined Area Access Interrupt Disable */ -#define SMC_IDR_AWB (0x1 << 22) /**< \brief (SMC_IDR) Accessing While Busy Interrupt Disable */ -#define SMC_IDR_NFCASE (0x1 << 23) /**< \brief (SMC_IDR) NFC Access Size Error Interrupt Disable */ -#define SMC_IDR_RB_EDGE0 (0x1 << 24) /**< \brief (SMC_IDR) Ready/Busy Line 0 Interrupt Disable */ -/* -------- SMC_IMR : (SMC Offset: 0x014) SMC NFC Interrupt Mask Register -------- */ -#define SMC_IMR_RB_RISE (0x1 << 4) /**< \brief (SMC_IMR) Ready Busy Rising Edge Detection Interrupt Mask */ -#define SMC_IMR_RB_FALL (0x1 << 5) /**< \brief (SMC_IMR) Ready Busy Falling Edge Detection Interrupt Mask */ -#define SMC_IMR_XFRDONE (0x1 << 16) /**< \brief (SMC_IMR) Transfer Done Interrupt Mask */ -#define SMC_IMR_CMDDONE (0x1 << 17) /**< \brief (SMC_IMR) Command Done Interrupt Mask */ -#define SMC_IMR_DTOE (0x1 << 20) /**< \brief (SMC_IMR) Data Timeout Error Interrupt Mask */ -#define SMC_IMR_UNDEF (0x1 << 21) /**< \brief (SMC_IMR) Undefined Area Access Interrupt Mask5 */ -#define SMC_IMR_AWB (0x1 << 22) /**< \brief (SMC_IMR) Accessing While Busy Interrupt Mask */ -#define SMC_IMR_NFCASE (0x1 << 23) /**< \brief (SMC_IMR) NFC Access Size Error Interrupt Mask */ -#define SMC_IMR_RB_EDGE0 (0x1 << 24) /**< \brief (SMC_IMR) Ready/Busy Line 0 Interrupt Mask */ -/* -------- SMC_ADDR : (SMC Offset: 0x018) SMC NFC Address Cycle Zero Register -------- */ -#define SMC_ADDR_ADDR_CYCLE0 (0xff << 0) /**< \brief (SMC_ADDR) NAND Flash Array Address cycle 0 */ -/* -------- SMC_BANK : (SMC Offset: 0x01C) SMC Bank Address Register -------- */ -#define SMC_BANK_BANK (0x7 << 0) /**< \brief (SMC_BANK) Bank Identifier */ -/* -------- SMC_ECC_CTRL : (SMC Offset: 0x020) SMC ECC Control Register -------- */ -#define SMC_ECC_CTRL_RST (0x1 << 0) /**< \brief (SMC_ECC_CTRL) Reset ECC */ -#define SMC_ECC_CTRL_SWRST (0x1 << 1) /**< \brief (SMC_ECC_CTRL) Software Reset */ -/* -------- SMC_ECC_MD : (SMC Offset: 0x024) SMC ECC Mode Register -------- */ -#define SMC_ECC_MD_ECC_PAGESIZE (0x3 << 0) /**< \brief (SMC_ECC_MD) */ -#define SMC_ECC_MD_TYPCORREC (0x3 << 4) /**< \brief (SMC_ECC_MD) type of correction */ -/* -------- SMC_ECC_SR1 : (SMC Offset: 0x028) SMC ECC Status 1 Register -------- */ -#define SMC_ECC_SR1_RECERR0 (0x1 << 0) /**< \brief (SMC_ECC_SR1) Recoverable Error */ -#define SMC_ECC_SR1_ECCERR0 (0x3 << 1) /**< \brief (SMC_ECC_SR1) ECC Error */ -#define SMC_ECC_SR1_RECERR1 (0x1 << 4) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 256th and the 511th bytes or the 512nd and the 1023rd bytes */ -#define SMC_ECC_SR1_ECCERR1 (0x1 << 5) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 256th and the 511th bytes or between the 512nd and the 1023rd bytes */ -#define SMC_ECC_SR1_MULERR1 (0x1 << 6) /**< \brief (SMC_ECC_SR1) Multiple Error in the page between the 256th and the 511th bytes or between the 512nd and the 1023rd bytes */ -#define SMC_ECC_SR1_RECERR2 (0x1 << 8) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 512nd and the 767th bytes or between the 1024th and the 1535th bytes */ -#define SMC_ECC_SR1_ECCERR2 (0x1 << 9) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 512nd and the 767th bytes or between the 1024th and the 1535th bytes */ -#define SMC_ECC_SR1_MULERR2 (0x1 << 10) /**< \brief (SMC_ECC_SR1) Multiple Error in the page between the 512nd and the 767th bytes or between the 1024th and the 1535th bytes */ -#define SMC_ECC_SR1_RECERR3 (0x1 << 12) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 768th and the 1023rd bytes or between the 1536th and the 2047th bytes */ -#define SMC_ECC_SR1_ECCERR3 (0x1 << 13) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 768th and the 1023rd bytes or between the 1536th and the 2047th bytes */ -#define SMC_ECC_SR1_MULERR3 (0x1 << 14) /**< \brief (SMC_ECC_SR1) Multiple Error in the page between the 768th and the 1023rd bytes or between the 1536th and the 2047th bytes */ -#define SMC_ECC_SR1_RECERR4 (0x1 << 16) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 1024th and the 1279th bytes or between the 2048th and the 2559th bytes */ -#define SMC_ECC_SR1_ECCERR4 (0x3 << 17) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 1024th and the 1279th bytes or between the 2048th and the 2559th bytes */ -#define SMC_ECC_SR1_RECERR5 (0x1 << 20) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 1280th and the 1535th bytes or between the 2560th and the 3071st bytes */ -#define SMC_ECC_SR1_ECCERR5 (0x3 << 21) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 1280th and the 1535th bytes or between the 2560th and the 3071st bytes */ -#define SMC_ECC_SR1_RECERR6 (0x1 << 24) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 1536th and the 1791st bytes or between the 3072nd and the 3583rd bytes */ -#define SMC_ECC_SR1_ECCERR6 (0x3 << 25) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 1536th and the 1791st bytes or between the 3072nd and the 3583rd bytes */ -#define SMC_ECC_SR1_RECERR7 (0x1 << 28) /**< \brief (SMC_ECC_SR1) Recoverable Error in the page between the 1792nd and the 2047th bytes or between the 3584th and the 4095th bytes */ -#define SMC_ECC_SR1_ECCERR7 (0x3 << 29) /**< \brief (SMC_ECC_SR1) ECC Error in the page between the 1792nd and the 2047th bytes or between the 3584th and the 4095th bytes */ -/* -------- SMC_ECC_PR0 : (SMC Offset: 0x02C) SMC ECC Parity 0 Register -------- */ -#define SMC_ECC_PR0_BITADDR (0xf << 0) /**< \brief (SMC_ECC_PR0) Bit Address */ -#define SMC_ECC_PR0_WORDADDR (0xfff << 4) /**< \brief (SMC_ECC_PR0) Word Address */ -/* -------- SMC_ECC_PR1 : (SMC Offset: 0x030) SMC ECC parity 1 Register -------- */ -#define SMC_ECC_PR1_NPARITY (0xffff << 0) /**< \brief (SMC_ECC_PR1) */ -/* -------- SMC_ECC_SR2 : (SMC Offset: 0x034) SMC ECC status 2 Register -------- */ -#define SMC_ECC_SR2_RECERR8 (0x1 << 0) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 2048th and the 2303rd bytes */ -#define SMC_ECC_SR2_ECCERR8 (0x3 << 1) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 2048th and the 2303rd bytes */ -#define SMC_ECC_SR2_RECERR9 (0x1 << 4) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 2304th and the 2559th bytes */ -#define SMC_ECC_SR2_ECCERR9 (0x1 << 5) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 2304th and the 2559th bytes */ -#define SMC_ECC_SR2_MULERR9 (0x1 << 6) /**< \brief (SMC_ECC_SR2) Multiple Error in the page between the 2304th and the 2559th bytes */ -#define SMC_ECC_SR2_RECERR10 (0x1 << 8) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 2560th and the 2815th bytes */ -#define SMC_ECC_SR2_ECCERR10 (0x1 << 9) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 2560th and the 2815th bytes */ -#define SMC_ECC_SR2_MULERR10 (0x1 << 10) /**< \brief (SMC_ECC_SR2) Multiple Error in the page between the 2560th and the 2815th bytes */ -#define SMC_ECC_SR2_RECERR11 (0x1 << 12) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 2816th and the 3071st bytes */ -#define SMC_ECC_SR2_ECCERR11 (0x1 << 13) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 2816th and the 3071st bytes */ -#define SMC_ECC_SR2_MULERR11 (0x1 << 14) /**< \brief (SMC_ECC_SR2) Multiple Error in the page between the 2816th and the 3071st bytes */ -#define SMC_ECC_SR2_RECERR12 (0x1 << 16) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 3072nd and the 3327th bytes */ -#define SMC_ECC_SR2_ECCERR12 (0x3 << 17) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 3072nd and the 3327th bytes */ -#define SMC_ECC_SR2_RECERR13 (0x1 << 20) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 3328th and the 3583rd bytes */ -#define SMC_ECC_SR2_ECCERR13 (0x3 << 21) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 3328th and the 3583rd bytes */ -#define SMC_ECC_SR2_RECERR14 (0x1 << 24) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 3584th and the 3839th bytes */ -#define SMC_ECC_SR2_ECCERR14 (0x3 << 25) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 3584th and the 3839th bytes */ -#define SMC_ECC_SR2_RECERR15 (0x1 << 28) /**< \brief (SMC_ECC_SR2) Recoverable Error in the page between the 3840th and the 4095th bytes */ -#define SMC_ECC_SR2_ECCERR15 (0x3 << 29) /**< \brief (SMC_ECC_SR2) ECC Error in the page between the 3840th and the 4095th bytes */ -/* -------- SMC_ECC_PR2 : (SMC Offset: 0x038) SMC ECC parity 2 Register -------- */ -/* -------- SMC_ECC_PR3 : (SMC Offset: 0x03C) SMC ECC parity 3 Register -------- */ -/* -------- SMC_ECC_PR4 : (SMC Offset: 0x040) SMC ECC parity 4 Register -------- */ -/* -------- SMC_ECC_PR5 : (SMC Offset: 0x044) SMC ECC parity 5 Register -------- */ -/* -------- SMC_ECC_PR6 : (SMC Offset: 0x048) SMC ECC parity 6 Register -------- */ -/* -------- SMC_ECC_PR7 : (SMC Offset: 0x04C) SMC ECC parity 7 Register -------- */ -/* -------- SMC_ECC_PR8 : (SMC Offset: 0x050) SMC ECC parity 8 Register -------- */ -/* -------- SMC_ECC_PR9 : (SMC Offset: 0x054) SMC ECC parity 9 Register -------- */ -/* -------- SMC_ECC_PR10 : (SMC Offset: 0x058) SMC ECC parity 10 Register -------- */ -/* -------- SMC_ECC_PR11 : (SMC Offset: 0x05C) SMC ECC parity 11 Register -------- */ -/* -------- SMC_ECC_PR12 : (SMC Offset: 0x060) SMC ECC parity 12 Register -------- */ -/* -------- SMC_ECC_PR13 : (SMC Offset: 0x064) SMC ECC parity 13 Register -------- */ -/* -------- SMC_ECC_PR14 : (SMC Offset: 0x068) SMC ECC parity 14 Register -------- */ -/* -------- SMC_ECC_PR15 : (SMC Offset: 0x06C) SMC ECC parity 15 Register -------- */ -/* -------- SMC_SETUP0 : (SMC Offset: 0x70) SMC SETUP Register (CS_number = 0) -------- */ -#define SMC_SETUP0_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP0) NWE Setup length */ -#define SMC_SETUP0_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP0) NCS Setup length in Write access */ -#define SMC_SETUP0_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP0) NRD Setup length */ -#define SMC_SETUP0_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP0) NCS Setup length in Read access */ -/* -------- SMC_PULSE0 : (SMC Offset: 0x74) SMC PULSE Register (CS_number = 0) -------- */ -#define SMC_PULSE0_NWE_PULSE (0x3f << 0) /**< \brief (SMC_PULSE0) NWE Pulse Length */ -#define SMC_PULSE0_NCS_WR_PULSE (0x3f << 8) /**< \brief (SMC_PULSE0) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE0_NRD_PULSE (0x3f << 16) /**< \brief (SMC_PULSE0) NRD Pulse Length */ -#define SMC_PULSE0_NCS_RD_PULSE (0x3f << 24) /**< \brief (SMC_PULSE0) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE0 : (SMC Offset: 0x78) SMC CYCLE Register (CS_number = 0) -------- */ -#define SMC_CYCLE0_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE0) Total Write Cycle Length */ -#define SMC_CYCLE0_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE0) Total Read Cycle Length */ -/* -------- SMC_TIMINGS0 : (SMC Offset: 0x7C) SMC TIMINGS Register (CS_number = 0) -------- */ -#define SMC_TIMINGS0_TCLR (0xf << 0) /**< \brief (SMC_TIMINGS0) CLE to REN Low Delay */ -#define SMC_TIMINGS0_TADL (0xf << 4) /**< \brief (SMC_TIMINGS0) ALE to Data Start */ -#define SMC_TIMINGS0_TAR (0xf << 8) /**< \brief (SMC_TIMINGS0) ALE to REN Low Delay */ -#define SMC_TIMINGS0_OCMS (0x1 << 12) /**< \brief (SMC_TIMINGS0) Off Chip Memory Scrambling Enable */ -#define SMC_TIMINGS0_TRR (0xf << 16) /**< \brief (SMC_TIMINGS0) Ready to REN Low Delay */ -#define SMC_TIMINGS0_TWB (0xf << 24) /**< \brief (SMC_TIMINGS0) WEN High to REN to Busy */ -#define SMC_TIMINGS0_RBNSEL (0x7 << 28) /**< \brief (SMC_TIMINGS0) Ready/Busy Line Selection */ -#define SMC_TIMINGS0_NFSEL (0x1 << 31) /**< \brief (SMC_TIMINGS0) NAND Flash Selection */ -/* -------- SMC_MODE0 : (SMC Offset: 0x80) SMC MODE Register (CS_number = 0) -------- */ -#define SMC_MODE0_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE0) */ -#define SMC_MODE0_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE0) */ -#define SMC_MODE0_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE0) NWAIT Mode */ -#define SMC_MODE0_BAT (0x1 << 8) /**< \brief (SMC_MODE0) Byte Access Type */ -#define SMC_MODE0_DBW (0x1 << 12) /**< \brief (SMC_MODE0) Data Bus Width */ -#define SMC_MODE0_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE0) Data Float Time */ -#define SMC_MODE0_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE0) TDF Optimization */ -/* -------- SMC_SETUP1 : (SMC Offset: 0x84) SMC SETUP Register (CS_number = 1) -------- */ -#define SMC_SETUP1_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP1) NWE Setup length */ -#define SMC_SETUP1_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP1) NCS Setup length in Write access */ -#define SMC_SETUP1_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP1) NRD Setup length */ -#define SMC_SETUP1_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP1) NCS Setup length in Read access */ -/* -------- SMC_PULSE1 : (SMC Offset: 0x88) SMC PULSE Register (CS_number = 1) -------- */ -#define SMC_PULSE1_NWE_PULSE (0x3f << 0) /**< \brief (SMC_PULSE1) NWE Pulse Length */ -#define SMC_PULSE1_NCS_WR_PULSE (0x3f << 8) /**< \brief (SMC_PULSE1) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE1_NRD_PULSE (0x3f << 16) /**< \brief (SMC_PULSE1) NRD Pulse Length */ -#define SMC_PULSE1_NCS_RD_PULSE (0x3f << 24) /**< \brief (SMC_PULSE1) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE1 : (SMC Offset: 0x8C) SMC CYCLE Register (CS_number = 1) -------- */ -#define SMC_CYCLE1_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE1) Total Write Cycle Length */ -#define SMC_CYCLE1_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE1) Total Read Cycle Length */ -/* -------- SMC_TIMINGS1 : (SMC Offset: 0x90) SMC TIMINGS Register (CS_number = 1) -------- */ -#define SMC_TIMINGS1_TCLR (0xf << 0) /**< \brief (SMC_TIMINGS1) CLE to REN Low Delay */ -#define SMC_TIMINGS1_TADL (0xf << 4) /**< \brief (SMC_TIMINGS1) ALE to Data Start */ -#define SMC_TIMINGS1_TAR (0xf << 8) /**< \brief (SMC_TIMINGS1) ALE to REN Low Delay */ -#define SMC_TIMINGS1_OCMS (0x1 << 12) /**< \brief (SMC_TIMINGS1) Off Chip Memory Scrambling Enable */ -#define SMC_TIMINGS1_TRR (0xf << 16) /**< \brief (SMC_TIMINGS1) Ready to REN Low Delay */ -#define SMC_TIMINGS1_TWB (0xf << 24) /**< \brief (SMC_TIMINGS1) WEN High to REN to Busy */ -#define SMC_TIMINGS1_RBNSEL (0x7 << 28) /**< \brief (SMC_TIMINGS1) Ready/Busy Line Selection */ -#define SMC_TIMINGS1_NFSEL (0x1 << 31) /**< \brief (SMC_TIMINGS1) NAND Flash Selection */ -/* -------- SMC_MODE1 : (SMC Offset: 0x94) SMC MODE Register (CS_number = 1) -------- */ -#define SMC_MODE1_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE1) */ -#define SMC_MODE1_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE1) */ -#define SMC_MODE1_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE1) NWAIT Mode */ -#define SMC_MODE1_BAT (0x1 << 8) /**< \brief (SMC_MODE1) Byte Access Type */ -#define SMC_MODE1_DBW (0x1 << 12) /**< \brief (SMC_MODE1) Data Bus Width */ -#define SMC_MODE1_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE1) Data Float Time */ -#define SMC_MODE1_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE1) TDF Optimization */ -/* -------- SMC_SETUP2 : (SMC Offset: 0x98) SMC SETUP Register (CS_number = 2) -------- */ -#define SMC_SETUP2_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP2) NWE Setup length */ -#define SMC_SETUP2_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP2) NCS Setup length in Write access */ -#define SMC_SETUP2_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP2) NRD Setup length */ -#define SMC_SETUP2_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP2) NCS Setup length in Read access */ -/* -------- SMC_PULSE2 : (SMC Offset: 0x9C) SMC PULSE Register (CS_number = 2) -------- */ -#define SMC_PULSE2_NWE_PULSE (0x3f << 0) /**< \brief (SMC_PULSE2) NWE Pulse Length */ -#define SMC_PULSE2_NCS_WR_PULSE (0x3f << 8) /**< \brief (SMC_PULSE2) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE2_NRD_PULSE (0x3f << 16) /**< \brief (SMC_PULSE2) NRD Pulse Length */ -#define SMC_PULSE2_NCS_RD_PULSE (0x3f << 24) /**< \brief (SMC_PULSE2) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE2 : (SMC Offset: 0xA0) SMC CYCLE Register (CS_number = 2) -------- */ -#define SMC_CYCLE2_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE2) Total Write Cycle Length */ -#define SMC_CYCLE2_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE2) Total Read Cycle Length */ -/* -------- SMC_TIMINGS2 : (SMC Offset: 0xA4) SMC TIMINGS Register (CS_number = 2) -------- */ -#define SMC_TIMINGS2_TCLR (0xf << 0) /**< \brief (SMC_TIMINGS2) CLE to REN Low Delay */ -#define SMC_TIMINGS2_TADL (0xf << 4) /**< \brief (SMC_TIMINGS2) ALE to Data Start */ -#define SMC_TIMINGS2_TAR (0xf << 8) /**< \brief (SMC_TIMINGS2) ALE to REN Low Delay */ -#define SMC_TIMINGS2_OCMS (0x1 << 12) /**< \brief (SMC_TIMINGS2) Off Chip Memory Scrambling Enable */ -#define SMC_TIMINGS2_TRR (0xf << 16) /**< \brief (SMC_TIMINGS2) Ready to REN Low Delay */ -#define SMC_TIMINGS2_TWB (0xf << 24) /**< \brief (SMC_TIMINGS2) WEN High to REN to Busy */ -#define SMC_TIMINGS2_RBNSEL (0x7 << 28) /**< \brief (SMC_TIMINGS2) Ready/Busy Line Selection */ -#define SMC_TIMINGS2_NFSEL (0x1 << 31) /**< \brief (SMC_TIMINGS2) NAND Flash Selection */ -/* -------- SMC_MODE2 : (SMC Offset: 0xA8) SMC MODE Register (CS_number = 2) -------- */ -#define SMC_MODE2_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE2) */ -#define SMC_MODE2_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE2) */ -#define SMC_MODE2_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE2) NWAIT Mode */ -#define SMC_MODE2_BAT (0x1 << 8) /**< \brief (SMC_MODE2) Byte Access Type */ -#define SMC_MODE2_DBW (0x1 << 12) /**< \brief (SMC_MODE2) Data Bus Width */ -#define SMC_MODE2_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE2) Data Float Time */ -#define SMC_MODE2_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE2) TDF Optimization */ -/* -------- SMC_SETUP3 : (SMC Offset: 0xAC) SMC SETUP Register (CS_number = 3) -------- */ -#define SMC_SETUP3_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP3) NWE Setup length */ -#define SMC_SETUP3_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP3) NCS Setup length in Write access */ -#define SMC_SETUP3_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP3) NRD Setup length */ -#define SMC_SETUP3_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP3) NCS Setup length in Read access */ -/* -------- SMC_PULSE3 : (SMC Offset: 0xB0) SMC PULSE Register (CS_number = 3) -------- */ -#define SMC_PULSE3_NWE_PULSE (0x3f << 0) /**< \brief (SMC_PULSE3) NWE Pulse Length */ -#define SMC_PULSE3_NCS_WR_PULSE (0x3f << 8) /**< \brief (SMC_PULSE3) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE3_NRD_PULSE (0x3f << 16) /**< \brief (SMC_PULSE3) NRD Pulse Length */ -#define SMC_PULSE3_NCS_RD_PULSE (0x3f << 24) /**< \brief (SMC_PULSE3) NCS Pulse Length in READ Access */ -/* -------- SMC_CYCLE3 : (SMC Offset: 0xB4) SMC CYCLE Register (CS_number = 3) -------- */ -#define SMC_CYCLE3_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE3) Total Write Cycle Length */ -#define SMC_CYCLE3_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE3) Total Read Cycle Length */ -/* -------- SMC_TIMINGS3 : (SMC Offset: 0xB8) SMC TIMINGS Register (CS_number = 3) -------- */ -#define SMC_TIMINGS3_TCLR (0xf << 0) /**< \brief (SMC_TIMINGS3) CLE to REN Low Delay */ -#define SMC_TIMINGS3_TADL (0xf << 4) /**< \brief (SMC_TIMINGS3) ALE to Data Start */ -#define SMC_TIMINGS3_TAR (0xf << 8) /**< \brief (SMC_TIMINGS3) ALE to REN Low Delay */ -#define SMC_TIMINGS3_OCMS (0x1 << 12) /**< \brief (SMC_TIMINGS3) Off Chip Memory Scrambling Enable */ -#define SMC_TIMINGS3_TRR (0xf << 16) /**< \brief (SMC_TIMINGS3) Ready to REN Low Delay */ -#define SMC_TIMINGS3_TWB (0xf << 24) /**< \brief (SMC_TIMINGS3) WEN High to REN to Busy */ -#define SMC_TIMINGS3_RBNSEL (0x7 << 28) /**< \brief (SMC_TIMINGS3) Ready/Busy Line Selection */ -#define SMC_TIMINGS3_NFSEL (0x1 << 31) /**< \brief (SMC_TIMINGS3) NAND Flash Selection */ -/* -------- SMC_MODE3 : (SMC Offset: 0xBC) SMC MODE Register (CS_number = 3) -------- */ -#define SMC_MODE3_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE3) */ -#define SMC_MODE3_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE3) */ -#define SMC_MODE3_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE3) NWAIT Mode */ -#define SMC_MODE3_BAT (0x1 << 8) /**< \brief (SMC_MODE3) Byte Access Type */ -#define SMC_MODE3_DBW (0x1 << 12) /**< \brief (SMC_MODE3) Data Bus Width */ -#define SMC_MODE3_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE3) Data Float Time */ -#define SMC_MODE3_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE3) TDF Optimization */ -/* -------- SMC_OCMS : (SMC Offset: 0x110) SMC OCMS MODE Register -------- */ -#define SMC_OCMS_SMSE (0x1 << 0) /**< \brief (SMC_OCMS) Static Memory Controller Scrambling Enable */ -#define SMC_OCMS_SRSE (0x1 << 1) /**< \brief (SMC_OCMS) SRAM Scrambling Enable */ -/* -------- SMC_KEY1 : (SMC Offset: 0x114) SMC KEY1 Register -------- */ -#define SMC_KEY1_KEY1 (0xffffffff << 0) /**< \brief (SMC_KEY1) Off Chip Memory Scrambling (OCMS) Key Part 1 */ -/* -------- SMC_KEY2 : (SMC Offset: 0x118) SMC KEY2 Register -------- */ -#define SMC_KEY2_KEY2 (0xffffffff << 0) /**< \brief (SMC_KEY2) Off Chip Memory Scrambling (OCMS) Key Part 2 */ -/* -------- SMC_WPCR : (SMC Offset: 0x1E4) Write Protection Control Register -------- */ -#define SMC_WPCR_WP_EN (0x1 << 0) /**< \brief (SMC_WPCR) */ -#define SMC_WPCR_WP_KEY (0xffffff << 8) /**< \brief (SMC_WPCR) Write Protection KEY password */ -/* -------- SMC_WPSR : (SMC Offset: 0x1E8) Write Protection Status Register -------- */ -#define SMC_WPSR_WP_VS (0xf << 0) /**< \brief (SMC_WPSR) Write Protection Violation Status */ -#define SMC_WPSR_WP_VSRC (0xffff << 8) /**< \brief (SMC_WPSR) Write Protection Violation SouRCe */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Serial Peripheral Interface */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_SPI Serial Peripheral Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Spi hardware registers */ -typedef struct { - WoReg SPI_CR; /**< \brief (Spi Offset: 0x00) Control Register */ - RwReg SPI_MR; /**< \brief (Spi Offset: 0x04) Mode Register */ - RoReg SPI_RDR; /**< \brief (Spi Offset: 0x08) Receive Data Register */ - WoReg SPI_TDR; /**< \brief (Spi Offset: 0x0C) Transmit Data Register */ - RoReg SPI_SR; /**< \brief (Spi Offset: 0x10) Status Register */ - WoReg SPI_IER; /**< \brief (Spi Offset: 0x14) Interrupt Enable Register */ - WoReg SPI_IDR; /**< \brief (Spi Offset: 0x18) Interrupt Disable Register */ - RoReg SPI_IMR; /**< \brief (Spi Offset: 0x1C) Interrupt Mask Register */ - RwReg Reserved1[4]; - RwReg SPI_CSR[4]; /**< \brief (Spi Offset: 0x30) Chip Select Register */ - RwReg Reserved2[41]; - RwReg SPI_WPCR; /**< \brief (Spi Offset: 0xE4) Write Protection Control Register */ - RoReg SPI_WPSR; /**< \brief (Spi Offset: 0xE8) Write Protection Status Register */ -} Spi; -#endif /* __ASSEMBLY__ */ -/* -------- SPI_CR : (SPI Offset: 0x00) Control Register -------- */ -#define SPI_CR_SPIEN (0x1 << 0) /**< \brief (SPI_CR) SPI Enable */ -#define SPI_CR_SPIDIS (0x1 << 1) /**< \brief (SPI_CR) SPI Disable */ -#define SPI_CR_SWRST (0x1 << 7) /**< \brief (SPI_CR) SPI Software Reset */ -#define SPI_CR_LASTXFER (0x1 << 24) /**< \brief (SPI_CR) Last Transfer */ -/* -------- SPI_MR : (SPI Offset: 0x04) Mode Register -------- */ -#define SPI_MR_MSTR (0x1 << 0) /**< \brief (SPI_MR) Master/Slave Mode */ -#define SPI_MR_PS (0x1 << 1) /**< \brief (SPI_MR) Peripheral Select */ -#define SPI_MR_PS_FIXED (0x0 << 1) /**< \brief (SPI_MR) Fixed Peripheral Select. */ -#define SPI_MR_PS_VARIABLE (0x1 << 1) /**< \brief (SPI_MR) Variable Peripheral Select. */ -#define SPI_MR_PCSDEC (0x1 << 2) /**< \brief (SPI_MR) Chip Select Decode */ -#define SPI_MR_MODFDIS (0x1 << 4) /**< \brief (SPI_MR) Mode Fault Detection */ -#define SPI_MR_WDRBT (0x1 << 5) /**< \brief (SPI_MR) Wait Data Read Before Transfer */ -#define SPI_MR_LLB (0x1 << 7) /**< \brief (SPI_MR) Local Loopback Enable */ -#define SPI_MR_PCS (0xf << 16) /**< \brief (SPI_MR) Peripheral Chip Select */ -#define SPI_MR_DLYBCS (0xff << 24) /**< \brief (SPI_MR) Delay Between Chip Selects */ -/* -------- SPI_RDR : (SPI Offset: 0x08) Receive Data Register -------- */ -#define SPI_RDR_RD (0xffff << 0) /**< \brief (SPI_RDR) Receive Data */ -#define SPI_RDR_PCS (0xf << 16) /**< \brief (SPI_RDR) Peripheral Chip Select */ -/* -------- SPI_TDR : (SPI Offset: 0x0C) Transmit Data Register -------- */ -#define SPI_TDR_TD (0xffff << 0) /**< \brief (SPI_TDR) Transmit Data */ -#define SPI_TDR_PCS (0xf << 16) /**< \brief (SPI_TDR) Peripheral Chip Select */ -#define SPI_TDR_LASTXFER (0x1 << 24) /**< \brief (SPI_TDR) Last Transfer */ -/* -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- */ -#define SPI_SR_RDRF (0x1 << 0) /**< \brief (SPI_SR) Receive Data Register Full */ -#define SPI_SR_TDRE (0x1 << 1) /**< \brief (SPI_SR) Transmit Data Register Empty */ -#define SPI_SR_MODF (0x1 << 2) /**< \brief (SPI_SR) Mode Fault Error */ -#define SPI_SR_OVRES (0x1 << 3) /**< \brief (SPI_SR) Overrun Error Status */ -#define SPI_SR_RXBUFF (0x1 << 6) /**< \brief (SPI_SR) */ -#define SPI_SR_NSSR (0x1 << 8) /**< \brief (SPI_SR) NSS Rising */ -#define SPI_SR_TXEMPTY (0x1 << 9) /**< \brief (SPI_SR) Transmission Registers Empty */ -#define SPI_SR_UNDES (0x1 << 10) /**< \brief (SPI_SR) Underrun Error Status (Slave Mode Only) */ -#define SPI_SR_SPIENS (0x1 << 16) /**< \brief (SPI_SR) SPI Enable Status */ -/* -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- */ -#define SPI_IER_RDRF (0x1 << 0) /**< \brief (SPI_IER) Receive Data Register Full Interrupt Enable */ -#define SPI_IER_TDRE (0x1 << 1) /**< \brief (SPI_IER) SPI Transmit Data Register Empty Interrupt Enable */ -#define SPI_IER_MODF (0x1 << 2) /**< \brief (SPI_IER) Mode Fault Error Interrupt Enable */ -#define SPI_IER_OVRES (0x1 << 3) /**< \brief (SPI_IER) Overrun Error Interrupt Enable */ -#define SPI_IER_RXBUFF (0x1 << 6) /**< \brief (SPI_IER) */ -#define SPI_IER_NSSR (0x1 << 8) /**< \brief (SPI_IER) NSS Rising Interrupt Enable */ -#define SPI_IER_TXEMPTY (0x1 << 9) /**< \brief (SPI_IER) Transmission Registers Empty Enable */ -#define SPI_IER_UNDES (0x1 << 10) /**< \brief (SPI_IER) Underrun Error Interrupt Enable */ -/* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- */ -#define SPI_IDR_RDRF (0x1 << 0) /**< \brief (SPI_IDR) Receive Data Register Full Interrupt Disable */ -#define SPI_IDR_TDRE (0x1 << 1) /**< \brief (SPI_IDR) SPI Transmit Data Register Empty Interrupt Disable */ -#define SPI_IDR_MODF (0x1 << 2) /**< \brief (SPI_IDR) Mode Fault Error Interrupt Disable */ -#define SPI_IDR_OVRES (0x1 << 3) /**< \brief (SPI_IDR) Overrun Error Interrupt Disable */ -#define SPI_IDR_RXBUFF (0x1 << 6) /**< \brief (SPI_IDR) */ -#define SPI_IDR_NSSR (0x1 << 8) /**< \brief (SPI_IDR) NSS Rising Interrupt Disable */ -#define SPI_IDR_TXEMPTY (0x1 << 9) /**< \brief (SPI_IDR) Transmission Registers Empty Disable */ -#define SPI_IDR_UNDES (0x1 << 10) /**< \brief (SPI_IDR) Underrun Error Interrupt Disable */ -/* -------- SPI_IMR : (SPI Offset: 0x1C) Interrupt Mask Register -------- */ -#define SPI_IMR_RDRF (0x1 << 0) /**< \brief (SPI_IMR) Receive Data Register Full Interrupt Mask */ -#define SPI_IMR_TDRE (0x1 << 1) /**< \brief (SPI_IMR) SPI Transmit Data Register Empty Interrupt Mask */ -#define SPI_IMR_MODF (0x1 << 2) /**< \brief (SPI_IMR) Mode Fault Error Interrupt Mask */ -#define SPI_IMR_OVRES (0x1 << 3) /**< \brief (SPI_IMR) Overrun Error Interrupt Mask */ -#define SPI_IMR_RXBUFF (0x1 << 6) /**< \brief (SPI_IMR) */ -#define SPI_IMR_NSSR (0x1 << 8) /**< \brief (SPI_IMR) NSS Rising Interrupt Mask */ -#define SPI_IMR_TXEMPTY (0x1 << 9) /**< \brief (SPI_IMR) Transmission Registers Empty Mask */ -#define SPI_IMR_UNDES (0x1 << 10) /**< \brief (SPI_IMR) Underrun Error Interrupt Mask */ -/* -------- SPI_CSR[4] : (SPI Offset: 0x30) Chip Select Register -------- */ -#define SPI_CSR_CPOL (0x1 << 0) /**< \brief (SPI_CSR[4]) Clock Polarity */ -#define SPI_CSR_NCPHA (0x1 << 1) /**< \brief (SPI_CSR[4]) Clock Phase */ -#define SPI_CSR_CSNAAT (0x1 << 2) /**< \brief (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ -#define SPI_CSR_CSAAT (0x1 << 3) /**< \brief (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ -#define SPI_CSR_BITS (0xf << 4) /**< \brief (SPI_CSR[4]) Bits Per Transfer (See the (Note:) below the register table; Section 9.9 "SPI Chip Select Register" on page 37.) */ -#define SPI_CSR_BITS_8 (0x0 << 4) /**< \brief (SPI_CSR[4]) 8 */ -#define SPI_CSR_BITS_9 (0x1 << 4) /**< \brief (SPI_CSR[4]) 9 */ -#define SPI_CSR_BITS_10 (0x2 << 4) /**< \brief (SPI_CSR[4]) 10 */ -#define SPI_CSR_BITS_11 (0x3 << 4) /**< \brief (SPI_CSR[4]) 11 */ -#define SPI_CSR_BITS_12 (0x4 << 4) /**< \brief (SPI_CSR[4]) 12 */ -#define SPI_CSR_BITS_13 (0x5 << 4) /**< \brief (SPI_CSR[4]) 13 */ -#define SPI_CSR_BITS_14 (0x6 << 4) /**< \brief (SPI_CSR[4]) 14 */ -#define SPI_CSR_BITS_15 (0x7 << 4) /**< \brief (SPI_CSR[4]) 15 */ -#define SPI_CSR_BITS_16 (0x8 << 4) /**< \brief (SPI_CSR[4]) 16 */ -#define SPI_CSR_SCBR (0xff << 8) /**< \brief (SPI_CSR[4]) Serial Clock Baud Rate */ -#define SPI_CSR_DLYBS (0xff << 16) /**< \brief (SPI_CSR[4]) Delay Before SPCK */ -#define SPI_CSR_DLYBCT (0xff << 24) /**< \brief (SPI_CSR[4]) Delay Between Consecutive Transfers */ -/* -------- SPI_WPCR : (SPI Offset: 0xE4) Write Protection Control Register -------- */ -#define SPI_WPCR_SPIWPEN (0x1 << 0) /**< \brief (SPI_WPCR) SPI Write Protection Enable */ -#define SPI_WPCR_SPIWPKEY (0xffffff << 8) /**< \brief (SPI_WPCR) SPI Write Protection Key Password */ -/* -------- SPI_WPSR : (SPI Offset: 0xE8) Write Protection Status Register -------- */ -#define SPI_WPSR_SPIWPVS (0x7 << 0) /**< \brief (SPI_WPSR) SPI Write Protection Violation Status */ -#define SPI_WPSR_SPIWPVSRC (0xff << 8) /**< \brief (SPI_WPSR) SPI Write Protection Violation Source */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Synchronous Serial Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_SSC Synchronous Serial Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Ssc hardware registers */ -typedef struct { - WoReg SSC_CR; /**< \brief (Ssc Offset: 0x0) Control Register */ - RwReg SSC_CMR; /**< \brief (Ssc Offset: 0x4) Clock Mode Register */ - RwReg Reserved1[2]; - RwReg SSC_RCMR; /**< \brief (Ssc Offset: 0x10) Receive Clock Mode Register */ - RwReg SSC_RFMR; /**< \brief (Ssc Offset: 0x14) Receive Frame Mode Register */ - RwReg SSC_TCMR; /**< \brief (Ssc Offset: 0x18) Transmit Clock Mode Register */ - RwReg SSC_TFMR; /**< \brief (Ssc Offset: 0x1C) Transmit Frame Mode Register */ - RoReg SSC_RHR; /**< \brief (Ssc Offset: 0x20) Receive Holding Register */ - WoReg SSC_THR; /**< \brief (Ssc Offset: 0x24) Transmit Holding Register */ - RwReg Reserved2[2]; - RoReg SSC_RSHR; /**< \brief (Ssc Offset: 0x30) Receive Sync. Holding Register */ - RwReg SSC_TSHR; /**< \brief (Ssc Offset: 0x34) Transmit Sync. Holding Register */ - RwReg SSC_RC0R; /**< \brief (Ssc Offset: 0x38) Receive Compare 0 Register */ - RwReg SSC_RC1R; /**< \brief (Ssc Offset: 0x3C) Receive Compare 1 Register */ - RoReg SSC_SR; /**< \brief (Ssc Offset: 0x40) Status Register */ - WoReg SSC_IER; /**< \brief (Ssc Offset: 0x44) Interrupt Enable Register */ - WoReg SSC_IDR; /**< \brief (Ssc Offset: 0x48) Interrupt Disable Register */ - RoReg SSC_IMR; /**< \brief (Ssc Offset: 0x4C) Interrupt Mask Register */ - RwReg Reserved3[37]; - RwReg SSC_WPMR; /**< \brief (Ssc Offset: 0xE4) Write Protect Mode Register */ - RoReg SSC_WPSR; /**< \brief (Ssc Offset: 0xE8) Write Protect Status Register */ -} Ssc; -#endif /* __ASSEMBLY__ */ -/* -------- SSC_CR : (SSC Offset: 0x0) Control Register -------- */ -#define SSC_CR_RXEN (0x1 << 0) /**< \brief (SSC_CR) Receive Enable */ -#define SSC_CR_RXDIS (0x1 << 1) /**< \brief (SSC_CR) Receive Disable */ -#define SSC_CR_TXEN (0x1 << 8) /**< \brief (SSC_CR) Transmit Enable */ -#define SSC_CR_TXDIS (0x1 << 9) /**< \brief (SSC_CR) Transmit Disable */ -#define SSC_CR_SWRST (0x1 << 15) /**< \brief (SSC_CR) Software Reset */ -/* -------- SSC_CMR : (SSC Offset: 0x4) Clock Mode Register -------- */ -#define SSC_CMR_DIV (0xfff << 0) /**< \brief (SSC_CMR) Clock Divider */ -/* -------- SSC_RCMR : (SSC Offset: 0x10) Receive Clock Mode Register -------- */ -#define SSC_RCMR_CKS (0x3 << 0) /**< \brief (SSC_RCMR) Receive Clock Selection */ -#define SSC_RCMR_CKS_DIV (0x0 << 0) /**< \brief (SSC_RCMR) Divided Clock */ -#define SSC_RCMR_CKS_TK (0x1 << 0) /**< \brief (SSC_RCMR) TK Clock signal */ -#define SSC_RCMR_CKS_RK (0x2 << 0) /**< \brief (SSC_RCMR) RK pin */ -#define SSC_RCMR_CKO (0x7 << 2) /**< \brief (SSC_RCMR) Receive Clock Output Mode Selection */ -#define SSC_RCMR_CKI (0x1 << 5) /**< \brief (SSC_RCMR) Receive Clock Inversion */ -#define SSC_RCMR_CKG (0x3 << 6) /**< \brief (SSC_RCMR) Receive Clock Gating Selection */ -#define SSC_RCMR_CKG_NONE (0x0 << 6) /**< \brief (SSC_RCMR) None, continuous clock */ -#define SSC_RCMR_CKG_LOW (0x1 << 6) /**< \brief (SSC_RCMR) Receive Clock enabled only if RF Low */ -#define SSC_RCMR_CKG_HIGH (0x2 << 6) /**< \brief (SSC_RCMR) Receive Clock enabled only if RF High */ -#define SSC_RCMR_START (0xf << 8) /**< \brief (SSC_RCMR) Receive Start Selection */ -#define SSC_RCMR_STOP (0x1 << 12) /**< \brief (SSC_RCMR) Receive Stop Selection */ -#define SSC_RCMR_STTDLY (0xff << 16) /**< \brief (SSC_RCMR) Receive Start Delay */ -#define SSC_RCMR_PERIOD (0xff << 24) /**< \brief (SSC_RCMR) Receive Period Divider Selection */ -/* -------- SSC_RFMR : (SSC Offset: 0x14) Receive Frame Mode Register -------- */ -#define SSC_RFMR_DATLEN (0x1f << 0) /**< \brief (SSC_RFMR) Data Length */ -#define SSC_RFMR_LOOP (0x1 << 5) /**< \brief (SSC_RFMR) Loop Mode */ -#define SSC_RFMR_MSBF (0x1 << 7) /**< \brief (SSC_RFMR) Most Significant Bit First */ -#define SSC_RFMR_DATNB (0xf << 8) /**< \brief (SSC_RFMR) Data Number per Frame */ -#define SSC_RFMR_FSLEN (0xf << 16) /**< \brief (SSC_RFMR) Receive Frame Sync Length */ -#define SSC_RFMR_FSOS (0x7 << 20) /**< \brief (SSC_RFMR) Receive Frame Sync Output Selection */ -#define SSC_RFMR_FSEDGE (0x1 << 24) /**< \brief (SSC_RFMR) Frame Sync Edge Detection */ -#define SSC_RFMR_FSLEN_EXT (0xf << 28) /**< \brief (SSC_RFMR) FSLEN Field Extension */ -/* -------- SSC_TCMR : (SSC Offset: 0x18) Transmit Clock Mode Register -------- */ -#define SSC_TCMR_CKS (0x3 << 0) /**< \brief (SSC_TCMR) Transmit Clock Selection */ -#define SSC_TCMR_CKO (0x7 << 2) /**< \brief (SSC_TCMR) Transmit Clock Output Mode Selection */ -#define SSC_TCMR_CKI (0x1 << 5) /**< \brief (SSC_TCMR) Transmit Clock Inversion */ -#define SSC_TCMR_CKG (0x3 << 6) /**< \brief (SSC_TCMR) Transmit Clock Gating Selection */ -#define SSC_TCMR_START (0xf << 8) /**< \brief (SSC_TCMR) Transmit Start Selection */ -#define SSC_TCMR_STTDLY (0xff << 16) /**< \brief (SSC_TCMR) Transmit Start Delay */ -#define SSC_TCMR_PERIOD (0xff << 24) /**< \brief (SSC_TCMR) Transmit Period Divider Selection */ -/* -------- SSC_TFMR : (SSC Offset: 0x1C) Transmit Frame Mode Register -------- */ -#define SSC_TFMR_DATLEN (0x1f << 0) /**< \brief (SSC_TFMR) Data Length */ -#define SSC_TFMR_DATDEF (0x1 << 5) /**< \brief (SSC_TFMR) Data Default Value */ -#define SSC_TFMR_MSBF (0x1 << 7) /**< \brief (SSC_TFMR) Most Significant Bit First */ -#define SSC_TFMR_DATNB (0xf << 8) /**< \brief (SSC_TFMR) Data Number per frame */ -#define SSC_TFMR_FSLEN (0xf << 16) /**< \brief (SSC_TFMR) Transmit Frame Syn Length */ -#define SSC_TFMR_FSOS (0x7 << 20) /**< \brief (SSC_TFMR) Transmit Frame Sync Output Selection */ -#define SSC_TFMR_FSDEN (0x1 << 23) /**< \brief (SSC_TFMR) Frame Sync Data Enable */ -#define SSC_TFMR_FSEDGE (0x1 << 24) /**< \brief (SSC_TFMR) Frame Sync Edge Detection */ -#define SSC_TFMR_FSLEN_EXT (0xf << 28) /**< \brief (SSC_TFMR) FSLEN Field Extension */ -/* -------- SSC_RHR : (SSC Offset: 0x20) Receive Holding Register -------- */ -#define SSC_RHR_RDAT (0xffffffff << 0) /**< \brief (SSC_RHR) Receive Data */ -/* -------- SSC_THR : (SSC Offset: 0x24) Transmit Holding Register -------- */ -#define SSC_THR_TDAT (0xffffffff << 0) /**< \brief (SSC_THR) Transmit Data */ -/* -------- SSC_RSHR : (SSC Offset: 0x30) Receive Sync. Holding Register -------- */ -#define SSC_RSHR_RSDAT (0xffff << 0) /**< \brief (SSC_RSHR) Receive Synchronization Data */ -/* -------- SSC_TSHR : (SSC Offset: 0x34) Transmit Sync. Holding Register -------- */ -#define SSC_TSHR_TSDAT (0xffff << 0) /**< \brief (SSC_TSHR) Transmit Synchronization Data */ -/* -------- SSC_RC0R : (SSC Offset: 0x38) Receive Compare 0 Register -------- */ -#define SSC_RC0R_CP0 (0xffff << 0) /**< \brief (SSC_RC0R) Receive Compare Data 0 */ -/* -------- SSC_RC1R : (SSC Offset: 0x3C) Receive Compare 1 Register -------- */ -#define SSC_RC1R_CP1 (0xffff << 0) /**< \brief (SSC_RC1R) Receive Compare Data 1 */ -/* -------- SSC_SR : (SSC Offset: 0x40) Status Register -------- */ -#define SSC_SR_TXRDY (0x1 << 0) /**< \brief (SSC_SR) Transmit Ready */ -#define SSC_SR_TXEMPTY (0x1 << 1) /**< \brief (SSC_SR) Transmit Empty */ -#define SSC_SR_ENDTX (0x1 << 2) /**< \brief (SSC_SR) End of Transmission */ -#define SSC_SR_TXBUFE (0x1 << 3) /**< \brief (SSC_SR) Transmit Buffer Empty */ -#define SSC_SR_RXRDY (0x1 << 4) /**< \brief (SSC_SR) Receive Ready */ -#define SSC_SR_OVRUN (0x1 << 5) /**< \brief (SSC_SR) Receive Overrun */ -#define SSC_SR_ENDRX (0x1 << 6) /**< \brief (SSC_SR) End of Reception */ -#define SSC_SR_RXBUFF (0x1 << 7) /**< \brief (SSC_SR) Receive Buffer Full */ -#define SSC_SR_CP0 (0x1 << 8) /**< \brief (SSC_SR) Compare 0 */ -#define SSC_SR_CP1 (0x1 << 9) /**< \brief (SSC_SR) Compare 1 */ -#define SSC_SR_TXSYN (0x1 << 10) /**< \brief (SSC_SR) Transmit Sync */ -#define SSC_SR_RXSYN (0x1 << 11) /**< \brief (SSC_SR) Receive Sync */ -#define SSC_SR_TXEN (0x1 << 16) /**< \brief (SSC_SR) Transmit Enable */ -#define SSC_SR_RXEN (0x1 << 17) /**< \brief (SSC_SR) Receive Enable */ -/* -------- SSC_IER : (SSC Offset: 0x44) Interrupt Enable Register -------- */ -#define SSC_IER_TXRDY (0x1 << 0) /**< \brief (SSC_IER) Transmit Ready Interrupt Enable */ -#define SSC_IER_TXEMPTY (0x1 << 1) /**< \brief (SSC_IER) Transmit Empty Interrupt Enable */ -#define SSC_IER_ENDTX (0x1 << 2) /**< \brief (SSC_IER) End of Transmission Interrupt Enable */ -#define SSC_IER_TXBUFE (0x1 << 3) /**< \brief (SSC_IER) Transmit Buffer Empty Interrupt Enable */ -#define SSC_IER_RXRDY (0x1 << 4) /**< \brief (SSC_IER) Receive Ready Interrupt Enable */ -#define SSC_IER_OVRUN (0x1 << 5) /**< \brief (SSC_IER) Receive Overrun Interrupt Enable */ -#define SSC_IER_ENDRX (0x1 << 6) /**< \brief (SSC_IER) End of Reception Interrupt Enable */ -#define SSC_IER_RXBUFF (0x1 << 7) /**< \brief (SSC_IER) Receive Buffer Full Interrupt Enable */ -#define SSC_IER_CP0 (0x1 << 8) /**< \brief (SSC_IER) Compare 0 Interrupt Enable */ -#define SSC_IER_CP1 (0x1 << 9) /**< \brief (SSC_IER) Compare 1 Interrupt Enable */ -#define SSC_IER_TXSYN (0x1 << 10) /**< \brief (SSC_IER) Tx Sync Interrupt Enable */ -#define SSC_IER_RXSYN (0x1 << 11) /**< \brief (SSC_IER) Rx Sync Interrupt Enable */ -/* -------- SSC_IDR : (SSC Offset: 0x48) Interrupt Disable Register -------- */ -#define SSC_IDR_TXRDY (0x1 << 0) /**< \brief (SSC_IDR) Transmit Ready Interrupt Disable */ -#define SSC_IDR_TXEMPTY (0x1 << 1) /**< \brief (SSC_IDR) Transmit Empty Interrupt Disable */ -#define SSC_IDR_ENDTX (0x1 << 2) /**< \brief (SSC_IDR) End of Transmission Interrupt Disable */ -#define SSC_IDR_TXBUFE (0x1 << 3) /**< \brief (SSC_IDR) Transmit Buffer Empty Interrupt Disable */ -#define SSC_IDR_RXRDY (0x1 << 4) /**< \brief (SSC_IDR) Receive Ready Interrupt Disable */ -#define SSC_IDR_OVRUN (0x1 << 5) /**< \brief (SSC_IDR) Receive Overrun Interrupt Disable */ -#define SSC_IDR_ENDRX (0x1 << 6) /**< \brief (SSC_IDR) End of Reception Interrupt Disable */ -#define SSC_IDR_RXBUFF (0x1 << 7) /**< \brief (SSC_IDR) Receive Buffer Full Interrupt Disable */ -#define SSC_IDR_CP0 (0x1 << 8) /**< \brief (SSC_IDR) Compare 0 Interrupt Disable */ -#define SSC_IDR_CP1 (0x1 << 9) /**< \brief (SSC_IDR) Compare 1 Interrupt Disable */ -#define SSC_IDR_TXSYN (0x1 << 10) /**< \brief (SSC_IDR) Tx Sync Interrupt Enable */ -#define SSC_IDR_RXSYN (0x1 << 11) /**< \brief (SSC_IDR) Rx Sync Interrupt Enable */ -/* -------- SSC_IMR : (SSC Offset: 0x4C) Interrupt Mask Register -------- */ -#define SSC_IMR_TXRDY (0x1 << 0) /**< \brief (SSC_IMR) Transmit Ready Interrupt Mask */ -#define SSC_IMR_TXEMPTY (0x1 << 1) /**< \brief (SSC_IMR) Transmit Empty Interrupt Mask */ -#define SSC_IMR_ENDTX (0x1 << 2) /**< \brief (SSC_IMR) End of Transmission Interrupt Mask */ -#define SSC_IMR_TXBUFE (0x1 << 3) /**< \brief (SSC_IMR) Transmit Buffer Empty Interrupt Mask */ -#define SSC_IMR_RXRDY (0x1 << 4) /**< \brief (SSC_IMR) Receive Ready Interrupt Mask */ -#define SSC_IMR_OVRUN (0x1 << 5) /**< \brief (SSC_IMR) Receive Overrun Interrupt Mask */ -#define SSC_IMR_ENDRX (0x1 << 6) /**< \brief (SSC_IMR) End of Reception Interrupt Mask */ -#define SSC_IMR_RXBUFF (0x1 << 7) /**< \brief (SSC_IMR) Receive Buffer Full Interrupt Mask */ -#define SSC_IMR_CP0 (0x1 << 8) /**< \brief (SSC_IMR) Compare 0 Interrupt Mask */ -#define SSC_IMR_CP1 (0x1 << 9) /**< \brief (SSC_IMR) Compare 1 Interrupt Mask */ -#define SSC_IMR_TXSYN (0x1 << 10) /**< \brief (SSC_IMR) Tx Sync Interrupt Mask */ -#define SSC_IMR_RXSYN (0x1 << 11) /**< \brief (SSC_IMR) Rx Sync Interrupt Mask */ -/* -------- SSC_WPMR : (SSC Offset: 0xE4) Write Protect Mode Register -------- */ -#define SSC_WPMR_WPEN (0x1 << 0) /**< \brief (SSC_WPMR) Write Protect Enable */ -#define SSC_WPMR_WPKEY (0xffffff << 8) /**< \brief (SSC_WPMR) Write Protect KEY */ -/* -------- SSC_WPSR : (SSC Offset: 0xE8) Write Protect Status Register -------- */ -#define SSC_WPSR_WPVS (0x1 << 0) /**< \brief (SSC_WPSR) Write Protect Violation Status */ -#define SSC_WPSR_WPVSRC (0xffff << 8) /**< \brief (SSC_WPSR) Write Protect Violation Source */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Supply Controller */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_SUPC Supply Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Supc hardware registers */ -typedef struct { - WoReg SUPC_CR; /**< \brief (Supc Offset: 0x00) Supply Controller Control Register */ - RwReg SUPC_SMMR; /**< \brief (Supc Offset: 0x04) Supply Controller Supply Monitor Mode Register */ - RwReg SUPC_MR; /**< \brief (Supc Offset: 0x08) Supply Controller Mode Register */ - RwReg SUPC_WUMR; /**< \brief (Supc Offset: 0x0C) Supply Controller Wake Up Mode Register */ - RwReg SUPC_WUIR; /**< \brief (Supc Offset: 0x10) Supply Controller Wake Up Inputs Register */ - RoReg SUPC_SR; /**< \brief (Supc Offset: 0x14) Supply Controller Status Register */ -} Supc; -#endif /* __ASSEMBLY__ */ -/* -------- SUPC_CR : (SUPC Offset: 0x00) Supply Controller Control Register -------- */ -#define SUPC_CR_VROFF (0x1 << 2) /**< \brief (SUPC_CR) Voltage Regulator Off */ -#define SUPC_CR_VROFF_NO_EFFECT (0x0 << 2) /**< \brief (SUPC_CR) no effect. */ -#define SUPC_CR_VROFF_STOP_VREG (0x1 << 2) /**< \brief (SUPC_CR) if KEY is correct, asserts vddcore_nreset and stops the voltage regulator. */ -#define SUPC_CR_XTALSEL (0x1 << 3) /**< \brief (SUPC_CR) Crystal Oscillator Select */ -#define SUPC_CR_XTALSEL_NO_EFFECT (0x0 << 3) /**< \brief (SUPC_CR) no effect. */ -#define SUPC_CR_XTALSEL_CRYSTAL_SEL (0x1 << 3) /**< \brief (SUPC_CR) if KEY is correct, switches the slow clock on the crystal oscillator output. */ -#define SUPC_CR_KEY (0xff << 24) /**< \brief (SUPC_CR) Password */ -/* -------- SUPC_SMMR : (SUPC Offset: 0x04) Supply Controller Supply Monitor Mode Register -------- */ -#define SUPC_SMMR_SMTH (0xf << 0) /**< \brief (SUPC_SMMR) Supply Monitor Threshold */ -#define SUPC_SMMR_SMTH_1_9V (0x0 << 0) /**< \brief (SUPC_SMMR) 1.9 V */ -#define SUPC_SMMR_SMTH_2_0V (0x1 << 0) /**< \brief (SUPC_SMMR) 2.0 V */ -#define SUPC_SMMR_SMTH_2_1V (0x2 << 0) /**< \brief (SUPC_SMMR) 2.1 V */ -#define SUPC_SMMR_SMTH_2_2V (0x3 << 0) /**< \brief (SUPC_SMMR) 2.2 V */ -#define SUPC_SMMR_SMTH_2_3V (0x4 << 0) /**< \brief (SUPC_SMMR) 2.3 V */ -#define SUPC_SMMR_SMTH_2_4V (0x5 << 0) /**< \brief (SUPC_SMMR) 2.4 V */ -#define SUPC_SMMR_SMTH_2_5V (0x6 << 0) /**< \brief (SUPC_SMMR) 2.5 V */ -#define SUPC_SMMR_SMTH_2_6V (0x7 << 0) /**< \brief (SUPC_SMMR) 2.6 V */ -#define SUPC_SMMR_SMTH_2_7V (0x8 << 0) /**< \brief (SUPC_SMMR) 2.7 V */ -#define SUPC_SMMR_SMTH_2_8V (0x9 << 0) /**< \brief (SUPC_SMMR) 2.8 V */ -#define SUPC_SMMR_SMTH_2_9V (0xA << 0) /**< \brief (SUPC_SMMR) 2.9 V */ -#define SUPC_SMMR_SMTH_3_0V (0xB << 0) /**< \brief (SUPC_SMMR) 3.0 V */ -#define SUPC_SMMR_SMTH_3_1V (0xC << 0) /**< \brief (SUPC_SMMR) 3.1 V */ -#define SUPC_SMMR_SMTH_3_2V (0xD << 0) /**< \brief (SUPC_SMMR) 3.2 V */ -#define SUPC_SMMR_SMTH_3_3V (0xE << 0) /**< \brief (SUPC_SMMR) 3.3 V */ -#define SUPC_SMMR_SMTH_3_4V (0xF << 0) /**< \brief (SUPC_SMMR) 3.4 V */ -#define SUPC_SMMR_SMSMPL (0x7 << 8) /**< \brief (SUPC_SMMR) Supply Monitor Sampling Period */ -#define SUPC_SMMR_SMSMPL_SMD (0x0 << 8) /**< \brief (SUPC_SMMR) Supply Monitor disabled */ -#define SUPC_SMMR_SMSMPL_CSM (0x1 << 8) /**< \brief (SUPC_SMMR) Continuous Supply Monitor */ -#define SUPC_SMMR_SMSMPL_32SLCK (0x2 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 32 SLCK periods */ -#define SUPC_SMMR_SMSMPL_256SLCK (0x3 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 256 SLCK periods */ -#define SUPC_SMMR_SMSMPL_2048SLCK (0x4 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 2,048 SLCK periods */ -#define SUPC_SMMR_SMRSTEN (0x1 << 12) /**< \brief (SUPC_SMMR) Supply Monitor Reset Enable */ -#define SUPC_SMMR_SMRSTEN_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_SMMR) the core reset signal "vddcore_nreset" is not affected when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMRSTEN_ENABLE (0x1 << 12) /**< \brief (SUPC_SMMR) the core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMIEN (0x1 << 13) /**< \brief (SUPC_SMMR) Supply Monitor Interrupt Enable */ -#define SUPC_SMMR_SMIEN_NOT_ENABLE (0x0 << 13) /**< \brief (SUPC_SMMR) the SUPC interrupt signal is not affected when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMIEN_ENABLE (0x1 << 13) /**< \brief (SUPC_SMMR) the SUPC interrupt signal is asserted when a supply monitor detection occurs. */ -/* -------- SUPC_MR : (SUPC Offset: 0x08) Supply Controller Mode Register -------- */ -#define SUPC_MR_BODRSTEN (0x1 << 12) /**< \brief (SUPC_MR) Brownout Detector Reset Enable */ -#define SUPC_MR_BODRSTEN_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_MR) the core reset signal "vddcore_nreset" is not affected when a brownout detection occurs. */ -#define SUPC_MR_BODRSTEN_ENABLE (0x1 << 12) /**< \brief (SUPC_MR) the core reset signal, vddcore_nreset is asserted when a brownout detection occurs. */ -#define SUPC_MR_BODDIS (0x1 << 13) /**< \brief (SUPC_MR) Brownout Detector Disable */ -#define SUPC_MR_BODDIS_ENABLE (0x0 << 13) /**< \brief (SUPC_MR) the core brownout detector is enabled. */ -#define SUPC_MR_BODDIS_DISABLE (0x1 << 13) /**< \brief (SUPC_MR) the core brownout detector is disabled. */ -#define SUPC_MR_VDDIORDY (0x1 << 14) /**< \brief (SUPC_MR) VDDIO Ready */ -#define SUPC_MR_VDDIORDY_VDDIO_REMOVED (0x0 << 14) /**< \brief (SUPC_MR) VDDIO is removed (used before going to backup mode when backup batteries are used) */ -#define SUPC_MR_VDDIORDY_VDDIO_PRESENT (0x1 << 14) /**< \brief (SUPC_MR) VDDIO is present (used before going to backup mode when backup batteries are used) */ -#define SUPC_MR_OSCBYPASS (0x1 << 20) /**< \brief (SUPC_MR) Oscillator Bypass */ -#define SUPC_MR_OSCBYPASS_NO_EFFECT (0x0 << 20) /**< \brief (SUPC_MR) no effect. Clock selection depends on XTALSEL value. */ -#define SUPC_MR_OSCBYPASS_BYPASS (0x1 << 20) /**< \brief (SUPC_MR) the 32-KHz XTAL oscillator is selected and is put in bypass mode. */ -#define SUPC_MR_KEY (0xff << 24) /**< \brief (SUPC_MR) Password Key */ -/* -------- SUPC_WUMR : (SUPC Offset: 0x0C) Supply Controller Wake Up Mode Register -------- */ -#define SUPC_WUMR_FWUPEN (0x1 << 0) /**< \brief (SUPC_WUMR) Force Wake Up Enable */ -#define SUPC_WUMR_FWUPEN_NOT_ENABLE (0x0 << 0) /**< \brief (SUPC_WUMR) the Force Wake Up pin has no wake up effect. */ -#define SUPC_WUMR_FWUPEN_ENABLE (0x1 << 0) /**< \brief (SUPC_WUMR) the Force Wake Up pin low forces the wake up of the core power supply. */ -#define SUPC_WUMR_SMEN (0x1 << 1) /**< \brief (SUPC_WUMR) Supply Monitor Wake Up Enable */ -#define SUPC_WUMR_SMEN_NOT_ENABLE (0x0 << 1) /**< \brief (SUPC_WUMR) the supply monitor detection has no wake up effect. */ -#define SUPC_WUMR_SMEN_ENABLE (0x1 << 1) /**< \brief (SUPC_WUMR) the supply monitor detection forces the wake up of the core power supply. */ -#define SUPC_WUMR_RTTEN (0x1 << 2) /**< \brief (SUPC_WUMR) Real Time Timer Wake Up Enable */ -#define SUPC_WUMR_RTTEN_NOT_ENABLE (0x0 << 2) /**< \brief (SUPC_WUMR) the RTT alarm signal has no wake up effect. */ -#define SUPC_WUMR_RTTEN_ENABLE (0x1 << 2) /**< \brief (SUPC_WUMR) the RTT alarm signal forces the wake up of the core power supply. */ -#define SUPC_WUMR_RTCEN (0x1 << 3) /**< \brief (SUPC_WUMR) Real Time Clock Wake Up Enable */ -#define SUPC_WUMR_RTCEN_NOT_ENABLE (0x0 << 3) /**< \brief (SUPC_WUMR) the RTC alarm signal has no wake up effect. */ -#define SUPC_WUMR_RTCEN_ENABLE (0x1 << 3) /**< \brief (SUPC_WUMR) the RTC alarm signal forces the wake up of the core power supply. */ -#define SUPC_WUMR_FWUPDBC (0x7 << 8) /**< \brief (SUPC_WUMR) Force Wake Up Debouncer */ -#define SUPC_WUMR_FWUPDBC_1SCLK (0x0 << 8) /**< \brief (SUPC_WUMR) Immediate, no debouncing, detected active at least on one Slow Clock edge. */ -#define SUPC_WUMR_FWUPDBC_3SCLK (0x1 << 8) /**< \brief (SUPC_WUMR) FWUP shall be low for at least 3 SLCK periods */ -#define SUPC_WUMR_FWUPDBC_32SCLK (0x2 << 8) /**< \brief (SUPC_WUMR) FWUP shall be low for at least 32 SLCK periods */ -#define SUPC_WUMR_FWUPDBC_512SCLK (0x3 << 8) /**< \brief (SUPC_WUMR) FWUP shall be low for at least 512 SLCK periods */ -#define SUPC_WUMR_FWUPDBC_4096SCLK (0x4 << 8) /**< \brief (SUPC_WUMR) FWUP shall be low for at least 4,096 SLCK periods */ -#define SUPC_WUMR_FWUPDBC_32768SCLK (0x5 << 8) /**< \brief (SUPC_WUMR) FWUP shall be low for at least 32,768 SLCK periods */ -#define SUPC_WUMR_WKUPDBC (0x7 << 12) /**< \brief (SUPC_WUMR) Wake Up Inputs Debouncer */ -#define SUPC_WUMR_WKUPDBC_1SCLK (0x0 << 12) /**< \brief (SUPC_WUMR) Immediate, no debouncing, detected active at least on one Slow Clock edge. */ -#define SUPC_WUMR_WKUPDBC_3SCLK (0x1 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 3 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_32SCLK (0x2 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 32 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_512SCLK (0x3 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 512 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_4096SCLK (0x4 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 4,096 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_32768SCLK (0x5 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 32,768 SLCK periods */ -/* -------- SUPC_WUIR : (SUPC Offset: 0x10) Supply Controller Wake Up Inputs Register -------- */ -#define SUPC_WUIR_WKUPEN0 (0x1 << 0) /**< \brief (SUPC_WUIR) Wake Up Input Enable 0 */ -#define SUPC_WUIR_WKUPEN0_NOT_ENABLE (0x0 << 0) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN0_ENABLE (0x1 << 0) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN1 (0x1 << 1) /**< \brief (SUPC_WUIR) Wake Up Input Enable 1 */ -#define SUPC_WUIR_WKUPEN1_NOT_ENABLE (0x0 << 1) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN1_ENABLE (0x1 << 1) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN2 (0x1 << 2) /**< \brief (SUPC_WUIR) Wake Up Input Enable 2 */ -#define SUPC_WUIR_WKUPEN2_NOT_ENABLE (0x0 << 2) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN2_ENABLE (0x1 << 2) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN3 (0x1 << 3) /**< \brief (SUPC_WUIR) Wake Up Input Enable 3 */ -#define SUPC_WUIR_WKUPEN3_NOT_ENABLE (0x0 << 3) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN3_ENABLE (0x1 << 3) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN4 (0x1 << 4) /**< \brief (SUPC_WUIR) Wake Up Input Enable 4 */ -#define SUPC_WUIR_WKUPEN4_NOT_ENABLE (0x0 << 4) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN4_ENABLE (0x1 << 4) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN5 (0x1 << 5) /**< \brief (SUPC_WUIR) Wake Up Input Enable 5 */ -#define SUPC_WUIR_WKUPEN5_NOT_ENABLE (0x0 << 5) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN5_ENABLE (0x1 << 5) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN6 (0x1 << 6) /**< \brief (SUPC_WUIR) Wake Up Input Enable 6 */ -#define SUPC_WUIR_WKUPEN6_NOT_ENABLE (0x0 << 6) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN6_ENABLE (0x1 << 6) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN7 (0x1 << 7) /**< \brief (SUPC_WUIR) Wake Up Input Enable 7 */ -#define SUPC_WUIR_WKUPEN7_NOT_ENABLE (0x0 << 7) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN7_ENABLE (0x1 << 7) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN8 (0x1 << 8) /**< \brief (SUPC_WUIR) Wake Up Input Enable 8 */ -#define SUPC_WUIR_WKUPEN8_NOT_ENABLE (0x0 << 8) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN8_ENABLE (0x1 << 8) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN9 (0x1 << 9) /**< \brief (SUPC_WUIR) Wake Up Input Enable 9 */ -#define SUPC_WUIR_WKUPEN9_NOT_ENABLE (0x0 << 9) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN9_ENABLE (0x1 << 9) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN10 (0x1 << 10) /**< \brief (SUPC_WUIR) Wake Up Input Enable 10 */ -#define SUPC_WUIR_WKUPEN10_NOT_ENABLE (0x0 << 10) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN10_ENABLE (0x1 << 10) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN11 (0x1 << 11) /**< \brief (SUPC_WUIR) Wake Up Input Enable 11 */ -#define SUPC_WUIR_WKUPEN11_NOT_ENABLE (0x0 << 11) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN11_ENABLE (0x1 << 11) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN12 (0x1 << 12) /**< \brief (SUPC_WUIR) Wake Up Input Enable 12 */ -#define SUPC_WUIR_WKUPEN12_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN12_ENABLE (0x1 << 12) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN13 (0x1 << 13) /**< \brief (SUPC_WUIR) Wake Up Input Enable 13 */ -#define SUPC_WUIR_WKUPEN13_NOT_ENABLE (0x0 << 13) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN13_ENABLE (0x1 << 13) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN14 (0x1 << 14) /**< \brief (SUPC_WUIR) Wake Up Input Enable 14 */ -#define SUPC_WUIR_WKUPEN14_NOT_ENABLE (0x0 << 14) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN14_ENABLE (0x1 << 14) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN15 (0x1 << 15) /**< \brief (SUPC_WUIR) Wake Up Input Enable 15 */ -#define SUPC_WUIR_WKUPEN15_NOT_ENABLE (0x0 << 15) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN15_ENABLE (0x1 << 15) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT0 (0x1 << 16) /**< \brief (SUPC_WUIR) Wake Up Input Transition 0 */ -#define SUPC_WUIR_WKUPT0_HIGH_TO_LOW (0x0 << 16) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT0_LOW_TO_HIGH (0x1 << 16) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT1 (0x1 << 17) /**< \brief (SUPC_WUIR) Wake Up Input Transition 1 */ -#define SUPC_WUIR_WKUPT1_HIGH_TO_LOW (0x0 << 17) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT1_LOW_TO_HIGH (0x1 << 17) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT2 (0x1 << 18) /**< \brief (SUPC_WUIR) Wake Up Input Transition 2 */ -#define SUPC_WUIR_WKUPT2_HIGH_TO_LOW (0x0 << 18) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT2_LOW_TO_HIGH (0x1 << 18) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT3 (0x1 << 19) /**< \brief (SUPC_WUIR) Wake Up Input Transition 3 */ -#define SUPC_WUIR_WKUPT3_HIGH_TO_LOW (0x0 << 19) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT3_LOW_TO_HIGH (0x1 << 19) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT4 (0x1 << 20) /**< \brief (SUPC_WUIR) Wake Up Input Transition 4 */ -#define SUPC_WUIR_WKUPT4_HIGH_TO_LOW (0x0 << 20) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT4_LOW_TO_HIGH (0x1 << 20) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT5 (0x1 << 21) /**< \brief (SUPC_WUIR) Wake Up Input Transition 5 */ -#define SUPC_WUIR_WKUPT5_HIGH_TO_LOW (0x0 << 21) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT5_LOW_TO_HIGH (0x1 << 21) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT6 (0x1 << 22) /**< \brief (SUPC_WUIR) Wake Up Input Transition 6 */ -#define SUPC_WUIR_WKUPT6_HIGH_TO_LOW (0x0 << 22) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT6_LOW_TO_HIGH (0x1 << 22) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT7 (0x1 << 23) /**< \brief (SUPC_WUIR) Wake Up Input Transition 7 */ -#define SUPC_WUIR_WKUPT7_HIGH_TO_LOW (0x0 << 23) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT7_LOW_TO_HIGH (0x1 << 23) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT8 (0x1 << 24) /**< \brief (SUPC_WUIR) Wake Up Input Transition 8 */ -#define SUPC_WUIR_WKUPT8_HIGH_TO_LOW (0x0 << 24) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT8_LOW_TO_HIGH (0x1 << 24) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT9 (0x1 << 25) /**< \brief (SUPC_WUIR) Wake Up Input Transition 9 */ -#define SUPC_WUIR_WKUPT9_HIGH_TO_LOW (0x0 << 25) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT9_LOW_TO_HIGH (0x1 << 25) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT10 (0x1 << 26) /**< \brief (SUPC_WUIR) Wake Up Input Transition 10 */ -#define SUPC_WUIR_WKUPT10_HIGH_TO_LOW (0x0 << 26) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT10_LOW_TO_HIGH (0x1 << 26) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT11 (0x1 << 27) /**< \brief (SUPC_WUIR) Wake Up Input Transition 11 */ -#define SUPC_WUIR_WKUPT11_HIGH_TO_LOW (0x0 << 27) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT11_LOW_TO_HIGH (0x1 << 27) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT12 (0x1 << 28) /**< \brief (SUPC_WUIR) Wake Up Input Transition 12 */ -#define SUPC_WUIR_WKUPT12_HIGH_TO_LOW (0x0 << 28) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT12_LOW_TO_HIGH (0x1 << 28) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT13 (0x1 << 29) /**< \brief (SUPC_WUIR) Wake Up Input Transition 13 */ -#define SUPC_WUIR_WKUPT13_HIGH_TO_LOW (0x0 << 29) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT13_LOW_TO_HIGH (0x1 << 29) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT14 (0x1 << 30) /**< \brief (SUPC_WUIR) Wake Up Input Transition 14 */ -#define SUPC_WUIR_WKUPT14_HIGH_TO_LOW (0x0 << 30) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT14_LOW_TO_HIGH (0x1 << 30) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT15 (0x1 << 31) /**< \brief (SUPC_WUIR) Wake Up Input Transition 15 */ -#define SUPC_WUIR_WKUPT15_HIGH_TO_LOW (0x0 << 31) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT15_LOW_TO_HIGH (0x1 << 31) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -/* -------- SUPC_SR : (SUPC Offset: 0x14) Supply Controller Status Register -------- */ -#define SUPC_SR_FWUPS (0x1 << 0) /**< \brief (SUPC_SR) FWUP Wake Up Status */ -#define SUPC_SR_FWUPS_NO (0x0 << 0) /**< \brief (SUPC_SR) no wake up due to the assertion of the FWUP pin has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_FWUPS_PRESENT (0x1 << 0) /**< \brief (SUPC_SR) at least one wake up due to the assertion of the FWUP pin has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_WKUPS (0x1 << 1) /**< \brief (SUPC_SR) WKUP Wake Up Status */ -#define SUPC_SR_WKUPS_NO (0x0 << 1) /**< \brief (SUPC_SR) no wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_WKUPS_PRESENT (0x1 << 1) /**< \brief (SUPC_SR) at least one wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_SMWS (0x1 << 2) /**< \brief (SUPC_SR) Supply Monitor Detection Wake Up Status */ -#define SUPC_SR_SMWS_NO (0x0 << 2) /**< \brief (SUPC_SR) no wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_SMWS_PRESENT (0x1 << 2) /**< \brief (SUPC_SR) at least one wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_BODRSTS (0x1 << 3) /**< \brief (SUPC_SR) Brownout Detector Reset Status */ -#define SUPC_SR_BODRSTS_NO (0x0 << 3) /**< \brief (SUPC_SR) no core brownout rising edge event has been detected since the last read of the SUPC_SR. */ -#define SUPC_SR_BODRSTS_PRESENT (0x1 << 3) /**< \brief (SUPC_SR) at least one brownout output rising edge event has been detected since the last read of the SUPC_SR. */ -#define SUPC_SR_SMRSTS (0x1 << 4) /**< \brief (SUPC_SR) Supply Monitor Reset Status */ -#define SUPC_SR_SMRSTS_NO (0x0 << 4) /**< \brief (SUPC_SR) no supply monitor detection has generated a core reset since the last read of the SUPC_SR. */ -#define SUPC_SR_SMRSTS_PRESENT (0x1 << 4) /**< \brief (SUPC_SR) at least one supply monitor detection has generated a core reset since the last read of the SUPC_SR. */ -#define SUPC_SR_SMS (0x1 << 5) /**< \brief (SUPC_SR) Supply Monitor Status */ -#define SUPC_SR_SMS_NO (0x0 << 5) /**< \brief (SUPC_SR) no supply monitor detection since the last read of SUPC_SR. */ -#define SUPC_SR_SMS_PRESENT (0x1 << 5) /**< \brief (SUPC_SR) at least one supply monitor detection since the last read of SUPC_SR. */ -#define SUPC_SR_SMOS (0x1 << 6) /**< \brief (SUPC_SR) Supply Monitor Output Status */ -#define SUPC_SR_SMOS_HIGH (0x0 << 6) /**< \brief (SUPC_SR) the supply monitor detected VDDUTMI higher than its threshold at its last measurement. */ -#define SUPC_SR_SMOS_LOW (0x1 << 6) /**< \brief (SUPC_SR) the supply monitor detected VDDUTMI lower than its threshold at its last measurement. */ -#define SUPC_SR_OSCSEL (0x1 << 7) /**< \brief (SUPC_SR) 32-kHz Oscillator Selection Status */ -#define SUPC_SR_OSCSEL_RC (0x0 << 7) /**< \brief (SUPC_SR) the slow clock, SLCK is generated by the embedded 32-kHz RC oscillator. */ -#define SUPC_SR_OSCSEL_CRYST (0x1 << 7) /**< \brief (SUPC_SR) the slow clock, SLCK is generated by the 32-kHz crystal oscillator. */ -#define SUPC_SR_FWUPIS (0x1 << 12) /**< \brief (SUPC_SR) FWUP Input Status */ -#define SUPC_SR_FWUPIS_LOW (0x0 << 12) /**< \brief (SUPC_SR) FWUP input is tied low. */ -#define SUPC_SR_FWUPIS_HIGH (0x1 << 12) /**< \brief (SUPC_SR) FWUP input is tied high. */ -#define SUPC_SR_WKUPIS0 (0x1 << 16) /**< \brief (SUPC_SR) WKUP Input Status 0 */ -#define SUPC_SR_WKUPIS0_DIS (0x0 << 16) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS0_EN (0x1 << 16) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS1 (0x1 << 17) /**< \brief (SUPC_SR) WKUP Input Status 1 */ -#define SUPC_SR_WKUPIS1_DIS (0x0 << 17) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS1_EN (0x1 << 17) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS2 (0x1 << 18) /**< \brief (SUPC_SR) WKUP Input Status 2 */ -#define SUPC_SR_WKUPIS2_DIS (0x0 << 18) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS2_EN (0x1 << 18) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS3 (0x1 << 19) /**< \brief (SUPC_SR) WKUP Input Status 3 */ -#define SUPC_SR_WKUPIS3_DIS (0x0 << 19) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS3_EN (0x1 << 19) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS4 (0x1 << 20) /**< \brief (SUPC_SR) WKUP Input Status 4 */ -#define SUPC_SR_WKUPIS4_DIS (0x0 << 20) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS4_EN (0x1 << 20) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS5 (0x1 << 21) /**< \brief (SUPC_SR) WKUP Input Status 5 */ -#define SUPC_SR_WKUPIS5_DIS (0x0 << 21) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS5_EN (0x1 << 21) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS6 (0x1 << 22) /**< \brief (SUPC_SR) WKUP Input Status 6 */ -#define SUPC_SR_WKUPIS6_DIS (0x0 << 22) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS6_EN (0x1 << 22) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS7 (0x1 << 23) /**< \brief (SUPC_SR) WKUP Input Status 7 */ -#define SUPC_SR_WKUPIS7_DIS (0x0 << 23) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS7_EN (0x1 << 23) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS8 (0x1 << 24) /**< \brief (SUPC_SR) WKUP Input Status 8 */ -#define SUPC_SR_WKUPIS8_DIS (0x0 << 24) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS8_EN (0x1 << 24) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS9 (0x1 << 25) /**< \brief (SUPC_SR) WKUP Input Status 9 */ -#define SUPC_SR_WKUPIS9_DIS (0x0 << 25) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS9_EN (0x1 << 25) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS10 (0x1 << 26) /**< \brief (SUPC_SR) WKUP Input Status 10 */ -#define SUPC_SR_WKUPIS10_DIS (0x0 << 26) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS10_EN (0x1 << 26) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS11 (0x1 << 27) /**< \brief (SUPC_SR) WKUP Input Status 11 */ -#define SUPC_SR_WKUPIS11_DIS (0x0 << 27) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS11_EN (0x1 << 27) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS12 (0x1 << 28) /**< \brief (SUPC_SR) WKUP Input Status 12 */ -#define SUPC_SR_WKUPIS12_DIS (0x0 << 28) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS12_EN (0x1 << 28) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS13 (0x1 << 29) /**< \brief (SUPC_SR) WKUP Input Status 13 */ -#define SUPC_SR_WKUPIS13_DIS (0x0 << 29) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS13_EN (0x1 << 29) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS14 (0x1 << 30) /**< \brief (SUPC_SR) WKUP Input Status 14 */ -#define SUPC_SR_WKUPIS14_DIS (0x0 << 30) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS14_EN (0x1 << 30) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS15 (0x1 << 31) /**< \brief (SUPC_SR) WKUP Input Status 15 */ -#define SUPC_SR_WKUPIS15_DIS (0x0 << 31) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS15_EN (0x1 << 31) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Timer Counter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_TC Timer Counter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief TcChannel hardware registers */ -typedef struct { - RwReg TC_CCR; /**< \brief (TcChannel Offset: 0x0) Channel Control Register */ - RwReg TC_CMR; /**< \brief (TcChannel Offset: 0x4) Channel Mode Register */ - RwReg Reserved1[2]; - RwReg TC_CV; /**< \brief (TcChannel Offset: 0x10) Counter Value */ - RwReg TC_RA; /**< \brief (TcChannel Offset: 0x14) Register A */ - RwReg TC_RB; /**< \brief (TcChannel Offset: 0x18) Register B */ - RwReg TC_RC; /**< \brief (TcChannel Offset: 0x1C) Register C */ - RwReg TC_SR; /**< \brief (TcChannel Offset: 0x20) Status Register */ - RwReg TC_IER; /**< \brief (TcChannel Offset: 0x24) Interrupt Enable Register */ - RwReg TC_IDR; /**< \brief (TcChannel Offset: 0x28) Interrupt Disable Register */ - RwReg TC_IMR; /**< \brief (TcChannel Offset: 0x2C) Interrupt Mask Register */ - RwReg Reserved2[4]; -} TcChannel; -/** \brief Tc hardware registers */ -typedef struct { - TcChannel TC_CHANNEL[3]; /**< \brief (Tc Offset: 0x0) channel = 0 .. 2 */ - WoReg TC_BCR; /**< \brief (Tc Offset: 0xC0) Block Control Register */ - RwReg TC_BMR; /**< \brief (Tc Offset: 0xC4) Block Mode Register */ - WoReg TC_QIER; /**< \brief (Tc Offset: 0xC8) QDEC Interrupt Enable Register */ - WoReg TC_QIDR; /**< \brief (Tc Offset: 0xCC) QDEC Interrupt Disable Register */ - RoReg TC_QIMR; /**< \brief (Tc Offset: 0xD0) QDEC Interrupt Mask Register */ - RoReg TC_QISR; /**< \brief (Tc Offset: 0xD4) QDEC Interrupt Status Register */ - RwReg Reserved1[9]; - RoReg TC_VER; /**< \brief (Tc Offset: 0xFC) Version Register */ -} Tc; -#endif /* __ASSEMBLY__ */ -/* -------- TC_CCR0 : (TC Offset: 0x0) Channel Control Register (channel = 0) -------- */ -#define TC_CCR0_CLKEN (0x1 << 0) /**< \brief (TC_CCR0) Counter Clock Enable Command */ -#define TC_CCR0_CLKDIS (0x1 << 1) /**< \brief (TC_CCR0) Counter Clock Disable Command */ -#define TC_CCR0_SWTRG (0x1 << 2) /**< \brief (TC_CCR0) Software Trigger Command */ -/* -------- TC_CMR0 : (TC Offset: 0x4) Channel Mode Register (channel = 0) -------- */ -#define TC_CMR0_TCCLKS (0x7 << 0) /**< \brief (TC_CMR0) Clock Selection */ -#define TC_CMR0_CLKI (0x1 << 3) /**< \brief (TC_CMR0) Clock Invert */ -#define TC_CMR0_BURST (0x3 << 4) /**< \brief (TC_CMR0) Burst Signal Selection */ -#define TC_CMR0_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR0) The clock is not gated by an external signal. */ -#define TC_CMR0_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR0) XC0 is ANDed with the selected clock. */ -#define TC_CMR0_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR0) XC1 is ANDed with the selected clock. */ -#define TC_CMR0_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR0) XC2 is ANDed with the selected clock. */ -#define TC_CMR0_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR0) Counter Clock Stopped with RB Loading */ -#define TC_CMR0_LDBDIS (0x1 << 7) /**< \brief (TC_CMR0) Counter Clock Disable with RB Loading */ -#define TC_CMR0_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR0) External Trigger Edge Selection */ -#define TC_CMR0_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR0) none */ -#define TC_CMR0_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR0) rising edge */ -#define TC_CMR0_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR0) falling edge */ -#define TC_CMR0_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR0) each edge */ -#define TC_CMR0_ABETRG (0x1 << 10) /**< \brief (TC_CMR0) TIOA or TIOB External Trigger Selection */ -#define TC_CMR0_CPCTRG (0x1 << 14) /**< \brief (TC_CMR0) RC Compare Trigger Enable */ -#define TC_CMR0_WAVE (0x1 << 15) /**< \brief (TC_CMR0) */ -#define TC_CMR0_LDRA (0x3 << 16) /**< \brief (TC_CMR0) RA Loading Selection */ -#define TC_CMR0_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR0) none */ -#define TC_CMR0_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR0) rising edge of TIOA */ -#define TC_CMR0_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR0) falling edge of TIOA */ -#define TC_CMR0_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR0) each edge of TIOA */ -#define TC_CMR0_LDRB (0x3 << 18) /**< \brief (TC_CMR0) RB Loading Selection */ -#define TC_CMR0_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR0) none */ -#define TC_CMR0_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR0) rising edge of TIOA */ -#define TC_CMR0_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR0) falling edge of TIOA */ -#define TC_CMR0_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR0) each edge of TIOA */ -/* -------- TC_CV0 : (TC Offset: 0x10) Counter Value (channel = 0) -------- */ -#define TC_CV0_CV (0xffff << 0) /**< \brief (TC_CV0) Counter Value */ -/* -------- TC_RA0 : (TC Offset: 0x14) Register A (channel = 0) -------- */ -#define TC_RA0_RA (0xffff << 0) /**< \brief (TC_RA0) Register A */ -/* -------- TC_RB0 : (TC Offset: 0x18) Register B (channel = 0) -------- */ -#define TC_RB0_RB (0xffff << 0) /**< \brief (TC_RB0) Register B */ -/* -------- TC_RC0 : (TC Offset: 0x1C) Register C (channel = 0) -------- */ -#define TC_RC0_RC (0xffff << 0) /**< \brief (TC_RC0) Register C */ -/* -------- TC_SR0 : (TC Offset: 0x20) Status Register (channel = 0) -------- */ -#define TC_SR0_COVFS (0x1 << 0) /**< \brief (TC_SR0) Counter Overflow Status */ -#define TC_SR0_LOVRS (0x1 << 1) /**< \brief (TC_SR0) Load Overrun Status */ -#define TC_SR0_CPAS (0x1 << 2) /**< \brief (TC_SR0) RA Compare Status */ -#define TC_SR0_CPBS (0x1 << 3) /**< \brief (TC_SR0) RB Compare Status */ -#define TC_SR0_CPCS (0x1 << 4) /**< \brief (TC_SR0) RC Compare Status */ -#define TC_SR0_LDRAS (0x1 << 5) /**< \brief (TC_SR0) RA Loading Status */ -#define TC_SR0_LDRBS (0x1 << 6) /**< \brief (TC_SR0) RB Loading Status */ -#define TC_SR0_ETRGS (0x1 << 7) /**< \brief (TC_SR0) External Trigger Status */ -#define TC_SR0_CLKSTA (0x1 << 16) /**< \brief (TC_SR0) Clock Enabling Status */ -#define TC_SR0_MTIOA (0x1 << 17) /**< \brief (TC_SR0) TIOA Mirror */ -#define TC_SR0_MTIOB (0x1 << 18) /**< \brief (TC_SR0) TIOB Mirror */ -/* -------- TC_IER0 : (TC Offset: 0x24) Interrupt Enable Register (channel = 0) -------- */ -#define TC_IER0_COVFS (0x1 << 0) /**< \brief (TC_IER0) Counter Overflow */ -#define TC_IER0_LOVRS (0x1 << 1) /**< \brief (TC_IER0) Load Overrun */ -#define TC_IER0_CPAS (0x1 << 2) /**< \brief (TC_IER0) RA Compare */ -#define TC_IER0_CPBS (0x1 << 3) /**< \brief (TC_IER0) RB Compare */ -#define TC_IER0_CPCS (0x1 << 4) /**< \brief (TC_IER0) RC Compare */ -#define TC_IER0_LDRAS (0x1 << 5) /**< \brief (TC_IER0) RA Loading */ -#define TC_IER0_LDRBS (0x1 << 6) /**< \brief (TC_IER0) RB Loading */ -#define TC_IER0_ETRGS (0x1 << 7) /**< \brief (TC_IER0) External Trigger */ -/* -------- TC_IDR0 : (TC Offset: 0x28) Interrupt Disable Register (channel = 0) -------- */ -#define TC_IDR0_COVFS (0x1 << 0) /**< \brief (TC_IDR0) Counter Overflow */ -#define TC_IDR0_LOVRS (0x1 << 1) /**< \brief (TC_IDR0) Load Overrun */ -#define TC_IDR0_CPAS (0x1 << 2) /**< \brief (TC_IDR0) RA Compare */ -#define TC_IDR0_CPBS (0x1 << 3) /**< \brief (TC_IDR0) RB Compare */ -#define TC_IDR0_CPCS (0x1 << 4) /**< \brief (TC_IDR0) RC Compare */ -#define TC_IDR0_LDRAS (0x1 << 5) /**< \brief (TC_IDR0) RA Loading */ -#define TC_IDR0_LDRBS (0x1 << 6) /**< \brief (TC_IDR0) RB Loading */ -#define TC_IDR0_ETRGS (0x1 << 7) /**< \brief (TC_IDR0) External Trigger */ -/* -------- TC_IMR0 : (TC Offset: 0x2C) Interrupt Mask Register (channel = 0) -------- */ -#define TC_IMR0_COVFS (0x1 << 0) /**< \brief (TC_IMR0) Counter Overflow */ -#define TC_IMR0_LOVRS (0x1 << 1) /**< \brief (TC_IMR0) Load Overrun */ -#define TC_IMR0_CPAS (0x1 << 2) /**< \brief (TC_IMR0) RA Compare */ -#define TC_IMR0_CPBS (0x1 << 3) /**< \brief (TC_IMR0) RB Compare */ -#define TC_IMR0_CPCS (0x1 << 4) /**< \brief (TC_IMR0) RC Compare */ -#define TC_IMR0_LDRAS (0x1 << 5) /**< \brief (TC_IMR0) RA Loading */ -#define TC_IMR0_LDRBS (0x1 << 6) /**< \brief (TC_IMR0) RB Loading */ -#define TC_IMR0_ETRGS (0x1 << 7) /**< \brief (TC_IMR0) External Trigger */ -/* -------- TC_CCR1 : (TC Offset: 0x40) Channel Control Register (channel = 1) -------- */ -#define TC_CCR1_CLKEN (0x1 << 0) /**< \brief (TC_CCR1) Counter Clock Enable Command */ -#define TC_CCR1_CLKDIS (0x1 << 1) /**< \brief (TC_CCR1) Counter Clock Disable Command */ -#define TC_CCR1_SWTRG (0x1 << 2) /**< \brief (TC_CCR1) Software Trigger Command */ -/* -------- TC_CMR1 : (TC Offset: 0x44) Channel Mode Register (channel = 1) -------- */ -#define TC_CMR1_TCCLKS (0x7 << 0) /**< \brief (TC_CMR1) Clock Selection */ -#define TC_CMR1_CLKI (0x1 << 3) /**< \brief (TC_CMR1) Clock Invert */ -#define TC_CMR1_BURST (0x3 << 4) /**< \brief (TC_CMR1) Burst Signal Selection */ -#define TC_CMR1_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR1) The clock is not gated by an external signal. */ -#define TC_CMR1_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR1) XC0 is ANDed with the selected clock. */ -#define TC_CMR1_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR1) XC1 is ANDed with the selected clock. */ -#define TC_CMR1_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR1) XC2 is ANDed with the selected clock. */ -#define TC_CMR1_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR1) Counter Clock Stopped with RB Loading */ -#define TC_CMR1_LDBDIS (0x1 << 7) /**< \brief (TC_CMR1) Counter Clock Disable with RB Loading */ -#define TC_CMR1_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR1) External Trigger Edge Selection */ -#define TC_CMR1_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR1) none */ -#define TC_CMR1_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR1) rising edge */ -#define TC_CMR1_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR1) falling edge */ -#define TC_CMR1_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR1) each edge */ -#define TC_CMR1_ABETRG (0x1 << 10) /**< \brief (TC_CMR1) TIOA or TIOB External Trigger Selection */ -#define TC_CMR1_CPCTRG (0x1 << 14) /**< \brief (TC_CMR1) RC Compare Trigger Enable */ -#define TC_CMR1_WAVE (0x1 << 15) /**< \brief (TC_CMR1) */ -#define TC_CMR1_LDRA (0x3 << 16) /**< \brief (TC_CMR1) RA Loading Selection */ -#define TC_CMR1_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR1) none */ -#define TC_CMR1_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR1) rising edge of TIOA */ -#define TC_CMR1_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR1) falling edge of TIOA */ -#define TC_CMR1_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR1) each edge of TIOA */ -#define TC_CMR1_LDRB (0x3 << 18) /**< \brief (TC_CMR1) RB Loading Selection */ -#define TC_CMR1_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR1) none */ -#define TC_CMR1_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR1) rising edge of TIOA */ -#define TC_CMR1_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR1) falling edge of TIOA */ -#define TC_CMR1_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR1) each edge of TIOA */ -/* -------- TC_CV1 : (TC Offset: 0x50) Counter Value (channel = 1) -------- */ -#define TC_CV1_CV (0xffff << 0) /**< \brief (TC_CV1) Counter Value */ -/* -------- TC_RA1 : (TC Offset: 0x54) Register A (channel = 1) -------- */ -#define TC_RA1_RA (0xffff << 0) /**< \brief (TC_RA1) Register A */ -/* -------- TC_RB1 : (TC Offset: 0x58) Register B (channel = 1) -------- */ -#define TC_RB1_RB (0xffff << 0) /**< \brief (TC_RB1) Register B */ -/* -------- TC_RC1 : (TC Offset: 0x5C) Register C (channel = 1) -------- */ -#define TC_RC1_RC (0xffff << 0) /**< \brief (TC_RC1) Register C */ -/* -------- TC_SR1 : (TC Offset: 0x60) Status Register (channel = 1) -------- */ -#define TC_SR1_COVFS (0x1 << 0) /**< \brief (TC_SR1) Counter Overflow Status */ -#define TC_SR1_LOVRS (0x1 << 1) /**< \brief (TC_SR1) Load Overrun Status */ -#define TC_SR1_CPAS (0x1 << 2) /**< \brief (TC_SR1) RA Compare Status */ -#define TC_SR1_CPBS (0x1 << 3) /**< \brief (TC_SR1) RB Compare Status */ -#define TC_SR1_CPCS (0x1 << 4) /**< \brief (TC_SR1) RC Compare Status */ -#define TC_SR1_LDRAS (0x1 << 5) /**< \brief (TC_SR1) RA Loading Status */ -#define TC_SR1_LDRBS (0x1 << 6) /**< \brief (TC_SR1) RB Loading Status */ -#define TC_SR1_ETRGS (0x1 << 7) /**< \brief (TC_SR1) External Trigger Status */ -#define TC_SR1_CLKSTA (0x1 << 16) /**< \brief (TC_SR1) Clock Enabling Status */ -#define TC_SR1_MTIOA (0x1 << 17) /**< \brief (TC_SR1) TIOA Mirror */ -#define TC_SR1_MTIOB (0x1 << 18) /**< \brief (TC_SR1) TIOB Mirror */ -/* -------- TC_IER1 : (TC Offset: 0x64) Interrupt Enable Register (channel = 1) -------- */ -#define TC_IER1_COVFS (0x1 << 0) /**< \brief (TC_IER1) Counter Overflow */ -#define TC_IER1_LOVRS (0x1 << 1) /**< \brief (TC_IER1) Load Overrun */ -#define TC_IER1_CPAS (0x1 << 2) /**< \brief (TC_IER1) RA Compare */ -#define TC_IER1_CPBS (0x1 << 3) /**< \brief (TC_IER1) RB Compare */ -#define TC_IER1_CPCS (0x1 << 4) /**< \brief (TC_IER1) RC Compare */ -#define TC_IER1_LDRAS (0x1 << 5) /**< \brief (TC_IER1) RA Loading */ -#define TC_IER1_LDRBS (0x1 << 6) /**< \brief (TC_IER1) RB Loading */ -#define TC_IER1_ETRGS (0x1 << 7) /**< \brief (TC_IER1) External Trigger */ -/* -------- TC_IDR1 : (TC Offset: 0x68) Interrupt Disable Register (channel = 1) -------- */ -#define TC_IDR1_COVFS (0x1 << 0) /**< \brief (TC_IDR1) Counter Overflow */ -#define TC_IDR1_LOVRS (0x1 << 1) /**< \brief (TC_IDR1) Load Overrun */ -#define TC_IDR1_CPAS (0x1 << 2) /**< \brief (TC_IDR1) RA Compare */ -#define TC_IDR1_CPBS (0x1 << 3) /**< \brief (TC_IDR1) RB Compare */ -#define TC_IDR1_CPCS (0x1 << 4) /**< \brief (TC_IDR1) RC Compare */ -#define TC_IDR1_LDRAS (0x1 << 5) /**< \brief (TC_IDR1) RA Loading */ -#define TC_IDR1_LDRBS (0x1 << 6) /**< \brief (TC_IDR1) RB Loading */ -#define TC_IDR1_ETRGS (0x1 << 7) /**< \brief (TC_IDR1) External Trigger */ -/* -------- TC_IMR1 : (TC Offset: 0x6C) Interrupt Mask Register (channel = 1) -------- */ -#define TC_IMR1_COVFS (0x1 << 0) /**< \brief (TC_IMR1) Counter Overflow */ -#define TC_IMR1_LOVRS (0x1 << 1) /**< \brief (TC_IMR1) Load Overrun */ -#define TC_IMR1_CPAS (0x1 << 2) /**< \brief (TC_IMR1) RA Compare */ -#define TC_IMR1_CPBS (0x1 << 3) /**< \brief (TC_IMR1) RB Compare */ -#define TC_IMR1_CPCS (0x1 << 4) /**< \brief (TC_IMR1) RC Compare */ -#define TC_IMR1_LDRAS (0x1 << 5) /**< \brief (TC_IMR1) RA Loading */ -#define TC_IMR1_LDRBS (0x1 << 6) /**< \brief (TC_IMR1) RB Loading */ -#define TC_IMR1_ETRGS (0x1 << 7) /**< \brief (TC_IMR1) External Trigger */ -/* -------- TC_CCR2 : (TC Offset: 0x80) Channel Control Register (channel = 2) -------- */ -#define TC_CCR2_CLKEN (0x1 << 0) /**< \brief (TC_CCR2) Counter Clock Enable Command */ -#define TC_CCR2_CLKDIS (0x1 << 1) /**< \brief (TC_CCR2) Counter Clock Disable Command */ -#define TC_CCR2_SWTRG (0x1 << 2) /**< \brief (TC_CCR2) Software Trigger Command */ -/* -------- TC_CMR2 : (TC Offset: 0x84) Channel Mode Register (channel = 2) -------- */ -#define TC_CMR2_TCCLKS (0x7 << 0) /**< \brief (TC_CMR2) Clock Selection */ -#define TC_CMR2_CLKI (0x1 << 3) /**< \brief (TC_CMR2) Clock Invert */ -#define TC_CMR2_BURST (0x3 << 4) /**< \brief (TC_CMR2) Burst Signal Selection */ -#define TC_CMR2_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR2) The clock is not gated by an external signal. */ -#define TC_CMR2_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR2) XC0 is ANDed with the selected clock. */ -#define TC_CMR2_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR2) XC1 is ANDed with the selected clock. */ -#define TC_CMR2_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR2) XC2 is ANDed with the selected clock. */ -#define TC_CMR2_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR2) Counter Clock Stopped with RB Loading */ -#define TC_CMR2_LDBDIS (0x1 << 7) /**< \brief (TC_CMR2) Counter Clock Disable with RB Loading */ -#define TC_CMR2_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR2) External Trigger Edge Selection */ -#define TC_CMR2_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR2) none */ -#define TC_CMR2_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR2) rising edge */ -#define TC_CMR2_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR2) falling edge */ -#define TC_CMR2_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR2) each edge */ -#define TC_CMR2_ABETRG (0x1 << 10) /**< \brief (TC_CMR2) TIOA or TIOB External Trigger Selection */ -#define TC_CMR2_CPCTRG (0x1 << 14) /**< \brief (TC_CMR2) RC Compare Trigger Enable */ -#define TC_CMR2_WAVE (0x1 << 15) /**< \brief (TC_CMR2) */ -#define TC_CMR2_LDRA (0x3 << 16) /**< \brief (TC_CMR2) RA Loading Selection */ -#define TC_CMR2_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR2) none */ -#define TC_CMR2_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR2) rising edge of TIOA */ -#define TC_CMR2_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR2) falling edge of TIOA */ -#define TC_CMR2_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR2) each edge of TIOA */ -#define TC_CMR2_LDRB (0x3 << 18) /**< \brief (TC_CMR2) RB Loading Selection */ -#define TC_CMR2_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR2) none */ -#define TC_CMR2_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR2) rising edge of TIOA */ -#define TC_CMR2_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR2) falling edge of TIOA */ -#define TC_CMR2_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR2) each edge of TIOA */ -/* -------- TC_CV2 : (TC Offset: 0x90) Counter Value (channel = 2) -------- */ -#define TC_CV2_CV (0xffff << 0) /**< \brief (TC_CV2) Counter Value */ -/* -------- TC_RA2 : (TC Offset: 0x94) Register A (channel = 2) -------- */ -#define TC_RA2_RA (0xffff << 0) /**< \brief (TC_RA2) Register A */ -/* -------- TC_RB2 : (TC Offset: 0x98) Register B (channel = 2) -------- */ -#define TC_RB2_RB (0xffff << 0) /**< \brief (TC_RB2) Register B */ -/* -------- TC_RC2 : (TC Offset: 0x9C) Register C (channel = 2) -------- */ -#define TC_RC2_RC (0xffff << 0) /**< \brief (TC_RC2) Register C */ -/* -------- TC_SR2 : (TC Offset: 0xA0) Status Register (channel = 2) -------- */ -#define TC_SR2_COVFS (0x1 << 0) /**< \brief (TC_SR2) Counter Overflow Status */ -#define TC_SR2_LOVRS (0x1 << 1) /**< \brief (TC_SR2) Load Overrun Status */ -#define TC_SR2_CPAS (0x1 << 2) /**< \brief (TC_SR2) RA Compare Status */ -#define TC_SR2_CPBS (0x1 << 3) /**< \brief (TC_SR2) RB Compare Status */ -#define TC_SR2_CPCS (0x1 << 4) /**< \brief (TC_SR2) RC Compare Status */ -#define TC_SR2_LDRAS (0x1 << 5) /**< \brief (TC_SR2) RA Loading Status */ -#define TC_SR2_LDRBS (0x1 << 6) /**< \brief (TC_SR2) RB Loading Status */ -#define TC_SR2_ETRGS (0x1 << 7) /**< \brief (TC_SR2) External Trigger Status */ -#define TC_SR2_CLKSTA (0x1 << 16) /**< \brief (TC_SR2) Clock Enabling Status */ -#define TC_SR2_MTIOA (0x1 << 17) /**< \brief (TC_SR2) TIOA Mirror */ -#define TC_SR2_MTIOB (0x1 << 18) /**< \brief (TC_SR2) TIOB Mirror */ -/* -------- TC_IER2 : (TC Offset: 0xA4) Interrupt Enable Register (channel = 2) -------- */ -#define TC_IER2_COVFS (0x1 << 0) /**< \brief (TC_IER2) Counter Overflow */ -#define TC_IER2_LOVRS (0x1 << 1) /**< \brief (TC_IER2) Load Overrun */ -#define TC_IER2_CPAS (0x1 << 2) /**< \brief (TC_IER2) RA Compare */ -#define TC_IER2_CPBS (0x1 << 3) /**< \brief (TC_IER2) RB Compare */ -#define TC_IER2_CPCS (0x1 << 4) /**< \brief (TC_IER2) RC Compare */ -#define TC_IER2_LDRAS (0x1 << 5) /**< \brief (TC_IER2) RA Loading */ -#define TC_IER2_LDRBS (0x1 << 6) /**< \brief (TC_IER2) RB Loading */ -#define TC_IER2_ETRGS (0x1 << 7) /**< \brief (TC_IER2) External Trigger */ -/* -------- TC_IDR2 : (TC Offset: 0xA8) Interrupt Disable Register (channel = 2) -------- */ -#define TC_IDR2_COVFS (0x1 << 0) /**< \brief (TC_IDR2) Counter Overflow */ -#define TC_IDR2_LOVRS (0x1 << 1) /**< \brief (TC_IDR2) Load Overrun */ -#define TC_IDR2_CPAS (0x1 << 2) /**< \brief (TC_IDR2) RA Compare */ -#define TC_IDR2_CPBS (0x1 << 3) /**< \brief (TC_IDR2) RB Compare */ -#define TC_IDR2_CPCS (0x1 << 4) /**< \brief (TC_IDR2) RC Compare */ -#define TC_IDR2_LDRAS (0x1 << 5) /**< \brief (TC_IDR2) RA Loading */ -#define TC_IDR2_LDRBS (0x1 << 6) /**< \brief (TC_IDR2) RB Loading */ -#define TC_IDR2_ETRGS (0x1 << 7) /**< \brief (TC_IDR2) External Trigger */ -/* -------- TC_IMR2 : (TC Offset: 0xAC) Interrupt Mask Register (channel = 2) -------- */ -#define TC_IMR2_COVFS (0x1 << 0) /**< \brief (TC_IMR2) Counter Overflow */ -#define TC_IMR2_LOVRS (0x1 << 1) /**< \brief (TC_IMR2) Load Overrun */ -#define TC_IMR2_CPAS (0x1 << 2) /**< \brief (TC_IMR2) RA Compare */ -#define TC_IMR2_CPBS (0x1 << 3) /**< \brief (TC_IMR2) RB Compare */ -#define TC_IMR2_CPCS (0x1 << 4) /**< \brief (TC_IMR2) RC Compare */ -#define TC_IMR2_LDRAS (0x1 << 5) /**< \brief (TC_IMR2) RA Loading */ -#define TC_IMR2_LDRBS (0x1 << 6) /**< \brief (TC_IMR2) RB Loading */ -#define TC_IMR2_ETRGS (0x1 << 7) /**< \brief (TC_IMR2) External Trigger */ -/* -------- TC_BCR : (TC Offset: 0xC0) Block Control Register -------- */ -#define TC_BCR_SYNC (0x1 << 0) /**< \brief (TC_BCR) Synchro Command */ -/* -------- TC_BMR : (TC Offset: 0xC4) Block Mode Register -------- */ -#define TC_BMR_TC0XC0S (0x3 << 0) /**< \brief (TC_BMR) External Clock Signal 0 Selection */ -#define TC_BMR_TC0XC0S_TCLK0 (0x0 << 0) /**< \brief (TC_BMR) TCLK0 */ -#define TC_BMR_TC0XC0S_NONE (0x1 << 0) /**< \brief (TC_BMR) none */ -#define TC_BMR_TC0XC0S_TIOA1 (0x2 << 0) /**< \brief (TC_BMR) TIOA1 */ -#define TC_BMR_TC0XC0S_TIOA2 (0x3 << 0) /**< \brief (TC_BMR) TIOA2 */ -#define TC_BMR_TC1XC1S (0x3 << 2) /**< \brief (TC_BMR) External Clock Signal 1 Selection */ -#define TC_BMR_TC1XC1S_TCLK1 (0x0 << 2) /**< \brief (TC_BMR) TCLK1 */ -#define TC_BMR_TC1XC1S_NONE (0x1 << 2) /**< \brief (TC_BMR) none */ -#define TC_BMR_TC1XC1S_TIOA0 (0x2 << 2) /**< \brief (TC_BMR) TIOA0 */ -#define TC_BMR_TC1XC1S_TIOA2 (0x3 << 2) /**< \brief (TC_BMR) TIOA2 */ -#define TC_BMR_TC2XC2S (0x3 << 4) /**< \brief (TC_BMR) External Clock Signal 2 Selection */ -#define TC_BMR_TC2XC2S_TCLK2 (0x0 << 4) /**< \brief (TC_BMR) TCLK2 */ -#define TC_BMR_TC2XC2S_NONE (0x1 << 4) /**< \brief (TC_BMR) none */ -#define TC_BMR_TC2XC2S_TIOA0 (0x2 << 4) /**< \brief (TC_BMR) TIOA0 */ -#define TC_BMR_TC2XC2S_TIOA1 (0x3 << 4) /**< \brief (TC_BMR) TIOA1 */ -#define TC_BMR_QDEN (0x1 << 8) /**< \brief (TC_BMR) Quadrature Decoder ENabled */ -#define TC_BMR_POSEN (0x1 << 9) /**< \brief (TC_BMR) POSition ENabled */ -#define TC_BMR_SPEEDEN (0x1 << 10) /**< \brief (TC_BMR) SPEED ENabled */ -#define TC_BMR_QDTRANS (0x1 << 11) /**< \brief (TC_BMR) Quadrature Decoding TRANSparent */ -#define TC_BMR_EDGPHA (0x1 << 12) /**< \brief (TC_BMR) EDGe on PHA count mode */ -#define TC_BMR_INVA (0x1 << 13) /**< \brief (TC_BMR) INVerted phA */ -#define TC_BMR_INVB (0x1 << 14) /**< \brief (TC_BMR) INVerted phB */ -#define TC_BMR_INVIDX (0x1 << 15) /**< \brief (TC_BMR) INVerted InDeX */ -#define TC_BMR_SWAP (0x1 << 16) /**< \brief (TC_BMR) SWAP PHA and PHB */ -#define TC_BMR_IDXPHB (0x1 << 17) /**< \brief (TC_BMR) InDeX pin is PHB pin */ -#define TC_BMR_FILTER (0x1 << 19) /**< \brief (TC_BMR) */ -#define TC_BMR_MAXFILT (0x3f << 20) /**< \brief (TC_BMR) MAXimum FILTer */ -/* -------- TC_QIER : (TC Offset: 0xC8) QDEC Interrupt Enable Register -------- */ -#define TC_QIER_IDX (0x1 << 0) /**< \brief (TC_QIER) InDeX */ -#define TC_QIER_DIRCHG (0x1 << 1) /**< \brief (TC_QIER) DIRection CHanGe */ -#define TC_QIER_QERR (0x1 << 2) /**< \brief (TC_QIER) Quadrature ERRor */ -/* -------- TC_QIDR : (TC Offset: 0xCC) QDEC Interrupt Disable Register -------- */ -#define TC_QIDR_IDX (0x1 << 0) /**< \brief (TC_QIDR) InDeX */ -#define TC_QIDR_DIRCHG (0x1 << 1) /**< \brief (TC_QIDR) DIRection CHanGe */ -#define TC_QIDR_QERR (0x1 << 2) /**< \brief (TC_QIDR) Quadrature ERRor */ -/* -------- TC_QIMR : (TC Offset: 0xD0) QDEC Interrupt Mask Register -------- */ -#define TC_QIMR_IDX (0x1 << 0) /**< \brief (TC_QIMR) InDeX */ -#define TC_QIMR_DIRCHG (0x1 << 1) /**< \brief (TC_QIMR) DIRection CHanGe */ -#define TC_QIMR_QERR (0x1 << 2) /**< \brief (TC_QIMR) Quadrature ERRor */ -/* -------- TC_QISR : (TC Offset: 0xD4) QDEC Interrupt Status Register -------- */ -#define TC_QISR_IDX (0x1 << 0) /**< \brief (TC_QISR) InDeX */ -#define TC_QISR_DIRCHG (0x1 << 1) /**< \brief (TC_QISR) DIRection CHanGe */ -#define TC_QISR_QERR (0x1 << 2) /**< \brief (TC_QISR) Quadrature ERRor */ -#define TC_QISR_DIR (0x1 << 8) /**< \brief (TC_QISR) Direction */ -/* -------- TC_VER : (TC Offset: 0xFC) Version Register -------- */ -#define TC_VER_VERSION (0xfff << 0) /**< \brief (TC_VER) */ -#define TC_VER_MFN (0x7 << 16) /**< \brief (TC_VER) */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Two-wire Interface */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_TWI Two-wire Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Twi hardware registers */ -typedef struct { - WoReg TWI_CR; /**< \brief (Twi Offset: 0x00) Control Register */ - RwReg TWI_MMR; /**< \brief (Twi Offset: 0x04) Master Mode Register */ - RwReg TWI_SMR; /**< \brief (Twi Offset: 0x08) Slave Mode Register */ - RwReg TWI_IADR; /**< \brief (Twi Offset: 0x0C) Internal Address Register */ - RwReg TWI_CWGR; /**< \brief (Twi Offset: 0x10) Clock Waveform Generator Register */ - RwReg Reserved1[3]; - RoReg TWI_SR; /**< \brief (Twi Offset: 0x20) Status Register */ - WoReg TWI_IER; /**< \brief (Twi Offset: 0x24) Interrupt Enable Register */ - WoReg TWI_IDR; /**< \brief (Twi Offset: 0x28) Interrupt Disable Register */ - RoReg TWI_IMR; /**< \brief (Twi Offset: 0x2C) Interrupt Mask Register */ - RoReg TWI_RHR; /**< \brief (Twi Offset: 0x30) Receive Holding Register */ - WoReg TWI_THR; /**< \brief (Twi Offset: 0x34) Transmit Holding Register */ - RwReg Reserved2[50]; - RwReg TWI_RPR; /**< \brief (Twi Offset: 0x100) Receive Pointer Register */ - RwReg TWI_RCR; /**< \brief (Twi Offset: 0x104) Receive Counter Register */ - RwReg TWI_TPR; /**< \brief (Twi Offset: 0x108) Transmit Pointer Register */ - RwReg TWI_TCR; /**< \brief (Twi Offset: 0x10C) Transmit Counter Register */ - RwReg TWI_RNPR; /**< \brief (Twi Offset: 0x110) Receive Next Pointer Register */ - RwReg TWI_RNCR; /**< \brief (Twi Offset: 0x114) Receive Next Counter Register */ - RwReg TWI_TNPR; /**< \brief (Twi Offset: 0x118) Transmit Next Pointer Register */ - RwReg TWI_TNCR; /**< \brief (Twi Offset: 0x11C) Transmit Next Counter Register */ - WoReg TWI_PTCR; /**< \brief (Twi Offset: 0x120) Transfer Control Register */ - RoReg TWI_PTSR; /**< \brief (Twi Offset: 0x124) Transfer Status Register */ -} Twi; -#endif /* __ASSEMBLY__ */ -/* -------- TWI_CR : (TWI Offset: 0x00) Control Register -------- */ -#define TWI_CR_START (0x1 << 0) /**< \brief (TWI_CR) Send a START Condition */ -#define TWI_CR_STOP (0x1 << 1) /**< \brief (TWI_CR) Send a STOP Condition */ -#define TWI_CR_MSEN (0x1 << 2) /**< \brief (TWI_CR) TWI Master Mode Enabled */ -#define TWI_CR_MSDIS (0x1 << 3) /**< \brief (TWI_CR) TWI Master Mode Disabled */ -#define TWI_CR_SVEN (0x1 << 4) /**< \brief (TWI_CR) TWI Slave Mode Enabled */ -#define TWI_CR_SVDIS (0x1 << 5) /**< \brief (TWI_CR) TWI Slave Mode Disabled */ -#define TWI_CR_QUICK (0x1 << 6) /**< \brief (TWI_CR) SMBUS Quick Command */ -#define TWI_CR_SWRST (0x1 << 7) /**< \brief (TWI_CR) Software Reset */ -/* -------- TWI_MMR : (TWI Offset: 0x04) Master Mode Register -------- */ -#define TWI_MMR_IADRSZ (0x3 << 8) /**< \brief (TWI_MMR) Internal Device Address Size */ -#define TWI_MMR_IADRSZ_NO (0x0 << 8) /**< \brief (TWI_MMR) No internal device address */ -#define TWI_MMR_IADRSZ_1_BYTE (0x1 << 8) /**< \brief (TWI_MMR) One-byte internal device address */ -#define TWI_MMR_IADRSZ_2_BYTE (0x2 << 8) /**< \brief (TWI_MMR) Two-byte internal device address */ -#define TWI_MMR_IADRSZ_3_BYTE (0x3 << 8) /**< \brief (TWI_MMR) Three-byte internal device address */ -#define TWI_MMR_MREAD (0x1 << 12) /**< \brief (TWI_MMR) Master Read Direction */ -#define TWI_MMR_DADR (0x7f << 16) /**< \brief (TWI_MMR) Device Address */ -/* -------- TWI_SMR : (TWI Offset: 0x08) Slave Mode Register -------- */ -#define TWI_SMR_SADR (0x7f << 16) /**< \brief (TWI_SMR) Slave Address */ -/* -------- TWI_IADR : (TWI Offset: 0x0C) Internal Address Register -------- */ -#define TWI_IADR_IADR (0xffffff << 0) /**< \brief (TWI_IADR) Internal Address */ -/* -------- TWI_CWGR : (TWI Offset: 0x10) Clock Waveform Generator Register -------- */ -#define TWI_CWGR_CLDIV (0xff << 0) /**< \brief (TWI_CWGR) Clock Low Divider */ -#define TWI_CWGR_CHDIV (0xff << 8) /**< \brief (TWI_CWGR) Clock High Divider */ -#define TWI_CWGR_CKDIV (0x7 << 16) /**< \brief (TWI_CWGR) Clock Divider */ -/* -------- TWI_SR : (TWI Offset: 0x20) Status Register -------- */ -#define TWI_SR_TXCOMP (0x1 << 0) /**< \brief (TWI_SR) Transmission Completed (automatically set / reset) */ -#define TWI_SR_RXRDY (0x1 << 1) /**< \brief (TWI_SR) Receive Holding Register Ready (automatically set / reset) */ -#define TWI_SR_TXRDY (0x1 << 2) /**< \brief (TWI_SR) Transmit Holding Register Ready (automatically set / reset) */ -#define TWI_SR_SVREAD (0x1 << 3) /**< \brief (TWI_SR) Slave Read (automatically set / reset) */ -#define TWI_SR_SVACC (0x1 << 4) /**< \brief (TWI_SR) Slave Access (automatically set / reset) */ -#define TWI_SR_GACC (0x1 << 5) /**< \brief (TWI_SR) General Call Access (clear on read) */ -#define TWI_SR_OVRE (0x1 << 6) /**< \brief (TWI_SR) Overrun Error (clear on read) */ -#define TWI_SR_NACK (0x1 << 8) /**< \brief (TWI_SR) Not Acknowledged (clear on read) */ -#define TWI_SR_ARBLST (0x1 << 9) /**< \brief (TWI_SR) Arbitration Lost (clear on read) */ -#define TWI_SR_SCLWS (0x1 << 10) /**< \brief (TWI_SR) Clock Wait State (automatically set / reset) */ -#define TWI_SR_EOSACC (0x1 << 11) /**< \brief (TWI_SR) End Of Slave Access (clear on read) */ -#define TWI_SR_ENDRX (0x1 << 12) /**< \brief (TWI_SR) End of RX buffer */ -#define TWI_SR_ENDTX (0x1 << 13) /**< \brief (TWI_SR) End of TX buffer */ -#define TWI_SR_RXBUFF (0x1 << 14) /**< \brief (TWI_SR) RX Buffer Full */ -#define TWI_SR_TXBUFE (0x1 << 15) /**< \brief (TWI_SR) TX Buffer Empty */ -/* -------- TWI_IER : (TWI Offset: 0x24) Interrupt Enable Register -------- */ -#define TWI_IER_TXCOMP (0x1 << 0) /**< \brief (TWI_IER) Transmission Completed Interrupt Enable */ -#define TWI_IER_RXRDY (0x1 << 1) /**< \brief (TWI_IER) Receive Holding Register Ready Interrupt Enable */ -#define TWI_IER_TXRDY (0x1 << 2) /**< \brief (TWI_IER) Transmit Holding Register Ready Interrupt Enable */ -#define TWI_IER_SVACC (0x1 << 4) /**< \brief (TWI_IER) Slave Access Interrupt Enable */ -#define TWI_IER_GACC (0x1 << 5) /**< \brief (TWI_IER) General Call Access Interrupt Enable */ -#define TWI_IER_OVRE (0x1 << 6) /**< \brief (TWI_IER) Overrun Error Interrupt Enable */ -#define TWI_IER_NACK (0x1 << 8) /**< \brief (TWI_IER) Not Acknowledge Interrupt Enable */ -#define TWI_IER_ARBLST (0x1 << 9) /**< \brief (TWI_IER) Arbitration Lost Interrupt Enable */ -#define TWI_IER_SCL_WS (0x1 << 10) /**< \brief (TWI_IER) Clock Wait State Interrupt Enable */ -#define TWI_IER_EOSACC (0x1 << 11) /**< \brief (TWI_IER) End Of Slave Access Interrupt Enable */ -#define TWI_IER_ENDRX (0x1 << 12) /**< \brief (TWI_IER) End of Receive Buffer Interrupt Enable */ -#define TWI_IER_ENDTX (0x1 << 13) /**< \brief (TWI_IER) End of Transmit Buffer Interrupt Enable */ -#define TWI_IER_RXBUFF (0x1 << 14) /**< \brief (TWI_IER) Receive Buffer Full Interrupt Enable */ -#define TWI_IER_TXBUFE (0x1 << 15) /**< \brief (TWI_IER) Transmit Buffer Empty Interrupt Enable */ -/* -------- TWI_IDR : (TWI Offset: 0x28) Interrupt Disable Register -------- */ -#define TWI_IDR_TXCOMP (0x1 << 0) /**< \brief (TWI_IDR) Transmission Completed Interrupt Disable */ -#define TWI_IDR_RXRDY (0x1 << 1) /**< \brief (TWI_IDR) Receive Holding Register Ready Interrupt Disable */ -#define TWI_IDR_TXRDY (0x1 << 2) /**< \brief (TWI_IDR) Transmit Holding Register Ready Interrupt Disable */ -#define TWI_IDR_SVACC (0x1 << 4) /**< \brief (TWI_IDR) Slave Access Interrupt Disable */ -#define TWI_IDR_GACC (0x1 << 5) /**< \brief (TWI_IDR) General Call Access Interrupt Disable */ -#define TWI_IDR_OVRE (0x1 << 6) /**< \brief (TWI_IDR) Overrun Error Interrupt Disable */ -#define TWI_IDR_NACK (0x1 << 8) /**< \brief (TWI_IDR) Not Acknowledge Interrupt Disable */ -#define TWI_IDR_ARBLST (0x1 << 9) /**< \brief (TWI_IDR) Arbitration Lost Interrupt Disable */ -#define TWI_IDR_SCL_WS (0x1 << 10) /**< \brief (TWI_IDR) Clock Wait State Interrupt Disable */ -#define TWI_IDR_EOSACC (0x1 << 11) /**< \brief (TWI_IDR) End Of Slave Access Interrupt Disable */ -#define TWI_IDR_ENDRX (0x1 << 12) /**< \brief (TWI_IDR) End of Receive Buffer Interrupt Disable */ -#define TWI_IDR_ENDTX (0x1 << 13) /**< \brief (TWI_IDR) End of Transmit Buffer Interrupt Disable */ -#define TWI_IDR_RXBUFF (0x1 << 14) /**< \brief (TWI_IDR) Receive Buffer Full Interrupt Disable */ -#define TWI_IDR_TXBUFE (0x1 << 15) /**< \brief (TWI_IDR) Transmit Buffer Empty Interrupt Disable */ -/* -------- TWI_IMR : (TWI Offset: 0x2C) Interrupt Mask Register -------- */ -#define TWI_IMR_TXCOMP (0x1 << 0) /**< \brief (TWI_IMR) Transmission Completed Interrupt Mask */ -#define TWI_IMR_RXRDY (0x1 << 1) /**< \brief (TWI_IMR) Receive Holding Register Ready Interrupt Mask */ -#define TWI_IMR_TXRDY (0x1 << 2) /**< \brief (TWI_IMR) Transmit Holding Register Ready Interrupt Mask */ -#define TWI_IMR_SVACC (0x1 << 4) /**< \brief (TWI_IMR) Slave Access Interrupt Mask */ -#define TWI_IMR_GACC (0x1 << 5) /**< \brief (TWI_IMR) General Call Access Interrupt Mask */ -#define TWI_IMR_OVRE (0x1 << 6) /**< \brief (TWI_IMR) Overrun Error Interrupt Mask */ -#define TWI_IMR_NACK (0x1 << 8) /**< \brief (TWI_IMR) Not Acknowledge Interrupt Mask */ -#define TWI_IMR_ARBLST (0x1 << 9) /**< \brief (TWI_IMR) Arbitration Lost Interrupt Mask */ -#define TWI_IMR_SCL_WS (0x1 << 10) /**< \brief (TWI_IMR) Clock Wait State Interrupt Mask */ -#define TWI_IMR_EOSACC (0x1 << 11) /**< \brief (TWI_IMR) End Of Slave Access Interrupt Mask */ -#define TWI_IMR_ENDRX (0x1 << 12) /**< \brief (TWI_IMR) End of Receive Buffer Interrupt Mask */ -#define TWI_IMR_ENDTX (0x1 << 13) /**< \brief (TWI_IMR) End of Transmit Buffer Interrupt Mask */ -#define TWI_IMR_RXBUFF (0x1 << 14) /**< \brief (TWI_IMR) Receive Buffer Full Interrupt Mask */ -#define TWI_IMR_TXBUFE (0x1 << 15) /**< \brief (TWI_IMR) Transmit Buffer Empty Interrupt Mask */ -/* -------- TWI_RHR : (TWI Offset: 0x30) Receive Holding Register -------- */ -#define TWI_RHR_RXDATA (0xff << 0) /**< \brief (TWI_RHR) Master or Slave Receive Holding Data */ -/* -------- TWI_THR : (TWI Offset: 0x34) Transmit Holding Register -------- */ -#define TWI_THR_TXDATA (0xff << 0) /**< \brief (TWI_THR) Master or Slave Transmit Holding Data */ -/* -------- TWI_RPR : (TWI Offset: 0x100) Receive Pointer Register -------- */ -#define TWI_RPR_RXPTR (0xffffffff << 0) /**< \brief (TWI_RPR) Receive Pointer Register */ -/* -------- TWI_RCR : (TWI Offset: 0x104) Receive Counter Register -------- */ -#define TWI_RCR_RXCTR (0xffff << 0) /**< \brief (TWI_RCR) Receive Counter Register */ -/* -------- TWI_TPR : (TWI Offset: 0x108) Transmit Pointer Register -------- */ -#define TWI_TPR_TXPTR (0xffffffff << 0) /**< \brief (TWI_TPR) Transmit Counter Register */ -/* -------- TWI_TCR : (TWI Offset: 0x10C) Transmit Counter Register -------- */ -#define TWI_TCR_TXCTR (0xffff << 0) /**< \brief (TWI_TCR) Transmit Counter Register */ -/* -------- TWI_RNPR : (TWI Offset: 0x110) Receive Next Pointer Register -------- */ -#define TWI_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (TWI_RNPR) Receive Next Pointer */ -/* -------- TWI_RNCR : (TWI Offset: 0x114) Receive Next Counter Register -------- */ -#define TWI_RNCR_RXNCTR (0xffff << 0) /**< \brief (TWI_RNCR) Receive Next Counter */ -/* -------- TWI_TNPR : (TWI Offset: 0x118) Transmit Next Pointer Register -------- */ -#define TWI_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (TWI_TNPR) Transmit Next Pointer */ -/* -------- TWI_TNCR : (TWI Offset: 0x11C) Transmit Next Counter Register -------- */ -#define TWI_TNCR_TXNCTR (0xffff << 0) /**< \brief (TWI_TNCR) Transmit Counter Next */ -/* -------- TWI_PTCR : (TWI Offset: 0x120) Transfer Control Register -------- */ -#define TWI_PTCR_RXTEN (0x1 << 0) /**< \brief (TWI_PTCR) Receiver Transfer Enable */ -#define TWI_PTCR_RXTDIS (0x1 << 1) /**< \brief (TWI_PTCR) Receiver Transfer Disable */ -#define TWI_PTCR_TXTEN (0x1 << 8) /**< \brief (TWI_PTCR) Transmitter Transfer Enable */ -#define TWI_PTCR_TXTDIS (0x1 << 9) /**< \brief (TWI_PTCR) Transmitter Transfer Disable */ -/* -------- TWI_PTSR : (TWI Offset: 0x124) Transfer Status Register -------- */ -#define TWI_PTSR_RXTEN (0x1 << 0) /**< \brief (TWI_PTSR) Receiver Transfer Enable */ -#define TWI_PTSR_TXTEN (0x1 << 8) /**< \brief (TWI_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Universal Asynchronous Receiver Transmitter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_UART Universal Asynchronous Receiver Transmitter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Uart hardware registers */ -typedef struct { - WoReg UART_CR; /**< \brief (Uart Offset: 0x0000) Control Register */ - RwReg UART_MR; /**< \brief (Uart Offset: 0x0004) Mode Register */ - WoReg UART_IER; /**< \brief (Uart Offset: 0x0008) Interrupt Enable Register */ - WoReg UART_IDR; /**< \brief (Uart Offset: 0x000C) Interrupt Disable Register */ - RoReg UART_IMR; /**< \brief (Uart Offset: 0x0010) Interrupt Mask Register */ - RoReg UART_SR; /**< \brief (Uart Offset: 0x0014) Status Register */ - RoReg UART_RHR; /**< \brief (Uart Offset: 0x0018) Receive Holding Register */ - WoReg UART_THR; /**< \brief (Uart Offset: 0x001C) Transmit Holding Register */ - RwReg UART_BRGR; /**< \brief (Uart Offset: 0x0020) Baud Rate Generator Register */ - RwReg Reserved1[55]; - RwReg UART_RPR; /**< \brief (Uart Offset: 0x100) Receive Pointer Register */ - RwReg UART_RCR; /**< \brief (Uart Offset: 0x104) Receive Counter Register */ - RwReg UART_TPR; /**< \brief (Uart Offset: 0x108) Transmit Pointer Register */ - RwReg UART_TCR; /**< \brief (Uart Offset: 0x10C) Transmit Counter Register */ - RwReg UART_RNPR; /**< \brief (Uart Offset: 0x110) Receive Next Pointer Register */ - RwReg UART_RNCR; /**< \brief (Uart Offset: 0x114) Receive Next Counter Register */ - RwReg UART_TNPR; /**< \brief (Uart Offset: 0x118) Transmit Next Pointer Register */ - RwReg UART_TNCR; /**< \brief (Uart Offset: 0x11C) Transmit Next Counter Register */ - WoReg UART_PTCR; /**< \brief (Uart Offset: 0x120) Transfer Control Register */ - RoReg UART_PTSR; /**< \brief (Uart Offset: 0x124) Transfer Status Register */ -} Uart; -#endif /* __ASSEMBLY__ */ -/* -------- UART_CR : (UART Offset: 0x0000) Control Register -------- */ -#define UART_CR_RSTRX (0x1 << 2) /**< \brief (UART_CR) Reset Receiver */ -#define UART_CR_RSTTX (0x1 << 3) /**< \brief (UART_CR) Reset Transmitter */ -#define UART_CR_RXEN (0x1 << 4) /**< \brief (UART_CR) Receiver Enable */ -#define UART_CR_RXDIS (0x1 << 5) /**< \brief (UART_CR) Receiver Disable */ -#define UART_CR_TXEN (0x1 << 6) /**< \brief (UART_CR) Transmitter Enable */ -#define UART_CR_TXDIS (0x1 << 7) /**< \brief (UART_CR) Transmitter Disable */ -#define UART_CR_RSTSTA (0x1 << 8) /**< \brief (UART_CR) Reset Status Bits */ -/* -------- UART_MR : (UART Offset: 0x0004) Mode Register -------- */ -#define UART_MR_PAR (0x7 << 9) /**< \brief (UART_MR) Parity Type */ -#define UART_MR_CHMODE (0x3 << 14) /**< \brief (UART_MR) Channel Mode */ -/* -------- UART_IER : (UART Offset: 0x0008) Interrupt Enable Register -------- */ -#define UART_IER_RXRDY (0x1 << 0) /**< \brief (UART_IER) Enable RXRDY Interrupt */ -#define UART_IER_TXRDY (0x1 << 1) /**< \brief (UART_IER) Enable TXRDY Interrupt */ -#define UART_IER_ENDRX (0x1 << 3) /**< \brief (UART_IER) Enable End of Receive Transfer Interrupt */ -#define UART_IER_ENDTX (0x1 << 4) /**< \brief (UART_IER) Enable End of Transmit Interrupt */ -#define UART_IER_OVRE (0x1 << 5) /**< \brief (UART_IER) Enable Overrun Error Interrupt */ -#define UART_IER_FRAME (0x1 << 6) /**< \brief (UART_IER) Enable Framing Error Interrupt */ -#define UART_IER_PARE (0x1 << 7) /**< \brief (UART_IER) Enable Parity Error Interrupt */ -#define UART_IER_TXEMPTY (0x1 << 9) /**< \brief (UART_IER) Enable TXEMPTY Interrupt */ -#define UART_IER_TXBUFE (0x1 << 11) /**< \brief (UART_IER) Enable Buffer Empty Interrupt */ -#define UART_IER_RXBUFF (0x1 << 12) /**< \brief (UART_IER) Enable Buffer Full Interrupt */ -/* -------- UART_IDR : (UART Offset: 0x000C) Interrupt Disable Register -------- */ -#define UART_IDR_RXRDY (0x1 << 0) /**< \brief (UART_IDR) Disable RXRDY Interrupt */ -#define UART_IDR_TXRDY (0x1 << 1) /**< \brief (UART_IDR) Disable TXRDY Interrupt */ -#define UART_IDR_ENDRX (0x1 << 3) /**< \brief (UART_IDR) Disable End of Receive Transfer Interrupt */ -#define UART_IDR_ENDTX (0x1 << 4) /**< \brief (UART_IDR) Disable End of Transmit Interrupt */ -#define UART_IDR_OVRE (0x1 << 5) /**< \brief (UART_IDR) Disable Overrun Error Interrupt */ -#define UART_IDR_FRAME (0x1 << 6) /**< \brief (UART_IDR) Disable Framing Error Interrupt */ -#define UART_IDR_PARE (0x1 << 7) /**< \brief (UART_IDR) Disable Parity Error Interrupt */ -#define UART_IDR_TXEMPTY (0x1 << 9) /**< \brief (UART_IDR) Disable TXEMPTY Interrupt */ -#define UART_IDR_TXBUFE (0x1 << 11) /**< \brief (UART_IDR) Disable Buffer Empty Interrupt */ -#define UART_IDR_RXBUFF (0x1 << 12) /**< \brief (UART_IDR) Disable Buffer Full Interrupt */ -/* -------- UART_IMR : (UART Offset: 0x0010) Interrupt Mask Register -------- */ -#define UART_IMR_RXRDY (0x1 << 0) /**< \brief (UART_IMR) Mask RXRDY Interrupt */ -#define UART_IMR_TXRDY (0x1 << 1) /**< \brief (UART_IMR) Disable TXRDY Interrupt */ -#define UART_IMR_ENDRX (0x1 << 3) /**< \brief (UART_IMR) Mask End of Receive Transfer Interrupt */ -#define UART_IMR_ENDTX (0x1 << 4) /**< \brief (UART_IMR) Mask End of Transmit Interrupt */ -#define UART_IMR_OVRE (0x1 << 5) /**< \brief (UART_IMR) Mask Overrun Error Interrupt */ -#define UART_IMR_FRAME (0x1 << 6) /**< \brief (UART_IMR) Mask Framing Error Interrupt */ -#define UART_IMR_PARE (0x1 << 7) /**< \brief (UART_IMR) Mask Parity Error Interrupt */ -#define UART_IMR_TXEMPTY (0x1 << 9) /**< \brief (UART_IMR) Mask TXEMPTY Interrupt */ -#define UART_IMR_TXBUFE (0x1 << 11) /**< \brief (UART_IMR) Mask TXBUFE Interrupt */ -#define UART_IMR_RXBUFF (0x1 << 12) /**< \brief (UART_IMR) Mask RXBUFF Interrupt */ -/* -------- UART_SR : (UART Offset: 0x0014) Status Register -------- */ -#define UART_SR_RXRDY (0x1 << 0) /**< \brief (UART_SR) Receiver Ready */ -#define UART_SR_TXRDY (0x1 << 1) /**< \brief (UART_SR) Transmitter Ready */ -#define UART_SR_ENDRX (0x1 << 3) /**< \brief (UART_SR) End of Receiver Transfer */ -#define UART_SR_ENDTX (0x1 << 4) /**< \brief (UART_SR) End of Transmitter Transfer */ -#define UART_SR_OVRE (0x1 << 5) /**< \brief (UART_SR) Overrun Error */ -#define UART_SR_FRAME (0x1 << 6) /**< \brief (UART_SR) Framing Error */ -#define UART_SR_PARE (0x1 << 7) /**< \brief (UART_SR) Parity Error */ -#define UART_SR_TXEMPTY (0x1 << 9) /**< \brief (UART_SR) Transmitter Empty */ -#define UART_SR_TXBUFE (0x1 << 11) /**< \brief (UART_SR) Transmission Buffer Empty */ -#define UART_SR_RXBUFF (0x1 << 12) /**< \brief (UART_SR) Receive Buffer Full */ -/* -------- UART_RHR : (UART Offset: 0x0018) Receive Holding Register -------- */ -#define UART_RHR_RXCHR (0xff << 0) /**< \brief (UART_RHR) Received Character */ -/* -------- UART_THR : (UART Offset: 0x001C) Transmit Holding Register -------- */ -#define UART_THR_TXCHR (0xff << 0) /**< \brief (UART_THR) Character to be Transmitted */ -/* -------- UART_BRGR : (UART Offset: 0x0020) Baud Rate Generator Register -------- */ -#define UART_BRGR_CD (0xffff << 0) /**< \brief (UART_BRGR) Clock Divisor */ -/* -------- UART_RPR : (UART Offset: 0x100) Receive Pointer Register -------- */ -#define UART_RPR_RXPTR (0xffffffff << 0) /**< \brief (UART_RPR) Receive Pointer Register */ -/* -------- UART_RCR : (UART Offset: 0x104) Receive Counter Register -------- */ -#define UART_RCR_RXCTR (0xffff << 0) /**< \brief (UART_RCR) Receive Counter Register */ -/* -------- UART_TPR : (UART Offset: 0x108) Transmit Pointer Register -------- */ -#define UART_TPR_TXPTR (0xffffffff << 0) /**< \brief (UART_TPR) Transmit Counter Register */ -/* -------- UART_TCR : (UART Offset: 0x10C) Transmit Counter Register -------- */ -#define UART_TCR_TXCTR (0xffff << 0) /**< \brief (UART_TCR) Transmit Counter Register */ -/* -------- UART_RNPR : (UART Offset: 0x110) Receive Next Pointer Register -------- */ -#define UART_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (UART_RNPR) Receive Next Pointer */ -/* -------- UART_RNCR : (UART Offset: 0x114) Receive Next Counter Register -------- */ -#define UART_RNCR_RXNCTR (0xffff << 0) /**< \brief (UART_RNCR) Receive Next Counter */ -/* -------- UART_TNPR : (UART Offset: 0x118) Transmit Next Pointer Register -------- */ -#define UART_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (UART_TNPR) Transmit Next Pointer */ -/* -------- UART_TNCR : (UART Offset: 0x11C) Transmit Next Counter Register -------- */ -#define UART_TNCR_TXNCTR (0xffff << 0) /**< \brief (UART_TNCR) Transmit Counter Next */ -/* -------- UART_PTCR : (UART Offset: 0x120) Transfer Control Register -------- */ -#define UART_PTCR_RXTEN (0x1 << 0) /**< \brief (UART_PTCR) Receiver Transfer Enable */ -#define UART_PTCR_RXTDIS (0x1 << 1) /**< \brief (UART_PTCR) Receiver Transfer Disable */ -#define UART_PTCR_TXTEN (0x1 << 8) /**< \brief (UART_PTCR) Transmitter Transfer Enable */ -#define UART_PTCR_TXTDIS (0x1 << 9) /**< \brief (UART_PTCR) Transmitter Transfer Disable */ -/* -------- UART_PTSR : (UART Offset: 0x124) Transfer Status Register -------- */ -#define UART_PTSR_RXTEN (0x1 << 0) /**< \brief (UART_PTSR) Receiver Transfer Enable */ -#define UART_PTSR_TXTEN (0x1 << 8) /**< \brief (UART_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR USB High Speed Device Port */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_UDPHS USB High Speed Device Port */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief UdphsDma hardware registers */ -typedef struct { - RwReg UDPHS_DMANXTDSC; /**< \brief (UdphsDma Offset: 0x0) UDPHS DMA Next Descriptor Address Register */ - RwReg UDPHS_DMAADDRESS; /**< \brief (UdphsDma Offset: 0x4) UDPHS DMA Channel Address Register */ - RwReg UDPHS_DMACONTROL; /**< \brief (UdphsDma Offset: 0x8) UDPHS DMA Channel Control Register */ - RwReg UDPHS_DMASTATUS; /**< \brief (UdphsDma Offset: 0xC) UDPHS DMA Channel Status Register */ -} UdphsDma; -/** \brief UdphsEpt hardware registers */ -typedef struct { - RwReg UDPHS_EPTCFG; /**< \brief (UdphsEpt Offset: 0x0) UDPHS Endpoint Configuration Register */ - RwReg UDPHS_EPTCTLENB; /**< \brief (UdphsEpt Offset: 0x4) UDPHS Endpoint Control Enable Register */ - RwReg UDPHS_EPTCTLDIS; /**< \brief (UdphsEpt Offset: 0x8) UDPHS Endpoint Control Disable Register */ - RwReg UDPHS_EPTCTL; /**< \brief (UdphsEpt Offset: 0xC) UDPHS Endpoint Control Register */ - RwReg Reserved1[1]; - RwReg UDPHS_EPTSETSTA; /**< \brief (UdphsEpt Offset: 0x14) UDPHS Endpoint Set Status Register */ - RwReg UDPHS_EPTCLRSTA; /**< \brief (UdphsEpt Offset: 0x18) UDPHS Endpoint Clear Status Register */ - RwReg UDPHS_EPTSTA; /**< \brief (UdphsEpt Offset: 0x1C) UDPHS Endpoint Status Register */ -} UdphsEpt; -/** \brief Udphs hardware registers */ -typedef struct { - RwReg UDPHS_CTRL; /**< \brief (Udphs Offset: 0x00) UDPHS Control Register */ - RoReg UDPHS_FNUM; /**< \brief (Udphs Offset: 0x04) UDPHS Frame Number Register */ - RwReg Reserved1[2]; - RwReg UDPHS_IEN; /**< \brief (Udphs Offset: 0x10) UDPHS Interrupt Enable Register */ - RoReg UDPHS_INTSTA; /**< \brief (Udphs Offset: 0x14) UDPHS Interrupt Status Register */ - WoReg UDPHS_CLRINT; /**< \brief (Udphs Offset: 0x18) UDPHS Clear Interrupt Register */ - WoReg UDPHS_EPTRST; /**< \brief (Udphs Offset: 0x1C) UDPHS Endpoints Reset Register */ - RwReg Reserved2[48]; - RwReg UDPHS_TST; /**< \brief (Udphs Offset: 0xE0) UDPHS Test Register */ - RwReg Reserved3[3]; - RoReg UDPHS_IPNAME1; /**< \brief (Udphs Offset: 0xF0) UDPHS Name1 Register */ - RoReg UDPHS_IPNAME2; /**< \brief (Udphs Offset: 0xF4) UDPHS Name2 Register */ - RoReg UDPHS_IPFEATURES; /**< \brief (Udphs Offset: 0xF8) UDPHS Features Register */ - RwReg Reserved4[1]; - UdphsEpt UDPHS_EPT[7]; /**< \brief (Udphs Offset: 0x100) endpoint = 0 .. 6 */ - RwReg Reserved5[80]; - UdphsDma UDPHS_DMA[5]; /**< \brief (Udphs Offset: 0x320) channel = 1 .. 5 */ -} Udphs; -#endif /* __ASSEMBLY__ */ -/* -------- UDPHS_CTRL : (UDPHS Offset: 0x00) UDPHS Control Register -------- */ -#define UDPHS_CTRL_DEV_ADDR (0x7f << 0) /**< \brief (UDPHS_CTRL) UDPHS Address */ -#define UDPHS_CTRL_FADDR_EN (0x1 << 7) /**< \brief (UDPHS_CTRL) Function Address Enable */ -#define UDPHS_CTRL_EN_UDPHS (0x1 << 8) /**< \brief (UDPHS_CTRL) UDPHS Enable */ -#define UDPHS_CTRL_DETACH (0x1 << 9) /**< \brief (UDPHS_CTRL) Detach Command */ -#define UDPHS_CTRL_REWAKEUP (0x1 << 10) /**< \brief (UDPHS_CTRL) Send Remote Wake Up */ -#define UDPHS_CTRL_PULLD_DIS (0x1 << 11) /**< \brief (UDPHS_CTRL) Pull-Down Disable */ -/* -------- UDPHS_FNUM : (UDPHS Offset: 0x04) UDPHS Frame Number Register -------- */ -#define UDPHS_FNUM_MICRO_FRAME_NUM (0x7 << 0) /**< \brief (UDPHS_FNUM) Microframe Number */ -#define UDPHS_FNUM_FRAME_NUMBER (0x7ff << 3) /**< \brief (UDPHS_FNUM) Frame Number as defined in the Packet Field Formats */ -#define UDPHS_FNUM_FNUM_ERR (0x1 << 31) /**< \brief (UDPHS_FNUM) Frame Number CRC Error */ -/* -------- UDPHS_IEN : (UDPHS Offset: 0x10) UDPHS Interrupt Enable Register -------- */ -#define UDPHS_IEN_DET_SUSPD (0x1 << 1) /**< \brief (UDPHS_IEN) Suspend Interrupt Enable */ -#define UDPHS_IEN_MICRO_SOF (0x1 << 2) /**< \brief (UDPHS_IEN) Micro-SOF Interrupt Enable */ -#define UDPHS_IEN_INT_SOF (0x1 << 3) /**< \brief (UDPHS_IEN) SOF Interrupt Enable */ -#define UDPHS_IEN_ENDRESET (0x1 << 4) /**< \brief (UDPHS_IEN) End Of Reset Interrupt Enable */ -#define UDPHS_IEN_WAKE_UP (0x1 << 5) /**< \brief (UDPHS_IEN) Wake Up CPU Interrupt Enable */ -#define UDPHS_IEN_ENDOFRSM (0x1 << 6) /**< \brief (UDPHS_IEN) End Of Resume Interrupt Enable */ -#define UDPHS_IEN_UPSTR_RES (0x1 << 7) /**< \brief (UDPHS_IEN) Upstream Resume Interrupt Enable */ -#define UDPHS_IEN_EPT_0 (0x1 << 8) /**< \brief (UDPHS_IEN) Endpoint 0 Interrupt Enable */ -#define UDPHS_IEN_EPT_1 (0x1 << 9) /**< \brief (UDPHS_IEN) Endpoint 1 Interrupt Enable */ -#define UDPHS_IEN_EPT_2 (0x1 << 10) /**< \brief (UDPHS_IEN) Endpoint 2 Interrupt Enable */ -#define UDPHS_IEN_EPT_3 (0x1 << 11) /**< \brief (UDPHS_IEN) Endpoint 3 Interrupt Enable */ -#define UDPHS_IEN_EPT_4 (0x1 << 12) /**< \brief (UDPHS_IEN) Endpoint 4 Interrupt Enable */ -#define UDPHS_IEN_EPT_5 (0x1 << 13) /**< \brief (UDPHS_IEN) Endpoint 5 Interrupt Enable */ -#define UDPHS_IEN_EPT_6 (0x1 << 14) /**< \brief (UDPHS_IEN) Endpoint 6 Interrupt Enable */ -#define UDPHS_IEN_DMA_1 (0x1 << 25) /**< \brief (UDPHS_IEN) DMA Channel 1 Interrupt Enable */ -#define UDPHS_IEN_DMA_2 (0x1 << 26) /**< \brief (UDPHS_IEN) DMA Channel 2 Interrupt Enable */ -#define UDPHS_IEN_DMA_3 (0x1 << 27) /**< \brief (UDPHS_IEN) DMA Channel 3 Interrupt Enable */ -#define UDPHS_IEN_DMA_4 (0x1 << 28) /**< \brief (UDPHS_IEN) DMA Channel 4 Interrupt Enable */ -#define UDPHS_IEN_DMA_5 (0x1 << 29) /**< \brief (UDPHS_IEN) DMA Channel 5 Interrupt Enable */ -#define UDPHS_IEN_DMA_6 (0x1 << 30) /**< \brief (UDPHS_IEN) DMA Channel 6 Interrupt Enable */ -/* -------- UDPHS_INTSTA : (UDPHS Offset: 0x14) UDPHS Interrupt Status Register -------- */ -#define UDPHS_INTSTA_SPEED (0x1 << 0) /**< \brief (UDPHS_INTSTA) Speed Status */ -#define UDPHS_INTSTA_DET_SUSPD (0x1 << 1) /**< \brief (UDPHS_INTSTA) Suspend Interrupt */ -#define UDPHS_INTSTA_MICRO_SOF (0x1 << 2) /**< \brief (UDPHS_INTSTA) Micro Start Of Frame Interrupt */ -#define UDPHS_INTSTA_INT_SOF (0x1 << 3) /**< \brief (UDPHS_INTSTA) Start Of Frame Interrupt */ -#define UDPHS_INTSTA_ENDRESET (0x1 << 4) /**< \brief (UDPHS_INTSTA) End Of Reset Interrupt */ -#define UDPHS_INTSTA_WAKE_UP (0x1 << 5) /**< \brief (UDPHS_INTSTA) Wake Up CPU Interrupt */ -#define UDPHS_INTSTA_ENDOFRSM (0x1 << 6) /**< \brief (UDPHS_INTSTA) End Of Resume Interrupt */ -#define UDPHS_INTSTA_UPSTR_RES (0x1 << 7) /**< \brief (UDPHS_INTSTA) Upstream Resume Interrupt */ -#define UDPHS_INTSTA_EPT_0 (0x1 << 8) /**< \brief (UDPHS_INTSTA) Endpoint 0 Interrupt */ -#define UDPHS_INTSTA_EPT_1 (0x1 << 9) /**< \brief (UDPHS_INTSTA) Endpoint 1 Interrupt */ -#define UDPHS_INTSTA_EPT_2 (0x1 << 10) /**< \brief (UDPHS_INTSTA) Endpoint 2 Interrupt */ -#define UDPHS_INTSTA_EPT_3 (0x1 << 11) /**< \brief (UDPHS_INTSTA) Endpoint 3 Interrupt */ -#define UDPHS_INTSTA_EPT_4 (0x1 << 12) /**< \brief (UDPHS_INTSTA) Endpoint 4 Interrupt */ -#define UDPHS_INTSTA_EPT_5 (0x1 << 13) /**< \brief (UDPHS_INTSTA) Endpoint 5 Interrupt */ -#define UDPHS_INTSTA_EPT_6 (0x1 << 14) /**< \brief (UDPHS_INTSTA) Endpoint 6 Interrupt */ -#define UDPHS_INTSTA_DMA_1 (0x1 << 25) /**< \brief (UDPHS_INTSTA) DMA Channel 1 Interrupt */ -#define UDPHS_INTSTA_DMA_2 (0x1 << 26) /**< \brief (UDPHS_INTSTA) DMA Channel 2 Interrupt */ -#define UDPHS_INTSTA_DMA_3 (0x1 << 27) /**< \brief (UDPHS_INTSTA) DMA Channel 3 Interrupt */ -#define UDPHS_INTSTA_DMA_4 (0x1 << 28) /**< \brief (UDPHS_INTSTA) DMA Channel 4 Interrupt */ -#define UDPHS_INTSTA_DMA_5 (0x1 << 29) /**< \brief (UDPHS_INTSTA) DMA Channel 5 Interrupt */ -#define UDPHS_INTSTA_DMA_6 (0x1 << 30) /**< \brief (UDPHS_INTSTA) DMA Channel 6 Interrupt */ -/* -------- UDPHS_CLRINT : (UDPHS Offset: 0x18) UDPHS Clear Interrupt Register -------- */ -#define UDPHS_CLRINT_DET_SUSPD (0x1 << 1) /**< \brief (UDPHS_CLRINT) Suspend Interrupt Clear */ -#define UDPHS_CLRINT_MICRO_SOF (0x1 << 2) /**< \brief (UDPHS_CLRINT) Micro Start Of Frame Interrupt Clear */ -#define UDPHS_CLRINT_INT_SOF (0x1 << 3) /**< \brief (UDPHS_CLRINT) Start Of Frame Interrupt Clear */ -#define UDPHS_CLRINT_ENDRESET (0x1 << 4) /**< \brief (UDPHS_CLRINT) End Of Reset Interrupt Clear */ -#define UDPHS_CLRINT_WAKE_UP (0x1 << 5) /**< \brief (UDPHS_CLRINT) Wake Up CPU Interrupt Clear */ -#define UDPHS_CLRINT_ENDOFRSM (0x1 << 6) /**< \brief (UDPHS_CLRINT) End Of Resume Interrupt Clear */ -#define UDPHS_CLRINT_UPSTR_RES (0x1 << 7) /**< \brief (UDPHS_CLRINT) Upstream Resume Interrupt Clear */ -/* -------- UDPHS_EPTRST : (UDPHS Offset: 0x1C) UDPHS Endpoints Reset Register -------- */ -#define UDPHS_EPTRST_EPT_0 (0x1 << 0) /**< \brief (UDPHS_EPTRST) Endpoint 0 Reset */ -#define UDPHS_EPTRST_EPT_1 (0x1 << 1) /**< \brief (UDPHS_EPTRST) Endpoint 1 Reset */ -#define UDPHS_EPTRST_EPT_2 (0x1 << 2) /**< \brief (UDPHS_EPTRST) Endpoint 2 Reset */ -#define UDPHS_EPTRST_EPT_3 (0x1 << 3) /**< \brief (UDPHS_EPTRST) Endpoint 3 Reset */ -#define UDPHS_EPTRST_EPT_4 (0x1 << 4) /**< \brief (UDPHS_EPTRST) Endpoint 4 Reset */ -#define UDPHS_EPTRST_EPT_5 (0x1 << 5) /**< \brief (UDPHS_EPTRST) Endpoint 5 Reset */ -#define UDPHS_EPTRST_EPT_6 (0x1 << 6) /**< \brief (UDPHS_EPTRST) Endpoint 6 Reset */ -/* -------- UDPHS_TST : (UDPHS Offset: 0xE0) UDPHS Test Register -------- */ -#define UDPHS_TST_SPEED_CFG (0x3 << 0) /**< \brief (UDPHS_TST) Speed Configuration */ -#define UDPHS_TST_TST_J (0x1 << 2) /**< \brief (UDPHS_TST) Test J Mode */ -#define UDPHS_TST_TST_K (0x1 << 3) /**< \brief (UDPHS_TST) Test K Mode */ -#define UDPHS_TST_TST_PKT (0x1 << 4) /**< \brief (UDPHS_TST) Test Packet Mode */ -#define UDPHS_TST_OPMODE2 (0x1 << 5) /**< \brief (UDPHS_TST) OpMode2 */ -/* -------- UDPHS_IPNAME1 : (UDPHS Offset: 0xF0) UDPHS Name1 Register -------- */ -#define UDPHS_IPNAME1_IP_NAME1 (0xffffffff << 0) /**< \brief (UDPHS_IPNAME1) */ -/* -------- UDPHS_IPNAME2 : (UDPHS Offset: 0xF4) UDPHS Name2 Register -------- */ -#define UDPHS_IPNAME2_IP_NAME2 (0xffffffff << 0) /**< \brief (UDPHS_IPNAME2) */ -/* -------- UDPHS_IPFEATURES : (UDPHS Offset: 0xF8) UDPHS Features Register -------- */ -#define UDPHS_IPFEATURES_EPT_NBR_MAX (0xf << 0) /**< \brief (UDPHS_IPFEATURES) Max Number of Endpoints */ -#define UDPHS_IPFEATURES_DMA_CHANNEL_NBR (0x7 << 4) /**< \brief (UDPHS_IPFEATURES) Number of DMA Channels */ -#define UDPHS_IPFEATURES_DMA_B_SIZ (0x1 << 7) /**< \brief (UDPHS_IPFEATURES) DMA Buffer Size */ -#define UDPHS_IPFEATURES_DMA_FIFO_WORD_DEPTH (0xf << 8) /**< \brief (UDPHS_IPFEATURES) DMA FIFO Depth in Words */ -#define UDPHS_IPFEATURES_FIFO_MAX_SIZE (0x7 << 12) /**< \brief (UDPHS_IPFEATURES) DPRAM Size */ -#define UDPHS_IPFEATURES_BW_DPRAM (0x1 << 15) /**< \brief (UDPHS_IPFEATURES) DPRAM Byte Write Capability */ -#define UDPHS_IPFEATURES_DATAB16_8 (0x1 << 16) /**< \brief (UDPHS_IPFEATURES) UTMI DataBus16_8 */ -#define UDPHS_IPFEATURES_ISO_EPT_1 (0x1 << 17) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_2 (0x1 << 18) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_3 (0x1 << 19) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_4 (0x1 << 20) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_5 (0x1 << 21) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_6 (0x1 << 22) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_7 (0x1 << 23) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_8 (0x1 << 24) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_9 (0x1 << 25) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_10 (0x1 << 26) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_11 (0x1 << 27) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_12 (0x1 << 28) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_13 (0x1 << 29) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_14 (0x1 << 30) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -#define UDPHS_IPFEATURES_ISO_EPT_15 (0x1 << 31) /**< \brief (UDPHS_IPFEATURES) Endpointx High Bandwidth Isochronous Capability */ -/* -------- UDPHS_EPTCFG0 : (UDPHS Offset: 0x100) UDPHS Endpoint Configuration Register (endpoint = 0) -------- */ -#define UDPHS_EPTCFG0_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG0) Endpoint Size */ -#define UDPHS_EPTCFG0_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG0) 8 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG0) 16 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG0) 32 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG0) 64 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG0) 128 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG0) 256 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG0) 512 bytes */ -#define UDPHS_EPTCFG0_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG0) 1024 bytes */ -#define UDPHS_EPTCFG0_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG0) Endpoint Direction */ -#define UDPHS_EPTCFG0_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG0) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG0_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG0) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG0_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG0) Endpoint Type */ -#define UDPHS_EPTCFG0_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG0) Control endpoint */ -#define UDPHS_EPTCFG0_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG0) Isochronous endpoint */ -#define UDPHS_EPTCFG0_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG0) Bulk endpoint */ -#define UDPHS_EPTCFG0_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG0) Interrupt endpoint */ -#define UDPHS_EPTCFG0_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG0) Number of Banks */ -#define UDPHS_EPTCFG0_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG0) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG0_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG0) One bank (bank 0) */ -#define UDPHS_EPTCFG0_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG0) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG0_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG0) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG0_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG0) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG0_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG0) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB0 : (UDPHS Offset: 0x104) UDPHS Endpoint Control Enable Register (endpoint = 0) -------- */ -#define UDPHS_EPTCTLENB0_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB0) Endpoint Enable */ -#define UDPHS_EPTCTLENB0_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB0) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB0_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB0) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB0_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB0) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB0_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB0) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB0_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB0) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB0_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB0) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB0_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB0) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB0_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB0) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB0_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB0) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB0_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB0) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB0_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB0) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB0_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB0) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB0_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB0) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB0_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB0) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB0_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB0) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS0 : (UDPHS Offset: 0x108) UDPHS Endpoint Control Disable Register (endpoint = 0) -------- */ -#define UDPHS_EPTCTLDIS0_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS0) Endpoint Disable */ -#define UDPHS_EPTCTLDIS0_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS0) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS0_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS0) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS0_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS0) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS0_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS0) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS0_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS0) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS0_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS0) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS0) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS0) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS0) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS0) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS0) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS0) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS0) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS0) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS0_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS0) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL0 : (UDPHS Offset: 0x10C) UDPHS Endpoint Control Register (endpoint = 0) -------- */ -#define UDPHS_EPTCTL0_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL0) Endpoint Enable */ -#define UDPHS_EPTCTL0_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL0) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL0_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL0) Interrupt Disables DMA */ -#define UDPHS_EPTCTL0_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL0) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL0_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL0) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL0_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL0) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL0_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL0) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL0_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL0) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL0_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL0) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL0_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL0) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL0_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL0) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL0_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL0) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL0_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL0) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL0_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL0) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL0_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL0) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL0_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL0) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA0 : (UDPHS Offset: 0x114) UDPHS Endpoint Set Status Register (endpoint = 0) -------- */ -#define UDPHS_EPTSETSTA0_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA0) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA0_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA0) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA0_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA0) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA0 : (UDPHS Offset: 0x118) UDPHS Endpoint Clear Status Register (endpoint = 0) -------- */ -#define UDPHS_EPTCLRSTA0_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA0) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA0_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA0) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA0_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA0) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA0_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA0) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA0_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA0) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA0_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA0) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA0_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA0) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA0_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA0) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA0 : (UDPHS Offset: 0x11C) UDPHS Endpoint Status Register (endpoint = 0) -------- */ -#define UDPHS_EPTSTA0_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA0) Stall Handshake Request */ -#define UDPHS_EPTSTA0_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA0) Toggle Sequencing */ -#define UDPHS_EPTSTA0_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA0) Overflow Error */ -#define UDPHS_EPTSTA0_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA0) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA0_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA0) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA0_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA0) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA0_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA0) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA0_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA0) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA0_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA0) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA0_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA0) NAK OUT */ -#define UDPHS_EPTSTA0_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA0) Current Bank/Control Direction */ -#define UDPHS_EPTSTA0_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA0) Busy Bank Number */ -#define UDPHS_EPTSTA0_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA0) UDPHS Byte Count */ -#define UDPHS_EPTSTA0_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA0) Short Packet */ -/* -------- UDPHS_EPTCFG1 : (UDPHS Offset: 0x120) UDPHS Endpoint Configuration Register (endpoint = 1) -------- */ -#define UDPHS_EPTCFG1_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG1) Endpoint Size */ -#define UDPHS_EPTCFG1_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG1) 8 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG1) 16 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG1) 32 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG1) 64 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG1) 128 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG1) 256 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG1) 512 bytes */ -#define UDPHS_EPTCFG1_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG1) 1024 bytes */ -#define UDPHS_EPTCFG1_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG1) Endpoint Direction */ -#define UDPHS_EPTCFG1_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG1) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG1_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG1) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG1_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG1) Endpoint Type */ -#define UDPHS_EPTCFG1_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG1) Control endpoint */ -#define UDPHS_EPTCFG1_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG1) Isochronous endpoint */ -#define UDPHS_EPTCFG1_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG1) Bulk endpoint */ -#define UDPHS_EPTCFG1_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG1) Interrupt endpoint */ -#define UDPHS_EPTCFG1_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG1) Number of Banks */ -#define UDPHS_EPTCFG1_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG1) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG1_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG1) One bank (bank 0) */ -#define UDPHS_EPTCFG1_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG1) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG1_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG1) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG1_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG1) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG1_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG1) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB1 : (UDPHS Offset: 0x124) UDPHS Endpoint Control Enable Register (endpoint = 1) -------- */ -#define UDPHS_EPTCTLENB1_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB1) Endpoint Enable */ -#define UDPHS_EPTCTLENB1_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB1) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB1_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB1) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB1_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB1) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB1_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB1) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB1_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB1) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB1_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB1) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB1_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB1) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB1_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB1) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB1_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB1) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB1_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB1) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB1_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB1) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB1_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB1) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB1_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB1) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB1_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB1) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB1_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB1) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS1 : (UDPHS Offset: 0x128) UDPHS Endpoint Control Disable Register (endpoint = 1) -------- */ -#define UDPHS_EPTCTLDIS1_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS1) Endpoint Disable */ -#define UDPHS_EPTCTLDIS1_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS1) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS1_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS1) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS1_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS1) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS1_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS1) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS1_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS1) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS1_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS1) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS1) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS1) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS1) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS1) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS1) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS1) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS1) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS1) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS1_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS1) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL1 : (UDPHS Offset: 0x12C) UDPHS Endpoint Control Register (endpoint = 1) -------- */ -#define UDPHS_EPTCTL1_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL1) Endpoint Enable */ -#define UDPHS_EPTCTL1_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL1) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL1_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL1) Interrupt Disables DMA */ -#define UDPHS_EPTCTL1_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL1) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL1_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL1) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL1_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL1) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL1_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL1) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL1_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL1) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL1_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL1) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL1_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL1) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL1_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL1) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL1_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL1) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL1_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL1) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL1_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL1) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL1_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL1) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL1_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL1) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA1 : (UDPHS Offset: 0x134) UDPHS Endpoint Set Status Register (endpoint = 1) -------- */ -#define UDPHS_EPTSETSTA1_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA1) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA1_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA1) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA1_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA1) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA1 : (UDPHS Offset: 0x138) UDPHS Endpoint Clear Status Register (endpoint = 1) -------- */ -#define UDPHS_EPTCLRSTA1_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA1) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA1_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA1) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA1_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA1) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA1_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA1) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA1_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA1) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA1_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA1) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA1_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA1) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA1_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA1) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA1 : (UDPHS Offset: 0x13C) UDPHS Endpoint Status Register (endpoint = 1) -------- */ -#define UDPHS_EPTSTA1_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA1) Stall Handshake Request */ -#define UDPHS_EPTSTA1_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA1) Toggle Sequencing */ -#define UDPHS_EPTSTA1_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA1) Overflow Error */ -#define UDPHS_EPTSTA1_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA1) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA1_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA1) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA1_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA1) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA1_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA1) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA1_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA1) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA1_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA1) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA1_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA1) NAK OUT */ -#define UDPHS_EPTSTA1_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA1) Current Bank/Control Direction */ -#define UDPHS_EPTSTA1_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA1) Busy Bank Number */ -#define UDPHS_EPTSTA1_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA1) UDPHS Byte Count */ -#define UDPHS_EPTSTA1_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA1) Short Packet */ -/* -------- UDPHS_EPTCFG2 : (UDPHS Offset: 0x140) UDPHS Endpoint Configuration Register (endpoint = 2) -------- */ -#define UDPHS_EPTCFG2_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG2) Endpoint Size */ -#define UDPHS_EPTCFG2_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG2) 8 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG2) 16 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG2) 32 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG2) 64 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG2) 128 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG2) 256 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG2) 512 bytes */ -#define UDPHS_EPTCFG2_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG2) 1024 bytes */ -#define UDPHS_EPTCFG2_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG2) Endpoint Direction */ -#define UDPHS_EPTCFG2_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG2) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG2_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG2) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG2_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG2) Endpoint Type */ -#define UDPHS_EPTCFG2_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG2) Control endpoint */ -#define UDPHS_EPTCFG2_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG2) Isochronous endpoint */ -#define UDPHS_EPTCFG2_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG2) Bulk endpoint */ -#define UDPHS_EPTCFG2_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG2) Interrupt endpoint */ -#define UDPHS_EPTCFG2_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG2) Number of Banks */ -#define UDPHS_EPTCFG2_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG2) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG2_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG2) One bank (bank 0) */ -#define UDPHS_EPTCFG2_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG2) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG2_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG2) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG2_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG2) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG2_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG2) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB2 : (UDPHS Offset: 0x144) UDPHS Endpoint Control Enable Register (endpoint = 2) -------- */ -#define UDPHS_EPTCTLENB2_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB2) Endpoint Enable */ -#define UDPHS_EPTCTLENB2_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB2) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB2_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB2) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB2_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB2) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB2_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB2) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB2_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB2) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB2_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB2) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB2_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB2) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB2_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB2) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB2_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB2) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB2_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB2) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB2_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB2) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB2_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB2) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB2_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB2) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB2_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB2) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB2_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB2) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS2 : (UDPHS Offset: 0x148) UDPHS Endpoint Control Disable Register (endpoint = 2) -------- */ -#define UDPHS_EPTCTLDIS2_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS2) Endpoint Disable */ -#define UDPHS_EPTCTLDIS2_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS2) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS2_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS2) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS2_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS2) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS2_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS2) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS2_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS2) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS2_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS2) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS2) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS2) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS2) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS2) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS2) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS2) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS2) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS2) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS2_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS2) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL2 : (UDPHS Offset: 0x14C) UDPHS Endpoint Control Register (endpoint = 2) -------- */ -#define UDPHS_EPTCTL2_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL2) Endpoint Enable */ -#define UDPHS_EPTCTL2_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL2) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL2_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL2) Interrupt Disables DMA */ -#define UDPHS_EPTCTL2_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL2) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL2_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL2) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL2_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL2) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL2_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL2) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL2_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL2) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL2_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL2) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL2_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL2) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL2_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL2) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL2_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL2) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL2_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL2) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL2_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL2) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL2_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL2) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL2_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL2) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA2 : (UDPHS Offset: 0x154) UDPHS Endpoint Set Status Register (endpoint = 2) -------- */ -#define UDPHS_EPTSETSTA2_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA2) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA2_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA2) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA2_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA2) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA2 : (UDPHS Offset: 0x158) UDPHS Endpoint Clear Status Register (endpoint = 2) -------- */ -#define UDPHS_EPTCLRSTA2_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA2) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA2_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA2) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA2_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA2) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA2_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA2) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA2_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA2) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA2_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA2) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA2_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA2) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA2_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA2) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA2 : (UDPHS Offset: 0x15C) UDPHS Endpoint Status Register (endpoint = 2) -------- */ -#define UDPHS_EPTSTA2_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA2) Stall Handshake Request */ -#define UDPHS_EPTSTA2_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA2) Toggle Sequencing */ -#define UDPHS_EPTSTA2_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA2) Overflow Error */ -#define UDPHS_EPTSTA2_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA2) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA2_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA2) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA2_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA2) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA2_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA2) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA2_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA2) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA2_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA2) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA2_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA2) NAK OUT */ -#define UDPHS_EPTSTA2_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA2) Current Bank/Control Direction */ -#define UDPHS_EPTSTA2_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA2) Busy Bank Number */ -#define UDPHS_EPTSTA2_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA2) UDPHS Byte Count */ -#define UDPHS_EPTSTA2_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA2) Short Packet */ -/* -------- UDPHS_EPTCFG3 : (UDPHS Offset: 0x160) UDPHS Endpoint Configuration Register (endpoint = 3) -------- */ -#define UDPHS_EPTCFG3_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG3) Endpoint Size */ -#define UDPHS_EPTCFG3_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG3) 8 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG3) 16 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG3) 32 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG3) 64 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG3) 128 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG3) 256 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG3) 512 bytes */ -#define UDPHS_EPTCFG3_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG3) 1024 bytes */ -#define UDPHS_EPTCFG3_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG3) Endpoint Direction */ -#define UDPHS_EPTCFG3_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG3) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG3_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG3) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG3_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG3) Endpoint Type */ -#define UDPHS_EPTCFG3_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG3) Control endpoint */ -#define UDPHS_EPTCFG3_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG3) Isochronous endpoint */ -#define UDPHS_EPTCFG3_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG3) Bulk endpoint */ -#define UDPHS_EPTCFG3_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG3) Interrupt endpoint */ -#define UDPHS_EPTCFG3_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG3) Number of Banks */ -#define UDPHS_EPTCFG3_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG3) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG3_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG3) One bank (bank 0) */ -#define UDPHS_EPTCFG3_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG3) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG3_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG3) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG3_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG3) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG3_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG3) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB3 : (UDPHS Offset: 0x164) UDPHS Endpoint Control Enable Register (endpoint = 3) -------- */ -#define UDPHS_EPTCTLENB3_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB3) Endpoint Enable */ -#define UDPHS_EPTCTLENB3_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB3) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB3_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB3) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB3_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB3) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB3_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB3) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB3_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB3) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB3_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB3) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB3_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB3) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB3_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB3) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB3_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB3) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB3_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB3) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB3_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB3) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB3_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB3) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB3_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB3) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB3_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB3) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB3_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB3) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS3 : (UDPHS Offset: 0x168) UDPHS Endpoint Control Disable Register (endpoint = 3) -------- */ -#define UDPHS_EPTCTLDIS3_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS3) Endpoint Disable */ -#define UDPHS_EPTCTLDIS3_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS3) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS3_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS3) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS3_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS3) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS3_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS3) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS3_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS3) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS3_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS3) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS3) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS3) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS3) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS3) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS3) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS3) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS3) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS3) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS3_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS3) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL3 : (UDPHS Offset: 0x16C) UDPHS Endpoint Control Register (endpoint = 3) -------- */ -#define UDPHS_EPTCTL3_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL3) Endpoint Enable */ -#define UDPHS_EPTCTL3_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL3) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL3_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL3) Interrupt Disables DMA */ -#define UDPHS_EPTCTL3_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL3) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL3_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL3) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL3_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL3) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL3_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL3) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL3_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL3) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL3_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL3) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL3_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL3) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL3_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL3) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL3_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL3) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL3_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL3) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL3_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL3) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL3_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL3) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL3_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL3) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA3 : (UDPHS Offset: 0x174) UDPHS Endpoint Set Status Register (endpoint = 3) -------- */ -#define UDPHS_EPTSETSTA3_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA3) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA3_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA3) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA3_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA3) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA3 : (UDPHS Offset: 0x178) UDPHS Endpoint Clear Status Register (endpoint = 3) -------- */ -#define UDPHS_EPTCLRSTA3_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA3) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA3_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA3) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA3_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA3) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA3_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA3) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA3_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA3) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA3_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA3) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA3_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA3) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA3_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA3) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA3 : (UDPHS Offset: 0x17C) UDPHS Endpoint Status Register (endpoint = 3) -------- */ -#define UDPHS_EPTSTA3_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA3) Stall Handshake Request */ -#define UDPHS_EPTSTA3_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA3) Toggle Sequencing */ -#define UDPHS_EPTSTA3_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA3) Overflow Error */ -#define UDPHS_EPTSTA3_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA3) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA3_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA3) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA3_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA3) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA3_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA3) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA3_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA3) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA3_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA3) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA3_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA3) NAK OUT */ -#define UDPHS_EPTSTA3_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA3) Current Bank/Control Direction */ -#define UDPHS_EPTSTA3_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA3) Busy Bank Number */ -#define UDPHS_EPTSTA3_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA3) UDPHS Byte Count */ -#define UDPHS_EPTSTA3_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA3) Short Packet */ -/* -------- UDPHS_EPTCFG4 : (UDPHS Offset: 0x180) UDPHS Endpoint Configuration Register (endpoint = 4) -------- */ -#define UDPHS_EPTCFG4_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG4) Endpoint Size */ -#define UDPHS_EPTCFG4_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG4) 8 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG4) 16 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG4) 32 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG4) 64 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG4) 128 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG4) 256 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG4) 512 bytes */ -#define UDPHS_EPTCFG4_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG4) 1024 bytes */ -#define UDPHS_EPTCFG4_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG4) Endpoint Direction */ -#define UDPHS_EPTCFG4_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG4) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG4_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG4) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG4_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG4) Endpoint Type */ -#define UDPHS_EPTCFG4_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG4) Control endpoint */ -#define UDPHS_EPTCFG4_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG4) Isochronous endpoint */ -#define UDPHS_EPTCFG4_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG4) Bulk endpoint */ -#define UDPHS_EPTCFG4_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG4) Interrupt endpoint */ -#define UDPHS_EPTCFG4_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG4) Number of Banks */ -#define UDPHS_EPTCFG4_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG4) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG4_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG4) One bank (bank 0) */ -#define UDPHS_EPTCFG4_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG4) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG4_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG4) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG4_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG4) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG4_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG4) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB4 : (UDPHS Offset: 0x184) UDPHS Endpoint Control Enable Register (endpoint = 4) -------- */ -#define UDPHS_EPTCTLENB4_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB4) Endpoint Enable */ -#define UDPHS_EPTCTLENB4_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB4) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB4_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB4) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB4_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB4) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB4_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB4) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB4_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB4) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB4_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB4) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB4_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB4) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB4_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB4) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB4_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB4) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB4_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB4) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB4_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB4) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB4_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB4) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB4_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB4) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB4_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB4) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB4_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB4) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS4 : (UDPHS Offset: 0x188) UDPHS Endpoint Control Disable Register (endpoint = 4) -------- */ -#define UDPHS_EPTCTLDIS4_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS4) Endpoint Disable */ -#define UDPHS_EPTCTLDIS4_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS4) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS4_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS4) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS4_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS4) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS4_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS4) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS4_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS4) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS4_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS4) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS4) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS4) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS4) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS4) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS4) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS4) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS4) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS4) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS4_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS4) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL4 : (UDPHS Offset: 0x18C) UDPHS Endpoint Control Register (endpoint = 4) -------- */ -#define UDPHS_EPTCTL4_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL4) Endpoint Enable */ -#define UDPHS_EPTCTL4_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL4) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL4_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL4) Interrupt Disables DMA */ -#define UDPHS_EPTCTL4_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL4) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL4_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL4) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL4_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL4) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL4_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL4) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL4_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL4) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL4_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL4) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL4_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL4) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL4_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL4) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL4_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL4) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL4_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL4) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL4_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL4) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL4_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL4) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL4_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL4) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA4 : (UDPHS Offset: 0x194) UDPHS Endpoint Set Status Register (endpoint = 4) -------- */ -#define UDPHS_EPTSETSTA4_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA4) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA4_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA4) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA4_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA4) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA4 : (UDPHS Offset: 0x198) UDPHS Endpoint Clear Status Register (endpoint = 4) -------- */ -#define UDPHS_EPTCLRSTA4_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA4) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA4_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA4) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA4_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA4) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA4_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA4) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA4_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA4) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA4_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA4) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA4_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA4) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA4_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA4) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA4 : (UDPHS Offset: 0x19C) UDPHS Endpoint Status Register (endpoint = 4) -------- */ -#define UDPHS_EPTSTA4_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA4) Stall Handshake Request */ -#define UDPHS_EPTSTA4_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA4) Toggle Sequencing */ -#define UDPHS_EPTSTA4_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA4) Overflow Error */ -#define UDPHS_EPTSTA4_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA4) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA4_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA4) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA4_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA4) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA4_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA4) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA4_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA4) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA4_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA4) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA4_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA4) NAK OUT */ -#define UDPHS_EPTSTA4_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA4) Current Bank/Control Direction */ -#define UDPHS_EPTSTA4_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA4) Busy Bank Number */ -#define UDPHS_EPTSTA4_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA4) UDPHS Byte Count */ -#define UDPHS_EPTSTA4_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA4) Short Packet */ -/* -------- UDPHS_EPTCFG5 : (UDPHS Offset: 0x1A0) UDPHS Endpoint Configuration Register (endpoint = 5) -------- */ -#define UDPHS_EPTCFG5_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG5) Endpoint Size */ -#define UDPHS_EPTCFG5_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG5) 8 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG5) 16 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG5) 32 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG5) 64 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG5) 128 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG5) 256 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG5) 512 bytes */ -#define UDPHS_EPTCFG5_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG5) 1024 bytes */ -#define UDPHS_EPTCFG5_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG5) Endpoint Direction */ -#define UDPHS_EPTCFG5_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG5) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG5_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG5) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG5_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG5) Endpoint Type */ -#define UDPHS_EPTCFG5_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG5) Control endpoint */ -#define UDPHS_EPTCFG5_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG5) Isochronous endpoint */ -#define UDPHS_EPTCFG5_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG5) Bulk endpoint */ -#define UDPHS_EPTCFG5_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG5) Interrupt endpoint */ -#define UDPHS_EPTCFG5_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG5) Number of Banks */ -#define UDPHS_EPTCFG5_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG5) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG5_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG5) One bank (bank 0) */ -#define UDPHS_EPTCFG5_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG5) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG5_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG5) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG5_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG5) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG5_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG5) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB5 : (UDPHS Offset: 0x1A4) UDPHS Endpoint Control Enable Register (endpoint = 5) -------- */ -#define UDPHS_EPTCTLENB5_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB5) Endpoint Enable */ -#define UDPHS_EPTCTLENB5_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB5) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB5_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB5) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB5_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB5) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB5_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB5) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB5_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB5) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB5_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB5) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB5_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB5) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB5_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB5) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB5_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB5) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB5_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB5) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB5_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB5) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB5_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB5) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB5_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB5) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB5_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB5) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB5_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB5) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS5 : (UDPHS Offset: 0x1A8) UDPHS Endpoint Control Disable Register (endpoint = 5) -------- */ -#define UDPHS_EPTCTLDIS5_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS5) Endpoint Disable */ -#define UDPHS_EPTCTLDIS5_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS5) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS5_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS5) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS5_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS5) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS5_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS5) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS5_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS5) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS5_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS5) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS5) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS5) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS5) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS5) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS5) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS5) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS5) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS5) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS5_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS5) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL5 : (UDPHS Offset: 0x1AC) UDPHS Endpoint Control Register (endpoint = 5) -------- */ -#define UDPHS_EPTCTL5_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL5) Endpoint Enable */ -#define UDPHS_EPTCTL5_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL5) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL5_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL5) Interrupt Disables DMA */ -#define UDPHS_EPTCTL5_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL5) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL5_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL5) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL5_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL5) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL5_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL5) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL5_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL5) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL5_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL5) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL5_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL5) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL5_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL5) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL5_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL5) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL5_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL5) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL5_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL5) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL5_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL5) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL5_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL5) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA5 : (UDPHS Offset: 0x1B4) UDPHS Endpoint Set Status Register (endpoint = 5) -------- */ -#define UDPHS_EPTSETSTA5_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA5) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA5_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA5) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA5_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA5) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA5 : (UDPHS Offset: 0x1B8) UDPHS Endpoint Clear Status Register (endpoint = 5) -------- */ -#define UDPHS_EPTCLRSTA5_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA5) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA5_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA5) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA5_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA5) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA5_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA5) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA5_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA5) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA5_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA5) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA5_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA5) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA5_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA5) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA5 : (UDPHS Offset: 0x1BC) UDPHS Endpoint Status Register (endpoint = 5) -------- */ -#define UDPHS_EPTSTA5_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA5) Stall Handshake Request */ -#define UDPHS_EPTSTA5_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA5) Toggle Sequencing */ -#define UDPHS_EPTSTA5_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA5) Overflow Error */ -#define UDPHS_EPTSTA5_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA5) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA5_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA5) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA5_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA5) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA5_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA5) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA5_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA5) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA5_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA5) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA5_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA5) NAK OUT */ -#define UDPHS_EPTSTA5_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA5) Current Bank/Control Direction */ -#define UDPHS_EPTSTA5_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA5) Busy Bank Number */ -#define UDPHS_EPTSTA5_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA5) UDPHS Byte Count */ -#define UDPHS_EPTSTA5_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA5) Short Packet */ -/* -------- UDPHS_EPTCFG6 : (UDPHS Offset: 0x1C0) UDPHS Endpoint Configuration Register (endpoint = 6) -------- */ -#define UDPHS_EPTCFG6_EPT_SIZE (0x7 << 0) /**< \brief (UDPHS_EPTCFG6) Endpoint Size */ -#define UDPHS_EPTCFG6_EPT_SIZE_8 (0x0 << 0) /**< \brief (UDPHS_EPTCFG6) 8 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_16 (0x1 << 0) /**< \brief (UDPHS_EPTCFG6) 16 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_32 (0x2 << 0) /**< \brief (UDPHS_EPTCFG6) 32 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_64 (0x3 << 0) /**< \brief (UDPHS_EPTCFG6) 64 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_128 (0x4 << 0) /**< \brief (UDPHS_EPTCFG6) 128 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_256 (0x5 << 0) /**< \brief (UDPHS_EPTCFG6) 256 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_512 (0x6 << 0) /**< \brief (UDPHS_EPTCFG6) 512 bytes */ -#define UDPHS_EPTCFG6_EPT_SIZE_1024 (0x7 << 0) /**< \brief (UDPHS_EPTCFG6) 1024 bytes */ -#define UDPHS_EPTCFG6_EPT_DIR (0x1 << 3) /**< \brief (UDPHS_EPTCFG6) Endpoint Direction */ -#define UDPHS_EPTCFG6_EPT_DIR_OUT (0x0 << 3) /**< \brief (UDPHS_EPTCFG6) Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG6_EPT_DIR_IN (0x1 << 3) /**< \brief (UDPHS_EPTCFG6) set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints. */ -#define UDPHS_EPTCFG6_EPT_TYPE (0x3 << 4) /**< \brief (UDPHS_EPTCFG6) Endpoint Type */ -#define UDPHS_EPTCFG6_EPT_TYPE_CTL_EPT (0x0 << 4) /**< \brief (UDPHS_EPTCFG6) Control endpoint */ -#define UDPHS_EPTCFG6_EPT_TYPE_ISO_EPT (0x1 << 4) /**< \brief (UDPHS_EPTCFG6) Isochronous endpoint */ -#define UDPHS_EPTCFG6_EPT_TYPE_BUL_EPT (0x2 << 4) /**< \brief (UDPHS_EPTCFG6) Bulk endpoint */ -#define UDPHS_EPTCFG6_EPT_TYPE_INT_EPT (0x3 << 4) /**< \brief (UDPHS_EPTCFG6) Interrupt endpoint */ -#define UDPHS_EPTCFG6_BK_NUMBER (0x3 << 6) /**< \brief (UDPHS_EPTCFG6) Number of Banks */ -#define UDPHS_EPTCFG6_BK_NUMBER_0 (0x0 << 6) /**< \brief (UDPHS_EPTCFG6) Zero bank, the endpoint is not mapped in memory */ -#define UDPHS_EPTCFG6_BK_NUMBER_1 (0x1 << 6) /**< \brief (UDPHS_EPTCFG6) One bank (bank 0) */ -#define UDPHS_EPTCFG6_BK_NUMBER_2 (0x2 << 6) /**< \brief (UDPHS_EPTCFG6) Double bank (Ping-Pong: bank 0/bank 1) */ -#define UDPHS_EPTCFG6_BK_NUMBER_3 (0x3 << 6) /**< \brief (UDPHS_EPTCFG6) Triple bank (bank 0/bank 1/bank 2) */ -#define UDPHS_EPTCFG6_NB_TRANS (0x3 << 8) /**< \brief (UDPHS_EPTCFG6) Number Of Transaction per Microframe */ -#define UDPHS_EPTCFG6_EPT_MAPD (0x1 << 31) /**< \brief (UDPHS_EPTCFG6) Endpoint Mapped */ -/* -------- UDPHS_EPTCTLENB6 : (UDPHS Offset: 0x1C4) UDPHS Endpoint Control Enable Register (endpoint = 6) -------- */ -#define UDPHS_EPTCTLENB6_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLENB6) Endpoint Enable */ -#define UDPHS_EPTCTLENB6_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLENB6) Packet Auto-Valid Enable */ -#define UDPHS_EPTCTLENB6_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLENB6) Interrupts Disable DMA */ -#define UDPHS_EPTCTLENB6_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLENB6) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLENB6_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLENB6) DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB6_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLENB6) MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLENB6_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLENB6) Overflow Error Interrupt Enable */ -#define UDPHS_EPTCTLENB6_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLENB6) Received OUT Data Interrupt Enable */ -#define UDPHS_EPTCTLENB6_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLENB6) Transmitted IN Data Complete Interrupt Enable */ -#define UDPHS_EPTCTLENB6_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLENB6) TX Packet Ready/Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB6_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLENB6) Received SETUP/Error Flow Interrupt Enable */ -#define UDPHS_EPTCTLENB6_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLENB6) Stall Sent /ISO CRC Error/Number of Transaction Error Interrupt Enable */ -#define UDPHS_EPTCTLENB6_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLENB6) NAKIN/Bank Flush Error Interrupt Enable */ -#define UDPHS_EPTCTLENB6_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLENB6) NAKOUT Interrupt Enable */ -#define UDPHS_EPTCTLENB6_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLENB6) Busy Bank Interrupt Enable */ -#define UDPHS_EPTCTLENB6_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLENB6) Short Packet Send/Short Packet Interrupt Enable */ -/* -------- UDPHS_EPTCTLDIS6 : (UDPHS Offset: 0x1C8) UDPHS Endpoint Control Disable Register (endpoint = 6) -------- */ -#define UDPHS_EPTCTLDIS6_EPT_DISABL (0x1 << 0) /**< \brief (UDPHS_EPTCTLDIS6) Endpoint Disable */ -#define UDPHS_EPTCTLDIS6_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTLDIS6) Packet Auto-Valid Disable */ -#define UDPHS_EPTCTLDIS6_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTLDIS6) Interrupts Disable DMA */ -#define UDPHS_EPTCTLDIS6_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTLDIS6) NYET Enable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTLDIS6_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTLDIS6) DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS6_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTLDIS6) MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTLDIS6_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTLDIS6) Overflow Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTLDIS6) Received OUT Data Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTLDIS6) Transmitted IN Data Complete Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTLDIS6) TX Packet Ready/Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTLDIS6) Received SETUP/Error Flow Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTLDIS6) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTLDIS6) NAKIN/bank flush error Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTLDIS6) NAKOUT Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTLDIS6) Busy Bank Interrupt Disable */ -#define UDPHS_EPTCTLDIS6_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTLDIS6) Short Packet Interrupt Disable */ -/* -------- UDPHS_EPTCTL6 : (UDPHS Offset: 0x1CC) UDPHS Endpoint Control Register (endpoint = 6) -------- */ -#define UDPHS_EPTCTL6_EPT_ENABL (0x1 << 0) /**< \brief (UDPHS_EPTCTL6) Endpoint Enable */ -#define UDPHS_EPTCTL6_AUTO_VALID (0x1 << 1) /**< \brief (UDPHS_EPTCTL6) Packet Auto-Valid Enabled (Not for CONTROL Endpoints) */ -#define UDPHS_EPTCTL6_INTDIS_DMA (0x1 << 3) /**< \brief (UDPHS_EPTCTL6) Interrupt Disables DMA */ -#define UDPHS_EPTCTL6_NYET_DIS (0x1 << 4) /**< \brief (UDPHS_EPTCTL6) NYET Disable (Only for High Speed Bulk OUT endpoints) */ -#define UDPHS_EPTCTL6_DATAX_RX (0x1 << 6) /**< \brief (UDPHS_EPTCTL6) DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL6_MDATA_RX (0x1 << 7) /**< \brief (UDPHS_EPTCTL6) MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints) */ -#define UDPHS_EPTCTL6_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTCTL6) Overflow Error Interrupt Enabled */ -#define UDPHS_EPTCTL6_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCTL6) Received OUT Data Interrupt Enabled */ -#define UDPHS_EPTCTL6_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCTL6) Transmitted IN Data Complete Interrupt Enabled */ -#define UDPHS_EPTCTL6_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTCTL6) TX Packet Ready/Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL6_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCTL6) Received SETUP/Error Flow Interrupt Enabled */ -#define UDPHS_EPTCTL6_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCTL6) Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt Enabled */ -#define UDPHS_EPTCTL6_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCTL6) NAKIN/Bank Flush Error Interrupt Enabled */ -#define UDPHS_EPTCTL6_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCTL6) NAKOUT Interrupt Enabled */ -#define UDPHS_EPTCTL6_BUSY_BANK (0x1 << 18) /**< \brief (UDPHS_EPTCTL6) Busy Bank Interrupt Enabled */ -#define UDPHS_EPTCTL6_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTCTL6) Short Packet Interrupt Enabled */ -/* -------- UDPHS_EPTSETSTA6 : (UDPHS Offset: 0x1D4) UDPHS Endpoint Set Status Register (endpoint = 6) -------- */ -#define UDPHS_EPTSETSTA6_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSETSTA6) Stall Handshake Request Set */ -#define UDPHS_EPTSETSTA6_KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSETSTA6) KILL Bank Set (for IN Endpoint) */ -#define UDPHS_EPTSETSTA6_TX_PK_RDY (0x1 << 11) /**< \brief (UDPHS_EPTSETSTA6) TX Packet Ready Set */ -/* -------- UDPHS_EPTCLRSTA6 : (UDPHS Offset: 0x1D8) UDPHS Endpoint Clear Status Register (endpoint = 6) -------- */ -#define UDPHS_EPTCLRSTA6_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTCLRSTA6) Stall Handshake Request Clear */ -#define UDPHS_EPTCLRSTA6_TOGGLESQ (0x1 << 6) /**< \brief (UDPHS_EPTCLRSTA6) Data Toggle Clear */ -#define UDPHS_EPTCLRSTA6_RX_BK_RDY (0x1 << 9) /**< \brief (UDPHS_EPTCLRSTA6) Received OUT Data Clear */ -#define UDPHS_EPTCLRSTA6_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTCLRSTA6) Transmitted IN Data Complete Clear */ -#define UDPHS_EPTCLRSTA6_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTCLRSTA6) Received SETUP/Error Flow Clear */ -#define UDPHS_EPTCLRSTA6_STALL_SNT__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTCLRSTA6) Stall Sent/Number of Transaction Error Clear */ -#define UDPHS_EPTCLRSTA6_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTCLRSTA6) NAKIN/Bank Flush Error Clear */ -#define UDPHS_EPTCLRSTA6_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTCLRSTA6) NAKOUT Clear */ -/* -------- UDPHS_EPTSTA6 : (UDPHS Offset: 0x1DC) UDPHS Endpoint Status Register (endpoint = 6) -------- */ -#define UDPHS_EPTSTA6_FRCESTALL (0x1 << 5) /**< \brief (UDPHS_EPTSTA6) Stall Handshake Request */ -#define UDPHS_EPTSTA6_TOGGLESQ_STA (0x3 << 6) /**< \brief (UDPHS_EPTSTA6) Toggle Sequencing */ -#define UDPHS_EPTSTA6_ERR_OVFLW (0x1 << 8) /**< \brief (UDPHS_EPTSTA6) Overflow Error */ -#define UDPHS_EPTSTA6_RX_BK_RDY__KILL_BANK (0x1 << 9) /**< \brief (UDPHS_EPTSTA6) Received OUT Data/KILL Bank */ -#define UDPHS_EPTSTA6_TX_COMPLT (0x1 << 10) /**< \brief (UDPHS_EPTSTA6) Transmitted IN Data Complete */ -#define UDPHS_EPTSTA6_TX_PK_RDY__ERR_TRANS (0x1 << 11) /**< \brief (UDPHS_EPTSTA6) TX Packet Ready/Transaction Error */ -#define UDPHS_EPTSTA6_RX_SETUP__ERR_FL_ISO (0x1 << 12) /**< \brief (UDPHS_EPTSTA6) Received SETUP/Error Flow */ -#define UDPHS_EPTSTA6_STALL_SNT__ERR_CRISO__ERR_NBTRA (0x1 << 13) /**< \brief (UDPHS_EPTSTA6) Stall Sent/CRC ISO Error/Number of Transaction Error */ -#define UDPHS_EPTSTA6_NAK_IN__ERR_FLUSH (0x1 << 14) /**< \brief (UDPHS_EPTSTA6) NAK IN/Bank Flush Error */ -#define UDPHS_EPTSTA6_NAK_OUT (0x1 << 15) /**< \brief (UDPHS_EPTSTA6) NAK OUT */ -#define UDPHS_EPTSTA6_CURRENT_BANK__CONTROL_DIR (0x3 << 16) /**< \brief (UDPHS_EPTSTA6) Current Bank/Control Direction */ -#define UDPHS_EPTSTA6_BUSY_BANK_STA (0x3 << 18) /**< \brief (UDPHS_EPTSTA6) Busy Bank Number */ -#define UDPHS_EPTSTA6_BYTE_COUNT (0x7ff << 20) /**< \brief (UDPHS_EPTSTA6) UDPHS Byte Count */ -#define UDPHS_EPTSTA6_SHRT_PCKT (0x1 << 31) /**< \brief (UDPHS_EPTSTA6) Short Packet */ -/* -------- UDPHS_DMANXTDSC1 : (UDPHS Offset: 0x320) UDPHS DMA Next Descriptor Address Register (channel = 1) -------- */ -#define UDPHS_DMANXTDSC1_NXT_DSC_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMANXTDSC1) */ -/* -------- UDPHS_DMAADDRESS1 : (UDPHS Offset: 0x324) UDPHS DMA Channel Address Register (channel = 1) -------- */ -#define UDPHS_DMAADDRESS1_BUFF_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMAADDRESS1) */ -/* -------- UDPHS_DMACONTROL1 : (UDPHS Offset: 0x328) UDPHS DMA Channel Control Register (channel = 1) -------- */ -#define UDPHS_DMACONTROL1_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMACONTROL1) */ -#define UDPHS_DMACONTROL1_LDNXT_DSC (0x1 << 1) /**< \brief (UDPHS_DMACONTROL1) Load Next Channel Transfer Descriptor Enable (Command) */ -#define UDPHS_DMACONTROL1_END_TR_EN (0x1 << 2) /**< \brief (UDPHS_DMACONTROL1) End of Transfer Enable (Control) */ -#define UDPHS_DMACONTROL1_END_B_EN (0x1 << 3) /**< \brief (UDPHS_DMACONTROL1) End of Buffer Enable (Control) */ -#define UDPHS_DMACONTROL1_END_TR_IT (0x1 << 4) /**< \brief (UDPHS_DMACONTROL1) End of Transfer Interrupt Enable */ -#define UDPHS_DMACONTROL1_END_BUFFIT (0x1 << 5) /**< \brief (UDPHS_DMACONTROL1) End of Buffer Interrupt Enable */ -#define UDPHS_DMACONTROL1_DESC_LD_IT (0x1 << 6) /**< \brief (UDPHS_DMACONTROL1) Descriptor Loaded Interrupt Enable */ -#define UDPHS_DMACONTROL1_BURST_LCK (0x1 << 7) /**< \brief (UDPHS_DMACONTROL1) Burst Lock Enable */ -#define UDPHS_DMACONTROL1_BUFF_LENGTH (0xffff << 16) /**< \brief (UDPHS_DMACONTROL1) Buffer Byte Length (Write-only) */ -/* -------- UDPHS_DMASTATUS1 : (UDPHS Offset: 0x32C) UDPHS DMA Channel Status Register (channel = 1) -------- */ -#define UDPHS_DMASTATUS1_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMASTATUS1) Channel Enable Status */ -#define UDPHS_DMASTATUS1_CHANN_ACT (0x1 << 1) /**< \brief (UDPHS_DMASTATUS1) Channel Active Status */ -#define UDPHS_DMASTATUS1_END_TR_ST (0x1 << 4) /**< \brief (UDPHS_DMASTATUS1) End of Channel Transfer Status */ -#define UDPHS_DMASTATUS1_END_BF_ST (0x1 << 5) /**< \brief (UDPHS_DMASTATUS1) End of Channel Buffer Status */ -#define UDPHS_DMASTATUS1_DESC_LDST (0x1 << 6) /**< \brief (UDPHS_DMASTATUS1) Descriptor Loaded Status */ -#define UDPHS_DMASTATUS1_BUFF_COUNT (0xffff << 16) /**< \brief (UDPHS_DMASTATUS1) Buffer Byte Count */ -/* -------- UDPHS_DMANXTDSC2 : (UDPHS Offset: 0x330) UDPHS DMA Next Descriptor Address Register (channel = 2) -------- */ -#define UDPHS_DMANXTDSC2_NXT_DSC_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMANXTDSC2) */ -/* -------- UDPHS_DMAADDRESS2 : (UDPHS Offset: 0x334) UDPHS DMA Channel Address Register (channel = 2) -------- */ -#define UDPHS_DMAADDRESS2_BUFF_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMAADDRESS2) */ -/* -------- UDPHS_DMACONTROL2 : (UDPHS Offset: 0x338) UDPHS DMA Channel Control Register (channel = 2) -------- */ -#define UDPHS_DMACONTROL2_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMACONTROL2) */ -#define UDPHS_DMACONTROL2_LDNXT_DSC (0x1 << 1) /**< \brief (UDPHS_DMACONTROL2) Load Next Channel Transfer Descriptor Enable (Command) */ -#define UDPHS_DMACONTROL2_END_TR_EN (0x1 << 2) /**< \brief (UDPHS_DMACONTROL2) End of Transfer Enable (Control) */ -#define UDPHS_DMACONTROL2_END_B_EN (0x1 << 3) /**< \brief (UDPHS_DMACONTROL2) End of Buffer Enable (Control) */ -#define UDPHS_DMACONTROL2_END_TR_IT (0x1 << 4) /**< \brief (UDPHS_DMACONTROL2) End of Transfer Interrupt Enable */ -#define UDPHS_DMACONTROL2_END_BUFFIT (0x1 << 5) /**< \brief (UDPHS_DMACONTROL2) End of Buffer Interrupt Enable */ -#define UDPHS_DMACONTROL2_DESC_LD_IT (0x1 << 6) /**< \brief (UDPHS_DMACONTROL2) Descriptor Loaded Interrupt Enable */ -#define UDPHS_DMACONTROL2_BURST_LCK (0x1 << 7) /**< \brief (UDPHS_DMACONTROL2) Burst Lock Enable */ -#define UDPHS_DMACONTROL2_BUFF_LENGTH (0xffff << 16) /**< \brief (UDPHS_DMACONTROL2) Buffer Byte Length (Write-only) */ -/* -------- UDPHS_DMASTATUS2 : (UDPHS Offset: 0x33C) UDPHS DMA Channel Status Register (channel = 2) -------- */ -#define UDPHS_DMASTATUS2_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMASTATUS2) Channel Enable Status */ -#define UDPHS_DMASTATUS2_CHANN_ACT (0x1 << 1) /**< \brief (UDPHS_DMASTATUS2) Channel Active Status */ -#define UDPHS_DMASTATUS2_END_TR_ST (0x1 << 4) /**< \brief (UDPHS_DMASTATUS2) End of Channel Transfer Status */ -#define UDPHS_DMASTATUS2_END_BF_ST (0x1 << 5) /**< \brief (UDPHS_DMASTATUS2) End of Channel Buffer Status */ -#define UDPHS_DMASTATUS2_DESC_LDST (0x1 << 6) /**< \brief (UDPHS_DMASTATUS2) Descriptor Loaded Status */ -#define UDPHS_DMASTATUS2_BUFF_COUNT (0xffff << 16) /**< \brief (UDPHS_DMASTATUS2) Buffer Byte Count */ -/* -------- UDPHS_DMANXTDSC3 : (UDPHS Offset: 0x340) UDPHS DMA Next Descriptor Address Register (channel = 3) -------- */ -#define UDPHS_DMANXTDSC3_NXT_DSC_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMANXTDSC3) */ -/* -------- UDPHS_DMAADDRESS3 : (UDPHS Offset: 0x344) UDPHS DMA Channel Address Register (channel = 3) -------- */ -#define UDPHS_DMAADDRESS3_BUFF_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMAADDRESS3) */ -/* -------- UDPHS_DMACONTROL3 : (UDPHS Offset: 0x348) UDPHS DMA Channel Control Register (channel = 3) -------- */ -#define UDPHS_DMACONTROL3_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMACONTROL3) */ -#define UDPHS_DMACONTROL3_LDNXT_DSC (0x1 << 1) /**< \brief (UDPHS_DMACONTROL3) Load Next Channel Transfer Descriptor Enable (Command) */ -#define UDPHS_DMACONTROL3_END_TR_EN (0x1 << 2) /**< \brief (UDPHS_DMACONTROL3) End of Transfer Enable (Control) */ -#define UDPHS_DMACONTROL3_END_B_EN (0x1 << 3) /**< \brief (UDPHS_DMACONTROL3) End of Buffer Enable (Control) */ -#define UDPHS_DMACONTROL3_END_TR_IT (0x1 << 4) /**< \brief (UDPHS_DMACONTROL3) End of Transfer Interrupt Enable */ -#define UDPHS_DMACONTROL3_END_BUFFIT (0x1 << 5) /**< \brief (UDPHS_DMACONTROL3) End of Buffer Interrupt Enable */ -#define UDPHS_DMACONTROL3_DESC_LD_IT (0x1 << 6) /**< \brief (UDPHS_DMACONTROL3) Descriptor Loaded Interrupt Enable */ -#define UDPHS_DMACONTROL3_BURST_LCK (0x1 << 7) /**< \brief (UDPHS_DMACONTROL3) Burst Lock Enable */ -#define UDPHS_DMACONTROL3_BUFF_LENGTH (0xffff << 16) /**< \brief (UDPHS_DMACONTROL3) Buffer Byte Length (Write-only) */ -/* -------- UDPHS_DMASTATUS3 : (UDPHS Offset: 0x34C) UDPHS DMA Channel Status Register (channel = 3) -------- */ -#define UDPHS_DMASTATUS3_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMASTATUS3) Channel Enable Status */ -#define UDPHS_DMASTATUS3_CHANN_ACT (0x1 << 1) /**< \brief (UDPHS_DMASTATUS3) Channel Active Status */ -#define UDPHS_DMASTATUS3_END_TR_ST (0x1 << 4) /**< \brief (UDPHS_DMASTATUS3) End of Channel Transfer Status */ -#define UDPHS_DMASTATUS3_END_BF_ST (0x1 << 5) /**< \brief (UDPHS_DMASTATUS3) End of Channel Buffer Status */ -#define UDPHS_DMASTATUS3_DESC_LDST (0x1 << 6) /**< \brief (UDPHS_DMASTATUS3) Descriptor Loaded Status */ -#define UDPHS_DMASTATUS3_BUFF_COUNT (0xffff << 16) /**< \brief (UDPHS_DMASTATUS3) Buffer Byte Count */ -/* -------- UDPHS_DMANXTDSC4 : (UDPHS Offset: 0x350) UDPHS DMA Next Descriptor Address Register (channel = 4) -------- */ -#define UDPHS_DMANXTDSC4_NXT_DSC_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMANXTDSC4) */ -/* -------- UDPHS_DMAADDRESS4 : (UDPHS Offset: 0x354) UDPHS DMA Channel Address Register (channel = 4) -------- */ -#define UDPHS_DMAADDRESS4_BUFF_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMAADDRESS4) */ -/* -------- UDPHS_DMACONTROL4 : (UDPHS Offset: 0x358) UDPHS DMA Channel Control Register (channel = 4) -------- */ -#define UDPHS_DMACONTROL4_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMACONTROL4) */ -#define UDPHS_DMACONTROL4_LDNXT_DSC (0x1 << 1) /**< \brief (UDPHS_DMACONTROL4) Load Next Channel Transfer Descriptor Enable (Command) */ -#define UDPHS_DMACONTROL4_END_TR_EN (0x1 << 2) /**< \brief (UDPHS_DMACONTROL4) End of Transfer Enable (Control) */ -#define UDPHS_DMACONTROL4_END_B_EN (0x1 << 3) /**< \brief (UDPHS_DMACONTROL4) End of Buffer Enable (Control) */ -#define UDPHS_DMACONTROL4_END_TR_IT (0x1 << 4) /**< \brief (UDPHS_DMACONTROL4) End of Transfer Interrupt Enable */ -#define UDPHS_DMACONTROL4_END_BUFFIT (0x1 << 5) /**< \brief (UDPHS_DMACONTROL4) End of Buffer Interrupt Enable */ -#define UDPHS_DMACONTROL4_DESC_LD_IT (0x1 << 6) /**< \brief (UDPHS_DMACONTROL4) Descriptor Loaded Interrupt Enable */ -#define UDPHS_DMACONTROL4_BURST_LCK (0x1 << 7) /**< \brief (UDPHS_DMACONTROL4) Burst Lock Enable */ -#define UDPHS_DMACONTROL4_BUFF_LENGTH (0xffff << 16) /**< \brief (UDPHS_DMACONTROL4) Buffer Byte Length (Write-only) */ -/* -------- UDPHS_DMASTATUS4 : (UDPHS Offset: 0x35C) UDPHS DMA Channel Status Register (channel = 4) -------- */ -#define UDPHS_DMASTATUS4_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMASTATUS4) Channel Enable Status */ -#define UDPHS_DMASTATUS4_CHANN_ACT (0x1 << 1) /**< \brief (UDPHS_DMASTATUS4) Channel Active Status */ -#define UDPHS_DMASTATUS4_END_TR_ST (0x1 << 4) /**< \brief (UDPHS_DMASTATUS4) End of Channel Transfer Status */ -#define UDPHS_DMASTATUS4_END_BF_ST (0x1 << 5) /**< \brief (UDPHS_DMASTATUS4) End of Channel Buffer Status */ -#define UDPHS_DMASTATUS4_DESC_LDST (0x1 << 6) /**< \brief (UDPHS_DMASTATUS4) Descriptor Loaded Status */ -#define UDPHS_DMASTATUS4_BUFF_COUNT (0xffff << 16) /**< \brief (UDPHS_DMASTATUS4) Buffer Byte Count */ -/* -------- UDPHS_DMANXTDSC5 : (UDPHS Offset: 0x360) UDPHS DMA Next Descriptor Address Register (channel = 5) -------- */ -#define UDPHS_DMANXTDSC5_NXT_DSC_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMANXTDSC5) */ -/* -------- UDPHS_DMAADDRESS5 : (UDPHS Offset: 0x364) UDPHS DMA Channel Address Register (channel = 5) -------- */ -#define UDPHS_DMAADDRESS5_BUFF_ADD (0xffffffff << 0) /**< \brief (UDPHS_DMAADDRESS5) */ -/* -------- UDPHS_DMACONTROL5 : (UDPHS Offset: 0x368) UDPHS DMA Channel Control Register (channel = 5) -------- */ -#define UDPHS_DMACONTROL5_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMACONTROL5) */ -#define UDPHS_DMACONTROL5_LDNXT_DSC (0x1 << 1) /**< \brief (UDPHS_DMACONTROL5) Load Next Channel Transfer Descriptor Enable (Command) */ -#define UDPHS_DMACONTROL5_END_TR_EN (0x1 << 2) /**< \brief (UDPHS_DMACONTROL5) End of Transfer Enable (Control) */ -#define UDPHS_DMACONTROL5_END_B_EN (0x1 << 3) /**< \brief (UDPHS_DMACONTROL5) End of Buffer Enable (Control) */ -#define UDPHS_DMACONTROL5_END_TR_IT (0x1 << 4) /**< \brief (UDPHS_DMACONTROL5) End of Transfer Interrupt Enable */ -#define UDPHS_DMACONTROL5_END_BUFFIT (0x1 << 5) /**< \brief (UDPHS_DMACONTROL5) End of Buffer Interrupt Enable */ -#define UDPHS_DMACONTROL5_DESC_LD_IT (0x1 << 6) /**< \brief (UDPHS_DMACONTROL5) Descriptor Loaded Interrupt Enable */ -#define UDPHS_DMACONTROL5_BURST_LCK (0x1 << 7) /**< \brief (UDPHS_DMACONTROL5) Burst Lock Enable */ -#define UDPHS_DMACONTROL5_BUFF_LENGTH (0xffff << 16) /**< \brief (UDPHS_DMACONTROL5) Buffer Byte Length (Write-only) */ -/* -------- UDPHS_DMASTATUS5 : (UDPHS Offset: 0x36C) UDPHS DMA Channel Status Register (channel = 5) -------- */ -#define UDPHS_DMASTATUS5_CHANN_ENB (0x1 << 0) /**< \brief (UDPHS_DMASTATUS5) Channel Enable Status */ -#define UDPHS_DMASTATUS5_CHANN_ACT (0x1 << 1) /**< \brief (UDPHS_DMASTATUS5) Channel Active Status */ -#define UDPHS_DMASTATUS5_END_TR_ST (0x1 << 4) /**< \brief (UDPHS_DMASTATUS5) End of Channel Transfer Status */ -#define UDPHS_DMASTATUS5_END_BF_ST (0x1 << 5) /**< \brief (UDPHS_DMASTATUS5) End of Channel Buffer Status */ -#define UDPHS_DMASTATUS5_DESC_LDST (0x1 << 6) /**< \brief (UDPHS_DMASTATUS5) Descriptor Loaded Status */ -#define UDPHS_DMASTATUS5_BUFF_COUNT (0xffff << 16) /**< \brief (UDPHS_DMASTATUS5) Buffer Byte Count */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Universal Synchronous Asynchronous Receiver Transmitter */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_USART Universal Synchronous Asynchronous Receiver Transmitter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Usart hardware registers */ -typedef struct { - WoReg US_CR; /**< \brief (Usart Offset: 0x0000) Control Register */ - RwReg US_MR; /**< \brief (Usart Offset: 0x0004) Mode Register */ - WoReg US_IER; /**< \brief (Usart Offset: 0x0008) Interrupt Enable Register */ - WoReg US_IDR; /**< \brief (Usart Offset: 0x000C) Interrupt Disable Register */ - RoReg US_IMR; /**< \brief (Usart Offset: 0x0010) Interrupt Mask Register */ - RoReg US_CSR; /**< \brief (Usart Offset: 0x0014) Channel Status Register */ - RoReg US_RHR; /**< \brief (Usart Offset: 0x0018) Receiver Holding Register */ - WoReg US_THR; /**< \brief (Usart Offset: 0x001C) Transmitter Holding Register */ - RwReg US_BRGR; /**< \brief (Usart Offset: 0x0020) Baud Rate Generator Register */ - RwReg US_RTOR; /**< \brief (Usart Offset: 0x0024) Receiver Time-out Register */ - RwReg US_TTGR; /**< \brief (Usart Offset: 0x0028) Transmitter Timeguard Register */ - RwReg Reserved1[5]; - RwReg US_FIDI; /**< \brief (Usart Offset: 0x0040) FI DI Ratio Register */ - RoReg US_NER; /**< \brief (Usart Offset: 0x0044) Number of Errors Register */ - RwReg Reserved2[1]; - RwReg US_IF; /**< \brief (Usart Offset: 0x004C) IrDA Filter Register */ - RwReg US_MAN; /**< \brief (Usart Offset: 0x0050) Manchester Encoder Decoder Register */ - RwReg Reserved3[36]; - RwReg US_WPMR; /**< \brief (Usart Offset: 0xE4) Write Protect Mode Register */ - RoReg US_WPSR; /**< \brief (Usart Offset: 0xE8) Write Protect Status Register */ - RwReg Reserved4[4]; - RoReg US_VERSION; /**< \brief (Usart Offset: 0xFC) Version Register */ - RwReg US_RPR; /**< \brief (Usart Offset: 0x100) Receive Pointer Register */ - RwReg US_RCR; /**< \brief (Usart Offset: 0x104) Receive Counter Register */ - RwReg US_TPR; /**< \brief (Usart Offset: 0x108) Transmit Pointer Register */ - RwReg US_TCR; /**< \brief (Usart Offset: 0x10C) Transmit Counter Register */ - RwReg US_RNPR; /**< \brief (Usart Offset: 0x110) Receive Next Pointer Register */ - RwReg US_RNCR; /**< \brief (Usart Offset: 0x114) Receive Next Counter Register */ - RwReg US_TNPR; /**< \brief (Usart Offset: 0x118) Transmit Next Pointer Register */ - RwReg US_TNCR; /**< \brief (Usart Offset: 0x11C) Transmit Next Counter Register */ - WoReg US_PTCR; /**< \brief (Usart Offset: 0x120) Transfer Control Register */ - RoReg US_PTSR; /**< \brief (Usart Offset: 0x124) Transfer Status Register */ -} Usart; -#endif /* __ASSEMBLY__ */ -/* -------- US_CR : (USART Offset: 0x0000) Control Register -------- */ -#define US_CR_RSTRX (0x1 << 2) /**< \brief (US_CR) Reset Receiver */ -#define US_CR_RSTTX (0x1 << 3) /**< \brief (US_CR) Reset Transmitter */ -#define US_CR_RXEN (0x1 << 4) /**< \brief (US_CR) Receiver Enable */ -#define US_CR_RXDIS (0x1 << 5) /**< \brief (US_CR) Receiver Disable */ -#define US_CR_TXEN (0x1 << 6) /**< \brief (US_CR) Transmitter Enable */ -#define US_CR_TXDIS (0x1 << 7) /**< \brief (US_CR) Transmitter Disable */ -#define US_CR_RSTSTA (0x1 << 8) /**< \brief (US_CR) Reset Status Bits */ -#define US_CR_STTBRK (0x1 << 9) /**< \brief (US_CR) Start Break */ -#define US_CR_STPBRK (0x1 << 10) /**< \brief (US_CR) Stop Break */ -#define US_CR_STTTO (0x1 << 11) /**< \brief (US_CR) Start Time-out */ -#define US_CR_SENDA (0x1 << 12) /**< \brief (US_CR) Send Address */ -#define US_CR_RSTIT (0x1 << 13) /**< \brief (US_CR) Reset Iterations */ -#define US_CR_RSTNACK (0x1 << 14) /**< \brief (US_CR) Reset Non Acknowledge */ -#define US_CR_RETTO (0x1 << 15) /**< \brief (US_CR) Rearm Time-out */ -#define US_CR_RTSEN__FCS (0x1 << 18) /**< \brief (US_CR) Request to Send Enable/Force SPI Chip Select */ -#define US_CR_RTSDIS__RCS (0x1 << 19) /**< \brief (US_CR) Request to Send Disable/Release SPI Chip Select */ -/* -------- US_MR : (USART Offset: 0x0004) Mode Register -------- */ -#define US_MR_USART_MODE (0xf << 0) /**< \brief (US_MR) */ -#define US_MR_USCLKS (0x3 << 4) /**< \brief (US_MR) Clock Selection */ -#define US_MR_CHRL (0x3 << 6) /**< \brief (US_MR) Character Length. */ -#define US_MR_SYNC__CPHA (0x1 << 8) /**< \brief (US_MR) Synchronous Mode Select or SPI Clock Phase */ -#define US_MR_PAR (0x7 << 9) /**< \brief (US_MR) Parity Type */ -#define US_MR_NBSTOP (0x3 << 12) /**< \brief (US_MR) Number of Stop Bits */ -#define US_MR_CHMODE (0x3 << 14) /**< \brief (US_MR) Channel Mode */ -#define US_MR_MSBF__CPOL (0x1 << 16) /**< \brief (US_MR) Bit Order or SPI Clock Polarity */ -#define US_MR_MODE9 (0x1 << 17) /**< \brief (US_MR) 9-bit Character Length */ -#define US_MR_CLKO (0x1 << 18) /**< \brief (US_MR) Clock Output Select */ -#define US_MR_OVER (0x1 << 19) /**< \brief (US_MR) Oversampling Mode */ -#define US_MR_INACK (0x1 << 20) /**< \brief (US_MR) Inhibit Non Acknowledge */ -#define US_MR_DSNACK (0x1 << 21) /**< \brief (US_MR) Disable Successive NACK */ -#define US_MR_VAR_SYNC (0x1 << 22) /**< \brief (US_MR) Variable Synchronization of Command/Data Sync Start Frame Delimiter */ -#define US_MR_INVDATA (0x1 << 23) /**< \brief (US_MR) INverted Data */ -#define US_MR_MAX_ITERATION (0x7 << 24) /**< \brief (US_MR) */ -#define US_MR_FILTER (0x1 << 28) /**< \brief (US_MR) Infrared Receive Line Filter */ -#define US_MR_MAN (0x1 << 29) /**< \brief (US_MR) Manchester Encoder/Decoder Enable */ -#define US_MR_MODSYNC_ (0x1 << 30) /**< \brief (US_MR) */ -#define US_MR_ONEBIT (0x1 << 31) /**< \brief (US_MR) Start Frame Delimiter Selector */ -/* -------- US_IER : (USART Offset: 0x0008) Interrupt Enable Register -------- */ -#define US_IER_RXRDY (0x1 << 0) /**< \brief (US_IER) RXRDY Interrupt Enable */ -#define US_IER_TXRDY (0x1 << 1) /**< \brief (US_IER) TXRDY Interrupt Enable */ -#define US_IER_RXBRK (0x1 << 2) /**< \brief (US_IER) Receiver Break Interrupt Enable */ -#define US_IER_ENDRX (0x1 << 3) /**< \brief (US_IER) End of Receive Transfer Interrupt Enable */ -#define US_IER_ENDTX (0x1 << 4) /**< \brief (US_IER) End of Transmit Interrupt Enable */ -#define US_IER_OVRE (0x1 << 5) /**< \brief (US_IER) Overrun Error Interrupt Enable */ -#define US_IER_FRAME (0x1 << 6) /**< \brief (US_IER) Framing Error Interrupt Enable */ -#define US_IER_PARE (0x1 << 7) /**< \brief (US_IER) Parity Error Interrupt Enable */ -#define US_IER_TIMEOUT (0x1 << 8) /**< \brief (US_IER) Time-out Interrupt Enable */ -#define US_IER_TXEMPTY (0x1 << 9) /**< \brief (US_IER) TXEMPTY Interrupt Enable */ -#define US_IER_ITER__UNRE (0x1 << 10) /**< \brief (US_IER) Iteration or SPI Underrun Error Interrupt Enable */ -#define US_IER_TXBUFE (0x1 << 11) /**< \brief (US_IER) Buffer Empty Interrupt Enable */ -#define US_IER_RXBUFF (0x1 << 12) /**< \brief (US_IER) Buffer Full Interrupt Enable */ -#define US_IER_NACK (0x1 << 13) /**< \brief (US_IER) Non Acknowledge Interrupt Enable */ -#define US_IER_CTSIC (0x1 << 19) /**< \brief (US_IER) Clear to Send Input Change Interrupt Enable */ -#define US_IER_MANE (0x1 << 24) /**< \brief (US_IER) Manchester Error Interrupt Enable */ -/* -------- US_IDR : (USART Offset: 0x000C) Interrupt Disable Register -------- */ -#define US_IDR_RXRDY (0x1 << 0) /**< \brief (US_IDR) RXRDY Interrupt Disable */ -#define US_IDR_TXRDY (0x1 << 1) /**< \brief (US_IDR) TXRDY Interrupt Disable */ -#define US_IDR_RXBRK (0x1 << 2) /**< \brief (US_IDR) Receiver Break Interrupt Disable */ -#define US_IDR_ENDRX (0x1 << 3) /**< \brief (US_IDR) End of Receive Transfer Interrupt Disable */ -#define US_IDR_ENDTX (0x1 << 4) /**< \brief (US_IDR) End of Transmit Interrupt Disable */ -#define US_IDR_OVRE (0x1 << 5) /**< \brief (US_IDR) Overrun Error Interrupt Disable */ -#define US_IDR_FRAME (0x1 << 6) /**< \brief (US_IDR) Framing Error Interrupt Disable */ -#define US_IDR_PARE (0x1 << 7) /**< \brief (US_IDR) Parity Error Interrupt Disable */ -#define US_IDR_TIMEOUT (0x1 << 8) /**< \brief (US_IDR) Time-out Interrupt Disable */ -#define US_IDR_TXEMPTY (0x1 << 9) /**< \brief (US_IDR) TXEMPTY Interrupt Disable */ -#define US_IDR_ITER__UNRE (0x1 << 10) /**< \brief (US_IDR) Iteration or SPI Underrun Error Interrupt Enable */ -#define US_IDR_TXBUFE (0x1 << 11) /**< \brief (US_IDR) Buffer Empty Interrupt Disable */ -#define US_IDR_RXBUFF (0x1 << 12) /**< \brief (US_IDR) Buffer Full Interrupt Disable */ -#define US_IDR_NACK (0x1 << 13) /**< \brief (US_IDR) Non Acknowledge Interrupt Disable */ -#define US_IDR_CTSIC (0x1 << 19) /**< \brief (US_IDR) Clear to Send Input Change Interrupt Disable */ -#define US_IDR_MANE (0x1 << 24) /**< \brief (US_IDR) Manchester Error Interrupt Disable */ -/* -------- US_IMR : (USART Offset: 0x0010) Interrupt Mask Register -------- */ -#define US_IMR_RXRDY (0x1 << 0) /**< \brief (US_IMR) RXRDY Interrupt Mask */ -#define US_IMR_TXRDY (0x1 << 1) /**< \brief (US_IMR) TXRDY Interrupt Mask */ -#define US_IMR_RXBRK (0x1 << 2) /**< \brief (US_IMR) Receiver Break Interrupt Mask */ -#define US_IMR_ENDRX (0x1 << 3) /**< \brief (US_IMR) End of Receive Transfer Interrupt Mask */ -#define US_IMR_ENDTX (0x1 << 4) /**< \brief (US_IMR) End of Transmit Interrupt Mask */ -#define US_IMR_OVRE (0x1 << 5) /**< \brief (US_IMR) Overrun Error Interrupt Mask */ -#define US_IMR_FRAME (0x1 << 6) /**< \brief (US_IMR) Framing Error Interrupt Mask */ -#define US_IMR_PARE (0x1 << 7) /**< \brief (US_IMR) Parity Error Interrupt Mask */ -#define US_IMR_TIMEOUT (0x1 << 8) /**< \brief (US_IMR) Time-out Interrupt Mask */ -#define US_IMR_TXEMPTY (0x1 << 9) /**< \brief (US_IMR) TXEMPTY Interrupt Mask */ -#define US_IMR_ITER__UNRE (0x1 << 10) /**< \brief (US_IMR) Iteration or SPI Underrun Error Interrupt Enable */ -#define US_IMR_TXBUFE (0x1 << 11) /**< \brief (US_IMR) Buffer Empty Interrupt Mask */ -#define US_IMR_RXBUFF (0x1 << 12) /**< \brief (US_IMR) Buffer Full Interrupt Mask */ -#define US_IMR_NACK (0x1 << 13) /**< \brief (US_IMR) Non Acknowledge Interrupt Mask */ -#define US_IMR_CTSIC (0x1 << 19) /**< \brief (US_IMR) Clear to Send Input Change Interrupt Mask */ -#define US_IMR_MANE (0x1 << 24) /**< \brief (US_IMR) Manchester Error Interrupt Mask */ -/* -------- US_CSR : (USART Offset: 0x0014) Channel Status Register -------- */ -#define US_CSR_RXRDY (0x1 << 0) /**< \brief (US_CSR) Receiver Ready */ -#define US_CSR_TXRDY (0x1 << 1) /**< \brief (US_CSR) Transmitter Ready */ -#define US_CSR_RXBRK (0x1 << 2) /**< \brief (US_CSR) Break Received/End of Break */ -#define US_CSR_ENDRX (0x1 << 3) /**< \brief (US_CSR) End of Receiver Transfer */ -#define US_CSR_ENDTX (0x1 << 4) /**< \brief (US_CSR) End of Transmitter Transfer */ -#define US_CSR_OVRE (0x1 << 5) /**< \brief (US_CSR) Overrun Error */ -#define US_CSR_FRAME (0x1 << 6) /**< \brief (US_CSR) Framing Error */ -#define US_CSR_PARE (0x1 << 7) /**< \brief (US_CSR) Parity Error */ -#define US_CSR_TIMEOUT (0x1 << 8) /**< \brief (US_CSR) Receiver Time-out */ -#define US_CSR_TXEMPTY (0x1 << 9) /**< \brief (US_CSR) Transmitter Empty */ -#define US_CSR_ITER__UNRE (0x1 << 10) /**< \brief (US_CSR) Max number of Repetitions Reached or SPI Underrun Error */ -#define US_CSR_TXBUFE (0x1 << 11) /**< \brief (US_CSR) Transmission Buffer Empty */ -#define US_CSR_RXBUFF (0x1 << 12) /**< \brief (US_CSR) Reception Buffer Full */ -#define US_CSR_NACK (0x1 << 13) /**< \brief (US_CSR) */ -#define US_CSR_CTSIC (0x1 << 19) /**< \brief (US_CSR) Clear to Send Input Change Flag */ -#define US_CSR_CTS (0x1 << 23) /**< \brief (US_CSR) Image of CTS Input */ -#define US_CSR_MANERR (0x1 << 24) /**< \brief (US_CSR) Manchester Error */ -/* -------- US_RHR : (USART Offset: 0x0018) Receiver Holding Register -------- */ -#define US_RHR_RXCHR (0x1ff << 0) /**< \brief (US_RHR) Received Character */ -#define US_RHR_RXSYNH (0x1 << 15) /**< \brief (US_RHR) Received Sync */ -/* -------- US_THR : (USART Offset: 0x001C) Transmitter Holding Register -------- */ -#define US_THR_TXCHR (0x1ff << 0) /**< \brief (US_THR) Character to be Transmitted */ -#define US_THR_TXSYNH (0x1 << 15) /**< \brief (US_THR) Sync Field to be transmitted */ -/* -------- US_BRGR : (USART Offset: 0x0020) Baud Rate Generator Register -------- */ -#define US_BRGR_CD (0xffff << 0) /**< \brief (US_BRGR) Clock Divider */ -#define US_BRGR_FP (0x7 << 16) /**< \brief (US_BRGR) Fractional Part */ -/* -------- US_RTOR : (USART Offset: 0x0024) Receiver Time-out Register -------- */ -#define US_RTOR_TO (0xffff << 0) /**< \brief (US_RTOR) Time-out Value */ -/* -------- US_TTGR : (USART Offset: 0x0028) Transmitter Timeguard Register -------- */ -#define US_TTGR_TG (0xff << 0) /**< \brief (US_TTGR) Timeguard Value */ -/* -------- US_FIDI : (USART Offset: 0x0040) FI DI Ratio Register -------- */ -#define US_FIDI_FI_DI_RATIO (0x7ff << 0) /**< \brief (US_FIDI) FI Over DI Ratio Value */ -/* -------- US_NER : (USART Offset: 0x0044) Number of Errors Register -------- */ -#define US_NER_NB_ERRORS (0xff << 0) /**< \brief (US_NER) Number of Errors */ -/* -------- US_IF : (USART Offset: 0x004C) IrDA Filter Register -------- */ -#define US_IF_IRDA_FILTER (0xff << 0) /**< \brief (US_IF) IrDA Filter */ -/* -------- US_MAN : (USART Offset: 0x0050) Manchester Encoder Decoder Register -------- */ -#define US_MAN_TX_PL (0xf << 0) /**< \brief (US_MAN) Transmitter Preamble Length */ -#define US_MAN_TX_PP (0x3 << 8) /**< \brief (US_MAN) Transmitter Preamble Pattern */ -#define US_MAN_TX_MPOL (0x1 << 12) /**< \brief (US_MAN) Transmitter Manchester Polarity */ -#define US_MAN_RX_PL (0xf << 16) /**< \brief (US_MAN) Receiver Preamble Length */ -#define US_MAN_RX_PP (0x3 << 24) /**< \brief (US_MAN) Receiver Preamble Pattern detected */ -#define US_MAN_RX_MPOL (0x1 << 28) /**< \brief (US_MAN) Receiver Manchester Polarity */ -#define US_MAN_STUCKTO1 (0x1 << 29) /**< \brief (US_MAN) */ -#define US_MAN_DRIFT (0x1 << 30) /**< \brief (US_MAN) Drift compensation */ -/* -------- US_WPMR : (USART Offset: 0xE4) Write Protect Mode Register -------- */ -#define US_WPMR_WPEN (0x1 << 0) /**< \brief (US_WPMR) Write Protect Enable */ -#define US_WPMR_WPKEY (0xffffff << 8) /**< \brief (US_WPMR) Write Protect KEY */ -/* -------- US_WPSR : (USART Offset: 0xE8) Write Protect Status Register -------- */ -#define US_WPSR_WPVS (0x1 << 0) /**< \brief (US_WPSR) Write Protect Violation Status */ -#define US_WPSR_WPVSRC (0xffff << 8) /**< \brief (US_WPSR) Write Protect Violation Source */ -/* -------- US_VERSION : (USART Offset: 0xFC) Version Register -------- */ -#define US_VERSION_VERSION (0xfff << 0) /**< \brief (US_VERSION) */ -#define US_VERSION_MFN (0x7 << 16) /**< \brief (US_VERSION) */ -/* -------- US_RPR : (USART Offset: 0x100) Receive Pointer Register -------- */ -#define US_RPR_RXPTR (0xffffffff << 0) /**< \brief (US_RPR) Receive Pointer Register */ -/* -------- US_RCR : (USART Offset: 0x104) Receive Counter Register -------- */ -#define US_RCR_RXCTR (0xffff << 0) /**< \brief (US_RCR) Receive Counter Register */ -/* -------- US_TPR : (USART Offset: 0x108) Transmit Pointer Register -------- */ -#define US_TPR_TXPTR (0xffffffff << 0) /**< \brief (US_TPR) Transmit Counter Register */ -/* -------- US_TCR : (USART Offset: 0x10C) Transmit Counter Register -------- */ -#define US_TCR_TXCTR (0xffff << 0) /**< \brief (US_TCR) Transmit Counter Register */ -/* -------- US_RNPR : (USART Offset: 0x110) Receive Next Pointer Register -------- */ -#define US_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (US_RNPR) Receive Next Pointer */ -/* -------- US_RNCR : (USART Offset: 0x114) Receive Next Counter Register -------- */ -#define US_RNCR_RXNCTR (0xffff << 0) /**< \brief (US_RNCR) Receive Next Counter */ -/* -------- US_TNPR : (USART Offset: 0x118) Transmit Next Pointer Register -------- */ -#define US_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (US_TNPR) Transmit Next Pointer */ -/* -------- US_TNCR : (USART Offset: 0x11C) Transmit Next Counter Register -------- */ -#define US_TNCR_TXNCTR (0xffff << 0) /**< \brief (US_TNCR) Transmit Counter Next */ -/* -------- US_PTCR : (USART Offset: 0x120) Transfer Control Register -------- */ -#define US_PTCR_RXTEN (0x1 << 0) /**< \brief (US_PTCR) Receiver Transfer Enable */ -#define US_PTCR_RXTDIS (0x1 << 1) /**< \brief (US_PTCR) Receiver Transfer Disable */ -#define US_PTCR_TXTEN (0x1 << 8) /**< \brief (US_PTCR) Transmitter Transfer Enable */ -#define US_PTCR_TXTDIS (0x1 << 9) /**< \brief (US_PTCR) Transmitter Transfer Disable */ -/* -------- US_PTSR : (USART Offset: 0x124) Transfer Status Register -------- */ -#define US_PTSR_RXTEN (0x1 << 0) /**< \brief (US_PTSR) Receiver Transfer Enable */ -#define US_PTSR_TXTEN (0x1 << 8) /**< \brief (US_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Watchdog Timer */ -/* ============================================================================= */ -/** \addtogroup AT91SAM3U_WDT Watchdog Timer */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Wdt hardware registers */ -typedef struct { - WoReg WDT_CR; /**< \brief (Wdt Offset: 0x00) Control Register */ - RwReg WDT_MR; /**< \brief (Wdt Offset: 0x04) Mode Register */ - RoReg WDT_SR; /**< \brief (Wdt Offset: 0x08) Status Register */ -} Wdt; -#endif /* __ASSEMBLY__ */ -/* -------- WDT_CR : (WDT Offset: 0x00) Control Register -------- */ -#define WDT_CR_WDRSTT (0x1 << 0) /**< \brief (WDT_CR) Watchdog Restart */ -#define WDT_CR_KEY (0xff << 24) /**< \brief (WDT_CR) Password */ -/* -------- WDT_MR : (WDT Offset: 0x04) Mode Register -------- */ -#define WDT_MR_WDV (0xfff << 0) /**< \brief (WDT_MR) Watchdog Counter Value */ -#define WDT_MR_WDFIEN (0x1 << 12) /**< \brief (WDT_MR) Watchdog Fault Interrupt Enable */ -#define WDT_MR_WDRSTEN (0x1 << 13) /**< \brief (WDT_MR) Watchdog Reset Enable */ -#define WDT_MR_WDRPROC (0x1 << 14) /**< \brief (WDT_MR) Watchdog Reset Processor */ -#define WDT_MR_WDDIS (0x1 << 15) /**< \brief (WDT_MR) Watchdog Disable */ -#define WDT_MR_WDD (0xfff << 16) /**< \brief (WDT_MR) Watchdog Delta Value */ -#define WDT_MR_WDDBGHLT (0x1 << 28) /**< \brief (WDT_MR) Watchdog Debug Halt */ -#define WDT_MR_WDIDLEHLT (0x1 << 29) /**< \brief (WDT_MR) Watchdog Idle Halt */ -/* -------- WDT_SR : (WDT Offset: 0x08) Status Register -------- */ -#define WDT_SR_WDUNF (0x1 << 0) /**< \brief (WDT_SR) Watchdog Underflow */ -#define WDT_SR_WDERR (0x1 << 1) /**< \brief (WDT_SR) Watchdog Error */ - -/*@}*/ - -/*@}*/ - -/* ***************************************************************************** */ -/* REGISTER ACCESS DEFINITIONS FOR AT91SAM3U */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3U_reg Registers Access Definitions */ -/*@{*/ - -/* ========== Register definition for HSMCI peripheral ========== */ -#define REG_HSMCI_CR REG_ACCESS(WoReg, 0x40000000U) /**< \brief (HSMCI) Control Register */ -#define REG_HSMCI_MR REG_ACCESS(RwReg, 0x40000004U) /**< \brief (HSMCI) Mode Register */ -#define REG_HSMCI_DTOR REG_ACCESS(RwReg, 0x40000008U) /**< \brief (HSMCI) Data Timeout Register */ -#define REG_HSMCI_SDCR REG_ACCESS(RwReg, 0x4000000CU) /**< \brief (HSMCI) SD/SDIO Card Register */ -#define REG_HSMCI_ARGR REG_ACCESS(RwReg, 0x40000010U) /**< \brief (HSMCI) Argument Register */ -#define REG_HSMCI_CMDR REG_ACCESS(WoReg, 0x40000014U) /**< \brief (HSMCI) Command Register */ -#define REG_HSMCI_BLKR REG_ACCESS(RwReg, 0x40000018U) /**< \brief (HSMCI) Block Register */ -#define REG_HSMCI_CSTOR REG_ACCESS(RwReg, 0x4000001CU) /**< \brief (HSMCI) Completion Signal Timeout Register */ -#define REG_HSMCI_RSPR REG_ACCESS(RoReg, 0x40000020U) /**< \brief (HSMCI) Response Register */ -#define REG_HSMCI_RDR REG_ACCESS(RoReg, 0x40000030U) /**< \brief (HSMCI) Receive Data Register */ -#define REG_HSMCI_TDR REG_ACCESS(WoReg, 0x40000034U) /**< \brief (HSMCI) Transmit Data Register */ -#define REG_HSMCI_SR REG_ACCESS(RoReg, 0x40000040U) /**< \brief (HSMCI) Status Register */ -#define REG_HSMCI_IER REG_ACCESS(WoReg, 0x40000044U) /**< \brief (HSMCI) Interrupt Enable Register */ -#define REG_HSMCI_IDR REG_ACCESS(WoReg, 0x40000048U) /**< \brief (HSMCI) Interrupt Disable Register */ -#define REG_HSMCI_IMR REG_ACCESS(RoReg, 0x4000004CU) /**< \brief (HSMCI) Interrupt Mask Register */ -#define REG_HSMCI_DMA REG_ACCESS(RwReg, 0x40000050U) /**< \brief (HSMCI) DMA Configuration Register */ -#define REG_HSMCI_CFG REG_ACCESS(RwReg, 0x40000054U) /**< \brief (HSMCI) Configuration Register */ -#define REG_HSMCI_WPMR REG_ACCESS(RwReg, 0x400000E4U) /**< \brief (HSMCI) Write Protection Mode Register */ -#define REG_HSMCI_WPSR REG_ACCESS(RoReg, 0x400000E8U) /**< \brief (HSMCI) Write Protection Status Register */ -/* ========== Register definition for SSC peripheral ========== */ -#define REG_SSC_CR REG_ACCESS(WoReg, 0x40004000U) /**< \brief (SSC) Control Register */ -#define REG_SSC_CMR REG_ACCESS(RwReg, 0x40004004U) /**< \brief (SSC) Clock Mode Register */ -#define REG_SSC_RCMR REG_ACCESS(RwReg, 0x40004010U) /**< \brief (SSC) Receive Clock Mode Register */ -#define REG_SSC_RFMR REG_ACCESS(RwReg, 0x40004014U) /**< \brief (SSC) Receive Frame Mode Register */ -#define REG_SSC_TCMR REG_ACCESS(RwReg, 0x40004018U) /**< \brief (SSC) Transmit Clock Mode Register */ -#define REG_SSC_TFMR REG_ACCESS(RwReg, 0x4000401CU) /**< \brief (SSC) Transmit Frame Mode Register */ -#define REG_SSC_RHR REG_ACCESS(RoReg, 0x40004020U) /**< \brief (SSC) Receive Holding Register */ -#define REG_SSC_THR REG_ACCESS(WoReg, 0x40004024U) /**< \brief (SSC) Transmit Holding Register */ -#define REG_SSC_RSHR REG_ACCESS(RoReg, 0x40004030U) /**< \brief (SSC) Receive Sync. Holding Register */ -#define REG_SSC_TSHR REG_ACCESS(RwReg, 0x40004034U) /**< \brief (SSC) Transmit Sync. Holding Register */ -#define REG_SSC_RC0R REG_ACCESS(RwReg, 0x40004038U) /**< \brief (SSC) Receive Compare 0 Register */ -#define REG_SSC_RC1R REG_ACCESS(RwReg, 0x4000403CU) /**< \brief (SSC) Receive Compare 1 Register */ -#define REG_SSC_SR REG_ACCESS(RoReg, 0x40004040U) /**< \brief (SSC) Status Register */ -#define REG_SSC_IER REG_ACCESS(WoReg, 0x40004044U) /**< \brief (SSC) Interrupt Enable Register */ -#define REG_SSC_IDR REG_ACCESS(WoReg, 0x40004048U) /**< \brief (SSC) Interrupt Disable Register */ -#define REG_SSC_IMR REG_ACCESS(RoReg, 0x4000404CU) /**< \brief (SSC) Interrupt Mask Register */ -#define REG_SSC_WPMR REG_ACCESS(RwReg, 0x400040E4U) /**< \brief (SSC) Write Protect Mode Register */ -#define REG_SSC_WPSR REG_ACCESS(RoReg, 0x400040E8U) /**< \brief (SSC) Write Protect Status Register */ -/* ========== Register definition for SPI peripheral ========== */ -#define REG_SPI_CR REG_ACCESS(WoReg, 0x40008000U) /**< \brief (SPI) Control Register */ -#define REG_SPI_MR REG_ACCESS(RwReg, 0x40008004U) /**< \brief (SPI) Mode Register */ -#define REG_SPI_RDR REG_ACCESS(RoReg, 0x40008008U) /**< \brief (SPI) Receive Data Register */ -#define REG_SPI_TDR REG_ACCESS(WoReg, 0x4000800CU) /**< \brief (SPI) Transmit Data Register */ -#define REG_SPI_SR REG_ACCESS(RoReg, 0x40008010U) /**< \brief (SPI) Status Register */ -#define REG_SPI_IER REG_ACCESS(WoReg, 0x40008014U) /**< \brief (SPI) Interrupt Enable Register */ -#define REG_SPI_IDR REG_ACCESS(WoReg, 0x40008018U) /**< \brief (SPI) Interrupt Disable Register */ -#define REG_SPI_IMR REG_ACCESS(RoReg, 0x4000801CU) /**< \brief (SPI) Interrupt Mask Register */ -#define REG_SPI_CSR REG_ACCESS(RwReg, 0x40008030U) /**< \brief (SPI) Chip Select Register */ -#define REG_SPI_WPCR REG_ACCESS(RwReg, 0x400080E4U) /**< \brief (SPI) Write Protection Control Register */ -#define REG_SPI_WPSR REG_ACCESS(RoReg, 0x400080E8U) /**< \brief (SPI) Write Protection Status Register */ -/* ========== Register definition for TC0 peripheral ========== */ -#define REG_TC0_CCR0 REG_ACCESS(WoReg, 0x40080000U) /**< \brief (TC0) Channel Control Register (channel = 0) */ -#define REG_TC0_CMR0 REG_ACCESS(RwReg, 0x40080004U) /**< \brief (TC0) Channel Mode Register (channel = 0) */ -#define REG_TC0_CV0 REG_ACCESS(RoReg, 0x40080010U) /**< \brief (TC0) Counter Value (channel = 0) */ -#define REG_TC0_RA0 REG_ACCESS(RwReg, 0x40080014U) /**< \brief (TC0) Register A (channel = 0) */ -#define REG_TC0_RB0 REG_ACCESS(RwReg, 0x40080018U) /**< \brief (TC0) Register B (channel = 0) */ -#define REG_TC0_RC0 REG_ACCESS(RwReg, 0x4008001CU) /**< \brief (TC0) Register C (channel = 0) */ -#define REG_TC0_SR0 REG_ACCESS(RoReg, 0x40080020U) /**< \brief (TC0) Status Register (channel = 0) */ -#define REG_TC0_IER0 REG_ACCESS(WoReg, 0x40080024U) /**< \brief (TC0) Interrupt Enable Register (channel = 0) */ -#define REG_TC0_IDR0 REG_ACCESS(WoReg, 0x40080028U) /**< \brief (TC0) Interrupt Disable Register (channel = 0) */ -#define REG_TC0_IMR0 REG_ACCESS(RoReg, 0x4008002CU) /**< \brief (TC0) Interrupt Mask Register (channel = 0) */ -#define REG_TC0_CCR1 REG_ACCESS(WoReg, 0x40080040U) /**< \brief (TC0) Channel Control Register (channel = 1) */ -#define REG_TC0_CMR1 REG_ACCESS(RwReg, 0x40080044U) /**< \brief (TC0) Channel Mode Register (channel = 1) */ -#define REG_TC0_CV1 REG_ACCESS(RoReg, 0x40080050U) /**< \brief (TC0) Counter Value (channel = 1) */ -#define REG_TC0_RA1 REG_ACCESS(RwReg, 0x40080054U) /**< \brief (TC0) Register A (channel = 1) */ -#define REG_TC0_RB1 REG_ACCESS(RwReg, 0x40080058U) /**< \brief (TC0) Register B (channel = 1) */ -#define REG_TC0_RC1 REG_ACCESS(RwReg, 0x4008005CU) /**< \brief (TC0) Register C (channel = 1) */ -#define REG_TC0_SR1 REG_ACCESS(RoReg, 0x40080060U) /**< \brief (TC0) Status Register (channel = 1) */ -#define REG_TC0_IER1 REG_ACCESS(WoReg, 0x40080064U) /**< \brief (TC0) Interrupt Enable Register (channel = 1) */ -#define REG_TC0_IDR1 REG_ACCESS(WoReg, 0x40080068U) /**< \brief (TC0) Interrupt Disable Register (channel = 1) */ -#define REG_TC0_IMR1 REG_ACCESS(RoReg, 0x4008006CU) /**< \brief (TC0) Interrupt Mask Register (channel = 1) */ -#define REG_TC0_CCR2 REG_ACCESS(WoReg, 0x40080080U) /**< \brief (TC0) Channel Control Register (channel = 2) */ -#define REG_TC0_CMR2 REG_ACCESS(RwReg, 0x40080084U) /**< \brief (TC0) Channel Mode Register (channel = 2) */ -#define REG_TC0_CV2 REG_ACCESS(RoReg, 0x40080090U) /**< \brief (TC0) Counter Value (channel = 2) */ -#define REG_TC0_RA2 REG_ACCESS(RwReg, 0x40080094U) /**< \brief (TC0) Register A (channel = 2) */ -#define REG_TC0_RB2 REG_ACCESS(RwReg, 0x40080098U) /**< \brief (TC0) Register B (channel = 2) */ -#define REG_TC0_RC2 REG_ACCESS(RwReg, 0x4008009CU) /**< \brief (TC0) Register C (channel = 2) */ -#define REG_TC0_SR2 REG_ACCESS(RoReg, 0x400800A0U) /**< \brief (TC0) Status Register (channel = 2) */ -#define REG_TC0_IER2 REG_ACCESS(WoReg, 0x400800A4U) /**< \brief (TC0) Interrupt Enable Register (channel = 2) */ -#define REG_TC0_IDR2 REG_ACCESS(WoReg, 0x400800A8U) /**< \brief (TC0) Interrupt Disable Register (channel = 2) */ -#define REG_TC0_IMR2 REG_ACCESS(RoReg, 0x400800ACU) /**< \brief (TC0) Interrupt Mask Register (channel = 2) */ -#define REG_TC0_BCR REG_ACCESS(WoReg, 0x400800C0U) /**< \brief (TC0) Block Control Register */ -#define REG_TC0_BMR REG_ACCESS(RwReg, 0x400800C4U) /**< \brief (TC0) Block Mode Register */ -#define REG_TC0_QIER REG_ACCESS(WoReg, 0x400800C8U) /**< \brief (TC0) QDEC Interrupt Enable Register */ -#define REG_TC0_QIDR REG_ACCESS(WoReg, 0x400800CCU) /**< \brief (TC0) QDEC Interrupt Disable Register */ -#define REG_TC0_QIMR REG_ACCESS(RoReg, 0x400800D0U) /**< \brief (TC0) QDEC Interrupt Mask Register */ -#define REG_TC0_QISR REG_ACCESS(RoReg, 0x400800D4U) /**< \brief (TC0) QDEC Interrupt Status Register */ -#define REG_TC0_VER REG_ACCESS(RoReg, 0x400800FCU) /**< \brief (TC0) Version Register */ -/* ========== Register definition for TWI0 peripheral ========== */ -#define REG_TWI0_CR REG_ACCESS(WoReg, 0x40084000U) /**< \brief (TWI0) Control Register */ -#define REG_TWI0_MMR REG_ACCESS(RwReg, 0x40084004U) /**< \brief (TWI0) Master Mode Register */ -#define REG_TWI0_SMR REG_ACCESS(RwReg, 0x40084008U) /**< \brief (TWI0) Slave Mode Register */ -#define REG_TWI0_IADR REG_ACCESS(RwReg, 0x4008400CU) /**< \brief (TWI0) Internal Address Register */ -#define REG_TWI0_CWGR REG_ACCESS(RwReg, 0x40084010U) /**< \brief (TWI0) Clock Waveform Generator Register */ -#define REG_TWI0_SR REG_ACCESS(RoReg, 0x40084020U) /**< \brief (TWI0) Status Register */ -#define REG_TWI0_IER REG_ACCESS(WoReg, 0x40084024U) /**< \brief (TWI0) Interrupt Enable Register */ -#define REG_TWI0_IDR REG_ACCESS(WoReg, 0x40084028U) /**< \brief (TWI0) Interrupt Disable Register */ -#define REG_TWI0_IMR REG_ACCESS(RoReg, 0x4008402CU) /**< \brief (TWI0) Interrupt Mask Register */ -#define REG_TWI0_RHR REG_ACCESS(RoReg, 0x40084030U) /**< \brief (TWI0) Receive Holding Register */ -#define REG_TWI0_THR REG_ACCESS(WoReg, 0x40084034U) /**< \brief (TWI0) Transmit Holding Register */ -#define REG_TWI0_RPR REG_ACCESS(RwReg, 0x40084100U) /**< \brief (TWI0) Receive Pointer Register */ -#define REG_TWI0_RCR REG_ACCESS(RwReg, 0x40084104U) /**< \brief (TWI0) Receive Counter Register */ -#define REG_TWI0_TPR REG_ACCESS(RwReg, 0x40084108U) /**< \brief (TWI0) Transmit Pointer Register */ -#define REG_TWI0_TCR REG_ACCESS(RwReg, 0x4008410CU) /**< \brief (TWI0) Transmit Counter Register */ -#define REG_TWI0_RNPR REG_ACCESS(RwReg, 0x40084110U) /**< \brief (TWI0) Receive Next Pointer Register */ -#define REG_TWI0_RNCR REG_ACCESS(RwReg, 0x40084114U) /**< \brief (TWI0) Receive Next Counter Register */ -#define REG_TWI0_TNPR REG_ACCESS(RwReg, 0x40084118U) /**< \brief (TWI0) Transmit Next Pointer Register */ -#define REG_TWI0_TNCR REG_ACCESS(RwReg, 0x4008411CU) /**< \brief (TWI0) Transmit Next Counter Register */ -#define REG_TWI0_PTCR REG_ACCESS(WoReg, 0x40084120U) /**< \brief (TWI0) Transfer Control Register */ -#define REG_TWI0_PTSR REG_ACCESS(RoReg, 0x40084124U) /**< \brief (TWI0) Transfer Status Register */ -/* ========== Register definition for TWI1 peripheral ========== */ -#define REG_TWI1_CR REG_ACCESS(WoReg, 0x40088000U) /**< \brief (TWI1) Control Register */ -#define REG_TWI1_MMR REG_ACCESS(RwReg, 0x40088004U) /**< \brief (TWI1) Master Mode Register */ -#define REG_TWI1_SMR REG_ACCESS(RwReg, 0x40088008U) /**< \brief (TWI1) Slave Mode Register */ -#define REG_TWI1_IADR REG_ACCESS(RwReg, 0x4008800CU) /**< \brief (TWI1) Internal Address Register */ -#define REG_TWI1_CWGR REG_ACCESS(RwReg, 0x40088010U) /**< \brief (TWI1) Clock Waveform Generator Register */ -#define REG_TWI1_SR REG_ACCESS(RoReg, 0x40088020U) /**< \brief (TWI1) Status Register */ -#define REG_TWI1_IER REG_ACCESS(WoReg, 0x40088024U) /**< \brief (TWI1) Interrupt Enable Register */ -#define REG_TWI1_IDR REG_ACCESS(WoReg, 0x40088028U) /**< \brief (TWI1) Interrupt Disable Register */ -#define REG_TWI1_IMR REG_ACCESS(RoReg, 0x4008802CU) /**< \brief (TWI1) Interrupt Mask Register */ -#define REG_TWI1_RHR REG_ACCESS(RoReg, 0x40088030U) /**< \brief (TWI1) Receive Holding Register */ -#define REG_TWI1_THR REG_ACCESS(WoReg, 0x40088034U) /**< \brief (TWI1) Transmit Holding Register */ -#define REG_TWI1_RPR REG_ACCESS(RwReg, 0x40088100U) /**< \brief (TWI1) Receive Pointer Register */ -#define REG_TWI1_RCR REG_ACCESS(RwReg, 0x40088104U) /**< \brief (TWI1) Receive Counter Register */ -#define REG_TWI1_TPR REG_ACCESS(RwReg, 0x40088108U) /**< \brief (TWI1) Transmit Pointer Register */ -#define REG_TWI1_TCR REG_ACCESS(RwReg, 0x4008810CU) /**< \brief (TWI1) Transmit Counter Register */ -#define REG_TWI1_RNPR REG_ACCESS(RwReg, 0x40088110U) /**< \brief (TWI1) Receive Next Pointer Register */ -#define REG_TWI1_RNCR REG_ACCESS(RwReg, 0x40088114U) /**< \brief (TWI1) Receive Next Counter Register */ -#define REG_TWI1_TNPR REG_ACCESS(RwReg, 0x40088118U) /**< \brief (TWI1) Transmit Next Pointer Register */ -#define REG_TWI1_TNCR REG_ACCESS(RwReg, 0x4008811CU) /**< \brief (TWI1) Transmit Next Counter Register */ -#define REG_TWI1_PTCR REG_ACCESS(WoReg, 0x40088120U) /**< \brief (TWI1) Transfer Control Register */ -#define REG_TWI1_PTSR REG_ACCESS(RoReg, 0x40088124U) /**< \brief (TWI1) Transfer Status Register */ -/* ========== Register definition for PWM peripheral ========== */ -#define REG_PWM_CLK REG_ACCESS(RwReg, 0x4008C000U) /**< \brief (PWM) PWM Clock Register */ -#define REG_PWM_ENA REG_ACCESS(WoReg, 0x4008C004U) /**< \brief (PWM) PWM Enable Register */ -#define REG_PWM_DIS REG_ACCESS(WoReg, 0x4008C008U) /**< \brief (PWM) PWM Disable Register */ -#define REG_PWM_SR REG_ACCESS(RoReg, 0x4008C00CU) /**< \brief (PWM) PWM Status Register */ -#define REG_PWM_IER1 REG_ACCESS(WoReg, 0x4008C010U) /**< \brief (PWM) PWM Interrupt Enable Register 1 */ -#define REG_PWM_IDR1 REG_ACCESS(WoReg, 0x4008C014U) /**< \brief (PWM) PWM Interrupt Disable Register 1 */ -#define REG_PWM_IMR1 REG_ACCESS(RoReg, 0x4008C018U) /**< \brief (PWM) PWM Interrupt Mask Register 1 */ -#define REG_PWM_ISR1 REG_ACCESS(RoReg, 0x4008C01CU) /**< \brief (PWM) PWM Interrupt Status Register 1 */ -#define REG_PWM_SCM REG_ACCESS(RwReg, 0x4008C020U) /**< \brief (PWM) PWM Sync Channels Mode Register */ -#define REG_PWM_SCUC REG_ACCESS(RwReg, 0x4008C028U) /**< \brief (PWM) PWM Sync Channels Update Control Register */ -#define REG_PWM_SCUP REG_ACCESS(RwReg, 0x4008C02CU) /**< \brief (PWM) PWM Sync Channels Update Period Register */ -#define REG_PWM_SCUPUPD REG_ACCESS(WoReg, 0x4008C030U) /**< \brief (PWM) PWM Sync Channels Update Period Update Register */ -#define REG_PWM_IER2 REG_ACCESS(WoReg, 0x4008C034U) /**< \brief (PWM) PWM Interrupt Enable Register 2 */ -#define REG_PWM_IDR2 REG_ACCESS(WoReg, 0x4008C038U) /**< \brief (PWM) PWM Interrupt Disable Register 2 */ -#define REG_PWM_IMR2 REG_ACCESS(RoReg, 0x4008C03CU) /**< \brief (PWM) PWM Interrupt Mask Register 2 */ -#define REG_PWM_ISR2 REG_ACCESS(RoReg, 0x4008C040U) /**< \brief (PWM) PWM Interrupt Status Register 2 */ -#define REG_PWM_OOV REG_ACCESS(RwReg, 0x4008C044U) /**< \brief (PWM) PWM Output Override Value Register */ -#define REG_PWM_OS REG_ACCESS(RwReg, 0x4008C048U) /**< \brief (PWM) PWM Output Selection Register */ -#define REG_PWM_OSS REG_ACCESS(WoReg, 0x4008C04CU) /**< \brief (PWM) PWM Output Selection Set Register */ -#define REG_PWM_OSC REG_ACCESS(WoReg, 0x4008C050U) /**< \brief (PWM) PWM Output Selection Clear Register */ -#define REG_PWM_OSSUPD REG_ACCESS(WoReg, 0x4008C054U) /**< \brief (PWM) PWM Output Selection Set Update Register */ -#define REG_PWM_OSCUPD REG_ACCESS(WoReg, 0x4008C058U) /**< \brief (PWM) PWM Output Selection Clear Update Register */ -#define REG_PWM_FMR REG_ACCESS(RwReg, 0x4008C05CU) /**< \brief (PWM) PWM Fault Mode Register */ -#define REG_PWM_FSR REG_ACCESS(RoReg, 0x4008C060U) /**< \brief (PWM) PWM Fault Status Register */ -#define REG_PWM_FCR REG_ACCESS(WoReg, 0x4008C064U) /**< \brief (PWM) PWM Fault Clear Register */ -#define REG_PWM_FPV REG_ACCESS(RwReg, 0x4008C068U) /**< \brief (PWM) PWM Fault Protection Value Register */ -#define REG_PWM_FPE REG_ACCESS(RwReg, 0x4008C06CU) /**< \brief (PWM) PWM Fault Protection Enable Register */ -#define REG_PWM_ELxMR REG_ACCESS(RwReg, 0x4008C07CU) /**< \brief (PWM) PWM Event Line 0 Mode Register */ -#define REG_PWM_WPCR REG_ACCESS(WoReg, 0x4008C0E4U) /**< \brief (PWM) PWM Write Protect Control Register */ -#define REG_PWM_WPSR REG_ACCESS(RoReg, 0x4008C0E8U) /**< \brief (PWM) PWM Write Protect Status Register */ -#define REG_PWM_RPR REG_ACCESS(RwReg, 0x4008C100U) /**< \brief (PWM) Receive Pointer Register */ -#define REG_PWM_RCR REG_ACCESS(RwReg, 0x4008C104U) /**< \brief (PWM) Receive Counter Register */ -#define REG_PWM_TPR REG_ACCESS(RwReg, 0x4008C108U) /**< \brief (PWM) Transmit Pointer Register */ -#define REG_PWM_TCR REG_ACCESS(RwReg, 0x4008C10CU) /**< \brief (PWM) Transmit Counter Register */ -#define REG_PWM_RNPR REG_ACCESS(RwReg, 0x4008C110U) /**< \brief (PWM) Receive Next Pointer Register */ -#define REG_PWM_RNCR REG_ACCESS(RwReg, 0x4008C114U) /**< \brief (PWM) Receive Next Counter Register */ -#define REG_PWM_TNPR REG_ACCESS(RwReg, 0x4008C118U) /**< \brief (PWM) Transmit Next Pointer Register */ -#define REG_PWM_TNCR REG_ACCESS(RwReg, 0x4008C11CU) /**< \brief (PWM) Transmit Next Counter Register */ -#define REG_PWM_PTCR REG_ACCESS(WoReg, 0x4008C120U) /**< \brief (PWM) Transfer Control Register */ -#define REG_PWM_PTSR REG_ACCESS(RoReg, 0x4008C124U) /**< \brief (PWM) Transfer Status Register */ -#define REG_PWM_CMP0V REG_ACCESS(RwReg, 0x4008C130U) /**< \brief (PWM) PWM Comparison 0 Value Register */ -#define REG_PWM_CMP0VUPD REG_ACCESS(WoReg, 0x4008C134U) /**< \brief (PWM) PWM Comparison 0 Value Update Register */ -#define REG_PWM_CMP0M REG_ACCESS(RwReg, 0x4008C138U) /**< \brief (PWM) PWM Comparison 0 Mode Register */ -#define REG_PWM_CMP0MUPD REG_ACCESS(WoReg, 0x4008C13CU) /**< \brief (PWM) PWM Comparison 0 Mode Update Register */ -#define REG_PWM_CMP1V REG_ACCESS(RwReg, 0x4008C140U) /**< \brief (PWM) PWM Comparison 1 Value Register */ -#define REG_PWM_CMP1VUPD REG_ACCESS(WoReg, 0x4008C144U) /**< \brief (PWM) PWM Comparison 1 Value Update Register */ -#define REG_PWM_CMP1M REG_ACCESS(RwReg, 0x4008C148U) /**< \brief (PWM) PWM Comparison 1 Mode Register */ -#define REG_PWM_CMP1MUPD REG_ACCESS(WoReg, 0x4008C14CU) /**< \brief (PWM) PWM Comparison 1 Mode Update Register */ -#define REG_PWM_CMP2V REG_ACCESS(RwReg, 0x4008C150U) /**< \brief (PWM) PWM Comparison 2 Value Register */ -#define REG_PWM_CMP2VUPD REG_ACCESS(WoReg, 0x4008C154U) /**< \brief (PWM) PWM Comparison 2 Value Update Register */ -#define REG_PWM_CMP2M REG_ACCESS(RwReg, 0x4008C158U) /**< \brief (PWM) PWM Comparison 2 Mode Register */ -#define REG_PWM_CMP2MUPD REG_ACCESS(WoReg, 0x4008C15CU) /**< \brief (PWM) PWM Comparison 2 Mode Update Register */ -#define REG_PWM_CMP3V REG_ACCESS(RwReg, 0x4008C160U) /**< \brief (PWM) PWM Comparison 3 Value Register */ -#define REG_PWM_CMP3VUPD REG_ACCESS(WoReg, 0x4008C164U) /**< \brief (PWM) PWM Comparison 3 Value Update Register */ -#define REG_PWM_CMP3M REG_ACCESS(RwReg, 0x4008C168U) /**< \brief (PWM) PWM Comparison 3 Mode Register */ -#define REG_PWM_CMP3MUPD REG_ACCESS(WoReg, 0x4008C16CU) /**< \brief (PWM) PWM Comparison 3 Mode Update Register */ -#define REG_PWM_CMP4V REG_ACCESS(RwReg, 0x4008C170U) /**< \brief (PWM) PWM Comparison 4 Value Register */ -#define REG_PWM_CMP4VUPD REG_ACCESS(WoReg, 0x4008C174U) /**< \brief (PWM) PWM Comparison 4 Value Update Register */ -#define REG_PWM_CMP4M REG_ACCESS(RwReg, 0x4008C178U) /**< \brief (PWM) PWM Comparison 4 Mode Register */ -#define REG_PWM_CMP4MUPD REG_ACCESS(WoReg, 0x4008C17CU) /**< \brief (PWM) PWM Comparison 4 Mode Update Register */ -#define REG_PWM_CMP5V REG_ACCESS(RwReg, 0x4008C180U) /**< \brief (PWM) PWM Comparison 5 Value Register */ -#define REG_PWM_CMP5VUPD REG_ACCESS(WoReg, 0x4008C184U) /**< \brief (PWM) PWM Comparison 5 Value Update Register */ -#define REG_PWM_CMP5M REG_ACCESS(RwReg, 0x4008C188U) /**< \brief (PWM) PWM Comparison 5 Mode Register */ -#define REG_PWM_CMP5MUPD REG_ACCESS(WoReg, 0x4008C18CU) /**< \brief (PWM) PWM Comparison 5 Mode Update Register */ -#define REG_PWM_CMP6V REG_ACCESS(RwReg, 0x4008C190U) /**< \brief (PWM) PWM Comparison 6 Value Register */ -#define REG_PWM_CMP6VUPD REG_ACCESS(WoReg, 0x4008C194U) /**< \brief (PWM) PWM Comparison 6 Value Update Register */ -#define REG_PWM_CMP6M REG_ACCESS(RwReg, 0x4008C198U) /**< \brief (PWM) PWM Comparison 6 Mode Register */ -#define REG_PWM_CMP6MUPD REG_ACCESS(WoReg, 0x4008C19CU) /**< \brief (PWM) PWM Comparison 6 Mode Update Register */ -#define REG_PWM_CMP7V REG_ACCESS(RwReg, 0x4008C1A0U) /**< \brief (PWM) PWM Comparison 7 Value Register */ -#define REG_PWM_CMP7VUPD REG_ACCESS(WoReg, 0x4008C1A4U) /**< \brief (PWM) PWM Comparison 7 Value Update Register */ -#define REG_PWM_CMP7M REG_ACCESS(RwReg, 0x4008C1A8U) /**< \brief (PWM) PWM Comparison 7 Mode Register */ -#define REG_PWM_CMP7MUPD REG_ACCESS(WoReg, 0x4008C1ACU) /**< \brief (PWM) PWM Comparison 7 Mode Update Register */ -#define REG_PWM_CMR0 REG_ACCESS(RwReg, 0x4008C200U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 0) */ -#define REG_PWM_CDTY0 REG_ACCESS(RwReg, 0x4008C204U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 0) */ -#define REG_PWM_CDTYUPD0 REG_ACCESS(WoReg, 0x4008C208U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 0) */ -#define REG_PWM_CPRD0 REG_ACCESS(RwReg, 0x4008C20CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 0) */ -#define REG_PWM_CPRDUPD0 REG_ACCESS(WoReg, 0x4008C210U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 0) */ -#define REG_PWM_CCNT0 REG_ACCESS(RoReg, 0x4008C214U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 0) */ -#define REG_PWM_DT0 REG_ACCESS(RwReg, 0x4008C218U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 0) */ -#define REG_PWM_DTUPD0 REG_ACCESS(WoReg, 0x4008C21CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 0) */ -#define REG_PWM_CMR1 REG_ACCESS(RwReg, 0x4008C220U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 1) */ -#define REG_PWM_CDTY1 REG_ACCESS(RwReg, 0x4008C224U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 1) */ -#define REG_PWM_CDTYUPD1 REG_ACCESS(WoReg, 0x4008C228U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 1) */ -#define REG_PWM_CPRD1 REG_ACCESS(RwReg, 0x4008C22CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 1) */ -#define REG_PWM_CPRDUPD1 REG_ACCESS(WoReg, 0x4008C230U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 1) */ -#define REG_PWM_CCNT1 REG_ACCESS(RoReg, 0x4008C234U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 1) */ -#define REG_PWM_DT1 REG_ACCESS(RwReg, 0x4008C238U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 1) */ -#define REG_PWM_DTUPD1 REG_ACCESS(WoReg, 0x4008C23CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 1) */ -#define REG_PWM_CMR2 REG_ACCESS(RwReg, 0x4008C240U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 2) */ -#define REG_PWM_CDTY2 REG_ACCESS(RwReg, 0x4008C244U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 2) */ -#define REG_PWM_CDTYUPD2 REG_ACCESS(WoReg, 0x4008C248U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 2) */ -#define REG_PWM_CPRD2 REG_ACCESS(RwReg, 0x4008C24CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 2) */ -#define REG_PWM_CPRDUPD2 REG_ACCESS(WoReg, 0x4008C250U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 2) */ -#define REG_PWM_CCNT2 REG_ACCESS(RoReg, 0x4008C254U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 2) */ -#define REG_PWM_DT2 REG_ACCESS(RwReg, 0x4008C258U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 2) */ -#define REG_PWM_DTUPD2 REG_ACCESS(WoReg, 0x4008C25CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 2) */ -#define REG_PWM_CMR3 REG_ACCESS(RwReg, 0x4008C260U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 3) */ -#define REG_PWM_CDTY3 REG_ACCESS(RwReg, 0x4008C264U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 3) */ -#define REG_PWM_CDTYUPD3 REG_ACCESS(WoReg, 0x4008C268U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 3) */ -#define REG_PWM_CPRD3 REG_ACCESS(RwReg, 0x4008C26CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 3) */ -#define REG_PWM_CPRDUPD3 REG_ACCESS(WoReg, 0x4008C270U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 3) */ -#define REG_PWM_CCNT3 REG_ACCESS(RoReg, 0x4008C274U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 3) */ -#define REG_PWM_DT3 REG_ACCESS(RwReg, 0x4008C278U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 3) */ -#define REG_PWM_DTUPD3 REG_ACCESS(WoReg, 0x4008C27CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 3) */ -/* ========== Register definition for USART0 peripheral ========== */ -#define REG_USART0_CR REG_ACCESS(WoReg, 0x40090000U) /**< \brief (USART0) Control Register */ -#define REG_USART0_MR REG_ACCESS(RwReg, 0x40090004U) /**< \brief (USART0) Mode Register */ -#define REG_USART0_IER REG_ACCESS(WoReg, 0x40090008U) /**< \brief (USART0) Interrupt Enable Register */ -#define REG_USART0_IDR REG_ACCESS(WoReg, 0x4009000CU) /**< \brief (USART0) Interrupt Disable Register */ -#define REG_USART0_IMR REG_ACCESS(RoReg, 0x40090010U) /**< \brief (USART0) Interrupt Mask Register */ -#define REG_USART0_CSR REG_ACCESS(RoReg, 0x40090014U) /**< \brief (USART0) Channel Status Register */ -#define REG_USART0_RHR REG_ACCESS(RoReg, 0x40090018U) /**< \brief (USART0) Receiver Holding Register */ -#define REG_USART0_THR REG_ACCESS(WoReg, 0x4009001CU) /**< \brief (USART0) Transmitter Holding Register */ -#define REG_USART0_BRGR REG_ACCESS(RwReg, 0x40090020U) /**< \brief (USART0) Baud Rate Generator Register */ -#define REG_USART0_RTOR REG_ACCESS(RwReg, 0x40090024U) /**< \brief (USART0) Receiver Time-out Register */ -#define REG_USART0_TTGR REG_ACCESS(RwReg, 0x40090028U) /**< \brief (USART0) Transmitter Timeguard Register */ -#define REG_USART0_FIDI REG_ACCESS(RwReg, 0x40090040U) /**< \brief (USART0) FI DI Ratio Register */ -#define REG_USART0_NER REG_ACCESS(RoReg, 0x40090044U) /**< \brief (USART0) Number of Errors Register */ -#define REG_USART0_IF REG_ACCESS(RwReg, 0x4009004CU) /**< \brief (USART0) IrDA Filter Register */ -#define REG_USART0_MAN REG_ACCESS(RwReg, 0x40090050U) /**< \brief (USART0) Manchester Encoder Decoder Register */ -#define REG_USART0_WPMR REG_ACCESS(RwReg, 0x400900E4U) /**< \brief (USART0) Write Protect Mode Register */ -#define REG_USART0_WPSR REG_ACCESS(RoReg, 0x400900E8U) /**< \brief (USART0) Write Protect Status Register */ -#define REG_USART0_VERSION REG_ACCESS(RoReg, 0x400900FCU) /**< \brief (USART0) Version Register */ -#define REG_USART0_RPR REG_ACCESS(RwReg, 0x40090100U) /**< \brief (USART0) Receive Pointer Register */ -#define REG_USART0_RCR REG_ACCESS(RwReg, 0x40090104U) /**< \brief (USART0) Receive Counter Register */ -#define REG_USART0_TPR REG_ACCESS(RwReg, 0x40090108U) /**< \brief (USART0) Transmit Pointer Register */ -#define REG_USART0_TCR REG_ACCESS(RwReg, 0x4009010CU) /**< \brief (USART0) Transmit Counter Register */ -#define REG_USART0_RNPR REG_ACCESS(RwReg, 0x40090110U) /**< \brief (USART0) Receive Next Pointer Register */ -#define REG_USART0_RNCR REG_ACCESS(RwReg, 0x40090114U) /**< \brief (USART0) Receive Next Counter Register */ -#define REG_USART0_TNPR REG_ACCESS(RwReg, 0x40090118U) /**< \brief (USART0) Transmit Next Pointer Register */ -#define REG_USART0_TNCR REG_ACCESS(RwReg, 0x4009011CU) /**< \brief (USART0) Transmit Next Counter Register */ -#define REG_USART0_PTCR REG_ACCESS(WoReg, 0x40090120U) /**< \brief (USART0) Transfer Control Register */ -#define REG_USART0_PTSR REG_ACCESS(RoReg, 0x40090124U) /**< \brief (USART0) Transfer Status Register */ -/* ========== Register definition for USART1 peripheral ========== */ -#define REG_USART1_CR REG_ACCESS(WoReg, 0x40094000U) /**< \brief (USART1) Control Register */ -#define REG_USART1_MR REG_ACCESS(RwReg, 0x40094004U) /**< \brief (USART1) Mode Register */ -#define REG_USART1_IER REG_ACCESS(WoReg, 0x40094008U) /**< \brief (USART1) Interrupt Enable Register */ -#define REG_USART1_IDR REG_ACCESS(WoReg, 0x4009400CU) /**< \brief (USART1) Interrupt Disable Register */ -#define REG_USART1_IMR REG_ACCESS(RoReg, 0x40094010U) /**< \brief (USART1) Interrupt Mask Register */ -#define REG_USART1_CSR REG_ACCESS(RoReg, 0x40094014U) /**< \brief (USART1) Channel Status Register */ -#define REG_USART1_RHR REG_ACCESS(RoReg, 0x40094018U) /**< \brief (USART1) Receiver Holding Register */ -#define REG_USART1_THR REG_ACCESS(WoReg, 0x4009401CU) /**< \brief (USART1) Transmitter Holding Register */ -#define REG_USART1_BRGR REG_ACCESS(RwReg, 0x40094020U) /**< \brief (USART1) Baud Rate Generator Register */ -#define REG_USART1_RTOR REG_ACCESS(RwReg, 0x40094024U) /**< \brief (USART1) Receiver Time-out Register */ -#define REG_USART1_TTGR REG_ACCESS(RwReg, 0x40094028U) /**< \brief (USART1) Transmitter Timeguard Register */ -#define REG_USART1_FIDI REG_ACCESS(RwReg, 0x40094040U) /**< \brief (USART1) FI DI Ratio Register */ -#define REG_USART1_NER REG_ACCESS(RoReg, 0x40094044U) /**< \brief (USART1) Number of Errors Register */ -#define REG_USART1_IF REG_ACCESS(RwReg, 0x4009404CU) /**< \brief (USART1) IrDA Filter Register */ -#define REG_USART1_MAN REG_ACCESS(RwReg, 0x40094050U) /**< \brief (USART1) Manchester Encoder Decoder Register */ -#define REG_USART1_WPMR REG_ACCESS(RwReg, 0x400940E4U) /**< \brief (USART1) Write Protect Mode Register */ -#define REG_USART1_WPSR REG_ACCESS(RoReg, 0x400940E8U) /**< \brief (USART1) Write Protect Status Register */ -#define REG_USART1_VERSION REG_ACCESS(RoReg, 0x400940FCU) /**< \brief (USART1) Version Register */ -#define REG_USART1_RPR REG_ACCESS(RwReg, 0x40094100U) /**< \brief (USART1) Receive Pointer Register */ -#define REG_USART1_RCR REG_ACCESS(RwReg, 0x40094104U) /**< \brief (USART1) Receive Counter Register */ -#define REG_USART1_TPR REG_ACCESS(RwReg, 0x40094108U) /**< \brief (USART1) Transmit Pointer Register */ -#define REG_USART1_TCR REG_ACCESS(RwReg, 0x4009410CU) /**< \brief (USART1) Transmit Counter Register */ -#define REG_USART1_RNPR REG_ACCESS(RwReg, 0x40094110U) /**< \brief (USART1) Receive Next Pointer Register */ -#define REG_USART1_RNCR REG_ACCESS(RwReg, 0x40094114U) /**< \brief (USART1) Receive Next Counter Register */ -#define REG_USART1_TNPR REG_ACCESS(RwReg, 0x40094118U) /**< \brief (USART1) Transmit Next Pointer Register */ -#define REG_USART1_TNCR REG_ACCESS(RwReg, 0x4009411CU) /**< \brief (USART1) Transmit Next Counter Register */ -#define REG_USART1_PTCR REG_ACCESS(WoReg, 0x40094120U) /**< \brief (USART1) Transfer Control Register */ -#define REG_USART1_PTSR REG_ACCESS(RoReg, 0x40094124U) /**< \brief (USART1) Transfer Status Register */ -/* ========== Register definition for USART2 peripheral ========== */ -#define REG_USART2_CR REG_ACCESS(WoReg, 0x40098000U) /**< \brief (USART2) Control Register */ -#define REG_USART2_MR REG_ACCESS(RwReg, 0x40098004U) /**< \brief (USART2) Mode Register */ -#define REG_USART2_IER REG_ACCESS(WoReg, 0x40098008U) /**< \brief (USART2) Interrupt Enable Register */ -#define REG_USART2_IDR REG_ACCESS(WoReg, 0x4009800CU) /**< \brief (USART2) Interrupt Disable Register */ -#define REG_USART2_IMR REG_ACCESS(RoReg, 0x40098010U) /**< \brief (USART2) Interrupt Mask Register */ -#define REG_USART2_CSR REG_ACCESS(RoReg, 0x40098014U) /**< \brief (USART2) Channel Status Register */ -#define REG_USART2_RHR REG_ACCESS(RoReg, 0x40098018U) /**< \brief (USART2) Receiver Holding Register */ -#define REG_USART2_THR REG_ACCESS(WoReg, 0x4009801CU) /**< \brief (USART2) Transmitter Holding Register */ -#define REG_USART2_BRGR REG_ACCESS(RwReg, 0x40098020U) /**< \brief (USART2) Baud Rate Generator Register */ -#define REG_USART2_RTOR REG_ACCESS(RwReg, 0x40098024U) /**< \brief (USART2) Receiver Time-out Register */ -#define REG_USART2_TTGR REG_ACCESS(RwReg, 0x40098028U) /**< \brief (USART2) Transmitter Timeguard Register */ -#define REG_USART2_FIDI REG_ACCESS(RwReg, 0x40098040U) /**< \brief (USART2) FI DI Ratio Register */ -#define REG_USART2_NER REG_ACCESS(RoReg, 0x40098044U) /**< \brief (USART2) Number of Errors Register */ -#define REG_USART2_IF REG_ACCESS(RwReg, 0x4009804CU) /**< \brief (USART2) IrDA Filter Register */ -#define REG_USART2_MAN REG_ACCESS(RwReg, 0x40098050U) /**< \brief (USART2) Manchester Encoder Decoder Register */ -#define REG_USART2_WPMR REG_ACCESS(RwReg, 0x400980E4U) /**< \brief (USART2) Write Protect Mode Register */ -#define REG_USART2_WPSR REG_ACCESS(RoReg, 0x400980E8U) /**< \brief (USART2) Write Protect Status Register */ -#define REG_USART2_VERSION REG_ACCESS(RoReg, 0x400980FCU) /**< \brief (USART2) Version Register */ -#define REG_USART2_RPR REG_ACCESS(RwReg, 0x40098100U) /**< \brief (USART2) Receive Pointer Register */ -#define REG_USART2_RCR REG_ACCESS(RwReg, 0x40098104U) /**< \brief (USART2) Receive Counter Register */ -#define REG_USART2_TPR REG_ACCESS(RwReg, 0x40098108U) /**< \brief (USART2) Transmit Pointer Register */ -#define REG_USART2_TCR REG_ACCESS(RwReg, 0x4009810CU) /**< \brief (USART2) Transmit Counter Register */ -#define REG_USART2_RNPR REG_ACCESS(RwReg, 0x40098110U) /**< \brief (USART2) Receive Next Pointer Register */ -#define REG_USART2_RNCR REG_ACCESS(RwReg, 0x40098114U) /**< \brief (USART2) Receive Next Counter Register */ -#define REG_USART2_TNPR REG_ACCESS(RwReg, 0x40098118U) /**< \brief (USART2) Transmit Next Pointer Register */ -#define REG_USART2_TNCR REG_ACCESS(RwReg, 0x4009811CU) /**< \brief (USART2) Transmit Next Counter Register */ -#define REG_USART2_PTCR REG_ACCESS(WoReg, 0x40098120U) /**< \brief (USART2) Transfer Control Register */ -#define REG_USART2_PTSR REG_ACCESS(RoReg, 0x40098124U) /**< \brief (USART2) Transfer Status Register */ -/* ========== Register definition for USART3 peripheral ========== */ -#define REG_USART3_CR REG_ACCESS(WoReg, 0x4009C000U) /**< \brief (USART3) Control Register */ -#define REG_USART3_MR REG_ACCESS(RwReg, 0x4009C004U) /**< \brief (USART3) Mode Register */ -#define REG_USART3_IER REG_ACCESS(WoReg, 0x4009C008U) /**< \brief (USART3) Interrupt Enable Register */ -#define REG_USART3_IDR REG_ACCESS(WoReg, 0x4009C00CU) /**< \brief (USART3) Interrupt Disable Register */ -#define REG_USART3_IMR REG_ACCESS(RoReg, 0x4009C010U) /**< \brief (USART3) Interrupt Mask Register */ -#define REG_USART3_CSR REG_ACCESS(RoReg, 0x4009C014U) /**< \brief (USART3) Channel Status Register */ -#define REG_USART3_RHR REG_ACCESS(RoReg, 0x4009C018U) /**< \brief (USART3) Receiver Holding Register */ -#define REG_USART3_THR REG_ACCESS(WoReg, 0x4009C01CU) /**< \brief (USART3) Transmitter Holding Register */ -#define REG_USART3_BRGR REG_ACCESS(RwReg, 0x4009C020U) /**< \brief (USART3) Baud Rate Generator Register */ -#define REG_USART3_RTOR REG_ACCESS(RwReg, 0x4009C024U) /**< \brief (USART3) Receiver Time-out Register */ -#define REG_USART3_TTGR REG_ACCESS(RwReg, 0x4009C028U) /**< \brief (USART3) Transmitter Timeguard Register */ -#define REG_USART3_FIDI REG_ACCESS(RwReg, 0x4009C040U) /**< \brief (USART3) FI DI Ratio Register */ -#define REG_USART3_NER REG_ACCESS(RoReg, 0x4009C044U) /**< \brief (USART3) Number of Errors Register */ -#define REG_USART3_IF REG_ACCESS(RwReg, 0x4009C04CU) /**< \brief (USART3) IrDA Filter Register */ -#define REG_USART3_MAN REG_ACCESS(RwReg, 0x4009C050U) /**< \brief (USART3) Manchester Encoder Decoder Register */ -#define REG_USART3_WPMR REG_ACCESS(RwReg, 0x4009C0E4U) /**< \brief (USART3) Write Protect Mode Register */ -#define REG_USART3_WPSR REG_ACCESS(RoReg, 0x4009C0E8U) /**< \brief (USART3) Write Protect Status Register */ -#define REG_USART3_VERSION REG_ACCESS(RoReg, 0x4009C0FCU) /**< \brief (USART3) Version Register */ -#define REG_USART3_RPR REG_ACCESS(RwReg, 0x4009C100U) /**< \brief (USART3) Receive Pointer Register */ -#define REG_USART3_RCR REG_ACCESS(RwReg, 0x4009C104U) /**< \brief (USART3) Receive Counter Register */ -#define REG_USART3_TPR REG_ACCESS(RwReg, 0x4009C108U) /**< \brief (USART3) Transmit Pointer Register */ -#define REG_USART3_TCR REG_ACCESS(RwReg, 0x4009C10CU) /**< \brief (USART3) Transmit Counter Register */ -#define REG_USART3_RNPR REG_ACCESS(RwReg, 0x4009C110U) /**< \brief (USART3) Receive Next Pointer Register */ -#define REG_USART3_RNCR REG_ACCESS(RwReg, 0x4009C114U) /**< \brief (USART3) Receive Next Counter Register */ -#define REG_USART3_TNPR REG_ACCESS(RwReg, 0x4009C118U) /**< \brief (USART3) Transmit Next Pointer Register */ -#define REG_USART3_TNCR REG_ACCESS(RwReg, 0x4009C11CU) /**< \brief (USART3) Transmit Next Counter Register */ -#define REG_USART3_PTCR REG_ACCESS(WoReg, 0x4009C120U) /**< \brief (USART3) Transfer Control Register */ -#define REG_USART3_PTSR REG_ACCESS(RoReg, 0x4009C124U) /**< \brief (USART3) Transfer Status Register */ -/* ========== Register definition for UDPHS peripheral ========== */ -#define REG_UDPHS_CTRL REG_ACCESS(RwReg, 0x400A4000U) /**< \brief (UDPHS) UDPHS Control Register */ -#define REG_UDPHS_FNUM REG_ACCESS(RoReg, 0x400A4004U) /**< \brief (UDPHS) UDPHS Frame Number Register */ -#define REG_UDPHS_IEN REG_ACCESS(RwReg, 0x400A4010U) /**< \brief (UDPHS) UDPHS Interrupt Enable Register */ -#define REG_UDPHS_INTSTA REG_ACCESS(RoReg, 0x400A4014U) /**< \brief (UDPHS) UDPHS Interrupt Status Register */ -#define REG_UDPHS_CLRINT REG_ACCESS(WoReg, 0x400A4018U) /**< \brief (UDPHS) UDPHS Clear Interrupt Register */ -#define REG_UDPHS_EPTRST REG_ACCESS(WoReg, 0x400A401CU) /**< \brief (UDPHS) UDPHS Endpoints Reset Register */ -#define REG_UDPHS_TST REG_ACCESS(RwReg, 0x400A40E0U) /**< \brief (UDPHS) UDPHS Test Register */ -#define REG_UDPHS_IPNAME1 REG_ACCESS(RoReg, 0x400A40F0U) /**< \brief (UDPHS) UDPHS Name1 Register */ -#define REG_UDPHS_IPNAME2 REG_ACCESS(RoReg, 0x400A40F4U) /**< \brief (UDPHS) UDPHS Name2 Register */ -#define REG_UDPHS_IPFEATURES REG_ACCESS(RoReg, 0x400A40F8U) /**< \brief (UDPHS) UDPHS Features Register */ -#define REG_UDPHS_EPTCFG0 REG_ACCESS(RwReg, 0x400A4100U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 0) */ -#define REG_UDPHS_EPTCTLENB0 REG_ACCESS(WoReg, 0x400A4104U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 0) */ -#define REG_UDPHS_EPTCTLDIS0 REG_ACCESS(WoReg, 0x400A4108U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 0) */ -#define REG_UDPHS_EPTCTL0 REG_ACCESS(RoReg, 0x400A410CU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 0) */ -#define REG_UDPHS_EPTSETSTA0 REG_ACCESS(WoReg, 0x400A4114U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 0) */ -#define REG_UDPHS_EPTCLRSTA0 REG_ACCESS(WoReg, 0x400A4118U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 0) */ -#define REG_UDPHS_EPTSTA0 REG_ACCESS(RoReg, 0x400A411CU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 0) */ -#define REG_UDPHS_EPTCFG1 REG_ACCESS(RwReg, 0x400A4120U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 1) */ -#define REG_UDPHS_EPTCTLENB1 REG_ACCESS(WoReg, 0x400A4124U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 1) */ -#define REG_UDPHS_EPTCTLDIS1 REG_ACCESS(WoReg, 0x400A4128U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 1) */ -#define REG_UDPHS_EPTCTL1 REG_ACCESS(RoReg, 0x400A412CU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 1) */ -#define REG_UDPHS_EPTSETSTA1 REG_ACCESS(WoReg, 0x400A4134U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 1) */ -#define REG_UDPHS_EPTCLRSTA1 REG_ACCESS(WoReg, 0x400A4138U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 1) */ -#define REG_UDPHS_EPTSTA1 REG_ACCESS(RoReg, 0x400A413CU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 1) */ -#define REG_UDPHS_EPTCFG2 REG_ACCESS(RwReg, 0x400A4140U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 2) */ -#define REG_UDPHS_EPTCTLENB2 REG_ACCESS(WoReg, 0x400A4144U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 2) */ -#define REG_UDPHS_EPTCTLDIS2 REG_ACCESS(WoReg, 0x400A4148U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 2) */ -#define REG_UDPHS_EPTCTL2 REG_ACCESS(RoReg, 0x400A414CU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 2) */ -#define REG_UDPHS_EPTSETSTA2 REG_ACCESS(WoReg, 0x400A4154U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 2) */ -#define REG_UDPHS_EPTCLRSTA2 REG_ACCESS(WoReg, 0x400A4158U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 2) */ -#define REG_UDPHS_EPTSTA2 REG_ACCESS(RoReg, 0x400A415CU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 2) */ -#define REG_UDPHS_EPTCFG3 REG_ACCESS(RwReg, 0x400A4160U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 3) */ -#define REG_UDPHS_EPTCTLENB3 REG_ACCESS(WoReg, 0x400A4164U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 3) */ -#define REG_UDPHS_EPTCTLDIS3 REG_ACCESS(WoReg, 0x400A4168U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 3) */ -#define REG_UDPHS_EPTCTL3 REG_ACCESS(RoReg, 0x400A416CU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 3) */ -#define REG_UDPHS_EPTSETSTA3 REG_ACCESS(WoReg, 0x400A4174U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 3) */ -#define REG_UDPHS_EPTCLRSTA3 REG_ACCESS(WoReg, 0x400A4178U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 3) */ -#define REG_UDPHS_EPTSTA3 REG_ACCESS(RoReg, 0x400A417CU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 3) */ -#define REG_UDPHS_EPTCFG4 REG_ACCESS(RwReg, 0x400A4180U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 4) */ -#define REG_UDPHS_EPTCTLENB4 REG_ACCESS(WoReg, 0x400A4184U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 4) */ -#define REG_UDPHS_EPTCTLDIS4 REG_ACCESS(WoReg, 0x400A4188U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 4) */ -#define REG_UDPHS_EPTCTL4 REG_ACCESS(RoReg, 0x400A418CU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 4) */ -#define REG_UDPHS_EPTSETSTA4 REG_ACCESS(WoReg, 0x400A4194U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 4) */ -#define REG_UDPHS_EPTCLRSTA4 REG_ACCESS(WoReg, 0x400A4198U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 4) */ -#define REG_UDPHS_EPTSTA4 REG_ACCESS(RoReg, 0x400A419CU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 4) */ -#define REG_UDPHS_EPTCFG5 REG_ACCESS(RwReg, 0x400A41A0U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 5) */ -#define REG_UDPHS_EPTCTLENB5 REG_ACCESS(WoReg, 0x400A41A4U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 5) */ -#define REG_UDPHS_EPTCTLDIS5 REG_ACCESS(WoReg, 0x400A41A8U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 5) */ -#define REG_UDPHS_EPTCTL5 REG_ACCESS(RoReg, 0x400A41ACU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 5) */ -#define REG_UDPHS_EPTSETSTA5 REG_ACCESS(WoReg, 0x400A41B4U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 5) */ -#define REG_UDPHS_EPTCLRSTA5 REG_ACCESS(WoReg, 0x400A41B8U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 5) */ -#define REG_UDPHS_EPTSTA5 REG_ACCESS(RoReg, 0x400A41BCU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 5) */ -#define REG_UDPHS_EPTCFG6 REG_ACCESS(RwReg, 0x400A41C0U) /**< \brief (UDPHS) UDPHS Endpoint Configuration Register (endpoint = 6) */ -#define REG_UDPHS_EPTCTLENB6 REG_ACCESS(WoReg, 0x400A41C4U) /**< \brief (UDPHS) UDPHS Endpoint Control Enable Register (endpoint = 6) */ -#define REG_UDPHS_EPTCTLDIS6 REG_ACCESS(WoReg, 0x400A41C8U) /**< \brief (UDPHS) UDPHS Endpoint Control Disable Register (endpoint = 6) */ -#define REG_UDPHS_EPTCTL6 REG_ACCESS(RoReg, 0x400A41CCU) /**< \brief (UDPHS) UDPHS Endpoint Control Register (endpoint = 6) */ -#define REG_UDPHS_EPTSETSTA6 REG_ACCESS(WoReg, 0x400A41D4U) /**< \brief (UDPHS) UDPHS Endpoint Set Status Register (endpoint = 6) */ -#define REG_UDPHS_EPTCLRSTA6 REG_ACCESS(WoReg, 0x400A41D8U) /**< \brief (UDPHS) UDPHS Endpoint Clear Status Register (endpoint = 6) */ -#define REG_UDPHS_EPTSTA6 REG_ACCESS(RoReg, 0x400A41DCU) /**< \brief (UDPHS) UDPHS Endpoint Status Register (endpoint = 6) */ -#define REG_UDPHS_DMANXTDSC1 REG_ACCESS(RwReg, 0x400A4320U) /**< \brief (UDPHS) UDPHS DMA Next Descriptor Address Register (channel = 1) */ -#define REG_UDPHS_DMAADDRESS1 REG_ACCESS(RwReg, 0x400A4324U) /**< \brief (UDPHS) UDPHS DMA Channel Address Register (channel = 1) */ -#define REG_UDPHS_DMACONTROL1 REG_ACCESS(RwReg, 0x400A4328U) /**< \brief (UDPHS) UDPHS DMA Channel Control Register (channel = 1) */ -#define REG_UDPHS_DMASTATUS1 REG_ACCESS(RwReg, 0x400A432CU) /**< \brief (UDPHS) UDPHS DMA Channel Status Register (channel = 1) */ -#define REG_UDPHS_DMANXTDSC2 REG_ACCESS(RwReg, 0x400A4330U) /**< \brief (UDPHS) UDPHS DMA Next Descriptor Address Register (channel = 2) */ -#define REG_UDPHS_DMAADDRESS2 REG_ACCESS(RwReg, 0x400A4334U) /**< \brief (UDPHS) UDPHS DMA Channel Address Register (channel = 2) */ -#define REG_UDPHS_DMACONTROL2 REG_ACCESS(RwReg, 0x400A4338U) /**< \brief (UDPHS) UDPHS DMA Channel Control Register (channel = 2) */ -#define REG_UDPHS_DMASTATUS2 REG_ACCESS(RwReg, 0x400A433CU) /**< \brief (UDPHS) UDPHS DMA Channel Status Register (channel = 2) */ -#define REG_UDPHS_DMANXTDSC3 REG_ACCESS(RwReg, 0x400A4340U) /**< \brief (UDPHS) UDPHS DMA Next Descriptor Address Register (channel = 3) */ -#define REG_UDPHS_DMAADDRESS3 REG_ACCESS(RwReg, 0x400A4344U) /**< \brief (UDPHS) UDPHS DMA Channel Address Register (channel = 3) */ -#define REG_UDPHS_DMACONTROL3 REG_ACCESS(RwReg, 0x400A4348U) /**< \brief (UDPHS) UDPHS DMA Channel Control Register (channel = 3) */ -#define REG_UDPHS_DMASTATUS3 REG_ACCESS(RwReg, 0x400A434CU) /**< \brief (UDPHS) UDPHS DMA Channel Status Register (channel = 3) */ -#define REG_UDPHS_DMANXTDSC4 REG_ACCESS(RwReg, 0x400A4350U) /**< \brief (UDPHS) UDPHS DMA Next Descriptor Address Register (channel = 4) */ -#define REG_UDPHS_DMAADDRESS4 REG_ACCESS(RwReg, 0x400A4354U) /**< \brief (UDPHS) UDPHS DMA Channel Address Register (channel = 4) */ -#define REG_UDPHS_DMACONTROL4 REG_ACCESS(RwReg, 0x400A4358U) /**< \brief (UDPHS) UDPHS DMA Channel Control Register (channel = 4) */ -#define REG_UDPHS_DMASTATUS4 REG_ACCESS(RwReg, 0x400A435CU) /**< \brief (UDPHS) UDPHS DMA Channel Status Register (channel = 4) */ -#define REG_UDPHS_DMANXTDSC5 REG_ACCESS(RwReg, 0x400A4360U) /**< \brief (UDPHS) UDPHS DMA Next Descriptor Address Register (channel = 5) */ -#define REG_UDPHS_DMAADDRESS5 REG_ACCESS(RwReg, 0x400A4364U) /**< \brief (UDPHS) UDPHS DMA Channel Address Register (channel = 5) */ -#define REG_UDPHS_DMACONTROL5 REG_ACCESS(RwReg, 0x400A4368U) /**< \brief (UDPHS) UDPHS DMA Channel Control Register (channel = 5) */ -#define REG_UDPHS_DMASTATUS5 REG_ACCESS(RwReg, 0x400A436CU) /**< \brief (UDPHS) UDPHS DMA Channel Status Register (channel = 5) */ -/* ========== Register definition for ADC12B peripheral ========== */ -#define REG_ADC12B_CR REG_ACCESS(WoReg, 0x400A8000U) /**< \brief (ADC12B) Control Register */ -#define REG_ADC12B_MR REG_ACCESS(RwReg, 0x400A8004U) /**< \brief (ADC12B) Mode Register */ -#define REG_ADC12B_CHER REG_ACCESS(WoReg, 0x400A8010U) /**< \brief (ADC12B) Channel Enable Register */ -#define REG_ADC12B_CHDR REG_ACCESS(WoReg, 0x400A8014U) /**< \brief (ADC12B) Channel Disable Register */ -#define REG_ADC12B_CHSR REG_ACCESS(RoReg, 0x400A8018U) /**< \brief (ADC12B) Channel Status Register */ -#define REG_ADC12B_SR REG_ACCESS(RoReg, 0x400A801CU) /**< \brief (ADC12B) Status Register */ -#define REG_ADC12B_LCDR REG_ACCESS(RoReg, 0x400A8020U) /**< \brief (ADC12B) Last Converted Data Register */ -#define REG_ADC12B_IER REG_ACCESS(WoReg, 0x400A8024U) /**< \brief (ADC12B) Interrupt Enable Register */ -#define REG_ADC12B_IDR REG_ACCESS(WoReg, 0x400A8028U) /**< \brief (ADC12B) Interrupt Disable Register */ -#define REG_ADC12B_IMR REG_ACCESS(RoReg, 0x400A802CU) /**< \brief (ADC12B) Interrupt Mask Register */ -#define REG_ADC12B_CDR REG_ACCESS(RoReg, 0x400A8030U) /**< \brief (ADC12B) Channel Data Register */ -#define REG_ADC12B_ACR REG_ACCESS(RwReg, 0x400A8064U) /**< \brief (ADC12B) Analog Control Register */ -#define REG_ADC12B_EMR REG_ACCESS(RwReg, 0x400A8068U) /**< \brief (ADC12B) Extended Mode Register */ -#define REG_ADC12B_RPR REG_ACCESS(RwReg, 0x400A8100U) /**< \brief (ADC12B) Receive Pointer Register */ -#define REG_ADC12B_RCR REG_ACCESS(RwReg, 0x400A8104U) /**< \brief (ADC12B) Receive Counter Register */ -#define REG_ADC12B_TPR REG_ACCESS(RwReg, 0x400A8108U) /**< \brief (ADC12B) Transmit Pointer Register */ -#define REG_ADC12B_TCR REG_ACCESS(RwReg, 0x400A810CU) /**< \brief (ADC12B) Transmit Counter Register */ -#define REG_ADC12B_RNPR REG_ACCESS(RwReg, 0x400A8110U) /**< \brief (ADC12B) Receive Next Pointer Register */ -#define REG_ADC12B_RNCR REG_ACCESS(RwReg, 0x400A8114U) /**< \brief (ADC12B) Receive Next Counter Register */ -#define REG_ADC12B_TNPR REG_ACCESS(RwReg, 0x400A8118U) /**< \brief (ADC12B) Transmit Next Pointer Register */ -#define REG_ADC12B_TNCR REG_ACCESS(RwReg, 0x400A811CU) /**< \brief (ADC12B) Transmit Next Counter Register */ -#define REG_ADC12B_PTCR REG_ACCESS(WoReg, 0x400A8120U) /**< \brief (ADC12B) Transfer Control Register */ -#define REG_ADC12B_PTSR REG_ACCESS(RoReg, 0x400A8124U) /**< \brief (ADC12B) Transfer Status Register */ -/* ========== Register definition for ADC peripheral ========== */ -#define REG_ADC_CR REG_ACCESS(WoReg, 0x400AC000U) /**< \brief (ADC) Control Register */ -#define REG_ADC_MR REG_ACCESS(RwReg, 0x400AC004U) /**< \brief (ADC) Mode Register */ -#define REG_ADC_CHER REG_ACCESS(WoReg, 0x400AC010U) /**< \brief (ADC) Channel Enable Register */ -#define REG_ADC_CHDR REG_ACCESS(WoReg, 0x400AC014U) /**< \brief (ADC) Channel Disable Register */ -#define REG_ADC_CHSR REG_ACCESS(RoReg, 0x400AC018U) /**< \brief (ADC) Channel Status Register */ -#define REG_ADC_SR REG_ACCESS(RoReg, 0x400AC01CU) /**< \brief (ADC) Status Register */ -#define REG_ADC_LCDR REG_ACCESS(RoReg, 0x400AC020U) /**< \brief (ADC) Last Converted Data Register */ -#define REG_ADC_IER REG_ACCESS(WoReg, 0x400AC024U) /**< \brief (ADC) Interrupt Enable Register */ -#define REG_ADC_IDR REG_ACCESS(WoReg, 0x400AC028U) /**< \brief (ADC) Interrupt Disable Register */ -#define REG_ADC_IMR REG_ACCESS(RoReg, 0x400AC02CU) /**< \brief (ADC) Interrupt Mask Register */ -#define REG_ADC_CDR REG_ACCESS(RoReg, 0x400AC030U) /**< \brief (ADC) Channel Data Register */ -#define REG_ADC_RPR REG_ACCESS(RwReg, 0x400AC100U) /**< \brief (ADC) Receive Pointer Register */ -#define REG_ADC_RCR REG_ACCESS(RwReg, 0x400AC104U) /**< \brief (ADC) Receive Counter Register */ -#define REG_ADC_TPR REG_ACCESS(RwReg, 0x400AC108U) /**< \brief (ADC) Transmit Pointer Register */ -#define REG_ADC_TCR REG_ACCESS(RwReg, 0x400AC10CU) /**< \brief (ADC) Transmit Counter Register */ -#define REG_ADC_RNPR REG_ACCESS(RwReg, 0x400AC110U) /**< \brief (ADC) Receive Next Pointer Register */ -#define REG_ADC_RNCR REG_ACCESS(RwReg, 0x400AC114U) /**< \brief (ADC) Receive Next Counter Register */ -#define REG_ADC_TNPR REG_ACCESS(RwReg, 0x400AC118U) /**< \brief (ADC) Transmit Next Pointer Register */ -#define REG_ADC_TNCR REG_ACCESS(RwReg, 0x400AC11CU) /**< \brief (ADC) Transmit Next Counter Register */ -#define REG_ADC_PTCR REG_ACCESS(WoReg, 0x400AC120U) /**< \brief (ADC) Transfer Control Register */ -#define REG_ADC_PTSR REG_ACCESS(RoReg, 0x400AC124U) /**< \brief (ADC) Transfer Status Register */ -/* ========== Register definition for DMAC peripheral ========== */ -#define REG_DMAC_GCFG REG_ACCESS(RwReg, 0x400B0000U) /**< \brief (DMAC) DMAC Global Configuration Register */ -#define REG_DMAC_EN REG_ACCESS(RwReg, 0x400B0004U) /**< \brief (DMAC) DMAC Enable Register */ -#define REG_DMAC_SREQ REG_ACCESS(RwReg, 0x400B0008U) /**< \brief (DMAC) DMAC Software Single Request Register */ -#define REG_DMAC_CREQ REG_ACCESS(RwReg, 0x400B000CU) /**< \brief (DMAC) DMAC Software Chunk Transfer Request Register */ -#define REG_DMAC_LAST REG_ACCESS(RwReg, 0x400B0010U) /**< \brief (DMAC) DMAC Software Last Transfer Flag Register */ -#define REG_DMAC_EBCIER REG_ACCESS(WoReg, 0x400B0018U) /**< \brief (DMAC) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Enable register. */ -#define REG_DMAC_EBCIDR REG_ACCESS(WoReg, 0x400B001CU) /**< \brief (DMAC) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Disable register. */ -#define REG_DMAC_EBCIMR REG_ACCESS(RoReg, 0x400B0020U) /**< \brief (DMAC) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Mask Register. */ -#define REG_DMAC_EBCISR REG_ACCESS(RoReg, 0x400B0024U) /**< \brief (DMAC) DMAC Error, Chained Buffer transfer completed and Buffer transfer completed Status Register. */ -#define REG_DMAC_CHER REG_ACCESS(WoReg, 0x400B0028U) /**< \brief (DMAC) DMAC Channel Handler Enable Register */ -#define REG_DMAC_CHDR REG_ACCESS(WoReg, 0x400B002CU) /**< \brief (DMAC) DMAC Channel Handler Disable Register */ -#define REG_DMAC_CHSR REG_ACCESS(RoReg, 0x400B0030U) /**< \brief (DMAC) DMAC Channel Handler Status Register */ -#define REG_DMAC_SADDR0 REG_ACCESS(RwReg, 0x400B003CU) /**< \brief (DMAC) DMAC Channel Source Address Register (ch_num = 0) */ -#define REG_DMAC_DADDR0 REG_ACCESS(RwReg, 0x400B0040U) /**< \brief (DMAC) DMAC Channel Destination Address Register (ch_num = 0) */ -#define REG_DMAC_DSCR0 REG_ACCESS(RwReg, 0x400B0044U) /**< \brief (DMAC) DMAC Channel Descriptor Address Register (ch_num = 0) */ -#define REG_DMAC_CTRLA0 REG_ACCESS(RwReg, 0x400B0048U) /**< \brief (DMAC) DMAC Channel Control A Register (ch_num = 0) */ -#define REG_DMAC_CTRLB0 REG_ACCESS(RwReg, 0x400B004CU) /**< \brief (DMAC) DMAC Channel Control B Register (ch_num = 0) */ -#define REG_DMAC_CFG0 REG_ACCESS(RwReg, 0x400B0050U) /**< \brief (DMAC) DMAC Channel Configuration Register (ch_num = 0) */ -#define REG_DMAC_SADDR1 REG_ACCESS(RwReg, 0x400B0064U) /**< \brief (DMAC) DMAC Channel Source Address Register (ch_num = 1) */ -#define REG_DMAC_DADDR1 REG_ACCESS(RwReg, 0x400B0068U) /**< \brief (DMAC) DMAC Channel Destination Address Register (ch_num = 1) */ -#define REG_DMAC_DSCR1 REG_ACCESS(RwReg, 0x400B006CU) /**< \brief (DMAC) DMAC Channel Descriptor Address Register (ch_num = 1) */ -#define REG_DMAC_CTRLA1 REG_ACCESS(RwReg, 0x400B0070U) /**< \brief (DMAC) DMAC Channel Control A Register (ch_num = 1) */ -#define REG_DMAC_CTRLB1 REG_ACCESS(RwReg, 0x400B0074U) /**< \brief (DMAC) DMAC Channel Control B Register (ch_num = 1) */ -#define REG_DMAC_CFG1 REG_ACCESS(RwReg, 0x400B0078U) /**< \brief (DMAC) DMAC Channel Configuration Register (ch_num = 1) */ -#define REG_DMAC_SADDR2 REG_ACCESS(RwReg, 0x400B008CU) /**< \brief (DMAC) DMAC Channel Source Address Register (ch_num = 2) */ -#define REG_DMAC_DADDR2 REG_ACCESS(RwReg, 0x400B0090U) /**< \brief (DMAC) DMAC Channel Destination Address Register (ch_num = 2) */ -#define REG_DMAC_DSCR2 REG_ACCESS(RwReg, 0x400B0094U) /**< \brief (DMAC) DMAC Channel Descriptor Address Register (ch_num = 2) */ -#define REG_DMAC_CTRLA2 REG_ACCESS(RwReg, 0x400B0098U) /**< \brief (DMAC) DMAC Channel Control A Register (ch_num = 2) */ -#define REG_DMAC_CTRLB2 REG_ACCESS(RwReg, 0x400B009CU) /**< \brief (DMAC) DMAC Channel Control B Register (ch_num = 2) */ -#define REG_DMAC_CFG2 REG_ACCESS(RwReg, 0x400B00A0U) /**< \brief (DMAC) DMAC Channel Configuration Register (ch_num = 2) */ -#define REG_DMAC_SADDR3 REG_ACCESS(RwReg, 0x400B00B4U) /**< \brief (DMAC) DMAC Channel Source Address Register (ch_num = 3) */ -#define REG_DMAC_DADDR3 REG_ACCESS(RwReg, 0x400B00B8U) /**< \brief (DMAC) DMAC Channel Destination Address Register (ch_num = 3) */ -#define REG_DMAC_DSCR3 REG_ACCESS(RwReg, 0x400B00BCU) /**< \brief (DMAC) DMAC Channel Descriptor Address Register (ch_num = 3) */ -#define REG_DMAC_CTRLA3 REG_ACCESS(RwReg, 0x400B00C0U) /**< \brief (DMAC) DMAC Channel Control A Register (ch_num = 3) */ -#define REG_DMAC_CTRLB3 REG_ACCESS(RwReg, 0x400B00C4U) /**< \brief (DMAC) DMAC Channel Control B Register (ch_num = 3) */ -#define REG_DMAC_CFG3 REG_ACCESS(RwReg, 0x400B00C8U) /**< \brief (DMAC) DMAC Channel Configuration Register (ch_num = 3) */ -/* ========== Register definition for SMC peripheral ========== */ -#define REG_SMC_CFG REG_ACCESS(RwReg, 0x400E0000U) /**< \brief (SMC) SMC NFC Configuration Register */ -#define REG_SMC_CTRL REG_ACCESS(WoReg, 0x400E0004U) /**< \brief (SMC) SMC NFC Control Register */ -#define REG_SMC_SR REG_ACCESS(RoReg, 0x400E0008U) /**< \brief (SMC) SMC NFC Status Register */ -#define REG_SMC_IER REG_ACCESS(WoReg, 0x400E000CU) /**< \brief (SMC) SMC NFC Interrupt Enable Register */ -#define REG_SMC_IDR REG_ACCESS(WoReg, 0x400E0010U) /**< \brief (SMC) SMC NFC Interrupt Disable Register */ -#define REG_SMC_IMR REG_ACCESS(RoReg, 0x400E0014U) /**< \brief (SMC) SMC NFC Interrupt Mask Register */ -#define REG_SMC_ADDR REG_ACCESS(RwReg, 0x400E0018U) /**< \brief (SMC) SMC NFC Address Cycle Zero Register */ -#define REG_SMC_BANK REG_ACCESS(RwReg, 0x400E001CU) /**< \brief (SMC) SMC Bank Address Register */ -#define REG_SMC_ECC_CTRL REG_ACCESS(WoReg, 0x400E0020U) /**< \brief (SMC) SMC ECC Control Register */ -#define REG_SMC_ECC_MD REG_ACCESS(RwReg, 0x400E0024U) /**< \brief (SMC) SMC ECC Mode Register */ -#define REG_SMC_ECC_SR1 REG_ACCESS(RoReg, 0x400E0028U) /**< \brief (SMC) SMC ECC Status 1 Register */ -#define REG_SMC_ECC_PR0 REG_ACCESS(RoReg, 0x400E002CU) /**< \brief (SMC) SMC ECC Parity 0 Register */ -#define REG_SMC_ECC_PR1 REG_ACCESS(RoReg, 0x400E0030U) /**< \brief (SMC) SMC ECC parity 1 Register */ -#define REG_SMC_ECC_SR2 REG_ACCESS(RoReg, 0x400E0034U) /**< \brief (SMC) SMC ECC status 2 Register */ -#define REG_SMC_ECC_PR2 REG_ACCESS(RoReg, 0x400E0038U) /**< \brief (SMC) SMC ECC parity 2 Register */ -#define REG_SMC_ECC_PR3 REG_ACCESS(RoReg, 0x400E003CU) /**< \brief (SMC) SMC ECC parity 3 Register */ -#define REG_SMC_ECC_PR4 REG_ACCESS(RoReg, 0x400E0040U) /**< \brief (SMC) SMC ECC parity 4 Register */ -#define REG_SMC_ECC_PR5 REG_ACCESS(RoReg, 0x400E0044U) /**< \brief (SMC) SMC ECC parity 5 Register */ -#define REG_SMC_ECC_PR6 REG_ACCESS(RoReg, 0x400E0048U) /**< \brief (SMC) SMC ECC parity 6 Register */ -#define REG_SMC_ECC_PR7 REG_ACCESS(RoReg, 0x400E004CU) /**< \brief (SMC) SMC ECC parity 7 Register */ -#define REG_SMC_ECC_PR8 REG_ACCESS(RoReg, 0x400E0050U) /**< \brief (SMC) SMC ECC parity 8 Register */ -#define REG_SMC_ECC_PR9 REG_ACCESS(RoReg, 0x400E0054U) /**< \brief (SMC) SMC ECC parity 9 Register */ -#define REG_SMC_ECC_PR10 REG_ACCESS(RoReg, 0x400E0058U) /**< \brief (SMC) SMC ECC parity 10 Register */ -#define REG_SMC_ECC_PR11 REG_ACCESS(RoReg, 0x400E005CU) /**< \brief (SMC) SMC ECC parity 11 Register */ -#define REG_SMC_ECC_PR12 REG_ACCESS(RoReg, 0x400E0060U) /**< \brief (SMC) SMC ECC parity 12 Register */ -#define REG_SMC_ECC_PR13 REG_ACCESS(RoReg, 0x400E0064U) /**< \brief (SMC) SMC ECC parity 13 Register */ -#define REG_SMC_ECC_PR14 REG_ACCESS(RoReg, 0x400E0068U) /**< \brief (SMC) SMC ECC parity 14 Register */ -#define REG_SMC_ECC_PR15 REG_ACCESS(RoReg, 0x400E006CU) /**< \brief (SMC) SMC ECC parity 15 Register */ -#define REG_SMC_SETUP0 REG_ACCESS(RwReg, 0x400E0070U) /**< \brief (SMC) SMC SETUP Register (CS_number = 0) */ -#define REG_SMC_PULSE0 REG_ACCESS(RwReg, 0x400E0074U) /**< \brief (SMC) SMC PULSE Register (CS_number = 0) */ -#define REG_SMC_CYCLE0 REG_ACCESS(RwReg, 0x400E0078U) /**< \brief (SMC) SMC CYCLE Register (CS_number = 0) */ -#define REG_SMC_TIMINGS0 REG_ACCESS(RwReg, 0x400E007CU) /**< \brief (SMC) SMC TIMINGS Register (CS_number = 0) */ -#define REG_SMC_MODE0 REG_ACCESS(RwReg, 0x400E0080U) /**< \brief (SMC) SMC MODE Register (CS_number = 0) */ -#define REG_SMC_SETUP1 REG_ACCESS(RwReg, 0x400E0084U) /**< \brief (SMC) SMC SETUP Register (CS_number = 1) */ -#define REG_SMC_PULSE1 REG_ACCESS(RwReg, 0x400E0088U) /**< \brief (SMC) SMC PULSE Register (CS_number = 1) */ -#define REG_SMC_CYCLE1 REG_ACCESS(RwReg, 0x400E008CU) /**< \brief (SMC) SMC CYCLE Register (CS_number = 1) */ -#define REG_SMC_TIMINGS1 REG_ACCESS(RwReg, 0x400E0090U) /**< \brief (SMC) SMC TIMINGS Register (CS_number = 1) */ -#define REG_SMC_MODE1 REG_ACCESS(RwReg, 0x400E0094U) /**< \brief (SMC) SMC MODE Register (CS_number = 1) */ -#define REG_SMC_SETUP2 REG_ACCESS(RwReg, 0x400E0098U) /**< \brief (SMC) SMC SETUP Register (CS_number = 2) */ -#define REG_SMC_PULSE2 REG_ACCESS(RwReg, 0x400E009CU) /**< \brief (SMC) SMC PULSE Register (CS_number = 2) */ -#define REG_SMC_CYCLE2 REG_ACCESS(RwReg, 0x400E00A0U) /**< \brief (SMC) SMC CYCLE Register (CS_number = 2) */ -#define REG_SMC_TIMINGS2 REG_ACCESS(RwReg, 0x400E00A4U) /**< \brief (SMC) SMC TIMINGS Register (CS_number = 2) */ -#define REG_SMC_MODE2 REG_ACCESS(RwReg, 0x400E00A8U) /**< \brief (SMC) SMC MODE Register (CS_number = 2) */ -#define REG_SMC_SETUP3 REG_ACCESS(RwReg, 0x400E00ACU) /**< \brief (SMC) SMC SETUP Register (CS_number = 3) */ -#define REG_SMC_PULSE3 REG_ACCESS(RwReg, 0x400E00B0U) /**< \brief (SMC) SMC PULSE Register (CS_number = 3) */ -#define REG_SMC_CYCLE3 REG_ACCESS(RwReg, 0x400E00B4U) /**< \brief (SMC) SMC CYCLE Register (CS_number = 3) */ -#define REG_SMC_TIMINGS3 REG_ACCESS(RwReg, 0x400E00B8U) /**< \brief (SMC) SMC TIMINGS Register (CS_number = 3) */ -#define REG_SMC_MODE3 REG_ACCESS(RwReg, 0x400E00BCU) /**< \brief (SMC) SMC MODE Register (CS_number = 3) */ -#define REG_SMC_OCMS REG_ACCESS(RwReg, 0x400E0110U) /**< \brief (SMC) SMC OCMS MODE Register */ -#define REG_SMC_KEY1 REG_ACCESS(WoReg, 0x400E0114U) /**< \brief (SMC) SMC KEY1 Register */ -#define REG_SMC_KEY2 REG_ACCESS(WoReg, 0x400E0118U) /**< \brief (SMC) SMC KEY2 Register */ -#define REG_SMC_WPCR REG_ACCESS(WoReg, 0x400E01E4U) /**< \brief (SMC) Write Protection Control Register */ -#define REG_SMC_WPSR REG_ACCESS(RoReg, 0x400E01E8U) /**< \brief (SMC) Write Protection Status Register */ -/* ========== Register definition for MATRIX peripheral ========== */ -#define REG_MATRIX_MCFG REG_ACCESS(RwReg, 0x400E0200U) /**< \brief (MATRIX) Master Configuration Register */ -#define REG_MATRIX_SCFG REG_ACCESS(RwReg, 0x400E0240U) /**< \brief (MATRIX) Slave Configuration Register */ -#define REG_MATRIX_PRAS0 REG_ACCESS(RwReg, 0x400E0280U) /**< \brief (MATRIX) Priority Register A for Slave 0 */ -#define REG_MATRIX_PRAS1 REG_ACCESS(RwReg, 0x400E0288U) /**< \brief (MATRIX) Priority Register A for Slave 1 */ -#define REG_MATRIX_PRAS2 REG_ACCESS(RwReg, 0x400E0290U) /**< \brief (MATRIX) Priority Register A for Slave 2 */ -#define REG_MATRIX_PRAS3 REG_ACCESS(RwReg, 0x400E0298U) /**< \brief (MATRIX) Priority Register A for Slave 3 */ -#define REG_MATRIX_PRAS4 REG_ACCESS(RwReg, 0x400E02A0U) /**< \brief (MATRIX) Priority Register A for Slave 4 */ -#define REG_MATRIX_PRAS5 REG_ACCESS(RwReg, 0x400E02A8U) /**< \brief (MATRIX) Priority Register A for Slave 5 */ -#define REG_MATRIX_PRAS6 REG_ACCESS(RwReg, 0x400E02B0U) /**< \brief (MATRIX) Priority Register A for Slave 6 */ -#define REG_MATRIX_PRAS7 REG_ACCESS(RwReg, 0x400E02B8U) /**< \brief (MATRIX) Priority Register A for Slave 7 */ -#define REG_MATRIX_PRAS8 REG_ACCESS(RwReg, 0x400E02C0U) /**< \brief (MATRIX) Priority Register A for Slave 8 */ -#define REG_MATRIX_PRAS9 REG_ACCESS(RwReg, 0x400E02C8U) /**< \brief (MATRIX) Priority Register A for Slave 9 */ -#define REG_MATRIX_MRCR REG_ACCESS(RwReg, 0x400E0300U) /**< \brief (MATRIX) Master Remap Control Register */ -/* ========== Register definition for PMC peripheral ========== */ -#define REG_PMC_SCER REG_ACCESS(WoReg, 0x400E0400U) /**< \brief (PMC) System Clock Enable Register */ -#define REG_PMC_SCDR REG_ACCESS(WoReg, 0x400E0404U) /**< \brief (PMC) System Clock Disable Register */ -#define REG_PMC_SCSR REG_ACCESS(RoReg, 0x400E0408U) /**< \brief (PMC) System Clock Status Register */ -#define REG_PMC_PCER REG_ACCESS(WoReg, 0x400E0410U) /**< \brief (PMC) Peripheral Clock Enable Register */ -#define REG_PMC_PCDR REG_ACCESS(WoReg, 0x400E0414U) /**< \brief (PMC) Peripheral Clock Disable Register */ -//#define REG_PMC_PCSR REG_ACCESS(RoReg, 0x400E0418U) /**< \brief (PMC) Peripheral Clock Status Register */ -#define REG_PMC_UCKR REG_ACCESS(RwReg, 0x400E041CU) /**< \brief (PMC) UTMI Clock Register */ -#define REG_PMC_MOR REG_ACCESS(RwReg, 0x400E0420U) /**< \brief (PMC) Main Oscillator Register */ -#define REG_PMC_MCFR REG_ACCESS(RoReg, 0x400E0424U) /**< \brief (PMC) Main Clock Frequency Register */ -#define REG_PMC_PLLAR REG_ACCESS(RwReg, 0x400E0428U) /**< \brief (PMC) PLLA Register */ -#define REG_PMC_MCKR REG_ACCESS(RwReg, 0x400E0430U) /**< \brief (PMC) Master Clock Register */ -#define REG_PMC_PCK REG_ACCESS(RwReg, 0x400E0440U) /**< \brief (PMC) Programmable Clock 0 Register */ -#define REG_PMC_IER REG_ACCESS(WoReg, 0x400E0460U) /**< \brief (PMC) Interrupt Enable Register */ -#define REG_PMC_IDR REG_ACCESS(WoReg, 0x400E0464U) /**< \brief (PMC) Interrupt Disable Register */ -#define REG_PMC_SR REG_ACCESS(RoReg, 0x400E0468U) /**< \brief (PMC) Status Register */ -#define REG_PMC_IMR REG_ACCESS(RoReg, 0x400E046CU) /**< \brief (PMC) Interrupt Mask Register */ -#define REG_PMC_FSMR REG_ACCESS(RwReg, 0x400E0470U) /**< \brief (PMC) Fast Startup Mode Register */ -#define REG_PMC_FSPR REG_ACCESS(RwReg, 0x400E0474U) /**< \brief (PMC) Fast Startup Polarity Register */ -#define REG_PMC_FOCR REG_ACCESS(WoReg, 0x400E0478U) /**< \brief (PMC) Fault Output Clear Register */ -/* ========== Register definition for UART peripheral ========== */ -#define REG_UART_CR REG_ACCESS(WoReg, 0x400E0600U) /**< \brief (UART) Control Register */ -#define REG_UART_MR REG_ACCESS(RwReg, 0x400E0604U) /**< \brief (UART) Mode Register */ -#define REG_UART_IER REG_ACCESS(WoReg, 0x400E0608U) /**< \brief (UART) Interrupt Enable Register */ -#define REG_UART_IDR REG_ACCESS(WoReg, 0x400E060CU) /**< \brief (UART) Interrupt Disable Register */ -#define REG_UART_IMR REG_ACCESS(RoReg, 0x400E0610U) /**< \brief (UART) Interrupt Mask Register */ -#define REG_UART_SR REG_ACCESS(RoReg, 0x400E0614U) /**< \brief (UART) Status Register */ -#define REG_UART_RHR REG_ACCESS(RoReg, 0x400E0618U) /**< \brief (UART) Receive Holding Register */ -#define REG_UART_THR REG_ACCESS(WoReg, 0x400E061CU) /**< \brief (UART) Transmit Holding Register */ -#define REG_UART_BRGR REG_ACCESS(RwReg, 0x400E0620U) /**< \brief (UART) Baud Rate Generator Register */ -#define REG_UART_RPR REG_ACCESS(RwReg, 0x400E0700U) /**< \brief (UART) Receive Pointer Register */ -#define REG_UART_RCR REG_ACCESS(RwReg, 0x400E0704U) /**< \brief (UART) Receive Counter Register */ -#define REG_UART_TPR REG_ACCESS(RwReg, 0x400E0708U) /**< \brief (UART) Transmit Pointer Register */ -#define REG_UART_TCR REG_ACCESS(RwReg, 0x400E070CU) /**< \brief (UART) Transmit Counter Register */ -#define REG_UART_RNPR REG_ACCESS(RwReg, 0x400E0710U) /**< \brief (UART) Receive Next Pointer Register */ -#define REG_UART_RNCR REG_ACCESS(RwReg, 0x400E0714U) /**< \brief (UART) Receive Next Counter Register */ -#define REG_UART_TNPR REG_ACCESS(RwReg, 0x400E0718U) /**< \brief (UART) Transmit Next Pointer Register */ -#define REG_UART_TNCR REG_ACCESS(RwReg, 0x400E071CU) /**< \brief (UART) Transmit Next Counter Register */ -#define REG_UART_PTCR REG_ACCESS(WoReg, 0x400E0720U) /**< \brief (UART) Transfer Control Register */ -#define REG_UART_PTSR REG_ACCESS(RoReg, 0x400E0724U) /**< \brief (UART) Transfer Status Register */ -/* ========== Register definition for CHIPID peripheral ========== */ -#define REG_CHIPID_CIDR REG_ACCESS(RoReg, 0x400E0740U) /**< \brief (CHIPID) Chip ID Register */ -#define REG_CHIPID_EXID REG_ACCESS(RoReg, 0x400E0744U) /**< \brief (CHIPID) Chip ID Extension Register */ -/* ========== Register definition for EFC0 peripheral ========== */ -#define REG_EFC0_FMR REG_ACCESS(RwReg, 0x400E0800U) /**< \brief (EFC0) EEFC Flash Mode Register */ -#define REG_EFC0_FCR REG_ACCESS(WoReg, 0x400E0804U) /**< \brief (EFC0) EEFC Flash Command Register */ -#define REG_EFC0_FSR REG_ACCESS(RoReg, 0x400E0808U) /**< \brief (EFC0) EEFC Flash Status Register */ -#define REG_EFC0_FRR REG_ACCESS(RoReg, 0x400E080CU) /**< \brief (EFC0) EEFC Flash Result Register */ -/* ========== Register definition for EFC1 peripheral ========== */ -#define REG_EFC1_FMR REG_ACCESS(RwReg, 0x400E0A00U) /**< \brief (EFC1) EEFC Flash Mode Register */ -#define REG_EFC1_FCR REG_ACCESS(WoReg, 0x400E0A04U) /**< \brief (EFC1) EEFC Flash Command Register */ -#define REG_EFC1_FSR REG_ACCESS(RoReg, 0x400E0A08U) /**< \brief (EFC1) EEFC Flash Status Register */ -#define REG_EFC1_FRR REG_ACCESS(RoReg, 0x400E0A0CU) /**< \brief (EFC1) EEFC Flash Result Register */ -/* ========== Register definition for PIOA peripheral ========== */ -#define REG_PIOA_PER REG_ACCESS(WoReg, 0x400E0C00U) /**< \brief (PIOA) PIO Enable Register */ -#define REG_PIOA_PDR REG_ACCESS(WoReg, 0x400E0C04U) /**< \brief (PIOA) PIO Disable Register */ -#define REG_PIOA_PSR REG_ACCESS(RoReg, 0x400E0C08U) /**< \brief (PIOA) PIO Status Register */ -#define REG_PIOA_OER REG_ACCESS(WoReg, 0x400E0C10U) /**< \brief (PIOA) Output Enable Register */ -#define REG_PIOA_ODR REG_ACCESS(WoReg, 0x400E0C14U) /**< \brief (PIOA) Output Disable Register */ -#define REG_PIOA_OSR REG_ACCESS(RoReg, 0x400E0C18U) /**< \brief (PIOA) Output Status Register */ -#define REG_PIOA_IFER REG_ACCESS(WoReg, 0x400E0C20U) /**< \brief (PIOA) Glitch Input Filter Enable Register */ -#define REG_PIOA_IFDR REG_ACCESS(WoReg, 0x400E0C24U) /**< \brief (PIOA) Glitch Input Filter Disable Register */ -#define REG_PIOA_IFSR REG_ACCESS(RoReg, 0x400E0C28U) /**< \brief (PIOA) Glitch Input Filter Status Register */ -#define REG_PIOA_SODR REG_ACCESS(WoReg, 0x400E0C30U) /**< \brief (PIOA) Set Output Data Register */ -#define REG_PIOA_CODR REG_ACCESS(WoReg, 0x400E0C34U) /**< \brief (PIOA) Clear Output Data Register */ -#define REG_PIOA_ODSR REG_ACCESS(RwReg, 0x400E0C38U) /**< \brief (PIOA) Output Data Status Register */ -#define REG_PIOA_PDSR REG_ACCESS(RoReg, 0x400E0C3CU) /**< \brief (PIOA) Pin Data Status Register */ -#define REG_PIOA_IER REG_ACCESS(WoReg, 0x400E0C40U) /**< \brief (PIOA) Interrupt Enable Register */ -#define REG_PIOA_IDR REG_ACCESS(WoReg, 0x400E0C44U) /**< \brief (PIOA) Interrupt Disable Register */ -#define REG_PIOA_IMR REG_ACCESS(RoReg, 0x400E0C48U) /**< \brief (PIOA) Interrupt Mask Register */ -#define REG_PIOA_ISR REG_ACCESS(RoReg, 0x400E0C4CU) /**< \brief (PIOA) Interrupt Status Register */ -#define REG_PIOA_MDER REG_ACCESS(WoReg, 0x400E0C50U) /**< \brief (PIOA) Multi-driver Enable Register */ -#define REG_PIOA_MDDR REG_ACCESS(WoReg, 0x400E0C54U) /**< \brief (PIOA) Multi-driver Disable Register */ -#define REG_PIOA_MDSR REG_ACCESS(RoReg, 0x400E0C58U) /**< \brief (PIOA) Multi-driver Status Register */ -#define REG_PIOA_PUDR REG_ACCESS(WoReg, 0x400E0C60U) /**< \brief (PIOA) Pull-up Disable Register */ -#define REG_PIOA_PUER REG_ACCESS(WoReg, 0x400E0C64U) /**< \brief (PIOA) Pull-up Enable Register */ -#define REG_PIOA_PUSR REG_ACCESS(RoReg, 0x400E0C68U) /**< \brief (PIOA) Pad Pull-up Status Register */ -#define REG_PIOA_ABSR REG_ACCESS(RwReg, 0x400E0C70U) /**< \brief (PIOA) Peripheral AB Select Register */ -#define REG_PIOA_SCIFSR REG_ACCESS(WoReg, 0x400E0C80U) /**< \brief (PIOA) System Clock Glitch Input Filter Select Register */ -#define REG_PIOA_DIFSR REG_ACCESS(WoReg, 0x400E0C84U) /**< \brief (PIOA) Debouncing Input Filter Select Register */ -#define REG_PIOA_IFDGSR REG_ACCESS(RoReg, 0x400E0C88U) /**< \brief (PIOA) Glitch or Debouncing Input Filter Clock Selection Status Register */ -#define REG_PIOA_SCDR REG_ACCESS(RwReg, 0x400E0C8CU) /**< \brief (PIOA) Slow Clock Divider Debouncing Register */ -#define REG_PIOA_OWER REG_ACCESS(WoReg, 0x400E0CA0U) /**< \brief (PIOA) Output Write Enable */ -#define REG_PIOA_OWDR REG_ACCESS(WoReg, 0x400E0CA4U) /**< \brief (PIOA) Output Write Disable */ -#define REG_PIOA_OWSR REG_ACCESS(RoReg, 0x400E0CA8U) /**< \brief (PIOA) Output Write Status Register */ -#define REG_PIOA_AIMER REG_ACCESS(WoReg, 0x400E0CB0U) /**< \brief (PIOA) Additional Interrupt Modes Enable Register */ -#define REG_PIOA_AIMDR REG_ACCESS(WoReg, 0x400E0CB4U) /**< \brief (PIOA) Additional Interrupt Modes Disables Register */ -#define REG_PIOA_AIMMR REG_ACCESS(RoReg, 0x400E0CB8U) /**< \brief (PIOA) Additional Interrupt Modes Mask Register */ -#define REG_PIOA_ESR REG_ACCESS(WoReg, 0x400E0CC0U) /**< \brief (PIOA) Edge Select Register */ -#define REG_PIOA_LSR REG_ACCESS(WoReg, 0x400E0CC4U) /**< \brief (PIOA) Level Select Register */ -#define REG_PIOA_ELSR REG_ACCESS(RoReg, 0x400E0CC8U) /**< \brief (PIOA) Edge/Level Status Register */ -#define REG_PIOA_FELLSR REG_ACCESS(WoReg, 0x400E0CD0U) /**< \brief (PIOA) Falling Edge/Low Level Select Register */ -#define REG_PIOA_REHLSR REG_ACCESS(WoReg, 0x400E0CD4U) /**< \brief (PIOA) Rising Edge/ High Level Select Register */ -#define REG_PIOA_FRLHSR REG_ACCESS(RoReg, 0x400E0CD8U) /**< \brief (PIOA) Fall/Rise - Low/High Status Register */ -#define REG_PIOA_LOCKSR REG_ACCESS(RoReg, 0x400E0CE0U) /**< \brief (PIOA) Lock Status */ -#define REG_PIOA_WPMR REG_ACCESS(RwReg, 0x400E0CE4U) /**< \brief (PIOA) Write Protect Mode Register */ -#define REG_PIOA_WPSR REG_ACCESS(RoReg, 0x400E0CE8U) /**< \brief (PIOA) Write Protect Status Register */ -/* ========== Register definition for PIOB peripheral ========== */ -#define REG_PIOB_PER REG_ACCESS(WoReg, 0x400E0E00U) /**< \brief (PIOB) PIO Enable Register */ -#define REG_PIOB_PDR REG_ACCESS(WoReg, 0x400E0E04U) /**< \brief (PIOB) PIO Disable Register */ -#define REG_PIOB_PSR REG_ACCESS(RoReg, 0x400E0E08U) /**< \brief (PIOB) PIO Status Register */ -#define REG_PIOB_OER REG_ACCESS(WoReg, 0x400E0E10U) /**< \brief (PIOB) Output Enable Register */ -#define REG_PIOB_ODR REG_ACCESS(WoReg, 0x400E0E14U) /**< \brief (PIOB) Output Disable Register */ -#define REG_PIOB_OSR REG_ACCESS(RoReg, 0x400E0E18U) /**< \brief (PIOB) Output Status Register */ -#define REG_PIOB_IFER REG_ACCESS(WoReg, 0x400E0E20U) /**< \brief (PIOB) Glitch Input Filter Enable Register */ -#define REG_PIOB_IFDR REG_ACCESS(WoReg, 0x400E0E24U) /**< \brief (PIOB) Glitch Input Filter Disable Register */ -#define REG_PIOB_IFSR REG_ACCESS(RoReg, 0x400E0E28U) /**< \brief (PIOB) Glitch Input Filter Status Register */ -#define REG_PIOB_SODR REG_ACCESS(WoReg, 0x400E0E30U) /**< \brief (PIOB) Set Output Data Register */ -#define REG_PIOB_CODR REG_ACCESS(WoReg, 0x400E0E34U) /**< \brief (PIOB) Clear Output Data Register */ -#define REG_PIOB_ODSR REG_ACCESS(RwReg, 0x400E0E38U) /**< \brief (PIOB) Output Data Status Register */ -#define REG_PIOB_PDSR REG_ACCESS(RoReg, 0x400E0E3CU) /**< \brief (PIOB) Pin Data Status Register */ -#define REG_PIOB_IER REG_ACCESS(WoReg, 0x400E0E40U) /**< \brief (PIOB) Interrupt Enable Register */ -#define REG_PIOB_IDR REG_ACCESS(WoReg, 0x400E0E44U) /**< \brief (PIOB) Interrupt Disable Register */ -#define REG_PIOB_IMR REG_ACCESS(RoReg, 0x400E0E48U) /**< \brief (PIOB) Interrupt Mask Register */ -#define REG_PIOB_ISR REG_ACCESS(RoReg, 0x400E0E4CU) /**< \brief (PIOB) Interrupt Status Register */ -#define REG_PIOB_MDER REG_ACCESS(WoReg, 0x400E0E50U) /**< \brief (PIOB) Multi-driver Enable Register */ -#define REG_PIOB_MDDR REG_ACCESS(WoReg, 0x400E0E54U) /**< \brief (PIOB) Multi-driver Disable Register */ -#define REG_PIOB_MDSR REG_ACCESS(RoReg, 0x400E0E58U) /**< \brief (PIOB) Multi-driver Status Register */ -#define REG_PIOB_PUDR REG_ACCESS(WoReg, 0x400E0E60U) /**< \brief (PIOB) Pull-up Disable Register */ -#define REG_PIOB_PUER REG_ACCESS(WoReg, 0x400E0E64U) /**< \brief (PIOB) Pull-up Enable Register */ -#define REG_PIOB_PUSR REG_ACCESS(RoReg, 0x400E0E68U) /**< \brief (PIOB) Pad Pull-up Status Register */ -#define REG_PIOB_ABSR REG_ACCESS(RwReg, 0x400E0E70U) /**< \brief (PIOB) Peripheral AB Select Register */ -#define REG_PIOB_SCIFSR REG_ACCESS(WoReg, 0x400E0E80U) /**< \brief (PIOB) System Clock Glitch Input Filter Select Register */ -#define REG_PIOB_DIFSR REG_ACCESS(WoReg, 0x400E0E84U) /**< \brief (PIOB) Debouncing Input Filter Select Register */ -#define REG_PIOB_IFDGSR REG_ACCESS(RoReg, 0x400E0E88U) /**< \brief (PIOB) Glitch or Debouncing Input Filter Clock Selection Status Register */ -#define REG_PIOB_SCDR REG_ACCESS(RwReg, 0x400E0E8CU) /**< \brief (PIOB) Slow Clock Divider Debouncing Register */ -#define REG_PIOB_OWER REG_ACCESS(WoReg, 0x400E0EA0U) /**< \brief (PIOB) Output Write Enable */ -#define REG_PIOB_OWDR REG_ACCESS(WoReg, 0x400E0EA4U) /**< \brief (PIOB) Output Write Disable */ -#define REG_PIOB_OWSR REG_ACCESS(RoReg, 0x400E0EA8U) /**< \brief (PIOB) Output Write Status Register */ -#define REG_PIOB_AIMER REG_ACCESS(WoReg, 0x400E0EB0U) /**< \brief (PIOB) Additional Interrupt Modes Enable Register */ -#define REG_PIOB_AIMDR REG_ACCESS(WoReg, 0x400E0EB4U) /**< \brief (PIOB) Additional Interrupt Modes Disables Register */ -#define REG_PIOB_AIMMR REG_ACCESS(RoReg, 0x400E0EB8U) /**< \brief (PIOB) Additional Interrupt Modes Mask Register */ -#define REG_PIOB_ESR REG_ACCESS(WoReg, 0x400E0EC0U) /**< \brief (PIOB) Edge Select Register */ -#define REG_PIOB_LSR REG_ACCESS(WoReg, 0x400E0EC4U) /**< \brief (PIOB) Level Select Register */ -#define REG_PIOB_ELSR REG_ACCESS(RoReg, 0x400E0EC8U) /**< \brief (PIOB) Edge/Level Status Register */ -#define REG_PIOB_FELLSR REG_ACCESS(WoReg, 0x400E0ED0U) /**< \brief (PIOB) Falling Edge/Low Level Select Register */ -#define REG_PIOB_REHLSR REG_ACCESS(WoReg, 0x400E0ED4U) /**< \brief (PIOB) Rising Edge/ High Level Select Register */ -#define REG_PIOB_FRLHSR REG_ACCESS(RoReg, 0x400E0ED8U) /**< \brief (PIOB) Fall/Rise - Low/High Status Register */ -#define REG_PIOB_LOCKSR REG_ACCESS(RoReg, 0x400E0EE0U) /**< \brief (PIOB) Lock Status */ -#define REG_PIOB_WPMR REG_ACCESS(RwReg, 0x400E0EE4U) /**< \brief (PIOB) Write Protect Mode Register */ -#define REG_PIOB_WPSR REG_ACCESS(RoReg, 0x400E0EE8U) /**< \brief (PIOB) Write Protect Status Register */ -/* ========== Register definition for PIOC peripheral ========== */ -#define REG_PIOC_PER REG_ACCESS(WoReg, 0x400E1000U) /**< \brief (PIOC) PIO Enable Register */ -#define REG_PIOC_PDR REG_ACCESS(WoReg, 0x400E1004U) /**< \brief (PIOC) PIO Disable Register */ -#define REG_PIOC_PSR REG_ACCESS(RoReg, 0x400E1008U) /**< \brief (PIOC) PIO Status Register */ -#define REG_PIOC_OER REG_ACCESS(WoReg, 0x400E1010U) /**< \brief (PIOC) Output Enable Register */ -#define REG_PIOC_ODR REG_ACCESS(WoReg, 0x400E1014U) /**< \brief (PIOC) Output Disable Register */ -#define REG_PIOC_OSR REG_ACCESS(RoReg, 0x400E1018U) /**< \brief (PIOC) Output Status Register */ -#define REG_PIOC_IFER REG_ACCESS(WoReg, 0x400E1020U) /**< \brief (PIOC) Glitch Input Filter Enable Register */ -#define REG_PIOC_IFDR REG_ACCESS(WoReg, 0x400E1024U) /**< \brief (PIOC) Glitch Input Filter Disable Register */ -#define REG_PIOC_IFSR REG_ACCESS(RoReg, 0x400E1028U) /**< \brief (PIOC) Glitch Input Filter Status Register */ -#define REG_PIOC_SODR REG_ACCESS(WoReg, 0x400E1030U) /**< \brief (PIOC) Set Output Data Register */ -#define REG_PIOC_CODR REG_ACCESS(WoReg, 0x400E1034U) /**< \brief (PIOC) Clear Output Data Register */ -#define REG_PIOC_ODSR REG_ACCESS(RwReg, 0x400E1038U) /**< \brief (PIOC) Output Data Status Register */ -#define REG_PIOC_PDSR REG_ACCESS(RoReg, 0x400E103CU) /**< \brief (PIOC) Pin Data Status Register */ -#define REG_PIOC_IER REG_ACCESS(WoReg, 0x400E1040U) /**< \brief (PIOC) Interrupt Enable Register */ -#define REG_PIOC_IDR REG_ACCESS(WoReg, 0x400E1044U) /**< \brief (PIOC) Interrupt Disable Register */ -#define REG_PIOC_IMR REG_ACCESS(RoReg, 0x400E1048U) /**< \brief (PIOC) Interrupt Mask Register */ -#define REG_PIOC_ISR REG_ACCESS(RoReg, 0x400E104CU) /**< \brief (PIOC) Interrupt Status Register */ -#define REG_PIOC_MDER REG_ACCESS(WoReg, 0x400E1050U) /**< \brief (PIOC) Multi-driver Enable Register */ -#define REG_PIOC_MDDR REG_ACCESS(WoReg, 0x400E1054U) /**< \brief (PIOC) Multi-driver Disable Register */ -#define REG_PIOC_MDSR REG_ACCESS(RoReg, 0x400E1058U) /**< \brief (PIOC) Multi-driver Status Register */ -#define REG_PIOC_PUDR REG_ACCESS(WoReg, 0x400E1060U) /**< \brief (PIOC) Pull-up Disable Register */ -#define REG_PIOC_PUER REG_ACCESS(WoReg, 0x400E1064U) /**< \brief (PIOC) Pull-up Enable Register */ -#define REG_PIOC_PUSR REG_ACCESS(RoReg, 0x400E1068U) /**< \brief (PIOC) Pad Pull-up Status Register */ -#define REG_PIOC_ABSR REG_ACCESS(RwReg, 0x400E1070U) /**< \brief (PIOC) Peripheral AB Select Register */ -#define REG_PIOC_SCIFSR REG_ACCESS(WoReg, 0x400E1080U) /**< \brief (PIOC) System Clock Glitch Input Filter Select Register */ -#define REG_PIOC_DIFSR REG_ACCESS(WoReg, 0x400E1084U) /**< \brief (PIOC) Debouncing Input Filter Select Register */ -#define REG_PIOC_IFDGSR REG_ACCESS(RoReg, 0x400E1088U) /**< \brief (PIOC) Glitch or Debouncing Input Filter Clock Selection Status Register */ -#define REG_PIOC_SCDR REG_ACCESS(RwReg, 0x400E108CU) /**< \brief (PIOC) Slow Clock Divider Debouncing Register */ -#define REG_PIOC_OWER REG_ACCESS(WoReg, 0x400E10A0U) /**< \brief (PIOC) Output Write Enable */ -#define REG_PIOC_OWDR REG_ACCESS(WoReg, 0x400E10A4U) /**< \brief (PIOC) Output Write Disable */ -#define REG_PIOC_OWSR REG_ACCESS(RoReg, 0x400E10A8U) /**< \brief (PIOC) Output Write Status Register */ -#define REG_PIOC_AIMER REG_ACCESS(WoReg, 0x400E10B0U) /**< \brief (PIOC) Additional Interrupt Modes Enable Register */ -#define REG_PIOC_AIMDR REG_ACCESS(WoReg, 0x400E10B4U) /**< \brief (PIOC) Additional Interrupt Modes Disables Register */ -#define REG_PIOC_AIMMR REG_ACCESS(RoReg, 0x400E10B8U) /**< \brief (PIOC) Additional Interrupt Modes Mask Register */ -#define REG_PIOC_ESR REG_ACCESS(WoReg, 0x400E10C0U) /**< \brief (PIOC) Edge Select Register */ -#define REG_PIOC_LSR REG_ACCESS(WoReg, 0x400E10C4U) /**< \brief (PIOC) Level Select Register */ -#define REG_PIOC_ELSR REG_ACCESS(RoReg, 0x400E10C8U) /**< \brief (PIOC) Edge/Level Status Register */ -#define REG_PIOC_FELLSR REG_ACCESS(WoReg, 0x400E10D0U) /**< \brief (PIOC) Falling Edge/Low Level Select Register */ -#define REG_PIOC_REHLSR REG_ACCESS(WoReg, 0x400E10D4U) /**< \brief (PIOC) Rising Edge/ High Level Select Register */ -#define REG_PIOC_FRLHSR REG_ACCESS(RoReg, 0x400E10D8U) /**< \brief (PIOC) Fall/Rise - Low/High Status Register */ -#define REG_PIOC_LOCKSR REG_ACCESS(RoReg, 0x400E10E0U) /**< \brief (PIOC) Lock Status */ -#define REG_PIOC_WPMR REG_ACCESS(RwReg, 0x400E10E4U) /**< \brief (PIOC) Write Protect Mode Register */ -#define REG_PIOC_WPSR REG_ACCESS(RoReg, 0x400E10E8U) /**< \brief (PIOC) Write Protect Status Register */ -/* ========== Register definition for RSTC peripheral ========== */ -#define REG_RSTC_CR REG_ACCESS(WoReg, 0x400E1200U) /**< \brief (RSTC) Control Register */ -#define REG_RSTC_SR REG_ACCESS(RoReg, 0x400E1204U) /**< \brief (RSTC) Status Register */ -#define REG_RSTC_MR REG_ACCESS(RwReg, 0x400E1208U) /**< \brief (RSTC) Mode Register */ -/* ========== Register definition for SUPC peripheral ========== */ -#define REG_SUPC_CR REG_ACCESS(WoReg, 0x400E1210U) /**< \brief (SUPC) Supply Controller Control Register */ -#define REG_SUPC_SMMR REG_ACCESS(RwReg, 0x400E1214U) /**< \brief (SUPC) Supply Controller Supply Monitor Mode Register */ -#define REG_SUPC_MR REG_ACCESS(RwReg, 0x400E1218U) /**< \brief (SUPC) Supply Controller Mode Register */ -#define REG_SUPC_WUMR REG_ACCESS(RwReg, 0x400E121CU) /**< \brief (SUPC) Supply Controller Wake Up Mode Register */ -#define REG_SUPC_WUIR REG_ACCESS(RwReg, 0x400E1220U) /**< \brief (SUPC) Supply Controller Wake Up Inputs Register */ -#define REG_SUPC_SR REG_ACCESS(RoReg, 0x400E1224U) /**< \brief (SUPC) Supply Controller Status Register */ -/* ========== Register definition for RTT peripheral ========== */ -#define REG_RTT_MR REG_ACCESS(RwReg, 0x400E1230U) /**< \brief (RTT) Mode Register */ -#define REG_RTT_AR REG_ACCESS(RwReg, 0x400E1234U) /**< \brief (RTT) Alarm Register */ -#define REG_RTT_VR REG_ACCESS(RoReg, 0x400E1238U) /**< \brief (RTT) Value Register */ -#define REG_RTT_SR REG_ACCESS(RoReg, 0x400E123CU) /**< \brief (RTT) Status Register */ -/* ========== Register definition for WDT peripheral ========== */ -#define REG_WDT_CR REG_ACCESS(WoReg, 0x400E1250U) /**< \brief (WDT) Control Register */ -#define REG_WDT_MR REG_ACCESS(RwReg, 0x400E1254U) /**< \brief (WDT) Mode Register */ -#define REG_WDT_SR REG_ACCESS(RoReg, 0x400E1258U) /**< \brief (WDT) Status Register */ -/* ========== Register definition for RTC peripheral ========== */ -#define REG_RTC_CR REG_ACCESS(RwReg, 0x400E1260U) /**< \brief (RTC) Control Register */ -#define REG_RTC_MR REG_ACCESS(RwReg, 0x400E1264U) /**< \brief (RTC) Mode Register */ -#define REG_RTC_TIMR REG_ACCESS(RwReg, 0x400E1268U) /**< \brief (RTC) Time Register */ -#define REG_RTC_CALR REG_ACCESS(RwReg, 0x400E126CU) /**< \brief (RTC) Calendar Register */ -#define REG_RTC_TIMALR REG_ACCESS(RwReg, 0x400E1270U) /**< \brief (RTC) Time Alarm Register */ -#define REG_RTC_CALALR REG_ACCESS(RwReg, 0x400E1274U) /**< \brief (RTC) Calendar Alarm Register */ -#define REG_RTC_SR REG_ACCESS(RoReg, 0x400E1278U) /**< \brief (RTC) Status Register */ -#define REG_RTC_SCCR REG_ACCESS(WoReg, 0x400E127CU) /**< \brief (RTC) Status Clear Command Register */ -#define REG_RTC_IER REG_ACCESS(WoReg, 0x400E1280U) /**< \brief (RTC) Interrupt Enable Register */ -#define REG_RTC_IDR REG_ACCESS(WoReg, 0x400E1284U) /**< \brief (RTC) Interrupt Disable Register */ -#define REG_RTC_IMR REG_ACCESS(RoReg, 0x400E1288U) /**< \brief (RTC) Interrupt Mask Register */ -#define REG_RTC_VER REG_ACCESS(RoReg, 0x400E128CU) /**< \brief (RTC) Valid Entry Register */ -/* ========== Register definition for GPBR peripheral ========== */ -#define REG_GPBR_GPBR0 REG_ACCESS(RwReg, 0x400E1290U) /**< \brief (GPBR) General Purpose Backup Register 0 */ -#define REG_GPBR_GPBR1 REG_ACCESS(RwReg, 0x400E1294U) /**< \brief (GPBR) General Purpose Backup Register 1 */ -#define REG_GPBR_GPBR2 REG_ACCESS(RwReg, 0x400E1298U) /**< \brief (GPBR) General Purpose Backup Register 2 */ -#define REG_GPBR_GPBR3 REG_ACCESS(RwReg, 0x400E129CU) /**< \brief (GPBR) General Purpose Backup Register 3 */ -/*@}*/ - -/* ***************************************************************************** */ -/* PERIPHERAL ID DEFINITIONS FOR AT91SAM3U */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3U_id Peripheral Ids Definitions */ -/*@{*/ - -#define ID_SUPC ( 0) /**< \brief Supply Controller (SUPC) */ -#define ID_RSTC ( 1) /**< \brief Reset Controller (RSTC) */ -#define ID_RTC ( 2) /**< \brief Real Time Clock (RTC) */ -#define ID_RTT ( 3) /**< \brief Real Time Timer (RTT) */ -#define ID_WDT ( 4) /**< \brief Watchdog Timer (WDT) */ -#define ID_PMC ( 5) /**< \brief Power Management Controller (PMC) */ -#define ID_EFC0 ( 6) /**< \brief Enhanced Embedded Flash Controller 0 (EFC0) */ -#define ID_EFC1 ( 7) /**< \brief Enhanced Embedded Flash Controller 1 (EFC1) */ -#define ID_UART ( 8) /**< \brief Universal Asynchronous Receiver Transmitter (UART) */ -#define ID_SMC ( 9) /**< \brief Static Memory Controller (SMC) */ -#define ID_PIOA (10) /**< \brief Parallel I/O Controller A, (PIOA) */ -#define ID_PIOB (11) /**< \brief Parallel I/O Controller B (PIOB) */ -#define ID_PIOC (12) /**< \brief Parallel I/O Controller C (PIOC) */ -#define ID_USART0 (13) /**< \brief USART 0 (USART0) */ -#define ID_USART1 (14) /**< \brief USART 1 (USART1) */ -#define ID_USART2 (15) /**< \brief USART 2 (USART2) */ -#define ID_USART3 (16) /**< \brief USART 3 (USART3) */ -#define ID_HSMCI (17) /**< \brief High Speed Multimedia Card Interface (HSMCI) */ -#define ID_TWI0 (18) /**< \brief Two-Wire Interface 0 (TWI0) */ -#define ID_TWI1 (19) /**< \brief Two-Wire Interface 1 (TWI1) */ -#define ID_SPI (20) /**< \brief Serial Peripheral Interface (SPI) */ -#define ID_SSC (21) /**< \brief Synchronous Serial Controller (SSC) */ -#define ID_TC0 (22) /**< \brief Timer Counter 0 (TC0) */ -#define ID_TC1 (23) /**< \brief Timer Counter 1 (TC1) */ -#define ID_TC2 (24) /**< \brief Timer Counter 2 (TC2) */ -#define ID_PWM (25) /**< \brief Pulse Width Modulation Controller (PWM) */ -#define ID_ADC12B (26) /**< \brief 12-bit ADC Controller (ADC12B) */ -#define ID_ADC (27) /**< \brief 10-bit ADC Controller (ADC) */ -#define ID_DMAC (28) /**< \brief DMA Controller (DMAC) */ -#define ID_UDPHS (29) /**< \brief USB Device High Speed (UDPHS) */ -/*@}*/ - -/* ***************************************************************************** */ -/* BASE ADDRESS DEFINITIONS FOR AT91SAM3U */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3U_base Peripheral Base Address Definitions */ -/*@{*/ - -#define HSMCI CAST(Hsmci , 0x40000000U) /**< \brief (HSMCI ) Base Address */ -#define SSC CAST(Ssc , 0x40004000U) /**< \brief (SSC ) Base Address */ -#define SPI CAST(Spi , 0x40008000U) /**< \brief (SPI ) Base Address */ -#define TC0 CAST(Tc , 0x40080000U) /**< \brief (TC0 ) Base Address */ -#define TWI0 CAST(Twi , 0x40084000U) /**< \brief (TWI0 ) Base Address */ -#define PDC_TWI0 CAST(Pdc , 0x40084100U) /**< \brief (PDC_TWI0 ) Base Address */ -#define TWI1 CAST(Twi , 0x40088000U) /**< \brief (TWI1 ) Base Address */ -#define PDC_TWI1 CAST(Pdc , 0x40088100U) /**< \brief (PDC_TWI1 ) Base Address */ -#define PWM CAST(Pwm , 0x4008C000U) /**< \brief (PWM ) Base Address */ -#define PDC_PWM CAST(Pdc , 0x4008C100U) /**< \brief (PDC_PWM ) Base Address */ -#define USART0 CAST(Usart , 0x40090000U) /**< \brief (USART0 ) Base Address */ -#define PDC_USART0 CAST(Pdc , 0x40090100U) /**< \brief (PDC_USART0) Base Address */ -#define USART1 CAST(Usart , 0x40094000U) /**< \brief (USART1 ) Base Address */ -#define PDC_USART1 CAST(Pdc , 0x40094100U) /**< \brief (PDC_USART1) Base Address */ -#define USART2 CAST(Usart , 0x40098000U) /**< \brief (USART2 ) Base Address */ -#define PDC_USART2 CAST(Pdc , 0x40098100U) /**< \brief (PDC_USART2) Base Address */ -#define USART3 CAST(Usart , 0x4009C000U) /**< \brief (USART3 ) Base Address */ -#define PDC_USART3 CAST(Pdc , 0x4009C100U) /**< \brief (PDC_USART3) Base Address */ -#define UDPHS CAST(Udphs , 0x400A4000U) /**< \brief (UDPHS ) Base Address */ -#define ADC12B CAST(Adc12b , 0x400A8000U) /**< \brief (ADC12B ) Base Address */ -#define PDC_ADC12B CAST(Pdc , 0x400A8100U) /**< \brief (PDC_ADC12B) Base Address */ -#define ADC CAST(Adc , 0x400AC000U) /**< \brief (ADC ) Base Address */ -#define PDC_ADC CAST(Pdc , 0x400AC100U) /**< \brief (PDC_ADC ) Base Address */ -#define DMAC CAST(Dmac , 0x400B0000U) /**< \brief (DMAC ) Base Address */ -#define SMC CAST(Smc , 0x400E0000U) /**< \brief (SMC ) Base Address */ -#define MATRIX CAST(Matrix , 0x400E0200U) /**< \brief (MATRIX ) Base Address */ -#define PMC CAST(Pmc , 0x400E0400U) /**< \brief (PMC ) Base Address */ -#define UART CAST(Uart , 0x400E0600U) /**< \brief (UART ) Base Address */ -#define PDC_UART CAST(Pdc , 0x400E0700U) /**< \brief (PDC_UART ) Base Address */ -#define CHIPID CAST(Chipid , 0x400E0740U) /**< \brief (CHIPID ) Base Address */ -#define EFC0 CAST(Efc , 0x400E0800U) /**< \brief (EFC0 ) Base Address */ -#define EFC1 CAST(Efc , 0x400E0A00U) /**< \brief (EFC1 ) Base Address */ -#define PIOA CAST(Pio , 0x400E0C00U) /**< \brief (PIOA ) Base Address */ -#define PIOB CAST(Pio , 0x400E0E00U) /**< \brief (PIOB ) Base Address */ -#define PIOC CAST(Pio , 0x400E1000U) /**< \brief (PIOC ) Base Address */ -#define RSTC CAST(Rstc , 0x400E1200U) /**< \brief (RSTC ) Base Address */ -#define SUPC CAST(Supc , 0x400E1210U) /**< \brief (SUPC ) Base Address */ -#define RTT CAST(Rtt , 0x400E1230U) /**< \brief (RTT ) Base Address */ -#define WDT CAST(Wdt , 0x400E1250U) /**< \brief (WDT ) Base Address */ -#define RTC CAST(Rtc , 0x400E1260U) /**< \brief (RTC ) Base Address */ -#define GPBR CAST(Gpbr , 0x400E1290U) /**< \brief (GPBR ) Base Address */ -/*@}*/ - -/* ***************************************************************************** */ -/* PIO DEFINITIONS FOR AT91SAM3U */ -/* ***************************************************************************** */ -/** \addtogroup AT91SAM3U_pio Peripheral Pio Definitions */ -/*@{*/ - -#define PIO_PA0 (1 << 0) /**< \brief Pin Controlled by PA0 */ -#define PIO_PA1 (1 << 1) /**< \brief Pin Controlled by PA1 */ -#define PIO_PA2 (1 << 2) /**< \brief Pin Controlled by PA2 */ -#define PIO_PA3 (1 << 3) /**< \brief Pin Controlled by PA3 */ -#define PIO_PA4 (1 << 4) /**< \brief Pin Controlled by PA4 */ -#define PIO_PA5 (1 << 5) /**< \brief Pin Controlled by PA5 */ -#define PIO_PA6 (1 << 6) /**< \brief Pin Controlled by PA6 */ -#define PIO_PA7 (1 << 7) /**< \brief Pin Controlled by PA7 */ -#define PIO_PA8 (1 << 8) /**< \brief Pin Controlled by PA8 */ -#define PIO_PA9 (1 << 9) /**< \brief Pin Controlled by PA9 */ -#define PIO_PA10 (1 << 10) /**< \brief Pin Controlled by PA10 */ -#define PIO_PA11 (1 << 11) /**< \brief Pin Controlled by PA11 */ -#define PIO_PA12 (1 << 12) /**< \brief Pin Controlled by PA12 */ -#define PIO_PA13 (1 << 13) /**< \brief Pin Controlled by PA13 */ -#define PIO_PA14 (1 << 14) /**< \brief Pin Controlled by PA14 */ -#define PIO_PA15 (1 << 15) /**< \brief Pin Controlled by PA15 */ -#define PIO_PA16 (1 << 16) /**< \brief Pin Controlled by PA16 */ -#define PIO_PA17 (1 << 17) /**< \brief Pin Controlled by PA17 */ -#define PIO_PA18 (1 << 18) /**< \brief Pin Controlled by PA18 */ -#define PIO_PA19 (1 << 19) /**< \brief Pin Controlled by PA19 */ -#define PIO_PA20 (1 << 20) /**< \brief Pin Controlled by PA20 */ -#define PIO_PA21 (1 << 21) /**< \brief Pin Controlled by PA21 */ -#define PIO_PA22 (1 << 22) /**< \brief Pin Controlled by PA22 */ -#define PIO_PA23 (1 << 23) /**< \brief Pin Controlled by PA23 */ -#define PIO_PA24 (1 << 24) /**< \brief Pin Controlled by PA24 */ -#define PIO_PA25 (1 << 25) /**< \brief Pin Controlled by PA25 */ -#define PIO_PA26 (1 << 26) /**< \brief Pin Controlled by PA26 */ -#define PIO_PA27 (1 << 27) /**< \brief Pin Controlled by PA27 */ -#define PIO_PA28 (1 << 28) /**< \brief Pin Controlled by PA28 */ -#define PIO_PA29 (1 << 29) /**< \brief Pin Controlled by PA29 */ -#define PIO_PA30 (1 << 30) /**< \brief Pin Controlled by PA30 */ -#define PIO_PA31 (1 << 31) /**< \brief Pin Controlled by PA31 */ -#define PIO_PB0 (1 << 0) /**< \brief Pin Controlled by PB0 */ -#define PIO_PB1 (1 << 1) /**< \brief Pin Controlled by PB1 */ -#define PIO_PB2 (1 << 2) /**< \brief Pin Controlled by PB2 */ -#define PIO_PB3 (1 << 3) /**< \brief Pin Controlled by PB3 */ -#define PIO_PB4 (1 << 4) /**< \brief Pin Controlled by PB4 */ -#define PIO_PB5 (1 << 5) /**< \brief Pin Controlled by PB5 */ -#define PIO_PB6 (1 << 6) /**< \brief Pin Controlled by PB6 */ -#define PIO_PB7 (1 << 7) /**< \brief Pin Controlled by PB7 */ -#define PIO_PB8 (1 << 8) /**< \brief Pin Controlled by PB8 */ -#define PIO_PB9 (1 << 9) /**< \brief Pin Controlled by PB9 */ -#define PIO_PB10 (1 << 10) /**< \brief Pin Controlled by PB10 */ -#define PIO_PB11 (1 << 11) /**< \brief Pin Controlled by PB11 */ -#define PIO_PB12 (1 << 12) /**< \brief Pin Controlled by PB12 */ -#define PIO_PB13 (1 << 13) /**< \brief Pin Controlled by PB13 */ -#define PIO_PB14 (1 << 14) /**< \brief Pin Controlled by PB14 */ -#define PIO_PB15 (1 << 15) /**< \brief Pin Controlled by PB15 */ -#define PIO_PB16 (1 << 16) /**< \brief Pin Controlled by PB16 */ -#define PIO_PB17 (1 << 17) /**< \brief Pin Controlled by PB17 */ -#define PIO_PB18 (1 << 18) /**< \brief Pin Controlled by PB18 */ -#define PIO_PB19 (1 << 19) /**< \brief Pin Controlled by PB19 */ -#define PIO_PB20 (1 << 20) /**< \brief Pin Controlled by PB20 */ -#define PIO_PB21 (1 << 21) /**< \brief Pin Controlled by PB21 */ -#define PIO_PB22 (1 << 22) /**< \brief Pin Controlled by PB22 */ -#define PIO_PB23 (1 << 23) /**< \brief Pin Controlled by PB23 */ -#define PIO_PB24 (1 << 24) /**< \brief Pin Controlled by PB24 */ -#define PIO_PB25 (1 << 25) /**< \brief Pin Controlled by PB25 */ -#define PIO_PB26 (1 << 26) /**< \brief Pin Controlled by PB26 */ -#define PIO_PB27 (1 << 27) /**< \brief Pin Controlled by PB27 */ -#define PIO_PB28 (1 << 28) /**< \brief Pin Controlled by PB28 */ -#define PIO_PB29 (1 << 29) /**< \brief Pin Controlled by PB29 */ -#define PIO_PB30 (1 << 30) /**< \brief Pin Controlled by PB30 */ -#define PIO_PB31 (1 << 31) /**< \brief Pin Controlled by PB31 */ -#define PIO_PC0 (1 << 0) /**< \brief Pin Controlled by PC0 */ -#define PIO_PC1 (1 << 1) /**< \brief Pin Controlled by PC1 */ -#define PIO_PC2 (1 << 2) /**< \brief Pin Controlled by PC2 */ -#define PIO_PC3 (1 << 3) /**< \brief Pin Controlled by PC3 */ -#define PIO_PC4 (1 << 4) /**< \brief Pin Controlled by PC4 */ -#define PIO_PC5 (1 << 5) /**< \brief Pin Controlled by PC5 */ -#define PIO_PC6 (1 << 6) /**< \brief Pin Controlled by PC6 */ -#define PIO_PC7 (1 << 7) /**< \brief Pin Controlled by PC7 */ -#define PIO_PC8 (1 << 8) /**< \brief Pin Controlled by PC8 */ -#define PIO_PC9 (1 << 9) /**< \brief Pin Controlled by PC9 */ -#define PIO_PC10 (1 << 10) /**< \brief Pin Controlled by PC10 */ -#define PIO_PC11 (1 << 11) /**< \brief Pin Controlled by PC11 */ -#define PIO_PC12 (1 << 12) /**< \brief Pin Controlled by PC12 */ -#define PIO_PC13 (1 << 13) /**< \brief Pin Controlled by PC13 */ -#define PIO_PC14 (1 << 14) /**< \brief Pin Controlled by PC14 */ -#define PIO_PC15 (1 << 15) /**< \brief Pin Controlled by PC15 */ -#define PIO_PC16 (1 << 16) /**< \brief Pin Controlled by PC16 */ -#define PIO_PC17 (1 << 17) /**< \brief Pin Controlled by PC17 */ -#define PIO_PC18 (1 << 18) /**< \brief Pin Controlled by PC18 */ -#define PIO_PC19 (1 << 19) /**< \brief Pin Controlled by PC19 */ -#define PIO_PC20 (1 << 20) /**< \brief Pin Controlled by PC20 */ -#define PIO_PC21 (1 << 21) /**< \brief Pin Controlled by PC21 */ -#define PIO_PC22 (1 << 22) /**< \brief Pin Controlled by PC22 */ -#define PIO_PC23 (1 << 23) /**< \brief Pin Controlled by PC23 */ -#define PIO_PC24 (1 << 24) /**< \brief Pin Controlled by PC24 */ -#define PIO_PC25 (1 << 25) /**< \brief Pin Controlled by PC25 */ -#define PIO_PC26 (1 << 26) /**< \brief Pin Controlled by PC26 */ -#define PIO_PC27 (1 << 27) /**< \brief Pin Controlled by PC27 */ -#define PIO_PC28 (1 << 28) /**< \brief Pin Controlled by PC28 */ -#define PIO_PC29 (1 << 29) /**< \brief Pin Controlled by PC29 */ -#define PIO_PC30 (1 << 30) /**< \brief Pin Controlled by PC30 */ -#define PIO_PC31 (1 << 31) /**< \brief Pin Controlled by PC31 */ -/* ========== Pio definition for HSMCI peripheral ========== */ -#define PIO_PA4A_MCCDA (1 << 4) /**< \brief Hsmci signal: MCCDA */ -#define PIO_PA3A_MCCK (1 << 3) /**< \brief Hsmci signal: MCCK */ -#define PIO_PA5A_MCDA0 (1 << 5) /**< \brief Hsmci signal: MCDA0 */ -#define PIO_PA6A_MCDA1 (1 << 6) /**< \brief Hsmci signal: MCDA1 */ -#define PIO_PA7A_MCDA2 (1 << 7) /**< \brief Hsmci signal: MCDA2 */ -#define PIO_PA8A_MCDA3 (1 << 8) /**< \brief Hsmci signal: MCDA3 */ -#define PIO_PC28B_MCDA4 (1 << 28) /**< \brief Hsmci signal: MCDA4 */ -#define PIO_PC29B_MCDA5 (1 << 29) /**< \brief Hsmci signal: MCDA5 */ -#define PIO_PC30B_MCDA6 (1 << 30) /**< \brief Hsmci signal: MCDA6 */ -#define PIO_PC31B_MCDA7 (1 << 31) /**< \brief Hsmci signal: MCDA7 */ -/* ========== Pio definition for SSC peripheral ========== */ -#define PIO_PA27A_RD (1 << 27) /**< \brief Ssc signal: RD */ -#define PIO_PA31A_RF (1 << 31) /**< \brief Ssc signal: RF */ -#define PIO_PA29A_RK (1 << 29) /**< \brief Ssc signal: RK */ -#define PIO_PA26A_TD (1 << 26) /**< \brief Ssc signal: TD */ -#define PIO_PA30A_TF (1 << 30) /**< \brief Ssc signal: TF */ -#define PIO_PA28A_TK (1 << 28) /**< \brief Ssc signal: TK */ -/* ========== Pio definition for SPI peripheral ========== */ -#define PIO_PA13A_MISO (1 << 13) /**< \brief Spi signal: MISO */ -#define PIO_PA14A_MOSI (1 << 14) /**< \brief Spi signal: MOSI */ -#define PIO_PA16A_NPCS0 (1 << 16) /**< \brief Spi signal: NPCS0 */ -#define PIO_PA0B_NPCS1 (1 << 0) /**< \brief Spi signal: NPCS1 */ -#define PIO_PC19B_NPCS1 (1 << 19) /**< \brief Spi signal: NPCS1 */ -#define PIO_PC3B_NPCS1 (1 << 3) /**< \brief Spi signal: NPCS1 */ -#define PIO_PA1B_NPCS2 (1 << 1) /**< \brief Spi signal: NPCS2 */ -#define PIO_PC14B_NPCS2 (1 << 14) /**< \brief Spi signal: NPCS2 */ -#define PIO_PC4B_NPCS2 (1 << 4) /**< \brief Spi signal: NPCS2 */ -#define PIO_PA19B_NPCS3 (1 << 19) /**< \brief Spi signal: NPCS3 */ -#define PIO_PC5B_NPCS3 (1 << 5) /**< \brief Spi signal: NPCS3 */ -#define PIO_PA15A_SPCK (1 << 15) /**< \brief Spi signal: SPCK */ -/* ========== Pio definition for TC0 peripheral ========== */ -#define PIO_PA2A_TCLK0 (1 << 2) /**< \brief Tc0 signal: TCLK0 */ -#define PIO_PB4A_TCLK1 (1 << 4) /**< \brief Tc0 signal: TCLK1 */ -#define PIO_PA26B_TCLK2 (1 << 26) /**< \brief Tc0 signal: TCLK2 */ -#define PIO_PA1A_TIOA0 (1 << 1) /**< \brief Tc0 signal: TIOA0 */ -#define PIO_PB5A_TIOA1 (1 << 5) /**< \brief Tc0 signal: TIOA1 */ -#define PIO_PA30B_TIOA2 (1 << 30) /**< \brief Tc0 signal: TIOA2 */ -#define PIO_PA0A_TIOB0 (1 << 0) /**< \brief Tc0 signal: TIOB0 */ -#define PIO_PB6A_TIOB1 (1 << 6) /**< \brief Tc0 signal: TIOB1 */ -#define PIO_PA31B_TIOB2 (1 << 31) /**< \brief Tc0 signal: TIOB2 */ -/* ========== Pio definition for TWI0 peripheral ========== */ -#define PIO_PA10A_TWCK0 (1 << 10) /**< \brief Twi0 signal: TWCK0 */ -#define PIO_PA9A_TWD0 (1 << 9) /**< \brief Twi0 signal: TWD0 */ -/* ========== Pio definition for TWI1 peripheral ========== */ -#define PIO_PA25A_TWCK1 (1 << 25) /**< \brief Twi1 signal: TWCK1 */ -#define PIO_PA24A_TWD1 (1 << 24) /**< \brief Twi1 signal: TWD1 */ -/* ========== Pio definition for PWM peripheral ========== */ -#define PIO_PA11B_PWMFI0 (1 << 11) /**< \brief Pwm signal: PWMFI0 */ -#define PIO_PA12B_PWMFI1 (1 << 12) /**< \brief Pwm signal: PWMFI1 */ -#define PIO_PA18B_PWMFI2 (1 << 18) /**< \brief Pwm signal: PWMFI2 */ -#define PIO_PA28B_PWMH0 (1 << 28) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA4B_PWMH0 (1 << 4) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PB0A_PWMH0 (1 << 0) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PB13B_PWMH0 (1 << 13) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PC24B_PWMH0 (1 << 24) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA29B_PWMH1 (1 << 29) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA5B_PWMH1 (1 << 5) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PB1A_PWMH1 (1 << 1) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PB14B_PWMH1 (1 << 14) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PC25B_PWMH1 (1 << 25) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA15B_PWMH2 (1 << 15) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA6B_PWMH2 (1 << 6) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PB15B_PWMH2 (1 << 15) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PB2A_PWMH2 (1 << 2) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PC26B_PWMH2 (1 << 26) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA20B_PWMH3 (1 << 20) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PB16B_PWMH3 (1 << 16) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PB3A_PWMH3 (1 << 3) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PC27B_PWMH3 (1 << 27) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PA7B_PWML0 (1 << 7) /**< \brief Pwm signal: PWML0 */ -#define PIO_PB17B_PWML0 (1 << 17) /**< \brief Pwm signal: PWML0 */ -#define PIO_PB25B_PWML0 (1 << 25) /**< \brief Pwm signal: PWML0 */ -#define PIO_PC29A_PWML0 (1 << 29) /**< \brief Pwm signal: PWML0 */ -#define PIO_PC6B_PWML0 (1 << 6) /**< \brief Pwm signal: PWML0 */ -#define PIO_PA8B_PWML1 (1 << 8) /**< \brief Pwm signal: PWML1 */ -#define PIO_PB18B_PWML1 (1 << 18) /**< \brief Pwm signal: PWML1 */ -#define PIO_PB26B_PWML1 (1 << 26) /**< \brief Pwm signal: PWML1 */ -#define PIO_PC30A_PWML1 (1 << 30) /**< \brief Pwm signal: PWML1 */ -#define PIO_PC7B_PWML1 (1 << 7) /**< \brief Pwm signal: PWML1 */ -#define PIO_PA9B_PWML2 (1 << 9) /**< \brief Pwm signal: PWML2 */ -#define PIO_PB19B_PWML2 (1 << 19) /**< \brief Pwm signal: PWML2 */ -#define PIO_PB27B_PWML2 (1 << 27) /**< \brief Pwm signal: PWML2 */ -#define PIO_PC31A_PWML2 (1 << 31) /**< \brief Pwm signal: PWML2 */ -#define PIO_PC8B_PWML2 (1 << 8) /**< \brief Pwm signal: PWML2 */ -#define PIO_PA10B_PWML3 (1 << 10) /**< \brief Pwm signal: PWML3 */ -#define PIO_PB20B_PWML3 (1 << 20) /**< \brief Pwm signal: PWML3 */ -#define PIO_PB28B_PWML3 (1 << 28) /**< \brief Pwm signal: PWML3 */ -#define PIO_PC16B_PWML3 (1 << 16) /**< \brief Pwm signal: PWML3 */ -#define PIO_PC9B_PWML3 (1 << 9) /**< \brief Pwm signal: PWML3 */ -/* ========== Pio definition for USART0 peripheral ========== */ -#define PIO_PB8A_CTS0 (1 << 8) /**< \brief Usart0 signal: CTS0 */ -#define PIO_PB11B_DCD0 (1 << 11) /**< \brief Usart0 signal: DCD0 */ -#define PIO_PB10B_DSR0 (1 << 10) /**< \brief Usart0 signal: DSR0 */ -#define PIO_PB9B_DTR0 (1 << 9) /**< \brief Usart0 signal: DTR0 */ -#define PIO_PB12B_RI0 (1 << 12) /**< \brief Usart0 signal: RI0 */ -#define PIO_PB7A_RTS0 (1 << 7) /**< \brief Usart0 signal: RTS0 */ -#define PIO_PA19A_RXD0 (1 << 19) /**< \brief Usart0 signal: RXD0 */ -#define PIO_PA17A_SCK0 (1 << 17) /**< \brief Usart0 signal: SCK0 */ -#define PIO_PA18A_TXD0 (1 << 18) /**< \brief Usart0 signal: TXD0 */ -/* ========== Pio definition for USART1 peripheral ========== */ -#define PIO_PA23B_CTS1 (1 << 23) /**< \brief Usart1 signal: CTS1 */ -#define PIO_PA22B_RTS1 (1 << 22) /**< \brief Usart1 signal: RTS1 */ -#define PIO_PA21A_RXD1 (1 << 21) /**< \brief Usart1 signal: RXD1 */ -#define PIO_PA24B_SCK1 (1 << 24) /**< \brief Usart1 signal: SCK1 */ -#define PIO_PA20A_TXD1 (1 << 20) /**< \brief Usart1 signal: TXD1 */ -/* ========== Pio definition for USART2 peripheral ========== */ -#define PIO_PB22B_CTS2 (1 << 22) /**< \brief Usart2 signal: CTS2 */ -#define PIO_PB21B_RTS2 (1 << 21) /**< \brief Usart2 signal: RTS2 */ -#define PIO_PA23A_RXD2 (1 << 23) /**< \brief Usart2 signal: RXD2 */ -#define PIO_PA25B_SCK2 (1 << 25) /**< \brief Usart2 signal: SCK2 */ -#define PIO_PA22A_TXD2 (1 << 22) /**< \brief Usart2 signal: TXD2 */ -/* ========== Pio definition for USART3 peripheral ========== */ -#define PIO_PC10B_CTS3 (1 << 10) /**< \brief Usart3 signal: CTS3 */ -#define PIO_PC11B_RTS3 (1 << 11) /**< \brief Usart3 signal: RTS3 */ -#define PIO_PC13B_RXD3 (1 << 13) /**< \brief Usart3 signal: RXD3 */ -#define PIO_PC19A_SCK3 (1 << 19) /**< \brief Usart3 signal: SCK3 */ -#define PIO_PC12B_TXD3 (1 << 12) /**< \brief Usart3 signal: TXD3 */ -/* ========== Pio definition for ADC12B peripheral ========== */ -#define PIO_PA2B_AD12BTRG (1 << 2) /**< \brief Adc12b signal: AD12BTRG */ -/* ========== Pio definition for ADC peripheral ========== */ -#define PIO_PA17B_ADTRG (1 << 17) /**< \brief Adc signal: ADTRG */ -/* ========== Pio definition for PMC peripheral ========== */ -#define PIO_PA21B_PCK0 (1 << 21) /**< \brief Pmc signal: PCK0 */ -#define PIO_PA27B_PCK0 (1 << 27) /**< \brief Pmc signal: PCK0 */ -#define PIO_PA3B_PCK1 (1 << 3) /**< \brief Pmc signal: PCK1 */ -#define PIO_PB24B_PCK1 (1 << 24) /**< \brief Pmc signal: PCK1 */ -#define PIO_PB23B_PCK2 (1 << 23) /**< \brief Pmc signal: PCK2 */ -/* ========== Pio definition for UART peripheral ========== */ -#define PIO_PA11A_URXD (1 << 11) /**< \brief Uart signal: URXD */ -#define PIO_PA12A_UTXD (1 << 12) /**< \brief Uart signal: UTXD */ -/*@}*/ - -/* ***************************************************************************** */ -/* MEMORY MAPPING DEFINITIONS FOR AT91SAM3U */ -/* ***************************************************************************** */ - -#define AT91C_IRAM (0x20000000) /**< Internal RAM base address */ -#define AT91C_IFLASH (0x00080000) /**< Internal Flash base address */ -//#define AT91C_IFLASH (0x00100000) /**< Internal Flash base address */ -#define AT91C_IROM (0x00180000) /**< Internal ROM base address */ -//#define AT91C_IRAM (0x20000000) /**< Internal RAM base address */ -//#define AT91C_IRAM (0x20080000) /**< Internal RAM base address */ - -#ifdef __cplusplus -} -#endif - -/*@}*/ - -#endif /* AT91SAM3U_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/chip.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/chip.h deleted file mode 100644 index 03133de4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/chip.h +++ /dev/null @@ -1,77 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - -#ifndef CHIP_H -#define CHIP_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ - - -//ARM core features - -// ARM core definition. -#define cortexm3 - -// family definition. -#define at91sam3u - -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ - -//IP FEATURES - -// EFC GPNVM number -#define CHIP_EFC_NUM_GPNVMS 3 - -// Indicates chip has an Enhanced EFC. -#define CHIP_FLASH_EEFC - -// DMA channels number -#define CHIP_DMA_CHANNEL_NUM 4 - -// Indicate chip has a nandflash controller. -#define CHIP_NAND_CTRL - -//------------------------------------------------------------------------------ - - -//Misc - -//------------------------------------------------------------------------------ - -#endif //#ifndef CHIP_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/flash.icf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/flash.icf deleted file mode 100644 index a8911758..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/flash.icf +++ /dev/null @@ -1,47 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ -/*-Vector table start*/ -define symbol __ICFEDIT_vector_start__ = 0x00080000; /*Add for CMSIS*/ -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000; -define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF; -define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000; -define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF; -define symbol __ICFEDIT_region_ROM0_start__ = 0x00080000; -define symbol __ICFEDIT_region_ROM0_end__ = 0x0009FFFF; -define symbol __ICFEDIT_region_ROM1_start__ = 0x00100000; -define symbol __ICFEDIT_region_ROM1_end__ = 0x0011FFFF; -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x800; -define symbol __ICFEDIT_size_heap__ = 0x200; -/*-Specials-*/ -/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/ -/*define symbol __ICFEDIT_size_vectors__ = 0x100;*/ /*Referenced for CMSIS*/ -/*-Exports-*/ -/*export symbol __ICFEDIT_region_RAM_VECT_start__;*/ -export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/ -/**** End of ICF editor section. ###ICF###*/ - -define memory mem with size = 4G; -/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ /*Referenced for CMSIS*/ -/*define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/ -define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__]; -define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; -/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] | - mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/ -define region ROM0_region = mem:[from __ICFEDIT_region_ROM0_start__ to __ICFEDIT_region_ROM0_end__]; -define region ROM1_region = mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__]; - -/*define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { };*/ -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - -initialize by copy { readwrite }; -do not initialize { section .noinit }; - -/*place at start of ROM0_region { readonly section .vectors };*/ /*Referenced for CMSIS*/ -place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; /*Add for CMSIS*/ -place in ROM0_region { readonly }; -place in RAM0_region { readwrite, block CSTACK, block HEAP }; -/*place in RAM_VECT_region { block RamVect };*/ /*Referenced for CMSIS*/ \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/flash.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/flash.lds deleted file mode 100644 index 0355f922..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/flash.lds +++ /dev/null @@ -1,87 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal FLASH on the AT91SAM3U4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(ResetException) - -/* Vector Definition */ -/* vector is put at very begin adress of SRAM0, the preserved size is 0x100 */ -_vect_start = 0x20000000; - -/* Memory Spaces Definitions */ -MEMORY -{ - sram0 (W!RX) : ORIGIN = 0x20000100, LENGTH = 0x00007F00 /* Sram0, 32K */ - sram1 (W!RX) : ORIGIN = 0x20080000, LENGTH = 0x00004000 /* Sram1, 16K */ - flash0 (W!RX) : ORIGIN = 0x00080000, LENGTH = 0x00020000 /* Flash0, 128K */ - flash1 (W!RX) : ORIGIN = 0x00100000, LENGTH = 0x00020000 /* Flash1, 128K */ -} - -SECTIONS -{ - .fixed : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) - *(.text*) - *(.rodata*) - *(.glue_7) - *(.glue_7t) - . = ALIGN(4); - _efixed = .; /* End of text section */ - } >flash0 - - .relocate : AT (_efixed) - { - . = ALIGN(4); - _srelocate = .; - *(.ramfunc); - *(.data); - . = ALIGN(4); - _erelocate = .; - } >sram0 - - .bss (NOLOAD) : { - . = ALIGN(4); - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >sram0 - - /* Stack in the end of SRAM0 */ - _estack = 0x20007FFC; -} -end = .; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/flash.sct b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/flash.sct deleted file mode 100644 index 3ec4fac7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/flash.sct +++ /dev/null @@ -1,58 +0,0 @@ -; * ---------------------------------------------------------------------------- -; * ATMEL Microcontroller Software Support -; * ---------------------------------------------------------------------------- -; * Copyright (c) 2008, Atmel Corporation -; * -; * All rights reserved. -; * -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * -; * - Redistributions of source code must retain the above copyright notice, -; * this list of conditions and the disclaimer below. -; * -; * Atmel's name may not be used to endorse or promote products derived from -; * this software without specific prior written permission. -; * -; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR -; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE -; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, -; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, -; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -; * ---------------------------------------------------------------------------- - -; *------------------------------------------------------------------------------ -; * Linker scatter for running in internal SRAM on the AT91SAM3U4 -; *----------------------------------------------------------------------------*/ - -; /* vector is put at very begin adress of SRAM0, the preserved size is 0x100 */ -Load_region 0x80000 0x20000 -{ - ; Flash 128K - Vector_region 0x80000 - { - board_cstartup_keil.o (vectors, +FIRST) - } - Fixed_region +0 - { - .ANY (+RO) - } - ; SRAM0 32K - Relocate_region 0x20000100 (0x8000-0x100) - { - .ANY (+RW +ZI) - } - ; Configure Stack and Heap - ARM_LIB_HEAP 0x20007000 EMPTY 0x400 - { - } - - ARM_LIB_STACK 0x20007FFC EMPTY -0x400 - { - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/psram.icf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/psram.icf deleted file mode 100644 index bdd5f4d1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/psram.icf +++ /dev/null @@ -1,43 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ -/*-Vector table start*/ -define symbol __ICFEDIT_vector_start__ = 0x60000000; /*Add for CMSIS*/ -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000; -define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF; -define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000; -define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF; -define symbol __ICFEDIT_region_PSRAM_start__ = 0x60000000; -define symbol __ICFEDIT_region_RSRAM_end__ = 0x600FFFFF; -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x400; -define symbol __ICFEDIT_size_heap__ = 0x200; -/*-Specials-*/ -/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/ -/*define symbol __ICFEDIT_size_vectors__ = 0x100;*/ /*Referenced for CMSIS*/ -/*-Exports-*/ -export symbol __ICFEDIT_region_RAM_VECT_start__; /*Add for CMSIS*/ -/**** End of ICF editor section. ###ICF###*/ - -define memory mem with size = 4G; -/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ -/*define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/ -define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__]; -define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; -/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] | - mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/ -define region PSRAM_region = mem:[from __ICFEDIT_region_PSRAM_start__ to __ICFEDIT_region_RSRAM_end__]; - -/*define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { };*/ /*Referenced for CMSIS*/ -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - -initialize by copy { readwrite }; -do not initialize { section .noinit }; - -/*place at start of PSRAM_region { readonly section .vectors };*/ /*Referenced for CMSIS*/ -place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; /*Add for CMSIS*/ -place in PSRAM_region { readonly }; -place in PSRAM_region { readwrite, block CSTACK, block HEAP }; -/*place in RAM_VECT_region { block RamVect };*/ /*Referenced for CMSIS*/ \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/psram.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/psram.lds deleted file mode 100644 index b5b8c8d5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/psram.lds +++ /dev/null @@ -1,86 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal PSRAM on the AT91SAM3U4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(ResetException) - -/* Vector Definition */ -/* vector is put at very begin adress of SRAM0, the preserved size is 0x100 */ -_vect_start = 0x20000000; - -/* Memory Spaces Definitions */ -MEMORY -{ - sram0 (W!RX) : ORIGIN = 0x20000100, LENGTH = 0x00007F00 /* Sram0, 32K */ - sram1 (W!RX) : ORIGIN = 0x20080000, LENGTH = 0x00004000 /* Sram1, 16K */ - psram (W!RX) : ORIGIN = 0x60000000, LENGTH = 0x00100000 /* PSRAM, 1M */ -} - -SECTIONS -{ - .fixed : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) - *(.text*) - *(.rodata*) - *(.glue_7) - *(.glue_7t) - *(.data) - . = ALIGN(4); - _efixed = .; /* End of text section */ - } >psram - - .relocate : AT (_efixed) - { - . = ALIGN(4); - _srelocate = .; - *(.ramfunc); - . = ALIGN(4); - _erelocate = .; - } >sram0 - - .bss (NOLOAD) : { - . = ALIGN(4); - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >psram - - /* Stack in the end of SRAM0 */ - _estack = 0x20007FFC; -} -end = .; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/psram.sct b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/psram.sct deleted file mode 100644 index 162f57b6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/psram.sct +++ /dev/null @@ -1,59 +0,0 @@ -; * ---------------------------------------------------------------------------- -; * ATMEL Microcontroller Software Support -; * ---------------------------------------------------------------------------- -; * Copyright (c) 2008, Atmel Corporation -; * -; * All rights reserved. -; * -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * -; * - Redistributions of source code must retain the above copyright notice, -; * this list of conditions and the disclaimer below. -; * -; * Atmel's name may not be used to endorse or promote products derived from -; * this software without specific prior written permission. -; * -; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR -; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE -; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, -; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, -; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -; * ---------------------------------------------------------------------------- - -; *------------------------------------------------------------------------------ -; * Linker scatter for running in internal SRAM on the AT91SAM3U4 -; *----------------------------------------------------------------------------*/ - -; /* vector is put at very begin adress of SRAM0, the preserved size is 0x100 */ -Load_region 0x60000000 0x100000 -{ - ; PSRAM 1M - Vector_region 0x60000000 - { - board_cstartup_keil.o (vectors, +FIRST) - } - - Fixed_region +0 - { - .ANY (+RO) - .ANY (+RW +ZI) - } - - ; SRAM0 32K - IVector_region 0x20000000 0x100 {} - - ; Configure Stack and Heap - ARM_LIB_HEAP 0x20007000 EMPTY 0x400 - { - } - - ARM_LIB_STACK 0x20007FFC EMPTY -0x400 - { - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/sram.icf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/sram.icf deleted file mode 100644 index 242942af..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/sram.icf +++ /dev/null @@ -1,33 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ -/*-Vector table start*/ -define symbol __ICFEDIT_vector_start__ = 0x20000000; -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000; -define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF; -define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000; -define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF; -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x400; -define symbol __ICFEDIT_size_heap__ = 0x200; -/*-Exports-*/ -export symbol __ICFEDIT_vector_start__; -/**** End of ICF editor section. ###ICF###*/ - -define memory mem with size = 4G; -define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__]; -define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; -/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] | - mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ - -/* define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { }; */ -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - -initialize by copy { readwrite }; -do not initialize { section .noinit }; - -place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; -place in RAM0_region { readonly }; -place in RAM1_region { readwrite, block CSTACK, block HEAP }; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/sram.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/sram.lds deleted file mode 100644 index 12029473..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/sram.lds +++ /dev/null @@ -1,84 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal SRAM on the AT91SAM3U4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(ResetException) - -/* Vector Definition */ -_vect_start = 0x20000000; - -/* Memory Spaces Definitions */ -MEMORY -{ - sram0 (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x00008000 /* Sram0, 32K */ - sram1 (W!RX) : ORIGIN = 0x20080000, LENGTH = 0x00004000 /* Sram1, 16K */ -} - -SECTIONS -{ - .fixed : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) - *(.text*) - *(.ramfunc) - *(.rodata*) - *(.glue_7) - *(.glue_7t) - . = ALIGN(4); - _efixed = .; /* End of text section */ - } > sram0 - - .relocate : AT (_efixed) - { - . = ALIGN(4); - _srelocate = .; - *(.data) - . = ALIGN(4); - _erelocate = .; - } >sram1 - - .bss (NOLOAD) : { - . = ALIGN(4); - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >sram1 - - /* Stack in the end of SRAM1 */ - _estack = 0x20083FFC; -} -end = .; diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/sram.sct b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/sram.sct deleted file mode 100644 index f279cf79..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/sram.sct +++ /dev/null @@ -1,60 +0,0 @@ -; * ---------------------------------------------------------------------------- -; * ATMEL Microcontroller Software Support -; * ---------------------------------------------------------------------------- -; * Copyright (c) 2008, Atmel Corporation -; * -; * All rights reserved. -; * -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * -; * - Redistributions of source code must retain the above copyright notice, -; * this list of conditions and the disclaimer below. -; * -; * Atmel's name may not be used to endorse or promote products derived from -; * this software without specific prior written permission. -; * -; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR -; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE -; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, -; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, -; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -; * ---------------------------------------------------------------------------- - -; *------------------------------------------------------------------------------ -; * Linker scatter for running in internal SRAM on the AT91SAM3U4 -; *----------------------------------------------------------------------------*/ - -Load_region 0x20000000 0x8000 -{ - ; RAM0 32K - Vector_region 0x20000000 0x100 - { - board_cstartup_keil.o (vectors, +FIRST) - } - - Fixed_region +0 - { - .ANY (+RO) - } - - ; RAM1 16K - Relocate_region 0x20080000 0x4000 - { - .ANY (+RW +ZI) - } - - ; Configure Stack and Heap - ARM_LIB_HEAP 0x20083000 EMPTY 0x400 - { - } - - ARM_LIB_STACK 0x20083FFC EMPTY -0x400 - { - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/sram_samba.lds b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/sram_samba.lds deleted file mode 100644 index 226b4595..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/at91sam3u4/sram_samba.lds +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Linker script for running in internal SRAM on the AT91SAM3U4 - *----------------------------------------------------------------------------*/ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(entry) - -/* Memory Spaces Definitions */ -MEMORY -{ - romcodesram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x01000 - sram0 (W!RX) : ORIGIN = 0x20001000, LENGTH = 0x00007000 /* Sram0, 32K */ -} - -/* Entry point */ -/*ENTRY (ResetException)*/ - -SECTIONS -{ - /* startup code in the .isr_vector */ - .text : - { - . = ALIGN(4); - _stext = .; - KEEP(*(.isr_vector .isr_vector.*)) - *(.mailbox) - *(.text .text.*) - *(.rodata .rodata.*) - *(.glue_7) - *(.glue_7t) - *(.gcc_except_table) - *(.rodata .rodata*) - *(.gnu.linkonce.r.*) - . = ALIGN(4); - _etext = .; - } > sram0 - - /* data */ - .data : - { - . = ALIGN(4); - _sidata = .; - _sdata = .; - - *(.data) - *(.data.*) - . = ALIGN(4); - _edata = .; - } > sram0 - - .bss (NOLOAD) : { - _szero = .; - *(.bss) - . = ALIGN(4); - _ezero = .; - } >sram0 - - /* Stack in SRAM0 */ - _sstack = 0x20008000; -} -end = .; - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board.h deleted file mode 100644 index 766ae474..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board.h +++ /dev/null @@ -1,665 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/** - * \page sam3s_ek_board_desc "SAM3S-EK - Board Description" - * - * \section - * A file is dedicated to descibe the AT91SAM3S-EK board. - * - * \section Contents - * - The code for booting the board is provided by board_cstartup.S and - * board_lowlevel.c. - * - For using board PIOs, board characteristics (clock, etc.) and external - * components, see board.h. - * - For manipulating memories (remapping, SDRAM, etc.), see board_memories.h. - * - * To get more software details and the full list of parameters related to the - * SAM3S-EK board configuration, please have a look at the source file: \n - * \ref board.h\n - * - * This file can be used as a template and modified to fit a custom board, with - * specific PIOs usage or memory connections. - **/ -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -/// \file board.h -/// -/// \par Purpose -/// -/// Definition of AT91SAM3S-EK characteristics, AT91SAM3S-dependant PIOs and -/// external components interfacing. -/// -/// \par Usage -/// -# For operating frequency information, see "SAM3S-EK - Operating frequencies". -/// -# For using portable PIO definitions, see "SAM3S-EK - PIO definitions". -/// -# Several USB definitions are included here (see "SAM3S-EK - USB device"). -//------------------------------------------------------------------------------ - -#ifndef BOARD_H -#define BOARD_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */ -#include -#include - -#if defined(at91sam3s4) - #include "at91sam3s4/chip.h" - #include "at91sam3s4/AT91SAM3S4.h" -#else - #error Board does not support the specified chip. -#endif - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \par -/// This page lists several definition related to the board description. -/// -/// Definitions -/// - BOARD_NAME - -/// Name of the board. -#define BOARD_NAME "AT91SAM3S-EK" -/// Board definition. -#define at91sam3sek -/// Family definition (already defined). -#define at91sam3s -/// Core definition -#define cortexm3 - -//#define BOARD_REV_A -#define BOARD_REV_B - -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \par sam3s_ek_opfreq "SAM3S-EK - Operating frequencies" -/// This page lists several definition related to the board operating frequency -/// (when using the initialization done by board_lowlevel.c). -/// -/// !Definitions -/// - BOARD_MAINOSC -/// - BOARD_MCK - -/// Frequency of the board main oscillator. -#define BOARD_MAINOSC 12000000 - -/// Master clock frequency (when using board_lowlevel.c). -//#define BOARD_MCK 48000000 -#define BOARD_MCK 64000000 - -//------------------------------------------------------------------------------ -// ADC -//------------------------------------------------------------------------------ - -/// Startup time max, return from Idle mode (in µs) -#define ADC_STARTUP_TIME_MAX 15 -/// Track and hold Acquisition Time min (in ns) -#define ADC_TRACK_HOLD_TIME_MIN 1200 - -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// USB attributes configuration descriptor (bus or self powered, remote wakeup) -//#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP -#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \par sam3s_ek_piodef "SAM3S-EK - PIO definitions" -/// This pages lists all the pio definitions contained in board.h. The constants -/// are named using the following convention: PIN_* for a constant which defines -/// a single Pin instance (but may include several PIOs sharing the same -/// controller), and PINS_* for a list of Pin instances. -/// -/// !ADC -/// - PIN_ADC0_AD0 -/// - PIN_ADC0_AD1 -/// - PIN_ADC0_AD2 -/// - PIN_ADC0_AD3 -/// - PIN_ADC0_AD4 -/// - PIN_ADC0_AD5 -/// - PIN_ADC0_AD6 -/// - PIN_ADC0_AD7 -/// - PINS_ADC0 -/// -/// !UART -/// - PINS_UART -/// -/// !EBI -/// - PIN_EBI_DATA_BUS -/// - PIN_EBI_NCS0 -/// - PIN_EBI_NRD -/// - PIN_EBI_NWE -/// - PIN_EBI_ADDR_BUS -/// - PIN_EBI_PSRAM_NBS -/// - PIN_EBI_A1 -/// - PIN_EBI_LCD_RS -/// -/// !LEDs -/// - PIN_LED_0 -/// - PIN_LED_1 -/// - PIN_LED_2 -/// - PINS_LEDS -/// -/// !MCI -/// - PINS_MCI -/// -/// !Push buttons -/// - PIN_PUSHBUTTON_1 -/// - PIN_PUSHBUTTON_2 -/// - PINS_PUSHBUTTONS -/// - PUSHBUTTON_BP1 -/// - PUSHBUTTON_BP2 -/// -/// !PWMC -/// - PIN_PWMC_PWMH0 -/// - PIN_PWMC_PWML0 -/// - PIN_PWMC_PWMH1 -/// - PIN_PWMC_PWML1 -/// - PIN_PWMC_PWMH2 -/// - PIN_PWMC_PWML2 -/// - PIN_PWMC_PWMH3 -/// - PIN_PWMC_PWML3 -/// - PIN_PWM_LED0 -/// - PIN_PWM_LED1 -/// - PIN_PWM_LED2 -/// - CHANNEL_PWM_LED0 -/// - CHANNEL_PWM_LED1 -/// - CHANNEL_PWM_LED2 -/// -/// !SPI -/// - PIN_SPI_MISO -/// - PIN_SPI_MOSI -/// - PIN_SPI_SPCK -/// - PINS_SPI -/// - PIN_SPI_NPCS0_PA11 -/// -/// ! SSC -/// - PIN_SSC_TD -/// - PIN_SSC_TK -/// - PIN_SSC_TF -/// - PINS_SSC_CODEC -/// -/// ! PCK0 -/// - PIN_PCK0 -/// -/// !TWI -/// - PIN_TWI_TWD0 -/// - PIN_TWI_TWCK0 -/// - PINS_TWI -/// -/// !USART0 -/// - PIN_USART0_RXD -/// - PIN_USART0_TXD -/// - PIN_USART0_CTS -/// - PIN_USART0_RTS -/// - PIN_USART0_SCK -/// -/// !USB -/// - PIN_USB_PULLUP -/// - -/// ADC_AD0 pin definition. -#define PIN_ADC0_AD0 {1 << 21, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD1 pin definition. -#define PIN_ADC0_AD1 {1 << 30, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD2 pin definition. -#define PIN_ADC0_AD2 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD3 pin definition. -#define PIN_ADC0_AD3 {1 << 4, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD4 pin definition. -#define PIN_ADC0_AD4 {1 << 15, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD5 pin definition. -#define PIN_ADC0_AD5 {1 << 16, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD6 pin definition. -#define PIN_ADC0_AD6 {1 << 17, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} -/// ADC_AD7 pin definition. -#define PIN_ADC0_AD7 {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} - -/// Pins ADC -#define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7 - -/** UART pins (UTXD0 and URXD0) definitions, PA9,10. */ -#define PINS_UART {0x00000600, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} - -/// EBI -#define PIN_EBI_DATA_BUS {0xFF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_NRD {1 << 11, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_NWE {1 << 8, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} - -#define PIN_EBI_NCS0 {1 << 20, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_PSRAM_ADDR_BUS {0x3f00fff, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_PSRAM_NBS {1 << 7, PIOB, ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}, \ - {1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_A1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} - -#define PIN_EBI_NCS1 {1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD CS pin */ -#define PIN_EBI_LCD_RS {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD RS pin */ - -#ifdef BOARD_REV_A -/** LED #0 pin definition. */ -#define PIN_LED_0 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} -/** LED #1 pin definition. */ -#define PIN_LED_1 {1 << 21, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} -/** LED #2 pin definition. */ -#define PIN_LED_2 {1 << 22, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} -#endif -#ifdef BOARD_REV_B -/** LED #0 pin definition. */ -#define PIN_LED_0 {1 << 19, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} -/** LED #1 pin definition. */ -#define PIN_LED_1 {1 << 20, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} -/** LED #2 pin definition. */ -#define PIN_LED_2 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} -#endif - -/** List of all LEDs definitions. */ -#define PINS_LEDS PIN_LED_0, PIN_LED_1, PIN_LED_2 - -/// MCI pins definition. -#define PINS_MCI {0x1f8, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}, \ - {1 << 3, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} - -/// MCI pin Card Detect -#define PIN_MCI_CD \ - {AT91C_PIO_PA25, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP} - -/** Push button #0 definition. Attributes = pull-up + debounce + interrupt on rising edge. */ -#define PIN_PUSHBUTTON_1 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE} -/** Push button #1 definition. Attributes = pull-up + debounce + interrupt on falling edge. */ -#define PIN_PUSHBUTTON_2 {1 << 12, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE} -/** List of all push button definitions. */ -#define PINS_PUSHBUTTONS PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2 - -/** Push button #1 index. */ -#define PUSHBUTTON_BP1 0 -/** Push button #2 index. */ -#define PUSHBUTTON_BP2 1 - -/// Simulated joystick LEFT index. -#define JOYSTICK_LEFT 0 -/// Simulated joystick RIGHT index. -#define JOYSTICK_RIGHT 1 - -/** PWMC PWM0 pin definition. */ -#define PIN_PWMC_PWMH0 {1 << 18, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} -#define PIN_PWMC_PWML0 {1 << 19, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} -/** PWMC PWM1 pin definition. */ -#define PIN_PWMC_PWMH1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} -#define PIN_PWMC_PWML1 {1 << 20, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} -/** PWMC PWM2 pin definition. */ -#define PIN_PWMC_PWMH2 {1 << 20, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} -#define PIN_PWMC_PWML2 {1 << 16, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT} -/** PWMC PWM3 pin definition. */ -#define PIN_PWMC_PWMH3 {1 << 21, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} -#define PIN_PWMC_PWML3 {1 << 15, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT} -/** PWM pin definition for LED0 */ -#define PIN_PWM_LED0 PIN_PWMC_PWMH0, PIN_PWMC_PWML0 -/** PWM pin definition for LED1 */ -#define PIN_PWM_LED1 PIN_PWMC_PWMH2, PIN_PWMC_PWML2 -/** PWM pin definition for LED2 */ -#define PIN_PWM_LED2 PIN_PWMC_PWMH3, PIN_PWMC_PWML3 -/** PWM channel for LED0 */ -#define CHANNEL_PWM_LED0 0 -/** PWM channel for LED1 */ -#define CHANNEL_PWM_LED1 2 -/** PWM channel for LED2 */ -#define CHANNEL_PWM_LED2 3 - -/** SPI MISO pin definition. */ -#define PIN_SPI_MISO {1 << 12, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -/** SPI MOSI pin definition. */ -#define PIN_SPI_MOSI {1 << 13, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -/** SPI SPCK pin definition. */ -#define PIN_SPI_SPCK {1 << 14, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -/** SPI chip select pin definition. */ -#define PIN_SPI_NPCS0_PA11 {1 << 11, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -/** List of SPI pin definitions (MISO, MOSI & SPCK). */ -#define PINS_SPI PIN_SPI_MISO, PIN_SPI_MOSI, PIN_SPI_SPCK - -/// SSC pins definition. -#define PIN_SSC_TD {0x1 << 26, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_SSC_TK {0x1 << 28, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_SSC_TF {0x1 << 30, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PINS_SSC_CODEC PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF - -/// PCK0 -#define PIN_PCK0 {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} - -/// TWI pins definition. -#define TWI_V3XX -#define PIN_TWI_TWD0 {0x1 << 9, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_TWI_TWCK0 {0x1 << 10, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PINS_TWI0 PIN_TWI_TWD0, PIN_TWI_TWCK0 -#define PIN_TWI_TWD1 {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_TWI_TWCK1 {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PINS_TWI1 PIN_TWI_TWD1, PIN_TWI_TWCK1 - -/// USART0 -#define PIN_USART0_RXD {0x1 << 19, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART0_TXD {0x1 << 18, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART0_CTS {0x1 << 8, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART0_RTS {0x1 << 7, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART0_SCK {0x1 << 17, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} - -/// USART1 -#define PIN_USART1_RXD {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART1_TXD {0x1 << 22, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART1_CTS {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART1_RTS {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} -#define PIN_USART1_EN {0x1 << 23, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} - - - -/// USB VBus monitoring pin definition. -#ifdef BOARD_REV_A -#define PIN_USB_VBUS {1 << 23, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} -#endif -#ifdef BOARD_REV_B -#define PIN_USB_VBUS {1 << 21, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} -#endif - -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \par sam3s_ek_extcomp "SAM3S-EK - External components" -/// This page lists the definitions related to external on-board components -/// located in the board.h file for the AT91SAM3S-EK. -/// -/// !AT45 Dataflash Card -/// - BOARD_AT45_A_SPI_BASE -/// - BOARD_AT45_A_SPI_ID -/// - BOARD_AT45_A_SPI_PINS -/// - BOARD_AT45_A_SPI -/// - BOARD_AT45_A_NPCS -/// - BOARD_AT45_A_NPCS_PIN -/// -/// !AT45 Dataflash (serial onboard DataFlash) -/// - BOARD_AT45_B_SPI_BASE -/// - BOARD_AT45_B_SPI_ID -/// - BOARD_AT45_B_SPI_PINS -/// - BOARD_AT45_B_SPI -/// - BOARD_AT45_B_NPCS -/// - BOARD_AT45_B_NPCS_PIN -/// -/// !AT26 Serial Flash -/// - BOARD_AT26_A_SPI_BASE -/// - BOARD_AT26_A_SPI_ID -/// - BOARD_AT26_A_SPI_PINS -/// - BOARD_AT26_A_SPI -/// - BOARD_AT26_A_NPCS -/// - BOARD_AT26_A_NPCS_PIN -/// -/// !SD Card -/// - MCI2_INTERFACE -/// - BOARD_SD_MCI_BASE -/// - BOARD_SD_MCI_ID -/// - BOARD_SD_PINS -/// - BOARD_SD_SLOT -/// -/// !PSRAM -/// - BOARD_PSRAM_PINS -/// -/// !LCD -/// - BOARD_LCD_ILI9325 -/// - BOARD_LCD_PINS -/// - BOARD_BACKLIGHT_PIN -/// - BOARD_LCD_BASE -/// - BOARD_LCD_RS -/// - BOARD_LCD_WIDTH -/// - BOARD_LCD_HEIGHT -/// -/// !TouchScreen -/// - BOARD_TSC_ADS7843 -/// - PIN_TCS_IRQ -/// - PIN_TCS_BUSY -/// - BOARD_TSC_SPI_BASE -/// - BOARD_TSC_SPI_ID -/// - BOARD_TSC_SPI_PINS -/// - BOARD_TSC_NPCS -/// - BOARD_TSC_NPCS_PIN -/// -/// Base address of SPI peripheral connected to the dataflash. -//#define BOARD_AT45_A_SPI_BASE SPI0 -///// Identifier of SPI peripheral connected to the dataflash. -//#define BOARD_AT45_A_SPI_ID ID_SPI0 -///// Pins of the SPI peripheral connected to the dataflash. -//#define BOARD_AT45_A_SPI_PINS PINS_SPI0 -///// Dataflahs SPI number. -//#define BOARD_AT45_A_SPI 0 -///// Chip select connected to the dataflash. -//#define BOARD_AT45_A_NPCS 3 -///// Chip select pin connected to the dataflash. -//#define BOARD_AT45_A_NPCS_PIN PIN_SPI0_NPCS3 - -/// Base address of SPI peripheral connected to the dataflash. -//#define BOARD_AT45_B_SPI_BASE SPI1 -///// Identifier of SPI peripheral connected to the dataflash. -//#define BOARD_AT45_B_SPI_ID ID_SPI1 -///// Pins of the SPI peripheral connected to the dataflash. -//#define BOARD_AT45_B_SPI_PINS PINS_SPI1 -///// Dataflahs SPI number. -//#define BOARD_AT45_B_SPI 1 -///// Chip select connected to the dataflash. -//#define BOARD_AT45_B_NPCS 3 -///// Chip select pin connected to the dataflash. -//#define BOARD_AT45_B_NPCS_PIN PIN_SPI1_NPCS3 - -/// Base address of SPI peripheral connected to the serialflash. -//#define BOARD_AT26_A_SPI_BASE SPI0 -///// Identifier of SPI peripheral connected to the serialflash. -//#define BOARD_AT26_A_SPI_ID ID_SPI0 -///// Pins of the SPI peripheral connected to the serialflash. -//#define BOARD_AT26_A_SPI_PINS PINS_SPI0 -///// Serialflash SPI number. -//#define BOARD_AT26_A_SPI 0 -///// Chip select connected to the serialflash. -//#define BOARD_AT26_A_NPCS 3 -///// Chip select pin connected to the serialflash. -//#define BOARD_AT26_A_NPCS_PIN PIN_SPI0_NPCS3 - -/// ISO7816 -/// - PIN_SMARTCARD_CONNECT -/// - PIN_ISO7816_RSTMC -/// - PINS_ISO7816 - -/// Smartcard detection pin -//#define PIN_SMARTCARD_CONNECT {1 << 5, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT} -/// PIN used for reset the smartcard -//#define PIN_ISO7816_RSTMC {1 << 7, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} -/// Pins used for connect the smartcard -//#define PINS_ISO7816 PIN_USART0_TXD, PIN_USART0_SCK, PIN_ISO7816_RSTMC - -/// Dma channel number -#define BOARD_MCI_DMA_CHANNEL 0 -/// MCI0 DMA hardware handshaking ID -#define DMA_HW_SRC_REQ_ID_MCI0 AT91C_HDMA_SRC_PER_0 -#define DMA_HW_DEST_REQ_ID_MCI0 AT91C_HDMA_DST_PER_0 -/// MCI1 DMA hardware handshaking ID -#define DMA_HW_SRC_REQ_ID_MCI1 AT91C_HDMA_SRC_PER_13 -#define DMA_HW_DEST_REQ_ID_MCI1 AT91C_HDMA_DST_PER_13 -/// SD DMA hardware handshaking ID -#define BOARD_SD_DMA_HW_SRC_REQ_ID DMA_HW_SRC_REQ_ID_MCI0 -#define BOARD_SD_DMA_HW_DEST_REQ_ID DMA_HW_DEST_REQ_ID_MCI0 - - -/// HS MCI interface -#define MCI2_INTERFACE -/// Base address of the MCI peripheral connected to the SD card. -#define BOARD_SD_MCI_BASE MCI0//MCI -///// Peripheral identifier of the MCI connected to the SD card. -#define BOARD_SD_MCI_ID ID_MCI0 //ID_MCI -///// MCI pins that shall be configured to access the SD card. -#define BOARD_SD_PINS PINS_MCI -///// MCI slot to which the SD card is connected to. -#define BOARD_SD_SLOT MCI_SD_SLOTA -///// MCI Card Detect pin. -#define BOARD_SD_PIN_CD PIN_MCI_CD - -//#define BOARD_PSRAM_PINS PIN_EBI_DATA_BUS, PIN_EBI_NCS0, PIN_EBI_NRD, PIN_EBI_NWE, \ - PIN_EBI_PSRAM_ADDR_BUS, PIN_EBI_PSRAM_NBS, PIN_EBI_A1 - -/** Indicates board has an ILI9325 external component to manage LCD. */ -#define BOARD_LCD_ILI9325 - -/** LCD pins definition. */ -#define BOARD_LCD_PINS PIN_EBI_DATA_BUS, PIN_EBI_NRD, PIN_EBI_NWE, \ - PIN_EBI_NCS1, PIN_EBI_LCD_RS -/** Backlight pin definition. */ -#define BOARD_BACKLIGHT_PIN {1 << 13, PIOC, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT} -/** Define ILI9325 base address. */ -#define BOARD_LCD_BASE 0x61000000 -/** Define ILI9325 register select signal. */ -#define BOARD_LCD_RS (1 << 1) -/** Display width in pixels. */ -#define BOARD_LCD_WIDTH 240 -/** Display height in pixels. */ -#define BOARD_LCD_HEIGHT 320 - -/** Indicates board has an ADS7843 external component to manage Touch Screen */ -#define BOARD_TSC_ADS7843 - -#ifdef BOARD_REV_A -/** Touchscreen controller IRQ pin definition. */ -#define PIN_TCS_IRQ {PIO_PA4, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE} -#define PIN_TCS_IRQ_WUP_ID (1 << 3) -/** Touchscreen controller Busy pin definition. */ -#define PIN_TCS_BUSY {PIO_PA5, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP} -#endif -#ifdef BOARD_REV_B -/** Touchscreen controller IRQ pin definition. */ -#define PIN_TCS_IRQ {PIO_PA16, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE} -#define PIN_TCS_IRQ_WUP_ID (1 << 15) -/** Touchscreen controller Busy pin definition. */ -#define PIN_TCS_BUSY {PIO_PA17, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP} -#endif - -/** Base address of SPI peripheral connected to the touchscreen controller. */ -#define BOARD_TSC_SPI_BASE SPI -/** Identifier of SPI peripheral connected to the touchscreen controller. */ -#define BOARD_TSC_SPI_ID ID_SPI -/** Pins of the SPI peripheral connected to the touchscreen controller. */ -#define BOARD_TSC_SPI_PINS PINS_SPI -/** Chip select connected to the touchscreen controller. */ -#define BOARD_TSC_NPCS 0 -/** Chip select pin connected to the touchscreen controller. */ -#define BOARD_TSC_NPCS_PIN PIN_SPI_NPCS0_PA11 - -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \par sam3s_ek_mem "SAM3S-EK - Memories" -/// This page lists definitions related to internal & external on-board memories. -/// -/// !Embedded Flash -/// - BOARD_FLASH_EFC - -/// Internal SRAM address -#define AT91C_ISRAM AT91C_IRAM -#define AT91C_ISRAM_SIZE 0x00008000 - -#define AT91C_IFLASH_SIZE (0x40000) -#define AT91C_IFLASH_PAGE_SIZE (256) // Internal FLASH 0 Page Size: 256 bytes -#define AT91C_IFLASH_NB_OF_PAGES (1024) // Internal FLASH 0 Number of Pages: 512 -#define AT91C_IFLASH_LOCK_REGION_SIZE (16384) // Internal FLASH 0 Lock Region Size: 16 Kbytes -#define AT91C_IFLASH_NB_OF_LOCK_BITS (16) // Internal FLASH 0 Number of Lock Bits: 16 - -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -/// \section sam3s_ek_extcomp "SAM3S-EK - External components" -/// This page lists the definitions related to external on-board components -/// located in the board.h file for the SAM3S-EK. -/// -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \par sam3s_ek_chipdef "SAM3S-EK - Individual chip definition" -/// This page lists the definitions related to different chip's definition -/// located in the board.h file for the SAM3S-EK. - -/// DBGU -#define BOARD_DBGU_ID ID_DBGU - -/// Rtc -#define BOARD_RTC_ID ID_RTC - -/// Twi eeprom -#define BOARD_ID_TWI_EEPROM ID_TWI1 -#define BOARD_BASE_TWI_EEPROM TWI1 -#define BOARD_PINS_TWI_EEPROM PINS_TWI1 - -/// USART -#define BOARD_PIN_USART_RXD PIN_USART1_RXD -#define BOARD_PIN_USART_TXD PIN_USART1_TXD -#define BOARD_PIN_USART_CTS PIN_USART1_CTS -#define BOARD_PIN_USART_RTS PIN_USART1_RTS -#define BOARD_PIN_USART_EN PIN_USART1_EN -#define BOARD_USART_BASE USART1 -#define BOARD_ID_USART ID_USART1 - -//------------------------------------------------------------------------------ - - -#define PIN_EBI_NANDOE {1 << 9, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_NANDWE {1 << 10, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_NANDCLE {1 << 17, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_NANDALE {1 << 16, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} -#define PIN_EBI_NANDIO {0x000000FF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} - -/// Nandflash chip enable pin definition. -#define BOARD_NF_CE_PIN {1 << 14, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} -/// Nandflash ready/busy pin definition. -#define BOARD_NF_RB_PIN {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP} - -/// Nandflash controller peripheral pins definition. -#define PINS_NANDFLASH PIN_EBI_NANDIO, BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, \ - PIN_EBI_NANDWE, PIN_EBI_NANDCLE, PIN_EBI_NANDALE - -/// Address for transferring command bytes to the nandflash. -#define BOARD_NF_COMMAND_ADDR 0x60400000 -/// Address for transferring address bytes to the nandflash. -#define BOARD_NF_ADDRESS_ADDR 0x60200000 -/// Address for transferring data bytes to the nandflash. -#define BOARD_NF_DATA_ADDR 0x60000000 - -#endif //#ifndef BOARD_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_cstartup_gnu.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_cstartup_gnu.c deleted file mode 100644 index 632cdaca..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_cstartup_gnu.c +++ /dev/null @@ -1,172 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" -#include "exceptions.h" -#include "board_lowlevel.h" - -#include - -/*---------------------------------------------------------------------------- - * Exported variables - *----------------------------------------------------------------------------*/ - -/* Stack top */ -extern uint32_t _estack; - -/* Initialize segments */ -extern uint32_t _sfixed; -extern uint32_t _sfixed; -extern uint32_t _efixed; -extern uint32_t _srelocate; -extern uint32_t _erelocate; -extern uint32_t _szero; -extern uint32_t _ezero; - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/* The mask of VTOR register */ -#define SCB_VTOR_MASK 0x3FFFFFF8 - -/*---------------------------------------------------------------------------- - * ProtoTypes - *----------------------------------------------------------------------------*/ - -extern int main(void); -void ResetException(void); - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/* Exception Table */ -__attribute__((section(".vectors"))) -IntFunc exception_table[] = { - - /* Configure Initial Stack Pointer, using linker-generated symbols */ - (IntFunc)&_estack, - ResetException, - - NMI_Handler, - HardFault_Handler, - MemManage_Handler, - BusFault_Handler, - UsageFault_Handler, - 0, 0, 0, 0, /* Reserved */ - SVC_Handler, - DebugMon_Handler, - 0, /* Reserved */ - PendSV_Handler, - SysTick_Handler, - - /* Configurable interrupts */ - SUPC_IrqHandler, /* 0 Supply Controller */ - RSTC_IrqHandler, /* 1 Reset Controller */ - RTC_IrqHandler, /* 2 Real Time Clock */ - RTT_IrqHandler, /* 3 Real Time Timer */ - WDT_IrqHandler, /* 4 Watchdog Timer */ - PMC_IrqHandler, /* 5 PMC */ - EEFC_IrqHandler, /* 6 EEFC */ - IrqHandlerNotUsed, /* 7 Reserved */ - UART0_IrqHandler, /* 8 UART0 */ - UART1_IrqHandler, /* 9 UART1 */ - SMC_IrqHandler, /* 10 SMC */ - PIOA_IrqHandler, /* 11 Parallel IO Controller A */ - PIOB_IrqHandler, /* 12 Parallel IO Controller B */ - PIOC_IrqHandler, /* 13 Parallel IO Controller C */ - USART0_IrqHandler, /* 14 USART 0 */ - USART1_IrqHandler, /* 15 USART 1 */ - IrqHandlerNotUsed, /* 16 Reserved */ - IrqHandlerNotUsed, /* 17 Reserved */ - MCI_IrqHandler, /* 18 MCI */ - TWI0_IrqHandler, /* 19 TWI 0 */ - TWI1_IrqHandler, /* 20 TWI 1 */ - SPI_IrqHandler, /* 21 SPI */ - SSC_IrqHandler, /* 22 SSC */ - TC0_IrqHandler, /* 23 Timer Counter 0 */ - TC1_IrqHandler, /* 24 Timer Counter 1 */ - TC2_IrqHandler, /* 25 Timer Counter 2 */ - TC3_IrqHandler, /* 26 Timer Counter 3 */ - TC4_IrqHandler, /* 27 Timer Counter 4 */ - TC5_IrqHandler, /* 28 Timer Counter 5 */ - ADC_IrqHandler, /* 29 ADC controller */ - DAC_IrqHandler, /* 30 DAC controller */ - PWM_IrqHandler, /* 31 PWM */ - CRCCU_IrqHandler, /* 32 CRC Calculation Unit */ - ACC_IrqHandler, /* 33 Analog Comparator */ - USBD_IrqHandler, /* 34 USB Device Port */ - IrqHandlerNotUsed /* 35 not used */ -}; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief This is the code that gets called on processor reset. - * To initialize the device, and call the main() routine. - */ -void ResetException(void) -{ - uint32_t *pSrc, *pDest; - - LowLevelInit(); - - /* Initialize the relocate segment */ - pSrc = &_efixed; - pDest = &_srelocate; - if (pSrc != pDest) { - for(; pDest < &_erelocate;) { - - *pDest++ = *pSrc++; - } - } - - /* Clear the zero segment */ - for(pDest = &_szero; pDest < &_ezero;) { - - *pDest++ = 0; - } - - /* Set the vector table base address */ - pSrc = (uint32_t *)&_sfixed; - SCB->VTOR = ((uint32_t)(pSrc)) & 0x2FFFFFF8; - - /* Branch to main function */ - main(); - - /* Infinite loop */ - while(1); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_cstartup_iar.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_cstartup_iar.c deleted file mode 100644 index fbfcca21..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_cstartup_iar.c +++ /dev/null @@ -1,143 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "board.h" -#include - -#include "exceptions.h" -#include "board_lowlevel.h" - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ -typedef union { IntFunc __fun; void * __ptr; } IntVector; - -/*------------------------------------------------------------------------------ - * ProtoTypes - *------------------------------------------------------------------------------*/ -extern void __iar_program_start( void ); - -int __low_level_init( void ); - -/*------------------------------------------------------------------------------ - * Variables - *------------------------------------------------------------------------------*/ -extern unsigned int __ICFEDIT_vector_start__; - - -/*------------------------------------------------------------------------------ - * Exception Table - *------------------------------------------------------------------------------*/ -#pragma language=extended -#pragma segment="CSTACK" - -/* The name "__vector_table" has special meaning for C-SPY: */ -/* it is where the SP start value is found, and the NVIC vector */ -/* table register (VTOR) is initialized to this address if != 0. */ - -#pragma section = ".vectors" -#pragma location = ".vectors" -const IntVector __vector_table[] = -{ - { .__ptr = __sfe( "CSTACK" ) }, - __iar_program_start, - - NMI_Handler, - HardFault_Handler, - MemManage_Handler, - BusFault_Handler, - UsageFault_Handler, - 0, 0, 0, 0, /* Reserved */ - SVC_Handler, - DebugMon_Handler, - 0, /* Reserved */ - PendSV_Handler, - SysTick_Handler, - - /* Configurable interrupts */ - SUPC_IrqHandler, /* 0 SUPPLY CONTROLLER */ - RSTC_IrqHandler, /* 1 RESET CONTROLLER */ - RTC_IrqHandler, /* 2 REAL TIME CLOCK */ - RTT_IrqHandler, /* 3 REAL TIME TIMER */ - WDT_IrqHandler, /* 4 WATCHDOG TIMER */ - PMC_IrqHandler, /* 5 PMC */ - EEFC_IrqHandler, /* 6 EEFC */ - IrqHandlerNotUsed, /* 7 Reserved */ - UART0_IrqHandler, /* 8 UART0 */ - UART1_IrqHandler, /* 9 UART1 */ - SMC_IrqHandler, /* 10 SMC */ - PIOA_IrqHandler, /* 11 Parallel IO Controller A */ - PIOB_IrqHandler, /* 12 Parallel IO Controller B */ - PIOC_IrqHandler, /* 13 Parallel IO Controller C */ - USART0_IrqHandler, /* 14 USART 0 */ - USART1_IrqHandler, /* 15 USART 1 */ - IrqHandlerNotUsed, /* 16 Reserved */ - IrqHandlerNotUsed, /* 17 Reserved */ - MCI_IrqHandler, /* 18 MCI */ - TWI0_IrqHandler, /* 19 TWI 0 */ - TWI1_IrqHandler, /* 20 TWI 1 */ - SPI_IrqHandler, /* 21 SPI */ - SSC_IrqHandler, /* 22 SSC */ - TC0_IrqHandler, /* 23 Timer Counter 0 */ - TC1_IrqHandler, /* 24 Timer Counter 1 */ - TC2_IrqHandler, /* 25 Timer Counter 2 */ - TC3_IrqHandler, /* 26 Timer Counter 3 */ - TC4_IrqHandler, /* 27 Timer Counter 4 */ - TC5_IrqHandler, /* 28 Timer Counter 5 */ - ADC_IrqHandler, /* 29 ADC controller */ - DAC_IrqHandler, /* 30 DAC controller */ - PWM_IrqHandler, /* 31 PWM */ - CRCCU_IrqHandler, /* 32 CRC Calculation Unit */ - ACC_IrqHandler, /* 33 Analog Comparator */ - USBD_IrqHandler, /* 34 USB Device Port */ - IrqHandlerNotUsed /* 35 not used */ -}; - -/*------------------------------------------------------------------------------ - * Exception Table - *------------------------------------------------------------------------------*/ - -/**------------------------------------------------------------------------------ - * This is the code that gets called on processor reset. To initialize the - * device. - *------------------------------------------------------------------------------*/ -int __low_level_init( void ) -{ - unsigned int * src = __section_begin(".vectors"); - - LowLevelInit(); - - SCB->VTOR = ((unsigned int)(src)) | (0x0 << 7); - - return 1; /* if return 0, the data sections will not be initialized. */ -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_cstartup_keil.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_cstartup_keil.c deleted file mode 100644 index aeb93586..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_cstartup_keil.c +++ /dev/null @@ -1,131 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ -#include "board.h" -#include "exceptions.h" -#include "board_lowlevel.h" - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Types -//------------------------------------------------------------------------------ -typedef union { IntFunc __fun; void * __ptr; } IrqVector; - -//------------------------------------------------------------------------------ -// ProtoTypes -//------------------------------------------------------------------------------ -extern int Image$$ARM_LIB_STACK$$ZI$$Limit; -extern int Image$$Vector_region$$Base; -extern int Image$$Vector_region$$Limit; - -extern void __main(void); -void resetHandler( void ); - -//------------------------------------------------------------------------------ -// Variables -//------------------------------------------------------------------------------ - -#pragma arm section rodata="vectors" -const IrqVector __vector_table[] = -{ - (IntFunc)&Image$$ARM_LIB_STACK$$ZI$$Limit, - resetHandler, - - NMI_Handler, - HardFault_Handler, - MemManage_Handler, - BusFault_Handler, - UsageFault_Handler, - 0, 0, 0, 0, // Reserved - SVC_Handler, - DebugMon_Handler, - 0, // Reserved - PendSV_Handler, - SysTick_Handler, - - // Configurable interrupts - SUPC_IrqHandler, // 0 SUPPLY CONTROLLER - RSTC_IrqHandler, // 1 RESET CONTROLLER - RTC_IrqHandler, // 2 REAL TIME CLOCK - RTT_IrqHandler, // 3 REAL TIME TIMER - WDT_IrqHandler, // 4 WATCHDOG TIMER - PMC_IrqHandler, // 5 PMC - EFC0_IrqHandler, // 6 EFC0 - EFC1_IrqHandler, // 7 EFC1 - DBGU_IrqHandler, // 8 DBGU - HSMC4_IrqHandler, // 9 HSMC4 - PIOA_IrqHandler, // 10 Parallel IO Controller A - PIOB_IrqHandler, // 11 Parallel IO Controller B - PIOC_IrqHandler, // 12 Parallel IO Controller C - USART0_IrqHandler, // 13 USART 0 - USART1_IrqHandler, // 14 USART 1 - USART2_IrqHandler, // 15 USART 2 - USART3_IrqHandler, // 16 USART 3 - MCI0_IrqHandler, // 17 Multimedia Card Interface - TWI0_IrqHandler, // 18 TWI 0 - TWI1_IrqHandler, // 19 TWI 1 - SPI0_IrqHandler, // 20 Serial Peripheral Interface - SSC0_IrqHandler, // 21 Serial Synchronous Controller 0 - TC0_IrqHandler, // 22 Timer Counter 0 - TC1_IrqHandler, // 23 Timer Counter 1 - TC2_IrqHandler, // 24 Timer Counter 2 - PWM_IrqHandler, // 25 Pulse Width Modulation Controller - ADCC0_IrqHandler, // 26 ADC controller0 - ADCC1_IrqHandler, // 27 ADC controller1 - HDMA_IrqHandler, // 28 HDMA - UDPD_IrqHandler, // 29 USB Device High Speed UDP_HS - IrqHandlerNotUsed // 30 not used -}; -#pragma arm section - -//------------------------------------------------------------------------------ -/// This is the code that gets called on processor reset. To initialize the -/// device. -//------------------------------------------------------------------------------ -void resetHandler( void ) -{ - unsigned int *pSrc = (unsigned int *)&Image$$Vector_region$$Base; - - // Low level Initialize - LowLevelInit(); - - AT91C_BASE_NVIC->NVIC_VTOFFR = ((unsigned int)(pSrc)) | (0x0 << 7); - - // Enter C library entry point - __main(); - - /* Infinite loop */ - while(1); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_lowlevel.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_lowlevel.c deleted file mode 100644 index 63ce7117..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_lowlevel.c +++ /dev/null @@ -1,141 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" -#include "board_memories.h" -#include "board_lowlevel.h" -#include - -/*---------------------------------------------------------------------------- - * Local definitions - *----------------------------------------------------------------------------*/ -/** Define clock timeout */ -#define CLOCK_TIMEOUT 5000 - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ -static void BOARD_ConfigurePmc(void) -{ - -#define AT91C_CKGR_MUL_SHIFT 16 -#define AT91C_CKGR_PLLCOUNT_SHIFT 8 -#define AT91C_CKGR_DIV_SHIFT 0 - -// Settings at 64 MHz for MCK - -#define BOARD_OSCOUNT (CKGR_MOR_MOSCXTST & (0x8 << 8)) - -// PLLA Settings 64 MHz : 12 / 3 * 32 -#define BOARD_PLLAR ((1 << 29) | (0x1F << AT91C_CKGR_MUL_SHIFT) \ - | (0x1 << AT91C_CKGR_PLLCOUNT_SHIFT) | (0x3 << AT91C_CKGR_DIV_SHIFT)) - -// PLLB Settings 96 MHz -#define BOARD_PLLBR ((1 << 29) | (0x7 << AT91C_CKGR_MUL_SHIFT) \ - | (0x1 << AT91C_CKGR_PLLCOUNT_SHIFT) | (0x1 << AT91C_CKGR_DIV_SHIFT)) - -// USB on PLLB, MCK/PCK on PLLA -#define BOARD_MCKR ( PMC_MCKR_PRES_CLK_2 | PMC_MCKR_CSS_PLLA_CLK) - -// Define clock timeout -#undef CLOCK_TIMEOUT -#define CLOCK_TIMEOUT 0xFFFFFFFF - - uint32_t timeout = 0; - - /* Enable NRST reset - ************************************/ - //AT91C_BASE_RSTC->RSTC_RMR |= AT91C_RSTC_URSTEN; - - /* Initialize main oscillator - ****************************/ - if(!(PMC->CKGR_MOR & CKGR_MOR_MOSCSEL)) - { - - PMC->CKGR_MOR = (0x37 << 16) | BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_MOSCXTS) && (timeout++ < CLOCK_TIMEOUT)); - - } - - /* Switch to 3-20MHz Xtal oscillator */ - PMC->CKGR_MOR = (0x37 << 16) | BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN | CKGR_MOR_MOSCSEL; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_MOSCSELS) && (timeout++ < CLOCK_TIMEOUT)); - PMC->PMC_MCKR = (PMC->PMC_MCKR & ~(uint32_t)PMC_MCKR_CSS) | PMC_MCKR_CSS_MAIN_CLK; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT)); - - /** Set 3 WS for Embedded Flash Access */ - EFC->EEFC_FMR = (3 << 8); - - /* Initialize PLLA */ - PMC->CKGR_PLLAR = BOARD_PLLAR; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_LOCKA) && (timeout++ < CLOCK_TIMEOUT)); - - /* Initialize PLLB */ - PMC->CKGR_PLLBR = BOARD_PLLBR; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_LOCKB) && (timeout++ < CLOCK_TIMEOUT)); - - // Set USB clock on PLLB - REG_PMC_USB = PMC_USB_USBS | (PMC_USB_USBDIV & (1 << 8)); - - /* Switch to fast clock - **********************/ - PMC->PMC_MCKR = (BOARD_MCKR & ~PMC_MCKR_CSS) | PMC_MCKR_CSS_MAIN_CLK; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT)); - - PMC->PMC_MCKR = BOARD_MCKR; - timeout = 0; - while (!(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT)); - -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/*----------------------------------------------------------------------------*/ -/** - * \brief Performs the low-level initialization of the chip. This includes EFC, - * master clock and watchdog configuration. - */ -/*----------------------------------------------------------------------------*/ -void LowLevelInit (void) -{ - /** Configure PMC */ - BOARD_ConfigurePmc(); -} \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_lowlevel.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_lowlevel.h deleted file mode 100644 index c7effdf1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_lowlevel.h +++ /dev/null @@ -1,49 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !!!Purpose -/// -/// Collection of methods for lowlevel. -/// -//------------------------------------------------------------------------------ - -#ifndef BOARD_LOWLEVEL_H -#define BOARD_LOWLEVEL_H - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ -extern void LowLevelInit(void); -extern void OptimizeCpuSpeed(void); - -#endif // BOARD_LOWLEVEL_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_memories.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_memories.c deleted file mode 100644 index 6c224263..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_memories.c +++ /dev/null @@ -1,96 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/* - Title: Memories implementation -*/ -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include -#include "board_memories.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - - -/** - * \brief Configures the EBI for NandFlash access. - * - */ -extern void BOARD_ConfigureNandFlash( void ) -{ - // Open EBI clock - PMC->PMC_PCER0 = (1<< ID_SMC); - // NCS0 is assigned to a NAND Flash (NANDOE and NANWE used for NCS0) - MATRIX->CCFG_SMCNFCS = CCFG_SMCNFCS_SMC_NFCS0; - -#if 0 - SMC->SMC_CS_NUMBER[0].SMC_SETUP = 0 - | ((0 << 0) & SMC_SETUP0_NWE_SETUP) - | ((1 << 8) & SMC_SETUP0_NCS_WR_SETUP) - | ((0 << 16) & SMC_SETUP0_NRD_SETUP) - | ((1 << 24) & SMC_SETUP0_NCS_RD_SETUP); - - SMC->SMC_CS_NUMBER[0].SMC_PULSE = 0 - | ((2 << 0) & SMC_PULSE0_NWE_PULSE) - | ((3 << 8) & SMC_PULSE0_NCS_WR_PULSE) - | ((4 << 16) & SMC_PULSE0_NRD_PULSE) - | ((4 << 24) & SMC_PULSE0_NCS_RD_PULSE); - - SMC->SMC_CS_NUMBER[0].SMC_CYCLE = 0 - | ((4 << 0) & SMC_CYCLE0_NWE_CYCLE) - | ((7 << 16) & SMC_CYCLE0_NRD_CYCLE); - - SMC->SMC_CS_NUMBER[0].SMC_MODE = SMC_MODE0_READ_MODE | SMC_MODE0_WRITE_MODE; -#else - SMC->SMC_CS_NUMBER[0].SMC_SETUP = 0 - | ((0 << 0) & SMC_SETUP0_NWE_SETUP) - | ((0 << 8) & SMC_SETUP0_NCS_WR_SETUP) - | ((0 << 16) & SMC_SETUP0_NRD_SETUP) - | ((0 << 24) & SMC_SETUP0_NCS_RD_SETUP); - - SMC->SMC_CS_NUMBER[0].SMC_PULSE = 0 - | ((2 << 0) & SMC_PULSE0_NWE_PULSE) - | ((2 << 8) & SMC_PULSE0_NCS_WR_PULSE) - | ((2 << 16) & SMC_PULSE0_NRD_PULSE) - | ((2 << 24) & SMC_PULSE0_NCS_RD_PULSE); - - SMC->SMC_CS_NUMBER[0].SMC_CYCLE = 0 - | ((3 << 0) & SMC_CYCLE0_NWE_CYCLE) - | ((3 << 16) & SMC_CYCLE0_NRD_CYCLE); - - SMC->SMC_CS_NUMBER[0].SMC_MODE = SMC_MODE1_READ_MODE | SMC_MODE1_WRITE_MODE; -#endif - - - -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_memories.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_memories.h deleted file mode 100644 index b9f472ff..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/board_memories.h +++ /dev/null @@ -1,49 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// !Purpose -/// -/// -/// !Usage -/// -//------------------------------------------------------------------------------ - -#ifndef BOARD_MEMORIES_H -#define BOARD_MEMORIES_H - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -extern void BOARD_ConfigureNandFlash( void ) ; - -#endif //#ifndef BOARD_MEMORIES_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/exceptions.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/exceptions.c deleted file mode 100644 index b9b329bf..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/exceptions.c +++ /dev/null @@ -1,385 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * This file contains the default exception handlers. - * - * \note - * The exception handler has weak aliases. - * As they are weak aliases, any function with the same name will override - * this definition. - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "exceptions.h" -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Default interrupt handler for not used irq. - */ -void IrqHandlerNotUsed(void) -{ - while(1); -} - -/** - * \brief Default NMI interrupt handler. - */ -WEAK void NMI_Handler(void) -{ - while(1); -} - -/** - * \brief Default HardFault interrupt handler. - */ -WEAK void HardFault_Handler(void) -{ - while(1); -} - -/** - * \brief Default MemManage interrupt handler. - */ -WEAK void MemManage_Handler(void) -{ - while(1); -} - -/** - * \brief Default BusFault interrupt handler. - */ -WEAK void BusFault_Handler(void) -{ - while(1); -} - -/** - * \brief Default UsageFault interrupt handler. - */ -WEAK void UsageFault_Handler(void) -{ - while(1); -} - -/** - * \brief Default SVC interrupt handler. - */ -WEAK void SVC_Handler(void) -{ - while(1); -} - -/** - * \brief Default DebugMon interrupt handler. - */ -WEAK void DebugMon_Handler(void) -{ - while(1); -} - -/** - * \brief Default PendSV interrupt handler. - */ -WEAK void PendSV_Handler(void) -{ - while(1); -} - -/** - * \brief Default SysTick interrupt handler. - */ -WEAK void SysTick_Handler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for Supply Controller. - */ -WEAK void SUPC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for Reset Controller. - */ -WEAK void RSTC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for Real Time Clock. - */ -WEAK void RTC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for Real Time Timer. - */ -WEAK void RTT_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for Watchdog Timer. - */ -WEAK void WDT_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for PMC. - */ -WEAK void PMC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for EEFC. - */ -WEAK void EEFC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for UART0. - */ -WEAK void UART0_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for UART1. - */ -WEAK void UART1_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for SMC. - */ -WEAK void SMC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for PIOA Controller. - */ -WEAK void PIOA_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for PIOB Controller. - */ -WEAK void PIOB_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for PIOC Controller. - */ -WEAK void PIOC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for USART0. - */ -WEAK void USART0_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for USART1. - */ -WEAK void USART1_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for MCI. - */ -WEAK void MCI_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for TWI0. - */ -WEAK void TWI0_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for TWI1. - */ -WEAK void TWI1_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for SPI. - */ -WEAK void SPI_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for SSC. - */ -WEAK void SSC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for TC0. - */ -WEAK void TC0_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for TC1. - */ -WEAK void TC1_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default interrupt handler for TC2. - */ -WEAK void TC2_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for TC3. - */ -WEAK void TC3_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for TC4. - */ -WEAK void TC4_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for TC5. - */ -WEAK void TC5_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for ADC. - */ -WEAK void ADC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for DAC. - */ -WEAK void DAC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for PWM. - */ -WEAK void PWM_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for CRCCU. - */ -WEAK void CRCCU_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for ACC. - */ -WEAK void ACC_IrqHandler(void) -{ - while(1); -} - -/** - * \brief Default SUPC interrupt handler for USBD. - */ -WEAK void USBD_IrqHandler(void) -{ - while(1); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/exceptions.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/exceptions.h deleted file mode 100644 index b6b366c6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/board/exceptions.h +++ /dev/null @@ -1,103 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * Interface for default exception handlers. - */ - -#ifndef EXCEPTIONS_H -#define EXCEPTIONS_H - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/* Function prototype for exception table items (interrupt handler). */ -typedef void( *IntFunc )( void ); - -/* Define WEAK attribute */ -#if defined ( __CC_ARM ) - #define WEAK __attribute__ ((weak)) -#elif defined ( __ICCARM__ ) - #define WEAK __weak -#elif defined ( __GNUC__ ) - #define WEAK __attribute__ ((weak)) -#endif - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void IrqHandlerNotUsed(void); - -extern WEAK void NMI_Handler( void ); -extern WEAK void HardFault_Handler( void ); -extern WEAK void MemManage_Handler( void ); -extern WEAK void BusFault_Handler( void ); -extern WEAK void UsageFault_Handler( void ); -extern WEAK void SVC_Handler( void ); -extern WEAK void DebugMon_Handler( void ); -extern WEAK void PendSV_Handler( void ); -extern WEAK void SysTick_Handler( void ); - -extern WEAK void SUPC_IrqHandler(void); -extern WEAK void RSTC_IrqHandler(void); -extern WEAK void RTC_IrqHandler(void); -extern WEAK void RTT_IrqHandler(void); -extern WEAK void WDT_IrqHandler(void); -extern WEAK void PMC_IrqHandler(void); -extern WEAK void EEFC_IrqHandler(void); -extern WEAK void UART0_IrqHandler(void); -extern WEAK void UART1_IrqHandler(void); -extern WEAK void SMC_IrqHandler(void); -extern WEAK void PIOA_IrqHandler(void); -extern WEAK void PIOB_IrqHandler(void); -extern WEAK void PIOC_IrqHandler(void); -extern WEAK void USART0_IrqHandler(void); -extern WEAK void USART1_IrqHandler(void); -extern WEAK void MCI_IrqHandler(void); -extern WEAK void TWI0_IrqHandler(void); -extern WEAK void TWI1_IrqHandler(void); -extern WEAK void SPI_IrqHandler(void); -extern WEAK void SSC_IrqHandler(void); -extern WEAK void TC0_IrqHandler(void); -extern WEAK void TC1_IrqHandler(void); -extern WEAK void TC2_IrqHandler(void); -extern WEAK void TC3_IrqHandler(void); -extern WEAK void TC4_IrqHandler(void); -extern WEAK void TC5_IrqHandler(void); -extern WEAK void ADC_IrqHandler(void); -extern WEAK void DAC_IrqHandler(void); -extern WEAK void PWM_IrqHandler(void); -extern WEAK void CRCCU_IrqHandler(void); -extern WEAK void ACC_IrqHandler(void); -extern WEAK void USBD_IrqHandler(void); - -#endif /* #ifndef EXCEPTIONS_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/demo.c deleted file mode 100644 index cb56caba..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/demo.c +++ /dev/null @@ -1,241 +0,0 @@ -/* - * FreeModbus Libary: Atmel AT91SAM3S Demo Application - * Copyright (C) 2010 Christian Walter - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * IF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include -#include - -/* ----------------------- AT91SAM3S includes -------------------------------*/ -#include -#include - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_INPUT_START ( 1000 ) -#define REG_INPUT_NREGS ( 64 ) - -#define REG_HOLDING_START ( 1 ) -#define REG_HOLDING_NREGS ( 32 ) - -#define TASK_MODBUS_STACK_SIZE ( 256 ) -#define TASK_MODBUS_PRIORITY ( tskIDLE_PRIORITY + 1 ) - -#define TASK_APPL_STACK_SIZE ( 256 ) -#define TASK_APPL_PRIORITY ( tskIDLE_PRIORITY + 1 ) - -/* ----------------------- Static functions ---------------------------------*/ -static void _SetupHardware( void ); -static void vTaskApplication( void *pvArg ); -static void vTaskMODBUS( void *pvArg ); - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; -static USHORT usRegHoldingStart = REG_HOLDING_START; -static USHORT usRegHoldingBuf[REG_HOLDING_NREGS]; - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - _SetupHardware( ); - - if( pdPASS != xTaskCreate( vTaskMODBUS, "MODBUS", TASK_MODBUS_STACK_SIZE, NULL, TASK_MODBUS_PRIORITY, NULL ) ) - { - } - else if( pdPASS != xTaskCreate( vTaskApplication, "APPL", TASK_APPL_STACK_SIZE, NULL, TASK_APPL_PRIORITY, NULL ) ) - { - } - else - { - vTaskStartScheduler( ); - } - return 1; -} - -static void -vTaskApplication( void *pvArg ) -{ - for( ;; ) - { - vTaskDelay( 1000 ); - } -} - -static void -vTaskMODBUS( void *pvArg ) -{ - const UCHAR ucSlaveID[] = { 0xAA, 0xBB, 0xCC }; - eMBErrorCode eStatus; - - for( ;; ) - { - if( MB_ENOERR != ( eStatus = eMBInit( MB_ASCII, 0x0A, 1, 38400, MB_PAR_EVEN ) ) ) - { - /* Can not initialize. Add error handling code here. */ - } - else - { - if( MB_ENOERR != ( eStatus = eMBSetSlaveID( 0x34, TRUE, ucSlaveID, 3 ) ) ) - { - /* Can not set slave id. Check arguments */ - } - else if( MB_ENOERR != ( eStatus = eMBEnable( ) ) ) - { - /* Enable failed. */ - } - else - { - usRegHoldingBuf[0] = 1; - do - { - ( void )eMBPoll( ); - - /* Here we simply count the number of poll cycles. */ - usRegInputBuf[0]++; - } - while( usRegHoldingBuf[0] ); - } - ( void )eMBDisable( ); - ( void )eMBClose( ); - } - vTaskDelay( 50 ); - } -} - -static void -_SetupHardware( void ) -{ - WDT_Disable( ); - - uint32_t i = 0; - for( i = 0; i < 35; i++ ) - { - NVIC_SetPriority( ( IRQn_Type ) i, 0xF << 4 ); - } -} - -void -vApplicationStackOverflowHook( xTaskHandle * pxTask, signed char *pcTaskName ) -{ - ( void )pxTask; - ( void )pcTaskName; - for( ;; ); -} - -void -vApplicationIdleHook( void ) -{ -} - -void -vApplicationTickHook( void ) -{ -} - - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_HOLDING_START ) && ( usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegHoldingStart ); - switch ( eMode ) - { - case MB_REG_READ: - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegHoldingBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegHoldingBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - break; - - case MB_REG_WRITE: - while( usNRegs > 0 ) - { - usRegHoldingBuf[iRegIndex] = *pucRegBuffer++ << 8; - usRegHoldingBuf[iRegIndex] |= *pucRegBuffer++; - iRegIndex++; - usNRegs--; - } - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/demo.ewp b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/demo.ewp deleted file mode 100644 index 0997336e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/demo.ewp +++ /dev/null @@ -1,1791 +0,0 @@ - - - - 2 - - Debug - - ARM - - 1 - - General - 3 - - 17 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 22 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 7 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 1 - - - - - - - - - CUSTOM - 3 - - - - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 9 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - - Release - - ARM - - 0 - - General - 3 - - 17 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 22 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 7 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - - - board - - $PROJ_DIR$\board\board_cstartup_iar.c - - - $PROJ_DIR$\board\board_lowlevel.c - - - $PROJ_DIR$\board\board_memories.c - - - $PROJ_DIR$\board\exceptions.c - - - - drivers - - $PROJ_DIR$\libraries\drivers\pio\pio.c - - - $PROJ_DIR$\libraries\drivers\pmc\pmc.c - - - $PROJ_DIR$\libraries\drivers\tc\tc.c - - - $PROJ_DIR$\libraries\drivers\usart\usart.c - - - $PROJ_DIR$\libraries\drivers\wdt\wdt.c - - - - freertos - - $PROJ_DIR$\freertos\croutine.c - - - $PROJ_DIR$\freertos\FreeRTOSConfig.h - - - $PROJ_DIR$\freertos\portable\MemMang\heap_2.c - - - $PROJ_DIR$\freertos\list.c - - - $PROJ_DIR$\freertos\portable\IAR\ARM_CM3\port.c - - - $PROJ_DIR$\freertos\portable\IAR\ARM_CM3\portasm.s - - - $PROJ_DIR$\freertos\portable\IAR\ARM_CM3\portmacro.h - - - $PROJ_DIR$\freertos\queue.c - - - $PROJ_DIR$\freertos\tasks.c - - - - modbus - - $PROJ_DIR$\..\..\modbus\mb.c - - - $PROJ_DIR$\..\..\modbus\include\mb.h - - - $PROJ_DIR$\..\..\modbus\ascii\mbascii.c - - - $PROJ_DIR$\..\..\modbus\ascii\mbascii.h - - - $PROJ_DIR$\..\..\modbus\include\mbconfig.h - - - $PROJ_DIR$\..\..\modbus\rtu\mbcrc.c - - - $PROJ_DIR$\..\..\modbus\rtu\mbcrc.h - - - $PROJ_DIR$\..\..\modbus\include\mbframe.h - - - $PROJ_DIR$\..\..\modbus\include\mbfunc.h - - - $PROJ_DIR$\..\..\modbus\functions\mbfunccoils.c - - - $PROJ_DIR$\..\..\modbus\functions\mbfuncdiag.c - - - $PROJ_DIR$\..\..\modbus\functions\mbfuncdisc.c - - - $PROJ_DIR$\..\..\modbus\functions\mbfuncholding.c - - - $PROJ_DIR$\..\..\modbus\functions\mbfuncinput.c - - - $PROJ_DIR$\..\..\modbus\functions\mbfuncother.c - - - $PROJ_DIR$\..\..\modbus\include\mbport.h - - - $PROJ_DIR$\..\..\modbus\include\mbproto.h - - - $PROJ_DIR$\..\..\modbus\rtu\mbrtu.c - - - $PROJ_DIR$\..\..\modbus\rtu\mbrtu.h - - - $PROJ_DIR$\..\..\modbus\functions\mbutils.c - - - $PROJ_DIR$\..\..\modbus\include\mbutils.h - - - - port - - $PROJ_DIR$\port\port.h - - - $PROJ_DIR$\port\portevent.c - - - $PROJ_DIR$\port\portother.c - - - $PROJ_DIR$\port\portserial.c - - - $PROJ_DIR$\port\porttimer.c - - - - $PROJ_DIR$\demo.c - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/demo.eww b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/demo.eww deleted file mode 100644 index 2b25c134..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/demo.eww +++ /dev/null @@ -1,10 +0,0 @@ - - - - - $WS_DIR$\demo.ewp - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/demo_rtu.bat b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/demo_rtu.bat deleted file mode 100644 index 402b4757..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/demo_rtu.bat +++ /dev/null @@ -1 +0,0 @@ -..\..\tools\modpoll.exe -m rtu -a 10 -r 1000 -c 4 -t 3 -b 38400 -d 8 -p even COM1 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/FreeRTOSConfig.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/FreeRTOSConfig.h deleted file mode 100644 index 2ada12d8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/FreeRTOSConfig.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - * - * See http://www.freertos.org/a00110.html. - *----------------------------------------------------------*/ - - -//#define configUSE_PREEMPTION 1 -#define configUSE_PREEMPTION 0 -#define configUSE_IDLE_HOOK 1 -#define configUSE_TICK_HOOK 1 -#define configCPU_CLOCK_HZ ( ( unsigned long ) 64000000 ) -#define configTICK_RATE_HZ ( ( portTickType ) 1000 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 70 ) -#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 0x2C00 ) ) -#define configMAX_TASK_NAME_LEN ( 16 ) -#define configUSE_TRACE_FACILITY 1 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 0 -#define configUSE_CO_ROUTINES 0 -#define configUSE_MUTEXES 1 -#define configUSE_RECURSIVE_MUTEXES 1 -#define configCHECK_FOR_STACK_OVERFLOW 2 - -#define configGENERATE_RUN_TIME_STATS 0 -#define configUSE_TRACE_FACILITY 1 - -#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 ) -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) -#define configQUEUE_REGISTRY_SIZE 10 - -/* Set the following definitions to 1 to include the API function, or zero -to exclude the API function. */ - -#define INCLUDE_vTaskPrioritySet 1 -#define INCLUDE_uxTaskPriorityGet 1 -#define INCLUDE_vTaskDelete 0 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 1 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 -#define INCLUDE_uxTaskGetStackHighWaterMark 1 - - - -#define configKERNEL_INTERRUPT_PRIORITY ( 0x0f << 4 ) /* Priority 15, or 255 as only the top four bits are implemented. This is the lowest priority. */ -#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( 5 << 4 ) /* Priority 5, or 80 as only the top four bits are implemented. */ - - -#endif /* FREERTOS_CONFIG_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/croutine.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/croutine.c deleted file mode 100644 index fea7c541..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/croutine.c +++ /dev/null @@ -1,371 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/* - * Some kernel aware debuggers require data to be viewed to be global, rather - * than file scope. - */ -#ifdef portREMOVE_STATIC_QUALIFIER - #define static -#endif - - -/* Lists for ready and blocked co-routines. --------------------*/ -static xList pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ -static xList xDelayedCoRoutineList1; /*< Delayed co-routines. */ -static xList xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ -static xList * pxDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used. */ -static xList * pxOverflowDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ -static xList xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ - -/* Other file private variables. --------------------------------*/ -corCRCB * pxCurrentCoRoutine = NULL; -static unsigned portBASE_TYPE uxTopCoRoutineReadyPriority = 0; -static portTickType xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0; - -/* The initial state of the co-routine when it is created. */ -#define corINITIAL_STATE ( 0 ) - -/* - * Place the co-routine represented by pxCRCB into the appropriate ready queue - * for the priority. It is inserted at the end of the list. - * - * This macro accesses the co-routine ready lists and therefore must not be - * used from within an ISR. - */ -#define prvAddCoRoutineToReadyQueue( pxCRCB ) \ -{ \ - if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \ - { \ - uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \ -} - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first co-routine. - */ -static void prvInitialiseCoRoutineLists( void ); - -/* - * Co-routines that are readied by an interrupt cannot be placed directly into - * the ready lists (there is no mutual exclusion). Instead they are placed in - * in the pending ready list in order that they can later be moved to the ready - * list by the co-routine scheduler. - */ -static void prvCheckPendingReadyList( void ); - -/* - * Macro that looks at the list of co-routines that are currently delayed to - * see if any require waking. - * - * Co-routines are stored in the queue in the order of their wake time - - * meaning once one co-routine has been found whose timer has not expired - * we need not look any further down the list. - */ -static void prvCheckDelayedList( void ); - -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex ) -{ -signed portBASE_TYPE xReturn; -corCRCB *pxCoRoutine; - - /* Allocate the memory that will store the co-routine control block. */ - pxCoRoutine = ( corCRCB * ) pvPortMalloc( sizeof( corCRCB ) ); - if( pxCoRoutine ) - { - /* If pxCurrentCoRoutine is NULL then this is the first co-routine to - be created and the co-routine data structures need initialising. */ - if( pxCurrentCoRoutine == NULL ) - { - pxCurrentCoRoutine = pxCoRoutine; - prvInitialiseCoRoutineLists(); - } - - /* Check the priority is within limits. */ - if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES ) - { - uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1; - } - - /* Fill out the co-routine control block from the function parameters. */ - pxCoRoutine->uxState = corINITIAL_STATE; - pxCoRoutine->uxPriority = uxPriority; - pxCoRoutine->uxIndex = uxIndex; - pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; - - /* Initialise all the other co-routine control block parameters. */ - vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) ); - vListInitialiseItem( &( pxCoRoutine->xEventListItem ) ); - - /* Set the co-routine control block as a link back from the xListItem. - This is so we can get back to the containing CRCB from a generic item - in a list. */ - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine ); - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - - /* Now the co-routine has been initialised it can be added to the ready - list at the correct priority. */ - prvAddCoRoutineToReadyQueue( pxCoRoutine ); - - xReturn = pdPASS; - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList ) -{ -portTickType xTimeToWake; - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xCoRoutineTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xCoRoutineTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - - if( pxEventList ) - { - /* Also add the co-routine to an event list. If this is done then the - function must be called with interrupts disabled. */ - vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -static void prvCheckPendingReadyList( void ) -{ - /* Are there any co-routines waiting to get moved to the ready list? These - are co-routines that have been readied by an ISR. The ISR cannot access - the ready lists itself. */ - while( !listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) ) - { - corCRCB *pxUnblockedCRCB; - - /* The pending ready list can be accessed by an ISR. */ - portDISABLE_INTERRUPTS(); - { - pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyCoRoutineList) ); - vListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - } - portENABLE_INTERRUPTS(); - - vListRemove( &( pxUnblockedCRCB->xGenericListItem ) ); - prvAddCoRoutineToReadyQueue( pxUnblockedCRCB ); - } -} -/*-----------------------------------------------------------*/ - -static void prvCheckDelayedList( void ) -{ -corCRCB *pxCRCB; - - xPassedTicks = xTaskGetTickCount() - xLastTickCount; - while( xPassedTicks ) - { - xCoRoutineTickCount++; - xPassedTicks--; - - /* If the tick count has overflowed we need to swap the ready lists. */ - if( xCoRoutineTickCount == 0 ) - { - xList * pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. If there are - any items in pxDelayedCoRoutineList here then there is an error! */ - pxTemp = pxDelayedCoRoutineList; - pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; - pxOverflowDelayedCoRoutineList = pxTemp; - } - - /* See if this tick has made a timeout expire. */ - while( ( pxCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList ) ) != NULL ) - { - if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) ) - { - /* Timeout not yet expired. */ - break; - } - - portDISABLE_INTERRUPTS(); - { - /* The event could have occurred just before this critical - section. If this is the case then the generic list item will - have been moved to the pending ready list and the following - line is still valid. Also the pvContainer parameter will have - been set to NULL so the following lines are also valid. */ - vListRemove( &( pxCRCB->xGenericListItem ) ); - - /* Is the co-routine waiting on an event also? */ - if( pxCRCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxCRCB->xEventListItem ) ); - } - } - portENABLE_INTERRUPTS(); - - prvAddCoRoutineToReadyQueue( pxCRCB ); - } - } - - xLastTickCount = xCoRoutineTickCount; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineSchedule( void ) -{ - /* See if any co-routines readied by events need moving to the ready lists. */ - prvCheckPendingReadyList(); - - /* See if any delayed co-routines have timed out. */ - prvCheckDelayedList(); - - /* Find the highest priority queue that contains ready co-routines. */ - while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) ) - { - if( uxTopCoRoutineReadyPriority == 0 ) - { - /* No more co-routines to check. */ - return; - } - --uxTopCoRoutineReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines - of the same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ); - - /* Call the co-routine. */ - ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex ); - - return; -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseCoRoutineLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyCoRoutineLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedCoRoutineList1 ); - vListInitialise( ( xList * ) &xDelayedCoRoutineList2 ); - vListInitialise( ( xList * ) &xPendingReadyCoRoutineList ); - - /* Start with pxDelayedCoRoutineList using list1 and the - pxOverflowDelayedCoRoutineList using list2. */ - pxDelayedCoRoutineList = &xDelayedCoRoutineList1; - pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList ) -{ -corCRCB *pxUnblockedCRCB; -signed portBASE_TYPE xReturn; - - /* This function is called from within an interrupt. It can only access - event lists and the pending ready list. */ - pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - vListInsertEnd( ( xList * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) ); - - if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority ) - { - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/FreeRTOS.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/FreeRTOS.h deleted file mode 100644 index ed7a36f5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/FreeRTOS.h +++ /dev/null @@ -1,420 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -#ifndef INC_FREERTOS_H -#define INC_FREERTOS_H - - -/* - * Include the generic headers required for the FreeRTOS port being used. - */ -#include - -/* Basic FreeRTOS definitions. */ -#include "projdefs.h" - -/* Application specific configuration options. */ -#include "FreeRTOSConfig.h" - -/* Definitions specific to the port being used. */ -#include "portable.h" - - -/* Defines the prototype to which the application task hook function must -conform. */ -typedef portBASE_TYPE (*pdTASK_HOOK_CODE)( void * ); - - - - - -/* - * Check all the required application specific macros have been defined. - * These macros are application specific and (as downloaded) are defined - * within FreeRTOSConfig.h. - */ - -#ifndef configUSE_PREEMPTION - #error Missing definition: configUSE_PREEMPTION should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_IDLE_HOOK - #error Missing definition: configUSE_IDLE_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_TICK_HOOK - #error Missing definition: configUSE_TICK_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_CO_ROUTINES - #error Missing definition: configUSE_CO_ROUTINES should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskPrioritySet - #error Missing definition: INCLUDE_vTaskPrioritySet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_uxTaskPriorityGet - #error Missing definition: INCLUDE_uxTaskPriorityGet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelete - #error Missing definition: INCLUDE_vTaskDelete should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskCleanUpResources - #error Missing definition: INCLUDE_vTaskCleanUpResources should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskSuspend - #error Missing definition: INCLUDE_vTaskSuspend should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelayUntil - #error Missing definition: INCLUDE_vTaskDelayUntil should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelay - #error Missing definition: INCLUDE_vTaskDelay should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_16_BIT_TICKS - #error Missing definition: configUSE_16_BIT_TICKS should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_APPLICATION_TASK_TAG - #define configUSE_APPLICATION_TASK_TAG 0 -#endif - -#ifndef INCLUDE_uxTaskGetStackHighWaterMark - #define INCLUDE_uxTaskGetStackHighWaterMark 0 -#endif - -#ifndef configUSE_RECURSIVE_MUTEXES - #define configUSE_RECURSIVE_MUTEXES 0 -#endif - -#ifndef configUSE_MUTEXES - #define configUSE_MUTEXES 0 -#endif - -#ifndef configUSE_COUNTING_SEMAPHORES - #define configUSE_COUNTING_SEMAPHORES 0 -#endif - -#ifndef configUSE_ALTERNATIVE_API - #define configUSE_ALTERNATIVE_API 0 -#endif - -#ifndef portCRITICAL_NESTING_IN_TCB - #define portCRITICAL_NESTING_IN_TCB 0 -#endif - -#ifndef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 16 -#endif - -#ifndef configIDLE_SHOULD_YIELD - #define configIDLE_SHOULD_YIELD 1 -#endif - -#if configMAX_TASK_NAME_LEN < 1 - #undef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 1 -#endif - -#ifndef INCLUDE_xTaskResumeFromISR - #define INCLUDE_xTaskResumeFromISR 1 -#endif - -#ifndef INCLUDE_xTaskGetSchedulerState - #define INCLUDE_xTaskGetSchedulerState 0 -#endif - -#if ( configUSE_MUTEXES == 1 ) - /* xTaskGetCurrentTaskHandle is used by the priority inheritance mechanism - within the mutex implementation so must be available if mutexes are used. */ - #undef INCLUDE_xTaskGetCurrentTaskHandle - #define INCLUDE_xTaskGetCurrentTaskHandle 1 -#else - #ifndef INCLUDE_xTaskGetCurrentTaskHandle - #define INCLUDE_xTaskGetCurrentTaskHandle 0 - #endif -#endif - - -#ifndef portSET_INTERRUPT_MASK_FROM_ISR - #define portSET_INTERRUPT_MASK_FROM_ISR() 0 -#endif - -#ifndef portCLEAR_INTERRUPT_MASK_FROM_ISR - #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) uxSavedStatusValue -#endif - - -#ifndef configQUEUE_REGISTRY_SIZE - #define configQUEUE_REGISTRY_SIZE 0 -#endif - -#if configQUEUE_REGISTRY_SIZE < 1 - #define configQUEUE_REGISTRY_SIZE 0 - #define vQueueAddToRegistry( xQueue, pcName ) - #define vQueueUnregisterQueue( xQueue ) -#endif - - -/* Remove any unused trace macros. */ -#ifndef traceSTART - /* Used to perform any necessary initialisation - for example, open a file - into which trace is to be written. */ - #define traceSTART() -#endif - -#ifndef traceEND - /* Use to close a trace, for example close a file into which trace has been - written. */ - #define traceEND() -#endif - -#ifndef traceTASK_SWITCHED_IN - /* Called after a task has been selected to run. pxCurrentTCB holds a pointer - to the task control block of the selected task. */ - #define traceTASK_SWITCHED_IN() -#endif - -#ifndef traceTASK_SWITCHED_OUT - /* Called before a task has been selected to run. pxCurrentTCB holds a pointer - to the task control block of the task being switched out. */ - #define traceTASK_SWITCHED_OUT() -#endif - -#ifndef traceBLOCKING_ON_QUEUE_RECEIVE - /* Task is about to block because it cannot read from a - queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore - upon which the read was attempted. pxCurrentTCB points to the TCB of the - task that attempted the read. */ - #define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ) -#endif - -#ifndef traceBLOCKING_ON_QUEUE_SEND - /* Task is about to block because it cannot write to a - queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore - upon which the write was attempted. pxCurrentTCB points to the TCB of the - task that attempted the write. */ - #define traceBLOCKING_ON_QUEUE_SEND( pxQueue ) -#endif - -#ifndef configCHECK_FOR_STACK_OVERFLOW - #define configCHECK_FOR_STACK_OVERFLOW 0 -#endif - -/* The following event macros are embedded in the kernel API calls. */ - -#ifndef traceQUEUE_CREATE - #define traceQUEUE_CREATE( pxNewQueue ) -#endif - -#ifndef traceQUEUE_CREATE_FAILED - #define traceQUEUE_CREATE_FAILED() -#endif - -#ifndef traceCREATE_MUTEX - #define traceCREATE_MUTEX( pxNewQueue ) -#endif - -#ifndef traceCREATE_MUTEX_FAILED - #define traceCREATE_MUTEX_FAILED() -#endif - -#ifndef traceGIVE_MUTEX_RECURSIVE - #define traceGIVE_MUTEX_RECURSIVE( pxMutex ) -#endif - -#ifndef traceGIVE_MUTEX_RECURSIVE_FAILED - #define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ) -#endif - -#ifndef traceTAKE_MUTEX_RECURSIVE - #define traceTAKE_MUTEX_RECURSIVE( pxMutex ) -#endif - -#ifndef traceCREATE_COUNTING_SEMAPHORE - #define traceCREATE_COUNTING_SEMAPHORE() -#endif - -#ifndef traceCREATE_COUNTING_SEMAPHORE_FAILED - #define traceCREATE_COUNTING_SEMAPHORE_FAILED() -#endif - -#ifndef traceQUEUE_SEND - #define traceQUEUE_SEND( pxQueue ) -#endif - -#ifndef traceQUEUE_SEND_FAILED - #define traceQUEUE_SEND_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_RECEIVE - #define traceQUEUE_RECEIVE( pxQueue ) -#endif - -#ifndef traceQUEUE_PEEK - #define traceQUEUE_PEEK( pxQueue ) -#endif - -#ifndef traceQUEUE_RECEIVE_FAILED - #define traceQUEUE_RECEIVE_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_SEND_FROM_ISR - #define traceQUEUE_SEND_FROM_ISR( pxQueue ) -#endif - -#ifndef traceQUEUE_SEND_FROM_ISR_FAILED - #define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_RECEIVE_FROM_ISR - #define traceQUEUE_RECEIVE_FROM_ISR( pxQueue ) -#endif - -#ifndef traceQUEUE_RECEIVE_FROM_ISR_FAILED - #define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_DELETE - #define traceQUEUE_DELETE( pxQueue ) -#endif - -#ifndef traceTASK_CREATE - #define traceTASK_CREATE( pxNewTCB ) -#endif - -#ifndef traceTASK_CREATE_FAILED - #define traceTASK_CREATE_FAILED( pxNewTCB ) -#endif - -#ifndef traceTASK_DELETE - #define traceTASK_DELETE( pxTaskToDelete ) -#endif - -#ifndef traceTASK_DELAY_UNTIL - #define traceTASK_DELAY_UNTIL() -#endif - -#ifndef traceTASK_DELAY - #define traceTASK_DELAY() -#endif - -#ifndef traceTASK_PRIORITY_SET - #define traceTASK_PRIORITY_SET( pxTask, uxNewPriority ) -#endif - -#ifndef traceTASK_SUSPEND - #define traceTASK_SUSPEND( pxTaskToSuspend ) -#endif - -#ifndef traceTASK_RESUME - #define traceTASK_RESUME( pxTaskToResume ) -#endif - -#ifndef traceTASK_RESUME_FROM_ISR - #define traceTASK_RESUME_FROM_ISR( pxTaskToResume ) -#endif - -#ifndef traceTASK_INCREMENT_TICK - #define traceTASK_INCREMENT_TICK( xTickCount ) -#endif - -#ifndef configGENERATE_RUN_TIME_STATS - #define configGENERATE_RUN_TIME_STATS 0 -#endif - -#if ( configGENERATE_RUN_TIME_STATS == 1 ) - - #ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS - #error If configGENERATE_RUN_TIME_STATS is defined then portCONFIGURE_TIMER_FOR_RUN_TIME_STATS must also be defined. portCONFIGURE_TIMER_FOR_RUN_TIME_STATS should call a port layer function to setup a peripheral timer/counter that can then be used as the run time counter time base. - #endif /* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS */ - - #ifndef portGET_RUN_TIME_COUNTER_VALUE - #error If configGENERATE_RUN_TIME_STATS is defined then portGET_RUN_TIME_COUNTER_VALUE must also be defined. portGET_RUN_TIME_COUNTER_VALUE should evaluate to the counter value of the timer/counter peripheral used as the run time counter time base. - #endif /* portGET_RUN_TIME_COUNTER_VALUE */ - -#endif /* configGENERATE_RUN_TIME_STATS */ - -#ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS - #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() -#endif - -#ifndef configUSE_MALLOC_FAILED_HOOK - #define configUSE_MALLOC_FAILED_HOOK 0 -#endif - -#ifndef portPRIVILEGE_BIT - #define portPRIVILEGE_BIT ( ( unsigned portBASE_TYPE ) 0x00 ) -#endif - -#ifndef portYIELD_WITHIN_API - #define portYIELD_WITHIN_API portYIELD -#endif - -#ifndef pvPortMallocAligned - #define pvPortMallocAligned( xSize, pvBuffer ) pvPortMalloc( xSize ); ( void ) pvBuffer -#endif - -#ifndef vPortFreeAligned - #define vPortFreeAligned( pvBlockToFree ) vPortFree( pvBlockToFree ) -#endif - -#endif /* INC_FREERTOS_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/StackMacros.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/StackMacros.h deleted file mode 100644 index b0c48224..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/StackMacros.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -#ifndef STACK_MACROS_H -#define STACK_MACROS_H - -/* - * Call the stack overflow hook function if the stack of the task being swapped - * out is currently overflowed, or looks like it might have overflowed in the - * past. - * - * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check - * the current stack state only - comparing the current top of stack value to - * the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1 - * will also cause the last few stack bytes to be checked to ensure the value - * to which the bytes were set when the task was created have not been - * overwritten. Note this second test does not guarantee that an overflowed - * stack will always be recognised. - */ - -/*-----------------------------------------------------------*/ - -#if( configCHECK_FOR_STACK_OVERFLOW == 0 ) - - /* FreeRTOSConfig.h is not set to check for stack overflows. */ - #define taskFIRST_CHECK_FOR_STACK_OVERFLOW() - #define taskSECOND_CHECK_FOR_STACK_OVERFLOW() - -#endif /* configCHECK_FOR_STACK_OVERFLOW == 0 */ -/*-----------------------------------------------------------*/ - -#if( configCHECK_FOR_STACK_OVERFLOW == 1 ) - - /* FreeRTOSConfig.h is only set to use the first method of - overflow checking. */ - #define taskSECOND_CHECK_FOR_STACK_OVERFLOW() - -#endif -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW > 0 ) && ( portSTACK_GROWTH < 0 ) ) - - /* Only the current stack state is to be checked. */ - #define taskFIRST_CHECK_FOR_STACK_OVERFLOW() \ - { \ - extern void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName ); \ - \ - /* Is the currently saved stack pointer within the stack limit? */ \ - if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \ - { \ - vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW > 0 ) && ( portSTACK_GROWTH > 0 ) ) - - /* Only the current stack state is to be checked. */ - #define taskFIRST_CHECK_FOR_STACK_OVERFLOW() \ - { \ - extern void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName ); \ - \ - /* Is the currently saved stack pointer within the stack limit? */ \ - if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \ - { \ - vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) ) - - #define taskSECOND_CHECK_FOR_STACK_OVERFLOW() \ - { \ - extern void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName ); \ - static const unsigned char ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \ - \ - \ - /* Has the extremity of the task stack ever been written over? */ \ - if( memcmp( ( void * ) pxCurrentTCB->pxStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \ - { \ - vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) ) - - #define taskSECOND_CHECK_FOR_STACK_OVERFLOW() \ - { \ - extern void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName ); \ - char *pcEndOfStack = ( char * ) pxCurrentTCB->pxEndOfStack; \ - static const unsigned char ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \ - \ - \ - pcEndOfStack -= sizeof( ucExpectedStackBytes ); \ - \ - /* Has the extremity of the task stack ever been written over? */ \ - if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \ - { \ - vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ -/*-----------------------------------------------------------*/ - -#endif /* STACK_MACROS_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/croutine.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/croutine.h deleted file mode 100644 index dc52c0f6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/croutine.h +++ /dev/null @@ -1,749 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -#ifndef INC_FREERTOS_H - #error "#include FreeRTOS.h" must appear in source files before "#include croutine.h" -#endif - - - - -#ifndef CO_ROUTINE_H -#define CO_ROUTINE_H - -#include "list.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Used to hide the implementation of the co-routine control block. The -control block structure however has to be included in the header due to -the macro implementation of the co-routine functionality. */ -typedef void * xCoRoutineHandle; - -/* Defines the prototype to which co-routine functions must conform. */ -typedef void (*crCOROUTINE_CODE)( xCoRoutineHandle, unsigned portBASE_TYPE ); - -typedef struct corCoRoutineControlBlock -{ - crCOROUTINE_CODE pxCoRoutineFunction; - xListItem xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the CRCB in event lists. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ - unsigned portBASE_TYPE uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ - unsigned short uxState; /*< Used internally by the co-routine implementation. */ -} corCRCB; /* Co-routine control block. Note must be identical in size down to uxPriority with tskTCB. */ - -/** - * croutine. h - *
- portBASE_TYPE xCoRoutineCreate(
-                                 crCOROUTINE_CODE pxCoRoutineCode,
-                                 unsigned portBASE_TYPE uxPriority,
-                                 unsigned portBASE_TYPE uxIndex
-                               );
- * - * Create a new co-routine and add it to the list of co-routines that are - * ready to run. - * - * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine - * functions require special syntax - see the co-routine section of the WEB - * documentation for more information. - * - * @param uxPriority The priority with respect to other co-routines at which - * the co-routine will run. - * - * @param uxIndex Used to distinguish between different co-routines that - * execute the same function. See the example below and the co-routine section - * of the WEB documentation for further information. - * - * @return pdPASS if the co-routine was successfully created and added to a ready - * list, otherwise an error code defined with ProjDefs.h. - * - * Example usage: - 
- // Co-routine to be created.
- void vFlashCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- static const char cLedToFlash[ 2 ] = { 5, 6 };
- static const portTickType xTimeToDelay[ 2 ] = { 200, 400 };
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // This co-routine just delays for a fixed period, then toggles
-         // an LED.  Two co-routines are created using this function, so
-         // the uxIndex parameter is used to tell the co-routine which
-         // LED to flash and how long to delay.  This assumes xQueue has
-         // already been created.
-         vParTestToggleLED( cLedToFlash[ uxIndex ] );
-         crDELAY( xHandle, uxFlashRates[ uxIndex ] );
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
-
- // Function that creates two co-routines.
- void vOtherFunction( void )
- {
- unsigned char ucParameterToPass;
- xTaskHandle xHandle;
-		
-     // Create two co-routines at priority 0.  The first is given index 0
-     // so (from the code above) toggles LED 5 every 200 ticks.  The second
-     // is given index 1 so toggles LED 6 every 400 ticks.
-     for( uxIndex = 0; uxIndex < 2; uxIndex++ )
-     {
-         xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
-     }
- }
-
- * \defgroup xCoRoutineCreate xCoRoutineCreate - * \ingroup Tasks - */ -signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex ); - - -/** - * croutine. h - *
- void vCoRoutineSchedule( void );
- * - * Run a co-routine. - * - * vCoRoutineSchedule() executes the highest priority co-routine that is able - * to run. The co-routine will execute until it either blocks, yields or is - * preempted by a task. Co-routines execute cooperatively so one - * co-routine cannot be preempted by another, but can be preempted by a task. - * - * If an application comprises of both tasks and co-routines then - * vCoRoutineSchedule should be called from the idle task (in an idle task - * hook). - * - * Example usage: - 
- // This idle task hook will schedule a co-routine each time it is called.
- // The rest of the idle task will execute between co-routine calls.
- void vApplicationIdleHook( void )
- {
-	vCoRoutineSchedule();
- }
-
- // Alternatively, if you do not require any other part of the idle task to
- // execute, the idle task hook can call vCoRoutineScheduler() within an
- // infinite loop.
- void vApplicationIdleHook( void )
- {
-    for( ;; )
-    {
-        vCoRoutineSchedule();
-    }
- }
-
- * \defgroup vCoRoutineSchedule vCoRoutineSchedule - * \ingroup Tasks - */ -void vCoRoutineSchedule( void ); - -/** - * croutine. h - * 
- crSTART( xCoRoutineHandle xHandle );
- * - * This macro MUST always be called at the start of a co-routine function. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static long ulAVariable;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-          // Co-routine functionality goes here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crSTART( pxCRCB ) switch( ( ( corCRCB * )pxCRCB )->uxState ) { case 0: - -/** - * croutine. h - * 
- crEND();
- * - * This macro MUST always be called at the end of a co-routine function. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static long ulAVariable;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-          // Co-routine functionality goes here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crEND() } - -/* - * These macros are intended for internal use by the co-routine implementation - * only. The macros should not be used directly by application writers. - */ -#define crSET_STATE0( xHandle ) ( ( corCRCB * )xHandle)->uxState = (__LINE__ * 2); return; case (__LINE__ * 2): -#define crSET_STATE1( xHandle ) ( ( corCRCB * )xHandle)->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1): - -/** - * croutine. h - *
- crDELAY( xCoRoutineHandle xHandle, portTickType xTicksToDelay );
- * - * Delay a co-routine for a fixed period of time. - * - * crDELAY can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * @param xHandle The handle of the co-routine to delay. This is the xHandle - * parameter of the co-routine function. - * - * @param xTickToDelay The number of ticks that the co-routine should delay - * for. The actual amount of time this equates to is defined by - * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_RATE_MS - * can be used to convert ticks to milliseconds. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- // We are to delay for 200ms.
- static const xTickType xDelayTime = 200 / portTICK_RATE_MS;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-        // Delay for 200ms.
-        crDELAY( xHandle, xDelayTime );
-
-        // Do something here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crDELAY crDELAY - * \ingroup Tasks - */ -#define crDELAY( xHandle, xTicksToDelay ) \ - if( xTicksToDelay > 0 ) \ - { \ - vCoRoutineAddToDelayedList( xTicksToDelay, NULL ); \ - } \ - crSET_STATE0( xHandle ); - -/** - * 
- crQUEUE_SEND(
-                  xCoRoutineHandle xHandle,
-                  xQueueHandle pxQueue,
-                  void *pvItemToQueue,
-                  portTickType xTicksToWait,
-                  portBASE_TYPE *pxResult
-             )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_SEND can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue on which the data will be posted. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvItemToQueue A pointer to the data being posted onto the queue. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied from pvItemToQueue into the queue - * itself. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for space to become available on the queue, should space not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_RATE_MS can be used to convert ticks to milliseconds (see example - * below). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully posted onto the queue, otherwise it will be set to an - * error defined within ProjDefs.h. - * - * Example usage: - 
- // Co-routine function that blocks for a fixed period then posts a number onto
- // a queue.
- static void prvCoRoutineFlashTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portBASE_TYPE xNumberToPost = 0;
- static portBASE_TYPE xResult;
-
-    // Co-routines must begin with a call to crSTART().
-    crSTART( xHandle );
-
-    for( ;; )
-    {
-        // This assumes the queue has already been created.
-        crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
-
-        if( xResult != pdPASS )
-        {
-            // The message was not posted!
-        }
-
-        // Increment the number to be posted onto the queue.
-        xNumberToPost++;
-
-        // Delay for 100 ticks.
-        crDELAY( xHandle, 100 );
-    }
-
-    // Co-routines must end with a call to crEND().
-    crEND();
- }
- * \defgroup crQUEUE_SEND crQUEUE_SEND - * \ingroup Tasks - */ -#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ -{ \ - *pxResult = xQueueCRSend( pxQueue, pvItemToQueue, xTicksToWait ); \ - if( *pxResult == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( xHandle ); \ - *pxResult = xQueueCRSend( pxQueue, pvItemToQueue, 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( xHandle ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 
-  crQUEUE_RECEIVE(
-                     xCoRoutineHandle xHandle,
-                     xQueueHandle pxQueue,
-                     void *pvBuffer,
-                     portTickType xTicksToWait,
-                     portBASE_TYPE *pxResult
-                 )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_RECEIVE can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue from which the data will be received. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvBuffer The buffer into which the received item is to be copied. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied into pvBuffer. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for data to become available from the queue, should data not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_RATE_MS can be used to convert ticks to milliseconds (see the - * crQUEUE_SEND example). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully retrieved from the queue, otherwise it will be set to - * an error code as defined within ProjDefs.h. - * - * Example usage: - 
- // A co-routine receives the number of an LED to flash from a queue.  It
- // blocks on the queue until the number is received.
- static void prvCoRoutineFlashWorkTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portBASE_TYPE xResult;
- static unsigned portBASE_TYPE uxLEDToFlash;
-
-    // All co-routines must start with a call to crSTART().
-    crSTART( xHandle );
-
-    for( ;; )
-    {
-        // Wait for data to become available on the queue.
-        crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
-        if( xResult == pdPASS )
-        {
-            // We received the LED to flash - flash it!
-            vParTestToggleLED( uxLEDToFlash );
-        }
-    }
-
-    crEND();
- }
- * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ -{ \ - *pxResult = xQueueCRReceive( pxQueue, pvBuffer, xTicksToWait ); \ - if( *pxResult == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( xHandle ); \ - *pxResult = xQueueCRReceive( pxQueue, pvBuffer, 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( xHandle ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 
-  crQUEUE_SEND_FROM_ISR(
-                            xQueueHandle pxQueue,
-                            void *pvItemToQueue,
-                            portBASE_TYPE xCoRoutinePreviouslyWoken
-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue - * that is being used from within a co-routine. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. - * - * @return pdTRUE if a co-routine was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 
- // A co-routine that blocks on a queue waiting for characters to be received.
- static void vReceivingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- char cRxedChar;
- portBASE_TYPE xResult;
-
-     // All co-routines must start with a call to crSTART().
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // Wait for data to become available on the queue.  This assumes the
-         // queue xCommsRxQueue has already been created!
-         crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
-         // Was a character received?
-         if( xResult == pdPASS )
-         {
-             // Process the character here.
-         }
-     }
-
-     // All co-routines must end with a call to crEND().
-     crEND();
- }
-
- // An ISR that uses a queue to send characters received on a serial port to
- // a co-routine.
- void vUART_ISR( void )
- {
- char cRxedChar;
- portBASE_TYPE xCRWokenByPost = pdFALSE;
-
-     // We loop around reading characters until there are none left in the UART.
-     while( UART_RX_REG_NOT_EMPTY() )
-     {
-         // Obtain the character from the UART.
-         cRxedChar = UART_RX_REG;
-
-         // Post the character onto a queue.  xCRWokenByPost will be pdFALSE
-         // the first time around the loop.  If the post causes a co-routine
-         // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
-         // In this manner we can ensure that if more than one co-routine is
-         // blocked on the queue only one is woken by this ISR no matter how
-         // many characters are posted to the queue.
-         xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
-     }
- }
- * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) - - -/** - * croutine. h - * 
-  crQUEUE_SEND_FROM_ISR(
-                            xQueueHandle pxQueue,
-                            void *pvBuffer,
-                            portBASE_TYPE * pxCoRoutineWoken
-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data - * from a queue that is being used from within a co-routine (a co-routine - * posted to the queue). - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvBuffer A pointer to a buffer into which the received item will be - * placed. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from the queue into - * pvBuffer. - * - * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become - * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a - * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise - * *pxCoRoutineWoken will remain unchanged. - * - * @return pdTRUE an item was successfully received from the queue, otherwise - * pdFALSE. - * - * Example usage: - 
- // A co-routine that posts a character to a queue then blocks for a fixed
- // period.  The character is incremented each time.
- static void vSendingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // cChar holds its value while this co-routine is blocked and must therefore
- // be declared static.
- static char cCharToTx = 'a';
- portBASE_TYPE xResult;
-
-     // All co-routines must start with a call to crSTART().
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // Send the next character to the queue.
-         crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
-
-         if( xResult == pdPASS )
-         {
-             // The character was successfully posted to the queue.
-         }
-		 else
-		 {
-			// Could not post the character to the queue.
-		 }
-
-         // Enable the UART Tx interrupt to cause an interrupt in this
-		 // hypothetical UART.  The interrupt will obtain the character
-		 // from the queue and send it.
-		 ENABLE_RX_INTERRUPT();
-
-		 // Increment to the next character then block for a fixed period.
-		 // cCharToTx will maintain its value across the delay as it is
-		 // declared static.
-		 cCharToTx++;
-		 if( cCharToTx > 'x' )
-		 {
-			cCharToTx = 'a';
-		 }
-		 crDELAY( 100 );
-     }
-
-     // All co-routines must end with a call to crEND().
-     crEND();
- }
-
- // An ISR that uses a queue to receive characters to send on a UART.
- void vUART_ISR( void )
- {
- char cCharToTx;
- portBASE_TYPE xCRWokenByPost = pdFALSE;
-
-     while( UART_TX_REG_EMPTY() )
-     {
-         // Are there any characters in the queue waiting to be sent?
-		 // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
-		 // is woken by the post - ensuring that only a single co-routine is
-		 // woken no matter how many times we go around this loop.
-         if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
-		 {
-			 SEND_CHARACTER( cCharToTx );
-		 }
-     }
- }
- * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( pxQueue, pvBuffer, pxCoRoutineWoken ) - -/* - * This function is intended for internal use by the co-routine macros only. - * The macro nature of the co-routine implementation requires that the - * prototype appears here. The function should not be used by application - * writers. - * - * Removes the current co-routine from its ready list and places it in the - * appropriate delayed list. - */ -void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList ); - -/* - * This function is intended for internal use by the queue implementation only. - * The function should not be used by application writers. - * - * Removes the highest priority co-routine from the event list and places it in - * the pending ready list. - */ -signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList ); - -#ifdef __cplusplus -} -#endif - -#endif /* CO_ROUTINE_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/list.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/list.h deleted file mode 100644 index 759d8d32..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/list.h +++ /dev/null @@ -1,305 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -/* - * This is the list implementation used by the scheduler. While it is tailored - * heavily for the schedulers needs, it is also available for use by - * application code. - * - * xLists can only store pointers to xListItems. Each xListItem contains a - * numeric value (xItemValue). Most of the time the lists are sorted in - * descending item value order. - * - * Lists are created already containing one list item. The value of this - * item is the maximum possible that can be stored, it is therefore always at - * the end of the list and acts as a marker. The list member pxHead always - * points to this marker - even though it is at the tail of the list. This - * is because the tail contains a wrap back pointer to the true head of - * the list. - * - * In addition to it's value, each list item contains a pointer to the next - * item in the list (pxNext), a pointer to the list it is in (pxContainer) - * and a pointer to back to the object that contains it. These later two - * pointers are included for efficiency of list manipulation. There is - * effectively a two way link between the object containing the list item and - * the list item itself. - * - * - * \page ListIntroduction List Implementation - * \ingroup FreeRTOSIntro - */ - -/* - Changes from V4.3.1 - - + Included local const within listGET_OWNER_OF_NEXT_ENTRY() to assist - compiler with optimisation. Thanks B.R. -*/ - -#ifndef LIST_H -#define LIST_H - -#ifdef __cplusplus -extern "C" { -#endif -/* - * Definition of the only type of object that a list can contain. - */ -struct xLIST_ITEM -{ - portTickType xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ - volatile struct xLIST_ITEM * pxNext; /*< Pointer to the next xListItem in the list. */ - volatile struct xLIST_ITEM * pxPrevious;/*< Pointer to the previous xListItem in the list. */ - void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ - void * pvContainer; /*< Pointer to the list in which this list item is placed (if any). */ -}; -typedef struct xLIST_ITEM xListItem; /* For some reason lint wants this as two separate definitions. */ - -struct xMINI_LIST_ITEM -{ - portTickType xItemValue; - volatile struct xLIST_ITEM *pxNext; - volatile struct xLIST_ITEM *pxPrevious; -}; -typedef struct xMINI_LIST_ITEM xMiniListItem; - -/* - * Definition of the type of queue used by the scheduler. - */ -typedef struct xLIST -{ - volatile unsigned portBASE_TYPE uxNumberOfItems; - volatile xListItem * pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to pvListGetOwnerOfNextEntry (). */ - volatile xMiniListItem xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ -} xList; - -/* - * Access macro to set the owner of a list item. The owner of a list item - * is the object (usually a TCB) that contains the list item. - * - * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( pxListItem )->pvOwner = ( void * ) pxOwner - -/* - * Access macro to set the value of the list item. In most cases the value is - * used to sort the list in descending order. - * - * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( pxListItem )->xItemValue = xValue - -/* - * Access macro the retrieve the value of the list item. The value can - * represent anything - for example a the priority of a task, or the time at - * which a task should be unblocked. - * - * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) - -/* - * Access macro to determine if a list contains any items. The macro will - * only have the value true if the list is empty. - * - * \page listLIST_IS_EMPTY listLIST_IS_EMPTY - * \ingroup LinkedList - */ -#define listLIST_IS_EMPTY( pxList ) ( ( pxList )->uxNumberOfItems == ( unsigned portBASE_TYPE ) 0 ) - -/* - * Access macro to return the number of items in the list. - */ -#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) - -/* - * Access function to obtain the owner of the next entry in a list. - * - * The list member pxIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list - * and returns that entries pxOwner parameter. Using multiple calls to this - * function it is therefore possible to move through every item contained in - * a list. - * - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the next item owner is to be returned. - * - * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ -{ \ -xList * const pxConstList = pxList; \ - /* Increment the index to the next item and return the item, ensuring */ \ - /* we don't return the marker used at the end of the list. */ \ - ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ - if( ( pxConstList )->pxIndex == ( xListItem * ) &( ( pxConstList )->xListEnd ) ) \ - { \ - ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ - } \ - pxTCB = ( pxConstList )->pxIndex->pvOwner; \ -} - - -/* - * Access function to obtain the owner of the first entry in a list. Lists - * are normally sorted in ascending item value order. - * - * This function returns the pxOwner member of the first item in the list. - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the owner of the head item is to be - * returned. - * - * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( ( pxList->uxNumberOfItems != ( unsigned portBASE_TYPE ) 0 ) ? ( (&( pxList->xListEnd ))->pxNext->pvOwner ) : ( NULL ) ) - -/* - * Check to see if a list item is within a list. The list item maintains a - * "container" pointer that points to the list it is in. All this macro does - * is check to see if the container and the list match. - * - * @param pxList The list we want to know if the list item is within. - * @param pxListItem The list item we want to know if is in the list. - * @return pdTRUE is the list item is in the list, otherwise pdFALSE. - * pointer against - */ -#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( pxListItem )->pvContainer == ( void * ) pxList ) - -/* - * Must be called before a list is used! This initialises all the members - * of the list structure and inserts the xListEnd item into the list as a - * marker to the back of the list. - * - * @param pxList Pointer to the list being initialised. - * - * \page vListInitialise vListInitialise - * \ingroup LinkedList - */ -void vListInitialise( xList *pxList ); - -/* - * Must be called before a list item is used. This sets the list container to - * null so the item does not think that it is already contained in a list. - * - * @param pxItem Pointer to the list item being initialised. - * - * \page vListInitialiseItem vListInitialiseItem - * \ingroup LinkedList - */ -void vListInitialiseItem( xListItem *pxItem ); - -/* - * Insert a list item into a list. The item will be inserted into the list in - * a position determined by its item value (descending item value order). - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The item to that is to be placed in the list. - * - * \page vListInsert vListInsert - * \ingroup LinkedList - */ -void vListInsert( xList *pxList, xListItem *pxNewListItem ); - -/* - * Insert a list item into a list. The item will be inserted in a position - * such that it will be the last item within the list returned by multiple - * calls to listGET_OWNER_OF_NEXT_ENTRY. - * - * The list member pvIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pvIndex to the next item in the list. - * Placing an item in a list using vListInsertEnd effectively places the item - * in the list position pointed to by pvIndex. This means that every other - * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before - * the pvIndex parameter again points to the item being inserted. - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The list item to be inserted into the list. - * - * \page vListInsertEnd vListInsertEnd - * \ingroup LinkedList - */ -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ); - -/* - * Remove an item from a list. The list item has a pointer to the list that - * it is in, so only the list item need be passed into the function. - * - * @param vListRemove The item to be removed. The item will remove itself from - * the list pointed to by it's pxContainer parameter. - * - * \page vListRemove vListRemove - * \ingroup LinkedList - */ -void vListRemove( xListItem *pxItemToRemove ); - -#ifdef __cplusplus -} -#endif - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/mpu_wrappers.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/mpu_wrappers.h deleted file mode 100644 index a64c4198..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/mpu_wrappers.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -#ifndef MPU_WRAPPERS_H -#define MPU_WRAPPERS_H - -/* This file redefines API functions to be called through a wrapper macro, but -only for ports that are using the MPU. */ -#ifdef portUSING_MPU_WRAPPERS - - /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is - included from queue.c or task.c to prevent it from having an effict within - those files. */ - #ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE - - #define xTaskGenericCreate MPU_xTaskGenericCreate - #define vTaskAllocateMPURegions MPU_vTaskAllocateMPURegions - #define vTaskDelete MPU_vTaskDelete - #define vTaskDelayUntil MPU_vTaskDelayUntil - #define vTaskDelay MPU_vTaskDelay - #define uxTaskPriorityGet MPU_uxTaskPriorityGet - #define vTaskPrioritySet MPU_vTaskPrioritySet - #define vTaskSuspend MPU_vTaskSuspend - #define xTaskIsTaskSuspended MPU_xTaskIsTaskSuspended - #define vTaskResume MPU_vTaskResume - #define vTaskSuspendAll MPU_vTaskSuspendAll - #define xTaskResumeAll MPU_xTaskResumeAll - #define xTaskGetTickCount MPU_xTaskGetTickCount - #define uxTaskGetNumberOfTasks MPU_uxTaskGetNumberOfTasks - #define vTaskList MPU_vTaskList - #define vTaskGetRunTimeStats MPU_vTaskGetRunTimeStats - #define vTaskStartTrace MPU_vTaskStartTrace - #define ulTaskEndTrace MPU_ulTaskEndTrace - #define vTaskSetApplicationTaskTag MPU_vTaskSetApplicationTaskTag - #define xTaskGetApplicationTaskTag MPU_xTaskGetApplicationTaskTag - #define xTaskCallApplicationTaskHook MPU_xTaskCallApplicationTaskHook - #define uxTaskGetStackHighWaterMark MPU_uxTaskGetStackHighWaterMark - #define xTaskGetCurrentTaskHandle MPU_xTaskGetCurrentTaskHandle - #define xTaskGetSchedulerState MPU_xTaskGetSchedulerState - - #define xQueueCreate MPU_xQueueCreate - #define xQueueCreateMutex MPU_xQueueCreateMutex - #define xQueueGiveMutexRecursive MPU_xQueueGiveMutexRecursive - #define xQueueTakeMutexRecursive MPU_xQueueTakeMutexRecursive - #define xQueueCreateCountingSemaphore MPU_xQueueCreateCountingSemaphore - #define xQueueGenericSend MPU_xQueueGenericSend - #define xQueueAltGenericSend MPU_xQueueAltGenericSend - #define xQueueAltGenericReceive MPU_xQueueAltGenericReceive - #define xQueueGenericReceive MPU_xQueueGenericReceive - #define uxQueueMessagesWaiting MPU_uxQueueMessagesWaiting - #define vQueueDelete MPU_vQueueDelete - - #define pvPortMalloc MPU_pvPortMalloc - #define vPortFree MPU_vPortFree - #define xPortGetFreeHeapSize MPU_xPortGetFreeHeapSize - #define vPortInitialiseBlocks MPU_vPortInitialiseBlocks - - #if configQUEUE_REGISTRY_SIZE > 0 - #define vQueueAddToRegistry MPU_vQueueAddToRegistry - #define vQueueUnregisterQueue MPU_vQueueUnregisterQueue - #endif - - /* Remove the privileged function macro. */ - #define PRIVILEGED_FUNCTION - - #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ - - /* Ensure API functions go in the privileged execution section. */ - #define PRIVILEGED_FUNCTION __attribute__((section("privileged_functions"))) - #define PRIVILEGED_DATA __attribute__((section("privileged_data"))) - //#define PRIVILEGED_DATA - - #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ - -#else /* portUSING_MPU_WRAPPERS */ - - #define PRIVILEGED_FUNCTION - #define PRIVILEGED_DATA - #define portUSING_MPU_WRAPPERS 0 - -#endif /* portUSING_MPU_WRAPPERS */ - - -#endif /* MPU_WRAPPERS_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/portable.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/portable.h deleted file mode 100644 index eef3d355..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/portable.h +++ /dev/null @@ -1,390 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -/*----------------------------------------------------------- - * Portable layer API. Each function must be defined for each port. - *----------------------------------------------------------*/ - -#ifndef PORTABLE_H -#define PORTABLE_H - -/* Include the macro file relevant to the port being used. */ - -#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT - #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT - #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef GCC_MEGA_AVR - #include "../portable/GCC/ATMega323/portmacro.h" -#endif - -#ifdef IAR_MEGA_AVR - #include "../portable/IAR/ATMega323/portmacro.h" -#endif - -#ifdef MPLAB_PIC24_PORT - #include "..\..\Source\portable\MPLAB\PIC24_dsPIC\portmacro.h" -#endif - -#ifdef MPLAB_DSPIC_PORT - #include "..\..\Source\portable\MPLAB\PIC24_dsPIC\portmacro.h" -#endif - -#ifdef MPLAB_PIC18F_PORT - #include "..\..\Source\portable\MPLAB\PIC18F\portmacro.h" -#endif - -#ifdef MPLAB_PIC32MX_PORT - #include "..\..\Source\portable\MPLAB\PIC32MX\portmacro.h" -#endif - -#ifdef _FEDPICC - #include "libFreeRTOS/Include/portmacro.h" -#endif - -#ifdef SDCC_CYGNAL - #include "../../Source/portable/SDCC/Cygnal/portmacro.h" -#endif - -#ifdef GCC_ARM7 - #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" -#endif - -#ifdef GCC_ARM7_ECLIPSE - #include "portmacro.h" -#endif - -#ifdef ROWLEY_LPC23xx - #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h" -#endif - -#ifdef IAR_MSP430 - #include "..\..\Source\portable\IAR\MSP430\portmacro.h" -#endif - -#ifdef GCC_MSP430 - #include "../../Source/portable/GCC/MSP430F449/portmacro.h" -#endif - -#ifdef ROWLEY_MSP430 - #include "../../Source/portable/Rowley/MSP430F449/portmacro.h" -#endif - -#ifdef ARM7_LPC21xx_KEIL_RVDS - #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h" -#endif - -#ifdef SAM7_GCC - #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" -#endif - -#ifdef SAM7_IAR - #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" -#endif - -#ifdef SAM9XE_IAR - #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h" -#endif - -#ifdef LPC2000_IAR - #include "..\..\Source\portable\IAR\LPC2000\portmacro.h" -#endif - -#ifdef STR71X_IAR - #include "..\..\Source\portable\IAR\STR71x\portmacro.h" -#endif - -#ifdef STR75X_IAR - #include "..\..\Source\portable\IAR\STR75x\portmacro.h" -#endif - -#ifdef STR75X_GCC - #include "..\..\Source\portable\GCC\STR75x\portmacro.h" -#endif - -#ifdef STR91X_IAR - #include "..\..\Source\portable\IAR\STR91x\portmacro.h" -#endif - -#ifdef GCC_H8S - #include "../../Source/portable/GCC/H8S2329/portmacro.h" -#endif - -#ifdef GCC_AT91FR40008 - #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" -#endif - -#ifdef RVDS_ARMCM3_LM3S102 - #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h" -#endif - -#ifdef GCC_ARMCM3_LM3S102 - #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" -#endif - -#ifdef GCC_ARMCM3 - #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" -#endif - -#ifdef IAR_ARM_CM3 - #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" -#endif - -#ifdef IAR_ARMCM3_LM - #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" -#endif - -#ifdef HCS12_CODE_WARRIOR - #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" -#endif - -#ifdef MICROBLAZE_GCC - #include "../../Source/portable/GCC/MicroBlaze/portmacro.h" -#endif - -#ifdef TERN_EE - #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h" -#endif - -#ifdef GCC_HCS12 - #include "../../Source/portable/GCC/HCS12/portmacro.h" -#endif - -#ifdef GCC_MCF5235 - #include "../../Source/portable/GCC/MCF5235/portmacro.h" -#endif - -#ifdef COLDFIRE_V2_GCC - #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h" -#endif - -#ifdef COLDFIRE_V2_CODEWARRIOR - #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h" -#endif - -#ifdef GCC_PPC405 - #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h" -#endif - -#ifdef GCC_PPC440 - #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h" -#endif - -#ifdef _16FX_SOFTUNE - #include "..\..\Source\portable\Softune\MB96340\portmacro.h" -#endif - -#ifdef BCC_INDUSTRIAL_PC_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\PC\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef BCC_FLASH_LITE_186_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef __GNUC__ - #ifdef __AVR32_AVR32A__ - #include "portmacro.h" - #endif -#endif - -#ifdef __ICCAVR32__ - #ifdef __CORE__ - #if __CORE__ == __AVR32A__ - #include "portmacro.h" - #endif - #endif -#endif - -#ifdef __91467D - #include "portmacro.h" -#endif - -#ifdef __96340 - #include "portmacro.h" -#endif - - -#ifdef __IAR_V850ES_Fx3__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_V850ES_Jx3__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_V850ES_Jx3_L__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_V850ES_Jx2__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_V850ES_Hx2__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_78K0R_Kx3__ - #include "../../Source/portable/IAR/78K0R/portmacro.h" -#endif - -#ifdef __IAR_78K0R_Kx3L__ - #include "../../Source/portable/IAR/78K0R/portmacro.h" -#endif - -/* Catch all to ensure portmacro.h is included in the build. Newer demos -have the path as part of the project options, rather than as relative from -the project location. If portENTER_CRITICAL() has not been defined then -portmacro.h has not yet been included - as every portmacro.h provides a -portENTER_CRITICAL() definition. Check the demo application for your demo -to find the path to the correct portmacro.h file. */ -#ifndef portENTER_CRITICAL - #include "portmacro.h" -#endif - -#if portBYTE_ALIGNMENT == 8 - #define portBYTE_ALIGNMENT_MASK ( 0x0007 ) -#endif - -#if portBYTE_ALIGNMENT == 4 - #define portBYTE_ALIGNMENT_MASK ( 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define portBYTE_ALIGNMENT_MASK ( 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define portBYTE_ALIGNMENT_MASK ( 0x0000 ) -#endif - -#ifndef portBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -#ifndef portNUM_CONFIGURABLE_REGIONS - #define portNUM_CONFIGURABLE_REGIONS 1 -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -#include "mpu_wrappers.h" - -/* - * Setup the stack of a new task so it is ready to be placed under the - * scheduler control. The registers have to be placed on the stack in - * the order that the port expects to find them. - * - */ -#if( portUSING_MPU_WRAPPERS == 1 ) - portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged ) PRIVILEGED_FUNCTION; -#else - portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ); -#endif - -/* - * Map to the memory management routines required for the port. - */ -void *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION; -void vPortFree( void *pv ) PRIVILEGED_FUNCTION; -void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION; -size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION; - -/* - * Setup the hardware ready for the scheduler to take control. This generally - * sets up a tick interrupt and sets timers for the correct tick frequency. - */ -portBASE_TYPE xPortStartScheduler( void ) PRIVILEGED_FUNCTION; - -/* - * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so - * the hardware is left in its original condition after the scheduler stops - * executing. - */ -void vPortEndScheduler( void ) PRIVILEGED_FUNCTION; - -/* - * The structures and methods of manipulating the MPU are contained within the - * port layer. - * - * Fills the xMPUSettings structure with the memory region information - * contained in xRegions. - */ -#if( portUSING_MPU_WRAPPERS == 1 ) - struct xMEMORY_REGION; - void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth ) PRIVILEGED_FUNCTION; -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* PORTABLE_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/projdefs.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/projdefs.h deleted file mode 100644 index c5539d9e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/projdefs.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -#ifndef PROJDEFS_H -#define PROJDEFS_H - -/* Defines the prototype to which task functions must conform. */ -typedef void (*pdTASK_CODE)( void * ); - -#define pdTRUE ( 1 ) -#define pdFALSE ( 0 ) - -#define pdPASS ( 1 ) -#define pdFAIL ( 0 ) -#define errQUEUE_EMPTY ( 0 ) -#define errQUEUE_FULL ( 0 ) - -/* Error definitions. */ -#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) -#define errNO_TASK_TO_RUN ( -2 ) -#define errQUEUE_BLOCKED ( -4 ) -#define errQUEUE_YIELD ( -5 ) - -#endif /* PROJDEFS_H */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/queue.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/queue.h deleted file mode 100644 index 992bff36..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/queue.h +++ /dev/null @@ -1,1261 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -#ifndef INC_FREERTOS_H - #error "#include FreeRTOS.h" must appear in source files before "#include queue.h" -#endif - - - - -#ifndef QUEUE_H -#define QUEUE_H - -#ifdef __cplusplus -extern "C" { -#endif - - -#include "mpu_wrappers.h" - - -typedef void * xQueueHandle; - - -/* For internal use only. */ -#define queueSEND_TO_BACK ( 0 ) -#define queueSEND_TO_FRONT ( 1 ) - - -/** - * queue. h - * 
- xQueueHandle xQueueCreate(
-							  unsigned portBASE_TYPE uxQueueLength,
-							  unsigned portBASE_TYPE uxItemSize
-						  );
- *
- * - * Creates a new queue instance. This allocates the storage required by the - * new queue and returns a handle for the queue. - * - * @param uxQueueLength The maximum number of items that the queue can contain. - * - * @param uxItemSize The number of bytes each item in the queue will require. - * Items are queued by copy, not by reference, so this is the number of bytes - * that will be copied for each posted item. Each item on the queue must be - * the same size. - * - * @return If the queue is successfully create then a handle to the newly - * created queue is returned. If the queue cannot be created then 0 is - * returned. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- };
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
-
-	// Create a queue capable of containing 10 unsigned long values.
-	xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );
-	if( xQueue1 == 0 )
-	{
-		// Queue was not created and must not be used.
-	}
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue2 == 0 )
-	{
-		// Queue was not created and must not be used.
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueCreate xQueueCreate - * \ingroup QueueManagement - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueSendToToFront(
-								   xQueueHandle	xQueue,
-								   const	void	*	pvItemToQueue,
-								   portTickType	xTicksToWait
-							   );
- *
- * - * This is a macro that calls xQueueGenericSend(). - * - * Post an item to the front of a queue. The item is queued by copy, not by - * reference. This function must not be called from an interrupt service - * routine. See xQueueSendFromISR () for an alternative which may be used - * in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0 and the - * queue is full. The time is defined in tick periods so the constant - * portTICK_RATE_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- unsigned long ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 unsigned long values.
-	xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an unsigned long.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, queueSEND_TO_FRONT ) - -/** - * queue. h - * 
- portBASE_TYPE xQueueSendToBack(
-								   xQueueHandle	xQueue,
-								   const	void	*	pvItemToQueue,
-								   portTickType	xTicksToWait
-							   );
- *
- * - * This is a macro that calls xQueueGenericSend(). - * - * Post an item to the back of a queue. The item is queued by copy, not by - * reference. This function must not be called from an interrupt service - * routine. See xQueueSendFromISR () for an alternative which may be used - * in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0 and the queue - * is full. The time is defined in tick periods so the constant - * portTICK_RATE_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- unsigned long ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 unsigned long values.
-	xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an unsigned long.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, queueSEND_TO_BACK ) - -/** - * queue. h - * 
- portBASE_TYPE xQueueSend(
-							  xQueueHandle xQueue,
-							  const void * pvItemToQueue,
-							  portTickType xTicksToWait
-						 );
- *
- * - * This is a macro that calls xQueueGenericSend(). It is included for - * backward compatibility with versions of FreeRTOS.org that did not - * include the xQueueSendToFront() and xQueueSendToBack() macros. It is - * equivalent to xQueueSendToBack(). - * - * Post an item on a queue. The item is queued by copy, not by reference. - * This function must not be called from an interrupt service routine. - * See xQueueSendFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0 and the - * queue is full. The time is defined in tick periods so the constant - * portTICK_RATE_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- unsigned long ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 unsigned long values.
-	xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an unsigned long.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueSend( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueSend( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, queueSEND_TO_BACK ) - - -/** - * queue. h - * 
- portBASE_TYPE xQueueGenericSend(
-									xQueueHandle xQueue,
-									const void * pvItemToQueue,
-									portTickType xTicksToWait
-									portBASE_TYPE xCopyPosition
-								);
- *
- * - * It is preferred that the macros xQueueSend(), xQueueSendToFront() and - * xQueueSendToBack() are used in place of calling this function directly. - * - * Post an item on a queue. The item is queued by copy, not by reference. - * This function must not be called from an interrupt service routine. - * See xQueueSendFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0 and the - * queue is full. The time is defined in tick periods so the constant - * portTICK_RATE_MS should be used to convert to real time if this is required. - * - * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the - * item at the back of the queue, or queueSEND_TO_FRONT to place the item - * at the front of the queue (for high priority messages). - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- unsigned long ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 unsigned long values.
-	xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an unsigned long.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( portTickType ) 10, queueSEND_TO_BACK ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0, queueSEND_TO_BACK );
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition ); - -/** - * queue. h - * 
- portBASE_TYPE xQueuePeek(
-							 xQueueHandle xQueue,
-							 void *pvBuffer,
-							 portTickType xTicksToWait
-						 );
- * - * This is a macro that calls the xQueueGenericReceive() function. - * - * Receive an item from a queue without removing the item from the queue. - * The item is received by copy so a buffer of adequate size must be - * provided. The number of bytes copied into the buffer was defined when - * the queue was created. - * - * Successfully received items remain on the queue so will be returned again - * by the next call, or a call to xQueueReceive(). - * - * This macro must not be used in an interrupt service routine. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. The time is defined in tick periods so the constant - * portTICK_RATE_MS should be used to convert to real time if this is required. - * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue - * is empty. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- xQueueHandle xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Send a pointer to a struct AMessage object.  Don't block if the
-	// queue is already full.
-	pxMessage = & xMessage;
-	xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to peek the data from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-	if( xQueue != 0 )
-	{
-		// Peek a message on the created queue.  Block for 10 ticks if a
-		// message is not immediately available.
-		if( xQueuePeek( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )
-		{
-			// pcRxedMessage now points to the struct AMessage variable posted
-			// by vATask, but the item still remains on the queue.
-		}
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -#define xQueuePeek( xQueue, pvBuffer, xTicksToWait ) xQueueGenericReceive( xQueue, pvBuffer, xTicksToWait, pdTRUE ) - -/** - * queue. h - * 
- portBASE_TYPE xQueueReceive(
-								 xQueueHandle xQueue,
-								 void *pvBuffer,
-								 portTickType xTicksToWait
-							);
- * - * This is a macro that calls the xQueueGenericReceive() function. - * - * Receive an item from a queue. The item is received by copy so a buffer of - * adequate size must be provided. The number of bytes copied into the buffer - * was defined when the queue was created. - * - * Successfully received items are removed from the queue. - * - * This function must not be used in an interrupt service routine. See - * xQueueReceiveFromISR for an alternative that can. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. xQueueReceive() will return immediately if xTicksToWait - * is zero and the queue is empty. The time is defined in tick periods so the - * constant portTICK_RATE_MS should be used to convert to real time if this is - * required. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- xQueueHandle xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Send a pointer to a struct AMessage object.  Don't block if the
-	// queue is already full.
-	pxMessage = & xMessage;
-	xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to receive from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-	if( xQueue != 0 )
-	{
-		// Receive a message on the created queue.  Block for 10 ticks if a
-		// message is not immediately available.
-		if( xQueueReceive( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )
-		{
-			// pcRxedMessage now points to the struct AMessage variable posted
-			// by vATask.
-		}
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -#define xQueueReceive( xQueue, pvBuffer, xTicksToWait ) xQueueGenericReceive( xQueue, pvBuffer, xTicksToWait, pdFALSE ) - - -/** - * queue. h - * 
- portBASE_TYPE xQueueGenericReceive(
-									   xQueueHandle	xQueue,
-									   void	*pvBuffer,
-									   portTickType	xTicksToWait
-									   portBASE_TYPE	xJustPeek
-									);
- * - * It is preferred that the macro xQueueReceive() be used rather than calling - * this function directly. - * - * Receive an item from a queue. The item is received by copy so a buffer of - * adequate size must be provided. The number of bytes copied into the buffer - * was defined when the queue was created. - * - * This function must not be used in an interrupt service routine. See - * xQueueReceiveFromISR for an alternative that can. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. The time is defined in tick periods so the constant - * portTICK_RATE_MS should be used to convert to real time if this is required. - * xQueueGenericReceive() will return immediately if the queue is empty and - * xTicksToWait is 0. - * - * @param xJustPeek When set to true, the item received from the queue is not - * actually removed from the queue - meaning a subsequent call to - * xQueueReceive() will return the same item. When set to false, the item - * being received from the queue is also removed from the queue. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- xQueueHandle xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Send a pointer to a struct AMessage object.  Don't block if the
-	// queue is already full.
-	pxMessage = & xMessage;
-	xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to receive from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-	if( xQueue != 0 )
-	{
-		// Receive a message on the created queue.  Block for 10 ticks if a
-		// message is not immediately available.
-		if( xQueueGenericReceive( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )
-		{
-			// pcRxedMessage now points to the struct AMessage variable posted
-			// by vATask.
-		}
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueGenericReceive( xQueueHandle xQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeek ); - -/** - * queue. h - * 
unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle xQueue );
- * - * Return the number of messages stored in a queue. - * - * @param xQueue A handle to the queue being queried. - * - * @return The number of messages available in the queue. - * - * \page uxQueueMessagesWaiting uxQueueMessagesWaiting - * \ingroup QueueManagement - */ -unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle xQueue ); - -/** - * queue. h - * 
void vQueueDelete( xQueueHandle xQueue );
- * - * Delete a queue - freeing all the memory allocated for storing of items - * placed on the queue. - * - * @param xQueue A handle to the queue to be deleted. - * - * \page vQueueDelete vQueueDelete - * \ingroup QueueManagement - */ -void vQueueDelete( xQueueHandle xQueue ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueSendToFrontFromISR(
-										 xQueueHandle pxQueue,
-										 const void *pvItemToQueue,
-										 portBASE_TYPE *pxHigherPriorityTaskWoken
-									  );
-
- * - * This is a macro that calls xQueueGenericSendFromISR(). - * - * Post an item to the front of a queue. It is safe to use this macro from - * within an interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueSendToFrontFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueSendToFromFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the data was successfully sent to the queue, otherwise - * errQUEUE_FULL. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- char cIn;
- portBASE_TYPE xHigherPrioritTaskWoken;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWoken = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post the byte.
-		xQueueSendToFrontFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.
-	if( xHigherPriorityTaskWoken )
-	{
-		taskYIELD ();
-	}
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -#define xQueueSendToFrontFromISR( pxQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( pxQueue, pvItemToQueue, pxHigherPriorityTaskWoken, queueSEND_TO_FRONT ) - - -/** - * queue. h - * 
- portBASE_TYPE xQueueSendToBackFromISR(
-										 xQueueHandle pxQueue,
-										 const void *pvItemToQueue,
-										 portBASE_TYPE *pxHigherPriorityTaskWoken
-									  );
-
- * - * This is a macro that calls xQueueGenericSendFromISR(). - * - * Post an item to the back of a queue. It is safe to use this macro from - * within an interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueSendToBackFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueSendToBackFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the data was successfully sent to the queue, otherwise - * errQUEUE_FULL. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- char cIn;
- portBASE_TYPE xHigherPriorityTaskWoken;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWoken = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post the byte.
-		xQueueSendToBackFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.
-	if( xHigherPriorityTaskWoken )
-	{
-		taskYIELD ();
-	}
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -#define xQueueSendToBackFromISR( pxQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( pxQueue, pvItemToQueue, pxHigherPriorityTaskWoken, queueSEND_TO_BACK ) - -/** - * queue. h - * 
- portBASE_TYPE xQueueSendFromISR(
-									 xQueueHandle pxQueue,
-									 const void *pvItemToQueue,
-									 portBASE_TYPE *pxHigherPriorityTaskWoken
-								);
-
- * - * This is a macro that calls xQueueGenericSendFromISR(). It is included - * for backward compatibility with versions of FreeRTOS.org that did not - * include the xQueueSendToBackFromISR() and xQueueSendToFrontFromISR() - * macros. - * - * Post an item to the back of a queue. It is safe to use this function from - * within an interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueSendFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueSendFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the data was successfully sent to the queue, otherwise - * errQUEUE_FULL. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- char cIn;
- portBASE_TYPE xHigherPriorityTaskWoken;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWoken = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post the byte.
-		xQueueSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.
-	if( xHigherPriorityTaskWoken )
-	{
-		// Actual macro used here is port specific.
-		taskYIELD_FROM_ISR ();
-	}
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -#define xQueueSendFromISR( pxQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( pxQueue, pvItemToQueue, pxHigherPriorityTaskWoken, queueSEND_TO_BACK ) - -/** - * queue. h - * 
- portBASE_TYPE xQueueGenericSendFromISR(
-										   xQueueHandle	pxQueue,
-										   const	void	*pvItemToQueue,
-										   portBASE_TYPE	*pxHigherPriorityTaskWoken,
-										   portBASE_TYPE	xCopyPosition
-									   );
-
- * - * It is preferred that the macros xQueueSendFromISR(), - * xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place - * of calling this function directly. - * - * Post an item on a queue. It is safe to use this function from within an - * interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueGenericSendFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the - * item at the back of the queue, or queueSEND_TO_FRONT to place the item - * at the front of the queue (for high priority messages). - * - * @return pdTRUE if the data was successfully sent to the queue, otherwise - * errQUEUE_FULL. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- char cIn;
- portBASE_TYPE xHigherPriorityTaskWokenByPost;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWokenByPost = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post each byte.
-		xQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.  Note that the
-	// name of the yield function required is port specific.
-	if( xHigherPriorityTaskWokenByPost )
-	{
-		taskYIELD_YIELD_FROM_ISR();
-	}
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueGenericSendFromISR( xQueueHandle pxQueue, const void * const pvItemToQueue, signed portBASE_TYPE *pxHigherPriorityTaskWoken, portBASE_TYPE xCopyPosition ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueReceiveFromISR(
-									   xQueueHandle	pxQueue,
-									   void	*pvBuffer,
-									   portBASE_TYPE	*pxTaskWoken
-								   );
- *
- * - * Receive an item from a queue. It is safe to use this function from within an - * interrupt service routine. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param pxTaskWoken A task may be blocked waiting for space to become - * available on the queue. If xQueueReceiveFromISR causes such a task to - * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will - * remain unchanged. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
-
- xQueueHandle xQueue;
-
- // Function to create a queue and post some values.
- void vAFunction( void *pvParameters )
- {
- char cValueToPost;
- const portTickType xBlockTime = ( portTickType )0xff;
-
-	// Create a queue capable of containing 10 characters.
-	xQueue = xQueueCreate( 10, sizeof( char ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Post some characters that will be used within an ISR.  If the queue
-	// is full then this task will block for xBlockTime ticks.
-	cValueToPost = 'a';
-	xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
-	cValueToPost = 'b';
-	xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
-
-	// ... keep posting characters ... this task may block when the queue
-	// becomes full.
-
-	cValueToPost = 'c';
-	xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
- }
-
- // ISR that outputs all the characters received on the queue.
- void vISR_Routine( void )
- {
- portBASE_TYPE xTaskWokenByReceive = pdFALSE;
- char cRxedChar;
-
-	while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )
-	{
-		// A character was received.  Output the character now.
-		vOutputCharacter( cRxedChar );
-
-		// If removing the character from the queue woke the task that was
-		// posting onto the queue cTaskWokenByReceive will have been set to
-		// pdTRUE.  No matter how many times this loop iterates only one
-		// task will be woken.
-	}
-
-	if( cTaskWokenByPost != ( char ) pdFALSE;
-	{
-		taskYIELD ();
-	}
- }
-
- * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void * const pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - -/* - * Utilities to query queue that are safe to use from an ISR. These utilities - * should be used only from witin an ISR, or within a critical section. - */ -signed portBASE_TYPE xQueueIsQueueEmptyFromISR( const xQueueHandle pxQueue ); -signed portBASE_TYPE xQueueIsQueueFullFromISR( const xQueueHandle pxQueue ); -unsigned portBASE_TYPE uxQueueMessagesWaitingFromISR( const xQueueHandle pxQueue ); - - -/* - * xQueueAltGenericSend() is an alternative version of xQueueGenericSend(). - * Likewise xQueueAltGenericReceive() is an alternative version of - * xQueueGenericReceive(). - * - * The source code that implements the alternative (Alt) API is much - * simpler because it executes everything from within a critical section. - * This is the approach taken by many other RTOSes, but FreeRTOS.org has the - * preferred fully featured API too. The fully featured API has more - * complex code that takes longer to execute, but makes much less use of - * critical sections. Therefore the alternative API sacrifices interrupt - * responsiveness to gain execution speed, whereas the fully featured API - * sacrifices execution speed to ensure better interrupt responsiveness. - */ -signed portBASE_TYPE xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition ); -signed portBASE_TYPE xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking ); -#define xQueueAltSendToFront( xQueue, pvItemToQueue, xTicksToWait ) xQueueAltGenericSend( xQueue, pvItemToQueue, xTicksToWait, queueSEND_TO_FRONT ) -#define xQueueAltSendToBack( xQueue, pvItemToQueue, xTicksToWait ) xQueueAltGenericSend( xQueue, pvItemToQueue, xTicksToWait, queueSEND_TO_BACK ) -#define xQueueAltReceive( xQueue, pvBuffer, xTicksToWait ) xQueueAltGenericReceive( xQueue, pvBuffer, xTicksToWait, pdFALSE ) -#define xQueueAltPeek( xQueue, pvBuffer, xTicksToWait ) xQueueAltGenericReceive( xQueue, pvBuffer, xTicksToWait, pdTRUE ) - -/* - * The functions defined above are for passing data to and from tasks. The - * functions below are the equivalents for passing data to and from - * co-routines. - * - * These functions are called from the co-routine macro implementation and - * should not be called directly from application code. Instead use the macro - * wrappers defined within croutine.h. - */ -signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ); -signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); -signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ); -signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); - -/* - * For internal use only. Use xSemaphoreCreateMutex() or - * xSemaphoreCreateCounting() instead of calling these functions directly. - */ -xQueueHandle xQueueCreateMutex( void ); -xQueueHandle xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount ); - -/* - * For internal use only. Use xSemaphoreTakeMutexRecursive() or - * xSemaphoreGiveMutexRecursive() instead of calling these functions directly. - */ -portBASE_TYPE xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime ); -portBASE_TYPE xQueueGiveMutexRecursive( xQueueHandle xMutex ); - -/* - * The registry is provided as a means for kernel aware debuggers to - * locate queues, semaphores and mutexes. Call vQueueAddToRegistry() add - * a queue, semaphore or mutex handle to the registry if you want the handle - * to be available to a kernel aware debugger. If you are not using a kernel - * aware debugger then this function can be ignored. - * - * configQUEUE_REGISTRY_SIZE defines the maximum number of handles the - * registry can hold. configQUEUE_REGISTRY_SIZE must be greater than 0 - * within FreeRTOSConfig.h for the registry to be available. Its value - * does not effect the number of queues, semaphores and mutexes that can be - * created - just the number that the registry can hold. - * - * @param xQueue The handle of the queue being added to the registry. This - * is the handle returned by a call to xQueueCreate(). Semaphore and mutex - * handles can also be passed in here. - * - * @param pcName The name to be associated with the handle. This is the - * name that the kernel aware debugger will display. - */ -#if configQUEUE_REGISTRY_SIZE > 0 - void vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName ); -#endif - - - - -#ifdef __cplusplus -} -#endif - -#endif /* QUEUE_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/semphr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/semphr.h deleted file mode 100644 index a01902b1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/semphr.h +++ /dev/null @@ -1,711 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -#ifndef INC_FREERTOS_H - #error "#include FreeRTOS.h" must appear in source files before "#include semphr.h" -#endif - -#ifndef SEMAPHORE_H -#define SEMAPHORE_H - -#include "queue.h" - -typedef xQueueHandle xSemaphoreHandle; - -#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( unsigned char ) 1 ) -#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( unsigned char ) 0 ) -#define semGIVE_BLOCK_TIME ( ( portTickType ) 0 ) - - -/** - * semphr. h - * 
vSemaphoreCreateBinary( xSemaphoreHandle xSemaphore )
- * - * Macro that implements a semaphore by using the existing queue mechanism. - * The queue length is 1 as this is a binary semaphore. The data size is 0 - * as we don't want to actually store any data - we just want to know if the - * queue is empty or full. - * - * This type of semaphore can be used for pure synchronisation between tasks or - * between an interrupt and a task. The semaphore need not be given back once - * obtained, so one task/interrupt can continuously 'give' the semaphore while - * another continuously 'takes' the semaphore. For this reason this type of - * semaphore does not use a priority inheritance mechanism. For an alternative - * that does use priority inheritance see xSemaphoreCreateMutex(). - * - * @param xSemaphore Handle to the created semaphore. Should be of type xSemaphoreHandle. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().
-    // This is a macro so pass the variable in directly.
-    vSemaphoreCreateBinary( xSemaphore );
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.  
-    }
- }
-
- * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary - * \ingroup Semaphores - */ -#define vSemaphoreCreateBinary( xSemaphore ) { \ - xSemaphore = xQueueCreate( ( unsigned portBASE_TYPE ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH ); \ - if( xSemaphore != NULL ) \ - { \ - xSemaphoreGive( xSemaphore ); \ - } \ - } - -/** - * semphr. h - * xSemaphoreTake( - * xSemaphoreHandle xSemaphore, - * portTickType xBlockTime - * ) - * - * Macro to obtain a semaphore. The semaphore must have previously been - * created with a call to vSemaphoreCreateBinary(), xSemaphoreCreateMutex() or - * xSemaphoreCreateCounting(). - * - * @param xSemaphore A handle to the semaphore being taken - obtained when - * the semaphore was created. - * - * @param xBlockTime The time in ticks to wait for the semaphore to become - * available. The macro portTICK_RATE_MS can be used to convert this to a - * real time. A block time of zero can be used to poll the semaphore. A block - * time of portMAX_DELAY can be used to block indefinitely (provided - * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h). - * - * @return pdTRUE if the semaphore was obtained. pdFALSE - * if xBlockTime expired without the semaphore becoming available. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore = NULL;
-
- // A task that creates a semaphore.
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    vSemaphoreCreateBinary( xSemaphore );
- }
-
- // A task that uses the semaphore.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xSemaphore != NULL )
-    {
-        // See if we can obtain the semaphore.  If the semaphore is not available
-        // wait 10 ticks to see if it becomes free.	
-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the semaphore and can now access the
-            // shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource.  Release the 
-            // semaphore.
-            xSemaphoreGive( xSemaphore );
-        }
-        else
-        {
-            // We could not obtain the semaphore and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
-
- * \defgroup xSemaphoreTake xSemaphoreTake - * \ingroup Semaphores - */ -#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueGenericReceive( ( xQueueHandle ) xSemaphore, NULL, xBlockTime, pdFALSE ) - -/** - * semphr. h - * xSemaphoreTakeRecursive( - * xSemaphoreHandle xMutex, - * portTickType xBlockTime - * ) - * - * Macro to recursively obtain, or 'take', a mutex type semaphore. - * The mutex must have previously been created using a call to - * xSemaphoreCreateRecursiveMutex(); - * - * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this - * macro to be available. - * - * This macro must not be used on mutexes created using xSemaphoreCreateMutex(). - * - * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex - * doesn't become available again until the owner has called - * xSemaphoreGiveRecursive() for each successful 'take' request. For example, - * if a task successfully 'takes' the same mutex 5 times then the mutex will - * not be available to any other task until it has also 'given' the mutex back - * exactly five times. - * - * @param xMutex A handle to the mutex being obtained. This is the - * handle returned by xSemaphoreCreateRecursiveMutex(); - * - * @param xBlockTime The time in ticks to wait for the semaphore to become - * available. The macro portTICK_RATE_MS can be used to convert this to a - * real time. A block time of zero can be used to poll the semaphore. If - * the task already owns the semaphore then xSemaphoreTakeRecursive() will - * return immediately no matter what the value of xBlockTime. - * - * @return pdTRUE if the semaphore was obtained. pdFALSE if xBlockTime - * expired without the semaphore becoming available. - * - * Example usage: - 
- xSemaphoreHandle xMutex = NULL;
-
- // A task that creates a mutex.
- void vATask( void * pvParameters )
- {
-    // Create the mutex to guard a shared resource.
-    xMutex = xSemaphoreCreateRecursiveMutex();
- }
-
- // A task that uses the mutex.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xMutex != NULL )
-    {
-        // See if we can obtain the mutex.  If the mutex is not available
-        // wait 10 ticks to see if it becomes free.	
-        if( xSemaphoreTakeRecursive( xSemaphore, ( portTickType ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the mutex and can now access the
-            // shared resource.
-
-            // ...
-            // For some reason due to the nature of the code further calls to 
-			// xSemaphoreTakeRecursive() are made on the same mutex.  In real
-			// code these would not be just sequential calls as this would make
-			// no sense.  Instead the calls are likely to be buried inside
-			// a more complex call structure.
-            xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 );
-            xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 );
-
-            // The mutex has now been 'taken' three times, so will not be 
-			// available to another task until it has also been given back
-			// three times.  Again it is unlikely that real code would have
-			// these calls sequentially, but instead buried in a more complex
-			// call structure.  This is just for illustrative purposes.
-            xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-
-			// Now the mutex can be taken by other tasks.
-        }
-        else
-        {
-            // We could not obtain the mutex and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
-
- * \defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive - * \ingroup Semaphores - */ -#define xSemaphoreTakeRecursive( xMutex, xBlockTime ) xQueueTakeMutexRecursive( xMutex, xBlockTime ) - - -/* - * xSemaphoreAltTake() is an alternative version of xSemaphoreTake(). - * - * The source code that implements the alternative (Alt) API is much - * simpler because it executes everything from within a critical section. - * This is the approach taken by many other RTOSes, but FreeRTOS.org has the - * preferred fully featured API too. The fully featured API has more - * complex code that takes longer to execute, but makes much less use of - * critical sections. Therefore the alternative API sacrifices interrupt - * responsiveness to gain execution speed, whereas the fully featured API - * sacrifices execution speed to ensure better interrupt responsiveness. - */ -#define xSemaphoreAltTake( xSemaphore, xBlockTime ) xQueueAltGenericReceive( ( xQueueHandle ) xSemaphore, NULL, xBlockTime, pdFALSE ) - -/** - * semphr. h - * 
xSemaphoreGive( xSemaphoreHandle xSemaphore )
- * - * Macro to release a semaphore. The semaphore must have previously been - * created with a call to vSemaphoreCreateBinary(), xSemaphoreCreateMutex() or - * xSemaphoreCreateCounting(). and obtained using sSemaphoreTake(). - * - * This macro must not be used from an ISR. See xSemaphoreGiveFromISR () for - * an alternative which can be used from an ISR. - * - * This macro must also not be used on semaphores created using - * xSemaphoreCreateRecursiveMutex(). - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned when the semaphore was created. - * - * @return pdTRUE if the semaphore was released. pdFALSE if an error occurred. - * Semaphores are implemented using queues. An error can occur if there is - * no space on the queue to post a message - indicating that the - * semaphore was not first obtained correctly. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    vSemaphoreCreateBinary( xSemaphore );
-
-    if( xSemaphore != NULL )
-    {
-        if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-        {
-            // We would expect this call to fail because we cannot give
-            // a semaphore without first "taking" it!
-        }
-
-        // Obtain the semaphore - don't block if the semaphore is not
-        // immediately available.
-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 0 ) )
-        {
-            // We now have the semaphore and can access the shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource so can free the
-            // semaphore.
-            if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-            {
-                // We would not expect this call to fail because we must have
-                // obtained the semaphore to get here.
-            }
-        }
-    }
- }
-
- * \defgroup xSemaphoreGive xSemaphoreGive - * \ingroup Semaphores - */ -#define xSemaphoreGive( xSemaphore ) xQueueGenericSend( ( xQueueHandle ) xSemaphore, NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK ) - -/** - * semphr. h - * 
xSemaphoreGiveRecursive( xSemaphoreHandle xMutex )
- * - * Macro to recursively release, or 'give', a mutex type semaphore. - * The mutex must have previously been created using a call to - * xSemaphoreCreateRecursiveMutex(); - * - * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this - * macro to be available. - * - * This macro must not be used on mutexes created using xSemaphoreCreateMutex(). - * - * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex - * doesn't become available again until the owner has called - * xSemaphoreGiveRecursive() for each successful 'take' request. For example, - * if a task successfully 'takes' the same mutex 5 times then the mutex will - * not be available to any other task until it has also 'given' the mutex back - * exactly five times. - * - * @param xMutex A handle to the mutex being released, or 'given'. This is the - * handle returned by xSemaphoreCreateMutex(); - * - * @return pdTRUE if the semaphore was given. - * - * Example usage: - 
- xSemaphoreHandle xMutex = NULL;
-
- // A task that creates a mutex.
- void vATask( void * pvParameters )
- {
-    // Create the mutex to guard a shared resource.
-    xMutex = xSemaphoreCreateRecursiveMutex();
- }
-
- // A task that uses the mutex.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xMutex != NULL )
-    {
-        // See if we can obtain the mutex.  If the mutex is not available
-        // wait 10 ticks to see if it becomes free.	
-        if( xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the mutex and can now access the
-            // shared resource.
-
-            // ...
-            // For some reason due to the nature of the code further calls to 
-			// xSemaphoreTakeRecursive() are made on the same mutex.  In real
-			// code these would not be just sequential calls as this would make
-			// no sense.  Instead the calls are likely to be buried inside
-			// a more complex call structure.
-            xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 );
-            xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 );
-
-            // The mutex has now been 'taken' three times, so will not be 
-			// available to another task until it has also been given back
-			// three times.  Again it is unlikely that real code would have
-			// these calls sequentially, it would be more likely that the calls
-			// to xSemaphoreGiveRecursive() would be called as a call stack
-			// unwound.  This is just for demonstrative purposes.
-            xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-
-			// Now the mutex can be taken by other tasks.
-        }
-        else
-        {
-            // We could not obtain the mutex and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
-
- * \defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive - * \ingroup Semaphores - */ -#define xSemaphoreGiveRecursive( xMutex ) xQueueGiveMutexRecursive( xMutex ) - -/* - * xSemaphoreAltGive() is an alternative version of xSemaphoreGive(). - * - * The source code that implements the alternative (Alt) API is much - * simpler because it executes everything from within a critical section. - * This is the approach taken by many other RTOSes, but FreeRTOS.org has the - * preferred fully featured API too. The fully featured API has more - * complex code that takes longer to execute, but makes much less use of - * critical sections. Therefore the alternative API sacrifices interrupt - * responsiveness to gain execution speed, whereas the fully featured API - * sacrifices execution speed to ensure better interrupt responsiveness. - */ -#define xSemaphoreAltGive( xSemaphore ) xQueueAltGenericSend( ( xQueueHandle ) xSemaphore, NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK ) - -/** - * semphr. h - * 
- xSemaphoreGiveFromISR( 
-                          xSemaphoreHandle xSemaphore, 
-                          portBASE_TYPE *pxHigherPriorityTaskWoken
-                      )
- * - * Macro to release a semaphore. The semaphore must have previously been - * created with a call to vSemaphoreCreateBinary() or xSemaphoreCreateCounting(). - * - * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex()) - * must not be used with this macro. - * - * This macro can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned when the semaphore was created. - * - * @param pxHigherPriorityTaskWoken xSemaphoreGiveFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if giving the semaphore caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xSemaphoreGiveFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the semaphore was successfully given, otherwise errQUEUE_FULL. - * - * Example usage: - 
- #define LONG_TIME 0xffff
- #define TICKS_TO_WAIT	10
- xSemaphoreHandle xSemaphore = NULL;
-
- // Repetitive task.
- void vATask( void * pvParameters )
- {
-    for( ;; )
-    {
-        // We want this task to run every 10 ticks of a timer.  The semaphore 
-        // was created before this task was started.
-
-        // Block waiting for the semaphore to become available.
-        if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )
-        {
-            // It is time to execute.
-
-            // ...
-
-            // We have finished our task.  Return to the top of the loop where
-            // we will block on the semaphore until it is time to execute 
-            // again.  Note when using the semaphore for synchronisation with an
-			// ISR in this manner there is no need to 'give' the semaphore back.
-        }
-    }
- }
-
- // Timer ISR
- void vTimerISR( void * pvParameters )
- {
- static unsigned char ucLocalTickCount = 0;
- static portBASE_TYPE xHigherPriorityTaskWoken;
-
-    // A timer tick has occurred.
-
-    // ... Do other time functions.
-
-    // Is it time for vATask () to run?
-	xHigherPriorityTaskWoken = pdFALSE;
-    ucLocalTickCount++;
-    if( ucLocalTickCount >= TICKS_TO_WAIT )
-    {
-        // Unblock the task by releasing the semaphore.
-        xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
-
-        // Reset the count so we release the semaphore again in 10 ticks time.
-        ucLocalTickCount = 0;
-    }
-
-    if( xHigherPriorityTaskWoken != pdFALSE )
-    {
-        // We can force a context switch here.  Context switching from an
-        // ISR uses port specific syntax.  Check the demo task for your port
-        // to find the syntax required.
-    }
- }
-
- * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR - * \ingroup Semaphores - */ -#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueueHandle ) xSemaphore, NULL, pxHigherPriorityTaskWoken, queueSEND_TO_BACK ) - -/** - * semphr. h - * 
xSemaphoreHandle xSemaphoreCreateMutex( void )
- * - * Macro that implements a mutex semaphore by using the existing queue - * mechanism. - * - * Mutexes created using this macro can be accessed using the xSemaphoreTake() - * and xSemaphoreGive() macros. The xSemaphoreTakeRecursive() and - * xSemaphoreGiveRecursive() macros should not be used. - * - * This type of semaphore uses a priority inheritance mechanism so a task - * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the - * semaphore it is no longer required. - * - * Mutex type semaphores cannot be used from within interrupt service routines. - * - * See vSemaphoreCreateBinary() for an alternative implementation that can be - * used for pure synchronisation (where one task or interrupt always 'gives' the - * semaphore and another always 'takes' the semaphore) and from within interrupt - * service routines. - * - * @return xSemaphore Handle to the created mutex semaphore. Should be of type - * xSemaphoreHandle. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
-    // This is a macro so pass the variable in directly.
-    xSemaphore = xSemaphoreCreateMutex();
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.  
-    }
- }
-
- * \defgroup vSemaphoreCreateMutex vSemaphoreCreateMutex - * \ingroup Semaphores - */ -#define xSemaphoreCreateMutex() xQueueCreateMutex() - - -/** - * semphr. h - * 
xSemaphoreHandle xSemaphoreCreateRecursiveMutex( void )
- * - * Macro that implements a recursive mutex by using the existing queue - * mechanism. - * - * Mutexes created using this macro can be accessed using the - * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros. The - * xSemaphoreTake() and xSemaphoreGive() macros should not be used. - * - * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex - * doesn't become available again until the owner has called - * xSemaphoreGiveRecursive() for each successful 'take' request. For example, - * if a task successfully 'takes' the same mutex 5 times then the mutex will - * not be available to any other task until it has also 'given' the mutex back - * exactly five times. - * - * This type of semaphore uses a priority inheritance mechanism so a task - * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the - * semaphore it is no longer required. - * - * Mutex type semaphores cannot be used from within interrupt service routines. - * - * See vSemaphoreCreateBinary() for an alternative implementation that can be - * used for pure synchronisation (where one task or interrupt always 'gives' the - * semaphore and another always 'takes' the semaphore) and from within interrupt - * service routines. - * - * @return xSemaphore Handle to the created mutex semaphore. Should be of type - * xSemaphoreHandle. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
-    // This is a macro so pass the variable in directly.
-    xSemaphore = xSemaphoreCreateRecursiveMutex();
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.  
-    }
- }
-
- * \defgroup vSemaphoreCreateMutex vSemaphoreCreateMutex - * \ingroup Semaphores - */ -#define xSemaphoreCreateRecursiveMutex() xQueueCreateMutex() - -/** - * semphr. h - * 
xSemaphoreHandle xSemaphoreCreateCounting( unsigned portBASE_TYPE uxMaxCount, unsigned portBASE_TYPE uxInitialCount )
- * - * Macro that creates a counting semaphore by using the existing - * queue mechanism. - * - * Counting semaphores are typically used for two things: - * - * 1) Counting events. - * - * In this usage scenario an event handler will 'give' a semaphore each time - * an event occurs (incrementing the semaphore count value), and a handler - * task will 'take' a semaphore each time it processes an event - * (decrementing the semaphore count value). The count value is therefore - * the difference between the number of events that have occurred and the - * number that have been processed. In this case it is desirable for the - * initial count value to be zero. - * - * 2) Resource management. - * - * In this usage scenario the count value indicates the number of resources - * available. To obtain control of a resource a task must first obtain a - * semaphore - decrementing the semaphore count value. When the count value - * reaches zero there are no free resources. When a task finishes with the - * resource it 'gives' the semaphore back - incrementing the semaphore count - * value. In this case it is desirable for the initial count value to be - * equal to the maximum count value, indicating that all resources are free. - * - * @param uxMaxCount The maximum count value that can be reached. When the - * semaphore reaches this value it can no longer be 'given'. - * - * @param uxInitialCount The count value assigned to the semaphore when it is - * created. - * - * @return Handle to the created semaphore. Null if the semaphore could not be - * created. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore;
-
- void vATask( void * pvParameters )
- {
- xSemaphoreHandle xSemaphore = NULL;
-
-    // Semaphore cannot be used before a call to xSemaphoreCreateCounting().
-    // The max value to which the semaphore can count should be 10, and the
-    // initial value assigned to the count should be 0.
-    xSemaphore = xSemaphoreCreateCounting( 10, 0 );
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.  
-    }
- }
-
- * \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting - * \ingroup Semaphores - */ -#define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount ) xQueueCreateCountingSemaphore( uxMaxCount, uxInitialCount ) - - -#endif /* SEMAPHORE_H */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/task.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/task.h deleted file mode 100644 index 61e01f83..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/include/task.h +++ /dev/null @@ -1,1267 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - - -#ifndef INC_FREERTOS_H - #error "#include FreeRTOS.h" must appear in source files before "#include task.h" -#endif - - - -#ifndef TASK_H -#define TASK_H - -#include "portable.h" -#include "list.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/*----------------------------------------------------------- - * MACROS AND DEFINITIONS - *----------------------------------------------------------*/ - -#define tskKERNEL_VERSION_NUMBER "V6.0.0" - -/** - * task. h - * - * Type by which tasks are referenced. For example, a call to xTaskCreate - * returns (via a pointer parameter) an xTaskHandle variable that can then - * be used as a parameter to vTaskDelete to delete the task. - * - * \page xTaskHandle xTaskHandle - * \ingroup Tasks - */ -typedef void * xTaskHandle; - -/* - * Used internally only. - */ -typedef struct xTIME_OUT -{ - portBASE_TYPE xOverflowCount; - portTickType xTimeOnEntering; -} xTimeOutType; - -/* - * Defines the memory ranges allocated to the task when an MPU is used. - */ -typedef struct xMEMORY_REGION -{ - void *pvBaseAddress; - unsigned long ulLengthInBytes; - unsigned long ulParameters; -} xMemoryRegion; - -/* - * Parameters required to create an MPU protected task. - */ -typedef struct xTASK_PARAMTERS -{ - pdTASK_CODE pvTaskCode; - const signed char * const pcName; - unsigned short usStackDepth; - void *pvParameters; - unsigned portBASE_TYPE uxPriority; - portSTACK_TYPE *puxStackBuffer; - xMemoryRegion xRegions[ portNUM_CONFIGURABLE_REGIONS ]; -} xTaskParameters; - -/* - * Defines the priority used by the idle task. This must not be modified. - * - * \ingroup TaskUtils - */ -#define tskIDLE_PRIORITY ( ( unsigned portBASE_TYPE ) 0 ) - -/** - * task. h - * - * Macro for forcing a context switch. - * - * \page taskYIELD taskYIELD - * \ingroup SchedulerControl - */ -#define taskYIELD() portYIELD() - -/** - * task. h - * - * Macro to mark the start of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskENTER_CRITICAL taskENTER_CRITICAL - * \ingroup SchedulerControl - */ -#define taskENTER_CRITICAL() portENTER_CRITICAL() - -/** - * task. h - * - * Macro to mark the end of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskEXIT_CRITICAL taskEXIT_CRITICAL - * \ingroup SchedulerControl - */ -#define taskEXIT_CRITICAL() portEXIT_CRITICAL() - -/** - * task. h - * - * Macro to disable all maskable interrupts. - * - * \page taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS() - -/** - * task. h - * - * Macro to enable microcontroller interrupts. - * - * \page taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS() - -/* Definitions returned by xTaskGetSchedulerState(). */ -#define taskSCHEDULER_NOT_STARTED 0 -#define taskSCHEDULER_RUNNING 1 -#define taskSCHEDULER_SUSPENDED 2 - -/*----------------------------------------------------------- - * TASK CREATION API - *----------------------------------------------------------*/ - -/** - * task. h - *
- portBASE_TYPE xTaskCreate(
-							  pdTASK_CODE pvTaskCode,
-							  const char * const pcName,
-							  unsigned short usStackDepth,
-							  void *pvParameters,
-							  unsigned portBASE_TYPE uxPriority,
-							  xTaskHandle *pvCreatedTask
-						  );
- * - * Create a new task and add it to the list of tasks that are ready to run. - * - * xTaskCreate() can only be used to create a task that has unrestricted - * access to the entire microcontroller memory map. Systems that include MPU - * support can alternatively create an MPU constrained task using - * xTaskCreateRestricted(). - * - * @param pvTaskCode Pointer to the task entry function. Tasks - * must be implemented to never return (i.e. continuous loop). - * - * @param pcName A descriptive name for the task. This is mainly used to - * facilitate debugging. Max length defined by tskMAX_TASK_NAME_LEN - default - * is 16. - * - * @param usStackDepth The size of the task stack specified as the number of - * variables the stack can hold - not the number of bytes. For example, if - * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes - * will be allocated for stack storage. - * - * @param pvParameters Pointer that will be used as the parameter for the task - * being created. - * - * @param uxPriority The priority at which the task should run. Systems that - * include MPU support can optionally create tasks in a privileged (system) - * mode by setting bit portPRIVILEGE_BIT of the priority parameter. For - * example, to create a privileged task at priority 2 the uxPriority parameter - * should be set to ( 2 | portPRIVILEGE_BIT ). - * - * @param pvCreatedTask Used to pass back a handle by which the created task - * can be referenced. - * - * @return pdPASS if the task was successfully created and added to a ready - * list, otherwise an error code defined in the file errors. h - * - * Example usage: - 
- // Task to be created.
- void vTaskCode( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-	 }
- }
-
- // Function that creates a task.
- void vOtherFunction( void )
- {
- static unsigned char ucParameterToPass;
- xTaskHandle xHandle;
-
-	 // Create the task, storing the handle.  Note that the passed parameter ucParameterToPass
-	 // must exist for the lifetime of the task, so in this case is declared static.  If it was just an
-	 // an automatic stack variable it might no longer exist, or at least have been corrupted, by the time
-	 // the new task attempts to access it.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );
-
-	 // Use the handle to delete the task.
-	 vTaskDelete( xHandle );
- }
-
- * \defgroup xTaskCreate xTaskCreate - * \ingroup Tasks - */ -#define xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ) xTaskGenericCreate( ( pvTaskCode ), ( pcName ), ( usStackDepth ), ( pvParameters ), ( uxPriority ), ( pxCreatedTask ), ( NULL ), ( NULL ) ) - -/** - * task. h - *
- portBASE_TYPE xTaskCreateRestricted( xTaskParameters *pxTaskDefinition, xTaskHandle pxCreatedTask );
- * - * xTaskCreateRestricted() should only be used in systems that include an MPU - * implementation. - * - * Create a new task and add it to the list of tasks that are ready to run. - * The function parameters define the memory regions and associated access - * permissions allocated to the task. - * - * @param pxTaskDefinition Pointer to a structure that contains a member - * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API - * documentation) plus an optional stack buffer and the memory region - * definitions. - * - * @param pcName A descriptive name for the task. This is mainly used to - * facilitate debugging. Max length defined by tskMAX_TASK_NAME_LEN - default - * is 16. - * - * @param pxCreatedTask Used to pass back a handle by which the created task - * can be referenced. - * - * @return pdPASS if the task was successfully created and added to a ready - * list, otherwise an error code defined in the file errors. h - * - * Example usage: - 
-// Create an xTaskParameters structure that defines the task to be created.
-static const xTaskParameters xCheckTaskParameters =
-{
-	vATask,		// pvTaskCode - the function that implements the task.
-	"ATask",	// pcName - just a text name for the task to assist debugging.
-	100,		// usStackDepth	- the stack size DEFINED IN WORDS.
-	NULL,		// pvParameters - passed into the task function as the function parameters.
-	( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
-	cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
-
-	// xRegions - Allocate up to three separate memory regions for access by
-	// the task, with appropriate access permissions.  Different processors have
-	// different memory alignment requirements - refer to the FreeRTOS documentation
-	// for full information.
-	{											
-		// Base address					Length	Parameters
-        { cReadWriteArray,				32,		portMPU_REGION_READ_WRITE },
-        { cReadOnlyArray,				32,		portMPU_REGION_READ_ONLY },
-        { cPrivilegedOnlyAccessArray,	128,	portMPU_REGION_PRIVILEGED_READ_WRITE }
-	}
-};
-
-int main( void )
-{
-xTaskHandle xHandle;
-
-	// Create a task from the const structure defined above.  The task handle
-	// is requested (the second parameter is not NULL) but in this case just for
-	// demonstration purposes as its not actually used.
-	xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
-
-	// Start the scheduler.
-	vTaskStartScheduler();
-
-	// Will only get here if there was insufficient memory to create the idle
-	// task.
-	for( ;; );
-}
-
- * \defgroup xTaskCreateRestricted xTaskCreateRestricted - * \ingroup Tasks - */ -#define xTaskCreateRestricted( x, pxCreatedTask ) xTaskGenericCreate( ((x)->pvTaskCode), ((x)->pcName), ((x)->usStackDepth), ((x)->pvParameters), ((x)->uxPriority), (pxCreatedTask), ((x)->puxStackBuffer), ((x)->xRegions) ) - -/** - * task. h - *
- void vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const pxRegions );
- * - * Memory regions are assigned to a restricted task when the task is created by - * a call to xTaskCreateRestricted(). These regions can be redefined using - * vTaskAllocateMPURegions(). - * - * @param xTask The handle of the task being updated. - * - * @param xRegions A pointer to an xMemoryRegion structure that contains the - * new memory region definitions. - * - * Example usage: - 
-// Define an array of xMemoryRegion structures that configures an MPU region
-// allowing read/write access for 1024 bytes starting at the beginning of the
-// ucOneKByte array.  The other two of the maximum 3 definable regions are
-// unused so set to zero.
-static const xMemoryRegion xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] =
-{											
-	// Base address		Length		Parameters
-	{ ucOneKByte,		1024,		portMPU_REGION_READ_WRITE },
-	{ 0,				0,			0 },
-	{ 0,				0,			0 }
-};
-
-void vATask( void *pvParameters )
-{
-	// This task was created such that it has access to certain regions of
-	// memory as defined by the MPU configuration.  At some point it is 
-	// desired that these MPU regions are replaced with that defined in the
-	// xAltRegions const struct above.  Use a call to vTaskAllocateMPURegions()
-	// for this purpose.  NULL is used as the task handle to indicate that this
-	// function should modify the MPU regions of the calling task.
-	vTaskAllocateMPURegions( NULL, xAltRegions );
-	
-	// Now the task can continue its function, but from this point on can only
-	// access its stack and the ucOneKByte array (unless any other statically
-	// defined or shared regions have been declared elsewhere).
-}
-
- * \defgroup xTaskCreateRestricted xTaskCreateRestricted - * \ingroup Tasks - */ -void vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const pxRegions ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskDelete( xTaskHandle pxTask );
- * - * INCLUDE_vTaskDelete must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Remove a task from the RTOS real time kernels management. The task being - * deleted will be removed from all ready, blocked, suspended and event lists. - * - * NOTE: The idle task is responsible for freeing the kernel allocated - * memory from tasks that have been deleted. It is therefore important that - * the idle task is not starved of microcontroller processing time if your - * application makes any calls to vTaskDelete (). Memory allocated by the - * task code is not automatically freed, and should be freed before the task - * is deleted. - * - * See the demo application file death.c for sample code that utilises - * vTaskDelete (). - * - * @param pxTask The handle of the task to be deleted. Passing NULL will - * cause the calling task to be deleted. - * - * Example usage: - 
- void vOtherFunction( void )
- {
- xTaskHandle xHandle;
-
-	 // Create the task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // Use the handle to delete the task.
-	 vTaskDelete( xHandle );
- }
-
- * \defgroup vTaskDelete vTaskDelete - * \ingroup Tasks - */ -void vTaskDelete( xTaskHandle pxTask ) PRIVILEGED_FUNCTION; - - -/*----------------------------------------------------------- - * TASK CONTROL API - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskDelay( portTickType xTicksToDelay );
- * - * Delay a task for a given number of ticks. The actual time that the - * task remains blocked depends on the tick rate. The constant - * portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * INCLUDE_vTaskDelay must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * - * vTaskDelay() specifies a time at which the task wishes to unblock relative to - * the time at which vTaskDelay() is called. For example, specifying a block - * period of 100 ticks will cause the task to unblock 100 ticks after - * vTaskDelay() is called. vTaskDelay() does not therefore provide a good method - * of controlling the frequency of a cyclical task as the path taken through the - * code, as well as other task and interrupt activity, will effect the frequency - * at which vTaskDelay() gets called and therefore the time at which the task - * next executes. See vTaskDelayUntil() for an alternative API function designed - * to facilitate fixed frequency execution. It does this by specifying an - * absolute time (rather than a relative time) at which the calling task should - * unblock. - * - * @param xTicksToDelay The amount of time, in tick periods, that - * the calling task should block. - * - * Example usage: - - void vTaskFunction( void * pvParameters ) - { - void vTaskFunction( void * pvParameters ) - { - // Block for 500ms. - const portTickType xDelay = 500 / portTICK_RATE_MS; - - for( ;; ) - { - // Simply toggle the LED every 500ms, blocking between each toggle. - vToggleLED(); - vTaskDelay( xDelay ); - } - } - - * \defgroup vTaskDelay vTaskDelay - * \ingroup TaskCtrl - */ -void vTaskDelay( portTickType xTicksToDelay ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement );
- * - * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Delay a task until a specified time. This function can be used by cyclical - * tasks to ensure a constant execution frequency. - * - * This function differs from vTaskDelay () in one important aspect: vTaskDelay () will - * cause a task to block for the specified number of ticks from the time vTaskDelay () is - * called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed - * execution frequency as the time between a task starting to execute and that task - * calling vTaskDelay () may not be fixed [the task may take a different path though the - * code between calls, or may get interrupted or preempted a different number of times - * each time it executes]. - * - * Whereas vTaskDelay () specifies a wake time relative to the time at which the function - * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to - * unblock. - * - * The constant portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the - * task was last unblocked. The variable must be initialised with the current time - * prior to its first use (see the example below). Following this the variable is - * automatically updated within vTaskDelayUntil (). - * - * @param xTimeIncrement The cycle time period. The task will be unblocked at - * time *pxPreviousWakeTime + xTimeIncrement. Calling vTaskDelayUntil with the - * same xTimeIncrement parameter value will cause the task to execute with - * a fixed interface period. - * - * Example usage: - 
- // Perform an action every 10 ticks.
- void vTaskFunction( void * pvParameters )
- {
- portTickType xLastWakeTime;
- const portTickType xFrequency = 10;
-
-	 // Initialise the xLastWakeTime variable with the current time.
-	 xLastWakeTime = xTaskGetTickCount ();
-	 for( ;; )
-	 {
-		 // Wait for the next cycle.
-		 vTaskDelayUntil( &xLastWakeTime, xFrequency );
-
-		 // Perform action here.
-	 }
- }
-
- * \defgroup vTaskDelayUntil vTaskDelayUntil - * \ingroup TaskCtrl - */ -void vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask );
- * - * INCLUDE_xTaskPriorityGet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Obtain the priority of any task. - * - * @param pxTask Handle of the task to be queried. Passing a NULL - * handle results in the priority of the calling task being returned. - * - * @return The priority of pxTask. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to obtain the priority of the created task.
-	 // It was created with tskIDLE_PRIORITY, but may have changed
-	 // it itself.
-	 if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )
-	 {
-		 // The task has changed it's priority.
-	 }
-
-	 // ...
-
-	 // Is our priority higher than the created task?
-	 if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )
-	 {
-		 // Our priority (obtained using NULL handle) is higher.
-	 }
- }
-
- * \defgroup uxTaskPriorityGet uxTaskPriorityGet - * \ingroup TaskCtrl - */ -unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );
- * - * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Set the priority of any task. - * - * A context switch will occur before the function returns if the priority - * being set is higher than the currently executing task. - * - * @param pxTask Handle to the task for which the priority is being set. - * Passing a NULL handle results in the priority of the calling task being set. - * - * @param uxNewPriority The priority to which the task will be set. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to raise the priority of the created task.
-	 vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );
-
-	 // ...
-
-	 // Use a NULL handle to raise our priority to the same value.
-	 vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
- }
-
- * \defgroup vTaskPrioritySet vTaskPrioritySet - * \ingroup TaskCtrl - */ -void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskSuspend( xTaskHandle pxTaskToSuspend );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Suspend any task. When suspended a task will never get any microcontroller - * processing time, no matter what its priority. - * - * Calls to vTaskSuspend are not accumulative - - * i.e. calling vTaskSuspend () twice on the same task still only requires one - * call to vTaskResume () to ready the suspended task. - * - * @param pxTaskToSuspend Handle to the task being suspended. Passing a NULL - * handle will cause the calling task to be suspended. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to suspend the created task.
-	 vTaskSuspend( xHandle );
-
-	 // ...
-
-	 // The created task will not run during this period, unless
-	 // another task calls vTaskResume( xHandle ).
-
-	 //...
-
-
-	 // Suspend ourselves.
-	 vTaskSuspend( NULL );
-
-	 // We cannot get here unless another task calls vTaskResume
-	 // with our handle as the parameter.
- }
-
- * \defgroup vTaskSuspend vTaskSuspend - * \ingroup TaskCtrl - */ -void vTaskSuspend( xTaskHandle pxTaskToSuspend ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskResume( xTaskHandle pxTaskToResume );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Resumes a suspended task. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * vTaskResume (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to suspend the created task.
-	 vTaskSuspend( xHandle );
-
-	 // ...
-
-	 // The created task will not run during this period, unless
-	 // another task calls vTaskResume( xHandle ).
-
-	 //...
-
-
-	 // Resume the suspended task ourselves.
-	 vTaskResume( xHandle );
-
-	 // The created task will once again get microcontroller processing
-	 // time in accordance with it priority within the system.
- }
-
- * \defgroup vTaskResume vTaskResume - * \ingroup TaskCtrl - */ -void vTaskResume( xTaskHandle pxTaskToResume ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void xTaskResumeFromISR( xTaskHandle pxTaskToResume );
- * - * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be - * available. See the configuration section for more information. - * - * An implementation of vTaskResume() that can be called from within an ISR. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * xTaskResumeFromISR (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * \defgroup vTaskResumeFromISR vTaskResumeFromISR - * \ingroup TaskCtrl - */ -portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ) PRIVILEGED_FUNCTION; - -/*----------------------------------------------------------- - * SCHEDULER CONTROL - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskStartScheduler( void );
- * - * Starts the real time kernel tick processing. After calling the kernel - * has control over which tasks are executed and when. This function - * does not return until an executing task calls vTaskEndScheduler (). - * - * At least one task should be created via a call to xTaskCreate () - * before calling vTaskStartScheduler (). The idle task is created - * automatically when the first application task is created. - * - * See the demo application file main.c for an example of creating - * tasks and starting the kernel. - * - * Example usage: - 
- void vAFunction( void )
- {
-	 // Create at least one task before starting the kernel.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-	 // Start the real time kernel with preemption.
-	 vTaskStartScheduler ();
-
-	 // Will not get here unless a task calls vTaskEndScheduler ()
- }
-
- * - * \defgroup vTaskStartScheduler vTaskStartScheduler - * \ingroup SchedulerControl - */ -void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskEndScheduler( void );
- * - * Stops the real time kernel tick. All created tasks will be automatically - * deleted and multitasking (either preemptive or cooperative) will - * stop. Execution then resumes from the point where vTaskStartScheduler () - * was called, as if vTaskStartScheduler () had just returned. - * - * See the demo application file main. c in the demo/PC directory for an - * example that uses vTaskEndScheduler (). - * - * vTaskEndScheduler () requires an exit function to be defined within the - * portable layer (see vPortEndScheduler () in port. c for the PC port). This - * performs hardware specific operations such as stopping the kernel tick. - * - * vTaskEndScheduler () will cause all of the resources allocated by the - * kernel to be freed - but will not free resources allocated by application - * tasks. - * - * Example usage: - 
- void vTaskCode( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-
-		 // At some point we want to end the real time kernel processing
-		 // so call ...
-		 vTaskEndScheduler ();
-	 }
- }
-
- void vAFunction( void )
- {
-	 // Create at least one task before starting the kernel.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-	 // Start the real time kernel with preemption.
-	 vTaskStartScheduler ();
-
-	 // Will only get here when the vTaskCode () task has called
-	 // vTaskEndScheduler ().  When we get here we are back to single task
-	 // execution.
- }
-
- * - * \defgroup vTaskEndScheduler vTaskEndScheduler - * \ingroup SchedulerControl - */ -void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskSuspendAll( void );
- * - * Suspends all real time kernel activity while keeping interrupts (including the - * kernel tick) enabled. - * - * After calling vTaskSuspendAll () the calling task will continue to execute - * without risk of being swapped out until a call to xTaskResumeAll () has been - * made. - * - * API functions that have the potential to cause a context switch (for example, - * vTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler - * is suspended. - * - * Example usage: - 
- void vTask1( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-
-		 // ...
-
-		 // At some point the task wants to perform a long operation during
-		 // which it does not want to get swapped out.  It cannot use
-		 // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-		 // operation may cause interrupts to be missed - including the
-		 // ticks.
-
-		 // Prevent the real time kernel swapping out the task.
-		 vTaskSuspendAll ();
-
-		 // Perform the operation here.  There is no need to use critical
-		 // sections as we have all the microcontroller processing time.
-		 // During this time interrupts will still operate and the kernel
-		 // tick count will be maintained.
-
-		 // ...
-
-		 // The operation is complete.  Restart the kernel.
-		 xTaskResumeAll ();
-	 }
- }
-
- * \defgroup vTaskSuspendAll vTaskSuspendAll - * \ingroup SchedulerControl - */ -void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
char xTaskResumeAll( void );
- * - * Resumes real time kernel activity following a call to vTaskSuspendAll (). - * After a call to vTaskSuspendAll () the kernel will take control of which - * task is executing at any time. - * - * @return If resuming the scheduler caused a context switch then pdTRUE is - * returned, otherwise pdFALSE is returned. - * - * Example usage: - 
- void vTask1( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-
-		 // ...
-
-		 // At some point the task wants to perform a long operation during
-		 // which it does not want to get swapped out.  It cannot use
-		 // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-		 // operation may cause interrupts to be missed - including the
-		 // ticks.
-
-		 // Prevent the real time kernel swapping out the task.
-		 vTaskSuspendAll ();
-
-		 // Perform the operation here.  There is no need to use critical
-		 // sections as we have all the microcontroller processing time.
-		 // During this time interrupts will still operate and the real
-		 // time kernel tick count will be maintained.
-
-		 // ...
-
-		 // The operation is complete.  Restart the kernel.  We want to force
-		 // a context switch - but there is no point if resuming the scheduler
-		 // caused a context switch already.
-		 if( !xTaskResumeAll () )
-		 {
-			  taskYIELD ();
-		 }
-	 }
- }
-
- * \defgroup xTaskResumeAll xTaskResumeAll - * \ingroup SchedulerControl - */ -signed portBASE_TYPE xTaskResumeAll( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
signed portBASE_TYPE xTaskIsTaskSuspended( xTaskHandle xTask );
- * - * Utility task that simply returns pdTRUE if the task referenced by xTask is - * currently in the Suspended state, or pdFALSE if the task referenced by xTask - * is in any other state. - * - */ -signed portBASE_TYPE xTaskIsTaskSuspended( xTaskHandle xTask ) PRIVILEGED_FUNCTION; - -/*----------------------------------------------------------- - * TASK UTILITIES - *----------------------------------------------------------*/ - -/** - * task. h - * 
volatile portTickType xTaskGetTickCount( void );
- * - * @return The count of ticks since vTaskStartScheduler was called. - * - * \page xTaskGetTickCount xTaskGetTickCount - * \ingroup TaskUtils - */ -portTickType xTaskGetTickCount( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
unsigned short uxTaskGetNumberOfTasks( void );
- * - * @return The number of tasks that the real time kernel is currently managing. - * This includes all ready, blocked and suspended tasks. A task that - * has been deleted but not yet freed by the idle task will also be - * included in the count. - * - * \page uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks - * \ingroup TaskUtils - */ -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskList( char *pcWriteBuffer );
- * - * configUSE_TRACE_FACILITY must be defined as 1 for this function to be - * available. See the configuration section for more information. - * - * NOTE: This function will disable interrupts for its duration. It is - * not intended for normal application runtime use but as a debug aid. - * - * Lists all the current tasks, along with their current state and stack - * usage high water mark. - * - * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or - * suspended ('S'). - * - * @param pcWriteBuffer A buffer into which the above mentioned details - * will be written, in ascii form. This buffer is assumed to be large - * enough to contain the generated report. Approximately 40 bytes per - * task should be sufficient. - * - * \page vTaskList vTaskList - * \ingroup TaskUtils - */ -void vTaskList( signed char *pcWriteBuffer ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskGetRunTimeStats( char *pcWriteBuffer );
- * - * configGENERATE_RUN_TIME_STATS must be defined as 1 for this function - * to be available. The application must also then provide definitions - * for portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and - * portGET_RUN_TIME_COUNTER_VALUE to configure a peripheral timer/counter - * and return the timers current count value respectively. The counter - * should be at least 10 times the frequency of the tick count. - * - * NOTE: This function will disable interrupts for its duration. It is - * not intended for normal application runtime use but as a debug aid. - * - * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total - * accumulated execution time being stored for each task. The resolution - * of the accumulated time value depends on the frequency of the timer - * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro. - * Calling vTaskGetRunTimeStats() writes the total execution time of each - * task into a buffer, both as an absolute count value and as a percentage - * of the total system execution time. - * - * @param pcWriteBuffer A buffer into which the execution times will be - * written, in ascii form. This buffer is assumed to be large enough to - * contain the generated report. Approximately 40 bytes per task should - * be sufficient. - * - * \page vTaskGetRunTimeStats vTaskGetRunTimeStats - * \ingroup TaskUtils - */ -void vTaskGetRunTimeStats( signed char *pcWriteBuffer ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskStartTrace( char * pcBuffer, unsigned portBASE_TYPE uxBufferSize );
- * - * Starts a real time kernel activity trace. The trace logs the identity of - * which task is running when. - * - * The trace file is stored in binary format. A separate DOS utility called - * convtrce.exe is used to convert this into a tab delimited text file which - * can be viewed and plotted in a spread sheet. - * - * @param pcBuffer The buffer into which the trace will be written. - * - * @param ulBufferSize The size of pcBuffer in bytes. The trace will continue - * until either the buffer in full, or ulTaskEndTrace () is called. - * - * \page vTaskStartTrace vTaskStartTrace - * \ingroup TaskUtils - */ -void vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
unsigned long ulTaskEndTrace( void );
- * - * Stops a kernel activity trace. See vTaskStartTrace (). - * - * @return The number of bytes that have been written into the trace buffer. - * - * \page usTaskEndTrace usTaskEndTrace - * \ingroup TaskUtils - */ -unsigned long ulTaskEndTrace( void ) PRIVILEGED_FUNCTION; - -/** - * task.h - * 
unsigned portBASE_TYPE uxTaskGetStackHighWaterMark( xTaskHandle xTask );
- * - * INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for - * this function to be available. - * - * Returns the high water mark of the stack associated with xTask. That is, - * the minimum free stack space there has been (in bytes) since the task - * started. The smaller the returned number the closer the task has come - * to overflowing its stack. - * - * @param xTask Handle of the task associated with the stack to be checked. - * Set xTask to NULL to check the stack of the calling task. - * - * @return The smallest amount of free stack space there has been (in bytes) - * since the task referenced by xTask was created. - */ -unsigned portBASE_TYPE uxTaskGetStackHighWaterMark( xTaskHandle xTask ) PRIVILEGED_FUNCTION; - -/** - * task.h - * 
void vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxHookFunction );
- * - * Sets pxHookFunction to be the task hook function used by the task xTask. - * Passing xTask as NULL has the effect of setting the calling tasks hook - * function. - */ -void vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxHookFunction ) PRIVILEGED_FUNCTION; - -/** - * task.h - * 
void xTaskGetApplicationTaskTag( xTaskHandle xTask );
- * - * Returns the pxHookFunction value assigned to the task xTask. - */ -pdTASK_HOOK_CODE xTaskGetApplicationTaskTag( xTaskHandle xTask ) PRIVILEGED_FUNCTION; - -/** - * task.h - * 
portBASE_TYPE xTaskCallApplicationTaskHook( xTaskHandle xTask, pdTASK_HOOK_CODE pxHookFunction );
- * - * Calls the hook function associated with xTask. Passing xTask as NULL has - * the effect of calling the Running tasks (the calling task) hook function. - * - * pvParameter is passed to the hook function for the task to interpret as it - * wants. - */ -portBASE_TYPE xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter ) PRIVILEGED_FUNCTION; - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - *----------------------------------------------------------*/ - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Called from the real time kernel tick (either preemptive or cooperative), - * this increments the tick count and checks if any tasks that are blocked - * for a finite period required removing from a blocked list and placing on - * a ready list. - */ -void vTaskIncrementTick( void ) PRIVILEGED_FUNCTION; - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes the calling task from the ready list and places it both - * on the list of tasks waiting for a particular event, and the - * list of delayed tasks. The task will be removed from both lists - * and replaced on the ready list should either the event occur (and - * there be no higher priority tasks waiting on the same event) or - * the delay period expires. - * - * @param pxEventList The list containing tasks that are blocked waiting - * for the event to occur. - * - * @param xTicksToWait The maximum amount of time that the task should wait - * for the event to occur. This is specified in kernel ticks,the constant - * portTICK_RATE_MS can be used to convert kernel ticks into a real time - * period. - */ -void vTaskPlaceOnEventList( const xList * const pxEventList, portTickType xTicksToWait ) PRIVILEGED_FUNCTION; - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes a task from both the specified event list and the list of blocked - * tasks, and places it on a ready queue. - * - * xTaskRemoveFromEventList () will be called if either an event occurs to - * unblock a task, or the block timeout period expires. - * - * @return pdTRUE if the task being removed has a higher priority than the task - * making the call, otherwise pdFALSE. - */ -signed portBASE_TYPE xTaskRemoveFromEventList( const xList * const pxEventList ) PRIVILEGED_FUNCTION; - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * INCLUDE_vTaskCleanUpResources and INCLUDE_vTaskSuspend must be defined as 1 - * for this function to be available. - * See the configuration section for more information. - * - * Empties the ready and delayed queues of task control blocks, freeing the - * memory allocated for the task control block and task stacks as it goes. - */ -void vTaskCleanUpResources( void ) PRIVILEGED_FUNCTION; - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Sets the pointer to the current TCB to the TCB of the highest priority task - * that is ready to run. - */ -void vTaskSwitchContext( void ) PRIVILEGED_FUNCTION; - -/* - * Return the handle of the calling task. - */ -xTaskHandle xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION; - -/* - * Capture the current time status for future reference. - */ -void vTaskSetTimeOutState( xTimeOutType * const pxTimeOut ) PRIVILEGED_FUNCTION; - -/* - * Compare the time status now with that previously captured to see if the - * timeout has expired. - */ -portBASE_TYPE xTaskCheckForTimeOut( xTimeOutType * const pxTimeOut, portTickType * const pxTicksToWait ) PRIVILEGED_FUNCTION; - -/* - * Shortcut used by the queue implementation to prevent unnecessary call to - * taskYIELD(); - */ -void vTaskMissedYield( void ) PRIVILEGED_FUNCTION; - -/* - * Returns the scheduler state as taskSCHEDULER_RUNNING, - * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED. - */ -portBASE_TYPE xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION; - -/* - * Raises the priority of the mutex holder to that of the calling task should - * the mutex holder have a priority less than the calling task. - */ -void vTaskPriorityInherit( xTaskHandle * const pxMutexHolder ) PRIVILEGED_FUNCTION; - -/* - * Set the priority of a task back to its proper priority in the case that it - * inherited a higher priority while it was holding a semaphore. - */ -void vTaskPriorityDisinherit( xTaskHandle * const pxMutexHolder ) PRIVILEGED_FUNCTION; - -/* - * Generic version of the task creation function which is in turn called by the - * xTaskCreate() and xTaskCreateProtected() macros. - */ -signed portBASE_TYPE xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions ) PRIVILEGED_FUNCTION; - -#ifdef __cplusplus -} -#endif -#endif /* TASK_H */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/list.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/list.c deleted file mode 100644 index 0a12ff29..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/list.c +++ /dev/null @@ -1,191 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - - -#include -#include "FreeRTOS.h" -#include "list.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -void vListInitialise( xList *pxList ) -{ - /* The list structure contains a list item which is used to mark the - end of the list. To initialise the list the list end is inserted - as the only list entry. */ - pxList->pxIndex = ( xListItem * ) &( pxList->xListEnd ); - - /* The list end value is the highest possible value in the list to - ensure it remains at the end of the list. */ - pxList->xListEnd.xItemValue = portMAX_DELAY; - - /* The list end next and previous pointers point to itself so we know - when the list is empty. */ - pxList->xListEnd.pxNext = ( xListItem * ) &( pxList->xListEnd ); - pxList->xListEnd.pxPrevious = ( xListItem * ) &( pxList->xListEnd ); - - pxList->uxNumberOfItems = 0; -} -/*-----------------------------------------------------------*/ - -void vListInitialiseItem( xListItem *pxItem ) -{ - /* Make sure the list item is not recorded as being on a list. */ - pxItem->pvContainer = NULL; -} -/*-----------------------------------------------------------*/ - -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem * pxIndex; - - /* Insert a new list item into pxList, but rather than sort the list, - makes the new list item the last item to be removed by a call to - pvListGetOwnerOfNextEntry. This means it has to be the item pointed to by - the pxIndex member. */ - pxIndex = pxList->pxIndex; - - pxNewListItem->pxNext = pxIndex->pxNext; - pxNewListItem->pxPrevious = pxList->pxIndex; - pxIndex->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxIndex->pxNext = ( volatile xListItem * ) pxNewListItem; - pxList->pxIndex = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListInsert( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem *pxIterator; -portTickType xValueOfInsertion; - - /* Insert the new list item into the list, sorted in ulListItem order. */ - xValueOfInsertion = pxNewListItem->xItemValue; - - /* If the list already contains a list item with the same item value then - the new list item should be placed after it. This ensures that TCB's which - are stored in ready lists (all of which have the same ulListItem value) - get an equal share of the CPU. However, if the xItemValue is the same as - the back marker the iteration loop below will not end. This means we need - to guard against this by checking the value first and modifying the - algorithm slightly if necessary. */ - if( xValueOfInsertion == portMAX_DELAY ) - { - pxIterator = pxList->xListEnd.pxPrevious; - } - else - { - /* *** NOTE *********************************************************** - If you find your application is crashing here then likely causes are: - 1) Stack overflow - - see http://www.freertos.org/Stacks-and-stack-overflow-checking.html - 2) Incorrect interrupt priority assignment, especially on Cortex M3 - parts where numerically high priority values denote low actual - interrupt priories, which can seem counter intuitive. See - configMAX_SYSCALL_INTERRUPT_PRIORITY on http://www.freertos.org/a00110.html - 3) Calling an API function from within a critical section or when - the scheduler is suspended. - 4) Using a queue or semaphore before it has been initialised or - before the scheduler has been started (are interrupts firing - before vTaskStartScheduler() has been called?). - See http://www.freertos.org/FAQHelp.html for more tips. - **********************************************************************/ - - for( pxIterator = ( xListItem * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) - { - /* There is nothing to do here, we are just iterating to the - wanted insertion position. */ - } - } - - pxNewListItem->pxNext = pxIterator->pxNext; - pxNewListItem->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxNewListItem->pxPrevious = pxIterator; - pxIterator->pxNext = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. This allows fast removal of the - item later. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListRemove( xListItem *pxItemToRemove ) -{ -xList * pxList; - - pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; - pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; - - /* The list item knows which list it is in. Obtain the list from the list - item. */ - pxList = ( xList * ) pxItemToRemove->pvContainer; - - /* Make sure the index is left pointing to a valid item. */ - if( pxList->pxIndex == pxItemToRemove ) - { - pxList->pxIndex = pxItemToRemove->pxPrevious; - } - - pxItemToRemove->pvContainer = NULL; - ( pxList->uxNumberOfItems )--; -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/GCC/ARM_CM3/port.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/GCC/ARM_CM3/port.c deleted file mode 100644 index ae018c43..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/GCC/ARM_CM3/port.c +++ /dev/null @@ -1,280 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -/*----------------------------------------------------------- - * Implementation of functions defined in portable.h for the ARM CM3 port. - *----------------------------------------------------------*/ - -/* Scheduler includes. */ -#include "FreeRTOS.h" -#include "task.h" - -/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is -defined. The value should also ensure backward compatibility. -FreeRTOS.org versions prior to V4.4.0 did not include this definition. */ -#ifndef configKERNEL_INTERRUPT_PRIORITY - #define configKERNEL_INTERRUPT_PRIORITY 255 -#endif - -/* Constants required to manipulate the NVIC. */ -#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 ) -#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 ) -#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 ) -#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 ) -#define portNVIC_SYSTICK_CLK 0x00000004 -#define portNVIC_SYSTICK_INT 0x00000002 -#define portNVIC_SYSTICK_ENABLE 0x00000001 -#define portNVIC_PENDSVSET 0x10000000 -#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 ) -#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 ) - -/* Constants required to set up the initial stack. */ -#define portINITIAL_XPSR ( 0x01000000 ) - -/* The priority used by the kernel is assigned to a variable to make access -from inline assembler easier. */ -const unsigned long ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY; - -/* Each task maintains its own interrupt status in the critical nesting -variable. */ -static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa; - -/* - * Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ); - -/* - * Exception handlers. - */ -void xPortPendSVHandler( void ) __attribute__ (( naked )); -void xPortSysTickHandler( void ); -void vPortSVCHandler( void ) __attribute__ (( naked )); - -/* - * Start first task is a separate function so it can be tested in isolation. - */ -void vPortStartFirstTask( void ) __attribute__ (( naked )); - -/*-----------------------------------------------------------*/ - -/* - * See header file for description. - */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) -{ - /* Simulate the stack frame as it would be created by a context switch - interrupt. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */ - pxTopOfStack--; - *pxTopOfStack = 0; /* LR */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */ - pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ - - return pxTopOfStack; -} -/*-----------------------------------------------------------*/ - -void vPortSVCHandler( void ) -{ - __asm volatile ( - " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */ - " ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */ - " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */ - " ldmia r0!, {r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */ - " msr psp, r0 \n" /* Restore the task stack pointer. */ - " mov r0, #0 \n" - " msr basepri, r0 \n" - " orr r14, #0xd \n" - " bx r14 \n" - " \n" - " .align 2 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - ); -} -/*-----------------------------------------------------------*/ - -void vPortStartFirstTask( void ) -{ - __asm volatile( - " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n" - " ldr r0, [r0] \n" - " msr msp, r0 \n" /* Set the msp back to the start of the stack. */ - " svc 0 \n" /* System call to start first task. */ - ); -} -/*-----------------------------------------------------------*/ - -/* - * See header file for description. - */ -portBASE_TYPE xPortStartScheduler( void ) -{ - /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */ - *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI; - *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI; - - /* Start the timer that generates the tick ISR. Interrupts are disabled - here already. */ - prvSetupTimerInterrupt(); - - /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; - - /* Start the first task. */ - vPortStartFirstTask(); - - /* Should not get here! */ - return 0; -} -/*-----------------------------------------------------------*/ - -void vPortEndScheduler( void ) -{ - /* It is unlikely that the CM3 port will require this function as there - is nothing to return to. */ -} -/*-----------------------------------------------------------*/ - -void vPortYieldFromISR( void ) -{ - /* Set a PendSV to request a context switch. */ - *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; -} -/*-----------------------------------------------------------*/ - -void vPortEnterCritical( void ) -{ - portDISABLE_INTERRUPTS(); - uxCriticalNesting++; -} -/*-----------------------------------------------------------*/ - -void vPortExitCritical( void ) -{ - uxCriticalNesting--; - if( uxCriticalNesting == 0 ) - { - portENABLE_INTERRUPTS(); - } -} -/*-----------------------------------------------------------*/ - -void xPortPendSVHandler( void ) -{ - /* This is a naked function. */ - - __asm volatile - ( - " mrs r0, psp \n" - " \n" - " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */ - " ldr r2, [r3] \n" - " \n" - " stmdb r0!, {r4-r11} \n" /* Save the remaining registers. */ - " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */ - " \n" - " stmdb sp!, {r3, r14} \n" - " mov r0, %0 \n" - " msr basepri, r0 \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n" - " msr basepri, r0 \n" - " ldmia sp!, {r3, r14} \n" - " \n" /* Restore the context, including the critical nesting count. */ - " ldr r1, [r3] \n" - " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */ - " ldmia r0!, {r4-r11} \n" /* Pop the registers. */ - " msr psp, r0 \n" - " bx r14 \n" - " \n" - " .align 2 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) - ); -} -/*-----------------------------------------------------------*/ - -void xPortSysTickHandler( void ) -{ -unsigned long ulDummy; - - /* If using preemption, also force a context switch. */ - #if configUSE_PREEMPTION == 1 - *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; - #endif - - ulDummy = portSET_INTERRUPT_MASK_FROM_ISR(); - { - vTaskIncrementTick(); - } - portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy ); -} -/*-----------------------------------------------------------*/ - -/* - * Setup the systick timer to generate the tick interrupts at the required - * frequency. - */ -void prvSetupTimerInterrupt( void ) -{ - /* Configure SysTick to interrupt at the requested rate. */ - *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE; -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/GCC/ARM_CM3/portmacro.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/GCC/ARM_CM3/portmacro.h deleted file mode 100644 index 13d0e82c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/GCC/ARM_CM3/portmacro.h +++ /dev/null @@ -1,156 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - - -#ifndef PORTMACRO_H -#define PORTMACRO_H - -#ifdef __cplusplus -extern "C" { -#endif - -/*----------------------------------------------------------- - * Port specific definitions. - * - * The settings in this file configure FreeRTOS correctly for the - * given hardware and compiler. - * - * These settings should not be altered. - *----------------------------------------------------------- - */ - -/* Type definitions. */ -#define portCHAR char -#define portFLOAT float -#define portDOUBLE double -#define portLONG long -#define portSHORT short -#define portSTACK_TYPE unsigned portLONG -#define portBASE_TYPE long - -#if( configUSE_16_BIT_TICKS == 1 ) - typedef unsigned portSHORT portTickType; - #define portMAX_DELAY ( portTickType ) 0xffff -#else - typedef unsigned portLONG portTickType; - #define portMAX_DELAY ( portTickType ) 0xffffffff -#endif -/*-----------------------------------------------------------*/ - -/* Architecture specifics. */ -#define portSTACK_GROWTH ( -1 ) -#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) -#define portBYTE_ALIGNMENT 8 -/*-----------------------------------------------------------*/ - - -/* Scheduler utilities. */ -extern void vPortYieldFromISR( void ); - -#define portYIELD() vPortYieldFromISR() - -#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR() -/*-----------------------------------------------------------*/ - - -/* Critical section management. */ - -/* - * Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other - * registers. r0 is clobbered. - */ -#define portSET_INTERRUPT_MASK() \ - __asm volatile \ - ( \ - " mov r0, %0 \n" \ - " msr basepri, r0 \n" \ - ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY):"r0" \ - ) - -/* - * Set basepri back to 0 without effective other registers. - * r0 is clobbered. - */ -#define portCLEAR_INTERRUPT_MASK() \ - __asm volatile \ - ( \ - " mov r0, #0 \n" \ - " msr basepri, r0 \n" \ - :::"r0" \ - ) - -#define portSET_INTERRUPT_MASK_FROM_ISR() 0;portSET_INTERRUPT_MASK() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) portCLEAR_INTERRUPT_MASK();(void)x - - -extern void vPortEnterCritical( void ); -extern void vPortExitCritical( void ); - -#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK() -#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK() -#define portENTER_CRITICAL() vPortEnterCritical() -#define portEXIT_CRITICAL() vPortExitCritical() -/*-----------------------------------------------------------*/ - -/* Task function macros as described on the FreeRTOS.org WEB site. */ -#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) -#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) - -#define portNOP() - -#ifdef __cplusplus -} -#endif - -#endif /* PORTMACRO_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/GCC/ARM_CM3_MPU/port.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/GCC/ARM_CM3_MPU/port.c deleted file mode 100644 index b75f601e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/GCC/ARM_CM3_MPU/port.c +++ /dev/null @@ -1,1057 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -/*----------------------------------------------------------- - * Implementation of functions defined in portable.h for the ARM CM3 port. - *----------------------------------------------------------*/ - -/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining -all the API functions to use the MPU wrappers. That should only be done when -task.h is included from an application file. */ -#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -/* Scheduler includes. */ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" - -#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -/* Constants required to access and manipulate the NVIC. */ -#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long * ) 0xe000e010 ) -#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long * ) 0xe000e014 ) -#define portNVIC_SYSPRI2 ( ( volatile unsigned long * ) 0xe000ed20 ) -#define portNVIC_SYSPRI1 ( ( volatile unsigned long * ) 0xe000ed1c ) -#define portNVIC_SYS_CTRL_STATE ( ( volatile unsigned long * ) 0xe000ed24 ) -#define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL ) - -/* Constants required to access and manipulate the MPU. */ -#define portMPU_TYPE ( ( volatile unsigned long * ) 0xe000ed90 ) -#define portMPU_REGION_BASE_ADDRESS ( ( volatile unsigned long * ) 0xe000ed9C ) -#define portMPU_REGION_ATTRIBUTE ( ( volatile unsigned long * ) 0xe000edA0 ) -#define portMPU_CTRL ( ( volatile unsigned long * ) 0xe000ed94 ) -#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */ -#define portMPU_ENABLE ( 0x01UL ) -#define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL ) -#define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL ) -#define portMPU_REGION_VALID ( 0x10UL ) -#define portMPU_REGION_ENABLE ( 0x01UL ) -#define portPERIPHERALS_START_ADDRESS 0x40000000UL -#define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL - -/* Constants required to access and manipulate the SysTick. */ -#define portNVIC_SYSTICK_CLK ( 0x00000004UL ) -#define portNVIC_SYSTICK_INT ( 0x00000002UL ) -#define portNVIC_SYSTICK_ENABLE ( 0x00000001UL ) -#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL ) -#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL ) -#define portNVIC_SVC_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL ) - -/* Constants required to set up the initial stack. */ -#define portINITIAL_XPSR ( 0x01000000 ) -#define portINITIAL_CONTROL_IF_UNPRIVILEGED ( 0x03 ) -#define portINITIAL_CONTROL_IF_PRIVILEGED ( 0x02 ) - -/* Offsets in the stack to the parameters when inside the SVC handler. */ -#define portOFFSET_TO_PC ( 6 ) - -/* Set the privilege level to user mode if xRunningPrivileged is false. */ -#define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " ) - -/* Each task maintains its own interrupt status in the critical nesting -variable. Note this is not saved as part of the task context as context -switches can only occur when uxCriticalNesting is zero. */ -static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa; - -/* - * Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; - -/* - * Configure a number of standard MPU regions that are used by all tasks. - */ -static void prvSetupMPU( void ) PRIVILEGED_FUNCTION; - -/* - * Return the smallest MPU region size that a given number of bytes will fit - * into. The region size is returned as the value that should be programmed - * into the region attribute register for that region. - */ -static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION; - -/* - * Checks to see if being called from the context of an unprivileged task, and - * if so raises the privilege level and returns false - otherwise does nothing - * other than return true. - */ -static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked )); - -/* - * Standard FreeRTOS exception handlers. - */ -void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; -void xPortSysTickHandler( void ) __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION; -void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; - -/* - * Starts the scheduler by restoring the context of the first task to run. - */ -static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; - -/* - * C portion of the SVC handler. The SVC handler is split between an asm entry - * and a C wrapper for simplicity of coding and maintenance. - */ -static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION; - -/*-----------------------------------------------------------*/ - -/* - * See header file for description. - */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged ) -{ - /* Simulate the stack frame as it would be created by a context switch - interrupt. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */ - pxTopOfStack--; - *pxTopOfStack = 0; /* LR */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */ - pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ - - if( xRunPrivileged == pdTRUE ) - { - *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED; - } - else - { - *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED; - } - - return pxTopOfStack; -} -/*-----------------------------------------------------------*/ - -void vPortSVCHandler( void ) -{ - /* Assumes psp was in use. */ - __asm volatile - ( - #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */ - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - #else - " mrs r0, psp \n" - #endif - " b prvSVCHandler \n" - :::"r0" - ); - - /* This will never get executed, but is required to prevent prvSVCHandler - being removed by the optimiser. */ - prvSVCHandler( NULL ); -} -/*-----------------------------------------------------------*/ - -static void prvSVCHandler( unsigned long *pulParam ) -{ -unsigned char ucSVCNumber; - - /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and - xPSR. The first argument (r0) is pulParam[ 0 ]. */ - ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ]; - switch( ucSVCNumber ) - { - case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI; - prvRestoreContextOfFirstTask(); - break; - - case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; - break; - - case portSVC_prvRaisePrivilege : __asm volatile - ( - " mrs r1, control \n" /* Obtain current control value. */ - " bic r1, #1 \n" /* Set privilege bit. */ - " msr control, r1 \n" /* Write back new control value. */ - :::"r1" - ); - break; - - default : /* Unknown SVC call. */ - break; - } -} -/*-----------------------------------------------------------*/ - -static void prvRestoreContextOfFirstTask( void ) -{ - __asm volatile - ( - " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n" - " ldr r0, [r0] \n" - " msr msp, r0 \n" /* Set the msp back to the start of the stack. */ - " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */ - " ldr r1, [r3] \n" - " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */ - " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */ - " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */ - " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */ - " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */ - " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */ - " msr control, r3 \n" - " msr psp, r0 \n" /* Restore the task stack pointer. */ - " mov r0, #0 \n" - " msr basepri, r0 \n" - " ldr r14, =0xfffffffd \n" /* Load exec return code. */ - " bx r14 \n" - " \n" - " .align 2 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - ); -} -/*-----------------------------------------------------------*/ - -/* - * See header file for description. - */ -portBASE_TYPE xPortStartScheduler( void ) -{ - /* Make PendSV and SysTick the same priroity as the kernel. */ - *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI; - *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI; - - /* Configure the regions in the MPU that are common to all tasks. */ - prvSetupMPU(); - - /* Start the timer that generates the tick ISR. Interrupts are disabled - here already. */ - prvSetupTimerInterrupt(); - - /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; - - /* Start the first task. */ - __asm volatile( " svc %0 \n" - :: "i" (portSVC_START_SCHEDULER) ); - - /* Should not get here! */ - return 0; -} -/*-----------------------------------------------------------*/ - -void vPortEndScheduler( void ) -{ - /* It is unlikely that the CM3 port will require this function as there - is nothing to return to. */ -} -/*-----------------------------------------------------------*/ - -void vPortEnterCritical( void ) -{ -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - portDISABLE_INTERRUPTS(); - uxCriticalNesting++; - - portRESET_PRIVILEGE( xRunningPrivileged ); -} -/*-----------------------------------------------------------*/ - -void vPortExitCritical( void ) -{ -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - uxCriticalNesting--; - if( uxCriticalNesting == 0 ) - { - portENABLE_INTERRUPTS(); - } - portRESET_PRIVILEGE( xRunningPrivileged ); -} -/*-----------------------------------------------------------*/ - -void xPortPendSVHandler( void ) -{ - /* This is a naked function. */ - - __asm volatile - ( - " mrs r0, psp \n" - " \n" - " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */ - " ldr r2, [r3] \n" - " \n" - " mrs r1, control \n" - " stmdb r0!, {r1, r4-r11} \n" /* Save the remaining registers. */ - " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */ - " \n" - " stmdb sp!, {r3, r14} \n" - " mov r0, %0 \n" - " msr basepri, r0 \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n" - " msr basepri, r0 \n" - " ldmia sp!, {r3, r14} \n" - " \n" /* Restore the context. */ - " ldr r1, [r3] \n" - " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */ - " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */ - " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */ - " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */ - " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */ - " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */ - " msr control, r3 \n" - " \n" - " msr psp, r0 \n" - " bx r14 \n" - " \n" - " .align 2 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) - ); -} -/*-----------------------------------------------------------*/ - -void xPortSysTickHandler( void ) -{ -unsigned long ulDummy; - - /* If using preemption, also force a context switch. */ - #if configUSE_PREEMPTION == 1 - *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; - #endif - - ulDummy = portSET_INTERRUPT_MASK_FROM_ISR(); - { - vTaskIncrementTick(); - } - portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy ); -} -/*-----------------------------------------------------------*/ - -/* - * Setup the systick timer to generate the tick interrupts at the required - * frequency. - */ -static void prvSetupTimerInterrupt( void ) -{ - /* Configure SysTick to interrupt at the requested rate. */ - *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE; -} -/*-----------------------------------------------------------*/ - -static void prvSetupMPU( void ) -{ -extern unsigned long __privileged_functions_end__[]; -extern unsigned long __FLASH_segment_start__[]; -extern unsigned long __FLASH_segment_end__[]; -extern unsigned long __privileged_data_start__[]; -extern unsigned long __privileged_data_end__[]; - - /* Check the expected MPU is present. */ - if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE ) - { - /* First setup the entire flash for unprivileged read only access. */ - *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */ - ( portMPU_REGION_VALID ) | - ( portUNPRIVILEGED_FLASH_REGION ); - - *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) | - ( portMPU_REGION_ENABLE ); - - /* Setup the first 16K for privileged only access (even though less - than 10K is actually being used). This is where the kernel code is - placed. */ - *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */ - ( portMPU_REGION_VALID ) | - ( portPRIVILEGED_FLASH_REGION ); - - *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) | - ( portMPU_REGION_ENABLE ); - - /* Setup the privileged data RAM region. This is where the kernel data - is placed. */ - *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */ - ( portMPU_REGION_VALID ) | - ( portPRIVILEGED_RAM_REGION ); - - *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) | - ( portMPU_REGION_ENABLE ); - - /* By default allow everything to access the general peripherals. The - system peripherals and registers are protected. */ - *portMPU_REGION_BASE_ADDRESS = ( portPERIPHERALS_START_ADDRESS ) | - ( portMPU_REGION_VALID ) | - ( portGENERAL_PERIPHERALS_REGION ); - - *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) | - ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) | - ( portMPU_REGION_ENABLE ); - - /* Enable the memory fault exception. */ - *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE; - - /* Enable the MPU with the background region configured. */ - *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); - } -} -/*-----------------------------------------------------------*/ - -static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) -{ -unsigned long ulRegionSize, ulReturnValue = 4; - - /* 32 is the smallest region size, 31 is the largest valid value for - ulReturnValue. */ - for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) ) - { - if( ulActualSizeInBytes <= ulRegionSize ) - { - break; - } - else - { - ulReturnValue++; - } - } - - /* Shift the code by one before returning so it can be written directly - into the the correct bit position of the attribute register. */ - return ( ulReturnValue << 1UL ); -} -/*-----------------------------------------------------------*/ - -static portBASE_TYPE prvRaisePrivilege( void ) -{ - __asm volatile - ( - " mrs r0, control \n" - " tst r0, #1 \n" /* Is the task running privileged? */ - " itte ne \n" - " movne r0, #0 \n" /* CONTROL[0]!=0, return false. */ - " svcne %0 \n" /* Switch to privileged. */ - " moveq r0, #1 \n" /* CONTROL[0]==0, return true. */ - " bx lr \n" - :: "i" (portSVC_prvRaisePrivilege) : "r0" - ); - - return 0; -} -/*-----------------------------------------------------------*/ - -void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth ) -{ -extern unsigned long __SRAM_segment_start__[]; -extern unsigned long __SRAM_segment_end__[]; -extern unsigned long __privileged_data_start__[]; -extern unsigned long __privileged_data_end__[]; -long lIndex; -unsigned long ul; - - if( xRegions == NULL ) - { - /* No MPU regions are specified so allow access to all RAM. */ - xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress = - ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */ - ( portMPU_REGION_VALID ) | - ( portSTACK_REGION ); - - xMPUSettings->xRegion[ 0 ].ulRegionAttribute = - ( portMPU_REGION_READ_WRITE ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) | - ( portMPU_REGION_ENABLE ); - - /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have - just removed the privileged only parameters. */ - xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress = - ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */ - ( portMPU_REGION_VALID ) | - ( portSTACK_REGION + 1 ); - - xMPUSettings->xRegion[ 1 ].ulRegionAttribute = - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) | - ( portMPU_REGION_ENABLE ); - - /* Invalidate all other regions. */ - for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) - { - xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; - xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; - } - } - else - { - /* This function is called automatically when the task is created - in - which case the stack region parameters will be valid. At all other - times the stack parameters will not be valid and it is assumed that the - stack region has already been configured. */ - if( usStackDepth > 0 ) - { - /* Define the region that allows access to the stack. */ - xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress = - ( ( unsigned long ) pxBottomOfStack ) | - ( portMPU_REGION_VALID ) | - ( portSTACK_REGION ); /* Region number. */ - - xMPUSettings->xRegion[ 0 ].ulRegionAttribute = - ( portMPU_REGION_READ_WRITE ) | /* Read and write. */ - ( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - ( portMPU_REGION_ENABLE ); - } - - lIndex = 0; - - for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) - { - if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL ) - { - /* Translate the generic region definition contained in - xRegions into the CM3 specific MPU settings that are then - stored in xMPUSettings. */ - xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = - ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) | - ( portMPU_REGION_VALID ) | - ( portSTACK_REGION + ul ); /* Region number. */ - - xMPUSettings->xRegion[ ul ].ulRegionAttribute = - ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | - ( xRegions[ lIndex ].ulParameters ) | - ( portMPU_REGION_ENABLE ); - } - else - { - /* Invalidate the region. */ - xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; - xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; - } - - lIndex++; - } - } -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions ) -{ -signed portBASE_TYPE xReturn; -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions ) -{ -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vTaskAllocateMPURegions( xTask, xRegions ); - portRESET_PRIVILEGE( xRunningPrivileged ); -} -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelete == 1 ) - void MPU_vTaskDelete( xTaskHandle pxTaskToDelete ) - { - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vTaskDelete( pxTaskToDelete ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelayUntil == 1 ) - void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement ) - { - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelay == 1 ) - void MPU_vTaskDelay( portTickType xTicksToDelay ) - { - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vTaskDelay( xTicksToDelay ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_uxTaskPriorityGet == 1 ) - unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask ) - { - unsigned portBASE_TYPE uxReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - uxReturn = uxTaskPriorityGet( pxTask ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return uxReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskPrioritySet == 1 ) - void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ) - { - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vTaskPrioritySet( pxTask, uxNewPriority ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend ) - { - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vTaskSuspend( pxTaskToSuspend ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask ) - { - signed portBASE_TYPE xReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskIsTaskSuspended( xTask ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - void MPU_vTaskResume( xTaskHandle pxTaskToResume ) - { - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vTaskResume( pxTaskToResume ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -void MPU_vTaskSuspendAll( void ) -{ -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vTaskSuspendAll(); - portRESET_PRIVILEGE( xRunningPrivileged ); -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE MPU_xTaskResumeAll( void ) -{ -signed portBASE_TYPE xReturn; -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskResumeAll(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -portTickType MPU_xTaskGetTickCount( void ) -{ -portTickType xReturn; -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskGetTickCount(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void ) -{ -unsigned portBASE_TYPE uxReturn; -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - uxReturn = uxTaskGetNumberOfTasks(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return uxReturn; -} -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - void MPU_vTaskList( signed char *pcWriteBuffer ) - { - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vTaskList( pcWriteBuffer ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configGENERATE_RUN_TIME_STATS == 1 ) - void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer ) - { - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vTaskGetRunTimeStats( pcWriteBuffer ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - void MPU_vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize ) - { - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vTaskStartTrace( pcBuffer, ulBufferSize ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - unsigned long MPU_ulTaskEndTrace( void ) - { - unsigned long ulReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - ulReturn = ulTaskEndTrace(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return ulReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) - void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue ) - { - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vTaskSetApplicationTaskTag( xTask, pxTagValue ); - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) - pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask ) - { - pdTASK_HOOK_CODE xReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskGetApplicationTaskTag( xTask ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) - portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter ) - { - portBASE_TYPE xReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) - unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask ) - { - unsigned portBASE_TYPE uxReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - uxReturn = uxTaskGetStackHighWaterMark( xTask ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return uxReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) - xTaskHandle MPU_xTaskGetCurrentTaskHandle( void ) - { - xTaskHandle xReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskGetCurrentTaskHandle(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) - portBASE_TYPE MPU_xTaskGetSchedulerState( void ) - { - portBASE_TYPE xReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xTaskGetSchedulerState(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ) -{ -xQueueHandle xReturn; -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueCreate( uxQueueLength, uxItemSize ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition ) -{ -signed portBASE_TYPE xReturn; -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue ) -{ -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); -unsigned portBASE_TYPE uxReturn; - - uxReturn = uxQueueMessagesWaiting( pxQueue ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return uxReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking ) -{ -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); -signed portBASE_TYPE xReturn; - - xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if ( configUSE_MUTEXES == 1 ) - xQueueHandle MPU_xQueueCreateMutex( void ) - { - xQueueHandle xReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueCreateMutex(); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_COUNTING_SEMAPHORES == 1 - xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount ) - { - xQueueHandle xReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueHandle xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_MUTEXES == 1 ) - portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime ) - { - portBASE_TYPE xReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_MUTEXES == 1 ) - portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex ) - { - portBASE_TYPE xReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueGiveMutexRecursive( xMutex ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_ALTERNATIVE_API == 1 - signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition ) - { - signed portBASE_TYPE xReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_ALTERNATIVE_API == 1 - signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking ) - { - signed portBASE_TYPE xReturn; - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking ); - portRESET_PRIVILEGE( xRunningPrivileged ); - return xReturn; - } -#endif -/*-----------------------------------------------------------*/ - -#if configQUEUE_REGISTRY_SIZE > 0 - void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName ) - { - portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vQueueAddToRegistry( xQueue, pcName ); - - portRESET_PRIVILEGE( xRunningPrivileged ); - } -#endif -/*-----------------------------------------------------------*/ - -void *MPU_pvPortMalloc( size_t xSize ) -{ -void *pvReturn; -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - pvReturn = pvPortMalloc( xSize ); - - portRESET_PRIVILEGE( xRunningPrivileged ); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void MPU_vPortFree( void *pv ) -{ -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vPortFree( pv ); - - portRESET_PRIVILEGE( xRunningPrivileged ); -} -/*-----------------------------------------------------------*/ - -void MPU_vPortInitialiseBlocks( void ) -{ -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - vPortInitialiseBlocks(); - - portRESET_PRIVILEGE( xRunningPrivileged ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xPortGetFreeHeapSize( void ) -{ -size_t xReturn; -portBASE_TYPE xRunningPrivileged = prvRaisePrivilege(); - - xReturn = xPortGetFreeHeapSize(); - - portRESET_PRIVILEGE( xRunningPrivileged ); - - return xReturn; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/GCC/ARM_CM3_MPU/portmacro.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/GCC/ARM_CM3_MPU/portmacro.h deleted file mode 100644 index 48c8fd42..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/GCC/ARM_CM3_MPU/portmacro.h +++ /dev/null @@ -1,199 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - - -#ifndef PORTMACRO_H -#define PORTMACRO_H - -#ifdef __cplusplus -extern "C" { -#endif - -/*----------------------------------------------------------- - * Port specific definitions. - * - * The settings in this file configure FreeRTOS correctly for the - * given hardware and compiler. - * - * These settings should not be altered. - *----------------------------------------------------------- - */ - -/* Type definitions. */ -#define portCHAR char -#define portFLOAT float -#define portDOUBLE double -#define portLONG long -#define portSHORT short -#define portSTACK_TYPE unsigned portLONG -#define portBASE_TYPE long - -#if( configUSE_16_BIT_TICKS == 1 ) - typedef unsigned portSHORT portTickType; - #define portMAX_DELAY ( portTickType ) 0xffff -#else - typedef unsigned portLONG portTickType; - #define portMAX_DELAY ( portTickType ) 0xffffffff -#endif -/*-----------------------------------------------------------*/ - -/* MPU specific constants. */ -#define portUSING_MPU_WRAPPERS 1 -#define portPRIVILEGE_BIT ( 0x80000000UL ) - -#define portMPU_REGION_READ_WRITE ( 0x03UL << 24UL ) -#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 0x05UL << 24UL ) -#define portMPU_REGION_READ_ONLY ( 0x06UL << 24UL ) -#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0x01UL << 24UL ) -#define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL ) -#define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL ) - -#define portUNPRIVILEGED_FLASH_REGION ( 0UL ) -#define portPRIVILEGED_FLASH_REGION ( 1UL ) -#define portPRIVILEGED_RAM_REGION ( 2UL ) -#define portGENERAL_PERIPHERALS_REGION ( 3UL ) -#define portSTACK_REGION ( 4UL ) -#define portFIRST_CONFIGURABLE_REGION ( 5UL ) -#define portLAST_CONFIGURABLE_REGION ( 7UL ) -#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 ) -#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ - -#define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " :::"r0" ) - -typedef struct MPU_REGION_REGISTERS -{ - unsigned portLONG ulRegionBaseAddress; - unsigned portLONG ulRegionAttribute; -} xMPU_REGION_REGISTERS; - -/* Plus 1 to create space for the stack region. */ -typedef struct MPU_SETTINGS -{ - xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ]; -} xMPU_SETTINGS; - -/* Architecture specifics. */ -#define portSTACK_GROWTH ( -1 ) -#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) -#define portBYTE_ALIGNMENT 8 -/*-----------------------------------------------------------*/ - -/* SVC numbers for various services. */ -#define portSVC_START_SCHEDULER 0 -#define portSVC_YIELD 1 -#define portSVC_prvRaisePrivilege 2 - -/* Scheduler utilities. */ - -#define portYIELD() __asm volatile ( " SVC %0 \n" :: "i" (portSVC_YIELD) ) -#define portYIELD_WITHIN_API() *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET - -#define portNVIC_INT_CTRL ( ( volatile unsigned portLONG *) 0xe000ed04 ) -#define portNVIC_PENDSVSET 0x10000000 -#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET -/*-----------------------------------------------------------*/ - - -/* Critical section management. */ - -/* - * Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other - * registers. r0 is clobbered. - */ -#define portSET_INTERRUPT_MASK() \ - __asm volatile \ - ( \ - " mov r0, %0 \n" \ - " msr basepri, r0 \n" \ - ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY):"r0" \ - ) - -/* - * Set basepri back to 0 without effective other registers. - * r0 is clobbered. - */ -#define portCLEAR_INTERRUPT_MASK() \ - __asm volatile \ - ( \ - " mov r0, #0 \n" \ - " msr basepri, r0 \n" \ - :::"r0" \ - ) - -#define portSET_INTERRUPT_MASK_FROM_ISR() 0;portSET_INTERRUPT_MASK() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) portCLEAR_INTERRUPT_MASK();(void)x - - -extern void vPortEnterCritical( void ); -extern void vPortExitCritical( void ); - -#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK() -#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK() -#define portENTER_CRITICAL() vPortEnterCritical() -#define portEXIT_CRITICAL() vPortExitCritical() -/*-----------------------------------------------------------*/ - -/* Task function macros as described on the FreeRTOS.org WEB site. */ -#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) -#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) - -#define portNOP() - - - -#ifdef __cplusplus -} -#endif - -#endif /* PORTMACRO_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/IAR/ARM_CM3/port.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/IAR/ARM_CM3/port.c deleted file mode 100644 index ffffbf97..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/IAR/ARM_CM3/port.c +++ /dev/null @@ -1,217 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -/* - Change from V4.2.1: - - + Introduced usage of configKERNEL_INTERRUPT_PRIORITY macro to set the - interrupt priority used by the kernel. -*/ - -/*----------------------------------------------------------- - * Implementation of functions defined in portable.h for the ARM CM3 port. - *----------------------------------------------------------*/ - -/* Scheduler includes. */ -#include "FreeRTOS.h" -#include "task.h" -#include "exceptions.h" - -/* Constants required to manipulate the NVIC. */ -#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 ) -#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 ) -#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 ) -#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 ) -#define portNVIC_SYSTICK_CLK 0x00000004 -#define portNVIC_SYSTICK_INT 0x00000002 -#define portNVIC_SYSTICK_ENABLE 0x00000001 -#define portNVIC_PENDSVSET 0x10000000 -#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 ) -#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 ) - -/* Constants required to set up the initial stack. */ -#define portINITIAL_XPSR ( 0x01000000 ) - -/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is -defined. The value 255 should also ensure backward compatibility. -FreeRTOS.org versions prior to V4.3.0 did not include this definition. */ -#ifndef configKERNEL_INTERRUPT_PRIORITY - #define configKERNEL_INTERRUPT_PRIORITY 0 -#endif - -/* Each task maintains its own interrupt status in the critical nesting -variable. */ -static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa; - -/* - * Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ); - -/* - * Exception handlers. - */ -void xPortSysTickHandler( void ); - -/* - * Start first task is a separate function so it can be tested in isolation. - */ -extern void vPortStartFirstTask( void ); - -/*-----------------------------------------------------------*/ - -/* - * See header file for description. - */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) -{ - /* Simulate the stack frame as it would be created by a context switch - interrupt. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */ - pxTopOfStack--; - *pxTopOfStack = 0; /* LR */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */ - pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ - - return pxTopOfStack; -} -/*-----------------------------------------------------------*/ - -/* - * See header file for description. - */ -portBASE_TYPE xPortStartScheduler( void ) -{ - /* Make PendSV and SysTick the lowest priority interrupts. */ - *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI; - *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI; - - /* Start the timer that generates the tick ISR. Interrupts are disabled - here already. */ - prvSetupTimerInterrupt(); - - /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; - - /* Start the first task. */ - vPortStartFirstTask(); - - /* Should not get here! */ - return 0; -} -/*-----------------------------------------------------------*/ - -void vPortEndScheduler( void ) -{ - /* It is unlikely that the CM3 port will require this function as there - is nothing to return to. */ -} -/*-----------------------------------------------------------*/ - -void vPortYieldFromISR( void ) -{ - /* Set a PendSV to request a context switch. */ - *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; -} -/*-----------------------------------------------------------*/ - -void vPortEnterCritical( void ) -{ - portDISABLE_INTERRUPTS(); - uxCriticalNesting++; -} -/*-----------------------------------------------------------*/ - -void vPortExitCritical( void ) -{ - uxCriticalNesting--; - if( uxCriticalNesting == 0 ) - { - portENABLE_INTERRUPTS(); - } -} -/*-----------------------------------------------------------*/ - -//void xPortSysTickHandler( void ) -void SysTick_Handler( void ) -{ - unsigned long ulDummy; - - /* If using preemption, also force a context switch. */ - #if configUSE_PREEMPTION == 1 - *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; - #endif - - ulDummy = portSET_INTERRUPT_MASK_FROM_ISR(); - { - vTaskIncrementTick(); - } - portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy ); -} -/*-----------------------------------------------------------*/ - -/* - * Setup the systick timer to generate the tick interrupts at the required - * frequency. - */ -void prvSetupTimerInterrupt( void ) -{ - /* Configure SysTick to interrupt at the requested rate. */ - *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE; -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/IAR/ARM_CM3/portasm.s b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/IAR/ARM_CM3/portasm.s deleted file mode 100644 index 7fbfa4a6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/IAR/ARM_CM3/portasm.s +++ /dev/null @@ -1,167 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -/* - Change from V4.2.1: - - + Introduced usage of configKERNEL_INTERRUPT_PRIORITY macro to set the - interrupt priority used by the kernel. -*/ - -#include - -/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is -defined. The value zero should also ensure backward compatibility. -FreeRTOS.org versions prior to V4.3.0 did not include this definition. */ -#ifndef configKERNEL_INTERRUPT_PRIORITY - #define configKERNEL_INTERRUPT_PRIORITY 0 -#endif - - - RSEG CODE:CODE(2) - thumb - - EXTERN vPortYieldFromISR - EXTERN pxCurrentTCB - EXTERN vTaskSwitchContext - - PUBLIC vSetMSP -// PUBLIC xPortPendSVHandler - PUBLIC PendSV_Handler - PUBLIC vPortSetInterruptMask - PUBLIC vPortClearInterruptMask -// PUBLIC vPortSVCHandler - PUBLIC SVC_Handler - PUBLIC vPortStartFirstTask - - -/*-----------------------------------------------------------*/ - -vSetMSP: - msr msp, r0 - bx lr - -/*-----------------------------------------------------------*/ - -//xPortPendSVHandler: -PendSV_Handler: - mrs r0, psp - ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */ - ldr r2, [r3] - - stmdb r0!, {r4-r11} /* Save the remaining registers. */ - str r0, [r2] /* Save the new top of stack into the first member of the TCB. */ - - stmdb sp!, {r3, r14} - mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY - msr basepri, r0 - bl vTaskSwitchContext - mov r0, #0 - msr basepri, r0 - ldmia sp!, {r3, r14} - - ldr r1, [r3] - ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */ - ldmia r0!, {r4-r11} /* Pop the registers. */ - msr psp, r0 - bx r14 - - -/*-----------------------------------------------------------*/ - -vPortSetInterruptMask: - push { r0 } - mov R0, #configMAX_SYSCALL_INTERRUPT_PRIORITY - msr BASEPRI, R0 - pop { R0 } - - bx r14 - -/*-----------------------------------------------------------*/ - -vPortClearInterruptMask: - PUSH { r0 } - MOV R0, #0 - MSR BASEPRI, R0 - POP { R0 } - - bx r14 - -/*-----------------------------------------------------------*/ - -SVC_Handler: -//vPortSVCHandler; - ldr r3, =pxCurrentTCB - ldr r1, [r3] - ldr r0, [r1] - ldmia r0!, {r4-r11} - msr psp, r0 - mov r0, #0 - msr basepri, r0 - orr r14, r14, #13 - bx r14 - -/*-----------------------------------------------------------*/ - -vPortStartFirstTask: - /* Use the NVIC offset register to locate the stack. */ - ldr r0, =0xE000ED08 - ldr r0, [r0] - ldr r0, [r0] - /* Set the msp back to the start of the stack. */ - msr msp, r0 - /* Call SVC to start the first task. */ - svc 0 - - END - \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/IAR/ARM_CM3/portmacro.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/IAR/ARM_CM3/portmacro.h deleted file mode 100644 index b3205d55..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/IAR/ARM_CM3/portmacro.h +++ /dev/null @@ -1,133 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - - -#ifndef PORTMACRO_H -#define PORTMACRO_H - -#ifdef __cplusplus -extern "C" { -#endif - -/*----------------------------------------------------------- - * Port specific definitions. - * - * The settings in this file configure FreeRTOS correctly for the - * given hardware and compiler. - * - * These settings should not be altered. - *----------------------------------------------------------- - */ - -/* Type definitions. */ -#define portCHAR char -#define portFLOAT float -#define portDOUBLE double -#define portLONG long -#define portSHORT short -#define portSTACK_TYPE unsigned portLONG -#define portBASE_TYPE long - -#if( configUSE_16_BIT_TICKS == 1 ) - typedef unsigned portSHORT portTickType; - #define portMAX_DELAY ( portTickType ) 0xffff -#else - typedef unsigned portLONG portTickType; - #define portMAX_DELAY ( portTickType ) 0xffffffff -#endif -/*-----------------------------------------------------------*/ - -/* Architecture specifics. */ -#define portSTACK_GROWTH ( -1 ) -#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) -#define portBYTE_ALIGNMENT 8 -/*-----------------------------------------------------------*/ - - -/* Scheduler utilities. */ -extern void vPortYieldFromISR( void ); - -#define portYIELD() vPortYieldFromISR() - -#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR() -/*-----------------------------------------------------------*/ - - -/* Critical section management. */ - -extern void vPortEnterCritical( void ); -extern void vPortExitCritical( void ); -extern void vPortSetInterruptMask( void ); -extern void vPortClearInterruptMask( void ); - -#define portDISABLE_INTERRUPTS() vPortSetInterruptMask() -#define portENABLE_INTERRUPTS() vPortClearInterruptMask() -#define portENTER_CRITICAL() vPortEnterCritical() -#define portEXIT_CRITICAL() vPortExitCritical() -#define portSET_INTERRUPT_MASK_FROM_ISR() 0;vPortSetInterruptMask() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask();(void)x - -/*-----------------------------------------------------------*/ - -/* Task function macros as described on the FreeRTOS.org WEB site. */ -#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) -#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) - -#define portNOP() - -#ifdef __cplusplus -} -#endif - -#endif /* PORTMACRO_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/MemMang/heap_1.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/MemMang/heap_1.c deleted file mode 100644 index ac065cb8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/MemMang/heap_1.c +++ /dev/null @@ -1,152 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - - -/* - * The simplest possible implementation of pvPortMalloc(). Note that this - * implementation does NOT allow allocated memory to be freed again. - * - * See heap_2.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include - -/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining -all the API functions to use the MPU wrappers. That should only be done when -task.h is included from an application file. */ -#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -#include "FreeRTOS.h" -#include "task.h" - -#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static union xRTOS_HEAP -{ - #if portBYTE_ALIGNMENT == 8 - volatile portDOUBLE dDummy; - #else - volatile unsigned long ulDummy; - #endif - unsigned char ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -static size_t xNextFreeByte = ( size_t ) 0; -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn = NULL; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - #if portBYTE_ALIGNMENT != 1 - if( xWantedSize & portBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ); - } - #endif - - vTaskSuspendAll(); - { - /* Check there is enough room left for the allocation. */ - if( ( ( xNextFreeByte + xWantedSize ) < configTOTAL_HEAP_SIZE ) && - ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) )/* Check for overflow. */ - { - /* Return the next free byte then increment the index past this - block. */ - pvReturn = &( xHeap.ucHeap[ xNextFreeByte ] ); - xNextFreeByte += xWantedSize; - } - } - xTaskResumeAll(); - - #if( configUSE_MALLOC_FAILED_HOOK == 1 ) - { - if( pvReturn == NULL ) - { - extern void vApplicationMallocFailedHook( void ); - vApplicationMallocFailedHook(); - } - } - #endif - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - /* Memory cannot be freed using this scheme. See heap_2.c and heap_3.c - for alternative implementations, and the memory management pages of - http://www.FreeRTOS.org for more information. */ - ( void ) pv; -} -/*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* Only required when static memory is not cleared. */ - xNextFreeByte = ( size_t ) 0; -} -/*-----------------------------------------------------------*/ - -size_t xPortGetFreeHeapSize( void ) -{ - return ( configTOTAL_HEAP_SIZE - xNextFreeByte ); -} - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/MemMang/heap_2.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/MemMang/heap_2.c deleted file mode 100644 index 35bf87ca..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/MemMang/heap_2.c +++ /dev/null @@ -1,280 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -/* - * A sample implementation of pvPortMalloc() and vPortFree() that permits - * allocated blocks to be freed, but does not combine adjacent free blocks - * into a single larger block. - * - * See heap_1.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include - -/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining -all the API functions to use the MPU wrappers. That should only be done when -task.h is included from an application file. */ -#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -#include "FreeRTOS.h" -#include "task.h" - -#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static union xRTOS_HEAP -{ - #if portBYTE_ALIGNMENT == 8 - volatile portDOUBLE dDummy; - #else - volatile unsigned long ulDummy; - #endif - unsigned char ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -/* Define the linked list structure. This is used to link free blocks in order -of their size. */ -typedef struct A_BLOCK_LINK -{ - struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */ - size_t xBlockSize; /*<< The size of the free block. */ -} xBlockLink; - - -static const unsigned short heapSTRUCT_SIZE = ( sizeof( xBlockLink ) + portBYTE_ALIGNMENT - ( sizeof( xBlockLink ) % portBYTE_ALIGNMENT ) ); -#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) ) - -/* Create a couple of list links to mark the start and end of the list. */ -static xBlockLink xStart, xEnd; - -/* Keeps track of the number of free bytes remaining, but says nothing about -fragmentation. */ -static size_t xFreeBytesRemaining; - -/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */ - -/* - * Insert a block into the list of free blocks - which is ordered by size of - * the block. Small blocks at the start of the list and large blocks at the end - * of the list. - */ -#define prvInsertBlockIntoFreeList( pxBlockToInsert ) \ -{ \ -xBlockLink *pxIterator; \ -size_t xBlockSize; \ - \ - xBlockSize = pxBlockToInsert->xBlockSize; \ - \ - /* Iterate through the list until a block is found that has a larger size */ \ - /* than the block we are inserting. */ \ - for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock ) \ - { \ - /* There is nothing to do here - just iterate to the correct position. */ \ - } \ - \ - /* Update the list to include the block being inserted in the correct */ \ - /* position. */ \ - pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; \ - pxIterator->pxNextFreeBlock = pxBlockToInsert; \ -} -/*-----------------------------------------------------------*/ - -#define prvHeapInit() \ -{ \ -xBlockLink *pxFirstFreeBlock; \ - \ - /* xStart is used to hold a pointer to the first item in the list of free */ \ - /* blocks. The void cast is used to prevent compiler warnings. */ \ - xStart.pxNextFreeBlock = ( void * ) xHeap.ucHeap; \ - xStart.xBlockSize = ( size_t ) 0; \ - \ - /* xEnd is used to mark the end of the list of free blocks. */ \ - xEnd.xBlockSize = configTOTAL_HEAP_SIZE; \ - xEnd.pxNextFreeBlock = NULL; \ - \ - /* To start with there is a single free block that is sized to take up the \ - entire heap space. */ \ - pxFirstFreeBlock = ( void * ) xHeap.ucHeap; \ - pxFirstFreeBlock->xBlockSize = configTOTAL_HEAP_SIZE; \ - pxFirstFreeBlock->pxNextFreeBlock = &xEnd; \ - \ - xFreeBytesRemaining = configTOTAL_HEAP_SIZE; \ -} -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink; -static portBASE_TYPE xHeapHasBeenInitialised = pdFALSE; -void *pvReturn = NULL; - - vTaskSuspendAll(); - { - /* If this is the first call to malloc then the heap will require - initialisation to setup the list of free blocks. */ - if( xHeapHasBeenInitialised == pdFALSE ) - { - prvHeapInit(); - xHeapHasBeenInitialised = pdTRUE; - } - - /* The wanted size is increased so it can contain a xBlockLink - structure in addition to the requested amount of bytes. */ - if( xWantedSize > 0 ) - { - xWantedSize += heapSTRUCT_SIZE; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - if( xWantedSize & portBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ); - } - } - - if( ( xWantedSize > 0 ) && ( xWantedSize < configTOTAL_HEAP_SIZE ) ) - { - /* Blocks are stored in byte order - traverse the list from the start - (smallest) block until one of adequate size is found. */ - pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; - while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock ) ) - { - pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; - } - - /* If we found the end marker then a block of adequate size was not found. */ - if( pxBlock != &xEnd ) - { - /* Return the memory space - jumping over the xBlockLink structure - at its start. */ - pvReturn = ( void * ) ( ( ( unsigned char * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE ); - - /* This block is being returned for use so must be taken our of the - list of free blocks. */ - pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; - - /* If the block is larger than required it can be split into two. */ - if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) - { - /* This block is to be split into two. Create a new block - following the number of bytes requested. The void cast is - used to prevent byte alignment warnings from the compiler. */ - pxNewBlockLink = ( void * ) ( ( ( unsigned char * ) pxBlock ) + xWantedSize ); - - /* Calculate the sizes of two blocks split from the single - block. */ - pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; - - /* Insert the new block into the list of free blocks. */ - prvInsertBlockIntoFreeList( ( pxNewBlockLink ) ); - } - - xFreeBytesRemaining -= xWantedSize; - } - } - } - xTaskResumeAll(); - - #if( configUSE_MALLOC_FAILED_HOOK == 1 ) - { - if( pvReturn == NULL ) - { - extern void vApplicationMallocFailedHook( void ); - vApplicationMallocFailedHook(); - } - } - #endif - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ -unsigned char *puc = ( unsigned char * ) pv; -xBlockLink *pxLink; - - if( pv ) - { - /* The memory being freed will have an xBlockLink structure immediately - before it. */ - puc -= heapSTRUCT_SIZE; - - /* This casting is to keep the compiler from issuing warnings. */ - pxLink = ( void * ) puc; - - vTaskSuspendAll(); - { - /* Add this block to the list of free blocks. */ - prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) ); - xFreeBytesRemaining += pxLink->xBlockSize; - } - xTaskResumeAll(); - } -} -/*-----------------------------------------------------------*/ - -size_t xPortGetFreeHeapSize( void ) -{ - return xFreeBytesRemaining; -} -/*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* This just exists to keep the linker quiet. */ -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/MemMang/heap_3.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/MemMang/heap_3.c deleted file mode 100644 index c817c0e1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/MemMang/heap_3.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - - -/* - * Implementation of pvPortMalloc() and vPortFree() that relies on the - * compilers own malloc() and free() implementations. - * - * This file can only be used if the linker is configured to to generate - * a heap memory area. - * - * See heap_2.c and heap_1.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ - -#include - -/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining -all the API functions to use the MPU wrappers. That should only be done when -task.h is included from an application file. */ -#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -#include "FreeRTOS.h" -#include "task.h" - -#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn; - - vTaskSuspendAll(); - { - pvReturn = malloc( xWantedSize ); - } - xTaskResumeAll(); - - #if( configUSE_MALLOC_FAILED_HOOK == 1 ) - { - if( pvReturn == NULL ) - { - extern void vApplicationMallocFailedHook( void ); - vApplicationMallocFailedHook(); - } - } - #endif - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - if( pv ) - { - vTaskSuspendAll(); - { - free( pv ); - } - xTaskResumeAll(); - } -} - -/*-----------------------------------------------------------*/ - -size_t xPortGetFreeHeapSize( void ) -{ - return 0 ; -} -/*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* This just exists to keep the linker quiet. */ -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/RVDS/ARM_CM3/port.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/RVDS/ARM_CM3/port.c deleted file mode 100644 index c2409162..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/RVDS/ARM_CM3/port.c +++ /dev/null @@ -1,296 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -/*----------------------------------------------------------- - * Implementation of functions defined in portable.h for the ARM CM3 port. - *----------------------------------------------------------*/ - -/* Scheduler includes. */ -#include "FreeRTOS.h" -#include "task.h" - -#ifndef configKERNEL_INTERRUPT_PRIORITY - #define configKERNEL_INTERRUPT_PRIORITY 255 -#endif - -/* Constants required to manipulate the NVIC. */ -#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 ) -#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 ) -#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 ) -#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 ) -#define portNVIC_SYSTICK_CLK 0x00000004 -#define portNVIC_SYSTICK_INT 0x00000002 -#define portNVIC_SYSTICK_ENABLE 0x00000001 -#define portNVIC_PENDSVSET 0x10000000 -#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 ) -#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 ) - -/* Constants required to set up the initial stack. */ -#define portINITIAL_XPSR ( 0x01000000 ) - -/* Each task maintains its own interrupt status in the critical nesting -variable. */ -static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa; - -/* - * Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ); - -/* - * Exception handlers. - */ -void xPortPendSVHandler( void ); -void xPortSysTickHandler( void ); -void vPortSVCHandler( void ); - -/* - * Start first task is a separate function so it can be tested in isolation. - */ -void vPortStartFirstTask( void ); - -/*-----------------------------------------------------------*/ - -/* - * See header file for description. - */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) -{ - /* Simulate the stack frame as it would be created by a context switch - interrupt. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */ - pxTopOfStack--; - *pxTopOfStack = 0; /* LR */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */ - pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ - - return pxTopOfStack; -} -/*-----------------------------------------------------------*/ - -//__asm void vPortSVCHandler( void ) -__asm void SVC_Handler( void ) -{ - PRESERVE8 - - ldr r3, =pxCurrentTCB /* Restore the context. */ - ldr r1, [r3] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */ - ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */ - ldmia r0!, {r4-r11} /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */ - msr psp, r0 /* Restore the task stack pointer. */ - mov r0, #0 - msr basepri, r0 - orr r14, #0xd - bx r14 -} -/*-----------------------------------------------------------*/ - -__asm void vPortStartFirstTask( void ) -{ - PRESERVE8 - - /* Use the NVIC offset register to locate the stack. */ - ldr r0, =0xE000ED08 - ldr r0, [r0] - ldr r0, [r0] - /* Set the msp back to the start of the stack. */ - msr msp, r0 - /* Call SVC to start the first task. */ - svc 0 -} -/*-----------------------------------------------------------*/ - -/* - * See header file for description. - */ -portBASE_TYPE xPortStartScheduler( void ) -{ - /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */ - *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI; - *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI; - - /* Start the timer that generates the tick ISR. Interrupts are disabled - here already. */ - prvSetupTimerInterrupt(); - - /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; - - /* Start the first task. */ - vPortStartFirstTask(); - - /* Should not get here! */ - return 0; -} -/*-----------------------------------------------------------*/ - -void vPortEndScheduler( void ) -{ - /* It is unlikely that the CM3 port will require this function as there - is nothing to return to. */ -} -/*-----------------------------------------------------------*/ - -void vPortYieldFromISR( void ) -{ - /* Set a PendSV to request a context switch. */ - *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; -} -/*-----------------------------------------------------------*/ - -void vPortEnterCritical( void ) -{ - portDISABLE_INTERRUPTS(); - uxCriticalNesting++; -} -/*-----------------------------------------------------------*/ - -void vPortExitCritical( void ) -{ - uxCriticalNesting--; - if( uxCriticalNesting == 0 ) - { - portENABLE_INTERRUPTS(); - } -} -/*-----------------------------------------------------------*/ - -//__asm void xPortPendSVHandler( void ) -__asm void PendSV_Handler( void ) -{ - extern uxCriticalNesting; - extern pxCurrentTCB; - extern vTaskSwitchContext; - - PRESERVE8 - - mrs r0, psp - - ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */ - ldr r2, [r3] - - stmdb r0!, {r4-r11} /* Save the remaining registers. */ - str r0, [r2] /* Save the new top of stack into the first member of the TCB. */ - - stmdb sp!, {r3, r14} - mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY - msr basepri, r0 - bl vTaskSwitchContext - mov r0, #0 - msr basepri, r0 - ldmia sp!, {r3, r14} - - ldr r1, [r3] - ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */ - ldmia r0!, {r4-r11} /* Pop the registers and the critical nesting count. */ - msr psp, r0 - bx r14 - nop -} -/*-----------------------------------------------------------*/ - -void xPortSysTickHandler( void ) -{ -unsigned long ulDummy; - - /* If using preemption, also force a context switch. */ - #if configUSE_PREEMPTION == 1 - *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; - #endif - - ulDummy = portSET_INTERRUPT_MASK_FROM_ISR(); - { - vTaskIncrementTick(); - } - portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy ); -} -/*-----------------------------------------------------------*/ - -/* - * Setup the systick timer to generate the tick interrupts at the required - * frequency. - */ -void prvSetupTimerInterrupt( void ) -{ - /* Configure SysTick to interrupt at the requested rate. */ - *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE; -} -/*-----------------------------------------------------------*/ - -__asm void vPortSetInterruptMask( void ) -{ - PRESERVE8 - - push { r0 } - mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY - msr basepri, r0 - pop { r0 } - bx r14 -} - -/*-----------------------------------------------------------*/ - -__asm void vPortClearInterruptMask( void ) -{ - PRESERVE8 - - push { r0 } - mov r0, #0 - msr basepri, r0 - pop { r0 } - bx r14 -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/RVDS/ARM_CM3/portmacro.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/RVDS/ARM_CM3/portmacro.h deleted file mode 100644 index 2dbeb203..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/RVDS/ARM_CM3/portmacro.h +++ /dev/null @@ -1,133 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - - -#ifndef PORTMACRO_H -#define PORTMACRO_H - -#ifdef __cplusplus -extern "C" { -#endif - -/*----------------------------------------------------------- - * Port specific definitions. - * - * The settings in this file configure FreeRTOS correctly for the - * given hardware and compiler. - * - * These settings should not be altered. - *----------------------------------------------------------- - */ - -/* Type definitions. */ -#define portCHAR char -#define portFLOAT float -#define portDOUBLE double -#define portLONG long -#define portSHORT short -#define portSTACK_TYPE unsigned portLONG -#define portBASE_TYPE long - -#if( configUSE_16_BIT_TICKS == 1 ) - typedef unsigned portSHORT portTickType; - #define portMAX_DELAY ( portTickType ) 0xffff -#else - typedef unsigned portLONG portTickType; - #define portMAX_DELAY ( portTickType ) 0xffffffff -#endif -/*-----------------------------------------------------------*/ - -/* Architecture specifics. */ -#define portSTACK_GROWTH ( -1 ) -#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) -#define portBYTE_ALIGNMENT 8 -/*-----------------------------------------------------------*/ - - -/* Scheduler utilities. */ -extern void vPortYield( void ); -extern void vPortYieldFromISR( void ); - -#define portYIELD() vPortYieldFromISR() -#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR() -/*-----------------------------------------------------------*/ - - -/* Critical section management. */ - -extern void vPortSetInterruptMask( void ); -extern void vPortClearInterruptMask( void ); -extern void vPortEnterCritical( void ); -extern void vPortExitCritical( void ); - -#define portDISABLE_INTERRUPTS() vPortSetInterruptMask() -#define portENABLE_INTERRUPTS() vPortClearInterruptMask() -#define portENTER_CRITICAL() vPortEnterCritical() -#define portEXIT_CRITICAL() vPortExitCritical() -#define portSET_INTERRUPT_MASK_FROM_ISR() 0;vPortSetInterruptMask() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask();(void)x - -/*-----------------------------------------------------------*/ - -/* Task function macros as described on the FreeRTOS.org WEB site. */ -#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) -#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) - -#define portNOP() - -#ifdef __cplusplus -} -#endif - -#endif /* PORTMACRO_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/readme.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/readme.txt deleted file mode 100644 index 43e7c1d5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/portable/readme.txt +++ /dev/null @@ -1,19 +0,0 @@ -Each real time kernel port consists of three files that contain the core kernel -components and are common to every port, and one or more files that are -specific to a particular microcontroller and/or compiler. - - -+ The FreeRTOS/Source/Portable/MemMang directory contains the three sample -memory allocators as described on the http://www.FreeRTOS.org WEB site. - -+ The other directories each contain files specific to a particular -microcontroller or compiler. - - - -For example, if you are interested in the GCC port for the ATMega323 -microcontroller then the port specific files are contained in -FreeRTOS/Source/Portable/GCC/ATMega323 directory. If this is the only -port you are interested in then all the other directories can be -ignored. - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/queue.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/queue.c deleted file mode 100644 index 69ea2bde..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/queue.c +++ /dev/null @@ -1,1465 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -#include -#include - -/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining -all the API functions to use the MPU wrappers. That should only be done when -task.h is included from an application file. */ -#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -/* Constants used with the cRxLock and cTxLock structure members. */ -#define queueUNLOCKED ( ( signed portBASE_TYPE ) -1 ) -#define queueLOCKED_UNMODIFIED ( ( signed portBASE_TYPE ) 0 ) - -#define queueERRONEOUS_UNBLOCK ( -1 ) - -/* For internal use only. */ -#define queueSEND_TO_BACK ( 0 ) -#define queueSEND_TO_FRONT ( 1 ) - -/* Effectively make a union out of the xQUEUE structure. */ -#define pxMutexHolder pcTail -#define uxQueueType pcHead -#define uxRecursiveCallCount pcReadFrom -#define queueQUEUE_IS_MUTEX NULL - -/* Semaphores do not actually store or copy data, so have an items size of -zero. */ -#define queueSEMAPHORE_QUEUE_ITEM_LENGTH ( 0 ) -#define queueDONT_BLOCK ( ( portTickType ) 0 ) -#define queueMUTEX_GIVE_BLOCK_TIME ( ( portTickType ) 0 ) - -/* - * Definition of the queue used by the scheduler. - * Items are queued by copy, not reference. - */ -typedef struct QueueDefinition -{ - signed char *pcHead; /*< Points to the beginning of the queue storage area. */ - signed char *pcTail; /*< Points to the byte at the end of the queue storage area. Once more byte is allocated than necessary to store the queue items, this is used as a marker. */ - - signed char *pcWriteTo; /*< Points to the free next place in the storage area. */ - signed char *pcReadFrom; /*< Points to the last place that a queued item was read from. */ - - xList xTasksWaitingToSend; /*< List of tasks that are blocked waiting to post onto this queue. Stored in priority order. */ - xList xTasksWaitingToReceive; /*< List of tasks that are blocked waiting to read from this queue. Stored in priority order. */ - - volatile unsigned portBASE_TYPE uxMessagesWaiting;/*< The number of items currently in the queue. */ - unsigned portBASE_TYPE uxLength; /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */ - unsigned portBASE_TYPE uxItemSize; /*< The size of each items that the queue will hold. */ - - signed portBASE_TYPE xRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ - signed portBASE_TYPE xTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ - -} xQUEUE; -/*-----------------------------------------------------------*/ - -/* - * Inside this file xQueueHandle is a pointer to a xQUEUE structure. - * To keep the definition private the API header file defines it as a - * pointer to void. - */ -typedef xQUEUE * xQueueHandle; - -/* - * Prototypes for public functions are included here so we don't have to - * include the API header file (as it defines xQueueHandle differently). These - * functions are documented in the API header file. - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ) PRIVILEGED_FUNCTION; -signed portBASE_TYPE xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition ) PRIVILEGED_FUNCTION; -unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle pxQueue ) PRIVILEGED_FUNCTION; -void vQueueDelete( xQueueHandle xQueue ) PRIVILEGED_FUNCTION; -signed portBASE_TYPE xQueueGenericSendFromISR( xQueueHandle pxQueue, const void * const pvItemToQueue, signed portBASE_TYPE *pxHigherPriorityTaskWoken, portBASE_TYPE xCopyPosition ) PRIVILEGED_FUNCTION; -signed portBASE_TYPE xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking ) PRIVILEGED_FUNCTION; -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void * const pvBuffer, signed portBASE_TYPE *pxTaskWoken ) PRIVILEGED_FUNCTION; -xQueueHandle xQueueCreateMutex( void ) PRIVILEGED_FUNCTION; -xQueueHandle xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount ) PRIVILEGED_FUNCTION; -portBASE_TYPE xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime ) PRIVILEGED_FUNCTION; -portBASE_TYPE xQueueGiveMutexRecursive( xQueueHandle xMutex ) PRIVILEGED_FUNCTION; -signed portBASE_TYPE xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition ) PRIVILEGED_FUNCTION; -signed portBASE_TYPE xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking ) PRIVILEGED_FUNCTION; -signed portBASE_TYPE xQueueIsQueueEmptyFromISR( const xQueueHandle pxQueue ) PRIVILEGED_FUNCTION; -signed portBASE_TYPE xQueueIsQueueFullFromISR( const xQueueHandle pxQueue ) PRIVILEGED_FUNCTION; -unsigned portBASE_TYPE uxQueueMessagesWaitingFromISR( const xQueueHandle pxQueue ) PRIVILEGED_FUNCTION; - -/* - * Co-routine queue functions differ from task queue functions. Co-routines are - * an optional component. - */ -#if configUSE_CO_ROUTINES == 1 - signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ) PRIVILEGED_FUNCTION; - signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ) PRIVILEGED_FUNCTION; - signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) PRIVILEGED_FUNCTION; - signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) PRIVILEGED_FUNCTION; -#endif - -/* - * The queue registry is just a means for kernel aware debuggers to locate - * queue structures. It has no other purpose so is an optional component. - */ -#if configQUEUE_REGISTRY_SIZE > 0 - - /* The type stored within the queue registry array. This allows a name - to be assigned to each queue making kernel aware debugging a little - more user friendly. */ - typedef struct QUEUE_REGISTRY_ITEM - { - signed char *pcQueueName; - xQueueHandle xHandle; - } xQueueRegistryItem; - - /* The queue registry is simply an array of xQueueRegistryItem structures. - The pcQueueName member of a structure being NULL is indicative of the - array position being vacant. */ - xQueueRegistryItem xQueueRegistry[ configQUEUE_REGISTRY_SIZE ]; - - /* Removes a queue from the registry by simply setting the pcQueueName - member to NULL. */ - static void vQueueUnregisterQueue( xQueueHandle xQueue ) PRIVILEGED_FUNCTION; - void vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcQueueName ) PRIVILEGED_FUNCTION; -#endif - -/* - * Unlocks a queue locked by a call to prvLockQueue. Locking a queue does not - * prevent an ISR from adding or removing items to the queue, but does prevent - * an ISR from removing tasks from the queue event lists. If an ISR finds a - * queue is locked it will instead increment the appropriate queue lock count - * to indicate that a task may require unblocking. When the queue in unlocked - * these lock counts are inspected, and the appropriate action taken. - */ -static void prvUnlockQueue( xQueueHandle pxQueue ) PRIVILEGED_FUNCTION; - -/* - * Uses a critical section to determine if there is any data in a queue. - * - * @return pdTRUE if the queue contains no items, otherwise pdFALSE. - */ -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ) PRIVILEGED_FUNCTION; - -/* - * Uses a critical section to determine if there is any space in a queue. - * - * @return pdTRUE if there is no space, otherwise pdFALSE; - */ -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ) PRIVILEGED_FUNCTION; - -/* - * Copies an item into the queue, either at the front of the queue or the - * back of the queue. - */ -static void prvCopyDataToQueue( xQUEUE *pxQueue, const void *pvItemToQueue, portBASE_TYPE xPosition ) PRIVILEGED_FUNCTION; - -/* - * Copies an item out of a queue. - */ -static void prvCopyDataFromQueue( xQUEUE * const pxQueue, const void *pvBuffer ) PRIVILEGED_FUNCTION; -/*-----------------------------------------------------------*/ - -/* - * Macro to mark a queue as locked. Locking a queue prevents an ISR from - * accessing the queue event lists. - */ -#define prvLockQueue( pxQueue ) \ -{ \ - taskENTER_CRITICAL(); \ - { \ - if( pxQueue->xRxLock == queueUNLOCKED ) \ - { \ - pxQueue->xRxLock = queueLOCKED_UNMODIFIED; \ - } \ - if( pxQueue->xTxLock == queueUNLOCKED ) \ - { \ - pxQueue->xTxLock = queueLOCKED_UNMODIFIED; \ - } \ - } \ - taskEXIT_CRITICAL(); \ -} -/*-----------------------------------------------------------*/ - - -/*----------------------------------------------------------- - * PUBLIC QUEUE MANAGEMENT API documented in queue.h - *----------------------------------------------------------*/ - -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ) -{ -xQUEUE *pxNewQueue; -size_t xQueueSizeInBytes; - - /* Allocate the new queue structure. */ - if( uxQueueLength > ( unsigned portBASE_TYPE ) 0 ) - { - pxNewQueue = ( xQUEUE * ) pvPortMalloc( sizeof( xQUEUE ) ); - if( pxNewQueue != NULL ) - { - /* Create the list of pointers to queue items. The queue is one byte - longer than asked for to make wrap checking easier/faster. */ - xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ) + ( size_t ) 1; - - pxNewQueue->pcHead = ( signed char * ) pvPortMalloc( xQueueSizeInBytes ); - if( pxNewQueue->pcHead != NULL ) - { - /* Initialise the queue members as described above where the - queue type is defined. */ - pxNewQueue->pcTail = pxNewQueue->pcHead + ( uxQueueLength * uxItemSize ); - pxNewQueue->uxMessagesWaiting = 0; - pxNewQueue->pcWriteTo = pxNewQueue->pcHead; - pxNewQueue->pcReadFrom = pxNewQueue->pcHead + ( ( uxQueueLength - 1 ) * uxItemSize ); - pxNewQueue->uxLength = uxQueueLength; - pxNewQueue->uxItemSize = uxItemSize; - pxNewQueue->xRxLock = queueUNLOCKED; - pxNewQueue->xTxLock = queueUNLOCKED; - - /* Likewise ensure the event queues start with the correct state. */ - vListInitialise( &( pxNewQueue->xTasksWaitingToSend ) ); - vListInitialise( &( pxNewQueue->xTasksWaitingToReceive ) ); - - traceQUEUE_CREATE( pxNewQueue ); - return pxNewQueue; - } - else - { - traceQUEUE_CREATE_FAILED(); - vPortFree( pxNewQueue ); - } - } - } - - /* Will only reach here if we could not allocate enough memory or no memory - was required. */ - return NULL; -} -/*-----------------------------------------------------------*/ - -#if ( configUSE_MUTEXES == 1 ) - - xQueueHandle xQueueCreateMutex( void ) - { - xQUEUE *pxNewQueue; - - /* Allocate the new queue structure. */ - pxNewQueue = ( xQUEUE * ) pvPortMalloc( sizeof( xQUEUE ) ); - if( pxNewQueue != NULL ) - { - /* Information required for priority inheritance. */ - pxNewQueue->pxMutexHolder = NULL; - pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX; - - /* Queues used as a mutex no data is actually copied into or out - of the queue. */ - pxNewQueue->pcWriteTo = NULL; - pxNewQueue->pcReadFrom = NULL; - - /* Each mutex has a length of 1 (like a binary semaphore) and - an item size of 0 as nothing is actually copied into or out - of the mutex. */ - pxNewQueue->uxMessagesWaiting = 0; - pxNewQueue->uxLength = 1; - pxNewQueue->uxItemSize = 0; - pxNewQueue->xRxLock = queueUNLOCKED; - pxNewQueue->xTxLock = queueUNLOCKED; - - /* Ensure the event queues start with the correct state. */ - vListInitialise( &( pxNewQueue->xTasksWaitingToSend ) ); - vListInitialise( &( pxNewQueue->xTasksWaitingToReceive ) ); - - /* Start with the semaphore in the expected state. */ - xQueueGenericSend( pxNewQueue, NULL, 0, queueSEND_TO_BACK ); - - traceCREATE_MUTEX( pxNewQueue ); - } - else - { - traceCREATE_MUTEX_FAILED(); - } - - return pxNewQueue; - } - -#endif /* configUSE_MUTEXES */ -/*-----------------------------------------------------------*/ - -#if configUSE_RECURSIVE_MUTEXES == 1 - - portBASE_TYPE xQueueGiveMutexRecursive( xQueueHandle pxMutex ) - { - portBASE_TYPE xReturn; - - /* If this is the task that holds the mutex then pxMutexHolder will not - change outside of this task. If this task does not hold the mutex then - pxMutexHolder can never coincidentally equal the tasks handle, and as - this is the only condition we are interested in it does not matter if - pxMutexHolder is accessed simultaneously by another task. Therefore no - mutual exclusion is required to test the pxMutexHolder variable. */ - if( pxMutex->pxMutexHolder == xTaskGetCurrentTaskHandle() ) - { - traceGIVE_MUTEX_RECURSIVE( pxMutex ); - - /* uxRecursiveCallCount cannot be zero if pxMutexHolder is equal to - the task handle, therefore no underflow check is required. Also, - uxRecursiveCallCount is only modified by the mutex holder, and as - there can only be one, no mutual exclusion is required to modify the - uxRecursiveCallCount member. */ - ( pxMutex->uxRecursiveCallCount )--; - - /* Have we unwound the call count? */ - if( pxMutex->uxRecursiveCallCount == 0 ) - { - /* Return the mutex. This will automatically unblock any other - task that might be waiting to access the mutex. */ - xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK ); - } - - xReturn = pdPASS; - } - else - { - /* We cannot give the mutex because we are not the holder. */ - xReturn = pdFAIL; - - traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ); - } - - return xReturn; - } - -#endif /* configUSE_RECURSIVE_MUTEXES */ -/*-----------------------------------------------------------*/ - -#if configUSE_RECURSIVE_MUTEXES == 1 - - portBASE_TYPE xQueueTakeMutexRecursive( xQueueHandle pxMutex, portTickType xBlockTime ) - { - portBASE_TYPE xReturn; - - /* Comments regarding mutual exclusion as per those within - xQueueGiveMutexRecursive(). */ - - traceTAKE_MUTEX_RECURSIVE( pxMutex ); - - if( pxMutex->pxMutexHolder == xTaskGetCurrentTaskHandle() ) - { - ( pxMutex->uxRecursiveCallCount )++; - xReturn = pdPASS; - } - else - { - xReturn = xQueueGenericReceive( pxMutex, NULL, xBlockTime, pdFALSE ); - - /* pdPASS will only be returned if we successfully obtained the mutex, - we may have blocked to reach here. */ - if( xReturn == pdPASS ) - { - ( pxMutex->uxRecursiveCallCount )++; - } - } - - return xReturn; - } - -#endif /* configUSE_RECURSIVE_MUTEXES */ -/*-----------------------------------------------------------*/ - -#if configUSE_COUNTING_SEMAPHORES == 1 - - xQueueHandle xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount ) - { - xQueueHandle pxHandle; - - pxHandle = xQueueCreate( ( unsigned portBASE_TYPE ) uxCountValue, queueSEMAPHORE_QUEUE_ITEM_LENGTH ); - - if( pxHandle != NULL ) - { - pxHandle->uxMessagesWaiting = uxInitialCount; - - traceCREATE_COUNTING_SEMAPHORE(); - } - else - { - traceCREATE_COUNTING_SEMAPHORE_FAILED(); - } - - return pxHandle; - } - -#endif /* configUSE_COUNTING_SEMAPHORES */ -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition ) -{ -signed portBASE_TYPE xEntryTimeSet = pdFALSE; -xTimeOutType xTimeOut; - - /* This function relaxes the coding standard somewhat to allow return - statements within the function itself. This is done in the interest - of execution time efficiency. */ - for( ;; ) - { - taskENTER_CRITICAL(); - { - /* Is there room on the queue now? To be running we must be - the highest priority task wanting to access the queue. */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - traceQUEUE_SEND( pxQueue ); - prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition ); - - /* If there was a task waiting for data to arrive on the - queue then unblock it now. */ - if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) == pdTRUE ) - { - /* The unblocked task has a priority higher than - our own so yield immediately. Yes it is ok to do - this from within the critical section - the kernel - takes care of that. */ - portYIELD_WITHIN_API(); - } - } - - taskEXIT_CRITICAL(); - - /* Return to the original privilege level before exiting the - function. */ - return pdPASS; - } - else - { - if( xTicksToWait == ( portTickType ) 0 ) - { - /* The queue was full and no block time is specified (or - the block time has expired) so leave now. */ - taskEXIT_CRITICAL(); - - /* Return to the original privilege level before exiting - the function. */ - traceQUEUE_SEND_FAILED( pxQueue ); - return errQUEUE_FULL; - } - else if( xEntryTimeSet == pdFALSE ) - { - /* The queue was full and a block time was specified so - configure the timeout structure. */ - vTaskSetTimeOutState( &xTimeOut ); - xEntryTimeSet = pdTRUE; - } - } - } - taskEXIT_CRITICAL(); - - /* Interrupts and other tasks can send to and receive from the queue - now the critical section has been exited. */ - - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - - /* Update the timeout state to see if it has expired yet. */ - if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - { - if( prvIsQueueFull( pxQueue ) ) - { - traceBLOCKING_ON_QUEUE_SEND( pxQueue ); - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait ); - - /* Unlocking the queue means queue events can effect the - event list. It is possible that interrupts occurring now - remove this task from the event list again - but as the - scheduler is suspended the task will go onto the pending - ready last instead of the actual ready list. */ - prvUnlockQueue( pxQueue ); - - /* Resuming the scheduler will move tasks from the pending - ready list into the ready list - so it is feasible that this - task is already in a ready list before it yields - in which - case the yield will not cause a context switch unless there - is also a higher priority task in the pending ready list. */ - if( !xTaskResumeAll() ) - { - portYIELD_WITHIN_API(); - } - } - else - { - /* Try again. */ - prvUnlockQueue( pxQueue ); - ( void ) xTaskResumeAll(); - } - } - else - { - /* The timeout has expired. */ - prvUnlockQueue( pxQueue ); - ( void ) xTaskResumeAll(); - - /* Return to the original privilege level before exiting the - function. */ - traceQUEUE_SEND_FAILED( pxQueue ); - return errQUEUE_FULL; - } - } -} -/*-----------------------------------------------------------*/ - -#if configUSE_ALTERNATIVE_API == 1 - - signed portBASE_TYPE xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition ) - { - signed portBASE_TYPE xEntryTimeSet = pdFALSE; - xTimeOutType xTimeOut; - - for( ;; ) - { - taskENTER_CRITICAL(); - { - /* Is there room on the queue now? To be running we must be - the highest priority task wanting to access the queue. */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - traceQUEUE_SEND( pxQueue ); - prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition ); - - /* If there was a task waiting for data to arrive on the - queue then unblock it now. */ - if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) == pdTRUE ) - { - /* The unblocked task has a priority higher than - our own so yield immediately. */ - portYIELD_WITHIN_API(); - } - } - - taskEXIT_CRITICAL(); - return pdPASS; - } - else - { - if( xTicksToWait == ( portTickType ) 0 ) - { - taskEXIT_CRITICAL(); - return errQUEUE_FULL; - } - else if( xEntryTimeSet == pdFALSE ) - { - vTaskSetTimeOutState( &xTimeOut ); - xEntryTimeSet = pdTRUE; - } - } - } - taskEXIT_CRITICAL(); - - taskENTER_CRITICAL(); - { - if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - { - if( prvIsQueueFull( pxQueue ) ) - { - traceBLOCKING_ON_QUEUE_SEND( pxQueue ); - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait ); - portYIELD_WITHIN_API(); - } - } - else - { - taskEXIT_CRITICAL(); - traceQUEUE_SEND_FAILED( pxQueue ); - return errQUEUE_FULL; - } - } - taskEXIT_CRITICAL(); - } - } - -#endif /* configUSE_ALTERNATIVE_API */ -/*-----------------------------------------------------------*/ - -#if configUSE_ALTERNATIVE_API == 1 - - signed portBASE_TYPE xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking ) - { - signed portBASE_TYPE xEntryTimeSet = pdFALSE; - xTimeOutType xTimeOut; - signed char *pcOriginalReadPosition; - - for( ;; ) - { - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Remember our read position in case we are just peeking. */ - pcOriginalReadPosition = pxQueue->pcReadFrom; - - prvCopyDataFromQueue( pxQueue, pvBuffer ); - - if( xJustPeeking == pdFALSE ) - { - traceQUEUE_RECEIVE( pxQueue ); - - /* We are actually removing data. */ - --( pxQueue->uxMessagesWaiting ); - - #if ( configUSE_MUTEXES == 1 ) - { - if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) - { - /* Record the information required to implement - priority inheritance should it become necessary. */ - pxQueue->pxMutexHolder = xTaskGetCurrentTaskHandle(); - } - } - #endif - - if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) == pdTRUE ) - { - portYIELD_WITHIN_API(); - } - } - } - else - { - traceQUEUE_PEEK( pxQueue ); - - /* We are not removing the data, so reset our read - pointer. */ - pxQueue->pcReadFrom = pcOriginalReadPosition; - - /* The data is being left in the queue, so see if there are - any other tasks waiting for the data. */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* Tasks that are removed from the event list will get added to - the pending ready list as the scheduler is still suspended. */ - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority than this task. */ - portYIELD_WITHIN_API(); - } - } - - } - - taskEXIT_CRITICAL(); - return pdPASS; - } - else - { - if( xTicksToWait == ( portTickType ) 0 ) - { - taskEXIT_CRITICAL(); - traceQUEUE_RECEIVE_FAILED( pxQueue ); - return errQUEUE_EMPTY; - } - else if( xEntryTimeSet == pdFALSE ) - { - vTaskSetTimeOutState( &xTimeOut ); - xEntryTimeSet = pdTRUE; - } - } - } - taskEXIT_CRITICAL(); - - taskENTER_CRITICAL(); - { - if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - { - if( prvIsQueueEmpty( pxQueue ) ) - { - traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ); - - #if ( configUSE_MUTEXES == 1 ) - { - if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) - { - portENTER_CRITICAL(); - vTaskPriorityInherit( ( void * ) pxQueue->pxMutexHolder ); - portEXIT_CRITICAL(); - } - } - #endif - - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); - portYIELD_WITHIN_API(); - } - } - else - { - taskEXIT_CRITICAL(); - traceQUEUE_RECEIVE_FAILED( pxQueue ); - return errQUEUE_EMPTY; - } - } - taskEXIT_CRITICAL(); - } - } - - -#endif /* configUSE_ALTERNATIVE_API */ -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueGenericSendFromISR( xQueueHandle pxQueue, const void * const pvItemToQueue, signed portBASE_TYPE *pxHigherPriorityTaskWoken, portBASE_TYPE xCopyPosition ) -{ -signed portBASE_TYPE xReturn; -unsigned portBASE_TYPE uxSavedInterruptStatus; - - /* Similar to xQueueGenericSend, except we don't block if there is no room - in the queue. Also we don't directly wake a task that was blocked on a - queue read, instead we return a flag to say whether a context switch is - required or not (i.e. has a task with a higher priority than us been woken - by this post). */ - uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - traceQUEUE_SEND_FROM_ISR( pxQueue ); - - prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition ); - - /* If the queue is locked we do not alter the event list. This will - be done when the queue is unlocked later. */ - if( pxQueue->xTxLock == queueUNLOCKED ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - *pxHigherPriorityTaskWoken = pdTRUE; - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was posted while it was locked. */ - ++( pxQueue->xTxLock ); - } - - xReturn = pdPASS; - } - else - { - traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ); - xReturn = errQUEUE_FULL; - } - } - portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking ) -{ -signed portBASE_TYPE xEntryTimeSet = pdFALSE; -xTimeOutType xTimeOut; -signed char *pcOriginalReadPosition; - - /* This function relaxes the coding standard somewhat to allow return - statements within the function itself. This is done in the interest - of execution time efficiency. */ - - for( ;; ) - { - taskENTER_CRITICAL(); - { - /* Is there data in the queue now? To be running we must be - the highest priority task wanting to access the queue. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Remember our read position in case we are just peeking. */ - pcOriginalReadPosition = pxQueue->pcReadFrom; - - prvCopyDataFromQueue( pxQueue, pvBuffer ); - - if( xJustPeeking == pdFALSE ) - { - traceQUEUE_RECEIVE( pxQueue ); - - /* We are actually removing data. */ - --( pxQueue->uxMessagesWaiting ); - - #if ( configUSE_MUTEXES == 1 ) - { - if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) - { - /* Record the information required to implement - priority inheritance should it become necessary. */ - pxQueue->pxMutexHolder = xTaskGetCurrentTaskHandle(); - } - } - #endif - - if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) == pdTRUE ) - { - portYIELD_WITHIN_API(); - } - } - } - else - { - traceQUEUE_PEEK( pxQueue ); - - /* We are not removing the data, so reset our read - pointer. */ - pxQueue->pcReadFrom = pcOriginalReadPosition; - - /* The data is being left in the queue, so see if there are - any other tasks waiting for the data. */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* Tasks that are removed from the event list will get added to - the pending ready list as the scheduler is still suspended. */ - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority than this task. */ - portYIELD_WITHIN_API(); - } - } - - } - - taskEXIT_CRITICAL(); - return pdPASS; - } - else - { - if( xTicksToWait == ( portTickType ) 0 ) - { - /* The queue was empty and no block time is specified (or - the block time has expired) so leave now. */ - taskEXIT_CRITICAL(); - traceQUEUE_RECEIVE_FAILED( pxQueue ); - return errQUEUE_EMPTY; - } - else if( xEntryTimeSet == pdFALSE ) - { - /* The queue was empty and a block time was specified so - configure the timeout structure. */ - vTaskSetTimeOutState( &xTimeOut ); - xEntryTimeSet = pdTRUE; - } - } - } - taskEXIT_CRITICAL(); - - /* Interrupts and other tasks can send to and receive from the queue - now the critical section has been exited. */ - - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - - /* Update the timeout state to see if it has expired yet. */ - if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - { - if( prvIsQueueEmpty( pxQueue ) ) - { - traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ); - - #if ( configUSE_MUTEXES == 1 ) - { - if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) - { - portENTER_CRITICAL(); - { - vTaskPriorityInherit( ( void * ) pxQueue->pxMutexHolder ); - } - portEXIT_CRITICAL(); - } - } - #endif - - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); - prvUnlockQueue( pxQueue ); - if( !xTaskResumeAll() ) - { - portYIELD_WITHIN_API(); - } - } - else - { - /* Try again. */ - prvUnlockQueue( pxQueue ); - ( void ) xTaskResumeAll(); - } - } - else - { - prvUnlockQueue( pxQueue ); - ( void ) xTaskResumeAll(); - traceQUEUE_RECEIVE_FAILED( pxQueue ); - return errQUEUE_EMPTY; - } - } -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void * const pvBuffer, signed portBASE_TYPE *pxTaskWoken ) -{ -signed portBASE_TYPE xReturn; -unsigned portBASE_TYPE uxSavedInterruptStatus; - - uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); - { - /* We cannot block from an ISR, so check there is data available. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - traceQUEUE_RECEIVE_FROM_ISR( pxQueue ); - - prvCopyDataFromQueue( pxQueue, pvBuffer ); - --( pxQueue->uxMessagesWaiting ); - - /* If the queue is locked we will not modify the event list. Instead - we update the lock count so the task that unlocks the queue will know - that an ISR has removed data while the queue was locked. */ - if( pxQueue->xRxLock == queueUNLOCKED ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - /* The task waiting has a higher priority than us so - force a context switch. */ - *pxTaskWoken = pdTRUE; - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was removed while it was locked. */ - ++( pxQueue->xRxLock ); - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ); - } - } - portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle pxQueue ) -{ -unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - uxReturn = pxQueue->uxMessagesWaiting; - taskEXIT_CRITICAL(); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxQueueMessagesWaitingFromISR( const xQueueHandle pxQueue ) -{ -unsigned portBASE_TYPE uxReturn; - - uxReturn = pxQueue->uxMessagesWaiting; - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -void vQueueDelete( xQueueHandle pxQueue ) -{ - traceQUEUE_DELETE( pxQueue ); - vQueueUnregisterQueue( pxQueue ); - vPortFree( pxQueue->pcHead ); - vPortFree( pxQueue ); -} -/*-----------------------------------------------------------*/ - -static void prvCopyDataToQueue( xQUEUE *pxQueue, const void *pvItemToQueue, portBASE_TYPE xPosition ) -{ - if( pxQueue->uxItemSize == ( unsigned portBASE_TYPE ) 0 ) - { - #if ( configUSE_MUTEXES == 1 ) - { - if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) - { - /* The mutex is no longer being held. */ - vTaskPriorityDisinherit( ( void * ) pxQueue->pxMutexHolder ); - pxQueue->pxMutexHolder = NULL; - } - } - #endif - } - else if( xPosition == queueSEND_TO_BACK ) - { - memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( unsigned ) pxQueue->uxItemSize ); - pxQueue->pcWriteTo += pxQueue->uxItemSize; - if( pxQueue->pcWriteTo >= pxQueue->pcTail ) - { - pxQueue->pcWriteTo = pxQueue->pcHead; - } - } - else - { - memcpy( ( void * ) pxQueue->pcReadFrom, pvItemToQueue, ( unsigned ) pxQueue->uxItemSize ); - pxQueue->pcReadFrom -= pxQueue->uxItemSize; - if( pxQueue->pcReadFrom < pxQueue->pcHead ) - { - pxQueue->pcReadFrom = ( pxQueue->pcTail - pxQueue->uxItemSize ); - } - } - - ++( pxQueue->uxMessagesWaiting ); -} -/*-----------------------------------------------------------*/ - -static void prvCopyDataFromQueue( xQUEUE * const pxQueue, const void *pvBuffer ) -{ - if( pxQueue->uxQueueType != queueQUEUE_IS_MUTEX ) - { - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - } -} -/*-----------------------------------------------------------*/ - -static void prvUnlockQueue( xQueueHandle pxQueue ) -{ - /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */ - - /* The lock counts contains the number of extra data items placed or - removed from the queue while the queue was locked. When a queue is - locked items can be added or removed, but the event lists cannot be - updated. */ - taskENTER_CRITICAL(); - { - /* See if data was added to the queue while it was locked. */ - while( pxQueue->xTxLock > queueLOCKED_UNMODIFIED ) - { - /* Data was posted while the queue was locked. Are any tasks - blocked waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* Tasks that are removed from the event list will get added to - the pending ready list as the scheduler is still suspended. */ - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - vTaskMissedYield(); - } - - --( pxQueue->xTxLock ); - } - else - { - break; - } - } - - pxQueue->xTxLock = queueUNLOCKED; - } - taskEXIT_CRITICAL(); - - /* Do the same for the Rx lock. */ - taskENTER_CRITICAL(); - { - while( pxQueue->xRxLock > queueLOCKED_UNMODIFIED ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - vTaskMissedYield(); - } - - --( pxQueue->xRxLock ); - } - else - { - break; - } - } - - pxQueue->xRxLock = queueUNLOCKED; - } - taskEXIT_CRITICAL(); -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueIsQueueEmptyFromISR( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - xReturn = ( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 ); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == pxQueue->uxLength ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueIsQueueFullFromISR( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - xReturn = ( pxQueue->uxMessagesWaiting == pxQueue->uxLength ); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* If the queue is already full we may have to block. A critical section - is required to prevent an interrupt removing something from the queue - between the check to see if the queue is full and blocking on the queue. */ - portDISABLE_INTERRUPTS(); - { - if( prvIsQueueFull( pxQueue ) ) - { - /* The queue is full - do we want to block or just leave without - posting? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* As this is called from a coroutine we cannot block directly, but - return indicating that we need to block. */ - vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) ); - portENABLE_INTERRUPTS(); - return errQUEUE_BLOCKED; - } - else - { - portENABLE_INTERRUPTS(); - return errQUEUE_FULL; - } - } - } - portENABLE_INTERRUPTS(); - - portNOP(); - - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - /* There is room in the queue, copy the data into the queue. */ - prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK ); - xReturn = pdPASS; - - /* Were any co-routines waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* In this instance the co-routine could be placed directly - into the ready list as we are within a critical section. - Instead the same pending ready list mechanism is used as if - the event were caused from within an interrupt. */ - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The co-routine waiting has a higher priority so record - that a yield might be appropriate. */ - xReturn = errQUEUE_YIELD; - } - } - } - else - { - xReturn = errQUEUE_FULL; - } - } - portENABLE_INTERRUPTS(); - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* If the queue is already empty we may have to block. A critical section - is required to prevent an interrupt adding something to the queue - between the check to see if the queue is empty and blocking on the queue. */ - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 ) - { - /* There are no messages in the queue, do we want to block or just - leave with nothing? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* As this is a co-routine we cannot block directly, but return - indicating that we need to block. */ - vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) ); - portENABLE_INTERRUPTS(); - return errQUEUE_BLOCKED; - } - else - { - portENABLE_INTERRUPTS(); - return errQUEUE_FULL; - } - } - } - portENABLE_INTERRUPTS(); - - portNOP(); - - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Data is available from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - xReturn = pdPASS; - - /* Were any co-routines waiting for space to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - /* In this instance the co-routine could be placed directly - into the ready list as we are within a critical section. - Instead the same pending ready list mechanism is used as if - the event were caused from within an interrupt. */ - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - xReturn = errQUEUE_YIELD; - } - } - } - else - { - xReturn = pdFAIL; - } - } - portENABLE_INTERRUPTS(); - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - - - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ) -{ - /* Cannot block within an ISR so if there is no space on the queue then - exit without doing anything. */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK ); - - /* We only want to wake one co-routine per ISR, so check that a - co-routine has not already been woken. */ - if( !xCoRoutinePreviouslyWoken ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - return pdTRUE; - } - } - } - } - - return xCoRoutinePreviouslyWoken; -} -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxCoRoutineWoken ) -{ -signed portBASE_TYPE xReturn; - - /* We cannot block from an ISR, so check there is data available. If - not then just leave without doing anything. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Copy the data from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - if( !( *pxCoRoutineWoken ) ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - *pxCoRoutineWoken = pdTRUE; - } - } - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - -#if configQUEUE_REGISTRY_SIZE > 0 - - void vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcQueueName ) - { - unsigned portBASE_TYPE ux; - - /* See if there is an empty space in the registry. A NULL name denotes - a free slot. */ - for( ux = 0; ux < configQUEUE_REGISTRY_SIZE; ux++ ) - { - if( xQueueRegistry[ ux ].pcQueueName == NULL ) - { - /* Store the information on this queue. */ - xQueueRegistry[ ux ].pcQueueName = pcQueueName; - xQueueRegistry[ ux ].xHandle = xQueue; - break; - } - } - } - -#endif - /*-----------------------------------------------------------*/ - -#if configQUEUE_REGISTRY_SIZE > 0 - - static void vQueueUnregisterQueue( xQueueHandle xQueue ) - { - unsigned portBASE_TYPE ux; - - /* See if the handle of the queue being unregistered in actually in the - registry. */ - for( ux = 0; ux < configQUEUE_REGISTRY_SIZE; ux++ ) - { - if( xQueueRegistry[ ux ].xHandle == xQueue ) - { - /* Set the name to NULL to show that this slot if free again. */ - xQueueRegistry[ ux ].pcQueueName = NULL; - break; - } - } - - } - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/readme.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/readme.txt deleted file mode 100644 index 58480c56..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/readme.txt +++ /dev/null @@ -1,17 +0,0 @@ -Each real time kernel port consists of three files that contain the core kernel -components and are common to every port, and one or more files that are -specific to a particular microcontroller and or compiler. - -+ The FreeRTOS/Source directory contains the three files that are common to -every port - list.c, queue.c and tasks.c. The kernel is contained within these -three files. croutine.c implements the optional co-routine functionality - which -is normally only used on very memory limited systems. - -+ The FreeRTOS/Source/Portable directory contains the files that are specific to -a particular microcontroller and or compiler. - -+ The FreeRTOS/Source/include directory contains the real time kernel header -files. - -See the readme file in the FreeRTOS/Source/Portable directory for more -information. \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/tasks.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/tasks.c deleted file mode 100644 index ac22bf94..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/freertos/tasks.c +++ /dev/null @@ -1,2307 +0,0 @@ -/* - FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd. - - *************************************************************************** - * * - * If you are: * - * * - * + New to FreeRTOS, * - * + Wanting to learn FreeRTOS or multitasking in general quickly * - * + Looking for basic training, * - * + Wanting to improve your FreeRTOS skills and productivity * - * * - * then take a look at the FreeRTOS eBook * - * * - * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * - * http://www.FreeRTOS.org/Documentation * - * * - * A pdf reference manual is also available. Both are usually delivered * - * to your inbox within 20 minutes to two hours when purchased between 8am * - * and 8pm GMT (although please allow up to 24 hours in case of * - * exceptional circumstances). Thank you for your support! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. - ***NOTE*** The exception to the GPL is included to allow you to distribute - a combined work that includes FreeRTOS without being obliged to provide the - source code for proprietary components outside of the FreeRTOS kernel. - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. You should have received a copy of the GNU General Public - License and the FreeRTOS license exception along with FreeRTOS; if not it - can be viewed here: http://www.freertos.org/a00114.html and also obtained - by writing to Richard Barry, contact details for whom are available on the - FreeRTOS WEB site. - - 1 tab == 4 spaces! - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - - -#include -#include -#include - -/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining -all the API functions to use the MPU wrappers. That should only be done when -task.h is included from an application file. */ -#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -#include "FreeRTOS.h" -#include "task.h" -#include "StackMacros.h" - -#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -/* - * Macro to define the amount of stack available to the idle task. - */ -#define tskIDLE_STACK_SIZE configMINIMAL_STACK_SIZE - -#define tskIDLE_PRIORITY ( ( unsigned portBASE_TYPE ) 0 ) - -/* - * Task control block. A task control block (TCB) is allocated to each task, - * and stores the context of the task. - */ -typedef struct tskTaskControlBlock -{ - volatile portSTACK_TYPE *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE STRUCT. */ - - #if ( portUSING_MPU_WRAPPERS == 1 ) - xMPU_SETTINGS xMPUSettings; /*< The MPU settings are defined as part of the port layer. THIS MUST BE THE SECOND MEMBER OF THE STRUCT. */ - #endif - - xListItem xGenericListItem; /*< List item used to place the TCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the TCB in event lists. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the task where 0 is the lowest priority. */ - portSTACK_TYPE *pxStack; /*< Points to the start of the stack. */ - signed char pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */ - - #if ( portSTACK_GROWTH > 0 ) - portSTACK_TYPE *pxEndOfStack; /*< Used for stack overflow checking on architectures where the stack grows up from low memory. */ - #endif - - #if ( portCRITICAL_NESTING_IN_TCB == 1 ) - unsigned portBASE_TYPE uxCriticalNesting; - #endif - - #if ( configUSE_TRACE_FACILITY == 1 ) - unsigned portBASE_TYPE uxTCBNumber; /*< This is used for tracing the scheduler and making debugging easier only. */ - #endif - - #if ( configUSE_MUTEXES == 1 ) - unsigned portBASE_TYPE uxBasePriority; /*< The priority last assigned to the task - used by the priority inheritance mechanism. */ - #endif - - #if ( configUSE_APPLICATION_TASK_TAG == 1 ) - pdTASK_HOOK_CODE pxTaskTag; - #endif - - #if ( configGENERATE_RUN_TIME_STATS == 1 ) - unsigned long ulRunTimeCounter; /*< Used for calculating how much CPU time each task is utilising. */ - #endif - -} tskTCB; - - -/* - * Some kernel aware debuggers require data to be viewed to be global, rather - * than file scope. - */ -#ifdef portREMOVE_STATIC_QUALIFIER - #define static -#endif - -/*lint -e956 */ -PRIVILEGED_DATA tskTCB * volatile pxCurrentTCB = NULL; - -/* Lists for ready and blocked tasks. --------------------*/ - -PRIVILEGED_DATA static xList pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */ -PRIVILEGED_DATA static xList xDelayedTaskList1; /*< Delayed tasks. */ -PRIVILEGED_DATA static xList xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */ -PRIVILEGED_DATA static xList * volatile pxDelayedTaskList ; /*< Points to the delayed task list currently being used. */ -PRIVILEGED_DATA static xList * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */ -PRIVILEGED_DATA static xList xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready queue when the scheduler is resumed. */ - -#if ( INCLUDE_vTaskDelete == 1 ) - - PRIVILEGED_DATA static volatile xList xTasksWaitingTermination; /*< Tasks that have been deleted - but the their memory not yet freed. */ - PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxTasksDeleted = ( unsigned portBASE_TYPE ) 0; - -#endif - -#if ( INCLUDE_vTaskSuspend == 1 ) - - PRIVILEGED_DATA static xList xSuspendedTaskList; /*< Tasks that are currently suspended. */ - -#endif - -/* File private variables. --------------------------------*/ -PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxCurrentNumberOfTasks = ( unsigned portBASE_TYPE ) 0; -PRIVILEGED_DATA static volatile portTickType xTickCount = ( portTickType ) 0; -PRIVILEGED_DATA static unsigned portBASE_TYPE uxTopUsedPriority = tskIDLE_PRIORITY; -PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxTopReadyPriority = tskIDLE_PRIORITY; -PRIVILEGED_DATA static volatile signed portBASE_TYPE xSchedulerRunning = pdFALSE; -PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxSchedulerSuspended = ( unsigned portBASE_TYPE ) pdFALSE; -PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxMissedTicks = ( unsigned portBASE_TYPE ) 0; -PRIVILEGED_DATA static volatile portBASE_TYPE xMissedYield = ( portBASE_TYPE ) pdFALSE; -PRIVILEGED_DATA static volatile portBASE_TYPE xNumOfOverflows = ( portBASE_TYPE ) 0; -PRIVILEGED_DATA static unsigned portBASE_TYPE uxTaskNumber = ( unsigned portBASE_TYPE ) 0; - -#if ( configGENERATE_RUN_TIME_STATS == 1 ) - - PRIVILEGED_DATA static char pcStatsString[ 50 ] ; - PRIVILEGED_DATA static unsigned long ulTaskSwitchedInTime = 0UL; /*< Holds the value of a timer/counter the last time a task was switched in. */ - static void prvGenerateRunTimeStatsForTasksInList( const signed char *pcWriteBuffer, xList *pxList, unsigned long ulTotalRunTime ) PRIVILEGED_FUNCTION; - -#endif - -/* Debugging and trace facilities private variables and macros. ------------*/ - -/* - * The value used to fill the stack of a task when the task is created. This - * is used purely for checking the high water mark for tasks. - */ -#define tskSTACK_FILL_BYTE ( 0xa5 ) - -/* - * Macros used by vListTask to indicate which state a task is in. - */ -#define tskBLOCKED_CHAR ( ( signed char ) 'B' ) -#define tskREADY_CHAR ( ( signed char ) 'R' ) -#define tskDELETED_CHAR ( ( signed char ) 'D' ) -#define tskSUSPENDED_CHAR ( ( signed char ) 'S' ) - -/* - * Macros and private variables used by the trace facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define tskSIZE_OF_EACH_TRACE_LINE ( ( unsigned long ) ( sizeof( unsigned long ) + sizeof( unsigned long ) ) ) - PRIVILEGED_DATA static volatile signed char * volatile pcTraceBuffer; - PRIVILEGED_DATA static signed char *pcTraceBufferStart; - PRIVILEGED_DATA static signed char *pcTraceBufferEnd; - PRIVILEGED_DATA static signed portBASE_TYPE xTracing = pdFALSE; - static unsigned portBASE_TYPE uxPreviousTask = 255; - PRIVILEGED_DATA static char pcStatusString[ 50 ]; - -#endif - -/*-----------------------------------------------------------*/ - -/* - * Macro that writes a trace of scheduler activity to a buffer. This trace - * shows which task is running when and is very useful as a debugging tool. - * As this macro is called each context switch it is a good idea to undefine - * it if not using the facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define vWriteTraceToBuffer() \ - { \ - if( xTracing ) \ - { \ - if( uxPreviousTask != pxCurrentTCB->uxTCBNumber ) \ - { \ - if( ( pcTraceBuffer + tskSIZE_OF_EACH_TRACE_LINE ) < pcTraceBufferEnd ) \ - { \ - uxPreviousTask = pxCurrentTCB->uxTCBNumber; \ - *( unsigned long * ) pcTraceBuffer = ( unsigned long ) xTickCount; \ - pcTraceBuffer += sizeof( unsigned long ); \ - *( unsigned long * ) pcTraceBuffer = ( unsigned long ) uxPreviousTask; \ - pcTraceBuffer += sizeof( unsigned long ); \ - } \ - else \ - { \ - xTracing = pdFALSE; \ - } \ - } \ - } \ - } - -#else - - #define vWriteTraceToBuffer() - -#endif -/*-----------------------------------------------------------*/ - -/* - * Place the task represented by pxTCB into the appropriate ready queue for - * the task. It is inserted at the end of the list. One quirk of this is - * that if the task being inserted is at the same priority as the currently - * executing task, then it will only be rescheduled after the currently - * executing task has been rescheduled. - */ -#define prvAddTaskToReadyQueue( pxTCB ) \ -{ \ - if( pxTCB->uxPriority > uxTopReadyPriority ) \ - { \ - uxTopReadyPriority = pxTCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyTasksLists[ pxTCB->uxPriority ] ), &( pxTCB->xGenericListItem ) ); \ -} -/*-----------------------------------------------------------*/ - -/* - * Macro that looks at the list of tasks that are currently delayed to see if - * any require waking. - * - * Tasks are stored in the queue in the order of their wake time - meaning - * once one tasks has been found whose timer has not expired we need not look - * any further down the list. - */ -#define prvCheckDelayedTasks() \ -{ \ -register tskTCB *pxTCB; \ - \ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ) ) != NULL ) \ - { \ - if( xTickCount < listGET_LIST_ITEM_VALUE( &( pxTCB->xGenericListItem ) ) ) \ - { \ - break; \ - } \ - vListRemove( &( pxTCB->xGenericListItem ) ); \ - /* Is the task waiting on an event also? */ \ - if( pxTCB->xEventListItem.pvContainer ) \ - { \ - vListRemove( &( pxTCB->xEventListItem ) ); \ - } \ - prvAddTaskToReadyQueue( pxTCB ); \ - } \ -} -/*-----------------------------------------------------------*/ - -/* - * Several functions take an xTaskHandle parameter that can optionally be NULL, - * where NULL is used to indicate that the handle of the currently executing - * task should be used in place of the parameter. This macro simply checks to - * see if the parameter is NULL and returns a pointer to the appropriate TCB. - */ -#define prvGetTCBFromHandle( pxHandle ) ( ( pxHandle == NULL ) ? ( tskTCB * ) pxCurrentTCB : ( tskTCB * ) pxHandle ) - - -/* File private functions. --------------------------------*/ - -/* - * Utility to ready a TCB for a given task. Mainly just copies the parameters - * into the TCB structure. - */ -static void prvInitialiseTCBVariables( tskTCB *pxTCB, const signed char * const pcName, unsigned portBASE_TYPE uxPriority, const xMemoryRegion * const xRegions, unsigned short usStackDepth ) PRIVILEGED_FUNCTION; - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first task. - */ -static void prvInitialiseTaskLists( void ) PRIVILEGED_FUNCTION; - -/* - * The idle task, which as all tasks is implemented as a never ending loop. - * The idle task is automatically created and added to the ready lists upon - * creation of the first user task. - * - * The portTASK_FUNCTION_PROTO() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters ); - -/* - * Utility to free all memory allocated by the scheduler to hold a TCB, - * including the stack pointed to by the TCB. - * - * This does not free memory allocated by the task itself (i.e. memory - * allocated by calls to pvPortMalloc from within the tasks application code). - */ -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - - static void prvDeleteTCB( tskTCB *pxTCB ) PRIVILEGED_FUNCTION; - -#endif - -/* - * Used only by the idle task. This checks to see if anything has been placed - * in the list of tasks waiting to be deleted. If so the task is cleaned up - * and its TCB deleted. - */ -static void prvCheckTasksWaitingTermination( void ) PRIVILEGED_FUNCTION; - -/* - * Allocates memory from the heap for a TCB and associated stack. Checks the - * allocation was successful. - */ -static tskTCB *prvAllocateTCBAndStack( unsigned short usStackDepth, portSTACK_TYPE *puxStackBuffer ) PRIVILEGED_FUNCTION; - -/* - * Called from vTaskList. vListTasks details all the tasks currently under - * control of the scheduler. The tasks may be in one of a number of lists. - * prvListTaskWithinSingleList accepts a list and details the tasks from - * within just that list. - * - * THIS FUNCTION IS INTENDED FOR DEBUGGING ONLY, AND SHOULD NOT BE CALLED FROM - * NORMAL APPLICATION CODE. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( const signed char *pcWriteBuffer, xList *pxList, signed char cStatus ) PRIVILEGED_FUNCTION; - -#endif - -/* - * When a task is created, the stack of the task is filled with a known value. - * This function determines the 'high water mark' of the task stack by - * determining how much of the stack remains at the original preset value. - */ -#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) ) - - static unsigned short usTaskCheckFreeStackSpace( const unsigned char * pucStackByte ) PRIVILEGED_FUNCTION; - -#endif - - -/*lint +e956 */ - - - -/*----------------------------------------------------------- - * TASK CREATION API documented in task.h - *----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskGenericCreate( pdTASK_CODE pxTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions ) -{ -signed portBASE_TYPE xReturn; -tskTCB * pxNewTCB; -portBASE_TYPE xRunPrivileged; - - /* Allocate the memory required by the TCB and stack for the new task, - checking that the allocation was successful. */ - pxNewTCB = prvAllocateTCBAndStack( usStackDepth, puxStackBuffer ); - - if( pxNewTCB != NULL ) - { - portSTACK_TYPE *pxTopOfStack; - - /* Should the task be created in privileged mode? */ - if( ( uxPriority & portPRIVILEGE_BIT ) != 0x00 ) - { - xRunPrivileged = pdTRUE; - } - else - { - xRunPrivileged = pdFALSE; - } - uxPriority &= ~portPRIVILEGE_BIT; - - /* Calculate the top of stack address. This depends on whether the - stack grows from high memory to low (as per the 80x86) or visa versa. - portSTACK_GROWTH is used to make the result positive or negative as - required by the port. */ - #if( portSTACK_GROWTH < 0 ) - { - pxTopOfStack = pxNewTCB->pxStack + ( usStackDepth - 1 ); - pxTopOfStack = ( portSTACK_TYPE * ) ( ( ( unsigned long ) pxTopOfStack ) & ( ( unsigned long ) ~portBYTE_ALIGNMENT_MASK ) ); - } - #else - { - pxTopOfStack = pxNewTCB->pxStack; - - /* If we want to use stack checking on architectures that use - a positive stack growth direction then we also need to store the - other extreme of the stack space. */ - pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( usStackDepth - 1 ); - } - #endif - - /* Setup the newly allocated TCB with the initial state of the task. */ - prvInitialiseTCBVariables( pxNewTCB, pcName, uxPriority, xRegions, usStackDepth ); - - /* Initialize the TCB stack to look as if the task was already running, - but had been interrupted by the scheduler. The return address is set - to the start of the task function. Once the stack has been initialised - the top of stack variable is updated. */ - #if( portUSING_MPU_WRAPPERS == 1 ) - { - pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters, xRunPrivileged ); - } - #else - { - pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters ); - ( void ) xRunPrivileged; - } - #endif - - /* We are going to manipulate the task queues to add this task to a - ready list, so must make sure no interrupts occur. */ - portENTER_CRITICAL(); - { - uxCurrentNumberOfTasks++; - if( uxCurrentNumberOfTasks == ( unsigned portBASE_TYPE ) 1 ) - { - /* As this is the first task it must also be the current task. */ - pxCurrentTCB = pxNewTCB; - - /* This is the first task to be created so do the preliminary - initialisation required. We will not recover if this call - fails, but we will report the failure. */ - prvInitialiseTaskLists(); - } - else - { - /* If the scheduler is not already running, make this task the - current task if it is the highest priority task to be created - so far. */ - if( xSchedulerRunning == pdFALSE ) - { - if( pxCurrentTCB->uxPriority <= uxPriority ) - { - pxCurrentTCB = pxNewTCB; - } - } - } - - /* Remember the top priority to make context switching faster. Use - the priority in pxNewTCB as this has been capped to a valid value. */ - if( pxNewTCB->uxPriority > uxTopUsedPriority ) - { - uxTopUsedPriority = pxNewTCB->uxPriority; - } - - #if ( configUSE_TRACE_FACILITY == 1 ) - { - /* Add a counter into the TCB for tracing only. */ - pxNewTCB->uxTCBNumber = uxTaskNumber; - } - #endif - uxTaskNumber++; - - prvAddTaskToReadyQueue( pxNewTCB ); - - xReturn = pdPASS; - traceTASK_CREATE( pxNewTCB ); - } - portEXIT_CRITICAL(); - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - traceTASK_CREATE_FAILED( pxNewTCB ); - } - - if( xReturn == pdPASS ) - { - if( ( void * ) pxCreatedTask != NULL ) - { - /* Pass the TCB out - in an anonymous way. The calling function/ - task can use this as a handle to delete the task later if - required.*/ - *pxCreatedTask = ( xTaskHandle ) pxNewTCB; - } - - if( xSchedulerRunning != pdFALSE ) - { - /* If the created task is of a higher priority than the current task - then it should run now. */ - if( pxCurrentTCB->uxPriority < uxPriority ) - { - portYIELD_WITHIN_API(); - } - } - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelete == 1 ) - - void vTaskDelete( xTaskHandle pxTaskToDelete ) - { - tskTCB *pxTCB; - - portENTER_CRITICAL(); - { - /* Ensure a yield is performed if the current task is being - deleted. */ - if( pxTaskToDelete == pxCurrentTCB ) - { - pxTaskToDelete = NULL; - } - - /* If null is passed in here then we are deleting ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToDelete ); - - /* Remove task from the ready list and place in the termination list. - This will stop the task from be scheduled. The idle task will check - the termination list and free up any memory allocated by the - scheduler for the TCB and stack. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xTasksWaitingTermination, &( pxTCB->xGenericListItem ) ); - - /* Increment the ucTasksDeleted variable so the idle task knows - there is a task that has been deleted and that it should therefore - check the xTasksWaitingTermination list. */ - ++uxTasksDeleted; - - /* Increment the uxTaskNumberVariable also so kernel aware debuggers - can detect that the task lists need re-generating. */ - uxTaskNumber++; - - traceTASK_DELETE( pxTCB ); - } - portEXIT_CRITICAL(); - - /* Force a reschedule if we have just deleted the current task. */ - if( xSchedulerRunning != pdFALSE ) - { - if( ( void * ) pxTaskToDelete == NULL ) - { - portYIELD_WITHIN_API(); - } - } - } - -#endif - - - - - - -/*----------------------------------------------------------- - * TASK CONTROL API documented in task.h - *----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelayUntil == 1 ) - - void vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement ) - { - portTickType xTimeToWake; - portBASE_TYPE xAlreadyYielded, xShouldDelay = pdFALSE; - - vTaskSuspendAll(); - { - /* Generate the tick time at which the task wants to wake. */ - xTimeToWake = *pxPreviousWakeTime + xTimeIncrement; - - if( xTickCount < *pxPreviousWakeTime ) - { - /* The tick count has overflowed since this function was - lasted called. In this case the only time we should ever - actually delay is if the wake time has also overflowed, - and the wake time is greater than the tick time. When this - is the case it is as if neither time had overflowed. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - else - { - /* The tick time has not overflowed. In this case we will - delay if either the wake time has overflowed, and/or the - tick time is less than the wake time. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - - /* Update the wake time ready for the next call. */ - *pxPreviousWakeTime = xTimeToWake; - - if( xShouldDelay ) - { - traceTASK_DELAY_UNTIL(); - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - } - xAlreadyYielded = xTaskResumeAll(); - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - portYIELD_WITHIN_API(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelay == 1 ) - - void vTaskDelay( portTickType xTicksToDelay ) - { - portTickType xTimeToWake; - signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* A delay time of zero just forces a reschedule. */ - if( xTicksToDelay > ( portTickType ) 0 ) - { - vTaskSuspendAll(); - { - traceTASK_DELAY(); - - /* A task that is removed from the event list while the - scheduler is suspended will not get placed in the ready - list or removed from the blocked list until the scheduler - is resumed. - - This task cannot be in an event list as it is the currently - executing task. */ - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - xAlreadyYielded = xTaskResumeAll(); - } - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - portYIELD_WITHIN_API(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_uxTaskPriorityGet == 1 ) - - unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxReturn; - - portENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxReturn = pxTCB->uxPriority; - } - portEXIT_CRITICAL(); - - return uxReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskPrioritySet == 1 ) - - void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxCurrentPriority, xYieldRequired = pdFALSE; - - /* Ensure the new priority is valid. */ - if( uxNewPriority >= configMAX_PRIORITIES ) - { - uxNewPriority = configMAX_PRIORITIES - 1; - } - - portENTER_CRITICAL(); - { - if( pxTask == pxCurrentTCB ) - { - pxTask = NULL; - } - - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - - traceTASK_PRIORITY_SET( pxTask, uxNewPriority ); - - #if ( configUSE_MUTEXES == 1 ) - { - uxCurrentPriority = pxTCB->uxBasePriority; - } - #else - { - uxCurrentPriority = pxTCB->uxPriority; - } - #endif - - if( uxCurrentPriority != uxNewPriority ) - { - /* The priority change may have readied a task of higher - priority than the calling task. */ - if( uxNewPriority > uxCurrentPriority ) - { - if( pxTask != NULL ) - { - /* The priority of another task is being raised. If we - were raising the priority of the currently running task - there would be no need to switch as it must have already - been the highest priority task. */ - xYieldRequired = pdTRUE; - } - } - else if( pxTask == NULL ) - { - /* Setting our own priority down means there may now be another - task of higher priority that is ready to execute. */ - xYieldRequired = pdTRUE; - } - - - - #if ( configUSE_MUTEXES == 1 ) - { - /* Only change the priority being used if the task is not - currently using an inherited priority. */ - if( pxTCB->uxBasePriority == pxTCB->uxPriority ) - { - pxTCB->uxPriority = uxNewPriority; - } - - /* The base priority gets set whatever. */ - pxTCB->uxBasePriority = uxNewPriority; - } - #else - { - pxTCB->uxPriority = uxNewPriority; - } - #endif - - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( configMAX_PRIORITIES - ( portTickType ) uxNewPriority ) ); - - /* If the task is in the blocked or suspended list we need do - nothing more than change it's priority variable. However, if - the task is in a ready list it needs to be removed and placed - in the queue appropriate to its new priority. */ - if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxCurrentPriority ] ), &( pxTCB->xGenericListItem ) ) ) - { - /* The task is currently in its ready list - remove before adding - it to it's new ready list. As we are in a critical section we - can do this even if the scheduler is suspended. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - - if( xYieldRequired == pdTRUE ) - { - portYIELD_WITHIN_API(); - } - } - } - portEXIT_CRITICAL(); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskSuspend( xTaskHandle pxTaskToSuspend ) - { - tskTCB *pxTCB; - - portENTER_CRITICAL(); - { - /* Ensure a yield is performed if the current task is being - suspended. */ - if( pxTaskToSuspend == pxCurrentTCB ) - { - pxTaskToSuspend = NULL; - } - - /* If null is passed in here then we are suspending ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToSuspend ); - - traceTASK_SUSPEND( pxTCB ); - - /* Remove task from the ready/delayed list and place in the suspended list. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ); - } - portEXIT_CRITICAL(); - - /* We may have just suspended the current task. */ - if( ( void * ) pxTaskToSuspend == NULL ) - { - portYIELD_WITHIN_API(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - signed portBASE_TYPE xTaskIsTaskSuspended( xTaskHandle xTask ) - { - portBASE_TYPE xReturn = pdFALSE; - const tskTCB * const pxTCB = ( tskTCB * ) xTask; - - /* Is the task we are attempting to resume actually in the - suspended list? */ - if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ) != pdFALSE ) - { - /* Has the task already been resumed from within an ISR? */ - if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) != pdTRUE ) - { - /* Is it in the suspended list because it is in the - Suspended state? It is possible to be in the suspended - list because it is blocked on a task with no timeout - specified. */ - if( listIS_CONTAINED_WITHIN( NULL, &( pxTCB->xEventListItem ) ) == pdTRUE ) - { - xReturn = pdTRUE; - } - } - } - - return xReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskResume( xTaskHandle pxTaskToResume ) - { - tskTCB *pxTCB; - - /* Remove the task from whichever list it is currently in, and place - it in the ready list. */ - pxTCB = ( tskTCB * ) pxTaskToResume; - - /* The parameter cannot be NULL as it is impossible to resume the - currently executing task. */ - if( ( pxTCB != NULL ) && ( pxTCB != pxCurrentTCB ) ) - { - portENTER_CRITICAL(); - { - if( xTaskIsTaskSuspended( pxTCB ) == pdTRUE ) - { - traceTASK_RESUME( pxTCB ); - - /* As we are in a critical section we can access the ready - lists even if the scheduler is suspended. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* We may have just resumed a higher priority task. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - /* This yield may not cause the task just resumed to run, but - will leave the lists in the correct state for the next yield. */ - portYIELD_WITHIN_API(); - } - } - } - portEXIT_CRITICAL(); - } - } - -#endif - -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - tskTCB *pxTCB; - - pxTCB = ( tskTCB * ) pxTaskToResume; - - if( xTaskIsTaskSuspended( pxTCB ) == pdTRUE ) - { - traceTASK_RESUME_FROM_ISR( pxTCB ); - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - xYieldRequired = ( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed, at which point a - yield will be performed if necessary. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxTCB->xEventListItem ) ); - } - } - - return xYieldRequired; - } - -#endif - - - - -/*----------------------------------------------------------- - * PUBLIC SCHEDULER CONTROL documented in task.h - *----------------------------------------------------------*/ - - -void vTaskStartScheduler( void ) -{ -portBASE_TYPE xReturn; - - /* Add the idle task at the lowest priority. */ - xReturn = xTaskCreate( prvIdleTask, ( signed char * ) "IDLE", tskIDLE_STACK_SIZE, ( void * ) NULL, ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), ( xTaskHandle * ) NULL ); - - if( xReturn == pdPASS ) - { - /* Interrupts are turned off here, to ensure a tick does not occur - before or during the call to xPortStartScheduler(). The stacks of - the created tasks contain a status word with interrupts switched on - so interrupts will automatically get re-enabled when the first task - starts to run. - - STEPPING THROUGH HERE USING A DEBUGGER CAN CAUSE BIG PROBLEMS IF THE - DEBUGGER ALLOWS INTERRUPTS TO BE PROCESSED. */ - portDISABLE_INTERRUPTS(); - - xSchedulerRunning = pdTRUE; - xTickCount = ( portTickType ) 0; - - /* If configGENERATE_RUN_TIME_STATS is defined then the following - macro must be defined to configure the timer/counter used to generate - the run time counter time base. */ - portCONFIGURE_TIMER_FOR_RUN_TIME_STATS(); - - /* Setting up the timer tick is hardware specific and thus in the - portable interface. */ - if( xPortStartScheduler() ) - { - /* Should not reach here as if the scheduler is running the - function will not return. */ - } - else - { - /* Should only reach here if a task calls xTaskEndScheduler(). */ - } - } -} -/*-----------------------------------------------------------*/ - -void vTaskEndScheduler( void ) -{ - /* Stop the scheduler interrupts and call the portable scheduler end - routine so the original ISRs can be restored if necessary. The port - layer must ensure interrupts enable bit is left in the correct state. */ - portDISABLE_INTERRUPTS(); - xSchedulerRunning = pdFALSE; - vPortEndScheduler(); -} -/*----------------------------------------------------------*/ - -void vTaskSuspendAll( void ) -{ - /* A critical section is not required as the variable is of type - portBASE_TYPE. */ - ++uxSchedulerSuspended; -} -/*----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskResumeAll( void ) -{ -register tskTCB *pxTCB; -signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* It is possible that an ISR caused a task to be removed from an event - list while the scheduler was suspended. If this was the case then the - removed task will have been added to the xPendingReadyList. Once the - scheduler has been resumed it is safe to move all the pending ready - tasks from this list into their appropriate ready list. */ - portENTER_CRITICAL(); - { - --uxSchedulerSuspended; - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - if( uxCurrentNumberOfTasks > ( unsigned portBASE_TYPE ) 0 ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - - /* Move any readied tasks from the pending list into the - appropriate ready list. */ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xPendingReadyList ) ) ) != NULL ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* If we have moved a task that has a priority higher than - the current task then we should yield. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - xYieldRequired = pdTRUE; - } - } - - /* If any ticks occurred while the scheduler was suspended then - they should be processed now. This ensures the tick count does not - slip, and that any delayed tasks are resumed at the correct time. */ - if( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - while( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskIncrementTick(); - --uxMissedTicks; - } - - /* As we have processed some ticks it is appropriate to yield - to ensure the highest priority task that is ready to run is - the task actually running. */ - #if configUSE_PREEMPTION == 1 - { - xYieldRequired = pdTRUE; - } - #endif - } - - if( ( xYieldRequired == pdTRUE ) || ( xMissedYield == pdTRUE ) ) - { - xAlreadyYielded = pdTRUE; - xMissedYield = pdFALSE; - portYIELD_WITHIN_API(); - } - } - } - } - portEXIT_CRITICAL(); - - return xAlreadyYielded; -} - - - - - - -/*----------------------------------------------------------- - * PUBLIC TASK UTILITIES documented in task.h - *----------------------------------------------------------*/ - - - -portTickType xTaskGetTickCount( void ) -{ -portTickType xTicks; - - /* Critical section required if running on a 16 bit processor. */ - portENTER_CRITICAL(); - { - xTicks = xTickCount; - } - portEXIT_CRITICAL(); - - return xTicks; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ) -{ - /* A critical section is not required because the variables are of type - portBASE_TYPE. */ - return uxCurrentNumberOfTasks; -} -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - void vTaskList( signed char *pcWriteBuffer ) - { - unsigned portBASE_TYPE uxQueue; - - /* This is a VERY costly function that should be used for debug only. - It leaves interrupts disabled for a LONG time. */ - - vTaskSuspendAll(); - { - /* Run through all the lists that could potentially contain a TCB and - report the task name, state and stack high water mark. */ - - pcWriteBuffer[ 0 ] = ( signed char ) 0x00; - strcat( ( char * ) pcWriteBuffer, ( const char * ) "\r\n" ); - - uxQueue = uxTopUsedPriority + 1; - - do - { - uxQueue--; - - if( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxQueue ] ) ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &( pxReadyTasksLists[ uxQueue ] ), tskREADY_CHAR ); - } - }while( uxQueue > ( unsigned short ) tskIDLE_PRIORITY ); - - if( !listLIST_IS_EMPTY( pxDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( pxOverflowDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxOverflowDelayedTaskList, tskBLOCKED_CHAR ); - } - - #if( INCLUDE_vTaskDelete == 1 ) - { - if( !listLIST_IS_EMPTY( &xTasksWaitingTermination ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xTasksWaitingTermination, tskDELETED_CHAR ); - } - } - #endif - - #if ( INCLUDE_vTaskSuspend == 1 ) - { - if( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xSuspendedTaskList, tskSUSPENDED_CHAR ); - } - } - #endif - } - xTaskResumeAll(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configGENERATE_RUN_TIME_STATS == 1 ) - - void vTaskGetRunTimeStats( signed char *pcWriteBuffer ) - { - unsigned portBASE_TYPE uxQueue; - unsigned long ulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE(); - - /* This is a VERY costly function that should be used for debug only. - It leaves interrupts disabled for a LONG time. */ - - vTaskSuspendAll(); - { - /* Run through all the lists that could potentially contain a TCB, - generating a table of run timer percentages in the provided - buffer. */ - - pcWriteBuffer[ 0 ] = ( signed char ) 0x00; - strcat( ( char * ) pcWriteBuffer, ( const char * ) "\r\n" ); - - uxQueue = uxTopUsedPriority + 1; - - do - { - uxQueue--; - - if( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxQueue ] ) ) ) - { - prvGenerateRunTimeStatsForTasksInList( pcWriteBuffer, ( xList * ) &( pxReadyTasksLists[ uxQueue ] ), ulTotalRunTime ); - } - }while( uxQueue > ( unsigned short ) tskIDLE_PRIORITY ); - - if( !listLIST_IS_EMPTY( pxDelayedTaskList ) ) - { - prvGenerateRunTimeStatsForTasksInList( pcWriteBuffer, ( xList * ) pxDelayedTaskList, ulTotalRunTime ); - } - - if( !listLIST_IS_EMPTY( pxOverflowDelayedTaskList ) ) - { - prvGenerateRunTimeStatsForTasksInList( pcWriteBuffer, ( xList * ) pxOverflowDelayedTaskList, ulTotalRunTime ); - } - - #if ( INCLUDE_vTaskDelete == 1 ) - { - if( !listLIST_IS_EMPTY( &xTasksWaitingTermination ) ) - { - prvGenerateRunTimeStatsForTasksInList( pcWriteBuffer, ( xList * ) &xTasksWaitingTermination, ulTotalRunTime ); - } - } - #endif - - #if ( INCLUDE_vTaskSuspend == 1 ) - { - if( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - prvGenerateRunTimeStatsForTasksInList( pcWriteBuffer, ( xList * ) &xSuspendedTaskList, ulTotalRunTime ); - } - } - #endif - } - xTaskResumeAll(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - void vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize ) - { - portENTER_CRITICAL(); - { - pcTraceBuffer = ( signed char * )pcBuffer; - pcTraceBufferStart = pcBuffer; - pcTraceBufferEnd = pcBuffer + ( ulBufferSize - tskSIZE_OF_EACH_TRACE_LINE ); - xTracing = pdTRUE; - } - portEXIT_CRITICAL(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned long ulTaskEndTrace( void ) - { - unsigned long ulBufferLength; - - portENTER_CRITICAL(); - xTracing = pdFALSE; - portEXIT_CRITICAL(); - - ulBufferLength = ( unsigned long ) ( pcTraceBuffer - pcTraceBufferStart ); - - return ulBufferLength; - } - -#endif - - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - * documented in task.h - *----------------------------------------------------------*/ - - -void vTaskIncrementTick( void ) -{ - /* Called by the portable layer each time a tick interrupt occurs. - Increments the tick then checks to see if the new tick value will cause any - tasks to be unblocked. */ - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - ++xTickCount; - if( xTickCount == ( portTickType ) 0 ) - { - xList *pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. - If there are any items in pxDelayedTaskList here then there is - an error! */ - pxTemp = pxDelayedTaskList; - pxDelayedTaskList = pxOverflowDelayedTaskList; - pxOverflowDelayedTaskList = pxTemp; - xNumOfOverflows++; - } - - /* See if this tick has made a timeout expire. */ - prvCheckDelayedTasks(); - } - else - { - ++uxMissedTicks; - - /* The tick hook gets called at regular intervals, even if the - scheduler is locked. */ - #if ( configUSE_TICK_HOOK == 1 ) - { - extern void vApplicationTickHook( void ); - - vApplicationTickHook(); - } - #endif - } - - #if ( configUSE_TICK_HOOK == 1 ) - { - extern void vApplicationTickHook( void ); - - /* Guard against the tick hook being called when the missed tick - count is being unwound (when the scheduler is being unlocked. */ - if( uxMissedTicks == 0 ) - { - vApplicationTickHook(); - } - } - #endif - - traceTASK_INCREMENT_TICK( xTickCount ); -} -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_vTaskCleanUpResources == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskCleanUpResources( void ) - { - unsigned short usQueue; - volatile tskTCB *pxTCB; - - usQueue = ( unsigned short ) uxTopUsedPriority + ( unsigned short ) 1; - - /* Remove any TCB's from the ready queues. */ - do - { - usQueue--; - - while( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ usQueue ] ) ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &( pxReadyTasksLists[ usQueue ] ) ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - }while( usQueue > ( unsigned short ) tskIDLE_PRIORITY ); - - /* Remove any TCB's from the delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList1 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList1 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - /* Remove any TCB's from the overflow delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList2 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList2 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - while( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xSuspendedTaskList ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) - - void vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue ) - { - tskTCB *xTCB; - - /* If xTask is NULL then we are setting our own task hook. */ - if( xTask == NULL ) - { - xTCB = ( tskTCB * ) pxCurrentTCB; - } - else - { - xTCB = ( tskTCB * ) xTask; - } - - /* Save the hook function in the TCB. A critical section is required as - the value can be accessed from an interrupt. */ - portENTER_CRITICAL(); - xTCB->pxTaskTag = pxTagValue; - portEXIT_CRITICAL(); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) - - pdTASK_HOOK_CODE xTaskGetApplicationTaskTag( xTaskHandle xTask ) - { - tskTCB *xTCB; - pdTASK_HOOK_CODE xReturn; - - /* If xTask is NULL then we are setting our own task hook. */ - if( xTask == NULL ) - { - xTCB = ( tskTCB * ) pxCurrentTCB; - } - else - { - xTCB = ( tskTCB * ) xTask; - } - - /* Save the hook function in the TCB. A critical section is required as - the value can be accessed from an interrupt. */ - portENTER_CRITICAL(); - xReturn = xTCB->pxTaskTag; - portEXIT_CRITICAL(); - - return xReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) - - portBASE_TYPE xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter ) - { - tskTCB *xTCB; - portBASE_TYPE xReturn; - - /* If xTask is NULL then we are calling our own task hook. */ - if( xTask == NULL ) - { - xTCB = ( tskTCB * ) pxCurrentTCB; - } - else - { - xTCB = ( tskTCB * ) xTask; - } - - if( xTCB->pxTaskTag != NULL ) - { - xReturn = xTCB->pxTaskTag( pvParameter ); - } - else - { - xReturn = pdFAIL; - } - - return xReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -void vTaskSwitchContext( void ) -{ - if( uxSchedulerSuspended != ( unsigned portBASE_TYPE ) pdFALSE ) - { - /* The scheduler is currently suspended - do not allow a context - switch. */ - xMissedYield = pdTRUE; - return; - } - - traceTASK_SWITCHED_OUT(); - - #if ( configGENERATE_RUN_TIME_STATS == 1 ) - { - unsigned long ulTempCounter = portGET_RUN_TIME_COUNTER_VALUE(); - - /* Add the amount of time the task has been running to the accumulated - time so far. The time the task started running was stored in - ulTaskSwitchedInTime. Note that there is no overflow protection here - so count values are only valid until the timer overflows. Generally - this will be about 1 hour assuming a 1uS timer increment. */ - pxCurrentTCB->ulRunTimeCounter += ( ulTempCounter - ulTaskSwitchedInTime ); - ulTaskSwitchedInTime = ulTempCounter; - } - #endif - - taskFIRST_CHECK_FOR_STACK_OVERFLOW(); - taskSECOND_CHECK_FOR_STACK_OVERFLOW(); - - /* Find the highest priority queue that contains ready tasks. */ - while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopReadyPriority ] ) ) ) - { - --uxTopReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the tasks of the - same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopReadyPriority ] ) ); - - traceTASK_SWITCHED_IN(); - vWriteTraceToBuffer(); -} -/*-----------------------------------------------------------*/ - -void vTaskPlaceOnEventList( const xList * const pxEventList, portTickType xTicksToWait ) -{ -portTickType xTimeToWake; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. */ - - /* Place the event list item of the TCB in the appropriate event list. - This is placed in the list in priority order so the highest priority task - is the first to be woken by the event. */ - vListInsert( ( xList * ) pxEventList, ( xListItem * ) &( pxCurrentTCB->xEventListItem ) ); - - /* We must remove ourselves from the ready list before adding ourselves - to the blocked list as the same list item is used for both lists. We have - exclusive access to the ready lists as the scheduler is locked. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - - #if ( INCLUDE_vTaskSuspend == 1 ) - { - if( xTicksToWait == portMAX_DELAY ) - { - /* Add ourselves to the suspended task list instead of a delayed task - list to ensure we are not woken by a timing event. We will block - indefinitely. */ - vListInsertEnd( ( xList * ) &xSuspendedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* Calculate the time at which the task should be woken if the event does - not occur. This may overflow but this doesn't matter. */ - xTimeToWake = xTickCount + xTicksToWait; - - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - } - #else - { - /* Calculate the time at which the task should be woken if the event does - not occur. This may overflow but this doesn't matter. */ - xTimeToWake = xTickCount + xTicksToWait; - - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - #endif -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskRemoveFromEventList( const xList * const pxEventList ) -{ -tskTCB *pxUnblockedTCB; -portBASE_TYPE xReturn; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. It can also be called from within an ISR. */ - - /* The event list is sorted in priority order, so we can remove the - first in the list, remove the TCB from the delayed list, and add - it to the ready list. - - If an event is for a queue that is locked then this function will never - get called - the lock count on the queue will get modified instead. This - means we can always expect exclusive access to the event list here. */ - pxUnblockedTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedTCB->xEventListItem ) ); - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - vListRemove( &( pxUnblockedTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxUnblockedTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) ); - } - - if( pxUnblockedTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - /* Return true if the task removed from the event list has - a higher priority than the calling task. This allows - the calling task to know if it should force a context - switch now. */ - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vTaskSetTimeOutState( xTimeOutType * const pxTimeOut ) -{ - pxTimeOut->xOverflowCount = xNumOfOverflows; - pxTimeOut->xTimeOnEntering = xTickCount; -} -/*-----------------------------------------------------------*/ - -portBASE_TYPE xTaskCheckForTimeOut( xTimeOutType * const pxTimeOut, portTickType * const pxTicksToWait ) -{ -portBASE_TYPE xReturn; - - portENTER_CRITICAL(); - { - #if ( INCLUDE_vTaskSuspend == 1 ) - /* If INCLUDE_vTaskSuspend is set to 1 and the block time specified is - the maximum block time then the task should block indefinitely, and - therefore never time out. */ - if( *pxTicksToWait == portMAX_DELAY ) - { - xReturn = pdFALSE; - } - else /* We are not blocking indefinitely, perform the checks below. */ - #endif - - if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( ( portTickType ) xTickCount >= ( portTickType ) pxTimeOut->xTimeOnEntering ) ) - { - /* The tick count is greater than the time at which vTaskSetTimeout() - was called, but has also overflowed since vTaskSetTimeOut() was called. - It must have wrapped all the way around and gone past us again. This - passed since vTaskSetTimeout() was called. */ - xReturn = pdTRUE; - } - else if( ( ( portTickType ) xTickCount - ( portTickType ) pxTimeOut->xTimeOnEntering ) < ( portTickType ) *pxTicksToWait ) - { - /* Not a genuine timeout. Adjust parameters for time remaining. */ - *pxTicksToWait -= ( ( portTickType ) xTickCount - ( portTickType ) pxTimeOut->xTimeOnEntering ); - vTaskSetTimeOutState( pxTimeOut ); - xReturn = pdFALSE; - } - else - { - xReturn = pdTRUE; - } - } - portEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vTaskMissedYield( void ) -{ - xMissedYield = pdTRUE; -} - -/* - * ----------------------------------------------------------- - * The Idle task. - * ---------------------------------------------------------- - * - * The portTASK_FUNCTION() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION( prvIdleTask, pvParameters ) -{ - /* Stop warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /* See if any tasks have been deleted. */ - prvCheckTasksWaitingTermination(); - - #if ( configUSE_PREEMPTION == 0 ) - { - /* If we are not using preemption we keep forcing a task switch to - see if any other task has become available. If we are using - preemption we don't need to do this as any task becoming available - will automatically get the processor anyway. */ - taskYIELD(); - } - #endif - - #if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) - { - /* When using preemption tasks of equal priority will be - timesliced. If a task that is sharing the idle priority is ready - to run then the idle task should yield before the end of the - timeslice. - - A critical region is not required here as we are just reading from - the list, and an occasional incorrect value will not matter. If - the ready list at the idle priority contains more than one task - then a task other than the idle task is ready to execute. */ - if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( unsigned portBASE_TYPE ) 1 ) - { - taskYIELD(); - } - } - #endif - - #if ( configUSE_IDLE_HOOK == 1 ) - { - extern void vApplicationIdleHook( void ); - - /* Call the user defined function from within the idle task. This - allows the application designer to add background functionality - without the overhead of a separate task. - NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES, - CALL A FUNCTION THAT MIGHT BLOCK. */ - vApplicationIdleHook(); - } - #endif - } -} /*lint !e715 pvParameters is not accessed but all task functions require the same prototype. */ - - - - - - - -/*----------------------------------------------------------- - * File private functions documented at the top of the file. - *----------------------------------------------------------*/ - - - -static void prvInitialiseTCBVariables( tskTCB *pxTCB, const signed char * const pcName, unsigned portBASE_TYPE uxPriority, const xMemoryRegion * const xRegions, unsigned short usStackDepth ) -{ - /* Store the function name in the TCB. */ - #if configMAX_TASK_NAME_LEN > 1 - { - /* Don't bring strncpy into the build unnecessarily. */ - strncpy( ( char * ) pxTCB->pcTaskName, ( const char * ) pcName, ( unsigned short ) configMAX_TASK_NAME_LEN ); - } - #endif - pxTCB->pcTaskName[ ( unsigned short ) configMAX_TASK_NAME_LEN - ( unsigned short ) 1 ] = '\0'; - - /* This is used as an array index so must ensure it's not too large. First - remove the privilege bit if one is present. */ - if( uxPriority >= configMAX_PRIORITIES ) - { - uxPriority = configMAX_PRIORITIES - 1; - } - - pxTCB->uxPriority = uxPriority; - #if ( configUSE_MUTEXES == 1 ) - { - pxTCB->uxBasePriority = uxPriority; - } - #endif - - vListInitialiseItem( &( pxTCB->xGenericListItem ) ); - vListInitialiseItem( &( pxTCB->xEventListItem ) ); - - /* Set the pxTCB as a link back from the xListItem. This is so we can get - back to the containing TCB from a generic item in a list. */ - listSET_LIST_ITEM_OWNER( &( pxTCB->xGenericListItem ), pxTCB ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - listSET_LIST_ITEM_OWNER( &( pxTCB->xEventListItem ), pxTCB ); - - #if ( portCRITICAL_NESTING_IN_TCB == 1 ) - { - pxTCB->uxCriticalNesting = ( unsigned portBASE_TYPE ) 0; - } - #endif - - #if ( configUSE_APPLICATION_TASK_TAG == 1 ) - { - pxTCB->pxTaskTag = NULL; - } - #endif - - #if ( configGENERATE_RUN_TIME_STATS == 1 ) - { - pxTCB->ulRunTimeCounter = 0UL; - } - #endif - - #if ( portUSING_MPU_WRAPPERS == 1 ) - { - vPortStoreTaskMPUSettings( &( pxTCB->xMPUSettings ), xRegions, pxTCB->pxStack, usStackDepth ); - } - #else - { - ( void ) xRegions; - ( void ) usStackDepth; - } - #endif -} -/*-----------------------------------------------------------*/ - -#if ( portUSING_MPU_WRAPPERS == 1 ) - - void vTaskAllocateMPURegions( xTaskHandle xTaskToModify, const xMemoryRegion * const xRegions ) - { - tskTCB *pxTCB; - - if( xTaskToModify == pxCurrentTCB ) - { - xTaskToModify = NULL; - } - - /* If null is passed in here then we are deleting ourselves. */ - pxTCB = prvGetTCBFromHandle( xTaskToModify ); - - vPortStoreTaskMPUSettings( &( pxTCB->xMPUSettings ), xRegions, NULL, 0 ); - } - /*-----------------------------------------------------------*/ -#endif - -static void prvInitialiseTaskLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyTasksLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedTaskList1 ); - vListInitialise( ( xList * ) &xDelayedTaskList2 ); - vListInitialise( ( xList * ) &xPendingReadyList ); - - #if ( INCLUDE_vTaskDelete == 1 ) - { - vListInitialise( ( xList * ) &xTasksWaitingTermination ); - } - #endif - - #if ( INCLUDE_vTaskSuspend == 1 ) - { - vListInitialise( ( xList * ) &xSuspendedTaskList ); - } - #endif - - /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList - using list2. */ - pxDelayedTaskList = &xDelayedTaskList1; - pxOverflowDelayedTaskList = &xDelayedTaskList2; -} -/*-----------------------------------------------------------*/ - -static void prvCheckTasksWaitingTermination( void ) -{ - #if ( INCLUDE_vTaskDelete == 1 ) - { - portBASE_TYPE xListIsEmpty; - - /* ucTasksDeleted is used to prevent vTaskSuspendAll() being called - too often in the idle task. */ - if( uxTasksDeleted > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskSuspendAll(); - xListIsEmpty = listLIST_IS_EMPTY( &xTasksWaitingTermination ); - xTaskResumeAll(); - - if( !xListIsEmpty ) - { - tskTCB *pxTCB; - - portENTER_CRITICAL(); - { - pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xTasksWaitingTermination ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - --uxCurrentNumberOfTasks; - --uxTasksDeleted; - } - portEXIT_CRITICAL(); - - prvDeleteTCB( pxTCB ); - } - } - } - #endif -} -/*-----------------------------------------------------------*/ - -static tskTCB *prvAllocateTCBAndStack( unsigned short usStackDepth, portSTACK_TYPE *puxStackBuffer ) -{ -tskTCB *pxNewTCB; - - /* Allocate space for the TCB. Where the memory comes from depends on - the implementation of the port malloc function. */ - pxNewTCB = ( tskTCB * ) pvPortMalloc( sizeof( tskTCB ) ); - - if( pxNewTCB != NULL ) - { - /* Allocate space for the stack used by the task being created. - The base of the stack memory stored in the TCB so the task can - be deleted later if required. */ - pxNewTCB->pxStack = ( portSTACK_TYPE * ) pvPortMallocAligned( ( ( ( size_t )usStackDepth ) * sizeof( portSTACK_TYPE ) ), puxStackBuffer ); - - if( pxNewTCB->pxStack == NULL ) - { - /* Could not allocate the stack. Delete the allocated TCB. */ - vPortFree( pxNewTCB ); - pxNewTCB = NULL; - } - else - { - /* Just to help debugging. */ - memset( pxNewTCB->pxStack, tskSTACK_FILL_BYTE, usStackDepth * sizeof( portSTACK_TYPE ) ); - } - } - - return pxNewTCB; -} -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( const signed char *pcWriteBuffer, xList *pxList, signed char cStatus ) - { - volatile tskTCB *pxNextTCB, *pxFirstTCB; - unsigned short usStackRemaining; - - /* Write the details of all the TCB's in pxList into the buffer. */ - listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); - do - { - listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); - usStackRemaining = usTaskCheckFreeStackSpace( ( unsigned char * ) pxNextTCB->pxStack ); - sprintf( pcStatusString, ( char * ) "%s\t\t%c\t%u\t%u\t%u\r\n", pxNextTCB->pcTaskName, cStatus, ( unsigned int ) pxNextTCB->uxPriority, usStackRemaining, ( unsigned int ) pxNextTCB->uxTCBNumber ); - strcat( ( char * ) pcWriteBuffer, ( char * ) pcStatusString ); - - } while( pxNextTCB != pxFirstTCB ); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( configGENERATE_RUN_TIME_STATS == 1 ) - - static void prvGenerateRunTimeStatsForTasksInList( const signed char *pcWriteBuffer, xList *pxList, unsigned long ulTotalRunTime ) - { - volatile tskTCB *pxNextTCB, *pxFirstTCB; - unsigned long ulStatsAsPercentage; - - /* Write the run time stats of all the TCB's in pxList into the buffer. */ - listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); - do - { - /* Get next TCB in from the list. */ - listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); - - /* Divide by zero check. */ - if( ulTotalRunTime > 0UL ) - { - /* Has the task run at all? */ - if( pxNextTCB->ulRunTimeCounter == 0 ) - { - /* The task has used no CPU time at all. */ - sprintf( pcStatsString, ( char * ) "%s\t\t0\t\t0%%\r\n", pxNextTCB->pcTaskName ); - } - else - { - /* What percentage of the total run time as the task used? - This will always be rounded down to the nearest integer. */ - ulStatsAsPercentage = ( 100UL * pxNextTCB->ulRunTimeCounter ) / ulTotalRunTime; - - if( ulStatsAsPercentage > 0UL ) - { - sprintf( pcStatsString, ( char * ) "%s\t\t%u\t\t%u%%\r\n", pxNextTCB->pcTaskName, ( unsigned int ) pxNextTCB->ulRunTimeCounter, ( unsigned int ) ulStatsAsPercentage ); - } - else - { - /* If the percentage is zero here then the task has - consumed less than 1% of the total run time. */ - sprintf( pcStatsString, ( char * ) "%s\t\t%u\t\t<1%%\r\n", pxNextTCB->pcTaskName, ( unsigned int ) pxNextTCB->ulRunTimeCounter ); - } - } - - strcat( ( char * ) pcWriteBuffer, ( char * ) pcStatsString ); - } - - } while( pxNextTCB != pxFirstTCB ); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) ) - - static unsigned short usTaskCheckFreeStackSpace( const unsigned char * pucStackByte ) - { - register unsigned short usCount = 0; - - while( *pucStackByte == tskSTACK_FILL_BYTE ) - { - pucStackByte -= portSTACK_GROWTH; - usCount++; - } - - usCount /= sizeof( portSTACK_TYPE ); - - return usCount; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) - - unsigned portBASE_TYPE uxTaskGetStackHighWaterMark( xTaskHandle xTask ) - { - tskTCB *pxTCB; - unsigned char *pcEndOfStack; - unsigned portBASE_TYPE uxReturn; - - pxTCB = prvGetTCBFromHandle( xTask ); - - #if portSTACK_GROWTH < 0 - { - pcEndOfStack = ( unsigned char * ) pxTCB->pxStack; - } - #else - { - pcEndOfStack = ( unsigned char * ) pxTCB->pxEndOfStack; - } - #endif - - uxReturn = ( unsigned portBASE_TYPE ) usTaskCheckFreeStackSpace( pcEndOfStack ); - - return uxReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - - static void prvDeleteTCB( tskTCB *pxTCB ) - { - /* Free up the memory allocated by the scheduler for the task. It is up to - the task to free any memory allocated at the application level. */ - vPortFreeAligned( pxTCB->pxStack ); - vPortFree( pxTCB ); - } - -#endif - - -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) - - xTaskHandle xTaskGetCurrentTaskHandle( void ) - { - xTaskHandle xReturn; - - /* A critical section is not required as this is not called from - an interrupt and the current TCB will always be the same for any - individual execution thread. */ - xReturn = pxCurrentTCB; - - return xReturn; - } - -#endif - -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) - - portBASE_TYPE xTaskGetSchedulerState( void ) - { - portBASE_TYPE xReturn; - - if( xSchedulerRunning == pdFALSE ) - { - xReturn = taskSCHEDULER_NOT_STARTED; - } - else - { - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - xReturn = taskSCHEDULER_RUNNING; - } - else - { - xReturn = taskSCHEDULER_SUSPENDED; - } - } - - return xReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_MUTEXES == 1 ) - - void vTaskPriorityInherit( xTaskHandle * const pxMutexHolder ) - { - tskTCB * const pxTCB = ( tskTCB * ) pxMutexHolder; - - if( pxTCB->uxPriority < pxCurrentTCB->uxPriority ) - { - /* Adjust the mutex holder state to account for its new priority. */ - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) pxCurrentTCB->uxPriority ); - - /* If the task being modified is in the ready state it will need to - be moved in to a new list. */ - if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxTCB->uxPriority ] ), &( pxTCB->xGenericListItem ) ) ) - { - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Inherit the priority before being moved into the new list. */ - pxTCB->uxPriority = pxCurrentTCB->uxPriority; - prvAddTaskToReadyQueue( pxTCB ); - } - else - { - /* Just inherit the priority. */ - pxTCB->uxPriority = pxCurrentTCB->uxPriority; - } - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_MUTEXES == 1 ) - - void vTaskPriorityDisinherit( xTaskHandle * const pxMutexHolder ) - { - tskTCB * const pxTCB = ( tskTCB * ) pxMutexHolder; - - if( pxMutexHolder != NULL ) - { - if( pxTCB->uxPriority != pxTCB->uxBasePriority ) - { - /* We must be the running task to be able to give the mutex back. - Remove ourselves from the ready list we currently appear in. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Disinherit the priority before adding ourselves into the new - ready list. */ - pxTCB->uxPriority = pxTCB->uxBasePriority; - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) pxTCB->uxPriority ); - prvAddTaskToReadyQueue( pxTCB ); - } - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( portCRITICAL_NESTING_IN_TCB == 1 ) - - void vTaskEnterCritical( void ) - { - portDISABLE_INTERRUPTS(); - - if( xSchedulerRunning != pdFALSE ) - { - pxCurrentTCB->uxCriticalNesting++; - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( portCRITICAL_NESTING_IN_TCB == 1 ) - -void vTaskExitCritical( void ) -{ - if( xSchedulerRunning != pdFALSE ) - { - if( pxCurrentTCB->uxCriticalNesting > 0 ) - { - pxCurrentTCB->uxCriticalNesting--; - - if( pxCurrentTCB->uxCriticalNesting == 0 ) - { - portENABLE_INTERRUPTS(); - } - } - } -} - -#endif -/*-----------------------------------------------------------*/ - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/cmsis/core_cm3.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/cmsis/core_cm3.c deleted file mode 100644 index b3a9a886..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/cmsis/core_cm3.c +++ /dev/null @@ -1,804 +0,0 @@ -/****************************************************************************** - * @file: core_cm3.c - * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Source File - * @version: V1.10 - * @date: 24. Feb. 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-Mx - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - - -#include - -/* define compiler specific symbols */ -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for armcc */ - #define __INLINE __inline /*!< inline keyword for armcc */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for iarcc */ - #define __INLINE inline /*!< inline keyword for iarcc. Only avaiable in High optimization mode! */ - #define __nop __no_operation /*!< no operation intrinsic in iarcc */ - -#elif defined ( __GNUC__ ) - #define __ASM asm /*!< asm keyword for gcc */ - #define __INLINE inline /*!< inline keyword for gcc */ -#endif - - - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -__ASM uint32_t __get_PSP(void) -{ - mrs r0, psp - bx lr -} - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -__ASM void __set_PSP(uint32_t topOfProcStack) -{ - msr psp, r0 - bx lr -} - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -__ASM uint32_t __get_MSP(void) -{ - mrs r0, msp - bx lr -} - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -__ASM void __set_MSP(uint32_t mainStackPointer) -{ - msr msp, r0 - bx lr -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -__ASM uint32_t __REV16(uint16_t value) -{ - rev16 r0, r0 - bx lr -} - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param int16_t value to reverse - * @return int32_t reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -__ASM int32_t __REVSH(int16_t value) -{ - revsh r0, r0 - bx lr -} - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * @param none - * @return none - * - * Removes the exclusive lock which is created by ldrex. - */ -__ASM void __CLREX(void) -{ - clrex -} - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -__ASM uint32_t __get_BASEPRI(void) -{ - mrs r0, basepri - bx lr -} - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -__ASM void __set_BASEPRI(uint32_t basePri) -{ - msr basepri, r0 - bx lr -} - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -__ASM uint32_t __get_PRIMASK(void) -{ - mrs r0, primask - bx lr -} - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -__ASM void __set_PRIMASK(uint32_t priMask) -{ - msr primask, r0 - bx lr -} - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -__ASM uint32_t __get_FAULTMASK(void) -{ - mrs r0, faultmask - bx lr -} - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -__ASM void __set_FAULTMASK(uint32_t faultMask) -{ - msr faultmask, r0 - bx lr -} - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -__ASM uint32_t __get_CONTROL(void) -{ - mrs r0, control - bx lr -} - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -__ASM void __set_CONTROL(uint32_t control) -{ - msr control, r0 - bx lr -} - -#endif /* __ARMCC_VERSION */ - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -#pragma diag_suppress=Pe940 - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -uint32_t __get_PSP(void) -{ - __ASM("mrs r0, psp"); - __ASM("bx lr"); -} - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -void __set_PSP(uint32_t topOfProcStack) -{ - __ASM("msr psp, r0"); - __ASM("bx lr"); -} - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -uint32_t __get_MSP(void) -{ - __ASM("mrs r0, msp"); - __ASM("bx lr"); -} - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -void __set_MSP(uint32_t topOfMainStack) -{ - __ASM("msr msp, r0"); - __ASM("bx lr"); -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -uint32_t __REV16(uint16_t value) -{ - __ASM("rev16 r0, r0"); - __ASM("bx lr"); -} - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -uint32_t __RBIT(uint32_t value) -{ - __ASM("rbit r0, r0"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -uint8_t __LDREXB(uint8_t *addr) -{ - __ASM("ldrexb r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -uint16_t __LDREXH(uint16_t *addr) -{ - __ASM("ldrexh r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -uint32_t __LDREXW(uint32_t *addr) -{ - __ASM("ldrex r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXB(uint8_t value, uint8_t *addr) -{ - __ASM("strexb r0, r0, [r1]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXH(uint16_t value, uint16_t *addr) -{ - __ASM("strexh r0, r0, [r1]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXW(uint32_t value, uint32_t *addr) -{ - __ASM("strex r0, r0, [r1]"); - __ASM("bx lr"); -} - -#pragma diag_default=Pe940 - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -uint32_t __get_PSP(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, psp" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -void __set_PSP(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) ); -} - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -uint32_t __get_MSP(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, msp" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -void __set_MSP(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) ); -} - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -uint32_t __get_BASEPRI(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -void __set_BASEPRI(uint32_t value) -{ - __ASM volatile ("MSR basepri, %0" : : "r" (value) ); -} - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -uint32_t __get_PRIMASK(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -void __set_PRIMASK(uint32_t priMask) -{ - __ASM volatile ("MSR primask, %0" : : "r" (priMask) ); -} - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -uint32_t __get_FAULTMASK(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -void __set_FAULTMASK(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) ); -} - -/** - * @brief Reverse byte order in integer value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in integer value - */ -uint32_t __REV(uint32_t value) -{ - uint32_t result=0; - - __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -uint32_t __REV16(uint16_t value) -{ - uint32_t result=0; - - __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param int32_t value to reverse - * @return int32_t reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -int32_t __REVSH(int16_t value) -{ - uint32_t result=0; - - __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -uint32_t __RBIT(uint32_t value) -{ - uint32_t result=0; - - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -uint8_t __LDREXB(uint8_t *addr) -{ - uint8_t result=0; - - __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -uint16_t __LDREXH(uint16_t *addr) -{ - uint16_t result=0; - - __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -uint32_t __LDREXW(uint32_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXB(uint8_t value, uint8_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXH(uint16_t value, uint16_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXW(uint32_t value, uint32_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -uint32_t __get_CONTROL(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, control" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -void __set_CONTROL(uint32_t control) -{ - __ASM volatile ("MSR control, %0" : : "r" (control) ); -} - -#endif - - - - - - - - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/cmsis/core_cm3.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/cmsis/core_cm3.h deleted file mode 100644 index 59b054de..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/cmsis/core_cm3.h +++ /dev/null @@ -1,1265 +0,0 @@ -/****************************************************************************** - * @file: core_cm3.h - * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version: V1.10 - * @date: 24. Feb. 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-Mx - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - - - -#ifndef __CM3_CORE_H__ -#define __CM3_CORE_H__ - - -#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ -#define __CM3_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */ -#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x03) /*!< Cortex core */ - -/** - * Lint configuration \n - * ----------------------- \n - * - * The following Lint messages will be suppressed and not shown: \n - * \n - * --- Error 10: --- \n - * register uint32_t __regBasePri __asm("basepri"); \n - * Error 10: Expecting ';' \n - * \n - * --- Error 530: --- \n - * return(__regBasePri); \n - * Warning 530: Symbol '__regBasePri' (line 264) not initialized \n - * \n - * --- Error 550: --- \n - * __regBasePri = (basePri & 0x1ff); \n - * } \n - * Warning 550: Symbol '__regBasePri' (line 271) not accessed \n - * \n - * --- Error 754: --- \n - * uint32_t RESERVED0[24]; \n - * Info 754: local structure member '' (line 109, file ./cm3_core.h) not referenced \n - * \n - * --- Error 750: --- \n - * #define __CM3_CORE_H__ \n - * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced \n - * \n - * --- Error 528: --- \n - * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n - * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced \n - * \n - * --- Error 751: --- \n - * } InterruptType_Type; \n - * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced \n - * \n - * \n - * Note: To re-enable a Message, insert a space before 'lint' * \n - * - */ - -/*lint -save */ -/*lint -e10 */ -/*lint -e530 */ -/*lint -e550 */ -/*lint -e754 */ -/*lint -e750 */ -/*lint -e528 */ -/*lint -e751 */ - - -#include /* Include standard types */ - -#if defined (__ICCARM__) - #include /* IAR Intrinsics */ -#endif - - -#ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ -#endif - - - - -/** - * IO definitions - * - * define access restrictions to peripheral registers - */ - -#define __I volatile const /*!< defines 'read only' permissions */ -#define __O volatile /*!< defines 'write only' permissions */ -#define __IO volatile /*!< defines 'read / write' permissions */ - - - -/******************************************************************************* - * Register Abstraction - ******************************************************************************/ - - -/* System Reset */ -#define NVIC_VECTRESET 0 /*!< Vector Reset Bit */ -#define NVIC_SYSRESETREQ 2 /*!< System Reset Request */ -#define NVIC_AIRCR_VECTKEY (0x5FA << 16) /*!< AIRCR Key for write access */ -#define NVIC_AIRCR_ENDIANESS 15 /*!< Endianess */ - -/* Core Debug */ -#define CoreDebug_DEMCR_TRCENA (1 << 24) /*!< DEMCR TRCENA enable */ -#define ITM_TCR_ITMENA 1 /*!< ITM enable */ - - - - -/* memory mapping struct for Nested Vectored Interrupt Controller (NVIC) */ -typedef struct -{ - __IO uint32_t ISER[8]; /*!< Interrupt Set Enable Register */ - uint32_t RESERVED0[24]; - __IO uint32_t ICER[8]; /*!< Interrupt Clear Enable Register */ - uint32_t RSERVED1[24]; - __IO uint32_t ISPR[8]; /*!< Interrupt Set Pending Register */ - uint32_t RESERVED2[24]; - __IO uint32_t ICPR[8]; /*!< Interrupt Clear Pending Register */ - uint32_t RESERVED3[24]; - __IO uint32_t IABR[8]; /*!< Interrupt Active bit Register */ - uint32_t RESERVED4[56]; - __IO uint8_t IP[240]; /*!< Interrupt Priority Register, 8Bit wide */ - uint32_t RESERVED5[644]; - __O uint32_t STIR; /*!< Software Trigger Interrupt Register */ -} NVIC_Type; - - -/* memory mapping struct for System Control Block */ -typedef struct -{ - __I uint32_t CPUID; /*!< CPU ID Base Register */ - __IO uint32_t ICSR; /*!< Interrupt Control State Register */ - __IO uint32_t VTOR; /*!< Vector Table Offset Register */ - __IO uint32_t AIRCR; /*!< Application Interrupt / Reset Control Register */ - __IO uint32_t SCR; /*!< System Control Register */ - __IO uint32_t CCR; /*!< Configuration Control Register */ - __IO uint8_t SHP[12]; /*!< System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IO uint32_t SHCSR; /*!< System Handler Control and State Register */ - __IO uint32_t CFSR; /*!< Configurable Fault Status Register */ - __IO uint32_t HFSR; /*!< Hard Fault Status Register */ - __IO uint32_t DFSR; /*!< Debug Fault Status Register */ - __IO uint32_t MMFAR; /*!< Mem Manage Address Register */ - __IO uint32_t BFAR; /*!< Bus Fault Address Register */ - __IO uint32_t AFSR; /*!< Auxiliary Fault Status Register */ - __I uint32_t PFR[2]; /*!< Processor Feature Register */ - __I uint32_t DFR; /*!< Debug Feature Register */ - __I uint32_t ADR; /*!< Auxiliary Feature Register */ - __I uint32_t MMFR[4]; /*!< Memory Model Feature Register */ - __I uint32_t ISAR[5]; /*!< ISA Feature Register */ -} SCB_Type; - - -/* memory mapping struct for SysTick */ -typedef struct -{ - __IO uint32_t CTRL; /*!< SysTick Control and Status Register */ - __IO uint32_t LOAD; /*!< SysTick Reload Value Register */ - __IO uint32_t VAL; /*!< SysTick Current Value Register */ - __I uint32_t CALIB; /*!< SysTick Calibration Register */ -} SysTick_Type; - - -/* memory mapping structur for ITM */ -typedef struct -{ - __O union - { - __O uint8_t u8; /*!< ITM Stimulus Port 8-bit */ - __O uint16_t u16; /*!< ITM Stimulus Port 16-bit */ - __O uint32_t u32; /*!< ITM Stimulus Port 32-bit */ - } PORT [32]; /*!< ITM Stimulus Port Registers */ - uint32_t RESERVED0[864]; - __IO uint32_t TER; /*!< ITM Trace Enable Register */ - uint32_t RESERVED1[15]; - __IO uint32_t TPR; /*!< ITM Trace Privilege Register */ - uint32_t RESERVED2[15]; - __IO uint32_t TCR; /*!< ITM Trace Control Register */ - uint32_t RESERVED3[29]; - __IO uint32_t IWR; /*!< ITM Integration Write Register */ - __IO uint32_t IRR; /*!< ITM Integration Read Register */ - __IO uint32_t IMCR; /*!< ITM Integration Mode Control Register */ - uint32_t RESERVED4[43]; - __IO uint32_t LAR; /*!< ITM Lock Access Register */ - __IO uint32_t LSR; /*!< ITM Lock Status Register */ - uint32_t RESERVED5[6]; - __I uint32_t PID4; /*!< ITM Product ID Registers */ - __I uint32_t PID5; - __I uint32_t PID6; - __I uint32_t PID7; - __I uint32_t PID0; - __I uint32_t PID1; - __I uint32_t PID2; - __I uint32_t PID3; - __I uint32_t CID0; - __I uint32_t CID1; - __I uint32_t CID2; - __I uint32_t CID3; -} ITM_Type; - - -/* memory mapped struct for Interrupt Type */ -typedef struct -{ - uint32_t RESERVED0; - __I uint32_t ICTR; /*!< Interrupt Control Type Register */ -#if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) - __IO uint32_t ACTLR; /*!< Auxiliary Control Register */ -#else - uint32_t RESERVED1; -#endif -} InterruptType_Type; - - -/* Memory Protection Unit */ -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) -typedef struct -{ - __I uint32_t TYPE; /*!< MPU Type Register */ - __IO uint32_t CTRL; /*!< MPU Control Register */ - __IO uint32_t RNR; /*!< MPU Region RNRber Register */ - __IO uint32_t RBAR; /*!< MPU Region Base Address Register */ - __IO uint32_t RASR; /*!< MPU Region Attribute and Size Register */ - __IO uint32_t RBAR_A1; /*!< MPU Alias 1 Region Base Address Register */ - __IO uint32_t RASR_A1; /*!< MPU Alias 1 Region Attribute and Size Register */ - __IO uint32_t RBAR_A2; /*!< MPU Alias 2 Region Base Address Register */ - __IO uint32_t RASR_A2; /*!< MPU Alias 2 Region Attribute and Size Register */ - __IO uint32_t RBAR_A3; /*!< MPU Alias 3 Region Base Address Register */ - __IO uint32_t RASR_A3; /*!< MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; -#endif - - -/* Core Debug Register */ -typedef struct -{ - __IO uint32_t DHCSR; /*!< Debug Halting Control and Status Register */ - __O uint32_t DCRSR; /*!< Debug Core Register Selector Register */ - __IO uint32_t DCRDR; /*!< Debug Core Register Data Register */ - __IO uint32_t DEMCR; /*!< Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000) /*!< ITM Base Address */ -#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ - -#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ -#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) - #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ -#endif - - - -/******************************************************************************* - * Hardware Abstraction Layer - ******************************************************************************/ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - #define __NOP __no_operation /*!< no operation intrinsic in IAR Compiler */ - -#elif defined ( __GNUC__ ) - #define __ASM asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ -/* ARM armcc specific functions */ - -#define __enable_fault_irq __enable_fiq -#define __disable_fault_irq __disable_fiq - -#define __NOP __nop -#define __WFI __wfi -#define __WFE __wfe -#define __SEV __sev -#define __ISB() __isb(0) -#define __DSB() __dsb(0) -#define __DMB() __dmb(0) -#define __REV __rev -#define __RBIT __rbit -#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) -#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) -#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) -#define __STREXB(value, ptr) __strex(value, ptr) -#define __STREXH(value, ptr) __strex(value, ptr) -#define __STREXW(value, ptr) __strex(value, ptr) - - - /* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ - /* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ - /* intrinsic void __enable_irq(); */ - /* intrinsic void __disable_irq(); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/* - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param int16_t value to reverse - * @return int32_t reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * @param none - * @return none - * - * Removes the exclusive lock which is created by ldrex. - */ -extern void __CLREX(void); - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -#else /* (__ARMCC_VERSION >= 400000) */ - - -/** - * @brief Remove the exclusive lock created by ldrex - * - * @param none - * @return none - * - * Removes the exclusive lock which is created by ldrex. - */ -#define __CLREX __clrex - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -static __INLINE uint32_t __get_BASEPRI(void) -{ - register uint32_t __regBasePri __ASM("basepri"); - return(__regBasePri); -} - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -static __INLINE void __set_BASEPRI(uint32_t basePri) -{ - register uint32_t __regBasePri __ASM("basepri"); - __regBasePri = (basePri & 0x1ff); -} - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -static __INLINE uint32_t __get_PRIMASK(void) -{ - register uint32_t __regPriMask __ASM("primask"); - return(__regPriMask); -} - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -static __INLINE void __set_PRIMASK(uint32_t priMask) -{ - register uint32_t __regPriMask __ASM("primask"); - __regPriMask = (priMask); -} - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -static __INLINE uint32_t __get_FAULTMASK(void) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - return(__regFaultMask); -} - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -static __INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - __regFaultMask = (faultMask & 1); -} - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -static __INLINE uint32_t __get_CONTROL(void) -{ - register uint32_t __regControl __ASM("control"); - return(__regControl); -} - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -static __INLINE void __set_CONTROL(uint32_t control) -{ - register uint32_t __regControl __ASM("control"); - __regControl = control; -} - -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -/* IAR iccarm specific functions */ - -#define __enable_irq __enable_interrupt /*!< global Interrupt enable */ -#define __disable_irq __disable_interrupt /*!< global Interrupt disable */ - -static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } - -static __INLINE void __WFI() { __ASM ("wfi"); } -static __INLINE void __WFE() { __ASM ("wfe"); } -static __INLINE void __SEV() { __ASM ("sev"); } -static __INLINE void __CLREX() { __ASM ("clrex"); } - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - -/* intrinsic void __set_PRIMASK(); */ -/* intrinsic void __get_PRIMASK(); */ -/* intrinsic void __set_FAULTMASK(); */ -/* intrinsic void __get_FAULTMASK(); */ -/* intrinsic uint32_t __REV(uint32_t value); */ -/* intrinsic uint32_t __REVSH(uint32_t value); */ -/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ -/* intrinsic unsigned long __LDREX(unsigned long *); */ - - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* GNU gcc specific functions */ - -static __INLINE void __NOP() { __ASM volatile ("nop"); } -static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } -static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } - -static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } - -static __INLINE void __WFI() { __ASM volatile ("wfi"); } -static __INLINE void __WFE() { __ASM volatile ("wfe"); } -static __INLINE void __SEV() { __ASM volatile ("sev"); } -static __INLINE void __ISB(arg) { __ASM volatile ("isb"); } -static __INLINE void __DSB(arg) { __ASM volatile ("dsb"); } -static __INLINE void __DMB(arg) { __ASM volatile ("dmb"); } -static __INLINE void __CLREX() { __ASM volatile ("clrex"); } - - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value -* -* @param none -* @return uint32_t Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -/** - * @brief Reverse byte order in integer value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in integer value - */ -extern uint32_t __REV(uint32_t value); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/* - * Reverse byte order in signed short value with sign extension to integer - * - * @param int16_t value to reverse - * @return int32_t reversed value - * - * @brief Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - -#endif - - - -/* ########################## NVIC functions #################################### */ - -/** - * @brief Set the Priority Grouping in NVIC Interrupt Controller - * - * @param uint32_t priority_grouping is priority grouping field - * @return - * - * Set the priority grouping field using the required unlock sequence. - * The parameter priority_grouping is assigned to the field - * SCB->AIRCR [10:8] PRIGROUP field. - */ -static __INLINE void NVIC_SetPriorityGrouping(uint32_t priority_grouping) -{ - uint32_t reg_value=0; - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((0xFFFFU << 16) | (0x0F << 8)); /* clear bits to change */ - reg_value = ((reg_value | NVIC_AIRCR_VECTKEY | (priority_grouping << 8))); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - -/** - * @brief Enable Interrupt in NVIC Interrupt Controller - * - * @param IRQn_Type IRQn specifies the interrupt number - * @return none - * - * Enable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ -} - -/** - * @brief Disable the interrupt line for external interrupt specified - * - * @param IRQn_Type IRQn is the positive number of the external interrupt - * @return none - * - * Disable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ -} - -/** - * @brief Read the interrupt pending bit for a device specific interrupt source - * - * @param IRQn_Type IRQn is the number of the device specifc interrupt - * @return IRQn_Type Number of pending interrupt or zero - * - * Read the pending register in NVIC and return the number of the - * specified interrupt if its status is pending, otherwise it returns - * zero. The interrupt number cannot be a negative value. - */ -static __INLINE IRQn_Type NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((IRQn_Type) (NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))); /* Return Interrupt bit or 'zero' */ -} - -/** - * @brief Set the pending bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return none - * - * Set the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ -} - -/** - * @brief Clear the pending bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return none - * - * Clear the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ -} - -/** - * @brief Read the active bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return IRQn_Type Number of pending interrupt or zero - * - * Read the active register in NVIC and returns the number of the - * specified interrupt if its status is active, otherwise it - * returns zero. The interrupt number cannot be a negative value. - */ -static __INLINE IRQn_Type NVIC_GetActive(IRQn_Type IRQn) -{ - return((IRQn_Type)(NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))); /* Return Interruptnumber or 'zero' */ -} - -/** - * @brief Set the priority for an interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @param priority is the priority for the interrupt - * @return none - * - * Set the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. \n - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, int32_t priority) -{ - if(IRQn < 0) { - SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ - else { - //NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ - NVIC->IP[(uint32_t)(IRQn)] = (priority & 0xff); } /* set Priority for device specific Interrupts */ -} - -/** - * @brief Read the priority for an interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return priority is the priority for the interrupt - * - * Read the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * The returned priority value is automatically aligned to the implemented - * priority bits of the microcontroller. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if(IRQn < 0) { - return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ - else { - return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ -} - - - -/* ################################## SysTick function ############################################ */ - -#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) - -/* SysTick constants */ -#define SYSTICK_ENABLE 0 /* Config-Bit to start or stop the SysTick Timer */ -#define SYSTICK_TICKINT 1 /* Config-Bit to enable or disable the SysTick interrupt */ -#define SYSTICK_CLKSOURCE 2 /* Clocksource has the offset 2 in SysTick Control and Status Register */ -#define SYSTICK_MAXCOUNT ((1<<24) -1) /* SysTick MaxCount */ - -/** - * @brief Initialize and start the SysTick counter and its interrupt. - * - * @param uint32_t ticks is the number of ticks between two interrupts - * @return none - * - * Initialise the system tick timer and its interrupt and start the - * system tick timer / counter in free running mode to generate - * periodical interrupts. - */ -static __INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if (ticks > SYSTICK_MAXCOUNT) return (1); /* Reload value impossible */ - - SysTick->LOAD = (ticks & SYSTICK_MAXCOUNT) - 1; /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ - SysTick->VAL = (0x00); /* Load the SysTick Counter Value */ - SysTick->CTRL = (1 << SYSTICK_CLKSOURCE) | (1<AIRCR = (NVIC_AIRCR_VECTKEY | (SCB->AIRCR & (0x700)) | (1<DEMCR & CoreDebug_DEMCR_TRCENA) && - (ITM->TCR & ITM_TCR_ITMENA) && - (ITM->TER & (1UL << 0)) ) - { - while (ITM->PORT[0].u32 == 0); - ITM->PORT[0].u8 = (uint8_t) ch; - } - return (ch); -} - -#endif - -/*lint -restore */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/acc/acc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/acc/acc.c deleted file mode 100644 index 2c3e0080..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/acc/acc.c +++ /dev/null @@ -1,164 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup adc_module Working with ACC - * The ACC driver provides the interface to configure and use the ACC peripheral.\n - * - * It converts the analog input to digital format. The converted result could be 12bit - * or 10bit. The ACC supports up to 16 analog lines. - * - * To Enable a ACC conversion,the user has to follow these few steps: - *
    - *
  • Select an appropriate reference voltage on ADVREF
    • - *
  • Configure the ACC according to its requirements and special needs,which could be - broken down into several parts: - * -# Select the resolution by setting or clearing ACC_MR_LOWRES bit in ACC_MR (Mode Register) - * -# Set ACC clock by setting ACC_MR_PRESCAL bits in ACC_MR, the clock is caculated with - ACCClock = MCK / ( (PRESCAL+1) * 2 ) - * -# Set Startup Time,Tracking Clock cycles and Transfer Clock respeticively in ACC_MR. -
    • - *
  • Start conversion by setting ACC_CR_START in ACC_CR.
    • - *
- * - * For more accurate information, please look at the ACC section of the - * Datasheet. - * - * Related files :\n - * \ref adc.c\n - * \ref adc.h\n -*/ -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include -#include - - - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initialize the ACC controller - * \param pAcc Pointer to an Acc instance. - * \param idAcc ACC identifier - * \param selplus input connected to inp, 0~7 - * \param selminus input connected to inm,0~7 - * \param ac_en Analog comprator enabled/disabled,use pattern - * \param edge CF flag triggering mode,use pattern - * \param invert INVert comparator output,use pattern defined in the device header - file -*/ -void ACC_Configure(Acc *pAcc, - uint8_t idAcc, - uint8_t selplus, - uint8_t selminus, - uint16_t ac_en, - uint16_t edge, - uint16_t invert) -{ - - /* Enable peripheral clock*/ - PMC->PMC_PCER1 = 1 << (idAcc-32); - - /* Reset the controller */ - pAcc->ACC_CR |= ACC_CR_SWRST; - - /* Write to the MR register */ - ACC_CfgModeReg( pAcc, - ( selplus & ACC_MR_SELPLUS) - | (( selminus<<4) & ACC_MR_SELMINUS) - | ( ac_en & ACC_MR_ACEN) - | ( edge & ACC_MR_EDGETYP) - | ( invert & ACC_MR_INV) ); - //pAcc->ACC_MR |= (ACC_MR_SELFS_OUTPUT|ACC_MR_FE_EN); - - pAcc->ACC_ACR = 0x7; - - while(pAcc->ACC_ISR & (uint32_t)ACC_ISR_MASK); -} - - -/** - * Return the Channel Converted Data - * \param pAdc Pointer to an Adc instance. - * \param channel channel to get converted value - * \return Channel converted data of the specified channel - */ -void ACC_SetComparisionPair(Acc *pAcc, uint8_t selplus,uint8_t selminus) -{ - - uint32_t temp; - - ASSERT(selplus < 8 && selminus < 8,"The assigned channel number is invalid!"); - - temp = pAcc->ACC_MR; - - pAcc->ACC_MR = temp & (~ACC_MR_SELMINUS)&(~ACC_MR_SELPLUS); - - pAcc->ACC_MR |= ((selplus & ACC_MR_SELPLUS)|((selminus<<4) & ACC_MR_SELMINUS)); - -} -/** - * Return Comparison Result - * \param pAcc Pointer to an Acc instance. - * \param status value of ACC_ISR - */ -uint8_t ACC_GetComparisionResult(Acc *pAcc,uint32_t status) -{ - uint32_t temp = pAcc->ACC_MR; - if( (temp & ACC_MR_INV)== ACC_MR_INV) - { - - if( status & ACC_ISR_SCO) - { - return 0; /* inn>inp*/ - } - else return 1;/* inp>inn*/ - - } - else - { - - if( status & ACC_ISR_SCO) - { - return 1; /* inp>inn*/ - } - else return 0;/* inn>inp*/ - } - -} - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/acc/acc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/acc/acc.h deleted file mode 100644 index 284d8d44..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/acc/acc.h +++ /dev/null @@ -1,144 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \unit - * - * !Purpose - * - * Interface for configuration the Analog-to-Digital Converter (ACC) peripheral. - * - * !Usage - * - * -# Configurate the pins for ACC - * -# Initialize the ACC with ACC_Initialize(). - * -# Select the active channel using ACC_EnableChannel() - * -# Start the conversion with ACC_StartConversion() - * -# Wait the end of the conversion by polling status with ACC_GetStatus() - * -# Finally, get the converted data using ACC_GetConvertedData() - * -*/ -#ifndef ACC_H -#define ACC_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ -#define ACC_SELPLUS_AD12B0 0 -#define ACC_SELPLUS_AD12B1 1 -#define ACC_SELPLUS_AD12B2 2 -#define ACC_SELPLUS_AD12B3 3 -#define ACC_SELPLUS_AD12B4 4 -#define ACC_SELPLUS_AD12B5 5 -#define ACC_SELPLUS_AD12B6 6 -#define ACC_SELPLUS_AD12B7 7 -#define ACC_SELMINUS_TS 0 -#define ACC_SELMINUS_ADVREF 1 -#define ACC_SELMINUS_DAC0 2 -#define ACC_SELMINUS_DAC1 3 -#define ACC_SELMINUS_AD12B0 4 -#define ACC_SELMINUS_AD12B1 5 -#define ACC_SELMINUS_AD12B2 6 -#define ACC_SELMINUS_AD12B3 7 - - -/*------------------------------------------------------------------------------ - * Macros function of register access - *------------------------------------------------------------------------------*/ -#define ACC_CfgModeReg(pAcc, mode) { \ - (pAcc)->ACC_MR = (mode);\ - } - -#define ACC_GetModeReg(pAcc) ((pAcc)->ACC_MR) - -#define ACC_StartConversion(pAcc) ((pAcc)->ACC_CR = ACC_CR_START) - -#define ACC_SoftReset(pAcc) ((pAcc)->ACC_CR = ACC_CR_SWRST) - -#define ACC_EnableChannel(pAcc, channel) {\ - ASSERT(channel < 16, "ACC Channel not exist");\ - (pAcc)->ACC_CHER = (1 << (channel));\ - } - -#define ACC_DisableChannel (pAcc, channel) {\ - ASSERT((channel) < 16, "ACC Channel not exist");\ - (pAcc)->ACC_CHDR = (1 << (channel));\ - } - -#define ACC_EnableIt(pAcc, mode) {\ - ASSERT(((mode)&0xFFF00000)== 0, "ACC bad interrupt IER");\ - (pAcc)->ACC_IER = (mode);\ - } - -#define ACC_DisableIt(pAcc, mode) {\ - ASSERT(((mode)&0xFFF00000)== 0, "ACC bad interrupt IDR");\ - (pAcc)->ACC_IDR = (mode);\ - } - -#define ACC_EnableDataReadyIt(pAcc) ((pAcc)->ACC_IER = AT91C_ACC_DRDY) - -#define ACC_GetStatus(pAcc) ((pAcc)->ACC_ISR) - -#define ACC_GetChannelStatus(pAcc) ((pAcc)->ACC_CHSR) - -#define ACC_GetInterruptMaskStatus(pAcc) ((pAcc)->ACC_IMR) - -#define ACC_GetLastConvertedData(pAcc) ((pAcc)->ACC_LCDR) - -#define ACC_CfgAnalogCtrlReg(pAcc,mode) {\ - ASSERT(((mode) & 0xFFFCFF3C)==0, "ACC bad analog control config");\ - (pAcc)->ACC_ACR = (mode);\ - } - -#define ACC_CfgExtModeReg(pAcc, extmode) {\ - ASSERT(((extmode) & 0xFF00FFFE)==0, "ACC bad extended mode config");\ - (pAcc)->ACC_EMR = (extmode);\ - } - -#define ACC_GetAnalogCtrlReg(pAcc) ((pAcc)->ACC_ACR) - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -void ACC_Configure(Acc *pAcc, - uint8_t idAcc, - uint8_t selplus, - uint8_t selminus, - uint16_t ac_en, - uint16_t edge, - uint16_t invert); - -extern uint8_t ACC_GetComparisionResult(Acc *pAcc,uint32_t status); - -#endif //#ifndef ACC_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/adc/adc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/adc/adc.c deleted file mode 100644 index 241a8d93..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/adc/adc.c +++ /dev/null @@ -1,231 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup adc_module Working with ADC - * The ADC driver provides the interface to configure and use the ADC peripheral. - * \n - * - * It converts the analog input to digital format. The converted result could be - * 12bit or 10bit. The ADC supports up to 16 analog lines. - * - * To Enable a ADC conversion,the user has to follow these few steps: - *
    - *
  • Select an appropriate reference voltage on ADVREF
    • - *
  • Configure the ADC according to its requirements and special needs,which - * could be broken down into several parts: - * -# Select the resolution by setting or clearing ADC_MR_LOWRES bit in - * ADC_MR (Mode Register) - * -# Set ADC clock by setting ADC_MR_PRESCAL bits in ADC_MR, the clock is - * calculated with ADCClock = MCK / ( (PRESCAL+1) * 2 ) - * -# Set Startup Time,Tracking Clock cycles and Transfer Clock respectively - * in ADC_MR. -
    • - *
  • Start conversion by setting ADC_CR_START in ADC_CR.
    • - *
- * - * For more accurate information, please look at the ADC section of the - * Datasheet. - * - * Related files :\n - * \ref adc.c\n - * \ref adc.h\n -*/ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initialize the ADC controller - * \param pAdc Pointer to an Adc instance. - * \param trgEn trigger mode, software or Hardware - * \param trgSel hardware trigger selection - * \param sleepMode sleep mode selection - * \param resolution resolution selection 10 bits or 12 bits - * \param mckClock value of MCK in Hz - * \param adcClock value of the ADC clock in Hz - * \param startupTime value of the start up time (in ADCClock) (see datasheet) - * \param trackingt Tracking Time (in ADCClock cycle) -*/ -void ADC_Initialize(Adc *pAdc, uint8_t idAdc, uint8_t trgEn, uint8_t trgSel, - uint8_t sleepMode, uint8_t resolution, uint32_t mckClock, - uint32_t adcClock, uint32_t startup, uint32_t tracking) { - uint32_t prescal; - prescal = (mckClock / (2*adcClock)) - 1; - - ASSERT( (prescal<0x3F), "ADC Bad PRESCAL\n\r"); - - TRACE_DEBUG("adcClock:%lu MasterClock:%lu\n\r", (mckClock/((prescal+1)*2)), - mckClock); - - if( adcClock != (mckClock/((prescal+1)*2)) ) { - TRACE_WARNING("User and calculated adcClocks are different : " - "user=%lu calc=%lu\n\r", - adcClock, (mckClock/((prescal+1)*2))); - } - - /* Enable peripheral clock*/ - PMC->PMC_PCER0 = 1 << idAdc; - - /* Reset the controller */ - ADC_SoftReset(pAdc); - - /* Write to the MR register */ - ADC_CfgModeReg( pAdc, - ( trgEn & ADC_MR_TRGEN) - | ( trgSel & ADC_MR_TRGSEL) - | ( resolution & ADC_MR_LOWRES) - | ( sleepMode & ADC_MR_SLEEP) - | ( (prescal<<8) & ADC_MR_PRESCAL) - | ( (startup<<16) & ADC_MR_STARTUP) - | ( (tracking<<24) & ADC_MR_TRACKTIM) ); -} - -/** - * Return the Channel Converted Data - * \param pAdc Pointer to an Adc instance. - * \param channel channel to get converted value - */ -uint32_t ADC_GetConvertedData(Adc *pAdc, uint32_t channel) { - uint32_t data=0; - - if (15 >= channel) { - data = *((RoReg *)((uint32_t)&(pAdc->ADC_CDR0)+ channel*4)); - } - return data; -} -/** - * Set compare channel - * \param pAdc Pointer to an Adc instance. - * \param channel channel number to be set,16 for all channels - */ -void ADC_SetCompareChannel(Adc *pAdc, uint8_t channel) { - ASSERT(channel<=16, "Invalid channel number"); - if (channel < 16) { - pAdc->ADC_EMR &= ~(ADC_EMR_CMPALL); - pAdc->ADC_EMR &= ~(ADC_EMR_CMPSEL); - pAdc->ADC_EMR |= (channel << 4); - } else { - pAdc->ADC_EMR |= ADC_EMR_CMPALL; - } -} -/** - * Set compare mode - * \param pAdc Pointer to an Adc instance. - * \param mode compare mode - */ -void ADC_SetCompareMode(Adc *pAdc, uint8_t mode) { - pAdc->ADC_EMR &= ~(ADC_EMR_CMPMODE); - pAdc->ADC_EMR |= mode; -} -/** - * Set comparsion window,one thereshold each time - * \param pAdc Pointer to an Adc instance. - * \param hi_lo Comparison Window - */ -void ADC_SetComparisonWindow(Adc *pAdc, uint32_t hi_lo) { - pAdc->ADC_CWR = hi_lo; -} - -/**---------------------------------------------------------------------------- -* Test if ADC Interrupt is Masked -* \param pAdc Pointer to an Adc instance. -* \param flag flag to be tested -* \return 1 if interrupt is masked, otherwise 0 -*/ -uint32_t ADC_IsInterruptMasked(Adc *pAdc, uint32_t flag) { - return (ADC_GetInterruptMaskStatus(pAdc) & flag); -} - -/**---------------------------------------------------------------------------- -* Test if ADC Status is Set -* \param pAdc Pointer to an Adc instance. -* \param flag flag to be tested -* \return 1 if the staus is set; 0 otherwise -*/ -uint32_t ADC_IsStatusSet(Adc *pAdc, uint32_t flag) { - return (ADC_GetStatus(pAdc) & flag); -} - -/**---------------------------------------------------------------------------- -* Test if ADC channel interrupt Status is Set -* \param adc_sr Value of SR register -* \param channel Channel to be tested -* \return 1 if interrupt status is set, otherwise 0 -*/ -uint8_t ADC_IsChannelInterruptStatusSet(uint32_t adc_sr, uint32_t channel) { - uint8_t status; - - if((adc_sr & (1<ADC_RCR == 0) && (pADC->ADC_RNCR == 0)) { - - pADC->ADC_RPR = (uint32_t) pBuffer; - pADC->ADC_RCR = size; - pADC->ADC_PTCR = ADC_PTCR_RXTEN; - - return 1; - } - /* Check if the second PDC bank is free*/ - else if (pADC->ADC_RNCR == 0) { - - pADC->ADC_RNPR = (uint32_t) pBuffer; - pADC->ADC_RNCR = size; - - return 1; - } else { - - return 0; - } - -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/adc/adc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/adc/adc.h deleted file mode 100644 index 702143f0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/adc/adc.h +++ /dev/null @@ -1,158 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \unit - * - * !Purpose - * - * Interface for configuration the Analog-to-Digital Converter (ADC) peripheral. - * - * !Usage - * - * -# Configurate the pins for ADC - * -# Initialize the ADC with ADC_Initialize(). - * -# Select the active channel using ADC_EnableChannel() - * -# Start the conversion with ADC_StartConversion() - * -# Wait the end of the conversion by polling status with ADC_GetStatus() - * -# Finally, get the converted data using ADC_GetConvertedData() - * -*/ -#ifndef ADC_H -#define ADC_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ -#define ADC_CHANNEL_0 0 -#define ADC_CHANNEL_1 1 -#define ADC_CHANNEL_2 2 -#define ADC_CHANNEL_3 3 -#define ADC_CHANNEL_4 4 -#define ADC_CHANNEL_5 5 -#define ADC_CHANNEL_6 6 -#define ADC_CHANNEL_7 7 -#define ADC_CHANNEL_8 8 -#define ADC_CHANNEL_9 9 -#define ADC_CHANNEL_10 10 -#define ADC_CHANNEL_11 11 -#define ADC_CHANNEL_12 12 -#define ADC_CHANNEL_13 13 -#define ADC_CHANNEL_14 14 -#define ADC_CHANNEL_15 15 - -/*------------------------------------------------------------------------------ - * Macros function of register access - *------------------------------------------------------------------------------*/ -#define ADC_CfgModeReg(pAdc, mode) { \ - ASSERT(((mode)&0xF00000C0)== 0, "ADC Bad configuration ADC MR");\ - (pAdc)->ADC_MR = (mode);\ - } - -#define ADC_GetModeReg(pAdc) ((pAdc)->ADC_MR) - -#define ADC_StartConversion(pAdc) ((pAdc)->ADC_CR = ADC_CR_START) - -#define ADC_SoftReset(pAdc) ((pAdc)->ADC_CR = ADC_CR_SWRST) - -#define ADC_EnableChannel(pAdc, channel) {\ - ASSERT(channel < 16, "ADC Channel not exist");\ - (pAdc)->ADC_CHER = (1 << (channel));\ - } - -#define ADC_DisableChannel (pAdc, channel) {\ - ASSERT((channel) < 16, "ADC Channel not exist");\ - (pAdc)->ADC_CHDR = (1 << (channel));\ - } - -#define ADC_EnableIt(pAdc, mode) {\ - (pAdc)->ADC_IER = (mode);\ - } - -#define ADC_DisableIt(pAdc, mode) {\ - (pAdc)->ADC_IDR = (mode);\ - } - -#define ADC_EnbaleTS(pAdc,mode) {\ - (pAdc)->ADC_ACR |= mode;\ - } - -#define ADC_EnableDataReadyIt(pAdc) ((pAdc)->ADC_IER = AT91C_ADC_DRDY) - -#define ADC_GetStatus(pAdc) ((pAdc)->ADC_ISR) - -#define ADC_GetCompareMode(pAdc) (((pAdc)->ADC_EMR)& (ADC_EMR_CMPMODE)) - -#define ADC_GetChannelStatus(pAdc) ((pAdc)->ADC_CHSR) - -#define ADC_GetInterruptMaskStatus(pAdc) ((pAdc)->ADC_IMR) - -#define ADC_GetLastConvertedData(pAdc) ((pAdc)->ADC_LCDR) - -#define ADC_CfgAnalogCtrlReg(pAdc,mode) {\ - ASSERT(((mode) & 0xFFFCFF3C)==0, "ADC bad analog control config");\ - (pAdc)->ADC_ACR = (mode);\ - } - -#define ADC_CfgExtModeReg(pAdc, extmode) {\ - ASSERT(((extmode) & 0xFF00FFFE)==0, "ADC bad extended mode config");\ - (pAdc)->ADC_EMR = (extmode);\ - } - -#define ADC_GetAnalogCtrlReg(pAdc) ((pAdc)->ADC_ACR) - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -extern void ADC_Initialize (Adc *pAdc, - uint8_t idAdc, - uint8_t trgEn, - uint8_t trgSel, - uint8_t sleepMode, - uint8_t resolution, - uint32_t mckClock, - uint32_t adcClock, - uint32_t startupTime, - uint32_t sampleAndHoldTime); -extern uint32_t ADC_GetConvertedData(Adc *pAdc, uint32_t channel); -extern void ADC_SetCompareChannel(Adc *pAdc, uint8_t channel); -extern void ADC_SetCompareMode(Adc *pAdc, uint8_t mode); -extern void ADC_SetComparisonWindow(Adc *pAdc, uint32_t hi_lo); -extern uint32_t ADC_IsInterruptMasked(Adc *pAdc, uint32_t flag); -extern uint32_t ADC_IsStatusSet(Adc *pAdc, uint32_t flag); -extern uint8_t ADC_IsChannelInterruptStatusSet(uint32_t adc_sr, - uint32_t channel); -extern int8_t ADC_ReadBuffer(Adc *pADC,int16_t *pBuffer,int32_t size); - -#endif //#ifndef ADC_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/async/async.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/async/async.c deleted file mode 100644 index 65ba73a6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/async/async.c +++ /dev/null @@ -1,54 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Provide a routine for asynchronos transfer. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include -#include "async.h" - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ - /** - * \brief Returns 1 if the given transfer has ended; otherwise returns 0. - * \param pAsync Pointer to an Async instance. - */ -uint8_t ASYNC_IsFinished(Async *pAsync) -{ - return (pAsync->status != ASYNC_STATUS_PENDING); -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/async/async.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/async/async.h deleted file mode 100644 index af03d0e2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/async/async.h +++ /dev/null @@ -1,67 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - /** - * \file - * - * Provide a routine for asynchronos transfer. - * - */ - -#ifndef ASYNC_H -#define ASYNC_H - - -/*---------------------------------------------------------------------------- - * Definition - *----------------------------------------------------------------------------*/ -/** Transfer is still pending.*/ -#define ASYNC_STATUS_PENDING 0xFF - -/*---------------------------------------------------------------------------- - * Type - *----------------------------------------------------------------------------*/ -/** Asynchronous transfer descriptor. */ -typedef struct _Async { - - /** Asynchronous transfer status.*/ - volatile uint8_t status; - /** Callback function to invoke when transfer completes or fails.*/ - void *callback; - /** Driver storage area; do not use.*/ - uint32_t pStorage[4]; -} Async; - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ -extern uint8_t ASYNC_IsFinished(Async *pAsync); - -#endif //#ifndef ASYNC_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/crccu/crccu.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/crccu/crccu.c deleted file mode 100644 index 0e4acec8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/crccu/crccu.c +++ /dev/null @@ -1,134 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup crccu_module Working with CRCCU - * The CRCCU driver provides the interface to configure and use the CRCCU - * peripheral. - * - * It performs a CRC computation on a Memory Area. CRC computation is performed - * from the LSB to MSB bit. Three different polynomials are available: - * CCIT802.3, CASTAGNOLI and CCIT16. - * - * To computes CRC of a buffer, the user has to follow these few steps: - *
    - *
  • Reset initial CRC by setting RESET bit in CRCCU_CRC_CR,
    • - *
  • Configure CRC descriptor and working mode,
    • - *
  • Start to compute CRC by setting DMAEN in CRCCU_DMA_EN,
    • - *
  • Get CRC value in CRCCU_CRC_SR.
    • - *
- * - * For more accurate information, please look at the CRCCU section of the - * Datasheet. - * - * Related files :\n - * \ref crccu.c\n - * \ref crccu.h.\n -*/ -/*@{*/ -/*@}*/ - -/** - * \file - * - * Implementation of Cyclic Redundancy Check Calculation Unit (CRCCU). - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "crccu.h" -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ -#define CRCCU_TIMEOUT 0xFFFFFFFF - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -/** - * \brief Reset initial CRC to 0xFFFFFFFF. - */ -void CRCCU_ResetCrcValue(void) -{ - Crccu *pCrccu = CRCCU; - - pCrccu->CRCCU_CR = CRCCU_CR_RESET; -} - -/** - * \brief Configure the CRCCU. - * - * \param dscrAddr CRC decscriptor address. - * \param mode CRC work mode - */ -void CRCCU_Configure(uint32_t dscrAddr, uint32_t mode) -{ - Crccu *pCrccu = CRCCU; - - pCrccu->CRCCU_DSCR = dscrAddr; - pCrccu->CRCCU_MR = mode; -} - -/** - * \brief Start to compute the CRC of a buffer. - * - * \return The CRC of the buffer. - */ -uint32_t CRCCU_ComputeCrc(void) -{ - Crccu *pCrccu = CRCCU; - uint32_t timeout = 0; - - pCrccu->CRCCU_DMA_EN = CRCCU_DMA_EN_DMAEN; - while (((pCrccu->CRCCU_DMA_SR & CRCCU_DMA_SR_DMASR) == CRCCU_DMA_SR_DMASR) - && (timeout++ < CRCCU_TIMEOUT)); - - return (pCrccu->CRCCU_SR); -} - -/** - * \brief Compare the CRC of a buffer is match to reference CRC. - * - * \return if 0 CRC is match, else dismatch. - */ -uint32_t CRCCU_CompareCrc(void) -{ - Crccu *pCrccu = CRCCU; - - if ((pCrccu->CRCCU_ISR & CRCCU_ISR_ERRISR) == CRCCU_ISR_ERRISR) { - return 1; - } else { - return 0; - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/crccu/crccu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/crccu/crccu.h deleted file mode 100644 index 7298f610..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/crccu/crccu.h +++ /dev/null @@ -1,66 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Cyclic Redundancy Check Calculation Unit (CRCCU). - */ - -#ifndef CRCCU_H -#define CRCCU_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -typedef struct { - unsigned int TR_ADDR; - unsigned int TR_CTRL; - unsigned int reserved[2]; - unsigned int TR_CRC; -} CrcDscr; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -void CRCCU_ResetCrcValue(void); -void CRCCU_Configure(uint32_t dscrAddr, uint32_t mode); -uint32_t CRCCU_ComputeCrc(void); -uint32_t CRCCU_CompareCrc(void); - -#endif /* #ifndef CRCCU_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/dacc/dacc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/dacc/dacc.c deleted file mode 100644 index f576aa49..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/dacc/dacc.c +++ /dev/null @@ -1,172 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup dacc_module Working with DACC - * The DACC driver provides the interface to configure and use the DACC peripheral.\n - * - * The DACC(Digital-to-Analog Converter Controller) converts digital code to analog output. - * The data to be converted are sent in a common register for all channels. It offers up to 2 - * analog outputs.The output voltage ranges from (1/6)ADVREF to (5/6)ADVREF. - * - * To Enable a DACC conversion,the user has to follow these few steps: - *
    - *
  • Select an appropriate reference voltage on ADVREF
    • - *
  • Configure the DACC according to its requirements and special needs,which could be - broken down into several parts: - * -# Enable DACC in free running mode by clearing TRGEN in DACC_MR; - * -# Configure Startup Time and Refresh Period through setting STARTUP and REFRESH fields - * in DACC_MR; The refresh mechanism is used to protect the output analog value from - * decreasing. - * -# Enable channels and write digital code to DACC_CDR,in free running mode, the conversion - * is started right after at least one channel is enabled and data is written . -
    • - *
- * - * For more accurate information, please look at the DACC section of the - * Datasheet. - * - * Related files :\n - * \ref DACC.c\n - * \ref DACC.h\n -*/ -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include -#include - - - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initialize the DACC controller - * \param pDACC Pointer to an DACC instance. - * \param idDACC identifier of DAC peripheral - * \param trgEn trigger mode, free running mode or external Hardware trigger - * \param word transfer size,word or half word - * \param trgSel hardware trigger selection - * \param sleepMode sleep mode selection - * \param mck value of MCK in Hz - * \param refresh refresh period - * \param user_sel user channel selection ,0 or 1 - * \param startup value of the start up time (in DACCClock) (see datasheet) -*/ -void DACC_Initialize (Dacc *pDACC, - uint8_t idDACC, - uint8_t trgEn, - uint8_t trgSel, - uint8_t word, - uint8_t sleepMode, - uint32_t mck, - uint8_t refresh,/*refresh period*/ - uint8_t user_sel,/*user channel selection*/ - uint32_t startup - ) -{ - ASSERT(1024*refresh*1000/(mck/2)<20,"Refresh preriod is too big!"); - - - /* Enable peripheral clock*/ - PMC->PMC_PCER0 = 1 << idDACC; - - /* Reset the controller */ - DACC_SoftReset(pDACC); - - /* Write to the MR register */ - DACC_CfgModeReg( pDACC, - ( trgEn & DACC_MR_TRGEN) - | ( trgSel & DACC_MR_TRGSEL) - | ( word & DACC_MR_WORD) - | ( sleepMode & DACC_MR_SLEEP) - | ( (refresh<<8) & DACC_MR_REFRESH) - | ( (user_sel<<16)& DACC_MR_USER_SEL) - | ( (startup<<24) & DACC_MR_STARTUP)); -} - - -/** - * Set the Conversion Data - * \param pDACC Pointer to an Dacc instance. - * \param channel channel to get converted value - * \return Channel converted data of the specified channel - */ -void DACC_SetConversionData(Dacc *pDACC, uint32_t data) -{ - uint32_t mr = pDACC->DACC_MR; - - if(mr & DACC_MR_WORD) - { - pDACC->DACC_CDR = data; - } - else - { - pDACC->DACC_CDR = (data&0xFFFF); - } -} - - -/** - * \brief Write converted data through PDC channel - * \param pDACC the pointer of DACC peripheral - * \param pBuffer the destination buffer - * \param size the size of the buffer -*/ -int8_t DACC_WriteBuffer(Dacc *pDACC,int16_t *pBuffer,int32_t size) -{ - - /* Check if the first PDC bank is free*/ - if ((pDACC->DACC_TCR == 0) && (pDACC->DACC_TNCR == 0)) { - - pDACC->DACC_TPR = (uint32_t) pBuffer; - pDACC->DACC_TCR = size; - pDACC->DACC_PTCR = DACC_PTCR_RXTEN; - - return 1; - } - /* Check if the second PDC bank is free*/ - else if (pDACC->DACC_TNCR == 0) { - - pDACC->DACC_TNPR = (uint32_t) pBuffer; - pDACC->DACC_TNCR = size; - - return 1; - } - else { - - return 0; - } - -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/dacc/dacc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/dacc/dacc.h deleted file mode 100644 index c2aebada..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/dacc/dacc.h +++ /dev/null @@ -1,133 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \unit - * - * !Purpose - * - * Interface for configuration the Analog-to-Digital Converter (DACC) peripheral. - * - * !Usage - * - * -# Configurate the pins for DACC - * -# Initialize the DACC with DACC_Initialize(). - * -# Select the active channel using DACC_EnableChannel() - * -# Start the conversion with DACC_StartConversion() - * -# Wait the end of the conversion by polling status with DACC_GetStatus() - * -# Finally, get the converted data using DACC_GetConvertedData() - * -*/ -#ifndef DACC_H -#define DACC_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ -#define DACC_CHANNEL_0 0 -#define DACC_CHANNEL_1 1 - - -/*------------------------------------------------------------------------------ - * Macros function of register access - *------------------------------------------------------------------------------*/ -#define DACC_CfgModeReg(pDACC, mode) { \ - (pDACC)->DACC_MR = (mode);\ - } - -#define DACC_GetModeReg(pDACC) ((pDACC)->DACC_MR) - -#define DACC_StartConversion(pDACC) ((pDACC)->DACC_CR = DACC_CR_START) - -#define DACC_SoftReset(pDACC) ((pDACC)->DACC_CR = DACC_CR_SWRST) - -#define DACC_EnableChannel(pDACC, channel) {\ - (pDACC)->DACC_CHER = (1 << (channel));\ - } - -#define DACC_DisableChannel (pDACC, channel) {\ - (pDACC)->DACC_CHDR = (1 << (channel));\ - } - -#define DACC_EnableIt(pDACC, mode) {\ - ASSERT(((mode)&0xFFF00000)== 0, "DACC bad interrupt IER");\ - (pDACC)->DACC_IER = (mode);\ - } - -#define DACC_DisableIt(pDACC, mode) {\ - ASSERT(((mode)&0xFFF00000)== 0, "DACC bad interrupt IDR");\ - (pDACC)->DACC_IDR = (mode);\ - } - -#define DACC_EnableDataReadyIt(pDACC) ((pDACC)->DACC_IER = AT91C_DACC_DRDY) - -#define DACC_GetStatus(pDACC) ((pDACC)->DACC_ISR) - -#define DACC_GetChannelStatus(pDACC) ((pDACC)->DACC_CHSR) - -#define DACC_GetInterruptMaskStatus(pDACC) ((pDACC)->DACC_IMR) - -#define DACC_GetLastConvertedData(pDACC) ((pDACC)->DACC_LCDR) - -#define DACC_CfgAnalogCtrlReg(pDACC,mode) {\ - ASSERT(((mode) & 0xFFFCFF3C)==0, "DACC bad analog control config");\ - (pDACC)->DACC_ACR = (mode);\ - } - -#define DACC_CfgExtModeReg(pDACC, extmode) {\ - ASSERT(((extmode) & 0xFF00FFFE)==0, "DACC bad extended mode config");\ - (pDACC)->DACC_EMR = (extmode);\ - } - -#define DACC_GetAnalogCtrlReg(pDACC) ((pDACC)->DACC_ACR) - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -extern void DACC_Initialize (Dacc *pDACC, - uint8_t idDACC, - uint8_t trgEn, - uint8_t trgSel, - uint8_t word, - uint8_t sleepMode, - uint32_t mck, - uint8_t refresh,/*refresh period*/ - uint8_t user_sel,/*user channel selection*/ - uint32_t startup - ); - - -extern void DACC_SetConversionData(Dacc *pDACC, uint32_t data); - -#endif //#ifndef DACC_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/efc/efc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/efc/efc.c deleted file mode 100644 index 56ace4b0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/efc/efc.c +++ /dev/null @@ -1,286 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup efc_module Working with Enhanced Embedded Flash - * The EEFC driver provides the interface to configure and use the EEFC - * peripheral. - * - * The user needs to set the number of wait states depending on the frequency used.\n - * Configure number of cycles for flash read/write operations in the FWS field of EEFC_FMR. - * - * It offers a function to send flash command to EEFC and waits for the - * flash to be ready. - * - * To send flash command, the user could do in either of following way: - *
    - *
  • Write a correct key, command and argument in EEFC_FCR.
    • - *
  • Or, Use IAP (In Application Programming) function which is executed from - * ROM directly, this allows flash programming to be done by code running in flash.
    • - *
  • Once the command is achieved, it can be detected even by polling EEFC_FSR or interrupt. - *
- * - * The command argument could be a page number,GPNVM number or nothing, it depends on - * the command itself. Some useful functions in this driver could help user tranlate physical - * flash address into a page number and vice verse. - * - * For more accurate information, please look at the EEFC section of the - * Datasheet. - * - * Related files :\n - * \ref efc.c\n - * \ref efc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of Emhance embedded Flash (EEFC) controller. - * - */ - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include -#include "efc.h" -#include -#include - - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Enables the flash ready interrupt source on the EEFC peripheral. - * - * \param efc Pointer to a Efc instance - */ -void EFC_EnableFrdyIt(Efc *efc) -{ - efc->EEFC_FMR |= EEFC_FMR_FRDY; -} - -/** - * \brief Disables the flash ready interrupt source on the EEFC peripheral. - * - * \param efc Pointer to a Efc instance - */ - -void EFC_DisableFrdyIt(Efc *efc) -{ - efc->EEFC_FMR &= ~EEFC_FMR_FRDY; -} - - -/** - * \brief Set read/write wait state on the EEFC perpherial. - * - * \param efc Pointer to a Efc instance - * \param cycles the number of wait states in cycle. - */ - -void EFC_SetWaitState(Efc *efc, uint8_t cycles) -{ - uint32_t value; - value = efc->EEFC_FMR; - value &= ~EEFC_FMR_FWS; - value |= cycles << 8; - efc->EEFC_FMR = value; -} - -/** - * \brief Returns the current status of the EEFC. - * - * \note Keep in mind that this function clears the value of some status bits (LOCKE, PROGE). - * - * \param efc Pointer to a Efc instance - */ -uint32_t EFC_GetStatus(Efc *efc) -{ - return efc->EEFC_FSR; -} - -/** - * \brief Returns the result of the last executed command. - * - * \param efc Pointer to a Efc instance - */ -uint32_t EFC_GetResult(Efc *efc) { - - return efc->EEFC_FRR; -} - -/** - * \brief Translates the given address page and offset values. - * \note The resulting values are stored in the provided variables if they are not null. - * - * \param efc Pointer to a Efc instance - * \param address Address to translate. - * \param pPage First page accessed. - * \param pOffset Byte offset in first page. - */ -void EFC_TranslateAddress( - Efc **efc, - uint32_t address, - unsigned short *pPage, - unsigned short *pOffset) -{ - Efc *pEfc; - unsigned short page; - unsigned short offset; - - SANITY_CHECK(address >= AT91C_IFLASH); - SANITY_CHECK(address <= (AT91C_IFLASH + AT91C_IFLASH_SIZE)); - - pEfc = EFC; - page = (address - AT91C_IFLASH) / AT91C_IFLASH_PAGE_SIZE; - offset = (address - AT91C_IFLASH) % AT91C_IFLASH_PAGE_SIZE; - - TRACE_DEBUG("Translated 0x%08X to page=%d and offset=%d\n\r", address, page, offset); - // Store values - if (pEfc) { - *efc = pEfc; - } - if (pPage) { - *pPage = page; - } - if (pOffset) { - *pOffset = offset; - } -} - -/** - * \brief Computes the address of a flash access given the page and offset. - * - * \param efc Pointer to a Efc instance - * \param page Page number. - * \param offset Byte offset inside page. - * \param pAddress Computed address (optional). - */ -void EFC_ComputeAddress( - Efc *efc, - unsigned short page, - unsigned short offset, - uint32_t *pAddress) -{ - uint32_t address; - SANITY_CHECK(efc); - SANITY_CHECK(page <= AT91C_IFLASH_NB_OF_PAGES); - SANITY_CHECK(offset < AT91C_IFLASH_PAGE_SIZE); - // Compute address - address = AT91C_IFLASH + page * AT91C_IFLASH_PAGE_SIZE + offset; - // Store result - if (pAddress) { - *pAddress = address; - } -} - -/** - * \brief Starts the executing the given command on the EEFC and returns as soon as the command is started. - * - * \note It does NOT set the FMCN field automatically. - * \param efc Pointer to a Efc instance - * \param command Command to execute. - * \param argument Command argument (should be 0 if not used). - */ -void EFC_StartCommand(Efc *efc, uint8_t command, unsigned short argument) -{ - // Check command & argument - switch (command) { - - case EFC_FCMD_WP: - case EFC_FCMD_WPL: - case EFC_FCMD_EWP: - case EFC_FCMD_EWPL: - case EFC_FCMD_SLB: - case EFC_FCMD_CLB: - ASSERT(argument < AT91C_IFLASH_NB_OF_PAGES, - "-F- Embedded flash has only %d pages\n\r", - AT91C_IFLASH_NB_OF_PAGES); - break; - - case EFC_FCMD_SFB: - case EFC_FCMD_CFB: - ASSERT(argument < 2, "-F- Embedded flash has only %d GPNVMs\n\r", 2); - break; - - case EFC_FCMD_GETD: - case EFC_FCMD_EA: - case EFC_FCMD_GLB: - case EFC_FCMD_GFB: - case EFC_FCMD_STUI: - ASSERT(argument == 0, "-F- Argument is meaningless for the given command.\n\r"); - break; - - default: ASSERT(0, "-F- Unknown command %d\n\r", command); - } - - // Start command Embedded flash - ASSERT((efc->EEFC_FSR & EEFC_FMR_FRDY) == EEFC_FMR_FRDY, "-F- EEFC is not ready\n\r"); - efc->EEFC_FCR = (0x5A << 24) | (argument << 8) | command; -} - -/** - * \brief Performs the given command and wait until its completion (or an error). - * - * \param efc Pointer to a Efc instance - * \param command Command to perform. - * \param argument Optional command argument. - * \return 0 if successful, otherwise returns an error code. - */ - -uint8_t EFC_PerformCommand(Efc *efc, uint8_t command, unsigned short argument) -{ - -#if defined(flash) || defined(USE_IAP_FEATURE) - // Pointer on IAP function in ROM - static uint32_t (*IAP_PerformCommand)(uint32_t, uint32_t); - IAP_PerformCommand = (uint32_t (*)(uint32_t, uint32_t)) *((uint32_t *) CHIP_FLASH_IAP_ADDRESS); - IAP_PerformCommand(0, (0x5A << 24) | (argument << 8) | command); - return (efc->EEFC_FSR & (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE)); - -#else - uint32_t status; - efc->EEFC_FCR = (0x5A << 24) | (argument << 8) | command; - do { - - status = efc->EEFC_FSR; - } - while ((status & EEFC_FSR_FRDY) != EEFC_FSR_FRDY); - - return (status & (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE)); -#endif -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/efc/efc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/efc/efc.h deleted file mode 100644 index 84fabc38..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/efc/efc.h +++ /dev/null @@ -1,112 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * Interface for configuration the Enhanced Embedded Flash Controller (EEFC) peripheral. - * - * \par Usage - * - * -# Enable/disable %flash ready interrupt sources using EFC_EnableFrdyIt() - * and EFC_DisableFrdyIt(). - * -# Translates the given address into which EEFC, page and offset values - * for difference density %flash memory using EFC_TranslateAddress(). - * -# Computes the address of a %flash access given the EFC, page and offset - * for difference density %flash memory using EFC_ComputeAddress(). - * -# Start the executing command with EFC_StartCommand() - * -# Retrieve the current status of the EFC using EFC_GetStatus(). - * -# Retrieve the result of the last executed command with EFC_GetResult(). - */ - -#ifndef EFC_H -#define EFC_H - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ -/* EFC command */ -#define EFC_FCMD_GETD 0x00 -#define EFC_FCMD_WP 0x01 -#define EFC_FCMD_WPL 0x02 -#define EFC_FCMD_EWP 0x03 -#define EFC_FCMD_EWPL 0x04 -#define EFC_FCMD_EA 0x05 -#define EFC_FCMD_SLB 0x08 -#define EFC_FCMD_CLB 0x09 -#define EFC_FCMD_GLB 0x0A -#define EFC_FCMD_SFB 0x0B -#define EFC_FCMD_CFB 0x0C -#define EFC_FCMD_GFB 0x0D -#define EFC_FCMD_STUI 0x0E -#define EFC_FCMD_SPUI 0x0F - -/* The IAP function entry addreass */ -#define CHIP_FLASH_IAP_ADDRESS (0x00800008) - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void EFC_EnableFrdyIt(Efc *efc); - -extern void EFC_DisableFrdyIt(Efc *efc); - -extern void EFC_SetWaitState(Efc *efc, uint8_t cycles); - -extern void EFC_TranslateAddress( - Efc **pEfc, - uint32_t address, - unsigned short *pPage, - unsigned short *pOffset); - -extern void EFC_ComputeAddress( - Efc *efc, - unsigned short page, - unsigned short offset, - uint32_t *pAddress); - -extern void EFC_StartCommand( - Efc *efc, - uint8_t command, - unsigned short argument); - -extern uint8_t EFC_PerformCommand( - Efc *efc, - uint8_t command, - unsigned short argument); - -extern uint32_t EFC_GetStatus(Efc *efc); - -extern uint32_t EFC_GetResult(Efc *efc); - -#endif //#ifndef EFC_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/flash/flashd.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/flash/flashd.c deleted file mode 100644 index c0e66913..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/flash/flashd.c +++ /dev/null @@ -1,494 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup flashd_module Flash Memory Interface - * The flash driver manages the programming, erasing, locking and unlocking sequences - * with dedicated commands. - * - * To implement flash programing operation, the user has to follow these few steps : - *
    - *
  • Configue flash wait states to initializes the flash.
    • - *
  • Checks whether a region to be programmed is locked.
    • - *
  • Unlocks the user region to be programmed if the region have locked before.
    • - *
  • Erases the user page before program (optional).
    • - *
  • Writes the user page from the page buffer.
    • - *
  • Locks the region of programmed area if any.
    • - *
- * - * Writing 8-bit and 16-bit data is not allowed and may lead to unpredictable data corruption. - * A check of this validity and padding for 32-bit alignment should be done in write algorithm. - - * Lock/unlock range associated with the user address range is automatically translated. - * - * This security bit can be enabled through the command "Set General Purpose NVM Bit 0". - * - * A 128-bit factory programmed unique ID could be read to serve several purposes. - * - * The driver accesses the flash memory by calling the lowlevel module provided in \ref efc_module. - * For more accurate information, please look at the EEFC section of the Datasheet. - * - * Related files :\n - * \ref flashd.c\n - * \ref flashd.h.\n - * \ref efc.c\n - * \ref efc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * The flash driver provides the unified interface for flash program operations. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "flashd.h" -#include - -#include -#include -#include -#include - -#include - - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Computes the lock range associated with the given address range. - * - * \param start Start address of lock range. - * \param end End address of lock range. - * \param pActualStart Actual start address of lock range. - * \param pActualEnd Actual end address of lock range. - */ -static void ComputeLockRange( - uint32_t start, - uint32_t end, - uint32_t *pActualStart, - uint32_t *pActualEnd) -{ - Efc *pStartEfc, *pEndEfc; - uint16_t startPage, endPage; - uint16_t numPagesInRegion; - uint16_t actualStartPage, actualEndPage; - - // Convert start and end address in page numbers - EFC_TranslateAddress(&pStartEfc, start, &startPage, 0); - EFC_TranslateAddress(&pEndEfc, end, &endPage, 0); - - // Find out the first page of the first region to lock - numPagesInRegion = AT91C_IFLASH_LOCK_REGION_SIZE / AT91C_IFLASH_PAGE_SIZE; - actualStartPage = startPage - (startPage % numPagesInRegion); - actualEndPage = endPage; - if ((endPage % numPagesInRegion) != 0) { - - actualEndPage += numPagesInRegion - (endPage % numPagesInRegion); - } - // Store actual page numbers - EFC_ComputeAddress(pStartEfc, actualStartPage, 0, pActualStart); - EFC_ComputeAddress(pEndEfc, actualEndPage, 0, pActualEnd); - TRACE_DEBUG("Actual lock range is 0x%06X - 0x%06X\n\r", *pActualStart, *pActualEnd); -} - - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initializes the flash driver. - * - * \param mck Master clock frequency in Hz. - */ - -void FLASHD_Initialize(uint32_t mck) -{ - EFC_DisableFrdyIt(EFC); - if ((mck/1000000) >= 64) { - EFC_SetWaitState(EFC, 2); - } - else if ((mck/1000000) >= 50) { - EFC_SetWaitState(EFC, 1); - } - else { - EFC_SetWaitState(EFC, 0); - } -} - -/** - * \brief Erases the entire flash. - * - * \param address Flash start address. - * \return 0 if successful; otherwise returns an error code. - */ -uint8_t FLASHD_Erase(uint32_t address) -{ - Efc *pEfc; - uint16_t page; - uint16_t offset; - uint8_t error; - SANITY_CHECK((address >=AT91C_IFLASH) || (address <= (AT91C_IFLASH + AT91C_IFLASH_SIZE))); - // Translate write address - EFC_TranslateAddress(&pEfc, address, &page, &offset); - error = EFC_PerformCommand(pEfc, EFC_FCMD_EA, 0); - return error; -} - - -static uint8_t pPageBuffer[AT91C_IFLASH_PAGE_SIZE]; -/** - * \brief Writes a data buffer in the internal flash - * - * \note This function works in polling mode, and thus only returns when the - * data has been effectively written. - * \param address Write address. - * \param pBuffer Data buffer. - * \param size Size of data buffer in bytes. - * \return 0 if successful, otherwise returns an error code. - */ -uint8_t FLASHD_Write( - uint32_t address, - const void *pBuffer, - uint32_t size) -{ - Efc *pEfc; - uint16_t page; - uint16_t offset; - uint32_t writeSize; - uint32_t pageAddress; - uint16_t padding; - uint8_t error; - - uint32_t sizeTmp; - uint32_t *pAlignedDestination; - uint32_t *pAlignedSource; - - SANITY_CHECK(pBuffer); - SANITY_CHECK(address >=AT91C_IFLASH); - SANITY_CHECK((address + size) <= (AT91C_IFLASH + AT91C_IFLASH_SIZE)); - // Translate write address - EFC_TranslateAddress(&pEfc, address, &page, &offset); - - // Write all pages - while (size > 0) { - - // Copy data in temporary buffer to avoid alignment problems - writeSize = min(AT91C_IFLASH_PAGE_SIZE - offset, size); - EFC_ComputeAddress(pEfc, page, 0, &pageAddress); - padding = AT91C_IFLASH_PAGE_SIZE - offset - writeSize; - - // Pre-buffer data - memcpy(pPageBuffer, (void *) pageAddress, offset); - - // Buffer data - memcpy(pPageBuffer + offset, pBuffer, writeSize); - - // Post-buffer data - memcpy(pPageBuffer + offset + writeSize, (void *) (pageAddress + offset + writeSize), padding); - - // Write page - // Writing 8-bit and 16-bit data is not allowed - // and may lead to unpredictable data corruption - pAlignedDestination = (uint32_t*)pageAddress; - pAlignedSource = (uint32_t*)pPageBuffer; - sizeTmp = AT91C_IFLASH_PAGE_SIZE; - while (sizeTmp >= 4) { - - *pAlignedDestination++ = *pAlignedSource++; - sizeTmp -= 4; - } - - // Send writing command - error = EFC_PerformCommand(pEfc, EFC_FCMD_EWP, page); - if (error) { - - return error; - } - - // Progression - address += AT91C_IFLASH_PAGE_SIZE; - pBuffer = (void *) ((uint32_t) pBuffer + writeSize); - size -= writeSize; - page++; - offset = 0; - } - - return 0; -} -/** - * \brief Locks all the regions in the given address range. The actual lock range is - * reported through two output parameters. - * \param address Start address of lock range. - * \param end End address of lock range. - * \param pActualStart Start address of the actual lock range (optional). - * \param pActualEnd End address of the actual lock range (optional). - * \return 0 if successful, otherwise returns an error code. - */ -uint8_t FLASHD_Lock( - uint32_t start, - uint32_t end, - uint32_t *pActualStart, - uint32_t *pActualEnd) -{ - Efc *pEfc; - uint32_t actualStart, actualEnd; - uint16_t startPage, endPage; - uint8_t error; - uint16_t numPagesInRegion = AT91C_IFLASH_LOCK_REGION_SIZE / AT91C_IFLASH_PAGE_SIZE; - - // Compute actual lock range and store it - ComputeLockRange(start, end, &actualStart, &actualEnd); - if (pActualStart) { - - *pActualStart = actualStart; - } - if (pActualEnd) { - - *pActualEnd = actualEnd; - } - - // Compute page numbers - EFC_TranslateAddress(&pEfc, actualStart, &startPage, 0); - EFC_TranslateAddress(0, actualEnd, &endPage, 0); - - // Lock all pages - while (startPage < endPage) { - - error = EFC_PerformCommand(pEfc, EFC_FCMD_SLB, startPage); - if (error) { - - return error; - } - startPage += numPagesInRegion; - } - - return 0; -} - -/** - * \brief Unlocks all the regions in the given address range. The actual unlock range is - * reported through two output parameters. - * \param address Start address of unlock range. - * \param end End address of unlock range. - * \param pActualStart Start address of the actual unlock range (optional). - * \param pActualEnd End address of the actual unlock range (optional). - * \return 0 if successful, otherwise returns an error code. - */ -uint8_t FLASHD_Unlock( - uint32_t start, - uint32_t end, - uint32_t *pActualStart, - uint32_t *pActualEnd) -{ - Efc *pEfc; - uint32_t actualStart, actualEnd; - uint16_t startPage, endPage; - uint8_t error; - uint16_t numPagesInRegion = AT91C_IFLASH_LOCK_REGION_SIZE / AT91C_IFLASH_PAGE_SIZE; - - // Compute actual unlock range and store it - ComputeLockRange(start, end, &actualStart, &actualEnd); - if (pActualStart) { - - *pActualStart = actualStart; - } - if (pActualEnd) { - - *pActualEnd = actualEnd; - } - - // Compute page numbers - EFC_TranslateAddress(&pEfc, actualStart, &startPage, 0); - EFC_TranslateAddress(0, actualEnd, &endPage, 0); - - // Unlock all pages - while (startPage < endPage) { - - error = EFC_PerformCommand(pEfc, EFC_FCMD_CLB, startPage); - if (error) { - - return error; - } - startPage += numPagesInRegion; - } - return 0; -} - -/** - * \brief Returns the number of locked regions inside the given address range. - * - * \param address Start address of range - * \param end End address of range. - */ -uint8_t FLASHD_IsLocked(uint32_t start, uint32_t end) -{ - Efc *pEfc; - uint16_t startPage, endPage; - uint8_t startRegion, endRegion; - uint32_t numPagesInRegion; - uint32_t status; - uint8_t error; - uint32_t numLockedRegions = 0; - - SANITY_CHECK(end >= start); - SANITY_CHECK((start >=AT91C_IFLASH) && (end <= AT91C_IFLASH + AT91C_IFLASH_SIZE)); - - // Compute page numbers - EFC_TranslateAddress(&pEfc, start, &startPage, 0); - EFC_TranslateAddress(0, end, &endPage, 0); - - // Compute region numbers - numPagesInRegion = AT91C_IFLASH_LOCK_REGION_SIZE / AT91C_IFLASH_PAGE_SIZE; - startRegion = startPage / numPagesInRegion; - endRegion = endPage / numPagesInRegion; - if ((endPage % numPagesInRegion) != 0) { - - endRegion++; - } - - // Retrieve lock status - error = EFC_PerformCommand(pEfc, EFC_FCMD_GLB, 0); - ASSERT(!error, "-F- Error while trying to fetch lock bits status (0x%02X)\n\r", error); - status = EFC_GetResult(pEfc); - - // Check status of each involved region - while (startRegion < endRegion) { - - if ((status & (1 << startRegion)) != 0) { - - numLockedRegions++; - } - startRegion++; - } - - return numLockedRegions; -} - -/** - * \brief Check if the given GPNVM bit is set or not. - * - * \param gpnvm GPNVM bit index. - * \returns 1 if the given GPNVM bit is currently set; otherwise returns 0. - */ -uint8_t FLASHD_IsGPNVMSet(uint8_t gpnvm) -{ - uint8_t error; - uint32_t status; - - SANITY_CHECK(gpnvm < 2); - - // Get GPNVMs status - error = EFC_PerformCommand(EFC, EFC_FCMD_GFB, 0); - ASSERT(!error, "-F- Error while trying to fetch GPNVMs status (0x%02X)\n\r", error); - status = EFC_GetResult(EFC); - - // Check if GPNVM is set - if ((status & (1 << gpnvm)) != 0) { - return 1; - } - else { - return 0; - } -} -/** - * \brief Sets the selected GPNVM bit. - * - * \param gpnvm GPNVM bit index. - * \returns 0 if successful; otherwise returns an error code. - */ -uint8_t FLASHD_SetGPNVM(uint8_t gpnvm) -{ - SANITY_CHECK(gpnvm < 2); - - if (!FLASHD_IsGPNVMSet(gpnvm)) { - - return EFC_PerformCommand(EFC, EFC_FCMD_SFB, gpnvm); - } - else { - - return 0; - } -} - -/** - * \brief Clears the selected GPNVM bit. - * - * \param gpnvm GPNVM bit index. - * \returns 0 if successful; otherwise returns an error code. - */ -uint8_t FLASHD_ClearGPNVM(uint8_t gpnvm) -{ - SANITY_CHECK(gpnvm < 2); - - if (FLASHD_IsGPNVMSet(gpnvm)) { - - return EFC_PerformCommand(EFC, EFC_FCMD_CFB, gpnvm); - } - else { - - return 0; - } -} -/** - * \brief Read the unique ID. - * - * \param uniqueID pointer on a 4bytes char containing the unique ID value. - * \returns 0 if successful; otherwise returns an error code. - */ -uint8_t FLASHD_ReadUniqueID (uint32_t * uniqueID) -{ - uint8_t error; - SANITY_CHECK(uniqueID != NULL); - - uniqueID[0] = 0; - uniqueID[1] = 0; - uniqueID[2] = 0; - uniqueID[3] = 0; - - EFC_StartCommand(EFC, EFC_FCMD_STUI, 0); - - uniqueID[0] = *(uint32_t *)AT91C_IFLASH; - uniqueID[1] = *(uint32_t *)(AT91C_IFLASH + 4); - uniqueID[2] = *(uint32_t *)(AT91C_IFLASH + 8); - uniqueID[3] = *(uint32_t *)(AT91C_IFLASH + 12); - - error = EFC_PerformCommand(EFC, EFC_FCMD_SPUI, 0); - if (error) return error; - - return 0; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/flash/flashd.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/flash/flashd.h deleted file mode 100644 index 14b765b2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/flash/flashd.h +++ /dev/null @@ -1,84 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- -*/ - -/** - * \file - * - * The flash driver provides the unified interface for flash program operations. - * - */ - -#ifndef FLASHD_H -#define FLASHD_H - -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void FLASHD_Initialize(uint32_t mck); - -extern uint8_t FLASHD_Erase(uint32_t address); - -extern uint8_t FLASHD_Write( - uint32_t address, - const void *pBuffer, - uint32_t size); - -extern uint8_t FLASHD_Lock( - uint32_t start, - uint32_t end, - uint32_t *pActualStart, - uint32_t *pActualEnd); - -extern uint8_t FLASHD_Unlock( - uint32_t start, - uint32_t end, - uint32_t *pActualStart, - uint32_t *pActualEnd); - -extern uint8_t FLASHD_IsLocked( - uint32_t start, - uint32_t end); - -extern uint8_t FLASHD_SetGPNVM(uint8_t gpnvm); - -extern uint8_t FLASHD_ClearGPNVM(uint8_t gpnvm); - -extern uint8_t FLASHD_IsGPNVMSet(uint8_t gpnvm); - -#define FLASHD_IsSecurityBitSet() FLASHD_IsGPNVMSet(0) - -#define FLASHD_SetSecurityBit() FLASHD_SetGPNVM(0) - -extern uint8_t FLASHD_ReadUniqueID(uint32_t * uniqueID); - -#endif //#ifndef FLASHD_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/color.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/color.h deleted file mode 100644 index 3258b82c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/color.h +++ /dev/null @@ -1,85 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef COLOR_H -#define COLOR_H - -/** - * \file - * - * RGB 24-bits color table definition. - * - */ - -/* - * RGB 24 Bpp - * RGB 888 - * R7R6R5R4 R3R2R1R0 G7G6G5G4 G3G2G1G0 B7B6B5B4 B3B2B1B0 - */ -#define COLOR_BLACK 0x000000 -#define COLOR_WHITE 0xFFFFFF - -#define COLOR_BLUE 0x0000FF -#define COLOR_GREEN 0x00FF00 -#define COLOR_RED 0xFF0000 - -#define COLOR_NAVY 0x000080 -#define COLOR_DARKBLUE 0x00008B -#define COLOR_DARKGREEN 0x006400 -#define COLOR_DARKCYAN 0x008B8B -#define COLOR_CYAN 0x00FFFF -#define COLOR_TURQUOISE 0x40E0D0 -#define COLOR_INDIGO 0x4B0082 -#define COLOR_DARKRED 0x800000 -#define COLOR_OLIVE 0x808000 -#define COLOR_GRAY 0x808080 -#define COLOR_SKYBLUE 0x87CEEB -#define COLOR_BLUEVIOLET 0x8A2BE2 -#define COLOR_LIGHTGREEN 0x90EE90 -#define COLOR_DARKVIOLET 0x9400D3 -#define COLOR_YELLOWGREEN 0x9ACD32 -#define COLOR_BROWN 0xA52A2A -#define COLOR_DARKGRAY 0xA9A9A9 -#define COLOR_SIENNA 0xA0522D -#define COLOR_LIGHTBLUE 0xADD8E6 -#define COLOR_GREENYELLOW 0xADFF2F -#define COLOR_SILVER 0xC0C0C0 -#define COLOR_LIGHTGREY 0xD3D3D3 -#define COLOR_LIGHTCYAN 0xE0FFFF -#define COLOR_VIOLET 0xEE82EE -#define COLOR_AZUR 0xF0FFFF -#define COLOR_BEIGE 0xF5F5DC -#define COLOR_MAGENTA 0xFF00FF -#define COLOR_TOMATO 0xFF6347 -#define COLOR_GOLD 0xFFD700 -#define COLOR_ORANGE 0xFFA500 -#define COLOR_SNOW 0xFFFAFA -#define COLOR_YELLOW 0xFFFF00 - -#endif /* #define COLOR_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/draw.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/draw.c deleted file mode 100644 index 4e1975be..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/draw.c +++ /dev/null @@ -1,333 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of draw function on LCD, Include draw text, image - * and basic shapes (line, rectangle, circle). - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include - -#include "draw.h" -#include "font.h" -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Fills the given LCD buffer with a particular color. - * - * \param color Fill color. - */ -void LCDD_Fill(uint32_t color) -{ - uint32_t i; - - LCD_SetCursor(0, 0); - LCD_WriteRAM_Prepare(); - for (i = 0; i < (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT); i++) { - - LCD_WriteRAM(color); - } -} - -/** - * \brief Draw a pixel on LCD of given color. - * - * \param x X-coordinate of pixel. - * \param y Y-coordinate of pixel. - * \param color Pixel color. - */ -void LCDD_DrawPixel( - uint32_t x, - uint32_t y, - uint32_t color) -{ - LCD_SetCursor(x, y); - LCD_WriteRAM_Prepare(); - LCD_WriteRAM(color); -} - -/** - * \brief Read a pixel from LCD. - * - * \param x X-coordinate of pixel. - * \param y Y-coordinate of pixel. - * - * \return color Readed pixel color. - */ -uint32_t LCDD_ReadPixel( - uint32_t x, - uint32_t y) -{ - uint32_t color; - - LCD_SetCursor(x, y); - LCD_ReadRAM_Prepare(); - color = LCD_ReadRAM(); - - return color; -} - -/* - * \brief Draw a line on LCD, horizontal and vertical line are supported. - * - * \param x X-coordinate of line start. - * \param y Y-coordinate of line start. - * \param length line length. - * \param direction line direction: 0 - horizontal, 1 - vertical. - * \param color Pixel color. - */ -void LCDD_DrawLine( - uint32_t x, - uint32_t y, - uint32_t length, - uint32_t direction, - uint32_t color) -{ - uint32_t i = 0; - - LCD_SetCursor(x, y); - - if(direction == DIRECTION_HLINE) { - LCD_WriteRAM_Prepare(); - for(i = 0; i < length; i++) { - LCD_WriteRAM(color); - } - } - else { - for(i = 0; i < length; i++) { - LCD_WriteRAM_Prepare(); - LCD_WriteRAM(color); - y++; - LCD_SetCursor(x, y); - } - } -} - -/* - * \brief Draws a rectangle on LCD, at the given coordinates. - * - * \param x X-coordinate of upper-left rectangle corner. - * \param y Y-coordinate of upper-left rectangle corner. - * \param width Rectangle width in pixels. - * \param height Rectangle height in pixels. - * \param color Rectangle color. - */ -void LCDD_DrawRectangle( - uint32_t x, - uint32_t y, - uint32_t width, - uint32_t height, - uint32_t color) -{ - LCDD_DrawLine(x, y, width, DIRECTION_HLINE, color); - LCDD_DrawLine(x, (y + height), width, DIRECTION_HLINE, color); - - LCDD_DrawLine(x, y, height, DIRECTION_VLINE, color); - LCDD_DrawLine((x + width), y, height, DIRECTION_VLINE, color); -} - -/* - * \brief Draws a rectangle with fill inside on LCD, at the given coordinates. - * - * \param x X-coordinate of upper-left rectangle corner. - * \param y Y-coordinate of upper-left rectangle corner. - * \param width Rectangle width in pixels. - * \param height Rectangle height in pixels. - * \param color Rectangle color. - */ -void LCDD_DrawRectangleWithFill( - uint32_t x, - uint32_t y, - uint32_t width, - uint32_t height, - uint32_t color) -{ - uint32_t i; - - for (i = 0; i < height; i++) { - LCDD_DrawLine(x, y+i, width, DIRECTION_HLINE, color); - } -} - -/** - * \brief Draws a circle on LCD, at the given coordinates. - * - * \param x X-coordinate of circle center. - * \param y Y-coordinate of circle center. - * \param r circle radius. - * \param color circle color. - */ -void LCDD_DrawCircle( - uint32_t x, - uint32_t y, - uint32_t r, - uint32_t color) -{ - signed int d; /* Decision Variable */ - uint32_t curX; /* Current X Value */ - uint32_t curY; /* Current Y Value */ - - d = 3 - (r << 1); - curX = 0; - curY = r; - - while (curX <= curY) - { - LCDD_DrawPixel(x + curX, y + curY, color); - LCDD_DrawPixel(x + curX, y - curY, color); - LCDD_DrawPixel(x - curX, y + curY, color); - LCDD_DrawPixel(x - curX, y - curY, color); - LCDD_DrawPixel(x + curY, y + curX, color); - LCDD_DrawPixel(x + curY, y - curX, color); - LCDD_DrawPixel(x - curY, y + curX, color); - LCDD_DrawPixel(x - curY, y - curX, color); - - if (d < 0) { - d += (curX << 2) + 6; - } - else { - d += ((curX - curY) << 2) + 10; - curY--; - } - curX++; - } -} - -/** - * \brief Draws a string inside a LCD buffer, at the given coordinates. Line breaks - * will be honored. - * - * \param x X-coordinate of string top-left corner. - * \param y Y-coordinate of string top-left corner. - * \param pString String to display. - * \param color String color. - */ -void LCDD_DrawString( - uint32_t x, - uint32_t y, - const uint8_t *pString, - uint32_t color) -{ - unsigned xorg = x; - - while (*pString != 0) { - if (*pString == '\n') { - - y += gFont.height + 2; - x = xorg; - } - else { - - LCDD_DrawChar(x, y, *pString, color); - x += gFont.width + 2; - } - pString++; - } -} - -/** - * \brief Returns the width & height in pixels that a string will occupy on the screen - * if drawn using LCDD_DrawString. - * - * \param pString String. - * \param pWidth Pointer for storing the string width (optional). - * \param pHeight Pointer for storing the string height (optional). - * - * \return String width in pixels. - */ -void LCDD_GetStringSize( - const uint8_t *pString, - uint32_t *pWidth, - uint32_t *pHeight) -{ - uint32_t width = 0; - uint32_t height = gFont.height; - - while (*pString != 0) { - - if (*pString == '\n') { - - height += gFont.height + 2; - } - else { - - width += gFont.width + 2; - } - pString++; - } - - if (width > 0) width -= 2; - - if (pWidth) *pWidth = width; - if (pHeight) *pHeight = height; -} - -/* - * \brief Draw a raw image at given position on LCD. - * - * \param x X-coordinate of image start. - * \param y Y-coordinate of image start. - * \param pImage Image buffer. - * \param width Image width. - * \param height Image height. - */ -void LCDD_DrawImage( - uint32_t x, - uint32_t y, - const uint8_t *pImage, - uint32_t width, - uint32_t height) -{ - uint32_t row, col; - - for(row = y; row < (y + height); row++) { - LCD_SetCursor(x, row); - LCD_WriteRAM_Prepare(); - for(col = x; col < (x + width); col++) { - LCD_D() = *pImage++; - LCD_D() = *pImage++; - LCD_D() = *pImage++; - } - } -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/draw.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/draw.h deleted file mode 100644 index e7fb7a57..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/draw.h +++ /dev/null @@ -1,114 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - /** - * \file - * - * Interface for draw function on LCD. - * - */ - -#ifndef DRAW_H -#define DRAW_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** Horizontal direction line definition */ -#define DIRECTION_HLINE 0 -/** Vertical direction line definition */ -#define DIRECTION_VLINE 1 - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -extern void LCDD_Fill(uint32_t color); - -extern void LCDD_DrawPixel( - uint32_t x, - uint32_t y, - uint32_t c); - -extern uint32_t LCDD_ReadPixel( - uint32_t x, - uint32_t y); - -extern void LCDD_DrawLine( - uint32_t x, - uint32_t y, - uint32_t length, - uint32_t direction, - uint32_t color); - -extern void LCDD_DrawRectangle( - uint32_t x, - uint32_t y, - uint32_t width, - uint32_t height, - uint32_t color); - -extern void LCDD_DrawRectangleWithFill( - uint32_t x, - uint32_t y, - uint32_t width, - uint32_t height, - uint32_t color); - -extern void LCDD_DrawCircle( - uint32_t x, - uint32_t y, - uint32_t r, - uint32_t color); - -extern void LCDD_DrawString( - uint32_t x, - uint32_t y, - const uint8_t *pString, - uint32_t color); - -extern void LCDD_GetStringSize( - const uint8_t *pString, - uint32_t *pWidth, - uint32_t *pHeight); - -extern void LCDD_DrawImage( - uint32_t x, - uint32_t y, - const uint8_t *pImage, - uint32_t width, - uint32_t height); - -#endif /* #ifndef DRAW_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/font.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/font.c deleted file mode 100644 index 4a161298..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/font.c +++ /dev/null @@ -1,95 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of draw font on LCD. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "color.h" -#include "font.h" -#include "draw.h" -#include "font10x14.h" -#include - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** Global variable describing the font being instancied. */ -const Font gFont = {10, 14}; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Draws an ASCII character on LCD. - * - * \param x X-coordinate of character upper-left corner. - * \param y Y-coordinate of character upper-left corner. - * \param c Character to output. - * \param color Character color. -*/ -void LCDD_DrawChar( - uint32_t x, - uint32_t y, - uint8_t c, - uint32_t color) -{ - uint32_t row, col; - - SANITY_CHECK((c >= 0x20) && (c <= 0x7F)); - - for (col = 0; col < 10; col++) { - - for (row = 0; row < 8; row++) { - - if ((pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1) { - - LCDD_DrawPixel(x+col, y+row, color); - } - } - for (row = 0; row < 6; row++) { - - if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1) { - - LCDD_DrawPixel(x+col, y+row+8, color); - } - } - } -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/font.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/font.h deleted file mode 100644 index d46cf6c4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/font.h +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for draw font on LCD. - * - */ - -/** - * - * \section Purpose - * - * The font.h files declares a font structure and a LCDD_DrawChar function - * that must be implemented by a font definition file to be used with the - * LCDD_DrawString method of draw.h. - * - * The font10x14.c implements the necessary variable and function for a 10x14 - * font. - * - * \section Usage - * - * -# Declare a gFont global variable with the necessary Font information. - * -# Implement an LCDD_DrawChar function which displays the specified - * character on the LCD. - * -# Use the LCDD_DrawString method defined in draw.h to display a complete - * string. - */ - -#ifndef FONT_H -#define FONT_H - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - - -/** Describes the font (width, height, supported characters, etc.) used by - * the LCD driver draw API. - */ -typedef struct _Font { - /* Font width in pixels. */ - uint8_t width; - /* Font height in pixels. */ - uint8_t height; -} Font; - -/*---------------------------------------------------------------------------- - * Variables - *----------------------------------------------------------------------------*/ - -/** Global variable describing the font being instancied. */ -extern const Font gFont; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void LCDD_DrawChar( - uint32_t x, - uint32_t y, - uint8_t c, - uint32_t color); - -#endif /* #ifndef FONT_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/font10x14.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/font10x14.h deleted file mode 100644 index 2ce2589e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/font10x14.h +++ /dev/null @@ -1,236 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - /** - * \file - * - * Font 10x14 table definition. - * - */ - -#ifndef LCD_FONT_10x14_H -#define LCD_FONT_10x14_H - -/** Char set of font 10x14 */ -const uint8_t pCharset10x14[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xCC, - 0xFF, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0C, 0xC0, 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, - 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, - 0x0C, 0x60, 0x1E, 0x70, 0x3F, 0x30, 0x33, 0x30, 0xFF, 0xFC, - 0xFF, 0xFC, 0x33, 0x30, 0x33, 0xF0, 0x39, 0xE0, 0x18, 0xC0, - 0x60, 0x00, 0xF0, 0x0C, 0xF0, 0x3C, 0x60, 0xF0, 0x03, 0xC0, - 0x0F, 0x00, 0x3C, 0x18, 0xF0, 0x3C, 0xC0, 0x3C, 0x00, 0x18, - 0x3C, 0xF0, 0x7F, 0xF8, 0xC3, 0x1C, 0xC7, 0x8C, 0xCF, 0xCC, - 0xDC, 0xEC, 0x78, 0x78, 0x30, 0x30, 0x00, 0xFC, 0x00, 0xCC, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xEC, 0x00, - 0xF8, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0F, 0xC0, 0x3F, 0xF0, 0x78, 0x78, - 0x60, 0x18, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0x60, 0x18, - 0x78, 0x78, 0x3F, 0xF0, 0x0F, 0xC0, 0x00, 0x00, 0x00, 0x00, - 0x0C, 0x60, 0x0E, 0xE0, 0x07, 0xC0, 0x03, 0x80, 0x3F, 0xF8, - 0x3F, 0xF8, 0x03, 0x80, 0x07, 0xC0, 0x0E, 0xE0, 0x0C, 0x60, - 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3F, 0xF0, - 0x3F, 0xF0, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, - 0x00, 0x44, 0x00, 0xEC, 0x00, 0xF8, 0x00, 0x70, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, - 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, - 0x00, 0x18, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x18, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x0C, 0x00, 0x3C, 0x00, 0xF0, 0x03, 0xC0, - 0x0F, 0x00, 0x3C, 0x00, 0xF0, 0x00, 0xC0, 0x00, 0x00, 0x00, - 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0xFC, 0xC1, 0xCC, 0xC3, 0x8C, - 0xC7, 0x0C, 0xCE, 0x0C, 0xFC, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0, - 0x00, 0x00, 0x00, 0x00, 0x30, 0x0C, 0x70, 0x0C, 0xFF, 0xFC, - 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, - 0x30, 0x0C, 0x70, 0x1C, 0xE0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, - 0xC1, 0xCC, 0xC3, 0x8C, 0xE7, 0x0C, 0x7E, 0x0C, 0x3C, 0x0C, - 0x30, 0x30, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x7F, 0xF8, 0x3C, 0xF0, - 0x03, 0xC0, 0x07, 0xC0, 0x0E, 0xC0, 0x1C, 0xC0, 0x38, 0xC0, - 0x70, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xC0, 0x00, 0xC0, - 0xFC, 0x30, 0xFC, 0x38, 0xCC, 0x1C, 0xCC, 0x0C, 0xCC, 0x0C, - 0xCC, 0x0C, 0xCC, 0x0C, 0xCE, 0x1C, 0xC7, 0xF8, 0xC3, 0xF0, - 0x3F, 0xF0, 0x7F, 0xF8, 0xE3, 0x1C, 0xC3, 0x0C, 0xC3, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x9C, 0x71, 0xF8, 0x30, 0xF0, - 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC3, 0xFC, - 0xC7, 0xFC, 0xCE, 0x00, 0xDC, 0x00, 0xF8, 0x00, 0xF0, 0x00, - 0x3C, 0xF0, 0x7F, 0xF8, 0xE7, 0x9C, 0xC3, 0x0C, 0xC3, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0, - 0x3C, 0x00, 0x7E, 0x00, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x1C, - 0xC3, 0x38, 0xC3, 0x70, 0xE7, 0xE0, 0x7F, 0xC0, 0x3F, 0x80, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x60, 0x3C, 0xF0, - 0x3C, 0xF0, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x44, 0x3C, 0xEC, - 0x3C, 0xF8, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, - 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0x00, 0x00, - 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, - 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, - 0x00, 0x00, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x38, 0x70, - 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00, - 0x30, 0x00, 0x70, 0x00, 0xE0, 0x00, 0xC0, 0x00, 0xC1, 0xEC, - 0xC3, 0xEC, 0xC3, 0x00, 0xE6, 0x00, 0x7E, 0x00, 0x3C, 0x00, - 0x30, 0xF0, 0x71, 0xF8, 0xE3, 0x9C, 0xC3, 0x0C, 0xC3, 0xFC, - 0xC3, 0xFC, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0, - 0x3F, 0xFC, 0x7F, 0xFC, 0xE0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0, - 0xC0, 0xC0, 0xC0, 0xC0, 0xE0, 0xC0, 0x7F, 0xFC, 0x3F, 0xFC, - 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0, - 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, - 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x30, 0x30, - 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0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC -}; - -#endif /* #ifdef _LCD_FONT_10x14_h */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/lcdd.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/lcdd.c deleted file mode 100644 index 1d7b158a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/lcdd.c +++ /dev/null @@ -1,149 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of LCD driver, Include LCD initialization, - * LCD on/off and LCD backlight control. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "lcdd.h" -#include -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initializes the LCD controller. - * Configure SMC to access LCD controller at 64MHz MCK. - */ -void LCDD_Initialize(void) -{ - const Pin pPins[] = {BOARD_LCD_PINS}; - Smc *pSmc = SMC; - - /* Enable pins */ - PIO_Configure(pPins, PIO_LISTSIZE(pPins)); - - /* Enable peripheral clock */ - PMC_EnablePeripheral(ID_SMC); - - /* EBI SMC Configuration */ - pSmc->SMC_CS_NUMBER[1].SMC_SETUP = 0 - | ((2 << 0) & SMC_SETUP1_NWE_SETUP) - | ((2 << 8) & SMC_SETUP1_NCS_WR_SETUP) - | ((2 << 16) & SMC_SETUP1_NRD_SETUP) - | ((2 << 24) & SMC_SETUP1_NCS_RD_SETUP) - ; - - pSmc->SMC_CS_NUMBER[1].SMC_PULSE = 0 - | ((4 << 0) & SMC_PULSE1_NWE_PULSE) - | ((4 << 8) & SMC_PULSE1_NCS_WR_PULSE) - | ((10 << 16) & SMC_PULSE1_NRD_PULSE) - | ((10 << 24) & SMC_PULSE1_NCS_RD_PULSE) - ; - - pSmc->SMC_CS_NUMBER[1].SMC_CYCLE = 0 - | ((10 << 0) & SMC_CYCLE1_NWE_CYCLE) - | ((22 << 16) & SMC_CYCLE1_NRD_CYCLE) - ; - - pSmc->SMC_CS_NUMBER[1].SMC_MODE = 0 - | (SMC_MODE1_READ_MODE) - | (SMC_MODE1_WRITE_MODE) - | (0) /* Set 8 bit width. TODO: replace with definition in device header file */ - ; - - /* Initialize LCD controller */ - LCD_Initialize(); - - /* Set LCD backlight */ - LCDD_SetBacklight(2); -} - -/** - * \brief Turn on the LCD. - */ -void LCDD_On(void) -{ - LCD_On(); -} - -/** - * \brief Turn off the LCD. - */ -void LCDD_Off(void) -{ - LCD_Off(); -} - -/** - * \brief Set the backlight of the LCD. - * - * \param level Backlight brightness level [1..16], 1 means maximum brightness. - */ -void LCDD_SetBacklight (uint32_t level) -{ - uint32_t i; - const Pin pPins[] = {BOARD_BACKLIGHT_PIN}; - - /* Ensure valid level */ - level = (level < 1) ? 1 : level; - level = (level > 16) ? 16 : level; - - /* Enable pins */ - PIO_Configure(pPins, PIO_LISTSIZE(pPins)); - - /* Switch off backlight */ - PIO_Clear(pPins); - i = 600 * (BOARD_MCK / 1000000); /* wait for at least 500us */ - while(i--); - - /* Set new backlight level */ - for (i = 0; i < level; i++) { - PIO_Clear(pPins); - PIO_Clear(pPins); - PIO_Clear(pPins); - - PIO_Set(pPins); - PIO_Set(pPins); - PIO_Set(pPins); - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/lcdd.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/lcdd.h deleted file mode 100644 index 8ba19f05..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/lcd/lcdd.h +++ /dev/null @@ -1,52 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for LCD driver. - * - */ - -#ifndef LCDD_H -#define LCDD_H - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void LCDD_Initialize(void); - -extern void LCDD_On(void); - -extern void LCDD_Off(void); - -extern void LCDD_SetBacklight (uint32_t step); - -#endif /* #ifndef LCDD_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio.c deleted file mode 100644 index db13b2b4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio.c +++ /dev/null @@ -1,464 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/// \file - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "pio.h" -#include -#include - -//------------------------------------------------------------------------------ -// Local Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Configures one or more pin(s) of a PIO controller as being controlled by -/// peripheral A. Optionally, the corresponding internal pull-up(s) can be -/// enabled. -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask of one or more pin(s) to configure. -/// \param enablePullUp Indicates if the pin(s) internal pull-up shall be -/// configured. -//------------------------------------------------------------------------------ -static void PIO_SetPeripheralA( - Pio *pio, - unsigned int mask, - unsigned char enablePullUp) -{ - unsigned int abcdsr; - // Disable interrupts on the pin(s) - pio->PIO_IDR = mask; - - // Enable the pull-up(s) if necessary - if (enablePullUp) { - pio->PIO_PUER = mask; - } - else { - - pio->PIO_PUDR = mask; - } - - abcdsr = pio->PIO_ABCDSR[0]; - pio->PIO_ABCDSR[0] &= (~mask & abcdsr); - abcdsr = pio->PIO_ABCDSR[1]; - pio->PIO_ABCDSR[1] &= (~mask & abcdsr); - pio->PIO_PDR = mask; -} - -//------------------------------------------------------------------------------ -/// Configures one or more pin(s) of a PIO controller as being controlled by -/// peripheral B. Optionally, the corresponding internal pull-up(s) can be -/// enabled. -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask of one or more pin(s) to configure. -/// \param enablePullUp Indicates if the pin(s) internal pull-up shall be -/// configured. -//------------------------------------------------------------------------------ -static void PIO_SetPeripheralB( - Pio *pio, - unsigned int mask, - unsigned char enablePullUp) -{ - unsigned int abcdsr; - // Disable interrupts on the pin(s) - pio->PIO_IDR = mask; - - // Enable the pull-up(s) if necessary - if (enablePullUp) { - - pio->PIO_PUER = mask; - } - else { - - pio->PIO_PUDR = mask; - } - - abcdsr = pio->PIO_ABCDSR[0]; - pio->PIO_ABCDSR[0] = (mask | abcdsr); - abcdsr = pio->PIO_ABCDSR[1]; - pio->PIO_ABCDSR[1] &= (~mask & abcdsr); - - pio->PIO_PDR = mask; -} - -//------------------------------------------------------------------------------ -/// Configures one or more pin(s) of a PIO controller as being controlled by -/// peripheral C. Optionally, the corresponding internal pull-up(s) can be -/// enabled. -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask of one or more pin(s) to configure. -/// \param enablePullUp Indicates if the pin(s) internal pull-up shall be -/// configured. -//------------------------------------------------------------------------------ -static void PIO_SetPeripheralC( - Pio *pio, - unsigned int mask, - unsigned char enablePullUp) -{ - unsigned int abcdsr; - // Disable interrupts on the pin(s) - pio->PIO_IDR = mask; - - // Enable the pull-up(s) if necessary - if (enablePullUp) { - - pio->PIO_PUER = mask; - } - else { - - pio->PIO_PUDR = mask; - } - - abcdsr = pio->PIO_ABCDSR[0]; - pio->PIO_ABCDSR[0] &= (~mask & abcdsr); - abcdsr = pio->PIO_ABCDSR[1]; - pio->PIO_ABCDSR[1] = (mask | abcdsr); - - pio->PIO_PDR = mask; -} - -//------------------------------------------------------------------------------ -/// Configures one or more pin(s) of a PIO controller as being controlled by -/// peripheral D. Optionally, the corresponding internal pull-up(s) can be -/// enabled. -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask of one or more pin(s) to configure. -/// \param enablePullUp Indicates if the pin(s) internal pull-up shall be -/// configured. -//------------------------------------------------------------------------------ -static void PIO_SetPeripheralD( - Pio *pio, - unsigned int mask, - unsigned char enablePullUp) -{ - unsigned int abcdsr; - // Disable interrupts on the pin(s) - pio->PIO_IDR = mask; - - // Enable the pull-up(s) if necessary - if (enablePullUp) { - - pio->PIO_PUER = mask; - } - else { - - pio->PIO_PUDR = mask; - } - - abcdsr = pio->PIO_ABCDSR[0]; - pio->PIO_ABCDSR[0] = (mask | abcdsr); - abcdsr = pio->PIO_ABCDSR[1]; - pio->PIO_ABCDSR[1] = (mask | abcdsr); - - pio->PIO_PDR = mask; -} - -//------------------------------------------------------------------------------ -/// Configures one or more pin(s) or a PIO controller as inputs. Optionally, -/// the corresponding internal pull-up(s) and glitch filter(s) can be -/// enabled. -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask indicating which pin(s) to configure as input(s). -/// \param enablePullUp Indicates if the internal pull-up(s) must be enabled. -/// \param enableFilter Indicates if the glitch filter(s) must be enabled. -//------------------------------------------------------------------------------ -static void PIO_SetInput( - Pio *pio, - unsigned int mask, - unsigned char attribute) -{ - // Disable interrupts - pio->PIO_IDR = mask; - - // Enable pull-up(s) if necessary - if (attribute & PIO_PULLUP) - pio->PIO_PUER = mask; - else - pio->PIO_PUDR = mask; - - // Enable de-glitch(s) if necessary - if (attribute & PIO_DEGLITCH) - pio->PIO_IFER = mask; - else - pio->PIO_IFDR = mask; - - // Enable de-bounce if necessary - if (attribute & PIO_DEBOUNCE) { - pio->PIO_DIFSR = mask; - } - - // Configure pin as input - pio->PIO_ODR = mask; - pio->PIO_PER = mask; -} - -//------------------------------------------------------------------------------ -/// Configures one or more pin(s) of a PIO controller as outputs, with the -/// given default value. Optionally, the multi-drive feature can be enabled -/// on the pin(s). -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask indicating which pin(s) to configure. -/// \param defaultValue Default level on the pin(s). -/// \param enableMultiDrive Indicates if the pin(s) shall be configured as -/// open-drain. -/// \param enablePullUp Indicates if the pin shall have its pull-up activated. -//------------------------------------------------------------------------------ -static void PIO_SetOutput( - Pio *pio, - unsigned int mask, - unsigned char defaultValue, - unsigned char enableMultiDrive, - unsigned char enablePullUp) -{ - // Disable interrupts - pio->PIO_IDR = mask; - - // Enable pull-up(s) if necessary - if (enablePullUp) { - - pio->PIO_PUER = mask; - } - else { - - pio->PIO_PUDR = mask; - } - - // Enable multi-drive if necessary - if (enableMultiDrive) { - - pio->PIO_MDER = mask; - } - else { - - pio->PIO_MDDR = mask; - } - - // Set default value - if (defaultValue) { - - pio->PIO_SODR = mask; - } - else { - - pio->PIO_CODR = mask; - } - - // Configure pin(s) as output(s) - pio->PIO_OER = mask; - pio->PIO_PER = mask; -} - -//------------------------------------------------------------------------------ -/// Configures interrupt mode for input Pins -/// \param pio Pointer to a PIO controller. -/// \param mask Bitmask indicating which pin(s) to configure. -/// \param additionnalItMode Enable Pio Additionnal It Mode. -/// \param edgeMode Enable the edge mode. -/// \param risingEdgeOrHighLevel Enable IT on rising edge or high level. -//------------------------------------------------------------------------------ -static void PIO_SetInterrupt( - Pio *pio, - unsigned int mask, - unsigned char additionnalItMode, - unsigned char edgeMode, - unsigned char risingEdgeOrHighLevel) -{ - /* Configure the Interrupt mode in the PIO controller */ - if (additionnalItMode) { - /* enable additional interrupt mode */ - pio->PIO_AIMER = mask; - - /* if bit field of selected pin is 1, set as Rising Edge/High level detection event */ - if (risingEdgeOrHighLevel) - pio->PIO_REHLSR = mask; - else - pio->PIO_FELLSR = mask; - - /* if bit field of selected pin is 1, set as edge detection source */ - if (edgeMode) - pio->PIO_ESR = mask; - else - pio->PIO_LSR = mask; - } else { - /* disable additional interrupt mode */ - pio->PIO_AIMDR = mask; - } -} - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Configures a list of Pin instances, each of which can either hold a single -/// pin or a group of pins, depending on the mask value; all pins are configured -/// by this function. The size of the array must also be provided and is easily -/// computed using PIO_LISTSIZE whenever its length is not known in advance. -/// \param list Pointer to a list of Pin instances. -/// \param size Size of the Pin list (calculated using PIO_LISTSIZE). -/// \return 1 if the pins have been configured properly; otherwise 0. -//------------------------------------------------------------------------------ -unsigned char PIO_Configure(const Pin *list, unsigned int size) -{ - // Configure pins - while (size > 0) { - - switch (list->type) { - - case PIO_PERIPH_A: - PIO_SetPeripheralA(list->pio, - list->mask, - (list->attribute & PIO_PULLUP) ? 1 : 0); - break; - - case PIO_PERIPH_B: - PIO_SetPeripheralB(list->pio, - list->mask, - (list->attribute & PIO_PULLUP) ? 1 : 0); - break; - - case PIO_PERIPH_C: - PIO_SetPeripheralC(list->pio, - list->mask, - (list->attribute & PIO_PULLUP) ? 1 : 0); - break; - - case PIO_PERIPH_D: - PIO_SetPeripheralD(list->pio, - list->mask, - (list->attribute & PIO_PULLUP) ? 1 : 0); - break; - case PIO_INPUT: - PMC_EnablePeripheral(list->id); - PIO_SetInput(list->pio, - list->mask, - list->attribute); - PIO_SetInterrupt(list->pio, - list->mask, - (list->attribute & PIO_IT_AIME) ? 1 : 0, - (list->attribute & PIO_IT_EDGE) ? 1 : 0, - (list->attribute & PIO_IT_RE_OR_HL) ? 1 : 0); - break; - - case PIO_OUTPUT_0: - case PIO_OUTPUT_1: - PIO_SetOutput(list->pio, - list->mask, - (list->type == PIO_OUTPUT_1), - (list->attribute & PIO_OPENDRAIN) ? 1 : 0, - (list->attribute & PIO_PULLUP) ? 1 : 0); - break; - - default: return 0; - } - - list++; - size--; - } - - return 1; -} - -//------------------------------------------------------------------------------ -/// Sets a high output level on all the PIOs defined in the given Pin instance. -/// This has no immediate effects on PIOs that are not output, but the PIO -/// controller will memorize the value they are changed to outputs. -/// \param pin Pointer to a Pin instance describing one or more pins. -//------------------------------------------------------------------------------ -void PIO_Set(const Pin *pin) -{ - pin->pio->PIO_SODR = pin->mask; -} - -//------------------------------------------------------------------------------ -/// Sets a low output level on all the PIOs defined in the given Pin instance. -/// This has no immediate effects on PIOs that are not output, but the PIO -/// controller will memorize the value they are changed to outputs. -/// \param pin Pointer to a Pin instance describing one or more pins. -//------------------------------------------------------------------------------ -void PIO_Clear(const Pin *pin) -{ - pin->pio->PIO_CODR = pin->mask; -} - -//------------------------------------------------------------------------------ -/// Returns 1 if one or more PIO of the given Pin instance currently have a high -/// level; otherwise returns 0. This method returns the actual value that is -/// being read on the pin. To return the supposed output value of a pin, use -/// PIO_GetOutputDataStatus() instead. -/// \param pin Pointer to a Pin instance describing one or more pins. -/// \return 1 if the Pin instance contains at least one PIO that currently has -/// a high level; otherwise 0. -//------------------------------------------------------------------------------ -unsigned char PIO_Get(const Pin *pin) -{ - unsigned int reg; - if ((pin->type == PIO_OUTPUT_0) || (pin->type == PIO_OUTPUT_1)) { - - reg = pin->pio->PIO_ODSR; - } - else { - - reg = pin->pio->PIO_PDSR; - } - - if ((reg & pin->mask) == 0) { - - return 0; - } - else { - - return 1; - } -} - - -//------------------------------------------------------------------------------ -/// Returns 1 if one or more PIO of the given Pin are configured to output a -/// high level (even if they are not output). -/// To get the actual value of the pin, use PIO_Get() instead. -/// \param pin Pointer to a Pin instance describing one or more pins. -/// \return 1 if the Pin instance contains at least one PIO that is configured -/// to output a high level; otherwise 0. -//------------------------------------------------------------------------------ -unsigned char PIO_GetOutputDataStatus(const Pin *pin) -{ - if ((pin->pio->PIO_ODSR & pin->mask) == 0) { - - return 0; - } - else { - - return 1; - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio.h deleted file mode 100644 index 52fd593b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio.h +++ /dev/null @@ -1,215 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \file -/// -/// \par Purpose -/// -/// This file provides a basic API for PIO configuration and usage of -/// user-controlled pins. Please refer to the board.h file for a list of -/// available pin definitions. -/// -/// \par Usage -/// -/// -# Define a constant pin description array such as the following one, using -/// the existing definitions provided by the board.h file if possible: -/// \code -/// const Pin pPins[] = {PIN_USART0_TXD, PIN_USART0_RXD}; -/// \endcode -/// Alternatively, it is possible to add new pins by provided the full Pin -/// structure: -/// \code -/// // Pin instance to configure PA10 & PA11 as inputs with the internal -/// // pull-up enabled. -/// const Pin pPins = { -/// (1 << 10) | (1 << 11), -/// REG_PIOA, -/// ID_PIOA, -/// PIO_INPUT, -/// PIO_PULLUP -/// }; -/// \endcode -/// -# Configure a pin array by calling PIO_Configure() with a pointer to the -/// array and its size (which is computed using the PIO_LISTSIZE macro). -/// -# Change and get the value of a user-controlled pin using the PIO_Set, -/// PIO_Clear and PIO_Get methods. -/// -# Get the level being currently output by a user-controlled pin configured -/// as an output using PIO_GetOutputDataStatus(). -//------------------------------------------------------------------------------ - -#ifndef PIO_H -#define PIO_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include - -//------------------------------------------------------------------------------ -// Global Definitions -//------------------------------------------------------------------------------ - -/// The pin is controlled by the associated signal of peripheral A. -#define PIO_PERIPH_A 0 -/// The pin is controlled by the associated signal of peripheral B. -#define PIO_PERIPH_B 1 -/// The pin is controlled by the associated signal of peripheral C. -#define PIO_PERIPH_C 2 -/// The pin is controlled by the associated signal of peripheral D. -#define PIO_PERIPH_D 3 -/// The pin is an input. -#define PIO_INPUT 4 -/// The pin is an output and has a default level of 0. -#define PIO_OUTPUT_0 5 -/// The pin is an output and has a default level of 1. -#define PIO_OUTPUT_1 6 - -/// Default pin configuration (no attribute). -#define PIO_DEFAULT (0 << 0) -/// The internal pin pull-up is active. -#define PIO_PULLUP (1 << 0) -/// The internal glitch filter is active. -#define PIO_DEGLITCH (1 << 1) -/// The pin is open-drain. -#define PIO_OPENDRAIN (1 << 2) - -/// The internal debouncing filter is active. -#define PIO_DEBOUNCE (1 << 3) - -/// Enable additional interrupt modes. -#define PIO_IT_AIME (1 << 4) - -/// Interrupt High Level/Rising Edge detection is active. -#define PIO_IT_RE_OR_HL (1 << 5) -/// Interrupt Edge detection is active. -#define PIO_IT_EDGE (1 << 6) - -/// Low level interrupt is active -#define PIO_IT_LOW_LEVEL (0 | 0 | PIO_IT_AIME) -/// High level interrupt is active -#define PIO_IT_HIGH_LEVEL (PIO_IT_RE_OR_HL | 0 | PIO_IT_AIME) -/// Falling edge interrupt is active -#define PIO_IT_FALL_EDGE (0 | PIO_IT_EDGE | PIO_IT_AIME) -/// Rising edge interrupt is active -#define PIO_IT_RISE_EDGE (PIO_IT_RE_OR_HL | PIO_IT_EDGE | PIO_IT_AIME) - -//------------------------------------------------------------------------------ -// Global Macros -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Calculates the size of an array of Pin instances. The array must be defined -/// locally (i.e. not a pointer), otherwise the computation will not be correct. -/// \param pPins Local array of Pin instances. -/// \return Number of elements in array. -//------------------------------------------------------------------------------ -#define PIO_LISTSIZE(pPins) (sizeof(pPins) / sizeof(Pin)) - -//------------------------------------------------------------------------------ -// Global Types -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -/// Describes the type and attribute of one PIO pin or a group of similar pins. -/// The #type# field can have the following values: -/// - PIO_PERIPH_A -/// - PIO_PERIPH_B -/// - PIO_OUTPUT_0 -/// - PIO_OUTPUT_1 -/// - PIO_INPUT -/// -/// The #attribute# field is a bitmask that can either be set to PIO_DEFAULt, -/// or combine (using bitwise OR '|') any number of the following constants: -/// - PIO_PULLUP -/// - PIO_DEGLITCH -/// - PIO_DEBOUNCE -/// - PIO_OPENDRAIN -/// - PIO_IT_LOW_LEVEL -/// - PIO_IT_HIGH_LEVEL -/// - PIO_IT_FALL_EDGE -/// - PIO_IT_RISE_EDGE -//------------------------------------------------------------------------------ -typedef struct { - - /// Bitmask indicating which pin(s) to configure. - unsigned int mask; - /// Pointer to the PIO controller which has the pin(s). - Pio *pio; - /// Peripheral ID of the PIO controller which has the pin(s). - unsigned char id; - /// Pin type. - unsigned char type; - /// Pin attribute. - unsigned char attribute; -} Pin; - -//------------------------------------------------------------------------------ -// Global Access Macros -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -/// Configures Glitch or Debouncing filter for input -/// \param pin Pointer to a Pin instance describing one or more pins. -/// \param cuttoff Cutt off frequency for debounce filter -//------------------------------------------------------------------------------ -static inline void PIO_SetDebounceFilter( - const Pin *pin, - unsigned int cuttoff) - { - Pio *pio = pin->pio; - - pio->PIO_DIFSR = pin->mask;//set Debouncing, 0 bit field no effect - pio->PIO_SCDR = ((32678/(2*(cuttoff))) - 1) & 0x3FFF;//the lowest 14 bits work -} - - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -extern unsigned char PIO_Configure(const Pin *list, unsigned int size); - -extern void PIO_Set(const Pin *pin); - -extern void PIO_Clear(const Pin *pin); - -extern unsigned char PIO_Get(const Pin *pin); - -//extern unsigned int PIO_GetISR(const Pin *pin); - -extern unsigned char PIO_GetOutputDataStatus(const Pin *pin); - -extern void PIO_EnableDebounce(const Pin *pin, unsigned int clkDiv); - -#endif //#ifndef PIO_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio_it.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio_it.c deleted file mode 100644 index e04a07c5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio_it.c +++ /dev/null @@ -1,411 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/// \file - -/// Disable traces for this file -#undef TRACE_LEVEL -#define TRACE_LEVEL 0 - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "pio_it.h" -#include "pio.h" -#include -#include -#include -#include -#include - -//------------------------------------------------------------------------------ -// Local definitions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Local types -//------------------------------------------------------------------------------ -/* Define WEAK attribute */ -#if defined ( __CC_ARM ) - #define WEAK __attribute__ ((weak)) -#elif defined ( __ICCARM__ ) - #define WEAK __weak -#elif defined ( __GNUC__ ) - #define WEAK __attribute__ ((weak)) -#endif - - -//------------------------------------------------------------------------------ -// Local variables -//------------------------------------------------------------------------------ -typedef void (*PioHandler) (unsigned char id); - -/* Default PIO handlers defined as weak functions which have to be redefined by - * the application */ -WEAK void PIOA_Irq0Handler(unsigned char id) {} -WEAK void PIOA_Irq1Handler(unsigned char id) {} -WEAK void PIOA_Irq2Handler(unsigned char id) {} -WEAK void PIOA_Irq3Handler(unsigned char id) {} -WEAK void PIOA_Irq4Handler(unsigned char id) {} -WEAK void PIOA_Irq5Handler(unsigned char id) {} -WEAK void PIOA_Irq6Handler(unsigned char id) {} -WEAK void PIOA_Irq7Handler(unsigned char id) {} -WEAK void PIOA_Irq8Handler(unsigned char id) {} -WEAK void PIOA_Irq9Handler(unsigned char id) {} -WEAK void PIOA_Irq10Handler(unsigned char id) {} -WEAK void PIOA_Irq11Handler(unsigned char id) {} -WEAK void PIOA_Irq12Handler(unsigned char id) {} -WEAK void PIOA_Irq13Handler(unsigned char id) {} -WEAK void PIOA_Irq14Handler(unsigned char id) {} -WEAK void PIOA_Irq15Handler(unsigned char id) {} -WEAK void PIOA_Irq16Handler(unsigned char id) {} -WEAK void PIOA_Irq17Handler(unsigned char id) {} -WEAK void PIOA_Irq18Handler(unsigned char id) {} -WEAK void PIOA_Irq19Handler(unsigned char id) {} -WEAK void PIOA_Irq20Handler(unsigned char id) {} -WEAK void PIOA_Irq21Handler(unsigned char id) {} -WEAK void PIOA_Irq22Handler(unsigned char id) {} -WEAK void PIOA_Irq23Handler(unsigned char id) {} -WEAK void PIOA_Irq24Handler(unsigned char id) {} -WEAK void PIOA_Irq25Handler(unsigned char id) {} -WEAK void PIOA_Irq26Handler(unsigned char id) {} -WEAK void PIOA_Irq27Handler(unsigned char id) {} -WEAK void PIOA_Irq28Handler(unsigned char id) {} -WEAK void PIOA_Irq29Handler(unsigned char id) {} -WEAK void PIOA_Irq30Handler(unsigned char id) {} -WEAK void PIOA_Irq31Handler(unsigned char id) {} - - -/** pioAHandlers records ISR routines for each PIO Id for PIO controller A */ -static const PioHandler pioAHandlers[32] = { - (PioHandler) PIOA_Irq0Handler, /**< PA0 IT Handler */ - (PioHandler) PIOA_Irq1Handler, /**< PA1 IT Handler */ - (PioHandler) PIOA_Irq2Handler, /**< PA2 IT Handler */ - (PioHandler) PIOA_Irq3Handler, /**< PA3 IT Handler */ - (PioHandler) PIOA_Irq4Handler, /**< PA4 IT Handler */ - (PioHandler) PIOA_Irq5Handler, /**< PA5 IT Handler */ - (PioHandler) PIOA_Irq6Handler, /**< PA6 IT Handler */ - (PioHandler) PIOA_Irq7Handler, /**< PA7 IT Handler */ - (PioHandler) PIOA_Irq8Handler, /**< PA8 IT Handler */ - (PioHandler) PIOA_Irq9Handler, /**< PA9 IT Handler */ - (PioHandler) PIOA_Irq10Handler, /**< PA10 IT Handler */ - (PioHandler) PIOA_Irq11Handler, /**< PA11 IT Handler */ - (PioHandler) PIOA_Irq12Handler, /**< PA12 IT Handler */ - (PioHandler) PIOA_Irq13Handler, /**< PA13 IT Handler */ - (PioHandler) PIOA_Irq14Handler, /**< PA14 IT Handler */ - (PioHandler) PIOA_Irq15Handler, /**< PA15 IT Handler */ - (PioHandler) PIOA_Irq16Handler, /**< PA16 IT Handler */ - (PioHandler) PIOA_Irq17Handler, /**< PA17 IT Handler */ - (PioHandler) PIOA_Irq18Handler, /**< PA18 IT Handler */ - (PioHandler) PIOA_Irq19Handler, /**< PA19 IT Handler */ - (PioHandler) PIOA_Irq20Handler, /**< PA20 IT Handler */ - (PioHandler) PIOA_Irq21Handler, /**< PA21 IT Handler */ - (PioHandler) PIOA_Irq22Handler, /**< PA22 IT Handler */ - (PioHandler) PIOA_Irq23Handler, /**< PA23 IT Handler */ - (PioHandler) PIOA_Irq24Handler, /**< PA24 IT Handler */ - (PioHandler) PIOA_Irq25Handler, /**< PA25 IT Handler */ - (PioHandler) PIOA_Irq26Handler, /**< PA26 IT Handler */ - (PioHandler) PIOA_Irq27Handler, /**< PA27 IT Handler */ - (PioHandler) PIOA_Irq28Handler, /**< PA28 IT Handler */ - (PioHandler) PIOA_Irq29Handler, /**< PA29 IT Handler */ - (PioHandler) PIOA_Irq30Handler, /**< PA30 IT Handler */ - (PioHandler) PIOA_Irq31Handler /**< PA31 IT Handler */ -}; - -/* Default PIO handlers defined as weak functions which have to be redefined by - * the application */ -WEAK void PIOB_Irq0Handler(unsigned char id) {} -WEAK void PIOB_Irq1Handler(unsigned char id) {} -WEAK void PIOB_Irq2Handler(unsigned char id) {} -WEAK void PIOB_Irq3Handler(unsigned char id) {} -WEAK void PIOB_Irq4Handler(unsigned char id) {} -WEAK void PIOB_Irq5Handler(unsigned char id) {} -WEAK void PIOB_Irq6Handler(unsigned char id) {} -WEAK void PIOB_Irq7Handler(unsigned char id) {} -WEAK void PIOB_Irq8Handler(unsigned char id) {} -WEAK void PIOB_Irq9Handler(unsigned char id) {} -WEAK void PIOB_Irq10Handler(unsigned char id) {} -WEAK void PIOB_Irq11Handler(unsigned char id) {} -WEAK void PIOB_Irq12Handler(unsigned char id) {} -WEAK void PIOB_Irq13Handler(unsigned char id) {} -WEAK void PIOB_Irq14Handler(unsigned char id) {} -WEAK void PIOB_Irq15Handler(unsigned char id) {} -WEAK void PIOB_Irq16Handler(unsigned char id) {} -WEAK void PIOB_Irq17Handler(unsigned char id) {} -WEAK void PIOB_Irq18Handler(unsigned char id) {} -WEAK void PIOB_Irq19Handler(unsigned char id) {} -WEAK void PIOB_Irq20Handler(unsigned char id) {} -WEAK void PIOB_Irq21Handler(unsigned char id) {} -WEAK void PIOB_Irq22Handler(unsigned char id) {} -WEAK void PIOB_Irq23Handler(unsigned char id) {} -WEAK void PIOB_Irq24Handler(unsigned char id) {} -WEAK void PIOB_Irq25Handler(unsigned char id) {} -WEAK void PIOB_Irq26Handler(unsigned char id) {} -WEAK void PIOB_Irq27Handler(unsigned char id) {} -WEAK void PIOB_Irq28Handler(unsigned char id) {} -WEAK void PIOB_Irq29Handler(unsigned char id) {} -WEAK void PIOB_Irq30Handler(unsigned char id) {} -WEAK void PIOB_Irq31Handler(unsigned char id) {} - - -/** PIOBHandlers records ISR routines for each PIO Id for PIO controller A */ -static const PioHandler pioBHandlers[32] = { - (PioHandler) PIOB_Irq0Handler, /**< PB0 IT Handler */ - (PioHandler) PIOB_Irq1Handler, /**< PB1 IT Handler */ - (PioHandler) PIOB_Irq2Handler, /**< PB2 IT Handler */ - (PioHandler) PIOB_Irq3Handler, /**< PB3 IT Handler */ - (PioHandler) PIOB_Irq4Handler, /**< PB4 IT Handler */ - (PioHandler) PIOB_Irq5Handler, /**< PB5 IT Handler */ - (PioHandler) PIOB_Irq6Handler, /**< PB6 IT Handler */ - (PioHandler) PIOB_Irq7Handler, /**< PB7 IT Handler */ - (PioHandler) PIOB_Irq8Handler, /**< PB8 IT Handler */ - (PioHandler) PIOB_Irq9Handler, /**< PB9 IT Handler */ - (PioHandler) PIOB_Irq10Handler, /**< PB10 IT Handler */ - (PioHandler) PIOB_Irq11Handler, /**< PB11 IT Handler */ - (PioHandler) PIOB_Irq12Handler, /**< PB12 IT Handler */ - (PioHandler) PIOB_Irq13Handler, /**< PB13 IT Handler */ - (PioHandler) PIOB_Irq14Handler, /**< PB14 IT Handler */ - (PioHandler) PIOB_Irq15Handler, /**< PB15 IT Handler */ - (PioHandler) PIOB_Irq16Handler, /**< PB16 IT Handler */ - (PioHandler) PIOB_Irq17Handler, /**< PB17 IT Handler */ - (PioHandler) PIOB_Irq18Handler, /**< PB18 IT Handler */ - (PioHandler) PIOB_Irq19Handler, /**< PB19 IT Handler */ - (PioHandler) PIOB_Irq20Handler, /**< PB20 IT Handler */ - (PioHandler) PIOB_Irq21Handler, /**< PB21 IT Handler */ - (PioHandler) PIOB_Irq22Handler, /**< PB22 IT Handler */ - (PioHandler) PIOB_Irq23Handler, /**< PB23 IT Handler */ - (PioHandler) PIOB_Irq24Handler, /**< PB24 IT Handler */ - (PioHandler) PIOB_Irq25Handler, /**< PB25 IT Handler */ - (PioHandler) PIOB_Irq26Handler, /**< PB26 IT Handler */ - (PioHandler) PIOB_Irq27Handler, /**< PB27 IT Handler */ - (PioHandler) PIOB_Irq28Handler, /**< PB28 IT Handler */ - (PioHandler) PIOB_Irq29Handler, /**< PB29 IT Handler */ - (PioHandler) PIOB_Irq30Handler, /**< PB30 IT Handler */ - (PioHandler) PIOB_Irq31Handler /**< PB31 IT Handler */ -}; - -/* Default PIO handlers defined as weak functions which have to be redefined by - * the application */ -WEAK void PIOC_Irq0Handler(unsigned char id) {} -WEAK void PIOC_Irq1Handler(unsigned char id) {} -WEAK void PIOC_Irq2Handler(unsigned char id) {} -WEAK void PIOC_Irq3Handler(unsigned char id) {} -WEAK void PIOC_Irq4Handler(unsigned char id) {} -WEAK void PIOC_Irq5Handler(unsigned char id) {} -WEAK void PIOC_Irq6Handler(unsigned char id) {} -WEAK void PIOC_Irq7Handler(unsigned char id) {} -WEAK void PIOC_Irq8Handler(unsigned char id) {} -WEAK void PIOC_Irq9Handler(unsigned char id) {} -WEAK void PIOC_Irq10Handler(unsigned char id) {} -WEAK void PIOC_Irq11Handler(unsigned char id) {} -WEAK void PIOC_Irq12Handler(unsigned char id) {} -WEAK void PIOC_Irq13Handler(unsigned char id) {} -WEAK void PIOC_Irq14Handler(unsigned char id) {} -WEAK void PIOC_Irq15Handler(unsigned char id) {} -WEAK void PIOC_Irq16Handler(unsigned char id) {} -WEAK void PIOC_Irq17Handler(unsigned char id) {} -WEAK void PIOC_Irq18Handler(unsigned char id) {} -WEAK void PIOC_Irq19Handler(unsigned char id) {} -WEAK void PIOC_Irq20Handler(unsigned char id) {} -WEAK void PIOC_Irq21Handler(unsigned char id) {} -WEAK void PIOC_Irq22Handler(unsigned char id) {} -WEAK void PIOC_Irq23Handler(unsigned char id) {} -WEAK void PIOC_Irq24Handler(unsigned char id) {} -WEAK void PIOC_Irq25Handler(unsigned char id) {} -WEAK void PIOC_Irq26Handler(unsigned char id) {} -WEAK void PIOC_Irq27Handler(unsigned char id) {} -WEAK void PIOC_Irq28Handler(unsigned char id) {} -WEAK void PIOC_Irq29Handler(unsigned char id) {} -WEAK void PIOC_Irq30Handler(unsigned char id) {} -WEAK void PIOC_Irq31Handler(unsigned char id) {} - - -/** PIOCHandlers records ISR routines for each PIO Id for PIO controller A */ -static const PioHandler pioCHandlers[32] = { - (PioHandler) PIOC_Irq0Handler, /**< PC0 IT Handler */ - (PioHandler) PIOC_Irq1Handler, /**< PC1 IT Handler */ - (PioHandler) PIOC_Irq2Handler, /**< PC2 IT Handler */ - (PioHandler) PIOC_Irq3Handler, /**< PC3 IT Handler */ - (PioHandler) PIOC_Irq4Handler, /**< PC4 IT Handler */ - (PioHandler) PIOC_Irq5Handler, /**< PC5 IT Handler */ - (PioHandler) PIOC_Irq6Handler, /**< PC6 IT Handler */ - (PioHandler) PIOC_Irq7Handler, /**< PC7 IT Handler */ - (PioHandler) PIOC_Irq8Handler, /**< PC8 IT Handler */ - (PioHandler) PIOC_Irq9Handler, /**< PC9 IT Handler */ - (PioHandler) PIOC_Irq10Handler, /**< PC10 IT Handler */ - (PioHandler) PIOC_Irq11Handler, /**< PC11 IT Handler */ - (PioHandler) PIOC_Irq12Handler, /**< PC12 IT Handler */ - (PioHandler) PIOC_Irq13Handler, /**< PC13 IT Handler */ - (PioHandler) PIOC_Irq14Handler, /**< PC14 IT Handler */ - (PioHandler) PIOC_Irq15Handler, /**< PC15 IT Handler */ - (PioHandler) PIOC_Irq16Handler, /**< PC16 IT Handler */ - (PioHandler) PIOC_Irq17Handler, /**< PC17 IT Handler */ - (PioHandler) PIOC_Irq18Handler, /**< PC18 IT Handler */ - (PioHandler) PIOC_Irq19Handler, /**< PC19 IT Handler */ - (PioHandler) PIOC_Irq20Handler, /**< PC20 IT Handler */ - (PioHandler) PIOC_Irq21Handler, /**< PC21 IT Handler */ - (PioHandler) PIOC_Irq22Handler, /**< PC22 IT Handler */ - (PioHandler) PIOC_Irq23Handler, /**< PC23 IT Handler */ - (PioHandler) PIOC_Irq24Handler, /**< PC24 IT Handler */ - (PioHandler) PIOC_Irq25Handler, /**< PC25 IT Handler */ - (PioHandler) PIOC_Irq26Handler, /**< PC26 IT Handler */ - (PioHandler) PIOC_Irq27Handler, /**< PC27 IT Handler */ - (PioHandler) PIOC_Irq28Handler, /**< PC28 IT Handler */ - (PioHandler) PIOC_Irq29Handler, /**< PC29 IT Handler */ - (PioHandler) PIOC_Irq30Handler, /**< PC30 IT Handler */ - (PioHandler) PIOC_Irq31Handler /**< PC31 IT Handler */ -}; - -//------------------------------------------------------------------------------ -/// \brief Generic PIO Handler. -/// The NVIC branches to the PIOx_IrqHandler() registered in exeption.c -/// PIOx_IrqHandler() invokes PIO_IrqHandler which scans which id has triggered -/// an interrupt and call the corresponding routine for the Id (<=> for the pin) -/// \param pPio PIO controller base address. -/// \param pPioHandlers Constant table which contains IT routines for each PIO Id -//------------------------------------------------------------------------------ -static void PIO_IrqHandler(Pio *pPio, const PioHandler *pPioHandlers) -{ - unsigned int status, id; - - status = pPio->PIO_ISR; - status &= pPio->PIO_IMR; - - for (id = 0; id < 32; ++id) { - if (status & (1 << id)) { - pPioHandlers[id](id); - } - } - -} - -//------------------------------------------------------------------------------ -// Global functions -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -/// \brief Parallel IO Controller A interrupt handler -/// Redefined PIOA interrupt handler for NVIC interrupt table. -//------------------------------------------------------------------------------ -void PIOA_IrqHandler(void) -{ - PIO_IrqHandler(PIOA, pioAHandlers); -} - -//------------------------------------------------------------------------------ -/// \brief Parallel IO Controller B interrupt handler -/// Redefined PIOB interrupt handler for NVIC interrupt table. -//------------------------------------------------------------------------------ -void PIOB_IrqHandler(void) -{ - PIO_IrqHandler(PIOB, pioBHandlers); -} - -//------------------------------------------------------------------------------ -/// \brief Parallel IO Controller C interrupt handler -/// Redefined PIOC interrupt handler for NVIC interrupt table. -//------------------------------------------------------------------------------ -void PIOC_IrqHandler(void) -{ - PIO_IrqHandler(PIOC, pioCHandlers); -} - -//------------------------------------------------------------------------------ -/// Enables the given interrupt source. The status -/// register of the corresponding PIO controller is cleared prior to enabling -/// the interrupt. -/// \param pPin Interrupt source to enable. -//------------------------------------------------------------------------------ -void PIO_EnableIt(const Pin *pPin) -{ - Pio* pio = pPin->pio; - TRACE_DEBUG("PIO_EnableIt()\n\r"); - -// SANITY_CHECK(pPin); - - /* Enable the interrupt in the PIO controller */ - pio->PIO_ISR; - pio->PIO_IER = pPin->mask; - - -} - -//------------------------------------------------------------------------------ -/// Disables a given interrupt source, with no added side effects. -/// \param pPin Interrupt source to disable. -//------------------------------------------------------------------------------ -void PIO_DisableIt(const Pin *pPin) -{ - Pio* pio = pPin->pio; - SANITY_CHECK(pPin); - - TRACE_DEBUG("PIO_DisableIt()\n\r"); - - /* Disable the interrupt in the PIO controller */ - pio->PIO_IDR = pPin->mask; -} - -//------------------------------------------------------------------------------ -/// \brief Initializes the PIO interrupt management logic -/// The desired priority of PIO interrupts must be provided. -/// Calling this function multiple times result in the reset of currently -/// configured interrupts. -/// \param priority PIO controller interrupts priority. -//------------------------------------------------------------------------------ -void PIO_InitializeInterrupts(unsigned int priority) -{ - TRACE_DEBUG("PIO_Initialize()\n\r"); - - // Configure PIO interrupt sources - TRACE_DEBUG("PIO_Initialize: Configuring PIOA\n\r"); - PIOA->PIO_ISR; - PIOA->PIO_IDR = 0xFFFFFFFF; - NVIC_DisableIRQ(PIOA_IRQn); - NVIC_ClearPendingIRQ(PIOA_IRQn); - NVIC_SetPriority(PIOA_IRQn, priority); - NVIC_EnableIRQ(PIOA_IRQn); - - TRACE_DEBUG("PIO_Initialize: Configuring PIOB\n\r"); - PIOB->PIO_ISR; - PIOB->PIO_IDR = 0xFFFFFFFF; - NVIC_DisableIRQ(PIOB_IRQn); - NVIC_ClearPendingIRQ(PIOB_IRQn); - NVIC_SetPriority(PIOB_IRQn, priority); - NVIC_EnableIRQ(PIOB_IRQn); - - TRACE_DEBUG("PIO_Initialize: Configuring PIOC\n\r"); - PIOC->PIO_ISR; - PIOC->PIO_IDR = 0xFFFFFFFF; - NVIC_DisableIRQ(PIOC_IRQn); - NVIC_ClearPendingIRQ(PIOC_IRQn); - NVIC_SetPriority(PIOC_IRQn, priority); - NVIC_EnableIRQ(PIOC_IRQn); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio_it.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio_it.h deleted file mode 100644 index cc44903a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio_it.h +++ /dev/null @@ -1,153 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \file -/// -/// \par Purpose -/// -/// Configuration and handling of interrupts on PIO status changes. The API -/// provided here have several advantages over the traditional PIO interrupt -/// configuration approach: -/// - It is highly portable -/// - It automatically demultiplexes interrupts when multiples pins have been -/// configured on a single PIO controller -/// - It allows a group of pins to share the same interrupt -/// -/// However, it also has several minor drawbacks that may prevent from using it -/// in particular applications: -/// - It enables the clocks of all PIO controllers -/// - PIO controllers all share the same interrupt handler, which does the -/// demultiplexing and can be slower than direct configuration -/// - It reserves space for a fixed number of interrupts, which can be -/// increased by modifying the appropriate constant in pio_it.c. -/// -/// \par Usage -/// -/// -# Initialize the PIO interrupt mechanism using PIO_InitializeInterrupts() -/// with the desired priority (0 ... 7). -/// -# Configure a status change interrupt on one or more pin(s) with -/// PIO_ConfigureIt(). -/// -# Enable & disable interrupts on pins using PIO_EnableIt() and -/// PIO_DisableIt(). -//------------------------------------------------------------------------------ - -#ifndef PIO_IT_H -#define PIO_IT_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "pio.h" - -//------------------------------------------------------------------------------ -// Global functions -//------------------------------------------------------------------------------ - -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/// \file - -/// Disable traces for this file -#undef TRACE_LEVEL -#define TRACE_LEVEL 0 - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "pio_it.h" -#include "pio.h" - -//------------------------------------------------------------------------------ -/// \brief Parallel IO Controller A interrupt handler -/// Redefined PIOA interrupt handler for NVIC interrupt table. -//------------------------------------------------------------------------------ -extern void PIOA_IrqHandler(void); -//------------------------------------------------------------------------------ -/// \brief Parallel IO Controller B interrupt handler -/// Redefined PIOB interrupt handler for NVIC interrupt table. -//------------------------------------------------------------------------------ -extern void PIOB_IrqHandler(void); -//------------------------------------------------------------------------------ -/// \brief Parallel IO Controller C interrupt handler -/// Redefined PIOC interrupt handler for NVIC interrupt table. -//------------------------------------------------------------------------------ -extern void PIOC_IrqHandler(void); -//------------------------------------------------------------------------------ -/// Configures and enables the given interrupt source. The status -/// register of the corresponding PIO controller is cleared prior to enabling -/// the interrupt. -/// \param pPin Interrupt source to enable. -//------------------------------------------------------------------------------ -extern void PIO_EnableIt(const Pin *pPin); -//------------------------------------------------------------------------------ -/// Disables a given interrupt source, with no added side effects. -/// \param pPin Interrupt source to disable. -//------------------------------------------------------------------------------ -extern void PIO_DisableIt(const Pin *pPin); -//------------------------------------------------------------------------------ -/// \brief Initializes the PIO interrupt management logic -/// The desired priority of PIO interrupts must be provided. -/// Calling this function multiple times result in the reset of currently -/// configured interrupts. -/// \param priority PIO controller interrupts priority. -//------------------------------------------------------------------------------ -extern void PIO_InitializeInterrupts(unsigned int priority); - -#endif //#ifndef PIO_IT_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio_keypad.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio_keypad.c deleted file mode 100644 index e0fad267..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio_keypad.c +++ /dev/null @@ -1,147 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include -#include "pio.h" -#include "pio_keypad.h" - - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Configures keypad controller -/// \param pPIO Pointer to a PIO instance -/// \param config Configuration data for given pin,see head file for detail -//------------------------------------------------------------------------------ -void PIO_KeyPadConfig(AT91S_PIO *pPIO, KeyPadConfig *config) -{ - //enable/disable keypad controller - pPIO->PIO_KER = config->enable; - - //if enable, set keypad matrix and debouncing - if(config->enable == TRUE) { - //set key matrix - pPIO->PIO_KRCR = (config->row | config->col<<8) ; - - //set debouncing - pPIO->PIO_KDR = config->debouncing; - - } -} - - -//------------------------------------------------------------------------------ -/// Get Key Press/Release status -/// \param pPIO Pointer to a PIO instance -/// \param event Pointer to a instance of KeyEvent for storing keypad status -//------------------------------------------------------------------------------ -void PIO_GetKeyStatus(AT91S_PIO *pPIO, KeyEvent *event) -{ - int i,j; - - //get key press event - event->kdEvent.press = (pPIO->KSR&0x1)?TRUE:FALSE; - event->kdEvent.keyPressNum = (pPIO->KSR>>8)&0x3; - j=event->kdEvent.keyPressNum+1; - for(i=0; ikdEvent.preKeyMatrix[i].row = ((pPIO->KKPR) >> (8*i)) & 0x7; - event->kdEvent.preKeyMatrix[i].col = ((pPIO->KKPR) >> (8*i+4)) & 0x7; - } - - //get key release event - event->kuEvent.release = ((pPIO->KSR>>1) & 0x1)?TRUE:FALSE; - event->kuEvent.keyRelNum = (pPIO->KSR>>16)&0x3; - j=event->kdEvent.keyPressNum+1; - for(i=0;ikuEvent.relKeyMatrix[i].row = ((pPIO->KKRR) >> (8*i)) & 0x7; - event->kuEvent.relKeyMatrix[i].col = ((pPIO->KKRR) >> (8*i+4)) & 0x7; - } - -} - - -//------------------------------------------------------------------------------ -/// Enable keypad interrupt as Key Press Interrupt or Key Release Interrupt or both -/// \param pPIO Pointer to a PIO instance -/// \param mode Select key interrupt mode to enable, -/// 0x1 Key Press Interrupt -/// 0x2 Key Release Interrupt -/// 0x3 both of two type -//------------------------------------------------------------------------------ -void PIO_KeypadEnableIt(AT91S_PIO *pPIO, unsigned int mode) -{ - switch(mode){ - case 1:PIO_KeyPadEnableKPIt(pPIO); - break; - - case 2:PIO_KeyPadEnableKRIt(pPIO); - break; - - case 3:PIO_KeyPadEnableKPIt(pPIO); - PIO_KeyPadEnableKRIt(pPIO); - break; - - default:break; - } - -} - -//------------------------------------------------------------------------------ -/// Disable Key Press Interrupt or Key Release Interrupt or both of them -/// \param pPIO Pointer to a PIO instance -/// \param mode Select key interrupt mode to disable, -/// 0x1 Key Press Interrupt -/// 0x2 Key Release Interrupt -/// 0x3 both of two type -//------------------------------------------------------------------------------ -void PIO_KeypadDisableIt(AT91S_PIO *pPIO, unsigned int mode) -{ - switch(mode){ - case 1:PIO_KeyPadDisableKPIt(pPIO); - break; - - case 2:PIO_KeyPadDisableKRIt(pPIO); - break; - - case 3:PIO_KeyPadDisableKPIt(pPIO); - PIO_KeyPadDisableKRIt(pPIO); - break; - - default:break; - } - -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio_keypad.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio_keypad.h deleted file mode 100644 index 54021f6b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pio/pio_keypad.h +++ /dev/null @@ -1,153 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef PIO_KEYPAD_H -#define PIO_KEYPAD_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include - -//------------------------------------------------------------------------------ -// Global Definitions -//------------------------------------------------------------------------------ - - - - -//------------------------------------------------------------------------------ -// Global Macros -//------------------------------------------------------------------------------ -//enable keypad press interrupt -#define PIO_KeyPadEnableKPIt(pPIO) ((pPIO)->KIER = 1<<0) - -//enable keypad release interrupt -#define PIO_KeyPadEnableKRIt(pPIO) ((pPIO)->KIER = 1<<1) - -//disable keypad press interrupt -#define PIO_KeyPadDisableKPIt(pPIO) ((pPIO)->KIDR = 1<<0) - -//disable keypad release interrupt -#define PIO_KeyPadDisableKRIt(pPIO) ((pPIO)->KIDR = 1<<1) - -//enable keypad controller interrupt -#define PIO_KeyPadEnableIt(pPIO, mode) {switch(mode):\ - case 1:PIO_KeyPadEnableKPIt(pPIO);break;\ - case 2:PIO_KeyPadEnableKRIt(pPIO);break;\ - case 3:PIO_KeyPadEnableKPIt(pPIO);\ - PIO_KeyPadEnableKRIt(pPIO);break;\ - default:break;\ - } - -//disable keypad controller interrupt -#define PIO_KeyPadDisableIt(pPIO, mode) {switch(mode):\ - case 1:PIO_KeyPadDisableKPIt(pPIO);break;\ - case 2:PIO_KeyPadDisableKRIt(pPIO);break;\ - case 3:PIO_KeyPadDisableKPIt(pPIO);\ - PIO_KeyPadDisableKRIt(pPIO);break;\ - default:break;\ - } - -//get keypad controller interrupt mask -#define PIO_KeyPadGetItMask(pPIO) ((pPIO)->PIO_KIMR) - - -//------------------------------------------------------------------------------ -/// Calculates the size of an array of Pin instances. The array must be defined -/// locally (i.e. not a pointer), otherwise the computation will not be correct. -/// \param pPins Local array of Pin instances. -/// \return Number of elements in array. -//------------------------------------------------------------------------------ -#define PIO_LISTSIZE(pPins) (sizeof(pPins) / sizeof(Pin)) - -//------------------------------------------------------------------------------ -// Global Types -//------------------------------------------------------------------------------ -typedef enum { - FALSE, - TRUE -} bool; - -typedef struct _KeyPadConfig { - bool enable;//keypad controller enable or disable - unsigned char col:3;//config column size - unsigned char row:3;//config row size - unsigned int debouncing;//config debouncing -} KeyPadConfig; - - -typedef struct _KeyColRow { - unsigned char row:3; - unsigned char col:3; -} KeyColRow; - - -typedef struct _KeyDownEvent { - bool press;//at least 1 pressed key detected, or 0 - unsigned char keyPressNum;//simultaneously pressed key number - KeyColRow preKeyMatrix[4];//pressed key matrix -} KeyDownEvent; - - - -typedef struct _KeyUpEvent { - bool release;//at least 1 released key detected, or 0 - unsigned char keyRelNum;//simultaneously released key number - KeyColRow relKeyMatrix[4];//released key matrix -} KeyUpEvent; - - - -typedef struct _KeyEvent { - KeyDownEvent kdEvent; - KeyUpEvent kuEvent; -} KeyEvent; - -//------------------------------------------------------------------------------ -// Global Access Macros -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -void PIO_KeyPadConfig(AT91S_PIO *pPIO, KeyPadConfig *config); - -void PIO_GetKeyStatus(AT91S_PIO *pPIO, KeyEvent *event); - -void PIO_KeypadEnableIt(AT91S_PIO *pio, unsigned int mode); - -void PIO_KeypadDisableIt(AT91S_PIO *pio, unsigned int mode); - - -#endif //#ifndef PIO_KEYPAD_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pmc/pmc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pmc/pmc.c deleted file mode 100644 index 2c72eff3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pmc/pmc.c +++ /dev/null @@ -1,143 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "pmc.h" -#include -#include - -//------------------------------------------------------------------------------ -// Local definitions -//------------------------------------------------------------------------------ -#define MASK_STATUS0 0xFFFFFFFC -#define MASK_STATUS1 0xFFFFFFFF - - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Enables the clock of a peripheral. The peripheral ID is used - * to identify which peripheral is targetted. - * \note The ID must NOT be shifted (i.e. 1 << ID_xxx). - * \param id Peripheral ID (ID_xxx). - */ -void PMC_EnablePeripheral(unsigned int id) -{ - SANITY_CHECK(id < 35); - if (id < 32) { - if ((PMC->PMC_PCSR0 & (1 << id)) == (1 << id)) { - - TRACE_DEBUG("PMC_EnablePeripheral: clock of peripheral" " %u is already enabled\n\r", id); - } - else { - PMC->PMC_PCER0 = 1 << id; - } - } - else { - id -= 32; - if ((PMC->PMC_PCSR1 & (1 << id)) == (1 << id)) { - - TRACE_DEBUG("PMC_EnablePeripheral: clock of peripheral" " %u is already enabled\n\r", id + 32); - } - else { - PMC->PMC_PCER1 = 1 << id; - } - } -} - -/** - * \brief Disables the clock of a peripheral. The peripheral ID is used - * to identify which peripheral is targetted. - * \note The ID must NOT be shifted (i.e. 1 << ID_xxx). - * \param id Peripheral ID (ID_xxx). - */ -void PMC_DisablePeripheral(unsigned int id) -{ - SANITY_CHECK(id < 35); - if (id < 32) { - if ((PMC->PMC_PCSR0 & (1 << id)) != (1 << id)) { - TRACE_DEBUG("PMC_DisablePeripheral: clock of peripheral" " %u is not enabled\n\r", id); - } - else { - PMC->PMC_PCDR0 = 1 << id; - } - } - else { - id -= 32; - if ((PMC->PMC_PCSR1 & (1 << id)) != (1 << id)) { - TRACE_DEBUG("PMC_DisablePeripheral: clock of peripheral" " %u is not enabled\n\r", id + 32); - } - else { - PMC->PMC_PCDR1 = 1 << id; - } - } -} - -/** - * \brief Enable all the periph clock via PMC - */ -void PMC_EnableAllPeripherals(void) -{ - PMC->PMC_PCER0 = MASK_STATUS0; - while( (PMC->PMC_PCSR0 & MASK_STATUS0) != MASK_STATUS0); - PMC->PMC_PCER1 = MASK_STATUS1; - while( (PMC->PMC_PCSR1 & MASK_STATUS1) != MASK_STATUS1); - TRACE_DEBUG("Enable all periph clocks\n\r"); -} -/** - * \brief Disable all the periph clock via PMC - */ -void PMC_DisableAllPeripherals(void) -{ - PMC->PMC_PCDR0 = MASK_STATUS0; - while((PMC->PMC_PCSR0 & MASK_STATUS0) != 0); - PMC->PMC_PCDR1 = MASK_STATUS1; - while((PMC->PMC_PCSR1 & MASK_STATUS1) != 0); - TRACE_DEBUG("Disable all periph clocks\n\r"); -} - -/** - * \brief Get Periph Status for the given peripheral ID. - * \param id Peripheral ID (ID_xxx). - */ -unsigned int PMC_IsPeriphEnabled(unsigned int id) -{ - SANITY_CHECK(id < 35); - if (id < 32) { - return (PMC->PMC_PCSR0 & (1 << id)); - } - else { - return (PMC->PMC_PCSR1 & (1 << (id - 32))); - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pmc/pmc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pmc/pmc.h deleted file mode 100644 index 0e5bd33e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pmc/pmc.h +++ /dev/null @@ -1,62 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef PMC_H -#define PMC_H - -//------------------------------------------------------------------------------ -// Global functions -//------------------------------------------------------------------------------ - -#if defined(at91sam7l64) || defined(at91sam7l128) -extern void PMC_SetFastWakeUpInputs(unsigned int inputs); -extern void PMC_DisableMainOscillator(void); -extern -#ifdef __ICCARM__ -__ramfunc -#endif //__ICCARM__ -void PMC_DisableMainOscillatorForWaitMode(void); -#endif // at91sam7l64 at91sam7l128 - -extern void PMC_DisableProcessorClock(void); -extern void PMC_EnablePeripheral(unsigned int id); -extern void PMC_DisablePeripheral(unsigned int id); -extern void PMC_CPUInIdleMode(void); - - -extern void PMC_EnableAllPeripherals(void); - -extern void PMC_DisableAllPeripherals(void); - -extern unsigned int PMC_IsAllPeriphEnabled(void); - -extern unsigned int PMC_IsPeriphEnabled(unsigned int id); - -#endif //#ifndef PMC_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pwmc/pwmc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pwmc/pwmc.c deleted file mode 100644 index 406a5c8a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pwmc/pwmc.c +++ /dev/null @@ -1,648 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup pwm_module Working with PWM - * The PWM driver provides the interface to configure and use the PWM - * peripheral. - * - * The PWM macrocell controls square output waveforms of 4 channels. - * Characteristics of output waveforms such as period, duty-cycle, - * dead-time can be configured.\n - * Some of PWM channels can be linked together as synchronous channel and - * duty-cycle of synchronous channels can be updated by PDC automaticly. - * - * Before enabling the channels, they must have been configured first. - * The main settings include: - *
    - *
  • Configuration of the clock generator.
    • - *
  • Selection of the clock for each channel.
    • - *
  • Configuration of output waveform characteristics, such as period, duty-cycle etc.
    • - *
  • Configuration for synchronous channels if needed.
    • - * - Selection of the synchronous channels. - * - Selection of the moment when the WRDY flag and the corresponding PDC - * transfer request are set (PTRM and PTRCS in the PWM_SCM register). - * - Configuration of the update mode (UPDM in the PWM_SCM register). - * - Configuration of the update period (UPR in the PWM_SCUP register). - *
- * - * After the channels is enabled, the user must use respective update registers - * to change the wave characteristics to prevent unexpected output waveform. - * i.e. PWM_CDTYUPDx register should be used if user want to change duty-cycle - * when the channel is enabled. - * - * For more accurate information, please look at the PWM section of the - * Datasheet. - * - * Related files :\n - * \ref pwmc.c\n - * \ref pwmc.h.\n - */ -/*@{*/ -/*@}*/ - -/** - * \file - * - * Implementation of the Pulse Width Modulation Controller (PWM) peripheral. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include "pwmc.h" -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Finds a prescaler/divisor couple to generate the desired frequency - * from MCK. - * - * Returns the value to enter in PWM_CLK or 0 if the configuration cannot be - * met. - * - * \param frequency Desired frequency in Hz. - * \param mck Master clock frequency in Hz. - */ -static uint16_t FindClockConfiguration( - uint32_t frequency, - uint32_t mck) -{ - uint32_t divisors[11] = {1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024}; - uint8_t divisor = 0; - uint32_t prescaler; - - SANITY_CHECK(frequency < mck); - - /* Find prescaler and divisor values */ - prescaler = (mck / divisors[divisor]) / frequency; - while ((prescaler > 255) && (divisor < 11)) { - - divisor++; - prescaler = (mck / divisors[divisor]) / frequency; - } - - /* Return result */ - if (divisor < 11) { - - TRACE_DEBUG("Found divisor=%u and prescaler=%u for freq=%uHz\n\r", - divisors[divisor], prescaler, frequency); - return prescaler | (divisor << 8); - } - else { - - return 0; - } -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Configures PWM a channel with the given parameters, basic configure function. - * - * The PWM controller must have been clocked in the PMC prior to calling this - * function. - * Beware: this function disables the channel. It waits until disable is effective. - * - * \param channel Channel number. - * \param prescaler Channel prescaler. - * \param alignment Channel alignment. - * \param polarity Channel polarity. - */ -void PWMC_ConfigureChannel( - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity) -{ - SANITY_CHECK(prescaler < PWM_CMR0_CPRE_MCKB); - SANITY_CHECK((alignment & ~PWM_CMR0_CALG) == 0); - SANITY_CHECK((polarity & ~PWM_CMR0_CPOL) == 0); - - /* Disable channel (effective at the end of the current period) */ - if ((PWM->PWM_SR & (1 << channel)) != 0) { - PWM->PWM_DIS = 1 << channel; - while ((PWM->PWM_SR & (1 << channel)) != 0); - } - - /* Configure channel */ - PWM->PWM_CH_NUM[channel].PWM_CMR = prescaler | alignment | polarity; -} - -/** - * \brief Configures PWM a channel with the given parameters, extend configure function. - * - * The PWM controller must have been clocked in the PMC prior to calling this - * function. - * Beware: this function disables the channel. It waits until disable is effective. - * - * \param channel Channel number. - * \param prescaler Channel prescaler. - * \param alignment Channel alignment. - * \param polarity Channel polarity. - * \param countEventSelect Channel counter event selection. - * \param DTEnable Channel dead time generator enable. - * \param DTHInverte Channel Dead-Time PWMHx output Inverted. - * \param DTLInverte Channel Dead-Time PWMHx output Inverted. - */ -void PWMC_ConfigureChannelExt( - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity, - uint32_t countEventSelect, - uint32_t DTEnable, - uint32_t DTHInverte, - uint32_t DTLInverte) -{ - SANITY_CHECK(prescaler < PWM_CMR0_CPRE_MCKB); - SANITY_CHECK((alignment & ~PWM_CMR0_CALG) == 0); - SANITY_CHECK((polarity & ~PWM_CMR0_CPOL) == 0); - SANITY_CHECK((countEventSelect & ~PWM_CMR0_CES) == 0); - SANITY_CHECK((DTEnable & ~PWM_CMR0_DTE) == 0); - SANITY_CHECK((DTHInverte & ~PWM_CMR0_DTHI) == 0); - SANITY_CHECK((DTLInverte & ~PWM_CMR0_DTLI) == 0); - - /* Disable channel (effective at the end of the current period) */ - if ((PWM->PWM_SR & (1 << channel)) != 0) { - PWM->PWM_DIS = 1 << channel; - while ((PWM->PWM_SR & (1 << channel)) != 0); - } - - /* Configure channel */ - PWM->PWM_CH_NUM[channel].PWM_CMR = prescaler | alignment | polarity | - countEventSelect | DTEnable | DTHInverte | DTLInverte; -} - -/** - * \brief Configures PWM clocks A & B to run at the given frequencies. - * - * This function finds the best MCK divisor and prescaler values automatically. - * - * \param clka Desired clock A frequency (0 if not used). - * \param clkb Desired clock B frequency (0 if not used). - * \param mck Master clock frequency. - */ -void PWMC_ConfigureClocks(uint32_t clka, uint32_t clkb, uint32_t mck) -{ - uint32_t mode = 0; - uint32_t result; - - /* Clock A */ - if (clka != 0) { - - result = FindClockConfiguration(clka, mck); - ASSERT(result != 0, "-F- Could not generate the desired PWM frequency (%uHz)\n\r", (unsigned int)clka); - mode |= result; - } - - /* Clock B */ - if (clkb != 0) { - - result = FindClockConfiguration(clkb, mck); - ASSERT(result != 0, "-F- Could not generate the desired PWM frequency (%uHz)\n\r", (unsigned int)clkb); - mode |= (result << 16); - } - - /* Configure clocks */ - TRACE_DEBUG("Setting PWM_CLK = 0x%08X\n\r", mode); - PWM->PWM_CLK = mode; -} - -/** - * \brief Sets the period value used by a PWM channel. - * - * This function writes directly to the CPRD register if the channel is disabled; - * otherwise, it uses the update register CPRDUPD. - * - * \param channel Channel number. - * \param period Period value. - */ -void PWMC_SetPeriod(uint8_t channel, uint16_t period) -{ - /* If channel is disabled, write to CPRD */ - if ((PWM->PWM_SR & (1 << channel)) == 0) { - - PWM->PWM_CH_NUM[channel].PWM_CPRD = period; - } - /* Otherwise use update register */ - else { - - PWM->PWM_CH_NUM[channel].PWM_CPRDUPD = period; - } -} - -/** - * \brief Sets the duty cycle used by a PWM channel. - * This function writes directly to the CDTY register if the channel is disabled; - * otherwise it uses the update register CDTYUPD. - * Note that the duty cycle must always be inferior or equal to the channel - * period. - * - * \param channel Channel number. - * \param duty Duty cycle value. - */ -void PWMC_SetDutyCycle(uint8_t channel, uint16_t duty) -{ - SANITY_CHECK(duty <= PWM->PWM_CH_NUM[channel].PWM_CPRD); - - /* If channel is disabled, write to CDTY */ - if ((PWM->PWM_SR & (1 << channel)) == 0) { - - PWM->PWM_CH_NUM[channel].PWM_CDTY = duty; - } - /* Otherwise use update register */ - else { - - PWM->PWM_CH_NUM[channel].PWM_CDTYUPD = duty; - } -} - -/** - * \brief Sets the dead time used by a PWM channel. - * This function writes directly to the DT register if the channel is disabled; - * otherwise it uses the update register DTUPD. - * Note that the dead time must always be inferior or equal to the channel - * period. - * - * \param channel Channel number. - * \param timeH Dead time value for PWMHx output. - * \param timeL Dead time value for PWMLx output. - */ -void PWMC_SetDeadTime(uint8_t channel, uint16_t timeH, uint16_t timeL) -{ - SANITY_CHECK(timeH <= PWM->PWM_CH_NUM[channel].PWM_CPRD); - SANITY_CHECK(timeL <= PWM->PWM_CH_NUM[channel].PWM_CPRD); - - /* If channel is disabled, write to DT */ - if ((PWM->PWM_SR & (1 << channel)) == 0) { - - PWM->PWM_CH_NUM[channel].PWM_DT = timeH | (timeL << 16); - } - /* Otherwise use update register */ - else { - PWM->PWM_CH_NUM[channel].PWM_DTUPD = timeH | (timeL << 16); - } -} - -/** - * \brief Configures Syncronous channel with the given parameters. - * Beware: At this time, the channels should be disabled. - * - * \param channels Bitwise OR of Syncronous channels. - * \param updateMode Syncronous channel update mode. - * \param requestMode PDC transfer request mode. - * \param requestComparisonSelect PDC transfer request comparison selection. - */ -void PWMC_ConfigureSyncChannel( - uint32_t channels, - uint32_t updateMode, - uint32_t requestMode, - uint32_t requestComparisonSelect) -{ - PWM->PWM_SCM = channels | updateMode | requestMode - | requestComparisonSelect; -} - -/** - * \brief Sets the update period of the synchronous channels. - * This function writes directly to the SCUP register if the channel #0 is disabled; - * otherwise it uses the update register SCUPUPD. - * - * \param period update period. - */ -void PWMC_SetSyncChannelUpdatePeriod(uint8_t period) -{ - /* If channel is disabled, write to SCUP */ - if ((PWM->PWM_SR & (1 << 0)) == 0) { - - PWM->PWM_SCUP = period; - } - /* Otherwise use update register */ - else { - - PWM->PWM_SCUPUPD = period; - } -} - -/** - * \brief Sets synchronous channels update unlock. - * - * Note: If the UPDM field is set to 0, writing the UPDULOCK bit to 1 - * triggers the update of the period value, the duty-cycle and - * the dead-time values of synchronous channels at the beginning - * of the next PWM period. If the field UPDM is set to 1 or 2, - * writing the UPDULOCK bit to 1 triggers only the update of - * the period value and of the dead-time values of synchronous channels. - * This bit is automatically reset when the update is done. - */ -void PWMC_SetSyncChannelUpdateUnlock(void) -{ - PWM->PWM_SCUC = PWM_SCUC_UPDULOCK; -} - -/** - * \brief Enables the given PWM channel. - * - * This does NOT enable the corresponding pin;this must be done in the user code. - * - * \param channel Channel number. - */ -void PWMC_EnableChannel(uint8_t channel) -{ - PWM->PWM_ENA = 1 << channel; -} - -/** - * \brief Disables the given PWM channel. - * - * Beware, channel will be effectively disabled at the end of the current period. - * Application can check channel is disabled using the following wait loop: - * while ((PWM->PWM_SR & (1 << channel)) != 0); - * - * \param channel Channel number. - */ -void PWMC_DisableChannel(uint8_t channel) -{ - PWM->PWM_DIS = 1 << channel; -} - -/** - * \brief Enables the period interrupt for the given PWM channel. - * - * \param channel Channel number. - */ -void PWMC_EnableChannelIt(uint8_t channel) -{ - PWM->PWM_IER1 = 1 << channel; -} - -/** - * \brief Disables the period interrupt for the given PWM channel. - * - * \param channel Channel number. - */ -void PWMC_DisableChannelIt(uint8_t channel) -{ - PWM->PWM_IDR1 = 1 << channel; -} - -/** - * \brief Enables the selected interrupts sources on a PWMC peripheral. - * - * \param sources1 Bitwise OR of selected interrupt sources of PWM_IER1. - * \param sources2 Bitwise OR of selected interrupt sources of PWM_IER2. - */ -void PWMC_EnableIt(uint32_t sources1, uint32_t sources2) -{ - PWM->PWM_IER1 = sources1; - PWM->PWM_IER2 = sources2; -} - -/** - * \brief Disables the selected interrupts sources on a PWMC peripheral. - * - * \param sources1 Bitwise OR of selected interrupt sources of PWM_IDR1. - * \param sources2 Bitwise OR of selected interrupt sources of PWM_IDR2. - */ -void PWMC_DisableIt(uint32_t sources1, uint32_t sources2) -{ - PWM->PWM_IDR1 = sources1; - PWM->PWM_IDR2 = sources2; -} - -/** - * \brief Sends the contents of buffer through a PWMC peripheral, using the PDC to - * take care of the transfer. - * - * Note: Duty cycle of syncronous channels can update by PDC - * when the field UPDM (Update Mode) in the PWM_SCM register is set to 2. - * - * \param pwmc Pointer to an Pwm instance. - * \param buffer Data buffer to send. - * \param length Length of the data buffer. - */ -uint8_t PWMC_WriteBuffer(Pwm *pwmc, - void *buffer, - uint32_t length) -{ - /* Check if first bank is free */ - if (pwmc->PWM_TCR == 0) { - - pwmc->PWM_TPR = (uint32_t) buffer; - pwmc->PWM_TCR = length; - pwmc->PWM_PTCR = PERIPH_PTCR_TXTEN; - return 1; - } - /* Check if second bank is free */ - else if (pwmc->PWM_TNCR == 0) { - - pwmc->PWM_TNPR = (uint32_t) buffer; - pwmc->PWM_TNCR = length; - return 1; - } - - /* No free banks */ - return 0; -} - -/** - * \brief Set PWM output override value. - * - * \param value Bitwise OR of output override value. - */ -void PWMC_SetOverrideValue(uint32_t value) -{ - PWM->PWM_OOV = value; -} - -/** - * \brief Enalbe override output. - * - * \param value Bitwise OR of output selection. - * \param sync 0: enable the output asyncronously, 1: enable it syncronously - */ -void PWMC_EnableOverrideOutput(uint32_t value, uint32_t sync) -{ - if (sync) { - - PWM->PWM_OSSUPD = value; - } else { - - PWM->PWM_OSS = value; - } -} - -/** - * \brief Disalbe override output. - * - * \param value Bitwise OR of output selection. - * \param sync 0: enable the output asyncronously, 1: enable it syncronously - */ -void PWMC_DisableOverrideOutput(uint32_t value, uint32_t sync) -{ - if (sync) { - - PWM->PWM_OSCUPD = value; - } else { - - PWM->PWM_OSC = value; - } -} - -/** - * \brief Set PWM fault mode. - * - * \param mode Bitwise OR of fault mode. - */ -void PWMC_SetFaultMode(uint32_t mode) -{ - PWM->PWM_FMR = mode; -} - -/** - * \brief PWM fault clear. - * - * \param fault Bitwise OR of fault to clear. - */ -void PWMC_FaultClear(uint32_t fault) -{ - PWM->PWM_FCR = fault; -} - -/** - * \brief Set PWM fault protection value. - * - * \param value Bitwise OR of fault protection value. - */ -void PWMC_SetFaultProtectionValue(uint32_t value) -{ - PWM->PWM_FPV = value; -} - -/** - * \brief Enable PWM fault protection. - * - * \param value Bitwise OR of FPEx[y]. - */ -void PWMC_EnableFaultProtection(uint32_t value) -{ - PWM->PWM_FPE = value; -} - -/** - * \brief Configure comparison unit. - * - * \param x comparison x index - * \param value comparison x value. - * \param mode comparison x mode - */ -void PWMC_ConfigureComparisonUnit(uint32_t x, uint32_t value, uint32_t mode) -{ - /* If channel is disabled, write to CMPxM & CMPxV */ - if ((PWM->PWM_SR & (1 << 0)) == 0) { - if (x == 0) { - PWM->PWM_CMP0M = mode; - PWM->PWM_CMP0V = value; - } else if (x == 1) { - PWM->PWM_CMP1M = mode; - PWM->PWM_CMP1V = value; - } else if (x == 2) { - PWM->PWM_CMP2M = mode; - PWM->PWM_CMP2V = value; - } else if (x == 3) { - PWM->PWM_CMP3M = mode; - PWM->PWM_CMP3V = value; - } else if (x == 4) { - PWM->PWM_CMP4M = mode; - PWM->PWM_CMP4V = value; - } else if (x == 5) { - PWM->PWM_CMP5M = mode; - PWM->PWM_CMP5V = value; - } else if (x == 6) { - PWM->PWM_CMP6M = mode; - PWM->PWM_CMP6V = value; - } else if (x == 7) { - PWM->PWM_CMP7M = mode; - PWM->PWM_CMP7V = value; - } - } - /* Otherwise use update register */ - else { - if (x == 0) { - PWM->PWM_CMP0MUPD = mode; - PWM->PWM_CMP0VUPD = value; - } else if (x == 1) { - PWM->PWM_CMP1MUPD = mode; - PWM->PWM_CMP1VUPD = value; - } else if (x == 2) { - PWM->PWM_CMP2MUPD = mode; - PWM->PWM_CMP2VUPD = value; - } else if (x == 3) { - PWM->PWM_CMP3MUPD = mode; - PWM->PWM_CMP3VUPD = value; - } else if (x == 4) { - PWM->PWM_CMP4MUPD = mode; - PWM->PWM_CMP4VUPD = value; - } else if (x == 5) { - PWM->PWM_CMP5MUPD = mode; - PWM->PWM_CMP5VUPD = value; - } else if (x == 6) { - PWM->PWM_CMP6MUPD = mode; - PWM->PWM_CMP6VUPD = value; - } else if (x == 7) { - PWM->PWM_CMP7MUPD = mode; - PWM->PWM_CMP7VUPD = value; - } - } -} - -/** - * \brief Configure event line mode. - * - * \param x Line x - * \param mode Bitwise OR of line mode selection - */ -void PWMC_ConfigureEventLineMode(uint32_t x, uint32_t mode) -{ - SANITY_CHECK(x < 2); - - PWM->PWM_ELxMR[x] = mode; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pwmc/pwmc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pwmc/pwmc.h deleted file mode 100644 index 1c0a5b29..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/pwmc/pwmc.h +++ /dev/null @@ -1,159 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * Interface for configuration the Pulse Width Modulation Controller (PWM) peripheral. - * - * \par Usage - * - * -# Configures PWM clocks A & B to run at the given frequencies using - * \ref PWMC_ConfigureClocks(). - * -# Configure PWMC channel using \ref PWMC_ConfigureChannel(), \ref PWMC_ConfigureChannelExt() - * \ref PWMC_SetPeriod(), \ref PWMC_SetDutyCycle() and \ref PWMC_SetDeadTime(). - * -# Enable & disable channel using \ref PWMC_EnableChannel() and - * \ref PWMC_DisableChannel(). - * -# Enable & disable the period interrupt for the given PWM channel using - * \ref PWMC_EnableChannelIt() and \ref PWMC_DisableChannelIt(). - * -# Enable & disable the selected interrupts sources on a PWMC peripheral - * using \ref PWMC_EnableIt() and \ref PWMC_DisableIt(). - * -# Control syncronous channel using \ref PWMC_ConfigureSyncChannel(), - * \ref PWMC_SetSyncChannelUpdatePeriod() and \ref PWMC_SetSyncChannelUpdateUnlock(). - * -# Control PWM override output using \ref PWMC_SetOverrideValue(), - * \ref PWMC_EnableOverrideOutput() and \ref PWMC_DisableOverrideOutput(). - * -# \ref Send data through the transmitter using \ref PWMC_WriteBuffer(). - * - */ - -#ifndef PWMC_H -#define PWMC_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/* PWM sub-bit field definition. begin */ -/* TODO: remove them when AT91SAM3S4.h have the definitions. */ -// PWM_CMRx -#define PWM_CMR0_CPRE_MCKA (0xB) // (PWMC_CH) -#define PWM_CMR0_CPRE_MCKB (0xC) // (PWMC_CH) -#define PWM_CMR1_CPRE_MCKA (0xB) // (PWMC_CH) -#define PWM_CMR2_CPRE_MCKA (0xB) // (PWMC_CH) -// PWM_SCM -#define PWM_SCM_UPDM_MODE0 (0x0 << 16) // (PWMC) Manual write of data and manual trigger of the update -#define PWM_SCM_UPDM_MODE1 (0x1 << 16) // (PWMC) Manual write of data and automatic trigger of the update -#define PWM_SCM_UPDM_MODE2 (0x2 << 16) // (PWMC) Automatic write of data and automatic trigger of the update -/* end */ - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void PWMC_ConfigureChannel( - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity); - -extern void PWMC_ConfigureChannelExt( - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity, - uint32_t countEventSelect, - uint32_t DTEnable, - uint32_t DTHInverte, - uint32_t DTLInverte); - -extern void PWMC_ConfigureClocks - (uint32_t clka, - uint32_t clkb, - uint32_t mck); - -extern void PWMC_SetPeriod(uint8_t channel, uint16_t period); - -extern void PWMC_SetDutyCycle(uint8_t channel, uint16_t duty); - -extern void PWMC_SetDeadTime(uint8_t channel, uint16_t timeH, uint16_t timeL); - -extern void PWMC_ConfigureSyncChannel( - uint32_t channels, - uint32_t updateMode, - uint32_t requestMode, - uint32_t requestComparisonSelect); - -extern void PWMC_SetSyncChannelUpdatePeriod(uint8_t period); - -extern void PWMC_SetSyncChannelUpdateUnlock(void); - -extern void PWMC_EnableChannel(uint8_t channel); - -extern void PWMC_DisableChannel(uint8_t channel); - -extern void PWMC_EnableChannelIt(uint8_t channel); - -extern void PWMC_DisableChannelIt(uint8_t channel); - -extern void PWMC_EnableIt(uint32_t sources1, uint32_t sources2); - -extern void PWMC_DisableIt(uint32_t sources1, uint32_t sources2); - -extern uint8_t PWMC_WriteBuffer(Pwm *pwmc, - void *buffer, - uint32_t length); - -extern void PWMC_SetOverrideValue(uint32_t value); - -extern void PWMC_EnableOverrideOutput(uint32_t value, uint32_t sync); - -extern void PWMC_DisableOverrideOutput(uint32_t value, uint32_t sync); - -extern void PWMC_SetFaultMode(uint32_t mode); - -extern void PWMC_FaultClear(uint32_t fault); - -extern void PWMC_SetFaultProtectionValue(uint32_t value); - -extern void PWMC_EnableFaultProtection(uint32_t value); - -extern void PWMC_ConfigureComparisonUnit(uint32_t x, uint32_t value, uint32_t mode); - -extern void PWMC_ConfigureEventLineMode(uint32_t x, uint32_t mode); - -#endif /* #ifndef PWMC_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/qtouch/libQTouchIarCfg3SRevABeta1.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/qtouch/libQTouchIarCfg3SRevABeta1.txt deleted file mode 100644 index a0aa300d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/qtouch/libQTouchIarCfg3SRevABeta1.txt +++ /dev/null @@ -1,6 +0,0 @@ -QTouch library for AT91SAM3S-EK board version A. -Modified board. - -Burst pulses 5 CPU cycles wide. - -Slider on pins PA0, PA1, PA2, PA3, PA4, PA5 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/qtouch/libQTouchIarCfg3SRevABeta2.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/qtouch/libQTouchIarCfg3SRevABeta2.txt deleted file mode 100644 index 3ae67b9d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/qtouch/libQTouchIarCfg3SRevABeta2.txt +++ /dev/null @@ -1,10 +0,0 @@ -QTouch library for AT91SAM3S-EK board version A. -Modified board. - -Burst pulses 5 CPU cycles wide. - -A Valid key on pins PC22 and PC23 -A UP key on pins PC24 and PC25 -A Down key on pins PC26 and PC27 -A Left key on pins PC28 and PC29 -A right key on pins PC30 and PC31 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/qtouch/libQTouchIarCfg3SRevB.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/qtouch/libQTouchIarCfg3SRevB.txt deleted file mode 100644 index b05f3865..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/qtouch/libQTouchIarCfg3SRevB.txt +++ /dev/null @@ -1,11 +0,0 @@ -QTouch library for AT91SAM3S-EK board version B. - -Burst pulses 5 CPU cycles wide. - -Slider on pins PA0, PA1, PA2, PA3, PA4, PA5 - -A Valid key on pins PC22 and PC23 -A UP key on pins PC24 and PC25 -A Down key on pins PC26 and PC27 -A Left key on pins PC28 and PC29 -A right key on pins PC30 and PC31 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/rtc/rtc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/rtc/rtc.c deleted file mode 100644 index 8ed4d430..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/rtc/rtc.c +++ /dev/null @@ -1,467 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup rtc_module Working with RTC - * The RTC driver provides the interface to configure and use the RTC - * peripheral. - * - * It manages date, time, and alarms.\n - * This timer is clocked by the 32kHz system clock, and is not impacted by - * power management settings (PMC). To be accurate, it is better to use an - * external 32kHz crystal instead of the internal 32kHz RC.\n - * - * It uses BCD format, and time can be set in AM/PM or 24h mode through a - * configuration bit in the mode register.\n - * - * To update date or time, the user has to follow these few steps : - *
    - *
  • Set UPDTIM and/or UPDCAL bit(s) in RTC_CR,
    • - *
  • Polling or IRQ on the ACKUPD bit of RTC_CR,
    • - *
  • Clear ACKUPD bit in RTC_SCCR,
    • - *
  • Update Time and/or Calendar values in RTC_TIMR/RTC_CALR (BCD format),
    • - *
  • Clear UPDTIM and/or UPDCAL bit in RTC_CR.
    • - *
- * An alarm can be set to happen on month, date, hours, minutes or seconds, - * by setting the proper "Enable" bit of each of these fields in the Time and - * Calendar registers. - * This allows a large number of configurations to be available for the user. - * Alarm occurence can be detected even by polling or interrupt. - * - * A check of the validity of the date and time format and values written by the user is automatically done. - * Errors are reported through the Valid Entry Register. - * - * For more accurate information, please look at the RTC section of the - * Datasheet. - * - * Related files :\n - * \ref rtc.c\n - * \ref rtc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of Real Time Clock (RTC) controller. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include "rtc.h" -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Sets the RTC in either 12 or 24 hour mode. - * - * \param mode Hour mode. - */ -void RTC_SetHourMode(uint32_t mode) -{ - SANITY_CHECK((mode & 0xFFFFFFFE) == 0); - - TRACE_DEBUG("RTC_SetHourMode()\n\r"); - - RTC->RTC_MR = mode; -} - -/** - * \brief Gets the RTC mode. - * - * \return Hour mode. - */ -uint32_t RTC_GetHourMode( void ) -{ - uint32_t hmode; - - TRACE_DEBUG("RTC_SetHourMode()\n\r"); - - hmode = RTC->RTC_MR; - hmode &= 0xFFFFFFFE; - - return hmode; -} - -/** - * \brief Enables the selected interrupt sources of the RTC. - * - * \param sources Interrupt sources to enable. - */ -void RTC_EnableIt(uint32_t sources) -{ - SANITY_CHECK((sources & ~0x1F) == 0); - - TRACE_DEBUG("RTC_EnableIt()\n\r"); - - RTC->RTC_IER = sources; -} - -/** -* \brief Disables the selected interrupt sources of the RTC. -* -* \param sources Interrupt sources to disable. -*/ -void RTC_DisableIt(uint32_t sources) -{ - SANITY_CHECK((sources & ~0x1F) == 0); - - TRACE_DEBUG("RTC_DisableIt()\n\r"); - - RTC->RTC_IDR = sources; -} - -/** - * \brief Sets the current time in the RTC. - * - * \param hour Current hour in 12 or 24 hour mode. - * \param minute Current minute. - * \param second Current second. - * \return 0 sucess, 1 fail to set - */ -int RTC_SetTime(uint8_t hour, uint8_t minute, uint8_t second) -{ - uint32_t time=0; - uint8_t hour_bcd; - uint8_t min_bcd; - uint8_t sec_bcd; - - TRACE_DEBUG("RTC_SetTime(%02d:%02d:%02d)\n\r", hour, minute, second); - - /* if 12-hour mode, set AMPM bit */ - if ((RTC->RTC_MR & RTC_MR_HRMOD) == RTC_MR_HRMOD) { - - if (hour > 12) { - - hour -= 12; - time |= RTC_TIMR_AMPM; - } - } - hour_bcd = (hour%10) | ((hour/10)<<4); - min_bcd = (minute%10) | ((minute/10)<<4); - sec_bcd = (second%10) | ((second/10)<<4); - - /* value overflow */ - if((hour_bcd & (uint8_t)(~RTC_HOUR_BIT_LEN_MASK)) | - (min_bcd & (uint8_t)(~RTC_MIN_BIT_LEN_MASK)) | - (sec_bcd & (uint8_t)(~RTC_SEC_BIT_LEN_MASK))) - return 1; - - time = sec_bcd | (min_bcd << 8) | (hour_bcd<<16); - - /* Set time */ - while ((RTC->RTC_SR & RTC_SR_SEC) != RTC_SR_SEC); /* wait from previous set */ - RTC->RTC_CR |= RTC_CR_UPDTIM; - while ((RTC->RTC_SR & RTC_SR_ACKUPD) != RTC_SR_ACKUPD); - RTC->RTC_SCCR = RTC_SCCR_ACKCLR; - RTC->RTC_TIMR = time; - RTC->RTC_CR &= ~RTC_CR_UPDTIM; - RTC->RTC_SCCR |= RTC_SCCR_SECCLR; /* clear SECENV in SCCR */ - - return (int)(RTC->RTC_VER & RTC_VER_NVTIM); -} - -/** - * \brief Retrieves the current time as stored in the RTC in several variables. - * - * \param pHour If not null, current hour is stored in this variable. - * \param pMinute If not null, current minute is stored in this variable. - * \param pSecond If not null, current second is stored in this variable. - */ -void RTC_GetTime( - uint8_t *pHour, - uint8_t *pMinute, - uint8_t *pSecond) -{ - uint32_t time; - - TRACE_DEBUG("RTC_GetTime()\n\r"); - - /* Get current RTC time */ - time = RTC->RTC_TIMR; - while (time != RTC->RTC_TIMR) { - - time = RTC->RTC_TIMR; - } - - /* Hour */ - if (pHour) { - - *pHour = ((time & 0x00300000) >> 20) * 10 - + ((time & 0x000F0000) >> 16); - if ((time & RTC_TIMR_AMPM) == RTC_TIMR_AMPM) { - - *pHour += 12; - } - } - - /* Minute */ - if (pMinute) { - - *pMinute = ((time & 0x00007000) >> 12) * 10 - + ((time & 0x00000F00) >> 8); - } - - /* Second */ - if (pSecond) { - - *pSecond = ((time & 0x00000070) >> 4) * 10 - + (time & 0x0000000F); - } -} - -/** - * \brief Sets a time alarm on the RTC. - * The match is performed only on the provided variables; - * Setting all pointers to 0 disables the time alarm. - * - * \note In AM/PM mode, the hour value must have bit #7 set for PM, cleared for - * AM (as expected in the time registers). - * - * \param pHour If not null, the time alarm will hour-match this value. - * \param pMinute If not null, the time alarm will minute-match this value. - * \param pSecond If not null, the time alarm will second-match this value. - * \return 0 success, 1 fail to set - */ -int RTC_SetTimeAlarm( - uint8_t *pHour, - uint8_t *pMinute, - uint8_t *pSecond) -{ - uint32_t alarm = 0; - - TRACE_DEBUG("RTC_SetTimeAlarm()\n\r"); - - /* Hour */ - if (pHour) { - - alarm |= RTC_TIMALR_HOUREN | ((*pHour / 10) << 20) | ((*pHour % 10) << 16); - } - - /* Minute */ - if (pMinute) { - - alarm |= RTC_TIMALR_MINEN | ((*pMinute / 10) << 12) | ((*pMinute % 10) << 8); - } - - /* Second */ - if (pSecond) { - - alarm |= RTC_TIMALR_SECEN | ((*pSecond / 10) << 4) | (*pSecond % 10); - } - - RTC->RTC_TIMALR = alarm; - - return (int)(RTC->RTC_VER & RTC_VER_NVTIMALR); -} - -/** - * \brief Retrieves the current year, month and day from the RTC. - * Month, day and week values are numbered starting at 1. - * - * \param pYear Current year (optional). - * \param pMonth Current month (optional). - * \param pDay Current day (optional). - * \param pWeek Current day in current week (optional). - */ -void RTC_GetDate( - unsigned short *pYear, - uint8_t *pMonth, - uint8_t *pDay, - uint8_t *pWeek) -{ - uint32_t date; - - /* Get current date (multiple reads are necessary to insure a stable value) */ - do { - - date = RTC->RTC_CALR; - } - while (date != RTC->RTC_CALR); - - /* Retrieve year */ - if (pYear) { - - *pYear = (((date >> 4) & 0x7) * 1000) - + ((date & 0xF) * 100) - + (((date >> 12) & 0xF) * 10) - + ((date >> 8) & 0xF); - } - - /* Retrieve month */ - if (pMonth) { - - *pMonth = (((date >> 20) & 1) * 10) + ((date >> 16) & 0xF); - } - - /* Retrieve day */ - if (pDay) { - - *pDay = (((date >> 28) & 0x3) * 10) + ((date >> 24) & 0xF); - } - - /* Retrieve week */ - if (pWeek) { - - *pWeek = ((date >> 21) & 0x7); - } -} - -/** - * \brief Sets the current year, month and day in the RTC. - * Month, day and week values must be numbered starting from 1. - * - * \param year Current year. - * \param month Current month. - * \param day Current day. - * \param week Day number in current week. - * \return 0 success, 1 fail to set - */ -int RTC_SetDate( - unsigned short year, - uint8_t month, - uint8_t day, - uint8_t week) -{ - uint32_t date; - uint8_t cent_bcd; - uint8_t year_bcd; - uint8_t month_bcd; - uint8_t day_bcd; - uint8_t week_bcd; - - cent_bcd = ((year/100)%10) | ((year/1000)<<4); - year_bcd = (year%10) | (((year/10)%10)<<4); - month_bcd = ((month%10) | (month/10)<<4); - day_bcd = ((day%10) | (day/10)<<4); - week_bcd = ((week%10) | (week/10)<<4); - - /* value over flow */ - if((cent_bcd & (uint8_t)(~RTC_CENT_BIT_LEN_MASK)) | - (year_bcd & (uint8_t)(~RTC_YEAR_BIT_LEN_MASK)) | - (month_bcd & (uint8_t)(~RTC_MONTH_BIT_LEN_MASK)) | - (week_bcd & (uint8_t)(~RTC_WEEK_BIT_LEN_MASK)) | - (day_bcd & (uint8_t)(~RTC_DATE_BIT_LEN_MASK))) - return 1; - - - /* Convert values to date register value */ - date = cent_bcd | - (year_bcd << 8) | - (month_bcd << 16) | - (week_bcd << 21) | - (day_bcd << 24); - - - /* Update calendar register */ - while ((RTC->RTC_SR & RTC_SR_SEC) != RTC_SR_SEC); /* wait from previous set */ - RTC->RTC_CR |= RTC_CR_UPDCAL; - while ((RTC->RTC_SR & RTC_SR_ACKUPD) != RTC_SR_ACKUPD); - RTC->RTC_SCCR = RTC_SCCR_ACKCLR; - RTC->RTC_CALR = date; - RTC->RTC_CR &= ~RTC_CR_UPDCAL; - RTC->RTC_SCCR |= RTC_SCCR_SECCLR; /* clear SECENV in SCCR */ - - return (int)(RTC->RTC_VER & RTC_VER_NVCAL); -} - -/** - * \brief Sets a date alarm in the RTC. - * The alarm will match only the provided values; - * Passing a null-pointer disables the corresponding field match. - * - * \param pMonth If not null, the RTC alarm will month-match this value. - * \param pDay If not null, the RTC alarm will day-match this value. - * \return 0 success, 1 fail to set - */ -int RTC_SetDateAlarm(uint8_t *pMonth, uint8_t *pDay) -{ - uint32_t alarm; - - alarm = ((pMonth) || (pDay)) ? (0) : (0x01010000); - - TRACE_DEBUG("RTC_SetDateAlarm()\n\r"); - - /* Compute alarm field value */ - if (pMonth) { - - alarm |= RTC_CALALR_MTHEN | ((*pMonth / 10) << 20) | ((*pMonth % 10) << 16); - } - if (pDay) { - - alarm |= RTC_CALALR_DATEEN | ((*pDay / 10) << 28) | ((*pDay % 10) << 24); - } - - /* Set alarm */ - RTC->RTC_CALALR = alarm; - - return (int)(RTC->RTC_VER & RTC_VER_NVCALALR); -} - -/** - * \brief Clear flag bits of status clear command register in the RTC. - * - * \param mask Bits mask of cleared events - */ -void RTC_ClearSCCR(uint32_t mask) -{ - /* Clear all flag bits in status clear command register */ - mask &= RTC_SCCR_ACKCLR | RTC_SCCR_ALRCLR | RTC_SCCR_SECCLR | \ - RTC_SCCR_TIMCLR | RTC_SCCR_CALCLR; - - RTC->RTC_SCCR = mask; -} - -/** - * \brief Get flag bits of status register in the RTC. - * - * \param mask Bits mask of Status Register - * \return Status register & mask - */ -uint32_t RTC_GetSR(uint32_t mask) -{ - uint32_t event; - - event = RTC->RTC_SR; - - return (event & mask); -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/rtc/rtc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/rtc/rtc.h deleted file mode 100644 index 5f821d3d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/rtc/rtc.h +++ /dev/null @@ -1,99 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Real Time Clock (RTC) controller. - * - */ - -#ifndef RTC_H -#define RTC_H - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -#define RTC_HOUR_BIT_LEN_MASK 0x3F -#define RTC_MIN_BIT_LEN_MASK 0x7F -#define RTC_SEC_BIT_LEN_MASK 0x7F -#define RTC_CENT_BIT_LEN_MASK 0x7F -#define RTC_YEAR_BIT_LEN_MASK 0xFF -#define RTC_MONTH_BIT_LEN_MASK 0x1F -#define RTC_DATE_BIT_LEN_MASK 0x3F -#define RTC_WEEK_BIT_LEN_MASK 0x07 - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void RTC_SetHourMode(uint32_t mode); - -extern uint32_t RTC_GetHourMode( void ) ; - -extern void RTC_EnableIt(uint32_t sources); - -extern void RTC_DisableIt(uint32_t sources); - -extern int RTC_SetTime( - uint8_t hour, - uint8_t minute, - uint8_t second); - -extern void RTC_GetTime( - uint8_t *pHour, - uint8_t *pMinute, - uint8_t *pSecond); - -extern int RTC_SetTimeAlarm( - uint8_t *pHour, - uint8_t *pMinute, - uint8_t *pSecond); - -extern void RTC_GetDate( - unsigned short *pYear, - uint8_t *pMonth, - uint8_t *pDay, - uint8_t *pWeek); - -extern int RTC_SetDate( - unsigned short year, - uint8_t month, - uint8_t day, - uint8_t week); - -extern int RTC_SetDateAlarm(uint8_t *pMonth, uint8_t *pDay); - -extern void RTC_ClearSCCR(uint32_t mask); - -extern uint32_t RTC_GetSR(uint32_t mask); - -#endif /* #ifndef RTC_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/rtt/rtt.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/rtt/rtt.c deleted file mode 100644 index f225ad35..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/rtt/rtt.c +++ /dev/null @@ -1,136 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup rtt_module Working with RTT - * The RTT driver provides the interface to configure and use the RTT - * peripheral. - * - * The Real-time Timer is used to count elapsed seconds.\n - * This timer is clocked by the 32kHz system clock divided by a programmable - * 16-bit balue. To be accurate, it is better to use an - * external 32kHz crystal instead of the internal 32kHz RC.\n - * - * To count elapsed seconds, the user could follow these few steps: - *
    - *
  • Programming PTPRES in RTT_MR to feeding the timer with a 1Hz signal.
    • - *
  • Writing the bit RTTRST in RTT_MR to restart the timer with new settings.
    • - *
- * - * An alarm can be set to happen on second by setting alarm value in RTT_AR. - * Alarm occurence can be detected by polling or interrupt. - * - * For more accurate information, please look at the RTT section of the - * Datasheet. - * - * Related files :\n - * \ref rtt.c\n - * \ref rtt.h.\n - */ -/*@{*/ -/*@}*/ - -/** - * \file - * - * Implementation of Real Time Timer (RTT) controller. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include "rtt.h" -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Changes the prescaler value of the given RTT and restarts it. - * - * \note This function disables RTT interrupt sources. - * - * \param rtt Pointer to a Rtt instance. - * \param prescaler Prescaler value for the RTT. - */ -void RTT_SetPrescaler(Rtt *rtt, uint16_t prescaler) -{ - rtt->RTT_MR = (prescaler | RTT_MR_RTTRST); -} - -/** - * \brief Returns the current value of the RTT timer value. - * - * \param rtt Pointer to a Rtt instance. - */ -uint32_t RTT_GetTime(Rtt *rtt) -{ - return rtt->RTT_VR; -} - -/** - * \brief Enables the specified RTT interrupt sources. - * - * \param rtt Pointer to a Rtt instance. - * \param sources Bitmask of interrupts to enable. - */ -void RTT_EnableIT(Rtt *rtt, uint32_t sources) -{ - ASSERT((sources & 0x0004FFFF) == 0, - "RTT_EnableIT: Wrong sources value.\n\r"); - rtt->RTT_MR |= sources; -} - -/** - * \brief Returns the status register value of the given RTT. - * - * \param rtt Pointer to an Rtt instance. - */ -uint32_t RTT_GetStatus(Rtt *rtt) -{ - return rtt->RTT_SR; -} - -/** - * \brief Configures the RTT to generate an alarm at the given time. - * - * \param pRtt Pointer to an Rtt instance. - * \param time Alarm time. - */ -void RTT_SetAlarm(Rtt *pRtt, uint32_t time) -{ - SANITY_CHECK(time > 0); - - pRtt->RTT_AR = time - 1; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/rtt/rtt.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/rtt/rtt.h deleted file mode 100644 index 13d4b716..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/rtt/rtt.h +++ /dev/null @@ -1,80 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * Interface for Real Time Timer (RTT) controller. - * - * \par Usage - * - * -# Changes the prescaler value of the given RTT and restarts it - * using \ref RTT_SetPrescaler(). - * -# Get current value of the RTT using \ref RTT_GetTime(). - * -# Enables the specified RTT interrupt using \ref RTT_EnableIT(). - * -# Get the status register value of the given RTT using \ref RTT_GetStatus(). - * -# Configures the RTT to generate an alarm at the given time - * using \ref RTT_SetAlarm(). - */ - -#ifndef RTT_H -#define RTT_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -#ifndef AT91C_BASE_RTTC - #define AT91C_BASE_RTTC RTT -#endif - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void RTT_SetPrescaler(Rtt *rtt, uint16_t prescaler); - -extern uint32_t RTT_GetTime(Rtt *rtt); - -extern void RTT_EnableIT(Rtt *rtt, uint32_t sources); - -extern uint32_t RTT_GetStatus(Rtt *rtt); - -extern void RTT_SetAlarm(Rtt *pRtt, uint32_t time); - -#endif /* #ifndef RTT_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/at45d.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/at45d.c deleted file mode 100644 index 4a608837..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/at45d.c +++ /dev/null @@ -1,253 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup at45d_module AT45 driver. - * The AT45 Dataflash driver is based on the corresponding AT45 driver. - * A AT45 instance has to be initialized using the Dataflash levle function - * AT45_Configure(). AT45 Dataflash can be automatically detected using - * the AT45_FindDevice() function. Then AT45 dataflash operations such as - * read, write and erase DF can be launched using AT45_SendCommand function - * with corresponding AT45 command set. - * - * \usage - *
    - *
  • Reads data from the At45 at the specified address using AT45D_Read().
    • - *
  • Writes data on the At45 at the specified address using AT45D_Write().
    • - *
  • Erases a page of data at the given address using AT45D_Erase().
    • - *
  • Poll until the At45 has completed of corresponding operations using - * AT45D_WaitReady().
    • - *
  • Retrieves and returns the At45 current using AT45D_GetStatus().
    • - *
- * Related files :\n - * \ref at45d.c\n - * \ref at45d.h.\n - */ - /*@{*/ - /*@}*/ - - -/** - * \file - * - * Implementation of At45 driver. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "spi_at45.h" -#include "at45d.h" -#include -#include - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Wait for transfer to finish calling the SPI driver ISR (interrupts are - * disabled). - * - * \param pAt45 Pointer to an AT45 driver instance. - */ -static void AT45D_Wait(At45 *pAt45) -{ - SANITY_CHECK(pAt45); - - /* Wait for transfer to finish*/ - while (AT45_IsBusy(pAt45)) { - - SPID_Handler(pAt45->pSpid); - } -} - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Waits for the At45 to be ready to accept new commands. - * - * \param pAt45 Pointer to an AT45 driver instance. - */ -void AT45D_WaitReady(At45 *pAt45) -{ - uint8_t ready = 0; - - SANITY_CHECK(pAt45); - /* Poll device until it is ready.*/ - while (!ready) { - ready = AT45_STATUS_READY(AT45D_GetStatus(pAt45)); - } -} - -/** - * \brief Retrieves and returns the At45 current status, or 0 if an error happened. - * - * \param pAt45 Pointer to an AT45 driver instance. - */ -uint8_t AT45D_GetStatus(At45 *pAt45) -{ - uint8_t error; - uint8_t status; - - SANITY_CHECK(pAt45); - - /* Issue a status register read command*/ - error = AT45_SendCommand(pAt45, AT45_STATUS_READ, 1, &status, 1, 0, 0, 0); - ASSERT(!error, "-F- AT45_GetStatus: Failed to issue command.\n\r"); - - /* Wait for command to terminate*/ - while (AT45_IsBusy(pAt45)) { - AT45D_Wait(pAt45); - } - return status; -} - -/** - * \brief Reads data from the At45 inside the provided buffer. Since a continuous - * read command is used, there is no restriction on the buffer size and read address. - * - * \param pAt45 Pointer to an AT45 driver instance. - * \param pBuffer Data buffer. - * \param size Number of bytes to read. - * \param address Address at which data shall be read. - */ -void AT45D_Read( - At45 *pAt45, - uint8_t *pBuffer, - uint32_t size, - uint32_t address) -{ - uint8_t error; - - SANITY_CHECK(pAt45); - SANITY_CHECK(pBuffer); - - /* Issue a continuous read array command.*/ - error = AT45_SendCommand(pAt45, AT45_CONTINUOUS_READ_LEG, 8, pBuffer, size, address, 0, 0); - ASSERT(!error, "-F- AT45_Read: Failed to issue command\n\r"); - - /* Wait for the read command to execute.*/ - while (AT45_IsBusy(pAt45)) { - - AT45D_Wait(pAt45); - } -} - -/** - * \brief Writes data on the At45 at the specified address. Only one page of - * data is written that way; if the address is not at the beginning of the - * page, the data is written starting from this address and wraps around to - * the beginning of the page. - * \param pAt45 Pointer to an AT45 driver instance. - * \param pBuffer Data buffer. - * \param size Number of bytes to write. - * \param address Destination address on the At45. - */ -void AT45D_Write( - At45 *pAt45, - uint8_t *pBuffer, - uint32_t size, - uint32_t address) -{ - uint8_t error; - - SANITY_CHECK(pAt45); - SANITY_CHECK(pBuffer); - SANITY_CHECK(size <= pAt45->pDesc->pageSize); - - /* Issue a page write through buffer 1 command. */ - error = AT45_SendCommand(pAt45, AT45_PAGE_WRITE_BUF1, 4, pBuffer, size, address, 0, 0); - ASSERT(!error, "-F- AT45_Write: Could not issue command.\n\r"); - - /* Wait until the command is sent. */ - while (AT45_IsBusy(pAt45)) { - - AT45D_Wait(pAt45); - } - - /* Wait until the At45 becomes ready again.*/ - AT45D_WaitReady(pAt45); -} - -/** - * \brief Erases a page of data at the given address in the At45. - * - * \param pAt45 Pointer to an AT45 driver instance. - * \param address Address of page to erase. - */ -void AT45D_Erase(At45 *pAt45, uint32_t address) -{ - uint8_t error; - - SANITY_CHECK(pAt45); - - /* Issue a page erase command. */ - error = AT45_SendCommand(pAt45, AT45_PAGE_ERASE, 4, 0, 0, address, 0, 0); - ASSERT(!error, "-F- AT45_Erase: Could not issue command.\n\r"); - - /* Wait for end of transfer. */ - while (AT45_IsBusy(pAt45)) { - - AT45D_Wait(pAt45); - } - - /* Poll until the At45 has completed the erase operation.*/ - AT45D_WaitReady(pAt45); -} - -/** - * \brief Configure power-of-2 binary page size in the At45. - * - * \param pAt45 Pointer to an AT45 driver instance. - */ -void AT45D_BinaryPage(At45 *pAt45) -{ - uint8_t error; - uint8_t opcode[3]= {AT45_BINARY_PAGE}; - SANITY_CHECK(pAt45); - - /* Issue a binary page command. */ - - error = AT45_SendCommand(pAt45, AT45_BINARY_PAGE_FIRST_OPCODE, 1, opcode, 3, 0, 0, 0); - - ASSERT(!error, "-F- AT45_Erase: Could not issue command.\n\r"); - - /* Wait for end of transfer.*/ - while (AT45_IsBusy(pAt45)) { - - AT45D_Wait(pAt45); - } - - /* Wait until the At45 becomes ready again.*/ - AT45D_WaitReady(pAt45); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/at45d.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/at45d.h deleted file mode 100644 index 31a06ab6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/at45d.h +++ /dev/null @@ -1,72 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of At45 driver. - * - */ - - -#ifndef AT45D_H -#define AT45D_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "spi_at45.h" - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ - -extern void AT45D_WaitReady(At45 *pAt45); - -extern uint8_t AT45D_GetStatus(At45 *pAt45); - -extern void AT45D_Read( - At45 *pAt45, - uint8_t *pBuffer, - uint32_t size, - uint32_t address); - -extern void AT45D_Write( - At45 *pAt45, - uint8_t *pBuffer, - uint32_t size, - uint32_t address); - -extern void AT45D_Erase(At45 *pAt45, uint32_t address); - -extern void AT45D_BinaryPage(At45 *pAt45); - -#endif //#ifndef AT45D_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/spi_at45.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/spi_at45.c deleted file mode 100644 index 679a7d78..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/spi_at45.c +++ /dev/null @@ -1,311 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup spi_at45_module SPI AT45 driver. - * The Dataflash driver is based on top of the corresponding Spi driver. - * A Dataflash structure instance has to be initialized using the DF_Init - * function. Then basic dataflash operations can be launched using macros such - * as DF_continuous_read. These macros invoke the DF_Command() function which - * invokes the DPI low driver using the SPI_SendCommand() function. - * Beware to compute the dataflash internal address, the dataflash sector - * description must be known (DataflashDesc). Dataflash can be automatically - * detected using the DF_Scan() function. - * - * \usage - *
    - *
  • Initializes an AT45 instance and configures SPI chip select pin - * using AT45_Configure().
    • - *
  • Detect DF and returns DF description corresponding to the device - * connected using AT45_FindDevice().This function shall be called by - * the application before AT45_SendCommand.
    • - *
  • Sends a command to the DF through the SPI using AT45_SendCommand(). - * The command is identified by its command code and the number of - * bytes to transfer.
    • - *
  • Example code for sending command to write a page to DF.
    • - * \code - * // Issue a page write through buffer 1 command - * error = AT45_SendCommand(pAt45, AT45_PAGE_WRITE_BUF1, 4, - * pBuffer, size, address, 0, 0); - * \endcode - *
  • Example code for sending command to read a page from DF. - * If data needs to be received, then a data buffer must be - * provided.
    • - * \code - * // Issue a continuous read array command - * error = AT45_SendCommand(pAt45, AT45_CONTINUOUS_READ_LEG, 8, - * pBuffer, size, address, 0, 0); - * \endcode - *
  • This function does not block; its optional callback will - * be invoked when the transfer completes.
    • - *
  • Check the AT45 driver is ready or not by polling AT45_IsBusy(). - *
- * Related files :\n - * \ref spi_at45.c\n - * \ref spi_at45.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of SPI At45 driver. - * - */ - - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "spi_at45.h" -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Internal definitions - *----------------------------------------------------------------------------*/ - -/** Number of dataflash which can be recognized.*/ -#define NUMDATAFLASH (sizeof(at45Devices) / sizeof(At45Desc)) - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** indicate if the device is configured as binary page or not.*/ -static uint8_t configuredBinaryPage; - -/** At45 device descriptor structure. */ -static const At45Desc at45Devices[] = { - { 512, 1, 264, 9, 0x0C, "AT45DB011D"}, - { 1024, 1, 264, 9, 0x14, "AT45DB021D"}, - { 2048, 1, 264, 9, 0x1C, "AT45DB041D"}, - { 4096, 1, 264, 9, 0x24, "AT45DB081D"}, - { 4096, 1, 528, 10, 0x2C, "AT45DB161D"}, - { 8192, 1, 528, 10, 0x34, "AT45DB321D"}, - { 8192, 1, 1056, 11, 0x3C, "AT45DB642D"}, - {16384, 1, 1056, 11, 0x10, "AT45DB1282"}, - {16384, 1, 2112, 12, 0x18, "AT45DB2562"}, - {32768, 1, 2112, 12, 0x20, "AT45DB5122"} -}; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initializes an AT45 instance and configures SPI chip select register. - * - * \param pAt45 Pointer to the At45 instance to initialize. - * \param pSpid Pointer to the underlying SPI driver. - * \param spiCs Chip select value to connect to the At45. - * \return 0. - */ -uint8_t AT45_Configure(At45 *pAt45, Spid *pSpid, uint8_t spiCs) -{ - SpidCmd *pCommand; - - /* Sanity checks */ - ASSERT(pSpid, "AT45_Configure: pSpid is 0.\n\r"); - ASSERT(pAt45, "AT45_Configure: pAt45 is 0.\n\r"); - - /* Initialize the At45 instance */ - pAt45->pSpid = pSpid; - pAt45->pDesc = 0; - memset(pAt45->pCmdBuffer, 0, 8); - - /* Initialize the spidCmd structure*/ - pCommand = &(pAt45->command); - pCommand->pCmd = pAt45->pCmdBuffer; - pCommand->callback = 0; - pCommand->pArgument = 0; - pCommand->spiCs = spiCs; - - return 0; -} - -/** - * \brief Check if the At45 driver is in busy. - * - * \param pAt45 Pointer to the At45 instance to initialize. - * \return 1 if the At45 driver is not executing any command,otherwise it returns 0. - */ -uint8_t AT45_IsBusy(At45 *pAt45) -{ - return SPID_IsBusy(pAt45->pSpid); -} - -/** - * \brief Sends a command to the dataflash through the SPI. - * The command is identified by its command code and the number of bytes to transfer - * (1 + number of address bytes + number of dummy bytes).If data needs to be received, - * then a data buffer must be provided. - * \note This function does not block; its optional callback will be invoked when - * the transfer completes. - * \param pAt45 Pointer to the At45 instance to initialize. - * \param cmd Command code. - * \param cmdSize Size of command code + address bytes + dummy bytes. - * \param pData Data buffer. - * \param dataSize Number of data bytes to send/receive. - * \param address Address at which the command is performed if meaningful. - * \param callback Optional callback to invoke at end of transfer. - * \param pArgument Optional parameter to the callback function. - * \return 0. - */ -uint8_t AT45_SendCommand( - At45 *pAt45, - uint8_t cmd, - uint8_t cmdSize, - uint8_t *pData, - uint32_t dataSize, - uint32_t address, - SpidCallback callback, - void *pArgument) -{ - SpidCmd *pCommand; - const At45Desc *pDesc = pAt45->pDesc; - uint32_t dfAddress = 0; - - /* Sanity checks*/ - ASSERT(pAt45, "AT45_Command: pAt45 is 0.\n\r"); - ASSERT(pDesc || (cmd == AT45_STATUS_READ), - "AT45_Command: Device has no descriptor, only STATUS_READ command allowed\n\r"); - - /* Check if the SPI driver is available*/ - if (AT45_IsBusy(pAt45)) { - - return AT45_ERROR_LOCK; - } - - /* Compute command pattern*/ - pAt45->pCmdBuffer[0] = cmd; - - /* Add address bytes if necessary*/ - if (cmdSize > 1) { - - ASSERT(pDesc, "AT45_Command: No descriptor for dataflash.\n\r"); - if (!configuredBinaryPage) { - dfAddress = - ((address / (pDesc->pageSize)) << pDesc->pageOffset) - + (address % (pDesc->pageSize)); - } - else { - dfAddress = address; - } - /* Write address bytes*/ - if (pDesc->pageNumber >= 16384) { - - pAt45->pCmdBuffer[1] = ((dfAddress & 0x0F000000) >> 24); - pAt45->pCmdBuffer[2] = ((dfAddress & 0x00FF0000) >> 16); - pAt45->pCmdBuffer[3] = ((dfAddress & 0x0000FF00) >> 8); - pAt45->pCmdBuffer[4] = ((dfAddress & 0x000000FF) >> 0); - - if ((cmd != AT45_CONTINUOUS_READ) && (cmd != AT45_PAGE_READ)) { - - cmdSize++; - } - } - else { - - pAt45->pCmdBuffer[1] = ((dfAddress & 0x00FF0000) >> 16); - pAt45->pCmdBuffer[2] = ((dfAddress & 0x0000FF00) >> 8); - pAt45->pCmdBuffer[3] = ((dfAddress & 0x000000FF) >> 0); - } - } - - /* Update the SPI Transfer descriptors*/ - pCommand = &(pAt45->command); - pCommand->cmdSize = cmdSize; - pCommand->pData = pData; - pCommand->dataSize = dataSize; - pCommand->callback = callback; - pCommand->pArgument = pArgument; - - /* Send Command and data through the SPI*/ - if (SPID_SendCommand(pAt45->pSpid, pCommand)) { - - return AT45_ERROR_SPI; - } - - return 0; -} - -/** - * \brief returns the At45Desc structure corresponding to the device connected. - * It automatically initializes pAt45->pDesc field structure. - * \note This function shall be called by the application before AT45_SendCommand. - * \param pAt45 Pointer to the At45 instance to initialize. - * \param status Device status register value. - * \return 0 if successful; Otherwise, returns AT45_ERROR_LOCK if the At45 - * driver is in use or AT45_ERROR_SPI if there was an error with the SPI driver. - */ -const At45Desc * AT45_FindDevice(At45 *pAt45, uint8_t status) -{ - uint32_t i; - uint8_t id = AT45_STATUS_ID(status); - - /* Check if status is all one; in which case, it is assumed that no device is connected*/ - if (status == 0xFF) { - - return 0; - } - - /* Look in device array */ - i = 0; - pAt45->pDesc = 0; - while ((i < NUMDATAFLASH) && !(pAt45->pDesc)) { - - if (at45Devices[i].id == id) { - - pAt45->pDesc = &(at45Devices[i]); - } - i++; - } - configuredBinaryPage = AT45_STATUS_BINARY(status); - return pAt45->pDesc; -} - -/** - * \brief returns the pagesize corresponding to the device connected. - * \param pAt45 Pointer to the At45 instance to initialize. - * \param status Device status register value. - * \return page size. - */ -uint32_t AT45_PageSize(At45 *pAt45) -{ - uint32_t pagesize = pAt45->pDesc->pageSize; - if(((pAt45->pDesc->hasBinaryPage) == 0) || !configuredBinaryPage){ - return pagesize; - } - return ((pagesize >> 8) << 8); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/spi_at45.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/spi_at45.h deleted file mode 100644 index fc1fca4e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/spi_at45.h +++ /dev/null @@ -1,202 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of SPI At45 driver. - * - */ - -#ifndef SPI_AT45_H -#define SPI_AT45_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "spi_pdc.h" - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ -/** Returns 1 if the device is ready; otherwise 0.*/ -#define AT45_STATUS_READY(status) (status & 0x80) -/** Returns the device ID code.*/ -#define AT45_STATUS_ID(status) (status & 0x3c) -/** Returns 1 if the device is configured in binary page mode; otherwise 0.*/ -#define AT45_STATUS_BINARY(status) (status & 0x01) - -#define AT45_PageOffset(pAt45) ((pAt45)->pDesc->pageOffset) -#define AT45_PageNumber(pAt45) ((pAt45)->pDesc->pageNumber) - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** The dataflash driver is currently in use.*/ -#define AT45_ERROR_LOCK 1 -/** There was an error with the SPI driver.*/ -#define AT45_ERROR_SPI 2 - -/** AT45 dataflash SPI CSR settings given MCK and SPCK.*/ -#define AT45_CSR(mck, spck) (SPI_CSR_NCPHA | SPID_CSR_DLYBCT(mck, 250) | SPID_CSR_DLYBS(mck, 250) | SPID_CSR_SCBR(mck, spck)) - -/** Main memory page read command code. */ -#define AT45_PAGE_READ 0xD2 -/** Continous array read (legacy) command code.*/ -#define AT45_CONTINUOUS_READ_LEG 0xE8 -/** Continous array read (low frequency) command code.*/ -#define AT45_CONTINUOUS_READ_LF 0x03 -/** Continous array read command code.*/ -#define AT45_CONTINUOUS_READ 0x0B -/** Buffer 1 read (low frequency) command code.*/ -#define AT45_BUF1_READ_LF 0xD1 -/** Buffer 2 read (low frequency) command code.*/ -#define AT45_BUF2_READ_LF 0xD3 -/** Buffer 1 read (serial) command code.*/ -#define AT45_BUF1_READ_SER 0xD4 -/** Buffer 2 read (serial) command code.*/ -#define AT45_BUF2_READ_SER 0xD6 -/** Buffer 1 read (8-bit) command code.*/ -#define AT45_BUF1_READ_8B 0x54 -/** Buffer 2 read (8-bit) command code.*/ -#define AT45_BUF2_READ_8B 0x56 - -/** Buffer 1 write command code.*/ -#define AT45_BUF1_WRITE 0x84 -/** Buffer 2 write command code.*/ -#define AT45_BUF2_WRITE 0x87 -/** Buffer 1 to main memory page program with erase command code.*/ -#define AT45_BUF1_MEM_ERASE 0x83 -/** Buffer 2 to main memory page program with erase command code.*/ -#define AT45_BUF2_MEM_ERASE 0x86 -/** Buffer 1 to main memory page program without erase command code.*/ -#define AT45_BUF1_MEM_NOERASE 0x88 -/** Buffer 2 to main memory page program without erase command code.*/ -#define AT45_BUF2_MEM_NOERASE 0x89 -/** Page erase command code.*/ -#define AT45_PAGE_ERASE 0x81 -/** Block erase command code.*/ -#define AT45_BLOCK_ERASE 0x50 -/** Sector erase command code.*/ -#define AT45_SECTOR_ERASE 0x7C -/** Chip erase command code.*/ -#define AT45_CHIP_ERASE 0xC7, 0x94, 0x80, 0x9A -/** Main memory page program through buffer 1 command code.*/ -#define AT45_PAGE_WRITE_BUF1 0x82 -/** Main memory page program through buffer 2 command code.*/ -#define AT45_PAGE_WRITE_BUF2 0x85 - -/** Main memory page to buffer 1 transfer command code.*/ -#define AT45_PAGE_BUF1_TX 0x53 -/** Main memory page to buffer 2 transfer command code.*/ -#define AT45_PAGE_BUF2_TX 0x55 -/** Main memory page to buffer 1 compare command code.*/ -#define AT45_PAGE_BUF1_CMP 0x60 -/** Main memory page to buffer 2 compare command code.*/ -#define AT45_PAGE_BUF2_CMP 0x61 -/** Auto page rewrite through buffer 1 command code.*/ -#define AT45_AUTO_REWRITE_BUF1 0x58 -/** Auto page rewrite through buffer 2 command code.*/ -#define AT45_AUTO_REWRITE_BUF2 0x59 -/** Deep power-down command code.*/ -#define AT45_DEEP_PDOWN 0xB9 -/** Resume from deep power-down command code.*/ -#define AT45_RES_DEEP_PDOWN 0xAB -/** Status register read command code.*/ -#define AT45_STATUS_READ 0xD7 -/** Manufacturer and device ID read command code.*/ -#define AT45_ID_READ 0x9F - -/** Power-of-2 binary page size configuration command code.*/ -#define AT45_BINARY_PAGE_FIRST_OPCODE 0x3D -#define AT45_BINARY_PAGE 0x2A, 0x80, 0xA6 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** Dataflash description. A constant array of DataflashDesc instance is defined - in at45.c. The DF_Scan() function returns the corresponding descriptor according - to the dataflash ID detected. This description (page_size, page_offset) is used - to compute the internal dataflash address by the DF_Command() function. */ -typedef struct { - /** dataflash page number. */ - uint32_t pageNumber; - // indicate if power-of-2 binary page supported.*/ - uint32_t hasBinaryPage; - /** dataflash page size.*/ - uint32_t pageSize; - /** page offset in command.*/ - uint32_t pageOffset; - /** Dataflash ID.*/ - uint8_t id; - /** Identifier.*/ - const char *name; -} At45Desc; - -/** Dataflash driver structure. It holds the current command being processed. - This structure is initialized by the DF_Init() command. - pDfDesc field can be initialized by the DF_Scan() function. - cmdBuffer is a private driver area used to compute the dataflash address to - be sent to the dataflash. Beware the PDC master must have access to this area.*/ -typedef struct _Dataflash { - /** Pointer to Spi Structure (SPI low level driver).*/ - Spid *pSpid; - /** Current SPI command sent to the SPI low level driver.*/ - SpidCmd command; - /** Pointer to the dataflash description.*/ - const At45Desc *pDesc; - /** Buffer to store the current command (opcode + dataflash address.*/ - uint8_t pCmdBuffer[8]; -} At45; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern uint8_t AT45_Configure(At45 *pAt45, Spid *pSpid, uint8_t spiCs); - -extern uint8_t AT45_IsBusy(At45 *pAt45); - -extern uint8_t AT45_SendCommand( - At45 *pAt45, - uint8_t cmd, - uint8_t cmdSize, - uint8_t *pData, - uint32_t dataSize, - uint32_t address, - SpidCallback callback, - void *pArgument); - -extern const At45Desc * AT45_FindDevice(At45 *pAt45, uint8_t status); - -extern uint32_t AT45_PageSize(At45 *pAt45); -#endif // #ifndef SPI_AT45_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/spi_pdc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/spi_pdc.c deleted file mode 100644 index d0998b04..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/spi_pdc.c +++ /dev/null @@ -1,275 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup spi_pdc_module SPI PDC driver - * The Spi driver is a low level spi driver which performs SPI device Initializes, - * spi transfer and receive. It can be used by upper SPI driver such as AT45 - * driver and AT26 driver. - * - * \usage - *
    - *
  • Initializes a SPI instance and the corresponding SPI hardware, - * Configure SPI in Master Mode using SPID_Configure().
    • - *
  • Configures the SPI characteristics (such as Clock Polarity, Phase, - * transfers delay and Baud Rate) for the device corresponding to the - * chip select using SPID_ConfigureCS().
    • - *
  • Starts a SPI master transfer using SPID_SendCommand(). - * The transfer is performed using the PDC channels.
    • - *
  • It enable the SPI clock.
    • - *
  • Set the corresponding peripheral chip select.
    • - *
  • Initialize the two SPI PDC buffers.
    • - *
  • Initialize SPI_TPR and SPI_TCR with SPI command data and size - * to send command data first.
    • - *
  • Initialize SPI_RPR and SPI_RCR with SPI command data and size - * as dummy value.
    • - *
  • Initialize SPI_TNPR and SPI_TNCR with rest of the data to be - * transfered.(if the data specified in cmd structure)
    • - *
  • Initialize SPI_RNPR and SPI_RNCR with rest of the data to be - * received.(if the data specified in cmd structure)
    • - *
  • Initialize the callback function if specified.
    • - *
  • Enable transmitter and receiver.
    • - *
  • Example for sending a command to the dataflash through the SPI.
    • - * \code - * /// Build command to be sent. - * ... - * // Send Command and data through the SPI - * if (SPID_SendCommand(pAt45->pSpid, pCommand)) { - * return AT45_ERROR_SPI; - * } - * \endcode - *
  • The SPI_Handler() must be called by the SPI Interrupt Service Routine - * with the corresponding Spi instance. It is invokes to check for pending - * interrupts.
    • - *
  • Example for initializing SPI interrupt handler in upper application.
    • - * \code - * AIC_ConfigureIT(AT91C_ID_SPI, 0, SPI_Handler); - * \endcode - *
- * Related files :\n - * \ref spi_pdc.c\n - * \ref spi_pdc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of SPI PDC driver. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "spi_pdc.h" -#include - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ - -/** Write PMC register*/ -#define WRITE_PMC(pPmc, regName, value) pPmc->regName = (value) - -/** Write SPI register*/ -#define WRITE_SPI(pSpi, regName, value) pSpi->regName = (value) - -/** Read SPI registers */ -#define READ_SPI(pSpi, regName) (pSpi->regName) - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initializes the Spid structure and the corresponding SPI hardware. - * - * \param pSpid Pointer to a Spid instance. - * \param pSpiHw Associated SPI peripheral. - * \param spiId SPI peripheral identifier. - * \return 0. - */ -uint8_t SPID_Configure(Spid *pSpid, Spi *pSpiHw, uint8_t spiId) -{ - /* Initialize the SPI structure*/ - pSpid->pSpiHw = pSpiHw; - pSpid->spiId = spiId; - pSpid->semaphore = 1; - pSpid->pCurrentCommand = 0; - - /* Enable the SPI clock*/ - WRITE_PMC(PMC, PMC_PCER0, (1 << pSpid->spiId)); - - /* Execute a software reset of the SPI twice */ - WRITE_SPI(pSpiHw, SPI_CR, SPI_CR_SWRST); - WRITE_SPI(pSpiHw, SPI_CR, SPI_CR_SWRST); - - /* Configure SPI in Master Mode with No CS selected !!! */ - WRITE_SPI(pSpiHw, SPI_MR, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PCS); - - /* Enable the SPI*/ - WRITE_SPI(pSpiHw, SPI_CR, SPI_CR_SPIEN); - - /* Enable the SPI clock*/ - WRITE_PMC(PMC, PMC_PCDR0, (1 << pSpid->spiId)); - - return 0; -} - -/** - * \brief Configures the parameters for the device corresponding to the cs. - * - * \param pSpid Pointer to a Spid instance. - * \param cs number corresponding to the SPI chip select. - * \param csr SPI_CSR value to setup. - */ -void SPID_ConfigureCS(Spid *pSpid, uint8_t cs, uint32_t csr) -{ - Spi *pSpiHw = pSpid->pSpiHw; - WRITE_SPI(pSpiHw, SPI_CSR[cs], csr); -} - -/** - * \brief Starts a SPI master transfer. This is a non blocking function. It will - * return as soon as the transfer is started. - * - * \param pSpid Pointer to a Spid instance. - * \param pCommand Pointer to the SPI command to execute. - * \return 0 if the transfer has been started successfully; otherwise returns - * SPID_ERROR_LOCK is the driver is in use, or SPID_ERROR if the command is not - * valid. - */ -uint8_t SPID_SendCommand(Spid *pSpid, SpidCmd *pCommand) -{ - Spi *pSpiHw = pSpid->pSpiHw; - uint32_t spiMr; - - /* Try to get the dataflash semaphore */ - if (pSpid->semaphore == 0) { - - return SPID_ERROR_LOCK; - } - pSpid->semaphore--; - - /* Enable the SPI clock */ - WRITE_PMC(PMC, PMC_PCER0, (1 << pSpid->spiId)); - - /* Disable transmitter and receiver*/ - WRITE_SPI(pSpiHw, SPI_PTCR, SPI_PTCR_RXTDIS | SPI_PTCR_TXTDIS); - - /* Write to the MR register*/ - spiMr = READ_SPI(pSpiHw, SPI_MR); - spiMr |= SPI_MR_PCS; - spiMr &= ~((1 << pCommand->spiCs) << 16); - WRITE_SPI(pSpiHw, SPI_MR, spiMr); - - /* Initialize the two SPI PDC buffer*/ - WRITE_SPI(pSpiHw, SPI_RPR, (int) pCommand->pCmd); - WRITE_SPI(pSpiHw, SPI_RCR, pCommand->cmdSize); - WRITE_SPI(pSpiHw, SPI_TPR, (int) pCommand->pCmd); - WRITE_SPI(pSpiHw, SPI_TCR, pCommand->cmdSize); - - WRITE_SPI(pSpiHw, SPI_RNPR, (int) pCommand->pData); - WRITE_SPI(pSpiHw, SPI_RNCR, pCommand->dataSize); - WRITE_SPI(pSpiHw, SPI_TNPR, (int) pCommand->pData); - WRITE_SPI(pSpiHw, SPI_TNCR, pCommand->dataSize); - - /* Initialize the callback*/ - pSpid->pCurrentCommand = pCommand; - - /* Enable transmitter and receiver*/ - WRITE_SPI(pSpiHw, SPI_PTCR, SPI_PTCR_RXTEN | SPI_PTCR_TXTEN); - - /* Enable buffer complete interrupt*/ - WRITE_SPI(pSpiHw, SPI_IER, SPI_IER_RXBUFF); - - return 0; -} - - -/** - * \brief The SPI_Handler must be called by the SPI Interrupt Service Routine with the - * corresponding Spi instance. - * - * \note The SPI_Handler will unlock the Spi semaphore and invoke the upper application - * callback. - * \param pSpid Pointer to a Spid instance. - */ -void SPID_Handler(Spid *pSpid) -{ - SpidCmd *pSpidCmd = pSpid->pCurrentCommand; - Spi *pSpiHw = pSpid->pSpiHw; - volatile uint32_t spiSr; - - /* Read the status register*/ - spiSr = READ_SPI(pSpiHw, SPI_SR); - if (spiSr & SPI_SR_RXBUFF) { - - /* Disable transmitter and receiver */ - WRITE_SPI(pSpiHw, SPI_PTCR, SPI_PTCR_RXTDIS | SPI_PTCR_TXTDIS); - - /* Disable the SPI clock*/ - WRITE_PMC(PMC, PMC_PCDR0, (1 << pSpid->spiId)); - - /* Disable buffer complete interrupt */ - WRITE_SPI(pSpiHw, SPI_IDR, SPI_IDR_RXBUFF); - - /* Release the dataflash semaphore*/ - pSpid->semaphore++; - - /* Invoke the callback associated with the current command*/ - if (pSpidCmd && pSpidCmd->callback) { - - pSpidCmd->callback(0, pSpidCmd->pArgument); - } - - /* Nothing must be done after. A new DF operation may have been started - in the callback function.*/ - } -} - -/** - * \brief Returns 1 if the SPI driver is currently busy executing a command; otherwise - * returns 0. - * \param pSpid Pointer to a Spid instance. - */ -uint8_t SPID_IsBusy(const Spid *pSpid) -{ - if (pSpid->semaphore == 0) { - - return 1; - } - else { - - return 0; - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/spi_pdc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/spi_pdc.h deleted file mode 100644 index bace9efc..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi-flash/spi_pdc.h +++ /dev/null @@ -1,133 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of SPI PDC driver. - * - */ - -#ifndef SPI_PDC_H -#define SPI_PDC_H - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** An unspecified error has occured.*/ -#define SPID_ERROR 1 - -/** SPI driver is currently in use.*/ -#define SPID_ERROR_LOCK 2 - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ - -/** Calculates the value of the SCBR field of the Chip Select Register given MCK and SPCK.*/ -#define SPID_CSR_SCBR(mck, spck) ((((mck) / (spck)) << 8) & SPI_CSR_SCBR) - -/** Calculates the value of the DLYBS field of the Chip Select Register given delay in ns and MCK.*/ -#define SPID_CSR_DLYBS(mck, delay) ((((((delay) * ((mck) / 1000000)) / 1000) + 1) << 16) & SPI_CSR_DLYBS) - -/** Calculates the value of the DLYBCT field of the Chip Select Register given delay in ns and MCK.*/ -#define SPID_CSR_DLYBCT(mck, delay) ((((((delay) / 32 * ((mck) / 1000000)) / 1000) + 1) << 24) & SPI_CSR_DLYBCT) - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** SPI transfer complete callback.*/ -typedef void (*SpidCallback )(uint8_t, void *); - -/** Spi Transfer Request prepared by the application upper layer. This structure - is sent to the SPI_SendCommand function to start the transfer. At the end of - the transfer, the callback is invoked by the interrupt handler.*/ -typedef struct _SpidCmd { - - /** Pointer to the command data.*/ - uint8_t *pCmd; - /** Command size in bytes.*/ - uint8_t cmdSize; - /** Pointer to the data to be sent.*/ - uint8_t *pData; - /** Data size in bytes.*/ - unsigned short dataSize; - /** SPI chip select.*/ - uint8_t spiCs; - /** Callback function invoked at the end of transfer.*/ - SpidCallback callback; - /** Callback arguments.*/ - void *pArgument; - -} SpidCmd; - -/** Constant structure associated with SPI port. This structure prevents - client applications to have access in the same time.*/ -typedef struct { - - /** Pointer to SPI Hardware registers*/ - Spi *pSpiHw; - /** SPI Id as defined in the product datasheet*/ - char spiId; - /** Current SpiCommand being processed*/ - SpidCmd *pCurrentCommand; - /** Mutual exclusion semaphore.*/ - volatile char semaphore; - -} Spid; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern uint8_t SPID_Configure( - Spid *pSpid, - Spi *pSpiHw, - uint8_t spiId); - -extern void SPID_ConfigureCS(Spid *pSpid, uint8_t cs, uint32_t csr); - -extern uint8_t SPID_SendCommand( - Spid *pSpid, - SpidCmd *pCommand); - -extern void SPID_Handler(Spid *pSpid); - -extern uint8_t SPID_IsBusy(const Spid *pSpid); - -#endif // #ifndef SPI_PDC_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi/spi.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi/spi.c deleted file mode 100644 index 4e6ba29a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi/spi.c +++ /dev/null @@ -1,241 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup spi_module Working with SPI - * The SPI driver provides the interface to configure and use the SPI - * peripheral. - * - * The Serial Peripheral Interface (SPI) circuit is a synchronous serial - * data link that provides communication with external devices in Master - * or Slave Mode. - * - * To use the SPI, the user has to follow these few steps: - * -# Enable the SPI pins required by the application (see pio.h). - * -# Configure the SPI using the \ref SPI_Configure(). This enables the - * peripheral clock. The mode register is loaded with the given value. - * -# Configure all the necessary chip selects with \ref SPI_ConfigureNPCS(). - * -# Enable the SPI by calling \ref SPI_Enable(). - * -# Send/receive data using \ref SPI_Write() and \ref SPI_Read(). Note that \ref SPI_Read() - * must be called after \ref SPI_Write() to retrieve the last value read. - * -# Send/receive data using the PDC with the \ref SPI_WriteBuffer() and - * \ref SPI_ReadBuffer() functions. - * -# Disable the SPI by calling \ref SPI_Disable(). - * - * For more accurate information, please look at the SPI section of the - * Datasheet. - * - * Related files :\n - * \ref spi.c\n - * \ref spi.h.\n -*/ -/*@{*/ -/*@}*/ - -/** - * \file - * - * Implementation of Serial Peripheral Interface (SPI) controller. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "spi.h" -#include "pmc/pmc.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Enables a SPI peripheral. - * - * \param spi Pointer to an Spi instance. - */ -void SPI_Enable(Spi *spi) -{ - spi->SPI_CR = SPI_CR_SPIEN; -} - -/** - * \brief Disables a SPI peripheral. - * - * \param spi Pointer to an Spi instance. - */ -void SPI_Disable(Spi *spi) -{ - spi->SPI_CR = SPI_CR_SPIDIS; -} - -/** - * \brief Configures a SPI peripheral as specified. The configuration can be computed - * using several macros (see \ref spi_configuration_macros). - * - * \param spi Pointer to an Spi instance. - * \param id Peripheral ID of the SPI. - * \param configuration Value of the SPI configuration register. - */ -void SPI_Configure(Spi *spi, - uint32_t id, - uint32_t configuration) -{ - PMC_EnablePeripheral(ID_SPI); - spi->SPI_CR = SPI_CR_SPIDIS; - - /* Execute a software reset of the SPI twice */ - spi->SPI_CR = SPI_CR_SWRST; - spi->SPI_CR = SPI_CR_SWRST; - spi->SPI_MR = configuration; -} - -/** - * \brief Configures a chip select of a SPI peripheral. The chip select configuration - * is computed using several macros (see \ref spi_configuration_macros). - * - * \param spi Pointer to an Spi instance. - * \param npcs Chip select to configure (0, 1, 2 or 3). - * \param configuration Desired chip select configuration. - */ -void SPI_ConfigureNPCS(Spi *spi, - uint32_t npcs, - uint32_t configuration) -{ - spi->SPI_CSR[npcs] = configuration; -} - -/** - * \brief Sends data through a SPI peripheral. If the SPI is configured to use a fixed - * peripheral select, the npcs value is meaningless. Otherwise, it identifies - * the component which shall be addressed. - * - * \param spi Pointer to an Spi instance. - * \param npcs Chip select of the component to address (0, 1, 2 or 3). - * \param data Word of data to send. - */ -void SPI_Write(Spi *spi, uint32_t npcs, uint16_t data) -{ - /* Send data */ - while ((spi->SPI_SR & SPI_SR_TXEMPTY) == 0); - spi->SPI_TDR = data | SPI_PCS(npcs); - while ((spi->SPI_SR & SPI_SR_TDRE) == 0); -} - -/** - * \brief Sends the contents of buffer through a SPI peripheral, using the PDC to - * take care of the transfer. - * - * \param spi Pointer to an Spi instance. - * \param buffer Data buffer to send. - * \param length Length of the data buffer. - */ -uint8_t SPI_WriteBuffer(Spi *spi, - void *buffer, - uint32_t length) -{ - /* Check if first bank is free */ - if (spi->SPI_TCR == 0) { - - spi->SPI_TPR = (uint32_t) buffer; - spi->SPI_TCR = length; - spi->SPI_PTCR = PERIPH_PTCR_TXTEN; - return 1; - } - /* Check if second bank is free */ - else if (spi->SPI_TNCR == 0) { - - spi->SPI_TNPR = (uint32_t) buffer; - spi->SPI_TNCR = length; - return 1; - } - - /* No free banks */ - return 0; -} - -/** - * \brief Check if SPI transfer finish. - * - * \param spi Pointer to an Spi instance. - * - * \return Returns 1 if there is no pending write operation on the SPI; otherwise - * returns 0. - */ -uint8_t SPI_IsFinished(Spi *spi) -{ - return ((spi->SPI_SR & SPI_SR_TXEMPTY) != 0); -} - -/** - * \brief Reads and returns the last word of data received by a SPI peripheral. This - * method must be called after a successful SPI_Write call. - * - * \param spi Pointer to an Spi instance. - * - * \return readed data. - */ -uint16_t SPI_Read(Spi *spi) -{ - while ((spi->SPI_SR & SPI_SR_RDRF) == 0); - return spi->SPI_RDR & 0xFFFF; -} - -/** - * \brief Reads data from a SPI peripheral until the provided buffer is filled. This - * method does NOT need to be called after SPI_Write or SPI_WriteBuffer. - * - * \param spi Pointer to an Spi instance. - * \param buffer Data buffer to store incoming bytes. - * \param length Length in bytes of the data buffer. - */ -uint8_t SPI_ReadBuffer(Spi *spi, - void *buffer, - uint32_t length) -{ - /* Check if the first bank is free */ - if (spi->SPI_RCR == 0) { - - spi->SPI_RPR = (uint32_t) buffer; - spi->SPI_RCR = length; - spi->SPI_PTCR = PERIPH_PTCR_RXTEN; - return 1; - } - /* Check if second bank is free */ - else if (spi->SPI_RNCR == 0) { - - spi->SPI_RNPR = (uint32_t) buffer; - spi->SPI_RNCR = length; - return 1; - } - - /* No free bank */ - return 0; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi/spi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi/spi.h deleted file mode 100644 index f78a34ba..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/spi/spi.h +++ /dev/null @@ -1,104 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Serial Peripheral Interface (SPI) controller. - * - */ - -#ifndef SPI_H -#define SPI_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ - -/** - * \page spi_configuration_macros SPI configuration macros - * - * This page lists several macros which should be used when configuring a SPI - * peripheral. - * - * \par Macros: - * - \ref SPI_PCS - * - \ref SPI_SCBR - * - \ref SPI_DLYBS - * - \ref SPI_DLYBCT - */ - -/** Calculate the PCS field value given the chip select NPCS value */ -#define SPI_PCS(npcs) ((~(1 << npcs) & 0xF) << 16) - -/** Calculates the value of the CSR SCBR field given the baudrate and MCK. */ -#define SPI_SCBR(baudrate, masterClock) \ - ((uint32_t) (masterClock / baudrate) << 8) - -/** Calculates the value of the CSR DLYBS field given the desired delay (in ns) */ -#define SPI_DLYBS(delay, masterClock) \ - ((uint32_t) (((masterClock / 1000000) * delay) / 1000) << 16) - -/** Calculates the value of the CSR DLYBCT field given the desired delay (in ns) */ -#define SPI_DLYBCT(delay, masterClock) \ - ((uint32_t) (((masterClock / 1000000) * delay) / 32000) << 24) -/*------------------------------------------------------------------------------ */ - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void SPI_Enable(Spi *spi); -extern void SPI_Disable(Spi *spi); -extern void SPI_Configure(Spi *spi, - uint32_t id, - uint32_t configuration); -extern void SPI_ConfigureNPCS(Spi *spi, - uint32_t npcs, - uint32_t configuration); -extern void SPI_Write(Spi *spi, uint32_t npcs, uint16_t data); -extern uint8_t SPI_WriteBuffer(Spi *spi, - void *buffer, - uint32_t length); - -extern uint8_t SPI_IsFinished(Spi *pSpi); - -extern uint16_t SPI_Read(Spi *spi); -extern uint8_t SPI_ReadBuffer(Spi *spi, - void *buffer, - uint32_t length); - -#endif /* #ifndef SPI_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/ssc/ssc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/ssc/ssc.c deleted file mode 100644 index 3fb0cc04..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/ssc/ssc.c +++ /dev/null @@ -1,248 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup ssc module Working with SSC - * The SSC driver provides the interface to configure and use the SSC - * peripheral. - * - * !Usage - * - * -# Enable the SSC interface pins. - * -# Configure the SSC to operate at a specific frequency by calling - * SSC_Configure(). This function enables the peripheral clock of the SSC, - * but not its PIOs. - * -# Configure the transmitter and/or the receiver using the - * SSC_ConfigureTransmitter() and SSC_ConfigureEmitter() functions. - * -# Enable the PIOs or the transmitter and/or the received. - * -# Enable the transmitter and/or the receiver using SSC_EnableTransmitter() - * and SSC_EnableReceiver() - * -# Send data through the transmitter using SSC_Write() and SSC_WriteBuffer() - * -# Receive data from the receiver using SSC_Read() and SSC_ReadBuffer() - * -# Disable the transmitter and/or the receiver using SSC_DisableTransmitter() - * and SSC_DisableReceiver() - * - * For more accurate information, please look at the RTC section of the - * Datasheet. - * - * Related files :\n - * \ref ssc.c\n - * \ref ssc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of Synchronous Serial (SSC) controller. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "ssc.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Configures a SSC peripheral.If the divided clock is not used, the master - * clock frequency can be set to 0. - * \note The emitter and transmitter are disabled by this function. - * \param bitRate bit rate. - * \param masterClock master clock. - */ -void SSC_Configure(uint32_t bitRate, uint32_t masterClock) -{ - /* Enable SSC peripheral clock */ - PMC->PMC_PCER0 = 1 << ID_SSC; - - /* Reset, disable receiver & transmitter */ - SSC->SSC_CR = SSC_CR_RXDIS | SSC_CR_TXDIS | SSC_CR_SWRST; - - SSC->SSC_PTCR = SSC_PTCR_RXTDIS | SSC_PTCR_TXTDIS; - /* Configure clock frequency */ - if (bitRate != 0) { - - SSC->SSC_CMR = masterClock / (2 * bitRate); - } - else { - - SSC->SSC_CMR = 0; - } -} - -/** - * \brief Configures the transmitter of a SSC peripheral. - * \param tcmr Transmit Clock Mode Register value. - * \param tfmr Transmit Frame Mode Register value. - */ -void SSC_ConfigureTransmitter(uint32_t tcmr, uint32_t tfmr) -{ - SSC->SSC_TCMR = tcmr; - SSC->SSC_TFMR = tfmr; -} - -/** - * \brief Configures the receiver of a SSC peripheral. - * \param rcmr Receive Clock Mode Register value. - * \param rfmr Receive Frame Mode Register value. - */ -void SSC_ConfigureReceiver(uint32_t rcmr, uint32_t rfmr) -{ - SSC->SSC_RCMR = rcmr; - SSC->SSC_RFMR = rfmr; -} - -/** - * \brief Enables the transmitter of a SSC peripheral. - */ -void SSC_EnableTransmitter(void) -{ - SSC->SSC_CR = SSC_CR_TXEN; -} - -/** - * \brief Disables the transmitter of a SSC peripheral. - */ -void SSC_DisableTransmitter(void) -{ - SSC->SSC_CR = SSC_CR_TXDIS; -} - -/** - * \brief Enables the receiver of a SSC peripheral. - */ -void SSC_EnableReceiver(void) -{ - SSC->SSC_CR = SSC_CR_RXEN; -} - -/** - * \brief Disables the receiver of a SSC peripheral. - */ -void SSC_DisableReceiver(void) -{ - SSC->SSC_CR = SSC_CR_RXDIS; -} - -/** - * \brief Enables one or more interrupt sources of a SSC peripheral. - * \param Bitwise OR of selected interrupt sources. - */ -void SSC_EnableInterrupts(uint32_t sources) -{ - SSC->SSC_IER = sources; -} - -/** - * \brief Disables one or more interrupt sources of a SSC peripheral. - * \param Bitwise OR of selected interrupt sources. - */ -void SSC_DisableInterrupts(uint32_t sources) -{ - SSC->SSC_IDR = sources; -} - -/** - * \brief Sends one data frame through a SSC peripheral. If another frame is currently - * being sent, this function waits for the previous transfer to complete. - * \param frame Data frame to send. - */ -void SSC_Write(uint32_t frame) -{ - while ((SSC->SSC_SR & SSC_SR_TXRDY) == 0); - SSC->SSC_THR = frame; -} - -/** - * \brief Waits until one frame is received on a SSC peripheral, and returns it. - */ -uint32_t SSC_Read(void) -{ - while ((SSC->SSC_SR & SSC_SR_RXRDY) == 0); - return SSC->SSC_RHR; -} - -/** - * \brief Sends the contents of a data buffer a SSC peripheral, using the PDC. - * \param buffer Data buffer to send. - * \param length Size of the data buffer. - * \return 1 if the buffer has been queued for transmission; otherwise returns 0. - */ -uint8_t SSC_WriteBuffer(void *buffer, uint32_t length) -{ - /* Check if first bank is free*/ - if (SSC->SSC_TCR == 0) { - - SSC->SSC_TPR = (uint32_t) buffer; - SSC->SSC_TCR = length; - SSC->SSC_PTCR = SSC_PTCR_TXTEN; - return 1; - } - /* Check if second bank is free*/ - else if (SSC->SSC_TNCR == 0) { - - SSC->SSC_TNPR = (uint32_t) buffer; - SSC->SSC_TNCR = length; - return 1; - } - return 0; -} - -/** - * \brief Reads data coming from a SSC peripheral receiver and stores it into the - * giving buffer with PDC. - * \param buffer ata buffer used for reception. - * \param length Size of the data buffer. - * \return 1 if the buffer has been queued for reception; otherwise returns 0. - */ -uint8_t SSC_ReadBuffer(void *buffer, uint32_t length) -{ - /* Check if the first bank is free*/ - if (SSC->SSC_RCR == 0) { - - SSC->SSC_RPR = (uint32_t) buffer; - SSC->SSC_RCR = length; - SSC->SSC_PTCR = SSC_PTCR_RXTEN; - return 1; - } - /* Check if second bank is free*/ - else if (SSC->SSC_RNCR == 0) { - SSC->SSC_RNPR = (uint32_t) buffer; - SSC->SSC_RNCR = length; - return 1; - } - return 0; -} \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/ssc/ssc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/ssc/ssc.h deleted file mode 100644 index 1dd5185c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/ssc/ssc.h +++ /dev/null @@ -1,58 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Synchronous Serial (SSC) controller. - * - */ - -#ifndef SSC_H -#define SSC_H - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -extern void SSC_Configure(uint32_t bitRate, uint32_t masterClock); -extern void SSC_ConfigureTransmitter(uint32_t tcmr, uint32_t tfmr); -extern void SSC_ConfigureReceiver(uint32_t rcmr, uint32_t rfmr); -extern void SSC_EnableTransmitter(void); -extern void SSC_DisableTransmitter(void); -extern void SSC_EnableReceiver(void); -extern void SSC_DisableReceiver(void); -extern void SSC_EnableInterrupts(uint32_t sources); -extern void SSC_DisableInterrupts(uint32_t sources); -extern void SSC_Write(uint32_t frame); -extern uint32_t SSC_Read(void); -extern uint8_t SSC_WriteBuffer(void *buffer, uint32_t length); -extern uint8_t SSC_ReadBuffer(void *buffer, uint32_t length); - -#endif //#ifndef SSC_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tc/tc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tc/tc.c deleted file mode 100644 index 70ed8fa3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tc/tc.c +++ /dev/null @@ -1,148 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "tc.h" - -/*------------------------------------------------------------------------------ - * Global functions - *------------------------------------------------------------------------------*/ - -/**------------------------------------------------------------------------------ - * \brief Configures a Timer Counter Channel - * Configures a Timer Counter to operate in the given mode. Timer is stopped - * after configuration and must be restarted with TC_Start(). All the - * interrupts of the timer are also disabled. - * \param pTc Pointer to an AT91S_TC instance. - * \param channel Channel number. - * \param mode Operating mode (TC_CMR value). - *------------------------------------------------------------------------------*/ -void TC_Configure(Tc *pTc, unsigned char channel, unsigned int mode) -{ - TcChannel *pTcCh = &pTc->TC_CHANNEL[channel]; - - /* Disable TC clock */ - pTcCh->TC_CCR = TC_CCR0_CLKDIS; - - /* Disable interrupts */ - pTcCh->TC_IDR = 0xFFFFFFFF; - - /* Clear status register */ - pTcCh->TC_SR; - - /* Set mode */ - pTcCh->TC_CMR = mode; -} - -/**------------------------------------------------------------------------------ - * \brief Reset and Start the TC Channel - * Enables the timer clock and performs a software reset to start the counting. - * \param pTc Pointer to an AT91S_TC instance. - * \param channel Channel number. - *------------------------------------------------------------------------------*/ -void TC_Start(Tc *pTc, unsigned char channel) -{ - TcChannel *pTcCh = &pTc->TC_CHANNEL[channel]; - pTcCh->TC_CCR = TC_CCR0_CLKEN | TC_CCR0_SWTRG; -} - -/**------------------------------------------------------------------------------ - * \brief Stop TC Channel - * Disables the timer clock, stopping the counting. - * \param pTc Pointer to an AT91S_TC instance. - * \param channel Channel number. - *------------------------------------------------------------------------------*/ -void TC_Stop(Tc *pTc, unsigned char channel) -{ - TcChannel *pTcCh = &pTc->TC_CHANNEL[channel]; - pTcCh->TC_CCR = TC_CCR0_CLKDIS; -} - -/**------------------------------------------------------------------------------ - * \brief Find best MCK divisor - * Finds the best MCK divisor given the timer frequency and MCK. The result - * is guaranteed to satisfy the following equation: - * \pre - * (MCK / (DIV * 65536)) <= freq <= (MCK / DIV) - * \endpre - * with DIV being the highest possible value. - * \param freq Desired timer frequency. - * \param mck Master clock frequency. - * \param div Divisor value. - * \param tcclks TCCLKS field value for divisor. - * \return 1 if a proper divisor has been found; otherwise 0. - *------------------------------------------------------------------------------*/ -unsigned char TC_FindMckDivisor( - unsigned int freq, - unsigned int mck, - unsigned int *div, - unsigned int *tcclks) -{ - const unsigned int divisors[5] = {2, 8, 32, 128,BOARD_MCK / 32768}; - - unsigned int index = 0; - - /* Satisfy lower bound */ - while (freq < ((mck / divisors[index]) / 65536)) { - - index++; - - /* If no divisor can be found, return 0 */ - if (index == 5) { - - return 0; - } - } - - /* Try to maximize DIV while satisfying upper bound */ - while (index < 4) { - - if (freq > (mck / divisors[index + 1])) { - - break; - } - index++; - } - - /* Store results */ - if (div) { - - *div = divisors[index]; - } - if (tcclks) { - - *tcclks = index; - } - - return 1; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tc/tc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tc/tc.h deleted file mode 100644 index 43cb83df..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tc/tc.h +++ /dev/null @@ -1,70 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**------------------------------------------------------------------------------ - * \unit - * - * Purpose - * - * API for configuring and using Timer Counter (TC) peripherals. - * - * Usage - * -# Optionally, use TC_FindMckDivisor() to let the program find the best - * TCCLKS field value automatically. - * -# Configure a Timer Counter in the desired mode using TC_Configure(). - * -# Start or stop the timer clock using TC_Start() and TC_Stop(). - *------------------------------------------------------------------------------*/ - -#ifndef TC_H -#define TC_H - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -/*------------------------------------------------------------------------------ - * Global functions - *------------------------------------------------------------------------------*/ - -extern void TC_Configure(Tc *pTc, unsigned char ch, unsigned int mode); - -extern void TC_Start(Tc *pTc, unsigned char ch); - -extern void TC_Stop(Tc *pTc, unsigned char ch); - -extern unsigned char TC_FindMckDivisor( - unsigned int freq, - unsigned int mck, - unsigned int *div, - unsigned int *tcclks); - -#endif /* #ifndef TC_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd.h deleted file mode 100644 index 38f0d8df..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd.h +++ /dev/null @@ -1,69 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for touchscreen driver which includes touchscreen calibration, - * retrieving measurements etc. - * - * \par Usage - * - * -# Call TSD_Initialize() whenever the touchscreen should start the - * calibration process (as it is done in the function). - * -# Declare a global TSD_PenPressed function anywhere in your code. This - * function will get called every time the pen is pressed on the screen. - * -# Declare a global TSD_PenMoved function, which will get called whenever - * the pen stays in contact with the screen but changes position. - * -# Declare a global TSD_PenReleased function, which will be invoked as the - * pen is lifted from the screen. - */ - -#ifndef TSD_H -#define TSD_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "tsd_com.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void TSD_Initialize(int8_t calEn); - -extern uint8_t TSD_Calibrate(void); - -extern void TSD_Reset(void); - -extern void TSD_TimerHandler(void); - -#endif /* #ifndef TSD_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd_ads7843.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd_ads7843.c deleted file mode 100644 index ee0fc869..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd_ads7843.c +++ /dev/null @@ -1,302 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of ADS7843 driver. - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include -#include - -#ifdef BOARD_TSC_ADS7843 - -#include "tsd.h" -#include "tsd_com.h" -#include -#include -#include -#include -#include -#include -#include "tsd/tsd_ads7843.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** Delay for pushbutton debouncing (the time-base is 10 ms). */ -#define DEBOUNCE_TIME 6 /* 10 * 6 = 60 ms */ - -/** Color of calibration points. */ -#define POINTS_COLOR 0x0000FF - -/** Size in pixels of calibration points. */ -#define POINTS_SIZE 4 - -/** Maximum difference in pixels between the test point and the measured point. */ -#define POINTS_MAX_ERROR 5 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** pen state */ -typedef enum { - STATE_PEN_RELEASED = 0, - STATE_PEN_PRESSED = 1, - STATE_PEN_DEBOUNCE = 2 -} e_pen_state; - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** Pins used by Interrupt Signal for Touch Screen Controller */ -static const Pin pinPenIRQ = PIN_TCS_IRQ; - -/** Global timestamp in milliseconds since start of application. */ -static volatile uint32_t timestamp = 0; - -/** last time when the pen is pressed on the touchscreen */ -static volatile uint32_t timePress = 0; - -/** last time when the pen is released */ -static volatile uint32_t timeRelease = 0; - -/** pen state */ -static volatile e_pen_state penState = STATE_PEN_RELEASED; - -/** Touch screen initiallized flag */ -static uint32_t tsInitFlag = 0; - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Timer handler for touch screen. Increments the timestamp counter. - * Determine the state "Pen Pressed" or "Pen Released". To change state, - * the penIRQ has to keep the same value during DEBOUNCE_TIME. - * - * \note External timer interrupt should call it per 10ms. - */ -extern void TSD_TimerHandler( void ) -{ - uint32_t data[2]; - static uint32_t point[2]; - - if (!tsInitFlag) return; - - timestamp++; - /* Get the current position of the pen if penIRQ has low value (pen pressed) */ - if (PIO_Get(&pinPenIRQ) == 0) { - /* Get the current position of the pressed pen */ - if(TSDCom_IsCalibrationOk()) { - TSD_GetRawMeasurement(data); - TSDCom_InterpolateMeasurement(data, point); - } - - /* call the callback function */ - if(penState == STATE_PEN_PRESSED) { - if(TSDCom_IsCalibrationOk()) { - TSD_PenMoved(point[0], point[1]); - } - } - } - - /* Determine the pen state */ - if (PIO_Get(&pinPenIRQ) == 0) { - - /* reinit the last time when release */ - timeRelease = timestamp; - if(penState == STATE_PEN_DEBOUNCE) { - if( (timestamp - timePress) > DEBOUNCE_TIME) { - /* pen is pressed during an enough time : the state change */ - penState = STATE_PEN_PRESSED; - /* call the callback function */ - if(TSDCom_IsCalibrationOk()) { - TSD_PenPressed(point[0], point[1]); - } - } - } - } - else { - /* reinit the last time when release */ - timePress = timestamp; - - if(penState == STATE_PEN_DEBOUNCE) { - if( (timestamp - timeRelease) > DEBOUNCE_TIME) { - /* pen is released during an enough time : the state change */ - penState = STATE_PEN_RELEASED; - /* call the callback function */ - if(TSDCom_IsCalibrationOk()) { - TSD_PenReleased(point[0], point[1]); - } - } - } - } -} - -/** - * \breif Interrupt handler for Touchscreen. - */ -static void ISR_PenIRQ(void) -{ - /* Check if the pen has been pressed */ - if (!PIO_Get(&pinPenIRQ)) { - if(penState == STATE_PEN_RELEASED) { - - timePress = timestamp; - penState = STATE_PEN_DEBOUNCE; - } - } - else { - if(penState == STATE_PEN_PRESSED) { - - timeRelease = timestamp; - penState = STATE_PEN_DEBOUNCE; - } - } -} - -/** - * \brief Configure PENIRQ for interrupt. - */ -static void ConfigurePenIRQ(void) -{ - /* Configure pios */ - PIO_Configure(&pinPenIRQ, PIO_LISTSIZE(pinPenIRQ)); - - /* Initialize interrupts */ - PIO_InitializeInterrupts(0); - PIO_ConfigureIt(&pinPenIRQ, (void (*)(const Pin *)) ISR_PenIRQ); - - /* Enable the interrupt */ - PIO_EnableIt(&pinPenIRQ); -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Reads and store a touchscreen measurement in the provided array. - * - * \param pData Array where the measurements will be stored - */ -extern void TSD_GetRawMeasurement(uint32_t *pData) -{ - /* Get the current position of the pressed pen */ - PIO_DisableIt(&pinPenIRQ); - ADS7843_GetPosition(&pData[0], &pData[1]); - PIO_EnableIt(&pinPenIRQ); -} - -/** - * \brief Wait pen pressed. - */ -extern void TSD_WaitPenPressed( void ) -{ - /* Wait for touch & end of conversion */ - while (penState != STATE_PEN_RELEASED); - /*while (penState != STATE_PEN_PRESSED); */ - while (penState != STATE_PEN_PRESSED) { - } -} - -/** - * \brief Wait pen released. - */ -extern void TSD_WaitPenReleased( void ) -{ - /* Wait for contact loss */ - while (penState != STATE_PEN_PRESSED); - while (penState != STATE_PEN_RELEASED); -} - -/** - * \brief Do calibration. - * - * \return 1 if calibration is Ok, 0 else. - */ -uint8_t TSD_Calibrate(void) -{ - uint8_t ret = 0; - - /* Calibration is done only once */ - if(TSDCom_IsCalibrationOk()) { - return 1; - } - - /* Do calibration */ - ret = TSDCom_Calibrate(); - - return ret; -} - -/** - * \brief Initializes the touchscreen driver and starts the calibration process. When - * finished, the touchscreen is operational. - * - * \note Important: the LCD driver must have been initialized prior to calling this - * function. - */ -extern void TSD_Initialize( int8_t calEn ) -{ - ADS7843_Initialize(); - ConfigurePenIRQ(); - - tsInitFlag = 1; - - /* Calibration */ - if(calEn) { - while (!TSD_Calibrate()); - } -} - -/** - * \brief Stop the Touchscreen, disable interrupt. - */ -void TSD_Reset(void) -{ - /* Disable SPI 0 */ - ADS7843_Reset(); - - /* Disable the interrupt */ - PIO_DisableIt(&pinPenIRQ); -} - -#endif /* #ifdef BOARD_TSC_ADS7843 */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd_ads7843.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd_ads7843.h deleted file mode 100644 index 3f4bf2ef..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd_ads7843.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef _TSD_ADS7843_ -#define _TSD_ADS7843_ - -/*---------------------------------------------------------------------------- - * External functions - *----------------------------------------------------------------------------*/ -extern void TSD_PenPressed( uint32_t dwX, uint32_t dwY ) ; -extern void TSD_PenMoved( uint32_t dwX, uint32_t dwY ) ; -extern void TSD_PenReleased( uint32_t dwX, uint32_t dwY ) ; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -extern void TSD_WaitPenPressed( void ) ; -extern void TSD_WaitPenReleased( void ) ; -extern void TSD_GetRawMeasurement( uint32_t *pData ) ; -extern void TSD_Initialize( int8_t calEn ) ; - - -#endif // _TSD_ADS7843_ \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd_com.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd_com.c deleted file mode 100644 index 2e0360fe..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd_com.c +++ /dev/null @@ -1,380 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of touchscreen driver device irrelevance code. - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include - -#include "tsd.h" -#include -#include -#include -#include -#include -#include -#include -#include "tsd/tsd_ads7843.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** Size in pixels of calibration points. */ -#define POINTS_SIZE 4 -/** Maximum difference in pixels between the test point and the measured point. */ -#define POINTS_MAX_ERROR 8 - -/** Delay at the end of calibartion for result display */ -#define DELAY_RESULT_DISPLAY 4000000 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** Point used during the touchscreen calibration process. */ -typedef struct _CalibrationPoint { - - /** Coordinate of point along the X-axis of the screen. */ - uint32_t x; - /** Coordinate of point along the Y-axis of the screen. */ - uint32_t y; - /** Calibration data of point. */ - uint32_t data[2]; - -} CalibrationPoint; - -/*---------------------------------------------------------------------------- - * Variables - *----------------------------------------------------------------------------*/ - -/** indicates if the touch screen has been calibrated. */ -/** If not, Callback functions are not called. */ -static volatile uint8_t bCalibrationOk = 1 ; //0; -/** Slope for interpoling touchscreen measurements along the X-axis. */ -static int32_t xSlope; -/** Slope for interpoling touchscreen measurements along the Y-axis. */ -static int32_t ySlope; - -/** Calibration points. */ -static CalibrationPoint calibrationPoints[] = { - - /* Top-left corner calibration point */ - { - BOARD_LCD_WIDTH / 10, - BOARD_LCD_HEIGHT / 10, - {0, 0} - }, - /* Top-right corner calibration point */ - { - BOARD_LCD_WIDTH - BOARD_LCD_WIDTH / 10, - BOARD_LCD_HEIGHT / 10, - {0, 0} - }, - /* Bottom-right corner calibration point */ - { - BOARD_LCD_WIDTH - BOARD_LCD_WIDTH / 10, - BOARD_LCD_HEIGHT - BOARD_LCD_HEIGHT / 10, - {0, 0} - }, - /* Bottom-left corner calibration point */ - { - BOARD_LCD_WIDTH / 10, - BOARD_LCD_HEIGHT - BOARD_LCD_HEIGHT / 10, - {0, 0} - } -}; - -/** Test point */ -static const CalibrationPoint testPoint = { - BOARD_LCD_WIDTH / 2, - BOARD_LCD_HEIGHT / 2, - {0, 0} -}; - -/*---------------------------------------------------------------------------- - * External functions - *----------------------------------------------------------------------------*/ - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/* - * \brief Display a calibration point on the given buffer. - * - * \param pPoint Calibration point to display. - */ -static void DrawCalibrationPoint(const CalibrationPoint *pPoint) -{ - LCDD_DrawRectangleWithFill(pPoint->x - POINTS_SIZE / 2, - pPoint->y - POINTS_SIZE / 2, - POINTS_SIZE, - POINTS_SIZE, - COLOR_RED); -} - -/** - * \brief Clears a calibration point from the given buffer. - * - * \param pPoint Calibration point to clear. - */ -static void ClearCalibrationPoint(const CalibrationPoint *pPoint) -{ - LCDD_DrawRectangleWithFill(pPoint->x - POINTS_SIZE / 2, - pPoint->y - POINTS_SIZE / 2, - POINTS_SIZE, - POINTS_SIZE, - COLOR_WHITE); -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \breif Indicates if the calibration of the touch screen is Ok. - * - * \return 1 calibration Ok, 0 if not. - */ -uint8_t TSDCom_IsCalibrationOk(void) -{ - if (bCalibrationOk == 1) { - return 1; - } else { - return 0; - } -} - -/** - * \brief Interpolates the provided raw measurements using the previously calculated - * slope. The resulting x and y coordinates are stored in an array. - * - * \param pData Raw measurement data, as returned by TSD_GetRawMeasurement(). - * \param pPoint Array in which x and y will be stored. - */ -void TSDCom_InterpolateMeasurement(const uint32_t *pData, uint32_t *pPoint) -{ - pPoint[0] = calibrationPoints[0].x - - (((int32_t) calibrationPoints[0].data[0] - (int32_t) pData[0]) * 1024) - / xSlope; - - pPoint[1] = calibrationPoints[0].y - - (((int32_t) calibrationPoints[0].data[1] - (int32_t) pData[1]) * 1024) - / ySlope; - - if(pPoint[0] & 0x80000000) /* Is pPoint[0] negative ? */ - { - pPoint[0] = 0; - } - - if(pPoint[0] > BOARD_LCD_WIDTH) /* Is pPoint[0] bigger than the LCD width ? */ - { - pPoint[0] = BOARD_LCD_WIDTH; - } - - if(pPoint[1] & 0x80000000) /* Is pPoint[1] negative ? */ - { - pPoint[1] = 0; - } - - if(pPoint[1] > BOARD_LCD_HEIGHT) /* Is pPoint[1] bigger than the LCD width ? */ - { - pPoint[1] = BOARD_LCD_HEIGHT; - } -} - -/** - * \brief Performs the calibration process using the provided buffer to display - * information. - * - * \return True if calibration was successful; otherwise false. - */ -uint8_t TSDCom_Calibrate(void) -{ - volatile uint32_t i; /* to keep the tempo with gcc code optimisation */ - int32_t slope1, slope2; - CalibrationPoint measuredPoint; - uint8_t xOk, yOk; - int32_t xDiff, yDiff; - - /* Calibration setup */ - LCDD_Fill(COLOR_WHITE); - LCDD_DrawString(30, 50, (uint8_t *)"LCD calibration", COLOR_BLACK); - LCDD_DrawString(1, 140, (uint8_t *)"Touch the dots to\ncalibrate the screen", COLOR_DARKBLUE); - - /* Calibration points */ - for (i=0; i < 4; i++) { - - DrawCalibrationPoint(&calibrationPoints[i]); - - /* Wait for touch & end of conversion */ - TSD_WaitPenPressed(); - TSD_GetRawMeasurement(calibrationPoints[i].data); - ClearCalibrationPoint(&calibrationPoints[i]); - - /* Wait for contact loss */ - TSD_WaitPenReleased(); - } - - /** - * Calculate slopes using the calibration data - * Theory behind those calculations: - * - We suppose the touchscreen measurements are linear, so the following equations are true (simple - * linear regression) for any two 'a' and 'b' points of the screen: - * dx = (a.data[0] - b.data[0]) / (a.x - b.x) - * dy = (a.data[1] - b.data[1]) / (a.y - b.y) - * - * - We calculate dx and dy (called xslope and yslope here) using the calibration points. - * - * - We can then use dx and dy to infer the position of a point 'p' given the measurements performed - * by the touchscreen ('c' is any of the calibration points): - * dx = (p.data[0] - c.data[0]) / (p.x - c.x) - * dy = (p.data[1] - c.data[1]) / (p.y - c.y) - * Thus: - * p.x = c.x - (p.data[0] - c.data[0]) / dx - * p.y = c.y - (p.data[1] - c.data[1]) / dy - * - * - Since there are four calibration points, dx and dy can be calculated twice, so we average - * the two values. - */ - slope1 = ((int32_t) calibrationPoints[0].data[0]) - ((int32_t) calibrationPoints[1].data[0]); - slope1 *= 1024; - slope1 /= ((int32_t) calibrationPoints[0].x) - ((int32_t) calibrationPoints[1].x); - slope2 = ((int32_t) calibrationPoints[2].data[0]) - ((int32_t) calibrationPoints[3].data[0]); - slope2 *= 1024; - slope2 /= ((int32_t) calibrationPoints[2].x) - ((int32_t) calibrationPoints[3].x); - xSlope = (slope1 + slope2) / 2; - - slope1 = ((int32_t) calibrationPoints[0].data[1]) - ((int32_t) calibrationPoints[2].data[1]); - slope1 *= 1024; - slope1 /= ((int32_t) calibrationPoints[0].y) - ((int32_t) calibrationPoints[2].y); - slope2 = ((int32_t) calibrationPoints[1].data[1]) - ((int32_t) calibrationPoints[3].data[1]); - slope2 *= 1024; - slope2 /= ((int32_t) calibrationPoints[1].y) - ((int32_t) calibrationPoints[3].y); - ySlope = (slope1 + slope2) / 2; - - /* Test point */ - LCDD_Fill(0xFFFFFF); - LCDD_DrawString(30, 50, (uint8_t *)"LCD calibration", COLOR_BLACK); - LCDD_DrawString(1, 100, (uint8_t *)" Touch the point to\nvalidate calibration", COLOR_DARKBLUE); - DrawCalibrationPoint(&testPoint); - - /* Wait for touch & end of conversion */ - TSD_WaitPenPressed(); - - TSD_GetRawMeasurement(measuredPoint.data); - TSDCom_InterpolateMeasurement(measuredPoint.data, (uint32_t *) &measuredPoint); - DrawCalibrationPoint(&measuredPoint); - - /* Check resulting x and y */ - xDiff = (int32_t) measuredPoint.x - (int32_t) testPoint.x; - yDiff = (int32_t) measuredPoint.y - (int32_t) testPoint.y; - xOk = (xDiff >= -POINTS_MAX_ERROR) && (xDiff <= POINTS_MAX_ERROR); - yOk = (yDiff >= -POINTS_MAX_ERROR) && (yDiff <= POINTS_MAX_ERROR); - - /* Wait for contact loss */ - TSD_WaitPenReleased(); - - /* Check calibration result */ - if (xOk && yOk) { - - bCalibrationOk = 1; - LCDD_Fill(COLOR_WHITE); - LCDD_DrawString(30, 50, (uint8_t *)"LCD calibration", COLOR_BLACK); - LCDD_DrawString(80, 140, (uint8_t *)"Success !", COLOR_GREEN); - - } - else { - - bCalibrationOk = 0; - LCDD_Fill(COLOR_WHITE); - LCDD_DrawString(30, 50, (uint8_t *)"LCD calibration", COLOR_BLACK); - LCDD_DrawString(40, 140, (uint8_t *)"Error too big", COLOR_RED); - } - - /* Slight delay */ - for (i = 0; i < DELAY_RESULT_DISPLAY; i++); - - return (xOk && yOk); -} - -/** - * \brief Read calibrate data to buffer. - * - * \param pBuffer Data buffer. - * \param size Size of data buffer in bytes. - */ -void TSDCom_ReadCalibrateData(void *pBuffer, uint32_t size) -{ - uint8_t *pDest = (uint8_t *)pBuffer; - - SANITY_CHECK((sizeof(bCalibrationOk) + sizeof(xSlope) + - sizeof(ySlope) + sizeof(calibrationPoints[0].data)) < size); - - memcpy(pDest, (void const *)&bCalibrationOk, sizeof(bCalibrationOk)); - pDest += sizeof(bCalibrationOk); - memcpy(pDest, &xSlope, sizeof(xSlope)); - pDest += sizeof(xSlope); - memcpy(pDest, &ySlope, sizeof(ySlope)); - pDest += sizeof(ySlope); - memcpy(pDest, &calibrationPoints[0].data, sizeof(calibrationPoints[0].data)); - pDest += sizeof(calibrationPoints[0].data); -} - -/** - * \brief Restore calibrate data with buffer data. - * - * \param pBuffer Data buffer. - * \param size Size of data buffer in bytes. - */ -void TSDCom_RestoreCalibrateData(void *pBuffer, uint32_t size) -{ - uint8_t *pSrc = (uint8_t *)pBuffer; - - SANITY_CHECK((sizeof(bCalibrationOk) + sizeof(xSlope) + - sizeof(ySlope) + sizeof(calibrationPoints[0].data)) < size); - - memcpy((void *)&bCalibrationOk, pSrc, sizeof(bCalibrationOk)); - pSrc += sizeof(bCalibrationOk); - memcpy(&xSlope, pSrc, sizeof(xSlope)); - pSrc += sizeof(xSlope); - memcpy(&ySlope, pSrc, sizeof(ySlope)); - pSrc += sizeof(ySlope); - memcpy(&calibrationPoints[0].data, pSrc, sizeof(calibrationPoints[0].data)); - pSrc += sizeof(calibrationPoints[0].data); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd_com.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd_com.h deleted file mode 100644 index ca6f285d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/tsd/tsd_com.h +++ /dev/null @@ -1,54 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for touchscreen driver device irrelevance code. - */ - -#ifndef TSD_COM_H -#define TSD_COM_H - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void TSDCom_InterpolateMeasurement( - const uint32_t *pData, - uint32_t *pPoint); - -uint8_t TSDCom_Calibrate(void); - -uint8_t TSDCom_IsCalibrationOk(void); - -void TSDCom_ReadCalibrateData(void *pBuffer, uint32_t size); -void TSDCom_RestoreCalibrateData(void *pBuffer, uint32_t size); - -#endif /* #ifndef TSD_COM_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/twi/twi.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/twi/twi.c deleted file mode 100644 index 5de7b2ee..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/twi/twi.c +++ /dev/null @@ -1,377 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup twi_module Working with TWI - * The TWI driver provides the interface to configure and use the TWI - * peripheral. - * - * \usage - *
    - *
  • Configures a TWI peripheral to operate in master mode, at the given - * frequency (in Hz) using TWI_Configure().
    • - *
  • Sends a STOP condition on the TWI using TWI_Stop().
    • - *
  • Starts a read operation on the TWI bus with the specified slave using - * TWI_StartRead(). Data must then be read using TWI_ReadByte() whenever - * a byte is available (poll using TWI_ByteReceived()).
    • - *
  • Starts a write operation on the TWI to access the selected slave using - * TWI_StartWrite(). A byte of data must be provided to start the write; - * other bytes are written next.
    • - *
  • Sends a byte of data to one of the TWI slaves on the bus using TWI_WriteByte(). - * This function must be called once before TWI_StartWrite() with the first byte of data - * to send, then it shall be called repeatedly after that to send the remaining bytes.
    • - *
  • Check if a byte has been received and can be read on the given TWI - * peripheral using TWI_ByteReceived().< - * Check if a byte has been sent using TWI_ByteSent().
    • - *
  • Check if the current transmission is complete (the STOP has been sent) - * using TWI_TransferComplete().
    • - *
  • Enables & disable the selected interrupts sources on a TWI peripheral - * using TWI_EnableIt() and TWI_DisableIt().
    • - *
  • Get current status register of the given TWI peripheral using - * TWI_GetStatus(). Get current status register of the given TWI peripheral, but - * masking interrupt sources which are not currently enabled using - * TWI_GetMaskedStatus().
    • - *
- * For more accurate information, please look at the TWI section of the - * Datasheet. - * - * Related files :\n - * \ref twi.c\n - * \ref twi.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of Two Wire Interface (TWI). - * - */ - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "twi.h" -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Configures a TWI peripheral to operate in master mode, at the given - * frequency (in Hz). The duty cycle of the TWI clock is set to 50%. - * \param pTwi Pointer to an Twi instance. - * \param twck Desired TWI clock frequency. - * \param mck Master clock frequency. - */ -void TWI_ConfigureMaster(Twi *pTwi, uint32_t twck, uint32_t mck) -{ - uint32_t ckdiv = 0; - uint32_t cldiv; - uint8_t ok = 0; - - TRACE_DEBUG("TWI_ConfigureMaster()\n\r"); - SANITY_CHECK(pTwi); - - /* SVEN: TWI Slave Mode Enabled */ - pTwi->TWI_CR = TWI_CR_SVEN; - /* Reset the TWI*/ - pTwi->TWI_CR = TWI_CR_SWRST; - pTwi->TWI_RHR; - - /* TWI Slave Mode Disabled, TWI Master Mode Disabled. */ - pTwi->TWI_CR = TWI_CR_SVDIS; - pTwi->TWI_CR = TWI_CR_MSDIS; - - /* Set master mode */ - pTwi->TWI_CR = TWI_CR_MSEN; - - /* Configure clock */ - while (!ok) { - cldiv = ((mck / (2 * twck)) - 3) / power(2, ckdiv); - if (cldiv <= 255) { - ok = 1; - } - else { - ckdiv++; - } - } - ASSERT(ckdiv < 8, "-F- Cannot find valid TWI clock parameters\n\r"); - TRACE_DEBUG("Using CKDIV = %u and CLDIV/CHDIV = %u\n\r", ckdiv, cldiv); - pTwi->TWI_CWGR = 0; - pTwi->TWI_CWGR = (ckdiv << 16) | (cldiv << 8) | cldiv; -} - -/** - * \brief Configures a TWI peripheral to operate in slave mode. - * \param pTwi Pointer to an Twi instance. - * \param slaveAddress Slave address. - */ -void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress) -{ - uint32_t i; - - /* TWI software reset */ - pTwi->TWI_CR = TWI_CR_SWRST; - pTwi->TWI_RHR; - - /* Wait at least 10 ms */ - for (i=0; i < 1000000; i++); - - /* TWI Slave Mode Disabled, TWI Master Mode Disabled*/ - pTwi->TWI_CR = TWI_CR_SVDIS | TWI_CR_MSDIS; - - /* Configure slave address. */ - pTwi->TWI_SMR = 0; - pTwi->TWI_SMR = (slaveAddress << 16) & TWI_SMR_SADR; - - /* SVEN: TWI Slave Mode Enabled */ - pTwi->TWI_CR = TWI_CR_SVEN; - - /* Wait at least 10 ms */ - for (i=0; i < 1000000; i++); - ASSERT( (pTwi->TWI_CR & TWI_CR_SVDIS)!= TWI_CR_SVDIS, "Can't configure TWI slave mode"); -} - -/** - * \brief Sends a STOP condition on the TWI. - * \param pTwi Pointer to an Twi instance. - */ -void TWI_Stop(Twi *pTwi) -{ - SANITY_CHECK(pTwi); - pTwi->TWI_CR = TWI_CR_STOP; -} - -/** - * \brief Starts a read operation on the TWI bus with the specified slave, it returns - * immediately. Data must then be read using TWI_ReadByte() whenever a byte is - * available (poll using TWI_ByteReceived()). - * \param pTwi Pointer to an Twi instance. - * \param address Slave address on the bus. - * \param iaddress Optional internal address bytes. - * \param isize Number of internal address bytes. - */ -void TWI_StartRead( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize) -{ - SANITY_CHECK(pTwi); - SANITY_CHECK((address & 0x80) == 0); - SANITY_CHECK((iaddress & 0xFF000000) == 0); - SANITY_CHECK(isize < 4); - - /* Set slave address and number of internal address bytes. */ - pTwi->TWI_MMR = 0; - pTwi->TWI_MMR = (isize << 8) | TWI_MMR_MREAD | (address << 16); - - /* Set internal address bytes */ - pTwi->TWI_IADR = 0; - pTwi->TWI_IADR = iaddress; - - /* Send START condition */ - pTwi->TWI_CR = TWI_CR_START; -} - -/** - * \brief Reads a byte from the TWI bus. The read operation must have been started - * using TWI_StartRead() and a byte must be available (check with TWI_ByteReceived()). - * \param pTwi Pointer to an Twi instance. - * \return byte read. - */ -uint8_t TWI_ReadByte(Twi *pTwi) -{ - SANITY_CHECK(pTwi); - - return pTwi->TWI_RHR; -} - -/** - * \brief Sends a byte of data to one of the TWI slaves on the bus. - * \note This function must be called once before TWI_StartWrite() with - * the first byte of data to send, then it shall be called repeatedly - * after that to send the remaining bytes. - * \param pTwi Pointer to an Twi instance. - * \param byte Byte to send. - */ -void TWI_WriteByte(Twi *pTwi, uint8_t byte) -{ - SANITY_CHECK(pTwi); - - pTwi->TWI_THR = byte; -} - -/** - * \brief Starts a write operation on the TWI to access the selected slave, then - * returns immediately. A byte of data must be provided to start the write; - * other bytes are written next. - * after that to send the remaining bytes. - * \param pTwi Pointer to an Twi instance. - * \param address Address of slave to acccess on the bus. - * \param iaddress Optional slave internal address. - * \param isize Number of internal address bytes. - * \param byte First byte to send. - */ -void TWI_StartWrite( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t byte) -{ - SANITY_CHECK(pTwi); - SANITY_CHECK((address & 0x80) == 0); - SANITY_CHECK((iaddress & 0xFF000000) == 0); - SANITY_CHECK(isize < 4); - - /* Set slave address and number of internal address bytes. */ - pTwi->TWI_MMR = 0; - pTwi->TWI_MMR = (isize << 8) | (address << 16); - - /* Set internal address bytes. */ - pTwi->TWI_IADR = 0; - pTwi->TWI_IADR = iaddress; - - /* Write first byte to send.*/ - TWI_WriteByte(pTwi, byte); -} - -/** - * \brief Check if a byte have been receiced from TWI. - * \param pTwi Pointer to an Twi instance. - * \return 1 if a byte has been received and can be read on the given TWI - * peripheral; otherwise, returns 0. This function resets the status register. - */ -uint8_t TWI_ByteReceived(Twi *pTwi) -{ - return ((pTwi->TWI_SR & TWI_SR_RXRDY) == TWI_SR_RXRDY); -} - -/** - * \brief Check if a byte have been sent to TWI. - * \param pTwi Pointer to an Twi instance. - * \return 1 if a byte has been sent so another one can be stored for - * transmission; otherwise returns 0. This function clears the status register. - */ -uint8_t TWI_ByteSent(Twi *pTwi) -{ - return ((pTwi->TWI_SR & TWI_SR_TXRDY) == TWI_SR_TXRDY); -} - -/** - * \brief Check if current transmission is complet. - * \param pTwi Pointer to an Twi instance. - * \return 1 if the current transmission is complete (the STOP has been sent); - * otherwise returns 0. - */ -uint8_t TWI_TransferComplete(Twi *pTwi) -{ - return ((pTwi->TWI_SR & TWI_SR_TXCOMP) == TWI_SR_TXCOMP); -} - -/** - * \brief Enables the selected interrupts sources on a TWI peripheral. - * \param pTwi Pointer to an Twi instance. - * \param sources Bitwise OR of selected interrupt sources. - */ -void TWI_EnableIt(Twi *pTwi, uint32_t sources) -{ - SANITY_CHECK(pTwi); - SANITY_CHECK((sources & 0xFFFFF088) == 0); - - pTwi->TWI_IER = sources; -} - -/** - * \brief Disables the selected interrupts sources on a TWI peripheral. - * \param pTwi Pointer to an Twi instance. - * \param sources Bitwise OR of selected interrupt sources. - */ -void TWI_DisableIt(Twi *pTwi, uint32_t sources) -{ - SANITY_CHECK(pTwi); - SANITY_CHECK((sources & 0xFFFFF088) == 0); - - pTwi->TWI_IDR = sources; -} - -/** - * \brief Get the current status register of the given TWI peripheral. - * \note This resets the internal value of the status register, so further - * read may yield different values. - * \param pTwi Pointer to an Twi instance. - * \return TWI status register. - */ -uint32_t TWI_GetStatus(Twi *pTwi) -{ - SANITY_CHECK(pTwi); - - return pTwi->TWI_SR; -} - -/** - * \brief Returns the current status register of the given TWI peripheral, but - * masking interrupt sources which are not currently enabled. - * \note This resets the internal value of the status register, so further - * read may yield different values. - * \param pTwi Pointer to an Twi instance. - */ -uint32_t TWI_GetMaskedStatus(Twi *pTwi) -{ - uint32_t status; - - SANITY_CHECK(pTwi); - - status = pTwi->TWI_SR; - status &= pTwi->TWI_IMR; - - return status; -} - -/** - * \brief Sends a STOP condition. STOP Condition is sent just after completing - * the current byte transmission in master read mode. - * \param pTwi Pointer to an Twi instance. - */ -void TWI_SendSTOPCondition(Twi *pTwi) -{ - SANITY_CHECK(pTwi); - - pTwi->TWI_CR |= TWI_CR_STOP; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/twi/twi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/twi/twi.h deleted file mode 100644 index a2374048..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/twi/twi.h +++ /dev/null @@ -1,95 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for configuration the Two Wire Interface (TWI) peripheral. - * - */ - -#ifndef TWI_H -#define TWI_H - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ -/* Returns 1 if the TXRDY bit (ready to transmit data) is set in the given status register value.*/ -#define TWI_STATUS_TXRDY(status) ((status & TWI_SR_TXRDY) == TWI_SR_TXRDY) - -/* Returns 1 if the RXRDY bit (ready to receive data) is set in the given status register value.*/ -#define TWI_STATUS_RXRDY(status) ((status & TWI_SR_RXRDY) == TWI_SR_RXRDY) - -/* Returns 1 if the TXCOMP bit (transfer complete) is set in the given status register value.*/ -#define TWI_STATUS_TXCOMP(status) ((status & TWI_SR_TXCOMP) == TWI_SR_TXCOMP) - -/*---------------------------------------------------------------------------- - * External function - *----------------------------------------------------------------------------*/ - -extern void TWI_ConfigureMaster(Twi *pTwi, uint32_t twck, uint32_t mck); - -extern void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress); - -extern void TWI_Stop(Twi *pTwi); - -extern void TWI_StartRead( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize); - -extern uint8_t TWI_ReadByte(Twi *pTwi); - -extern void TWI_WriteByte(Twi *pTwi, uint8_t byte); - -extern void TWI_StartWrite( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t byte); - -extern uint8_t TWI_ByteReceived(Twi *pTwi); - -extern uint8_t TWI_ByteSent(Twi *pTwi); - -extern uint8_t TWI_TransferComplete(Twi *pTwi); - -extern void TWI_EnableIt(Twi *pTwi, uint32_t sources); - -extern void TWI_DisableIt(Twi *pTwi, uint32_t sources); - -extern uint32_t TWI_GetStatus(Twi *pTwi); - -extern uint32_t TWI_GetMaskedStatus(Twi *pTwi); - -extern void TWI_SendSTOPCondition(Twi *pTwi); - -#endif //#ifndef TWI_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/twi/twid.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/twi/twid.c deleted file mode 100644 index 6d1774de..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/twi/twid.c +++ /dev/null @@ -1,342 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - - - - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "twid.h" -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Definition - *----------------------------------------------------------------------------*/ -#define TWITIMEOUTMAX 50000 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** TWI driver callback function.*/ -typedef void (*TwiCallback)(Async *); - -/** TWI asynchronous transfer descriptor.*/ -typedef struct _AsyncTwi { - - /** Asynchronous transfer status. */ - volatile uint8_t status; - // Callback function to invoke when transfer completes or fails.*/ - TwiCallback callback; - /** Pointer to the data buffer.*/ - uint8_t *pData; - /** Total number of bytes to transfer.*/ - uint32_t num; - /** Number of already transferred bytes.*/ - uint32_t transferred; - -} AsyncTwi; - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ -/** - * \brief Initializes a TWI driver instance, using the given TWI peripheral. - * \note The peripheral must have been initialized properly before calling this function. - * \param pTwid Pointer to the Twid instance to initialize. - * \param pTwi Pointer to the TWI peripheral to use. - */ -void TWID_Initialize(Twid *pTwid, Twi *pTwi) -{ - TRACE_DEBUG("TWID_Initialize()\n\r"); - SANITY_CHECK(pTwid); - SANITY_CHECK(pTwi); - - /* Initialize driver. */ - pTwid->pTwi = pTwi; - pTwid->pTransfer = 0; -} - - -/** - * \brief Interrupt handler for a TWI peripheral. Manages asynchronous transfer - * occuring on the bus. This function MUST be called by the interrupt service - * routine of the TWI peripheral if asynchronous read/write are needed. - * \param pTwid Pointer to a Twid instance. - */ -void TWID_Handler(Twid *pTwid) -{ - uint8_t status; - AsyncTwi *pTransfer = (AsyncTwi *) pTwid->pTransfer; - Twi *pTwi = pTwid->pTwi; - - SANITY_CHECK(pTwid); - - /* Retrieve interrupt status */ - status = TWI_GetMaskedStatus(pTwi); - - /* Byte received */ - if (TWI_STATUS_RXRDY(status)) { - - pTransfer->pData[pTransfer->transferred] = TWI_ReadByte(pTwi); - pTransfer->transferred++; - - /* check for transfer finish */ - if (pTransfer->transferred == pTransfer->num) { - - TWI_DisableIt(pTwi, TWI_IDR_RXRDY); - TWI_EnableIt(pTwi, TWI_IER_TXCOMP); - } - /* Last byte? */ - else if (pTransfer->transferred == (pTransfer->num - 1)) { - - TWI_Stop(pTwi); - } - } - /* Byte sent*/ - else if (TWI_STATUS_TXRDY(status)) { - - /* Transfer finished ? */ - if (pTransfer->transferred == pTransfer->num) { - - TWI_DisableIt(pTwi, TWI_IDR_TXRDY); - TWI_EnableIt(pTwi, TWI_IER_TXCOMP); - TWI_SendSTOPCondition(pTwi); - } - /* Bytes remaining */ - else { - - TWI_WriteByte(pTwi, pTransfer->pData[pTransfer->transferred]); - pTransfer->transferred++; - } - } - /* Transfer complete*/ - else if (TWI_STATUS_TXCOMP(status)) { - - TWI_DisableIt(pTwi, TWI_IDR_TXCOMP); - pTransfer->status = 0; - if (pTransfer->callback) { - - pTransfer->callback((Async *) pTransfer); - } - pTwid->pTransfer = 0; - } -} - -/** - * \brief Asynchronously reads data from a slave on the TWI bus. An optional - * callback function is triggered when the transfer is complete. - * \param pTwid Pointer to a Twid instance. - * \param address TWI slave address. - * \param iaddress Optional slave internal address. - * \param isize Internal address size in bytes. - * \param pData Data buffer for storing received bytes. - * \param num Number of bytes to read. - * \param pAsync Asynchronous transfer descriptor. - * \return 0 if the transfer has been started; otherwise returns a TWI error code. - */ -uint8_t TWID_Read( - Twid *pTwid, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t *pData, - uint32_t num, - Async *pAsync) -{ - Twi *pTwi = pTwid->pTwi; - AsyncTwi *pTransfer = (AsyncTwi *) pTwid->pTransfer; - uint32_t timeout; - - SANITY_CHECK(pTwid); - SANITY_CHECK((address & 0x80) == 0); - SANITY_CHECK((iaddress & 0xFF000000) == 0); - SANITY_CHECK(isize < 4); - - /* Check that no transfer is already pending*/ - if (pTransfer) { - - TRACE_ERROR("TWID_Read: A transfer is already pending\n\r"); - return TWID_ERROR_BUSY; - } - - /* Set STOP signal if only one byte is sent*/ - if (num == 1) { - - TWI_Stop(pTwi); - } - - /* Asynchronous transfer*/ - if (pAsync) { - - /* Update the transfer descriptor */ - pTwid->pTransfer = pAsync; - pTransfer = (AsyncTwi *) pAsync; - pTransfer->status = ASYNC_STATUS_PENDING; - pTransfer->pData = pData; - pTransfer->num = num; - pTransfer->transferred = 0; - - /* Enable read interrupt and start the transfer */ - TWI_EnableIt(pTwi, TWI_IER_RXRDY); - TWI_StartRead(pTwi, address, iaddress, isize); - } - /* Synchronous transfer*/ - else { - - /* Start read*/ - TWI_StartRead(pTwi, address, iaddress, isize); - - /* Read all bytes, setting STOP before the last byte*/ - while (num > 0) { - - /* Last byte ?*/ - if (num == 1) { - - TWI_Stop(pTwi); - } - - /* Wait for byte then read and store it*/ - timeout = 0; - while( !TWI_ByteReceived(pTwi) && (++timeoutpTwi; - AsyncTwi *pTransfer = (AsyncTwi *) pTwid->pTransfer; - uint32_t timeout; - - SANITY_CHECK(pTwi); - SANITY_CHECK((address & 0x80) == 0); - SANITY_CHECK((iaddress & 0xFF000000) == 0); - SANITY_CHECK(isize < 4); - - /* Check that no transfer is already pending */ - if (pTransfer) { - - TRACE_ERROR("TWI_Write: A transfer is already pending\n\r"); - return TWID_ERROR_BUSY; - } - - /* Asynchronous transfer */ - if (pAsync) { - - /* Update the transfer descriptor */ - pTwid->pTransfer = pAsync; - pTransfer = (AsyncTwi *) pAsync; - pTransfer->status = ASYNC_STATUS_PENDING; - pTransfer->pData = pData; - pTransfer->num = num; - pTransfer->transferred = 1; - - /* Enable write interrupt and start the transfer */ - TWI_StartWrite(pTwi, address, iaddress, isize, *pData); - TWI_EnableIt(pTwi, TWI_IER_TXRDY); - } - /* Synchronous transfer*/ - else { - - // Start write - TWI_StartWrite(pTwi, address, iaddress, isize, *pData++); - num--; - - /* Send all bytes */ - while (num > 0) { - - /* Wait before sending the next byte */ - timeout = 0; - while( !TWI_ByteSent(pTwi) && (++timeout -#include - -/*---------------------------------------------------------------------------- - * Definition - *----------------------------------------------------------------------------*/ - -/** TWI driver is currently busy. */ -#define TWID_ERROR_BUSY 1 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** TWI driver structure. Holds the internal state of the driver.*/ -typedef struct _Twid { - /** Pointer to the underlying TWI peripheral.*/ - Twi *pTwi; - /** Current asynchronous transfer being processed.*/ - Async *pTransfer; - -} Twid; - -/*---------------------------------------------------------------------------- - * Export functions - *----------------------------------------------------------------------------*/ -extern void TWID_Initialize(Twid *pTwid, Twi *pTwi); - -extern void TWID_Handler(Twid *pTwid); - -extern uint8_t TWID_Read( - Twid *pTwid, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t *pData, - uint32_t num, - Async *pAsync); - -extern uint8_t TWID_Write( - Twid *pTwid, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t *pData, - uint32_t num, - Async *pAsync); - -#endif //#ifndef TWID_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/usart/uart_console.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/usart/uart_console.c deleted file mode 100644 index 07eaeec3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/usart/uart_console.c +++ /dev/null @@ -1,288 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implements UART console. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include -#include -#include -#include -#include - -#include "usart/uart_console.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** Console baudrate always using 115200. */ -#define CONSOLE_BAUDRATE 115200 -/** Usart Hw interface used by the console (UART0). */ -#define CONSOLE_USART UART0 -/** Usart Hw ID used by the console (UART0). */ -#define CONSOLE_ID ID_UART0 -/** Pins description corresponding to Rxd,Txd, (UART pins) */ -#define CONSOLE_PINS {PINS_UART} - -/*---------------------------------------------------------------------------- - * Variables - *----------------------------------------------------------------------------*/ - -/** Is Console Initialized. */ -static uint8_t isConsolInitialized = 0; - -/** - * \brief Configures an USART peripheral with the specified parameters. - * - * \param baudrate Baudrate at which the USART should operate (in Hz). - * \param masterClock Frequency of the system master clock (in Hz). - */ -static void UART_Configure( uint32_t baudrate, - uint32_t masterClock) -{ - const Pin pPins[] = CONSOLE_PINS; - Uart *pUart = CONSOLE_USART; - - /* Configure PIO */ - PIO_Configure(pPins, PIO_LISTSIZE(pPins)); - - /* Configure PMC */ - PMC->PMC_PCER0 = 1 << CONSOLE_ID; - - /* Reset and disable receiver & transmitter */ - pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX - | UART_CR_RXDIS | UART_CR_TXDIS; - - /* Configure mode */ - pUart->UART_MR = (0x4 << 9); /* TODO: Change with new symbols: AT91C_UART_CHRL_8_BITS | AT91C_UART_PAR_NONE */ - - /* Configure baudrate */ - /* Asynchronous, no oversampling */ - pUart->UART_BRGR = (masterClock / baudrate) / 16; - - /* Disable PDC channel */ - pUart->UART_PTCR = UART_PTCR_RXTDIS | UART_PTCR_TXTDIS; - - /* Enable receiver and transmitter */ - pUart->UART_CR = UART_CR_RXEN | UART_CR_TXEN; - - isConsolInitialized = 1; -} - -/** - * \brief Outputs a character on the UART line. - * - * \note This function is synchronous (i.e. uses polling). - * \param c Character to send. - */ -void UART_PutChar(uint8_t c) -{ - Uart *pUart = CONSOLE_USART; - - if (!isConsolInitialized) - UART_Configure(CONSOLE_BAUDRATE, BOARD_MCK); - - /* Wait for the transmitter to be ready */ - while ((pUart->UART_SR & UART_SR_TXEMPTY) == 0); - - /* Send character */ - pUart->UART_THR = c; - -} - -/** - * \brief Input a character from the UART line. - * - * \note This function is synchronous - * \return character received. - */ -uint8_t UART_GetChar(void) -{ - Uart *pUart = CONSOLE_USART; - - if (!isConsolInitialized) - UART_Configure(CONSOLE_BAUDRATE, BOARD_MCK); - - while((pUart->UART_SR & UART_SR_RXRDY) == 0); - return pUart->UART_RHR; -} - -/** - * \brief Check if there is Input from UART line. - * - * \return true if there is Input. - */ -bool UART_IsRxReady(void) -{ - Uart *pUart = CONSOLE_USART; - - if (!isConsolInitialized) - UART_Configure(CONSOLE_BAUDRATE, BOARD_MCK); - - return (pUart->UART_SR & UART_SR_RXRDY) > 0; -} - -/* \cond NOFPUT */ -#ifndef NOFPUT -#include -#include -/** - * \brief Implementation of fputc using the UART as the standard output. Required - * for printf(). - * - * \param c Character to write. - * \param pStream Output stream. - * - * \return The character written if successful, or -1 if the output stream is - * not stdout or stderr. - */ -int fputc ( int c, FILE * pStream ) -{ - if ((pStream == stdout) || (pStream == stderr)) { - UART_PutChar(c); - return c; - } - else { - - return EOF; - } -} - -/** - * \brief Implementation of fputs using the UART as the standard output. Required - * for printf(). Does NOT currently use the PDC. - * - * \param pStr String to write. - * \param pStream Output stream. - * - * \return Number of characters written if successful, or -1 if the output - * stream is not stdout or stderr. - */ -signed int fputs(const char *pStr, FILE *pStream) -{ - signed int num = 0; - - while (*pStr != 0) { - - if (fputc(*pStr, pStream) == -1) { - - return -1; - } - num++; - pStr++; - } - - return num; -} - -#undef putchar - -/** - * \brief Outputs a character on the UART. - * - * \param c Character to output. - * - * \return The character that was output. - */ -signed int putchar(signed int c) -{ - return fputc(c, stdout); -} - -/* The char which has been ungotten, or EOF. */ -static int _UngetChar = EOF; - -/** - * \brief Implementation of fputc using the UART as the standard output. Required - * for printf(). - * - * \param c Character to write. - * \param pStream Output stream. - * - * \return The character written if successful, or -1 if the output stream is - * not stdout or stderr. - */ -int fgetc (FILE * pStream ) -{ - int c; - - if (pStream == stdin) { - c = UART_GetChar(); - return c; - } - else { - - return EOF; - } -} - -#undef getchar -/** - * \brief Get a character from UART. - * - * \return The character received. - */ -signed int getchar(void) -{ - if (_UngetChar != EOF) - { - int res = _UngetChar; - _UngetChar = EOF; - return res; - } - else - { - return fgetc(stdin); - } -} - -#undef __ungetchar -/** - * \brief Unget a character from stdin. - * - * \return The unget character. - */ -signed int __ungetchar(int c) -{ - _UngetChar = c; - return c; -} - -#endif /* #ifndef NOFPUT */ -/* \endcond */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/usart/uart_console.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/usart/uart_console.h deleted file mode 100644 index dfa19217..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/usart/uart_console.h +++ /dev/null @@ -1,38 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - -#ifndef UART_CONSOLE_H_ -#define UART_CONSOLE_H_ - -extern void UART_PutChar(uint8_t c); -extern uint8_t UART_GetChar(void); -extern bool UART_IsRxReady(void); - -#endif /* UART_CONSOLE_H_ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/usart/usart.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/usart/usart.c deleted file mode 100644 index 5aa10e5d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/usart/usart.c +++ /dev/null @@ -1,395 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup usart_module Working with USART - * The USART driver provides the interface to configure and use the USART peripheral.\n - * - * The USART supports several kinds of comminication modes such as full-duplex asynchronous/ - * synchronous serial commnunication,RS485 with driver control signal,ISO7816,SPI and Test modes. - * - * To start a USART transfer with \ref AT91SAM3S_PDC "PDC" support, the user could follow these steps: - *
    - *
  • Configure USART with expected mode and baudrate(see \ref USART_Configure), which could be done by: - * -# Resetting and disabling transmitter and receiver by setting US_CR(Control Register).
    • - * -# Conifguring the USART in a specific mode by setting USART_MODE bits in US_MR(Mode Register) - * -# Setting baudrate which is different from mode to mode. - - *
  • Enable transmitter or receiver respectively by set US_CR_TXEN or US_CR_RXEN in US_CR.
    • - *
  • Read from or write to the peripheral with \ref USART_ReadBuffer or \ref USART_WriteBuffer. - These operations could be done by polling or interruption.
    • - *
  • For polling, check the status bit US_CSR_ENDRX/US_CSR_RXBUFF (READ) or US_CSR_ENDTX/ - US_CSR_TXBUFE (WRITE).
    • - *
  • For interruption,"enable" the status bit through US_IER and - realize the hanler with USARTx_IrqHandler according to IRQ vector - table which is defined in board_cstartup_.c - To enable the interruption of USART,it should be configured with priority and enabled first through - NVIC .
    • - *
- * - * For more accurate information, please look at the USART section of the - * Datasheet. - * - * Related files :\n - * \ref usart.c\n - * \ref usart.h\n -*/ - - - -/** - * \file - * - * Implementation of USART (Universal Synchronous Asynchronous Receiver Transmitter) - * controller. - * - */ -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ -#include - -#include "usart.h" -#include -#include - -/*---------------------------------------------------------------------------- - * Local definitions - *----------------------------------------------------------------------------*/ - - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * \brief Configures an USART peripheral with the specified parameters. - * - * - * \param usart Pointer to the USART peripheral to configure. - * \param mode Desired value for the USART mode register (see the datasheet). - * \param baudrate Baudrate at which the USART should operate (in Hz). - * \param masterClock Frequency of the system master clock (in Hz). - */ -void USART_Configure(Usart *usart, - uint32_t mode, - uint32_t baudrate, - uint32_t masterClock) -{ - /* Reset and disable receiver & transmitter*/ - usart->US_CR = US_CR_RSTRX | US_CR_RSTTX - | US_CR_RXDIS | US_CR_TXDIS; - - /* Configure mode*/ - usart->US_MR = mode; - - /* Configure baudrate*/ - /* Asynchronous, no oversampling*/ - if (((mode & US_MR_SYNC__CPHA) == 0) - && ((mode & US_MR_OVER) == 0)) { - - usart->US_BRGR = (masterClock / baudrate) / 16; - } - /* TODO other modes*/ -} -/** - * \brief Enables or disables the transmitter of an USART peripheral. - * - * - * \param usart Pointer to an USART peripheral - * \param enabled If true, the transmitter is enabled; otherwise it is - * disabled. - */ -void USART_SetTransmitterEnabled(Usart *usart, uint8_t enabled) -{ - if (enabled) { - - usart->US_CR = US_CR_TXEN; - } - else { - - usart->US_CR = US_CR_TXDIS; - } -} - -/** - * \brief Enables or disables the receiver of an USART peripheral - * - * - * \param usart Pointer to an USART peripheral - * \param enabled If true, the receiver is enabled; otherwise it is disabled. - */ -void USART_SetReceiverEnabled(Usart *usart, - uint8_t enabled) -{ - if (enabled) { - - usart->US_CR = US_CR_RXEN; - } - else { - - usart->US_CR = US_CR_RXDIS; - } -} - -/** - * \brief Sends one packet of data through the specified USART peripheral. This - * function operates synchronously, so it only returns when the data has been - * actually sent. - * - * - * \param usart Pointer to an USART peripheral. - * \param data Data to send including 9nth bit and sync field if necessary (in - * the same format as the US_THR register in the datasheet). - * \param timeOut Time out value (0 = no timeout). - */ -void USART_Write( - Usart *usart, - uint16_t data, - volatile uint32_t timeOut) -{ - if (timeOut == 0) { - - while ((usart->US_CSR & US_CSR_TXEMPTY) == 0); - } - else { - - while ((usart->US_CSR & US_CSR_TXEMPTY) == 0) { - - if (timeOut == 0) { - - TRACE_ERROR("USART_Write: Timed out.\n\r"); - return; - } - timeOut--; - } - } - - usart->US_THR = data; -} - -/** - * \brief Sends the contents of a data buffer through the specified USART peripheral. - * This function returns immediately (1 if the buffer has been queued, 0 - * otherwise); poll the ENDTX and TXBUFE bits of the USART status register - * to check for the transfer completion. - * - * \param usart Pointer to an USART peripheral. - * \param buffer Pointer to the data buffer to send. - * \param size Size of the data buffer (in bytes). - */ -uint8_t USART_WriteBuffer( - Usart *usart, - void *buffer, - uint32_t size) -{ - /* Check if the first PDC bank is free*/ - if ((usart->US_TCR == 0) && (usart->US_TNCR == 0)) { - - usart->US_TPR = (uint32_t) buffer; - usart->US_TCR = size; - usart->US_PTCR = US_PTCR_TXTEN; - - return 1; - } - /* Check if the second PDC bank is free*/ - else if (usart->US_TNCR == 0) { - - usart->US_TNPR = (uint32_t) buffer; - usart->US_TNCR = size; - - return 1; - } - else { - - return 0; - } -} - - -/** - * \brief Reads and return a packet of data on the specified USART peripheral. This - * function operates asynchronously, so it waits until some data has been - * received. - * - * \param usart Pointer to an USART peripheral. - * \param timeOut Time out value (0 -> no timeout). - */ -uint16_t USART_Read( - Usart *usart, - volatile uint32_t timeOut) -{ - if (timeOut == 0) { - - while ((usart->US_CSR & US_CSR_RXRDY) == 0); - } - else { - - while ((usart->US_CSR & US_CSR_RXRDY) == 0) { - - if (timeOut == 0) { - - TRACE_ERROR("USART_Read: Timed out.\n\r"); - return 0; - } - timeOut--; - } - } - - return usart->US_RHR; -} - -/** - * \brief Reads data from an USART peripheral, filling the provided buffer until it - * becomes full. This function returns immediately with 1 if the buffer has - * been queued for transmission; otherwise 0. - * - * \param usart Pointer to an USART peripheral. - * \param buffer Pointer to the buffer where the received data will be stored. - * \param size Size of the data buffer (in bytes). - */ -uint8_t USART_ReadBuffer(Usart *usart, - void *buffer, - uint32_t size) -{ - /* Check if the first PDC bank is free*/ - if ((usart->US_RCR == 0) && (usart->US_RNCR == 0)) { - - usart->US_RPR = (uint32_t) buffer; - usart->US_RCR = size; - usart->US_PTCR = US_PTCR_RXTEN; - - return 1; - } - /* Check if the second PDC bank is free*/ - else if (usart->US_RNCR == 0) { - - usart->US_RNPR = (uint32_t) buffer; - usart->US_RNCR = size; - - return 1; - } - else { - - return 0; - } -} - -/** - * \brief Returns 1 if some data has been received and can be read from an USART; - * otherwise returns 0. - * - * \param usart Pointer to an Usart instance. - */ -uint8_t USART_IsDataAvailable(Usart *usart) -{ - if ((usart->US_CSR & US_CSR_RXRDY) != 0) { - - return 1; - } - else { - - return 0; - } -} - -/** - * \brief Sets the filter value for the IRDA demodulator. - * - * \param pUsart Pointer to an Usart instance. - * \param filter Filter value. - */ -void USART_SetIrdaFilter(Usart *pUsart, uint8_t filter) -{ - SANITY_CHECK(pUsart); - - pUsart->US_IF = filter; -} - -/** - * \brief Sends one packet of data through the specified USART peripheral. This - * function operates synchronously, so it only returns when the data has been - * actually sent. - * - * \param usart Pointer to an USART peripheral. - * \param c Character to send - */ -void USART_PutChar( - Usart *usart, - uint8_t c) -{ - /* Wait for the transmitter to be ready*/ - while ((usart->US_CSR & US_CSR_TXEMPTY) == 0); - - /* Send character*/ - usart->US_THR = c; - - /* Wait for the transfer to complete*/ - while ((usart->US_CSR & US_CSR_TXEMPTY) == 0); -} - -/** - * \brief Return 1 if a character can be read in USART - */ -uint32_t USART_IsRxReady(Usart *usart) -{ - return (usart->US_CSR & US_CSR_RXRDY); -} -/** - * \brief Get present status - */ -uint32_t USART_GetStatus(Usart *usart) -{ - return usart->US_CSR; -} -/** - * \brief Enable interrupt - */ -void USART_EnableIt(Usart *usart,uint32_t mode) -{ - usart->US_IER = mode; -} -/** - * \brief Disable interrupt - */ -void USART_DisableIt(Usart *usart,uint32_t mode) -{ - usart->US_IDR = mode; -} -/** - * \brief Reads and returns a character from the USART. - * - * \note This function is synchronous (i.e. uses polling). - * \param usart Pointer to an USART peripheral. - * \return Character received. - */ -uint8_t USART_GetChar(Usart *usart) -{ - while ((usart->US_CSR & US_CSR_RXRDY) == 0); - return usart->US_RHR; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/usart/usart.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/usart/usart.h deleted file mode 100644 index 8c50f87e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/usart/usart.h +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * This module provides several definitions and methods for using an USART - * peripheral. - * - * \par Usage - * - * -# Enable the USART peripheral clock in the PMC. - * -# Enable the required USART PIOs (see pio.h). - * -# Configure the UART by calling USART_Configure. - * -# Enable the transmitter and/or the receiver of the USART using - * USART_SetTransmitterEnabled and USART_SetReceiverEnabled. - * -# Send data through the USART using the USART_Write and - * USART_WriteBuffer methods. - * -# Receive data from the USART using the USART_Read and - * USART_ReadBuffer functions; the availability of data can be polled - * with USART_IsDataAvailable. - * -# Disable the transmitter and/or the receiver of the USART with - * USART_SetTransmitterEnabled and USART_SetReceiverEnabled. - */ - -#ifndef USART_H -#define USART_H - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** \section USART_mode USART modes - * This section lists several common operating modes for an USART peripheral. - * - * \b Modes - * - USART_MODE_ASYNCHRONOUS - * - USART_MODE_IRDA - */ - -/** Basic asynchronous mode, i.e. 8 bits no parity.*/ -#define USART_MODE_ASYNCHRONOUS (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE) - -/** IRDA mode*/ -#define USART_MODE_IRDA (AT91C_US_USMODE_IRDA | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_FILTER) - - -/*------------------------------------------------------------------------------*/ -/* Exported functions*/ -/*------------------------------------------------------------------------------*/ - -extern void USART_Configure( - Usart *usart, - uint32_t mode, - uint32_t baudrate, - uint32_t masterClock); -extern uint32_t USART_GetStatus(Usart *usart); -extern void USART_EnableIt(Usart *usart,uint32_t mode); -extern void USART_DisableIt(Usart *usart,uint32_t mode); -extern void USART_SetTransmitterEnabled(Usart *usart, uint8_t enabled); - -extern void USART_SetReceiverEnabled(Usart *usart, uint8_t enabled); - -extern void USART_Write( - Usart *usart, - uint16_t data, - volatile uint32_t timeOut); - -extern uint8_t USART_WriteBuffer( - Usart *usart, - void *buffer, - uint32_t size); - -extern uint16_t USART_Read( - Usart *usart, - volatile uint32_t timeOut); - -extern uint8_t USART_ReadBuffer( - Usart *usart, - void *buffer, - uint32_t size); - -extern uint8_t USART_IsDataAvailable(Usart *usart); - -extern void USART_SetIrdaFilter(Usart *pUsart, uint8_t filter); - -extern void USART_PutChar(Usart *usart, uint8_t c); - -extern uint32_t USART_IsRxReady(Usart *usart); - -extern uint8_t USART_GetChar(Usart *usart); - - -#endif /*#ifndef USART_H*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/assert.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/assert.h deleted file mode 100644 index 5c21781d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/assert.h +++ /dev/null @@ -1,114 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Definition of the ASSERT() and SANITY_CHECK() macros, which are used for -/// runtime condition & parameter verifying. -/// -/// !Usage -/// -/// -# Use ASSERT() in your code to check the value of function parameters, -/// return values, etc. *Warning:* the ASSERT() condition must not have -/// any side-effect; otherwise, the program may not work properly -/// anymore when assertions are disabled. -/// -# Use SANITY_CHECK() to perform checks with a default error message -/// (outputs the file and line number where the error occured). This -/// reduces memory overhead caused by assertion error strings. -/// -# Initialize the dbgu to see failed assertions at run-time. -/// -# Assertions can be entirely disabled by defining the NOASSERT symbol -/// at compilation time. -//------------------------------------------------------------------------------ - -#ifndef ASSERT_H -#define ASSERT_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include -#include "trace.h" - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ -#if defined(NOASSERT) - #define ASSERT(...) - #define SANITY_CHECK(...) -#else - - #if (TRACE_LEVEL == 0) - /// Checks that the given condition is true, - /// otherwise stops the program execution. - /// \param condition Condition to verify. - #define ASSERT(condition, ...) { \ - if (!(condition)) { \ - while (1); \ - } \ - } - - /// Performs the same duty as the ASSERT() macro - /// \param condition Condition to verify. - #define SANITY_CHECK(condition) ASSERT(condition, ...) - - #else - /// Checks that the given condition is true, otherwise displays an error - /// message and stops the program execution. - /// \param condition Condition to verify. - #define ASSERT(condition, ...) { \ - if (!(condition)) { \ - printf("-F- ASSERT: "); \ - printf(__VA_ARGS__); \ - while (1); \ - } \ - } - #define SANITY_ERROR "Sanity check failed at %s:%d\n\r" - - /// Performs the same duty as the ASSERT() macro, except a default error - /// message is output if the condition is false. - /// \param condition Condition to verify. - #define SANITY_CHECK(condition) ASSERT(condition, SANITY_ERROR, __FILE__, __LINE__) - #endif -#endif - - - - - - - - - - -#endif //#ifndef ASSERT_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/bitbanding.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/bitbanding.h deleted file mode 100644 index 8ef5976c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/bitbanding.h +++ /dev/null @@ -1,108 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef BITBANDING_H -#define BITBANDING_H - -//------------------------------------------------------------------------------ -/// \file bitbanding.h -/// Include Defines & macros for bit-banding. -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Header files -//------------------------------------------------------------------------------ - -#include - -//------------------------------------------------------------------------------ -// Global Macros -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \def IS_BITBAND_SRAM_ADDR(x) -/// \brief Check if the address is in bit banding sram region. -/// \note The address should be in area of 0x2000000 ~ 0x200FFFFF -/// \param x The address to check. -//------------------------------------------------------------------------------ -#define IS_BITBAND_SRAM_ADDR(x) \ - ( ((uint32_t)(x)) >= 0x20000000 && \ - ((uint32_t)(x)) < (0x20000000+0x100000) ) - -//------------------------------------------------------------------------------ -/// \def IS_BITBAND_PERIPH_ADDR(x) -/// \brief Check if the address is in bit banding peripheral region -/// \note The address should be in area of 0x4000000 ~ 0x400FFFFF -/// \param x The address to check -//------------------------------------------------------------------------------ -#define IS_BITBAND_PERIPH_ADDR(x) \ - ( ((uint32_t)(x)) >= 0x40000000 && \ - ((uint32_t)(x)) < (0x40000000+0x100000) ) - -//------------------------------------------------------------------------------ -/// \def BITBAND_ALIAS_ADDRESS(addr, bit) -/// \brief Calculate bit band alias address. -/// -/// Calculate the bit band alias address and return a pointer address to word. -/// \param addr The byte address of bitbanding bit. -/// \param bit The bit position of bitbanding bit. -/// \callergraph -//------------------------------------------------------------------------------ -#define BITBAND_ALIAS_ADDRESS(addr, bit) \ - ((volatile uint32_t*)((((uint32_t)(addr) & 0xF0000000) + 0x02000000) \ - +((((uint32_t)(addr)&0xFFFFF)*32)\ - +( (uint32_t)(bit)*4)))) - -//------------------------------------------------------------------------------ -/// \def WRITE_BITBANDING(addr32, bit, val) -/// \brief Bit write through bit banding. -/// \param addr32 32-bit aligned byte address where the bit exists. -/// \param bit Bit position. -/// \param val The value that the bit is set to. -/// \callergraph -//------------------------------------------------------------------------------ -#define WRITE_BITBANDING(addr32, bit, val) do {\ - *BITBAND_ALIAS_ADDRESS(addr32,bit) = (val); \ - } while (0); - -//------------------------------------------------------------------------------ -/// \def TOGGLE_BITBANDING(addr32, bit) -/// \brief Toggle bit through bit banding -/// \param addr32 32-bit aligned byte address where the bit exists. -/// \param bit Bit position. -//------------------------------------------------------------------------------ -#define TOGGLE_BITBANDING(addr32, bit) do {\ - volatile uint32_t * p = \ - BITBAND_ALIAS_ADDRESS(addr32,bit); \ - if (*p) *p = 0; \ - else *p = 1; \ - }while(0); - -#endif //#ifndef BITBANDING_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/bmp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/bmp.c deleted file mode 100644 index fe305875..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/bmp.c +++ /dev/null @@ -1,322 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "bmp.h" -#include -#include - -#include - -//----------------------------------------------------------------------------- -// Define -//----------------------------------------------------------------------------- -/// BMP offset for header -#define IMAGE_OFFSET 0x100 - - -//------------------------------------------------------------------------------ -// Internal constants -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -// Internal types -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Describe the BMP palette -//------------------------------------------------------------------------------ -struct BMPPaletteEntry { - - /// Blue value - unsigned char b; - /// Green value - unsigned char g; - /// Red value - unsigned char r; - /// Filler character value - unsigned char filler; -}; - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Test if BMP is valid -/// \param file Buffer holding the file to examinate. -/// \return 1 if the header of a BMP file is valid; otherwise returns 0. -//------------------------------------------------------------------------------ -unsigned char BMP_IsValid(void *file) -{ - return ((struct BMPHeader *) file)->type == BMP_TYPE; -} - -//------------------------------------------------------------------------------ -/// Returns the size of a BMP image given at least its header (the file does -/// not have to be complete). -/// \param file Pointer to the buffer which holds the BMP file. -/// \return size of BMP image -//------------------------------------------------------------------------------ -unsigned int BMP_GetFileSize(void *file) -{ - return ((struct BMPHeader *) file)->fileSize; -} - -//----------------------------------------------------------------------------- -/// Write a BMP header -/// \param pAddressHeader Begin address of the BMP -/// \param bmpHSize BMP heigth size -/// \param bmpVSize BMP width size -/// \param bmpRgb Type of BMP (YUV or RGB) -/// \param nbByte_Pixels Number of byte per pixels -//----------------------------------------------------------------------------- -void WriteBMPheader(unsigned int* pAddressHeader, - unsigned int bmpHSize, - unsigned int bmpVSize, - unsigned char bmpRgb, - unsigned char nbByte_Pixels) -{ - unsigned int i; - unsigned int* fill; - struct BMPHeader *Header; - - fill = pAddressHeader; - for (i=0; itype = BMP_TYPE; - Header->fileSize = (bmpHSize * bmpVSize * nbByte_Pixels) + IMAGE_OFFSET; - Header->reserved1 = 0; - Header->reserved2 = 0; - Header->offset = IMAGE_OFFSET; - Header->headerSize = BITMAPINFOHEADER; - Header->width = bmpHSize; - Header->height = bmpVSize; - Header->planes = 1; - Header->bits = nbByte_Pixels * 8; - Header->compression = 0; - Header->imageSize = bmpHSize * bmpVSize * nbByte_Pixels; - Header->xresolution = 0; - Header->yresolution = 0; - Header->ncolours = 0; - Header->importantcolours = 0; -} - - -//------------------------------------------------------------------------------ -/// debug function, dislay BMP header -/// \param pAddressHeader Address of the BMP -//------------------------------------------------------------------------------ -void BMP_displayHeader(unsigned int* pAddressHeader) -{ - struct BMPHeader *header; - - header = (struct BMPHeader*) pAddressHeader; - - TRACE_INFO("BMP\n\r"); - TRACE_INFO("type 0x%X \n\r", header->type); - TRACE_INFO("fileSize %d \n\r", header->fileSize); - TRACE_INFO("reserved1 %d \n\r", header->reserved1); - TRACE_INFO("reserved2 %d \n\r", header->reserved2); - TRACE_INFO("offset %d \n\r", header->offset); - TRACE_INFO("headerSize %d \n\r", header->headerSize); - TRACE_INFO("width %d \n\r", header->width); - TRACE_INFO("height %d \n\r", header->height); - TRACE_INFO("planes %d \n\r", header->planes); - TRACE_INFO("bits %d \n\r", header->bits); - TRACE_INFO("compression %d \n\r", header->compression); - TRACE_INFO("imageSize %d \n\r", header->imageSize); - TRACE_INFO("xresolution %d \n\r", header->xresolution); - TRACE_INFO("yresolution %d \n\r", header->yresolution); - TRACE_INFO("ncolours %d \n\r", header->ncolours); - TRACE_INFO("importantcolours %d\n\r", header->importantcolours); -} - - -//------------------------------------------------------------------------------ -/// Loads a BMP image located at the given address, decodes it and stores the -/// resulting image inside the provided buffer. Image must have the specified -/// width & height. -/// If no buffer is provided, this function simply checks if it is able to -/// decode the image. -/// \param file Buffer which holds the BMP file. -/// \param buffer Buffer in which to store the decoded image. -/// \param width Buffer width in pixels. -/// \param height Buffer height in pixels. -/// \param bpp Number of bits per pixels that the buffer stores. -/// \return 0 if the image has been loaded; otherwise returns an error code. -//------------------------------------------------------------------------------ -unsigned char BMP_Decode( - void *file, - unsigned char *buffer, - unsigned int width, - unsigned int height, - unsigned char bpp) -{ - struct BMPHeader *header; - unsigned int i, j; - unsigned char r, g, b; - unsigned char *image; - - // Read header information - header = (struct BMPHeader *) file; - - // Verify that the file is valid - if (!BMP_IsValid(file)) { - - TRACE_ERROR("BMP_Decode: File type is not 'BM' (0x%04X).\n\r",header->type); - return 1; - } - - // Check that parameters match - if ((header->compression != 0) - || (header->width != width) - || (header->height != height)) { - - TRACE_ERROR("BMP_Decode: File format not supported\n\r"); - TRACE_ERROR(" -> .compression = %u\n\r", header->compression); - TRACE_ERROR(" -> .width = %u\n\r", header->width); - TRACE_ERROR(" -> .height = %u\n\r", header->height); - TRACE_ERROR(" -> .bits = %d\n\r", header->bits); - return 2; - } - - // Get image data - image = (unsigned char *) ((unsigned int) file + header->offset); - - // Check that the bpp resolution is supported - // Only a 24-bit output & 24- or 8-bit input are supported - if (bpp != 24) { - - TRACE_ERROR("BMP_Decode: Output resolution not supported\n\r"); - return 3; - } - else if (header->bits == 24) { - - // Decoding is ok - if (!buffer) return 0; - - // Get image data (swapping red & blue) - for (i=0; i < height; i++) { - for (j=0; j < width; j++) { - - r = image[((height - i - 1) * width + j) * 3 + 2]; - g = image[((height - i - 1) * width + j) * 3 + 1]; - b = image[((height - i - 1) * width + j) * 3]; - -#if defined(BOARD_LCD_RGB565) - // Interlacing - r = ((r << 1) & 0xF0) | ((g & 0x80) >> 4) | ((r & 0x80) >> 5); - g = (g << 1) & 0xF8; - b = b & 0xF8; - - buffer[(i * width + j) * 3] = b; - buffer[(i * width + j) * 3 + 1] = g; - buffer[(i * width + j) * 3 + 2] = r; - -#else - buffer[(i * width + j) * 3] = r; - buffer[(i * width + j) * 3 + 1] = g; - buffer[(i * width + j) * 3 + 2] = b; -#endif //#if defined(BOARD_LCD_RGB565) - } - } - } - else if (header->bits == 8) { - - // Decoding is ok - if (!buffer) return 0; - - // Retrieve palette - struct BMPPaletteEntry palette[256]; - memcpy(palette, - (unsigned char *) ((unsigned int) file + sizeof(struct BMPHeader)), - header->offset - sizeof(struct BMPHeader)); - - // Decode image (reversing row order) - for (i=0; i < height; i++) { - for (j=0; j < width; j++) { - - r = palette[image[(height - i - 1) * width + j]].r; - g = palette[image[(height - i - 1) * width + j]].g; - b = palette[image[(height - i - 1) * width + j]].b; - - buffer[(i * width + j) * 3] = r; - buffer[(i * width + j) * 3 + 1] = g; - buffer[(i * width + j) * 3 + 2] = b; - } - } - } - else { - - TRACE_ERROR("BMP_Decode: Input resolution not supported\n\r"); - TRACE_INFO("header->bits 0x%X \n\r", header->bits); - return 4; - } - - return 0; -} - -//------------------------------------------------------------------------------ -/// Convert RGB 565 to RGB 555 (RGB 555 is adapted to LCD) -/// \param fileSource Buffer which holds the RGB file -/// \param fileDestination Buffer in which to store the decoded image -/// \param width Buffer width in pixels. -/// \param height Buffer height in pixels. -/// \param bpp Number of bits per pixels that the buffer stores. -//------------------------------------------------------------------------------ -void RGB565toBGR555( - unsigned char *fileSource, - unsigned char *fileDestination, - unsigned int width, - unsigned int height, - unsigned char bpp) -{ - unsigned int i; - unsigned int j; - unsigned int row; - - for (i=0; i < height*(bpp/8); i++) { - row = (i*width*(bpp/8)); - for (j=0; j <= width*(bpp/8); j+=2) { - fileDestination[row+j] = ((fileSource[row+j+1]>>3)&0x1F) - | (fileSource[row+j]&0xE0); - fileDestination[row+j+1] = (fileSource[row+j+1]&0x03) - | ((fileSource[row+j]&0x1F)<<2); - } - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/bmp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/bmp.h deleted file mode 100644 index 81280b22..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/bmp.h +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !!!Purpose -/// -/// Utility for BMP -/// -//------------------------------------------------------------------------------ - -#ifndef BMP_H -#define BMP_H - -/// BMP magic number ('BM'). -#define BMP_TYPE 0x4D42 - -/// headerSize must be set to 40 -#define BITMAPINFOHEADER 40 - -//------------------------------------------------------------------------------ -// Exported types -//------------------------------------------------------------------------------ - -#ifdef __ICCARM__ // IAR -#pragma pack(1) // IAR -#define __attribute__(...) // IAR -#endif // IAR - -// BMP (Windows) Header Format -struct BMPHeader { - /// signature, must be 4D42 hex - unsigned short type; - /// size of BMP file in bytes (unreliable) - unsigned int fileSize; - /// reserved, must be zero - unsigned short reserved1; - /// reserved, must be zero - unsigned short reserved2; - /// offset to start of image data in bytes - unsigned int offset; - /// size of BITMAPINFOHEADER structure, must be 40 - unsigned int headerSize; - /// image width in pixels - unsigned int width; - /// image height in pixels - unsigned int height; - /// number of planes in the image, must be 1 - unsigned short planes; - /// number of bits per pixel (1, 4, 8, 16, 24, 32) - unsigned short bits; - /// compression type (0=none, 1=RLE-8, 2=RLE-4) - unsigned int compression; - /// size of image data in bytes (including padding) - unsigned int imageSize; - /// horizontal resolution in pixels per meter (unreliable) - unsigned int xresolution; - /// vertical resolution in pixels per meter (unreliable) - unsigned int yresolution; - /// number of colors in image, or zero - unsigned int ncolours; - /// number of important colors, or zero - unsigned int importantcolours; - -} __attribute__ ((packed)); // GCC - -#ifdef __ICCARM__ // IAR -#pragma pack() // IAR -#endif // IAR - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -extern unsigned char BMP_IsValid(void *file); - -extern unsigned int BMP_GetFileSize(void *file); - -extern unsigned char BMP_Decode( - void *file, - unsigned char *buffer, - unsigned int width, - unsigned int height, - unsigned char bpp); - -extern void WriteBMPheader(unsigned int* pAddressHeader, - unsigned int bmpHSize, - unsigned int bmpVSize, - unsigned char bmpRgb, - unsigned char nbByte_Pixels); - -extern void BMP_displayHeader(unsigned int* pAddressHeader); - -extern void RGB565toBGR555( - unsigned char *fileSource, - unsigned char *fileDestination, - unsigned int width, - unsigned int height, - unsigned char bpp); - - -#endif //#ifndef BMP_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/clock.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/clock.c deleted file mode 100644 index c298fb79..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/clock.c +++ /dev/null @@ -1,259 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "clock.h" -#include -#include - -//------------------------------------------------------------------------------ -// Internal types -//------------------------------------------------------------------------------ -int currentConfig = 0; // 0 have to be the default configuration - -//------------------------------------------------------------------------------ -/// Describes a possible clock configuration (processor clock & master clock), -/// including the necessary register values. -//------------------------------------------------------------------------------ -struct ClockConfiguration { - - /// Processor clock frequency (in MHz). - unsigned short pck; - /// Master clock frequency (in MHz). - unsigned short mck; - /// CKGR_PLL reqister value. - unsigned int pllr; - /// PMC_MCKR register value. - unsigned int mckr; -}; - -//------------------------------------------------------------------------------ -// Internal variables -//------------------------------------------------------------------------------ - -// Clock configurations for the AT91SAM9263-EK -#if defined(at91sam9263) - -#define AT91C_CKGR_PLLR AT91C_CKGR_PLLAR -#define AT91C_PMC_LOCK AT91C_PMC_LOCKA - -static const struct ClockConfiguration clockConfigurations[] = { - // PCK = 200 MHz, MCK = 100 MHz - {200, 100, 0x206DBF09, 0x00000102}, - // PCK = 240 MHz, MCK = 120 MHz - {240, 120, 0x202BC003, 0x00000102}, - // PCK = 120 MHz, MCK = 120 MHz - {120, 120, 0x20156003, 0x00000002}, - // PCK = 96 MHz, MCK = 48 MHz - {96, 48, 0x2057400F, 0x00000102}, - // PCK = 48 MHz, MCK = 48 MHz - {48, 48, 0x2057400F, 0x00000006} -}; - -// Clock configurations for the AT91SAM9G20-EK -#elif defined(at91sam9g20) - -#define AT91C_CKGR_PLLR AT91C_CKGR_PLLAR -#define AT91C_PMC_LOCK AT91C_PMC_LOCKA - -static const struct ClockConfiguration clockConfigurations[] = { - - // PCK = 400 MHz, MCK = 133 MHz - {400, 133, 0x202A0101, 0x00001302}, - // PCK = 200 MHz, MCK = 100 MHz - {200, 100, 0x202A3F01, 0x0000010A}, - // PCK = 96 MHz, MCK = 48 MHz - {96, 48, 0x207C3F03, 0x0000010E}, - // PCK = 48 MHz, MCK = 48 MHz - {48, 48, 0x207C3F03, 0x00000012} -}; - -// Clock configurations for the AT91SAM9XE-EK, AT91SAM9261-EK -#elif defined(at91sam9xe128) || \ - defined(at91sam9xe256) || \ - defined(at91sam9xe512) || \ - defined(at91sam9261) - -#define AT91C_CKGR_PLLR AT91C_CKGR_PLLAR -#define AT91C_PMC_LOCK AT91C_PMC_LOCKA - -static const struct ClockConfiguration clockConfigurations[] = { - - // PCK = 200 MHz, MCK = 100 MHz - {200, 100, 0x208CBF0D, 0x00000102}, - // PCK = 100 MHz, MCK = 100 MHz - {100, 100, 0x20273F07, 0x00000002}, - // PCK = 96 MHz, MCK = 48 MHz - {96, 48, 0x20483F0E, 0x00000102}, - // PCK = 48 MHz, MCK = 48 MHz - {48, 48, 0x20483F0E, 0x00000006} -}; - -// Clock configurations for the AT91SAM9RL64-EK, AT91CAP9-DK, AT91CAP9-STK -#elif defined(at91sam9rl64) || \ - defined(at91cap9) - -#define AT91C_CKGR_PLLR AT91C_CKGR_PLLAR -#define AT91C_PMC_LOCK AT91C_PMC_LOCKA - -static const struct ClockConfiguration clockConfigurations[] = { - - // PCK = 200 MHz, MCK = 100 MHz - {200, 100, 0x2031BF03, 0x00000102}, - // PCK = 100 MHz, MCK = 100 MHz - {100, 100, 0x20183F03, 0x00000002}, - // PCK = 96 MHz, MCK = 48 MHz - {96, 48, 0x20073F01, 0x00000102}, - // PCK = 48 MHz, MCK = 48 MHz - {48, 48, 0x20073F01, 0x00000006} -}; - -// Clock configuration for the AT91SAM7X-EK, AT91SAM7S-EK, AT91SAM7SE-EK -#elif defined(at91sam7x128) || defined(at91sam7x256) || defined(at91sam7x512) \ - || defined(at91sam7xc128) || defined(at91sam7xc256) || defined(at91sam7xc512) \ - || defined(at91sam7s16) || defined(at91sam7s161) || defined(at91sam7s32) \ - || defined(at91sam7s321) || defined(at91sam7s64) || defined(at91sam7s128) \ - || defined(at91sam7s256) || defined(at91sam7s512) || defined(at91sam7se32) \ - || defined(at91sam7se256) || defined(at91sam7se512) - -static const struct ClockConfiguration clockConfigurations[] = { - - // PCK = 55 MHz, MCK = 55 MHz - {55, 55, 0x006A3F12, 0x00000007}, - // PCK = 48 MHz, MCK = 48 MHz - {48, 48, 0x00483F0E, 0x00000007}, -}; - -// Clock configuration for the AT91SAM7A3 -#elif defined(at91sam7a3) - -static const struct ClockConfiguration clockConfigurations[] = { - - // PCK = 60 MHz, MCK = 60 MHz - {60, 60, 0x000C3F02, 0x00000007}, - // PCK = 48 MHz, MCK = 48 MHz - {48, 48, 0x00483F0E, 0x00000007} -}; - -// No clock configuration -#else - #error No clock configuration for this board. -#endif - -/// Number of available clock configurations -#define NB_CLOCK_CONFIGURATION (sizeof(clockConfigurations)/sizeof(clockConfigurations[0])) - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Sets the specified clock configuration. -/// \param configuration Index of the configuration to set. -//------------------------------------------------------------------------------ -void CLOCK_SetConfig(unsigned char configuration) -{ - printf("Setting clock configuration #%d ... ", configuration); - currentConfig = configuration; - - // Switch to main oscillator in two operations - PMC->PMC_MCKR = (PMC->PMC_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK; - while ((PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0); - - // Configure PLL - *AT91C_CKGR_PLLAR = clockConfigurations[configuration].pllr; - while ((PMC->PMC_SR & AT91C_PMC_LOCKA) == 0); - - // Configure master clock in two operations - PMC->PMC_MCKR = (clockConfigurations[configuration].mckr & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK; - while ((PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0); - PMC->PMC_MCKR = clockConfigurations[configuration].mckr; - while ((PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0); - - // DBGU reconfiguration - DBGU_Configure(DBGU_STANDARD, 115200, clockConfigurations[configuration].mck*1000000); - printf("done.\n\r"); -} - -//------------------------------------------------------------------------------ -/// Display the user menu on the DBGU. -//------------------------------------------------------------------------------ -void CLOCK_DisplayMenu(void) -{ - unsigned int i; - - printf("\n\rMenu Clock configuration:\n\r"); - for (i = 0; i < NB_CLOCK_CONFIGURATION; i++) { - - printf(" %d: Set PCK = %3d MHz, MCK = %3d MHz %s\n\r", - i, - clockConfigurations[i].pck, - clockConfigurations[i].mck, - (currentConfig==i)?"(curr)":""); - } -} - -//------------------------------------------------------------------------------ -/// Get the current MCK -//------------------------------------------------------------------------------ -unsigned short CLOCK_GetCurrMCK(void) -{ - return clockConfigurations[currentConfig].mck; -} - -//------------------------------------------------------------------------------ -/// Get the current PCK -//------------------------------------------------------------------------------ -unsigned short CLOCK_GetCurrPCK(void) -{ - return clockConfigurations[currentConfig].pck; -} - -//------------------------------------------------------------------------------ -/// Change clock configuration. -//------------------------------------------------------------------------------ -void CLOCK_UserChangeConfig(void) -{ - unsigned char key = 0; - - while (1) - { - CLOCK_DisplayMenu(); - key = DBGU_GetChar(); - - if ((key >= '0') && (key <= ('0' + NB_CLOCK_CONFIGURATION - 1))) - { - CLOCK_SetConfig(key - '0'); - break; - } - } -} \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/clock.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/clock.h deleted file mode 100644 index 54083008..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/clock.h +++ /dev/null @@ -1,47 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef CLOCK_H -#define CLOCK_H - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -extern void CLOCK_SetConfig(unsigned char configuration); - -extern void CLOCK_DisplayMenu(void); - -extern void CLOCK_UserChangeConfig(void); - -extern unsigned short CLOCK_GetCurrMCK(void); - -extern unsigned short CLOCK_GetCurrPCK(void); - -#endif //#ifndef FREQCONF_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/aes_hardware.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/aes_hardware.c deleted file mode 100644 index 1501afef..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/aes_hardware.c +++ /dev/null @@ -1,316 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Function: Firmware encryption using hardware acceleration -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ - -#include "aes_hardware.h" - -#if defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_HARD) -#include -#include -#include -#include -#include -#include -#include - -//------------------------------------------------------------------------------ -// Inline functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Converts an ASCII value to an hexadecimal one -/// \param ASCII string -/// \param Buffer to store integer value -/// \param Length of string -//------------------------------------------------------------------------------ -static inline void ASCII2Hex(const unsigned char * ascii, - unsigned char * binary, - unsigned int length) -{ - unsigned int i; - - for (i=0; i < length; i++) { - if (ascii[i*2] >= 'A') { - binary[i] = ascii[i*2] - 'A' + 10; - } - else { - binary[i] = ascii[i*2] - '0'; - } - binary[i] <<= 4; - if (ascii[i*2+1] >= 'A') { - binary[i] += ascii[i*2+1] - 'A' + 10; - } - else { - binary[i] += ascii[i*2+1] - '0'; - } - } -} - -//------------------------------------------------------------------------------ -// Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Initializes the AES peripheral -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -void aes_hard_init(void) -{ - unsigned char key[16]; - -#if defined(ENCRYPTION_CTR) || defined(ENCRYPTION_CBC) - unsigned char IV[16]; -#endif - - TRACE_DEBUG("AES/HARD: Initializing ...\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode -#if defined(ENCRYPTION_ECB) - //AES_Configure(AT91C_AES_CIPHER, AT91C_AES_SMOD_PDC, AT91C_AES_OPMOD_ECB); - - AT91C_BASE_AES->AES_MR = AT91C_AES_SMOD_PDC | AT91C_AES_OPMOD_ECB; -#elif defined(ENCRYPTION_CBC) - AT91C_BASE_AES->AES_MR = AT91C_AES_SMOD_PDC | AT91C_AES_OPMOD_CBC; -#elif defined(ENCRYPTION_CTR) - AT91C_BASE_AES->AES_MR = AT91C_AES_SMOD_PDC | AT91C_AES_OPMOD_CTR; -#endif - - // Convert and load key - ASCII2Hex((unsigned char*)ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - AES_SetKey((unsigned int*)key); - - // Convert and load IV -#if defined(ENCRYPTION_CTR) || defined(ENCRYPTION_CBC) - ASCII2Hex((unsigned char*)ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - AES_SetVector((unsigned int*)IV); -#endif - - TRACE_DEBUG("AES/HARD: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the AES peripheral for CBC mode -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -#if defined(ENCRYPTION_CBC) -void aes_hard_init_CBC(void) -{ - unsigned char key[16]; - unsigned char IV[16]; - - TRACE_DEBUG("aes_hard_init_CBC\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode - AT91C_BASE_AES->AES_MR = AT91C_AES_SMOD_PDC | AT91C_AES_OPMOD_CBC; - - // Convert and load key - ASCII2Hex((unsigned char*)ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - AES_SetKey((unsigned int*)key); - - // Convert and load IV - ASCII2Hex((unsigned char*)ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - AES_SetVector((unsigned int*)IV); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the AES peripheral for CTR mode -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -void aes_hard_init_CTR(void) -{ - unsigned char key[16]; - unsigned char IV[16]; - - TRACE_DEBUG("aes_hard_init_CTR\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode - AT91C_BASE_AES->AES_MR = AT91C_AES_SMOD_PDC | AT91C_AES_OPMOD_CTR; - - // Convert and load key - ASCII2Hex((unsigned char*)ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - AES_SetKey((unsigned int*)key); - - // Convert and load IV - ASCII2Hex((unsigned char*)ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - AES_SetVector((unsigned int*)IV); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the AES peripheral for ECB mode -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -void aes_hard_init_ECB(void) -{ - unsigned char key[16]; - - TRACE_DEBUG("aes_hard_init_ECB\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode - //AES_Configure(AT91C_AES_CIPHER, AT91C_AES_SMOD_MANUAL, AT91C_AES_OPMOD_ECB); - AT91C_BASE_AES->AES_MR = AT91C_AES_SMOD_PDC | AT91C_AES_OPMOD_ECB; - - // Convert and load key - ASCII2Hex((unsigned char*)ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - AES_SetKey((unsigned int*)key); -} -#endif -#endif // ONLY_ONE_ENCRYPTION - -//------------------------------------------------------------------------------ -/// Cleans up the AES peripheral -//------------------------------------------------------------------------------ -void aes_hard_cleanup(void) -{ - TRACE_DEBUG("AES/HARD: Cleaning up ...\n\r"); - - AT91C_BASE_AES->AES_MR = 0; - -#ifdef AT91C_ID_AES - PMC_DisablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_DisablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_DisablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Close PDC - AT91C_BASE_PDC_AES->PDC_PTCR = AT91C_PDC_RXTDIS; - AT91C_BASE_PDC_AES->PDC_PTCR = AT91C_PDC_TXTDIS; - - // Reset all Counter register Next buffer first - AT91C_BASE_PDC_AES->PDC_TNPR = 0; - AT91C_BASE_PDC_AES->PDC_TNCR = 0; - AT91C_BASE_PDC_AES->PDC_RPR = 0; - AT91C_BASE_PDC_AES->PDC_RCR = 0; - AT91C_BASE_PDC_AES->PDC_TPR = 0; - AT91C_BASE_PDC_AES->PDC_TCR = 0; - AT91C_BASE_PDC_AES->PDC_RPR = 0; - AT91C_BASE_PDC_AES->PDC_RCR = 0; - - TRACE_DEBUG("AES/HARD: Cleanup done.\n\r"); -} - -//------------------------------------------------------------------------------ -/// Decrypts a variable-length cipher text -/// \param pCipherText text to decrypt -/// \param pPlainText to store plain text -/// \param length of cipher text (in bytes) -/// \return: 1 if ok, 0 if error -//------------------------------------------------------------------------------ -int aes_hard_decrypt(const unsigned char *pCipherText, - unsigned char *pPlainText, - unsigned int length) -{ - TRACE_DEBUG("aes_hard_decrypt\n\r"); - - // Check parameters - if ((pCipherText == NULL) || (pPlainText == NULL)) { - return 0; - } - - // Set source and destination buffers in PDC - AT91C_BASE_PDC_AES->PDC_TPR = (unsigned int) pCipherText; - AT91C_BASE_PDC_AES->PDC_RPR = (unsigned int) pPlainText; - - AT91C_BASE_PDC_AES->PDC_TCR = length >> 2; - AT91C_BASE_PDC_AES->PDC_RCR = length >> 2; - - // Start decryption and wait - AT91C_BASE_PDC_AES->PDC_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN; - while (((AES_GetStatus()) & AT91C_AES_ENDRX) == 0); - - return 1; -} - -#endif // defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_HARD) - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/aes_hardware.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/aes_hardware.h deleted file mode 100644 index 62f38a7f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/aes_hardware.h +++ /dev/null @@ -1,100 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Firmware encryption using AES hardware acceleration -/// This code is based on the AES reference implementation published by Paulo -/// Barreto and Vincent Rijmen. -/// -/// !Usage -/// -/// -# aes_hard_init: Initialize AES hardware -/// -# aes_hard_init_CBC: for the CBC mode -/// -# aes_hard_init_CTR: for the CTR mode -/// -# aes_hard_init_ECB: for the ECB mode -/// -# aes_hard_cleanup: Cleans up AES -/// -# aes_hard_decrypt: Decrypts a variable-length cipher text -//------------------------------------------------------------------------------ - -#ifndef BOOTLOADER_AES_HARDWARE_H -#define BOOTLOADER_AES_HARDWARE_H - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ -#include "config.h" - -#if defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_HARD) - -//------------------------------------------------------------------------------ -// Check configuration -//------------------------------------------------------------------------------ -#if (ENCRYPTION_KEY_LENGTH != 16) - #error Hardware AES acceleration only supports 128 bits keys. -#endif - -#if (ENCRYPTION_BLOCK_LENGTH != 16) - #error Hardware AES acceleration only supports 128 bits blocks. -#endif - -#if !defined(ENCRYPTION_ECB) && \ - !defined(ENCRYPTION_CBC) && \ - !defined(ENCRYPTION_CTR) - #error Only ECB, CBC & CTR modes are supported. -#endif - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -#define ENCRYPTION_INIT aes_hard_init -#define ENCRYPTION_CLEANUP aes_hard_cleanup -#define ENCRYPTION_DECRYPT aes_hard_decrypt -#endif - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ -extern void aes_hard_init(void); -#ifndef ONLY_ONE_ENCRYPTION -extern void aes_hard_init_CBC(void); -extern void aes_hard_init_CTR(void); -extern void aes_hard_init_ECB(void); -#endif -extern void aes_hard_cleanup(void); -extern int aes_hard_decrypt(const unsigned char *, unsigned char *, unsigned int); - -#endif // defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_HARD) -#endif // BOOTLOADER_AES_HARDWARE_H - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/aes_reference.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/aes_reference.c deleted file mode 100644 index a94844ab..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/aes_reference.c +++ /dev/null @@ -1,801 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Firmware encryption using AES reference implementation -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ -#include "aes_reference.h" - -#if defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_REF) -#include -#include -#include -#include -#include -#include - -//------------------------------------------------------------------------------ -// Global variables -//------------------------------------------------------------------------------ -#define word8 static unsigned char -#define word32 static unsigned int - -#include "boxes-ref.dat" - -static unsigned char shifts[3][2][4] = { - {{0,1,2,3}, {0,3,2,1}}, - {{0,1,2,3}, {0,5,4,3}}, - {{0,7,5,5}, {0,1,3,4}} -}; - -static unsigned char key[KC][4]; -static unsigned char expandedKey[ROUNDS+1][BC][4]; -static unsigned int T0[256], T1[256], T2[256], T3[256], TF[256]; - -#if defined(ENCRYPTION_CBC) || defined(ENCRYPTION_CTR) -static unsigned char IV[BC][4]; -#endif - -//------------------------------------------------------------------------------ -// Inline functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Multiply two elements of GF(2^m) needed for MixColumn and InvMixColumn -/// \param a first element -/// \param b second element -/// \return result of operation -//------------------------------------------------------------------------------ -static unsigned char mul(unsigned char a, unsigned char b) -{ - if (a && b) { - return Alogtable[(Logtable[a] + Logtable[b])%255]; - } - else { - return 0; - } -} - -//------------------------------------------------------------------------------ -/// Returns the minimum between two numbers -/// \param First number -/// \param Second number -/// \return Minimum between the two operands -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -static unsigned int min(unsigned int number1, unsigned int number2) -{ - if (number1 > number2) { - return number2; - } - else { - return number1; - } -} -#endif - -//------------------------------------------------------------------------------ -/// XOR text and round key together -/// \param Plain text -/// \param Round key -//------------------------------------------------------------------------------ -static inline void addRoundKey(unsigned char a[BC][4], const unsigned char rk[BC][4]) -{ - unsigned int i; - - for (i=0; i < BC; i++) { - ((int *) a)[i] ^= ((int *) rk)[i]; - } -} - -//------------------------------------------------------------------------------ -/// Performs the AES key schedule -/// \param Key to use -/// \param Buffer to store expanded key schedule -//------------------------------------------------------------------------------ -static inline void keySchedule(unsigned char k[KC][4], unsigned char W[ROUNDS+1][BC][4]) -{ - int t; - int rconpointer = 0; - unsigned int j; - unsigned char tk[KC][4]; - - for(j=0; j < KC; j++) { - ((int *) tk)[j] = ((int *) k)[j]; - } - - t = 0; - /* copy values into round key array */ - for(j=0; (j < KC) && (t < (ROUNDS+1)*BC); j++, t++) { - ((int *) W[t / BC])[t%BC] = ((int *) tk)[j]; - } - - while (t < (ROUNDS+1)*BC) { - - tk[0][0] ^= S[tk[KC-1][1]] ^ rcon[rconpointer++]; - tk[0][1] ^= S[tk[KC-1][2]]; - tk[0][2] ^= S[tk[KC-1][3]]; - tk[0][3] ^= S[tk[KC-1][0]]; - - if (KC != 8) { - for(j=1; j < KC; j++) { - ((int *) tk)[j] ^= ((int *) tk)[j-1]; - } - } - else { - for(j=1; j < KC/2; j++) { - ((int *) tk)[j] ^= ((int *) tk)[j-1]; - } - tk[KC/2][0] ^= S[tk[KC/2 - 1][0]]; - tk[KC/2][1] ^= S[tk[KC/2 - 1][1]]; - tk[KC/2][2] ^= S[tk[KC/2 - 1][2]]; - tk[KC/2][3] ^= S[tk[KC/2 - 1][3]]; - - for(j=KC/2+1; j < KC; j++) { - ((int *) tk)[j] ^= ((int *) tk)[j-1]; - } - } - - // copy values into round key array - for(j=0; (j < KC) && (t < (ROUNDS+1)*BC); j++, t++) { - ((int *) W[t/BC])[t%BC] = ((int *) tk)[j]; - } - } -} - -//------------------------------------------------------------------------------ -/// Performs the AES inverse key schedule -/// \param Key to use -/// \param Buffer to store expanded key schedule -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) || defined(ENCRYPTION_CBC) -static inline void invKeySchedule(unsigned char k[KC][4], - unsigned char W[ROUNDS+1][BC][4]) -{ - unsigned int r; - unsigned int j; - unsigned char tmp[4]; - - // Expand key normally - keySchedule(k, W); - - // Apply invMixColumns to all rounds except first and last one - for (r=1; r < ROUNDS; r++) { - for (j=0; j < BC; j++) { - tmp[0] = mul(0x0E, W[r][j][0]) ^ mul(0x0B, W[r][j][1]) ^ - mul(0x0D, W[r][j][2]) ^ mul(0x09, W[r][j][3]); - tmp[1] = mul(0x0E, W[r][j][1]) ^ mul(0x0B, W[r][j][2]) ^ - mul(0x0D, W[r][j][3]) ^ mul(0x09, W[r][j][0]); - tmp[2] = mul(0x0E, W[r][j][2]) ^ mul(0x0B, W[r][j][3]) ^ - mul(0x0D, W[r][j][0]) ^ mul(0x09, W[r][j][1]); - tmp[3] = mul(0x0E, W[r][j][3]) ^ mul(0x0B, W[r][j][0]) ^ - mul(0x0D, W[r][j][1]) ^ mul(0x09, W[r][j][2]); - W[r][j][0] = tmp[0]; - W[r][j][1] = tmp[1]; - W[r][j][2] = tmp[2]; - W[r][j][3] = tmp[3]; - } - } -} -#endif - -//------------------------------------------------------------------------------ -/// Perform the RotBytes operation needed by the AES cipher -/// \param input to rotate -/// \return Rotated word -//------------------------------------------------------------------------------ -static inline unsigned int rotBytes(unsigned int input) -{ - return ((input << 8) | (input >> 24)); -} - -//------------------------------------------------------------------------------ -/// Generates the lookup tables needed for encryption -/// \param Pointer to t0 -/// \param Pointer to t1 -/// \param Pointer to t2 -/// \param Pointer to t3 -/// \param Pointer to tf -/// \param Box -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -static inline void generateEncryptionLUTs(unsigned int * t0, - unsigned int * t1, - unsigned int * t2, - unsigned int * t3, - unsigned int * tf, - unsigned char box[256]) -{ - unsigned int a; - - for (a=0; a <= 255; a++) { - // Calc t0 - t0[a] = (mul(2, box[a])) | - (box[a] << 8) | - (box[a] << 16) | - (mul(3, box[a]) << 24); - - // Calc t1, t2, t3 - t1[a] = rotBytes(t0[a]); - t2[a] = rotBytes(t1[a]); - t3[a] = rotBytes(t2[a]); - - // Calc tf - tf[a] = box[a] | (box[a] << 8) | (box[a] << 16) | (box[a] << 24); - } -} -#endif - -//------------------------------------------------------------------------------ -/// Generates the lookup tables needed for decryption -/// \param Pointer to t0 -/// \param Pointer to t1 -/// \param Pointer to t2 -/// \param Pointer to t3 -/// \param Pointer to tf -/// \param Box -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) || defined(ENCRYPTION_CBC) -static inline void generateDecryptionLUTs(unsigned int * t0, - unsigned int * t1, - unsigned int * t2, - unsigned int * t3, - unsigned int * tf, - unsigned char box[256]) -{ - unsigned int a; - - for (a=0; a <= 255; a++) { - - // Calc t0 - t0[a] = (mul(0x0E, box[a])) | - (mul(0x09, box[a]) << 8) | - (mul(0x0D, box[a]) << 16) | - (mul(0x0B, box[a]) << 24); - - // Calc t1, t2, t3 - t1[a] = rotBytes(t0[a]); - t2[a] = rotBytes(t1[a]); - t3[a] = rotBytes(t2[a]); - - // Calc tf - tf[a] = box[a] | (box[a] << 8) | (box[a] << 16) | (box[a] << 24); - } -} -#endif - -//------------------------------------------------------------------------------ -/// Copies a block to a buffer -/// \param Block to copy -/// \param Buffer to store copy -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -static void copyBlock(unsigned char input[BC][4], unsigned char output[BC][4]) -{ - unsigned int j; - - for (j=0; j < BC; j++) { - ((int *) output)[j] = ((int *) input)[j]; - } -} -#endif - -//------------------------------------------------------------------------------ -/// Encrypts a block of plain text using precalculated LUTs -/// \param Block of plain text to encrypt -/// \param Expanded key -/// \param Pointer to t0 -/// \param Pointer to t1 -/// \param Pointer to t2 -/// \param Pointer to t3 -/// \param Pointer to tf -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -static inline void encrypt(unsigned char a[BC][4], - const unsigned char rk[ROUNDS+1][BC][4], - unsigned int * t0, - unsigned int * t1, - unsigned int * t2, - unsigned int * t3, - unsigned int * tf) -{ - unsigned char b[BC][4]; - unsigned int r; - unsigned int j; - - // First key addition - addRoundKey(a, rk[0]); - - // ROUNDS-1 ordinary rounds - for(r=1; r < ROUNDS; r++) { - for (j=0; j < BC; j++) { - - ((int *) b)[j] = t0[a[j][0]] ^ - t1[a[(j+shifts[SC][0][1])%BC][1]] ^ - t2[a[(j+shifts[SC][0][2])%BC][2]] ^ - t3[a[(j+shifts[SC][0][3])%BC][3]] ^ - ((int *) rk[r])[j]; - } - if ((++r) == ROUNDS) { - break; - } - for (j=0; j < BC; j++) { - ((int *) a)[j] = t0[b[j][0]] ^ - t1[b[(j+shifts[SC][0][1])%BC][1]] ^ - t2[b[(j+shifts[SC][0][2])%BC][2]] ^ - t3[b[(j+shifts[SC][0][3])%BC][3]] ^ - ((int *) rk[r])[j]; - } - } - - // Last round (no MixColumns) - for (j=0; j < BC; j++) { - ((int *) a)[j] = (t0f[b[j][0]]) ^ - (t1f[b[(j+shifts[SC][0][1])%BC][1]]) ^ - (t2f[b[(j+shifts[SC][0][2])%BC][2]]) ^ - (t3f[b[(j+shifts[SC][0][3])%BC][3]]) ^ - ((int *) rk[ROUNDS])[j]; - } -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a block of plain text using precalculated LUTs -/// \param Block of cipher text to decrypt -/// \param Expanded key -/// \param Pointer to t0 -/// \param Pointer to t1 -/// \param Pointer to t2 -/// \param Pointer to t3 -/// \param Pointer to tf -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) || defined(ENCRYPTION_CBC) -static inline void decrypt(unsigned char a[BC][4], - const unsigned char rk[ROUNDS+1][BC][4], - unsigned int * t0, - unsigned int * t1, - unsigned int * t2, - unsigned int * t3, - unsigned int * tf) -{ - unsigned char b[BC][4]; - unsigned int r; - unsigned int j; - - // First key addition - addRoundKey(a, rk[ROUNDS]); - - // ROUNDS-1 ordinary rounds - for(r=ROUNDS-1; r > 0; r--) { - for (j=0; j < BC; j++) { - ((int *) b)[j] = t0[a[j][0]] ^ - t1[a[(j+shifts[SC][1][1])%BC][1]] ^ - t2[a[(j+shifts[SC][1][2])%BC][2]] ^ - t3[a[(j+shifts[SC][1][3])%BC][3]] ^ - ((int *) rk[r])[j]; - } - if ((--r) == 0) { - break; - } - for (j=0; j < BC; j++) { - ((int *) a)[j] = t0[b[j][0]] ^ - t1[b[(j+shifts[SC][1][1])%BC][1]] ^ - t2[b[(j+shifts[SC][1][2])%BC][2]] ^ - t3[b[(j+shifts[SC][1][3])%BC][3]] ^ - ((int *) rk[r])[j]; - } - } - // Last round (no MixColumns) - for (j=0; j < BC; j++) { - ((int *) a)[j] = (t0f[b[j][0]]) ^ - (t1f[b[(j+shifts[SC][1][1])%BC][1]]) ^ - (t2f[b[(j+shifts[SC][1][2])%BC][2]]) ^ - (t3f[b[(j+shifts[SC][1][3])%BC][3]]) ^ - ((int *) rk[0])[j]; - } -} -#endif - -//------------------------------------------------------------------------------ -/// Converts an ASCII hexadecimal representation to a raw binary one -/// \param ASCII value -/// \param Buffer to store binary value -/// \param Size of value -//------------------------------------------------------------------------------ -static void ASCII2RawHex(const unsigned char * ascii, - unsigned char * binary, - unsigned int length) -{ - unsigned char * ptr; - unsigned int i; - - ptr = (unsigned char *) binary; - for (i=0; i < length; i++, ptr++, ascii++) { - if (*ascii >= 'A') { - *ptr = *ascii - 'A' + 10; - } - else { - *ptr = *ascii - '0'; - } - *ptr <<= 4; - ascii++; - if (*ascii >= 'A') { - *ptr += *ascii - 'A' + 10; - } - else { - *ptr += *ascii - '0'; - } - } -} - -//------------------------------------------------------------------------------ -/// Decrypts a cipher text using ECB mode -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text -/// \param Expanded key to use -/// \return 0 if successful, 0 otherwise -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -static unsigned int ecb_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length, - unsigned char expandedKey[ROUNDS+1][BC][4]) -{ - unsigned char block[BC][4]; - unsigned int i; - unsigned int l; - - // Check input parameters - if ((cipherText == NULL) || (plainText == NULL) || (expandedKey == NULL)) { - TRACE_DEBUG("AES/REF: NULL parameter(s).\n\r"); - return 0; - } - if (length%ENCRYPTION_BLOCK_LENGTH != 0) { - TRACE_DEBUG("AES/REF: Data length must be a multiple of the cipher block size.\n\r"); - return 0; - } - // ECB decryption - for (l=0; l < length;) { - // Copy cipher text block, decrypt it and copy result - for (i=0; i < ENCRYPTION_BLOCK_LENGTH; i++) { - ((char *) block)[i] = cipherText[l+i]; - } - decrypt(block, expandedKey, T0, T1, T2, T3, TF); - for (i=0; i < ENCRYPTION_BLOCK_LENGTH; i++) { - plainText[l+i] = ((char *) block)[i]; - } - l += ENCRYPTION_BLOCK_LENGTH; - } - - return 1; -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a cipher text using CBC mode -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -/// \param Expanded key to use -/// \param Initialization vector to use -/// \return 1 if successful, 0 otherwise */ -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CBC) -static unsigned int cbc_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length, - const unsigned char expandedKey[ROUNDS+1][BC][4], - unsigned char IV[BC][4]) -{ - unsigned char block[BC][4]; - unsigned int i; - unsigned int l; - - // Check input parameters - if ((cipherText == NULL) || (plainText == NULL)) { - TRACE_DEBUG("AES/REF: NULL parameter(s).\n\r"); - return 0; - } - if (length%ENCRYPTION_BLOCK_LENGTH != 0) { - TRACE_DEBUG("AES/REF: Cipher text length must be a multiple of the cipher block length.\n\r"); - return 0; - } - // Decrypt data - for (l=0; l < length;) { - // Copy and decrypt a block of cipher text - for (i=0; i < BC; i++) { - ((int *) block)[i] = ((int *) &cipherText[l])[i]; - } - decrypt(block, expandedKey, T0, T1, T2, T3, TF); - // Xor decrypted text & IV, copy new IV - for (i=0; i < BC; i++) { - unsigned int tmp = ((int *) block)[i] ^ ((int *) IV)[i]; - ((int *) IV)[i] = ((int *) &cipherText[l])[i]; - ((int *) &plainText[l])[i] = tmp; - } - - // Loop progression - l += ENCRYPTION_BLOCK_LENGTH; - } - return 1; -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a cipher text using CTR mode -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text -/// \param Expanded key to use -/// \param Initialization vector to use -/// \return 1 if successful, 0 otherwise -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -static unsigned int ctr_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length, - const unsigned char expandedKey[ROUNDS+1][BC][4], - unsigned char IV[BC][4]) -{ - unsigned char block[BC][4]; - unsigned int bytes; - unsigned int i; - unsigned int l; - int k; - - // Check input parameters - if ((cipherText == NULL) || (plainText == NULL)) { - return 0; - } - for (l=0; l < length;) { - // Copy counter and encrypt it - copyBlock(IV, block); - encrypt(block, expandedKey, T0, T1, T2, T3, TF); - - // XOR current plain text block with encrypted counter - bytes = min(length - l, ENCRYPTION_BLOCK_LENGTH); - - for (i=0; i < bytes; i++) { - plainText[l+i] = cipherText[l+i] ^ ((char *) block)[i]; - } - // Increment counter (big-endian) and number of encrypted bytes - for (k=ENCRYPTION_BLOCK_LENGTH-1; k >= 0; k--) { - if (++((char *) IV)[k] != 0) { - break; - } - } - l += bytes; - } - return 1; -} -#endif - -//------------------------------------------------------------------------------ -// Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Initializes the AES algorithm -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -void aes_ref_init(void) -{ - TRACE_DEBUG("AES/REF: Initializing ...\n\r"); - - ASCII2RawHex((unsigned char*)ENCRYPTION_KEY, (unsigned char*)key, ENCRYPTION_KEY_LENGTH); - -#if defined(ENCRYPTION_ECB) || defined(ENCRYPTION_CBC) - - // Initialize key schedule - invKeySchedule(key, expandedKey); - - // Generate lookup tables - generateDecryptionLUTs(T0, T1, T2, T3, TF, Si); - -#elif defined(ENCRYPTION_CTR) - - // Initialize key schedule - keySchedule(key, expandedKey); - - // Generate lookup tables - generateEncryptionLUTs(T0, T1, T2, T3, TF, S); -#endif - -#if defined(ENCRYPTION_CBC) || defined(ENCRYPTION_CTR) - // Initialize counter - ASCII2RawHex((unsigned char*)ENCRYPTION_IV, (unsigned char*)IV, ENCRYPTION_BLOCK_LENGTH); -#endif - - TRACE_DEBUG("AES/REF: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the AES algorithm mode CBC -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -#if defined(ENCRYPTION_CBC) -void aes_ref_init_CBC(void) -{ - TRACE_DEBUG("aes_ref_init_CBC\n\r"); - - ASCII2RawHex((unsigned char*)ENCRYPTION_KEY, (unsigned char*)key, ENCRYPTION_KEY_LENGTH); - - // Initialize key schedule - invKeySchedule(key, expandedKey); - - // Generate lookup tables - generateDecryptionLUTs(T0, T1, T2, T3, TF, Si); - - // Initialize counter - ASCII2RawHex((unsigned char*)ENCRYPTION_IV, (unsigned char*)IV, ENCRYPTION_BLOCK_LENGTH); - - TRACE_DEBUG("AES/REF: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the AES algorithm mode ECB -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -void aes_ref_init_ECB(void) -{ - TRACE_DEBUG("aes_ref_init_ECB\n\r"); - - ASCII2RawHex((unsigned char*)ENCRYPTION_KEY, (unsigned char*)key, ENCRYPTION_KEY_LENGTH); - - // Initialize key schedule - invKeySchedule(key, expandedKey); - - // Generate lookup tables - generateDecryptionLUTs(T0, T1, T2, T3, TF, Si); - - TRACE_DEBUG("AES/REF: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the AES algorithm mode CTR -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -void aes_ref_init_CTR(void) -{ - TRACE_DEBUG("aes_ref_init_CTR\n\r"); - - ASCII2RawHex((unsigned char*)ENCRYPTION_KEY, (unsigned char*)key, ENCRYPTION_KEY_LENGTH); - - // Initialize key schedule - keySchedule(key, expandedKey); - - // Generate lookup tables - generateEncryptionLUTs(T0, T1, T2, T3, TF, S); - - // Initialize counter - ASCII2RawHex((unsigned char*)ENCRYPTION_IV, (unsigned char*)IV, ENCRYPTION_BLOCK_LENGTH); - - TRACE_DEBUG("AES/REF: Initialization done.\n\r"); -} -#endif -#endif // ONLY_ONE_ENCRYPTION - -//------------------------------------------------------------------------------ -/// Cleanup the AES algorithm -//------------------------------------------------------------------------------ -void aes_ref_cleanup(void) -{ - TRACE_DEBUG("AES/REF: Cleaning up ...\n\r"); - TRACE_DEBUG("AES/REF: Cleanup done.\n\r"); -} - -//------------------------------------------------------------------------------ -/// Decrypt a cipher text of variable length -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -/// \return 1 if decryption was successful, 0 otherwise. -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -int aes_ref_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - TRACE_DEBUG("aes_ref_decrypt\n\r"); -#if defined(ENCRYPTION_ECB) - return ecb_decrypt(cipherText, plainText, length, expandedKey); -#elif defined(ENCRYPTION_CBC) - return cbc_decrypt(cipherText, plainText, length, expandedKey, IV);; -#elif defined(ENCRYPTION_CTR) - return ctr_decrypt(cipherText, plainText, length, expandedKey, IV); -#endif -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypt a cipher text of variable length, mode CBC -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -/// \return 1 if decryption was successful, 0 otherwise. -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -#if defined(ENCRYPTION_CBC) -int aes_ref_decrypt_CBC(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - TRACE_DEBUG("aes_ref_decrypt_CBC\n\r"); - return cbc_decrypt(cipherText, plainText, length, expandedKey, IV);; -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypt a cipher text of variable length, mode ECB -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -/// \return 1 if decryption was successful, 0 otherwise. -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -int aes_ref_decrypt_ECB(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - TRACE_DEBUG("aes_ref_decrypt_ECB\n\r"); - return ecb_decrypt(cipherText, plainText, length, expandedKey); -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypt a cipher text of variable length, mode CTR -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -/// \return 1 if decryption was successful, 0 otherwise. -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -int aes_ref_decrypt_CTR(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - TRACE_DEBUG("aes_ref_decrypt_CTR\n\r"); - return ctr_decrypt(cipherText, plainText, length, expandedKey, IV); -} -#endif - -#endif // ONLY_ONE_ENCRYPTION - -#endif // defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_REF) - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/aes_reference.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/aes_reference.h deleted file mode 100644 index a47907bd..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/aes_reference.h +++ /dev/null @@ -1,132 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Firmware encryption using AES reference implementation -/// -/// !Usage -/// -/// -# aes_ref_init: Initialize AES hardware -/// -# aes_ref_init_CBC: for the CBC mode -/// -# aes_ref_init_ECB: for the CTR mode -/// -# aes_ref_init_CTR: for the ECB mode -/// -# aes_ref_cleanup: Cleans up AES -/// -# aes_ref_decrypt: Decrypts a variable-length cipher text -/// -# aes_ref_decrypt_CBC: for CBC mode -/// -# aes_ref_decrypt_ECB: for ECB mode -/// -# aes_ref_decrypt_CTR: for CTR mode -//------------------------------------------------------------------------------ - -#ifndef BOOTLOADER_AES_REFERENCE_H -#define BOOTLOADER_AES_REFERENCE_H - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ -#include "config.h" - - -#if defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_REF) - -//------------------------------------------------------------------------------ -// Check configuration -//------------------------------------------------------------------------------ - -// Supported modes -#if !defined(ENCRYPTION_ECB) && \ - !defined(ENCRYPTION_CBC) && \ - !defined(ENCRYPTION_CTR) - #error No other mode than ECB, CBC & CTR are supported. -#endif - -// Supported key length -#if (ENCRYPTION_KEY_LENGTH != 16) && \ - (ENCRYPTION_KEY_LENGTH != 24) && \ - (ENCRYPTION_KEY_LENGTH != 32) - #error Only key lengths of 128, 192 or 256 bits are supported. -#endif - -// Supported block length -#if (ENCRYPTION_BLOCK_LENGTH != 16) - #error Only block length of 128 bits is supported. -#endif - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ -#define BC (ENCRYPTION_BLOCK_LENGTH / 4) -#define SC ((BC - 4) >> 1) -#define KC (ENCRYPTION_KEY_LENGTH / 4) -#define t0f 0x000000FF & tf -#define t1f 0x0000FF00 & tf -#define t2f 0x00FF0000 & tf -#define t3f 0xFF000000 & tf - -#if (KC >= BC) - #define ROUNDS (KC + 6) -#else - #define ROUNDS (BC + 6) -#endif - -#ifdef ONLY_ONE_ENCRYPTION -#define ENCRYPTION_INIT aes_ref_init -#define ENCRYPTION_CLEANUP aes_ref_cleanup -#define ENCRYPTION_DECRYPT aes_ref_decrypt -#endif - -//------------------------------------------------------------------------------ -// Prototypes -//------------------------------------------------------------------------------ -extern void aes_ref_init(void); -extern void aes_ref_init_CBC(void); -extern void aes_ref_init_ECB(void); -extern void aes_ref_init_CTR(void); -extern void aes_ref_cleanup(void); -extern int aes_ref_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); -extern int aes_ref_decrypt_CBC(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); -extern int aes_ref_decrypt_ECB(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); -extern int aes_ref_decrypt_CTR(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); - -#endif // defined(USE_ENCRYPTION) && defined(ENCRYPTION_AES_REF) - -#endif // BOOTLOADER_AES_REFERENCE_H - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/encryption.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/encryption.h deleted file mode 100644 index 8b285009..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/encryption.h +++ /dev/null @@ -1,98 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Firmware encryption -/// -/// !Usage -/// -/// This file must include the header of every encryption module implemented for -/// the bootloader. It is also responsible for defining mock functions if no -/// encryption module is selected, as well as checking that parameters are -/// correctly set. -// -/// An encryption module must define the following functions: -/// -# void encryption_init(void); -/// -# void encryption_cleanup(void); -/// -# int encryption_decrypt(const unsigned char *, unsigned char *, unsigned int) -//------------------------------------------------------------------------------ - -#ifndef BOOTLOADER_ENCRYPTION_H -#define BOOTLOADER_ENCRYPTION_H - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ -#include "config.h" - - -//------------------------------------------------------------------------------ -// Check configuration -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -#if !defined(ENCRYPTION_INIT) && !defined(USE_ENCRYPTION) - #define ENCRYPTION_INIT(); - #define ENCRYPTION_CLEANUP(); - #define ENCRYPTION_DECRYPT(...) 1 - -#elif !defined(ENCRYPTION_INIT) && defined(USE_ENCRYPTION) - #error USE_ENCRYPTION defined but no encryption method selected. - -#elif !defined(ENCRYPTION_AES_LTC) && \ - !defined(ENCRYPTION_AES_REF) && \ - !defined(ENCRYPTION_AES_HARD) && \ - !defined(ENCRYPTION_3DES_LTC) && \ - !defined(ENCRYPTION_3DES_HARD) - #error No algorithm selected. - -#elif !defined(ENCRYPTION_ECB) && \ - !defined(ENCRYPTION_CBC) && \ - !defined(ENCRYPTION_CTR) - #error No encryption mode selected. - -#elif !defined(ENCRYPTION_KEY) - #error No key defined. - -#elif !defined(ENCRYPTION_KEY_LENGTH) - #error No key length selected. - -#elif !defined(ENCRYPTION_IV) - #error No initialization vector defined. - -#elif !defined(ENCRYPTION_BLOCK_LENGTH) - #error No block length selected. - -#endif -#endif // ONLY_ONE_ENCRYPTION -#endif // BOOTLOADER_ENCRYPTION_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/libtomcrypt.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/libtomcrypt.c deleted file mode 100644 index c21b20c9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/libtomcrypt.c +++ /dev/null @@ -1,445 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Function: Firmware encryption using libTomCrypt -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ - -#include "libtomcrypt.h" -#include -#include -#include "config.h" - -#if defined(USE_ENCRYPTION) && (defined(ENCRYPTION_AES_LTC) || defined(ENCRYPTION_3DES_LTC)) -#include -#include -#include -#include -#include - -//------------------------------------------------------------------------------ -// Global variables -//------------------------------------------------------------------------------ - -#if defined(ENCRYPTION_ECB) - symmetric_ECB sECB; -#endif -#if defined(ENCRYPTION_CBC) - symmetric_CBC sCBC; -#endif -#if defined(ENCRYPTION_CTR) - symmetric_CTR sCTR; -#endif - -//------------------------------------------------------------------------------ -// Inline functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Converts an ASCII string to an hexadecimal value -/// \param ASCII string to convert -/// \param Buffer to store converted value -/// \param Length of buffer -//------------------------------------------------------------------------------ -static inline void ASCII2Hex(const char * ascii, unsigned char * binary, unsigned int length) -{ - unsigned int i; - - for (i=0; i < length; i++) { - if (ascii[i*2] >= 'A') { - binary[i] = ascii[i*2] - 'A' + 10; - } - else { - binary[i] = ascii[i*2] - '0'; - } - binary[i] <<= 4; - if (ascii[i*2+1] >= 'A') { - binary[i] += ascii[i*2+1] - 'A' + 10; - } - else { - binary[i] += ascii[i*2+1] - '0'; - } - } -} - -//------------------------------------------------------------------------------ -// Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Initializes the decryption process -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -void ltc_init(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - -#if defined(ENCRYPTION_CTR) || defined(ENCRYPTION_CBC) - unsigned char IV[ENCRYPTION_BLOCK_LENGTH]; -#endif - - TRACE_DEBUG("LTC: Initializing ...\n\r"); - - // Register cipher - register_cipher(&CIPHER_DESC); - cipherID = find_cipher(CIPHER_NAME); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - -#if defined(ENCRYPTION_CTR) || defined(ENCRYPTION_CBC) - // Load IV - ASCII2Hex(ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); -#endif - - // Start decryption mode -#if defined(ENCRYPTION_ECB) - ecb_start(cipherID, key, ENCRYPTION_KEY_LENGTH, 0, &sECB); -#elif defined(ENCRYPTION_CBC) - cbc_start(cipherID, IV, key, ENCRYPTION_KEY_LENGTH, 0, &sCBC); -#elif defined(ENCRYPTION_CTR) - ctr_start(cipherID, IV, key, ENCRYPTION_KEY_LENGTH, 0, CTR_COUNTER_BIG_ENDIAN, &sCTR); -#endif - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif // ONLY_ONE_ENCRYPTION - -//------------------------------------------------------------------------------ -/// Initializes the decryption process for AES, mode CBC -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -#if defined(ENCRYPTION_CBC) -void ltc_init_AES_CBC(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - unsigned char IV[ENCRYPTION_BLOCK_LENGTH]; - - TRACE_DEBUG("LTC: Initializing CBC...\n\r"); - - // Register cipher - register_cipher(&rijndael_desc); - cipherID = find_cipher("rijndael"); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - // Load IV - ASCII2Hex(ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - // Start decryption mode - cbc_start(cipherID, IV, key, ENCRYPTION_KEY_LENGTH, 0, &sCBC); - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the decryption process for AES, mode CTR -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -void ltc_init_AES_CTR(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - unsigned char IV[ENCRYPTION_BLOCK_LENGTH]; - - TRACE_DEBUG("LTC: Initializing CTR...\n\r"); - - // Register cipher - register_cipher(&rijndael_desc); - cipherID = find_cipher("rijndael"); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - // Load IV - ASCII2Hex(ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - // Start decryption mode - ctr_start(cipherID, IV, key, ENCRYPTION_KEY_LENGTH, 0, CTR_COUNTER_BIG_ENDIAN, &sCTR); - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the decryption process for AES, mode ECB -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -void ltc_init_AES_ECB(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - - TRACE_DEBUG("LTC: Initializing ECB...\n\r"); - - // Register cipher - register_cipher(&rijndael_desc); - cipherID = find_cipher("rijndael"); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - // Start decryption mode - ecb_start(cipherID, key, ENCRYPTION_KEY_LENGTH, 0, &sECB); - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the decryption process for 3DES, mode CBC -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CBC) -void ltc_init_3DES_CBC(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - unsigned char IV[ENCRYPTION_BLOCK_LENGTH]; - - TRACE_DEBUG("LTC: Initializing CBC...\n\r"); - - // Register cipher - register_cipher(&des3_desc); - cipherID = find_cipher("3des"); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - // Load IV - ASCII2Hex(ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - // Start decryption mode - cbc_start(cipherID, IV, key, ENCRYPTION_KEY_LENGTH, 0, &sCBC); - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the decryption process for 3DES, mode CTR -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -void ltc_init_3DES_CTR(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - unsigned char IV[ENCRYPTION_BLOCK_LENGTH]; - - TRACE_DEBUG("LTC: Initializing CTR...\n\r"); - - // Register cipher - register_cipher(&des3_desc); - cipherID = find_cipher("3des"); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - // Load IV - ASCII2Hex(ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - // Start decryption mode - ctr_start(cipherID, IV, key, ENCRYPTION_KEY_LENGTH, 0, CTR_COUNTER_BIG_ENDIAN, &sCTR); - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the decryption process for 3DES, mode ECB -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -void ltc_init_3DES_ECB(void) -{ - int cipherID; - unsigned char key[ENCRYPTION_KEY_LENGTH]; - - TRACE_DEBUG("LTC: Initializing ECB...\n\r"); - - // Register cipher - register_cipher(&des3_desc); - cipherID = find_cipher("3des"); - - // Load key - ASCII2Hex(ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - // Start decryption mode - ecb_start(cipherID, key, ENCRYPTION_KEY_LENGTH, 0, &sECB); - - TRACE_DEBUG("LTC: Initialization done.\n\r"); -} -#endif -#endif // ONLY_ONE_ENCRYPTION - - -//------------------------------------------------------------------------------ -/// Terminates the decryption process -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -void ltc_cleanup(void) -{ - TRACE_DEBUG("LTC: Cleaning up ...\n\r"); - -#if defined(ENCRYPTION_ECB) - ecb_done(&sECB); -#elif defined(ENCRYPTION_CBC) - cbc_done(&sCBC); -#elif defined(ENCRYPTION_CTR) - ctr_done(&sCTR); -#endif - - TRACE_DEBUG("LTC: Cleanup done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Terminates the decryption process for mode CBC -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -#if defined(ENCRYPTION_CBC) -void ltc_cleanup_CBC(void) -{ - TRACE_DEBUG("LTC: Cleaning up CBC...\n\r"); - cbc_done(&sCBC); - TRACE_DEBUG("LTC: Cleanup done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Terminates the decryption process for mode CTR -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_CTR) -void ltc_cleanup_CTR(void) -{ - TRACE_DEBUG("LTC: Cleaning up CTR...\n\r"); - ctr_done(&sCTR); - TRACE_DEBUG("LTC: Cleanup done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Terminates the decryption process for mode ECB -//------------------------------------------------------------------------------ -#if defined(ENCRYPTION_ECB) -void ltc_cleanup_ECB(void) -{ - TRACE_DEBUG("LTC: Cleaning up ECB...\n\r"); - ecb_done(&sECB); - TRACE_DEBUG("LTC: Cleanup done.\n\r"); -} -#endif -#endif // ONLY_ONE_ENCRYPTION - -//------------------------------------------------------------------------------ -/// Decrypts a block of data -/// \param Data to decrypt -/// \param Buffer to store decrypted data -/// \param Length of data -/// \return 1 if successful, 0 otherwise. -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -int ltc_decrypt(const unsigned char * cipherText, unsigned char * plainText, unsigned int length) -{ -#if defined(ENCRYPTION_ECB) - if (ecb_decrypt(cipherText, plainText, length, &sECB) != CRYPT_OK) { -#elif defined(ENCRYPTION_CBC) - if (cbc_decrypt(cipherText, plainText, length, &sCBC) != CRYPT_OK) { -#elif defined(ENCRYPTION_CTR) - if (ctr_decrypt(cipherText, plainText, length, &sCTR) != CRYPT_OK) { -#endif - return 0; - } - else { - return 1; - } -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a block of data in CBC mode -/// \param Data to decrypt -/// \param Buffer to store decrypted data -/// \param Length of data -/// \return 1 if successful, 0 otherwise. -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -int ltc_decrypt_CBC(const unsigned char * cipherText, unsigned char * plainText, unsigned int length) -{ - if (cbc_decrypt(cipherText, plainText, length, &sCBC) != CRYPT_OK) { - return 0; - } - else { - return 1; - } -} - -//------------------------------------------------------------------------------ -/// Decrypts a block of data in CTR mode -/// \param Data to decrypt -/// \param Buffer to store decrypted data -/// \param Length of data -/// \return 1 if successful, 0 otherwise. -//------------------------------------------------------------------------------ -int ltc_decrypt_CTR(const unsigned char * cipherText, unsigned char * plainText, unsigned int length) -{ - if (ctr_decrypt(cipherText, plainText, length, &sCTR) != CRYPT_OK) { - return 0; - } - else { - return 1; - } -} - -//------------------------------------------------------------------------------ -/// Decrypts a block of data in ECB mode -/// \param Data to decrypt -/// \param Buffer to store decrypted data -/// \param Length of data -/// \return 1 if successful, 0 otherwise. -//------------------------------------------------------------------------------ -int ltc_decrypt_ECB(const unsigned char * cipherText, unsigned char * plainText, unsigned int length) -{ - if (ecb_decrypt(cipherText, plainText, length, &sECB) != CRYPT_OK) { - return 0; - } - else { - return 1; - } -} -#endif // ONLY_ONE_ENCRYPTION - -#endif // defined(USE_ENCRYPTION) && (defined(ENCRYPTION_AES_LTC) || defined(ENCRYPTION_3DES_LTC)) - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/libtomcrypt.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/libtomcrypt.h deleted file mode 100644 index 317b79f2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/libtomcrypt.h +++ /dev/null @@ -1,149 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Firmware encryption using libTomCrypt -/// -/// !Usage -/// -/// -# ltc_init: Initialize LibTomCrypt -/// -# ltc_init_AES_CBC -/// -# ltc_init_AES_CTR -/// -# ltc_init_AES_ECB -/// -# ltc_init_3DES_CBC -/// -# ltc_init_3DES_CTR -/// -# ltc_init_3DES_ECB -/// -# ltc_cleanup -/// -# ltc_cleanup_CBC -/// -# ltc_cleanup_CTR -/// -# ltc_cleanup_ECB -/// -# ltc_decrypt -/// -# ltc_decrypt_CBC -/// -# ltc_decrypt_CTR -/// -# ltc_decrypt_ECB -//------------------------------------------------------------------------------ - -#ifndef BOOTLOADER_LIBTOMCRYPT_H -#define BOOTLOADER_LIBTOMCRYPT_H - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ - -#include "config.h" - -#if defined(USE_ENCRYPTION) && (defined(ENCRYPTION_AES_LTC) || defined(ENCRYPTION_3DES_LTC)) - -//------------------------------------------------------------------------------ -// Check configuration -//------------------------------------------------------------------------------ - -// Supported modes -#if !defined(ENCRYPTION_CTR) && \ - !defined(ENCRYPTION_CBC) && \ - !defined(ENCRYPTION_ECB) - #error No other mode than ECB, CBC & CTR are supported. -#endif - -// Supported key length -#if defined(ENCRYPTION_AES_LTC) - #if (ENCRYPTION_KEY_LENGTH != 16) && \ - (ENCRYPTION_KEY_LENGTH != 24) && \ - (ENCRYPTION_KEY_LENGTH != 32) - #error Only a key length of 128, 192 or 256 bits are supported with AES. - #endif -#elif defined(ENCRYPTION_3DES_LTC) - #if (ENCRYPTION_KEY_LENGTH != 16) && \ - (ENCRYPTION_KEY_LENGTH != 24) - #error Only a key length of 128 or 192 bits are supported with Triple-DES. - #endif -#endif - -// Supported block length -#if defined(ENCRYPTION_AES_LTC) - #if (ENCRYPTION_BLOCK_LENGTH != 16) - #error Only a block length of 128 bits is supported with AES. - #endif -#elif defined(ENCRYPTION_3DES_LTC) - #if (ENCRYPTION_BLOCK_LENGTH != 8) - #error Only a block length of 64 bits is supported with Triple-DES. - #endif -#endif - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ - -// Functions -#ifdef ONLY_ONE_ENCRYPTION -#define ENCRYPTION_INIT ltc_init -#define ENCRYPTION_CLEANUP ltc_cleanup -#define ENCRYPTION_DECRYPT ltc_decrypt - -#if defined(ENCRYPTION_AES_LTC) - #define CIPHER_NAME "rijndael" - #define CIPHER_DESC rijndael_desc -#elif defined(ENCRYPTION_3DES_LTC) - #define CIPHER_NAME "3des" - #define CIPHER_DESC des3_desc -#endif -#endif - -//------------------------------------------------------------------------------ -// Prototypes -//------------------------------------------------------------------------------ - -#ifdef ONLY_ONE_ENCRYPTION -extern void ltc_init(void); -#endif -extern void ltc_init_AES_CBC(void); -extern void ltc_init_AES_CTR(void); -extern void ltc_init_AES_ECB(void); -extern void ltc_init_3DES_CBC(void); -extern void ltc_init_3DES_CTR(void); -extern void ltc_init_3DES_ECB(void); - -extern void ltc_cleanup(void); -extern void ltc_cleanup_CBC(void); -extern void ltc_cleanup_CTR(void); -extern void ltc_cleanup_ECB(void); - -extern int ltc_decrypt(const unsigned char * cipherText, unsigned char * plainText, unsigned int length); -extern int ltc_decrypt_CBC(const unsigned char * cipherText, unsigned char * plainText, unsigned int length); -extern int ltc_decrypt_CTR(const unsigned char * cipherText, unsigned char * plainText, unsigned int length); -extern int ltc_decrypt_ECB(const unsigned char * cipherText, unsigned char * plainText, unsigned int length); - -#endif // defined(USE_ENCRYPTION) && (defined(ENCRYPTION_AES_LTC) || defined(ENCRYPTION_3DES_LTC)) -#endif // BOOTLOADER_AES_LIBTOMCRYPT_H - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/tdes_hardware.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/tdes_hardware.c deleted file mode 100644 index 7b570103..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/tdes_hardware.c +++ /dev/null @@ -1,520 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Function: Firmware encryption using TDES hardware acceleration -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ - -#include "tdes_hardware.h" - -#if defined(USE_ENCRYPTION) && defined(ENCRYPTION_3DES_HARD) -#include -#include -#include -#include -#include -#include - -//------------------------------------------------------------------------------ -// Global variables -//------------------------------------------------------------------------------ - -#ifdef ENCRYPTION_CTR - unsigned char CTR[ENCRYPTION_BLOCK_LENGTH]; -#endif - -//------------------------------------------------------------------------------ -// Inline functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Converts an ASCII value to an hexadecimal one -/// \param ASCII string -/// \param Buffer to store integer value -/// \param Length of string -//------------------------------------------------------------------------------ -static inline void ASCII2Hex(const unsigned char * ascii, unsigned char * binary, unsigned int length) -{ - unsigned int i; - - for (i=0; i < length; i++) { - if (ascii[i*2] >= 'A') { - binary[i] = ascii[i*2] - 'A' + 10; - } - else { - binary[i] = ascii[i*2] - '0'; - } - binary[i] <<= 4; - if (ascii[i*2+1] >= 'A') { - binary[i] += ascii[i*2+1] - 'A' + 10; - } - else { - binary[i] += ascii[i*2+1] - '0'; - } - } -} -//------------------------------------------------------------------------------ -// Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Initializes the TDES peripheral -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -void tdes_hard_init(void) -{ - unsigned char key[ENCRYPTION_KEY_LENGTH]; - - TRACE_DEBUG("TDES/HARD: Initializing ...\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES/TDES undefined -#endif - - // Load mode -#if (ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | TDES_MODE - | AT91C_TDES_TDESMOD | TDES_CIPHER; -#else - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | TDES_MODE | AT91C_TDES_KEYMOD - | AT91C_TDES_TDESMOD | TDES_CIPHER; -#endif - - // Convert and load key - ASCII2Hex((unsigned char*)ENCRYPTION_KEY, key, ENCRYPTION_KEY_LENGTH); - - AT91C_BASE_TDES->TDES_KEY1WxR[0] = ((int *) key)[0]; - AT91C_BASE_TDES->TDES_KEY1WxR[1] = ((int *) key)[1]; - AT91C_BASE_TDES->TDES_KEY2WxR[0] = ((int *) key)[2]; - AT91C_BASE_TDES->TDES_KEY2WxR[1] = ((int *) key)[3]; - -#if (ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_KEY3WxR[0] = ((int *) key)[4]; - AT91C_BASE_TDES->TDES_KEY3WxR[1] = ((int *) key)[5]; -#endif - -#if defined(ENCRYPTION_CBC) - unsigned char IV[8]; - ASCII2Hex((unsigned char*)ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - AT91C_BASE_TDES->TDES_IVxR[0] = ((int *) IV)[0]; - AT91C_BASE_TDES->TDES_IVxR[1] = ((int *) IV)[1]; - -#elif defined(ENCRYPTION_CTR) - // Convert IV - ASCII2Hex((unsigned char*)ENCRYPTION_IV, CTR, ENCRYPTION_BLOCK_LENGTH); -#endif - - TRACE_DEBUG("TDES/HARD: Initialization done.\n\r"); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the DES peripheral for CBC mode -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -void tdes_hard_init_CBC(void) -{ - unsigned char key[TDES_ENCRYPTION_KEY_LENGTH]; - - TRACE_DEBUG("tdes_hard_init_CBC\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode -#if (TDES_ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | AT91C_TDES_OPMOD_CBC - | AT91C_TDES_TDESMOD | 0; -#else - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | AT91C_TDES_OPMOD_CBC | AT91C_TDES_KEYMOD - | AT91C_TDES_TDESMOD | 0; -#endif - - // Convert and load key - ASCII2Hex((unsigned char*)TDES_ENCRYPTION_KEY, key, TDES_ENCRYPTION_KEY_LENGTH); - - AT91C_BASE_TDES->TDES_KEY1WxR[0] = ((int *) key)[0]; - AT91C_BASE_TDES->TDES_KEY1WxR[1] = ((int *) key)[1]; - AT91C_BASE_TDES->TDES_KEY2WxR[0] = ((int *) key)[2]; - AT91C_BASE_TDES->TDES_KEY2WxR[1] = ((int *) key)[3]; - -#if (TDES_ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_KEY3WxR[0] = ((int *) key)[4]; - AT91C_BASE_TDES->TDES_KEY3WxR[1] = ((int *) key)[5]; -#endif - - unsigned char IV[8]; - ASCII2Hex((unsigned char*)ENCRYPTION_IV, IV, ENCRYPTION_BLOCK_LENGTH); - - AT91C_BASE_TDES->TDES_IVxR[0] = ((int *) IV)[0]; - AT91C_BASE_TDES->TDES_IVxR[1] = ((int *) IV)[1]; -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the DES peripheral for CTR mode -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -void tdes_hard_init_CTR(void) -{ - unsigned char key[TDES_ENCRYPTION_KEY_LENGTH]; - - TRACE_DEBUG("tdes_hard_init_CTR\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode -#if (TDES_ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | AT91C_TDES_OPMOD_ECB - | AT91C_TDES_TDESMOD | AT91C_TDES_CIPHER; -#else - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | AT91C_TDES_OPMOD_ECB | AT91C_TDES_KEYMOD - | AT91C_TDES_TDESMOD | AT91C_TDES_CIPHER; -#endif - - // Convert and load key - ASCII2Hex((unsigned char*)TDES_ENCRYPTION_KEY, key, TDES_ENCRYPTION_KEY_LENGTH); - - AT91C_BASE_TDES->TDES_KEY1WxR[0] = ((int *) key)[0]; - AT91C_BASE_TDES->TDES_KEY1WxR[1] = ((int *) key)[1]; - AT91C_BASE_TDES->TDES_KEY2WxR[0] = ((int *) key)[2]; - AT91C_BASE_TDES->TDES_KEY2WxR[1] = ((int *) key)[3]; - -#if (TDES_ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_KEY3WxR[0] = ((int *) key)[4]; - AT91C_BASE_TDES->TDES_KEY3WxR[1] = ((int *) key)[5]; -#endif - - // Convert IV - ASCII2Hex((unsigned char*)ENCRYPTION_IV, CTR, ENCRYPTION_BLOCK_LENGTH); -} -#endif - -//------------------------------------------------------------------------------ -/// Initializes the DES peripheral for ECB mode -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -void tdes_hard_init_ECB(void) -{ - unsigned char key[TDES_ENCRYPTION_KEY_LENGTH]; - - TRACE_DEBUG("tdes_hard_init_ECB\n\r"); - - // Activate peripheral clock -#ifdef AT91C_ID_AES - PMC_EnablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_EnablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_EnablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - - // Load mode -#if (TDES_ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | AT91C_TDES_OPMOD_ECB - | AT91C_TDES_TDESMOD | 0; -#else - AT91C_BASE_TDES->TDES_MR = AT91C_TDES_SMOD_MANUAL | AT91C_TDES_OPMOD_ECB | AT91C_TDES_KEYMOD - | AT91C_TDES_TDESMOD | 0; -#endif - - // Convert and load key - ASCII2Hex((unsigned char*)TDES_ENCRYPTION_KEY, key, TDES_ENCRYPTION_KEY_LENGTH); - - AT91C_BASE_TDES->TDES_KEY1WxR[0] = ((int *) key)[0]; - AT91C_BASE_TDES->TDES_KEY1WxR[1] = ((int *) key)[1]; - AT91C_BASE_TDES->TDES_KEY2WxR[0] = ((int *) key)[2]; - AT91C_BASE_TDES->TDES_KEY2WxR[1] = ((int *) key)[3]; - -#if (TDES_ENCRYPTION_KEY_LENGTH == 24) - AT91C_BASE_TDES->TDES_KEY3WxR[0] = ((int *) key)[4]; - AT91C_BASE_TDES->TDES_KEY3WxR[1] = ((int *) key)[5]; -#endif -} -#endif - -//------------------------------------------------------------------------------ -/// Cleans up the DES peripheral -//------------------------------------------------------------------------------ -void tdes_hard_cleanup(void) -{ - TRACE_DEBUG("TDES/HARD: Cleaning up ...\n\r"); - AT91C_BASE_TDES->TDES_MR = 0; -#ifdef AT91C_ID_AES - PMC_DisablePeripheral( AT91C_ID_AES ); -#elif AT91C_ID_AESTDES - PMC_DisablePeripheral( AT91C_ID_AESTDES ); -#elif AT91C_ID_TDES - PMC_DisablePeripheral( AT91C_ID_TDES ); -#else -#error AES undefined -#endif - TRACE_DEBUG("TDES/HARD: Cleanup done.\n\r"); -} - -//------------------------------------------------------------------------------ -/// Decrypts a variable-length cipher text -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -int tdes_hard_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - unsigned int l; - - TRACE_DEBUG("tdes_hard_decrypt\n\r"); - -#if defined(ENCRYPTION_ECB) || defined(ENCRYPTION_CBC) - for (l=0; l < length;) { - - // Load counter and encrypt it - AT91C_BASE_TDES->TDES_IDATAxR[0] = ((int *) &cipherText[l])[0]; - AT91C_BASE_TDES->TDES_IDATAxR[1] = ((int *) &cipherText[l])[1]; - - // Start processing - AT91C_BASE_TDES->TDES_CR = AT91C_TDES_START; - - while (!((AT91C_BASE_TDES->TDES_ISR) & AT91C_TDES_DATRDY)); - - ((int *) &plainText[l])[0] = AT91C_BASE_TDES->TDES_ODATAxR[0]; - ((int *) &plainText[l])[1] = AT91C_BASE_TDES->TDES_ODATAxR[1]; - - l += ENCRYPTION_BLOCK_LENGTH; - } - -#elif defined(ENCRYPTION_CTR) - unsigned int bytes; - unsigned char block[ENCRYPTION_BLOCK_LENGTH]; - unsigned int e; - unsigned int i; - int k; - - // Decrypt - for (e=0; e < length;) { - - // Load counter and encrypt it - AT91C_BASE_TDES->TDES_IDATAxR[0] = ((int *) CTR)[0]; - AT91C_BASE_TDES->TDES_IDATAxR[1] = ((int *) CTR)[1]; - - AT91C_BASE_TDES->TDES_CR = AT91C_TDES_START; - while (!(AT91C_BASE_TDES->TDES_ISR & AT91C_TDES_DATRDY)); - - ((int *) block)[0] = AT91C_BASE_TDES->TDES_ODATAxR[0]; - ((int *) block)[1] = AT91C_BASE_TDES->TDES_ODATAxR[1]; - - // XOR current plain text block with encrypted counter - if ((length-e) < ENCRYPTION_BLOCK_LENGTH) { - bytes = length - e; - } - else { - bytes = ENCRYPTION_BLOCK_LENGTH; - } - - for (i=0; i < bytes; i++) { - plainText[e+i] = cipherText[e+i] ^ ((char *) block)[i]; - } - - // Increment counter (big-endian) and number of encrypted bytes - for (k=ENCRYPTION_BLOCK_LENGTH-1; k >= 0; k--) { - if (++((char *) CTR)[k] != 0) { - break; - } - } - e += bytes; - } -#endif // ENCRYPTION_CTR - - return 1; -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a variable-length cipher text for CBC mode -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -int tdes_hard_decrypt_CBC(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - unsigned int l; - - TRACE_DEBUG("tdes_hard_decrypt_CBC\n\r"); - - for (l=0; l < length;) { - // Load counter and encrypt it - AT91C_BASE_TDES->TDES_IDATAxR[0] = ((int *) &cipherText[l])[0]; - AT91C_BASE_TDES->TDES_IDATAxR[1] = ((int *) &cipherText[l])[1]; - - // Start processing - AT91C_BASE_TDES->TDES_CR = AT91C_TDES_START; - - while (!((AT91C_BASE_TDES->TDES_ISR) & AT91C_TDES_DATRDY)); - - ((int *) &plainText[l])[0] = AT91C_BASE_TDES->TDES_ODATAxR[0]; - ((int *) &plainText[l])[1] = AT91C_BASE_TDES->TDES_ODATAxR[1]; - - l += ENCRYPTION_BLOCK_LENGTH; - } - return 1; -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a variable-length cipher text for CTR mode -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -int tdes_hard_decrypt_CTR(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - unsigned int bytes; - unsigned char block[ENCRYPTION_BLOCK_LENGTH]; - unsigned int e; - unsigned int i; - int k; - - TRACE_DEBUG("tdes_hard_decrypt_CTR\n\r"); - - // Decrypt - for (e=0; e < length;) { - - // Load counter and encrypt it - AT91C_BASE_TDES->TDES_IDATAxR[0] = ((int *) CTR)[0]; - AT91C_BASE_TDES->TDES_IDATAxR[1] = ((int *) CTR)[1]; - - AT91C_BASE_TDES->TDES_CR = AT91C_TDES_START; - while (!(AT91C_BASE_TDES->TDES_ISR & AT91C_TDES_DATRDY)); - - ((int *) block)[0] = AT91C_BASE_TDES->TDES_ODATAxR[0]; - ((int *) block)[1] = AT91C_BASE_TDES->TDES_ODATAxR[1]; - - // XOR current plain text block with encrypted counter - if ((length-e) < ENCRYPTION_BLOCK_LENGTH) { - bytes = length - e; - } - else { - bytes = ENCRYPTION_BLOCK_LENGTH; - } - - for (i=0; i < bytes; i++) { - plainText[e+i] = cipherText[e+i] ^ ((char *) block)[i]; - } - - // Increment counter (big-endian) and number of encrypted bytes - for (k=ENCRYPTION_BLOCK_LENGTH-1; k >= 0; k--) { - if (++((char *) CTR)[k] != 0) { - break; - } - } - e += bytes; - } - - return 1; -} -#endif - -//------------------------------------------------------------------------------ -/// Decrypts a variable-length cipher text for ECB mode -/// \param Cipher text to decrypt -/// \param Buffer to store plain text -/// \param Length of cipher text (in bytes) -//------------------------------------------------------------------------------ -#ifndef ONLY_ONE_ENCRYPTION -int tdes_hard_decrypt_ECB(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length) -{ - unsigned int l; - - TRACE_DEBUG("tdes_hard_decrypt_ECB\n\r"); - - for (l=0; l < length;) { - - // Load counter and encrypt it - AT91C_BASE_TDES->TDES_IDATAxR[0] = ((int *) &cipherText[l])[0]; - AT91C_BASE_TDES->TDES_IDATAxR[1] = ((int *) &cipherText[l])[1]; - - // Start processing - AT91C_BASE_TDES->TDES_CR = AT91C_TDES_START; - - while (!((AT91C_BASE_TDES->TDES_ISR) & AT91C_TDES_DATRDY)); - - ((int *) &plainText[l])[0] = AT91C_BASE_TDES->TDES_ODATAxR[0]; - ((int *) &plainText[l])[1] = AT91C_BASE_TDES->TDES_ODATAxR[1]; - - l += ENCRYPTION_BLOCK_LENGTH; - } - return 1; -} -#endif - -#endif // defined(USE_ENCRYPTION) && defined(ENCRYPTION_3DES_HARD) - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/tdes_hardware.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/tdes_hardware.h deleted file mode 100644 index 28fb774b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/encryption/tdes_hardware.h +++ /dev/null @@ -1,125 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Firmware encryption using TDES hardware acceleration -/// -/// !Usage -/// -/// -# tdes_hard_init: Initialize TDES hardware -/// -# tdes_hard_init_CBC: for the CBC mode -/// -# tdes_hard_init_ECB: for the CTR mode -/// -# tdes_hard_init_CTR: for the ECB mode -/// -# tdes_hard_cleanup: Cleans up DES -/// -# tdes_hard_decrypt: Decrypts a variable-length cipher text -/// -# tdes_hard_decrypt_CBC: for CBC mode -/// -# tdes_hard_decrypt_ECB: for ECB mode -/// -# tdes_hard_decrypt_CTR: for CTR mode -//------------------------------------------------------------------------------ -#ifndef BOOTLOADER_TDES_HARDWARE_H -#define BOOTLOADER_TDES_HARDWARE_H - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ - -#include "config.h" - -#if defined(USE_ENCRYPTION) && defined(ENCRYPTION_3DES_HARD) - -//------------------------------------------------------------------------------ -// Check configuration -//------------------------------------------------------------------------------ - -#ifdef ONLY_ONE_ENCRYPTION -#if (ENCRYPTION_KEY_LENGTH != 16) && (ENCRYPTION_KEY_LENGTH != 24) - #error Triple-DES hardware acceleration only supports 128 and 192 bits keys. -#endif - -#if (ENCRYPTION_BLOCK_LENGTH != 8) - #error Triple-DES hardware acceleration only supports 64 bits blocks. -#endif - -#if !defined(ENCRYPTION_ECB) && \ - !defined(ENCRYPTION_CBC) && \ - !defined(ENCRYPTION_CTR) - #error Only ECB, CBC & CTR mode are supported. -#endif - -//------------------------------------------------------------------------------ -// Definitions -//------------------------------------------------------------------------------ -#define ENCRYPTION_INIT tdes_hard_init -#define ENCRYPTION_CLEANUP tdes_hard_cleanup -#define ENCRYPTION_DECRYPT tdes_hard_decrypt - -#if defined(ENCRYPTION_ECB) - #define TDES_MODE AT91C_TDES_OPMOD_ECB - #define TDES_CIPHER 0 -#elif defined(ENCRYPTION_CBC) - #define TDES_MODE AT91C_TDES_OPMOD_CBC - #define TDES_CIPHER 0 -#elif defined(ENCRYPTION_CTR) - #define TDES_MODE AT91C_TDES_OPMOD_ECB - #define TDES_CIPHER AT91C_TDES_CIPHER -#endif - -#endif // ONLY_ONE_ENCRYPTION - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ -#ifdef ONLY_ONE_ENCRYPTION -extern void tdes_hard_init(void); -#endif -extern void tdes_hard_init_CBC(void); -extern void tdes_hard_init_CTR(void); -extern void tdes_hard_init_ECB(void); -extern void tdes_hard_cleanup(void); -extern int tdes_hard_decrypt(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); -extern int tdes_hard_decrypt_CBC(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); -extern int tdes_hard_decrypt_CTR(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); -extern int tdes_hard_decrypt_ECB(const unsigned char * cipherText, - unsigned char * plainText, - unsigned int length); - - -#endif // defined(USE_ENCRYPTION) && defined(ENCRYPTION_3DES_HARD) -#endif // BOOTLOADER_DES_HARDWARE_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/hamming.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/hamming.c deleted file mode 100644 index 2b1b8905..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/hamming.c +++ /dev/null @@ -1,335 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "hamming.h" -#include -#include - -//------------------------------------------------------------------------------ -// Internal function -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Counts and return the number of bits set to '1' in the given byte. -/// \param byte Byte to count. -//------------------------------------------------------------------------------ -static unsigned char CountBitsInByte(unsigned char byte) -{ - unsigned char count = 0; - while (byte > 0) { - - if (byte & 1) { - - count++; - } - byte >>= 1; - } - - return count; -} - -//------------------------------------------------------------------------------ -/// Counts and return the number of bits set to '1' in the given hamming code. -/// \param code Hamming code. -//------------------------------------------------------------------------------ -static unsigned char CountBitsInCode256(unsigned char *code) -{ - return CountBitsInByte(code[0]) - + CountBitsInByte(code[1]) - + CountBitsInByte(code[2]); -} - -//------------------------------------------------------------------------------ -/// Calculates the 22-bit hamming code for a 256-bytes block of data. -/// \param data Data buffer to calculate code for. -/// \param code Pointer to a buffer where the code should be stored. -//------------------------------------------------------------------------------ -static void Compute256(const unsigned char *data, unsigned char *code) -{ - unsigned int i; - unsigned char columnSum = 0; - unsigned char evenLineCode = 0; - unsigned char oddLineCode = 0; - unsigned char evenColumnCode = 0; - unsigned char oddColumnCode = 0; - - // Xor all bytes together to get the column sum; - // At the same time, calculate the even and odd line codes - for (i=0; i < 256; i++) { - - columnSum ^= data[i]; - - // If the xor sum of the byte is 0, then this byte has no incidence on - // the computed code; so check if the sum is 1. - if ((CountBitsInByte(data[i]) & 1) == 1) { - - // Parity groups are formed by forcing a particular index bit to 0 - // (even) or 1 (odd). - // Example on one byte: - // - // bits (dec) 7 6 5 4 3 2 1 0 - // (bin) 111 110 101 100 011 010 001 000 - // '---'---'---'----------. - // | - // groups P4' ooooooooooooooo eeeeeeeeeeeeeee P4 | - // P2' ooooooo eeeeeee ooooooo eeeeeee P2 | - // P1' ooo eee ooo eee ooo eee ooo eee P1 | - // | - // We can see that: | - // - P4 -> bit 2 of index is 0 --------------------' - // - P4' -> bit 2 of index is 1. - // - P2 -> bit 1 of index if 0. - // - etc... - // We deduce that a bit position has an impact on all even Px if - // the log2(x)nth bit of its index is 0 - // ex: log2(4) = 2, bit2 of the index must be 0 (-> 0 1 2 3) - // and on all odd Px' if the log2(x)nth bit of its index is 1 - // ex: log2(2) = 1, bit1 of the index must be 1 (-> 0 1 4 5) - // - // As such, we calculate all the possible Px and Px' values at the - // same time in two variables, evenLineCode and oddLineCode, such as - // evenLineCode bits: P128 P64 P32 P16 P8 P4 P2 P1 - // oddLineCode bits: P128' P64' P32' P16' P8' P4' P2' P1' - // - evenLineCode ^= (255 - i); - oddLineCode ^= i; - } - } - - // At this point, we have the line parities, and the column sum. First, We - // must caculate the parity group values on the column sum. - for (i=0; i < 8; i++) { - - if (columnSum & 1) { - - evenColumnCode ^= (7 - i); - oddColumnCode ^= i; - } - columnSum >>= 1; - } - - // Now, we must interleave the parity values, to obtain the following layout: - // Code[0] = Line1 - // Code[1] = Line2 - // Code[2] = Column - // Line = Px' Px P(x-1)- P(x-1) ... - // Column = P4' P4 P2' P2 P1' P1 PadBit PadBit - code[0] = 0; - code[1] = 0; - code[2] = 0; - - for (i=0; i < 4; i++) { - - code[0] <<= 2; - code[1] <<= 2; - code[2] <<= 2; - - // Line 1 - if ((oddLineCode & 0x80) != 0) { - - code[0] |= 2; - } - if ((evenLineCode & 0x80) != 0) { - - code[0] |= 1; - } - - // Line 2 - if ((oddLineCode & 0x08) != 0) { - - code[1] |= 2; - } - if ((evenLineCode & 0x08) != 0) { - - code[1] |= 1; - } - - // Column - if ((oddColumnCode & 0x04) != 0) { - - code[2] |= 2; - } - if ((evenColumnCode & 0x04) != 0) { - - code[2] |= 1; - } - - oddLineCode <<= 1; - evenLineCode <<= 1; - oddColumnCode <<= 1; - evenColumnCode <<= 1; - } - - // Invert codes (linux compatibility) - code[0] = ~code[0]; - code[1] = ~code[1]; - code[2] = ~code[2]; - - TRACE_DEBUG("Computed code = %02X %02X %02X\n\r", - code[0], code[1], code[2]); -} - -//------------------------------------------------------------------------------ -/// Verifies and corrects a 256-bytes block of data using the given 22-bits -/// hamming code. -/// Returns 0 if there is no error, otherwise returns a HAMMING_ERROR code. -/// \param data Data buffer to check. -/// \param originalCode Hamming code to use for verifying the data. -//------------------------------------------------------------------------------ -static unsigned char Verify256( - unsigned char *data, - const unsigned char *originalCode) -{ - // Calculate new code - unsigned char computedCode[3]; - unsigned char correctionCode[3]; - Compute256(data, computedCode); - - // Xor both codes together - correctionCode[0] = computedCode[0] ^ originalCode[0]; - correctionCode[1] = computedCode[1] ^ originalCode[1]; - correctionCode[2] = computedCode[2] ^ originalCode[2]; - - TRACE_DEBUG("Correction code = %02X %02X %02X\n\r", - correctionCode[0], correctionCode[1], correctionCode[2]); - - // If all bytes are 0, there is no error - if ((correctionCode[0] == 0) - && (correctionCode[1] == 0) - && (correctionCode[2] == 0)) { - - return 0; - } - // If there is a single bit error, there are 11 bits set to 1 - if (CountBitsInCode256(correctionCode) == 11) { - - // Get byte and bit indexes - unsigned char byte = correctionCode[0] & 0x80; - byte |= (correctionCode[0] << 1) & 0x40; - byte |= (correctionCode[0] << 2) & 0x20; - byte |= (correctionCode[0] << 3) & 0x10; - - byte |= (correctionCode[1] >> 4) & 0x08; - byte |= (correctionCode[1] >> 3) & 0x04; - byte |= (correctionCode[1] >> 2) & 0x02; - byte |= (correctionCode[1] >> 1) & 0x01; - - unsigned char bit = (correctionCode[2] >> 5) & 0x04; - bit |= (correctionCode[2] >> 4) & 0x02; - bit |= (correctionCode[2] >> 3) & 0x01; - - // Correct bit - TRACE_DEBUG("Correcting byte #%d at bit %d\n\r", byte, bit); - data[byte] ^= (1 << bit); - - return Hamming_ERROR_SINGLEBIT; - } - // Check if ECC has been corrupted - if (CountBitsInCode256(correctionCode) == 1) { - - return Hamming_ERROR_ECC; - } - // Otherwise, this is a multi-bit error - else { - - return Hamming_ERROR_MULTIPLEBITS; - } -} - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Computes 3-bytes hamming codes for a data block whose size is multiple of -/// 256 bytes. Each 256 bytes block gets its own code. -/// \param data Data to compute code for. -/// \param size Data size in bytes. -/// \param code Codes buffer. -//------------------------------------------------------------------------------ -void Hamming_Compute256x( - const unsigned char *data, - unsigned int size, - unsigned char *code) -{ - TRACE_DEBUG("Hamming_Compute256x()\n\r"); - - while (size > 0) { - - Compute256(data, code); - data += 256; - code += 3; - size -= 256; - } -} - -//------------------------------------------------------------------------------ -/// Verifies 3-bytes hamming codes for a data block whose size is multiple of -/// 256 bytes. Each 256-bytes block is verified with its own code. -/// Returns 0 if the data is correct, Hamming_ERROR_SINGLEBIT if one or more -/// block(s) have had a single bit corrected, or either Hamming_ERROR_ECC -/// or Hamming_ERROR_MULTIPLEBITS. -/// \param data Data buffer to verify. -/// \param size Size of the data in bytes. -/// \param code Original codes. -//------------------------------------------------------------------------------ -unsigned char Hamming_Verify256x( - unsigned char *data, - unsigned int size, - const unsigned char *code) -{ - unsigned char error; - unsigned char result = 0; - - TRACE_DEBUG("Hamming_Verify256x()\n\r"); - - while (size > 0) { - - error = Verify256(data, code); - if (error == Hamming_ERROR_SINGLEBIT) { - - result = Hamming_ERROR_SINGLEBIT; - } - else if (error) { - - return error; - } - - data += 256; - code += 3; - size -= 256; - } - - return result; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/hamming.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/hamming.h deleted file mode 100644 index 6e0125d9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/hamming.h +++ /dev/null @@ -1,72 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef HAMMING_H -#define HAMMING_H - -//------------------------------------------------------------------------------ -// Defines -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// \page "Hamming Code Errors" -/// These are the possible errors when trying to verify a block of data encoded -/// using a Hamming code: -/// -/// !Errors: -/// - Hamming_ERROR_SINGLEBIT -/// - Hamming_ERROR_ECC -/// - Hamming_ERROR_MULTIPLEBITS - -/// A single bit was incorrect but has been recovered. -#define Hamming_ERROR_SINGLEBIT 1 - -/// The original code has been corrupted. -#define Hamming_ERROR_ECC 2 - -/// Multiple bits are incorrect in the data and they cannot be corrected. -#define Hamming_ERROR_MULTIPLEBITS 3 -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -extern void Hamming_Compute256x( - const unsigned char *data, - unsigned int size, - unsigned char *code); - -extern unsigned char Hamming_Verify256x( - unsigned char *data, - unsigned int size, - const unsigned char *code); - -#endif //#ifndef HAMMING_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/iap.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/iap.c deleted file mode 100644 index c4657e22..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/iap.c +++ /dev/null @@ -1,98 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/* - Title: IAP implementation - - About: Purpose - IAP feature is avalaible on ATMEL chip with internal FLASH. This allows - the FLASH memory to be programmed even when the code is also running in - FLASH, without writing some SRAM relocated functions. - The IAP function entry point is written in the 3rd exception vector - (SWI at 0x300008), and is retrieved just by reading the value at this - address. - - ROM function algorithm : - // Send Command - AT91_BASE_MC->MC_FCR = FlashCmd - // Wait Flash is ready - while ((AT91C_BASE_MC->MC_FSR & AT91C_MC_FRDY) != AT91C_MC_FRDY) - return -*/ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "iap.h" -#include -#include - -//------------------------------------------------------------------------------ -// Internal variables -//------------------------------------------------------------------------------ - - - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ -/* - Function: IAP_PerformCmd - Perform a FLASH command through the IAP function. - - Returns: - 0 if the IAP function has executed correctly. - -1 if the IAP feature is not implemented in the ROM code. -*/ -unsigned long IAP_PerformCmd(unsigned long FlashCmd) -{ - // Pointer on IAP function in ROM - static void (*IAP_Function)(unsigned int) = 0; - - if (IAP_Function == 0) { - - IAP_Function = (void (*)(unsigned int)) (*((unsigned int *) IAP_FUNC_ADDR)); - TRACE_DEBUG("IAP_PerformCmd : IAP function address in ROM : 0x%08X\n\r", (unsigned int) IAP_Function); - - /* Check if IAP function is implemented (opcode in SWI != 'b' or 'ldr') */ - if ((((((unsigned long)IAP_Function >> 24) & 0xFF) == 0xEA) || - (((unsigned long)IAP_Function >> 24) & 0xFF) == 0xE5)) { - TRACE_ERROR("IAP_PerformCmd : no IAP function address found in ROM\n\r"); - IAP_Function = 0; - return -1; - } - } - - /* Perform FLASH command */ - IAP_Function(FlashCmd); - - return 0; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/iap.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/iap.h deleted file mode 100644 index 87a6bcd5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/iap.h +++ /dev/null @@ -1,51 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/* - Title: IAP - - About: Purpose - Small function for using IAP feature. - - About: Usage - Perform a FLASH command using . - -*/ - -#ifndef IAP_H -#define IAP_H - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -extern unsigned long IAP_PerformCmd (unsigned long FlashCmd); - -#endif //#ifndef IAP_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/led.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/led.c deleted file mode 100644 index a216b2a0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/led.c +++ /dev/null @@ -1,164 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/// \file - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "led.h" -#include -#include - -//------------------------------------------------------------------------------ -// Local Variables -//------------------------------------------------------------------------------ - -#ifdef PINS_LEDS -static const Pin pinsLeds[] = {PINS_LEDS}; -static const unsigned int numLeds = PIO_LISTSIZE(pinsLeds); -#endif - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Configures the pin associated with the given LED number. If the LED does -/// not exist on the board, the function does nothing. -/// \param led Number of the LED to configure. -/// \return 1 if the LED exists and has been configured; otherwise 0. -//------------------------------------------------------------------------------ -unsigned char LED_Configure(unsigned int led) -{ -#ifdef PINS_LEDS - // Check that LED exists - if (led >= numLeds) { - - return 0; - } - - // Configure LED - return (PIO_Configure(&pinsLeds[led], 1)); -#else - return 0; -#endif -} - -//------------------------------------------------------------------------------ -/// Turns the given LED on if it exists; otherwise does nothing. -/// \param led Number of the LED to turn on. -/// \return 1 if the LED has been turned on; 0 otherwise. -//------------------------------------------------------------------------------ -unsigned char LED_Set(unsigned int led) -{ -#ifdef PINS_LEDS - // Check if LED exists - if (led >= numLeds) { - - return 0; - } - - // Turn LED on - if (pinsLeds[led].type == PIO_OUTPUT_0) { - - PIO_Set(&pinsLeds[led]); - } - else { - - PIO_Clear(&pinsLeds[led]); - } - - return 1; -#else - return 0; -#endif -} - -//------------------------------------------------------------------------------ -/// Turns a LED off. -/// \param led Number of the LED to turn off. -/// \param 1 if the LED has been turned off; 0 otherwise. -//------------------------------------------------------------------------------ -unsigned char LED_Clear(unsigned int led) -{ -#ifdef PINS_LEDS - // Check if LED exists - if (led >= numLeds) { - - return 0; - } - - // Turn LED off - if (pinsLeds[led].type == PIO_OUTPUT_0) { - - PIO_Clear(&pinsLeds[led]); - } - else { - - PIO_Set(&pinsLeds[led]); - } - - return 1; -#else - return 0; -#endif -} - -//------------------------------------------------------------------------------ -/// Toggles the current state of a LED. -/// \param led Number of the LED to toggle. -/// \return 1 if the LED has been toggled; otherwise 0. -//------------------------------------------------------------------------------ -unsigned char LED_Toggle(unsigned int led) -{ -#ifdef PINS_LEDS - // Check if LED exists - if (led >= numLeds) { - - return 0; - } - - // Toggle LED - if (PIO_GetOutputDataStatus(&pinsLeds[led])) { - - PIO_Clear(&pinsLeds[led]); - } - else { - - PIO_Set(&pinsLeds[led]); - } - - return 1; -#else - return 0; -#endif -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/led.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/led.h deleted file mode 100644 index 9a08a82d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/led.h +++ /dev/null @@ -1,70 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \file -/// -/// \par Purpose -/// -/// Small set of functions for simple and portable LED usage. -/// -/// \par Usage -/// -/// -# Configure one or more LEDs using LED_Configure and -/// LED_ConfigureAll. -/// -# Set, clear and toggle LEDs using LED_Set, LED_Clear and -/// LED_Toggle. -/// -/// LEDs are numbered starting from 0; the number of LEDs depend on the -/// board being used. All the functions defined here will compile properly -/// regardless of whether the LED is defined or not; they will simply -/// return 0 when a LED which does not exist is given as an argument. -/// Also, these functions take into account how each LED is connected on to -/// board; thus, might change the level on the corresponding pin -/// to 0 or 1, but it will always light the LED on; same thing for the other -/// methods. -//------------------------------------------------------------------------------ - -#ifndef LED_H -#define LED_H - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -extern unsigned char LED_Configure(unsigned int led); - -extern unsigned char LED_Set(unsigned int led); - -extern unsigned char LED_Clear(unsigned int led); - -extern unsigned char LED_Toggle(unsigned int led); - -#endif //#ifndef LED_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/math.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/math.c deleted file mode 100644 index 39bed568..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/math.c +++ /dev/null @@ -1,91 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "math.h" -#include "trace.h" - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Returns the minimum value between two integers. -/// \param a First integer to compare. -/// \param b Second integer to compare. -//------------------------------------------------------------------------------ -unsigned int min(unsigned int a, unsigned int b) -{ - if (a < b) { - - return a; - } - else { - - return b; - } -} - -//------------------------------------------------------------------------------ -/// Returns the absolute value of an integer. -/// \param value Integer value. -//------------------------------------------------------------------------------ -// Do not call this function "abs", problem with gcc ! -unsigned int absv(signed int value) -{ - if (value < 0) { - - return -value; - } - else { - - return value; - } -} - -//------------------------------------------------------------------------------ -/// Computes and returns x power of y. -/// \param x Value. -/// \param y Power. -//------------------------------------------------------------------------------ -unsigned int power(unsigned int x, unsigned int y) -{ - unsigned int result = 1; - - while (y > 0) { - - result *= x; - y--; - } - return result; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/math.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/math.h deleted file mode 100644 index 6394f299..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/math.h +++ /dev/null @@ -1,41 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef MATH_H -#define MATH_H - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -extern unsigned int min(unsigned int a, unsigned int b); -extern unsigned int absv(signed int value); -extern unsigned int power(unsigned int x, unsigned int y); -#endif //#ifndef MATH_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/rand.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/rand.c deleted file mode 100644 index 9a0f986d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/rand.c +++ /dev/null @@ -1,60 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#include "rand.h" - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -static unsigned long int next = 1; - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Initialize the seed for rand generator. -/// \param seed rand initiation seed -//------------------------------------------------------------------------------ -void srand(unsigned int seed) -{ - next = seed; -} - -//------------------------------------------------------------------------------ -/// Return a random number, maxinum assumed to be 65536 -//------------------------------------------------------------------------------ - -int rand(void) -{ - next = next * 1103515245 + 12345; - return (unsigned int)(next/131072) % 65536; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/rand.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/rand.h deleted file mode 100644 index 8a8b21e2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/rand.h +++ /dev/null @@ -1,49 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !!!Purpose -/// -/// Small function for gererating random number. -/// -//------------------------------------------------------------------------------ - -#ifndef RAND_H -#define RAND_H - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -extern void srand(unsigned int seed); -extern int rand(void); - -#endif //#ifndef RAND_H diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/retarget.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/retarget.c deleted file mode 100644 index 1ca875ec..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/retarget.c +++ /dev/null @@ -1,88 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// This file Configures the target-dependent low level functions for character I/O. -/// -/// !Contents -/// The code implement the lower-level functions as follows: -/// - fputc -/// - ferror -/// - _ttywrch -/// - _sys_exit -/// -/// -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ -#include -#include - -// Disable semihosting -#pragma import(__use_no_semihosting_swi) - -struct __FILE { int handle;} ; -FILE __stdout; -FILE __stderr; - -//------------------------------------------------------------------------------ -/// Outputs a character to a file. -//------------------------------------------------------------------------------ -int fputc(int ch, FILE *f) { - if ((f == stdout) || (f == stderr)) { - DBGU_PutChar(ch); - return ch; - } - else { - return EOF; - } -} - -//------------------------------------------------------------------------------ -/// Returns the error status accumulated during file I/O. -//------------------------------------------------------------------------------ -int ferror(FILE *f) { - return EOF; -} - - -void _ttywrch(int ch) { - DBGU_PutChar((unsigned char)ch); -} - - -void _sys_exit(int return_code) { - label: goto label; /* endless loop */ -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/stdio.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/stdio.c deleted file mode 100644 index defbbc08..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/stdio.c +++ /dev/null @@ -1,511 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Implementation of several stdio.h methods, such as printf(), sprintf() and -/// so on. This reduces the memory footprint of the binary when using those -/// methods, compared to the libc implementation. -/// -/// !Usage -/// -/// Adds stdio.c to the list of file to compile for the project. This will -/// automatically replace libc methods by the custom ones. -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include -#include - -//------------------------------------------------------------------------------ -// Local Definitions -//------------------------------------------------------------------------------ - -// Maximum string size allowed (in bytes). -#define MAX_STRING_SIZE 100 - -//------------------------------------------------------------------------------ -// Global Variables -//------------------------------------------------------------------------------ - -// Required for proper compilation. -struct _reent r = {0, (FILE *) 0, (FILE *) 1, (FILE *) 0}; -struct _reent *_impure_ptr = &r; - -//------------------------------------------------------------------------------ -// Local Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Writes a character inside the given string. Returns 1. -// \param pStr Storage string. -// \param c Character to write. -//------------------------------------------------------------------------------ -signed int PutChar(char *pStr, char c) -{ - *pStr = c; - return 1; -} - -//------------------------------------------------------------------------------ -// Writes a string inside the given string. -// Returns the size of the written -// string. -// \param pStr Storage string. -// \param pSource Source string. -//------------------------------------------------------------------------------ -signed int PutString(char *pStr, const char *pSource) -{ - signed int num = 0; - - while (*pSource != 0) { - - *pStr++ = *pSource++; - num++; - } - - return num; -} - -//------------------------------------------------------------------------------ -// Writes an unsigned int inside the given string, using the provided fill & -// width parameters. -// Returns the size in characters of the written integer. -// \param pStr Storage string. -// \param fill Fill character. -// \param width Minimum integer width. -// \param value Integer value. -//------------------------------------------------------------------------------ -signed int PutUnsignedInt( - char *pStr, - char fill, - signed int width, - unsigned int value) -{ - signed int num = 0; - - // Take current digit into account when calculating width - width--; - - // Recursively write upper digits - if ((value / 10) > 0) { - - num = PutUnsignedInt(pStr, fill, width, value / 10); - pStr += num; - } - // Write filler characters - else { - - while (width > 0) { - - PutChar(pStr, fill); - pStr++; - num++; - width--; - } - } - - // Write lower digit - num += PutChar(pStr, (value % 10) + '0'); - - return num; -} - -//------------------------------------------------------------------------------ -// Writes a signed int inside the given string, using the provided fill & width -// parameters. -// Returns the size of the written integer. -// \param pStr Storage string. -// \param fill Fill character. -// \param width Minimum integer width. -// \param value Signed integer value. -//------------------------------------------------------------------------------ -signed int PutSignedInt( - char *pStr, - char fill, - signed int width, - signed int value) -{ - signed int num = 0; - unsigned int absolute; - - // Compute absolute value - if (value < 0) { - - absolute = -value; - } - else { - - absolute = value; - } - - // Take current digit into account when calculating width - width--; - - // Recursively write upper digits - if ((absolute / 10) > 0) { - - if (value < 0) { - - num = PutSignedInt(pStr, fill, width, -(absolute / 10)); - } - else { - - num = PutSignedInt(pStr, fill, width, absolute / 10); - } - pStr += num; - } - else { - - // Reserve space for sign - if (value < 0) { - - width--; - } - - // Write filler characters - while (width > 0) { - - PutChar(pStr, fill); - pStr++; - num++; - width--; - } - - // Write sign - if (value < 0) { - - num += PutChar(pStr, '-'); - pStr++; - } - } - - // Write lower digit - num += PutChar(pStr, (absolute % 10) + '0'); - - return num; -} - -//------------------------------------------------------------------------------ -// Writes an hexadecimal value into a string, using the given fill, width & -// capital parameters. -// Returns the number of char written. -// \param pStr Storage string. -// \param fill Fill character. -// \param width Minimum integer width. -// \param maj Indicates if the letters must be printed in lower- or upper-case. -// \param value Hexadecimal value. -//------------------------------------------------------------------------------ -signed int PutHexa( - char *pStr, - char fill, - signed int width, - unsigned char maj, - unsigned int value) -{ - signed int num = 0; - - // Decrement width - width--; - - // Recursively output upper digits - if ((value >> 4) > 0) { - - num += PutHexa(pStr, fill, width, maj, value >> 4); - pStr += num; - } - // Write filler chars - else { - - while (width > 0) { - - PutChar(pStr, fill); - pStr++; - num++; - width--; - } - } - - // Write current digit - if ((value & 0xF) < 10) { - - PutChar(pStr, (value & 0xF) + '0'); - } - else if (maj) { - - PutChar(pStr, (value & 0xF) - 10 + 'A'); - } - else { - - PutChar(pStr, (value & 0xF) - 10 + 'a'); - } - num++; - - return num; -} - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Stores the result of a formatted string into another string. Format -/// arguments are given in a va_list instance. -/// Return the number of characters written. -/// \param pStr Destination string. -/// \param length Length of Destination string. -/// \param pFormat Format string. -/// \param ap Argument list. -//------------------------------------------------------------------------------ -signed int vsnprintf(char *pStr, size_t length, const char *pFormat, va_list ap) -{ - char fill; - unsigned char width; - signed int num = 0; - signed int size = 0; - - // Clear the string - if (pStr) { - - *pStr = 0; - } - - // Phase string - while (*pFormat != 0 && size < length) { - - // Normal character - if (*pFormat != '%') { - - *pStr++ = *pFormat++; - size++; - } - // Escaped '%' - else if (*(pFormat+1) == '%') { - - *pStr++ = '%'; - pFormat += 2; - size++; - } - // Token delimiter - else { - - fill = ' '; - width = 0; - pFormat++; - - // Parse filler - if (*pFormat == '0') { - - fill = '0'; - pFormat++; - } - - // Parse width - while ((*pFormat >= '0') && (*pFormat <= '9')) { - - width = (width*10) + *pFormat-'0'; - pFormat++; - } - - // Check if there is enough space - if (size + width > length) { - - width = length - size; - } - - // Parse type - switch (*pFormat) { - case 'd': - case 'i': num = PutSignedInt(pStr, fill, width, va_arg(ap, signed int)); break; - case 'u': num = PutUnsignedInt(pStr, fill, width, va_arg(ap, unsigned int)); break; - case 'x': num = PutHexa(pStr, fill, width, 0, va_arg(ap, unsigned int)); break; - case 'X': num = PutHexa(pStr, fill, width, 1, va_arg(ap, unsigned int)); break; - case 's': num = PutString(pStr, va_arg(ap, char *)); break; - case 'c': num = PutChar(pStr, va_arg(ap, unsigned int)); break; - default: - return EOF; - } - - pFormat++; - pStr += num; - size += num; - } - } - - // NULL-terminated (final \0 is not counted) - if (size < length) { - - *pStr = 0; - } - else { - - *(--pStr) = 0; - size--; - } - - return size; -} - -//------------------------------------------------------------------------------ -/// Stores the result of a formatted string into another string. Format -/// arguments are given in a va_list instance. -/// Return the number of characters written. -/// \param pString Destination string. -/// \param length Length of Destination string. -/// \param pFormat Format string. -/// \param ... Other arguments -//------------------------------------------------------------------------------ -signed int snprintf(char *pString, size_t length, const char *pFormat, ...) -{ - va_list ap; - signed int rc; - - va_start(ap, pFormat); - rc = vsnprintf(pString, length, pFormat, ap); - va_end(ap); - - return rc; -} - -//------------------------------------------------------------------------------ -/// Stores the result of a formatted string into another string. Format -/// arguments are given in a va_list instance. -/// Return the number of characters written. -/// \param pString Destination string. -/// \param pFormat Format string. -/// \param ap Argument list. -//------------------------------------------------------------------------------ -signed int vsprintf(char *pString, const char *pFormat, va_list ap) -{ - return vsnprintf(pString, MAX_STRING_SIZE, pFormat, ap); -} - -//------------------------------------------------------------------------------ -/// Outputs a formatted string on the given stream. Format arguments are given -/// in a va_list instance. -/// \param pStream Output stream. -/// \param pFormat Format string -/// \param ap Argument list. -//------------------------------------------------------------------------------ -signed int vfprintf(FILE *pStream, const char *pFormat, va_list ap) -{ - char pStr[MAX_STRING_SIZE]; - char pError[] = "stdio.c: increase MAX_STRING_SIZE\n\r"; - - // Write formatted string in buffer - if (vsprintf(pStr, pFormat, ap) >= MAX_STRING_SIZE) { - - fputs(pError, stderr); - while (1); // Increase MAX_STRING_SIZE - } - - // Display string - return fputs(pStr, pStream); -} - -//------------------------------------------------------------------------------ -/// Outputs a formatted string on the DBGU stream. Format arguments are given -/// in a va_list instance. -/// \param pFormat Format string -/// \param ap Argument list. -//------------------------------------------------------------------------------ -signed int vprintf(const char *pFormat, va_list ap) -{ - return vfprintf(stdout, pFormat, ap); -} - -//------------------------------------------------------------------------------ -/// Outputs a formatted string on the given stream, using a variable number of -/// arguments. -/// \param pStream Output stream. -/// \param pFormat Format string. -//------------------------------------------------------------------------------ -signed int fprintf(FILE *pStream, const char *pFormat, ...) -{ - va_list ap; - signed int result; - - // Forward call to vfprintf - va_start(ap, pFormat); - result = vfprintf(pStream, pFormat, ap); - va_end(ap); - - return result; -} - -//------------------------------------------------------------------------------ -/// Outputs a formatted string on the DBGU stream, using a variable number of -/// arguments. -/// \param pFormat Format string. -//------------------------------------------------------------------------------ -signed int printf(const char *pFormat, ...) -{ - va_list ap; - signed int result; - - // Forward call to vprintf - va_start(ap, pFormat); - result = vprintf(pFormat, ap); - va_end(ap); - - return result; -} - -//------------------------------------------------------------------------------ -/// Writes a formatted string inside another string. -/// \param pStr Storage string. -/// \param pFormat Format string. -//------------------------------------------------------------------------------ -signed int sprintf(char *pStr, const char *pFormat, ...) -{ - va_list ap; - signed int result; - - // Forward call to vsprintf - va_start(ap, pFormat); - result = vsprintf(pStr, pFormat, ap); - va_end(ap); - - return result; -} - -//------------------------------------------------------------------------------ -/// Outputs a string on stdout. -/// \param pStr String to output. -//------------------------------------------------------------------------------ -signed int puts(const char *pStr) -{ - return fputs(pStr, stdout); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/string.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/string.c deleted file mode 100644 index dbbb0e9e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/string.c +++ /dev/null @@ -1,239 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !Purpose -/// -/// Implementation of several methods defined in string.h, for reducing the -/// memory footprint when using them (since the whole libc.o file gets included -/// even when using a single method). -/// -/// !Usage -/// -/// Add string.c to the list of files to compile for the project. This will -/// automatically replace standard libc methods by the custom ones. -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Copies data from a source buffer into a destination buffer. The two buffers -/// must NOT overlap. Returns the destination buffer. -/// \param pDestination Destination buffer. -/// \param pSource Source buffer. -/// \param num Number of bytes to copy. -//------------------------------------------------------------------------------ -void * memcpy(void *pDestination, const void *pSource, size_t num) -{ - unsigned char *pByteDestination; - unsigned char *pByteSource; - unsigned int *pAlignedSource = (unsigned int *) pSource; - unsigned int *pAlignedDestination = (unsigned int *) pDestination; - - // If num is more than 4 bytes, and both dest. and source are aligned, - // then copy dwords - if ((((unsigned int) pAlignedDestination & 0x3) == 0) - && (((unsigned int) pAlignedSource & 0x3) == 0) - && (num >= 4)) { - - while (num >= 4) { - - *pAlignedDestination++ = *pAlignedSource++; - num -= 4; - } - } - - // Copy remaining bytes - pByteDestination = (unsigned char *) pAlignedDestination; - pByteSource = (unsigned char *) pAlignedSource; - while (num--) { - - *pByteDestination++ = *pByteSource++; - } - - return pDestination; -} - -//------------------------------------------------------------------------------ -/// Fills a memory region with the given value. Returns a pointer to the -/// memory region. -/// \param pBuffer Pointer to the start of the memory region to fill -/// \param value Value to fill the region with -/// \param num Size to fill in bytes -//------------------------------------------------------------------------------ -void * memset(void *pBuffer, int value, size_t num) -{ - unsigned char *pByteDestination; - unsigned int *pAlignedDestination = (unsigned int *) pBuffer; - unsigned int alignedValue = (value << 24) | (value << 16) | (value << 8) | value; - - // Set words if possible - if ((((unsigned int) pAlignedDestination & 0x3) == 0) && (num >= 4)) { - while (num >= 4) { - *pAlignedDestination++ = alignedValue; - num -= 4; - } - } - // Set remaining bytes - pByteDestination = (unsigned char *) pAlignedDestination; - while (num--) { - *pByteDestination++ = value; - } - return pBuffer; -} - -//----------------------------------------------------------------------------- -/// Search a character in the given string. -/// Returns a pointer to the character location. -/// \param pString Pointer to the start of the string to search. -/// \param character The character to find. -//----------------------------------------------------------------------------- -char * strchr(const char *pString, int character) -{ - char * p = (char *)pString; - char c = character & 0xFF; - - while(*p != c) { - if (*p == 0) { - return 0; - } - p++; - } - return p; -} - -//----------------------------------------------------------------------------- -/// Return the length of a given string -/// \param pString Pointer to the start of the string. -//----------------------------------------------------------------------------- -size_t strlen(const char *pString) -{ - unsigned int length = 0; - - while(*pString++ != 0) { - length++; - } - return length; -} - - -//----------------------------------------------------------------------------- -/// Search a character backword from the end of given string. -/// Returns a pointer to the character location. -/// \param pString Pointer to the start of the string to search. -/// \param character The character to find. -//----------------------------------------------------------------------------- -char * strrchr(const char *pString, int character) -{ - char *p = 0; - - while(*pString != 0) { - if (*pString++ == character) { - p = (char*)pString; - } - } - return p; -} - -//----------------------------------------------------------------------------- -/// Copy from source string to destination string -/// Return a pointer to the destination string -/// \param pDestination Pointer to the destination string. -/// \param pSource Pointer to the source string. -//----------------------------------------------------------------------------- -char * strcpy(char *pDestination, const char *pSource) -{ - char *pSaveDest = pDestination; - - for(; (*pDestination = *pSource) != 0; ++pSource, ++pDestination); - return pSaveDest; -} - -//----------------------------------------------------------------------------- -/// Compare the first specified bytes of 2 given strings -/// Return 0 if equals -/// Return >0 if 1st string > 2nd string -/// Return <0 if 1st string < 2nd string -/// \param pString1 Pointer to the start of the 1st string. -/// \param pString2 Pointer to the start of the 2nd string. -/// \param count Number of bytes that should be compared. -//----------------------------------------------------------------------------- -int strncmp(const char *pString1, const char *pString2, size_t count) -{ - int r; - - while(count) { - r = *pString1 - *pString2; - if (r == 0) { - if (*pString1 == 0) { - break; - } - pString1++; - pString2++; - count--; - continue; - } - return r; - } - return 0; -} - -//----------------------------------------------------------------------------- -/// Copy the first number of bytes from source string to destination string -/// Return the pointer to the destination string. -/// \param pDestination Pointer to the start of destination string. -/// \param pSource Pointer to the start of the source string. -/// \param count Number of bytes that should be copied. -//----------------------------------------------------------------------------- -char * strncpy(char *pDestination, const char *pSource, size_t count) -{ - char *pSaveDest = pDestination; - - while (count) { - *pDestination = *pSource; - if (*pSource == 0) { - break; - } - pDestination++; - pSource++; - count--; - } - return pSaveDest; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/trace.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/trace.c deleted file mode 100644 index 4073bb9b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/trace.c +++ /dev/null @@ -1,45 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "trace.h" - -//------------------------------------------------------------------------------ -// Internal variables -//------------------------------------------------------------------------------ - -/// Trace level can be set at applet initialization -#if !defined(NOTRACE) && (DYN_TRACES == 1) - unsigned int traceLevel = TRACE_LEVEL; -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/trace.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/trace.h deleted file mode 100644 index 63e7617a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/trace.h +++ /dev/null @@ -1,241 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \file -/// -/// \par Purpose -/// -/// Standard output methods for reporting debug information, warnings and -/// errors, which can be easily be turned on/off. -/// -/// \par Usage -/// -# Initialize the DBGU using TRACE_CONFIGURE() if you intend to eventually -/// disable ALL traces; otherwise use DBGU_Configure(). -/// -# Uses the TRACE_DEBUG(), TRACE_INFO(), TRACE_WARNING(), TRACE_ERROR() -/// TRACE_FATAL() macros to output traces throughout the program. -/// -# Each type of trace has a level : Debug 5, Info 4, Warning 3, Error 2 -/// and Fatal 1. Disable a group of traces by changing the value of -/// TRACE_LEVEL during compilation; traces with a level bigger than TRACE_LEVEL -/// are not generated. To generate no trace, use the reserved value 0. -/// -# Trace disabling can be static or dynamic. If dynamic disabling is selected -/// the trace level can be modified in runtime. If static disabling is selected -/// the disabled traces are not compiled. -/// -/// \par traceLevels Trace level description -/// -# TRACE_DEBUG (5): Traces whose only purpose is for debugging the program, -/// and which do not produce meaningful information otherwise. -/// -# TRACE_INFO (4): Informational trace about the program execution. Should -/// enable the user to see the execution flow. -/// -# TRACE_WARNING (3): Indicates that a minor error has happened. In most case -/// it can be discarded safely; it may even be expected. -/// -# TRACE_ERROR (2): Indicates an error which may not stop the program execution, -/// but which indicates there is a problem with the code. -/// -# TRACE_FATAL (1): Indicates a major error which prevents the program from going -/// any further. - -//------------------------------------------------------------------------------ - -#ifndef TRACE_H -#define TRACE_H - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include -#include -#include - -//------------------------------------------------------------------------------ -// Global Definitions -//------------------------------------------------------------------------------ - -/// Softpack Version -#define SOFTPACK_VERSION "1.0beta1" - -#define TRACE_LEVEL_DEBUG 5 -#define TRACE_LEVEL_INFO 4 -#define TRACE_LEVEL_WARNING 3 -#define TRACE_LEVEL_ERROR 2 -#define TRACE_LEVEL_FATAL 1 -#define TRACE_LEVEL_NO_TRACE 0 - -// By default, all traces are output except the debug one. -#if !defined(TRACE_LEVEL) -#define TRACE_LEVEL TRACE_LEVEL_INFO -#endif - -// By default, trace level is static (not dynamic) -#if !defined(DYN_TRACES) -#define DYN_TRACES 0 -#endif - -#if defined(NOTRACE) -#error "Error: NOTRACE has to be not defined !" -#endif - -#undef NOTRACE -#if (DYN_TRACES==0) - #if (TRACE_LEVEL == TRACE_LEVEL_NO_TRACE) - #define NOTRACE - #endif -#endif - - - -//------------------------------------------------------------------------------ -// Global Macros -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Initializes the DBGU -/// \param mode DBGU mode. -/// \param baudrate DBGU baudrate. -/// \param mck Master clock frequency. -//------------------------------------------------------------------------------ -#define TRACE_CONFIGURE(mode, baudrate, mck) { \ - const Pin pinsDbgu[] = {PINS_DBGU}; \ - PIO_Configure(pinsDbgu, PIO_LISTSIZE(pinsDbgu)); \ - DBGU_Configure(mode, baudrate, mck); \ - } - -//------------------------------------------------------------------------------ -/// Initializes the DBGU for ISP project -/// \param mode DBGU mode. -/// \param baudrate DBGU baudrate. -/// \param mck Master clock frequency. -//------------------------------------------------------------------------------ -#ifndef DYNTRACE -#define DYNTRACE 0 -#endif - -#if (TRACE_LEVEL==0) && (DYNTRACE==0) -#define TRACE_CONFIGURE_ISP(mode, baudrate, mck) {} -#else -#define TRACE_CONFIGURE_ISP(mode, baudrate, mck) { \ - const Pin pinsDbgu[] = {PINS_DBGU}; \ - PIO_Configure(pinsDbgu, PIO_LISTSIZE(pinsDbgu)); \ - DBGU_Configure(mode, baudrate, mck); \ - } -#endif - -//------------------------------------------------------------------------------ -/// Outputs a formatted string using if the log level is high -/// enough. Can be disabled by defining TRACE_LEVEL=0 during compilation. -/// \param format Formatted string to output. -/// \param ... Additional parameters depending on formatted string. -//------------------------------------------------------------------------------ -#if defined(NOTRACE) - -// Empty macro -#define TRACE_DEBUG(...) { } -#define TRACE_INFO(...) { } -#define TRACE_WARNING(...) { } -#define TRACE_ERROR(...) { } -#define TRACE_FATAL(...) { while(1); } - -#define TRACE_DEBUG_WP(...) { } -#define TRACE_INFO_WP(...) { } -#define TRACE_WARNING_WP(...) { } -#define TRACE_ERROR_WP(...) { } -#define TRACE_FATAL_WP(...) { while(1); } - -#elif (DYN_TRACES == 1) - -// Trace output depends on traceLevel value -#define TRACE_DEBUG(...) { if (traceLevel >= TRACE_LEVEL_DEBUG) { printf("-D- " __VA_ARGS__); } } -#define TRACE_INFO(...) { if (traceLevel >= TRACE_LEVEL_INFO) { printf("-I- " __VA_ARGS__); } } -#define TRACE_WARNING(...) { if (traceLevel >= TRACE_LEVEL_WARNING) { printf("-W- " __VA_ARGS__); } } -#define TRACE_ERROR(...) { if (traceLevel >= TRACE_LEVEL_ERROR) { printf("-E- " __VA_ARGS__); } } -#define TRACE_FATAL(...) { if (traceLevel >= TRACE_LEVEL_FATAL) { printf("-F- " __VA_ARGS__); while(1); } } - -#define TRACE_DEBUG_WP(...) { if (traceLevel >= TRACE_LEVEL_DEBUG) { printf(__VA_ARGS__); } } -#define TRACE_INFO_WP(...) { if (traceLevel >= TRACE_LEVEL_INFO) { printf(__VA_ARGS__); } } -#define TRACE_WARNING_WP(...) { if (traceLevel >= TRACE_LEVEL_WARNING) { printf(__VA_ARGS__); } } -#define TRACE_ERROR_WP(...) { if (traceLevel >= TRACE_LEVEL_ERROR) { printf(__VA_ARGS__); } } -#define TRACE_FATAL_WP(...) { if (traceLevel >= TRACE_LEVEL_FATAL) { printf(__VA_ARGS__); while(1); } } - -#else - -// Trace compilation depends on TRACE_LEVEL value -#if (TRACE_LEVEL >= TRACE_LEVEL_DEBUG) -#define TRACE_DEBUG(...) { printf("-D- " __VA_ARGS__); } -#define TRACE_DEBUG_WP(...) { printf(__VA_ARGS__); } -#else -#define TRACE_DEBUG(...) { } -#define TRACE_DEBUG_WP(...) { } -#endif - -#if (TRACE_LEVEL >= TRACE_LEVEL_INFO) -#define TRACE_INFO(...) { printf("-I- " __VA_ARGS__); } -#define TRACE_INFO_WP(...) { printf(__VA_ARGS__); } -#else -#define TRACE_INFO(...) { } -#define TRACE_INFO_WP(...) { } -#endif - -#if (TRACE_LEVEL >= TRACE_LEVEL_WARNING) -#define TRACE_WARNING(...) { printf("-W- " __VA_ARGS__); } -#define TRACE_WARNING_WP(...) { printf(__VA_ARGS__); } -#else -#define TRACE_WARNING(...) { } -#define TRACE_WARNING_WP(...) { } -#endif - -#if (TRACE_LEVEL >= TRACE_LEVEL_ERROR) -#define TRACE_ERROR(...) { printf("-E- " __VA_ARGS__); } -#define TRACE_ERROR_WP(...) { printf(__VA_ARGS__); } -#else -#define TRACE_ERROR(...) { } -#define TRACE_ERROR_WP(...) { } -#endif - -#if (TRACE_LEVEL >= TRACE_LEVEL_FATAL) -#define TRACE_FATAL(...) { printf("-F- " __VA_ARGS__); while(1); } -#define TRACE_FATAL_WP(...) { printf(__VA_ARGS__); while(1); } -#else -#define TRACE_FATAL(...) { while(1); } -#define TRACE_FATAL_WP(...) { while(1); } -#endif - -#endif - - -//------------------------------------------------------------------------------ -// Exported variables -//------------------------------------------------------------------------------ -// Depending on DYN_TRACES, traceLevel is a modifable runtime variable -// or a define -#if !defined(NOTRACE) && (DYN_TRACES == 1) - extern unsigned int traceLevel; -#endif - -#endif //#ifndef TRACE_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/util.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/util.c deleted file mode 100644 index b2bd0dea..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/util.c +++ /dev/null @@ -1,223 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ -#include -#include -#include - -//------------------------------------------------------------------------------ -// Local Variables -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Print char if printable. If not print a point -/// \param c char to -//------------------------------------------------------------------------------ -static void PrintChar(unsigned char c) -{ - if( (/*c >= 0x00 &&*/ c <= 0x1F) || - (c >= 0xB0 && c <= 0xDF) ) { - - printf("."); - } - else { - - printf("%c", c); - } -} - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Displays the content of the given frame on the DBGU. -/// \param pBuffer Pointer to the frame to dump. -/// \param size Buffer size in bytes. -//------------------------------------------------------------------------------ -void UTIL_DbguDumpFrame(unsigned char *pFrame, unsigned int size) -{ - unsigned int i; - - for (i=0; i < size; i++) { - printf("%02X ", pFrame[i]); - } - - printf("\n\r"); -} - -//------------------------------------------------------------------------------ -/// Displays the content of the given buffer on the DBGU. -/// \param pBuffer Pointer to the buffer to dump. -/// \param size Buffer size in bytes. -/// \param address Start address to display -//------------------------------------------------------------------------------ -void UTIL_DbguDumpMemory( - unsigned char *pBuffer, - unsigned int size, - unsigned int address - ) -{ - unsigned int i, j; - unsigned int lastLineStart; - unsigned char* pTmp; - - for (i=0; i < (size / 16); i++) { - - printf("0x%08X: ", address + (i*16)); - pTmp = (unsigned char*)&pBuffer[i*16]; - for (j=0; j < 4; j++) { - printf("%02X%02X%02X%02X ", pTmp[0],pTmp[1],pTmp[2],pTmp[3]); - pTmp += 4; - } - - pTmp = (unsigned char*)&pBuffer[i*16]; - for (j=0; j < 16; j++) { - PrintChar(*pTmp++); - } - - printf("\n\r"); - } - - if( (size%16) != 0) { - lastLineStart = size - (size%16); - printf("0x%08X: ", address + lastLineStart); - - for (j= lastLineStart; j < lastLineStart+16; j++) { - - if( (j!=lastLineStart) && (j%4 == 0) ) { - printf(" "); - } - if(j= '0' && key <= '9' ) { - value = (value * 10) + (key - '0'); - nbNb++; - } - else if(key == 0x0D || key == ' ') { - if(nbNb == 0) { - printf("\n\rWrite a number and press ENTER or SPACE!\n\r"); - return 0; - } else { - printf("\n\r"); - *pValue = value; - return 1; - } - } else { - printf("\n\r'%c' not a number!\n\r", key); - return 0; - } - } -} - -//------------------------------------------------------------------------------ -/// Reads an integer and check the value -//------------------------------------------------------------------------------ -unsigned char UTIL_DbguGetIntegerMinMax( - unsigned int *pValue, - unsigned int min, - unsigned int max - ) -{ - unsigned int value = 0; - - if( UTIL_DbguGetInteger(&value) == 0) { - return 0; - } - - if(value < min || value > max) { - printf("\n\rThe number have to be between %d and %d\n\r", min, max); - return 0; - } - - printf("\n\r"); - *pValue = value; - return 1; -} - -//------------------------------------------------------------------------------ -/// Reads an hexadecimal number -//------------------------------------------------------------------------------ -unsigned char UTIL_DbguGetHexa32(unsigned int *pValue) -{ - unsigned char key; - unsigned int i = 0; - unsigned int value = 0; - for(i = 0; i < 8; i++) { - key = DBGU_GetChar(); - DBGU_PutChar(key); - if(key >= '0' && key <= '9' ) { - value = (value * 16) + (key - '0'); - } - else if(key >= 'A' && key <= 'F' ) { - value = (value * 16) + (key - 'A' + 10) ; - } - else if(key >= 'a' && key <= 'f' ) { - value = (value * 16) + (key - 'a' + 10) ; - } - else { - printf("\n\rIt is not a hexa character!\n\r"); - return 0; - } - } - - printf("\n\r"); - *pValue = value; - return 1; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/util.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/util.h deleted file mode 100644 index f79ffd3f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/util.h +++ /dev/null @@ -1,48 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef UTIL_H -#define UTIL_H - -//------------------------------------------------------------------------------ -// Global Functions -//------------------------------------------------------------------------------ - -extern void UTIL_DbguDumpFrame(unsigned char *pFrame, unsigned int size); - -extern void UTIL_DbguDumpMemory(unsigned char *pBuffer, unsigned int size, unsigned int address); - -extern unsigned char UTIL_DbguGetInteger(unsigned int *pValue); - -extern unsigned char UTIL_DbguGetIntegerMinMax(unsigned int *pValue, unsigned int min, unsigned int max); - -extern unsigned char UTIL_DbguGetHexa32(unsigned int *pValue); - -#endif //#ifndef UTIL_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/utility.dir b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/utility.dir deleted file mode 100644 index 344ef5a6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/utility.dir +++ /dev/null @@ -1,50 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \dir -/// -/// !!!Purpose -/// -/// The utility directory contains several very small APIs for performing -/// specific tasks, such as LED configuration, BMP header decoding, etc. -/// -/// !!!Contents -/// -/// Most modules contained here are very small and do not fit in any of the -/// other at91lib categories. They primarily provide helper functions -/// (e.g. for handling BMP and WAV files) and re-implementation of libc code for -/// reducing code size (math, stdio, string). -/// -/// Two important files are assert.h and trace.h. The first one provides macros -/// for run-time verifications of parameters & values. Trace.h enables the -/// programmer to add debug traces to APIs that can be easily turned on or off -/// depending on the debugging needs. -//------------------------------------------------------------------------------ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/video.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/video.c deleted file mode 100644 index 49ec1da2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/video.c +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ -#include "video.h" - -//----------------------------------------------------------------------------- -/// Conversion YCrCb to RGB:
-/// R = 1.164(Yi – 16) + 1.596(Cr – 128)
-/// G = 1.164(Yi – 16) – 0.813(Cr – 128) – 0.391(Cb – 128)
-/// B = 1.164(Yi – 16) + 2.018(Cb – 128)
-/// -/// Pixel i+1:
-/// YCrCb to RGB:
-/// R = 1.164(Yi+1 – 16) + 1.596(Cr – 128)
-/// G = 1.164(Yi+1 – 16) – 0.813(Cr – 128) – 0.391(Cb – 128)
-/// B = 1.164(Yi+1 – 16) + 2.018(Cb – 128) -/// \param ycc Source buffer (YCC) -/// \param rgb Destination buffer (RGB) -/// \param len Length of buffer -//----------------------------------------------------------------------------- -void VIDEO_Ycc2Rgb(unsigned char *ycc, unsigned short *rgb, unsigned int len) -{ - int r_calc_i; - int g_calc_i; - int b_calc_i; - int r_calc_i_incr; - int g_calc_i_incr; - int b_calc_i_incr; - int cr_i; - int y_i; - int cb_i; - int y_i_incr; - int val; - int val1; - int val2; - int val3; - int val4; - int val5; - int i; - - for(i=0; i 255) - r_calc_i = 255; - - if (g_calc_i < 0) - g_calc_i = 0; - else if (g_calc_i > 255) - g_calc_i = 255; - - if (b_calc_i < 0) - b_calc_i = 0; - else if (b_calc_i > 255) - b_calc_i = 255; - - if (r_calc_i_incr < 0) - r_calc_i_incr = 0; - else if (r_calc_i_incr > 255) - r_calc_i_incr = 255; - - if (g_calc_i_incr < 0) - g_calc_i_incr = 0; - else if (g_calc_i_incr > 255) - g_calc_i_incr = 255; - - if (b_calc_i_incr < 0) - b_calc_i_incr = 0; - else if (b_calc_i_incr > 255) - b_calc_i_incr = 255; - - *rgb++ = (((unsigned short )r_calc_i & 0xF8) >> 3) - | ((((unsigned short)g_calc_i & 0xF8) >> 3) << 5) - | ((((unsigned short)b_calc_i & 0xF8) >> 3) << 10); - - *rgb++ = (((unsigned short )r_calc_i_incr & 0xF8) >> 3) - | ((((unsigned short)g_calc_i_incr & 0xF8) >> 3) << 5) - | ((((unsigned short)b_calc_i_incr & 0xF8) >> 3) << 10); - } -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/video.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/video.h deleted file mode 100644 index c4940e51..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/video.h +++ /dev/null @@ -1,89 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -/// \unit -/// -/// !!!Purpose -/// -/// Video structure, used for LCD and ISI. -/// Conversion Video from YCC to RGB -/// -//------------------------------------------------------------------------------ - -#ifndef _VIDEO_H -#define _VIDEO_H - -//----------------------------------------------------------------------------- -// Definitions -//----------------------------------------------------------------------------- -/// Type of video is YUV -#define YUV 0 -/// Type of video is RGB -#define RGB 1 - -//----------------------------------------------------------------------------- -/// Video structure -//----------------------------------------------------------------------------- -typedef struct _AT91S_VIDEO -{ - /// LCD Vertical Size - unsigned int lcd_vsize; - /// LCD Horizontal Size - unsigned int lcd_hsize; - /// LCD Number of Bit Per Pixel - unsigned int lcd_nbpp; - /// LCD Frame Buffer Address - unsigned int lcd_fb_addr; - /// Base address for the frame buffer descriptors list - unsigned int Isi_fbd_base; - /// Start of Line Delay - unsigned int Hblank; - /// Start of frame Delay - unsigned int Vblank; - /// Vertical size of the Image sensor [0..2047] - unsigned int codec_vsize; - /// Horizontal size of the Image sensor [0..2047] - unsigned int codec_hsize; - /// Base address for codec DMA - unsigned int codec_fb_addr; - /// Buffer index - unsigned int IsiPrevBuffIndex; - /// Type of video - unsigned char rgb_or_yuv; -}AT91S_VIDEO, *AT91PS_VIDEO; - - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ -extern void VIDEO_Ycc2Rgb(unsigned char *ycc, unsigned short *rgb, unsigned int len); - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/wav.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/wav.c deleted file mode 100644 index cd75b151..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/wav.c +++ /dev/null @@ -1,84 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "wav.h" -#include - -//------------------------------------------------------------------------------ -// Internal constants -//------------------------------------------------------------------------------ - -/// WAV letters "RIFF" -#define WAV_CHUNKID 0x46464952 -/// WAV letters "WAVE" -#define WAV_FORMAT 0x45564157 -/// WAV letters "fmt " -#define WAV_SUBCHUNKID 0x20746D66 - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Returns 1 if the header of a Wav file is valid; otherwise returns 0. -/// \param file Buffer holding the file to examinate. -//------------------------------------------------------------------------------ -unsigned char WAV_IsValid(const WavHeader *header) -{ - return ((header->chunkID == WAV_CHUNKID) - && (header->format == WAV_FORMAT) - && (header->subchunk1Size == 0x10)); -} - -//------------------------------------------------------------------------------ -/// Display the information of the WAV file (sample rate, stereo/mono and frame -/// size). -//------------------------------------------------------------------------------ -void WAV_DisplayInfo(const WavHeader *header) -{ - printf( "Wave file header information\n\r"); - printf( "--------------------------------\n\r"); - printf( " - Chunk ID = 0x%08X\n\r", header->chunkID); - printf( " - Chunk Size = %d\n\r", header->chunkSize); - printf( " - Format = 0x%08X\n\r", header->format); - printf( " - SubChunk ID = 0x%08X\n\r", header->subchunk1ID); - printf( " - Subchunk1 Size = %d\n\r", header->subchunk1Size); - printf( " - Audio Format = 0x%04X\n\r", header->audioFormat); - printf( " - Num. Channels = %d\n\r", header->numChannels); - printf( " - Sample Rate = %d\n\r", header->sampleRate); - printf( " - Byte Rate = %d\n\r", header->byteRate); - printf( " - Block Align = %d\n\r", header->blockAlign); - printf( " - Bits Per Sample = %d\n\r", header->bitsPerSample); - printf( " - Subchunk2 ID = 0x%08X\n\r", header->subchunk2ID); - printf( " - Subchunk2 Size = %d\n\r", header->subchunk2Size); -} \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/wav.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/wav.h deleted file mode 100644 index 4d26e84c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/utility/wav.h +++ /dev/null @@ -1,82 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef WAV_H -#define WAV_H - -//------------------------------------------------------------------------------ -// Exported types -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Standard WAV file header information. -//------------------------------------------------------------------------------ -typedef struct _WavHeader -{ - /// Contains the letters "RIFF" in ASCII form. - unsigned int chunkID; - /// Size of the rest of the chunk following this number. - unsigned int chunkSize; - /// Contains the letters "WAVE". - unsigned int format; - /// Contains the letters "fmt ". - unsigned int subchunk1ID; - /// 16 for PCM. This is the size of the rest of the Subchunk - /// which follows this number. - unsigned int subchunk1Size; - /// PCM = 1 (i.e. Linear quantization). Values other than 1 indicate some - /// form of compression. - unsigned short audioFormat; - /// Mono = 1, Stereo = 2, etc. - unsigned short numChannels; - /// 8000, 44100, etc. - unsigned int sampleRate; - /// SampleRate * NumChannels * BitsPerSample/8 - unsigned int byteRate; - /// NumChannels * BitsPerSample/8 - unsigned short blockAlign; - /// 8 bits = 8, 16 bits = 16, etc. - unsigned short bitsPerSample; - /// Contains the letters "data". - unsigned int subchunk2ID; - /// Number of bytes in the data. - unsigned int subchunk2Size; - -} WavHeader; - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -extern unsigned char WAV_IsValid(const WavHeader *header); - -extern void WAV_DisplayInfo(const WavHeader *header); - -#endif //#ifndef WAV_H - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/wdt/wdt.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/wdt/wdt.c deleted file mode 100644 index 6d4f4a3d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/wdt/wdt.c +++ /dev/null @@ -1,141 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of Watchdog Timer (WDT) controller. - * - */ - -/** \addtogroup wdt_module Working with WDT - * The WDT driver provides the interface to configure and use the WDT - * peripheral. - * - * The WDT can be used to prevent system lock-up if the software becomes - * trapped in a deadlock. It can generate a general reset or a processor - * reset only. It is clocked by slow clock divided by 128. - * - * The WDT is running at reset with 16 seconds watchdog period (slow clock at 32.768 kHz) - * and external reset generation enabled. The user must either disable it or - * reprogram it to meet the application requires. - * - * To use the WDT, the user could follow these few steps: - *
    - *
  • Enable watchdog with given mode using \ref WDT_Enable(). - *
  • Restart the watchdog using \ref WDT_Restart() within the watchdog period. - *
- * - * For more accurate information, please look at the WDT section of the - * Datasheet. - * - * \note - * The Watchdog Mode Register (WDT_MR) can be written only once.\n - * - * Related files :\n - * \ref wdt.c\n - * \ref wdt.h.\n - */ -/*@{*/ -/*@}*/ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include -#include "wdt.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Enable watchdog with given mode. - * - * \note The Watchdog Mode Register (WDT_MR) can be written only once. - * Only a processor reset resets it. - * - * \param mode WDT mode to be set - */ -void WDT_Enable(uint32_t mode) -{ - Wdt *pWDT = WDT; - - pWDT->WDT_MR = mode; -} - -/** - * \brief Disable watchdog. - * - * \note The Watchdog Mode Register (WDT_MR) can be written only once. - * Only a processor reset resets it. - */ -void WDT_Disable(void) -{ - Wdt *pWDT = WDT; - - pWDT->WDT_MR = WDT_MR_WDDIS; -} - -/** - * \brief Watchdog restart. - */ -void WDT_Restart(void) -{ - Wdt *pWDT = WDT; - - pWDT->WDT_CR = 0xA5000001; -} - -/** - * \brief Watchdog get status. - */ -uint32_t WDT_GetStatus(void) -{ - Wdt *pWDT = WDT; - - return(pWDT->WDT_SR & 0x3); -} - -/** - * \brief Watchdog get period. - * - * \param ms desired watchdog period in millisecond. - */ -uint32_t WDT_GetPeriod(uint32_t ms) -{ - if ((ms < 4) || (ms > 16000)) { - return 0; - } - return((ms << 8) / 1000); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/wdt/wdt.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/wdt/wdt.h deleted file mode 100644 index ed30bb51..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/libraries/drivers/wdt/wdt.h +++ /dev/null @@ -1,61 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * Interface for Watchdog Timer (WDT) controller. - * - * \par Usage - * -# Enable watchdog with given mode using \ref WDT_Enable(). - * -# Disable watchdog using \ref WDT_Disable() - * -# Restart the watchdog using \ref WDT_Restart(). - * -# Get watchdog status using \ref WDT_GetStatus(). - * -# Caculate watchdog period value using \ref WDT_GetPeriod(). - */ - -#ifndef WDT_H -#define WDT_H - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void WDT_Enable(uint32_t mode); - -extern void WDT_Disable(void); - -extern void WDT_Restart(void); - -extern uint32_t WDT_GetStatus(void); - -extern uint32_t WDT_GetPeriod(uint32_t ms); - -#endif /* #ifndef WDT_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/port.h deleted file mode 100644 index fe87134a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/port.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * FreeModbus Libary: Atmel AT91SAM3S Demo Application - * Copyright (C) 2010 Christian Walter - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * IF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -/* ----------------------- Platform includes --------------------------------*/ -#include -#include -#include -#include -#include -#include -#include - -/* ----------------------- Defines ------------------------------------------*/ -#define INLINE inline -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#define ENTER_CRITICAL_SECTION( ) vMBPortEnterCritical() -#define EXIT_CRITICAL_SECTION( ) vMBPortExitCritical() - -#define assert( x ) - -typedef char BOOL; - -typedef unsigned char UCHAR; -typedef char CHAR; - -typedef unsigned short USHORT; -typedef short SHORT; - -typedef unsigned long ULONG; -typedef long LONG; - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#define MB_PORT_HAS_CLOSE 1 -#define MB_ASCII_TIMEOUT_WAIT_BEFORE_SEND_MS 2 - -/* ----------------------- Prototypes ---------------------------------------*/ -void vMBPortSetWithinException( BOOL bInException ); -BOOL bMBPortIsWithinException( void ); - -void vMBPortEnterCritical( void ); -void vMBPortExitCritical( void ); - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/portevent.c deleted file mode 100644 index 35583bfb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/portevent.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - * FreeModbus Libary: Atmel AT91SAM3S Demo Application - * Copyright (C) 2010 Christian Walter - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * IF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include -#include -#include - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static xQueueHandle xQueueHdl; - - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - BOOL bStatus = FALSE; - if( 0 != ( xQueueHdl = xQueueCreate( 1, sizeof( eMBEventType ) ) ) ) - { - bStatus = TRUE; - } - return bStatus; -} - -void -vMBPortEventClose( void ) -{ - if( 0 != xQueueHdl ) - { - vQueueDelete( xQueueHdl ); - xQueueHdl = 0; - } -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - BOOL bStatus = TRUE; - if( bMBPortIsWithinException( ) ) - { - ( void )xQueueSendFromISR( xQueueHdl, ( const void * )&eEvent, pdFALSE ); - } - else - { - ( void )xQueueSend( xQueueHdl, ( const void * )&eEvent, pdFALSE ); - } - - return bStatus; -} - -BOOL -xMBPortEventGet( eMBEventType * peEvent ) -{ - BOOL xEventHappened = FALSE; - - if( pdTRUE == xQueueReceive( xQueueHdl, peEvent, portTICK_RATE_MS * 50 ) ) - { - xEventHappened = TRUE; - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/portother.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/portother.c deleted file mode 100644 index 50793195..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/portother.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * FreeModbus Libary: Atmel AT91SAM3S Demo Application - * Copyright (C) 2010 Christian Walter - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * IF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include -#include -#include -#include - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include - -/* ----------------------- Variables ----------------------------------------*/ -static BOOL bIsWithinException = FALSE; - -/* ----------------------- Start implementation -----------------------------*/ - -void -vMBPortSetWithinException( BOOL bInException ) -{ - bIsWithinException = bInException; -} - -BOOL -bMBPortIsWithinException( void ) -{ - return bIsWithinException; -} - -void -vMBPortEnterCritical( void ) -{ - taskENTER_CRITICAL( ); -} - -void -vMBPortExitCritical( void ) -{ - taskEXIT_CRITICAL( ); -} - -void -vMBPortClose( void ) -{ - extern void vMBPortSerialClose( void ); - extern void vMBPortTimerClose( void ); - extern void vMBPortEventClose( void ); - vMBPortSerialClose( ); - vMBPortTimerClose( ); - vMBPortEventClose( ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/portserial.c deleted file mode 100644 index 8c22e74f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/portserial.c +++ /dev/null @@ -1,284 +0,0 @@ -/* - * FreeModbus Libary: Atmel AT91SAM3S Demo Application - * Copyright (C) 2010 Christian Walter - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * IF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include -#include -#include -#include - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "port.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define USART0_ENABLED ( 1 ) -#define USART0_IDX ( 0 ) - -#define USART1_ENABLED ( 1 ) -#define USART1_IDX ( USART0_IDX + USART0_ENABLED * 1 ) - -#define USART_IDX_LAST ( USART1_IDX ) - -#define USART_INVALID_PORT ( 0xFF ) -#define USART_NOT_RE_IDX ( 3 ) -#define USART_DE_IDX ( 4 ) - -/* ----------------------- Static variables ---------------------------------*/ - -#if USART1_ENABLED == 1 -const Pin xUSART0Pins[] = { - PIN_USART0_TXD, - PIN_USART0_RXD -}; -#endif - -#if USART1_ENABLED == 1 -const Pin xUSART1NotREPin = { 1 << 25, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT }; -const Pin xUSART1DEPin = { 1 << 24, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT }; - -const Pin xUSART1Pins[] = { - PIN_USART1_TXD, - PIN_USART1_RXD, - {1 << 23, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} -}; -#endif - -const struct xUSARTHWMappings_t -{ - Usart *pUsart; - unsigned int xUSARTID; - IRQn_Type xUSARTIrq; - const Pin *USARTNotREPin; - const Pin *USARTDEPin; - const Pin *xUSARTPins; - uint32_t xUSARTPinsCnt; - - -} xUSARTHWMappings[] = -{ -#if USART0_ENABLED == 1 - { - USART0, ID_USART0, USART0_IRQn, NULL, NULL, &xUSART0Pins[0], PIO_LISTSIZE( xUSART0Pins )}, -#endif -#if USART1_ENABLED == 1 - { - USART1, ID_USART1, USART1_IRQn, &xUSART1NotREPin, &xUSART1DEPin, &xUSART1Pins[0], PIO_LISTSIZE( xUSART1Pins )}, -#endif -}; - -static UCHAR ucUsedPort = USART_INVALID_PORT; - -void -vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ - - if( xRxEnable ) - { - USART_SetReceiverEnabled( xUSARTHWMappings[ucUsedPort].pUsart, 1 ); - USART_EnableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IDR_RXRDY ); - } - else - { - USART_DisableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IDR_RXRDY ); - USART_SetReceiverEnabled( xUSARTHWMappings[ucUsedPort].pUsart, 0 ); - } - - if( xTxEnable ) - { - if( NULL != xUSARTHWMappings[ucUsedPort].USARTNotREPin ) - { - PIO_Set( xUSARTHWMappings[ucUsedPort].USARTNotREPin ); - } - if( NULL != xUSARTHWMappings[ucUsedPort].USARTDEPin ) - { - PIO_Set( xUSARTHWMappings[ucUsedPort].USARTDEPin ); - } - USART_SetTransmitterEnabled( xUSARTHWMappings[ucUsedPort].pUsart, 1 ); - USART_EnableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IER_TXRDY ); - USART_DisableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IER_TXEMPTY ); - } - else - { - USART_DisableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IDR_TXRDY ); - USART_EnableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IER_TXEMPTY ); - } -} - -BOOL -xMBPortSerialInit( UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - BOOL bStatus = FALSE; - uint32_t uiMode = US_MR_USART_MODE_NORMAL; - if( ( ucPORT <= USART_IDX_LAST ) ) - { - bStatus = TRUE; - switch ( eParity ) - { - case MB_PAR_NONE: - uiMode |= US_MR_PAR_NONE | US_MR_NBSTOP_2_BIT; - break; - case MB_PAR_ODD: - uiMode |= US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT; - break; - case MB_PAR_EVEN: - uiMode |= US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT; - break; - default: - bStatus = FALSE; - break; - } - - switch ( ucDataBits ) - { - case 8: - uiMode |= US_MR_CHRL_8_BITS; - break; - case 7: - uiMode |= US_MR_CHRL_7_BITS; - break; - default: - bStatus = FALSE; - } - - if( TRUE == bStatus ) - { - ucUsedPort = ucPORT; - - NVIC_DisableIRQ( xUSARTHWMappings[ucUsedPort].xUSARTIrq ); - - PIO_Configure( xUSARTHWMappings[ucUsedPort].xUSARTPins, xUSARTHWMappings[ucUsedPort].xUSARTPinsCnt ); - if( NULL != xUSARTHWMappings[ucUsedPort].USARTNotREPin ) - { - PIO_Configure( xUSARTHWMappings[ucUsedPort].USARTNotREPin, 1 ); - } - if( NULL != xUSARTHWMappings[ucUsedPort].USARTDEPin ) - { - PIO_Configure( xUSARTHWMappings[ucUsedPort].USARTDEPin, 1 ); - } - PMC_EnablePeripheral( xUSARTHWMappings[ucUsedPort].xUSARTID ); - USART_Configure( xUSARTHWMappings[ucUsedPort].pUsart, uiMode, ulBaudRate, BOARD_MCK ); - - NVIC_ClearPendingIRQ( xUSARTHWMappings[ucUsedPort].xUSARTIrq ); - NVIC_SetPriority( xUSARTHWMappings[ucUsedPort].xUSARTIrq, 0xF << 4 ); - NVIC_EnableIRQ( xUSARTHWMappings[ucUsedPort].xUSARTIrq ); - } - } - - return bStatus; -} - -void -vMBPortSerialClose( void ) -{ - if( USART_INVALID_PORT != ucUsedPort ) - { - NVIC_DisableIRQ( xUSARTHWMappings[ucUsedPort].xUSARTIrq ); - PMC_DisablePeripheral( xUSARTHWMappings[ucUsedPort].xUSARTID ); - if( NULL != xUSARTHWMappings[ucUsedPort].USARTNotREPin ) - { - PIO_Clear( xUSARTHWMappings[ucUsedPort].USARTDEPin ); - } - if( NULL != xUSARTHWMappings[ucUsedPort].USARTDEPin ) - { - PIO_Clear( xUSARTHWMappings[ucUsedPort].USARTNotREPin ); - } - ucUsedPort = USART_INVALID_PORT; - } -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - USART1->US_THR = ucByte; - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - *pucByte = USART1->US_RHR; - return TRUE; -} - -void -vUSARTHandler( void ) -{ - uint32_t uiCSR; - uint32_t uiIMR; - BOOL bTaskWoken = FALSE; - - vMBPortSetWithinException( TRUE ); - - uiCSR = xUSARTHWMappings[ucUsedPort].pUsart->US_CSR; - uiIMR = xUSARTHWMappings[ucUsedPort].pUsart->US_IMR; - uint32_t uiCSRMasked = uiCSR & uiIMR; - - if( uiCSRMasked & US_CSR_RXRDY ) - { - bTaskWoken = pxMBFrameCBByteReceived( ); - } - if( uiCSRMasked & US_CSR_TXRDY ) - { - bTaskWoken = pxMBFrameCBTransmitterEmpty( ); - } - if( uiCSRMasked & US_CSR_TXEMPTY ) - { - if( NULL != xUSARTHWMappings[ucUsedPort].USARTDEPin ) - { - PIO_Clear( xUSARTHWMappings[ucUsedPort].USARTDEPin ); - } - if( NULL != xUSARTHWMappings[ucUsedPort].USARTNotREPin ) - { - PIO_Clear( xUSARTHWMappings[ucUsedPort].USARTNotREPin ); - } - USART_DisableIt( xUSARTHWMappings[ucUsedPort].pUsart, US_IER_TXEMPTY ); - } - vMBPortSetWithinException( FALSE ); - - portEND_SWITCHING_ISR( bTaskWoken ? pdTRUE : pdFALSE ); -} - -#if USART1_ENABLED == 1 -void -USART1_IrqHandler( void ) -{ - vUSARTHandler( ); -} -#endif - -#if USART0_ENABLED == 1 -void -USART0_IrqHandler( void ) -{ - vUSARTHandler( ); -} -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/porttimer.c deleted file mode 100644 index 16cc1ab4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/ATSAM3S_FREERTOS/port/porttimer.c +++ /dev/null @@ -1,143 +0,0 @@ -/* - * FreeModbus Libary: Atmel AT91SAM3S Demo Application - * Copyright (C) 2010 Christian Walter - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * IF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include -#include -#include -#include - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "port.h" -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_TIMER_DEBUG ( 0 ) -#define MB_TIMER_PRESCALER ( 128UL ) -#define MB_TIMER_TICKS ( BOARD_MCK / MB_TIMER_PRESCALER ) -#define MB_50US_TICKS ( 20000UL ) - -#define TCX ( TC0 ) -#define TCXIRQ ( TC0_IRQn ) -#define TCCHANNEL ( 0 ) -#define TCX_IRQHANDLER TC0_IrqHandler - -#define TC_CMRX_WAVE ( 0x1 << 15 ) -#define TC_CMRX_TCCLKS_TIMER_DIV4_CLOCK ( 0x3 << 0 ) -#define TC_CMRX_CPCSTOP ( 0x1 << 6 ) -#define TC_CMRX_WAVESEL_UP_RC ( 0x2 << 13 ) - -#define TC_IERX_CPCS ( 0x1 << 4 ) -#define TC_IERX_CPAS ( 0x1 << 2 ) -#define TC_SRX_CPAS ( 0x1 << 2 ) -#if MB_TIMER_DEBUG == 1 -#define TIMER_PIN { 1 << 6, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT } -#endif - -/* ----------------------- Static variables ---------------------------------*/ -#if MB_TIMER_DEBUG == 1 -const static Pin xTimerDebugPins[] = { TIMER_PIN }; -#endif - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ -#if MB_TIMER_DEBUG == 1 - PIO_Configure( xTimerDebugPins, PIO_LISTSIZE( xTimerDebugPins ) ); -#endif - NVIC_DisableIRQ( TCXIRQ ); - - PMC_EnablePeripheral( ID_TC0 ); - TC_Configure( TCX, 0, TC_CMRX_WAVE | TC_CMRX_TCCLKS_TIMER_DIV4_CLOCK | TC_CMRX_WAVESEL_UP_RC | TC_CMRX_CPCSTOP ); - TCX->TC_CHANNEL[TCCHANNEL].TC_RA = ( MB_TIMER_TICKS * usTim1Timerout50us ) / ( MB_50US_TICKS ); - TCX->TC_CHANNEL[TCCHANNEL].TC_RC = ( MB_TIMER_TICKS * usTim1Timerout50us ) / ( MB_50US_TICKS ); - - NVIC_ClearPendingIRQ( TCXIRQ ); - NVIC_SetPriority( TCXIRQ, 0xF << 4 ); - NVIC_EnableIRQ( TCXIRQ ); - - return TRUE; -} - -void -vMBPortTimerClose( void ) -{ - NVIC_DisableIRQ( TCXIRQ ); - PMC_DisablePeripheral( ID_TC0 ); -} - -void -vMBPortTimersEnable( ) -{ -#if MB_TIMER_DEBUG == 1 - PIO_Set( &xTimerDebugPins[0] ); -#endif - TCX->TC_CHANNEL[TCCHANNEL].TC_IER = TC_IERX_CPAS; - TC_Start( TCX, 0 ); -} - -void -vMBPortTimersDisable( ) -{ - TC_Stop( TCX, 0 ); -#if MB_TIMER_DEBUG == 1 - PIO_Clear( &xTimerDebugPins[0] ); -#endif -} - -void -vMBPortTimersDelay( USHORT usTimeOutMS ) -{ - vTaskDelay( usTimeOutMS / portTICK_RATE_MS ); -} - -void -TCX_IRQHANDLER( void ) -{ - uint32_t xTCX_IMRX = TCX->TC_CHANNEL[TCCHANNEL].TC_IMR; - uint32_t xTCX_SRX = TCX->TC_CHANNEL[TCCHANNEL].TC_SR; - uint32_t uiSRMasked = xTCX_SRX & xTCX_IMRX; - BOOL bTaskWoken = FALSE; - - vMBPortSetWithinException( TRUE ); - - if( ( uiSRMasked & TC_SRX_CPAS ) > 0 ) - { -#if MB_TIMER_DEBUG == 1 - PIO_Clear( &xTimerDebugPins[0] ); -#endif - ( void )pxMBPortCBTimerExpired( ); - } - vMBPortSetWithinException( FALSE ); - - portEND_SWITCHING_ISR( bTaskWoken ? pdTRUE : pdFALSE ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/Makefile b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/Makefile deleted file mode 100644 index 5bc60a72..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/Makefile +++ /dev/null @@ -1,103 +0,0 @@ -############################################################################### -# Makefile for the project AVR -############################################################################### - -## General Flags -PROJECT = demo -MCU = atmega168 -TARGET = demo - -CC=/opt/gcc-avr/bin/avr-gcc -OBJCOPY=/opt/gcc-avr/bin/avr-objcopy -AVRDUDE=/opt/gcc-avr/bin/avrdude - -## Options common to compile, link and assembly rules -COMMON = -mmcu=$(MCU) - -## Compile options common for all C compilation units. -CFLAGS = $(COMMON) \ - -Iport -I. \ - -I../../modbus/rtu -I../../modbus/ascii -I../../modbus/include -CFLAGS += -Wall -gstabs -DF_CPU=20000000UL -Os -Wall -Wstrict-prototypes - -CFLAGS += -Wp,-M,-MP,-MT,$(*F).o,-MF,dep/$(@F).d - -## Assembly specific flags -ASMFLAGS = $(COMMON) -ASMFLAGS += -x assembler-with-cpp -Wa,-gstabs - -## Linker flags -LDFLAGS = $(COMMON) -LDFLAGS += -Wl,-Map=$(TARGET).map,--cref - -## Intel Hex file production flags -HEX_FLASH_FLAGS = -R .eeprom - -HEX_EEPROM_FLAGS = -j .eeprom -HEX_EEPROM_FLAGS += --set-section-flags=.eeprom="alloc,load" -HEX_EEPROM_FLAGS += --change-section-lma .eeprom=0 - - -## Objects that must be built in order to link -#OBJECTS = excoils.o -OBJECTS = demo.o -MBPORTOBJECTS = port/portserial.o \ - port/portevent.o \ - port/porttimer.o \ - port/mbcrc.o -MBOBJECTS = ../../modbus/mb.o \ - ../../modbus/rtu/mbrtu.o \ - ../../modbus/ascii/mbascii.o \ - ../../modbus/functions/mbfunccoils.o \ - ../../modbus/functions/mbfuncdiag.o \ - ../../modbus/functions/mbfuncholding.o \ - ../../modbus/functions/mbfuncinput.o \ - ../../modbus/functions/mbfuncother.o \ - ../../modbus/functions/mbfuncdisc.o \ - ../../modbus/functions/mbutils.o - - -## Build -all: $(TARGET).elf $(TARGET).cof $(TARGET).hex $(TARGET).eep - -## Compile -demo.o: demo.c - $(CC) $(INCLUDES) $(CFLAGS) -c $< - -##Link -$(TARGET).elf: $(OBJECTS) $(MBOBJECTS) $(MBPORTOBJECTS) - $(CC) $(LDFLAGS) $(OBJECTS) $(MBPORTOBJECTS) $(MBOBJECTS) $(LIBDIRS) $(LIBS) -o $(TARGET).elf - -%.hex: $(TARGET).elf - $(OBJCOPY) -O ihex $(HEX_FLASH_FLAGS) $< $@ - -%.cof: $(TARGET).elf - $(OBJCOPY) --debugging \ - --change-section-address .data-0x800000 \ - --change-section-address .bss-0x800000 \ - --change-section-address .noinit-0x800000 \ - --change-section-address .eeprom-0x810000 -O coff-avr $< $@ - -%.eep: $(TARGET).elf - $(OBJCOPY) $(HEX_EEPROM_FLAGS) -O ihex $< $@ - -%.lss: $(TARGET) - $(OBJCOPY) -h -S $< > $@ - -flash: - $(AVRDUDE) -p m168 -c stk200 -U flash:w:$(TARGET).hex - -#size: ${TARGET} -# @echo -# @sh avr-mem.sh ${TARGET} ${MCU} - -## Clean target -.PHONY: clean -clean: - -rm -rf $(OBJECTS) $(MBOBJECTS) $(MBPORTOBJECTS) - -rm -rf $(TARGET).elf $(TARGET).hex $(TARGET).eep $(TARGET).cof $(TARGET).map - -rm -rf dep - -## Other dependencies --include $(shell mkdir dep 2>/dev/null) $(wildcard dep/*) - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/README.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/README.txt deleted file mode 100644 index bdceaf1b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/README.txt +++ /dev/null @@ -1,81 +0,0 @@ - - FREEMODBUS 0.4 AVR EXAMPLE - ========================== - -REQUIREMENTS -============ - -This example contains a simple demo program for FreeMODBUS for an ATMega168 -processor. It requires a wired serial port to a host processor and a Modbus -Master Software on the PC side to be useful. Demo versions of Modbus Masters -can be found in [1] and [2]. - -In addition it requires an ATMega168 target microcontroller. The micro- -controller must be configured for 20Mhz if the binary image is going to -be used. Otherwise the constant F_CPU in the Makefile must be changed -and the source code recompiled. - -INSTALLATION -============ - -If avrdude [3] is used for flashing the Makefile contains a target 'flash' -which can be executed by calling 'make flash'. This programs the micro- -controller with the current binary named 'demo.hex'. - -SOURCE -====== - -If one wants to recompile the software the WinAVR tools should be installed -if the host platform is Microsoft Windows. For Unix the necessary tools -must be recompiled from source. The WinAVR tools can be found at [4]. - -TESTING -======= - -Start the Modbus Sample Application and test if the input registers starting -at protocol address 1000 can be read. There are four registers value available -and the output should look like: - -Polling slave (Ctrl-C to stop) ... -[1000]: 6474 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... -[1000]: -8831 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... - -The simple testing utility used in the 'demo_rtu.bat' script can be found -at [5]. - -PROBLEMS -======== - -If the provided binary is not working as expected make sure that the fuse -bits for the microcontroller are programmed correctly. In addition it would -be a good idea to download a simple serial test programm to test serial -communication with the host. The fuse bits required for an ATMega168 with -an 20Mhz crystal must be set to the following values: - - Fuse Low Byte: 1XXXXXX - | - CKDIV8 - -The other values depend on the crystal used and the startup time. The -authors configuration used a value of 0xFF. Again if avrdude is used the -value can be set by: - - avrdude -p m168 -c stk200 -U lfuse:w:0xFF:m - -where the 0xFF at the end of line is the actual value. - -[1] WinTech ModScan32: http://www.win-tech.com/html/modscan32.htm -[2] Modus Poll: http://www.modbustools.com/modbus_poll.asp -[3] AVRDUDE AVR Downloader/UploaDEr: http://www.nongnu.org/avrdude/ -[4] WinAVR: http://winavr.sourceforge.net/ -[5] FieldTalk Modpoll: http://www.focus-sw.com/fieldtalk/modpoll.html - -Version: $Id: README.txt,v 1.1 2006/05/08 21:07:01 wolti Exp $ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/avrdude.conf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/avrdude.conf deleted file mode 100644 index 09f2bc3c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/avrdude.conf +++ /dev/null @@ -1,6846 +0,0 @@ -# $Id: avrdude.conf,v 1.1 2006/02/25 18:40:46 wolti Exp $ -# -# AVRDUDE Configuration File -# -# This file contains configuration data used by AVRDUDE which describes -# the programming hardware pinouts and also provides part definitions. -# AVRDUDE's "-C" command line option specifies the location of the -# configuration file. The "-c" option names the programmer configuration -# which must match one of the entry's "id" parameter. The "-p" option -# identifies which part AVRDUDE is going to be programming and must match -# one of the parts' "id" parameter. -# -# Possible entry formats are: -# -# programmer -# id = [, [, ] ...] ; # are quoted strings -# desc = ; # quoted string -# type = par | stk500 | stk500v2 | avr910 | jtagmki | jtagmkii; # programmer type -# baudrate = ; # baudrate for avr910-programmer -# vcc = [, ... ] ; # pin number(s) -# reset = ; # pin number -# sck = ; # pin number -# mosi = ; # pin number -# miso = ; # pin number -# errled = ; # pin number -# rdyled = ; # pin number -# pgmled = ; # pin number -# vfyled = ; # pin number -# ; -# -# part -# id = ; # quoted string -# desc = ; # quoted string -# has_jtag = ; # part has JTAG i/f -# devicecode = ; # deprecated, use stk500_devcode -# stk500_devcode = ; # numeric -# avr910_devcode = ; # numeric -# chip_erase_delay = ; # micro-seconds -# reset = dedicated | io; -# retry_pulse = reset | sck; -# pgm_enable = ; -# chip_erase = ; -# chip_erase_delay = ; # chip erase delay (us) -# # STK500 parameters (parallel programming IO lines) -# pagel = ; # pin name in hex, i.e., 0xD7 -# bs2 = ; # pin name in hex, i.e., 0xA0 -# serial = ; # can use serial downloading -# parallel = ; # can use par. programming -# # STK500v2 parameters, to be taken from Atmel's XML files -# timeout = ; -# stabdelay = ; -# cmdexdelay = ; -# synchloops = ; -# bytedelay = ; -# pollvalue = ; -# pollindex = ; -# predelay = ; -# postdelay = ; -# pollmethod = ; -# mode = ; -# delay = ; -# blocksize = ; -# readsize = ; -# # JTAG ICE mkII parameters, also from XML files -# allowfullpagebitstream = ; -# enablepageprogramming = ; -# idr = ; # IO addr of IDR (OCD) reg. -# rampz = ; # IO addr of RAMPZ reg. -# spmcr = ; # mem addr of SPMC[S]R reg. -# eecr = ; # mem addr of EECR reg. -# # (only when != 0x3c) -# -# memory -# paged = ; # yes / no -# size = ; # bytes -# page_size = ; # bytes -# num_pages = ; # numeric -# min_write_delay = ; # micro-seconds -# max_write_delay = ; # micro-seconds -# readback_p1 = ; # byte value -# readback_p2 = ; # byte value -# pwroff_after_write = ; # yes / no -# read = ; -# write = ; -# read_lo = ; -# read_hi = ; -# write_lo = ; -# write_hi = ; -# loadpage_lo = ; -# loadpage_hi = ; -# writepage = ; -# ; -# ; -# -# If any of the above parameters are not specified, the default value -# of 0 is used for numerics or the empty string ("") for string -# values. If a required parameter is left empty, AVRDUDE will -# complain. -# -# NOTES: -# * 'devicecode' is the device code used by the STK500 (see codes -# listed below) -# * Not all memory types will implement all instructions. -# * AVR Fuse bits and Lock bits are implemented as a type of memory. -# * Example memory types are: -# "flash", "eeprom", "fuse", "lfuse" (low fuse), "hfuse" (high -# fuse), "signature", "calibration", "lock" -# * The memory type specified on the avrdude command line must match -# one of the memory types defined for the specified chip. -# * The pwroff_after_write flag causes avrdude to attempt to -# power the device off and back on after an unsuccessful write to -# the affected memory area if VCC programmer pins are defined. If -# VCC pins are not defined for the programmer, a message -# indicating that the device needs a power-cycle is printed out. -# This flag was added to work around a problem with the -# at90s4433/2333's; see the at90s4433 errata at: -# -# http://www.atmel.com/atmel/acrobat/doc1280.pdf -# -# INSTRUCTION FORMATS -# -# Instruction formats are specified as a comma seperated list of -# string values containing information (bit specifiers) about each -# of the 32 bits of the instruction. Bit specifiers may be one of -# the following formats: -# -# '1' = the bit is always set on input as well as output -# -# '0' = the bit is always clear on input as well as output -# -# 'x' = the bit is ignored on input and output -# -# 'a' = the bit is an address bit, the bit-number matches this bit -# specifier's position within the current instruction byte -# -# 'aN' = the bit is the Nth address bit, bit-number = N, i.e., a12 -# is address bit 12 on input, a0 is address bit 0. -# -# 'i' = the bit is an input data bit -# -# 'o' = the bit is an output data bit -# -# Each instruction must be composed of 32 bit specifiers. The -# instruction specification closely follows the instruction data -# provided in Atmel's data sheets for their parts. -# -# See below for some examples. -# -# -# The following are STK500 part device codes to use for the -# "devicecode" field of the part. These came from Atmel's software -# section avr061.zip which accompanies the application note -# AVR061 available from: -# -# http://www.atmel.com/atmel/acrobat/doc2525.pdf -# - -#define ATTINY10 0x10 -#define ATTINY11 0x11 -#define ATTINY12 0x12 -#define ATTINY15 0x13 -#define ATTINY13 0x14 - -#define ATTINY22 0x20 -#define ATTINY26 0x21 -#define ATTINY28 0x22 -#define ATTINY2313 0x23 - -#define AT90S1200 0x33 - -#define AT90S2313 0x40 -#define AT90S2323 0x41 -#define AT90S2333 0x42 -#define AT90S2343 0x43 - -#define AT90S4414 0x50 -#define AT90S4433 0x51 -#define AT90S4434 0x52 -#define ATMEGA48 0x59 - -#define AT90S8515 0x60 -#define AT90S8535 0x61 -#define AT90C8534 0x62 -#define ATMEGA8515 0x63 -#define ATMEGA8535 0x64 - -#define ATMEGA8 0x70 -#define ATMEGA88 0x73 -#define ATMEGA168 0x86 - -#define ATMEGA161 0x80 -#define ATMEGA163 0x81 -#define ATMEGA16 0x82 -#define ATMEGA162 0x83 -#define ATMEGA169 0x84 - -#define ATMEGA323 0x90 -#define ATMEGA32 0x91 - -#define ATMEGA64 0xA0 - -#define ATMEGA103 0xB1 -#define ATMEGA128 0xB2 -#define AT90CAN128 0xB3 - -#define AT86RF401 0xD0 - -#define AT89START 0xE0 -#define AT89S51 0xE0 -#define AT89S52 0xE1 - - -# -# Overall avrdude defaults -# -default_parallel = "lpt1"; -default_serial = "com1"; - - -# -# PROGRAMMER DEFINITIONS -# - -programmer - id = "avrisp"; - desc = "Atmel AVR ISP"; - type = stk500; -; - -programmer - id = "avrispv2"; - desc = "Atmel AVR ISP V2"; - type = stk500v2; -; - -programmer - id = "avrispmkII"; - desc = "Atmel AVR ISP mkII"; - type = stk500v2; -; - -programmer - id = "avrisp2"; - desc = "Atmel AVR ISP mkII"; - type = stk500v2; -; - -programmer - id = "stk500"; - desc = "Atmel STK500"; - type = stk500; -; - -programmer - id = "stk500v2"; - desc = "Atmel STK500 V2"; - type = stk500v2; -; - -programmer - id = "avr910"; - desc = "Atmel Low Cost Serial Programmer"; - type = avr910; -; - -programmer - id = "butterfly"; - desc = "Atmel Butterfly Development Board"; - type = butterfly; -; - -programmer - id = "avr109"; - desc = "Atmel AppNote AVR109 Boot Loader"; - type = butterfly; -; - -programmer - id = "avr911"; - desc = "Atmel AppNote AVR911 AVROSP"; - type = butterfly; -; - -programmer - id = "jtagmkI"; - desc = "Atmel JTAG ICE (mkI)"; - baudrate = 115200; # default is 115200 - type = jtagmki; -; - -# easier to type -programmer - id = "jtag1"; - desc = "Atmel JTAG ICE (mkI)"; - baudrate = 115200; # default is 115200 - type = jtagmki; -; - -# easier to type -programmer - id = "jtag1slow"; - desc = "Atmel JTAG ICE (mkI)"; - baudrate = 19200; - type = jtagmki; -; - -programmer - id = "jtagmkII"; - desc = "Atmel JTAG ICE mkII"; - baudrate = 19200; # default is 19200 - type = jtagmkii; -; - -# easier to type -programmer - id = "jtag2slow"; - desc = "Atmel JTAG ICE mkII"; - baudrate = 19200; # default is 19200 - type = jtagmkii; -; - -# JTAG ICE mkII @ 115200 Bd -programmer - id = "jtag2fast"; - desc = "Atmel JTAG ICE mkII"; - baudrate = 115200; - type = jtagmkii; -; - -# make the fast one the default, people will love that -programmer - id = "jtag2"; - desc = "Atmel JTAG ICE mkII"; - baudrate = 115200; - type = jtagmkii; -; - -programmer - id = "pavr"; - desc = "Jason Kyle's pAVR Serial Programmer"; - type = avr910; -; - -# Parallel port programmers. - -programmer - id = "bsd"; - desc = "Brian Dean's Programmer, http://www.bsdhome.com/avrdude/"; - type = par; - vcc = 2, 3, 4, 5; - reset = 7; - sck = 8; - mosi = 9; - miso = 10; -; - -programmer - id = "stk200"; - desc = "STK200"; - type = par; - buff = 4, 5; - sck = 6; - mosi = 7; - reset = 9; - miso = 10; -; - -# The programming dongle used by the popular Ponyprog -# utility. It is almost similar to the STK200 one, -# except that there is a LED indicating that the -# programming is currently in progress. - -programmer - id = "pony-stk200"; - desc = "Pony Prog STK200"; - type = par; - buff = 4, 5; - sck = 6; - mosi = 7; - reset = 9; - miso = 10; - pgmled = 8; -; - -programmer - id = "dt006"; - desc = "Dontronics DT006"; - type = par; - reset = 4; - sck = 5; - mosi = 2; - miso = 11; -; - -programmer - id = "bascom"; - desc = "Bascom SAMPLE programming cable"; - type = par; - reset = 4; - sck = 5; - mosi = 2; - miso = 11; -; - -programmer - id = "alf"; - desc = "Nightshade ALF-PgmAVR, http://nightshade.homeip.net/"; - type = par; - vcc = 2, 3, 4, 5; - buff = 6; - reset = 7; - sck = 8; - mosi = 9; - miso = 10; - errled = 1; - rdyled = 14; - pgmled = 16; - vfyled = 17; -; - -programmer - id = "sp12"; - desc = "Steve Bolt's Programmer"; - type = par; - vcc = 4,5,6,7,8; - reset = 3; - sck = 2; - mosi = 9; - miso = 11; -; - -programmer - id = "picoweb"; - desc = "Picoweb Programming Cable, http://www.picoweb.net/"; - type = par; - reset = 2; - sck = 3; - mosi = 4; - miso = 13; -; - -programmer - id = "abcmini"; - desc = "ABCmini Board, aka Dick Smith HOTCHIP"; - type = par; - reset = 4; - sck = 3; - mosi = 2; - miso = 10; -; - -programmer - id = "futurlec"; - desc = "Futurlec.com programming cable."; - type = par; - reset = 3; - sck = 2; - mosi = 1; - miso = 10; -; - - -# From the contributor of the "xil" jtag cable: -# The "vcc" definition isn't really vcc (the cable gets its power from -# the programming circuit) but is necessary to switch one of the -# buffer lines (trying to add it to the "buff" lines doesn't work). -# With this, TMS connects to RESET, TDI to MOSI, TDO to MISO and TCK -# to SCK (plus vcc/gnd of course) -programmer - id = "xil"; - desc = "Xilinx JTAG cable"; - type = par; - mosi = 2; - sck = 3; - reset = 4; - buff = 5; - miso = 13; - vcc = 6; -; - - -programmer - id = "dapa"; - desc = "Direct AVR Parallel Access cable"; - type = par; - vcc = 3; - reset = 16; - sck = 1; - mosi = 2; - miso = 11; -; - - -# -# some ultra cheap programmers use bitbanging on the -# serialport. -# - -# serial ponyprog design (dasa2 in uisp) -# reset=!txd sck=rts mosi=dtr miso=cts - -programmer - id = "ponyser"; - desc = "serial port banging, design ponyprog serial"; - type = serbb; - reset = ~3; - sck = 6; - mosi = 4; - miso = 7; -; - -# unknown (dasa in uisp) -# reset=rts sck=dtr mosi=txd miso=cts - -programmer - id = "dasa"; - desc = "serial port banging, reset=rts sck=dtr mosi=txd miso=cts"; - type = serbb; - reset = 6; - sck = 4; - mosi = 3; - miso = 7; -; - -# unknown (dasa3 in uisp) -# reset=!dtr sck=rts mosi=txd miso=cts - -programmer - id = "dasa3"; - desc = "serial port banging, reset=!dtr sck=rts mosi=txd miso=cts"; - type = serbb; - reset = ~4; - sck = 6; - mosi = 3; - miso = 7; -; - -# -# PART DEFINITIONS -# - -#------------------------------------------------------------ -# ATtiny12 -#------------------------------------------------------------ - -part - id = "t12"; - desc = "ATtiny12"; - stk500_devcode = 0x12; - avr910_devcode = 0x55; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 64; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x x a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x x a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 8; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - size = 1024; - min_write_delay = 4500; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 5; - blocksize = 128; - readsize = 256; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "fuse" - size = 1; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 x x x x x", - "x x x x x x x x i i i i i i i i"; - ; -; - -#------------------------------------------------------------ -# ATtiny13 -#------------------------------------------------------------ - -part - id = "t13"; - desc = "ATtiny13"; - stk500_devcode = 0x14; - chip_erase_delay = 4000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 64; - min_write_delay = 4000; - max_write_delay = 4000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "x x a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "x x a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x41; - delay = 5; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 1024; - page_size = 32; - num_pages = 32; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 0 0 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 0 0 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 0 0 a8", - " a7 a6 a5 a4 x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - -; - - -#------------------------------------------------------------ -# ATtiny15 -#------------------------------------------------------------ - -part - id = "t15"; - desc = "ATtiny15"; - stk500_devcode = 0x13; - avr910_devcode = 0x56; - chip_erase_delay = 8200; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 64; - min_write_delay = 8200; - max_write_delay = 8200; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x x a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x x a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 10; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - size = 1024; - min_write_delay = 4100; - max_write_delay = 4100; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 5; - blocksize = 128; - readsize = 256; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "fuse" - size = 1; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x o o o o x x o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 x x x x x", - "x x x x x x x x i i i i 1 1 i i"; - ; -; - -#------------------------------------------------------------ -# AT90s1200 -#------------------------------------------------------------ - -part - id = "1200"; - desc = "AT90S1200"; - stk500_devcode = 0x33; - avr910_devcode = 0x13; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 1; - bytedelay = 0; - pollindex = 0; - pollvalue = 0xFF; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 64; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x x a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x x a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 20; - blocksize = 32; - readsize = 256; - ; - memory "flash" - size = 1024; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x02; - delay = 15; - blocksize = 128; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 i i i i i", - "x x x x x x x x x x x x x x x x"; - ; - memory "lock" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - ; - -#------------------------------------------------------------ -# AT90s4414 -#------------------------------------------------------------ - -part - id = "4414"; - desc = "AT90S4414"; - stk500_devcode = 0x50; - avr910_devcode = 0x28; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 256; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x80; - readback_p2 = 0x7f; - read = " 1 0 1 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 64; - readsize = 256; - ; - memory "flash" - size = 4096; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x7f; - readback_p2 = 0x7f; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 64; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90s2313 -#------------------------------------------------------------ - -part - id = "2313"; - desc = "AT90S2313"; - stk500_devcode = 0x40; - avr910_devcode = 0x20; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 128; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0x80; - readback_p2 = 0x7f; - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 64; - readsize = 256; - ; - memory "flash" - size = 2048; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0x7f; - readback_p2 = 0x7f; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x i i x", - "x x x x x x x x x x x x x x x x"; - ; - ; - -#------------------------------------------------------------ -# AT90s2333 -#------------------------------------------------------------ - -part - id = "2333"; -##### WARNING: No XML file for device 'AT90S2333'! ##### - desc = "AT90S2333"; - stk500_devcode = 0x42; - avr910_devcode = 0x34; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - memory "eeprom" - size = 128; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x00; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - ; - memory "flash" - size = 2048; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - pwroff_after_write = yes; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 i i i i i", - "x x x x x x x x x x x x x x x x"; - ; - memory "lock" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - ; - - -#------------------------------------------------------------ -# AT90s2343 (also AT90s2323 and ATtiny22) -#------------------------------------------------------------ - -part - id = "2343"; - desc = "AT90S2343"; - stk500_devcode = 0x43; - avr910_devcode = 0x4c; - chip_erase_delay = 18000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 128; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x00; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 64; - readsize = 256; - ; - memory "flash" - size = 2048; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 128; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x o o o x x x x o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 1 1 1 1 i", - "x x x x x x x x x x x x x x x x"; - ; - memory "lock" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x o o o x x x x o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - ; - - -#------------------------------------------------------------ -# AT90s4433 -#------------------------------------------------------------ - -part - id = "4433"; - desc = "AT90S4433"; - stk500_devcode = 0x51; - avr910_devcode = 0x30; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 256; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x00; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0 x x x x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0 x x x x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "flash" - size = 4096; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - pwroff_after_write = yes; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 i i i i i", - "x x x x x x x x x x x x x x x x"; - ; - memory "lock" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - ; - -#------------------------------------------------------------ -# AT90s4434 -#------------------------------------------------------------ - -part - id = "4434"; -##### WARNING: No XML file for device 'AT90S4434'! ##### - desc = "AT90S4434"; - stk500_devcode = 0x52; - avr910_devcode = 0x6c; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - memory "eeprom" - size = 256; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x00; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0 x x x x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0 x x x x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - ; - memory "flash" - size = 4096; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 i i i i i", - "x x x x x x x x x x x x x x x x"; - ; - memory "lock" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - ; - -#------------------------------------------------------------ -# AT90s8515 -#------------------------------------------------------------ - -part - id = "8515"; - desc = "AT90S8515"; - stk500_devcode = 0x60; - avr910_devcode = 0x38; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 512; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0x80; - readback_p2 = 0x7f; - read = " 1 0 1 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "flash" - size = 8192; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0x7f; - readback_p2 = 0x7f; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x x x o"; - write = "1 0 1 0 1 1 0 0 1 0 1 1 1 1 1 i", - "x x x x x x x x x x x x x x x x"; - ; - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x o o x x x x x x"; - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - ; - -#------------------------------------------------------------ -# AT90s8535 -#------------------------------------------------------------ - -part - id = "8535"; - desc = "AT90S8535"; - stk500_devcode = 0x61; - avr910_devcode = 0x68; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 512; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x00; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "flash" - size = 8192; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x x x o"; - write = "1 0 1 0 1 1 0 0 1 0 1 1 1 1 1 i", - "x x x x x x x x x x x x x x x x"; - ; - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x o o x x x x x x"; - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - ; - -#------------------------------------------------------------ -# ATmega103 -#------------------------------------------------------------ - -part - id = "m103"; - desc = "ATMEGA103"; - stk500_devcode = 0xB1; - avr910_devcode = 0x41; - chip_erase_delay = 112000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 4096; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0x80; - readback_p2 = 0x7f; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 22000; - max_write_delay = 56000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x11; - delay = 70; - blocksize = 256; - readsize = 256; - ; - - memory "fuse" - size = 1; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x x x o x o 1 o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 1 i 1 i i", - "x x x x x x x x x x x x x x x x"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega64 -#------------------------------------------------------------ - -part - id = "m64"; - desc = "ATMEGA64"; - has_jtag = yes; - stk500_devcode = 0xA0; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - idr = 0x22; - spmcr = 0x68; - allowfullpagebitstream = yes; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 20; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - - - -#------------------------------------------------------------ -# ATmega128 -#------------------------------------------------------------ - -part - id = "m128"; - desc = "ATMEGA128"; - has_jtag = yes; - stk500_devcode = 0xB2; - avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - idr = 0x22; - spmcr = 0x68; - rampz = 0x3b; - allowfullpagebitstream = yes; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 4; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90CAN128 -#------------------------------------------------------------ - -part - id = "c128"; - desc = "AT90CAN128"; - has_jtag = yes; - stk500_devcode = 0xB3; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - eecr = 0x3f; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega16 -#------------------------------------------------------------ - -part - id = "m16"; - desc = "ATMEGA16"; - has_jtag = yes; - stk500_devcode = 0x82; - avr910_devcode = 0x74; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = yes; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega164 -#------------------------------------------------------------ - -# close to ATmega16 - -part - id = "m164"; - desc = "ATMEGA164"; - has_jtag = yes; -# stk500_devcode = 0x82; # no STK500v1 support -# avr910_devcode = 0x?; # try the ATmega16 one:^ - avr910_devcode = 0x74; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega324 -#------------------------------------------------------------ - -# similar to ATmega164 - -part - id = "m324"; - desc = "ATMEGA324"; - has_jtag = yes; -# stk500_devcode = 0x82; # no STK500v1 support -# avr910_devcode = 0x?; # try the ATmega16 one:^ - avr910_devcode = 0x74; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 256; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega644 -#------------------------------------------------------------ - -# similar to ATmega164 - -part - id = "m644"; - desc = "ATMEGA644"; - has_jtag = yes; -# stk500_devcode = 0x82; # no STK500v1 support -# avr910_devcode = 0x?; # try the ATmega16 one:^ - avr910_devcode = 0x74; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega162 -#------------------------------------------------------------ - -part - id = "m162"; - desc = "ATMEGA162"; - has_jtag = yes; - stk500_devcode = 0x83; - chip_erase_delay = 9000; - pagel = 0xd7; - bs2 = 0xa0; - - idr = 0x04; - spmcr = 0x57; - allowfullpagebitstream = yes; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - mode = 0x41; - delay = 10; - blocksize = 128; - readsize = 256; - - ; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 16000; - max_write_delay = 16000; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 16000; - max_write_delay = 16000; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 16000; - max_write_delay = 16000; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 16000; - max_write_delay = 16000; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - - read = "0 0 1 1 0 0 0 0 0 0 x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; -; - - - -#------------------------------------------------------------ -# ATmega163 -#------------------------------------------------------------ - -part - id = "m163"; - desc = "ATMEGA163"; - stk500_devcode = 0x81; - avr910_devcode = 0x64; - chip_erase_delay = 32000; - pagel = 0xd7; - bs2 = 0xa0; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - memory "eeprom" - size = 512; - min_write_delay = 4000; - max_write_delay = 4000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 16000; - max_write_delay = 16000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o x x o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i 1 1 i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x 1 o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x 0 x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega169 -#------------------------------------------------------------ - -part - id = "m169"; - desc = "ATMEGA169"; - has_jtag = yes; - stk500_devcode = 0x85; - avr910_devcode = 0x75; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - idr = 0x31; - spmcr = 0x57; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "lock" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega329 -#------------------------------------------------------------ - -part - id = "m329"; - desc = "ATMEGA329"; - has_jtag = yes; -# stk500_devcode = 0x85; # no STK500 support, only STK500v2 -# avr910_devcode = 0x?; # try the ATmega169 one: - avr910_devcode = 0x75; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - idr = 0x31; - spmcr = 0x57; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i x"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega3290 -#------------------------------------------------------------ - -# identical to ATmega329 - -part - id = "m3290"; - desc = "ATMEGA3290"; - has_jtag = yes; -# stk500_devcode = 0x85; # no STK500 support, only STK500v2 -# avr910_devcode = 0x?; # try the ATmega169 one: - avr910_devcode = 0x75; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - idr = 0x31; - spmcr = 0x57; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i x"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega649 -#------------------------------------------------------------ - -part - id = "m649"; - desc = "ATMEGA649"; - has_jtag = yes; -# stk500_devcode = 0x85; # no STK500 support, only STK500v2 -# avr910_devcode = 0x?; # try the ATmega169 one: - avr910_devcode = 0x75; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - idr = 0x31; - spmcr = 0x57; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i x"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega6490 -#------------------------------------------------------------ - -# identical to ATmega649 - -part - id = "m6490"; - desc = "ATMEGA6490"; - has_jtag = yes; -# stk500_devcode = 0x85; # no STK500 support, only STK500v2 -# avr910_devcode = 0x?; # try the ATmega169 one: - avr910_devcode = 0x75; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - idr = 0x31; - spmcr = 0x57; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i x"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega32 -#------------------------------------------------------------ - -part - id = "m32"; - desc = "ATMEGA32"; - has_jtag = yes; - stk500_devcode = 0x91; - avr910_devcode = 0x72; - chip_erase_delay = 9000; - pagel = 0xd7; - bs2 = 0xa0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = yes; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 10; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega161 -#------------------------------------------------------------ - -part - id = "m161"; - desc = "ATMEGA161"; - stk500_devcode = 0x80; - avr910_devcode = 0x60; - chip_erase_delay = 28000; - pagel = 0xd7; - bs2 = 0xa0; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 512; - min_write_delay = 3400; - max_write_delay = 3400; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 5; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 14000; - max_write_delay = 14000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 16; - blocksize = 128; - readsize = 256; - ; - - memory "fuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x x o x o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 x x x x x", - "x x x x x x x x 1 i 1 i i i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega8 -#------------------------------------------------------------ - -part - id = "m8"; - desc = "ATMEGA8"; - stk500_devcode = 0x70; - avr910_devcode = 0x76; - pagel = 0xd7; - bs2 = 0xc2; - chip_erase_delay = 10000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 10; - blocksize = 128; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 0 x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 0 x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 4; - read = "0 0 1 1 1 0 0 0 0 0 x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - - -#------------------------------------------------------------ -# ATmega8515 -#------------------------------------------------------------ - -part - id = "m8515"; - desc = "ATMEGA8515"; - stk500_devcode = 0x63; - avr910_devcode = 0x3A; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 10; - blocksize = 128; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 0 x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 0 x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 4; - read = "0 0 1 1 1 0 0 0 0 0 x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - - - -#------------------------------------------------------------ -# ATmega8535 -#------------------------------------------------------------ - -part - id = "m8535"; - desc = "ATMEGA8535"; - stk500_devcode = 0x64; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 10; - blocksize = 128; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 0 x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 0 x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATtiny26 -#------------------------------------------------------------ - -part - id = "t26"; - desc = "ATTINY26"; - stk500_devcode = 0x21; - avr910_devcode = 0x5e; - pagel = 0xb3; - bs2 = 0xb2; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - memory "eeprom" - size = 128; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 10; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 2048; - page_size = 32; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 16; - readsize = 256; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x x o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 1 i i", - "x x x x x x x x x x x x x x x x"; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x x x x i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x o o o o o"; - ; - - memory "calibration" - size = 4; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - -; - - -#------------------------------------------------------------ -# ATmega48 -#------------------------------------------------------------ - -part - id = "m48"; - desc = "ATMEGA48"; - stk500_devcode = 0x59; -# avr910_devcode = 0x; - pagel = 0xd7; - bs2 = 0xc2; - chip_erase_delay = 45000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 256; - min_write_delay = 3600; - max_write_delay = 3600; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x x x x x", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x41; - delay = 5; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 4096; - page_size = 64; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x x x o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega88 -#------------------------------------------------------------ - -part - id = "m88"; - desc = "ATMEGA88"; - stk500_devcode = 0x73; -# avr910_devcode = 0x; - pagel = 0xd7; - bs2 = 0xc2; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 512; - min_write_delay = 3600; - max_write_delay = 3600; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x41; - delay = 5; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega168 -#------------------------------------------------------------ - -part - id = "m168"; - desc = "ATMEGA168"; - stk500_devcode = 0x86; - # avr910_devcode = 0x; - pagel = 0xd7; - bs2 = 0xc2; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 512; - min_write_delay = 3600; - max_write_delay = 3600; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 128; - readsize = 256; - - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; -; - -#------------------------------------------------------------ -# ATtiny2313 -#------------------------------------------------------------ - -part - id = "t2313"; - desc = "ATtiny2313"; - stk500_devcode = 0x23; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - pagel = 0xD4; - bs2 = 0xD6; - reset = io; - chip_erase_delay = 9000; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 128; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 2048; - page_size = 32; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - -# The information in the data sheet of April/2004 is wrong, this works: - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - -# The information in the data sheet of April/2004 is wrong, this works: - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - -# The information in the data sheet of April/2004 is wrong, this works: - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny2313 has Signature Bytes: 0x1E 0x91 0x0A. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; -# The Tiny2313 has calibration data for both 4 MHz and 8 MHz. -# The information in the data sheet of April/2004 is wrong, this works: - - memory "calibration" - size = 2; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90PWM2 -#------------------------------------------------------------ - -part - id = "pwm2"; - desc = "AT90PWM2"; - stk500_devcode = 0x65; -## avr910_devcode = ?; - pagel = 0xD8; - bs2 = 0xE2; - reset = io; - chip_erase_delay = 9000; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 512; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; -# AT90PWM2 has Signature Bytes: 0x1E 0x93 0x81. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90PWM3 -#------------------------------------------------------------ - -# Completely identical to AT90PWM2 (including the signature!) - -part - id = "pwm3"; - desc = "AT90PWM3"; - stk500_devcode = 0x65; -## avr910_devcode = ?; - pagel = 0xD8; - bs2 = 0xE2; - reset = io; - chip_erase_delay = 9000; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 512; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; -# AT90PWM2 has Signature Bytes: 0x1E 0x93 0x81. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny25 -#------------------------------------------------------------ - -part - id = "t25"; - desc = "ATtiny25"; -## no STK500 devcode in XML file, use the ATtiny45 one - stk500_devcode = 0x14; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - reset = io; - chip_erase_delay = 4500; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 128; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 2048; - page_size = 32; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny25 has Signature Bytes: 0x1E 0x91 0x08. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny45 -#------------------------------------------------------------ - -part - id = "t45"; - desc = "ATtiny45"; - stk500_devcode = 0x14; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - reset = io; - chip_erase_delay = 4500; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 256; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 4096; - page_size = 64; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny45 has Signature Bytes: 0x1E 0x92 0x08. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny85 -#------------------------------------------------------------ - -part - id = "t85"; - desc = "ATtiny85"; -## no STK500 devcode in XML file, use the ATtiny45 one - stk500_devcode = 0x14; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - reset = io; - chip_erase_delay = 4500; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 512; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x a8", - "a8 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny85 has Signature Bytes: 0x1E 0x93 0x08. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega640 -#------------------------------------------------------------ -# Almost same as ATmega1280, except for different memory sizes - -part - id = "m640"; - desc = "ATMEGA640"; -# Device ID 0x1e 0x96 0x08 - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega1280 -#------------------------------------------------------------ - -part - id = "m1280"; - desc = "ATMEGA1280"; -# Device ID 0x1e 0x97 0x03 - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega1281 -#------------------------------------------------------------ -# Identical to ATmega1280 - -part - id = "m1281"; - desc = "ATMEGA1281"; -# Device ID 0x1e 0x97 0x04 - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny24 -#------------------------------------------------------------ - -part - id = "t24"; - desc = "ATtiny24"; -## no STK500 devcode in XML file, use the ATtiny45 one - stk500_devcode = 0x14; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - reset = io; - chip_erase_delay = 4500; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 128; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 2048; - page_size = 32; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny24 has Signature Bytes: 0x1E 0x91 0x0B. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x x x x x x x i i"; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny44 -#------------------------------------------------------------ - -part - id = "t44"; - desc = "ATtiny44"; -## no STK500 devcode in XML file, use the ATtiny45 one - stk500_devcode = 0x14; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - reset = io; - chip_erase_delay = 4500; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 256; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 4096; - page_size = 64; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny44 has Signature Bytes: 0x1E 0x92 0x07. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x x x x x x x i i"; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny84 -#------------------------------------------------------------ - -part - id = "t84"; - desc = "ATtiny84"; -## no STK500 devcode in XML file, use the ATtiny45 one - stk500_devcode = 0x14; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - reset = io; - chip_erase_delay = 4500; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - memory "eeprom" - size = 512; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x a8", - "a8 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny84 has Signature Bytes: 0x1E 0x93 0x0C. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x x x x x x x i i"; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/demo.c deleted file mode 100644 index aefb6302..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/demo.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * FreeModbus Libary: AVR Demo Application - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- AVR includes -------------------------------------*/ -#include "avr/io.h" -#include "avr/interrupt.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - const UCHAR ucSlaveID[] = { 0xAA, 0xBB, 0xCC }; - eMBErrorCode eStatus; - - eStatus = eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); - - eStatus = eMBSetSlaveID( 0x34, TRUE, ucSlaveID, 3 ); - sei( ); - - /* Enable the Modbus Protocol Stack. */ - eStatus = eMBEnable( ); - - for( ;; ) - { - ( void )eMBPoll( ); - - /* Here we simply count the number of poll cycles. */ - usRegInputBuf[0]++; - } -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = - ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = - ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/demo_rtu.bat b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/demo_rtu.bat deleted file mode 100644 index 402b4757..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/demo_rtu.bat +++ /dev/null @@ -1 +0,0 @@ -..\..\tools\modpoll.exe -m rtu -a 10 -r 1000 -c 4 -t 3 -b 38400 -d 8 -p even COM1 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/demo_rtu.sh b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/demo_rtu.sh deleted file mode 100644 index 882c0876..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/demo_rtu.sh +++ /dev/null @@ -1 +0,0 @@ -../../tools/modpoll -m rtu -a 10 -r 1000 -c 4 -t 3 -b 38400 -d 8 -p even /dev/ttyS0 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/excoils.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/excoils.c deleted file mode 100644 index e3438efb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/excoils.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - * FreeModbus Libary: AVR Demo Application - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbutils.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_COILS_START 1000 -#define REG_COILS_SIZE 16 - -/* ----------------------- Static variables ---------------------------------*/ -static unsigned char ucRegCoilsBuf[REG_COILS_SIZE / 8]; - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - - /* Select either ASCII or RTU Mode. */ - ( void )eMBInit( MB_RTU, 0x0A, 0, 9600, MB_PAR_EVEN ); - - /* Enable the Modbus Protocol Stack. */ - ( void )eMBEnable( ); - for( ;; ) - { - /* Call the main polling loop of the Modbus protocol stack. */ - ( void )eMBPoll( ); - } -} - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, - eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - short iNCoils = ( short )usNCoils; - unsigned short usBitOffset; - - /* Check if we have registers mapped at this block. */ - if( ( usAddress >= REG_COILS_START ) && - ( usAddress + usNCoils <= REG_COILS_START + REG_COILS_SIZE ) ) - { - usBitOffset = ( unsigned short )( usAddress - REG_COILS_START ); - switch ( eMode ) - { - /* Read current values and pass to protocol stack. */ - case MB_REG_READ: - while( iNCoils > 0 ) - { - *pucRegBuffer++ = - xMBUtilGetBits( ucRegCoilsBuf, usBitOffset, - ( unsigned char )( iNCoils > - 8 ? 8 : - iNCoils ) ); - iNCoils -= 8; - usBitOffset += 8; - } - break; - - /* Update current register values. */ - case MB_REG_WRITE: - while( iNCoils > 0 ) - { - xMBUtilSetBits( ucRegCoilsBuf, usBitOffset, - ( unsigned char )( iNCoils > 8 ? 8 : iNCoils ), - *pucRegBuffer++ ); - iNCoils -= 8; - } - break; - } - - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/mbcrc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/mbcrc.c deleted file mode 100644 index ce09811b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/mbcrc.c +++ /dev/null @@ -1,119 +0,0 @@ -/* - * FreeModbus Libary: ATMega168 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ - -#include - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -static const PROGMEM UCHAR aucCRCHi[] = { - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, - 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, - 0x40, 0x01, 0xC0, - 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, - 0x81, 0x40, 0x01, - 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, - 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, - 0x00, 0xC1, 0x81, - 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, - 0x41, 0x01, 0xC0, - 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, - 0x80, 0x41, 0x01, - 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, - 0xC1, 0x81, 0x40, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, - 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, - 0x40, 0x01, 0xC0, - 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, - 0x81, 0x40, 0x01, - 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, - 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, - 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, - 0x40, 0x01, 0xC0, - 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, - 0x80, 0x41, 0x01, - 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, - 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, - 0x40 -}; - -static const PROGMEM UCHAR aucCRCLo[] = { - 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7, - 0x05, 0xC5, 0xC4, - 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E, 0x0A, 0xCA, 0xCB, - 0x0B, 0xC9, 0x09, - 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9, 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, - 0xDF, 0x1F, 0xDD, - 0x1D, 0x1C, 0xDC, 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, - 0x12, 0x13, 0xD3, - 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32, - 0x36, 0xF6, 0xF7, - 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D, 0xFF, 0x3F, 0x3E, - 0xFE, 0xFA, 0x3A, - 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38, 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, - 0x2A, 0xEA, 0xEE, - 0x2E, 0x2F, 0xEF, 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, - 0xE7, 0xE6, 0x26, - 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1, - 0x63, 0xA3, 0xA2, - 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4, 0x6C, 0xAC, 0xAD, - 0x6D, 0xAF, 0x6F, - 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB, 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, - 0xB9, 0x79, 0xBB, - 0x7B, 0x7A, 0xBA, 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, - 0x74, 0x75, 0xB5, - 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0, - 0x50, 0x90, 0x91, - 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97, 0x55, 0x95, 0x94, - 0x54, 0x9C, 0x5C, - 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E, 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, - 0x58, 0x98, 0x88, - 0x48, 0x49, 0x89, 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, - 0x4D, 0x4C, 0x8C, - 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83, - 0x41, 0x81, 0x80, - 0x40 -}; - -USHORT -usMBCRC16( UCHAR * pucFrame, USHORT usLen ) -{ - UCHAR ucCRCHi = 0xFF; - UCHAR ucCRCLo = 0xFF; - int iIndex; - - while( usLen-- ) - { - iIndex = ucCRCLo ^ *( pucFrame++ ); - ucCRCLo = ucCRCHi ^ pgm_read_byte( &aucCRCHi[iIndex] ); - ucCRCHi = pgm_read_byte( &aucCRCLo[iIndex] );; - } - return ucCRCHi << 8 | ucCRCLo; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/port.h deleted file mode 100644 index 665724d3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/port.h +++ /dev/null @@ -1,147 +0,0 @@ -/* - * FreeModbus Libary: AVR Port - * Copyright (C) 2006 Christian Walter - * - Initial version + ATmega168 support - * Modfications Copyright (C) 2006 Tran Minh Hoang: - * - ATmega8, ATmega16, ATmega32 support - * - RS485 support for DS75176 - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -/* ----------------------- Platform includes --------------------------------*/ - -#include -#include - -/* ----------------------- Defines ------------------------------------------*/ -#define INLINE inline -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#define ENTER_CRITICAL_SECTION( ) cli() -#define EXIT_CRITICAL_SECTION( ) sei() - -#define assert( x ) - -typedef char BOOL; - -typedef unsigned char UCHAR; -typedef char CHAR; - -typedef unsigned short USHORT; -typedef short SHORT; - -typedef unsigned long ULONG; -typedef long LONG; - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -/* ----------------------- AVR platform specifics ---------------------------*/ - -#if defined (__AVR_ATmega168__) -#define UCSRB UCSR0B -#define TXEN TXEN0 -#define RXEN RXEN0 -#define RXCIE RXCIE0 -#define TXCIE TXCIE0 -#define UDRE UDRE0 -#define UBRR UBRR0 -#define UCSRC UCSR0C -#define UPM1 UPM01 -#define UPM0 UPM00 -#define UCSZ0 UCSZ00 -#define UCSZ1 UCSZ01 -#define UDR UDR0 -#define SIG_UART_TRANS SIG_USART_TRANS - -#elif defined (__AVR_ATmega169__) - -#define SIG_UART_TRANS SIG_USART_TRANS - -#elif defined (__AVR_ATmega8__) -#define UBRR UBRRL -#define TCCR1C TCCR1A /* dummy */ -#define TIMSK1 TIMSK -#define TIFR1 TIFR -#define SIG_USART_DATA SIG_UART_DATA -#define SIG_USART_RECV SIG_UART_RECV - -#elif defined (__AVR_ATmega16__) -#define UBRR UBRRL -#define TCCR1C TCCR1A /* dummy */ -#define TIMSK1 TIMSK -#define TIFR1 TIFR - -#elif defined (__AVR_ATmega32__) -#define UBRR UBRRL -#define TCCR1C TCCR1A /* dummy */ -#define TIMSK1 TIMSK -#define TIFR1 TIFR - -#elif defined (__AVR_ATmega128__) -#define UCSRB UCSR0B -#define UBRR UBRR0L -#define UDR UDR0 -#define TIMSK1 TIMSK -#define TIFR1 TIFR -#define SIG_UART_TRANS SIG_USART0_TRANS -#define SIG_USART_DATA SIG_USART0_DATA -#define SIG_USART_RECV SIG_USART0_RECV -#define UCSZ0 UCSZ00 -#define UCSZ1 UCSZ01 -#define UPM0 UPM00 -#define UPM1 UPM01 -#define UCSRC UCSR0C - -#endif - -/* ----------------------- RS485 specifics ----------------------------------*/ -#ifdef RTS_ENABLE - -#define RTS_PIN PB0 -#define RTS_DDR DDRB -#define RTS_PORT PORTB - -#define RTS_INIT \ - do { \ - RTS_DDR |= _BV( RTS_PIN ); \ - RTS_PORT &= ~( _BV( RTS_PIN ) ); \ - } while( 0 ); - -#define RTS_HIGH \ - do { \ - RTS_PORT |= _BV( RTS_PIN ); \ - } while( 0 ); - -#define RTS_LOW \ - do { \ - RTS_PORT &= ~( _BV( RTS_PIN ) ); \ - } while( 0 ); - -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/portevent.c deleted file mode 100644 index 5026d723..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/portevent.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * FreeModbus Libary: ATMega168 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/portserial.c deleted file mode 100644 index 0651f584..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/portserial.c +++ /dev/null @@ -1,157 +0,0 @@ -/* - * FreeModbus Libary: ATMega168 Port - * Copyright (C) 2006 Christian Walter - * - Initial version and ATmega168 support - * Modfications Copyright (C) 2006 Tran Minh Hoang: - * - ATmega8, ATmega16, ATmega32 support - * - RS485 support for DS75176 - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#include -#include -#include - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -#define UART_BAUD_RATE 9600 -#define UART_BAUD_CALC(UART_BAUD_RATE,F_OSC) \ - ( ( F_OSC ) / ( ( UART_BAUD_RATE ) * 16UL ) - 1 ) - -//#define UART_UCSRB UCSR0B - -void -vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ -#ifdef RTS_ENABLE - UCSRB |= _BV( TXEN ) | _BV(TXCIE); -#else - UCSRB |= _BV( TXEN ); -#endif - - if( xRxEnable ) - { - UCSRB |= _BV( RXEN ) | _BV( RXCIE ); - } - else - { - UCSRB &= ~( _BV( RXEN ) | _BV( RXCIE ) ); - } - - if( xTxEnable ) - { - UCSRB |= _BV( TXEN ) | _BV( UDRE ); -#ifdef RTS_ENABLE - RTS_HIGH; -#endif - } - else - { - UCSRB &= ~( _BV( UDRE ) ); - } -} - -BOOL -xMBPortSerialInit( UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - UCHAR ucUCSRC = 0; - - /* prevent compiler warning. */ - (void)ucPORT; - - UBRR = UART_BAUD_CALC( ulBaudRate, F_CPU ); - - switch ( eParity ) - { - case MB_PAR_EVEN: - ucUCSRC |= _BV( UPM1 ); - break; - case MB_PAR_ODD: - ucUCSRC |= _BV( UPM1 ) | _BV( UPM0 ); - break; - case MB_PAR_NONE: - break; - } - - switch ( ucDataBits ) - { - case 8: - ucUCSRC |= _BV( UCSZ0 ) | _BV( UCSZ1 ); - break; - case 7: - ucUCSRC |= _BV( UCSZ1 ); - break; - } - -#if defined (__AVR_ATmega168__) - UCSRC |= ucUCSRC; -#elif defined (__AVR_ATmega169__) - UCSRC |= ucUCSRC; -#elif defined (__AVR_ATmega8__) - UCSRC = _BV( URSEL ) | ucUCSRC; -#elif defined (__AVR_ATmega16__) - UCSRC = _BV( URSEL ) | ucUCSRC; -#elif defined (__AVR_ATmega32__) - UCSRC = _BV( URSEL ) | ucUCSRC; -#elif defined (__AVR_ATmega128__) - UCSRC |= ucUCSRC; -#endif - - vMBPortSerialEnable( FALSE, FALSE ); - -#ifdef RTS_ENABLE - RTS_INIT; -#endif - return TRUE; -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - UDR = ucByte; - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - *pucByte = UDR; - return TRUE; -} - -SIGNAL( SIG_USART_DATA ) -{ - pxMBFrameCBTransmitterEmpty( ); -} - -SIGNAL( SIG_USART_RECV ) -{ - pxMBFrameCBByteReceived( ); -} - -#ifdef RTS_ENABLE -SIGNAL( SIG_UART_TRANS ) -{ - RTS_LOW; -} -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/porttimer.c deleted file mode 100644 index 2a25cd71..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/AVR/port/porttimer.c +++ /dev/null @@ -1,89 +0,0 @@ -/* - * FreeModbus Libary: ATMega168 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- AVR includes -------------------------------------*/ -#include -#include -#include - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_TIMER_PRESCALER ( 1024UL ) -#define MB_TIMER_TICKS ( F_CPU / MB_TIMER_PRESCALER ) -#define MB_50US_TICKS ( 20000UL ) - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usTimerOCRADelta; -static USHORT usTimerOCRBDelta; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ - /* Calculate overflow counter an OCR values for Timer1. */ - usTimerOCRADelta = - ( MB_TIMER_TICKS * usTim1Timerout50us ) / ( MB_50US_TICKS ); - - TCCR1A = 0x00; - TCCR1B = 0x00; - TCCR1C = 0x00; - - vMBPortTimersDisable( ); - - return TRUE; -} - - -inline void -vMBPortTimersEnable( ) -{ - TCNT1 = 0x0000; - if( usTimerOCRADelta > 0 ) - { - TIMSK1 |= _BV( OCIE1A ); - OCR1A = usTimerOCRADelta; - } - - TCCR1B |= _BV( CS12 ) | _BV( CS10 ); -} - -inline void -vMBPortTimersDisable( ) -{ - /* Disable the timer. */ - TCCR1B &= ~( _BV( CS12 ) | _BV( CS10 ) ); - /* Disable the output compare interrupts for channel A/B. */ - TIMSK1 &= ~( _BV( OCIE1A ) ); - /* Clear output compare flags for channel A/B. */ - TIFR1 |= _BV( OCF1A ) ; -} - -SIGNAL( SIG_OUTPUT_COMPARE1A ) -{ - ( void )pxMBPortCBTimerExpired( ); -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/Makefile b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/Makefile deleted file mode 100644 index f7ea32b0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/Makefile +++ /dev/null @@ -1,67 +0,0 @@ -############################################################################### -# Makefile for the BARE project -############################################################################### - -## General Flags -PROJECT = demo -TARGET = demo - -CC=gcc -OBJCOPY=/cygdrive/c/WinAVR/bin/avr-objcopy - -## Options common to compile, link and assembly rules -COMMON = - -## Compile options common for all C compilation units. -CFLAGS = $(COMMON) \ - -Iport -I. \ - -I../../modbus/rtu -I../../modbus/ascii -I../../modbus/include -CFLAGS += -Wall -gstabs -Os -Wall -Wstrict-prototypes - -CFLAGS += -Wp,-M,-MP,-MT,$(*F).o,-MF,dep/$(@F).d - -## Assembly specific flags -ASMFLAGS = $(COMMON) -ASMFLAGS += -x assembler-with-cpp -Wa,-gstabs - -## Linker flags -LDFLAGS = $(COMMON) -LDFLAGS += -Wl,-Map=$(TARGET).map,--cref - -## Objects that must be built in order to link -OBJECTS = demo.o -MBPORTOBJECTS = port/portserial.o \ - port/portevent.o \ - port/porttimer.o -MBOBJECTS = ../../modbus/mb.o \ - ../../modbus/rtu/mbrtu.o \ - ../../modbus/rtu/mbcrc.o \ - ../../modbus/ascii/mbascii.o \ - ../../modbus/functions/mbfunccoils.o \ - ../../modbus/functions/mbfuncdiag.o \ - ../../modbus/functions/mbfuncholding.o \ - ../../modbus/functions/mbfuncinput.o \ - ../../modbus/functions/mbfuncother.o \ - ../../modbus/functions/mbfuncdisc.o \ - ../../modbus/functions/mbutils.o - - -## Build -all: $(TARGET).elf - -## Compile -demo.o: demo.c - $(CC) $(INCLUDES) $(CFLAGS) -c $< - -##Link -$(TARGET).elf: $(OBJECTS) $(MBOBJECTS) $(MBPORTOBJECTS) - $(CC) $(LDFLAGS) $(OBJECTS) $(MBPORTOBJECTS) $(MBOBJECTS) $(LIBDIRS) $(LIBS) -o $(TARGET).elf - -## Clean target -.PHONY: clean -clean: - -rm -rf $(OBJECTS) $(MBOBJECTS) $(MBPORTOBJECTS) $(TARGET).elf $(TARGET).map - -## Other dependencies --include $(shell mkdir dep 2>/dev/null) $(wildcard dep/*) - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/demo.c deleted file mode 100644 index 2ae19a65..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/demo.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * FreeModbus Libary: BARE Demo Application - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - eMBErrorCode eStatus; - - eStatus = eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); - - /* Enable the Modbus Protocol Stack. */ - eStatus = eMBEnable( ); - - for( ;; ) - { - ( void )eMBPoll( ); - - /* Here we simply count the number of poll cycles. */ - usRegInputBuf[0]++; - } -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = - ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = - ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/port/port.h deleted file mode 100644 index c2a0f7d4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/port/port.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * FreeModbus Libary: BARE Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -#include -#include - -#define INLINE inline -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#define ENTER_CRITICAL_SECTION( ) -#define EXIT_CRITICAL_SECTION( ) - -typedef uint8_t BOOL; - -typedef unsigned char UCHAR; -typedef char CHAR; - -typedef uint16_t USHORT; -typedef int16_t SHORT; - -typedef uint32_t ULONG; -typedef int32_t LONG; - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/port/portevent.c deleted file mode 100644 index e700a471..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/port/portevent.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * FreeModbus Libary: BARE Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/port/portserial.c deleted file mode 100644 index 45d17fa3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/port/portserial.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * FreeModbus Libary: BARE Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- static functions ---------------------------------*/ -static void prvvUARTTxReadyISR( void ); -static void prvvUARTRxISR( void ); - -/* ----------------------- Start implementation -----------------------------*/ -void -vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ - /* If xRXEnable enable serial receive interrupts. If xTxENable enable - * transmitter empty interrupts. - */ -} - -BOOL -xMBPortSerialInit( UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - return FALSE; -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - /* Put a byte in the UARTs transmit buffer. This function is called - * by the protocol stack if pxMBFrameCBTransmitterEmpty( ) has been - * called. */ - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - /* Return the byte in the UARTs receive buffer. This function is called - * by the protocol stack after pxMBFrameCBByteReceived( ) has been called. - */ - return TRUE; -} - -/* Create an interrupt handler for the transmit buffer empty interrupt - * (or an equivalent) for your target processor. This function should then - * call pxMBFrameCBTransmitterEmpty( ) which tells the protocol stack that - * a new character can be sent. The protocol stack will then call - * xMBPortSerialPutByte( ) to send the character. - */ -static void prvvUARTTxReadyISR( void ) -{ - pxMBFrameCBTransmitterEmpty( ); -} - -/* Create an interrupt handler for the receive interrupt for your target - * processor. This function should then call pxMBFrameCBByteReceived( ). The - * protocol stack will then call xMBPortSerialGetByte( ) to retrieve the - * character. - */ -static void prvvUARTRxISR( void ) -{ - pxMBFrameCBByteReceived( ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/port/porttimer.c deleted file mode 100644 index e130ff83..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/BARE/port/porttimer.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * FreeModbus Libary: BARE Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- static functions ---------------------------------*/ -static void prvvTIMERExpiredISR( void ); - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ - return FALSE; -} - - -inline void -vMBPortTimersEnable( ) -{ - /* Enable the timer with the timeout passed to xMBPortTimersInit( ) */ -} - -inline void -vMBPortTimersDisable( ) -{ - /* Disable any pending timers. */ -} - -/* Create an ISR which is called whenever the timer has expired. This function - * must then call pxMBPortCBTimerExpired( ) to notify the protocol stack that - * the timer has expired. - */ -static void prvvTIMERExpiredISR( void ) -{ - ( void )pxMBPortCBTimerExpired( ); -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/demo.c deleted file mode 100644 index b955112a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/demo.c +++ /dev/null @@ -1,191 +0,0 @@ -/* - * FreeModbus Libary: HCS08 Port - * Copyright (C) 2006 Christian Walter - * Copyright (C) 2008 Trond Melen - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; - -UCHAR CCR_reg; // SaveStatusReg stores the Condition Code Register here - -/* ----------------------- Start implementation -----------------------------*/ - -void -main( void ) -{ - eMBErrorCode eStatus; - - /* Use external 32.768 Hz crystal to generate 4.194.304 Hz bus clock */ - ICGC1 = 0x38; // ??=0,RANGE=0,REFS=1,CLKS=1:1,OSCSTEN=0,??=0:0 - while( ICGS2_DCOS == 0 ); - -#if 0 - /* Test code for porting - */ -#if 1 - /* Timer test - * Comment out call to pxMBPortCBTimerExpired() in prvvTIMERExpiredISR when testing the timer - */ - - /* Disable the COP watchdog */ - SOPT = 0x53; // COPE=0,COPT=1,STOPE=0,??=1:0:0,BKGDPE=1,??=1 - - ( void )xMBPortTimersInit( 20000 ); - - EnableInterrupts; - for( ;; ) - { - vMBPortTimersEnable( ); - _Wait; // wait for an interrupt - - /* toggle LED1 */ - PTFD_PTFD0 = !PTFD_PTFD0; - PTFDD_PTFDD0 = 1; - } - -#else - /* Receiver test - * Comment out call to pxMBFrameCBByteReceived() in prvvUARTRxISR() when testing the receiver - */ - - /* Disable the COP watchdog */ - SOPT = 0x53; // COPE=0,COPT=1,STOPE=0,??=1:0:0,BKGDPE=1,??=1 - - /* Enable the receiver. */ - assert( xMBPortSerialInit( 0, 9600, 8, MB_PAR_NONE ) ); - - EnableInterrupts; - for( ;; ) - { - UCHAR ucByte; - - vMBPortSerialEnable( TRUE, FALSE ); - _Wait; // wait for an interrupt - assert( xMBPortSerialGetByte( &ucByte ) ); - - /* toggle LED1 */ - PTFD_PTFD0 = !PTFD_PTFD0; - PTFDD_PTFDD0 = 1; - - /* Transmitter test - * Comment out call to pxMBFrameCBTransmitterEmpty() in prvvUARTTxReadyISR() when testing the transmitter - */ -#if 0 - vMBPortSerialEnable( FALSE, TRUE ); - assert( xMBPortSerialPutByte( ucByte ) ); - _Wait; // wait for an interrupt - - /* toggle LED1 */ - PTFD_PTFD0 = !PTFD_PTFD0; -#endif // Transmitter test - } -#endif // Receiver test - -#else - /* Demo - * NOTE: Make sure the callbacks in the three ISPs have been restored after above testing - */ - - /* Initialization */ - eStatus = eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); -// eStatus = eMBInit( MB_ASCII, 0x0A, 0, 38400, MB_PAR_EVEN ); - - /* Enable the Modbus Protocol Stack. */ - eStatus = eMBEnable( ); - - /* Start polling */ - EnableInterrupts; - for( ;; ) - { - /* Poll for Modbus events */ - ( void )eMBPoll( ); - - /* Count the number of polls */ - usRegInputBuf[0]++; - - /* Count the number of timer overflows */ - if( TPM1SC_TOF ) - { - TPM1SC_TOF = 0; - ENTER_CRITICAL_SECTION( ); - if( ++usRegInputBuf[1] == 0 ) // Happens every 2 seconds - usRegInputBuf[2]++; // Happens every 36.4 hours - EXIT_CRITICAL_SECTION( ); - } - - /* Keep the COP watchdog happy */ - __RESET_WATCHDOG( ); - } -#endif // Test code when porting -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/port/port.h deleted file mode 100644 index 047dae16..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/port/port.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * FreeModbus Libary: HCS08 Port - * Copyright (C) 2006 Christian Walter - * Copyright (C) 2008 Trond Melen - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -#include - -/* The include file "derivative.h" is automatically generated by Code Warrior */ -#include "derivative.h" - -/* Tne include fila inttypes.h is not available for HCS08, so we use our own definitions instead */ -//#include -typedef char int8_t; -typedef unsigned char uint8_t; -typedef int int16_t; -typedef unsigned int uint16_t; -typedef long int32_t; -typedef unsigned long uint32_t; - - -/* Michael Barrs verification code */ -#pragma MESSAGE ERROR DISABLE C1135 -static union -{ - char int8_t_incorrect[sizeof( int8_t ) == 1]; - char uint8_t_incorrect[sizeof( uint8_t ) == 1]; - char int16_t_incorrect[sizeof( int16_t ) == 2]; - char uint16_t_incorrect[sizeof( uint16_t ) == 2]; - char int32_t_incorrect[sizeof( int32_t ) == 4]; - char uint32_t_incorrect[sizeof( uint32_t ) == 4]; -}; - -#define INLINE -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } -#define memcpy (void) memcpy // gets wid of a warning in mbfuncother.c - -/* Next 2 lines copied from code generated by Processor Expert */ -#define SaveStatusReg() { asm PSHA; asm TPA; asm SEI; asm STA CCR_reg; asm PULA; } /* This macro is used by Processor Expert. It saves CCR register and disable global interrupts. */ -#define RestoreStatusReg() { asm PSHA; asm LDA CCR_reg; asm TAP; asm PULA; } /* This macro is used by Processor Expert. It restores CCR register saved in SaveStatusReg(). */ - -#define ENTER_CRITICAL_SECTION( ) DisableInterrupts; -#define EXIT_CRITICAL_SECTION( ) EnableInterrupts; - -typedef uint8_t BOOL; -typedef unsigned char UCHAR; -typedef char CHAR; -typedef uint16_t USHORT; -typedef int16_t SHORT; -typedef uint32_t ULONG; -typedef int32_t LONG; - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -/* SaveStatusReg() stores the Condition Code Register here */ -extern UCHAR CCR_reg; - -/* The bus clock is used for computing timer and baud rate register values */ -#define BM_BUS_CLOCK 4194304 // Hz - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/port/portevent.c deleted file mode 100644 index e700a471..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/port/portevent.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * FreeModbus Libary: BARE Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/port/portserial.c deleted file mode 100644 index 7e29348a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/port/portserial.c +++ /dev/null @@ -1,139 +0,0 @@ -/* - * FreeModbus Libary: HCS08 Port - * Copyright (C) 2006 Christian Walter - * Copyright (C) 2008 Trond Melen - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- static functions ---------------------------------*/ -static void prvvUARTTxReadyISR( void ); -static void prvvUARTRxISR( void ); - -/* ----------------------- Start implementation -----------------------------*/ - -void -vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ - /* If xRXEnable enable serial receive interrupts. - * If xTxENable enable transmitter empty interrupts. - */ - - /* Compute control register value */ - SCI1C2 = 0x0C; // TIE=0,TCIE=0,RIE=0,ILIE=0,TE=1,RE=1,RWU=0,SBK=0 - - /* Enable the requested interrupts */ - if( xRxEnable ) - SCI1C2_RIE = 1; - if( xTxEnable ) - SCI1C2_TIE = 1; -} - -BOOL -xMBPortSerialInit( UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - /* Compute baud rate generator divider */ - SCI1BD = ( USHORT ) ( ( ( BM_BUS_CLOCK + 16 / 2 ) / 16 + ulBaudRate / 2 ) / ulBaudRate ); - - /* Configure the serial port */ -// SCI1C1 = 0x00; // LOOPS=0,SCISWAI=0,RSRC=0,M=0,ILT=0,PE=0,PT=0 - if( ucDataBits == 8 && eParity != MB_PAR_NONE ) - SCI1C1_M = 1; - if( eParity != MB_PAR_NONE ) - SCI1C1_PE = 1; - if( eParity == MB_PAR_ODD || ( eParity == MB_PAR_NONE && ucDataBits == 7 ) ) - SCI1C1_PT = 1; - - return TRUE; -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - /* Put a byte in the UARTs transmit buffer. This function is called - * by the protocol stack if pxMBFrameCBTransmitterEmpty( ) has been - * called. */ - while( SCI1S1_TDRE == FALSE ); - SCI1D = ucByte; - SCI1C2_TIE = TRUE; - - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - /* Return the byte in the UARTs receive buffer. This function is called - * by the protocol stack after pxMBFrameCBByteReceived( ) has been called. - */ - BOOL parityOK; - - while( SCI1S1_RDRF == FALSE ); - parityOK = !SCI1S1_PF; - if( SCI1C1_M ) - *pucByte = SCI1C3; // for coherent 9 bit reads of the receiver buffer - *pucByte = SCI1D; - if( !SCI1C1_M ) - if( SCI1C1_PE || ( !SCI1C1_PE && SCI1C1_PT ) ) - *pucByte &= 0x7F; - SCI1C2_RIE = TRUE; - - return parityOK; // return TRUE if Parity Error Flag was not set -} - -/* Create an interrupt handler for the transmit buffer empty interrupt - * (or an equivalent) for your target processor. This function should then - * call pxMBFrameCBTransmitterEmpty( ) which tells the protocol stack that - * a new character can be sent. The protocol stack will then call - * xMBPortSerialPutByte( ) to send the character. - */ -interrupt VectorNumber_Vsci1tx void -prvvUARTTxReadyISR( void ) -{ - SCI1C2_TIE = FALSE; - ( void )pxMBFrameCBTransmitterEmpty( ); -} - -/* Create an interrupt handler for the receive interrupt for your target - * processor. This function should then call pxMBFrameCBByteReceived( ). The - * protocol stack will then call xMBPortSerialGetByte( ) to retrieve the - * character. - */ -interrupt VectorNumber_Vsci1rx void -prvvUARTRxISR( void ) -{ - SCI1C2_RIE = FALSE; - ( void )pxMBFrameCBByteReceived( ); -} - - -/* assert( FALSE ) generate software interrupts so they should be handled somehow - * This implementation will generate padding charactres until the stack overflows - */ -interrupt VectorNumber_Vswi void -prvvAssertISR( void ) -{ - ( void )xMBPortSerialPutByte( 0x00 ); - SCI1C2_TIE = FALSE; - EnableInterrupts; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/port/porttimer.c deleted file mode 100644 index 7d1fcab8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/HCS08/port/porttimer.c +++ /dev/null @@ -1,93 +0,0 @@ -/* - * FreeModbus Libary: HCS08 Port - * Copyright (C) 2006 Christian Walter - * Copyright (C) 2008 Trond Melen - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Persistent variable ------------------------------*/ -static USHORT usDelta; - -/* ----------------------- Start implementation -----------------------------*/ - -USHORT -usMBMulDiv( USHORT a, USHORT b, USHORT c ) -{ - ULONG x; - - x = a; - x *= b; - x /= c; - - return ( USHORT ) x; -} - - -/* Initialize Timer 1 as free running, and Channel 0 as output compare (with no pin) - */ -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ - /* We assume 4194304 Hz bus clock and let the timer run at 1/128 of this frequency, ie. 32768 Hz */ - ( void )assert( BM_BUS_CLOCK == 4194304 ); - TPM1SC = 0x0F; // TOF=0,TOIE=0,CPWMS=0,CLKS=0:1,PS=1:1:1 - TPM1C0SC = 0x10; // CH0F=0,CH0IE=0,MS0=0:1,ELS0=0:0;??=0:0 - - /* Compute numer of timer tics corresponding to the given timeout periode */ - usDelta = usMBMulDiv( usTim1Timerout50us, 1024, 625 ); - - return TRUE; -} - -/* Set the output compare register value and enable timer interrupt - */ -INLINE void -vMBPortTimersEnable( ) -{ - /* Enable the timer with the timeout passed to xMBPortTimersInit( ) */ - SaveStatusReg( ); - TPM1C0V = TPM1CNT + usDelta; - RestoreStatusReg( ); - if( TPM1C0SC_CH0F ) - TPM1C0SC_CH0F = FALSE; - TPM1C0SC_CH0IE = TRUE; -} - -/* Disable timer interrupts - */ -INLINE void -vMBPortTimersDisable( ) -{ - TPM1C0SC_CH0IE = FALSE; -} - -/* Handle the interrupt and disable further timeouts - */ -interrupt VectorNumber_Vtpm1ch0 void -prvvTIMERExpiredISR( void ) -{ - TPM1C0SC_CH0IE = FALSE; - ( void )pxMBPortCBTimerExpired( ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/Makefile b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/Makefile deleted file mode 100644 index 20a61de2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/Makefile +++ /dev/null @@ -1,80 +0,0 @@ -# -# FreeModbus Linux PORT - Makefile -# -# Copyright (c) 2006 Christian Walter, © s::can, Vienna 2006. -# -# --------------------------------------------------------------------------- - -# --------------------------------------------------------------------------- -# platform dependencies -# --------------------------------------------------------------------------- -ifneq ($(strip $(shell gcc -v 2>&1 |grep "cygwin")),) - CYGWIN_BUILD = YES -endif -CC = gcc -CXX = g++ -OBJCOPY = objcopy -INSIGHT = /opt/insight-x86/bin/insight - -# --------------------------------------------------------------------------- -# project specifics -# --------------------------------------------------------------------------- -CFLAGS = -MD -g3 -Wall -Iport -I../../modbus/rtu \ - -I../../modbus/ascii -I../../modbus/include -LDFLAGS = -ifeq ($(CYGWIN_BUILD),YES) -else -LDFLAGS += -lpthread -CFLAGS += -pthread -endif - -TGT = demo -OTHER_CSRC = -OTHER_ASRC = -CSRC = demo.c port/portserial.c port/portother.c \ - port/portevent.c port/porttimer.c \ - ../../modbus/mb.c \ - ../../modbus/rtu/mbrtu.c ../../modbus/rtu/mbcrc.c \ - ../../modbus/ascii/mbascii.c \ - ../../modbus/functions/mbfunccoils.c \ - ../../modbus/functions/mbfuncdiag.c \ - ../../modbus/functions/mbfuncholding.c \ - ../../modbus/functions/mbfuncinput.c \ - ../../modbus/functions/mbfuncother.c \ - ../../modbus/functions/mbfuncdisc.c \ - ../../modbus/functions/mbutils.c -ASRC = -OBJS = $(CSRC:.c=.o) $(ASRC:.S=.o) -NOLINK_OBJS = $(OTHER_CSRC:.c=.o) $(OTHER_ASRC:.S=.o) -DEPS = $(OBJS:.o=.d) $(NOLINK_OBJS:.o=.d) -BIN = $(TGT) - -.PHONY: clean all - -all: $(BIN) - -debug: - $(INSIGHT) --se=$(TGT) - -$(BIN): $(OBJS) $(NOLINK_OBJS) - $(CC) $(LDFLAGS) $(OBJS) $(LDLIBS) -o $@ - -clean: - rm -f $(DEPS) - rm -f $(OBJS) $(NOLINK_OBJS) - rm -f $(BIN) - -# --------------------------------------------------------------------------- -# rules for code generation -# --------------------------------------------------------------------------- -%.o: %.c - $(CC) $(CFLAGS) -o $@ -c $< - -%.o: %.S - $(CC) $(ASFLAGS) -o $@ -c $< - -# --------------------------------------------------------------------------- -# # compiler generated dependencies -# --------------------------------------------------------------------------- --include $(LWOS_DEPS) $(PORT_DEPS) $(APPL_DEPS) - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/README.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/README.txt deleted file mode 100644 index 2fbd17c7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/README.txt +++ /dev/null @@ -1,45 +0,0 @@ - - FREEMODBUS 0.8 LINUX EXAMPLE - ============================ - -REQUIREMENTS -============ - -This example contains a simple demo program for a Linux host. The default -demo opens the serial port on /dev/ttyS0 and waits for commands from an -Modbus master. Demo versions of Modbus Masters can be found in [1] and [2]. - -INSTALLATION -============ - -The program can be built by calling 'make flash'. This demo application -was tested on Redhat Enterprise Linux 4 (RHEL4) but should work on any -recent distribution. - -TESTING -======= - -Install a Null-Modem cable between /dev/ttyS0 and /dev/ttyS1. Next start -the Modbus Sample Application and test if the input registers starting at -protocol address 1000 can be read. There are four registers value available -and the output should look like: - -Polling slave (Ctrl-C to stop) ... -[1000]: 6474 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... -[1000]: -8831 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... - -The simple testing utility used in the 'demo.sh' script can be found at [3]. - -[1] WinTech ModScan32: http://www.win-tech.com/html/modscan32.htm -[2] Modus Poll: http://www.modbustools.com/modbus_poll.asp -[3] FieldTalk Modpoll: http://www.focus-sw.com/fieldtalk/modpoll.html - -Version: $Id: README.txt,v 1.1 2006/08/01 20:58:49 wolti Exp $ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/demo.c deleted file mode 100644 index ae47c012..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/demo.c +++ /dev/null @@ -1,342 +0,0 @@ -/* - * FreeModbus Libary: Linux Demo Application - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Standard includes --------------------------------*/ -#include -#include -#include -#include -#include -#include -#include - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define PROG "freemodbus" - -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 -#define REG_HOLDING_START 2000 -#define REG_HOLDING_NREGS 130 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; -static USHORT usRegHoldingStart = REG_HOLDING_START; -static USHORT usRegHoldingBuf[REG_HOLDING_NREGS]; - -static enum ThreadState -{ - STOPPED, - RUNNING, - SHUTDOWN -} ePollThreadState; - -static pthread_mutex_t xLock = PTHREAD_MUTEX_INITIALIZER; -static BOOL bDoExit; - -/* ----------------------- Static functions ---------------------------------*/ -static BOOL bCreatePollingThread( void ); -static enum ThreadState eGetPollingThreadState( void ); -static void vSetPollingThreadState( enum ThreadState eNewState ); -static void *pvPollingThread( void *pvParameter ); - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -bSetSignal( int iSignalNr, void ( *pSigHandler ) ( int ) ) -{ - BOOL bResult; - struct sigaction xNewSig, xOldSig; - - xNewSig.sa_handler = pSigHandler; - sigemptyset( &xNewSig.sa_mask ); - xNewSig.sa_flags = 0; - if( sigaction( iSignalNr, &xNewSig, &xOldSig ) != 0 ) - { - bResult = FALSE; - } - else - { - bResult = TRUE; - } - return bResult; -} - -void -vSigShutdown( int xSigNr ) -{ - switch ( xSigNr ) - { - case SIGQUIT: - case SIGINT: - case SIGTERM: - vSetPollingThreadState( SHUTDOWN ); - bDoExit = TRUE; - } -} - -int -main( int argc, char *argv[] ) -{ - int iExitCode; - CHAR cCh; - - const UCHAR ucSlaveID[] = { 0xAA, 0xBB, 0xCC }; - if( !bSetSignal( SIGQUIT, vSigShutdown ) || - !bSetSignal( SIGINT, vSigShutdown ) || !bSetSignal( SIGTERM, vSigShutdown ) ) - { - fprintf( stderr, "%s: can't install signal handlers: %s!\n", PROG, strerror( errno ) ); - iExitCode = EXIT_FAILURE; - } - else if( eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ) != MB_ENOERR ) - { - fprintf( stderr, "%s: can't initialize modbus stack!\n", PROG ); - iExitCode = EXIT_FAILURE; - } - else if( eMBSetSlaveID( 0x34, TRUE, ucSlaveID, 3 ) != MB_ENOERR ) - { - fprintf( stderr, "%s: can't set slave id!\n", PROG ); - iExitCode = EXIT_FAILURE; - } - else - { - vSetPollingThreadState( STOPPED ); - - /* CLI interface. */ - printf( "Type 'q' for quit or 'h' for help!\n" ); - bDoExit = FALSE; - do - { - printf( "> " ); - cCh = getchar( ); - - switch ( cCh ) - { - case 'q': - bDoExit = TRUE; - break; - case 'd': - vSetPollingThreadState( SHUTDOWN ); - break; - case 'e': - if( bCreatePollingThread( ) != TRUE ) - { - printf( "Can't start protocol stack! Already running?\n" ); - } - break; - case 's': - switch ( eGetPollingThreadState( ) ) - { - case RUNNING: - printf( "Protocol stack is running.\n" ); - break; - case STOPPED: - printf( "Protocol stack is stopped.\n" ); - break; - case SHUTDOWN: - printf( "Protocol stack is shuting down.\n" ); - break; - } - break; - case 'h': - printf( "FreeModbus demo application help:\n" ); - printf( " 'd' ... disable protocol stack.\n" ); - printf( " 'e' ... enabled the protocol stack.\n" ); - printf( " 's' ... show current status.\n" ); - printf( " 'q' ... quit application.\n" ); - printf( " 'h' ... this information.\n" ); - printf( "\n" ); - printf( "Copyright 2006 Christian Walter \n" ); - break; - default: - if( !bDoExit && ( cCh != '\n' ) ) - { - printf( "illegal command '%c'!\n", cCh ); - } - break; - } - - /* eat up everything untill return character. */ - while( !bDoExit && ( cCh != '\n' ) ) - { - cCh = getchar( ); - } - } - while( !bDoExit ); - - /* Release hardware resources. */ - ( void )eMBClose( ); - iExitCode = EXIT_SUCCESS; - } - return iExitCode; -} - -BOOL -bCreatePollingThread( void ) -{ - BOOL bResult; - pthread_t xThread; - - if( eGetPollingThreadState( ) == STOPPED ) - { - if( pthread_create( &xThread, NULL, pvPollingThread, NULL ) != 0 ) - { - bResult = FALSE; - } - else - { - bResult = TRUE; - } - } - else - { - bResult = FALSE; - } - - return bResult; -} - -void * -pvPollingThread( void *pvParameter ) -{ - vSetPollingThreadState( RUNNING ); - - if( eMBEnable( ) == MB_ENOERR ) - { - do - { - if( eMBPoll( ) != MB_ENOERR ) - break; - usRegInputBuf[0] = ( USHORT ) rand( ); - } - while( eGetPollingThreadState( ) != SHUTDOWN ); - } - - ( void )eMBDisable( ); - - vSetPollingThreadState( STOPPED ); - - return 0; -} - -enum ThreadState -eGetPollingThreadState( ) -{ - enum ThreadState eCurState; - - ( void )pthread_mutex_lock( &xLock ); - eCurState = ePollThreadState; - ( void )pthread_mutex_unlock( &xLock ); - - return eCurState; -} - -void -vSetPollingThreadState( enum ThreadState eNewState ) -{ - ( void )pthread_mutex_lock( &xLock ); - ePollThreadState = eNewState; - ( void )pthread_mutex_unlock( &xLock ); -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_HOLDING_START ) && - ( usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegHoldingStart ); - switch ( eMode ) - { - /* Pass current register values to the protocol stack. */ - case MB_REG_READ: - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( UCHAR ) ( usRegHoldingBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( UCHAR ) ( usRegHoldingBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - break; - - /* Update current register values with new values from the - * protocol stack. */ - case MB_REG_WRITE: - while( usNRegs > 0 ) - { - usRegHoldingBuf[iRegIndex] = *pucRegBuffer++ << 8; - usRegHoldingBuf[iRegIndex] |= *pucRegBuffer++; - iRegIndex++; - usNRegs--; - } - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/demo.sh b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/demo.sh deleted file mode 100644 index 3cfff54b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/demo.sh +++ /dev/null @@ -1 +0,0 @@ -./modpoll -b 38400 -d 8 -p even -a 10 -t 3 -r 1000 /dev/ttyS1 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/demo.vpj b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/demo.vpj deleted file mode 100644 index d17136f6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/demo.vpj +++ /dev/null @@ -1,246 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/port.h deleted file mode 100644 index 79afcde7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/port.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * FreeModbus Libary: Linux Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -#include - -#define INLINE -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif -/* ----------------------- Defines ------------------------------------------*/ -#define ENTER_CRITICAL_SECTION( ) vMBPortEnterCritical() -#define EXIT_CRITICAL_SECTION( ) vMBPortExitCritical() -#define MB_PORT_HAS_CLOSE 1 -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif -/* ----------------------- Type definitions ---------------------------------*/ - typedef enum -{ - MB_LOG_ERROR = 0, - MB_LOG_WARN = 1, - MB_LOG_INFO = 2, - MB_LOG_DEBUG = 3 -} eMBPortLogLevel; - -typedef char BOOL; -typedef unsigned char UCHAR; -typedef char CHAR; -typedef unsigned short USHORT; -typedef short SHORT; - -typedef unsigned long ULONG; -typedef long LONG; - -/* ----------------------- Function prototypes ------------------------------*/ - -void vMBPortEnterCritical( void ); -void vMBPortExitCritical( void ); -void vMBPortLog( eMBPortLogLevel eLevel, const CHAR * szModule, - const CHAR * szFmt, ... ); -void vMBPortTimerPoll( ); -BOOL xMBPortSerialPoll( ); -BOOL xMBPortSerialSetTimeout( ULONG dwTimeoutMs ); - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/portevent.c deleted file mode 100644 index 12d78f58..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/portevent.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * FreeModbus Libary: Linux Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - else - { - /* Poll the serial device. The serial device timeouts if no - * characters have been received within for t3.5 during an - * active transmission or if nothing happens within a specified - * amount of time. Both timeouts are configured from the timer - * init functions. - */ - ( void )xMBPortSerialPoll( ); - - /* Check if any of the timers have expired. */ - vMBPortTimerPoll( ); - - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/portother.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/portother.c deleted file mode 100644 index 681efc27..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/portother.c +++ /dev/null @@ -1,102 +0,0 @@ -/* - * FreeModbus Libary: Linux Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Standard includes --------------------------------*/ -#include -#include -#include -#include -#include -#include - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" -#include "mbconfig.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define NELEMS( x ) ( sizeof( ( x ) )/sizeof( ( x )[0] ) ) - -/* ----------------------- Static variables ---------------------------------*/ -static FILE *fLogFile = NULL; -static eMBPortLogLevel eLevelMax = MB_LOG_DEBUG; -static pthread_mutex_t xLock = PTHREAD_MUTEX_INITIALIZER; - -/* ----------------------- Start implementation -----------------------------*/ -void -vMBPortLogLevel( eMBPortLogLevel eNewLevelMax ) -{ - eLevelMax = eNewLevelMax; -} - -void -vMBPortLogFile( FILE * fNewLogFile ) -{ - fLogFile = fNewLogFile; -} - -void -vMBPortLog( eMBPortLogLevel eLevel, const CHAR * szModule, const CHAR * szFmt, ... ) -{ - CHAR szBuf[512]; - int i; - va_list args; - FILE *fOutput = fLogFile == NULL ? stderr : fLogFile; - - static const char *arszLevel2Str[] = { "ERROR", "WARN", "INFO", "DEBUG" }; - - i = snprintf( szBuf, NELEMS( szBuf ), "%s: %s: ", arszLevel2Str[eLevel], szModule ); - - if( i != 0 ) - { - va_start( args, szFmt ); - i += vsnprintf( &szBuf[i], NELEMS( szBuf ) - i, szFmt, args ); - va_end( args ); - } - - if( i != 0 ) - { - if( eLevel <= eLevelMax ) - { - fputs( szBuf, fOutput ); - } - } -} - -void -vMBPortEnterCritical( void ) -{ - if( pthread_mutex_lock( &xLock ) != 0 ) - { - vMBPortLog( MB_LOG_ERROR, "OTHER", "Locking primitive failed: %s\n", strerror( errno ) ); - } -} - -void -vMBPortExitCritical( void ) -{ - if( pthread_mutex_unlock( &xLock ) != 0 ) - { - vMBPortLog( MB_LOG_ERROR, "OTHER", "Locking primitive failed: %s\n", strerror( errno ) ); - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/portserial.c deleted file mode 100644 index ee04158b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/portserial.c +++ /dev/null @@ -1,352 +0,0 @@ -/* - * FreeModbus Libary: Linux Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Standard includes --------------------------------*/ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" -#include "mbconfig.h" - -/* ----------------------- Defines -----------------------------------------*/ -#if MB_ASCII_ENABLED == 1 -#define BUF_SIZE 513 /* must hold a complete ASCII frame. */ -#else -#define BUF_SIZE 256 /* must hold a complete RTU frame. */ -#endif - -/* ----------------------- Static variables ---------------------------------*/ -static int iSerialFd = -1; -static BOOL bRxEnabled; -static BOOL bTxEnabled; - -static ULONG ulTimeoutMs; -static UCHAR ucBuffer[BUF_SIZE]; -static int uiRxBufferPos; -static int uiTxBufferPos; - -static struct termios xOldTIO; - -/* ----------------------- Function prototypes ------------------------------*/ -static BOOL prvbMBPortSerialRead( UCHAR * pucBuffer, USHORT usNBytes, USHORT * usNBytesRead ); -static BOOL prvbMBPortSerialWrite( UCHAR * pucBuffer, USHORT usNBytes ); - -/* ----------------------- Begin implementation -----------------------------*/ -void -vMBPortSerialEnable( BOOL bEnableRx, BOOL bEnableTx ) -{ - /* it is not allowed that both receiver and transmitter are enabled. */ - assert( !bEnableRx || !bEnableTx ); - - if( bEnableRx ) - { - ( void )tcflush( iSerialFd, TCIFLUSH ); - uiRxBufferPos = 0; - bRxEnabled = TRUE; - } - else - { - bRxEnabled = FALSE; - } - if( bEnableTx ) - { - bTxEnabled = TRUE; - uiTxBufferPos = 0; - } - else - { - bTxEnabled = FALSE; - } -} - -BOOL -xMBPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - CHAR szDevice[16]; - BOOL bStatus = TRUE; - - struct termios xNewTIO; - speed_t xNewSpeed; - - snprintf( szDevice, 16, "/dev/ttyS%d", ucPort ); - - if( ( iSerialFd = open( szDevice, O_RDWR | O_NOCTTY ) ) < 0 ) - { - vMBPortLog( MB_LOG_ERROR, "SER-INIT", "Can't open serial port %s: %s\n", szDevice, - strerror( errno ) ); - } - else if( tcgetattr( iSerialFd, &xOldTIO ) != 0 ) - { - vMBPortLog( MB_LOG_ERROR, "SER-INIT", "Can't get settings from port %s: %s\n", szDevice, - strerror( errno ) ); - } - else - { - bzero( &xNewTIO, sizeof( struct termios ) ); - - xNewTIO.c_iflag |= IGNBRK | INPCK; - xNewTIO.c_cflag |= CREAD | CLOCAL; - switch ( eParity ) - { - case MB_PAR_NONE: - break; - case MB_PAR_EVEN: - xNewTIO.c_cflag |= PARENB; - break; - case MB_PAR_ODD: - xNewTIO.c_cflag |= PARENB | PARODD; - break; - default: - bStatus = FALSE; - } - switch ( ucDataBits ) - { - case 8: - xNewTIO.c_cflag |= CS8; - break; - case 7: - xNewTIO.c_cflag |= CS7; - break; - default: - bStatus = FALSE; - } - switch ( ulBaudRate ) - { - case 9600: - xNewSpeed = B9600; - break; - case 19200: - xNewSpeed = B19200; - break; - case 38400: - xNewSpeed = B38400; - break; - case 57600: - xNewSpeed = B57600; - break; - case 115200: - xNewSpeed = B115200; - break; - default: - bStatus = FALSE; - } - if( bStatus ) - { - if( cfsetispeed( &xNewTIO, xNewSpeed ) != 0 ) - { - vMBPortLog( MB_LOG_ERROR, "SER-INIT", "Can't set baud rate %ld for port %s: %s\n", - ulBaudRate, strerror( errno ) ); - } - else if( cfsetospeed( &xNewTIO, xNewSpeed ) != 0 ) - { - vMBPortLog( MB_LOG_ERROR, "SER-INIT", "Can't set baud rate %ld for port %s: %s\n", - ulBaudRate, szDevice, strerror( errno ) ); - } - else if( tcsetattr( iSerialFd, TCSANOW, &xNewTIO ) != 0 ) - { - vMBPortLog( MB_LOG_ERROR, "SER-INIT", "Can't set settings for port %s: %s\n", - szDevice, strerror( errno ) ); - } - else - { - vMBPortSerialEnable( FALSE, FALSE ); - bStatus = TRUE; - } - } - } - return bStatus; -} - -BOOL -xMBPortSerialSetTimeout( ULONG ulNewTimeoutMs ) -{ - if( ulNewTimeoutMs > 0 ) - { - ulTimeoutMs = ulNewTimeoutMs; - } - else - { - ulTimeoutMs = 1; - } - return TRUE; -} - -void -vMBPortClose( void ) -{ - if( iSerialFd != -1 ) - { - ( void )tcsetattr( iSerialFd, TCSANOW, &xOldTIO ); - ( void )close( iSerialFd ); - iSerialFd = -1; - } -} - -BOOL -prvbMBPortSerialRead( UCHAR * pucBuffer, USHORT usNBytes, USHORT * usNBytesRead ) -{ - BOOL bResult = TRUE; - ssize_t res; - fd_set rfds; - struct timeval tv; - - tv.tv_sec = 0; - tv.tv_usec = 50000; - FD_ZERO( &rfds ); - FD_SET( iSerialFd, &rfds ); - - /* Wait until character received or timeout. Recover in case of an - * interrupted read system call. */ - do - { - if( select( iSerialFd + 1, &rfds, NULL, NULL, &tv ) == -1 ) - { - if( errno != EINTR ) - { - bResult = FALSE; - } - } - else if( FD_ISSET( iSerialFd, &rfds ) ) - { - if( ( res = read( iSerialFd, pucBuffer, usNBytes ) ) == -1 ) - { - bResult = FALSE; - } - else - { - *usNBytesRead = ( USHORT ) res; - break; - } - } - else - { - *usNBytesRead = 0; - break; - } - } - while( bResult == TRUE ); - return bResult; -} - -BOOL -prvbMBPortSerialWrite( UCHAR * pucBuffer, USHORT usNBytes ) -{ - ssize_t res; - size_t left = ( size_t ) usNBytes; - size_t done = 0; - - while( left > 0 ) - { - if( ( res = write( iSerialFd, pucBuffer + done, left ) ) == -1 ) - { - if( errno != EINTR ) - { - break; - } - /* call write again because of interrupted system call. */ - continue; - } - done += res; - left -= res; - } - return left == 0 ? TRUE : FALSE; -} - -BOOL -xMBPortSerialPoll( ) -{ - BOOL bStatus = TRUE; - USHORT usBytesRead; - int i; - - while( bRxEnabled ) - { - if( prvbMBPortSerialRead( &ucBuffer[0], BUF_SIZE, &usBytesRead ) ) - { - if( usBytesRead == 0 ) - { - /* timeout with no bytes. */ - break; - } - else if( usBytesRead > 0 ) - { - for( i = 0; i < usBytesRead; i++ ) - { - /* Call the modbus stack and let him fill the buffers. */ - ( void )pxMBFrameCBByteReceived( ); - } - uiRxBufferPos = 0; - } - } - else - { - vMBPortLog( MB_LOG_ERROR, "SER-POLL", "read failed on serial device: %s\n", - strerror( errno ) ); - bStatus = FALSE; - } - } - if( bTxEnabled ) - { - while( bTxEnabled ) - { - ( void )pxMBFrameCBTransmitterEmpty( ); - /* Call the modbus stack to let him fill the buffer. */ - } - if( !prvbMBPortSerialWrite( &ucBuffer[0], uiTxBufferPos ) ) - { - vMBPortLog( MB_LOG_ERROR, "SER-POLL", "write failed on serial device: %s\n", - strerror( errno ) ); - bStatus = FALSE; - } - } - - return bStatus; -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - assert( uiTxBufferPos < BUF_SIZE ); - ucBuffer[uiTxBufferPos] = ucByte; - uiTxBufferPos++; - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - assert( uiRxBufferPos < BUF_SIZE ); - *pucByte = ucBuffer[uiRxBufferPos]; - uiRxBufferPos++; - return TRUE; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/porttimer.c deleted file mode 100644 index a65a0fa3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUX/port/porttimer.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * FreeModbus Libary: Linux Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Standard includes --------------------------------*/ -#include -#include - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ - -/* ----------------------- Static variables ---------------------------------*/ -ULONG ulTimeOut; -BOOL bTimeoutEnable; - -static struct timeval xTimeLast; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ - ulTimeOut = usTim1Timerout50us / 20U; - if( ulTimeOut == 0 ) - ulTimeOut = 1; - - return xMBPortSerialSetTimeout( ulTimeOut ); -} - -void -xMBPortTimersClose( ) -{ - /* Does not use any hardware resources. */ -} - -void -vMBPortTimerPoll( ) -{ - ULONG ulDeltaMS; - struct timeval xTimeCur; - - /* Timers are called from the serial layer because we have no high - * res timer in Win32. */ - if( bTimeoutEnable ) - { - if( gettimeofday( &xTimeCur, NULL ) != 0 ) - { - /* gettimeofday failed - retry next time. */ - } - else - { - ulDeltaMS = ( xTimeCur.tv_sec - xTimeLast.tv_sec ) * 1000L + - ( xTimeCur.tv_usec - xTimeLast.tv_usec ) * 1000L; - if( ulDeltaMS > ulTimeOut ) - { - bTimeoutEnable = FALSE; - ( void )pxMBPortCBTimerExpired( ); - } - } - } -} - -void -vMBPortTimersEnable( ) -{ - int res = gettimeofday( &xTimeLast, NULL ); - - assert( res == 0 ); - bTimeoutEnable = TRUE; -} - -void -vMBPortTimersDisable( ) -{ - bTimeoutEnable = FALSE; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/Makefile b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/Makefile deleted file mode 100644 index 2a7d4eab..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/Makefile +++ /dev/null @@ -1,78 +0,0 @@ -# -# Makefile for tcp freemodbus -# -# Copyright (c) 2007 Steven Guo -# -# --------------------------------------------------------------------------- - -# --------------------------------------------------------------------------- -# platform dependencies -# --------------------------------------------------------------------------- -ifneq ($(strip $(shell gcc -v 2>&1 |grep "cygwin")),) - CYGWIN_BUILD = YES -endif -CC = gcc -CXX = g++ -OBJCOPY = objcopy -INSIGHT = /opt/insight-x86/bin/insight - -# --------------------------------------------------------------------------- -# project specifics -# --------------------------------------------------------------------------- -CFLAGS = -g -Wall -Iport -I../../modbus/rtu \ - -I../../modbus/ascii -I../../modbus/include -I../../modbus/tcp -LDFLAGS = -ifeq ($(CYGWIN_BUILD),YES) -else -LDFLAGS += -lpthread -CFLAGS += -pthread -endif - -TGT = tcpmodbus -OTHER_CSRC = -OTHER_ASRC = -CSRC = demo.c port/portother.c \ - port/portevent.c port/porttcp.c \ - ../../modbus/mb.c ../../modbus/tcp/mbtcp.c \ - ../../modbus/functions/mbfunccoils.c \ - ../../modbus/functions/mbfuncdiag.c \ - ../../modbus/functions/mbfuncholding.c \ - ../../modbus/functions/mbfuncinput.c \ - ../../modbus/functions/mbfuncother.c \ - ../../modbus/functions/mbfuncdisc.c \ - ../../modbus/functions/mbutils.c -ASRC = -OBJS = $(CSRC:.c=.o) $(ASRC:.S=.o) -NOLINK_OBJS = $(OTHER_CSRC:.c=.o) $(OTHER_ASRC:.S=.o) -DEPS = $(OBJS:.o=.d) $(NOLINK_OBJS:.o=.d) -BIN = $(TGT) - -.PHONY: clean all - -all: $(BIN) - -debug: - $(INSIGHT) --se=$(TGT) - -$(BIN): $(OBJS) $(NOLINK_OBJS) - $(CC) $(LDFLAGS) $(OBJS) $(LDLIBS) -o $@ - -clean: - rm -f $(DEPS) - rm -f $(OBJS) $(NOLINK_OBJS) - rm -f $(BIN) - -# --------------------------------------------------------------------------- -# rules for code generation -# --------------------------------------------------------------------------- -%.o: %.c - $(CC) $(CFLAGS) -o $@ -c $< - -%.o: %.S - $(CC) $(ASFLAGS) -o $@ -c $< - -# --------------------------------------------------------------------------- -# # compiler generated dependencies -# --------------------------------------------------------------------------- --include $(LWOS_DEPS) $(PORT_DEPS) $(APPL_DEPS) - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/demo.c deleted file mode 100644 index a6183f45..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/demo.c +++ /dev/null @@ -1,298 +0,0 @@ -/* - * FreeModbus Libary: Win32 Demo Application - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - - /********************************************************** - * Linux TCP support. - * Based on Walter's project. - * Modified by Steven Guo - ***********************************************************/ - -/* ----------------------- Standard C Libs includes --------------------------*/ -#include -#include -#include -#include -#include -#include -#include - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define PROG "freemodbus" - -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 -#define REG_HOLDING_START 2000 -#define REG_HOLDING_NREGS 130 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; -static USHORT usRegHoldingStart = REG_HOLDING_START; -static USHORT usRegHoldingBuf[REG_HOLDING_NREGS]; -static pthread_mutex_t xLock = PTHREAD_MUTEX_INITIALIZER; -static enum ThreadState -{ - STOPPED, - RUNNING, - SHUTDOWN -} ePollThreadState; - -/* ----------------------- Static functions ---------------------------------*/ -static BOOL bCreatePollingThread( void ); -static enum ThreadState eGetPollingThreadState( void ); -static void eSetPollingThreadState( enum ThreadState eNewState ); -static void* pvPollingThread( void *pvParameter ); - -/* ----------------------- Start implementation -----------------------------*/ -int -main( int argc, char *argv[] ) -{ - int iExitCode; - CHAR cCh; - BOOL bDoExit; - - if( eMBTCPInit( MB_TCP_PORT_USE_DEFAULT ) != MB_ENOERR ) - { - fprintf( stderr, "%s: can't initialize modbus stack!\r\n", PROG ); - iExitCode = EXIT_FAILURE; - } - else - { - eSetPollingThreadState( STOPPED ); - /* CLI interface. */ - printf( "Type 'q' for quit or 'h' for help!\r\n" ); - bDoExit = FALSE; - do - { - printf( "> " ); - cCh = getchar( ); - switch ( cCh ) - { - case 'q' : - bDoExit = TRUE; - break; - case 'd' : - eSetPollingThreadState( SHUTDOWN ); - break; - case 'e' : - if( bCreatePollingThread( ) != TRUE ) - { - printf( "Can't start protocol stack! Already running?\r\n" ); - } - break; - case 's' : - switch ( eGetPollingThreadState( ) ) - { - case RUNNING: - printf( "Protocol stack is running.\r\n" ); - break; - case STOPPED: - printf( "Protocol stack is stopped.\r\n" ); - break; - case SHUTDOWN: - printf( "Protocol stack is shuting down.\r\n" ); - break; - } - break; - case 'h': - printf( "FreeModbus demo application help:\r\n" ); - printf( " 'd' ... disable protocol stack.\r\n" ); - printf( " 'e' ... enabled the protocol stack\r\n" ); - printf( " 's' ... show current status\r\n" ); - printf( " 'q' ... quit applicationr\r\n" ); - printf( " 'h' ... this information\r\n" ); - printf( "\r\n" ); - printf( "Copyright 2007 Steven Guo \r\n" ); - break; - default: - if( cCh != '\n' ) - { - printf( "illegal command '%c'!\r\n" , cCh ); - } - break; - } - - /* eat up everything untill return character. */ - while( cCh != '\n' ) - { - cCh = getchar( ); - } - } - while( !bDoExit ); - - /* Release hardware resources. */ - ( void )eMBClose( ); - iExitCode = EXIT_SUCCESS; - } - return iExitCode; -} - -BOOL -bCreatePollingThread( void ) -{ - BOOL bResult; - pthread_t xThread; - if( eGetPollingThreadState( ) == STOPPED ) - { - if( pthread_create( &xThread, NULL, pvPollingThread, NULL ) != 0 ) - { - /* Can't create the polling thread. */ - bResult = FALSE; - } - else - { - bResult = TRUE; - } - } - else - { - bResult = FALSE; - } - - return bResult; -} - -void* pvPollingThread( void *pvParameter ) -{ - eSetPollingThreadState( RUNNING ); - - if( eMBEnable( ) == MB_ENOERR ) - { - do - { - if( eMBPoll( ) != MB_ENOERR ) - break; - } - while( eGetPollingThreadState( ) != SHUTDOWN ); - } - - ( void )eMBDisable( ); - - eSetPollingThreadState( STOPPED ); - - return 0; -} - -enum ThreadState -eGetPollingThreadState( ) -{ - enum ThreadState eCurState; - - ( void )pthread_mutex_lock( &xLock ); - eCurState = ePollThreadState; - ( void )pthread_mutex_unlock( &xLock ); - - return eCurState; -} - -void -eSetPollingThreadState( enum ThreadState eNewState ) -{ - ( void )pthread_mutex_lock( &xLock ); - ePollThreadState = eNewState; - ( void )pthread_mutex_unlock( &xLock ); -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_HOLDING_START ) && - ( usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegHoldingStart ); - switch ( eMode ) - { - /* Pass current register values to the protocol stack. */ - case MB_REG_READ: - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( UCHAR ) ( usRegHoldingBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( UCHAR ) ( usRegHoldingBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - break; - - /* Update current register values with new values from the - * protocol stack. */ - case MB_REG_WRITE: - while( usNRegs > 0 ) - { - usRegHoldingBuf[iRegIndex] = *pucRegBuffer++ << 8; - usRegHoldingBuf[iRegIndex] |= *pucRegBuffer++; - iRegIndex++; - usNRegs--; - } - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/port/port.h deleted file mode 100644 index d9f047b3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/port/port.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * FreeModbus Libary: BSD Socket Library Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - - /********************************************************** - * Linux TCP support. - * Based on Walter's project. - * Modified by Steven Guo - ***********************************************************/ - -#ifndef _PORT_H -#define _PORT_H - - -#include - -#define INLINE -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif -/* ----------------------- Defines ------------------------------------------*/ -#define ENTER_CRITICAL_SECTION( ) -#define EXIT_CRITICAL_SECTION( ) -#define MB_PORT_HAS_CLOSE 1 -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif -/* ----------------------- Type definitions ---------------------------------*/ -typedef int SOCKET; - -#define SOCKET_ERROR (-1) -#define INVALID_SOCKET (~0) -typedef char BOOL; -typedef unsigned char UCHAR; -typedef unsigned char BYTE; -typedef char CHAR; -typedef unsigned short USHORT; -typedef short SHORT; - -typedef unsigned long ULONG; -typedef long LONG; -typedef enum -{ - MB_LOG_DEBUG, - MB_LOG_INFO, - MB_LOG_WARN, - MB_LOG_ERROR -} eMBPortLogLevel; - -/* ----------------------- Function prototypes ------------------------------*/ - -void TcpvMBPortLog( eMBPortLogLevel eLevel, const CHAR * szModule, const CHAR * szFmt, - ... ); - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/port/portevent.c deleted file mode 100644 index b56fa4f0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/port/portevent.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * FreeModbus Libary: Win32 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - - /********************************************************** - * Linux TCP support. - * Based on Walter's project. - * Modified by Steven Guo - ***********************************************************/ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Function prototypes ------------------------------*/ -BOOL xMBPortTCPPool( void ); - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - else - { - /* We can't do anything with errors from the pooling module. */ - ( void )xMBPortTCPPool( ); - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/port/portother.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/port/portother.c deleted file mode 100644 index 70ec43bb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/port/portother.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * FreeModbus Libary: Win32 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - - /********************************************************** - * Linux TCP support. - * Based on Walter's project. - * Modified by Steven Guo - ***********************************************************/ - -#include -#include -#include - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" -#include "mbconfig.h" - - -BOOL -prvMBTCPPortAddressToString( SOCKET xSocket, CHAR * szAddr, USHORT usBufSize ) -{ - return TRUE; -} - -CHAR * -prvMBTCPPortFrameToString( UCHAR * pucFrame, USHORT usFrameLen ) -{ - return NULL; -} - -CHAR * -WsaError2String( int iError ) -{ - return NULL; -} - -void -vMBPortLog( eMBPortLogLevel eLevel, const CHAR * szModule, const CHAR * szFmt, ... ) -{ - va_list args; - static const CHAR *arszLevel2Str[] = { "DEBUG", "INFO", "WARN", "ERROR" }; - - fprintf( stderr, "%s: %s: ", arszLevel2Str[eLevel], szModule ); - - va_start( args, szFmt ); - fprintf( stderr, szFmt, args ); - va_end( args ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/port/porttcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/port/porttcp.c deleted file mode 100644 index 5cfc2fb4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LINUXTCP/port/porttcp.c +++ /dev/null @@ -1,367 +0,0 @@ -/* - * FreeModbus Libary: Win32 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* - * Design Notes: - * - * The xMBPortTCPInit function allocates a socket and binds the socket to - * all available interfaces ( bind with INADDR_ANY ). In addition it - * creates an array of event objects which is used to check the state of - * the clients. On event object is used to handle new connections or - * closed ones. The other objects are used on a per client basis for - * processing. - */ - - /********************************************************** - * Linux TCP support. - * Based on Walter's project. - * Modified by Steven Guo - ***********************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - - - -/* ----------------------- MBAP Header --------------------------------------*/ -#define MB_TCP_UID 6 -#define MB_TCP_LEN 4 -#define MB_TCP_FUNC 7 - -/* ----------------------- Defines -----------------------------------------*/ -#define MB_TCP_DEFAULT_PORT 502 /* TCP listening port. */ -#define MB_TCP_POOL_TIMEOUT 50 /* pool timeout for event waiting. */ -#define MB_TCP_READ_TIMEOUT 1000 /* Maximum timeout to wait for packets. */ -#define MB_TCP_READ_CYCLE 100 /* Time between checking for new data. */ - -#define MB_TCP_DEBUG 1 /* Set to 1 for additional debug output. */ - -#define MB_TCP_BUF_SIZE ( 256 + 7 ) /* Must hold a complete Modbus TCP frame. */ - -#define EV_CONNECTION 0 -#define EV_CLIENT 1 -#define EV_NEVENTS EV_CLIENT + 1 - -/* ----------------------- Static variables ---------------------------------*/ -SOCKET xListenSocket; -SOCKET xClientSocket = INVALID_SOCKET; -static fd_set allset; - -static UCHAR aucTCPBuf[MB_TCP_BUF_SIZE]; -static USHORT usTCPBufPos; -static USHORT usTCPFrameBytesLeft; - -/* ----------------------- External functions -------------------------------*/ -CHAR *WsaError2String( int dwError ); - -/* ----------------------- Static functions ---------------------------------*/ -BOOL prvMBTCPPortAddressToString( SOCKET xSocket, CHAR * szAddr, USHORT usBufSize ); -CHAR *prvMBTCPPortFrameToString( UCHAR * pucFrame, USHORT usFrameLen ); -static BOOL prvbMBPortAcceptClient( void ); -static void prvvMBPortReleaseClient( void ); - - -/* ----------------------- Begin implementation -----------------------------*/ - -BOOL -xMBTCPPortInit( USHORT usTCPPort ) -{ - USHORT usPort; - struct sockaddr_in serveraddr; - - if( usTCPPort == 0 ) - { - usPort = MB_TCP_DEFAULT_PORT; - } - else - { - usPort = ( USHORT ) usTCPPort; - } - memset( &serveraddr, 0, sizeof( serveraddr ) ); - serveraddr.sin_family = AF_INET; - serveraddr.sin_addr.s_addr = htonl( INADDR_ANY ); - serveraddr.sin_port = htons( usPort ); - if( ( xListenSocket = socket( AF_INET, SOCK_STREAM, IPPROTO_TCP ) ) == -1 ) - { - fprintf( stderr, "Create socket failed.\r\n" ); - return FALSE; - } - else if( bind( xListenSocket, ( struct sockaddr * )&serveraddr, sizeof( serveraddr ) ) == -1 ) - { - fprintf( stderr, "Bind socket failed.\r\n" ); - return FALSE; - } - else if( listen( xListenSocket, 5 ) == -1 ) - { - fprintf( stderr, "Listen socket failed.\r\n" ); - return FALSE; - } - FD_ZERO( &allset ); - FD_SET( xListenSocket, &allset ); - return TRUE; -} - -void -vMBTCPPortClose( ) -{ - // Close all client sockets. - if( xClientSocket != SOCKET_ERROR ) - { - prvvMBPortReleaseClient( ); - } - // Close the listener socket. - if( xListenSocket != SOCKET_ERROR ) - { - close( xListenSocket ); - } -} - -void -vMBTCPPortDisable( void ) -{ - /* Close all client sockets. */ - if( xClientSocket != SOCKET_ERROR ) - { - prvvMBPortReleaseClient( ); - } -} - -/*! \ingroup port_win32tcp - * - * \brief Pool the listening socket and currently connected Modbus TCP clients - * for new events. - * \internal - * - * This function checks if new clients want to connect or if already connected - * clients are sending requests. If a new client is connected and there are - * still client slots left (The current implementation supports only one) - * then the connection is accepted and an event object for the new client - * socket is activated (See prvbMBPortAcceptClient() ). - * Events for already existing clients in \c FD_READ and \c FD_CLOSE. In case of - * an \c FD_CLOSE the client connection is released (See prvvMBPortReleaseClient() ). - * In case of an \c FD_READ command the existing data is read from the client - * and if a complete frame has been received the Modbus Stack is notified. - * - * \return FALSE in case of an internal I/O error. For example if the internal - * event objects are in an invalid state. Note that this does not include any - * client errors. In all other cases returns TRUE. - */ -BOOL -xMBPortTCPPool( void ) -{ - int n; - fd_set fread; - struct timeval tval; - - tval.tv_sec = 0; - tval.tv_usec = 5000; - int ret; - USHORT usLength; - - if( xClientSocket == INVALID_SOCKET ) - { - /* Accept to client */ - if( ( n = select( xListenSocket + 1, &allset, NULL, NULL, NULL ) ) < 0 ) - { - if( errno == EINTR ) - { - ; - } - else - { - ; - } - } - if( FD_ISSET( xListenSocket, &allset ) ) - { - ( void )prvbMBPortAcceptClient( ); - } - } - while( TRUE ) - { - FD_ZERO( &fread ); - FD_SET( xClientSocket, &fread ); - if( ( ( ret = select( xClientSocket + 1, &fread, NULL, NULL, &tval ) ) == SOCKET_ERROR ) - || !ret ) - { - continue; - } - if( ret > 0 ) - { - if( FD_ISSET( xClientSocket, &fread ) ) - { - if( ( ( ret = - recv( xClientSocket, &aucTCPBuf[usTCPBufPos], usTCPFrameBytesLeft, - 0 ) ) == SOCKET_ERROR ) || ( !ret ) ) - { - close( xClientSocket ); - xClientSocket = INVALID_SOCKET; - return TRUE; - } - usTCPBufPos += ret; - usTCPFrameBytesLeft -= ret; - if( usTCPBufPos >= MB_TCP_FUNC ) - { - /* Length is a byte count of Modbus PDU (function code + data) and the - * unit identifier. */ - usLength = aucTCPBuf[MB_TCP_LEN] << 8U; - usLength |= aucTCPBuf[MB_TCP_LEN + 1]; - - /* Is the frame already complete. */ - if( usTCPBufPos < ( MB_TCP_UID + usLength ) ) - { - usTCPFrameBytesLeft = usLength + MB_TCP_UID - usTCPBufPos; - } - /* The frame is complete. */ - else if( usTCPBufPos == ( MB_TCP_UID + usLength ) ) - { - ( void )xMBPortEventPost( EV_FRAME_RECEIVED ); - return TRUE; - } - /* This can not happend because we always calculate the number of bytes - * to receive. */ - else - { - assert( usTCPBufPos <= ( MB_TCP_UID + usLength ) ); - } - } - } - } - } - return TRUE; -} - -/*! - * \ingroup port_win32tcp - * \brief Receives parts of a Modbus TCP frame and if complete notifies - * the protocol stack. - * \internal - * - * This function reads a complete Modbus TCP frame from the protocol stack. - * It starts by reading the header with an initial request size for - * usTCPFrameBytesLeft = MB_TCP_FUNC. If the header is complete the - * number of bytes left can be calculated from it (See Length in MBAP header). - * Further read calls are issued until the frame is complete. - * - * \return \c TRUE if part of a Modbus TCP frame could be processed. In case - * of a communication error the function returns \c FALSE. - */ - -BOOL -xMBTCPPortGetRequest( UCHAR ** ppucMBTCPFrame, USHORT * usTCPLength ) -{ - *ppucMBTCPFrame = &aucTCPBuf[0]; - *usTCPLength = usTCPBufPos; - - /* Reset the buffer. */ - usTCPBufPos = 0; - usTCPFrameBytesLeft = MB_TCP_FUNC; - return TRUE; -} - -BOOL -xMBTCPPortSendResponse( const UCHAR * pucMBTCPFrame, USHORT usTCPLength ) -{ - BOOL bFrameSent = FALSE; - BOOL bAbort = FALSE; - int res; - int iBytesSent = 0; - int iTimeOut = MB_TCP_READ_TIMEOUT; - - do - { - res = send( xClientSocket, &pucMBTCPFrame[iBytesSent], usTCPLength - iBytesSent, 0 ); - switch ( res ) - { - case -1: - if( iTimeOut > 0 ) - { - iTimeOut -= MB_TCP_READ_CYCLE; - usleep( MB_TCP_READ_CYCLE ); - } - else - { - bAbort = TRUE; - } - break; - case 0: - prvvMBPortReleaseClient( ); - bAbort = TRUE; - break; - default: - iBytesSent += res; - break; - } - } - while( ( iBytesSent != usTCPLength ) && !bAbort ); - - bFrameSent = iBytesSent == usTCPLength ? TRUE : FALSE; - - return bFrameSent; -} - -void -prvvMBPortReleaseClient( ) -{ - ( void )recv( xClientSocket, &aucTCPBuf[0], MB_TCP_BUF_SIZE, 0 ); - - ( void )close( xClientSocket ); - xClientSocket = INVALID_SOCKET; -} - -BOOL -prvbMBPortAcceptClient( ) -{ - SOCKET xNewSocket; - BOOL bOkay; - - /* Check if we can handle a new connection. */ - - if( xClientSocket != INVALID_SOCKET ) - { - fprintf( stderr, "can't accept new client. all connections in use.\n" ); - bOkay = FALSE; - } - else if( ( xNewSocket = accept( xListenSocket, NULL, NULL ) ) == INVALID_SOCKET ) - { - bOkay = FALSE; - } - else - { - xClientSocket = xNewSocket; - usTCPBufPos = 0; - usTCPFrameBytesLeft = MB_TCP_FUNC; - bOkay = TRUE; - } - return bOkay; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/README.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/README.txt deleted file mode 100644 index e55bb3f6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/README.txt +++ /dev/null @@ -1,46 +0,0 @@ - - FREEMODBUS 1.2 LPC214X PORT - =========================== - -REQUIREMENTS -============ - -This demo application provides a port for the LPC214X series of processors -from NXP Semiconductors. The port was done using the MCB2140 from Keil[1] -which features a LPC2148 MCU. -It requires a wired serial port to a host processor and a Modbus Master -Software on the PC side to be useful. Demo versions of Modbus Masters -can be found in [2] and [3]. - - -TESTING -======= - -Start the Modbus Sample Application and test if the input registers starting -at protocol address 1000 can be read. There are four registers value avai- -lable and the output should look like: - -Polling slave (Ctrl-C to stop) ... -[1000]: 6474 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... -[1000]: -8831 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... - -The simple testing utility used in the 'demo_rtu.bat' script can be found -at [4]. - - -[1] Keil MCB2140 kit: http://www.keil.com/mcb2140/ -[2] WinTech ModScan32: http://www.win-tech.com/html/modscan32.htm -[3] Modus Poll: http://www.modbustools.com/modbus_poll.asp -[4] FieldTalk Modpoll: http://www.focus-sw.com/fieldtalk/modpoll.html - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/Startup.s b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/Startup.s deleted file mode 100644 index 4ff44ebe..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/Startup.s +++ /dev/null @@ -1,435 +0,0 @@ -/***********************************************************************/ -/* This file is part of the uVision/ARM development tools */ -/* Copyright KEIL ELEKTRONIK GmbH 2002-2005 */ -/***********************************************************************/ -/* */ -/* STARTUP.S: Startup file for Philips LPC2000 device series */ -/* */ -/***********************************************************************/ - - -/* -//*** <<< Use Configuration Wizard in Context Menu >>> *** -*/ - - -/* - * The STARTUP.S code is executed after CPU Reset. This file may be - * translated with the following SET symbols. In uVision these SET - * symbols are entered under Options - ASM - Set. - * - * REMAP: when set the startup code initializes the register MEMMAP - * which overwrites the settings of the CPU configuration pins. The - * startup and interrupt vectors are remapped from: - * 0x00000000 default setting (not remapped) - * 0x80000000 when EXTMEM_MODE is used - * 0x40000000 when RAM_MODE is used - * - * EXTMEM_MODE: when set the device is configured for code execution - * from external memory starting at address 0x80000000. The startup - * vectors are located to 0x80000000. - * - * RAM_MODE: when set the device is configured for code execution - * from on-chip RAM starting at address 0x40000000. The startup - * vectors are located to 0x40000000. - */ - - -// Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs - - Mode_USR EQU 0x10 - Mode_FIQ EQU 0x11 - Mode_IRQ EQU 0x12 - Mode_SVC EQU 0x13 - Mode_ABT EQU 0x17 - Mode_UND EQU 0x1B - Mode_SYS EQU 0x1F - - I_Bit EQU 0x80 /* when I bit is set, IRQ is disabled */ - F_Bit EQU 0x40 /* when F bit is set, FIQ is disabled */ - - -/* -// Stack Configuration (Stack Sizes in Bytes) -// Undefined Mode <0x0-0xFFFFFFFF:4> -// Supervisor Mode <0x0-0xFFFFFFFF:4> -// Abort Mode <0x0-0xFFFFFFFF:4> -// Fast Interrupt Mode <0x0-0xFFFFFFFF:4> -// Interrupt Mode <0x0-0xFFFFFFFF:4> -// User/System Mode <0x0-0xFFFFFFFF:4> -// -*/ - UND_Stack_Size EQU 0x00000004 - SVC_Stack_Size EQU 0x00000004 - ABT_Stack_Size EQU 0x00000004 - FIQ_Stack_Size EQU 0x00000004 - IRQ_Stack_Size EQU 0x00000080 - USR_Stack_Size EQU 0x00000400 - -AREA STACK, DATA, READWRITE, ALIGN=2 - DS (USR_Stack_Size+3)&~3 ; Stack for User/System Mode - DS (SVC_Stack_Size+3)&~3 ; Stack for Supervisor Mode - DS (IRQ_Stack_Size+3)&~3 ; Stack for Interrupt Mode - DS (FIQ_Stack_Size+3)&~3 ; Stack for Fast Interrupt Mode - DS (ABT_Stack_Size+3)&~3 ; Stack for Abort Mode - DS (UND_Stack_Size+3)&~3 ; Stack for Undefined Mode -Top_Stack: - - -// VPBDIV definitions - VPBDIV EQU 0xE01FC100 /* VPBDIV Address */ - -/* -// VPBDIV Setup -// Peripheral Bus Clock Rate -// VPBDIV: VPB Clock -// <0=> VPB Clock = CPU Clock / 4 -// <1=> VPB Clock = CPU Clock -// <2=> VPB Clock = CPU Clock / 2 -// XCLKDIV: XCLK Pin -// <0=> XCLK Pin = CPU Clock / 4 -// <1=> XCLK Pin = CPU Clock -// <2=> XCLK Pin = CPU Clock / 2 -// -*/ - VPBDIV_SETUP EQU 0 - VPBDIV_Val EQU 0x00000000 - - -// Phase Locked Loop (PLL) definitions - PLL_BASE EQU 0xE01FC080 /* PLL Base Address */ - PLLCON_OFS EQU 0x00 /* PLL Control Offset*/ - PLLCFG_OFS EQU 0x04 /* PLL Configuration Offset */ - PLLSTAT_OFS EQU 0x08 /* PLL Status Offset */ - PLLFEED_OFS EQU 0x0C /* PLL Feed Offset */ - PLLCON_PLLE EQU (1<<0) /* PLL Enable */ - PLLCON_PLLC EQU (1<<1) /* PLL Connect */ - PLLCFG_MSEL EQU (0x1F<<0) /* PLL Multiplier */ - PLLCFG_PSEL EQU (0x03<<5) /* PLL Divider */ - PLLSTAT_PLOCK EQU (1<<10) /* PLL Lock Status */ - -/* -// PLL Setup -// Phase Locked Loop -// CCLK - Processor Clock -// Fcco - PLL Oscillator -// MSEL: PLL Multiplier Selection -// <1-32><#-1> -// PLL Multiplier "M" Value -// CCLK = M * Fosc -// PSEL: PLL Divider Selection -// <0=> 1 <1=> 2 <2=> 4 <3=> 8 -// PLL Divider "P" Value -// Fcco = CCLK * 2 * P -// 156MHz <= Fcco <= 320MHz -// -*/ - PLL_SETUP EQU 1 - PLLCFG_Val EQU 0x00000024 - - -// Memory Accelerator Module (MAM) definitions - MAM_BASE EQU 0xE01FC000 /* MAM Base Address */ - MAMCR_OFS EQU 0x00 /* MAM Control Offset*/ - MAMTIM_OFS EQU 0x04 /* MAM Timing Offset */ - -/* -// MAM Setup -// Memory Accelerator Module -// MAM Control -// <0=> Disabled -// <1=> Partially Enabled -// <2=> Fully Enabled -// Mode -// MAM Timing -// <0=> Reserved <1=> 1 <2=> 2 <3=> 3 -// <4=> 4 <5=> 5 <6=> 6 <7=> 7 -// Fetch Cycles -// -*/ - MAM_SETUP EQU 1 - MAMCR_Val EQU 0x00000002 - MAMTIM_Val EQU 0x00000004 - - -// External Memory Controller (EMC) definitions - EMC_BASE EQU 0xFFE00000 /* EMC Base Address */ - BCFG0_OFS EQU 0x00 /* BCFG0 Offset */ - BCFG1_OFS EQU 0x04 /* BCFG1 Offset */ - BCFG2_OFS EQU 0x08 /* BCFG2 Offset */ - BCFG3_OFS EQU 0x0C /* BCFG3 Offset */ - -/* -// External Memory Controller (EMC) -*/ - EMC_SETUP EQU 0 - -/* -// Bank Configuration 0 (BCFG0) -// IDCY: Idle Cycles <0-15> -// WST1: Wait States 1 <0-31> -// WST2: Wait States 2 <0-31> -// RBLE: Read Byte Lane Enable -// WP: Write Protect -// BM: Burst ROM -// MW: Memory Width <0=> 8-bit <1=> 16-bit -// <2=> 32-bit <3=> Reserved -// -*/ - BCFG0_SETUP EQU 0 - BCFG0_Val EQU 0x0000FBEF - -/* -// Bank Configuration 1 (BCFG1) -// IDCY: Idle Cycles <0-15> -// WST1: Wait States 1 <0-31> -// WST2: Wait States 2 <0-31> -// RBLE: Read Byte Lane Enable -// WP: Write Protect -// BM: Burst ROM -// MW: Memory Width <0=> 8-bit <1=> 16-bit -// <2=> 32-bit <3=> Reserved -// -*/ - BCFG1_SETUP EQU 0 - BCFG1_Val EQU 0x0000FBEF - -/* -// Bank Configuration 2 (BCFG2) -// IDCY: Idle Cycles <0-15> -// WST1: Wait States 1 <0-31> -// WST2: Wait States 2 <0-31> -// RBLE: Read Byte Lane Enable -// WP: Write Protect -// BM: Burst ROM -// MW: Memory Width <0=> 8-bit <1=> 16-bit -// <2=> 32-bit <3=> Reserved -// -*/ - BCFG2_SETUP EQU 0 - BCFG2_Val EQU 0x0000FBEF - -/* -// Bank Configuration 3 (BCFG3) -// IDCY: Idle Cycles <0-15> -// WST1: Wait States 1 <0-31> -// WST2: Wait States 2 <0-31> -// RBLE: Read Byte Lane Enable -// WP: Write Protect -// BM: Burst ROM -// MW: Memory Width <0=> 8-bit <1=> 16-bit -// <2=> 32-bit <3=> Reserved -// -*/ - BCFG3_SETUP EQU 0 - BCFG3_Val EQU 0x0000FBEF - -/* -// End of EMC -*/ - - -// External Memory Pins definitions - PINSEL2 EQU 0xE002C014 /* PINSEL2 Address */ - PINSEL2_Val EQU 0x0E6149E4 /* CS0..3, OE, WE, BLS0..3, - D0..31, A2..23, JTAG Pins */ - - -// Starupt Code must be linked first at Address at which it expects to run. - -$IF (EXTMEM_MODE) - CODE_BASE EQU 0x80000000 -$ELSEIF (RAM_MODE) - CODE_BASE EQU 0x40000000 -$ELSE - CODE_BASE EQU 0x00000000 -$ENDIF - -AREA STARTUPCODE, CODE, AT CODE_BASE // READONLY, ALIGN=4 - PUBLIC __startup - - EXTERN CODE32 (?C?INIT) - -__startup PROC CODE32 - -// Pre-defined interrupt handlers that may be directly -// overwritten by C interrupt functions -EXTERN CODE32 (Undef_Handler?A) -EXTERN CODE32 (SWI_Handler?A) -EXTERN CODE32 (PAbt_Handler?A) -EXTERN CODE32 (DAbt_Handler?A) -EXTERN CODE32 (IRQ_Handler?A) -EXTERN CODE32 (FIQ_Handler?A) - -// Exception Vectors -// Mapped to Address 0. -// Absolute addressing mode must be used. - -Vectors: LDR PC,Reset_Addr - LDR PC,Undef_Addr - LDR PC,SWI_Addr - LDR PC,PAbt_Addr - LDR PC,DAbt_Addr - NOP /* Reserved Vector */ -; LDR PC,IRQ_Addr - LDR PC,[PC, #-0x0FF0] /* Vector from VicVectAddr */ - LDR PC,FIQ_Addr - -Reset_Addr: DD Reset_Handler -Undef_Addr: DD Undef_Handler?A -SWI_Addr: DD SWI_Handler?A -PAbt_Addr: DD PAbt_Handler?A -DAbt_Addr: DD DAbt_Handler?A - DD 0 /* Reserved Address */ -IRQ_Addr: DD IRQ_Handler?A -FIQ_Addr: DD FIQ_Handler?A - - -// Reset Handler - -Reset_Handler: - - -$IF (EXTMEM_MODE) - LDR R0, =PINSEL2 - LDR R1, =PINSEL2_Val - STR R1, [R0] -$ENDIF - - -IF (EMC_SETUP != 0) - LDR R0, =EMC_BASE - -IF (BCFG0_SETUP != 0) - LDR R1, =BCFG0_Val - STR R1, [R0, #BCFG0_OFS] -ENDIF - -IF (BCFG1_SETUP != 0) - LDR R1, =BCFG1_Val - STR R1, [R0, #BCFG1_OFS] -ENDIF - -IF (BCFG2_SETUP != 0) - LDR R1, =BCFG2_Val - STR R1, [R0, #BCFG2_OFS] -ENDIF - -IF (BCFG3_SETUP != 0) - LDR R1, =BCFG3_Val - STR R1, [R0, #BCFG3_OFS] -ENDIF - -ENDIF - - -IF (VPBDIV_SETUP != 0) - LDR R0, =VPBDIV - LDR R1, =VPBDIV_Val - STR R1, [R0] -ENDIF - - -IF (PLL_SETUP != 0) - LDR R0, =PLL_BASE - MOV R1, #0xAA - MOV R2, #0x55 - -// Configure and Enable PLL - MOV R3, #PLLCFG_Val - STR R3, [R0, #PLLCFG_OFS] - MOV R3, #PLLCON_PLLE - STR R3, [R0, #PLLCON_OFS] - STR R1, [R0, #PLLFEED_OFS] - STR R2, [R0, #PLLFEED_OFS] - -// Wait until PLL Locked -PLL_Loop: LDR R3, [R0, #PLLSTAT_OFS] - ANDS R3, R3, #PLLSTAT_PLOCK - BEQ PLL_Loop - -// Switch to PLL Clock - MOV R3, #(PLLCON_PLLE | PLLCON_PLLC) - STR R3, [R0, #PLLCON_OFS] - STR R1, [R0, #PLLFEED_OFS] - STR R2, [R0, #PLLFEED_OFS] -ENDIF - - -IF (MAM_SETUP != 0) - LDR R0, =MAM_BASE - MOV R1, #MAMTIM_Val - STR R1, [R0, #MAMTIM_OFS] - MOV R1, #MAMCR_Val - STR R1, [R0, #MAMCR_OFS] -ENDIF - - -// Memory Mapping - MEMMAP EQU 0xE01FC040 /* Memory Mapping Control */ - -$IF (REMAP) - LDR R0, =MEMMAP -$IF (EXTMEM_MODE) - MOV R1, #3 -$ELSEIF (RAM_MODE) - MOV R1, #2 -$ELSE - MOV R1, #1 -$ENDIF - STR R1, [R0] -$ENDIF - - -// Setup Stack for each mode - LDR R0, =Top_Stack - -// Enter Undefined Instruction Mode and set its Stack Pointer - MSR CPSR_c, #Mode_UND|I_Bit|F_Bit - MOV SP, R0 - SUB R0, R0, #UND_Stack_Size - -// Enter Abort Mode and set its Stack Pointer - MSR CPSR_c, #Mode_ABT|I_Bit|F_Bit - MOV SP, R0 - SUB R0, R0, #ABT_Stack_Size - -// Enter FIQ Mode and set its Stack Pointer - MSR CPSR_c, #Mode_FIQ|I_Bit|F_Bit - MOV SP, R0 - SUB R0, R0, #FIQ_Stack_Size - -// Enter IRQ Mode and set its Stack Pointer - MSR CPSR_c, #Mode_IRQ|I_Bit|F_Bit - MOV SP, R0 - SUB R0, R0, #IRQ_Stack_Size - -// Enter Supervisor Mode and set its Stack Pointer - MSR CPSR_c, #Mode_SVC|I_Bit|F_Bit - MOV SP, R0 - SUB R0, R0, #SVC_Stack_Size - -// Enter User Mode and set its Stack Pointer - MSR CPSR_c, #Mode_USR - MOV SP, R0 - -// Enter the C code - LDR R0,=?C?INIT - TST R0,#1 ; Bit-0 set: INIT is Thumb - LDREQ LR,=exit?A ; ARM Mode - LDRNE LR,=exit?T ; Thumb Mode - BX R0 - ENDP - -PUBLIC exit?A -exit?A PROC CODE32 - B exit?A - ENDP - -PUBLIC exit?T -exit?T PROC CODE16 -exit: B exit?T - ENDP - - - END diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/build/.dont_remove b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/build/.dont_remove deleted file mode 100644 index e69de29b..00000000 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/build/bin/.dont_remove b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/build/bin/.dont_remove deleted file mode 100644 index e69de29b..00000000 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/build/lst/.dont_remove b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/build/lst/.dont_remove deleted file mode 100644 index e69de29b..00000000 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/build/obj/.dont_remove b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/build/obj/.dont_remove deleted file mode 100644 index e69de29b..00000000 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/demo.Opt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/demo.Opt deleted file mode 100644 index 7eb4b89e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/demo.Opt +++ /dev/null @@ -1,56 +0,0 @@ -### uVision2 Project, (C) Keil Software -### Do not modify ! - - cExt (*.c) - aExt (*.s*; *.src; *.a*) - oExt (*.obj) - lExt (*.lib) - tExt (*.txt; *.h; *.inc) - pExt (*.plm) - CppX (*.cpp) - DaveTm { 0,0,0,0,0,0,0,0 } - -Target (Demo), 0x0005 // Tools: '' -GRPOPT 1,(Demo),1,0,0 -GRPOPT 2,(FreeModbus),1,0,0 - -OPTFFF 1,1,1,0,0,0,0,0,<.\demo.c> -OPTFFF 1,2,1,0,0,0,0,0,<.\port\porttimer.c> -OPTFFF 1,3,1,0,0,0,0,0,<.\port\port.c> -OPTFFF 1,4,1,0,0,0,0,0,<.\port\portevent.c> -OPTFFF 1,5,1,0,0,0,0,0,<.\port\portserial.c> -OPTFFF 1,6,2,855638016,0,0,0,0,<.\Startup.s> -OPTFFF 2,7,1,0,0,0,0,0,<..\..\modbus\mb.c> -OPTFFF 2,8,1,0,0,0,0,0,<..\..\modbus\functions\mbutils.c> -OPTFFF 2,9,1,0,0,0,0,0,<..\..\modbus\functions\mbfunccoils.c> -OPTFFF 2,10,1,369098752,0,0,0,0,<..\..\modbus\functions\mbfuncdiag.c> -OPTFFF 2,11,1,0,0,0,0,0,<..\..\modbus\functions\mbfuncdisc.c> -OPTFFF 2,12,1,0,0,0,0,0,<..\..\modbus\functions\mbfuncholding.c> -OPTFFF 2,13,1,0,0,0,0,0,<..\..\modbus\functions\mbfuncinput.c> -OPTFFF 2,14,1,0,0,0,0,0,<..\..\modbus\functions\mbfuncother.c> -OPTFFF 2,15,1,0,0,0,0,0,<..\..\modbus\rtu\mbrtu.c> -OPTFFF 2,16,1,0,0,0,0,0,<..\..\modbus\rtu\mbcrc.c> -OPTFFF 2,17,1,0,0,0,0,0,<..\..\modbus\ascii\mbascii.c> - - -TARGOPT 1, (Demo) - KACLK=12000000 - OPTTT 1,1,1,0 - OPTHX 0,65535,0,0,0 - OPTLX 120,65,8,<.\build\lst\> - OPTOX 16 - OPTLT 1,1,1,0,1,1,0,1,0,0,0,0 - OPTXL 1,1,1,1,1,1,1,0,0 - OPTFL 1,0,1 - OPTBL 0,(Data Sheet) - OPTBL 1,(User Manual) - OPTDL (SARM.DLL)(-cLPC2100)(DARMP.DLL)(-pLPC2148)(SARM.DLL)()(TARMP.DLL)(-pLPC2148) - OPTDBG 48125,0,()()()()()()()()()() (BIN\UL2ARM.DLL)()()() - OPTKEY 0,(UL2ARM)(-U268761108 -O7 -C0 -FO15 -FD40000000 -FC800 -FN1 -FF0LPC_IAP2_512 -FS00 -FL07D000)) - OPTKEY 0,(DLGDARM)((134=-1,-1,-1,-1,0)(135=-1,-1,-1,-1,0)(153=-1,-1,-1,-1,0)(154=-1,-1,-1,-1,0)(108=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(105=-1,-1,-1,-1,0)(145=-1,-1,-1,-1,0)(147=-1,-1,-1,-1,0)(80=-1,-1,-1,-1,0)(104=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(101=-1,-1,-1,-1,0)(149=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(113=-1,-1,-1,-1,0)(112=-1,-1,-1,-1,0)(137=-1,-1,-1,-1,0)(138=-1,-1,-1,-1,0)(117=-1,-1,-1,-1,0)(146=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(114=-1,-1,-1,-1,0)(141=-1,-1,-1,-1,0)(142=-1,-1,-1,-1,0)(143=-1,-1,-1,-1,0)(144=-1,-1,-1,-1,0)(115=-1,-1,-1,-1,0)(116=-1,-1,-1,-1,0)) - OPTKEY 0,(ARMDBGFLAGS)(-T5F) - OPTDF 0x82 - OPTLE <> - OPTLC <> -EndOpt - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/demo.Uv2 b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/demo.Uv2 deleted file mode 100644 index 36ef5de1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/demo.Uv2 +++ /dev/null @@ -1,111 +0,0 @@ -### uVision2 Project, (C) Keil Software -### Do not modify ! - -Target (Demo), 0x0005 // Tools: '' - -Group (Demo) -Group (FreeModbus) - -File 1,1,<.\demo.c> 0x0 -File 1,1,<.\port\porttimer.c> 0x0 -File 1,1,<.\port\port.c> 0x0 -File 1,1,<.\port\portevent.c> 0x0 -File 1,1,<.\port\portserial.c> 0x0 -File 1,2,<.\Startup.s> 0x0 -File 2,1,<..\..\modbus\mb.c> 0x0 -File 2,1,<..\..\modbus\functions\mbutils.c> 0x0 -File 2,1,<..\..\modbus\functions\mbfunccoils.c> 0x0 -File 2,1,<..\..\modbus\functions\mbfuncdiag.c> 0x0 -File 2,1,<..\..\modbus\functions\mbfuncdisc.c> 0x0 -File 2,1,<..\..\modbus\functions\mbfuncholding.c> 0x0 -File 2,1,<..\..\modbus\functions\mbfuncinput.c> 0x0 -File 2,1,<..\..\modbus\functions\mbfuncother.c> 0x0 -File 2,1,<..\..\modbus\rtu\mbrtu.c> 0x0 -File 2,1,<..\..\modbus\rtu\mbcrc.c> 0x0 -File 2,1,<..\..\modbus\ascii\mbascii.c> 0x0 - - -Options 1,0,0 // Target 'Demo' - Device (LPC2148) - Vendor (Philips) - Cpu (IRAM(0x40000000-0x40007FFF) IROM(0-0x7FFFF) CLOCK(12000000) CPUTYPE(ARM7TDMI)) - FlashUt (LPC210x_ISP.EXE ("#H" ^X $D COM1: 38400 1)) - StupF ("STARTUP\Philips\Startup.s" ("Philips LPC2100 Startup Code")) - FlashDR (UL2ARM(-U268761108 -O7 -C0 -FO15 -FD40000000 -FC800 -FN1 -FF0LPC_IAP2_512 -FS00 -FL07D000)) - DevID () - Rgf (LPC214X.H) - Mem () - C () - A () - RL () - OH () - DBC_IFX () - DBC_CMS () - DBC_AMS () - DBC_LMS () - UseEnv=0 - EnvBin () - EnvInc () - EnvLib () - EnvReg (ÿPhilips\) - OrgReg (ÿPhilips\) - TgStat=16 - OutDir (.\build\obj\) - OutName (demo) - GenApp=1 - GenLib=0 - GenHex=0 - Debug=1 - Browse=1 - LstDir (.\build\lst\) - HexSel=0 - MG32K=0 - TGMORE=0 - RunUsr 0 0 <> - RunUsr 1 0 <> - BrunUsr 0 0 <> - BrunUsr 1 0 <> - SVCSID <> - KACPU (ARM7TDMI) - TKAFL { 0,27,183,0,0,15,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - KIROM { 1,0,0,0,0,0,0,8,0 } - KIRAM { 0,0,0,0,64,0,128,0,0 } - KXRAM { 0,0,0,0,0,0,0,0,0 } - KAOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - KCAFLG { 197,152,20,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - KCAMSC () - KCADEF () - KCAUDF () - KCAINC (..\..\modbus\include;..\..\modbus\rtu;..\..\modbus\ascii;.\port) - KAAFLG { 20,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - KAAMSC () - KAASET () - KAARST () - KAAINC () - PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - IncBld=1 - AlwaysBuild=0 - GenAsm=0 - AsmAsm=0 - PublicsOnly=0 - StopCode=3 - CustArgs () - LibMods () - KLAFLG { 44,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - KLAMSC () - KLADWN () - KLACFI () - KLAASN () - KLARES () - KLACCL () - KLAUCL () - KLACSC () - KLAUCS () - OPTDL (SARM.DLL)(-cLPC2100)(DARMP.DLL)(-pLPC2148)(SARM.DLL)()(TARMP.DLL)(-pLPC2148) - OPTDBG 48125,0,()()()()()()()()()() (BIN\UL2ARM.DLL)()()() - FLASH1 { 2,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - FLASH2 (BIN\UL2ARM.DLL) - FLASH3 ("LPC210x_ISP.EXE" ("#H" ^X $D COM1: 38400 1)) - FLASH4 () -EndOpt - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/demo.c deleted file mode 100644 index 57b0e81b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/demo.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * FreeModbus Libary: LPC214X Port - * Copyright (C) 2007 Tiago Prado Lone - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - eMBErrorCode eStatus; - - eStatus = eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); - - /* Enable the Modbus Protocol Stack. */ - eStatus = eMBEnable( ); - - for( ;; ) - { - ( void )eMBPoll( ); - - /* Here we simply count the number of poll cycles. */ - usRegInputBuf[0]++; - } -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - ( void )pucRegBuffer; - ( void )usAddress; - ( void )usNRegs; - ( void )eMode; - return MB_ENOREG; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - ( void )pucRegBuffer; - ( void )usAddress; - ( void )usNCoils; - ( void )eMode; - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - ( void )pucRegBuffer; - ( void )usAddress; - ( void )usNDiscrete; - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/port.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/port.c deleted file mode 100644 index 5e3bc66f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/port.c +++ /dev/null @@ -1,42 +0,0 @@ - /* - * FreeModbus Libary: LPC214X Port - * Copyright (C) 2007 Tiago Prado Lone - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes --------------------------------*/ -#include - -/* ----------------------- Modbus includes ----------------------------------*/ - -/* ----------------------- Variables ----------------------------------------*/ -int VIC_Temp; - -/* ----------------------- Start implementation -----------------------------*/ -void -EnterCriticalSection( ) -{ - VIC_Temp = VICIntEnable; /* Save VICIntEnable */ - VICIntEnClr = VIC_Temp; /* Disable Interruptions */ -} - -void -ExitCriticalSection( ) -{ - VICIntEnable = VIC_Temp; /* Restore VICIntEnable */ -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/port.h deleted file mode 100644 index 5bf5e538..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/port.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * FreeModbus Libary: BARE Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -#include -#include - -#define INLINE -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#define ENTER_CRITICAL_SECTION( ) EnterCriticalSection( ) -#define EXIT_CRITICAL_SECTION( ) ExitCriticalSection( ) - -#define CCLK 60000000L -#define PCLK CCLK/4 - -void EnterCriticalSection( void ); -void ExitCriticalSection( void ); - -typedef uint8_t BOOL; - -typedef unsigned char UCHAR; -typedef char CHAR; - -typedef uint16_t USHORT; -typedef int16_t SHORT; - -typedef uint32_t ULONG; -typedef int32_t LONG; - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/portevent.c deleted file mode 100644 index 3e431c67..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/portevent.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * FreeModbus Libary: LPC214X Port - * Copyright (C) 2007 Tiago Prado Lone - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/portserial.c deleted file mode 100644 index b77aa50e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/portserial.c +++ /dev/null @@ -1,218 +0,0 @@ -/* - * FreeModbus Libary: LPC214X Port - * Copyright (C) 2007 Tiago Prado Lone - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#include -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- static functions ---------------------------------*/ -static void -sio_irq( void ) - __irq; - static void prvvUARTTxReadyISR( void ); - static void prvvUARTRxISR( void ); - -/* ----------------------- Start implementation -----------------------------*/ - void vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ - if( xRxEnable ) - { - U1IER |= 0x01; - } - else - { - U1IER &= ~0x01; - } - if( xTxEnable ) - { - U1IER |= 0x02; - prvvUARTTxReadyISR( ); - } - else - { - U1IER &= ~0x02; - } -} - -void -vMBPortClose( void ) -{ -} - -BOOL -xMBPortSerialInit( UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - BOOL bInitialized = TRUE; - USHORT cfg = 0; - ULONG reload = ( ( PCLK / ulBaudRate ) / 16UL ); - volatile char dummy; - - ( void )ucPORT; - /* Configure UART1 Pins */ - PINSEL0 = 0x00050000; /* Enable RxD1 and TxD1 */ - - switch ( ucDataBits ) - { - case 5: - break; - - case 6: - cfg |= 0x00000001; - break; - - case 7: - cfg |= 0x00000002; - break; - - case 8: - cfg |= 0x00000003; - break; - - default: - bInitialized = FALSE; - } - - switch ( eParity ) - { - case MB_PAR_NONE: - break; - - case MB_PAR_ODD: - cfg |= 0x00000008; - break; - - case MB_PAR_EVEN: - cfg |= 0x00000018; - break; - } - - if( bInitialized ) - { - U1LCR = cfg; /* Configure Data Bits and Parity */ - U1IER = 0; /* Disable UART1 Interrupts */ - - U1LCR |= 0x80; /* Set DLAB */ - U1DLL = reload; /* Set Baud */ - U1DLM = reload >> 8; /* Set Baud */ - U1LCR &= ~0x80; /* Clear DLAB */ - - /* Configure UART1 Interrupt */ - VICVectAddr0 = ( unsigned long )sio_irq; - VICVectCntl0 = 0x20 | 7; - VICIntEnable = 1 << 7; /* Enable UART1 Interrupt */ - - dummy = U1IIR; /* Required to Get Interrupts Started */ - } - - return bInitialized; -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - U1THR = ucByte; - - /* Wait till U0THR and U0TSR are both empty */ - while( !( U1LSR & 0x20 ) ) - { - } - - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - while( !( U1LSR & 0x01 ) ) - { - } - - /* Receive Byte */ - *pucByte = U1RBR; - - return TRUE; -} - - -void -sio_irq( void ) - __irq -{ - volatile char dummy; - volatile char IIR; - - while( ( ( IIR = U1IIR ) & 0x01 ) == 0 ) - { - switch ( IIR & 0x0E ) - { - case 0x06: /* Receive Line Status */ - dummy = U1LSR; /* Just clear the interrupt source */ - break; - - case 0x04: /* Receive Data Available */ - case 0x0C: /* Character Time-Out */ - prvvUARTRxISR( ); - break; - - case 0x02: /* THRE Interrupt */ - prvvUARTTxReadyISR( ); - break; - - case 0x00: /* Modem Interrupt */ - dummy = U1MSR; /* Just clear the interrupt source */ - break; - - default: - break; - } - } - - VICVectAddr = 0xFF; /* Acknowledge Interrupt */ -} - - -/* - * Create an interrupt handler for the transmit buffer empty interrupt - * (or an equivalent) for your target processor. This function should then - * call pxMBFrameCBTransmitterEmpty( ) which tells the protocol stack that - * a new character can be sent. The protocol stack will then call - * xMBPortSerialPutByte( ) to send the character. - */ -static void -prvvUARTTxReadyISR( void ) -{ - pxMBFrameCBTransmitterEmpty( ); -} - -/* - * Create an interrupt handler for the receive interrupt for your target - * processor. This function should then call pxMBFrameCBByteReceived( ). The - * protocol stack will then call xMBPortSerialGetByte( ) to retrieve the - * character. - */ -static void -prvvUARTRxISR( void ) -{ - pxMBFrameCBByteReceived( ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/porttimer.c deleted file mode 100644 index e73e0b2f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/porttimer.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * FreeModbus Libary: LPC214X Port - * Copyright (C) 2007 Tiago Prado Lone - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Platform includes --------------------------------*/ -#include -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- static functions ---------------------------------*/ -static void -prvvTIMERExpiredISR( void ) - __irq; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ - // Timer0 Configuration - T0PR = 0; // Prscaler Register = 0 - T0PC = 0; // Prscaler Counter = 0 - - T0TC = 0; // Timer Counter = 0 - - T0MR0 = ( PCLK / 20000 ) * usTim1Timerout50us; // Interval of (50us * usTim1Timerout50us) - T0MCR = 3; // Bit 0 = 1 - Interruption on MR0 - // Bit 1 = 1 - Reset on MR0 - - T0TCR = 0; // Timer Counter and Prescale Counter Disabled - - // Configure Timer0 Interruption - VICVectAddr1 = ( unsigned int )prvvTIMERExpiredISR; // Timer0 Interruption - Priority 1 - VICVectCntl1 = 0x20 | 4; - VICIntEnable = ( 1 << 4 ); // Enable Timer0 Interruption - - return TRUE; -} - - -void -vMBPortTimersEnable( ) -{ - T0TCR = 0x02; // Disable Timer and Reset Counter - T0TCR = 0x01; // Enable Timer -} - -void -vMBPortTimersDisable( ) -{ - T0TCR = 0x02; // Disable Timer and Reset Counter -} - -static void -prvvTIMERExpiredISR( void ) - __irq -{ - ( void )pxMBPortCBTimerExpired( ); - - T0IR = 0xFF; - VICVectAddr = 0xFF; // Acknowledge Interrupt -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/Makefile b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/Makefile deleted file mode 100644 index 8b6556e1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/Makefile +++ /dev/null @@ -1,74 +0,0 @@ -# -# FreeModbus MCF5235 port- Makefile -# -# Copyright (c) 2006 Christian Walter, Vienna 2006. -# -# $Id: Makefile,v 1.2 2006/08/30 23:18:06 wolti Exp $ -# -# --------------------------------------------------------------------------- - -BASE = /opt/gcc-m68k/bin -CC = $(BASE)/m68k-elf-gcc -CXX = $(BASE)/m68k-elf-g++ -OBJCOPY = $(BASE)/m68k-elf-objcopy -INSIGHT = $(BASE)/m68k-bdm-elf-insight - -CFLAGS = -MD -gdwarf-2 -g3 -m528x -Wall \ - -Imcf523x -Iport -I../../modbus/rtu \ - -I../../modbus/ascii -I../../modbus/include \ - -D'__IPSBAR=((vuint8 *) 0x40000000)' \ - -D'FCPU=25000000UL' -ASFLAGS = -MD -gdwarf-2 -g3 -m528x -Wa,--register-prefix-optional -LDSCRIPT = m5235-ram.ld -LDFLAGS = -nostartfiles -m528x -Wl,--script=$(LDSCRIPT) - -TGT = demo -OTHER_CSRC = -OTHER_ASRC = vector.S crt0.S -CSRC = demo.c init.c port/portserial.c port/portother.c \ - port/portevent.c port/porttimer.c \ - ../../modbus/mb.c \ - ../../modbus/rtu/mbrtu.c ../../modbus/rtu/mbcrc.c \ - ../../modbus/ascii/mbascii.c \ - ../../modbus/functions/mbfunccoils.c \ - ../../modbus/functions/mbfuncdiag.c \ - ../../modbus/functions/mbfuncholding.c \ - ../../modbus/functions/mbfuncinput.c \ - ../../modbus/functions/mbfuncother.c \ - ../../modbus/functions/mbfuncdisc.c \ - ../../modbus/functions/mbutils.c -ASRC = -OBJS = $(CSRC:.c=.o) $(ASRC:.S=.o) -NOLINK_OBJS = $(OTHER_CSRC:.c=.o) $(OTHER_ASRC:.S=.o) -DEPS = $(OBJS:.o=.d) $(NOLINK_OBJS:.o=.d) -BIN = $(TGT).elf - -.PHONY: clean all - -all: $(BIN) - -debug: - $(INSIGHT) --command=support/m5235.gdb --se=$(TGT).elf - -$(BIN): $(OBJS) $(NOLINK_OBJS) - $(CC) $(LDFLAGS) -Wl,-Map=$(TGT).map $(OBJS) $(LDLIBS) -o $@ - -clean: - rm -f $(DEPS) - rm -f $(OBJS) $(NOLINK_OBJS) - rm -f $(BIN) $(TGT).map - -# --------------------------------------------------------------------------- -# rules for code generation -# --------------------------------------------------------------------------- -%.o: %.c - $(CC) $(CFLAGS) -o $@ -c $< - -%.o: %.S - $(CC) $(ASFLAGS) -o $@ -c $< - -# --------------------------------------------------------------------------- -# # compiler generated dependencies -# --------------------------------------------------------------------------- --include $(LWOS_DEPS) $(PORT_DEPS) $(APPL_DEPS) - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/crt0.S b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/crt0.S deleted file mode 100644 index ed553a80..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/crt0.S +++ /dev/null @@ -1,80 +0,0 @@ -/* - * FreeModbus Libary: MCF5235 Demo Application - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id: crt0.S,v 1.1 2006/05/14 21:59:16 wolti Exp $ - */ - - .title "crt0.S" - - .extern main - .extern __stack - .extern __bss_start - .extern __text_start - .extern init_main - .global start - -start: - /* disable all interrupts on startup. */ - move.w #0x2700, sr - - /* prepare internal SRAM. */ - move.l #__text_start, %d0 - addq.l #1, %d0 - movec %d0, %rambar - - /* prepare stack and frame pointer. */ - move.l #__stack, sp - link a6, #-8 - - /* initialize hardware. */ - jsr init_main - - /* zero out the bss section. */ - move.l #__bss_start, d1 - move.l #_end, d0 - cmp.l d0, d1 - jbeq 3f - move.l d1, a0 - sub.l d1, d0 - subq.l #1, d0 -2: - clr.b (a0)+ - subq.l #1, d0 - jbpl 2b -3: - - /* C library */ - move.l #__FINI_SECTION__, -(%sp) - jsr atexit - jsr __INIT_SECTION__ - - /* enable interrupts. */ - move.w #0x2000, sr - - /* call main(int argc, char *argv[] */ - move.l #0, -(sp) - move.l #0, -(sp) - move.l #0, -(sp) - jsr main - lea (sp, 12), %sp - - /* stop on exit from main. */ -1: - halt - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/demo.c deleted file mode 100644 index adf2c293..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/demo.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - * FreeModbus Libary: MCF5235 Demo Application - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#include "mcf5xxx.h" -#include "mcf523x.h" - -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; - - -int -main( int argc, char *argv[], char *envp[] ) -{ - //xMBPortSerialInit (9600UL, 8, MB_PAR_EVEN); - //vMBPortSerialEnable (TRUE , FALSE); - //xMBPortTimersInit( 200 ); - //vMBPortTimersEnable(); - // - const UCHAR ucSlaveID[] = { 0xAA, 0xBB, 0xCC }; - eMBErrorCode eStatus; - - eStatus = eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); - - eStatus = eMBSetSlaveID( 0x34, TRUE, ucSlaveID, 3 ); - - /* Enable the Modbus Protocol Stack. */ - eStatus = eMBEnable( ); - - for( ;; ) - { - ( void )eMBPoll( ); - - /* Here we simply count the number of poll cycles. */ - usRegInputBuf[0]++; - } - return 0; -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = - ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = - ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/init.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/init.c deleted file mode 100644 index 17e6830d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/init.c +++ /dev/null @@ -1,683 +0,0 @@ - /* - * FreeModbus Libary: MCF5235 Demo Application - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#include "mcf5xxx.h" -#include "mcf523x.h" - -/* Function prototypes */ -void init_main( void ); -static void disable_interrupts( void ); -static void disable_watchdog_timer( void ); -static void disable_cache( void ); -static void init_ipsbar( void ); -static void init_basics( void ); -static void init_clock_config( void ); -static void init_chip_selects( void ); -static void init_bus_config( void ); -static void init_cache( void ); -static void init_eport( void ); -static void init_flexcan( void ); -static void init_power_management( void ); -static void init_dma_timers( void ); -static void init_interrupt_timers( void ); -static void init_watchdog_timers( void ); -static void init_pin_assignments( void ); -static void init_sdram_controller( void ); -static void init_interrupt_controller( void ); - -/********************************************************************* -* init_main - Main entry point for initialisation code * -**********************************************************************/ -void -init_main( void ) -{ - /* Initialise base address of peripherals, VBR, etc */ - init_ipsbar( ); - init_basics( ); - init_clock_config( ); - - /* Disable interrupts, watchdog timer, cache */ - disable_interrupts( ); - disable_watchdog_timer( ); - disable_cache( ); - - /* Initialise individual modules */ - init_chip_selects( ); - init_bus_config( ); - init_cache( ); - init_eport( ); - init_flexcan( ); - init_power_management( ); - init_dma_timers( ); - init_interrupt_timers( ); - init_watchdog_timers( ); - init_pin_assignments( ); - init_sdram_controller( ); - - /* Initialise interrupt controller */ - init_interrupt_controller( ); -} - -/********************************************************************* -* disable_interrupts - Disable all interrupt sources * -**********************************************************************/ -static void -disable_interrupts( void ) -{ - vuint8 *p; - int i; - - /* Set ICR008-ICR063 to 0x0 */ - p = ( vuint8 * ) & MCF_INTC0_ICR8; - for( i = 8; i <= 63; i++ ) - *p++ = 0x0; - - /* Set ICR108-ICR163 to 0x0 */ - p = ( vuint8 * ) & MCF_INTC1_ICR8; - for( i = 108; i <= 163; i++ ) - *p++ = 0x0; -} - -/********************************************************************* -* disable_watchdog_timer - Disable system watchdog timer * -**********************************************************************/ -static void -disable_watchdog_timer( void ) -{ - /* Disable Core Watchdog Timer */ - MCF_SCM_CWCR = 0; -} - -/********************************************************************* -* disable_cache - Disable and invalidate cache * -**********************************************************************/ -static void -disable_cache( void ) -{ - asm( "move.l #0x01000000,%d0" ); - asm( "movec %d0,%cacr" ); -} - -/********************************************************************* -* init_basics - Configuration Information & VBR * -**********************************************************************/ -static void -init_basics( void ) -{ - extern void ramvec_start; - extern void romvec_start; - - /* Transfer size not driven on SIZ[1:0] pins during external cycles - Processor Status (PST) and Debug Data (DDATA) functions disabled - Bus monitor disabled - Output pads configured for full strength - */ - MCF_CCM_CCR = ( 0x1 << 15 ) | MCF_CCM_CCR_BME; - - /* Exception vector table at $00000000 */ - asm( "move.l %0,%%d0": :"i"( &romvec_start ) ); - asm( "movec %d0,%vbr" ); -} - -/********************************************************************* -* init_clock_config - Clock Module * -**********************************************************************/ -static void -init_clock_config( void ) -{ - /* Clock module uses normal PLL mode with 25.0000 MHz external reference (Fref) - MFD = 0, RFD = 1 - Bus clock frequency = 25.00 MHz - Processor clock frequency = 2 x bus clock = 50.00 MHz - Frequency Modulation disabled - Loss of clock detection disabled - Reset/Interrupt on loss of lock disabled - */ - - MCF_FMPLL_SYNCR = 0x00100000; /* Set RFD=RFD+1 to avoid frequency overshoot */ - while( ( MCF_FMPLL_SYNSR & 0x08 ) == 0 ) /* Wait for PLL to lock */ - ; - MCF_FMPLL_SYNCR = 0x00080000; /* Set desired RFD */ - while( ( MCF_FMPLL_SYNSR & 0x08 ) == 0 ) /* Wait for PLL to lock */ - ; -} - -/********************************************************************* -* init_ipsbar - Internal Peripheral System Base Address (IPSBAR) * -**********************************************************************/ -static void -init_ipsbar( void ) -{ - /* Base address of internal peripherals (IPSBAR) = 0x40000000 - - Note: Processor powers up with IPS base address = 0x40000000 - Write to IPS base + 0x00000000 to set new value - */ - *( vuint32 * ) 0x40000000 = ( vuint32 ) __IPSBAR + 1; /* +1 for Enable */ -} - -/********************************************************************* -* init_chip_selects - Chip Select Module * -**********************************************************************/ -static void -init_chip_selects( void ) -{ - /* Chip Select 0 disabled (CSMR0[V] = 0) */ - MCF_CS_CSAR0 = 0; - MCF_CS_CSMR0 = 0; - MCF_CS_CSCR0 = MCF_CS_CSCR_IWS( 0xf ) | MCF_CS_CSCR_AA; - - /* Chip Select 1 disabled (CSMR1[V] = 0) */ - MCF_CS_CSAR1 = 0; - MCF_CS_CSMR1 = 0; - MCF_CS_CSCR1 = 0; - - /* Chip Select 2 disabled (CSMR2[V] = 0) */ - MCF_CS_CSAR2 = 0; - MCF_CS_CSMR2 = 0; - MCF_CS_CSCR2 = 0; - - /* Chip Select 3 disabled (CSMR3[V] = 0) */ - MCF_CS_CSAR3 = 0; - MCF_CS_CSMR3 = 0; - MCF_CS_CSCR3 = 0; - - /* Chip Select 4 disabled (CSMR4[V] = 0) */ - MCF_CS_CSAR4 = 0; - MCF_CS_CSMR4 = 0; - MCF_CS_CSCR4 = 0; - - /* Chip Select 5 disabled (CSMR5[V] = 0) */ - MCF_CS_CSAR5 = 0; - MCF_CS_CSMR5 = 0; - MCF_CS_CSCR5 = 0; - - /* Chip Select 6 disabled (CSMR6[V] = 0) */ - MCF_CS_CSAR6 = 0; - MCF_CS_CSMR6 = 0; - MCF_CS_CSCR6 = 0; - - /* Chip Select 7 disabled (CSMR7[V] = 0) */ - MCF_CS_CSAR7 = 0; - MCF_CS_CSMR7 = 0; - MCF_CS_CSCR7 = 0; -} - -/********************************************************************* -* init_bus_config - Internal Bus Arbitration * -**********************************************************************/ -static void -init_bus_config( void ) -{ - /* Use round robin arbitration scheme - Assigned priorities (highest first): - Ethernet - DMA Controller - ColdFire Core - DMA bandwidth control disabled - Park on last active bus master - */ - MCF_SCM_MPARK = MCF_SCM_MPARK_M3_PRTY( 0x3 ) | - MCF_SCM_MPARK_M2_PRTY( 0x2 ) | MCF_SCM_MPARK_M1_PRTY( 0x1 ); -} - -/********************************************************************* -* init_cache - Instruction/Data Cache * -**********************************************************************/ -static void -init_cache( void ) -{ - /* Instruction/Data cache disabled */ - asm( "move.l #0x00000000, %d0" ); - asm( "movec %d0,%cacr" ); -} - -/********************************************************************* -* init_eport - Edge Port Module (EPORT) * -**********************************************************************/ -static void -init_eport( void ) -{ - /* Pins 1-7 configured as GPIO inputs */ - MCF_EPORT_EPPAR = 0; - MCF_EPORT_EPDDR = 0; - MCF_EPORT_EPIER = 0; -} - -/********************************************************************* -* init_flexcan - FlexCAN Module * -**********************************************************************/ -static void -init_flexcan( void ) -{ - /* FlexCAN controller 0 disabled (CANMCR0[MDIS]=1) */ - MCF_CAN_IMASK0 = 0; - MCF_CAN_RXGMASK0 = MCF_CAN_RXGMASK_MI( 0x1fffffff ); - MCF_CAN_RX14MASK0 = MCF_CAN_RX14MASK_MI( 0x1fffffff ); - MCF_CAN_RX15MASK0 = MCF_CAN_RX15MASK_MI( 0x1fffffff ); - MCF_CAN_CANCTRL0 = 0; - MCF_CAN_CANMCR0 = MCF_CAN_CANMCR_MDIS | - MCF_CAN_CANMCR_FRZ | - MCF_CAN_CANMCR_HALT | - MCF_CAN_CANMCR_SUPV | MCF_CAN_CANMCR_MAXMB( 0xf ); - - /* FlexCAN controller 1 disabled (CANMCR1[MDIS]=1) */ - MCF_CAN_IMASK1 = 0; - MCF_CAN_RXGMASK1 = MCF_CAN_RXGMASK_MI( 0x1fffffff ); - MCF_CAN_RX14MASK1 = MCF_CAN_RX14MASK_MI( 0x1fffffff ); - MCF_CAN_RX15MASK1 = MCF_CAN_RX15MASK_MI( 0x1fffffff ); - MCF_CAN_CANCTRL1 = 0; - MCF_CAN_CANMCR1 = MCF_CAN_CANMCR_MDIS | - MCF_CAN_CANMCR_FRZ | - MCF_CAN_CANMCR_HALT | - MCF_CAN_CANMCR_SUPV | MCF_CAN_CANMCR_MAXMB( 0xf ); -} - -/********************************************************************* -* init_power_management - Power Management * -**********************************************************************/ -static void -init_power_management( void ) -{ - /* On executing STOP instruction, processor enters RUN mode - Mode is exited when an interrupt of level 1 or higher is received - */ - MCF_SCM_LPICR = MCF_SCM_LPICR_ENBSTOP; - MCF_CCM_LPCR = 0; -} - -/********************************************************************* -* init_sdram_controller - SDRAM Controller * -**********************************************************************/ -static void -init_sdram_controller( void ) -{ - /* DRAM type is Synchronous (SDRAM) - SDRAM refresh timings: - Number of clocks spent in refresh state = 3 - Refresh count = 511 (Refresh every 327.68 microseconds at 25.0 MHz bus clock) - */ - MCF_SDRAMC_DCR = MCF_SDRAMC_DCR_RC( 0x1ff ); - - /* Memory block 0 not in use (DMR0[V] = 0) */ - MCF_SDRAMC_DMR0 = MCF_SDRAMC_DMR_BAM_256K; - MCF_SDRAMC_DACR0 = 0; - - /* Memory block 1 not in use (DMR1[V] = 0) */ - MCF_SDRAMC_DMR1 = MCF_SDRAMC_DMR_BAM_256K; - MCF_SDRAMC_DACR1 = 0; -} - -/********************************************************************* -* init_dma_timers - DMA Timer Modules * -**********************************************************************/ -static void -init_dma_timers( void ) -{ - /* DMA Timer 0 disabled (DTMR0[RST] = 0) */ - MCF_TIMER_DTMR0 = 0; - MCF_TIMER_DTXMR0 = 0; - MCF_TIMER_DTRR0 = 0xffffffff; - - /* DMA Timer 1 disabled (DTMR1[RST] = 0) */ - MCF_TIMER_DTMR1 = 0; - MCF_TIMER_DTXMR1 = 0; - MCF_TIMER_DTRR1 = 0xffffffff; - - /* DMA Timer 2 disabled (DTMR2[RST] = 0) */ - MCF_TIMER_DTMR2 = 0; - MCF_TIMER_DTXMR2 = 0; - MCF_TIMER_DTRR2 = 0xffffffff; - - /* DMA Timer 3 disabled (DTMR3[RST] = 0) */ - MCF_TIMER_DTMR3 = 0; - MCF_TIMER_DTXMR3 = 0; - MCF_TIMER_DTRR3 = 0xffffffff; -} - -/********************************************************************** -* init_interrupt_timers - Programmable Interrupt Timer (PIT) Modules * -***********************************************************************/ -static void -init_interrupt_timers( void ) -{ - /* PIT0 disabled (PCSR0[EN]=0) */ - MCF_PIT_PCSR0 = 0; - - /* PIT1 disabled (PCSR1[EN]=0) */ - MCF_PIT_PCSR1 = 0; - - /* PIT2 disabled (PCSR2[EN]=0) */ - MCF_PIT_PCSR2 = 0; - - /* PIT3 disabled (PCSR3[EN]=0) */ - MCF_PIT_PCSR3 = 0; -} - -/********************************************************************* -* init_watchdog_timers - Watchdog Timer Modules * -**********************************************************************/ -static void -init_watchdog_timers( void ) -{ - /* Watchdog Timer disabled (WCR[EN]=0) - NOTE: WCR and WMR cannot be written again until after the - processor is reset. - */ - MCF_WTM_WCR = MCF_WTM_WCR_WAIT | MCF_WTM_WCR_DOZE | MCF_WTM_WCR_HALTED; - MCF_WTM_WMR = 0xffff; - - /* Core Watchdog Timer disabled (CWCR[CWE]=0) */ - MCF_SCM_CWCR = 0; -} - -/********************************************************************* -* init_interrupt_controller - Interrupt Controller * -**********************************************************************/ -static void -init_interrupt_controller( void ) -{ - /* Configured interrupt sources in order of priority... - Level 7: External interrupt /IRQ7, (initially masked) - Level 6: External interrupt /IRQ6, (initially masked) - Level 5: External interrupt /IRQ5, (initially masked) - Level 4: External interrupt /IRQ4, (initially masked) - Level 3: External interrupt /IRQ3, (initially masked) - Level 2: External interrupt /IRQ2, (initially masked) - Level 1: External interrupt /IRQ1, (initially masked) - */ - MCF_INTC0_ICR1 = 0; - MCF_INTC0_ICR2 = 0; - MCF_INTC0_ICR3 = 0; - MCF_INTC0_ICR4 = 0; - MCF_INTC0_ICR5 = 0; - MCF_INTC0_ICR6 = 0; - MCF_INTC0_ICR7 = 0; - MCF_INTC0_ICR8 = 0; - MCF_INTC0_ICR9 = 0; - MCF_INTC0_ICR10 = 0; - MCF_INTC0_ICR11 = 0; - MCF_INTC0_ICR12 = 0; - MCF_INTC0_ICR13 = 0; - MCF_INTC0_ICR14 = 0; - MCF_INTC0_ICR15 = 0; - MCF_INTC0_ICR17 = 0; - MCF_INTC0_ICR18 = 0; - MCF_INTC0_ICR19 = 0; - MCF_INTC0_ICR20 = 0; - MCF_INTC0_ICR21 = 0; - MCF_INTC0_ICR22 = 0; - MCF_INTC0_ICR23 = 0; - MCF_INTC0_ICR24 = 0; - MCF_INTC0_ICR25 = 0; - MCF_INTC0_ICR26 = 0; - MCF_INTC0_ICR27 = 0; - MCF_INTC0_ICR28 = 0; - MCF_INTC0_ICR29 = 0; - MCF_INTC0_ICR30 = 0; - MCF_INTC0_ICR31 = 0; - MCF_INTC0_ICR32 = 0; - MCF_INTC0_ICR33 = 0; - MCF_INTC0_ICR34 = 0; - MCF_INTC0_ICR35 = 0; - MCF_INTC0_ICR36 = 0; - MCF_INTC0_ICR37 = 0; - MCF_INTC0_ICR38 = 0; - MCF_INTC0_ICR39 = 0; - MCF_INTC0_ICR40 = 0; - MCF_INTC0_ICR41 = 0; - MCF_INTC0_ICR42 = 0; - MCF_INTC0_ICR43 = 0; - MCF_INTC0_ICR44 = 0; - MCF_INTC0_ICR45 = 0; - MCF_INTC0_ICR46 = 0; - MCF_INTC0_ICR47 = 0; - MCF_INTC0_ICR48 = 0; - MCF_INTC0_ICR49 = 0; - MCF_INTC0_ICR50 = 0; - MCF_INTC0_ICR51 = 0; - MCF_INTC0_ICR52 = 0; - MCF_INTC0_ICR53 = 0; - MCF_INTC0_ICR54 = 0; - MCF_INTC0_ICR55 = 0; - MCF_INTC0_ICR56 = 0; - MCF_INTC0_ICR57 = 0; - MCF_INTC0_ICR58 = 0; - MCF_INTC0_ICR59 = 0; - MCF_INTC0_ICR60 = 0; - MCF_INTC1_ICR8 = 0; - MCF_INTC1_ICR9 = 0; - MCF_INTC1_ICR10 = 0; - MCF_INTC1_ICR11 = 0; - MCF_INTC1_ICR12 = 0; - MCF_INTC1_ICR13 = 0; - MCF_INTC1_ICR14 = 0; - MCF_INTC1_ICR15 = 0; - MCF_INTC1_ICR16 = 0; - MCF_INTC1_ICR17 = 0; - MCF_INTC1_ICR18 = 0; - MCF_INTC1_ICR19 = 0; - MCF_INTC1_ICR20 = 0; - MCF_INTC1_ICR21 = 0; - MCF_INTC1_ICR22 = 0; - MCF_INTC1_ICR23 = 0; - MCF_INTC1_ICR24 = 0; - MCF_INTC1_ICR25 = 0; - MCF_INTC1_ICR27 = 0; - MCF_INTC1_ICR28 = 0; - MCF_INTC1_ICR29 = 0; - MCF_INTC1_ICR30 = 0; - MCF_INTC1_ICR31 = 0; - MCF_INTC1_ICR32 = 0; - MCF_INTC1_ICR33 = 0; - MCF_INTC1_ICR34 = 0; - MCF_INTC1_ICR35 = 0; - MCF_INTC1_ICR36 = 0; - MCF_INTC1_ICR37 = 0; - MCF_INTC1_ICR38 = 0; - MCF_INTC1_ICR39 = 0; - MCF_INTC1_ICR40 = 0; - MCF_INTC1_ICR41 = 0; - MCF_INTC1_ICR42 = 0; - MCF_INTC1_ICR59 = 0; - MCF_INTC0_IMRH = 0xffffffff; - MCF_INTC0_IMRL = MCF_INTC0_IMRL_INT_MASK31 | - MCF_INTC0_IMRL_INT_MASK30 | - MCF_INTC0_IMRL_INT_MASK29 | - MCF_INTC0_IMRL_INT_MASK28 | - MCF_INTC0_IMRL_INT_MASK27 | - MCF_INTC0_IMRL_INT_MASK26 | - MCF_INTC0_IMRL_INT_MASK25 | - MCF_INTC0_IMRL_INT_MASK24 | - MCF_INTC0_IMRL_INT_MASK23 | - MCF_INTC0_IMRL_INT_MASK22 | - MCF_INTC0_IMRL_INT_MASK21 | - MCF_INTC0_IMRL_INT_MASK20 | - MCF_INTC0_IMRL_INT_MASK19 | - MCF_INTC0_IMRL_INT_MASK18 | - MCF_INTC0_IMRL_INT_MASK17 | - MCF_INTC0_IMRL_INT_MASK16 | - MCF_INTC0_IMRL_INT_MASK15 | - MCF_INTC0_IMRL_INT_MASK14 | - MCF_INTC0_IMRL_INT_MASK13 | - MCF_INTC0_IMRL_INT_MASK12 | - MCF_INTC0_IMRL_INT_MASK11 | - MCF_INTC0_IMRL_INT_MASK10 | - MCF_INTC0_IMRL_INT_MASK9 | - MCF_INTC0_IMRL_INT_MASK8 | - MCF_INTC0_IMRL_INT_MASK7 | - MCF_INTC0_IMRL_INT_MASK6 | - MCF_INTC0_IMRL_INT_MASK5 | - MCF_INTC0_IMRL_INT_MASK4 | - MCF_INTC0_IMRL_INT_MASK3 | - MCF_INTC0_IMRL_INT_MASK2 | MCF_INTC0_IMRL_INT_MASK1; - MCF_INTC1_IMRH = 0xffffffff; - MCF_INTC1_IMRL = MCF_INTC1_IMRL_INT_MASK31 | - MCF_INTC1_IMRL_INT_MASK30 | - MCF_INTC1_IMRL_INT_MASK29 | - MCF_INTC1_IMRL_INT_MASK28 | - MCF_INTC1_IMRL_INT_MASK27 | - MCF_INTC1_IMRL_INT_MASK26 | - MCF_INTC1_IMRL_INT_MASK25 | - MCF_INTC1_IMRL_INT_MASK24 | - MCF_INTC1_IMRL_INT_MASK23 | - MCF_INTC1_IMRL_INT_MASK22 | - MCF_INTC1_IMRL_INT_MASK21 | - MCF_INTC1_IMRL_INT_MASK20 | - MCF_INTC1_IMRL_INT_MASK19 | - MCF_INTC1_IMRL_INT_MASK18 | - MCF_INTC1_IMRL_INT_MASK17 | - MCF_INTC1_IMRL_INT_MASK16 | - MCF_INTC1_IMRL_INT_MASK15 | - MCF_INTC1_IMRL_INT_MASK14 | - MCF_INTC1_IMRL_INT_MASK13 | - MCF_INTC1_IMRL_INT_MASK12 | - MCF_INTC1_IMRL_INT_MASK11 | - MCF_INTC1_IMRL_INT_MASK10 | - MCF_INTC1_IMRL_INT_MASK9 | - MCF_INTC1_IMRL_INT_MASK8 | - MCF_INTC1_IMRL_INT_MASK7 | - MCF_INTC1_IMRL_INT_MASK6 | - MCF_INTC1_IMRL_INT_MASK5 | - MCF_INTC1_IMRL_INT_MASK4 | - MCF_INTC1_IMRL_INT_MASK3 | - MCF_INTC1_IMRL_INT_MASK2 | MCF_INTC1_IMRL_INT_MASK1; -} - -/********************************************************************* -* init_pin_assignments - Pin Assignment and General Purpose I/O * -**********************************************************************/ -static void -init_pin_assignments( void ) -{ - /* Pin assignments for port ADDR - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_APDDR = 0; - MCF_GPIO_PAR_AD = 0; - - /* Pin assignments for ports DATAH and DATAL - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_DATAH = 0; - MCF_GPIO_PDDR_DATAL = 0; - - /* Pin assignments for port BUSCTL - Pin /OE : External bus output enable, /OE - Pin /TA : External bus transfer acknowledge, /TA - Pin /TEA : External bus transfer error acknowledge, /TEA - Pin R/W : External bus read/write indication, R/W - Pin TSIZ1 : External bus transfer size TSIZ1 or DMA acknowledge /DACK1 - Pin TSIZ0 : External bus transfer size TSIZ0 or DMA acknowledge /DACK0 - Pin /TS : External bus transfer start, /TS - Pin /TIP : External bus transfer in progess, /TIP - */ - MCF_GPIO_PDDR_BUSCTL = 0; - MCF_GPIO_PAR_BUSCTL = MCF_GPIO_PAR_BUSCTL_PAR_OE | - MCF_GPIO_PAR_BUSCTL_PAR_TA | - MCF_GPIO_PAR_BUSCTL_PAR_TEA( 0x3 ) | - MCF_GPIO_PAR_BUSCTL_PAR_RWB | - MCF_GPIO_PAR_BUSCTL_PAR_TSIZ1 | - MCF_GPIO_PAR_BUSCTL_PAR_TSIZ0 | - MCF_GPIO_PAR_BUSCTL_PAR_TS( 0x3 ) | - MCF_GPIO_PAR_BUSCTL_PAR_TIP( 0x3 ); - - /* Pin assignments for port BS - Pin /BS3 : External byte strobe /BS3 - Pin /BS2 : External byte strobe /BS2 - Pin /BS1 : External byte strobe /BS1 - Pin /BS0 : External byte strobe /BS0 - */ - MCF_GPIO_PDDR_BS = 0; - MCF_GPIO_PAR_BS = MCF_GPIO_PAR_BS_PAR_BS3 | - MCF_GPIO_PAR_BS_PAR_BS2 | - MCF_GPIO_PAR_BS_PAR_BS1 | MCF_GPIO_PAR_BS_PAR_BS0; - - /* Pin assignments for port CS - Pin /CS7 : Chip select /CS7 - Pin /CS6 : Chip select /CS6 - Pin /CS5 : Chip select /CS5 - Pin /CS4 : Chip select /CS4 - Pin /CS3 : Chip select /CS3 - Pin /CS2 : Chip select /CS2 - Pin /CS1 : Chip select /CS1 - */ - MCF_GPIO_PDDR_CS = 0; - MCF_GPIO_PAR_CS = MCF_GPIO_PAR_CS_PAR_CS7 | - MCF_GPIO_PAR_CS_PAR_CS6 | - MCF_GPIO_PAR_CS_PAR_CS5 | - MCF_GPIO_PAR_CS_PAR_CS4 | - MCF_GPIO_PAR_CS_PAR_CS3 | - MCF_GPIO_PAR_CS_PAR_CS2 | MCF_GPIO_PAR_CS_PAR_CS1; - - /* Pin assignments for port SDRAM - Pin /SD_WE : SDRAM controller /SD_WE - Pin /SD_SCAS : SDRAM controller /SD_SCAS - Pin /SD_SRAS : SDRAM controller /SD_SRAS - Pin /SD_SCKE : SDRAM controller /SD_SCKE - Pin /SD_CS1 : SDRAM controller /SD_CS1 - Pin /SD_CS0 : SDRAM controller /SD_CS0 - */ - MCF_GPIO_PDDR_SDRAM = 0; - MCF_GPIO_PAR_SDRAM = MCF_GPIO_PAR_SDRAM_PAR_SDWE | - MCF_GPIO_PAR_SDRAM_PAR_SCAS | - MCF_GPIO_PAR_SDRAM_PAR_SRAS | - MCF_GPIO_PAR_SDRAM_PAR_SCKE | - MCF_GPIO_PAR_SDRAM_PAR_SDCS1 | MCF_GPIO_PAR_SDRAM_PAR_SDCS0; - - /* Pin assignments for port FECI2C - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_FECI2C = 0; - MCF_GPIO_PAR_FECI2C = 0; - - /* Pin assignments for port UARTL - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_UARTL = 0; - MCF_GPIO_PAR_UART = 0; - - /* Pin assignments for port UARTH - Pin U2TXD : GPIO input - Pin U2RXD : GPIO input - Pin /IRQ2 : Interrupt request /IRQ2 or GPIO - */ - MCF_GPIO_PDDR_UARTH = 0; - - /* Pin assignments for port QSPI - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_QSPI = 0; - MCF_GPIO_PAR_QSPI = 0; - - /* Pin assignments for port TIMER - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_TIMER = 0; - MCF_GPIO_PAR_TIMER = 0; - - /* Pin assignments for port ETPU - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_ETPU = 0; - MCF_GPIO_PAR_ETPU = 0; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/m5235-ram.ld b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/m5235-ram.ld deleted file mode 100644 index 9f3a2b56..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/m5235-ram.ld +++ /dev/null @@ -1,104 +0,0 @@ -STARTUP(crt0.o) -INPUT(vector.o) -OUTPUT_ARCH(m68k) -SEARCH_DIR(.) -GROUP(-lc -lgcc) - -__DYNAMIC = 0; - -MEMORY -{ - ram (rwx) : ORIGIN = 0x00100000, LENGTH = 0x00010000 - per (rwx) : ORIGIN = 0x40000000, LENGTH = 0x40000000 -} - -PROVIDE (__stack = 0x10FFFC); - -SECTIONS -{ - .text : - { - __text_start = . ; - *(.vector) - . = ALIGN (0x100); - *(.text) - . = ALIGN (16); - - *(.eh_frame) - . = ALIGN (16); - - *(.gnu.linkonce.t.*) - - . = ALIGN(0x4); - __CTOR_LIST__ = .; - ___CTOR_LIST__ = .; - LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) - *(.ctors) - LONG(0) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - ___DTOR_LIST__ = .; - LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) - *(.dtors) - LONG(0) - __DTOR_END__ = .; - *(.rodata) - *(.gcc_except_table) - - . = ALIGN(0x2); - __INIT_SECTION__ = . ; - LONG (0x4e560000) /* linkw %fp,#0 */ - *(.init) - SHORT (0x4e5e) /* unlk %fp */ - SHORT (0x4e75) /* rts */ - - __FINI_SECTION__ = . ; - LONG (0x4e560000) /* linkw %fp,#0 */ - *(.fini) - SHORT (0x4e5e) /* unlk %fp */ - SHORT (0x4e75) /* rts */ - - *(.lit) - . = ALIGN(16); - _etext = .; - etext = .; - } > ram - - .data : - { - copy_start = .; - *(.shdata) - *(.data) - *(.gnu.linkonce.d.*) - . = ALIGN (16); - _edata = .; - copy_end = .; - } > ram - - .bss : - { - . = ALIGN(0x4); - __bss_start = . ; - *(.shbss) - *(.bss) - *(COMMON) - _end = ALIGN (0x8); - __end = _end; - } > ram - - .peripheral (NOLOAD): - { - __per_start = . ; - *(.peripheral) - } > per - - .stab 0 (NOLOAD) : - { - *(.stab) - } - - .stabstr 0 (NOLOAD) : - { - *(.stabstr) - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/descriptors.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/descriptors.h deleted file mode 100644 index 1b14ea12..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/descriptors.h +++ /dev/null @@ -1,147 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: descriptors.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * USB Descriptors definitions. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - - -#ifndef DESCRIPTOR_H -#define DESCRIPTOR_H - -/********************************************************************/ - -/* USB descriptor types */ -#define DEVICE 1 -#define CONFIGURATION 2 -#define STRING 3 -#define INTERFACE 4 -#define ENDPOINT 5 - -/* USB Standard Request Types - bRequestType */ -#define IN 0x80 -#define OUT 0x00 -#define STANDARD 0x00 -#define CLASS 0x20 -#define VENDOR 0x40 -#define RQ_DEVICE 0x00 -#define RQ_INTERFACE 0x01 -#define RQ_ENDPOINT 0x02 - -/* USB Standard Request Codes - bRequest */ -#define GET_STATUS 0 -#define CLEAR_FEATURE 1 -#define SET_FEATURE 3 -#define SET_ADDRESS 5 -#define GET_DESCRIPTOR 6 -#define SET_DESCRIPTOR 7 -#define GET_CONFIGURATION 8 -#define SET_CONFIGURATION 9 -#define GET_INTERFACE 10 -#define SET_INTERFACE 11 -#define SYNCH_FRAME 12 - -/* Configuration bmAttributes fields */ -#define BUS_POWERED 0x80 -#define SELF_POWERED 0xC0 -#define REMOTE_WAKEUP 0xA0 - -/* Endpoint bmAttributes fields */ -#define CONTROL 0x00 -#define ISOCHRONOUS 0x01 -#define BULK 0x02 -#define INTERRUPT 0x03 -#define DISABLED 0xFF - -/* Standard Feature Selectors */ -#define DEVICE_REMOTE_WAKEUP 1 -#define ENDPOINT_HALT 0 - -/* Structure for USB Device Descriptors */ -typedef struct -{ - uint8 bLength; - uint8 bDescriptorType; - uint8 bcdUSBL; - uint8 bcdUSBH; - uint8 bDeviceClass; - uint8 bDeviceSubClass; - uint8 bDeviceProtocol; - uint8 bMaxPacketSize0; - uint8 idVendorL; - uint8 idVendorH; - uint8 idProductL; - uint8 idProductH; - uint8 bcdDeviceL; - uint8 bcdDeviceH; - uint8 iManufacturer; - uint8 iProduct; - uint8 iSerialNumber; - uint8 bNumConfigurations; -} USB_DEVICE_DESC; - -/* Structure for USB Configuration Descriptors */ -typedef struct -{ - uint8 bLength; - uint8 bDescriptorType; - uint8 wTotalLengthL; - uint8 wTotalLengthH; - uint8 bNumInterfaces; - uint8 bConfigurationValue; - uint8 iConfiguration; - uint8 bmAttributes; - uint8 maxPower; -} USB_CONFIG_DESC; - -/* Structure for USB Interface Descriptors */ -typedef struct -{ - uint8 bLength; - uint8 bDescriptorType; - uint8 bInterfaceNumber; - uint8 bAlternateSetting; - uint8 bNumEndpoints; - uint8 bInterfaceClass; - uint8 bInterfaceSubClass; - uint8 bInterfaceProtocol; - uint8 iInterface; -} USB_INTERFACE_DESC; - -/* Structure for USB Endpoint Descriptors */ -typedef struct -{ - uint8 bLength; - uint8 bDescriptorType; - uint8 bEndpointAddress; - uint8 bmAttributes; - uint8 wMaxPacketSizeL; - uint8 wMaxPacketSizeH; - uint8 bInterval; -} USB_ENDPOINT_DESC; - -/* Structure for USB String Descriptors */ -typedef struct -{ - uint8 bLength; - uint8 bDescriptorType; - uint8 *bString; -} USB_STRING_DESC; - -/********************************************************************/ - -#endif /* DESCRIPTOR_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/m523xevb.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/m523xevb.h deleted file mode 100644 index 23bf868a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/m523xevb.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * File: m523xevb.h - * Purpose: Evaluation board definitions and memory map information - * - * Notes: - */ - -#ifndef _M523XEVB_H -#define _M523XEVB_H - -/********************************************************************/ - -#include "mcf5xxx.h" -#include "mcf523x.h" -#include "io.h" - -/********************************************************************/ - -/* - * Debug prints ON (#undef) or OFF (#define) - */ -#undef DEBUG - -/* - * System Bus Clock Info - */ -#define SYSTEM_CLOCK 75 /* system bus frequency in MHz */ -#define PERIOD 13.33 /* system bus period in ns */ - -#define UART_BAUD 19200 /* 19200 */ - -/* - * Flash Device Info - */ -#define AMD_FLASH_AM29PL160CB_16BIT - -/* - * Ethernet Port Info - */ -#define FEC_PHY0 (0x01) - -/* - * Memory map definitions from linker command files - */ -extern uint8 __IPSBAR[]; -extern uint8 __SDRAM[]; -extern uint8 __SDRAM_SIZE[]; -extern uint8 __SRAM[]; -extern uint8 __SRAM_SIZE[]; -extern uint8 __EXT_SRAM[]; -extern uint8 __EXT_SRAM_SIZE[]; -extern uint8 __EXT_FLASH[]; -extern uint8 __EXT_FLASH_SIZE[]; - -/* - * Memory Map Info - */ -#define IPSBAR_ADDRESS (uint32)__IPSBAR - -#define SDRAM_ADDRESS (uint32)__SDRAM -#define SDRAM_SIZE (uint32)__SDRAM_SIZE - -#define SRAM_ADDRESS (uint32)__SRAM -#define SRAM_SIZE (uint32)__SRAM_SIZE - -#define EXT_SRAM_ADDRESS (uint32)__EXT_SRAM -#define EXT_SRAM_SIZE (uint32)__EXT_SRAM_SIZE - -#define EXT_FLASH_ADDRESS (uint32)__EXT_FLASH -#define EXT_FLASH_SIZE (uint32)__EXT_FLASH_SIZE - -/* - * Interrupt Controller Definitions - */ -#define TIMER_NETWORK_LEVEL 3 -#define FEC_LEVEL 4 - -/* - * Timer period info - */ -#define TIMER_NETWORK_PERIOD 1000000000/0x10000 /* 1 sec / max timeout */ - -/********************************************************************/ - -#endif /* _M523XEVB_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x.h deleted file mode 100644 index af8e773a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x.h +++ /dev/null @@ -1,56 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_H__ -#define __MCF523X_H__ - -/*********************************************************************/ - -#include "mcf523x_fec.h" -#include "mcf523x_rng.h" -#include "mcf523x_fmpll.h" -#include "mcf523x_cs.h" -#include "mcf523x_intc0.h" -#include "mcf523x_intc1.h" -#include "mcf523x_sdramc.h" -#include "mcf523x_sram.h" -#include "mcf523x_uart.h" -#include "mcf523x_timer.h" -#include "mcf523x_qspi.h" -#include "mcf523x_eport.h" -#include "mcf523x_i2c.h" -#include "mcf523x_scm.h" -#include "mcf523x_pit.h" -#include "mcf523x_can.h" -#include "mcf523x_wtm.h" -#include "mcf523x_gpio.h" -#include "mcf523x_mdha.h" -#include "mcf523x_ccm.h" -#include "mcf523x_rcm.h" -#include "mcf523x_etpu.h" -#include "mcf523x_etpu_struc.h" - - - - -/********************************************************************/ - -#endif /* __MCF523X_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_can.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_can.h deleted file mode 100644 index e90c8f28..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_can.h +++ /dev/null @@ -1,332 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_can.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_CAN_H__ -#define __MCF523X_CAN_H__ - -/********************************************************************* -* -* FlexCAN Module (CAN) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CAN_CANMCR0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0000])) -#define MCF_CAN_CANCTRL0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0004])) -#define MCF_CAN_TIMER0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0008])) -#define MCF_CAN_RXGMASK0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0010])) -#define MCF_CAN_RX14MASK0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0014])) -#define MCF_CAN_RX15MASK0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0018])) -#define MCF_CAN_ERRCNT0 (*(vuint32*)(void*)(&__IPSBAR[0x1C001C])) -#define MCF_CAN_ERRSTAT0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0020])) -#define MCF_CAN_IMASK0 (*(vuint16*)(void*)(&__IPSBAR[0x1C002A])) -#define MCF_CAN_IFLAG0 (*(vuint16*)(void*)(&__IPSBAR[0x1C0032])) -#define MCF_CAN_CANMCR1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0000])) -#define MCF_CAN_CANCTRL1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0004])) -#define MCF_CAN_TIMER1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0008])) -#define MCF_CAN_RXGMASK1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0010])) -#define MCF_CAN_RX14MASK1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0014])) -#define MCF_CAN_RX15MASK1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0018])) -#define MCF_CAN_ERRCNT1 (*(vuint32*)(void*)(&__IPSBAR[0x1F001C])) -#define MCF_CAN_ERRSTAT1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0020])) -#define MCF_CAN_IMASK1 (*(vuint16*)(void*)(&__IPSBAR[0x1F002A])) -#define MCF_CAN_IFLAG1 (*(vuint16*)(void*)(&__IPSBAR[0x1F0032])) -#define MCF_CAN_CANMCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0000+((x)*0x30000)])) -#define MCF_CAN_CANCTRL(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0004+((x)*0x30000)])) -#define MCF_CAN_TIMER(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0008+((x)*0x30000)])) -#define MCF_CAN_RXGMASK(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0010+((x)*0x30000)])) -#define MCF_CAN_RX14MASK(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0014+((x)*0x30000)])) -#define MCF_CAN_RX15MASK(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0018+((x)*0x30000)])) -#define MCF_CAN_ERRCNT(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C001C+((x)*0x30000)])) -#define MCF_CAN_ERRSTAT(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0020+((x)*0x30000)])) -#define MCF_CAN_IMASK(x) (*(vuint16*)(void*)(&__IPSBAR[0x1C002A+((x)*0x30000)])) -#define MCF_CAN_IFLAG(x) (*(vuint16*)(void*)(&__IPSBAR[0x1C0032+((x)*0x30000)])) - -#define MCF_CAN_MBUF0_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0080+((x)*0x30000)])) -#define MCF_CAN_MBUF0_TMSTP(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0082+((x)*0x30000)])) -#define MCF_CAN_MBUF0_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0084+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0088+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0089+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008A+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008B+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008C+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008D+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008E+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008F+((x)*0x30000)])) -#define MCF_CAN_MBUF1_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0090+((x)*0x30000)])) -#define MCF_CAN_MBUF1_TMSTP(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0092+((x)*0x30000)])) -#define MCF_CAN_MBUF1_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0094+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0098+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0099+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009A+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009B+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009C+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009D+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009E+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009F+((x)*0x30000)])) -#define MCF_CAN_MBUF2_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00A0+((x)*0x30000)])) -#define MCF_CAN_MBUF2_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00A4+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00A8+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00A9+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AA+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AB+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AC+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AD+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AE+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AF+((x)*0x30000)])) -#define MCF_CAN_MBUF3_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00B0+((x)*0x30000)])) -#define MCF_CAN_MBUF3_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00B4+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00B8+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00B9+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BA+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BB+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BC+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BD+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BE+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BF+((x)*0x30000)])) -#define MCF_CAN_MBUF4_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00C0+((x)*0x30000)])) -#define MCF_CAN_MBUF4_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00C4+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00C8+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00C9+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CA+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CB+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CC+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CD+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CE+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CF+((x)*0x30000)])) -#define MCF_CAN_MBUF5_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00D0+((x)*0x30000)])) -#define MCF_CAN_MBUF5_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00D4+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00D8+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00D9+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DA+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DB+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DC+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DD+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DE+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DF+((x)*0x30000)])) -#define MCF_CAN_MBUF6_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00E0+((x)*0x30000)])) -#define MCF_CAN_MBUF6_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00E4+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00E8+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00E9+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EA+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EB+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EC+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00ED+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EE+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EF+((x)*0x30000)])) -#define MCF_CAN_MBUF7_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00F0+((x)*0x30000)])) -#define MCF_CAN_MBUF7_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00F4+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00F8+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00F9+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FA+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FB+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FC+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FD+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FE+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FF+((x)*0x30000)])) -#define MCF_CAN_MBUF8_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0100+((x)*0x30000)])) -#define MCF_CAN_MBUF8_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0104+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0108+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0109+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010A+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010B+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010C+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010D+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010E+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010F+((x)*0x30000)])) -#define MCF_CAN_MBUF9_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0100+((x)*0x30000)])) -#define MCF_CAN_MBUF9_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0114+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0118+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0119+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011A+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011B+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011C+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011D+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011E+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011F+((x)*0x30000)])) -#define MCF_CAN_MBUF10_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0120+((x)*0x30000)])) -#define MCF_CAN_MBUF10_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0124+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0128+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0129+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012A+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012B+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012C+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012D+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012E+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012F+((x)*0x30000)])) -#define MCF_CAN_MBUF11_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0130+((x)*0x30000)])) -#define MCF_CAN_MBUF11_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0134+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0138+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0139+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013A+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013B+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013C+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013D+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013E+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013F+((x)*0x30000)])) -#define MCF_CAN_MBUF12_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0140+((x)*0x30000)])) -#define MCF_CAN_MBUF12_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0144+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0148+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0149+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014A+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014B+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014C+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014D+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014E+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014F+((x)*0x30000)])) -#define MCF_CAN_MBUF13_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0150+((x)*0x30000)])) -#define MCF_CAN_MBUF13_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0154+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0158+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0159+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015A+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015B+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015C+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015D+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015E+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015F+((x)*0x30000)])) -#define MCF_CAN_MBUF14_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0160+((x)*0x30000)])) -#define MCF_CAN_MBUF14_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0164+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0168+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0169+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016A+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016B+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016C+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016D+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016E+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016F+((x)*0x30000)])) -#define MCF_CAN_MBUF15_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0170+((x)*0x30000)])) -#define MCF_CAN_MBUF15_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0174+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0178+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0179+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017A+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017B+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017C+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017D+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017E+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017F+((x)*0x30000)])) - - -#define MCF_CAN_MBUF0_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0088+((x)*0x30000)])) -#define MCF_CAN_MBUF0_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C008C+((x)*0x30000)])) -#define MCF_CAN_MBUF1_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0098+((x)*0x30000)])) -#define MCF_CAN_MBUF1_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C009C+((x)*0x30000)])) -#define MCF_CAN_MBUF2_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00A8+((x)*0x30000)])) -#define MCF_CAN_MBUF2_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00AC+((x)*0x30000)])) - - -/* Bit definitions and macros for MCF_CAN_CANMCR */ -#define MCF_CAN_CANMCR_MAXMB(x) (((x)&0x0000000F)<<0) -#define MCF_CAN_CANMCR_SUPV (0x00800000) -#define MCF_CAN_CANMCR_FRZACK (0x01000000) -#define MCF_CAN_CANMCR_SOFTRST (0x02000000) -#define MCF_CAN_CANMCR_HALT (0x10000000) -#define MCF_CAN_CANMCR_FRZ (0x40000000) -#define MCF_CAN_CANMCR_MDIS (0x80000000) - -/* Bit definitions and macros for MCF_CAN_CANCTRL */ -#define MCF_CAN_CANCTRL_PROPSEG(x) (((x)&0x00000007)<<0) -#define MCF_CAN_CANCTRL_LOM (0x00000008) -#define MCF_CAN_CANCTRL_LBUF (0x00000010) -#define MCF_CAN_CANCTRL_TSYNC (0x00000020) -#define MCF_CAN_CANCTRL_BOFFREC (0x00000040) -#define MCF_CAN_CANCTRL_SAMP (0x00000080) -#define MCF_CAN_CANCTRL_LPB (0x00001000) -#define MCF_CAN_CANCTRL_CLKSRC (0x00002000) -#define MCF_CAN_CANCTRL_ERRMSK (0x00004000) -#define MCF_CAN_CANCTRL_BOFFMSK (0x00008000) -#define MCF_CAN_CANCTRL_PSEG2(x) (((x)&0x00000007)<<16) -#define MCF_CAN_CANCTRL_PSEG1(x) (((x)&0x00000007)<<19) -#define MCF_CAN_CANCTRL_RJW(x) (((x)&0x00000003)<<22) -#define MCF_CAN_CANCTRL_PRESDIV(x) (((x)&0x000000FF)<<24) - -/* Bit definitions and macros for MCF_CAN_TIMER */ -#define MCF_CAN_TIMER_TIMER(x) (((x)&0x0000FFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_RXGMASK */ -#define MCF_CAN_RXGMASK_MI(x) (((x)&0x1FFFFFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_RX14MASK */ -#define MCF_CAN_RX14MASK_MI(x) (((x)&0x1FFFFFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_RX15MASK */ -#define MCF_CAN_RX15MASK_MI(x) (((x)&0x1FFFFFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_ERRCNT */ -#define MCF_CAN_ERRCNT_TXECTR(x) (((x)&0x000000FF)<<0) -#define MCF_CAN_ERRCNT_RXECTR(x) (((x)&0x000000FF)<<8) - -/* Bit definitions and macros for MCF_CAN_ERRSTAT */ -#define MCF_CAN_ERRSTAT_WAKINT (0x00000001) -#define MCF_CAN_ERRSTAT_ERRINT (0x00000002) -#define MCF_CAN_ERRSTAT_BOFFINT (0x00000004) -#define MCF_CAN_ERRSTAT_FLTCONF(x) (((x)&0x00000003)<<4) -#define MCF_CAN_ERRSTAT_TXRX (0x00000040) -#define MCF_CAN_ERRSTAT_IDLE (0x00000080) -#define MCF_CAN_ERRSTAT_RXWRN (0x00000100) -#define MCF_CAN_ERRSTAT_TXWRN (0x00000200) -#define MCF_CAN_ERRSTAT_STFERR (0x00000400) -#define MCF_CAN_ERRSTAT_FRMERR (0x00000800) -#define MCF_CAN_ERRSTAT_CRCERR (0x00001000) -#define MCF_CAN_ERRSTAT_ACKERR (0x00002000) -#define MCF_CAN_ERRSTAT_BITERR(x) (((x)&0x00000003)<<14) -#define MCF_CAN_ERRSTAT_FLTCONF_ACTIVE (0x00000000) -#define MCF_CAN_ERRSTAT_FLTCONF_PASSIVE (0x00000010) -#define MCF_CAN_ERRSTAT_FLTCONF_BUSOFF (0x00000020) - -/* Bit definitions and macros for MCF_CAN_IMASK */ -#define MCF_CAN_IMASK_BUF0M (0x0001) -#define MCF_CAN_IMASK_BUF1M (0x0002) -#define MCF_CAN_IMASK_BUF2M (0x0004) -#define MCF_CAN_IMASK_BUF3M (0x0008) -#define MCF_CAN_IMASK_BUF4M (0x0010) -#define MCF_CAN_IMASK_BUF5M (0x0020) -#define MCF_CAN_IMASK_BUF6M (0x0040) -#define MCF_CAN_IMASK_BUF7M (0x0080) -#define MCF_CAN_IMASK_BUF8M (0x0100) -#define MCF_CAN_IMASK_BUF9M (0x0200) -#define MCF_CAN_IMASK_BUF10M (0x0400) -#define MCF_CAN_IMASK_BUF11M (0x0800) -#define MCF_CAN_IMASK_BUF12M (0x1000) -#define MCF_CAN_IMASK_BUF13M (0x2000) -#define MCF_CAN_IMASK_BUF14M (0x4000) -#define MCF_CAN_IMASK_BUF15M (0x8000) - -/* Bit definitions and macros for MCF_CAN_IFLAG */ -#define MCF_CAN_IFLAG_BUF0I (0x0001) -#define MCF_CAN_IFLAG_BUF1I (0x0002) -#define MCF_CAN_IFLAG_BUF2I (0x0004) -#define MCF_CAN_IFLAG_BUF3I (0x0008) -#define MCF_CAN_IFLAG_BUF4I (0x0010) -#define MCF_CAN_IFLAG_BUF5I (0x0020) -#define MCF_CAN_IFLAG_BUF6I (0x0040) -#define MCF_CAN_IFLAG_BUF7I (0x0080) -#define MCF_CAN_IFLAG_BUF8I (0x0100) -#define MCF_CAN_IFLAG_BUF9I (0x0200) -#define MCF_CAN_IFLAG_BUF10I (0x0400) -#define MCF_CAN_IFLAG_BUF11I (0x0800) -#define MCF_CAN_IFLAG_BUF12I (0x1000) -#define MCF_CAN_IFLAG_BUF13I (0x2000) -#define MCF_CAN_IFLAG_BUF14I (0x4000) -#define MCF_CAN_IFLAG_BUF15I (0x8000) - -/********************************************************************/ - -#endif /* __MCF523X_CAN_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_ccm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_ccm.h deleted file mode 100644 index 6a0c78ab..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_ccm.h +++ /dev/null @@ -1,63 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_ccm.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_CCM_H__ -#define __MCF523X_CCM_H__ - -/********************************************************************* -* -* Chip Configuration Module (CCM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CCM_CCR (*(vuint16*)(void*)(&__IPSBAR[0x110004])) -#define MCF_CCM_LPCR (*(vuint8 *)(void*)(&__IPSBAR[0x110007])) -#define MCF_CCM_CIR (*(vuint16*)(void*)(&__IPSBAR[0x11000A])) -#define MCF_CCM_RCON (*(vuint16*)(void*)(&__IPSBAR[0x110008])) - -/* Bit definitions and macros for MCF_CCM_CCR */ -#define MCF_CCM_CCR_BMT(x) (((x)&0x0007)<<0) -#define MCF_CCM_CCR_BME (0x0008) -#define MCF_CCM_CCR_SZEN (0x0040) -#define MCF_CCM_CCR_MODE(x) (((x)&0x0007)<<8) - -/* Bit definitions and macros for MCF_CCM_LPCR */ -#define MCF_CCM_LPCR_STPMD(x) (((x)&0x03)<<3) -#define MCF_CCM_LPCR_LPMD(x) (((x)&0x03)<<6) -#define MCF_CCM_LPCR_LPMD_STOP (0xC0) -#define MCF_CCM_LPCR_LPMD_WAIT (0x80) -#define MCF_CCM_LPCR_LPMD_DOZE (0x40) -#define MCF_CCM_LPCR_LPMD_RUN (0x00) - -/* Bit definitions and macros for MCF_CCM_CIR */ -#define MCF_CCM_CIR_PRN(x) (((x)&0x003F)<<0) -#define MCF_CCM_CIR_PIN(x) (((x)&0x03FF)<<6) - -/* Bit definitions and macros for MCF_CCM_RCON */ -#define MCF_CCM_RCON_MODE (0x0001) -#define MCF_CCM_RCON_BOOTPS(x) (((x)&0x0003)<<3) -#define MCF_CCM_RCON_RLOAD (0x0020) -#define MCF_CCM_RCON_RCSC(x) (((x)&0x0003)<<8) - -/********************************************************************/ - -#endif /* __MCF523X_CCM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_cfm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_cfm.h deleted file mode 100644 index 2cf7c7ec..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_cfm.h +++ /dev/null @@ -1,66 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_cfm.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_CFM_H__ -#define __MCF523X_CFM_H__ - -/********************************************************************* -* -* Chip Configuration Module (CFM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CFM_CCR (*(vuint16*)(void*)(&__IPSBAR[0x110004])) -#define MCF_CFM_LPCR (*(vuint8 *)(void*)(&__IPSBAR[0x110007])) -#define MCF_CFM_CIR (*(vuint16*)(void*)(&__IPSBAR[0x11000A])) -#define MCF_CFM_RCON (*(vuint16*)(void*)(&__IPSBAR[0x110008])) - -/* Bit definitions and macros for MCF_CFM_CCR */ -#define MCF_CFM_CCR_BMT(x) (((x)&0x0007)<<0) -#define MCF_CFM_CCR_BME (0x0008) -#define MCF_CFM_CCR_SZEN (0x0040) -#define MCF_CFM_CCR_MODE(x) (((x)&0x0007)<<8) -#define MCF_CFM_CCR_MODE(x) ((uint16)(((x)&0x0007)<<8)) -#define MCF_CFM_CCR_BMT(x) ((uint16)(((x)&0x0007))) - -/* Bit definitions and macros for MCF_CFM_LPCR */ -#define MCF_CFM_LPCR_STPMD(x) (((x)&0x03)<<3) -#define MCF_CFM_LPCR_LPMD(x) (((x)&0x03)<<6) -#define MCF_CFM_LPCR_LPMD_STOP (0xC0) -#define MCF_CFM_LPCR_LPMD_WAIT (0x80) -#define MCF_CFM_LPCR_LPMD_DOZE (0x40) -#define MCF_CFM_LPCR_LPMD_RUN (0x00) -#define MCF_CFM_LPCR_STPMD(x) ((uint8)(((x)&0x0003)<<3)) - -/* Bit definitions and macros for MCF_CFM_CIR */ -#define MCF_CFM_CIR_PRN(x) (((x)&0x003F)<<0) -#define MCF_CFM_CIR_PIN(x) (((x)&0x03FF)<<6) - -/* Bit definitions and macros for MCF_CFM_RCON */ -#define MCF_CFM_RCON_MODE (0x0001) -#define MCF_CFM_RCON_BOOTPS(x) (((x)&0x0003)<<3) -#define MCF_CFM_RCON_RLOAD (0x0020) -#define MCF_CFM_RCON_RCSC(x) (((x)&0x0003)<<8) - -/********************************************************************/ - -#endif /* __MCF523X_CFM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_cs.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_cs.h deleted file mode 100644 index a48de5e0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_cs.h +++ /dev/null @@ -1,108 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_cs.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_CS_H__ -#define __MCF523X_CS_H__ - -/********************************************************************* -* -* Chip Selects (CS) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CS_CSAR0 (*(vuint16*)(void*)(&__IPSBAR[0x000080])) -#define MCF_CS_CSMR0 (*(vuint32*)(void*)(&__IPSBAR[0x000084])) -#define MCF_CS_CSCR0 (*(vuint16*)(void*)(&__IPSBAR[0x00008A])) -#define MCF_CS_CSAR1 (*(vuint16*)(void*)(&__IPSBAR[0x00008C])) -#define MCF_CS_CSMR1 (*(vuint32*)(void*)(&__IPSBAR[0x000090])) -#define MCF_CS_CSCR1 (*(vuint16*)(void*)(&__IPSBAR[0x000096])) -#define MCF_CS_CSAR2 (*(vuint16*)(void*)(&__IPSBAR[0x000098])) -#define MCF_CS_CSMR2 (*(vuint32*)(void*)(&__IPSBAR[0x00009C])) -#define MCF_CS_CSCR2 (*(vuint16*)(void*)(&__IPSBAR[0x0000A2])) -#define MCF_CS_CSAR3 (*(vuint16*)(void*)(&__IPSBAR[0x0000A4])) -#define MCF_CS_CSMR3 (*(vuint32*)(void*)(&__IPSBAR[0x0000A8])) -#define MCF_CS_CSCR3 (*(vuint16*)(void*)(&__IPSBAR[0x0000AE])) -#define MCF_CS_CSAR4 (*(vuint16*)(void*)(&__IPSBAR[0x0000B0])) -#define MCF_CS_CSMR4 (*(vuint32*)(void*)(&__IPSBAR[0x0000B4])) -#define MCF_CS_CSCR4 (*(vuint16*)(void*)(&__IPSBAR[0x0000BA])) -#define MCF_CS_CSAR5 (*(vuint16*)(void*)(&__IPSBAR[0x0000BC])) -#define MCF_CS_CSMR5 (*(vuint32*)(void*)(&__IPSBAR[0x0000C0])) -#define MCF_CS_CSCR5 (*(vuint16*)(void*)(&__IPSBAR[0x0000C6])) -#define MCF_CS_CSAR6 (*(vuint16*)(void*)(&__IPSBAR[0x0000C8])) -#define MCF_CS_CSMR6 (*(vuint32*)(void*)(&__IPSBAR[0x0000CC])) -#define MCF_CS_CSCR6 (*(vuint16*)(void*)(&__IPSBAR[0x0000D2])) -#define MCF_CS_CSAR7 (*(vuint16*)(void*)(&__IPSBAR[0x0000D4])) -#define MCF_CS_CSMR7 (*(vuint32*)(void*)(&__IPSBAR[0x0000D8])) -#define MCF_CS_CSCR7 (*(vuint16*)(void*)(&__IPSBAR[0x0000DE])) -#define MCF_CS_CSAR(x) (*(vuint16*)(void*)(&__IPSBAR[0x000080+((x)*0x00C)])) -#define MCF_CS_CSMR(x) (*(vuint32*)(void*)(&__IPSBAR[0x000084+((x)*0x00C)])) -#define MCF_CS_CSCR(x) (*(vuint16*)(void*)(&__IPSBAR[0x00008A+((x)*0x00C)])) - -/* Bit definitions and macros for MCF_CS_CSAR */ -#define MCF_CS_CSAR_BA(x) ((uint16)(((x)&0xFFFF0000)>>16)) - -/* Bit definitions and macros for MCF_CS_CSMR */ -#define MCF_CS_CSMR_V (0x00000001) -#define MCF_CS_CSMR_UD (0x00000002) -#define MCF_CS_CSMR_UC (0x00000004) -#define MCF_CS_CSMR_SD (0x00000008) -#define MCF_CS_CSMR_SC (0x00000010) -#define MCF_CS_CSMR_CI (0x00000020) -#define MCF_CS_CSMR_AM (0x00000040) -#define MCF_CS_CSMR_WP (0x00000100) -#define MCF_CS_CSMR_BAM(x) (((x)&0x0000FFFF)<<16) -#define MCF_CS_CSMR_BAM_4G (0xFFFF0000) -#define MCF_CS_CSMR_BAM_2G (0x7FFF0000) -#define MCF_CS_CSMR_BAM_1G (0x3FFF0000) -#define MCF_CS_CSMR_BAM_1024M (0x3FFF0000) -#define MCF_CS_CSMR_BAM_512M (0x1FFF0000) -#define MCF_CS_CSMR_BAM_256M (0x0FFF0000) -#define MCF_CS_CSMR_BAM_128M (0x07FF0000) -#define MCF_CS_CSMR_BAM_64M (0x03FF0000) -#define MCF_CS_CSMR_BAM_32M (0x01FF0000) -#define MCF_CS_CSMR_BAM_16M (0x00FF0000) -#define MCF_CS_CSMR_BAM_8M (0x007F0000) -#define MCF_CS_CSMR_BAM_4M (0x003F0000) -#define MCF_CS_CSMR_BAM_2M (0x001F0000) -#define MCF_CS_CSMR_BAM_1M (0x000F0000) -#define MCF_CS_CSMR_BAM_1024K (0x000F0000) -#define MCF_CS_CSMR_BAM_512K (0x00070000) -#define MCF_CS_CSMR_BAM_256K (0x00030000) -#define MCF_CS_CSMR_BAM_128K (0x00010000) -#define MCF_CS_CSMR_BAM_64K (0x00000000) - -/* Bit definitions and macros for MCF_CS_CSCR */ -#define MCF_CS_CSCR_SWWS(x) (((x)&0x0007)<<0) -#define MCF_CS_CSCR_BSTW (0x0008) -#define MCF_CS_CSCR_BSTR (0x0010) -#define MCF_CS_CSCR_BEM (0x0020) -#define MCF_CS_CSCR_PS(x) (((x)&0x0003)<<6) -#define MCF_CS_CSCR_AA (0x0100) -#define MCF_CS_CSCR_IWS(x) (((x)&0x000F)<<10) -#define MCF_CS_CSCR_SRWS(x) (((x)&0x0003)<<14) -#define MCF_CS_CSCR_PS_8 (0x0040) -#define MCF_CS_CSCR_PS_16 (0x0080) -#define MCF_CS_CSCR_PS_32 (0x0000) - -/********************************************************************/ - -#endif /* __MCF523X_CS_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_eport.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_eport.h deleted file mode 100644 index 1981e260..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_eport.h +++ /dev/null @@ -1,99 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_eport.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_EPORT_H__ -#define __MCF523X_EPORT_H__ - -/********************************************************************* -* -* Edge Port Module (EPORT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_EPORT_EPPAR (*(vuint16*)(void*)(&__IPSBAR[0x130000])) -#define MCF_EPORT_EPDDR (*(vuint8 *)(void*)(&__IPSBAR[0x130002])) -#define MCF_EPORT_EPIER (*(vuint8 *)(void*)(&__IPSBAR[0x130003])) -#define MCF_EPORT_EPDR (*(vuint8 *)(void*)(&__IPSBAR[0x130004])) -#define MCF_EPORT_EPPDR (*(vuint8 *)(void*)(&__IPSBAR[0x130005])) -#define MCF_EPORT_EPFR (*(vuint8 *)(void*)(&__IPSBAR[0x130006])) - -/* Bit definitions and macros for MCF_EPORT_EPPAR */ -#define MCF_EPORT_EPPAR_EPPA1(x) (((x)&0x0003)<<2) -#define MCF_EPORT_EPPAR_EPPA2(x) (((x)&0x0003)<<4) -#define MCF_EPORT_EPPAR_EPPA3(x) (((x)&0x0003)<<6) -#define MCF_EPORT_EPPAR_EPPA4(x) (((x)&0x0003)<<8) -#define MCF_EPORT_EPPAR_EPPA5(x) (((x)&0x0003)<<10) -#define MCF_EPORT_EPPAR_EPPA6(x) (((x)&0x0003)<<12) -#define MCF_EPORT_EPPAR_EPPA7(x) (((x)&0x0003)<<14) -#define MCF_EPORT_EPPAR_EPPAx_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPAx_RISING (1) -#define MCF_EPORT_EPPAR_EPPAx_FALLING (2) -#define MCF_EPORT_EPPAR_EPPAx_BOTH (3) - -/* Bit definitions and macros for MCF_EPORT_EPDDR */ -#define MCF_EPORT_EPDDR_EPDD1 (0x02) -#define MCF_EPORT_EPDDR_EPDD2 (0x04) -#define MCF_EPORT_EPDDR_EPDD3 (0x08) -#define MCF_EPORT_EPDDR_EPDD4 (0x10) -#define MCF_EPORT_EPDDR_EPDD5 (0x20) -#define MCF_EPORT_EPDDR_EPDD6 (0x40) -#define MCF_EPORT_EPDDR_EPDD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPIER */ -#define MCF_EPORT_EPIER_EPIE1 (0x02) -#define MCF_EPORT_EPIER_EPIE2 (0x04) -#define MCF_EPORT_EPIER_EPIE3 (0x08) -#define MCF_EPORT_EPIER_EPIE4 (0x10) -#define MCF_EPORT_EPIER_EPIE5 (0x20) -#define MCF_EPORT_EPIER_EPIE6 (0x40) -#define MCF_EPORT_EPIER_EPIE7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPDR */ -#define MCF_EPORT_EPDR_EPD1 (0x02) -#define MCF_EPORT_EPDR_EPD2 (0x04) -#define MCF_EPORT_EPDR_EPD3 (0x08) -#define MCF_EPORT_EPDR_EPD4 (0x10) -#define MCF_EPORT_EPDR_EPD5 (0x20) -#define MCF_EPORT_EPDR_EPD6 (0x40) -#define MCF_EPORT_EPDR_EPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPPDR */ -#define MCF_EPORT_EPPDR_EPPD1 (0x02) -#define MCF_EPORT_EPPDR_EPPD2 (0x04) -#define MCF_EPORT_EPPDR_EPPD3 (0x08) -#define MCF_EPORT_EPPDR_EPPD4 (0x10) -#define MCF_EPORT_EPPDR_EPPD5 (0x20) -#define MCF_EPORT_EPPDR_EPPD6 (0x40) -#define MCF_EPORT_EPPDR_EPPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPFR */ -#define MCF_EPORT_EPFR_EPF1 (0x02) -#define MCF_EPORT_EPFR_EPF2 (0x04) -#define MCF_EPORT_EPFR_EPF3 (0x08) -#define MCF_EPORT_EPFR_EPF4 (0x10) -#define MCF_EPORT_EPFR_EPF5 (0x20) -#define MCF_EPORT_EPFR_EPF6 (0x40) -#define MCF_EPORT_EPFR_EPF7 (0x80) - -/********************************************************************/ - -#endif /* __MCF523X_EPORT_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_etpu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_etpu.h deleted file mode 100644 index d8e42017..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_etpu.h +++ /dev/null @@ -1,500 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_etpu.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_ETPU_H__ -#define __MCF523X_ETPU_H__ - -/********************************************************************* -* -* enhanced Time Processor Unit (ETPU) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_ETPU_EMCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0000])) -#define MCF_ETPU_ECDCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0004])) -#define MCF_ETPU_EMISCCR (*(vuint32*)(void*)(&__IPSBAR[0x1D000C])) -#define MCF_ETPU_ESCMODR (*(vuint32*)(void*)(&__IPSBAR[0x1D0010])) -#define MCF_ETPU_EECR (*(vuint32*)(void*)(&__IPSBAR[0x1D0014])) -#define MCF_ETPU_ETBCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0020])) -#define MCF_ETPU_ETB1R (*(vuint32*)(void*)(&__IPSBAR[0x1D0024])) -#define MCF_ETPU_ETB2R (*(vuint32*)(void*)(&__IPSBAR[0x1D0028])) -#define MCF_ETPU_EREDCR (*(vuint32*)(void*)(&__IPSBAR[0x1D002C])) -#define MCF_ETPU_ECISR (*(vuint32*)(void*)(&__IPSBAR[0x1D0200])) -#define MCF_ETPU_ECDTRSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0210])) -#define MCF_ETPU_ECIOSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0220])) -#define MCF_ETPU_ECDTROSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0230])) -#define MCF_ETPU_ECIER (*(vuint32*)(void*)(&__IPSBAR[0x1D0240])) -#define MCF_ETPU_ECDTRER (*(vuint32*)(void*)(&__IPSBAR[0x1D0250])) -#define MCF_ETPU_ECPSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0280])) -#define MCF_ETPU_ECSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0290])) -#define MCF_ETPU_EC0SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0404])) -#define MCF_ETPU_EC1SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0414])) -#define MCF_ETPU_EC2SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0424])) -#define MCF_ETPU_EC3SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0434])) -#define MCF_ETPU_EC4SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0444])) -#define MCF_ETPU_EC5SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0454])) -#define MCF_ETPU_EC6SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0464])) -#define MCF_ETPU_EC7SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0474])) -#define MCF_ETPU_EC8SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0484])) -#define MCF_ETPU_EC9SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0494])) -#define MCF_ETPU_EC10SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04A4])) -#define MCF_ETPU_EC11SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04B4])) -#define MCF_ETPU_EC12SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04C4])) -#define MCF_ETPU_EC13SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04D4])) -#define MCF_ETPU_EC14SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04E4])) -#define MCF_ETPU_EC15SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04F4])) -#define MCF_ETPU_EC16SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0504])) -#define MCF_ETPU_EC17SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0514])) -#define MCF_ETPU_EC18SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0524])) -#define MCF_ETPU_EC19SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0534])) -#define MCF_ETPU_EC20SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0544])) -#define MCF_ETPU_EC21SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0554])) -#define MCF_ETPU_EC22SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0564])) -#define MCF_ETPU_EC23SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0574])) -#define MCF_ETPU_EC24SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0584])) -#define MCF_ETPU_EC25SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0594])) -#define MCF_ETPU_EC26SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05A4])) -#define MCF_ETPU_EC27SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05B4])) -#define MCF_ETPU_EC28SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05C4])) -#define MCF_ETPU_EC29SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05D4])) -#define MCF_ETPU_EC30SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05E4])) -#define MCF_ETPU_EC31SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05F4])) -#define MCF_ETPU_ECnSCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1D0404+((x)*0x010)])) -#define MCF_ETPU_EC0CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0400])) -#define MCF_ETPU_EC1CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0410])) -#define MCF_ETPU_EC2CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0420])) -#define MCF_ETPU_EC3CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0430])) -#define MCF_ETPU_EC4CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0440])) -#define MCF_ETPU_EC5CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0450])) -#define MCF_ETPU_EC6CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0460])) -#define MCF_ETPU_EC7CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0470])) -#define MCF_ETPU_EC8CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0480])) -#define MCF_ETPU_EC9CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0490])) -#define MCF_ETPU_EC10CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04A0])) -#define MCF_ETPU_EC11CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04B0])) -#define MCF_ETPU_EC12CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04C0])) -#define MCF_ETPU_EC13CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04D0])) -#define MCF_ETPU_EC14CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04E0])) -#define MCF_ETPU_EC15CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04F0])) -#define MCF_ETPU_EC16CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0500])) -#define MCF_ETPU_EC17CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0510])) -#define MCF_ETPU_EC18CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0520])) -#define MCF_ETPU_EC19CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0530])) -#define MCF_ETPU_EC20CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0540])) -#define MCF_ETPU_EC21CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0550])) -#define MCF_ETPU_EC22CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0560])) -#define MCF_ETPU_EC23CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0570])) -#define MCF_ETPU_EC24CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0580])) -#define MCF_ETPU_EC25CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0590])) -#define MCF_ETPU_EC26CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05A0])) -#define MCF_ETPU_EC27CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05B0])) -#define MCF_ETPU_EC28CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05C0])) -#define MCF_ETPU_EC29CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05D0])) -#define MCF_ETPU_EC30CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05E0])) -#define MCF_ETPU_EC31CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05F0])) -#define MCF_ETPU_ECnCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1D0400+((x)*0x010)])) -#define MCF_ETPU_EC0HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0408])) -#define MCF_ETPU_EC1HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0418])) -#define MCF_ETPU_EC2HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0428])) -#define MCF_ETPU_EC3HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0438])) -#define MCF_ETPU_EC4HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0448])) -#define MCF_ETPU_EC5HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0458])) -#define MCF_ETPU_EC6HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0468])) -#define MCF_ETPU_EC7HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0478])) -#define MCF_ETPU_EC8HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0488])) -#define MCF_ETPU_EC9HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0498])) -#define MCF_ETPU_EC10HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04A8])) -#define MCF_ETPU_EC11HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04B8])) -#define MCF_ETPU_EC12HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04C8])) -#define MCF_ETPU_EC13HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04D8])) -#define MCF_ETPU_EC14HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04E8])) -#define MCF_ETPU_EC15HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04F8])) -#define MCF_ETPU_EC16HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0508])) -#define MCF_ETPU_EC17HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0518])) -#define MCF_ETPU_EC18HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0528])) -#define MCF_ETPU_EC19HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0538])) -#define MCF_ETPU_EC20HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0548])) -#define MCF_ETPU_EC21HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0558])) -#define MCF_ETPU_EC22HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0568])) -#define MCF_ETPU_EC23HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0578])) -#define MCF_ETPU_EC24HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0588])) -#define MCF_ETPU_EC25HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0598])) -#define MCF_ETPU_EC26HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05A8])) -#define MCF_ETPU_EC27HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05B8])) -#define MCF_ETPU_EC28HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05C8])) -#define MCF_ETPU_EC29HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05D8])) -#define MCF_ETPU_EC30HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05E8])) -#define MCF_ETPU_EC31HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05F8])) -#define MCF_ETPU_ECnHSSR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1D0408+((x)*0x010)])) - -/* Bit definitions and macros for MCF_ETPU_EMCR */ -#define MCF_ETPU_EMCR_GTBE (0x00000001) -#define MCF_ETPU_EMCR_VIS (0x00000040) -#define MCF_ETPU_EMCR_SCMMISEN (0x00000200) -#define MCF_ETPU_EMCR_SCMMISF (0x00000400) -#define MCF_ETPU_EMCR_SCMSIZE(x) (((x)&0x0000001F)<<16) -#define MCF_ETPU_EMCR_ILF2 (0x01000000) -#define MCF_ETPU_EMCR_ILF1 (0x02000000) -#define MCF_ETPU_EMCR_MGE2 (0x04000000) -#define MCF_ETPU_EMCR_MGE1 (0x08000000) -#define MCF_ETPU_EMCR_GEC (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDCR */ -#define MCF_ETPU_ECDCR_PARM1(x) (((x)&0x0000007F)<<0) -#define MCF_ETPU_ECDCR_WR (0x00000080) -#define MCF_ETPU_ECDCR_PARM0(x) (((x)&0x0000007F)<<8) -#define MCF_ETPU_ECDCR_PWIDTH (0x00008000) -#define MCF_ETPU_ECDCR_PBASE(x) (((x)&0x000003FF)<<16) -#define MCF_ETPU_ECDCR_CTBASE(x) (((x)&0x0000001F)<<26) -#define MCF_ETPU_ECDCR_STS (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_EECR */ -#define MCF_ETPU_EECR_ETB(x) (((x)&0x0000001F)<<0) -#define MCF_ETPU_EECR_CDFC(x) (((x)&0x00000003)<<14) -#define MCF_ETPU_EECR_FPSK(x) (((x)&0x00000007)<<16) -#define MCF_ETPU_EECR_HLTF (0x00800000) -#define MCF_ETPU_EECR_STF (0x10000000) -#define MCF_ETPU_EECR_MDIS (0x40000000) -#define MCF_ETPU_EECR_FEND (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ETBCR */ -#define MCF_ETPU_ETBCR_TCR1P(x) (((x)&0x000000FF)<<0) -#define MCF_ETPU_ETBCR_TCR1CTL(x) (((x)&0x00000003)<<14) -#define MCF_ETPU_ETBCR_TCR2P(x) (((x)&0x0000003F)<<16) -#define MCF_ETPU_ETBCR_AM (0x02000000) -#define MCF_ETPU_ETBCR_TCRCF(x) (((x)&0x00000003)<<27) -#define MCF_ETPU_ETBCR_TCR2CTL(x) (((x)&0x00000007)<<29) - -/* Bit definitions and macros for MCF_ETPU_ETB1R */ -#define MCF_ETPU_ETB1R_TCR1(x) (((x)&0x00FFFFFF)<<0) - -/* Bit definitions and macros for MCF_ETPU_ETB2R */ -#define MCF_ETPU_ETB2R_TCR2(x) (((x)&0x00FFFFFF)<<0) - -/* Bit definitions and macros for MCF_ETPU_EREDCR */ -#define MCF_ETPU_EREDCR_SRV2(x) (((x)&0x0000000F)<<0) -#define MCF_ETPU_EREDCR_SERVER_ID2(x) (((x)&0x0000000F)<<8) -#define MCF_ETPU_EREDCR_RSC2 (0x00004000) -#define MCF_ETPU_EREDCR_REN2 (0x00008000) -#define MCF_ETPU_EREDCR_SRV1(x) (((x)&0x0000000F)<<16) -#define MCF_ETPU_EREDCR_SERVER_ID1(x) (((x)&0x0000000F)<<24) -#define MCF_ETPU_EREDCR_RSC1 (0x40000000) -#define MCF_ETPU_EREDCR_REN1 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECISR */ -#define MCF_ETPU_ECISR_CIS0 (0x00000001) -#define MCF_ETPU_ECISR_CIS1 (0x00000002) -#define MCF_ETPU_ECISR_CIS2 (0x00000004) -#define MCF_ETPU_ECISR_CIS3 (0x00000008) -#define MCF_ETPU_ECISR_CIS4 (0x00000010) -#define MCF_ETPU_ECISR_CIS5 (0x00000020) -#define MCF_ETPU_ECISR_CIS6 (0x00000040) -#define MCF_ETPU_ECISR_CIS7 (0x00000080) -#define MCF_ETPU_ECISR_CIS8 (0x00000100) -#define MCF_ETPU_ECISR_CIS9 (0x00000200) -#define MCF_ETPU_ECISR_CIS10 (0x00000400) -#define MCF_ETPU_ECISR_CIS11 (0x00000800) -#define MCF_ETPU_ECISR_CIS12 (0x00001000) -#define MCF_ETPU_ECISR_CIS13 (0x00002000) -#define MCF_ETPU_ECISR_CIS14 (0x00004000) -#define MCF_ETPU_ECISR_CIS15 (0x00008000) -#define MCF_ETPU_ECISR_CIS16 (0x00010000) -#define MCF_ETPU_ECISR_CIS17 (0x00020000) -#define MCF_ETPU_ECISR_CIS18 (0x00040000) -#define MCF_ETPU_ECISR_CIS19 (0x00080000) -#define MCF_ETPU_ECISR_CIS20 (0x00100000) -#define MCF_ETPU_ECISR_CIS21 (0x00200000) -#define MCF_ETPU_ECISR_CIS22 (0x00400000) -#define MCF_ETPU_ECISR_CIS23 (0x00800000) -#define MCF_ETPU_ECISR_CIS24 (0x01000000) -#define MCF_ETPU_ECISR_CIS25 (0x02000000) -#define MCF_ETPU_ECISR_CIS26 (0x04000000) -#define MCF_ETPU_ECISR_CIS27 (0x08000000) -#define MCF_ETPU_ECISR_CIS28 (0x10000000) -#define MCF_ETPU_ECISR_CIS29 (0x20000000) -#define MCF_ETPU_ECISR_CIS30 (0x40000000) -#define MCF_ETPU_ECISR_CIS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDTRSR */ -#define MCF_ETPU_ECDTRSR_DTRS0 (0x00000001) -#define MCF_ETPU_ECDTRSR_DTRS1 (0x00000002) -#define MCF_ETPU_ECDTRSR_DTRS2 (0x00000004) -#define MCF_ETPU_ECDTRSR_DTRS3 (0x00000008) -#define MCF_ETPU_ECDTRSR_DTRS4 (0x00000010) -#define MCF_ETPU_ECDTRSR_DTRS5 (0x00000020) -#define MCF_ETPU_ECDTRSR_DTRS6 (0x00000040) -#define MCF_ETPU_ECDTRSR_DTRS7 (0x00000080) -#define MCF_ETPU_ECDTRSR_DTRS8 (0x00000100) -#define MCF_ETPU_ECDTRSR_DTRS9 (0x00000200) -#define MCF_ETPU_ECDTRSR_DTRS10 (0x00000400) -#define MCF_ETPU_ECDTRSR_DTRS11 (0x00000800) -#define MCF_ETPU_ECDTRSR_DTRS12 (0x00001000) -#define MCF_ETPU_ECDTRSR_DTRS13 (0x00002000) -#define MCF_ETPU_ECDTRSR_DTRS14 (0x00004000) -#define MCF_ETPU_ECDTRSR_DTRS15 (0x00008000) -#define MCF_ETPU_ECDTRSR_DTRS16 (0x00010000) -#define MCF_ETPU_ECDTRSR_DTRS17 (0x00020000) -#define MCF_ETPU_ECDTRSR_DTRS18 (0x00040000) -#define MCF_ETPU_ECDTRSR_DTRS19 (0x00080000) -#define MCF_ETPU_ECDTRSR_DTRS20 (0x00100000) -#define MCF_ETPU_ECDTRSR_DTRS21 (0x00200000) -#define MCF_ETPU_ECDTRSR_DTRS22 (0x00400000) -#define MCF_ETPU_ECDTRSR_DTRS23 (0x00800000) -#define MCF_ETPU_ECDTRSR_DTRS24 (0x01000000) -#define MCF_ETPU_ECDTRSR_DTRS25 (0x02000000) -#define MCF_ETPU_ECDTRSR_DTRS26 (0x04000000) -#define MCF_ETPU_ECDTRSR_DTRS27 (0x08000000) -#define MCF_ETPU_ECDTRSR_DTRS28 (0x10000000) -#define MCF_ETPU_ECDTRSR_DTRS29 (0x20000000) -#define MCF_ETPU_ECDTRSR_DTRS30 (0x40000000) -#define MCF_ETPU_ECDTRSR_DTRS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECIOSR */ -#define MCF_ETPU_ECIOSR_CIOS0 (0x00000001) -#define MCF_ETPU_ECIOSR_CIOS1 (0x00000002) -#define MCF_ETPU_ECIOSR_CIOS2 (0x00000004) -#define MCF_ETPU_ECIOSR_CIOS3 (0x00000008) -#define MCF_ETPU_ECIOSR_CIOS4 (0x00000010) -#define MCF_ETPU_ECIOSR_CIOS5 (0x00000020) -#define MCF_ETPU_ECIOSR_CIOS6 (0x00000040) -#define MCF_ETPU_ECIOSR_CIOS7 (0x00000080) -#define MCF_ETPU_ECIOSR_CIOS8 (0x00000100) -#define MCF_ETPU_ECIOSR_CIOS9 (0x00000200) -#define MCF_ETPU_ECIOSR_CIOS10 (0x00000400) -#define MCF_ETPU_ECIOSR_CIOS11 (0x00000800) -#define MCF_ETPU_ECIOSR_CIOS12 (0x00001000) -#define MCF_ETPU_ECIOSR_CIOS13 (0x00002000) -#define MCF_ETPU_ECIOSR_CIOS14 (0x00004000) -#define MCF_ETPU_ECIOSR_CIOS15 (0x00008000) -#define MCF_ETPU_ECIOSR_CIOS16 (0x00010000) -#define MCF_ETPU_ECIOSR_CIOS17 (0x00020000) -#define MCF_ETPU_ECIOSR_CIOS18 (0x00040000) -#define MCF_ETPU_ECIOSR_CIOS19 (0x00080000) -#define MCF_ETPU_ECIOSR_CIOS20 (0x00100000) -#define MCF_ETPU_ECIOSR_CIOS21 (0x00200000) -#define MCF_ETPU_ECIOSR_CIOS22 (0x00400000) -#define MCF_ETPU_ECIOSR_CIOS23 (0x00800000) -#define MCF_ETPU_ECIOSR_CIOS24 (0x01000000) -#define MCF_ETPU_ECIOSR_CIOS25 (0x02000000) -#define MCF_ETPU_ECIOSR_CIOS26 (0x04000000) -#define MCF_ETPU_ECIOSR_CIOS27 (0x08000000) -#define MCF_ETPU_ECIOSR_CIOS28 (0x10000000) -#define MCF_ETPU_ECIOSR_CIOS29 (0x20000000) -#define MCF_ETPU_ECIOSR_CIOS30 (0x40000000) -#define MCF_ETPU_ECIOSR_CIOS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDTROSR */ -#define MCF_ETPU_ECDTROSR_DTROS0 (0x00000001) -#define MCF_ETPU_ECDTROSR_DTROS1 (0x00000002) -#define MCF_ETPU_ECDTROSR_DTROS2 (0x00000004) -#define MCF_ETPU_ECDTROSR_DTROS3 (0x00000008) -#define MCF_ETPU_ECDTROSR_DTROS4 (0x00000010) -#define MCF_ETPU_ECDTROSR_DTROS5 (0x00000020) -#define MCF_ETPU_ECDTROSR_DTROS6 (0x00000040) -#define MCF_ETPU_ECDTROSR_DTROS7 (0x00000080) -#define MCF_ETPU_ECDTROSR_DTROS8 (0x00000100) -#define MCF_ETPU_ECDTROSR_DTROS9 (0x00000200) -#define MCF_ETPU_ECDTROSR_DTROS10 (0x00000400) -#define MCF_ETPU_ECDTROSR_DTROS11 (0x00000800) -#define MCF_ETPU_ECDTROSR_DTROS12 (0x00001000) -#define MCF_ETPU_ECDTROSR_DTROS13 (0x00002000) -#define MCF_ETPU_ECDTROSR_DTROS14 (0x00004000) -#define MCF_ETPU_ECDTROSR_DTROS15 (0x00008000) -#define MCF_ETPU_ECDTROSR_DTROS16 (0x00010000) -#define MCF_ETPU_ECDTROSR_DTROS17 (0x00020000) -#define MCF_ETPU_ECDTROSR_DTROS18 (0x00040000) -#define MCF_ETPU_ECDTROSR_DTROS19 (0x00080000) -#define MCF_ETPU_ECDTROSR_DTROS20 (0x00100000) -#define MCF_ETPU_ECDTROSR_DTROS21 (0x00200000) -#define MCF_ETPU_ECDTROSR_DTROS22 (0x00400000) -#define MCF_ETPU_ECDTROSR_DTROS23 (0x00800000) -#define MCF_ETPU_ECDTROSR_DTROS24 (0x01000000) -#define MCF_ETPU_ECDTROSR_DTROS25 (0x02000000) -#define MCF_ETPU_ECDTROSR_DTROS26 (0x04000000) -#define MCF_ETPU_ECDTROSR_DTROS27 (0x08000000) -#define MCF_ETPU_ECDTROSR_DTROS28 (0x10000000) -#define MCF_ETPU_ECDTROSR_DTROS29 (0x20000000) -#define MCF_ETPU_ECDTROSR_DTROS30 (0x40000000) -#define MCF_ETPU_ECDTROSR_DTROS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECIER */ -#define MCF_ETPU_ECIER_CIE0 (0x00000001) -#define MCF_ETPU_ECIER_CIE1 (0x00000002) -#define MCF_ETPU_ECIER_CIE2 (0x00000004) -#define MCF_ETPU_ECIER_CIE3 (0x00000008) -#define MCF_ETPU_ECIER_CIE4 (0x00000010) -#define MCF_ETPU_ECIER_CIE5 (0x00000020) -#define MCF_ETPU_ECIER_CIE6 (0x00000040) -#define MCF_ETPU_ECIER_CIE7 (0x00000080) -#define MCF_ETPU_ECIER_CIE8 (0x00000100) -#define MCF_ETPU_ECIER_CIE9 (0x00000200) -#define MCF_ETPU_ECIER_CIE10 (0x00000400) -#define MCF_ETPU_ECIER_CIE11 (0x00000800) -#define MCF_ETPU_ECIER_CIE12 (0x00001000) -#define MCF_ETPU_ECIER_CIE13 (0x00002000) -#define MCF_ETPU_ECIER_CIE14 (0x00004000) -#define MCF_ETPU_ECIER_CIE15 (0x00008000) -#define MCF_ETPU_ECIER_CIE16 (0x00010000) -#define MCF_ETPU_ECIER_CIE17 (0x00020000) -#define MCF_ETPU_ECIER_CIE18 (0x00040000) -#define MCF_ETPU_ECIER_CIE19 (0x00080000) -#define MCF_ETPU_ECIER_CIE20 (0x00100000) -#define MCF_ETPU_ECIER_CIE21 (0x00200000) -#define MCF_ETPU_ECIER_CIE22 (0x00400000) -#define MCF_ETPU_ECIER_CIE23 (0x00800000) -#define MCF_ETPU_ECIER_CIE24 (0x01000000) -#define MCF_ETPU_ECIER_CIE25 (0x02000000) -#define MCF_ETPU_ECIER_CIE26 (0x04000000) -#define MCF_ETPU_ECIER_CIE27 (0x08000000) -#define MCF_ETPU_ECIER_CIE28 (0x10000000) -#define MCF_ETPU_ECIER_CIE29 (0x20000000) -#define MCF_ETPU_ECIER_CIE30 (0x40000000) -#define MCF_ETPU_ECIER_CIE31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDTRER */ -#define MCF_ETPU_ECDTRER_DTRE0 (0x00000001) -#define MCF_ETPU_ECDTRER_DTRE1 (0x00000002) -#define MCF_ETPU_ECDTRER_DTRE2 (0x00000004) -#define MCF_ETPU_ECDTRER_DTRE3 (0x00000008) -#define MCF_ETPU_ECDTRER_DTRE4 (0x00000010) -#define MCF_ETPU_ECDTRER_DTRE5 (0x00000020) -#define MCF_ETPU_ECDTRER_DTRE6 (0x00000040) -#define MCF_ETPU_ECDTRER_DTRE7 (0x00000080) -#define MCF_ETPU_ECDTRER_DTRE8 (0x00000100) -#define MCF_ETPU_ECDTRER_DTRE9 (0x00000200) -#define MCF_ETPU_ECDTRER_DTRE10 (0x00000400) -#define MCF_ETPU_ECDTRER_DTRE11 (0x00000800) -#define MCF_ETPU_ECDTRER_DTRE12 (0x00001000) -#define MCF_ETPU_ECDTRER_DTRE13 (0x00002000) -#define MCF_ETPU_ECDTRER_DTRE14 (0x00004000) -#define MCF_ETPU_ECDTRER_DTRE15 (0x00008000) -#define MCF_ETPU_ECDTRER_DTRE16 (0x00010000) -#define MCF_ETPU_ECDTRER_DTRE17 (0x00020000) -#define MCF_ETPU_ECDTRER_DTRE18 (0x00040000) -#define MCF_ETPU_ECDTRER_DTRE19 (0x00080000) -#define MCF_ETPU_ECDTRER_DTRE20 (0x00100000) -#define MCF_ETPU_ECDTRER_DTRE21 (0x00200000) -#define MCF_ETPU_ECDTRER_DTRE22 (0x00400000) -#define MCF_ETPU_ECDTRER_DTRE23 (0x00800000) -#define MCF_ETPU_ECDTRER_DTRE24 (0x01000000) -#define MCF_ETPU_ECDTRER_DTRE25 (0x02000000) -#define MCF_ETPU_ECDTRER_DTRE26 (0x04000000) -#define MCF_ETPU_ECDTRER_DTRE27 (0x08000000) -#define MCF_ETPU_ECDTRER_DTRE28 (0x10000000) -#define MCF_ETPU_ECDTRER_DTRE29 (0x20000000) -#define MCF_ETPU_ECDTRER_DTRE30 (0x40000000) -#define MCF_ETPU_ECDTRER_DTRE31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECPSSR */ -#define MCF_ETPU_ECPSSR_SR0 (0x00000001) -#define MCF_ETPU_ECPSSR_SR1 (0x00000002) -#define MCF_ETPU_ECPSSR_SR2 (0x00000004) -#define MCF_ETPU_ECPSSR_SR3 (0x00000008) -#define MCF_ETPU_ECPSSR_SR4 (0x00000010) -#define MCF_ETPU_ECPSSR_SR5 (0x00000020) -#define MCF_ETPU_ECPSSR_SR6 (0x00000040) -#define MCF_ETPU_ECPSSR_SR7 (0x00000080) -#define MCF_ETPU_ECPSSR_SR8 (0x00000100) -#define MCF_ETPU_ECPSSR_SR9 (0x00000200) -#define MCF_ETPU_ECPSSR_SR10 (0x00000400) -#define MCF_ETPU_ECPSSR_SR11 (0x00000800) -#define MCF_ETPU_ECPSSR_SR12 (0x00001000) -#define MCF_ETPU_ECPSSR_SR13 (0x00002000) -#define MCF_ETPU_ECPSSR_SR14 (0x00004000) -#define MCF_ETPU_ECPSSR_SR15 (0x00008000) -#define MCF_ETPU_ECPSSR_SR16 (0x00010000) -#define MCF_ETPU_ECPSSR_SR17 (0x00020000) -#define MCF_ETPU_ECPSSR_SR18 (0x00040000) -#define MCF_ETPU_ECPSSR_SR19 (0x00080000) -#define MCF_ETPU_ECPSSR_SR20 (0x00100000) -#define MCF_ETPU_ECPSSR_SR21 (0x00200000) -#define MCF_ETPU_ECPSSR_SR22 (0x00400000) -#define MCF_ETPU_ECPSSR_SR23 (0x00800000) -#define MCF_ETPU_ECPSSR_SR24 (0x01000000) -#define MCF_ETPU_ECPSSR_SR25 (0x02000000) -#define MCF_ETPU_ECPSSR_SR26 (0x04000000) -#define MCF_ETPU_ECPSSR_SR27 (0x08000000) -#define MCF_ETPU_ECPSSR_SR28 (0x10000000) -#define MCF_ETPU_ECPSSR_SR29 (0x20000000) -#define MCF_ETPU_ECPSSR_SR30 (0x40000000) -#define MCF_ETPU_ECPSSR_SR31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECSSR */ -#define MCF_ETPU_ECSSR_SS0 (0x00000001) -#define MCF_ETPU_ECSSR_SS1 (0x00000002) -#define MCF_ETPU_ECSSR_SS2 (0x00000004) -#define MCF_ETPU_ECSSR_SS3 (0x00000008) -#define MCF_ETPU_ECSSR_SS4 (0x00000010) -#define MCF_ETPU_ECSSR_SS5 (0x00000020) -#define MCF_ETPU_ECSSR_SS6 (0x00000040) -#define MCF_ETPU_ECSSR_SS7 (0x00000080) -#define MCF_ETPU_ECSSR_SS8 (0x00000100) -#define MCF_ETPU_ECSSR_SS9 (0x00000200) -#define MCF_ETPU_ECSSR_SS10 (0x00000400) -#define MCF_ETPU_ECSSR_SS11 (0x00000800) -#define MCF_ETPU_ECSSR_SS12 (0x00001000) -#define MCF_ETPU_ECSSR_SS13 (0x00002000) -#define MCF_ETPU_ECSSR_SS14 (0x00004000) -#define MCF_ETPU_ECSSR_SS15 (0x00008000) -#define MCF_ETPU_ECSSR_SS16 (0x00010000) -#define MCF_ETPU_ECSSR_SS17 (0x00020000) -#define MCF_ETPU_ECSSR_SS18 (0x00040000) -#define MCF_ETPU_ECSSR_SS19 (0x00080000) -#define MCF_ETPU_ECSSR_SS20 (0x00100000) -#define MCF_ETPU_ECSSR_SS21 (0x00200000) -#define MCF_ETPU_ECSSR_SS22 (0x00400000) -#define MCF_ETPU_ECSSR_SS23 (0x00800000) -#define MCF_ETPU_ECSSR_SS24 (0x01000000) -#define MCF_ETPU_ECSSR_SS25 (0x02000000) -#define MCF_ETPU_ECSSR_SS26 (0x04000000) -#define MCF_ETPU_ECSSR_SS27 (0x08000000) -#define MCF_ETPU_ECSSR_SS28 (0x10000000) -#define MCF_ETPU_ECSSR_SS29 (0x20000000) -#define MCF_ETPU_ECSSR_SS30 (0x40000000) -#define MCF_ETPU_ECSSR_SS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECnSCR */ -#define MCF_ETPU_ECnSCR_FM(x) (((x)&0x00000003)<<0) -#define MCF_ETPU_ECnSCR_OBE (0x00002000) -#define MCF_ETPU_ECnSCR_OPS (0x00004000) -#define MCF_ETPU_ECnSCR_IPS (0x00008000) -#define MCF_ETPU_ECnSCR_DTROS (0x00400000) -#define MCF_ETPU_ECnSCR_DTRS (0x00800000) -#define MCF_ETPU_ECnSCR_CIOS (0x40000000) -#define MCF_ETPU_ECnSCR_CIS (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECnCR */ -#define MCF_ETPU_ECnCR_CPBA(x) (((x)&0x000007FF)<<0) -#define MCF_ETPU_ECnCR_OPOL (0x00004000) -#define MCF_ETPU_ECnCR_ODIS (0x00008000) -#define MCF_ETPU_ECnCR_CFS(x) (((x)&0x0000001F)<<16) -#define MCF_ETPU_ECnCR_ETCS (0x01000000) -#define MCF_ETPU_ECnCR_CPR(x) (((x)&0x00000003)<<28) -#define MCF_ETPU_ECnCR_DTRE (0x40000000) -#define MCF_ETPU_ECnCR_CIE (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECnHSSR */ -#define MCF_ETPU_ECnHSSR_HSR(x) (((x)&0x00000007)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_ETPU_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_etpu_struc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_etpu_struc.h deleted file mode 100644 index 93547be1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_etpu_struc.h +++ /dev/null @@ -1,980 +0,0 @@ -/**************************************************************************/ -/* FILE NAME: mcf523x_eTPU_struc.h */ -/* COPYRIGHT (c) Freescale Semiconductor 2004 */ -/* VERSION: 0.02 All Rights Reserved */ -/* */ -/* DESCRIPTION: */ -/* This file contains eTPU register and bit field definitions for MCF523x.*/ -/* Part of mpc5554.h auto-generated code by J.Loeliger. */ -/*========================================================================*/ -/* UPDATE HISTORY */ -/* REV AUTHOR DATE DESCRIPTION OF CHANGE */ -/* --- ----------- --------- --------------------- */ -/* 0.01 J.Loeliger 30/Apr/04 Initial version of file. */ -/* M.Princ */ -/* 0.02 J.Loeliger 20/Jul/04 Update eTPU structure to match mpc5554.*/ -/**************************************************************************/ - - -#ifndef _MCF523x_eTPU_struc_H_ -#define _MCF523x_eTPU_struc_H_ - -#include "typedefs.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#ifdef __MWERKS__ -#pragma push -#pragma ANSI_strict off -#endif - -/***************************Configuration Registers**************************/ - - struct ETPU_tag - { - union - { /* MODULE CONFIGURATION REGISTER */ - vuint32_t R; - struct - { - vuint32_t GEC:1; /* Global Exception Clear */ - vuint32_t:3; - vuint32_t MGE1:1; /* Microcode Global Exception-ETPU_A */ - - vuint32_t MGE2:1; /* Microcode Global Exception-ETPU_B */ - - vuint32_t ILF1:1; /* Illegal Instruction Flag-ETPU_A */ - - vuint32_t ILF2:1; /* Illegal Instruction Flag-ETPU_B */ - - vuint32_t:3; - vuint32_t SCMSIZE:5; /* Shared Code Memory size */ - vuint32_t:5; - vuint32_t SCMMISF:1; /* SCM MISC Flag */ - vuint32_t SCMMISEN:1; /* SCM MISC Enable */ - vuint32_t:2; - vuint32_t VIS:1; /* SCM Visability */ - vuint32_t:5; - vuint32_t GTBE:1; /* Global Time Base Enable */ - } B; - } MCR; - - union - { /* COHERENT DUAL-PARAMETER CONTROL */ - vuint32_t R; - struct - { - vuint32_t STS:1; /* Start Status bit */ - vuint32_t CTBASE:5; /* Channel Transfer Base */ - vuint32_t PBASE:10; /* Parameter Buffer Base Address */ - vuint32_t PWIDTH:1; /* Parameter Width */ - vuint32_t PARAM0:7; /* Channel Parameter 0 */ - vuint32_t WR:1; - vuint32_t PARAM1:7; /* Channel Parameter 1 */ - } B; - } CDCR; - - uint32_t etpu_reserved1; - - union - { /* MISC Compare Register */ - uint32_t R; - } MISCCMPR; - - uint32_t etpu_reserved2; - - union - { /* ETPU_A Configuration Register */ - vuint32_t R; - struct - { - vuint32_t FEND:1; /* Force END */ - vuint32_t MDIS:1; /* Low power Stop */ - vuint32_t:1; - vuint32_t STF:1; /* Stop Flag */ - vuint32_t:4; - vuint32_t HLTF:1; /* Halt Mode Flag */ - vuint32_t:4; - vuint32_t FPSCK:3; /* Filter Prescaler Clock Control */ - vuint32_t CDFC:2; - vuint32_t:9; - vuint32_t ETB:5; /* Entry Table Base */ - } B; - } ECR_A; - - union - { /* ETPU_B Configuration Register */ - vuint32_t R; - struct - { - vuint32_t FEND:1; /* Force END */ - vuint32_t MDIS:1; /* Low power Stop */ - vuint32_t:1; - vuint32_t STF:1; /* Stop Flag */ - vuint32_t:4; - vuint32_t HLTF:1; /* Halt Mode Flag */ - vuint32_t:4; - vuint32_t FPSCK:3; /* Filter Prescaler Clock Control */ - vuint32_t CDFC:2; - vuint32_t:9; - vuint32_t ETB:5; /* Entry Table Base */ - } B; - } ECR_B; - - uint32_t etpu_reserved4; - - union - { /* ETPU_A Timebase Configuration Register */ - uint32_t R; - struct - { - uint32_t TCR2CTL:3; /* TCR2 Clock/Gate Control */ - uint32_t TCRCF:2; /* TCRCLK Signal Filter Control */ - uint32_t:1; - uint32_t AM:1; /* Angle Mode */ - uint32_t:3; - uint32_t TCR2P:6; /* TCR2 Prescaler Control */ - uint32_t TCR1CTL:2; /* TCR1 Clock/Gate Control */ - uint32_t:6; - uint32_t TCR1P:8; /* TCR1 Prescaler Control */ - } B; - } TBCR_A; - - union - { /* ETPU_A TCR1 Visibility Register */ - vuint32_t R; - } TB1R_A; - - union - { /* ETPU_A TCR2 Visibility Register */ - vuint32_t R; - } TB2R_A; - - union - { /* ETPU_A STAC Configuration Register */ - vuint32_t R; - struct - { - vuint32_t REN1:1; /* Resource Enable TCR1 */ - vuint32_t RSC1:1; /* Resource Control TCR1 */ - vuint32_t VALID1:1; /* TCR1 Server Valid */ - vuint32_t:9; - vuint32_t SRV1:4; /* Resource Server Slot */ - vuint32_t REN2:1; /* Resource Enable TCR2 */ - vuint32_t RSC2:1; /* Resource Control TCR2 */ - vuint32_t VALID2:1; /* TCR2 Server Valid */ - vuint32_t:9; - vuint32_t SRV2:4; /* Resource Server Slot */ - } B; - } REDCR_A; - - uint32_t etpu_reserved5[4]; - - union - { /* ETPU_B Timebase Configuration Register */ - uint32_t R; - struct - { - uint32_t TCR2CTL:3; /* TCR2 Clock/Gate Control */ - uint32_t TCRCF:2; /* TCRCLK Signal Filter Control */ - uint32_t:1; - uint32_t AM:1; /* Angle Mode */ - uint32_t:3; - uint32_t TCR2P:6; /* TCR2 Prescaler Control */ - uint32_t TCR1CTL:2; /* TCR1 Clock/Gate Control */ - uint32_t:6; - uint32_t TCR1P:8; /* TCR1 Prescaler Control */ - } B; - } TBCR_B; - - union - { /* ETPU_B TCR1 Visibility Register */ - vuint32_t R; - } TB1R_B; - - union - { /* ETPU_B TCR2 Visibility Register */ - vuint32_t R; - } TB2R_B; - - union - { /* ETPU_B STAC Configuration Register */ - vuint32_t R; - struct - { - vuint32_t REN1:1; /* Resource Enable TCR1 */ - vuint32_t RSC1:1; /* Resource Control TCR1 */ - vuint32_t VALID1:1; /* TCR1 Server Valid */ - vuint32_t:9; - vuint32_t SRV1:4; /* Resource Server Slot */ - vuint32_t REN2:1; /* Resource Enable TCR2 */ - vuint32_t RSC2:1; /* Resource Control TCR2 */ - vuint32_t VALID2:1; /* TCR2 Server Valid */ - vuint32_t:9; - vuint32_t SRV2:4; /* Resource Server Slot */ - } B; - } REDCR_B; - - uint32_t etpu_reserved7[108]; - -/*****************************Status and Control Registers**************************/ - - union - { /* ETPU_A Channel Interrut Status */ - vuint32_t R; - struct - { - vuint32_t CIS31:1; /* Channel 31 Interrut Status */ - vuint32_t CIS30:1; /* Channel 30 Interrut Status */ - vuint32_t CIS29:1; /* Channel 29 Interrut Status */ - vuint32_t CIS28:1; /* Channel 28 Interrut Status */ - vuint32_t CIS27:1; /* Channel 27 Interrut Status */ - vuint32_t CIS26:1; /* Channel 26 Interrut Status */ - vuint32_t CIS25:1; /* Channel 25 Interrut Status */ - vuint32_t CIS24:1; /* Channel 24 Interrut Status */ - vuint32_t CIS23:1; /* Channel 23 Interrut Status */ - vuint32_t CIS22:1; /* Channel 22 Interrut Status */ - vuint32_t CIS21:1; /* Channel 21 Interrut Status */ - vuint32_t CIS20:1; /* Channel 20 Interrut Status */ - vuint32_t CIS19:1; /* Channel 19 Interrut Status */ - vuint32_t CIS18:1; /* Channel 18 Interrut Status */ - vuint32_t CIS17:1; /* Channel 17 Interrut Status */ - vuint32_t CIS16:1; /* Channel 16 Interrut Status */ - vuint32_t CIS15:1; /* Channel 15 Interrut Status */ - vuint32_t CIS14:1; /* Channel 14 Interrut Status */ - vuint32_t CIS13:1; /* Channel 13 Interrut Status */ - vuint32_t CIS12:1; /* Channel 12 Interrut Status */ - vuint32_t CIS11:1; /* Channel 11 Interrut Status */ - vuint32_t CIS10:1; /* Channel 10 Interrut Status */ - vuint32_t CIS9:1; /* Channel 9 Interrut Status */ - vuint32_t CIS8:1; /* Channel 8 Interrut Status */ - vuint32_t CIS7:1; /* Channel 7 Interrut Status */ - vuint32_t CIS6:1; /* Channel 6 Interrut Status */ - vuint32_t CIS5:1; /* Channel 5 Interrut Status */ - vuint32_t CIS4:1; /* Channel 4 Interrut Status */ - vuint32_t CIS3:1; /* Channel 3 Interrut Status */ - vuint32_t CIS2:1; /* Channel 2 Interrut Status */ - vuint32_t CIS1:1; /* Channel 1 Interrut Status */ - vuint32_t CIS0:1; /* Channel 0 Interrut Status */ - } B; - } CISR_A; - - union - { /* ETPU_B Channel Interruput Status */ - vuint32_t R; - struct - { - vuint32_t CIS31:1; /* Channel 31 Interrut Status */ - vuint32_t CIS30:1; /* Channel 30 Interrut Status */ - vuint32_t CIS29:1; /* Channel 29 Interrut Status */ - vuint32_t CIS28:1; /* Channel 28 Interrut Status */ - vuint32_t CIS27:1; /* Channel 27 Interrut Status */ - vuint32_t CIS26:1; /* Channel 26 Interrut Status */ - vuint32_t CIS25:1; /* Channel 25 Interrut Status */ - vuint32_t CIS24:1; /* Channel 24 Interrut Status */ - vuint32_t CIS23:1; /* Channel 23 Interrut Status */ - vuint32_t CIS22:1; /* Channel 22 Interrut Status */ - vuint32_t CIS21:1; /* Channel 21 Interrut Status */ - vuint32_t CIS20:1; /* Channel 20 Interrut Status */ - vuint32_t CIS19:1; /* Channel 19 Interrut Status */ - vuint32_t CIS18:1; /* Channel 18 Interrut Status */ - vuint32_t CIS17:1; /* Channel 17 Interrut Status */ - vuint32_t CIS16:1; /* Channel 16 Interrut Status */ - vuint32_t CIS15:1; /* Channel 15 Interrut Status */ - vuint32_t CIS14:1; /* Channel 14 Interrut Status */ - vuint32_t CIS13:1; /* Channel 13 Interrut Status */ - vuint32_t CIS12:1; /* Channel 12 Interrut Status */ - vuint32_t CIS11:1; /* Channel 11 Interrut Status */ - vuint32_t CIS10:1; /* Channel 10 Interrut Status */ - vuint32_t CIS9:1; /* Channel 9 Interrut Status */ - vuint32_t CIS8:1; /* Channel 8 Interrut Status */ - vuint32_t CIS7:1; /* Channel 7 Interrut Status */ - vuint32_t CIS6:1; /* Channel 6 Interrut Status */ - vuint32_t CIS5:1; /* Channel 5 Interrut Status */ - vuint32_t CIS4:1; /* Channel 4 Interrut Status */ - vuint32_t CIS3:1; /* Channel 3 Interrut Status */ - vuint32_t CIS2:1; /* Channel 2 Interrut Status */ - vuint32_t CIS1:1; /* Channel 1 Interrupt Status */ - vuint32_t CIS0:1; /* Channel 0 Interrupt Status */ - } B; - } CISR_B; - - uint32_t etpu_reserved9[2]; - - union - { /* ETPU_A Data Transfer Request Status */ - vuint32_t R; - struct - { - vuint32_t DTRS31:1; /* Channel 31 Data Transfer Request Status */ - vuint32_t DTRS30:1; /* Channel 30 Data Transfer Request Status */ - vuint32_t DTRS29:1; /* Channel 29 Data Transfer Request Status */ - vuint32_t DTRS28:1; /* Channel 28 Data Transfer Request Status */ - vuint32_t DTRS27:1; /* Channel 27 Data Transfer Request Status */ - vuint32_t DTRS26:1; /* Channel 26 Data Transfer Request Status */ - vuint32_t DTRS25:1; /* Channel 25 Data Transfer Request Status */ - vuint32_t DTRS24:1; /* Channel 24 Data Transfer Request Status */ - vuint32_t DTRS23:1; /* Channel 23 Data Transfer Request Status */ - vuint32_t DTRS22:1; /* Channel 22 Data Transfer Request Status */ - vuint32_t DTRS21:1; /* Channel 21 Data Transfer Request Status */ - vuint32_t DTRS20:1; /* Channel 20 Data Transfer Request Status */ - vuint32_t DTRS19:1; /* Channel 19 Data Transfer Request Status */ - vuint32_t DTRS18:1; /* Channel 18 Data Transfer Request Status */ - vuint32_t DTRS17:1; /* Channel 17 Data Transfer Request Status */ - vuint32_t DTRS16:1; /* Channel 16 Data Transfer Request Status */ - vuint32_t DTRS15:1; /* Channel 15 Data Transfer Request Status */ - vuint32_t DTRS14:1; /* Channel 14 Data Transfer Request Status */ - vuint32_t DTRS13:1; /* Channel 13 Data Transfer Request Status */ - vuint32_t DTRS12:1; /* Channel 12 Data Transfer Request Status */ - vuint32_t DTRS11:1; /* Channel 11 Data Transfer Request Status */ - vuint32_t DTRS10:1; /* Channel 10 Data Transfer Request Status */ - vuint32_t DTRS9:1; /* Channel 9 Data Transfer Request Status */ - vuint32_t DTRS8:1; /* Channel 8 Data Transfer Request Status */ - vuint32_t DTRS7:1; /* Channel 7 Data Transfer Request Status */ - vuint32_t DTRS6:1; /* Channel 6 Data Transfer Request Status */ - vuint32_t DTRS5:1; /* Channel 5 Data Transfer Request Status */ - vuint32_t DTRS4:1; /* Channel 4 Data Transfer Request Status */ - vuint32_t DTRS3:1; /* Channel 3 Data Transfer Request Status */ - vuint32_t DTRS2:1; /* Channel 2 Data Transfer Request Status */ - vuint32_t DTRS1:1; /* Channel 1 Data Transfer Request Status */ - vuint32_t DTRS0:1; /* Channel 0 Data Transfer Request Status */ - } B; - } CDTRSR_A; - - union - { /* ETPU_B Data Transfer Request Status */ - vuint32_t R; - struct - { - vuint32_t DTRS31:1; /* Channel 31 Data Transfer Request Status */ - vuint32_t DTRS30:1; /* Channel 30 Data Transfer Request Status */ - vuint32_t DTRS29:1; /* Channel 29 Data Transfer Request Status */ - vuint32_t DTRS28:1; /* Channel 28 Data Transfer Request Status */ - vuint32_t DTRS27:1; /* Channel 27 Data Transfer Request Status */ - vuint32_t DTRS26:1; /* Channel 26 Data Transfer Request Status */ - vuint32_t DTRS25:1; /* Channel 25 Data Transfer Request Status */ - vuint32_t DTRS24:1; /* Channel 24 Data Transfer Request Status */ - vuint32_t DTRS23:1; /* Channel 23 Data Transfer Request Status */ - vuint32_t DTRS22:1; /* Channel 22 Data Transfer Request Status */ - vuint32_t DTRS21:1; /* Channel 21 Data Transfer Request Status */ - vuint32_t DTRS20:1; /* Channel 20 Data Transfer Request Status */ - vuint32_t DTRS19:1; /* Channel 19 Data Transfer Request Status */ - vuint32_t DTRS18:1; /* Channel 18 Data Transfer Request Status */ - vuint32_t DTRS17:1; /* Channel 17 Data Transfer Request Status */ - vuint32_t DTRS16:1; /* Channel 16 Data Transfer Request Status */ - vuint32_t DTRS15:1; /* Channel 15 Data Transfer Request Status */ - vuint32_t DTRS14:1; /* Channel 14 Data Transfer Request Status */ - vuint32_t DTRS13:1; /* Channel 13 Data Transfer Request Status */ - vuint32_t DTRS12:1; /* Channel 12 Data Transfer Request Status */ - vuint32_t DTRS11:1; /* Channel 11 Data Transfer Request Status */ - vuint32_t DTRS10:1; /* Channel 10 Data Transfer Request Status */ - vuint32_t DTRS9:1; /* Channel 9 Data Transfer Request Status */ - vuint32_t DTRS8:1; /* Channel 8 Data Transfer Request Status */ - vuint32_t DTRS7:1; /* Channel 7 Data Transfer Request Status */ - vuint32_t DTRS6:1; /* Channel 6 Data Transfer Request Status */ - vuint32_t DTRS5:1; /* Channel 5 Data Transfer Request Status */ - vuint32_t DTRS4:1; /* Channel 4 Data Transfer Request Status */ - vuint32_t DTRS3:1; /* Channel 3 Data Transfer Request Status */ - vuint32_t DTRS2:1; /* Channel 2 Data Transfer Request Status */ - vuint32_t DTRS1:1; /* Channel 1 Data Transfer Request Status */ - vuint32_t DTRS0:1; /* Channel 0 Data Transfer Request Status */ - } B; - } CDTRSR_B; - - uint32_t etpu_reserved11[2]; - - union - { /* ETPU_A Interruput Overflow Status */ - vuint32_t R; - struct - { - vuint32_t CIOS31:1; /* Channel 31 Interruput Overflow Status */ - vuint32_t CIOS30:1; /* Channel 30 Interruput Overflow Status */ - vuint32_t CIOS29:1; /* Channel 29 Interruput Overflow Status */ - vuint32_t CIOS28:1; /* Channel 28 Interruput Overflow Status */ - vuint32_t CIOS27:1; /* Channel 27 Interruput Overflow Status */ - vuint32_t CIOS26:1; /* Channel 26 Interruput Overflow Status */ - vuint32_t CIOS25:1; /* Channel 25 Interruput Overflow Status */ - vuint32_t CIOS24:1; /* Channel 24 Interruput Overflow Status */ - vuint32_t CIOS23:1; /* Channel 23 Interruput Overflow Status */ - vuint32_t CIOS22:1; /* Channel 22 Interruput Overflow Status */ - vuint32_t CIOS21:1; /* Channel 21 Interruput Overflow Status */ - vuint32_t CIOS20:1; /* Channel 20 Interruput Overflow Status */ - vuint32_t CIOS19:1; /* Channel 19 Interruput Overflow Status */ - vuint32_t CIOS18:1; /* Channel 18 Interruput Overflow Status */ - vuint32_t CIOS17:1; /* Channel 17 Interruput Overflow Status */ - vuint32_t CIOS16:1; /* Channel 16 Interruput Overflow Status */ - vuint32_t CIOS15:1; /* Channel 15 Interruput Overflow Status */ - vuint32_t CIOS14:1; /* Channel 14 Interruput Overflow Status */ - vuint32_t CIOS13:1; /* Channel 13 Interruput Overflow Status */ - vuint32_t CIOS12:1; /* Channel 12 Interruput Overflow Status */ - vuint32_t CIOS11:1; /* Channel 11 Interruput Overflow Status */ - vuint32_t CIOS10:1; /* Channel 10 Interruput Overflow Status */ - vuint32_t CIOS9:1; /* Channel 9 Interruput Overflow Status */ - vuint32_t CIOS8:1; /* Channel 8 Interruput Overflow Status */ - vuint32_t CIOS7:1; /* Channel 7 Interruput Overflow Status */ - vuint32_t CIOS6:1; /* Channel 6 Interruput Overflow Status */ - vuint32_t CIOS5:1; /* Channel 5 Interruput Overflow Status */ - vuint32_t CIOS4:1; /* Channel 4 Interruput Overflow Status */ - vuint32_t CIOS3:1; /* Channel 3 Interruput Overflow Status */ - vuint32_t CIOS2:1; /* Channel 2 Interruput Overflow Status */ - vuint32_t CIOS1:1; /* Channel 1 Interruput Overflow Status */ - vuint32_t CIOS0:1; /* Channel 0 Interruput Overflow Status */ - } B; - } CIOSR_A; - - union - { /* ETPU_B Interruput Overflow Status */ - vuint32_t R; - struct - { - vuint32_t CIOS31:1; /* Channel 31 Interruput Overflow Status */ - vuint32_t CIOS30:1; /* Channel 30 Interruput Overflow Status */ - vuint32_t CIOS29:1; /* Channel 29 Interruput Overflow Status */ - vuint32_t CIOS28:1; /* Channel 28 Interruput Overflow Status */ - vuint32_t CIOS27:1; /* Channel 27 Interruput Overflow Status */ - vuint32_t CIOS26:1; /* Channel 26 Interruput Overflow Status */ - vuint32_t CIOS25:1; /* Channel 25 Interruput Overflow Status */ - vuint32_t CIOS24:1; /* Channel 24 Interruput Overflow Status */ - vuint32_t CIOS23:1; /* Channel 23 Interruput Overflow Status */ - vuint32_t CIOS22:1; /* Channel 22 Interruput Overflow Status */ - vuint32_t CIOS21:1; /* Channel 21 Interruput Overflow Status */ - vuint32_t CIOS20:1; /* Channel 20 Interruput Overflow Status */ - vuint32_t CIOS19:1; /* Channel 19 Interruput Overflow Status */ - vuint32_t CIOS18:1; /* Channel 18 Interruput Overflow Status */ - vuint32_t CIOS17:1; /* Channel 17 Interruput Overflow Status */ - vuint32_t CIOS16:1; /* Channel 16 Interruput Overflow Status */ - vuint32_t CIOS15:1; /* Channel 15 Interruput Overflow Status */ - vuint32_t CIOS14:1; /* Channel 14 Interruput Overflow Status */ - vuint32_t CIOS13:1; /* Channel 13 Interruput Overflow Status */ - vuint32_t CIOS12:1; /* Channel 12 Interruput Overflow Status */ - vuint32_t CIOS11:1; /* Channel 11 Interruput Overflow Status */ - vuint32_t CIOS10:1; /* Channel 10 Interruput Overflow Status */ - vuint32_t CIOS9:1; /* Channel 9 Interruput Overflow Status */ - vuint32_t CIOS8:1; /* Channel 8 Interruput Overflow Status */ - vuint32_t CIOS7:1; /* Channel 7 Interruput Overflow Status */ - vuint32_t CIOS6:1; /* Channel 6 Interruput Overflow Status */ - vuint32_t CIOS5:1; /* Channel 5 Interruput Overflow Status */ - vuint32_t CIOS4:1; /* Channel 4 Interruput Overflow Status */ - vuint32_t CIOS3:1; /* Channel 3 Interruput Overflow Status */ - vuint32_t CIOS2:1; /* Channel 2 Interruput Overflow Status */ - vuint32_t CIOS1:1; /* Channel 1 Interruput Overflow Status */ - vuint32_t CIOS0:1; /* Channel 0 Interruput Overflow Status */ - } B; - } CIOSR_B; - - uint32_t etpu_reserved13[2]; - - union - { /* ETPU_A Data Transfer Overflow Status */ - vuint32_t R; - struct - { - vuint32_t DTROS31:1; /* Channel 31 Data Transfer Overflow Status */ - vuint32_t DTROS30:1; /* Channel 30 Data Transfer Overflow Status */ - vuint32_t DTROS29:1; /* Channel 29 Data Transfer Overflow Status */ - vuint32_t DTROS28:1; /* Channel 28 Data Transfer Overflow Status */ - vuint32_t DTROS27:1; /* Channel 27 Data Transfer Overflow Status */ - vuint32_t DTROS26:1; /* Channel 26 Data Transfer Overflow Status */ - vuint32_t DTROS25:1; /* Channel 25 Data Transfer Overflow Status */ - vuint32_t DTROS24:1; /* Channel 24 Data Transfer Overflow Status */ - vuint32_t DTROS23:1; /* Channel 23 Data Transfer Overflow Status */ - vuint32_t DTROS22:1; /* Channel 22 Data Transfer Overflow Status */ - vuint32_t DTROS21:1; /* Channel 21 Data Transfer Overflow Status */ - vuint32_t DTROS20:1; /* Channel 20 Data Transfer Overflow Status */ - vuint32_t DTROS19:1; /* Channel 19 Data Transfer Overflow Status */ - vuint32_t DTROS18:1; /* Channel 18 Data Transfer Overflow Status */ - vuint32_t DTROS17:1; /* Channel 17 Data Transfer Overflow Status */ - vuint32_t DTROS16:1; /* Channel 16 Data Transfer Overflow Status */ - vuint32_t DTROS15:1; /* Channel 15 Data Transfer Overflow Status */ - vuint32_t DTROS14:1; /* Channel 14 Data Transfer Overflow Status */ - vuint32_t DTROS13:1; /* Channel 13 Data Transfer Overflow Status */ - vuint32_t DTROS12:1; /* Channel 12 Data Transfer Overflow Status */ - vuint32_t DTROS11:1; /* Channel 11 Data Transfer Overflow Status */ - vuint32_t DTROS10:1; /* Channel 10 Data Transfer Overflow Status */ - vuint32_t DTROS9:1; /* Channel 9 Data Transfer Overflow Status */ - vuint32_t DTROS8:1; /* Channel 8 Data Transfer Overflow Status */ - vuint32_t DTROS7:1; /* Channel 7 Data Transfer Overflow Status */ - vuint32_t DTROS6:1; /* Channel 6 Data Transfer Overflow Status */ - vuint32_t DTROS5:1; /* Channel 5 Data Transfer Overflow Status */ - vuint32_t DTROS4:1; /* Channel 4 Data Transfer Overflow Status */ - vuint32_t DTROS3:1; /* Channel 3 Data Transfer Overflow Status */ - vuint32_t DTROS2:1; /* Channel 2 Data Transfer Overflow Status */ - vuint32_t DTROS1:1; /* Channel 1 Data Transfer Overflow Status */ - vuint32_t DTROS0:1; /* Channel 0 Data Transfer Overflow Status */ - } B; - } CDTROSR_A; - - union - { /* ETPU_B Data Transfer Overflow Status */ - vuint32_t R; - struct - { - vuint32_t DTROS31:1; /* Channel 31 Data Transfer Overflow Status */ - vuint32_t DTROS30:1; /* Channel 30 Data Transfer Overflow Status */ - vuint32_t DTROS29:1; /* Channel 29 Data Transfer Overflow Status */ - vuint32_t DTROS28:1; /* Channel 28 Data Transfer Overflow Status */ - vuint32_t DTROS27:1; /* Channel 27 Data Transfer Overflow Status */ - vuint32_t DTROS26:1; /* Channel 26 Data Transfer Overflow Status */ - vuint32_t DTROS25:1; /* Channel 25 Data Transfer Overflow Status */ - vuint32_t DTROS24:1; /* Channel 24 Data Transfer Overflow Status */ - vuint32_t DTROS23:1; /* Channel 23 Data Transfer Overflow Status */ - vuint32_t DTROS22:1; /* Channel 22 Data Transfer Overflow Status */ - vuint32_t DTROS21:1; /* Channel 21 Data Transfer Overflow Status */ - vuint32_t DTROS20:1; /* Channel 20 Data Transfer Overflow Status */ - vuint32_t DTROS19:1; /* Channel 19 Data Transfer Overflow Status */ - vuint32_t DTROS18:1; /* Channel 18 Data Transfer Overflow Status */ - vuint32_t DTROS17:1; /* Channel 17 Data Transfer Overflow Status */ - vuint32_t DTROS16:1; /* Channel 16 Data Transfer Overflow Status */ - vuint32_t DTROS15:1; /* Channel 15 Data Transfer Overflow Status */ - vuint32_t DTROS14:1; /* Channel 14 Data Transfer Overflow Status */ - vuint32_t DTROS13:1; /* Channel 13 Data Transfer Overflow Status */ - vuint32_t DTROS12:1; /* Channel 12 Data Transfer Overflow Status */ - vuint32_t DTROS11:1; /* Channel 11 Data Transfer Overflow Status */ - vuint32_t DTROS10:1; /* Channel 10 Data Transfer Overflow Status */ - vuint32_t DTROS9:1; /* Channel 9 Data Transfer Overflow Status */ - vuint32_t DTROS8:1; /* Channel 8 Data Transfer Overflow Status */ - vuint32_t DTROS7:1; /* Channel 7 Data Transfer Overflow Status */ - vuint32_t DTROS6:1; /* Channel 6 Data Transfer Overflow Status */ - vuint32_t DTROS5:1; /* Channel 5 Data Transfer Overflow Status */ - vuint32_t DTROS4:1; /* Channel 4 Data Transfer Overflow Status */ - vuint32_t DTROS3:1; /* Channel 3 Data Transfer Overflow Status */ - vuint32_t DTROS2:1; /* Channel 2 Data Transfer Overflow Status */ - vuint32_t DTROS1:1; /* Channel 1 Data Transfer Overflow Status */ - vuint32_t DTROS0:1; /* Channel 0 Data Transfer Overflow Status */ - } B; - } CDTROSR_B; - - uint32_t etpu_reserved15[2]; - - union - { /* ETPU_A Channel Interruput Enable */ - vuint32_t R; - struct - { - vuint32_t CIE31:1; /* Channel 31 Interruput Enable */ - vuint32_t CIE30:1; /* Channel 30 Interruput Enable */ - vuint32_t CIE29:1; /* Channel 29 Interruput Enable */ - vuint32_t CIE28:1; /* Channel 28 Interruput Enable */ - vuint32_t CIE27:1; /* Channel 27 Interruput Enable */ - vuint32_t CIE26:1; /* Channel 26 Interruput Enable */ - vuint32_t CIE25:1; /* Channel 25 Interruput Enable */ - vuint32_t CIE24:1; /* Channel 24 Interruput Enable */ - vuint32_t CIE23:1; /* Channel 23 Interruput Enable */ - vuint32_t CIE22:1; /* Channel 22 Interruput Enable */ - vuint32_t CIE21:1; /* Channel 21 Interruput Enable */ - vuint32_t CIE20:1; /* Channel 20 Interruput Enable */ - vuint32_t CIE19:1; /* Channel 19 Interruput Enable */ - vuint32_t CIE18:1; /* Channel 18 Interruput Enable */ - vuint32_t CIE17:1; /* Channel 17 Interruput Enable */ - vuint32_t CIE16:1; /* Channel 16 Interruput Enable */ - vuint32_t CIE15:1; /* Channel 15 Interruput Enable */ - vuint32_t CIE14:1; /* Channel 14 Interruput Enable */ - vuint32_t CIE13:1; /* Channel 13 Interruput Enable */ - vuint32_t CIE12:1; /* Channel 12 Interruput Enable */ - vuint32_t CIE11:1; /* Channel 11 Interruput Enable */ - vuint32_t CIE10:1; /* Channel 10 Interruput Enable */ - vuint32_t CIE9:1; /* Channel 9 Interruput Enable */ - vuint32_t CIE8:1; /* Channel 8 Interruput Enable */ - vuint32_t CIE7:1; /* Channel 7 Interruput Enable */ - vuint32_t CIE6:1; /* Channel 6 Interruput Enable */ - vuint32_t CIE5:1; /* Channel 5 Interruput Enable */ - vuint32_t CIE4:1; /* Channel 4 Interruput Enable */ - vuint32_t CIE3:1; /* Channel 3 Interruput Enable */ - vuint32_t CIE2:1; /* Channel 2 Interruput Enable */ - vuint32_t CIE1:1; /* Channel 1 Interruput Enable */ - vuint32_t CIE0:1; /* Channel 0 Interruput Enable */ - } B; - } CIER_A; - - union - { /* ETPU_B Channel Interruput Enable */ - vuint32_t R; - struct - { - vuint32_t CIE31:1; /* Channel 31 Interruput Enable */ - vuint32_t CIE30:1; /* Channel 30 Interruput Enable */ - vuint32_t CIE29:1; /* Channel 29 Interruput Enable */ - vuint32_t CIE28:1; /* Channel 28 Interruput Enable */ - vuint32_t CIE27:1; /* Channel 27 Interruput Enable */ - vuint32_t CIE26:1; /* Channel 26 Interruput Enable */ - vuint32_t CIE25:1; /* Channel 25 Interruput Enable */ - vuint32_t CIE24:1; /* Channel 24 Interruput Enable */ - vuint32_t CIE23:1; /* Channel 23 Interruput Enable */ - vuint32_t CIE22:1; /* Channel 22 Interruput Enable */ - vuint32_t CIE21:1; /* Channel 21 Interruput Enable */ - vuint32_t CIE20:1; /* Channel 20 Interruput Enable */ - vuint32_t CIE19:1; /* Channel 19 Interruput Enable */ - vuint32_t CIE18:1; /* Channel 18 Interruput Enable */ - vuint32_t CIE17:1; /* Channel 17 Interruput Enable */ - vuint32_t CIE16:1; /* Channel 16 Interruput Enable */ - vuint32_t CIE15:1; /* Channel 15 Interruput Enable */ - vuint32_t CIE14:1; /* Channel 14 Interruput Enable */ - vuint32_t CIE13:1; /* Channel 13 Interruput Enable */ - vuint32_t CIE12:1; /* Channel 12 Interruput Enable */ - vuint32_t CIE11:1; /* Channel 11 Interruput Enable */ - vuint32_t CIE10:1; /* Channel 10 Interruput Enable */ - vuint32_t CIE9:1; /* Channel 9 Interruput Enable */ - vuint32_t CIE8:1; /* Channel 8 Interruput Enable */ - vuint32_t CIE7:1; /* Channel 7 Interruput Enable */ - vuint32_t CIE6:1; /* Channel 6 Interruput Enable */ - vuint32_t CIE5:1; /* Channel 5 Interruput Enable */ - vuint32_t CIE4:1; /* Channel 4 Interruput Enable */ - vuint32_t CIE3:1; /* Channel 3 Interruput Enable */ - vuint32_t CIE2:1; /* Channel 2 Interruput Enable */ - vuint32_t CIE1:1; /* Channel 1 Interruput Enable */ - vuint32_t CIE0:1; /* Channel 0 Interruput Enable */ - } B; - } CIER_B; - - uint32_t etpu_reserved17[2]; - - union - { /* ETPU_A Channel Data Transfer Request Enable */ - vuint32_t R; - struct - { - vuint32_t DTRE31:1; /* Channel 31 Data Transfer Request Enable */ - vuint32_t DTRE30:1; /* Channel 30 Data Transfer Request Enable */ - vuint32_t DTRE29:1; /* Channel 29 Data Transfer Request Enable */ - vuint32_t DTRE28:1; /* Channel 28 Data Transfer Request Enable */ - vuint32_t DTRE27:1; /* Channel 27 Data Transfer Request Enable */ - vuint32_t DTRE26:1; /* Channel 26 Data Transfer Request Enable */ - vuint32_t DTRE25:1; /* Channel 25 Data Transfer Request Enable */ - vuint32_t DTRE24:1; /* Channel 24 Data Transfer Request Enable */ - vuint32_t DTRE23:1; /* Channel 23 Data Transfer Request Enable */ - vuint32_t DTRE22:1; /* Channel 22 Data Transfer Request Enable */ - vuint32_t DTRE21:1; /* Channel 21 Data Transfer Request Enable */ - vuint32_t DTRE20:1; /* Channel 20 Data Transfer Request Enable */ - vuint32_t DTRE19:1; /* Channel 19 Data Transfer Request Enable */ - vuint32_t DTRE18:1; /* Channel 18 Data Transfer Request Enable */ - vuint32_t DTRE17:1; /* Channel 17 Data Transfer Request Enable */ - vuint32_t DTRE16:1; /* Channel 16 Data Transfer Request Enable */ - vuint32_t DTRE15:1; /* Channel 15 Data Transfer Request Enable */ - vuint32_t DTRE14:1; /* Channel 14 Data Transfer Request Enable */ - vuint32_t DTRE13:1; /* Channel 13 Data Transfer Request Enable */ - vuint32_t DTRE12:1; /* Channel 12 Data Transfer Request Enable */ - vuint32_t DTRE11:1; /* Channel 11 Data Transfer Request Enable */ - vuint32_t DTRE10:1; /* Channel 10 Data Transfer Request Enable */ - vuint32_t DTRE9:1; /* Channel 9 Data Transfer Request Enable */ - vuint32_t DTRE8:1; /* Channel 8 Data Transfer Request Enable */ - vuint32_t DTRE7:1; /* Channel 7 Data Transfer Request Enable */ - vuint32_t DTRE6:1; /* Channel 6 Data Transfer Request Enable */ - vuint32_t DTRE5:1; /* Channel 5 Data Transfer Request Enable */ - vuint32_t DTRE4:1; /* Channel 4 Data Transfer Request Enable */ - vuint32_t DTRE3:1; /* Channel 3 Data Transfer Request Enable */ - vuint32_t DTRE2:1; /* Channel 2 Data Transfer Request Enable */ - vuint32_t DTRE1:1; /* Channel 1 Data Transfer Request Enable */ - vuint32_t DTRE0:1; /* Channel 0 Data Transfer Request Enable */ - } B; - } CDTRER_A; - - union - { /* ETPU_B Channel Data Transfer Request Enable */ - vuint32_t R; - struct - { - vuint32_t DTRE31:1; /* Channel 31 Data Transfer Request Enable */ - vuint32_t DTRE30:1; /* Channel 30 Data Transfer Request Enable */ - vuint32_t DTRE29:1; /* Channel 29 Data Transfer Request Enable */ - vuint32_t DTRE28:1; /* Channel 28 Data Transfer Request Enable */ - vuint32_t DTRE27:1; /* Channel 27 Data Transfer Request Enable */ - vuint32_t DTRE26:1; /* Channel 26 Data Transfer Request Enable */ - vuint32_t DTRE25:1; /* Channel 25 Data Transfer Request Enable */ - vuint32_t DTRE24:1; /* Channel 24 Data Transfer Request Enable */ - vuint32_t DTRE23:1; /* Channel 23 Data Transfer Request Enable */ - vuint32_t DTRE22:1; /* Channel 22 Data Transfer Request Enable */ - vuint32_t DTRE21:1; /* Channel 21 Data Transfer Request Enable */ - vuint32_t DTRE20:1; /* Channel 20 Data Transfer Request Enable */ - vuint32_t DTRE19:1; /* Channel 19 Data Transfer Request Enable */ - vuint32_t DTRE18:1; /* Channel 18 Data Transfer Request Enable */ - vuint32_t DTRE17:1; /* Channel 17 Data Transfer Request Enable */ - vuint32_t DTRE16:1; /* Channel 16 Data Transfer Request Enable */ - vuint32_t DTRE15:1; /* Channel 15 Data Transfer Request Enable */ - vuint32_t DTRE14:1; /* Channel 14 Data Transfer Request Enable */ - vuint32_t DTRE13:1; /* Channel 13 Data Transfer Request Enable */ - vuint32_t DTRE12:1; /* Channel 12 Data Transfer Request Enable */ - vuint32_t DTRE11:1; /* Channel 11 Data Transfer Request Enable */ - vuint32_t DTRE10:1; /* Channel 10 Data Transfer Request Enable */ - vuint32_t DTRE9:1; /* Channel 9 Data Transfer Request Enable */ - vuint32_t DTRE8:1; /* Channel 8 Data Transfer Request Enable */ - vuint32_t DTRE7:1; /* Channel 7 Data Transfer Request Enable */ - vuint32_t DTRE6:1; /* Channel 6 Data Transfer Request Enable */ - vuint32_t DTRE5:1; /* Channel 5 Data Transfer Request Enable */ - vuint32_t DTRE4:1; /* Channel 4 Data Transfer Request Enable */ - vuint32_t DTRE3:1; /* Channel 3 Data Transfer Request Enable */ - vuint32_t DTRE2:1; /* Channel 2 Data Transfer Request Enable */ - vuint32_t DTRE1:1; /* Channel 1 Data Transfer Request Enable */ - vuint32_t DTRE0:1; /* Channel 0 Data Transfer Request Enable */ - } B; - } CDTRER_B; - - uint32_t etpu_reserved20[10]; - union - { /* ETPU_A Channel Pending Service Status */ - vuint32_t R; - struct - { - vuint32_t SR31:1; /* Channel 31 Pending Service Status */ - vuint32_t SR30:1; /* Channel 30 Pending Service Status */ - vuint32_t SR29:1; /* Channel 29 Pending Service Status */ - vuint32_t SR28:1; /* Channel 28 Pending Service Status */ - vuint32_t SR27:1; /* Channel 27 Pending Service Status */ - vuint32_t SR26:1; /* Channel 26 Pending Service Status */ - vuint32_t SR25:1; /* Channel 25 Pending Service Status */ - vuint32_t SR24:1; /* Channel 24 Pending Service Status */ - vuint32_t SR23:1; /* Channel 23 Pending Service Status */ - vuint32_t SR22:1; /* Channel 22 Pending Service Status */ - vuint32_t SR21:1; /* Channel 21 Pending Service Status */ - vuint32_t SR20:1; /* Channel 20 Pending Service Status */ - vuint32_t SR19:1; /* Channel 19 Pending Service Status */ - vuint32_t SR18:1; /* Channel 18 Pending Service Status */ - vuint32_t SR17:1; /* Channel 17 Pending Service Status */ - vuint32_t SR16:1; /* Channel 16 Pending Service Status */ - vuint32_t SR15:1; /* Channel 15 Pending Service Status */ - vuint32_t SR14:1; /* Channel 14 Pending Service Status */ - vuint32_t SR13:1; /* Channel 13 Pending Service Status */ - vuint32_t SR12:1; /* Channel 12 Pending Service Status */ - vuint32_t SR11:1; /* Channel 11 Pending Service Status */ - vuint32_t SR10:1; /* Channel 10 Pending Service Status */ - vuint32_t SR9:1; /* Channel 9 Pending Service Status */ - vuint32_t SR8:1; /* Channel 8 Pending Service Status */ - vuint32_t SR7:1; /* Channel 7 Pending Service Status */ - vuint32_t SR6:1; /* Channel 6 Pending Service Status */ - vuint32_t SR5:1; /* Channel 5 Pending Service Status */ - vuint32_t SR4:1; /* Channel 4 Pending Service Status */ - vuint32_t SR3:1; /* Channel 3 Pending Service Status */ - vuint32_t SR2:1; /* Channel 2 Pending Service Status */ - vuint32_t SR1:1; /* Channel 1 Pending Service Status */ - vuint32_t SR0:1; /* Channel 0 Pending Service Status */ - } B; - } CPSSR_A; - - union - { /* ETPU_B Channel Pending Service Status */ - vuint32_t R; - struct - { - vuint32_t SR31:1; /* Channel 31 Pending Service Status */ - vuint32_t SR30:1; /* Channel 30 Pending Service Status */ - vuint32_t SR29:1; /* Channel 29 Pending Service Status */ - vuint32_t SR28:1; /* Channel 28 Pending Service Status */ - vuint32_t SR27:1; /* Channel 27 Pending Service Status */ - vuint32_t SR26:1; /* Channel 26 Pending Service Status */ - vuint32_t SR25:1; /* Channel 25 Pending Service Status */ - vuint32_t SR24:1; /* Channel 24 Pending Service Status */ - vuint32_t SR23:1; /* Channel 23 Pending Service Status */ - vuint32_t SR22:1; /* Channel 22 Pending Service Status */ - vuint32_t SR21:1; /* Channel 21 Pending Service Status */ - vuint32_t SR20:1; /* Channel 20 Pending Service Status */ - vuint32_t SR19:1; /* Channel 19 Pending Service Status */ - vuint32_t SR18:1; /* Channel 18 Pending Service Status */ - vuint32_t SR17:1; /* Channel 17 Pending Service Status */ - vuint32_t SR16:1; /* Channel 16 Pending Service Status */ - vuint32_t SR15:1; /* Channel 15 Pending Service Status */ - vuint32_t SR14:1; /* Channel 14 Pending Service Status */ - vuint32_t SR13:1; /* Channel 13 Pending Service Status */ - vuint32_t SR12:1; /* Channel 12 Pending Service Status */ - vuint32_t SR11:1; /* Channel 11 Pending Service Status */ - vuint32_t SR10:1; /* Channel 10 Pending Service Status */ - vuint32_t SR9:1; /* Channel 9 Pending Service Status */ - vuint32_t SR8:1; /* Channel 8 Pending Service Status */ - vuint32_t SR7:1; /* Channel 7 Pending Service Status */ - vuint32_t SR6:1; /* Channel 6 Pending Service Status */ - vuint32_t SR5:1; /* Channel 5 Pending Service Status */ - vuint32_t SR4:1; /* Channel 4 Pending Service Status */ - vuint32_t SR3:1; /* Channel 3 Pending Service Status */ - vuint32_t SR2:1; /* Channel 2 Pending Service Status */ - vuint32_t SR1:1; /* Channel 1 Pending Service Status */ - vuint32_t SR0:1; /* Channel 0 Pending Service Status */ - } B; - } CPSSR_B; - - uint32_t etpu_reserved20a[2]; - - union - { /* ETPU_A Channel Service Status */ - vuint32_t R; - struct - { - vuint32_t SS31:1; /* Channel 31 Service Status */ - vuint32_t SS30:1; /* Channel 30 Service Status */ - vuint32_t SS29:1; /* Channel 29 Service Status */ - vuint32_t SS28:1; /* Channel 28 Service Status */ - vuint32_t SS27:1; /* Channel 27 Service Status */ - vuint32_t SS26:1; /* Channel 26 Service Status */ - vuint32_t SS25:1; /* Channel 25 Service Status */ - vuint32_t SS24:1; /* Channel 24 Service Status */ - vuint32_t SS23:1; /* Channel 23 Service Status */ - vuint32_t SS22:1; /* Channel 22 Service Status */ - vuint32_t SS21:1; /* Channel 21 Service Status */ - vuint32_t SS20:1; /* Channel 20 Service Status */ - vuint32_t SS19:1; /* Channel 19 Service Status */ - vuint32_t SS18:1; /* Channel 18 Service Status */ - vuint32_t SS17:1; /* Channel 17 Service Status */ - vuint32_t SS16:1; /* Channel 16 Service Status */ - vuint32_t SS15:1; /* Channel 15 Service Status */ - vuint32_t SS14:1; /* Channel 14 Service Status */ - vuint32_t SS13:1; /* Channel 13 Service Status */ - vuint32_t SS12:1; /* Channel 12 Service Status */ - vuint32_t SS11:1; /* Channel 11 Service Status */ - vuint32_t SS10:1; /* Channel 10 Service Status */ - vuint32_t SS9:1; /* Channel 9 Service Status */ - vuint32_t SS8:1; /* Channel 8 Service Status */ - vuint32_t SS7:1; /* Channel 7 Service Status */ - vuint32_t SS6:1; /* Channel 6 Service Status */ - vuint32_t SS5:1; /* Channel 5 Service Status */ - vuint32_t SS4:1; /* Channel 4 Service Status */ - vuint32_t SS3:1; /* Channel 3 Service Status */ - vuint32_t SS2:1; /* Channel 2 Service Status */ - vuint32_t SS1:1; /* Channel 1 Service Status */ - vuint32_t SS0:1; /* Channel 0 Service Status */ - } B; - } CSSR_A; - - union - { /* ETPU_B Channel Service Status */ - vuint32_t R; - struct - { - vuint32_t SS31:1; /* Channel 31 Service Status */ - vuint32_t SS30:1; /* Channel 30 Service Status */ - vuint32_t SS29:1; /* Channel 29 Service Status */ - vuint32_t SS28:1; /* Channel 28 Service Status */ - vuint32_t SS27:1; /* Channel 27 Service Status */ - vuint32_t SS26:1; /* Channel 26 Service Status */ - vuint32_t SS25:1; /* Channel 25 Service Status */ - vuint32_t SS24:1; /* Channel 24 Service Status */ - vuint32_t SS23:1; /* Channel 23 Service Status */ - vuint32_t SS22:1; /* Channel 22 Service Status */ - vuint32_t SS21:1; /* Channel 21 Service Status */ - vuint32_t SS20:1; /* Channel 20 Service Status */ - vuint32_t SS19:1; /* Channel 19 Service Status */ - vuint32_t SS18:1; /* Channel 18 Service Status */ - vuint32_t SS17:1; /* Channel 17 Service Status */ - vuint32_t SS16:1; /* Channel 16 Service Status */ - vuint32_t SS15:1; /* Channel 15 Service Status */ - vuint32_t SS14:1; /* Channel 14 Service Status */ - vuint32_t SS13:1; /* Channel 13 Service Status */ - vuint32_t SS12:1; /* Channel 12 Service Status */ - vuint32_t SS11:1; /* Channel 11 Service Status */ - vuint32_t SS10:1; /* Channel 10 Service Status */ - vuint32_t SS9:1; /* Channel 9 Service Status */ - vuint32_t SS8:1; /* Channel 8 Service Status */ - vuint32_t SS7:1; /* Channel 7 Service Status */ - vuint32_t SS6:1; /* Channel 6 Service Status */ - vuint32_t SS5:1; /* Channel 5 Service Status */ - vuint32_t SS4:1; /* Channel 4 Service Status */ - vuint32_t SS3:1; /* Channel 3 Service Status */ - vuint32_t SS2:1; /* Channel 2 Service Status */ - vuint32_t SS1:1; /* Channel 1 Service Status */ - vuint32_t SS0:1; /* Channel 0 Service Status */ - } B; - } CSSR_B; - - uint32_t etpu_reserved23[90]; - -/*****************************Channels********************************/ - - struct - { - union - { - vuint32_t R; /* Channel Configuration Register */ - struct - { - vuint32_t CIE:1; /* Channel Interruput Enable */ - vuint32_t DTRE:1; /* Data Transfer Request Enable */ - vuint32_t CPR:2; /* Channel Priority */ - vuint32_t:3; - vuint32_t ETCS:1; /* Entry Table Condition Select */ - vuint32_t:3; - vuint32_t CFS:5; /* Channel Function Select */ - vuint32_t ODIS:1; /* Output disable */ - vuint32_t OPOL:1; /* output polarity */ - vuint32_t:3; - vuint32_t CPBA:11; /* Channel Parameter Base Address */ - } B; - } CR; - union - { - vuint32_t R; /* Channel Status Control Register */ - struct - { - vuint32_t CIS:1; /* Channel Interruput Status */ - vuint32_t CIOS:1; /* Channel Interruput Overflow Status */ - vuint32_t:6; - vuint32_t DTRS:1; /* Data Transfer Status */ - vuint32_t DTROS:1; /* Data Transfer Overflow Status */ - vuint32_t:6; - vuint32_t IPS:1; /* Input Pin State */ - vuint32_t OPS:1; /* Output Pin State */ - vuint32_t OBE:1; /* Output Buffer Enable */ - vuint32_t:11; - vuint32_t FM1:1; /* Function mode */ - vuint32_t FM0:1; /* Function mode */ - } B; - } SCR; - union - { - vuint32_t R; /* Channel Host Service Request Register */ - struct - { - vuint32_t:29; /* Host Service Request */ - vuint32_t HSR:3; - } B; - } HSRR; - uint32_t etpu_reserved23; - } CHAN[127]; - - }; - -// Define instances of modules -#define ETPU (*( struct ETPU_tag *) 0x401D0000) -#define ETPU_DATA_RAM (*( uint32_t *) 0x401D8000) -#define ETPU_DATA_RAM_EXT (*( uint32_t *) 0x401DC000) -#define ETPU_DATA_RAM_END (0x401D9800) -#define CODE_RAM (*( uint32_t *) 0x401E0000) - -#ifdef __MWERKS__ -#pragma pop -#endif - -#ifdef __cplusplus -} -#endif -#endif /* ifdef _MCF523x_eTPU_struc_H */ - - -/********************************************************************* - * - * Copyright: - * Freescale Semiconductor, INC. All Rights Reserved. - * You are hereby granted a copyright license to use, modify, and - * distribute the SOFTWARE so long as this entire notice is - * retained without alteration in any modified and/or redistributed - * versions, and that such modified versions are clearly identified - * as such. No licenses are granted by implication, estoppel or - * otherwise under any patents or trademarks of Freescale - * Semiconductor, Inc. This software is provided on an "AS IS" - * basis and without warranty. - * - * To the maximum extent permitted by applicable law, Freescale - * Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, - * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A - * PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH - * REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) - * AND ANY ACCOMPANYING WRITTEN MATERIALS. - * - * To the maximum extent permitted by applicable law, IN NO EVENT - * SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER - * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, - * BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER - * PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. - * - * Freescale Semiconductor assumes no responsibility for the - * maintenance and support of this software - ********************************************************************/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_fec.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_fec.h deleted file mode 100644 index 19bc720e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_fec.h +++ /dev/null @@ -1,215 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_fec.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_FEC_H__ -#define __MCF523X_FEC_H__ - -/********************************************************************* -* -* Fast Ethernet Controller (FEC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FEC_EIR (*(vuint32*)(void*)(&__IPSBAR[0x001004])) -#define MCF_FEC_EIMR (*(vuint32*)(void*)(&__IPSBAR[0x001008])) -#define MCF_FEC_RDAR (*(vuint32*)(void*)(&__IPSBAR[0x001010])) -#define MCF_FEC_TDAR (*(vuint32*)(void*)(&__IPSBAR[0x001014])) -#define MCF_FEC_ECR (*(vuint32*)(void*)(&__IPSBAR[0x001024])) -#define MCF_FEC_MMFR (*(vuint32*)(void*)(&__IPSBAR[0x001040])) -#define MCF_FEC_MSCR (*(vuint32*)(void*)(&__IPSBAR[0x001044])) -#define MCF_FEC_MIBC (*(vuint32*)(void*)(&__IPSBAR[0x001064])) -#define MCF_FEC_RCR (*(vuint32*)(void*)(&__IPSBAR[0x001084])) -#define MCF_FEC_TCR (*(vuint32*)(void*)(&__IPSBAR[0x0010C4])) -#define MCF_FEC_PALR (*(vuint32*)(void*)(&__IPSBAR[0x0010E4])) -#define MCF_FEC_PAUR (*(vuint32*)(void*)(&__IPSBAR[0x0010E8])) -#define MCF_FEC_OPD (*(vuint32*)(void*)(&__IPSBAR[0x0010EC])) -#define MCF_FEC_IAUR (*(vuint32*)(void*)(&__IPSBAR[0x001118])) -#define MCF_FEC_IALR (*(vuint32*)(void*)(&__IPSBAR[0x00111C])) -#define MCF_FEC_GAUR (*(vuint32*)(void*)(&__IPSBAR[0x001120])) -#define MCF_FEC_GALR (*(vuint32*)(void*)(&__IPSBAR[0x001124])) -#define MCF_FEC_TFWR (*(vuint32*)(void*)(&__IPSBAR[0x001144])) -#define MCF_FEC_FRBR (*(vuint32*)(void*)(&__IPSBAR[0x00114C])) -#define MCF_FEC_FRSR (*(vuint32*)(void*)(&__IPSBAR[0x001150])) -#define MCF_FEC_ERDSR (*(vuint32*)(void*)(&__IPSBAR[0x001180])) -#define MCF_FEC_ETDSR (*(vuint32*)(void*)(&__IPSBAR[0x001184])) -#define MCF_FEC_EMRBR (*(vuint32*)(void*)(&__IPSBAR[0x001188])) -#define MCF_FEC_RMON_T_DROP (*(vuint32*)(void*)(&__IPSBAR[0x001200])) -#define MCF_FEC_RMON_T_PACKETS (*(vuint32*)(void*)(&__IPSBAR[0x001204])) -#define MCF_FEC_RMON_T_BC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x001208])) -#define MCF_FEC_RMON_T_MC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x00120C])) -#define MCF_FEC_RMON_T_CRC_ALIGN (*(vuint32*)(void*)(&__IPSBAR[0x001210])) -#define MCF_FEC_RMON_T_UNDERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001214])) -#define MCF_FEC_RMON_T_OVERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001218])) -#define MCF_FEC_RMON_T_FRAG (*(vuint32*)(void*)(&__IPSBAR[0x00121C])) -#define MCF_FEC_RMON_T_JAB (*(vuint32*)(void*)(&__IPSBAR[0x001220])) -#define MCF_FEC_RMON_T_COL (*(vuint32*)(void*)(&__IPSBAR[0x001224])) -#define MCF_FEC_RMON_T_P64 (*(vuint32*)(void*)(&__IPSBAR[0x001228])) -#define MCF_FEC_RMON_T_P65TO127 (*(vuint32*)(void*)(&__IPSBAR[0x00122C])) -#define MCF_FEC_RMON_T_P128TO255 (*(vuint32*)(void*)(&__IPSBAR[0x001230])) -#define MCF_FEC_RMON_T_P256TO511 (*(vuint32*)(void*)(&__IPSBAR[0x001234])) -#define MCF_FEC_RMON_T_P512TO1023 (*(vuint32*)(void*)(&__IPSBAR[0x001238])) -#define MCF_FEC_RMON_T_P1024TO2047 (*(vuint32*)(void*)(&__IPSBAR[0x00123C])) -#define MCF_FEC_RMON_T_P_GTE2048 (*(vuint32*)(void*)(&__IPSBAR[0x001240])) -#define MCF_FEC_RMON_T_OCTETS (*(vuint32*)(void*)(&__IPSBAR[0x001244])) -#define MCF_FEC_IEEE_T_DROP (*(vuint32*)(void*)(&__IPSBAR[0x001248])) -#define MCF_FEC_IEEE_T_FRAME_OK (*(vuint32*)(void*)(&__IPSBAR[0x00124C])) -#define MCF_FEC_IEEE_T_1COL (*(vuint32*)(void*)(&__IPSBAR[0x001250])) -#define MCF_FEC_IEEE_T_MCOL (*(vuint32*)(void*)(&__IPSBAR[0x001254])) -#define MCF_FEC_IEEE_T_DEF (*(vuint32*)(void*)(&__IPSBAR[0x001258])) -#define MCF_FEC_IEEE_T_LCOL (*(vuint32*)(void*)(&__IPSBAR[0x00125C])) -#define MCF_FEC_IEEE_T_EXCOL (*(vuint32*)(void*)(&__IPSBAR[0x001260])) -#define MCF_FEC_IEEE_T_MACERR (*(vuint32*)(void*)(&__IPSBAR[0x001264])) -#define MCF_FEC_IEEE_T_CSERR (*(vuint32*)(void*)(&__IPSBAR[0x001268])) -#define MCF_FEC_IEEE_T_SQE (*(vuint32*)(void*)(&__IPSBAR[0x00126C])) -#define MCF_FEC_IEEE_T_FDXFC (*(vuint32*)(void*)(&__IPSBAR[0x001270])) -#define MCF_FEC_IEEE_T_OCTETS_OK (*(vuint32*)(void*)(&__IPSBAR[0x001274])) -#define MCF_FEC_RMON_R_PACKETS (*(vuint32*)(void*)(&__IPSBAR[0x001284])) -#define MCF_FEC_RMON_R_BC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x001288])) -#define MCF_FEC_RMON_R_MC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x00128C])) -#define MCF_FEC_RMON_R_CRC_ALIGN (*(vuint32*)(void*)(&__IPSBAR[0x001290])) -#define MCF_FEC_RMON_R_UNDERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001294])) -#define MCF_FEC_RMON_R_OVERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001298])) -#define MCF_FEC_RMON_R_FRAG (*(vuint32*)(void*)(&__IPSBAR[0x00129C])) -#define MCF_FEC_RMON_R_JAB (*(vuint32*)(void*)(&__IPSBAR[0x0012A0])) -#define MCF_FEC_RMON_R_RESVD_0 (*(vuint32*)(void*)(&__IPSBAR[0x0012A4])) -#define MCF_FEC_RMON_R_P64 (*(vuint32*)(void*)(&__IPSBAR[0x0012A8])) -#define MCF_FEC_RMON_R_P65TO127 (*(vuint32*)(void*)(&__IPSBAR[0x0012AC])) -#define MCF_FEC_RMON_R_P128TO255 (*(vuint32*)(void*)(&__IPSBAR[0x0012B0])) -#define MCF_FEC_RMON_R_P256TO511 (*(vuint32*)(void*)(&__IPSBAR[0x0012B4])) -#define MCF_FEC_RMON_R_512TO1023 (*(vuint32*)(void*)(&__IPSBAR[0x0012B8])) -#define MCF_FEC_RMON_R_P_GTE2048 (*(vuint32*)(void*)(&__IPSBAR[0x0012C0])) -#define MCF_FEC_RMON_R_1024TO2047 (*(vuint32*)(void*)(&__IPSBAR[0x0012BC])) -#define MCF_FEC_RMON_R_OCTETS (*(vuint32*)(void*)(&__IPSBAR[0x0012C4])) -#define MCF_FEC_IEEE_R_DROP (*(vuint32*)(void*)(&__IPSBAR[0x0012C8])) -#define MCF_FEC_IEEE_R_FRAME_OK (*(vuint32*)(void*)(&__IPSBAR[0x0012CC])) -#define MCF_FEC_IEEE_R_CRC (*(vuint32*)(void*)(&__IPSBAR[0x0012D0])) -#define MCF_FEC_IEEE_R_ALIGN (*(vuint32*)(void*)(&__IPSBAR[0x0012D4])) -#define MCF_FEC_IEEE_R_MACERR (*(vuint32*)(void*)(&__IPSBAR[0x0012D8])) -#define MCF_FEC_IEEE_R_FDXFC (*(vuint32*)(void*)(&__IPSBAR[0x0012DC])) -#define MCF_FEC_IEEE_R_OCTETS_OK (*(vuint32*)(void*)(&__IPSBAR[0x0012E0])) - -/* Bit definitions and macros for MCF_FEC_EIR */ -#define MCF_FEC_EIR_UN (0x00080000) -#define MCF_FEC_EIR_RL (0x00100000) -#define MCF_FEC_EIR_LC (0x00200000) -#define MCF_FEC_EIR_EBERR (0x00400000) -#define MCF_FEC_EIR_MII (0x00800000) -#define MCF_FEC_EIR_RXB (0x01000000) -#define MCF_FEC_EIR_RXF (0x02000000) -#define MCF_FEC_EIR_TXB (0x04000000) -#define MCF_FEC_EIR_TXF (0x08000000) -#define MCF_FEC_EIR_GRA (0x10000000) -#define MCF_FEC_EIR_BABT (0x20000000) -#define MCF_FEC_EIR_BABR (0x40000000) -#define MCF_FEC_EIR_HBERR (0x80000000) - -/* Bit definitions and macros for MCF_FEC_EIMR */ -#define MCF_FEC_EIMR_UN (0x00080000) -#define MCF_FEC_EIMR_RL (0x00100000) -#define MCF_FEC_EIMR_LC (0x00200000) -#define MCF_FEC_EIMR_EBERR (0x00400000) -#define MCF_FEC_EIMR_MII (0x00800000) -#define MCF_FEC_EIMR_RXB (0x01000000) -#define MCF_FEC_EIMR_RXF (0x02000000) -#define MCF_FEC_EIMR_TXB (0x04000000) -#define MCF_FEC_EIMR_TXF (0x08000000) -#define MCF_FEC_EIMR_GRA (0x10000000) -#define MCF_FEC_EIMR_BABT (0x20000000) -#define MCF_FEC_EIMR_BABR (0x40000000) -#define MCF_FEC_EIMR_HBERR (0x80000000) - -/* Bit definitions and macros for MCF_FEC_RDAR */ -#define MCF_FEC_RDAR_R_DES_ACTIVE (0x01000000) - -/* Bit definitions and macros for MCF_FEC_TDAR */ -#define MCF_FEC_TDAR_X_DES_ACTIVE (0x01000000) - -/* Bit definitions and macros for MCF_FEC_ECR */ -#define MCF_FEC_ECR_RESET (0x00000001) -#define MCF_FEC_ECR_ETHER_EN (0x00000002) - -/* Bit definitions and macros for MCF_FEC_MMFR */ -#define MCF_FEC_MMFR_DATA(x) (((x)&0x0000FFFF)<<0) -#define MCF_FEC_MMFR_TA(x) (((x)&0x00000003)<<16) -#define MCF_FEC_MMFR_RA(x) (((x)&0x0000001F)<<18) -#define MCF_FEC_MMFR_PA(x) (((x)&0x0000001F)<<23) -#define MCF_FEC_MMFR_OP(x) (((x)&0x00000003)<<28) -#define MCF_FEC_MMFR_ST(x) (((x)&0x00000003)<<30) -#define MCF_FEC_MMFR_ST_01 (0x40000000) -#define MCF_FEC_MMFR_OP_READ (0x20000000) -#define MCF_FEC_MMFR_OP_WRITE (0x10000000) -#define MCF_FEC_MMFR_TA_10 (0x00020000) - - -/* Bit definitions and macros for MCF_FEC_MSCR */ -#define MCF_FEC_MSCR_MII_SPEED(x) (((x)&0x0000003F)<<1) -#define MCF_FEC_MSCR_DIS_PREAMBLE (0x00000080) - -/* Bit definitions and macros for MCF_FEC_MIBC */ -#define MCF_FEC_MIBC_MIB_IDLE (0x40000000) -#define MCF_FEC_MIBC_MIB_DISABLE (0x80000000) - -/* Bit definitions and macros for MCF_FEC_RCR */ -#define MCF_FEC_RCR_LOOP (0x00000001) -#define MCF_FEC_RCR_DRT (0x00000002) -#define MCF_FEC_RCR_MII_MODE (0x00000004) -#define MCF_FEC_RCR_PROM (0x00000008) -#define MCF_FEC_RCR_BC_REJ (0x00000010) -#define MCF_FEC_RCR_FCE (0x00000020) -#define MCF_FEC_RCR_MAX_FL(x) (((x)&0x000007FF)<<16) - -/* Bit definitions and macros for MCF_FEC_TCR */ -#define MCF_FEC_TCR_GTS (0x00000001) -#define MCF_FEC_TCR_HBC (0x00000002) -#define MCF_FEC_TCR_FDEN (0x00000004) -#define MCF_FEC_TCR_TFC_PAUSE (0x00000008) -#define MCF_FEC_TCR_RFC_PAUSE (0x00000010) - -/* Bit definitions and macros for MCF_FEC_PAUR */ -#define MCF_FEC_PAUR_TYPE(x) (((x)&0x0000FFFF)<<0) -#define MCF_FEC_PAUR_PADDR2(x) (((x)&0x0000FFFF)<<16) - -/* Bit definitions and macros for MCF_FEC_OPD */ -#define MCF_FEC_OPD_PAUSE_DUR(x) (((x)&0x0000FFFF)<<0) -#define MCF_FEC_OPD_OPCODE(x) (((x)&0x0000FFFF)<<16) - -/* Bit definitions and macros for MCF_FEC_TFWR */ -#define MCF_FEC_TFWR_X_WMRK(x) (((x)&0x00000003)<<0) - -/* Bit definitions and macros for MCF_FEC_FRBR */ -#define MCF_FEC_FRBR_R_BOUND(x) (((x)&0x000000FF)<<2) - -/* Bit definitions and macros for MCF_FEC_FRSR */ -#define MCF_FEC_FRSR_R_FSTART(x) (((x)&0x000000FF)<<2) - -/* Bit definitions and macros for MCF_FEC_ERDSR */ -#define MCF_FEC_ERDSR_R_DES_START(x) (((x)&0x3FFFFFFF)<<2) - -/* Bit definitions and macros for MCF_FEC_ETDSR */ -#define MCF_FEC_ETDSR_X_DES_START(x) (((x)&0x3FFFFFFF)<<2) - -/* Bit definitions and macros for MCF_FEC_EMRBR */ -#define MCF_FEC_EMRBR_R_BUF_SIZE(x) (((x)&0x0000007F)<<4) - -/********************************************************************/ - -#endif /* __MCF523X_FEC_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_fmpll.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_fmpll.h deleted file mode 100644 index acf8505a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_fmpll.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * File: mcf523x_fmpll.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_FMPLL_H__ -#define __MCF523X_FMPLL_H__ - -/********************************************************************* -* -* Frequency Modulated Phase Locked Loop (FMPLL) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FMPLL_SYNCR (*(vuint32*)(void*)(&__IPSBAR[0x120000])) -#define MCF_FMPLL_SYNSR (*(vuint32*)(void*)(&__IPSBAR[0x120004])) - -/* Bit definitions and macros for MCF_FMPLL_SYNCR */ -#define MCF_FMPLL_SYNCR_EXP(x) (((x)&0x000003FF)<<0) -#define MCF_FMPLL_SYNCR_DEPTH(x) (((x)&0x00000003)<<10) -#define MCF_FMPLL_SYNCR_RATE (0x00001000) -#define MCF_FMPLL_SYNCR_LOCIRQ (0x00002000) -#define MCF_FMPLL_SYNCR_LOLIRQ (0x00004000) -#define MCF_FMPLL_SYNCR_DISCLK (0x00008000) -#define MCF_FMPLL_SYNCR_LOCRE (0x00010000) -#define MCF_FMPLL_SYNCR_LOLRE (0x00020000) -#define MCF_FMPLL_SYNCR_LOCEN (0x00040000) -#define MCF_FMPLL_SYNCR_RFD(x) (((x)&0x00000007)<<19) -#define MCF_FMPLL_SYNCR_MFD(x) (((x)&0x00000007)<<24) - -/* Bit definitions and macros for MCF_FMPLL_SYNSR */ -#define MCF_FMPLL_SYNSR_CALPASS (0x00000001) -#define MCF_FMPLL_SYNSR_CALDONE (0x00000002) -#define MCF_FMPLL_SYNSR_LOCF (0x00000004) -#define MCF_FMPLL_SYNSR_LOCK (0x00000008) -#define MCF_FMPLL_SYNSR_LOCKS (0x00000010) -#define MCF_FMPLL_SYNSR_PLLREF (0x00000020) -#define MCF_FMPLL_SYNSR_PLLSEL (0x00000040) -#define MCF_FMPLL_SYNSR_MODE (0x00000080) -#define MCF_FMPLL_SYNSR_LOC (0x00000100) -#define MCF_FMPLL_SYNSR_LOLF (0x00000200) - -/********************************************************************/ - -#endif /* __MCF523X_FMPLL_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_gpio.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_gpio.h deleted file mode 100644 index bf1f6131..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_gpio.h +++ /dev/null @@ -1,683 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_gpio.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_GPIO_H__ -#define __MCF523X_GPIO_H__ - -/********************************************************************* -* -* General Purpose I/O (GPIO) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_GPIO_PODR_ADDR (*(vuint8 *)(void*)(&__IPSBAR[0x100000])) -#define MCF_GPIO_PODR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100001])) -#define MCF_GPIO_PODR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100002])) -#define MCF_GPIO_PODR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100003])) -#define MCF_GPIO_PODR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100004])) -#define MCF_GPIO_PODR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100005])) -#define MCF_GPIO_PODR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100006])) -#define MCF_GPIO_PODR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100007])) -#define MCF_GPIO_PODR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100008])) -#define MCF_GPIO_PODR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100009])) -#define MCF_GPIO_PODR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10000A])) -#define MCF_GPIO_PODR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10000B])) -#define MCF_GPIO_PODR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10000C])) -#define MCF_GPIO_PDDR_APDDR (*(vuint8 *)(void*)(&__IPSBAR[0x100010])) -#define MCF_GPIO_PDDR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100011])) -#define MCF_GPIO_PDDR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100012])) -#define MCF_GPIO_PDDR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100013])) -#define MCF_GPIO_PDDR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100014])) -#define MCF_GPIO_PDDR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100015])) -#define MCF_GPIO_PDDR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100016])) -#define MCF_GPIO_PDDR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100017])) -#define MCF_GPIO_PDDR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100018])) -#define MCF_GPIO_PDDR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100019])) -#define MCF_GPIO_PDDR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10001A])) -#define MCF_GPIO_PDDR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10001B])) -#define MCF_GPIO_PDDR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10001C])) -#define MCF_GPIO_PPDSDR_ADDR (*(vuint8 *)(void*)(&__IPSBAR[0x100020])) -#define MCF_GPIO_PPDSDR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100021])) -#define MCF_GPIO_PPDSDR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100022])) -#define MCF_GPIO_PPDSDR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100023])) -#define MCF_GPIO_PPDSDR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100024])) -#define MCF_GPIO_PPDSDR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100027])) -#define MCF_GPIO_PPDSDR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100025])) -#define MCF_GPIO_PPDSDR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100026])) -#define MCF_GPIO_PPDSDR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100028])) -#define MCF_GPIO_PPDSDR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100029])) -#define MCF_GPIO_PPDSDR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10002A])) -#define MCF_GPIO_PPDSDR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10002B])) -#define MCF_GPIO_PPDSDR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10002C])) -#define MCF_GPIO_PCLRR_ADDR (*(vuint8 *)(void*)(&__IPSBAR[0x100030])) -#define MCF_GPIO_PCLRR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100031])) -#define MCF_GPIO_PCLRR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100032])) -#define MCF_GPIO_PCLRR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100033])) -#define MCF_GPIO_PCLRR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100034])) -#define MCF_GPIO_PCLRR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100035])) -#define MCF_GPIO_PCLRR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100036])) -#define MCF_GPIO_PCLRR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100037])) -#define MCF_GPIO_PCLRR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100038])) -#define MCF_GPIO_PCLRR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100039])) -#define MCF_GPIO_PCLRR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10003A])) -#define MCF_GPIO_PCLRR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10003B])) -#define MCF_GPIO_PCLRR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10003C])) -#define MCF_GPIO_PAR_AD (*(vuint8 *)(void*)(&__IPSBAR[0x100040])) -#define MCF_GPIO_PAR_BUSCTL (*(vuint16*)(void*)(&__IPSBAR[0x100042])) -#define MCF_GPIO_PAR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100044])) -#define MCF_GPIO_PAR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100045])) -#define MCF_GPIO_PAR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100046])) -#define MCF_GPIO_PAR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100047])) -#define MCF_GPIO_PAR_UART (*(vuint16*)(void*)(&__IPSBAR[0x100048])) -#define MCF_GPIO_PAR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10004A])) -#define MCF_GPIO_PAR_TIMER (*(vuint16*)(void*)(&__IPSBAR[0x10004C])) -#define MCF_GPIO_PAR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10004E])) -#define MCF_GPIO_DSCR_EIM (*(vuint8 *)(void*)(&__IPSBAR[0x100050])) -#define MCF_GPIO_DSCR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x100051])) -#define MCF_GPIO_DSCR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100052])) -#define MCF_GPIO_DSCR_UART (*(vuint8 *)(void*)(&__IPSBAR[0x100053])) -#define MCF_GPIO_DSCR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x100054])) -#define MCF_GPIO_DSCR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x100055])) - -/* Bit definitions and macros for MCF_GPIO_PODR_ADDR */ -#define MCF_GPIO_PODR_ADDR_PODR_ADDR5 (0x20) -#define MCF_GPIO_PODR_ADDR_PODR_ADDR6 (0x40) -#define MCF_GPIO_PODR_ADDR_PODR_ADDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_DATAH */ -#define MCF_GPIO_PODR_DATAH_PODR_DATAH0 (0x01) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH1 (0x02) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH2 (0x04) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH3 (0x08) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH4 (0x10) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH5 (0x20) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH6 (0x40) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_DATAL */ -#define MCF_GPIO_PODR_DATAL_PODR_DATAL0 (0x01) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL1 (0x02) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL2 (0x04) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL3 (0x08) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL4 (0x10) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL5 (0x20) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL6 (0x40) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_BUSCTL */ -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL0 (0x01) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL1 (0x02) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL2 (0x04) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL3 (0x08) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL4 (0x10) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL5 (0x20) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL6 (0x40) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_BS */ -#define MCF_GPIO_PODR_BS_PODR_BS0 (0x01) -#define MCF_GPIO_PODR_BS_PODR_BS1 (0x02) -#define MCF_GPIO_PODR_BS_PODR_BS2 (0x04) -#define MCF_GPIO_PODR_BS_PODR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PODR_CS */ -#define MCF_GPIO_PODR_CS_PODR_CS1 (0x02) -#define MCF_GPIO_PODR_CS_PODR_CS2 (0x04) -#define MCF_GPIO_PODR_CS_PODR_CS3 (0x08) -#define MCF_GPIO_PODR_CS_PODR_CS4 (0x10) -#define MCF_GPIO_PODR_CS_PODR_CS5 (0x20) -#define MCF_GPIO_PODR_CS_PODR_CS6 (0x40) -#define MCF_GPIO_PODR_CS_PODR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_SDRAM */ -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM0 (0x01) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM1 (0x02) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM2 (0x04) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM3 (0x08) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM4 (0x10) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PODR_FECI2C */ -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C0 (0x01) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C1 (0x02) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C2 (0x04) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PODR_UARTH */ -#define MCF_GPIO_PODR_UARTH_PODR_UARTH0 (0x01) -#define MCF_GPIO_PODR_UARTH_PODR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PODR_UARTL */ -#define MCF_GPIO_PODR_UARTL_PODR_UARTL0 (0x01) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL1 (0x02) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL2 (0x04) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL3 (0x08) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL4 (0x10) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL5 (0x20) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL6 (0x40) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_QSPI */ -#define MCF_GPIO_PODR_QSPI_PODR_QSPI0 (0x01) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI1 (0x02) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI2 (0x04) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI3 (0x08) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PODR_TIMER */ -#define MCF_GPIO_PODR_TIMER_PODR_TIMER0 (0x01) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER1 (0x02) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER2 (0x04) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER3 (0x08) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER4 (0x10) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER5 (0x20) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER6 (0x40) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_ETPU */ -#define MCF_GPIO_PODR_ETPU_PODR_ETPU0 (0x01) -#define MCF_GPIO_PODR_ETPU_PODR_ETPU1 (0x02) -#define MCF_GPIO_PODR_ETPU_PODR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PDDR_APDDR */ -#define MCF_GPIO_PDDR_APDDR_PDDR_APDDR5 (0x20) -#define MCF_GPIO_PDDR_APDDR_PDDR_APDDR6 (0x40) -#define MCF_GPIO_PDDR_APDDR_PDDR_APDDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DATAH */ -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH0 (0x01) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH1 (0x02) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH2 (0x04) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH3 (0x08) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH4 (0x10) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH5 (0x20) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH6 (0x40) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DATAL */ -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL0 (0x01) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL1 (0x02) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL2 (0x04) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL3 (0x08) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL4 (0x10) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL5 (0x20) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL6 (0x40) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_BUSCTL */ -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL0 (0x01) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL1 (0x02) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL2 (0x04) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL3 (0x08) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL4 (0x10) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL5 (0x20) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL6 (0x40) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_BS */ -#define MCF_GPIO_PDDR_BS_PDDR_BS0 (0x01) -#define MCF_GPIO_PDDR_BS_PDDR_BS3(x) (((x)&0x07)<<1) - -/* Bit definitions and macros for MCF_GPIO_PDDR_CS */ -#define MCF_GPIO_PDDR_CS_PDDR_CS1 (0x02) -#define MCF_GPIO_PDDR_CS_PDDR_CS2 (0x04) -#define MCF_GPIO_PDDR_CS_PDDR_CS3 (0x08) -#define MCF_GPIO_PDDR_CS_PDDR_CS4 (0x10) -#define MCF_GPIO_PDDR_CS_PDDR_CS5 (0x20) -#define MCF_GPIO_PDDR_CS_PDDR_CS6 (0x40) -#define MCF_GPIO_PDDR_CS_PDDR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_SDRAM */ -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM0 (0x01) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM1 (0x02) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM2 (0x04) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM3 (0x08) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM4 (0x10) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FECI2C */ -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0 (0x01) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1 (0x02) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C2 (0x04) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PDDR_UARTH */ -#define MCF_GPIO_PDDR_UARTH_PDDR_UARTH0 (0x01) -#define MCF_GPIO_PDDR_UARTH_PDDR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PDDR_UARTL */ -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL0 (0x01) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL1 (0x02) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL2 (0x04) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL3 (0x08) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL4 (0x10) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL5 (0x20) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL6 (0x40) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_QSPI */ -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI0 (0x01) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI1 (0x02) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI2 (0x04) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI3 (0x08) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PDDR_TIMER */ -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER0 (0x01) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER1 (0x02) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER2 (0x04) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER3 (0x08) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER4 (0x10) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER5 (0x20) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER6 (0x40) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_ETPU */ -#define MCF_GPIO_PDDR_ETPU_PDDR_ETPU0 (0x01) -#define MCF_GPIO_PDDR_ETPU_PDDR_ETPU1 (0x02) -#define MCF_GPIO_PDDR_ETPU_PDDR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_ADDR */ -#define MCF_GPIO_PPDSDR_ADDR_PPDSDR_ADDR5 (0x20) -#define MCF_GPIO_PPDSDR_ADDR_PPDSDR_ADDR6 (0x40) -#define MCF_GPIO_PPDSDR_ADDR_PPDSDR_ADDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DATAH */ -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH0 (0x01) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH1 (0x02) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH2 (0x04) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH3 (0x08) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH4 (0x10) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH5 (0x20) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH6 (0x40) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DATAL */ -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL0 (0x01) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL1 (0x02) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL2 (0x04) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL3 (0x08) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL4 (0x10) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL5 (0x20) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL6 (0x40) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_BUSCTL */ -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL0 (0x01) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL1 (0x02) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL2 (0x04) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL3 (0x08) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL4 (0x10) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL5 (0x20) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL6 (0x40) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_BS */ -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS0 (0x01) -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS1 (0x02) -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS2 (0x04) -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECI2C */ -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C0 (0x01) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C1 (0x02) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C2 (0x04) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_CS */ -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS1 (0x02) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS2 (0x04) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS3 (0x08) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS4 (0x10) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS5 (0x20) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS6 (0x40) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_SDRAM */ -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM0 (0x01) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM1 (0x02) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM2 (0x04) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM3 (0x08) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM4 (0x10) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM5 (0x20) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM6 (0x40) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_UARTH */ -#define MCF_GPIO_PPDSDR_UARTH_PPDSDR_UARTH0 (0x01) -#define MCF_GPIO_PPDSDR_UARTH_PPDSDR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_UARTL */ -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL0 (0x01) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL1 (0x02) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL2 (0x04) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL3 (0x08) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL4 (0x10) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL5 (0x20) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL6 (0x40) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_QSPI */ -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI0 (0x01) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI1 (0x02) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI2 (0x04) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI3 (0x08) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_TIMER */ -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER0 (0x01) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER1 (0x02) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER2 (0x04) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER3 (0x08) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER4 (0x10) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER5 (0x20) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER6 (0x40) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_ETPU */ -#define MCF_GPIO_PPDSDR_ETPU_PPDSDR_ETPU0 (0x01) -#define MCF_GPIO_PPDSDR_ETPU_PPDSDR_ETPU1 (0x02) -#define MCF_GPIO_PPDSDR_ETPU_PPDSDR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_ADDR */ -#define MCF_GPIO_PCLRR_ADDR_PCLRR_ADDR5 (0x20) -#define MCF_GPIO_PCLRR_ADDR_PCLRR_ADDR6 (0x40) -#define MCF_GPIO_PCLRR_ADDR_PCLRR_ADDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DATAH */ -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH0 (0x01) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH1 (0x02) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH2 (0x04) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH3 (0x08) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH4 (0x10) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH5 (0x20) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH6 (0x40) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DATAL */ -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL0 (0x01) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL1 (0x02) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL2 (0x04) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL3 (0x08) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL4 (0x10) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL5 (0x20) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL6 (0x40) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_BUSCTL */ -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL0 (0x01) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL1 (0x02) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL2 (0x04) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL3 (0x08) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL4 (0x10) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL5 (0x20) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL6 (0x40) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_BS */ -#define MCF_GPIO_PCLRR_BS_PCLRR_BS0 (0x01) -#define MCF_GPIO_PCLRR_BS_PCLRR_BS1 (0x02) -#define MCF_GPIO_PCLRR_BS_PCLRR_BS2 (0x04) -#define MCF_GPIO_PCLRR_BS_PCLRR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_CS */ -#define MCF_GPIO_PCLRR_CS_PCLRR_CS1 (0x02) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS2 (0x04) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS3 (0x08) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS4 (0x10) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS5 (0x20) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS6 (0x40) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_SDRAM */ -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM0 (0x01) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM1 (0x02) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM2 (0x04) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM3 (0x08) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM4 (0x10) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FECI2C */ -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C0 (0x01) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C1 (0x02) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C2 (0x04) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_UARTH */ -#define MCF_GPIO_PCLRR_UARTH_PCLRR_UARTH0 (0x01) -#define MCF_GPIO_PCLRR_UARTH_PCLRR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_UARTL */ -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL0 (0x01) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL1 (0x02) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL2 (0x04) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL3 (0x08) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL4 (0x10) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL5 (0x20) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL6 (0x40) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_QSPI */ -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI0 (0x01) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI1 (0x02) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI2 (0x04) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI3 (0x08) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_TIMER */ -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER0 (0x01) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER1 (0x02) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER2 (0x04) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER3 (0x08) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER4 (0x10) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER5 (0x20) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER6 (0x40) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_ETPU */ -#define MCF_GPIO_PCLRR_ETPU_PCLRR_ETPU0 (0x01) -#define MCF_GPIO_PCLRR_ETPU_PCLRR_ETPU1 (0x02) -#define MCF_GPIO_PCLRR_ETPU_PCLRR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PAR_AD */ -#define MCF_GPIO_PAR_AD_PAR_DATAL (0x01) -#define MCF_GPIO_PAR_AD_PAR_ADDR21 (0x20) -#define MCF_GPIO_PAR_AD_PAR_ADDR22 (0x40) -#define MCF_GPIO_PAR_AD_PAR_ADDR23 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PAR_BUSCTL */ -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP(x) (((x)&0x0003)<<0) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS(x) (((x)&0x0003)<<2) -#define MCF_GPIO_PAR_BUSCTL_PAR_TSIZ0 (0x0010) -#define MCF_GPIO_PAR_BUSCTL_PAR_TSIZ1 (0x0040) -#define MCF_GPIO_PAR_BUSCTL_PAR_RWB (0x0100) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_BUSCTL_PAR_TA (0x1000) -#define MCF_GPIO_PAR_BUSCTL_PAR_OE (0x4000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA_GPIO (0x0000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA_DMA (0x0800) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA_TEA (0x0C00) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_GPIO (0x0000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_DMA (0x0080) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_TS (0x00C0) -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP_GPIO (0x0000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP_DMA (0x0002) -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP_TEA (0x0003) - -/* Bit definitions and macros for MCF_GPIO_PAR_BS */ -#define MCF_GPIO_PAR_BS_PAR_BS0 (0x01) -#define MCF_GPIO_PAR_BS_PAR_BS1 (0x02) -#define MCF_GPIO_PAR_BS_PAR_BS2 (0x04) -#define MCF_GPIO_PAR_BS_PAR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PAR_CS */ -#define MCF_GPIO_PAR_CS_PAR_CS1 (0x02) -#define MCF_GPIO_PAR_CS_PAR_CS2 (0x04) -#define MCF_GPIO_PAR_CS_PAR_CS3 (0x08) -#define MCF_GPIO_PAR_CS_PAR_CS4 (0x10) -#define MCF_GPIO_PAR_CS_PAR_CS5 (0x20) -#define MCF_GPIO_PAR_CS_PAR_CS6 (0x40) -#define MCF_GPIO_PAR_CS_PAR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PAR_SDRAM */ -#define MCF_GPIO_PAR_SDRAM_PAR_SDCS0 (0x01) -#define MCF_GPIO_PAR_SDRAM_PAR_SDCS1 (0x02) -#define MCF_GPIO_PAR_SDRAM_PAR_SCKE (0x04) -#define MCF_GPIO_PAR_SDRAM_PAR_SRAS (0x08) -#define MCF_GPIO_PAR_SDRAM_PAR_SCAS (0x10) -#define MCF_GPIO_PAR_SDRAM_PAR_SDWE (0x20) -#define MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(x) (((x)&0x03)<<6) - -/* Bit definitions and macros for MCF_GPIO_PAR_FECI2C */ -#define MCF_GPIO_PAR_FECI2C_PAR_SDA(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL(x) (((x)&0x03)<<2) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO(x) (((x)&0x03)<<4) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC(x) (((x)&0x03)<<6) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_UART2 (0x40) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_I2C (0x80) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_FEC (0xC0) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_UART2 (0x10) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_I2C (0x20) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_FEC (0x30) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_FLEX (0x08) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_I2C (0x0C) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_FLEX (0x02) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_I2C (0x03) - -/* Bit definitions and macros for MCF_GPIO_PAR_UART */ -#define MCF_GPIO_PAR_UART_PAR_U0RTS (0x0001) -#define MCF_GPIO_PAR_UART_PAR_U0CTS (0x0002) -#define MCF_GPIO_PAR_UART_PAR_U0TXD (0x0004) -#define MCF_GPIO_PAR_UART_PAR_U0RXD (0x0008) -#define MCF_GPIO_PAR_UART_PAR_U1RTS(x) (((x)&0x0003)<<4) -#define MCF_GPIO_PAR_UART_PAR_U1CTS(x) (((x)&0x0003)<<6) -#define MCF_GPIO_PAR_UART_PAR_U1TXD(x) (((x)&0x0003)<<8) -#define MCF_GPIO_PAR_UART_PAR_U1RXD(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_UART_PAR_U2TXD (0x1000) -#define MCF_GPIO_PAR_UART_PAR_U2RXD (0x2000) -#define MCF_GPIO_PAR_UART_PAR_CAN1EN (0x4000) -#define MCF_GPIO_PAR_UART_PAR_DREQ2 (0x8000) -#define MCF_GPIO_PAR_UART_PAR_U1RXD_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1RXD_FLEX (0x0800) -#define MCF_GPIO_PAR_UART_PAR_U1RXD_UART1 (0x0C00) -#define MCF_GPIO_PAR_UART_PAR_U1TXD_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1TXD_FLEX (0x0200) -#define MCF_GPIO_PAR_UART_PAR_U1TXD_UART1 (0x0300) -#define MCF_GPIO_PAR_UART_PAR_U1CTS_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1CTS_UART2 (0x0080) -#define MCF_GPIO_PAR_UART_PAR_U1CTS_UART1 (0x00C0) -#define MCF_GPIO_PAR_UART_PAR_U1RTS_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1RTS_UART2 (0x0020) -#define MCF_GPIO_PAR_UART_PAR_U1RTS_UART1 (0x0030) - -/* Bit definitions and macros for MCF_GPIO_PAR_QSPI */ -#define MCF_GPIO_PAR_QSPI_PAR_SCK(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_QSPI_PAR_DOUT (0x04) -#define MCF_GPIO_PAR_QSPI_PAR_DIN(x) (((x)&0x03)<<3) -#define MCF_GPIO_PAR_QSPI_PAR_PCS0 (0x20) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1(x) (((x)&0x03)<<6) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1_GPIO (0x00) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1_SDRAMC (0x80) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1_QSPI (0xC0) -#define MCF_GPIO_PAR_QSPI_PAR_DIN_GPIO (0x00) -#define MCF_GPIO_PAR_QSPI_PAR_DIN_I2C (0x10) -#define MCF_GPIO_PAR_QSPI_PAR_DIN_QSPI (0x1C) -#define MCF_GPIO_PAR_QSPI_PAR_SCK_GPIO (0x00) -#define MCF_GPIO_PAR_QSPI_PAR_SCK_I2C (0x02) -#define MCF_GPIO_PAR_QSPI_PAR_SCK_QSPI (0x03) - -/* Bit definitions and macros for MCF_GPIO_PAR_TIMER */ -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT(x) (((x)&0x0003)<<0) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT(x) (((x)&0x0003)<<2) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT(x) (((x)&0x0003)<<4) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT(x) (((x)&0x0003)<<6) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN(x) (((x)&0x0003)<<8) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN(x) (((x)&0x0003)<<12) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN(x) (((x)&0x0003)<<14) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_QSPI (0x4000) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_UART2 (0x8000) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_T3IN (0xC000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_T2OUT (0x1000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_DMA (0x2000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_T2IN (0x3000) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_T1OUT (0x0400) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_DMA (0x0800) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_T1IN (0x0C00) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN_DMA (0x0200) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN_T0IN (0x0300) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_QSPI (0x0040) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_UART2 (0x0080) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_T3OUT (0x00C0) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT_DMA (0x0020) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT_T2OUT (0x0030) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT_DMA (0x0008) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT_T1OUT (0x000C) -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT_DMA (0x0002) -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT_T0OUT (0x0003) - -/* Bit definitions and macros for MCF_GPIO_PAR_ETPU */ -#define MCF_GPIO_PAR_ETPU_PAR_LTPU_ODIS (0x01) -#define MCF_GPIO_PAR_ETPU_PAR_UTPU_ODIS (0x02) -#define MCF_GPIO_PAR_ETPU_PAR_TCRCLK (0x04) - -/* Bit definitions and macros for MCF_GPIO_DSCR_EIM */ -#define MCF_GPIO_DSCR_EIM_DSCR_EIM0 (0x01) -#define MCF_GPIO_DSCR_EIM_DSCR_EIM1 (0x10) - -/* Bit definitions and macros for MCF_GPIO_DSCR_ETPU */ -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_7_0 (0x01) -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_15_8 (0x04) -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_23_16 (0x10) -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_31_24 (0x40) - -/* Bit definitions and macros for MCF_GPIO_DSCR_FECI2C */ -#define MCF_GPIO_DSCR_FECI2C_DSCR_I2C (0x01) -#define MCF_GPIO_DSCR_FECI2C_DSCR_FEC (0x10) - -/* Bit definitions and macros for MCF_GPIO_DSCR_UART */ -#define MCF_GPIO_DSCR_UART_DSCR_UART0 (0x01) -#define MCF_GPIO_DSCR_UART_DSCR_UART1 (0x04) -#define MCF_GPIO_DSCR_UART_DSCR_UART2 (0x10) -#define MCF_GPIO_DSCR_UART_DSCR_IRQ (0x40) - -/* Bit definitions and macros for MCF_GPIO_DSCR_QSPI */ -#define MCF_GPIO_DSCR_QSPI_DSCR_QSPI (0x01) - -/* Bit definitions and macros for MCF_GPIO_DSCR_TIMER */ -#define MCF_GPIO_DSCR_TIMER_DSCR_TIMER (0x01) - -/********************************************************************/ - -#endif /* __MCF523X_GPIO_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_i2c.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_i2c.h deleted file mode 100644 index 6708b6b9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_i2c.h +++ /dev/null @@ -1,70 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_i2c.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_I2C_H__ -#define __MCF523X_I2C_H__ - -/********************************************************************* -* -* I2C Module (I2C) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_I2C_I2AR (*(vuint8 *)(void*)(&__IPSBAR[0x000300])) -#define MCF_I2C_I2FDR (*(vuint8 *)(void*)(&__IPSBAR[0x000304])) -#define MCF_I2C_I2CR (*(vuint8 *)(void*)(&__IPSBAR[0x000308])) -#define MCF_I2C_I2SR (*(vuint8 *)(void*)(&__IPSBAR[0x00030C])) -#define MCF_I2C_I2DR (*(vuint8 *)(void*)(&__IPSBAR[0x000310])) -#define MCF_I2C_I2ICR (*(vuint8 *)(void*)(&__IPSBAR[0x000320])) - -/* Bit definitions and macros for MCF_I2C_I2AR */ -#define MCF_I2C_I2AR_ADR(x) (((x)&0x7F)<<1) - -/* Bit definitions and macros for MCF_I2C_I2FDR */ -#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F)<<0) - -/* Bit definitions and macros for MCF_I2C_I2CR */ -#define MCF_I2C_I2CR_RSTA (0x04) -#define MCF_I2C_I2CR_TXAK (0x08) -#define MCF_I2C_I2CR_MTX (0x10) -#define MCF_I2C_I2CR_MSTA (0x20) -#define MCF_I2C_I2CR_IIEN (0x40) -#define MCF_I2C_I2CR_IEN (0x80) - -/* Bit definitions and macros for MCF_I2C_I2SR */ -#define MCF_I2C_I2SR_RXAK (0x01) -#define MCF_I2C_I2SR_IIF (0x02) -#define MCF_I2C_I2SR_SRW (0x04) -#define MCF_I2C_I2SR_IAL (0x10) -#define MCF_I2C_I2SR_IBB (0x20) -#define MCF_I2C_I2SR_IAAS (0x40) -#define MCF_I2C_I2SR_ICF (0x80) - -/* Bit definitions and macros for MCF_I2C_I2ICR */ -#define MCF_I2C_I2ICR_IE (0x01) -#define MCF_I2C_I2ICR_RE (0x02) -#define MCF_I2C_I2ICR_TE (0x04) -#define MCF_I2C_I2ICR_BNBE (0x08) - -/********************************************************************/ - -#endif /* __MCF523X_I2C_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_intc0.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_intc0.h deleted file mode 100644 index 98982547..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_intc0.h +++ /dev/null @@ -1,330 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_intc0.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_INTC0_H__ -#define __MCF523X_INTC0_H__ - -/********************************************************************* -* -* Interrupt Controller 0 (INTC0) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_INTC0_IPRH (*(vuint32*)(void*)(&__IPSBAR[0x000C00])) -#define MCF_INTC0_IPRL (*(vuint32*)(void*)(&__IPSBAR[0x000C04])) -#define MCF_INTC0_IMRH (*(vuint32*)(void*)(&__IPSBAR[0x000C08])) -#define MCF_INTC0_IMRL (*(vuint32*)(void*)(&__IPSBAR[0x000C0C])) -#define MCF_INTC0_INTFRCH (*(vuint32*)(void*)(&__IPSBAR[0x000C10])) -#define MCF_INTC0_INTFRCL (*(vuint32*)(void*)(&__IPSBAR[0x000C14])) -#define MCF_INTC0_IRLR (*(vuint8 *)(void*)(&__IPSBAR[0x000C18])) -#define MCF_INTC0_IACKLPR (*(vuint8 *)(void*)(&__IPSBAR[0x000C19])) -#define MCF_INTC0_ICR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000C40])) -#define MCF_INTC0_ICR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000C41])) -#define MCF_INTC0_ICR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000C42])) -#define MCF_INTC0_ICR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000C43])) -#define MCF_INTC0_ICR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000C44])) -#define MCF_INTC0_ICR5 (*(vuint8 *)(void*)(&__IPSBAR[0x000C45])) -#define MCF_INTC0_ICR6 (*(vuint8 *)(void*)(&__IPSBAR[0x000C46])) -#define MCF_INTC0_ICR7 (*(vuint8 *)(void*)(&__IPSBAR[0x000C47])) -#define MCF_INTC0_ICR8 (*(vuint8 *)(void*)(&__IPSBAR[0x000C48])) -#define MCF_INTC0_ICR9 (*(vuint8 *)(void*)(&__IPSBAR[0x000C49])) -#define MCF_INTC0_ICR10 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4A])) -#define MCF_INTC0_ICR11 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4B])) -#define MCF_INTC0_ICR12 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4C])) -#define MCF_INTC0_ICR13 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4D])) -#define MCF_INTC0_ICR14 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4E])) -#define MCF_INTC0_ICR15 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4F])) -#define MCF_INTC0_ICR16 (*(vuint8 *)(void*)(&__IPSBAR[0x000C50])) -#define MCF_INTC0_ICR17 (*(vuint8 *)(void*)(&__IPSBAR[0x000C51])) -#define MCF_INTC0_ICR18 (*(vuint8 *)(void*)(&__IPSBAR[0x000C52])) -#define MCF_INTC0_ICR19 (*(vuint8 *)(void*)(&__IPSBAR[0x000C53])) -#define MCF_INTC0_ICR20 (*(vuint8 *)(void*)(&__IPSBAR[0x000C54])) -#define MCF_INTC0_ICR21 (*(vuint8 *)(void*)(&__IPSBAR[0x000C55])) -#define MCF_INTC0_ICR22 (*(vuint8 *)(void*)(&__IPSBAR[0x000C56])) -#define MCF_INTC0_ICR23 (*(vuint8 *)(void*)(&__IPSBAR[0x000C57])) -#define MCF_INTC0_ICR24 (*(vuint8 *)(void*)(&__IPSBAR[0x000C58])) -#define MCF_INTC0_ICR25 (*(vuint8 *)(void*)(&__IPSBAR[0x000C59])) -#define MCF_INTC0_ICR26 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5A])) -#define MCF_INTC0_ICR27 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5B])) -#define MCF_INTC0_ICR28 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5C])) -#define MCF_INTC0_ICR29 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5D])) -#define MCF_INTC0_ICR30 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5E])) -#define MCF_INTC0_ICR31 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5F])) -#define MCF_INTC0_ICR32 (*(vuint8 *)(void*)(&__IPSBAR[0x000C60])) -#define MCF_INTC0_ICR33 (*(vuint8 *)(void*)(&__IPSBAR[0x000C61])) -#define MCF_INTC0_ICR34 (*(vuint8 *)(void*)(&__IPSBAR[0x000C62])) -#define MCF_INTC0_ICR35 (*(vuint8 *)(void*)(&__IPSBAR[0x000C63])) -#define MCF_INTC0_ICR36 (*(vuint8 *)(void*)(&__IPSBAR[0x000C64])) -#define MCF_INTC0_ICR37 (*(vuint8 *)(void*)(&__IPSBAR[0x000C65])) -#define MCF_INTC0_ICR38 (*(vuint8 *)(void*)(&__IPSBAR[0x000C66])) -#define MCF_INTC0_ICR39 (*(vuint8 *)(void*)(&__IPSBAR[0x000C67])) -#define MCF_INTC0_ICR40 (*(vuint8 *)(void*)(&__IPSBAR[0x000C68])) -#define MCF_INTC0_ICR41 (*(vuint8 *)(void*)(&__IPSBAR[0x000C69])) -#define MCF_INTC0_ICR42 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6A])) -#define MCF_INTC0_ICR43 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6B])) -#define MCF_INTC0_ICR44 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6C])) -#define MCF_INTC0_ICR45 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6D])) -#define MCF_INTC0_ICR46 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6E])) -#define MCF_INTC0_ICR47 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6F])) -#define MCF_INTC0_ICR48 (*(vuint8 *)(void*)(&__IPSBAR[0x000C70])) -#define MCF_INTC0_ICR49 (*(vuint8 *)(void*)(&__IPSBAR[0x000C71])) -#define MCF_INTC0_ICR50 (*(vuint8 *)(void*)(&__IPSBAR[0x000C72])) -#define MCF_INTC0_ICR51 (*(vuint8 *)(void*)(&__IPSBAR[0x000C73])) -#define MCF_INTC0_ICR52 (*(vuint8 *)(void*)(&__IPSBAR[0x000C74])) -#define MCF_INTC0_ICR53 (*(vuint8 *)(void*)(&__IPSBAR[0x000C75])) -#define MCF_INTC0_ICR54 (*(vuint8 *)(void*)(&__IPSBAR[0x000C76])) -#define MCF_INTC0_ICR55 (*(vuint8 *)(void*)(&__IPSBAR[0x000C77])) -#define MCF_INTC0_ICR56 (*(vuint8 *)(void*)(&__IPSBAR[0x000C78])) -#define MCF_INTC0_ICR57 (*(vuint8 *)(void*)(&__IPSBAR[0x000C79])) -#define MCF_INTC0_ICR58 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7A])) -#define MCF_INTC0_ICR59 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7B])) -#define MCF_INTC0_ICR60 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7C])) -#define MCF_INTC0_ICR61 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7D])) -#define MCF_INTC0_ICR62 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7E])) -#define MCF_INTC0_ICR63 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7F])) -#define MCF_INTC0_ICRn(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000C40+((x)*0x001)])) -#define MCF_INTC0_SWIACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE0])) -#define MCF_INTC0_L1IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE4])) -#define MCF_INTC0_L2IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE8])) -#define MCF_INTC0_L3IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CEC])) -#define MCF_INTC0_L4IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF0])) -#define MCF_INTC0_L5IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF4])) -#define MCF_INTC0_L6IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF8])) -#define MCF_INTC0_L7IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CFC])) -#define MCF_INTC0_LnIACK(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000CE4+((x)*0x004)])) - -/* Bit definitions and macros for MCF_INTC0_IPRH */ -#define MCF_INTC0_IPRH_INT32 (0x00000001) -#define MCF_INTC0_IPRH_INT33 (0x00000002) -#define MCF_INTC0_IPRH_INT34 (0x00000004) -#define MCF_INTC0_IPRH_INT35 (0x00000008) -#define MCF_INTC0_IPRH_INT36 (0x00000010) -#define MCF_INTC0_IPRH_INT37 (0x00000020) -#define MCF_INTC0_IPRH_INT38 (0x00000040) -#define MCF_INTC0_IPRH_INT39 (0x00000080) -#define MCF_INTC0_IPRH_INT40 (0x00000100) -#define MCF_INTC0_IPRH_INT41 (0x00000200) -#define MCF_INTC0_IPRH_INT42 (0x00000400) -#define MCF_INTC0_IPRH_INT43 (0x00000800) -#define MCF_INTC0_IPRH_INT44 (0x00001000) -#define MCF_INTC0_IPRH_INT45 (0x00002000) -#define MCF_INTC0_IPRH_INT46 (0x00004000) -#define MCF_INTC0_IPRH_INT47 (0x00008000) -#define MCF_INTC0_IPRH_INT48 (0x00010000) -#define MCF_INTC0_IPRH_INT49 (0x00020000) -#define MCF_INTC0_IPRH_INT50 (0x00040000) -#define MCF_INTC0_IPRH_INT51 (0x00080000) -#define MCF_INTC0_IPRH_INT52 (0x00100000) -#define MCF_INTC0_IPRH_INT53 (0x00200000) -#define MCF_INTC0_IPRH_INT54 (0x00400000) -#define MCF_INTC0_IPRH_INT55 (0x00800000) -#define MCF_INTC0_IPRH_INT56 (0x01000000) -#define MCF_INTC0_IPRH_INT57 (0x02000000) -#define MCF_INTC0_IPRH_INT58 (0x04000000) -#define MCF_INTC0_IPRH_INT59 (0x08000000) -#define MCF_INTC0_IPRH_INT60 (0x10000000) -#define MCF_INTC0_IPRH_INT61 (0x20000000) -#define MCF_INTC0_IPRH_INT62 (0x40000000) -#define MCF_INTC0_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IPRL */ -#define MCF_INTC0_IPRL_INT1 (0x00000002) -#define MCF_INTC0_IPRL_INT2 (0x00000004) -#define MCF_INTC0_IPRL_INT3 (0x00000008) -#define MCF_INTC0_IPRL_INT4 (0x00000010) -#define MCF_INTC0_IPRL_INT5 (0x00000020) -#define MCF_INTC0_IPRL_INT6 (0x00000040) -#define MCF_INTC0_IPRL_INT7 (0x00000080) -#define MCF_INTC0_IPRL_INT8 (0x00000100) -#define MCF_INTC0_IPRL_INT9 (0x00000200) -#define MCF_INTC0_IPRL_INT10 (0x00000400) -#define MCF_INTC0_IPRL_INT11 (0x00000800) -#define MCF_INTC0_IPRL_INT12 (0x00001000) -#define MCF_INTC0_IPRL_INT13 (0x00002000) -#define MCF_INTC0_IPRL_INT14 (0x00004000) -#define MCF_INTC0_IPRL_INT15 (0x00008000) -#define MCF_INTC0_IPRL_INT16 (0x00010000) -#define MCF_INTC0_IPRL_INT17 (0x00020000) -#define MCF_INTC0_IPRL_INT18 (0x00040000) -#define MCF_INTC0_IPRL_INT19 (0x00080000) -#define MCF_INTC0_IPRL_INT20 (0x00100000) -#define MCF_INTC0_IPRL_INT21 (0x00200000) -#define MCF_INTC0_IPRL_INT22 (0x00400000) -#define MCF_INTC0_IPRL_INT23 (0x00800000) -#define MCF_INTC0_IPRL_INT24 (0x01000000) -#define MCF_INTC0_IPRL_INT25 (0x02000000) -#define MCF_INTC0_IPRL_INT26 (0x04000000) -#define MCF_INTC0_IPRL_INT27 (0x08000000) -#define MCF_INTC0_IPRL_INT28 (0x10000000) -#define MCF_INTC0_IPRL_INT29 (0x20000000) -#define MCF_INTC0_IPRL_INT30 (0x40000000) -#define MCF_INTC0_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IMRH */ -#define MCF_INTC0_IMRH_INT_MASK32 (0x00000001) -#define MCF_INTC0_IMRH_INT_MASK33 (0x00000002) -#define MCF_INTC0_IMRH_INT_MASK34 (0x00000004) -#define MCF_INTC0_IMRH_INT_MASK35 (0x00000008) -#define MCF_INTC0_IMRH_INT_MASK36 (0x00000010) -#define MCF_INTC0_IMRH_INT_MASK37 (0x00000020) -#define MCF_INTC0_IMRH_INT_MASK38 (0x00000040) -#define MCF_INTC0_IMRH_INT_MASK39 (0x00000080) -#define MCF_INTC0_IMRH_INT_MASK40 (0x00000100) -#define MCF_INTC0_IMRH_INT_MASK41 (0x00000200) -#define MCF_INTC0_IMRH_INT_MASK42 (0x00000400) -#define MCF_INTC0_IMRH_INT_MASK43 (0x00000800) -#define MCF_INTC0_IMRH_INT_MASK44 (0x00001000) -#define MCF_INTC0_IMRH_INT_MASK45 (0x00002000) -#define MCF_INTC0_IMRH_INT_MASK46 (0x00004000) -#define MCF_INTC0_IMRH_INT_MASK47 (0x00008000) -#define MCF_INTC0_IMRH_INT_MASK48 (0x00010000) -#define MCF_INTC0_IMRH_INT_MASK49 (0x00020000) -#define MCF_INTC0_IMRH_INT_MASK50 (0x00040000) -#define MCF_INTC0_IMRH_INT_MASK51 (0x00080000) -#define MCF_INTC0_IMRH_INT_MASK52 (0x00100000) -#define MCF_INTC0_IMRH_INT_MASK53 (0x00200000) -#define MCF_INTC0_IMRH_INT_MASK54 (0x00400000) -#define MCF_INTC0_IMRH_INT_MASK55 (0x00800000) -#define MCF_INTC0_IMRH_INT_MASK56 (0x01000000) -#define MCF_INTC0_IMRH_INT_MASK57 (0x02000000) -#define MCF_INTC0_IMRH_INT_MASK58 (0x04000000) -#define MCF_INTC0_IMRH_INT_MASK59 (0x08000000) -#define MCF_INTC0_IMRH_INT_MASK60 (0x10000000) -#define MCF_INTC0_IMRH_INT_MASK61 (0x20000000) -#define MCF_INTC0_IMRH_INT_MASK62 (0x40000000) -#define MCF_INTC0_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IMRL */ -#define MCF_INTC0_IMRL_MASKALL (0x00000001) -#define MCF_INTC0_IMRL_INT_MASK1 (0x00000002) -#define MCF_INTC0_IMRL_INT_MASK2 (0x00000004) -#define MCF_INTC0_IMRL_INT_MASK3 (0x00000008) -#define MCF_INTC0_IMRL_INT_MASK4 (0x00000010) -#define MCF_INTC0_IMRL_INT_MASK5 (0x00000020) -#define MCF_INTC0_IMRL_INT_MASK6 (0x00000040) -#define MCF_INTC0_IMRL_INT_MASK7 (0x00000080) -#define MCF_INTC0_IMRL_INT_MASK8 (0x00000100) -#define MCF_INTC0_IMRL_INT_MASK9 (0x00000200) -#define MCF_INTC0_IMRL_INT_MASK10 (0x00000400) -#define MCF_INTC0_IMRL_INT_MASK11 (0x00000800) -#define MCF_INTC0_IMRL_INT_MASK12 (0x00001000) -#define MCF_INTC0_IMRL_INT_MASK13 (0x00002000) -#define MCF_INTC0_IMRL_INT_MASK14 (0x00004000) -#define MCF_INTC0_IMRL_INT_MASK15 (0x00008000) -#define MCF_INTC0_IMRL_INT_MASK16 (0x00010000) -#define MCF_INTC0_IMRL_INT_MASK17 (0x00020000) -#define MCF_INTC0_IMRL_INT_MASK18 (0x00040000) -#define MCF_INTC0_IMRL_INT_MASK19 (0x00080000) -#define MCF_INTC0_IMRL_INT_MASK20 (0x00100000) -#define MCF_INTC0_IMRL_INT_MASK21 (0x00200000) -#define MCF_INTC0_IMRL_INT_MASK22 (0x00400000) -#define MCF_INTC0_IMRL_INT_MASK23 (0x00800000) -#define MCF_INTC0_IMRL_INT_MASK24 (0x01000000) -#define MCF_INTC0_IMRL_INT_MASK25 (0x02000000) -#define MCF_INTC0_IMRL_INT_MASK26 (0x04000000) -#define MCF_INTC0_IMRL_INT_MASK27 (0x08000000) -#define MCF_INTC0_IMRL_INT_MASK28 (0x10000000) -#define MCF_INTC0_IMRL_INT_MASK29 (0x20000000) -#define MCF_INTC0_IMRL_INT_MASK30 (0x40000000) -#define MCF_INTC0_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_INTFRCH */ -#define MCF_INTC0_INTFRCH_INTFRC32 (0x00000001) -#define MCF_INTC0_INTFRCH_INTFRC33 (0x00000002) -#define MCF_INTC0_INTFRCH_INTFRC34 (0x00000004) -#define MCF_INTC0_INTFRCH_INTFRC35 (0x00000008) -#define MCF_INTC0_INTFRCH_INTFRC36 (0x00000010) -#define MCF_INTC0_INTFRCH_INTFRC37 (0x00000020) -#define MCF_INTC0_INTFRCH_INTFRC38 (0x00000040) -#define MCF_INTC0_INTFRCH_INTFRC39 (0x00000080) -#define MCF_INTC0_INTFRCH_INTFRC40 (0x00000100) -#define MCF_INTC0_INTFRCH_INTFRC41 (0x00000200) -#define MCF_INTC0_INTFRCH_INTFRC42 (0x00000400) -#define MCF_INTC0_INTFRCH_INTFRC43 (0x00000800) -#define MCF_INTC0_INTFRCH_INTFRC44 (0x00001000) -#define MCF_INTC0_INTFRCH_INTFRC45 (0x00002000) -#define MCF_INTC0_INTFRCH_INTFRC46 (0x00004000) -#define MCF_INTC0_INTFRCH_INTFRC47 (0x00008000) -#define MCF_INTC0_INTFRCH_INTFRC48 (0x00010000) -#define MCF_INTC0_INTFRCH_INTFRC49 (0x00020000) -#define MCF_INTC0_INTFRCH_INTFRC50 (0x00040000) -#define MCF_INTC0_INTFRCH_INTFRC51 (0x00080000) -#define MCF_INTC0_INTFRCH_INTFRC52 (0x00100000) -#define MCF_INTC0_INTFRCH_INTFRC53 (0x00200000) -#define MCF_INTC0_INTFRCH_INTFRC54 (0x00400000) -#define MCF_INTC0_INTFRCH_INTFRC55 (0x00800000) -#define MCF_INTC0_INTFRCH_INTFRC56 (0x01000000) -#define MCF_INTC0_INTFRCH_INTFRC57 (0x02000000) -#define MCF_INTC0_INTFRCH_INTFRC58 (0x04000000) -#define MCF_INTC0_INTFRCH_INTFRC59 (0x08000000) -#define MCF_INTC0_INTFRCH_INTFRC60 (0x10000000) -#define MCF_INTC0_INTFRCH_INTFRC61 (0x20000000) -#define MCF_INTC0_INTFRCH_INTFRC62 (0x40000000) -#define MCF_INTC0_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_INTFRCL */ -#define MCF_INTC0_INTFRCL_INTFRC1 (0x00000002) -#define MCF_INTC0_INTFRCL_INTFRC2 (0x00000004) -#define MCF_INTC0_INTFRCL_INTFRC3 (0x00000008) -#define MCF_INTC0_INTFRCL_INTFRC4 (0x00000010) -#define MCF_INTC0_INTFRCL_INTFRC5 (0x00000020) -#define MCF_INTC0_INTFRCL_INT6 (0x00000040) -#define MCF_INTC0_INTFRCL_INT7 (0x00000080) -#define MCF_INTC0_INTFRCL_INT8 (0x00000100) -#define MCF_INTC0_INTFRCL_INT9 (0x00000200) -#define MCF_INTC0_INTFRCL_INT10 (0x00000400) -#define MCF_INTC0_INTFRCL_INTFRC11 (0x00000800) -#define MCF_INTC0_INTFRCL_INTFRC12 (0x00001000) -#define MCF_INTC0_INTFRCL_INTFRC13 (0x00002000) -#define MCF_INTC0_INTFRCL_INTFRC14 (0x00004000) -#define MCF_INTC0_INTFRCL_INT15 (0x00008000) -#define MCF_INTC0_INTFRCL_INTFRC16 (0x00010000) -#define MCF_INTC0_INTFRCL_INTFRC17 (0x00020000) -#define MCF_INTC0_INTFRCL_INTFRC18 (0x00040000) -#define MCF_INTC0_INTFRCL_INTFRC19 (0x00080000) -#define MCF_INTC0_INTFRCL_INTFRC20 (0x00100000) -#define MCF_INTC0_INTFRCL_INTFRC21 (0x00200000) -#define MCF_INTC0_INTFRCL_INTFRC22 (0x00400000) -#define MCF_INTC0_INTFRCL_INTFRC23 (0x00800000) -#define MCF_INTC0_INTFRCL_INTFRC24 (0x01000000) -#define MCF_INTC0_INTFRCL_INTFRC25 (0x02000000) -#define MCF_INTC0_INTFRCL_INTFRC26 (0x04000000) -#define MCF_INTC0_INTFRCL_INTFRC27 (0x08000000) -#define MCF_INTC0_INTFRCL_INTFRC28 (0x10000000) -#define MCF_INTC0_INTFRCL_INTFRC29 (0x20000000) -#define MCF_INTC0_INTFRCL_INTFRC30 (0x40000000) -#define MCF_INTC0_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IRLR */ -#define MCF_INTC0_IRLR_IRQ(x) (((x)&0x7F)<<1) - -/* Bit definitions and macros for MCF_INTC0_IACKLPR */ -#define MCF_INTC0_IACKLPR_PRI(x) (((x)&0x0F)<<0) -#define MCF_INTC0_IACKLPR_LEVEL(x) (((x)&0x07)<<4) - -/* Bit definitions and macros for MCF_INTC0_ICRn */ -#define MCF_INTC0_ICRn_IP(x) (((x)&0x07)<<0) -#define MCF_INTC0_ICRn_IL(x) (((x)&0x07)<<3) - -/********************************************************************/ - -#endif /* __MCF523X_INTC0_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_intc1.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_intc1.h deleted file mode 100644 index f8f76658..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_intc1.h +++ /dev/null @@ -1,330 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_intc1.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_INTC1_H__ -#define __MCF523X_INTC1_H__ - -/********************************************************************* -* -* Interrupt Controller 1 (INTC1) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_INTC1_IPRH (*(vuint32*)(void*)(&__IPSBAR[0x000D00])) -#define MCF_INTC1_IPRL (*(vuint32*)(void*)(&__IPSBAR[0x000D04])) -#define MCF_INTC1_IMRH (*(vuint32*)(void*)(&__IPSBAR[0x000D08])) -#define MCF_INTC1_IMRL (*(vuint32*)(void*)(&__IPSBAR[0x000D0C])) -#define MCF_INTC1_INTFRCH (*(vuint32*)(void*)(&__IPSBAR[0x000D10])) -#define MCF_INTC1_INTFRCL (*(vuint32*)(void*)(&__IPSBAR[0x000D14])) -#define MCF_INTC1_IRLR (*(vuint8 *)(void*)(&__IPSBAR[0x000D18])) -#define MCF_INTC1_IACKLPR (*(vuint8 *)(void*)(&__IPSBAR[0x000D19])) -#define MCF_INTC1_ICR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000D40])) -#define MCF_INTC1_ICR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000D41])) -#define MCF_INTC1_ICR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000D42])) -#define MCF_INTC1_ICR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000D43])) -#define MCF_INTC1_ICR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000D44])) -#define MCF_INTC1_ICR5 (*(vuint8 *)(void*)(&__IPSBAR[0x000D45])) -#define MCF_INTC1_ICR6 (*(vuint8 *)(void*)(&__IPSBAR[0x000D46])) -#define MCF_INTC1_ICR7 (*(vuint8 *)(void*)(&__IPSBAR[0x000D47])) -#define MCF_INTC1_ICR8 (*(vuint8 *)(void*)(&__IPSBAR[0x000D48])) -#define MCF_INTC1_ICR9 (*(vuint8 *)(void*)(&__IPSBAR[0x000D49])) -#define MCF_INTC1_ICR10 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4A])) -#define MCF_INTC1_ICR11 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4B])) -#define MCF_INTC1_ICR12 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4C])) -#define MCF_INTC1_ICR13 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4D])) -#define MCF_INTC1_ICR14 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4E])) -#define MCF_INTC1_ICR15 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4F])) -#define MCF_INTC1_ICR16 (*(vuint8 *)(void*)(&__IPSBAR[0x000D50])) -#define MCF_INTC1_ICR17 (*(vuint8 *)(void*)(&__IPSBAR[0x000D51])) -#define MCF_INTC1_ICR18 (*(vuint8 *)(void*)(&__IPSBAR[0x000D52])) -#define MCF_INTC1_ICR19 (*(vuint8 *)(void*)(&__IPSBAR[0x000D53])) -#define MCF_INTC1_ICR20 (*(vuint8 *)(void*)(&__IPSBAR[0x000D54])) -#define MCF_INTC1_ICR21 (*(vuint8 *)(void*)(&__IPSBAR[0x000D55])) -#define MCF_INTC1_ICR22 (*(vuint8 *)(void*)(&__IPSBAR[0x000D56])) -#define MCF_INTC1_ICR23 (*(vuint8 *)(void*)(&__IPSBAR[0x000D57])) -#define MCF_INTC1_ICR24 (*(vuint8 *)(void*)(&__IPSBAR[0x000D58])) -#define MCF_INTC1_ICR25 (*(vuint8 *)(void*)(&__IPSBAR[0x000D59])) -#define MCF_INTC1_ICR26 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5A])) -#define MCF_INTC1_ICR27 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5B])) -#define MCF_INTC1_ICR28 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5C])) -#define MCF_INTC1_ICR29 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5D])) -#define MCF_INTC1_ICR30 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5E])) -#define MCF_INTC1_ICR31 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5F])) -#define MCF_INTC1_ICR32 (*(vuint8 *)(void*)(&__IPSBAR[0x000D60])) -#define MCF_INTC1_ICR33 (*(vuint8 *)(void*)(&__IPSBAR[0x000D61])) -#define MCF_INTC1_ICR34 (*(vuint8 *)(void*)(&__IPSBAR[0x000D62])) -#define MCF_INTC1_ICR35 (*(vuint8 *)(void*)(&__IPSBAR[0x000D63])) -#define MCF_INTC1_ICR36 (*(vuint8 *)(void*)(&__IPSBAR[0x000D64])) -#define MCF_INTC1_ICR37 (*(vuint8 *)(void*)(&__IPSBAR[0x000D65])) -#define MCF_INTC1_ICR38 (*(vuint8 *)(void*)(&__IPSBAR[0x000D66])) -#define MCF_INTC1_ICR39 (*(vuint8 *)(void*)(&__IPSBAR[0x000D67])) -#define MCF_INTC1_ICR40 (*(vuint8 *)(void*)(&__IPSBAR[0x000D68])) -#define MCF_INTC1_ICR41 (*(vuint8 *)(void*)(&__IPSBAR[0x000D69])) -#define MCF_INTC1_ICR42 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6A])) -#define MCF_INTC1_ICR43 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6B])) -#define MCF_INTC1_ICR44 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6C])) -#define MCF_INTC1_ICR45 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6D])) -#define MCF_INTC1_ICR46 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6E])) -#define MCF_INTC1_ICR47 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6F])) -#define MCF_INTC1_ICR48 (*(vuint8 *)(void*)(&__IPSBAR[0x000D70])) -#define MCF_INTC1_ICR49 (*(vuint8 *)(void*)(&__IPSBAR[0x000D71])) -#define MCF_INTC1_ICR50 (*(vuint8 *)(void*)(&__IPSBAR[0x000D72])) -#define MCF_INTC1_ICR51 (*(vuint8 *)(void*)(&__IPSBAR[0x000D73])) -#define MCF_INTC1_ICR52 (*(vuint8 *)(void*)(&__IPSBAR[0x000D74])) -#define MCF_INTC1_ICR53 (*(vuint8 *)(void*)(&__IPSBAR[0x000D75])) -#define MCF_INTC1_ICR54 (*(vuint8 *)(void*)(&__IPSBAR[0x000D76])) -#define MCF_INTC1_ICR55 (*(vuint8 *)(void*)(&__IPSBAR[0x000D77])) -#define MCF_INTC1_ICR56 (*(vuint8 *)(void*)(&__IPSBAR[0x000D78])) -#define MCF_INTC1_ICR57 (*(vuint8 *)(void*)(&__IPSBAR[0x000D79])) -#define MCF_INTC1_ICR58 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7A])) -#define MCF_INTC1_ICR59 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7B])) -#define MCF_INTC1_ICR60 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7C])) -#define MCF_INTC1_ICR61 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7D])) -#define MCF_INTC1_ICR62 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7E])) -#define MCF_INTC1_ICR63 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7F])) -#define MCF_INTC1_ICRn(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000D40+((x)*0x001)])) -#define MCF_INTC1_SWIACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DE0])) -#define MCF_INTC1_L1IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DE4])) -#define MCF_INTC1_L2IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DE8])) -#define MCF_INTC1_L3IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DEC])) -#define MCF_INTC1_L4IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DF0])) -#define MCF_INTC1_L5IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DF4])) -#define MCF_INTC1_L6IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DF8])) -#define MCF_INTC1_L7IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DFC])) -#define MCF_INTC1_LnIACK(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000DE4+((x)*0x004)])) - -/* Bit definitions and macros for MCF_INTC1_IPRH */ -#define MCF_INTC1_IPRH_INT32 (0x00000001) -#define MCF_INTC1_IPRH_INT33 (0x00000002) -#define MCF_INTC1_IPRH_INT34 (0x00000004) -#define MCF_INTC1_IPRH_INT35 (0x00000008) -#define MCF_INTC1_IPRH_INT36 (0x00000010) -#define MCF_INTC1_IPRH_INT37 (0x00000020) -#define MCF_INTC1_IPRH_INT38 (0x00000040) -#define MCF_INTC1_IPRH_INT39 (0x00000080) -#define MCF_INTC1_IPRH_INT40 (0x00000100) -#define MCF_INTC1_IPRH_INT41 (0x00000200) -#define MCF_INTC1_IPRH_INT42 (0x00000400) -#define MCF_INTC1_IPRH_INT43 (0x00000800) -#define MCF_INTC1_IPRH_INT44 (0x00001000) -#define MCF_INTC1_IPRH_INT45 (0x00002000) -#define MCF_INTC1_IPRH_INT46 (0x00004000) -#define MCF_INTC1_IPRH_INT47 (0x00008000) -#define MCF_INTC1_IPRH_INT48 (0x00010000) -#define MCF_INTC1_IPRH_INT49 (0x00020000) -#define MCF_INTC1_IPRH_INT50 (0x00040000) -#define MCF_INTC1_IPRH_INT51 (0x00080000) -#define MCF_INTC1_IPRH_INT52 (0x00100000) -#define MCF_INTC1_IPRH_INT53 (0x00200000) -#define MCF_INTC1_IPRH_INT54 (0x00400000) -#define MCF_INTC1_IPRH_INT55 (0x00800000) -#define MCF_INTC1_IPRH_INT56 (0x01000000) -#define MCF_INTC1_IPRH_INT57 (0x02000000) -#define MCF_INTC1_IPRH_INT58 (0x04000000) -#define MCF_INTC1_IPRH_INT59 (0x08000000) -#define MCF_INTC1_IPRH_INT60 (0x10000000) -#define MCF_INTC1_IPRH_INT61 (0x20000000) -#define MCF_INTC1_IPRH_INT62 (0x40000000) -#define MCF_INTC1_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IPRL */ -#define MCF_INTC1_IPRL_INT1 (0x00000002) -#define MCF_INTC1_IPRL_INT2 (0x00000004) -#define MCF_INTC1_IPRL_INT3 (0x00000008) -#define MCF_INTC1_IPRL_INT4 (0x00000010) -#define MCF_INTC1_IPRL_INT5 (0x00000020) -#define MCF_INTC1_IPRL_INT6 (0x00000040) -#define MCF_INTC1_IPRL_INT7 (0x00000080) -#define MCF_INTC1_IPRL_INT8 (0x00000100) -#define MCF_INTC1_IPRL_INT9 (0x00000200) -#define MCF_INTC1_IPRL_INT10 (0x00000400) -#define MCF_INTC1_IPRL_INT11 (0x00000800) -#define MCF_INTC1_IPRL_INT12 (0x00001000) -#define MCF_INTC1_IPRL_INT13 (0x00002000) -#define MCF_INTC1_IPRL_INT14 (0x00004000) -#define MCF_INTC1_IPRL_INT15 (0x00008000) -#define MCF_INTC1_IPRL_INT16 (0x00010000) -#define MCF_INTC1_IPRL_INT17 (0x00020000) -#define MCF_INTC1_IPRL_INT18 (0x00040000) -#define MCF_INTC1_IPRL_INT19 (0x00080000) -#define MCF_INTC1_IPRL_INT20 (0x00100000) -#define MCF_INTC1_IPRL_INT21 (0x00200000) -#define MCF_INTC1_IPRL_INT22 (0x00400000) -#define MCF_INTC1_IPRL_INT23 (0x00800000) -#define MCF_INTC1_IPRL_INT24 (0x01000000) -#define MCF_INTC1_IPRL_INT25 (0x02000000) -#define MCF_INTC1_IPRL_INT26 (0x04000000) -#define MCF_INTC1_IPRL_INT27 (0x08000000) -#define MCF_INTC1_IPRL_INT28 (0x10000000) -#define MCF_INTC1_IPRL_INT29 (0x20000000) -#define MCF_INTC1_IPRL_INT30 (0x40000000) -#define MCF_INTC1_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IMRH */ -#define MCF_INTC1_IMRH_INT_MASK32 (0x00000001) -#define MCF_INTC1_IMRH_INT_MASK33 (0x00000002) -#define MCF_INTC1_IMRH_INT_MASK34 (0x00000004) -#define MCF_INTC1_IMRH_INT_MASK35 (0x00000008) -#define MCF_INTC1_IMRH_INT_MASK36 (0x00000010) -#define MCF_INTC1_IMRH_INT_MASK37 (0x00000020) -#define MCF_INTC1_IMRH_INT_MASK38 (0x00000040) -#define MCF_INTC1_IMRH_INT_MASK39 (0x00000080) -#define MCF_INTC1_IMRH_INT_MASK40 (0x00000100) -#define MCF_INTC1_IMRH_INT_MASK41 (0x00000200) -#define MCF_INTC1_IMRH_INT_MASK42 (0x00000400) -#define MCF_INTC1_IMRH_INT_MASK43 (0x00000800) -#define MCF_INTC1_IMRH_INT_MASK44 (0x00001000) -#define MCF_INTC1_IMRH_INT_MASK45 (0x00002000) -#define MCF_INTC1_IMRH_INT_MASK46 (0x00004000) -#define MCF_INTC1_IMRH_INT_MASK47 (0x00008000) -#define MCF_INTC1_IMRH_INT_MASK48 (0x00010000) -#define MCF_INTC1_IMRH_INT_MASK49 (0x00020000) -#define MCF_INTC1_IMRH_INT_MASK50 (0x00040000) -#define MCF_INTC1_IMRH_INT_MASK51 (0x00080000) -#define MCF_INTC1_IMRH_INT_MASK52 (0x00100000) -#define MCF_INTC1_IMRH_INT_MASK53 (0x00200000) -#define MCF_INTC1_IMRH_INT_MASK54 (0x00400000) -#define MCF_INTC1_IMRH_INT_MASK55 (0x00800000) -#define MCF_INTC1_IMRH_INT_MASK56 (0x01000000) -#define MCF_INTC1_IMRH_INT_MASK57 (0x02000000) -#define MCF_INTC1_IMRH_INT_MASK58 (0x04000000) -#define MCF_INTC1_IMRH_INT_MASK59 (0x08000000) -#define MCF_INTC1_IMRH_INT_MASK60 (0x10000000) -#define MCF_INTC1_IMRH_INT_MASK61 (0x20000000) -#define MCF_INTC1_IMRH_INT_MASK62 (0x40000000) -#define MCF_INTC1_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IMRL */ -#define MCF_INTC1_IMRL_MASKALL (0x00000001) -#define MCF_INTC1_IMRL_INT_MASK1 (0x00000002) -#define MCF_INTC1_IMRL_INT_MASK2 (0x00000004) -#define MCF_INTC1_IMRL_INT_MASK3 (0x00000008) -#define MCF_INTC1_IMRL_INT_MASK4 (0x00000010) -#define MCF_INTC1_IMRL_INT_MASK5 (0x00000020) -#define MCF_INTC1_IMRL_INT_MASK6 (0x00000040) -#define MCF_INTC1_IMRL_INT_MASK7 (0x00000080) -#define MCF_INTC1_IMRL_INT_MASK8 (0x00000100) -#define MCF_INTC1_IMRL_INT_MASK9 (0x00000200) -#define MCF_INTC1_IMRL_INT_MASK10 (0x00000400) -#define MCF_INTC1_IMRL_INT_MASK11 (0x00000800) -#define MCF_INTC1_IMRL_INT_MASK12 (0x00001000) -#define MCF_INTC1_IMRL_INT_MASK13 (0x00002000) -#define MCF_INTC1_IMRL_INT_MASK14 (0x00004000) -#define MCF_INTC1_IMRL_INT_MASK15 (0x00008000) -#define MCF_INTC1_IMRL_INT_MASK16 (0x00010000) -#define MCF_INTC1_IMRL_INT_MASK17 (0x00020000) -#define MCF_INTC1_IMRL_INT_MASK18 (0x00040000) -#define MCF_INTC1_IMRL_INT_MASK19 (0x00080000) -#define MCF_INTC1_IMRL_INT_MASK20 (0x00100000) -#define MCF_INTC1_IMRL_INT_MASK21 (0x00200000) -#define MCF_INTC1_IMRL_INT_MASK22 (0x00400000) -#define MCF_INTC1_IMRL_INT_MASK23 (0x00800000) -#define MCF_INTC1_IMRL_INT_MASK24 (0x01000000) -#define MCF_INTC1_IMRL_INT_MASK25 (0x02000000) -#define MCF_INTC1_IMRL_INT_MASK26 (0x04000000) -#define MCF_INTC1_IMRL_INT_MASK27 (0x08000000) -#define MCF_INTC1_IMRL_INT_MASK28 (0x10000000) -#define MCF_INTC1_IMRL_INT_MASK29 (0x20000000) -#define MCF_INTC1_IMRL_INT_MASK30 (0x40000000) -#define MCF_INTC1_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_INTFRCH */ -#define MCF_INTC1_INTFRCH_INTFRC32 (0x00000001) -#define MCF_INTC1_INTFRCH_INTFRC33 (0x00000002) -#define MCF_INTC1_INTFRCH_INTFRC34 (0x00000004) -#define MCF_INTC1_INTFRCH_INTFRC35 (0x00000008) -#define MCF_INTC1_INTFRCH_INTFRC36 (0x00000010) -#define MCF_INTC1_INTFRCH_INTFRC37 (0x00000020) -#define MCF_INTC1_INTFRCH_INTFRC38 (0x00000040) -#define MCF_INTC1_INTFRCH_INTFRC39 (0x00000080) -#define MCF_INTC1_INTFRCH_INTFRC40 (0x00000100) -#define MCF_INTC1_INTFRCH_INTFRC41 (0x00000200) -#define MCF_INTC1_INTFRCH_INTFRC42 (0x00000400) -#define MCF_INTC1_INTFRCH_INTFRC43 (0x00000800) -#define MCF_INTC1_INTFRCH_INTFRC44 (0x00001000) -#define MCF_INTC1_INTFRCH_INTFRC45 (0x00002000) -#define MCF_INTC1_INTFRCH_INTFRC46 (0x00004000) -#define MCF_INTC1_INTFRCH_INTFRC47 (0x00008000) -#define MCF_INTC1_INTFRCH_INTFRC48 (0x00010000) -#define MCF_INTC1_INTFRCH_INTFRC49 (0x00020000) -#define MCF_INTC1_INTFRCH_INTFRC50 (0x00040000) -#define MCF_INTC1_INTFRCH_INTFRC51 (0x00080000) -#define MCF_INTC1_INTFRCH_INTFRC52 (0x00100000) -#define MCF_INTC1_INTFRCH_INTFRC53 (0x00200000) -#define MCF_INTC1_INTFRCH_INTFRC54 (0x00400000) -#define MCF_INTC1_INTFRCH_INTFRC55 (0x00800000) -#define MCF_INTC1_INTFRCH_INTFRC56 (0x01000000) -#define MCF_INTC1_INTFRCH_INTFRC57 (0x02000000) -#define MCF_INTC1_INTFRCH_INTFRC58 (0x04000000) -#define MCF_INTC1_INTFRCH_INTFRC59 (0x08000000) -#define MCF_INTC1_INTFRCH_INTFRC60 (0x10000000) -#define MCF_INTC1_INTFRCH_INTFRC61 (0x20000000) -#define MCF_INTC1_INTFRCH_INTFRC62 (0x40000000) -#define MCF_INTC1_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_INTFRCL */ -#define MCF_INTC1_INTFRCL_INTFRC1 (0x00000002) -#define MCF_INTC1_INTFRCL_INTFRC2 (0x00000004) -#define MCF_INTC1_INTFRCL_INTFRC3 (0x00000008) -#define MCF_INTC1_INTFRCL_INTFRC4 (0x00000010) -#define MCF_INTC1_INTFRCL_INTFRC5 (0x00000020) -#define MCF_INTC1_INTFRCL_INT6 (0x00000040) -#define MCF_INTC1_INTFRCL_INT7 (0x00000080) -#define MCF_INTC1_INTFRCL_INT8 (0x00000100) -#define MCF_INTC1_INTFRCL_INT9 (0x00000200) -#define MCF_INTC1_INTFRCL_INT10 (0x00000400) -#define MCF_INTC1_INTFRCL_INTFRC11 (0x00000800) -#define MCF_INTC1_INTFRCL_INTFRC12 (0x00001000) -#define MCF_INTC1_INTFRCL_INTFRC13 (0x00002000) -#define MCF_INTC1_INTFRCL_INTFRC14 (0x00004000) -#define MCF_INTC1_INTFRCL_INT15 (0x00008000) -#define MCF_INTC1_INTFRCL_INTFRC16 (0x00010000) -#define MCF_INTC1_INTFRCL_INTFRC17 (0x00020000) -#define MCF_INTC1_INTFRCL_INTFRC18 (0x00040000) -#define MCF_INTC1_INTFRCL_INTFRC19 (0x00080000) -#define MCF_INTC1_INTFRCL_INTFRC20 (0x00100000) -#define MCF_INTC1_INTFRCL_INTFRC21 (0x00200000) -#define MCF_INTC1_INTFRCL_INTFRC22 (0x00400000) -#define MCF_INTC1_INTFRCL_INTFRC23 (0x00800000) -#define MCF_INTC1_INTFRCL_INTFRC24 (0x01000000) -#define MCF_INTC1_INTFRCL_INTFRC25 (0x02000000) -#define MCF_INTC1_INTFRCL_INTFRC26 (0x04000000) -#define MCF_INTC1_INTFRCL_INTFRC27 (0x08000000) -#define MCF_INTC1_INTFRCL_INTFRC28 (0x10000000) -#define MCF_INTC1_INTFRCL_INTFRC29 (0x20000000) -#define MCF_INTC1_INTFRCL_INTFRC30 (0x40000000) -#define MCF_INTC1_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IRLR */ -#define MCF_INTC1_IRLR_IRQ(x) (((x)&0x7F)<<1) - -/* Bit definitions and macros for MCF_INTC1_IACKLPR */ -#define MCF_INTC1_IACKLPR_PRI(x) (((x)&0x0F)<<0) -#define MCF_INTC1_IACKLPR_LEVEL(x) (((x)&0x07)<<4) - -/* Bit definitions and macros for MCF_INTC1_ICRn */ -#define MCF_INTC1_ICRn_IP(x) (((x)&0x07)<<0) -#define MCF_INTC1_ICRn_IL(x) (((x)&0x07)<<3) - -/********************************************************************/ - -#endif /* __MCF523X_INTC1_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_mdha.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_mdha.h deleted file mode 100644 index 1d61bf57..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_mdha.h +++ /dev/null @@ -1,108 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_mdha.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_MDHA_H__ -#define __MCF523X_MDHA_H__ - -/********************************************************************* -* -* Message Digest Hardware Accelerator (MDHA) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_MDHA_MDMR (*(vuint32*)(void*)(&__IPSBAR[0x190000])) -#define MCF_MDHA_MDCR (*(vuint32*)(void*)(&__IPSBAR[0x190004])) -#define MCF_MDHA_MDCMR (*(vuint32*)(void*)(&__IPSBAR[0x190008])) -#define MCF_MDHA_MDSR (*(vuint32*)(void*)(&__IPSBAR[0x19000C])) -#define MCF_MDHA_MDISR (*(vuint32*)(void*)(&__IPSBAR[0x190010])) -#define MCF_MDHA_MDIMR (*(vuint32*)(void*)(&__IPSBAR[0x190014])) -#define MCF_MDHA_MDDSR (*(vuint32*)(void*)(&__IPSBAR[0x19001C])) -#define MCF_MDHA_MDIN (*(vuint32*)(void*)(&__IPSBAR[0x190020])) -#define MCF_MDHA_MDA0 (*(vuint32*)(void*)(&__IPSBAR[0x190030])) -#define MCF_MDHA_MDB0 (*(vuint32*)(void*)(&__IPSBAR[0x190034])) -#define MCF_MDHA_MDC0 (*(vuint32*)(void*)(&__IPSBAR[0x190038])) -#define MCF_MDHA_MDD0 (*(vuint32*)(void*)(&__IPSBAR[0x19003C])) -#define MCF_MDHA_MDE0 (*(vuint32*)(void*)(&__IPSBAR[0x190040])) -#define MCF_MDHA_MDMDS (*(vuint32*)(void*)(&__IPSBAR[0x190044])) -#define MCF_MDHA_MDA1 (*(vuint32*)(void*)(&__IPSBAR[0x190070])) -#define MCF_MDHA_MDB1 (*(vuint32*)(void*)(&__IPSBAR[0x190074])) -#define MCF_MDHA_MDC1 (*(vuint32*)(void*)(&__IPSBAR[0x190078])) -#define MCF_MDHA_MDD1 (*(vuint32*)(void*)(&__IPSBAR[0x19007C])) -#define MCF_MDHA_MDE1 (*(vuint32*)(void*)(&__IPSBAR[0x190080])) - -/* Bit definitions and macros for MCF_MDHA_MDMR */ -#define MCF_MDHA_MDMR_ALG (0x00000001) -#define MCF_MDHA_MDMR_PDATA (0x00000004) -#define MCF_MDHA_MDMR_MAC(x) (((x)&0x00000003)<<3) -#define MCF_MDHA_MDMR_INIT (0x00000020) -#define MCF_MDHA_MDMR_IPAD (0x00000040) -#define MCF_MDHA_MDMR_OPAD (0x00000080) -#define MCF_MDHA_MDMR_SWAP (0x00000100) -#define MCF_MDHA_MDMR_MACFULL (0x00000200) -#define MCF_MDHA_MDMR_SSL (0x00000400) - -/* Bit definitions and macros for MCF_MDHA_MDCR */ -#define MCF_MDHA_MDCR_IE (0x00000001) - -/* Bit definitions and macros for MCF_MDHA_MDCMR */ -#define MCF_MDHA_MDCMR_IE (0x00000001) -#define MCF_MDHA_MDCMR_RI (0x00000002) -#define MCF_MDHA_MDCMR_CI (0x00000004) -#define MCF_MDHA_MDCMR_GO (0x00000008) - -/* Bit definitions and macros for MCF_MDHA_MDSR */ -#define MCF_MDHA_MDSR_INT (0x00000001) -#define MCF_MDHA_MDSR_DONE (0x00000002) -#define MCF_MDHA_MDSR_ERR (0x00000004) -#define MCF_MDHA_MDSR_RD (0x00000008) -#define MCF_MDHA_MDSR_BUSY (0x00000010) -#define MCF_MDHA_MDSR_END (0x00000020) -#define MCF_MDHA_MDSR_HSH (0x00000040) -#define MCF_MDHA_MDSR_GNW (0x00000080) -#define MCF_MDHA_MDSR_FS(x) (((x)&0x00000007)<<8) -#define MCF_MDHA_MDSR_APD(x) (((x)&0x00000007)<<13) -#define MCF_MDHA_MDSR_IFL(x) (((x)&0x000000FF)<<16) - -/* Bit definitions and macros for MCF_MDHA_MDIR */ -#define MCF_MDHA_MDIR_IFO (0x00000001) -#define MCF_MDHA_MDIR_NON (0x00000004) -#define MCF_MDHA_MDIR_IME (0x00000010) -#define MCF_MDHA_MDIR_IDS (0x00000020) -#define MCF_MDHA_MDIR_RMDP (0x00000080) -#define MCF_MDHA_MDIR_ERE (0x00000100) -#define MCF_MDHA_MDIR_GTDS (0x00000200) - -/* Bit definitions and macros for MCF_MDHA_MDIMR */ -#define MCF_MDHA_MDIMR_IFO (0x00000001) -#define MCF_MDHA_MDIMR_NON (0x00000004) -#define MCF_MDHA_MDIMR_IME (0x00000010) -#define MCF_MDHA_MDIMR_IDS (0x00000020) -#define MCF_MDHA_MDIMR_RMDP (0x00000080) -#define MCF_MDHA_MDIMR_ERE (0x00000100) -#define MCF_MDHA_MDIMR_GTDS (0x00000200) - -/* Bit definitions and macros for MCF_MDHA_MDDSR */ -#define MCF_MDHA_MDDSR_DATASIZE(x) (((x)&0x1FFFFFFF)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_MDHA_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_pit.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_pit.h deleted file mode 100644 index 9aece7b8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_pit.h +++ /dev/null @@ -1,96 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_pit.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_PIT_H__ -#define __MCF523X_PIT_H__ - -/********************************************************************* -* -* Programmable Interrupt Timer Modules (PIT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PIT_PCSR0 (*(vuint16*)(void*)(&__IPSBAR[0x150000])) -#define MCF_PIT_PMR0 (*(vuint16*)(void*)(&__IPSBAR[0x150002])) -#define MCF_PIT_PCNTR0 (*(vuint16*)(void*)(&__IPSBAR[0x150004])) -#define MCF_PIT_PCSR1 (*(vuint16*)(void*)(&__IPSBAR[0x160000])) -#define MCF_PIT_PMR1 (*(vuint16*)(void*)(&__IPSBAR[0x160002])) -#define MCF_PIT_PCNTR1 (*(vuint16*)(void*)(&__IPSBAR[0x160004])) -#define MCF_PIT_PCSR2 (*(vuint16*)(void*)(&__IPSBAR[0x170000])) -#define MCF_PIT_PMR2 (*(vuint16*)(void*)(&__IPSBAR[0x170002])) -#define MCF_PIT_PCNTR2 (*(vuint16*)(void*)(&__IPSBAR[0x170004])) -#define MCF_PIT_PCSR3 (*(vuint16*)(void*)(&__IPSBAR[0x180000])) -#define MCF_PIT_PMR3 (*(vuint16*)(void*)(&__IPSBAR[0x180002])) -#define MCF_PIT_PCNTR3 (*(vuint16*)(void*)(&__IPSBAR[0x180004])) -#define MCF_PIT_PCSR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150000+((x)*0x10000)])) -#define MCF_PIT_PMR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150002+((x)*0x10000)])) -#define MCF_PIT_PCNTR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150004+((x)*0x10000)])) - -/* Bit definitions and macros for MCF_PIT_PCSR */ -#define MCF_PIT_PCSR_EN (0x0001) -#define MCF_PIT_PCSR_RLD (0x0002) -#define MCF_PIT_PCSR_PIF (0x0004) -#define MCF_PIT_PCSR_PIE (0x0008) -#define MCF_PIT_PCSR_OVW (0x0010) -#define MCF_PIT_PCSR_HALTED (0x0020) -#define MCF_PIT_PCSR_DOZE (0x0040) -#define MCF_PIT_PCSR_PRE(x) (((x)&0x000F)<<8) - -/* Bit definitions and macros for MCF_PIT_PMR */ -#define MCF_PIT_PMR_PM0 (0x0001) -#define MCF_PIT_PMR_PM1 (0x0002) -#define MCF_PIT_PMR_PM2 (0x0004) -#define MCF_PIT_PMR_PM3 (0x0008) -#define MCF_PIT_PMR_PM4 (0x0010) -#define MCF_PIT_PMR_PM5 (0x0020) -#define MCF_PIT_PMR_PM6 (0x0040) -#define MCF_PIT_PMR_PM7 (0x0080) -#define MCF_PIT_PMR_PM8 (0x0100) -#define MCF_PIT_PMR_PM9 (0x0200) -#define MCF_PIT_PMR_PM10 (0x0400) -#define MCF_PIT_PMR_PM11 (0x0800) -#define MCF_PIT_PMR_PM12 (0x1000) -#define MCF_PIT_PMR_PM13 (0x2000) -#define MCF_PIT_PMR_PM14 (0x4000) -#define MCF_PIT_PMR_PM15 (0x8000) - -/* Bit definitions and macros for MCF_PIT_PCNTR */ -#define MCF_PIT_PCNTR_PC0 (0x0001) -#define MCF_PIT_PCNTR_PC1 (0x0002) -#define MCF_PIT_PCNTR_PC2 (0x0004) -#define MCF_PIT_PCNTR_PC3 (0x0008) -#define MCF_PIT_PCNTR_PC4 (0x0010) -#define MCF_PIT_PCNTR_PC5 (0x0020) -#define MCF_PIT_PCNTR_PC6 (0x0040) -#define MCF_PIT_PCNTR_PC7 (0x0080) -#define MCF_PIT_PCNTR_PC8 (0x0100) -#define MCF_PIT_PCNTR_PC9 (0x0200) -#define MCF_PIT_PCNTR_PC10 (0x0400) -#define MCF_PIT_PCNTR_PC11 (0x0800) -#define MCF_PIT_PCNTR_PC12 (0x1000) -#define MCF_PIT_PCNTR_PC13 (0x2000) -#define MCF_PIT_PCNTR_PC14 (0x4000) -#define MCF_PIT_PCNTR_PC15 (0x8000) - -/********************************************************************/ - -#endif /* __MCF523X_PIT_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_qspi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_qspi.h deleted file mode 100644 index e6c2edc5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_qspi.h +++ /dev/null @@ -1,76 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_qspi.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_QSPI_H__ -#define __MCF523X_QSPI_H__ - -/********************************************************************* -* -* Queued Serial Peripheral Interface (QSPI) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_QSPI_QMR (*(vuint16*)(void*)(&__IPSBAR[0x000340])) -#define MCF_QSPI_QDLYR (*(vuint16*)(void*)(&__IPSBAR[0x000344])) -#define MCF_QSPI_QWR (*(vuint16*)(void*)(&__IPSBAR[0x000348])) -#define MCF_QSPI_QIR (*(vuint16*)(void*)(&__IPSBAR[0x00034C])) -#define MCF_QSPI_QAR (*(vuint16*)(void*)(&__IPSBAR[0x000350])) -#define MCF_QSPI_QDR (*(vuint16*)(void*)(&__IPSBAR[0x000354])) - -/* Bit definitions and macros for MCF_QSPI_QMR */ -#define MCF_QSPI_QMR_BAUD(x) (((x)&0x00FF)<<0) -#define MCF_QSPI_QMR_CPHA (0x0100) -#define MCF_QSPI_QMR_CPOL (0x0200) -#define MCF_QSPI_QMR_BITS(x) (((x)&0x000F)<<10) -#define MCF_QSPI_QMR_DOHIE (0x4000) -#define MCF_QSPI_QMR_MSTR (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QDLYR */ -#define MCF_QSPI_QDLYR_DTL(x) (((x)&0x00FF)<<0) -#define MCF_QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8) -#define MCF_QSPI_QDLYR_SPE (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QWR */ -#define MCF_QSPI_QWR_NEWQP(x) (((x)&0x000F)<<0) -#define MCF_QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8) -#define MCF_QSPI_QWR_CSIV (0x1000) -#define MCF_QSPI_QWR_WRTO (0x2000) -#define MCF_QSPI_QWR_WREN (0x4000) -#define MCF_QSPI_QWR_HALT (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QIR */ -#define MCF_QSPI_QIR_SPIF (0x0001) -#define MCF_QSPI_QIR_ABRT (0x0004) -#define MCF_QSPI_QIR_WCEF (0x0008) -#define MCF_QSPI_QIR_SPIFE (0x0100) -#define MCF_QSPI_QIR_ABRTE (0x0400) -#define MCF_QSPI_QIR_WCEFE (0x0800) -#define MCF_QSPI_QIR_ABRTL (0x1000) -#define MCF_QSPI_QIR_ABRTB (0x4000) -#define MCF_QSPI_QIR_WCEFB (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QAR */ -#define MCF_QSPI_QAR_ADDR(x) (((x)&0x003F)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_QSPI_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_rcm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_rcm.h deleted file mode 100644 index ec4d66ac..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_rcm.h +++ /dev/null @@ -1,49 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_rcm.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_RCM_H__ -#define __MCF523X_RCM_H__ - -/********************************************************************* -* -* Reset Configuration Module (RCM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_RCM_RCR (*(vuint8 *)(void*)(&__IPSBAR[0x110000])) -#define MCF_RCM_RSR (*(vuint8 *)(void*)(&__IPSBAR[0x110001])) - -/* Bit definitions and macros for MCF_RCM_RCR */ -#define MCF_RCM_RCR_FRCRSTOUT (0x40) -#define MCF_RCM_RCR_SOFTRST (0x80) - -/* Bit definitions and macros for MCF_RCM_RSR */ -#define MCF_RCM_RSR_LOL (0x01) -#define MCF_RCM_RSR_LOC (0x02) -#define MCF_RCM_RSR_EXT (0x04) -#define MCF_RCM_RSR_POR (0x08) -#define MCF_RCM_RSR_WDR (0x10) -#define MCF_RCM_RSR_SOFT (0x20) - -/********************************************************************/ - -#endif /* __MCF523X_RCM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_rng.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_rng.h deleted file mode 100644 index ebad773b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_rng.h +++ /dev/null @@ -1,54 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_rng.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - - -#ifndef __MCF523X_RNG_H__ -#define __MCF523X_RNG_H__ - -/********************************************************************* -* -* Random Number Generator (RNG) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_RNG_RNGCR (*(vuint32*)(void*)(&__IPSBAR[0x1A0000])) -#define MCF_RNG_RNGSR (*(vuint32*)(void*)(&__IPSBAR[0x1A0004])) -#define MCF_RNG_RNGER (*(vuint32*)(void*)(&__IPSBAR[0x1A0008])) -#define MCF_RNG_RNGOUT (*(vuint32*)(void*)(&__IPSBAR[0x1A000C])) - -/* Bit definitions and macros for MCF_RNG_RNGCR */ -#define MCF_RNG_RNGCR_GO (0x00000001) -#define MCF_RNG_RNGCR_HA (0x00000002) -#define MCF_RNG_RNGCR_IM (0x00000004) -#define MCF_RNG_RNGCR_CI (0x00000008) - -/* Bit definitions and macros for MCF_RNG_RNGSR */ -#define MCF_RNG_RNGSR_SV (0x00000001) -#define MCF_RNG_RNGSR_LRS (0x00000002) -#define MCF_RNG_RNGSR_FUF (0x00000004) -#define MCF_RNG_RNGSR_EI (0x00000008) -#define MCF_RNG_RNGSR_OFL(x) (((x)&0x000000FF)<<8) -#define MCF_RNG_RNGSR_OFS(x) (((x)&0x000000FF)<<16) - -/********************************************************************/ - -#endif /* __MCF523X_RNG_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_scm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_scm.h deleted file mode 100644 index 9f13bd2f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_scm.h +++ /dev/null @@ -1,158 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_scm.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - - -#ifndef __MCF523X_SCM_H__ -#define __MCF523X_SCM_H__ - -/********************************************************************* -* -* System Control Module (SCM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SCM_IPSBAR (*(vuint32*)(void*)(&__IPSBAR[0x000000])) -#define MCF_SCM_RAMBAR (*(vuint32*)(void*)(&__IPSBAR[0x000008])) -#define MCF_SCM_CRSR (*(vuint8 *)(void*)(&__IPSBAR[0x000010])) -#define MCF_SCM_CWCR (*(vuint8 *)(void*)(&__IPSBAR[0x000011])) -#define MCF_SCM_LPICR (*(vuint8 *)(void*)(&__IPSBAR[0x000012])) -#define MCF_SCM_CWSR (*(vuint8 *)(void*)(&__IPSBAR[0x000013])) -#define MCF_SCM_DMAREQC (*(vuint32*)(void*)(&__IPSBAR[0x000014])) -#define MCF_SCM_MPARK (*(vuint32*)(void*)(&__IPSBAR[0x00001C])) -#define MCF_SCM_MPR (*(vuint8 *)(void*)(&__IPSBAR[0x000020])) -#define MCF_SCM_PACR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000024])) -#define MCF_SCM_PACR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000025])) -#define MCF_SCM_PACR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000026])) -#define MCF_SCM_PACR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000027])) -#define MCF_SCM_PACR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000028])) -#define MCF_SCM_PACR5 (*(vuint8 *)(void*)(&__IPSBAR[0x00002A])) -#define MCF_SCM_PACR6 (*(vuint8 *)(void*)(&__IPSBAR[0x00002B])) -#define MCF_SCM_PACR7 (*(vuint8 *)(void*)(&__IPSBAR[0x00002C])) -#define MCF_SCM_PACR8 (*(vuint8 *)(void*)(&__IPSBAR[0x00002E])) -#define MCF_SCM_GPACR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000030])) - -/* Bit definitions and macros for MCF_SCM_IPSBAR */ -#define MCF_SCM_IPSBAR_V (0x00000001) -#define MCF_SCM_IPSBAR_BA(x) (((x)&0x00000003)<<30) - -/* Bit definitions and macros for MCF_SCM_RAMBAR */ -#define MCF_SCM_RAMBAR_BDE (0x00000200) -#define MCF_SCM_RAMBAR_BA(x) (((x)&0x0000FFFF)<<16) - -/* Bit definitions and macros for MCF_SCM_CRSR */ -#define MCF_SCM_CRSR_CWDR (0x20) -#define MCF_SCM_CRSR_EXT (0x80) - -/* Bit definitions and macros for MCF_SCM_CWCR */ -#define MCF_SCM_CWCR_CWTIC (0x01) -#define MCF_SCM_CWCR_CWTAVAL (0x02) -#define MCF_SCM_CWCR_CWTA (0x04) -#define MCF_SCM_CWCR_CWT(x) (((x)&0x07)<<3) -#define MCF_SCM_CWCR_CWRI (0x40) -#define MCF_SCM_CWCR_CWE (0x80) - -/* Bit definitions and macros for MCF_SCM_LPICR */ -#define MCF_SCM_LPICR_XLPM_IPL(x) (((x)&0x07)<<4) -#define MCF_SCM_LPICR_ENBSTOP (0x80) - -/* Bit definitions and macros for MCF_SCM_DMAREQC */ -#define MCF_SCM_DMAREQC_DMAC0(x) (((x)&0x0000000F)<<0) -#define MCF_SCM_DMAREQC_DMAC1(x) (((x)&0x0000000F)<<4) -#define MCF_SCM_DMAREQC_DMAC2(x) (((x)&0x0000000F)<<8) -#define MCF_SCM_DMAREQC_DMAC3(x) (((x)&0x0000000F)<<12) - -/* Bit definitions and macros for MCF_SCM_MPARK */ -#define MCF_SCM_MPARK_LCKOUT_TIME(x) (((x)&0x0000000F)<<8) -#define MCF_SCM_MPARK_PRKLAST (0x00001000) -#define MCF_SCM_MPARK_TIMEOUT (0x00002000) -#define MCF_SCM_MPARK_FIXED (0x00004000) -#define MCF_SCM_MPARK_M1_PRTY(x) (((x)&0x00000003)<<16) -#define MCF_SCM_MPARK_M0_PRTY(x) (((x)&0x00000003)<<18) -#define MCF_SCM_MPARK_M2_PRTY(x) (((x)&0x00000003)<<20) -#define MCF_SCM_MPARK_M3_PRTY(x) (((x)&0x00000003)<<22) -#define MCF_SCM_MPARK_BCR24BIT (0x01000000) -#define MCF_SCM_MPARK_M2_P_EN (0x02000000) - -/* Bit definitions and macros for MCF_SCM_MPR */ -#define MCF_SCM_MPR_MPR(x) (((x)&0x0F)<<0) - -/* Bit definitions and macros for MCF_SCM_PACR0 */ -#define MCF_SCM_PACR0_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR0_LOCK0 (0x08) -#define MCF_SCM_PACR0_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR0_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR1 */ -#define MCF_SCM_PACR1_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR1_LOCK0 (0x08) -#define MCF_SCM_PACR1_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR1_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR2 */ -#define MCF_SCM_PACR2_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR2_LOCK0 (0x08) -#define MCF_SCM_PACR2_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR2_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR3 */ -#define MCF_SCM_PACR3_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR3_LOCK0 (0x08) -#define MCF_SCM_PACR3_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR3_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR4 */ -#define MCF_SCM_PACR4_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR4_LOCK0 (0x08) -#define MCF_SCM_PACR4_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR4_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR5 */ -#define MCF_SCM_PACR5_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR5_LOCK0 (0x08) -#define MCF_SCM_PACR5_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR5_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR6 */ -#define MCF_SCM_PACR6_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR6_LOCK0 (0x08) -#define MCF_SCM_PACR6_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR6_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR7 */ -#define MCF_SCM_PACR7_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR7_LOCK0 (0x08) -#define MCF_SCM_PACR7_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR7_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR8 */ -#define MCF_SCM_PACR8_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR8_LOCK0 (0x08) -#define MCF_SCM_PACR8_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR8_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_GPACR0 */ -#define MCF_SCM_GPACR0_ACCESS_CTRL(x) (((x)&0x0F)<<0) -#define MCF_SCM_GPACR0_LOCK (0x80) - -/********************************************************************/ - -#endif /* __MCF523X_SCM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_sdramc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_sdramc.h deleted file mode 100644 index ff99eb3c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_sdramc.h +++ /dev/null @@ -1,101 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_sdramc.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_SDRAMC_H__ -#define __MCF523X_SDRAMC_H__ - -/********************************************************************* -* -* SDRAM Controller (SDRAMC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SDRAMC_DCR (*(vuint16*)(void*)(&__IPSBAR[0x000040])) -#define MCF_SDRAMC_DACR0 (*(vuint32*)(void*)(&__IPSBAR[0x000048])) -#define MCF_SDRAMC_DMR0 (*(vuint32*)(void*)(&__IPSBAR[0x00004C])) -#define MCF_SDRAMC_DACR1 (*(vuint32*)(void*)(&__IPSBAR[0x000050])) -#define MCF_SDRAMC_DMR1 (*(vuint32*)(void*)(&__IPSBAR[0x000054])) - -/* Bit definitions and macros for MCF_SDRAMC_DCR */ -#define MCF_SDRAMC_DCR_RC(x) (((x)&0x01FF)<<0) -#define MCF_SDRAMC_DCR_RTIM(x) (((x)&0x0003)<<9) -#define MCF_SDRAMC_DCR_IS (0x0800) -#define MCF_SDRAMC_DCR_COC (0x1000) -#define MCF_SDRAMC_DCR_NAM (0x2000) - -/* Bit definitions and macros for MCF_SDRAMC_DACR0 */ -#define MCF_SDRAMC_DACR0_IP (0x00000008) -#define MCF_SDRAMC_DACR0_PS(x) (((x)&0x00000003)<<4) -#define MCF_SDRAMC_DACR0_MRS (0x00000040) -#define MCF_SDRAMC_DACR0_CBM(x) (((x)&0x00000007)<<8) -#define MCF_SDRAMC_DACR0_CASL(x) (((x)&0x00000003)<<12) -#define MCF_SDRAMC_DACR0_RE (0x00008000) -#define MCF_SDRAMC_DACR0_BA(x) (((x)&0x00003FFF)<<18) - -/* Bit definitions and macros for MCF_SDRAMC_DMR0 */ -#define MCF_SDRAMC_DMR0_V (0x00000001) -#define MCF_SDRAMC_DMR0_WP (0x00000100) -#define MCF_SDRAMC_DMR0_BAM(x) (((x)&0x00003FFF)<<18) - -/* Bit definitions and macros for MCF_SDRAMC_DACR1 */ -#define MCF_SDRAMC_DACR1_IP (0x00000008) -#define MCF_SDRAMC_DACR1_PS(x) (((x)&0x00000003)<<4) -#define MCF_SDRAMC_DACR1_MRS (0x00000040) -#define MCF_SDRAMC_DACR1_CBM(x) (((x)&0x00000007)<<8) -#define MCF_SDRAMC_DACR1_CASL(x) (((x)&0x00000003)<<12) -#define MCF_SDRAMC_DACR1_RE (0x00008000) -#define MCF_SDRAMC_DACR1_BA(x) (((x)&0x00003FFF)<<18) - -/* Bit definitions and macros for MCF_SDRAMC_DMR1 */ -#define MCF_SDRAMC_DMR1_V (0x00000001) -#define MCF_SDRAMC_DMR1_WP (0x00000100) -#define MCF_SDRAMC_DMR1_BAM(x) (((x)&0x00003FFF)<<18) - -/********************************************************************/ - -#define MCF_SDRAMC_DMR_BAM_4G (0xFFFC0000) -#define MCF_SDRAMC_DMR_BAM_2G (0x7FFC0000) -#define MCF_SDRAMC_DMR_BAM_1G (0x3FFC0000) -#define MCF_SDRAMC_DMR_BAM_1024M (0x3FFC0000) -#define MCF_SDRAMC_DMR_BAM_512M (0x1FFC0000) -#define MCF_SDRAMC_DMR_BAM_256M (0x0FFC0000) -#define MCF_SDRAMC_DMR_BAM_128M (0x07FC0000) -#define MCF_SDRAMC_DMR_BAM_64M (0x03FC0000) -#define MCF_SDRAMC_DMR_BAM_32M (0x01FC0000) -#define MCF_SDRAMC_DMR_BAM_16M (0x00FC0000) -#define MCF_SDRAMC_DMR_BAM_8M (0x007C0000) -#define MCF_SDRAMC_DMR_BAM_4M (0x003C0000) -#define MCF_SDRAMC_DMR_BAM_2M (0x001C0000) -#define MCF_SDRAMC_DMR_BAM_1M (0x000C0000) -#define MCF_SDRAMC_DMR_BAM_1024K (0x000C0000) -#define MCF_SDRAMC_DMR_BAM_512K (0x00040000) -#define MCF_SDRAMC_DMR_BAM_256K (0x00000000) -#define MCF_SDRAMC_DMR_WP (0x00000100) -#define MCF_SDRAMC_DMR_CI (0x00000040) -#define MCF_SDRAMC_DMR_AM (0x00000020) -#define MCF_SDRAMC_DMR_SC (0x00000010) -#define MCF_SDRAMC_DMR_SD (0x00000008) -#define MCF_SDRAMC_DMR_UC (0x00000004) -#define MCF_SDRAMC_DMR_UD (0x00000002) -#define MCF_SDRAMC_DMR_V (0x00000001) - -#endif /* __MCF523X_SDRAMC_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_skha.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_skha.h deleted file mode 100644 index 9b613f76..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_skha.h +++ /dev/null @@ -1,127 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_skha.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_SKHA_H__ -#define __MCF523X_SKHA_H__ - -/********************************************************************* -* -* Symmetric Key Hardware Accelerator (SKHA) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SKHA_SKMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0000])) -#define MCF_SKHA_SKCR (*(vuint32*)(void*)(&__IPSBAR[0x1B0004])) -#define MCF_SKHA_SKCMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0008])) -#define MCF_SKHA_SKSR (*(vuint32*)(void*)(&__IPSBAR[0x1B000C])) -#define MCF_SKHA_SKIR (*(vuint32*)(void*)(&__IPSBAR[0x1B0010])) -#define MCF_SKHA_SKIMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0014])) -#define MCF_SKHA_SKKSR (*(vuint32*)(void*)(&__IPSBAR[0x1B0018])) -#define MCF_SKHA_SKDSR (*(vuint32*)(void*)(&__IPSBAR[0x1B001C])) -#define MCF_SKHA_SKIN (*(vuint32*)(void*)(&__IPSBAR[0x1B0020])) -#define MCF_SKHA_SKOUT (*(vuint32*)(void*)(&__IPSBAR[0x1B0024])) -#define MCF_SKHA_SKKDR0 (*(vuint32*)(void*)(&__IPSBAR[0x1B0030])) -#define MCF_SKHA_SKKDR1 (*(vuint32*)(void*)(&__IPSBAR[0x1B0034])) -#define MCF_SKHA_SKKDR2 (*(vuint32*)(void*)(&__IPSBAR[0x1B0038])) -#define MCF_SKHA_SKKDR3 (*(vuint32*)(void*)(&__IPSBAR[0x1B003C])) -#define MCF_SKHA_SKKDR4 (*(vuint32*)(void*)(&__IPSBAR[0x1B0040])) -#define MCF_SKHA_SKKDR5 (*(vuint32*)(void*)(&__IPSBAR[0x1B0044])) -#define MCF_SKHA_SKKDRn(x) (*(vuint32*)(void*)(&__IPSBAR[0x1B0030+((x)*0x004)])) -#define MCF_SKHA_SKCR0 (*(vuint32*)(void*)(&__IPSBAR[0x1B0070])) -#define MCF_SKHA_SKCR1 (*(vuint32*)(void*)(&__IPSBAR[0x1B0074])) -#define MCF_SKHA_SKCR2 (*(vuint32*)(void*)(&__IPSBAR[0x1B0078])) -#define MCF_SKHA_SKCR3 (*(vuint32*)(void*)(&__IPSBAR[0x1B007C])) -#define MCF_SKHA_SKCR4 (*(vuint32*)(void*)(&__IPSBAR[0x1B0080])) -#define MCF_SKHA_SKCR5 (*(vuint32*)(void*)(&__IPSBAR[0x1B0084])) -#define MCF_SKHA_SKCR6 (*(vuint32*)(void*)(&__IPSBAR[0x1B0088])) -#define MCF_SKHA_SKCR7 (*(vuint32*)(void*)(&__IPSBAR[0x1B008C])) -#define MCF_SKHA_SKCR8 (*(vuint32*)(void*)(&__IPSBAR[0x1B0090])) -#define MCF_SKHA_SKCR9 (*(vuint32*)(void*)(&__IPSBAR[0x1B0094])) -#define MCF_SKHA_SKCR10 (*(vuint32*)(void*)(&__IPSBAR[0x1B0098])) -#define MCF_SKHA_SKCR11 (*(vuint32*)(void*)(&__IPSBAR[0x1B009C])) -#define MCF_SKHA_SKCRn(x) (*(vuint32*)(void*)(&__IPSBAR[0x1B0070+((x)*0x004)])) - -/* Bit definitions and macros for MCF_SKHA_SKMR */ -#define MCF_SKHA_SKMR_ALG(x) (((x)&0x00000003)<<0) -#define MCF_SKHA_SKMR_DIR (0x00000004) -#define MCF_SKHA_SKMR_CM(x) (((x)&0x00000003)<<3) -#define MCF_SKHA_SKMR_DKP (0x00000100) -#define MCF_SKHA_SKMR_CTRM(x) (((x)&0x0000000F)<<9) -#define MCF_SKHA_SKMR_CM_ECB (0x00000000) -#define MCF_SKHA_SKMR_CM_CBC (0x00000008) -#define MCF_SKHA_SKMR_CM_CTR (0x00000018) -#define MCF_SKHA_SKMR_DIR_DEC (0x00000000) -#define MCF_SKHA_SKMR_DIR_ENC (0x00000004) -#define MCF_SKHA_SKMR_ALG_AES (0x00000000) -#define MCF_SKHA_SKMR_ALG_DES (0x00000001) -#define MCF_SKHA_SKMR_ALG_TDES (0x00000002) - -/* Bit definitions and macros for MCF_SKHA_SKCR */ -#define MCF_SKHA_SKCR_IE (0x00000001) - -/* Bit definitions and macros for MCF_SKHA_SKCMR */ -#define MCF_SKHA_SKCMR_SWR (0x00000001) -#define MCF_SKHA_SKCMR_RI (0x00000002) -#define MCF_SKHA_SKCMR_CI (0x00000004) -#define MCF_SKHA_SKCMR_GO (0x00000008) - -/* Bit definitions and macros for MCF_SKHA_SKSR */ -#define MCF_SKHA_SKSR_INT (0x00000001) -#define MCF_SKHA_SKSR_DONE (0x00000002) -#define MCF_SKHA_SKSR_ERR (0x00000004) -#define MCF_SKHA_SKSR_RD (0x00000008) -#define MCF_SKHA_SKSR_BUSY (0x00000010) -#define MCF_SKHA_SKSR_IFL(x) (((x)&0x000000FF)<<16) -#define MCF_SKHA_SKSR_OFL(x) (((x)&0x000000FF)<<24) - -/* Bit definitions and macros for MCF_SKHA_SKIR */ -#define MCF_SKHA_SKIR_IFO (0x00000001) -#define MCF_SKHA_SKIR_OFU (0x00000002) -#define MCF_SKHA_SKIR_NEIF (0x00000004) -#define MCF_SKHA_SKIR_NEOF (0x00000008) -#define MCF_SKHA_SKIR_IME (0x00000010) -#define MCF_SKHA_SKIR_DSE (0x00000020) -#define MCF_SKHA_SKIR_KSE (0x00000040) -#define MCF_SKHA_SKIR_RMDP (0x00000080) -#define MCF_SKHA_SKIR_ERE (0x00000100) -#define MCF_SKHA_SKIR_KPE (0x00000200) -#define MCF_SKHA_SKIR_KRE (0x00000400) - -/* Bit definitions and macros for MCF_SKHA_SKIMR */ -#define MCF_SKHA_SKIMR_IFO (0x00000001) -#define MCF_SKHA_SKIMR_OFU (0x00000002) -#define MCF_SKHA_SKIMR_NEIF (0x00000004) -#define MCF_SKHA_SKIMR_NEOF (0x00000008) -#define MCF_SKHA_SKIMR_IME (0x00000010) -#define MCF_SKHA_SKIMR_DSE (0x00000020) -#define MCF_SKHA_SKIMR_KSE (0x00000040) -#define MCF_SKHA_SKIMR_RMDP (0x00000080) -#define MCF_SKHA_SKIMR_ERE (0x00000100) -#define MCF_SKHA_SKIMR_KPE (0x00000200) -#define MCF_SKHA_SKIMR_KRE (0x00000400) - -/* Bit definitions and macros for MCF_SKHA_SKKSR */ -#define MCF_SKHA_SKKSR_KEYSIZE(x) (((x)&0x0000003F)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_SKHA_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_sram.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_sram.h deleted file mode 100644 index 9b5fafd0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_sram.h +++ /dev/null @@ -1,49 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_sram.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_SRAM_H__ -#define __MCF523X_SRAM_H__ - -/********************************************************************* -* -* 64KByte System SRAM (SRAM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SRAM_RAMBAR (*(vuint32*)(void*)(&__IPSBAR[0x20000000])) - -/* Bit definitions and macros for MCF_SRAM_RAMBAR */ -#define MCF_SRAM_RAMBAR_V (0x00000001) -#define MCF_SRAM_RAMBAR_UD (0x00000002) -#define MCF_SRAM_RAMBAR_UC (0x00000004) -#define MCF_SRAM_RAMBAR_SD (0x00000008) -#define MCF_SRAM_RAMBAR_SC (0x00000010) -#define MCF_SRAM_RAMBAR_CI (0x00000020) -#define MCF_SRAM_RAMBAR_WP (0x00000100) -#define MCF_SRAM_RAMBAR_SPV (0x00000200) -#define MCF_SRAM_RAMBAR_PRI2 (0x00000400) -#define MCF_SRAM_RAMBAR_PRI1 (0x00000800) -#define MCF_SRAM_RAMBAR_BA(x) (((x)&0x0000FFFF)<<16) - -/********************************************************************/ - -#endif /* __MCF523X_SRAM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_timer.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_timer.h deleted file mode 100644 index b192a2b7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_timer.h +++ /dev/null @@ -1,90 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_timer.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_TIMER_H__ -#define __MCF523X_TIMER_H__ - -/********************************************************************* -* -* DMA Timers (TIMER) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_TIMER_DTMR0 (*(vuint16*)(void*)(&__IPSBAR[0x000400])) -#define MCF_TIMER_DTXMR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000402])) -#define MCF_TIMER_DTER0 (*(vuint8 *)(void*)(&__IPSBAR[0x000403])) -#define MCF_TIMER_DTRR0 (*(vuint32*)(void*)(&__IPSBAR[0x000404])) -#define MCF_TIMER_DTCR0 (*(vuint32*)(void*)(&__IPSBAR[0x000408])) -#define MCF_TIMER_DTCN0 (*(vuint32*)(void*)(&__IPSBAR[0x00040C])) -#define MCF_TIMER_DTMR1 (*(vuint16*)(void*)(&__IPSBAR[0x000440])) -#define MCF_TIMER_DTXMR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000442])) -#define MCF_TIMER_DTER1 (*(vuint8 *)(void*)(&__IPSBAR[0x000443])) -#define MCF_TIMER_DTRR1 (*(vuint32*)(void*)(&__IPSBAR[0x000444])) -#define MCF_TIMER_DTCR1 (*(vuint32*)(void*)(&__IPSBAR[0x000448])) -#define MCF_TIMER_DTCN1 (*(vuint32*)(void*)(&__IPSBAR[0x00044C])) -#define MCF_TIMER_DTMR2 (*(vuint16*)(void*)(&__IPSBAR[0x000480])) -#define MCF_TIMER_DTXMR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000482])) -#define MCF_TIMER_DTER2 (*(vuint8 *)(void*)(&__IPSBAR[0x000483])) -#define MCF_TIMER_DTRR2 (*(vuint32*)(void*)(&__IPSBAR[0x000484])) -#define MCF_TIMER_DTCR2 (*(vuint32*)(void*)(&__IPSBAR[0x000488])) -#define MCF_TIMER_DTCN2 (*(vuint32*)(void*)(&__IPSBAR[0x00048C])) -#define MCF_TIMER_DTMR3 (*(vuint16*)(void*)(&__IPSBAR[0x0004C0])) -#define MCF_TIMER_DTXMR3 (*(vuint8 *)(void*)(&__IPSBAR[0x0004C2])) -#define MCF_TIMER_DTER3 (*(vuint8 *)(void*)(&__IPSBAR[0x0004C3])) -#define MCF_TIMER_DTRR3 (*(vuint32*)(void*)(&__IPSBAR[0x0004C4])) -#define MCF_TIMER_DTCR3 (*(vuint32*)(void*)(&__IPSBAR[0x0004C8])) -#define MCF_TIMER_DTCN3 (*(vuint32*)(void*)(&__IPSBAR[0x0004CC])) -#define MCF_TIMER_DTMR(x) (*(vuint16*)(void*)(&__IPSBAR[0x000400+((x)*0x040)])) -#define MCF_TIMER_DTXMR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000402+((x)*0x040)])) -#define MCF_TIMER_DTER(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000403+((x)*0x040)])) -#define MCF_TIMER_DTRR(x) (*(vuint32*)(void*)(&__IPSBAR[0x000404+((x)*0x040)])) -#define MCF_TIMER_DTCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x000408+((x)*0x040)])) -#define MCF_TIMER_DTCN(x) (*(vuint32*)(void*)(&__IPSBAR[0x00040C+((x)*0x040)])) - -/* Bit definitions and macros for MCF_TIMER_DTMR */ -#define MCF_TIMER_DTMR_RST (0x0001) -#define MCF_TIMER_DTMR_CLK(x) (((x)&0x0003)<<1) -#define MCF_TIMER_DTMR_FRR (0x0008) -#define MCF_TIMER_DTMR_ORRI (0x0010) -#define MCF_TIMER_DTMR_OM (0x0020) -#define MCF_TIMER_DTMR_CE(x) (((x)&0x0003)<<6) -#define MCF_TIMER_DTMR_PS(x) (((x)&0x00FF)<<8) -#define MCF_TIMER_DTMR_CE_ANY (0x00C0) -#define MCF_TIMER_DTMR_CE_FALL (0x0080) -#define MCF_TIMER_DTMR_CE_RISE (0x0040) -#define MCF_TIMER_DTMR_CE_NONE (0x0000) -#define MCF_TIMER_DTMR_CLK_DTIN (0x0006) -#define MCF_TIMER_DTMR_CLK_DIV16 (0x0004) -#define MCF_TIMER_DTMR_CLK_DIV1 (0x0002) -#define MCF_TIMER_DTMR_CLK_STOP (0x0000) - -/* Bit definitions and macros for MCF_TIMER_DTXMR */ -#define MCF_TIMER_DTXMR_MODE16 (0x01) -#define MCF_TIMER_DTXMR_DMAEN (0x80) - -/* Bit definitions and macros for MCF_TIMER_DTER */ -#define MCF_TIMER_DTER_CAP (0x01) -#define MCF_TIMER_DTER_REF (0x02) - -/********************************************************************/ - -#endif /* __MCF523X_TIMER_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_uart.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_uart.h deleted file mode 100644 index c84b02c3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_uart.h +++ /dev/null @@ -1,193 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_uart.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_UART_H__ -#define __MCF523X_UART_H__ - -/********************************************************************* -* -* Universal Asynchronous Receiver Transmitter (UART) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_UART_UMR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000200])) -#define MCF_UART_USR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000204])) -#define MCF_UART_UCSR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000204])) -#define MCF_UART_UCR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000208])) -#define MCF_UART_URB0 (*(vuint8 *)(void*)(&__IPSBAR[0x00020C])) -#define MCF_UART_UTB0 (*(vuint8 *)(void*)(&__IPSBAR[0x00020C])) -#define MCF_UART_UIPCR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000210])) -#define MCF_UART_UACR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000210])) -#define MCF_UART_UISR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000214])) -#define MCF_UART_UIMR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000214])) -#define MCF_UART_UBG10 (*(vuint8 *)(void*)(&__IPSBAR[0x000218])) -#define MCF_UART_UBG20 (*(vuint8 *)(void*)(&__IPSBAR[0x00021C])) -#define MCF_UART_UIP0 (*(vuint8 *)(void*)(&__IPSBAR[0x000234])) -#define MCF_UART_UOP10 (*(vuint8 *)(void*)(&__IPSBAR[0x000238])) -#define MCF_UART_UOP00 (*(vuint8 *)(void*)(&__IPSBAR[0x00023C])) -#define MCF_UART_UMR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000240])) -#define MCF_UART_USR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000244])) -#define MCF_UART_UCSR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000244])) -#define MCF_UART_UCR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000248])) -#define MCF_UART_URB1 (*(vuint8 *)(void*)(&__IPSBAR[0x00024C])) -#define MCF_UART_UTB1 (*(vuint8 *)(void*)(&__IPSBAR[0x00024C])) -#define MCF_UART_UIPCR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000250])) -#define MCF_UART_UACR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000250])) -#define MCF_UART_UISR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000254])) -#define MCF_UART_UIMR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000254])) -#define MCF_UART_UBG11 (*(vuint8 *)(void*)(&__IPSBAR[0x000258])) -#define MCF_UART_UBG21 (*(vuint8 *)(void*)(&__IPSBAR[0x00025C])) -#define MCF_UART_UIP1 (*(vuint8 *)(void*)(&__IPSBAR[0x000274])) -#define MCF_UART_UOP11 (*(vuint8 *)(void*)(&__IPSBAR[0x000278])) -#define MCF_UART_UOP01 (*(vuint8 *)(void*)(&__IPSBAR[0x00027C])) -#define MCF_UART_UMR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000280])) -#define MCF_UART_USR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000284])) -#define MCF_UART_UCSR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000284])) -#define MCF_UART_UCR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000288])) -#define MCF_UART_URB2 (*(vuint8 *)(void*)(&__IPSBAR[0x00028C])) -#define MCF_UART_UTB2 (*(vuint8 *)(void*)(&__IPSBAR[0x00028C])) -#define MCF_UART_UIPCR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000290])) -#define MCF_UART_UACR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000290])) -#define MCF_UART_UISR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000294])) -#define MCF_UART_UIMR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000294])) -#define MCF_UART_UBG12 (*(vuint8 *)(void*)(&__IPSBAR[0x000298])) -#define MCF_UART_UBG22 (*(vuint8 *)(void*)(&__IPSBAR[0x00029C])) -#define MCF_UART_UIP2 (*(vuint8 *)(void*)(&__IPSBAR[0x0002B4])) -#define MCF_UART_UOP12 (*(vuint8 *)(void*)(&__IPSBAR[0x0002B8])) -#define MCF_UART_UOP02 (*(vuint8 *)(void*)(&__IPSBAR[0x0002BC])) -#define MCF_UART_UMR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000200+((x)*0x040)])) -#define MCF_UART_USR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000204+((x)*0x040)])) -#define MCF_UART_UCSR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000204+((x)*0x040)])) -#define MCF_UART_UCR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000208+((x)*0x040)])) -#define MCF_UART_URB(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00020C+((x)*0x040)])) -#define MCF_UART_UTB(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00020C+((x)*0x040)])) -#define MCF_UART_UIPCR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000210+((x)*0x040)])) -#define MCF_UART_UACR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000210+((x)*0x040)])) -#define MCF_UART_UISR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000214+((x)*0x040)])) -#define MCF_UART_UIMR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000214+((x)*0x040)])) -#define MCF_UART_UBG1(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000218+((x)*0x040)])) -#define MCF_UART_UBG2(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00021C+((x)*0x040)])) -#define MCF_UART_UIP(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000234+((x)*0x040)])) -#define MCF_UART_UOP1(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000238+((x)*0x040)])) -#define MCF_UART_UOP0(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00023C+((x)*0x040)])) - -/* Bit definitions and macros for MCF_UART_UMR */ -#define MCF_UART_UMR_BC(x) (((x)&0x03)<<0) -#define MCF_UART_UMR_PT (0x04) -#define MCF_UART_UMR_PM(x) (((x)&0x03)<<3) -#define MCF_UART_UMR_ERR (0x20) -#define MCF_UART_UMR_RXIRQ (0x40) -#define MCF_UART_UMR_RXRTS (0x80) -#define MCF_UART_UMR_SB(x) (((x)&0x0F)<<0) -#define MCF_UART_UMR_TXCTS (0x10) -#define MCF_UART_UMR_TXRTS (0x20) -#define MCF_UART_UMR_CM(x) (((x)&0x03)<<6) -#define MCF_UART_UMR_PM_MULTI_ADDR (0x1C) -#define MCF_UART_UMR_PM_MULTI_DATA (0x18) -#define MCF_UART_UMR_PM_NONE (0x10) -#define MCF_UART_UMR_PM_FORCE_HI (0x0C) -#define MCF_UART_UMR_PM_FORCE_LO (0x08) -#define MCF_UART_UMR_PM_ODD (0x04) -#define MCF_UART_UMR_PM_EVEN (0x00) -#define MCF_UART_UMR_BC_5 (0x00) -#define MCF_UART_UMR_BC_6 (0x01) -#define MCF_UART_UMR_BC_7 (0x02) -#define MCF_UART_UMR_BC_8 (0x03) -#define MCF_UART_UMR_CM_NORMAL (0x00) -#define MCF_UART_UMR_CM_ECHO (0x40) -#define MCF_UART_UMR_CM_LOCAL_LOOP (0x80) -#define MCF_UART_UMR_CM_REMOTE_LOOP (0xC0) -#define MCF_UART_UMR_SB_STOP_BITS_1 (0x07) -#define MCF_UART_UMR_SB_STOP_BITS_15 (0x08) -#define MCF_UART_UMR_SB_STOP_BITS_2 (0x0F) - -/* Bit definitions and macros for MCF_UART_USR */ -#define MCF_UART_USR_RXRDY (0x01) -#define MCF_UART_USR_FFULL (0x02) -#define MCF_UART_USR_TXRDY (0x04) -#define MCF_UART_USR_TXEMP (0x08) -#define MCF_UART_USR_OE (0x10) -#define MCF_UART_USR_PE (0x20) -#define MCF_UART_USR_FE (0x40) -#define MCF_UART_USR_RB (0x80) - -/* Bit definitions and macros for MCF_UART_UCSR */ -#define MCF_UART_UCSR_TCS(x) (((x)&0x0F)<<0) -#define MCF_UART_UCSR_RCS(x) (((x)&0x0F)<<4) -#define MCF_UART_UCSR_RCS_SYS_CLK (0xD0) -#define MCF_UART_UCSR_RCS_CTM16 (0xE0) -#define MCF_UART_UCSR_RCS_CTM (0xF0) -#define MCF_UART_UCSR_TCS_SYS_CLK (0x0D) -#define MCF_UART_UCSR_TCS_CTM16 (0x0E) -#define MCF_UART_UCSR_TCS_CTM (0x0F) - -/* Bit definitions and macros for MCF_UART_UCR */ -#define MCF_UART_UCR_RXC(x) (((x)&0x03)<<0) -#define MCF_UART_UCR_TXC(x) (((x)&0x03)<<2) -#define MCF_UART_UCR_MISC(x) (((x)&0x07)<<4) -#define MCF_UART_UCR_NONE (0x00) -#define MCF_UART_UCR_STOP_BREAK (0x70) -#define MCF_UART_UCR_START_BREAK (0x60) -#define MCF_UART_UCR_BKCHGINT (0x50) -#define MCF_UART_UCR_RESET_ERROR (0x40) -#define MCF_UART_UCR_RESET_TX (0x30) -#define MCF_UART_UCR_RESET_RX (0x20) -#define MCF_UART_UCR_RESET_MR (0x10) -#define MCF_UART_UCR_TX_DISABLED (0x08) -#define MCF_UART_UCR_TX_ENABLED (0x04) -#define MCF_UART_UCR_RX_DISABLED (0x02) -#define MCF_UART_UCR_RX_ENABLED (0x01) - -/* Bit definitions and macros for MCF_UART_UIPCR */ -#define MCF_UART_UIPCR_CTS (0x01) -#define MCF_UART_UIPCR_COS (0x10) - -/* Bit definitions and macros for MCF_UART_UACR */ -#define MCF_UART_UACR_IEC (0x01) - -/* Bit definitions and macros for MCF_UART_UISR */ -#define MCF_UART_UISR_TXRDY (0x01) -#define MCF_UART_UISR_RXRDY_FU (0x02) -#define MCF_UART_UISR_DB (0x04) -#define MCF_UART_UISR_RXFTO (0x08) -#define MCF_UART_UISR_TXFIFO (0x10) -#define MCF_UART_UISR_RXFIFO (0x20) -#define MCF_UART_UISR_COS (0x80) - -/* Bit definitions and macros for MCF_UART_UIMR */ -#define MCF_UART_UIMR_TXRDY (0x01) -#define MCF_UART_UIMR_RXRDY_FU (0x02) -#define MCF_UART_UIMR_DB (0x04) -#define MCF_UART_UIMR_COS (0x80) - -/* Bit definitions and macros for MCF_UART_UIP */ -#define MCF_UART_UIP_CTS (0x01) - -/* Bit definitions and macros for MCF_UART_UOP1 */ -#define MCF_UART_UOP1_RTS (0x01) - -/* Bit definitions and macros for MCF_UART_UOP0 */ -#define MCF_UART_UOP0_RTS (0x01) - -/********************************************************************/ - -#endif /* __MCF523X_UART_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_vars.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_vars.h deleted file mode 100644 index 9608e63d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_vars.h +++ /dev/null @@ -1,48 +0,0 @@ -/************************************************************************** - * FILE NAME: mcf523x_vars.h,v $ COPYRIGHT (c) Freescale 2004 * - * DESCRIPTION: All Rights Reserved * - * Variables that define some features of the MCF523x. * - * !!!!This file must only be included once in every project!!!! * - *========================================================================* - * ORIGINAL AUTHOR: Geoff Emerson [r47354] * - - **************************************************************************/ - -/* eTPU characteristics definition */ -struct eTPU_struct *eTPU = ( struct eTPU_struct * )0x401D0000; - -uint32_t fs_etpu_code_start = 0x401E0000; -uint32_t fs_etpu_data_ram_start = 0x401D8000; -uint32_t fs_etpu_data_ram_end = 0x401D85FC; -uint32_t fs_etpu_data_ram_ext = 0x401DC000; - -/********************************************************************* - * - * Copyright: - * Freescale Semiconductor, INC. All Rights Reserved. - * You are hereby granted a copyright license to use, modify, and - * distribute the SOFTWARE so long as this entire notice is - * retained without alteration in any modified and/or redistributed - * versions, and that such modified versions are clearly identified - * as such. No licenses are granted by implication, estoppel or - * otherwise under any patents or trademarks of Freescale - * Semiconductor, Inc. This software is provided on an "AS IS" - * basis and without warranty. - * - * To the maximum extent permitted by applicable law, Freescale - * Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, - * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A - * PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH - * REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) - * AND ANY ACCOMPANYING WRITTEN MATERIALS. - * - * To the maximum extent permitted by applicable law, IN NO EVENT - * SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER - * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, - * BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER - * PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. - * - * Freescale Semiconductor assumes no responsibility for the - * maintenance and support of this software - * - ********************************************************************/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_wtm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_wtm.h deleted file mode 100644 index f221322d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf523x_wtm.h +++ /dev/null @@ -1,100 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf523x_wtm.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - - -#ifndef __MCF523X_WTM_H__ -#define __MCF523X_WTM_H__ - -/********************************************************************* -* -* Watchdog Timer Modules (WTM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_WTM_WCR (*(vuint16*)(void*)(&__IPSBAR[0x140000])) -#define MCF_WTM_WMR (*(vuint16*)(void*)(&__IPSBAR[0x140002])) -#define MCF_WTM_WCNTR (*(vuint16*)(void*)(&__IPSBAR[0x140004])) -#define MCF_WTM_WSR (*(vuint16*)(void*)(&__IPSBAR[0x140006])) - -/* Bit definitions and macros for MCF_WTM_WCR */ -#define MCF_WTM_WCR_EN (0x0001) -#define MCF_WTM_WCR_HALTED (0x0002) -#define MCF_WTM_WCR_DOZE (0x0004) -#define MCF_WTM_WCR_WAIT (0x0008) - -/* Bit definitions and macros for MCF_WTM_WMR */ -#define MCF_WTM_WMR_WM0 (0x0001) -#define MCF_WTM_WMR_WM1 (0x0002) -#define MCF_WTM_WMR_WM2 (0x0004) -#define MCF_WTM_WMR_WM3 (0x0008) -#define MCF_WTM_WMR_WM4 (0x0010) -#define MCF_WTM_WMR_WM5 (0x0020) -#define MCF_WTM_WMR_WM6 (0x0040) -#define MCF_WTM_WMR_WM7 (0x0080) -#define MCF_WTM_WMR_WM8 (0x0100) -#define MCF_WTM_WMR_WM9 (0x0200) -#define MCF_WTM_WMR_WM10 (0x0400) -#define MCF_WTM_WMR_WM11 (0x0800) -#define MCF_WTM_WMR_WM12 (0x1000) -#define MCF_WTM_WMR_WM13 (0x2000) -#define MCF_WTM_WMR_WM14 (0x4000) -#define MCF_WTM_WMR_WM15 (0x8000) - -/* Bit definitions and macros for MCF_WTM_WCNTR */ -#define MCF_WTM_WCNTR_WC0 (0x0001) -#define MCF_WTM_WCNTR_WC1 (0x0002) -#define MCF_WTM_WCNTR_WC2 (0x0004) -#define MCF_WTM_WCNTR_WC3 (0x0008) -#define MCF_WTM_WCNTR_WC4 (0x0010) -#define MCF_WTM_WCNTR_WC5 (0x0020) -#define MCF_WTM_WCNTR_WC6 (0x0040) -#define MCF_WTM_WCNTR_WC7 (0x0080) -#define MCF_WTM_WCNTR_WC8 (0x0100) -#define MCF_WTM_WCNTR_WC9 (0x0200) -#define MCF_WTM_WCNTR_WC10 (0x0400) -#define MCF_WTM_WCNTR_WC11 (0x0800) -#define MCF_WTM_WCNTR_WC12 (0x1000) -#define MCF_WTM_WCNTR_WC13 (0x2000) -#define MCF_WTM_WCNTR_WC14 (0x4000) -#define MCF_WTM_WCNTR_WC15 (0x8000) - -/* Bit definitions and macros for MCF_WTM_WSR */ -#define MCF_WTM_WSR_WS0 (0x0001) -#define MCF_WTM_WSR_WS1 (0x0002) -#define MCF_WTM_WSR_WS2 (0x0004) -#define MCF_WTM_WSR_WS3 (0x0008) -#define MCF_WTM_WSR_WS4 (0x0010) -#define MCF_WTM_WSR_WS5 (0x0020) -#define MCF_WTM_WSR_WS6 (0x0040) -#define MCF_WTM_WSR_WS7 (0x0080) -#define MCF_WTM_WSR_WS8 (0x0100) -#define MCF_WTM_WSR_WS9 (0x0200) -#define MCF_WTM_WSR_WS10 (0x0400) -#define MCF_WTM_WSR_WS11 (0x0800) -#define MCF_WTM_WSR_WS12 (0x1000) -#define MCF_WTM_WSR_WS13 (0x2000) -#define MCF_WTM_WSR_WS14 (0x4000) -#define MCF_WTM_WSR_WS15 (0x8000) - -/********************************************************************/ - -#endif /* __MCF523X_WTM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf5xxx.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf5xxx.h deleted file mode 100644 index 2a7d199f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/mcf5xxx.h +++ /dev/null @@ -1,203 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 metrowerks inc. All rights reserved. * - * * - * * - * $RCSfile: mcf5xxx.h,v $ * - * $Revision$ * - * $Date$ * - * * - * DESCRIPTION * - * Definitions common to all ColdFire processors. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef _CPU_MCF5XXX_H -#define _CPU_MCF5XXX_H - -/***********************************************************************/ -/* - * Misc. Defines - */ - -#ifdef FALSE -#undef FALSE -#endif -#define FALSE (0) - -#ifdef TRUE -#undef TRUE -#endif -#define TRUE (1) - -#ifdef NULL -#undef NULL -#endif -#define NULL (0) - -/***********************************************************************/ -/* - * The basic data types - */ - -typedef unsigned char uint8; /* 8 bits */ -typedef unsigned short int uint16; /* 16 bits */ -typedef unsigned long int uint32; /* 32 bits */ - -typedef signed char int8; /* 8 bits */ -typedef signed short int int16; /* 16 bits */ -typedef signed long int int32; /* 32 bits */ - -typedef volatile uint8 vuint8; /* 8 bits */ -typedef volatile uint16 vuint16; /* 16 bits */ -typedef volatile uint32 vuint32; /* 32 bits */ - -/***********************************************************************/ -/* - * Common M68K & ColdFire definitions - */ - -#define ADDRESS uint32 -#define INSTRUCTION uint16 -#define ILLEGAL 0x4AFC -#define CPU_WORD_SIZE 16 - -#define MCF5XXX_SR_T (0x8000) -#define MCF5XXX_SR_S (0x2000) -#define MCF5XXX_SR_M (0x1000) -#define MCF5XXX_SR_IPL (0x0700) -#define MCF5XXX_SR_IPL_0 (0x0000) -#define MCF5XXX_SR_IPL_1 (0x0100) -#define MCF5XXX_SR_IPL_2 (0x0200) -#define MCF5XXX_SR_IPL_3 (0x0300) -#define MCF5XXX_SR_IPL_4 (0x0400) -#define MCF5XXX_SR_IPL_5 (0x0500) -#define MCF5XXX_SR_IPL_6 (0x0600) -#define MCF5XXX_SR_IPL_7 (0x0700) -#define MCF5XXX_SR_X (0x0010) -#define MCF5XXX_SR_N (0x0008) -#define MCF5XXX_SR_Z (0x0004) -#define MCF5XXX_SR_V (0x0002) -#define MCF5XXX_SR_C (0x0001) - -#define MCF5XXX_CACR_CENB (0x80000000) -#define MCF5XXX_CACR_CPDI (0x10000000) -#define MCF5XXX_CACR_CPD (0x10000000) -#define MCF5XXX_CACR_CFRZ (0x08000000) -#define MCF5XXX_CACR_CINV (0x01000000) -#define MCF5XXX_CACR_DIDI (0x00800000) -#define MCF5XXX_CACR_DISD (0x00400000) -#define MCF5XXX_CACR_INVI (0x00200000) -#define MCF5XXX_CACR_INVD (0x00100000) -#define MCF5XXX_CACR_CEIB (0x00000400) -#define MCF5XXX_CACR_DCM_WR (0x00000000) -#define MCF5XXX_CACR_DCM_CB (0x00000100) -#define MCF5XXX_CACR_DCM_IP (0x00000200) -#define MCF5XXX_CACR_DCM (0x00000200) -#define MCF5XXX_CACR_DCM_II (0x00000300) -#define MCF5XXX_CACR_DBWE (0x00000100) -#define MCF5XXX_CACR_DWP (0x00000020) -#define MCF5XXX_CACR_EUST (0x00000010) -#define MCF5XXX_CACR_CLNF_00 (0x00000000) -#define MCF5XXX_CACR_CLNF_01 (0x00000002) -#define MCF5XXX_CACR_CLNF_10 (0x00000004) -#define MCF5XXX_CACR_CLNF_11 (0x00000006) - -#define MCF5XXX_ACR_AB(a) ((a)&0xFF000000) -#define MCF5XXX_ACR_AM(a) (((a)&0xFF000000) >> 8) -#define MCF5XXX_ACR_EN (0x00008000) -#define MCF5XXX_ACR_SM_USER (0x00000000) -#define MCF5XXX_ACR_SM_SUPER (0x00002000) -#define MCF5XXX_ACR_SM_IGNORE (0x00006000) -#define MCF5XXX_ACR_ENIB (0x00000080) -#define MCF5XXX_ACR_CM (0x00000040) -#define MCF5XXX_ACR_DCM_WR (0x00000000) -#define MCF5XXX_ACR_DCM_CB (0x00000020) -#define MCF5XXX_ACR_DCM_IP (0x00000040) -#define MCF5XXX_ACR_DCM_II (0x00000060) -#define MCF5XXX_ACR_CM (0x00000040) -#define MCF5XXX_ACR_BWE (0x00000020) -#define MCF5XXX_ACR_WP (0x00000004) - -#define MCF5XXX_RAMBAR_BA(a) ((a)&0xFFFFC000) -#define MCF5XXX_RAMBAR_PRI_00 (0x00000000) -#define MCF5XXX_RAMBAR_PRI_01 (0x00004000) -#define MCF5XXX_RAMBAR_PRI_10 (0x00008000) -#define MCF5XXX_RAMBAR_PRI_11 (0x0000C000) -#define MCF5XXX_RAMBAR_WP (0x00000100) -#define MCF5XXX_RAMBAR_CI (0x00000020) -#define MCF5XXX_RAMBAR_SC (0x00000010) -#define MCF5XXX_RAMBAR_SD (0x00000008) -#define MCF5XXX_RAMBAR_UC (0x00000004) -#define MCF5XXX_RAMBAR_UD (0x00000002) -#define MCF5XXX_RAMBAR_V (0x00000001) - -/***********************************************************************/ -/* - * The ColdFire family of processors has a simplified exception stack - * frame that looks like the following: - * - * 3322222222221111 111111 - * 1098765432109876 5432109876543210 - * 8 +----------------+----------------+ - * | Program Counter | - * 4 +----------------+----------------+ - * |FS/Fmt/Vector/FS| SR | - * SP --> 0 +----------------+----------------+ - * - * The stack self-aligns to a 4-byte boundary at an exception, with - * the FS/Fmt/Vector/FS field indicating the size of the adjustment - * (SP += 0,1,2,3 bytes). - */ - -#define MCF5XXX_RD_SF_FORMAT(PTR) \ - ((*((uint16 *)(PTR)) >> 12) & 0x00FF) - -#define MCF5XXX_RD_SF_VECTOR(PTR) \ - ((*((uint16 *)(PTR)) >> 2) & 0x00FF) - -#define MCF5XXX_RD_SF_FS(PTR) \ - ( ((*((uint16 *)(PTR)) & 0x0C00) >> 8) | (*((uint16 *)(PTR)) & 0x0003) ) - -#define MCF5XXX_SF_SR(PTR) *((uint16 *)(PTR)+1) -#define MCF5XXX_SF_PC(PTR) *((uint32 *)(PTR)+1) - -/********************************************************************/ -/* - * Functions provided by mcf5xxx.s - */ - -int asm_set_ipl( uint32 ); -void mcf5xxx_wr_cacr( uint32 ); -void mcf5xxx_wr_acr0( uint32 ); -void mcf5xxx_wr_acr1( uint32 ); -void mcf5xxx_wr_acr2( uint32 ); -void mcf5xxx_wr_acr3( uint32 ); -void mcf5xxx_wr_other_a7( uint32 ); -void mcf5xxx_wr_other_sp( uint32 ); -void mcf5xxx_wr_vbr( uint32 ); -void mcf5xxx_wr_macsr( uint32 ); -void mcf5xxx_wr_mask( uint32 ); -void mcf5xxx_wr_acc0( uint32 ); -void mcf5xxx_wr_accext01( uint32 ); -void mcf5xxx_wr_accext23( uint32 ); -void mcf5xxx_wr_acc1( uint32 ); -void mcf5xxx_wr_acc2( uint32 ); -void mcf5xxx_wr_acc3( uint32 ); -void mcf5xxx_wr_sr( uint32 ); -void mcf5xxx_wr_rambar0( uint32 ); -void mcf5xxx_wr_rambar1( uint32 ); -void mcf5xxx_wr_mbar( uint32 ); -void mcf5xxx_wr_mbar0( uint32 ); -void mcf5xxx_wr_mbar1( uint32 ); - -/********************************************************************/ - -#endif /* _CPU_MCF5XXX_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/typedefs.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/typedefs.h deleted file mode 100644 index 8bb64e45..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/mcf523x/typedefs.h +++ /dev/null @@ -1,113 +0,0 @@ -/************************************************************************** - * FILE NAME: $RCSfile: typedefs.h,v $ COPYRIGHT (c) Freescale 2004 * - * DESCRIPTION: All Rights Reserved * - * This file defines all of the data types for the Motorola header file. * - *========================================================================* - * ORIGINAL AUTHOR: Jeff Loeliger (r12110) * - * $Log: typedefs.h,v $ - * Revision 1.1 2006/05/14 21:59:16 wolti - * - initial version of MCF5235 port - * - * Revision 1.1.1.1 2005/05/26 17:07:05 C-machim - * CF 6.0 Stationeries - * - * Revision 1.2 2004/11/17 12:43:12 r12110 - * -Removed #ifdef DEBUG from around initial comment block. - * - * Revision 1.1 2004/11/17 12:38:48 r12110 - * -Initial version checked into CVS. - * -Updated copyright from Motorola to Freescale. - * - *........................................................................* - * 0.1 J. Loeliger 17/Feb/03 Initial version of file. * - * 0.2 J. Loeliger 06/Mar/03 Added DCC support. * - * 0.3 J. Loeliger 07/May/03 Change to fully use ISO data types. * - * 0.4 J. Loeliger 17/Jun/03 Change name to motint.h and merge * - * MPC5500 and MAC7100 files. * - * 0.5 J. Loeliger 04/Nov/03 Changed name to typedefs.h. * - * 0.6 J. Loeliger 09/May/04 Changed to support GHS and GCC. * - **************************************************************************/ - -#ifndef _TYPEDEFS_H_ -#define _TYPEDEFS_H_ - -#ifdef __MWERKS__ //Metrowerk CodeWarrior -#include - - // Standard typedefs used by header files, based on ISO C standard -typedef volatile int8_t vint8_t; -typedef volatile uint8_t vuint8_t; - -typedef volatile int16_t vint16_t; -typedef volatile uint16_t vuint16_t; - -typedef volatile int32_t vint32_t; -typedef volatile uint32_t vuint32_t; - -#else -#ifdef __GHS__ //GreenHills -#include - - // Standard typedefs used by header files, based on ISO C standard -typedef volatile int8_t vint8_t; -typedef volatile uint8_t vuint8_t; - -typedef volatile int16_t vint16_t; -typedef volatile uint16_t vuint16_t; - -typedef volatile int32_t vint32_t; -typedef volatile uint32_t vuint32_t; - -#else - - // This is needed for compilers that don't have a stdint.h file - -typedef signed char int8_t; -typedef unsigned char uint8_t; -typedef volatile signed char vint8_t; -typedef volatile unsigned char vuint8_t; - -typedef signed short int16_t; -typedef unsigned short uint16_t; -typedef volatile signed short vint16_t; -typedef volatile unsigned short vuint16_t; - -typedef signed int int32_t; -typedef unsigned int uint32_t; -typedef volatile signed int vint32_t; -typedef volatile unsigned int vuint32_t; - -#endif -#endif -#endif - -/********************************************************************* - * - * Copyright: - * Freescale Semiconductor, INC. All Rights Reserved. - * You are hereby granted a copyright license to use, modify, and - * distribute the SOFTWARE so long as this entire notice is - * retained without alteration in any modified and/or redistributed - * versions, and that such modified versions are clearly identified - * as such. No licenses are granted by implication, estoppel or - * otherwise under any patents or trademarks of Freescale - * Semiconductor, Inc. This software is provided on an "AS IS" - * basis and without warranty. - * - * To the maximum extent permitted by applicable law, Freescale - * Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, - * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A - * PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH - * REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) - * AND ANY ACCOMPANYING WRITTEN MATERIALS. - * - * To the maximum extent permitted by applicable law, IN NO EVENT - * SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER - * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, - * BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER - * PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. - * - * Freescale Semiconductor assumes no responsibility for the - * maintenance and support of this software - * - ********************************************************************/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/port.h deleted file mode 100644 index a01e5b82..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/port.h +++ /dev/null @@ -1,57 +0,0 @@ - /* - * FreeModbus Libary: MCF5235 Port - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -#define INLINE inline -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#define ENTER_CRITICAL_SECTION( ) prvvPortEnterCritical() -#define EXIT_CRITICAL_SECTION( ) prvvPortExitCritical() - -#define assert( x ) - -inline void prvvPortEnterCritical( ); -inline void prvvPortExitCritical( ); - -typedef char BOOL; - -typedef unsigned char UCHAR; -typedef char CHAR; - -typedef unsigned short USHORT; -typedef short SHORT; - -typedef unsigned long ULONG; -typedef long LONG; - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/portevent.c deleted file mode 100644 index 963269a2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/portevent.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * FreeModbus Libary: MCF5235 Port - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/portother.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/portother.c deleted file mode 100644 index f92f1408..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/portother.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * FreeModbus Libary: MCF5235 Port - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "port.h" -#include "mcf5xxx.h" -#include "mcf523x.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegSR; -static char *heap_ptr; - -/* ----------------------- Start implementation -----------------------------*/ -void -prvvPortEnterCritical( ) -{ - asm volatile ( "move.w %%sr, %%d0\n" - "move.w %%d0, %0\n" - "move.w #0x2700, %%sr":"=m" ( usRegSR )::"%%d0" ); -} - -void -prvvPortExitCritical( ) -{ - asm volatile ( "move.w %0, %%d0\n" - "move.w %%d0, %%sr\n"::"m" ( usRegSR ):"%%d0" ); -} - - -char * -sbrk( int nbytes ) -{ - extern void _end; - char *base; - - if( !heap_ptr ) - heap_ptr = ( char * )&_end; - base = heap_ptr; - heap_ptr += nbytes; - return base; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/portserial.c deleted file mode 100644 index 5a0bd726..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/portserial.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * FreeModbus Libary: MCF5235 Port - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes --------------------------------- */ -#include "port.h" -#include "mcf5xxx.h" -#include "mcf523x.h" - -/* ----------------------- Modbus includes --------------------------------- */ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ----------------------------------------- */ -#define BAUDRATE_VALUE(fsys, baud) ( ( fsys )/(32UL * baud) ) - -/* ----------------------- Static variables -------------------------------- */ -BOOL bTXEnabled; -BOOL bRXEnabled; - -/* ----------------------- Start implementation ---------------------------- */ - -void -vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ - UCHAR ucUCR = 0; - UCHAR ucIMR = 0; - - if( xRxEnable ) - { - ucUCR |= MCF_UART_UCR_RXC( 0x1 ); - ucIMR |= MCF_UART_UIMR_RXRDY_FU; - bRXEnabled = TRUE; - } - else - { - ucUCR |= MCF_UART_UCR_RXC( 0x2 ); - bRXEnabled = FALSE; - } - if( xTxEnable ) - { - ucUCR |= MCF_UART_UCR_TXC( 0x1 ); - ucIMR |= MCF_UART_UIMR_TXRDY; - bTXEnabled = TRUE; - } - else - { - ucUCR |= MCF_UART_UCR_TXC( 0x2 ); - bTXEnabled = FALSE; - } - MCF_UART_UCR0 = ucUCR; - MCF_UART_UIMR0 = ucIMR; -} - -BOOL -xMBPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - BOOL bStatus = TRUE; - UCHAR ucMode = 0; - - (void)ucPort; - - switch ( eParity ) - { - case MB_PAR_EVEN: - ucMode |= MCF_UART_UMR_PM( 0x0 ); - break; - case MB_PAR_ODD: - ucMode |= MCF_UART_UMR_PM( 0x0 ) | MCF_UART_UMR_PT; - break; - case MB_PAR_NONE: - ucMode |= MCF_UART_UMR_PM( 0x3 ); - break; - default: - bStatus = FALSE; - } - - switch ( ucDataBits ) - { - case 8: - ucMode |= MCF_UART_UMR_BC( 0x3 ); - break; - case 7: - ucMode |= MCF_UART_UMR_BC( 0x2 ); - break; - default: - bStatus = FALSE; - } - if( bStatus == TRUE ) - { - /* UART 0: Reset transmitter, receiver and mode register pointer */ - MCF_UART_UCR0 = MCF_UART_UCR_MISC( 0x3 ); - MCF_UART_UCR0 = MCF_UART_UCR_MISC( 0x2 ); - MCF_UART_UCR0 = MCF_UART_UCR_MISC( 0x1 ); - - /* UART 0: Configure parity, databits and stopbits. */ - MCF_UART_UMR0 = ucMode; - MCF_UART_UMR0 = MCF_UART_UMR_SB( 0x7 ); - - /* UART 0 Clocking */ - MCF_UART_UCSR0 = MCF_UART_UCSR_RCS( 0xd ) | MCF_UART_UCSR_TCS( 0xd ); - MCF_UART_UBG10 = BAUDRATE_VALUE( FCPU, ulBaudRate ) >> 8U; - MCF_UART_UBG20 = BAUDRATE_VALUE( FCPU, ulBaudRate ) & 0xFFU; - - /* UART 0: Enable interrupts */ - MCF_INTC0_ICR13 = MCF_INTC0_ICRn_IL( 0x1 ) | MCF_INTC0_ICRn_IP( 0x1 ); - MCF_INTC0_IMRL &= ~MCF_INTC0_IMRL_INT_MASK13; - - /* UART 0 Miscellaneous */ - MCF_UART_UACR0 = 0; - - /* UART 0: Enable pins */ - MCF_GPIO_PAR_UART = MCF_GPIO_PAR_UART_PAR_U0RXD | - MCF_GPIO_PAR_UART_PAR_U0TXD; - vMBPortSerialEnable( FALSE, FALSE ); - } - - return TRUE; -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - MCF_UART_UTB0 = ucByte; - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - *pucByte = MCF_UART_URB0; - return TRUE; -} - -void -prvvMBPortSerialISR( ) -{ - if( bTXEnabled && ( MCF_UART_UISR0 & MCF_UART_UISR_TXRDY ) ) - { - ( void )pxMBFrameCBTransmitterEmpty( ); - } - if( bRXEnabled && ( MCF_UART_UISR0 & MCF_UART_UISR_RXRDY_FU ) ) - { - ( void )pxMBFrameCBByteReceived( ); - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/porttimer.c deleted file mode 100644 index b09e8199..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/port/porttimer.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * FreeModbus Libary: MCF5235 Port - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes --------------------------------- */ -#include "port.h" -#include "mcf5xxx.h" -#include "mcf523x.h" - -/* ----------------------- Modbus includes --------------------------------- */ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ----------------------------------------- */ -#define PIT_PRESCALER 1024UL -#define PIT_TIMER_TICKS ( FCPU / PIT_PRESCALER ) -#define PIT_MODULUS_REGISTER(t50us) \ - ( (t50us * PIT_TIMER_TICKS )/20000UL - 1UL) - -/* ----------------------- Static variables -------------------------------- */ -USHORT usTimerModulus; - -/* ----------------------- Start implementation ---------------------------- */ - -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ - usTimerModulus = PIT_MODULUS_REGISTER( usTim1Timerout50us ); - /* Configure prescaler */ - MCF_PIT_PCSR0 = MCF_PIT_PCSR_PRE( 0x9 ) | MCF_PIT_PCSR_OVW; - /* Configure interrupt priority and level */ - MCF_INTC0_ICR36 = MCF_INTC0_ICRn_IL( 0x1 ) | MCF_INTC0_ICRn_IP( 0x2 ); - /* Unmask interrupt */ - MCF_INTC0_IMRH &= ~MCF_INTC0_IMRH_INT_MASK36; - - return TRUE; -} - -inline void -vMBPortTimersEnable( ) -{ - MCF_PIT_PMR0 = usTimerModulus; - MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_EN | MCF_PIT_PCSR_PIF; -} - -inline void -vMBPortTimersDisable( ) -{ - MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIF; - MCF_PIT_PCSR0 &= ~MCF_PIT_PCSR_PIE; - MCF_PIT_PCSR0 &= ~MCF_PIT_PCSR_EN; -} - -void -prvvMBPortTimerISR( ) -{ - ( void )pxMBPortCBTimerExpired( ); - MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIF; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/support/AM29_160BB.CFP b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/support/AM29_160BB.CFP deleted file mode 100644 index 40360393..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/support/AM29_160BB.CFP +++ /dev/null @@ -1,57 +0,0 @@ -;version 1.00, 01/14/2005, Copyright P&E Microcomputer Systems, www.pemicro.com -;device AMD, 29F160D-B, 1x16x1meg -;device AMD, 29LV160B-B, 1x16x1meg -;device AMD, 29LV160D-B, 1x16x1meg -;device Alliance, 29LV160-B, 1x16x1meg -;device Fujitsu, 29F160E-B, 1x16x1meg -;device Fujitsu, 29LV160-B, 1x16x1meg -;device Hyundai, 29LV160-B, 1x16x1meg -;device MXIC, 29LV160-B, 1x16x1meg -;device MXIC, 29LV160A-B, 1x16x1meg -;device MXIC, 29LV160B-B, 1x16x1meg -;device MXIC, 29LV161-B, 1x16x1meg -;device ST, 29F160B-B, 1x16x1meg -;device ST, 29W160B-B, 1x16x1meg -;device ST, 29W160D-B, 1x16x1meg -;device ST, 29W160E-B, 1x16x1meg -;device Toshiba, 50VFS1481-B, 1x16x1meg -;device Toshiba, 50VFS2481-B, 1x16x1meg -;device Toshiba, 58FV160-B, 1x16x1meg -;begin_cs device=$00000000, length=$00200000, ram=$10000000 -;end_cs -NO_ON_CHIP_RAM -CONTROL=10000021/0C05/ ;ram at $10000000 -NO_TIMING_TEST -USER=BE Block Erase 2Block > /00000000/00000022/ -; -S31510000000100001F0100002100000010000000000B6 -S315100000100020000000000000100000FE000000009C -S3151000002000000000100001520000000010000190B6 -S31510000030100000EC100000EE100000F000000000B0 -S315100000400000000000000000100000D800000000B2 -S315100000500000400000006000000080000001000069 -S31510000060000200000003000000040000000500006C -S31510000070000600000007000000080000000900004C -S31510000080000A0000000B0000000C0000000D00002C -S31510000090000E0000000F000000100000001100000C -S315100000A000120000001300000014000000150000EC -S315100000B000160000001700000018000000190000CC -S315100000C0001A0000001B0000001C0000001D0000AC -S315100000D0001E0000001F0000227C1000004C207142 -S315100000E00C00D1FC00000000600000324AC84AC86B -S315100000F02A7C0000AAAA2C7C000055544AC8223C2F -S31510000100FFFFFFFF32180C81FFFFFFFF66065580C9 -S3151000011066F24AC8203CFFFFFFFF4AC83ABCAAAAAB -S315100001203CBC55553ABC80803ABCAAAA3CBC555535 -S3151000013030BC3030223CFFFFFFFF32100C81FFFF36 -S31510000140FFFF66F632100C81FFFFFFFF66EC428060 -S315100001504AC83ABCAAAA3CBC55553ABC80803ABC9F -S31510000160AAAA3CBC55553ABC1010223CFFFFFFFF13 -S315100001703239000000000C81FFFFFFFF66F23239B2 -S31510000180000000000C81FFFFFFFF66E442804AC8B2 -S31510000190287C10000210204B2403428042813ABC76 -S315100001A0AAAA3CBC55553ABCA0A0301C30C0322877 -S315100001B0FFFEB28066F83228FFFEB28066F05582E6 -S315100001C066DC287C10000210301C321BB2806608D8 -S315100001D0558366F442804AC8203CFFFFFFFF4AC899 -S804000000FB diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/support/m5235.gdb b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/support/m5235.gdb deleted file mode 100644 index fc1379b1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/support/m5235.gdb +++ /dev/null @@ -1,67 +0,0 @@ -define setup-and-load - set $rambar=0x100001 - tbreak start - tbreak main -end - -define debug-printexception - printf "vector: %d", *(unsigned short *)$sp >> 2 &0x1F - printf "old pc: 0x%08x", *(unsigned long *)($sp + 4) - printf "old sr: 0x%02x", *(unsigned short *)($sp + 2) -end - -define execute -# set $sp = *(long *)0x20000 - set $pc = *(long *)0x100004 - tk gdbtk_update -end - -define write - set *0x1000000 = 33 -end - -define simple - write - print /x *0x1000000 -end - -define wait - set $delay = 10000 - while $delay > 0 - set $delay = $delay - 1 - end -end - -define debug-sramtest - set $srambase = 0x20000000 - set $sramsize = 0x00010000 - printf "Testing SRAM : 0x%08X - 0x%08X\n", $srambase, ($srambase + $sramsize) - set $i = $srambase - while $i < ($srambase + $sramsize) - set *(unsigned long *)($i) = 0xAA55AA55 - wait - if 0xAA55AA55 != *(unsigned long *)$i - printf " 0x%08X = FAIL\n", $i - else - printf " 0x%08X = OK\n", $i - end - set $i = $i + 0x1000 - end -end - -define debug-sdramtest - set $sdrambase = 0x00000000 - set $sdramsize = 0x01100000 - printf "Testing SDRAM : 0x%08X - 0x%08X\n", $sdrambase, ($sdrambase + $sdramsize) - set $i = $sdrambase - while $i < ($sdrambase + $sdramsize) - set *(unsigned long *)($i) = 0xAA55AA55 - wait - if 0xAA55AA55 != *(unsigned long *)$i - printf " 0x%08X = FAIL\n", $i - else - printf " 0x%08X = OK\n", $i - end - set $i = $i + 0x10000 - end -end diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/support/mcf5235.CF b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/support/mcf5235.CF deleted file mode 100644 index 4236b66b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/support/mcf5235.CF +++ /dev/null @@ -1,320 +0,0 @@ -ColdFire Initialisation Utility 2.7.0 -PROCESSOR = ColdFire MCF5235 Processor -INTERNAL_CS = 0x00400001, 0x00000000 -INTERNAL_MODUSE = 0x80000000, 0x00000000 -INTERNAL_CONFIG = 0x000c443f, 0x00000000 -INTERNAL_MISC = 0x05529470, 0x00000000 -INTERNAL_MISC2 = 0x00000000, 0x00000000 -VBR = 0x00000000, 0x00000000 -SR = 0x2700, 0x0000 -RAMBAR = 0x00100001, 0x00000000 -IPSBAR = 0x40000001, 0x00000000 -CCON = 0x8008, 0x0000 -SYNCR = 0x00080000, 0x00000000 -SYNSR = 0x00000000, 0x00000000 -CACR = 0x00000000, 0x00000000 -ACR0 = 0x00000000, 0x00000000 -ACR1 = 0x00000000, 0x00000000 -CSAR0 = 0x0000, 0x0000 -CSAR1 = 0x0000, 0x0000 -CSAR2 = 0x0000, 0x0000 -CSAR3 = 0x0000, 0x0000 -CSAR4 = 0x0000, 0x0000 -CSAR5 = 0x0000, 0x0000 -CSAR6 = 0x0000, 0x0000 -CSAR7 = 0x0000, 0x0000 -CSMR0 = 0x00000000, 0x00000000 -CSMR1 = 0x00000000, 0x00000000 -CSMR2 = 0x00000000, 0x00000000 -CSMR3 = 0x00000000, 0x00000000 -CSMR4 = 0x00000000, 0x00000000 -CSMR5 = 0x00000000, 0x00000000 -CSMR6 = 0x00000000, 0x00000000 -CSMR7 = 0x00000000, 0x00000000 -CSCR0 = 0x3d00, 0x0000 -CSCR1 = 0x0000, 0x0000 -CSCR2 = 0x0000, 0x0000 -CSCR3 = 0x0000, 0x0000 -CSCR4 = 0x0000, 0x0000 -CSCR5 = 0x0000, 0x0000 -CSCR6 = 0x0000, 0x0000 -CSCR7 = 0x0000, 0x0000 -DCR = 0x01ff, 0x0000 -DACR0 = 0x00000000, 0x00000000 -DACR1 = 0x00000000, 0x00000000 -DMR0 = 0x00000000, 0x00000000 -DMR1 = 0x00000000, 0x00000000 -EPPAR = 0x0000, 0x0000 -EPDDR = 0x00, 0x00 -EPIER = 0x00, 0x00 -LPICR = 0x00, 0x00 -LPCR = 0x02, 0x00 -MPARK = 0x30e10000, 0x00000000 -QMR = 0x0104, 0x0000 -QDLYR = 0x0404, 0x0000 -QWR = 0x0000, 0x0000 -QIR = 0x0000, 0x0000 -CWCR = 0x00, 0x00 -WCR = 0x000e, 0x0000 -WMR = 0xffff, 0x0000 -DTMR0 = 0x0000, 0x0000 -DTXMR0 = 0x00, 0x00 -DTRR0 = 0xffffffff, 0x00000000 -DTCN0 = 0x00000000, 0x00000000 -DTMR1 = 0x0000, 0x0000 -DTXMR1 = 0x00, 0x00 -DTRR1 = 0xffffffff, 0x00000000 -DTCN1 = 0x00000000, 0x00000000 -DTMR2 = 0x0000, 0x0000 -DTXMR2 = 0x00, 0x00 -DTRR2 = 0xffffffff, 0x00000000 -DTCN2 = 0x00000000, 0x00000000 -DTMR3 = 0x0000, 0x0000 -DTXMR3 = 0x00, 0x00 -DTRR3 = 0xffffffff, 0x00000000 -DTCN3 = 0x00000000, 0x00000000 -PCSR0 = 0x0000, 0x0000 -PMR0 = 0xffff, 0x0000 -PCSR1 = 0x0000, 0x0000 -PMR1 = 0xffff, 0x0000 -PCSR2 = 0x0000, 0x0000 -PMR2 = 0xffff, 0x0000 -PCSR3 = 0x0000, 0x0000 -PMR3 = 0xffff, 0x0000 -UMR10 = 0x03, 0x00 -UMR20 = 0x07, 0x00 -UCSR0 = 0xdd, 0x00 -UACR0 = 0x00, 0x00 -UIMR0 = 0x03, 0x00 -UDU0 = 0x00, 0x00 -UDL0 = 0x51, 0x00 -UCR0 = 0x01, 0x00 -UMR11 = 0x13, 0x00 -UMR21 = 0x07, 0x00 -UCSR1 = 0xdd, 0x00 -UACR1 = 0x00, 0x00 -UIMR1 = 0x00, 0x00 -UDU1 = 0x00, 0x00 -UDL1 = 0x00, 0x00 -UCR1 = 0x00, 0x00 -UMR12 = 0x13, 0x00 -UMR22 = 0x07, 0x00 -UCSR2 = 0xdd, 0x00 -UACR2 = 0x00, 0x00 -UIMR2 = 0x00, 0x00 -UDU2 = 0x00, 0x00 -UDL2 = 0x00, 0x00 -UCR2 = 0x00, 0x00 -EIMR0 = 0x00000000, 0x00000000 -ECR0 = 0xf0000000, 0x00000000 -RCR0 = 0x05ee0000, 0x00000000 -TCR0 = 0x00000000, 0x00000000 -FRSR0 = 0x00000500, 0x00000000 -TFWR0 = 0x00000000, 0x00000000 -PALR0 = 0x00000000, 0x00000000 -PAUR0 = 0x00008808, 0x00000000 -OPD0 = 0x00010000, 0x00000000 -GAUR0 = 0x00000000, 0x00000000 -GALR0 = 0x00000000, 0x00000000 -IAUR0 = 0x00000000, 0x00000000 -IALR0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF0_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF1_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF2_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF3_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF4_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF5_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF6_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF7_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF8_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF9_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF10_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF11_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF12_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF13_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF14_0 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF15_0 = 0x00000000, 0x00000000 -CANMCR0 = 0xd890000f, 0x00000000 -CANCTRL0 = 0x00000000, 0x00000000 -RXGMASK0 = 0x1fffffff, 0x00000000 -RX14MASK0 = 0x1fffffff, 0x00000000 -RX15MASK0 = 0x1fffffff, 0x00000000 -IMASK0 = 0x0000, 0x0000 -INTERNAL_MSGBUFF0_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF1_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF2_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF3_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF4_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF5_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF6_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF7_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF8_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF9_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF10_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF11_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF12_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF13_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF14_1 = 0x00000000, 0x00000000 -INTERNAL_MSGBUFF15_1 = 0x00000000, 0x00000000 -CANMCR1 = 0xd890000f, 0x00000000 -CANCTRL1 = 0x00000000, 0x00000000 -RXGMASK1 = 0x1fffffff, 0x00000000 -RX14MASK1 = 0x1fffffff, 0x00000000 -RX15MASK1 = 0x1fffffff, 0x00000000 -IMASK1 = 0x0000, 0x0000 -IMRH0 = 0xffffffff, 0x00000000 -IMRH1 = 0xffffffff, 0x00000000 -IMRL0 = 0xffffdffe, 0x00000000 -IMRL1 = 0xfffffffe, 0x00000000 -ICR001 = 0x00, 0x00 -ICR002 = 0x00, 0x00 -ICR003 = 0x00, 0x00 -ICR004 = 0x00, 0x00 -ICR005 = 0x00, 0x00 -ICR006 = 0x00, 0x00 -ICR007 = 0x00, 0x00 -ICR008 = 0x00, 0x00 -ICR009 = 0x00, 0x00 -ICR010 = 0x00, 0x00 -ICR011 = 0x00, 0x00 -ICR012 = 0x00, 0x00 -ICR013 = 0x09, 0x00 -ICR014 = 0x00, 0x00 -ICR015 = 0x00, 0x00 -ICR017 = 0x00, 0x00 -ICR018 = 0x00, 0x00 -ICR019 = 0x00, 0x00 -ICR020 = 0x00, 0x00 -ICR021 = 0x00, 0x00 -ICR022 = 0x00, 0x00 -ICR023 = 0x00, 0x00 -ICR024 = 0x00, 0x00 -ICR025 = 0x00, 0x00 -ICR026 = 0x00, 0x00 -ICR027 = 0x00, 0x00 -ICR028 = 0x00, 0x00 -ICR029 = 0x00, 0x00 -ICR030 = 0x00, 0x00 -ICR031 = 0x00, 0x00 -ICR032 = 0x00, 0x00 -ICR033 = 0x00, 0x00 -ICR034 = 0x00, 0x00 -ICR035 = 0x00, 0x00 -ICR036 = 0x00, 0x00 -ICR037 = 0x00, 0x00 -ICR038 = 0x00, 0x00 -ICR039 = 0x00, 0x00 -ICR040 = 0x00, 0x00 -ICR041 = 0x00, 0x00 -ICR042 = 0x00, 0x00 -ICR043 = 0x00, 0x00 -ICR044 = 0x00, 0x00 -ICR045 = 0x00, 0x00 -ICR046 = 0x00, 0x00 -ICR047 = 0x00, 0x00 -ICR048 = 0x00, 0x00 -ICR049 = 0x00, 0x00 -ICR050 = 0x00, 0x00 -ICR051 = 0x00, 0x00 -ICR052 = 0x00, 0x00 -ICR053 = 0x00, 0x00 -ICR054 = 0x00, 0x00 -ICR055 = 0x00, 0x00 -ICR056 = 0x00, 0x00 -ICR057 = 0x00, 0x00 -ICR058 = 0x00, 0x00 -ICR059 = 0x00, 0x00 -ICR060 = 0x00, 0x00 -ICR108 = 0x00, 0x00 -ICR109 = 0x00, 0x00 -ICR110 = 0x00, 0x00 -ICR111 = 0x00, 0x00 -ICR112 = 0x00, 0x00 -ICR113 = 0x00, 0x00 -ICR114 = 0x00, 0x00 -ICR115 = 0x00, 0x00 -ICR116 = 0x00, 0x00 -ICR117 = 0x00, 0x00 -ICR118 = 0x00, 0x00 -ICR119 = 0x00, 0x00 -ICR120 = 0x00, 0x00 -ICR121 = 0x00, 0x00 -ICR122 = 0x00, 0x00 -ICR123 = 0x00, 0x00 -ICR124 = 0x00, 0x00 -ICR125 = 0x00, 0x00 -ICR127 = 0x00, 0x00 -ICR128 = 0x00, 0x00 -ICR129 = 0x00, 0x00 -ICR130 = 0x00, 0x00 -ICR131 = 0x00, 0x00 -ICR132 = 0x00, 0x00 -ICR133 = 0x00, 0x00 -ICR134 = 0x00, 0x00 -ICR135 = 0x00, 0x00 -ICR136 = 0x00, 0x00 -ICR137 = 0x00, 0x00 -ICR138 = 0x00, 0x00 -ICR139 = 0x00, 0x00 -ICR140 = 0x00, 0x00 -ICR141 = 0x00, 0x00 -ICR142 = 0x00, 0x00 -ICR143 = 0x00, 0x00 -ICR144 = 0x00, 0x00 -ICR145 = 0x00, 0x00 -ICR146 = 0x00, 0x00 -ICR147 = 0x00, 0x00 -ICR148 = 0x00, 0x00 -ICR149 = 0x00, 0x00 -ICR150 = 0x00, 0x00 -ICR151 = 0x00, 0x00 -ICR152 = 0x00, 0x00 -ICR153 = 0x00, 0x00 -ICR154 = 0x00, 0x00 -ICR155 = 0x00, 0x00 -ICR156 = 0x00, 0x00 -ICR157 = 0x00, 0x00 -ICR158 = 0x00, 0x00 -ICR159 = 0x00, 0x00 -PDDR_ADDR = 0x00, 0x00 -PDDR_DATAH = 0x00, 0x00 -PDDR_DATAL = 0x00, 0x00 -PDDR_BUSCTL = 0x00, 0x00 -PDDR_BS = 0x00, 0x00 -PDDR_CS = 0x00, 0x00 -PDDR_SDRAM = 0x00, 0x00 -PDDR_FECI2C = 0x00, 0x00 -PDDR_UARTH = 0x00, 0x00 -PDDR_UARTL = 0x00, 0x00 -PDDR_QSPI = 0x00, 0x00 -PDDR_TIMER = 0x00, 0x00 -PDDR_ETPU = 0x00, 0x00 -PAR_AD = 0x00, 0x00 -PAR_BUSCTL = 0x5d5f, 0x0000 -PAR_BS = 0x0f, 0x00 -PAR_CS = 0xfe, 0x00 -PAR_SDRAM = 0x3f, 0x00 -PAR_FECI2C = 0x00, 0x00 -PAR_UART = 0x000c, 0x0000 -PAR_QSPI = 0x00, 0x00 -PAR_TIMER = 0x0000, 0x0000 -PAR_ETPU = 0x00, 0x00 -DSCR_EIM = 0x00, 0x00 -DSCR_ETPU = 0x00, 0x00 -DSCR_FECI2C = 0x00, 0x00 -DSCR_UART = 0x00, 0x00 -DSCR_QSPI = 0x00, 0x00 -DSCR_TIMER = 0x00, 0x00 -string: External Clock Reference=25.0000 MHz -string: External frequency DMA Timer 0=1.0 MHz -string: External frequency DMA Timer 1=1.0 MHz -string: External frequency DMA Timer 2=1.0 MHz -string: External frequency DMA Timer 3=1.0 MHz -string: Baud Rate UART 0=9600 -string: Baud Rate UART 1=9600 -string: Baud Rate UART 2=9600 -string: Baud Rate UART 3=9600 -string: External frequency Timer 0=1.0 MHz -string: External frequency Timer 1=1.0 MHz -string: External frequency Timer 2=1.0 MHz -string: External frequency Timer 3=1.0 MHz diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/support/mcf5235.mac b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/support/mcf5235.mac deleted file mode 100644 index 4da2d616..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/support/mcf5235.mac +++ /dev/null @@ -1,8 +0,0 @@ -; set IPSBAR address -mbar 40000000 -; set RAMBAR for processor -control c05 100001 -; load debug file -hload ..\demo.elf -; set breakpoint at main -br main diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/vector.S b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/vector.S deleted file mode 100644 index 320c2d29..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235/vector.S +++ /dev/null @@ -1,322 +0,0 @@ - /* - * FreeModbus Libary: MCF5235 Demo Application - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id: vector.S,v 1.1 2006/05/14 21:59:16 wolti Exp $ - */ - - - .extern __stack - .extern start - .global ramvec_start - .global ramvec_end - .global romvec_start - .global romvec_end - .global vPortVecInit - - .section .vector, "x" -romvec_start: - .long __stack | Reset: Initial Stack Pointer - .long start | Reset: Initial Program Counter - .long VecDefault | Bus Error - .long VecDefault | Address Error - .long VecDefault | Illegal Instruction - .long VecDefault | Zero Divison - .space 4 | reserved - .space 4 | reserved - .long VecDefault | Privilege Violation - .long VecDefault | Trace - .long VecDefault | Unimplemented line-a opcode - .long VecDefault | Unimplemented line-b opcode - .long VecDefault | Non-PC breakpoint debug interrupt - .long VecDefault | PC breakpoint debug interrupt - .long VecDefault | Format Error - .long VecDefault | Uninitialized Interrupt - .org 0x60 - .long IRQSpurious | Spurious Interrupt - .long IRQDefault | Level 1 Interrupt - .long IRQDefault | Level 2 Interrupt - .long IRQDefault | Level 3 Interrupt - .long IRQDefault | Level 4 Interrupt - .long IRQDefault | Level 5 Interrupt - .long IRQDefault | Level 6 Interrupt - .long IRQDefault | Level 7 Interrupt - .org 0x80 - .long TrapDefault | TRAP 0 - .long TrapDefault | TRAP 1 - .long TrapDefault | TRAP 2 - .long TrapDefault | TRAP 3 - .long TrapDefault | TRAP 4 - .long TrapDefault | TRAP 5 - .long TrapDefault | TRAP 6 - .long TrapDefault | TRAP 7 - .long TrapDefault | TRAP 8 - .long TrapDefault | TRAP 9 - .long TrapDefault | TRAP 10 - .long TrapDefault | TRAP 11 - .long TrapDefault | TRAP 12 - .long TrapDefault | TRAP 13 - .long TrapDefault | TRAP 14 - .long TrapDefault | TRAP 15 - .org 0x100 - .long IRQDefault | User-Defined Interrupt 0 - .long IRQDefault | User-Defined Interrupt 1 - .long IRQDefault | User-Defined Interrupt 2 - .long IRQDefault | User-Defined Interrupt 3 - .long IRQDefault | User-Defined Interrupt 4 - .long IRQDefault | User-Defined Interrupt 5 - .long IRQDefault | User-Defined Interrupt 6 - .long IRQDefault | User-Defined Interrupt 7 - .long IRQDefault | User-Defined Interrupt 8 - .long IRQDefault | User-Defined Interrupt 9 - .long IRQDefault | User-Defined Interrupt 10 - .long IRQDefault | User-Defined Interrupt 11 - .long IRQDefault | User-Defined Interrupt 12 - .long IRQUart0 | User-Defined Interrupt 13 - .long IRQDefault | User-Defined Interrupt 14 - .long IRQDefault | User-Defined Interrupt 15 - .long IRQDefault | User-Defined Interrupt 16 - .long IRQDefault | User-Defined Interrupt 17 - .long IRQDefault | User-Defined Interrupt 18 - .long IRQDefault | User-Defined Interrupt 19 - .long IRQDefault | User-Defined Interrupt 20 - .long IRQDefault | User-Defined Interrupt 21 - .long IRQDefault | User-Defined Interrupt 22 - .long IRQDefault | User-Defined Interrupt 23 - .long IRQDefault | User-Defined Interrupt 24 - .long IRQDefault | User-Defined Interrupt 25 - .long IRQDefault | User-Defined Interrupt 26 - .long IRQDefault | User-Defined Interrupt 27 - .long IRQDefault | User-Defined Interrupt 28 - .long IRQDefault | User-Defined Interrupt 29 - .long IRQDefault | User-Defined Interrupt 30 - .long IRQDefault | User-Defined Interrupt 31 - .long IRQDefault | User-Defined Interrupt 32 - .long IRQDefault | User-Defined Interrupt 33 - .long IRQDefault | User-Defined Interrupt 34 - .long IRQDefault | User-Defined Interrupt 35 - .long IRQPIT0 | User-Defined Interrupt 36 - .long IRQDefault | User-Defined Interrupt 37 - .long IRQDefault | User-Defined Interrupt 38 - .long IRQDefault | User-Defined Interrupt 39 - .long IRQDefault | User-Defined Interrupt 40 - .long IRQDefault | User-Defined Interrupt 41 - .long IRQDefault | User-Defined Interrupt 42 - .long IRQDefault | User-Defined Interrupt 43 - .long IRQDefault | User-Defined Interrupt 44 - .long IRQDefault | User-Defined Interrupt 45 - .long IRQDefault | User-Defined Interrupt 46 - .long IRQDefault | User-Defined Interrupt 47 - .long IRQDefault | User-Defined Interrupt 48 - .long IRQDefault | User-Defined Interrupt 49 - .long IRQDefault | User-Defined Interrupt 50 - .long IRQDefault | User-Defined Interrupt 51 - .long IRQDefault | User-Defined Interrupt 52 - .long IRQDefault | User-Defined Interrupt 53 - .long IRQDefault | User-Defined Interrupt 54 - .long IRQDefault | User-Defined Interrupt 55 - .long IRQDefault | User-Defined Interrupt 56 - .long IRQDefault | User-Defined Interrupt 57 - .long IRQDefault | User-Defined Interrupt 58 - .long IRQDefault | User-Defined Interrupt 59 - .long IRQDefault | User-Defined Interrupt 60 - .long IRQDefault | User-Defined Interrupt 61 - .long IRQDefault | User-Defined Interrupt 62 - .long IRQDefault | User-Defined Interrupt 63 - .long IRQDefault | User-Defined Interrupt 64 - .long IRQDefault | User-Defined Interrupt 65 - .long IRQDefault | User-Defined Interrupt 66 - .long IRQDefault | User-Defined Interrupt 67 - .long IRQDefault | User-Defined Interrupt 68 - .long IRQDefault | User-Defined Interrupt 69 - .long IRQDefault | User-Defined Interrupt 70 - .long IRQDefault | User-Defined Interrupt 71 - .long IRQDefault | User-Defined Interrupt 72 - .long IRQDefault | User-Defined Interrupt 73 - .long IRQDefault | User-Defined Interrupt 74 - .long IRQDefault | User-Defined Interrupt 75 - .long IRQDefault | User-Defined Interrupt 76 - .long IRQDefault | User-Defined Interrupt 77 - .long IRQDefault | User-Defined Interrupt 78 - .long IRQDefault | User-Defined Interrupt 79 - .long IRQDefault | User-Defined Interrupt 80 - .long IRQDefault | User-Defined Interrupt 81 - .long IRQDefault | User-Defined Interrupt 82 - .long IRQDefault | User-Defined Interrupt 83 - .long IRQDefault | User-Defined Interrupt 84 - .long IRQDefault | User-Defined Interrupt 85 - .long IRQDefault | User-Defined Interrupt 86 - .long IRQDefault | User-Defined Interrupt 87 - .long IRQDefault | User-Defined Interrupt 88 - .long IRQDefault | User-Defined Interrupt 89 - .long IRQDefault | User-Defined Interrupt 90 - .long IRQDefault | User-Defined Interrupt 91 - .long IRQDefault | User-Defined Interrupt 92 - .long IRQDefault | User-Defined Interrupt 93 - .long IRQDefault | User-Defined Interrupt 94 - .long IRQDefault | User-Defined Interrupt 95 - .long IRQDefault | User-Defined Interrupt 96 - .long IRQDefault | User-Defined Interrupt 97 - .long IRQDefault | User-Defined Interrupt 98 - .long IRQDefault | User-Defined Interrupt 99 - .long IRQDefault | User-Defined Interrupt 100 - .long IRQDefault | User-Defined Interrupt 101 - .long IRQDefault | User-Defined Interrupt 102 - .long IRQDefault | User-Defined Interrupt 103 - .long IRQDefault | User-Defined Interrupt 104 - .long IRQDefault | User-Defined Interrupt 105 - .long IRQDefault | User-Defined Interrupt 106 - .long IRQDefault | User-Defined Interrupt 107 - .long IRQDefault | User-Defined Interrupt 108 - .long IRQDefault | User-Defined Interrupt 109 - .long IRQDefault | User-Defined Interrupt 110 - .long IRQDefault | User-Defined Interrupt 111 - .long IRQDefault | User-Defined Interrupt 112 - .long IRQDefault | User-Defined Interrupt 113 - .long IRQDefault | User-Defined Interrupt 114 - .long IRQDefault | User-Defined Interrupt 115 - .long IRQDefault | User-Defined Interrupt 116 - .long IRQDefault | User-Defined Interrupt 117 - .long IRQDefault | User-Defined Interrupt 118 - .long IRQDefault | User-Defined Interrupt 119 - .long IRQDefault | User-Defined Interrupt 120 - .long IRQDefault | User-Defined Interrupt 121 - .long IRQDefault | User-Defined Interrupt 122 - .long IRQDefault | User-Defined Interrupt 123 - .long IRQDefault | User-Defined Interrupt 124 - .long IRQDefault | User-Defined Interrupt 125 - .long IRQDefault | User-Defined Interrupt 126 - .long IRQDefault | User-Defined Interrupt 127 - .long IRQDefault | User-Defined Interrupt 128 - .long IRQDefault | User-Defined Interrupt 129 - .long IRQDefault | User-Defined Interrupt 130 - .long IRQDefault | User-Defined Interrupt 131 - .long IRQDefault | User-Defined Interrupt 132 - .long IRQDefault | User-Defined Interrupt 133 - .long IRQDefault | User-Defined Interrupt 134 - .long IRQDefault | User-Defined Interrupt 135 - .long IRQDefault | User-Defined Interrupt 136 - .long IRQDefault | User-Defined Interrupt 137 - .long IRQDefault | User-Defined Interrupt 138 - .long IRQDefault | User-Defined Interrupt 139 - .long IRQDefault | User-Defined Interrupt 140 - .long IRQDefault | User-Defined Interrupt 141 - .long IRQDefault | User-Defined Interrupt 142 - .long IRQDefault | User-Defined Interrupt 143 - .long IRQDefault | User-Defined Interrupt 144 - .long IRQDefault | User-Defined Interrupt 145 - .long IRQDefault | User-Defined Interrupt 146 - .long IRQDefault | User-Defined Interrupt 147 - .long IRQDefault | User-Defined Interrupt 148 - .long IRQDefault | User-Defined Interrupt 149 - .long IRQDefault | User-Defined Interrupt 150 - .long IRQDefault | User-Defined Interrupt 151 - .long IRQDefault | User-Defined Interrupt 152 - .long IRQDefault | User-Defined Interrupt 153 - .long IRQDefault | User-Defined Interrupt 154 - .long IRQDefault | User-Defined Interrupt 155 - .long IRQDefault | User-Defined Interrupt 156 - .long IRQDefault | User-Defined Interrupt 157 - .long IRQDefault | User-Defined Interrupt 158 - .long IRQDefault | User-Defined Interrupt 159 - .long IRQDefault | User-Defined Interrupt 160 - .long IRQDefault | User-Defined Interrupt 161 - .long IRQDefault | User-Defined Interrupt 162 - .long IRQDefault | User-Defined Interrupt 163 - .long IRQDefault | User-Defined Interrupt 164 - .long IRQDefault | User-Defined Interrupt 165 - .long IRQDefault | User-Defined Interrupt 166 - .long IRQDefault | User-Defined Interrupt 167 - .long IRQDefault | User-Defined Interrupt 168 - .long IRQDefault | User-Defined Interrupt 169 - .long IRQDefault | User-Defined Interrupt 170 - .long IRQDefault | User-Defined Interrupt 171 - .long IRQDefault | User-Defined Interrupt 172 - .long IRQDefault | User-Defined Interrupt 173 - .long IRQDefault | User-Defined Interrupt 174 - .long IRQDefault | User-Defined Interrupt 175 - .long IRQDefault | User-Defined Interrupt 176 - .long IRQDefault | User-Defined Interrupt 177 - .long IRQDefault | User-Defined Interrupt 178 - .long IRQDefault | User-Defined Interrupt 179 - .long IRQDefault | User-Defined Interrupt 180 - .long IRQDefault | User-Defined Interrupt 181 - .long IRQDefault | User-Defined Interrupt 182 - .long IRQDefault | User-Defined Interrupt 183 - .long IRQDefault | User-Defined Interrupt 184 - .long IRQDefault | User-Defined Interrupt 185 - .long IRQDefault | User-Defined Interrupt 186 - .long IRQDefault | User-Defined Interrupt 187 - .long IRQDefault | User-Defined Interrupt 188 - .long IRQDefault | User-Defined Interrupt 189 - .long IRQDefault | User-Defined Interrupt 190 - .long IRQDefault | User-Defined Interrupt 191 - .org 0x00000400 -romvec_end: - -/* - .section .bss -ramvec_start: - .space 0x400 -ramvec_end: - - .section .text -vPortVecInit: - move.l #romvec_start, a0 - move.l #ramvec_start, a1 - move.l #256, d0 -1: - move.l (a0)+, (a1)+ - subq.l #1, d0 - bne 1b - move.l #ramvec_start, a1 - movec a1, vbr - rts -*/ - .section .text -VecDefault: - halt - bra VecDefault - -IRQDefault: - halt - bra IRQDefault - -IRQSpurious: - halt - bra IRQSpurious - -TrapDefault: - halt - bra TrapDefault - -IRQUart0: - lea.l (-16, %sp), %sp - movem.l %d0-%d1/%a0-a1, (%sp) - jsr prvvMBPortSerialISR; - movem.l (%sp),%d0-%d1/%a0-%a1 - lea.l (16, %sp), %sp - rte - -IRQPIT0: - lea.l (-16, %sp), %sp - movem.l %d0-%d1/%a0-a1, (%sp) - jsr prvvMBPortTimerISR; - movem.l (%sp),%d0-%d1/%a0-%a1 - lea.l (16, %sp), %sp - rte diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/demo.c deleted file mode 100644 index 1c261009..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/demo.c +++ /dev/null @@ -1,145 +0,0 @@ -/* - * FreeModbus Libary: MCF5235 Demo Application - * Copyright (c) 2007 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * File: $Id$ - */ - -/* ------------------------ System includes ------------------------------- */ -#include -#include -#include -#include - -/* ------------------------ FreeRTOS includes ----------------------------- */ -#include "FreeRTOS.h" -#include "task.h" - -/* ------------------------ FreeModbus includes --------------------------- */ -#include "mb.h" - -/* ------------------------ Project includes ------------------------------ */ -#include "mcf5xxx.h" -#include "mcf523x.h" -#include "m523xbcc.h" - -/* ------------------------ Defines ------------------------------------------*/ -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; - -/* ----------------------- Static functions ---------------------------------*/ -static void vModbusTask( void *pvParameters ); -static void vTestTask( void *pvParameters ); - -/* ------------------------ Implementation -------------------------------- */ -void -main( void ) -{ - ( void )xTaskCreate( vModbusTask, NULL, configMINIMAL_STACK_SIZE, NULL, - tskIDLE_PRIORITY, NULL ); - /* Now all the tasks have been started - start the scheduler. */ - - vTaskStartScheduler( ); -} - -static void -vModbusTask( void *pvParameters ) -{ - ( void )pvParameters; - - /* Select either ASCII or RTU Mode. */ - ( void )eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); - - /* Enable the Modbus Protocol Stack. */ - ( void )eMBEnable( ); - - /* Enter main loop. */ - for( ;; ) - { - /* Call the main polling loop of the Modbus protocol stack. */ - ( void )eMBPoll( ); - } -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - ( void )pucRegBuffer; - ( void )usAddress; - ( void )usNRegs; - ( void )eMode; - return MB_ENOREG; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - ( void )pucRegBuffer; - ( void )usAddress; - ( void )usNCoils; - ( void )eMode; - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - ( void )pucRegBuffer; - ( void )usAddress; - ( void )usNDiscrete; - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/demo.cww b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/demo.cww deleted file mode 100644 index 427e8735..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/demo.cww +++ /dev/null @@ -1,89 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -]> - - - - -1 - 0 - true - demo.mcp - - 442 - 280 - - - 392 - 344 - - - 1 - 0 - 0 - 59420 - 1.000000 - 463 - - 0 - 0 - - - - - -1 - 32 - true - - 0 - 0 - - - 790 - 1360 - - - 0 - - - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/demo.mcp b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/demo.mcp deleted file mode 100644 index 81ade40dd8f162cc91140a391f015b865f63b8bc..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 84730 zcmeHQ3y>VedF~mBJFP(CKo1ieht)~w0n#A}2@4$TJDu+Iy5o-1=>Z%ZdwX+ti}uCt zo;V2%;{6gvIAs?JcG*=ij?0OOjboQzkT`bv5vY_aWgKv-65DYwuCg6FP8^#eCg0c7 zGdHulx7)CLignw6=~sW#^H2Bm-~Zp;|J>|!GLwnV6GE)Dgc#UviDR9XINmHoKl1E( z^YOn+otaVRU@VtQWOC8|T;?VxUhqyeL^_spoK$9XWHNunzRYAU?nDQXlNW*fj(FV3 z=cE0x!bB*4hchxcKJMhA1C!}OBIN|H8I0w|okDbh%eL)}cI5L;Y9xsQ`eSJ)87#UplN{|%g;sV!E@VV zh4=)NlrDE+=w#06Nu&>#6YFCAJCm7_STfp|g}M`HN3fF4ZdVQHkfQ9asknnHird;9 z-JLEtx!h#75WK+GcK_~9zyC_x+tq{m68YH78bL=oIVe2p_G_ueF6q4ZVyG*Xg+YYw zxhpl|jE*{^QMP#|g>=fx`*Th>wrxwTkl4%LEFk2OIztyg7G0OjkO!D z(JP%Lx*0iDD-z5eU0d$?1?om7MkKS8i1z5OS`Pvq2Xt zJz37tN~DV2twf-#)0Ie-xL%1w$j7ATRu(C8!xG{0&R8NAbjflj1CCkl^t5}Hob~&z zjFXlK&)}-1a^)PhM9Osu-)&3I&+NPS}&#)!kRL#v%NJyljn?qQ~&3R*inYZMgaB@aBcdwnv&2iSZovLomyDdK>m)ud= zdAUTYqMNg}8RzI3iVDrtB{HGn%DXu#)pv6U7rA*utmfZ%BW+w_iSsL7h!9HBdHA35 zq>W(4SEL@W7g3D^pTSJfac~m>=y5Q@FG-)l{|gj;4rxT;A0l0-u#HO3RQT<{XDNIo z@FIn;0bZ=|5#X~G{t$4B!p{PqqwovB=PLYj;3Wz-p;1c}-T=Hz;XdHy3TJ@dqVR*j z)CK7&;6HGocpmtz3jY-NZ3-`eqC5?60Dim5-wXVQ3MYUsQ21fssKS2T_W z1aO4Ay9|CVv z*oIMEuJBUeD-_-g{7!}Yf&WP19PpJ2|1t2p6n+}`-3osjxLx620(U5UHjH+=!s~%M z6&?WIp>Q6!OW{8O?pF9qz&jQG7vNnAp9$mNt?*{xJqq^$?^QSrOdlhi0Pc06_yX`% z3jYAOPvK@b5ubCA)&O7aLNNe5pzsmkeF}dNcu?VQ0q z#k0g714?2GZUp}Xt>MryQ;Xc|J>P_E5xoz`9|7-xc3BRO%aM0qEblrDk}y#5`W=)k z{@)f0WRqmgmL>0;avWK$Fv(oB3{oyZn*Sv6LgqK&e`Lu2T~QwK(7ncOp(k5!-(X z1Yn=FgXskvK{!INwd`s*sGMaMBRvDmS%4!xNAwo(IpA}_FbO$hEkR06v)|7KF9mb9 z;LNZLJRf`}7=wvFL(BvAMlnDw8uOpl2|R4d^8wp<%1IZ{s!ZAup-3dO)RjSRD5q%g z8ww(dSM2^e)Qe&K3@@k%J<|(4NGy(S@Zhh_Nsfu$gHd;d##OfH$fu$*48ST@a3#At zmCfYv07-;ahVH{4QM5R94?_#gqQzfuiCz*%lwao0u$(S)JL<7f=#007)d+1mdIOK& zq-s*}v8|ggof=MN+VbKEo>OLWd7wnPFgy`UkK$=rzAY|B@$3^x{%C3>lWdy+$QPW{ zQ0QWnH(iFxC@LzEjwdHaouTQnCbLxkP%f5gOUB0pRW!U$W%eXSa($q$WXhvSIK z#_-&;EfyA1mNL{iyd^Q***&a|i^Wp;l`k=wTW92=|n+xp6oOK z82#ctk!1%@_tkV>Y6K@zBk^1uJ)RoL6(;2|Qyw!vE^svD$+*~+o5m9X8I~8z#}f%z zf{WrprYOZb6F%lOW0UE4BAuONJKUp8VZzDDqsc-d$tJk@@l5b&G!Yy3PmLz>ykl2x z0=9(btT<-b@`*L>AXravzE@)~->W;AN9^52alX2r(rkHW#o5#MNC)xiC(b*$L@bG$ z=K=p7LRAn$uS}dH7^qd&5Ho@o%ZyM7GACG!%ur=X>=j6lpPHJ&2oV?p+>Amjf0+G{ z#A7WaH%~f~4pQ1X>dy~(=lu*N=pTDm$aVxS(9q+B>c>vWH)p& zFxa;be;OJ~jN>*usge_gqgiLv8OuW^#c_HhE}c>J0y5pQ zG@m{fkEH{W@i-;D>*8afBUz&=(xGw!qD~*H|Mi*a8dV`3$-x^ho2VBhtB0k z(V4;9$R7?>ljjgSeX;8;)5nvskcy7PFmFz1t+R}f(ZKJk1{kA|7*89II_)K~L%=$==gBkabJ_cSSkr1Cj z%6N(NRWRcq(sN+OOr)2MQTO^89$Mh12cXitpoO+#%%*;d_~#; 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you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/* Lists for ready and blocked co-routines. --------------------*/ -static xList pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ -static xList xDelayedCoRoutineList1; /*< Delayed co-routines. */ -static xList xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ -static xList * pxDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used. */ -static xList * pxOverflowDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ -static xList xPendingReadyList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ - -/* Other file private variables. --------------------------------*/ -corCRCB * pxCurrentCoRoutine = NULL; -static unsigned portBASE_TYPE uxTopCoRoutineReadyPriority = 0; -static portTickType xCoRoutineTickCount = 0; - -/* The initial state of the co-routine when it is created. */ -#define corINITIAL_STATE ( 0 ) - -/* - * Place the co-routine represented by pxCRCB into the appropriate ready queue - * for the priority. It is inserted at the end of the list. - * - * This macro accesses the co-routine ready lists and therefore must not be - * used from within an ISR. - */ -#define prvAddCoRoutineToReadyQueue( pxCRCB ) \ -{ \ - if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \ - { \ - uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \ -} - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first co-routine. - */ -static void prvInitialiseCoRoutineLists( void ); - -/* - * Co-routines that are readied by an interrupt cannot be placed directly into - * the ready lists (there is no mutual exclusion). Instead they are placed in - * in the pending ready list in order that they can later be moved to the ready - * list by the co-routine scheduler. - */ -static inline void prvCheckPendingReadyList( void ); - -/* - * Macro that looks at the list of co-routines that are currently delayed to - * see if any require waking. - * - * Co-routines are stored in the queue in the order of their wake time - - * meaning once one co-routine has been found whose timer has not expired - * we need not look any further down the list. - */ -static inline void prvCheckDelayedList( void ); - -/*-----------------------------------------------------------*/ - -portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex ) -{ -portBASE_TYPE xReturn; -corCRCB *pxCoRoutine; - - /* Allocate the memory that will store the co-routine control block. */ - pxCoRoutine = ( corCRCB * ) pvPortMalloc( sizeof( corCRCB ) ); - if( pxCoRoutine ) - { - /* If pxCurrentCoRoutine is NULL then this is the first co-routine to - be created and the co-routine data structures need initialising. */ - if( pxCurrentCoRoutine == NULL ) - { - pxCurrentCoRoutine = pxCoRoutine; - prvInitialiseCoRoutineLists(); - } - - /* Check the priority is within limits. */ - if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES ) - { - uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1; - } - - /* Fill out the co-routine control block from the function parameters. */ - pxCoRoutine->uxState = corINITIAL_STATE; - pxCoRoutine->uxPriority = uxPriority; - pxCoRoutine->uxIndex = uxIndex; - pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; - - /* Initialise all the other co-routine control block parameters. */ - vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) ); - vListInitialiseItem( &( pxCoRoutine->xEventListItem ) ); - - /* Set the co-routine control block as a link back from the xListItem. - This is so we can get back to the containing CRCB from a generic item - in a list. */ - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine ); - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - - /* Now the co-routine has been initialised it can be added to the ready - list at the correct priority. */ - prvAddCoRoutineToReadyQueue( pxCoRoutine ); - - xReturn = pdPASS; - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList ) -{ -portTickType xTimeToWake; - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xCoRoutineTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xCoRoutineTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - - if( pxEventList ) - { - /* Also add the co-routine to an event list. If this is done then the - function must be called with interrupts disabled. */ - vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -static inline void prvCheckPendingReadyList( void ) -{ - /* Are there any co-routines waiting to get moved to the ready list? These - are co-routines that have been readied by an ISR. The ISR cannot access - the ready lists itself. */ - while( !listLIST_IS_EMPTY( &xPendingReadyList ) ) - { - corCRCB *pxUnblockedCRCB; - - /* The pending ready list can be accessed by an ISR. */ - portDISABLE_INTERRUPTS(); - { - pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyList) ); - vListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - } - portENABLE_INTERRUPTS(); - - vListRemove( &( pxUnblockedCRCB->xGenericListItem ) ); - prvAddCoRoutineToReadyQueue( pxUnblockedCRCB ); - } -} -/*-----------------------------------------------------------*/ - -static inline void prvCheckDelayedList( void ) -{ -static portTickType xLastTickCount, xPassedTicks; -corCRCB *pxCRCB; - - xPassedTicks = xTaskGetTickCount() - xLastTickCount; - while( xPassedTicks ) - { - xCoRoutineTickCount++; - xPassedTicks--; - - /* If the tick count has overflowed we need to swap the ready lists. */ - if( xCoRoutineTickCount == 0 ) - { - xList * pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. If there are - any items in pxDelayedCoRoutineList here then there is an error! */ - pxTemp = pxDelayedCoRoutineList; - pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; - pxOverflowDelayedCoRoutineList = pxTemp; - } - - /* See if this tick has made a timeout expire. */ - while( ( pxCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList ) ) != NULL ) - { - if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) ) - { - /* Timeout not yet expired. */ - break; - } - - portDISABLE_INTERRUPTS(); - { - /* The event could have occurred just before this critical - section. If this is the case then the generic list item will - have been moved to the pending ready list and the following - line is still valid. Also the pvContainer parameter will have - been set to NULL so the following lines are also valid. */ - vListRemove( &( pxCRCB->xGenericListItem ) ); - - /* Is the co-routine waiting on an event also? */ - if( pxCRCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxCRCB->xEventListItem ) ); - } - } - portENABLE_INTERRUPTS(); - - prvAddCoRoutineToReadyQueue( pxCRCB ); - } - } - - xLastTickCount = xCoRoutineTickCount; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineSchedule( void ) -{ - /* See if any co-routines readied by events need moving to the ready lists. */ - prvCheckPendingReadyList(); - - /* See if any delayed co-routines have timed out. */ - prvCheckDelayedList(); - - /* Find the highest priority queue that contains ready co-routines. */ - while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) ) - { - if( uxTopCoRoutineReadyPriority == 0 ) - { - /* No more co-routines to check. */ - return; - } - --uxTopCoRoutineReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines - of the same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ); - - /* Call the co-routine. */ - ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex ); - - return; -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseCoRoutineLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyCoRoutineLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedCoRoutineList1 ); - vListInitialise( ( xList * ) &xDelayedCoRoutineList2 ); - vListInitialise( ( xList * ) &xPendingReadyList ); - - /* Start with pxDelayedCoRoutineList using list1 and the - pxOverflowDelayedCoRoutineList using list2. */ - pxDelayedCoRoutineList = &xDelayedCoRoutineList1; - pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; -} -/*-----------------------------------------------------------*/ - -portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList ) -{ -corCRCB *pxUnblockedCRCB; -portBASE_TYPE xReturn; - - /* This function is called from within an interrupt. It can only access - event lists and the pending ready list. */ - pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedCRCB->xEventListItem ) ); - - if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority ) - { - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/FreeRTOS.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/FreeRTOS.h deleted file mode 100644 index dcf4f444..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/FreeRTOS.h +++ /dev/null @@ -1,111 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef INC_FREERTOS_H -#define INC_FREERTOS_H - - -/* - * Include the generic headers required for the FreeRTOS port being used. - */ -#include - -/* Basic FreeRTOS definitions. */ -#include "projdefs.h" - -/* Application specific configuration options. */ -#include "FreeRTOSConfig.h" - -/* Definitions specific to the port being used. */ -#include "portable.h" - - - - - - - -/* - * Check all the required application specific macros have been defined. - * These macros are application specific and (as downloaded) are defined - * within FreeRTOSConfig.h. - */ - -#ifndef configUSE_PREEMPTION - #error Missing definition: configUSE_PREEMPTION should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_IDLE_HOOK - #error Missing definition: configUSE_IDLE_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_TICK_HOOK - #error Missing definition: configUSE_TICK_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_CO_ROUTINES - #error Missing definition: configUSE_CO_ROUTINES should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskPrioritySet - #error Missing definition: INCLUDE_vTaskPrioritySet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_uxTaskPriorityGet - #error Missing definition: INCLUDE_uxTaskPriorityGet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelete - #error Missing definition: INCLUDE_vTaskDelete should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskCleanUpResources - #error Missing definition: INCLUDE_vTaskCleanUpResources should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskSuspend - #error Missing definition: INCLUDE_vTaskSuspend should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelayUntil - #error Missing definition: INCLUDE_vTaskDelayUntil should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelay - #error Missing definition: INCLUDE_vTaskDelay should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_16_BIT_TICKS - #error Missing definition: configUSE_16_BIT_TICKS should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/croutine.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/croutine.h deleted file mode 100644 index e154ef75..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/croutine.h +++ /dev/null @@ -1,713 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ -#ifndef CO_ROUTINE_H -#define CO_ROUTINE_H - -#include "list.h" - -/* Used to hide the implementation of the co-routine control block. The -control block structure however has to be included in the header due to -the macro implementation of the co-routine functionality. */ -typedef void * xCoRoutineHandle; - -/* Defines the prototype to which co-routine functions must conform. */ -typedef void (*crCOROUTINE_CODE)( xCoRoutineHandle, unsigned portBASE_TYPE ); - -typedef struct corCoRoutineControlBlock -{ - crCOROUTINE_CODE pxCoRoutineFunction; - xListItem xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the CRCB in event lists. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ - unsigned portBASE_TYPE uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ - unsigned portSHORT uxState; /*< Used internally by the co-routine implementation. */ -} corCRCB; /* Co-routine control block. Note must be identical in size down to uxPriority with tskTCB. */ - -/** - * croutine. h - *
- portBASE_TYPE xCoRoutineCreate(
-                                 crCOROUTINE_CODE pxCoRoutineCode,
-                                 unsigned portBASE_TYPE uxPriority,
-                                 unsigned portBASE_TYPE uxIndex
-                               );
- * - * Create a new co-routine and add it to the list of co-routines that are - * ready to run. - * - * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine - * functions require special syntax - see the co-routine section of the WEB - * documentation for more information. - * - * @param uxPriority The priority with respect to other co-routines at which - * the co-routine will run. - * - * @param uxIndex Used to distinguish between different co-routines that - * execute the same function. See the example below and the co-routine section - * of the WEB documentation for further information. - * - * @return pdPASS if the co-routine was successfully created and added to a ready - * list, otherwise an error code defined with ProjDefs.h. - * - * Example usage: - 
- // Co-routine to be created.
- void vFlashCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- static const char cLedToFlash[ 2 ] = { 5, 6 };
- static const portTickType xTimeToDelay[ 2 ] = { 200, 400 };
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // This co-routine just delays for a fixed period, then toggles
-         // an LED.  Two co-routines are created using this function, so
-         // the uxIndex parameter is used to tell the co-routine which
-         // LED to flash and how long to delay.  This assumes xQueue has
-         // already been created.
-         vParTestToggleLED( cLedToFlash[ uxIndex ] );
-         crDELAY( xHandle, uxFlashRates[ uxIndex ] );
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
-
- // Function that creates two co-routines.
- void vOtherFunction( void )
- {
- unsigned char ucParameterToPass;
- xTaskHandle xHandle;
-		
-     // Create two co-routines at priority 0.  The first is given index 0
-     // so (from the code above) toggles LED 5 every 200 ticks.  The second
-     // is given index 1 so toggles LED 6 every 400 ticks.
-     for( uxIndex = 0; uxIndex < 2; uxIndex++ )
-     {
-         xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
-     }  
- }
-
- * \defgroup xCoRoutineCreate xCoRoutineCreate - * \ingroup Tasks - */ -portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex ); - - -/** - * croutine. h - *
- void vCoRoutineSchedule( void );
- * - * Run a co-routine. - * - * vCoRoutineSchedule() executes the highest priority co-routine that is able - * to run. The co-routine will execute until it either blocks, yields or is - * preempted by a task. Co-routines execute cooperatively so one - * co-routine cannot be preempted by another, but can be preempted by a task. - * - * If an application comprises of both tasks and co-routines then - * vCoRoutineSchedule should be called from the idle task (in an idle task - * hook). - * - * Example usage: - 
- // This idle task hook will schedule a co-routine each time it is called.
- // The rest of the idle task will execute between co-routine calls.
- void vApplicationIdleHook( void )
- {
-	vCoRoutineSchedule();
- }
-
- // Alternatively, if you do not require any other part of the idle task to 
- // execute, the idle task hook can call vCoRoutineScheduler() within an
- // infinite loop.
- void vApplicationIdleHook( void )
- {
-    for( ;; )
-    {
-        vCoRoutineSchedule();
-    }
- }
-
- * \defgroup vCoRoutineSchedule vCoRoutineSchedule - * \ingroup Tasks - */ -void vCoRoutineSchedule( void ); - -/** - * croutine. h - * 
- crSTART( xCoRoutineHandle xHandle );
- * - * This macro MUST always be called at the start of a co-routine function. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portLONG ulAVariable;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-          // Co-routine functionality goes here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crSTART( pxCRCB ) switch( ( ( corCRCB * )pxCRCB )->uxState ) { case 0: - -/** - * croutine. h - * 
- crEND();
- * - * This macro MUST always be called at the end of a co-routine function. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portLONG ulAVariable;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-          // Co-routine functionality goes here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crEND() } - -/* - * These macros are intended for internal use by the co-routine implementation - * only. The macros should not be used directly by application writers. - */ -#define crSET_STATE0( xHandle ) ( ( corCRCB * )xHandle)->uxState = (__LINE__ * 2); return; case (__LINE__ * 2): -#define crSET_STATE1( xHandle ) ( ( corCRCB * )xHandle)->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1): - -/** - * croutine. h - *
- crDELAY( xCoRoutineHandle xHandle, portTickType xTicksToDelay );
- * - * Delay a co-routine for a fixed period of time. - * - * crDELAY can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * @param xHandle The handle of the co-routine to delay. This is the xHandle - * parameter of the co-routine function. - * - * @param xTickToDelay The number of ticks that the co-routine should delay - * for. The actual amount of time this equates to is defined by - * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_RATE_MS - * can be used to convert ticks to milliseconds. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- // We are to delay for 200ms.
- static const xTickType xDelayTime = 200 / portTICK_RATE_MS;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-        // Delay for 200ms.
-        crDELAY( xHandle, xDelayTime );
-
-        // Do something here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crDELAY crDELAY - * \ingroup Tasks - */ -#define crDELAY( xHandle, xTicksToDelay ) \ - if( xTicksToDelay > 0 ) \ - { \ - vCoRoutineAddToDelayedList( xTicksToDelay, NULL ); \ - } \ - crSET_STATE0( xHandle ); - -/** - * 
- crQUEUE_SEND( 
-                  xCoRoutineHandle xHandle, 
-                  xQueueHandle pxQueue, 
-                  void *pvItemToQueue, 
-                  portTickType xTicksToWait, 
-                  portBASE_TYPE *pxResult 
-             )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_SEND can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue on which the data will be posted. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvItemToQueue A pointer to the data being posted onto the queue. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied from pvItemToQueue into the queue - * itself. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for space to become available on the queue, should space not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_RATE_MS can be used to convert ticks to milliseconds (see example - * below). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully posted onto the queue, otherwise it will be set to an - * error defined within ProjDefs.h. - * - * Example usage: - 
- // Co-routine function that blocks for a fixed period then posts a number onto
- // a queue.
- static void prvCoRoutineFlashTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portBASE_TYPE xNumberToPost = 0;
- static portBASE_TYPE xResult;
-
-    // Co-routines must begin with a call to crSTART().
-    crSTART( xHandle );
-
-    for( ;; )
-    {
-        // This assumes the queue has already been created.
-        crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
-
-        if( xResult != pdPASS )
-        {
-            // The message was not posted!
-        }
-
-        // Increment the number to be posted onto the queue.
-        xNumberToPost++;
- 
-        // Delay for 100 ticks.
-        crDELAY( xHandle, 100 );
-    }
-
-    // Co-routines must end with a call to crEND().
-    crEND();
- }
- * \defgroup crQUEUE_SEND crQUEUE_SEND - * \ingroup Tasks - */ -#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ -{ \ - *pxResult = xQueueCRSend( pxQueue, pvItemToQueue, xTicksToWait ); \ - if( *pxResult == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( xHandle ); \ - *pxResult = xQueueCRSend( pxQueue, pvItemToQueue, 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( xHandle ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 
-  crQUEUE_RECEIVE( 
-                     xCoRoutineHandle xHandle, 
-                     xQueueHandle pxQueue, 
-                     void *pvBuffer, 
-                     portTickType xTicksToWait, 
-                     portBASE_TYPE *pxResult 
-                 )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_RECEIVE can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue from which the data will be received. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvBuffer The buffer into which the received item is to be copied. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied into pvBuffer. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for data to become available from the queue, should data not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_RATE_MS can be used to convert ticks to milliseconds (see the - * crQUEUE_SEND example). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully retrieved from the queue, otherwise it will be set to - * an error code as defined within ProjDefs.h. - * - * Example usage: - 
- // A co-routine receives the number of an LED to flash from a queue.  It 
- // blocks on the queue until the number is received.
- static void prvCoRoutineFlashWorkTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portBASE_TYPE xResult;
- static unsigned portBASE_TYPE uxLEDToFlash;
-
-    // All co-routines must start with a call to crSTART().
-    crSTART( xHandle );
-
-    for( ;; )
-    {
-        // Wait for data to become available on the queue.
-        crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
-        if( xResult == pdPASS )
-        {
-            // We received the LED to flash - flash it!
-            vParTestToggleLED( uxLEDToFlash );
-        }
-    }
-
-    crEND();
- }
- * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ -{ \ - *pxResult = xQueueCRReceive( pxQueue, pvBuffer, xTicksToWait ); \ - if( *pxResult == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( xHandle ); \ - *pxResult = xQueueCRReceive( pxQueue, pvBuffer, 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( xHandle ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 
-  crQUEUE_SEND_FROM_ISR( 
-                            xQueueHandle pxQueue, 
-                            void *pvItemToQueue, 
-                            portBASE_TYPE xCoRoutinePreviouslyWoken
-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue - * that is being used from within a co-routine. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. - * - * @return pdTRUE if a co-routine was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 
- // A co-routine that blocks on a queue waiting for characters to be received.
- static void vReceivingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- portCHAR cRxedChar;
- portBASE_TYPE xResult;
-
-     // All co-routines must start with a call to crSTART().
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // Wait for data to become available on the queue.  This assumes the
-         // queue xCommsRxQueue has already been created!
-         crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-    
-         // Was a character received?
-         if( xResult == pdPASS )
-         {
-             // Process the character here.
-         }
-     }
-
-     // All co-routines must end with a call to crEND().
-     crEND();
- }
-
- // An ISR that uses a queue to send characters received on a serial port to
- // a co-routine.
- void vUART_ISR( void )
- {
- portCHAR cRxedChar;
- portBASE_TYPE xCRWokenByPost = pdFALSE;
-
-     // We loop around reading characters until there are none left in the UART.
-     while( UART_RX_REG_NOT_EMPTY() )
-     {
-         // Obtain the character from the UART.
-         cRxedChar = UART_RX_REG;
-        
-         // Post the character onto a queue.  xCRWokenByPost will be pdFALSE 
-         // the first time around the loop.  If the post causes a co-routine
-         // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
-         // In this manner we can ensure that if more than one co-routine is
-         // blocked on the queue only one is woken by this ISR no matter how
-         // many characters are posted to the queue.
-         xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
-     }
- }
- * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) - - -/** - * croutine. h - * 
-  crQUEUE_SEND_FROM_ISR( 
-                            xQueueHandle pxQueue, 
-                            void *pvBuffer, 
-                            portBASE_TYPE * pxCoRoutineWoken
-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data - * from a queue that is being used from within a co-routine (a co-routine - * posted to the queue). - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvBuffer A pointer to a buffer into which the received item will be - * placed. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from the queue into - * pvBuffer. - * - * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become - * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a - * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise - * *pxCoRoutineWoken will remain unchanged. - * - * @return pdTRUE an item was successfully received from the queue, otherwise - * pdFALSE. - * - * Example usage: - 
- // A co-routine that posts a character to a queue then blocks for a fixed 
- // period.  The character is incremented each time.
- static void vSendingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // cChar holds its value while this co-routine is blocked and must therefore
- // be declared static.
- static portCHAR cCharToTx = 'a';
- portBASE_TYPE xResult;
-
-     // All co-routines must start with a call to crSTART().
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // Send the next character to the queue.
-         crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
-    
-         if( xResult == pdPASS )
-         {
-             // The character was successfully posted to the queue.
-         }
-		 else
-		 {
-			// Could not post the character to the queue.
-		 }
-
-         // Enable the UART Tx interrupt to cause an interrupt in this
-		 // hypothetical UART.  The interrupt will obtain the character
-		 // from the queue and send it.
-		 ENABLE_RX_INTERRUPT();
-
-		 // Increment to the next character then block for a fixed period. 
-		 // cCharToTx will maintain its value across the delay as it is
-		 // declared static.
-		 cCharToTx++;
-		 if( cCharToTx > 'x' )
-		 {
-			cCharToTx = 'a';
-		 }
-		 crDELAY( 100 );
-     }
-
-     // All co-routines must end with a call to crEND().
-     crEND();
- }
-
- // An ISR that uses a queue to receive characters to send on a UART.
- void vUART_ISR( void )
- {
- portCHAR cCharToTx;
- portBASE_TYPE xCRWokenByPost = pdFALSE;
-
-     while( UART_TX_REG_EMPTY() )
-     {
-         // Are there any characters in the queue waiting to be sent?
-		 // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
-		 // is woken by the post - ensuring that only a single co-routine is
-		 // woken no matter how many times we go around this loop.
-         if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
-		 {
-			 SEND_CHARACTER( cCharToTx );
-		 }
-     }
- }
- * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( pxQueue, pvBuffer, pxCoRoutineWoken ) - -/* - * This function is intended for internal use by the co-routine macros only. - * The macro nature of the co-routine implementation requires that the - * prototype appears here. The function should not be used by application - * writers. - * - * Removes the current co-routine from its ready list and places it in the - * appropriate delayed list. - */ -void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList ); - -/* - * This function is intended for internal use by the queue implementation only. - * The function should not be used by application writers. - * - * Removes the highest priority co-routine from the event list and places it in - * the pending ready list. - */ -portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList ); - - -#endif /* CO_ROUTINE_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/list.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/list.h deleted file mode 100644 index 44786cfa..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/list.h +++ /dev/null @@ -1,270 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - * This is the list implementation used by the scheduler. While it is tailored - * heavily for the schedulers needs, it is also available for use by - * application code. - * - * xLists can only store pointers to xListItems. Each xListItem contains a - * numeric value (xItemValue). Most of the time the lists are sorted in - * descending item value order. - * - * Lists are created already containing one list item. The value of this - * item is the maximum possible that can be stored, it is therefore always at - * the end of the list and acts as a marker. The list member pxHead always - * points to this marker - even though it is at the tail of the list. This - * is because the tail contains a wrap back pointer to the true head of - * the list. - * - * In addition to it's value, each list item contains a pointer to the next - * item in the list (pxNext), a pointer to the list it is in (pxContainer) - * and a pointer to back to the object that contains it. These later two - * pointers are included for efficiency of list manipulation. There is - * effectively a two way link between the object containing the list item and - * the list item itself. - * - * - * \page ListIntroduction List Implementation - * \ingroup FreeRTOSIntro - */ - - -#ifndef LIST_H -#define LIST_H - -/* - * Definition of the only type of object that a list can contain. - */ -struct xLIST_ITEM -{ - portTickType xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ - volatile struct xLIST_ITEM * pxNext; /*< Pointer to the next xListItem in the list. */ - volatile struct xLIST_ITEM * pxPrevious;/*< Pointer to the previous xListItem in the list. */ - void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ - void * pvContainer; /*< Pointer to the list in which this list item is placed (if any). */ -}; -typedef struct xLIST_ITEM xListItem; /* For some reason lint wants this as two separate definitions. */ - -struct xMINI_LIST_ITEM -{ - portTickType xItemValue; - volatile struct xLIST_ITEM *pxNext; - volatile struct xLIST_ITEM *pxPrevious; -}; -typedef struct xMINI_LIST_ITEM xMiniListItem; - -/* - * Definition of the type of queue used by the scheduler. - */ -typedef struct xLIST -{ - volatile unsigned portBASE_TYPE uxNumberOfItems; - volatile xListItem * pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to pvListGetOwnerOfNextEntry (). */ - volatile xMiniListItem xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ -} xList; - -/* - * Access macro to set the owner of a list item. The owner of a list item - * is the object (usually a TCB) that contains the list item. - * - * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( pxListItem )->pvOwner = ( void * ) pxOwner - -/* - * Access macro to set the value of the list item. In most cases the value is - * used to sort the list in descending order. - * - * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( pxListItem )->xItemValue = xValue - -/* - * Access macro the retrieve the value of the list item. The value can - * represent anything - for example a the priority of a task, or the time at - * which a task should be unblocked. - * - * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) - -/* - * Access macro to determine if a list contains any items. The macro will - * only have the value true if the list is empty. - * - * \page listLIST_IS_EMPTY listLIST_IS_EMPTY - * \ingroup LinkedList - */ -#define listLIST_IS_EMPTY( pxList ) ( ( pxList )->uxNumberOfItems == ( unsigned portBASE_TYPE ) 0 ) - -/* - * Access macro to return the number of items in the list. - */ -#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) - -/* - * Access function to obtain the owner of the next entry in a list. - * - * The list member pxIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list - * and returns that entries pxOwner parameter. Using multiple calls to this - * function it is therefore possible to move through every item contained in - * a list. - * - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the next item owner is to be returned. - * - * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ - /* Increment the index to the next item and return the item, ensuring */ \ - /* we don't return the marker used at the end of the list. */ \ - ( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \ - if( ( pxList )->pxIndex == ( xListItem * ) &( ( pxList )->xListEnd ) ) \ - { \ - ( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \ - } \ - pxTCB = ( pxList )->pxIndex->pvOwner - - -/* - * Access function to obtain the owner of the first entry in a list. Lists - * are normally sorted in ascending item value order. - * - * This function returns the pxOwner member of the first item in the list. - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the owner of the head item is to be - * returned. - * - * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( ( pxList->uxNumberOfItems != ( unsigned portBASE_TYPE ) 0 ) ? ( (&( pxList->xListEnd ))->pxNext->pvOwner ) : ( NULL ) ) - -/* - * Check to see if a list item is within a list. The list item maintains a - * "container" pointer that points to the list it is in. All this macro does - * is check to see if the container and the list match. - * - * @param pxList The list we want to know if the list item is within. - * @param pxListItem The list item we want to know if is in the list. - * @return pdTRUE is the list item is in the list, otherwise pdFALSE. - * pointer against - */ -#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( pxListItem )->pvContainer == ( void * ) pxList ) - -/* - * Must be called before a list is used! This initialises all the members - * of the list structure and inserts the xListEnd item into the list as a - * marker to the back of the list. - * - * @param pxList Pointer to the list being initialised. - * - * \page vListInitialise vListInitialise - * \ingroup LinkedList - */ -void vListInitialise( xList *pxList ); - -/* - * Must be called before a list item is used. This sets the list container to - * null so the item does not think that it is already contained in a list. - * - * @param pxItem Pointer to the list item being initialised. - * - * \page vListInitialiseItem vListInitialiseItem - * \ingroup LinkedList - */ -void vListInitialiseItem( xListItem *pxItem ); - -/* - * Insert a list item into a list. The item will be inserted into the list in - * a position determined by its item value (descending item value order). - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The item to that is to be placed in the list. - * - * \page vListInsert vListInsert - * \ingroup LinkedList - */ -void vListInsert( xList *pxList, xListItem *pxNewListItem ); - -/* - * Insert a list item into a list. The item will be inserted in a position - * such that it will be the last item within the list returned by multiple - * calls to listGET_OWNER_OF_NEXT_ENTRY. - * - * The list member pvIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pvIndex to the next item in the list. - * Placing an item in a list using vListInsertEnd effectively places the item - * in the list position pointed to by pvIndex. This means that every other - * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before - * the pvIndex parameter again points to the item being inserted. - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The list item to be inserted into the list. - * - * \page vListInsertEnd vListInsertEnd - * \ingroup LinkedList - */ -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ); - -/* - * Remove an item from a list. The list item has a pointer to the list that - * it is in, so only the list item need be passed into the function. - * - * @param vListRemove The item to be removed. The item will remove itself from - * the list pointed to by it's pxContainer parameter. - * - * \page vListRemove vListRemove - * \ingroup LinkedList - */ -void vListRemove( xListItem *pxItemToRemove ); - - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/portable.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/portable.h deleted file mode 100644 index 998ba568..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/portable.h +++ /dev/null @@ -1,196 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http:www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http:www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/*----------------------------------------------------------- - * Portable layer API. Each function must be defined for each port. - *----------------------------------------------------------*/ - -#ifndef PORTABLE_H -#define PORTABLE_H - -/* Include the macro file relevant to the port being used. */ - -#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT - #include "..\..\source\portable\owatcom\16bitdos\pc\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT - #include "..\..\source\portable\owatcom\16bitdos\flsh186\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef GCC_MEGA_AVR - #include "../portable/GCC/ATMega323/portmacro.h" -#endif - -#ifdef IAR_MEGA_AVR - #include "../portable/IAR/ATMega323/portmacro.h" -#endif - -#ifdef MPLAB_PIC18F_PORT - #include "..\..\source\portable\MPLAB\PIC18F\portmacro.h" -#endif - -#ifdef _FEDPICC - #include "libFreeRTOS/Include/portmacro.h" -#endif - -#ifdef SDCC_CYGNAL - #include "../../Source/portable/SDCC/Cygnal/portmacro.h" -#endif - -#ifdef GCC_ARM7 - #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" -#endif - -#ifdef GCC_MSP430 - #include "../../Source/portable/GCC/MSP430F449/portmacro.h" -#endif - -#ifdef ROWLEY_MSP430 - #include "../../Source/portable/Rowley/MSP430F449/portmacro.h" -#endif - -#ifdef KEIL_ARM7 - #include "..\..\Source\portable\Keil\ARM7\portmacro.h" -#endif - -#ifdef SAM7_GCC - #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" -#endif - -#ifdef SAM7_IAR - #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" -#endif - -#ifdef LPC2000_IAR - #include "..\..\Source\portable\IAR\LPC2000\portmacro.h" -#endif - -#ifdef STR71X_IAR - #include "..\..\Source\portable\IAR\STR71x\portmacro.h" -#endif - -#ifdef STR91X_IAR - #include "..\..\Source\portable\IAR\STR91x\portmacro.h" -#endif - -#ifdef GCC_H8S - #include "../../Source/portable/GCC/H8S2329/portmacro.h" -#endif - -#ifdef GCC_AT91FR40008 - #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" -#endif - -#ifdef RVDS_ARMCM3_LM3S102 - #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h" -#endif - -#ifdef GCC_ARMCM3_LM3S102 - #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" -#endif - -#ifdef IAR_ARMCM3_LM - #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" -#endif - -#ifdef HCS12_CODE_WARRIOR - #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" -#endif - -#ifdef MICROBLAZE_GCC - #include "../../Source/portable/GCC/MicroBlaze/portmacro.h" -#endif - -#ifdef TERN_EE - #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h" -#endif - -#ifdef GCC_HCS12 - #include "../../Source/portable/GCC/HCS12/portmacro.h" -#endif - -#ifdef GCC_MCF5235 - #include "../portable/GCC/MCF5235/portmacro.h" -#endif - -#ifdef CODEWARRIOR_MCF5235 - #include "../portable/CodeWarrior/MCF5235/portmacro.h" -#endif - -#ifdef BCC_INDUSTRIAL_PC_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\PC\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef BCC_FLASH_LITE_186_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif -/* - * Setup the stack of a new task so it is ready to be placed under the - * scheduler control. The registers have to be placed on the stack in - * the order that the port expects to find them. - */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ); - -/* - * Map to the memory management routines required for the port. - */ -void *pvPortMalloc( size_t xSize ); -void vPortFree( void *pv ); -void vPortInitialiseBlocks( void ); - -/* - * Setup the hardware ready for the scheduler to take control. This generally - * sets up a tick interrupt and sets timers for the correct tick frequency. - */ -portBASE_TYPE xPortStartScheduler( void ); - -/* - * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so - * the hardware is left in its original condition after the scheduler stops - * executing. - */ -void vPortEndScheduler( void ); - - -#endif /* PORTABLE_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/projdefs.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/projdefs.h deleted file mode 100644 index 79ea4837..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/projdefs.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef PROJDEFS_H -#define PROJDEFS_H - -/* Defines to prototype to which task functions must conform. */ -typedef void (*pdTASK_CODE)( void * ); - -#define pdTRUE ( 1 ) -#define pdFALSE ( 0 ) - -#define pdPASS ( 1 ) -#define pdFAIL ( 0 ) - -/* Error definitions. */ -#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) -#define errNO_TASK_TO_RUN ( -2 ) -#define errQUEUE_FULL ( -3 ) -#define errQUEUE_BLOCKED ( -4 ) -#define errQUEUE_YIELD ( -5 ) - -#endif - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/queue.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/queue.h deleted file mode 100644 index 25f1772c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/queue.h +++ /dev/null @@ -1,471 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef QUEUE_H -#define QUEUE_H - -typedef void * xQueueHandle; - -/** - * queue. h - * 
- xQueueHandle xQueueCreate( 
-                              unsigned portBASE_TYPE uxQueueLength, 
-                              unsigned portBASE_TYPE uxItemSize 
-                          );
- *
- * - * Creates a new queue instance. This allocates the storage required by the - * new queue and returns a handle for the queue. - * - * @param uxQueueLength The maximum number of items that the queue can contain. - * - * @param uxItemSize The number of bytes each item in the queue will require. - * Items are queued by copy, not by reference, so this is the number of bytes - * that will be copied for each posted item. Each item on the queue must be - * the same size. - * - * @return If the queue is successfully create then a handle to the newly - * created queue is returned. If the queue cannot be created then 0 is - * returned. - * - * Example usage: - 
- struct AMessage
- {
-    portCHAR ucMessageID;
-    portCHAR ucData[ 20 ];
- };
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
-
-    // Create a queue capable of containing 10 unsigned long values.
-    xQueue1 = xQueueCreate( 10, sizeof( unsigned portLONG ) );
-    if( xQueue1 == 0 )
-    {
-        // Queue was not created and must not be used.
-    }
-
-    // Create a queue capable of containing 10 pointers to AMessage structures.
-    // These should be passed by pointer as they contain a lot of data.
-    xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-    if( xQueue2 == 0 )
-    {
-        // Queue was not created and must not be used.
-    }
-
-    // ... Rest of task code.
- }
-
- * \defgroup xQueueCreate xQueueCreate - * \ingroup QueueManagement - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueSend( 
-                             xQueueHandle xQueue, 
-                             const void * pvItemToQueue, 
-                             portTickType xTicksToWait 
-                         );
- *
- * - * Post an item on a queue. The item is queued by copy, not by reference. - * This function must not be called from an interrupt service routine. - * See xQueueSendFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0. The - * time is defined in tick periods so the constant portTICK_RATE_MS - * should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-    portCHAR ucMessageID;
-    portCHAR ucData[ 20 ];
- } xMessage;
-
- unsigned portLONG ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-    // Create a queue capable of containing 10 unsigned long values.
-    xQueue1 = xQueueCreate( 10, sizeof( unsigned portLONG ) );
-
-    // Create a queue capable of containing 10 pointers to AMessage structures.
-    // These should be passed by pointer as they contain a lot of data.
-    xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-    // ...
-
-    if( xQueue1 != 0 )
-    {
-        // Send an unsigned long.  Wait for 10 ticks for space to become 
-        // available if necessary.
-        if( xQueueSend( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )
-        {
-            // Failed to post the message, even after 10 ticks.
-        }
-    }
-
-    if( xQueue2 != 0 )
-    {
-        // Send a pointer to a struct AMessage object.  Don't block if the
-        // queue is already full.
-        pxMessage = & xMessage;
-        xQueueSend( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );
-    }
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueSend( xQueueHandle xQueue, const void * pvItemToQueue, portTickType xTicksToWait ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueReceive( 
-                                xQueueHandle xQueue, 
-                                void *pvBuffer, 
-                                portTickType xTicksToWait 
-                            );
- * - * Receive an item from a queue. The item is received by copy so a buffer of - * adequate size must be provided. The number of bytes copied into the buffer - * was defined when the queue was created. - * - * This function must not be used in an interrupt service routine. See - * xQueueReceiveFromISR for an alternative that can. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. The time is defined in tick periods so the constant - * portTICK_RATE_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- struct AMessage
- {
-    portCHAR ucMessageID;
-    portCHAR ucData[ 20 ];
- } xMessage;
-
- xQueueHandle xQueue;
- 
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-    // Create a queue capable of containing 10 pointers to AMessage structures.
-    // These should be passed by pointer as they contain a lot of data.
-    xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-    if( xQueue == 0 )
-    {
-        // Failed to create the queue.
-    }
-
-    // ...
-
-    // Send a pointer to a struct AMessage object.  Don't block if the
-    // queue is already full.
-    pxMessage = & xMessage;
-    xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to receive from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-    if( xQueue != 0 )
-    {
-        // Receive a message on the created queue.  Block for 10 ticks if a
-        // message is not immediately available.
-        if( xQueueReceive( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )
-        {
-            // pcRxedMessage now points to the struct AMessage variable posted
-            // by vATask.
-        }
-    }
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceive( xQueueHandle xQueue, void *pvBuffer, portTickType xTicksToWait ); - -/** - * queue. h - * 
unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue );
- * - * Return the number of messages stored in a queue. - * - * @param xQueue A handle to the queue being queried. - * - * @return The number of messages available in the queue. - * - * \page uxQueueMessagesWaiting uxQueueMessagesWaiting - * \ingroup QueueManagement - */ -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue ); - -/** - * queue. h - * 
void vQueueDelete( xQueueHandle xQueue );
- * - * Delete a queue - freeing all the memory allocated for storing of items - * placed on the queue. - * - * @param xQueue A handle to the queue to be deleted. - * - * \page vQueueDelete vQueueDelete - * \ingroup QueueManagement - */ -void vQueueDelete( xQueueHandle xQueue ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueSendFromISR( 
-                                    xQueueHandle pxQueue, 
-                                    const void *pvItemToQueue, 
-                                    portBASE_TYPE xTaskPreviouslyWoken 
-                                );
-
- * - * Post an item on a queue. It is safe to use this function from within an - * interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param cTaskPreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. See the file serial .c in the - * PC port for a good example of this mechanism. - * - * @return pdTRUE if a task was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- portCHAR cIn;
- portBASE_TYPE xTaskWokenByPost;
-
-    // We have not woken a task at the start of the ISR.
-    cTaskWokenByPost = pdFALSE;
-
-    // Loop until the buffer is empty.
-    do
-    {
-        // Obtain a byte from the buffer.
-        cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );						
-
-        // Post the byte.  The first time round the loop cTaskWokenByPost
-        // will be pdFALSE.  If the queue send causes a task to wake we do
-        // not want the task to run until we have finished the ISR, so
-        // xQueueSendFromISR does not cause a context switch.  Also we 
-        // don't want subsequent posts to wake any other tasks, so we store
-        // the return value back into cTaskWokenByPost so xQueueSendFromISR
-        // knows not to wake any task the next iteration of the loop.
-        xTaskWokenByPost = xQueueSendFromISR( xRxQueue, &cIn, cTaskWokenByPost );
-
-    } while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-    // Now the buffer is empty we can switch context if necessary.
-    if( cTaskWokenByPost )
-    {
-        taskYIELD ();
-    }
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueReceiveFromISR( 
-                                       xQueueHandle pxQueue, 
-                                       void *pvBuffer, 
-                                       portBASE_TYPE *pxTaskWoken 
-                                   ); 
- *
- * - * Receive an item from a queue. It is safe to use this function from within an - * interrupt service routine. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param pxTaskWoken A task may be blocked waiting for space to become - * available on the queue. If xQueueReceiveFromISR causes such a task to - * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will - * remain unchanged. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- 
- xQueueHandle xQueue;
- 
- // Function to create a queue and post some values.
- void vAFunction( void *pvParameters )
- {
- portCHAR cValueToPost;
- const portTickType xBlockTime = ( portTickType )0xff;
-
-    // Create a queue capable of containing 10 characters.
-    xQueue = xQueueCreate( 10, sizeof( portCHAR ) );
-    if( xQueue == 0 )
-    {
-        // Failed to create the queue.
-    }
-
-    // ...
-
-    // Post some characters that will be used within an ISR.  If the queue
-    // is full then this task will block for xBlockTime ticks.
-    cValueToPost = 'a';
-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
-    cValueToPost = 'b';
-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
-
-    // ... keep posting characters ... this task may block when the queue
-    // becomes full.
-
-    cValueToPost = 'c';
-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
- }
-
- // ISR that outputs all the characters received on the queue. 
- void vISR_Routine( void )
- {
- portBASE_TYPE xTaskWokenByReceive = pdFALSE;
- portCHAR cRxedChar;
-
-    while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )
-    {
-        // A character was received.  Output the character now.
-        vOutputCharacter( cRxedChar );
-
-        // If removing the character from the queue woke the task that was 
-        // posting onto the queue cTaskWokenByReceive will have been set to
-        // pdTRUE.  No matter how many times this loop iterates only one
-        // task will be woken.
-    }
-
-    if( cTaskWokenByPost != ( portCHAR ) pdFALSE;
-    {
-        taskYIELD ();
-    }
- }
-
- * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - - -/* - * The functions defined above are for passing data to and from tasks. The - * functions below are the equivalents for passing data to and from - * co-rtoutines. - * - * These functions are called from the co-routine macro implementation and - * should not be called directly from application code. Instead use the macro - * wrappers defined within croutine.h. - */ -signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ); -signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); -signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ); -signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/semphr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/semphr.h deleted file mode 100644 index 6d8718d2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/semphr.h +++ /dev/null @@ -1,289 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include "queue.h" - -#ifndef SEMAPHORE_H -#define SEMAPHORE_H - -typedef xQueueHandle xSemaphoreHandle; - -#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( unsigned portCHAR ) 1 ) -#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( unsigned portCHAR ) 0 ) -#define semGIVE_BLOCK_TIME ( ( portTickType ) 0 ) - - -/** - * semphr. h - * 
vSemaphoreCreateBinary( xSemaphoreHandle xSemaphore )
- * - * Macro that implements a semaphore by using the existing queue mechanism. - * The queue length is 1 as this is a binary semaphore. The data size is 0 - * as we don't want to actually store any data - we just want to know if the - * queue is empty or full. - * - * @param xSemaphore Handle to the created semaphore. Should be of type xSemaphoreHandle. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().
-    // This is a macro so pass the variable in directly.
-    vSemaphoreCreateBinary( xSemaphore );
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.  
-    }
- }
-
- * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary - * \ingroup Semaphores - */ -#define vSemaphoreCreateBinary( xSemaphore ) { \ - xSemaphore = xQueueCreate( ( unsigned portCHAR ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH ); \ - if( xSemaphore != NULL ) \ - { \ - xSemaphoreGive( xSemaphore ); \ - } \ - } - -/** - * semphr. h - * xSemaphoreTake( - * xSemaphoreHandle xSemaphore, - * portTickType xBlockTime - * ) - * - * Macro to obtain a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (). - * - * @param xSemaphore A handle to the semaphore being obtained. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @param xBlockTime The time in ticks to wait for the semaphore to become - * available. The macro portTICK_RATE_MS can be used to convert this to a - * real time. A block time of zero can be used to poll the semaphore. - * - * @return pdTRUE if the semaphore was obtained. pdFALSE if xBlockTime - * expired without the semaphore becoming available. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore = NULL;
-
- // A task that creates a semaphore.
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    vSemaphoreCreateBinary( xSemaphore );
- }
-
- // A task that uses the semaphore.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xSemaphore != NULL )
-    {
-        // See if we can obtain the semaphore.  If the semaphore is not available
-        // wait 10 ticks to see if it becomes free.	
-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the semaphore and can now access the
-            // shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource.  Release the 
-            // semaphore.
-            xSemaphoreGive( xSemaphore );
-        }
-        else
-        {
-            // We could not obtain the semaphore and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
-
- * \defgroup xSemaphoreTake xSemaphoreTake - * \ingroup Semaphores - */ -#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueReceive( ( xQueueHandle ) xSemaphore, NULL, xBlockTime ) - -/** - * semphr. h - * 
xSemaphoreGive( xSemaphoreHandle xSemaphore )
- * - * Macro to release a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (), and obtained using sSemaphoreTake (). - * - * This must not be used from an ISR. See xSemaphoreGiveFromISR () for - * an alternative which can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @return pdTRUE if the semaphore was released. pdFALSE if an error occurred. - * Semaphores are implemented using queues. An error can occur if there is - * no space on the queue to post a message - indicating that the - * semaphore was not first obtained correctly. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    vSemaphoreCreateBinary( xSemaphore );
-
-    if( xSemaphore != NULL )
-    {
-        if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-        {
-            // We would expect this call to fail because we cannot give
-            // a semaphore without first "taking" it!
-        }
-
-        // Obtain the semaphore - don't block if the semaphore is not
-        // immediately available.
-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 0 ) )
-        {
-            // We now have the semaphore and can access the shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource so can free the
-            // semaphore.
-            if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-            {
-                // We would not expect this call to fail because we must have
-                // obtained the semaphore to get here.
-            }
-        }
-    }
- }
-
- * \defgroup xSemaphoreGive xSemaphoreGive - * \ingroup Semaphores - */ -#define xSemaphoreGive( xSemaphore ) xQueueSend( ( xQueueHandle ) xSemaphore, NULL, semGIVE_BLOCK_TIME ) - -/** - * semphr. h - * 
- xSemaphoreGiveFromISR( 
-                          xSemaphoreHandle xSemaphore, 
-                          portSHORT sTaskPreviouslyWoken 
-                      )
- * - * Macro to release a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (), and obtained using xSemaphoreTake (). - * - * This macro can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @param sTaskPreviouslyWoken This is included so an ISR can make multiple calls - * to xSemaphoreGiveFromISR () from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. See the file serial .c in the - * PC port for a good example of using xSemaphoreGiveFromISR (). - * - * @return pdTRUE if a task was woken by releasing the semaphore. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 
- #define LONG_TIME 0xffff
- #define TICKS_TO_WAIT	10
- xSemaphoreHandle xSemaphore = NULL;
-
- // Repetitive task.
- void vATask( void * pvParameters )
- {
-    for( ;; )
-    {
-        // We want this task to run every 10 ticks or a timer.  The semaphore 
-        // was created before this task was started
-
-        // Block waiting for the semaphore to become available.
-        if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )
-        {
-            // It is time to execute.
-
-            // ...
-
-            // We have finished our task.  Return to the top of the loop where
-            // we will block on the semaphore until it is time to execute 
-            // again.
-        }
-    }
- }
-
- // Timer ISR
- void vTimerISR( void * pvParameters )
- {
- static unsigned portCHAR ucLocalTickCount = 0;
-
-    // A timer tick has occurred.
-
-    // ... Do other time functions.
-
-    // Is it time for vATask () to run?
-    ucLocalTickCount++;
-    if( ucLocalTickCount >= TICKS_TO_WAIT )
-    {
-        // Unblock the task by releasing the semaphore.
-        xSemaphoreGive( xSemaphore );
-
-        // Reset the count so we release the semaphore again in 10 ticks time.
-        ucLocalTickCount = 0;
-    }
- }
-
- * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR - * \ingroup Semaphores - */ -#define xSemaphoreGiveFromISR( xSemaphore, xTaskPreviouslyWoken ) xQueueSendFromISR( ( xQueueHandle ) xSemaphore, NULL, xTaskPreviouslyWoken ) - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/serial.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/serial.h deleted file mode 100644 index 19634d83..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/serial.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef SERIAL_COMMS_H -#define SERIAL_COMMS_H - -typedef void * xComPortHandle; - -typedef enum -{ - serCOM1, - serCOM2, - serCOM3, - serCOM4, - serCOM5, - serCOM6, - serCOM7, - serCOM8 -} eCOMPort; - -typedef enum -{ - serNO_PARITY, - serODD_PARITY, - serEVEN_PARITY, - serMARK_PARITY, - serSPACE_PARITY -} eParity; - -typedef enum -{ - serSTOP_1, - serSTOP_2 -} eStopBits; - -typedef enum -{ - serBITS_5, - serBITS_6, - serBITS_7, - serBITS_8 -} eDataBits; - -typedef enum -{ - ser50, - ser75, - ser110, - ser134, - ser150, - ser200, - ser300, - ser600, - ser1200, - ser1800, - ser2400, - ser4800, - ser9600, - ser19200, - ser38400, - ser57600, - ser115200 -} eBaud; - -xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength ); -xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength ); -void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength ); -signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime ); -signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime ); -portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort ); -void vSerialClose( xComPortHandle xPort ); - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/task.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/task.h deleted file mode 100644 index d280110f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/include/task.h +++ /dev/null @@ -1,926 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef TASK_H -#define TASK_H - -#include "portable.h" -#include "list.h" - -/*----------------------------------------------------------- - * MACROS AND DEFINITIONS - *----------------------------------------------------------*/ - -#define tskKERNEL_VERSION_NUMBER "V4.0.5" - -/** - * task. h - * - * Type by which tasks are referenced. For example, a call to xTaskCreate - * returns (via a pointer parameter) an xTaskHandle variable that can then - * be used as a parameter to vTaskDelete to delete the task. - * - * \page xTaskHandle xTaskHandle - * \ingroup Tasks - */ -typedef void * xTaskHandle; - -/* - * Defines the priority used by the idle task. This must not be modified. - * - * \ingroup TaskUtils - */ -#define tskIDLE_PRIORITY ( ( unsigned portBASE_TYPE ) 0 ) - -/** - * task. h - * - * Macro for forcing a context switch. - * - * \page taskYIELD taskYIELD - * \ingroup SchedulerControl - */ -#define taskYIELD() portYIELD() - -/** - * task. h - * - * Macro to mark the start of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskENTER_CRITICAL taskENTER_CRITICAL - * \ingroup SchedulerControl - */ -#define taskENTER_CRITICAL() portENTER_CRITICAL() - -/** - * task. h - * - * Macro to mark the end of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskEXIT_CRITICAL taskEXIT_CRITICAL - * \ingroup SchedulerControl - */ -#define taskEXIT_CRITICAL() portEXIT_CRITICAL() - -/** - * task. h - * - * Macro to disable all maskable interrupts. - * - * \page taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS() - -/** - * task. h - * - * Macro to enable microcontroller interrupts. - * - * \page taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS() - - -/*----------------------------------------------------------- - * TASK CREATION API - *----------------------------------------------------------*/ - -/** - * task. h - *
- portBASE_TYPE xTaskCreate(
-                              pdTASK_CODE pvTaskCode,
-                              const portCHAR * const pcName,
-                              unsigned portSHORT usStackDepth,
-                              void *pvParameters,
-                              unsigned portBASE_TYPE uxPriority,
-                              xTaskHandle *pvCreatedTask
-                          );
- * - * Create a new task and add it to the list of tasks that are ready to run. - * - * @param pvTaskCode Pointer to the task entry function. Tasks - * must be implemented to never return (i.e. continuous loop). - * - * @param pcName A descriptive name for the task. This is mainly used to - * facilitate debugging. Max length defined by tskMAX_TASK_NAME_LEN - default - * is 16. - * - * @param usStackDepth The size of the task stack specified as the number of - * variables the stack can hold - not the number of bytes. For example, if - * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes - * will be allocated for stack storage. - * - * @param pvParameters Pointer that will be used as the parameter for the task - * being created. - * - * @param uxPriority The priority at which the task should run. - * - * @param pvCreatedTask Used to pass back a handle by which the created task - * can be referenced. - * - * @return pdPASS if the task was successfully created and added to a ready - * list, otherwise an error code defined in the file errors. h - * - * Example usage: - 
- // Task to be created.
- void vTaskCode( void * pvParameters )
- {
-     for( ;; )
-     {
-         // Task code goes here.
-     }
- }
-
- // Function that creates a task.
- void vOtherFunction( void )
- {
- unsigned char ucParameterToPass;
- xTaskHandle xHandle;
-		
-     // Create the task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );
-		
-     // Use the handle to delete the task.
-     vTaskDelete( xHandle );
- }
-
- * \defgroup xTaskCreate xTaskCreate - * \ingroup Tasks - */ -signed portBASE_TYPE xTaskCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pvCreatedTask ); - -/** - * task. h - * 
void vTaskDelete( xTaskHandle pxTask );
- * - * INCLUDE_vTaskDelete must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Remove a task from the RTOS real time kernels management. The task being - * deleted will be removed from all ready, blocked, suspended and event lists. - * - * NOTE: The idle task is responsible for freeing the kernel allocated - * memory from tasks that have been deleted. It is therefore important that - * the idle task is not starved of microcontroller processing time if your - * application makes any calls to vTaskDelete (). Memory allocated by the - * task code is not automatically freed, and should be freed before the task - * is deleted. - * - * See the demo application file death.c for sample code that utilises - * vTaskDelete (). - * - * @param pxTask The handle of the task to be deleted. Passing NULL will - * cause the calling task to be deleted. - * - * Example usage: - 
- void vOtherFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create the task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-		
-     // Use the handle to delete the task.
-     vTaskDelete( xHandle );
- }
-
- * \defgroup vTaskDelete vTaskDelete - * \ingroup Tasks - */ -void vTaskDelete( xTaskHandle pxTask ); - - -/*----------------------------------------------------------- - * TASK CONTROL API - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskDelay( portTickType xTicksToDelay );
- * - * Delay a task for a given number of ticks. The actual time that the - * task remains blocked depends on the tick rate. The constant - * portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * INCLUDE_vTaskDelay must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * @param xTicksToDelay The amount of time, in tick periods, that - * the calling task should block. - * - * Example usage: - 
- // Wait 10 ticks before performing an action.
- // NOTE:
- // This is for demonstration only and would be better achieved
- // using vTaskDelayUntil ().
- void vTaskFunction( void * pvParameters )
- {
- portTickType xDelay, xNextTime;
-
-     // Calc the time at which we want to perform the action
-     // next.
-     xNextTime = xTaskGetTickCount () + ( portTickType ) 10;
-
-     for( ;; )
-     {
-         xDelay = xNextTime - xTaskGetTickCount ();
-         xNextTime += ( portTickType ) 10;
-
-         // Guard against overflow
-         if( xDelay <= ( portTickType ) 10 )
-         {
-             vTaskDelay( xDelay );
-         }
-
-         // Perform action here.
-     }
- }
-
- * \defgroup vTaskDelay vTaskDelay - * \ingroup TaskCtrl - */ -void vTaskDelay( portTickType xTicksToDelay ); - -/** - * task. h - * 
void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement );
- * - * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Delay a task until a specified time. This function can be used by cyclical - * tasks to ensure a constant execution frequency. - * - * This function differs from vTaskDelay () in one important aspect: vTaskDelay () will - * cause a task to block for the specified number of ticks from the time vTaskDelay () is - * called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed - * execution frequency as the time between a task starting to execute and that task - * calling vTaskDelay () may not be fixed [the task may take a different path though the - * code between calls, or may get interrupted or preempted a different number of times - * each time it executes]. - * - * Whereas vTaskDelay () specifies a wake time relative to the time at which the function - * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to - * unblock. - * - * The constant portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the - * task was last unblocked. The variable must be initialised with the current time - * prior to its first use (see the example below). Following this the variable is - * automatically updated within vTaskDelayUntil (). - * - * @param xTimeIncrement The cycle time period. The task will be unblocked at - * time *pxPreviousWakeTime + xTimeIncrement. Calling vTaskDelayUntil with the - * same xTimeIncrement parameter value will cause the task to execute with - * a fixed interface period. - * - * Example usage: - 
- // Perform an action every 10 ticks.
- void vTaskFunction( void * pvParameters )
- {
- portTickType xLastWakeTime;
- const portTickType xFrequency = 10;
-
-     // Initialise the xLastWakeTime variable with the current time.
-     xLastWakeTime = xTaskGetTickCount ();
-     for( ;; )
-     {
-         // Wait for the next cycle.
-         vTaskDelayUntil( &xLastWakeTime, xFrequency );
-
-         // Perform action here.
-     }
- }
-
- * \defgroup vTaskDelayUntil vTaskDelayUntil - * \ingroup TaskCtrl - */ -void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement ); - -/** - * task. h - * 
unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask );
- * - * INCLUDE_xTaskPriorityGet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Obtain the priority of any task. - * - * @param pxTask Handle of the task to be queried. Passing a NULL - * handle results in the priority of the calling task being returned. - * - * @return The priority of pxTask. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create a task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-		
-     // ...
-
-     // Use the handle to obtain the priority of the created task.
-     // It was created with tskIDLE_PRIORITY, but may have changed
-     // it itself.
-     if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )
-     {
-         // The task has changed it's priority.
-     }
-
-     // ...
-
-     // Is our priority higher than the created task?
-     if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )
-     {
-         // Our priority (obtained using NULL handle) is higher.
-     }
- }
-
- * \defgroup uxTaskPriorityGet uxTaskPriorityGet - * \ingroup TaskCtrl - */ -unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ); - -/** - * task. h - * 
void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );
- * - * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Set the priority of any task. - * - * A context switch will occur before the function returns if the priority - * being set is higher than the currently executing task. - * - * @param pxTask Handle to the task for which the priority is being set. - * Passing a NULL handle results in the priority of the calling task being set. - * - * @param uxNewPriority The priority to which the task will be set. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create a task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-     // ...
-
-     // Use the handle to raise the priority of the created task.
-     vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );
-
-     // ...
-
-     // Use a NULL handle to raise our priority to the same value.
-     vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
- }
-
- * \defgroup vTaskPrioritySet vTaskPrioritySet - * \ingroup TaskCtrl - */ -void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ); - -/** - * task. h - * 
void vTaskSuspend( xTaskHandle pxTaskToSuspend );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Suspend any task. When suspended a task will never get any microcontroller - * processing time, no matter what its priority. - * - * Calls to vTaskSuspend are not accumulative - - * i.e. calling vTaskSuspend () twice on the same task still only requires one - * call to vTaskResume () to ready the suspended task. - * - * @param pxTaskToSuspend Handle to the task being suspended. Passing a NULL - * handle will cause the calling task to be suspended. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create a task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-		
-     // ...
-
-     // Use the handle to suspend the created task.
-     vTaskSuspend( xHandle );
-
-     // ...
-		
-     // The created task will not run during this period, unless
-     // another task calls vTaskResume( xHandle ).
-		
-     //...
-		
-
-     // Suspend ourselves.
-     vTaskSuspend( NULL );
-
-     // We cannot get here unless another task calls vTaskResume
-     // with our handle as the parameter.
- }
-
- * \defgroup vTaskSuspend vTaskSuspend - * \ingroup TaskCtrl - */ -void vTaskSuspend( xTaskHandle pxTaskToSuspend ); - -/** - * task. h - * 
void vTaskResume( xTaskHandle pxTaskToResume );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Resumes a suspended task. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * vTaskResume (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create a task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-		
-     // ...
-
-     // Use the handle to suspend the created task.
-     vTaskSuspend( xHandle );
-
-     // ...
-	
-     // The created task will not run during this period, unless
-     // another task calls vTaskResume( xHandle ).
-		
-     //...
-		
-
-     // Resume the suspended task ourselves.
-     vTaskResume( xHandle );
-
-     // The created task will once again get microcontroller processing
-     // time in accordance with it priority within the system.
- }
-
- * \defgroup vTaskResume vTaskResume - * \ingroup TaskCtrl - */ -void vTaskResume( xTaskHandle pxTaskToResume ); - -/** - * task. h - * 
void xTaskResumeFromISR( xTaskHandle pxTaskToResume );
- * - * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be - * available. See the configuration section for more information. - * - * An implementation of vTaskResume() that can be called from within an ISR. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * xTaskResumeFromISR (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * \defgroup vTaskResumeFromISR vTaskResumeFromISR - * \ingroup TaskCtrl - */ -portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ); - -/*----------------------------------------------------------- - * SCHEDULER CONTROL - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskStartScheduler( void );
- * - * Starts the real time kernel tick processing. After calling the kernel - * has control over which tasks are executed and when. This function - * does not return until an executing task calls vTaskEndScheduler (). - * - * At least one task should be created via a call to xTaskCreate () - * before calling vTaskStartScheduler (). The idle task is created - * automatically when the first application task is created. - * - * See the demo application file main.c for an example of creating - * tasks and starting the kernel. - * - * Example usage: - 
- void vAFunction( void )
- {
-     // Create at least one task before starting the kernel.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-     // Start the real time kernel with preemption.
-     vTaskStartScheduler ();
-
-     // Will not get here unless a task calls vTaskEndScheduler ()
- }
-
- * - * \defgroup vTaskStartScheduler vTaskStartScheduler - * \ingroup SchedulerControl - */ -void vTaskStartScheduler( void ); - -/** - * task. h - * 
void vTaskEndScheduler( void );
- * - * Stops the real time kernel tick. All created tasks will be automatically - * deleted and multitasking (either preemptive or cooperative) will - * stop. Execution then resumes from the point where vTaskStartScheduler () - * was called, as if vTaskStartScheduler () had just returned. - * - * See the demo application file main. c in the demo/PC directory for an - * example that uses vTaskEndScheduler (). - * - * vTaskEndScheduler () requires an exit function to be defined within the - * portable layer (see vPortEndScheduler () in port. c for the PC port). This - * performs hardware specific operations such as stopping the kernel tick. - * - * vTaskEndScheduler () will cause all of the resources allocated by the - * kernel to be freed - but will not free resources allocated by application - * tasks. - * - * Example usage: - 
- void vTaskCode( void * pvParameters )
- {
-     for( ;; )
-     {
-         // Task code goes here.
-
-         // At some point we want to end the real time kernel processing
-         // so call ...
-         vTaskEndScheduler ();
-     }
- }
-
- void vAFunction( void )
- {
-     // Create at least one task before starting the kernel.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-     // Start the real time kernel with preemption.
-     vTaskStartScheduler ();
-
-     // Will only get here when the vTaskCode () task has called
-     // vTaskEndScheduler ().  When we get here we are back to single task
-     // execution.
- }
-
- * - * \defgroup vTaskEndScheduler vTaskEndScheduler - * \ingroup SchedulerControl - */ -void vTaskEndScheduler( void ); - -/** - * task. h - * 
void vTaskSuspendAll( void );
- * - * Suspends all real time kernel activity while keeping interrupts (including the - * kernel tick) enabled. - * - * After calling vTaskSuspendAll () the calling task will continue to execute - * without risk of being swapped out until a call to xTaskResumeAll () has been - * made. - * - * Example usage: - 
- void vTask1( void * pvParameters )
- {
-     for( ;; )
-     {
-         // Task code goes here.
-
-         // ...
-
-         // At some point the task wants to perform a long operation during
-         // which it does not want to get swapped out.  It cannot use
-         // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-         // operation may cause interrupts to be missed - including the
-         // ticks.
-
-         // Prevent the real time kernel swapping out the task.
-         vTaskSuspendAll ();
-
-         // Perform the operation here.  There is no need to use critical
-         // sections as we have all the microcontroller processing time.
-         // During this time interrupts will still operate and the kernel
-         // tick count will be maintained.
-
-         // ...
-
-         // The operation is complete.  Restart the kernel.
-         xTaskResumeAll ();
-     }
- }
-
- * \defgroup vTaskSuspendAll vTaskSuspendAll - * \ingroup SchedulerControl - */ -void vTaskSuspendAll( void ); - -/** - * task. h - * 
portCHAR xTaskResumeAll( void );
- * - * Resumes real time kernel activity following a call to vTaskSuspendAll (). - * After a call to vTaskSuspendAll () the kernel will take control of which - * task is executing at any time. - * - * @return If resuming the scheduler caused a context switch then pdTRUE is - * returned, otherwise pdFALSE is returned. - * - * Example usage: - 
- void vTask1( void * pvParameters )
- {
-     for( ;; )
-     {
-         // Task code goes here.
-
-         // ...
-
-         // At some point the task wants to perform a long operation during
-         // which it does not want to get swapped out.  It cannot use
-         // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-         // operation may cause interrupts to be missed - including the
-         // ticks.
-
-         // Prevent the real time kernel swapping out the task.
-         vTaskSuspendAll ();
-
-         // Perform the operation here.  There is no need to use critical
-         // sections as we have all the microcontroller processing time.
-         // During this time interrupts will still operate and the real
-         // time kernel tick count will be maintained.
-
-         // ...
-
-         // The operation is complete.  Restart the kernel.  We want to force
-         // a context switch - but there is no point if resuming the scheduler
-         // caused a context switch already.
-         if( !xTaskResumeAll () )
-         {
-              taskYIELD ();
-         }
-     }
- }
-
- * \defgroup xTaskResumeAll xTaskResumeAll - * \ingroup SchedulerControl - */ -signed portBASE_TYPE xTaskResumeAll( void ); - - -/*----------------------------------------------------------- - * TASK UTILITIES - *----------------------------------------------------------*/ - -/** - * task. h - * 
volatile portTickType xTaskGetTickCount( void );
- * - * @return The count of ticks since vTaskStartScheduler was called. - * - * \page xTaskGetTickCount xTaskGetTickCount - * \ingroup TaskUtils - */ -portTickType xTaskGetTickCount( void ); - -/** - * task. h - * 
unsigned portSHORT uxTaskGetNumberOfTasks( void );
- * - * @return The number of tasks that the real time kernel is currently managing. - * This includes all ready, blocked and suspended tasks. A task that - * has been deleted but not yet freed by the idle task will also be - * included in the count. - * - * \page uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks - * \ingroup TaskUtils - */ -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ); - -/** - * task. h - * 
void vTaskList( portCHAR *pcWriteBuffer );
- * - * configUSE_TRACE_FACILITY, INCLUDE_vTaskDelete and INCLUDE_vTaskSuspend - * must all be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * NOTE: This function will disable interrupts for its duration. It is - * not intended for normal application runtime use but as a debug aid. - * - * Lists all the current tasks, along with their current state and stack - * usage high water mark. - * - * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or - * suspended ('S'). - * - * @param pcWriteBuffer A buffer into which the above mentioned details - * will be written, in ascii form. This buffer is assumed to be large - * enough to contain the generated report. Approximately 40 bytes per - * task should be sufficient. - * - * \page vTaskList vTaskList - * \ingroup TaskUtils - */ -void vTaskList( signed portCHAR *pcWriteBuffer ); - -/** - * task. h - * 
void vTaskStartTrace( portCHAR * pcBuffer, unsigned portBASE_TYPE uxBufferSize );
- * - * Starts a real time kernel activity trace. The trace logs the identity of - * which task is running when. - * - * The trace file is stored in binary format. A separate DOS utility called - * convtrce.exe is used to convert this into a tab delimited text file which - * can be viewed and plotted in a spread sheet. - * - * @param pcBuffer The buffer into which the trace will be written. - * - * @param ulBufferSize The size of pcBuffer in bytes. The trace will continue - * until either the buffer in full, or ulTaskEndTrace () is called. - * - * \page vTaskStartTrace vTaskStartTrace - * \ingroup TaskUtils - */ -void vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize ); - -/** - * task. h - * 
unsigned portLONG ulTaskEndTrace( void );
- * - * Stops a kernel activity trace. See vTaskStartTrace (). - * - * @return The number of bytes that have been written into the trace buffer. - * - * \page usTaskEndTrace usTaskEndTrace - * \ingroup TaskUtils - */ -unsigned portLONG ulTaskEndTrace( void ); - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - *----------------------------------------------------------*/ - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Called from the real time kernel tick (either preemptive or cooperative), - * this increments the tick count and checks if any tasks that are blocked - * for a finite period required removing from a blocked list and placing on - * a ready list. - */ -inline void vTaskIncrementTick( void ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes the calling task from the ready list and places it both - * on the list of tasks waiting for a particular event, and the - * list of delayed tasks. The task will be removed from both lists - * and replaced on the ready list should either the event occur (and - * there be no higher priority tasks waiting on the same event) or - * the delay period expires. - * - * @param pxEventList The list containing tasks that are blocked waiting - * for the event to occur. - * - * @param xTicksToWait The maximum amount of time that the task should wait - * for the event to occur. This is specified in kernel ticks,the constant - * portTICK_RATE_MS can be used to convert kernel ticks into a real time - * period. - */ -void vTaskPlaceOnEventList( xList *pxEventList, portTickType xTicksToWait ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes a task from both the specified event list and the list of blocked - * tasks, and places it on a ready queue. - * - * xTaskRemoveFromEventList () will be called if either an event occurs to - * unblock a task, or the block timeout period expires. - * - * @return pdTRUE if the task being removed has a higher priority than the task - * making the call, otherwise pdFALSE. - */ -signed portBASE_TYPE xTaskRemoveFromEventList( const xList *pxEventList ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * INCLUDE_vTaskCleanUpResources and INCLUDE_vTaskSuspend must be defined as 1 - * for this function to be available. - * See the configuration section for more information. - * - * Empties the ready and delayed queues of task control blocks, freeing the - * memory allocated for the task control block and task stacks as it goes. - */ -void vTaskCleanUpResources( void ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Sets the pointer to the current TCB to the TCB of the highest priority task - * that is ready to run. - */ -void vTaskSwitchContext( void ); - -/* - * Return the handle of the calling task. - */ -xTaskHandle xTaskGetCurrentTaskHandle( void ); - - -#endif /* TASK_H */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/list.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/list.c deleted file mode 100644 index 4a6c536a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/list.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.2.0 - - + Removed the volatile modifier from the function parameters. This was - only ever included to prevent compiler warnings. Now warnings are - removed by casting parameters where the calls are made. - - + prvListGetOwnerOfNextEntry() and prvListGetOwnerOfHeadEntry() have been - removed from the c file and added as macros to the h file. - - + uxNumberOfItems has been added to the list structure. This removes the - need for a pointer comparison when checking if a list is empty, and so - is slightly faster. - - + Removed the NULL check in vListRemove(). This makes the call faster but - necessitates any application code utilising the list implementation to - ensure NULL pointers are not passed. - -Changes from V2.0.0 - - + Double linked the lists to allow faster removal item removal. - -Changes from V2.6.1 - - + Make use of the new portBASE_TYPE definition where ever appropriate. - -Changes from V3.0.0 - - + API changes as described on the FreeRTOS.org WEB site. - -Changes from V3.2.4 - - + Removed the pxHead member of the xList structure. This always pointed - to the same place so has been removed to free a few bytes of RAM. - - + Introduced the xMiniListItem structure that does not include the - xListItem members that are not required by the xListEnd member of a list. - Again this was done to reduce RAM usage. - - + Changed the volatile definitions of some structure members to clean up - the code where the list structures are used. - -Changes from V4.0.4 - - + Optimised vListInsert() in the case when the wake time is the maximum - tick count value. -*/ - -#include -#include "FreeRTOS.h" -#include "list.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -void vListInitialise( xList *pxList ) -{ - /* The list structure contains a list item which is used to mark the - end of the list. To initialise the list the list end is inserted - as the only list entry. */ - pxList->pxIndex = ( xListItem * ) &( pxList->xListEnd ); - - /* The list end value is the highest possible value in the list to - ensure it remains at the end of the list. */ - pxList->xListEnd.xItemValue = portMAX_DELAY; - - /* The list end next and previous pointers point to itself so we know - when the list is empty. */ - pxList->xListEnd.pxNext = ( xListItem * ) &( pxList->xListEnd ); - pxList->xListEnd.pxPrevious = ( xListItem * ) &( pxList->xListEnd ); - - pxList->uxNumberOfItems = 0; -} -/*-----------------------------------------------------------*/ - -void vListInitialiseItem( xListItem *pxItem ) -{ - /* Make sure the list item is not recorded as being on a list. */ - pxItem->pvContainer = NULL; -} -/*-----------------------------------------------------------*/ - -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem * pxIndex; - - /* Insert a new list item into pxList, but rather than sort the list, - makes the new list item the last item to be removed by a call to - pvListGetOwnerOfNextEntry. This means it has to be the item pointed to by - the pxIndex member. */ - pxIndex = pxList->pxIndex; - - pxNewListItem->pxNext = pxIndex->pxNext; - pxNewListItem->pxPrevious = pxList->pxIndex; - pxIndex->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxIndex->pxNext = ( volatile xListItem * ) pxNewListItem; - pxList->pxIndex = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListInsert( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem *pxIterator; -portTickType xValueOfInsertion; - - /* Insert the new list item into the list, sorted in ulListItem order. */ - xValueOfInsertion = pxNewListItem->xItemValue; - - /* If the list already contains a list item with the same item value then - the new list item should be placed after it. This ensures that TCB's which - are stored in ready lists (all of which have the same ulListItem value) - get an equal share of the CPU. However, if the xItemValue is the same as - the back marker the iteration loop below will not end. This means we need - to guard against this by checking the value first and modifying the - algorithm slightly if necessary. */ - if( xValueOfInsertion == portMAX_DELAY ) - { - pxIterator = pxList->xListEnd.pxPrevious; - } - else - { - for( pxIterator = ( xListItem * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) - { - /* There is nothing to do here, we are just iterating to the - wanted insertion position. */ - } - } - - pxNewListItem->pxNext = pxIterator->pxNext; - pxNewListItem->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxNewListItem->pxPrevious = pxIterator; - pxIterator->pxNext = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. This allows fast removal of the - item later. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListRemove( xListItem *pxItemToRemove ) -{ -xList * pxList; - - pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; - pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; - - /* The list item knows which list it is in. Obtain the list from the list - item. */ - pxList = ( xList * ) pxItemToRemove->pvContainer; - - /* Make sure the index is left pointing to a valid item. */ - if( pxList->pxIndex == pxItemToRemove ) - { - pxList->pxIndex = pxItemToRemove->pxPrevious; - } - - pxItemToRemove->pvContainer = NULL; - ( pxList->uxNumberOfItems )--; -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/CodeWarrior/MCF5235/port.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/CodeWarrior/MCF5235/port.c deleted file mode 100644 index 1bf51984..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/CodeWarrior/MCF5235/port.c +++ /dev/null @@ -1,251 +0,0 @@ -/* - FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry. - MCF5235 Port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* ----------------------- Stamdard cludes --------------------------------- */ -#include - -/* ----------------------- FreeRTOS includes ------------------------------- */ -#include "FreeRTOS.h" -#include "FreeRTOSConfig.h" -#include "task.h" - -/* ----------------------- System includes --------------------------------- */ -#include "port.h" -#include "m523xbcc.h" - -/* ------------------------ Defines --------------------------------------- */ -#define portVECTOR_TABLE __VECTOR_RAM -#define portVECTOR_SYSCALL ( 32 + portTRAP_YIELD ) -#define portVECTOR_TIMER ( 64 + 36 ) - -#define MCF_PIT_PRESCALER 512UL -#define MCF_PIT_TIMER_TICKS ( FSYS_2 / MCF_PIT_PRESCALER ) -#define MCF_PIT_MODULUS_REGISTER(freq) ( MCF_PIT_TIMER_TICKS / ( freq ) - 1UL) - -#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 ) -#define portINITIAL_CRITICAL_NESTING ( ( unsigned portLONG ) 10 ) - -#define TIMER_RESET_ASM_IMPL \ - lea __IPSBAR,a0; \ - adda.l #0x150000,a0; \ - move.w (a0),d1; \ - moveq #0,d0; \ - move.w d1,d0; \ - ori.l #0x4,d0; \ - move.w d0,(a0) - -/* ------------------------ Global variables ------------------------------ */ -extern volatile void *pxCurrentTCB; - -/* ------------------------ Static variables ------------------------------ */ -volatile unsigned portLONG ulCriticalNesting = portINITIAL_CRITICAL_NESTING; - -/* ------------------------ Static functions ------------------------------ */ - -/* ------------------------ Start implementation -------------------------- */ - -portSTACK_TYPE * -pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) -{ - /* Place the parameter on the stack in the expected location. */ - *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; - pxTopOfStack--; - - /* Place dummy return address on stack. Tasks should never terminate so - * we can set this to anything. */ - *pxTopOfStack = ( portSTACK_TYPE ) 0; - pxTopOfStack--; - - /* Create a Motorola Coldfire exception stack frame. First comes the return - * address. */ - *pxTopOfStack = ( portSTACK_TYPE ) pxCode; - pxTopOfStack--; - - /* Format, fault-status, vector number for exception stack frame. Task - * run in supervisor mode. */ - *pxTopOfStack = 0x40002000UL | ( portVECTOR_SYSCALL + 32 ) << 18; - pxTopOfStack--; - - /* Set the initial critical section nesting counter to zero. This value - * is used to restore the value of ulCriticalNesting. */ - *pxTopOfStack = 0; - *pxTopOfStack--; - - *pxTopOfStack = ( portSTACK_TYPE ) 0xA6; /* A6 / FP */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xA5; /* A5 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xA4; /* A4 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xA3; /* A3 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xA2; /* A2 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xA1; /* A1 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xA0; /* A0 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD7; /* D7 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD6; /* D6 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD5; /* D5 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD4; /* D4 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD3; /* D3 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD2; /* D2 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD1; /* D1 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD0; /* D0 */ - - return pxTopOfStack; -} - -/* - * Called by portYIELD() or taskYIELD() to manually force a context switch. - */ -asm void -prvPortYield( void ) -{ - move.w #0x2700, sr; - /* Perform the context switch. First save the context of the current task. */ - portSAVE_CONTEXT_IMPL( ); - /* Find the highest priority task that is ready to run. */ - jsr vTaskSwitchContext; - /* Restore the context of the new task. */ - portRESTORE_CONTEXT_IMPL( ); -} - -#if configUSE_PREEMPTION == 0 -/* - * The ISR used for the scheduler tick depends on whether the cooperative or - * the preemptive scheduler is being used. - */ -__declspec( interrupt ) -static void prvPortPreemptiveTick( void ) -{ - /* The cooperative scheduler requires a normal IRQ service routine to - * simply increment the system tick. - */ - vTaskIncrementTick( ); - MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIF; -} - -#else - -asm void -prvPortPreemptiveTick( ) -{ - move.w #0x2700, sr; - /* Perform the context switch. First save the context of the current task. */ - portSAVE_CONTEXT_IMPL( ); - TIMER_RESET_ASM_IMPL; - jsr vTaskIncrementTick; - /* Find the highest priority task that is ready to run. */ - jsr vTaskSwitchContext; - /* Restore the context of the new task. */ - portRESTORE_CONTEXT_IMPL( ); -} - -#endif - -void -vPortEnterCritical( ) -{ - /* FIXME: We should store the old IPL here - How are we supposed to do - * this. - */ - ( void )portSET_IPL( portIPL_MAX ); - - /* Now interrupts are disabled ulCriticalNesting can be accessed - * directly. Increment ulCriticalNesting to keep a count of how many times - * portENTER_CRITICAL() has been called. */ - ulCriticalNesting++; -} - -void -vPortExitCritical( ) -{ - if( ulCriticalNesting > portNO_CRITICAL_NESTING ) - { - /* Decrement the nesting count as we are leaving a critical section. */ - ulCriticalNesting--; - - /* If the nesting level has reached zero then interrupts should be - re-enabled. */ - if( ulCriticalNesting == portNO_CRITICAL_NESTING ) - { - ( void )portSET_IPL( 0 ); - } - } -} - -portBASE_TYPE -xPortStartScheduler( void ) -{ - extern void ( *portVECTOR_TABLE[] ) ( ); - - /* Add entry in vector table for yield system call. */ - portVECTOR_TABLE[portVECTOR_SYSCALL] = prvPortYield; - /* Add entry in vector table for periodic timer. */ - portVECTOR_TABLE[portVECTOR_TIMER] = prvPortPreemptiveTick; - - /* Configure the timer for the system clock. */ - if( configTICK_RATE_HZ > 0 ) - { - /* Configure prescaler */ - MCF_PIT_PCSR0 = MCF_PIT_PCSR_PRE( 0x9 ) | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_OVW; - /* Initialize the periodic timer interrupt. */ - MCF_PIT_PMR0 = MCF_PIT_MODULUS_REGISTER( configTICK_RATE_HZ ); - /* Configure interrupt priority and level and unmask interrupt. */ - MCF_INTC0_ICR36 = MCF_INTC0_ICRn_IL( 0x1 ) | MCF_INTC0_ICRn_IP( 0x1 ); - MCF_INTC0_IMRH &= ~( MCF_INTC0_IMRH_INT_MASK36 ); - MCF_INTC0_IMRL &= ~( MCF_INTC0_IMRL_MASKALL ); - /* Enable interrupts */ - MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_EN | MCF_PIT_PCSR_PIF; - } - - /* Restore the context of the first task that is going to run. */ - portRESTORE_CONTEXT( ); - - /* Should not get here. */ - return pdTRUE; -} - -void -vPortEndScheduler( void ) -{ -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/CodeWarrior/MCF5235/portmacro.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/CodeWarrior/MCF5235/portmacro.h deleted file mode 100644 index 7b558786..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/CodeWarrior/MCF5235/portmacro.h +++ /dev/null @@ -1,161 +0,0 @@ -/* - FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry. - MCF5235 Port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef PORTMACRO_H -#define PORTMACRO_H - -/* ------------------------ Data types for Coldfire ----------------------- */ -#define portCHAR char -#define portFLOAT float -#define portDOUBLE double -#define portLONG long -#define portSHORT short -#define portSTACK_TYPE unsigned int -#define portBASE_TYPE int - -#if defined( USE_16_BIT_TICKS ) && ( USE_16_BIT_TICKS == 1 ) -typedef unsigned portSHORT portTickType; - -#define portMAX_DELAY ( portTickType ) 0xFFFFU -#else -typedef unsigned portLONG portTickType; - -#define portMAX_DELAY ( portTickType ) 0xFFFFFFFFUL -#endif - -/* ------------------------ Global variables ------------------------------ */ -extern volatile unsigned portLONG ulCriticalNesting; - -/* ------------------------ Architecture specifics ------------------------ */ -#define portSTACK_GROWTH ( -1 ) -#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) -#define portBYTE_ALIGNMENT 4 - -#define portTRAP_YIELD 0 /* Trap 0 */ -#define portIPL_MAX 7 /* Only NMI interrupt 7 allowed. */ - -/* ------------------------ FreeRTOS macros for port ---------------------- */ - -/* - * This function must be called when the current state of the active task - * should be stored. It must be called immediately after exception - * processing from the CPU, i.e. there exists a Coldfire exception frame at - * the current position in the stack. The function reserves space on - * the stack for the CPU registers and other task dependent values (e.g - * ulCriticalNesting) and updates the top of the stack in the TCB. - */ - -#define portSAVE_CONTEXT_IMPL( ) \ - /* reserve space for task state. */ \ - lea -64(a7), a7; \ - /* push data register %d0-%d7/%a0-%a6 on stack. */ \ - movem.l d0-d7/a0-a6, (sp); \ - /* push ulCriticalNesting counter on stack. */ \ - lea 60(a7), a0; \ - move.l ulCriticalNesting, (a0); \ - /* set the new top of the stack in the TCB. */ \ - move.l pxCurrentTCB, a0; \ - move.l sp, (a0) - -#define portSAVE_CONTEXT( ) asm { \ - portSAVE_CONTEXT_IMPL( ); \ -} - -/* - * This function restores the current active and continues its execution. - * It loads the current TCB and restores the processor registers, the - * task dependent values (e.g ulCriticalNesting). Finally execution - * is continued by executing an rte instruction. - */ - -#define portRESTORE_CONTEXT_IMPL( ) \ - move.l pxCurrentTCB, a7; \ - move.l (a7), a7; \ - /* stack pointer now points to the saved registers. */ \ - movem.l (a7), d0-d7/a0-a6; \ - /* restore ulCriticalNesting counter from stack. */ \ - lea 60(a7), a7; \ - move.l (a7)+, ulCriticalNesting; \ - /* stack pointer now points to exception frame. */ \ - rte - -#define portRESTORE_CONTEXT() asm{ \ - portRESTORE_CONTEXT_IMPL( ); \ -} - -#define portENTER_CRITICAL() \ - vPortEnterCritical(); - -#define portEXIT_CRITICAL() \ - vPortExitCritical(); - -#define portSET_IPL( xIPL ) \ - asm_set_ipl( xIPL ) - -#define portDISABLE_INTERRUPTS() \ - do { ( void )portSET_IPL( portIPL_MAX ); } while( 0 ) -#define portENABLE_INTERRUPTS() \ - do { ( void )portSET_IPL( 0 ); } while( 0 ) - -#define portYIELD() \ - asm { trap #0; } - -#define portNOP() \ - asm ( "nop\n\t" ) - -#define portENTER_SWITCHING_ISR() \ - asm volatile ( "move.w #0x2700, %sr" ); \ - /* Save the context of the interrupted task. */ \ - portSAVE_CONTEXT( ); \ - { - -#define portEXIT_SWITCHING_ISR( SwitchRequired ) \ - /* If a switch is required we call vTaskSwitchContext(). */ \ - if( SwitchRequired ) \ - { \ - vTaskSwitchContext( ); \ - } \ - } \ - portRESTORE_CONTEXT( ); - -/* ------------------------ Function prototypes --------------------------- */ -void vPortEnterCritical( void ); -void vPortExitCritical( void ); - -/* ------------------------ Compiler specifics ---------------------------- */ -#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) \ - void vFunction( void *pvParameters ) - -#define portTASK_FUNCTION( vFunction, pvParameters ) \ - void vFunction( void *pvParameters ) -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/MemMang/heap_1.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/MemMang/heap_1.c deleted file mode 100644 index b3363226..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/MemMang/heap_1.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - -Changes between V2.5.1 and V2.5.1 - - + The memory pool has been defined within a struct to ensure correct memory - alignment on 32bit systems. - -Changes between V2.6.1 and V3.0.0 - - + An overflow check has been added to ensure the next free byte variable - does not wrap around. -*/ - - -/* - * The simplest possible implementation of pvPortMalloc(). Note that this - * implementation does NOT allow allocated memory to be freed again. - * - * See heap_2.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include -#include "FreeRTOS.h" -#include "task.h" - -/* Setup the correct byte alignment mask for the defined byte alignment. */ -#if portBYTE_ALIGNMENT == 4 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0000 ) -#endif - -#ifndef heapBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static struct xRTOS_HEAP -{ - unsigned portLONG ulDummy; - unsigned portCHAR ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -static size_t xNextFreeByte = ( size_t ) 0; -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn = NULL; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - #if portBYTE_ALIGNMENT != 1 - if( xWantedSize & heapBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) ); - } - #endif - - vTaskSuspendAll(); - { - /* Check there is enough room left for the allocation. */ - if( ( ( xNextFreeByte + xWantedSize ) < configTOTAL_HEAP_SIZE ) && - ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) )/* Check for overflow. */ - { - /* Return the next free byte then increment the index past this - block. */ - pvReturn = &( xHeap.ucHeap[ xNextFreeByte ] ); - xNextFreeByte += xWantedSize; - } - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - /* Memory cannot be freed using this scheme. See heap_2.c and heap_3.c - for alternative implementations, and the memory management pages of - http://www.FreeRTOS.org for more information. */ - ( void ) pv; -} -/*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* Only required when static memory is not cleared. */ - xNextFreeByte = ( size_t ) 0; -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/MemMang/heap_2.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/MemMang/heap_2.c deleted file mode 100644 index b0215ebe..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/MemMang/heap_2.c +++ /dev/null @@ -1,236 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - * A sample implementation of pvPortMalloc() and vPortFree() that permits - * allocated blocks to be freed, but does not combine adjacent free blocks - * into a single larger block. - * - * See heap_1.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* Setup the correct byte alignment mask for the defined byte alignment. */ -#if portBYTE_ALIGNMENT == 4 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0000 ) -#endif - -#ifndef heapBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static struct xRTOS_HEAP -{ - unsigned portLONG ulDummy; - unsigned portCHAR ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -/* Define the linked list structure. This is used to link free blocks in order -of their size. */ -typedef struct A_BLOCK_LINK -{ - struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */ - size_t xBlockSize; /*<< The size of the free block. */ -} xBlockLink; - - -static const unsigned portSHORT heapSTRUCT_SIZE = ( sizeof( xBlockLink ) + ( sizeof( xBlockLink ) % portBYTE_ALIGNMENT ) ); -#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) ) - -/* Create a couple of list links to mark the start and end of the list. */ -static xBlockLink xStart, xEnd; - -/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */ - -/* - * Insert a block into the list of free blocks - which is ordered by size of - * the block. Small blocks at the start of the list and large blocks at the end - * of the list. - */ -#define prvInsertBlockIntoFreeList( pxBlockToInsert ) \ -{ \ -xBlockLink *pxIterator; \ -size_t xBlockSize; \ - \ - xBlockSize = pxBlockToInsert->xBlockSize; \ - \ - /* Iterate through the list until a block is found that has a larger size */ \ - /* than the block we are inserting. */ \ - for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock ) \ - { \ - /* There is nothing to do here - just iterate to the correct position. */ \ - } \ - \ - /* Update the list to include the block being inserted in the correct */ \ - /* position. */ \ - pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; \ - pxIterator->pxNextFreeBlock = pxBlockToInsert; \ -} -/*-----------------------------------------------------------*/ - -#define prvHeapInit() \ -{ \ -xBlockLink *pxFirstFreeBlock; \ - \ - /* xStart is used to hold a pointer to the first item in the list of free */ \ - /* blocks. The void cast is used to prevent compiler warnings. */ \ - xStart.pxNextFreeBlock = ( void * ) xHeap.ucHeap; \ - xStart.xBlockSize = ( size_t ) 0; \ - \ - /* xEnd is used to mark the end of the list of free blocks. */ \ - xEnd.xBlockSize = configTOTAL_HEAP_SIZE; \ - xEnd.pxNextFreeBlock = NULL; \ - \ - /* To start with there is a single free block that is sized to take up the \ - entire heap space. */ \ - pxFirstFreeBlock = ( void * ) xHeap.ucHeap; \ - pxFirstFreeBlock->xBlockSize = configTOTAL_HEAP_SIZE; \ - pxFirstFreeBlock->pxNextFreeBlock = &xEnd; \ -} -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink; -static portBASE_TYPE xHeapHasBeenInitialised = pdFALSE; -void *pvReturn = NULL; - - vTaskSuspendAll(); - { - /* If this is the first call to malloc then the heap will require - initialisation to setup the list of free blocks. */ - if( xHeapHasBeenInitialised == pdFALSE ) - { - prvHeapInit(); - xHeapHasBeenInitialised = pdTRUE; - } - - /* The wanted size is increased so it can contain a xBlockLink - structure in addition to the requested amount of bytes. */ - if( xWantedSize > 0 ) - { - xWantedSize += heapSTRUCT_SIZE; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - if( xWantedSize & heapBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) ); - } - } - - if( ( xWantedSize > 0 ) && ( xWantedSize < configTOTAL_HEAP_SIZE ) ) - { - /* Blocks are stored in byte order - traverse the list from the start - (smallest) block until one of adequate size is found. */ - pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; - while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock ) ) - { - pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; - } - - /* If we found the end marker then a block of adequate size was not found. */ - if( pxBlock != &xEnd ) - { - /* Return the memory space - jumping over the xBlockLink structure - at its start. */ - pvReturn = ( void * ) ( ( ( unsigned portCHAR * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE ); - - /* This block is being returned for use so must be taken our of the - list of free blocks. */ - pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; - - /* If the block is larger than required it can be split into two. */ - if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) - { - /* This block is to be split into two. Create a new block - following the number of bytes requested. The void cast is - used to prevent byte alignment warnings from the compiler. */ - pxNewBlockLink = ( void * ) ( ( ( unsigned portCHAR * ) pxBlock ) + xWantedSize ); - - /* Calculate the sizes of two blocks split from the single - block. */ - pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; - - /* Insert the new block into the list of free blocks. */ - prvInsertBlockIntoFreeList( ( pxNewBlockLink ) ); - } - } - } - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ -unsigned portCHAR *puc = ( unsigned portCHAR * ) pv; -xBlockLink *pxLink; - - if( pv ) - { - /* The memory being freed will have an xBlockLink structure immediately - before it. */ - puc -= heapSTRUCT_SIZE; - - /* This casting is to keep the compiler from issuing warnings. */ - pxLink = ( void * ) puc; - - vTaskSuspendAll(); - { - /* Add this block to the list of free blocks. */ - prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) ); - } - xTaskResumeAll(); - } -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/MemMang/heap_3.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/MemMang/heap_3.c deleted file mode 100644 index 11a30231..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/portable/MemMang/heap_3.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - - -/* - * Implementation of pvPortMalloc() and vPortFree() that relies on the - * compilers own malloc() and free() implementations. - * - * This file can only be used if the linker is configured to to generate - * a heap memory area. - * - * See heap_2.c and heap_1.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ - -#include - -#include "FreeRTOS.h" -#include "task.h" - -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn; - - vTaskSuspendAll(); - { - pvReturn = malloc( xWantedSize ); - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - if( pv ) - { - vTaskSuspendAll(); - { - free( pv ); - } - xTaskResumeAll(); - } -} - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/queue.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/queue.c deleted file mode 100644 index 17d88dd5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/queue.c +++ /dev/null @@ -1,869 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.01 - - + More use of 8bit data types. - + Function name prefixes changed where the data type returned has changed. - -Changed from V2.0.0 - - + Added the queue locking mechanism and make more use of the scheduler - suspension feature to minimise the time interrupts have to be disabled - when accessing a queue. - -Changed from V2.2.0 - - + Explicit use of 'signed' qualifier on portCHAR types added. - -Changes from V3.0.0 - - + API changes as described on the FreeRTOS.org WEB site. - -Changes from V3.2.3 - - + Added the queue functions that can be used from co-routines. - -*/ - -#include -#include -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -/* Constants used with the cRxLock and cTxLock structure members. */ -#define queueUNLOCKED ( ( signed portBASE_TYPE ) -1 ) - -/* - * Definition of the queue used by the scheduler. - * Items are queued by copy, not reference. - */ -typedef struct QueueDefinition -{ - signed portCHAR *pcHead; /*< Points to the beginning of the queue storage area. */ - signed portCHAR *pcTail; /*< Points to the byte at the end of the queue storage area. Once more byte is allocated than necessary to store the queue items, this is used as a marker. */ - - signed portCHAR *pcWriteTo; /*< Points to the free next place in the storage area. */ - signed portCHAR *pcReadFrom; /*< Points to the last place that a queued item was read from. */ - - xList xTasksWaitingToSend; /*< List of tasks that are blocked waiting to post onto this queue. Stored in priority order. */ - xList xTasksWaitingToReceive; /*< List of tasks that are blocked waiting to read from this queue. Stored in priority order. */ - - unsigned portBASE_TYPE uxMessagesWaiting;/*< The number of items currently in the queue. */ - unsigned portBASE_TYPE uxLength; /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */ - unsigned portBASE_TYPE uxItemSize; /*< The size of each items that the queue will hold. */ - - signed portBASE_TYPE xRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ - signed portBASE_TYPE xTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ -} xQUEUE; -/*-----------------------------------------------------------*/ - -/* - * Inside this file xQueueHandle is a pointer to a xQUEUE structure. - * To keep the definition private the API header file defines it as a - * pointer to void. - */ -typedef xQUEUE * xQueueHandle; - -/* - * Prototypes for public functions are included here so we don't have to - * include the API header file (as it defines xQueueHandle differently). These - * functions are documented in the API header file. - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); -signed portBASE_TYPE xQueueSend( xQueueHandle xQueue, const void * pvItemToQueue, portTickType xTicksToWait ); -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue ); -void vQueueDelete( xQueueHandle xQueue ); -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ); -signed portBASE_TYPE xQueueReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - -#if configUSE_CO_ROUTINES == 1 - signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ); - signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ); - signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); -#endif - -/* - * Unlocks a queue locked by a call to prvLockQueue. Locking a queue does not - * prevent an ISR from adding or removing items to the queue, but does prevent - * an ISR from removing tasks from the queue event lists. If an ISR finds a - * queue is locked it will instead increment the appropriate queue lock count - * to indicate that a task may require unblocking. When the queue in unlocked - * these lock counts are inspected, and the appropriate action taken. - */ -static signed portBASE_TYPE prvUnlockQueue( xQueueHandle pxQueue ); - -/* - * Uses a critical section to determine if there is any data in a queue. - * - * @return pdTRUE if the queue contains no items, otherwise pdFALSE. - */ -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ); - -/* - * Uses a critical section to determine if there is any space in a queue. - * - * @return pdTRUE if there is no space, otherwise pdFALSE; - */ -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ); - -/* - * Macro that copies an item into the queue. This is done by copying the item - * byte for byte, not by reference. Updates the queue state to ensure it's - * integrity after the copy. - */ -#define prvCopyQueueData( pxQueue, pvItemToQueue ) \ -{ \ - memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( unsigned ) pxQueue->uxItemSize ); \ - ++( pxQueue->uxMessagesWaiting ); \ - pxQueue->pcWriteTo += pxQueue->uxItemSize; \ - if( pxQueue->pcWriteTo >= pxQueue->pcTail ) \ - { \ - pxQueue->pcWriteTo = pxQueue->pcHead; \ - } \ -} -/*-----------------------------------------------------------*/ - -/* - * Macro to mark a queue as locked. Locking a queue prevents an ISR from - * accessing the queue event lists. - */ -#define prvLockQueue( pxQueue ) \ -{ \ - taskENTER_CRITICAL(); \ - ++( pxQueue->xRxLock ); \ - ++( pxQueue->xTxLock ); \ - taskEXIT_CRITICAL(); \ -} -/*-----------------------------------------------------------*/ - - -/*----------------------------------------------------------- - * PUBLIC QUEUE MANAGEMENT API documented in queue.h - *----------------------------------------------------------*/ - -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ) -{ -xQUEUE *pxNewQueue; -size_t xQueueSizeInBytes; - - /* Allocate the new queue structure. */ - if( uxQueueLength > ( unsigned portBASE_TYPE ) 0 ) - { - pxNewQueue = ( xQUEUE * ) pvPortMalloc( sizeof( xQUEUE ) ); - if( pxNewQueue != NULL ) - { - /* Create the list of pointers to queue items. The queue is one byte - longer than asked for to make wrap checking easier/faster. */ - xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ) + ( size_t ) 1; - - pxNewQueue->pcHead = ( signed portCHAR * ) pvPortMalloc( xQueueSizeInBytes ); - if( pxNewQueue->pcHead != NULL ) - { - /* Initialise the queue members as described above where the - queue type is defined. */ - pxNewQueue->pcTail = pxNewQueue->pcHead + ( uxQueueLength * uxItemSize ); - pxNewQueue->uxMessagesWaiting = 0; - pxNewQueue->pcWriteTo = pxNewQueue->pcHead; - pxNewQueue->pcReadFrom = pxNewQueue->pcHead + ( ( uxQueueLength - 1 ) * uxItemSize ); - pxNewQueue->uxLength = uxQueueLength; - pxNewQueue->uxItemSize = uxItemSize; - pxNewQueue->xRxLock = queueUNLOCKED; - pxNewQueue->xTxLock = queueUNLOCKED; - - /* Likewise ensure the event queues start with the correct state. */ - vListInitialise( &( pxNewQueue->xTasksWaitingToSend ) ); - vListInitialise( &( pxNewQueue->xTasksWaitingToReceive ) ); - - return pxNewQueue; - } - else - { - vPortFree( pxNewQueue ); - } - } - } - - /* Will only reach here if we could not allocate enough memory or no memory - was required. */ - return NULL; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* Make sure other tasks do not access the queue. */ - vTaskSuspendAll(); - - /* It is important that this is the only thread/ISR that modifies the - ready or delayed lists until xTaskResumeAll() is called. Places where - the ready/delayed lists are modified include: - - + vTaskDelay() - Nothing can call vTaskDelay as the scheduler is - suspended, vTaskDelay() cannot be called from an ISR. - + vTaskPrioritySet() - Has a critical section around the access. - + vTaskSwitchContext() - This will not get executed while the scheduler - is suspended. - + prvCheckDelayedTasks() - This will not get executed while the - scheduler is suspended. - + xTaskCreate() - Has a critical section around the access. - + vTaskResume() - Has a critical section around the access. - + xTaskResumeAll() - Has a critical section around the access. - + xTaskRemoveFromEventList - Checks to see if the scheduler is - suspended. If so then the TCB being removed from the event is - removed from the event and added to the xPendingReadyList. - */ - - /* Make sure interrupts do not access the queue event list. */ - prvLockQueue( pxQueue ); - - /* It is important that interrupts to not access the event list of the - queue being modified here. Places where the event list is modified - include: - - + xQueueSendFromISR(). This checks the lock on the queue to see if - it has access. If the queue is locked then the Tx lock count is - incremented to signify that a task waiting for data can be made ready - once the queue lock is removed. If the queue is not locked then - a task can be moved from the event list, but will not be removed - from the delayed list or placed in the ready list until the scheduler - is unlocked. - - + xQueueReceiveFromISR(). As per xQueueSendFromISR(). - */ - - /* If the queue is already full we may have to block. */ - if( prvIsQueueFull( pxQueue ) ) - { - /* The queue is full - do we want to block or just leave without - posting? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* We are going to place ourselves on the xTasksWaitingToSend event - list, and will get woken should the delay expire, or space become - available on the queue. - - As detailed above we do not require mutual exclusion on the event - list as nothing else can modify it or the ready lists while we - have the scheduler suspended and queue locked. - - It is possible that an ISR has removed data from the queue since we - checked if any was available. If this is the case then the data - will have been copied from the queue, and the queue variables - updated, but the event list will not yet have been checked to see if - anything is waiting as the queue is locked. */ - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait ); - - /* Force a context switch now as we are blocked. We can do - this from within a critical section as the task we are - switching to has its own context. When we return here (i.e. we - unblock) we will leave the critical section as normal. - - It is possible that an ISR has caused an event on an unrelated and - unlocked queue. If this was the case then the event list for that - queue will have been updated but the ready lists left unchanged - - instead the readied task will have been added to the pending ready - list. */ - taskENTER_CRITICAL(); - { - /* We can safely unlock the queue and scheduler here as - interrupts are disabled. We must not yield with anything - locked, but we can yield from within a critical section. - - Tasks that have been placed on the pending ready list cannot - be tasks that are waiting for events on this queue. See - in comment xTaskRemoveFromEventList(). */ - prvUnlockQueue( pxQueue ); - - /* Resuming the scheduler may cause a yield. If so then there - is no point yielding again here. */ - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - - /* Before leaving the critical section we have to ensure - exclusive access again. */ - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - } - taskEXIT_CRITICAL(); - } - } - - /* When we are here it is possible that we unblocked as space became - available on the queue. It is also possible that an ISR posted to the - queue since we left the critical section, so it may be that again there - is no space. This would only happen if a task and ISR post onto the - same queue. */ - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - /* There is room in the queue, copy the data into the queue. */ - prvCopyQueueData( pxQueue, pvItemToQueue ); - xReturn = pdPASS; - - /* Update the TxLock count so prvUnlockQueue knows to check for - tasks waiting for data to become available in the queue. */ - ++( pxQueue->xTxLock ); - } - else - { - xReturn = errQUEUE_FULL; - } - } - taskEXIT_CRITICAL(); - - /* We no longer require exclusive access to the queue. prvUnlockQueue - will remove any tasks suspended on a receive if either this function - or an ISR has posted onto the queue. */ - if( prvUnlockQueue( pxQueue ) ) - { - /* Resume the scheduler - making ready any tasks that were woken - by an event while the scheduler was locked. Resuming the - scheduler may cause a yield, in which case there is no point - yielding again here. */ - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - } - else - { - /* Resume the scheduler - making ready any tasks that were woken - by an event while the scheduler was locked. */ - xTaskResumeAll(); - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ) -{ - /* Similar to xQueueSend, except we don't block if there is no room in the - queue. Also we don't directly wake a task that was blocked on a queue - read, instead we return a flag to say whether a context switch is required - or not (i.e. has a task with a higher priority than us been woken by this - post). */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - prvCopyQueueData( pxQueue, pvItemToQueue ); - - /* If the queue is locked we do not alter the event list. This will - be done when the queue is unlocked later. */ - if( pxQueue->xTxLock == queueUNLOCKED ) - { - /* We only want to wake one task per ISR, so check that a task has - not already been woken. */ - if( !xTaskPreviouslyWoken ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - return pdTRUE; - } - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was posted while it was locked. */ - ++( pxQueue->xTxLock ); - } - } - - return xTaskPreviouslyWoken; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* This function is very similar to xQueueSend(). See comments within - xQueueSend() for a more detailed explanation. - - Make sure other tasks do not access the queue. */ - vTaskSuspendAll(); - - /* Make sure interrupts do not access the queue. */ - prvLockQueue( pxQueue ); - - /* If there are no messages in the queue we may have to block. */ - if( prvIsQueueEmpty( pxQueue ) ) - { - /* There are no messages in the queue, do we want to block or just - leave with nothing? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); - taskENTER_CRITICAL(); - { - prvUnlockQueue( pxQueue ); - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - } - taskEXIT_CRITICAL(); - } - } - - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - /* Increment the lock count so prvUnlockQueue knows to check for - tasks waiting for space to become available on the queue. */ - ++( pxQueue->xRxLock ); - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - } - taskEXIT_CRITICAL(); - - /* We no longer require exclusive access to the queue. */ - if( prvUnlockQueue( pxQueue ) ) - { - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - } - else - { - xTaskResumeAll(); - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ) -{ -signed portBASE_TYPE xReturn; - - /* We cannot block from an ISR, so check there is data available. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Copy the data from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - /* If the queue is locked we will not modify the event list. Instead - we update the lock count so the task that unlocks the queue will know - that an ISR has removed data while the queue was locked. */ - if( pxQueue->xRxLock == queueUNLOCKED ) - { - /* We only want to wake one task per ISR, so check that a task has - not already been woken. */ - if( !( *pxTaskWoken ) ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - /* The task waiting has a higher priority than us so - force a context switch. */ - *pxTaskWoken = pdTRUE; - } - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was removed while it was locked. */ - ++( pxQueue->xRxLock ); - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue ) -{ -unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - uxReturn = pxQueue->uxMessagesWaiting; - taskEXIT_CRITICAL(); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -void vQueueDelete( xQueueHandle pxQueue ) -{ - vPortFree( pxQueue->pcHead ); - vPortFree( pxQueue ); -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvUnlockQueue( xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xYieldRequired = pdFALSE; - - /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */ - - /* The lock counts contains the number of extra data items placed or - removed from the queue while the queue was locked. When a queue is - locked items can be added or removed, but the event lists cannot be - updated. */ - taskENTER_CRITICAL(); - { - --( pxQueue->xTxLock ); - - /* See if data was added to the queue while it was locked. */ - if( pxQueue->xTxLock > queueUNLOCKED ) - { - pxQueue->xTxLock = queueUNLOCKED; - - /* Data was posted while the queue was locked. Are any tasks - blocked waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* Tasks that are removed from the event list will get added to - the pending ready list as the scheduler is still suspended. */ - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - xYieldRequired = pdTRUE; - } - } - } - } - taskEXIT_CRITICAL(); - - /* Do the same for the Rx lock. */ - taskENTER_CRITICAL(); - { - --( pxQueue->xRxLock ); - - if( pxQueue->xRxLock > queueUNLOCKED ) - { - pxQueue->xRxLock = queueUNLOCKED; - - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - xYieldRequired = pdTRUE; - } - } - } - } - taskEXIT_CRITICAL(); - - return xYieldRequired; -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == pxQueue->uxLength ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* If the queue is already full we may have to block. A critical section - is required to prevent an interrupt removing something from the queue - between the check to see if the queue is full and blocking on the queue. */ - portDISABLE_INTERRUPTS(); - { - if( prvIsQueueFull( pxQueue ) ) - { - /* The queue is full - do we want to block or just leave without - posting? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* As this is called from a coroutine we cannot block directly, but - return indicating that we need to block. */ - vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) ); - portENABLE_INTERRUPTS(); - return errQUEUE_BLOCKED; - } - else - { - portENABLE_INTERRUPTS(); - return errQUEUE_FULL; - } - } - } - portENABLE_INTERRUPTS(); - - portNOP(); - - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - /* There is room in the queue, copy the data into the queue. */ - prvCopyQueueData( pxQueue, pvItemToQueue ); - xReturn = pdPASS; - - /* Were any co-routines waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* In this instance the co-routine could be placed directly - into the ready list as we are within a critical section. - Instead the same pending ready list mechansim is used as if - the event were caused from within an interrupt. */ - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The co-routine waiting has a higher priority so record - that a yield might be appropriate. */ - xReturn = errQUEUE_YIELD; - } - } - } - else - { - xReturn = errQUEUE_FULL; - } - } - portENABLE_INTERRUPTS(); - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* If the queue is already empty we may have to block. A critical section - is required to prevent an interrupt adding something to the queue - between the check to see if the queue is empty and blocking on the queue. */ - portDISABLE_INTERRUPTS(); - { - if( prvIsQueueEmpty( pxQueue ) ) - { - /* There are no messages in the queue, do we want to block or just - leave with nothing? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* As this is a co-routine we cannot block directly, but return - indicating that we need to block. */ - vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) ); - portENABLE_INTERRUPTS(); - return errQUEUE_BLOCKED; - } - else - { - portENABLE_INTERRUPTS(); - return errQUEUE_FULL; - } - } - } - portENABLE_INTERRUPTS(); - - portNOP(); - - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Data is available from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - xReturn = pdPASS; - - /* Were any co-routines waiting for space to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - /* In this instance the co-routine could be placed directly - into the ready list as we are within a critical section. - Instead the same pending ready list mechansim is used as if - the event were caused from within an interrupt. */ - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - xReturn = errQUEUE_YIELD; - } - } - } - else - { - xReturn = pdFAIL; - } - } - portENABLE_INTERRUPTS(); - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - - - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ) -{ - /* Cannot block within an ISR so if there is no space on the queue then - exit without doing anything. */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - prvCopyQueueData( pxQueue, pvItemToQueue ); - - /* We only want to wake one co-routine per ISR, so check that a - co-routine has not already been woken. */ - if( !xCoRoutinePreviouslyWoken ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - return pdTRUE; - } - } - } - } - - return xCoRoutinePreviouslyWoken; -} -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxCoRoutineWoken ) -{ -signed portBASE_TYPE xReturn; - - /* We cannot block from an ISR, so check there is data available. If - not then just leave without doing anything. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Copy the data from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - if( !( *pxCoRoutineWoken ) ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - *pxCoRoutineWoken = pdTRUE; - } - } - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/tasks.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/tasks.c deleted file mode 100644 index 83a2d573..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/freertos/tasks.c +++ /dev/null @@ -1,1771 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.00: - - + Call to portRESTORE_CONTEXT has been removed. The first context - switch is now performed within sPortStartScheduler(). - -Changes from V1.01: - - + More use of 8bit data types. - + Function name prefixes changed where the data type returned has changed. - + configUSE_TRACE_FACILITY is no longer defined by default. - -Changes from V1.2.0 - - + Introduced ucTopReadyPriority. This tracks the highest priority ready - queue that contains a valid TCB and thus makes the context switch - slightly faster. - - + prvAddTaskToReadyQueue() has been made a macro. - -Changes from V1.2.6 - - + Added conditional compilation directives. - + Extended API. - + Rearranged function order. - + Creating a task now causes a context switch if the task being created - has a higher priority than the calling task - assuming the kernel is - running. - + vTaskDelete() now only causes a context switch if the calling task is - the task being deleted. - -Changes from V2.0.0 - - + Allow the type of the tick count to be 16 or 32 bits. - + Introduce xPendingReadyList feature to allow the time interrupts have to - be disabled to be minimised. - + Remove the #if( INCLUDE_vTaskSuspendAll ) statements. vTaskSuspendAll() - is now always included as it is used by the scheduler itself. - -Changes from V2.1.0 - - + Bug fix - pxCurrentTCB is now initialised before the call to - prvInitializeTaskLists(). Previously pxCurrentTCB could be accessed - while null. - -Changed from V2.1.1 - - + Change to where lStackSize is declared within sTaskCreate() to prevent - compiler warnings with 8051 port. - -Changes from V2.2.0 - - + Explicit use of 'signed' qualifier on portCHAR types added. - + Changed odd calculation of initial pxTopOfStack value when - portSTACK_GROWTH < 0. - + Removed pcVersionNumber definition. - -Changes from V2.5.3 - - + cTaskResumeAll() modified to ensure it can be called prior to the task - lists being initialised. - -Changes from V2.5.5 - - + Added API function vTaskDelayUntil(). - + Added INCLUDE_vTaskDelay conditional compilation. - -Changes from V2.6.0 - - + Updated the vWriteTraceToBuffer macro to always be 4 byte aligned so it - can be used on ARM architectures. - + tskMAX_TASK_NAME_LEN definition replaced with the port specific - configMAX_TASK_NAME_LEN definition. - + Removed the call to strcpy when copying across the task name into the - TCB. - + Added ucTasksDeleted variable to prevent vTaskSuspendAll() being called - too often in the idle task. - -Changes between V3.0.0 and V2.6.1 - - + When resuming the scheduler a yield is performed if either a tick has - been missed, or a task is moved from the pending ready list into a ready - list. Previously a yield was not performed on this second condition. - + Introduced the type portBASE_TYPE. This necessitates several API - changes. - + Removed the sUsingPreemption variable. The constant defined in - portmacro.h is now used directly. - + The idle task can now include an optional hook function - and no longer - completes its time slice if other tasks with equal priority to it are - ready to run. - + See the FreeRTOS.org documentation for more information on V2.x.x to - V3.x.x modifications. - -Changes from V3.1.1 - - + Modified vTaskPrioritySet() and vTaskResume() to allow these functions to - be called while the scheduler is suspended. - + Corrected the task ordering within event lists. - -Changes from V3.2.0 - - + Added function xTaskGetCurrentTaskHandle(). - -Changes from V3.2.4 - - + Changed the volatile declarations on some variables to reflect the - changes to the list definitions. - + Changed the order of the TCB definition so there is commonality between - the task control block and a co-routine control block. - + Allow the scheduler to be started even if no tasks other than the idle - task has been created. This allows co-routines to run even when no tasks - have been created. - + The need for a context switch is now signalled if a task woken by an - event has a priority greater or equal to the currently running task. - Previously this was only greater than. - -Changes from V4.0.0 - - + Added the xMissedYield handling. - -Changes from V4.0.1 - - + The function vTaskList() now suspends the scheduler rather than disabling - interrupts during the creation of the task list. - + Allow a task to delete itself by passing in its own handle. Previously - this could only be done by passing in NULL. - + The tick hook function is now called only within a tick isr. Previously - it was also called when the tick function was called during the scheduler - unlocking process. - -Changes from V4.0.3 - - + Extra checks have been placed in vTaskPrioritySet() to avoid unnecessary - yields. - -Changed from V4.0.4 - - + Bug fix: The 'value' of the event list item is updated when the priority - of a task is changed. Previously only the priority of the TCB itself was - changed. - + When resuming a task a check is first made to see if the task is actually - suspended. - + vTaskPrioritySet() and vTaskResume() no longer use the event list item. - This has not been necessary since V4.0.1 when the xMissedYield handling - was added. - + Implement xTaskResumeFromISR(). -*/ - -#include -#include -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* - * Macro to define the amount of stack available to the idle task. - */ -#define tskIDLE_STACK_SIZE configMINIMAL_STACK_SIZE - - -/* - * Default a definitions for backwards compatibility with old - * portmacro.h files. - */ -#ifndef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 16 -#endif - -#ifndef INCLUDE_xTaskGetCurrentTaskHandle - #define INCLUDE_xTaskGetCurrentTaskHandle 0 -#endif - -#ifndef configIDLE_SHOULD_YIELD - #define configIDLE_SHOULD_YIELD 1 -#endif - -#if configMAX_TASK_NAME_LEN < 1 - #undef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 1 -#endif - -#ifndef INCLUDE_xTaskResumeFromISR - #define INCLUDE_xTaskResumeFromISR 1 -#endif - -/* - * Task control block. A task control block (TCB) is allocated to each task, - * and stores the context of the task. - */ -typedef struct tskTaskControlBlock -{ - volatile portSTACK_TYPE *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE STRUCT. */ - xListItem xGenericListItem; /*< List item used to place the TCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the TCB in event lists. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the task where 0 is the lowest priority. */ - portSTACK_TYPE *pxStack; /*< Points to the start of the stack. */ - unsigned portBASE_TYPE uxTCBNumber; /*< This is used for tracing the scheduler and making debugging easier only. */ - signed portCHAR pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */ - unsigned portSHORT usStackDepth; /*< Total depth of the stack (when empty). This is defined as the number of variables the stack can hold, not the number of bytes. */ -} tskTCB; - -/*lint -e956 */ - -tskTCB * volatile pxCurrentTCB = NULL; - -/* Lists for ready and blocked tasks. --------------------*/ - -static xList pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */ -static xList xDelayedTaskList1; /*< Delayed tasks. */ -static xList xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */ -static xList * volatile pxDelayedTaskList; /*< Points to the delayed task list currently being used. */ -static xList * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */ -static xList xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready queue when the scheduler is resumed. */ - -#if ( INCLUDE_vTaskDelete == 1 ) - - static volatile xList xTasksWaitingTermination; /*< Tasks that have been deleted - but the their memory not yet freed. */ - static volatile unsigned portBASE_TYPE uxTasksDeleted = ( unsigned portBASE_TYPE ) 0; - -#endif - -#if ( INCLUDE_vTaskSuspend == 1 ) - - static xList xSuspendedTaskList; /*< Tasks that are currently suspended. */ - -#endif - -/* File private variables. --------------------------------*/ -static volatile unsigned portBASE_TYPE uxCurrentNumberOfTasks = ( unsigned portBASE_TYPE ) 0; -static volatile portTickType xTickCount = ( portTickType ) 0; -static unsigned portBASE_TYPE uxTopUsedPriority = tskIDLE_PRIORITY; -static volatile unsigned portBASE_TYPE uxTopReadyPriority = tskIDLE_PRIORITY; -static volatile signed portBASE_TYPE xSchedulerRunning = pdFALSE; -static volatile unsigned portBASE_TYPE uxSchedulerSuspended = ( unsigned portBASE_TYPE ) pdFALSE; -static volatile unsigned portBASE_TYPE uxMissedTicks = ( unsigned portBASE_TYPE ) 0; -static volatile portBASE_TYPE xMissedYield = ( portBASE_TYPE ) pdFALSE; - -/* Debugging and trace facilities private variables and macros. ------------*/ - -/* - * The value used to fill the stack of a task when the task is created. This - * is used purely for checking the high water mark for tasks. - */ -#define tskSTACK_FILL_BYTE ( 0xa5 ) - -/* - * Macros used by vListTask to indicate which state a task is in. - */ -#define tskBLOCKED_CHAR ( ( signed portCHAR ) 'B' ) -#define tskREADY_CHAR ( ( signed portCHAR ) 'R' ) -#define tskDELETED_CHAR ( ( signed portCHAR ) 'D' ) -#define tskSUSPENDED_CHAR ( ( signed portCHAR ) 'S' ) - -/* - * Macros and private variables used by the trace facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define tskSIZE_OF_EACH_TRACE_LINE ( ( unsigned portLONG ) ( sizeof( unsigned portLONG ) + sizeof( unsigned portLONG ) ) ) - static volatile signed portCHAR * volatile pcTraceBuffer; - static signed portCHAR *pcTraceBufferStart; - static signed portCHAR *pcTraceBufferEnd; - static signed portBASE_TYPE xTracing = pdFALSE; - -#endif - -/* - * Macro that writes a trace of scheduler activity to a buffer. This trace - * shows which task is running when and is very useful as a debugging tool. - * As this macro is called each context switch it is a good idea to undefine - * it if not using the facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define vWriteTraceToBuffer() \ - { \ - if( xTracing ) \ - { \ - static unsigned portBASE_TYPE uxPreviousTask = 255; \ - \ - if( uxPreviousTask != pxCurrentTCB->uxTCBNumber ) \ - { \ - if( ( pcTraceBuffer + tskSIZE_OF_EACH_TRACE_LINE ) < pcTraceBufferEnd ) \ - { \ - uxPreviousTask = pxCurrentTCB->uxTCBNumber; \ - *( unsigned portLONG * ) pcTraceBuffer = ( unsigned portLONG ) xTickCount; \ - pcTraceBuffer += sizeof( unsigned portLONG ); \ - *( unsigned portLONG * ) pcTraceBuffer = ( unsigned portLONG ) uxPreviousTask; \ - pcTraceBuffer += sizeof( unsigned portLONG ); \ - } \ - else \ - { \ - xTracing = pdFALSE; \ - } \ - } \ - } \ - } - -#else - - #define vWriteTraceToBuffer() - -#endif - - -/* - * Place the task represented by pxTCB into the appropriate ready queue for - * the task. It is inserted at the end of the list. One quirk of this is - * that if the task being inserted is at the same priority as the currently - * executing task, then it will only be rescheduled after the currently - * executing task has been rescheduled. - */ -#define prvAddTaskToReadyQueue( pxTCB ) \ -{ \ - if( pxTCB->uxPriority > uxTopReadyPriority ) \ - { \ - uxTopReadyPriority = pxTCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyTasksLists[ pxTCB->uxPriority ] ), &( pxTCB->xGenericListItem ) ); \ -} - -/* - * Macro that looks at the list of tasks that are currently delayed to see if - * any require waking. - * - * Tasks are stored in the queue in the order of their wake time - meaning - * once one tasks has been found whose timer has not expired we need not look - * any further down the list. - */ -#define prvCheckDelayedTasks() \ -{ \ -register tskTCB *pxTCB; \ - \ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ) ) != NULL ) \ - { \ - if( xTickCount < listGET_LIST_ITEM_VALUE( &( pxTCB->xGenericListItem ) ) ) \ - { \ - break; \ - } \ - vListRemove( &( pxTCB->xGenericListItem ) ); \ - /* Is the task waiting on an event also? */ \ - if( pxTCB->xEventListItem.pvContainer ) \ - { \ - vListRemove( &( pxTCB->xEventListItem ) ); \ - } \ - prvAddTaskToReadyQueue( pxTCB ); \ - } \ -} - -/* - * Several functions take an xTaskHandle parameter that can optionally be NULL, - * where NULL is used to indicate that the handle of the currently executing - * task should be used in place of the parameter. This macro simply checks to - * see if the parameter is NULL and returns a pointer to the appropriate TCB. - */ -#define prvGetTCBFromHandle( pxHandle ) ( ( pxHandle == NULL ) ? ( tskTCB * ) pxCurrentTCB : ( tskTCB * ) pxHandle ) - - -/* File private functions. --------------------------------*/ - -/* - * Utility to ready a TCB for a given task. Mainly just copies the parameters - * into the TCB structure. - */ -static void prvInitialiseTCBVariables( tskTCB *pxTCB, unsigned portSHORT usStackDepth, const signed portCHAR * const pcName, unsigned portBASE_TYPE uxPriority ); - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first task. - */ -static void prvInitialiseTaskLists( void ); - -/* - * The idle task, which as all tasks is implemented as a never ending loop. - * The idle task is automatically created and added to the ready lists upon - * creation of the first user task. - * - * The portTASK_FUNCTION_PROTO() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters ); - -/* - * Utility to free all memory allocated by the scheduler to hold a TCB, - * including the stack pointed to by the TCB. - * - * This does not free memory allocated by the task itself (i.e. memory - * allocated by calls to pvPortMalloc from within the tasks application code). - */ -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - static void prvDeleteTCB( tskTCB *pxTCB ); -#endif - -/* - * Used only by the idle task. This checks to see if anything has been placed - * in the list of tasks waiting to be deleted. If so the task is cleaned up - * and its TCB deleted. - */ -static void prvCheckTasksWaitingTermination( void ); - -/* - * Allocates memory from the heap for a TCB and associated stack. Checks the - * allocation was successful. - */ -static tskTCB *prvAllocateTCBAndStack( unsigned portSHORT usStackDepth ); - -/* - * Called from vTaskList. vListTasks details all the tasks currently under - * control of the scheduler. The tasks may be in one of a number of lists. - * prvListTaskWithinSingleList accepts a list and details the tasks from - * within just that list. - * - * THIS FUNCTION IS INTENDED FOR DEBUGGING ONLY, AND SHOULD NOT BE CALLED FROM - * NORMAL APPLICATION CODE. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( signed portCHAR *pcWriteBuffer, xList *pxList, signed portCHAR cStatus ); - -#endif - -/* - * When a task is created, the stack of the task is filled with a known value. - * This function determines the 'high water mark' of the task stack by - * determining how much of the stack remains at the original preset value. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned portSHORT usTaskCheckFreeStackSpace( const unsigned portCHAR *pucStackByte ); - -#endif - -/*lint +e956 */ - - - - - -/*----------------------------------------------------------- - * TASK CREATION API documented in task.h - *----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask ) -{ -signed portBASE_TYPE xReturn; -tskTCB * pxNewTCB; -static unsigned portBASE_TYPE uxTaskNumber = 0; /*lint !e956 Static is deliberate - this is guarded before use. */ - - /* Allocate the memory required by the TCB and stack for the new task. - checking that the allocation was successful. */ - pxNewTCB = prvAllocateTCBAndStack( usStackDepth ); - - if( pxNewTCB != NULL ) - { - portSTACK_TYPE *pxTopOfStack; - - /* Setup the newly allocated TCB with the initial state of the task. */ - prvInitialiseTCBVariables( pxNewTCB, usStackDepth, pcName, uxPriority ); - - /* Calculate the top of stack address. This depends on whether the - stack grows from high memory to low (as per the 80x86) or visa versa. - portSTACK_GROWTH is used to make the result positive or negative as - required by the port. */ - #if portSTACK_GROWTH < 0 - { - pxTopOfStack = pxNewTCB->pxStack + ( pxNewTCB->usStackDepth - 1 ); - } - #else - { - pxTopOfStack = pxNewTCB->pxStack; - } - #endif - - /* Initialize the TCB stack to look as if the task was already running, - but had been interrupted by the scheduler. The return address is set - to the start of the task function. Once the stack has been initialised - the top of stack variable is updated. */ - pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pvTaskCode, pvParameters ); - - /* We are going to manipulate the task queues to add this task to a - ready list, so must make sure no interrupts occur. */ - portENTER_CRITICAL(); - { - uxCurrentNumberOfTasks++; - if( uxCurrentNumberOfTasks == ( unsigned portBASE_TYPE ) 1 ) - { - /* As this is the first task it must also be the current task. */ - pxCurrentTCB = pxNewTCB; - - /* This is the first task to be created so do the preliminary - initialisation required. We will not recover if this call - fails, but we will report the failure. */ - prvInitialiseTaskLists(); - } - else - { - /* If the scheduler is not already running, make this task the - current task if it is the highest priority task to be created - so far. */ - if( xSchedulerRunning == pdFALSE ) - { - if( pxCurrentTCB->uxPriority <= uxPriority ) - { - pxCurrentTCB = pxNewTCB; - } - } - } - - /* Remember the top priority to make context switching faster. Use - the priority in pxNewTCB as this has been capped to a valid value. */ - if( pxNewTCB->uxPriority > uxTopUsedPriority ) - { - uxTopUsedPriority = pxNewTCB->uxPriority; - } - - /* Add a counter into the TCB for tracing only. */ - pxNewTCB->uxTCBNumber = uxTaskNumber; - uxTaskNumber++; - - prvAddTaskToReadyQueue( pxNewTCB ); - - xReturn = pdPASS; - } - portEXIT_CRITICAL(); - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - if( xReturn == pdPASS ) - { - if( ( void * ) pxCreatedTask != NULL ) - { - /* Pass the TCB out - in an anonymous way. The calling function/ - task can use this as a handle to delete the task later if - required.*/ - *pxCreatedTask = ( xTaskHandle ) pxNewTCB; - } - - if( xSchedulerRunning != pdFALSE ) - { - /* If the created task is of a higher priority than the current task - then it should run now. */ - if( pxCurrentTCB->uxPriority < uxPriority ) - { - taskYIELD(); - } - } - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelete == 1 ) - - void vTaskDelete( xTaskHandle pxTaskToDelete ) - { - tskTCB *pxTCB; - - taskENTER_CRITICAL(); - { - /* Ensure a yield is performed if the current task is being - deleted. */ - if( pxTaskToDelete == pxCurrentTCB ) - { - pxTaskToDelete = NULL; - } - - /* If null is passed in here then we are deleting ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToDelete ); - - /* Remove task from the ready list and place in the termination list. - This will stop the task from be scheduled. The idle task will check - the termination list and free up any memory allocated by the - scheduler for the TCB and stack. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xTasksWaitingTermination, &( pxTCB->xGenericListItem ) ); - - /* Increment the ucTasksDeleted variable so the idle task knows - there is a task that has been deleted and that it should therefore - check the xTasksWaitingTermination list. */ - ++uxTasksDeleted; - } - taskEXIT_CRITICAL(); - - /* Force a reschedule if we have just deleted the current task. */ - if( xSchedulerRunning != pdFALSE ) - { - if( ( void * ) pxTaskToDelete == NULL ) - { - taskYIELD(); - } - } - } - -#endif - - - - - - -/*----------------------------------------------------------- - * TASK CONTROL API documented in task.h - *----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelayUntil == 1 ) - - void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement ) - { - portTickType xTimeToWake; - portBASE_TYPE xAlreadyYielded, xShouldDelay = pdFALSE; - - vTaskSuspendAll(); - { - /* Generate the tick time at which the task wants to wake. */ - xTimeToWake = *pxPreviousWakeTime + xTimeIncrement; - - if( xTickCount < *pxPreviousWakeTime ) - { - /* The tick count has overflowed since this function was - lasted called. In this case the only time we should ever - actually delay is if the wake time has also overflowed, - and the wake time is greater than the tick time. When this - is the case it is as if neither time had overflowed. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - else - { - /* The tick time has not overflowed. In this case we will - delay if either the wake time has overflowed, and/or the - tick time is less than the wake time. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - - /* Update the wake time ready for the next call. */ - *pxPreviousWakeTime = xTimeToWake; - - if( xShouldDelay ) - { - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - } - xAlreadyYielded = xTaskResumeAll(); - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelay == 1 ) - - void vTaskDelay( portTickType xTicksToDelay ) - { - portTickType xTimeToWake; - signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* A delay time of zero just forces a reschedule. */ - if( xTicksToDelay > ( portTickType ) 0 ) - { - vTaskSuspendAll(); - { - /* A task that is removed from the event list while the - scheduler is suspended will not get placed in the ready - list or removed from the blocked list until the scheduler - is resumed. - - This task cannot be in an event list as it is the currently - executing task. */ - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - xAlreadyYielded = xTaskResumeAll(); - } - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_uxTaskPriorityGet == 1 ) - - unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxReturn = pxTCB->uxPriority; - } - taskEXIT_CRITICAL(); - - return uxReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskPrioritySet == 1 ) - - void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxCurrentPriority, xYieldRequired = pdFALSE; - - /* Ensure the new priority is valid. */ - if( uxNewPriority >= configMAX_PRIORITIES ) - { - uxNewPriority = configMAX_PRIORITIES - 1; - } - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxCurrentPriority = pxTCB->uxPriority; - - if( uxCurrentPriority != uxNewPriority ) - { - /* The priority change may have readied a task of higher - priority than the calling task. */ - if( uxNewPriority > pxCurrentTCB->uxPriority ) - { - if( pxTask != NULL ) - { - /* The priority of another task is being raised. If we - were raising the priority of the currently running task - there would be no need to switch as it must have already - been the highest priority task. */ - xYieldRequired = pdTRUE; - } - } - else if( pxTask == NULL ) - { - /* Setting our own priority down means there may now be another - task of higher priority that is ready to execute. */ - xYieldRequired = pdTRUE; - } - - pxTCB->uxPriority = uxNewPriority; - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxNewPriority ); - - /* If the task is in the blocked or suspended list we need do - nothing more than change it's priority variable. However, if - the task is in a ready list it needs to be removed and placed - in the queue appropriate to its new priority. */ - if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxCurrentPriority ] ), &( pxTCB->xGenericListItem ) ) ) - { - /* The task is currently in its ready list - remove before adding - it to it's new ready list. As we are in a critical section we - can do this even if the scheduler is suspended. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - - if( xYieldRequired == pdTRUE ) - { - taskYIELD(); - } - } - } - taskEXIT_CRITICAL(); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskSuspend( xTaskHandle pxTaskToSuspend ) - { - tskTCB *pxTCB; - - taskENTER_CRITICAL(); - { - /* Ensure a yield is performed if the current task is being - suspended. */ - if( pxTaskToSuspend == pxCurrentTCB ) - { - pxTaskToSuspend = NULL; - } - - /* If null is passed in here then we are suspending ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToSuspend ); - - /* Remove task from the ready/delayed list and place in the suspended list. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ); - } - taskEXIT_CRITICAL(); - - /* We may have just suspended the current task. */ - if( ( void * ) pxTaskToSuspend == NULL ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskResume( xTaskHandle pxTaskToResume ) - { - tskTCB *pxTCB; - - /* Remove the task from whichever list it is currently in, and place - it in the ready list. */ - pxTCB = ( tskTCB * ) pxTaskToResume; - - /* The parameter cannot be NULL as it is impossible to resume the - currently executing task. */ - if( pxTCB != NULL ) - { - taskENTER_CRITICAL(); - { - /* Is the task we are attempting to resume actually suspended? */ - if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ) != pdFALSE ) - { - /* Has the task already been resumed from within an ISR? */ - if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) != pdTRUE ) - { - /* As we are in a critical section we can access the ready - lists even if the scheduler is suspended. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* We may have just resumed a higher priority task. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - /* This yield may not cause the task just resumed to run, but - will leave the lists in the correct state for the next yield. */ - taskYIELD(); - } - } - } - } - taskEXIT_CRITICAL(); - } - } - -#endif - -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - tskTCB *pxTCB; - - pxTCB = ( tskTCB * ) pxTaskToResume; - - /* Is the task we are attempting to resume actually suspended? */ - if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ) != pdFALSE ) - { - /* Has the task already been resumed from within an ISR? */ - if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) != pdTRUE ) - { - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - xYieldRequired = ( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed, at which point a - yield will be preformed if necessary. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxTCB->xEventListItem ) ); - } - } - } - - return xYieldRequired; - } - -#endif - - - - -/*----------------------------------------------------------- - * PUBLIC SCHEDULER CONTROL documented in task.h - *----------------------------------------------------------*/ - - -void vTaskStartScheduler( void ) -{ -portBASE_TYPE xReturn; - - /* Add the idle task at the lowest priority. */ - xReturn = xTaskCreate( prvIdleTask, ( signed portCHAR * ) "IDLE", tskIDLE_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, ( xTaskHandle * ) NULL ); - - if( xReturn == pdPASS ) - { - /* Interrupts are turned off here, to ensure a tick does not occur - before or during the call to xPortStartScheduler(). The stacks of - the created tasks contain a status word with interrupts switched on - so interrupts will automatically get re-enabled when the first task - starts to run. - - STEPPING THROUGH HERE USING A DEBUGGER CAN CAUSE BIG PROBLEMS IF THE - DEBUGGER ALLOWS INTERRUPTS TO BE PROCESSED. */ - portDISABLE_INTERRUPTS(); - - xSchedulerRunning = pdTRUE; - xTickCount = ( portTickType ) 0; - - /* Setting up the timer tick is hardware specific and thus in the - portable interface. */ - if( xPortStartScheduler() ) - { - /* Should not reach here as if the scheduler is running the - function will not return. */ - } - else - { - /* Should only reach here if a task calls xTaskEndScheduler(). */ - } - } -} -/*-----------------------------------------------------------*/ - -void vTaskEndScheduler( void ) -{ - /* Stop the scheduler interrupts and call the portable scheduler end - routine so the original ISRs can be restored if necessary. The port - layer must ensure interrupts enable bit is left in the correct state. */ - portDISABLE_INTERRUPTS(); - xSchedulerRunning = pdFALSE; - vPortEndScheduler(); -} -/*----------------------------------------------------------*/ - -void vTaskSuspendAll( void ) -{ - portENTER_CRITICAL(); - ++uxSchedulerSuspended; - portEXIT_CRITICAL(); -} -/*----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskResumeAll( void ) -{ -register tskTCB *pxTCB; -signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* It is possible that an ISR caused a task to be removed from an event - list while the scheduler was suspended. If this was the case then the - removed task will have been added to the xPendingReadyList. Once the - scheduler has been resumed it is safe to move all the pending ready - tasks from this list into their appropriate ready list. */ - portENTER_CRITICAL(); - { - --uxSchedulerSuspended; - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - if( uxCurrentNumberOfTasks > ( unsigned portBASE_TYPE ) 0 ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - - /* Move any readied tasks from the pending list into the - appropriate ready list. */ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xPendingReadyList ) ) ) != NULL ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* If we have moved a task that has a priority higher than - the current task then we should yield. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - xYieldRequired = pdTRUE; - } - } - - /* If any ticks occurred while the scheduler was suspended then - they should be processed now. This ensures the tick count does not - slip, and that any delayed tasks are resumed at the correct time. */ - if( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - while( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskIncrementTick(); - --uxMissedTicks; - } - - /* As we have processed some ticks it is appropriate to yield - to ensure the highest priority task that is ready to run is - the task actually running. */ - xYieldRequired = pdTRUE; - } - - if( ( xYieldRequired == pdTRUE ) || ( xMissedYield == pdTRUE ) ) - { - xAlreadyYielded = pdTRUE; - xMissedYield = pdFALSE; - taskYIELD(); - } - } - } - } - portEXIT_CRITICAL(); - - return xAlreadyYielded; -} - - - - - - -/*----------------------------------------------------------- - * PUBLIC TASK UTILITIES documented in task.h - *----------------------------------------------------------*/ - - - -portTickType xTaskGetTickCount( void ) -{ -portTickType xTicks; - - /* Critical section required if running on a 16 bit processor. */ - taskENTER_CRITICAL(); - { - xTicks = xTickCount; - } - taskEXIT_CRITICAL(); - - return xTicks; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ) -{ -unsigned portBASE_TYPE uxNumberOfTasks; - - taskENTER_CRITICAL(); - uxNumberOfTasks = uxCurrentNumberOfTasks; - taskEXIT_CRITICAL(); - - return uxNumberOfTasks; -} -/*-----------------------------------------------------------*/ - -#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_vTaskDelete == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskList( signed portCHAR *pcWriteBuffer ) - { - unsigned portBASE_TYPE uxQueue; - - /* This is a VERY costly function that should be used for debug only. - It leaves interrupts disabled for a LONG time. */ - - vTaskSuspendAll(); - { - /* Run through all the lists that could potentially contain a TCB and - report the task name, state and stack high water mark. */ - - pcWriteBuffer[ 0 ] = ( signed portCHAR ) 0x00; - strcat( ( portCHAR * ) pcWriteBuffer, ( const portCHAR * ) "\r\n" ); - - uxQueue = uxTopUsedPriority + 1; - - do - { - uxQueue--; - - if( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxQueue ] ) ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &( pxReadyTasksLists[ uxQueue ] ), tskREADY_CHAR ); - } - }while( uxQueue > ( unsigned portSHORT ) tskIDLE_PRIORITY ); - - if( !listLIST_IS_EMPTY( pxDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( pxOverflowDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxOverflowDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( &xTasksWaitingTermination ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xTasksWaitingTermination, tskDELETED_CHAR ); - } - - if( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xSuspendedTaskList, tskSUSPENDED_CHAR ); - } - } - xTaskResumeAll(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - void vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize ) - { - portENTER_CRITICAL(); - { - pcTraceBuffer = ( volatile signed portCHAR * volatile )pcBuffer; - pcTraceBufferStart = pcBuffer; - pcTraceBufferEnd = pcBuffer + ( ulBufferSize - tskSIZE_OF_EACH_TRACE_LINE ); - xTracing = pdTRUE; - } - portEXIT_CRITICAL(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned portLONG ulTaskEndTrace( void ) - { - unsigned portLONG ulBufferLength; - - portENTER_CRITICAL(); - xTracing = pdFALSE; - portEXIT_CRITICAL(); - - ulBufferLength = ( unsigned portLONG ) ( pcTraceBuffer - pcTraceBufferStart ); - - return ulBufferLength; - } - -#endif - - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - * documented in task.h - *----------------------------------------------------------*/ - - -inline void vTaskIncrementTick( void ) -{ - /* Called by the portable layer each time a tick interrupt occurs. - Increments the tick then checks to see if the new tick value will cause any - tasks to be unblocked. */ - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - ++xTickCount; - if( xTickCount == ( portTickType ) 0 ) - { - xList *pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. - If there are any items in pxDelayedTaskList here then there is - an error! */ - pxTemp = pxDelayedTaskList; - pxDelayedTaskList = pxOverflowDelayedTaskList; - pxOverflowDelayedTaskList = pxTemp; - } - - /* See if this tick has made a timeout expire. */ - prvCheckDelayedTasks(); - } - else - { - ++uxMissedTicks; - - /* The tick hook gets called at regular intervals, even if the - scheduler is locked. */ - #if ( configUSE_TICK_HOOK == 1 ) - { - extern void vApplicationTickHook( void ); - - vApplicationTickHook(); - } - #endif - } - - #if ( configUSE_TICK_HOOK == 1 ) - { - extern void vApplicationTickHook( void ); - - /* Guard against the tick hook being called when the missed tick - count is being unwound (when the scheduler is being unlocked. */ - if( uxMissedTicks == 0 ) - { - vApplicationTickHook(); - } - } - #endif -} -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_vTaskCleanUpResources == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskCleanUpResources( void ) - { - unsigned portSHORT usQueue; - volatile tskTCB *pxTCB; - - usQueue = ( unsigned portSHORT ) uxTopUsedPriority + ( unsigned portSHORT ) 1; - - /* Remove any TCB's from the ready queues. */ - do - { - usQueue--; - - while( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ usQueue ] ) ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &( pxReadyTasksLists[ usQueue ] ) ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - }while( usQueue > ( unsigned portSHORT ) tskIDLE_PRIORITY ); - - /* Remove any TCB's from the delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList1 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList1 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - /* Remove any TCB's from the overflow delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList2 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList2 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - while( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xSuspendedTaskList ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - while( !listLIST_IS_EMPTY( &xPendingReadyList ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xPendingReadyList ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - } - -#endif -/*-----------------------------------------------------------*/ - -void vTaskSwitchContext( void ) -{ - if( uxSchedulerSuspended != ( unsigned portBASE_TYPE ) pdFALSE ) - { - /* The scheduler is currently suspended - do not allow a context - switch. */ - xMissedYield = pdTRUE; - return; - } - - /* Find the highest priority queue that contains ready tasks. */ - while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopReadyPriority ] ) ) ) - { - --uxTopReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the tasks of the - same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopReadyPriority ] ) ); - vWriteTraceToBuffer(); -} -/*-----------------------------------------------------------*/ - -void vTaskPlaceOnEventList( xList *pxEventList, portTickType xTicksToWait ) -{ -portTickType xTimeToWake; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. */ - - /* Place the event list item of the TCB in the appropriate event list. - This is placed in the list in priority order so the highest priority task - is the first to be woken by the event. */ - vListInsert( ( xList * ) pxEventList, ( xListItem * ) &( pxCurrentTCB->xEventListItem ) ); - - /* Calculate the time at which the task should be woken if the event does - not occur. This may overflow but this doesn't matter. */ - xTimeToWake = xTickCount + xTicksToWait; - - /* We must remove ourselves from the ready list before adding ourselves - to the blocked list as the same list item is used for both lists. We have - exclusive access to the ready lists as the scheduler is locked. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskRemoveFromEventList( const xList *pxEventList ) -{ -tskTCB *pxUnblockedTCB; -portBASE_TYPE xReturn; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. It can also be called from within an ISR. */ - - /* The event list is sorted in priority order, so we can remove the - first in the list, remove the TCB from the delayed list, and add - it to the ready list. - - If an event is for a queue that is locked then this function will never - get called - the lock count on the queue will get modified instead. This - means we can always expect exclusive access to the event list here. */ - pxUnblockedTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedTCB->xEventListItem ) ); - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - vListRemove( &( pxUnblockedTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxUnblockedTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) ); - } - - if( pxUnblockedTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - /* Return true if the task removed from the event list has - a higher priority than the calling task. This allows - the calling task to know if it should force a context - switch now. */ - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} - - - - - -/* - * ----------------------------------------------------------- - * The Idle task. - * ---------------------------------------------------------- - * - * The portTASK_FUNCTION() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION( prvIdleTask, pvParameters ) -{ - /* Stop warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /* See if any tasks have been deleted. */ - prvCheckTasksWaitingTermination(); - - #if ( configUSE_PREEMPTION == 0 ) - { - /* If we are not using preemption we keep forcing a task switch to - see if any other task has become available. If we are using - preemption we don't need to do this as any task becoming available - will automatically get the processor anyway. */ - taskYIELD(); - } - #endif - - #if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) - { - /* When using preemption tasks of equal priority will be - timesliced. If a task that is sharing the idle priority is ready - to run then the idle task should yield before the end of the - timeslice. - - A critical region is not required here as we are just reading from - the list, and an occasional incorrect value will not matter. If - the ready list at the idle priority contains more than one task - then a task other than the idle task is ready to execute. */ - if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( unsigned portBASE_TYPE ) 1 ) - { - taskYIELD(); - } - } - #endif - - #if ( configUSE_IDLE_HOOK == 1 ) - { - extern void vApplicationIdleHook( void ); - - /* Call the user defined function from within the idle task. This - allows the application designer to add background functionality - without the overhead of a separate task. - NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES, - CALL A FUNCTION THAT MIGHT BLOCK. */ - vApplicationIdleHook(); - } - #endif - } -} /*lint !e715 pvParameters is not accessed but all task functions require the same prototype. */ - - - - - - - -/*----------------------------------------------------------- - * File private functions documented at the top of the file. - *----------------------------------------------------------*/ - - - -static void prvInitialiseTCBVariables( tskTCB *pxTCB, unsigned portSHORT usStackDepth, const signed portCHAR * const pcName, unsigned portBASE_TYPE uxPriority ) -{ - pxTCB->usStackDepth = usStackDepth; - - /* Store the function name in the TCB. */ - strncpy( ( char * ) pxTCB->pcTaskName, ( const char * ) pcName, ( unsigned portSHORT ) configMAX_TASK_NAME_LEN ); - pxTCB->pcTaskName[ ( unsigned portSHORT ) configMAX_TASK_NAME_LEN - ( unsigned portSHORT ) 1 ] = '\0'; - - /* This is used as an array index so must ensure it's not too large. */ - if( uxPriority >= configMAX_PRIORITIES ) - { - uxPriority = configMAX_PRIORITIES - 1; - } - - pxTCB->uxPriority = uxPriority; - - vListInitialiseItem( &( pxTCB->xGenericListItem ) ); - vListInitialiseItem( &( pxTCB->xEventListItem ) ); - - /* Set the pxTCB as a link back from the xListItem. This is so we can get - back to the containing TCB from a generic item in a list. */ - listSET_LIST_ITEM_OWNER( &( pxTCB->xGenericListItem ), pxTCB ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - listSET_LIST_ITEM_OWNER( &( pxTCB->xEventListItem ), pxTCB ); -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseTaskLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyTasksLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedTaskList1 ); - vListInitialise( ( xList * ) &xDelayedTaskList2 ); - vListInitialise( ( xList * ) &xPendingReadyList ); - - #if ( INCLUDE_vTaskDelete == 1 ) - { - vListInitialise( ( xList * ) &xTasksWaitingTermination ); - } - #endif - - #if ( INCLUDE_vTaskSuspend == 1 ) - { - vListInitialise( ( xList * ) &xSuspendedTaskList ); - } - #endif - - /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList - using list2. */ - pxDelayedTaskList = &xDelayedTaskList1; - pxOverflowDelayedTaskList = &xDelayedTaskList2; -} -/*-----------------------------------------------------------*/ - -static void prvCheckTasksWaitingTermination( void ) -{ - #if ( INCLUDE_vTaskDelete == 1 ) - { - portBASE_TYPE xListIsEmpty; - - /* ucTasksDeleted is used to prevent vTaskSuspendAll() being called - too often in the idle task. */ - if( uxTasksDeleted > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskSuspendAll(); - xListIsEmpty = listLIST_IS_EMPTY( &xTasksWaitingTermination ); - xTaskResumeAll(); - - if( !xListIsEmpty ) - { - tskTCB *pxTCB; - - portENTER_CRITICAL(); - { - pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xTasksWaitingTermination ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - --uxCurrentNumberOfTasks; - --uxTasksDeleted; - } - portEXIT_CRITICAL(); - - prvDeleteTCB( pxTCB ); - } - } - } - #endif -} -/*-----------------------------------------------------------*/ - -static tskTCB *prvAllocateTCBAndStack( unsigned portSHORT usStackDepth ) -{ -tskTCB *pxNewTCB; - - /* Allocate space for the TCB. Where the memory comes from depends on - the implementation of the port malloc function. */ - pxNewTCB = ( tskTCB * ) pvPortMalloc( sizeof( tskTCB ) ); - - if( pxNewTCB != NULL ) - { - /* Allocate space for the stack used by the task being created. - The base of the stack memory stored in the TCB so the task can - be deleted later if required. */ - pxNewTCB->pxStack = ( portSTACK_TYPE * ) pvPortMalloc( ( ( size_t )usStackDepth ) * sizeof( portSTACK_TYPE ) ); - - if( pxNewTCB->pxStack == NULL ) - { - /* Could not allocate the stack. Delete the allocated TCB. */ - vPortFree( pxNewTCB ); - pxNewTCB = NULL; - } - else - { - /* Just to help debugging. */ - memset( pxNewTCB->pxStack, tskSTACK_FILL_BYTE, usStackDepth * sizeof( portSTACK_TYPE ) ); - } - } - - return pxNewTCB; -} -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( signed portCHAR *pcWriteBuffer, xList *pxList, signed portCHAR cStatus ) - { - volatile tskTCB *pxNextTCB, *pxFirstTCB; - static portCHAR pcStatusString[ 50 ]; - unsigned portSHORT usStackRemaining; - - /* Write the details of all the TCB's in pxList into the buffer. */ - listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); - do - { - listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); - usStackRemaining = usTaskCheckFreeStackSpace( ( unsigned portCHAR * ) pxNextTCB->pxStack ); - sprintf( pcStatusString, ( portCHAR * ) "%s\t\t%c\t%u\t%u\t%u\r\n", pxNextTCB->pcTaskName, cStatus, ( unsigned int ) pxNextTCB->uxPriority, usStackRemaining, ( unsigned int ) pxNextTCB->uxTCBNumber ); - strcat( ( portCHAR * ) pcWriteBuffer, ( portCHAR * ) pcStatusString ); - - } while( pxNextTCB != pxFirstTCB ); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - unsigned portSHORT usTaskCheckFreeStackSpace( const unsigned portCHAR *pucStackByte ) - { - register unsigned portSHORT usCount = 0; - - while( *pucStackByte == tskSTACK_FILL_BYTE ) - { - pucStackByte -= portSTACK_GROWTH; - usCount++; - } - - usCount /= sizeof( portSTACK_TYPE ); - - return usCount; - } -#endif -/*-----------------------------------------------------------*/ - - - -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - - static void prvDeleteTCB( tskTCB *pxTCB ) - { - /* Free up the memory allocated by the scheduler for the task. It is up to - the task to free any memory allocated at the application level. */ - vPortFree( pxTCB->pxStack ); - vPortFree( pxTCB ); - } - -#endif - - -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) - - xTaskHandle xTaskGetCurrentTaskHandle( void ) - { - xTaskHandle xReturn; - - portENTER_CRITICAL(); - { - xReturn = ( xTaskHandle ) pxCurrentTCB; - } - portEXIT_CRITICAL(); - - return xReturn; - } - -#endif - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/FreeRTOSConfig.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/FreeRTOSConfig.h deleted file mode 100644 index 3656e12d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/FreeRTOSConfig.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry. - MCF5235 Port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - *----------------------------------------------------------*/ - -#define configUSE_PREEMPTION 1 -#define configUSE_IDLE_HOOK 0 -#define configUSE_TICK_HOOK 0 -#define configTICK_RATE_HZ ( ( portTickType ) 1000 ) -#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 128 ) -#define configMAX_TASK_NAME_LEN ( 16 ) -#define configUSE_TRACE_FACILITY 1 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 - -/* Co-routine definitions. */ -#define configUSE_CO_ROUTINES 0 -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) - -/* Set the following definitions to 1 to include the API function, or zero -to exclude the API function. */ - -#define INCLUDE_vTaskPrioritySet 1 -#define INCLUDE_uxTaskPriorityGet 1 -#define INCLUDE_vTaskDelete 1 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 1 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 -#define INCLUDE_xTaskGetCurrentTaskHandle 1 - -#endif /* FREERTOS_CONFIG_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/m523xbcc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/m523xbcc.h deleted file mode 100644 index b8b0459d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/m523xbcc.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * File: m523xbcc.h - * Purpose: Evaluation board definitions and memory map information - * - * Notes: - */ - -#ifndef _M523XBCC_H -#define _M523XBCC_H - -/********************************************************************/ - -#include "mcf5xxx.h" -#include "mcf523x.h" -#include "io.h" - -/********************************************************************/ - -/* - * Debug prints ON (#undef) or OFF (#define) - */ -#undef DEBUG - -/* - * System Bus Clock Info - */ -#define SYSTEM_CLOCK 75 /* system bus frequency in MHz */ -#define PERIOD 13.33 /* system bus period in ns */ - -/* - * Flash Device Info - */ -#define AMD_FLASH_AM29PL160CB_16BIT - -/* - * Ethernet Port Info - */ -#define FEC_PHY0 (0x01) - -/* - * Memory map definitions from linker command files - */ -extern uint8 __IPSBAR[]; -extern uint8 __SDRAM[]; -extern uint8 __SDRAM_SIZE[]; -extern uint8 __SRAM[]; -extern uint8 __SRAM_SIZE[]; -extern uint8 __EXT_FLASH[]; -extern uint8 __EXT_FLASH_SIZE[]; - -/* - * Memory Map Info - */ -#define IPSBAR_ADDRESS (uint32)__IPSBAR - -#define SDRAM_ADDRESS (uint32)__SDRAM -#define SDRAM_SIZE (uint32)__SDRAM_SIZE - -#define SRAM_ADDRESS (uint32)__SRAM -#define SRAM_SIZE (uint32)__SRAM_SIZE - -#define EXT_FLASH_ADDRESS (uint32)__EXT_FLASH -#define EXT_FLASH_SIZE (uint32)__EXT_FLASH_SIZE - -/* - * Interrupt Controller Definitions - */ -#define TIMER_NETWORK_LEVEL 3 -#define FEC_LEVEL 4 - -/* - * Timer period info - */ -#define TIMER_NETWORK_PERIOD 1000000000/0x10000 /* 1 sec / max timeout */ - -/********************************************************************/ - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x.h deleted file mode 100644 index ca131c5b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x.h +++ /dev/null @@ -1,53 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_H__ -#define __MCF523X_H__ - -/*********************************************************************/ - -#include "mcf523x_fec.h" -#include "mcf523x_rng.h" -#include "mcf523x_fmpll.h" -#include "mcf523x_cs.h" -#include "mcf523x_intc0.h" -#include "mcf523x_intc1.h" -#include "mcf523x_sdramc.h" -#include "mcf523x_sram.h" -#include "mcf523x_uart.h" -#include "mcf523x_timer.h" -#include "mcf523x_qspi.h" -#include "mcf523x_eport.h" -#include "mcf523x_i2c.h" -#include "mcf523x_scm.h" -#include "mcf523x_pit.h" -#include "mcf523x_can.h" -#include "mcf523x_wtm.h" -#include "mcf523x_gpio.h" -#include "mcf523x_mdha.h" -#include "mcf523x_ccm.h" -#include "mcf523x_rcm.h" -#include "mcf523x_etpu.h" -#include "mcf523x_etpu_struc.h" - - - - -/********************************************************************/ - -#endif /* __MCF523X_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/descriptors.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/descriptors.h deleted file mode 100644 index 2543f90b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/descriptors.h +++ /dev/null @@ -1,140 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * USB Descriptors definitions. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - - -#ifndef DESCRIPTOR_H -#define DESCRIPTOR_H - -/********************************************************************/ - -/* USB descriptor types */ -#define DEVICE 1 -#define CONFIGURATION 2 -#define STRING 3 -#define INTERFACE 4 -#define ENDPOINT 5 - -/* USB Standard Request Types - bRequestType */ -#define IN 0x80 -#define OUT 0x00 -#define STANDARD 0x00 -#define CLASS 0x20 -#define VENDOR 0x40 -#define RQ_DEVICE 0x00 -#define RQ_INTERFACE 0x01 -#define RQ_ENDPOINT 0x02 - -/* USB Standard Request Codes - bRequest */ -#define GET_STATUS 0 -#define CLEAR_FEATURE 1 -#define SET_FEATURE 3 -#define SET_ADDRESS 5 -#define GET_DESCRIPTOR 6 -#define SET_DESCRIPTOR 7 -#define GET_CONFIGURATION 8 -#define SET_CONFIGURATION 9 -#define GET_INTERFACE 10 -#define SET_INTERFACE 11 -#define SYNCH_FRAME 12 - -/* Configuration bmAttributes fields */ -#define BUS_POWERED 0x80 -#define SELF_POWERED 0xC0 -#define REMOTE_WAKEUP 0xA0 - -/* Endpoint bmAttributes fields */ -#define CONTROL 0x00 -#define ISOCHRONOUS 0x01 -#define BULK 0x02 -#define INTERRUPT 0x03 -#define DISABLED 0xFF - -/* Standard Feature Selectors */ -#define DEVICE_REMOTE_WAKEUP 1 -#define ENDPOINT_HALT 0 - -/* Structure for USB Device Descriptors */ -typedef struct { - uint8 bLength; - uint8 bDescriptorType; - uint8 bcdUSBL; - uint8 bcdUSBH; - uint8 bDeviceClass; - uint8 bDeviceSubClass; - uint8 bDeviceProtocol; - uint8 bMaxPacketSize0; - uint8 idVendorL; - uint8 idVendorH; - uint8 idProductL; - uint8 idProductH; - uint8 bcdDeviceL; - uint8 bcdDeviceH; - uint8 iManufacturer; - uint8 iProduct; - uint8 iSerialNumber; - uint8 bNumConfigurations; -} USB_DEVICE_DESC; - -/* Structure for USB Configuration Descriptors */ -typedef struct { - uint8 bLength; - uint8 bDescriptorType; - uint8 wTotalLengthL; - uint8 wTotalLengthH; - uint8 bNumInterfaces; - uint8 bConfigurationValue; - uint8 iConfiguration; - uint8 bmAttributes; - uint8 maxPower; -} USB_CONFIG_DESC; - -/* Structure for USB Interface Descriptors */ -typedef struct { - uint8 bLength; - uint8 bDescriptorType; - uint8 bInterfaceNumber; - uint8 bAlternateSetting; - uint8 bNumEndpoints; - uint8 bInterfaceClass; - uint8 bInterfaceSubClass; - uint8 bInterfaceProtocol; - uint8 iInterface; -} USB_INTERFACE_DESC; - -/* Structure for USB Endpoint Descriptors */ -typedef struct { - uint8 bLength; - uint8 bDescriptorType; - uint8 bEndpointAddress; - uint8 bmAttributes; - uint8 wMaxPacketSizeL; - uint8 wMaxPacketSizeH; - uint8 bInterval; -} USB_ENDPOINT_DESC; - -/* Structure for USB String Descriptors */ -typedef struct { - uint8 bLength; - uint8 bDescriptorType; - uint8 * bString; -} USB_STRING_DESC; - -/********************************************************************/ - -#endif /* DESCRIPTOR_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_can.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_can.h deleted file mode 100644 index 31ca71c6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_can.h +++ /dev/null @@ -1,329 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_CAN_H__ -#define __MCF523X_CAN_H__ - -/********************************************************************* -* -* FlexCAN Module (CAN) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CAN_CANMCR0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0000])) -#define MCF_CAN_CANCTRL0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0004])) -#define MCF_CAN_TIMER0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0008])) -#define MCF_CAN_RXGMASK0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0010])) -#define MCF_CAN_RX14MASK0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0014])) -#define MCF_CAN_RX15MASK0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0018])) -#define MCF_CAN_ERRCNT0 (*(vuint32*)(void*)(&__IPSBAR[0x1C001C])) -#define MCF_CAN_ERRSTAT0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0020])) -#define MCF_CAN_IMASK0 (*(vuint16*)(void*)(&__IPSBAR[0x1C002A])) -#define MCF_CAN_IFLAG0 (*(vuint16*)(void*)(&__IPSBAR[0x1C0032])) -#define MCF_CAN_CANMCR1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0000])) -#define MCF_CAN_CANCTRL1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0004])) -#define MCF_CAN_TIMER1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0008])) -#define MCF_CAN_RXGMASK1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0010])) -#define MCF_CAN_RX14MASK1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0014])) -#define MCF_CAN_RX15MASK1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0018])) -#define MCF_CAN_ERRCNT1 (*(vuint32*)(void*)(&__IPSBAR[0x1F001C])) -#define MCF_CAN_ERRSTAT1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0020])) -#define MCF_CAN_IMASK1 (*(vuint16*)(void*)(&__IPSBAR[0x1F002A])) -#define MCF_CAN_IFLAG1 (*(vuint16*)(void*)(&__IPSBAR[0x1F0032])) -#define MCF_CAN_CANMCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0000+((x)*0x30000)])) -#define MCF_CAN_CANCTRL(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0004+((x)*0x30000)])) -#define MCF_CAN_TIMER(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0008+((x)*0x30000)])) -#define MCF_CAN_RXGMASK(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0010+((x)*0x30000)])) -#define MCF_CAN_RX14MASK(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0014+((x)*0x30000)])) -#define MCF_CAN_RX15MASK(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0018+((x)*0x30000)])) -#define MCF_CAN_ERRCNT(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C001C+((x)*0x30000)])) -#define MCF_CAN_ERRSTAT(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0020+((x)*0x30000)])) -#define MCF_CAN_IMASK(x) (*(vuint16*)(void*)(&__IPSBAR[0x1C002A+((x)*0x30000)])) -#define MCF_CAN_IFLAG(x) (*(vuint16*)(void*)(&__IPSBAR[0x1C0032+((x)*0x30000)])) - -#define MCF_CAN_MBUF0_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0080+((x)*0x30000)])) -#define MCF_CAN_MBUF0_TMSTP(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0082+((x)*0x30000)])) -#define MCF_CAN_MBUF0_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0084+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0088+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0089+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008A+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008B+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008C+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008D+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008E+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008F+((x)*0x30000)])) -#define MCF_CAN_MBUF1_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0090+((x)*0x30000)])) -#define MCF_CAN_MBUF1_TMSTP(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0092+((x)*0x30000)])) -#define MCF_CAN_MBUF1_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0094+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0098+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0099+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009A+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009B+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009C+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009D+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009E+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009F+((x)*0x30000)])) -#define MCF_CAN_MBUF2_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00A0+((x)*0x30000)])) -#define MCF_CAN_MBUF2_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00A4+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00A8+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00A9+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AA+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AB+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AC+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AD+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AE+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AF+((x)*0x30000)])) -#define MCF_CAN_MBUF3_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00B0+((x)*0x30000)])) -#define MCF_CAN_MBUF3_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00B4+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00B8+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00B9+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BA+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BB+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BC+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BD+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BE+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BF+((x)*0x30000)])) -#define MCF_CAN_MBUF4_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00C0+((x)*0x30000)])) -#define MCF_CAN_MBUF4_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00C4+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00C8+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00C9+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CA+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CB+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CC+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CD+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CE+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CF+((x)*0x30000)])) -#define MCF_CAN_MBUF5_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00D0+((x)*0x30000)])) -#define MCF_CAN_MBUF5_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00D4+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00D8+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00D9+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DA+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DB+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DC+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DD+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DE+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DF+((x)*0x30000)])) -#define MCF_CAN_MBUF6_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00E0+((x)*0x30000)])) -#define MCF_CAN_MBUF6_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00E4+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00E8+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00E9+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EA+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EB+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EC+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00ED+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EE+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EF+((x)*0x30000)])) -#define MCF_CAN_MBUF7_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00F0+((x)*0x30000)])) -#define MCF_CAN_MBUF7_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00F4+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00F8+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00F9+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FA+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FB+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FC+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FD+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FE+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FF+((x)*0x30000)])) -#define MCF_CAN_MBUF8_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0100+((x)*0x30000)])) -#define MCF_CAN_MBUF8_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0104+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0108+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0109+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010A+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010B+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010C+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010D+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010E+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010F+((x)*0x30000)])) -#define MCF_CAN_MBUF9_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0100+((x)*0x30000)])) -#define MCF_CAN_MBUF9_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0114+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0118+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0119+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011A+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011B+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011C+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011D+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011E+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011F+((x)*0x30000)])) -#define MCF_CAN_MBUF10_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0120+((x)*0x30000)])) -#define MCF_CAN_MBUF10_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0124+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0128+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0129+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012A+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012B+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012C+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012D+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012E+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012F+((x)*0x30000)])) -#define MCF_CAN_MBUF11_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0130+((x)*0x30000)])) -#define MCF_CAN_MBUF11_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0134+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0138+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0139+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013A+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013B+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013C+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013D+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013E+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013F+((x)*0x30000)])) -#define MCF_CAN_MBUF12_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0140+((x)*0x30000)])) -#define MCF_CAN_MBUF12_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0144+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0148+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0149+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014A+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014B+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014C+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014D+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014E+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014F+((x)*0x30000)])) -#define MCF_CAN_MBUF13_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0150+((x)*0x30000)])) -#define MCF_CAN_MBUF13_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0154+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0158+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0159+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015A+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015B+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015C+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015D+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015E+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015F+((x)*0x30000)])) -#define MCF_CAN_MBUF14_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0160+((x)*0x30000)])) -#define MCF_CAN_MBUF14_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0164+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0168+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0169+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016A+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016B+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016C+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016D+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016E+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016F+((x)*0x30000)])) -#define MCF_CAN_MBUF15_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0170+((x)*0x30000)])) -#define MCF_CAN_MBUF15_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0174+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0178+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0179+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017A+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017B+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017C+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017D+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017E+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017F+((x)*0x30000)])) - - -#define MCF_CAN_MBUF0_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0088+((x)*0x30000)])) -#define MCF_CAN_MBUF0_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C008C+((x)*0x30000)])) -#define MCF_CAN_MBUF1_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0098+((x)*0x30000)])) -#define MCF_CAN_MBUF1_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C009C+((x)*0x30000)])) -#define MCF_CAN_MBUF2_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00A8+((x)*0x30000)])) -#define MCF_CAN_MBUF2_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00AC+((x)*0x30000)])) - - -/* Bit definitions and macros for MCF_CAN_CANMCR */ -#define MCF_CAN_CANMCR_MAXMB(x) (((x)&0x0000000F)<<0) -#define MCF_CAN_CANMCR_SUPV (0x00800000) -#define MCF_CAN_CANMCR_FRZACK (0x01000000) -#define MCF_CAN_CANMCR_SOFTRST (0x02000000) -#define MCF_CAN_CANMCR_HALT (0x10000000) -#define MCF_CAN_CANMCR_FRZ (0x40000000) -#define MCF_CAN_CANMCR_MDIS (0x80000000) - -/* Bit definitions and macros for MCF_CAN_CANCTRL */ -#define MCF_CAN_CANCTRL_PROPSEG(x) (((x)&0x00000007)<<0) -#define MCF_CAN_CANCTRL_LOM (0x00000008) -#define MCF_CAN_CANCTRL_LBUF (0x00000010) -#define MCF_CAN_CANCTRL_TSYNC (0x00000020) -#define MCF_CAN_CANCTRL_BOFFREC (0x00000040) -#define MCF_CAN_CANCTRL_SAMP (0x00000080) -#define MCF_CAN_CANCTRL_LPB (0x00001000) -#define MCF_CAN_CANCTRL_CLKSRC (0x00002000) -#define MCF_CAN_CANCTRL_ERRMSK (0x00004000) -#define MCF_CAN_CANCTRL_BOFFMSK (0x00008000) -#define MCF_CAN_CANCTRL_PSEG2(x) (((x)&0x00000007)<<16) -#define MCF_CAN_CANCTRL_PSEG1(x) (((x)&0x00000007)<<19) -#define MCF_CAN_CANCTRL_RJW(x) (((x)&0x00000003)<<22) -#define MCF_CAN_CANCTRL_PRESDIV(x) (((x)&0x000000FF)<<24) - -/* Bit definitions and macros for MCF_CAN_TIMER */ -#define MCF_CAN_TIMER_TIMER(x) (((x)&0x0000FFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_RXGMASK */ -#define MCF_CAN_RXGMASK_MI(x) (((x)&0x1FFFFFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_RX14MASK */ -#define MCF_CAN_RX14MASK_MI(x) (((x)&0x1FFFFFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_RX15MASK */ -#define MCF_CAN_RX15MASK_MI(x) (((x)&0x1FFFFFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_ERRCNT */ -#define MCF_CAN_ERRCNT_TXECTR(x) (((x)&0x000000FF)<<0) -#define MCF_CAN_ERRCNT_RXECTR(x) (((x)&0x000000FF)<<8) - -/* Bit definitions and macros for MCF_CAN_ERRSTAT */ -#define MCF_CAN_ERRSTAT_WAKINT (0x00000001) -#define MCF_CAN_ERRSTAT_ERRINT (0x00000002) -#define MCF_CAN_ERRSTAT_BOFFINT (0x00000004) -#define MCF_CAN_ERRSTAT_FLTCONF(x) (((x)&0x00000003)<<4) -#define MCF_CAN_ERRSTAT_TXRX (0x00000040) -#define MCF_CAN_ERRSTAT_IDLE (0x00000080) -#define MCF_CAN_ERRSTAT_RXWRN (0x00000100) -#define MCF_CAN_ERRSTAT_TXWRN (0x00000200) -#define MCF_CAN_ERRSTAT_STFERR (0x00000400) -#define MCF_CAN_ERRSTAT_FRMERR (0x00000800) -#define MCF_CAN_ERRSTAT_CRCERR (0x00001000) -#define MCF_CAN_ERRSTAT_ACKERR (0x00002000) -#define MCF_CAN_ERRSTAT_BITERR(x) (((x)&0x00000003)<<14) -#define MCF_CAN_ERRSTAT_FLTCONF_ACTIVE (0x00000000) -#define MCF_CAN_ERRSTAT_FLTCONF_PASSIVE (0x00000010) -#define MCF_CAN_ERRSTAT_FLTCONF_BUSOFF (0x00000020) - -/* Bit definitions and macros for MCF_CAN_IMASK */ -#define MCF_CAN_IMASK_BUF0M (0x0001) -#define MCF_CAN_IMASK_BUF1M (0x0002) -#define MCF_CAN_IMASK_BUF2M (0x0004) -#define MCF_CAN_IMASK_BUF3M (0x0008) -#define MCF_CAN_IMASK_BUF4M (0x0010) -#define MCF_CAN_IMASK_BUF5M (0x0020) -#define MCF_CAN_IMASK_BUF6M (0x0040) -#define MCF_CAN_IMASK_BUF7M (0x0080) -#define MCF_CAN_IMASK_BUF8M (0x0100) -#define MCF_CAN_IMASK_BUF9M (0x0200) -#define MCF_CAN_IMASK_BUF10M (0x0400) -#define MCF_CAN_IMASK_BUF11M (0x0800) -#define MCF_CAN_IMASK_BUF12M (0x1000) -#define MCF_CAN_IMASK_BUF13M (0x2000) -#define MCF_CAN_IMASK_BUF14M (0x4000) -#define MCF_CAN_IMASK_BUF15M (0x8000) - -/* Bit definitions and macros for MCF_CAN_IFLAG */ -#define MCF_CAN_IFLAG_BUF0I (0x0001) -#define MCF_CAN_IFLAG_BUF1I (0x0002) -#define MCF_CAN_IFLAG_BUF2I (0x0004) -#define MCF_CAN_IFLAG_BUF3I (0x0008) -#define MCF_CAN_IFLAG_BUF4I (0x0010) -#define MCF_CAN_IFLAG_BUF5I (0x0020) -#define MCF_CAN_IFLAG_BUF6I (0x0040) -#define MCF_CAN_IFLAG_BUF7I (0x0080) -#define MCF_CAN_IFLAG_BUF8I (0x0100) -#define MCF_CAN_IFLAG_BUF9I (0x0200) -#define MCF_CAN_IFLAG_BUF10I (0x0400) -#define MCF_CAN_IFLAG_BUF11I (0x0800) -#define MCF_CAN_IFLAG_BUF12I (0x1000) -#define MCF_CAN_IFLAG_BUF13I (0x2000) -#define MCF_CAN_IFLAG_BUF14I (0x4000) -#define MCF_CAN_IFLAG_BUF15I (0x8000) - -/********************************************************************/ - -#endif /* __MCF523X_CAN_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_ccm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_ccm.h deleted file mode 100644 index b13cbc4b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_ccm.h +++ /dev/null @@ -1,60 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_CCM_H__ -#define __MCF523X_CCM_H__ - -/********************************************************************* -* -* Chip Configuration Module (CCM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CCM_CCR (*(vuint16*)(void*)(&__IPSBAR[0x110004])) -#define MCF_CCM_LPCR (*(vuint8 *)(void*)(&__IPSBAR[0x110007])) -#define MCF_CCM_CIR (*(vuint16*)(void*)(&__IPSBAR[0x11000A])) -#define MCF_CCM_RCON (*(vuint16*)(void*)(&__IPSBAR[0x110008])) - -/* Bit definitions and macros for MCF_CCM_CCR */ -#define MCF_CCM_CCR_BMT(x) (((x)&0x0007)<<0) -#define MCF_CCM_CCR_BME (0x0008) -#define MCF_CCM_CCR_SZEN (0x0040) -#define MCF_CCM_CCR_MODE(x) (((x)&0x0007)<<8) - -/* Bit definitions and macros for MCF_CCM_LPCR */ -#define MCF_CCM_LPCR_STPMD(x) (((x)&0x03)<<3) -#define MCF_CCM_LPCR_LPMD(x) (((x)&0x03)<<6) -#define MCF_CCM_LPCR_LPMD_STOP (0xC0) -#define MCF_CCM_LPCR_LPMD_WAIT (0x80) -#define MCF_CCM_LPCR_LPMD_DOZE (0x40) -#define MCF_CCM_LPCR_LPMD_RUN (0x00) - -/* Bit definitions and macros for MCF_CCM_CIR */ -#define MCF_CCM_CIR_PRN(x) (((x)&0x003F)<<0) -#define MCF_CCM_CIR_PIN(x) (((x)&0x03FF)<<6) - -/* Bit definitions and macros for MCF_CCM_RCON */ -#define MCF_CCM_RCON_MODE (0x0001) -#define MCF_CCM_RCON_BOOTPS(x) (((x)&0x0003)<<3) -#define MCF_CCM_RCON_RLOAD (0x0020) -#define MCF_CCM_RCON_RCSC(x) (((x)&0x0003)<<8) - -/********************************************************************/ - -#endif /* __MCF523X_CCM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_cfm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_cfm.h deleted file mode 100644 index 597e1174..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_cfm.h +++ /dev/null @@ -1,63 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_CFM_H__ -#define __MCF523X_CFM_H__ - -/********************************************************************* -* -* Chip Configuration Module (CFM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CFM_CCR (*(vuint16*)(void*)(&__IPSBAR[0x110004])) -#define MCF_CFM_LPCR (*(vuint8 *)(void*)(&__IPSBAR[0x110007])) -#define MCF_CFM_CIR (*(vuint16*)(void*)(&__IPSBAR[0x11000A])) -#define MCF_CFM_RCON (*(vuint16*)(void*)(&__IPSBAR[0x110008])) - -/* Bit definitions and macros for MCF_CFM_CCR */ -#define MCF_CFM_CCR_BMT(x) (((x)&0x0007)<<0) -#define MCF_CFM_CCR_BME (0x0008) -#define MCF_CFM_CCR_SZEN (0x0040) -#define MCF_CFM_CCR_MODE(x) (((x)&0x0007)<<8) -#define MCF_CFM_CCR_MODE(x) ((uint16)(((x)&0x0007)<<8)) -#define MCF_CFM_CCR_BMT(x) ((uint16)(((x)&0x0007))) - -/* Bit definitions and macros for MCF_CFM_LPCR */ -#define MCF_CFM_LPCR_STPMD(x) (((x)&0x03)<<3) -#define MCF_CFM_LPCR_LPMD(x) (((x)&0x03)<<6) -#define MCF_CFM_LPCR_LPMD_STOP (0xC0) -#define MCF_CFM_LPCR_LPMD_WAIT (0x80) -#define MCF_CFM_LPCR_LPMD_DOZE (0x40) -#define MCF_CFM_LPCR_LPMD_RUN (0x00) -#define MCF_CFM_LPCR_STPMD(x) ((uint8)(((x)&0x0003)<<3)) - -/* Bit definitions and macros for MCF_CFM_CIR */ -#define MCF_CFM_CIR_PRN(x) (((x)&0x003F)<<0) -#define MCF_CFM_CIR_PIN(x) (((x)&0x03FF)<<6) - -/* Bit definitions and macros for MCF_CFM_RCON */ -#define MCF_CFM_RCON_MODE (0x0001) -#define MCF_CFM_RCON_BOOTPS(x) (((x)&0x0003)<<3) -#define MCF_CFM_RCON_RLOAD (0x0020) -#define MCF_CFM_RCON_RCSC(x) (((x)&0x0003)<<8) - -/********************************************************************/ - -#endif /* __MCF523X_CFM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_cs.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_cs.h deleted file mode 100644 index ac5c53fd..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_cs.h +++ /dev/null @@ -1,105 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_CS_H__ -#define __MCF523X_CS_H__ - -/********************************************************************* -* -* Chip Selects (CS) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CS_CSAR0 (*(vuint16*)(void*)(&__IPSBAR[0x000080])) -#define MCF_CS_CSMR0 (*(vuint32*)(void*)(&__IPSBAR[0x000084])) -#define MCF_CS_CSCR0 (*(vuint16*)(void*)(&__IPSBAR[0x00008A])) -#define MCF_CS_CSAR1 (*(vuint16*)(void*)(&__IPSBAR[0x00008C])) -#define MCF_CS_CSMR1 (*(vuint32*)(void*)(&__IPSBAR[0x000090])) -#define MCF_CS_CSCR1 (*(vuint16*)(void*)(&__IPSBAR[0x000096])) -#define MCF_CS_CSAR2 (*(vuint16*)(void*)(&__IPSBAR[0x000098])) -#define MCF_CS_CSMR2 (*(vuint32*)(void*)(&__IPSBAR[0x00009C])) -#define MCF_CS_CSCR2 (*(vuint16*)(void*)(&__IPSBAR[0x0000A2])) -#define MCF_CS_CSAR3 (*(vuint16*)(void*)(&__IPSBAR[0x0000A4])) -#define MCF_CS_CSMR3 (*(vuint32*)(void*)(&__IPSBAR[0x0000A8])) -#define MCF_CS_CSCR3 (*(vuint16*)(void*)(&__IPSBAR[0x0000AE])) -#define MCF_CS_CSAR4 (*(vuint16*)(void*)(&__IPSBAR[0x0000B0])) -#define MCF_CS_CSMR4 (*(vuint32*)(void*)(&__IPSBAR[0x0000B4])) -#define MCF_CS_CSCR4 (*(vuint16*)(void*)(&__IPSBAR[0x0000BA])) -#define MCF_CS_CSAR5 (*(vuint16*)(void*)(&__IPSBAR[0x0000BC])) -#define MCF_CS_CSMR5 (*(vuint32*)(void*)(&__IPSBAR[0x0000C0])) -#define MCF_CS_CSCR5 (*(vuint16*)(void*)(&__IPSBAR[0x0000C6])) -#define MCF_CS_CSAR6 (*(vuint16*)(void*)(&__IPSBAR[0x0000C8])) -#define MCF_CS_CSMR6 (*(vuint32*)(void*)(&__IPSBAR[0x0000CC])) -#define MCF_CS_CSCR6 (*(vuint16*)(void*)(&__IPSBAR[0x0000D2])) -#define MCF_CS_CSAR7 (*(vuint16*)(void*)(&__IPSBAR[0x0000D4])) -#define MCF_CS_CSMR7 (*(vuint32*)(void*)(&__IPSBAR[0x0000D8])) -#define MCF_CS_CSCR7 (*(vuint16*)(void*)(&__IPSBAR[0x0000DE])) -#define MCF_CS_CSAR(x) (*(vuint16*)(void*)(&__IPSBAR[0x000080+((x)*0x00C)])) -#define MCF_CS_CSMR(x) (*(vuint32*)(void*)(&__IPSBAR[0x000084+((x)*0x00C)])) -#define MCF_CS_CSCR(x) (*(vuint16*)(void*)(&__IPSBAR[0x00008A+((x)*0x00C)])) - -/* Bit definitions and macros for MCF_CS_CSAR */ -#define MCF_CS_CSAR_BA(x) ((uint16)(((x)&0xFFFF0000)>>16)) - -/* Bit definitions and macros for MCF_CS_CSMR */ -#define MCF_CS_CSMR_V (0x00000001) -#define MCF_CS_CSMR_UD (0x00000002) -#define MCF_CS_CSMR_UC (0x00000004) -#define MCF_CS_CSMR_SD (0x00000008) -#define MCF_CS_CSMR_SC (0x00000010) -#define MCF_CS_CSMR_CI (0x00000020) -#define MCF_CS_CSMR_AM (0x00000040) -#define MCF_CS_CSMR_WP (0x00000100) -#define MCF_CS_CSMR_BAM(x) (((x)&0x0000FFFF)<<16) -#define MCF_CS_CSMR_BAM_4G (0xFFFF0000) -#define MCF_CS_CSMR_BAM_2G (0x7FFF0000) -#define MCF_CS_CSMR_BAM_1G (0x3FFF0000) -#define MCF_CS_CSMR_BAM_1024M (0x3FFF0000) -#define MCF_CS_CSMR_BAM_512M (0x1FFF0000) -#define MCF_CS_CSMR_BAM_256M (0x0FFF0000) -#define MCF_CS_CSMR_BAM_128M (0x07FF0000) -#define MCF_CS_CSMR_BAM_64M (0x03FF0000) -#define MCF_CS_CSMR_BAM_32M (0x01FF0000) -#define MCF_CS_CSMR_BAM_16M (0x00FF0000) -#define MCF_CS_CSMR_BAM_8M (0x007F0000) -#define MCF_CS_CSMR_BAM_4M (0x003F0000) -#define MCF_CS_CSMR_BAM_2M (0x001F0000) -#define MCF_CS_CSMR_BAM_1M (0x000F0000) -#define MCF_CS_CSMR_BAM_1024K (0x000F0000) -#define MCF_CS_CSMR_BAM_512K (0x00070000) -#define MCF_CS_CSMR_BAM_256K (0x00030000) -#define MCF_CS_CSMR_BAM_128K (0x00010000) -#define MCF_CS_CSMR_BAM_64K (0x00000000) - -/* Bit definitions and macros for MCF_CS_CSCR */ -#define MCF_CS_CSCR_SWWS(x) (((x)&0x0007)<<0) -#define MCF_CS_CSCR_BSTW (0x0008) -#define MCF_CS_CSCR_BSTR (0x0010) -#define MCF_CS_CSCR_BEM (0x0020) -#define MCF_CS_CSCR_PS(x) (((x)&0x0003)<<6) -#define MCF_CS_CSCR_AA (0x0100) -#define MCF_CS_CSCR_IWS(x) (((x)&0x000F)<<10) -#define MCF_CS_CSCR_SRWS(x) (((x)&0x0003)<<14) -#define MCF_CS_CSCR_PS_8 (0x0040) -#define MCF_CS_CSCR_PS_16 (0x0080) -#define MCF_CS_CSCR_PS_32 (0x0000) - -/********************************************************************/ - -#endif /* __MCF523X_CS_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_eport.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_eport.h deleted file mode 100644 index 78861a24..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_eport.h +++ /dev/null @@ -1,96 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_EPORT_H__ -#define __MCF523X_EPORT_H__ - -/********************************************************************* -* -* Edge Port Module (EPORT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_EPORT_EPPAR (*(vuint16*)(void*)(&__IPSBAR[0x130000])) -#define MCF_EPORT_EPDDR (*(vuint8 *)(void*)(&__IPSBAR[0x130002])) -#define MCF_EPORT_EPIER (*(vuint8 *)(void*)(&__IPSBAR[0x130003])) -#define MCF_EPORT_EPDR (*(vuint8 *)(void*)(&__IPSBAR[0x130004])) -#define MCF_EPORT_EPPDR (*(vuint8 *)(void*)(&__IPSBAR[0x130005])) -#define MCF_EPORT_EPFR (*(vuint8 *)(void*)(&__IPSBAR[0x130006])) - -/* Bit definitions and macros for MCF_EPORT_EPPAR */ -#define MCF_EPORT_EPPAR_EPPA1(x) (((x)&0x0003)<<2) -#define MCF_EPORT_EPPAR_EPPA2(x) (((x)&0x0003)<<4) -#define MCF_EPORT_EPPAR_EPPA3(x) (((x)&0x0003)<<6) -#define MCF_EPORT_EPPAR_EPPA4(x) (((x)&0x0003)<<8) -#define MCF_EPORT_EPPAR_EPPA5(x) (((x)&0x0003)<<10) -#define MCF_EPORT_EPPAR_EPPA6(x) (((x)&0x0003)<<12) -#define MCF_EPORT_EPPAR_EPPA7(x) (((x)&0x0003)<<14) -#define MCF_EPORT_EPPAR_EPPAx_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPAx_RISING (1) -#define MCF_EPORT_EPPAR_EPPAx_FALLING (2) -#define MCF_EPORT_EPPAR_EPPAx_BOTH (3) - -/* Bit definitions and macros for MCF_EPORT_EPDDR */ -#define MCF_EPORT_EPDDR_EPDD1 (0x02) -#define MCF_EPORT_EPDDR_EPDD2 (0x04) -#define MCF_EPORT_EPDDR_EPDD3 (0x08) -#define MCF_EPORT_EPDDR_EPDD4 (0x10) -#define MCF_EPORT_EPDDR_EPDD5 (0x20) -#define MCF_EPORT_EPDDR_EPDD6 (0x40) -#define MCF_EPORT_EPDDR_EPDD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPIER */ -#define MCF_EPORT_EPIER_EPIE1 (0x02) -#define MCF_EPORT_EPIER_EPIE2 (0x04) -#define MCF_EPORT_EPIER_EPIE3 (0x08) -#define MCF_EPORT_EPIER_EPIE4 (0x10) -#define MCF_EPORT_EPIER_EPIE5 (0x20) -#define MCF_EPORT_EPIER_EPIE6 (0x40) -#define MCF_EPORT_EPIER_EPIE7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPDR */ -#define MCF_EPORT_EPDR_EPD1 (0x02) -#define MCF_EPORT_EPDR_EPD2 (0x04) -#define MCF_EPORT_EPDR_EPD3 (0x08) -#define MCF_EPORT_EPDR_EPD4 (0x10) -#define MCF_EPORT_EPDR_EPD5 (0x20) -#define MCF_EPORT_EPDR_EPD6 (0x40) -#define MCF_EPORT_EPDR_EPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPPDR */ -#define MCF_EPORT_EPPDR_EPPD1 (0x02) -#define MCF_EPORT_EPPDR_EPPD2 (0x04) -#define MCF_EPORT_EPPDR_EPPD3 (0x08) -#define MCF_EPORT_EPPDR_EPPD4 (0x10) -#define MCF_EPORT_EPPDR_EPPD5 (0x20) -#define MCF_EPORT_EPPDR_EPPD6 (0x40) -#define MCF_EPORT_EPPDR_EPPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPFR */ -#define MCF_EPORT_EPFR_EPF1 (0x02) -#define MCF_EPORT_EPFR_EPF2 (0x04) -#define MCF_EPORT_EPFR_EPF3 (0x08) -#define MCF_EPORT_EPFR_EPF4 (0x10) -#define MCF_EPORT_EPFR_EPF5 (0x20) -#define MCF_EPORT_EPFR_EPF6 (0x40) -#define MCF_EPORT_EPFR_EPF7 (0x80) - -/********************************************************************/ - -#endif /* __MCF523X_EPORT_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_etpu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_etpu.h deleted file mode 100644 index 476be9b3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_etpu.h +++ /dev/null @@ -1,497 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_ETPU_H__ -#define __MCF523X_ETPU_H__ - -/********************************************************************* -* -* enhanced Time Processor Unit (ETPU) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_ETPU_EMCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0000])) -#define MCF_ETPU_ECDCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0004])) -#define MCF_ETPU_EMISCCR (*(vuint32*)(void*)(&__IPSBAR[0x1D000C])) -#define MCF_ETPU_ESCMODR (*(vuint32*)(void*)(&__IPSBAR[0x1D0010])) -#define MCF_ETPU_EECR (*(vuint32*)(void*)(&__IPSBAR[0x1D0014])) -#define MCF_ETPU_ETBCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0020])) -#define MCF_ETPU_ETB1R (*(vuint32*)(void*)(&__IPSBAR[0x1D0024])) -#define MCF_ETPU_ETB2R (*(vuint32*)(void*)(&__IPSBAR[0x1D0028])) -#define MCF_ETPU_EREDCR (*(vuint32*)(void*)(&__IPSBAR[0x1D002C])) -#define MCF_ETPU_ECISR (*(vuint32*)(void*)(&__IPSBAR[0x1D0200])) -#define MCF_ETPU_ECDTRSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0210])) -#define MCF_ETPU_ECIOSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0220])) -#define MCF_ETPU_ECDTROSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0230])) -#define MCF_ETPU_ECIER (*(vuint32*)(void*)(&__IPSBAR[0x1D0240])) -#define MCF_ETPU_ECDTRER (*(vuint32*)(void*)(&__IPSBAR[0x1D0250])) -#define MCF_ETPU_ECPSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0280])) -#define MCF_ETPU_ECSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0290])) -#define MCF_ETPU_EC0SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0404])) -#define MCF_ETPU_EC1SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0414])) -#define MCF_ETPU_EC2SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0424])) -#define MCF_ETPU_EC3SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0434])) -#define MCF_ETPU_EC4SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0444])) -#define MCF_ETPU_EC5SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0454])) -#define MCF_ETPU_EC6SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0464])) -#define MCF_ETPU_EC7SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0474])) -#define MCF_ETPU_EC8SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0484])) -#define MCF_ETPU_EC9SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0494])) -#define MCF_ETPU_EC10SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04A4])) -#define MCF_ETPU_EC11SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04B4])) -#define MCF_ETPU_EC12SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04C4])) -#define MCF_ETPU_EC13SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04D4])) -#define MCF_ETPU_EC14SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04E4])) -#define MCF_ETPU_EC15SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04F4])) -#define MCF_ETPU_EC16SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0504])) -#define MCF_ETPU_EC17SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0514])) -#define MCF_ETPU_EC18SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0524])) -#define MCF_ETPU_EC19SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0534])) -#define MCF_ETPU_EC20SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0544])) -#define MCF_ETPU_EC21SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0554])) -#define MCF_ETPU_EC22SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0564])) -#define MCF_ETPU_EC23SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0574])) -#define MCF_ETPU_EC24SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0584])) -#define MCF_ETPU_EC25SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0594])) -#define MCF_ETPU_EC26SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05A4])) -#define MCF_ETPU_EC27SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05B4])) -#define MCF_ETPU_EC28SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05C4])) -#define MCF_ETPU_EC29SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05D4])) -#define MCF_ETPU_EC30SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05E4])) -#define MCF_ETPU_EC31SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05F4])) -#define MCF_ETPU_ECnSCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1D0404+((x)*0x010)])) -#define MCF_ETPU_EC0CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0400])) -#define MCF_ETPU_EC1CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0410])) -#define MCF_ETPU_EC2CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0420])) -#define MCF_ETPU_EC3CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0430])) -#define MCF_ETPU_EC4CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0440])) -#define MCF_ETPU_EC5CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0450])) -#define MCF_ETPU_EC6CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0460])) -#define MCF_ETPU_EC7CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0470])) -#define MCF_ETPU_EC8CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0480])) -#define MCF_ETPU_EC9CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0490])) -#define MCF_ETPU_EC10CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04A0])) -#define MCF_ETPU_EC11CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04B0])) -#define MCF_ETPU_EC12CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04C0])) -#define MCF_ETPU_EC13CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04D0])) -#define MCF_ETPU_EC14CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04E0])) -#define MCF_ETPU_EC15CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04F0])) -#define MCF_ETPU_EC16CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0500])) -#define MCF_ETPU_EC17CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0510])) -#define MCF_ETPU_EC18CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0520])) -#define MCF_ETPU_EC19CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0530])) -#define MCF_ETPU_EC20CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0540])) -#define MCF_ETPU_EC21CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0550])) -#define MCF_ETPU_EC22CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0560])) -#define MCF_ETPU_EC23CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0570])) -#define MCF_ETPU_EC24CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0580])) -#define MCF_ETPU_EC25CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0590])) -#define MCF_ETPU_EC26CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05A0])) -#define MCF_ETPU_EC27CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05B0])) -#define MCF_ETPU_EC28CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05C0])) -#define MCF_ETPU_EC29CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05D0])) -#define MCF_ETPU_EC30CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05E0])) -#define MCF_ETPU_EC31CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05F0])) -#define MCF_ETPU_ECnCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1D0400+((x)*0x010)])) -#define MCF_ETPU_EC0HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0408])) -#define MCF_ETPU_EC1HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0418])) -#define MCF_ETPU_EC2HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0428])) -#define MCF_ETPU_EC3HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0438])) -#define MCF_ETPU_EC4HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0448])) -#define MCF_ETPU_EC5HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0458])) -#define MCF_ETPU_EC6HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0468])) -#define MCF_ETPU_EC7HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0478])) -#define MCF_ETPU_EC8HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0488])) -#define MCF_ETPU_EC9HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0498])) -#define MCF_ETPU_EC10HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04A8])) -#define MCF_ETPU_EC11HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04B8])) -#define MCF_ETPU_EC12HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04C8])) -#define MCF_ETPU_EC13HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04D8])) -#define MCF_ETPU_EC14HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04E8])) -#define MCF_ETPU_EC15HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04F8])) -#define MCF_ETPU_EC16HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0508])) -#define MCF_ETPU_EC17HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0518])) -#define MCF_ETPU_EC18HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0528])) -#define MCF_ETPU_EC19HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0538])) -#define MCF_ETPU_EC20HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0548])) -#define MCF_ETPU_EC21HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0558])) -#define MCF_ETPU_EC22HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0568])) -#define MCF_ETPU_EC23HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0578])) -#define MCF_ETPU_EC24HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0588])) -#define MCF_ETPU_EC25HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0598])) -#define MCF_ETPU_EC26HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05A8])) -#define MCF_ETPU_EC27HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05B8])) -#define MCF_ETPU_EC28HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05C8])) -#define MCF_ETPU_EC29HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05D8])) -#define MCF_ETPU_EC30HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05E8])) -#define MCF_ETPU_EC31HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05F8])) -#define MCF_ETPU_ECnHSSR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1D0408+((x)*0x010)])) - -/* Bit definitions and macros for MCF_ETPU_EMCR */ -#define MCF_ETPU_EMCR_GTBE (0x00000001) -#define MCF_ETPU_EMCR_VIS (0x00000040) -#define MCF_ETPU_EMCR_SCMMISEN (0x00000200) -#define MCF_ETPU_EMCR_SCMMISF (0x00000400) -#define MCF_ETPU_EMCR_SCMSIZE(x) (((x)&0x0000001F)<<16) -#define MCF_ETPU_EMCR_ILF2 (0x01000000) -#define MCF_ETPU_EMCR_ILF1 (0x02000000) -#define MCF_ETPU_EMCR_MGE2 (0x04000000) -#define MCF_ETPU_EMCR_MGE1 (0x08000000) -#define MCF_ETPU_EMCR_GEC (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDCR */ -#define MCF_ETPU_ECDCR_PARM1(x) (((x)&0x0000007F)<<0) -#define MCF_ETPU_ECDCR_WR (0x00000080) -#define MCF_ETPU_ECDCR_PARM0(x) (((x)&0x0000007F)<<8) -#define MCF_ETPU_ECDCR_PWIDTH (0x00008000) -#define MCF_ETPU_ECDCR_PBASE(x) (((x)&0x000003FF)<<16) -#define MCF_ETPU_ECDCR_CTBASE(x) (((x)&0x0000001F)<<26) -#define MCF_ETPU_ECDCR_STS (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_EECR */ -#define MCF_ETPU_EECR_ETB(x) (((x)&0x0000001F)<<0) -#define MCF_ETPU_EECR_CDFC(x) (((x)&0x00000003)<<14) -#define MCF_ETPU_EECR_FPSK(x) (((x)&0x00000007)<<16) -#define MCF_ETPU_EECR_HLTF (0x00800000) -#define MCF_ETPU_EECR_STF (0x10000000) -#define MCF_ETPU_EECR_MDIS (0x40000000) -#define MCF_ETPU_EECR_FEND (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ETBCR */ -#define MCF_ETPU_ETBCR_TCR1P(x) (((x)&0x000000FF)<<0) -#define MCF_ETPU_ETBCR_TCR1CTL(x) (((x)&0x00000003)<<14) -#define MCF_ETPU_ETBCR_TCR2P(x) (((x)&0x0000003F)<<16) -#define MCF_ETPU_ETBCR_AM (0x02000000) -#define MCF_ETPU_ETBCR_TCRCF(x) (((x)&0x00000003)<<27) -#define MCF_ETPU_ETBCR_TCR2CTL(x) (((x)&0x00000007)<<29) - -/* Bit definitions and macros for MCF_ETPU_ETB1R */ -#define MCF_ETPU_ETB1R_TCR1(x) (((x)&0x00FFFFFF)<<0) - -/* Bit definitions and macros for MCF_ETPU_ETB2R */ -#define MCF_ETPU_ETB2R_TCR2(x) (((x)&0x00FFFFFF)<<0) - -/* Bit definitions and macros for MCF_ETPU_EREDCR */ -#define MCF_ETPU_EREDCR_SRV2(x) (((x)&0x0000000F)<<0) -#define MCF_ETPU_EREDCR_SERVER_ID2(x) (((x)&0x0000000F)<<8) -#define MCF_ETPU_EREDCR_RSC2 (0x00004000) -#define MCF_ETPU_EREDCR_REN2 (0x00008000) -#define MCF_ETPU_EREDCR_SRV1(x) (((x)&0x0000000F)<<16) -#define MCF_ETPU_EREDCR_SERVER_ID1(x) (((x)&0x0000000F)<<24) -#define MCF_ETPU_EREDCR_RSC1 (0x40000000) -#define MCF_ETPU_EREDCR_REN1 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECISR */ -#define MCF_ETPU_ECISR_CIS0 (0x00000001) -#define MCF_ETPU_ECISR_CIS1 (0x00000002) -#define MCF_ETPU_ECISR_CIS2 (0x00000004) -#define MCF_ETPU_ECISR_CIS3 (0x00000008) -#define MCF_ETPU_ECISR_CIS4 (0x00000010) -#define MCF_ETPU_ECISR_CIS5 (0x00000020) -#define MCF_ETPU_ECISR_CIS6 (0x00000040) -#define MCF_ETPU_ECISR_CIS7 (0x00000080) -#define MCF_ETPU_ECISR_CIS8 (0x00000100) -#define MCF_ETPU_ECISR_CIS9 (0x00000200) -#define MCF_ETPU_ECISR_CIS10 (0x00000400) -#define MCF_ETPU_ECISR_CIS11 (0x00000800) -#define MCF_ETPU_ECISR_CIS12 (0x00001000) -#define MCF_ETPU_ECISR_CIS13 (0x00002000) -#define MCF_ETPU_ECISR_CIS14 (0x00004000) -#define MCF_ETPU_ECISR_CIS15 (0x00008000) -#define MCF_ETPU_ECISR_CIS16 (0x00010000) -#define MCF_ETPU_ECISR_CIS17 (0x00020000) -#define MCF_ETPU_ECISR_CIS18 (0x00040000) -#define MCF_ETPU_ECISR_CIS19 (0x00080000) -#define MCF_ETPU_ECISR_CIS20 (0x00100000) -#define MCF_ETPU_ECISR_CIS21 (0x00200000) -#define MCF_ETPU_ECISR_CIS22 (0x00400000) -#define MCF_ETPU_ECISR_CIS23 (0x00800000) -#define MCF_ETPU_ECISR_CIS24 (0x01000000) -#define MCF_ETPU_ECISR_CIS25 (0x02000000) -#define MCF_ETPU_ECISR_CIS26 (0x04000000) -#define MCF_ETPU_ECISR_CIS27 (0x08000000) -#define MCF_ETPU_ECISR_CIS28 (0x10000000) -#define MCF_ETPU_ECISR_CIS29 (0x20000000) -#define MCF_ETPU_ECISR_CIS30 (0x40000000) -#define MCF_ETPU_ECISR_CIS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDTRSR */ -#define MCF_ETPU_ECDTRSR_DTRS0 (0x00000001) -#define MCF_ETPU_ECDTRSR_DTRS1 (0x00000002) -#define MCF_ETPU_ECDTRSR_DTRS2 (0x00000004) -#define MCF_ETPU_ECDTRSR_DTRS3 (0x00000008) -#define MCF_ETPU_ECDTRSR_DTRS4 (0x00000010) -#define MCF_ETPU_ECDTRSR_DTRS5 (0x00000020) -#define MCF_ETPU_ECDTRSR_DTRS6 (0x00000040) -#define MCF_ETPU_ECDTRSR_DTRS7 (0x00000080) -#define MCF_ETPU_ECDTRSR_DTRS8 (0x00000100) -#define MCF_ETPU_ECDTRSR_DTRS9 (0x00000200) -#define MCF_ETPU_ECDTRSR_DTRS10 (0x00000400) -#define MCF_ETPU_ECDTRSR_DTRS11 (0x00000800) -#define MCF_ETPU_ECDTRSR_DTRS12 (0x00001000) -#define MCF_ETPU_ECDTRSR_DTRS13 (0x00002000) -#define MCF_ETPU_ECDTRSR_DTRS14 (0x00004000) -#define MCF_ETPU_ECDTRSR_DTRS15 (0x00008000) -#define MCF_ETPU_ECDTRSR_DTRS16 (0x00010000) -#define MCF_ETPU_ECDTRSR_DTRS17 (0x00020000) -#define MCF_ETPU_ECDTRSR_DTRS18 (0x00040000) -#define MCF_ETPU_ECDTRSR_DTRS19 (0x00080000) -#define MCF_ETPU_ECDTRSR_DTRS20 (0x00100000) -#define MCF_ETPU_ECDTRSR_DTRS21 (0x00200000) -#define MCF_ETPU_ECDTRSR_DTRS22 (0x00400000) -#define MCF_ETPU_ECDTRSR_DTRS23 (0x00800000) -#define MCF_ETPU_ECDTRSR_DTRS24 (0x01000000) -#define MCF_ETPU_ECDTRSR_DTRS25 (0x02000000) -#define MCF_ETPU_ECDTRSR_DTRS26 (0x04000000) -#define MCF_ETPU_ECDTRSR_DTRS27 (0x08000000) -#define MCF_ETPU_ECDTRSR_DTRS28 (0x10000000) -#define MCF_ETPU_ECDTRSR_DTRS29 (0x20000000) -#define MCF_ETPU_ECDTRSR_DTRS30 (0x40000000) -#define MCF_ETPU_ECDTRSR_DTRS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECIOSR */ -#define MCF_ETPU_ECIOSR_CIOS0 (0x00000001) -#define MCF_ETPU_ECIOSR_CIOS1 (0x00000002) -#define MCF_ETPU_ECIOSR_CIOS2 (0x00000004) -#define MCF_ETPU_ECIOSR_CIOS3 (0x00000008) -#define MCF_ETPU_ECIOSR_CIOS4 (0x00000010) -#define MCF_ETPU_ECIOSR_CIOS5 (0x00000020) -#define MCF_ETPU_ECIOSR_CIOS6 (0x00000040) -#define MCF_ETPU_ECIOSR_CIOS7 (0x00000080) -#define MCF_ETPU_ECIOSR_CIOS8 (0x00000100) -#define MCF_ETPU_ECIOSR_CIOS9 (0x00000200) -#define MCF_ETPU_ECIOSR_CIOS10 (0x00000400) -#define MCF_ETPU_ECIOSR_CIOS11 (0x00000800) -#define MCF_ETPU_ECIOSR_CIOS12 (0x00001000) -#define MCF_ETPU_ECIOSR_CIOS13 (0x00002000) -#define MCF_ETPU_ECIOSR_CIOS14 (0x00004000) -#define MCF_ETPU_ECIOSR_CIOS15 (0x00008000) -#define MCF_ETPU_ECIOSR_CIOS16 (0x00010000) -#define MCF_ETPU_ECIOSR_CIOS17 (0x00020000) -#define MCF_ETPU_ECIOSR_CIOS18 (0x00040000) -#define MCF_ETPU_ECIOSR_CIOS19 (0x00080000) -#define MCF_ETPU_ECIOSR_CIOS20 (0x00100000) -#define MCF_ETPU_ECIOSR_CIOS21 (0x00200000) -#define MCF_ETPU_ECIOSR_CIOS22 (0x00400000) -#define MCF_ETPU_ECIOSR_CIOS23 (0x00800000) -#define MCF_ETPU_ECIOSR_CIOS24 (0x01000000) -#define MCF_ETPU_ECIOSR_CIOS25 (0x02000000) -#define MCF_ETPU_ECIOSR_CIOS26 (0x04000000) -#define MCF_ETPU_ECIOSR_CIOS27 (0x08000000) -#define MCF_ETPU_ECIOSR_CIOS28 (0x10000000) -#define MCF_ETPU_ECIOSR_CIOS29 (0x20000000) -#define MCF_ETPU_ECIOSR_CIOS30 (0x40000000) -#define MCF_ETPU_ECIOSR_CIOS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDTROSR */ -#define MCF_ETPU_ECDTROSR_DTROS0 (0x00000001) -#define MCF_ETPU_ECDTROSR_DTROS1 (0x00000002) -#define MCF_ETPU_ECDTROSR_DTROS2 (0x00000004) -#define MCF_ETPU_ECDTROSR_DTROS3 (0x00000008) -#define MCF_ETPU_ECDTROSR_DTROS4 (0x00000010) -#define MCF_ETPU_ECDTROSR_DTROS5 (0x00000020) -#define MCF_ETPU_ECDTROSR_DTROS6 (0x00000040) -#define MCF_ETPU_ECDTROSR_DTROS7 (0x00000080) -#define MCF_ETPU_ECDTROSR_DTROS8 (0x00000100) -#define MCF_ETPU_ECDTROSR_DTROS9 (0x00000200) -#define MCF_ETPU_ECDTROSR_DTROS10 (0x00000400) -#define MCF_ETPU_ECDTROSR_DTROS11 (0x00000800) -#define MCF_ETPU_ECDTROSR_DTROS12 (0x00001000) -#define MCF_ETPU_ECDTROSR_DTROS13 (0x00002000) -#define MCF_ETPU_ECDTROSR_DTROS14 (0x00004000) -#define MCF_ETPU_ECDTROSR_DTROS15 (0x00008000) -#define MCF_ETPU_ECDTROSR_DTROS16 (0x00010000) -#define MCF_ETPU_ECDTROSR_DTROS17 (0x00020000) -#define MCF_ETPU_ECDTROSR_DTROS18 (0x00040000) -#define MCF_ETPU_ECDTROSR_DTROS19 (0x00080000) -#define MCF_ETPU_ECDTROSR_DTROS20 (0x00100000) -#define MCF_ETPU_ECDTROSR_DTROS21 (0x00200000) -#define MCF_ETPU_ECDTROSR_DTROS22 (0x00400000) -#define MCF_ETPU_ECDTROSR_DTROS23 (0x00800000) -#define MCF_ETPU_ECDTROSR_DTROS24 (0x01000000) -#define MCF_ETPU_ECDTROSR_DTROS25 (0x02000000) -#define MCF_ETPU_ECDTROSR_DTROS26 (0x04000000) -#define MCF_ETPU_ECDTROSR_DTROS27 (0x08000000) -#define MCF_ETPU_ECDTROSR_DTROS28 (0x10000000) -#define MCF_ETPU_ECDTROSR_DTROS29 (0x20000000) -#define MCF_ETPU_ECDTROSR_DTROS30 (0x40000000) -#define MCF_ETPU_ECDTROSR_DTROS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECIER */ -#define MCF_ETPU_ECIER_CIE0 (0x00000001) -#define MCF_ETPU_ECIER_CIE1 (0x00000002) -#define MCF_ETPU_ECIER_CIE2 (0x00000004) -#define MCF_ETPU_ECIER_CIE3 (0x00000008) -#define MCF_ETPU_ECIER_CIE4 (0x00000010) -#define MCF_ETPU_ECIER_CIE5 (0x00000020) -#define MCF_ETPU_ECIER_CIE6 (0x00000040) -#define MCF_ETPU_ECIER_CIE7 (0x00000080) -#define MCF_ETPU_ECIER_CIE8 (0x00000100) -#define MCF_ETPU_ECIER_CIE9 (0x00000200) -#define MCF_ETPU_ECIER_CIE10 (0x00000400) -#define MCF_ETPU_ECIER_CIE11 (0x00000800) -#define MCF_ETPU_ECIER_CIE12 (0x00001000) -#define MCF_ETPU_ECIER_CIE13 (0x00002000) -#define MCF_ETPU_ECIER_CIE14 (0x00004000) -#define MCF_ETPU_ECIER_CIE15 (0x00008000) -#define MCF_ETPU_ECIER_CIE16 (0x00010000) -#define MCF_ETPU_ECIER_CIE17 (0x00020000) -#define MCF_ETPU_ECIER_CIE18 (0x00040000) -#define MCF_ETPU_ECIER_CIE19 (0x00080000) -#define MCF_ETPU_ECIER_CIE20 (0x00100000) -#define MCF_ETPU_ECIER_CIE21 (0x00200000) -#define MCF_ETPU_ECIER_CIE22 (0x00400000) -#define MCF_ETPU_ECIER_CIE23 (0x00800000) -#define MCF_ETPU_ECIER_CIE24 (0x01000000) -#define MCF_ETPU_ECIER_CIE25 (0x02000000) -#define MCF_ETPU_ECIER_CIE26 (0x04000000) -#define MCF_ETPU_ECIER_CIE27 (0x08000000) -#define MCF_ETPU_ECIER_CIE28 (0x10000000) -#define MCF_ETPU_ECIER_CIE29 (0x20000000) -#define MCF_ETPU_ECIER_CIE30 (0x40000000) -#define MCF_ETPU_ECIER_CIE31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDTRER */ -#define MCF_ETPU_ECDTRER_DTRE0 (0x00000001) -#define MCF_ETPU_ECDTRER_DTRE1 (0x00000002) -#define MCF_ETPU_ECDTRER_DTRE2 (0x00000004) -#define MCF_ETPU_ECDTRER_DTRE3 (0x00000008) -#define MCF_ETPU_ECDTRER_DTRE4 (0x00000010) -#define MCF_ETPU_ECDTRER_DTRE5 (0x00000020) -#define MCF_ETPU_ECDTRER_DTRE6 (0x00000040) -#define MCF_ETPU_ECDTRER_DTRE7 (0x00000080) -#define MCF_ETPU_ECDTRER_DTRE8 (0x00000100) -#define MCF_ETPU_ECDTRER_DTRE9 (0x00000200) -#define MCF_ETPU_ECDTRER_DTRE10 (0x00000400) -#define MCF_ETPU_ECDTRER_DTRE11 (0x00000800) -#define MCF_ETPU_ECDTRER_DTRE12 (0x00001000) -#define MCF_ETPU_ECDTRER_DTRE13 (0x00002000) -#define MCF_ETPU_ECDTRER_DTRE14 (0x00004000) -#define MCF_ETPU_ECDTRER_DTRE15 (0x00008000) -#define MCF_ETPU_ECDTRER_DTRE16 (0x00010000) -#define MCF_ETPU_ECDTRER_DTRE17 (0x00020000) -#define MCF_ETPU_ECDTRER_DTRE18 (0x00040000) -#define MCF_ETPU_ECDTRER_DTRE19 (0x00080000) -#define MCF_ETPU_ECDTRER_DTRE20 (0x00100000) -#define MCF_ETPU_ECDTRER_DTRE21 (0x00200000) -#define MCF_ETPU_ECDTRER_DTRE22 (0x00400000) -#define MCF_ETPU_ECDTRER_DTRE23 (0x00800000) -#define MCF_ETPU_ECDTRER_DTRE24 (0x01000000) -#define MCF_ETPU_ECDTRER_DTRE25 (0x02000000) -#define MCF_ETPU_ECDTRER_DTRE26 (0x04000000) -#define MCF_ETPU_ECDTRER_DTRE27 (0x08000000) -#define MCF_ETPU_ECDTRER_DTRE28 (0x10000000) -#define MCF_ETPU_ECDTRER_DTRE29 (0x20000000) -#define MCF_ETPU_ECDTRER_DTRE30 (0x40000000) -#define MCF_ETPU_ECDTRER_DTRE31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECPSSR */ -#define MCF_ETPU_ECPSSR_SR0 (0x00000001) -#define MCF_ETPU_ECPSSR_SR1 (0x00000002) -#define MCF_ETPU_ECPSSR_SR2 (0x00000004) -#define MCF_ETPU_ECPSSR_SR3 (0x00000008) -#define MCF_ETPU_ECPSSR_SR4 (0x00000010) -#define MCF_ETPU_ECPSSR_SR5 (0x00000020) -#define MCF_ETPU_ECPSSR_SR6 (0x00000040) -#define MCF_ETPU_ECPSSR_SR7 (0x00000080) -#define MCF_ETPU_ECPSSR_SR8 (0x00000100) -#define MCF_ETPU_ECPSSR_SR9 (0x00000200) -#define MCF_ETPU_ECPSSR_SR10 (0x00000400) -#define MCF_ETPU_ECPSSR_SR11 (0x00000800) -#define MCF_ETPU_ECPSSR_SR12 (0x00001000) -#define MCF_ETPU_ECPSSR_SR13 (0x00002000) -#define MCF_ETPU_ECPSSR_SR14 (0x00004000) -#define MCF_ETPU_ECPSSR_SR15 (0x00008000) -#define MCF_ETPU_ECPSSR_SR16 (0x00010000) -#define MCF_ETPU_ECPSSR_SR17 (0x00020000) -#define MCF_ETPU_ECPSSR_SR18 (0x00040000) -#define MCF_ETPU_ECPSSR_SR19 (0x00080000) -#define MCF_ETPU_ECPSSR_SR20 (0x00100000) -#define MCF_ETPU_ECPSSR_SR21 (0x00200000) -#define MCF_ETPU_ECPSSR_SR22 (0x00400000) -#define MCF_ETPU_ECPSSR_SR23 (0x00800000) -#define MCF_ETPU_ECPSSR_SR24 (0x01000000) -#define MCF_ETPU_ECPSSR_SR25 (0x02000000) -#define MCF_ETPU_ECPSSR_SR26 (0x04000000) -#define MCF_ETPU_ECPSSR_SR27 (0x08000000) -#define MCF_ETPU_ECPSSR_SR28 (0x10000000) -#define MCF_ETPU_ECPSSR_SR29 (0x20000000) -#define MCF_ETPU_ECPSSR_SR30 (0x40000000) -#define MCF_ETPU_ECPSSR_SR31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECSSR */ -#define MCF_ETPU_ECSSR_SS0 (0x00000001) -#define MCF_ETPU_ECSSR_SS1 (0x00000002) -#define MCF_ETPU_ECSSR_SS2 (0x00000004) -#define MCF_ETPU_ECSSR_SS3 (0x00000008) -#define MCF_ETPU_ECSSR_SS4 (0x00000010) -#define MCF_ETPU_ECSSR_SS5 (0x00000020) -#define MCF_ETPU_ECSSR_SS6 (0x00000040) -#define MCF_ETPU_ECSSR_SS7 (0x00000080) -#define MCF_ETPU_ECSSR_SS8 (0x00000100) -#define MCF_ETPU_ECSSR_SS9 (0x00000200) -#define MCF_ETPU_ECSSR_SS10 (0x00000400) -#define MCF_ETPU_ECSSR_SS11 (0x00000800) -#define MCF_ETPU_ECSSR_SS12 (0x00001000) -#define MCF_ETPU_ECSSR_SS13 (0x00002000) -#define MCF_ETPU_ECSSR_SS14 (0x00004000) -#define MCF_ETPU_ECSSR_SS15 (0x00008000) -#define MCF_ETPU_ECSSR_SS16 (0x00010000) -#define MCF_ETPU_ECSSR_SS17 (0x00020000) -#define MCF_ETPU_ECSSR_SS18 (0x00040000) -#define MCF_ETPU_ECSSR_SS19 (0x00080000) -#define MCF_ETPU_ECSSR_SS20 (0x00100000) -#define MCF_ETPU_ECSSR_SS21 (0x00200000) -#define MCF_ETPU_ECSSR_SS22 (0x00400000) -#define MCF_ETPU_ECSSR_SS23 (0x00800000) -#define MCF_ETPU_ECSSR_SS24 (0x01000000) -#define MCF_ETPU_ECSSR_SS25 (0x02000000) -#define MCF_ETPU_ECSSR_SS26 (0x04000000) -#define MCF_ETPU_ECSSR_SS27 (0x08000000) -#define MCF_ETPU_ECSSR_SS28 (0x10000000) -#define MCF_ETPU_ECSSR_SS29 (0x20000000) -#define MCF_ETPU_ECSSR_SS30 (0x40000000) -#define MCF_ETPU_ECSSR_SS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECnSCR */ -#define MCF_ETPU_ECnSCR_FM(x) (((x)&0x00000003)<<0) -#define MCF_ETPU_ECnSCR_OBE (0x00002000) -#define MCF_ETPU_ECnSCR_OPS (0x00004000) -#define MCF_ETPU_ECnSCR_IPS (0x00008000) -#define MCF_ETPU_ECnSCR_DTROS (0x00400000) -#define MCF_ETPU_ECnSCR_DTRS (0x00800000) -#define MCF_ETPU_ECnSCR_CIOS (0x40000000) -#define MCF_ETPU_ECnSCR_CIS (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECnCR */ -#define MCF_ETPU_ECnCR_CPBA(x) (((x)&0x000007FF)<<0) -#define MCF_ETPU_ECnCR_OPOL (0x00004000) -#define MCF_ETPU_ECnCR_ODIS (0x00008000) -#define MCF_ETPU_ECnCR_CFS(x) (((x)&0x0000001F)<<16) -#define MCF_ETPU_ECnCR_ETCS (0x01000000) -#define MCF_ETPU_ECnCR_CPR(x) (((x)&0x00000003)<<28) -#define MCF_ETPU_ECnCR_DTRE (0x40000000) -#define MCF_ETPU_ECnCR_CIE (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECnHSSR */ -#define MCF_ETPU_ECnHSSR_HSR(x) (((x)&0x00000007)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_ETPU_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_etpu_struc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_etpu_struc.h deleted file mode 100644 index f35278a0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_etpu_struc.h +++ /dev/null @@ -1,919 +0,0 @@ -/**************************************************************************/ -/* FILE NAME: mcf523x_eTPU_struc.h */ -/* COPYRIGHT (c) Freescale Semiconductor 2004 */ -/* VERSION: 0.02 All Rights Reserved */ -/* */ -/* DESCRIPTION: */ -/* This file contains eTPU register and bit field definitions for MCF523x.*/ -/* Part of mpc5554.h auto-generated code by J.Loeliger. */ -/*========================================================================*/ -/* UPDATE HISTORY */ -/* REV AUTHOR DATE DESCRIPTION OF CHANGE */ -/* --- ----------- --------- --------------------- */ -/* 0.01 J.Loeliger 30/Apr/04 Initial version of file. */ -/* M.Princ */ -/* 0.02 J.Loeliger 20/Jul/04 Update eTPU structure to match mpc5554.*/ -/**************************************************************************/ - - -#ifndef _MCF523x_eTPU_struc_H_ -#define _MCF523x_eTPU_struc_H_ - -#include "typedefs.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef __MWERKS__ -#pragma push -#pragma ANSI_strict off -#endif - -/***************************Configuration Registers**************************/ - - struct ETPU_tag { - union { /* MODULE CONFIGURATION REGISTER */ - vuint32_t R; - struct { - vuint32_t GEC:1; /* Global Exception Clear */ - vuint32_t:3; - vuint32_t MGE1:1; /* Microcode Global Exception-ETPU_A */ - - vuint32_t MGE2:1; /* Microcode Global Exception-ETPU_B */ - - vuint32_t ILF1:1; /* Illegal Instruction Flag-ETPU_A */ - - vuint32_t ILF2:1; /* Illegal Instruction Flag-ETPU_B */ - - vuint32_t:3; - vuint32_t SCMSIZE:5; /* Shared Code Memory size */ - vuint32_t:5; - vuint32_t SCMMISF:1; /* SCM MISC Flag */ - vuint32_t SCMMISEN:1; /* SCM MISC Enable */ - vuint32_t:2; - vuint32_t VIS:1; /* SCM Visability */ - vuint32_t:5; - vuint32_t GTBE:1; /* Global Time Base Enable */ - } B; - } MCR; - - union { /* COHERENT DUAL-PARAMETER CONTROL */ - vuint32_t R; - struct { - vuint32_t STS:1; /* Start Status bit */ - vuint32_t CTBASE:5; /* Channel Transfer Base */ - vuint32_t PBASE:10; /* Parameter Buffer Base Address */ - vuint32_t PWIDTH:1; /* Parameter Width */ - vuint32_t PARAM0:7; /* Channel Parameter 0 */ - vuint32_t WR:1; - vuint32_t PARAM1:7; /* Channel Parameter 1 */ - } B; - } CDCR; - - uint32_t etpu_reserved1; - - union { /* MISC Compare Register */ - uint32_t R; - } MISCCMPR; - - uint32_t etpu_reserved2; - - union { /* ETPU_A Configuration Register */ - vuint32_t R; - struct { - vuint32_t FEND:1; /* Force END */ - vuint32_t MDIS:1; /* Low power Stop */ - vuint32_t:1; - vuint32_t STF:1; /* Stop Flag */ - vuint32_t:4; - vuint32_t HLTF:1; /* Halt Mode Flag */ - vuint32_t:4; - vuint32_t FPSCK:3; /* Filter Prescaler Clock Control */ - vuint32_t CDFC:2; - vuint32_t:9; - vuint32_t ETB:5; /* Entry Table Base */ - } B; - } ECR_A; - - union { /* ETPU_B Configuration Register */ - vuint32_t R; - struct { - vuint32_t FEND:1; /* Force END */ - vuint32_t MDIS:1; /* Low power Stop */ - vuint32_t:1; - vuint32_t STF:1; /* Stop Flag */ - vuint32_t:4; - vuint32_t HLTF:1; /* Halt Mode Flag */ - vuint32_t:4; - vuint32_t FPSCK:3; /* Filter Prescaler Clock Control */ - vuint32_t CDFC:2; - vuint32_t:9; - vuint32_t ETB:5; /* Entry Table Base */ - } B; - } ECR_B; - - uint32_t etpu_reserved4; - - union { /* ETPU_A Timebase Configuration Register */ - uint32_t R; - struct { - uint32_t TCR2CTL:3; /* TCR2 Clock/Gate Control */ - uint32_t TCRCF:2; /* TCRCLK Signal Filter Control */ - uint32_t:1; - uint32_t AM:1; /* Angle Mode */ - uint32_t:3; - uint32_t TCR2P:6; /* TCR2 Prescaler Control */ - uint32_t TCR1CTL:2; /* TCR1 Clock/Gate Control */ - uint32_t:6; - uint32_t TCR1P:8; /* TCR1 Prescaler Control */ - } B; - } TBCR_A; - - union { /* ETPU_A TCR1 Visibility Register */ - vuint32_t R; - } TB1R_A; - - union { /* ETPU_A TCR2 Visibility Register */ - vuint32_t R; - } TB2R_A; - - union { /* ETPU_A STAC Configuration Register */ - vuint32_t R; - struct { - vuint32_t REN1:1; /* Resource Enable TCR1 */ - vuint32_t RSC1:1; /* Resource Control TCR1 */ - vuint32_t VALID1:1; /* TCR1 Server Valid */ - vuint32_t:9; - vuint32_t SRV1:4; /* Resource Server Slot */ - vuint32_t REN2:1; /* Resource Enable TCR2 */ - vuint32_t RSC2:1; /* Resource Control TCR2 */ - vuint32_t VALID2:1; /* TCR2 Server Valid */ - vuint32_t:9; - vuint32_t SRV2:4; /* Resource Server Slot */ - } B; - } REDCR_A; - - uint32_t etpu_reserved5[4]; - - union { /* ETPU_B Timebase Configuration Register */ - uint32_t R; - struct { - uint32_t TCR2CTL:3; /* TCR2 Clock/Gate Control */ - uint32_t TCRCF:2; /* TCRCLK Signal Filter Control */ - uint32_t:1; - uint32_t AM:1; /* Angle Mode */ - uint32_t:3; - uint32_t TCR2P:6; /* TCR2 Prescaler Control */ - uint32_t TCR1CTL:2; /* TCR1 Clock/Gate Control */ - uint32_t:6; - uint32_t TCR1P:8; /* TCR1 Prescaler Control */ - } B; - } TBCR_B; - - union { /* ETPU_B TCR1 Visibility Register */ - vuint32_t R; - } TB1R_B; - - union { /* ETPU_B TCR2 Visibility Register */ - vuint32_t R; - } TB2R_B; - - union { /* ETPU_B STAC Configuration Register */ - vuint32_t R; - struct { - vuint32_t REN1:1; /* Resource Enable TCR1 */ - vuint32_t RSC1:1; /* Resource Control TCR1 */ - vuint32_t VALID1:1; /* TCR1 Server Valid */ - vuint32_t:9; - vuint32_t SRV1:4; /* Resource Server Slot */ - vuint32_t REN2:1; /* Resource Enable TCR2 */ - vuint32_t RSC2:1; /* Resource Control TCR2 */ - vuint32_t VALID2:1; /* TCR2 Server Valid */ - vuint32_t:9; - vuint32_t SRV2:4; /* Resource Server Slot */ - } B; - } REDCR_B; - - uint32_t etpu_reserved7[108]; - -/*****************************Status and Control Registers**************************/ - - union { /* ETPU_A Channel Interrut Status */ - vuint32_t R; - struct { - vuint32_t CIS31:1; /* Channel 31 Interrut Status */ - vuint32_t CIS30:1; /* Channel 30 Interrut Status */ - vuint32_t CIS29:1; /* Channel 29 Interrut Status */ - vuint32_t CIS28:1; /* Channel 28 Interrut Status */ - vuint32_t CIS27:1; /* Channel 27 Interrut Status */ - vuint32_t CIS26:1; /* Channel 26 Interrut Status */ - vuint32_t CIS25:1; /* Channel 25 Interrut Status */ - vuint32_t CIS24:1; /* Channel 24 Interrut Status */ - vuint32_t CIS23:1; /* Channel 23 Interrut Status */ - vuint32_t CIS22:1; /* Channel 22 Interrut Status */ - vuint32_t CIS21:1; /* Channel 21 Interrut Status */ - vuint32_t CIS20:1; /* Channel 20 Interrut Status */ - vuint32_t CIS19:1; /* Channel 19 Interrut Status */ - vuint32_t CIS18:1; /* Channel 18 Interrut Status */ - vuint32_t CIS17:1; /* Channel 17 Interrut Status */ - vuint32_t CIS16:1; /* Channel 16 Interrut Status */ - vuint32_t CIS15:1; /* Channel 15 Interrut Status */ - vuint32_t CIS14:1; /* Channel 14 Interrut Status */ - vuint32_t CIS13:1; /* Channel 13 Interrut Status */ - vuint32_t CIS12:1; /* Channel 12 Interrut Status */ - vuint32_t CIS11:1; /* Channel 11 Interrut Status */ - vuint32_t CIS10:1; /* Channel 10 Interrut Status */ - vuint32_t CIS9:1; /* Channel 9 Interrut Status */ - vuint32_t CIS8:1; /* Channel 8 Interrut Status */ - vuint32_t CIS7:1; /* Channel 7 Interrut Status */ - vuint32_t CIS6:1; /* Channel 6 Interrut Status */ - vuint32_t CIS5:1; /* Channel 5 Interrut Status */ - vuint32_t CIS4:1; /* Channel 4 Interrut Status */ - vuint32_t CIS3:1; /* Channel 3 Interrut Status */ - vuint32_t CIS2:1; /* Channel 2 Interrut Status */ - vuint32_t CIS1:1; /* Channel 1 Interrut Status */ - vuint32_t CIS0:1; /* Channel 0 Interrut Status */ - } B; - } CISR_A; - - union { /* ETPU_B Channel Interruput Status */ - vuint32_t R; - struct { - vuint32_t CIS31:1; /* Channel 31 Interrut Status */ - vuint32_t CIS30:1; /* Channel 30 Interrut Status */ - vuint32_t CIS29:1; /* Channel 29 Interrut Status */ - vuint32_t CIS28:1; /* Channel 28 Interrut Status */ - vuint32_t CIS27:1; /* Channel 27 Interrut Status */ - vuint32_t CIS26:1; /* Channel 26 Interrut Status */ - vuint32_t CIS25:1; /* Channel 25 Interrut Status */ - vuint32_t CIS24:1; /* Channel 24 Interrut Status */ - vuint32_t CIS23:1; /* Channel 23 Interrut Status */ - vuint32_t CIS22:1; /* Channel 22 Interrut Status */ - vuint32_t CIS21:1; /* Channel 21 Interrut Status */ - vuint32_t CIS20:1; /* Channel 20 Interrut Status */ - vuint32_t CIS19:1; /* Channel 19 Interrut Status */ - vuint32_t CIS18:1; /* Channel 18 Interrut Status */ - vuint32_t CIS17:1; /* Channel 17 Interrut Status */ - vuint32_t CIS16:1; /* Channel 16 Interrut Status */ - vuint32_t CIS15:1; /* Channel 15 Interrut Status */ - vuint32_t CIS14:1; /* Channel 14 Interrut Status */ - vuint32_t CIS13:1; /* Channel 13 Interrut Status */ - vuint32_t CIS12:1; /* Channel 12 Interrut Status */ - vuint32_t CIS11:1; /* Channel 11 Interrut Status */ - vuint32_t CIS10:1; /* Channel 10 Interrut Status */ - vuint32_t CIS9:1; /* Channel 9 Interrut Status */ - vuint32_t CIS8:1; /* Channel 8 Interrut Status */ - vuint32_t CIS7:1; /* Channel 7 Interrut Status */ - vuint32_t CIS6:1; /* Channel 6 Interrut Status */ - vuint32_t CIS5:1; /* Channel 5 Interrut Status */ - vuint32_t CIS4:1; /* Channel 4 Interrut Status */ - vuint32_t CIS3:1; /* Channel 3 Interrut Status */ - vuint32_t CIS2:1; /* Channel 2 Interrut Status */ - vuint32_t CIS1:1; /* Channel 1 Interrupt Status */ - vuint32_t CIS0:1; /* Channel 0 Interrupt Status */ - } B; - } CISR_B; - - uint32_t etpu_reserved9[2]; - - union { /* ETPU_A Data Transfer Request Status */ - vuint32_t R; - struct { - vuint32_t DTRS31:1; /* Channel 31 Data Transfer Request Status */ - vuint32_t DTRS30:1; /* Channel 30 Data Transfer Request Status */ - vuint32_t DTRS29:1; /* Channel 29 Data Transfer Request Status */ - vuint32_t DTRS28:1; /* Channel 28 Data Transfer Request Status */ - vuint32_t DTRS27:1; /* Channel 27 Data Transfer Request Status */ - vuint32_t DTRS26:1; /* Channel 26 Data Transfer Request Status */ - vuint32_t DTRS25:1; /* Channel 25 Data Transfer Request Status */ - vuint32_t DTRS24:1; /* Channel 24 Data Transfer Request Status */ - vuint32_t DTRS23:1; /* Channel 23 Data Transfer Request Status */ - vuint32_t DTRS22:1; /* Channel 22 Data Transfer Request Status */ - vuint32_t DTRS21:1; /* Channel 21 Data Transfer Request Status */ - vuint32_t DTRS20:1; /* Channel 20 Data Transfer Request Status */ - vuint32_t DTRS19:1; /* Channel 19 Data Transfer Request Status */ - vuint32_t DTRS18:1; /* Channel 18 Data Transfer Request Status */ - vuint32_t DTRS17:1; /* Channel 17 Data Transfer Request Status */ - vuint32_t DTRS16:1; /* Channel 16 Data Transfer Request Status */ - vuint32_t DTRS15:1; /* Channel 15 Data Transfer Request Status */ - vuint32_t DTRS14:1; /* Channel 14 Data Transfer Request Status */ - vuint32_t DTRS13:1; /* Channel 13 Data Transfer Request Status */ - vuint32_t DTRS12:1; /* Channel 12 Data Transfer Request Status */ - vuint32_t DTRS11:1; /* Channel 11 Data Transfer Request Status */ - vuint32_t DTRS10:1; /* Channel 10 Data Transfer Request Status */ - vuint32_t DTRS9:1; /* Channel 9 Data Transfer Request Status */ - vuint32_t DTRS8:1; /* Channel 8 Data Transfer Request Status */ - vuint32_t DTRS7:1; /* Channel 7 Data Transfer Request Status */ - vuint32_t DTRS6:1; /* Channel 6 Data Transfer Request Status */ - vuint32_t DTRS5:1; /* Channel 5 Data Transfer Request Status */ - vuint32_t DTRS4:1; /* Channel 4 Data Transfer Request Status */ - vuint32_t DTRS3:1; /* Channel 3 Data Transfer Request Status */ - vuint32_t DTRS2:1; /* Channel 2 Data Transfer Request Status */ - vuint32_t DTRS1:1; /* Channel 1 Data Transfer Request Status */ - vuint32_t DTRS0:1; /* Channel 0 Data Transfer Request Status */ - } B; - } CDTRSR_A; - - union { /* ETPU_B Data Transfer Request Status */ - vuint32_t R; - struct { - vuint32_t DTRS31:1; /* Channel 31 Data Transfer Request Status */ - vuint32_t DTRS30:1; /* Channel 30 Data Transfer Request Status */ - vuint32_t DTRS29:1; /* Channel 29 Data Transfer Request Status */ - vuint32_t DTRS28:1; /* Channel 28 Data Transfer Request Status */ - vuint32_t DTRS27:1; /* Channel 27 Data Transfer Request Status */ - vuint32_t DTRS26:1; /* Channel 26 Data Transfer Request Status */ - vuint32_t DTRS25:1; /* Channel 25 Data Transfer Request Status */ - vuint32_t DTRS24:1; /* Channel 24 Data Transfer Request Status */ - vuint32_t DTRS23:1; /* Channel 23 Data Transfer Request Status */ - vuint32_t DTRS22:1; /* Channel 22 Data Transfer Request Status */ - vuint32_t DTRS21:1; /* Channel 21 Data Transfer Request Status */ - vuint32_t DTRS20:1; /* Channel 20 Data Transfer Request Status */ - vuint32_t DTRS19:1; /* Channel 19 Data Transfer Request Status */ - vuint32_t DTRS18:1; /* Channel 18 Data Transfer Request Status */ - vuint32_t DTRS17:1; /* Channel 17 Data Transfer Request Status */ - vuint32_t DTRS16:1; /* Channel 16 Data Transfer Request Status */ - vuint32_t DTRS15:1; /* Channel 15 Data Transfer Request Status */ - vuint32_t DTRS14:1; /* Channel 14 Data Transfer Request Status */ - vuint32_t DTRS13:1; /* Channel 13 Data Transfer Request Status */ - vuint32_t DTRS12:1; /* Channel 12 Data Transfer Request Status */ - vuint32_t DTRS11:1; /* Channel 11 Data Transfer Request Status */ - vuint32_t DTRS10:1; /* Channel 10 Data Transfer Request Status */ - vuint32_t DTRS9:1; /* Channel 9 Data Transfer Request Status */ - vuint32_t DTRS8:1; /* Channel 8 Data Transfer Request Status */ - vuint32_t DTRS7:1; /* Channel 7 Data Transfer Request Status */ - vuint32_t DTRS6:1; /* Channel 6 Data Transfer Request Status */ - vuint32_t DTRS5:1; /* Channel 5 Data Transfer Request Status */ - vuint32_t DTRS4:1; /* Channel 4 Data Transfer Request Status */ - vuint32_t DTRS3:1; /* Channel 3 Data Transfer Request Status */ - vuint32_t DTRS2:1; /* Channel 2 Data Transfer Request Status */ - vuint32_t DTRS1:1; /* Channel 1 Data Transfer Request Status */ - vuint32_t DTRS0:1; /* Channel 0 Data Transfer Request Status */ - } B; - } CDTRSR_B; - - uint32_t etpu_reserved11[2]; - - union { /* ETPU_A Interruput Overflow Status */ - vuint32_t R; - struct { - vuint32_t CIOS31:1; /* Channel 31 Interruput Overflow Status */ - vuint32_t CIOS30:1; /* Channel 30 Interruput Overflow Status */ - vuint32_t CIOS29:1; /* Channel 29 Interruput Overflow Status */ - vuint32_t CIOS28:1; /* Channel 28 Interruput Overflow Status */ - vuint32_t CIOS27:1; /* Channel 27 Interruput Overflow Status */ - vuint32_t CIOS26:1; /* Channel 26 Interruput Overflow Status */ - vuint32_t CIOS25:1; /* Channel 25 Interruput Overflow Status */ - vuint32_t CIOS24:1; /* Channel 24 Interruput Overflow Status */ - vuint32_t CIOS23:1; /* Channel 23 Interruput Overflow Status */ - vuint32_t CIOS22:1; /* Channel 22 Interruput Overflow Status */ - vuint32_t CIOS21:1; /* Channel 21 Interruput Overflow Status */ - vuint32_t CIOS20:1; /* Channel 20 Interruput Overflow Status */ - vuint32_t CIOS19:1; /* Channel 19 Interruput Overflow Status */ - vuint32_t CIOS18:1; /* Channel 18 Interruput Overflow Status */ - vuint32_t CIOS17:1; /* Channel 17 Interruput Overflow Status */ - vuint32_t CIOS16:1; /* Channel 16 Interruput Overflow Status */ - vuint32_t CIOS15:1; /* Channel 15 Interruput Overflow Status */ - vuint32_t CIOS14:1; /* Channel 14 Interruput Overflow Status */ - vuint32_t CIOS13:1; /* Channel 13 Interruput Overflow Status */ - vuint32_t CIOS12:1; /* Channel 12 Interruput Overflow Status */ - vuint32_t CIOS11:1; /* Channel 11 Interruput Overflow Status */ - vuint32_t CIOS10:1; /* Channel 10 Interruput Overflow Status */ - vuint32_t CIOS9:1; /* Channel 9 Interruput Overflow Status */ - vuint32_t CIOS8:1; /* Channel 8 Interruput Overflow Status */ - vuint32_t CIOS7:1; /* Channel 7 Interruput Overflow Status */ - vuint32_t CIOS6:1; /* Channel 6 Interruput Overflow Status */ - vuint32_t CIOS5:1; /* Channel 5 Interruput Overflow Status */ - vuint32_t CIOS4:1; /* Channel 4 Interruput Overflow Status */ - vuint32_t CIOS3:1; /* Channel 3 Interruput Overflow Status */ - vuint32_t CIOS2:1; /* Channel 2 Interruput Overflow Status */ - vuint32_t CIOS1:1; /* Channel 1 Interruput Overflow Status */ - vuint32_t CIOS0:1; /* Channel 0 Interruput Overflow Status */ - } B; - } CIOSR_A; - - union { /* ETPU_B Interruput Overflow Status */ - vuint32_t R; - struct { - vuint32_t CIOS31:1; /* Channel 31 Interruput Overflow Status */ - vuint32_t CIOS30:1; /* Channel 30 Interruput Overflow Status */ - vuint32_t CIOS29:1; /* Channel 29 Interruput Overflow Status */ - vuint32_t CIOS28:1; /* Channel 28 Interruput Overflow Status */ - vuint32_t CIOS27:1; /* Channel 27 Interruput Overflow Status */ - vuint32_t CIOS26:1; /* Channel 26 Interruput Overflow Status */ - vuint32_t CIOS25:1; /* Channel 25 Interruput Overflow Status */ - vuint32_t CIOS24:1; /* Channel 24 Interruput Overflow Status */ - vuint32_t CIOS23:1; /* Channel 23 Interruput Overflow Status */ - vuint32_t CIOS22:1; /* Channel 22 Interruput Overflow Status */ - vuint32_t CIOS21:1; /* Channel 21 Interruput Overflow Status */ - vuint32_t CIOS20:1; /* Channel 20 Interruput Overflow Status */ - vuint32_t CIOS19:1; /* Channel 19 Interruput Overflow Status */ - vuint32_t CIOS18:1; /* Channel 18 Interruput Overflow Status */ - vuint32_t CIOS17:1; /* Channel 17 Interruput Overflow Status */ - vuint32_t CIOS16:1; /* Channel 16 Interruput Overflow Status */ - vuint32_t CIOS15:1; /* Channel 15 Interruput Overflow Status */ - vuint32_t CIOS14:1; /* Channel 14 Interruput Overflow Status */ - vuint32_t CIOS13:1; /* Channel 13 Interruput Overflow Status */ - vuint32_t CIOS12:1; /* Channel 12 Interruput Overflow Status */ - vuint32_t CIOS11:1; /* Channel 11 Interruput Overflow Status */ - vuint32_t CIOS10:1; /* Channel 10 Interruput Overflow Status */ - vuint32_t CIOS9:1; /* Channel 9 Interruput Overflow Status */ - vuint32_t CIOS8:1; /* Channel 8 Interruput Overflow Status */ - vuint32_t CIOS7:1; /* Channel 7 Interruput Overflow Status */ - vuint32_t CIOS6:1; /* Channel 6 Interruput Overflow Status */ - vuint32_t CIOS5:1; /* Channel 5 Interruput Overflow Status */ - vuint32_t CIOS4:1; /* Channel 4 Interruput Overflow Status */ - vuint32_t CIOS3:1; /* Channel 3 Interruput Overflow Status */ - vuint32_t CIOS2:1; /* Channel 2 Interruput Overflow Status */ - vuint32_t CIOS1:1; /* Channel 1 Interruput Overflow Status */ - vuint32_t CIOS0:1; /* Channel 0 Interruput Overflow Status */ - } B; - } CIOSR_B; - - uint32_t etpu_reserved13[2]; - - union { /* ETPU_A Data Transfer Overflow Status */ - vuint32_t R; - struct { - vuint32_t DTROS31:1; /* Channel 31 Data Transfer Overflow Status */ - vuint32_t DTROS30:1; /* Channel 30 Data Transfer Overflow Status */ - vuint32_t DTROS29:1; /* Channel 29 Data Transfer Overflow Status */ - vuint32_t DTROS28:1; /* Channel 28 Data Transfer Overflow Status */ - vuint32_t DTROS27:1; /* Channel 27 Data Transfer Overflow Status */ - vuint32_t DTROS26:1; /* Channel 26 Data Transfer Overflow Status */ - vuint32_t DTROS25:1; /* Channel 25 Data Transfer Overflow Status */ - vuint32_t DTROS24:1; /* Channel 24 Data Transfer Overflow Status */ - vuint32_t DTROS23:1; /* Channel 23 Data Transfer Overflow Status */ - vuint32_t DTROS22:1; /* Channel 22 Data Transfer Overflow Status */ - vuint32_t DTROS21:1; /* Channel 21 Data Transfer Overflow Status */ - vuint32_t DTROS20:1; /* Channel 20 Data Transfer Overflow Status */ - vuint32_t DTROS19:1; /* Channel 19 Data Transfer Overflow Status */ - vuint32_t DTROS18:1; /* Channel 18 Data Transfer Overflow Status */ - vuint32_t DTROS17:1; /* Channel 17 Data Transfer Overflow Status */ - vuint32_t DTROS16:1; /* Channel 16 Data Transfer Overflow Status */ - vuint32_t DTROS15:1; /* Channel 15 Data Transfer Overflow Status */ - vuint32_t DTROS14:1; /* Channel 14 Data Transfer Overflow Status */ - vuint32_t DTROS13:1; /* Channel 13 Data Transfer Overflow Status */ - vuint32_t DTROS12:1; /* Channel 12 Data Transfer Overflow Status */ - vuint32_t DTROS11:1; /* Channel 11 Data Transfer Overflow Status */ - vuint32_t DTROS10:1; /* Channel 10 Data Transfer Overflow Status */ - vuint32_t DTROS9:1; /* Channel 9 Data Transfer Overflow Status */ - vuint32_t DTROS8:1; /* Channel 8 Data Transfer Overflow Status */ - vuint32_t DTROS7:1; /* Channel 7 Data Transfer Overflow Status */ - vuint32_t DTROS6:1; /* Channel 6 Data Transfer Overflow Status */ - vuint32_t DTROS5:1; /* Channel 5 Data Transfer Overflow Status */ - vuint32_t DTROS4:1; /* Channel 4 Data Transfer Overflow Status */ - vuint32_t DTROS3:1; /* Channel 3 Data Transfer Overflow Status */ - vuint32_t DTROS2:1; /* Channel 2 Data Transfer Overflow Status */ - vuint32_t DTROS1:1; /* Channel 1 Data Transfer Overflow Status */ - vuint32_t DTROS0:1; /* Channel 0 Data Transfer Overflow Status */ - } B; - } CDTROSR_A; - - union { /* ETPU_B Data Transfer Overflow Status */ - vuint32_t R; - struct { - vuint32_t DTROS31:1; /* Channel 31 Data Transfer Overflow Status */ - vuint32_t DTROS30:1; /* Channel 30 Data Transfer Overflow Status */ - vuint32_t DTROS29:1; /* Channel 29 Data Transfer Overflow Status */ - vuint32_t DTROS28:1; /* Channel 28 Data Transfer Overflow Status */ - vuint32_t DTROS27:1; /* Channel 27 Data Transfer Overflow Status */ - vuint32_t DTROS26:1; /* Channel 26 Data Transfer Overflow Status */ - vuint32_t DTROS25:1; /* Channel 25 Data Transfer Overflow Status */ - vuint32_t DTROS24:1; /* Channel 24 Data Transfer Overflow Status */ - vuint32_t DTROS23:1; /* Channel 23 Data Transfer Overflow Status */ - vuint32_t DTROS22:1; /* Channel 22 Data Transfer Overflow Status */ - vuint32_t DTROS21:1; /* Channel 21 Data Transfer Overflow Status */ - vuint32_t DTROS20:1; /* Channel 20 Data Transfer Overflow Status */ - vuint32_t DTROS19:1; /* Channel 19 Data Transfer Overflow Status */ - vuint32_t DTROS18:1; /* Channel 18 Data Transfer Overflow Status */ - vuint32_t DTROS17:1; /* Channel 17 Data Transfer Overflow Status */ - vuint32_t DTROS16:1; /* Channel 16 Data Transfer Overflow Status */ - vuint32_t DTROS15:1; /* Channel 15 Data Transfer Overflow Status */ - vuint32_t DTROS14:1; /* Channel 14 Data Transfer Overflow Status */ - vuint32_t DTROS13:1; /* Channel 13 Data Transfer Overflow Status */ - vuint32_t DTROS12:1; /* Channel 12 Data Transfer Overflow Status */ - vuint32_t DTROS11:1; /* Channel 11 Data Transfer Overflow Status */ - vuint32_t DTROS10:1; /* Channel 10 Data Transfer Overflow Status */ - vuint32_t DTROS9:1; /* Channel 9 Data Transfer Overflow Status */ - vuint32_t DTROS8:1; /* Channel 8 Data Transfer Overflow Status */ - vuint32_t DTROS7:1; /* Channel 7 Data Transfer Overflow Status */ - vuint32_t DTROS6:1; /* Channel 6 Data Transfer Overflow Status */ - vuint32_t DTROS5:1; /* Channel 5 Data Transfer Overflow Status */ - vuint32_t DTROS4:1; /* Channel 4 Data Transfer Overflow Status */ - vuint32_t DTROS3:1; /* Channel 3 Data Transfer Overflow Status */ - vuint32_t DTROS2:1; /* Channel 2 Data Transfer Overflow Status */ - vuint32_t DTROS1:1; /* Channel 1 Data Transfer Overflow Status */ - vuint32_t DTROS0:1; /* Channel 0 Data Transfer Overflow Status */ - } B; - } CDTROSR_B; - - uint32_t etpu_reserved15[2]; - - union { /* ETPU_A Channel Interruput Enable */ - vuint32_t R; - struct { - vuint32_t CIE31:1; /* Channel 31 Interruput Enable */ - vuint32_t CIE30:1; /* Channel 30 Interruput Enable */ - vuint32_t CIE29:1; /* Channel 29 Interruput Enable */ - vuint32_t CIE28:1; /* Channel 28 Interruput Enable */ - vuint32_t CIE27:1; /* Channel 27 Interruput Enable */ - vuint32_t CIE26:1; /* Channel 26 Interruput Enable */ - vuint32_t CIE25:1; /* Channel 25 Interruput Enable */ - vuint32_t CIE24:1; /* Channel 24 Interruput Enable */ - vuint32_t CIE23:1; /* Channel 23 Interruput Enable */ - vuint32_t CIE22:1; /* Channel 22 Interruput Enable */ - vuint32_t CIE21:1; /* Channel 21 Interruput Enable */ - vuint32_t CIE20:1; /* Channel 20 Interruput Enable */ - vuint32_t CIE19:1; /* Channel 19 Interruput Enable */ - vuint32_t CIE18:1; /* Channel 18 Interruput Enable */ - vuint32_t CIE17:1; /* Channel 17 Interruput Enable */ - vuint32_t CIE16:1; /* Channel 16 Interruput Enable */ - vuint32_t CIE15:1; /* Channel 15 Interruput Enable */ - vuint32_t CIE14:1; /* Channel 14 Interruput Enable */ - vuint32_t CIE13:1; /* Channel 13 Interruput Enable */ - vuint32_t CIE12:1; /* Channel 12 Interruput Enable */ - vuint32_t CIE11:1; /* Channel 11 Interruput Enable */ - vuint32_t CIE10:1; /* Channel 10 Interruput Enable */ - vuint32_t CIE9:1; /* Channel 9 Interruput Enable */ - vuint32_t CIE8:1; /* Channel 8 Interruput Enable */ - vuint32_t CIE7:1; /* Channel 7 Interruput Enable */ - vuint32_t CIE6:1; /* Channel 6 Interruput Enable */ - vuint32_t CIE5:1; /* Channel 5 Interruput Enable */ - vuint32_t CIE4:1; /* Channel 4 Interruput Enable */ - vuint32_t CIE3:1; /* Channel 3 Interruput Enable */ - vuint32_t CIE2:1; /* Channel 2 Interruput Enable */ - vuint32_t CIE1:1; /* Channel 1 Interruput Enable */ - vuint32_t CIE0:1; /* Channel 0 Interruput Enable */ - } B; - } CIER_A; - - union { /* ETPU_B Channel Interruput Enable */ - vuint32_t R; - struct { - vuint32_t CIE31:1; /* Channel 31 Interruput Enable */ - vuint32_t CIE30:1; /* Channel 30 Interruput Enable */ - vuint32_t CIE29:1; /* Channel 29 Interruput Enable */ - vuint32_t CIE28:1; /* Channel 28 Interruput Enable */ - vuint32_t CIE27:1; /* Channel 27 Interruput Enable */ - vuint32_t CIE26:1; /* Channel 26 Interruput Enable */ - vuint32_t CIE25:1; /* Channel 25 Interruput Enable */ - vuint32_t CIE24:1; /* Channel 24 Interruput Enable */ - vuint32_t CIE23:1; /* Channel 23 Interruput Enable */ - vuint32_t CIE22:1; /* Channel 22 Interruput Enable */ - vuint32_t CIE21:1; /* Channel 21 Interruput Enable */ - vuint32_t CIE20:1; /* Channel 20 Interruput Enable */ - vuint32_t CIE19:1; /* Channel 19 Interruput Enable */ - vuint32_t CIE18:1; /* Channel 18 Interruput Enable */ - vuint32_t CIE17:1; /* Channel 17 Interruput Enable */ - vuint32_t CIE16:1; /* Channel 16 Interruput Enable */ - vuint32_t CIE15:1; /* Channel 15 Interruput Enable */ - vuint32_t CIE14:1; /* Channel 14 Interruput Enable */ - vuint32_t CIE13:1; /* Channel 13 Interruput Enable */ - vuint32_t CIE12:1; /* Channel 12 Interruput Enable */ - vuint32_t CIE11:1; /* Channel 11 Interruput Enable */ - vuint32_t CIE10:1; /* Channel 10 Interruput Enable */ - vuint32_t CIE9:1; /* Channel 9 Interruput Enable */ - vuint32_t CIE8:1; /* Channel 8 Interruput Enable */ - vuint32_t CIE7:1; /* Channel 7 Interruput Enable */ - vuint32_t CIE6:1; /* Channel 6 Interruput Enable */ - vuint32_t CIE5:1; /* Channel 5 Interruput Enable */ - vuint32_t CIE4:1; /* Channel 4 Interruput Enable */ - vuint32_t CIE3:1; /* Channel 3 Interruput Enable */ - vuint32_t CIE2:1; /* Channel 2 Interruput Enable */ - vuint32_t CIE1:1; /* Channel 1 Interruput Enable */ - vuint32_t CIE0:1; /* Channel 0 Interruput Enable */ - } B; - } CIER_B; - - uint32_t etpu_reserved17[2]; - - union { /* ETPU_A Channel Data Transfer Request Enable */ - vuint32_t R; - struct { - vuint32_t DTRE31:1; /* Channel 31 Data Transfer Request Enable */ - vuint32_t DTRE30:1; /* Channel 30 Data Transfer Request Enable */ - vuint32_t DTRE29:1; /* Channel 29 Data Transfer Request Enable */ - vuint32_t DTRE28:1; /* Channel 28 Data Transfer Request Enable */ - vuint32_t DTRE27:1; /* Channel 27 Data Transfer Request Enable */ - vuint32_t DTRE26:1; /* Channel 26 Data Transfer Request Enable */ - vuint32_t DTRE25:1; /* Channel 25 Data Transfer Request Enable */ - vuint32_t DTRE24:1; /* Channel 24 Data Transfer Request Enable */ - vuint32_t DTRE23:1; /* Channel 23 Data Transfer Request Enable */ - vuint32_t DTRE22:1; /* Channel 22 Data Transfer Request Enable */ - vuint32_t DTRE21:1; /* Channel 21 Data Transfer Request Enable */ - vuint32_t DTRE20:1; /* Channel 20 Data Transfer Request Enable */ - vuint32_t DTRE19:1; /* Channel 19 Data Transfer Request Enable */ - vuint32_t DTRE18:1; /* Channel 18 Data Transfer Request Enable */ - vuint32_t DTRE17:1; /* Channel 17 Data Transfer Request Enable */ - vuint32_t DTRE16:1; /* Channel 16 Data Transfer Request Enable */ - vuint32_t DTRE15:1; /* Channel 15 Data Transfer Request Enable */ - vuint32_t DTRE14:1; /* Channel 14 Data Transfer Request Enable */ - vuint32_t DTRE13:1; /* Channel 13 Data Transfer Request Enable */ - vuint32_t DTRE12:1; /* Channel 12 Data Transfer Request Enable */ - vuint32_t DTRE11:1; /* Channel 11 Data Transfer Request Enable */ - vuint32_t DTRE10:1; /* Channel 10 Data Transfer Request Enable */ - vuint32_t DTRE9:1; /* Channel 9 Data Transfer Request Enable */ - vuint32_t DTRE8:1; /* Channel 8 Data Transfer Request Enable */ - vuint32_t DTRE7:1; /* Channel 7 Data Transfer Request Enable */ - vuint32_t DTRE6:1; /* Channel 6 Data Transfer Request Enable */ - vuint32_t DTRE5:1; /* Channel 5 Data Transfer Request Enable */ - vuint32_t DTRE4:1; /* Channel 4 Data Transfer Request Enable */ - vuint32_t DTRE3:1; /* Channel 3 Data Transfer Request Enable */ - vuint32_t DTRE2:1; /* Channel 2 Data Transfer Request Enable */ - vuint32_t DTRE1:1; /* Channel 1 Data Transfer Request Enable */ - vuint32_t DTRE0:1; /* Channel 0 Data Transfer Request Enable */ - } B; - } CDTRER_A; - - union { /* ETPU_B Channel Data Transfer Request Enable */ - vuint32_t R; - struct { - vuint32_t DTRE31:1; /* Channel 31 Data Transfer Request Enable */ - vuint32_t DTRE30:1; /* Channel 30 Data Transfer Request Enable */ - vuint32_t DTRE29:1; /* Channel 29 Data Transfer Request Enable */ - vuint32_t DTRE28:1; /* Channel 28 Data Transfer Request Enable */ - vuint32_t DTRE27:1; /* Channel 27 Data Transfer Request Enable */ - vuint32_t DTRE26:1; /* Channel 26 Data Transfer Request Enable */ - vuint32_t DTRE25:1; /* Channel 25 Data Transfer Request Enable */ - vuint32_t DTRE24:1; /* Channel 24 Data Transfer Request Enable */ - vuint32_t DTRE23:1; /* Channel 23 Data Transfer Request Enable */ - vuint32_t DTRE22:1; /* Channel 22 Data Transfer Request Enable */ - vuint32_t DTRE21:1; /* Channel 21 Data Transfer Request Enable */ - vuint32_t DTRE20:1; /* Channel 20 Data Transfer Request Enable */ - vuint32_t DTRE19:1; /* Channel 19 Data Transfer Request Enable */ - vuint32_t DTRE18:1; /* Channel 18 Data Transfer Request Enable */ - vuint32_t DTRE17:1; /* Channel 17 Data Transfer Request Enable */ - vuint32_t DTRE16:1; /* Channel 16 Data Transfer Request Enable */ - vuint32_t DTRE15:1; /* Channel 15 Data Transfer Request Enable */ - vuint32_t DTRE14:1; /* Channel 14 Data Transfer Request Enable */ - vuint32_t DTRE13:1; /* Channel 13 Data Transfer Request Enable */ - vuint32_t DTRE12:1; /* Channel 12 Data Transfer Request Enable */ - vuint32_t DTRE11:1; /* Channel 11 Data Transfer Request Enable */ - vuint32_t DTRE10:1; /* Channel 10 Data Transfer Request Enable */ - vuint32_t DTRE9:1; /* Channel 9 Data Transfer Request Enable */ - vuint32_t DTRE8:1; /* Channel 8 Data Transfer Request Enable */ - vuint32_t DTRE7:1; /* Channel 7 Data Transfer Request Enable */ - vuint32_t DTRE6:1; /* Channel 6 Data Transfer Request Enable */ - vuint32_t DTRE5:1; /* Channel 5 Data Transfer Request Enable */ - vuint32_t DTRE4:1; /* Channel 4 Data Transfer Request Enable */ - vuint32_t DTRE3:1; /* Channel 3 Data Transfer Request Enable */ - vuint32_t DTRE2:1; /* Channel 2 Data Transfer Request Enable */ - vuint32_t DTRE1:1; /* Channel 1 Data Transfer Request Enable */ - vuint32_t DTRE0:1; /* Channel 0 Data Transfer Request Enable */ - } B; - } CDTRER_B; - - uint32_t etpu_reserved20[10]; - union { /* ETPU_A Channel Pending Service Status */ - vuint32_t R; - struct { - vuint32_t SR31:1; /* Channel 31 Pending Service Status */ - vuint32_t SR30:1; /* Channel 30 Pending Service Status */ - vuint32_t SR29:1; /* Channel 29 Pending Service Status */ - vuint32_t SR28:1; /* Channel 28 Pending Service Status */ - vuint32_t SR27:1; /* Channel 27 Pending Service Status */ - vuint32_t SR26:1; /* Channel 26 Pending Service Status */ - vuint32_t SR25:1; /* Channel 25 Pending Service Status */ - vuint32_t SR24:1; /* Channel 24 Pending Service Status */ - vuint32_t SR23:1; /* Channel 23 Pending Service Status */ - vuint32_t SR22:1; /* Channel 22 Pending Service Status */ - vuint32_t SR21:1; /* Channel 21 Pending Service Status */ - vuint32_t SR20:1; /* Channel 20 Pending Service Status */ - vuint32_t SR19:1; /* Channel 19 Pending Service Status */ - vuint32_t SR18:1; /* Channel 18 Pending Service Status */ - vuint32_t SR17:1; /* Channel 17 Pending Service Status */ - vuint32_t SR16:1; /* Channel 16 Pending Service Status */ - vuint32_t SR15:1; /* Channel 15 Pending Service Status */ - vuint32_t SR14:1; /* Channel 14 Pending Service Status */ - vuint32_t SR13:1; /* Channel 13 Pending Service Status */ - vuint32_t SR12:1; /* Channel 12 Pending Service Status */ - vuint32_t SR11:1; /* Channel 11 Pending Service Status */ - vuint32_t SR10:1; /* Channel 10 Pending Service Status */ - vuint32_t SR9:1; /* Channel 9 Pending Service Status */ - vuint32_t SR8:1; /* Channel 8 Pending Service Status */ - vuint32_t SR7:1; /* Channel 7 Pending Service Status */ - vuint32_t SR6:1; /* Channel 6 Pending Service Status */ - vuint32_t SR5:1; /* Channel 5 Pending Service Status */ - vuint32_t SR4:1; /* Channel 4 Pending Service Status */ - vuint32_t SR3:1; /* Channel 3 Pending Service Status */ - vuint32_t SR2:1; /* Channel 2 Pending Service Status */ - vuint32_t SR1:1; /* Channel 1 Pending Service Status */ - vuint32_t SR0:1; /* Channel 0 Pending Service Status */ - } B; - } CPSSR_A; - - union { /* ETPU_B Channel Pending Service Status */ - vuint32_t R; - struct { - vuint32_t SR31:1; /* Channel 31 Pending Service Status */ - vuint32_t SR30:1; /* Channel 30 Pending Service Status */ - vuint32_t SR29:1; /* Channel 29 Pending Service Status */ - vuint32_t SR28:1; /* Channel 28 Pending Service Status */ - vuint32_t SR27:1; /* Channel 27 Pending Service Status */ - vuint32_t SR26:1; /* Channel 26 Pending Service Status */ - vuint32_t SR25:1; /* Channel 25 Pending Service Status */ - vuint32_t SR24:1; /* Channel 24 Pending Service Status */ - vuint32_t SR23:1; /* Channel 23 Pending Service Status */ - vuint32_t SR22:1; /* Channel 22 Pending Service Status */ - vuint32_t SR21:1; /* Channel 21 Pending Service Status */ - vuint32_t SR20:1; /* Channel 20 Pending Service Status */ - vuint32_t SR19:1; /* Channel 19 Pending Service Status */ - vuint32_t SR18:1; /* Channel 18 Pending Service Status */ - vuint32_t SR17:1; /* Channel 17 Pending Service Status */ - vuint32_t SR16:1; /* Channel 16 Pending Service Status */ - vuint32_t SR15:1; /* Channel 15 Pending Service Status */ - vuint32_t SR14:1; /* Channel 14 Pending Service Status */ - vuint32_t SR13:1; /* Channel 13 Pending Service Status */ - vuint32_t SR12:1; /* Channel 12 Pending Service Status */ - vuint32_t SR11:1; /* Channel 11 Pending Service Status */ - vuint32_t SR10:1; /* Channel 10 Pending Service Status */ - vuint32_t SR9:1; /* Channel 9 Pending Service Status */ - vuint32_t SR8:1; /* Channel 8 Pending Service Status */ - vuint32_t SR7:1; /* Channel 7 Pending Service Status */ - vuint32_t SR6:1; /* Channel 6 Pending Service Status */ - vuint32_t SR5:1; /* Channel 5 Pending Service Status */ - vuint32_t SR4:1; /* Channel 4 Pending Service Status */ - vuint32_t SR3:1; /* Channel 3 Pending Service Status */ - vuint32_t SR2:1; /* Channel 2 Pending Service Status */ - vuint32_t SR1:1; /* Channel 1 Pending Service Status */ - vuint32_t SR0:1; /* Channel 0 Pending Service Status */ - } B; - } CPSSR_B; - - uint32_t etpu_reserved20a[2]; - - union { /* ETPU_A Channel Service Status */ - vuint32_t R; - struct { - vuint32_t SS31:1; /* Channel 31 Service Status */ - vuint32_t SS30:1; /* Channel 30 Service Status */ - vuint32_t SS29:1; /* Channel 29 Service Status */ - vuint32_t SS28:1; /* Channel 28 Service Status */ - vuint32_t SS27:1; /* Channel 27 Service Status */ - vuint32_t SS26:1; /* Channel 26 Service Status */ - vuint32_t SS25:1; /* Channel 25 Service Status */ - vuint32_t SS24:1; /* Channel 24 Service Status */ - vuint32_t SS23:1; /* Channel 23 Service Status */ - vuint32_t SS22:1; /* Channel 22 Service Status */ - vuint32_t SS21:1; /* Channel 21 Service Status */ - vuint32_t SS20:1; /* Channel 20 Service Status */ - vuint32_t SS19:1; /* Channel 19 Service Status */ - vuint32_t SS18:1; /* Channel 18 Service Status */ - vuint32_t SS17:1; /* Channel 17 Service Status */ - vuint32_t SS16:1; /* Channel 16 Service Status */ - vuint32_t SS15:1; /* Channel 15 Service Status */ - vuint32_t SS14:1; /* Channel 14 Service Status */ - vuint32_t SS13:1; /* Channel 13 Service Status */ - vuint32_t SS12:1; /* Channel 12 Service Status */ - vuint32_t SS11:1; /* Channel 11 Service Status */ - vuint32_t SS10:1; /* Channel 10 Service Status */ - vuint32_t SS9:1; /* Channel 9 Service Status */ - vuint32_t SS8:1; /* Channel 8 Service Status */ - vuint32_t SS7:1; /* Channel 7 Service Status */ - vuint32_t SS6:1; /* Channel 6 Service Status */ - vuint32_t SS5:1; /* Channel 5 Service Status */ - vuint32_t SS4:1; /* Channel 4 Service Status */ - vuint32_t SS3:1; /* Channel 3 Service Status */ - vuint32_t SS2:1; /* Channel 2 Service Status */ - vuint32_t SS1:1; /* Channel 1 Service Status */ - vuint32_t SS0:1; /* Channel 0 Service Status */ - } B; - } CSSR_A; - - union { /* ETPU_B Channel Service Status */ - vuint32_t R; - struct { - vuint32_t SS31:1; /* Channel 31 Service Status */ - vuint32_t SS30:1; /* Channel 30 Service Status */ - vuint32_t SS29:1; /* Channel 29 Service Status */ - vuint32_t SS28:1; /* Channel 28 Service Status */ - vuint32_t SS27:1; /* Channel 27 Service Status */ - vuint32_t SS26:1; /* Channel 26 Service Status */ - vuint32_t SS25:1; /* Channel 25 Service Status */ - vuint32_t SS24:1; /* Channel 24 Service Status */ - vuint32_t SS23:1; /* Channel 23 Service Status */ - vuint32_t SS22:1; /* Channel 22 Service Status */ - vuint32_t SS21:1; /* Channel 21 Service Status */ - vuint32_t SS20:1; /* Channel 20 Service Status */ - vuint32_t SS19:1; /* Channel 19 Service Status */ - vuint32_t SS18:1; /* Channel 18 Service Status */ - vuint32_t SS17:1; /* Channel 17 Service Status */ - vuint32_t SS16:1; /* Channel 16 Service Status */ - vuint32_t SS15:1; /* Channel 15 Service Status */ - vuint32_t SS14:1; /* Channel 14 Service Status */ - vuint32_t SS13:1; /* Channel 13 Service Status */ - vuint32_t SS12:1; /* Channel 12 Service Status */ - vuint32_t SS11:1; /* Channel 11 Service Status */ - vuint32_t SS10:1; /* Channel 10 Service Status */ - vuint32_t SS9:1; /* Channel 9 Service Status */ - vuint32_t SS8:1; /* Channel 8 Service Status */ - vuint32_t SS7:1; /* Channel 7 Service Status */ - vuint32_t SS6:1; /* Channel 6 Service Status */ - vuint32_t SS5:1; /* Channel 5 Service Status */ - vuint32_t SS4:1; /* Channel 4 Service Status */ - vuint32_t SS3:1; /* Channel 3 Service Status */ - vuint32_t SS2:1; /* Channel 2 Service Status */ - vuint32_t SS1:1; /* Channel 1 Service Status */ - vuint32_t SS0:1; /* Channel 0 Service Status */ - } B; - } CSSR_B; - - uint32_t etpu_reserved23[90]; - -/*****************************Channels********************************/ - - struct { - union { - vuint32_t R; /* Channel Configuration Register */ - struct { - vuint32_t CIE:1; /* Channel Interruput Enable */ - vuint32_t DTRE:1; /* Data Transfer Request Enable */ - vuint32_t CPR:2; /* Channel Priority */ - vuint32_t:3; - vuint32_t ETCS:1; /* Entry Table Condition Select */ - vuint32_t:3; - vuint32_t CFS:5; /* Channel Function Select */ - vuint32_t ODIS:1; /* Output disable */ - vuint32_t OPOL:1; /* output polarity */ - vuint32_t:3; - vuint32_t CPBA:11; /* Channel Parameter Base Address */ - } B; - } CR; - union { - vuint32_t R; /* Channel Status Control Register */ - struct { - vuint32_t CIS:1; /* Channel Interruput Status */ - vuint32_t CIOS:1; /* Channel Interruput Overflow Status */ - vuint32_t:6; - vuint32_t DTRS:1; /* Data Transfer Status */ - vuint32_t DTROS:1; /* Data Transfer Overflow Status */ - vuint32_t:6; - vuint32_t IPS:1; /* Input Pin State */ - vuint32_t OPS:1; /* Output Pin State */ - vuint32_t OBE:1; /* Output Buffer Enable */ - vuint32_t:11; - vuint32_t FM1:1; /* Function mode */ - vuint32_t FM0:1; /* Function mode */ - } B; - } SCR; - union { - vuint32_t R; /* Channel Host Service Request Register */ - struct { - vuint32_t:29; /* Host Service Request */ - vuint32_t HSR:3; - } B; - } HSRR; - uint32_t etpu_reserved23; - } CHAN[127]; - - }; - -// Define instances of modules -#define ETPU (*( struct ETPU_tag *) 0x401D0000) -#define ETPU_DATA_RAM (*( uint32_t *) 0x401D8000) -#define ETPU_DATA_RAM_EXT (*( uint32_t *) 0x401DC000) -#define ETPU_DATA_RAM_END (0x401D9800) -#define CODE_RAM (*( uint32_t *) 0x401E0000) - -#ifdef __MWERKS__ -#pragma pop -#endif - -#ifdef __cplusplus -} -#endif -#endif /* ifdef _MCF523x_eTPU_struc_H */ - - -/********************************************************************* - * - * Copyright: - * Freescale Semiconductor, INC. All Rights Reserved. - * You are hereby granted a copyright license to use, modify, and - * distribute the SOFTWARE so long as this entire notice is - * retained without alteration in any modified and/or redistributed - * versions, and that such modified versions are clearly identified - * as such. No licenses are granted by implication, estoppel or - * otherwise under any patents or trademarks of Freescale - * Semiconductor, Inc. This software is provided on an "AS IS" - * basis and without warranty. - * - * To the maximum extent permitted by applicable law, Freescale - * Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, - * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A - * PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH - * REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) - * AND ANY ACCOMPANYING WRITTEN MATERIALS. - * - * To the maximum extent permitted by applicable law, IN NO EVENT - * SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER - * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, - * BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER - * PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. - * - * Freescale Semiconductor assumes no responsibility for the - * maintenance and support of this software - ********************************************************************/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_fec.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_fec.h deleted file mode 100644 index 15139b93..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_fec.h +++ /dev/null @@ -1,212 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_FEC_H__ -#define __MCF523X_FEC_H__ - -/********************************************************************* -* -* Fast Ethernet Controller (FEC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FEC_EIR (*(vuint32*)(void*)(&__IPSBAR[0x001004])) -#define MCF_FEC_EIMR (*(vuint32*)(void*)(&__IPSBAR[0x001008])) -#define MCF_FEC_RDAR (*(vuint32*)(void*)(&__IPSBAR[0x001010])) -#define MCF_FEC_TDAR (*(vuint32*)(void*)(&__IPSBAR[0x001014])) -#define MCF_FEC_ECR (*(vuint32*)(void*)(&__IPSBAR[0x001024])) -#define MCF_FEC_MMFR (*(vuint32*)(void*)(&__IPSBAR[0x001040])) -#define MCF_FEC_MSCR (*(vuint32*)(void*)(&__IPSBAR[0x001044])) -#define MCF_FEC_MIBC (*(vuint32*)(void*)(&__IPSBAR[0x001064])) -#define MCF_FEC_RCR (*(vuint32*)(void*)(&__IPSBAR[0x001084])) -#define MCF_FEC_TCR (*(vuint32*)(void*)(&__IPSBAR[0x0010C4])) -#define MCF_FEC_PALR (*(vuint32*)(void*)(&__IPSBAR[0x0010E4])) -#define MCF_FEC_PAUR (*(vuint32*)(void*)(&__IPSBAR[0x0010E8])) -#define MCF_FEC_OPD (*(vuint32*)(void*)(&__IPSBAR[0x0010EC])) -#define MCF_FEC_IAUR (*(vuint32*)(void*)(&__IPSBAR[0x001118])) -#define MCF_FEC_IALR (*(vuint32*)(void*)(&__IPSBAR[0x00111C])) -#define MCF_FEC_GAUR (*(vuint32*)(void*)(&__IPSBAR[0x001120])) -#define MCF_FEC_GALR (*(vuint32*)(void*)(&__IPSBAR[0x001124])) -#define MCF_FEC_TFWR (*(vuint32*)(void*)(&__IPSBAR[0x001144])) -#define MCF_FEC_FRBR (*(vuint32*)(void*)(&__IPSBAR[0x00114C])) -#define MCF_FEC_FRSR (*(vuint32*)(void*)(&__IPSBAR[0x001150])) -#define MCF_FEC_ERDSR (*(vuint32*)(void*)(&__IPSBAR[0x001180])) -#define MCF_FEC_ETDSR (*(vuint32*)(void*)(&__IPSBAR[0x001184])) -#define MCF_FEC_EMRBR (*(vuint32*)(void*)(&__IPSBAR[0x001188])) -#define MCF_FEC_RMON_T_DROP (*(vuint32*)(void*)(&__IPSBAR[0x001200])) -#define MCF_FEC_RMON_T_PACKETS (*(vuint32*)(void*)(&__IPSBAR[0x001204])) -#define MCF_FEC_RMON_T_BC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x001208])) -#define MCF_FEC_RMON_T_MC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x00120C])) -#define MCF_FEC_RMON_T_CRC_ALIGN (*(vuint32*)(void*)(&__IPSBAR[0x001210])) -#define MCF_FEC_RMON_T_UNDERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001214])) -#define MCF_FEC_RMON_T_OVERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001218])) -#define MCF_FEC_RMON_T_FRAG (*(vuint32*)(void*)(&__IPSBAR[0x00121C])) -#define MCF_FEC_RMON_T_JAB (*(vuint32*)(void*)(&__IPSBAR[0x001220])) -#define MCF_FEC_RMON_T_COL (*(vuint32*)(void*)(&__IPSBAR[0x001224])) -#define MCF_FEC_RMON_T_P64 (*(vuint32*)(void*)(&__IPSBAR[0x001228])) -#define MCF_FEC_RMON_T_P65TO127 (*(vuint32*)(void*)(&__IPSBAR[0x00122C])) -#define MCF_FEC_RMON_T_P128TO255 (*(vuint32*)(void*)(&__IPSBAR[0x001230])) -#define MCF_FEC_RMON_T_P256TO511 (*(vuint32*)(void*)(&__IPSBAR[0x001234])) -#define MCF_FEC_RMON_T_P512TO1023 (*(vuint32*)(void*)(&__IPSBAR[0x001238])) -#define MCF_FEC_RMON_T_P1024TO2047 (*(vuint32*)(void*)(&__IPSBAR[0x00123C])) -#define MCF_FEC_RMON_T_P_GTE2048 (*(vuint32*)(void*)(&__IPSBAR[0x001240])) -#define MCF_FEC_RMON_T_OCTETS (*(vuint32*)(void*)(&__IPSBAR[0x001244])) -#define MCF_FEC_IEEE_T_DROP (*(vuint32*)(void*)(&__IPSBAR[0x001248])) -#define MCF_FEC_IEEE_T_FRAME_OK (*(vuint32*)(void*)(&__IPSBAR[0x00124C])) -#define MCF_FEC_IEEE_T_1COL (*(vuint32*)(void*)(&__IPSBAR[0x001250])) -#define MCF_FEC_IEEE_T_MCOL (*(vuint32*)(void*)(&__IPSBAR[0x001254])) -#define MCF_FEC_IEEE_T_DEF (*(vuint32*)(void*)(&__IPSBAR[0x001258])) -#define MCF_FEC_IEEE_T_LCOL (*(vuint32*)(void*)(&__IPSBAR[0x00125C])) -#define MCF_FEC_IEEE_T_EXCOL (*(vuint32*)(void*)(&__IPSBAR[0x001260])) -#define MCF_FEC_IEEE_T_MACERR (*(vuint32*)(void*)(&__IPSBAR[0x001264])) -#define MCF_FEC_IEEE_T_CSERR (*(vuint32*)(void*)(&__IPSBAR[0x001268])) -#define MCF_FEC_IEEE_T_SQE (*(vuint32*)(void*)(&__IPSBAR[0x00126C])) -#define MCF_FEC_IEEE_T_FDXFC (*(vuint32*)(void*)(&__IPSBAR[0x001270])) -#define MCF_FEC_IEEE_T_OCTETS_OK (*(vuint32*)(void*)(&__IPSBAR[0x001274])) -#define MCF_FEC_RMON_R_PACKETS (*(vuint32*)(void*)(&__IPSBAR[0x001284])) -#define MCF_FEC_RMON_R_BC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x001288])) -#define MCF_FEC_RMON_R_MC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x00128C])) -#define MCF_FEC_RMON_R_CRC_ALIGN (*(vuint32*)(void*)(&__IPSBAR[0x001290])) -#define MCF_FEC_RMON_R_UNDERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001294])) -#define MCF_FEC_RMON_R_OVERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001298])) -#define MCF_FEC_RMON_R_FRAG (*(vuint32*)(void*)(&__IPSBAR[0x00129C])) -#define MCF_FEC_RMON_R_JAB (*(vuint32*)(void*)(&__IPSBAR[0x0012A0])) -#define MCF_FEC_RMON_R_RESVD_0 (*(vuint32*)(void*)(&__IPSBAR[0x0012A4])) -#define MCF_FEC_RMON_R_P64 (*(vuint32*)(void*)(&__IPSBAR[0x0012A8])) -#define MCF_FEC_RMON_R_P65TO127 (*(vuint32*)(void*)(&__IPSBAR[0x0012AC])) -#define MCF_FEC_RMON_R_P128TO255 (*(vuint32*)(void*)(&__IPSBAR[0x0012B0])) -#define MCF_FEC_RMON_R_P256TO511 (*(vuint32*)(void*)(&__IPSBAR[0x0012B4])) -#define MCF_FEC_RMON_R_512TO1023 (*(vuint32*)(void*)(&__IPSBAR[0x0012B8])) -#define MCF_FEC_RMON_R_P_GTE2048 (*(vuint32*)(void*)(&__IPSBAR[0x0012C0])) -#define MCF_FEC_RMON_R_1024TO2047 (*(vuint32*)(void*)(&__IPSBAR[0x0012BC])) -#define MCF_FEC_RMON_R_OCTETS (*(vuint32*)(void*)(&__IPSBAR[0x0012C4])) -#define MCF_FEC_IEEE_R_DROP (*(vuint32*)(void*)(&__IPSBAR[0x0012C8])) -#define MCF_FEC_IEEE_R_FRAME_OK (*(vuint32*)(void*)(&__IPSBAR[0x0012CC])) -#define MCF_FEC_IEEE_R_CRC (*(vuint32*)(void*)(&__IPSBAR[0x0012D0])) -#define MCF_FEC_IEEE_R_ALIGN (*(vuint32*)(void*)(&__IPSBAR[0x0012D4])) -#define MCF_FEC_IEEE_R_MACERR (*(vuint32*)(void*)(&__IPSBAR[0x0012D8])) -#define MCF_FEC_IEEE_R_FDXFC (*(vuint32*)(void*)(&__IPSBAR[0x0012DC])) -#define MCF_FEC_IEEE_R_OCTETS_OK (*(vuint32*)(void*)(&__IPSBAR[0x0012E0])) - -/* Bit definitions and macros for MCF_FEC_EIR */ -#define MCF_FEC_EIR_UN (0x00080000) -#define MCF_FEC_EIR_RL (0x00100000) -#define MCF_FEC_EIR_LC (0x00200000) -#define MCF_FEC_EIR_EBERR (0x00400000) -#define MCF_FEC_EIR_MII (0x00800000) -#define MCF_FEC_EIR_RXB (0x01000000) -#define MCF_FEC_EIR_RXF (0x02000000) -#define MCF_FEC_EIR_TXB (0x04000000) -#define MCF_FEC_EIR_TXF (0x08000000) -#define MCF_FEC_EIR_GRA (0x10000000) -#define MCF_FEC_EIR_BABT (0x20000000) -#define MCF_FEC_EIR_BABR (0x40000000) -#define MCF_FEC_EIR_HBERR (0x80000000) - -/* Bit definitions and macros for MCF_FEC_EIMR */ -#define MCF_FEC_EIMR_UN (0x00080000) -#define MCF_FEC_EIMR_RL (0x00100000) -#define MCF_FEC_EIMR_LC (0x00200000) -#define MCF_FEC_EIMR_EBERR (0x00400000) -#define MCF_FEC_EIMR_MII (0x00800000) -#define MCF_FEC_EIMR_RXB (0x01000000) -#define MCF_FEC_EIMR_RXF (0x02000000) -#define MCF_FEC_EIMR_TXB (0x04000000) -#define MCF_FEC_EIMR_TXF (0x08000000) -#define MCF_FEC_EIMR_GRA (0x10000000) -#define MCF_FEC_EIMR_BABT (0x20000000) -#define MCF_FEC_EIMR_BABR (0x40000000) -#define MCF_FEC_EIMR_HBERR (0x80000000) - -/* Bit definitions and macros for MCF_FEC_RDAR */ -#define MCF_FEC_RDAR_R_DES_ACTIVE (0x01000000) - -/* Bit definitions and macros for MCF_FEC_TDAR */ -#define MCF_FEC_TDAR_X_DES_ACTIVE (0x01000000) - -/* Bit definitions and macros for MCF_FEC_ECR */ -#define MCF_FEC_ECR_RESET (0x00000001) -#define MCF_FEC_ECR_ETHER_EN (0x00000002) - -/* Bit definitions and macros for MCF_FEC_MMFR */ -#define MCF_FEC_MMFR_DATA(x) (((x)&0x0000FFFF)<<0) -#define MCF_FEC_MMFR_TA(x) (((x)&0x00000003)<<16) -#define MCF_FEC_MMFR_RA(x) (((x)&0x0000001F)<<18) -#define MCF_FEC_MMFR_PA(x) (((x)&0x0000001F)<<23) -#define MCF_FEC_MMFR_OP(x) (((x)&0x00000003)<<28) -#define MCF_FEC_MMFR_ST(x) (((x)&0x00000003)<<30) -#define MCF_FEC_MMFR_ST_01 (0x40000000) -#define MCF_FEC_MMFR_OP_READ (0x20000000) -#define MCF_FEC_MMFR_OP_WRITE (0x10000000) -#define MCF_FEC_MMFR_TA_10 (0x00020000) - - -/* Bit definitions and macros for MCF_FEC_MSCR */ -#define MCF_FEC_MSCR_MII_SPEED(x) (((x)&0x0000003F)<<1) -#define MCF_FEC_MSCR_DIS_PREAMBLE (0x00000080) - -/* Bit definitions and macros for MCF_FEC_MIBC */ -#define MCF_FEC_MIBC_MIB_IDLE (0x40000000) -#define MCF_FEC_MIBC_MIB_DISABLE (0x80000000) - -/* Bit definitions and macros for MCF_FEC_RCR */ -#define MCF_FEC_RCR_LOOP (0x00000001) -#define MCF_FEC_RCR_DRT (0x00000002) -#define MCF_FEC_RCR_MII_MODE (0x00000004) -#define MCF_FEC_RCR_PROM (0x00000008) -#define MCF_FEC_RCR_BC_REJ (0x00000010) -#define MCF_FEC_RCR_FCE (0x00000020) -#define MCF_FEC_RCR_MAX_FL(x) (((x)&0x000007FF)<<16) - -/* Bit definitions and macros for MCF_FEC_TCR */ -#define MCF_FEC_TCR_GTS (0x00000001) -#define MCF_FEC_TCR_HBC (0x00000002) -#define MCF_FEC_TCR_FDEN (0x00000004) -#define MCF_FEC_TCR_TFC_PAUSE (0x00000008) -#define MCF_FEC_TCR_RFC_PAUSE (0x00000010) - -/* Bit definitions and macros for MCF_FEC_PAUR */ -#define MCF_FEC_PAUR_TYPE(x) (((x)&0x0000FFFF)<<0) -#define MCF_FEC_PAUR_PADDR2(x) (((x)&0x0000FFFF)<<16) - -/* Bit definitions and macros for MCF_FEC_OPD */ -#define MCF_FEC_OPD_PAUSE_DUR(x) (((x)&0x0000FFFF)<<0) -#define MCF_FEC_OPD_OPCODE(x) (((x)&0x0000FFFF)<<16) - -/* Bit definitions and macros for MCF_FEC_TFWR */ -#define MCF_FEC_TFWR_X_WMRK(x) (((x)&0x00000003)<<0) - -/* Bit definitions and macros for MCF_FEC_FRBR */ -#define MCF_FEC_FRBR_R_BOUND(x) (((x)&0x000000FF)<<2) - -/* Bit definitions and macros for MCF_FEC_FRSR */ -#define MCF_FEC_FRSR_R_FSTART(x) (((x)&0x000000FF)<<2) - -/* Bit definitions and macros for MCF_FEC_ERDSR */ -#define MCF_FEC_ERDSR_R_DES_START(x) (((x)&0x3FFFFFFF)<<2) - -/* Bit definitions and macros for MCF_FEC_ETDSR */ -#define MCF_FEC_ETDSR_X_DES_START(x) (((x)&0x3FFFFFFF)<<2) - -/* Bit definitions and macros for MCF_FEC_EMRBR */ -#define MCF_FEC_EMRBR_R_BUF_SIZE(x) (((x)&0x0000007F)<<4) - -/********************************************************************/ - -#endif /* __MCF523X_FEC_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_fmpll.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_fmpll.h deleted file mode 100644 index acf8505a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_fmpll.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * File: mcf523x_fmpll.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_FMPLL_H__ -#define __MCF523X_FMPLL_H__ - -/********************************************************************* -* -* Frequency Modulated Phase Locked Loop (FMPLL) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FMPLL_SYNCR (*(vuint32*)(void*)(&__IPSBAR[0x120000])) -#define MCF_FMPLL_SYNSR (*(vuint32*)(void*)(&__IPSBAR[0x120004])) - -/* Bit definitions and macros for MCF_FMPLL_SYNCR */ -#define MCF_FMPLL_SYNCR_EXP(x) (((x)&0x000003FF)<<0) -#define MCF_FMPLL_SYNCR_DEPTH(x) (((x)&0x00000003)<<10) -#define MCF_FMPLL_SYNCR_RATE (0x00001000) -#define MCF_FMPLL_SYNCR_LOCIRQ (0x00002000) -#define MCF_FMPLL_SYNCR_LOLIRQ (0x00004000) -#define MCF_FMPLL_SYNCR_DISCLK (0x00008000) -#define MCF_FMPLL_SYNCR_LOCRE (0x00010000) -#define MCF_FMPLL_SYNCR_LOLRE (0x00020000) -#define MCF_FMPLL_SYNCR_LOCEN (0x00040000) -#define MCF_FMPLL_SYNCR_RFD(x) (((x)&0x00000007)<<19) -#define MCF_FMPLL_SYNCR_MFD(x) (((x)&0x00000007)<<24) - -/* Bit definitions and macros for MCF_FMPLL_SYNSR */ -#define MCF_FMPLL_SYNSR_CALPASS (0x00000001) -#define MCF_FMPLL_SYNSR_CALDONE (0x00000002) -#define MCF_FMPLL_SYNSR_LOCF (0x00000004) -#define MCF_FMPLL_SYNSR_LOCK (0x00000008) -#define MCF_FMPLL_SYNSR_LOCKS (0x00000010) -#define MCF_FMPLL_SYNSR_PLLREF (0x00000020) -#define MCF_FMPLL_SYNSR_PLLSEL (0x00000040) -#define MCF_FMPLL_SYNSR_MODE (0x00000080) -#define MCF_FMPLL_SYNSR_LOC (0x00000100) -#define MCF_FMPLL_SYNSR_LOLF (0x00000200) - -/********************************************************************/ - -#endif /* __MCF523X_FMPLL_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_gpio.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_gpio.h deleted file mode 100644 index e787dbe0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_gpio.h +++ /dev/null @@ -1,680 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_GPIO_H__ -#define __MCF523X_GPIO_H__ - -/********************************************************************* -* -* General Purpose I/O (GPIO) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_GPIO_PODR_ADDR (*(vuint8 *)(void*)(&__IPSBAR[0x100000])) -#define MCF_GPIO_PODR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100001])) -#define MCF_GPIO_PODR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100002])) -#define MCF_GPIO_PODR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100003])) -#define MCF_GPIO_PODR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100004])) -#define MCF_GPIO_PODR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100005])) -#define MCF_GPIO_PODR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100006])) -#define MCF_GPIO_PODR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100007])) -#define MCF_GPIO_PODR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100008])) -#define MCF_GPIO_PODR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100009])) -#define MCF_GPIO_PODR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10000A])) -#define MCF_GPIO_PODR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10000B])) -#define MCF_GPIO_PODR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10000C])) -#define MCF_GPIO_PDDR_APDDR (*(vuint8 *)(void*)(&__IPSBAR[0x100010])) -#define MCF_GPIO_PDDR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100011])) -#define MCF_GPIO_PDDR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100012])) -#define MCF_GPIO_PDDR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100013])) -#define MCF_GPIO_PDDR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100014])) -#define MCF_GPIO_PDDR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100015])) -#define MCF_GPIO_PDDR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100016])) -#define MCF_GPIO_PDDR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100017])) -#define MCF_GPIO_PDDR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100018])) -#define MCF_GPIO_PDDR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100019])) -#define MCF_GPIO_PDDR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10001A])) -#define MCF_GPIO_PDDR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10001B])) -#define MCF_GPIO_PDDR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10001C])) -#define MCF_GPIO_PPDSDR_ADDR (*(vuint8 *)(void*)(&__IPSBAR[0x100020])) -#define MCF_GPIO_PPDSDR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100021])) -#define MCF_GPIO_PPDSDR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100022])) -#define MCF_GPIO_PPDSDR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100023])) -#define MCF_GPIO_PPDSDR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100024])) -#define MCF_GPIO_PPDSDR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100027])) -#define MCF_GPIO_PPDSDR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100025])) -#define MCF_GPIO_PPDSDR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100026])) -#define MCF_GPIO_PPDSDR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100028])) -#define MCF_GPIO_PPDSDR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100029])) -#define MCF_GPIO_PPDSDR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10002A])) -#define MCF_GPIO_PPDSDR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10002B])) -#define MCF_GPIO_PPDSDR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10002C])) -#define MCF_GPIO_PCLRR_ADDR (*(vuint8 *)(void*)(&__IPSBAR[0x100030])) -#define MCF_GPIO_PCLRR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100031])) -#define MCF_GPIO_PCLRR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100032])) -#define MCF_GPIO_PCLRR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100033])) -#define MCF_GPIO_PCLRR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100034])) -#define MCF_GPIO_PCLRR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100035])) -#define MCF_GPIO_PCLRR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100036])) -#define MCF_GPIO_PCLRR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100037])) -#define MCF_GPIO_PCLRR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100038])) -#define MCF_GPIO_PCLRR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100039])) -#define MCF_GPIO_PCLRR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10003A])) -#define MCF_GPIO_PCLRR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10003B])) -#define MCF_GPIO_PCLRR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10003C])) -#define MCF_GPIO_PAR_AD (*(vuint8 *)(void*)(&__IPSBAR[0x100040])) -#define MCF_GPIO_PAR_BUSCTL (*(vuint16*)(void*)(&__IPSBAR[0x100042])) -#define MCF_GPIO_PAR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100044])) -#define MCF_GPIO_PAR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100045])) -#define MCF_GPIO_PAR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100046])) -#define MCF_GPIO_PAR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100047])) -#define MCF_GPIO_PAR_UART (*(vuint16*)(void*)(&__IPSBAR[0x100048])) -#define MCF_GPIO_PAR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10004A])) -#define MCF_GPIO_PAR_TIMER (*(vuint16*)(void*)(&__IPSBAR[0x10004C])) -#define MCF_GPIO_PAR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10004E])) -#define MCF_GPIO_DSCR_EIM (*(vuint8 *)(void*)(&__IPSBAR[0x100050])) -#define MCF_GPIO_DSCR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x100051])) -#define MCF_GPIO_DSCR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100052])) -#define MCF_GPIO_DSCR_UART (*(vuint8 *)(void*)(&__IPSBAR[0x100053])) -#define MCF_GPIO_DSCR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x100054])) -#define MCF_GPIO_DSCR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x100055])) - -/* Bit definitions and macros for MCF_GPIO_PODR_ADDR */ -#define MCF_GPIO_PODR_ADDR_PODR_ADDR5 (0x20) -#define MCF_GPIO_PODR_ADDR_PODR_ADDR6 (0x40) -#define MCF_GPIO_PODR_ADDR_PODR_ADDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_DATAH */ -#define MCF_GPIO_PODR_DATAH_PODR_DATAH0 (0x01) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH1 (0x02) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH2 (0x04) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH3 (0x08) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH4 (0x10) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH5 (0x20) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH6 (0x40) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_DATAL */ -#define MCF_GPIO_PODR_DATAL_PODR_DATAL0 (0x01) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL1 (0x02) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL2 (0x04) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL3 (0x08) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL4 (0x10) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL5 (0x20) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL6 (0x40) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_BUSCTL */ -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL0 (0x01) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL1 (0x02) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL2 (0x04) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL3 (0x08) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL4 (0x10) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL5 (0x20) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL6 (0x40) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_BS */ -#define MCF_GPIO_PODR_BS_PODR_BS0 (0x01) -#define MCF_GPIO_PODR_BS_PODR_BS1 (0x02) -#define MCF_GPIO_PODR_BS_PODR_BS2 (0x04) -#define MCF_GPIO_PODR_BS_PODR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PODR_CS */ -#define MCF_GPIO_PODR_CS_PODR_CS1 (0x02) -#define MCF_GPIO_PODR_CS_PODR_CS2 (0x04) -#define MCF_GPIO_PODR_CS_PODR_CS3 (0x08) -#define MCF_GPIO_PODR_CS_PODR_CS4 (0x10) -#define MCF_GPIO_PODR_CS_PODR_CS5 (0x20) -#define MCF_GPIO_PODR_CS_PODR_CS6 (0x40) -#define MCF_GPIO_PODR_CS_PODR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_SDRAM */ -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM0 (0x01) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM1 (0x02) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM2 (0x04) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM3 (0x08) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM4 (0x10) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PODR_FECI2C */ -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C0 (0x01) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C1 (0x02) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C2 (0x04) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PODR_UARTH */ -#define MCF_GPIO_PODR_UARTH_PODR_UARTH0 (0x01) -#define MCF_GPIO_PODR_UARTH_PODR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PODR_UARTL */ -#define MCF_GPIO_PODR_UARTL_PODR_UARTL0 (0x01) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL1 (0x02) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL2 (0x04) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL3 (0x08) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL4 (0x10) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL5 (0x20) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL6 (0x40) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_QSPI */ -#define MCF_GPIO_PODR_QSPI_PODR_QSPI0 (0x01) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI1 (0x02) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI2 (0x04) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI3 (0x08) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PODR_TIMER */ -#define MCF_GPIO_PODR_TIMER_PODR_TIMER0 (0x01) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER1 (0x02) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER2 (0x04) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER3 (0x08) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER4 (0x10) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER5 (0x20) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER6 (0x40) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_ETPU */ -#define MCF_GPIO_PODR_ETPU_PODR_ETPU0 (0x01) -#define MCF_GPIO_PODR_ETPU_PODR_ETPU1 (0x02) -#define MCF_GPIO_PODR_ETPU_PODR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PDDR_APDDR */ -#define MCF_GPIO_PDDR_APDDR_PDDR_APDDR5 (0x20) -#define MCF_GPIO_PDDR_APDDR_PDDR_APDDR6 (0x40) -#define MCF_GPIO_PDDR_APDDR_PDDR_APDDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DATAH */ -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH0 (0x01) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH1 (0x02) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH2 (0x04) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH3 (0x08) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH4 (0x10) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH5 (0x20) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH6 (0x40) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DATAL */ -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL0 (0x01) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL1 (0x02) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL2 (0x04) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL3 (0x08) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL4 (0x10) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL5 (0x20) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL6 (0x40) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_BUSCTL */ -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL0 (0x01) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL1 (0x02) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL2 (0x04) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL3 (0x08) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL4 (0x10) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL5 (0x20) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL6 (0x40) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_BS */ -#define MCF_GPIO_PDDR_BS_PDDR_BS0 (0x01) -#define MCF_GPIO_PDDR_BS_PDDR_BS3(x) (((x)&0x07)<<1) - -/* Bit definitions and macros for MCF_GPIO_PDDR_CS */ -#define MCF_GPIO_PDDR_CS_PDDR_CS1 (0x02) -#define MCF_GPIO_PDDR_CS_PDDR_CS2 (0x04) -#define MCF_GPIO_PDDR_CS_PDDR_CS3 (0x08) -#define MCF_GPIO_PDDR_CS_PDDR_CS4 (0x10) -#define MCF_GPIO_PDDR_CS_PDDR_CS5 (0x20) -#define MCF_GPIO_PDDR_CS_PDDR_CS6 (0x40) -#define MCF_GPIO_PDDR_CS_PDDR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_SDRAM */ -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM0 (0x01) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM1 (0x02) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM2 (0x04) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM3 (0x08) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM4 (0x10) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FECI2C */ -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0 (0x01) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1 (0x02) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C2 (0x04) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PDDR_UARTH */ -#define MCF_GPIO_PDDR_UARTH_PDDR_UARTH0 (0x01) -#define MCF_GPIO_PDDR_UARTH_PDDR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PDDR_UARTL */ -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL0 (0x01) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL1 (0x02) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL2 (0x04) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL3 (0x08) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL4 (0x10) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL5 (0x20) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL6 (0x40) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_QSPI */ -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI0 (0x01) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI1 (0x02) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI2 (0x04) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI3 (0x08) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PDDR_TIMER */ -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER0 (0x01) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER1 (0x02) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER2 (0x04) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER3 (0x08) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER4 (0x10) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER5 (0x20) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER6 (0x40) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_ETPU */ -#define MCF_GPIO_PDDR_ETPU_PDDR_ETPU0 (0x01) -#define MCF_GPIO_PDDR_ETPU_PDDR_ETPU1 (0x02) -#define MCF_GPIO_PDDR_ETPU_PDDR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_ADDR */ -#define MCF_GPIO_PPDSDR_ADDR_PPDSDR_ADDR5 (0x20) -#define MCF_GPIO_PPDSDR_ADDR_PPDSDR_ADDR6 (0x40) -#define MCF_GPIO_PPDSDR_ADDR_PPDSDR_ADDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DATAH */ -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH0 (0x01) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH1 (0x02) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH2 (0x04) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH3 (0x08) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH4 (0x10) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH5 (0x20) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH6 (0x40) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DATAL */ -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL0 (0x01) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL1 (0x02) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL2 (0x04) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL3 (0x08) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL4 (0x10) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL5 (0x20) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL6 (0x40) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_BUSCTL */ -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL0 (0x01) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL1 (0x02) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL2 (0x04) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL3 (0x08) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL4 (0x10) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL5 (0x20) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL6 (0x40) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_BS */ -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS0 (0x01) -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS1 (0x02) -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS2 (0x04) -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECI2C */ -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C0 (0x01) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C1 (0x02) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C2 (0x04) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_CS */ -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS1 (0x02) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS2 (0x04) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS3 (0x08) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS4 (0x10) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS5 (0x20) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS6 (0x40) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_SDRAM */ -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM0 (0x01) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM1 (0x02) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM2 (0x04) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM3 (0x08) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM4 (0x10) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM5 (0x20) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM6 (0x40) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_UARTH */ -#define MCF_GPIO_PPDSDR_UARTH_PPDSDR_UARTH0 (0x01) -#define MCF_GPIO_PPDSDR_UARTH_PPDSDR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_UARTL */ -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL0 (0x01) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL1 (0x02) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL2 (0x04) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL3 (0x08) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL4 (0x10) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL5 (0x20) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL6 (0x40) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_QSPI */ -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI0 (0x01) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI1 (0x02) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI2 (0x04) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI3 (0x08) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_TIMER */ -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER0 (0x01) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER1 (0x02) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER2 (0x04) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER3 (0x08) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER4 (0x10) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER5 (0x20) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER6 (0x40) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_ETPU */ -#define MCF_GPIO_PPDSDR_ETPU_PPDSDR_ETPU0 (0x01) -#define MCF_GPIO_PPDSDR_ETPU_PPDSDR_ETPU1 (0x02) -#define MCF_GPIO_PPDSDR_ETPU_PPDSDR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_ADDR */ -#define MCF_GPIO_PCLRR_ADDR_PCLRR_ADDR5 (0x20) -#define MCF_GPIO_PCLRR_ADDR_PCLRR_ADDR6 (0x40) -#define MCF_GPIO_PCLRR_ADDR_PCLRR_ADDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DATAH */ -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH0 (0x01) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH1 (0x02) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH2 (0x04) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH3 (0x08) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH4 (0x10) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH5 (0x20) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH6 (0x40) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DATAL */ -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL0 (0x01) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL1 (0x02) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL2 (0x04) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL3 (0x08) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL4 (0x10) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL5 (0x20) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL6 (0x40) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_BUSCTL */ -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL0 (0x01) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL1 (0x02) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL2 (0x04) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL3 (0x08) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL4 (0x10) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL5 (0x20) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL6 (0x40) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_BS */ -#define MCF_GPIO_PCLRR_BS_PCLRR_BS0 (0x01) -#define MCF_GPIO_PCLRR_BS_PCLRR_BS1 (0x02) -#define MCF_GPIO_PCLRR_BS_PCLRR_BS2 (0x04) -#define MCF_GPIO_PCLRR_BS_PCLRR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_CS */ -#define MCF_GPIO_PCLRR_CS_PCLRR_CS1 (0x02) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS2 (0x04) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS3 (0x08) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS4 (0x10) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS5 (0x20) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS6 (0x40) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_SDRAM */ -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM0 (0x01) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM1 (0x02) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM2 (0x04) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM3 (0x08) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM4 (0x10) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FECI2C */ -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C0 (0x01) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C1 (0x02) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C2 (0x04) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_UARTH */ -#define MCF_GPIO_PCLRR_UARTH_PCLRR_UARTH0 (0x01) -#define MCF_GPIO_PCLRR_UARTH_PCLRR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_UARTL */ -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL0 (0x01) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL1 (0x02) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL2 (0x04) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL3 (0x08) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL4 (0x10) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL5 (0x20) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL6 (0x40) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_QSPI */ -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI0 (0x01) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI1 (0x02) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI2 (0x04) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI3 (0x08) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_TIMER */ -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER0 (0x01) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER1 (0x02) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER2 (0x04) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER3 (0x08) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER4 (0x10) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER5 (0x20) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER6 (0x40) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_ETPU */ -#define MCF_GPIO_PCLRR_ETPU_PCLRR_ETPU0 (0x01) -#define MCF_GPIO_PCLRR_ETPU_PCLRR_ETPU1 (0x02) -#define MCF_GPIO_PCLRR_ETPU_PCLRR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PAR_AD */ -#define MCF_GPIO_PAR_AD_PAR_DATAL (0x01) -#define MCF_GPIO_PAR_AD_PAR_ADDR21 (0x20) -#define MCF_GPIO_PAR_AD_PAR_ADDR22 (0x40) -#define MCF_GPIO_PAR_AD_PAR_ADDR23 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PAR_BUSCTL */ -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP(x) (((x)&0x0003)<<0) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS(x) (((x)&0x0003)<<2) -#define MCF_GPIO_PAR_BUSCTL_PAR_TSIZ0 (0x0010) -#define MCF_GPIO_PAR_BUSCTL_PAR_TSIZ1 (0x0040) -#define MCF_GPIO_PAR_BUSCTL_PAR_RWB (0x0100) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_BUSCTL_PAR_TA (0x1000) -#define MCF_GPIO_PAR_BUSCTL_PAR_OE (0x4000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA_GPIO (0x0000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA_DMA (0x0800) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA_TEA (0x0C00) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_GPIO (0x0000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_DMA (0x0080) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_TS (0x00C0) -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP_GPIO (0x0000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP_DMA (0x0002) -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP_TEA (0x0003) - -/* Bit definitions and macros for MCF_GPIO_PAR_BS */ -#define MCF_GPIO_PAR_BS_PAR_BS0 (0x01) -#define MCF_GPIO_PAR_BS_PAR_BS1 (0x02) -#define MCF_GPIO_PAR_BS_PAR_BS2 (0x04) -#define MCF_GPIO_PAR_BS_PAR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PAR_CS */ -#define MCF_GPIO_PAR_CS_PAR_CS1 (0x02) -#define MCF_GPIO_PAR_CS_PAR_CS2 (0x04) -#define MCF_GPIO_PAR_CS_PAR_CS3 (0x08) -#define MCF_GPIO_PAR_CS_PAR_CS4 (0x10) -#define MCF_GPIO_PAR_CS_PAR_CS5 (0x20) -#define MCF_GPIO_PAR_CS_PAR_CS6 (0x40) -#define MCF_GPIO_PAR_CS_PAR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PAR_SDRAM */ -#define MCF_GPIO_PAR_SDRAM_PAR_SDCS0 (0x01) -#define MCF_GPIO_PAR_SDRAM_PAR_SDCS1 (0x02) -#define MCF_GPIO_PAR_SDRAM_PAR_SCKE (0x04) -#define MCF_GPIO_PAR_SDRAM_PAR_SRAS (0x08) -#define MCF_GPIO_PAR_SDRAM_PAR_SCAS (0x10) -#define MCF_GPIO_PAR_SDRAM_PAR_SDWE (0x20) -#define MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(x) (((x)&0x03)<<6) - -/* Bit definitions and macros for MCF_GPIO_PAR_FECI2C */ -#define MCF_GPIO_PAR_FECI2C_PAR_SDA(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL(x) (((x)&0x03)<<2) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO(x) (((x)&0x03)<<4) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC(x) (((x)&0x03)<<6) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_UART2 (0x40) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_I2C (0x80) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_FEC (0xC0) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_UART2 (0x10) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_I2C (0x20) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_FEC (0x30) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_FLEX (0x08) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_I2C (0x0C) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_FLEX (0x02) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_I2C (0x03) - -/* Bit definitions and macros for MCF_GPIO_PAR_UART */ -#define MCF_GPIO_PAR_UART_PAR_U0RTS (0x0001) -#define MCF_GPIO_PAR_UART_PAR_U0CTS (0x0002) -#define MCF_GPIO_PAR_UART_PAR_U0TXD (0x0004) -#define MCF_GPIO_PAR_UART_PAR_U0RXD (0x0008) -#define MCF_GPIO_PAR_UART_PAR_U1RTS(x) (((x)&0x0003)<<4) -#define MCF_GPIO_PAR_UART_PAR_U1CTS(x) (((x)&0x0003)<<6) -#define MCF_GPIO_PAR_UART_PAR_U1TXD(x) (((x)&0x0003)<<8) -#define MCF_GPIO_PAR_UART_PAR_U1RXD(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_UART_PAR_U2TXD (0x1000) -#define MCF_GPIO_PAR_UART_PAR_U2RXD (0x2000) -#define MCF_GPIO_PAR_UART_PAR_CAN1EN (0x4000) -#define MCF_GPIO_PAR_UART_PAR_DREQ2 (0x8000) -#define MCF_GPIO_PAR_UART_PAR_U1RXD_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1RXD_FLEX (0x0800) -#define MCF_GPIO_PAR_UART_PAR_U1RXD_UART1 (0x0C00) -#define MCF_GPIO_PAR_UART_PAR_U1TXD_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1TXD_FLEX (0x0200) -#define MCF_GPIO_PAR_UART_PAR_U1TXD_UART1 (0x0300) -#define MCF_GPIO_PAR_UART_PAR_U1CTS_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1CTS_UART2 (0x0080) -#define MCF_GPIO_PAR_UART_PAR_U1CTS_UART1 (0x00C0) -#define MCF_GPIO_PAR_UART_PAR_U1RTS_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1RTS_UART2 (0x0020) -#define MCF_GPIO_PAR_UART_PAR_U1RTS_UART1 (0x0030) - -/* Bit definitions and macros for MCF_GPIO_PAR_QSPI */ -#define MCF_GPIO_PAR_QSPI_PAR_SCK(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_QSPI_PAR_DOUT (0x04) -#define MCF_GPIO_PAR_QSPI_PAR_DIN(x) (((x)&0x03)<<3) -#define MCF_GPIO_PAR_QSPI_PAR_PCS0 (0x20) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1(x) (((x)&0x03)<<6) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1_GPIO (0x00) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1_SDRAMC (0x80) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1_QSPI (0xC0) -#define MCF_GPIO_PAR_QSPI_PAR_DIN_GPIO (0x00) -#define MCF_GPIO_PAR_QSPI_PAR_DIN_I2C (0x10) -#define MCF_GPIO_PAR_QSPI_PAR_DIN_QSPI (0x1C) -#define MCF_GPIO_PAR_QSPI_PAR_SCK_GPIO (0x00) -#define MCF_GPIO_PAR_QSPI_PAR_SCK_I2C (0x02) -#define MCF_GPIO_PAR_QSPI_PAR_SCK_QSPI (0x03) - -/* Bit definitions and macros for MCF_GPIO_PAR_TIMER */ -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT(x) (((x)&0x0003)<<0) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT(x) (((x)&0x0003)<<2) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT(x) (((x)&0x0003)<<4) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT(x) (((x)&0x0003)<<6) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN(x) (((x)&0x0003)<<8) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN(x) (((x)&0x0003)<<12) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN(x) (((x)&0x0003)<<14) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_QSPI (0x4000) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_UART2 (0x8000) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_T3IN (0xC000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_T2OUT (0x1000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_DMA (0x2000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_T2IN (0x3000) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_T1OUT (0x0400) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_DMA (0x0800) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_T1IN (0x0C00) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN_DMA (0x0200) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN_T0IN (0x0300) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_QSPI (0x0040) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_UART2 (0x0080) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_T3OUT (0x00C0) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT_DMA (0x0020) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT_T2OUT (0x0030) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT_DMA (0x0008) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT_T1OUT (0x000C) -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT_DMA (0x0002) -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT_T0OUT (0x0003) - -/* Bit definitions and macros for MCF_GPIO_PAR_ETPU */ -#define MCF_GPIO_PAR_ETPU_PAR_LTPU_ODIS (0x01) -#define MCF_GPIO_PAR_ETPU_PAR_UTPU_ODIS (0x02) -#define MCF_GPIO_PAR_ETPU_PAR_TCRCLK (0x04) - -/* Bit definitions and macros for MCF_GPIO_DSCR_EIM */ -#define MCF_GPIO_DSCR_EIM_DSCR_EIM0 (0x01) -#define MCF_GPIO_DSCR_EIM_DSCR_EIM1 (0x10) - -/* Bit definitions and macros for MCF_GPIO_DSCR_ETPU */ -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_7_0 (0x01) -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_15_8 (0x04) -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_23_16 (0x10) -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_31_24 (0x40) - -/* Bit definitions and macros for MCF_GPIO_DSCR_FECI2C */ -#define MCF_GPIO_DSCR_FECI2C_DSCR_I2C (0x01) -#define MCF_GPIO_DSCR_FECI2C_DSCR_FEC (0x10) - -/* Bit definitions and macros for MCF_GPIO_DSCR_UART */ -#define MCF_GPIO_DSCR_UART_DSCR_UART0 (0x01) -#define MCF_GPIO_DSCR_UART_DSCR_UART1 (0x04) -#define MCF_GPIO_DSCR_UART_DSCR_UART2 (0x10) -#define MCF_GPIO_DSCR_UART_DSCR_IRQ (0x40) - -/* Bit definitions and macros for MCF_GPIO_DSCR_QSPI */ -#define MCF_GPIO_DSCR_QSPI_DSCR_QSPI (0x01) - -/* Bit definitions and macros for MCF_GPIO_DSCR_TIMER */ -#define MCF_GPIO_DSCR_TIMER_DSCR_TIMER (0x01) - -/********************************************************************/ - -#endif /* __MCF523X_GPIO_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_i2c.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_i2c.h deleted file mode 100644 index aa20e898..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_i2c.h +++ /dev/null @@ -1,67 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_I2C_H__ -#define __MCF523X_I2C_H__ - -/********************************************************************* -* -* I2C Module (I2C) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_I2C_I2AR (*(vuint8 *)(void*)(&__IPSBAR[0x000300])) -#define MCF_I2C_I2FDR (*(vuint8 *)(void*)(&__IPSBAR[0x000304])) -#define MCF_I2C_I2CR (*(vuint8 *)(void*)(&__IPSBAR[0x000308])) -#define MCF_I2C_I2SR (*(vuint8 *)(void*)(&__IPSBAR[0x00030C])) -#define MCF_I2C_I2DR (*(vuint8 *)(void*)(&__IPSBAR[0x000310])) -#define MCF_I2C_I2ICR (*(vuint8 *)(void*)(&__IPSBAR[0x000320])) - -/* Bit definitions and macros for MCF_I2C_I2AR */ -#define MCF_I2C_I2AR_ADR(x) (((x)&0x7F)<<1) - -/* Bit definitions and macros for MCF_I2C_I2FDR */ -#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F)<<0) - -/* Bit definitions and macros for MCF_I2C_I2CR */ -#define MCF_I2C_I2CR_RSTA (0x04) -#define MCF_I2C_I2CR_TXAK (0x08) -#define MCF_I2C_I2CR_MTX (0x10) -#define MCF_I2C_I2CR_MSTA (0x20) -#define MCF_I2C_I2CR_IIEN (0x40) -#define MCF_I2C_I2CR_IEN (0x80) - -/* Bit definitions and macros for MCF_I2C_I2SR */ -#define MCF_I2C_I2SR_RXAK (0x01) -#define MCF_I2C_I2SR_IIF (0x02) -#define MCF_I2C_I2SR_SRW (0x04) -#define MCF_I2C_I2SR_IAL (0x10) -#define MCF_I2C_I2SR_IBB (0x20) -#define MCF_I2C_I2SR_IAAS (0x40) -#define MCF_I2C_I2SR_ICF (0x80) - -/* Bit definitions and macros for MCF_I2C_I2ICR */ -#define MCF_I2C_I2ICR_IE (0x01) -#define MCF_I2C_I2ICR_RE (0x02) -#define MCF_I2C_I2ICR_TE (0x04) -#define MCF_I2C_I2ICR_BNBE (0x08) - -/********************************************************************/ - -#endif /* __MCF523X_I2C_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_intc0.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_intc0.h deleted file mode 100644 index a2c32746..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_intc0.h +++ /dev/null @@ -1,327 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_INTC0_H__ -#define __MCF523X_INTC0_H__ - -/********************************************************************* -* -* Interrupt Controller 0 (INTC0) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_INTC0_IPRH (*(vuint32*)(void*)(&__IPSBAR[0x000C00])) -#define MCF_INTC0_IPRL (*(vuint32*)(void*)(&__IPSBAR[0x000C04])) -#define MCF_INTC0_IMRH (*(vuint32*)(void*)(&__IPSBAR[0x000C08])) -#define MCF_INTC0_IMRL (*(vuint32*)(void*)(&__IPSBAR[0x000C0C])) -#define MCF_INTC0_INTFRCH (*(vuint32*)(void*)(&__IPSBAR[0x000C10])) -#define MCF_INTC0_INTFRCL (*(vuint32*)(void*)(&__IPSBAR[0x000C14])) -#define MCF_INTC0_IRLR (*(vuint8 *)(void*)(&__IPSBAR[0x000C18])) -#define MCF_INTC0_IACKLPR (*(vuint8 *)(void*)(&__IPSBAR[0x000C19])) -#define MCF_INTC0_ICR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000C40])) -#define MCF_INTC0_ICR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000C41])) -#define MCF_INTC0_ICR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000C42])) -#define MCF_INTC0_ICR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000C43])) -#define MCF_INTC0_ICR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000C44])) -#define MCF_INTC0_ICR5 (*(vuint8 *)(void*)(&__IPSBAR[0x000C45])) -#define MCF_INTC0_ICR6 (*(vuint8 *)(void*)(&__IPSBAR[0x000C46])) -#define MCF_INTC0_ICR7 (*(vuint8 *)(void*)(&__IPSBAR[0x000C47])) -#define MCF_INTC0_ICR8 (*(vuint8 *)(void*)(&__IPSBAR[0x000C48])) -#define MCF_INTC0_ICR9 (*(vuint8 *)(void*)(&__IPSBAR[0x000C49])) -#define MCF_INTC0_ICR10 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4A])) -#define MCF_INTC0_ICR11 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4B])) -#define MCF_INTC0_ICR12 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4C])) -#define MCF_INTC0_ICR13 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4D])) -#define MCF_INTC0_ICR14 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4E])) -#define MCF_INTC0_ICR15 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4F])) -#define MCF_INTC0_ICR16 (*(vuint8 *)(void*)(&__IPSBAR[0x000C50])) -#define MCF_INTC0_ICR17 (*(vuint8 *)(void*)(&__IPSBAR[0x000C51])) -#define MCF_INTC0_ICR18 (*(vuint8 *)(void*)(&__IPSBAR[0x000C52])) -#define MCF_INTC0_ICR19 (*(vuint8 *)(void*)(&__IPSBAR[0x000C53])) -#define MCF_INTC0_ICR20 (*(vuint8 *)(void*)(&__IPSBAR[0x000C54])) -#define MCF_INTC0_ICR21 (*(vuint8 *)(void*)(&__IPSBAR[0x000C55])) -#define MCF_INTC0_ICR22 (*(vuint8 *)(void*)(&__IPSBAR[0x000C56])) -#define MCF_INTC0_ICR23 (*(vuint8 *)(void*)(&__IPSBAR[0x000C57])) -#define MCF_INTC0_ICR24 (*(vuint8 *)(void*)(&__IPSBAR[0x000C58])) -#define MCF_INTC0_ICR25 (*(vuint8 *)(void*)(&__IPSBAR[0x000C59])) -#define MCF_INTC0_ICR26 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5A])) -#define MCF_INTC0_ICR27 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5B])) -#define MCF_INTC0_ICR28 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5C])) -#define MCF_INTC0_ICR29 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5D])) -#define MCF_INTC0_ICR30 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5E])) -#define MCF_INTC0_ICR31 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5F])) -#define MCF_INTC0_ICR32 (*(vuint8 *)(void*)(&__IPSBAR[0x000C60])) -#define MCF_INTC0_ICR33 (*(vuint8 *)(void*)(&__IPSBAR[0x000C61])) -#define MCF_INTC0_ICR34 (*(vuint8 *)(void*)(&__IPSBAR[0x000C62])) -#define MCF_INTC0_ICR35 (*(vuint8 *)(void*)(&__IPSBAR[0x000C63])) -#define MCF_INTC0_ICR36 (*(vuint8 *)(void*)(&__IPSBAR[0x000C64])) -#define MCF_INTC0_ICR37 (*(vuint8 *)(void*)(&__IPSBAR[0x000C65])) -#define MCF_INTC0_ICR38 (*(vuint8 *)(void*)(&__IPSBAR[0x000C66])) -#define MCF_INTC0_ICR39 (*(vuint8 *)(void*)(&__IPSBAR[0x000C67])) -#define MCF_INTC0_ICR40 (*(vuint8 *)(void*)(&__IPSBAR[0x000C68])) -#define MCF_INTC0_ICR41 (*(vuint8 *)(void*)(&__IPSBAR[0x000C69])) -#define MCF_INTC0_ICR42 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6A])) -#define MCF_INTC0_ICR43 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6B])) -#define MCF_INTC0_ICR44 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6C])) -#define MCF_INTC0_ICR45 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6D])) -#define MCF_INTC0_ICR46 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6E])) -#define MCF_INTC0_ICR47 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6F])) -#define MCF_INTC0_ICR48 (*(vuint8 *)(void*)(&__IPSBAR[0x000C70])) -#define MCF_INTC0_ICR49 (*(vuint8 *)(void*)(&__IPSBAR[0x000C71])) -#define MCF_INTC0_ICR50 (*(vuint8 *)(void*)(&__IPSBAR[0x000C72])) -#define MCF_INTC0_ICR51 (*(vuint8 *)(void*)(&__IPSBAR[0x000C73])) -#define MCF_INTC0_ICR52 (*(vuint8 *)(void*)(&__IPSBAR[0x000C74])) -#define MCF_INTC0_ICR53 (*(vuint8 *)(void*)(&__IPSBAR[0x000C75])) -#define MCF_INTC0_ICR54 (*(vuint8 *)(void*)(&__IPSBAR[0x000C76])) -#define MCF_INTC0_ICR55 (*(vuint8 *)(void*)(&__IPSBAR[0x000C77])) -#define MCF_INTC0_ICR56 (*(vuint8 *)(void*)(&__IPSBAR[0x000C78])) -#define MCF_INTC0_ICR57 (*(vuint8 *)(void*)(&__IPSBAR[0x000C79])) -#define MCF_INTC0_ICR58 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7A])) -#define MCF_INTC0_ICR59 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7B])) -#define MCF_INTC0_ICR60 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7C])) -#define MCF_INTC0_ICR61 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7D])) -#define MCF_INTC0_ICR62 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7E])) -#define MCF_INTC0_ICR63 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7F])) -#define MCF_INTC0_ICRn(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000C40+((x)*0x001)])) -#define MCF_INTC0_SWIACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE0])) -#define MCF_INTC0_L1IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE4])) -#define MCF_INTC0_L2IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE8])) -#define MCF_INTC0_L3IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CEC])) -#define MCF_INTC0_L4IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF0])) -#define MCF_INTC0_L5IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF4])) -#define MCF_INTC0_L6IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF8])) -#define MCF_INTC0_L7IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CFC])) -#define MCF_INTC0_LnIACK(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000CE4+((x)*0x004)])) - -/* Bit definitions and macros for MCF_INTC0_IPRH */ -#define MCF_INTC0_IPRH_INT32 (0x00000001) -#define MCF_INTC0_IPRH_INT33 (0x00000002) -#define MCF_INTC0_IPRH_INT34 (0x00000004) -#define MCF_INTC0_IPRH_INT35 (0x00000008) -#define MCF_INTC0_IPRH_INT36 (0x00000010) -#define MCF_INTC0_IPRH_INT37 (0x00000020) -#define MCF_INTC0_IPRH_INT38 (0x00000040) -#define MCF_INTC0_IPRH_INT39 (0x00000080) -#define MCF_INTC0_IPRH_INT40 (0x00000100) -#define MCF_INTC0_IPRH_INT41 (0x00000200) -#define MCF_INTC0_IPRH_INT42 (0x00000400) -#define MCF_INTC0_IPRH_INT43 (0x00000800) -#define MCF_INTC0_IPRH_INT44 (0x00001000) -#define MCF_INTC0_IPRH_INT45 (0x00002000) -#define MCF_INTC0_IPRH_INT46 (0x00004000) -#define MCF_INTC0_IPRH_INT47 (0x00008000) -#define MCF_INTC0_IPRH_INT48 (0x00010000) -#define MCF_INTC0_IPRH_INT49 (0x00020000) -#define MCF_INTC0_IPRH_INT50 (0x00040000) -#define MCF_INTC0_IPRH_INT51 (0x00080000) -#define MCF_INTC0_IPRH_INT52 (0x00100000) -#define MCF_INTC0_IPRH_INT53 (0x00200000) -#define MCF_INTC0_IPRH_INT54 (0x00400000) -#define MCF_INTC0_IPRH_INT55 (0x00800000) -#define MCF_INTC0_IPRH_INT56 (0x01000000) -#define MCF_INTC0_IPRH_INT57 (0x02000000) -#define MCF_INTC0_IPRH_INT58 (0x04000000) -#define MCF_INTC0_IPRH_INT59 (0x08000000) -#define MCF_INTC0_IPRH_INT60 (0x10000000) -#define MCF_INTC0_IPRH_INT61 (0x20000000) -#define MCF_INTC0_IPRH_INT62 (0x40000000) -#define MCF_INTC0_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IPRL */ -#define MCF_INTC0_IPRL_INT1 (0x00000002) -#define MCF_INTC0_IPRL_INT2 (0x00000004) -#define MCF_INTC0_IPRL_INT3 (0x00000008) -#define MCF_INTC0_IPRL_INT4 (0x00000010) -#define MCF_INTC0_IPRL_INT5 (0x00000020) -#define MCF_INTC0_IPRL_INT6 (0x00000040) -#define MCF_INTC0_IPRL_INT7 (0x00000080) -#define MCF_INTC0_IPRL_INT8 (0x00000100) -#define MCF_INTC0_IPRL_INT9 (0x00000200) -#define MCF_INTC0_IPRL_INT10 (0x00000400) -#define MCF_INTC0_IPRL_INT11 (0x00000800) -#define MCF_INTC0_IPRL_INT12 (0x00001000) -#define MCF_INTC0_IPRL_INT13 (0x00002000) -#define MCF_INTC0_IPRL_INT14 (0x00004000) -#define MCF_INTC0_IPRL_INT15 (0x00008000) -#define MCF_INTC0_IPRL_INT16 (0x00010000) -#define MCF_INTC0_IPRL_INT17 (0x00020000) -#define MCF_INTC0_IPRL_INT18 (0x00040000) -#define MCF_INTC0_IPRL_INT19 (0x00080000) -#define MCF_INTC0_IPRL_INT20 (0x00100000) -#define MCF_INTC0_IPRL_INT21 (0x00200000) -#define MCF_INTC0_IPRL_INT22 (0x00400000) -#define MCF_INTC0_IPRL_INT23 (0x00800000) -#define MCF_INTC0_IPRL_INT24 (0x01000000) -#define MCF_INTC0_IPRL_INT25 (0x02000000) -#define MCF_INTC0_IPRL_INT26 (0x04000000) -#define MCF_INTC0_IPRL_INT27 (0x08000000) -#define MCF_INTC0_IPRL_INT28 (0x10000000) -#define MCF_INTC0_IPRL_INT29 (0x20000000) -#define MCF_INTC0_IPRL_INT30 (0x40000000) -#define MCF_INTC0_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IMRH */ -#define MCF_INTC0_IMRH_INT_MASK32 (0x00000001) -#define MCF_INTC0_IMRH_INT_MASK33 (0x00000002) -#define MCF_INTC0_IMRH_INT_MASK34 (0x00000004) -#define MCF_INTC0_IMRH_INT_MASK35 (0x00000008) -#define MCF_INTC0_IMRH_INT_MASK36 (0x00000010) -#define MCF_INTC0_IMRH_INT_MASK37 (0x00000020) -#define MCF_INTC0_IMRH_INT_MASK38 (0x00000040) -#define MCF_INTC0_IMRH_INT_MASK39 (0x00000080) -#define MCF_INTC0_IMRH_INT_MASK40 (0x00000100) -#define MCF_INTC0_IMRH_INT_MASK41 (0x00000200) -#define MCF_INTC0_IMRH_INT_MASK42 (0x00000400) -#define MCF_INTC0_IMRH_INT_MASK43 (0x00000800) -#define MCF_INTC0_IMRH_INT_MASK44 (0x00001000) -#define MCF_INTC0_IMRH_INT_MASK45 (0x00002000) -#define MCF_INTC0_IMRH_INT_MASK46 (0x00004000) -#define MCF_INTC0_IMRH_INT_MASK47 (0x00008000) -#define MCF_INTC0_IMRH_INT_MASK48 (0x00010000) -#define MCF_INTC0_IMRH_INT_MASK49 (0x00020000) -#define MCF_INTC0_IMRH_INT_MASK50 (0x00040000) -#define MCF_INTC0_IMRH_INT_MASK51 (0x00080000) -#define MCF_INTC0_IMRH_INT_MASK52 (0x00100000) -#define MCF_INTC0_IMRH_INT_MASK53 (0x00200000) -#define MCF_INTC0_IMRH_INT_MASK54 (0x00400000) -#define MCF_INTC0_IMRH_INT_MASK55 (0x00800000) -#define MCF_INTC0_IMRH_INT_MASK56 (0x01000000) -#define MCF_INTC0_IMRH_INT_MASK57 (0x02000000) -#define MCF_INTC0_IMRH_INT_MASK58 (0x04000000) -#define MCF_INTC0_IMRH_INT_MASK59 (0x08000000) -#define MCF_INTC0_IMRH_INT_MASK60 (0x10000000) -#define MCF_INTC0_IMRH_INT_MASK61 (0x20000000) -#define MCF_INTC0_IMRH_INT_MASK62 (0x40000000) -#define MCF_INTC0_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IMRL */ -#define MCF_INTC0_IMRL_MASKALL (0x00000001) -#define MCF_INTC0_IMRL_INT_MASK1 (0x00000002) -#define MCF_INTC0_IMRL_INT_MASK2 (0x00000004) -#define MCF_INTC0_IMRL_INT_MASK3 (0x00000008) -#define MCF_INTC0_IMRL_INT_MASK4 (0x00000010) -#define MCF_INTC0_IMRL_INT_MASK5 (0x00000020) -#define MCF_INTC0_IMRL_INT_MASK6 (0x00000040) -#define MCF_INTC0_IMRL_INT_MASK7 (0x00000080) -#define MCF_INTC0_IMRL_INT_MASK8 (0x00000100) -#define MCF_INTC0_IMRL_INT_MASK9 (0x00000200) -#define MCF_INTC0_IMRL_INT_MASK10 (0x00000400) -#define MCF_INTC0_IMRL_INT_MASK11 (0x00000800) -#define MCF_INTC0_IMRL_INT_MASK12 (0x00001000) -#define MCF_INTC0_IMRL_INT_MASK13 (0x00002000) -#define MCF_INTC0_IMRL_INT_MASK14 (0x00004000) -#define MCF_INTC0_IMRL_INT_MASK15 (0x00008000) -#define MCF_INTC0_IMRL_INT_MASK16 (0x00010000) -#define MCF_INTC0_IMRL_INT_MASK17 (0x00020000) -#define MCF_INTC0_IMRL_INT_MASK18 (0x00040000) -#define MCF_INTC0_IMRL_INT_MASK19 (0x00080000) -#define MCF_INTC0_IMRL_INT_MASK20 (0x00100000) -#define MCF_INTC0_IMRL_INT_MASK21 (0x00200000) -#define MCF_INTC0_IMRL_INT_MASK22 (0x00400000) -#define MCF_INTC0_IMRL_INT_MASK23 (0x00800000) -#define MCF_INTC0_IMRL_INT_MASK24 (0x01000000) -#define MCF_INTC0_IMRL_INT_MASK25 (0x02000000) -#define MCF_INTC0_IMRL_INT_MASK26 (0x04000000) -#define MCF_INTC0_IMRL_INT_MASK27 (0x08000000) -#define MCF_INTC0_IMRL_INT_MASK28 (0x10000000) -#define MCF_INTC0_IMRL_INT_MASK29 (0x20000000) -#define MCF_INTC0_IMRL_INT_MASK30 (0x40000000) -#define MCF_INTC0_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_INTFRCH */ -#define MCF_INTC0_INTFRCH_INTFRC32 (0x00000001) -#define MCF_INTC0_INTFRCH_INTFRC33 (0x00000002) -#define MCF_INTC0_INTFRCH_INTFRC34 (0x00000004) -#define MCF_INTC0_INTFRCH_INTFRC35 (0x00000008) -#define MCF_INTC0_INTFRCH_INTFRC36 (0x00000010) -#define MCF_INTC0_INTFRCH_INTFRC37 (0x00000020) -#define MCF_INTC0_INTFRCH_INTFRC38 (0x00000040) -#define MCF_INTC0_INTFRCH_INTFRC39 (0x00000080) -#define MCF_INTC0_INTFRCH_INTFRC40 (0x00000100) -#define MCF_INTC0_INTFRCH_INTFRC41 (0x00000200) -#define MCF_INTC0_INTFRCH_INTFRC42 (0x00000400) -#define MCF_INTC0_INTFRCH_INTFRC43 (0x00000800) -#define MCF_INTC0_INTFRCH_INTFRC44 (0x00001000) -#define MCF_INTC0_INTFRCH_INTFRC45 (0x00002000) -#define MCF_INTC0_INTFRCH_INTFRC46 (0x00004000) -#define MCF_INTC0_INTFRCH_INTFRC47 (0x00008000) -#define MCF_INTC0_INTFRCH_INTFRC48 (0x00010000) -#define MCF_INTC0_INTFRCH_INTFRC49 (0x00020000) -#define MCF_INTC0_INTFRCH_INTFRC50 (0x00040000) -#define MCF_INTC0_INTFRCH_INTFRC51 (0x00080000) -#define MCF_INTC0_INTFRCH_INTFRC52 (0x00100000) -#define MCF_INTC0_INTFRCH_INTFRC53 (0x00200000) -#define MCF_INTC0_INTFRCH_INTFRC54 (0x00400000) -#define MCF_INTC0_INTFRCH_INTFRC55 (0x00800000) -#define MCF_INTC0_INTFRCH_INTFRC56 (0x01000000) -#define MCF_INTC0_INTFRCH_INTFRC57 (0x02000000) -#define MCF_INTC0_INTFRCH_INTFRC58 (0x04000000) -#define MCF_INTC0_INTFRCH_INTFRC59 (0x08000000) -#define MCF_INTC0_INTFRCH_INTFRC60 (0x10000000) -#define MCF_INTC0_INTFRCH_INTFRC61 (0x20000000) -#define MCF_INTC0_INTFRCH_INTFRC62 (0x40000000) -#define MCF_INTC0_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_INTFRCL */ -#define MCF_INTC0_INTFRCL_INTFRC1 (0x00000002) -#define MCF_INTC0_INTFRCL_INTFRC2 (0x00000004) -#define MCF_INTC0_INTFRCL_INTFRC3 (0x00000008) -#define MCF_INTC0_INTFRCL_INTFRC4 (0x00000010) -#define MCF_INTC0_INTFRCL_INTFRC5 (0x00000020) -#define MCF_INTC0_INTFRCL_INT6 (0x00000040) -#define MCF_INTC0_INTFRCL_INT7 (0x00000080) -#define MCF_INTC0_INTFRCL_INT8 (0x00000100) -#define MCF_INTC0_INTFRCL_INT9 (0x00000200) -#define MCF_INTC0_INTFRCL_INT10 (0x00000400) -#define MCF_INTC0_INTFRCL_INTFRC11 (0x00000800) -#define MCF_INTC0_INTFRCL_INTFRC12 (0x00001000) -#define MCF_INTC0_INTFRCL_INTFRC13 (0x00002000) -#define MCF_INTC0_INTFRCL_INTFRC14 (0x00004000) -#define MCF_INTC0_INTFRCL_INT15 (0x00008000) -#define MCF_INTC0_INTFRCL_INTFRC16 (0x00010000) -#define MCF_INTC0_INTFRCL_INTFRC17 (0x00020000) -#define MCF_INTC0_INTFRCL_INTFRC18 (0x00040000) -#define MCF_INTC0_INTFRCL_INTFRC19 (0x00080000) -#define MCF_INTC0_INTFRCL_INTFRC20 (0x00100000) -#define MCF_INTC0_INTFRCL_INTFRC21 (0x00200000) -#define MCF_INTC0_INTFRCL_INTFRC22 (0x00400000) -#define MCF_INTC0_INTFRCL_INTFRC23 (0x00800000) -#define MCF_INTC0_INTFRCL_INTFRC24 (0x01000000) -#define MCF_INTC0_INTFRCL_INTFRC25 (0x02000000) -#define MCF_INTC0_INTFRCL_INTFRC26 (0x04000000) -#define MCF_INTC0_INTFRCL_INTFRC27 (0x08000000) -#define MCF_INTC0_INTFRCL_INTFRC28 (0x10000000) -#define MCF_INTC0_INTFRCL_INTFRC29 (0x20000000) -#define MCF_INTC0_INTFRCL_INTFRC30 (0x40000000) -#define MCF_INTC0_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IRLR */ -#define MCF_INTC0_IRLR_IRQ(x) (((x)&0x7F)<<1) - -/* Bit definitions and macros for MCF_INTC0_IACKLPR */ -#define MCF_INTC0_IACKLPR_PRI(x) (((x)&0x0F)<<0) -#define MCF_INTC0_IACKLPR_LEVEL(x) (((x)&0x07)<<4) - -/* Bit definitions and macros for MCF_INTC0_ICRn */ -#define MCF_INTC0_ICRn_IP(x) (((x)&0x07)<<0) -#define MCF_INTC0_ICRn_IL(x) (((x)&0x07)<<3) - -/********************************************************************/ - -#endif /* __MCF523X_INTC0_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_intc1.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_intc1.h deleted file mode 100644 index c6d41432..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_intc1.h +++ /dev/null @@ -1,327 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_INTC1_H__ -#define __MCF523X_INTC1_H__ - -/********************************************************************* -* -* Interrupt Controller 1 (INTC1) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_INTC1_IPRH (*(vuint32*)(void*)(&__IPSBAR[0x000D00])) -#define MCF_INTC1_IPRL (*(vuint32*)(void*)(&__IPSBAR[0x000D04])) -#define MCF_INTC1_IMRH (*(vuint32*)(void*)(&__IPSBAR[0x000D08])) -#define MCF_INTC1_IMRL (*(vuint32*)(void*)(&__IPSBAR[0x000D0C])) -#define MCF_INTC1_INTFRCH (*(vuint32*)(void*)(&__IPSBAR[0x000D10])) -#define MCF_INTC1_INTFRCL (*(vuint32*)(void*)(&__IPSBAR[0x000D14])) -#define MCF_INTC1_IRLR (*(vuint8 *)(void*)(&__IPSBAR[0x000D18])) -#define MCF_INTC1_IACKLPR (*(vuint8 *)(void*)(&__IPSBAR[0x000D19])) -#define MCF_INTC1_ICR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000D40])) -#define MCF_INTC1_ICR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000D41])) -#define MCF_INTC1_ICR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000D42])) -#define MCF_INTC1_ICR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000D43])) -#define MCF_INTC1_ICR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000D44])) -#define MCF_INTC1_ICR5 (*(vuint8 *)(void*)(&__IPSBAR[0x000D45])) -#define MCF_INTC1_ICR6 (*(vuint8 *)(void*)(&__IPSBAR[0x000D46])) -#define MCF_INTC1_ICR7 (*(vuint8 *)(void*)(&__IPSBAR[0x000D47])) -#define MCF_INTC1_ICR8 (*(vuint8 *)(void*)(&__IPSBAR[0x000D48])) -#define MCF_INTC1_ICR9 (*(vuint8 *)(void*)(&__IPSBAR[0x000D49])) -#define MCF_INTC1_ICR10 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4A])) -#define MCF_INTC1_ICR11 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4B])) -#define MCF_INTC1_ICR12 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4C])) -#define MCF_INTC1_ICR13 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4D])) -#define MCF_INTC1_ICR14 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4E])) -#define MCF_INTC1_ICR15 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4F])) -#define MCF_INTC1_ICR16 (*(vuint8 *)(void*)(&__IPSBAR[0x000D50])) -#define MCF_INTC1_ICR17 (*(vuint8 *)(void*)(&__IPSBAR[0x000D51])) -#define MCF_INTC1_ICR18 (*(vuint8 *)(void*)(&__IPSBAR[0x000D52])) -#define MCF_INTC1_ICR19 (*(vuint8 *)(void*)(&__IPSBAR[0x000D53])) -#define MCF_INTC1_ICR20 (*(vuint8 *)(void*)(&__IPSBAR[0x000D54])) -#define MCF_INTC1_ICR21 (*(vuint8 *)(void*)(&__IPSBAR[0x000D55])) -#define MCF_INTC1_ICR22 (*(vuint8 *)(void*)(&__IPSBAR[0x000D56])) -#define MCF_INTC1_ICR23 (*(vuint8 *)(void*)(&__IPSBAR[0x000D57])) -#define MCF_INTC1_ICR24 (*(vuint8 *)(void*)(&__IPSBAR[0x000D58])) -#define MCF_INTC1_ICR25 (*(vuint8 *)(void*)(&__IPSBAR[0x000D59])) -#define MCF_INTC1_ICR26 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5A])) -#define MCF_INTC1_ICR27 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5B])) -#define MCF_INTC1_ICR28 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5C])) -#define MCF_INTC1_ICR29 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5D])) -#define MCF_INTC1_ICR30 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5E])) -#define MCF_INTC1_ICR31 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5F])) -#define MCF_INTC1_ICR32 (*(vuint8 *)(void*)(&__IPSBAR[0x000D60])) -#define MCF_INTC1_ICR33 (*(vuint8 *)(void*)(&__IPSBAR[0x000D61])) -#define MCF_INTC1_ICR34 (*(vuint8 *)(void*)(&__IPSBAR[0x000D62])) -#define MCF_INTC1_ICR35 (*(vuint8 *)(void*)(&__IPSBAR[0x000D63])) -#define MCF_INTC1_ICR36 (*(vuint8 *)(void*)(&__IPSBAR[0x000D64])) -#define MCF_INTC1_ICR37 (*(vuint8 *)(void*)(&__IPSBAR[0x000D65])) -#define MCF_INTC1_ICR38 (*(vuint8 *)(void*)(&__IPSBAR[0x000D66])) -#define MCF_INTC1_ICR39 (*(vuint8 *)(void*)(&__IPSBAR[0x000D67])) -#define MCF_INTC1_ICR40 (*(vuint8 *)(void*)(&__IPSBAR[0x000D68])) -#define MCF_INTC1_ICR41 (*(vuint8 *)(void*)(&__IPSBAR[0x000D69])) -#define MCF_INTC1_ICR42 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6A])) -#define MCF_INTC1_ICR43 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6B])) -#define MCF_INTC1_ICR44 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6C])) -#define MCF_INTC1_ICR45 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6D])) -#define MCF_INTC1_ICR46 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6E])) -#define MCF_INTC1_ICR47 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6F])) -#define MCF_INTC1_ICR48 (*(vuint8 *)(void*)(&__IPSBAR[0x000D70])) -#define MCF_INTC1_ICR49 (*(vuint8 *)(void*)(&__IPSBAR[0x000D71])) -#define MCF_INTC1_ICR50 (*(vuint8 *)(void*)(&__IPSBAR[0x000D72])) -#define MCF_INTC1_ICR51 (*(vuint8 *)(void*)(&__IPSBAR[0x000D73])) -#define MCF_INTC1_ICR52 (*(vuint8 *)(void*)(&__IPSBAR[0x000D74])) -#define MCF_INTC1_ICR53 (*(vuint8 *)(void*)(&__IPSBAR[0x000D75])) -#define MCF_INTC1_ICR54 (*(vuint8 *)(void*)(&__IPSBAR[0x000D76])) -#define MCF_INTC1_ICR55 (*(vuint8 *)(void*)(&__IPSBAR[0x000D77])) -#define MCF_INTC1_ICR56 (*(vuint8 *)(void*)(&__IPSBAR[0x000D78])) -#define MCF_INTC1_ICR57 (*(vuint8 *)(void*)(&__IPSBAR[0x000D79])) -#define MCF_INTC1_ICR58 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7A])) -#define MCF_INTC1_ICR59 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7B])) -#define MCF_INTC1_ICR60 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7C])) -#define MCF_INTC1_ICR61 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7D])) -#define MCF_INTC1_ICR62 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7E])) -#define MCF_INTC1_ICR63 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7F])) -#define MCF_INTC1_ICRn(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000D40+((x)*0x001)])) -#define MCF_INTC1_SWIACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DE0])) -#define MCF_INTC1_L1IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DE4])) -#define MCF_INTC1_L2IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DE8])) -#define MCF_INTC1_L3IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DEC])) -#define MCF_INTC1_L4IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DF0])) -#define MCF_INTC1_L5IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DF4])) -#define MCF_INTC1_L6IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DF8])) -#define MCF_INTC1_L7IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DFC])) -#define MCF_INTC1_LnIACK(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000DE4+((x)*0x004)])) - -/* Bit definitions and macros for MCF_INTC1_IPRH */ -#define MCF_INTC1_IPRH_INT32 (0x00000001) -#define MCF_INTC1_IPRH_INT33 (0x00000002) -#define MCF_INTC1_IPRH_INT34 (0x00000004) -#define MCF_INTC1_IPRH_INT35 (0x00000008) -#define MCF_INTC1_IPRH_INT36 (0x00000010) -#define MCF_INTC1_IPRH_INT37 (0x00000020) -#define MCF_INTC1_IPRH_INT38 (0x00000040) -#define MCF_INTC1_IPRH_INT39 (0x00000080) -#define MCF_INTC1_IPRH_INT40 (0x00000100) -#define MCF_INTC1_IPRH_INT41 (0x00000200) -#define MCF_INTC1_IPRH_INT42 (0x00000400) -#define MCF_INTC1_IPRH_INT43 (0x00000800) -#define MCF_INTC1_IPRH_INT44 (0x00001000) -#define MCF_INTC1_IPRH_INT45 (0x00002000) -#define MCF_INTC1_IPRH_INT46 (0x00004000) -#define MCF_INTC1_IPRH_INT47 (0x00008000) -#define MCF_INTC1_IPRH_INT48 (0x00010000) -#define MCF_INTC1_IPRH_INT49 (0x00020000) -#define MCF_INTC1_IPRH_INT50 (0x00040000) -#define MCF_INTC1_IPRH_INT51 (0x00080000) -#define MCF_INTC1_IPRH_INT52 (0x00100000) -#define MCF_INTC1_IPRH_INT53 (0x00200000) -#define MCF_INTC1_IPRH_INT54 (0x00400000) -#define MCF_INTC1_IPRH_INT55 (0x00800000) -#define MCF_INTC1_IPRH_INT56 (0x01000000) -#define MCF_INTC1_IPRH_INT57 (0x02000000) -#define MCF_INTC1_IPRH_INT58 (0x04000000) -#define MCF_INTC1_IPRH_INT59 (0x08000000) -#define MCF_INTC1_IPRH_INT60 (0x10000000) -#define MCF_INTC1_IPRH_INT61 (0x20000000) -#define MCF_INTC1_IPRH_INT62 (0x40000000) -#define MCF_INTC1_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IPRL */ -#define MCF_INTC1_IPRL_INT1 (0x00000002) -#define MCF_INTC1_IPRL_INT2 (0x00000004) -#define MCF_INTC1_IPRL_INT3 (0x00000008) -#define MCF_INTC1_IPRL_INT4 (0x00000010) -#define MCF_INTC1_IPRL_INT5 (0x00000020) -#define MCF_INTC1_IPRL_INT6 (0x00000040) -#define MCF_INTC1_IPRL_INT7 (0x00000080) -#define MCF_INTC1_IPRL_INT8 (0x00000100) -#define MCF_INTC1_IPRL_INT9 (0x00000200) -#define MCF_INTC1_IPRL_INT10 (0x00000400) -#define MCF_INTC1_IPRL_INT11 (0x00000800) -#define MCF_INTC1_IPRL_INT12 (0x00001000) -#define MCF_INTC1_IPRL_INT13 (0x00002000) -#define MCF_INTC1_IPRL_INT14 (0x00004000) -#define MCF_INTC1_IPRL_INT15 (0x00008000) -#define MCF_INTC1_IPRL_INT16 (0x00010000) -#define MCF_INTC1_IPRL_INT17 (0x00020000) -#define MCF_INTC1_IPRL_INT18 (0x00040000) -#define MCF_INTC1_IPRL_INT19 (0x00080000) -#define MCF_INTC1_IPRL_INT20 (0x00100000) -#define MCF_INTC1_IPRL_INT21 (0x00200000) -#define MCF_INTC1_IPRL_INT22 (0x00400000) -#define MCF_INTC1_IPRL_INT23 (0x00800000) -#define MCF_INTC1_IPRL_INT24 (0x01000000) -#define MCF_INTC1_IPRL_INT25 (0x02000000) -#define MCF_INTC1_IPRL_INT26 (0x04000000) -#define MCF_INTC1_IPRL_INT27 (0x08000000) -#define MCF_INTC1_IPRL_INT28 (0x10000000) -#define MCF_INTC1_IPRL_INT29 (0x20000000) -#define MCF_INTC1_IPRL_INT30 (0x40000000) -#define MCF_INTC1_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IMRH */ -#define MCF_INTC1_IMRH_INT_MASK32 (0x00000001) -#define MCF_INTC1_IMRH_INT_MASK33 (0x00000002) -#define MCF_INTC1_IMRH_INT_MASK34 (0x00000004) -#define MCF_INTC1_IMRH_INT_MASK35 (0x00000008) -#define MCF_INTC1_IMRH_INT_MASK36 (0x00000010) -#define MCF_INTC1_IMRH_INT_MASK37 (0x00000020) -#define MCF_INTC1_IMRH_INT_MASK38 (0x00000040) -#define MCF_INTC1_IMRH_INT_MASK39 (0x00000080) -#define MCF_INTC1_IMRH_INT_MASK40 (0x00000100) -#define MCF_INTC1_IMRH_INT_MASK41 (0x00000200) -#define MCF_INTC1_IMRH_INT_MASK42 (0x00000400) -#define MCF_INTC1_IMRH_INT_MASK43 (0x00000800) -#define MCF_INTC1_IMRH_INT_MASK44 (0x00001000) -#define MCF_INTC1_IMRH_INT_MASK45 (0x00002000) -#define MCF_INTC1_IMRH_INT_MASK46 (0x00004000) -#define MCF_INTC1_IMRH_INT_MASK47 (0x00008000) -#define MCF_INTC1_IMRH_INT_MASK48 (0x00010000) -#define MCF_INTC1_IMRH_INT_MASK49 (0x00020000) -#define MCF_INTC1_IMRH_INT_MASK50 (0x00040000) -#define MCF_INTC1_IMRH_INT_MASK51 (0x00080000) -#define MCF_INTC1_IMRH_INT_MASK52 (0x00100000) -#define MCF_INTC1_IMRH_INT_MASK53 (0x00200000) -#define MCF_INTC1_IMRH_INT_MASK54 (0x00400000) -#define MCF_INTC1_IMRH_INT_MASK55 (0x00800000) -#define MCF_INTC1_IMRH_INT_MASK56 (0x01000000) -#define MCF_INTC1_IMRH_INT_MASK57 (0x02000000) -#define MCF_INTC1_IMRH_INT_MASK58 (0x04000000) -#define MCF_INTC1_IMRH_INT_MASK59 (0x08000000) -#define MCF_INTC1_IMRH_INT_MASK60 (0x10000000) -#define MCF_INTC1_IMRH_INT_MASK61 (0x20000000) -#define MCF_INTC1_IMRH_INT_MASK62 (0x40000000) -#define MCF_INTC1_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IMRL */ -#define MCF_INTC1_IMRL_MASKALL (0x00000001) -#define MCF_INTC1_IMRL_INT_MASK1 (0x00000002) -#define MCF_INTC1_IMRL_INT_MASK2 (0x00000004) -#define MCF_INTC1_IMRL_INT_MASK3 (0x00000008) -#define MCF_INTC1_IMRL_INT_MASK4 (0x00000010) -#define MCF_INTC1_IMRL_INT_MASK5 (0x00000020) -#define MCF_INTC1_IMRL_INT_MASK6 (0x00000040) -#define MCF_INTC1_IMRL_INT_MASK7 (0x00000080) -#define MCF_INTC1_IMRL_INT_MASK8 (0x00000100) -#define MCF_INTC1_IMRL_INT_MASK9 (0x00000200) -#define MCF_INTC1_IMRL_INT_MASK10 (0x00000400) -#define MCF_INTC1_IMRL_INT_MASK11 (0x00000800) -#define MCF_INTC1_IMRL_INT_MASK12 (0x00001000) -#define MCF_INTC1_IMRL_INT_MASK13 (0x00002000) -#define MCF_INTC1_IMRL_INT_MASK14 (0x00004000) -#define MCF_INTC1_IMRL_INT_MASK15 (0x00008000) -#define MCF_INTC1_IMRL_INT_MASK16 (0x00010000) -#define MCF_INTC1_IMRL_INT_MASK17 (0x00020000) -#define MCF_INTC1_IMRL_INT_MASK18 (0x00040000) -#define MCF_INTC1_IMRL_INT_MASK19 (0x00080000) -#define MCF_INTC1_IMRL_INT_MASK20 (0x00100000) -#define MCF_INTC1_IMRL_INT_MASK21 (0x00200000) -#define MCF_INTC1_IMRL_INT_MASK22 (0x00400000) -#define MCF_INTC1_IMRL_INT_MASK23 (0x00800000) -#define MCF_INTC1_IMRL_INT_MASK24 (0x01000000) -#define MCF_INTC1_IMRL_INT_MASK25 (0x02000000) -#define MCF_INTC1_IMRL_INT_MASK26 (0x04000000) -#define MCF_INTC1_IMRL_INT_MASK27 (0x08000000) -#define MCF_INTC1_IMRL_INT_MASK28 (0x10000000) -#define MCF_INTC1_IMRL_INT_MASK29 (0x20000000) -#define MCF_INTC1_IMRL_INT_MASK30 (0x40000000) -#define MCF_INTC1_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_INTFRCH */ -#define MCF_INTC1_INTFRCH_INTFRC32 (0x00000001) -#define MCF_INTC1_INTFRCH_INTFRC33 (0x00000002) -#define MCF_INTC1_INTFRCH_INTFRC34 (0x00000004) -#define MCF_INTC1_INTFRCH_INTFRC35 (0x00000008) -#define MCF_INTC1_INTFRCH_INTFRC36 (0x00000010) -#define MCF_INTC1_INTFRCH_INTFRC37 (0x00000020) -#define MCF_INTC1_INTFRCH_INTFRC38 (0x00000040) -#define MCF_INTC1_INTFRCH_INTFRC39 (0x00000080) -#define MCF_INTC1_INTFRCH_INTFRC40 (0x00000100) -#define MCF_INTC1_INTFRCH_INTFRC41 (0x00000200) -#define MCF_INTC1_INTFRCH_INTFRC42 (0x00000400) -#define MCF_INTC1_INTFRCH_INTFRC43 (0x00000800) -#define MCF_INTC1_INTFRCH_INTFRC44 (0x00001000) -#define MCF_INTC1_INTFRCH_INTFRC45 (0x00002000) -#define MCF_INTC1_INTFRCH_INTFRC46 (0x00004000) -#define MCF_INTC1_INTFRCH_INTFRC47 (0x00008000) -#define MCF_INTC1_INTFRCH_INTFRC48 (0x00010000) -#define MCF_INTC1_INTFRCH_INTFRC49 (0x00020000) -#define MCF_INTC1_INTFRCH_INTFRC50 (0x00040000) -#define MCF_INTC1_INTFRCH_INTFRC51 (0x00080000) -#define MCF_INTC1_INTFRCH_INTFRC52 (0x00100000) -#define MCF_INTC1_INTFRCH_INTFRC53 (0x00200000) -#define MCF_INTC1_INTFRCH_INTFRC54 (0x00400000) -#define MCF_INTC1_INTFRCH_INTFRC55 (0x00800000) -#define MCF_INTC1_INTFRCH_INTFRC56 (0x01000000) -#define MCF_INTC1_INTFRCH_INTFRC57 (0x02000000) -#define MCF_INTC1_INTFRCH_INTFRC58 (0x04000000) -#define MCF_INTC1_INTFRCH_INTFRC59 (0x08000000) -#define MCF_INTC1_INTFRCH_INTFRC60 (0x10000000) -#define MCF_INTC1_INTFRCH_INTFRC61 (0x20000000) -#define MCF_INTC1_INTFRCH_INTFRC62 (0x40000000) -#define MCF_INTC1_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_INTFRCL */ -#define MCF_INTC1_INTFRCL_INTFRC1 (0x00000002) -#define MCF_INTC1_INTFRCL_INTFRC2 (0x00000004) -#define MCF_INTC1_INTFRCL_INTFRC3 (0x00000008) -#define MCF_INTC1_INTFRCL_INTFRC4 (0x00000010) -#define MCF_INTC1_INTFRCL_INTFRC5 (0x00000020) -#define MCF_INTC1_INTFRCL_INT6 (0x00000040) -#define MCF_INTC1_INTFRCL_INT7 (0x00000080) -#define MCF_INTC1_INTFRCL_INT8 (0x00000100) -#define MCF_INTC1_INTFRCL_INT9 (0x00000200) -#define MCF_INTC1_INTFRCL_INT10 (0x00000400) -#define MCF_INTC1_INTFRCL_INTFRC11 (0x00000800) -#define MCF_INTC1_INTFRCL_INTFRC12 (0x00001000) -#define MCF_INTC1_INTFRCL_INTFRC13 (0x00002000) -#define MCF_INTC1_INTFRCL_INTFRC14 (0x00004000) -#define MCF_INTC1_INTFRCL_INT15 (0x00008000) -#define MCF_INTC1_INTFRCL_INTFRC16 (0x00010000) -#define MCF_INTC1_INTFRCL_INTFRC17 (0x00020000) -#define MCF_INTC1_INTFRCL_INTFRC18 (0x00040000) -#define MCF_INTC1_INTFRCL_INTFRC19 (0x00080000) -#define MCF_INTC1_INTFRCL_INTFRC20 (0x00100000) -#define MCF_INTC1_INTFRCL_INTFRC21 (0x00200000) -#define MCF_INTC1_INTFRCL_INTFRC22 (0x00400000) -#define MCF_INTC1_INTFRCL_INTFRC23 (0x00800000) -#define MCF_INTC1_INTFRCL_INTFRC24 (0x01000000) -#define MCF_INTC1_INTFRCL_INTFRC25 (0x02000000) -#define MCF_INTC1_INTFRCL_INTFRC26 (0x04000000) -#define MCF_INTC1_INTFRCL_INTFRC27 (0x08000000) -#define MCF_INTC1_INTFRCL_INTFRC28 (0x10000000) -#define MCF_INTC1_INTFRCL_INTFRC29 (0x20000000) -#define MCF_INTC1_INTFRCL_INTFRC30 (0x40000000) -#define MCF_INTC1_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IRLR */ -#define MCF_INTC1_IRLR_IRQ(x) (((x)&0x7F)<<1) - -/* Bit definitions and macros for MCF_INTC1_IACKLPR */ -#define MCF_INTC1_IACKLPR_PRI(x) (((x)&0x0F)<<0) -#define MCF_INTC1_IACKLPR_LEVEL(x) (((x)&0x07)<<4) - -/* Bit definitions and macros for MCF_INTC1_ICRn */ -#define MCF_INTC1_ICRn_IP(x) (((x)&0x07)<<0) -#define MCF_INTC1_ICRn_IL(x) (((x)&0x07)<<3) - -/********************************************************************/ - -#endif /* __MCF523X_INTC1_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_mdha.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_mdha.h deleted file mode 100644 index 55e89585..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_mdha.h +++ /dev/null @@ -1,105 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_MDHA_H__ -#define __MCF523X_MDHA_H__ - -/********************************************************************* -* -* Message Digest Hardware Accelerator (MDHA) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_MDHA_MDMR (*(vuint32*)(void*)(&__IPSBAR[0x190000])) -#define MCF_MDHA_MDCR (*(vuint32*)(void*)(&__IPSBAR[0x190004])) -#define MCF_MDHA_MDCMR (*(vuint32*)(void*)(&__IPSBAR[0x190008])) -#define MCF_MDHA_MDSR (*(vuint32*)(void*)(&__IPSBAR[0x19000C])) -#define MCF_MDHA_MDISR (*(vuint32*)(void*)(&__IPSBAR[0x190010])) -#define MCF_MDHA_MDIMR (*(vuint32*)(void*)(&__IPSBAR[0x190014])) -#define MCF_MDHA_MDDSR (*(vuint32*)(void*)(&__IPSBAR[0x19001C])) -#define MCF_MDHA_MDIN (*(vuint32*)(void*)(&__IPSBAR[0x190020])) -#define MCF_MDHA_MDA0 (*(vuint32*)(void*)(&__IPSBAR[0x190030])) -#define MCF_MDHA_MDB0 (*(vuint32*)(void*)(&__IPSBAR[0x190034])) -#define MCF_MDHA_MDC0 (*(vuint32*)(void*)(&__IPSBAR[0x190038])) -#define MCF_MDHA_MDD0 (*(vuint32*)(void*)(&__IPSBAR[0x19003C])) -#define MCF_MDHA_MDE0 (*(vuint32*)(void*)(&__IPSBAR[0x190040])) -#define MCF_MDHA_MDMDS (*(vuint32*)(void*)(&__IPSBAR[0x190044])) -#define MCF_MDHA_MDA1 (*(vuint32*)(void*)(&__IPSBAR[0x190070])) -#define MCF_MDHA_MDB1 (*(vuint32*)(void*)(&__IPSBAR[0x190074])) -#define MCF_MDHA_MDC1 (*(vuint32*)(void*)(&__IPSBAR[0x190078])) -#define MCF_MDHA_MDD1 (*(vuint32*)(void*)(&__IPSBAR[0x19007C])) -#define MCF_MDHA_MDE1 (*(vuint32*)(void*)(&__IPSBAR[0x190080])) - -/* Bit definitions and macros for MCF_MDHA_MDMR */ -#define MCF_MDHA_MDMR_ALG (0x00000001) -#define MCF_MDHA_MDMR_PDATA (0x00000004) -#define MCF_MDHA_MDMR_MAC(x) (((x)&0x00000003)<<3) -#define MCF_MDHA_MDMR_INIT (0x00000020) -#define MCF_MDHA_MDMR_IPAD (0x00000040) -#define MCF_MDHA_MDMR_OPAD (0x00000080) -#define MCF_MDHA_MDMR_SWAP (0x00000100) -#define MCF_MDHA_MDMR_MACFULL (0x00000200) -#define MCF_MDHA_MDMR_SSL (0x00000400) - -/* Bit definitions and macros for MCF_MDHA_MDCR */ -#define MCF_MDHA_MDCR_IE (0x00000001) - -/* Bit definitions and macros for MCF_MDHA_MDCMR */ -#define MCF_MDHA_MDCMR_IE (0x00000001) -#define MCF_MDHA_MDCMR_RI (0x00000002) -#define MCF_MDHA_MDCMR_CI (0x00000004) -#define MCF_MDHA_MDCMR_GO (0x00000008) - -/* Bit definitions and macros for MCF_MDHA_MDSR */ -#define MCF_MDHA_MDSR_INT (0x00000001) -#define MCF_MDHA_MDSR_DONE (0x00000002) -#define MCF_MDHA_MDSR_ERR (0x00000004) -#define MCF_MDHA_MDSR_RD (0x00000008) -#define MCF_MDHA_MDSR_BUSY (0x00000010) -#define MCF_MDHA_MDSR_END (0x00000020) -#define MCF_MDHA_MDSR_HSH (0x00000040) -#define MCF_MDHA_MDSR_GNW (0x00000080) -#define MCF_MDHA_MDSR_FS(x) (((x)&0x00000007)<<8) -#define MCF_MDHA_MDSR_APD(x) (((x)&0x00000007)<<13) -#define MCF_MDHA_MDSR_IFL(x) (((x)&0x000000FF)<<16) - -/* Bit definitions and macros for MCF_MDHA_MDIR */ -#define MCF_MDHA_MDIR_IFO (0x00000001) -#define MCF_MDHA_MDIR_NON (0x00000004) -#define MCF_MDHA_MDIR_IME (0x00000010) -#define MCF_MDHA_MDIR_IDS (0x00000020) -#define MCF_MDHA_MDIR_RMDP (0x00000080) -#define MCF_MDHA_MDIR_ERE (0x00000100) -#define MCF_MDHA_MDIR_GTDS (0x00000200) - -/* Bit definitions and macros for MCF_MDHA_MDIMR */ -#define MCF_MDHA_MDIMR_IFO (0x00000001) -#define MCF_MDHA_MDIMR_NON (0x00000004) -#define MCF_MDHA_MDIMR_IME (0x00000010) -#define MCF_MDHA_MDIMR_IDS (0x00000020) -#define MCF_MDHA_MDIMR_RMDP (0x00000080) -#define MCF_MDHA_MDIMR_ERE (0x00000100) -#define MCF_MDHA_MDIMR_GTDS (0x00000200) - -/* Bit definitions and macros for MCF_MDHA_MDDSR */ -#define MCF_MDHA_MDDSR_DATASIZE(x) (((x)&0x1FFFFFFF)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_MDHA_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_pit.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_pit.h deleted file mode 100644 index 9eda0f23..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_pit.h +++ /dev/null @@ -1,93 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_PIT_H__ -#define __MCF523X_PIT_H__ - -/********************************************************************* -* -* Programmable Interrupt Timer Modules (PIT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PIT_PCSR0 (*(vuint16*)(void*)(&__IPSBAR[0x150000])) -#define MCF_PIT_PMR0 (*(vuint16*)(void*)(&__IPSBAR[0x150002])) -#define MCF_PIT_PCNTR0 (*(vuint16*)(void*)(&__IPSBAR[0x150004])) -#define MCF_PIT_PCSR1 (*(vuint16*)(void*)(&__IPSBAR[0x160000])) -#define MCF_PIT_PMR1 (*(vuint16*)(void*)(&__IPSBAR[0x160002])) -#define MCF_PIT_PCNTR1 (*(vuint16*)(void*)(&__IPSBAR[0x160004])) -#define MCF_PIT_PCSR2 (*(vuint16*)(void*)(&__IPSBAR[0x170000])) -#define MCF_PIT_PMR2 (*(vuint16*)(void*)(&__IPSBAR[0x170002])) -#define MCF_PIT_PCNTR2 (*(vuint16*)(void*)(&__IPSBAR[0x170004])) -#define MCF_PIT_PCSR3 (*(vuint16*)(void*)(&__IPSBAR[0x180000])) -#define MCF_PIT_PMR3 (*(vuint16*)(void*)(&__IPSBAR[0x180002])) -#define MCF_PIT_PCNTR3 (*(vuint16*)(void*)(&__IPSBAR[0x180004])) -#define MCF_PIT_PCSR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150000+((x)*0x10000)])) -#define MCF_PIT_PMR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150002+((x)*0x10000)])) -#define MCF_PIT_PCNTR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150004+((x)*0x10000)])) - -/* Bit definitions and macros for MCF_PIT_PCSR */ -#define MCF_PIT_PCSR_EN (0x0001) -#define MCF_PIT_PCSR_RLD (0x0002) -#define MCF_PIT_PCSR_PIF (0x0004) -#define MCF_PIT_PCSR_PIE (0x0008) -#define MCF_PIT_PCSR_OVW (0x0010) -#define MCF_PIT_PCSR_HALTED (0x0020) -#define MCF_PIT_PCSR_DOZE (0x0040) -#define MCF_PIT_PCSR_PRE(x) (((x)&0x000F)<<8) - -/* Bit definitions and macros for MCF_PIT_PMR */ -#define MCF_PIT_PMR_PM0 (0x0001) -#define MCF_PIT_PMR_PM1 (0x0002) -#define MCF_PIT_PMR_PM2 (0x0004) -#define MCF_PIT_PMR_PM3 (0x0008) -#define MCF_PIT_PMR_PM4 (0x0010) -#define MCF_PIT_PMR_PM5 (0x0020) -#define MCF_PIT_PMR_PM6 (0x0040) -#define MCF_PIT_PMR_PM7 (0x0080) -#define MCF_PIT_PMR_PM8 (0x0100) -#define MCF_PIT_PMR_PM9 (0x0200) -#define MCF_PIT_PMR_PM10 (0x0400) -#define MCF_PIT_PMR_PM11 (0x0800) -#define MCF_PIT_PMR_PM12 (0x1000) -#define MCF_PIT_PMR_PM13 (0x2000) -#define MCF_PIT_PMR_PM14 (0x4000) -#define MCF_PIT_PMR_PM15 (0x8000) - -/* Bit definitions and macros for MCF_PIT_PCNTR */ -#define MCF_PIT_PCNTR_PC0 (0x0001) -#define MCF_PIT_PCNTR_PC1 (0x0002) -#define MCF_PIT_PCNTR_PC2 (0x0004) -#define MCF_PIT_PCNTR_PC3 (0x0008) -#define MCF_PIT_PCNTR_PC4 (0x0010) -#define MCF_PIT_PCNTR_PC5 (0x0020) -#define MCF_PIT_PCNTR_PC6 (0x0040) -#define MCF_PIT_PCNTR_PC7 (0x0080) -#define MCF_PIT_PCNTR_PC8 (0x0100) -#define MCF_PIT_PCNTR_PC9 (0x0200) -#define MCF_PIT_PCNTR_PC10 (0x0400) -#define MCF_PIT_PCNTR_PC11 (0x0800) -#define MCF_PIT_PCNTR_PC12 (0x1000) -#define MCF_PIT_PCNTR_PC13 (0x2000) -#define MCF_PIT_PCNTR_PC14 (0x4000) -#define MCF_PIT_PCNTR_PC15 (0x8000) - -/********************************************************************/ - -#endif /* __MCF523X_PIT_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_qspi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_qspi.h deleted file mode 100644 index 02620f38..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_qspi.h +++ /dev/null @@ -1,73 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_QSPI_H__ -#define __MCF523X_QSPI_H__ - -/********************************************************************* -* -* Queued Serial Peripheral Interface (QSPI) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_QSPI_QMR (*(vuint16*)(void*)(&__IPSBAR[0x000340])) -#define MCF_QSPI_QDLYR (*(vuint16*)(void*)(&__IPSBAR[0x000344])) -#define MCF_QSPI_QWR (*(vuint16*)(void*)(&__IPSBAR[0x000348])) -#define MCF_QSPI_QIR (*(vuint16*)(void*)(&__IPSBAR[0x00034C])) -#define MCF_QSPI_QAR (*(vuint16*)(void*)(&__IPSBAR[0x000350])) -#define MCF_QSPI_QDR (*(vuint16*)(void*)(&__IPSBAR[0x000354])) - -/* Bit definitions and macros for MCF_QSPI_QMR */ -#define MCF_QSPI_QMR_BAUD(x) (((x)&0x00FF)<<0) -#define MCF_QSPI_QMR_CPHA (0x0100) -#define MCF_QSPI_QMR_CPOL (0x0200) -#define MCF_QSPI_QMR_BITS(x) (((x)&0x000F)<<10) -#define MCF_QSPI_QMR_DOHIE (0x4000) -#define MCF_QSPI_QMR_MSTR (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QDLYR */ -#define MCF_QSPI_QDLYR_DTL(x) (((x)&0x00FF)<<0) -#define MCF_QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8) -#define MCF_QSPI_QDLYR_SPE (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QWR */ -#define MCF_QSPI_QWR_NEWQP(x) (((x)&0x000F)<<0) -#define MCF_QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8) -#define MCF_QSPI_QWR_CSIV (0x1000) -#define MCF_QSPI_QWR_WRTO (0x2000) -#define MCF_QSPI_QWR_WREN (0x4000) -#define MCF_QSPI_QWR_HALT (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QIR */ -#define MCF_QSPI_QIR_SPIF (0x0001) -#define MCF_QSPI_QIR_ABRT (0x0004) -#define MCF_QSPI_QIR_WCEF (0x0008) -#define MCF_QSPI_QIR_SPIFE (0x0100) -#define MCF_QSPI_QIR_ABRTE (0x0400) -#define MCF_QSPI_QIR_WCEFE (0x0800) -#define MCF_QSPI_QIR_ABRTL (0x1000) -#define MCF_QSPI_QIR_ABRTB (0x4000) -#define MCF_QSPI_QIR_WCEFB (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QAR */ -#define MCF_QSPI_QAR_ADDR(x) (((x)&0x003F)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_QSPI_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_rcm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_rcm.h deleted file mode 100644 index 35a3c587..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_rcm.h +++ /dev/null @@ -1,46 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_RCM_H__ -#define __MCF523X_RCM_H__ - -/********************************************************************* -* -* Reset Configuration Module (RCM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_RCM_RCR (*(vuint8 *)(void*)(&__IPSBAR[0x110000])) -#define MCF_RCM_RSR (*(vuint8 *)(void*)(&__IPSBAR[0x110001])) - -/* Bit definitions and macros for MCF_RCM_RCR */ -#define MCF_RCM_RCR_FRCRSTOUT (0x40) -#define MCF_RCM_RCR_SOFTRST (0x80) - -/* Bit definitions and macros for MCF_RCM_RSR */ -#define MCF_RCM_RSR_LOL (0x01) -#define MCF_RCM_RSR_LOC (0x02) -#define MCF_RCM_RSR_EXT (0x04) -#define MCF_RCM_RSR_POR (0x08) -#define MCF_RCM_RSR_WDR (0x10) -#define MCF_RCM_RSR_SOFT (0x20) - -/********************************************************************/ - -#endif /* __MCF523X_RCM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_rng.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_rng.h deleted file mode 100644 index ca74a1a0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_rng.h +++ /dev/null @@ -1,51 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - - -#ifndef __MCF523X_RNG_H__ -#define __MCF523X_RNG_H__ - -/********************************************************************* -* -* Random Number Generator (RNG) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_RNG_RNGCR (*(vuint32*)(void*)(&__IPSBAR[0x1A0000])) -#define MCF_RNG_RNGSR (*(vuint32*)(void*)(&__IPSBAR[0x1A0004])) -#define MCF_RNG_RNGER (*(vuint32*)(void*)(&__IPSBAR[0x1A0008])) -#define MCF_RNG_RNGOUT (*(vuint32*)(void*)(&__IPSBAR[0x1A000C])) - -/* Bit definitions and macros for MCF_RNG_RNGCR */ -#define MCF_RNG_RNGCR_GO (0x00000001) -#define MCF_RNG_RNGCR_HA (0x00000002) -#define MCF_RNG_RNGCR_IM (0x00000004) -#define MCF_RNG_RNGCR_CI (0x00000008) - -/* Bit definitions and macros for MCF_RNG_RNGSR */ -#define MCF_RNG_RNGSR_SV (0x00000001) -#define MCF_RNG_RNGSR_LRS (0x00000002) -#define MCF_RNG_RNGSR_FUF (0x00000004) -#define MCF_RNG_RNGSR_EI (0x00000008) -#define MCF_RNG_RNGSR_OFL(x) (((x)&0x000000FF)<<8) -#define MCF_RNG_RNGSR_OFS(x) (((x)&0x000000FF)<<16) - -/********************************************************************/ - -#endif /* __MCF523X_RNG_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_scm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_scm.h deleted file mode 100644 index fc21b480..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_scm.h +++ /dev/null @@ -1,155 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - - -#ifndef __MCF523X_SCM_H__ -#define __MCF523X_SCM_H__ - -/********************************************************************* -* -* System Control Module (SCM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SCM_IPSBAR (*(vuint32*)(void*)(&__IPSBAR[0x000000])) -#define MCF_SCM_RAMBAR (*(vuint32*)(void*)(&__IPSBAR[0x000008])) -#define MCF_SCM_CRSR (*(vuint8 *)(void*)(&__IPSBAR[0x000010])) -#define MCF_SCM_CWCR (*(vuint8 *)(void*)(&__IPSBAR[0x000011])) -#define MCF_SCM_LPICR (*(vuint8 *)(void*)(&__IPSBAR[0x000012])) -#define MCF_SCM_CWSR (*(vuint8 *)(void*)(&__IPSBAR[0x000013])) -#define MCF_SCM_DMAREQC (*(vuint32*)(void*)(&__IPSBAR[0x000014])) -#define MCF_SCM_MPARK (*(vuint32*)(void*)(&__IPSBAR[0x00001C])) -#define MCF_SCM_MPR (*(vuint8 *)(void*)(&__IPSBAR[0x000020])) -#define MCF_SCM_PACR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000024])) -#define MCF_SCM_PACR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000025])) -#define MCF_SCM_PACR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000026])) -#define MCF_SCM_PACR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000027])) -#define MCF_SCM_PACR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000028])) -#define MCF_SCM_PACR5 (*(vuint8 *)(void*)(&__IPSBAR[0x00002A])) -#define MCF_SCM_PACR6 (*(vuint8 *)(void*)(&__IPSBAR[0x00002B])) -#define MCF_SCM_PACR7 (*(vuint8 *)(void*)(&__IPSBAR[0x00002C])) -#define MCF_SCM_PACR8 (*(vuint8 *)(void*)(&__IPSBAR[0x00002E])) -#define MCF_SCM_GPACR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000030])) - -/* Bit definitions and macros for MCF_SCM_IPSBAR */ -#define MCF_SCM_IPSBAR_V (0x00000001) -#define MCF_SCM_IPSBAR_BA(x) (((x)&0x00000003)<<30) - -/* Bit definitions and macros for MCF_SCM_RAMBAR */ -#define MCF_SCM_RAMBAR_BDE (0x00000200) -#define MCF_SCM_RAMBAR_BA(x) (((x)&0x0000FFFF)<<16) - -/* Bit definitions and macros for MCF_SCM_CRSR */ -#define MCF_SCM_CRSR_CWDR (0x20) -#define MCF_SCM_CRSR_EXT (0x80) - -/* Bit definitions and macros for MCF_SCM_CWCR */ -#define MCF_SCM_CWCR_CWTIC (0x01) -#define MCF_SCM_CWCR_CWTAVAL (0x02) -#define MCF_SCM_CWCR_CWTA (0x04) -#define MCF_SCM_CWCR_CWT(x) (((x)&0x07)<<3) -#define MCF_SCM_CWCR_CWRI (0x40) -#define MCF_SCM_CWCR_CWE (0x80) - -/* Bit definitions and macros for MCF_SCM_LPICR */ -#define MCF_SCM_LPICR_XLPM_IPL(x) (((x)&0x07)<<4) -#define MCF_SCM_LPICR_ENBSTOP (0x80) - -/* Bit definitions and macros for MCF_SCM_DMAREQC */ -#define MCF_SCM_DMAREQC_DMAC0(x) (((x)&0x0000000F)<<0) -#define MCF_SCM_DMAREQC_DMAC1(x) (((x)&0x0000000F)<<4) -#define MCF_SCM_DMAREQC_DMAC2(x) (((x)&0x0000000F)<<8) -#define MCF_SCM_DMAREQC_DMAC3(x) (((x)&0x0000000F)<<12) - -/* Bit definitions and macros for MCF_SCM_MPARK */ -#define MCF_SCM_MPARK_LCKOUT_TIME(x) (((x)&0x0000000F)<<8) -#define MCF_SCM_MPARK_PRKLAST (0x00001000) -#define MCF_SCM_MPARK_TIMEOUT (0x00002000) -#define MCF_SCM_MPARK_FIXED (0x00004000) -#define MCF_SCM_MPARK_M1_PRTY(x) (((x)&0x00000003)<<16) -#define MCF_SCM_MPARK_M0_PRTY(x) (((x)&0x00000003)<<18) -#define MCF_SCM_MPARK_M2_PRTY(x) (((x)&0x00000003)<<20) -#define MCF_SCM_MPARK_M3_PRTY(x) (((x)&0x00000003)<<22) -#define MCF_SCM_MPARK_BCR24BIT (0x01000000) -#define MCF_SCM_MPARK_M2_P_EN (0x02000000) - -/* Bit definitions and macros for MCF_SCM_MPR */ -#define MCF_SCM_MPR_MPR(x) (((x)&0x0F)<<0) - -/* Bit definitions and macros for MCF_SCM_PACR0 */ -#define MCF_SCM_PACR0_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR0_LOCK0 (0x08) -#define MCF_SCM_PACR0_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR0_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR1 */ -#define MCF_SCM_PACR1_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR1_LOCK0 (0x08) -#define MCF_SCM_PACR1_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR1_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR2 */ -#define MCF_SCM_PACR2_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR2_LOCK0 (0x08) -#define MCF_SCM_PACR2_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR2_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR3 */ -#define MCF_SCM_PACR3_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR3_LOCK0 (0x08) -#define MCF_SCM_PACR3_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR3_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR4 */ -#define MCF_SCM_PACR4_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR4_LOCK0 (0x08) -#define MCF_SCM_PACR4_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR4_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR5 */ -#define MCF_SCM_PACR5_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR5_LOCK0 (0x08) -#define MCF_SCM_PACR5_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR5_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR6 */ -#define MCF_SCM_PACR6_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR6_LOCK0 (0x08) -#define MCF_SCM_PACR6_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR6_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR7 */ -#define MCF_SCM_PACR7_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR7_LOCK0 (0x08) -#define MCF_SCM_PACR7_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR7_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR8 */ -#define MCF_SCM_PACR8_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR8_LOCK0 (0x08) -#define MCF_SCM_PACR8_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR8_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_GPACR0 */ -#define MCF_SCM_GPACR0_ACCESS_CTRL(x) (((x)&0x0F)<<0) -#define MCF_SCM_GPACR0_LOCK (0x80) - -/********************************************************************/ - -#endif /* __MCF523X_SCM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_sdramc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_sdramc.h deleted file mode 100644 index 2f4d6299..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_sdramc.h +++ /dev/null @@ -1,98 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_SDRAMC_H__ -#define __MCF523X_SDRAMC_H__ - -/********************************************************************* -* -* SDRAM Controller (SDRAMC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SDRAMC_DCR (*(vuint16*)(void*)(&__IPSBAR[0x000040])) -#define MCF_SDRAMC_DACR0 (*(vuint32*)(void*)(&__IPSBAR[0x000048])) -#define MCF_SDRAMC_DMR0 (*(vuint32*)(void*)(&__IPSBAR[0x00004C])) -#define MCF_SDRAMC_DACR1 (*(vuint32*)(void*)(&__IPSBAR[0x000050])) -#define MCF_SDRAMC_DMR1 (*(vuint32*)(void*)(&__IPSBAR[0x000054])) - -/* Bit definitions and macros for MCF_SDRAMC_DCR */ -#define MCF_SDRAMC_DCR_RC(x) (((x)&0x01FF)<<0) -#define MCF_SDRAMC_DCR_RTIM(x) (((x)&0x0003)<<9) -#define MCF_SDRAMC_DCR_IS (0x0800) -#define MCF_SDRAMC_DCR_COC (0x1000) -#define MCF_SDRAMC_DCR_NAM (0x2000) - -/* Bit definitions and macros for MCF_SDRAMC_DACR0 */ -#define MCF_SDRAMC_DACR0_IP (0x00000008) -#define MCF_SDRAMC_DACR0_PS(x) (((x)&0x00000003)<<4) -#define MCF_SDRAMC_DACR0_MRS (0x00000040) -#define MCF_SDRAMC_DACR0_CBM(x) (((x)&0x00000007)<<8) -#define MCF_SDRAMC_DACR0_CASL(x) (((x)&0x00000003)<<12) -#define MCF_SDRAMC_DACR0_RE (0x00008000) -#define MCF_SDRAMC_DACR0_BA(x) (((x)&0x00003FFF)<<18) - -/* Bit definitions and macros for MCF_SDRAMC_DMR0 */ -#define MCF_SDRAMC_DMR0_V (0x00000001) -#define MCF_SDRAMC_DMR0_WP (0x00000100) -#define MCF_SDRAMC_DMR0_BAM(x) (((x)&0x00003FFF)<<18) - -/* Bit definitions and macros for MCF_SDRAMC_DACR1 */ -#define MCF_SDRAMC_DACR1_IP (0x00000008) -#define MCF_SDRAMC_DACR1_PS(x) (((x)&0x00000003)<<4) -#define MCF_SDRAMC_DACR1_MRS (0x00000040) -#define MCF_SDRAMC_DACR1_CBM(x) (((x)&0x00000007)<<8) -#define MCF_SDRAMC_DACR1_CASL(x) (((x)&0x00000003)<<12) -#define MCF_SDRAMC_DACR1_RE (0x00008000) -#define MCF_SDRAMC_DACR1_BA(x) (((x)&0x00003FFF)<<18) - -/* Bit definitions and macros for MCF_SDRAMC_DMR1 */ -#define MCF_SDRAMC_DMR1_V (0x00000001) -#define MCF_SDRAMC_DMR1_WP (0x00000100) -#define MCF_SDRAMC_DMR1_BAM(x) (((x)&0x00003FFF)<<18) - -/********************************************************************/ - -#define MCF_SDRAMC_DMR_BAM_4G (0xFFFC0000) -#define MCF_SDRAMC_DMR_BAM_2G (0x7FFC0000) -#define MCF_SDRAMC_DMR_BAM_1G (0x3FFC0000) -#define MCF_SDRAMC_DMR_BAM_1024M (0x3FFC0000) -#define MCF_SDRAMC_DMR_BAM_512M (0x1FFC0000) -#define MCF_SDRAMC_DMR_BAM_256M (0x0FFC0000) -#define MCF_SDRAMC_DMR_BAM_128M (0x07FC0000) -#define MCF_SDRAMC_DMR_BAM_64M (0x03FC0000) -#define MCF_SDRAMC_DMR_BAM_32M (0x01FC0000) -#define MCF_SDRAMC_DMR_BAM_16M (0x00FC0000) -#define MCF_SDRAMC_DMR_BAM_8M (0x007C0000) -#define MCF_SDRAMC_DMR_BAM_4M (0x003C0000) -#define MCF_SDRAMC_DMR_BAM_2M (0x001C0000) -#define MCF_SDRAMC_DMR_BAM_1M (0x000C0000) -#define MCF_SDRAMC_DMR_BAM_1024K (0x000C0000) -#define MCF_SDRAMC_DMR_BAM_512K (0x00040000) -#define MCF_SDRAMC_DMR_BAM_256K (0x00000000) -#define MCF_SDRAMC_DMR_WP (0x00000100) -#define MCF_SDRAMC_DMR_CI (0x00000040) -#define MCF_SDRAMC_DMR_AM (0x00000020) -#define MCF_SDRAMC_DMR_SC (0x00000010) -#define MCF_SDRAMC_DMR_SD (0x00000008) -#define MCF_SDRAMC_DMR_UC (0x00000004) -#define MCF_SDRAMC_DMR_UD (0x00000002) -#define MCF_SDRAMC_DMR_V (0x00000001) - -#endif /* __MCF523X_SDRAMC_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_skha.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_skha.h deleted file mode 100644 index 1ccd55c8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_skha.h +++ /dev/null @@ -1,124 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_SKHA_H__ -#define __MCF523X_SKHA_H__ - -/********************************************************************* -* -* Symmetric Key Hardware Accelerator (SKHA) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SKHA_SKMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0000])) -#define MCF_SKHA_SKCR (*(vuint32*)(void*)(&__IPSBAR[0x1B0004])) -#define MCF_SKHA_SKCMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0008])) -#define MCF_SKHA_SKSR (*(vuint32*)(void*)(&__IPSBAR[0x1B000C])) -#define MCF_SKHA_SKIR (*(vuint32*)(void*)(&__IPSBAR[0x1B0010])) -#define MCF_SKHA_SKIMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0014])) -#define MCF_SKHA_SKKSR (*(vuint32*)(void*)(&__IPSBAR[0x1B0018])) -#define MCF_SKHA_SKDSR (*(vuint32*)(void*)(&__IPSBAR[0x1B001C])) -#define MCF_SKHA_SKIN (*(vuint32*)(void*)(&__IPSBAR[0x1B0020])) -#define MCF_SKHA_SKOUT (*(vuint32*)(void*)(&__IPSBAR[0x1B0024])) -#define MCF_SKHA_SKKDR0 (*(vuint32*)(void*)(&__IPSBAR[0x1B0030])) -#define MCF_SKHA_SKKDR1 (*(vuint32*)(void*)(&__IPSBAR[0x1B0034])) -#define MCF_SKHA_SKKDR2 (*(vuint32*)(void*)(&__IPSBAR[0x1B0038])) -#define MCF_SKHA_SKKDR3 (*(vuint32*)(void*)(&__IPSBAR[0x1B003C])) -#define MCF_SKHA_SKKDR4 (*(vuint32*)(void*)(&__IPSBAR[0x1B0040])) -#define MCF_SKHA_SKKDR5 (*(vuint32*)(void*)(&__IPSBAR[0x1B0044])) -#define MCF_SKHA_SKKDRn(x) (*(vuint32*)(void*)(&__IPSBAR[0x1B0030+((x)*0x004)])) -#define MCF_SKHA_SKCR0 (*(vuint32*)(void*)(&__IPSBAR[0x1B0070])) -#define MCF_SKHA_SKCR1 (*(vuint32*)(void*)(&__IPSBAR[0x1B0074])) -#define MCF_SKHA_SKCR2 (*(vuint32*)(void*)(&__IPSBAR[0x1B0078])) -#define MCF_SKHA_SKCR3 (*(vuint32*)(void*)(&__IPSBAR[0x1B007C])) -#define MCF_SKHA_SKCR4 (*(vuint32*)(void*)(&__IPSBAR[0x1B0080])) -#define MCF_SKHA_SKCR5 (*(vuint32*)(void*)(&__IPSBAR[0x1B0084])) -#define MCF_SKHA_SKCR6 (*(vuint32*)(void*)(&__IPSBAR[0x1B0088])) -#define MCF_SKHA_SKCR7 (*(vuint32*)(void*)(&__IPSBAR[0x1B008C])) -#define MCF_SKHA_SKCR8 (*(vuint32*)(void*)(&__IPSBAR[0x1B0090])) -#define MCF_SKHA_SKCR9 (*(vuint32*)(void*)(&__IPSBAR[0x1B0094])) -#define MCF_SKHA_SKCR10 (*(vuint32*)(void*)(&__IPSBAR[0x1B0098])) -#define MCF_SKHA_SKCR11 (*(vuint32*)(void*)(&__IPSBAR[0x1B009C])) -#define MCF_SKHA_SKCRn(x) (*(vuint32*)(void*)(&__IPSBAR[0x1B0070+((x)*0x004)])) - -/* Bit definitions and macros for MCF_SKHA_SKMR */ -#define MCF_SKHA_SKMR_ALG(x) (((x)&0x00000003)<<0) -#define MCF_SKHA_SKMR_DIR (0x00000004) -#define MCF_SKHA_SKMR_CM(x) (((x)&0x00000003)<<3) -#define MCF_SKHA_SKMR_DKP (0x00000100) -#define MCF_SKHA_SKMR_CTRM(x) (((x)&0x0000000F)<<9) -#define MCF_SKHA_SKMR_CM_ECB (0x00000000) -#define MCF_SKHA_SKMR_CM_CBC (0x00000008) -#define MCF_SKHA_SKMR_CM_CTR (0x00000018) -#define MCF_SKHA_SKMR_DIR_DEC (0x00000000) -#define MCF_SKHA_SKMR_DIR_ENC (0x00000004) -#define MCF_SKHA_SKMR_ALG_AES (0x00000000) -#define MCF_SKHA_SKMR_ALG_DES (0x00000001) -#define MCF_SKHA_SKMR_ALG_TDES (0x00000002) - -/* Bit definitions and macros for MCF_SKHA_SKCR */ -#define MCF_SKHA_SKCR_IE (0x00000001) - -/* Bit definitions and macros for MCF_SKHA_SKCMR */ -#define MCF_SKHA_SKCMR_SWR (0x00000001) -#define MCF_SKHA_SKCMR_RI (0x00000002) -#define MCF_SKHA_SKCMR_CI (0x00000004) -#define MCF_SKHA_SKCMR_GO (0x00000008) - -/* Bit definitions and macros for MCF_SKHA_SKSR */ -#define MCF_SKHA_SKSR_INT (0x00000001) -#define MCF_SKHA_SKSR_DONE (0x00000002) -#define MCF_SKHA_SKSR_ERR (0x00000004) -#define MCF_SKHA_SKSR_RD (0x00000008) -#define MCF_SKHA_SKSR_BUSY (0x00000010) -#define MCF_SKHA_SKSR_IFL(x) (((x)&0x000000FF)<<16) -#define MCF_SKHA_SKSR_OFL(x) (((x)&0x000000FF)<<24) - -/* Bit definitions and macros for MCF_SKHA_SKIR */ -#define MCF_SKHA_SKIR_IFO (0x00000001) -#define MCF_SKHA_SKIR_OFU (0x00000002) -#define MCF_SKHA_SKIR_NEIF (0x00000004) -#define MCF_SKHA_SKIR_NEOF (0x00000008) -#define MCF_SKHA_SKIR_IME (0x00000010) -#define MCF_SKHA_SKIR_DSE (0x00000020) -#define MCF_SKHA_SKIR_KSE (0x00000040) -#define MCF_SKHA_SKIR_RMDP (0x00000080) -#define MCF_SKHA_SKIR_ERE (0x00000100) -#define MCF_SKHA_SKIR_KPE (0x00000200) -#define MCF_SKHA_SKIR_KRE (0x00000400) - -/* Bit definitions and macros for MCF_SKHA_SKIMR */ -#define MCF_SKHA_SKIMR_IFO (0x00000001) -#define MCF_SKHA_SKIMR_OFU (0x00000002) -#define MCF_SKHA_SKIMR_NEIF (0x00000004) -#define MCF_SKHA_SKIMR_NEOF (0x00000008) -#define MCF_SKHA_SKIMR_IME (0x00000010) -#define MCF_SKHA_SKIMR_DSE (0x00000020) -#define MCF_SKHA_SKIMR_KSE (0x00000040) -#define MCF_SKHA_SKIMR_RMDP (0x00000080) -#define MCF_SKHA_SKIMR_ERE (0x00000100) -#define MCF_SKHA_SKIMR_KPE (0x00000200) -#define MCF_SKHA_SKIMR_KRE (0x00000400) - -/* Bit definitions and macros for MCF_SKHA_SKKSR */ -#define MCF_SKHA_SKKSR_KEYSIZE(x) (((x)&0x0000003F)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_SKHA_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_sram.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_sram.h deleted file mode 100644 index 9668ad5c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_sram.h +++ /dev/null @@ -1,46 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_SRAM_H__ -#define __MCF523X_SRAM_H__ - -/********************************************************************* -* -* 64KByte System SRAM (SRAM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SRAM_RAMBAR (*(vuint32*)(void*)(&__IPSBAR[0x20000000])) - -/* Bit definitions and macros for MCF_SRAM_RAMBAR */ -#define MCF_SRAM_RAMBAR_V (0x00000001) -#define MCF_SRAM_RAMBAR_UD (0x00000002) -#define MCF_SRAM_RAMBAR_UC (0x00000004) -#define MCF_SRAM_RAMBAR_SD (0x00000008) -#define MCF_SRAM_RAMBAR_SC (0x00000010) -#define MCF_SRAM_RAMBAR_C/I (0x00000020) -#define MCF_SRAM_RAMBAR_WP (0x00000100) -#define MCF_SRAM_RAMBAR_SPV (0x00000200) -#define MCF_SRAM_RAMBAR_PRI2 (0x00000400) -#define MCF_SRAM_RAMBAR_PRI1 (0x00000800) -#define MCF_SRAM_RAMBAR_BA(x) (((x)&0x0000FFFF)<<16) - -/********************************************************************/ - -#endif /* __MCF523X_SRAM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_timer.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_timer.h deleted file mode 100644 index 839a1d6f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_timer.h +++ /dev/null @@ -1,87 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_TIMER_H__ -#define __MCF523X_TIMER_H__ - -/********************************************************************* -* -* DMA Timers (TIMER) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_TIMER_DTMR0 (*(vuint16*)(void*)(&__IPSBAR[0x000400])) -#define MCF_TIMER_DTXMR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000402])) -#define MCF_TIMER_DTER0 (*(vuint8 *)(void*)(&__IPSBAR[0x000403])) -#define MCF_TIMER_DTRR0 (*(vuint32*)(void*)(&__IPSBAR[0x000404])) -#define MCF_TIMER_DTCR0 (*(vuint32*)(void*)(&__IPSBAR[0x000408])) -#define MCF_TIMER_DTCN0 (*(vuint32*)(void*)(&__IPSBAR[0x00040C])) -#define MCF_TIMER_DTMR1 (*(vuint16*)(void*)(&__IPSBAR[0x000440])) -#define MCF_TIMER_DTXMR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000442])) -#define MCF_TIMER_DTER1 (*(vuint8 *)(void*)(&__IPSBAR[0x000443])) -#define MCF_TIMER_DTRR1 (*(vuint32*)(void*)(&__IPSBAR[0x000444])) -#define MCF_TIMER_DTCR1 (*(vuint32*)(void*)(&__IPSBAR[0x000448])) -#define MCF_TIMER_DTCN1 (*(vuint32*)(void*)(&__IPSBAR[0x00044C])) -#define MCF_TIMER_DTMR2 (*(vuint16*)(void*)(&__IPSBAR[0x000480])) -#define MCF_TIMER_DTXMR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000482])) -#define MCF_TIMER_DTER2 (*(vuint8 *)(void*)(&__IPSBAR[0x000483])) -#define MCF_TIMER_DTRR2 (*(vuint32*)(void*)(&__IPSBAR[0x000484])) -#define MCF_TIMER_DTCR2 (*(vuint32*)(void*)(&__IPSBAR[0x000488])) -#define MCF_TIMER_DTCN2 (*(vuint32*)(void*)(&__IPSBAR[0x00048C])) -#define MCF_TIMER_DTMR3 (*(vuint16*)(void*)(&__IPSBAR[0x0004C0])) -#define MCF_TIMER_DTXMR3 (*(vuint8 *)(void*)(&__IPSBAR[0x0004C2])) -#define MCF_TIMER_DTER3 (*(vuint8 *)(void*)(&__IPSBAR[0x0004C3])) -#define MCF_TIMER_DTRR3 (*(vuint32*)(void*)(&__IPSBAR[0x0004C4])) -#define MCF_TIMER_DTCR3 (*(vuint32*)(void*)(&__IPSBAR[0x0004C8])) -#define MCF_TIMER_DTCN3 (*(vuint32*)(void*)(&__IPSBAR[0x0004CC])) -#define MCF_TIMER_DTMR(x) (*(vuint16*)(void*)(&__IPSBAR[0x000400+((x)*0x040)])) -#define MCF_TIMER_DTXMR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000402+((x)*0x040)])) -#define MCF_TIMER_DTER(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000403+((x)*0x040)])) -#define MCF_TIMER_DTRR(x) (*(vuint32*)(void*)(&__IPSBAR[0x000404+((x)*0x040)])) -#define MCF_TIMER_DTCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x000408+((x)*0x040)])) -#define MCF_TIMER_DTCN(x) (*(vuint32*)(void*)(&__IPSBAR[0x00040C+((x)*0x040)])) - -/* Bit definitions and macros for MCF_TIMER_DTMR */ -#define MCF_TIMER_DTMR_RST (0x0001) -#define MCF_TIMER_DTMR_CLK(x) (((x)&0x0003)<<1) -#define MCF_TIMER_DTMR_FRR (0x0008) -#define MCF_TIMER_DTMR_ORRI (0x0010) -#define MCF_TIMER_DTMR_OM (0x0020) -#define MCF_TIMER_DTMR_CE(x) (((x)&0x0003)<<6) -#define MCF_TIMER_DTMR_PS(x) (((x)&0x00FF)<<8) -#define MCF_TIMER_DTMR_CE_ANY (0x00C0) -#define MCF_TIMER_DTMR_CE_FALL (0x0080) -#define MCF_TIMER_DTMR_CE_RISE (0x0040) -#define MCF_TIMER_DTMR_CE_NONE (0x0000) -#define MCF_TIMER_DTMR_CLK_DTIN (0x0006) -#define MCF_TIMER_DTMR_CLK_DIV16 (0x0004) -#define MCF_TIMER_DTMR_CLK_DIV1 (0x0002) -#define MCF_TIMER_DTMR_CLK_STOP (0x0000) - -/* Bit definitions and macros for MCF_TIMER_DTXMR */ -#define MCF_TIMER_DTXMR_MODE16 (0x01) -#define MCF_TIMER_DTXMR_DMAEN (0x80) - -/* Bit definitions and macros for MCF_TIMER_DTER */ -#define MCF_TIMER_DTER_CAP (0x01) -#define MCF_TIMER_DTER_REF (0x02) - -/********************************************************************/ - -#endif /* __MCF523X_TIMER_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_uart.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_uart.h deleted file mode 100644 index 88827e37..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_uart.h +++ /dev/null @@ -1,190 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef __MCF523X_UART_H__ -#define __MCF523X_UART_H__ - -/********************************************************************* -* -* Universal Asynchronous Receiver Transmitter (UART) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_UART_UMR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000200])) -#define MCF_UART_USR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000204])) -#define MCF_UART_UCSR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000204])) -#define MCF_UART_UCR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000208])) -#define MCF_UART_URB0 (*(vuint8 *)(void*)(&__IPSBAR[0x00020C])) -#define MCF_UART_UTB0 (*(vuint8 *)(void*)(&__IPSBAR[0x00020C])) -#define MCF_UART_UIPCR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000210])) -#define MCF_UART_UACR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000210])) -#define MCF_UART_UISR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000214])) -#define MCF_UART_UIMR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000214])) -#define MCF_UART_UBG10 (*(vuint8 *)(void*)(&__IPSBAR[0x000218])) -#define MCF_UART_UBG20 (*(vuint8 *)(void*)(&__IPSBAR[0x00021C])) -#define MCF_UART_UIP0 (*(vuint8 *)(void*)(&__IPSBAR[0x000234])) -#define MCF_UART_UOP10 (*(vuint8 *)(void*)(&__IPSBAR[0x000238])) -#define MCF_UART_UOP00 (*(vuint8 *)(void*)(&__IPSBAR[0x00023C])) -#define MCF_UART_UMR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000240])) -#define MCF_UART_USR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000244])) -#define MCF_UART_UCSR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000244])) -#define MCF_UART_UCR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000248])) -#define MCF_UART_URB1 (*(vuint8 *)(void*)(&__IPSBAR[0x00024C])) -#define MCF_UART_UTB1 (*(vuint8 *)(void*)(&__IPSBAR[0x00024C])) -#define MCF_UART_UIPCR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000250])) -#define MCF_UART_UACR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000250])) -#define MCF_UART_UISR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000254])) -#define MCF_UART_UIMR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000254])) -#define MCF_UART_UBG11 (*(vuint8 *)(void*)(&__IPSBAR[0x000258])) -#define MCF_UART_UBG21 (*(vuint8 *)(void*)(&__IPSBAR[0x00025C])) -#define MCF_UART_UIP1 (*(vuint8 *)(void*)(&__IPSBAR[0x000274])) -#define MCF_UART_UOP11 (*(vuint8 *)(void*)(&__IPSBAR[0x000278])) -#define MCF_UART_UOP01 (*(vuint8 *)(void*)(&__IPSBAR[0x00027C])) -#define MCF_UART_UMR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000280])) -#define MCF_UART_USR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000284])) -#define MCF_UART_UCSR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000284])) -#define MCF_UART_UCR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000288])) -#define MCF_UART_URB2 (*(vuint8 *)(void*)(&__IPSBAR[0x00028C])) -#define MCF_UART_UTB2 (*(vuint8 *)(void*)(&__IPSBAR[0x00028C])) -#define MCF_UART_UIPCR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000290])) -#define MCF_UART_UACR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000290])) -#define MCF_UART_UISR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000294])) -#define MCF_UART_UIMR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000294])) -#define MCF_UART_UBG12 (*(vuint8 *)(void*)(&__IPSBAR[0x000298])) -#define MCF_UART_UBG22 (*(vuint8 *)(void*)(&__IPSBAR[0x00029C])) -#define MCF_UART_UIP2 (*(vuint8 *)(void*)(&__IPSBAR[0x0002B4])) -#define MCF_UART_UOP12 (*(vuint8 *)(void*)(&__IPSBAR[0x0002B8])) -#define MCF_UART_UOP02 (*(vuint8 *)(void*)(&__IPSBAR[0x0002BC])) -#define MCF_UART_UMR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000200+((x)*0x040)])) -#define MCF_UART_USR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000204+((x)*0x040)])) -#define MCF_UART_UCSR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000204+((x)*0x040)])) -#define MCF_UART_UCR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000208+((x)*0x040)])) -#define MCF_UART_URB(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00020C+((x)*0x040)])) -#define MCF_UART_UTB(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00020C+((x)*0x040)])) -#define MCF_UART_UIPCR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000210+((x)*0x040)])) -#define MCF_UART_UACR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000210+((x)*0x040)])) -#define MCF_UART_UISR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000214+((x)*0x040)])) -#define MCF_UART_UIMR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000214+((x)*0x040)])) -#define MCF_UART_UBG1(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000218+((x)*0x040)])) -#define MCF_UART_UBG2(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00021C+((x)*0x040)])) -#define MCF_UART_UIP(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000234+((x)*0x040)])) -#define MCF_UART_UOP1(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000238+((x)*0x040)])) -#define MCF_UART_UOP0(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00023C+((x)*0x040)])) - -/* Bit definitions and macros for MCF_UART_UMR */ -#define MCF_UART_UMR_BC(x) (((x)&0x03)<<0) -#define MCF_UART_UMR_PT (0x04) -#define MCF_UART_UMR_PM(x) (((x)&0x03)<<3) -#define MCF_UART_UMR_ERR (0x20) -#define MCF_UART_UMR_RXIRQ (0x40) -#define MCF_UART_UMR_RXRTS (0x80) -#define MCF_UART_UMR_SB(x) (((x)&0x0F)<<0) -#define MCF_UART_UMR_TXCTS (0x10) -#define MCF_UART_UMR_TXRTS (0x20) -#define MCF_UART_UMR_CM(x) (((x)&0x03)<<6) -#define MCF_UART_UMR_PM_MULTI_ADDR (0x1C) -#define MCF_UART_UMR_PM_MULTI_DATA (0x18) -#define MCF_UART_UMR_PM_NONE (0x10) -#define MCF_UART_UMR_PM_FORCE_HI (0x0C) -#define MCF_UART_UMR_PM_FORCE_LO (0x08) -#define MCF_UART_UMR_PM_ODD (0x04) -#define MCF_UART_UMR_PM_EVEN (0x00) -#define MCF_UART_UMR_BC_5 (0x00) -#define MCF_UART_UMR_BC_6 (0x01) -#define MCF_UART_UMR_BC_7 (0x02) -#define MCF_UART_UMR_BC_8 (0x03) -#define MCF_UART_UMR_CM_NORMAL (0x00) -#define MCF_UART_UMR_CM_ECHO (0x40) -#define MCF_UART_UMR_CM_LOCAL_LOOP (0x80) -#define MCF_UART_UMR_CM_REMOTE_LOOP (0xC0) -#define MCF_UART_UMR_SB_STOP_BITS_1 (0x07) -#define MCF_UART_UMR_SB_STOP_BITS_15 (0x08) -#define MCF_UART_UMR_SB_STOP_BITS_2 (0x0F) - -/* Bit definitions and macros for MCF_UART_USR */ -#define MCF_UART_USR_RXRDY (0x01) -#define MCF_UART_USR_FFULL (0x02) -#define MCF_UART_USR_TXRDY (0x04) -#define MCF_UART_USR_TXEMP (0x08) -#define MCF_UART_USR_OE (0x10) -#define MCF_UART_USR_PE (0x20) -#define MCF_UART_USR_FE (0x40) -#define MCF_UART_USR_RB (0x80) - -/* Bit definitions and macros for MCF_UART_UCSR */ -#define MCF_UART_UCSR_TCS(x) (((x)&0x0F)<<0) -#define MCF_UART_UCSR_RCS(x) (((x)&0x0F)<<4) -#define MCF_UART_UCSR_RCS_SYS_CLK (0xD0) -#define MCF_UART_UCSR_RCS_CTM16 (0xE0) -#define MCF_UART_UCSR_RCS_CTM (0xF0) -#define MCF_UART_UCSR_TCS_SYS_CLK (0x0D) -#define MCF_UART_UCSR_TCS_CTM16 (0x0E) -#define MCF_UART_UCSR_TCS_CTM (0x0F) - -/* Bit definitions and macros for MCF_UART_UCR */ -#define MCF_UART_UCR_RXC(x) (((x)&0x03)<<0) -#define MCF_UART_UCR_TXC(x) (((x)&0x03)<<2) -#define MCF_UART_UCR_MISC(x) (((x)&0x07)<<4) -#define MCF_UART_UCR_NONE (0x00) -#define MCF_UART_UCR_STOP_BREAK (0x70) -#define MCF_UART_UCR_START_BREAK (0x60) -#define MCF_UART_UCR_BKCHGINT (0x50) -#define MCF_UART_UCR_RESET_ERROR (0x40) -#define MCF_UART_UCR_RESET_TX (0x30) -#define MCF_UART_UCR_RESET_RX (0x20) -#define MCF_UART_UCR_RESET_MR (0x10) -#define MCF_UART_UCR_TX_DISABLED (0x08) -#define MCF_UART_UCR_TX_ENABLED (0x04) -#define MCF_UART_UCR_RX_DISABLED (0x02) -#define MCF_UART_UCR_RX_ENABLED (0x01) - -/* Bit definitions and macros for MCF_UART_UIPCR */ -#define MCF_UART_UIPCR_CTS (0x01) -#define MCF_UART_UIPCR_COS (0x10) - -/* Bit definitions and macros for MCF_UART_UACR */ -#define MCF_UART_UACR_IEC (0x01) - -/* Bit definitions and macros for MCF_UART_UISR */ -#define MCF_UART_UISR_TXRDY (0x01) -#define MCF_UART_UISR_RXRDY_FU (0x02) -#define MCF_UART_UISR_DB (0x04) -#define MCF_UART_UISR_RXFTO (0x08) -#define MCF_UART_UISR_TXFIFO (0x10) -#define MCF_UART_UISR_RXFIFO (0x20) -#define MCF_UART_UISR_COS (0x80) - -/* Bit definitions and macros for MCF_UART_UIMR */ -#define MCF_UART_UIMR_TXRDY (0x01) -#define MCF_UART_UIMR_RXRDY_FU (0x02) -#define MCF_UART_UIMR_DB (0x04) -#define MCF_UART_UIMR_COS (0x80) - -/* Bit definitions and macros for MCF_UART_UIP */ -#define MCF_UART_UIP_CTS (0x01) - -/* Bit definitions and macros for MCF_UART_UOP1 */ -#define MCF_UART_UOP1_RTS (0x01) - -/* Bit definitions and macros for MCF_UART_UOP0 */ -#define MCF_UART_UOP0_RTS (0x01) - -/********************************************************************/ - -#endif /* __MCF523X_UART_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_vars.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_vars.h deleted file mode 100644 index 695cef47..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_vars.h +++ /dev/null @@ -1,50 +0,0 @@ -/************************************************************************** - * FILE NAME: mcf523x_vars.h,v $ COPYRIGHT (c) Freescale 2004 * - * DESCRIPTION: All Rights Reserved * - * Variables that define some features of the MCF523x. * - * !!!!This file must only be included once in every project!!!! * - *========================================================================* - * ORIGINAL AUTHOR: Geoff Emerson [r47354] * - - **************************************************************************/ - -/* eTPU characteristics definition */ -struct eTPU_struct *eTPU = (struct eTPU_struct *)0x401D0000; - -uint32_t fs_etpu_code_start = 0x401E0000; -uint32_t fs_etpu_data_ram_start = 0x401D8000; -uint32_t fs_etpu_data_ram_end = 0x401D85FC; -uint32_t fs_etpu_data_ram_ext = 0x401DC000; - -/********************************************************************* - * - * Copyright: - * Freescale Semiconductor, INC. All Rights Reserved. - * You are hereby granted a copyright license to use, modify, and - * distribute the SOFTWARE so long as this entire notice is - * retained without alteration in any modified and/or redistributed - * versions, and that such modified versions are clearly identified - * as such. No licenses are granted by implication, estoppel or - * otherwise under any patents or trademarks of Freescale - * Semiconductor, Inc. This software is provided on an "AS IS" - * basis and without warranty. - * - * To the maximum extent permitted by applicable law, Freescale - * Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, - * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A - * PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH - * REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) - * AND ANY ACCOMPANYING WRITTEN MATERIALS. - * - * To the maximum extent permitted by applicable law, IN NO EVENT - * SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER - * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, - * BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER - * PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. - * - * Freescale Semiconductor assumes no responsibility for the - * maintenance and support of this software - * - ********************************************************************/ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_wtm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_wtm.h deleted file mode 100644 index b56f192e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf523x/mcf523x_wtm.h +++ /dev/null @@ -1,97 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Register and bit definitions for the MCF523X. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - - -#ifndef __MCF523X_WTM_H__ -#define __MCF523X_WTM_H__ - -/********************************************************************* -* -* Watchdog Timer Modules (WTM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_WTM_WCR (*(vuint16*)(void*)(&__IPSBAR[0x140000])) -#define MCF_WTM_WMR (*(vuint16*)(void*)(&__IPSBAR[0x140002])) -#define MCF_WTM_WCNTR (*(vuint16*)(void*)(&__IPSBAR[0x140004])) -#define MCF_WTM_WSR (*(vuint16*)(void*)(&__IPSBAR[0x140006])) - -/* Bit definitions and macros for MCF_WTM_WCR */ -#define MCF_WTM_WCR_EN (0x0001) -#define MCF_WTM_WCR_HALTED (0x0002) -#define MCF_WTM_WCR_DOZE (0x0004) -#define MCF_WTM_WCR_WAIT (0x0008) - -/* Bit definitions and macros for MCF_WTM_WMR */ -#define MCF_WTM_WMR_WM0 (0x0001) -#define MCF_WTM_WMR_WM1 (0x0002) -#define MCF_WTM_WMR_WM2 (0x0004) -#define MCF_WTM_WMR_WM3 (0x0008) -#define MCF_WTM_WMR_WM4 (0x0010) -#define MCF_WTM_WMR_WM5 (0x0020) -#define MCF_WTM_WMR_WM6 (0x0040) -#define MCF_WTM_WMR_WM7 (0x0080) -#define MCF_WTM_WMR_WM8 (0x0100) -#define MCF_WTM_WMR_WM9 (0x0200) -#define MCF_WTM_WMR_WM10 (0x0400) -#define MCF_WTM_WMR_WM11 (0x0800) -#define MCF_WTM_WMR_WM12 (0x1000) -#define MCF_WTM_WMR_WM13 (0x2000) -#define MCF_WTM_WMR_WM14 (0x4000) -#define MCF_WTM_WMR_WM15 (0x8000) - -/* Bit definitions and macros for MCF_WTM_WCNTR */ -#define MCF_WTM_WCNTR_WC0 (0x0001) -#define MCF_WTM_WCNTR_WC1 (0x0002) -#define MCF_WTM_WCNTR_WC2 (0x0004) -#define MCF_WTM_WCNTR_WC3 (0x0008) -#define MCF_WTM_WCNTR_WC4 (0x0010) -#define MCF_WTM_WCNTR_WC5 (0x0020) -#define MCF_WTM_WCNTR_WC6 (0x0040) -#define MCF_WTM_WCNTR_WC7 (0x0080) -#define MCF_WTM_WCNTR_WC8 (0x0100) -#define MCF_WTM_WCNTR_WC9 (0x0200) -#define MCF_WTM_WCNTR_WC10 (0x0400) -#define MCF_WTM_WCNTR_WC11 (0x0800) -#define MCF_WTM_WCNTR_WC12 (0x1000) -#define MCF_WTM_WCNTR_WC13 (0x2000) -#define MCF_WTM_WCNTR_WC14 (0x4000) -#define MCF_WTM_WCNTR_WC15 (0x8000) - -/* Bit definitions and macros for MCF_WTM_WSR */ -#define MCF_WTM_WSR_WS0 (0x0001) -#define MCF_WTM_WSR_WS1 (0x0002) -#define MCF_WTM_WSR_WS2 (0x0004) -#define MCF_WTM_WSR_WS3 (0x0008) -#define MCF_WTM_WSR_WS4 (0x0010) -#define MCF_WTM_WSR_WS5 (0x0020) -#define MCF_WTM_WSR_WS6 (0x0040) -#define MCF_WTM_WSR_WS7 (0x0080) -#define MCF_WTM_WSR_WS8 (0x0100) -#define MCF_WTM_WSR_WS9 (0x0200) -#define MCF_WTM_WSR_WS10 (0x0400) -#define MCF_WTM_WSR_WS11 (0x0800) -#define MCF_WTM_WSR_WS12 (0x1000) -#define MCF_WTM_WSR_WS13 (0x2000) -#define MCF_WTM_WSR_WS14 (0x4000) -#define MCF_WTM_WSR_WS15 (0x8000) - -/********************************************************************/ - -#endif /* __MCF523X_WTM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf5xxx.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf5xxx.h deleted file mode 100644 index b9a3edf9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/mcf5xxx.h +++ /dev/null @@ -1,201 +0,0 @@ -/************************************************************************************ - * Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved * - * * - * * - * * - * DESCRIPTION * - * Definitions common to all ColdFire processors. * - * * - * * - * * - * NOTE * - * * - * * - * * - * HISTORY * - * * - ************************************************************************************/ - -#ifndef _CPU_MCF5XXX_H -#define _CPU_MCF5XXX_H - -/***********************************************************************/ -/* - * Misc. Defines - */ - -#ifdef FALSE -#undef FALSE -#endif -#define FALSE (0) - -#ifdef TRUE -#undef TRUE -#endif -#define TRUE (1) - -#ifdef NULL -#undef NULL -#endif -#define NULL (0) - -/***********************************************************************/ -/* - * The basic data types - */ - -typedef unsigned char uint8; /* 8 bits */ -typedef unsigned short int uint16; /* 16 bits */ -typedef unsigned long int uint32; /* 32 bits */ - -typedef signed char int8; /* 8 bits */ -typedef signed short int int16; /* 16 bits */ -typedef signed long int int32; /* 32 bits */ - -typedef volatile uint8 vuint8; /* 8 bits */ -typedef volatile uint16 vuint16; /* 16 bits */ -typedef volatile uint32 vuint32; /* 32 bits */ - -/***********************************************************************/ -/* - * Common M68K & ColdFire definitions - */ - -#define ADDRESS uint32 -#define INSTRUCTION uint16 -#define ILLEGAL 0x4AFC -#define CPU_WORD_SIZE 16 - -#define MCF5XXX_SR_T (0x8000) -#define MCF5XXX_SR_S (0x2000) -#define MCF5XXX_SR_M (0x1000) -#define MCF5XXX_SR_IPL (0x0700) -#define MCF5XXX_SR_IPL_0 (0x0000) -#define MCF5XXX_SR_IPL_1 (0x0100) -#define MCF5XXX_SR_IPL_2 (0x0200) -#define MCF5XXX_SR_IPL_3 (0x0300) -#define MCF5XXX_SR_IPL_4 (0x0400) -#define MCF5XXX_SR_IPL_5 (0x0500) -#define MCF5XXX_SR_IPL_6 (0x0600) -#define MCF5XXX_SR_IPL_7 (0x0700) -#define MCF5XXX_SR_X (0x0010) -#define MCF5XXX_SR_N (0x0008) -#define MCF5XXX_SR_Z (0x0004) -#define MCF5XXX_SR_V (0x0002) -#define MCF5XXX_SR_C (0x0001) - -#define MCF5XXX_CACR_CENB (0x80000000) -#define MCF5XXX_CACR_CPDI (0x10000000) -#define MCF5XXX_CACR_CPD (0x10000000) -#define MCF5XXX_CACR_CFRZ (0x08000000) -#define MCF5XXX_CACR_CINV (0x01000000) -#define MCF5XXX_CACR_DIDI (0x00800000) -#define MCF5XXX_CACR_DISD (0x00400000) -#define MCF5XXX_CACR_INVI (0x00200000) -#define MCF5XXX_CACR_INVD (0x00100000) -#define MCF5XXX_CACR_CEIB (0x00000400) -#define MCF5XXX_CACR_DCM_WR (0x00000000) -#define MCF5XXX_CACR_DCM_CB (0x00000100) -#define MCF5XXX_CACR_DCM_IP (0x00000200) -#define MCF5XXX_CACR_DCM (0x00000200) -#define MCF5XXX_CACR_DCM_II (0x00000300) -#define MCF5XXX_CACR_DBWE (0x00000100) -#define MCF5XXX_CACR_DWP (0x00000020) -#define MCF5XXX_CACR_EUST (0x00000010) -#define MCF5XXX_CACR_CLNF_00 (0x00000000) -#define MCF5XXX_CACR_CLNF_01 (0x00000002) -#define MCF5XXX_CACR_CLNF_10 (0x00000004) -#define MCF5XXX_CACR_CLNF_11 (0x00000006) - -#define MCF5XXX_ACR_AB(a) ((a)&0xFF000000) -#define MCF5XXX_ACR_AM(a) (((a)&0xFF000000) >> 8) -#define MCF5XXX_ACR_EN (0x00008000) -#define MCF5XXX_ACR_SM_USER (0x00000000) -#define MCF5XXX_ACR_SM_SUPER (0x00002000) -#define MCF5XXX_ACR_SM_IGNORE (0x00006000) -#define MCF5XXX_ACR_ENIB (0x00000080) -#define MCF5XXX_ACR_CM (0x00000040) -#define MCF5XXX_ACR_DCM_WR (0x00000000) -#define MCF5XXX_ACR_DCM_CB (0x00000020) -#define MCF5XXX_ACR_DCM_IP (0x00000040) -#define MCF5XXX_ACR_DCM_II (0x00000060) -#define MCF5XXX_ACR_CM (0x00000040) -#define MCF5XXX_ACR_BWE (0x00000020) -#define MCF5XXX_ACR_WP (0x00000004) - -#define MCF5XXX_RAMBAR_BA(a) ((a)&0xFFFFC000) -#define MCF5XXX_RAMBAR_PRI_00 (0x00000000) -#define MCF5XXX_RAMBAR_PRI_01 (0x00004000) -#define MCF5XXX_RAMBAR_PRI_10 (0x00008000) -#define MCF5XXX_RAMBAR_PRI_11 (0x0000C000) -#define MCF5XXX_RAMBAR_WP (0x00000100) -#define MCF5XXX_RAMBAR_CI (0x00000020) -#define MCF5XXX_RAMBAR_SC (0x00000010) -#define MCF5XXX_RAMBAR_SD (0x00000008) -#define MCF5XXX_RAMBAR_UC (0x00000004) -#define MCF5XXX_RAMBAR_UD (0x00000002) -#define MCF5XXX_RAMBAR_V (0x00000001) - -/***********************************************************************/ -/* - * The ColdFire family of processors has a simplified exception stack - * frame that looks like the following: - * - * 3322222222221111 111111 - * 1098765432109876 5432109876543210 - * 8 +----------------+----------------+ - * | Program Counter | - * 4 +----------------+----------------+ - * |FS/Fmt/Vector/FS| SR | - * SP --> 0 +----------------+----------------+ - * - * The stack self-aligns to a 4-byte boundary at an exception, with - * the FS/Fmt/Vector/FS field indicating the size of the adjustment - * (SP += 0,1,2,3 bytes). - */ - -#define MCF5XXX_RD_SF_FORMAT(PTR) \ - ((*((uint16 *)(PTR)) >> 12) & 0x00FF) - -#define MCF5XXX_RD_SF_VECTOR(PTR) \ - ((*((uint16 *)(PTR)) >> 2) & 0x00FF) - -#define MCF5XXX_RD_SF_FS(PTR) \ - ( ((*((uint16 *)(PTR)) & 0x0C00) >> 8) | (*((uint16 *)(PTR)) & 0x0003) ) - -#define MCF5XXX_SF_SR(PTR) *((uint16 *)(PTR)+1) -#define MCF5XXX_SF_PC(PTR) *((uint32 *)(PTR)+1) - -/********************************************************************/ -/* - * Functions provided by mcf5xxx.s - */ - -int asm_set_ipl (uint32); -void mcf5xxx_wr_cacr (uint32); -void mcf5xxx_wr_acr0 (uint32); -void mcf5xxx_wr_acr1 (uint32); -void mcf5xxx_wr_acr2 (uint32); -void mcf5xxx_wr_acr3 (uint32); -void mcf5xxx_wr_other_a7 (uint32); -void mcf5xxx_wr_other_sp (uint32); -void mcf5xxx_wr_vbr (uint32); -void mcf5xxx_wr_macsr (uint32); -void mcf5xxx_wr_mask (uint32); -void mcf5xxx_wr_acc0 (uint32); -void mcf5xxx_wr_accext01 (uint32); -void mcf5xxx_wr_accext23 (uint32); -void mcf5xxx_wr_acc1 (uint32); -void mcf5xxx_wr_acc2 (uint32); -void mcf5xxx_wr_acc3 (uint32); -void mcf5xxx_wr_sr (uint32); -void mcf5xxx_wr_rambar0 (uint32); -void mcf5xxx_wr_rambar1 (uint32); -void mcf5xxx_wr_mbar (uint32); -void mcf5xxx_wr_mbar0 (uint32); -void mcf5xxx_wr_mbar1 (uint32); - -/********************************************************************/ - -#endif /* _CPU_MCF5XXX_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/typedefs.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/typedefs.h deleted file mode 100644 index 57ae6a33..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/arch/typedefs.h +++ /dev/null @@ -1,86 +0,0 @@ - -#ifndef _TYPEDEFS_H_ -#define _TYPEDEFS_H_ - -#ifdef __MWERKS__ //Metrowerk CodeWarrior - #include - - // Standard typedefs used by header files, based on ISO C standard - typedef volatile int8_t vint8_t; - typedef volatile uint8_t vuint8_t; - - typedef volatile int16_t vint16_t; - typedef volatile uint16_t vuint16_t; - - typedef volatile int32_t vint32_t; - typedef volatile uint32_t vuint32_t; - -#else -#ifdef __GHS__ //GreenHills - #include - - // Standard typedefs used by header files, based on ISO C standard - typedef volatile int8_t vint8_t; - typedef volatile uint8_t vuint8_t; - - typedef volatile int16_t vint16_t; - typedef volatile uint16_t vuint16_t; - - typedef volatile int32_t vint32_t; - typedef volatile uint32_t vuint32_t; - -#else - - // This is needed for compilers that don't have a stdint.h file - - typedef signed char int8_t; - typedef unsigned char uint8_t; - typedef volatile signed char vint8_t; - typedef volatile unsigned char vuint8_t; - - typedef signed short int16_t; - typedef unsigned short uint16_t; - typedef volatile signed short vint16_t; - typedef volatile unsigned short vuint16_t; - - typedef signed int int32_t; - typedef unsigned int uint32_t; - typedef volatile signed int vint32_t; - typedef volatile unsigned int vuint32_t; - -#endif -#endif -#endif - -/********************************************************************* - * - * Copyright: - * Freescale Semiconductor, INC. All Rights Reserved. - * You are hereby granted a copyright license to use, modify, and - * distribute the SOFTWARE so long as this entire notice is - * retained without alteration in any modified and/or redistributed - * versions, and that such modified versions are clearly identified - * as such. No licenses are granted by implication, estoppel or - * otherwise under any patents or trademarks of Freescale - * Semiconductor, Inc. This software is provided on an "AS IS" - * basis and without warranty. - * - * To the maximum extent permitted by applicable law, Freescale - * Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, - * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A - * PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH - * REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) - * AND ANY ACCOMPANYING WRITTEN MATERIALS. - * - * To the maximum extent permitted by applicable law, IN NO EVENT - * SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER - * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, - * BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER - * PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. - * - * Freescale Semiconductor assumes no responsibility for the - * maintenance and support of this software - * - ********************************************************************/ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/ram_symbol.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/ram_symbol.h deleted file mode 100644 index 5434e8e2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/ram_symbol.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* Defining DEBUG turns on debug print information */ -#define DEBUG 1 - -/* CodeWarrior looks for an underscore prepended to C function names */ -#define _UNDERSCORE_ - -/* Define a constant to inform files we are using CodeWarrior */ -#ifndef _MWERKS_ -#define _MWERKS_ -#endif - -/* Modify the interrupt type to work with CodeWarrior */ -#define __interrupt__ __declspec(interrupt) - -#define CODEWARRIOR_MCF5235 -#define FCPU ( 150000000UL ) -#define FSYS_2 ( 75000000UL ) diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/rom_symbol.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/rom_symbol.h deleted file mode 100644 index c6742793..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/include/rom_symbol.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* Define the board we are running on */ -#define M5249C3 /* HSEVB */ - -/* Defining DEBUG turns on debug print information */ -#define DEBUG 1 - -/* CodeWarrior looks for an underscore prepended to C function names */ -#define _UNDERSCORE_ - -/* Define a constant to inform files we are using CodeWarrior */ -#ifndef _MWERKS_ -#define _MWERKS_ -#endif - -/* Modify the interrupt type to work with CodeWarrior */ -#define __interrupt__ __declspec(interrupt) - -#define ROM_TARGET - -#define CODEWARRIOR_MCF5235 -#define FCPU ( 150000000UL ) -#define FSYS_2 ( 75000000UL ) diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/port.h deleted file mode 100644 index 2ea2ed53..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/port.h +++ /dev/null @@ -1,62 +0,0 @@ - /* - * FreeModbus Libary: MCF5235 Port - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -/* ----------------------- Defines ----------------------------------------- */ -#define INLINE -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#undef assert -#define assert( x ) - -#define ENTER_CRITICAL_SECTION( ) prvvPortEnterCritical() -#define EXIT_CRITICAL_SECTION( ) prvvPortExitCritical() - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -/* ----------------------- Type definitions -------------------------------- */ -typedef char BOOL; - -typedef unsigned char UCHAR; -typedef char CHAR; - -typedef unsigned short USHORT; -typedef short SHORT; - -typedef unsigned long ULONG; -typedef long LONG; - -/* ----------------------- Defines ----------------------------------------- */ -void prvvPortEnterCritical( ); -void prvvPortExitCritical( ); - - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/portevent.c deleted file mode 100644 index 963269a2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/portevent.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * FreeModbus Libary: MCF5235 Port - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/portother.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/portother.c deleted file mode 100644 index 1ea8109d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/portother.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * FreeModbus Libary: MCF5235 Port - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "port.h" -#include "mcf5xxx.h" -#include "mcf523x.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Static variables ---------------------------------*/ -static int uiRegSR; -static char *heap_ptr; - -/* ----------------------- Start implementation -----------------------------*/ -void -prvvPortEnterCritical( ) -{ - - uiRegSR = asm_set_ipl( 7 ); -} - -void -prvvPortExitCritical( ) -{ - ( void )asm_set_ipl( ( uint32 ) uiRegSR ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/portserial.c deleted file mode 100644 index a5cc6069..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/portserial.c +++ /dev/null @@ -1,162 +0,0 @@ -/* - * FreeModbus Libary: MCF5235 Port - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes --------------------------------- */ -#include "port.h" -#include "m523xbcc.h" - -/* ----------------------- Modbus includes --------------------------------- */ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ----------------------------------------- */ -#define BAUDRATE_VALUE(fsys, baud) ( ( fsys )/(32UL * baud) ) - -/* ----------------------- Static variables -------------------------------- */ -BOOL bTXEnabled; -BOOL bRXEnabled; - -/* ----------------------- Start implementation ---------------------------- */ - -void -vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ - UCHAR ucUCR = 0; - UCHAR ucIMR = 0; - - if( xRxEnable ) - { - ucUCR |= MCF_UART_UCR_RXC( 0x1 ); - ucIMR |= MCF_UART_UIMR_RXRDY_FU; - bRXEnabled = TRUE; - } - else - { - ucUCR |= MCF_UART_UCR_RXC( 0x2 ); - bRXEnabled = FALSE; - } - if( xTxEnable ) - { - ucUCR |= MCF_UART_UCR_TXC( 0x1 ); - ucIMR |= MCF_UART_UIMR_TXRDY; - bTXEnabled = TRUE; - } - else - { - ucUCR |= MCF_UART_UCR_TXC( 0x2 ); - bTXEnabled = FALSE; - } - MCF_UART_UCR0 = ucUCR; - MCF_UART_UIMR0 = ucIMR; -} - -BOOL -xMBPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - BOOL bStatus = TRUE; - UCHAR ucMode = 0; - - ( void )ucPort; - - switch ( eParity ) - { - case MB_PAR_EVEN: - ucMode |= MCF_UART_UMR_PM( 0x0 ); - break; - case MB_PAR_ODD: - ucMode |= MCF_UART_UMR_PM( 0x0 ) | MCF_UART_UMR_PT; - break; - case MB_PAR_NONE: - ucMode |= MCF_UART_UMR_PM( 0x3 ); - break; - default: - bStatus = FALSE; - } - - switch ( ucDataBits ) - { - case 8: - ucMode |= MCF_UART_UMR_BC( 0x3 ); - break; - case 7: - ucMode |= MCF_UART_UMR_BC( 0x2 ); - break; - default: - bStatus = FALSE; - } - if( bStatus == TRUE ) - { - /* UART 0: Reset transmitter, receiver and mode register pointer */ - MCF_UART_UCR0 = MCF_UART_UCR_MISC( 0x3 ); - MCF_UART_UCR0 = MCF_UART_UCR_MISC( 0x2 ); - MCF_UART_UCR0 = MCF_UART_UCR_MISC( 0x1 ); - - /* UART 0: Configure parity, databits and stopbits. */ - MCF_UART_UMR0 = ucMode; - MCF_UART_UMR0 = MCF_UART_UMR_SB( 0x7 ); - - /* UART 0 Clocking */ - MCF_UART_UCSR0 = MCF_UART_UCSR_RCS( 0xd ) | MCF_UART_UCSR_TCS( 0xd ); - MCF_UART_UBG10 = ( UCHAR ) ( BAUDRATE_VALUE( FSYS_2, ulBaudRate ) >> 8U ); - MCF_UART_UBG20 = ( UCHAR ) ( BAUDRATE_VALUE( FSYS_2, ulBaudRate ) & 0xFFU ); - - /* UART 0: Enable interrupts */ - MCF_INTC0_ICR13 = MCF_INTC0_ICRn_IL( 0x2 ) | MCF_INTC0_ICRn_IP( 0x1 ); - MCF_INTC0_IMRL &= ~MCF_INTC0_IMRL_INT_MASK13; - - /* UART 0 Miscellaneous */ - MCF_UART_UACR0 = 0; - - /* UART 0: Enable pins */ - MCF_GPIO_PAR_UART = MCF_GPIO_PAR_UART_PAR_U0RXD | MCF_GPIO_PAR_UART_PAR_U0TXD; - vMBPortSerialEnable( FALSE, FALSE ); - } - - return TRUE; -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - MCF_UART_UTB0 = ( UCHAR ) ucByte; - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - *pucByte = ( CHAR ) MCF_UART_URB0; - return TRUE; -} - -__declspec( interrupt ) - void prvvMBPortSerialISR( ) -{ - if( bTXEnabled && ( MCF_UART_UISR0 & MCF_UART_UISR_TXRDY ) ) - { - ( void )pxMBFrameCBTransmitterEmpty( ); - } - if( bRXEnabled && ( MCF_UART_UISR0 & MCF_UART_UISR_RXRDY_FU ) ) - { - ( void )pxMBFrameCBByteReceived( ); - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/porttimer.c deleted file mode 100644 index 18555093..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/port/porttimer.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * FreeModbus Libary: MCF5235 Port - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes --------------------------------- */ -#include "port.h" -#include "m523xbcc.h" -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- Modbus includes --------------------------------- */ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ----------------------------------------- */ -#define PIT_PRESCALER 4096UL -#define PIT_TIMER_TICKS ( FSYS_2 / PIT_PRESCALER ) -#define PIT_MODULUS_REGISTER(t50us) \ - ( (t50us * PIT_TIMER_TICKS )/20000UL - 1UL) - -/* ----------------------- Static variables -------------------------------- */ -USHORT usTimerModulus; - -/* ----------------------- Start implementation ---------------------------- */ - -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ - usTimerModulus = ( USHORT ) PIT_MODULUS_REGISTER( usTim1Timerout50us ); - /* Configure prescaler */ - MCF_PIT_PCSR1 = MCF_PIT_PCSR_PRE( 12 ) | MCF_PIT_PCSR_OVW; - /* Configure interrupt priority and level */ - MCF_INTC0_ICR37 = MCF_INTC0_ICRn_IL( 0x3 ) | MCF_INTC0_ICRn_IP( 0x1 ); - /* Unmask interrupt */ - MCF_INTC0_IMRH &= ~MCF_INTC0_IMRH_INT_MASK37; - - return TRUE; -} - -void -vMBPortTimersEnable( ) -{ - MCF_GPIO_PPDSDR_FECI2C = MCF_GPIO_PODR_FECI2C_PODR_FECI2C0; - - MCF_PIT_PMR1 = usTimerModulus; - MCF_PIT_PCSR1 |= MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_EN | MCF_PIT_PCSR_PIF; -} - - -void -vMBPortTimersDisable( ) -{ - MCF_GPIO_PCLRR_FECI2C = ( UCHAR ) ~ MCF_GPIO_PODR_FECI2C_PODR_FECI2C0; - - MCF_PIT_PCSR1 |= MCF_PIT_PCSR_PIF; - MCF_PIT_PCSR1 &= ~MCF_PIT_PCSR_PIE; - MCF_PIT_PCSR1 &= ~MCF_PIT_PCSR_EN; -} - -extern volatile void *pxCurrentTCB; - -static BOOL -prvvMBPortTimerISRImpl( void ) -{ - MCF_PIT_PCSR1 |= MCF_PIT_PCSR_PIF; - return pxMBPortCBTimerExpired( ); -} - -asm void -prvvMBPortTimerISR( void ) -{ - move.w #0x2700, sr; - portSAVE_CONTEXT_IMPL( ); - jsr prvvMBPortTimerISRImpl; - - cmp.l #0, d0 - beq exit - jsr vTaskSwitchContext; -exit: - portRESTORE_CONTEXT_IMPL( ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf5235-bcckit-flash.xml b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf5235-bcckit-flash.xml deleted file mode 100644 index 4f776e9f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf5235-bcckit-flash.xml +++ /dev/null @@ -1,47 +0,0 @@ - - - - - true - 523x - PEMICRO_PARALLEL - true - C:\Projects\freemodbus-new\demo\MCF5235CW\support\mcf523x.cfg - 0x10000000 - 0x10006000 - true - false - - - - 0x00000000 - AM29PL160CB - 1Mx16x1 - 0x00000000 - 0x001FFFFF - - - - true - - Auto Detect - false - 0xFF800000 - 0xFFFFFFFF - false - 0x00000000 - - - - true - - true - - - - FileOnTarg - 0xFF800000 - 0x007FFFFF - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf5235-bcckit-test.xml b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf5235-bcckit-test.xml deleted file mode 100644 index 07054305..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf5235-bcckit-test.xml +++ /dev/null @@ -1,40 +0,0 @@ - - - - - true - Generic - PEMICRO_PARALLEL - true - C:\Projects\freemodbus-new\demo\MCF5235CW\support\mcf523x.cfg - - - - read - byte - 0x01000000 - 67 - - - - read - byte - 0x00100000 - 0x67 - 1000 - - - - true - true - true - 0x00000010 - 0x000000FF - byte - 1 - false - 0x00000100 - 0x0000FFFF - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf523x-simple.cfg b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf523x-simple.cfg deleted file mode 100644 index 093ba7b9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf523x-simple.cfg +++ /dev/null @@ -1,7 +0,0 @@ -ResetHalt -Delay 200 -Stop - -; --------------------------- WCR DISABLE------------------------------------ -writemem.w 0x40140000 0x0000 - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf523x.cfg b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf523x.cfg deleted file mode 100644 index 09de212e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf523x.cfg +++ /dev/null @@ -1,50 +0,0 @@ -ResetHalt -Delay 200 -Stop - -; --------------------------- Set VBR to beginning of SRAM ------------------ -; writecontrolreg 0x0801 0x20000000 - -; --------------------------- RAMBAR INIT ----------------------------------- -; Set RAMBAR = 0x20000001 -writecontrolreg 0x0C05 0x20000001 - -; --------------------------- FLASH INIT ------------------------------------ -; 2MB FLASH on CS0 at 0x00000000 -writemem.w 0x40000080 0x0000 -writemem.l 0x40000084 0x001F0001 -writemem.w 0x4000008A 0x1980 -delay 100 - -; --------------------------- SDRAM INIT ------------------------------------ -; 16MB SDRAM at 0x10000000 - -; Set PAR_SDRAM to allow SDRAM signals to be enabled -writemem.b 0x40100046 0x3F -; Set PAR_AD to allow 32-bit SDRAM if the exteranl boot device is 16-bits -writemem.b 0x40100040 0xE1 - -; 16 MB SDRAM -writemem.w 0x40000040 0x0446 -writemem.l 0x40000048 0x10001300 -writemem.l 0x4000004C 0x00FC0001 - -; Set IP in DACR and init precharge. -writemem.l 0x40000048 0x10001308 -writemem.l 0x10000000 0xAA55AA55 - -; Wait a bit -delay 100 - -; Set RE in DACR -writemem.l 0x40000048 0x10009300 -; Issue IMRS -writemem.l 0x40000048 0x10009340 -writemem.l 0x10000400 0xAA55AA55 - -; Wait a bit more -delay 600 - -; --------------------------- WCR DISABLE------------------------------------ -writemem.w 0x40140000 0x0000 - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf523x.mem b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf523x.mem deleted file mode 100644 index beaaec44..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/mcf523x.mem +++ /dev/null @@ -1,865 +0,0 @@ -// Memory Configuration File -// -// Description: -// A memory configuration file contains commands that define the legally -// accessible areas of memory for your specific board. Useful for example -// when the debugger tries to display the content of a "char *" variable, -// that has not yet been initialized. -// In this case the debugger may try to read from a bogus address, which -// could cause a bus error. -// -// Board: -// Freescale M5235BCCKIT -// - -// Memory Map: -// -------------------------------------------------------------------- -range 0x00000000 0x001FFFFF 4 Read // 2 Mbytes External Flash -range 0x10000000 0x10FFFFFF 1 ReadWrite // 16 Mbyte SDRAM -reserved 0x11000000 0x1FFFFFFF -range 0x20000000 0x2000FFFF 1 ReadWrite // 64 Kbytes Internal SRAM -reserved 0x20010000 0x3FFFFFFF -reserved 0x40200000 0xfFFFFFFF - -// Memory Mapped Registers (IPSBAR= 0x40000000): -// ------------------------------------------------------------------- - -// System Control Module Registers -range 0x40000000 0x40000003 4 ReadWrite // IPSBAR -reserved 0x40000004 0x4000000F -range 0x40000010 0x40000010 1 ReadWrite // CRSR -range 0x40000011 0x40000011 1 ReadWrite // CWCR -range 0x40000012 0x40000012 1 ReadWrite // LPICR -range 0x40000013 0x40000013 1 ReadWrite // CWSR -range 0x40000014 0x40000017 4 ReadWrite // DMAREQC -reserved 0x40000018 0x4000001B -range 0x4000001C 0x4000001F 4 ReadWrite // MPARK -range 0x40000020 0x40000020 1 ReadWrite // MPR -reserved 0x40000021 0x40000023 -range 0x40000024 0x40000024 1 ReadWrite // PACR0 -range 0x40000025 0x40000025 1 ReadWrite // PACR1 -range 0x40000026 0x40000026 1 ReadWrite // PACR2 -range 0x40000027 0x40000027 1 ReadWrite // PACR3 -range 0x40000028 0x40000028 1 ReadWrite // PACR4 -reserved 0x40000029 0x40000029 -range 0x4000002A 0x4000002A 1 ReadWrite // PACR5 -range 0x4000002B 0x4000002B 1 ReadWrite // PACR6 -range 0x4000002C 0x4000002C 1 ReadWrite // PACR7 -reserved 0x4000002D 0x4000002D -range 0x4000002E 0x4000002E 1 ReadWrite // PACR8 -reserved 0x4000002F 0x4000002F -range 0x40000030 0x40000030 1 ReadWrite // GPACR0 -reserved 0x40000031 0x40000031 -range 0x40000032 0x40000032 1 ReadWrite // GPACR1 -reserved 0x40000033 0x4000003F - -// SDRAM Registers -range 0x40000040 0x40000041 2 ReadWrite // DCR -reserved 0x40000042 0x40000047 -range 0x40000048 0x4000004B 4 ReadWrite // DACR0 -range 0x4000004C 0x4000004F 4 ReadWrite // DMR0 -range 0x40000050 0x40000053 4 ReadWrite // DACR1 -range 0x40000054 0x40000057 4 ReadWrite // DMR1 -reserved 0x40000058 0x4000007F - -// Chip Select Module Registers -range 0x40000080 0x40000081 2 ReadWrite // CSAR0 -reserved 0x40000082 0x40000083 -range 0x40000084 0x40000087 4 ReadWrite // CSMR0 -reserved 0x40000088 0x40000089 -range 0x4000008A 0x4000008B 2 ReadWrite // CSCR0 -range 0x4000008C 0x4000008D 2 ReadWrite // CSAR1 -reserved 0x4000008E 0x4000008F -range 0x40000090 0x40000093 4 ReadWrite // CSMR1 -reserved 0x40000094 0x40000095 -range 0x40000096 0x40000097 2 ReadWrite // CSCR1 -range 0x40000098 0x40000099 2 ReadWrite // CSAR2 -reserved 0x4000009A 0x4000009B -range 0x4000009C 0x4000009F 4 ReadWrite // CSMR2 -reserved 0x400000A0 0x400000A1 -range 0x400000A2 0x400000A3 2 ReadWrite // CSCR2 -range 0x400000A4 0x400000A5 2 ReadWrite // CSAR3 -reserved 0x400000A6 0x400000A7 -range 0x400000A8 0x400000AB 4 ReadWrite // CSMR3 -reserved 0x400000AC 0x400000AD -range 0x400000AE 0x400000AF 2 ReadWrite // CSCR3 -range 0x400000B0 0x400000B1 2 ReadWrite // CSAR4 -reserved 0x400000B2 0x400000B3 -range 0x400000B4 0x400000B7 4 ReadWrite // CSMR4 -reserved 0x400000B8 0x400000B9 -range 0x400000BA 0x400000BB 2 ReadWrite // CSCR4 -range 0x400000BC 0x400000BD 2 ReadWrite // CSAR5 -reserved 0x400000BE 0x400000BF -range 0x400000C0 0x400000C3 4 ReadWrite // CSMR5 -reserved 0x400000C4 0x400000C5 -range 0x400000C6 0x400000C7 2 ReadWrite // CSCR5 -range 0x400000C8 0x400000C9 2 ReadWrite // CSAR6 -reserved 0x400000CA 0x400000CB -range 0x400000CC 0x400000CF 4 ReadWrite // CSMR6 -reserved 0x400000D0 0x400000D1 -range 0x400000D2 0x400000D3 2 ReadWrite // CSCR6 -range 0x400000D4 0x400000D5 2 ReadWrite // CSAR7 -reserved 0x400000D6 0x400000D7 -range 0x400000D8 0x400000DB 4 ReadWrite // CSMR7 -reserved 0x400000DC 0x400000DD -range 0x400000DE 0x400000DF 2 ReadWrite // CSCR7 -reserved 0x400000E0 0x400000FF - -// DMA Channel 0 Registers -range 0x40000100 0x40000103 4 ReadWrite // SAR0 -range 0x40000104 0x40000107 4 ReadWrite // DAR0 -range 0x40000108 0x40000108 1 ReadWrite // DSR0 -range 0x40000109 0x4000010B 1 ReadWrite // BCR0 -range 0x4000010C 0x4000010F 4 ReadWrite // DCR0 - -// DMA Channel 1 Registers -range 0x40000110 0x40000113 4 ReadWrite // SAR1 -range 0x40000114 0x40000117 4 ReadWrite // DAR1 -range 0x40000118 0x40000118 1 ReadWrite // DSR1 -range 0x40000119 0x4000011B 1 ReadWrite // BCR1 -range 0x4000011C 0x4000011F 4 ReadWrite // DCR1 - -// DMA Channel 2 Registers -range 0x40000120 0x40000123 4 ReadWrite // SAR2 -range 0x40000124 0x40000127 4 ReadWrite // DAR2 -range 0x40000128 0x40000128 1 ReadWrite // DSR2 -range 0x40000129 0x4000012B 1 ReadWrite // BCR2 -range 0x4000012C 0x4000012F 4 ReadWrite // DCR2 - -// DMA Channel 3 Registers -range 0x40000130 0x40000133 4 ReadWrite // SAR3 -range 0x40000134 0x40000137 4 ReadWrite // DAR3 -range 0x40000138 0x40000138 1 ReadWrite // DSR3 -range 0x40000139 0x4000013B 1 ReadWrite // BCR3 -range 0x4000013C 0x4000013F 4 ReadWrite // DCR3 -reserved 0x40000140 0x400001FF - -// UART0 Registers -range 0x40000200 0x40000200 1 ReadWrite // UMR10 (ReadWrite) / UMR20 (ReadWrite) -reserved 0x40000201 0x40000203 -range 0x40000204 0x40000204 1 ReadWrite // USR0 (Read) / UCSR0 (Write) -reserved 0x40000205 0x40000207 -range 0x40000208 0x40000208 1 Write // UCR0 -reserved 0x40000209 0x4000020B -range 0x4000020C 0x4000020C 1 ReadWrite // URB0 (Read) / UTB0 (Write) -reserved 0x4000020D 0x4000020F -range 0x40000210 0x40000210 1 ReadWrite // UIPCR0 (Read) / UACR0 (Write) -reserved 0x40000211 0x40000213 -range 0x40000214 0x40000214 1 ReadWrite // UISR0 (Read) / UIMR0 (Write) -reserved 0x40000215 0x40000217 -range 0x40000218 0x40000218 1 Write // UBG10 -reserved 0x40000219 0x4000021B -range 0x4000021C 0x4000021C 1 Write // UBG20 -reserved 0x4000021D 0x40000233 -range 0x40000234 0x40000234 1 Read // UIP0 -reserved 0x40000235 0x40000237 -range 0x40000238 0x40000238 1 Write // UOP10 -reserved 0x40000239 0x4000023B -range 0x4000023C 0x4000023C 1 Write // UOP00 -reserved 0x4000023D 0x4000023F - -// UART1 Registers -range 0x40000240 0x40000240 1 ReadWrite // UMR11 (ReadWrite) / UMR21 (ReadWrite) -reserved 0x40000241 0x40000243 -range 0x40000244 0x40000244 1 ReadWrite // USR1 (Read) / UCSR1 (Write) -reserved 0x40000245 0x40000247 -range 0x40000248 0x40000248 1 Write // UCR1 -reserved 0x40000249 0x4000024B -range 0x4000024C 0x4000024C 1 ReadWrite // URB1 (Read) / UTB1 (Write) -reserved 0x4000024D 0x4000024F -range 0x40000250 0x40000250 1 ReadWrite // UIPCR1 (Read) / UACR1 (Write) -reserved 0x40000251 0x40000253 -range 0x40000254 0x40000254 1 ReadWrite // UISR1 (Read) / UIMR1 (Write) -reserved 0x40000255 0x40000257 -range 0x40000258 0x40000258 1 Write // UBG11 -reserved 0x40000259 0x4000025B -range 0x4000025C 0x4000025C 1 Write // UBG21 -reserved 0x4000025D 0x40000273 -range 0x40000274 0x40000274 1 Read // UIP1 -reserved 0x40000275 0x40000277 -range 0x40000278 0x40000278 1 Write // UOP11 -reserved 0x40000279 0x4000027B -range 0x4000027C 0x4000027C 1 Write // UOP01 -reserved 0x4000027D 0x4000027F - -// UART2 Registers -range 0x40000280 0x40000280 1 ReadWrite // UMR12 (ReadWrite) / UMR22 (ReadWrite) -reserved 0x40000281 0x40000283 -range 0x40000284 0x40000284 1 ReadWrite // USR2 (Read) / UCSR2 (Write) -reserved 0x40000285 0x40000287 -range 0x40000288 0x40000288 1 Write // UCR2 -reserved 0x40000289 0x4000028B -range 0x4000028C 0x4000028C 1 ReadWrite // URB2 (Read) / UTB2 (Write) -reserved 0x4000028D 0x4000028F -range 0x40000290 0x40000290 1 ReadWrite // UIPCR2 (Read) / UACR2 (Write) -reserved 0x40000291 0x40000293 -range 0x40000294 0x40000294 1 ReadWrite // UISR2 (Read) / UIMR2 (Write) -reserved 0x40000295 0x40000297 -range 0x40000298 0x40000298 1 Write // UBG12 -reserved 0x40000299 0x4000029B -range 0x4000029C 0x4000029C 1 Write // UBG22 -reserved 0x4000029D 0x400002B3 -range 0x400002B4 0x400002B4 1 Read // UIP2 -reserved 0x400002B5 0x400002B7 -range 0x400002B8 0x400002B8 1 Write // UOP12 -reserved 0x400002B9 0x400002BB -range 0x400002BC 0x400002BC 1 Write // UOP02 -reserved 0x400002BD 0x400002FF - -// I2C Registers -range 0x40000300 0x40000300 1 ReadWrite // I2ADR -reserved 0x40000301 0x40000303 -range 0x40000304 0x40000304 1 ReadWrite // I2FDR -reserved 0x40000305 0x40000307 -range 0x40000308 0x40000308 1 ReadWrite // I2CR -reserved 0x40000309 0x4000030B -range 0x4000030C 0x4000030C 1 ReadWrite // I2SR -reserved 0x4000030D 0x4000030F -range 0x40000310 0x40000310 1 ReadWrite // I2DR -reserved 0x40000311 0x4000033F - -// Queued Serial Peripheral Interface Module Registers -range 0x40000340 0x40000341 2 ReadWrite // QMR -reserved 0x40000342 0x40000343 -range 0x40000344 0x40000345 2 ReadWrite // QDLYR -reserved 0x40000346 0x40000347 -range 0x40000348 0x40000349 2 ReadWrite // QWR -reserved 0x4000034A 0x4000034B -range 0x4000034C 0x4000034D 2 ReadWrite // QIR -reserved 0x4000034E 0x4000034F -range 0x40000350 0x40000351 2 ReadWrite // QAR -reserved 0x40000352 0x40000353 -range 0x40000354 0x40000355 2 ReadWrite // QDR -reserved 0x40000356 0x400003FF - -// DMA Timer 0 Registers -range 0x40000400 0x40000401 2 ReadWrite // DTMR0 -range 0x40000402 0x40000402 1 ReadWrite // DTXMR0 -range 0x40000403 0x40000403 1 ReadWrite // DTER0 -range 0x40000404 0x40000407 4 ReadWrite // DTRR0 -range 0x40000408 0x4000040B 4 ReadWrite // DTCR0 -range 0x4000040C 0x4000040F 4 ReadWrite // DTCN0 -reserved 0x40000410 0x4000043F - -// DMA Timer 1 Registers -range 0x40000440 0x40000441 2 ReadWrite // DTMR1 -range 0x40000442 0x40000442 1 ReadWrite // DTXMR1 -range 0x40000443 0x40000443 1 ReadWrite // DTER1 -range 0x40000444 0x40000447 4 ReadWrite // DTRR1 -range 0x40000448 0x4000044B 4 ReadWrite // DTCR1 -range 0x4000044C 0x4000044F 4 ReadWrite // DTCN1 -reserved 0x40000450 0x4000047F - -// DMA Timer 2 Registers -range 0x40000480 0x40000481 2 ReadWrite // DTMR2 -range 0x40000482 0x40000482 1 ReadWrite // DTXMR2 -range 0x40000483 0x40000483 1 ReadWrite // DTER2 -range 0x40000484 0x40000487 4 ReadWrite // DTRR2 -range 0x40000488 0x4000048B 4 ReadWrite // DTCR2 -range 0x4000048C 0x4000048F 4 ReadWrite // DTCN2 -reserved 0x40000490 0x400004BF - -// DMA Timer 3 Registers -range 0x400004C0 0x400004C1 2 ReadWrite // DTMR3 -range 0x400004C2 0x400004C2 1 ReadWrite // DTXMR3 -range 0x400004C3 0x400004C3 1 ReadWrite // DTER3 -range 0x400004C4 0x400004C7 4 ReadWrite // DTRR3 -range 0x400004C8 0x400004CB 4 ReadWrite // DTCR3 -range 0x400004CC 0x400004CF 4 ReadWrite // DTCN3 -reserved 0x400004D0 0x40000BFF - -// Interrupt Controller Registers 0 -range 0x40000C00 0x40000C03 4 Read // IPRH0 -range 0x40000C04 0x40000C07 4 Read // IPRL0 -range 0x40000C08 0x40000C0B 4 ReadWrite // IMRH0 -range 0x40000C0C 0x40000C0F 4 ReadWrite // IMRL0 -range 0x40000C10 0x40000C13 4 ReadWrite // INTFRCH0 -range 0x40000C14 0x40000C17 4 Read // INTFRCL0 -range 0x40000C18 0x40000C18 1 Read // IRLR0 -range 0x40000C19 0x40000C19 1 Read // IACKLPR0 -reserved 0x40000C1A 0x40000C40 -range 0x40000C41 0x40000C41 1 Read // ICR001 -range 0x40000C42 0x40000C42 1 Read // ICR002 -range 0x40000C43 0x40000C43 1 Read // ICR003 -range 0x40000C44 0x40000C44 1 Read // ICR004 -range 0x40000C45 0x40000C45 1 Read // ICR005 -range 0x40000C46 0x40000C46 1 Read // ICR006 -range 0x40000C47 0x40000C47 1 Read // ICR007 -range 0x40000C48 0x40000C48 1 ReadWrite // ICR008 -range 0x40000C49 0x40000C49 1 ReadWrite // ICR009 -range 0x40000C4A 0x40000C4A 1 ReadWrite // ICR010 -range 0x40000C4B 0x40000C4B 1 ReadWrite // ICR011 -range 0x40000C4C 0x40000C4C 1 ReadWrite // ICR012 -range 0x40000C4D 0x40000C4D 1 ReadWrite // ICR013 -range 0x40000C4E 0x40000C4E 1 ReadWrite // ICR014 -range 0x40000C4F 0x40000C4F 1 ReadWrite // ICR015 -range 0x40000C50 0x40000C50 1 ReadWrite // ICR016 -range 0x40000C51 0x40000C51 1 ReadWrite // ICR017 -range 0x40000C52 0x40000C52 1 ReadWrite // ICR018 -range 0x40000C53 0x40000C53 1 ReadWrite // ICR019 -range 0x40000C54 0x40000C54 1 ReadWrite // ICR020 -range 0x40000C55 0x40000C55 1 ReadWrite // ICR021 -range 0x40000C56 0x40000C56 1 ReadWrite // ICR022 -range 0x40000C57 0x40000C57 1 ReadWrite // ICR023 -range 0x40000C58 0x40000C58 1 ReadWrite // ICR024 -range 0x40000C59 0x40000C59 1 ReadWrite // ICR025 -range 0x40000C5A 0x40000C5A 1 ReadWrite // ICR026 -range 0x40000C5B 0x40000C5B 1 ReadWrite // ICR027 -range 0x40000C5C 0x40000C5C 1 ReadWrite // ICR028 -range 0x40000C5D 0x40000C5D 1 ReadWrite // ICR029 -range 0x40000C5E 0x40000C5E 1 ReadWrite // ICR030 -range 0x40000C5F 0x40000C5F 1 ReadWrite // ICR031 -range 0x40000C60 0x40000C60 1 ReadWrite // ICR032 -range 0x40000C61 0x40000C61 1 ReadWrite // ICR033 -range 0x40000C62 0x40000C62 1 ReadWrite // ICR034 -range 0x40000C63 0x40000C63 1 ReadWrite // ICR035 -range 0x40000C64 0x40000C64 1 ReadWrite // ICR036 -range 0x40000C65 0x40000C65 1 ReadWrite // ICR037 -range 0x40000C66 0x40000C66 1 ReadWrite // ICR038 -range 0x40000C67 0x40000C67 1 ReadWrite // ICR039 -range 0x40000C68 0x40000C68 1 ReadWrite // ICR040 -range 0x40000C69 0x40000C69 1 ReadWrite // ICR041 -range 0x40000C6A 0x40000C6A 1 ReadWrite // ICR042 -range 0x40000C6B 0x40000C6B 1 ReadWrite // ICR043 -range 0x40000C6C 0x40000C6C 1 ReadWrite // ICR044 -range 0x40000C6D 0x40000C6D 1 ReadWrite // ICR045 -range 0x40000C6E 0x40000C6E 1 ReadWrite // ICR046 -range 0x40000C6F 0x40000C6F 1 ReadWrite // ICR047 -range 0x40000C70 0x40000C70 1 ReadWrite // ICR048 -range 0x40000C71 0x40000C71 1 ReadWrite // ICR049 -range 0x40000C72 0x40000C72 1 ReadWrite // ICR050 -range 0x40000C73 0x40000C73 1 ReadWrite // ICR051 -range 0x40000C74 0x40000C74 1 ReadWrite // ICR052 -range 0x40000C75 0x40000C75 1 ReadWrite // ICR053 -range 0x40000C76 0x40000C76 1 ReadWrite // ICR054 -range 0x40000C77 0x40000C77 1 ReadWrite // ICR055 -range 0x40000C78 0x40000C78 1 ReadWrite // ICR056 -range 0x40000C79 0x40000C79 1 ReadWrite // ICR057 -range 0x40000C7A 0x40000C7A 1 ReadWrite // ICR058 -range 0x40000C7B 0x40000C7B 1 ReadWrite // ICR059 -range 0x40000C7C 0x40000C7C 1 ReadWrite // ICR060 -range 0x40000C7D 0x40000C7D 1 ReadWrite // ICR061 -range 0x40000C7E 0x40000C7E 1 ReadWrite // ICR062 -range 0x40000C7F 0x40000C7F 1 ReadWrite // ICR063 -reserved 0x40000C80 0x40000CDF -range 0x40000CE0 0x40000CE0 1 Read // SWIACK0 -reserved 0x40000CE1 0x40000CE3 -range 0x40000CE4 0x40000CE4 1 Read // L1IACK0 -reserved 0x40000CE5 0x40000CE7 -range 0x40000CE8 0x40000CE8 1 Read // L2IACK0 -reserved 0x40000CE9 0x40000CEB -range 0x40000CEC 0x40000CEC 1 Read // L3IACK0 -reserved 0x40000CED 0x40000CEF -range 0x40000CF0 0x40000CF0 1 Read // L4IACK0 -reserved 0x40000CF1 0x40000CF3 -range 0x40000CF4 0x40000CF4 1 Read // L5IACK0 -reserved 0x40000CF5 0x40000CF7 -range 0x40000CF8 0x40000CF8 1 Read // L6IACK0 -reserved 0x40000CF9 0x40000CFB -range 0x40000CFC 0x40000CFC 1 Read // L7IACK0 -reserved 0x40000CFD 0x40000CFF - -// Interrupt Controller Registers 1 -range 0x40000D00 0x40000D03 4 Read // IPRH1 -range 0x40000D04 0x40000D07 4 Read // IPRL1 -range 0x40000D08 0x40000D0B 4 ReadWrite // IMRH1 -range 0x40000D0C 0x40000D0F 4 ReadWrite // IMRL1 -range 0x40000D10 0x40000D13 4 ReadWrite // INTFRCH1 -range 0x40000D14 0x40000D17 4 Read // INTFRCL1 -range 0x40000D18 0x40000D18 1 Read // IRLR1 -range 0x40000D19 0x40000D19 1 Read // IACKLPR1 -reserved 0x40000D1A 0x40000D40 -range 0x40000D41 0x40000D41 1 Read // ICR101 -range 0x40000D42 0x40000D42 1 Read // ICR102 -range 0x40000D43 0x40000D43 1 Read // ICR103 -range 0x40000D44 0x40000D44 1 Read // ICR104 -range 0x40000D45 0x40000D45 1 Read // ICR105 -range 0x40000D46 0x40000D46 1 Read // ICR106 -range 0x40000D47 0x40000D47 1 Read // ICR107 -range 0x40000D48 0x40000D48 1 ReadWrite // ICR108 -range 0x40000D49 0x40000D49 1 ReadWrite // ICR109 -range 0x40000D4A 0x40000D4A 1 ReadWrite // ICR110 -range 0x40000D4B 0x40000D4B 1 ReadWrite // ICR111 -range 0x40000D4C 0x40000D4C 1 ReadWrite // ICR112 -range 0x40000D4D 0x40000D4D 1 ReadWrite // ICR113 -range 0x40000D4E 0x40000D4E 1 ReadWrite // ICR114 -range 0x40000D4F 0x40000D4F 1 ReadWrite // ICR115 -range 0x40000D50 0x40000D50 1 ReadWrite // ICR116 -range 0x40000D51 0x40000D51 1 ReadWrite // ICR117 -range 0x40000D52 0x40000D52 1 ReadWrite // ICR118 -range 0x40000D53 0x40000D53 1 ReadWrite // ICR119 -range 0x40000D54 0x40000D54 1 ReadWrite // ICR120 -range 0x40000D55 0x40000D55 1 ReadWrite // ICR121 -range 0x40000D56 0x40000D56 1 ReadWrite // ICR122 -range 0x40000D57 0x40000D57 1 ReadWrite // ICR123 -range 0x40000D58 0x40000D58 1 ReadWrite // ICR124 -range 0x40000D59 0x40000D59 1 ReadWrite // ICR125 -range 0x40000D5A 0x40000D5A 1 ReadWrite // ICR126 -range 0x40000D5B 0x40000D5B 1 ReadWrite // ICR127 -range 0x40000D5C 0x40000D5C 1 ReadWrite // ICR128 -range 0x40000D5D 0x40000D5D 1 ReadWrite // ICR129 -range 0x40000D5E 0x40000D5E 1 ReadWrite // ICR130 -range 0x40000D5F 0x40000D5F 1 ReadWrite // ICR131 -range 0x40000D60 0x40000D60 1 ReadWrite // ICR132 -range 0x40000D61 0x40000D61 1 ReadWrite // ICR133 -range 0x40000D62 0x40000D62 1 ReadWrite // ICR134 -range 0x40000D63 0x40000D63 1 ReadWrite // ICR135 -range 0x40000D64 0x40000D64 1 ReadWrite // ICR136 -range 0x40000D65 0x40000D65 1 ReadWrite // ICR137 -range 0x40000D66 0x40000D66 1 ReadWrite // ICR138 -range 0x40000D67 0x40000D67 1 ReadWrite // ICR139 -range 0x40000D68 0x40000D68 1 ReadWrite // ICR140 -range 0x40000D69 0x40000D69 1 ReadWrite // ICR141 -range 0x40000D6A 0x40000D6A 1 ReadWrite // ICR142 -range 0x40000D6B 0x40000D6B 1 ReadWrite // ICR143 -range 0x40000D6C 0x40000D6C 1 ReadWrite // ICR144 -range 0x40000D6D 0x40000D6D 1 ReadWrite // ICR145 -range 0x40000D6E 0x40000D6E 1 ReadWrite // ICR146 -range 0x40000D6F 0x40000D6F 1 ReadWrite // ICR147 -range 0x40000D70 0x40000D70 1 ReadWrite // ICR148 -range 0x40000D71 0x40000D71 1 ReadWrite // ICR149 -range 0x40000D72 0x40000D72 1 ReadWrite // ICR150 -range 0x40000D73 0x40000D73 1 ReadWrite // ICR151 -range 0x40000D74 0x40000D74 1 ReadWrite // ICR152 -range 0x40000D75 0x40000D75 1 ReadWrite // ICR153 -range 0x40000D76 0x40000D76 1 ReadWrite // ICR154 -range 0x40000D77 0x40000D77 1 ReadWrite // ICR155 -range 0x40000D78 0x40000D78 1 ReadWrite // ICR156 -range 0x40000D79 0x40000D79 1 ReadWrite // ICR157 -range 0x40000D7A 0x40000D7A 1 ReadWrite // ICR158 -range 0x40000D7B 0x40000D7B 1 ReadWrite // ICR159 -range 0x40000D7C 0x40000D7C 1 ReadWrite // ICR160 -range 0x40000D7D 0x40000D7D 1 ReadWrite // ICR161 -range 0x40000D7E 0x40000D7E 1 ReadWrite // ICR162 -range 0x40000D7F 0x40000D7F 1 ReadWrite // ICR163 -reserved 0x40000D80 0x40000DDF -range 0x40000DE0 0x40000DE0 1 Read // SWIACK1 -reserved 0x40000DE1 0x40000DE3 -range 0x40000DE4 0x40000DE4 1 Read // L1IACK1 -reserved 0x40000DE5 0x40000DE7 -range 0x40000DE8 0x40000DE8 1 Read // L2IACK1 -reserved 0x40000DE9 0x40000DEB -range 0x40000DEC 0x40000DEC 1 Read // L3IACK1 -reserved 0x40000DED 0x40000DEF -range 0x40000DF0 0x40000DF0 1 Read // L4IACK1 -reserved 0x40000DF1 0x40000DF3 -range 0x40000DF4 0x40000DF4 1 Read // L5IACK1 -reserved 0x40000DF5 0x40000DF7 -range 0x40000DF8 0x40000DF8 1 Read // L6IACK1 -reserved 0x40000DF9 0x40000DFB -range 0x40000DFC 0x40000DFC 1 Read // L7IACK1 -reserved 0x40000DFD 0x40001003 - -// Fast Ethernet Controllers Registers -range 0x40001004 0x40001007 4 ReadWrite // EIR -range 0x40001008 0x4000100B 4 ReadWrite // EIMR -reserved 0x4000100C 0x4000100F -range 0x40001010 0x40001013 4 ReadWrite // RDAR -range 0x40001014 0x40001017 4 ReadWrite // TDAR -reserved 0x40001018 0x40001023 -range 0x40001024 0x40001027 4 ReadWrite // ECR -reserved 0x40001028 0x4000103F -range 0x40001040 0x40001043 4 ReadWrite // MDATA -range 0x40001044 0x40001047 4 ReadWrite // MSCR -reserved 0x40001048 0x40001063 -range 0x40001064 0x40001067 4 ReadWrite // MIBC -reserved 0x40001068 0x40001083 -range 0x40001084 0x40001087 4 ReadWrite // RCR -reserved 0x40001088 0x400010C3 -range 0x400010C4 0x400010C7 4 ReadWrite // TCR -reserved 0x400010C8 0x400010E3 -range 0x400010E4 0x400010E7 4 ReadWrite // PALR -range 0x400010E8 0x400010EB 4 ReadWrite // PAUR -range 0x400010EC 0x400010EF 4 ReadWrite // OPD -reserved 0x400010F0 0x40001117 -range 0x40001118 0x4000111B 4 ReadWrite // IAUR -range 0x4000111C 0x4000111F 4 ReadWrite // IALR -range 0x40001120 0x40001123 4 ReadWrite // GAUR -range 0x40001124 0x40001127 4 ReadWrite // GALR -reserved 0x40001128 0x40001143 -range 0x40001144 0x40001147 4 ReadWrite // TFWR -reserved 0x40001148 0x4000114B -range 0x4000114C 0x4000114F 4 ReadWrite // FRBR -range 0x40001150 0x40001153 4 ReadWrite // FRSR -reserved 0x40001154 0x4000117F -range 0x40001180 0x40001183 4 ReadWrite // ERDSR -range 0x40001184 0x40001187 4 ReadWrite // ETDSR -range 0x40001188 0x4000118B 4 ReadWrite // EMRBR -reserved 0x4000118C 0x400FFFFF - -// GPIO Registers -range 0x40100000 0x40100000 1 ReadWrite // PODR_ADDR -range 0x40100001 0x40100001 1 ReadWrite // PODR_DATAH -range 0x40100002 0x40100002 1 ReadWrite // PODR_DATAL -range 0x40100003 0x40100003 1 ReadWrite // PODR_BUSCTL -range 0x40100004 0x40100004 1 ReadWrite // PODR_BS -range 0x40100005 0x40100005 1 ReadWrite // PODR_CS -range 0x40100006 0x40100006 1 ReadWrite // PODR_SDRAM -range 0x40100007 0x40100007 1 ReadWrite // PODR_FECI2C -range 0x40100008 0x40100008 1 ReadWrite // PODR_UARTH -range 0x40100009 0x40100009 1 ReadWrite // PODR_UARTL -range 0x4010000A 0x4010000A 1 ReadWrite // PODR_QSPI -range 0x4010000B 0x4010000B 1 ReadWrite // PODR_TIMER -range 0x4010000C 0x4010000C 1 ReadWrite // PODR_ETPU -reserved 0x4010000D 0x4010000F -range 0x40100010 0x40100010 1 ReadWrite // PDDR_ADDR -range 0x40100011 0x40100011 1 ReadWrite // PDDR_DATAH -range 0x40100012 0x40100012 1 ReadWrite // PDDR_DATAL -range 0x40100013 0x40100013 1 ReadWrite // PDDR_BUSCTL -range 0x40100014 0x40100014 1 ReadWrite // PDDR_BS -range 0x40100015 0x40100015 1 ReadWrite // PDDR_CS -range 0x40100016 0x40100016 1 ReadWrite // PDDR_SDRAM -range 0x40100017 0x40100017 1 ReadWrite // PDDR_FECI2C -range 0x40100018 0x40100018 1 ReadWrite // PDDR_UARTH -range 0x40100019 0x40100019 1 ReadWrite // PDDR_UARTL -range 0x4010001A 0x4010001A 1 ReadWrite // PDDR_QSPI -range 0x4010001B 0x4010001B 1 ReadWrite // PDDR_TIMER -range 0x4010001C 0x4010001C 1 ReadWrite // PDDR_ETPU -reserved 0x4010001D 0x4010001F -range 0x40100020 0x40100020 1 ReadWrite // PPDSDR_ADDR -range 0x40100021 0x40100021 1 ReadWrite // PPDSDR_DATAH -range 0x40100022 0x40100022 1 ReadWrite // PPDSDR_DATAL -range 0x40100023 0x40100023 1 ReadWrite // PPDSDR_BUSCTL -range 0x40100024 0x40100024 1 ReadWrite // PPDSDR_BS -range 0x40100025 0x40100025 1 ReadWrite // PPDSDR_CS -range 0x40100026 0x40100026 1 ReadWrite // PPDSDR_SDRAM -range 0x40100027 0x40100027 1 ReadWrite // PPDSDR_FECI2C -range 0x40100028 0x40100028 1 ReadWrite // PPDSDR_UARTH -range 0x40100029 0x40100029 1 ReadWrite // PPDSDR_UARTL -range 0x4010002A 0x4010002A 1 ReadWrite // PPDSDR_QSPI -range 0x4010002B 0x4010002B 1 ReadWrite // PPDSDR_TIMER -range 0x4010002C 0x4010002C 1 ReadWrite // PPDSDR_ETPU -reserved 0x4010002D 0x4010002F -range 0x40100030 0x40100030 1 ReadWrite // PCLRR_ADDR -range 0x40100031 0x40100031 1 ReadWrite // PCLRR_DATAH -range 0x40100032 0x40100032 1 ReadWrite // PCLRR_DATAL -range 0x40100033 0x40100033 1 ReadWrite // PCLRR_BUSCTL -range 0x40100034 0x40100034 1 ReadWrite // PCLRR_BS -range 0x40100035 0x40100035 1 ReadWrite // PCLRR_CS -range 0x40100036 0x40100036 1 ReadWrite // PCLRR_SDRAM -range 0x40100037 0x40100037 1 ReadWrite // PCLRR_FECI2C -range 0x40100038 0x40100038 1 ReadWrite // PCLRR_UARTH -range 0x40100039 0x40100039 1 ReadWrite // PCLRR_UARTL -range 0x4010003A 0x4010003A 1 ReadWrite // PCLRR_QSPI -range 0x4010003B 0x4010003B 1 ReadWrite // PCLRR_TIMER -range 0x4010003C 0x4010003C 1 ReadWrite // PCLRR_ETPU -reserved 0x4010003D 0x4010003F -range 0x40100040 0x40100040 1 ReadWrite // PAR_AD -reserved 0x40100041 0x40100041 -range 0x40100042 0x40100043 2 ReadWrite // PAR_BUSCTL -range 0x40100044 0x40100044 1 ReadWrite // PAR_BS -range 0x40100045 0x40100045 1 ReadWrite // PAR_CS -range 0x40100046 0x40100046 1 ReadWrite // PAR_SDRAM -range 0x40100047 0x40100047 1 ReadWrite // PAR_FECI2C -range 0x40100048 0x40100049 2 ReadWrite // PAR_UART -range 0x4010004A 0x4010004A 1 ReadWrite // PAR_QSPI -reserved 0x4010004B 0x4010004B -range 0x4010004C 0x4010004D 2 ReadWrite // PAR_TIMER -range 0x4010004E 0x4010004E 1 ReadWrite // PAR_ETPU -reserved 0x4010004F 0x4010004F -range 0x40100050 0x40100050 1 ReadWrite // DSCR_EIM -range 0x40100051 0x40100051 1 ReadWrite // DSCR_ETPU -range 0x40100052 0x40100052 1 ReadWrite // DSCR_FECI2C -range 0x40100053 0x40100053 1 ReadWrite // DSCR_UART -range 0x40100054 0x40100054 1 ReadWrite // DSCR_QSPI -range 0x40100055 0x40100055 1 ReadWrite // DSCR_TIMER -reserved 0x40100056 0x4010FFFF - -// Reset controller Module Registers -range 0x40110000 0x40110000 1 ReadWrite // RCR -range 0x40110001 0x40110001 1 Read // RSR -reserved 0x40110002 0x40110003 - -// Chip Configuration Module Registers -range 0x40110004 0x40110005 2 ReadWrite // CCR -reserved 0x40110006 0x40110006 -range 0x40110007 0x40110007 1 ReadWrite // LPCR -range 0x40110008 0x40110009 2 ReadWrite // RCON -range 0x4011000A 0x4011000A 1 ReadWrite // CIR -reserved 0x4011000B 0x4011FFFF - -// Clock Module Registers -range 0x40120000 0x40120003 4 ReadWrite // SYNCR -range 0x40120004 0x40120007 4 Read // SYNSR -reserved 0x40120008 0x4012FFFF - -// Edge Port Registers -range 0x40130000 0x40130001 2 ReadWrite // EPPAR -range 0x40130002 0x40130002 1 ReadWrite // EPDDR -range 0x40130003 0x40130003 1 ReadWrite // EPIER -range 0x40130004 0x40130004 1 ReadWrite // EPDR -range 0x40130005 0x40130005 1 Read // EPPDR -range 0x40130006 0x40130006 1 ReadWrite // EPFR -reserved 0x40130007 0x4013FFFF - -// Watchdog Timer Module Registers -range 0x40140000 0x40140001 2 ReadWrite // WCR -range 0x40140002 0x40140003 2 ReadWrite // WMR -range 0x40140004 0x40140005 2 Read // WCNTR -range 0x40140006 0x40140007 2 ReadWrite // WSR -reserved 0x40140008 0x4014FFFF - -// Programmable Interrupt Timer 0 Modules Registers -range 0x40150000 0x40150001 2 ReadWrite // PCSR0 -range 0x40150002 0x40150003 2 ReadWrite // PMR0 -range 0x40150004 0x40150005 2 Read // PCNTR0 -reserved 0x40150006 0x4015FFFF - -// Programmable Interrupt Timer 1 Modules Registers -range 0x40160000 0x40160001 2 ReadWrite // PCSR1 -range 0x40160002 0x40160003 2 ReadWrite // PMR1 -range 0x40160004 0x40160005 2 Read // PCNTR1 -reserved 0x40160006 0x4016FFFF - -// Programmable Interrupt Timer 2 Modules Registers -range 0x40170000 0x40170001 2 ReadWrite // PCSR2 -range 0x40170002 0x40170003 2 ReadWrite // PMR2 -range 0x40170004 0x40170005 2 Read // PCNTR2 -reserved 0x40170006 0x4017FFFF - -// Programmable Interrupt Timer 3 Modules Registers -range 0x40180000 0x40180001 2 ReadWrite // PCSR3 -range 0x40180002 0x40180003 2 ReadWrite // PMR3 -range 0x40180004 0x40180005 2 Read // PCNTR3 -reserved 0x40180006 0x4018FFFF - -// Message Digest Hardware Accelerator Registers -range 0x40190000 0x40190003 4 ReadWrite // MDMR -range 0x40190004 0x40190007 4 ReadWrite // MDCR -range 0x40190008 0x4019000B 4 Write // MDCMR -range 0x4019000C 0x4019000F 4 Read // MDSR -range 0x40190010 0x40190013 4 Read // MDISR -range 0x40190014 0x40190017 4 ReadWrite // MDIMR -reserved 0x40190018 0x4019001B -range 0x4019001C 0x4019001F 4 ReadWrite // MDDSR -range 0x40190020 0x40190023 4 ReadWrite // MDIN -reserved 0x40190024 0x4019002F -range 0x40190030 0x40190033 4 ReadWrite // MDA0 -range 0x40190034 0x40190037 4 ReadWrite // MDB0 -range 0x40190038 0x4019003B 4 ReadWrite // MDC0 -range 0x4019003C 0x4019003F 4 ReadWrite // MDD0 -range 0x40190040 0x40190043 4 ReadWrite // MDE0 -range 0x40190044 0x40190047 4 ReadWrite // MDMDS -reserved 0x40190048 0x4019006F -range 0x40190070 0x40190073 4 ReadWrite // MDA1 -range 0x40190074 0x40190077 4 ReadWrite // MDB1 -range 0x40190078 0x4019007B 4 ReadWrite // MDC1 -range 0x4019007C 0x4019007F 4 ReadWrite // MDD1 -range 0x40190080 0x40190083 4 ReadWrite // MDE1 -reserved 0x40190084 0x4019FFFF - -// Random Number Generator Registers -range 0x401A0000 0x401A0003 4 ReadWrite // RNGCR -range 0x401A0004 0x401A0007 4 Read // RNGSR -range 0x401A0008 0x401A000B 4 Write // RNGER -range 0x401A000C 0x401A000F 4 Read // RNGOUT -reserved 0x401A0010 0x401AFFFF - -// Symmetric Key Hardware Accelerator Registers -range 0x401B0000 0x401B0003 4 ReadWrite // SKMR -range 0x401B0004 0x401B0007 4 ReadWrite // SKCR -range 0x401B0008 0x401B000B 4 ReadWrite // SKCMR -range 0x401B000C 0x401B000F 4 Read // SKSR -range 0x401B0010 0x401B0013 4 Read // SKESR -range 0x401B0014 0x401B0017 4 ReadWrite // SKESMR -range 0x401B0018 0x401B001B 4 ReadWrite // SKKSR -range 0x401B001C 0x401B001F 4 ReadWrite // SKDSR -range 0x401B0020 0x401B0023 4 ReadWrite // SKIN -range 0x401B0024 0x401B0027 4 ReadWrite // SKOUT -reserved 0x401B0028 0x401B002F -range 0x401B0030 0x401B0033 4 Write // SKK1 -range 0x401B0034 0x401B0037 4 Write // SKK2 -range 0x401B0038 0x401B003B 4 Write // SKK3 -range 0x401B003C 0x401B003F 4 Write // SKK4 -range 0x401B0040 0x401B0043 4 Write // SKK5 -range 0x401B0044 0x401B0047 4 Write // SKK6 -reserved 0x401B0048 0x401BFFFF - -// Flex Controller Area Network 1 Registers -range 0x401C0000 0x401C0003 4 ReadWrite // CANMCR1 -range 0x401C0004 0x401C0007 4 ReadWrite // CANCTRL1 -range 0x401C0008 0x401C000B 4 ReadWrite // TIMER1 -reserved 0x401C000C 0x401C000F -range 0x401C0010 0x401C0013 4 ReadWrite // RXGMASK1 -range 0x401C0014 0x401C0017 4 ReadWrite // RX14MASK1 -range 0x401C0018 0x401C001B 4 ReadWrite // RX15MASK1 -range 0x401C001C 0x401C001F 4 ReadWrite // ERRCNT1 -range 0x401C0020 0x401C0023 4 ReadWrite // ERRSTAT1 -reserved 0x401C0024 0x401C0029 -range 0x401C002A 0x401C002B 2 ReadWrite // IMASK1 -reserved 0x401C002C 0x401C0031 -range 0x401C0032 0x401C0033 2 ReadWrite // IFLAG1 -reserved 0x401C0034 0x401CFFFF - -// Enhanced Time Process Unit Registers -range 0x401D0000 0x401D0003 4 ReadWrite // ETPU_MCR -range 0x401D0004 0x401D0007 4 ReadWrite // ETPU_CDCR -reserved 0x401D0008 0x401D000B -range 0x401D000C 0x401D000F 4 ReadWrite // ETPU_MISCCMPR -reserved 0x401D0010 0x401D0013 -range 0x401D0014 0x401D0017 4 ReadWrite // ETPU_ECR -reserved 0x401D0018 0x401D001F -range 0x401D0020 0x401D0023 4 ReadWrite // ETPU_TBCR -range 0x401D0024 0x401D0027 4 ReadWrite // ETPU_TB1R -range 0x401D0028 0x401D002B 4 ReadWrite // ETPU_TB2R -reserved 0x401D002C 0x401D01FF -range 0x401D0200 0x401D0203 4 ReadWrite // ETPU_CISR -reserved 0x401D0204 0x401D020F -range 0x401D0210 0x401D0213 4 ReadWrite // ETPU_CDTRSR -reserved 0x401D0214 0x401D021F -range 0x401D0220 0x401D0223 4 ReadWrite // ETPU_CIOSR -reserved 0x401D0224 0x401D022F -range 0x401D0230 0x401D0233 4 ReadWrite // ETPU_CDTROSR -reserved 0x401D0234 0x401D023F -range 0x401D0240 0x401D0243 4 ReadWrite // ETPU_CIER -reserved 0x401D0244 0x401D024F -range 0x401D0250 0x401D0253 4 ReadWrite // ETPU_CDTRER -reserved 0x401D0254 0x401D027F -range 0x401D0280 0x401D0283 4 Read // ETPU_CPSSR -reserved 0x401D0284 0x401D028F -range 0x401D0290 0x401D0293 4 Read // ETPU_CSSR -reserved 0x401D0294 0x401D03FF -range 0x401D0400 0x401D0403 4 ReadWrite // ETPU_C0CR -range 0x401D0404 0x401D0407 4 ReadWrite // ETPU_C0SCR -range 0x401D0408 0x401D040B 4 ReadWrite // ETPU_C0HSRR -reserved 0x401D040C 0x401D040F -range 0x401D0410 0x401D0413 4 ReadWrite // ETPU_C1CR -range 0x401D0414 0x401D0417 4 ReadWrite // ETPU_C1SCR -range 0x401D0418 0x401D041B 4 ReadWrite // ETPU_C1HSRR -reserved 0x401D041C 0x401D041F -range 0x401D0420 0x401D0423 4 ReadWrite // ETPU_C2CR -range 0x401D0424 0x401D0427 4 ReadWrite // ETPU_C2SCR -range 0x401D0428 0x401D042B 4 ReadWrite // ETPU_C2HSRR -reserved 0x401D042C 0x401D042F -range 0x401D0430 0x401D0433 4 ReadWrite // ETPU_C3CR -range 0x401D0434 0x401D0437 4 ReadWrite // ETPU_C3SCR -range 0x401D0438 0x401D043B 4 ReadWrite // ETPU_C3HSRR -reserved 0x401D043C 0x401D043F -range 0x401D0440 0x401D0443 4 ReadWrite // ETPU_C4CR -range 0x401D0444 0x401D0447 4 ReadWrite // ETPU_C4SCR -range 0x401D0448 0x401D044B 4 ReadWrite // ETPU_C4HSRR -reserved 0x401D044C 0x401D044F -range 0x401D0450 0x401D0453 4 ReadWrite // ETPU_C5CR -range 0x401D0454 0x401D0457 4 ReadWrite // ETPU_C5SCR -range 0x401D0458 0x401D045B 4 ReadWrite // ETPU_C5HSRR -reserved 0x401D045C 0x401D045F -range 0x401D0460 0x401D0463 4 ReadWrite // ETPU_C6CR -range 0x401D0464 0x401D0467 4 ReadWrite // ETPU_C6SCR -range 0x401D0468 0x401D046B 4 ReadWrite // ETPU_C6HSRR -reserved 0x401D046C 0x401D046F -range 0x401D0470 0x401D0473 4 ReadWrite // ETPU_C7CR -range 0x401D0474 0x401D0477 4 ReadWrite // ETPU_C7SCR -range 0x401D0478 0x401D047B 4 ReadWrite // ETPU_C7HSRR -reserved 0x401D047C 0x401D047F -range 0x401D0480 0x401D0483 4 ReadWrite // ETPU_C8CR -range 0x401D0484 0x401D0487 4 ReadWrite // ETPU_C8SCR -range 0x401D0488 0x401D048B 4 ReadWrite // ETPU_C8HSRR -reserved 0x401D048C 0x401D048F -range 0x401D0490 0x401D0493 4 ReadWrite // ETPU_C9CR -range 0x401D0494 0x401D0497 4 ReadWrite // ETPU_C9SCR -range 0x401D0498 0x401D049B 4 ReadWrite // ETPU_C9HSRR -reserved 0x401D049C 0x401D049F -range 0x401D04A0 0x401D04A3 4 ReadWrite // ETPU_C10CR -range 0x401D04A4 0x401D04A7 4 ReadWrite // ETPU_C10SCR -range 0x401D04A8 0x401D04AB 4 ReadWrite // ETPU_C10HSRR -reserved 0x401D04AC 0x401D04AF -range 0x401D04B0 0x401D04B3 4 ReadWrite // ETPU_C11CR -range 0x401D04B4 0x401D04B7 4 ReadWrite // ETPU_C11SCR -range 0x401D04B8 0x401D04BB 4 ReadWrite // ETPU_C11HSRR -reserved 0x401D04BC 0x401D04BF -range 0x401D04C0 0x401D04C3 4 ReadWrite // ETPU_C12CR -range 0x401D04C4 0x401D04C7 4 ReadWrite // ETPU_C12SCR -range 0x401D04C8 0x401D04CB 4 ReadWrite // ETPU_C12HSRR -reserved 0x401D04CC 0x401D04CF -range 0x401D04D0 0x401D04D3 4 ReadWrite // ETPU_C13CR -range 0x401D04D4 0x401D04D7 4 ReadWrite // ETPU_C13SCR -range 0x401D04D8 0x401D04DB 4 ReadWrite // ETPU_C13HSRR -reserved 0x401D04DC 0x401D04DF -range 0x401D04E0 0x401D04E3 4 ReadWrite // ETPU_C14CR -range 0x401D04E4 0x401D04E7 4 ReadWrite // ETPU_C14SCR -range 0x401D04E8 0x401D04EB 4 ReadWrite // ETPU_C14HSRR -reserved 0x401D04EC 0x401D04EF -range 0x401D04F0 0x401D04F3 4 ReadWrite // ETPU_C15CR -range 0x401D04F4 0x401D04F7 4 ReadWrite // ETPU_C15SCR -range 0x401D04F8 0x401D04FB 4 ReadWrite // ETPU_C15HSRR -reserved 0x401D04FC 0x401D04FF -range 0x401D0500 0x401D0503 4 ReadWrite // ETPU_C16CR -range 0x401D0504 0x401D0507 4 ReadWrite // ETPU_C16SCR -range 0x401D0508 0x401D050B 4 ReadWrite // ETPU_C16HSRR -reserved 0x401D050C 0x401D050F -range 0x401D0510 0x401D0513 4 ReadWrite // ETPU_C17CR -range 0x401D0514 0x401D0517 4 ReadWrite // ETPU_C17SCR -range 0x401D0518 0x401D051B 4 ReadWrite // ETPU_C17HSRR -reserved 0x401D051C 0x401D051F -range 0x401D0520 0x401D0523 4 ReadWrite // ETPU_C18CR -range 0x401D0524 0x401D0527 4 ReadWrite // ETPU_C18SCR -range 0x401D0528 0x401D052B 4 ReadWrite // ETPU_C18HSRR -reserved 0x401D052C 0x401D052F -range 0x401D0530 0x401D0533 4 ReadWrite // ETPU_C19CR -range 0x401D0534 0x401D0537 4 ReadWrite // ETPU_C19SCR -range 0x401D0538 0x401D053B 4 ReadWrite // ETPU_C19HSRR -reserved 0x401D053C 0x401D053F -range 0x401D0540 0x401D0543 4 ReadWrite // ETPU_C20CR -range 0x401D0544 0x401D0547 4 ReadWrite // ETPU_C20SCR -range 0x401D0548 0x401D054B 4 ReadWrite // ETPU_C20HSRR -reserved 0x401D054C 0x401D054F -range 0x401D0550 0x401D0553 4 ReadWrite // ETPU_C21CR -range 0x401D0554 0x401D0557 4 ReadWrite // ETPU_C21SCR -range 0x401D0558 0x401D055B 4 ReadWrite // ETPU_C21HSRR -reserved 0x401D055C 0x401D055F -range 0x401D0560 0x401D0563 4 ReadWrite // ETPU_C22CR -range 0x401D0564 0x401D0567 4 ReadWrite // ETPU_C22SCR -range 0x401D0568 0x401D056B 4 ReadWrite // ETPU_C22HSRR -reserved 0x401D056C 0x401D056F -range 0x401D0570 0x401D0573 4 ReadWrite // ETPU_C23CR -range 0x401D0574 0x401D0577 4 ReadWrite // ETPU_C23SCR -range 0x401D0578 0x401D057B 4 ReadWrite // ETPU_C23HSRR -reserved 0x401D057C 0x401D057F -range 0x401D0580 0x401D0583 4 ReadWrite // ETPU_C24CR -range 0x401D0584 0x401D0587 4 ReadWrite // ETPU_C24SCR -range 0x401D0588 0x401D058B 4 ReadWrite // ETPU_C24HSRR -reserved 0x401D058C 0x401D058F -range 0x401D0590 0x401D0593 4 ReadWrite // ETPU_C25CR -range 0x401D0594 0x401D0597 4 ReadWrite // ETPU_C25SCR -range 0x401D0598 0x401D059B 4 ReadWrite // ETPU_C25HSRR -reserved 0x401D059C 0x401D059F -range 0x401D05A0 0x401D05A3 4 ReadWrite // ETPU_C26CR -range 0x401D05A4 0x401D05A7 4 ReadWrite // ETPU_C26SCR -range 0x401D05A8 0x401D05AB 4 ReadWrite // ETPU_C26HSRR -reserved 0x401D05AC 0x401D05AF -range 0x401D05B0 0x401D05B3 4 ReadWrite // ETPU_C27CR -range 0x401D05B4 0x401D05B7 4 ReadWrite // ETPU_C27SCR -range 0x401D05B8 0x401D05BB 4 ReadWrite // ETPU_C27HSRR -reserved 0x401D05BC 0x401D05BF -range 0x401D05C0 0x401D05C3 4 ReadWrite // ETPU_C28CR -range 0x401D05C4 0x401D05C7 4 ReadWrite // ETPU_C28SCR -range 0x401D05C8 0x401D05CB 4 ReadWrite // ETPU_C28HSRR -reserved 0x401D05CC 0x401D05CF -range 0x401D05D0 0x401D05D3 4 ReadWrite // ETPU_C29CR -range 0x401D05D4 0x401D05D7 4 ReadWrite // ETPU_C29SCR -range 0x401D05D8 0x401D05DB 4 ReadWrite // ETPU_C29HSRR -reserved 0x401D05DC 0x401D05DF -range 0x401D05E0 0x401D05E3 4 ReadWrite // ETPU_C30CR -range 0x401D05E4 0x401D05E7 4 ReadWrite // ETPU_C30SCR -range 0x401D05E8 0x401D05EB 4 ReadWrite // ETPU_C30HSRR -reserved 0x401D05EC 0x401D05EF -range 0x401D05F0 0x401D05F3 4 ReadWrite // ETPU_C31CR -range 0x401D05F4 0x401D05F7 4 ReadWrite // ETPU_C31SCR -range 0x401D05F8 0x401D05FB 4 ReadWrite // ETPU_C31HSRR -reserved 0x401D05FC 0x401EFFFF - -// Flex Controller Area Network 2 Registers -range 0x401F0000 0x401F0003 4 ReadWrite // CANMCR2 -range 0x401F0004 0x401F0007 4 ReadWrite // CANCTRL2 -range 0x401F0008 0x401F000B 4 ReadWrite // TIMER2 -reserved 0x401F000C 0x401F000F -range 0x401F0010 0x401F0013 4 ReadWrite // RXGMASK2 -range 0x401F0014 0x401F0017 4 ReadWrite // RX14MASK2 -range 0x401F0018 0x401F001B 4 ReadWrite // RX15MASK2 -range 0x401F001C 0x401F001F 4 ReadWrite // ERRCNT2 -range 0x401F0020 0x401F0023 4 ReadWrite // ERRSTAT2 -reserved 0x401F0024 0x401F0029 -range 0x401F002A 0x401F002B 2 ReadWrite // IMASK2 -reserved 0x401F002C 0x401F0031 -range 0x401F0032 0x401F0033 2 ReadWrite // IFLAG2 -reserved 0x401F0034 0x401FFFFF diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/ram.lcf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/ram.lcf deleted file mode 100644 index 57e61d9f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/ram.lcf +++ /dev/null @@ -1,121 +0,0 @@ -# -# FreeModbus Libary: MCF5235 Demo Application -# Copyright (C) 2007 Christian Walter -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# 3. The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# File: $Id: ram.lcf,v 1.1 2007/02/19 00:56:14 wolti Exp $ -# - -MEMORY -{ - ext_flash (RWX) : ORIGIN = 0x00000000, LENGTH = 0x0 - sdram (RWX) : ORIGIN = 0x10000000, LENGTH = 0x0 - vector_ram (RWX) : ORIGIN = 0x10000000, LENGTH = 0x0 - user (RWX) : ORIGIN = 0x10000500, LENGTH = 0x0 - sram (RWX) : ORIGIN = 0x20000000, LENGTH = 0x0 - ipsbar (RWX) : ORIGIN = 0x40000000, LENGTH = 0x0 -} - -SECTIONS -{ - .sdram : {} > sdram - .vector_ram : {} > vector_ram - .ipsbar : {} > ipsbar - .sram : {} > sram - .ext_flash : {} > ext_flash - - .vectors : - { - . = ALIGN (0x4); - } > user - - .text : - { - . = ALIGN (0x4); - *(.text) - . = ALIGN (0x4); - *(.rodata) - . = ALIGN (0x4); - } >> user - - .data : - { - ___sinit__ = .; - STATICINIT - - __START_DATA = .; - *(.data) - __END_DATA = .; - - __START_SDATA = .; - *(.sdata) - __END_SDATA = .; - __SDA_BASE = .; - . = ALIGN (0x4); - - } >> user - - .bss : - { - __START_SBSS = .; - *(.sbss) - *(SCOMMON) - __END_SBSS = .; - - __START_BSS = .; - *(.bss) - *(COMMON) - __END_BSS = .; - . = ALIGN(0x4); - } >> user - - .custom : - { - - ___HEAP_START = .; - ___HEAP_END = ___HEAP_START + 0x10000; - ___SP_END = ___HEAP_END; - ___SP_INIT = ___SP_END + 0x4000; - - . = ALIGN (0x4); - } >> user - - ___IPSBAR = ADDR(.ipsbar); - ___VECTOR_RAM = ADDR(.vector_ram); - - ___SDRAM = ADDR(.sdram); - ___SDRAM_SIZE = 0x01000000; - - ___SRAM = ADDR(.sram); - ___SRAM_SIZE = 0x00010000; - - ___EXT_FLASH = ADDR(.ext_flash); - ___EXT_FLASH_SIZE = 0x00200000; - - ___heap_addr = ___HEAP_START; - ___heap_size = 0x10000; - __SP_INIT = ___SP_INIT; - __S_romp = 0x0; - -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/rom.lcf b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/rom.lcf deleted file mode 100644 index 9f33c379..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/support/rom.lcf +++ /dev/null @@ -1,123 +0,0 @@ -# -# FreeModbus Libary: MCF5235 Demo Application -# Copyright (C) 2007 Christian Walter -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# 3. The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# File: $Id: rom.lcf,v 1.1 2007/02/19 00:56:14 wolti Exp $ -# - -MEMORY -{ - ext_flash (RWX) : ORIGIN = 0x00000000, LENGTH = 0x0 - sdram (RWX) : ORIGIN = 0x10000000, LENGTH = 0x0 - vector_ram (RWX) : ORIGIN = 0x10000000, LENGTH = 0x0 - user (RWX) : ORIGIN = 0x10000500, LENGTH = 0x0 - sram (RWX) : ORIGIN = 0x20000000, LENGTH = 0x0 - ipsbar (RWX) : ORIGIN = 0x40000000, LENGTH = 0x0 -} - -SECTIONS -{ - - .sdram : {} > sdram - .vector_ram : {} > vector_ram - .ipsbar : {} > ipsbar - .sram : {} > sram - - .boot_flash : - { - vectors.s (.text) - *(.text) - *(.rodata) - .= ALIGN(0x4); - } > ext_flash - - __end_of_text = .; - - ___DATA_ROM = __end_of_text; - - ___DATA_RAM = ADDR(user); - - .sys_sram : AT(___DATA_ROM) - { - __START_DATA = .; - *(.data) - __END_DATA = .; - - __START_SDATA = .; - *(.sdata) - __END_SDATA = .; - - __SDA_BASE = .; - .= ALIGN(0x4); - } > user - - .uninitialized_data : - { - __START_SBSS = .; - *(.sbss) - *(SCOMMON) - __END_SBSS = .; - - __START_BSS = .; - *(.bss) - *(COMMON) - __END_BSS = .; - - . = ALIGN (0x4); - - ___HEAP_START = .; - ___HEAP_END = ___HEAP_START + 0x10000; - ___SP_END = ___HEAP_END; - ___SP_INIT = ___SP_END + 0x1000; - - . = ALIGN(0x4); - } >> user - - _romp_at = ___DATA_ROM + SIZEOF(.sys_sram); - .romp : AT(_romp_at) - { - __S_romp = _romp_at; - WRITEW(___DATA_ROM); - WRITEW(ADDR(.sys_sram)); - WRITEW(SIZEOF(.sys_sram)); - WRITEW(0); - WRITEW(0); - WRITEW(0); - } - - - ___IPSBAR = ADDR(.ipsbar); - ___VECTOR_RAM = ADDR(.vector_ram); - ___SDRAM = ADDR(.sdram); - ___SDRAM_SIZE = 0x01000000; - ___SRAM = ADDR(.sram); - ___SRAM_SIZE = 0x00010000; - ___EXT_FLASH = ADDR(.boot_flash); - ___EXT_FLASH_SIZE = 0x00200000; - ___heap_addr = ___HEAP_START; - ___heap_size = 0x10000; - __SP_INIT = ___SP_INIT; - -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/hwinit.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/hwinit.c deleted file mode 100644 index bd43c29d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/hwinit.c +++ /dev/null @@ -1,250 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include "m523xbcc.h" - -void mcf523x_init( void ); -void mcf523x_wtm_init( void ); -void mcf523x_pll_init( void ); -void mcf523x_scm_init( void ); -void mcf523x_gpio_init( void ); -void mcf523x_cs_init( void ); -void mcf523x_sdram_init( void ); -void mcf523x_flexcan_init( void ); - -void -mcf523x_init( void ) -{ - extern char __DATA_ROM[]; - extern char __DATA_RAM[]; - extern char __DATA_END[]; - extern char __BSS_START[]; - extern char __BSS_END[]; - extern uint32 VECTOR_TABLE[]; - extern uint32 __VECTOR_RAM[]; - register uint32 n; - - mcf523x_flexcan_init( ); - mcf523x_wtm_init( ); - mcf523x_pll_init( ); - mcf523x_gpio_init( ); - mcf523x_scm_init( ); - mcf523x_cs_init( ); - mcf523x_sdram_init( ); - - /* Turn Instruction Cache ON */ - mcf5xxx_wr_cacr( 0 - | MCF5XXX_CACR_CENB - | MCF5XXX_CACR_CINV - | MCF5XXX_CACR_DISD | MCF5XXX_CACR_CEIB | MCF5XXX_CACR_CLNF_00 ); - - - /* Copy the vector table to RAM */ - if( __VECTOR_RAM != VECTOR_TABLE ) - { - for( n = 0; n < 256; n++ ) - __VECTOR_RAM[n] = VECTOR_TABLE[n]; - } - mcf5xxx_wr_vbr( ( uint32 ) __VECTOR_RAM ); - -} - -void -mcf523x_wtm_init( void ) -{ - /* - * Disable Software Watchdog Timer - */ - MCF_WTM_WCR = 0; -} - -void -mcf523x_pll_init( void ) -{ - /* - * Multiply 25Mhz reference crystal to acheive system clock of 150Mhz - */ - - MCF_FMPLL_SYNCR = MCF_FMPLL_SYNCR_MFD( 1 ) | MCF_FMPLL_SYNCR_RFD( 0 ); - - while( !( MCF_FMPLL_SYNSR & MCF_FMPLL_SYNSR_LOCK ) ) - { - }; -} - -void -mcf523x_scm_init( void ) -{ - /* - * Enable on-chip modules to access internal SRAM - */ - MCF_SCM_RAMBAR = ( 0 | MCF_SCM_RAMBAR_BA( SRAM_ADDRESS >> 16 ) | MCF_SCM_RAMBAR_BDE ); -} - -void -mcf523x_gpio_init( void ) -{ - - /* - * When booting from external Flash, the port-size is less than - * the port-size of SDRAM. In this case it is necessary to enable - * Data[15:0] on Port Address/Data. - */ - MCF_GPIO_PAR_AD = ( 0 - | MCF_GPIO_PAR_AD_PAR_ADDR23 - | MCF_GPIO_PAR_AD_PAR_ADDR22 - | MCF_GPIO_PAR_AD_PAR_ADDR21 | MCF_GPIO_PAR_AD_PAR_DATAL ); - - /* - * Initialize PAR to enable SDRAM signals - */ - MCF_GPIO_PAR_SDRAM = 0x3F; - - /* - * Initialize PAR to enable Ethernet signals - */ - MCF_GPIO_PAR_FECI2C = 0xF0; -} - -void -mcf523x_sdram_init( void ) -{ - int i; - - /* - * Check to see if the SDRAM has already been initialized - * by a run control tool - */ - if( !( MCF_SDRAMC_DACR0 & MCF_SDRAMC_DACR0_RE ) ) - { - /* Initialize DRAM Control Register: DCR */ - MCF_SDRAMC_DCR = ( MCF_SDRAMC_DCR_RTIM( 1 ) | - MCF_SDRAMC_DCR_RC( ( 15 * FSYS_2 ) >> 4 ) ); - - /* Initialize DACR0 */ - MCF_SDRAMC_DACR0 = ( MCF_SDRAMC_DACR0_BA( SDRAM_ADDRESS >> 18UL ) | - MCF_SDRAMC_DACR0_CASL( 1 ) | - MCF_SDRAMC_DACR0_CBM( 3 ) | - MCF_SDRAMC_DACR0_PS( 0 ) ); - - /* - * Initialize DMR0 - */ - MCF_SDRAMC_DMR0 = ( 0 | MCF_SDRAMC_DMR_BAM_16M | MCF_SDRAMC_DMR0_V ); - - /* - * Set IP (bit 3) in DACR - */ - MCF_SDRAMC_DACR0 |= MCF_SDRAMC_DACR0_IP; - - /* - * Wait 30ns to allow banks to precharge - */ - for( i = 0; i < 5; i++ ) - { -#ifndef __MWERKS__ - asm( " nop" ); -#else - asm( nop ); -#endif - } - - /* - * Write to this block to initiate precharge - */ - *( uint32 * ) ( SDRAM_ADDRESS ) = 0xA5A59696; - - /* - * Set RE (bit 15) in DACR - */ - MCF_SDRAMC_DACR0 |= MCF_SDRAMC_DACR0_RE; - - /* - * Wait for at least 8 auto refresh cycles to occur - */ - for( i = 0; i < 2000; i++ ) - { -#ifndef __MWERKS__ - asm( " nop" ); -#else - asm( nop ); -#endif - } - - /* - * Finish the configuration by issuing the IMRS. - */ - MCF_SDRAMC_DACR0 |= MCF_SDRAMC_DACR0_MRS; - - /* - * Write to the SDRAM Mode Register - */ - *( uint32 * ) ( SDRAM_ADDRESS + 0x400 ) = 0xA5A59696; - } - -} - - -void -mcf523x_cs_init( void ) -{ - /* - * ChipSelect 0 - External Flash - */ - MCF_CS_CSAR0 = MCF_CS_CSAR_BA( EXT_FLASH_ADDRESS ); - MCF_CS_CSCR0 = ( 0 | MCF_CS_CSCR_IWS( 6 ) | MCF_CS_CSCR_AA | MCF_CS_CSCR_PS_16 ); - MCF_CS_CSMR0 = MCF_CS_CSMR_BAM_2M | MCF_CS_CSMR_V; -} - -void -mcf523x_flexcan_init( void ) -{ - - /* FlexCAN controller 0 disabled (CANMCR0[MDIS]=1) */ - MCF_CAN_IMASK0 = 0; - MCF_CAN_RXGMASK0 = MCF_CAN_RXGMASK_MI( 0x1fffffff ); - MCF_CAN_RX14MASK0 = MCF_CAN_RX14MASK_MI( 0x1fffffff ); - MCF_CAN_RX15MASK0 = MCF_CAN_RX15MASK_MI( 0x1fffffff ); - MCF_CAN_CANCTRL0 = 0; - MCF_CAN_CANMCR0 = - MCF_CAN_CANMCR_MDIS | MCF_CAN_CANMCR_FRZ | MCF_CAN_CANMCR_HALT | - MCF_CAN_CANMCR_SUPV | MCF_CAN_CANMCR_MAXMB( 0xf ); - - /* FlexCAN controller 1 disabled (CANMCR1[MDIS]=1) */ - MCF_CAN_IMASK1 = 0; - MCF_CAN_RXGMASK1 = MCF_CAN_RXGMASK_MI( 0x1fffffff ); - MCF_CAN_RX14MASK1 = MCF_CAN_RX14MASK_MI( 0x1fffffff ); - MCF_CAN_RX15MASK1 = MCF_CAN_RX15MASK_MI( 0x1fffffff ); - MCF_CAN_CANCTRL1 = 0; - MCF_CAN_CANMCR1 = - MCF_CAN_CANMCR_MDIS | MCF_CAN_CANMCR_FRZ | MCF_CAN_CANMCR_HALT | - MCF_CAN_CANMCR_SUPV | MCF_CAN_CANMCR_MAXMB( 0xf ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/interrupts.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/interrupts.c deleted file mode 100644 index 406da809..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/interrupts.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include "m523xbcc.h" - -void -exception_handler( void *framep ) -{ - ( void )framep; -} - -__interrupt__ void -irq_handler( void ) -{ - /* - * This is the catch all interrupt handler for all user defined - * interrupts. To create specific handlers, create a new interrupt - * handler and change vectors.s to point to the new handler. - */ -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/mcf523x_lo.s b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/mcf523x_lo.s deleted file mode 100644 index 0209b4ec..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/mcf523x_lo.s +++ /dev/null @@ -1,353 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** - */ - -#ifdef _UNDERSCORE_ -#define exception_handler _exception_handler -#define mcf523x_init _mcf523x_init -#define _start __start -#endif - - .extern ___IPSBAR - .extern ___SRAM - .extern ___SP_INIT - .extern ___SRAM_SIZE - .extern exception_handler - .extern mcf5xxx_wr_rambar0 - .extern mcf5xxx_wr_rambar1 - .extern mcf523x_init - .extern _start - - .global asm_startmeup - .global _asm_startmeup - .global asm_exception_handler - .global _asm_exception_handler - .global cpu_cache_flush - .global _cpu_cache_flush - .global mcf5xxx_wr_cacr - .global _mcf5xxx_wr_cacr - .global mcf5xxx_wr_vbr - .global _mcf5xxx_wr_vbr - .global asm_set_ipl - .global _asm_set_ipl - .global mcf5xxx_wr_cacr - .global _mcf5xxx_wr_cacr - .global mcf5xxx_wr_acr0 - .global _mcf5xxx_wr_acr0 - .global mcf5xxx_wr_acr1 - .global _mcf5xxx_wr_acr1 - .global mcf5xxx_wr_acr2 - .global _mcf5xxx_wr_acr2 - .global mcf5xxx_wr_acr3 - .global _mcf5xxx_wr_acr3 - .global mcf5xxx_wr_other_sp - .global _mcf5xxx_wr_other_sp - .global mcf5xxx_wr_other_a7 - .global _mcf5xxx_wr_other_a7 - .global mcf5xxx_wr_vbr - .global _mcf5xxx_wr_vbr - .global mcf5xxx_wr_macsr - .global _mcf5xxx_wr_macsr - .global mcf5xxx_wr_mask - .global _mcf5xxx_wr_mask - .global mcf5xxx_wr_acc0 - .global _mcf5xxx_wr_acc0 - .global mcf5xxx_wr_accext01 - .global _mcf5xxx_wr_accext01 - .global mcf5xxx_wr_accext23 - .global _mcf5xxx_wr_accext23 - .global mcf5xxx_wr_acc1 - .global _mcf5xxx_wr_acc1 - .global mcf5xxx_wr_acc2 - .global _mcf5xxx_wr_acc2 - .global mcf5xxx_wr_acc3 - .global _mcf5xxx_wr_acc3 - .global mcf5xxx_wr_sr - .global _mcf5xxx_wr_sr - .global mcf5xxx_wr_rambar0 - .global _mcf5xxx_wr_rambar0 - .global mcf5xxx_wr_rambar1 - .global _mcf5xxx_wr_rambar1 - .global mcf5xxx_wr_mbar - .global _mcf5xxx_wr_mbar - .global mcf5xxx_wr_mbar0 - .global _mcf5xxx_wr_mbar0 - .global mcf5xxx_wr_mbar1 - .global _mcf5xxx_wr_mbar1 - - .text - -/******************************************************************** - * This is the main entry point upon hard reset. - */ -asm_startmeup: -_asm_startmeup: - - move.w #0x2700,sr - - /* Initialize IPSBAR */ - move.l #(___IPSBAR + 1),d0 - move.l d0,0x40000000 - - /* Initialize RAMBAR1: locate SRAM and validate it */ - move.l #(___SRAM + 0x21),d0 - .long 0x4e7b0C05 /* movec d0,RAMBAR1 */ - - /* Point Stack Pointer into SRAM temporarily */ - move.l #(___SRAM + 0x10000),sp - - /* Initialize mcf523x periphs, etc */ - jsr mcf523x_init - - /* Relocate Stack Pointer */ - move.l #___SP_INIT,sp - - /* Jump to the main process */ - jmp _start - - bra . - nop - nop - halt - - -/******************************************************************** -/* - * This routine is the lowest-level exception handler. - */ -asm_exception_handler: -_asm_exception_handler: - - lea -20(sp), sp - movem.l d0-d2/a0-a1, (sp) - pea.l 20(sp) /* push exception frame address */ - jsr exception_handler - movem.l 4(sp), d0-d2/a0-a1 - lea 24(sp), sp - rte - - -/******************************************************************** - * The MCF523x cache can be configured as instruction, data or split. - * Invalidate the entire cache. - */ -cpu_cache_flush: -_cpu_cache_flush: - nop /* sync */ - move.l #0x01000000,d0 /* Invalidate the I-Cache */ - movec d0,cacr - rts - -/********************************************************************/ -/* - * This routines changes the IPL to the value passed into the routine. - * It also returns the old IPL value back. - * Calling convention from C: - * old_ipl = asm_set_ipl(new_ipl); - * For the Diab Data C compiler, it passes return value thru D0. - * Note that only the least significant three bits of the passed - * value are used. - */ - -asm_set_ipl: -_asm_set_ipl: - link a6,#-8 - movem.l d6-d7,(sp) - - move.w sr,d7 /* current sr */ - - move.l d7,d0 /* prepare return value */ - andi.l #0x0700,d0 /* mask out IPL */ - lsr.l #8,d0 /* IPL */ - - move.l 8(a6),d6 /* get argument */ - andi.l #0x07,d6 /* least significant three bits */ - lsl.l #8,d6 /* move over to make mask */ - - andi.l #0x0000F8FF,d7 /* zero out current IPL */ - or.l d6,d7 /* place new IPL in sr */ - move.w d7,sr - - movem.l (sp),d6-d7 - lea 8(sp),sp - unlk a6 - rts - -/********************************************************************/ -/* - * These routines write to the special purpose registers in the ColdFire - * core. Since these registers are write-only in the supervisor model, - * no corresponding read routines exist. - */ - -mcf5xxx_wr_cacr: -_mcf5xxx_wr_cacr: - move.l 4(sp),d0 - .long 0x4e7b0002 /* movec d0,cacr */ - nop - rts - -mcf5xxx_wr_acr0: -_mcf5xxx_wr_acr0: - move.l 4(sp),d0 - .long 0x4e7b0004 /* movec d0,ACR0 */ - nop - rts - -mcf5xxx_wr_acr1: -_mcf5xxx_wr_acr1: - move.l 4(sp),d0 - .long 0x4e7b0005 /* movec d0,ACR1 */ - nop - rts - -mcf5xxx_wr_acr2: -_mcf5xxx_wr_acr2: - move.l 4(sp),d0 - .long 0x4e7b0006 /* movec d0,ACR2 */ - nop - rts - -mcf5xxx_wr_acr3: -_mcf5xxx_wr_acr3: - move.l 4(sp),d0 - .long 0x4e7b0007 /* movec d0,ACR3 */ - nop - rts - -mcf5xxx_wr_other_sp: -_mcf5xxx_wr_other_sp: -mcf5xxx_wr_other_a7: -_mcf5xxx_wr_other_a7: - move.l 4(sp),d0 - .long 0x4e7b0800 /* movec d0,OTHER_A7 */ - nop - rts - -mcf5xxx_wr_vbr: -_mcf5xxx_wr_vbr: - move.l 4(sp),d0 - .long 0x4e7b0801 /* movec d0,VBR */ - nop - rts - -mcf5xxx_wr_macsr: -_mcf5xxx_wr_macsr: - move.l 4(sp),d0 - .long 0x4e7b0804 /* movec d0,MACSR */ - nop - rts - -mcf5xxx_wr_mask: -_mcf5xxx_wr_mask: - move.l 4(sp),d0 - .long 0x4e7b0805 /* movec d0,MASK */ - nop - rts - -mcf5xxx_wr_acc0: -_mcf5xxx_wr_acc0: - move.l 4(sp),d0 - .long 0x4e7b0806 /* movec d0,ACC0 */ - nop - rts - -mcf5xxx_wr_accext01: -_mcf5xxx_wr_accext01: - move.l 4(sp),d0 - .long 0x4e7b0807 /* movec d0,ACCEXT01 */ - nop - rts - -mcf5xxx_wr_accext23: -_mcf5xxx_wr_accext23: - move.l 4(sp),d0 - .long 0x4e7b0808 /* movec d0,ACCEXT23 */ - nop - rts - -mcf5xxx_wr_acc1: -_mcf5xxx_wr_acc1: - move.l 4(sp),d0 - .long 0x4e7b0809 /* movec d0,ACC1 */ - nop - rts - -mcf5xxx_wr_acc2: -_mcf5xxx_wr_acc2: - move.l 4(sp),d0 - .long 0x4e7b080A /* movec d0,ACC2 */ - nop - rts - -mcf5xxx_wr_acc3: -_mcf5xxx_wr_acc3: - move.l 4(sp),d0 - .long 0x4e7b080B /* movec d0,ACC3 */ - nop - rts - -mcf5xxx_wr_sr: -_mcf5xxx_wr_sr: - move.l 4(sp),d0 - move.w d0,SR - rts - -mcf5xxx_wr_rambar0: -_mcf5xxx_wr_rambar0: - move.l 4(sp),d0 - .long 0x4e7b0C04 /* movec d0,RAMBAR0 */ - nop - rts - -mcf5xxx_wr_rambar1: -_mcf5xxx_wr_rambar1: - move.l 4(sp),d0 - .long 0x4e7b0C05 /* movec d0,RAMBAR1 */ - nop - rts - -mcf5xxx_wr_mbar: -_mcf5xxx_wr_mbar: -mcf5xxx_wr_mbar0: -_mcf5xxx_wr_mbar0: - move.l 4(sp),d0 - .long 0x4e7b0C0F /* movec d0,MBAR0 */ - nop - rts - -mcf5xxx_wr_mbar1: -_mcf5xxx_wr_mbar1: - move.l 4(sp),d0 - .long 0x4e7b0C0E /* movec d0,MBAR1 */ - nop - rts - - .end diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/mcf5xxx.s b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/mcf5xxx.s deleted file mode 100644 index 4aef9e00..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/mcf5xxx.s +++ /dev/null @@ -1,35 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** - */ - - - - .end -/********************************************************************/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/vectors.s b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/vectors.s deleted file mode 100644 index 4466ddb7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235CW/system/vectors.s +++ /dev/null @@ -1,311 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - Copyright @ 1995-2005 Freescale Semiconductor, Inc. All rights reserved - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - - .global VECTOR_TABLE - .global _VECTOR_TABLE - .global start - - .extern ___SP_INIT - .extern _asm_startmeup - .extern _asm_exception_handler - .extern _irq_handler - .extern _prvvMBPortSerialISR - .extern _prvvMBPortTimerISR - .text - -#define _irq_handler _asm_exception_handler - -/* - * Exception Vector Table - */ -VECTOR_TABLE: -_VECTOR_TABLE: -INITSP: .long ___SP_INIT /* Initial SP */ -INITPC: .long start /* Initial PC */ -vector02: .long _asm_exception_handler /* Access Error */ -vector03: .long _asm_exception_handler /* Address Error */ -vector04: .long _asm_exception_handler /* Illegal Instruction */ -vector05: .long _asm_exception_handler /* Reserved */ -vector06: .long _asm_exception_handler /* Reserved */ -vector07: .long _asm_exception_handler /* Reserved */ -vector08: .long _asm_exception_handler /* Privilege Violation */ -vector09: .long _asm_exception_handler /* Trace */ -vector0A: .long _asm_exception_handler /* Unimplemented A-Line */ -vector0B: .long _asm_exception_handler /* Unimplemented F-Line */ -vector0C: .long _asm_exception_handler /* Debug Interrupt */ -vector0D: .long _asm_exception_handler /* Reserved */ -vector0E: .long _asm_exception_handler /* Format Error */ -vector0F: .long _asm_exception_handler /* Unitialized Int. */ -vector10: .long _asm_exception_handler /* Reserved */ -vector11: .long _asm_exception_handler /* Reserved */ -vector12: .long _asm_exception_handler /* Reserved */ -vector13: .long _asm_exception_handler /* Reserved */ -vector14: .long _asm_exception_handler /* Reserved */ -vector15: .long _asm_exception_handler /* Reserved */ -vector16: .long _asm_exception_handler /* Reserved */ -vector17: .long _asm_exception_handler /* Reserved */ -vector18: .long _asm_exception_handler /* Spurious Interrupt */ -vector19: .long _irq_handler /* Autovector Level 1 */ -vector1A: .long _irq_handler /* Autovector Level 2 */ -vector1B: .long _irq_handler /* Autovector Level 3 */ -vector1C: .long _irq_handler /* Autovector Level 4 */ -vector1D: .long _irq_handler /* Autovector Level 5 */ -vector1E: .long _irq_handler /* Autovector Level 6 */ -vector1F: .long _irq_handler /* Autovector Level 7 */ -vector20: .long _asm_exception_handler /* TRAP #0 */ -vector21: .long _asm_exception_handler /* TRAP #1 */ -vector22: .long _asm_exception_handler /* TRAP #2 */ -vector23: .long _asm_exception_handler /* TRAP #3 */ -vector24: .long _asm_exception_handler /* TRAP #4 */ -vector25: .long _asm_exception_handler /* TRAP #5 */ -vector26: .long _asm_exception_handler /* TRAP #6 */ -vector27: .long _asm_exception_handler /* TRAP #7 */ -vector28: .long _asm_exception_handler /* TRAP #8 */ -vector29: .long _asm_exception_handler /* TRAP #9 */ -vector2A: .long _asm_exception_handler /* TRAP #10 */ -vector2B: .long _asm_exception_handler /* TRAP #11 */ -vector2C: .long _asm_exception_handler /* TRAP #12 */ -vector2D: .long _asm_exception_handler /* TRAP #13 */ -vector2E: .long _asm_exception_handler /* TRAP #14 */ -vector2F: .long _asm_exception_handler /* TRAP #15 */ -vector30: .long _asm_exception_handler /* Reserved */ -vector31: .long _asm_exception_handler /* Reserved */ -vector32: .long _asm_exception_handler /* Reserved */ -vector33: .long _asm_exception_handler /* Reserved */ -vector34: .long _asm_exception_handler /* Reserved */ -vector35: .long _asm_exception_handler /* Reserved */ -vector36: .long _asm_exception_handler /* Reserved */ -vector37: .long _asm_exception_handler /* Reserved */ -vector38: .long _asm_exception_handler /* Reserved */ -vector39: .long _asm_exception_handler /* Reserved */ -vector3A: .long _asm_exception_handler /* Reserved */ -vector3B: .long _asm_exception_handler /* Reserved */ -vector3C: .long _asm_exception_handler /* Reserved */ -vector3D: .long _asm_exception_handler /* Reserved */ -vector3E: .long _asm_exception_handler /* Reserved */ -vector3F: .long _asm_exception_handler /* Reserved */ -vector40: .long _irq_handler -vector41: .long _irq_handler -vector42: .long _irq_handler -vector43: .long _irq_handler -vector44: .long _irq_handler -vector45: .long _irq_handler -vector46: .long _irq_handler -vector47: .long _irq_handler -vector48: .long _irq_handler -vector49: .long _irq_handler -vector4A: .long _irq_handler -vector4B: .long _irq_handler -vector4C: .long _irq_handler -vector4D: .long _prvvMBPortSerialISR -vector4E: .long _irq_handler -vector4F: .long _irq_handler -vector50: .long _irq_handler -vector51: .long _irq_handler -vector52: .long _irq_handler -vector53: .long _irq_handler -vector54: .long _irq_handler -vector55: .long _irq_handler -vector56: .long _irq_handler -vector57: .long _irq_handler -vector58: .long _irq_handler -vector59: .long _irq_handler -vector5A: .long _irq_handler -vector5B: .long _irq_handler -vector5C: .long _irq_handler -vector5D: .long _irq_handler -vector5E: .long _irq_handler -vector5F: .long _irq_handler -vector60: .long _irq_handler -vector61: .long _irq_handler -vector62: .long _irq_handler -vector63: .long _irq_handler -vector64: .long _irq_handler -vector65: .long _prvvMBPortTimerISR -vector66: .long _irq_handler -vector67: .long _irq_handler -vector68: .long _irq_handler -vector69: .long _irq_handler -vector6A: .long _irq_handler -vector6B: .long _irq_handler -vector6C: .long _irq_handler -vector6D: .long _irq_handler -vector6E: .long _irq_handler -vector6F: .long _irq_handler -vector70: .long _irq_handler -vector71: .long _irq_handler -vector72: .long _irq_handler -vector73: .long _irq_handler -vector74: .long _irq_handler -vector75: .long _irq_handler -vector76: .long _irq_handler -vector77: .long _irq_handler -vector78: .long _irq_handler -vector79: .long _irq_handler -vector7A: .long _irq_handler -vector7B: .long _irq_handler -vector7C: .long _irq_handler -vector7D: .long _irq_handler -vector7E: .long _irq_handler -vector7F: .long _irq_handler -vector80: .long _irq_handler -vector81: .long _irq_handler -vector82: .long _irq_handler -vector83: .long _irq_handler -vector84: .long _irq_handler -vector85: .long _irq_handler -vector86: .long _irq_handler -vector87: .long _irq_handler -vector88: .long _irq_handler -vector89: .long _irq_handler -vector8A: .long _irq_handler -vector8B: .long _irq_handler -vector8C: .long _irq_handler -vector8D: .long _irq_handler -vector8E: .long _irq_handler -vector8F: .long _irq_handler -vector90: .long _irq_handler -vector91: .long _irq_handler -vector92: .long _irq_handler -vector93: .long _irq_handler -vector94: .long _irq_handler -vector95: .long _irq_handler -vector96: .long _irq_handler -vector97: .long _irq_handler -vector98: .long _irq_handler -vector99: .long _irq_handler -vector9A: .long _irq_handler -vector9B: .long _irq_handler -vector9C: .long _irq_handler -vector9D: .long _irq_handler -vector9E: .long _irq_handler -vector9F: .long _irq_handler -vectorA0: .long _irq_handler -vectorA1: .long _irq_handler -vectorA2: .long _irq_handler -vectorA3: .long _irq_handler -vectorA4: .long _irq_handler -vectorA5: .long _irq_handler -vectorA6: .long _irq_handler -vectorA7: .long _irq_handler -vectorA8: .long _irq_handler -vectorA9: .long _irq_handler -vectorAA: .long _irq_handler -vectorAB: .long _irq_handler -vectorAC: .long _irq_handler -vectorAD: .long _irq_handler -vectorAE: .long _irq_handler -vectorAF: .long _irq_handler -vectorB0: .long _irq_handler -vectorB1: .long _irq_handler -vectorB2: .long _irq_handler -vectorB3: .long _irq_handler -vectorB4: .long _irq_handler -vectorB5: .long _irq_handler -vectorB6: .long _irq_handler -vectorB7: .long _irq_handler -vectorB8: .long _irq_handler -vectorB9: .long _irq_handler -vectorBA: .long _irq_handler -vectorBB: .long _irq_handler -vectorBC: .long _irq_handler -vectorBD: .long _irq_handler -vectorBE: .long _irq_handler -vectorBF: .long _irq_handler -vectorC0: .long _irq_handler -vectorC1: .long _irq_handler -vectorC2: .long _irq_handler -vectorC3: .long _irq_handler -vectorC4: .long _irq_handler -vectorC5: .long _irq_handler -vectorC6: .long _irq_handler -vectorC7: .long _irq_handler -vectorC8: .long _irq_handler -vectorC9: .long _irq_handler -vectorCA: .long _irq_handler -vectorCB: .long _irq_handler -vectorCC: .long _irq_handler -vectorCD: .long _irq_handler -vectorCE: .long _irq_handler -vectorCF: .long _irq_handler -vectorD0: .long _irq_handler -vectorD1: .long _irq_handler -vectorD2: .long _irq_handler -vectorD3: .long _irq_handler -vectorD4: .long _irq_handler -vectorD5: .long _irq_handler -vectorD6: .long _irq_handler -vectorD7: .long _irq_handler -vectorD8: .long _irq_handler -vectorD9: .long _irq_handler -vectorDA: .long _irq_handler -vectorDB: .long _irq_handler -vectorDC: .long _irq_handler -vectorDD: .long _irq_handler -vectorDE: .long _irq_handler -vectorDF: .long _irq_handler -vectorE0: .long _irq_handler -vectorE1: .long _irq_handler -vectorE2: .long _irq_handler -vectorE3: .long _irq_handler -vectorE4: .long _irq_handler -vectorE5: .long _irq_handler -vectorE6: .long _irq_handler -vectorE7: .long _irq_handler -vectorE8: .long _irq_handler -vectorE9: .long _irq_handler -vectorEA: .long _irq_handler -vectorEB: .long _irq_handler -vectorEC: .long _irq_handler -vectorED: .long _irq_handler -vectorEE: .long _irq_handler -vectorEF: .long _irq_handler -vectorF0: .long _irq_handler -vectorF1: .long _irq_handler -vectorF2: .long _irq_handler -vectorF3: .long _irq_handler -vectorF4: .long _irq_handler -vectorF5: .long _irq_handler -vectorF6: .long _irq_handler -vectorF7: .long _irq_handler -vectorF8: .long _irq_handler -vectorF9: .long _irq_handler -vectorFA: .long _irq_handler -vectorFB: .long _irq_handler -vectorFC: .long _irq_handler -vectorFD: .long _irq_handler -vectorFE: .long _irq_handler -vectorFF: .long _irq_handler - -start: - move.w #0x2700,sr - jmp _asm_startmeup - .end diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/FreeRTOSConfig.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/FreeRTOSConfig.h deleted file mode 100644 index 77552aef..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/FreeRTOSConfig.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry. - MCF5235 Port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - *----------------------------------------------------------*/ - -#define configUSE_PREEMPTION 1 -#define configUSE_IDLE_HOOK 0 -#define configUSE_TICK_HOOK 0 -#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 25000000 ) -#define configTICK_RATE_HZ ( ( portTickType ) 1000 ) -#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 128 ) -#define configMAX_TASK_NAME_LEN ( 16 ) -#define configUSE_TRACE_FACILITY 1 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 - -/* Co-routine definitions. */ -#define configUSE_CO_ROUTINES 0 -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) - -/* Set the following definitions to 1 to include the API function, or zero -to exclude the API function. */ - -#define INCLUDE_vTaskPrioritySet 1 -#define INCLUDE_uxTaskPriorityGet 1 -#define INCLUDE_vTaskDelete 1 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 1 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 -#define INCLUDE_xTaskGetCurrentTaskHandle 1 - -#endif /* FREERTOS_CONFIG_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/Makefile b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/Makefile deleted file mode 100644 index 6ed8f15b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/Makefile +++ /dev/null @@ -1,99 +0,0 @@ -# -# FreeModbus MCF5235 port- Makefile -# -# Copyright (c) 2006 Christian Walter, Vienna 2006. -# -# $Id: Makefile,v 1.1 2006/08/30 23:18:06 wolti Exp $ -# -# --------------------------------------------------------------------------- - -BASE = /opt/gcc-m68k/bin -CC = $(BASE)/m68k-elf-gcc -CXX = $(BASE)/m68k-elf-g++ -OBJCOPY = $(BASE)/m68k-elf-objcopy -SIZE = $(BASE)/m68k-elf-size -INSIGHT = $(BASE)/m68k-bdm-elf-insight -BDMFLASH = $(BASE)/bdmflash - -#CFLAGS = -MD -O2 -m528x -Wall -MB_INC = -Iport -I../../modbus/tcp -I../../modbus/include -RTOS_INC = -Ifreertos/include -I../Common/include -LWIP_INC = -Ilwip/src/include -Ilwip/src/include/ipv4 \ - -Ilwip/src/include -Ilwip/src/include/ipv4 \ - -Ilwip/contrib/port/FreeRTOS/MCF5235 \ - -Ilwip/contrib/port/FreeRTOS/MCF5235/netif -CFLAGS = -MD -gdwarf-2 -g3 -m528x -Wall \ - -D'GCC_MCF5235=1' -D'_GCC_USES_FP=1' \ - -D'__IPSBAR=((vuint8 *) 0x40000000)' -D'FSYS_2=25000000UL' -CFLAGS += -I. -Iinclude -Iinclude/arch $(RTOS_INC) $(MB_INC) $(LWIP_INC) - -ASFLAGS = -MD -gdwarf-2 -g3 -m528x -Wa,--register-prefix-optional \ - -Wa,--bitwise-or -Wa,--defsym,IPSBAR=0x40000000 -LDSCRIPT = m5235-ram.ld -LDFLAGS = -nostartfiles -m528x -Wl,--script=$(LDSCRIPT) - -TGT = demo -OTHER_CSRC = -OTHER_ASRC = $(addprefix system/, crt0.S vector.S) -MB_SRC = $(addprefix ../../modbus/, mb.c tcp/mbtcp.c functions/mbfunccoils.c functions/mbfuncdiag.c functions/mbfuncholding.c functions/mbfuncinput.c functions/mbfuncother.c functions/mbfuncdisc.c functions/mbutils.c) \ - $(addprefix port/, porttcp.c portevent.c portother.c ) - -CSRC = demo.c $(MB_SRC) \ - $(addprefix system/, init.c newlib.c serial.c) \ - $(addprefix freertos/, tasks.c queue.c list.c) \ - $(addprefix freertos/portable/MemMang/, heap_3.c) \ - $(addprefix freertos/portable/GCC/MCF5235/, port.c) \ - $(addprefix lwip/src/core/, tcp_out.c inet.c mem.c memp.c netif.c pbuf.c raw.c stats.c sys.c tcp.c tcp_in.c udp.c ipv4/ip.c ipv4/ip_addr.c ipv4/icmp.c ipv4/ip_frag.c) \ - $(addprefix lwip/src/api/, tcpip.c api_msg.c err.c api_lib.c ) \ - $(addprefix lwip/src/netif/, etharp.c ) \ - $(addprefix lwip/contrib/port/FreeRTOS/MCF5235/, sys_arch.c netif/fec.c netif/nbuf.c) - -ASRC = $(addprefix system/, mcf5xxx.S ) -OBJS = $(CSRC:.c=.o) $(ASRC:.S=.o) -NOLINK_OBJS = $(OTHER_CSRC:.c=.o) $(OTHER_ASRC:.S=.o) -DEPS = $(OBJS:.o=.d) $(NOLINK_OBJS:.o=.d) -BIN = $(TGT).elf - -.PHONY: clean all - -all: $(BIN) - -flash-programm: $(TGT).elf - $(OBJCOPY) -O binary $(TGT).elf $(TGT).bin - @BIN_SIZE=`du -b $(TGT).bin | awk '//{ print $$1; }'`; \ - echo "programming $(TGT).bin with size $$BIN_SIZE to flash..."; \ - $(BDMFLASH) /dev/bdmcf20 0x00000000 1 2 write $(TGT).bin 0 - -flash-verify: - @BIN_SIZE=`du -b $(TGT).bin | awk '//{ print $$1; }'`; \ - echo "loading $$BIN_SIZE bytes from target into $(TGT).vrf..."; \ - $(BDMFLASH) /dev/bdmcf20 0x00000000 1 2 read $(TGT).vrf 0 $$BIN_SIZE - -flash-erase: - $(BDMFLASH) /dev/bdmcf20 0x00000000 1 2 erase - -debug: - $(INSIGHT) --command=m5235.gdb --se=$(TGT).elf - -$(BIN): $(OBJS) $(NOLINK_OBJS) - $(CC) $(LDFLAGS) -Wl,-Map=$(TGT).map $(OBJS) $(LDLIBS) -o $@ - -clean: - rm -f $(DEPS) - rm -f $(OBJS) $(NOLINK_OBJS) - rm -f $(BIN) $(TGT).map - -# --------------------------------------------------------------------------- -# rules for code generation -# --------------------------------------------------------------------------- -%.o: %.c - $(CC) $(CFLAGS) -o $@ -c $< - -%.o: %.S - $(CC) $(ASFLAGS) -o $@ -c $< - -# --------------------------------------------------------------------------- -# # compiler generated dependencies -# --------------------------------------------------------------------------- --include $(DEPS) - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/README.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/README.txt deleted file mode 100644 index 243c7e34..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/README.txt +++ /dev/null @@ -1,60 +0,0 @@ - - FreeModbus Coldfire MC523x PORT with lwIP - -REQUIREMENTS -============ - -The FreeModbus/lwIP port requires are port of the lwIP TCP/IP stack for -the target platform. This port includes a suitable Ethernet driver for -lwIP as well as a FreeRTOS port. -The FreeModbus part itself does NOT depend on FreeRTOS or the Coldfire -ethernet controller and can therefore be used for creating other ports. - -The development environment used is based on the GNU C Compiler for -a m68k-elf target as well as the insight debugger with some patches for -the BDM interface[1]. GDB startup and linker scripts are supplied with -the demo for the M5235BCC evaluation kit from Freescale. - - [1] ... BDM tools: http://sourceforge.net/projects/bdm/ - -USAGE -===== - -A makefile is supplied with the demo application and a binary can be -produced by calling 'make all'. A special target 'debug' is provided -which executes the insight debugger. At the insight debugger prompt -one should select the appropriate target interface (either BDM/Direct -or BDM/TCP) and should download the application to the development -board. It is important that the GDB script setup-and-load is executed -prior to downloading to initialize the SDRAM. After downloading one -should call the GDB function 'execute' and the PC is set to the start -of the executable. Execution can be started by typing 'continue' at -the Insight console interface. -In addition it is possible to download the software to the flash. This can -be done by calling 'make flash-erase' and 'make flash-programm'. - -By default the port using the following settings: - - IP Address : 10.0.10.2 - Netmask : 255.255.255.0 - Gateway : 10.0.10.1 - Modbus TCP Port : 502 - -COMMON PROBLEMS -=============== - -Most of the problems have their origin in the startup scripts. The -following list should serve as a checklist where each point must be -satisfied for the port to work. - - - The FreeRTOS port only works correctly in the supervisor mode. There- - fore the Coldfire CPU must run in the supervisor mode. - - - portVECTOR_TABLE does not point to the currently active vector table. - Please also note that the vector table must be in RAM such that the - FreeRTOS port can install a traphandler for the portYIELD() call. - -$Id: README.txt,v 1.1 2006/08/30 23:18:06 wolti Exp $ - -MCF5235 + lwIP port - Copyright (c) 2006 Christian Walter. - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/demo.c deleted file mode 100644 index d182c279..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/demo.c +++ /dev/null @@ -1,205 +0,0 @@ -/* ------------------------ System includes ------------------------------- */ -#include -#include -#include -#include - -/* ------------------------ FreeRTOS includes ----------------------------- */ -#include "FreeRTOS.h" -#include "task.h" - -/* ------------------------ LWIP includes --------------------------------- */ -#include "lwip/api.h" -#include "lwip/tcpip.h" -#include "lwip/memp.h" - -/* ------------------------ FreeModbus includes --------------------------- */ -#include "mb.h" - -/* ------------------------ Project includes ------------------------------ */ -#include "mcf5xxx.h" -#include "mcf523x.h" -#include "netif/fec.h" - -#include "serial.h" - -/* ------------------------ Defines --------------------------------------- */ -#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 38400 ) - -#define mainMB_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 ) -#define PROG "FreeModbus" -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 -#define REG_HOLDING_START 2000 -#define REG_HOLDING_NREGS 130 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; -static USHORT usRegHoldingStart = REG_HOLDING_START; -static USHORT usRegHoldingBuf[REG_HOLDING_NREGS]; - -xComPortHandle xSTDComPort = NULL; - -/* ------------------------ Static functions ------------------------------ */ -static void vlwIPInit( void ); -static void vMBServerTask( void *arg ); - -/* ------------------------ Implementation -------------------------------- */ -int -main( int argc, char *argv[] ) -{ - asm volatile ( "move.w #0x2000, %sr\n\t" ); - - /* Initialize serial communication device. */ - xSTDComPort = xSerialPortInitMinimal( 38400, 8 ); - - /* Initialize lwIP protocol stack. */ - vlwIPInit( ); - - if( sys_thread_new( vMBServerTask, NULL, mainMB_TASK_PRIORITY ) == NULL ) - { - fprintf( stderr, "%s: can't create modbus task!\r\n", PROG ); - } - else - { - /* Now all the tasks have been started - start the scheduler. */ - vTaskStartScheduler( ); - } - - /* Should never get here! */ - return 0; -} - -void -vlwIPInit( void ) -{ - /* Initialize lwIP and its interface layer. */ - sys_init( ); - mem_init( ); - memp_init( ); - pbuf_init( ); - netif_init( ); - ip_init( ); - tcpip_init( NULL, NULL ); -} - -void -vMBServerTask( void *arg ) -{ - eMBErrorCode xStatus; - struct ip_addr xIpAddr, xNetMast, xGateway; - struct netif xFEC523x; - - IP4_ADDR( &xIpAddr, 10, 0, 10, 2 ); - IP4_ADDR( &xNetMast, 255, 255, 255, 0 ); - IP4_ADDR( &xGateway, 10, 0, 10, 1 ); - netif_add( &xFEC523x, &xIpAddr, &xNetMast, &xGateway, NULL, mcf523xfec_init, tcpip_input ); - /* Make it the default interface */ - netif_set_default( &xFEC523x ); - /* Bring it up */ - netif_set_up( &xFEC523x ); - - - for( ;; ) - { - if( eMBTCPInit( MB_TCP_PORT_USE_DEFAULT ) != MB_ENOERR ) - { - fprintf( stderr, "%s: can't initialize modbus stack!\r\n", PROG ); - } - else if( eMBEnable( ) != MB_ENOERR ) - { - fprintf( stderr, "%s: can't enable modbus stack!\r\n", PROG ); - } - else - { - do - { - xStatus = eMBPoll( ); - } - while( xStatus == MB_ENOERR ); - } - /* An error occured. Maybe we can restart. */ - ( void )eMBDisable( ); - ( void )eMBClose( ); - } -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_HOLDING_START ) && - ( usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegHoldingStart ); - switch ( eMode ) - { - /* Pass current register values to the protocol stack. */ - case MB_REG_READ: - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( UCHAR ) ( usRegHoldingBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( UCHAR ) ( usRegHoldingBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - break; - - /* Update current register values with new values from the - * protocol stack. */ - case MB_REG_WRITE: - while( usNRegs > 0 ) - { - usRegHoldingBuf[iRegIndex] = *pucRegBuffer++ << 8; - usRegHoldingBuf[iRegIndex] |= *pucRegBuffer++; - iRegIndex++; - usNRegs--; - } - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/demo.vpj b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/demo.vpj deleted file mode 100644 index 34b25537..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/demo.vpj +++ /dev/null @@ -1,329 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/croutine.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/croutine.c deleted file mode 100644 index a0b30455..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/croutine.c +++ /dev/null @@ -1,342 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/* Lists for ready and blocked co-routines. --------------------*/ -static xList pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ -static xList xDelayedCoRoutineList1; /*< Delayed co-routines. */ -static xList xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ -static xList * pxDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used. */ -static xList * pxOverflowDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ -static xList xPendingReadyList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ - -/* Other file private variables. --------------------------------*/ -corCRCB * pxCurrentCoRoutine = NULL; -static unsigned portBASE_TYPE uxTopCoRoutineReadyPriority = 0; -static portTickType xCoRoutineTickCount = 0; - -/* The initial state of the co-routine when it is created. */ -#define corINITIAL_STATE ( 0 ) - -/* - * Place the co-routine represented by pxCRCB into the appropriate ready queue - * for the priority. It is inserted at the end of the list. - * - * This macro accesses the co-routine ready lists and therefore must not be - * used from within an ISR. - */ -#define prvAddCoRoutineToReadyQueue( pxCRCB ) \ -{ \ - if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \ - { \ - uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \ -} - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first co-routine. - */ -static void prvInitialiseCoRoutineLists( void ); - -/* - * Co-routines that are readied by an interrupt cannot be placed directly into - * the ready lists (there is no mutual exclusion). Instead they are placed in - * in the pending ready list in order that they can later be moved to the ready - * list by the co-routine scheduler. - */ -static inline void prvCheckPendingReadyList( void ); - -/* - * Macro that looks at the list of co-routines that are currently delayed to - * see if any require waking. - * - * Co-routines are stored in the queue in the order of their wake time - - * meaning once one co-routine has been found whose timer has not expired - * we need not look any further down the list. - */ -static inline void prvCheckDelayedList( void ); - -/*-----------------------------------------------------------*/ - -portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex ) -{ -portBASE_TYPE xReturn; -corCRCB *pxCoRoutine; - - /* Allocate the memory that will store the co-routine control block. */ - pxCoRoutine = ( corCRCB * ) pvPortMalloc( sizeof( corCRCB ) ); - if( pxCoRoutine ) - { - /* If pxCurrentCoRoutine is NULL then this is the first co-routine to - be created and the co-routine data structures need initialising. */ - if( pxCurrentCoRoutine == NULL ) - { - pxCurrentCoRoutine = pxCoRoutine; - prvInitialiseCoRoutineLists(); - } - - /* Check the priority is within limits. */ - if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES ) - { - uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1; - } - - /* Fill out the co-routine control block from the function parameters. */ - pxCoRoutine->uxState = corINITIAL_STATE; - pxCoRoutine->uxPriority = uxPriority; - pxCoRoutine->uxIndex = uxIndex; - pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; - - /* Initialise all the other co-routine control block parameters. */ - vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) ); - vListInitialiseItem( &( pxCoRoutine->xEventListItem ) ); - - /* Set the co-routine control block as a link back from the xListItem. - This is so we can get back to the containing CRCB from a generic item - in a list. */ - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine ); - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - - /* Now the co-routine has been initialised it can be added to the ready - list at the correct priority. */ - prvAddCoRoutineToReadyQueue( pxCoRoutine ); - - xReturn = pdPASS; - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList ) -{ -portTickType xTimeToWake; - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xCoRoutineTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xCoRoutineTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - - if( pxEventList ) - { - /* Also add the co-routine to an event list. If this is done then the - function must be called with interrupts disabled. */ - vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -static inline void prvCheckPendingReadyList( void ) -{ - /* Are there any co-routines waiting to get moved to the ready list? These - are co-routines that have been readied by an ISR. The ISR cannot access - the ready lists itself. */ - while( !listLIST_IS_EMPTY( &xPendingReadyList ) ) - { - corCRCB *pxUnblockedCRCB; - - /* The pending ready list can be accessed by an ISR. */ - portDISABLE_INTERRUPTS(); - { - pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyList) ); - vListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - } - portENABLE_INTERRUPTS(); - - vListRemove( &( pxUnblockedCRCB->xGenericListItem ) ); - prvAddCoRoutineToReadyQueue( pxUnblockedCRCB ); - } -} -/*-----------------------------------------------------------*/ - -static inline void prvCheckDelayedList( void ) -{ -static portTickType xLastTickCount, xPassedTicks; -corCRCB *pxCRCB; - - xPassedTicks = xTaskGetTickCount() - xLastTickCount; - while( xPassedTicks ) - { - xCoRoutineTickCount++; - xPassedTicks--; - - /* If the tick count has overflowed we need to swap the ready lists. */ - if( xCoRoutineTickCount == 0 ) - { - xList * pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. If there are - any items in pxDelayedCoRoutineList here then there is an error! */ - pxTemp = pxDelayedCoRoutineList; - pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; - pxOverflowDelayedCoRoutineList = pxTemp; - } - - /* See if this tick has made a timeout expire. */ - while( ( pxCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList ) ) != NULL ) - { - if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) ) - { - /* Timeout not yet expired. */ - break; - } - - portDISABLE_INTERRUPTS(); - { - /* The event could have occurred just before this critical - section. If this is the case then the generic list item will - have been moved to the pending ready list and the following - line is still valid. Also the pvContainer parameter will have - been set to NULL so the following lines are also valid. */ - vListRemove( &( pxCRCB->xGenericListItem ) ); - - /* Is the co-routine waiting on an event also? */ - if( pxCRCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxCRCB->xEventListItem ) ); - } - } - portENABLE_INTERRUPTS(); - - prvAddCoRoutineToReadyQueue( pxCRCB ); - } - } - - xLastTickCount = xCoRoutineTickCount; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineSchedule( void ) -{ - /* See if any co-routines readied by events need moving to the ready lists. */ - prvCheckPendingReadyList(); - - /* See if any delayed co-routines have timed out. */ - prvCheckDelayedList(); - - /* Find the highest priority queue that contains ready co-routines. */ - while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) ) - { - if( uxTopCoRoutineReadyPriority == 0 ) - { - /* No more co-routines to check. */ - return; - } - --uxTopCoRoutineReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines - of the same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ); - - /* Call the co-routine. */ - ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex ); - - return; -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseCoRoutineLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyCoRoutineLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedCoRoutineList1 ); - vListInitialise( ( xList * ) &xDelayedCoRoutineList2 ); - vListInitialise( ( xList * ) &xPendingReadyList ); - - /* Start with pxDelayedCoRoutineList using list1 and the - pxOverflowDelayedCoRoutineList using list2. */ - pxDelayedCoRoutineList = &xDelayedCoRoutineList1; - pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; -} -/*-----------------------------------------------------------*/ - -portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList ) -{ -corCRCB *pxUnblockedCRCB; -portBASE_TYPE xReturn; - - /* This function is called from within an interrupt. It can only access - event lists and the pending ready list. */ - pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedCRCB->xEventListItem ) ); - - if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority ) - { - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/FreeRTOS.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/FreeRTOS.h deleted file mode 100644 index f3a59d8c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/FreeRTOS.h +++ /dev/null @@ -1,111 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef INC_FREERTOS_H -#define INC_FREERTOS_H - - -/* - * Include the generic headers required for the FreeRTOS port being used. - */ -#include - -/* Basic FreeRTOS definitions. */ -#include "projdefs.h" - -/* Application specific configuration options. */ -#include "FreeRTOSConfig.h" - -/* Definitions specific to the port being used. */ -#include "portable.h" - - - - - - - -/* - * Check all the required application specific macros have been defined. - * These macros are application specific and (as downloaded) are defined - * within FreeRTOSConfig.h. - */ - -#ifndef configUSE_PREEMPTION - #error Missing definition: configUSE_PREEMPTION should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_IDLE_HOOK - #error Missing definition: configUSE_IDLE_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_TICK_HOOK - #error Missing definition: configUSE_TICK_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_CO_ROUTINES - #error Missing definition: configUSE_CO_ROUTINES should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskPrioritySet - #error Missing definition: INCLUDE_vTaskPrioritySet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_uxTaskPriorityGet - #error Missing definition: INCLUDE_uxTaskPriorityGet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelete - #error Missing definition: INCLUDE_vTaskDelete should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskCleanUpResources - #error Missing definition: INCLUDE_vTaskCleanUpResources should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskSuspend - #error Missing definition: INCLUDE_vTaskSuspend should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelayUntil - #error Missing definition: INCLUDE_vTaskDelayUntil should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelay - #error Missing definition: INCLUDE_vTaskDelay should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_16_BIT_TICKS - #error Missing definition: configUSE_16_BIT_TICKS should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/croutine.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/croutine.h deleted file mode 100644 index df28d06b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/croutine.h +++ /dev/null @@ -1,713 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ -#ifndef CO_ROUTINE_H -#define CO_ROUTINE_H - -#include "list.h" - -/* Used to hide the implementation of the co-routine control block. The -control block structure however has to be included in the header due to -the macro implementation of the co-routine functionality. */ -typedef void * xCoRoutineHandle; - -/* Defines the prototype to which co-routine functions must conform. */ -typedef void (*crCOROUTINE_CODE)( xCoRoutineHandle, unsigned portBASE_TYPE ); - -typedef struct corCoRoutineControlBlock -{ - crCOROUTINE_CODE pxCoRoutineFunction; - xListItem xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the CRCB in event lists. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ - unsigned portBASE_TYPE uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ - unsigned portSHORT uxState; /*< Used internally by the co-routine implementation. */ -} corCRCB; /* Co-routine control block. Note must be identical in size down to uxPriority with tskTCB. */ - -/** - * croutine. h - *

- portBASE_TYPE xCoRoutineCreate(

-                                 crCOROUTINE_CODE pxCoRoutineCode,

-                                 unsigned portBASE_TYPE uxPriority,

-                                 unsigned portBASE_TYPE uxIndex

-                               );
- * - * Create a new co-routine and add it to the list of co-routines that are - * ready to run. - * - * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine - * functions require special syntax - see the co-routine section of the WEB - * documentation for more information. - * - * @param uxPriority The priority with respect to other co-routines at which - * the co-routine will run. - * - * @param uxIndex Used to distinguish between different co-routines that - * execute the same function. See the example below and the co-routine section - * of the WEB documentation for further information. - * - * @return pdPASS if the co-routine was successfully created and added to a ready - * list, otherwise an error code defined with ProjDefs.h. - * - * Example usage: - 

- // Co-routine to be created.

- void vFlashCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- // This may not be necessary for const variables.

- static const char cLedToFlash[ 2 ] = { 5, 6 };

- static const portTickType xTimeToDelay[ 2 ] = { 200, 400 };

-

-     // Must start every co-routine with a call to crSTART();

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-         // This co-routine just delays for a fixed period, then toggles

-         // an LED.  Two co-routines are created using this function, so

-         // the uxIndex parameter is used to tell the co-routine which

-         // LED to flash and how long to delay.  This assumes xQueue has

-         // already been created.

-         vParTestToggleLED( cLedToFlash[ uxIndex ] );

-         crDELAY( xHandle, uxFlashRates[ uxIndex ] );

-     }

-

-     // Must end every co-routine with a call to crEND();

-     crEND();

- }

-

- // Function that creates two co-routines.

- void vOtherFunction( void )

- {

- unsigned char ucParameterToPass;

- xTaskHandle xHandle;

-		

-     // Create two co-routines at priority 0.  The first is given index 0

-     // so (from the code above) toggles LED 5 every 200 ticks.  The second

-     // is given index 1 so toggles LED 6 every 400 ticks.

-     for( uxIndex = 0; uxIndex < 2; uxIndex++ )

-     {

-         xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );

-     }  

- }

-
- * \defgroup xCoRoutineCreate xCoRoutineCreate - * \ingroup Tasks - */ -portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex ); - - -/** - * croutine. h - *

- void vCoRoutineSchedule( void );
- * - * Run a co-routine. - * - * vCoRoutineSchedule() executes the highest priority co-routine that is able - * to run. The co-routine will execute until it either blocks, yields or is - * preempted by a task. Co-routines execute cooperatively so one - * co-routine cannot be preempted by another, but can be preempted by a task. - * - * If an application comprises of both tasks and co-routines then - * vCoRoutineSchedule should be called from the idle task (in an idle task - * hook). - * - * Example usage: - 

- // This idle task hook will schedule a co-routine each time it is called.

- // The rest of the idle task will execute between co-routine calls.

- void vApplicationIdleHook( void )

- {

-	vCoRoutineSchedule();

- }

-

- // Alternatively, if you do not require any other part of the idle task to 

- // execute, the idle task hook can call vCoRoutineScheduler() within an

- // infinite loop.

- void vApplicationIdleHook( void )

- {

-    for( ;; )

-    {

-        vCoRoutineSchedule();

-    }

- }

-
- * \defgroup vCoRoutineSchedule vCoRoutineSchedule - * \ingroup Tasks - */ -void vCoRoutineSchedule( void ); - -/** - * croutine. h - * 

- crSTART( xCoRoutineHandle xHandle );
- * - * This macro MUST always be called at the start of a co-routine function. - * - * Example usage: - 

- // Co-routine to be created.

- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- static portLONG ulAVariable;

-

-     // Must start every co-routine with a call to crSTART();

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-          // Co-routine functionality goes here.

-     }

-

-     // Must end every co-routine with a call to crEND();

-     crEND();

- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crSTART( pxCRCB ) switch( ( ( corCRCB * )pxCRCB )->uxState ) { case 0: - -/** - * croutine. h - * 

- crEND();
- * - * This macro MUST always be called at the end of a co-routine function. - * - * Example usage: - 

- // Co-routine to be created.

- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- static portLONG ulAVariable;

-

-     // Must start every co-routine with a call to crSTART();

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-          // Co-routine functionality goes here.

-     }

-

-     // Must end every co-routine with a call to crEND();

-     crEND();

- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crEND() } - -/* - * These macros are intended for internal use by the co-routine implementation - * only. The macros should not be used directly by application writers. - */ -#define crSET_STATE0( xHandle ) ( ( corCRCB * )xHandle)->uxState = (__LINE__ * 2); return; case (__LINE__ * 2): -#define crSET_STATE1( xHandle ) ( ( corCRCB * )xHandle)->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1): - -/** - * croutine. h - *

- crDELAY( xCoRoutineHandle xHandle, portTickType xTicksToDelay );
- * - * Delay a co-routine for a fixed period of time. - * - * crDELAY can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * @param xHandle The handle of the co-routine to delay. This is the xHandle - * parameter of the co-routine function. - * - * @param xTickToDelay The number of ticks that the co-routine should delay - * for. The actual amount of time this equates to is defined by - * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_RATE_MS - * can be used to convert ticks to milliseconds. - * - * Example usage: - 

- // Co-routine to be created.

- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- // This may not be necessary for const variables.

- // We are to delay for 200ms.

- static const xTickType xDelayTime = 200 / portTICK_RATE_MS;

-

-     // Must start every co-routine with a call to crSTART();

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-        // Delay for 200ms.

-        crDELAY( xHandle, xDelayTime );

-

-        // Do something here.

-     }

-

-     // Must end every co-routine with a call to crEND();

-     crEND();

- }
- * \defgroup crDELAY crDELAY - * \ingroup Tasks - */ -#define crDELAY( xHandle, xTicksToDelay ) \ - if( xTicksToDelay > 0 ) \ - { \ - vCoRoutineAddToDelayedList( xTicksToDelay, NULL ); \ - } \ - crSET_STATE0( xHandle ); - -/** - * 

- crQUEUE_SEND( 

-                  xCoRoutineHandle xHandle, 

-                  xQueueHandle pxQueue, 

-                  void *pvItemToQueue, 

-                  portTickType xTicksToWait, 

-                  portBASE_TYPE *pxResult 

-             )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_SEND can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue on which the data will be posted. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvItemToQueue A pointer to the data being posted onto the queue. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied from pvItemToQueue into the queue - * itself. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for space to become available on the queue, should space not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_RATE_MS can be used to convert ticks to milliseconds (see example - * below). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully posted onto the queue, otherwise it will be set to an - * error defined within ProjDefs.h. - * - * Example usage: - 

- // Co-routine function that blocks for a fixed period then posts a number onto

- // a queue.

- static void prvCoRoutineFlashTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- static portBASE_TYPE xNumberToPost = 0;

- static portBASE_TYPE xResult;

-

-    // Co-routines must begin with a call to crSTART().

-    crSTART( xHandle );

-

-    for( ;; )

-    {

-        // This assumes the queue has already been created.

-        crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );

-

-        if( xResult != pdPASS )

-        {

-            // The message was not posted!

-        }

-

-        // Increment the number to be posted onto the queue.

-        xNumberToPost++;

- 

-        // Delay for 100 ticks.

-        crDELAY( xHandle, 100 );

-    }

-

-    // Co-routines must end with a call to crEND().

-    crEND();

- }
- * \defgroup crQUEUE_SEND crQUEUE_SEND - * \ingroup Tasks - */ -#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ -{ \ - *pxResult = xQueueCRSend( pxQueue, pvItemToQueue, xTicksToWait ); \ - if( *pxResult == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( xHandle ); \ - *pxResult = xQueueCRSend( pxQueue, pvItemToQueue, 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( xHandle ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 

-  crQUEUE_RECEIVE( 

-                     xCoRoutineHandle xHandle, 

-                     xQueueHandle pxQueue, 

-                     void *pvBuffer, 

-                     portTickType xTicksToWait, 

-                     portBASE_TYPE *pxResult 

-                 )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_RECEIVE can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue from which the data will be received. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvBuffer The buffer into which the received item is to be copied. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied into pvBuffer. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for data to become available from the queue, should data not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_RATE_MS can be used to convert ticks to milliseconds (see the - * crQUEUE_SEND example). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully retrieved from the queue, otherwise it will be set to - * an error code as defined within ProjDefs.h. - * - * Example usage: - 

- // A co-routine receives the number of an LED to flash from a queue.  It 

- // blocks on the queue until the number is received.

- static void prvCoRoutineFlashWorkTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- static portBASE_TYPE xResult;

- static unsigned portBASE_TYPE uxLEDToFlash;

-

-    // All co-routines must start with a call to crSTART().

-    crSTART( xHandle );

-

-    for( ;; )

-    {

-        // Wait for data to become available on the queue.

-        crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );

-

-        if( xResult == pdPASS )

-        {

-            // We received the LED to flash - flash it!

-            vParTestToggleLED( uxLEDToFlash );

-        }

-    }

-

-    crEND();

- }
- * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ -{ \ - *pxResult = xQueueCRReceive( pxQueue, pvBuffer, xTicksToWait ); \ - if( *pxResult == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( xHandle ); \ - *pxResult = xQueueCRReceive( pxQueue, pvBuffer, 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( xHandle ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 

-  crQUEUE_SEND_FROM_ISR( 

-                            xQueueHandle pxQueue, 

-                            void *pvItemToQueue, 

-                            portBASE_TYPE xCoRoutinePreviouslyWoken

-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue - * that is being used from within a co-routine. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. - * - * @return pdTRUE if a co-routine was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 

- // A co-routine that blocks on a queue waiting for characters to be received.

- static void vReceivingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- portCHAR cRxedChar;

- portBASE_TYPE xResult;

-

-     // All co-routines must start with a call to crSTART().

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-         // Wait for data to become available on the queue.  This assumes the

-         // queue xCommsRxQueue has already been created!

-         crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );

-    

-         // Was a character received?

-         if( xResult == pdPASS )

-         {

-             // Process the character here.

-         }

-     }

-

-     // All co-routines must end with a call to crEND().

-     crEND();

- }

-

- // An ISR that uses a queue to send characters received on a serial port to

- // a co-routine.

- void vUART_ISR( void )

- {

- portCHAR cRxedChar;

- portBASE_TYPE xCRWokenByPost = pdFALSE;

-

-     // We loop around reading characters until there are none left in the UART.

-     while( UART_RX_REG_NOT_EMPTY() )

-     {

-         // Obtain the character from the UART.

-         cRxedChar = UART_RX_REG;

-        

-         // Post the character onto a queue.  xCRWokenByPost will be pdFALSE 

-         // the first time around the loop.  If the post causes a co-routine

-         // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.

-         // In this manner we can ensure that if more than one co-routine is

-         // blocked on the queue only one is woken by this ISR no matter how

-         // many characters are posted to the queue.

-         xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );

-     }

- }
- * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) - - -/** - * croutine. h - * 

-  crQUEUE_SEND_FROM_ISR( 

-                            xQueueHandle pxQueue, 

-                            void *pvBuffer, 

-                            portBASE_TYPE * pxCoRoutineWoken

-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data - * from a queue that is being used from within a co-routine (a co-routine - * posted to the queue). - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvBuffer A pointer to a buffer into which the received item will be - * placed. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from the queue into - * pvBuffer. - * - * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become - * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a - * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise - * *pxCoRoutineWoken will remain unchanged. - * - * @return pdTRUE an item was successfully received from the queue, otherwise - * pdFALSE. - * - * Example usage: - 

- // A co-routine that posts a character to a queue then blocks for a fixed 

- // period.  The character is incremented each time.

- static void vSendingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // cChar holds its value while this co-routine is blocked and must therefore

- // be declared static.

- static portCHAR cCharToTx = 'a';

- portBASE_TYPE xResult;

-

-     // All co-routines must start with a call to crSTART().

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-         // Send the next character to the queue.

-         crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );

-    

-         if( xResult == pdPASS )

-         {

-             // The character was successfully posted to the queue.

-         }

-		 else

-		 {

-			// Could not post the character to the queue.

-		 }

-

-         // Enable the UART Tx interrupt to cause an interrupt in this

-		 // hypothetical UART.  The interrupt will obtain the character

-		 // from the queue and send it.

-		 ENABLE_RX_INTERRUPT();

-

-		 // Increment to the next character then block for a fixed period. 

-		 // cCharToTx will maintain its value across the delay as it is

-		 // declared static.

-		 cCharToTx++;

-		 if( cCharToTx > 'x' )

-		 {

-			cCharToTx = 'a';

-		 }

-		 crDELAY( 100 );

-     }

-

-     // All co-routines must end with a call to crEND().

-     crEND();

- }

-

- // An ISR that uses a queue to receive characters to send on a UART.

- void vUART_ISR( void )

- {

- portCHAR cCharToTx;

- portBASE_TYPE xCRWokenByPost = pdFALSE;

-

-     while( UART_TX_REG_EMPTY() )

-     {

-         // Are there any characters in the queue waiting to be sent?

-		 // xCRWokenByPost will automatically be set to pdTRUE if a co-routine

-		 // is woken by the post - ensuring that only a single co-routine is

-		 // woken no matter how many times we go around this loop.

-         if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )

-		 {

-			 SEND_CHARACTER( cCharToTx );

-		 }

-     }

- }
- * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( pxQueue, pvBuffer, pxCoRoutineWoken ) - -/* - * This function is intended for internal use by the co-routine macros only. - * The macro nature of the co-routine implementation requires that the - * prototype appears here. The function should not be used by application - * writers. - * - * Removes the current co-routine from its ready list and places it in the - * appropriate delayed list. - */ -void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList ); - -/* - * This function is intended for internal use by the queue implementation only. - * The function should not be used by application writers. - * - * Removes the highest priority co-routine from the event list and places it in - * the pending ready list. - */ -portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList ); - - -#endif /* CO_ROUTINE_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/list.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/list.h deleted file mode 100644 index ffa920c4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/list.h +++ /dev/null @@ -1,270 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - * This is the list implementation used by the scheduler. While it is tailored - * heavily for the schedulers needs, it is also available for use by - * application code. - * - * xLists can only store pointers to xListItems. Each xListItem contains a - * numeric value (xItemValue). Most of the time the lists are sorted in - * descending item value order. - * - * Lists are created already containing one list item. The value of this - * item is the maximum possible that can be stored, it is therefore always at - * the end of the list and acts as a marker. The list member pxHead always - * points to this marker - even though it is at the tail of the list. This - * is because the tail contains a wrap back pointer to the true head of - * the list. - * - * In addition to it's value, each list item contains a pointer to the next - * item in the list (pxNext), a pointer to the list it is in (pxContainer) - * and a pointer to back to the object that contains it. These later two - * pointers are included for efficiency of list manipulation. There is - * effectively a two way link between the object containing the list item and - * the list item itself. - * - * - * \page ListIntroduction List Implementation - * \ingroup FreeRTOSIntro - */ - - -#ifndef LIST_H -#define LIST_H - -/* - * Definition of the only type of object that a list can contain. - */ -struct xLIST_ITEM -{ - portTickType xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ - volatile struct xLIST_ITEM * pxNext; /*< Pointer to the next xListItem in the list. */ - volatile struct xLIST_ITEM * pxPrevious;/*< Pointer to the previous xListItem in the list. */ - void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ - void * pvContainer; /*< Pointer to the list in which this list item is placed (if any). */ -}; -typedef struct xLIST_ITEM xListItem; /* For some reason lint wants this as two separate definitions. */ - -struct xMINI_LIST_ITEM -{ - portTickType xItemValue; - volatile struct xLIST_ITEM *pxNext; - volatile struct xLIST_ITEM *pxPrevious; -}; -typedef struct xMINI_LIST_ITEM xMiniListItem; - -/* - * Definition of the type of queue used by the scheduler. - */ -typedef struct xLIST -{ - volatile unsigned portBASE_TYPE uxNumberOfItems; - volatile xListItem * pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to pvListGetOwnerOfNextEntry (). */ - volatile xMiniListItem xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ -} xList; - -/* - * Access macro to set the owner of a list item. The owner of a list item - * is the object (usually a TCB) that contains the list item. - * - * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( pxListItem )->pvOwner = ( void * ) pxOwner - -/* - * Access macro to set the value of the list item. In most cases the value is - * used to sort the list in descending order. - * - * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( pxListItem )->xItemValue = xValue - -/* - * Access macro the retrieve the value of the list item. The value can - * represent anything - for example a the priority of a task, or the time at - * which a task should be unblocked. - * - * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) - -/* - * Access macro to determine if a list contains any items. The macro will - * only have the value true if the list is empty. - * - * \page listLIST_IS_EMPTY listLIST_IS_EMPTY - * \ingroup LinkedList - */ -#define listLIST_IS_EMPTY( pxList ) ( ( pxList )->uxNumberOfItems == ( unsigned portBASE_TYPE ) 0 ) - -/* - * Access macro to return the number of items in the list. - */ -#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) - -/* - * Access function to obtain the owner of the next entry in a list. - * - * The list member pxIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list - * and returns that entries pxOwner parameter. Using multiple calls to this - * function it is therefore possible to move through every item contained in - * a list. - * - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the next item owner is to be returned. - * - * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ - /* Increment the index to the next item and return the item, ensuring */ \ - /* we don't return the marker used at the end of the list. */ \ - ( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \ - if( ( pxList )->pxIndex == ( xListItem * ) &( ( pxList )->xListEnd ) ) \ - { \ - ( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \ - } \ - pxTCB = ( pxList )->pxIndex->pvOwner - - -/* - * Access function to obtain the owner of the first entry in a list. Lists - * are normally sorted in ascending item value order. - * - * This function returns the pxOwner member of the first item in the list. - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the owner of the head item is to be - * returned. - * - * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( ( pxList->uxNumberOfItems != ( unsigned portBASE_TYPE ) 0 ) ? ( (&( pxList->xListEnd ))->pxNext->pvOwner ) : ( NULL ) ) - -/* - * Check to see if a list item is within a list. The list item maintains a - * "container" pointer that points to the list it is in. All this macro does - * is check to see if the container and the list match. - * - * @param pxList The list we want to know if the list item is within. - * @param pxListItem The list item we want to know if is in the list. - * @return pdTRUE is the list item is in the list, otherwise pdFALSE. - * pointer against - */ -#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( pxListItem )->pvContainer == ( void * ) pxList ) - -/* - * Must be called before a list is used! This initialises all the members - * of the list structure and inserts the xListEnd item into the list as a - * marker to the back of the list. - * - * @param pxList Pointer to the list being initialised. - * - * \page vListInitialise vListInitialise - * \ingroup LinkedList - */ -void vListInitialise( xList *pxList ); - -/* - * Must be called before a list item is used. This sets the list container to - * null so the item does not think that it is already contained in a list. - * - * @param pxItem Pointer to the list item being initialised. - * - * \page vListInitialiseItem vListInitialiseItem - * \ingroup LinkedList - */ -void vListInitialiseItem( xListItem *pxItem ); - -/* - * Insert a list item into a list. The item will be inserted into the list in - * a position determined by its item value (descending item value order). - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The item to that is to be placed in the list. - * - * \page vListInsert vListInsert - * \ingroup LinkedList - */ -void vListInsert( xList *pxList, xListItem *pxNewListItem ); - -/* - * Insert a list item into a list. The item will be inserted in a position - * such that it will be the last item within the list returned by multiple - * calls to listGET_OWNER_OF_NEXT_ENTRY. - * - * The list member pvIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pvIndex to the next item in the list. - * Placing an item in a list using vListInsertEnd effectively places the item - * in the list position pointed to by pvIndex. This means that every other - * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before - * the pvIndex parameter again points to the item being inserted. - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The list item to be inserted into the list. - * - * \page vListInsertEnd vListInsertEnd - * \ingroup LinkedList - */ -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ); - -/* - * Remove an item from a list. The list item has a pointer to the list that - * it is in, so only the list item need be passed into the function. - * - * @param vListRemove The item to be removed. The item will remove itself from - * the list pointed to by it's pxContainer parameter. - * - * \page vListRemove vListRemove - * \ingroup LinkedList - */ -void vListRemove( xListItem *pxItemToRemove ); - - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/portable.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/portable.h deleted file mode 100644 index 0b40be40..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/portable.h +++ /dev/null @@ -1,192 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http:www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http:www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/*----------------------------------------------------------- - * Portable layer API. Each function must be defined for each port. - *----------------------------------------------------------*/ - -#ifndef PORTABLE_H -#define PORTABLE_H - -/* Include the macro file relevant to the port being used. */ - -#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT - #include "..\..\source\portable\owatcom\16bitdos\pc\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT - #include "..\..\source\portable\owatcom\16bitdos\flsh186\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef GCC_MEGA_AVR - #include "../portable/GCC/ATMega323/portmacro.h" -#endif - -#ifdef IAR_MEGA_AVR - #include "../portable/IAR/ATMega323/portmacro.h" -#endif - -#ifdef MPLAB_PIC18F_PORT - #include "..\..\source\portable\MPLAB\PIC18F\portmacro.h" -#endif - -#ifdef _FEDPICC - #include "libFreeRTOS/Include/portmacro.h" -#endif - -#ifdef SDCC_CYGNAL - #include "../../Source/portable/SDCC/Cygnal/portmacro.h" -#endif - -#ifdef GCC_ARM7 - #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" -#endif - -#ifdef GCC_MSP430 - #include "../../Source/portable/GCC/MSP430F449/portmacro.h" -#endif - -#ifdef ROWLEY_MSP430 - #include "../../Source/portable/Rowley/MSP430F449/portmacro.h" -#endif - -#ifdef KEIL_ARM7 - #include "..\..\Source\portable\Keil\ARM7\portmacro.h" -#endif - -#ifdef SAM7_GCC - #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" -#endif - -#ifdef SAM7_IAR - #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" -#endif - -#ifdef LPC2000_IAR - #include "..\..\Source\portable\IAR\LPC2000\portmacro.h" -#endif - -#ifdef STR71X_IAR - #include "..\..\Source\portable\IAR\STR71x\portmacro.h" -#endif - -#ifdef STR91X_IAR - #include "..\..\Source\portable\IAR\STR91x\portmacro.h" -#endif - -#ifdef GCC_H8S - #include "../../Source/portable/GCC/H8S2329/portmacro.h" -#endif - -#ifdef GCC_AT91FR40008 - #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" -#endif - -#ifdef RVDS_ARMCM3_LM3S102 - #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h" -#endif - -#ifdef GCC_ARMCM3_LM3S102 - #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" -#endif - -#ifdef IAR_ARMCM3_LM - #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" -#endif - -#ifdef HCS12_CODE_WARRIOR - #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" -#endif - -#ifdef MICROBLAZE_GCC - #include "../../Source/portable/GCC/MicroBlaze/portmacro.h" -#endif - -#ifdef TERN_EE - #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h" -#endif - -#ifdef GCC_HCS12 - #include "../../Source/portable/GCC/HCS12/portmacro.h" -#endif - -#ifdef GCC_MCF5235 - #include "../portable/GCC/MCF5235/portmacro.h" -#endif - -#ifdef BCC_INDUSTRIAL_PC_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\PC\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef BCC_FLASH_LITE_186_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif -/* - * Setup the stack of a new task so it is ready to be placed under the - * scheduler control. The registers have to be placed on the stack in - * the order that the port expects to find them. - */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ); - -/* - * Map to the memory management routines required for the port. - */ -void *pvPortMalloc( size_t xSize ); -void vPortFree( void *pv ); -void vPortInitialiseBlocks( void ); - -/* - * Setup the hardware ready for the scheduler to take control. This generally - * sets up a tick interrupt and sets timers for the correct tick frequency. - */ -portBASE_TYPE xPortStartScheduler( void ); - -/* - * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so - * the hardware is left in its original condition after the scheduler stops - * executing. - */ -void vPortEndScheduler( void ); - - -#endif /* PORTABLE_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/projdefs.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/projdefs.h deleted file mode 100644 index 85f27879..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/projdefs.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef PROJDEFS_H -#define PROJDEFS_H - -/* Defines to prototype to which task functions must conform. */ -typedef void (*pdTASK_CODE)( void * ); - -#define pdTRUE ( 1 ) -#define pdFALSE ( 0 ) - -#define pdPASS ( 1 ) -#define pdFAIL ( 0 ) - -/* Error definitions. */ -#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) -#define errNO_TASK_TO_RUN ( -2 ) -#define errQUEUE_FULL ( -3 ) -#define errQUEUE_BLOCKED ( -4 ) -#define errQUEUE_YIELD ( -5 ) - -#endif - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/queue.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/queue.h deleted file mode 100644 index c78e25a8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/queue.h +++ /dev/null @@ -1,471 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef QUEUE_H -#define QUEUE_H - -typedef void * xQueueHandle; - -/** - * queue. h - * 

- xQueueHandle xQueueCreate( 

-                              unsigned portBASE_TYPE uxQueueLength, 

-                              unsigned portBASE_TYPE uxItemSize 

-                          );

- *
- * - * Creates a new queue instance. This allocates the storage required by the - * new queue and returns a handle for the queue. - * - * @param uxQueueLength The maximum number of items that the queue can contain. - * - * @param uxItemSize The number of bytes each item in the queue will require. - * Items are queued by copy, not by reference, so this is the number of bytes - * that will be copied for each posted item. Each item on the queue must be - * the same size. - * - * @return If the queue is successfully create then a handle to the newly - * created queue is returned. If the queue cannot be created then 0 is - * returned. - * - * Example usage: - 

- struct AMessage

- {

-    portCHAR ucMessageID;

-    portCHAR ucData[ 20 ];

- };

-

- void vATask( void *pvParameters )

- {

- xQueueHandle xQueue1, xQueue2;

-

-    // Create a queue capable of containing 10 unsigned long values.

-    xQueue1 = xQueueCreate( 10, sizeof( unsigned portLONG ) );

-    if( xQueue1 == 0 )

-    {

-        // Queue was not created and must not be used.

-    }

-

-    // Create a queue capable of containing 10 pointers to AMessage structures.

-    // These should be passed by pointer as they contain a lot of data.

-    xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );

-    if( xQueue2 == 0 )

-    {

-        // Queue was not created and must not be used.

-    }

-

-    // ... Rest of task code.

- }

-
- * \defgroup xQueueCreate xQueueCreate - * \ingroup QueueManagement - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); - -/** - * queue. h - * 

- portBASE_TYPE xQueueSend( 

-                             xQueueHandle xQueue, 

-                             const void * pvItemToQueue, 

-                             portTickType xTicksToWait 

-                         );

- *
- * - * Post an item on a queue. The item is queued by copy, not by reference. - * This function must not be called from an interrupt service routine. - * See xQueueSendFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0. The - * time is defined in tick periods so the constant portTICK_RATE_MS - * should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 

- struct AMessage

- {

-    portCHAR ucMessageID;

-    portCHAR ucData[ 20 ];

- } xMessage;

-

- unsigned portLONG ulVar = 10UL;

-

- void vATask( void *pvParameters )

- {

- xQueueHandle xQueue1, xQueue2;

- struct AMessage *pxMessage;

-

-    // Create a queue capable of containing 10 unsigned long values.

-    xQueue1 = xQueueCreate( 10, sizeof( unsigned portLONG ) );

-

-    // Create a queue capable of containing 10 pointers to AMessage structures.

-    // These should be passed by pointer as they contain a lot of data.

-    xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );

-

-    // ...

-

-    if( xQueue1 != 0 )

-    {

-        // Send an unsigned long.  Wait for 10 ticks for space to become 

-        // available if necessary.

-        if( xQueueSend( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )

-        {

-            // Failed to post the message, even after 10 ticks.

-        }

-    }

-

-    if( xQueue2 != 0 )

-    {

-        // Send a pointer to a struct AMessage object.  Don't block if the

-        // queue is already full.

-        pxMessage = & xMessage;

-        xQueueSend( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );

-    }

-

-	// ... Rest of task code.

- }

-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueSend( xQueueHandle xQueue, const void * pvItemToQueue, portTickType xTicksToWait ); - -/** - * queue. h - * 

- portBASE_TYPE xQueueReceive( 

-                                xQueueHandle xQueue, 

-                                void *pvBuffer, 

-                                portTickType xTicksToWait 

-                            );
- * - * Receive an item from a queue. The item is received by copy so a buffer of - * adequate size must be provided. The number of bytes copied into the buffer - * was defined when the queue was created. - * - * This function must not be used in an interrupt service routine. See - * xQueueReceiveFromISR for an alternative that can. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. The time is defined in tick periods so the constant - * portTICK_RATE_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 

- struct AMessage

- {

-    portCHAR ucMessageID;

-    portCHAR ucData[ 20 ];

- } xMessage;

-

- xQueueHandle xQueue;

- 

- // Task to create a queue and post a value.

- void vATask( void *pvParameters )

- {

- struct AMessage *pxMessage;

-

-    // Create a queue capable of containing 10 pointers to AMessage structures.

-    // These should be passed by pointer as they contain a lot of data.

-    xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );

-    if( xQueue == 0 )

-    {

-        // Failed to create the queue.

-    }

-

-    // ...

-

-    // Send a pointer to a struct AMessage object.  Don't block if the

-    // queue is already full.

-    pxMessage = & xMessage;

-    xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );

-

-	// ... Rest of task code.

- }

-

- // Task to receive from the queue.

- void vADifferentTask( void *pvParameters )

- {

- struct AMessage *pxRxedMessage;

-

-    if( xQueue != 0 )

-    {

-        // Receive a message on the created queue.  Block for 10 ticks if a

-        // message is not immediately available.

-        if( xQueueReceive( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )

-        {

-            // pcRxedMessage now points to the struct AMessage variable posted

-            // by vATask.

-        }

-    }

-

-	// ... Rest of task code.

- }

-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceive( xQueueHandle xQueue, void *pvBuffer, portTickType xTicksToWait ); - -/** - * queue. h - * 
unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue );
- * - * Return the number of messages stored in a queue. - * - * @param xQueue A handle to the queue being queried. - * - * @return The number of messages available in the queue. - * - * \page uxQueueMessagesWaiting uxQueueMessagesWaiting - * \ingroup QueueManagement - */ -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue ); - -/** - * queue. h - * 
void vQueueDelete( xQueueHandle xQueue );
- * - * Delete a queue - freeing all the memory allocated for storing of items - * placed on the queue. - * - * @param xQueue A handle to the queue to be deleted. - * - * \page vQueueDelete vQueueDelete - * \ingroup QueueManagement - */ -void vQueueDelete( xQueueHandle xQueue ); - -/** - * queue. h - * 

- portBASE_TYPE xQueueSendFromISR( 

-                                    xQueueHandle pxQueue, 

-                                    const void *pvItemToQueue, 

-                                    portBASE_TYPE xTaskPreviouslyWoken 

-                                );

-
- * - * Post an item on a queue. It is safe to use this function from within an - * interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param cTaskPreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. See the file serial .c in the - * PC port for a good example of this mechanism. - * - * @return pdTRUE if a task was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 

- void vBufferISR( void )

- {

- portCHAR cIn;

- portBASE_TYPE xTaskWokenByPost;

-

-    // We have not woken a task at the start of the ISR.

-    cTaskWokenByPost = pdFALSE;

-

-    // Loop until the buffer is empty.

-    do

-    {

-        // Obtain a byte from the buffer.

-        cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );						

-

-        // Post the byte.  The first time round the loop cTaskWokenByPost

-        // will be pdFALSE.  If the queue send causes a task to wake we do

-        // not want the task to run until we have finished the ISR, so

-        // xQueueSendFromISR does not cause a context switch.  Also we 

-        // don't want subsequent posts to wake any other tasks, so we store

-        // the return value back into cTaskWokenByPost so xQueueSendFromISR

-        // knows not to wake any task the next iteration of the loop.

-        xTaskWokenByPost = xQueueSendFromISR( xRxQueue, &cIn, cTaskWokenByPost );

-

-    } while( portINPUT_BYTE( BUFFER_COUNT ) );

-

-    // Now the buffer is empty we can switch context if necessary.

-    if( cTaskWokenByPost )

-    {

-        taskYIELD ();

-    }

- }

-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ); - -/** - * queue. h - * 

- portBASE_TYPE xQueueReceiveFromISR( 

-                                       xQueueHandle pxQueue, 

-                                       void *pvBuffer, 

-                                       portBASE_TYPE *pxTaskWoken 

-                                   ); 

- *
- * - * Receive an item from a queue. It is safe to use this function from within an - * interrupt service routine. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param pxTaskWoken A task may be blocked waiting for space to become - * available on the queue. If xQueueReceiveFromISR causes such a task to - * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will - * remain unchanged. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 

- 

- xQueueHandle xQueue;

- 

- // Function to create a queue and post some values.

- void vAFunction( void *pvParameters )

- {

- portCHAR cValueToPost;

- const portTickType xBlockTime = ( portTickType )0xff;

-

-    // Create a queue capable of containing 10 characters.

-    xQueue = xQueueCreate( 10, sizeof( portCHAR ) );

-    if( xQueue == 0 )

-    {

-        // Failed to create the queue.

-    }

-

-    // ...

-

-    // Post some characters that will be used within an ISR.  If the queue

-    // is full then this task will block for xBlockTime ticks.

-    cValueToPost = 'a';

-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );

-    cValueToPost = 'b';

-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );

-

-    // ... keep posting characters ... this task may block when the queue

-    // becomes full.

-

-    cValueToPost = 'c';

-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );

- }

-

- // ISR that outputs all the characters received on the queue. 

- void vISR_Routine( void )

- {

- portBASE_TYPE xTaskWokenByReceive = pdFALSE;

- portCHAR cRxedChar;

-

-    while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )

-    {

-        // A character was received.  Output the character now.

-        vOutputCharacter( cRxedChar );

-

-        // If removing the character from the queue woke the task that was 

-        // posting onto the queue cTaskWokenByReceive will have been set to

-        // pdTRUE.  No matter how many times this loop iterates only one

-        // task will be woken.

-    }

-

-    if( cTaskWokenByPost != ( portCHAR ) pdFALSE;

-    {

-        taskYIELD ();

-    }

- }

-
- * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - - -/* - * The functions defined above are for passing data to and from tasks. The - * functions below are the equivalents for passing data to and from - * co-rtoutines. - * - * These functions are called from the co-routine macro implementation and - * should not be called directly from application code. Instead use the macro - * wrappers defined within croutine.h. - */ -signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ); -signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); -signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ); -signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/semphr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/semphr.h deleted file mode 100644 index 4b9020b9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/semphr.h +++ /dev/null @@ -1,289 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include "queue.h" - -#ifndef SEMAPHORE_H -#define SEMAPHORE_H - -typedef xQueueHandle xSemaphoreHandle; - -#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( unsigned portCHAR ) 1 ) -#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( unsigned portCHAR ) 0 ) -#define semGIVE_BLOCK_TIME ( ( portTickType ) 0 ) - - -/** - * semphr. h - * 
vSemaphoreCreateBinary( xSemaphoreHandle xSemaphore )
- * - * Macro that implements a semaphore by using the existing queue mechanism. - * The queue length is 1 as this is a binary semaphore. The data size is 0 - * as we don't want to actually store any data - we just want to know if the - * queue is empty or full. - * - * @param xSemaphore Handle to the created semaphore. Should be of type xSemaphoreHandle. - * - * Example usage: - 

- xSemaphoreHandle xSemaphore;

-

- void vATask( void * pvParameters )

- {

-    // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().

-    // This is a macro so pass the variable in directly.

-    vSemaphoreCreateBinary( xSemaphore );

-

-    if( xSemaphore != NULL )

-    {

-        // The semaphore was created successfully.

-        // The semaphore can now be used.  

-    }

- }

-
- * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary - * \ingroup Semaphores - */ -#define vSemaphoreCreateBinary( xSemaphore ) { \ - xSemaphore = xQueueCreate( ( unsigned portCHAR ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH ); \ - if( xSemaphore != NULL ) \ - { \ - xSemaphoreGive( xSemaphore ); \ - } \ - } - -/** - * semphr. h - * xSemaphoreTake( - * xSemaphoreHandle xSemaphore, - * portTickType xBlockTime - * ) - * - * Macro to obtain a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (). - * - * @param xSemaphore A handle to the semaphore being obtained. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @param xBlockTime The time in ticks to wait for the semaphore to become - * available. The macro portTICK_RATE_MS can be used to convert this to a - * real time. A block time of zero can be used to poll the semaphore. - * - * @return pdTRUE if the semaphore was obtained. pdFALSE if xBlockTime - * expired without the semaphore becoming available. - * - * Example usage: - 

- xSemaphoreHandle xSemaphore = NULL;

-

- // A task that creates a semaphore.

- void vATask( void * pvParameters )

- {

-    // Create the semaphore to guard a shared resource.

-    vSemaphoreCreateBinary( xSemaphore );

- }

-

- // A task that uses the semaphore.

- void vAnotherTask( void * pvParameters )

- {

-    // ... Do other things.

-

-    if( xSemaphore != NULL )

-    {

-        // See if we can obtain the semaphore.  If the semaphore is not available

-        // wait 10 ticks to see if it becomes free.	

-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 10 ) == pdTRUE )

-        {

-            // We were able to obtain the semaphore and can now access the

-            // shared resource.

-

-            // ...

-

-            // We have finished accessing the shared resource.  Release the 

-            // semaphore.

-            xSemaphoreGive( xSemaphore );

-        }

-        else

-        {

-            // We could not obtain the semaphore and can therefore not access

-            // the shared resource safely.

-        }

-    }

- }

-
- * \defgroup xSemaphoreTake xSemaphoreTake - * \ingroup Semaphores - */ -#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueReceive( ( xQueueHandle ) xSemaphore, NULL, xBlockTime ) - -/** - * semphr. h - * 
xSemaphoreGive( xSemaphoreHandle xSemaphore )
- * - * Macro to release a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (), and obtained using sSemaphoreTake (). - * - * This must not be used from an ISR. See xSemaphoreGiveFromISR () for - * an alternative which can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @return pdTRUE if the semaphore was released. pdFALSE if an error occurred. - * Semaphores are implemented using queues. An error can occur if there is - * no space on the queue to post a message - indicating that the - * semaphore was not first obtained correctly. - * - * Example usage: - 

- xSemaphoreHandle xSemaphore = NULL;

-

- void vATask( void * pvParameters )

- {

-    // Create the semaphore to guard a shared resource.

-    vSemaphoreCreateBinary( xSemaphore );

-

-    if( xSemaphore != NULL )

-    {

-        if( xSemaphoreGive( xSemaphore ) != pdTRUE )

-        {

-            // We would expect this call to fail because we cannot give

-            // a semaphore without first "taking" it!

-        }

-

-        // Obtain the semaphore - don't block if the semaphore is not

-        // immediately available.

-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 0 ) )

-        {

-            // We now have the semaphore and can access the shared resource.

-

-            // ...

-

-            // We have finished accessing the shared resource so can free the

-            // semaphore.

-            if( xSemaphoreGive( xSemaphore ) != pdTRUE )

-            {

-                // We would not expect this call to fail because we must have

-                // obtained the semaphore to get here.

-            }

-        }

-    }

- }

-
- * \defgroup xSemaphoreGive xSemaphoreGive - * \ingroup Semaphores - */ -#define xSemaphoreGive( xSemaphore ) xQueueSend( ( xQueueHandle ) xSemaphore, NULL, semGIVE_BLOCK_TIME ) - -/** - * semphr. h - * 

- xSemaphoreGiveFromISR( 

-                          xSemaphoreHandle xSemaphore, 

-                          portSHORT sTaskPreviouslyWoken 

-                      )
- * - * Macro to release a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (), and obtained using xSemaphoreTake (). - * - * This macro can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @param sTaskPreviouslyWoken This is included so an ISR can make multiple calls - * to xSemaphoreGiveFromISR () from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. See the file serial .c in the - * PC port for a good example of using xSemaphoreGiveFromISR (). - * - * @return pdTRUE if a task was woken by releasing the semaphore. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 

- #define LONG_TIME 0xffff

- #define TICKS_TO_WAIT	10

- xSemaphoreHandle xSemaphore = NULL;

-

- // Repetitive task.

- void vATask( void * pvParameters )

- {

-    for( ;; )

-    {

-        // We want this task to run every 10 ticks or a timer.  The semaphore 

-        // was created before this task was started

-

-        // Block waiting for the semaphore to become available.

-        if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )

-        {

-            // It is time to execute.

-

-            // ...

-

-            // We have finished our task.  Return to the top of the loop where

-            // we will block on the semaphore until it is time to execute 

-            // again.

-        }

-    }

- }

-

- // Timer ISR

- void vTimerISR( void * pvParameters )

- {

- static unsigned portCHAR ucLocalTickCount = 0;

-

-    // A timer tick has occurred.

-

-    // ... Do other time functions.

-

-    // Is it time for vATask () to run?

-    ucLocalTickCount++;

-    if( ucLocalTickCount >= TICKS_TO_WAIT )

-    {

-        // Unblock the task by releasing the semaphore.

-        xSemaphoreGive( xSemaphore );

-

-        // Reset the count so we release the semaphore again in 10 ticks time.

-        ucLocalTickCount = 0;

-    }

- }

-
- * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR - * \ingroup Semaphores - */ -#define xSemaphoreGiveFromISR( xSemaphore, xTaskPreviouslyWoken ) xQueueSendFromISR( ( xQueueHandle ) xSemaphore, NULL, xTaskPreviouslyWoken ) - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/serial.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/serial.h deleted file mode 100644 index 674ce1c5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/serial.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef SERIAL_COMMS_H -#define SERIAL_COMMS_H - -typedef void * xComPortHandle; - -typedef enum -{ - serCOM1, - serCOM2, - serCOM3, - serCOM4, - serCOM5, - serCOM6, - serCOM7, - serCOM8 -} eCOMPort; - -typedef enum -{ - serNO_PARITY, - serODD_PARITY, - serEVEN_PARITY, - serMARK_PARITY, - serSPACE_PARITY -} eParity; - -typedef enum -{ - serSTOP_1, - serSTOP_2 -} eStopBits; - -typedef enum -{ - serBITS_5, - serBITS_6, - serBITS_7, - serBITS_8 -} eDataBits; - -typedef enum -{ - ser50, - ser75, - ser110, - ser134, - ser150, - ser200, - ser300, - ser600, - ser1200, - ser1800, - ser2400, - ser4800, - ser9600, - ser19200, - ser38400, - ser57600, - ser115200 -} eBaud; - -xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength ); -xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength ); -void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength ); -signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime ); -signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime ); -portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort ); -void vSerialClose( xComPortHandle xPort ); - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/task.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/task.h deleted file mode 100644 index 4872d73a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/include/task.h +++ /dev/null @@ -1,926 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef TASK_H -#define TASK_H - -#include "portable.h" -#include "list.h" - -/*----------------------------------------------------------- - * MACROS AND DEFINITIONS - *----------------------------------------------------------*/ - -#define tskKERNEL_VERSION_NUMBER "V4.0.5" - -/** - * task. h - * - * Type by which tasks are referenced. For example, a call to xTaskCreate - * returns (via a pointer parameter) an xTaskHandle variable that can then - * be used as a parameter to vTaskDelete to delete the task. - * - * \page xTaskHandle xTaskHandle - * \ingroup Tasks - */ -typedef void * xTaskHandle; - -/* - * Defines the priority used by the idle task. This must not be modified. - * - * \ingroup TaskUtils - */ -#define tskIDLE_PRIORITY ( ( unsigned portBASE_TYPE ) 0 ) - -/** - * task. h - * - * Macro for forcing a context switch. - * - * \page taskYIELD taskYIELD - * \ingroup SchedulerControl - */ -#define taskYIELD() portYIELD() - -/** - * task. h - * - * Macro to mark the start of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskENTER_CRITICAL taskENTER_CRITICAL - * \ingroup SchedulerControl - */ -#define taskENTER_CRITICAL() portENTER_CRITICAL() - -/** - * task. h - * - * Macro to mark the end of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskEXIT_CRITICAL taskEXIT_CRITICAL - * \ingroup SchedulerControl - */ -#define taskEXIT_CRITICAL() portEXIT_CRITICAL() - -/** - * task. h - * - * Macro to disable all maskable interrupts. - * - * \page taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS() - -/** - * task. h - * - * Macro to enable microcontroller interrupts. - * - * \page taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS() - - -/*----------------------------------------------------------- - * TASK CREATION API - *----------------------------------------------------------*/ - -/** - * task. h - *

- portBASE_TYPE xTaskCreate(

-                              pdTASK_CODE pvTaskCode,

-                              const portCHAR * const pcName,

-                              unsigned portSHORT usStackDepth,

-                              void *pvParameters,

-                              unsigned portBASE_TYPE uxPriority,

-                              xTaskHandle *pvCreatedTask

-                          );
- * - * Create a new task and add it to the list of tasks that are ready to run. - * - * @param pvTaskCode Pointer to the task entry function. Tasks - * must be implemented to never return (i.e. continuous loop). - * - * @param pcName A descriptive name for the task. This is mainly used to - * facilitate debugging. Max length defined by tskMAX_TASK_NAME_LEN - default - * is 16. - * - * @param usStackDepth The size of the task stack specified as the number of - * variables the stack can hold - not the number of bytes. For example, if - * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes - * will be allocated for stack storage. - * - * @param pvParameters Pointer that will be used as the parameter for the task - * being created. - * - * @param uxPriority The priority at which the task should run. - * - * @param pvCreatedTask Used to pass back a handle by which the created task - * can be referenced. - * - * @return pdPASS if the task was successfully created and added to a ready - * list, otherwise an error code defined in the file errors. h - * - * Example usage: - 

- // Task to be created.

- void vTaskCode( void * pvParameters )

- {

-     for( ;; )

-     {

-         // Task code goes here.

-     }

- }

-

- // Function that creates a task.

- void vOtherFunction( void )

- {

- unsigned char ucParameterToPass;

- xTaskHandle xHandle;

-		

-     // Create the task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );

-		

-     // Use the handle to delete the task.

-     vTaskDelete( xHandle );

- }

-
- * \defgroup xTaskCreate xTaskCreate - * \ingroup Tasks - */ -signed portBASE_TYPE xTaskCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pvCreatedTask ); - -/** - * task. h - * 
void vTaskDelete( xTaskHandle pxTask );
- * - * INCLUDE_vTaskDelete must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Remove a task from the RTOS real time kernels management. The task being - * deleted will be removed from all ready, blocked, suspended and event lists. - * - * NOTE: The idle task is responsible for freeing the kernel allocated - * memory from tasks that have been deleted. It is therefore important that - * the idle task is not starved of microcontroller processing time if your - * application makes any calls to vTaskDelete (). Memory allocated by the - * task code is not automatically freed, and should be freed before the task - * is deleted. - * - * See the demo application file death.c for sample code that utilises - * vTaskDelete (). - * - * @param pxTask The handle of the task to be deleted. Passing NULL will - * cause the calling task to be deleted. - * - * Example usage: - 

- void vOtherFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create the task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-		

-     // Use the handle to delete the task.

-     vTaskDelete( xHandle );

- }

-
- * \defgroup vTaskDelete vTaskDelete - * \ingroup Tasks - */ -void vTaskDelete( xTaskHandle pxTask ); - - -/*----------------------------------------------------------- - * TASK CONTROL API - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskDelay( portTickType xTicksToDelay );
- * - * Delay a task for a given number of ticks. The actual time that the - * task remains blocked depends on the tick rate. The constant - * portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * INCLUDE_vTaskDelay must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * @param xTicksToDelay The amount of time, in tick periods, that - * the calling task should block. - * - * Example usage: - 

- // Wait 10 ticks before performing an action.

- // NOTE:

- // This is for demonstration only and would be better achieved

- // using vTaskDelayUntil ().

- void vTaskFunction( void * pvParameters )

- {

- portTickType xDelay, xNextTime;

-

-     // Calc the time at which we want to perform the action

-     // next.

-     xNextTime = xTaskGetTickCount () + ( portTickType ) 10;

-

-     for( ;; )

-     {

-         xDelay = xNextTime - xTaskGetTickCount ();

-         xNextTime += ( portTickType ) 10;

-

-         // Guard against overflow

-         if( xDelay <= ( portTickType ) 10 )

-         {

-             vTaskDelay( xDelay );

-         }

-

-         // Perform action here.

-     }

- }

-
- * \defgroup vTaskDelay vTaskDelay - * \ingroup TaskCtrl - */ -void vTaskDelay( portTickType xTicksToDelay ); - -/** - * task. h - * 
void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement );
- * - * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Delay a task until a specified time. This function can be used by cyclical - * tasks to ensure a constant execution frequency. - * - * This function differs from vTaskDelay () in one important aspect: vTaskDelay () will - * cause a task to block for the specified number of ticks from the time vTaskDelay () is - * called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed - * execution frequency as the time between a task starting to execute and that task - * calling vTaskDelay () may not be fixed [the task may take a different path though the - * code between calls, or may get interrupted or preempted a different number of times - * each time it executes]. - * - * Whereas vTaskDelay () specifies a wake time relative to the time at which the function - * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to - * unblock. - * - * The constant portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the - * task was last unblocked. The variable must be initialised with the current time - * prior to its first use (see the example below). Following this the variable is - * automatically updated within vTaskDelayUntil (). - * - * @param xTimeIncrement The cycle time period. The task will be unblocked at - * time *pxPreviousWakeTime + xTimeIncrement. Calling vTaskDelayUntil with the - * same xTimeIncrement parameter value will cause the task to execute with - * a fixed interface period. - * - * Example usage: - 

- // Perform an action every 10 ticks.

- void vTaskFunction( void * pvParameters )

- {

- portTickType xLastWakeTime;

- const portTickType xFrequency = 10;

-

-     // Initialise the xLastWakeTime variable with the current time.

-     xLastWakeTime = xTaskGetTickCount ();

-     for( ;; )

-     {

-         // Wait for the next cycle.

-         vTaskDelayUntil( &xLastWakeTime, xFrequency );

-

-         // Perform action here.

-     }

- }

-
- * \defgroup vTaskDelayUntil vTaskDelayUntil - * \ingroup TaskCtrl - */ -void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement ); - -/** - * task. h - * 
unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask );
- * - * INCLUDE_xTaskPriorityGet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Obtain the priority of any task. - * - * @param pxTask Handle of the task to be queried. Passing a NULL - * handle results in the priority of the calling task being returned. - * - * @return The priority of pxTask. - * - * Example usage: - 

- void vAFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create a task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-		

-     // ...

-

-     // Use the handle to obtain the priority of the created task.

-     // It was created with tskIDLE_PRIORITY, but may have changed

-     // it itself.

-     if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )

-     {

-         // The task has changed it's priority.

-     }

-

-     // ...

-

-     // Is our priority higher than the created task?

-     if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )

-     {

-         // Our priority (obtained using NULL handle) is higher.

-     }

- }

-
- * \defgroup uxTaskPriorityGet uxTaskPriorityGet - * \ingroup TaskCtrl - */ -unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ); - -/** - * task. h - * 
void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );
- * - * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Set the priority of any task. - * - * A context switch will occur before the function returns if the priority - * being set is higher than the currently executing task. - * - * @param pxTask Handle to the task for which the priority is being set. - * Passing a NULL handle results in the priority of the calling task being set. - * - * @param uxNewPriority The priority to which the task will be set. - * - * Example usage: - 

- void vAFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create a task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-

-     // ...

-

-     // Use the handle to raise the priority of the created task.

-     vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );

-

-     // ...

-

-     // Use a NULL handle to raise our priority to the same value.

-     vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );

- }

-
- * \defgroup vTaskPrioritySet vTaskPrioritySet - * \ingroup TaskCtrl - */ -void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ); - -/** - * task. h - * 
void vTaskSuspend( xTaskHandle pxTaskToSuspend );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Suspend any task. When suspended a task will never get any microcontroller - * processing time, no matter what its priority. - * - * Calls to vTaskSuspend are not accumulative - - * i.e. calling vTaskSuspend () twice on the same task still only requires one - * call to vTaskResume () to ready the suspended task. - * - * @param pxTaskToSuspend Handle to the task being suspended. Passing a NULL - * handle will cause the calling task to be suspended. - * - * Example usage: - 

- void vAFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create a task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-		

-     // ...

-

-     // Use the handle to suspend the created task.

-     vTaskSuspend( xHandle );

-

-     // ...

-		

-     // The created task will not run during this period, unless

-     // another task calls vTaskResume( xHandle ).

-		

-     //...

-		

-

-     // Suspend ourselves.

-     vTaskSuspend( NULL );

-

-     // We cannot get here unless another task calls vTaskResume

-     // with our handle as the parameter.

- }

-
- * \defgroup vTaskSuspend vTaskSuspend - * \ingroup TaskCtrl - */ -void vTaskSuspend( xTaskHandle pxTaskToSuspend ); - -/** - * task. h - * 
void vTaskResume( xTaskHandle pxTaskToResume );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Resumes a suspended task. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * vTaskResume (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * Example usage: - 

- void vAFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create a task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-		

-     // ...

-

-     // Use the handle to suspend the created task.

-     vTaskSuspend( xHandle );

-

-     // ...

-	

-     // The created task will not run during this period, unless

-     // another task calls vTaskResume( xHandle ).

-		

-     //...

-		

-

-     // Resume the suspended task ourselves.

-     vTaskResume( xHandle );

-

-     // The created task will once again get microcontroller processing

-     // time in accordance with it priority within the system.

- }

-
- * \defgroup vTaskResume vTaskResume - * \ingroup TaskCtrl - */ -void vTaskResume( xTaskHandle pxTaskToResume ); - -/** - * task. h - * 
void xTaskResumeFromISR( xTaskHandle pxTaskToResume );
- * - * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be - * available. See the configuration section for more information. - * - * An implementation of vTaskResume() that can be called from within an ISR. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * xTaskResumeFromISR (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * \defgroup vTaskResumeFromISR vTaskResumeFromISR - * \ingroup TaskCtrl - */ -portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ); - -/*----------------------------------------------------------- - * SCHEDULER CONTROL - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskStartScheduler( void );
- * - * Starts the real time kernel tick processing. After calling the kernel - * has control over which tasks are executed and when. This function - * does not return until an executing task calls vTaskEndScheduler (). - * - * At least one task should be created via a call to xTaskCreate () - * before calling vTaskStartScheduler (). The idle task is created - * automatically when the first application task is created. - * - * See the demo application file main.c for an example of creating - * tasks and starting the kernel. - * - * Example usage: - 

- void vAFunction( void )

- {

-     // Create at least one task before starting the kernel.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );

-

-     // Start the real time kernel with preemption.

-     vTaskStartScheduler ();

-

-     // Will not get here unless a task calls vTaskEndScheduler ()

- }

-
- * - * \defgroup vTaskStartScheduler vTaskStartScheduler - * \ingroup SchedulerControl - */ -void vTaskStartScheduler( void ); - -/** - * task. h - * 
void vTaskEndScheduler( void );
- * - * Stops the real time kernel tick. All created tasks will be automatically - * deleted and multitasking (either preemptive or cooperative) will - * stop. Execution then resumes from the point where vTaskStartScheduler () - * was called, as if vTaskStartScheduler () had just returned. - * - * See the demo application file main. c in the demo/PC directory for an - * example that uses vTaskEndScheduler (). - * - * vTaskEndScheduler () requires an exit function to be defined within the - * portable layer (see vPortEndScheduler () in port. c for the PC port). This - * performs hardware specific operations such as stopping the kernel tick. - * - * vTaskEndScheduler () will cause all of the resources allocated by the - * kernel to be freed - but will not free resources allocated by application - * tasks. - * - * Example usage: - 

- void vTaskCode( void * pvParameters )

- {

-     for( ;; )

-     {

-         // Task code goes here.

-

-         // At some point we want to end the real time kernel processing

-         // so call ...

-         vTaskEndScheduler ();

-     }

- }

-

- void vAFunction( void )

- {

-     // Create at least one task before starting the kernel.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );

-

-     // Start the real time kernel with preemption.

-     vTaskStartScheduler ();

-

-     // Will only get here when the vTaskCode () task has called

-     // vTaskEndScheduler ().  When we get here we are back to single task

-     // execution.

- }

-
- * - * \defgroup vTaskEndScheduler vTaskEndScheduler - * \ingroup SchedulerControl - */ -void vTaskEndScheduler( void ); - -/** - * task. h - * 
void vTaskSuspendAll( void );
- * - * Suspends all real time kernel activity while keeping interrupts (including the - * kernel tick) enabled. - * - * After calling vTaskSuspendAll () the calling task will continue to execute - * without risk of being swapped out until a call to xTaskResumeAll () has been - * made. - * - * Example usage: - 

- void vTask1( void * pvParameters )

- {

-     for( ;; )

-     {

-         // Task code goes here.

-

-         // ...

-

-         // At some point the task wants to perform a long operation during

-         // which it does not want to get swapped out.  It cannot use

-         // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the

-         // operation may cause interrupts to be missed - including the

-         // ticks.

-

-         // Prevent the real time kernel swapping out the task.

-         vTaskSuspendAll ();

-

-         // Perform the operation here.  There is no need to use critical

-         // sections as we have all the microcontroller processing time.

-         // During this time interrupts will still operate and the kernel

-         // tick count will be maintained.

-

-         // ...

-

-         // The operation is complete.  Restart the kernel.

-         xTaskResumeAll ();

-     }

- }

-
- * \defgroup vTaskSuspendAll vTaskSuspendAll - * \ingroup SchedulerControl - */ -void vTaskSuspendAll( void ); - -/** - * task. h - * 
portCHAR xTaskResumeAll( void );
- * - * Resumes real time kernel activity following a call to vTaskSuspendAll (). - * After a call to vTaskSuspendAll () the kernel will take control of which - * task is executing at any time. - * - * @return If resuming the scheduler caused a context switch then pdTRUE is - * returned, otherwise pdFALSE is returned. - * - * Example usage: - 

- void vTask1( void * pvParameters )

- {

-     for( ;; )

-     {

-         // Task code goes here.

-

-         // ...

-

-         // At some point the task wants to perform a long operation during

-         // which it does not want to get swapped out.  It cannot use

-         // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the

-         // operation may cause interrupts to be missed - including the

-         // ticks.

-

-         // Prevent the real time kernel swapping out the task.

-         vTaskSuspendAll ();

-

-         // Perform the operation here.  There is no need to use critical

-         // sections as we have all the microcontroller processing time.

-         // During this time interrupts will still operate and the real

-         // time kernel tick count will be maintained.

-

-         // ...

-

-         // The operation is complete.  Restart the kernel.  We want to force

-         // a context switch - but there is no point if resuming the scheduler

-         // caused a context switch already.

-         if( !xTaskResumeAll () )

-         {

-              taskYIELD ();

-         }

-     }

- }

-
- * \defgroup xTaskResumeAll xTaskResumeAll - * \ingroup SchedulerControl - */ -signed portBASE_TYPE xTaskResumeAll( void ); - - -/*----------------------------------------------------------- - * TASK UTILITIES - *----------------------------------------------------------*/ - -/** - * task. h - * 
volatile portTickType xTaskGetTickCount( void );
- * - * @return The count of ticks since vTaskStartScheduler was called. - * - * \page xTaskGetTickCount xTaskGetTickCount - * \ingroup TaskUtils - */ -portTickType xTaskGetTickCount( void ); - -/** - * task. h - * 
unsigned portSHORT uxTaskGetNumberOfTasks( void );
- * - * @return The number of tasks that the real time kernel is currently managing. - * This includes all ready, blocked and suspended tasks. A task that - * has been deleted but not yet freed by the idle task will also be - * included in the count. - * - * \page uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks - * \ingroup TaskUtils - */ -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ); - -/** - * task. h - * 
void vTaskList( portCHAR *pcWriteBuffer );
- * - * configUSE_TRACE_FACILITY, INCLUDE_vTaskDelete and INCLUDE_vTaskSuspend - * must all be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * NOTE: This function will disable interrupts for its duration. It is - * not intended for normal application runtime use but as a debug aid. - * - * Lists all the current tasks, along with their current state and stack - * usage high water mark. - * - * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or - * suspended ('S'). - * - * @param pcWriteBuffer A buffer into which the above mentioned details - * will be written, in ascii form. This buffer is assumed to be large - * enough to contain the generated report. Approximately 40 bytes per - * task should be sufficient. - * - * \page vTaskList vTaskList - * \ingroup TaskUtils - */ -void vTaskList( signed portCHAR *pcWriteBuffer ); - -/** - * task. h - * 
void vTaskStartTrace( portCHAR * pcBuffer, unsigned portBASE_TYPE uxBufferSize );
- * - * Starts a real time kernel activity trace. The trace logs the identity of - * which task is running when. - * - * The trace file is stored in binary format. A separate DOS utility called - * convtrce.exe is used to convert this into a tab delimited text file which - * can be viewed and plotted in a spread sheet. - * - * @param pcBuffer The buffer into which the trace will be written. - * - * @param ulBufferSize The size of pcBuffer in bytes. The trace will continue - * until either the buffer in full, or ulTaskEndTrace () is called. - * - * \page vTaskStartTrace vTaskStartTrace - * \ingroup TaskUtils - */ -void vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize ); - -/** - * task. h - * 
unsigned portLONG ulTaskEndTrace( void );
- * - * Stops a kernel activity trace. See vTaskStartTrace (). - * - * @return The number of bytes that have been written into the trace buffer. - * - * \page usTaskEndTrace usTaskEndTrace - * \ingroup TaskUtils - */ -unsigned portLONG ulTaskEndTrace( void ); - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - *----------------------------------------------------------*/ - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Called from the real time kernel tick (either preemptive or cooperative), - * this increments the tick count and checks if any tasks that are blocked - * for a finite period required removing from a blocked list and placing on - * a ready list. - */ -inline void vTaskIncrementTick( void ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes the calling task from the ready list and places it both - * on the list of tasks waiting for a particular event, and the - * list of delayed tasks. The task will be removed from both lists - * and replaced on the ready list should either the event occur (and - * there be no higher priority tasks waiting on the same event) or - * the delay period expires. - * - * @param pxEventList The list containing tasks that are blocked waiting - * for the event to occur. - * - * @param xTicksToWait The maximum amount of time that the task should wait - * for the event to occur. This is specified in kernel ticks,the constant - * portTICK_RATE_MS can be used to convert kernel ticks into a real time - * period. - */ -void vTaskPlaceOnEventList( xList *pxEventList, portTickType xTicksToWait ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes a task from both the specified event list and the list of blocked - * tasks, and places it on a ready queue. - * - * xTaskRemoveFromEventList () will be called if either an event occurs to - * unblock a task, or the block timeout period expires. - * - * @return pdTRUE if the task being removed has a higher priority than the task - * making the call, otherwise pdFALSE. - */ -signed portBASE_TYPE xTaskRemoveFromEventList( const xList *pxEventList ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * INCLUDE_vTaskCleanUpResources and INCLUDE_vTaskSuspend must be defined as 1 - * for this function to be available. - * See the configuration section for more information. - * - * Empties the ready and delayed queues of task control blocks, freeing the - * memory allocated for the task control block and task stacks as it goes. - */ -void vTaskCleanUpResources( void ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Sets the pointer to the current TCB to the TCB of the highest priority task - * that is ready to run. - */ -inline void vTaskSwitchContext( void ); - -/* - * Return the handle of the calling task. - */ -xTaskHandle xTaskGetCurrentTaskHandle( void ); - - -#endif /* TASK_H */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/list.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/list.c deleted file mode 100644 index a4e6b7e1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/list.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.2.0 - - + Removed the volatile modifier from the function parameters. This was - only ever included to prevent compiler warnings. Now warnings are - removed by casting parameters where the calls are made. - - + prvListGetOwnerOfNextEntry() and prvListGetOwnerOfHeadEntry() have been - removed from the c file and added as macros to the h file. - - + uxNumberOfItems has been added to the list structure. This removes the - need for a pointer comparison when checking if a list is empty, and so - is slightly faster. - - + Removed the NULL check in vListRemove(). This makes the call faster but - necessitates any application code utilising the list implementation to - ensure NULL pointers are not passed. - -Changes from V2.0.0 - - + Double linked the lists to allow faster removal item removal. - -Changes from V2.6.1 - - + Make use of the new portBASE_TYPE definition where ever appropriate. - -Changes from V3.0.0 - - + API changes as described on the FreeRTOS.org WEB site. - -Changes from V3.2.4 - - + Removed the pxHead member of the xList structure. This always pointed - to the same place so has been removed to free a few bytes of RAM. - - + Introduced the xMiniListItem structure that does not include the - xListItem members that are not required by the xListEnd member of a list. - Again this was done to reduce RAM usage. - - + Changed the volatile definitions of some structure members to clean up - the code where the list structures are used. - -Changes from V4.0.4 - - + Optimised vListInsert() in the case when the wake time is the maximum - tick count value. -*/ - -#include -#include "FreeRTOS.h" -#include "list.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -void vListInitialise( xList *pxList ) -{ - /* The list structure contains a list item which is used to mark the - end of the list. To initialise the list the list end is inserted - as the only list entry. */ - pxList->pxIndex = ( xListItem * ) &( pxList->xListEnd ); - - /* The list end value is the highest possible value in the list to - ensure it remains at the end of the list. */ - pxList->xListEnd.xItemValue = portMAX_DELAY; - - /* The list end next and previous pointers point to itself so we know - when the list is empty. */ - pxList->xListEnd.pxNext = ( xListItem * ) &( pxList->xListEnd ); - pxList->xListEnd.pxPrevious = ( xListItem * ) &( pxList->xListEnd ); - - pxList->uxNumberOfItems = 0; -} -/*-----------------------------------------------------------*/ - -void vListInitialiseItem( xListItem *pxItem ) -{ - /* Make sure the list item is not recorded as being on a list. */ - pxItem->pvContainer = NULL; -} -/*-----------------------------------------------------------*/ - -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem * pxIndex; - - /* Insert a new list item into pxList, but rather than sort the list, - makes the new list item the last item to be removed by a call to - pvListGetOwnerOfNextEntry. This means it has to be the item pointed to by - the pxIndex member. */ - pxIndex = pxList->pxIndex; - - pxNewListItem->pxNext = pxIndex->pxNext; - pxNewListItem->pxPrevious = pxList->pxIndex; - pxIndex->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxIndex->pxNext = ( volatile xListItem * ) pxNewListItem; - pxList->pxIndex = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListInsert( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem *pxIterator; -portTickType xValueOfInsertion; - - /* Insert the new list item into the list, sorted in ulListItem order. */ - xValueOfInsertion = pxNewListItem->xItemValue; - - /* If the list already contains a list item with the same item value then - the new list item should be placed after it. This ensures that TCB's which - are stored in ready lists (all of which have the same ulListItem value) - get an equal share of the CPU. However, if the xItemValue is the same as - the back marker the iteration loop below will not end. This means we need - to guard against this by checking the value first and modifying the - algorithm slightly if necessary. */ - if( xValueOfInsertion == portMAX_DELAY ) - { - pxIterator = pxList->xListEnd.pxPrevious; - } - else - { - for( pxIterator = ( xListItem * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) - { - /* There is nothing to do here, we are just iterating to the - wanted insertion position. */ - } - } - - pxNewListItem->pxNext = pxIterator->pxNext; - pxNewListItem->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxNewListItem->pxPrevious = pxIterator; - pxIterator->pxNext = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. This allows fast removal of the - item later. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListRemove( xListItem *pxItemToRemove ) -{ -xList * pxList; - - pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; - pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; - - /* The list item knows which list it is in. Obtain the list from the list - item. */ - pxList = ( xList * ) pxItemToRemove->pvContainer; - - /* Make sure the index is left pointing to a valid item. */ - if( pxList->pxIndex == pxItemToRemove ) - { - pxList->pxIndex = pxItemToRemove->pxPrevious; - } - - pxItemToRemove->pvContainer = NULL; - ( pxList->uxNumberOfItems )--; -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/GCC/MCF5235/port.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/GCC/MCF5235/port.c deleted file mode 100644 index c304b0da..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/GCC/MCF5235/port.c +++ /dev/null @@ -1,263 +0,0 @@ -/* - FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry. - MCF5235 Port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include - -#include "FreeRTOS.h" -#include "FreeRTOSConfig.h" -#include "task.h" - -/* ------------------------ Types ----------------------------------------- */ -typedef volatile unsigned long vuint32; -typedef volatile unsigned short vuint16; -typedef volatile unsigned char vuint8; - -/* ------------------------ Defines --------------------------------------- */ -#define portVECTOR_TABLE __RAMVEC -#define portVECTOR_SYSCALL ( 32 + portTRAP_YIELD ) -#define portVECTOR_TIMER ( 64 + 36 ) - -#define MCF_PIT_PRESCALER 512UL -#define MCF_PIT_TIMER_TICKS ( FSYS_2 / MCF_PIT_PRESCALER ) -#define MCF_PIT_MODULUS_REGISTER(freq) ( MCF_PIT_TIMER_TICKS / ( freq ) - 1UL) - -#define MCF_PIT_PMR0 ( *( vuint16 * )( void * )( &__IPSBAR[ 0x150002 ] ) ) -#define MCF_PIT_PCSR0 ( *( vuint16 * )( void * )( &__IPSBAR[ 0x150000 ] ) ) -#define MCF_PIT_PCSR_PRE(x) ( ( ( x ) & 0x000F ) << 8 ) -#define MCF_PIT_PCSR_EN ( 0x0001 ) -#define MCF_PIT_PCSR_RLD ( 0x0002 ) -#define MCF_PIT_PCSR_PIF ( 0x0004 ) -#define MCF_PIT_PCSR_PIE ( 0x0008 ) -#define MCF_PIT_PCSR_OVW ( 0x0010 ) -#define MCF_INTC0_ICR36 ( *( vuint8 * )( void * )( &__IPSBAR[ 0x000C64 ] ) ) -#define MCF_INTC0_IMRH ( *( vuint32 * )( void * )( &__IPSBAR[ 0x000C08 ] ) ) -#define MCF_INTC0_IMRH_INT_MASK36 ( 0x00000010 ) -#define MCF_INTC0_IMRH_MASKALL ( 0x00000001 ) -#define MCF_INTC0_ICRn_IP(x) ( ( ( x ) & 0x07 ) << 0 ) -#define MCF_INTC0_ICRn_IL(x) ( ( ( x ) & 0x07 ) << 3 ) - -#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 ) -#define portINITIAL_CRITICAL_NESTING ( ( unsigned portLONG ) 10 ) - -/* ------------------------ Static variables ------------------------------ */ -volatile unsigned portLONG ulCriticalNesting = portINITIAL_CRITICAL_NESTING; - -/* ------------------------ Static functions ------------------------------ */ -#if configUSE_PREEMPTION == 0 -static void prvPortPreemptiveTick ( void ) __attribute__ ((interrupt_handler)); -#else -static void prvPortPreemptiveTick ( void ); -#endif - -/* ------------------------ Start implementation -------------------------- */ - -portSTACK_TYPE * -pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, - void *pvParameters ) -{ - /* Place the parameter on the stack in the expected location. */ - *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; - pxTopOfStack--; - - /* Place dummy return address on stack. Tasks should never terminate so - * we can set this to anything. */ - *pxTopOfStack = ( portSTACK_TYPE ) 0; - pxTopOfStack--; - - /* Create a Motorola Coldfire exception stack frame. First comes the return - * address. */ - *pxTopOfStack = ( portSTACK_TYPE ) pxCode; - pxTopOfStack--; - - /* Format, fault-status, vector number for exception stack frame. Task - * run in supervisor mode. */ - *pxTopOfStack = 0x40002000UL | ( portVECTOR_SYSCALL + 32 ) << 18; - pxTopOfStack--; - - /* Set the initial critical section nesting counter to zero. This value - * is used to restore the value of ulCriticalNesting. */ - *pxTopOfStack = 0; - *pxTopOfStack--; - - *pxTopOfStack = ( portSTACK_TYPE ) 0xA6; /* A6 / FP */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xA5; /* A5 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xA4; /* A4 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xA3; /* A3 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xA2; /* A2 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xA1; /* A1 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xA0; /* A0 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD7; /* D7 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD6; /* D6 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD5; /* D5 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD4; /* D4 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD3; /* D3 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD2; /* D2 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD1; /* D1 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xD0; /* D0 */ - - return pxTopOfStack; -} - -/* - * Called by portYIELD() or taskYIELD() to manually force a context switch. - */ -static void -prvPortYield( void ) -{ - asm volatile ( "move.w #0x2700, %sr\n\t" ); -#if _GCC_USES_FP == 1 - asm volatile ( "unlk %fp\n\t" ); -#endif - /* Perform the context switch. First save the context of the current task. */ - portSAVE_CONTEXT( ); - - /* Find the highest priority task that is ready to run. */ - vTaskSwitchContext( ); - - /* Restore the context of the new task. */ - portRESTORE_CONTEXT( ); -} - -#if configUSE_PREEMPTION == 0 -/* - * The ISR used for the scheduler tick depends on whether the cooperative or - * the preemptive scheduler is being used. - */ -static void -prvPortPreemptiveTick ( void ) -{ - /* The cooperative scheduler requires a normal IRQ service routine to - * simply increment the system tick. - */ - - vTaskIncrementTick( ); - MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIF; -} - -#else - -static void -prvPortPreemptiveTick( void ) -{ - asm volatile ( "move.w #0x2700, %sr\n\t" ); -#if _GCC_USES_FP == 1 - asm volatile ( "unlk %fp\n\t" ); -#endif - portSAVE_CONTEXT( ); - MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIF; - vTaskIncrementTick( ); - vTaskSwitchContext( ); - portRESTORE_CONTEXT( ); -} -#endif - -void -vPortEnterCritical() -{ - /* FIXME: We should store the old IPL here - How are we supposed to do - * this. - */ - ( void )portSET_IPL( portIPL_MAX ); - - /* Now interrupts are disabled ulCriticalNesting can be accessed - * directly. Increment ulCriticalNesting to keep a count of how many times - * portENTER_CRITICAL() has been called. */ - ulCriticalNesting++; -} - -void -vPortExitCritical() -{ - if( ulCriticalNesting > portNO_CRITICAL_NESTING ) - { - /* Decrement the nesting count as we are leaving a critical section. */ - ulCriticalNesting--; - - /* If the nesting level has reached zero then interrupts should be - re-enabled. */ - if( ulCriticalNesting == portNO_CRITICAL_NESTING ) - { - ( void )portSET_IPL( 0 ); - } - } -} - -portBASE_TYPE -xPortStartScheduler( void ) -{ - extern void ( *portVECTOR_TABLE[ ] ) ( ); - - /* Add entry in vector table for yield system call. */ - portVECTOR_TABLE[ portVECTOR_SYSCALL ] = prvPortYield; - /* Add entry in vector table for periodic timer. */ - portVECTOR_TABLE[ portVECTOR_TIMER ] = prvPortPreemptiveTick; - - /* Configure the timer for the system clock. */ - if ( configTICK_RATE_HZ > 0) - { - /* Configure prescaler */ - MCF_PIT_PCSR0 = MCF_PIT_PCSR_PRE( 0x9 ) | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_OVW; - /* Initialize the periodic timer interrupt. */ - MCF_PIT_PMR0 = MCF_PIT_MODULUS_REGISTER( configTICK_RATE_HZ ); - /* Configure interrupt priority and level and unmask interrupt. */ - MCF_INTC0_ICR36 = MCF_INTC0_ICRn_IL( 0x1 ) | MCF_INTC0_ICRn_IP( 0x1 ); - MCF_INTC0_IMRH &= ~( MCF_INTC0_IMRH_INT_MASK36 | MCF_INTC0_IMRH_MASKALL ); - /* Enable interrupts */ - MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_EN | MCF_PIT_PCSR_PIF; - } - - /* Restore the context of the first task that is going to run. */ - portRESTORE_CONTEXT( ); - - /* Should not get here. */ - return pdTRUE; -} - -void -vPortEndScheduler( void ) -{ -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/GCC/MCF5235/portmacro.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/GCC/MCF5235/portmacro.h deleted file mode 100644 index f583c51e124ff2d6a5a8e4116bd208b1ca7ee57d..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7231 zcmb_gYj4`h7QLS<^*?Oos1oE7Li$K`8=VghB?&44WILzL)sc{64`Ebe`}zTis`KCP z+GCF~U`UhJA9&a^Yrogtz%A)p;r`iz9c^OzPQPVk@JYAFR|i^4cpsNtlne@tP-JDX7Yk$eZL>CLqsSQ+Y( z43ssqFcSCyJQ%r@zE5|8vP4WXzm>~^N9k+dz8c-wWDIZVt6`eP(7rvx@^lvBsaS{{ zOwJ=;!df^uc7pT~`sWzeJ+pg-O~!eD(6?`42VL~-Vb8MYVq}s*W5cxj-J5}7()h+4 zkE~vs$U?l}kQ`!81hu^>;Rj`Wk#_FIHFfr`FIGiM!WePPzTReW3258QT(KKzGl0Z$1U`;IGGWMvHT z?p>!v=V6kDL5r>pqR!islar&9cb$(!H0Yw?%kfl6tF(24R; z6y|fXFOiD8a+L*zd2q)3P6iyfF#cX-L*V+ECz8@)SXzYpPDr>TL~7q-3jm`yTu85o z6K8mW)N}=4JwY5C&Q2_fVu=97k1Q_=0}-UjD$0b~LESKPB3#buTsxHcEKQ?N$H&X% zvaRd69me+x8hPsLxN|&b;gTzuma`%!ODE-UT=6USl$mn)`>tFL=k7kez0l3(@PMlP zma5$ZH5kBMbA2x-k|Id3$qljIO|`l3-Pjins0Mz^kp2ioEF6RcA;8+Hyw75Vr92V~ zUo23SIbOsRTsXR9voP?H2DGLdT*Sox`}~7Wa(K+i{D+)^RHrl^nfA5OHAj;x+{7K$ zVeRJYSI38RwBw@BPU=wl7$I3X*}9?cO(op1YduTXV%QB}CX-F%i+k4k(~H5#u=9sB z^+N~#t8V^0x;Y>8^5pD&qp$Xr4ygWa(2;U%)lKa3iD}rq$+e}| z>F>t2>rOhI4jmU|yV`s8Uk+Fm_xu)+#-M*WyzUKk?i9f9Raq4kq}*#7EmH~6eY zuf99@35VIS6H#Z&-2QklL8Mp9E5Fc>c;_haA8B~q=cE&HoJA>pB**u|rSRGcaDPNJ zm($#F<1jB?R(eNFN<^e2)K>Fg7N|}^^9I^|L?!1}H8k znbRV~+{@>J2Ipkqioz4z4miwt{5dCg2q^G2o*tmPwtd`e9G$*z(VHY{s?WcJzte+_ zwd;TD@t|LnVFrWWoH7vf#_Jrt@jf2Eaq#V&B7Cea2YID#J>J1QT!=X|+<<6NgLU1b zW<8$PZ!6%SrHpI5RyVf19#8wPaf->d@SfAzqgLs}9e8Xn2V_e@w%FQ2b0SHXZ=iZe;vP=JiATz`^URE^Z*aXvG1U@TKD83)v5{u@!v52y)_!QLuvnq%tmN`BG$tuxgg zqwDdYUy-8QxlmG!YM+|~SdXXqMbTZ0PCGwK&%5|a*RQho->q#ecbQzT-xKlJ=>9qu zd-w&ZpKFk_Ky@s{EZ8$AU9*qb(HOj-sTL+I#+bl*O!m6zH)@1^!^ng#CF`j)DhM|@xVEc)Te2uj^Er0G?1`czRKKs(V8QT{8SZwz~`hgK+ z5lWAmJf)U;@gF@cH_zxFOrID>8kng!CimX(1?WK8#9TiQsOkO%@h<(i@=tY^I-ryf z2IxIS!~R5{=s+Gc*j&3jRy5hjb%lnb@vo>;4ilT?8-xYTZb{5@-@;4E?p1$yIq6&G z^EBAu0!0T)qCYwhZ$Ea_3=&Zgs0rlyAWJ{uGCuMD6Fd z_OZrT<_9%e*swgu@8<4lU?f;gy=5ve9>39emM*+$^Q!3gWAoWd{#WpLdyPTQ3sD8{ zpO@&fxu?MUEm(|Q;Bg{u&RA?{KAP@0zaJgZg+8%jgiOQymEDfFbbK4B@cNZv+?uXb zP%&gyR#aQbY5|IkkBTe$FJF487yJA;lS8po4dzKBx_EgFf{%aVB~ocbwNu-M^<{E# zGwj;^(Qq<0NA?JPMZ2a&(PHfI+W>V)uPe7A2)WsMU(uQl*LQCg_?qnJNzGI1S+Z9z G=Kc=~_gaVm diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/MemMang/heap_1.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/MemMang/heap_1.c deleted file mode 100644 index 35908c1e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/MemMang/heap_1.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - -Changes between V2.5.1 and V2.5.1 - - + The memory pool has been defined within a struct to ensure correct memory - alignment on 32bit systems. - -Changes between V2.6.1 and V3.0.0 - - + An overflow check has been added to ensure the next free byte variable - does not wrap around. -*/ - - -/* - * The simplest possible implementation of pvPortMalloc(). Note that this - * implementation does NOT allow allocated memory to be freed again. - * - * See heap_2.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include -#include "FreeRTOS.h" -#include "task.h" - -/* Setup the correct byte alignment mask for the defined byte alignment. */ -#if portBYTE_ALIGNMENT == 4 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0000 ) -#endif - -#ifndef heapBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static struct xRTOS_HEAP -{ - unsigned portLONG ulDummy; - unsigned portCHAR ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -static size_t xNextFreeByte = ( size_t ) 0; -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn = NULL; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - #if portBYTE_ALIGNMENT != 1 - if( xWantedSize & heapBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) ); - } - #endif - - vTaskSuspendAll(); - { - /* Check there is enough room left for the allocation. */ - if( ( ( xNextFreeByte + xWantedSize ) < configTOTAL_HEAP_SIZE ) && - ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) )/* Check for overflow. */ - { - /* Return the next free byte then increment the index past this - block. */ - pvReturn = &( xHeap.ucHeap[ xNextFreeByte ] ); - xNextFreeByte += xWantedSize; - } - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - /* Memory cannot be freed using this scheme. See heap_2.c and heap_3.c - for alternative implementations, and the memory management pages of - http://www.FreeRTOS.org for more information. */ - ( void ) pv; -} -/*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* Only required when static memory is not cleared. */ - xNextFreeByte = ( size_t ) 0; -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/MemMang/heap_2.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/MemMang/heap_2.c deleted file mode 100644 index e8f0e79c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/MemMang/heap_2.c +++ /dev/null @@ -1,236 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - * A sample implementation of pvPortMalloc() and vPortFree() that permits - * allocated blocks to be freed, but does not combine adjacent free blocks - * into a single larger block. - * - * See heap_1.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* Setup the correct byte alignment mask for the defined byte alignment. */ -#if portBYTE_ALIGNMENT == 4 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0000 ) -#endif - -#ifndef heapBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static struct xRTOS_HEAP -{ - unsigned portLONG ulDummy; - unsigned portCHAR ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -/* Define the linked list structure. This is used to link free blocks in order -of their size. */ -typedef struct A_BLOCK_LINK -{ - struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */ - size_t xBlockSize; /*<< The size of the free block. */ -} xBlockLink; - - -static const unsigned portSHORT heapSTRUCT_SIZE = ( sizeof( xBlockLink ) + ( sizeof( xBlockLink ) % portBYTE_ALIGNMENT ) ); -#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) ) - -/* Create a couple of list links to mark the start and end of the list. */ -static xBlockLink xStart, xEnd; - -/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */ - -/* - * Insert a block into the list of free blocks - which is ordered by size of - * the block. Small blocks at the start of the list and large blocks at the end - * of the list. - */ -#define prvInsertBlockIntoFreeList( pxBlockToInsert ) \ -{ \ -xBlockLink *pxIterator; \ -size_t xBlockSize; \ - \ - xBlockSize = pxBlockToInsert->xBlockSize; \ - \ - /* Iterate through the list until a block is found that has a larger size */ \ - /* than the block we are inserting. */ \ - for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock ) \ - { \ - /* There is nothing to do here - just iterate to the correct position. */ \ - } \ - \ - /* Update the list to include the block being inserted in the correct */ \ - /* position. */ \ - pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; \ - pxIterator->pxNextFreeBlock = pxBlockToInsert; \ -} -/*-----------------------------------------------------------*/ - -#define prvHeapInit() \ -{ \ -xBlockLink *pxFirstFreeBlock; \ - \ - /* xStart is used to hold a pointer to the first item in the list of free */ \ - /* blocks. The void cast is used to prevent compiler warnings. */ \ - xStart.pxNextFreeBlock = ( void * ) xHeap.ucHeap; \ - xStart.xBlockSize = ( size_t ) 0; \ - \ - /* xEnd is used to mark the end of the list of free blocks. */ \ - xEnd.xBlockSize = configTOTAL_HEAP_SIZE; \ - xEnd.pxNextFreeBlock = NULL; \ - \ - /* To start with there is a single free block that is sized to take up the \ - entire heap space. */ \ - pxFirstFreeBlock = ( void * ) xHeap.ucHeap; \ - pxFirstFreeBlock->xBlockSize = configTOTAL_HEAP_SIZE; \ - pxFirstFreeBlock->pxNextFreeBlock = &xEnd; \ -} -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink; -static portBASE_TYPE xHeapHasBeenInitialised = pdFALSE; -void *pvReturn = NULL; - - vTaskSuspendAll(); - { - /* If this is the first call to malloc then the heap will require - initialisation to setup the list of free blocks. */ - if( xHeapHasBeenInitialised == pdFALSE ) - { - prvHeapInit(); - xHeapHasBeenInitialised = pdTRUE; - } - - /* The wanted size is increased so it can contain a xBlockLink - structure in addition to the requested amount of bytes. */ - if( xWantedSize > 0 ) - { - xWantedSize += heapSTRUCT_SIZE; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - if( xWantedSize & heapBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) ); - } - } - - if( ( xWantedSize > 0 ) && ( xWantedSize < configTOTAL_HEAP_SIZE ) ) - { - /* Blocks are stored in byte order - traverse the list from the start - (smallest) block until one of adequate size is found. */ - pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; - while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock ) ) - { - pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; - } - - /* If we found the end marker then a block of adequate size was not found. */ - if( pxBlock != &xEnd ) - { - /* Return the memory space - jumping over the xBlockLink structure - at its start. */ - pvReturn = ( void * ) ( ( ( unsigned portCHAR * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE ); - - /* This block is being returned for use so must be taken our of the - list of free blocks. */ - pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; - - /* If the block is larger than required it can be split into two. */ - if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) - { - /* This block is to be split into two. Create a new block - following the number of bytes requested. The void cast is - used to prevent byte alignment warnings from the compiler. */ - pxNewBlockLink = ( void * ) ( ( ( unsigned portCHAR * ) pxBlock ) + xWantedSize ); - - /* Calculate the sizes of two blocks split from the single - block. */ - pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; - - /* Insert the new block into the list of free blocks. */ - prvInsertBlockIntoFreeList( ( pxNewBlockLink ) ); - } - } - } - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ -unsigned portCHAR *puc = ( unsigned portCHAR * ) pv; -xBlockLink *pxLink; - - if( pv ) - { - /* The memory being freed will have an xBlockLink structure immediately - before it. */ - puc -= heapSTRUCT_SIZE; - - /* This casting is to keep the compiler from issuing warnings. */ - pxLink = ( void * ) puc; - - vTaskSuspendAll(); - { - /* Add this block to the list of free blocks. */ - prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) ); - } - xTaskResumeAll(); - } -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/MemMang/heap_3.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/MemMang/heap_3.c deleted file mode 100644 index 9e5d362a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/portable/MemMang/heap_3.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - - -/* - * Implementation of pvPortMalloc() and vPortFree() that relies on the - * compilers own malloc() and free() implementations. - * - * This file can only be used if the linker is configured to to generate - * a heap memory area. - * - * See heap_2.c and heap_1.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ - -#include - -#include "FreeRTOS.h" -#include "task.h" - -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn; - - vTaskSuspendAll(); - { - pvReturn = malloc( xWantedSize ); - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - if( pv ) - { - vTaskSuspendAll(); - { - free( pv ); - } - xTaskResumeAll(); - } -} - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/queue.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/queue.c deleted file mode 100644 index a81755e8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/queue.c +++ /dev/null @@ -1,869 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.01 - - + More use of 8bit data types. - + Function name prefixes changed where the data type returned has changed. - -Changed from V2.0.0 - - + Added the queue locking mechanism and make more use of the scheduler - suspension feature to minimise the time interrupts have to be disabled - when accessing a queue. - -Changed from V2.2.0 - - + Explicit use of 'signed' qualifier on portCHAR types added. - -Changes from V3.0.0 - - + API changes as described on the FreeRTOS.org WEB site. - -Changes from V3.2.3 - - + Added the queue functions that can be used from co-routines. - -*/ - -#include -#include -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -/* Constants used with the cRxLock and cTxLock structure members. */ -#define queueUNLOCKED ( ( signed portBASE_TYPE ) -1 ) - -/* - * Definition of the queue used by the scheduler. - * Items are queued by copy, not reference. - */ -typedef struct QueueDefinition -{ - signed portCHAR *pcHead; /*< Points to the beginning of the queue storage area. */ - signed portCHAR *pcTail; /*< Points to the byte at the end of the queue storage area. Once more byte is allocated than necessary to store the queue items, this is used as a marker. */ - - signed portCHAR *pcWriteTo; /*< Points to the free next place in the storage area. */ - signed portCHAR *pcReadFrom; /*< Points to the last place that a queued item was read from. */ - - xList xTasksWaitingToSend; /*< List of tasks that are blocked waiting to post onto this queue. Stored in priority order. */ - xList xTasksWaitingToReceive; /*< List of tasks that are blocked waiting to read from this queue. Stored in priority order. */ - - unsigned portBASE_TYPE uxMessagesWaiting;/*< The number of items currently in the queue. */ - unsigned portBASE_TYPE uxLength; /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */ - unsigned portBASE_TYPE uxItemSize; /*< The size of each items that the queue will hold. */ - - signed portBASE_TYPE xRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ - signed portBASE_TYPE xTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ -} xQUEUE; -/*-----------------------------------------------------------*/ - -/* - * Inside this file xQueueHandle is a pointer to a xQUEUE structure. - * To keep the definition private the API header file defines it as a - * pointer to void. - */ -typedef xQUEUE * xQueueHandle; - -/* - * Prototypes for public functions are included here so we don't have to - * include the API header file (as it defines xQueueHandle differently). These - * functions are documented in the API header file. - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); -signed portBASE_TYPE xQueueSend( xQueueHandle xQueue, const void * pvItemToQueue, portTickType xTicksToWait ); -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue ); -void vQueueDelete( xQueueHandle xQueue ); -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ); -signed portBASE_TYPE xQueueReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - -#if configUSE_CO_ROUTINES == 1 - signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ); - signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ); - signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); -#endif - -/* - * Unlocks a queue locked by a call to prvLockQueue. Locking a queue does not - * prevent an ISR from adding or removing items to the queue, but does prevent - * an ISR from removing tasks from the queue event lists. If an ISR finds a - * queue is locked it will instead increment the appropriate queue lock count - * to indicate that a task may require unblocking. When the queue in unlocked - * these lock counts are inspected, and the appropriate action taken. - */ -static signed portBASE_TYPE prvUnlockQueue( xQueueHandle pxQueue ); - -/* - * Uses a critical section to determine if there is any data in a queue. - * - * @return pdTRUE if the queue contains no items, otherwise pdFALSE. - */ -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ); - -/* - * Uses a critical section to determine if there is any space in a queue. - * - * @return pdTRUE if there is no space, otherwise pdFALSE; - */ -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ); - -/* - * Macro that copies an item into the queue. This is done by copying the item - * byte for byte, not by reference. Updates the queue state to ensure it's - * integrity after the copy. - */ -#define prvCopyQueueData( pxQueue, pvItemToQueue ) \ -{ \ - memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( unsigned ) pxQueue->uxItemSize ); \ - ++( pxQueue->uxMessagesWaiting ); \ - pxQueue->pcWriteTo += pxQueue->uxItemSize; \ - if( pxQueue->pcWriteTo >= pxQueue->pcTail ) \ - { \ - pxQueue->pcWriteTo = pxQueue->pcHead; \ - } \ -} -/*-----------------------------------------------------------*/ - -/* - * Macro to mark a queue as locked. Locking a queue prevents an ISR from - * accessing the queue event lists. - */ -#define prvLockQueue( pxQueue ) \ -{ \ - taskENTER_CRITICAL(); \ - ++( pxQueue->xRxLock ); \ - ++( pxQueue->xTxLock ); \ - taskEXIT_CRITICAL(); \ -} -/*-----------------------------------------------------------*/ - - -/*----------------------------------------------------------- - * PUBLIC QUEUE MANAGEMENT API documented in queue.h - *----------------------------------------------------------*/ - -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ) -{ -xQUEUE *pxNewQueue; -size_t xQueueSizeInBytes; - - /* Allocate the new queue structure. */ - if( uxQueueLength > ( unsigned portBASE_TYPE ) 0 ) - { - pxNewQueue = ( xQUEUE * ) pvPortMalloc( sizeof( xQUEUE ) ); - if( pxNewQueue != NULL ) - { - /* Create the list of pointers to queue items. The queue is one byte - longer than asked for to make wrap checking easier/faster. */ - xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ) + ( size_t ) 1; - - pxNewQueue->pcHead = ( signed portCHAR * ) pvPortMalloc( xQueueSizeInBytes ); - if( pxNewQueue->pcHead != NULL ) - { - /* Initialise the queue members as described above where the - queue type is defined. */ - pxNewQueue->pcTail = pxNewQueue->pcHead + ( uxQueueLength * uxItemSize ); - pxNewQueue->uxMessagesWaiting = 0; - pxNewQueue->pcWriteTo = pxNewQueue->pcHead; - pxNewQueue->pcReadFrom = pxNewQueue->pcHead + ( ( uxQueueLength - 1 ) * uxItemSize ); - pxNewQueue->uxLength = uxQueueLength; - pxNewQueue->uxItemSize = uxItemSize; - pxNewQueue->xRxLock = queueUNLOCKED; - pxNewQueue->xTxLock = queueUNLOCKED; - - /* Likewise ensure the event queues start with the correct state. */ - vListInitialise( &( pxNewQueue->xTasksWaitingToSend ) ); - vListInitialise( &( pxNewQueue->xTasksWaitingToReceive ) ); - - return pxNewQueue; - } - else - { - vPortFree( pxNewQueue ); - } - } - } - - /* Will only reach here if we could not allocate enough memory or no memory - was required. */ - return NULL; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* Make sure other tasks do not access the queue. */ - vTaskSuspendAll(); - - /* It is important that this is the only thread/ISR that modifies the - ready or delayed lists until xTaskResumeAll() is called. Places where - the ready/delayed lists are modified include: - - + vTaskDelay() - Nothing can call vTaskDelay as the scheduler is - suspended, vTaskDelay() cannot be called from an ISR. - + vTaskPrioritySet() - Has a critical section around the access. - + vTaskSwitchContext() - This will not get executed while the scheduler - is suspended. - + prvCheckDelayedTasks() - This will not get executed while the - scheduler is suspended. - + xTaskCreate() - Has a critical section around the access. - + vTaskResume() - Has a critical section around the access. - + xTaskResumeAll() - Has a critical section around the access. - + xTaskRemoveFromEventList - Checks to see if the scheduler is - suspended. If so then the TCB being removed from the event is - removed from the event and added to the xPendingReadyList. - */ - - /* Make sure interrupts do not access the queue event list. */ - prvLockQueue( pxQueue ); - - /* It is important that interrupts to not access the event list of the - queue being modified here. Places where the event list is modified - include: - - + xQueueSendFromISR(). This checks the lock on the queue to see if - it has access. If the queue is locked then the Tx lock count is - incremented to signify that a task waiting for data can be made ready - once the queue lock is removed. If the queue is not locked then - a task can be moved from the event list, but will not be removed - from the delayed list or placed in the ready list until the scheduler - is unlocked. - - + xQueueReceiveFromISR(). As per xQueueSendFromISR(). - */ - - /* If the queue is already full we may have to block. */ - if( prvIsQueueFull( pxQueue ) ) - { - /* The queue is full - do we want to block or just leave without - posting? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* We are going to place ourselves on the xTasksWaitingToSend event - list, and will get woken should the delay expire, or space become - available on the queue. - - As detailed above we do not require mutual exclusion on the event - list as nothing else can modify it or the ready lists while we - have the scheduler suspended and queue locked. - - It is possible that an ISR has removed data from the queue since we - checked if any was available. If this is the case then the data - will have been copied from the queue, and the queue variables - updated, but the event list will not yet have been checked to see if - anything is waiting as the queue is locked. */ - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait ); - - /* Force a context switch now as we are blocked. We can do - this from within a critical section as the task we are - switching to has its own context. When we return here (i.e. we - unblock) we will leave the critical section as normal. - - It is possible that an ISR has caused an event on an unrelated and - unlocked queue. If this was the case then the event list for that - queue will have been updated but the ready lists left unchanged - - instead the readied task will have been added to the pending ready - list. */ - taskENTER_CRITICAL(); - { - /* We can safely unlock the queue and scheduler here as - interrupts are disabled. We must not yield with anything - locked, but we can yield from within a critical section. - - Tasks that have been placed on the pending ready list cannot - be tasks that are waiting for events on this queue. See - in comment xTaskRemoveFromEventList(). */ - prvUnlockQueue( pxQueue ); - - /* Resuming the scheduler may cause a yield. If so then there - is no point yielding again here. */ - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - - /* Before leaving the critical section we have to ensure - exclusive access again. */ - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - } - taskEXIT_CRITICAL(); - } - } - - /* When we are here it is possible that we unblocked as space became - available on the queue. It is also possible that an ISR posted to the - queue since we left the critical section, so it may be that again there - is no space. This would only happen if a task and ISR post onto the - same queue. */ - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - /* There is room in the queue, copy the data into the queue. */ - prvCopyQueueData( pxQueue, pvItemToQueue ); - xReturn = pdPASS; - - /* Update the TxLock count so prvUnlockQueue knows to check for - tasks waiting for data to become available in the queue. */ - ++( pxQueue->xTxLock ); - } - else - { - xReturn = errQUEUE_FULL; - } - } - taskEXIT_CRITICAL(); - - /* We no longer require exclusive access to the queue. prvUnlockQueue - will remove any tasks suspended on a receive if either this function - or an ISR has posted onto the queue. */ - if( prvUnlockQueue( pxQueue ) ) - { - /* Resume the scheduler - making ready any tasks that were woken - by an event while the scheduler was locked. Resuming the - scheduler may cause a yield, in which case there is no point - yielding again here. */ - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - } - else - { - /* Resume the scheduler - making ready any tasks that were woken - by an event while the scheduler was locked. */ - xTaskResumeAll(); - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ) -{ - /* Similar to xQueueSend, except we don't block if there is no room in the - queue. Also we don't directly wake a task that was blocked on a queue - read, instead we return a flag to say whether a context switch is required - or not (i.e. has a task with a higher priority than us been woken by this - post). */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - prvCopyQueueData( pxQueue, pvItemToQueue ); - - /* If the queue is locked we do not alter the event list. This will - be done when the queue is unlocked later. */ - if( pxQueue->xTxLock == queueUNLOCKED ) - { - /* We only want to wake one task per ISR, so check that a task has - not already been woken. */ - if( !xTaskPreviouslyWoken ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - return pdTRUE; - } - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was posted while it was locked. */ - ++( pxQueue->xTxLock ); - } - } - - return xTaskPreviouslyWoken; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* This function is very similar to xQueueSend(). See comments within - xQueueSend() for a more detailed explanation. - - Make sure other tasks do not access the queue. */ - vTaskSuspendAll(); - - /* Make sure interrupts do not access the queue. */ - prvLockQueue( pxQueue ); - - /* If there are no messages in the queue we may have to block. */ - if( prvIsQueueEmpty( pxQueue ) ) - { - /* There are no messages in the queue, do we want to block or just - leave with nothing? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); - taskENTER_CRITICAL(); - { - prvUnlockQueue( pxQueue ); - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - } - taskEXIT_CRITICAL(); - } - } - - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - /* Increment the lock count so prvUnlockQueue knows to check for - tasks waiting for space to become available on the queue. */ - ++( pxQueue->xRxLock ); - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - } - taskEXIT_CRITICAL(); - - /* We no longer require exclusive access to the queue. */ - if( prvUnlockQueue( pxQueue ) ) - { - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - } - else - { - xTaskResumeAll(); - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ) -{ -signed portBASE_TYPE xReturn; - - /* We cannot block from an ISR, so check there is data available. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Copy the data from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - /* If the queue is locked we will not modify the event list. Instead - we update the lock count so the task that unlocks the queue will know - that an ISR has removed data while the queue was locked. */ - if( pxQueue->xRxLock == queueUNLOCKED ) - { - /* We only want to wake one task per ISR, so check that a task has - not already been woken. */ - if( !( *pxTaskWoken ) ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - /* The task waiting has a higher priority than us so - force a context switch. */ - *pxTaskWoken = pdTRUE; - } - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was removed while it was locked. */ - ++( pxQueue->xRxLock ); - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue ) -{ -unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - uxReturn = pxQueue->uxMessagesWaiting; - taskEXIT_CRITICAL(); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -void vQueueDelete( xQueueHandle pxQueue ) -{ - vPortFree( pxQueue->pcHead ); - vPortFree( pxQueue ); -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvUnlockQueue( xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xYieldRequired = pdFALSE; - - /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */ - - /* The lock counts contains the number of extra data items placed or - removed from the queue while the queue was locked. When a queue is - locked items can be added or removed, but the event lists cannot be - updated. */ - taskENTER_CRITICAL(); - { - --( pxQueue->xTxLock ); - - /* See if data was added to the queue while it was locked. */ - if( pxQueue->xTxLock > queueUNLOCKED ) - { - pxQueue->xTxLock = queueUNLOCKED; - - /* Data was posted while the queue was locked. Are any tasks - blocked waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* Tasks that are removed from the event list will get added to - the pending ready list as the scheduler is still suspended. */ - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - xYieldRequired = pdTRUE; - } - } - } - } - taskEXIT_CRITICAL(); - - /* Do the same for the Rx lock. */ - taskENTER_CRITICAL(); - { - --( pxQueue->xRxLock ); - - if( pxQueue->xRxLock > queueUNLOCKED ) - { - pxQueue->xRxLock = queueUNLOCKED; - - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - xYieldRequired = pdTRUE; - } - } - } - } - taskEXIT_CRITICAL(); - - return xYieldRequired; -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == pxQueue->uxLength ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* If the queue is already full we may have to block. A critical section - is required to prevent an interrupt removing something from the queue - between the check to see if the queue is full and blocking on the queue. */ - portDISABLE_INTERRUPTS(); - { - if( prvIsQueueFull( pxQueue ) ) - { - /* The queue is full - do we want to block or just leave without - posting? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* As this is called from a coroutine we cannot block directly, but - return indicating that we need to block. */ - vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) ); - portENABLE_INTERRUPTS(); - return errQUEUE_BLOCKED; - } - else - { - portENABLE_INTERRUPTS(); - return errQUEUE_FULL; - } - } - } - portENABLE_INTERRUPTS(); - - portNOP(); - - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - /* There is room in the queue, copy the data into the queue. */ - prvCopyQueueData( pxQueue, pvItemToQueue ); - xReturn = pdPASS; - - /* Were any co-routines waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* In this instance the co-routine could be placed directly - into the ready list as we are within a critical section. - Instead the same pending ready list mechansim is used as if - the event were caused from within an interrupt. */ - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The co-routine waiting has a higher priority so record - that a yield might be appropriate. */ - xReturn = errQUEUE_YIELD; - } - } - } - else - { - xReturn = errQUEUE_FULL; - } - } - portENABLE_INTERRUPTS(); - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* If the queue is already empty we may have to block. A critical section - is required to prevent an interrupt adding something to the queue - between the check to see if the queue is empty and blocking on the queue. */ - portDISABLE_INTERRUPTS(); - { - if( prvIsQueueEmpty( pxQueue ) ) - { - /* There are no messages in the queue, do we want to block or just - leave with nothing? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* As this is a co-routine we cannot block directly, but return - indicating that we need to block. */ - vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) ); - portENABLE_INTERRUPTS(); - return errQUEUE_BLOCKED; - } - else - { - portENABLE_INTERRUPTS(); - return errQUEUE_FULL; - } - } - } - portENABLE_INTERRUPTS(); - - portNOP(); - - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Data is available from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - xReturn = pdPASS; - - /* Were any co-routines waiting for space to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - /* In this instance the co-routine could be placed directly - into the ready list as we are within a critical section. - Instead the same pending ready list mechansim is used as if - the event were caused from within an interrupt. */ - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - xReturn = errQUEUE_YIELD; - } - } - } - else - { - xReturn = pdFAIL; - } - } - portENABLE_INTERRUPTS(); - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - - - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ) -{ - /* Cannot block within an ISR so if there is no space on the queue then - exit without doing anything. */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - prvCopyQueueData( pxQueue, pvItemToQueue ); - - /* We only want to wake one co-routine per ISR, so check that a - co-routine has not already been woken. */ - if( !xCoRoutinePreviouslyWoken ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - return pdTRUE; - } - } - } - } - - return xCoRoutinePreviouslyWoken; -} -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxCoRoutineWoken ) -{ -signed portBASE_TYPE xReturn; - - /* We cannot block from an ISR, so check there is data available. If - not then just leave without doing anything. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Copy the data from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - if( !( *pxCoRoutineWoken ) ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - *pxCoRoutineWoken = pdTRUE; - } - } - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/tasks.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/tasks.c deleted file mode 100644 index cfc8e301..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/freertos/tasks.c +++ /dev/null @@ -1,1771 +0,0 @@ -/* - FreeRTOS.org V4.0.5 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.00: - - + Call to portRESTORE_CONTEXT has been removed. The first context - switch is now performed within sPortStartScheduler(). - -Changes from V1.01: - - + More use of 8bit data types. - + Function name prefixes changed where the data type returned has changed. - + configUSE_TRACE_FACILITY is no longer defined by default. - -Changes from V1.2.0 - - + Introduced ucTopReadyPriority. This tracks the highest priority ready - queue that contains a valid TCB and thus makes the context switch - slightly faster. - - + prvAddTaskToReadyQueue() has been made a macro. - -Changes from V1.2.6 - - + Added conditional compilation directives. - + Extended API. - + Rearranged function order. - + Creating a task now causes a context switch if the task being created - has a higher priority than the calling task - assuming the kernel is - running. - + vTaskDelete() now only causes a context switch if the calling task is - the task being deleted. - -Changes from V2.0.0 - - + Allow the type of the tick count to be 16 or 32 bits. - + Introduce xPendingReadyList feature to allow the time interrupts have to - be disabled to be minimised. - + Remove the #if( INCLUDE_vTaskSuspendAll ) statements. vTaskSuspendAll() - is now always included as it is used by the scheduler itself. - -Changes from V2.1.0 - - + Bug fix - pxCurrentTCB is now initialised before the call to - prvInitializeTaskLists(). Previously pxCurrentTCB could be accessed - while null. - -Changed from V2.1.1 - - + Change to where lStackSize is declared within sTaskCreate() to prevent - compiler warnings with 8051 port. - -Changes from V2.2.0 - - + Explicit use of 'signed' qualifier on portCHAR types added. - + Changed odd calculation of initial pxTopOfStack value when - portSTACK_GROWTH < 0. - + Removed pcVersionNumber definition. - -Changes from V2.5.3 - - + cTaskResumeAll() modified to ensure it can be called prior to the task - lists being initialised. - -Changes from V2.5.5 - - + Added API function vTaskDelayUntil(). - + Added INCLUDE_vTaskDelay conditional compilation. - -Changes from V2.6.0 - - + Updated the vWriteTraceToBuffer macro to always be 4 byte aligned so it - can be used on ARM architectures. - + tskMAX_TASK_NAME_LEN definition replaced with the port specific - configMAX_TASK_NAME_LEN definition. - + Removed the call to strcpy when copying across the task name into the - TCB. - + Added ucTasksDeleted variable to prevent vTaskSuspendAll() being called - too often in the idle task. - -Changes between V3.0.0 and V2.6.1 - - + When resuming the scheduler a yield is performed if either a tick has - been missed, or a task is moved from the pending ready list into a ready - list. Previously a yield was not performed on this second condition. - + Introduced the type portBASE_TYPE. This necessitates several API - changes. - + Removed the sUsingPreemption variable. The constant defined in - portmacro.h is now used directly. - + The idle task can now include an optional hook function - and no longer - completes its time slice if other tasks with equal priority to it are - ready to run. - + See the FreeRTOS.org documentation for more information on V2.x.x to - V3.x.x modifications. - -Changes from V3.1.1 - - + Modified vTaskPrioritySet() and vTaskResume() to allow these functions to - be called while the scheduler is suspended. - + Corrected the task ordering within event lists. - -Changes from V3.2.0 - - + Added function xTaskGetCurrentTaskHandle(). - -Changes from V3.2.4 - - + Changed the volatile declarations on some variables to reflect the - changes to the list definitions. - + Changed the order of the TCB definition so there is commonality between - the task control block and a co-routine control block. - + Allow the scheduler to be started even if no tasks other than the idle - task has been created. This allows co-routines to run even when no tasks - have been created. - + The need for a context switch is now signalled if a task woken by an - event has a priority greater or equal to the currently running task. - Previously this was only greater than. - -Changes from V4.0.0 - - + Added the xMissedYield handling. - -Changes from V4.0.1 - - + The function vTaskList() now suspends the scheduler rather than disabling - interrupts during the creation of the task list. - + Allow a task to delete itself by passing in its own handle. Previously - this could only be done by passing in NULL. - + The tick hook function is now called only within a tick isr. Previously - it was also called when the tick function was called during the scheduler - unlocking process. - -Changes from V4.0.3 - - + Extra checks have been placed in vTaskPrioritySet() to avoid unnecessary - yields. - -Changed from V4.0.4 - - + Bug fix: The 'value' of the event list item is updated when the priority - of a task is changed. Previously only the priority of the TCB itself was - changed. - + When resuming a task a check is first made to see if the task is actually - suspended. - + vTaskPrioritySet() and vTaskResume() no longer use the event list item. - This has not been necessary since V4.0.1 when the xMissedYield handling - was added. - + Implement xTaskResumeFromISR(). -*/ - -#include -#include -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* - * Macro to define the amount of stack available to the idle task. - */ -#define tskIDLE_STACK_SIZE configMINIMAL_STACK_SIZE - - -/* - * Default a definitions for backwards compatibility with old - * portmacro.h files. - */ -#ifndef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 16 -#endif - -#ifndef INCLUDE_xTaskGetCurrentTaskHandle - #define INCLUDE_xTaskGetCurrentTaskHandle 0 -#endif - -#ifndef configIDLE_SHOULD_YIELD - #define configIDLE_SHOULD_YIELD 1 -#endif - -#if configMAX_TASK_NAME_LEN < 1 - #undef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 1 -#endif - -#ifndef INCLUDE_xTaskResumeFromISR - #define INCLUDE_xTaskResumeFromISR 1 -#endif - -/* - * Task control block. A task control block (TCB) is allocated to each task, - * and stores the context of the task. - */ -typedef struct tskTaskControlBlock -{ - volatile portSTACK_TYPE *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE STRUCT. */ - xListItem xGenericListItem; /*< List item used to place the TCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the TCB in event lists. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the task where 0 is the lowest priority. */ - portSTACK_TYPE *pxStack; /*< Points to the start of the stack. */ - unsigned portBASE_TYPE uxTCBNumber; /*< This is used for tracing the scheduler and making debugging easier only. */ - signed portCHAR pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */ - unsigned portSHORT usStackDepth; /*< Total depth of the stack (when empty). This is defined as the number of variables the stack can hold, not the number of bytes. */ -} tskTCB; - -/*lint -e956 */ - -tskTCB * volatile pxCurrentTCB = NULL; - -/* Lists for ready and blocked tasks. --------------------*/ - -static xList pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */ -static xList xDelayedTaskList1; /*< Delayed tasks. */ -static xList xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */ -static xList * volatile pxDelayedTaskList; /*< Points to the delayed task list currently being used. */ -static xList * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */ -static xList xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready queue when the scheduler is resumed. */ - -#if ( INCLUDE_vTaskDelete == 1 ) - - static volatile xList xTasksWaitingTermination; /*< Tasks that have been deleted - but the their memory not yet freed. */ - static volatile unsigned portBASE_TYPE uxTasksDeleted = ( unsigned portBASE_TYPE ) 0; - -#endif - -#if ( INCLUDE_vTaskSuspend == 1 ) - - static xList xSuspendedTaskList; /*< Tasks that are currently suspended. */ - -#endif - -/* File private variables. --------------------------------*/ -static volatile unsigned portBASE_TYPE uxCurrentNumberOfTasks = ( unsigned portBASE_TYPE ) 0; -static volatile portTickType xTickCount = ( portTickType ) 0; -static unsigned portBASE_TYPE uxTopUsedPriority = tskIDLE_PRIORITY; -static volatile unsigned portBASE_TYPE uxTopReadyPriority = tskIDLE_PRIORITY; -static volatile signed portBASE_TYPE xSchedulerRunning = pdFALSE; -static volatile unsigned portBASE_TYPE uxSchedulerSuspended = ( unsigned portBASE_TYPE ) pdFALSE; -static volatile unsigned portBASE_TYPE uxMissedTicks = ( unsigned portBASE_TYPE ) 0; -static volatile portBASE_TYPE xMissedYield = ( portBASE_TYPE ) pdFALSE; - -/* Debugging and trace facilities private variables and macros. ------------*/ - -/* - * The value used to fill the stack of a task when the task is created. This - * is used purely for checking the high water mark for tasks. - */ -#define tskSTACK_FILL_BYTE ( 0xa5 ) - -/* - * Macros used by vListTask to indicate which state a task is in. - */ -#define tskBLOCKED_CHAR ( ( signed portCHAR ) 'B' ) -#define tskREADY_CHAR ( ( signed portCHAR ) 'R' ) -#define tskDELETED_CHAR ( ( signed portCHAR ) 'D' ) -#define tskSUSPENDED_CHAR ( ( signed portCHAR ) 'S' ) - -/* - * Macros and private variables used by the trace facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define tskSIZE_OF_EACH_TRACE_LINE ( ( unsigned portLONG ) ( sizeof( unsigned portLONG ) + sizeof( unsigned portLONG ) ) ) - static volatile signed portCHAR * volatile pcTraceBuffer; - static signed portCHAR *pcTraceBufferStart; - static signed portCHAR *pcTraceBufferEnd; - static signed portBASE_TYPE xTracing = pdFALSE; - -#endif - -/* - * Macro that writes a trace of scheduler activity to a buffer. This trace - * shows which task is running when and is very useful as a debugging tool. - * As this macro is called each context switch it is a good idea to undefine - * it if not using the facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define vWriteTraceToBuffer() \ - { \ - if( xTracing ) \ - { \ - static unsigned portBASE_TYPE uxPreviousTask = 255; \ - \ - if( uxPreviousTask != pxCurrentTCB->uxTCBNumber ) \ - { \ - if( ( pcTraceBuffer + tskSIZE_OF_EACH_TRACE_LINE ) < pcTraceBufferEnd ) \ - { \ - uxPreviousTask = pxCurrentTCB->uxTCBNumber; \ - *( unsigned portLONG * ) pcTraceBuffer = ( unsigned portLONG ) xTickCount; \ - pcTraceBuffer += sizeof( unsigned portLONG ); \ - *( unsigned portLONG * ) pcTraceBuffer = ( unsigned portLONG ) uxPreviousTask; \ - pcTraceBuffer += sizeof( unsigned portLONG ); \ - } \ - else \ - { \ - xTracing = pdFALSE; \ - } \ - } \ - } \ - } - -#else - - #define vWriteTraceToBuffer() - -#endif - - -/* - * Place the task represented by pxTCB into the appropriate ready queue for - * the task. It is inserted at the end of the list. One quirk of this is - * that if the task being inserted is at the same priority as the currently - * executing task, then it will only be rescheduled after the currently - * executing task has been rescheduled. - */ -#define prvAddTaskToReadyQueue( pxTCB ) \ -{ \ - if( pxTCB->uxPriority > uxTopReadyPriority ) \ - { \ - uxTopReadyPriority = pxTCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyTasksLists[ pxTCB->uxPriority ] ), &( pxTCB->xGenericListItem ) ); \ -} - -/* - * Macro that looks at the list of tasks that are currently delayed to see if - * any require waking. - * - * Tasks are stored in the queue in the order of their wake time - meaning - * once one tasks has been found whose timer has not expired we need not look - * any further down the list. - */ -#define prvCheckDelayedTasks() \ -{ \ -register tskTCB *pxTCB; \ - \ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ) ) != NULL ) \ - { \ - if( xTickCount < listGET_LIST_ITEM_VALUE( &( pxTCB->xGenericListItem ) ) ) \ - { \ - break; \ - } \ - vListRemove( &( pxTCB->xGenericListItem ) ); \ - /* Is the task waiting on an event also? */ \ - if( pxTCB->xEventListItem.pvContainer ) \ - { \ - vListRemove( &( pxTCB->xEventListItem ) ); \ - } \ - prvAddTaskToReadyQueue( pxTCB ); \ - } \ -} - -/* - * Several functions take an xTaskHandle parameter that can optionally be NULL, - * where NULL is used to indicate that the handle of the currently executing - * task should be used in place of the parameter. This macro simply checks to - * see if the parameter is NULL and returns a pointer to the appropriate TCB. - */ -#define prvGetTCBFromHandle( pxHandle ) ( ( pxHandle == NULL ) ? ( tskTCB * ) pxCurrentTCB : ( tskTCB * ) pxHandle ) - - -/* File private functions. --------------------------------*/ - -/* - * Utility to ready a TCB for a given task. Mainly just copies the parameters - * into the TCB structure. - */ -static void prvInitialiseTCBVariables( tskTCB *pxTCB, unsigned portSHORT usStackDepth, const signed portCHAR * const pcName, unsigned portBASE_TYPE uxPriority ); - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first task. - */ -static void prvInitialiseTaskLists( void ); - -/* - * The idle task, which as all tasks is implemented as a never ending loop. - * The idle task is automatically created and added to the ready lists upon - * creation of the first user task. - * - * The portTASK_FUNCTION_PROTO() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters ); - -/* - * Utility to free all memory allocated by the scheduler to hold a TCB, - * including the stack pointed to by the TCB. - * - * This does not free memory allocated by the task itself (i.e. memory - * allocated by calls to pvPortMalloc from within the tasks application code). - */ -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - static void prvDeleteTCB( tskTCB *pxTCB ); -#endif - -/* - * Used only by the idle task. This checks to see if anything has been placed - * in the list of tasks waiting to be deleted. If so the task is cleaned up - * and its TCB deleted. - */ -static void prvCheckTasksWaitingTermination( void ); - -/* - * Allocates memory from the heap for a TCB and associated stack. Checks the - * allocation was successful. - */ -static tskTCB *prvAllocateTCBAndStack( unsigned portSHORT usStackDepth ); - -/* - * Called from vTaskList. vListTasks details all the tasks currently under - * control of the scheduler. The tasks may be in one of a number of lists. - * prvListTaskWithinSingleList accepts a list and details the tasks from - * within just that list. - * - * THIS FUNCTION IS INTENDED FOR DEBUGGING ONLY, AND SHOULD NOT BE CALLED FROM - * NORMAL APPLICATION CODE. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( signed portCHAR *pcWriteBuffer, xList *pxList, signed portCHAR cStatus ); - -#endif - -/* - * When a task is created, the stack of the task is filled with a known value. - * This function determines the 'high water mark' of the task stack by - * determining how much of the stack remains at the original preset value. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned portSHORT usTaskCheckFreeStackSpace( const unsigned portCHAR *pucStackByte ); - -#endif - -/*lint +e956 */ - - - - - -/*----------------------------------------------------------- - * TASK CREATION API documented in task.h - *----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask ) -{ -signed portBASE_TYPE xReturn; -tskTCB * pxNewTCB; -static unsigned portBASE_TYPE uxTaskNumber = 0; /*lint !e956 Static is deliberate - this is guarded before use. */ - - /* Allocate the memory required by the TCB and stack for the new task. - checking that the allocation was successful. */ - pxNewTCB = prvAllocateTCBAndStack( usStackDepth ); - - if( pxNewTCB != NULL ) - { - portSTACK_TYPE *pxTopOfStack; - - /* Setup the newly allocated TCB with the initial state of the task. */ - prvInitialiseTCBVariables( pxNewTCB, usStackDepth, pcName, uxPriority ); - - /* Calculate the top of stack address. This depends on whether the - stack grows from high memory to low (as per the 80x86) or visa versa. - portSTACK_GROWTH is used to make the result positive or negative as - required by the port. */ - #if portSTACK_GROWTH < 0 - { - pxTopOfStack = pxNewTCB->pxStack + ( pxNewTCB->usStackDepth - 1 ); - } - #else - { - pxTopOfStack = pxNewTCB->pxStack; - } - #endif - - /* Initialize the TCB stack to look as if the task was already running, - but had been interrupted by the scheduler. The return address is set - to the start of the task function. Once the stack has been initialised - the top of stack variable is updated. */ - pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pvTaskCode, pvParameters ); - - /* We are going to manipulate the task queues to add this task to a - ready list, so must make sure no interrupts occur. */ - portENTER_CRITICAL(); - { - uxCurrentNumberOfTasks++; - if( uxCurrentNumberOfTasks == ( unsigned portBASE_TYPE ) 1 ) - { - /* As this is the first task it must also be the current task. */ - pxCurrentTCB = pxNewTCB; - - /* This is the first task to be created so do the preliminary - initialisation required. We will not recover if this call - fails, but we will report the failure. */ - prvInitialiseTaskLists(); - } - else - { - /* If the scheduler is not already running, make this task the - current task if it is the highest priority task to be created - so far. */ - if( xSchedulerRunning == pdFALSE ) - { - if( pxCurrentTCB->uxPriority <= uxPriority ) - { - pxCurrentTCB = pxNewTCB; - } - } - } - - /* Remember the top priority to make context switching faster. Use - the priority in pxNewTCB as this has been capped to a valid value. */ - if( pxNewTCB->uxPriority > uxTopUsedPriority ) - { - uxTopUsedPriority = pxNewTCB->uxPriority; - } - - /* Add a counter into the TCB for tracing only. */ - pxNewTCB->uxTCBNumber = uxTaskNumber; - uxTaskNumber++; - - prvAddTaskToReadyQueue( pxNewTCB ); - - xReturn = pdPASS; - } - portEXIT_CRITICAL(); - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - if( xReturn == pdPASS ) - { - if( ( void * ) pxCreatedTask != NULL ) - { - /* Pass the TCB out - in an anonymous way. The calling function/ - task can use this as a handle to delete the task later if - required.*/ - *pxCreatedTask = ( xTaskHandle ) pxNewTCB; - } - - if( xSchedulerRunning != pdFALSE ) - { - /* If the created task is of a higher priority than the current task - then it should run now. */ - if( pxCurrentTCB->uxPriority < uxPriority ) - { - taskYIELD(); - } - } - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelete == 1 ) - - void vTaskDelete( xTaskHandle pxTaskToDelete ) - { - tskTCB *pxTCB; - - taskENTER_CRITICAL(); - { - /* Ensure a yield is performed if the current task is being - deleted. */ - if( pxTaskToDelete == pxCurrentTCB ) - { - pxTaskToDelete = NULL; - } - - /* If null is passed in here then we are deleting ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToDelete ); - - /* Remove task from the ready list and place in the termination list. - This will stop the task from be scheduled. The idle task will check - the termination list and free up any memory allocated by the - scheduler for the TCB and stack. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xTasksWaitingTermination, &( pxTCB->xGenericListItem ) ); - - /* Increment the ucTasksDeleted variable so the idle task knows - there is a task that has been deleted and that it should therefore - check the xTasksWaitingTermination list. */ - ++uxTasksDeleted; - } - taskEXIT_CRITICAL(); - - /* Force a reschedule if we have just deleted the current task. */ - if( xSchedulerRunning != pdFALSE ) - { - if( ( void * ) pxTaskToDelete == NULL ) - { - taskYIELD(); - } - } - } - -#endif - - - - - - -/*----------------------------------------------------------- - * TASK CONTROL API documented in task.h - *----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelayUntil == 1 ) - - void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement ) - { - portTickType xTimeToWake; - portBASE_TYPE xAlreadyYielded, xShouldDelay = pdFALSE; - - vTaskSuspendAll(); - { - /* Generate the tick time at which the task wants to wake. */ - xTimeToWake = *pxPreviousWakeTime + xTimeIncrement; - - if( xTickCount < *pxPreviousWakeTime ) - { - /* The tick count has overflowed since this function was - lasted called. In this case the only time we should ever - actually delay is if the wake time has also overflowed, - and the wake time is greater than the tick time. When this - is the case it is as if neither time had overflowed. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - else - { - /* The tick time has not overflowed. In this case we will - delay if either the wake time has overflowed, and/or the - tick time is less than the wake time. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - - /* Update the wake time ready for the next call. */ - *pxPreviousWakeTime = xTimeToWake; - - if( xShouldDelay ) - { - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - } - xAlreadyYielded = xTaskResumeAll(); - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelay == 1 ) - - void vTaskDelay( portTickType xTicksToDelay ) - { - portTickType xTimeToWake; - signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* A delay time of zero just forces a reschedule. */ - if( xTicksToDelay > ( portTickType ) 0 ) - { - vTaskSuspendAll(); - { - /* A task that is removed from the event list while the - scheduler is suspended will not get placed in the ready - list or removed from the blocked list until the scheduler - is resumed. - - This task cannot be in an event list as it is the currently - executing task. */ - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - xAlreadyYielded = xTaskResumeAll(); - } - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_uxTaskPriorityGet == 1 ) - - unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxReturn = pxTCB->uxPriority; - } - taskEXIT_CRITICAL(); - - return uxReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskPrioritySet == 1 ) - - void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxCurrentPriority, xYieldRequired = pdFALSE; - - /* Ensure the new priority is valid. */ - if( uxNewPriority >= configMAX_PRIORITIES ) - { - uxNewPriority = configMAX_PRIORITIES - 1; - } - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxCurrentPriority = pxTCB->uxPriority; - - if( uxCurrentPriority != uxNewPriority ) - { - /* The priority change may have readied a task of higher - priority than the calling task. */ - if( uxNewPriority > pxCurrentTCB->uxPriority ) - { - if( pxTask != NULL ) - { - /* The priority of another task is being raised. If we - were raising the priority of the currently running task - there would be no need to switch as it must have already - been the highest priority task. */ - xYieldRequired = pdTRUE; - } - } - else if( pxTask == NULL ) - { - /* Setting our own priority down means there may now be another - task of higher priority that is ready to execute. */ - xYieldRequired = pdTRUE; - } - - pxTCB->uxPriority = uxNewPriority; - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxNewPriority ); - - /* If the task is in the blocked or suspended list we need do - nothing more than change it's priority variable. However, if - the task is in a ready list it needs to be removed and placed - in the queue appropriate to its new priority. */ - if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxCurrentPriority ] ), &( pxTCB->xGenericListItem ) ) ) - { - /* The task is currently in its ready list - remove before adding - it to it's new ready list. As we are in a critical section we - can do this even if the scheduler is suspended. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - - if( xYieldRequired == pdTRUE ) - { - taskYIELD(); - } - } - } - taskEXIT_CRITICAL(); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskSuspend( xTaskHandle pxTaskToSuspend ) - { - tskTCB *pxTCB; - - taskENTER_CRITICAL(); - { - /* Ensure a yield is performed if the current task is being - suspended. */ - if( pxTaskToSuspend == pxCurrentTCB ) - { - pxTaskToSuspend = NULL; - } - - /* If null is passed in here then we are suspending ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToSuspend ); - - /* Remove task from the ready/delayed list and place in the suspended list. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ); - } - taskEXIT_CRITICAL(); - - /* We may have just suspended the current task. */ - if( ( void * ) pxTaskToSuspend == NULL ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskResume( xTaskHandle pxTaskToResume ) - { - tskTCB *pxTCB; - - /* Remove the task from whichever list it is currently in, and place - it in the ready list. */ - pxTCB = ( tskTCB * ) pxTaskToResume; - - /* The parameter cannot be NULL as it is impossible to resume the - currently executing task. */ - if( pxTCB != NULL ) - { - taskENTER_CRITICAL(); - { - /* Is the task we are attempting to resume actually suspended? */ - if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ) != pdFALSE ) - { - /* Has the task already been resumed from within an ISR? */ - if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) != pdTRUE ) - { - /* As we are in a critical section we can access the ready - lists even if the scheduler is suspended. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* We may have just resumed a higher priority task. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - /* This yield may not cause the task just resumed to run, but - will leave the lists in the correct state for the next yield. */ - taskYIELD(); - } - } - } - } - taskEXIT_CRITICAL(); - } - } - -#endif - -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - tskTCB *pxTCB; - - pxTCB = ( tskTCB * ) pxTaskToResume; - - /* Is the task we are attempting to resume actually suspended? */ - if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ) != pdFALSE ) - { - /* Has the task already been resumed from within an ISR? */ - if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) != pdTRUE ) - { - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - xYieldRequired = ( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed, at which point a - yield will be preformed if necessary. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxTCB->xEventListItem ) ); - } - } - } - - return xYieldRequired; - } - -#endif - - - - -/*----------------------------------------------------------- - * PUBLIC SCHEDULER CONTROL documented in task.h - *----------------------------------------------------------*/ - - -void vTaskStartScheduler( void ) -{ -portBASE_TYPE xReturn; - - /* Add the idle task at the lowest priority. */ - xReturn = xTaskCreate( prvIdleTask, ( signed portCHAR * ) "IDLE", tskIDLE_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, ( xTaskHandle * ) NULL ); - - if( xReturn == pdPASS ) - { - /* Interrupts are turned off here, to ensure a tick does not occur - before or during the call to xPortStartScheduler(). The stacks of - the created tasks contain a status word with interrupts switched on - so interrupts will automatically get re-enabled when the first task - starts to run. - - STEPPING THROUGH HERE USING A DEBUGGER CAN CAUSE BIG PROBLEMS IF THE - DEBUGGER ALLOWS INTERRUPTS TO BE PROCESSED. */ - portDISABLE_INTERRUPTS(); - - xSchedulerRunning = pdTRUE; - xTickCount = ( portTickType ) 0; - - /* Setting up the timer tick is hardware specific and thus in the - portable interface. */ - if( xPortStartScheduler() ) - { - /* Should not reach here as if the scheduler is running the - function will not return. */ - } - else - { - /* Should only reach here if a task calls xTaskEndScheduler(). */ - } - } -} -/*-----------------------------------------------------------*/ - -void vTaskEndScheduler( void ) -{ - /* Stop the scheduler interrupts and call the portable scheduler end - routine so the original ISRs can be restored if necessary. The port - layer must ensure interrupts enable bit is left in the correct state. */ - portDISABLE_INTERRUPTS(); - xSchedulerRunning = pdFALSE; - vPortEndScheduler(); -} -/*----------------------------------------------------------*/ - -void vTaskSuspendAll( void ) -{ - portENTER_CRITICAL(); - ++uxSchedulerSuspended; - portEXIT_CRITICAL(); -} -/*----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskResumeAll( void ) -{ -register tskTCB *pxTCB; -signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* It is possible that an ISR caused a task to be removed from an event - list while the scheduler was suspended. If this was the case then the - removed task will have been added to the xPendingReadyList. Once the - scheduler has been resumed it is safe to move all the pending ready - tasks from this list into their appropriate ready list. */ - portENTER_CRITICAL(); - { - --uxSchedulerSuspended; - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - if( uxCurrentNumberOfTasks > ( unsigned portBASE_TYPE ) 0 ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - - /* Move any readied tasks from the pending list into the - appropriate ready list. */ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xPendingReadyList ) ) ) != NULL ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* If we have moved a task that has a priority higher than - the current task then we should yield. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - xYieldRequired = pdTRUE; - } - } - - /* If any ticks occurred while the scheduler was suspended then - they should be processed now. This ensures the tick count does not - slip, and that any delayed tasks are resumed at the correct time. */ - if( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - while( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskIncrementTick(); - --uxMissedTicks; - } - - /* As we have processed some ticks it is appropriate to yield - to ensure the highest priority task that is ready to run is - the task actually running. */ - xYieldRequired = pdTRUE; - } - - if( ( xYieldRequired == pdTRUE ) || ( xMissedYield == pdTRUE ) ) - { - xAlreadyYielded = pdTRUE; - xMissedYield = pdFALSE; - taskYIELD(); - } - } - } - } - portEXIT_CRITICAL(); - - return xAlreadyYielded; -} - - - - - - -/*----------------------------------------------------------- - * PUBLIC TASK UTILITIES documented in task.h - *----------------------------------------------------------*/ - - - -portTickType xTaskGetTickCount( void ) -{ -portTickType xTicks; - - /* Critical section required if running on a 16 bit processor. */ - taskENTER_CRITICAL(); - { - xTicks = xTickCount; - } - taskEXIT_CRITICAL(); - - return xTicks; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ) -{ -unsigned portBASE_TYPE uxNumberOfTasks; - - taskENTER_CRITICAL(); - uxNumberOfTasks = uxCurrentNumberOfTasks; - taskEXIT_CRITICAL(); - - return uxNumberOfTasks; -} -/*-----------------------------------------------------------*/ - -#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_vTaskDelete == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskList( signed portCHAR *pcWriteBuffer ) - { - unsigned portBASE_TYPE uxQueue; - - /* This is a VERY costly function that should be used for debug only. - It leaves interrupts disabled for a LONG time. */ - - vTaskSuspendAll(); - { - /* Run through all the lists that could potentially contain a TCB and - report the task name, state and stack high water mark. */ - - pcWriteBuffer[ 0 ] = ( signed portCHAR ) 0x00; - strcat( ( portCHAR * ) pcWriteBuffer, ( const portCHAR * ) "\r\n" ); - - uxQueue = uxTopUsedPriority + 1; - - do - { - uxQueue--; - - if( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxQueue ] ) ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &( pxReadyTasksLists[ uxQueue ] ), tskREADY_CHAR ); - } - }while( uxQueue > ( unsigned portSHORT ) tskIDLE_PRIORITY ); - - if( !listLIST_IS_EMPTY( pxDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( pxOverflowDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxOverflowDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( &xTasksWaitingTermination ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xTasksWaitingTermination, tskDELETED_CHAR ); - } - - if( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xSuspendedTaskList, tskSUSPENDED_CHAR ); - } - } - xTaskResumeAll(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - void vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize ) - { - portENTER_CRITICAL(); - { - pcTraceBuffer = ( volatile signed portCHAR * volatile )pcBuffer; - pcTraceBufferStart = pcBuffer; - pcTraceBufferEnd = pcBuffer + ( ulBufferSize - tskSIZE_OF_EACH_TRACE_LINE ); - xTracing = pdTRUE; - } - portEXIT_CRITICAL(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned portLONG ulTaskEndTrace( void ) - { - unsigned portLONG ulBufferLength; - - portENTER_CRITICAL(); - xTracing = pdFALSE; - portEXIT_CRITICAL(); - - ulBufferLength = ( unsigned portLONG ) ( pcTraceBuffer - pcTraceBufferStart ); - - return ulBufferLength; - } - -#endif - - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - * documented in task.h - *----------------------------------------------------------*/ - - -inline void vTaskIncrementTick( void ) -{ - /* Called by the portable layer each time a tick interrupt occurs. - Increments the tick then checks to see if the new tick value will cause any - tasks to be unblocked. */ - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - ++xTickCount; - if( xTickCount == ( portTickType ) 0 ) - { - xList *pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. - If there are any items in pxDelayedTaskList here then there is - an error! */ - pxTemp = pxDelayedTaskList; - pxDelayedTaskList = pxOverflowDelayedTaskList; - pxOverflowDelayedTaskList = pxTemp; - } - - /* See if this tick has made a timeout expire. */ - prvCheckDelayedTasks(); - } - else - { - ++uxMissedTicks; - - /* The tick hook gets called at regular intervals, even if the - scheduler is locked. */ - #if ( configUSE_TICK_HOOK == 1 ) - { - extern void vApplicationTickHook( void ); - - vApplicationTickHook(); - } - #endif - } - - #if ( configUSE_TICK_HOOK == 1 ) - { - extern void vApplicationTickHook( void ); - - /* Guard against the tick hook being called when the missed tick - count is being unwound (when the scheduler is being unlocked. */ - if( uxMissedTicks == 0 ) - { - vApplicationTickHook(); - } - } - #endif -} -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_vTaskCleanUpResources == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskCleanUpResources( void ) - { - unsigned portSHORT usQueue; - volatile tskTCB *pxTCB; - - usQueue = ( unsigned portSHORT ) uxTopUsedPriority + ( unsigned portSHORT ) 1; - - /* Remove any TCB's from the ready queues. */ - do - { - usQueue--; - - while( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ usQueue ] ) ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &( pxReadyTasksLists[ usQueue ] ) ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - }while( usQueue > ( unsigned portSHORT ) tskIDLE_PRIORITY ); - - /* Remove any TCB's from the delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList1 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList1 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - /* Remove any TCB's from the overflow delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList2 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList2 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - while( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xSuspendedTaskList ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - while( !listLIST_IS_EMPTY( &xPendingReadyList ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xPendingReadyList ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - } - -#endif -/*-----------------------------------------------------------*/ - -void vTaskSwitchContext( void ) -{ - if( uxSchedulerSuspended != ( unsigned portBASE_TYPE ) pdFALSE ) - { - /* The scheduler is currently suspended - do not allow a context - switch. */ - xMissedYield = pdTRUE; - return; - } - - /* Find the highest priority queue that contains ready tasks. */ - while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopReadyPriority ] ) ) ) - { - --uxTopReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the tasks of the - same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopReadyPriority ] ) ); - vWriteTraceToBuffer(); -} -/*-----------------------------------------------------------*/ - -void vTaskPlaceOnEventList( xList *pxEventList, portTickType xTicksToWait ) -{ -portTickType xTimeToWake; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. */ - - /* Place the event list item of the TCB in the appropriate event list. - This is placed in the list in priority order so the highest priority task - is the first to be woken by the event. */ - vListInsert( ( xList * ) pxEventList, ( xListItem * ) &( pxCurrentTCB->xEventListItem ) ); - - /* Calculate the time at which the task should be woken if the event does - not occur. This may overflow but this doesn't matter. */ - xTimeToWake = xTickCount + xTicksToWait; - - /* We must remove ourselves from the ready list before adding ourselves - to the blocked list as the same list item is used for both lists. We have - exclusive access to the ready lists as the scheduler is locked. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskRemoveFromEventList( const xList *pxEventList ) -{ -tskTCB *pxUnblockedTCB; -portBASE_TYPE xReturn; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. It can also be called from within an ISR. */ - - /* The event list is sorted in priority order, so we can remove the - first in the list, remove the TCB from the delayed list, and add - it to the ready list. - - If an event is for a queue that is locked then this function will never - get called - the lock count on the queue will get modified instead. This - means we can always expect exclusive access to the event list here. */ - pxUnblockedTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedTCB->xEventListItem ) ); - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - vListRemove( &( pxUnblockedTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxUnblockedTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) ); - } - - if( pxUnblockedTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - /* Return true if the task removed from the event list has - a higher priority than the calling task. This allows - the calling task to know if it should force a context - switch now. */ - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} - - - - - -/* - * ----------------------------------------------------------- - * The Idle task. - * ---------------------------------------------------------- - * - * The portTASK_FUNCTION() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION( prvIdleTask, pvParameters ) -{ - /* Stop warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /* See if any tasks have been deleted. */ - prvCheckTasksWaitingTermination(); - - #if ( configUSE_PREEMPTION == 0 ) - { - /* If we are not using preemption we keep forcing a task switch to - see if any other task has become available. If we are using - preemption we don't need to do this as any task becoming available - will automatically get the processor anyway. */ - taskYIELD(); - } - #endif - - #if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) - { - /* When using preemption tasks of equal priority will be - timesliced. If a task that is sharing the idle priority is ready - to run then the idle task should yield before the end of the - timeslice. - - A critical region is not required here as we are just reading from - the list, and an occasional incorrect value will not matter. If - the ready list at the idle priority contains more than one task - then a task other than the idle task is ready to execute. */ - if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( unsigned portBASE_TYPE ) 1 ) - { - taskYIELD(); - } - } - #endif - - #if ( configUSE_IDLE_HOOK == 1 ) - { - extern void vApplicationIdleHook( void ); - - /* Call the user defined function from within the idle task. This - allows the application designer to add background functionality - without the overhead of a separate task. - NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES, - CALL A FUNCTION THAT MIGHT BLOCK. */ - vApplicationIdleHook(); - } - #endif - } -} /*lint !e715 pvParameters is not accessed but all task functions require the same prototype. */ - - - - - - - -/*----------------------------------------------------------- - * File private functions documented at the top of the file. - *----------------------------------------------------------*/ - - - -static void prvInitialiseTCBVariables( tskTCB *pxTCB, unsigned portSHORT usStackDepth, const signed portCHAR * const pcName, unsigned portBASE_TYPE uxPriority ) -{ - pxTCB->usStackDepth = usStackDepth; - - /* Store the function name in the TCB. */ - strncpy( ( char * ) pxTCB->pcTaskName, ( const char * ) pcName, ( unsigned portSHORT ) configMAX_TASK_NAME_LEN ); - pxTCB->pcTaskName[ ( unsigned portSHORT ) configMAX_TASK_NAME_LEN - ( unsigned portSHORT ) 1 ] = '\0'; - - /* This is used as an array index so must ensure it's not too large. */ - if( uxPriority >= configMAX_PRIORITIES ) - { - uxPriority = configMAX_PRIORITIES - 1; - } - - pxTCB->uxPriority = uxPriority; - - vListInitialiseItem( &( pxTCB->xGenericListItem ) ); - vListInitialiseItem( &( pxTCB->xEventListItem ) ); - - /* Set the pxTCB as a link back from the xListItem. This is so we can get - back to the containing TCB from a generic item in a list. */ - listSET_LIST_ITEM_OWNER( &( pxTCB->xGenericListItem ), pxTCB ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - listSET_LIST_ITEM_OWNER( &( pxTCB->xEventListItem ), pxTCB ); -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseTaskLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyTasksLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedTaskList1 ); - vListInitialise( ( xList * ) &xDelayedTaskList2 ); - vListInitialise( ( xList * ) &xPendingReadyList ); - - #if ( INCLUDE_vTaskDelete == 1 ) - { - vListInitialise( ( xList * ) &xTasksWaitingTermination ); - } - #endif - - #if ( INCLUDE_vTaskSuspend == 1 ) - { - vListInitialise( ( xList * ) &xSuspendedTaskList ); - } - #endif - - /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList - using list2. */ - pxDelayedTaskList = &xDelayedTaskList1; - pxOverflowDelayedTaskList = &xDelayedTaskList2; -} -/*-----------------------------------------------------------*/ - -static void prvCheckTasksWaitingTermination( void ) -{ - #if ( INCLUDE_vTaskDelete == 1 ) - { - portBASE_TYPE xListIsEmpty; - - /* ucTasksDeleted is used to prevent vTaskSuspendAll() being called - too often in the idle task. */ - if( uxTasksDeleted > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskSuspendAll(); - xListIsEmpty = listLIST_IS_EMPTY( &xTasksWaitingTermination ); - xTaskResumeAll(); - - if( !xListIsEmpty ) - { - tskTCB *pxTCB; - - portENTER_CRITICAL(); - { - pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xTasksWaitingTermination ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - --uxCurrentNumberOfTasks; - --uxTasksDeleted; - } - portEXIT_CRITICAL(); - - prvDeleteTCB( pxTCB ); - } - } - } - #endif -} -/*-----------------------------------------------------------*/ - -static tskTCB *prvAllocateTCBAndStack( unsigned portSHORT usStackDepth ) -{ -tskTCB *pxNewTCB; - - /* Allocate space for the TCB. Where the memory comes from depends on - the implementation of the port malloc function. */ - pxNewTCB = ( tskTCB * ) pvPortMalloc( sizeof( tskTCB ) ); - - if( pxNewTCB != NULL ) - { - /* Allocate space for the stack used by the task being created. - The base of the stack memory stored in the TCB so the task can - be deleted later if required. */ - pxNewTCB->pxStack = ( portSTACK_TYPE * ) pvPortMalloc( ( ( size_t )usStackDepth ) * sizeof( portSTACK_TYPE ) ); - - if( pxNewTCB->pxStack == NULL ) - { - /* Could not allocate the stack. Delete the allocated TCB. */ - vPortFree( pxNewTCB ); - pxNewTCB = NULL; - } - else - { - /* Just to help debugging. */ - memset( pxNewTCB->pxStack, tskSTACK_FILL_BYTE, usStackDepth * sizeof( portSTACK_TYPE ) ); - } - } - - return pxNewTCB; -} -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( signed portCHAR *pcWriteBuffer, xList *pxList, signed portCHAR cStatus ) - { - volatile tskTCB *pxNextTCB, *pxFirstTCB; - static portCHAR pcStatusString[ 50 ]; - unsigned portSHORT usStackRemaining; - - /* Write the details of all the TCB's in pxList into the buffer. */ - listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); - do - { - listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); - usStackRemaining = usTaskCheckFreeStackSpace( ( unsigned portCHAR * ) pxNextTCB->pxStack ); - sprintf( pcStatusString, ( portCHAR * ) "%s\t\t%c\t%u\t%u\t%u\r\n", pxNextTCB->pcTaskName, cStatus, ( unsigned int ) pxNextTCB->uxPriority, usStackRemaining, ( unsigned int ) pxNextTCB->uxTCBNumber ); - strcat( ( portCHAR * ) pcWriteBuffer, ( portCHAR * ) pcStatusString ); - - } while( pxNextTCB != pxFirstTCB ); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - unsigned portSHORT usTaskCheckFreeStackSpace( const unsigned portCHAR *pucStackByte ) - { - register unsigned portSHORT usCount = 0; - - while( *pucStackByte == tskSTACK_FILL_BYTE ) - { - pucStackByte -= portSTACK_GROWTH; - usCount++; - } - - usCount /= sizeof( portSTACK_TYPE ); - - return usCount; - } -#endif -/*-----------------------------------------------------------*/ - - - -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - - static void prvDeleteTCB( tskTCB *pxTCB ) - { - /* Free up the memory allocated by the scheduler for the task. It is up to - the task to free any memory allocated at the application level. */ - vPortFree( pxTCB->pxStack ); - vPortFree( pxTCB ); - } - -#endif - - -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) - - xTaskHandle xTaskGetCurrentTaskHandle( void ) - { - xTaskHandle xReturn; - - portENTER_CRITICAL(); - { - xReturn = ( xTaskHandle ) pxCurrentTCB; - } - portEXIT_CRITICAL(); - - return xReturn; - } - -#endif - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x.h deleted file mode 100644 index 10e1cbc4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * File: mcf523x.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_H__ -#define __MCF523X_H__ - -/*********************************************************************/ - -#include "mcf523x/mcf523x_fec.h" -#include "mcf523x/mcf523x_rng.h" -#include "mcf523x/mcf523x_fmpll.h" -#include "mcf523x/mcf523x_cs.h" -#include "mcf523x/mcf523x_intc0.h" -#include "mcf523x/mcf523x_intc1.h" -#include "mcf523x/mcf523x_sdramc.h" -#include "mcf523x/mcf523x_sram.h" -#include "mcf523x/mcf523x_uart.h" -#include "mcf523x/mcf523x_timer.h" -#include "mcf523x/mcf523x_qspi.h" -#include "mcf523x/mcf523x_eport.h" -#include "mcf523x/mcf523x_i2c.h" -#include "mcf523x/mcf523x_scm.h" -#include "mcf523x/mcf523x_pit.h" -#include "mcf523x/mcf523x_can.h" -#include "mcf523x/mcf523x_wtm.h" -#include "mcf523x/mcf523x_gpio.h" -#include "mcf523x/mcf523x_mdha.h" -#include "mcf523x/mcf523x_ccm.h" -#include "mcf523x/mcf523x_rcm.h" -#include "mcf523x/mcf523x_etpu.h" - - -/********************************************************************/ - -#endif /* __MCF523X_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_can.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_can.h deleted file mode 100644 index 49862d57..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_can.h +++ /dev/null @@ -1,319 +0,0 @@ -/* - * File: mcf523x_can.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_CAN_H__ -#define __MCF523X_CAN_H__ - -/********************************************************************* -* -* FlexCAN Module (CAN) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CAN_CANMCR0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0000])) -#define MCF_CAN_CANCTRL0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0004])) -#define MCF_CAN_TIMER0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0008])) -#define MCF_CAN_RXGMASK0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0010])) -#define MCF_CAN_RX14MASK0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0014])) -#define MCF_CAN_RX15MASK0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0018])) -#define MCF_CAN_ERRCNT0 (*(vuint32*)(void*)(&__IPSBAR[0x1C001C])) -#define MCF_CAN_ERRSTAT0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0020])) -#define MCF_CAN_IMASK0 (*(vuint16*)(void*)(&__IPSBAR[0x1C002A])) -#define MCF_CAN_IFLAG0 (*(vuint16*)(void*)(&__IPSBAR[0x1C0032])) -#define MCF_CAN_CANMCR1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0000])) -#define MCF_CAN_CANCTRL1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0004])) -#define MCF_CAN_TIMER1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0008])) -#define MCF_CAN_RXGMASK1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0010])) -#define MCF_CAN_RX14MASK1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0014])) -#define MCF_CAN_RX15MASK1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0018])) -#define MCF_CAN_ERRCNT1 (*(vuint32*)(void*)(&__IPSBAR[0x1F001C])) -#define MCF_CAN_ERRSTAT1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0020])) -#define MCF_CAN_IMASK1 (*(vuint16*)(void*)(&__IPSBAR[0x1F002A])) -#define MCF_CAN_IFLAG1 (*(vuint16*)(void*)(&__IPSBAR[0x1F0032])) -#define MCF_CAN_CANMCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0000+((x)*0x30000)])) -#define MCF_CAN_CANCTRL(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0004+((x)*0x30000)])) -#define MCF_CAN_TIMER(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0008+((x)*0x30000)])) -#define MCF_CAN_RXGMASK(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0010+((x)*0x30000)])) -#define MCF_CAN_RX14MASK(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0014+((x)*0x30000)])) -#define MCF_CAN_RX15MASK(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0018+((x)*0x30000)])) -#define MCF_CAN_ERRCNT(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C001C+((x)*0x30000)])) -#define MCF_CAN_ERRSTAT(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0020+((x)*0x30000)])) -#define MCF_CAN_IMASK(x) (*(vuint16*)(void*)(&__IPSBAR[0x1C002A+((x)*0x30000)])) -#define MCF_CAN_IFLAG(x) (*(vuint16*)(void*)(&__IPSBAR[0x1C0032+((x)*0x30000)])) - -#define MCF_CAN_MBUF0_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0080+((x)*0x30000)])) -#define MCF_CAN_MBUF0_TMSTP(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0082+((x)*0x30000)])) -#define MCF_CAN_MBUF0_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0084+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0088+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0089+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008A+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008B+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008C+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008D+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008E+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008F+((x)*0x30000)])) -#define MCF_CAN_MBUF1_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0090+((x)*0x30000)])) -#define MCF_CAN_MBUF1_TMSTP(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0092+((x)*0x30000)])) -#define MCF_CAN_MBUF1_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0094+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0098+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0099+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009A+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009B+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009C+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009D+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009E+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009F+((x)*0x30000)])) -#define MCF_CAN_MBUF2_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00A0+((x)*0x30000)])) -#define MCF_CAN_MBUF2_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00A4+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00A8+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00A9+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AA+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AB+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AC+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AD+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AE+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AF+((x)*0x30000)])) -#define MCF_CAN_MBUF3_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00B0+((x)*0x30000)])) -#define MCF_CAN_MBUF3_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00B4+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00B8+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00B9+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BA+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BB+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BC+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BD+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BE+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BF+((x)*0x30000)])) -#define MCF_CAN_MBUF4_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00C0+((x)*0x30000)])) -#define MCF_CAN_MBUF4_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00C4+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00C8+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00C9+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CA+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CB+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CC+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CD+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CE+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CF+((x)*0x30000)])) -#define MCF_CAN_MBUF5_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00D0+((x)*0x30000)])) -#define MCF_CAN_MBUF5_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00D4+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00D8+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00D9+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DA+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DB+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DC+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DD+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DE+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DF+((x)*0x30000)])) -#define MCF_CAN_MBUF6_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00E0+((x)*0x30000)])) -#define MCF_CAN_MBUF6_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00E4+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00E8+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00E9+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EA+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EB+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EC+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00ED+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EE+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EF+((x)*0x30000)])) -#define MCF_CAN_MBUF7_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00F0+((x)*0x30000)])) -#define MCF_CAN_MBUF7_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00F4+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00F8+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00F9+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FA+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FB+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FC+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FD+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FE+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FF+((x)*0x30000)])) -#define MCF_CAN_MBUF8_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0100+((x)*0x30000)])) -#define MCF_CAN_MBUF8_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0104+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0108+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0109+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010A+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010B+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010C+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010D+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010E+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010F+((x)*0x30000)])) -#define MCF_CAN_MBUF9_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0100+((x)*0x30000)])) -#define MCF_CAN_MBUF9_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0114+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0118+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0119+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011A+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011B+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011C+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011D+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011E+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011F+((x)*0x30000)])) -#define MCF_CAN_MBUF10_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0120+((x)*0x30000)])) -#define MCF_CAN_MBUF10_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0124+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0128+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0129+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012A+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012B+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012C+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012D+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012E+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012F+((x)*0x30000)])) -#define MCF_CAN_MBUF11_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0130+((x)*0x30000)])) -#define MCF_CAN_MBUF11_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0134+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0138+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0139+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013A+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013B+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013C+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013D+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013E+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013F+((x)*0x30000)])) -#define MCF_CAN_MBUF12_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0140+((x)*0x30000)])) -#define MCF_CAN_MBUF12_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0144+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0148+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0149+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014A+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014B+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014C+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014D+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014E+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014F+((x)*0x30000)])) -#define MCF_CAN_MBUF13_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0150+((x)*0x30000)])) -#define MCF_CAN_MBUF13_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0154+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0158+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0159+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015A+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015B+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015C+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015D+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015E+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015F+((x)*0x30000)])) -#define MCF_CAN_MBUF14_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0160+((x)*0x30000)])) -#define MCF_CAN_MBUF14_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0164+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0168+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0169+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016A+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016B+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016C+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016D+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016E+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016F+((x)*0x30000)])) -#define MCF_CAN_MBUF15_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0170+((x)*0x30000)])) -#define MCF_CAN_MBUF15_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0174+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0178+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0179+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017A+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017B+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017C+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017D+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017E+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017F+((x)*0x30000)])) - - -#define MCF_CAN_MBUF0_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0088+((x)*0x30000)])) -#define MCF_CAN_MBUF0_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C008C+((x)*0x30000)])) -#define MCF_CAN_MBUF1_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0098+((x)*0x30000)])) -#define MCF_CAN_MBUF1_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C009C+((x)*0x30000)])) -#define MCF_CAN_MBUF2_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00A8+((x)*0x30000)])) -#define MCF_CAN_MBUF2_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00AC+((x)*0x30000)])) - - -/* Bit definitions and macros for MCF_CAN_CANMCR */ -#define MCF_CAN_CANMCR_MAXMB(x) (((x)&0x0000000F)<<0) -#define MCF_CAN_CANMCR_SUPV (0x00800000) -#define MCF_CAN_CANMCR_FRZACK (0x01000000) -#define MCF_CAN_CANMCR_SOFTRST (0x02000000) -#define MCF_CAN_CANMCR_HALT (0x10000000) -#define MCF_CAN_CANMCR_FRZ (0x40000000) -#define MCF_CAN_CANMCR_MDIS (0x80000000) - -/* Bit definitions and macros for MCF_CAN_CANCTRL */ -#define MCF_CAN_CANCTRL_PROPSEG(x) (((x)&0x00000007)<<0) -#define MCF_CAN_CANCTRL_LOM (0x00000008) -#define MCF_CAN_CANCTRL_LBUF (0x00000010) -#define MCF_CAN_CANCTRL_TSYNC (0x00000020) -#define MCF_CAN_CANCTRL_BOFFREC (0x00000040) -#define MCF_CAN_CANCTRL_SAMP (0x00000080) -#define MCF_CAN_CANCTRL_LPB (0x00001000) -#define MCF_CAN_CANCTRL_CLKSRC (0x00002000) -#define MCF_CAN_CANCTRL_ERRMSK (0x00004000) -#define MCF_CAN_CANCTRL_BOFFMSK (0x00008000) -#define MCF_CAN_CANCTRL_PSEG2(x) (((x)&0x00000007)<<16) -#define MCF_CAN_CANCTRL_PSEG1(x) (((x)&0x00000007)<<19) -#define MCF_CAN_CANCTRL_RJW(x) (((x)&0x00000003)<<22) -#define MCF_CAN_CANCTRL_PRESDIV(x) (((x)&0x000000FF)<<24) - -/* Bit definitions and macros for MCF_CAN_TIMER */ -#define MCF_CAN_TIMER_TIMER(x) (((x)&0x0000FFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_RXGMASK */ -#define MCF_CAN_RXGMASK_MI(x) (((x)&0x1FFFFFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_RX14MASK */ -#define MCF_CAN_RX14MASK_MI(x) (((x)&0x1FFFFFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_RX15MASK */ -#define MCF_CAN_RX15MASK_MI(x) (((x)&0x1FFFFFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_ERRCNT */ -#define MCF_CAN_ERRCNT_TXECTR(x) (((x)&0x000000FF)<<0) -#define MCF_CAN_ERRCNT_RXECTR(x) (((x)&0x000000FF)<<8) - -/* Bit definitions and macros for MCF_CAN_ERRSTAT */ -#define MCF_CAN_ERRSTAT_WAKINT (0x00000001) -#define MCF_CAN_ERRSTAT_ERRINT (0x00000002) -#define MCF_CAN_ERRSTAT_BOFFINT (0x00000004) -#define MCF_CAN_ERRSTAT_FLTCONF(x) (((x)&0x00000003)<<4) -#define MCF_CAN_ERRSTAT_TXRX (0x00000040) -#define MCF_CAN_ERRSTAT_IDLE (0x00000080) -#define MCF_CAN_ERRSTAT_RXWRN (0x00000100) -#define MCF_CAN_ERRSTAT_TXWRN (0x00000200) -#define MCF_CAN_ERRSTAT_STFERR (0x00000400) -#define MCF_CAN_ERRSTAT_FRMERR (0x00000800) -#define MCF_CAN_ERRSTAT_CRCERR (0x00001000) -#define MCF_CAN_ERRSTAT_ACKERR (0x00002000) -#define MCF_CAN_ERRSTAT_BITERR(x) (((x)&0x00000003)<<14) -#define MCF_CAN_ERRSTAT_FLTCONF_ACTIVE (0x00000000) -#define MCF_CAN_ERRSTAT_FLTCONF_PASSIVE (0x00000010) -#define MCF_CAN_ERRSTAT_FLTCONF_BUSOFF (0x00000020) - -/* Bit definitions and macros for MCF_CAN_IMASK */ -#define MCF_CAN_IMASK_BUF0M (0x0001) -#define MCF_CAN_IMASK_BUF1M (0x0002) -#define MCF_CAN_IMASK_BUF2M (0x0004) -#define MCF_CAN_IMASK_BUF3M (0x0008) -#define MCF_CAN_IMASK_BUF4M (0x0010) -#define MCF_CAN_IMASK_BUF5M (0x0020) -#define MCF_CAN_IMASK_BUF6M (0x0040) -#define MCF_CAN_IMASK_BUF7M (0x0080) -#define MCF_CAN_IMASK_BUF8M (0x0100) -#define MCF_CAN_IMASK_BUF9M (0x0200) -#define MCF_CAN_IMASK_BUF10M (0x0400) -#define MCF_CAN_IMASK_BUF11M (0x0800) -#define MCF_CAN_IMASK_BUF12M (0x1000) -#define MCF_CAN_IMASK_BUF13M (0x2000) -#define MCF_CAN_IMASK_BUF14M (0x4000) -#define MCF_CAN_IMASK_BUF15M (0x8000) - -/* Bit definitions and macros for MCF_CAN_IFLAG */ -#define MCF_CAN_IFLAG_BUF0I (0x0001) -#define MCF_CAN_IFLAG_BUF1I (0x0002) -#define MCF_CAN_IFLAG_BUF2I (0x0004) -#define MCF_CAN_IFLAG_BUF3I (0x0008) -#define MCF_CAN_IFLAG_BUF4I (0x0010) -#define MCF_CAN_IFLAG_BUF5I (0x0020) -#define MCF_CAN_IFLAG_BUF6I (0x0040) -#define MCF_CAN_IFLAG_BUF7I (0x0080) -#define MCF_CAN_IFLAG_BUF8I (0x0100) -#define MCF_CAN_IFLAG_BUF9I (0x0200) -#define MCF_CAN_IFLAG_BUF10I (0x0400) -#define MCF_CAN_IFLAG_BUF11I (0x0800) -#define MCF_CAN_IFLAG_BUF12I (0x1000) -#define MCF_CAN_IFLAG_BUF13I (0x2000) -#define MCF_CAN_IFLAG_BUF14I (0x4000) -#define MCF_CAN_IFLAG_BUF15I (0x8000) - -/********************************************************************/ - -#endif /* __MCF523X_CAN_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_ccm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_ccm.h deleted file mode 100644 index d9806ae9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_ccm.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * File: mcf523x_ccm.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_CCM_H__ -#define __MCF523X_CCM_H__ - -/********************************************************************* -* -* Chip Configuration Module (CCM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CCM_CCR (*(vuint16*)(void*)(&__IPSBAR[0x110004])) -#define MCF_CCM_LPCR (*(vuint8 *)(void*)(&__IPSBAR[0x110007])) -#define MCF_CCM_CIR (*(vuint16*)(void*)(&__IPSBAR[0x11000A])) -#define MCF_CCM_RCON (*(vuint16*)(void*)(&__IPSBAR[0x110008])) - -/* Bit definitions and macros for MCF_CCM_CCR */ -#define MCF_CCM_CCR_BMT(x) (((x)&0x0007)<<0) -#define MCF_CCM_CCR_BME (0x0008) -#define MCF_CCM_CCR_SZEN (0x0040) -#define MCF_CCM_CCR_MODE(x) (((x)&0x0007)<<8) - -/* Bit definitions and macros for MCF_CCM_LPCR */ -#define MCF_CCM_LPCR_STPMD(x) (((x)&0x03)<<3) -#define MCF_CCM_LPCR_LPMD(x) (((x)&0x03)<<6) -#define MCF_CCM_LPCR_LPMD_STOP (0xC0) -#define MCF_CCM_LPCR_LPMD_WAIT (0x80) -#define MCF_CCM_LPCR_LPMD_DOZE (0x40) -#define MCF_CCM_LPCR_LPMD_RUN (0x00) - -/* Bit definitions and macros for MCF_CCM_CIR */ -#define MCF_CCM_CIR_PRN(x) (((x)&0x003F)<<0) -#define MCF_CCM_CIR_PIN(x) (((x)&0x03FF)<<6) - -/* Bit definitions and macros for MCF_CCM_RCON */ -#define MCF_CCM_RCON_MODE (0x0001) -#define MCF_CCM_RCON_BOOTPS(x) (((x)&0x0003)<<3) -#define MCF_CCM_RCON_RLOAD (0x0020) -#define MCF_CCM_RCON_RCSC(x) (((x)&0x0003)<<8) - -/********************************************************************/ - -#endif /* __MCF523X_CCM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_cs.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_cs.h deleted file mode 100644 index 5761f5f3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_cs.h +++ /dev/null @@ -1,95 +0,0 @@ -/* - * File: mcf523x_cs.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_CS_H__ -#define __MCF523X_CS_H__ - -/********************************************************************* -* -* Chip Selects (CS) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CS_CSAR0 (*(vuint16*)(void*)(&__IPSBAR[0x000080])) -#define MCF_CS_CSMR0 (*(vuint32*)(void*)(&__IPSBAR[0x000084])) -#define MCF_CS_CSCR0 (*(vuint16*)(void*)(&__IPSBAR[0x00008A])) -#define MCF_CS_CSAR1 (*(vuint16*)(void*)(&__IPSBAR[0x00008C])) -#define MCF_CS_CSMR1 (*(vuint32*)(void*)(&__IPSBAR[0x000090])) -#define MCF_CS_CSCR1 (*(vuint16*)(void*)(&__IPSBAR[0x000096])) -#define MCF_CS_CSAR2 (*(vuint16*)(void*)(&__IPSBAR[0x000098])) -#define MCF_CS_CSMR2 (*(vuint32*)(void*)(&__IPSBAR[0x00009C])) -#define MCF_CS_CSCR2 (*(vuint16*)(void*)(&__IPSBAR[0x0000A2])) -#define MCF_CS_CSAR3 (*(vuint16*)(void*)(&__IPSBAR[0x0000A4])) -#define MCF_CS_CSMR3 (*(vuint32*)(void*)(&__IPSBAR[0x0000A8])) -#define MCF_CS_CSCR3 (*(vuint16*)(void*)(&__IPSBAR[0x0000AE])) -#define MCF_CS_CSAR4 (*(vuint16*)(void*)(&__IPSBAR[0x0000B0])) -#define MCF_CS_CSMR4 (*(vuint32*)(void*)(&__IPSBAR[0x0000B4])) -#define MCF_CS_CSCR4 (*(vuint16*)(void*)(&__IPSBAR[0x0000BA])) -#define MCF_CS_CSAR5 (*(vuint16*)(void*)(&__IPSBAR[0x0000BC])) -#define MCF_CS_CSMR5 (*(vuint32*)(void*)(&__IPSBAR[0x0000C0])) -#define MCF_CS_CSCR5 (*(vuint16*)(void*)(&__IPSBAR[0x0000C6])) -#define MCF_CS_CSAR6 (*(vuint16*)(void*)(&__IPSBAR[0x0000C8])) -#define MCF_CS_CSMR6 (*(vuint32*)(void*)(&__IPSBAR[0x0000CC])) -#define MCF_CS_CSCR6 (*(vuint16*)(void*)(&__IPSBAR[0x0000D2])) -#define MCF_CS_CSAR7 (*(vuint16*)(void*)(&__IPSBAR[0x0000D4])) -#define MCF_CS_CSMR7 (*(vuint32*)(void*)(&__IPSBAR[0x0000D8])) -#define MCF_CS_CSCR7 (*(vuint16*)(void*)(&__IPSBAR[0x0000DE])) -#define MCF_CS_CSAR(x) (*(vuint16*)(void*)(&__IPSBAR[0x000080+((x)*0x00C)])) -#define MCF_CS_CSMR(x) (*(vuint32*)(void*)(&__IPSBAR[0x000084+((x)*0x00C)])) -#define MCF_CS_CSCR(x) (*(vuint16*)(void*)(&__IPSBAR[0x00008A+((x)*0x00C)])) - -/* Bit definitions and macros for MCF_CS_CSAR */ -#define MCF_CS_CSAR_BA(x) ((uint16)(((x)&0xFFFF0000)>>16)) - -/* Bit definitions and macros for MCF_CS_CSMR */ -#define MCF_CS_CSMR_V (0x00000001) -#define MCF_CS_CSMR_UD (0x00000002) -#define MCF_CS_CSMR_UC (0x00000004) -#define MCF_CS_CSMR_SD (0x00000008) -#define MCF_CS_CSMR_SC (0x00000010) -#define MCF_CS_CSMR_CI (0x00000020) -#define MCF_CS_CSMR_AM (0x00000040) -#define MCF_CS_CSMR_WP (0x00000100) -#define MCF_CS_CSMR_BAM(x) (((x)&0x0000FFFF)<<16) -#define MCF_CS_CSMR_BAM_4G (0xFFFF0000) -#define MCF_CS_CSMR_BAM_2G (0x7FFF0000) -#define MCF_CS_CSMR_BAM_1G (0x3FFF0000) -#define MCF_CS_CSMR_BAM_1024M (0x3FFF0000) -#define MCF_CS_CSMR_BAM_512M (0x1FFF0000) -#define MCF_CS_CSMR_BAM_256M (0x0FFF0000) -#define MCF_CS_CSMR_BAM_128M (0x07FF0000) -#define MCF_CS_CSMR_BAM_64M (0x03FF0000) -#define MCF_CS_CSMR_BAM_32M (0x01FF0000) -#define MCF_CS_CSMR_BAM_16M (0x00FF0000) -#define MCF_CS_CSMR_BAM_8M (0x007F0000) -#define MCF_CS_CSMR_BAM_4M (0x003F0000) -#define MCF_CS_CSMR_BAM_2M (0x001F0000) -#define MCF_CS_CSMR_BAM_1M (0x000F0000) -#define MCF_CS_CSMR_BAM_1024K (0x000F0000) -#define MCF_CS_CSMR_BAM_512K (0x00070000) -#define MCF_CS_CSMR_BAM_256K (0x00030000) -#define MCF_CS_CSMR_BAM_128K (0x00010000) -#define MCF_CS_CSMR_BAM_64K (0x00000000) - -/* Bit definitions and macros for MCF_CS_CSCR */ -#define MCF_CS_CSCR_SWWS(x) (((x)&0x0007)<<0) -#define MCF_CS_CSCR_BSTW (0x0008) -#define MCF_CS_CSCR_BSTR (0x0010) -#define MCF_CS_CSCR_BEM (0x0020) -#define MCF_CS_CSCR_PS(x) (((x)&0x0003)<<6) -#define MCF_CS_CSCR_AA (0x0100) -#define MCF_CS_CSCR_IWS(x) (((x)&0x000F)<<10) -#define MCF_CS_CSCR_SRWS(x) (((x)&0x0003)<<14) -#define MCF_CS_CSCR_PS_8 (0x0040) -#define MCF_CS_CSCR_PS_16 (0x0080) -#define MCF_CS_CSCR_PS_32 (0x0000) - -/********************************************************************/ - -#endif /* __MCF523X_CS_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_eport.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_eport.h deleted file mode 100644 index f84045bd..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_eport.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * File: mcf523x_eport.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_EPORT_H__ -#define __MCF523X_EPORT_H__ - -/********************************************************************* -* -* Edge Port Module (EPORT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_EPORT_EPPAR (*(vuint16*)(void*)(&__IPSBAR[0x130000])) -#define MCF_EPORT_EPDDR (*(vuint8 *)(void*)(&__IPSBAR[0x130002])) -#define MCF_EPORT_EPIER (*(vuint8 *)(void*)(&__IPSBAR[0x130003])) -#define MCF_EPORT_EPDR (*(vuint8 *)(void*)(&__IPSBAR[0x130004])) -#define MCF_EPORT_EPPDR (*(vuint8 *)(void*)(&__IPSBAR[0x130005])) -#define MCF_EPORT_EPFR (*(vuint8 *)(void*)(&__IPSBAR[0x130006])) - -/* Bit definitions and macros for MCF_EPORT_EPPAR */ -#define MCF_EPORT_EPPAR_EPPA1(x) (((x)&0x0003)<<2) -#define MCF_EPORT_EPPAR_EPPA2(x) (((x)&0x0003)<<4) -#define MCF_EPORT_EPPAR_EPPA3(x) (((x)&0x0003)<<6) -#define MCF_EPORT_EPPAR_EPPA4(x) (((x)&0x0003)<<8) -#define MCF_EPORT_EPPAR_EPPA5(x) (((x)&0x0003)<<10) -#define MCF_EPORT_EPPAR_EPPA6(x) (((x)&0x0003)<<12) -#define MCF_EPORT_EPPAR_EPPA7(x) (((x)&0x0003)<<14) -#define MCF_EPORT_EPPAR_EPPAx_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPAx_RISING (1) -#define MCF_EPORT_EPPAR_EPPAx_FALLING (2) -#define MCF_EPORT_EPPAR_EPPAx_BOTH (3) - -/* Bit definitions and macros for MCF_EPORT_EPDDR */ -#define MCF_EPORT_EPDDR_EPDD1 (0x02) -#define MCF_EPORT_EPDDR_EPDD2 (0x04) -#define MCF_EPORT_EPDDR_EPDD3 (0x08) -#define MCF_EPORT_EPDDR_EPDD4 (0x10) -#define MCF_EPORT_EPDDR_EPDD5 (0x20) -#define MCF_EPORT_EPDDR_EPDD6 (0x40) -#define MCF_EPORT_EPDDR_EPDD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPIER */ -#define MCF_EPORT_EPIER_EPIE1 (0x02) -#define MCF_EPORT_EPIER_EPIE2 (0x04) -#define MCF_EPORT_EPIER_EPIE3 (0x08) -#define MCF_EPORT_EPIER_EPIE4 (0x10) -#define MCF_EPORT_EPIER_EPIE5 (0x20) -#define MCF_EPORT_EPIER_EPIE6 (0x40) -#define MCF_EPORT_EPIER_EPIE7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPDR */ -#define MCF_EPORT_EPDR_EPD1 (0x02) -#define MCF_EPORT_EPDR_EPD2 (0x04) -#define MCF_EPORT_EPDR_EPD3 (0x08) -#define MCF_EPORT_EPDR_EPD4 (0x10) -#define MCF_EPORT_EPDR_EPD5 (0x20) -#define MCF_EPORT_EPDR_EPD6 (0x40) -#define MCF_EPORT_EPDR_EPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPPDR */ -#define MCF_EPORT_EPPDR_EPPD1 (0x02) -#define MCF_EPORT_EPPDR_EPPD2 (0x04) -#define MCF_EPORT_EPPDR_EPPD3 (0x08) -#define MCF_EPORT_EPPDR_EPPD4 (0x10) -#define MCF_EPORT_EPPDR_EPPD5 (0x20) -#define MCF_EPORT_EPPDR_EPPD6 (0x40) -#define MCF_EPORT_EPPDR_EPPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPFR */ -#define MCF_EPORT_EPFR_EPF1 (0x02) -#define MCF_EPORT_EPFR_EPF2 (0x04) -#define MCF_EPORT_EPFR_EPF3 (0x08) -#define MCF_EPORT_EPFR_EPF4 (0x10) -#define MCF_EPORT_EPFR_EPF5 (0x20) -#define MCF_EPORT_EPFR_EPF6 (0x40) -#define MCF_EPORT_EPFR_EPF7 (0x80) - -/********************************************************************/ - -#endif /* __MCF523X_EPORT_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_etpu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_etpu.h deleted file mode 100644 index 5541e8d0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_etpu.h +++ /dev/null @@ -1,487 +0,0 @@ -/* - * File: mcf523x_etpu.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_ETPU_H__ -#define __MCF523X_ETPU_H__ - -/********************************************************************* -* -* enhanced Time Processor Unit (ETPU) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_ETPU_EMCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0000])) -#define MCF_ETPU_ECDCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0004])) -#define MCF_ETPU_EMISCCR (*(vuint32*)(void*)(&__IPSBAR[0x1D000C])) -#define MCF_ETPU_ESCMODR (*(vuint32*)(void*)(&__IPSBAR[0x1D0010])) -#define MCF_ETPU_EECR (*(vuint32*)(void*)(&__IPSBAR[0x1D0014])) -#define MCF_ETPU_ETBCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0020])) -#define MCF_ETPU_ETB1R (*(vuint32*)(void*)(&__IPSBAR[0x1D0024])) -#define MCF_ETPU_ETB2R (*(vuint32*)(void*)(&__IPSBAR[0x1D0028])) -#define MCF_ETPU_EREDCR (*(vuint32*)(void*)(&__IPSBAR[0x1D002C])) -#define MCF_ETPU_ECISR (*(vuint32*)(void*)(&__IPSBAR[0x1D0200])) -#define MCF_ETPU_ECDTRSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0210])) -#define MCF_ETPU_ECIOSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0220])) -#define MCF_ETPU_ECDTROSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0230])) -#define MCF_ETPU_ECIER (*(vuint32*)(void*)(&__IPSBAR[0x1D0240])) -#define MCF_ETPU_ECDTRER (*(vuint32*)(void*)(&__IPSBAR[0x1D0250])) -#define MCF_ETPU_ECPSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0280])) -#define MCF_ETPU_ECSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0290])) -#define MCF_ETPU_EC0SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0404])) -#define MCF_ETPU_EC1SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0414])) -#define MCF_ETPU_EC2SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0424])) -#define MCF_ETPU_EC3SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0434])) -#define MCF_ETPU_EC4SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0444])) -#define MCF_ETPU_EC5SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0454])) -#define MCF_ETPU_EC6SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0464])) -#define MCF_ETPU_EC7SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0474])) -#define MCF_ETPU_EC8SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0484])) -#define MCF_ETPU_EC9SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0494])) -#define MCF_ETPU_EC10SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04A4])) -#define MCF_ETPU_EC11SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04B4])) -#define MCF_ETPU_EC12SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04C4])) -#define MCF_ETPU_EC13SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04D4])) -#define MCF_ETPU_EC14SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04E4])) -#define MCF_ETPU_EC15SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04F4])) -#define MCF_ETPU_EC16SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0504])) -#define MCF_ETPU_EC17SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0514])) -#define MCF_ETPU_EC18SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0524])) -#define MCF_ETPU_EC19SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0534])) -#define MCF_ETPU_EC20SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0544])) -#define MCF_ETPU_EC21SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0554])) -#define MCF_ETPU_EC22SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0564])) -#define MCF_ETPU_EC23SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0574])) -#define MCF_ETPU_EC24SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0584])) -#define MCF_ETPU_EC25SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0594])) -#define MCF_ETPU_EC26SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05A4])) -#define MCF_ETPU_EC27SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05B4])) -#define MCF_ETPU_EC28SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05C4])) -#define MCF_ETPU_EC29SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05D4])) -#define MCF_ETPU_EC30SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05E4])) -#define MCF_ETPU_EC31SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05F4])) -#define MCF_ETPU_ECnSCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1D0404+((x)*0x010)])) -#define MCF_ETPU_EC0CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0400])) -#define MCF_ETPU_EC1CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0410])) -#define MCF_ETPU_EC2CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0420])) -#define MCF_ETPU_EC3CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0430])) -#define MCF_ETPU_EC4CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0440])) -#define MCF_ETPU_EC5CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0450])) -#define MCF_ETPU_EC6CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0460])) -#define MCF_ETPU_EC7CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0470])) -#define MCF_ETPU_EC8CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0480])) -#define MCF_ETPU_EC9CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0490])) -#define MCF_ETPU_EC10CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04A0])) -#define MCF_ETPU_EC11CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04B0])) -#define MCF_ETPU_EC12CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04C0])) -#define MCF_ETPU_EC13CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04D0])) -#define MCF_ETPU_EC14CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04E0])) -#define MCF_ETPU_EC15CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04F0])) -#define MCF_ETPU_EC16CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0500])) -#define MCF_ETPU_EC17CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0510])) -#define MCF_ETPU_EC18CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0520])) -#define MCF_ETPU_EC19CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0530])) -#define MCF_ETPU_EC20CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0540])) -#define MCF_ETPU_EC21CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0550])) -#define MCF_ETPU_EC22CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0560])) -#define MCF_ETPU_EC23CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0570])) -#define MCF_ETPU_EC24CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0580])) -#define MCF_ETPU_EC25CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0590])) -#define MCF_ETPU_EC26CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05A0])) -#define MCF_ETPU_EC27CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05B0])) -#define MCF_ETPU_EC28CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05C0])) -#define MCF_ETPU_EC29CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05D0])) -#define MCF_ETPU_EC30CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05E0])) -#define MCF_ETPU_EC31CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05F0])) -#define MCF_ETPU_ECnCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1D0400+((x)*0x010)])) -#define MCF_ETPU_EC0HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0408])) -#define MCF_ETPU_EC1HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0418])) -#define MCF_ETPU_EC2HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0428])) -#define MCF_ETPU_EC3HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0438])) -#define MCF_ETPU_EC4HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0448])) -#define MCF_ETPU_EC5HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0458])) -#define MCF_ETPU_EC6HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0468])) -#define MCF_ETPU_EC7HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0478])) -#define MCF_ETPU_EC8HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0488])) -#define MCF_ETPU_EC9HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0498])) -#define MCF_ETPU_EC10HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04A8])) -#define MCF_ETPU_EC11HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04B8])) -#define MCF_ETPU_EC12HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04C8])) -#define MCF_ETPU_EC13HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04D8])) -#define MCF_ETPU_EC14HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04E8])) -#define MCF_ETPU_EC15HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04F8])) -#define MCF_ETPU_EC16HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0508])) -#define MCF_ETPU_EC17HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0518])) -#define MCF_ETPU_EC18HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0528])) -#define MCF_ETPU_EC19HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0538])) -#define MCF_ETPU_EC20HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0548])) -#define MCF_ETPU_EC21HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0558])) -#define MCF_ETPU_EC22HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0568])) -#define MCF_ETPU_EC23HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0578])) -#define MCF_ETPU_EC24HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0588])) -#define MCF_ETPU_EC25HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0598])) -#define MCF_ETPU_EC26HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05A8])) -#define MCF_ETPU_EC27HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05B8])) -#define MCF_ETPU_EC28HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05C8])) -#define MCF_ETPU_EC29HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05D8])) -#define MCF_ETPU_EC30HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05E8])) -#define MCF_ETPU_EC31HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05F8])) -#define MCF_ETPU_ECnHSSR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1D0408+((x)*0x010)])) - -/* Bit definitions and macros for MCF_ETPU_EMCR */ -#define MCF_ETPU_EMCR_GTBE (0x00000001) -#define MCF_ETPU_EMCR_VIS (0x00000040) -#define MCF_ETPU_EMCR_SCMMISEN (0x00000200) -#define MCF_ETPU_EMCR_SCMMISF (0x00000400) -#define MCF_ETPU_EMCR_SCMSIZE(x) (((x)&0x0000001F)<<16) -#define MCF_ETPU_EMCR_ILF2 (0x01000000) -#define MCF_ETPU_EMCR_ILF1 (0x02000000) -#define MCF_ETPU_EMCR_MGE2 (0x04000000) -#define MCF_ETPU_EMCR_MGE1 (0x08000000) -#define MCF_ETPU_EMCR_GEC (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDCR */ -#define MCF_ETPU_ECDCR_PARM1(x) (((x)&0x0000007F)<<0) -#define MCF_ETPU_ECDCR_WR (0x00000080) -#define MCF_ETPU_ECDCR_PARM0(x) (((x)&0x0000007F)<<8) -#define MCF_ETPU_ECDCR_PWIDTH (0x00008000) -#define MCF_ETPU_ECDCR_PBASE(x) (((x)&0x000003FF)<<16) -#define MCF_ETPU_ECDCR_CTBASE(x) (((x)&0x0000001F)<<26) -#define MCF_ETPU_ECDCR_STS (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_EECR */ -#define MCF_ETPU_EECR_ETB(x) (((x)&0x0000001F)<<0) -#define MCF_ETPU_EECR_CDFC(x) (((x)&0x00000003)<<14) -#define MCF_ETPU_EECR_FPSK(x) (((x)&0x00000007)<<16) -#define MCF_ETPU_EECR_HLTF (0x00800000) -#define MCF_ETPU_EECR_STF (0x10000000) -#define MCF_ETPU_EECR_MDIS (0x40000000) -#define MCF_ETPU_EECR_FEND (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ETBCR */ -#define MCF_ETPU_ETBCR_TCR1P(x) (((x)&0x000000FF)<<0) -#define MCF_ETPU_ETBCR_TCR1CTL(x) (((x)&0x00000003)<<14) -#define MCF_ETPU_ETBCR_TCR2P(x) (((x)&0x0000003F)<<16) -#define MCF_ETPU_ETBCR_AM (0x02000000) -#define MCF_ETPU_ETBCR_TCRCF(x) (((x)&0x00000003)<<27) -#define MCF_ETPU_ETBCR_TCR2CTL(x) (((x)&0x00000007)<<29) - -/* Bit definitions and macros for MCF_ETPU_ETB1R */ -#define MCF_ETPU_ETB1R_TCR1(x) (((x)&0x00FFFFFF)<<0) - -/* Bit definitions and macros for MCF_ETPU_ETB2R */ -#define MCF_ETPU_ETB2R_TCR2(x) (((x)&0x00FFFFFF)<<0) - -/* Bit definitions and macros for MCF_ETPU_EREDCR */ -#define MCF_ETPU_EREDCR_SRV2(x) (((x)&0x0000000F)<<0) -#define MCF_ETPU_EREDCR_SERVER_ID2(x) (((x)&0x0000000F)<<8) -#define MCF_ETPU_EREDCR_RSC2 (0x00004000) -#define MCF_ETPU_EREDCR_REN2 (0x00008000) -#define MCF_ETPU_EREDCR_SRV1(x) (((x)&0x0000000F)<<16) -#define MCF_ETPU_EREDCR_SERVER_ID1(x) (((x)&0x0000000F)<<24) -#define MCF_ETPU_EREDCR_RSC1 (0x40000000) -#define MCF_ETPU_EREDCR_REN1 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECISR */ -#define MCF_ETPU_ECISR_CIS0 (0x00000001) -#define MCF_ETPU_ECISR_CIS1 (0x00000002) -#define MCF_ETPU_ECISR_CIS2 (0x00000004) -#define MCF_ETPU_ECISR_CIS3 (0x00000008) -#define MCF_ETPU_ECISR_CIS4 (0x00000010) -#define MCF_ETPU_ECISR_CIS5 (0x00000020) -#define MCF_ETPU_ECISR_CIS6 (0x00000040) -#define MCF_ETPU_ECISR_CIS7 (0x00000080) -#define MCF_ETPU_ECISR_CIS8 (0x00000100) -#define MCF_ETPU_ECISR_CIS9 (0x00000200) -#define MCF_ETPU_ECISR_CIS10 (0x00000400) -#define MCF_ETPU_ECISR_CIS11 (0x00000800) -#define MCF_ETPU_ECISR_CIS12 (0x00001000) -#define MCF_ETPU_ECISR_CIS13 (0x00002000) -#define MCF_ETPU_ECISR_CIS14 (0x00004000) -#define MCF_ETPU_ECISR_CIS15 (0x00008000) -#define MCF_ETPU_ECISR_CIS16 (0x00010000) -#define MCF_ETPU_ECISR_CIS17 (0x00020000) -#define MCF_ETPU_ECISR_CIS18 (0x00040000) -#define MCF_ETPU_ECISR_CIS19 (0x00080000) -#define MCF_ETPU_ECISR_CIS20 (0x00100000) -#define MCF_ETPU_ECISR_CIS21 (0x00200000) -#define MCF_ETPU_ECISR_CIS22 (0x00400000) -#define MCF_ETPU_ECISR_CIS23 (0x00800000) -#define MCF_ETPU_ECISR_CIS24 (0x01000000) -#define MCF_ETPU_ECISR_CIS25 (0x02000000) -#define MCF_ETPU_ECISR_CIS26 (0x04000000) -#define MCF_ETPU_ECISR_CIS27 (0x08000000) -#define MCF_ETPU_ECISR_CIS28 (0x10000000) -#define MCF_ETPU_ECISR_CIS29 (0x20000000) -#define MCF_ETPU_ECISR_CIS30 (0x40000000) -#define MCF_ETPU_ECISR_CIS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDTRSR */ -#define MCF_ETPU_ECDTRSR_DTRS0 (0x00000001) -#define MCF_ETPU_ECDTRSR_DTRS1 (0x00000002) -#define MCF_ETPU_ECDTRSR_DTRS2 (0x00000004) -#define MCF_ETPU_ECDTRSR_DTRS3 (0x00000008) -#define MCF_ETPU_ECDTRSR_DTRS4 (0x00000010) -#define MCF_ETPU_ECDTRSR_DTRS5 (0x00000020) -#define MCF_ETPU_ECDTRSR_DTRS6 (0x00000040) -#define MCF_ETPU_ECDTRSR_DTRS7 (0x00000080) -#define MCF_ETPU_ECDTRSR_DTRS8 (0x00000100) -#define MCF_ETPU_ECDTRSR_DTRS9 (0x00000200) -#define MCF_ETPU_ECDTRSR_DTRS10 (0x00000400) -#define MCF_ETPU_ECDTRSR_DTRS11 (0x00000800) -#define MCF_ETPU_ECDTRSR_DTRS12 (0x00001000) -#define MCF_ETPU_ECDTRSR_DTRS13 (0x00002000) -#define MCF_ETPU_ECDTRSR_DTRS14 (0x00004000) -#define MCF_ETPU_ECDTRSR_DTRS15 (0x00008000) -#define MCF_ETPU_ECDTRSR_DTRS16 (0x00010000) -#define MCF_ETPU_ECDTRSR_DTRS17 (0x00020000) -#define MCF_ETPU_ECDTRSR_DTRS18 (0x00040000) -#define MCF_ETPU_ECDTRSR_DTRS19 (0x00080000) -#define MCF_ETPU_ECDTRSR_DTRS20 (0x00100000) -#define MCF_ETPU_ECDTRSR_DTRS21 (0x00200000) -#define MCF_ETPU_ECDTRSR_DTRS22 (0x00400000) -#define MCF_ETPU_ECDTRSR_DTRS23 (0x00800000) -#define MCF_ETPU_ECDTRSR_DTRS24 (0x01000000) -#define MCF_ETPU_ECDTRSR_DTRS25 (0x02000000) -#define MCF_ETPU_ECDTRSR_DTRS26 (0x04000000) -#define MCF_ETPU_ECDTRSR_DTRS27 (0x08000000) -#define MCF_ETPU_ECDTRSR_DTRS28 (0x10000000) -#define MCF_ETPU_ECDTRSR_DTRS29 (0x20000000) -#define MCF_ETPU_ECDTRSR_DTRS30 (0x40000000) -#define MCF_ETPU_ECDTRSR_DTRS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECIOSR */ -#define MCF_ETPU_ECIOSR_CIOS0 (0x00000001) -#define MCF_ETPU_ECIOSR_CIOS1 (0x00000002) -#define MCF_ETPU_ECIOSR_CIOS2 (0x00000004) -#define MCF_ETPU_ECIOSR_CIOS3 (0x00000008) -#define MCF_ETPU_ECIOSR_CIOS4 (0x00000010) -#define MCF_ETPU_ECIOSR_CIOS5 (0x00000020) -#define MCF_ETPU_ECIOSR_CIOS6 (0x00000040) -#define MCF_ETPU_ECIOSR_CIOS7 (0x00000080) -#define MCF_ETPU_ECIOSR_CIOS8 (0x00000100) -#define MCF_ETPU_ECIOSR_CIOS9 (0x00000200) -#define MCF_ETPU_ECIOSR_CIOS10 (0x00000400) -#define MCF_ETPU_ECIOSR_CIOS11 (0x00000800) -#define MCF_ETPU_ECIOSR_CIOS12 (0x00001000) -#define MCF_ETPU_ECIOSR_CIOS13 (0x00002000) -#define MCF_ETPU_ECIOSR_CIOS14 (0x00004000) -#define MCF_ETPU_ECIOSR_CIOS15 (0x00008000) -#define MCF_ETPU_ECIOSR_CIOS16 (0x00010000) -#define MCF_ETPU_ECIOSR_CIOS17 (0x00020000) -#define MCF_ETPU_ECIOSR_CIOS18 (0x00040000) -#define MCF_ETPU_ECIOSR_CIOS19 (0x00080000) -#define MCF_ETPU_ECIOSR_CIOS20 (0x00100000) -#define MCF_ETPU_ECIOSR_CIOS21 (0x00200000) -#define MCF_ETPU_ECIOSR_CIOS22 (0x00400000) -#define MCF_ETPU_ECIOSR_CIOS23 (0x00800000) -#define MCF_ETPU_ECIOSR_CIOS24 (0x01000000) -#define MCF_ETPU_ECIOSR_CIOS25 (0x02000000) -#define MCF_ETPU_ECIOSR_CIOS26 (0x04000000) -#define MCF_ETPU_ECIOSR_CIOS27 (0x08000000) -#define MCF_ETPU_ECIOSR_CIOS28 (0x10000000) -#define MCF_ETPU_ECIOSR_CIOS29 (0x20000000) -#define MCF_ETPU_ECIOSR_CIOS30 (0x40000000) -#define MCF_ETPU_ECIOSR_CIOS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDTROSR */ -#define MCF_ETPU_ECDTROSR_DTROS0 (0x00000001) -#define MCF_ETPU_ECDTROSR_DTROS1 (0x00000002) -#define MCF_ETPU_ECDTROSR_DTROS2 (0x00000004) -#define MCF_ETPU_ECDTROSR_DTROS3 (0x00000008) -#define MCF_ETPU_ECDTROSR_DTROS4 (0x00000010) -#define MCF_ETPU_ECDTROSR_DTROS5 (0x00000020) -#define MCF_ETPU_ECDTROSR_DTROS6 (0x00000040) -#define MCF_ETPU_ECDTROSR_DTROS7 (0x00000080) -#define MCF_ETPU_ECDTROSR_DTROS8 (0x00000100) -#define MCF_ETPU_ECDTROSR_DTROS9 (0x00000200) -#define MCF_ETPU_ECDTROSR_DTROS10 (0x00000400) -#define MCF_ETPU_ECDTROSR_DTROS11 (0x00000800) -#define MCF_ETPU_ECDTROSR_DTROS12 (0x00001000) -#define MCF_ETPU_ECDTROSR_DTROS13 (0x00002000) -#define MCF_ETPU_ECDTROSR_DTROS14 (0x00004000) -#define MCF_ETPU_ECDTROSR_DTROS15 (0x00008000) -#define MCF_ETPU_ECDTROSR_DTROS16 (0x00010000) -#define MCF_ETPU_ECDTROSR_DTROS17 (0x00020000) -#define MCF_ETPU_ECDTROSR_DTROS18 (0x00040000) -#define MCF_ETPU_ECDTROSR_DTROS19 (0x00080000) -#define MCF_ETPU_ECDTROSR_DTROS20 (0x00100000) -#define MCF_ETPU_ECDTROSR_DTROS21 (0x00200000) -#define MCF_ETPU_ECDTROSR_DTROS22 (0x00400000) -#define MCF_ETPU_ECDTROSR_DTROS23 (0x00800000) -#define MCF_ETPU_ECDTROSR_DTROS24 (0x01000000) -#define MCF_ETPU_ECDTROSR_DTROS25 (0x02000000) -#define MCF_ETPU_ECDTROSR_DTROS26 (0x04000000) -#define MCF_ETPU_ECDTROSR_DTROS27 (0x08000000) -#define MCF_ETPU_ECDTROSR_DTROS28 (0x10000000) -#define MCF_ETPU_ECDTROSR_DTROS29 (0x20000000) -#define MCF_ETPU_ECDTROSR_DTROS30 (0x40000000) -#define MCF_ETPU_ECDTROSR_DTROS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECIER */ -#define MCF_ETPU_ECIER_CIE0 (0x00000001) -#define MCF_ETPU_ECIER_CIE1 (0x00000002) -#define MCF_ETPU_ECIER_CIE2 (0x00000004) -#define MCF_ETPU_ECIER_CIE3 (0x00000008) -#define MCF_ETPU_ECIER_CIE4 (0x00000010) -#define MCF_ETPU_ECIER_CIE5 (0x00000020) -#define MCF_ETPU_ECIER_CIE6 (0x00000040) -#define MCF_ETPU_ECIER_CIE7 (0x00000080) -#define MCF_ETPU_ECIER_CIE8 (0x00000100) -#define MCF_ETPU_ECIER_CIE9 (0x00000200) -#define MCF_ETPU_ECIER_CIE10 (0x00000400) -#define MCF_ETPU_ECIER_CIE11 (0x00000800) -#define MCF_ETPU_ECIER_CIE12 (0x00001000) -#define MCF_ETPU_ECIER_CIE13 (0x00002000) -#define MCF_ETPU_ECIER_CIE14 (0x00004000) -#define MCF_ETPU_ECIER_CIE15 (0x00008000) -#define MCF_ETPU_ECIER_CIE16 (0x00010000) -#define MCF_ETPU_ECIER_CIE17 (0x00020000) -#define MCF_ETPU_ECIER_CIE18 (0x00040000) -#define MCF_ETPU_ECIER_CIE19 (0x00080000) -#define MCF_ETPU_ECIER_CIE20 (0x00100000) -#define MCF_ETPU_ECIER_CIE21 (0x00200000) -#define MCF_ETPU_ECIER_CIE22 (0x00400000) -#define MCF_ETPU_ECIER_CIE23 (0x00800000) -#define MCF_ETPU_ECIER_CIE24 (0x01000000) -#define MCF_ETPU_ECIER_CIE25 (0x02000000) -#define MCF_ETPU_ECIER_CIE26 (0x04000000) -#define MCF_ETPU_ECIER_CIE27 (0x08000000) -#define MCF_ETPU_ECIER_CIE28 (0x10000000) -#define MCF_ETPU_ECIER_CIE29 (0x20000000) -#define MCF_ETPU_ECIER_CIE30 (0x40000000) -#define MCF_ETPU_ECIER_CIE31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDTRER */ -#define MCF_ETPU_ECDTRER_DTRE0 (0x00000001) -#define MCF_ETPU_ECDTRER_DTRE1 (0x00000002) -#define MCF_ETPU_ECDTRER_DTRE2 (0x00000004) -#define MCF_ETPU_ECDTRER_DTRE3 (0x00000008) -#define MCF_ETPU_ECDTRER_DTRE4 (0x00000010) -#define MCF_ETPU_ECDTRER_DTRE5 (0x00000020) -#define MCF_ETPU_ECDTRER_DTRE6 (0x00000040) -#define MCF_ETPU_ECDTRER_DTRE7 (0x00000080) -#define MCF_ETPU_ECDTRER_DTRE8 (0x00000100) -#define MCF_ETPU_ECDTRER_DTRE9 (0x00000200) -#define MCF_ETPU_ECDTRER_DTRE10 (0x00000400) -#define MCF_ETPU_ECDTRER_DTRE11 (0x00000800) -#define MCF_ETPU_ECDTRER_DTRE12 (0x00001000) -#define MCF_ETPU_ECDTRER_DTRE13 (0x00002000) -#define MCF_ETPU_ECDTRER_DTRE14 (0x00004000) -#define MCF_ETPU_ECDTRER_DTRE15 (0x00008000) -#define MCF_ETPU_ECDTRER_DTRE16 (0x00010000) -#define MCF_ETPU_ECDTRER_DTRE17 (0x00020000) -#define MCF_ETPU_ECDTRER_DTRE18 (0x00040000) -#define MCF_ETPU_ECDTRER_DTRE19 (0x00080000) -#define MCF_ETPU_ECDTRER_DTRE20 (0x00100000) -#define MCF_ETPU_ECDTRER_DTRE21 (0x00200000) -#define MCF_ETPU_ECDTRER_DTRE22 (0x00400000) -#define MCF_ETPU_ECDTRER_DTRE23 (0x00800000) -#define MCF_ETPU_ECDTRER_DTRE24 (0x01000000) -#define MCF_ETPU_ECDTRER_DTRE25 (0x02000000) -#define MCF_ETPU_ECDTRER_DTRE26 (0x04000000) -#define MCF_ETPU_ECDTRER_DTRE27 (0x08000000) -#define MCF_ETPU_ECDTRER_DTRE28 (0x10000000) -#define MCF_ETPU_ECDTRER_DTRE29 (0x20000000) -#define MCF_ETPU_ECDTRER_DTRE30 (0x40000000) -#define MCF_ETPU_ECDTRER_DTRE31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECPSSR */ -#define MCF_ETPU_ECPSSR_SR0 (0x00000001) -#define MCF_ETPU_ECPSSR_SR1 (0x00000002) -#define MCF_ETPU_ECPSSR_SR2 (0x00000004) -#define MCF_ETPU_ECPSSR_SR3 (0x00000008) -#define MCF_ETPU_ECPSSR_SR4 (0x00000010) -#define MCF_ETPU_ECPSSR_SR5 (0x00000020) -#define MCF_ETPU_ECPSSR_SR6 (0x00000040) -#define MCF_ETPU_ECPSSR_SR7 (0x00000080) -#define MCF_ETPU_ECPSSR_SR8 (0x00000100) -#define MCF_ETPU_ECPSSR_SR9 (0x00000200) -#define MCF_ETPU_ECPSSR_SR10 (0x00000400) -#define MCF_ETPU_ECPSSR_SR11 (0x00000800) -#define MCF_ETPU_ECPSSR_SR12 (0x00001000) -#define MCF_ETPU_ECPSSR_SR13 (0x00002000) -#define MCF_ETPU_ECPSSR_SR14 (0x00004000) -#define MCF_ETPU_ECPSSR_SR15 (0x00008000) -#define MCF_ETPU_ECPSSR_SR16 (0x00010000) -#define MCF_ETPU_ECPSSR_SR17 (0x00020000) -#define MCF_ETPU_ECPSSR_SR18 (0x00040000) -#define MCF_ETPU_ECPSSR_SR19 (0x00080000) -#define MCF_ETPU_ECPSSR_SR20 (0x00100000) -#define MCF_ETPU_ECPSSR_SR21 (0x00200000) -#define MCF_ETPU_ECPSSR_SR22 (0x00400000) -#define MCF_ETPU_ECPSSR_SR23 (0x00800000) -#define MCF_ETPU_ECPSSR_SR24 (0x01000000) -#define MCF_ETPU_ECPSSR_SR25 (0x02000000) -#define MCF_ETPU_ECPSSR_SR26 (0x04000000) -#define MCF_ETPU_ECPSSR_SR27 (0x08000000) -#define MCF_ETPU_ECPSSR_SR28 (0x10000000) -#define MCF_ETPU_ECPSSR_SR29 (0x20000000) -#define MCF_ETPU_ECPSSR_SR30 (0x40000000) -#define MCF_ETPU_ECPSSR_SR31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECSSR */ -#define MCF_ETPU_ECSSR_SS0 (0x00000001) -#define MCF_ETPU_ECSSR_SS1 (0x00000002) -#define MCF_ETPU_ECSSR_SS2 (0x00000004) -#define MCF_ETPU_ECSSR_SS3 (0x00000008) -#define MCF_ETPU_ECSSR_SS4 (0x00000010) -#define MCF_ETPU_ECSSR_SS5 (0x00000020) -#define MCF_ETPU_ECSSR_SS6 (0x00000040) -#define MCF_ETPU_ECSSR_SS7 (0x00000080) -#define MCF_ETPU_ECSSR_SS8 (0x00000100) -#define MCF_ETPU_ECSSR_SS9 (0x00000200) -#define MCF_ETPU_ECSSR_SS10 (0x00000400) -#define MCF_ETPU_ECSSR_SS11 (0x00000800) -#define MCF_ETPU_ECSSR_SS12 (0x00001000) -#define MCF_ETPU_ECSSR_SS13 (0x00002000) -#define MCF_ETPU_ECSSR_SS14 (0x00004000) -#define MCF_ETPU_ECSSR_SS15 (0x00008000) -#define MCF_ETPU_ECSSR_SS16 (0x00010000) -#define MCF_ETPU_ECSSR_SS17 (0x00020000) -#define MCF_ETPU_ECSSR_SS18 (0x00040000) -#define MCF_ETPU_ECSSR_SS19 (0x00080000) -#define MCF_ETPU_ECSSR_SS20 (0x00100000) -#define MCF_ETPU_ECSSR_SS21 (0x00200000) -#define MCF_ETPU_ECSSR_SS22 (0x00400000) -#define MCF_ETPU_ECSSR_SS23 (0x00800000) -#define MCF_ETPU_ECSSR_SS24 (0x01000000) -#define MCF_ETPU_ECSSR_SS25 (0x02000000) -#define MCF_ETPU_ECSSR_SS26 (0x04000000) -#define MCF_ETPU_ECSSR_SS27 (0x08000000) -#define MCF_ETPU_ECSSR_SS28 (0x10000000) -#define MCF_ETPU_ECSSR_SS29 (0x20000000) -#define MCF_ETPU_ECSSR_SS30 (0x40000000) -#define MCF_ETPU_ECSSR_SS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECnSCR */ -#define MCF_ETPU_ECnSCR_FM(x) (((x)&0x00000003)<<0) -#define MCF_ETPU_ECnSCR_OBE (0x00002000) -#define MCF_ETPU_ECnSCR_OPS (0x00004000) -#define MCF_ETPU_ECnSCR_IPS (0x00008000) -#define MCF_ETPU_ECnSCR_DTROS (0x00400000) -#define MCF_ETPU_ECnSCR_DTRS (0x00800000) -#define MCF_ETPU_ECnSCR_CIOS (0x40000000) -#define MCF_ETPU_ECnSCR_CIS (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECnCR */ -#define MCF_ETPU_ECnCR_CPBA(x) (((x)&0x000007FF)<<0) -#define MCF_ETPU_ECnCR_OPOL (0x00004000) -#define MCF_ETPU_ECnCR_ODIS (0x00008000) -#define MCF_ETPU_ECnCR_CFS(x) (((x)&0x0000001F)<<16) -#define MCF_ETPU_ECnCR_ETCS (0x01000000) -#define MCF_ETPU_ECnCR_CPR(x) (((x)&0x00000003)<<28) -#define MCF_ETPU_ECnCR_DTRE (0x40000000) -#define MCF_ETPU_ECnCR_CIE (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECnHSSR */ -#define MCF_ETPU_ECnHSSR_HSR(x) (((x)&0x00000007)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_ETPU_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_fec.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_fec.h deleted file mode 100644 index a03c3093..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_fec.h +++ /dev/null @@ -1,202 +0,0 @@ -/* - * File: mcf523x_fec.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_FEC_H__ -#define __MCF523X_FEC_H__ - -/********************************************************************* -* -* Fast Ethernet Controller (FEC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FEC_EIR (*(vuint32*)(void*)(&__IPSBAR[0x001004])) -#define MCF_FEC_EIMR (*(vuint32*)(void*)(&__IPSBAR[0x001008])) -#define MCF_FEC_RDAR (*(vuint32*)(void*)(&__IPSBAR[0x001010])) -#define MCF_FEC_TDAR (*(vuint32*)(void*)(&__IPSBAR[0x001014])) -#define MCF_FEC_ECR (*(vuint32*)(void*)(&__IPSBAR[0x001024])) -#define MCF_FEC_MMFR (*(vuint32*)(void*)(&__IPSBAR[0x001040])) -#define MCF_FEC_MSCR (*(vuint32*)(void*)(&__IPSBAR[0x001044])) -#define MCF_FEC_MIBC (*(vuint32*)(void*)(&__IPSBAR[0x001064])) -#define MCF_FEC_RCR (*(vuint32*)(void*)(&__IPSBAR[0x001084])) -#define MCF_FEC_TCR (*(vuint32*)(void*)(&__IPSBAR[0x0010C4])) -#define MCF_FEC_PALR (*(vuint32*)(void*)(&__IPSBAR[0x0010E4])) -#define MCF_FEC_PAUR (*(vuint32*)(void*)(&__IPSBAR[0x0010E8])) -#define MCF_FEC_OPD (*(vuint32*)(void*)(&__IPSBAR[0x0010EC])) -#define MCF_FEC_IAUR (*(vuint32*)(void*)(&__IPSBAR[0x001118])) -#define MCF_FEC_IALR (*(vuint32*)(void*)(&__IPSBAR[0x00111C])) -#define MCF_FEC_GAUR (*(vuint32*)(void*)(&__IPSBAR[0x001120])) -#define MCF_FEC_GALR (*(vuint32*)(void*)(&__IPSBAR[0x001124])) -#define MCF_FEC_TFWR (*(vuint32*)(void*)(&__IPSBAR[0x001144])) -#define MCF_FEC_FRBR (*(vuint32*)(void*)(&__IPSBAR[0x00114C])) -#define MCF_FEC_FRSR (*(vuint32*)(void*)(&__IPSBAR[0x001150])) -#define MCF_FEC_ERDSR (*(vuint32*)(void*)(&__IPSBAR[0x001180])) -#define MCF_FEC_ETDSR (*(vuint32*)(void*)(&__IPSBAR[0x001184])) -#define MCF_FEC_EMRBR (*(vuint32*)(void*)(&__IPSBAR[0x001188])) -#define MCF_FEC_RMON_T_DROP (*(vuint32*)(void*)(&__IPSBAR[0x001200])) -#define MCF_FEC_RMON_T_PACKETS (*(vuint32*)(void*)(&__IPSBAR[0x001204])) -#define MCF_FEC_RMON_T_BC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x001208])) -#define MCF_FEC_RMON_T_MC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x00120C])) -#define MCF_FEC_RMON_T_CRC_ALIGN (*(vuint32*)(void*)(&__IPSBAR[0x001210])) -#define MCF_FEC_RMON_T_UNDERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001214])) -#define MCF_FEC_RMON_T_OVERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001218])) -#define MCF_FEC_RMON_T_FRAG (*(vuint32*)(void*)(&__IPSBAR[0x00121C])) -#define MCF_FEC_RMON_T_JAB (*(vuint32*)(void*)(&__IPSBAR[0x001220])) -#define MCF_FEC_RMON_T_COL (*(vuint32*)(void*)(&__IPSBAR[0x001224])) -#define MCF_FEC_RMON_T_P64 (*(vuint32*)(void*)(&__IPSBAR[0x001228])) -#define MCF_FEC_RMON_T_P65TO127 (*(vuint32*)(void*)(&__IPSBAR[0x00122C])) -#define MCF_FEC_RMON_T_P128TO255 (*(vuint32*)(void*)(&__IPSBAR[0x001230])) -#define MCF_FEC_RMON_T_P256TO511 (*(vuint32*)(void*)(&__IPSBAR[0x001234])) -#define MCF_FEC_RMON_T_P512TO1023 (*(vuint32*)(void*)(&__IPSBAR[0x001238])) -#define MCF_FEC_RMON_T_P1024TO2047 (*(vuint32*)(void*)(&__IPSBAR[0x00123C])) -#define MCF_FEC_RMON_T_P_GTE2048 (*(vuint32*)(void*)(&__IPSBAR[0x001240])) -#define MCF_FEC_RMON_T_OCTETS (*(vuint32*)(void*)(&__IPSBAR[0x001244])) -#define MCF_FEC_IEEE_T_DROP (*(vuint32*)(void*)(&__IPSBAR[0x001248])) -#define MCF_FEC_IEEE_T_FRAME_OK (*(vuint32*)(void*)(&__IPSBAR[0x00124C])) -#define MCF_FEC_IEEE_T_1COL (*(vuint32*)(void*)(&__IPSBAR[0x001250])) -#define MCF_FEC_IEEE_T_MCOL (*(vuint32*)(void*)(&__IPSBAR[0x001254])) -#define MCF_FEC_IEEE_T_DEF (*(vuint32*)(void*)(&__IPSBAR[0x001258])) -#define MCF_FEC_IEEE_T_LCOL (*(vuint32*)(void*)(&__IPSBAR[0x00125C])) -#define MCF_FEC_IEEE_T_EXCOL (*(vuint32*)(void*)(&__IPSBAR[0x001260])) -#define MCF_FEC_IEEE_T_MACERR (*(vuint32*)(void*)(&__IPSBAR[0x001264])) -#define MCF_FEC_IEEE_T_CSERR (*(vuint32*)(void*)(&__IPSBAR[0x001268])) -#define MCF_FEC_IEEE_T_SQE (*(vuint32*)(void*)(&__IPSBAR[0x00126C])) -#define MCF_FEC_IEEE_T_FDXFC (*(vuint32*)(void*)(&__IPSBAR[0x001270])) -#define MCF_FEC_IEEE_T_OCTETS_OK (*(vuint32*)(void*)(&__IPSBAR[0x001274])) -#define MCF_FEC_RMON_R_PACKETS (*(vuint32*)(void*)(&__IPSBAR[0x001284])) -#define MCF_FEC_RMON_R_BC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x001288])) -#define MCF_FEC_RMON_R_MC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x00128C])) -#define MCF_FEC_RMON_R_CRC_ALIGN (*(vuint32*)(void*)(&__IPSBAR[0x001290])) -#define MCF_FEC_RMON_R_UNDERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001294])) -#define MCF_FEC_RMON_R_OVERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001298])) -#define MCF_FEC_RMON_R_FRAG (*(vuint32*)(void*)(&__IPSBAR[0x00129C])) -#define MCF_FEC_RMON_R_JAB (*(vuint32*)(void*)(&__IPSBAR[0x0012A0])) -#define MCF_FEC_RMON_R_RESVD_0 (*(vuint32*)(void*)(&__IPSBAR[0x0012A4])) -#define MCF_FEC_RMON_R_P64 (*(vuint32*)(void*)(&__IPSBAR[0x0012A8])) -#define MCF_FEC_RMON_R_P65TO127 (*(vuint32*)(void*)(&__IPSBAR[0x0012AC])) -#define MCF_FEC_RMON_R_P128TO255 (*(vuint32*)(void*)(&__IPSBAR[0x0012B0])) -#define MCF_FEC_RMON_R_P256TO511 (*(vuint32*)(void*)(&__IPSBAR[0x0012B4])) -#define MCF_FEC_RMON_R_512TO1023 (*(vuint32*)(void*)(&__IPSBAR[0x0012B8])) -#define MCF_FEC_RMON_R_P_GTE2048 (*(vuint32*)(void*)(&__IPSBAR[0x0012C0])) -#define MCF_FEC_RMON_R_1024TO2047 (*(vuint32*)(void*)(&__IPSBAR[0x0012BC])) -#define MCF_FEC_RMON_R_OCTETS (*(vuint32*)(void*)(&__IPSBAR[0x0012C4])) -#define MCF_FEC_IEEE_R_DROP (*(vuint32*)(void*)(&__IPSBAR[0x0012C8])) -#define MCF_FEC_IEEE_R_FRAME_OK (*(vuint32*)(void*)(&__IPSBAR[0x0012CC])) -#define MCF_FEC_IEEE_R_CRC (*(vuint32*)(void*)(&__IPSBAR[0x0012D0])) -#define MCF_FEC_IEEE_R_ALIGN (*(vuint32*)(void*)(&__IPSBAR[0x0012D4])) -#define MCF_FEC_IEEE_R_MACERR (*(vuint32*)(void*)(&__IPSBAR[0x0012D8])) -#define MCF_FEC_IEEE_R_FDXFC (*(vuint32*)(void*)(&__IPSBAR[0x0012DC])) -#define MCF_FEC_IEEE_R_OCTETS_OK (*(vuint32*)(void*)(&__IPSBAR[0x0012E0])) - -/* Bit definitions and macros for MCF_FEC_EIR */ -#define MCF_FEC_EIR_UN (0x00080000) -#define MCF_FEC_EIR_RL (0x00100000) -#define MCF_FEC_EIR_LC (0x00200000) -#define MCF_FEC_EIR_EBERR (0x00400000) -#define MCF_FEC_EIR_MII (0x00800000) -#define MCF_FEC_EIR_RXB (0x01000000) -#define MCF_FEC_EIR_RXF (0x02000000) -#define MCF_FEC_EIR_TXB (0x04000000) -#define MCF_FEC_EIR_TXF (0x08000000) -#define MCF_FEC_EIR_GRA (0x10000000) -#define MCF_FEC_EIR_BABT (0x20000000) -#define MCF_FEC_EIR_BABR (0x40000000) -#define MCF_FEC_EIR_HBERR (0x80000000) - -/* Bit definitions and macros for MCF_FEC_EIMR */ -#define MCF_FEC_EIMR_UN (0x00080000) -#define MCF_FEC_EIMR_RL (0x00100000) -#define MCF_FEC_EIMR_LC (0x00200000) -#define MCF_FEC_EIMR_EBERR (0x00400000) -#define MCF_FEC_EIMR_MII (0x00800000) -#define MCF_FEC_EIMR_RXB (0x01000000) -#define MCF_FEC_EIMR_RXF (0x02000000) -#define MCF_FEC_EIMR_TXB (0x04000000) -#define MCF_FEC_EIMR_TXF (0x08000000) -#define MCF_FEC_EIMR_GRA (0x10000000) -#define MCF_FEC_EIMR_BABT (0x20000000) -#define MCF_FEC_EIMR_BABR (0x40000000) -#define MCF_FEC_EIMR_HBERR (0x80000000) - -/* Bit definitions and macros for MCF_FEC_RDAR */ -#define MCF_FEC_RDAR_R_DES_ACTIVE (0x01000000) - -/* Bit definitions and macros for MCF_FEC_TDAR */ -#define MCF_FEC_TDAR_X_DES_ACTIVE (0x01000000) - -/* Bit definitions and macros for MCF_FEC_ECR */ -#define MCF_FEC_ECR_RESET (0x00000001) -#define MCF_FEC_ECR_ETHER_EN (0x00000002) - -/* Bit definitions and macros for MCF_FEC_MMFR */ -#define MCF_FEC_MMFR_DATA(x) (((x)&0x0000FFFF)<<0) -#define MCF_FEC_MMFR_TA(x) (((x)&0x00000003)<<16) -#define MCF_FEC_MMFR_RA(x) (((x)&0x0000001F)<<18) -#define MCF_FEC_MMFR_PA(x) (((x)&0x0000001F)<<23) -#define MCF_FEC_MMFR_OP(x) (((x)&0x00000003)<<28) -#define MCF_FEC_MMFR_ST(x) (((x)&0x00000003)<<30) -#define MCF_FEC_MMFR_ST_01 (0x40000000) -#define MCF_FEC_MMFR_OP_READ (0x20000000) -#define MCF_FEC_MMFR_OP_WRITE (0x10000000) -#define MCF_FEC_MMFR_TA_10 (0x00020000) - - -/* Bit definitions and macros for MCF_FEC_MSCR */ -#define MCF_FEC_MSCR_MII_SPEED(x) (((x)&0x0000003F)<<1) -#define MCF_FEC_MSCR_DIS_PREAMBLE (0x00000080) - -/* Bit definitions and macros for MCF_FEC_MIBC */ -#define MCF_FEC_MIBC_MIB_IDLE (0x40000000) -#define MCF_FEC_MIBC_MIB_DISABLE (0x80000000) - -/* Bit definitions and macros for MCF_FEC_RCR */ -#define MCF_FEC_RCR_LOOP (0x00000001) -#define MCF_FEC_RCR_DRT (0x00000002) -#define MCF_FEC_RCR_MII_MODE (0x00000004) -#define MCF_FEC_RCR_PROM (0x00000008) -#define MCF_FEC_RCR_BC_REJ (0x00000010) -#define MCF_FEC_RCR_FCE (0x00000020) -#define MCF_FEC_RCR_MAX_FL(x) (((x)&0x000007FF)<<16) - -/* Bit definitions and macros for MCF_FEC_TCR */ -#define MCF_FEC_TCR_GTS (0x00000001) -#define MCF_FEC_TCR_HBC (0x00000002) -#define MCF_FEC_TCR_FDEN (0x00000004) -#define MCF_FEC_TCR_TFC_PAUSE (0x00000008) -#define MCF_FEC_TCR_RFC_PAUSE (0x00000010) - -/* Bit definitions and macros for MCF_FEC_PAUR */ -#define MCF_FEC_PAUR_TYPE(x) (((x)&0x0000FFFF)<<0) -#define MCF_FEC_PAUR_PADDR2(x) (((x)&0x0000FFFF)<<16) - -/* Bit definitions and macros for MCF_FEC_OPD */ -#define MCF_FEC_OPD_PAUSE_DUR(x) (((x)&0x0000FFFF)<<0) -#define MCF_FEC_OPD_OPCODE(x) (((x)&0x0000FFFF)<<16) - -/* Bit definitions and macros for MCF_FEC_TFWR */ -#define MCF_FEC_TFWR_X_WMRK(x) (((x)&0x00000003)<<0) - -/* Bit definitions and macros for MCF_FEC_FRBR */ -#define MCF_FEC_FRBR_R_BOUND(x) (((x)&0x000000FF)<<2) - -/* Bit definitions and macros for MCF_FEC_FRSR */ -#define MCF_FEC_FRSR_R_FSTART(x) (((x)&0x000000FF)<<2) - -/* Bit definitions and macros for MCF_FEC_ERDSR */ -#define MCF_FEC_ERDSR_R_DES_START(x) (((x)&0x3FFFFFFF)<<2) - -/* Bit definitions and macros for MCF_FEC_ETDSR */ -#define MCF_FEC_ETDSR_X_DES_START(x) (((x)&0x3FFFFFFF)<<2) - -/* Bit definitions and macros for MCF_FEC_EMRBR */ -#define MCF_FEC_EMRBR_R_BUF_SIZE(x) (((x)&0x0000007F)<<4) - -/********************************************************************/ - -#endif /* __MCF523X_FEC_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_fmpll.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_fmpll.h deleted file mode 100644 index acf8505a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_fmpll.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * File: mcf523x_fmpll.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_FMPLL_H__ -#define __MCF523X_FMPLL_H__ - -/********************************************************************* -* -* Frequency Modulated Phase Locked Loop (FMPLL) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FMPLL_SYNCR (*(vuint32*)(void*)(&__IPSBAR[0x120000])) -#define MCF_FMPLL_SYNSR (*(vuint32*)(void*)(&__IPSBAR[0x120004])) - -/* Bit definitions and macros for MCF_FMPLL_SYNCR */ -#define MCF_FMPLL_SYNCR_EXP(x) (((x)&0x000003FF)<<0) -#define MCF_FMPLL_SYNCR_DEPTH(x) (((x)&0x00000003)<<10) -#define MCF_FMPLL_SYNCR_RATE (0x00001000) -#define MCF_FMPLL_SYNCR_LOCIRQ (0x00002000) -#define MCF_FMPLL_SYNCR_LOLIRQ (0x00004000) -#define MCF_FMPLL_SYNCR_DISCLK (0x00008000) -#define MCF_FMPLL_SYNCR_LOCRE (0x00010000) -#define MCF_FMPLL_SYNCR_LOLRE (0x00020000) -#define MCF_FMPLL_SYNCR_LOCEN (0x00040000) -#define MCF_FMPLL_SYNCR_RFD(x) (((x)&0x00000007)<<19) -#define MCF_FMPLL_SYNCR_MFD(x) (((x)&0x00000007)<<24) - -/* Bit definitions and macros for MCF_FMPLL_SYNSR */ -#define MCF_FMPLL_SYNSR_CALPASS (0x00000001) -#define MCF_FMPLL_SYNSR_CALDONE (0x00000002) -#define MCF_FMPLL_SYNSR_LOCF (0x00000004) -#define MCF_FMPLL_SYNSR_LOCK (0x00000008) -#define MCF_FMPLL_SYNSR_LOCKS (0x00000010) -#define MCF_FMPLL_SYNSR_PLLREF (0x00000020) -#define MCF_FMPLL_SYNSR_PLLSEL (0x00000040) -#define MCF_FMPLL_SYNSR_MODE (0x00000080) -#define MCF_FMPLL_SYNSR_LOC (0x00000100) -#define MCF_FMPLL_SYNSR_LOLF (0x00000200) - -/********************************************************************/ - -#endif /* __MCF523X_FMPLL_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_gpio.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_gpio.h deleted file mode 100644 index 8f727370..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_gpio.h +++ /dev/null @@ -1,670 +0,0 @@ -/* - * File: mcf523x_gpio.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_GPIO_H__ -#define __MCF523X_GPIO_H__ - -/********************************************************************* -* -* General Purpose I/O (GPIO) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_GPIO_PODR_ADDR (*(vuint8 *)(void*)(&__IPSBAR[0x100000])) -#define MCF_GPIO_PODR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100001])) -#define MCF_GPIO_PODR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100002])) -#define MCF_GPIO_PODR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100003])) -#define MCF_GPIO_PODR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100004])) -#define MCF_GPIO_PODR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100005])) -#define MCF_GPIO_PODR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100006])) -#define MCF_GPIO_PODR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100007])) -#define MCF_GPIO_PODR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100008])) -#define MCF_GPIO_PODR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100009])) -#define MCF_GPIO_PODR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10000A])) -#define MCF_GPIO_PODR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10000B])) -#define MCF_GPIO_PODR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10000C])) -#define MCF_GPIO_PDDR_APDDR (*(vuint8 *)(void*)(&__IPSBAR[0x100010])) -#define MCF_GPIO_PDDR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100011])) -#define MCF_GPIO_PDDR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100012])) -#define MCF_GPIO_PDDR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100013])) -#define MCF_GPIO_PDDR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100014])) -#define MCF_GPIO_PDDR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100015])) -#define MCF_GPIO_PDDR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100016])) -#define MCF_GPIO_PDDR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100017])) -#define MCF_GPIO_PDDR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100018])) -#define MCF_GPIO_PDDR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100019])) -#define MCF_GPIO_PDDR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10001A])) -#define MCF_GPIO_PDDR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10001B])) -#define MCF_GPIO_PDDR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10001C])) -#define MCF_GPIO_PPDSDR_ADDR (*(vuint8 *)(void*)(&__IPSBAR[0x100020])) -#define MCF_GPIO_PPDSDR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100021])) -#define MCF_GPIO_PPDSDR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100022])) -#define MCF_GPIO_PPDSDR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100023])) -#define MCF_GPIO_PPDSDR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100024])) -#define MCF_GPIO_PPDSDR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100027])) -#define MCF_GPIO_PPDSDR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100025])) -#define MCF_GPIO_PPDSDR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100026])) -#define MCF_GPIO_PPDSDR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100028])) -#define MCF_GPIO_PPDSDR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100029])) -#define MCF_GPIO_PPDSDR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10002A])) -#define MCF_GPIO_PPDSDR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10002B])) -#define MCF_GPIO_PPDSDR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10002C])) -#define MCF_GPIO_PCLRR_ADDR (*(vuint8 *)(void*)(&__IPSBAR[0x100030])) -#define MCF_GPIO_PCLRR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100031])) -#define MCF_GPIO_PCLRR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100032])) -#define MCF_GPIO_PCLRR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100033])) -#define MCF_GPIO_PCLRR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100034])) -#define MCF_GPIO_PCLRR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100035])) -#define MCF_GPIO_PCLRR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100036])) -#define MCF_GPIO_PCLRR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100037])) -#define MCF_GPIO_PCLRR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100038])) -#define MCF_GPIO_PCLRR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100039])) -#define MCF_GPIO_PCLRR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10003A])) -#define MCF_GPIO_PCLRR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10003B])) -#define MCF_GPIO_PCLRR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10003C])) -#define MCF_GPIO_PAR_AD (*(vuint8 *)(void*)(&__IPSBAR[0x100040])) -#define MCF_GPIO_PAR_BUSCTL (*(vuint16*)(void*)(&__IPSBAR[0x100042])) -#define MCF_GPIO_PAR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100044])) -#define MCF_GPIO_PAR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100045])) -#define MCF_GPIO_PAR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100046])) -#define MCF_GPIO_PAR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100047])) -#define MCF_GPIO_PAR_UART (*(vuint16*)(void*)(&__IPSBAR[0x100048])) -#define MCF_GPIO_PAR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10004A])) -#define MCF_GPIO_PAR_TIMER (*(vuint16*)(void*)(&__IPSBAR[0x10004C])) -#define MCF_GPIO_PAR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10004E])) -#define MCF_GPIO_DSCR_EIM (*(vuint8 *)(void*)(&__IPSBAR[0x100050])) -#define MCF_GPIO_DSCR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x100051])) -#define MCF_GPIO_DSCR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100052])) -#define MCF_GPIO_DSCR_UART (*(vuint8 *)(void*)(&__IPSBAR[0x100053])) -#define MCF_GPIO_DSCR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x100054])) -#define MCF_GPIO_DSCR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x100055])) - -/* Bit definitions and macros for MCF_GPIO_PODR_ADDR */ -#define MCF_GPIO_PODR_ADDR_PODR_ADDR5 (0x20) -#define MCF_GPIO_PODR_ADDR_PODR_ADDR6 (0x40) -#define MCF_GPIO_PODR_ADDR_PODR_ADDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_DATAH */ -#define MCF_GPIO_PODR_DATAH_PODR_DATAH0 (0x01) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH1 (0x02) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH2 (0x04) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH3 (0x08) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH4 (0x10) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH5 (0x20) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH6 (0x40) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_DATAL */ -#define MCF_GPIO_PODR_DATAL_PODR_DATAL0 (0x01) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL1 (0x02) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL2 (0x04) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL3 (0x08) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL4 (0x10) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL5 (0x20) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL6 (0x40) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_BUSCTL */ -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL0 (0x01) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL1 (0x02) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL2 (0x04) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL3 (0x08) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL4 (0x10) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL5 (0x20) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL6 (0x40) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_BS */ -#define MCF_GPIO_PODR_BS_PODR_BS0 (0x01) -#define MCF_GPIO_PODR_BS_PODR_BS1 (0x02) -#define MCF_GPIO_PODR_BS_PODR_BS2 (0x04) -#define MCF_GPIO_PODR_BS_PODR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PODR_CS */ -#define MCF_GPIO_PODR_CS_PODR_CS1 (0x02) -#define MCF_GPIO_PODR_CS_PODR_CS2 (0x04) -#define MCF_GPIO_PODR_CS_PODR_CS3 (0x08) -#define MCF_GPIO_PODR_CS_PODR_CS4 (0x10) -#define MCF_GPIO_PODR_CS_PODR_CS5 (0x20) -#define MCF_GPIO_PODR_CS_PODR_CS6 (0x40) -#define MCF_GPIO_PODR_CS_PODR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_SDRAM */ -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM0 (0x01) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM1 (0x02) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM2 (0x04) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM3 (0x08) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM4 (0x10) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PODR_FECI2C */ -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C0 (0x01) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C1 (0x02) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C2 (0x04) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PODR_UARTH */ -#define MCF_GPIO_PODR_UARTH_PODR_UARTH0 (0x01) -#define MCF_GPIO_PODR_UARTH_PODR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PODR_UARTL */ -#define MCF_GPIO_PODR_UARTL_PODR_UARTL0 (0x01) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL1 (0x02) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL2 (0x04) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL3 (0x08) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL4 (0x10) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL5 (0x20) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL6 (0x40) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_QSPI */ -#define MCF_GPIO_PODR_QSPI_PODR_QSPI0 (0x01) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI1 (0x02) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI2 (0x04) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI3 (0x08) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PODR_TIMER */ -#define MCF_GPIO_PODR_TIMER_PODR_TIMER0 (0x01) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER1 (0x02) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER2 (0x04) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER3 (0x08) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER4 (0x10) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER5 (0x20) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER6 (0x40) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_ETPU */ -#define MCF_GPIO_PODR_ETPU_PODR_ETPU0 (0x01) -#define MCF_GPIO_PODR_ETPU_PODR_ETPU1 (0x02) -#define MCF_GPIO_PODR_ETPU_PODR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PDDR_APDDR */ -#define MCF_GPIO_PDDR_APDDR_PDDR_APDDR5 (0x20) -#define MCF_GPIO_PDDR_APDDR_PDDR_APDDR6 (0x40) -#define MCF_GPIO_PDDR_APDDR_PDDR_APDDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DATAH */ -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH0 (0x01) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH1 (0x02) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH2 (0x04) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH3 (0x08) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH4 (0x10) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH5 (0x20) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH6 (0x40) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DATAL */ -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL0 (0x01) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL1 (0x02) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL2 (0x04) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL3 (0x08) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL4 (0x10) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL5 (0x20) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL6 (0x40) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_BUSCTL */ -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL0 (0x01) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL1 (0x02) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL2 (0x04) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL3 (0x08) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL4 (0x10) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL5 (0x20) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL6 (0x40) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_BS */ -#define MCF_GPIO_PDDR_BS_PDDR_BS0 (0x01) -#define MCF_GPIO_PDDR_BS_PDDR_BS3(x) (((x)&0x07)<<1) - -/* Bit definitions and macros for MCF_GPIO_PDDR_CS */ -#define MCF_GPIO_PDDR_CS_PDDR_CS1 (0x02) -#define MCF_GPIO_PDDR_CS_PDDR_CS2 (0x04) -#define MCF_GPIO_PDDR_CS_PDDR_CS3 (0x08) -#define MCF_GPIO_PDDR_CS_PDDR_CS4 (0x10) -#define MCF_GPIO_PDDR_CS_PDDR_CS5 (0x20) -#define MCF_GPIO_PDDR_CS_PDDR_CS6 (0x40) -#define MCF_GPIO_PDDR_CS_PDDR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_SDRAM */ -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM0 (0x01) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM1 (0x02) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM2 (0x04) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM3 (0x08) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM4 (0x10) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FECI2C */ -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0 (0x01) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1 (0x02) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C2 (0x04) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PDDR_UARTH */ -#define MCF_GPIO_PDDR_UARTH_PDDR_UARTH0 (0x01) -#define MCF_GPIO_PDDR_UARTH_PDDR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PDDR_UARTL */ -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL0 (0x01) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL1 (0x02) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL2 (0x04) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL3 (0x08) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL4 (0x10) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL5 (0x20) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL6 (0x40) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_QSPI */ -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI0 (0x01) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI1 (0x02) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI2 (0x04) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI3 (0x08) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PDDR_TIMER */ -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER0 (0x01) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER1 (0x02) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER2 (0x04) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER3 (0x08) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER4 (0x10) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER5 (0x20) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER6 (0x40) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_ETPU */ -#define MCF_GPIO_PDDR_ETPU_PDDR_ETPU0 (0x01) -#define MCF_GPIO_PDDR_ETPU_PDDR_ETPU1 (0x02) -#define MCF_GPIO_PDDR_ETPU_PDDR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_ADDR */ -#define MCF_GPIO_PPDSDR_ADDR_PPDSDR_ADDR5 (0x20) -#define MCF_GPIO_PPDSDR_ADDR_PPDSDR_ADDR6 (0x40) -#define MCF_GPIO_PPDSDR_ADDR_PPDSDR_ADDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DATAH */ -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH0 (0x01) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH1 (0x02) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH2 (0x04) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH3 (0x08) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH4 (0x10) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH5 (0x20) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH6 (0x40) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DATAL */ -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL0 (0x01) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL1 (0x02) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL2 (0x04) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL3 (0x08) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL4 (0x10) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL5 (0x20) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL6 (0x40) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_BUSCTL */ -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL0 (0x01) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL1 (0x02) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL2 (0x04) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL3 (0x08) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL4 (0x10) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL5 (0x20) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL6 (0x40) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_BS */ -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS0 (0x01) -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS1 (0x02) -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS2 (0x04) -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECI2C */ -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C0 (0x01) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C1 (0x02) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C2 (0x04) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_CS */ -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS1 (0x02) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS2 (0x04) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS3 (0x08) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS4 (0x10) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS5 (0x20) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS6 (0x40) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_SDRAM */ -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM0 (0x01) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM1 (0x02) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM2 (0x04) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM3 (0x08) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM4 (0x10) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM5 (0x20) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM6 (0x40) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_UARTH */ -#define MCF_GPIO_PPDSDR_UARTH_PPDSDR_UARTH0 (0x01) -#define MCF_GPIO_PPDSDR_UARTH_PPDSDR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_UARTL */ -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL0 (0x01) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL1 (0x02) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL2 (0x04) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL3 (0x08) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL4 (0x10) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL5 (0x20) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL6 (0x40) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_QSPI */ -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI0 (0x01) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI1 (0x02) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI2 (0x04) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI3 (0x08) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_TIMER */ -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER0 (0x01) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER1 (0x02) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER2 (0x04) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER3 (0x08) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER4 (0x10) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER5 (0x20) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER6 (0x40) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_ETPU */ -#define MCF_GPIO_PPDSDR_ETPU_PPDSDR_ETPU0 (0x01) -#define MCF_GPIO_PPDSDR_ETPU_PPDSDR_ETPU1 (0x02) -#define MCF_GPIO_PPDSDR_ETPU_PPDSDR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_ADDR */ -#define MCF_GPIO_PCLRR_ADDR_PCLRR_ADDR5 (0x20) -#define MCF_GPIO_PCLRR_ADDR_PCLRR_ADDR6 (0x40) -#define MCF_GPIO_PCLRR_ADDR_PCLRR_ADDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DATAH */ -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH0 (0x01) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH1 (0x02) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH2 (0x04) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH3 (0x08) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH4 (0x10) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH5 (0x20) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH6 (0x40) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DATAL */ -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL0 (0x01) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL1 (0x02) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL2 (0x04) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL3 (0x08) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL4 (0x10) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL5 (0x20) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL6 (0x40) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_BUSCTL */ -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL0 (0x01) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL1 (0x02) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL2 (0x04) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL3 (0x08) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL4 (0x10) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL5 (0x20) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL6 (0x40) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_BS */ -#define MCF_GPIO_PCLRR_BS_PCLRR_BS0 (0x01) -#define MCF_GPIO_PCLRR_BS_PCLRR_BS1 (0x02) -#define MCF_GPIO_PCLRR_BS_PCLRR_BS2 (0x04) -#define MCF_GPIO_PCLRR_BS_PCLRR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_CS */ -#define MCF_GPIO_PCLRR_CS_PCLRR_CS1 (0x02) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS2 (0x04) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS3 (0x08) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS4 (0x10) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS5 (0x20) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS6 (0x40) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_SDRAM */ -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM0 (0x01) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM1 (0x02) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM2 (0x04) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM3 (0x08) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM4 (0x10) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FECI2C */ -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C0 (0x01) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C1 (0x02) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C2 (0x04) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_UARTH */ -#define MCF_GPIO_PCLRR_UARTH_PCLRR_UARTH0 (0x01) -#define MCF_GPIO_PCLRR_UARTH_PCLRR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_UARTL */ -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL0 (0x01) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL1 (0x02) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL2 (0x04) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL3 (0x08) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL4 (0x10) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL5 (0x20) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL6 (0x40) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_QSPI */ -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI0 (0x01) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI1 (0x02) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI2 (0x04) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI3 (0x08) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_TIMER */ -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER0 (0x01) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER1 (0x02) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER2 (0x04) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER3 (0x08) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER4 (0x10) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER5 (0x20) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER6 (0x40) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_ETPU */ -#define MCF_GPIO_PCLRR_ETPU_PCLRR_ETPU0 (0x01) -#define MCF_GPIO_PCLRR_ETPU_PCLRR_ETPU1 (0x02) -#define MCF_GPIO_PCLRR_ETPU_PCLRR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PAR_AD */ -#define MCF_GPIO_PAR_AD_PAR_DATAL (0x01) -#define MCF_GPIO_PAR_AD_PAR_ADDR21 (0x20) -#define MCF_GPIO_PAR_AD_PAR_ADDR22 (0x40) -#define MCF_GPIO_PAR_AD_PAR_ADDR23 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PAR_BUSCTL */ -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP(x) (((x)&0x0003)<<0) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS(x) (((x)&0x0003)<<2) -#define MCF_GPIO_PAR_BUSCTL_PAR_TSIZ0 (0x0010) -#define MCF_GPIO_PAR_BUSCTL_PAR_TSIZ1 (0x0040) -#define MCF_GPIO_PAR_BUSCTL_PAR_RWB (0x0100) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_BUSCTL_PAR_TA (0x1000) -#define MCF_GPIO_PAR_BUSCTL_PAR_OE (0x4000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA_GPIO (0x0000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA_DMA (0x0800) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA_TEA (0x0C00) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_GPIO (0x0000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_DMA (0x0080) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_TS (0x00C0) -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP_GPIO (0x0000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP_DMA (0x0002) -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP_TEA (0x0003) - -/* Bit definitions and macros for MCF_GPIO_PAR_BS */ -#define MCF_GPIO_PAR_BS_PAR_BS0 (0x01) -#define MCF_GPIO_PAR_BS_PAR_BS1 (0x02) -#define MCF_GPIO_PAR_BS_PAR_BS2 (0x04) -#define MCF_GPIO_PAR_BS_PAR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PAR_CS */ -#define MCF_GPIO_PAR_CS_PAR_CS1 (0x02) -#define MCF_GPIO_PAR_CS_PAR_CS2 (0x04) -#define MCF_GPIO_PAR_CS_PAR_CS3 (0x08) -#define MCF_GPIO_PAR_CS_PAR_CS4 (0x10) -#define MCF_GPIO_PAR_CS_PAR_CS5 (0x20) -#define MCF_GPIO_PAR_CS_PAR_CS6 (0x40) -#define MCF_GPIO_PAR_CS_PAR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PAR_SDRAM */ -#define MCF_GPIO_PAR_SDRAM_PAR_SDCS0 (0x01) -#define MCF_GPIO_PAR_SDRAM_PAR_SDCS1 (0x02) -#define MCF_GPIO_PAR_SDRAM_PAR_SCKE (0x04) -#define MCF_GPIO_PAR_SDRAM_PAR_SRAS (0x08) -#define MCF_GPIO_PAR_SDRAM_PAR_SCAS (0x10) -#define MCF_GPIO_PAR_SDRAM_PAR_SDWE (0x20) -#define MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(x) (((x)&0x03)<<6) - -/* Bit definitions and macros for MCF_GPIO_PAR_FECI2C */ -#define MCF_GPIO_PAR_FECI2C_PAR_SDA(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL(x) (((x)&0x03)<<2) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO(x) (((x)&0x03)<<4) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC(x) (((x)&0x03)<<6) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_UART2 (0x40) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_I2C (0x80) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_FEC (0xC0) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_UART2 (0x10) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_I2C (0x20) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_FEC (0x30) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_FLEX (0x08) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_I2C (0x0C) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_FLEX (0x02) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_I2C (0x03) - -/* Bit definitions and macros for MCF_GPIO_PAR_UART */ -#define MCF_GPIO_PAR_UART_PAR_U0RTS (0x0001) -#define MCF_GPIO_PAR_UART_PAR_U0CTS (0x0002) -#define MCF_GPIO_PAR_UART_PAR_U0TXD (0x0004) -#define MCF_GPIO_PAR_UART_PAR_U0RXD (0x0008) -#define MCF_GPIO_PAR_UART_PAR_U1RTS(x) (((x)&0x0003)<<4) -#define MCF_GPIO_PAR_UART_PAR_U1CTS(x) (((x)&0x0003)<<6) -#define MCF_GPIO_PAR_UART_PAR_U1TXD(x) (((x)&0x0003)<<8) -#define MCF_GPIO_PAR_UART_PAR_U1RXD(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_UART_PAR_U2TXD (0x1000) -#define MCF_GPIO_PAR_UART_PAR_U2RXD (0x2000) -#define MCF_GPIO_PAR_UART_PAR_CAN1EN (0x4000) -#define MCF_GPIO_PAR_UART_PAR_DREQ2 (0x8000) -#define MCF_GPIO_PAR_UART_PAR_U1RXD_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1RXD_FLEX (0x0800) -#define MCF_GPIO_PAR_UART_PAR_U1RXD_UART1 (0x0C00) -#define MCF_GPIO_PAR_UART_PAR_U1TXD_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1TXD_FLEX (0x0200) -#define MCF_GPIO_PAR_UART_PAR_U1TXD_UART1 (0x0300) -#define MCF_GPIO_PAR_UART_PAR_U1CTS_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1CTS_UART2 (0x0080) -#define MCF_GPIO_PAR_UART_PAR_U1CTS_UART1 (0x00C0) -#define MCF_GPIO_PAR_UART_PAR_U1RTS_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1RTS_UART2 (0x0020) -#define MCF_GPIO_PAR_UART_PAR_U1RTS_UART1 (0x0030) - -/* Bit definitions and macros for MCF_GPIO_PAR_QSPI */ -#define MCF_GPIO_PAR_QSPI_PAR_SCK(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_QSPI_PAR_DOUT (0x04) -#define MCF_GPIO_PAR_QSPI_PAR_DIN(x) (((x)&0x03)<<3) -#define MCF_GPIO_PAR_QSPI_PAR_PCS0 (0x20) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1(x) (((x)&0x03)<<6) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1_GPIO (0x00) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1_SDRAMC (0x80) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1_QSPI (0xC0) -#define MCF_GPIO_PAR_QSPI_PAR_DIN_GPIO (0x00) -#define MCF_GPIO_PAR_QSPI_PAR_DIN_I2C (0x10) -#define MCF_GPIO_PAR_QSPI_PAR_DIN_QSPI (0x1C) -#define MCF_GPIO_PAR_QSPI_PAR_SCK_GPIO (0x00) -#define MCF_GPIO_PAR_QSPI_PAR_SCK_I2C (0x02) -#define MCF_GPIO_PAR_QSPI_PAR_SCK_QSPI (0x03) - -/* Bit definitions and macros for MCF_GPIO_PAR_TIMER */ -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT(x) (((x)&0x0003)<<0) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT(x) (((x)&0x0003)<<2) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT(x) (((x)&0x0003)<<4) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT(x) (((x)&0x0003)<<6) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN(x) (((x)&0x0003)<<8) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN(x) (((x)&0x0003)<<12) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN(x) (((x)&0x0003)<<14) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_QSPI (0x4000) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_UART2 (0x8000) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_T3IN (0xC000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_T2OUT (0x1000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_DMA (0x2000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_T2IN (0x3000) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_T1OUT (0x0400) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_DMA (0x0800) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_T1IN (0x0C00) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN_DMA (0x0200) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN_T0IN (0x0300) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_QSPI (0x0040) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_UART2 (0x0080) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_T3OUT (0x00C0) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT_DMA (0x0020) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT_T2OUT (0x0030) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT_DMA (0x0008) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT_T1OUT (0x000C) -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT_DMA (0x0002) -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT_T0OUT (0x0003) - -/* Bit definitions and macros for MCF_GPIO_PAR_ETPU */ -#define MCF_GPIO_PAR_ETPU_PAR_LTPU_ODIS (0x01) -#define MCF_GPIO_PAR_ETPU_PAR_UTPU_ODIS (0x02) -#define MCF_GPIO_PAR_ETPU_PAR_TCRCLK (0x04) - -/* Bit definitions and macros for MCF_GPIO_DSCR_EIM */ -#define MCF_GPIO_DSCR_EIM_DSCR_EIM0 (0x01) -#define MCF_GPIO_DSCR_EIM_DSCR_EIM1 (0x10) - -/* Bit definitions and macros for MCF_GPIO_DSCR_ETPU */ -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_7_0 (0x01) -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_15_8 (0x04) -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_23_16 (0x10) -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_31_24 (0x40) - -/* Bit definitions and macros for MCF_GPIO_DSCR_FECI2C */ -#define MCF_GPIO_DSCR_FECI2C_DSCR_I2C (0x01) -#define MCF_GPIO_DSCR_FECI2C_DSCR_FEC (0x10) - -/* Bit definitions and macros for MCF_GPIO_DSCR_UART */ -#define MCF_GPIO_DSCR_UART_DSCR_UART0 (0x01) -#define MCF_GPIO_DSCR_UART_DSCR_UART1 (0x04) -#define MCF_GPIO_DSCR_UART_DSCR_UART2 (0x10) -#define MCF_GPIO_DSCR_UART_DSCR_IRQ (0x40) - -/* Bit definitions and macros for MCF_GPIO_DSCR_QSPI */ -#define MCF_GPIO_DSCR_QSPI_DSCR_QSPI (0x01) - -/* Bit definitions and macros for MCF_GPIO_DSCR_TIMER */ -#define MCF_GPIO_DSCR_TIMER_DSCR_TIMER (0x01) - -/********************************************************************/ - -#endif /* __MCF523X_GPIO_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_i2c.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_i2c.h deleted file mode 100644 index 947ea1f7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_i2c.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * File: mcf523x_i2c.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_I2C_H__ -#define __MCF523X_I2C_H__ - -/********************************************************************* -* -* I2C Module (I2C) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_I2C_I2AR (*(vuint8 *)(void*)(&__IPSBAR[0x000300])) -#define MCF_I2C_I2FDR (*(vuint8 *)(void*)(&__IPSBAR[0x000304])) -#define MCF_I2C_I2CR (*(vuint8 *)(void*)(&__IPSBAR[0x000308])) -#define MCF_I2C_I2SR (*(vuint8 *)(void*)(&__IPSBAR[0x00030C])) -#define MCF_I2C_I2DR (*(vuint8 *)(void*)(&__IPSBAR[0x000310])) -#define MCF_I2C_I2ICR (*(vuint8 *)(void*)(&__IPSBAR[0x000320])) - -/* Bit definitions and macros for MCF_I2C_I2AR */ -#define MCF_I2C_I2AR_ADR(x) (((x)&0x7F)<<1) - -/* Bit definitions and macros for MCF_I2C_I2FDR */ -#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F)<<0) - -/* Bit definitions and macros for MCF_I2C_I2CR */ -#define MCF_I2C_I2CR_RSTA (0x04) -#define MCF_I2C_I2CR_TXAK (0x08) -#define MCF_I2C_I2CR_MTX (0x10) -#define MCF_I2C_I2CR_MSTA (0x20) -#define MCF_I2C_I2CR_IIEN (0x40) -#define MCF_I2C_I2CR_IEN (0x80) - -/* Bit definitions and macros for MCF_I2C_I2SR */ -#define MCF_I2C_I2SR_RXAK (0x01) -#define MCF_I2C_I2SR_IIF (0x02) -#define MCF_I2C_I2SR_SRW (0x04) -#define MCF_I2C_I2SR_IAL (0x10) -#define MCF_I2C_I2SR_IBB (0x20) -#define MCF_I2C_I2SR_IAAS (0x40) -#define MCF_I2C_I2SR_ICF (0x80) - -/* Bit definitions and macros for MCF_I2C_I2ICR */ -#define MCF_I2C_I2ICR_IE (0x01) -#define MCF_I2C_I2ICR_RE (0x02) -#define MCF_I2C_I2ICR_TE (0x04) -#define MCF_I2C_I2ICR_BNBE (0x08) - -/********************************************************************/ - -#endif /* __MCF523X_I2C_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_intc0.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_intc0.h deleted file mode 100644 index 21a1d77c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_intc0.h +++ /dev/null @@ -1,317 +0,0 @@ -/* - * File: mcf523x_intc0.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_INTC0_H__ -#define __MCF523X_INTC0_H__ - -/********************************************************************* -* -* Interrupt Controller 0 (INTC0) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_INTC0_IPRH (*(vuint32*)(void*)(&__IPSBAR[0x000C00])) -#define MCF_INTC0_IPRL (*(vuint32*)(void*)(&__IPSBAR[0x000C04])) -#define MCF_INTC0_IMRH (*(vuint32*)(void*)(&__IPSBAR[0x000C08])) -#define MCF_INTC0_IMRL (*(vuint32*)(void*)(&__IPSBAR[0x000C0C])) -#define MCF_INTC0_INTFRCH (*(vuint32*)(void*)(&__IPSBAR[0x000C10])) -#define MCF_INTC0_INTFRCL (*(vuint32*)(void*)(&__IPSBAR[0x000C14])) -#define MCF_INTC0_IRLR (*(vuint8 *)(void*)(&__IPSBAR[0x000C18])) -#define MCF_INTC0_IACKLPR (*(vuint8 *)(void*)(&__IPSBAR[0x000C19])) -#define MCF_INTC0_ICR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000C40])) -#define MCF_INTC0_ICR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000C41])) -#define MCF_INTC0_ICR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000C42])) -#define MCF_INTC0_ICR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000C43])) -#define MCF_INTC0_ICR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000C44])) -#define MCF_INTC0_ICR5 (*(vuint8 *)(void*)(&__IPSBAR[0x000C45])) -#define MCF_INTC0_ICR6 (*(vuint8 *)(void*)(&__IPSBAR[0x000C46])) -#define MCF_INTC0_ICR7 (*(vuint8 *)(void*)(&__IPSBAR[0x000C47])) -#define MCF_INTC0_ICR8 (*(vuint8 *)(void*)(&__IPSBAR[0x000C48])) -#define MCF_INTC0_ICR9 (*(vuint8 *)(void*)(&__IPSBAR[0x000C49])) -#define MCF_INTC0_ICR10 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4A])) -#define MCF_INTC0_ICR11 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4B])) -#define MCF_INTC0_ICR12 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4C])) -#define MCF_INTC0_ICR13 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4D])) -#define MCF_INTC0_ICR14 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4E])) -#define MCF_INTC0_ICR15 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4F])) -#define MCF_INTC0_ICR16 (*(vuint8 *)(void*)(&__IPSBAR[0x000C50])) -#define MCF_INTC0_ICR17 (*(vuint8 *)(void*)(&__IPSBAR[0x000C51])) -#define MCF_INTC0_ICR18 (*(vuint8 *)(void*)(&__IPSBAR[0x000C52])) -#define MCF_INTC0_ICR19 (*(vuint8 *)(void*)(&__IPSBAR[0x000C53])) -#define MCF_INTC0_ICR20 (*(vuint8 *)(void*)(&__IPSBAR[0x000C54])) -#define MCF_INTC0_ICR21 (*(vuint8 *)(void*)(&__IPSBAR[0x000C55])) -#define MCF_INTC0_ICR22 (*(vuint8 *)(void*)(&__IPSBAR[0x000C56])) -#define MCF_INTC0_ICR23 (*(vuint8 *)(void*)(&__IPSBAR[0x000C57])) -#define MCF_INTC0_ICR24 (*(vuint8 *)(void*)(&__IPSBAR[0x000C58])) -#define MCF_INTC0_ICR25 (*(vuint8 *)(void*)(&__IPSBAR[0x000C59])) -#define MCF_INTC0_ICR26 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5A])) -#define MCF_INTC0_ICR27 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5B])) -#define MCF_INTC0_ICR28 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5C])) -#define MCF_INTC0_ICR29 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5D])) -#define MCF_INTC0_ICR30 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5E])) -#define MCF_INTC0_ICR31 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5F])) -#define MCF_INTC0_ICR32 (*(vuint8 *)(void*)(&__IPSBAR[0x000C60])) -#define MCF_INTC0_ICR33 (*(vuint8 *)(void*)(&__IPSBAR[0x000C61])) -#define MCF_INTC0_ICR34 (*(vuint8 *)(void*)(&__IPSBAR[0x000C62])) -#define MCF_INTC0_ICR35 (*(vuint8 *)(void*)(&__IPSBAR[0x000C63])) -#define MCF_INTC0_ICR36 (*(vuint8 *)(void*)(&__IPSBAR[0x000C64])) -#define MCF_INTC0_ICR37 (*(vuint8 *)(void*)(&__IPSBAR[0x000C65])) -#define MCF_INTC0_ICR38 (*(vuint8 *)(void*)(&__IPSBAR[0x000C66])) -#define MCF_INTC0_ICR39 (*(vuint8 *)(void*)(&__IPSBAR[0x000C67])) -#define MCF_INTC0_ICR40 (*(vuint8 *)(void*)(&__IPSBAR[0x000C68])) -#define MCF_INTC0_ICR41 (*(vuint8 *)(void*)(&__IPSBAR[0x000C69])) -#define MCF_INTC0_ICR42 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6A])) -#define MCF_INTC0_ICR43 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6B])) -#define MCF_INTC0_ICR44 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6C])) -#define MCF_INTC0_ICR45 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6D])) -#define MCF_INTC0_ICR46 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6E])) -#define MCF_INTC0_ICR47 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6F])) -#define MCF_INTC0_ICR48 (*(vuint8 *)(void*)(&__IPSBAR[0x000C70])) -#define MCF_INTC0_ICR49 (*(vuint8 *)(void*)(&__IPSBAR[0x000C71])) -#define MCF_INTC0_ICR50 (*(vuint8 *)(void*)(&__IPSBAR[0x000C72])) -#define MCF_INTC0_ICR51 (*(vuint8 *)(void*)(&__IPSBAR[0x000C73])) -#define MCF_INTC0_ICR52 (*(vuint8 *)(void*)(&__IPSBAR[0x000C74])) -#define MCF_INTC0_ICR53 (*(vuint8 *)(void*)(&__IPSBAR[0x000C75])) -#define MCF_INTC0_ICR54 (*(vuint8 *)(void*)(&__IPSBAR[0x000C76])) -#define MCF_INTC0_ICR55 (*(vuint8 *)(void*)(&__IPSBAR[0x000C77])) -#define MCF_INTC0_ICR56 (*(vuint8 *)(void*)(&__IPSBAR[0x000C78])) -#define MCF_INTC0_ICR57 (*(vuint8 *)(void*)(&__IPSBAR[0x000C79])) -#define MCF_INTC0_ICR58 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7A])) -#define MCF_INTC0_ICR59 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7B])) -#define MCF_INTC0_ICR60 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7C])) -#define MCF_INTC0_ICR61 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7D])) -#define MCF_INTC0_ICR62 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7E])) -#define MCF_INTC0_ICR63 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7F])) -#define MCF_INTC0_ICRn(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000C40+((x)*0x001)])) -#define MCF_INTC0_SWIACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE0])) -#define MCF_INTC0_L1IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE4])) -#define MCF_INTC0_L2IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE8])) -#define MCF_INTC0_L3IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CEC])) -#define MCF_INTC0_L4IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF0])) -#define MCF_INTC0_L5IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF4])) -#define MCF_INTC0_L6IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF8])) -#define MCF_INTC0_L7IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CFC])) -#define MCF_INTC0_LnIACK(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000CE4+((x)*0x004)])) - -/* Bit definitions and macros for MCF_INTC0_IPRH */ -#define MCF_INTC0_IPRH_INT32 (0x00000001) -#define MCF_INTC0_IPRH_INT33 (0x00000002) -#define MCF_INTC0_IPRH_INT34 (0x00000004) -#define MCF_INTC0_IPRH_INT35 (0x00000008) -#define MCF_INTC0_IPRH_INT36 (0x00000010) -#define MCF_INTC0_IPRH_INT37 (0x00000020) -#define MCF_INTC0_IPRH_INT38 (0x00000040) -#define MCF_INTC0_IPRH_INT39 (0x00000080) -#define MCF_INTC0_IPRH_INT40 (0x00000100) -#define MCF_INTC0_IPRH_INT41 (0x00000200) -#define MCF_INTC0_IPRH_INT42 (0x00000400) -#define MCF_INTC0_IPRH_INT43 (0x00000800) -#define MCF_INTC0_IPRH_INT44 (0x00001000) -#define MCF_INTC0_IPRH_INT45 (0x00002000) -#define MCF_INTC0_IPRH_INT46 (0x00004000) -#define MCF_INTC0_IPRH_INT47 (0x00008000) -#define MCF_INTC0_IPRH_INT48 (0x00010000) -#define MCF_INTC0_IPRH_INT49 (0x00020000) -#define MCF_INTC0_IPRH_INT50 (0x00040000) -#define MCF_INTC0_IPRH_INT51 (0x00080000) -#define MCF_INTC0_IPRH_INT52 (0x00100000) -#define MCF_INTC0_IPRH_INT53 (0x00200000) -#define MCF_INTC0_IPRH_INT54 (0x00400000) -#define MCF_INTC0_IPRH_INT55 (0x00800000) -#define MCF_INTC0_IPRH_INT56 (0x01000000) -#define MCF_INTC0_IPRH_INT57 (0x02000000) -#define MCF_INTC0_IPRH_INT58 (0x04000000) -#define MCF_INTC0_IPRH_INT59 (0x08000000) -#define MCF_INTC0_IPRH_INT60 (0x10000000) -#define MCF_INTC0_IPRH_INT61 (0x20000000) -#define MCF_INTC0_IPRH_INT62 (0x40000000) -#define MCF_INTC0_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IPRL */ -#define MCF_INTC0_IPRL_INT1 (0x00000002) -#define MCF_INTC0_IPRL_INT2 (0x00000004) -#define MCF_INTC0_IPRL_INT3 (0x00000008) -#define MCF_INTC0_IPRL_INT4 (0x00000010) -#define MCF_INTC0_IPRL_INT5 (0x00000020) -#define MCF_INTC0_IPRL_INT6 (0x00000040) -#define MCF_INTC0_IPRL_INT7 (0x00000080) -#define MCF_INTC0_IPRL_INT8 (0x00000100) -#define MCF_INTC0_IPRL_INT9 (0x00000200) -#define MCF_INTC0_IPRL_INT10 (0x00000400) -#define MCF_INTC0_IPRL_INT11 (0x00000800) -#define MCF_INTC0_IPRL_INT12 (0x00001000) -#define MCF_INTC0_IPRL_INT13 (0x00002000) -#define MCF_INTC0_IPRL_INT14 (0x00004000) -#define MCF_INTC0_IPRL_INT15 (0x00008000) -#define MCF_INTC0_IPRL_INT16 (0x00010000) -#define MCF_INTC0_IPRL_INT17 (0x00020000) -#define MCF_INTC0_IPRL_INT18 (0x00040000) -#define MCF_INTC0_IPRL_INT19 (0x00080000) -#define MCF_INTC0_IPRL_INT20 (0x00100000) -#define MCF_INTC0_IPRL_INT21 (0x00200000) -#define MCF_INTC0_IPRL_INT22 (0x00400000) -#define MCF_INTC0_IPRL_INT23 (0x00800000) -#define MCF_INTC0_IPRL_INT24 (0x01000000) -#define MCF_INTC0_IPRL_INT25 (0x02000000) -#define MCF_INTC0_IPRL_INT26 (0x04000000) -#define MCF_INTC0_IPRL_INT27 (0x08000000) -#define MCF_INTC0_IPRL_INT28 (0x10000000) -#define MCF_INTC0_IPRL_INT29 (0x20000000) -#define MCF_INTC0_IPRL_INT30 (0x40000000) -#define MCF_INTC0_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IMRH */ -#define MCF_INTC0_IMRH_INT_MASK32 (0x00000001) -#define MCF_INTC0_IMRH_INT_MASK33 (0x00000002) -#define MCF_INTC0_IMRH_INT_MASK34 (0x00000004) -#define MCF_INTC0_IMRH_INT_MASK35 (0x00000008) -#define MCF_INTC0_IMRH_INT_MASK36 (0x00000010) -#define MCF_INTC0_IMRH_INT_MASK37 (0x00000020) -#define MCF_INTC0_IMRH_INT_MASK38 (0x00000040) -#define MCF_INTC0_IMRH_INT_MASK39 (0x00000080) -#define MCF_INTC0_IMRH_INT_MASK40 (0x00000100) -#define MCF_INTC0_IMRH_INT_MASK41 (0x00000200) -#define MCF_INTC0_IMRH_INT_MASK42 (0x00000400) -#define MCF_INTC0_IMRH_INT_MASK43 (0x00000800) -#define MCF_INTC0_IMRH_INT_MASK44 (0x00001000) -#define MCF_INTC0_IMRH_INT_MASK45 (0x00002000) -#define MCF_INTC0_IMRH_INT_MASK46 (0x00004000) -#define MCF_INTC0_IMRH_INT_MASK47 (0x00008000) -#define MCF_INTC0_IMRH_INT_MASK48 (0x00010000) -#define MCF_INTC0_IMRH_INT_MASK49 (0x00020000) -#define MCF_INTC0_IMRH_INT_MASK50 (0x00040000) -#define MCF_INTC0_IMRH_INT_MASK51 (0x00080000) -#define MCF_INTC0_IMRH_INT_MASK52 (0x00100000) -#define MCF_INTC0_IMRH_INT_MASK53 (0x00200000) -#define MCF_INTC0_IMRH_INT_MASK54 (0x00400000) -#define MCF_INTC0_IMRH_INT_MASK55 (0x00800000) -#define MCF_INTC0_IMRH_INT_MASK56 (0x01000000) -#define MCF_INTC0_IMRH_INT_MASK57 (0x02000000) -#define MCF_INTC0_IMRH_INT_MASK58 (0x04000000) -#define MCF_INTC0_IMRH_INT_MASK59 (0x08000000) -#define MCF_INTC0_IMRH_INT_MASK60 (0x10000000) -#define MCF_INTC0_IMRH_INT_MASK61 (0x20000000) -#define MCF_INTC0_IMRH_INT_MASK62 (0x40000000) -#define MCF_INTC0_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IMRL */ -#define MCF_INTC0_IMRL_MASKALL (0x00000001) -#define MCF_INTC0_IMRL_INT_MASK1 (0x00000002) -#define MCF_INTC0_IMRL_INT_MASK2 (0x00000004) -#define MCF_INTC0_IMRL_INT_MASK3 (0x00000008) -#define MCF_INTC0_IMRL_INT_MASK4 (0x00000010) -#define MCF_INTC0_IMRL_INT_MASK5 (0x00000020) -#define MCF_INTC0_IMRL_INT_MASK6 (0x00000040) -#define MCF_INTC0_IMRL_INT_MASK7 (0x00000080) -#define MCF_INTC0_IMRL_INT_MASK8 (0x00000100) -#define MCF_INTC0_IMRL_INT_MASK9 (0x00000200) -#define MCF_INTC0_IMRL_INT_MASK10 (0x00000400) -#define MCF_INTC0_IMRL_INT_MASK11 (0x00000800) -#define MCF_INTC0_IMRL_INT_MASK12 (0x00001000) -#define MCF_INTC0_IMRL_INT_MASK13 (0x00002000) -#define MCF_INTC0_IMRL_INT_MASK14 (0x00004000) -#define MCF_INTC0_IMRL_INT_MASK15 (0x00008000) -#define MCF_INTC0_IMRL_INT_MASK16 (0x00010000) -#define MCF_INTC0_IMRL_INT_MASK17 (0x00020000) -#define MCF_INTC0_IMRL_INT_MASK18 (0x00040000) -#define MCF_INTC0_IMRL_INT_MASK19 (0x00080000) -#define MCF_INTC0_IMRL_INT_MASK20 (0x00100000) -#define MCF_INTC0_IMRL_INT_MASK21 (0x00200000) -#define MCF_INTC0_IMRL_INT_MASK22 (0x00400000) -#define MCF_INTC0_IMRL_INT_MASK23 (0x00800000) -#define MCF_INTC0_IMRL_INT_MASK24 (0x01000000) -#define MCF_INTC0_IMRL_INT_MASK25 (0x02000000) -#define MCF_INTC0_IMRL_INT_MASK26 (0x04000000) -#define MCF_INTC0_IMRL_INT_MASK27 (0x08000000) -#define MCF_INTC0_IMRL_INT_MASK28 (0x10000000) -#define MCF_INTC0_IMRL_INT_MASK29 (0x20000000) -#define MCF_INTC0_IMRL_INT_MASK30 (0x40000000) -#define MCF_INTC0_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_INTFRCH */ -#define MCF_INTC0_INTFRCH_INTFRC32 (0x00000001) -#define MCF_INTC0_INTFRCH_INTFRC33 (0x00000002) -#define MCF_INTC0_INTFRCH_INTFRC34 (0x00000004) -#define MCF_INTC0_INTFRCH_INTFRC35 (0x00000008) -#define MCF_INTC0_INTFRCH_INTFRC36 (0x00000010) -#define MCF_INTC0_INTFRCH_INTFRC37 (0x00000020) -#define MCF_INTC0_INTFRCH_INTFRC38 (0x00000040) -#define MCF_INTC0_INTFRCH_INTFRC39 (0x00000080) -#define MCF_INTC0_INTFRCH_INTFRC40 (0x00000100) -#define MCF_INTC0_INTFRCH_INTFRC41 (0x00000200) -#define MCF_INTC0_INTFRCH_INTFRC42 (0x00000400) -#define MCF_INTC0_INTFRCH_INTFRC43 (0x00000800) -#define MCF_INTC0_INTFRCH_INTFRC44 (0x00001000) -#define MCF_INTC0_INTFRCH_INTFRC45 (0x00002000) -#define MCF_INTC0_INTFRCH_INTFRC46 (0x00004000) -#define MCF_INTC0_INTFRCH_INTFRC47 (0x00008000) -#define MCF_INTC0_INTFRCH_INTFRC48 (0x00010000) -#define MCF_INTC0_INTFRCH_INTFRC49 (0x00020000) -#define MCF_INTC0_INTFRCH_INTFRC50 (0x00040000) -#define MCF_INTC0_INTFRCH_INTFRC51 (0x00080000) -#define MCF_INTC0_INTFRCH_INTFRC52 (0x00100000) -#define MCF_INTC0_INTFRCH_INTFRC53 (0x00200000) -#define MCF_INTC0_INTFRCH_INTFRC54 (0x00400000) -#define MCF_INTC0_INTFRCH_INTFRC55 (0x00800000) -#define MCF_INTC0_INTFRCH_INTFRC56 (0x01000000) -#define MCF_INTC0_INTFRCH_INTFRC57 (0x02000000) -#define MCF_INTC0_INTFRCH_INTFRC58 (0x04000000) -#define MCF_INTC0_INTFRCH_INTFRC59 (0x08000000) -#define MCF_INTC0_INTFRCH_INTFRC60 (0x10000000) -#define MCF_INTC0_INTFRCH_INTFRC61 (0x20000000) -#define MCF_INTC0_INTFRCH_INTFRC62 (0x40000000) -#define MCF_INTC0_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_INTFRCL */ -#define MCF_INTC0_INTFRCL_INTFRC1 (0x00000002) -#define MCF_INTC0_INTFRCL_INTFRC2 (0x00000004) -#define MCF_INTC0_INTFRCL_INTFRC3 (0x00000008) -#define MCF_INTC0_INTFRCL_INTFRC4 (0x00000010) -#define MCF_INTC0_INTFRCL_INTFRC5 (0x00000020) -#define MCF_INTC0_INTFRCL_INT6 (0x00000040) -#define MCF_INTC0_INTFRCL_INT7 (0x00000080) -#define MCF_INTC0_INTFRCL_INT8 (0x00000100) -#define MCF_INTC0_INTFRCL_INT9 (0x00000200) -#define MCF_INTC0_INTFRCL_INT10 (0x00000400) -#define MCF_INTC0_INTFRCL_INTFRC11 (0x00000800) -#define MCF_INTC0_INTFRCL_INTFRC12 (0x00001000) -#define MCF_INTC0_INTFRCL_INTFRC13 (0x00002000) -#define MCF_INTC0_INTFRCL_INTFRC14 (0x00004000) -#define MCF_INTC0_INTFRCL_INT15 (0x00008000) -#define MCF_INTC0_INTFRCL_INTFRC16 (0x00010000) -#define MCF_INTC0_INTFRCL_INTFRC17 (0x00020000) -#define MCF_INTC0_INTFRCL_INTFRC18 (0x00040000) -#define MCF_INTC0_INTFRCL_INTFRC19 (0x00080000) -#define MCF_INTC0_INTFRCL_INTFRC20 (0x00100000) -#define MCF_INTC0_INTFRCL_INTFRC21 (0x00200000) -#define MCF_INTC0_INTFRCL_INTFRC22 (0x00400000) -#define MCF_INTC0_INTFRCL_INTFRC23 (0x00800000) -#define MCF_INTC0_INTFRCL_INTFRC24 (0x01000000) -#define MCF_INTC0_INTFRCL_INTFRC25 (0x02000000) -#define MCF_INTC0_INTFRCL_INTFRC26 (0x04000000) -#define MCF_INTC0_INTFRCL_INTFRC27 (0x08000000) -#define MCF_INTC0_INTFRCL_INTFRC28 (0x10000000) -#define MCF_INTC0_INTFRCL_INTFRC29 (0x20000000) -#define MCF_INTC0_INTFRCL_INTFRC30 (0x40000000) -#define MCF_INTC0_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IRLR */ -#define MCF_INTC0_IRLR_IRQ(x) (((x)&0x7F)<<1) - -/* Bit definitions and macros for MCF_INTC0_IACKLPR */ -#define MCF_INTC0_IACKLPR_PRI(x) (((x)&0x0F)<<0) -#define MCF_INTC0_IACKLPR_LEVEL(x) (((x)&0x07)<<4) - -/* Bit definitions and macros for MCF_INTC0_ICRn */ -#define MCF_INTC0_ICRn_IP(x) (((x)&0x07)<<0) -#define MCF_INTC0_ICRn_IL(x) (((x)&0x07)<<3) - -/********************************************************************/ - -#endif /* __MCF523X_INTC0_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_intc1.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_intc1.h deleted file mode 100644 index 3a492570..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_intc1.h +++ /dev/null @@ -1,317 +0,0 @@ -/* - * File: mcf523x_intc1.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_INTC1_H__ -#define __MCF523X_INTC1_H__ - -/********************************************************************* -* -* Interrupt Controller 1 (INTC1) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_INTC1_IPRH (*(vuint32*)(void*)(&__IPSBAR[0x000D00])) -#define MCF_INTC1_IPRL (*(vuint32*)(void*)(&__IPSBAR[0x000D04])) -#define MCF_INTC1_IMRH (*(vuint32*)(void*)(&__IPSBAR[0x000D08])) -#define MCF_INTC1_IMRL (*(vuint32*)(void*)(&__IPSBAR[0x000D0C])) -#define MCF_INTC1_INTFRCH (*(vuint32*)(void*)(&__IPSBAR[0x000D10])) -#define MCF_INTC1_INTFRCL (*(vuint32*)(void*)(&__IPSBAR[0x000D14])) -#define MCF_INTC1_IRLR (*(vuint8 *)(void*)(&__IPSBAR[0x000D18])) -#define MCF_INTC1_IACKLPR (*(vuint8 *)(void*)(&__IPSBAR[0x000D19])) -#define MCF_INTC1_ICR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000D40])) -#define MCF_INTC1_ICR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000D41])) -#define MCF_INTC1_ICR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000D42])) -#define MCF_INTC1_ICR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000D43])) -#define MCF_INTC1_ICR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000D44])) -#define MCF_INTC1_ICR5 (*(vuint8 *)(void*)(&__IPSBAR[0x000D45])) -#define MCF_INTC1_ICR6 (*(vuint8 *)(void*)(&__IPSBAR[0x000D46])) -#define MCF_INTC1_ICR7 (*(vuint8 *)(void*)(&__IPSBAR[0x000D47])) -#define MCF_INTC1_ICR8 (*(vuint8 *)(void*)(&__IPSBAR[0x000D48])) -#define MCF_INTC1_ICR9 (*(vuint8 *)(void*)(&__IPSBAR[0x000D49])) -#define MCF_INTC1_ICR10 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4A])) -#define MCF_INTC1_ICR11 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4B])) -#define MCF_INTC1_ICR12 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4C])) -#define MCF_INTC1_ICR13 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4D])) -#define MCF_INTC1_ICR14 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4E])) -#define MCF_INTC1_ICR15 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4F])) -#define MCF_INTC1_ICR16 (*(vuint8 *)(void*)(&__IPSBAR[0x000D50])) -#define MCF_INTC1_ICR17 (*(vuint8 *)(void*)(&__IPSBAR[0x000D51])) -#define MCF_INTC1_ICR18 (*(vuint8 *)(void*)(&__IPSBAR[0x000D52])) -#define MCF_INTC1_ICR19 (*(vuint8 *)(void*)(&__IPSBAR[0x000D53])) -#define MCF_INTC1_ICR20 (*(vuint8 *)(void*)(&__IPSBAR[0x000D54])) -#define MCF_INTC1_ICR21 (*(vuint8 *)(void*)(&__IPSBAR[0x000D55])) -#define MCF_INTC1_ICR22 (*(vuint8 *)(void*)(&__IPSBAR[0x000D56])) -#define MCF_INTC1_ICR23 (*(vuint8 *)(void*)(&__IPSBAR[0x000D57])) -#define MCF_INTC1_ICR24 (*(vuint8 *)(void*)(&__IPSBAR[0x000D58])) -#define MCF_INTC1_ICR25 (*(vuint8 *)(void*)(&__IPSBAR[0x000D59])) -#define MCF_INTC1_ICR26 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5A])) -#define MCF_INTC1_ICR27 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5B])) -#define MCF_INTC1_ICR28 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5C])) -#define MCF_INTC1_ICR29 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5D])) -#define MCF_INTC1_ICR30 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5E])) -#define MCF_INTC1_ICR31 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5F])) -#define MCF_INTC1_ICR32 (*(vuint8 *)(void*)(&__IPSBAR[0x000D60])) -#define MCF_INTC1_ICR33 (*(vuint8 *)(void*)(&__IPSBAR[0x000D61])) -#define MCF_INTC1_ICR34 (*(vuint8 *)(void*)(&__IPSBAR[0x000D62])) -#define MCF_INTC1_ICR35 (*(vuint8 *)(void*)(&__IPSBAR[0x000D63])) -#define MCF_INTC1_ICR36 (*(vuint8 *)(void*)(&__IPSBAR[0x000D64])) -#define MCF_INTC1_ICR37 (*(vuint8 *)(void*)(&__IPSBAR[0x000D65])) -#define MCF_INTC1_ICR38 (*(vuint8 *)(void*)(&__IPSBAR[0x000D66])) -#define MCF_INTC1_ICR39 (*(vuint8 *)(void*)(&__IPSBAR[0x000D67])) -#define MCF_INTC1_ICR40 (*(vuint8 *)(void*)(&__IPSBAR[0x000D68])) -#define MCF_INTC1_ICR41 (*(vuint8 *)(void*)(&__IPSBAR[0x000D69])) -#define MCF_INTC1_ICR42 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6A])) -#define MCF_INTC1_ICR43 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6B])) -#define MCF_INTC1_ICR44 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6C])) -#define MCF_INTC1_ICR45 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6D])) -#define MCF_INTC1_ICR46 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6E])) -#define MCF_INTC1_ICR47 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6F])) -#define MCF_INTC1_ICR48 (*(vuint8 *)(void*)(&__IPSBAR[0x000D70])) -#define MCF_INTC1_ICR49 (*(vuint8 *)(void*)(&__IPSBAR[0x000D71])) -#define MCF_INTC1_ICR50 (*(vuint8 *)(void*)(&__IPSBAR[0x000D72])) -#define MCF_INTC1_ICR51 (*(vuint8 *)(void*)(&__IPSBAR[0x000D73])) -#define MCF_INTC1_ICR52 (*(vuint8 *)(void*)(&__IPSBAR[0x000D74])) -#define MCF_INTC1_ICR53 (*(vuint8 *)(void*)(&__IPSBAR[0x000D75])) -#define MCF_INTC1_ICR54 (*(vuint8 *)(void*)(&__IPSBAR[0x000D76])) -#define MCF_INTC1_ICR55 (*(vuint8 *)(void*)(&__IPSBAR[0x000D77])) -#define MCF_INTC1_ICR56 (*(vuint8 *)(void*)(&__IPSBAR[0x000D78])) -#define MCF_INTC1_ICR57 (*(vuint8 *)(void*)(&__IPSBAR[0x000D79])) -#define MCF_INTC1_ICR58 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7A])) -#define MCF_INTC1_ICR59 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7B])) -#define MCF_INTC1_ICR60 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7C])) -#define MCF_INTC1_ICR61 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7D])) -#define MCF_INTC1_ICR62 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7E])) -#define MCF_INTC1_ICR63 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7F])) -#define MCF_INTC1_ICRn(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000D40+((x)*0x001)])) -#define MCF_INTC1_SWIACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DE0])) -#define MCF_INTC1_L1IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DE4])) -#define MCF_INTC1_L2IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DE8])) -#define MCF_INTC1_L3IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DEC])) -#define MCF_INTC1_L4IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DF0])) -#define MCF_INTC1_L5IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DF4])) -#define MCF_INTC1_L6IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DF8])) -#define MCF_INTC1_L7IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DFC])) -#define MCF_INTC1_LnIACK(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000DE4+((x)*0x004)])) - -/* Bit definitions and macros for MCF_INTC1_IPRH */ -#define MCF_INTC1_IPRH_INT32 (0x00000001) -#define MCF_INTC1_IPRH_INT33 (0x00000002) -#define MCF_INTC1_IPRH_INT34 (0x00000004) -#define MCF_INTC1_IPRH_INT35 (0x00000008) -#define MCF_INTC1_IPRH_INT36 (0x00000010) -#define MCF_INTC1_IPRH_INT37 (0x00000020) -#define MCF_INTC1_IPRH_INT38 (0x00000040) -#define MCF_INTC1_IPRH_INT39 (0x00000080) -#define MCF_INTC1_IPRH_INT40 (0x00000100) -#define MCF_INTC1_IPRH_INT41 (0x00000200) -#define MCF_INTC1_IPRH_INT42 (0x00000400) -#define MCF_INTC1_IPRH_INT43 (0x00000800) -#define MCF_INTC1_IPRH_INT44 (0x00001000) -#define MCF_INTC1_IPRH_INT45 (0x00002000) -#define MCF_INTC1_IPRH_INT46 (0x00004000) -#define MCF_INTC1_IPRH_INT47 (0x00008000) -#define MCF_INTC1_IPRH_INT48 (0x00010000) -#define MCF_INTC1_IPRH_INT49 (0x00020000) -#define MCF_INTC1_IPRH_INT50 (0x00040000) -#define MCF_INTC1_IPRH_INT51 (0x00080000) -#define MCF_INTC1_IPRH_INT52 (0x00100000) -#define MCF_INTC1_IPRH_INT53 (0x00200000) -#define MCF_INTC1_IPRH_INT54 (0x00400000) -#define MCF_INTC1_IPRH_INT55 (0x00800000) -#define MCF_INTC1_IPRH_INT56 (0x01000000) -#define MCF_INTC1_IPRH_INT57 (0x02000000) -#define MCF_INTC1_IPRH_INT58 (0x04000000) -#define MCF_INTC1_IPRH_INT59 (0x08000000) -#define MCF_INTC1_IPRH_INT60 (0x10000000) -#define MCF_INTC1_IPRH_INT61 (0x20000000) -#define MCF_INTC1_IPRH_INT62 (0x40000000) -#define MCF_INTC1_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IPRL */ -#define MCF_INTC1_IPRL_INT1 (0x00000002) -#define MCF_INTC1_IPRL_INT2 (0x00000004) -#define MCF_INTC1_IPRL_INT3 (0x00000008) -#define MCF_INTC1_IPRL_INT4 (0x00000010) -#define MCF_INTC1_IPRL_INT5 (0x00000020) -#define MCF_INTC1_IPRL_INT6 (0x00000040) -#define MCF_INTC1_IPRL_INT7 (0x00000080) -#define MCF_INTC1_IPRL_INT8 (0x00000100) -#define MCF_INTC1_IPRL_INT9 (0x00000200) -#define MCF_INTC1_IPRL_INT10 (0x00000400) -#define MCF_INTC1_IPRL_INT11 (0x00000800) -#define MCF_INTC1_IPRL_INT12 (0x00001000) -#define MCF_INTC1_IPRL_INT13 (0x00002000) -#define MCF_INTC1_IPRL_INT14 (0x00004000) -#define MCF_INTC1_IPRL_INT15 (0x00008000) -#define MCF_INTC1_IPRL_INT16 (0x00010000) -#define MCF_INTC1_IPRL_INT17 (0x00020000) -#define MCF_INTC1_IPRL_INT18 (0x00040000) -#define MCF_INTC1_IPRL_INT19 (0x00080000) -#define MCF_INTC1_IPRL_INT20 (0x00100000) -#define MCF_INTC1_IPRL_INT21 (0x00200000) -#define MCF_INTC1_IPRL_INT22 (0x00400000) -#define MCF_INTC1_IPRL_INT23 (0x00800000) -#define MCF_INTC1_IPRL_INT24 (0x01000000) -#define MCF_INTC1_IPRL_INT25 (0x02000000) -#define MCF_INTC1_IPRL_INT26 (0x04000000) -#define MCF_INTC1_IPRL_INT27 (0x08000000) -#define MCF_INTC1_IPRL_INT28 (0x10000000) -#define MCF_INTC1_IPRL_INT29 (0x20000000) -#define MCF_INTC1_IPRL_INT30 (0x40000000) -#define MCF_INTC1_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IMRH */ -#define MCF_INTC1_IMRH_INT_MASK32 (0x00000001) -#define MCF_INTC1_IMRH_INT_MASK33 (0x00000002) -#define MCF_INTC1_IMRH_INT_MASK34 (0x00000004) -#define MCF_INTC1_IMRH_INT_MASK35 (0x00000008) -#define MCF_INTC1_IMRH_INT_MASK36 (0x00000010) -#define MCF_INTC1_IMRH_INT_MASK37 (0x00000020) -#define MCF_INTC1_IMRH_INT_MASK38 (0x00000040) -#define MCF_INTC1_IMRH_INT_MASK39 (0x00000080) -#define MCF_INTC1_IMRH_INT_MASK40 (0x00000100) -#define MCF_INTC1_IMRH_INT_MASK41 (0x00000200) -#define MCF_INTC1_IMRH_INT_MASK42 (0x00000400) -#define MCF_INTC1_IMRH_INT_MASK43 (0x00000800) -#define MCF_INTC1_IMRH_INT_MASK44 (0x00001000) -#define MCF_INTC1_IMRH_INT_MASK45 (0x00002000) -#define MCF_INTC1_IMRH_INT_MASK46 (0x00004000) -#define MCF_INTC1_IMRH_INT_MASK47 (0x00008000) -#define MCF_INTC1_IMRH_INT_MASK48 (0x00010000) -#define MCF_INTC1_IMRH_INT_MASK49 (0x00020000) -#define MCF_INTC1_IMRH_INT_MASK50 (0x00040000) -#define MCF_INTC1_IMRH_INT_MASK51 (0x00080000) -#define MCF_INTC1_IMRH_INT_MASK52 (0x00100000) -#define MCF_INTC1_IMRH_INT_MASK53 (0x00200000) -#define MCF_INTC1_IMRH_INT_MASK54 (0x00400000) -#define MCF_INTC1_IMRH_INT_MASK55 (0x00800000) -#define MCF_INTC1_IMRH_INT_MASK56 (0x01000000) -#define MCF_INTC1_IMRH_INT_MASK57 (0x02000000) -#define MCF_INTC1_IMRH_INT_MASK58 (0x04000000) -#define MCF_INTC1_IMRH_INT_MASK59 (0x08000000) -#define MCF_INTC1_IMRH_INT_MASK60 (0x10000000) -#define MCF_INTC1_IMRH_INT_MASK61 (0x20000000) -#define MCF_INTC1_IMRH_INT_MASK62 (0x40000000) -#define MCF_INTC1_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IMRL */ -#define MCF_INTC1_IMRL_MASKALL (0x00000001) -#define MCF_INTC1_IMRL_INT_MASK1 (0x00000002) -#define MCF_INTC1_IMRL_INT_MASK2 (0x00000004) -#define MCF_INTC1_IMRL_INT_MASK3 (0x00000008) -#define MCF_INTC1_IMRL_INT_MASK4 (0x00000010) -#define MCF_INTC1_IMRL_INT_MASK5 (0x00000020) -#define MCF_INTC1_IMRL_INT_MASK6 (0x00000040) -#define MCF_INTC1_IMRL_INT_MASK7 (0x00000080) -#define MCF_INTC1_IMRL_INT_MASK8 (0x00000100) -#define MCF_INTC1_IMRL_INT_MASK9 (0x00000200) -#define MCF_INTC1_IMRL_INT_MASK10 (0x00000400) -#define MCF_INTC1_IMRL_INT_MASK11 (0x00000800) -#define MCF_INTC1_IMRL_INT_MASK12 (0x00001000) -#define MCF_INTC1_IMRL_INT_MASK13 (0x00002000) -#define MCF_INTC1_IMRL_INT_MASK14 (0x00004000) -#define MCF_INTC1_IMRL_INT_MASK15 (0x00008000) -#define MCF_INTC1_IMRL_INT_MASK16 (0x00010000) -#define MCF_INTC1_IMRL_INT_MASK17 (0x00020000) -#define MCF_INTC1_IMRL_INT_MASK18 (0x00040000) -#define MCF_INTC1_IMRL_INT_MASK19 (0x00080000) -#define MCF_INTC1_IMRL_INT_MASK20 (0x00100000) -#define MCF_INTC1_IMRL_INT_MASK21 (0x00200000) -#define MCF_INTC1_IMRL_INT_MASK22 (0x00400000) -#define MCF_INTC1_IMRL_INT_MASK23 (0x00800000) -#define MCF_INTC1_IMRL_INT_MASK24 (0x01000000) -#define MCF_INTC1_IMRL_INT_MASK25 (0x02000000) -#define MCF_INTC1_IMRL_INT_MASK26 (0x04000000) -#define MCF_INTC1_IMRL_INT_MASK27 (0x08000000) -#define MCF_INTC1_IMRL_INT_MASK28 (0x10000000) -#define MCF_INTC1_IMRL_INT_MASK29 (0x20000000) -#define MCF_INTC1_IMRL_INT_MASK30 (0x40000000) -#define MCF_INTC1_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_INTFRCH */ -#define MCF_INTC1_INTFRCH_INTFRC32 (0x00000001) -#define MCF_INTC1_INTFRCH_INTFRC33 (0x00000002) -#define MCF_INTC1_INTFRCH_INTFRC34 (0x00000004) -#define MCF_INTC1_INTFRCH_INTFRC35 (0x00000008) -#define MCF_INTC1_INTFRCH_INTFRC36 (0x00000010) -#define MCF_INTC1_INTFRCH_INTFRC37 (0x00000020) -#define MCF_INTC1_INTFRCH_INTFRC38 (0x00000040) -#define MCF_INTC1_INTFRCH_INTFRC39 (0x00000080) -#define MCF_INTC1_INTFRCH_INTFRC40 (0x00000100) -#define MCF_INTC1_INTFRCH_INTFRC41 (0x00000200) -#define MCF_INTC1_INTFRCH_INTFRC42 (0x00000400) -#define MCF_INTC1_INTFRCH_INTFRC43 (0x00000800) -#define MCF_INTC1_INTFRCH_INTFRC44 (0x00001000) -#define MCF_INTC1_INTFRCH_INTFRC45 (0x00002000) -#define MCF_INTC1_INTFRCH_INTFRC46 (0x00004000) -#define MCF_INTC1_INTFRCH_INTFRC47 (0x00008000) -#define MCF_INTC1_INTFRCH_INTFRC48 (0x00010000) -#define MCF_INTC1_INTFRCH_INTFRC49 (0x00020000) -#define MCF_INTC1_INTFRCH_INTFRC50 (0x00040000) -#define MCF_INTC1_INTFRCH_INTFRC51 (0x00080000) -#define MCF_INTC1_INTFRCH_INTFRC52 (0x00100000) -#define MCF_INTC1_INTFRCH_INTFRC53 (0x00200000) -#define MCF_INTC1_INTFRCH_INTFRC54 (0x00400000) -#define MCF_INTC1_INTFRCH_INTFRC55 (0x00800000) -#define MCF_INTC1_INTFRCH_INTFRC56 (0x01000000) -#define MCF_INTC1_INTFRCH_INTFRC57 (0x02000000) -#define MCF_INTC1_INTFRCH_INTFRC58 (0x04000000) -#define MCF_INTC1_INTFRCH_INTFRC59 (0x08000000) -#define MCF_INTC1_INTFRCH_INTFRC60 (0x10000000) -#define MCF_INTC1_INTFRCH_INTFRC61 (0x20000000) -#define MCF_INTC1_INTFRCH_INTFRC62 (0x40000000) -#define MCF_INTC1_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_INTFRCL */ -#define MCF_INTC1_INTFRCL_INTFRC1 (0x00000002) -#define MCF_INTC1_INTFRCL_INTFRC2 (0x00000004) -#define MCF_INTC1_INTFRCL_INTFRC3 (0x00000008) -#define MCF_INTC1_INTFRCL_INTFRC4 (0x00000010) -#define MCF_INTC1_INTFRCL_INTFRC5 (0x00000020) -#define MCF_INTC1_INTFRCL_INT6 (0x00000040) -#define MCF_INTC1_INTFRCL_INT7 (0x00000080) -#define MCF_INTC1_INTFRCL_INT8 (0x00000100) -#define MCF_INTC1_INTFRCL_INT9 (0x00000200) -#define MCF_INTC1_INTFRCL_INT10 (0x00000400) -#define MCF_INTC1_INTFRCL_INTFRC11 (0x00000800) -#define MCF_INTC1_INTFRCL_INTFRC12 (0x00001000) -#define MCF_INTC1_INTFRCL_INTFRC13 (0x00002000) -#define MCF_INTC1_INTFRCL_INTFRC14 (0x00004000) -#define MCF_INTC1_INTFRCL_INT15 (0x00008000) -#define MCF_INTC1_INTFRCL_INTFRC16 (0x00010000) -#define MCF_INTC1_INTFRCL_INTFRC17 (0x00020000) -#define MCF_INTC1_INTFRCL_INTFRC18 (0x00040000) -#define MCF_INTC1_INTFRCL_INTFRC19 (0x00080000) -#define MCF_INTC1_INTFRCL_INTFRC20 (0x00100000) -#define MCF_INTC1_INTFRCL_INTFRC21 (0x00200000) -#define MCF_INTC1_INTFRCL_INTFRC22 (0x00400000) -#define MCF_INTC1_INTFRCL_INTFRC23 (0x00800000) -#define MCF_INTC1_INTFRCL_INTFRC24 (0x01000000) -#define MCF_INTC1_INTFRCL_INTFRC25 (0x02000000) -#define MCF_INTC1_INTFRCL_INTFRC26 (0x04000000) -#define MCF_INTC1_INTFRCL_INTFRC27 (0x08000000) -#define MCF_INTC1_INTFRCL_INTFRC28 (0x10000000) -#define MCF_INTC1_INTFRCL_INTFRC29 (0x20000000) -#define MCF_INTC1_INTFRCL_INTFRC30 (0x40000000) -#define MCF_INTC1_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IRLR */ -#define MCF_INTC1_IRLR_IRQ(x) (((x)&0x7F)<<1) - -/* Bit definitions and macros for MCF_INTC1_IACKLPR */ -#define MCF_INTC1_IACKLPR_PRI(x) (((x)&0x0F)<<0) -#define MCF_INTC1_IACKLPR_LEVEL(x) (((x)&0x07)<<4) - -/* Bit definitions and macros for MCF_INTC1_ICRn */ -#define MCF_INTC1_ICRn_IP(x) (((x)&0x07)<<0) -#define MCF_INTC1_ICRn_IL(x) (((x)&0x07)<<3) - -/********************************************************************/ - -#endif /* __MCF523X_INTC1_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_mdha.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_mdha.h deleted file mode 100644 index 9611db77..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_mdha.h +++ /dev/null @@ -1,95 +0,0 @@ -/* - * File: mcf523x_mdha.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_MDHA_H__ -#define __MCF523X_MDHA_H__ - -/********************************************************************* -* -* Message Digest Hardware Accelerator (MDHA) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_MDHA_MDMR (*(vuint32*)(void*)(&__IPSBAR[0x190000])) -#define MCF_MDHA_MDCR (*(vuint32*)(void*)(&__IPSBAR[0x190004])) -#define MCF_MDHA_MDCMR (*(vuint32*)(void*)(&__IPSBAR[0x190008])) -#define MCF_MDHA_MDSR (*(vuint32*)(void*)(&__IPSBAR[0x19000C])) -#define MCF_MDHA_MDISR (*(vuint32*)(void*)(&__IPSBAR[0x190010])) -#define MCF_MDHA_MDIMR (*(vuint32*)(void*)(&__IPSBAR[0x190014])) -#define MCF_MDHA_MDDSR (*(vuint32*)(void*)(&__IPSBAR[0x19001C])) -#define MCF_MDHA_MDIN (*(vuint32*)(void*)(&__IPSBAR[0x190020])) -#define MCF_MDHA_MDA0 (*(vuint32*)(void*)(&__IPSBAR[0x190030])) -#define MCF_MDHA_MDB0 (*(vuint32*)(void*)(&__IPSBAR[0x190034])) -#define MCF_MDHA_MDC0 (*(vuint32*)(void*)(&__IPSBAR[0x190038])) -#define MCF_MDHA_MDD0 (*(vuint32*)(void*)(&__IPSBAR[0x19003C])) -#define MCF_MDHA_MDE0 (*(vuint32*)(void*)(&__IPSBAR[0x190040])) -#define MCF_MDHA_MDMDS (*(vuint32*)(void*)(&__IPSBAR[0x190044])) -#define MCF_MDHA_MDA1 (*(vuint32*)(void*)(&__IPSBAR[0x190070])) -#define MCF_MDHA_MDB1 (*(vuint32*)(void*)(&__IPSBAR[0x190074])) -#define MCF_MDHA_MDC1 (*(vuint32*)(void*)(&__IPSBAR[0x190078])) -#define MCF_MDHA_MDD1 (*(vuint32*)(void*)(&__IPSBAR[0x19007C])) -#define MCF_MDHA_MDE1 (*(vuint32*)(void*)(&__IPSBAR[0x190080])) - -/* Bit definitions and macros for MCF_MDHA_MDMR */ -#define MCF_MDHA_MDMR_ALG (0x00000001) -#define MCF_MDHA_MDMR_PDATA (0x00000004) -#define MCF_MDHA_MDMR_MAC(x) (((x)&0x00000003)<<3) -#define MCF_MDHA_MDMR_INIT (0x00000020) -#define MCF_MDHA_MDMR_IPAD (0x00000040) -#define MCF_MDHA_MDMR_OPAD (0x00000080) -#define MCF_MDHA_MDMR_SWAP (0x00000100) -#define MCF_MDHA_MDMR_MACFULL (0x00000200) -#define MCF_MDHA_MDMR_SSL (0x00000400) - -/* Bit definitions and macros for MCF_MDHA_MDCR */ -#define MCF_MDHA_MDCR_IE (0x00000001) - -/* Bit definitions and macros for MCF_MDHA_MDCMR */ -#define MCF_MDHA_MDCMR_SWR (0x00000001) -#define MCF_MDHA_MDCMR_RI (0x00000002) -#define MCF_MDHA_MDCMR_CI (0x00000004) -#define MCF_MDHA_MDCMR_GO (0x00000008) - -/* Bit definitions and macros for MCF_MDHA_MDSR */ -#define MCF_MDHA_MDSR_INT (0x00000001) -#define MCF_MDHA_MDSR_DONE (0x00000002) -#define MCF_MDHA_MDSR_ERR (0x00000004) -#define MCF_MDHA_MDSR_RD (0x00000008) -#define MCF_MDHA_MDSR_BUSY (0x00000010) -#define MCF_MDHA_MDSR_END (0x00000020) -#define MCF_MDHA_MDSR_HSH (0x00000040) -#define MCF_MDHA_MDSR_GNW (0x00000080) -#define MCF_MDHA_MDSR_FS(x) (((x)&0x00000007)<<8) -#define MCF_MDHA_MDSR_APD(x) (((x)&0x00000007)<<13) -#define MCF_MDHA_MDSR_IFL(x) (((x)&0x000000FF)<<16) - -/* Bit definitions and macros for MCF_MDHA_MDIR */ -#define MCF_MDHA_MDIR_IFO (0x00000001) -#define MCF_MDHA_MDIR_NON (0x00000004) -#define MCF_MDHA_MDIR_IME (0x00000010) -#define MCF_MDHA_MDIR_IDS (0x00000020) -#define MCF_MDHA_MDIR_RMDP (0x00000080) -#define MCF_MDHA_MDIR_ERE (0x00000100) -#define MCF_MDHA_MDIR_GTDS (0x00000200) - -/* Bit definitions and macros for MCF_MDHA_MDIMR */ -#define MCF_MDHA_MDIMR_IFO (0x00000001) -#define MCF_MDHA_MDIMR_NON (0x00000004) -#define MCF_MDHA_MDIMR_IME (0x00000010) -#define MCF_MDHA_MDIMR_IDS (0x00000020) -#define MCF_MDHA_MDIMR_RMDP (0x00000080) -#define MCF_MDHA_MDIMR_ERE (0x00000100) -#define MCF_MDHA_MDIMR_GTDS (0x00000200) - -/* Bit definitions and macros for MCF_MDHA_MDDSR */ -#define MCF_MDHA_MDDSR_DATASIZE(x) (((x)&0x1FFFFFFF)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_MDHA_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_pit.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_pit.h deleted file mode 100644 index 35d5a7f0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_pit.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * File: mcf523x_pit.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_PIT_H__ -#define __MCF523X_PIT_H__ - -/********************************************************************* -* -* Programmable Interrupt Timer Modules (PIT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PIT_PCSR0 (*(vuint16*)(void*)(&__IPSBAR[0x150000])) -#define MCF_PIT_PMR0 (*(vuint16*)(void*)(&__IPSBAR[0x150002])) -#define MCF_PIT_PCNTR0 (*(vuint16*)(void*)(&__IPSBAR[0x150004])) -#define MCF_PIT_PCSR1 (*(vuint16*)(void*)(&__IPSBAR[0x160000])) -#define MCF_PIT_PMR1 (*(vuint16*)(void*)(&__IPSBAR[0x160002])) -#define MCF_PIT_PCNTR1 (*(vuint16*)(void*)(&__IPSBAR[0x160004])) -#define MCF_PIT_PCSR2 (*(vuint16*)(void*)(&__IPSBAR[0x170000])) -#define MCF_PIT_PMR2 (*(vuint16*)(void*)(&__IPSBAR[0x170002])) -#define MCF_PIT_PCNTR2 (*(vuint16*)(void*)(&__IPSBAR[0x170004])) -#define MCF_PIT_PCSR3 (*(vuint16*)(void*)(&__IPSBAR[0x180000])) -#define MCF_PIT_PMR3 (*(vuint16*)(void*)(&__IPSBAR[0x180002])) -#define MCF_PIT_PCNTR3 (*(vuint16*)(void*)(&__IPSBAR[0x180004])) -#define MCF_PIT_PCSR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150000+((x)*0x10000)])) -#define MCF_PIT_PMR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150002+((x)*0x10000)])) -#define MCF_PIT_PCNTR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150004+((x)*0x10000)])) - -/* Bit definitions and macros for MCF_PIT_PCSR */ -#define MCF_PIT_PCSR_EN (0x0001) -#define MCF_PIT_PCSR_RLD (0x0002) -#define MCF_PIT_PCSR_PIF (0x0004) -#define MCF_PIT_PCSR_PIE (0x0008) -#define MCF_PIT_PCSR_OVW (0x0010) -#define MCF_PIT_PCSR_HALTED (0x0020) -#define MCF_PIT_PCSR_DOZE (0x0040) -#define MCF_PIT_PCSR_PRE(x) (((x)&0x000F)<<8) - -/* Bit definitions and macros for MCF_PIT_PMR */ -#define MCF_PIT_PMR_PM0 (0x0001) -#define MCF_PIT_PMR_PM1 (0x0002) -#define MCF_PIT_PMR_PM2 (0x0004) -#define MCF_PIT_PMR_PM3 (0x0008) -#define MCF_PIT_PMR_PM4 (0x0010) -#define MCF_PIT_PMR_PM5 (0x0020) -#define MCF_PIT_PMR_PM6 (0x0040) -#define MCF_PIT_PMR_PM7 (0x0080) -#define MCF_PIT_PMR_PM8 (0x0100) -#define MCF_PIT_PMR_PM9 (0x0200) -#define MCF_PIT_PMR_PM10 (0x0400) -#define MCF_PIT_PMR_PM11 (0x0800) -#define MCF_PIT_PMR_PM12 (0x1000) -#define MCF_PIT_PMR_PM13 (0x2000) -#define MCF_PIT_PMR_PM14 (0x4000) -#define MCF_PIT_PMR_PM15 (0x8000) - -/* Bit definitions and macros for MCF_PIT_PCNTR */ -#define MCF_PIT_PCNTR_PC0 (0x0001) -#define MCF_PIT_PCNTR_PC1 (0x0002) -#define MCF_PIT_PCNTR_PC2 (0x0004) -#define MCF_PIT_PCNTR_PC3 (0x0008) -#define MCF_PIT_PCNTR_PC4 (0x0010) -#define MCF_PIT_PCNTR_PC5 (0x0020) -#define MCF_PIT_PCNTR_PC6 (0x0040) -#define MCF_PIT_PCNTR_PC7 (0x0080) -#define MCF_PIT_PCNTR_PC8 (0x0100) -#define MCF_PIT_PCNTR_PC9 (0x0200) -#define MCF_PIT_PCNTR_PC10 (0x0400) -#define MCF_PIT_PCNTR_PC11 (0x0800) -#define MCF_PIT_PCNTR_PC12 (0x1000) -#define MCF_PIT_PCNTR_PC13 (0x2000) -#define MCF_PIT_PCNTR_PC14 (0x4000) -#define MCF_PIT_PCNTR_PC15 (0x8000) - -/********************************************************************/ - -#endif /* __MCF523X_PIT_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_qspi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_qspi.h deleted file mode 100644 index 16a33687..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_qspi.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * File: mcf523x_qspi.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_QSPI_H__ -#define __MCF523X_QSPI_H__ - -/********************************************************************* -* -* Queued Serial Peripheral Interface (QSPI) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_QSPI_QMR (*(vuint16*)(void*)(&__IPSBAR[0x000340])) -#define MCF_QSPI_QDLYR (*(vuint16*)(void*)(&__IPSBAR[0x000344])) -#define MCF_QSPI_QWR (*(vuint16*)(void*)(&__IPSBAR[0x000348])) -#define MCF_QSPI_QIR (*(vuint16*)(void*)(&__IPSBAR[0x00034C])) -#define MCF_QSPI_QAR (*(vuint16*)(void*)(&__IPSBAR[0x000350])) -#define MCF_QSPI_QDR (*(vuint16*)(void*)(&__IPSBAR[0x000354])) - -/* Bit definitions and macros for MCF_QSPI_QMR */ -#define MCF_QSPI_QMR_BAUD(x) (((x)&0x00FF)<<0) -#define MCF_QSPI_QMR_CPHA (0x0100) -#define MCF_QSPI_QMR_CPOL (0x0200) -#define MCF_QSPI_QMR_BITS(x) (((x)&0x000F)<<10) -#define MCF_QSPI_QMR_DOHIE (0x4000) -#define MCF_QSPI_QMR_MSTR (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QDLYR */ -#define MCF_QSPI_QDLYR_DTL(x) (((x)&0x00FF)<<0) -#define MCF_QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8) -#define MCF_QSPI_QDLYR_SPE (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QWR */ -#define MCF_QSPI_QWR_NEWQP(x) (((x)&0x000F)<<0) -#define MCF_QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8) -#define MCF_QSPI_QWR_CSIV (0x1000) -#define MCF_QSPI_QWR_WRTO (0x2000) -#define MCF_QSPI_QWR_WREN (0x4000) -#define MCF_QSPI_QWR_HALT (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QIR */ -#define MCF_QSPI_QIR_SPIF (0x0001) -#define MCF_QSPI_QIR_ABRT (0x0004) -#define MCF_QSPI_QIR_WCEF (0x0008) -#define MCF_QSPI_QIR_SPIFE (0x0100) -#define MCF_QSPI_QIR_ABRTE (0x0400) -#define MCF_QSPI_QIR_WCEFE (0x0800) -#define MCF_QSPI_QIR_ABRTL (0x1000) -#define MCF_QSPI_QIR_ABRTB (0x4000) -#define MCF_QSPI_QIR_WCEFB (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QAR */ -#define MCF_QSPI_QAR_ADDR(x) (((x)&0x003F)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_QSPI_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_rcm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_rcm.h deleted file mode 100644 index 6b43ce93..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_rcm.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * File: mcf523x_rcm.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_RCM_H__ -#define __MCF523X_RCM_H__ - -/********************************************************************* -* -* Reset Configuration Module (RCM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_RCM_RCR (*(vuint8 *)(void*)(&__IPSBAR[0x110000])) -#define MCF_RCM_RSR (*(vuint8 *)(void*)(&__IPSBAR[0x110001])) - -/* Bit definitions and macros for MCF_RCM_RCR */ -#define MCF_RCM_RCR_FRCRSTOUT (0x40) -#define MCF_RCM_RCR_SOFTRST (0x80) - -/* Bit definitions and macros for MCF_RCM_RSR */ -#define MCF_RCM_RSR_LOL (0x01) -#define MCF_RCM_RSR_LOC (0x02) -#define MCF_RCM_RSR_EXT (0x04) -#define MCF_RCM_RSR_POR (0x08) -#define MCF_RCM_RSR_WDR (0x10) -#define MCF_RCM_RSR_SOFT (0x20) - -/********************************************************************/ - -#endif /* __MCF523X_RCM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_rng.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_rng.h deleted file mode 100644 index 16058ab6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_rng.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * File: mcf523x_rng.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_RNG_H__ -#define __MCF523X_RNG_H__ - -/********************************************************************* -* -* Random Number Generator (RNG) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_RNG_RNGCR (*(vuint32*)(void*)(&__IPSBAR[0x1A0000])) -#define MCF_RNG_RNGSR (*(vuint32*)(void*)(&__IPSBAR[0x1A0004])) -#define MCF_RNG_RNGER (*(vuint32*)(void*)(&__IPSBAR[0x1A0008])) -#define MCF_RNG_RNGOUT (*(vuint32*)(void*)(&__IPSBAR[0x1A000C])) - -/* Bit definitions and macros for MCF_RNG_RNGCR */ -#define MCF_RNG_RNGCR_GO (0x00000001) -#define MCF_RNG_RNGCR_HA (0x00000002) -#define MCF_RNG_RNGCR_IM (0x00000004) -#define MCF_RNG_RNGCR_CI (0x00000008) - -/* Bit definitions and macros for MCF_RNG_RNGSR */ -#define MCF_RNG_RNGSR_SV (0x00000001) -#define MCF_RNG_RNGSR_LRS (0x00000002) -#define MCF_RNG_RNGSR_FUF (0x00000004) -#define MCF_RNG_RNGSR_EI (0x00000008) -#define MCF_RNG_RNGSR_OFL(x) (((x)&0x000000FF)<<8) -#define MCF_RNG_RNGSR_OFS(x) (((x)&0x000000FF)<<16) - -/********************************************************************/ - -#endif /* __MCF523X_RNG_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_scm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_scm.h deleted file mode 100644 index 034654e0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_scm.h +++ /dev/null @@ -1,144 +0,0 @@ -/* - * File: mcf523x_scm.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_SCM_H__ -#define __MCF523X_SCM_H__ - -/********************************************************************* -* -* System Control Module (SCM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SCM_IPSBAR (*(vuint32*)(void*)(&__IPSBAR[0x000000])) -#define MCF_SCM_RAMBAR (*(vuint32*)(void*)(&__IPSBAR[0x000008])) -#define MCF_SCM_CRSR (*(vuint8 *)(void*)(&__IPSBAR[0x000010])) -#define MCF_SCM_CWCR (*(vuint8 *)(void*)(&__IPSBAR[0x000011])) -#define MCF_SCM_LPICR (*(vuint8 *)(void*)(&__IPSBAR[0x000012])) -#define MCF_SCM_CWSR (*(vuint8 *)(void*)(&__IPSBAR[0x000013])) -#define MCF_SCM_DMAREQC (*(vuint32*)(void*)(&__IPSBAR[0x000014])) -#define MCF_SCM_MPARK (*(vuint32*)(void*)(&__IPSBAR[0x00001C])) -#define MCF_SCM_MPR (*(vuint8 *)(void*)(&__IPSBAR[0x000020])) -#define MCF_SCM_PACR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000024])) -#define MCF_SCM_PACR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000025])) -#define MCF_SCM_PACR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000026])) -#define MCF_SCM_PACR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000027])) -#define MCF_SCM_PACR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000028])) -#define MCF_SCM_PACR5 (*(vuint8 *)(void*)(&__IPSBAR[0x00002A])) -#define MCF_SCM_PACR6 (*(vuint8 *)(void*)(&__IPSBAR[0x00002B])) -#define MCF_SCM_PACR7 (*(vuint8 *)(void*)(&__IPSBAR[0x00002C])) -#define MCF_SCM_PACR8 (*(vuint8 *)(void*)(&__IPSBAR[0x00002E])) -#define MCF_SCM_GPACR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000030])) - -/* Bit definitions and macros for MCF_SCM_IPSBAR */ -#define MCF_SCM_IPSBAR_V (0x00000001) -#define MCF_SCM_IPSBAR_BA(x) (((x)&0x00000003)<<30) - -/* Bit definitions and macros for MCF_SCM_RAMBAR */ -#define MCF_SCM_RAMBAR_BDE (0x00000200) -#define MCF_SCM_RAMBAR_BA(x) (((x)&0x0000FFFF)<<16) - -/* Bit definitions and macros for MCF_SCM_CRSR */ -#define MCF_SCM_CRSR_CWDR (0x20) -#define MCF_SCM_CRSR_EXT (0x80) - -/* Bit definitions and macros for MCF_SCM_CWCR */ -#define MCF_SCM_CWCR_CWTIC (0x01) -#define MCF_SCM_CWCR_CWTAVAL (0x02) -#define MCF_SCM_CWCR_CWTA (0x04) -#define MCF_SCM_CWCR_CWT(x) (((x)&0x07)<<3) -#define MCF_SCM_CWCR_CWRI (0x40) -#define MCF_SCM_CWCR_CWE (0x80) - -/* Bit definitions and macros for MCF_SCM_LPICR */ -#define MCF_SCM_LPICR_XLPM_IPL(x) (((x)&0x07)<<4) -#define MCF_SCM_LPICR_ENBSTOP (0x80) - -/* Bit definitions and macros for MCF_SCM_DMAREQC */ -#define MCF_SCM_DMAREQC_DMAC0(x) (((x)&0x0000000F)<<0) -#define MCF_SCM_DMAREQC_DMAC1(x) (((x)&0x0000000F)<<4) -#define MCF_SCM_DMAREQC_DMAC2(x) (((x)&0x0000000F)<<8) -#define MCF_SCM_DMAREQC_DMAC3(x) (((x)&0x0000000F)<<12) - -/* Bit definitions and macros for MCF_SCM_MPARK */ -#define MCF_SCM_MPARK_LCKOUT_TIME(x) (((x)&0x0000000F)<<8) -#define MCF_SCM_MPARK_PRKLAST (0x00001000) -#define MCF_SCM_MPARK_TIMEOUT (0x00002000) -#define MCF_SCM_MPARK_FIXED (0x00004000) -#define MCF_SCM_MPARK_M1_PRTY(x) (((x)&0x00000003)<<16) -#define MCF_SCM_MPARK_M0_PRTY(x) (((x)&0x00000003)<<18) -#define MCF_SCM_MPARK_M2_PRTY(x) (((x)&0x00000003)<<20) -#define MCF_SCM_MPARK_M3_PRTY(x) (((x)&0x00000003)<<22) -#define MCF_SCM_MPARK_BCR24BIT (0x01000000) -#define MCF_SCM_MPARK_M2_P_EN (0x02000000) - -/* Bit definitions and macros for MCF_SCM_MPR */ -#define MCF_SCM_MPR_MPR(x) (((x)&0x0F)<<0) - -/* Bit definitions and macros for MCF_SCM_PACR0 */ -#define MCF_SCM_PACR0_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR0_LOCK0 (0x08) -#define MCF_SCM_PACR0_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR0_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR1 */ -#define MCF_SCM_PACR1_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR1_LOCK0 (0x08) -#define MCF_SCM_PACR1_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR1_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR2 */ -#define MCF_SCM_PACR2_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR2_LOCK0 (0x08) -#define MCF_SCM_PACR2_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR2_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR3 */ -#define MCF_SCM_PACR3_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR3_LOCK0 (0x08) -#define MCF_SCM_PACR3_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR3_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR4 */ -#define MCF_SCM_PACR4_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR4_LOCK0 (0x08) -#define MCF_SCM_PACR4_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR4_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR5 */ -#define MCF_SCM_PACR5_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR5_LOCK0 (0x08) -#define MCF_SCM_PACR5_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR5_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR6 */ -#define MCF_SCM_PACR6_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR6_LOCK0 (0x08) -#define MCF_SCM_PACR6_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR6_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR7 */ -#define MCF_SCM_PACR7_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR7_LOCK0 (0x08) -#define MCF_SCM_PACR7_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR7_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR8 */ -#define MCF_SCM_PACR8_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR8_LOCK0 (0x08) -#define MCF_SCM_PACR8_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR8_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_GPACR0 */ -#define MCF_SCM_GPACR0_ACCESS_CTRL(x) (((x)&0x0F)<<0) -#define MCF_SCM_GPACR0_LOCK (0x80) - -/********************************************************************/ - -#endif /* __MCF523X_SCM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_sdramc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_sdramc.h deleted file mode 100644 index ae29ce73..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_sdramc.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * File: mcf523x_sdramc.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_SDRAMC_H__ -#define __MCF523X_SDRAMC_H__ - -/********************************************************************* -* -* SDRAM Controller (SDRAMC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SDRAMC_DCR (*(vuint16*)(void*)(&__IPSBAR[0x000040])) -#define MCF_SDRAMC_DACR0 (*(vuint32*)(void*)(&__IPSBAR[0x000048])) -#define MCF_SDRAMC_DMR0 (*(vuint32*)(void*)(&__IPSBAR[0x00004C])) -#define MCF_SDRAMC_DACR1 (*(vuint32*)(void*)(&__IPSBAR[0x000050])) -#define MCF_SDRAMC_DMR1 (*(vuint32*)(void*)(&__IPSBAR[0x000054])) - -/* Bit definitions and macros for MCF_SDRAMC_DCR */ -#define MCF_SDRAMC_DCR_RC(x) (((x)&0x01FF)<<0) -#define MCF_SDRAMC_DCR_RTIM(x) (((x)&0x0003)<<9) -#define MCF_SDRAMC_DCR_IS (0x0800) -#define MCF_SDRAMC_DCR_COC (0x1000) -#define MCF_SDRAMC_DCR_NAM (0x2000) - -/* Bit definitions and macros for MCF_SDRAMC_DACR0 */ -#define MCF_SDRAMC_DACR0_IP (0x00000008) -#define MCF_SDRAMC_DACR0_PS(x) (((x)&0x00000003)<<4) -#define MCF_SDRAMC_DACR0_MRS (0x00000040) -#define MCF_SDRAMC_DACR0_CBM(x) (((x)&0x00000007)<<8) -#define MCF_SDRAMC_DACR0_CASL(x) (((x)&0x00000003)<<12) -#define MCF_SDRAMC_DACR0_RE (0x00008000) -#define MCF_SDRAMC_DACR0_BA(x) (((x)&0x00003FFF)<<18) - -/* Bit definitions and macros for MCF_SDRAMC_DMR0 */ -#define MCF_SDRAMC_DMR0_V (0x00000001) -#define MCF_SDRAMC_DMR0_WP (0x00000100) -#define MCF_SDRAMC_DMR0_BAM(x) (((x)&0x00003FFF)<<18) - -/* Bit definitions and macros for MCF_SDRAMC_DACR1 */ -#define MCF_SDRAMC_DACR1_IP (0x00000008) -#define MCF_SDRAMC_DACR1_PS(x) (((x)&0x00000003)<<4) -#define MCF_SDRAMC_DACR1_MRS (0x00000040) -#define MCF_SDRAMC_DACR1_CBM(x) (((x)&0x00000007)<<8) -#define MCF_SDRAMC_DACR1_CASL(x) (((x)&0x00000003)<<12) -#define MCF_SDRAMC_DACR1_RE (0x00008000) -#define MCF_SDRAMC_DACR1_BA(x) (((x)&0x00003FFF)<<18) - -/* Bit definitions and macros for MCF_SDRAMC_DMR1 */ -#define MCF_SDRAMC_DMR1_V (0x00000001) -#define MCF_SDRAMC_DMR1_WP (0x00000100) -#define MCF_SDRAMC_DMR1_BAM(x) (((x)&0x00003FFF)<<18) - -/********************************************************************/ - -#define MCF_SDRAMC_DMR_BAM_4G (0xFFFC0000) -#define MCF_SDRAMC_DMR_BAM_2G (0x7FFC0000) -#define MCF_SDRAMC_DMR_BAM_1G (0x3FFC0000) -#define MCF_SDRAMC_DMR_BAM_1024M (0x3FFC0000) -#define MCF_SDRAMC_DMR_BAM_512M (0x1FFC0000) -#define MCF_SDRAMC_DMR_BAM_256M (0x0FFC0000) -#define MCF_SDRAMC_DMR_BAM_128M (0x07FC0000) -#define MCF_SDRAMC_DMR_BAM_64M (0x03FC0000) -#define MCF_SDRAMC_DMR_BAM_32M (0x01FC0000) -#define MCF_SDRAMC_DMR_BAM_16M (0x00FC0000) -#define MCF_SDRAMC_DMR_BAM_8M (0x007C0000) -#define MCF_SDRAMC_DMR_BAM_4M (0x003C0000) -#define MCF_SDRAMC_DMR_BAM_2M (0x001C0000) -#define MCF_SDRAMC_DMR_BAM_1M (0x000C0000) -#define MCF_SDRAMC_DMR_BAM_1024K (0x000C0000) -#define MCF_SDRAMC_DMR_BAM_512K (0x00040000) -#define MCF_SDRAMC_DMR_BAM_256K (0x00000000) -#define MCF_SDRAMC_DMR_WP (0x00000100) -#define MCF_SDRAMC_DMR_CI (0x00000040) -#define MCF_SDRAMC_DMR_AM (0x00000020) -#define MCF_SDRAMC_DMR_SC (0x00000010) -#define MCF_SDRAMC_DMR_SD (0x00000008) -#define MCF_SDRAMC_DMR_UC (0x00000004) -#define MCF_SDRAMC_DMR_UD (0x00000002) -#define MCF_SDRAMC_DMR_V (0x00000001) - -#endif /* __MCF523X_SDRAMC_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_skha.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_skha.h deleted file mode 100644 index 437e86d0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_skha.h +++ /dev/null @@ -1,114 +0,0 @@ -/* - * File: mcf523x_skha.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_SKHA_H__ -#define __MCF523X_SKHA_H__ - -/********************************************************************* -* -* Symmetric Key Hardware Accelerator (SKHA) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SKHA_SKMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0000])) -#define MCF_SKHA_SKCR (*(vuint32*)(void*)(&__IPSBAR[0x1B0004])) -#define MCF_SKHA_SKCMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0008])) -#define MCF_SKHA_SKSR (*(vuint32*)(void*)(&__IPSBAR[0x1B000C])) -#define MCF_SKHA_SKIR (*(vuint32*)(void*)(&__IPSBAR[0x1B0010])) -#define MCF_SKHA_SKIMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0014])) -#define MCF_SKHA_SKKSR (*(vuint32*)(void*)(&__IPSBAR[0x1B0018])) -#define MCF_SKHA_SKDSR (*(vuint32*)(void*)(&__IPSBAR[0x1B001C])) -#define MCF_SKHA_SKIN (*(vuint32*)(void*)(&__IPSBAR[0x1B0020])) -#define MCF_SKHA_SKOUT (*(vuint32*)(void*)(&__IPSBAR[0x1B0024])) -#define MCF_SKHA_SKKDR0 (*(vuint32*)(void*)(&__IPSBAR[0x1B0030])) -#define MCF_SKHA_SKKDR1 (*(vuint32*)(void*)(&__IPSBAR[0x1B0034])) -#define MCF_SKHA_SKKDR2 (*(vuint32*)(void*)(&__IPSBAR[0x1B0038])) -#define MCF_SKHA_SKKDR3 (*(vuint32*)(void*)(&__IPSBAR[0x1B003C])) -#define MCF_SKHA_SKKDR4 (*(vuint32*)(void*)(&__IPSBAR[0x1B0040])) -#define MCF_SKHA_SKKDR5 (*(vuint32*)(void*)(&__IPSBAR[0x1B0044])) -#define MCF_SKHA_SKKDRn(x) (*(vuint32*)(void*)(&__IPSBAR[0x1B0030+((x)*0x004)])) -#define MCF_SKHA_SKCR0 (*(vuint32*)(void*)(&__IPSBAR[0x1B0070])) -#define MCF_SKHA_SKCR1 (*(vuint32*)(void*)(&__IPSBAR[0x1B0074])) -#define MCF_SKHA_SKCR2 (*(vuint32*)(void*)(&__IPSBAR[0x1B0078])) -#define MCF_SKHA_SKCR3 (*(vuint32*)(void*)(&__IPSBAR[0x1B007C])) -#define MCF_SKHA_SKCR4 (*(vuint32*)(void*)(&__IPSBAR[0x1B0080])) -#define MCF_SKHA_SKCR5 (*(vuint32*)(void*)(&__IPSBAR[0x1B0084])) -#define MCF_SKHA_SKCR6 (*(vuint32*)(void*)(&__IPSBAR[0x1B0088])) -#define MCF_SKHA_SKCR7 (*(vuint32*)(void*)(&__IPSBAR[0x1B008C])) -#define MCF_SKHA_SKCR8 (*(vuint32*)(void*)(&__IPSBAR[0x1B0090])) -#define MCF_SKHA_SKCR9 (*(vuint32*)(void*)(&__IPSBAR[0x1B0094])) -#define MCF_SKHA_SKCR10 (*(vuint32*)(void*)(&__IPSBAR[0x1B0098])) -#define MCF_SKHA_SKCR11 (*(vuint32*)(void*)(&__IPSBAR[0x1B009C])) -#define MCF_SKHA_SKCRn(x) (*(vuint32*)(void*)(&__IPSBAR[0x1B0070+((x)*0x004)])) - -/* Bit definitions and macros for MCF_SKHA_SKMR */ -#define MCF_SKHA_SKMR_ALG(x) (((x)&0x00000003)<<0) -#define MCF_SKHA_SKMR_DIR (0x00000004) -#define MCF_SKHA_SKMR_CM(x) (((x)&0x00000003)<<3) -#define MCF_SKHA_SKMR_DKP (0x00000100) -#define MCF_SKHA_SKMR_CTRM(x) (((x)&0x0000000F)<<9) -#define MCF_SKHA_SKMR_CM_ECB (0x00000000) -#define MCF_SKHA_SKMR_CM_CBC (0x00000008) -#define MCF_SKHA_SKMR_CM_CTR (0x00000018) -#define MCF_SKHA_SKMR_DIR_DEC (0x00000000) -#define MCF_SKHA_SKMR_DIR_ENC (0x00000004) -#define MCF_SKHA_SKMR_ALG_AES (0x00000000) -#define MCF_SKHA_SKMR_ALG_DES (0x00000001) -#define MCF_SKHA_SKMR_ALG_TDES (0x00000002) - -/* Bit definitions and macros for MCF_SKHA_SKCR */ -#define MCF_SKHA_SKCR_IE (0x00000001) - -/* Bit definitions and macros for MCF_SKHA_SKCMR */ -#define MCF_SKHA_SKCMR_SWR (0x00000001) -#define MCF_SKHA_SKCMR_RI (0x00000002) -#define MCF_SKHA_SKCMR_CI (0x00000004) -#define MCF_SKHA_SKCMR_GO (0x00000008) - -/* Bit definitions and macros for MCF_SKHA_SKSR */ -#define MCF_SKHA_SKSR_INT (0x00000001) -#define MCF_SKHA_SKSR_DONE (0x00000002) -#define MCF_SKHA_SKSR_ERR (0x00000004) -#define MCF_SKHA_SKSR_RD (0x00000008) -#define MCF_SKHA_SKSR_BUSY (0x00000010) -#define MCF_SKHA_SKSR_IFL(x) (((x)&0x000000FF)<<16) -#define MCF_SKHA_SKSR_OFL(x) (((x)&0x000000FF)<<24) - -/* Bit definitions and macros for MCF_SKHA_SKIR */ -#define MCF_SKHA_SKIR_IFO (0x00000001) -#define MCF_SKHA_SKIR_OFU (0x00000002) -#define MCF_SKHA_SKIR_NEIF (0x00000004) -#define MCF_SKHA_SKIR_NEOF (0x00000008) -#define MCF_SKHA_SKIR_IME (0x00000010) -#define MCF_SKHA_SKIR_DSE (0x00000020) -#define MCF_SKHA_SKIR_KSE (0x00000040) -#define MCF_SKHA_SKIR_RMDP (0x00000080) -#define MCF_SKHA_SKIR_ERE (0x00000100) -#define MCF_SKHA_SKIR_KPE (0x00000200) -#define MCF_SKHA_SKIR_KRE (0x00000400) - -/* Bit definitions and macros for MCF_SKHA_SKIMR */ -#define MCF_SKHA_SKIMR_IFO (0x00000001) -#define MCF_SKHA_SKIMR_OFU (0x00000002) -#define MCF_SKHA_SKIMR_NEIF (0x00000004) -#define MCF_SKHA_SKIMR_NEOF (0x00000008) -#define MCF_SKHA_SKIMR_IME (0x00000010) -#define MCF_SKHA_SKIMR_DSE (0x00000020) -#define MCF_SKHA_SKIMR_KSE (0x00000040) -#define MCF_SKHA_SKIMR_RMDP (0x00000080) -#define MCF_SKHA_SKIMR_ERE (0x00000100) -#define MCF_SKHA_SKIMR_KPE (0x00000200) -#define MCF_SKHA_SKIMR_KRE (0x00000400) - -/* Bit definitions and macros for MCF_SKHA_SKKSR */ -#define MCF_SKHA_SKKSR_KEYSIZE(x) (((x)&0x0000003F)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_SKHA_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_sram.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_sram.h deleted file mode 100644 index 7684d14d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_sram.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * File: mcf523x_sram.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_SRAM_H__ -#define __MCF523X_SRAM_H__ - -/********************************************************************* -* -* 64KByte System SRAM (SRAM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SRAM_RAMBAR (*(vuint32*)(void*)(&__IPSBAR[0x20000000])) - -/* Bit definitions and macros for MCF_SRAM_RAMBAR */ -#define MCF_SRAM_RAMBAR_V (0x00000001) -#define MCF_SRAM_RAMBAR_UD (0x00000002) -#define MCF_SRAM_RAMBAR_UC (0x00000004) -#define MCF_SRAM_RAMBAR_SD (0x00000008) -#define MCF_SRAM_RAMBAR_SC (0x00000010) -#define MCF_SRAM_RAMBAR_CI (0x00000020) -#define MCF_SRAM_RAMBAR_WP (0x00000100) -#define MCF_SRAM_RAMBAR_SPV (0x00000200) -#define MCF_SRAM_RAMBAR_PRI2 (0x00000400) -#define MCF_SRAM_RAMBAR_PRI1 (0x00000800) -#define MCF_SRAM_RAMBAR_BA(x) (((x)&0x0000FFFF)<<16) - -/********************************************************************/ - -#endif /* __MCF523X_SRAM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_timer.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_timer.h deleted file mode 100644 index c064b557..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_timer.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * File: mcf523x_timer.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_TIMER_H__ -#define __MCF523X_TIMER_H__ - -/********************************************************************* -* -* DMA Timers (TIMER) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_TIMER_DTMR0 (*(vuint16*)(void*)(&__IPSBAR[0x000400])) -#define MCF_TIMER_DTXMR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000402])) -#define MCF_TIMER_DTER0 (*(vuint8 *)(void*)(&__IPSBAR[0x000403])) -#define MCF_TIMER_DTRR0 (*(vuint32*)(void*)(&__IPSBAR[0x000404])) -#define MCF_TIMER_DTCR0 (*(vuint32*)(void*)(&__IPSBAR[0x000408])) -#define MCF_TIMER_DTCN0 (*(vuint32*)(void*)(&__IPSBAR[0x00040C])) -#define MCF_TIMER_DTMR1 (*(vuint16*)(void*)(&__IPSBAR[0x000440])) -#define MCF_TIMER_DTXMR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000442])) -#define MCF_TIMER_DTER1 (*(vuint8 *)(void*)(&__IPSBAR[0x000443])) -#define MCF_TIMER_DTRR1 (*(vuint32*)(void*)(&__IPSBAR[0x000444])) -#define MCF_TIMER_DTCR1 (*(vuint32*)(void*)(&__IPSBAR[0x000448])) -#define MCF_TIMER_DTCN1 (*(vuint32*)(void*)(&__IPSBAR[0x00044C])) -#define MCF_TIMER_DTMR2 (*(vuint16*)(void*)(&__IPSBAR[0x000480])) -#define MCF_TIMER_DTXMR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000482])) -#define MCF_TIMER_DTER2 (*(vuint8 *)(void*)(&__IPSBAR[0x000483])) -#define MCF_TIMER_DTRR2 (*(vuint32*)(void*)(&__IPSBAR[0x000484])) -#define MCF_TIMER_DTCR2 (*(vuint32*)(void*)(&__IPSBAR[0x000488])) -#define MCF_TIMER_DTCN2 (*(vuint32*)(void*)(&__IPSBAR[0x00048C])) -#define MCF_TIMER_DTMR3 (*(vuint16*)(void*)(&__IPSBAR[0x0004C0])) -#define MCF_TIMER_DTXMR3 (*(vuint8 *)(void*)(&__IPSBAR[0x0004C2])) -#define MCF_TIMER_DTER3 (*(vuint8 *)(void*)(&__IPSBAR[0x0004C3])) -#define MCF_TIMER_DTRR3 (*(vuint32*)(void*)(&__IPSBAR[0x0004C4])) -#define MCF_TIMER_DTCR3 (*(vuint32*)(void*)(&__IPSBAR[0x0004C8])) -#define MCF_TIMER_DTCN3 (*(vuint32*)(void*)(&__IPSBAR[0x0004CC])) -#define MCF_TIMER_DTMR(x) (*(vuint16*)(void*)(&__IPSBAR[0x000400+((x)*0x040)])) -#define MCF_TIMER_DTXMR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000402+((x)*0x040)])) -#define MCF_TIMER_DTER(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000403+((x)*0x040)])) -#define MCF_TIMER_DTRR(x) (*(vuint32*)(void*)(&__IPSBAR[0x000404+((x)*0x040)])) -#define MCF_TIMER_DTCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x000408+((x)*0x040)])) -#define MCF_TIMER_DTCN(x) (*(vuint32*)(void*)(&__IPSBAR[0x00040C+((x)*0x040)])) - -/* Bit definitions and macros for MCF_TIMER_DTMR */ -#define MCF_TIMER_DTMR_RST (0x0001) -#define MCF_TIMER_DTMR_CLK(x) (((x)&0x0003)<<1) -#define MCF_TIMER_DTMR_FRR (0x0008) -#define MCF_TIMER_DTMR_ORRI (0x0010) -#define MCF_TIMER_DTMR_OM (0x0020) -#define MCF_TIMER_DTMR_CE(x) (((x)&0x0003)<<6) -#define MCF_TIMER_DTMR_PS(x) (((x)&0x00FF)<<8) -#define MCF_TIMER_DTMR_CE_ANY (0x00C0) -#define MCF_TIMER_DTMR_CE_FALL (0x0080) -#define MCF_TIMER_DTMR_CE_RISE (0x0040) -#define MCF_TIMER_DTMR_CE_NONE (0x0000) -#define MCF_TIMER_DTMR_CLK_DTIN (0x0006) -#define MCF_TIMER_DTMR_CLK_DIV16 (0x0004) -#define MCF_TIMER_DTMR_CLK_DIV1 (0x0002) -#define MCF_TIMER_DTMR_CLK_STOP (0x0000) - -/* Bit definitions and macros for MCF_TIMER_DTXMR */ -#define MCF_TIMER_DTXMR_MODE16 (0x01) -#define MCF_TIMER_DTXMR_DMAEN (0x80) - -/* Bit definitions and macros for MCF_TIMER_DTER */ -#define MCF_TIMER_DTER_CAP (0x01) -#define MCF_TIMER_DTER_REF (0x02) - -/********************************************************************/ - -#endif /* __MCF523X_TIMER_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_uart.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_uart.h deleted file mode 100644 index 43232f67..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_uart.h +++ /dev/null @@ -1,180 +0,0 @@ -/* - * File: mcf523x_uart.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_UART_H__ -#define __MCF523X_UART_H__ - -/********************************************************************* -* -* Universal Asynchronous Receiver Transmitter (UART) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_UART_UMR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000200])) -#define MCF_UART_USR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000204])) -#define MCF_UART_UCSR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000204])) -#define MCF_UART_UCR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000208])) -#define MCF_UART_URB0 (*(vuint8 *)(void*)(&__IPSBAR[0x00020C])) -#define MCF_UART_UTB0 (*(vuint8 *)(void*)(&__IPSBAR[0x00020C])) -#define MCF_UART_UIPCR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000210])) -#define MCF_UART_UACR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000210])) -#define MCF_UART_UISR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000214])) -#define MCF_UART_UIMR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000214])) -#define MCF_UART_UBG10 (*(vuint8 *)(void*)(&__IPSBAR[0x000218])) -#define MCF_UART_UBG20 (*(vuint8 *)(void*)(&__IPSBAR[0x00021C])) -#define MCF_UART_UIP0 (*(vuint8 *)(void*)(&__IPSBAR[0x000234])) -#define MCF_UART_UOP10 (*(vuint8 *)(void*)(&__IPSBAR[0x000238])) -#define MCF_UART_UOP00 (*(vuint8 *)(void*)(&__IPSBAR[0x00023C])) -#define MCF_UART_UMR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000240])) -#define MCF_UART_USR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000244])) -#define MCF_UART_UCSR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000244])) -#define MCF_UART_UCR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000248])) -#define MCF_UART_URB1 (*(vuint8 *)(void*)(&__IPSBAR[0x00024C])) -#define MCF_UART_UTB1 (*(vuint8 *)(void*)(&__IPSBAR[0x00024C])) -#define MCF_UART_UIPCR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000250])) -#define MCF_UART_UACR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000250])) -#define MCF_UART_UISR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000254])) -#define MCF_UART_UIMR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000254])) -#define MCF_UART_UBG11 (*(vuint8 *)(void*)(&__IPSBAR[0x000258])) -#define MCF_UART_UBG21 (*(vuint8 *)(void*)(&__IPSBAR[0x00025C])) -#define MCF_UART_UIP1 (*(vuint8 *)(void*)(&__IPSBAR[0x000274])) -#define MCF_UART_UOP11 (*(vuint8 *)(void*)(&__IPSBAR[0x000278])) -#define MCF_UART_UOP01 (*(vuint8 *)(void*)(&__IPSBAR[0x00027C])) -#define MCF_UART_UMR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000280])) -#define MCF_UART_USR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000284])) -#define MCF_UART_UCSR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000284])) -#define MCF_UART_UCR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000288])) -#define MCF_UART_URB2 (*(vuint8 *)(void*)(&__IPSBAR[0x00028C])) -#define MCF_UART_UTB2 (*(vuint8 *)(void*)(&__IPSBAR[0x00028C])) -#define MCF_UART_UIPCR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000290])) -#define MCF_UART_UACR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000290])) -#define MCF_UART_UISR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000294])) -#define MCF_UART_UIMR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000294])) -#define MCF_UART_UBG12 (*(vuint8 *)(void*)(&__IPSBAR[0x000298])) -#define MCF_UART_UBG22 (*(vuint8 *)(void*)(&__IPSBAR[0x00029C])) -#define MCF_UART_UIP2 (*(vuint8 *)(void*)(&__IPSBAR[0x0002B4])) -#define MCF_UART_UOP12 (*(vuint8 *)(void*)(&__IPSBAR[0x0002B8])) -#define MCF_UART_UOP02 (*(vuint8 *)(void*)(&__IPSBAR[0x0002BC])) -#define MCF_UART_UMR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000200+((x)*0x040)])) -#define MCF_UART_USR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000204+((x)*0x040)])) -#define MCF_UART_UCSR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000204+((x)*0x040)])) -#define MCF_UART_UCR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000208+((x)*0x040)])) -#define MCF_UART_URB(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00020C+((x)*0x040)])) -#define MCF_UART_UTB(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00020C+((x)*0x040)])) -#define MCF_UART_UIPCR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000210+((x)*0x040)])) -#define MCF_UART_UACR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000210+((x)*0x040)])) -#define MCF_UART_UISR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000214+((x)*0x040)])) -#define MCF_UART_UIMR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000214+((x)*0x040)])) -#define MCF_UART_UBG1(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000218+((x)*0x040)])) -#define MCF_UART_UBG2(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00021C+((x)*0x040)])) -#define MCF_UART_UIP(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000234+((x)*0x040)])) -#define MCF_UART_UOP1(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000238+((x)*0x040)])) -#define MCF_UART_UOP0(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00023C+((x)*0x040)])) - -/* Bit definitions and macros for MCF_UART_UMR */ -#define MCF_UART_UMR_BC(x) (((x)&0x03)<<0) -#define MCF_UART_UMR_PT (0x04) -#define MCF_UART_UMR_PM(x) (((x)&0x03)<<3) -#define MCF_UART_UMR_ERR (0x20) -#define MCF_UART_UMR_RXIRQ (0x40) -#define MCF_UART_UMR_RXRTS (0x80) -#define MCF_UART_UMR_SB(x) (((x)&0x0F)<<0) -#define MCF_UART_UMR_TXCTS (0x10) -#define MCF_UART_UMR_TXRTS (0x20) -#define MCF_UART_UMR_CM(x) (((x)&0x03)<<6) -#define MCF_UART_UMR_PM_MULTI_ADDR (0x1C) -#define MCF_UART_UMR_PM_MULTI_DATA (0x18) -#define MCF_UART_UMR_PM_NONE (0x10) -#define MCF_UART_UMR_PM_FORCE_HI (0x0C) -#define MCF_UART_UMR_PM_FORCE_LO (0x08) -#define MCF_UART_UMR_PM_ODD (0x04) -#define MCF_UART_UMR_PM_EVEN (0x00) -#define MCF_UART_UMR_BC_5 (0x00) -#define MCF_UART_UMR_BC_6 (0x01) -#define MCF_UART_UMR_BC_7 (0x02) -#define MCF_UART_UMR_BC_8 (0x03) -#define MCF_UART_UMR_CM_NORMAL (0x00) -#define MCF_UART_UMR_CM_ECHO (0x40) -#define MCF_UART_UMR_CM_LOCAL_LOOP (0x80) -#define MCF_UART_UMR_CM_REMOTE_LOOP (0xC0) -#define MCF_UART_UMR_SB_STOP_BITS_1 (0x07) -#define MCF_UART_UMR_SB_STOP_BITS_15 (0x08) -#define MCF_UART_UMR_SB_STOP_BITS_2 (0x0F) - -/* Bit definitions and macros for MCF_UART_USR */ -#define MCF_UART_USR_RXRDY (0x01) -#define MCF_UART_USR_FFULL (0x02) -#define MCF_UART_USR_TXRDY (0x04) -#define MCF_UART_USR_TXEMP (0x08) -#define MCF_UART_USR_OE (0x10) -#define MCF_UART_USR_PE (0x20) -#define MCF_UART_USR_FE (0x40) -#define MCF_UART_USR_RB (0x80) - -/* Bit definitions and macros for MCF_UART_UCSR */ -#define MCF_UART_UCSR_TCS(x) (((x)&0x0F)<<0) -#define MCF_UART_UCSR_RCS(x) (((x)&0x0F)<<4) -#define MCF_UART_UCSR_RCS_SYS_CLK (0xD0) -#define MCF_UART_UCSR_RCS_CTM16 (0xE0) -#define MCF_UART_UCSR_RCS_CTM (0xF0) -#define MCF_UART_UCSR_TCS_SYS_CLK (0x0D) -#define MCF_UART_UCSR_TCS_CTM16 (0x0E) -#define MCF_UART_UCSR_TCS_CTM (0x0F) - -/* Bit definitions and macros for MCF_UART_UCR */ -#define MCF_UART_UCR_RXC(x) (((x)&0x03)<<0) -#define MCF_UART_UCR_TXC(x) (((x)&0x03)<<2) -#define MCF_UART_UCR_MISC(x) (((x)&0x07)<<4) -#define MCF_UART_UCR_NONE (0x00) -#define MCF_UART_UCR_STOP_BREAK (0x70) -#define MCF_UART_UCR_START_BREAK (0x60) -#define MCF_UART_UCR_BKCHGINT (0x50) -#define MCF_UART_UCR_RESET_ERROR (0x40) -#define MCF_UART_UCR_RESET_TX (0x30) -#define MCF_UART_UCR_RESET_RX (0x20) -#define MCF_UART_UCR_RESET_MR (0x10) -#define MCF_UART_UCR_TX_DISABLED (0x08) -#define MCF_UART_UCR_TX_ENABLED (0x04) -#define MCF_UART_UCR_RX_DISABLED (0x02) -#define MCF_UART_UCR_RX_ENABLED (0x01) - -/* Bit definitions and macros for MCF_UART_UIPCR */ -#define MCF_UART_UIPCR_CTS (0x01) -#define MCF_UART_UIPCR_COS (0x10) - -/* Bit definitions and macros for MCF_UART_UACR */ -#define MCF_UART_UACR_IEC (0x01) - -/* Bit definitions and macros for MCF_UART_UISR */ -#define MCF_UART_UISR_TXRDY (0x01) -#define MCF_UART_UISR_RXRDY_FU (0x02) -#define MCF_UART_UISR_DB (0x04) -#define MCF_UART_UISR_RXFTO (0x08) -#define MCF_UART_UISR_TXFIFO (0x10) -#define MCF_UART_UISR_RXFIFO (0x20) -#define MCF_UART_UISR_COS (0x80) - -/* Bit definitions and macros for MCF_UART_UIMR */ -#define MCF_UART_UIMR_TXRDY (0x01) -#define MCF_UART_UIMR_RXRDY_FU (0x02) -#define MCF_UART_UIMR_DB (0x04) -#define MCF_UART_UIMR_COS (0x80) - -/* Bit definitions and macros for MCF_UART_UIP */ -#define MCF_UART_UIP_CTS (0x01) - -/* Bit definitions and macros for MCF_UART_UOP1 */ -#define MCF_UART_UOP1_RTS (0x01) - -/* Bit definitions and macros for MCF_UART_UOP0 */ -#define MCF_UART_UOP0_RTS (0x01) - -/********************************************************************/ - -#endif /* __MCF523X_UART_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_wtm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_wtm.h deleted file mode 100644 index 1a41469a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf523x/mcf523x_wtm.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * File: mcf523x_wtm.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_WTM_H__ -#define __MCF523X_WTM_H__ - -/********************************************************************* -* -* Watchdog Timer Modules (WTM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_WTM_WCR (*(vuint16*)(void*)(&__IPSBAR[0x140000])) -#define MCF_WTM_WMR (*(vuint16*)(void*)(&__IPSBAR[0x140002])) -#define MCF_WTM_WCNTR (*(vuint16*)(void*)(&__IPSBAR[0x140004])) -#define MCF_WTM_WSR (*(vuint16*)(void*)(&__IPSBAR[0x140006])) - -/* Bit definitions and macros for MCF_WTM_WCR */ -#define MCF_WTM_WCR_EN (0x0001) -#define MCF_WTM_WCR_HALTED (0x0002) -#define MCF_WTM_WCR_DOZE (0x0004) -#define MCF_WTM_WCR_WAIT (0x0008) - -/* Bit definitions and macros for MCF_WTM_WMR */ -#define MCF_WTM_WMR_WM0 (0x0001) -#define MCF_WTM_WMR_WM1 (0x0002) -#define MCF_WTM_WMR_WM2 (0x0004) -#define MCF_WTM_WMR_WM3 (0x0008) -#define MCF_WTM_WMR_WM4 (0x0010) -#define MCF_WTM_WMR_WM5 (0x0020) -#define MCF_WTM_WMR_WM6 (0x0040) -#define MCF_WTM_WMR_WM7 (0x0080) -#define MCF_WTM_WMR_WM8 (0x0100) -#define MCF_WTM_WMR_WM9 (0x0200) -#define MCF_WTM_WMR_WM10 (0x0400) -#define MCF_WTM_WMR_WM11 (0x0800) -#define MCF_WTM_WMR_WM12 (0x1000) -#define MCF_WTM_WMR_WM13 (0x2000) -#define MCF_WTM_WMR_WM14 (0x4000) -#define MCF_WTM_WMR_WM15 (0x8000) - -/* Bit definitions and macros for MCF_WTM_WCNTR */ -#define MCF_WTM_WCNTR_WC0 (0x0001) -#define MCF_WTM_WCNTR_WC1 (0x0002) -#define MCF_WTM_WCNTR_WC2 (0x0004) -#define MCF_WTM_WCNTR_WC3 (0x0008) -#define MCF_WTM_WCNTR_WC4 (0x0010) -#define MCF_WTM_WCNTR_WC5 (0x0020) -#define MCF_WTM_WCNTR_WC6 (0x0040) -#define MCF_WTM_WCNTR_WC7 (0x0080) -#define MCF_WTM_WCNTR_WC8 (0x0100) -#define MCF_WTM_WCNTR_WC9 (0x0200) -#define MCF_WTM_WCNTR_WC10 (0x0400) -#define MCF_WTM_WCNTR_WC11 (0x0800) -#define MCF_WTM_WCNTR_WC12 (0x1000) -#define MCF_WTM_WCNTR_WC13 (0x2000) -#define MCF_WTM_WCNTR_WC14 (0x4000) -#define MCF_WTM_WCNTR_WC15 (0x8000) - -/* Bit definitions and macros for MCF_WTM_WSR */ -#define MCF_WTM_WSR_WS0 (0x0001) -#define MCF_WTM_WSR_WS1 (0x0002) -#define MCF_WTM_WSR_WS2 (0x0004) -#define MCF_WTM_WSR_WS3 (0x0008) -#define MCF_WTM_WSR_WS4 (0x0010) -#define MCF_WTM_WSR_WS5 (0x0020) -#define MCF_WTM_WSR_WS6 (0x0040) -#define MCF_WTM_WSR_WS7 (0x0080) -#define MCF_WTM_WSR_WS8 (0x0100) -#define MCF_WTM_WSR_WS9 (0x0200) -#define MCF_WTM_WSR_WS10 (0x0400) -#define MCF_WTM_WSR_WS11 (0x0800) -#define MCF_WTM_WSR_WS12 (0x1000) -#define MCF_WTM_WSR_WS13 (0x2000) -#define MCF_WTM_WSR_WS14 (0x4000) -#define MCF_WTM_WSR_WS15 (0x8000) - -/********************************************************************/ - -#endif /* __MCF523X_WTM_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf5xxx.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf5xxx.h deleted file mode 100644 index 6550ddb9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/include/arch/mcf5xxx.h +++ /dev/null @@ -1,190 +0,0 @@ -/* - * File: mcf5xxx.h - * Purpose: Definitions common to all ColdFire processors - * - * Notes: - */ - -#ifndef _CPU_MCF5XXX_H -#define _CPU_MCF5XXX_H - -/***********************************************************************/ -/* - * Misc. Defines - */ - -#ifdef FALSE -#undef FALSE -#endif -#define FALSE (0) - -#ifdef TRUE -#undef TRUE -#endif -#define TRUE (1) - -#ifdef NULL -#undef NULL -#endif -#define NULL (0) - -/***********************************************************************/ -/* - * The basic data types - */ - -typedef unsigned char uint8; /* 8 bits */ -typedef unsigned short int uint16; /* 16 bits */ -typedef unsigned long int uint32; /* 32 bits */ - -typedef signed char int8; /* 8 bits */ -typedef signed short int int16; /* 16 bits */ -typedef signed long int int32; /* 32 bits */ - -typedef volatile uint8 vuint8; /* 8 bits */ -typedef volatile uint16 vuint16; /* 16 bits */ -typedef volatile uint32 vuint32; /* 32 bits */ - -/***********************************************************************/ -/* - * Common M68K & ColdFire definitions - */ - -#define ADDRESS uint32 -#define INSTRUCTION uint16 -#define ILLEGAL 0x4AFC -#define CPU_WORD_SIZE 16 - -#define MCF5XXX_SR_T (0x8000) -#define MCF5XXX_SR_S (0x2000) -#define MCF5XXX_SR_M (0x1000) -#define MCF5XXX_SR_IPL (0x0700) -#define MCF5XXX_SR_IPL_0 (0x0000) -#define MCF5XXX_SR_IPL_1 (0x0100) -#define MCF5XXX_SR_IPL_2 (0x0200) -#define MCF5XXX_SR_IPL_3 (0x0300) -#define MCF5XXX_SR_IPL_4 (0x0400) -#define MCF5XXX_SR_IPL_5 (0x0500) -#define MCF5XXX_SR_IPL_6 (0x0600) -#define MCF5XXX_SR_IPL_7 (0x0700) -#define MCF5XXX_SR_X (0x0010) -#define MCF5XXX_SR_N (0x0008) -#define MCF5XXX_SR_Z (0x0004) -#define MCF5XXX_SR_V (0x0002) -#define MCF5XXX_SR_C (0x0001) - -#define MCF5XXX_CACR_CENB (0x80000000) -#define MCF5XXX_CACR_CPDI (0x10000000) -#define MCF5XXX_CACR_CPD (0x10000000) -#define MCF5XXX_CACR_CFRZ (0x08000000) -#define MCF5XXX_CACR_CINV (0x01000000) -#define MCF5XXX_CACR_DIDI (0x00800000) -#define MCF5XXX_CACR_DISD (0x00400000) -#define MCF5XXX_CACR_INVI (0x00200000) -#define MCF5XXX_CACR_INVD (0x00100000) -#define MCF5XXX_CACR_CEIB (0x00000400) -#define MCF5XXX_CACR_DCM_WR (0x00000000) -#define MCF5XXX_CACR_DCM_CB (0x00000100) -#define MCF5XXX_CACR_DCM_IP (0x00000200) -#define MCF5XXX_CACR_DCM (0x00000200) -#define MCF5XXX_CACR_DCM_II (0x00000300) -#define MCF5XXX_CACR_DBWE (0x00000100) -#define MCF5XXX_CACR_DWP (0x00000020) -#define MCF5XXX_CACR_EUST (0x00000010) -#define MCF5XXX_CACR_CLNF_00 (0x00000000) -#define MCF5XXX_CACR_CLNF_01 (0x00000002) -#define MCF5XXX_CACR_CLNF_10 (0x00000004) -#define MCF5XXX_CACR_CLNF_11 (0x00000006) - -#define MCF5XXX_ACR_AB(a) ((a)&0xFF000000) -#define MCF5XXX_ACR_AM(a) (((a)&0xFF000000) >> 8) -#define MCF5XXX_ACR_EN (0x00008000) -#define MCF5XXX_ACR_SM_USER (0x00000000) -#define MCF5XXX_ACR_SM_SUPER (0x00002000) -#define MCF5XXX_ACR_SM_IGNORE (0x00006000) -#define MCF5XXX_ACR_ENIB (0x00000080) -#define MCF5XXX_ACR_CM (0x00000040) -#define MCF5XXX_ACR_DCM_WR (0x00000000) -#define MCF5XXX_ACR_DCM_CB (0x00000020) -#define MCF5XXX_ACR_DCM_IP (0x00000040) -#define MCF5XXX_ACR_DCM_II (0x00000060) -#define MCF5XXX_ACR_CM (0x00000040) -#define MCF5XXX_ACR_BWE (0x00000020) -#define MCF5XXX_ACR_WP (0x00000004) - -#define MCF5XXX_RAMBAR_BA(a) ((a)&0xFFFFC000) -#define MCF5XXX_RAMBAR_PRI_00 (0x00000000) -#define MCF5XXX_RAMBAR_PRI_01 (0x00004000) -#define MCF5XXX_RAMBAR_PRI_10 (0x00008000) -#define MCF5XXX_RAMBAR_PRI_11 (0x0000C000) -#define MCF5XXX_RAMBAR_WP (0x00000100) -#define MCF5XXX_RAMBAR_CI (0x00000020) -#define MCF5XXX_RAMBAR_SC (0x00000010) -#define MCF5XXX_RAMBAR_SD (0x00000008) -#define MCF5XXX_RAMBAR_UC (0x00000004) -#define MCF5XXX_RAMBAR_UD (0x00000002) -#define MCF5XXX_RAMBAR_V (0x00000001) - -/***********************************************************************/ -/* - * The ColdFire family of processors has a simplified exception stack - * frame that looks like the following: - * - * 3322222222221111 111111 - * 1098765432109876 5432109876543210 - * 8 +----------------+----------------+ - * | Program Counter | - * 4 +----------------+----------------+ - * |FS/Fmt/Vector/FS| SR | - * SP --> 0 +----------------+----------------+ - * - * The stack self-aligns to a 4-byte boundary at an exception, with - * the FS/Fmt/Vector/FS field indicating the size of the adjustment - * (SP += 0,1,2,3 bytes). - */ - -#define MCF5XXX_RD_SF_FORMAT(PTR) \ - ((*((uint16 *)(PTR)) >> 12) & 0x00FF) - -#define MCF5XXX_RD_SF_VECTOR(PTR) \ - ((*((uint16 *)(PTR)) >> 2) & 0x00FF) - -#define MCF5XXX_RD_SF_FS(PTR) \ - ( ((*((uint16 *)(PTR)) & 0x0C00) >> 8) | (*((uint16 *)(PTR)) & 0x0003) ) - -#define MCF5XXX_SF_SR(PTR) *((uint16 *)(PTR)+1) -#define MCF5XXX_SF_PC(PTR) *((uint32 *)(PTR)+1) - -/********************************************************************/ -/* - * Functions provided by mcf5xxx.s - */ - -int asm_set_ipl (uint32); -void mcf5xxx_wr_cacr (uint32); -void mcf5xxx_wr_acr0 (uint32); -void mcf5xxx_wr_acr1 (uint32); -void mcf5xxx_wr_acr2 (uint32); -void mcf5xxx_wr_acr3 (uint32); -void mcf5xxx_wr_other_a7 (uint32); -void mcf5xxx_wr_other_sp (uint32); -void mcf5xxx_wr_vbr (uint32); -void mcf5xxx_wr_macsr (uint32); -void mcf5xxx_wr_mask (uint32); -void mcf5xxx_wr_acc0 (uint32); -void mcf5xxx_wr_accext01 (uint32); -void mcf5xxx_wr_accext23 (uint32); -void mcf5xxx_wr_acc1 (uint32); -void mcf5xxx_wr_acc2 (uint32); -void mcf5xxx_wr_acc3 (uint32); -void mcf5xxx_wr_sr (uint32); -void mcf5xxx_wr_rambar0 (uint32); -void mcf5xxx_wr_rambar1 (uint32); -void mcf5xxx_wr_mbar (uint32); -void mcf5xxx_wr_mbar0 (uint32); -void mcf5xxx_wr_mbar1 (uint32); - -/********************************************************************/ - -#endif /* _CPU_MCF5XXX_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/CHANGELOG b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/CHANGELOG deleted file mode 100644 index 0bf28ac5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/CHANGELOG +++ /dev/null @@ -1,596 +0,0 @@ -FUTURE - - * TODO: The lwIP source code makes some invalid assumptions on processor - word-length, storage sizes and alignment. See the mailing lists for - problems with exoteric (/DSP) architectures showing these problems. - We still have to fix some of these issues neatly. - - * TODO: the ARP layer is not protected against concurrent access. If - you run from a multitasking OS, serialize access to ARP (called from - your network device driver and from a timeout thread.) - - * TODO: the PPP code is broken in a few ways. There are namespace - collisions on BSD systems and many assumptions on word-length - (sizeof(int)). In ppp.c an assumption is made on the availability of - a thread subsystem. Either PPP needs to be moved to contrib/ports/??? - or rearranged to be more generic. - -HISTORY - -(CVS HEAD) - - * [New changes go here] - -(STABLE-1_1_1) - - 2006-03-03 Christiaan Simons - * ipv4/ip_frag.c: Added bound-checking assertions on ip_reassbitmap - access and added pbuf_alloc() return value checks. - - 2006-01-01 Leon Woestenberg - * tcp_{in,out}.c, tcp_out.c: Removed 'even sndbuf' fix in TCP, which is - now handled by the checksum routine properly. - - 2006-02-27 Leon Woestenberg - * pbuf.c: Fix alignment; pbuf_init() would not work unless - pbuf_pool_memory[] was properly aligned. (Patch by Curt McDowell.) - - 2005-12-20 Leon Woestenberg - * tcp.c: Remove PCBs which stay in LAST_ACK state too long. Patch - submitted by Mitrani Hiroshi. - - 2005-12-15 Christiaan Simons - * inet.c: Disabled the added summing routine to preserve code space. - - 2005-12-14 Leon Woestenberg - * tcp_in.c: Duplicate FIN ACK race condition fix by Kelvin Lawson. - Added Curt McDowell's optimized checksumming routine for future - inclusion. Need to create test case for unaliged, aligned, odd, - even length combination of cases on various endianess machines. - - 2005-12-09 Christiaan Simons - * inet.c: Rewrote standard checksum routine in proper portable C. - - 2005-11-25 Christiaan Simons - * udp.c tcp.c: Removed SO_REUSE hack. Should reside in socket code only. - * *.c: introduced cc.h LWIP_DEBUG formatters matching the u16_t, s16_t, - u32_t, s32_t typedefs. This solves most debug word-length assumes. - - 2005-07-17 Leon Woestenberg - * inet.c: Fixed unaligned 16-bit access in the standard checksum - routine by Peter Jolasson. - * slipif.c: Fixed implementation assumption of single-pbuf datagrams. - - 2005-02-04 Leon Woestenberg - * tcp_out.c: Fixed uninitialized 'queue' referenced in memerr branch. - * tcp_{out|in}.c: Applied patch fixing unaligned access. - - 2005-01-04 Leon Woestenberg - * pbuf.c: Fixed missing semicolon after LWIP_DEBUG statement. - - 2005-01-03 Leon Woestenberg - * udp.c: UDP pcb->recv() was called even when it was NULL. - -(STABLE-1_1_0) - - 2004-12-28 Leon Woestenberg - * etharp.*: Disabled multiple packets on the ARP queue. - This clashes with TCP queueing. - - 2004-11-28 Leon Woestenberg - * etharp.*: Fixed race condition from ARP request to ARP timeout. - Halved the ARP period, doubled the period counts. - ETHARP_MAX_PENDING now should be at least 2. This prevents - the counter from reaching 0 right away (which would allow - too little time for ARP responses to be received). - - 2004-11-25 Leon Woestenberg - * dhcp.c: Decline messages were not multicast but unicast. - * etharp.c: ETHARP_CREATE is renamed to ETHARP_TRY_HARD. - Do not try hard to insert arbitrary packet's source address, - etharp_ip_input() now calls etharp_update() without ETHARP_TRY_HARD. - etharp_query() now always DOES call ETHARP_TRY_HARD so that users - querying an address will see it appear in the cache (DHCP could - suffer from this when a server invalidly gave an in-use address.) - * ipv4/ip_addr.h: Renamed ip_addr_maskcmp() to _netcmp() as we are - comparing network addresses (identifiers), not the network masks - themselves. - * ipv4/ip_addr.c: ip_addr_isbroadcast() now checks that the given - IP address actually belongs to the network of the given interface. - - 2004-11-24 Kieran Mansley - * tcp.c: Increment pcb->snd_buf when ACK is received in SYN_SENT state. - -(STABLE-1_1_0-RC1) - - 2004-10-16 Kieran Mansley - * tcp.c: Add code to tcp_recved() to send an ACK (window update) immediately, - even if one is already pending, if the rcv_wnd is above a threshold - (currently TCP_WND/2). This avoids waiting for a timer to expire to send a - delayed ACK in order to open the window if the stack is only receiving data. - - 2004-09-12 Kieran Mansley - * tcp*.*: Retransmit time-out handling improvement by Sam Jansen. - - 2004-08-20 Tony Mountifield - * etharp.c: Make sure the first pbuf queued on an ARP entry - is properly ref counted. - - 2004-07-27 Tony Mountifield - * debug.h: Added (int) cast in LWIP_DEBUGF() to avoid compiler - warnings about comparison. - * pbuf.c: Stopped compiler complaining of empty if statement - when LWIP_DEBUGF() empty. Closed an unclosed comment. - * tcp.c: Stopped compiler complaining of empty if statement - when LWIP_DEBUGF() empty. - * ip.h Corrected IPH_TOS() macro: returns a byte, so doesn't need htons(). - * inet.c: Added a couple of casts to quiet the compiler. - No need to test isascii(c) before isdigit(c) or isxdigit(c). - - 2004-07-22 Tony Mountifield - * inet.c: Made data types consistent in inet_ntoa(). - Added casts for return values of checksum routines, to pacify compiler. - * ip_frag.c, tcp_out.c, sockets.c, pbuf.c - Small corrections to some debugging statements, to pacify compiler. - - 2004-07-21 Tony Mountifield - * etharp.c: Removed spurious semicolon and added missing end-of-comment. - * ethernetif.c Updated low_level_output() to match prototype for - netif->linkoutput and changed low_level_input() similarly for consistency. - * api_msg.c: Changed recv_raw() from int to u8_t, to match prototype - of raw_recv() in raw.h and so avoid compiler error. - * sockets.c: Added trivial (int) cast to keep compiler happier. - * ip.c, netif.c Changed debug statements to use the tidier ip4_addrN() macros. - -(STABLE-1_0_0) - - ++ Changes: - - 2004-07-05 Leon Woestenberg - * sockets.*: Restructured LWIP_PRIVATE_TIMEVAL. Make sure - your cc.h file defines this either 1 or 0. If non-defined, - defaults to 1. - * .c: Added and includes where used. - * etharp.c: Made some array indices unsigned. - - 2004-06-27 Leon Woestenberg - * netif.*: Added netif_set_up()/down(). - * dhcp.c: Changes to restart program flow. - - 2004-05-07 Leon Woestenberg - * etharp.c: In find_entry(), instead of a list traversal per candidate, do a - single-pass lookup for different candidates. Should exploit locality. - - 2004-04-29 Leon Woestenberg - * tcp*.c: Cleaned up source comment documentation for Doxygen processing. - * opt.h: ETHARP_ALWAYS_INSERT option removed to comply with ARP RFC. - * etharp.c: update_arp_entry() only adds new ARP entries when adviced to by - the caller. This deprecates the ETHARP_ALWAYS_INSERT overrule option. - - ++ Bug fixes: - - 2004-04-27 Leon Woestenberg - * etharp.c: Applied patch of bug #8708 by Toni Mountifield with a solution - suggested by Timmy Brolin. Fix for 32-bit processors that cannot access - non-aligned 32-bit words, such as soms 32-bit TCP/IP header fields. Fix - is to prefix the 14-bit Ethernet headers with two padding bytes. - - 2004-04-23 Leon Woestenberg - * ip_addr.c: Fix in the ip_addr_isbroadcast() check. - * etharp.c: Fixed the case where the packet that initiates the ARP request - is not queued, and gets lost. Fixed the case where the packets destination - address is already known; we now always queue the packet and perform an ARP - request. - -(STABLE-0_7_0) - - ++ Bug fixes: - - * Fixed TCP bug for SYN_SENT to ESTABLISHED state transition. - * Fixed TCP bug in dequeueing of FIN from out of order segment queue. - * Fixed two possible NULL references in rare cases. - -(STABLE-0_6_6) - - ++ Bug fixes: - - * Fixed DHCP which did not include the IP address in DECLINE messages. - - ++ Changes: - - * etharp.c has been hauled over a bit. - -(STABLE-0_6_5) - - ++ Bug fixes: - - * Fixed TCP bug induced by bad window resizing with unidirectional TCP traffic. - * Packets sent from ARP queue had invalid source hardware address. - - ++ Changes: - - * Pass-by ARP requests do now update the cache. - - ++ New features: - - * No longer dependent on ctype.h. - * New socket options. - * Raw IP pcb support. - -(STABLE-0_6_4) - - ++ Bug fixes: - - * Some debug formatters and casts fixed. - * Numereous fixes in PPP. - - ++ Changes: - - * DEBUGF now is LWIP_DEBUGF - * pbuf_dechain() has been re-enabled. - * Mentioned the changed use of CVS branches in README. - -(STABLE-0_6_3) - - ++ Bug fixes: - - * Fixed pool pbuf memory leak in pbuf_alloc(). - Occured if not enough PBUF_POOL pbufs for a packet pbuf chain. - Reported by Savin Zlobec. - - * PBUF_POOL chains had their tot_len field not set for non-first - pbufs. Fixed in pbuf_alloc(). - - ++ New features: - - * Added PPP stack contributed by Marc Boucher - - ++ Changes: - - * Now drops short packets for ICMP/UDP/TCP protocols. More robust. - - * ARP queueuing now queues the latest packet instead of the first. - This is the RFC recommended behaviour, but can be overridden in - lwipopts.h. - -(0.6.2) - - ++ Bugfixes: - - * TCP has been fixed to deal with the new use of the pbuf->ref - counter. - - * DHCP dhcp_inform() crash bug fixed. - - ++ Changes: - - * Removed pbuf_pool_free_cache and pbuf_pool_alloc_cache. Also removed - pbuf_refresh(). This has sped up pbuf pool operations considerably. - Implemented by David Haas. - -(0.6.1) - - ++ New features: - - * The packet buffer implementation has been enhanced to support - zero-copy and copy-on-demand for packet buffers which have their - payloads in application-managed memory. - Implemented by David Haas. - - Use PBUF_REF to make a pbuf refer to RAM. lwIP will use zero-copy - if an outgoing packet can be directly sent on the link, or perform - a copy-on-demand when necessary. - - The application can safely assume the packet is sent, and the RAM - is available to the application directly after calling udp_send() - or similar function. - - ++ Bugfixes: - - * ARP_QUEUEING should now correctly work for all cases, including - PBUF_REF. - Implemented by Leon Woestenberg. - - ++ Changes: - - * IP_ADDR_ANY is no longer a NULL pointer. Instead, it is a pointer - to a '0.0.0.0' IP address. - - * The packet buffer implementation is changed. The pbuf->ref counter - meaning has changed, and several pbuf functions have been - adapted accordingly. - - * netif drivers have to be changed to set the hardware address length field - that must be initialized correctly by the driver (hint: 6 for Ethernet MAC). - See the contrib/ports/c16x cs8900 driver as a driver example. - - * netif's have a dhcp field that must be initialized to NULL by the driver. - See the contrib/ports/c16x cs8900 driver as a driver example. - -(0.5.x) This file has been unmaintained up to 0.6.1. All changes are - logged in CVS but have not been explained here. - -(0.5.3) Changes since version 0.5.2 - - ++ Bugfixes: - - * memp_malloc(MEMP_API_MSG) could fail with multiple application - threads because it wasn't protected by semaphores. - - ++ Other changes: - - * struct ip_addr now packed. - - * The name of the time variable in arp.c has been changed to ctime - to avoid conflicts with the time() function. - -(0.5.2) Changes since version 0.5.1 - - ++ New features: - - * A new TCP function, tcp_tmr(), now handles both TCP timers. - - ++ Bugfixes: - - * A bug in tcp_parseopt() could cause the stack to hang because of a - malformed TCP option. - - * The address of new connections in the accept() function in the BSD - socket library was not handled correctly. - - * pbuf_dechain() did not update the ->tot_len field of the tail. - - * Aborted TCP connections were not handled correctly in all - situations. - - ++ Other changes: - - * All protocol header structs are now packed. - - * The ->len field in the tcp_seg structure now counts the actual - amount of data, and does not add one for SYN and FIN segments. - -(0.5.1) Changes since version 0.5.0 - - ++ New features: - - * Possible to run as a user process under Linux. - - * Preliminary support for cross platform packed structs. - - * ARP timer now implemented. - - ++ Bugfixes: - - * TCP output queue length was badly initialized when opening - connections. - - * TCP delayed ACKs were not sent correctly. - - * Explicit initialization of BSS segment variables. - - * read() in BSD socket library could drop data. - - * Problems with memory alignment. - - * Situations when all TCP buffers were used could lead to - starvation. - - * TCP MSS option wasn't parsed correctly. - - * Problems with UDP checksum calculation. - - * IP multicast address tests had endianess problems. - - * ARP requests had wrong destination hardware address. - - ++ Other changes: - - * struct eth_addr changed from u16_t[3] array to u8_t[6]. - - * A ->linkoutput() member was added to struct netif. - - * TCP and UDP ->dest_* struct members where changed to ->remote_*. - - * ntoh* macros are now null definitions for big endian CPUs. - -(0.5.0) Changes since version 0.4.2 - - ++ New features: - - * Redesigned operating system emulation layer to make porting easier. - - * Better control over TCP output buffers. - - * Documenation added. - - ++ Bugfixes: - - * Locking issues in buffer management. - - * Bugfixes in the sequential API. - - * IP forwarding could cause memory leakage. This has been fixed. - - ++ Other changes: - - * Directory structure somewhat changed; the core/ tree has been - collapsed. - -(0.4.2) Changes since version 0.4.1 - - ++ New features: - - * Experimental ARP implementation added. - - * Skeleton Ethernet driver added. - - * Experimental BSD socket API library added. - - ++ Bugfixes: - - * In very intense situations, memory leakage could occur. This has - been fixed. - - ++ Other changes: - - * Variables named "data" and "code" have been renamed in order to - avoid name conflicts in certain compilers. - - * Variable++ have in appliciable cases been translated to ++variable - since some compilers generate better code in the latter case. - -(0.4.1) Changes since version 0.4 - - ++ New features: - - * TCP: Connection attempts time out earlier than data - transmissions. Nagle algorithm implemented. Push flag set on the - last segment in a burst. - - * UDP: experimental support for UDP-Lite extensions. - - ++ Bugfixes: - - * TCP: out of order segments were in some cases handled incorrectly, - and this has now been fixed. Delayed acknowledgements was broken - in 0.4, has now been fixed. Binding to an address that is in use - now results in an error. Reset connections sometimes hung an - application; this has been fixed. - - * Checksum calculation sometimes failed for chained pbufs with odd - lengths. This has been fixed. - - * API: a lot of bug fixes in the API. The UDP API has been improved - and tested. Error reporting and handling has been - improved. Logical flaws and race conditions for incoming TCP - connections has been found and removed. - - * Memory manager: alignment issues. Reallocating memory sometimes - failed, this has been fixed. - - * Generic library: bcopy was flawed and has been fixed. - - ++ Other changes: - - * API: all datatypes has been changed from generic ones such as - ints, to specified ones such as u16_t. Functions that return - errors now have the correct type (err_t). - - * General: A lot of code cleaned up and debugging code removed. Many - portability issues have been fixed. - - * The license was changed; the advertising clause was removed. - - * C64 port added. - - * Thanks: Huge thanks go to Dagan Galarneau, Horst Garnetzke, Petri - Kosunen, Mikael Caleres, and Frits Wilmink for reporting and - fixing bugs! - -(0.4) Changes since version 0.3.1 - - * Memory management has been radically changed; instead of - allocating memory from a shared heap, memory for objects that are - rapidly allocated and deallocated is now kept in pools. Allocation - and deallocation from those memory pools is very fast. The shared - heap is still present but is used less frequently. - - * The memory, memory pool, and packet buffer subsystems now support - 4-, 2-, or 1-byte alignment. - - * "Out of memory" situations are handled in a more robust way. - - * Stack usage has been reduced. - - * Easier configuration of lwIP parameters such as memory usage, - TTLs, statistics gathering, etc. All configuration parameters are - now kept in a single header file "lwipopts.h". - - * The directory structure has been changed slightly so that all - architecture specific files are kept under the src/arch - hierarchy. - - * Error propagation has been improved, both in the protocol modules - and in the API. - - * The code for the RTXC architecture has been implemented, tested - and put to use. - - * Bugs have been found and corrected in the TCP, UDP, IP, API, and - the Internet checksum modules. - - * Bugs related to porting between a 32-bit and a 16-bit architecture - have been found and corrected. - - * The license has been changed slightly to conform more with the - original BSD license, including the advertisement clause. - -(0.3.1) Changes since version 0.3 - - * Fix of a fatal bug in the buffer management. Pbufs with allocated - RAM never returned the RAM when the pbuf was deallocated. - - * TCP congestion control, window updates and retransmissions did not - work correctly. This has now been fixed. - - * Bugfixes in the API. - -(0.3) Changes since version 0.2 - - * New and improved directory structure. All include files are now - kept in a dedicated include/ directory. - - * The API now has proper error handling. A new function, - netconn_err(), now returns an error code for the connection in - case of errors. - - * Improvements in the memory management subsystem. The system now - keeps a pointer to the lowest free memory block. A new function, - mem_malloc2() tries to allocate memory once, and if it fails tries - to free some memory and retry the allocation. - - * Much testing has been done with limited memory - configurations. lwIP now does a better job when overloaded. - - * Some bugfixes and improvements to the buffer (pbuf) subsystem. - - * Many bugfixes in the TCP code: - - - Fixed a bug in tcp_close(). - - - The TCP receive window was incorrectly closed when out of - sequence segments was received. This has been fixed. - - - Connections are now timed-out of the FIN-WAIT-2 state. - - - The initial congestion window could in some cases be too - large. This has been fixed. - - - The retransmission queue could in some cases be screwed up. This - has been fixed. - - - TCP RST flag now handled correctly. - - - Out of sequence data was in some cases never delivered to the - application. This has been fixed. - - - Retransmitted segments now contain the correct acknowledgment - number and advertised window. - - - TCP retransmission timeout backoffs are not correctly computed - (ala BSD). After a number of retransmissions, TCP now gives up - the connection. - - * TCP connections now are kept on three lists, one for active - connections, one for listening connections, and one for - connections that are in TIME-WAIT. This greatly speeds up the fast - timeout processing for sending delayed ACKs. - - * TCP now provides proper feedback to the application when a - connection has been successfully set up. - - * More comments have been added to the code. The code has also been - somewhat cleaned up. - -(0.2) Initial public release. diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/COPYING b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/COPYING deleted file mode 100644 index e23898b5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/COPYING +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (c) 2001, 2002 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/FILES b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/FILES deleted file mode 100644 index 66253196..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/FILES +++ /dev/null @@ -1,4 +0,0 @@ -src/ - The source code for the lwIP TCP/IP stack. -doc/ - The documentation for lwIP. - -See also the FILES file in each subdirectory. diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/README b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/README deleted file mode 100644 index d9102826..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/README +++ /dev/null @@ -1,74 +0,0 @@ -INTRODUCTION - -lwIP is a small independent implementation of the TCP/IP protocol -suite that has been developed by Adam Dunkels at the Computer and -Networks Architectures (CNA) lab at the Swedish Institute of Computer -Science (SICS). - -The focus of the lwIP TCP/IP implementation is to reduce the RAM usage -while still having a full scale TCP. This making lwIP suitable for use -in embedded systems with tens of kilobytes of free RAM and room for -around 40 kilobytes of code ROM. - -FEATURES - - * IP (Internet Protocol) including packet forwarding over multiple - network interfaces - * ICMP (Internet Control Message Protocol) for network maintenance - and debugging - * UDP (User Datagram Protocol) including experimental UDP-lite - extensions - * TCP (Transmission Control Protocol) with congestion control, RTT - estimation and fast recovery/fast retransmit - * Specialized API for enhanced performance - * Optional Berkeley socket API - -LICENSE - -lwIP is freely available under a BSD license. - -DEVELOPMENT - -lwIP has grown into an excellent TCP/IP stack for embedded devices, -and developers using the stack often submit bug fixes, improvements, -and additions to the stack to further increase its usefulness. - -Development of lwIP is hosted on Savannah, a central point for -software development, maintenance and distribution. Everyone can -help improve lwIP by use of Savannah's interface, CVS and the -mailing list. A core team of developers will commit changes to the -CVS source tree. - -The lwIP TCP/IP stack is maintained in the 'lwip' CVS module and -contributions (such as platform ports) are in the 'contrib' module. - -See doc/savannah.txt for details on CVS server access for users and -developers. - -Last night's CVS tar ball can be downloaded from: - http://savannah.gnu.org/cvs.backups/lwip.tar.gz [CHANGED - NEEDS FIXING] - -The current CVS trees are web-browsable: - http://savannah.nongnu.org/cgi-bin/viewcvs/lwip/lwip/ - http://savannah.nongnu.org/cgi-bin/viewcvs/lwip/contrib/ - -Submit patches and bugs via the lwIP project page: - http://savannah.nongnu.org/projects/lwip/ - - -DOCUMENTATION - -The original out-dated homepage of lwIP and Adam Dunkels' papers on -lwIP are at the official lwIP home page: - http://www.sics.se/~adam/lwip/ - -Self documentation of the source code is regularly extracted from the -current CVS sources and is available from this web page: - http://www.nongnu.org/lwip/ - -Reading Adam's papers, the files in docs/, browsing the source code -documentation and browsing the mailing list archives is a good way to -become familiar with the design of lwIP. - -Adam Dunkels -Leon Woestenberg diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/arch/cc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/arch/cc.h deleted file mode 100644 index ef921400..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/arch/cc.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * Modifcations: Christian Walter - */ -#ifndef __CC_H__ -#define __CC_H__ - -/* ------------------------ System includes ------------------------------- */ -#include - -/* ------------------------ Project includes ------------------------------ */ -#include "cpu.h" -#include "sys_arch.h" - -/* ------------------------ Defines --------------------------------------- */ - -#define PACK_STRUCT_BEGIN -#define PACK_STRUCT_STRUCT __attribute__ ((__packed__)) -#define PACK_STRUCT_END - -#define PACK_STRUCT_FIELD( x ) x - -#define ALIGN_STRUCT_8_BEGIN -#define ALIGN_STRUCT_8 __attribute__ ((aligned (8))) -#define ALIGN_STRUCT_8_END - -#define LWIP_PLATFORM_ASSERT( x ) sys_assert( x ) -#define LWIP_PLATFORM_DIAG( x, ... ) do{ sys_debug x; } while( 0 ); - -/* Define (sn)printf formatters for these lwIP types */ -#define U16_F "hu" -#define S16_F "hd" -#define X16_F "hx" -#define U32_F "lu" -#define S32_F "ld" -#define X32_F "lx" - -/* ------------------------ Type definitions ------------------------------ */ -typedef unsigned char u8_t; -typedef signed char s8_t; -typedef unsigned short u16_t; -typedef signed short s16_t; -typedef unsigned long u32_t; -typedef signed long s32_t; -typedef u32_t mem_ptr_t; -typedef int sys_prot_t; - -/* ------------------------ Prototypes ------------------------------------ */ - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/arch/cpu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/arch/cpu.h deleted file mode 100644 index 743f8081..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/arch/cpu.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __CPU_H__ -#define __CPU_H__ - -/* ------------------------ Defines --------------------------------------- */ -#define BYTE_ORDER BIG_ENDIAN - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/arch/perf.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/arch/perf.h deleted file mode 100644 index f94640e9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/arch/perf.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __PERF_H__ -#define __PERF_H__ - -/* ------------------------ Defines --------------------------------------- */ -#define PERF_START /* null definition */ -#define PERF_STOP(x) /* null definition */ - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/arch/sys_arch.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/arch/sys_arch.h deleted file mode 100644 index 721965e2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/arch/sys_arch.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __SYS_ARCH_H__ -#define __SYS_ARCH_H__ - -/* ------------------------ Project includes ------------------------------ */ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" -#include "semphr.h" - -/* ------------------------ Defines --------------------------------------- */ -#define SYS_MBOX_NULL ( xQueueHandle )0 -#define SYS_THREAD_NULL NULL -#define SYS_SEM_NULL ( xSemaphoreHandle )0 -#define SIO_FD_NULL ( sio_fd_t )NULL - -/* ------------------------ Type definitions ------------------------------ */ -typedef xSemaphoreHandle sys_sem_t; -typedef xQueueHandle sys_mbox_t; -typedef xTaskHandle sys_thread_t; - -/* ------------------------ Prototypes ------------------------------------ */ -sys_thread_t sys_arch_thread_new( void ( *thread ) ( void *arg ), void *arg, - int prio, size_t ssize ); -sys_thread_t sys_arch_thread_current( void ); -void sys_arch_thread_remove( sys_thread_t hdl ); -void sys_assert( const char *const msg ); -void sys_debug( const char *const fmt, ... ); - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/netif/fec.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/netif/fec.c deleted file mode 100644 index 94840568..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/netif/fec.c +++ /dev/null @@ -1,581 +0,0 @@ -/* - * Copyright (c) 2006 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * Author: Christian Walter - * - * TODO: - * - Introduce another task create function in the sys_arch layer which allows - * for passing the stack size. - * - Avoid copying the buffers - this requires changeing the nbuf driver code - * to use the lwIP pbuf buffer implementation. - * - * File: $Id$ - */ - -/* ------------------------ System includes ------------------------------- */ -#include - -/* ------------------------ Platform includes ----------------------------- */ -#include "mcf5xxx.h" -#include "mcf523x.h" - -#include "nbuf.h" - -/* ------------------------ lwIP includes --------------------------------- */ -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/mem.h" -#include "lwip/pbuf.h" -#include "lwip/sys.h" -#include "lwip/stats.h" -#include "lwip/debug.h" -#include "netif/etharp.h" - -/* ------------------------ Defines --------------------------------------- */ -#ifdef FEC_DEBUG -#define FEC_DEBUG_INIT \ - do \ - { \ - MCF_GPIO_PDDR_FECI2C = ( MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0 | \ - MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1 ); \ - } while( 0 ) - -#define FEC_DEBUG_RX_TIMING( x ) \ - do \ - { \ - if( x ) \ - MCF_GPIO_PPDSDR_FECI2C = MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0; \ - else \ - MCF_GPIO_PCLRR_FECI2C = ~( MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0 ); \ - } while( 0 ) - -#define FEC_DEBUG_TX_TIMING( x ) \ - do \ - { \ - if( x ) \ - MCF_GPIO_PPDSDR_FECI2C = MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1; \ - else \ - MCF_GPIO_PCLRR_FECI2C = ~( MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1 ); \ - } while( 0 ) - -#else -#define FEC_DEBUG DBG_OFF -#define FEC_DEBUG_INIT -#define FEC_DEBUG_RX_TIMING( x ) -#define FEC_DEBUG_TX_TIMING( x ) -#endif - -#define MCF_FEC_INT_LEVEL ( 6 ) -#define MCF_FEC_INT_PRIORITY ( 0 ) -#define MCF_FEC_VEC_RXF ( 64 + 27 ) -#define MCF_FEC_MTU ( 1518 ) - -#define ETH_ADDR_LEN ( 6 ) - -#define TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) - -/* ------------------------ Type definitions ------------------------------ */ -typedef struct -{ - struct netif *netif; /* lwIP network interface. */ - struct eth_addr *self; /* MAC address of FEC interface. */ - sys_sem_t tx_sem; /* Control access to transmitter. */ - sys_sem_t rx_sem; /* Semaphore to signal receive thread. */ -} mcf523xfec_if_t; - -/* ------------------------ Static variables ------------------------------ */ -static mcf523xfec_if_t *fecif_g; - -/* ------------------------ Static functions ------------------------------ */ -static err_t mcf523xfec_output( struct netif *, struct pbuf *, struct ip_addr * ); -static err_t mcf523xfec_output_raw( struct netif *, struct pbuf * ); - -static void mcf523xfec_reset( mcf523xfec_if_t * fecif ); -static void mcf523xfec_enable( mcf523xfec_if_t * fecif ); -static void mcf523xfec_disable( mcf523xfec_if_t * fecif ); -static void mcf523xfec_get_mac( mcf523xfec_if_t * fecif, struct eth_addr *mac ); -static void mcf523xfec_rx_irq( void ); -static void mcf523xfec_rx_task( void *arg ); - -static void arp_timer( void *arg ); -static void eth_input( struct netif *netif, struct pbuf *p ); - -/* ------------------------ Start implementation -------------------------- */ - -static void -arp_timer( void *arg ) -{ - ( void )arg; - etharp_tmr( ); - sys_timeout( ARP_TMR_INTERVAL, arp_timer, NULL ); -} - -err_t -mcf523xfec_output_raw( struct netif *netif, struct pbuf *p ) -{ - err_t res; - nbuf_t *pNBuf; - mcf523xfec_if_t *fecif = netif->state; - int i; - struct pbuf *q; - -#if ETH_PAD_SIZE - pbuf_header( p, -ETH_PAD_SIZE ); /* drop the padding word */ -#endif - - - /* Test if we can handle such big frames. If not drop it. */ - if( p->tot_len > MCF_FEC_MTU ) - { -#if LINK_STATS - lwip_stats.link.lenerr++; -#endif - res = ERR_BUF; - } - /* Test if our network buffer scheme can handle a packet of this size. If - * not drop it and return a memory error. */ - else if( p->tot_len > TX_BUFFER_SIZE ) - { -#ifdef LINK_STATS - lwip_stats.link.memerr++; -#endif - res = ERR_MEM; - } - /* Allocate a transmit buffer. If no buffer is available drop the frame. */ - else if( ( pNBuf = nbuf_tx_allocate( ) ) == NULL ) - { - LWIP_ASSERT( "mcf523xfec_output_raw: pNBuf != NULL\n", pNBuf != NULL ); -#ifdef LINK_STATS - lwip_stats.link.memerr++; -#endif - res = ERR_MEM; - } - else - { - q = p; - i = 0; - do - { - memcpy( &pNBuf->data[i], q->payload, q->len ); - i += q->len; - } - while( ( q = q->next ) != NULL ); - pNBuf->length = p->tot_len; - - /* Set Frame ready for transmission. */ - pNBuf->status |= TX_BD_R; - /* Mark the buffer as not in use so the FEC can take it. */ - nbuf_tx_release( pNBuf ); - /* Indicate that a new transmit buffer has been produced. */ - MCF_FEC_TDAR = 1; -#if LINK_STATS - lwip_stats.link.xmit++; -#endif - res = ERR_OK; - } - - sys_sem_signal( fecif->tx_sem ); -#if ETH_PAD_SIZE - buf_header( p, ETH_PAD_SIZE ); -#endif - - return res; -} - -/* This function is called by the TCP/IP stack when an IP packet should be - * sent. It uses the ethernet ARP module provided by lwIP to resolve the - * destination MAC address. The ARP module will later call our low level - * output function mcf523xfec_output_raw. - */ -err_t -mcf523xfec_output( struct netif * netif, struct pbuf * p, struct ip_addr * ipaddr ) -{ - err_t res; - mcf523xfec_if_t *fecif = netif->state; - - FEC_DEBUG_TX_TIMING( 1 ); - /* Make sure only one thread is in this function. */ - sys_sem_wait( fecif->tx_sem ); - res = etharp_output( netif, ipaddr, p ); - FEC_DEBUG_TX_TIMING( 0 ); - return res; -} - -void -mcf523xfec_rx_task( void *arg ) -{ - mcf523xfec_if_t *fecif = arg; - struct pbuf *p, *q; - nbuf_t *pNBuf; - uint8 *pPayLoad; - - do - { - sys_sem_wait( fecif->rx_sem ); - while( nbuf_rx_next_ready( ) ) - { - pNBuf = nbuf_rx_allocate( ); - if( pNBuf != NULL ) - { - LWIP_ASSERT( "mcf523xfec_rx_task: pNBuf->status & RX_BD_L ", - pNBuf->status & RX_BD_L ); - - /* This flags indicate that the frame has been damaged. In - * this case we must update the link stats if enabled and - * remove the frame from the FEC. */ - if( pNBuf->status & ( RX_BD_LG | RX_BD_NO | RX_BD_CR | RX_BD_OV ) ) - { -#ifdef LINK_STATS - lwip_stats.link.drop++; - if( pNBuf->status & RX_BD_LG ) - { - lwip_stats.link.lenerr++; - } - else if( pNBuf->status & ( RX_BD_NO | RX_BD_OV ) ) - { - lwip_stats.link.err++; - } - else - { - lwip_stats.link.chkerr++; - } -#endif - } - else - { - /* The frame must no be valid. Perform some checks to see if the FEC - * driver is working correctly. - */ - LWIP_ASSERT( "mcf523xfec_rx_task: pNBuf->length != 0", pNBuf->length != 0 ); - p = pbuf_alloc( PBUF_RAW, pNBuf->length, PBUF_POOL ); - if( p != NULL ) - { -#if ETH_PAD_SIZE - pbuf_header( p, -ETH_PAD_SIZE ); -#endif - pPayLoad = pNBuf->data; - for( q = p; q != NULL; q = q->next ) - { - memcpy( q->payload, pPayLoad, q->len ); - pPayLoad += q->len; - } -#if ETH_PAD_SIZE - pbuf_header( p, ETH_PAD_SIZE ); -#endif - - /* Ethernet frame received. Handling it is not device - * dependent and therefore done in another function. - */ - eth_input( fecif->netif, p ); - } - } - nbuf_rx_release( pNBuf ); - - /* Tell the HW that there are new free RX buffers. */ - MCF_FEC_RDAR = 1; - } - else - { -#if LINK_STATS - lwip_stats.link.memerr++; - lwip_stats.link.drop++; -#endif - } - } - /* Set RX Debug PIN to low since handling of next frame is possible. */ - FEC_DEBUG_RX_TIMING( 0 ); - } - while( 1 ); -} - -void -eth_input( struct netif *netif, struct pbuf *p ) -{ - struct eth_hdr *eth_hdr = p->payload; - - LWIP_ASSERT( "eth_input: p != NULL ", p != NULL ); - - switch ( htons( eth_hdr->type ) ) - { - case ETHTYPE_IP: - /* Pass to ARP layer. */ - etharp_ip_input( netif, p ); - - /* Skip Ethernet header. */ - pbuf_header( p, ( s16_t ) - sizeof( struct eth_hdr ) ); - - /* Pass to network layer. */ - netif->input( p, netif ); - break; - - case ETHTYPE_ARP: - /* Pass to ARP layer. */ - etharp_arp_input( netif, ( struct eth_addr * )netif->hwaddr, p ); - break; - - default: - pbuf_free( p ); - break; - } -} - -void -mcf523xfec_rx_irq( void ) -{ - static portBASE_TYPE xNeedSwitch = pdFALSE; - - /* Workaround GCC if frame pointers are enabled. This is an ISR and - * we must not modify the stack before portENTER_SWITCHING_ISR( ) - * has been called. */ -#if _GCC_USES_FP == 1 - asm volatile ( "unlk %fp\n\t" ); -#endif - - /* This ISR can cause a context switch, so the first statement must be - * a call to the portENTER_SWITCHING_ISR() macro. - */ - portENTER_SWITCHING_ISR( ); - - /* Set Debug PIN to high to measure RX latency. */ - FEC_DEBUG_RX_TIMING( 1 ); - - /* Clear FEC RX Event from the Event Register (by writing 1) */ - if( MCF_FEC_EIR & ( MCF_FEC_EIR_RXB | MCF_FEC_EIR_RXF ) ) - { - /* Clear interrupt from EIR register immediately */ - MCF_FEC_EIR = ( MCF_FEC_EIR_RXB | MCF_FEC_EIR_RXF ); - xNeedSwitch = xSemaphoreGiveFromISR( fecif_g->rx_sem, pdFALSE ); - } - portEXIT_SWITCHING_ISR( xNeedSwitch ); -} - -void -mcf523xfec_reset( mcf523xfec_if_t * fecif ) -{ - extern void ( *__RAMVEC[] ) ( ); - - int old_ipl = asm_set_ipl( 7 ); - - /* Reset the FEC - equivalent to a hard reset */ - MCF_FEC_ECR = MCF_FEC_ECR_RESET; - - /* Wait for the reset sequence to complete */ - while( MCF_FEC_ECR & MCF_FEC_ECR_RESET ); - - /* Disable all FEC interrupts by clearing the EIMR register */ - MCF_FEC_EIMR = 0; - - /* Clear any interrupts by setting all bits in the EIR register */ - MCF_FEC_EIR = 0xFFFFFFFFUL; - - /* Configure Interrupt vectors. */ - __RAMVEC[MCF_FEC_VEC_RXF] = mcf523xfec_rx_irq; - - /* Set the source address for the controller */ - MCF_FEC_PALR = - ( fecif->self->addr[0] << 24U ) | ( fecif->self->addr[1] << 16U ) | - ( fecif->self->addr[2] << 8U ) | ( fecif->self->addr[3] << 0U ); - MCF_FEC_PAUR = ( fecif->self->addr[4] << 24U ) | ( fecif->self->addr[5] << 16U ); - - /* Initialize the hash table registers */ - MCF_FEC_IAUR = 0; - MCF_FEC_IALR = 0; - - /* Set Receive Buffer Size */ -#if RX_BUFFER_SIZE != 2048 -#error "RX_BUFFER_SIZE must be set to 2048 for safe FEC operation." -#endif - MCF_FEC_EMRBR = RX_BUFFER_SIZE - 1; - - /* Point to the start of the circular Rx buffer descriptor queue */ - MCF_FEC_ERDSR = nbuf_get_start( NBUF_RX ); - - /* Point to the start of the circular Tx buffer descriptor queue */ - MCF_FEC_ETDSR = nbuf_get_start( NBUF_TX ); - - /* Set the tranceiver interface to MII mode */ - MCF_FEC_RCR = MCF_FEC_RCR_MAX_FL( MCF_FEC_MTU ) | MCF_FEC_RCR_MII_MODE; - - /* Set MII Speed Control Register for 2.5Mhz */ - MCF_FEC_MSCR = MCF_FEC_MSCR_MII_SPEED( FSYS_2 / ( 2UL * 2500000UL ) ); - - /* Only operate in half-duplex, no heart beat control */ - MCF_FEC_TCR = 0; - - /* Enable Debug support */ - FEC_DEBUG_INIT; - FEC_DEBUG_RX_TIMING( 0 ); - FEC_DEBUG_TX_TIMING( 0 ); - ( void )asm_set_ipl( old_ipl ); -} - -void -mcf523xfec_get_mac( mcf523xfec_if_t * hw, struct eth_addr *mac ) -{ - int i; - static const struct eth_addr mac_default = { - {0x00, 0xCF, 0x52, 0x35, 0x00, 0x01} - }; - - ( void )hw; - - for( i = 0; i < ETH_ADDR_LEN; i++ ) - { - mac->addr[i] = mac_default.addr[i]; - } -} - -void -mcf523xfec_enable( mcf523xfec_if_t * fecif ) -{ - ( void )fecif; - - int old_ipl = asm_set_ipl( 7 ); - - /* Configure I/O pins for the FEC. */ - MCF_GPIO_PAR_FECI2C = ( MCF_GPIO_PAR_FECI2C_PAR_EMDC_FEC | MCF_GPIO_PAR_FECI2C_PAR_EMDIO_FEC ); - - /* Allow interrupts by setting IMR register */ - MCF_FEC_EIMR = MCF_FEC_EIMR_RXF; - - /* Configure the interrupt controller. */ - MCF_INTC0_ICR27 = ( MCF_INTC0_ICRn_IL( MCF_FEC_INT_LEVEL ) | - MCF_INTC0_ICRn_IP( MCF_FEC_INT_PRIORITY ) ); - MCF_INTC0_IMRL &= ~( MCF_INTC0_IMRL_INT_MASK27 | MCF_INTC0_IMRL_MASKALL ); - - /* Enable FEC */ - MCF_FEC_ECR = MCF_FEC_ECR_ETHER_EN; - - /* Indicate that there have been empty receive buffers produced */ - MCF_FEC_RDAR = 1; - ( void )asm_set_ipl( old_ipl ); -} - -void -mcf523xfec_disable( mcf523xfec_if_t * fecif ) -{ - ( void )fecif; - - int old_ipl = asm_set_ipl( 7 ); - - /* Set the Graceful Transmit Stop bit */ - MCF_FEC_TCR = ( MCF_FEC_TCR | MCF_FEC_TCR_GTS ); - - /* Wait for the current transmission to complete */ - while( !( MCF_FEC_EIR & MCF_FEC_EIR_GRA ) ); - - /* Clear the GRA event */ - MCF_FEC_EIR = MCF_FEC_EIR_GRA; - - /* Disable the FEC */ - MCF_FEC_ECR = 0; - - /* Disable all FEC interrupts by clearing the IMR register */ - MCF_FEC_EIMR = 0; - - /* Unconfigure the interrupt controller. */ - MCF_INTC0_ICR27 = MCF_INTC0_ICRn_IL( 0 ) | MCF_INTC0_ICRn_IP( 0 ); - MCF_INTC0_IMRL |= MCF_INTC0_IMRL_INT_MASK27; - - /* Clear the GTS bit so frames can be tranmitted when restarted */ - MCF_FEC_TCR = ( MCF_FEC_TCR & ~MCF_FEC_TCR_GTS ); - - /* Disable I/O pins used by the FEC. */ - MCF_GPIO_PAR_FECI2C &= ~( MCF_GPIO_PAR_FECI2C_PAR_EMDC_FEC | - MCF_GPIO_PAR_FECI2C_PAR_EMDIO_FEC ); - ( void )asm_set_ipl( old_ipl ); -} - -err_t -mcf523xfec_init( struct netif *netif ) -{ - err_t res; - - mcf523xfec_if_t *fecif = mem_malloc( sizeof( mcf523xfec_if_t ) ); - - if( fecif != NULL ) - { - /* Global copy used in ISR. */ - fecif_g = fecif; - fecif->self = ( struct eth_addr * )&netif->hwaddr[0]; - fecif->netif = netif; - fecif->tx_sem = NULL; - fecif->rx_sem = NULL; - - if( ( fecif->tx_sem = sys_sem_new( 1 ) ) == NULL ) - { - res = ERR_MEM; - } - else if( ( fecif->rx_sem = sys_sem_new( 0 ) ) == NULL ) - { - res = ERR_MEM; - } - else if( sys_thread_new( mcf523xfec_rx_task, fecif, TASK_PRIORITY ) == NULL ) - { - res = ERR_MEM; - } - else - { - netif->state = fecif; - netif->name[0] = 'C'; - netif->name[1] = 'F'; - netif->hwaddr_len = ETH_ADDR_LEN; - netif->mtu = MCF_FEC_MTU; - netif->flags = NETIF_FLAG_BROADCAST; - netif->output = mcf523xfec_output; - netif->linkoutput = mcf523xfec_output_raw; - - nbuf_init( ); - mcf523xfec_get_mac( fecif, fecif->self ); - mcf523xfec_reset( fecif ); - mcf523xfec_enable( fecif ); - - etharp_init( ); - sys_timeout( ARP_TMR_INTERVAL, arp_timer, NULL ); - - res = ERR_OK; - } - - if( res != ERR_OK ) - { - free( fecif ); - if( fecif->tx_sem != NULL ) - { - mem_free( fecif->tx_sem ); - } - if( fecif->rx_sem != NULL ) - { - mem_free( fecif->rx_sem ); - } - } - } - else - { - res = ERR_MEM; - } - - return res; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/netif/fec.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/netif/fec.h deleted file mode 100644 index 1495b9ec..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/netif/fec.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (c) 2006 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * Author: Christian Walter - * - * File: $Id$ - */ - -#ifndef _FEC_H -#define _FEC_H - -/* ------------------------ Defines --------------------------------------- */ - -/* ------------------------ Prototypes ------------------------------------ */ -err_t mcf523xfec_init( struct netif * netif ); - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/netif/nbuf.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/netif/nbuf.c deleted file mode 100644 index 8cea55f2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/netif/nbuf.c +++ /dev/null @@ -1,212 +0,0 @@ -/* - * Copyright (c) 2006 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * Note: Most of the network buffer code is based on the MCF5235 examples from - * Freescale. - * - * File: $Id$ - */ - -/* ------------------------ Platform includes ----------------------------- */ -#include "mcf5xxx.h" -#include "mcf523x.h" - -#include "nbuf.h" - -/* ------------------------ Static variables ------------------------------ */ - -/* Buffer descriptor indexes */ -static uint8 tx_bd_idx; -static uint8 rx_bd_idx; - -/* Buffer Descriptors -- must be aligned on a 4-byte boundary but a - * 16-byte boundary is recommended. */ -static nbuf_t tx_nbuf[sizeof( nbuf_t ) * NUM_TXBDS] ATTR_FECMEM; -static nbuf_t rx_nbuf[sizeof( nbuf_t ) * NUM_RXBDS] ATTR_FECMEM; - -/* Data Buffers -- must be aligned on a 16-byte boundary. */ -static uint8 tx_buf[TX_BUFFER_SIZE * NUM_TXBDS] ATTR_FECMEM; -static uint8 rx_buf[RX_BUFFER_SIZE * NUM_RXBDS] ATTR_FECMEM; - -/* ------------------------ Start implementation -------------------------- */ -void -nbuf_init( ) -{ - - uint8 i; - - /* Initialize receive descriptor ring */ - for( i = 0; i < NUM_RXBDS; i++ ) - { - rx_nbuf[i].status = RX_BD_E; - rx_nbuf[i].length = 0; - rx_nbuf[i].data = &rx_buf[i * RX_BUFFER_SIZE]; - } - - /* Set the Wrap bit on the last one in the ring */ - rx_nbuf[NUM_RXBDS - 1].status |= RX_BD_W; - - /* Initialize transmit descriptor ring */ - for( i = 0; i < NUM_TXBDS; i++ ) - { - tx_nbuf[i].status = TX_BD_L | TX_BD_TC; - tx_nbuf[i].length = 0; - tx_nbuf[i].data = &tx_buf[i * TX_BUFFER_SIZE]; - } - - /* Set the Wrap bit on the last one in the ring */ - tx_nbuf[NUM_TXBDS - 1].status |= TX_BD_W; - - /* Initialize the buffer descriptor indexes */ - tx_bd_idx = rx_bd_idx = 0; - - return; -} - - -/********************************************************************/ -uint32 -nbuf_get_start( uint8 direction ) -{ - /* - * Return the address of the first buffer descriptor in the ring. - * This routine is needed by the FEC of the MPC860T , MCF5282, and MCF523x - * in order to write the Rx/Tx descriptor ring start registers - */ - switch ( direction ) - { - case NBUF_RX: - return ( uint32 ) rx_nbuf; - case NBUF_TX: - default: - return ( uint32 ) tx_nbuf; - } -} - - -/********************************************************************/ -nbuf_t * -nbuf_rx_allocate( ) -{ - /* This routine alters shared data. Disable interrupts! */ - int old_ipl = asm_set_ipl( 6 ); - - /* Return a pointer to the next empty Rx Buffer Descriptor */ - int i = rx_bd_idx; - - - /* Check to see if the ring of BDs is full */ - if( rx_nbuf[i].status & RX_BD_INUSE ) - return NULL; - - /* Mark the buffer as in use */ - rx_nbuf[i].status |= RX_BD_INUSE; - - /* increment the circular index */ - rx_bd_idx = ( uint8 ) ( ( rx_bd_idx + 1 ) % NUM_RXBDS ); - - /* Restore previous IPL */ - asm_set_ipl( old_ipl ); - - return &rx_nbuf[i]; -} - - -/********************************************************************/ -nbuf_t * -nbuf_tx_allocate( ) -{ - /* This routine alters shared data. Disable interrupts! */ - int old_ipl = asm_set_ipl( 6 ); - - /* Return a pointer to the next empty Tx Buffer Descriptor */ - int i = tx_bd_idx; - - /* Check to see if ring of BDs is full */ - if( ( tx_nbuf[i].status & TX_BD_INUSE ) || ( tx_nbuf[i].status & TX_BD_R ) ) - return NULL; - - /* Mark the buffer as Ready (in use) */ - /* FEC must set R bit in transmit routine */ - tx_nbuf[i].status |= TX_BD_INUSE; - - /* increment the circular index */ - tx_bd_idx = ( uint8 ) ( ( tx_bd_idx + 1 ) % NUM_TXBDS ); - - /* Restore previous IPL */ - asm_set_ipl( old_ipl ); - - return &tx_nbuf[i]; -} - - -/********************************************************************/ -void -nbuf_rx_release( nbuf_t * pNbuf ) -{ - /* This routine alters shared data. Disable interrupts! */ - int old_ipl = asm_set_ipl( 6 ); - - /* Mark the buffer as empty and not in use */ - pNbuf->status |= RX_BD_E; - pNbuf->status &= ~RX_BD_INUSE; - - /* Restore previous IPL */ - asm_set_ipl( old_ipl ); -} - -/********************************************************************/ -void -nbuf_tx_release( nbuf_t * pNbuf ) -{ - /* This routine alters shared data. Disable interrupts! */ - int old_ipl = asm_set_ipl( 6 ); - - /* Mark the buffer as not in use */ - pNbuf->status &= ~TX_BD_INUSE; - - /* Restore previous IPL */ - asm_set_ipl( old_ipl ); -} - -/********************************************************************/ -int -nbuf_rx_next_ready( ) -{ - /**************************************************************** - This function checks the EMPTY bit of the next Rx buffer to be - allocated. If the EMPTY bit is cleared, then the next buffer in - the ring has been filled by the FEC and has not already been - allocated and passed up the stack. In this case, the next buffer - in the ring is ready to be allocated. Otherwise, the buffer is - either empty or not empty but still in use by a higher level - protocol. The FEC receive routine uses this function to determine - if multiple buffers where filled by the FEC during a single - interrupt event. - ****************************************************************/ - - return ( !( rx_nbuf[rx_bd_idx].status & RX_BD_E ) ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/netif/nbuf.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/netif/nbuf.h deleted file mode 100644 index fb8c1091..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/netif/nbuf.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright (c) 2006 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * Note: Most of the network buffer code is based on the MCF5235 examples from - * Freescale. - * - * File: $Id$ - */ - -#ifndef _NBUF_H -#define _NBUF_H - -/* ------------------------ Defines --------------------------------------- */ - -#ifdef __GNUC__ -#define ATTR_FECMEM \ - __attribute__((section(".nbuf"),aligned(16))) -#endif - -#define NBUF_RX ( 1 ) -#define NBUF_TX ( 0 ) - -/* We set the receiver buffers to the maximum size the FEC supports ( See - * MCF5235 reference manual 19.2.5.1.2 - Driver/DMA Operation with Receive - * BDs). This gives us the benefit that any frame fits into one buffer. A - * maximum size of 2047 is guaranteed by the FEC and 2048 is therefore a - * safe value. - * Note: The value MUST be dividable by 16! - */ -#define RX_BUFFER_SIZE ( 2048 ) - -/* Size of the transmit buffers. If you set this value to small all frames - * greater than this size will be dropped. The value 1520 was choosen because - * it is bigger than the FEC MTU (1518) and is dividable by 16. - * Note: The value MUST be dividable by 16! */ -#define TX_BUFFER_SIZE ( 1520 ) - -/* Number of Receive and Transmit Buffers and Buffer Descriptors */ -#define NUM_RXBDS ( 8 ) -#define NUM_TXBDS ( 4 ) - -/* ------------------------ Defines ( Buffer Descriptor Flags )------------ */ - -#define TX_BD_R ( 0x8000 ) -#define TX_BD_INUSE ( 0x4000 ) -#define TX_BD_TO1 ( 0x4000 ) -#define TX_BD_W ( 0x2000 ) -#define TX_BD_TO2 ( 0x1000 ) -#define TX_BD_L ( 0x0800 ) -#define TX_BD_TC ( 0x0400 ) -#define TX_BD_DEF ( 0x0200 ) -#define TX_BD_HB ( 0x0100 ) -#define TX_BD_LC ( 0x0080 ) -#define TX_BD_RL ( 0x0040 ) -#define TX_BD_UN ( 0x0002 ) -#define TX_BD_CSL ( 0x0001 ) - -#define RX_BD_E ( 0x8000 ) -#define RX_BD_INUSE ( 0x4000 ) -#define RX_BD_R01 ( 0x4000 ) -#define RX_BD_W ( 0x2000 ) -#define RX_BD_R02 ( 0x1000 ) -#define RX_BD_L ( 0x0800 ) -#define RX_BD_M ( 0x0100 ) -#define RX_BD_BC ( 0x0080 ) -#define RX_BD_MC ( 0x0040 ) -#define RX_BD_LG ( 0x0020 ) -#define RX_BD_NO ( 0x0010 ) -#define RX_BD_SH ( 0x0008 ) -#define RX_BD_CR ( 0x0004 ) -#define RX_BD_OV ( 0x0002 ) -#define RX_BD_TR ( 0x0001 ) - -/* ------------------------ Type definitions ------------------------------ */ -typedef struct -{ - uint16 status; /* control and status */ - uint16 length; /* transfer length */ - uint8 *data; /* buffer address */ -} nbuf_t; - -/* ------------------------ Prototypes ------------------------------------ */ - -void nbuf_init( void ); -uint32 nbuf_get_start( uint8 ); -nbuf_t *nbuf_rx_allocate( void ); -nbuf_t *nbuf_tx_allocate( void ); -void nbuf_rx_release( nbuf_t * ); -void nbuf_tx_release( nbuf_t * ); -int nbuf_rx_next_ready( void ); - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/sys_arch.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/sys_arch.c deleted file mode 100644 index 9c1abb0d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/contrib/port/FreeRTOS/MCF5235/sys_arch.c +++ /dev/null @@ -1,562 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * Modifications Copyright (c) 2006 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * Modifcations: Christian Walter - * - * $Id$ - */ - -/* ------------------------ System includes ------------------------------- */ -#include -#include -#include -#include - -/* ------------------------ FreeRTOS includes ----------------------------- */ -#include "FreeRTOS.h" -#include "task.h" -#include "serial.h" -#include "semphr.h" - -/* ------------------------ lwIP includes --------------------------------- */ -#include "lwip/debug.h" -#include "lwip/def.h" -#include "lwip/sys.h" -#include "lwip/mem.h" -#include "lwip/stats.h" - -/* ------------------------ Defines --------------------------------------- */ -/* This is the number of threads that can be started with sys_thead_new() */ -#define SYS_MBOX_SIZE ( 16 ) -#define MS_TO_TICKS( ms ) \ - ( portTickType )( ( portTickType ) ( ms ) / portTICK_RATE_MS ) -#define TICKS_TO_MS( ticks ) \ - ( unsigned portLONG )( ( portTickType ) ( ticks ) * portTICK_RATE_MS ) -#define THREAD_STACK_SIZE ( 1024 ) -#define THREAD_NAME "lwIP" - -/* Must hold the string THREAD_NAME + task number + terminating '\0'. */ -#define THREAD_NAME_LEN_MAX 6 - -#define THREAD_INIT( tcb ) \ - do { \ - tcb->next = NULL; \ - tcb->pid = ( xTaskHandle )0; \ - tcb->timeouts.next = NULL; \ - memset( tcb->name, 0, THREAD_NAME_LEN_MAX ); \ - } while( 0 ) - -/* ------------------------ Type definitions ------------------------------ */ -typedef struct sys_tcb -{ - struct sys_tcb *next; - struct sys_timeouts timeouts; - xTaskHandle pid; - char name[THREAD_NAME_LEN_MAX]; -} sys_tcb_t; - -/* ------------------------ Static functions ------------------------------ */ -sys_tcb_t *sys_thread_current( void ); - -/* ------------------------ Static variables ------------------------------ */ -static sys_tcb_t *tasks = NULL; - -/* ------------------------ Start implementation -------------------------- */ -void -sys_init( void ) -{ - LWIP_ASSERT( "sys_init: not called first\r\n", tasks == NULL ); - tasks = NULL; -} - -/* - * This optional function does a "fast" critical region protection and returns - * the previous protection level. This function is only called during very short - * critical regions. An embedded system which supports ISR-based drivers might - * want to implement this function by disabling interrupts. Task-based systems - * might want to implement this by using a mutex or disabling tasking. This - * function should support recursive calls from the same task or interrupt. In - * other words, sys_arch_protect() could be called while already protected. In - * that case the return value indicates that it is already protected. - * - * sys_arch_protect() is only required if your port is supporting an operating - * system. - */ -sys_prot_t -sys_arch_protect( void ) -{ - vPortEnterCritical( ); - return 1; -} - -/* - * This optional function does a "fast" set of critical region protection to the - * value specified by pval. See the documentation for sys_arch_protect() for - * more information. This function is only required if your port is supporting - * an operating system. - */ -void -sys_arch_unprotect( sys_prot_t pval ) -{ - ( void )pval; - vPortExitCritical( ); -} - -/* - * Prints an assertion messages and aborts execution. - */ -void -sys_assert( const char *msg ) -{ - ( void )fputs( msg, stderr ); - ( void )fputs( "\n\r", stderr ); - exit( EXIT_FAILURE ); -} - -void -sys_debug( const char *const fmt, ... ) -{ - va_list ap; - - va_start( ap, fmt ); - ( void )vprintf( fmt, ap ); - ( void )putc( '\r', stdout ); - fflush( stdout ); - - va_end( ap ); -} - -/* ------------------------ Start implementation ( Threads ) -------------- */ - -sys_thread_t -sys_thread_new( void ( *thread ) ( void *arg ), void *arg, int prio ) -{ - return sys_arch_thread_new( thread, arg, prio, THREAD_STACK_SIZE ); -} - -/* - * Starts a new thread with priority "prio" that will begin its execution in the - * function "thread()". The "arg" argument will be passed as an argument to the - * thread() function. The argument "ssize" is the requested stack size for the - * new thread. The id of the new thread is returned. Both the id and the - * priority are system dependent. - */ -sys_thread_t -sys_arch_thread_new( void ( *thread ) ( void *arg ), void *arg, int prio, size_t ssize ) -{ - sys_thread_t thread_hdl = SYS_THREAD_NULL; - int i; - sys_tcb_t *p; - - /* We disable the FreeRTOS scheduler because it might be the case that the new - * tasks gets scheduled inside the xTaskCreate function. To prevent this we - * disable the scheduling. Note that this can happen although we have interrupts - * disabled because xTaskCreate contains a call to taskYIELD( ). - */ - vPortEnterCritical( ); - - p = tasks; - i = 0; - /* We are called the first time. Initialize it. */ - if( p == NULL ) - { - p = pvPortMalloc( sizeof( sys_tcb_t ) ); - if( p != NULL ) - { - tasks = p; - } - } - else - { - /* First task already counter. */ - i++; - /* Cycle to the end of the list. */ - while( p->next != NULL ) - { - i++; - p = p->next; - } - p->next = pvPortMalloc( sizeof( sys_tcb_t ) ); - p = p->next; - } - - if( p != NULL ) - { - /* Memory allocated. Initialize the data structure. */ - THREAD_INIT( p ); - ( void )snprintf( p->name, THREAD_NAME_LEN_MAX, "lwIP%d", i ); - - /* Now q points to a free element in the list. */ - if( xTaskCreate( thread, p->name, ssize, arg, prio, &p->pid ) == pdPASS ) - { - thread_hdl = p; - } - else - { - vPortFree( p ); - } - } - - vPortExitCritical( ); - return thread_hdl; -} - -void -sys_arch_thread_remove( sys_thread_t hdl ) -{ - sys_tcb_t *current = tasks, *prev; - sys_tcb_t *toremove = hdl; - xTaskHandle pid = ( xTaskHandle ) 0; - - LWIP_ASSERT( "sys_arch_thread_remove: assertion hdl != NULL failed!", hdl != NULL ); - - /* If we have to remove the first task we must update the global "tasks" - * variable. */ - vPortEnterCritical( ); - if( hdl != NULL ) - { - prev = NULL; - while( ( current != NULL ) && ( current != toremove ) ) - { - prev = current; - current = current->next; - } - /* Found it. */ - if( current == toremove ) - { - /* Not the first entry in the list. */ - if( prev != NULL ) - { - prev->next = toremove->next; - } - else - { - tasks = toremove->next; - } - LWIP_ASSERT( "sys_arch_thread_remove: can't remove thread with timeouts!", - toremove->timeouts.next == NULL ); - pid = toremove->pid; - THREAD_INIT( toremove ); - vPortFree( toremove ); - } - } - /* We are done with accessing the shared datastructure. Release the - * resources. - */ - vPortExitCritical( ); - if( pid != ( xTaskHandle ) 0 ) - { - vTaskDelete( pid ); - /* not reached. */ - } -} - -/* - * Returns the thread control block for the currently active task. In case - * of an error the functions returns NULL. - */ -sys_thread_t -sys_arch_thread_current( void ) -{ - sys_tcb_t *p = tasks; - xTaskHandle pid = xTaskGetCurrentTaskHandle( ); - - vPortEnterCritical( ); - while( ( p != NULL ) && ( p->pid != pid ) ) - { - p = p->next; - } - vPortExitCritical( ); - return p; -} - -/* - * Returns a pointer to the per-thread sys_timeouts structure. In lwIP, - * each thread has a list of timeouts which is represented as a linked - * list of sys_timeout structures. The sys_timeouts structure holds a - * pointer to a linked list of timeouts. This function is called by - * the lwIP timeout scheduler and must not return a NULL value. - * - * In a single threaded sys_arch implementation, this function will - * simply return a pointer to a global sys_timeouts variable stored in - * the sys_arch module. - */ -struct sys_timeouts * -sys_arch_timeouts( void ) -{ - sys_tcb_t *ptask; - - ptask = sys_arch_thread_current( ); - LWIP_ASSERT( "sys_arch_timeouts: ptask != NULL", ptask != NULL ); - return ptask != NULL ? &( ptask->timeouts ) : NULL; -} - -/* ------------------------ Start implementation ( Semaphores ) ----------- */ - -/* Creates and returns a new semaphore. The "count" argument specifies - * the initial state of the semaphore. - */ -sys_sem_t -sys_sem_new( u8_t count ) -{ - xSemaphoreHandle xSemaphore; - - vSemaphoreCreateBinary( xSemaphore ); - if( xSemaphore != SYS_SEM_NULL ) - { - if( count == 0 ) - { - xSemaphoreTake( xSemaphore, 1 ); - } -#ifdef SYS_STATS - vPortEnterCritical( ); - lwip_stats.sys.sem.used++; - if( lwip_stats.sys.sem.used > lwip_stats.sys.sem.max ) - { - lwip_stats.sys.sem.max = lwip_stats.sys.sem.used; - } - vPortExitCritical( ); -#endif - } - else - { - LWIP_ASSERT( "sys_sem_new: xSemaphore == SYS_SEM_NULL\n", xSemaphore != SYS_SEM_NULL ); - } - - return xSemaphore; -} - -/* Deallocates a semaphore */ -void -sys_sem_free( sys_sem_t sem ) -{ - LWIP_ASSERT( "sys_sem_free: sem != SYS_SEM_NULL\n", sem != SYS_SEM_NULL ); - if( sem != SYS_SEM_NULL ) - { -#ifdef SYS_STATS - vPortEnterCritical( ); - lwip_stats.sys.sem.used--; - vPortExitCritical( ); -#endif - vQueueDelete( sem ); - } -} - -/* Signals a semaphore */ -void -sys_sem_signal( sys_sem_t sem ) -{ - LWIP_ASSERT( "sys_sem_signal: sem != SYS_SEM_NULL\n", sem != SYS_SEM_NULL ); - xSemaphoreGive( sem ); -} - -/* - * Blocks the thread while waiting for the semaphore to be - * signaled. If the "timeout" argument is non-zero, the thread should - * only be blocked for the specified time (measured in - * milliseconds). - * - * If the timeout argument is non-zero, the return value is the number of - * milliseconds spent waiting for the semaphore to be signaled. If the - * semaphore wasn't signaled within the specified time, the return value is - * SYS_ARCH_TIMEOUT. If the thread didn't have to wait for the semaphore - * (i.e., it was already signaled), the function may return zero. - * - * Notice that lwIP implements a function with a similar name, - * sys_sem_wait(), that uses the sys_arch_sem_wait() function. - */ -u32_t -sys_arch_sem_wait( sys_sem_t sem, u32_t timeout ) -{ - portBASE_TYPE xStatus; - portTickType xTicksStart, xTicksEnd, xTicksElapsed; - u32_t timespent; - - LWIP_ASSERT( "sys_arch_sem_wait: sem != SYS_SEM_NULL", sem != SYS_SEM_NULL ); - xTicksStart = xTaskGetTickCount( ); - if( timeout == 0 ) - { - do - { - xStatus = xSemaphoreTake( sem, MS_TO_TICKS( 100 ) ); - } - while( xStatus != pdTRUE ); - } - else - { - xStatus = xSemaphoreTake( sem, MS_TO_TICKS( timeout ) ); - } - - /* Semaphore was signaled. */ - if( xStatus == pdTRUE ) - { - xTicksEnd = xTaskGetTickCount( ); - xTicksElapsed = xTicksEnd - xTicksStart; - timespent = TICKS_TO_MS( xTicksElapsed ); - } - else - { - timespent = SYS_ARCH_TIMEOUT; - } - return timespent; -} - - -/* ------------------------ Start implementation ( Mailboxes ) ------------ */ - -/* Creates an empty mailbox. */ -sys_mbox_t -sys_mbox_new( void ) -{ - xQueueHandle mbox; - - mbox = xQueueCreate( SYS_MBOX_SIZE, sizeof( void * ) ); - if( mbox != SYS_MBOX_NULL ) - { -#ifdef SYS_STATS - vPortEnterCritical( ); - lwip_stats.sys.mbox.used++; - if( lwip_stats.sys.mbox.used > lwip_stats.sys.mbox.max ) - { - lwip_stats.sys.mbox.max = lwip_stats.sys.mbox.used; - } - vPortExitCritical( ); -#endif - } - return mbox; -} - -/* - Deallocates a mailbox. If there are messages still present in the - mailbox when the mailbox is deallocated, it is an indication of a - programming error in lwIP and the developer should be notified. -*/ -void -sys_mbox_free( sys_mbox_t mbox ) -{ - void *msg; - - LWIP_ASSERT( "sys_mbox_free: mbox != SYS_MBOX_NULL", mbox != SYS_MBOX_NULL ); - if( mbox != SYS_MBOX_NULL ) - { - while( uxQueueMessagesWaiting( mbox ) != 0 ) - { - if( sys_arch_mbox_fetch( mbox, &msg, 1 ) != SYS_ARCH_TIMEOUT ) - { - LWIP_ASSERT( "sys_mbox_free: memory leak (msg != NULL)", msg == NULL ); - } - } - vQueueDelete( mbox ); -#ifdef SYS_STATS - vPortEnterCritical( ); - lwip_stats.sys.mbox.used--; - vPortExitCritical( ); -#endif - } -} - -/* - * This function sends a message to a mailbox. It is unusual in that no error - * return is made. This is because the caller is responsible for ensuring that - * the mailbox queue will not fail. The caller does this by limiting the number - * of msg structures which exist for a given mailbox. - */ -void -sys_mbox_post( sys_mbox_t mbox, void *data ) -{ - portBASE_TYPE xQueueSent; - - /* Queue must not be full - Otherwise it is an error. */ - xQueueSent = xQueueSend( mbox, &data, 0 ); - LWIP_ASSERT( "sys_mbox_post: xQueueSent == pdPASS", xQueueSent == pdPASS ); -} - -/* - * Blocks the thread until a message arrives in the mailbox, but does - * not block the thread longer than "timeout" milliseconds (similar to - * the sys_arch_sem_wait() function). The "msg" argument is a result - * parameter that is set by the function (i.e., by doing "*msg = - * ptr"). The "msg" parameter maybe NULL to indicate that the message - * should be dropped. - * - * Note that a function with a similar name, sys_mbox_fetch(), is - * implemented by lwIP. - */ -u32_t -sys_arch_mbox_fetch( sys_mbox_t mbox, void **msg, u32_t timeout ) -{ - void *ret_msg; - portBASE_TYPE xStatus; - portTickType xTicksStart, xTicksEnd, xTicksElapsed; - u32_t timespent; - - LWIP_ASSERT( "sys_arch_mbox_fetch: mbox != SYS_MBOX_NULL", mbox != SYS_MBOX_NULL ); - xTicksStart = xTaskGetTickCount( ); - if( timeout == 0 ) - { - do - { - xStatus = xQueueReceive( mbox, &ret_msg, MS_TO_TICKS( 100 ) ); - } - while( xStatus != pdTRUE ); - } - else - { - xStatus = xQueueReceive( mbox, &ret_msg, MS_TO_TICKS( timeout ) ); - } - - if( xStatus == pdTRUE ) - { - if( msg ) - { - *msg = ret_msg; - } - xTicksEnd = xTaskGetTickCount( ); - xTicksElapsed = xTicksEnd - xTicksStart; - timespent = TICKS_TO_MS( xTicksElapsed ); - } - else - { - if( msg ) - { - *msg = NULL; - } - timespent = SYS_ARCH_TIMEOUT; - } - return timespent; -} - -unsigned long -sys_jiffies( void ) -{ - portTickType xTicks = xTaskGetTickCount( ); - - return ( unsigned long )TICKS_TO_MS( xTicks ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/doc/contrib.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/doc/contrib.txt deleted file mode 100644 index 7c99b9be..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/doc/contrib.txt +++ /dev/null @@ -1,62 +0,0 @@ -1 Introduction - -This document describes some guidelines for people participating -in lwIP development. - -2 How to contribute to lwIP - -Here is a short list of suggestions to anybody working with lwIP and -trying to contribute bug reports, fixes, enhancements, platform ports etc. -First of all as you may already know lwIP is a volunteer project so feedback -to fixes or questions might often come late. Hopefully the bug and patch tracking -features of Savannah help us not lose users' input. - -2.1 Source code style: - -1. do not use tabs. -2. indentation is two spaces per level (i.e. per tab). -3. end debug messages with a trailing newline (\n). -4. one space between keyword and opening bracket. -5. no space between function and opening bracket. -6. one space and no newline before opening curly braces of a block. -7. closing curly brace on a single line. -8. spaces surrounding assignment and comparisons. -9. use current source code style as further reference. - -2.2 Source code documentation style: - -1. JavaDoc compliant and Doxygen compatible. -2. Function documentation above functions in .c files, not .h files. - (This forces you to synchronize documentation and implementation.) -3. Use current documentation style as further reference. - -2.3 Bug reports and patches: - -1. Make sure you are reporting bugs or send patches against the latest - sources. (From the latest release and/or the current CVS sources.) -2. If you think you found a bug make sure it's not already filed in the - bugtracker at Savannah. -3. If you have a fix put the patch on Savannah. If it is a patch that affects - both core and arch specific stuff please separate them so that the core can - be applied separately while leaving the other patch 'open'. The prefered way - is to NOT touch archs you can't test and let maintainers take care of them. - This is a good way to see if they are used at all - the same goes for unix - netifs except tapif. -4. Do not file a bug and post a fix to it to the patch area. Either a bug report - or a patch will be enough. - If you correct an existing bug then attach the patch to the bug rather than creating a new entry in the patch area. -5. Trivial patches (compiler warning, indentation and spelling fixes or anything obvious which takes a line or two) - can go to the lwip-users list. This is still the fastest way of interaction and the list is not so crowded - as to allow for loss of fixes. Putting bugs on Savannah and subsequently closing them is too much an overhead - for reporting a compiler warning fix. -6. Patches should be specific to a single change or to related changes.Do not mix bugfixes with spelling and other - trivial fixes unless the bugfix is trivial too.Do not reorganize code and rename identifiers in the same patch you - change behaviour if not necessary.A patch is easier to read and understand if it's to the point and short than - if it's not to the point and long :) so the chances for it to be applied are greater. - -2.4 Platform porters: - -1. If you have ported lwIP to a platform (an OS, a uC/processor or a combination of these) and - you think it could benefit others[1] you might want discuss this on the mailing list. You - can also ask for CVS access to submit and maintain your port in the contrib CVS module. - \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/doc/rawapi.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/doc/rawapi.txt deleted file mode 100644 index f84e0d2e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/doc/rawapi.txt +++ /dev/null @@ -1,386 +0,0 @@ -Raw TCP/IP interface for lwIP - -Authors: Adam Dunkels, Leon Woestenberg, Christiaan Simons - -lwIP provides two Application Program's Interfaces (APIs) for programs -to use for communication with the TCP/IP code: -* low-level "core" / "callback" or "raw" API. -* higher-level "sequential" API. - -The sequential API provides a way for ordinary, sequential, programs -to use the lwIP stack. It is quite similar to the BSD socket API. The -model of execution is based on the blocking open-read-write-close -paradigm. Since the TCP/IP stack is event based by nature, the TCP/IP -code and the application program must reside in different execution -contexts (threads). - -** The remainder of this document discusses the "raw" API. ** - -The raw TCP/IP interface allows the application program to integrate -better with the TCP/IP code. Program execution is event based by -having callback functions being called from within the TCP/IP -code. The TCP/IP code and the application program both run in the same -thread. The sequential API has a much higher overhead and is not very -well suited for small systems since it forces a multithreaded paradigm -on the application. - -The raw TCP/IP interface is not only faster in terms of code execution -time but is also less memory intensive. The drawback is that program -development is somewhat harder and application programs written for -the raw TCP/IP interface are more difficult to understand. Still, this -is the preferred way of writing applications that should be small in -code size and memory usage. - -Both APIs can be used simultaneously by different application -programs. In fact, the sequential API is implemented as an application -program using the raw TCP/IP interface. - ---- Callbacks - -Program execution is driven by callbacks. Each callback is an ordinary -C function that is called from within the TCP/IP code. Every callback -function is passed the current TCP or UDP connection state as an -argument. Also, in order to be able to keep program specific state, -the callback functions are called with a program specified argument -that is independent of the TCP/IP state. - -The function for setting the application connection state is: - -- void tcp_arg(struct tcp_pcb *pcb, void *arg) - - Specifies the program specific state that should be passed to all - other callback functions. The "pcb" argument is the current TCP - connection control block, and the "arg" argument is the argument - that will be passed to the callbacks. - - ---- TCP connection setup - -The functions used for setting up connections is similar to that of -the sequential API and of the BSD socket API. A new TCP connection -identifier (i.e., a protocol control block - PCB) is created with the -tcp_new() function. This PCB can then be either set to listen for new -incoming connections or be explicitly connected to another host. - -- struct tcp_pcb *tcp_new(void) - - Creates a new connection identifier (PCB). If memory is not - available for creating the new pcb, NULL is returned. - -- err_t tcp_bind(struct tcp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port) - - Binds the pcb to a local IP address and port number. The IP address - can be specified as IP_ADDR_ANY in order to bind the connection to - all local IP addresses. - - If another connection is bound to the same port, the function will - return ERR_USE, otherwise ERR_OK is returned. - -- struct tcp_pcb *tcp_listen(struct tcp_pcb *pcb) - - Commands a pcb to start listening for incoming connections. When an - incoming connection is accepted, the function specified with the - tcp_accept() function will be called. The pcb will have to be bound - to a local port with the tcp_bind() function. - - The tcp_listen() function returns a new connection identifier, and - the one passed as an argument to the function will be - deallocated. The reason for this behavior is that less memory is - needed for a connection that is listening, so tcp_listen() will - reclaim the memory needed for the original connection and allocate a - new smaller memory block for the listening connection. - - tcp_listen() may return NULL if no memory was available for the - listening connection. If so, the memory associated with the pcb - passed as an argument to tcp_listen() will not be deallocated. - -- void tcp_accept(struct tcp_pcb *pcb, - err_t (* accept)(void *arg, struct tcp_pcb *newpcb, - err_t err)) - - Specified the callback function that should be called when a new - connection arrives on a listening connection. - -- err_t tcp_connect(struct tcp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port, err_t (* connected)(void *arg, - struct tcp_pcb *tpcb, - err_t err)); - - Sets up the pcb to connect to the remote host and sends the - initial SYN segment which opens the connection. - - The tcp_connect() function returns immediately; it does not wait for - the connection to be properly setup. Instead, it will call the - function specified as the fourth argument (the "connected" argument) - when the connection is established. If the connection could not be - properly established, either because the other host refused the - connection or because the other host didn't answer, the "connected" - function will be called with an the "err" argument set accordingly. - - The tcp_connect() function can return ERR_MEM if no memory is - available for enqueueing the SYN segment. If the SYN indeed was - enqueued successfully, the tcp_connect() function returns ERR_OK. - - ---- Sending TCP data - -TCP data is sent by enqueueing the data with a call to -tcp_write(). When the data is successfully transmitted to the remote -host, the application will be notified with a call to a specified -callback function. - -- err_t tcp_write(struct tcp_pcb *pcb, void *dataptr, u16_t len, - u8_t copy) - - Enqueues the data pointed to by the argument dataptr. The length of - the data is passed as the len parameter. The copy argument is either - 0 or 1 and indicates whether the new memory should be allocated for - the data to be copied into. If the argument is 0, no new memory - should be allocated and the data should only be referenced by - pointer. - - The tcp_write() function will fail and return ERR_MEM if the length - of the data exceeds the current send buffer size or if the length of - the queue of outgoing segment is larger than the upper limit defined - in lwipopts.h. The number of bytes available in the output queue can - be retrieved with the tcp_sndbuf() function. - - The proper way to use this function is to call the function with at - most tcp_sndbuf() bytes of data. If the function returns ERR_MEM, - the application should wait until some of the currently enqueued - data has been successfully received by the other host and try again. - -- void tcp_sent(struct tcp_pcb *pcb, - err_t (* sent)(void *arg, struct tcp_pcb *tpcb, - u16_t len)) - - Specifies the callback function that should be called when data has - successfully been received (i.e., acknowledged) by the remote - host. The len argument passed to the callback function gives the - amount bytes that was acknowledged by the last acknowledgment. - - ---- Receiving TCP data - -TCP data reception is callback based - an application specified -callback function is called when new data arrives. When the -application has taken the data, it has to call the tcp_recved() -function to indicate that TCP can advertise increase the receive -window. - -- void tcp_recv(struct tcp_pcb *pcb, - err_t (* recv)(void *arg, struct tcp_pcb *tpcb, - struct pbuf *p, err_t err)) - - Sets the callback function that will be called when new data - arrives. The callback function will be passed a NULL pbuf to - indicate that the remote host has closed the connection. - -- void tcp_recved(struct tcp_pcb *pcb, u16_t len) - - Must be called when the application has received the data. The len - argument indicates the length of the received data. - - ---- Application polling - -When a connection is idle (i.e., no data is either transmitted or -received), lwIP will repeatedly poll the application by calling a -specified callback function. This can be used either as a watchdog -timer for killing connections that have stayed idle for too long, or -as a method of waiting for memory to become available. For instance, -if a call to tcp_write() has failed because memory wasn't available, -the application may use the polling functionality to call tcp_write() -again when the connection has been idle for a while. - -- void tcp_poll(struct tcp_pcb *pcb, u8_t interval, - err_t (* poll)(void *arg, struct tcp_pcb *tpcb)) - - Specifies the polling interval and the callback function that should - be called to poll the application. The interval is specified in - number of TCP coarse grained timer shots, which typically occurs - twice a second. An interval of 10 means that the application would - be polled every 5 seconds. - - ---- Closing and aborting connections - -- err_t tcp_close(struct tcp_pcb *pcb) - - Closes the connection. The function may return ERR_MEM if no memory - was available for closing the connection. If so, the application - should wait and try again either by using the acknowledgment - callback or the polling functionality. If the close succeeds, the - function returns ERR_OK. - - The pcb is deallocated by the TCP code after a call to tcp_close(). - -- void tcp_abort(struct tcp_pcb *pcb) - - Aborts the connection by sending a RST (reset) segment to the remote - host. The pcb is deallocated. This function never fails. - -If a connection is aborted because of an error, the application is -alerted of this event by the err callback. Errors that might abort a -connection are when there is a shortage of memory. The callback -function to be called is set using the tcp_err() function. - -- void tcp_err(struct tcp_pcb *pcb, void (* err)(void *arg, - err_t err)) - - The error callback function does not get the pcb passed to it as a - parameter since the pcb may already have been deallocated. - - ---- Lower layer TCP interface - -TCP provides a simple interface to the lower layers of the -system. During system initialization, the function tcp_init() has -to be called before any other TCP function is called. When the system -is running, the two timer functions tcp_fasttmr() and tcp_slowtmr() -must be called with regular intervals. The tcp_fasttmr() should be -called every TCP_FAST_INTERVAL milliseconds (defined in tcp.h) and -tcp_slowtmr() should be called every TCP_SLOW_INTERVAL milliseconds. - - ---- UDP interface - -The UDP interface is similar to that of TCP, but due to the lower -level of complexity of UDP, the interface is significantly simpler. - -- struct udp_pcb *udp_new(void) - - Creates a new UDP pcb which can be used for UDP communication. The - pcb is not active until it has either been bound to a local address - or connected to a remote address. - -- void udp_remove(struct udp_pcb *pcb) - - Removes and deallocates the pcb. - -- err_t udp_bind(struct udp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port) - - Binds the pcb to a local address. The IP-address argument "ipaddr" - can be IP_ADDR_ANY to indicate that it should listen to any local IP - address. The function currently always return ERR_OK. - -- err_t udp_connect(struct udp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port) - - Sets the remote end of the pcb. This function does not generate any - network traffic, but only set the remote address of the pcb. - -- err_t udp_disconnect(struct udp_pcb *pcb) - - Remove the remote end of the pcb. This function does not generate - any network traffic, but only removes the remote address of the pcb. - -- err_t udp_send(struct udp_pcb *pcb, struct pbuf *p) - - Sends the pbuf p. The pbuf is not deallocated. - -- void udp_recv(struct udp_pcb *pcb, - void (* recv)(void *arg, struct udp_pcb *upcb, - struct pbuf *p, - struct ip_addr *addr, - u16_t port), - void *recv_arg) - - Specifies a callback function that should be called when a UDP - datagram is received. - - ---- System initalization - -A truly complete and generic sequence for initializing the lwip stack -cannot be given because it depends on the build configuration (lwipopts.h) -and additional initializations for your runtime environment (e.g. timers). - -We can give you some idea on how to proceed when using the raw API. -We assume a configuration using a single Ethernet netif and the -UDP and TCP transport layers, IPv4 and the DHCP client. - -Call these functions in the order of appearance: - -- stats_init() - - Clears the structure where runtime statistics are gathered. - -- sys_init() - - Not of much use since we set the NO_SYS 1 option in lwipopts.h, - to be called for easy configuration changes. - -- mem_init() - - Initializes the dynamic memory heap defined by MEM_SIZE. - -- memp_init() - - Initializes the memory pools defined by MEMP_NUM_x. - -- pbuf_init() - - Initializes the pbuf memory pool defined by PBUF_POOL_SIZE. - -- etharp_init() - - Initializes the ARP table and queue. - Note: you must call etharp_tmr at a 10 second regular interval - after this initialization. - -- ip_init() - - Doesn't do much, it should be called to handle future changes. - -- udp_init() - - Clears the UDP PCB list. - -- tcp_init() - - Clears the TCP PCB list and clears some internal TCP timers. - Note: you must call tcp_fasttmr() and tcp_slowtmr() at the - predefined regular intervals after this initialization. - -- netif_add(struct netif *netif, struct ip_addr *ipaddr, - struct ip_addr *netmask, struct ip_addr *gw, - void *state, err_t (* init)(struct netif *netif), - err_t (* input)(struct pbuf *p, struct netif *netif)) - - Adds your network interface to the netif_list. Allocate a struct - netif and pass a pointer to this structure as the first argument. - Give pointers to cleared ip_addr structures when using DHCP, - or fill them with sane numbers otherwise. The state pointer may be NULL. - - The init function pointer must point to a initialization function for - your ethernet netif interface. The following code illustrates it's use. - - err_t netif_if_init(struct netif *netif) - { - u8_t i; - - for(i = 0; i < 6; i++) netif->hwaddr[i] = some_eth_addr[i]; - init_my_eth_device(); - return ERR_OK; - } - - The input function pointer must point to the lwip ip_input(). - -- netif_set_default(struct netif *netif) - - Registers the default network interface. - -- netif_set_up(struct netif *netif) - - When the netif is fully configured this function must be called. - -- dhcp_start(struct netif *netif) - - Creates a new DHCP client for this interface on the first call. - Note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at - the predefined regular intervals after starting the client. - - You can peek in the netif->dhcp struct for the actual DHCP status. diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/doc/savannah.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/doc/savannah.txt deleted file mode 100644 index 409905b1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/doc/savannah.txt +++ /dev/null @@ -1,135 +0,0 @@ -Daily Use Guide for using Savannah for lwIP - -Table of Contents: - -1 - Obtaining lwIP from the CVS repository -2 - Committers/developers CVS access using SSH (to be written) -3 - Merging from DEVEL branch to main trunk (stable branch) -4 - How to release lwIP - - - -1 Obtaining lwIP from the CVS repository ----------------------------------------- - -To perform an anonymous CVS checkout of the main trunk (this is where -bug fixes and incremental enhancements occur), do this: - -cvs -z3 -d:pserver:anonymous@cvs.sv.gnu.org:/sources/lwip checkout lwip - -Or, obtain a stable branch (updated with bug fixes only) as follows: -cvs -z3 -d:pserver:anonymous@cvs.sv.gnu.org:/sources/lwip checkout \ - -r STABLE-0_7 -d lwip-0.7 lwip - -Or, obtain a specific (fixed) release as follows: -cvs -z3 -d:pserver:anonymous@cvs.sv.gnu.org:/sources/lwip checkout \ - -r STABLE-0_7_0 -d lwip-0.7.0 lwip - -3 Committers/developers CVS access using SSH --------------------------------------------- - -The Savannah server uses SSH (Secure Shell) protocol 2 authentication and encryption. -As such, CVS commits to the server occur through a SSH tunnel for project members. -To create a SSH2 key pair in UNIX-like environments, do this: - -ssh-keygen -t dsa - -Under Windows, a recommended SSH client is "PuTTY", freely available with good -documentation and a graphic user interface. Use its key generator. - -Now paste the id_dsa.pub contents into your Savannah account public key list. Wait -a while so that Savannah can update its configuration (This can take minutes). - -Try to login using SSH: - -ssh -v your_login@cvs.sv.gnu.org - -If it tells you: - -Authenticating with public key "your_key_name"... -Server refused to allocate pty - -then you could login; Savannah refuses to give you a shell - which is OK, as we -are allowed to use SSH for CVS only. Now, you should be able to do this: - -export CVS_RSH=ssh -cvs -z3 -d:ext:your_login@cvs.sv.gnu.org:/sources/lwip co lwip - -after which you can edit your local files with bug fixes or new features and -commit them. Make sure you know what you are doing when using CVS to make -changes on the repository. If in doubt, ask on the lwip-members mailing list. - -(If SSH asks about authenticity of the host, you can check the key - fingerprint against http://savannah.nongnu.org/cvs/?group=lwip) - - -3 Merging from DEVEL branch to main trunk (stable) --------------------------------------------------- - -Merging is a delicate process in CVS and requires the -following disciplined steps in order to prevent conflicts -in the future. Conflicts can be hard to solve! - -Merging from branch A to branch B requires that the A branch -has a tag indicating the previous merger. This tag is called -'merged_from_A_to_B'. After merging, the tag is moved in the -A branch to remember this merger for future merge actions. - -IMPORTANT: AFTER COMMITTING A SUCCESFUL MERGE IN THE -REPOSITORY, THE TAG MUST BE SET ON THE SOURCE BRANCH OF THE -MERGE ACTION (REPLACING EXISTING TAGS WITH THE SAME NAME). - -Merge all changes in DEVEL since our last merge to main: - -In the working copy of the main trunk: -cvs update -P -jmerged_from_DEVEL_to_main -jDEVEL - -(This will apply the changes between 'merged_from_DEVEL_to_main' -and 'DEVEL' to your work set of files) - -We can now commit the merge result. -cvs commit -R -m "Merged from DEVEL to main." - -If this worked out OK, we now move the tag in the DEVEL branch -to this merge point, so we can use this point for future merges: - -cvs rtag -F -r DEVEL merged_from_DEVEL_to_main lwip - -4 How to release lwIP ---------------------- - -First, checkout a clean copy of the branch to be released. Tag this set with -tag name "STABLE-0_6_3". (I use release number 0.6.3 throughout this example). - -Login CVS using pserver authentication, then export a clean copy of the -tagged tree. Export is similar to a checkout, except that the CVS metadata -is not created locally. - -export CVS_RSH=ssh -cvs -z3 -d:pserver:anonymous@cvs.sv.gnu.org:/sources/lwip checkout \ - -r STABLE-0_6_3 -d lwip-0.6.3 lwip - -Archive this directory using tar, gzip'd, bzip2'd and zip'd. - -tar czvf lwip-0.6.3.tar.gz lwip-0.6.3 -tar cjvf lwip-0.6.3.tar.bz2 lwip-0.6.3 -zip -r lwip-0.6.3.zip lwip-0.6.3 - -Now, sign the archives with a detached GPG binary signature as follows: - -gpg -b lwip-0.6.3.tar.gz -gpg -b lwip-0.6.3.tar.bz2 -gpg -b lwip-0.6.3.zip - -Upload these files using anonymous FTP: -ncftp ftp://savannah.gnu.org/incoming/savannah/lwip - -ncftp>mput *0.6.3.* - -Additionally, you may post a news item on Savannah, like this: - -A new 0.6.3 release is now available here: -http://savannah.nongnu.org/files/?group=lwip&highlight=0.6.3 - -You will have to submit this via the user News interface, then approve -this via the Administrator News interface. \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/doc/sys_arch.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/doc/sys_arch.txt deleted file mode 100644 index 95d0add7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/doc/sys_arch.txt +++ /dev/null @@ -1,194 +0,0 @@ -sys_arch interface for lwIP 0.6++ - -Author: Adam Dunkels - -The operating system emulation layer provides a common interface -between the lwIP code and the underlying operating system kernel. The -general idea is that porting lwIP to new architectures requires only -small changes to a few header files and a new sys_arch -implementation. It is also possible to do a sys_arch implementation -that does not rely on any underlying operating system. - -The sys_arch provides semaphores and mailboxes to lwIP. For the full -lwIP functionality, multiple threads support can be implemented in the -sys_arch, but this is not required for the basic lwIP -functionality. Previous versions of lwIP required the sys_arch to -implement timer scheduling as well but as of lwIP 0.5 this is -implemented in a higher layer. - -In addition to the source file providing the functionality of sys_arch, -the OS emulation layer must provide several header files defining -macros used throughout lwip. The files required and the macros they -must define are listed below the sys_arch description. - -Semaphores can be either counting or binary - lwIP works with both -kinds. Mailboxes are used for message passing and can be implemented -either as a queue which allows multiple messages to be posted to a -mailbox, or as a rendez-vous point where only one message can be -posted at a time. lwIP works with both kinds, but the former type will -be more efficient. A message in a mailbox is just a pointer, nothing -more. - -Semaphores are represented by the type "sys_sem_t" which is typedef'd -in the sys_arch.h file. Mailboxes are equivalently represented by the -type "sys_mbox_t". lwIP does not place any restrictions on how -sys_sem_t or sys_mbox_t are represented internally. - -The following functions must be implemented by the sys_arch: - -- void sys_init(void) - - Is called to initialize the sys_arch layer. - -- sys_sem_t sys_sem_new(u8_t count) - - Creates and returns a new semaphore. The "count" argument specifies - the initial state of the semaphore. - -- void sys_sem_free(sys_sem_t sem) - - Deallocates a semaphore. - -- void sys_sem_signal(sys_sem_t sem) - - Signals a semaphore. - -- u32_t sys_arch_sem_wait(sys_sem_t sem, u32_t timeout) - - Blocks the thread while waiting for the semaphore to be - signaled. If the "timeout" argument is non-zero, the thread should - only be blocked for the specified time (measured in - milliseconds). - - If the timeout argument is non-zero, the return value is the number of - milliseconds spent waiting for the semaphore to be signaled. If the - semaphore wasn't signaled within the specified time, the return value is - SYS_ARCH_TIMEOUT. If the thread didn't have to wait for the semaphore - (i.e., it was already signaled), the function may return zero. - - Notice that lwIP implements a function with a similar name, - sys_sem_wait(), that uses the sys_arch_sem_wait() function. - -- sys_mbox_t sys_mbox_new(void) - - Creates an empty mailbox. - -- void sys_mbox_free(sys_mbox_t mbox) - - Deallocates a mailbox. If there are messages still present in the - mailbox when the mailbox is deallocated, it is an indication of a - programming error in lwIP and the developer should be notified. - -- void sys_mbox_post(sys_mbox_t mbox, void *msg) - - Posts the "msg" to the mailbox. - -- u32_t sys_arch_mbox_fetch(sys_mbox_t mbox, void **msg, u32_t timeout) - - Blocks the thread until a message arrives in the mailbox, but does - not block the thread longer than "timeout" milliseconds (similar to - the sys_arch_sem_wait() function). The "msg" argument is a result - parameter that is set by the function (i.e., by doing "*msg = - ptr"). The "msg" parameter maybe NULL to indicate that the message - should be dropped. - - The return values are the same as for the sys_arch_sem_wait() function: - Number of milliseconds spent waiting or SYS_ARCH_TIMEOUT if there was a - timeout. - - Note that a function with a similar name, sys_mbox_fetch(), is - implemented by lwIP. - -- struct sys_timeouts *sys_arch_timeouts(void) - - Returns a pointer to the per-thread sys_timeouts structure. In lwIP, - each thread has a list of timeouts which is repressented as a linked - list of sys_timeout structures. The sys_timeouts structure holds a - pointer to a linked list of timeouts. This function is called by - the lwIP timeout scheduler and must not return a NULL value. - - In a single threadd sys_arch implementation, this function will - simply return a pointer to a global sys_timeouts variable stored in - the sys_arch module. - -If threads are supported by the underlying operating system and if -such functionality is needed in lwIP, the following function will have -to be implemented as well: - -- sys_thread_t sys_thread_new(void (* thread)(void *arg), void *arg, int prio) - - Starts a new thread with priority "prio" that will begin its execution in the - function "thread()". The "arg" argument will be passed as an argument to the - thread() function. The id of the new thread is returned. Both the id and - the priority are system dependent. - -- sys_prot_t sys_arch_protect(void) - - This optional function does a "fast" critical region protection and returns - the previous protection level. This function is only called during very short - critical regions. An embedded system which supports ISR-based drivers might - want to implement this function by disabling interrupts. Task-based systems - might want to implement this by using a mutex or disabling tasking. This - function should support recursive calls from the same task or interrupt. In - other words, sys_arch_protect() could be called while already protected. In - that case the return value indicates that it is already protected. - - sys_arch_protect() is only required if your port is supporting an operating - system. - -- void sys_arch_unprotect(sys_prot_t pval) - - This optional function does a "fast" set of critical region protection to the - value specified by pval. See the documentation for sys_arch_protect() for - more information. This function is only required if your port is supporting - an operating system. - -------------------------------------------------------------------------------- -Additional files required for the "OS support" emulation layer: -------------------------------------------------------------------------------- - -cc.h - Architecture environment, some compiler specific, some - environment specific (probably should move env stuff - to sys_arch.h.) - - Typedefs for the types used by lwip - - u8_t, s8_t, u16_t, s16_t, u32_t, s32_t, mem_ptr_t - - Compiler hints for packing lwip's structures - - PACK_STRUCT_FIELD(x) - PACK_STRUCT_STRUCT - PACK_STRUCT_BEGIN - PACK_STRUCT_END - - Platform specific diagnostic output - - LWIP_PLATFORM_DIAG(x) - non-fatal, print a message. - LWIP_PLATFORM_ASSERT(x) - fatal, print message and abandon execution. - - "lightweight" synchronization mechanisms - - SYS_ARCH_DECL_PROTECT(x) - declare a protection state variable. - SYS_ARCH_PROTECT(x) - enter protection mode. - SYS_ARCH_UNPROTECT(x) - leave protection mode. - - If the compiler does not provide memset() this file must include a - definition of it, or include a file which defines it. - - This file must either include a system-local which defines - the standard *nix error codes, or it should #define LWIP_PROVIDE_ERRNO - to make lwip/arch.h define the codes which are used throughout. - - -perf.h - Architecture specific performance measurement. - Measurement calls made throughout lwip, these can be defined to nothing. - PERF_START - start measuring something. - PERF_STOP(x) - stop measuring something, and record the result. - -sys_arch.h - Tied to sys_arch.c - - Arch dependent types for the following objects: - sys_sem_t, sys_mbox_t, sys_thread_t, - And, optionally: - sys_prot_t - - Defines to set vars of sys_mbox_t and sys_sem_t to NULL. - SYS_MBOX_NULL NULL - SYS_SEM_NULL NULL diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/FILES b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/FILES deleted file mode 100644 index 2b657318..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/FILES +++ /dev/null @@ -1,13 +0,0 @@ -api/ - The code for the high-level wrapper API. Not needed if - you use the lowel-level call-back/raw API. - -core/ - The core of the TPC/IP stack; protocol implementations, - memory and buffer management, and the low-level raw API. - -include/ - lwIP include files. - -netif/ - Generic network interface device drivers are kept here, - as well as the ARP module. - -For more information on the various subdirectories, check the FILES -file in each directory. diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/api_lib.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/api_lib.c deleted file mode 100644 index 3d83d1ea..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/api_lib.c +++ /dev/null @@ -1,729 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -/* This is the part of the API that is linked with - the application */ - -#include "lwip/opt.h" -#include "lwip/api.h" -#include "lwip/api_msg.h" -#include "lwip/memp.h" - - -struct -netbuf *netbuf_new(void) -{ - struct netbuf *buf; - - buf = memp_malloc(MEMP_NETBUF); - if (buf != NULL) { - buf->p = NULL; - buf->ptr = NULL; - return buf; - } else { - return NULL; - } -} - -void -netbuf_delete(struct netbuf *buf) -{ - if (buf != NULL) { - if (buf->p != NULL) { - pbuf_free(buf->p); - buf->p = buf->ptr = NULL; - } - memp_free(MEMP_NETBUF, buf); - } -} - -void * -netbuf_alloc(struct netbuf *buf, u16_t size) -{ - /* Deallocate any previously allocated memory. */ - if (buf->p != NULL) { - pbuf_free(buf->p); - } - buf->p = pbuf_alloc(PBUF_TRANSPORT, size, PBUF_RAM); - if (buf->p == NULL) { - return NULL; - } - buf->ptr = buf->p; - return buf->p->payload; -} - -void -netbuf_free(struct netbuf *buf) -{ - if (buf->p != NULL) { - pbuf_free(buf->p); - } - buf->p = buf->ptr = NULL; -} - -void -netbuf_ref(struct netbuf *buf, void *dataptr, u16_t size) -{ - if (buf->p != NULL) { - pbuf_free(buf->p); - } - buf->p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_REF); - buf->p->payload = dataptr; - buf->p->len = buf->p->tot_len = size; - buf->ptr = buf->p; -} - -void -netbuf_chain(struct netbuf *head, struct netbuf *tail) -{ - pbuf_chain(head->p, tail->p); - head->ptr = head->p; - memp_free(MEMP_NETBUF, tail); -} - -u16_t -netbuf_len(struct netbuf *buf) -{ - return buf->p->tot_len; -} - -err_t -netbuf_data(struct netbuf *buf, void **dataptr, u16_t *len) -{ - if (buf->ptr == NULL) { - return ERR_BUF; - } - *dataptr = buf->ptr->payload; - *len = buf->ptr->len; - return ERR_OK; -} - -s8_t -netbuf_next(struct netbuf *buf) -{ - if (buf->ptr->next == NULL) { - return -1; - } - buf->ptr = buf->ptr->next; - if (buf->ptr->next == NULL) { - return 1; - } - return 0; -} - -void -netbuf_first(struct netbuf *buf) -{ - buf->ptr = buf->p; -} - -void -netbuf_copy_partial(struct netbuf *buf, void *dataptr, u16_t len, u16_t offset) -{ - struct pbuf *p; - u16_t i, left; - - left = 0; - - if(buf == NULL || dataptr == NULL) { - return; - } - - /* This implementation is bad. It should use bcopy - instead. */ - for(p = buf->p; left < len && p != NULL; p = p->next) { - if (offset != 0 && offset >= p->len) { - offset -= p->len; - } else { - for(i = offset; i < p->len; ++i) { - ((u8_t *)dataptr)[left] = ((u8_t *)p->payload)[i]; - if (++left >= len) { - return; - } - } - offset = 0; - } - } -} - -void -netbuf_copy(struct netbuf *buf, void *dataptr, u16_t len) -{ - netbuf_copy_partial(buf, dataptr, len, 0); -} - -struct ip_addr * -netbuf_fromaddr(struct netbuf *buf) -{ - return buf->fromaddr; -} - -u16_t -netbuf_fromport(struct netbuf *buf) -{ - return buf->fromport; -} - -struct -netconn *netconn_new_with_proto_and_callback(enum netconn_type t, u16_t proto, - void (*callback)(struct netconn *, enum netconn_evt, u16_t len)) -{ - struct netconn *conn; - struct api_msg *msg; - - conn = memp_malloc(MEMP_NETCONN); - if (conn == NULL) { - return NULL; - } - - conn->err = ERR_OK; - conn->type = t; - conn->pcb.tcp = NULL; - - if ((conn->mbox = sys_mbox_new()) == SYS_MBOX_NULL) { - memp_free(MEMP_NETCONN, conn); - return NULL; - } - conn->recvmbox = SYS_MBOX_NULL; - conn->acceptmbox = SYS_MBOX_NULL; - conn->sem = SYS_SEM_NULL; - conn->state = NETCONN_NONE; - conn->socket = 0; - conn->callback = callback; - conn->recv_avail = 0; - - if((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - memp_free(MEMP_NETCONN, conn); - return NULL; - } - - msg->type = API_MSG_NEWCONN; - msg->msg.msg.bc.port = proto; /* misusing the port field */ - msg->msg.conn = conn; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - - if ( conn->err != ERR_OK ) { - memp_free(MEMP_NETCONN, conn); - return NULL; - } - - return conn; -} - - -struct -netconn *netconn_new(enum netconn_type t) -{ - return netconn_new_with_proto_and_callback(t,0,NULL); -} - -struct -netconn *netconn_new_with_callback(enum netconn_type t, - void (*callback)(struct netconn *, enum netconn_evt, u16_t len)) -{ - return netconn_new_with_proto_and_callback(t,0,callback); -} - - -err_t -netconn_delete(struct netconn *conn) -{ - struct api_msg *msg; - void *mem; - - if (conn == NULL) { - return ERR_OK; - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return ERR_MEM; - } - - msg->type = API_MSG_DELCONN; - msg->msg.conn = conn; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - - /* Drain the recvmbox. */ - if (conn->recvmbox != SYS_MBOX_NULL) { - while (sys_arch_mbox_fetch(conn->recvmbox, &mem, 1) != SYS_ARCH_TIMEOUT) { - if (conn->type == NETCONN_TCP) { - if(mem != NULL) - pbuf_free((struct pbuf *)mem); - } else { - netbuf_delete((struct netbuf *)mem); - } - } - sys_mbox_free(conn->recvmbox); - conn->recvmbox = SYS_MBOX_NULL; - } - - - /* Drain the acceptmbox. */ - if (conn->acceptmbox != SYS_MBOX_NULL) { - while (sys_arch_mbox_fetch(conn->acceptmbox, &mem, 1) != SYS_ARCH_TIMEOUT) { - netconn_delete((struct netconn *)mem); - } - - sys_mbox_free(conn->acceptmbox); - conn->acceptmbox = SYS_MBOX_NULL; - } - - sys_mbox_free(conn->mbox); - conn->mbox = SYS_MBOX_NULL; - if (conn->sem != SYS_SEM_NULL) { - sys_sem_free(conn->sem); - } - /* conn->sem = SYS_SEM_NULL;*/ - memp_free(MEMP_NETCONN, conn); - return ERR_OK; -} - -enum netconn_type -netconn_type(struct netconn *conn) -{ - return conn->type; -} - -err_t -netconn_peer(struct netconn *conn, struct ip_addr *addr, - u16_t *port) -{ - switch (conn->type) { - case NETCONN_RAW: - /* return an error as connecting is only a helper for upper layers */ - return ERR_CONN; - case NETCONN_UDPLITE: - case NETCONN_UDPNOCHKSUM: - case NETCONN_UDP: - if (conn->pcb.udp == NULL || - ((conn->pcb.udp->flags & UDP_FLAGS_CONNECTED) == 0)) - return ERR_CONN; - *addr = (conn->pcb.udp->remote_ip); - *port = conn->pcb.udp->remote_port; - break; - case NETCONN_TCP: - if (conn->pcb.tcp == NULL) - return ERR_CONN; - *addr = (conn->pcb.tcp->remote_ip); - *port = conn->pcb.tcp->remote_port; - break; - } - return (conn->err = ERR_OK); -} - -err_t -netconn_addr(struct netconn *conn, struct ip_addr **addr, - u16_t *port) -{ - switch (conn->type) { - case NETCONN_RAW: - *addr = &(conn->pcb.raw->local_ip); - *port = conn->pcb.raw->protocol; - break; - case NETCONN_UDPLITE: - case NETCONN_UDPNOCHKSUM: - case NETCONN_UDP: - *addr = &(conn->pcb.udp->local_ip); - *port = conn->pcb.udp->local_port; - break; - case NETCONN_TCP: - *addr = &(conn->pcb.tcp->local_ip); - *port = conn->pcb.tcp->local_port; - break; - } - return (conn->err = ERR_OK); -} - -err_t -netconn_bind(struct netconn *conn, struct ip_addr *addr, - u16_t port) -{ - struct api_msg *msg; - - if (conn == NULL) { - return ERR_VAL; - } - - if (conn->type != NETCONN_TCP && - conn->recvmbox == SYS_MBOX_NULL) { - if ((conn->recvmbox = sys_mbox_new()) == SYS_MBOX_NULL) { - return ERR_MEM; - } - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return (conn->err = ERR_MEM); - } - msg->type = API_MSG_BIND; - msg->msg.conn = conn; - msg->msg.msg.bc.ipaddr = addr; - msg->msg.msg.bc.port = port; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - return conn->err; -} - - -err_t -netconn_connect(struct netconn *conn, struct ip_addr *addr, - u16_t port) -{ - struct api_msg *msg; - - if (conn == NULL) { - return ERR_VAL; - } - - - if (conn->recvmbox == SYS_MBOX_NULL) { - if ((conn->recvmbox = sys_mbox_new()) == SYS_MBOX_NULL) { - return ERR_MEM; - } - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return ERR_MEM; - } - msg->type = API_MSG_CONNECT; - msg->msg.conn = conn; - msg->msg.msg.bc.ipaddr = addr; - msg->msg.msg.bc.port = port; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - return conn->err; -} - -err_t -netconn_disconnect(struct netconn *conn) -{ - struct api_msg *msg; - - if (conn == NULL) { - return ERR_VAL; - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return ERR_MEM; - } - msg->type = API_MSG_DISCONNECT; - msg->msg.conn = conn; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - return conn->err; - -} - -err_t -netconn_listen(struct netconn *conn) -{ - struct api_msg *msg; - - if (conn == NULL) { - return ERR_VAL; - } - - if (conn->acceptmbox == SYS_MBOX_NULL) { - conn->acceptmbox = sys_mbox_new(); - if (conn->acceptmbox == SYS_MBOX_NULL) { - return ERR_MEM; - } - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return (conn->err = ERR_MEM); - } - msg->type = API_MSG_LISTEN; - msg->msg.conn = conn; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - return conn->err; -} - -struct netconn * -netconn_accept(struct netconn *conn) -{ - struct netconn *newconn; - - if (conn == NULL) { - return NULL; - } - - sys_mbox_fetch(conn->acceptmbox, (void **)&newconn); - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVMINUS, 0); - - return newconn; -} - -struct netbuf * -netconn_recv(struct netconn *conn) -{ - struct api_msg *msg; - struct netbuf *buf; - struct pbuf *p; - u16_t len; - - if (conn == NULL) { - return NULL; - } - - if (conn->recvmbox == SYS_MBOX_NULL) { - conn->err = ERR_CONN; - return NULL; - } - - if (conn->err != ERR_OK) { - return NULL; - } - - if (conn->type == NETCONN_TCP) { - if (conn->pcb.tcp->state == LISTEN) { - conn->err = ERR_CONN; - return NULL; - } - - - buf = memp_malloc(MEMP_NETBUF); - - if (buf == NULL) { - conn->err = ERR_MEM; - return NULL; - } - - sys_mbox_fetch(conn->recvmbox, (void **)&p); - - if (p != NULL) - { - len = p->tot_len; - conn->recv_avail -= len; - } - else - len = 0; - - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVMINUS, len); - - /* If we are closed, we indicate that we no longer wish to receive - data by setting conn->recvmbox to SYS_MBOX_NULL. */ - if (p == NULL) { - memp_free(MEMP_NETBUF, buf); - sys_mbox_free(conn->recvmbox); - conn->recvmbox = SYS_MBOX_NULL; - return NULL; - } - - buf->p = p; - buf->ptr = p; - buf->fromport = 0; - buf->fromaddr = NULL; - - /* Let the stack know that we have taken the data. */ - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - conn->err = ERR_MEM; - return buf; - } - msg->type = API_MSG_RECV; - msg->msg.conn = conn; - if (buf != NULL) { - msg->msg.msg.len = buf->p->tot_len; - } else { - msg->msg.msg.len = 1; - } - api_msg_post(msg); - - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - } else { - sys_mbox_fetch(conn->recvmbox, (void **)&buf); - conn->recv_avail -= buf->p->tot_len; - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVMINUS, buf->p->tot_len); - } - - - - - LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_recv: received %p (err %d)\n", (void *)buf, conn->err)); - - - return buf; -} - -err_t -netconn_send(struct netconn *conn, struct netbuf *buf) -{ - struct api_msg *msg; - - if (conn == NULL) { - return ERR_VAL; - } - - if (conn->err != ERR_OK) { - return conn->err; - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return (conn->err = ERR_MEM); - } - - LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_send: sending %d bytes\n", buf->p->tot_len)); - msg->type = API_MSG_SEND; - msg->msg.conn = conn; - msg->msg.msg.p = buf->p; - api_msg_post(msg); - - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - return conn->err; -} - -err_t -netconn_write(struct netconn *conn, void *dataptr, u16_t size, u8_t copy) -{ - struct api_msg *msg; - u16_t len; - - if (conn == NULL) { - return ERR_VAL; - } - - if (conn->err != ERR_OK) { - return conn->err; - } - - if (conn->sem == SYS_SEM_NULL) { - conn->sem = sys_sem_new(0); - if (conn->sem == SYS_SEM_NULL) { - return ERR_MEM; - } - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return (conn->err = ERR_MEM); - } - msg->type = API_MSG_WRITE; - msg->msg.conn = conn; - - - conn->state = NETCONN_WRITE; - while (conn->err == ERR_OK && size > 0) { - msg->msg.msg.w.dataptr = dataptr; - msg->msg.msg.w.copy = copy; - - if (conn->type == NETCONN_TCP) { - if (tcp_sndbuf(conn->pcb.tcp) == 0) { - sys_sem_wait(conn->sem); - if (conn->err != ERR_OK) { - goto ret; - } - } - if (size > tcp_sndbuf(conn->pcb.tcp)) { - /* We cannot send more than one send buffer's worth of data at a - time. */ - len = tcp_sndbuf(conn->pcb.tcp); - } else { - len = size; - } - } else { - len = size; - } - - LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_write: writing %d bytes (%d)\n", len, copy)); - msg->msg.msg.w.len = len; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - if (conn->err == ERR_OK) { - dataptr = (void *)((u8_t *)dataptr + len); - size -= len; - } else if (conn->err == ERR_MEM) { - conn->err = ERR_OK; - sys_sem_wait(conn->sem); - } else { - goto ret; - } - } - ret: - memp_free(MEMP_API_MSG, msg); - conn->state = NETCONN_NONE; - if (conn->sem != SYS_SEM_NULL) { - sys_sem_free(conn->sem); - conn->sem = SYS_SEM_NULL; - } - - return conn->err; -} - -err_t -netconn_close(struct netconn *conn) -{ - struct api_msg *msg; - - if (conn == NULL) { - return ERR_VAL; - } - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return (conn->err = ERR_MEM); - } - - conn->state = NETCONN_CLOSE; - again: - msg->type = API_MSG_CLOSE; - msg->msg.conn = conn; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - if (conn->err == ERR_MEM && - conn->sem != SYS_SEM_NULL) { - sys_sem_wait(conn->sem); - goto again; - } - conn->state = NETCONN_NONE; - memp_free(MEMP_API_MSG, msg); - return conn->err; -} - -err_t -netconn_err(struct netconn *conn) -{ - return conn->err; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/api_msg.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/api_msg.c deleted file mode 100644 index 0cbe626f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/api_msg.c +++ /dev/null @@ -1,800 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/opt.h" -#include "lwip/arch.h" -#include "lwip/api_msg.h" -#include "lwip/memp.h" -#include "lwip/sys.h" -#include "lwip/tcpip.h" - -#if LWIP_RAW -static u8_t -recv_raw(void *arg, struct raw_pcb *pcb, struct pbuf *p, - struct ip_addr *addr) -{ - struct netbuf *buf; - struct netconn *conn; - - conn = arg; - if (!conn) return 0; - - if (conn->recvmbox != SYS_MBOX_NULL) { - if (!(buf = memp_malloc(MEMP_NETBUF))) { - return 0; - } - pbuf_ref(p); - buf->p = p; - buf->ptr = p; - buf->fromaddr = addr; - buf->fromport = pcb->protocol; - - conn->recv_avail += p->tot_len; - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVPLUS, p->tot_len); - sys_mbox_post(conn->recvmbox, buf); - } - - return 0; /* do not eat the packet */ -} -#endif -#if LWIP_UDP -static void -recv_udp(void *arg, struct udp_pcb *pcb, struct pbuf *p, - struct ip_addr *addr, u16_t port) -{ - struct netbuf *buf; - struct netconn *conn; - - conn = arg; - - if (conn == NULL) { - pbuf_free(p); - return; - } - if (conn->recvmbox != SYS_MBOX_NULL) { - buf = memp_malloc(MEMP_NETBUF); - if (buf == NULL) { - pbuf_free(p); - return; - } else { - buf->p = p; - buf->ptr = p; - buf->fromaddr = addr; - buf->fromport = port; - } - - conn->recv_avail += p->tot_len; - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVPLUS, p->tot_len); - sys_mbox_post(conn->recvmbox, buf); - } -} -#endif /* LWIP_UDP */ -#if LWIP_TCP - -static err_t -recv_tcp(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) -{ - struct netconn *conn; - u16_t len; - - conn = arg; - - if (conn == NULL) { - pbuf_free(p); - return ERR_VAL; - } - - if (conn->recvmbox != SYS_MBOX_NULL) { - - conn->err = err; - if (p != NULL) { - len = p->tot_len; - conn->recv_avail += len; - } - else - len = 0; - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVPLUS, len); - sys_mbox_post(conn->recvmbox, p); - } - return ERR_OK; -} - - -static err_t -poll_tcp(void *arg, struct tcp_pcb *pcb) -{ - struct netconn *conn; - - conn = arg; - if (conn != NULL && - (conn->state == NETCONN_WRITE || conn->state == NETCONN_CLOSE) && - conn->sem != SYS_SEM_NULL) { - sys_sem_signal(conn->sem); - } - return ERR_OK; -} - -static err_t -sent_tcp(void *arg, struct tcp_pcb *pcb, u16_t len) -{ - struct netconn *conn; - - conn = arg; - if (conn != NULL && conn->sem != SYS_SEM_NULL) { - sys_sem_signal(conn->sem); - } - - if (conn && conn->callback) - if (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) - (*conn->callback)(conn, NETCONN_EVT_SENDPLUS, len); - - return ERR_OK; -} - -static void -err_tcp(void *arg, err_t err) -{ - struct netconn *conn; - - conn = arg; - - conn->pcb.tcp = NULL; - - - conn->err = err; - if (conn->recvmbox != SYS_MBOX_NULL) { - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVPLUS, 0); - sys_mbox_post(conn->recvmbox, NULL); - } - if (conn->mbox != SYS_MBOX_NULL) { - sys_mbox_post(conn->mbox, NULL); - } - if (conn->acceptmbox != SYS_MBOX_NULL) { - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVPLUS, 0); - sys_mbox_post(conn->acceptmbox, NULL); - } - if (conn->sem != SYS_SEM_NULL) { - sys_sem_signal(conn->sem); - } -} - -static void -setup_tcp(struct netconn *conn) -{ - struct tcp_pcb *pcb; - - pcb = conn->pcb.tcp; - tcp_arg(pcb, conn); - tcp_recv(pcb, recv_tcp); - tcp_sent(pcb, sent_tcp); - tcp_poll(pcb, poll_tcp, 4); - tcp_err(pcb, err_tcp); -} - -static err_t -accept_function(void *arg, struct tcp_pcb *newpcb, err_t err) -{ - sys_mbox_t mbox; - struct netconn *newconn; - struct netconn *conn; - -#if API_MSG_DEBUG -#if TCP_DEBUG - tcp_debug_print_state(newpcb->state); -#endif /* TCP_DEBUG */ -#endif /* API_MSG_DEBUG */ - conn = (struct netconn *)arg; - mbox = conn->acceptmbox; - newconn = memp_malloc(MEMP_NETCONN); - if (newconn == NULL) { - return ERR_MEM; - } - newconn->type = NETCONN_TCP; - newconn->pcb.tcp = newpcb; - setup_tcp(newconn); - newconn->recvmbox = sys_mbox_new(); - if (newconn->recvmbox == SYS_MBOX_NULL) { - memp_free(MEMP_NETCONN, newconn); - return ERR_MEM; - } - newconn->mbox = sys_mbox_new(); - if (newconn->mbox == SYS_MBOX_NULL) { - sys_mbox_free(newconn->recvmbox); - memp_free(MEMP_NETCONN, newconn); - return ERR_MEM; - } - newconn->sem = sys_sem_new(0); - if (newconn->sem == SYS_SEM_NULL) { - sys_mbox_free(newconn->recvmbox); - sys_mbox_free(newconn->mbox); - memp_free(MEMP_NETCONN, newconn); - return ERR_MEM; - } - newconn->acceptmbox = SYS_MBOX_NULL; - newconn->err = err; - /* Register event with callback */ - if (conn->callback) - { - (*conn->callback)(conn, NETCONN_EVT_RCVPLUS, 0); - /* We have to set the callback here even though - * the new socket is unknown. Mark the socket as -1. */ - newconn->callback = conn->callback; - newconn->socket = -1; - } - - sys_mbox_post(mbox, newconn); - return ERR_OK; -} -#endif /* LWIP_TCP */ - -static void -do_newconn(struct api_msg_msg *msg) -{ - if(msg->conn->pcb.tcp != NULL) { - /* This "new" connection already has a PCB allocated. */ - /* Is this an error condition? Should it be deleted? - We currently just are happy and return. */ - sys_mbox_post(msg->conn->mbox, NULL); - return; - } - - msg->conn->err = ERR_OK; - - /* Allocate a PCB for this connection */ - switch(msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - msg->conn->pcb.raw = raw_new(msg->msg.bc.port); /* misusing the port field */ - raw_recv(msg->conn->pcb.raw, recv_raw, msg->conn); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - msg->conn->pcb.udp = udp_new(); - if(msg->conn->pcb.udp == NULL) { - msg->conn->err = ERR_MEM; - break; - } - udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; - case NETCONN_UDPNOCHKSUM: - msg->conn->pcb.udp = udp_new(); - if(msg->conn->pcb.udp == NULL) { - msg->conn->err = ERR_MEM; - break; - } - udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; - case NETCONN_UDP: - msg->conn->pcb.udp = udp_new(); - if(msg->conn->pcb.udp == NULL) { - msg->conn->err = ERR_MEM; - break; - } - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - msg->conn->pcb.tcp = tcp_new(); - if(msg->conn->pcb.tcp == NULL) { - msg->conn->err = ERR_MEM; - break; - } - setup_tcp(msg->conn); - break; -#endif - } - - - sys_mbox_post(msg->conn->mbox, NULL); -} - - -static void -do_delconn(struct api_msg_msg *msg) -{ - if (msg->conn->pcb.tcp != NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - raw_remove(msg->conn->pcb.raw); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - msg->conn->pcb.udp->recv_arg = NULL; - udp_remove(msg->conn->pcb.udp); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - if (msg->conn->pcb.tcp->state == LISTEN) { - tcp_arg(msg->conn->pcb.tcp, NULL); - tcp_accept(msg->conn->pcb.tcp, NULL); - tcp_close(msg->conn->pcb.tcp); - } else { - tcp_arg(msg->conn->pcb.tcp, NULL); - tcp_sent(msg->conn->pcb.tcp, NULL); - tcp_recv(msg->conn->pcb.tcp, NULL); - tcp_poll(msg->conn->pcb.tcp, NULL, 0); - tcp_err(msg->conn->pcb.tcp, NULL); - if (tcp_close(msg->conn->pcb.tcp) != ERR_OK) { - tcp_abort(msg->conn->pcb.tcp); - } - } -#endif - default: - break; - } - } - /* Trigger select() in socket layer */ - if (msg->conn->callback) - { - (*msg->conn->callback)(msg->conn, NETCONN_EVT_RCVPLUS, 0); - (*msg->conn->callback)(msg->conn, NETCONN_EVT_SENDPLUS, 0); - } - - if (msg->conn->mbox != SYS_MBOX_NULL) { - sys_mbox_post(msg->conn->mbox, NULL); - } -} - -static void -do_bind(struct api_msg_msg *msg) -{ - if (msg->conn->pcb.tcp == NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - msg->conn->pcb.raw = raw_new(msg->msg.bc.port); /* misusing the port field as protocol */ - raw_recv(msg->conn->pcb.raw, recv_raw, msg->conn); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - msg->conn->pcb.udp = udp_new(); - udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; - case NETCONN_UDPNOCHKSUM: - msg->conn->pcb.udp = udp_new(); - udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; - case NETCONN_UDP: - msg->conn->pcb.udp = udp_new(); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - msg->conn->pcb.tcp = tcp_new(); - setup_tcp(msg->conn); -#endif /* LWIP_TCP */ - default: - break; - } - } - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - msg->conn->err = raw_bind(msg->conn->pcb.raw,msg->msg.bc.ipaddr); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - msg->conn->err = udp_bind(msg->conn->pcb.udp, msg->msg.bc.ipaddr, msg->msg.bc.port); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - msg->conn->err = tcp_bind(msg->conn->pcb.tcp, - msg->msg.bc.ipaddr, msg->msg.bc.port); -#endif /* LWIP_TCP */ - default: - break; - } - sys_mbox_post(msg->conn->mbox, NULL); -} -#if LWIP_TCP - -static err_t -do_connected(void *arg, struct tcp_pcb *pcb, err_t err) -{ - struct netconn *conn; - - conn = arg; - - if (conn == NULL) { - return ERR_VAL; - } - - conn->err = err; - if (conn->type == NETCONN_TCP && err == ERR_OK) { - setup_tcp(conn); - } - sys_mbox_post(conn->mbox, NULL); - return ERR_OK; -} -#endif - -static void -do_connect(struct api_msg_msg *msg) -{ - if (msg->conn->pcb.tcp == NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - msg->conn->pcb.raw = raw_new(msg->msg.bc.port); /* misusing the port field as protocol */ - raw_recv(msg->conn->pcb.raw, recv_raw, msg->conn); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - msg->conn->pcb.udp = udp_new(); - if (msg->conn->pcb.udp == NULL) { - msg->conn->err = ERR_MEM; - sys_mbox_post(msg->conn->mbox, NULL); - return; - } - udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; - case NETCONN_UDPNOCHKSUM: - msg->conn->pcb.udp = udp_new(); - if (msg->conn->pcb.udp == NULL) { - msg->conn->err = ERR_MEM; - sys_mbox_post(msg->conn->mbox, NULL); - return; - } - udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; - case NETCONN_UDP: - msg->conn->pcb.udp = udp_new(); - if (msg->conn->pcb.udp == NULL) { - msg->conn->err = ERR_MEM; - sys_mbox_post(msg->conn->mbox, NULL); - return; - } - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - msg->conn->pcb.tcp = tcp_new(); - if (msg->conn->pcb.tcp == NULL) { - msg->conn->err = ERR_MEM; - sys_mbox_post(msg->conn->mbox, NULL); - return; - } -#endif - default: - break; - } - } - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - raw_connect(msg->conn->pcb.raw, msg->msg.bc.ipaddr); - sys_mbox_post(msg->conn->mbox, NULL); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - udp_connect(msg->conn->pcb.udp, msg->msg.bc.ipaddr, msg->msg.bc.port); - sys_mbox_post(msg->conn->mbox, NULL); - break; -#endif -#if LWIP_TCP - case NETCONN_TCP: - /* tcp_arg(msg->conn->pcb.tcp, msg->conn);*/ - setup_tcp(msg->conn); - tcp_connect(msg->conn->pcb.tcp, msg->msg.bc.ipaddr, msg->msg.bc.port, - do_connected); - /*tcp_output(msg->conn->pcb.tcp);*/ -#endif - - default: - break; - } -} - -static void -do_disconnect(struct api_msg_msg *msg) -{ - - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - /* Do nothing as connecting is only a helper for upper lwip layers */ - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - udp_disconnect(msg->conn->pcb.udp); - break; -#endif - case NETCONN_TCP: - break; - } - sys_mbox_post(msg->conn->mbox, NULL); -} - - -static void -do_listen(struct api_msg_msg *msg) -{ - if (msg->conn->pcb.tcp != NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - LWIP_DEBUGF(API_MSG_DEBUG, ("api_msg: listen RAW: cannot listen for RAW.\n")); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - LWIP_DEBUGF(API_MSG_DEBUG, ("api_msg: listen UDP: cannot listen for UDP.\n")); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - msg->conn->pcb.tcp = tcp_listen(msg->conn->pcb.tcp); - if (msg->conn->pcb.tcp == NULL) { - msg->conn->err = ERR_MEM; - } else { - if (msg->conn->acceptmbox == SYS_MBOX_NULL) { - msg->conn->acceptmbox = sys_mbox_new(); - if (msg->conn->acceptmbox == SYS_MBOX_NULL) { - msg->conn->err = ERR_MEM; - break; - } - } - tcp_arg(msg->conn->pcb.tcp, msg->conn); - tcp_accept(msg->conn->pcb.tcp, accept_function); - } -#endif - default: - break; - } - } - sys_mbox_post(msg->conn->mbox, NULL); -} - -static void -do_accept(struct api_msg_msg *msg) -{ - if (msg->conn->pcb.tcp != NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - LWIP_DEBUGF(API_MSG_DEBUG, ("api_msg: accept RAW: cannot accept for RAW.\n")); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - LWIP_DEBUGF(API_MSG_DEBUG, ("api_msg: accept UDP: cannot accept for UDP.\n")); - break; -#endif /* LWIP_UDP */ - case NETCONN_TCP: - break; - } - } -} - -static void -do_send(struct api_msg_msg *msg) -{ - if (msg->conn->pcb.tcp != NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - raw_send(msg->conn->pcb.raw, msg->msg.p); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - udp_send(msg->conn->pcb.udp, msg->msg.p); - break; -#endif /* LWIP_UDP */ - case NETCONN_TCP: - break; - } - } - sys_mbox_post(msg->conn->mbox, NULL); -} - -static void -do_recv(struct api_msg_msg *msg) -{ -#if LWIP_TCP - if (msg->conn->pcb.tcp != NULL) { - if (msg->conn->type == NETCONN_TCP) { - tcp_recved(msg->conn->pcb.tcp, msg->msg.len); - } - } -#endif - sys_mbox_post(msg->conn->mbox, NULL); -} - -static void -do_write(struct api_msg_msg *msg) -{ -#if LWIP_TCP - err_t err; -#endif - if (msg->conn->pcb.tcp != NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - msg->conn->err = ERR_VAL; - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - msg->conn->err = ERR_VAL; - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - err = tcp_write(msg->conn->pcb.tcp, msg->msg.w.dataptr, - msg->msg.w.len, msg->msg.w.copy); - /* This is the Nagle algorithm: inhibit the sending of new TCP - segments when new outgoing data arrives from the user if any - previously transmitted data on the connection remains - unacknowledged. */ - if(err == ERR_OK && (msg->conn->pcb.tcp->unacked == NULL || (msg->conn->pcb.tcp->flags & TF_NODELAY)) ) { - tcp_output(msg->conn->pcb.tcp); - } - msg->conn->err = err; - if (msg->conn->callback) - if (err == ERR_OK) - { - if (tcp_sndbuf(msg->conn->pcb.tcp) <= TCP_SNDLOWAT) - (*msg->conn->callback)(msg->conn, NETCONN_EVT_SENDMINUS, msg->msg.w.len); - } -#endif - default: - break; - } - } - sys_mbox_post(msg->conn->mbox, NULL); -} - -static void -do_close(struct api_msg_msg *msg) -{ - err_t err; - - err = ERR_OK; - - if (msg->conn->pcb.tcp != NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - if (msg->conn->pcb.tcp->state == LISTEN) { - err = tcp_close(msg->conn->pcb.tcp); - } - msg->conn->err = err; -#endif - default: - break; - } - } - sys_mbox_post(msg->conn->mbox, NULL); -} - -typedef void (* api_msg_decode)(struct api_msg_msg *msg); -static api_msg_decode decode[API_MSG_MAX] = { - do_newconn, - do_delconn, - do_bind, - do_connect, - do_disconnect, - do_listen, - do_accept, - do_send, - do_recv, - do_write, - do_close - }; -void -api_msg_input(struct api_msg *msg) -{ - decode[msg->type](&(msg->msg)); -} - -void -api_msg_post(struct api_msg *msg) -{ - tcpip_apimsg(msg); -} - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/err.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/err.c deleted file mode 100644 index b582d88a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/err.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/err.h" - -#ifdef LWIP_DEBUG - -static char *err_strerr[] = {"Ok.", - "Out of memory error.", - "Buffer error.", - "Connection aborted.", - "Connection reset.", - "Connection closed.", - "Not connected.", - "Illegal value.", - "Illegal argument.", - "Routing problem.", - "Address in use." -}; - - -char * -lwip_strerr(err_t err) -{ - return err_strerr[-err]; - -} - - -#endif /* LWIP_DEBUG */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/sockets.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/sockets.c deleted file mode 100644 index 290a7b73..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/sockets.c +++ /dev/null @@ -1,1362 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - * Improved by Marc Boucher and David Haas - * - */ - -#include -#include - -#include "lwip/opt.h" -#include "lwip/api.h" -#include "lwip/arch.h" -#include "lwip/sys.h" - -#include "lwip/sockets.h" - -#define NUM_SOCKETS MEMP_NUM_NETCONN - -struct lwip_socket { - struct netconn *conn; - struct netbuf *lastdata; - u16_t lastoffset; - u16_t rcvevent; - u16_t sendevent; - u16_t flags; - int err; -}; - -struct lwip_select_cb -{ - struct lwip_select_cb *next; - fd_set *readset; - fd_set *writeset; - fd_set *exceptset; - int sem_signalled; - sys_sem_t sem; -}; - -static struct lwip_socket sockets[NUM_SOCKETS]; -static struct lwip_select_cb *select_cb_list = 0; - -static sys_sem_t socksem = 0; -static sys_sem_t selectsem = 0; - -static void -event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len); - -static int err_to_errno_table[11] = { - 0, /* ERR_OK 0 No error, everything OK. */ - ENOMEM, /* ERR_MEM -1 Out of memory error. */ - ENOBUFS, /* ERR_BUF -2 Buffer error. */ - ECONNABORTED, /* ERR_ABRT -3 Connection aborted. */ - ECONNRESET, /* ERR_RST -4 Connection reset. */ - ESHUTDOWN, /* ERR_CLSD -5 Connection closed. */ - ENOTCONN, /* ERR_CONN -6 Not connected. */ - EINVAL, /* ERR_VAL -7 Illegal value. */ - EIO, /* ERR_ARG -8 Illegal argument. */ - EHOSTUNREACH, /* ERR_RTE -9 Routing problem. */ - EADDRINUSE /* ERR_USE -10 Address in use. */ -}; - -#define ERR_TO_ERRNO_TABLE_SIZE \ - (sizeof(err_to_errno_table)/sizeof(err_to_errno_table[0])) - -#define err_to_errno(err) \ - (-(err) >= 0 && -(err) < ERR_TO_ERRNO_TABLE_SIZE ? \ - err_to_errno_table[-(err)] : EIO) - -#ifdef ERRNO -#define set_errno(err) errno = (err) -#else -#define set_errno(err) -#endif - -#define sock_set_errno(sk, e) do { \ - sk->err = (e); \ - set_errno(sk->err); \ -} while (0) - - -static struct lwip_socket * -get_socket(int s) -{ - struct lwip_socket *sock; - - if ((s < 0) || (s > NUM_SOCKETS)) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): invalid\n", s)); - set_errno(EBADF); - return NULL; - } - - sock = &sockets[s]; - - if (!sock->conn) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): not active\n", s)); - set_errno(EBADF); - return NULL; - } - - return sock; -} - -static int -alloc_socket(struct netconn *newconn) -{ - int i; - - if (!socksem) - socksem = sys_sem_new(1); - - /* Protect socket array */ - sys_sem_wait(socksem); - - /* allocate a new socket identifier */ - for(i = 0; i < NUM_SOCKETS; ++i) { - if (!sockets[i].conn) { - sockets[i].conn = newconn; - sockets[i].lastdata = NULL; - sockets[i].lastoffset = 0; - sockets[i].rcvevent = 0; - sockets[i].sendevent = 1; /* TCP send buf is empty */ - sockets[i].flags = 0; - sockets[i].err = 0; - sys_sem_signal(socksem); - return i; - } - } - sys_sem_signal(socksem); - return -1; -} - -int -lwip_accept(int s, struct sockaddr *addr, socklen_t *addrlen) -{ - struct lwip_socket *sock; - struct netconn *newconn; - struct ip_addr naddr; - u16_t port; - int newsock; - struct sockaddr_in sin; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d)...\n", s)); - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - newconn = netconn_accept(sock->conn); - - /* get the IP address and port of the remote host */ - netconn_peer(newconn, &naddr, &port); - - memset(&sin, 0, sizeof(sin)); - sin.sin_len = sizeof(sin); - sin.sin_family = AF_INET; - sin.sin_port = htons(port); - sin.sin_addr.s_addr = naddr.addr; - - if (*addrlen > sizeof(sin)) - *addrlen = sizeof(sin); - - memcpy(addr, &sin, *addrlen); - - newsock = alloc_socket(newconn); - if (newsock == -1) { - netconn_delete(newconn); - sock_set_errno(sock, ENOBUFS); - return -1; - } - newconn->callback = event_callback; - sock = get_socket(newsock); - - sys_sem_wait(socksem); - sock->rcvevent += -1 - newconn->socket; - newconn->socket = newsock; - sys_sem_signal(socksem); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d) returning new sock=%d addr=", s, newsock)); - ip_addr_debug_print(SOCKETS_DEBUG, &naddr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%u\n", port)); - - sock_set_errno(sock, 0); - return newsock; -} - -int -lwip_bind(int s, struct sockaddr *name, socklen_t namelen) -{ - struct lwip_socket *sock; - struct ip_addr local_addr; - u16_t local_port; - err_t err; - - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - local_addr.addr = ((struct sockaddr_in *)name)->sin_addr.s_addr; - local_port = ((struct sockaddr_in *)name)->sin_port; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_bind(%d, addr=", s)); - ip_addr_debug_print(SOCKETS_DEBUG, &local_addr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%u)\n", ntohs(local_port))); - - err = netconn_bind(sock->conn, &local_addr, ntohs(local_port)); - - if (err != ERR_OK) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_bind(%d) failed, err=%d\n", s, err)); - sock_set_errno(sock, err_to_errno(err)); - return -1; - } - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_bind(%d) succeeded\n", s)); - sock_set_errno(sock, 0); - return 0; -} - -int -lwip_close(int s) -{ - struct lwip_socket *sock; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_close(%d)\n", s)); - if (!socksem) - socksem = sys_sem_new(1); - - /* We cannot allow multiple closes of the same socket. */ - sys_sem_wait(socksem); - - sock = get_socket(s); - if (!sock) { - sys_sem_signal(socksem); - set_errno(EBADF); - return -1; - } - - netconn_delete(sock->conn); - if (sock->lastdata) { - netbuf_delete(sock->lastdata); - } - sock->lastdata = NULL; - sock->lastoffset = 0; - sock->conn = NULL; - sys_sem_signal(socksem); - sock_set_errno(sock, 0); - return 0; -} - -int -lwip_connect(int s, struct sockaddr *name, socklen_t namelen) -{ - struct lwip_socket *sock; - err_t err; - - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - if (((struct sockaddr_in *)name)->sin_family == AF_UNSPEC) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, AF_UNSPEC)\n", s)); - err = netconn_disconnect(sock->conn); - } else { - struct ip_addr remote_addr; - u16_t remote_port; - - remote_addr.addr = ((struct sockaddr_in *)name)->sin_addr.s_addr; - remote_port = ((struct sockaddr_in *)name)->sin_port; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, addr=", s)); - ip_addr_debug_print(SOCKETS_DEBUG, &remote_addr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%u)\n", ntohs(remote_port))); - - err = netconn_connect(sock->conn, &remote_addr, ntohs(remote_port)); - } - - if (err != ERR_OK) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) failed, err=%d\n", s, err)); - sock_set_errno(sock, err_to_errno(err)); - return -1; - } - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) succeeded\n", s)); - sock_set_errno(sock, 0); - return 0; -} - -int -lwip_listen(int s, int backlog) -{ - struct lwip_socket *sock; - err_t err; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_listen(%d, backlog=%d)\n", s, backlog)); - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - err = netconn_listen(sock->conn); - - if (err != ERR_OK) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_listen(%d) failed, err=%d\n", s, err)); - sock_set_errno(sock, err_to_errno(err)); - return -1; - } - - sock_set_errno(sock, 0); - return 0; -} - -int -lwip_recvfrom(int s, void *mem, int len, unsigned int flags, - struct sockaddr *from, socklen_t *fromlen) -{ - struct lwip_socket *sock; - struct netbuf *buf; - u16_t buflen, copylen; - struct ip_addr *addr; - u16_t port; - - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d, %p, %d, 0x%x, ..)\n", s, mem, len, flags)); - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - /* Check if there is data left from the last recv operation. */ - if (sock->lastdata) { - buf = sock->lastdata; - } else { - /* If this is non-blocking call, then check first */ - if (((flags & MSG_DONTWAIT) || (sock->flags & O_NONBLOCK)) - && !sock->rcvevent) - { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): returning EWOULDBLOCK\n", s)); - sock_set_errno(sock, EWOULDBLOCK); - return -1; - } - - /* No data was left from the previous operation, so we try to get - some from the network. */ - buf = netconn_recv(sock->conn); - - if (!buf) { - /* We should really do some error checking here. */ - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): buf == NULL!\n", s)); - sock_set_errno(sock, 0); - return 0; - } - } - - buflen = netbuf_len(buf); - - buflen -= sock->lastoffset; - - if (len > buflen) { - copylen = buflen; - } else { - copylen = len; - } - - /* copy the contents of the received buffer into - the supplied memory pointer mem */ - netbuf_copy_partial(buf, mem, copylen, sock->lastoffset); - - /* Check to see from where the data was. */ - if (from && fromlen) { - struct sockaddr_in sin; - - addr = netbuf_fromaddr(buf); - port = netbuf_fromport(buf); - - memset(&sin, 0, sizeof(sin)); - sin.sin_len = sizeof(sin); - sin.sin_family = AF_INET; - sin.sin_port = htons(port); - sin.sin_addr.s_addr = addr->addr; - - if (*fromlen > sizeof(sin)) - *fromlen = sizeof(sin); - - memcpy(from, &sin, *fromlen); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): addr=", s)); - ip_addr_debug_print(SOCKETS_DEBUG, addr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%u len=%u\n", port, copylen)); - } else { -#if SOCKETS_DEBUG - addr = netbuf_fromaddr(buf); - port = netbuf_fromport(buf); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): addr=", s)); - ip_addr_debug_print(SOCKETS_DEBUG, addr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%u len=%u\n", port, copylen)); -#endif - - } - - /* If this is a TCP socket, check if there is data left in the - buffer. If so, it should be saved in the sock structure for next - time around. */ - if (netconn_type(sock->conn) == NETCONN_TCP && buflen - copylen > 0) { - sock->lastdata = buf; - sock->lastoffset += copylen; - } else { - sock->lastdata = NULL; - sock->lastoffset = 0; - netbuf_delete(buf); - } - - - sock_set_errno(sock, 0); - return copylen; -} - -int -lwip_read(int s, void *mem, int len) -{ - return lwip_recvfrom(s, mem, len, 0, NULL, NULL); -} - -int -lwip_recv(int s, void *mem, int len, unsigned int flags) -{ - return lwip_recvfrom(s, mem, len, flags, NULL, NULL); -} - -int -lwip_send(int s, void *data, int size, unsigned int flags) -{ - struct lwip_socket *sock; - struct netbuf *buf; - err_t err; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d, data=%p, size=%d, flags=0x%x)\n", s, data, size, flags)); - - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - switch (netconn_type(sock->conn)) { - case NETCONN_RAW: - case NETCONN_UDP: - case NETCONN_UDPLITE: - case NETCONN_UDPNOCHKSUM: - /* create a buffer */ - buf = netbuf_new(); - - if (!buf) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) ENOBUFS\n", s)); - sock_set_errno(sock, ENOBUFS); - return -1; - } - - /* make the buffer point to the data that should - be sent */ - netbuf_ref(buf, data, size); - - /* send the data */ - err = netconn_send(sock->conn, buf); - - /* deallocated the buffer */ - netbuf_delete(buf); - break; - case NETCONN_TCP: - err = netconn_write(sock->conn, data, size, NETCONN_COPY); - break; - default: - err = ERR_ARG; - break; - } - if (err != ERR_OK) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) err=%d\n", s, err)); - sock_set_errno(sock, err_to_errno(err)); - return -1; - } - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) ok size=%d\n", s, size)); - sock_set_errno(sock, 0); - return size; -} - -int -lwip_sendto(int s, void *data, int size, unsigned int flags, - struct sockaddr *to, socklen_t tolen) -{ - struct lwip_socket *sock; - struct ip_addr remote_addr, addr; - u16_t remote_port, port; - int ret,connected; - - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - /* get the peer if currently connected */ - connected = (netconn_peer(sock->conn, &addr, &port) == ERR_OK); - - remote_addr.addr = ((struct sockaddr_in *)to)->sin_addr.s_addr; - remote_port = ((struct sockaddr_in *)to)->sin_port; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_sendto(%d, data=%p, size=%d, flags=0x%x to=", s, data, size, flags)); - ip_addr_debug_print(SOCKETS_DEBUG, &remote_addr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%u\n", ntohs(remote_port))); - - netconn_connect(sock->conn, &remote_addr, ntohs(remote_port)); - - ret = lwip_send(s, data, size, flags); - - /* reset the remote address and port number - of the connection */ - if (connected) - netconn_connect(sock->conn, &addr, port); - else - netconn_disconnect(sock->conn); - return ret; -} - -int -lwip_socket(int domain, int type, int protocol) -{ - struct netconn *conn; - int i; - - /* create a netconn */ - switch (type) { - case SOCK_RAW: - conn = netconn_new_with_proto_and_callback(NETCONN_RAW, protocol, event_callback); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_RAW, %d) = ", domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol)); - break; - case SOCK_DGRAM: - conn = netconn_new_with_callback(NETCONN_UDP, event_callback); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_DGRAM, %d) = ", domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol)); - break; - case SOCK_STREAM: - conn = netconn_new_with_callback(NETCONN_TCP, event_callback); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_STREAM, %d) = ", domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol)); - break; - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%d, %d/UNKNOWN, %d) = -1\n", domain, type, protocol)); - set_errno(EINVAL); - return -1; - } - - if (!conn) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("-1 / ENOBUFS (could not create netconn)\n")); - set_errno(ENOBUFS); - return -1; - } - - i = alloc_socket(conn); - - if (i == -1) { - netconn_delete(conn); - set_errno(ENOBUFS); - return -1; - } - conn->socket = i; - LWIP_DEBUGF(SOCKETS_DEBUG, ("%d\n", i)); - set_errno(0); - return i; -} - -int -lwip_write(int s, void *data, int size) -{ - return lwip_send(s, data, size, 0); -} - - -static int -lwip_selscan(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset) -{ - int i, nready = 0; - fd_set lreadset, lwriteset, lexceptset; - struct lwip_socket *p_sock; - - FD_ZERO(&lreadset); - FD_ZERO(&lwriteset); - FD_ZERO(&lexceptset); - - /* Go through each socket in each list to count number of sockets which - currently match */ - for(i = 0; i < maxfdp1; i++) - { - if (FD_ISSET(i, readset)) - { - /* See if netconn of this socket is ready for read */ - p_sock = get_socket(i); - if (p_sock && (p_sock->lastdata || p_sock->rcvevent)) - { - FD_SET(i, &lreadset); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_selscan: fd=%d ready for reading\n", i)); - nready++; - } - } - if (FD_ISSET(i, writeset)) - { - /* See if netconn of this socket is ready for write */ - p_sock = get_socket(i); - if (p_sock && p_sock->sendevent) - { - FD_SET(i, &lwriteset); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_selscan: fd=%d ready for writing\n", i)); - nready++; - } - } - } - *readset = lreadset; - *writeset = lwriteset; - FD_ZERO(exceptset); - - return nready; -} - - - -int -lwip_select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset, - struct timeval *timeout) -{ - int i; - int nready; - fd_set lreadset, lwriteset, lexceptset; - u32_t msectimeout; - struct lwip_select_cb select_cb; - struct lwip_select_cb *p_selcb; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select(%d, %p, %p, %p, tvsec=%ld tvusec=%ld)\n", maxfdp1, (void *)readset, (void *) writeset, (void *) exceptset, timeout ? timeout->tv_sec : -1L, timeout ? timeout->tv_usec : -1L)); - - select_cb.next = 0; - select_cb.readset = readset; - select_cb.writeset = writeset; - select_cb.exceptset = exceptset; - select_cb.sem_signalled = 0; - - /* Protect ourselves searching through the list */ - if (!selectsem) - selectsem = sys_sem_new(1); - sys_sem_wait(selectsem); - - if (readset) - lreadset = *readset; - else - FD_ZERO(&lreadset); - if (writeset) - lwriteset = *writeset; - else - FD_ZERO(&lwriteset); - if (exceptset) - lexceptset = *exceptset; - else - FD_ZERO(&lexceptset); - - /* Go through each socket in each list to count number of sockets which - currently match */ - nready = lwip_selscan(maxfdp1, &lreadset, &lwriteset, &lexceptset); - - /* If we don't have any current events, then suspend if we are supposed to */ - if (!nready) - { - if (timeout && timeout->tv_sec == 0 && timeout->tv_usec == 0) - { - sys_sem_signal(selectsem); - if (readset) - FD_ZERO(readset); - if (writeset) - FD_ZERO(writeset); - if (exceptset) - FD_ZERO(exceptset); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select: no timeout, returning 0\n")); - set_errno(0); - - return 0; - } - - /* add our semaphore to list */ - /* We don't actually need any dynamic memory. Our entry on the - * list is only valid while we are in this function, so it's ok - * to use local variables */ - - select_cb.sem = sys_sem_new(0); - /* Note that we are still protected */ - /* Put this select_cb on top of list */ - select_cb.next = select_cb_list; - select_cb_list = &select_cb; - - /* Now we can safely unprotect */ - sys_sem_signal(selectsem); - - /* Now just wait to be woken */ - if (timeout == 0) - /* Wait forever */ - msectimeout = 0; - else - msectimeout = ((timeout->tv_sec * 1000) + ((timeout->tv_usec + 500)/1000)); - - i = sys_sem_wait_timeout(select_cb.sem, msectimeout); - - /* Take us off the list */ - sys_sem_wait(selectsem); - if (select_cb_list == &select_cb) - select_cb_list = select_cb.next; - else - for (p_selcb = select_cb_list; p_selcb; p_selcb = p_selcb->next) - if (p_selcb->next == &select_cb) - { - p_selcb->next = select_cb.next; - break; - } - - sys_sem_signal(selectsem); - - sys_sem_free(select_cb.sem); - if (i == 0) /* Timeout */ - { - if (readset) - FD_ZERO(readset); - if (writeset) - FD_ZERO(writeset); - if (exceptset) - FD_ZERO(exceptset); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select: timeout expired\n")); - set_errno(0); - - return 0; - } - - if (readset) - lreadset = *readset; - else - FD_ZERO(&lreadset); - if (writeset) - lwriteset = *writeset; - else - FD_ZERO(&lwriteset); - if (exceptset) - lexceptset = *exceptset; - else - FD_ZERO(&lexceptset); - - /* See what's set */ - nready = lwip_selscan(maxfdp1, &lreadset, &lwriteset, &lexceptset); - } - else - sys_sem_signal(selectsem); - - if (readset) - *readset = lreadset; - if (writeset) - *writeset = lwriteset; - if (exceptset) - *exceptset = lexceptset; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select: nready=%d\n", nready)); - set_errno(0); - - return nready; -} - - -static void -event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len) -{ - int s; - struct lwip_socket *sock; - struct lwip_select_cb *scb; - - /* Get socket */ - if (conn) - { - s = conn->socket; - if (s < 0) - { - /* Data comes in right away after an accept, even though - * the server task might not have created a new socket yet. - * Just count down (or up) if that's the case and we - * will use the data later. Note that only receive events - * can happen before the new socket is set up. */ - if (evt == NETCONN_EVT_RCVPLUS) - conn->socket--; - return; - } - - sock = get_socket(s); - if (!sock) - return; - } - else - return; - - if (!selectsem) - selectsem = sys_sem_new(1); - - sys_sem_wait(selectsem); - /* Set event as required */ - switch (evt) - { - case NETCONN_EVT_RCVPLUS: - sock->rcvevent++; - break; - case NETCONN_EVT_RCVMINUS: - sock->rcvevent--; - break; - case NETCONN_EVT_SENDPLUS: - sock->sendevent = 1; - break; - case NETCONN_EVT_SENDMINUS: - sock->sendevent = 0; - break; - } - sys_sem_signal(selectsem); - - /* Now decide if anyone is waiting for this socket */ - /* NOTE: This code is written this way to protect the select link list - but to avoid a deadlock situation by releasing socksem before - signalling for the select. This means we need to go through the list - multiple times ONLY IF a select was actually waiting. We go through - the list the number of waiting select calls + 1. This list is - expected to be small. */ - while (1) - { - sys_sem_wait(selectsem); - for (scb = select_cb_list; scb; scb = scb->next) - { - if (scb->sem_signalled == 0) - { - /* Test this select call for our socket */ - if (scb->readset && FD_ISSET(s, scb->readset)) - if (sock->rcvevent) - break; - if (scb->writeset && FD_ISSET(s, scb->writeset)) - if (sock->sendevent) - break; - } - } - if (scb) - { - scb->sem_signalled = 1; - sys_sem_signal(selectsem); - sys_sem_signal(scb->sem); - } else { - sys_sem_signal(selectsem); - break; - } - } - -} - - - - -int lwip_shutdown(int s, int how) -{ - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_shutdown(%d, how=%d)\n", s, how)); - return lwip_close(s); /* XXX temporary hack until proper implementation */ -} - -int lwip_getpeername (int s, struct sockaddr *name, socklen_t *namelen) -{ - struct lwip_socket *sock; - struct sockaddr_in sin; - struct ip_addr naddr; - - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - memset(&sin, 0, sizeof(sin)); - sin.sin_len = sizeof(sin); - sin.sin_family = AF_INET; - - /* get the IP address and port of the remote host */ - netconn_peer(sock->conn, &naddr, &sin.sin_port); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getpeername(%d, addr=", s)); - ip_addr_debug_print(SOCKETS_DEBUG, &naddr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%d)\n", sin.sin_port)); - - sin.sin_port = htons(sin.sin_port); - sin.sin_addr.s_addr = naddr.addr; - - if (*namelen > sizeof(sin)) - *namelen = sizeof(sin); - - memcpy(name, &sin, *namelen); - sock_set_errno(sock, 0); - return 0; -} - -int lwip_getsockname (int s, struct sockaddr *name, socklen_t *namelen) -{ - struct lwip_socket *sock; - struct sockaddr_in sin; - struct ip_addr *naddr; - - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - memset(&sin, 0, sizeof(sin)); - sin.sin_len = sizeof(sin); - sin.sin_family = AF_INET; - - /* get the IP address and port of the remote host */ - netconn_addr(sock->conn, &naddr, &sin.sin_port); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockname(%d, addr=", s)); - ip_addr_debug_print(SOCKETS_DEBUG, naddr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%d)\n", sin.sin_port)); - - sin.sin_port = htons(sin.sin_port); - sin.sin_addr.s_addr = naddr->addr; - - if (*namelen > sizeof(sin)) - *namelen = sizeof(sin); - - memcpy(name, &sin, *namelen); - sock_set_errno(sock, 0); - return 0; -} - -int lwip_getsockopt (int s, int level, int optname, void *optval, socklen_t *optlen) -{ - int err = 0; - struct lwip_socket *sock = get_socket(s); - - if(!sock) { - set_errno(EBADF); - return -1; - } - - if( NULL == optval || NULL == optlen ) { - sock_set_errno( sock, EFAULT ); - return -1; - } - - /* Do length and type checks for the various options first, to keep it readable. */ - switch( level ) { - -/* Level: SOL_SOCKET */ - case SOL_SOCKET: - switch(optname) { - - case SO_ACCEPTCONN: - case SO_BROADCAST: - /* UNIMPL case SO_DEBUG: */ - /* UNIMPL case SO_DONTROUTE: */ - case SO_ERROR: - case SO_KEEPALIVE: - /* UNIMPL case SO_OOBINLINE: */ - /* UNIMPL case SO_RCVBUF: */ - /* UNIMPL case SO_SNDBUF: */ - /* UNIMPL case SO_RCVLOWAT: */ - /* UNIMPL case SO_SNDLOWAT: */ -#if SO_REUSE - case SO_REUSEADDR: - case SO_REUSEPORT: -#endif /* SO_REUSE */ - case SO_TYPE: - /* UNIMPL case SO_USELOOPBACK: */ - if( *optlen < sizeof(int) ) { - err = EINVAL; - } - break; - - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, UNIMPL: optname=0x%x, ..)\n", s, optname)); - err = ENOPROTOOPT; - } /* switch */ - break; - -/* Level: IPPROTO_IP */ - case IPPROTO_IP: - switch(optname) { - /* UNIMPL case IP_HDRINCL: */ - /* UNIMPL case IP_RCVDSTADDR: */ - /* UNIMPL case IP_RCVIF: */ - case IP_TTL: - case IP_TOS: - if( *optlen < sizeof(int) ) { - err = EINVAL; - } - break; - - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, UNIMPL: optname=0x%x, ..)\n", s, optname)); - err = ENOPROTOOPT; - } /* switch */ - break; - -/* Level: IPPROTO_TCP */ - case IPPROTO_TCP: - if( *optlen < sizeof(int) ) { - err = EINVAL; - break; - } - - /* If this is no TCP socket, ignore any options. */ - if ( sock->conn->type != NETCONN_TCP ) return 0; - - switch( optname ) { - case TCP_NODELAY: - case TCP_KEEPALIVE: - break; - - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_TCP, UNIMPL: optname=0x%x, ..)\n", s, optname)); - err = ENOPROTOOPT; - } /* switch */ - break; - -/* UNDEFINED LEVEL */ - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, level=0x%x, UNIMPL: optname=0x%x, ..)\n", s, level, optname)); - err = ENOPROTOOPT; - } /* switch */ - - - if( 0 != err ) { - sock_set_errno(sock, err); - return -1; - } - - - - /* Now do the actual option processing */ - - switch(level) { - -/* Level: SOL_SOCKET */ - case SOL_SOCKET: - switch( optname ) { - - /* The option flags */ - case SO_ACCEPTCONN: - case SO_BROADCAST: - /* UNIMPL case SO_DEBUG: */ - /* UNIMPL case SO_DONTROUTE: */ - case SO_KEEPALIVE: - /* UNIMPL case SO_OOBINCLUDE: */ -#if SO_REUSE - case SO_REUSEADDR: - case SO_REUSEPORT: -#endif /* SO_REUSE */ - /*case SO_USELOOPBACK: UNIMPL */ - *(int*)optval = sock->conn->pcb.tcp->so_options & optname; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, optname=0x%x, ..) = %s\n", s, optname, (*(int*)optval?"on":"off"))); - break; - - case SO_TYPE: - switch (sock->conn->type) { - case NETCONN_RAW: - *(int*)optval = SOCK_RAW; - break; - case NETCONN_TCP: - *(int*)optval = SOCK_STREAM; - break; - case NETCONN_UDP: - case NETCONN_UDPLITE: - case NETCONN_UDPNOCHKSUM: - *(int*)optval = SOCK_DGRAM; - break; - default: /* unrecognized socket type */ - *(int*)optval = sock->conn->type; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, SO_TYPE): unrecognized socket type %d\n", s, *(int *)optval)); - } /* switch */ - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, SO_TYPE) = %d\n", s, *(int *)optval)); - break; - - case SO_ERROR: - *(int *)optval = sock->err; - sock->err = 0; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, SO_ERROR) = %d\n", s, *(int *)optval)); - break; - } /* switch */ - break; - -/* Level: IPPROTO_IP */ - case IPPROTO_IP: - switch( optname ) { - case IP_TTL: - *(int*)optval = sock->conn->pcb.tcp->ttl; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_TTL) = %d\n", s, *(int *)optval)); - break; - case IP_TOS: - *(int*)optval = sock->conn->pcb.tcp->tos; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_TOS) = %d\n", s, *(int *)optval)); - break; - } /* switch */ - break; - -/* Level: IPPROTO_TCP */ - case IPPROTO_TCP: - switch( optname ) { - case TCP_NODELAY: - *(int*)optval = (sock->conn->pcb.tcp->flags & TF_NODELAY); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_TCP, TCP_NODELAY) = %s\n", s, (*(int*)optval)?"on":"off") ); - break; - case TCP_KEEPALIVE: - *(int*)optval = (int)sock->conn->pcb.tcp->keepalive; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, TCP_KEEPALIVE) = %d\n", s, *(int *)optval)); - break; - } /* switch */ - break; - } - - - sock_set_errno(sock, err); - return err ? -1 : 0; -} - -int lwip_setsockopt (int s, int level, int optname, const void *optval, socklen_t optlen) -{ - struct lwip_socket *sock = get_socket(s); - int err = 0; - - if(!sock) { - set_errno(EBADF); - return -1; - } - - if( NULL == optval ) { - sock_set_errno( sock, EFAULT ); - return -1; - } - - - /* Do length and type checks for the various options first, to keep it readable. */ - switch( level ) { - -/* Level: SOL_SOCKET */ - case SOL_SOCKET: - switch(optname) { - - case SO_BROADCAST: - /* UNIMPL case SO_DEBUG: */ - /* UNIMPL case SO_DONTROUTE: */ - case SO_KEEPALIVE: - /* UNIMPL case SO_OOBINLINE: */ - /* UNIMPL case SO_RCVBUF: */ - /* UNIMPL case SO_SNDBUF: */ - /* UNIMPL case SO_RCVLOWAT: */ - /* UNIMPL case SO_SNDLOWAT: */ -#if SO_REUSE - case SO_REUSEADDR: - case SO_REUSEPORT: -#endif /* SO_REUSE */ - /* UNIMPL case SO_USELOOPBACK: */ - if( optlen < sizeof(int) ) { - err = EINVAL; - } - break; - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, SOL_SOCKET, UNIMPL: optname=0x%x, ..)\n", s, optname)); - err = ENOPROTOOPT; - } /* switch */ - break; - -/* Level: IPPROTO_IP */ - case IPPROTO_IP: - switch(optname) { - /* UNIMPL case IP_HDRINCL: */ - /* UNIMPL case IP_RCVDSTADDR: */ - /* UNIMPL case IP_RCVIF: */ - case IP_TTL: - case IP_TOS: - if( optlen < sizeof(int) ) { - err = EINVAL; - } - break; - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_IP, UNIMPL: optname=0x%x, ..)\n", s, optname)); - err = ENOPROTOOPT; - } /* switch */ - break; - -/* Level: IPPROTO_TCP */ - case IPPROTO_TCP: - if( optlen < sizeof(int) ) { - err = EINVAL; - break; - } - - /* If this is no TCP socket, ignore any options. */ - if ( sock->conn->type != NETCONN_TCP ) return 0; - - switch( optname ) { - case TCP_NODELAY: - case TCP_KEEPALIVE: - break; - - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, UNIMPL: optname=0x%x, ..)\n", s, optname)); - err = ENOPROTOOPT; - } /* switch */ - break; - -/* UNDEFINED LEVEL */ - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, level=0x%x, UNIMPL: optname=0x%x, ..)\n", s, level, optname)); - err = ENOPROTOOPT; - } /* switch */ - - - if( 0 != err ) { - sock_set_errno(sock, err); - return -1; - } - - - - /* Now do the actual option processing */ - - switch(level) { - -/* Level: SOL_SOCKET */ - case SOL_SOCKET: - switch(optname) { - - /* The option flags */ - case SO_BROADCAST: - /* UNIMPL case SO_DEBUG: */ - /* UNIMPL case SO_DONTROUTE: */ - case SO_KEEPALIVE: - /* UNIMPL case SO_OOBINCLUDE: */ -#if SO_REUSE - case SO_REUSEADDR: - case SO_REUSEPORT: -#endif /* SO_REUSE */ - /* UNIMPL case SO_USELOOPBACK: */ - if ( *(int*)optval ) { - sock->conn->pcb.tcp->so_options |= optname; - } else { - sock->conn->pcb.tcp->so_options &= ~optname; - } - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, SOL_SOCKET, optname=0x%x, ..) -> %s\n", s, optname, (*(int*)optval?"on":"off"))); - break; - } /* switch */ - break; - -/* Level: IPPROTO_IP */ - case IPPROTO_IP: - switch( optname ) { - case IP_TTL: - sock->conn->pcb.tcp->ttl = (u8_t)(*(int*)optval); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_IP, IP_TTL, ..) -> %u\n", s, sock->conn->pcb.tcp->ttl)); - break; - case IP_TOS: - sock->conn->pcb.tcp->tos = (u8_t)(*(int*)optval); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_IP, IP_TOS, ..)-> %u\n", s, sock->conn->pcb.tcp->tos)); - break; - } /* switch */ - break; - -/* Level: IPPROTO_TCP */ - case IPPROTO_TCP: - switch( optname ) { - case TCP_NODELAY: - if ( *(int*)optval ) { - sock->conn->pcb.tcp->flags |= TF_NODELAY; - } else { - sock->conn->pcb.tcp->flags &= ~TF_NODELAY; - } - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_NODELAY) -> %s\n", s, (*(int *)optval)?"on":"off") ); - break; - case TCP_KEEPALIVE: - sock->conn->pcb.tcp->keepalive = (u32_t)(*(int*)optval); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_KEEPALIVE) -> %lu\n", s, sock->conn->pcb.tcp->keepalive)); - break; - } /* switch */ - break; - } /* switch */ - - sock_set_errno(sock, err); - return err ? -1 : 0; -} - -int lwip_ioctl(int s, long cmd, void *argp) -{ - struct lwip_socket *sock = get_socket(s); - - if(!sock) { - set_errno(EBADF); - return -1; - } - - switch (cmd) { - case FIONREAD: - if (!argp) { - sock_set_errno(sock, EINVAL); - return -1; - } - - *((u16_t*)argp) = sock->conn->recv_avail; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONREAD, %p) = %u\n", s, argp, *((u16_t*)argp))); - sock_set_errno(sock, 0); - return 0; - - case FIONBIO: - if (argp && *(u32_t*)argp) - sock->flags |= O_NONBLOCK; - else - sock->flags &= ~O_NONBLOCK; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONBIO, %d)\n", s, !!(sock->flags & O_NONBLOCK))); - sock_set_errno(sock, 0); - return 0; - - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, UNIMPL: 0x%lx, %p)\n", s, cmd, argp)); - sock_set_errno(sock, ENOSYS); /* not yet implemented */ - return -1; - } -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/tcpip.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/tcpip.c deleted file mode 100644 index ce8a2ca5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/api/tcpip.c +++ /dev/null @@ -1,198 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/opt.h" - -#include "lwip/sys.h" - -#include "lwip/memp.h" -#include "lwip/pbuf.h" - -#include "lwip/ip.h" -#include "lwip/ip_frag.h" -#include "lwip/udp.h" -#include "lwip/tcp.h" - -#include "lwip/tcpip.h" - -static void (* tcpip_init_done)(void *arg) = NULL; -static void *tcpip_init_done_arg; -static sys_mbox_t mbox; - -#if LWIP_TCP -static int tcpip_tcp_timer_active = 0; - -static void -tcpip_tcp_timer(void *arg) -{ - (void)arg; - - /* call TCP timer handler */ - tcp_tmr(); - /* timer still needed? */ - if (tcp_active_pcbs || tcp_tw_pcbs) { - /* restart timer */ - sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); - } else { - /* disable timer */ - tcpip_tcp_timer_active = 0; - } -} - -#if !NO_SYS -void -tcp_timer_needed(void) -{ - /* timer is off but needed again? */ - if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) { - /* enable and start timer */ - tcpip_tcp_timer_active = 1; - sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); - } -} -#endif /* !NO_SYS */ -#endif /* LWIP_TCP */ - -#if IP_REASSEMBLY -static void -ip_timer(void *data) -{ - LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip: ip_reass_tmr()\n")); - ip_reass_tmr(); - sys_timeout(1000, ip_timer, NULL); -} -#endif - -static void -tcpip_thread(void *arg) -{ - struct tcpip_msg *msg; - - (void)arg; - - ip_init(); -#if LWIP_UDP - udp_init(); -#endif -#if LWIP_TCP - tcp_init(); -#endif -#if IP_REASSEMBLY - sys_timeout(1000, ip_timer, NULL); -#endif - if (tcpip_init_done != NULL) { - tcpip_init_done(tcpip_init_done_arg); - } - - while (1) { /* MAIN Loop */ - sys_mbox_fetch(mbox, (void *)&msg); - switch (msg->type) { - case TCPIP_MSG_API: - LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: API message %p\n", (void *)msg)); - api_msg_input(msg->msg.apimsg); - break; - case TCPIP_MSG_INPUT: - LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: IP packet %p\n", (void *)msg)); - ip_input(msg->msg.inp.p, msg->msg.inp.netif); - break; - case TCPIP_MSG_CALLBACK: - LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK %p\n", (void *)msg)); - msg->msg.cb.f(msg->msg.cb.ctx); - break; - default: - break; - } - memp_free(MEMP_TCPIP_MSG, msg); - } -} - -err_t -tcpip_input(struct pbuf *p, struct netif *inp) -{ - struct tcpip_msg *msg; - - msg = memp_malloc(MEMP_TCPIP_MSG); - if (msg == NULL) { - pbuf_free(p); - return ERR_MEM; - } - - msg->type = TCPIP_MSG_INPUT; - msg->msg.inp.p = p; - msg->msg.inp.netif = inp; - sys_mbox_post(mbox, msg); - return ERR_OK; -} - -err_t -tcpip_callback(void (*f)(void *ctx), void *ctx) -{ - struct tcpip_msg *msg; - - msg = memp_malloc(MEMP_TCPIP_MSG); - if (msg == NULL) { - return ERR_MEM; - } - - msg->type = TCPIP_MSG_CALLBACK; - msg->msg.cb.f = f; - msg->msg.cb.ctx = ctx; - sys_mbox_post(mbox, msg); - return ERR_OK; -} - -void -tcpip_apimsg(struct api_msg *apimsg) -{ - struct tcpip_msg *msg; - msg = memp_malloc(MEMP_TCPIP_MSG); - if (msg == NULL) { - memp_free(MEMP_API_MSG, apimsg); - return; - } - msg->type = TCPIP_MSG_API; - msg->msg.apimsg = apimsg; - sys_mbox_post(mbox, msg); -} - -void -tcpip_init(void (* initfunc)(void *), void *arg) -{ - tcpip_init_done = initfunc; - tcpip_init_done_arg = arg; - mbox = sys_mbox_new(); - sys_thread_new(tcpip_thread, NULL, TCPIP_THREAD_PRIO); -} - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/dhcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/dhcp.c deleted file mode 100644 index b688afa1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/dhcp.c +++ /dev/null @@ -1,1455 +0,0 @@ -/** - * @file - * - * Dynamic Host Configuration Protocol client - */ - -/* - * - * Copyright (c) 2001-2004 Leon Woestenberg - * Copyright (c) 2001-2004 Axon Digital Design B.V., The Netherlands. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is a contribution to the lwIP TCP/IP stack. - * The Swedish Institute of Computer Science and Adam Dunkels - * are specifically granted permission to redistribute this - * source code. - * - * Author: Leon Woestenberg - * - * This is a DHCP client for the lwIP TCP/IP stack. It aims to conform - * with RFC 2131 and RFC 2132. - * - * TODO: - * - Proper parsing of DHCP messages exploiting file/sname field overloading. - * - Add JavaDoc style documentation (API, internals). - * - Support for interfaces other than Ethernet (SLIP, PPP, ...) - * - * Please coordinate changes and requests with Leon Woestenberg - * - * - * Integration with your code: - * - * In lwip/dhcp.h - * #define DHCP_COARSE_TIMER_SECS (recommended 60 which is a minute) - * #define DHCP_FINE_TIMER_MSECS (recommended 500 which equals TCP coarse timer) - * - * Then have your application call dhcp_coarse_tmr() and - * dhcp_fine_tmr() on the defined intervals. - * - * dhcp_start(struct netif *netif); - * starts a DHCP client instance which configures the interface by - * obtaining an IP address lease and maintaining it. - * - * Use dhcp_release(netif) to end the lease and use dhcp_stop(netif) - * to remove the DHCP client. - * - */ - -#include - -#include "lwip/stats.h" -#include "lwip/mem.h" -#include "lwip/udp.h" -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/inet.h" -#include "netif/etharp.h" - -#include "lwip/sys.h" -#include "lwip/opt.h" -#include "lwip/dhcp.h" - -#if LWIP_DHCP /* don't build if not configured for use in lwipopt.h */ - -/** global transaction identifier, must be - * unique for each DHCP request. We simply increment, starting - * with this value (easy to match with a packet analyzer) */ -static u32_t xid = 0xABCD0000; - -/** DHCP client state machine functions */ -static void dhcp_handle_ack(struct netif *netif); -static void dhcp_handle_nak(struct netif *netif); -static void dhcp_handle_offer(struct netif *netif); - -static err_t dhcp_discover(struct netif *netif); -static err_t dhcp_select(struct netif *netif); -static void dhcp_check(struct netif *netif); -static void dhcp_bind(struct netif *netif); -static err_t dhcp_decline(struct netif *netif); -static err_t dhcp_rebind(struct netif *netif); -static void dhcp_set_state(struct dhcp *dhcp, u8_t new_state); - -/** receive, unfold, parse and free incoming messages */ -static void dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port); -static err_t dhcp_unfold_reply(struct dhcp *dhcp); -static u8_t *dhcp_get_option_ptr(struct dhcp *dhcp, u8_t option_type); -static u8_t dhcp_get_option_byte(u8_t *ptr); -static u16_t dhcp_get_option_short(u8_t *ptr); -static u32_t dhcp_get_option_long(u8_t *ptr); -static void dhcp_free_reply(struct dhcp *dhcp); - -/** set the DHCP timers */ -static void dhcp_timeout(struct netif *netif); -static void dhcp_t1_timeout(struct netif *netif); -static void dhcp_t2_timeout(struct netif *netif); - -/** build outgoing messages */ -/** create a DHCP request, fill in common headers */ -static err_t dhcp_create_request(struct netif *netif); -/** free a DHCP request */ -static void dhcp_delete_request(struct netif *netif); -/** add a DHCP option (type, then length in bytes) */ -static void dhcp_option(struct dhcp *dhcp, u8_t option_type, u8_t option_len); -/** add option values */ -static void dhcp_option_byte(struct dhcp *dhcp, u8_t value); -static void dhcp_option_short(struct dhcp *dhcp, u16_t value); -static void dhcp_option_long(struct dhcp *dhcp, u32_t value); -/** always add the DHCP options trailer to end and pad */ -static void dhcp_option_trailer(struct dhcp *dhcp); - -/** - * Back-off the DHCP client (because of a received NAK response). - * - * Back-off the DHCP client because of a received NAK. Receiving a - * NAK means the client asked for something non-sensible, for - * example when it tries to renew a lease obtained on another network. - * - * We back-off and will end up restarting a fresh DHCP negotiation later. - * - * @param state pointer to DHCP state structure - */ -static void dhcp_handle_nak(struct netif *netif) { - struct dhcp *dhcp = netif->dhcp; - u16_t msecs = 10 * 1000; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_handle_nak(netif=%p) %c%c%"U16_F"\n", - (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_handle_nak(): set request timeout %"U16_F" msecs\n", msecs)); - dhcp_set_state(dhcp, DHCP_BACKING_OFF); -} - -/** - * Checks if the offered IP address is already in use. - * - * It does so by sending an ARP request for the offered address and - * entering CHECKING state. If no ARP reply is received within a small - * interval, the address is assumed to be free for use by us. - */ -static void dhcp_check(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result; - u16_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_check(netif=%p) %c%c\n", (void *)netif, (s16_t)netif->name[0], - (s16_t)netif->name[1])); - /* create an ARP query for the offered IP address, expecting that no host - responds, as the IP address should not be in use. */ - result = etharp_query(netif, &dhcp->offered_ip_addr, NULL); - if (result != ERR_OK) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_check: could not perform ARP query\n")); - } - dhcp->tries++; - msecs = 500; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_check(): set request timeout %"U16_F" msecs\n", msecs)); - dhcp_set_state(dhcp, DHCP_CHECKING); -} - -/** - * Remember the configuration offered by a DHCP server. - * - * @param state pointer to DHCP state structure - */ -static void dhcp_handle_offer(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - /* obtain the server address */ - u8_t *option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_SERVER_ID); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_handle_offer(netif=%p) %c%c%"U16_F"\n", - (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); - if (option_ptr != NULL) - { - dhcp->server_ip_addr.addr = htonl(dhcp_get_option_long(&option_ptr[2])); - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_handle_offer(): server 0x%08"X32_F"\n", dhcp->server_ip_addr.addr)); - /* remember offered address */ - ip_addr_set(&dhcp->offered_ip_addr, (struct ip_addr *)&dhcp->msg_in->yiaddr); - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_handle_offer(): offer for 0x%08"X32_F"\n", dhcp->offered_ip_addr.addr)); - - dhcp_select(netif); - } -} - -/** - * Select a DHCP server offer out of all offers. - * - * Simply select the first offer received. - * - * @param netif the netif under DHCP control - * @return lwIP specific error (see error.h) - */ -static err_t dhcp_select(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result; - u32_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_select(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); - - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) - { - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_REQUEST); - - dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); - dhcp_option_short(dhcp, 576); - - /* MUST request the offered IP address */ - dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); - dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); - - dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); - dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); - - dhcp_option(dhcp, DHCP_OPTION_PARAMETER_REQUEST_LIST, 4/*num options*/); - dhcp_option_byte(dhcp, DHCP_OPTION_SUBNET_MASK); - dhcp_option_byte(dhcp, DHCP_OPTION_ROUTER); - dhcp_option_byte(dhcp, DHCP_OPTION_BROADCAST); - dhcp_option_byte(dhcp, DHCP_OPTION_DNS_SERVER); - - dhcp_option_trailer(dhcp); - /* shrink the pbuf to the actual content length */ - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - /* TODO: we really should bind to a specific local interface here - but we cannot specify an unconfigured netif as it is addressless */ - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - /* send broadcast to any DHCP server */ - udp_connect(dhcp->pcb, IP_ADDR_BROADCAST, DHCP_SERVER_PORT); - udp_send(dhcp->pcb, dhcp->p_out); - /* reconnect to any (or to server here?!) */ - udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); - dhcp_delete_request(netif); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_select: REQUESTING\n")); - dhcp_set_state(dhcp, DHCP_REQUESTING); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_select: could not allocate DHCP request\n")); - } - dhcp->tries++; - msecs = dhcp->tries < 4 ? dhcp->tries * 1000 : 4 * 1000; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_select(): set request timeout %"U32_F" msecs\n", msecs)); - return result; -} - -/** - * The DHCP timer that checks for lease renewal/rebind timeouts. - * - */ -void dhcp_coarse_tmr() -{ - struct netif *netif = netif_list; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_coarse_tmr()\n")); - /* iterate through all network interfaces */ - while (netif != NULL) { - /* only act on DHCP configured interfaces */ - if (netif->dhcp != NULL) { - /* timer is active (non zero), and triggers (zeroes) now? */ - if (netif->dhcp->t2_timeout-- == 1) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_coarse_tmr(): t2 timeout\n")); - /* this clients' rebind timeout triggered */ - dhcp_t2_timeout(netif); - /* timer is active (non zero), and triggers (zeroes) now */ - } else if (netif->dhcp->t1_timeout-- == 1) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_coarse_tmr(): t1 timeout\n")); - /* this clients' renewal timeout triggered */ - dhcp_t1_timeout(netif); - } - } - /* proceed to next netif */ - netif = netif->next; - } -} - -/** - * DHCP transaction timeout handling - * - * A DHCP server is expected to respond within a short period of time. - * This timer checks whether an outstanding DHCP request is timed out. - * - */ -void dhcp_fine_tmr() -{ - struct netif *netif = netif_list; - /* loop through netif's */ - while (netif != NULL) { - /* only act on DHCP configured interfaces */ - if (netif->dhcp != NULL) { - /* timer is active (non zero), and is about to trigger now */ - if (netif->dhcp->request_timeout-- == 1) { - /* { netif->dhcp->request_timeout == 0 } */ - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_fine_tmr(): request timeout\n")); - /* this clients' request timeout triggered */ - dhcp_timeout(netif); - } - } - /* proceed to next network interface */ - netif = netif->next; - } -} - -/** - * A DHCP negotiation transaction, or ARP request, has timed out. - * - * The timer that was started with the DHCP or ARP request has - * timed out, indicating no response was received in time. - * - * @param netif the netif under DHCP control - * - */ -static void dhcp_timeout(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_timeout()\n")); - /* back-off period has passed, or server selection timed out */ - if ((dhcp->state == DHCP_BACKING_OFF) || (dhcp->state == DHCP_SELECTING)) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_timeout(): restarting discovery\n")); - dhcp_discover(netif); - /* receiving the requested lease timed out */ - } else if (dhcp->state == DHCP_REQUESTING) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_timeout(): REQUESTING, DHCP request timed out\n")); - if (dhcp->tries <= 5) { - dhcp_select(netif); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_timeout(): REQUESTING, releasing, restarting\n")); - dhcp_release(netif); - dhcp_discover(netif); - } - /* received no ARP reply for the offered address (which is good) */ - } else if (dhcp->state == DHCP_CHECKING) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_timeout(): CHECKING, ARP request timed out\n")); - if (dhcp->tries <= 1) { - dhcp_check(netif); - /* no ARP replies on the offered address, - looks like the IP address is indeed free */ - } else { - /* bind the interface to the offered address */ - dhcp_bind(netif); - } - } - /* did not get response to renew request? */ - else if (dhcp->state == DHCP_RENEWING) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_timeout(): RENEWING, DHCP request timed out\n")); - /* just retry renewal */ - /* note that the rebind timer will eventually time-out if renew does not work */ - dhcp_renew(netif); - /* did not get response to rebind request? */ - } else if (dhcp->state == DHCP_REBINDING) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_timeout(): REBINDING, DHCP request timed out\n")); - if (dhcp->tries <= 8) { - dhcp_rebind(netif); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_timeout(): RELEASING, DISCOVERING\n")); - dhcp_release(netif); - dhcp_discover(netif); - } - } -} - -/** - * The renewal period has timed out. - * - * @param netif the netif under DHCP control - */ -static void dhcp_t1_timeout(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_t1_timeout()\n")); - if ((dhcp->state == DHCP_REQUESTING) || (dhcp->state == DHCP_BOUND) || (dhcp->state == DHCP_RENEWING)) { - /* just retry to renew - note that the rebind timer (t2) will - * eventually time-out if renew tries fail. */ - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_t1_timeout(): must renew\n")); - dhcp_renew(netif); - } -} - -/** - * The rebind period has timed out. - * - */ -static void dhcp_t2_timeout(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_t2_timeout()\n")); - if ((dhcp->state == DHCP_REQUESTING) || (dhcp->state == DHCP_BOUND) || (dhcp->state == DHCP_RENEWING)) { - /* just retry to rebind */ - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_t2_timeout(): must rebind\n")); - dhcp_rebind(netif); - } -} - -/** - * - * @param netif the netif under DHCP control - */ -static void dhcp_handle_ack(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - u8_t *option_ptr; - /* clear options we might not get from the ACK */ - dhcp->offered_sn_mask.addr = 0; - dhcp->offered_gw_addr.addr = 0; - dhcp->offered_bc_addr.addr = 0; - - /* lease time given? */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_LEASE_TIME); - if (option_ptr != NULL) { - /* remember offered lease time */ - dhcp->offered_t0_lease = dhcp_get_option_long(option_ptr + 2); - } - /* renewal period given? */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_T1); - if (option_ptr != NULL) { - /* remember given renewal period */ - dhcp->offered_t1_renew = dhcp_get_option_long(option_ptr + 2); - } else { - /* calculate safe periods for renewal */ - dhcp->offered_t1_renew = dhcp->offered_t0_lease / 2; - } - - /* renewal period given? */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_T2); - if (option_ptr != NULL) { - /* remember given rebind period */ - dhcp->offered_t2_rebind = dhcp_get_option_long(option_ptr + 2); - } else { - /* calculate safe periods for rebinding */ - dhcp->offered_t2_rebind = dhcp->offered_t0_lease; - } - - /* (y)our internet address */ - ip_addr_set(&dhcp->offered_ip_addr, &dhcp->msg_in->yiaddr); - -/** - * Patch #1308 - * TODO: we must check if the file field is not overloaded by DHCP options! - */ -#if 0 - /* boot server address */ - ip_addr_set(&dhcp->offered_si_addr, &dhcp->msg_in->siaddr); - /* boot file name */ - if (dhcp->msg_in->file[0]) { - dhcp->boot_file_name = mem_malloc(strlen(dhcp->msg_in->file) + 1); - strcpy(dhcp->boot_file_name, dhcp->msg_in->file); - } -#endif - - /* subnet mask */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_SUBNET_MASK); - /* subnet mask given? */ - if (option_ptr != NULL) { - dhcp->offered_sn_mask.addr = htonl(dhcp_get_option_long(&option_ptr[2])); - } - - /* gateway router */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_ROUTER); - if (option_ptr != NULL) { - dhcp->offered_gw_addr.addr = htonl(dhcp_get_option_long(&option_ptr[2])); - } - - /* broadcast address */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_BROADCAST); - if (option_ptr != NULL) { - dhcp->offered_bc_addr.addr = htonl(dhcp_get_option_long(&option_ptr[2])); - } - - /* DNS servers */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_DNS_SERVER); - if (option_ptr != NULL) { - u8_t n; - dhcp->dns_count = dhcp_get_option_byte(&option_ptr[1]); - /* limit to at most DHCP_MAX_DNS DNS servers */ - if (dhcp->dns_count > DHCP_MAX_DNS) dhcp->dns_count = DHCP_MAX_DNS; - for (n = 0; n < dhcp->dns_count; n++) - { - dhcp->offered_dns_addr[n].addr = htonl(dhcp_get_option_long(&option_ptr[2+(n<<2)])); - } - } -} - -/** - * Start DHCP negotiation for a network interface. - * - * If no DHCP client instance was attached to this interface, - * a new client is created first. If a DHCP client instance - * was already present, it restarts negotiation. - * - * @param netif The lwIP network interface - * @return lwIP error code - * - ERR_OK - No error - * - ERR_MEM - Out of memory - * - */ -err_t dhcp_start(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result = ERR_OK; - - LWIP_ASSERT("netif != NULL", netif != NULL); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_start(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); - netif->flags &= ~NETIF_FLAG_DHCP; - - /* no DHCP client attached yet? */ - if (dhcp == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_start(): starting new DHCP client\n")); - dhcp = mem_malloc(sizeof(struct dhcp)); - if (dhcp == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_start(): could not allocate dhcp\n")); - return ERR_MEM; - } - /* store this dhcp client in the netif */ - netif->dhcp = dhcp; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_start(): allocated dhcp")); - /* already has DHCP client attached */ - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE | 3, ("dhcp_start(): restarting DHCP configuration\n")); - } - - /* clear data structure */ - memset(dhcp, 0, sizeof(struct dhcp)); - /* allocate UDP PCB */ - dhcp->pcb = udp_new(); - if (dhcp->pcb == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_start(): could not obtain pcb\n")); - mem_free((void *)dhcp); - netif->dhcp = dhcp = NULL; - return ERR_MEM; - } - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_start(): starting DHCP configuration\n")); - /* (re)start the DHCP negotiation */ - result = dhcp_discover(netif); - if (result != ERR_OK) { - /* free resources allocated above */ - dhcp_stop(netif); - return ERR_MEM; - } - netif->flags |= NETIF_FLAG_DHCP; - return result; -} - -/** - * Inform a DHCP server of our manual configuration. - * - * This informs DHCP servers of our fixed IP address configuration - * by sending an INFORM message. It does not involve DHCP address - * configuration, it is just here to be nice to the network. - * - * @param netif The lwIP network interface - * - */ -void dhcp_inform(struct netif *netif) -{ - struct dhcp *dhcp; - err_t result = ERR_OK; - dhcp = mem_malloc(sizeof(struct dhcp)); - if (dhcp == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_inform(): could not allocate dhcp\n")); - return; - } - netif->dhcp = dhcp; - memset(dhcp, 0, sizeof(struct dhcp)); - - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_inform(): allocated dhcp\n")); - dhcp->pcb = udp_new(); - if (dhcp->pcb == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_inform(): could not obtain pcb")); - mem_free((void *)dhcp); - return; - } - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_inform(): created new udp pcb\n")); - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) { - - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_INFORM); - - dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); - /* TODO: use netif->mtu ?! */ - dhcp_option_short(dhcp, 576); - - dhcp_option_trailer(dhcp); - - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - udp_connect(dhcp->pcb, IP_ADDR_BROADCAST, DHCP_SERVER_PORT); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_inform: INFORMING\n")); - udp_send(dhcp->pcb, dhcp->p_out); - udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); - dhcp_delete_request(netif); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_inform: could not allocate DHCP request\n")); - } - - if (dhcp != NULL) - { - if (dhcp->pcb != NULL) udp_remove(dhcp->pcb); - dhcp->pcb = NULL; - mem_free((void *)dhcp); - netif->dhcp = NULL; - } -} - -#if DHCP_DOES_ARP_CHECK -/** - * Match an ARP reply with the offered IP address. - * - * @param addr The IP address we received a reply from - * - */ -void dhcp_arp_reply(struct netif *netif, struct ip_addr *addr) -{ - LWIP_ASSERT("netif != NULL", netif != NULL); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_arp_reply()\n")); - /* is a DHCP client doing an ARP check? */ - if ((netif->dhcp != NULL) && (netif->dhcp->state == DHCP_CHECKING)) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_arp_reply(): CHECKING, arp reply for 0x%08"X32_F"\n", addr->addr)); - /* did a host respond with the address we - were offered by the DHCP server? */ - if (ip_addr_cmp(addr, &netif->dhcp->offered_ip_addr)) { - /* we will not accept the offered address */ - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE | 1, ("dhcp_arp_reply(): arp reply matched with offered address, declining\n")); - dhcp_decline(netif); - } - } -} - -/** - * Decline an offered lease. - * - * Tell the DHCP server we do not accept the offered address. - * One reason to decline the lease is when we find out the address - * is already in use by another host (through ARP). - */ -static err_t dhcp_decline(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result = ERR_OK; - u16_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_decline()\n")); - dhcp_set_state(dhcp, DHCP_BACKING_OFF); - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) - { - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_DECLINE); - - dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); - dhcp_option_short(dhcp, 576); - - dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); - dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); - - dhcp_option_trailer(dhcp); - /* resize pbuf to reflect true size of options */ - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - /* @todo: should we really connect here? we are performing sendto() */ - udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); - /* per section 4.4.4, broadcast DECLINE messages */ - udp_sendto(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT); - dhcp_delete_request(netif); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_decline: BACKING OFF\n")); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_decline: could not allocate DHCP request\n")); - } - dhcp->tries++; - msecs = 10*1000; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_decline(): set request timeout %"U16_F" msecs\n", msecs)); - return result; -} -#endif - - -/** - * Start the DHCP process, discover a DHCP server. - * - */ -static err_t dhcp_discover(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result = ERR_OK; - u16_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_discover()\n")); - ip_addr_set(&dhcp->offered_ip_addr, IP_ADDR_ANY); - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) - { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_discover: making request\n")); - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_DISCOVER); - - dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); - dhcp_option_short(dhcp, 576); - - dhcp_option(dhcp, DHCP_OPTION_PARAMETER_REQUEST_LIST, 4/*num options*/); - dhcp_option_byte(dhcp, DHCP_OPTION_SUBNET_MASK); - dhcp_option_byte(dhcp, DHCP_OPTION_ROUTER); - dhcp_option_byte(dhcp, DHCP_OPTION_BROADCAST); - dhcp_option_byte(dhcp, DHCP_OPTION_DNS_SERVER); - - dhcp_option_trailer(dhcp); - - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_discover: realloc()ing\n")); - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - /* set receive callback function with netif as user data */ - udp_recv(dhcp->pcb, dhcp_recv, netif); - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_discover: sendto(DISCOVER, IP_ADDR_BROADCAST, DHCP_SERVER_PORT)\n")); - udp_sendto(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_discover: deleting()ing\n")); - dhcp_delete_request(netif); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_discover: SELECTING\n")); - dhcp_set_state(dhcp, DHCP_SELECTING); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_discover: could not allocate DHCP request\n")); - } - dhcp->tries++; - msecs = dhcp->tries < 4 ? (dhcp->tries + 1) * 1000 : 10 * 1000; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_discover(): set request timeout %"U16_F" msecs\n", msecs)); - return result; -} - - -/** - * Bind the interface to the offered IP address. - * - * @param netif network interface to bind to the offered address - */ -static void dhcp_bind(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - struct ip_addr sn_mask, gw_addr; - LWIP_ASSERT("dhcp_bind: netif != NULL", netif != NULL); - LWIP_ASSERT("dhcp_bind: dhcp != NULL", dhcp != NULL); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_bind(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); - - /* temporary DHCP lease? */ - if (dhcp->offered_t1_renew != 0xffffffffUL) { - /* set renewal period timer */ - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew)); - dhcp->t1_timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; - if (dhcp->t1_timeout == 0) dhcp->t1_timeout = 1; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew*1000)); - } - /* set renewal period timer */ - if (dhcp->offered_t2_rebind != 0xffffffffUL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind)); - dhcp->t2_timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; - if (dhcp->t2_timeout == 0) dhcp->t2_timeout = 1; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind*1000)); - } - /* copy offered network mask */ - ip_addr_set(&sn_mask, &dhcp->offered_sn_mask); - - /* subnet mask not given? */ - /* TODO: this is not a valid check. what if the network mask is 0? */ - if (sn_mask.addr == 0) { - /* choose a safe subnet mask given the network class */ - u8_t first_octet = ip4_addr1(&sn_mask); - if (first_octet <= 127) sn_mask.addr = htonl(0xff000000); - else if (first_octet >= 192) sn_mask.addr = htonl(0xffffff00); - else sn_mask.addr = htonl(0xffff0000); - } - - ip_addr_set(&gw_addr, &dhcp->offered_gw_addr); - /* gateway address not given? */ - if (gw_addr.addr == 0) { - /* copy network address */ - gw_addr.addr = (dhcp->offered_ip_addr.addr & sn_mask.addr); - /* use first host address on network as gateway */ - gw_addr.addr |= htonl(0x00000001); - } - - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_bind(): IP: 0x%08"X32_F"\n", dhcp->offered_ip_addr.addr)); - netif_set_ipaddr(netif, &dhcp->offered_ip_addr); - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_bind(): SN: 0x%08"X32_F"\n", sn_mask.addr)); - netif_set_netmask(netif, &sn_mask); - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_bind(): GW: 0x%08"X32_F"\n", gw_addr.addr)); - netif_set_gw(netif, &gw_addr); - /* bring the interface up */ - netif_set_up(netif); - /* netif is now bound to DHCP leased address */ - dhcp_set_state(dhcp, DHCP_BOUND); -} - -/** - * Renew an existing DHCP lease at the involved DHCP server. - * - * @param netif network interface which must renew its lease - */ -err_t dhcp_renew(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result; - u16_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_renew()\n")); - dhcp_set_state(dhcp, DHCP_RENEWING); - - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) { - - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_REQUEST); - - dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); - /* TODO: use netif->mtu in some way */ - dhcp_option_short(dhcp, 576); - -#if 0 - dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); - dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); -#endif - -#if 0 - dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); - dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); -#endif - /* append DHCP message trailer */ - dhcp_option_trailer(dhcp); - - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - udp_connect(dhcp->pcb, &dhcp->server_ip_addr, DHCP_SERVER_PORT); - udp_send(dhcp->pcb, dhcp->p_out); - dhcp_delete_request(netif); - - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_renew: RENEWING\n")); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_renew: could not allocate DHCP request\n")); - } - dhcp->tries++; - /* back-off on retries, but to a maximum of 20 seconds */ - msecs = dhcp->tries < 10 ? dhcp->tries * 2000 : 20 * 1000; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_renew(): set request timeout %"U16_F" msecs\n", msecs)); - return result; -} - -/** - * Rebind with a DHCP server for an existing DHCP lease. - * - * @param netif network interface which must rebind with a DHCP server - */ -static err_t dhcp_rebind(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result; - u16_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_rebind()\n")); - dhcp_set_state(dhcp, DHCP_REBINDING); - - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) - { - - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_REQUEST); - - dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); - dhcp_option_short(dhcp, 576); - -#if 0 - dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); - dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); - - dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); - dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); -#endif - - dhcp_option_trailer(dhcp); - - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - /* set remote IP association to any DHCP server */ - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); - /* broadcast to server */ - udp_sendto(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT); - dhcp_delete_request(netif); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_rebind: REBINDING\n")); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_rebind: could not allocate DHCP request\n")); - } - dhcp->tries++; - msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_rebind(): set request timeout %"U16_F" msecs\n", msecs)); - return result; -} - -/** - * Release a DHCP lease. - * - * @param netif network interface which must release its lease - */ -err_t dhcp_release(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result; - u16_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_release()\n")); - - /* idle DHCP client */ - dhcp_set_state(dhcp, DHCP_OFF); - /* clean old DHCP offer */ - dhcp->server_ip_addr.addr = 0; - dhcp->offered_ip_addr.addr = dhcp->offered_sn_mask.addr = 0; - dhcp->offered_gw_addr.addr = dhcp->offered_bc_addr.addr = 0; - dhcp->offered_t0_lease = dhcp->offered_t1_renew = dhcp->offered_t2_rebind = 0; - dhcp->dns_count = 0; - - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) { - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_RELEASE); - - dhcp_option_trailer(dhcp); - - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - udp_connect(dhcp->pcb, &dhcp->server_ip_addr, DHCP_SERVER_PORT); - udp_send(dhcp->pcb, dhcp->p_out); - dhcp_delete_request(netif); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_release: RELEASED, DHCP_OFF\n")); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_release: could not allocate DHCP request\n")); - } - dhcp->tries++; - msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_release(): set request timeout %"U16_F" msecs\n", msecs)); - /* bring the interface down */ - netif_set_down(netif); - /* remove IP address from interface */ - netif_set_ipaddr(netif, IP_ADDR_ANY); - netif_set_gw(netif, IP_ADDR_ANY); - netif_set_netmask(netif, IP_ADDR_ANY); - - /* TODO: netif_down(netif); */ - return result; -} -/** - * Remove the DHCP client from the interface. - * - * @param netif The network interface to stop DHCP on - */ -void dhcp_stop(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - LWIP_ASSERT("dhcp_stop: netif != NULL", netif != NULL); - - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_stop()\n")); - /* netif is DHCP configured? */ - if (dhcp != NULL) - { - if (dhcp->pcb != NULL) - { - udp_remove(dhcp->pcb); - dhcp->pcb = NULL; - } - if (dhcp->p != NULL) - { - pbuf_free(dhcp->p); - dhcp->p = NULL; - } - /* free unfolded reply */ - dhcp_free_reply(dhcp); - mem_free((void *)dhcp); - netif->dhcp = NULL; - } -} - -/* - * Set the DHCP state of a DHCP client. - * - * If the state changed, reset the number of tries. - * - * TODO: we might also want to reset the timeout here? - */ -static void dhcp_set_state(struct dhcp *dhcp, u8_t new_state) -{ - if (new_state != dhcp->state) - { - dhcp->state = new_state; - dhcp->tries = 0; - } -} - -/* - * Concatenate an option type and length field to the outgoing - * DHCP message. - * - */ -static void dhcp_option(struct dhcp *dhcp, u8_t option_type, u8_t option_len) -{ - LWIP_ASSERT("dhcp_option_short: dhcp->options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN); - dhcp->msg_out->options[dhcp->options_out_len++] = option_type; - dhcp->msg_out->options[dhcp->options_out_len++] = option_len; -} -/* - * Concatenate a single byte to the outgoing DHCP message. - * - */ -static void dhcp_option_byte(struct dhcp *dhcp, u8_t value) -{ - LWIP_ASSERT("dhcp_option_short: dhcp->options_out_len < DHCP_OPTIONS_LEN", dhcp->options_out_len < DHCP_OPTIONS_LEN); - dhcp->msg_out->options[dhcp->options_out_len++] = value; -} -static void dhcp_option_short(struct dhcp *dhcp, u16_t value) -{ - LWIP_ASSERT("dhcp_option_short: dhcp->options_out_len + 2 <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 2 <= DHCP_OPTIONS_LEN); - dhcp->msg_out->options[dhcp->options_out_len++] = (value & 0xff00U) >> 8; - dhcp->msg_out->options[dhcp->options_out_len++] = value & 0x00ffU; -} -static void dhcp_option_long(struct dhcp *dhcp, u32_t value) -{ - LWIP_ASSERT("dhcp_option_long: dhcp->options_out_len + 4 <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 4 <= DHCP_OPTIONS_LEN); - dhcp->msg_out->options[dhcp->options_out_len++] = (value & 0xff000000UL) >> 24; - dhcp->msg_out->options[dhcp->options_out_len++] = (value & 0x00ff0000UL) >> 16; - dhcp->msg_out->options[dhcp->options_out_len++] = (value & 0x0000ff00UL) >> 8; - dhcp->msg_out->options[dhcp->options_out_len++] = (value & 0x000000ffUL); -} - -/** - * Extract the DHCP message and the DHCP options. - * - * Extract the DHCP message and the DHCP options, each into a contiguous - * piece of memory. As a DHCP message is variable sized by its options, - * and also allows overriding some fields for options, the easy approach - * is to first unfold the options into a conitguous piece of memory, and - * use that further on. - * - */ -static err_t dhcp_unfold_reply(struct dhcp *dhcp) -{ - struct pbuf *p = dhcp->p; - u8_t *ptr; - u16_t i; - u16_t j = 0; - LWIP_ASSERT("dhcp->p != NULL", dhcp->p != NULL); - /* free any left-overs from previous unfolds */ - dhcp_free_reply(dhcp); - /* options present? */ - if (dhcp->p->tot_len > (sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN)) - { - dhcp->options_in_len = dhcp->p->tot_len - (sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN); - dhcp->options_in = mem_malloc(dhcp->options_in_len); - if (dhcp->options_in == NULL) - { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_unfold_reply(): could not allocate dhcp->options\n")); - return ERR_MEM; - } - } - dhcp->msg_in = mem_malloc(sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN); - if (dhcp->msg_in == NULL) - { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_unfold_reply(): could not allocate dhcp->msg_in\n")); - mem_free((void *)dhcp->options_in); - dhcp->options_in = NULL; - return ERR_MEM; - } - - ptr = (u8_t *)dhcp->msg_in; - /* proceed through struct dhcp_msg */ - for (i = 0; i < sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN; i++) - { - *ptr++ = ((u8_t *)p->payload)[j++]; - /* reached end of pbuf? */ - if (j == p->len) - { - /* proceed to next pbuf in chain */ - p = p->next; - j = 0; - } - } - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_unfold_reply(): copied %"U16_F" bytes into dhcp->msg_in[]\n", i)); - if (dhcp->options_in != NULL) { - ptr = (u8_t *)dhcp->options_in; - /* proceed through options */ - for (i = 0; i < dhcp->options_in_len; i++) { - *ptr++ = ((u8_t *)p->payload)[j++]; - /* reached end of pbuf? */ - if (j == p->len) { - /* proceed to next pbuf in chain */ - p = p->next; - j = 0; - } - } - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_unfold_reply(): copied %"U16_F" bytes to dhcp->options_in[]\n", i)); - } - return ERR_OK; -} - -/** - * Free the incoming DHCP message including contiguous copy of - * its DHCP options. - * - */ -static void dhcp_free_reply(struct dhcp *dhcp) -{ - if (dhcp->msg_in != NULL) { - mem_free((void *)dhcp->msg_in); - dhcp->msg_in = NULL; - } - if (dhcp->options_in) { - mem_free((void *)dhcp->options_in); - dhcp->options_in = NULL; - dhcp->options_in_len = 0; - } - LWIP_DEBUGF(DHCP_DEBUG, ("dhcp_free_reply(): free'd\n")); -} - - -/** - * If an incoming DHCP message is in response to us, then trigger the state machine - */ -static void dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port) -{ - struct netif *netif = (struct netif *)arg; - struct dhcp *dhcp = netif->dhcp; - struct dhcp_msg *reply_msg = (struct dhcp_msg *)p->payload; - u8_t *options_ptr; - u8_t msg_type; - u8_t i; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_recv(pbuf = %p) from DHCP server %"U16_F".%"U16_F".%"U16_F".%"U16_F" port %"U16_F"\n", (void*)p, - (u16_t)(ntohl(addr->addr) >> 24 & 0xff), (u16_t)(ntohl(addr->addr) >> 16 & 0xff), - (u16_t)(ntohl(addr->addr) >> 8 & 0xff), (u16_t)(ntohl(addr->addr) & 0xff), port)); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("pbuf->len = %"U16_F"\n", p->len)); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("pbuf->tot_len = %"U16_F"\n", p->tot_len)); - /* prevent warnings about unused arguments */ - (void)pcb; (void)addr; (void)port; - dhcp->p = p; - /* TODO: check packet length before reading them */ - if (reply_msg->op != DHCP_BOOTREPLY) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("not a DHCP reply message, but type %"U16_F"\n", (u16_t)reply_msg->op)); - pbuf_free(p); - dhcp->p = NULL; - return; - } - /* iterate through hardware address and match against DHCP message */ - for (i = 0; i < netif->hwaddr_len; i++) { - if (netif->hwaddr[i] != reply_msg->chaddr[i]) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("netif->hwaddr[%"U16_F"]==%02"X16_F" != reply_msg->chaddr[%"U16_F"]==%02"X16_F"\n", - (u16_t)i, (u16_t)netif->hwaddr[i], (u16_t)i, (u16_t)reply_msg->chaddr[i])); - pbuf_free(p); - dhcp->p = NULL; - return; - } - } - /* match transaction ID against what we expected */ - if (ntohl(reply_msg->xid) != dhcp->xid) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("transaction id mismatch\n")); - pbuf_free(p); - dhcp->p = NULL; - return; - } - /* option fields could be unfold? */ - if (dhcp_unfold_reply(dhcp) != ERR_OK) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("problem unfolding DHCP message - too short on memory?\n")); - pbuf_free(p); - dhcp->p = NULL; - return; - } - - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("searching DHCP_OPTION_MESSAGE_TYPE\n")); - /* obtain pointer to DHCP message type */ - options_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_MESSAGE_TYPE); - if (options_ptr == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("DHCP_OPTION_MESSAGE_TYPE option not found\n")); - pbuf_free(p); - dhcp->p = NULL; - return; - } - - /* read DHCP message type */ - msg_type = dhcp_get_option_byte(options_ptr + 2); - /* message type is DHCP ACK? */ - if (msg_type == DHCP_ACK) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("DHCP_ACK received\n")); - /* in requesting state? */ - if (dhcp->state == DHCP_REQUESTING) { - dhcp_handle_ack(netif); - dhcp->request_timeout = 0; -#if DHCP_DOES_ARP_CHECK - /* check if the acknowledged lease address is already in use */ - dhcp_check(netif); -#else - /* bind interface to the acknowledged lease address */ - dhcp_bind(netif); -#endif - } - /* already bound to the given lease address? */ - else if ((dhcp->state == DHCP_REBOOTING) || (dhcp->state == DHCP_REBINDING) || (dhcp->state == DHCP_RENEWING)) { - dhcp->request_timeout = 0; - dhcp_bind(netif); - } - } - /* received a DHCP_NAK in appropriate state? */ - else if ((msg_type == DHCP_NAK) && - ((dhcp->state == DHCP_REBOOTING) || (dhcp->state == DHCP_REQUESTING) || - (dhcp->state == DHCP_REBINDING) || (dhcp->state == DHCP_RENEWING ))) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("DHCP_NAK received\n")); - dhcp->request_timeout = 0; - dhcp_handle_nak(netif); - } - /* received a DHCP_OFFER in DHCP_SELECTING state? */ - else if ((msg_type == DHCP_OFFER) && (dhcp->state == DHCP_SELECTING)) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("DHCP_OFFER received in DHCP_SELECTING state\n")); - dhcp->request_timeout = 0; - /* remember offered lease */ - dhcp_handle_offer(netif); - } - pbuf_free(p); - dhcp->p = NULL; -} - - -static err_t dhcp_create_request(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - u16_t i; - LWIP_ASSERT("dhcp_create_request: dhcp->p_out == NULL", dhcp->p_out == NULL); - LWIP_ASSERT("dhcp_create_request: dhcp->msg_out == NULL", dhcp->msg_out == NULL); - dhcp->p_out = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcp_msg), PBUF_RAM); - if (dhcp->p_out == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_create_request(): could not allocate pbuf\n")); - return ERR_MEM; - } - /* give unique transaction identifier to this request */ - dhcp->xid = xid++; - - dhcp->msg_out = (struct dhcp_msg *)dhcp->p_out->payload; - - dhcp->msg_out->op = DHCP_BOOTREQUEST; - /* TODO: make link layer independent */ - dhcp->msg_out->htype = DHCP_HTYPE_ETH; - /* TODO: make link layer independent */ - dhcp->msg_out->hlen = DHCP_HLEN_ETH; - dhcp->msg_out->hops = 0; - dhcp->msg_out->xid = htonl(dhcp->xid); - dhcp->msg_out->secs = 0; - dhcp->msg_out->flags = 0; - dhcp->msg_out->ciaddr.addr = netif->ip_addr.addr; - dhcp->msg_out->yiaddr.addr = 0; - dhcp->msg_out->siaddr.addr = 0; - dhcp->msg_out->giaddr.addr = 0; - for (i = 0; i < DHCP_CHADDR_LEN; i++) { - /* copy netif hardware address, pad with zeroes */ - dhcp->msg_out->chaddr[i] = (i < netif->hwaddr_len) ? netif->hwaddr[i] : 0/* pad byte*/; - } - for (i = 0; i < DHCP_SNAME_LEN; i++) dhcp->msg_out->sname[i] = 0; - for (i = 0; i < DHCP_FILE_LEN; i++) dhcp->msg_out->file[i] = 0; - dhcp->msg_out->cookie = htonl(0x63825363UL); - dhcp->options_out_len = 0; - /* fill options field with an incrementing array (for debugging purposes) */ - for (i = 0; i < DHCP_OPTIONS_LEN; i++) dhcp->msg_out->options[i] = i; - return ERR_OK; -} - -static void dhcp_delete_request(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - LWIP_ASSERT("dhcp_free_msg: dhcp->p_out != NULL", dhcp->p_out != NULL); - LWIP_ASSERT("dhcp_free_msg: dhcp->msg_out != NULL", dhcp->msg_out != NULL); - pbuf_free(dhcp->p_out); - dhcp->p_out = NULL; - dhcp->msg_out = NULL; -} - -/** - * Add a DHCP message trailer - * - * Adds the END option to the DHCP message, and if - * necessary, up to three padding bytes. - */ - -static void dhcp_option_trailer(struct dhcp *dhcp) -{ - LWIP_ASSERT("dhcp_option_trailer: dhcp->msg_out != NULL\n", dhcp->msg_out != NULL); - LWIP_ASSERT("dhcp_option_trailer: dhcp->options_out_len < DHCP_OPTIONS_LEN\n", dhcp->options_out_len < DHCP_OPTIONS_LEN); - dhcp->msg_out->options[dhcp->options_out_len++] = DHCP_OPTION_END; - /* packet is too small, or not 4 byte aligned? */ - while ((dhcp->options_out_len < DHCP_MIN_OPTIONS_LEN) || (dhcp->options_out_len & 3)) { - /* LWIP_DEBUGF(DHCP_DEBUG,("dhcp_option_trailer:dhcp->options_out_len=%"U16_F", DHCP_OPTIONS_LEN=%"U16_F, dhcp->options_out_len, DHCP_OPTIONS_LEN)); */ - LWIP_ASSERT("dhcp_option_trailer: dhcp->options_out_len < DHCP_OPTIONS_LEN\n", dhcp->options_out_len < DHCP_OPTIONS_LEN); - /* add a fill/padding byte */ - dhcp->msg_out->options[dhcp->options_out_len++] = 0; - } -} - -/** - * Find the offset of a DHCP option inside the DHCP message. - * - * @param client DHCP client - * @param option_type - * - * @return a byte offset into the UDP message where the option was found, or - * zero if the given option was not found. - */ -static u8_t *dhcp_get_option_ptr(struct dhcp *dhcp, u8_t option_type) -{ - u8_t overload = DHCP_OVERLOAD_NONE; - - /* options available? */ - if ((dhcp->options_in != NULL) && (dhcp->options_in_len > 0)) { - /* start with options field */ - u8_t *options = (u8_t *)dhcp->options_in; - u16_t offset = 0; - /* at least 1 byte to read and no end marker, then at least 3 bytes to read? */ - while ((offset < dhcp->options_in_len) && (options[offset] != DHCP_OPTION_END)) { - /* LWIP_DEBUGF(DHCP_DEBUG, ("msg_offset=%"U16_F", q->len=%"U16_F, msg_offset, q->len)); */ - /* are the sname and/or file field overloaded with options? */ - if (options[offset] == DHCP_OPTION_OVERLOAD) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("overloaded message detected\n")); - /* skip option type and length */ - offset += 2; - overload = options[offset++]; - } - /* requested option found */ - else if (options[offset] == option_type) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("option found at offset %"U16_F" in options\n", offset)); - return &options[offset]; - /* skip option */ - } else { - LWIP_DEBUGF(DHCP_DEBUG, ("skipping option %"U16_F" in options\n", options[offset])); - /* skip option type */ - offset++; - /* skip option length, and then length bytes */ - offset += 1 + options[offset]; - } - } - /* is this an overloaded message? */ - if (overload != DHCP_OVERLOAD_NONE) { - u16_t field_len; - if (overload == DHCP_OVERLOAD_FILE) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("overloaded file field\n")); - options = (u8_t *)&dhcp->msg_in->file; - field_len = DHCP_FILE_LEN; - } else if (overload == DHCP_OVERLOAD_SNAME) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("overloaded sname field\n")); - options = (u8_t *)&dhcp->msg_in->sname; - field_len = DHCP_SNAME_LEN; - /* TODO: check if else if () is necessary */ - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("overloaded sname and file field\n")); - options = (u8_t *)&dhcp->msg_in->sname; - field_len = DHCP_FILE_LEN + DHCP_SNAME_LEN; - } - offset = 0; - - /* at least 1 byte to read and no end marker */ - while ((offset < field_len) && (options[offset] != DHCP_OPTION_END)) { - if (options[offset] == option_type) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("option found at offset=%"U16_F"\n", offset)); - return &options[offset]; - /* skip option */ - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("skipping option %"U16_F"\n", options[offset])); - /* skip option type */ - offset++; - offset += 1 + options[offset]; - } - } - } - } - return 0; -} - -/** - * Return the byte of DHCP option data. - * - * @param client DHCP client. - * @param ptr pointer obtained by dhcp_get_option_ptr(). - * - * @return byte value at the given address. - */ -static u8_t dhcp_get_option_byte(u8_t *ptr) -{ - LWIP_DEBUGF(DHCP_DEBUG, ("option byte value=%"U16_F"\n", (u16_t)(*ptr))); - return *ptr; -} - -/** - * Return the 16-bit value of DHCP option data. - * - * @param client DHCP client. - * @param ptr pointer obtained by dhcp_get_option_ptr(). - * - * @return byte value at the given address. - */ -static u16_t dhcp_get_option_short(u8_t *ptr) -{ - u16_t value; - value = *ptr++ << 8; - value |= *ptr; - LWIP_DEBUGF(DHCP_DEBUG, ("option short value=%"U16_F"\n", value)); - return value; -} - -/** - * Return the 32-bit value of DHCP option data. - * - * @param client DHCP client. - * @param ptr pointer obtained by dhcp_get_option_ptr(). - * - * @return byte value at the given address. - */ -static u32_t dhcp_get_option_long(u8_t *ptr) -{ - u32_t value; - value = (u32_t)(*ptr++) << 24; - value |= (u32_t)(*ptr++) << 16; - value |= (u32_t)(*ptr++) << 8; - value |= (u32_t)(*ptr++); - LWIP_DEBUGF(DHCP_DEBUG, ("option long value=%"U32_F"\n", value)); - return value; -} - -#endif /* LWIP_DHCP */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/inet.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/inet.c deleted file mode 100644 index 556cbeb5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/inet.c +++ /dev/null @@ -1,525 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - - -/* inet.c - * - * Functions common to all TCP/IP modules, such as the Internet checksum and the - * byte order functions. - * - */ - - -#include "lwip/opt.h" - -#include "lwip/arch.h" - -#include "lwip/def.h" -#include "lwip/inet.h" - -#include "lwip/sys.h" - -/* This is a reference implementation of the checksum algorithm, with the - * aim of being simple, correct and fully portable. Checksumming is the - * first thing you would want to optimize for your platform. You will - * need to port it to your architecture and in your sys_arch.h: - * - * #define LWIP_CHKSUM -*/ -#ifndef LWIP_CHKSUM -#define LWIP_CHKSUM lwip_standard_chksum - -/** - * lwip checksum - * - * @param dataptr points to start of data to be summed at any boundary - * @param len length of data to be summed - * @return host order (!) lwip checksum (non-inverted Internet sum) - * - * @note accumulator size limits summable lenght to 64k - * @note host endianess is irrelevant (p3 RFC1071) - */ -static u16_t -lwip_standard_chksum(void *dataptr, u16_t len) -{ - u32_t acc; - u16_t src; - u8_t *octetptr; - - acc = 0; - /* dataptr may be at odd or even addresses */ - octetptr = (u8_t*)dataptr; - while (len > 1) - { - /* declare first octet as most significant - thus assume network order, ignoring host order */ - src = (*octetptr) << 8; - octetptr++; - /* declare second octet as least significant */ - src |= (*octetptr); - octetptr++; - acc += src; - len -= 2; - } - if (len > 0) - { - /* accumulate remaining octet */ - src = (*octetptr) << 8; - acc += src; - } - /* add deferred carry bits */ - acc = (acc >> 16) + (acc & 0x0000ffffUL); - if ((acc & 0xffff0000) != 0) { - acc = (acc >> 16) + (acc & 0x0000ffffUL); - } - /* This maybe a little confusing: reorder sum using htons() - instead of ntohs() since it has a little less call overhead. - The caller must invert bits for Internet sum ! */ - return htons((u16_t)acc); -} - -#endif - -#if 0 -/* - * Curt McDowell - * Broadcom Corp. - * csm@broadcom.com - * - * IP checksum two bytes at a time with support for - * unaligned buffer. - * Works for len up to and including 0x20000. - * by Curt McDowell, Broadcom Corp. 12/08/2005 - */ - -static u16_t -lwip_standard_chksum2(void *dataptr, int len) -{ - u8_t *pb = dataptr; - u16_t *ps, t = 0; - u32_t sum = 0; - int odd = ((u32_t)pb & 1); - - /* Get aligned to u16_t */ - if (odd && len > 0) { - ((u8_t *)&t)[1] = *pb++; - len--; - } - - /* Add the bulk of the data */ - ps = (u16_t *)pb; - while (len > 1) { - sum += *ps++; - len -= 2; - } - - /* Consume left-over byte, if any */ - if (len > 0) - ((u8_t *)&t)[0] = *(u8_t *)ps;; - - /* Add end bytes */ - sum += t; - - /* Fold 32-bit sum to 16 bits */ - while (sum >> 16) - sum = (sum & 0xffff) + (sum >> 16); - - /* Swap if alignment was odd */ - if (odd) - sum = ((sum & 0xff) << 8) | ((sum & 0xff00) >> 8); - - return sum; -} - -/** - * An optimized checksum routine. Basically, it uses loop-unrolling on - * the checksum loop, treating the head and tail bytes specially, whereas - * the inner loop acts on 8 bytes at a time. - * - * @arg start of buffer to be checksummed. May be an odd byte address. - * @len number of bytes in the buffer to be checksummed. - * - * @todo First argument type conflicts with generic checksum routine. - * - * by Curt McDowell, Broadcom Corp. December 8th, 2005 - */ - -static u16_t -lwip_standard_chksum4(u8_t *pb, int len) -{ - u16_t *ps, t = 0; - u32_t *pl; - u32_t sum = 0, tmp; - /* starts at odd byte address? */ - int odd = ((u32_t)pb & 1); - - if (odd && len > 0) { - ((u8_t *)&t)[1] = *pb++; - len--; - } - - ps = (u16_t *)pb; - - if (((u32_t)ps & 3) && len > 1) { - sum += *ps++; - len -= 2; - } - - pl = (u32_t *)ps; - - while (len > 7) { - tmp = sum + *pl++; /* ping */ - if (tmp < sum) - tmp++; /* add back carry */ - - sum = tmp + *pl++; /* pong */ - if (sum < tmp) - sum++; /* add back carry */ - - len -= 8; - } - - /* make room in upper bits */ - sum = (sum >> 16) + (sum & 0xffff); - - ps = (u16_t *)pl; - - /* 16-bit aligned word remaining? */ - while (len > 1) { - sum += *ps++; - len -= 2; - } - - /* dangling tail byte remaining? */ - if (len > 0) /* include odd byte */ - ((u8_t *)&t)[0] = *(u8_t *)ps; - - sum += t; /* add end bytes */ - - while (sum >> 16) /* combine halves */ - sum = (sum >> 16) + (sum & 0xffff); - - if (odd) - sum = ((sum & 0xff) << 8) | ((sum & 0xff00) >> 8); - - return sum; -} -#endif - -/* inet_chksum_pseudo: - * - * Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain. - */ - -u16_t -inet_chksum_pseudo(struct pbuf *p, - struct ip_addr *src, struct ip_addr *dest, - u8_t proto, u16_t proto_len) -{ - u32_t acc; - struct pbuf *q; - u8_t swapped; - - acc = 0; - swapped = 0; - /* iterate through all pbuf in chain */ - for(q = p; q != NULL; q = q->next) { - LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): checksumming pbuf %p (has next %p) \n", - (void *)q, (void *)q->next)); - acc += LWIP_CHKSUM(q->payload, q->len); - /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): unwrapped lwip_chksum()=%"X32_F" \n", acc));*/ - while (acc >> 16) { - acc = (acc & 0xffffUL) + (acc >> 16); - } - if (q->len % 2 != 0) { - swapped = 1 - swapped; - acc = ((acc & 0xff) << 8) | ((acc & 0xff00UL) >> 8); - } - /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): wrapped lwip_chksum()=%"X32_F" \n", acc));*/ - } - - if (swapped) { - acc = ((acc & 0xff) << 8) | ((acc & 0xff00UL) >> 8); - } - acc += (src->addr & 0xffffUL); - acc += ((src->addr >> 16) & 0xffffUL); - acc += (dest->addr & 0xffffUL); - acc += ((dest->addr >> 16) & 0xffffUL); - acc += (u32_t)htons((u16_t)proto); - acc += (u32_t)htons(proto_len); - - while (acc >> 16) { - acc = (acc & 0xffffUL) + (acc >> 16); - } - LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): pbuf chain lwip_chksum()=%"X32_F"\n", acc)); - return (u16_t)~(acc & 0xffffUL); -} - -/* inet_chksum: - * - * Calculates the Internet checksum over a portion of memory. Used primarely for IP - * and ICMP. - */ - -u16_t -inet_chksum(void *dataptr, u16_t len) -{ - u32_t acc; - - acc = LWIP_CHKSUM(dataptr, len); - while (acc >> 16) { - acc = (acc & 0xffff) + (acc >> 16); - } - return (u16_t)~(acc & 0xffff); -} - -u16_t -inet_chksum_pbuf(struct pbuf *p) -{ - u32_t acc; - struct pbuf *q; - u8_t swapped; - - acc = 0; - swapped = 0; - for(q = p; q != NULL; q = q->next) { - acc += LWIP_CHKSUM(q->payload, q->len); - while (acc >> 16) { - acc = (acc & 0xffffUL) + (acc >> 16); - } - if (q->len % 2 != 0) { - swapped = 1 - swapped; - acc = (acc & 0x00ffUL << 8) | (acc & 0xff00UL >> 8); - } - } - - if (swapped) { - acc = ((acc & 0x00ffUL) << 8) | ((acc & 0xff00UL) >> 8); - } - return (u16_t)~(acc & 0xffffUL); -} - -/* Here for now until needed in other places in lwIP */ -#ifndef isascii -#define in_range(c, lo, up) ((u8_t)c >= lo && (u8_t)c <= up) -#define isascii(c) in_range(c, 0x20, 0x7f) -#define isdigit(c) in_range(c, '0', '9') -#define isxdigit(c) (isdigit(c) || in_range(c, 'a', 'f') || in_range(c, 'A', 'F')) -#define islower(c) in_range(c, 'a', 'z') -#define isspace(c) (c == ' ' || c == '\f' || c == '\n' || c == '\r' || c == '\t' || c == '\v') -#endif - - - /* - * Ascii internet address interpretation routine. - * The value returned is in network order. - */ - - /* */ - /* inet_addr */ - u32_t inet_addr(const char *cp) - { - struct in_addr val; - - if (inet_aton(cp, &val)) { - return (val.s_addr); - } - return (INADDR_NONE); - } - - /* - * Check whether "cp" is a valid ascii representation - * of an Internet address and convert to a binary address. - * Returns 1 if the address is valid, 0 if not. - * This replaces inet_addr, the return value from which - * cannot distinguish between failure and a local broadcast address. - */ - /* */ - /* inet_aton */ - s8_t - inet_aton(const char *cp, struct in_addr *addr) - { - u32_t val; - s32_t base, n; - char c; - u32_t parts[4]; - u32_t* pp = parts; - - c = *cp; - for (;;) { - /* - * Collect number up to ``.''. - * Values are specified as for C: - * 0x=hex, 0=octal, isdigit=decimal. - */ - if (!isdigit(c)) - return (0); - val = 0; base = 10; - if (c == '0') { - c = *++cp; - if (c == 'x' || c == 'X') - base = 16, c = *++cp; - else - base = 8; - } - for (;;) { - if (isdigit(c)) { - val = (val * base) + (s16_t)(c - '0'); - c = *++cp; - } else if (base == 16 && isxdigit(c)) { - val = (val << 4) | - (s16_t)(c + 10 - (islower(c) ? 'a' : 'A')); - c = *++cp; - } else - break; - } - if (c == '.') { - /* - * Internet format: - * a.b.c.d - * a.b.c (with c treated as 16 bits) - * a.b (with b treated as 24 bits) - */ - if (pp >= parts + 3) - return (0); - *pp++ = val; - c = *++cp; - } else - break; - } - /* - * Check for trailing characters. - */ - if (c != '\0' && (!isascii(c) || !isspace(c))) - return (0); - /* - * Concoct the address according to - * the number of parts specified. - */ - n = pp - parts + 1; - switch (n) { - - case 0: - return (0); /* initial nondigit */ - - case 1: /* a -- 32 bits */ - break; - - case 2: /* a.b -- 8.24 bits */ - if (val > 0xffffff) - return (0); - val |= parts[0] << 24; - break; - - case 3: /* a.b.c -- 8.8.16 bits */ - if (val > 0xffff) - return (0); - val |= (parts[0] << 24) | (parts[1] << 16); - break; - - case 4: /* a.b.c.d -- 8.8.8.8 bits */ - if (val > 0xff) - return (0); - val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8); - break; - } - if (addr) - addr->s_addr = htonl(val); - return (1); - } - -/* Convert numeric IP address into decimal dotted ASCII representation. - * returns ptr to static buffer; not reentrant! - */ -char *inet_ntoa(struct in_addr addr) -{ - static char str[16]; - u32_t s_addr = addr.s_addr; - char inv[3]; - char *rp; - u8_t *ap; - u8_t rem; - u8_t n; - u8_t i; - - rp = str; - ap = (u8_t *)&s_addr; - for(n = 0; n < 4; n++) { - i = 0; - do { - rem = *ap % (u8_t)10; - *ap /= (u8_t)10; - inv[i++] = '0' + rem; - } while(*ap); - while(i--) - *rp++ = inv[i]; - *rp++ = '.'; - ap++; - } - *--rp = 0; - return str; -} - - -#ifndef BYTE_ORDER -#error BYTE_ORDER is not defined -#endif -#if BYTE_ORDER == LITTLE_ENDIAN - -u16_t -htons(u16_t n) -{ - return ((n & 0xff) << 8) | ((n & 0xff00) >> 8); -} - -u16_t -ntohs(u16_t n) -{ - return htons(n); -} - -u32_t -htonl(u32_t n) -{ - return ((n & 0xff) << 24) | - ((n & 0xff00) << 8) | - ((n & 0xff0000) >> 8) | - ((n & 0xff000000) >> 24); -} - -u32_t -ntohl(u32_t n) -{ - return htonl(n); -} - -#endif /* BYTE_ORDER == LITTLE_ENDIAN */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/inet6.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/inet6.c deleted file mode 100644 index c04915b7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/inet6.c +++ /dev/null @@ -1,168 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - - -/* inet6.c - * - * Functions common to all TCP/IP modules, such as the Internet checksum and the - * byte order functions. - * - */ - - -#include "lwip/opt.h" - -#include "lwip/def.h" -#include "lwip/inet.h" - - - -/* chksum: - * - * Sums up all 16 bit words in a memory portion. Also includes any odd byte. - * This function is used by the other checksum functions. - * - * For now, this is not optimized. Must be optimized for the particular processor - * arcitecture on which it is to run. Preferebly coded in assembler. - */ - -static u32_t -chksum(void *dataptr, u16_t len) -{ - u16_t *sdataptr = dataptr; - u32_t acc; - - - for(acc = 0; len > 1; len -= 2) { - acc += *sdataptr++; - } - - /* add up any odd byte */ - if (len == 1) { - acc += htons((u16_t)(*(u8_t *)dataptr) << 8); - } - - return acc; - -} - -/* inet_chksum_pseudo: - * - * Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain. - */ - -u16_t -inet_chksum_pseudo(struct pbuf *p, - struct ip_addr *src, struct ip_addr *dest, - u8_t proto, u32_t proto_len) -{ - u32_t acc; - struct pbuf *q; - u8_t swapped, i; - - acc = 0; - swapped = 0; - for(q = p; q != NULL; q = q->next) { - acc += chksum(q->payload, q->len); - while (acc >> 16) { - acc = (acc & 0xffff) + (acc >> 16); - } - if (q->len % 2 != 0) { - swapped = 1 - swapped; - acc = ((acc & 0xff) << 8) | ((acc & 0xff00) >> 8); - } - } - - if (swapped) { - acc = ((acc & 0xff) << 8) | ((acc & 0xff00) >> 8); - } - - for(i = 0; i < 8; i++) { - acc += ((u16_t *)src->addr)[i] & 0xffff; - acc += ((u16_t *)dest->addr)[i] & 0xffff; - while (acc >> 16) { - acc = (acc & 0xffff) + (acc >> 16); - } - } - acc += (u16_t)htons((u16_t)proto); - acc += ((u16_t *)&proto_len)[0] & 0xffff; - acc += ((u16_t *)&proto_len)[1] & 0xffff; - - while (acc >> 16) { - acc = (acc & 0xffff) + (acc >> 16); - } - return ~(acc & 0xffff); -} - -/* inet_chksum: - * - * Calculates the Internet checksum over a portion of memory. Used primarely for IP - * and ICMP. - */ - -u16_t -inet_chksum(void *dataptr, u16_t len) -{ - u32_t acc, sum; - - acc = chksum(dataptr, len); - sum = (acc & 0xffff) + (acc >> 16); - sum += (sum >> 16); - return ~(sum & 0xffff); -} - -u16_t -inet_chksum_pbuf(struct pbuf *p) -{ - u32_t acc; - struct pbuf *q; - u8_t swapped; - - acc = 0; - swapped = 0; - for(q = p; q != NULL; q = q->next) { - acc += chksum(q->payload, q->len); - while (acc >> 16) { - acc = (acc & 0xffff) + (acc >> 16); - } - if (q->len % 2 != 0) { - swapped = 1 - swapped; - acc = (acc & 0xff << 8) | (acc & 0xff00 >> 8); - } - } - - if (swapped) { - acc = ((acc & 0xff) << 8) | ((acc & 0xff00) >> 8); - } - return ~(acc & 0xffff); -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv4/icmp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv4/icmp.c deleted file mode 100644 index db820148..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv4/icmp.c +++ /dev/null @@ -1,202 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -/* Some ICMP messages should be passed to the transport protocols. This - is not implemented. */ - -#include - -#include "lwip/opt.h" -#include "lwip/icmp.h" -#include "lwip/inet.h" -#include "lwip/ip.h" -#include "lwip/def.h" -#include "lwip/stats.h" -#include "lwip/snmp.h" - -void -icmp_input(struct pbuf *p, struct netif *inp) -{ - u8_t type; - u8_t code; - struct icmp_echo_hdr *iecho; - struct ip_hdr *iphdr; - struct ip_addr tmpaddr; - u16_t hlen; - - ICMP_STATS_INC(icmp.recv); - snmp_inc_icmpinmsgs(); - - - iphdr = p->payload; - hlen = IPH_HL(iphdr) * 4; - if (pbuf_header(p, -((s16_t)hlen)) || (p->tot_len < sizeof(u16_t)*2)) { - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len)); - pbuf_free(p); - ICMP_STATS_INC(icmp.lenerr); - snmp_inc_icmpinerrors(); - return; - } - - type = *((u8_t *)p->payload); - code = *(((u8_t *)p->payload)+1); - switch (type) { - case ICMP_ECHO: - /* broadcast or multicast destination address? */ - if (ip_addr_isbroadcast(&iphdr->dest, inp) || ip_addr_ismulticast(&iphdr->dest)) { - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast or broadcast pings\n")); - ICMP_STATS_INC(icmp.err); - pbuf_free(p); - return; - } - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n")); - if (p->tot_len < sizeof(struct icmp_echo_hdr)) { - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n")); - pbuf_free(p); - ICMP_STATS_INC(icmp.lenerr); - snmp_inc_icmpinerrors(); - - return; - } - iecho = p->payload; - if (inet_chksum_pbuf(p) != 0) { - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n")); - pbuf_free(p); - ICMP_STATS_INC(icmp.chkerr); - snmp_inc_icmpinerrors(); - return; - } - tmpaddr.addr = iphdr->src.addr; - iphdr->src.addr = iphdr->dest.addr; - iphdr->dest.addr = tmpaddr.addr; - ICMPH_TYPE_SET(iecho, ICMP_ER); - /* adjust the checksum */ - if (iecho->chksum >= htons(0xffff - (ICMP_ECHO << 8))) { - iecho->chksum += htons(ICMP_ECHO << 8) + 1; - } else { - iecho->chksum += htons(ICMP_ECHO << 8); - } - ICMP_STATS_INC(icmp.xmit); - /* increase number of messages attempted to send */ - snmp_inc_icmpoutmsgs(); - /* increase number of echo replies attempted to send */ - snmp_inc_icmpoutechoreps(); - - pbuf_header(p, hlen); - ip_output_if(p, &(iphdr->src), IP_HDRINCL, - IPH_TTL(iphdr), 0, IP_PROTO_ICMP, inp); - break; - default: - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n", (s16_t)type, (s16_t)code)); - ICMP_STATS_INC(icmp.proterr); - ICMP_STATS_INC(icmp.drop); - } - pbuf_free(p); -} - -void -icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t) -{ - struct pbuf *q; - struct ip_hdr *iphdr; - struct icmp_dur_hdr *idur; - - q = pbuf_alloc(PBUF_IP, 8 + IP_HLEN + 8, PBUF_RAM); - /* ICMP header + IP header + 8 bytes of data */ - - iphdr = p->payload; - - idur = q->payload; - ICMPH_TYPE_SET(idur, ICMP_DUR); - ICMPH_CODE_SET(idur, t); - - memcpy((u8_t *)q->payload + 8, p->payload, IP_HLEN + 8); - - /* calculate checksum */ - idur->chksum = 0; - idur->chksum = inet_chksum(idur, q->len); - ICMP_STATS_INC(icmp.xmit); - /* increase number of messages attempted to send */ - snmp_inc_icmpoutmsgs(); - /* increase number of destination unreachable messages attempted to send */ - snmp_inc_icmpoutdestunreachs(); - - ip_output(q, NULL, &(iphdr->src), - ICMP_TTL, 0, IP_PROTO_ICMP); - pbuf_free(q); -} - -#if IP_FORWARD -void -icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t) -{ - struct pbuf *q; - struct ip_hdr *iphdr; - struct icmp_te_hdr *tehdr; - - q = pbuf_alloc(PBUF_IP, 8 + IP_HLEN + 8, PBUF_RAM); - - iphdr = p->payload; - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded from ")); - ip_addr_debug_print(ICMP_DEBUG, &(iphdr->src)); - LWIP_DEBUGF(ICMP_DEBUG, (" to ")); - ip_addr_debug_print(ICMP_DEBUG, &(iphdr->dest)); - LWIP_DEBUGF(ICMP_DEBUG, ("\n")); - - tehdr = q->payload; - ICMPH_TYPE_SET(tehdr, ICMP_TE); - ICMPH_CODE_SET(tehdr, t); - - /* copy fields from original packet */ - memcpy((u8_t *)q->payload + 8, (u8_t *)p->payload, IP_HLEN + 8); - - /* calculate checksum */ - tehdr->chksum = 0; - tehdr->chksum = inet_chksum(tehdr, q->len); - ICMP_STATS_INC(icmp.xmit); - /* increase number of messages attempted to send */ - snmp_inc_icmpoutmsgs(); - /* increase number of destination unreachable messages attempted to send */ - snmp_inc_icmpouttimeexcds(); - ip_output(q, NULL, &(iphdr->src), - ICMP_TTL, 0, IP_PROTO_ICMP); - pbuf_free(q); -} - -#endif /* IP_FORWARD */ - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv4/ip.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv4/ip.c deleted file mode 100644 index 4db68c8e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv4/ip.c +++ /dev/null @@ -1,508 +0,0 @@ -/* @file - * - * This is the IP layer implementation for incoming and outgoing IP traffic. - * - * @see ip_frag.c - * - */ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/opt.h" - -#include "lwip/def.h" -#include "lwip/mem.h" -#include "lwip/ip.h" -#include "lwip/ip_frag.h" -#include "lwip/inet.h" -#include "lwip/netif.h" -#include "lwip/icmp.h" -#include "lwip/raw.h" -#include "lwip/udp.h" -#include "lwip/tcp.h" - -#include "lwip/stats.h" - -#include "arch/perf.h" - -#include "lwip/snmp.h" -#if LWIP_DHCP -# include "lwip/dhcp.h" -#endif /* LWIP_DHCP */ - - -/** - * Initializes the IP layer. - */ - -void -ip_init(void) -{ - /* no initializations as of yet */ -} - -/** - * Finds the appropriate network interface for a given IP address. It - * searches the list of network interfaces linearly. A match is found - * if the masked IP address of the network interface equals the masked - * IP address given to the function. - */ - -struct netif * -ip_route(struct ip_addr *dest) -{ - struct netif *netif; - - /* iterate through netifs */ - for(netif = netif_list; netif != NULL; netif = netif->next) { - /* network mask matches? */ - if (ip_addr_netcmp(dest, &(netif->ip_addr), &(netif->netmask))) { - /* return netif on which to forward IP packet */ - return netif; - } - } - /* no matching netif found, use default netif */ - return netif_default; -} -#if IP_FORWARD - -/** - * Forwards an IP packet. It finds an appropriate route for the - * packet, decrements the TTL value of the packet, adjusts the - * checksum and outputs the packet on the appropriate interface. - */ - -static struct netif * -ip_forward(struct pbuf *p, struct ip_hdr *iphdr, struct netif *inp) -{ - struct netif *netif; - - PERF_START; - /* Find network interface where to forward this IP packet to. */ - netif = ip_route((struct ip_addr *)&(iphdr->dest)); - if (netif == NULL) { - LWIP_DEBUGF(IP_DEBUG, ("ip_forward: no forwarding route for 0x%"X32_F" found\n", - iphdr->dest.addr)); - snmp_inc_ipnoroutes(); - return (struct netif *)NULL; - } - /* Do not forward packets onto the same network interface on which - * they arrived. */ - if (netif == inp) { - LWIP_DEBUGF(IP_DEBUG, ("ip_forward: not bouncing packets back on incoming interface.\n")); - snmp_inc_ipnoroutes(); - return (struct netif *)NULL; - } - - /* decrement TTL */ - IPH_TTL_SET(iphdr, IPH_TTL(iphdr) - 1); - /* send ICMP if TTL == 0 */ - if (IPH_TTL(iphdr) == 0) { - /* Don't send ICMP messages in response to ICMP messages */ - if (IPH_PROTO(iphdr) != IP_PROTO_ICMP) { - icmp_time_exceeded(p, ICMP_TE_TTL); - snmp_inc_icmpouttimeexcds(); - } - return (struct netif *)NULL; - } - - /* Incrementally update the IP checksum. */ - if (IPH_CHKSUM(iphdr) >= htons(0xffff - 0x100)) { - IPH_CHKSUM_SET(iphdr, IPH_CHKSUM(iphdr) + htons(0x100) + 1); - } else { - IPH_CHKSUM_SET(iphdr, IPH_CHKSUM(iphdr) + htons(0x100)); - } - - LWIP_DEBUGF(IP_DEBUG, ("ip_forward: forwarding packet to 0x%"X32_F"\n", - iphdr->dest.addr)); - - IP_STATS_INC(ip.fw); - IP_STATS_INC(ip.xmit); - snmp_inc_ipforwdatagrams(); - - PERF_STOP("ip_forward"); - /* transmit pbuf on chosen interface */ - netif->output(netif, p, (struct ip_addr *)&(iphdr->dest)); - return netif; -} -#endif /* IP_FORWARD */ - -/** - * This function is called by the network interface device driver when - * an IP packet is received. The function does the basic checks of the - * IP header such as packet size being at least larger than the header - * size etc. If the packet was not destined for us, the packet is - * forwarded (using ip_forward). The IP checksum is always checked. - * - * Finally, the packet is sent to the upper layer protocol input function. - * - * - * - */ - -err_t -ip_input(struct pbuf *p, struct netif *inp) { - struct ip_hdr *iphdr; - struct netif *netif; - u16_t iphdrlen; - - IP_STATS_INC(ip.recv); - snmp_inc_ipinreceives(); - - /* identify the IP header */ - iphdr = p->payload; - if (IPH_V(iphdr) != 4) { - LWIP_DEBUGF(IP_DEBUG | 1, ("IP packet dropped due to bad version number %"U16_F"\n", IPH_V(iphdr))); - ip_debug_print(p); - pbuf_free(p); - IP_STATS_INC(ip.err); - IP_STATS_INC(ip.drop); - snmp_inc_ipunknownprotos(); - return ERR_OK; - } - /* obtain IP header length in number of 32-bit words */ - iphdrlen = IPH_HL(iphdr); - /* calculate IP header length in bytes */ - iphdrlen *= 4; - - /* header length exceeds first pbuf length? */ - if (iphdrlen > p->len) { - LWIP_DEBUGF(IP_DEBUG | 2, ("IP header (len %"U16_F") does not fit in first pbuf (len %"U16_F"), IP packet droppped.\n", - iphdrlen, p->len)); - /* free (drop) packet pbufs */ - pbuf_free(p); - IP_STATS_INC(ip.lenerr); - IP_STATS_INC(ip.drop); - snmp_inc_ipindiscards(); - return ERR_OK; - } - - /* verify checksum */ -#if CHECKSUM_CHECK_IP - if (inet_chksum(iphdr, iphdrlen) != 0) { - - LWIP_DEBUGF(IP_DEBUG | 2, ("Checksum (0x%"X16_F") failed, IP packet dropped.\n", inet_chksum(iphdr, iphdrlen))); - ip_debug_print(p); - pbuf_free(p); - IP_STATS_INC(ip.chkerr); - IP_STATS_INC(ip.drop); - snmp_inc_ipindiscards(); - return ERR_OK; - } -#endif - - /* Trim pbuf. This should have been done at the netif layer, - * but we'll do it anyway just to be sure that its done. */ - pbuf_realloc(p, ntohs(IPH_LEN(iphdr))); - - /* match packet against an interface, i.e. is this packet for us? */ - for (netif = netif_list; netif != NULL; netif = netif->next) { - - LWIP_DEBUGF(IP_DEBUG, ("ip_input: iphdr->dest 0x%"X32_F" netif->ip_addr 0x%"X32_F" (0x%"X32_F", 0x%"X32_F", 0x%"X32_F")\n", - iphdr->dest.addr, netif->ip_addr.addr, - iphdr->dest.addr & netif->netmask.addr, - netif->ip_addr.addr & netif->netmask.addr, - iphdr->dest.addr & ~(netif->netmask.addr))); - - /* interface is up and configured? */ - if ((netif_is_up(netif)) && (!ip_addr_isany(&(netif->ip_addr)))) - { - /* unicast to this interface address? */ - if (ip_addr_cmp(&(iphdr->dest), &(netif->ip_addr)) || - /* or broadcast on this interface network address? */ - ip_addr_isbroadcast(&(iphdr->dest), netif)) { - LWIP_DEBUGF(IP_DEBUG, ("ip_input: packet accepted on interface %c%c\n", - netif->name[0], netif->name[1])); - /* break out of for loop */ - break; - } - } - } -#if LWIP_DHCP - /* Pass DHCP messages regardless of destination address. DHCP traffic is addressed - * using link layer addressing (such as Ethernet MAC) so we must not filter on IP. - * According to RFC 1542 section 3.1.1, referred by RFC 2131). - */ - if (netif == NULL) { - /* remote port is DHCP server? */ - if (IPH_PROTO(iphdr) == IP_PROTO_UDP) { - LWIP_DEBUGF(IP_DEBUG | DBG_TRACE | 1, ("ip_input: UDP packet to DHCP client port %"U16_F"\n", - ntohs(((struct udp_hdr *)((u8_t *)iphdr + iphdrlen))->dest))); - if (ntohs(((struct udp_hdr *)((u8_t *)iphdr + iphdrlen))->dest) == DHCP_CLIENT_PORT) { - LWIP_DEBUGF(IP_DEBUG | DBG_TRACE | 1, ("ip_input: DHCP packet accepted.\n")); - netif = inp; - } - } - } -#endif /* LWIP_DHCP */ - /* packet not for us? */ - if (netif == NULL) { - /* packet not for us, route or discard */ - LWIP_DEBUGF(IP_DEBUG | DBG_TRACE | 1, ("ip_input: packet not for us.\n")); -#if IP_FORWARD - /* non-broadcast packet? */ - if (!ip_addr_isbroadcast(&(iphdr->dest), inp)) { - /* try to forward IP packet on (other) interfaces */ - ip_forward(p, iphdr, inp); - } - else -#endif /* IP_FORWARD */ - { - snmp_inc_ipindiscards(); - } - pbuf_free(p); - return ERR_OK; - } - /* packet consists of multiple fragments? */ - if ((IPH_OFFSET(iphdr) & htons(IP_OFFMASK | IP_MF)) != 0) { -#if IP_REASSEMBLY /* packet fragment reassembly code present? */ - LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip_reass()\n", - ntohs(IPH_ID(iphdr)), p->tot_len, ntohs(IPH_LEN(iphdr)), !!(IPH_OFFSET(iphdr) & htons(IP_MF)), (ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK)*8)); - /* reassemble the packet*/ - p = ip_reass(p); - /* packet not fully reassembled yet? */ - if (p == NULL) { - return ERR_OK; - } - iphdr = p->payload; -#else /* IP_REASSEMBLY == 0, no packet fragment reassembly code present */ - pbuf_free(p); - LWIP_DEBUGF(IP_DEBUG | 2, ("IP packet dropped since it was fragmented (0x%"X16_F") (while IP_REASSEMBLY == 0).\n", - ntohs(IPH_OFFSET(iphdr)))); - IP_STATS_INC(ip.opterr); - IP_STATS_INC(ip.drop); - snmp_inc_ipunknownprotos(); - return ERR_OK; -#endif /* IP_REASSEMBLY */ - } - -#if IP_OPTIONS == 0 /* no support for IP options in the IP header? */ - if (iphdrlen > IP_HLEN) { - LWIP_DEBUGF(IP_DEBUG | 2, ("IP packet dropped since there were IP options (while IP_OPTIONS == 0).\n")); - pbuf_free(p); - IP_STATS_INC(ip.opterr); - IP_STATS_INC(ip.drop); - snmp_inc_ipunknownprotos(); - return ERR_OK; - } -#endif /* IP_OPTIONS == 0 */ - - /* send to upper layers */ - LWIP_DEBUGF(IP_DEBUG, ("ip_input: \n")); - ip_debug_print(p); - LWIP_DEBUGF(IP_DEBUG, ("ip_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len)); - -#if LWIP_RAW - /* raw input did not eat the packet? */ - if (raw_input(p, inp) == 0) { -#endif /* LWIP_RAW */ - - switch (IPH_PROTO(iphdr)) { -#if LWIP_UDP - case IP_PROTO_UDP: - case IP_PROTO_UDPLITE: - snmp_inc_ipindelivers(); - udp_input(p, inp); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case IP_PROTO_TCP: - snmp_inc_ipindelivers(); - tcp_input(p, inp); - break; -#endif /* LWIP_TCP */ - case IP_PROTO_ICMP: - snmp_inc_ipindelivers(); - icmp_input(p, inp); - break; - default: - /* send ICMP destination protocol unreachable unless is was a broadcast */ - if (!ip_addr_isbroadcast(&(iphdr->dest), inp) && - !ip_addr_ismulticast(&(iphdr->dest))) { - p->payload = iphdr; - icmp_dest_unreach(p, ICMP_DUR_PROTO); - } - pbuf_free(p); - - LWIP_DEBUGF(IP_DEBUG | 2, ("Unsupported transport protocol %"U16_F"\n", IPH_PROTO(iphdr))); - - IP_STATS_INC(ip.proterr); - IP_STATS_INC(ip.drop); - snmp_inc_ipunknownprotos(); - } -#if LWIP_RAW - } /* LWIP_RAW */ -#endif - return ERR_OK; -} - -/** - * Sends an IP packet on a network interface. This function constructs - * the IP header and calculates the IP header checksum. If the source - * IP address is NULL, the IP address of the outgoing network - * interface is filled in as source address. - */ - -err_t -ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t tos, - u8_t proto, struct netif *netif) -{ - struct ip_hdr *iphdr; - u16_t ip_id = 0; - - snmp_inc_ipoutrequests(); - - if (dest != IP_HDRINCL) { - if (pbuf_header(p, IP_HLEN)) { - LWIP_DEBUGF(IP_DEBUG | 2, ("ip_output: not enough room for IP header in pbuf\n")); - - IP_STATS_INC(ip.err); - snmp_inc_ipoutdiscards(); - return ERR_BUF; - } - - iphdr = p->payload; - - IPH_TTL_SET(iphdr, ttl); - IPH_PROTO_SET(iphdr, proto); - - ip_addr_set(&(iphdr->dest), dest); - - IPH_VHLTOS_SET(iphdr, 4, IP_HLEN / 4, tos); - IPH_LEN_SET(iphdr, htons(p->tot_len)); - IPH_OFFSET_SET(iphdr, htons(IP_DF)); - IPH_ID_SET(iphdr, htons(ip_id)); - ++ip_id; - - if (ip_addr_isany(src)) { - ip_addr_set(&(iphdr->src), &(netif->ip_addr)); - } else { - ip_addr_set(&(iphdr->src), src); - } - - IPH_CHKSUM_SET(iphdr, 0); -#if CHECKSUM_GEN_IP - IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); -#endif - } else { - iphdr = p->payload; - dest = &(iphdr->dest); - } - -#if IP_FRAG - /* don't fragment if interface has mtu set to 0 [loopif] */ - if (netif->mtu && (p->tot_len > netif->mtu)) - return ip_frag(p,netif,dest); -#endif - - IP_STATS_INC(ip.xmit); - - LWIP_DEBUGF(IP_DEBUG, ("ip_output_if: %c%c%"U16_F"\n", netif->name[0], netif->name[1], netif->num)); - ip_debug_print(p); - - LWIP_DEBUGF(IP_DEBUG, ("netif->output()")); - - return netif->output(netif, p, dest); -} - -/** - * Simple interface to ip_output_if. It finds the outgoing network - * interface and calls upon ip_output_if to do the actual work. - */ - -err_t -ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t tos, u8_t proto) -{ - struct netif *netif; - - if ((netif = ip_route(dest)) == NULL) { - LWIP_DEBUGF(IP_DEBUG | 2, ("ip_output: No route to 0x%"X32_F"\n", dest->addr)); - - IP_STATS_INC(ip.rterr); - snmp_inc_ipoutdiscards(); - return ERR_RTE; - } - - return ip_output_if(p, src, dest, ttl, tos, proto, netif); -} - -#if IP_DEBUG -void -ip_debug_print(struct pbuf *p) -{ - struct ip_hdr *iphdr = p->payload; - u8_t *payload; - - payload = (u8_t *)iphdr + IP_HLEN; - - LWIP_DEBUGF(IP_DEBUG, ("IP header:\n")); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("|%2"S16_F" |%2"S16_F" | 0x%02"X16_F" | %5"U16_F" | (v, hl, tos, len)\n", - IPH_V(iphdr), - IPH_HL(iphdr), - IPH_TOS(iphdr), - ntohs(IPH_LEN(iphdr)))); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %5"U16_F" |%"U16_F"%"U16_F"%"U16_F"| %4"U16_F" | (id, flags, offset)\n", - ntohs(IPH_ID(iphdr)), - ntohs(IPH_OFFSET(iphdr)) >> 15 & 1, - ntohs(IPH_OFFSET(iphdr)) >> 14 & 1, - ntohs(IPH_OFFSET(iphdr)) >> 13 & 1, - ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK)); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | 0x%04"X16_F" | (ttl, proto, chksum)\n", - IPH_TTL(iphdr), - IPH_PROTO(iphdr), - ntohs(IPH_CHKSUM(iphdr)))); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | %3"U16_F" | %3"U16_F" | (src)\n", - ip4_addr1(&iphdr->src), - ip4_addr2(&iphdr->src), - ip4_addr3(&iphdr->src), - ip4_addr4(&iphdr->src))); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | %3"U16_F" | %3"U16_F" | (dest)\n", - ip4_addr1(&iphdr->dest), - ip4_addr2(&iphdr->dest), - ip4_addr3(&iphdr->dest), - ip4_addr4(&iphdr->dest))); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); -} -#endif /* IP_DEBUG */ - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv4/ip_addr.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv4/ip_addr.c deleted file mode 100644 index 2af526e9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv4/ip_addr.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/ip_addr.h" -#include "lwip/inet.h" -#include "lwip/netif.h" - -/* used by IP_ADDR_ANY and IP_ADDR_BROADCAST in ip_addr.h */ -const struct ip_addr ip_addr_any = { 0x00000000UL }; -const struct ip_addr ip_addr_broadcast = { 0xffffffffUL }; - -/* Determine if an address is a broadcast address on a network interface - * - * @param addr address to be checked - * @param netif the network interface against which the address is checked - * @return returns non-zero if the address is a broadcast address - * - */ - -u8_t ip_addr_isbroadcast(struct ip_addr *addr, struct netif *netif) -{ - /* all ones (broadcast) or all zeroes (old skool broadcast) */ - if ((addr->addr == ip_addr_broadcast.addr) || - (addr->addr == ip_addr_any.addr)) - return 1; - /* no broadcast support on this network interface? */ - else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) - /* the given address cannot be a broadcast address - * nor can we check against any broadcast addresses */ - return 0; - /* address matches network interface address exactly? => no broadcast */ - else if (addr->addr == netif->ip_addr.addr) - return 0; - /* on the same (sub) network... */ - else if (ip_addr_netcmp(addr, &(netif->ip_addr), &(netif->netmask)) - /* ...and host identifier bits are all ones? =>... */ - && ((addr->addr & ~netif->netmask.addr) == - (ip_addr_broadcast.addr & ~netif->netmask.addr))) - /* => network broadcast address */ - return 1; - else - return 0; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv4/ip_frag.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv4/ip_frag.c deleted file mode 100644 index 5a57138c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv4/ip_frag.c +++ /dev/null @@ -1,366 +0,0 @@ -/* @file - * - * This is the IP packet segmentation and reassembly implementation. - * - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Jani Monoses - * original reassembly code by Adam Dunkels - * - */ - -#include - -#include "lwip/opt.h" -/* #include "lwip/sys.h" */ -#include "lwip/ip.h" -#include "lwip/ip_frag.h" -#include "lwip/netif.h" -#include "lwip/stats.h" - - -/* - * Copy len bytes from offset in pbuf to buffer - * - * helper used by both ip_reass and ip_frag - */ -static struct pbuf * -copy_from_pbuf(struct pbuf *p, u16_t * offset, - u8_t * buffer, u16_t len) -{ - u16_t l; - - p->payload = (u8_t *)p->payload + *offset; - p->len -= *offset; - while (len) { - l = len < p->len ? len : p->len; - memcpy(buffer, p->payload, l); - buffer += l; - len -= l; - if (len) - p = p->next; - else - *offset = l; - } - return p; -} - -#define IP_REASS_BUFSIZE 5760 -#define IP_REASS_MAXAGE 30 -#define IP_REASS_TMO 1000 - -static u8_t ip_reassbuf[IP_HLEN + IP_REASS_BUFSIZE]; -static u8_t ip_reassbitmap[IP_REASS_BUFSIZE / (8 * 8) + 1]; -static const u8_t bitmap_bits[8] = { 0xff, 0x7f, 0x3f, 0x1f, - 0x0f, 0x07, 0x03, 0x01 -}; -static u16_t ip_reasslen; -static u8_t ip_reassflags; -#define IP_REASS_FLAG_LASTFRAG 0x01 - -static u8_t ip_reasstmr; - -/** - * Reassembly timer base function - * for both NO_SYS == 0 and 1 (!). - * - * Should be called every 1000 msec. - */ -void -ip_reass_tmr(void) -{ - if (ip_reasstmr > 0) { - ip_reasstmr--; - } -} - -/** - * Reassembles incoming IP fragments into an IP datagram. - * - * @param p points to a pbuf chain of the fragment - * @return NULL if reassembly is incomplete, ? otherwise - */ -struct pbuf * -ip_reass(struct pbuf *p) -{ - struct pbuf *q; - struct ip_hdr *fraghdr, *iphdr; - u16_t offset, len; - u16_t i; - - IPFRAG_STATS_INC(ip_frag.recv); - - iphdr = (struct ip_hdr *) ip_reassbuf; - fraghdr = (struct ip_hdr *) p->payload; - /* If ip_reasstmr is zero, no packet is present in the buffer, so we - write the IP header of the fragment into the reassembly - buffer. The timer is updated with the maximum age. */ - if (ip_reasstmr == 0) { - LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass: new packet\n")); - memcpy(iphdr, fraghdr, IP_HLEN); - ip_reasstmr = IP_REASS_MAXAGE; - ip_reassflags = 0; - /* Clear the bitmap. */ - memset(ip_reassbitmap, 0, sizeof(ip_reassbitmap)); - } - - /* Check if the incoming fragment matches the one currently present - in the reasembly buffer. If so, we proceed with copying the - fragment into the buffer. */ - if (ip_addr_cmp(&iphdr->src, &fraghdr->src) && - ip_addr_cmp(&iphdr->dest, &fraghdr->dest) && - IPH_ID(iphdr) == IPH_ID(fraghdr)) { - LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass: matching previous fragment ID=%"X16_F"\n", - ntohs(IPH_ID(fraghdr)))); - IPFRAG_STATS_INC(ip_frag.cachehit); - /* Find out the offset in the reassembly buffer where we should - copy the fragment. */ - len = ntohs(IPH_LEN(fraghdr)) - IPH_HL(fraghdr) * 4; - offset = (ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) * 8; - - /* If the offset or the offset + fragment length overflows the - reassembly buffer, we discard the entire packet. */ - if (offset > IP_REASS_BUFSIZE || offset + len > IP_REASS_BUFSIZE) { - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: fragment outside of buffer (%"S16_F":%"S16_F"/%"S16_F").\n", offset, - offset + len, IP_REASS_BUFSIZE)); - ip_reasstmr = 0; - goto nullreturn; - } - - /* Copy the fragment into the reassembly buffer, at the right - offset. */ - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: copying with offset %"S16_F" into %"S16_F":%"S16_F"\n", offset, - IP_HLEN + offset, IP_HLEN + offset + len)); - i = IPH_HL(fraghdr) * 4; - copy_from_pbuf(p, &i, &ip_reassbuf[IP_HLEN + offset], len); - - /* Update the bitmap. */ - if (offset / (8 * 8) == (offset + len) / (8 * 8)) { - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: updating single byte in bitmap.\n")); - /* If the two endpoints are in the same byte, we only update that byte. */ - LWIP_ASSERT("offset / (8 * 8) < sizeof(ip_reassbitmap)", - offset / (8 * 8) < sizeof(ip_reassbitmap)); - ip_reassbitmap[offset / (8 * 8)] |= - bitmap_bits[(offset / 8) & 7] & - ~bitmap_bits[((offset + len) / 8) & 7]; - } else { - /* If the two endpoints are in different bytes, we update the - bytes in the endpoints and fill the stuff inbetween with - 0xff. */ - LWIP_ASSERT("offset / (8 * 8) < sizeof(ip_reassbitmap)", - offset / (8 * 8) < sizeof(ip_reassbitmap)); - ip_reassbitmap[offset / (8 * 8)] |= bitmap_bits[(offset / 8) & 7]; - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: updating many bytes in bitmap (%"S16_F":%"S16_F").\n", - 1 + offset / (8 * 8), (offset + len) / (8 * 8))); - for (i = 1 + offset / (8 * 8); i < (offset + len) / (8 * 8); ++i) { - ip_reassbitmap[i] = 0xff; - } - LWIP_ASSERT("(offset + len) / (8 * 8) < sizeof(ip_reassbitmap)", - (offset + len) / (8 * 8) < sizeof(ip_reassbitmap)); - ip_reassbitmap[(offset + len) / (8 * 8)] |= - ~bitmap_bits[((offset + len) / 8) & 7]; - } - - /* If this fragment has the More Fragments flag set to zero, we - know that this is the last fragment, so we can calculate the - size of the entire packet. We also set the - IP_REASS_FLAG_LASTFRAG flag to indicate that we have received - the final fragment. */ - - if ((ntohs(IPH_OFFSET(fraghdr)) & IP_MF) == 0) { - ip_reassflags |= IP_REASS_FLAG_LASTFRAG; - ip_reasslen = offset + len; - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: last fragment seen, total len %"S16_F"\n", - ip_reasslen)); - } - - /* Finally, we check if we have a full packet in the buffer. We do - this by checking if we have the last fragment and if all bits - in the bitmap are set. */ - if (ip_reassflags & IP_REASS_FLAG_LASTFRAG) { - /* Check all bytes up to and including all but the last byte in - the bitmap. */ - LWIP_ASSERT("ip_reasslen / (8 * 8) - 1 < sizeof(ip_reassbitmap)", - ip_reasslen / (8 * 8) - 1 < sizeof(ip_reassbitmap)); - for (i = 0; i < ip_reasslen / (8 * 8) - 1; ++i) { - if (ip_reassbitmap[i] != 0xff) { - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: last fragment seen, bitmap %"S16_F"/%"S16_F" failed (%"X16_F")\n", - i, ip_reasslen / (8 * 8) - 1, ip_reassbitmap[i])); - goto nullreturn; - } - } - /* Check the last byte in the bitmap. It should contain just the - right amount of bits. */ - LWIP_ASSERT("ip_reasslen / (8 * 8) < sizeof(ip_reassbitmap)", - ip_reasslen / (8 * 8) < sizeof(ip_reassbitmap)); - if (ip_reassbitmap[ip_reasslen / (8 * 8)] != - (u8_t) ~ bitmap_bits[ip_reasslen / 8 & 7]) { - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: last fragment seen, bitmap %"S16_F" didn't contain %"X16_F" (%"X16_F")\n", - ip_reasslen / (8 * 8), ~bitmap_bits[ip_reasslen / 8 & 7], - ip_reassbitmap[ip_reasslen / (8 * 8)])); - goto nullreturn; - } - - /* Pretend to be a "normal" (i.e., not fragmented) IP packet - from now on. */ - ip_reasslen += IP_HLEN; - - IPH_LEN_SET(iphdr, htons(ip_reasslen)); - IPH_OFFSET_SET(iphdr, 0); - IPH_CHKSUM_SET(iphdr, 0); - IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); - - /* If we have come this far, we have a full packet in the - buffer, so we allocate a pbuf and copy the packet into it. We - also reset the timer. */ - ip_reasstmr = 0; - pbuf_free(p); - p = pbuf_alloc(PBUF_LINK, ip_reasslen, PBUF_POOL); - if (p != NULL) { - i = 0; - for (q = p; q != NULL; q = q->next) { - /* Copy enough bytes to fill this pbuf in the chain. The - available data in the pbuf is given by the q->len variable. */ - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: memcpy from %p (%"S16_F") to %p, %"S16_F" bytes\n", - (void *)&ip_reassbuf[i], i, q->payload, - q->len > ip_reasslen - i ? ip_reasslen - i : q->len)); - memcpy(q->payload, &ip_reassbuf[i], - q->len > ip_reasslen - i ? ip_reasslen - i : q->len); - i += q->len; - } - IPFRAG_STATS_INC(ip_frag.fw); - } else { - IPFRAG_STATS_INC(ip_frag.memerr); - } - LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass: p %p\n", (void*)p)); - return p; - } - } - -nullreturn: - IPFRAG_STATS_INC(ip_frag.drop); - pbuf_free(p); - return NULL; -} - -#define MAX_MTU 1500 -static u8_t buf[MEM_ALIGN_SIZE(MAX_MTU)]; - -/** - * Fragment an IP datagram if too large for the netif. - * - * Chop the datagram in MTU sized chunks and send them in order - * by using a fixed size static memory buffer (PBUF_ROM) - */ -err_t -ip_frag(struct pbuf *p, struct netif *netif, struct ip_addr *dest) -{ - struct pbuf *rambuf; - struct pbuf *header; - struct ip_hdr *iphdr; - u16_t nfb = 0; - u16_t left, cop; - u16_t mtu = netif->mtu; - u16_t ofo, omf; - u16_t last; - u16_t poff = IP_HLEN; - u16_t tmp; - - /* Get a RAM based MTU sized pbuf */ - rambuf = pbuf_alloc(PBUF_LINK, 0, PBUF_REF); - if (rambuf == NULL) { - return ERR_MEM; - } - rambuf->tot_len = rambuf->len = mtu; - rambuf->payload = MEM_ALIGN((void *)buf); - - /* Copy the IP header in it */ - iphdr = rambuf->payload; - memcpy(iphdr, p->payload, IP_HLEN); - - /* Save original offset */ - tmp = ntohs(IPH_OFFSET(iphdr)); - ofo = tmp & IP_OFFMASK; - omf = tmp & IP_MF; - - left = p->tot_len - IP_HLEN; - - while (left) { - last = (left <= mtu - IP_HLEN); - - /* Set new offset and MF flag */ - ofo += nfb; - tmp = omf | (IP_OFFMASK & (ofo)); - if (!last) - tmp = tmp | IP_MF; - IPH_OFFSET_SET(iphdr, htons(tmp)); - - /* Fill this fragment */ - nfb = (mtu - IP_HLEN) / 8; - cop = last ? left : nfb * 8; - - p = copy_from_pbuf(p, &poff, (u8_t *) iphdr + IP_HLEN, cop); - - /* Correct header */ - IPH_LEN_SET(iphdr, htons(cop + IP_HLEN)); - IPH_CHKSUM_SET(iphdr, 0); - IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); - - if (last) - pbuf_realloc(rambuf, left + IP_HLEN); - /* This part is ugly: we alloc a RAM based pbuf for - * the link level header for each chunk and then - * free it.A PBUF_ROM style pbuf for which pbuf_header - * worked would make things simpler. - */ - header = pbuf_alloc(PBUF_LINK, 0, PBUF_RAM); - if (header != NULL) { - pbuf_chain(header, rambuf); - netif->output(netif, header, dest); - IPFRAG_STATS_INC(ip_frag.xmit); - pbuf_free(header); - } else { - pbuf_free(rambuf); - return ERR_MEM; - } - left -= cop; - } - pbuf_free(rambuf); - return ERR_OK; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv6/README b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv6/README deleted file mode 100644 index 36200048..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv6/README +++ /dev/null @@ -1 +0,0 @@ -IPv6 support in lwIP is very experimental. diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv6/icmp6.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv6/icmp6.c deleted file mode 100644 index 10b6903c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv6/icmp6.c +++ /dev/null @@ -1,184 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -/* Some ICMP messages should be passed to the transport protocols. This - is not implemented. */ - -#include "lwip/opt.h" - -#include "lwip/icmp.h" -#include "lwip/inet.h" -#include "lwip/ip.h" -#include "lwip/def.h" - -#include "lwip/stats.h" - - -void -icmp_input(struct pbuf *p, struct netif *inp) -{ - u8_t type; - struct icmp_echo_hdr *iecho; - struct ip_hdr *iphdr; - struct ip_addr tmpaddr; - -#ifdef ICMP_STATS - ++lwip_stats.icmp.recv; -#endif /* ICMP_STATS */ - - /* TODO: check length before accessing payload! */ - - type = ((u8_t *)p->payload)[0]; - - switch (type) { - case ICMP6_ECHO: - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n")); - - if (p->tot_len < sizeof(struct icmp_echo_hdr)) { - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n")); - - pbuf_free(p); -#ifdef ICMP_STATS - ++lwip_stats.icmp.lenerr; -#endif /* ICMP_STATS */ - - return; - } - iecho = p->payload; - iphdr = (struct ip_hdr *)((u8_t *)p->payload - IP_HLEN); - if (inet_chksum_pbuf(p) != 0) { - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo (%"X16_F")\n", inet_chksum_pseudo(p, &(iphdr->src), &(iphdr->dest), IP_PROTO_ICMP, p->tot_len))); - -#ifdef ICMP_STATS - ++lwip_stats.icmp.chkerr; -#endif /* ICMP_STATS */ - /* return;*/ - } - LWIP_DEBUGF(ICMP_DEBUG, ("icmp: p->len %"S16_F" p->tot_len %"S16_F"\n", p->len, p->tot_len)); - ip_addr_set(&tmpaddr, &(iphdr->src)); - ip_addr_set(&(iphdr->src), &(iphdr->dest)); - ip_addr_set(&(iphdr->dest), &tmpaddr); - iecho->type = ICMP6_ER; - /* adjust the checksum */ - if (iecho->chksum >= htons(0xffff - (ICMP6_ECHO << 8))) { - iecho->chksum += htons(ICMP6_ECHO << 8) + 1; - } else { - iecho->chksum += htons(ICMP6_ECHO << 8); - } - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo (%"X16_F")\n", inet_chksum_pseudo(p, &(iphdr->src), &(iphdr->dest), IP_PROTO_ICMP, p->tot_len))); -#ifdef ICMP_STATS - ++lwip_stats.icmp.xmit; -#endif /* ICMP_STATS */ - - /* LWIP_DEBUGF("icmp: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len);*/ - ip_output_if (p, &(iphdr->src), IP_HDRINCL, - iphdr->hoplim, IP_PROTO_ICMP, inp); - break; - default: - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" not supported.\n", (s16_t)type)); -#ifdef ICMP_STATS - ++lwip_stats.icmp.proterr; - ++lwip_stats.icmp.drop; -#endif /* ICMP_STATS */ - } - - pbuf_free(p); -} - -void -icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t) -{ - struct pbuf *q; - struct ip_hdr *iphdr; - struct icmp_dur_hdr *idur; - - q = pbuf_alloc(PBUF_IP, 8 + IP_HLEN + 8, PBUF_RAM); - /* ICMP header + IP header + 8 bytes of data */ - - iphdr = p->payload; - - idur = q->payload; - idur->type = (u8_t)ICMP6_DUR; - idur->icode = (u8_t)t; - - memcpy((u8_t *)q->payload + 8, p->payload, IP_HLEN + 8); - - /* calculate checksum */ - idur->chksum = 0; - idur->chksum = inet_chksum(idur, q->len); -#ifdef ICMP_STATS - ++lwip_stats.icmp.xmit; -#endif /* ICMP_STATS */ - - ip_output(q, NULL, - (struct ip_addr *)&(iphdr->src), ICMP_TTL, IP_PROTO_ICMP); - pbuf_free(q); -} - -void -icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t) -{ - struct pbuf *q; - struct ip_hdr *iphdr; - struct icmp_te_hdr *tehdr; - - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded\n")); - - q = pbuf_alloc(PBUF_IP, 8 + IP_HLEN + 8, PBUF_RAM); - - iphdr = p->payload; - - tehdr = q->payload; - tehdr->type = (u8_t)ICMP6_TE; - tehdr->icode = (u8_t)t; - - /* copy fields from original packet */ - memcpy((u8_t *)q->payload + 8, (u8_t *)p->payload, IP_HLEN + 8); - - /* calculate checksum */ - tehdr->chksum = 0; - tehdr->chksum = inet_chksum(tehdr, q->len); -#ifdef ICMP_STATS - ++lwip_stats.icmp.xmit; -#endif /* ICMP_STATS */ - ip_output(q, NULL, - (struct ip_addr *)&(iphdr->src), ICMP_TTL, IP_PROTO_ICMP); - pbuf_free(q); -} - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv6/ip6.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv6/ip6.c deleted file mode 100644 index 03037c81..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv6/ip6.c +++ /dev/null @@ -1,386 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - - - -/* ip.c - * - * This is the code for the IP layer for IPv6. - * - */ - - -#include "lwip/opt.h" - -#include "lwip/def.h" -#include "lwip/mem.h" -#include "lwip/ip.h" -#include "lwip/inet.h" -#include "lwip/netif.h" -#include "lwip/icmp.h" -#include "lwip/udp.h" -#include "lwip/tcp.h" - -#include "lwip/stats.h" - -#include "arch/perf.h" - -/* ip_init: - * - * Initializes the IP layer. - */ - -void -ip_init(void) -{ -} - -/* ip_route: - * - * Finds the appropriate network interface for a given IP address. It searches the - * list of network interfaces linearly. A match is found if the masked IP address of - * the network interface equals the masked IP address given to the function. - */ - -struct netif * -ip_route(struct ip_addr *dest) -{ - struct netif *netif; - - for(netif = netif_list; netif != NULL; netif = netif->next) { - if (ip_addr_netcmp(dest, &(netif->ip_addr), &(netif->netmask))) { - return netif; - } - } - - return netif_default; -} - -/* ip_forward: - * - * Forwards an IP packet. It finds an appropriate route for the packet, decrements - * the TTL value of the packet, adjusts the checksum and outputs the packet on the - * appropriate interface. - */ - -static void -ip_forward(struct pbuf *p, struct ip_hdr *iphdr) -{ - struct netif *netif; - - PERF_START; - - if ((netif = ip_route((struct ip_addr *)&(iphdr->dest))) == NULL) { - - LWIP_DEBUGF(IP_DEBUG, ("ip_input: no forwarding route found for ")); -#if IP_DEBUG - ip_addr_debug_print(IP_DEBUG, &(iphdr->dest)); -#endif /* IP_DEBUG */ - LWIP_DEBUGF(IP_DEBUG, ("\n")); - pbuf_free(p); - return; - } - /* Decrement TTL and send ICMP if ttl == 0. */ - if (--iphdr->hoplim == 0) { - /* Don't send ICMP messages in response to ICMP messages */ - if (iphdr->nexthdr != IP_PROTO_ICMP) { - icmp_time_exceeded(p, ICMP_TE_TTL); - } - pbuf_free(p); - return; - } - - /* Incremental update of the IP checksum. */ - /* if (iphdr->chksum >= htons(0xffff - 0x100)) { - iphdr->chksum += htons(0x100) + 1; - } else { - iphdr->chksum += htons(0x100); - }*/ - - - LWIP_DEBUGF(IP_DEBUG, ("ip_forward: forwarding packet to ")); -#if IP_DEBUG - ip_addr_debug_print(IP_DEBUG, &(iphdr->dest)); -#endif /* IP_DEBUG */ - LWIP_DEBUGF(IP_DEBUG, ("\n")); - -#ifdef IP_STATS - ++lwip_stats.ip.fw; - ++lwip_stats.ip.xmit; -#endif /* IP_STATS */ - - PERF_STOP("ip_forward"); - - netif->output(netif, p, (struct ip_addr *)&(iphdr->dest)); -} - -/* ip_input: - * - * This function is called by the network interface device driver when an IP packet is - * received. The function does the basic checks of the IP header such as packet size - * being at least larger than the header size etc. If the packet was not destined for - * us, the packet is forwarded (using ip_forward). The IP checksum is always checked. - * - * Finally, the packet is sent to the upper layer protocol input function. - */ - -void -ip_input(struct pbuf *p, struct netif *inp) { - struct ip_hdr *iphdr; - struct netif *netif; - - - PERF_START; - -#if IP_DEBUG - ip_debug_print(p); -#endif /* IP_DEBUG */ - - -#ifdef IP_STATS - ++lwip_stats.ip.recv; -#endif /* IP_STATS */ - - /* identify the IP header */ - iphdr = p->payload; - - - if (iphdr->v != 6) { - LWIP_DEBUGF(IP_DEBUG, ("IP packet dropped due to bad version number\n")); -#if IP_DEBUG - ip_debug_print(p); -#endif /* IP_DEBUG */ - pbuf_free(p); -#ifdef IP_STATS - ++lwip_stats.ip.err; - ++lwip_stats.ip.drop; -#endif /* IP_STATS */ - return; - } - - /* is this packet for us? */ - for(netif = netif_list; netif != NULL; netif = netif->next) { -#if IP_DEBUG - LWIP_DEBUGF(IP_DEBUG, ("ip_input: iphdr->dest ")); - ip_addr_debug_print(IP_DEBUG, &(iphdr->dest)); - LWIP_DEBUGF(IP_DEBUG, ("netif->ip_addr ")); - ip_addr_debug_print(IP_DEBUG, &(netif->ip_addr)); - LWIP_DEBUGF(IP_DEBUG, ("\n")); -#endif /* IP_DEBUG */ - if (ip_addr_cmp(&(iphdr->dest), &(netif->ip_addr))) { - break; - } - } - - - if (netif == NULL) { - /* packet not for us, route or discard */ -#ifdef IP_FORWARD - ip_forward(p, iphdr); -#endif - pbuf_free(p); - return; - } - - pbuf_realloc(p, IP_HLEN + ntohs(iphdr->len)); - - /* send to upper layers */ -#if IP_DEBUG - /* LWIP_DEBUGF("ip_input: \n"); - ip_debug_print(p); - LWIP_DEBUGF("ip_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len);*/ -#endif /* IP_DEBUG */ - - - pbuf_header(p, -IP_HLEN); - - switch (iphdr->nexthdr) { - case IP_PROTO_UDP: - udp_input(p); - break; - case IP_PROTO_TCP: - tcp_input(p); - break; - case IP_PROTO_ICMP: - icmp_input(p, inp); - break; - default: - /* send ICMP destination protocol unreachable */ - icmp_dest_unreach(p, ICMP_DUR_PROTO); - pbuf_free(p); - LWIP_DEBUGF(IP_DEBUG, ("Unsupported transport protocol %"U16_F"\n", - iphdr->nexthdr)); - -#ifdef IP_STATS - ++lwip_stats.ip.proterr; - ++lwip_stats.ip.drop; -#endif /* IP_STATS */ - - } - PERF_STOP("ip_input"); -} - - -/* ip_output_if: - * - * Sends an IP packet on a network interface. This function constructs the IP header - * and calculates the IP header checksum. If the source IP address is NULL, - * the IP address of the outgoing network interface is filled in as source address. - */ - -err_t -ip_output_if (struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, - u8_t proto, struct netif *netif) -{ - struct ip_hdr *iphdr; - - PERF_START; - - printf("len %"U16_F" tot_len %"U16_F"\n", p->len, p->tot_len); - if (pbuf_header(p, IP_HLEN)) { - LWIP_DEBUGF(IP_DEBUG, ("ip_output: not enough room for IP header in pbuf\n")); -#ifdef IP_STATS - ++lwip_stats.ip.err; -#endif /* IP_STATS */ - - return ERR_BUF; - } - printf("len %"U16_F" tot_len %"U16_F"\n", p->len, p->tot_len); - - iphdr = p->payload; - - - if (dest != IP_HDRINCL) { - printf("!IP_HDRLINCL\n"); - iphdr->hoplim = ttl; - iphdr->nexthdr = proto; - iphdr->len = htons(p->tot_len - IP_HLEN); - ip_addr_set(&(iphdr->dest), dest); - - iphdr->v = 6; - - if (ip_addr_isany(src)) { - ip_addr_set(&(iphdr->src), &(netif->ip_addr)); - } else { - ip_addr_set(&(iphdr->src), src); - } - - } else { - dest = &(iphdr->dest); - } - -#ifdef IP_STATS - ++lwip_stats.ip.xmit; -#endif /* IP_STATS */ - - LWIP_DEBUGF(IP_DEBUG, ("ip_output_if: %c%c (len %"U16_F")\n", netif->name[0], netif->name[1], p->tot_len)); -#if IP_DEBUG - ip_debug_print(p); -#endif /* IP_DEBUG */ - - PERF_STOP("ip_output_if"); - return netif->output(netif, p, dest); -} - -/* ip_output: - * - * Simple interface to ip_output_if. It finds the outgoing network interface and - * calls upon ip_output_if to do the actual work. - */ - -err_t -ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t proto) -{ - struct netif *netif; - if ((netif = ip_route(dest)) == NULL) { - LWIP_DEBUGF(IP_DEBUG, ("ip_output: No route to 0x%"X32_F"\n", dest->addr)); -#ifdef IP_STATS - ++lwip_stats.ip.rterr; -#endif /* IP_STATS */ - return ERR_RTE; - } - - return ip_output_if (p, src, dest, ttl, proto, netif); -} - -#if IP_DEBUG -void -ip_debug_print(struct pbuf *p) -{ - struct ip_hdr *iphdr = p->payload; - u8_t *payload; - - payload = (u8_t *)iphdr + IP_HLEN; - - LWIP_DEBUGF(IP_DEBUG, ("IP header:\n")); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("|%2"S16_F" | %"X16_F"%"X16_F" | %"X16_F"%"X16_F" | (v, traffic class, flow label)\n", - iphdr->v, - iphdr->tclass1, iphdr->tclass2, - iphdr->flow1, iphdr->flow2)); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %5"U16_F" | %2"U16_F" | %2"U16_F" | (len, nexthdr, hoplim)\n", - ntohs(iphdr->len), - iphdr->nexthdr, - iphdr->hoplim)); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (src)\n", - ntohl(iphdr->src.addr[0]) >> 16 & 0xffff, - ntohl(iphdr->src.addr[0]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (src)\n", - ntohl(iphdr->src.addr[1]) >> 16 & 0xffff, - ntohl(iphdr->src.addr[1]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (src)\n", - ntohl(iphdr->src.addr[2]) >> 16 & 0xffff, - ntohl(iphdr->src.addr[2]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (src)\n", - ntohl(iphdr->src.addr[3]) >> 16 & 0xffff, - ntohl(iphdr->src.addr[3]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (dest)\n", - ntohl(iphdr->dest.addr[0]) >> 16 & 0xffff, - ntohl(iphdr->dest.addr[0]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (dest)\n", - ntohl(iphdr->dest.addr[1]) >> 16 & 0xffff, - ntohl(iphdr->dest.addr[1]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (dest)\n", - ntohl(iphdr->dest.addr[2]) >> 16 & 0xffff, - ntohl(iphdr->dest.addr[2]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (dest)\n", - ntohl(iphdr->dest.addr[3]) >> 16 & 0xffff, - ntohl(iphdr->dest.addr[3]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); -} -#endif /* IP_DEBUG */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv6/ip6_addr.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv6/ip6_addr.c deleted file mode 100644 index dcb50785..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/ipv6/ip6_addr.c +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/ip_addr.h" -#include "lwip/inet.h" - - -u8_t -ip_addr_netcmp(struct ip_addr *addr1, struct ip_addr *addr2, - struct ip_addr *mask) -{ - return((addr1->addr[0] & mask->addr[0]) == (addr2->addr[0] & mask->addr[0]) && - (addr1->addr[1] & mask->addr[1]) == (addr2->addr[1] & mask->addr[1]) && - (addr1->addr[2] & mask->addr[2]) == (addr2->addr[2] & mask->addr[2]) && - (addr1->addr[3] & mask->addr[3]) == (addr2->addr[3] & mask->addr[3])); - -} - -u8_t -ip_addr_cmp(struct ip_addr *addr1, struct ip_addr *addr2) -{ - return(addr1->addr[0] == addr2->addr[0] && - addr1->addr[1] == addr2->addr[1] && - addr1->addr[2] == addr2->addr[2] && - addr1->addr[3] == addr2->addr[3]); -} - -void -ip_addr_set(struct ip_addr *dest, struct ip_addr *src) -{ - memcpy(dest, src, sizeof(struct ip_addr)); - /* dest->addr[0] = src->addr[0]; - dest->addr[1] = src->addr[1]; - dest->addr[2] = src->addr[2]; - dest->addr[3] = src->addr[3];*/ -} - -u8_t -ip_addr_isany(struct ip_addr *addr) -{ - if (addr == NULL) return 1; - return((addr->addr[0] | addr->addr[1] | addr->addr[2] | addr->addr[3]) == 0); -} - - -/*#if IP_DEBUG*/ -void -ip_addr_debug_print(struct ip_addr *addr) -{ - printf("%"X32_F":%"X32_F":%"X32_F":%"X32_F":%"X32_F":%"X32_F":%"X32_F":%"X32_F", - ntohl(addr->addr[0]) >> 16 & 0xffff, - ntohl(addr->addr[0]) & 0xffff, - ntohl(addr->addr[1]) >> 16 & 0xffff, - ntohl(addr->addr[1]) & 0xffff, - ntohl(addr->addr[2]) >> 16 & 0xffff, - ntohl(addr->addr[2]) & 0xffff, - ntohl(addr->addr[3]) >> 16 & 0xffff, - ntohl(addr->addr[3]) & 0xffff); -} -/*#endif*/ /* IP_DEBUG */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/mem.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/mem.c deleted file mode 100644 index b38d8f15..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/mem.c +++ /dev/null @@ -1,310 +0,0 @@ -/** @file - * - * Dynamic memory manager - * - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include - -#include "lwip/arch.h" -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/mem.h" - -#include "lwip/sys.h" - -#include "lwip/stats.h" - -struct mem { - mem_size_t next, prev; -#if MEM_ALIGNMENT == 1 - u8_t used; -#elif MEM_ALIGNMENT == 2 - u16_t used; -#elif MEM_ALIGNMENT == 4 - u32_t used; -#elif MEM_ALIGNMENT == 8 - u64_t used; -#else -#error "unhandled MEM_ALIGNMENT size" -#endif /* MEM_ALIGNMENT */ -}; - -static struct mem *ram_end; -static u8_t ram[MEM_SIZE + sizeof(struct mem) + MEM_ALIGNMENT]; - -#define MIN_SIZE 12 -#if 0 /* this one does not align correctly for some, resulting in crashes */ -#define SIZEOF_STRUCT_MEM (unsigned int)MEM_ALIGN_SIZE(sizeof(struct mem)) -#else -#define SIZEOF_STRUCT_MEM (sizeof(struct mem) + \ - (((sizeof(struct mem) % MEM_ALIGNMENT) == 0)? 0 : \ - (4 - (sizeof(struct mem) % MEM_ALIGNMENT)))) -#endif - -static struct mem *lfree; /* pointer to the lowest free block */ - -static sys_sem_t mem_sem; - -static void -plug_holes(struct mem *mem) -{ - struct mem *nmem; - struct mem *pmem; - - LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram); - LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end); - LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0); - - /* plug hole forward */ - LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE", mem->next <= MEM_SIZE); - - nmem = (struct mem *)&ram[mem->next]; - if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) { - if (lfree == nmem) { - lfree = mem; - } - mem->next = nmem->next; - ((struct mem *)&ram[nmem->next])->prev = (u8_t *)mem - ram; - } - - /* plug hole backward */ - pmem = (struct mem *)&ram[mem->prev]; - if (pmem != mem && pmem->used == 0) { - if (lfree == mem) { - lfree = pmem; - } - pmem->next = mem->next; - ((struct mem *)&ram[mem->next])->prev = (u8_t *)pmem - ram; - } - -} -void -mem_init(void) -{ - struct mem *mem; - - memset(ram, 0, MEM_SIZE); - mem = (struct mem *)ram; - mem->next = MEM_SIZE; - mem->prev = 0; - mem->used = 0; - ram_end = (struct mem *)&ram[MEM_SIZE]; - ram_end->used = 1; - ram_end->next = MEM_SIZE; - ram_end->prev = MEM_SIZE; - - mem_sem = sys_sem_new(1); - - lfree = (struct mem *)ram; - -#if MEM_STATS - lwip_stats.mem.avail = MEM_SIZE; -#endif /* MEM_STATS */ -} -void -mem_free(void *rmem) -{ - struct mem *mem; - - if (rmem == NULL) { - LWIP_DEBUGF(MEM_DEBUG | DBG_TRACE | 2, ("mem_free(p == NULL) was called.\n")); - return; - } - - sys_sem_wait(mem_sem); - - LWIP_ASSERT("mem_free: legal memory", (u8_t *)rmem >= (u8_t *)ram && - (u8_t *)rmem < (u8_t *)ram_end); - - if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) { - LWIP_DEBUGF(MEM_DEBUG | 3, ("mem_free: illegal memory\n")); -#if MEM_STATS - ++lwip_stats.mem.err; -#endif /* MEM_STATS */ - sys_sem_signal(mem_sem); - return; - } - mem = (struct mem *)((u8_t *)rmem - SIZEOF_STRUCT_MEM); - - LWIP_ASSERT("mem_free: mem->used", mem->used); - - mem->used = 0; - - if (mem < lfree) { - lfree = mem; - } - -#if MEM_STATS - lwip_stats.mem.used -= mem->next - ((u8_t *)mem - ram); - -#endif /* MEM_STATS */ - plug_holes(mem); - sys_sem_signal(mem_sem); -} -void * -mem_reallocm(void *rmem, mem_size_t newsize) -{ - void *nmem; - nmem = mem_malloc(newsize); - if (nmem == NULL) { - return mem_realloc(rmem, newsize); - } - memcpy(nmem, rmem, newsize); - mem_free(rmem); - return nmem; -} - -void * -mem_realloc(void *rmem, mem_size_t newsize) -{ - mem_size_t size; - mem_size_t ptr, ptr2; - struct mem *mem, *mem2; - - /* Expand the size of the allocated memory region so that we can - adjust for alignment. */ - if ((newsize % MEM_ALIGNMENT) != 0) { - newsize += MEM_ALIGNMENT - ((newsize + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT); - } - - if (newsize > MEM_SIZE) { - return NULL; - } - - sys_sem_wait(mem_sem); - - LWIP_ASSERT("mem_realloc: legal memory", (u8_t *)rmem >= (u8_t *)ram && - (u8_t *)rmem < (u8_t *)ram_end); - - if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) { - LWIP_DEBUGF(MEM_DEBUG | 3, ("mem_realloc: illegal memory\n")); - return rmem; - } - mem = (struct mem *)((u8_t *)rmem - SIZEOF_STRUCT_MEM); - - ptr = (u8_t *)mem - ram; - - size = mem->next - ptr - SIZEOF_STRUCT_MEM; -#if MEM_STATS - lwip_stats.mem.used -= (size - newsize); -#endif /* MEM_STATS */ - - if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE < size) { - ptr2 = ptr + SIZEOF_STRUCT_MEM + newsize; - mem2 = (struct mem *)&ram[ptr2]; - mem2->used = 0; - mem2->next = mem->next; - mem2->prev = ptr; - mem->next = ptr2; - if (mem2->next != MEM_SIZE) { - ((struct mem *)&ram[mem2->next])->prev = ptr2; - } - - plug_holes(mem2); - } - sys_sem_signal(mem_sem); - return rmem; -} -void * -mem_malloc(mem_size_t size) -{ - mem_size_t ptr, ptr2; - struct mem *mem, *mem2; - - if (size == 0) { - return NULL; - } - - /* Expand the size of the allocated memory region so that we can - adjust for alignment. */ - if ((size % MEM_ALIGNMENT) != 0) { - size += MEM_ALIGNMENT - ((size + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT); - } - - if (size > MEM_SIZE) { - return NULL; - } - - sys_sem_wait(mem_sem); - - for (ptr = (u8_t *)lfree - ram; ptr < MEM_SIZE; ptr = ((struct mem *)&ram[ptr])->next) { - mem = (struct mem *)&ram[ptr]; - if (!mem->used && - mem->next - (ptr + SIZEOF_STRUCT_MEM) >= size + SIZEOF_STRUCT_MEM) { - ptr2 = ptr + SIZEOF_STRUCT_MEM + size; - mem2 = (struct mem *)&ram[ptr2]; - - mem2->prev = ptr; - mem2->next = mem->next; - mem->next = ptr2; - if (mem2->next != MEM_SIZE) { - ((struct mem *)&ram[mem2->next])->prev = ptr2; - } - - mem2->used = 0; - mem->used = 1; -#if MEM_STATS - lwip_stats.mem.used += (size + SIZEOF_STRUCT_MEM); - /* if (lwip_stats.mem.max < lwip_stats.mem.used) { - lwip_stats.mem.max = lwip_stats.mem.used; - } */ - if (lwip_stats.mem.max < ptr2) { - lwip_stats.mem.max = ptr2; - } -#endif /* MEM_STATS */ - - if (mem == lfree) { - /* Find next free block after mem */ - while (lfree->used && lfree != ram_end) { - lfree = (struct mem *)&ram[lfree->next]; - } - LWIP_ASSERT("mem_malloc: !lfree->used", !lfree->used); - } - sys_sem_signal(mem_sem); - LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.", - (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end); - LWIP_ASSERT("mem_malloc: allocated memory properly aligned.", - (unsigned long)((u8_t *)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0); - return (u8_t *)mem + SIZEOF_STRUCT_MEM; - } - } - LWIP_DEBUGF(MEM_DEBUG | 2, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size)); -#if MEM_STATS - ++lwip_stats.mem.err; -#endif /* MEM_STATS */ - sys_sem_signal(mem_sem); - return NULL; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/memp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/memp.c deleted file mode 100644 index c0cfce29..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/memp.c +++ /dev/null @@ -1,274 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/opt.h" - -#include "lwip/memp.h" - -#include "lwip/pbuf.h" -#include "lwip/udp.h" -#include "lwip/raw.h" -#include "lwip/tcp.h" -#include "lwip/api.h" -#include "lwip/api_msg.h" -#include "lwip/tcpip.h" - -#include "lwip/sys.h" -#include "lwip/stats.h" - -struct memp { - struct memp *next; -}; - - - -static struct memp *memp_tab[MEMP_MAX]; - -static const u16_t memp_sizes[MEMP_MAX] = { - sizeof(struct pbuf), - sizeof(struct raw_pcb), - sizeof(struct udp_pcb), - sizeof(struct tcp_pcb), - sizeof(struct tcp_pcb_listen), - sizeof(struct tcp_seg), - sizeof(struct netbuf), - sizeof(struct netconn), - sizeof(struct api_msg), - sizeof(struct tcpip_msg), - sizeof(struct sys_timeout) -}; - -static const u16_t memp_num[MEMP_MAX] = { - MEMP_NUM_PBUF, - MEMP_NUM_RAW_PCB, - MEMP_NUM_UDP_PCB, - MEMP_NUM_TCP_PCB, - MEMP_NUM_TCP_PCB_LISTEN, - MEMP_NUM_TCP_SEG, - MEMP_NUM_NETBUF, - MEMP_NUM_NETCONN, - MEMP_NUM_API_MSG, - MEMP_NUM_TCPIP_MSG, - MEMP_NUM_SYS_TIMEOUT -}; - -static u8_t memp_memory[(MEMP_NUM_PBUF * - MEM_ALIGN_SIZE(sizeof(struct pbuf) + - sizeof(struct memp)) + - MEMP_NUM_RAW_PCB * - MEM_ALIGN_SIZE(sizeof(struct raw_pcb) + - sizeof(struct memp)) + - MEMP_NUM_UDP_PCB * - MEM_ALIGN_SIZE(sizeof(struct udp_pcb) + - sizeof(struct memp)) + - MEMP_NUM_TCP_PCB * - MEM_ALIGN_SIZE(sizeof(struct tcp_pcb) + - sizeof(struct memp)) + - MEMP_NUM_TCP_PCB_LISTEN * - MEM_ALIGN_SIZE(sizeof(struct tcp_pcb_listen) + - sizeof(struct memp)) + - MEMP_NUM_TCP_SEG * - MEM_ALIGN_SIZE(sizeof(struct tcp_seg) + - sizeof(struct memp)) + - MEMP_NUM_NETBUF * - MEM_ALIGN_SIZE(sizeof(struct netbuf) + - sizeof(struct memp)) + - MEMP_NUM_NETCONN * - MEM_ALIGN_SIZE(sizeof(struct netconn) + - sizeof(struct memp)) + - MEMP_NUM_API_MSG * - MEM_ALIGN_SIZE(sizeof(struct api_msg) + - sizeof(struct memp)) + - MEMP_NUM_TCPIP_MSG * - MEM_ALIGN_SIZE(sizeof(struct tcpip_msg) + - sizeof(struct memp)) + - MEMP_NUM_SYS_TIMEOUT * - MEM_ALIGN_SIZE(sizeof(struct sys_timeout) + - sizeof(struct memp)))]; - - -#if !SYS_LIGHTWEIGHT_PROT -static sys_sem_t mutex; -#endif - -#if MEMP_SANITY_CHECK -static int -memp_sanity(void) -{ - s16_t i, c; - struct memp *m, *n; - - for(i = 0; i < MEMP_MAX; i++) { - for(m = memp_tab[i]; m != NULL; m = m->next) { - c = 1; - for(n = memp_tab[i]; n != NULL; n = n->next) { - if (n == m) { - --c; - } - if (c < 0) return 0; /* LW was: abort(); */ - } - } - } - return 1; -} -#endif /* MEMP_SANITY_CHECK*/ - -void -memp_init(void) -{ - struct memp *m, *memp; - u16_t i, j; - u16_t size; - -#if MEMP_STATS - for(i = 0; i < MEMP_MAX; ++i) { - lwip_stats.memp[i].used = lwip_stats.memp[i].max = - lwip_stats.memp[i].err = 0; - lwip_stats.memp[i].avail = memp_num[i]; - } -#endif /* MEMP_STATS */ - - memp = (struct memp *)&memp_memory[0]; - for(i = 0; i < MEMP_MAX; ++i) { - size = MEM_ALIGN_SIZE(memp_sizes[i] + sizeof(struct memp)); - if (memp_num[i] > 0) { - memp_tab[i] = memp; - m = memp; - - for(j = 0; j < memp_num[i]; ++j) { - m->next = (struct memp *)MEM_ALIGN((u8_t *)m + size); - memp = m; - m = m->next; - } - memp->next = NULL; - memp = m; - } else { - memp_tab[i] = NULL; - } - } - -#if !SYS_LIGHTWEIGHT_PROT - mutex = sys_sem_new(1); -#endif - - -} - -void * -memp_malloc(memp_t type) -{ - struct memp *memp; - void *mem; -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_DECL_PROTECT(old_level); -#endif - - LWIP_ASSERT("memp_malloc: type < MEMP_MAX", type < MEMP_MAX); - -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_PROTECT(old_level); -#else /* SYS_LIGHTWEIGHT_PROT */ - sys_sem_wait(mutex); -#endif /* SYS_LIGHTWEIGHT_PROT */ - - memp = memp_tab[type]; - - if (memp != NULL) { - memp_tab[type] = memp->next; - memp->next = NULL; -#if MEMP_STATS - ++lwip_stats.memp[type].used; - if (lwip_stats.memp[type].used > lwip_stats.memp[type].max) { - lwip_stats.memp[type].max = lwip_stats.memp[type].used; - } -#endif /* MEMP_STATS */ -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_UNPROTECT(old_level); -#else /* SYS_LIGHTWEIGHT_PROT */ - sys_sem_signal(mutex); -#endif /* SYS_LIGHTWEIGHT_PROT */ - LWIP_ASSERT("memp_malloc: memp properly aligned", - ((mem_ptr_t)MEM_ALIGN((u8_t *)memp + sizeof(struct memp)) % MEM_ALIGNMENT) == 0); - - mem = MEM_ALIGN((u8_t *)memp + sizeof(struct memp)); - return mem; - } else { - LWIP_DEBUGF(MEMP_DEBUG | 2, ("memp_malloc: out of memory in pool %"S16_F"\n", type)); -#if MEMP_STATS - ++lwip_stats.memp[type].err; -#endif /* MEMP_STATS */ -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_UNPROTECT(old_level); -#else /* SYS_LIGHTWEIGHT_PROT */ - sys_sem_signal(mutex); -#endif /* SYS_LIGHTWEIGHT_PROT */ - return NULL; - } -} - -void -memp_free(memp_t type, void *mem) -{ - struct memp *memp; -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_DECL_PROTECT(old_level); -#endif /* SYS_LIGHTWEIGHT_PROT */ - - if (mem == NULL) { - return; - } - memp = (struct memp *)((u8_t *)mem - sizeof(struct memp)); - -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_PROTECT(old_level); -#else /* SYS_LIGHTWEIGHT_PROT */ - sys_sem_wait(mutex); -#endif /* SYS_LIGHTWEIGHT_PROT */ - -#if MEMP_STATS - lwip_stats.memp[type].used--; -#endif /* MEMP_STATS */ - - memp->next = memp_tab[type]; - memp_tab[type] = memp; - -#if MEMP_SANITY_CHECK - LWIP_ASSERT("memp sanity", memp_sanity()); -#endif - -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_UNPROTECT(old_level); -#else /* SYS_LIGHTWEIGHT_PROT */ - sys_sem_signal(mutex); -#endif /* SYS_LIGHTWEIGHT_PROT */ -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/netif.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/netif.c deleted file mode 100644 index 3525089b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/netif.c +++ /dev/null @@ -1,288 +0,0 @@ -/** - * @file - * - * lwIP network interface abstraction - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/opt.h" - -#include "lwip/def.h" -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/tcp.h" - -struct netif *netif_list = NULL; -struct netif *netif_default = NULL; - -/** - * Add a network interface to the list of lwIP netifs. - * - * @param netif a pre-allocated netif structure - * @param ipaddr IP address for the new netif - * @param netmask network mask for the new netif - * @param gw default gateway IP address for the new netif - * @param state opaque data passed to the new netif - * @param init callback function that initializes the interface - * @param input callback function that is called to pass - * ingress packets up in the protocol layer stack. - * - * @return netif, or NULL if failed. - */ -struct netif * -netif_add(struct netif *netif, struct ip_addr *ipaddr, struct ip_addr *netmask, - struct ip_addr *gw, - void *state, - err_t (* init)(struct netif *netif), - err_t (* input)(struct pbuf *p, struct netif *netif)) -{ - static s16_t netifnum = 0; - -#if LWIP_DHCP - /* netif not under DHCP control by default */ - netif->dhcp = NULL; -#endif - /* remember netif specific state information data */ - netif->state = state; - netif->num = netifnum++; - netif->input = input; - - netif_set_addr(netif, ipaddr, netmask, gw); - - /* call user specified initialization function for netif */ - if (init(netif) != ERR_OK) { - return NULL; - } - - /* add this netif to the list */ - netif->next = netif_list; - netif_list = netif; - LWIP_DEBUGF(NETIF_DEBUG, ("netif: added interface %c%c IP addr ", - netif->name[0], netif->name[1])); - ip_addr_debug_print(NETIF_DEBUG, ipaddr); - LWIP_DEBUGF(NETIF_DEBUG, (" netmask ")); - ip_addr_debug_print(NETIF_DEBUG, netmask); - LWIP_DEBUGF(NETIF_DEBUG, (" gw ")); - ip_addr_debug_print(NETIF_DEBUG, gw); - LWIP_DEBUGF(NETIF_DEBUG, ("\n")); - return netif; -} - -void -netif_set_addr(struct netif *netif,struct ip_addr *ipaddr, struct ip_addr *netmask, - struct ip_addr *gw) -{ - netif_set_ipaddr(netif, ipaddr); - netif_set_netmask(netif, netmask); - netif_set_gw(netif, gw); -} - -void netif_remove(struct netif * netif) -{ - if ( netif == NULL ) return; - - /* is it the first netif? */ - if (netif_list == netif) { - netif_list = netif->next; - } - else { - /* look for netif further down the list */ - struct netif * tmpNetif; - for (tmpNetif = netif_list; tmpNetif != NULL; tmpNetif = tmpNetif->next) { - if (tmpNetif->next == netif) { - tmpNetif->next = netif->next; - break; - } - } - if (tmpNetif == NULL) - return; /* we didn't find any netif today */ - } - /* this netif is default? */ - if (netif_default == netif) - /* reset default netif */ - netif_default = NULL; - LWIP_DEBUGF( NETIF_DEBUG, ("netif_remove: removed netif\n") ); -} - -struct netif * -netif_find(char *name) -{ - struct netif *netif; - u8_t num; - - if (name == NULL) { - return NULL; - } - - num = name[2] - '0'; - - for(netif = netif_list; netif != NULL; netif = netif->next) { - if (num == netif->num && - name[0] == netif->name[0] && - name[1] == netif->name[1]) { - LWIP_DEBUGF(NETIF_DEBUG, ("netif_find: found %c%c\n", name[0], name[1])); - return netif; - } - } - LWIP_DEBUGF(NETIF_DEBUG, ("netif_find: didn't find %c%c\n", name[0], name[1])); - return NULL; -} - -void -netif_set_ipaddr(struct netif *netif, struct ip_addr *ipaddr) -{ - /* TODO: Handling of obsolete pcbs */ - /* See: http://mail.gnu.org/archive/html/lwip-users/2003-03/msg00118.html */ -#if LWIP_TCP - struct tcp_pcb *pcb; - struct tcp_pcb_listen *lpcb; - - /* address is actually being changed? */ - if ((ip_addr_cmp(ipaddr, &(netif->ip_addr))) == 0) - { - /* extern struct tcp_pcb *tcp_active_pcbs; defined by tcp.h */ - LWIP_DEBUGF(NETIF_DEBUG | 1, ("netif_set_ipaddr: netif address being changed\n")); - pcb = tcp_active_pcbs; - while (pcb != NULL) { - /* PCB bound to current local interface address? */ - if (ip_addr_cmp(&(pcb->local_ip), &(netif->ip_addr))) { - /* this connection must be aborted */ - struct tcp_pcb *next = pcb->next; - LWIP_DEBUGF(NETIF_DEBUG | 1, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb)); - tcp_abort(pcb); - pcb = next; - } else { - pcb = pcb->next; - } - } - for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { - /* PCB bound to current local interface address? */ - if (ip_addr_cmp(&(lpcb->local_ip), &(netif->ip_addr))) { - /* The PCB is listening to the old ipaddr and - * is set to listen to the new one instead */ - ip_addr_set(&(lpcb->local_ip), ipaddr); - } - } - } -#endif - ip_addr_set(&(netif->ip_addr), ipaddr); -#if 0 /* only allowed for Ethernet interfaces TODO: how can we check? */ - /** For Ethernet network interfaces, we would like to send a - * "gratuitous ARP"; this is an ARP packet sent by a node in order - * to spontaneously cause other nodes to update an entry in their - * ARP cache. From RFC 3220 "IP Mobility Support for IPv4" section 4.6. - */ - etharp_query(netif, ipaddr, NULL); -#endif - LWIP_DEBUGF(NETIF_DEBUG | DBG_TRACE | DBG_STATE | 3, ("netif: IP address of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", - netif->name[0], netif->name[1], - ip4_addr1(&netif->ip_addr), - ip4_addr2(&netif->ip_addr), - ip4_addr3(&netif->ip_addr), - ip4_addr4(&netif->ip_addr))); -} - -void -netif_set_gw(struct netif *netif, struct ip_addr *gw) -{ - ip_addr_set(&(netif->gw), gw); - LWIP_DEBUGF(NETIF_DEBUG | DBG_TRACE | DBG_STATE | 3, ("netif: GW address of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", - netif->name[0], netif->name[1], - ip4_addr1(&netif->gw), - ip4_addr2(&netif->gw), - ip4_addr3(&netif->gw), - ip4_addr4(&netif->gw))); -} - -void -netif_set_netmask(struct netif *netif, struct ip_addr *netmask) -{ - ip_addr_set(&(netif->netmask), netmask); - LWIP_DEBUGF(NETIF_DEBUG | DBG_TRACE | DBG_STATE | 3, ("netif: netmask of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", - netif->name[0], netif->name[1], - ip4_addr1(&netif->netmask), - ip4_addr2(&netif->netmask), - ip4_addr3(&netif->netmask), - ip4_addr4(&netif->netmask))); -} - -void -netif_set_default(struct netif *netif) -{ - netif_default = netif; - LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n", - netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\'')); -} - -/** - * Bring an interface up, available for processing - * traffic. - * - * @note: Enabling DHCP on a down interface will make it come - * up once configured. - * - * @see dhcp_start() - */ -void netif_set_up(struct netif *netif) -{ - netif->flags |= NETIF_FLAG_UP; -} - -/** - * Ask if an interface is up - */ -u8_t netif_is_up(struct netif *netif) -{ - return (netif->flags & NETIF_FLAG_UP)?1:0; -} - -/** - * Bring an interface down, disabling any traffic processing. - * - * @note: Enabling DHCP on a down interface will make it come - * up once configured. - * - * @see dhcp_start() - */ -void netif_set_down(struct netif *netif) -{ - netif->flags &= ~NETIF_FLAG_UP; -} - -void -netif_init(void) -{ - netif_list = netif_default = NULL; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/pbuf.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/pbuf.c deleted file mode 100644 index 2ece4b09..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/pbuf.c +++ /dev/null @@ -1,957 +0,0 @@ -/** - * @file - * Packet buffer management - * - * Packets are built from the pbuf data structure. It supports dynamic - * memory allocation for packet contents or can reference externally - * managed packet contents both in RAM and ROM. Quick allocation for - * incoming packets is provided through pools with fixed sized pbufs. - * - * A packet may span over multiple pbufs, chained as a singly linked - * list. This is called a "pbuf chain". - * - * Multiple packets may be queued, also using this singly linked list. - * This is called a "packet queue". - * - * So, a packet queue consists of one or more pbuf chains, each of - * which consist of one or more pbufs. Currently, queues are only - * supported in a limited section of lwIP, this is the etharp queueing - * code. Outside of this section no packet queues are supported yet. - * - * The differences between a pbuf chain and a packet queue are very - * precise but subtle. - * - * The last pbuf of a packet has a ->tot_len field that equals the - * ->len field. It can be found by traversing the list. If the last - * pbuf of a packet has a ->next field other than NULL, more packets - * are on the queue. - * - * Therefore, looping through a pbuf of a single packet, has an - * loop end condition (tot_len == p->len), NOT (next == NULL). - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include - -#include "lwip/opt.h" -#include "lwip/stats.h" -#include "lwip/def.h" -#include "lwip/mem.h" -#include "lwip/memp.h" -#include "lwip/pbuf.h" -#include "lwip/sys.h" -#include "arch/perf.h" - -static u8_t pbuf_pool_memory[MEM_ALIGNMENT - 1 + PBUF_POOL_SIZE * MEM_ALIGN_SIZE(PBUF_POOL_BUFSIZE + sizeof(struct pbuf))]; - -#if !SYS_LIGHTWEIGHT_PROT -static volatile u8_t pbuf_pool_free_lock, pbuf_pool_alloc_lock; -static sys_sem_t pbuf_pool_free_sem; -#endif - -static struct pbuf *pbuf_pool = NULL; - -/** - * Initializes the pbuf module. - * - * A large part of memory is allocated for holding the pool of pbufs. - * The size of the individual pbufs in the pool is given by the size - * parameter, and the number of pbufs in the pool by the num parameter. - * - * After the memory has been allocated, the pbufs are set up. The - * ->next pointer in each pbuf is set up to point to the next pbuf in - * the pool. - * - */ -void -pbuf_init(void) -{ - struct pbuf *p, *q = NULL; - u16_t i; - - pbuf_pool = (struct pbuf *)MEM_ALIGN(pbuf_pool_memory); - -#if PBUF_STATS - lwip_stats.pbuf.avail = PBUF_POOL_SIZE; -#endif /* PBUF_STATS */ - - /* Set up ->next pointers to link the pbufs of the pool together */ - p = pbuf_pool; - - for(i = 0; i < PBUF_POOL_SIZE; ++i) { - p->next = (struct pbuf *)((u8_t *)p + PBUF_POOL_BUFSIZE + sizeof(struct pbuf)); - p->len = p->tot_len = PBUF_POOL_BUFSIZE; - p->payload = MEM_ALIGN((void *)((u8_t *)p + sizeof(struct pbuf))); - p->flags = PBUF_FLAG_POOL; - q = p; - p = p->next; - } - - /* The ->next pointer of last pbuf is NULL to indicate that there - are no more pbufs in the pool */ - q->next = NULL; - -#if !SYS_LIGHTWEIGHT_PROT - pbuf_pool_alloc_lock = 0; - pbuf_pool_free_lock = 0; - pbuf_pool_free_sem = sys_sem_new(1); -#endif -} - -/** - * @internal only called from pbuf_alloc() - */ -static struct pbuf * -pbuf_pool_alloc(void) -{ - struct pbuf *p = NULL; - - SYS_ARCH_DECL_PROTECT(old_level); - SYS_ARCH_PROTECT(old_level); - -#if !SYS_LIGHTWEIGHT_PROT - /* Next, check the actual pbuf pool, but if the pool is locked, we - pretend to be out of buffers and return NULL. */ - if (pbuf_pool_free_lock) { -#if PBUF_STATS - ++lwip_stats.pbuf.alloc_locked; -#endif /* PBUF_STATS */ - return NULL; - } - pbuf_pool_alloc_lock = 1; - if (!pbuf_pool_free_lock) { -#endif /* SYS_LIGHTWEIGHT_PROT */ - p = pbuf_pool; - if (p) { - pbuf_pool = p->next; - } -#if !SYS_LIGHTWEIGHT_PROT -#if PBUF_STATS - } else { - ++lwip_stats.pbuf.alloc_locked; -#endif /* PBUF_STATS */ - } - pbuf_pool_alloc_lock = 0; -#endif /* SYS_LIGHTWEIGHT_PROT */ - -#if PBUF_STATS - if (p != NULL) { - ++lwip_stats.pbuf.used; - if (lwip_stats.pbuf.used > lwip_stats.pbuf.max) { - lwip_stats.pbuf.max = lwip_stats.pbuf.used; - } - } -#endif /* PBUF_STATS */ - - SYS_ARCH_UNPROTECT(old_level); - return p; -} - - -/** - * Allocates a pbuf of the given type (possibly a chain for PBUF_POOL type). - * - * The actual memory allocated for the pbuf is determined by the - * layer at which the pbuf is allocated and the requested size - * (from the size parameter). - * - * @param flag this parameter decides how and where the pbuf - * should be allocated as follows: - * - * - PBUF_RAM: buffer memory for pbuf is allocated as one large - * chunk. This includes protocol headers as well. - * - PBUF_ROM: no buffer memory is allocated for the pbuf, even for - * protocol headers. Additional headers must be prepended - * by allocating another pbuf and chain in to the front of - * the ROM pbuf. It is assumed that the memory used is really - * similar to ROM in that it is immutable and will not be - * changed. Memory which is dynamic should generally not - * be attached to PBUF_ROM pbufs. Use PBUF_REF instead. - * - PBUF_REF: no buffer memory is allocated for the pbuf, even for - * protocol headers. It is assumed that the pbuf is only - * being used in a single thread. If the pbuf gets queued, - * then pbuf_take should be called to copy the buffer. - * - PBUF_POOL: the pbuf is allocated as a pbuf chain, with pbufs from - * the pbuf pool that is allocated during pbuf_init(). - * - * @return the allocated pbuf. If multiple pbufs where allocated, this - * is the first pbuf of a pbuf chain. - */ -struct pbuf * -pbuf_alloc(pbuf_layer l, u16_t length, pbuf_flag flag) -{ - struct pbuf *p, *q, *r; - u16_t offset; - s32_t rem_len; /* remaining length */ - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 3, ("pbuf_alloc(length=%"U16_F")\n", length)); - - /* determine header offset */ - offset = 0; - switch (l) { - case PBUF_TRANSPORT: - /* add room for transport (often TCP) layer header */ - offset += PBUF_TRANSPORT_HLEN; - /* FALLTHROUGH */ - case PBUF_IP: - /* add room for IP layer header */ - offset += PBUF_IP_HLEN; - /* FALLTHROUGH */ - case PBUF_LINK: - /* add room for link layer header */ - offset += PBUF_LINK_HLEN; - break; - case PBUF_RAW: - break; - default: - LWIP_ASSERT("pbuf_alloc: bad pbuf layer", 0); - return NULL; - } - - switch (flag) { - case PBUF_POOL: - /* allocate head of pbuf chain into p */ - p = pbuf_pool_alloc(); - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 3, ("pbuf_alloc: allocated pbuf %p\n", (void *)p)); - if (p == NULL) { -#if PBUF_STATS - ++lwip_stats.pbuf.err; -#endif /* PBUF_STATS */ - return NULL; - } - p->next = NULL; - - /* make the payload pointer point 'offset' bytes into pbuf data memory */ - p->payload = MEM_ALIGN((void *)((u8_t *)p + (sizeof(struct pbuf) + offset))); - LWIP_ASSERT("pbuf_alloc: pbuf p->payload properly aligned", - ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0); - /* the total length of the pbuf chain is the requested size */ - p->tot_len = length; - /* set the length of the first pbuf in the chain */ - p->len = length > PBUF_POOL_BUFSIZE - offset? PBUF_POOL_BUFSIZE - offset: length; - /* set reference count (needed here in case we fail) */ - p->ref = 1; - - /* now allocate the tail of the pbuf chain */ - - /* remember first pbuf for linkage in next iteration */ - r = p; - /* remaining length to be allocated */ - rem_len = length - p->len; - /* any remaining pbufs to be allocated? */ - while (rem_len > 0) { - q = pbuf_pool_alloc(); - if (q == NULL) { - LWIP_DEBUGF(PBUF_DEBUG | 2, ("pbuf_alloc: Out of pbufs in pool.\n")); -#if PBUF_STATS - ++lwip_stats.pbuf.err; -#endif /* PBUF_STATS */ - /* free chain so far allocated */ - pbuf_free(p); - /* bail out unsuccesfully */ - return NULL; - } - q->next = NULL; - /* make previous pbuf point to this pbuf */ - r->next = q; - /* set total length of this pbuf and next in chain */ - q->tot_len = rem_len; - /* this pbuf length is pool size, unless smaller sized tail */ - q->len = rem_len > PBUF_POOL_BUFSIZE? PBUF_POOL_BUFSIZE: rem_len; - q->payload = (void *)((u8_t *)q + sizeof(struct pbuf)); - LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned", - ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0); - q->ref = 1; - /* calculate remaining length to be allocated */ - rem_len -= q->len; - /* remember this pbuf for linkage in next iteration */ - r = q; - } - /* end of chain */ - /*r->next = NULL;*/ - - break; - case PBUF_RAM: - /* If pbuf is to be allocated in RAM, allocate memory for it. */ - p = mem_malloc(MEM_ALIGN_SIZE(sizeof(struct pbuf) + offset) + MEM_ALIGN_SIZE(length)); - if (p == NULL) { - return NULL; - } - /* Set up internal structure of the pbuf. */ - p->payload = MEM_ALIGN((void *)((u8_t *)p + sizeof(struct pbuf) + offset)); - p->len = p->tot_len = length; - p->next = NULL; - p->flags = PBUF_FLAG_RAM; - - LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned", - ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0); - break; - /* pbuf references existing (non-volatile static constant) ROM payload? */ - case PBUF_ROM: - /* pbuf references existing (externally allocated) RAM payload? */ - case PBUF_REF: - /* only allocate memory for the pbuf structure */ - p = memp_malloc(MEMP_PBUF); - if (p == NULL) { - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 2, ("pbuf_alloc: Could not allocate MEMP_PBUF for PBUF_%s.\n", flag == PBUF_ROM?"ROM":"REF")); - return NULL; - } - /* caller must set this field properly, afterwards */ - p->payload = NULL; - p->len = p->tot_len = length; - p->next = NULL; - p->flags = (flag == PBUF_ROM? PBUF_FLAG_ROM: PBUF_FLAG_REF); - break; - default: - LWIP_ASSERT("pbuf_alloc: erroneous flag", 0); - return NULL; - } - /* set reference count */ - p->ref = 1; - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 3, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p)); - return p; -} - - -#if PBUF_STATS -#define DEC_PBUF_STATS do { --lwip_stats.pbuf.used; } while (0) -#else /* PBUF_STATS */ -#define DEC_PBUF_STATS -#endif /* PBUF_STATS */ - -#define PBUF_POOL_FAST_FREE(p) do { \ - p->next = pbuf_pool; \ - pbuf_pool = p; \ - DEC_PBUF_STATS; \ - } while (0) - -#if SYS_LIGHTWEIGHT_PROT -#define PBUF_POOL_FREE(p) do { \ - SYS_ARCH_DECL_PROTECT(old_level); \ - SYS_ARCH_PROTECT(old_level); \ - PBUF_POOL_FAST_FREE(p); \ - SYS_ARCH_UNPROTECT(old_level); \ - } while (0) -#else /* SYS_LIGHTWEIGHT_PROT */ -#define PBUF_POOL_FREE(p) do { \ - sys_sem_wait(pbuf_pool_free_sem); \ - PBUF_POOL_FAST_FREE(p); \ - sys_sem_signal(pbuf_pool_free_sem); \ - } while (0) -#endif /* SYS_LIGHTWEIGHT_PROT */ - -/** - * Shrink a pbuf chain to a desired length. - * - * @param p pbuf to shrink. - * @param new_len desired new length of pbuf chain - * - * Depending on the desired length, the first few pbufs in a chain might - * be skipped and left unchanged. The new last pbuf in the chain will be - * resized, and any remaining pbufs will be freed. - * - * @note If the pbuf is ROM/REF, only the ->tot_len and ->len fields are adjusted. - * @note May not be called on a packet queue. - * - * @bug Cannot grow the size of a pbuf (chain) (yet). - */ -void -pbuf_realloc(struct pbuf *p, u16_t new_len) -{ - struct pbuf *q; - u16_t rem_len; /* remaining length */ - s16_t grow; - - LWIP_ASSERT("pbuf_realloc: sane p->flags", p->flags == PBUF_FLAG_POOL || - p->flags == PBUF_FLAG_ROM || - p->flags == PBUF_FLAG_RAM || - p->flags == PBUF_FLAG_REF); - - /* desired length larger than current length? */ - if (new_len >= p->tot_len) { - /* enlarging not yet supported */ - return; - } - - /* the pbuf chain grows by (new_len - p->tot_len) bytes - * (which may be negative in case of shrinking) */ - grow = new_len - p->tot_len; - - /* first, step over any pbufs that should remain in the chain */ - rem_len = new_len; - q = p; - /* should this pbuf be kept? */ - while (rem_len > q->len) { - /* decrease remaining length by pbuf length */ - rem_len -= q->len; - /* decrease total length indicator */ - q->tot_len += grow; - /* proceed to next pbuf in chain */ - q = q->next; - } - /* we have now reached the new last pbuf (in q) */ - /* rem_len == desired length for pbuf q */ - - /* shrink allocated memory for PBUF_RAM */ - /* (other types merely adjust their length fields */ - if ((q->flags == PBUF_FLAG_RAM) && (rem_len != q->len)) { - /* reallocate and adjust the length of the pbuf that will be split */ - mem_realloc(q, (u8_t *)q->payload - (u8_t *)q + rem_len); - } - /* adjust length fields for new last pbuf */ - q->len = rem_len; - q->tot_len = q->len; - - /* any remaining pbufs in chain? */ - if (q->next != NULL) { - /* free remaining pbufs in chain */ - pbuf_free(q->next); - } - /* q is last packet in chain */ - q->next = NULL; - -} - -/** - * Adjusts the payload pointer to hide or reveal headers in the payload. - * - * Adjusts the ->payload pointer so that space for a header - * (dis)appears in the pbuf payload. - * - * The ->payload, ->tot_len and ->len fields are adjusted. - * - * @param hdr_size_inc Number of bytes to increment header size which - * increases the size of the pbuf. New space is on the front. - * (Using a negative value decreases the header size.) - * If hdr_size_inc is 0, this function does nothing and returns succesful. - * - * PBUF_ROM and PBUF_REF type buffers cannot have their sizes increased, so - * the call will fail. A check is made that the increase in header size does - * not move the payload pointer in front of the start of the buffer. - * @return non-zero on failure, zero on success. - * - */ -u8_t -pbuf_header(struct pbuf *p, s16_t header_size_increment) -{ - void *payload; - - LWIP_ASSERT("p != NULL", p != NULL); - if ((header_size_increment == 0) || (p == NULL)) return 0; - - /* remember current payload pointer */ - payload = p->payload; - - /* pbuf types containing payloads? */ - if (p->flags == PBUF_FLAG_RAM || p->flags == PBUF_FLAG_POOL) { - /* set new payload pointer */ - p->payload = (u8_t *)p->payload - header_size_increment; - /* boundary check fails? */ - if ((u8_t *)p->payload < (u8_t *)p + sizeof(struct pbuf)) { - LWIP_DEBUGF( PBUF_DEBUG | 2, ("pbuf_header: failed as %p < %p (not enough space for new header size)\n", - (void *)p->payload, - (void *)(p + 1)));\ - /* restore old payload pointer */ - p->payload = payload; - /* bail out unsuccesfully */ - return 1; - } - /* pbuf types refering to external payloads? */ - } else if (p->flags == PBUF_FLAG_REF || p->flags == PBUF_FLAG_ROM) { - /* hide a header in the payload? */ - if ((header_size_increment < 0) && (header_size_increment - p->len <= 0)) { - /* increase payload pointer */ - p->payload = (u8_t *)p->payload - header_size_increment; - } else { - /* cannot expand payload to front (yet!) - * bail out unsuccesfully */ - return 1; - } - } - /* modify pbuf length fields */ - p->len += header_size_increment; - p->tot_len += header_size_increment; - - LWIP_DEBUGF( PBUF_DEBUG, ("pbuf_header: old %p new %p (%"S16_F")\n", - (void *)payload, (void *)p->payload, header_size_increment)); - - return 0; -} - -/** - * Dereference a pbuf chain or queue and deallocate any no-longer-used - * pbufs at the head of this chain or queue. - * - * Decrements the pbuf reference count. If it reaches zero, the pbuf is - * deallocated. - * - * For a pbuf chain, this is repeated for each pbuf in the chain, - * up to the first pbuf which has a non-zero reference count after - * decrementing. So, when all reference counts are one, the whole - * chain is free'd. - * - * @param pbuf The pbuf (chain) to be dereferenced. - * - * @return the number of pbufs that were de-allocated - * from the head of the chain. - * - * @note MUST NOT be called on a packet queue (Not verified to work yet). - * @note the reference counter of a pbuf equals the number of pointers - * that refer to the pbuf (or into the pbuf). - * - * @internal examples: - * - * Assuming existing chains a->b->c with the following reference - * counts, calling pbuf_free(a) results in: - * - * 1->2->3 becomes ...1->3 - * 3->3->3 becomes 2->3->3 - * 1->1->2 becomes ......1 - * 2->1->1 becomes 1->1->1 - * 1->1->1 becomes ....... - * - */ -u8_t -pbuf_free(struct pbuf *p) -{ - struct pbuf *q; - u8_t count; - SYS_ARCH_DECL_PROTECT(old_level); - - LWIP_ASSERT("p != NULL", p != NULL); - /* if assertions are disabled, proceed with debug output */ - if (p == NULL) { - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 2, ("pbuf_free(p == NULL) was called.\n")); - return 0; - } - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 3, ("pbuf_free(%p)\n", (void *)p)); - - PERF_START; - - LWIP_ASSERT("pbuf_free: sane flags", - p->flags == PBUF_FLAG_RAM || p->flags == PBUF_FLAG_ROM || - p->flags == PBUF_FLAG_REF || p->flags == PBUF_FLAG_POOL); - - count = 0; - /* Since decrementing ref cannot be guaranteed to be a single machine operation - * we must protect it. Also, the later test of ref must be protected. - */ - SYS_ARCH_PROTECT(old_level); - /* de-allocate all consecutive pbufs from the head of the chain that - * obtain a zero reference count after decrementing*/ - while (p != NULL) { - /* all pbufs in a chain are referenced at least once */ - LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0); - /* decrease reference count (number of pointers to pbuf) */ - p->ref--; - /* this pbuf is no longer referenced to? */ - if (p->ref == 0) { - /* remember next pbuf in chain for next iteration */ - q = p->next; - LWIP_DEBUGF( PBUF_DEBUG | 2, ("pbuf_free: deallocating %p\n", (void *)p)); - /* is this a pbuf from the pool? */ - if (p->flags == PBUF_FLAG_POOL) { - p->len = p->tot_len = PBUF_POOL_BUFSIZE; - p->payload = (void *)((u8_t *)p + sizeof(struct pbuf)); - PBUF_POOL_FREE(p); - /* is this a ROM or RAM referencing pbuf? */ - } else if (p->flags == PBUF_FLAG_ROM || p->flags == PBUF_FLAG_REF) { - memp_free(MEMP_PBUF, p); - /* p->flags == PBUF_FLAG_RAM */ - } else { - mem_free(p); - } - count++; - /* proceed to next pbuf */ - p = q; - /* p->ref > 0, this pbuf is still referenced to */ - /* (and so the remaining pbufs in chain as well) */ - } else { - LWIP_DEBUGF( PBUF_DEBUG | 2, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, (u16_t)p->ref)); - /* stop walking through the chain */ - p = NULL; - } - } - SYS_ARCH_UNPROTECT(old_level); - PERF_STOP("pbuf_free"); - /* return number of de-allocated pbufs */ - return count; -} - -/** - * Count number of pbufs in a chain - * - * @param p first pbuf of chain - * @return the number of pbufs in a chain - */ - -u8_t -pbuf_clen(struct pbuf *p) -{ - u8_t len; - - len = 0; - while (p != NULL) { - ++len; - p = p->next; - } - return len; -} - -/** - * Increment the reference count of the pbuf. - * - * @param p pbuf to increase reference counter of - * - */ -void -pbuf_ref(struct pbuf *p) -{ - SYS_ARCH_DECL_PROTECT(old_level); - /* pbuf given? */ - if (p != NULL) { - SYS_ARCH_PROTECT(old_level); - ++(p->ref); - SYS_ARCH_UNPROTECT(old_level); - } -} - -/** - * Concatenate two pbufs (each may be a pbuf chain) and take over - * the caller's reference of the tail pbuf. - * - * @note The caller MAY NOT reference the tail pbuf afterwards. - * Use pbuf_chain() for that purpose. - * - * @see pbuf_chain() - */ - -void -pbuf_cat(struct pbuf *h, struct pbuf *t) -{ - struct pbuf *p; - - LWIP_ASSERT("h != NULL (programmer violates API)", h != NULL); - LWIP_ASSERT("t != NULL (programmer violates API)", t != NULL); - if ((h == NULL) || (t == NULL)) return; - - /* proceed to last pbuf of chain */ - for (p = h; p->next != NULL; p = p->next) { - /* add total length of second chain to all totals of first chain */ - p->tot_len += t->tot_len; - } - /* { p is last pbuf of first h chain, p->next == NULL } */ - LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len); - LWIP_ASSERT("p->next == NULL", p->next == NULL); - /* add total length of second chain to last pbuf total of first chain */ - p->tot_len += t->tot_len; - /* chain last pbuf of head (p) with first of tail (t) */ - p->next = t; - /* p->next now references t, but the caller will drop its reference to t, - * so netto there is no change to the reference count of t. - */ -} - -/** - * Chain two pbufs (or pbuf chains) together. - * - * The caller MUST call pbuf_free(t) once it has stopped - * using it. Use pbuf_cat() instead if you no longer use t. - * - * @param h head pbuf (chain) - * @param t tail pbuf (chain) - * @note The pbufs MUST belong to the same packet. - * @note MAY NOT be called on a packet queue. - * - * The ->tot_len fields of all pbufs of the head chain are adjusted. - * The ->next field of the last pbuf of the head chain is adjusted. - * The ->ref field of the first pbuf of the tail chain is adjusted. - * - */ -void -pbuf_chain(struct pbuf *h, struct pbuf *t) -{ - pbuf_cat(h, t); - /* t is now referenced by h */ - pbuf_ref(t); - LWIP_DEBUGF(PBUF_DEBUG | DBG_FRESH | 2, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t)); -} - -/* For packet queueing. Note that queued packets MUST be dequeued first - * using pbuf_dequeue() before calling other pbuf_() functions. */ -#if ARP_QUEUEING -/** - * Add a packet to the end of a queue. - * - * @param q pointer to first packet on the queue - * @param n packet to be queued - * - * Both packets MUST be given, and must be different. - */ -void -pbuf_queue(struct pbuf *p, struct pbuf *n) -{ -#if PBUF_DEBUG /* remember head of queue */ - struct pbuf *q = p; -#endif - /* programmer stupidity checks */ - LWIP_ASSERT("p == NULL in pbuf_queue: this indicates a programmer error\n", p != NULL); - LWIP_ASSERT("n == NULL in pbuf_queue: this indicates a programmer error\n", n != NULL); - LWIP_ASSERT("p == n in pbuf_queue: this indicates a programmer error\n", p != n); - if ((p == NULL) || (n == NULL) || (p == n)){ - LWIP_DEBUGF(PBUF_DEBUG | DBG_HALT | 3, ("pbuf_queue: programmer argument error\n")); - return; - } - - /* iterate through all packets on queue */ - while (p->next != NULL) { -/* be very picky about pbuf chain correctness */ -#if PBUF_DEBUG - /* iterate through all pbufs in packet */ - while (p->tot_len != p->len) { - /* make sure invariant condition holds */ - LWIP_ASSERT("p->len < p->tot_len", p->len < p->tot_len); - /* make sure each packet is complete */ - LWIP_ASSERT("p->next != NULL", p->next != NULL); - p = p->next; - /* { p->tot_len == p->len => p is last pbuf of a packet } */ - } - /* { p is last pbuf of a packet } */ - /* proceed to next packet on queue */ -#endif - /* proceed to next pbuf */ - if (p->next != NULL) p = p->next; - } - /* { p->tot_len == p->len and p->next == NULL } ==> - * { p is last pbuf of last packet on queue } */ - /* chain last pbuf of queue with n */ - p->next = n; - /* n is now referenced to by the (packet p in the) queue */ - pbuf_ref(n); -#if PBUF_DEBUG - LWIP_DEBUGF(PBUF_DEBUG | DBG_FRESH | 2, - ("pbuf_queue: newly queued packet %p sits after packet %p in queue %p\n", - (void *)n, (void *)p, (void *)q)); -#endif -} - -/** - * Remove a packet from the head of a queue. - * - * The caller MUST reference the remainder of the queue (as returned). The - * caller MUST NOT call pbuf_ref() as it implicitly takes over the reference - * from p. - * - * @param p pointer to first packet on the queue which will be dequeued. - * @return first packet on the remaining queue (NULL if no further packets). - * - */ -struct pbuf * -pbuf_dequeue(struct pbuf *p) -{ - struct pbuf *q; - LWIP_ASSERT("p != NULL", p != NULL); - - /* iterate through all pbufs in packet p */ - while (p->tot_len != p->len) { - /* make sure invariant condition holds */ - LWIP_ASSERT("p->len < p->tot_len", p->len < p->tot_len); - /* make sure each packet is complete */ - LWIP_ASSERT("p->next != NULL", p->next != NULL); - p = p->next; - } - /* { p->tot_len == p->len } => p is the last pbuf of the first packet */ - /* remember next packet on queue in q */ - q = p->next; - /* dequeue packet p from queue */ - p->next = NULL; - /* any next packet on queue? */ - if (q != NULL) { - /* although q is no longer referenced by p, it MUST be referenced by - * the caller, who is maintaining this packet queue. So, we do not call - * pbuf_free(q) here, resulting in an implicit pbuf_ref(q) for the caller. */ - LWIP_DEBUGF(PBUF_DEBUG | DBG_FRESH | 2, ("pbuf_dequeue: first remaining packet on queue is %p\n", (void *)q)); - } else { - LWIP_DEBUGF(PBUF_DEBUG | DBG_FRESH | 2, ("pbuf_dequeue: no further packets on queue\n")); - } - return q; -} -#endif - -/** - * - * Create PBUF_POOL (or PBUF_RAM) copies of PBUF_REF pbufs. - * - * Used to queue packets on behalf of the lwIP stack, such as - * ARP based queueing. - * - * Go through a pbuf chain and replace any PBUF_REF buffers - * with PBUF_POOL (or PBUF_RAM) pbufs, each taking a copy of - * the referenced data. - * - * @note You MUST explicitly use p = pbuf_take(p); - * The pbuf you give as argument, may have been replaced - * by a (differently located) copy through pbuf_take()! - * - * @note Any replaced pbufs will be freed through pbuf_free(). - * This may deallocate them if they become no longer referenced. - * - * @param p Head of pbuf chain to process - * - * @return Pointer to head of pbuf chain - */ -struct pbuf * -pbuf_take(struct pbuf *p) -{ - struct pbuf *q , *prev, *head; - LWIP_ASSERT("pbuf_take: p != NULL\n", p != NULL); - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 3, ("pbuf_take(%p)\n", (void*)p)); - - prev = NULL; - head = p; - /* iterate through pbuf chain */ - do - { - /* pbuf is of type PBUF_REF? */ - if (p->flags == PBUF_FLAG_REF) { - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE, ("pbuf_take: encountered PBUF_REF %p\n", (void *)p)); - /* allocate a pbuf (w/ payload) fully in RAM */ - /* PBUF_POOL buffers are faster if we can use them */ - if (p->len <= PBUF_POOL_BUFSIZE) { - q = pbuf_alloc(PBUF_RAW, p->len, PBUF_POOL); - if (q == NULL) { - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 2, ("pbuf_take: Could not allocate PBUF_POOL\n")); - } - } else { - /* no replacement pbuf yet */ - q = NULL; - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 2, ("pbuf_take: PBUF_POOL too small to replace PBUF_REF\n")); - } - /* no (large enough) PBUF_POOL was available? retry with PBUF_RAM */ - if (q == NULL) { - q = pbuf_alloc(PBUF_RAW, p->len, PBUF_RAM); - if (q == NULL) { - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 2, ("pbuf_take: Could not allocate PBUF_RAM\n")); - } - } - /* replacement pbuf could be allocated? */ - if (q != NULL) - { - /* copy p to q */ - /* copy successor */ - q->next = p->next; - /* remove linkage from original pbuf */ - p->next = NULL; - /* remove linkage to original pbuf */ - if (prev != NULL) { - /* prev->next == p at this point */ - LWIP_ASSERT("prev->next == p", prev->next == p); - /* break chain and insert new pbuf instead */ - prev->next = q; - /* prev == NULL, so we replaced the head pbuf of the chain */ - } else { - head = q; - } - /* copy pbuf payload */ - memcpy(q->payload, p->payload, p->len); - q->tot_len = p->tot_len; - q->len = p->len; - /* in case p was the first pbuf, it is no longer refered to by - * our caller, as the caller MUST do p = pbuf_take(p); - * in case p was not the first pbuf, it is no longer refered to - * by prev. we can safely free the pbuf here. - * (note that we have set p->next to NULL already so that - * we will not free the rest of the chain by accident.) - */ - pbuf_free(p); - /* do not copy ref, since someone else might be using the old buffer */ - LWIP_DEBUGF(PBUF_DEBUG, ("pbuf_take: replaced PBUF_REF %p with %p\n", (void *)p, (void *)q)); - p = q; - } else { - /* deallocate chain */ - pbuf_free(head); - LWIP_DEBUGF(PBUF_DEBUG | 2, ("pbuf_take: failed to allocate replacement pbuf for %p\n", (void *)p)); - return NULL; - } - /* p->flags != PBUF_FLAG_REF */ - } else { - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 1, ("pbuf_take: skipping pbuf not of type PBUF_REF\n")); - } - /* remember this pbuf */ - prev = p; - /* proceed to next pbuf in original chain */ - p = p->next; - } while (p); - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 1, ("pbuf_take: end of chain reached.\n")); - - return head; -} - -/** - * Dechains the first pbuf from its succeeding pbufs in the chain. - * - * Makes p->tot_len field equal to p->len. - * @param p pbuf to dechain - * @return remainder of the pbuf chain, or NULL if it was de-allocated. - * @note May not be called on a packet queue. - */ -struct pbuf * -pbuf_dechain(struct pbuf *p) -{ - struct pbuf *q; - u8_t tail_gone = 1; - /* tail */ - q = p->next; - /* pbuf has successor in chain? */ - if (q != NULL) { - /* assert tot_len invariant: (p->tot_len == p->len + (p->next? p->next->tot_len: 0) */ - LWIP_ASSERT("p->tot_len == p->len + q->tot_len", q->tot_len == p->tot_len - p->len); - /* enforce invariant if assertion is disabled */ - q->tot_len = p->tot_len - p->len; - /* decouple pbuf from remainder */ - p->next = NULL; - /* total length of pbuf p is its own length only */ - p->tot_len = p->len; - /* q is no longer referenced by p, free it */ - LWIP_DEBUGF(PBUF_DEBUG | DBG_STATE, ("pbuf_dechain: unreferencing %p\n", (void *)q)); - tail_gone = pbuf_free(q); - if (tail_gone > 0) { - LWIP_DEBUGF(PBUF_DEBUG | DBG_STATE, - ("pbuf_dechain: deallocated %p (as it is no longer referenced)\n", (void *)q)); - } - /* return remaining tail or NULL if deallocated */ - } - /* assert tot_len invariant: (p->tot_len == p->len + (p->next? p->next->tot_len: 0) */ - LWIP_ASSERT("p->tot_len == p->len", p->tot_len == p->len); - return (tail_gone > 0? NULL: q); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/raw.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/raw.c deleted file mode 100644 index 30199804..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/raw.c +++ /dev/null @@ -1,326 +0,0 @@ -/** - * @file - * - * Implementation of raw protocol PCBs for low-level handling of - * different types of protocols besides (or overriding) those - * already available in lwIP. - * - */ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include - -#include "lwip/opt.h" - -#include "lwip/def.h" -#include "lwip/memp.h" -#include "lwip/inet.h" -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/raw.h" - -#include "lwip/stats.h" - -#include "arch/perf.h" -#include "lwip/snmp.h" - -#if LWIP_RAW - -/** The list of RAW PCBs */ -static struct raw_pcb *raw_pcbs = NULL; - -void -raw_init(void) -{ - raw_pcbs = NULL; -} - -/** - * Determine if in incoming IP packet is covered by a RAW PCB - * and if so, pass it to a user-provided receive callback function. - * - * Given an incoming IP datagram (as a chain of pbufs) this function - * finds a corresponding RAW PCB and calls the corresponding receive - * callback function. - * - * @param pbuf pbuf to be demultiplexed to a RAW PCB. - * @param netif network interface on which the datagram was received. - * @Return - 1 if the packet has been eaten by a RAW PCB receive - * callback function. The caller MAY NOT not reference the - * packet any longer, and MAY NOT call pbuf_free(). - * @return - 0 if packet is not eaten (pbuf is still referenced by the - * caller). - * - */ -u8_t -raw_input(struct pbuf *p, struct netif *inp) -{ - struct raw_pcb *pcb; - struct ip_hdr *iphdr; - s16_t proto; - u8_t eaten = 0; - - iphdr = p->payload; - proto = IPH_PROTO(iphdr); - - pcb = raw_pcbs; - /* loop through all raw pcbs until the packet is eaten by one */ - /* this allows multiple pcbs to match against the packet by design */ - while ((eaten == 0) && (pcb != NULL)) { - if (pcb->protocol == proto) { - /* receive callback function available? */ - if (pcb->recv != NULL) { - /* the receive callback function did not eat the packet? */ - if (pcb->recv(pcb->recv_arg, pcb, p, &(iphdr->src)) != 0) - { - /* receive function ate the packet */ - p = NULL; - eaten = 1; - } - } - /* no receive callback function was set for this raw PCB */ - /* drop the packet */ - } - pcb = pcb->next; - } - return eaten; -} - -/** - * Bind a RAW PCB. - * - * @param pcb RAW PCB to be bound with a local address ipaddr. - * @param ipaddr local IP address to bind with. Use IP_ADDR_ANY to - * bind to all local interfaces. - * - * @return lwIP error code. - * - ERR_OK. Successful. No error occured. - * - ERR_USE. The specified IP address is already bound to by - * another RAW PCB. - * - * @see raw_disconnect() - */ -err_t -raw_bind(struct raw_pcb *pcb, struct ip_addr *ipaddr) -{ - ip_addr_set(&pcb->local_ip, ipaddr); - return ERR_OK; -} - -/** - * Connect an RAW PCB. This function is required by upper layers - * of lwip. Using the raw api you could use raw_sendto() instead - * - * This will associate the RAW PCB with the remote address. - * - * @param pcb RAW PCB to be connected with remote address ipaddr and port. - * @param ipaddr remote IP address to connect with. - * - * @return lwIP error code - * - * @see raw_disconnect() and raw_sendto() - */ -err_t -raw_connect(struct raw_pcb *pcb, struct ip_addr *ipaddr) -{ - ip_addr_set(&pcb->remote_ip, ipaddr); - return ERR_OK; -} - - -/** - * Set the callback function for received packets that match the - * raw PCB's protocol and binding. - * - * The callback function MUST either - * - eat the packet by calling pbuf_free() and returning non-zero. The - * packet will not be passed to other raw PCBs or other protocol layers. - * - not free the packet, and return zero. The packet will be matched - * against further PCBs and/or forwarded to another protocol layers. - * - * @return non-zero if the packet was free()d, zero if the packet remains - * available for others. - */ -void -raw_recv(struct raw_pcb *pcb, - u8_t (* recv)(void *arg, struct raw_pcb *upcb, struct pbuf *p, - struct ip_addr *addr), - void *recv_arg) -{ - /* remember recv() callback and user data */ - pcb->recv = recv; - pcb->recv_arg = recv_arg; -} - -/** - * Send the raw IP packet to the given address. Note that actually you cannot - * modify the IP headers (this is inconsistent with the receive callback where - * you actually get the IP headers), you can only specify the IP payload here. - * It requires some more changes in lwIP. (there will be a raw_send() function - * then.) - * - * @param pcb the raw pcb which to send - * @param p the IP payload to send - * @param ipaddr the destination address of the IP packet - * - */ -err_t -raw_sendto(struct raw_pcb *pcb, struct pbuf *p, struct ip_addr *ipaddr) -{ - err_t err; - struct netif *netif; - struct ip_addr *src_ip; - struct pbuf *q; /* q will be sent down the stack */ - - LWIP_DEBUGF(RAW_DEBUG | DBG_TRACE | 3, ("raw_sendto\n")); - - /* not enough space to add an IP header to first pbuf in given p chain? */ - if (pbuf_header(p, IP_HLEN)) { - /* allocate header in new pbuf */ - q = pbuf_alloc(PBUF_IP, 0, PBUF_RAM); - /* new header pbuf could not be allocated? */ - if (q == NULL) { - LWIP_DEBUGF(RAW_DEBUG | DBG_TRACE | 2, ("raw_sendto: could not allocate header\n")); - return ERR_MEM; - } - /* chain header q in front of given pbuf p */ - pbuf_chain(q, p); - /* { first pbuf q points to header pbuf } */ - LWIP_DEBUGF(RAW_DEBUG, ("raw_sendto: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p)); - } else { - /* first pbuf q equals given pbuf */ - q = p; - pbuf_header(q, -IP_HLEN); - } - - if ((netif = ip_route(ipaddr)) == NULL) { - LWIP_DEBUGF(RAW_DEBUG | 1, ("raw_sendto: No route to 0x%"X32_F"\n", ipaddr->addr)); -#if RAW_STATS - /* ++lwip_stats.raw.rterr;*/ -#endif /* RAW_STATS */ - /* free any temporary header pbuf allocated by pbuf_header() */ - if (q != p) { - pbuf_free(q); - } - return ERR_RTE; - } - - if (ip_addr_isany(&pcb->local_ip)) { - /* use outgoing network interface IP address as source address */ - src_ip = &(netif->ip_addr); - } else { - /* use RAW PCB local IP address as source address */ - src_ip = &(pcb->local_ip); - } - - err = ip_output_if (q, src_ip, ipaddr, pcb->ttl, pcb->tos, pcb->protocol, netif); - - /* did we chain a header earlier? */ - if (q != p) { - /* free the header */ - pbuf_free(q); - } - return err; -} - -/** - * Send the raw IP packet to the address given by raw_connect() - * - * @param pcb the raw pcb which to send - * @param p the IP payload to send - * @param ipaddr the destination address of the IP packet - * - */ -err_t -raw_send(struct raw_pcb *pcb, struct pbuf *p) -{ - return raw_sendto(pcb, p, &pcb->remote_ip); -} - -/** - * Remove an RAW PCB. - * - * @param pcb RAW PCB to be removed. The PCB is removed from the list of - * RAW PCB's and the data structure is freed from memory. - * - * @see raw_new() - */ -void -raw_remove(struct raw_pcb *pcb) -{ - struct raw_pcb *pcb2; - /* pcb to be removed is first in list? */ - if (raw_pcbs == pcb) { - /* make list start at 2nd pcb */ - raw_pcbs = raw_pcbs->next; - /* pcb not 1st in list */ - } else for(pcb2 = raw_pcbs; pcb2 != NULL; pcb2 = pcb2->next) { - /* find pcb in raw_pcbs list */ - if (pcb2->next != NULL && pcb2->next == pcb) { - /* remove pcb from list */ - pcb2->next = pcb->next; - } - } - memp_free(MEMP_RAW_PCB, pcb); -} - -/** - * Create a RAW PCB. - * - * @return The RAW PCB which was created. NULL if the PCB data structure - * could not be allocated. - * - * @param proto the protocol number of the IPs payload (e.g. IP_PROTO_ICMP) - * - * @see raw_remove() - */ -struct raw_pcb * -raw_new(u16_t proto) { - struct raw_pcb *pcb; - - LWIP_DEBUGF(RAW_DEBUG | DBG_TRACE | 3, ("raw_new\n")); - - pcb = memp_malloc(MEMP_RAW_PCB); - /* could allocate RAW PCB? */ - if (pcb != NULL) { - /* initialize PCB to all zeroes */ - memset(pcb, 0, sizeof(struct raw_pcb)); - pcb->protocol = proto; - pcb->ttl = RAW_TTL; - pcb->next = raw_pcbs; - raw_pcbs = pcb; - } - return pcb; -} - -#endif /* LWIP_RAW */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/stats.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/stats.c deleted file mode 100644 index c94623f7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/stats.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include - -#include "lwip/opt.h" - -#include "lwip/def.h" - -#include "lwip/stats.h" -#include "lwip/mem.h" - - -#if LWIP_STATS -struct stats_ lwip_stats; - -void -stats_init(void) -{ - memset(&lwip_stats, 0, sizeof(struct stats_)); -} -#if LWIP_STATS_DISPLAY -void -stats_display_proto(struct stats_proto *proto, char *name) -{ - LWIP_PLATFORM_DIAG(("\n%s\n\t", name)); - LWIP_PLATFORM_DIAG(("xmit: %"S16_F"\n\t", proto->xmit)); - LWIP_PLATFORM_DIAG(("rexmit: %"S16_F"\n\t", proto->rexmit)); - LWIP_PLATFORM_DIAG(("recv: %"S16_F"\n\t", proto->recv)); - LWIP_PLATFORM_DIAG(("fw: %"S16_F"\n\t", proto->fw)); - LWIP_PLATFORM_DIAG(("drop: %"S16_F"\n\t", proto->drop)); - LWIP_PLATFORM_DIAG(("chkerr: %"S16_F"\n\t", proto->chkerr)); - LWIP_PLATFORM_DIAG(("lenerr: %"S16_F"\n\t", proto->lenerr)); - LWIP_PLATFORM_DIAG(("memerr: %"S16_F"\n\t", proto->memerr)); - LWIP_PLATFORM_DIAG(("rterr: %"S16_F"\n\t", proto->rterr)); - LWIP_PLATFORM_DIAG(("proterr: %"S16_F"\n\t", proto->proterr)); - LWIP_PLATFORM_DIAG(("opterr: %"S16_F"\n\t", proto->opterr)); - LWIP_PLATFORM_DIAG(("err: %"S16_F"\n\t", proto->err)); - LWIP_PLATFORM_DIAG(("cachehit: %"S16_F"\n", proto->cachehit)); -} - -void -stats_display_pbuf(struct stats_pbuf *pbuf) -{ - LWIP_PLATFORM_DIAG(("\nPBUF\n\t")); - LWIP_PLATFORM_DIAG(("avail: %"S16_F"\n\t", pbuf->avail)); - LWIP_PLATFORM_DIAG(("used: %"S16_F"\n\t", pbuf->used)); - LWIP_PLATFORM_DIAG(("max: %"S16_F"\n\t", pbuf->max)); - LWIP_PLATFORM_DIAG(("err: %"S16_F"\n\t", pbuf->err)); - LWIP_PLATFORM_DIAG(("alloc_locked: %"S16_F"\n\t", pbuf->alloc_locked)); - LWIP_PLATFORM_DIAG(("refresh_locked: %"S16_F"\n", pbuf->refresh_locked)); -} - -void -stats_display_mem(struct stats_mem *mem, char *name) -{ - LWIP_PLATFORM_DIAG(("\n MEM %s\n\t", name)); - LWIP_PLATFORM_DIAG(("avail: %"S16_F"\n\t", mem->avail)); - LWIP_PLATFORM_DIAG(("used: %"S16_F"\n\t", mem->used)); - LWIP_PLATFORM_DIAG(("max: %"S16_F"\n\t", mem->max)); - LWIP_PLATFORM_DIAG(("err: %"S16_F"\n", mem->err)); - -} - -void -stats_display(void) -{ - s16_t i; - char * memp_names[] = {"PBUF", "RAW_PCB", "UDP_PCB", "TCP_PCB", "TCP_PCB_LISTEN", - "TCP_SEG", "NETBUF", "NETCONN", "API_MSG", "TCP_MSG", "TIMEOUT"}; - stats_display_proto(&lwip_stats.link, "LINK"); - stats_display_proto(&lwip_stats.ip_frag, "IP_FRAG"); - stats_display_proto(&lwip_stats.ip, "IP"); - stats_display_proto(&lwip_stats.icmp, "ICMP"); - stats_display_proto(&lwip_stats.udp, "UDP"); - stats_display_proto(&lwip_stats.tcp, "TCP"); - stats_display_pbuf(&lwip_stats.pbuf); - stats_display_mem(&lwip_stats.mem, "HEAP"); - for (i = 0; i < MEMP_MAX; i++) { - stats_display_mem(&lwip_stats.memp[i], memp_names[i]); - } - -} -#endif /* LWIP_STATS_DISPLAY */ -#endif /* LWIP_STATS */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/sys.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/sys.c deleted file mode 100644 index a7dbf34d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/sys.c +++ /dev/null @@ -1,294 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/sys.h" -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/memp.h" - -#if (NO_SYS == 0) - -struct sswt_cb -{ - s16_t timeflag; - sys_sem_t *psem; -}; - - - -void -sys_mbox_fetch(sys_mbox_t mbox, void **msg) -{ - u32_t time; - struct sys_timeouts *timeouts; - struct sys_timeout *tmptimeout; - sys_timeout_handler h; - void *arg; - - - again: - timeouts = sys_arch_timeouts(); - - if (!timeouts || !timeouts->next) { - sys_arch_mbox_fetch(mbox, msg, 0); - } else { - if (timeouts->next->time > 0) { - time = sys_arch_mbox_fetch(mbox, msg, timeouts->next->time); - } else { - time = SYS_ARCH_TIMEOUT; - } - - if (time == SYS_ARCH_TIMEOUT) { - /* If time == SYS_ARCH_TIMEOUT, a timeout occured before a message - could be fetched. We should now call the timeout handler and - deallocate the memory allocated for the timeout. */ - tmptimeout = timeouts->next; - timeouts->next = tmptimeout->next; - h = tmptimeout->h; - arg = tmptimeout->arg; - memp_free(MEMP_SYS_TIMEOUT, tmptimeout); - if (h != NULL) { - LWIP_DEBUGF(SYS_DEBUG, ("smf calling h=%p(%p)\n", (void *)h, (void *)arg)); - h(arg); - } - - /* We try again to fetch a message from the mbox. */ - goto again; - } else { - /* If time != SYS_ARCH_TIMEOUT, a message was received before the timeout - occured. The time variable is set to the number of - milliseconds we waited for the message. */ - if (time <= timeouts->next->time) { - timeouts->next->time -= time; - } else { - timeouts->next->time = 0; - } - } - - } -} - -void -sys_sem_wait(sys_sem_t sem) -{ - u32_t time; - struct sys_timeouts *timeouts; - struct sys_timeout *tmptimeout; - sys_timeout_handler h; - void *arg; - - /* while (sys_arch_sem_wait(sem, 1000) == 0); - return;*/ - - again: - - timeouts = sys_arch_timeouts(); - - if (!timeouts || !timeouts->next) { - sys_arch_sem_wait(sem, 0); - } else { - if (timeouts->next->time > 0) { - time = sys_arch_sem_wait(sem, timeouts->next->time); - } else { - time = SYS_ARCH_TIMEOUT; - } - - if (time == SYS_ARCH_TIMEOUT) { - /* If time == SYS_ARCH_TIMEOUT, a timeout occured before a message - could be fetched. We should now call the timeout handler and - deallocate the memory allocated for the timeout. */ - tmptimeout = timeouts->next; - timeouts->next = tmptimeout->next; - h = tmptimeout->h; - arg = tmptimeout->arg; - memp_free(MEMP_SYS_TIMEOUT, tmptimeout); - if (h != NULL) { - LWIP_DEBUGF(SYS_DEBUG, ("ssw h=%p(%p)\n", (void *)h, (void *)arg)); - h(arg); - } - - - /* We try again to fetch a message from the mbox. */ - goto again; - } else { - /* If time != SYS_ARCH_TIMEOUT, a message was received before the timeout - occured. The time variable is set to the number of - milliseconds we waited for the message. */ - if (time <= timeouts->next->time) { - timeouts->next->time -= time; - } else { - timeouts->next->time = 0; - } - } - - } -} - -void -sys_timeout(u32_t msecs, sys_timeout_handler h, void *arg) -{ - struct sys_timeouts *timeouts; - struct sys_timeout *timeout, *t; - - timeout = memp_malloc(MEMP_SYS_TIMEOUT); - if (timeout == NULL) { - return; - } - timeout->next = NULL; - timeout->h = h; - timeout->arg = arg; - timeout->time = msecs; - - timeouts = sys_arch_timeouts(); - - LWIP_DEBUGF(SYS_DEBUG, ("sys_timeout: %p msecs=%"U32_F" h=%p arg=%p\n", - (void *)timeout, msecs, (void *)h, (void *)arg)); - - LWIP_ASSERT("sys_timeout: timeouts != NULL", timeouts != NULL); - - if (timeouts->next == NULL) { - timeouts->next = timeout; - return; - } - - if (timeouts->next->time > msecs) { - timeouts->next->time -= msecs; - timeout->next = timeouts->next; - timeouts->next = timeout; - } else { - for(t = timeouts->next; t != NULL; t = t->next) { - timeout->time -= t->time; - if (t->next == NULL || t->next->time > timeout->time) { - if (t->next != NULL) { - t->next->time -= timeout->time; - } - timeout->next = t->next; - t->next = timeout; - break; - } - } - } - -} - -/* Go through timeout list (for this task only) and remove the first matching entry, - even though the timeout has not triggered yet. -*/ - -void -sys_untimeout(sys_timeout_handler h, void *arg) -{ - struct sys_timeouts *timeouts; - struct sys_timeout *prev_t, *t; - - timeouts = sys_arch_timeouts(); - - if (timeouts->next == NULL) - return; - - for (t = timeouts->next, prev_t = NULL; t != NULL; prev_t = t, t = t->next) - { - if ((t->h == h) && (t->arg == arg)) - { - /* We have a match */ - /* Unlink from previous in list */ - if (prev_t == NULL) - timeouts->next = t->next; - else - prev_t->next = t->next; - /* If not the last one, add time of this one back to next */ - if (t->next != NULL) - t->next->time += t->time; - memp_free(MEMP_SYS_TIMEOUT, t); - return; - } - } - return; -} - - - - - -static void -sswt_handler(void *arg) -{ - struct sswt_cb *sswt_cb = (struct sswt_cb *) arg; - - /* Timeout. Set flag to TRUE and signal semaphore */ - sswt_cb->timeflag = 1; - sys_sem_signal(*(sswt_cb->psem)); -} - -/* Wait for a semaphore with timeout (specified in ms) */ -/* timeout = 0: wait forever */ -/* Returns 0 on timeout. 1 otherwise */ - -int -sys_sem_wait_timeout(sys_sem_t sem, u32_t timeout) -{ - struct sswt_cb sswt_cb; - - sswt_cb.psem = &sem; - sswt_cb.timeflag = 0; - - /* If timeout is zero, then just wait forever */ - if (timeout > 0) - /* Create a timer and pass it the address of our flag */ - sys_timeout(timeout, sswt_handler, &sswt_cb); - sys_sem_wait(sem); - /* Was it a timeout? */ - if (sswt_cb.timeflag) - { - /* timeout */ - return 0; - } else { - /* Not a timeout. Remove timeout entry */ - sys_untimeout(sswt_handler, &sswt_cb); - return 1; - } - -} - - -void -sys_msleep(u32_t ms) -{ - sys_sem_t delaysem = sys_sem_new(0); - - sys_sem_wait_timeout(delaysem, ms); - - sys_sem_free(delaysem); -} - - -#endif /* NO_SYS */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/tcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/tcp.c deleted file mode 100644 index 41a9edb4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/tcp.c +++ /dev/null @@ -1,1171 +0,0 @@ -/** - * @file - * - * Transmission Control Protocol for IP - * - * This file contains common functions for the TCP implementation, such as functinos - * for manipulating the data structures and the TCP timer functions. TCP functions - * related to input and output is found in tcp_in.c and tcp_out.c respectively. - * - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include - -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/mem.h" -#include "lwip/memp.h" - -#include "lwip/tcp.h" -#if LWIP_TCP - -/* Incremented every coarse grained timer shot - (typically every 500 ms, determined by TCP_COARSE_TIMEOUT). */ -u32_t tcp_ticks; -const u8_t tcp_backoff[13] = - { 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7}; - -/* The TCP PCB lists. */ - -/** List of all TCP PCBs in LISTEN state */ -union tcp_listen_pcbs_t tcp_listen_pcbs; -/** List of all TCP PCBs that are in a state in which - * they accept or send data. */ -struct tcp_pcb *tcp_active_pcbs; -/** List of all TCP PCBs in TIME-WAIT state */ -struct tcp_pcb *tcp_tw_pcbs; - -struct tcp_pcb *tcp_tmp_pcb; - -static u8_t tcp_timer; -static u16_t tcp_new_port(void); - -/** - * Initializes the TCP layer. - */ -void -tcp_init(void) -{ - /* Clear globals. */ - tcp_listen_pcbs.listen_pcbs = NULL; - tcp_active_pcbs = NULL; - tcp_tw_pcbs = NULL; - tcp_tmp_pcb = NULL; - - /* initialize timer */ - tcp_ticks = 0; - tcp_timer = 0; - -} - -/** - * Called periodically to dispatch TCP timers. - * - */ -void -tcp_tmr(void) -{ - /* Call tcp_fasttmr() every 250 ms */ - tcp_fasttmr(); - - if (++tcp_timer & 1) { - /* Call tcp_tmr() every 500 ms, i.e., every other timer - tcp_tmr() is called. */ - tcp_slowtmr(); - } -} - -/** - * Closes the connection held by the PCB. - * - */ -err_t -tcp_close(struct tcp_pcb *pcb) -{ - err_t err; - -#if TCP_DEBUG - LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in state ")); - tcp_debug_print_state(pcb->state); - LWIP_DEBUGF(TCP_DEBUG, ("\n")); -#endif /* TCP_DEBUG */ - switch (pcb->state) { - case CLOSED: - /* Closing a pcb in the CLOSED state might seem erroneous, - * however, it is in this state once allocated and as yet unused - * and the user needs some way to free it should the need arise. - * Calling tcp_close() with a pcb that has already been closed, (i.e. twice) - * or for a pcb that has been used and then entered the CLOSED state - * is erroneous, but this should never happen as the pcb has in those cases - * been freed, and so any remaining handles are bogus. */ - err = ERR_OK; - memp_free(MEMP_TCP_PCB, pcb); - pcb = NULL; - break; - case LISTEN: - err = ERR_OK; - tcp_pcb_remove((struct tcp_pcb **)&tcp_listen_pcbs.pcbs, pcb); - memp_free(MEMP_TCP_PCB_LISTEN, pcb); - pcb = NULL; - break; - case SYN_SENT: - err = ERR_OK; - tcp_pcb_remove(&tcp_active_pcbs, pcb); - memp_free(MEMP_TCP_PCB, pcb); - pcb = NULL; - break; - case SYN_RCVD: - case ESTABLISHED: - err = tcp_send_ctrl(pcb, TCP_FIN); - if (err == ERR_OK) { - pcb->state = FIN_WAIT_1; - } - break; - case CLOSE_WAIT: - err = tcp_send_ctrl(pcb, TCP_FIN); - if (err == ERR_OK) { - pcb->state = LAST_ACK; - } - break; - default: - /* Has already been closed, do nothing. */ - err = ERR_OK; - pcb = NULL; - break; - } - - if (pcb != NULL && err == ERR_OK) { - err = tcp_output(pcb); - } - return err; -} - -/** - * Aborts a connection by sending a RST to the remote host and deletes - * the local protocol control block. This is done when a connection is - * killed because of shortage of memory. - * - */ -void -tcp_abort(struct tcp_pcb *pcb) -{ - u32_t seqno, ackno; - u16_t remote_port, local_port; - struct ip_addr remote_ip, local_ip; -#if LWIP_CALLBACK_API - void (* errf)(void *arg, err_t err); -#endif /* LWIP_CALLBACK_API */ - void *errf_arg; - - - /* Figure out on which TCP PCB list we are, and remove us. If we - are in an active state, call the receive function associated with - the PCB with a NULL argument, and send an RST to the remote end. */ - if (pcb->state == TIME_WAIT) { - tcp_pcb_remove(&tcp_tw_pcbs, pcb); - memp_free(MEMP_TCP_PCB, pcb); - } else { - seqno = pcb->snd_nxt; - ackno = pcb->rcv_nxt; - ip_addr_set(&local_ip, &(pcb->local_ip)); - ip_addr_set(&remote_ip, &(pcb->remote_ip)); - local_port = pcb->local_port; - remote_port = pcb->remote_port; -#if LWIP_CALLBACK_API - errf = pcb->errf; -#endif /* LWIP_CALLBACK_API */ - errf_arg = pcb->callback_arg; - tcp_pcb_remove(&tcp_active_pcbs, pcb); - if (pcb->unacked != NULL) { - tcp_segs_free(pcb->unacked); - } - if (pcb->unsent != NULL) { - tcp_segs_free(pcb->unsent); - } -#if TCP_QUEUE_OOSEQ - if (pcb->ooseq != NULL) { - tcp_segs_free(pcb->ooseq); - } -#endif /* TCP_QUEUE_OOSEQ */ - memp_free(MEMP_TCP_PCB, pcb); - TCP_EVENT_ERR(errf, errf_arg, ERR_ABRT); - LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abort: sending RST\n")); - tcp_rst(seqno, ackno, &local_ip, &remote_ip, local_port, remote_port); - } -} - -/** - * Binds the connection to a local portnumber and IP address. If the - * IP address is not given (i.e., ipaddr == NULL), the IP address of - * the outgoing network interface is used instead. - * - */ - -err_t -tcp_bind(struct tcp_pcb *pcb, struct ip_addr *ipaddr, u16_t port) -{ - struct tcp_pcb *cpcb; - - if (port == 0) { - port = tcp_new_port(); - } - /* Check if the address already is in use. */ - for(cpcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; - cpcb != NULL; cpcb = cpcb->next) { - if (cpcb->local_port == port) { - if (ip_addr_isany(&(cpcb->local_ip)) || - ip_addr_isany(ipaddr) || - ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { - return ERR_USE; - } - } - } - for(cpcb = tcp_active_pcbs; - cpcb != NULL; cpcb = cpcb->next) { - if (cpcb->local_port == port) { - if (ip_addr_isany(&(cpcb->local_ip)) || - ip_addr_isany(ipaddr) || - ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { - return ERR_USE; - } - } - } - - if (!ip_addr_isany(ipaddr)) { - pcb->local_ip = *ipaddr; - } - pcb->local_port = port; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_bind: bind to port %"U16_F"\n", port)); - return ERR_OK; -} -#if LWIP_CALLBACK_API -static err_t -tcp_accept_null(void *arg, struct tcp_pcb *pcb, err_t err) -{ - (void)arg; - (void)pcb; - (void)err; - - return ERR_ABRT; -} -#endif /* LWIP_CALLBACK_API */ - -/** - * Set the state of the connection to be LISTEN, which means that it - * is able to accept incoming connections. The protocol control block - * is reallocated in order to consume less memory. Setting the - * connection to LISTEN is an irreversible process. - * - */ -struct tcp_pcb * -tcp_listen(struct tcp_pcb *pcb) -{ - struct tcp_pcb_listen *lpcb; - - /* already listening? */ - if (pcb->state == LISTEN) { - return pcb; - } - lpcb = memp_malloc(MEMP_TCP_PCB_LISTEN); - if (lpcb == NULL) { - return NULL; - } - lpcb->callback_arg = pcb->callback_arg; - lpcb->local_port = pcb->local_port; - lpcb->state = LISTEN; - lpcb->so_options = pcb->so_options; - lpcb->so_options |= SOF_ACCEPTCONN; - lpcb->ttl = pcb->ttl; - lpcb->tos = pcb->tos; - ip_addr_set(&lpcb->local_ip, &pcb->local_ip); - memp_free(MEMP_TCP_PCB, pcb); -#if LWIP_CALLBACK_API - lpcb->accept = tcp_accept_null; -#endif /* LWIP_CALLBACK_API */ - TCP_REG(&tcp_listen_pcbs.listen_pcbs, lpcb); - return (struct tcp_pcb *)lpcb; -} - -/** - * This function should be called by the application when it has - * processed the data. The purpose is to advertise a larger window - * when the data has been processed. - * - */ -void -tcp_recved(struct tcp_pcb *pcb, u16_t len) -{ - if ((u32_t)pcb->rcv_wnd + len > TCP_WND) { - pcb->rcv_wnd = TCP_WND; - } else { - pcb->rcv_wnd += len; - } - if (!(pcb->flags & TF_ACK_DELAY) && - !(pcb->flags & TF_ACK_NOW)) { - /* - * We send an ACK here (if one is not already pending, hence - * the above tests) as tcp_recved() implies that the application - * has processed some data, and so we can open the receiver's - * window to allow more to be transmitted. This could result in - * two ACKs being sent for each received packet in some limited cases - * (where the application is only receiving data, and is slow to - * process it) but it is necessary to guarantee that the sender can - * continue to transmit. - */ - tcp_ack(pcb); - } - else if (pcb->flags & TF_ACK_DELAY && pcb->rcv_wnd >= TCP_WND/2) { - /* If we can send a window update such that there is a full - * segment available in the window, do so now. This is sort of - * nagle-like in its goals, and tries to hit a compromise between - * sending acks each time the window is updated, and only sending - * window updates when a timer expires. The "threshold" used - * above (currently TCP_WND/2) can be tuned to be more or less - * aggressive */ - tcp_ack_now(pcb); - } - - LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: recveived %"U16_F" bytes, wnd %"U16_F" (%"U16_F").\n", - len, pcb->rcv_wnd, TCP_WND - pcb->rcv_wnd)); -} - -/** - * A nastly hack featuring 'goto' statements that allocates a - * new TCP local port. - */ -static u16_t -tcp_new_port(void) -{ - struct tcp_pcb *pcb; -#ifndef TCP_LOCAL_PORT_RANGE_START -#define TCP_LOCAL_PORT_RANGE_START 4096 -#define TCP_LOCAL_PORT_RANGE_END 0x7fff -#endif - static u16_t port = TCP_LOCAL_PORT_RANGE_START; - - again: - if (++port > TCP_LOCAL_PORT_RANGE_END) { - port = TCP_LOCAL_PORT_RANGE_START; - } - - for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - if (pcb->local_port == port) { - goto again; - } - } - for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - if (pcb->local_port == port) { - goto again; - } - } - for(pcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; pcb != NULL; pcb = pcb->next) { - if (pcb->local_port == port) { - goto again; - } - } - return port; -} - -/** - * Connects to another host. The function given as the "connected" - * argument will be called when the connection has been established. - * - */ -err_t -tcp_connect(struct tcp_pcb *pcb, struct ip_addr *ipaddr, u16_t port, - err_t (* connected)(void *arg, struct tcp_pcb *tpcb, err_t err)) -{ - u32_t optdata; - err_t ret; - u32_t iss; - - LWIP_DEBUGF(TCP_DEBUG, ("tcp_connect to port %"U16_F"\n", port)); - if (ipaddr != NULL) { - pcb->remote_ip = *ipaddr; - } else { - return ERR_VAL; - } - pcb->remote_port = port; - if (pcb->local_port == 0) { - pcb->local_port = tcp_new_port(); - } - iss = tcp_next_iss(); - pcb->rcv_nxt = 0; - pcb->snd_nxt = iss; - pcb->lastack = iss - 1; - pcb->snd_lbb = iss - 1; - pcb->rcv_wnd = TCP_WND; - pcb->snd_wnd = TCP_WND; - pcb->mss = TCP_MSS; - pcb->cwnd = 1; - pcb->ssthresh = pcb->mss * 10; - pcb->state = SYN_SENT; -#if LWIP_CALLBACK_API - pcb->connected = connected; -#endif /* LWIP_CALLBACK_API */ - TCP_REG(&tcp_active_pcbs, pcb); - - /* Build an MSS option */ - optdata = htonl(((u32_t)2 << 24) | - ((u32_t)4 << 16) | - (((u32_t)pcb->mss / 256) << 8) | - (pcb->mss & 255)); - - ret = tcp_enqueue(pcb, NULL, 0, TCP_SYN, 0, (u8_t *)&optdata, 4); - if (ret == ERR_OK) { - tcp_output(pcb); - } - return ret; -} - -/** - * Called every 500 ms and implements the retransmission timer and the timer that - * removes PCBs that have been in TIME-WAIT for enough time. It also increments - * various timers such as the inactivity timer in each PCB. - */ -void -tcp_slowtmr(void) -{ - struct tcp_pcb *pcb, *pcb2, *prev; - u32_t eff_wnd; - u8_t pcb_remove; /* flag if a PCB should be removed */ - err_t err; - - err = ERR_OK; - - ++tcp_ticks; - - /* Steps through all of the active PCBs. */ - prev = NULL; - pcb = tcp_active_pcbs; - if (pcb == NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: no active pcbs\n")); - } - while (pcb != NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: processing active pcb\n")); - LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED); - LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN); - LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT); - - pcb_remove = 0; - - if (pcb->state == SYN_SENT && pcb->nrtx == TCP_SYNMAXRTX) { - ++pcb_remove; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n")); - } - else if (pcb->nrtx == TCP_MAXRTX) { - ++pcb_remove; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max DATA retries reached\n")); - } else { - ++pcb->rtime; - if (pcb->unacked != NULL && pcb->rtime >= pcb->rto) { - - /* Time for a retransmission. */ - LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_slowtmr: rtime %"U16_F" pcb->rto %"U16_F"\n", - pcb->rtime, pcb->rto)); - - /* Double retransmission time-out unless we are trying to - * connect to somebody (i.e., we are in SYN_SENT). */ - if (pcb->state != SYN_SENT) { - pcb->rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[pcb->nrtx]; - } - /* Reduce congestion window and ssthresh. */ - eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd); - pcb->ssthresh = eff_wnd >> 1; - if (pcb->ssthresh < pcb->mss) { - pcb->ssthresh = pcb->mss * 2; - } - pcb->cwnd = pcb->mss; - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: cwnd %"U16_F" ssthresh %"U16_F"\n", - pcb->cwnd, pcb->ssthresh)); - - /* The following needs to be called AFTER cwnd is set to one mss - STJ */ - tcp_rexmit_rto(pcb); - } - } - /* Check if this PCB has stayed too long in FIN-WAIT-2 */ - if (pcb->state == FIN_WAIT_2) { - if ((u32_t)(tcp_ticks - pcb->tmr) > - TCP_FIN_WAIT_TIMEOUT / TCP_SLOW_INTERVAL) { - ++pcb_remove; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in FIN-WAIT-2\n")); - } - } - - /* Check if KEEPALIVE should be sent */ - if((pcb->so_options & SOF_KEEPALIVE) && ((pcb->state == ESTABLISHED) || (pcb->state == CLOSE_WAIT))) { - if((u32_t)(tcp_ticks - pcb->tmr) > (pcb->keepalive + TCP_MAXIDLE) / TCP_SLOW_INTERVAL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: KEEPALIVE timeout. Aborting connection to %"U16_F".%"U16_F".%"U16_F".%"U16_F".\n", - ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), - ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip))); - - tcp_abort(pcb); - } - else if((u32_t)(tcp_ticks - pcb->tmr) > (pcb->keepalive + pcb->keep_cnt * TCP_KEEPINTVL) / TCP_SLOW_INTERVAL) { - tcp_keepalive(pcb); - pcb->keep_cnt++; - } - } - - /* If this PCB has queued out of sequence data, but has been - inactive for too long, will drop the data (it will eventually - be retransmitted). */ -#if TCP_QUEUE_OOSEQ - if (pcb->ooseq != NULL && - (u32_t)tcp_ticks - pcb->tmr >= - pcb->rto * TCP_OOSEQ_TIMEOUT) { - tcp_segs_free(pcb->ooseq); - pcb->ooseq = NULL; - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: dropping OOSEQ queued data\n")); - } -#endif /* TCP_QUEUE_OOSEQ */ - - /* Check if this PCB has stayed too long in SYN-RCVD */ - if (pcb->state == SYN_RCVD) { - if ((u32_t)(tcp_ticks - pcb->tmr) > - TCP_SYN_RCVD_TIMEOUT / TCP_SLOW_INTERVAL) { - ++pcb_remove; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in SYN-RCVD\n")); - } - } - - /* Check if this PCB has stayed too long in LAST-ACK */ - if (pcb->state == LAST_ACK) { - if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { - ++pcb_remove; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in LAST-ACK\n")); - } - } - - /* If the PCB should be removed, do it. */ - if (pcb_remove) { - tcp_pcb_purge(pcb); - /* Remove PCB from tcp_active_pcbs list. */ - if (prev != NULL) { - LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs); - prev->next = pcb->next; - } else { - /* This PCB was the first. */ - LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb); - tcp_active_pcbs = pcb->next; - } - - TCP_EVENT_ERR(pcb->errf, pcb->callback_arg, ERR_ABRT); - - pcb2 = pcb->next; - memp_free(MEMP_TCP_PCB, pcb); - pcb = pcb2; - } else { - - /* We check if we should poll the connection. */ - ++pcb->polltmr; - if (pcb->polltmr >= pcb->pollinterval) { - pcb->polltmr = 0; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n")); - TCP_EVENT_POLL(pcb, err); - if (err == ERR_OK) { - tcp_output(pcb); - } - } - - prev = pcb; - pcb = pcb->next; - } - } - - - /* Steps through all of the TIME-WAIT PCBs. */ - prev = NULL; - pcb = tcp_tw_pcbs; - while (pcb != NULL) { - LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); - pcb_remove = 0; - - /* Check if this PCB has stayed long enough in TIME-WAIT */ - if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { - ++pcb_remove; - } - - - - /* If the PCB should be removed, do it. */ - if (pcb_remove) { - tcp_pcb_purge(pcb); - /* Remove PCB from tcp_tw_pcbs list. */ - if (prev != NULL) { - LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs); - prev->next = pcb->next; - } else { - /* This PCB was the first. */ - LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb); - tcp_tw_pcbs = pcb->next; - } - pcb2 = pcb->next; - memp_free(MEMP_TCP_PCB, pcb); - pcb = pcb2; - } else { - prev = pcb; - pcb = pcb->next; - } - } -} - -/** - * Is called every TCP_FAST_INTERVAL (250 ms) and sends delayed ACKs. - */ -void -tcp_fasttmr(void) -{ - struct tcp_pcb *pcb; - - /* send delayed ACKs */ - for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - if (pcb->flags & TF_ACK_DELAY) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n")); - tcp_ack_now(pcb); - pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); - } - } -} - -/** - * Deallocates a list of TCP segments (tcp_seg structures). - * - */ -u8_t -tcp_segs_free(struct tcp_seg *seg) -{ - u8_t count = 0; - struct tcp_seg *next; - while (seg != NULL) { - next = seg->next; - count += tcp_seg_free(seg); - seg = next; - } - return count; -} - -/** - * Frees a TCP segment. - * - */ -u8_t -tcp_seg_free(struct tcp_seg *seg) -{ - u8_t count = 0; - - if (seg != NULL) { - if (seg->p != NULL) { - count = pbuf_free(seg->p); -#if TCP_DEBUG - seg->p = NULL; -#endif /* TCP_DEBUG */ - } - memp_free(MEMP_TCP_SEG, seg); - } - return count; -} - -/** - * Sets the priority of a connection. - * - */ -void -tcp_setprio(struct tcp_pcb *pcb, u8_t prio) -{ - pcb->prio = prio; -} -#if TCP_QUEUE_OOSEQ - -/** - * Returns a copy of the given TCP segment. - * - */ -struct tcp_seg * -tcp_seg_copy(struct tcp_seg *seg) -{ - struct tcp_seg *cseg; - - cseg = memp_malloc(MEMP_TCP_SEG); - if (cseg == NULL) { - return NULL; - } - memcpy((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg)); - pbuf_ref(cseg->p); - return cseg; -} -#endif - -#if LWIP_CALLBACK_API -static err_t -tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) -{ - arg = arg; - if (p != NULL) { - pbuf_free(p); - } else if (err == ERR_OK) { - return tcp_close(pcb); - } - return ERR_OK; -} -#endif /* LWIP_CALLBACK_API */ - -static void -tcp_kill_prio(u8_t prio) -{ - struct tcp_pcb *pcb, *inactive; - u32_t inactivity; - u8_t mprio; - - - mprio = TCP_PRIO_MAX; - - /* We kill the oldest active connection that has lower priority than - prio. */ - inactivity = 0; - inactive = NULL; - for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - if (pcb->prio <= prio && - pcb->prio <= mprio && - (u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { - inactivity = tcp_ticks - pcb->tmr; - inactive = pcb; - mprio = pcb->prio; - } - } - if (inactive != NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n", - (void *)inactive, inactivity)); - tcp_abort(inactive); - } -} - - -static void -tcp_kill_timewait(void) -{ - struct tcp_pcb *pcb, *inactive; - u32_t inactivity; - - inactivity = 0; - inactive = NULL; - for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { - inactivity = tcp_ticks - pcb->tmr; - inactive = pcb; - } - } - if (inactive != NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n", - (void *)inactive, inactivity)); - tcp_abort(inactive); - } -} - - - -struct tcp_pcb * -tcp_alloc(u8_t prio) -{ - struct tcp_pcb *pcb; - u32_t iss; - - pcb = memp_malloc(MEMP_TCP_PCB); - if (pcb == NULL) { - /* Try killing oldest connection in TIME-WAIT. */ - LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n")); - tcp_kill_timewait(); - pcb = memp_malloc(MEMP_TCP_PCB); - if (pcb == NULL) { - tcp_kill_prio(prio); - pcb = memp_malloc(MEMP_TCP_PCB); - } - } - if (pcb != NULL) { - memset(pcb, 0, sizeof(struct tcp_pcb)); - pcb->prio = TCP_PRIO_NORMAL; - pcb->snd_buf = TCP_SND_BUF; - pcb->snd_queuelen = 0; - pcb->rcv_wnd = TCP_WND; - pcb->tos = 0; - pcb->ttl = TCP_TTL; - pcb->mss = TCP_MSS; - pcb->rto = 3000 / TCP_SLOW_INTERVAL; - pcb->sa = 0; - pcb->sv = 3000 / TCP_SLOW_INTERVAL; - pcb->rtime = 0; - pcb->cwnd = 1; - iss = tcp_next_iss(); - pcb->snd_wl2 = iss; - pcb->snd_nxt = iss; - pcb->snd_max = iss; - pcb->lastack = iss; - pcb->snd_lbb = iss; - pcb->tmr = tcp_ticks; - - pcb->polltmr = 0; - -#if LWIP_CALLBACK_API - pcb->recv = tcp_recv_null; -#endif /* LWIP_CALLBACK_API */ - - /* Init KEEPALIVE timer */ - pcb->keepalive = TCP_KEEPDEFAULT; - pcb->keep_cnt = 0; - } - return pcb; -} - -/** - * Creates a new TCP protocol control block but doesn't place it on - * any of the TCP PCB lists. - * - * @internal: Maybe there should be a idle TCP PCB list where these - * PCBs are put on. We can then implement port reservation using - * tcp_bind(). Currently, we lack this (BSD socket type of) feature. - */ - -struct tcp_pcb * -tcp_new(void) -{ - return tcp_alloc(TCP_PRIO_NORMAL); -} - -/* - * tcp_arg(): - * - * Used to specify the argument that should be passed callback - * functions. - * - */ - -void -tcp_arg(struct tcp_pcb *pcb, void *arg) -{ - pcb->callback_arg = arg; -} -#if LWIP_CALLBACK_API - -/** - * Used to specify the function that should be called when a TCP - * connection receives data. - * - */ -void -tcp_recv(struct tcp_pcb *pcb, - err_t (* recv)(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, err_t err)) -{ - pcb->recv = recv; -} - -/** - * Used to specify the function that should be called when TCP data - * has been successfully delivered to the remote host. - * - */ - -void -tcp_sent(struct tcp_pcb *pcb, - err_t (* sent)(void *arg, struct tcp_pcb *tpcb, u16_t len)) -{ - pcb->sent = sent; -} - -/** - * Used to specify the function that should be called when a fatal error - * has occured on the connection. - * - */ -void -tcp_err(struct tcp_pcb *pcb, - void (* errf)(void *arg, err_t err)) -{ - pcb->errf = errf; -} - -/** - * Used for specifying the function that should be called when a - * LISTENing connection has been connected to another host. - * - */ -void -tcp_accept(struct tcp_pcb *pcb, - err_t (* accept)(void *arg, struct tcp_pcb *newpcb, err_t err)) -{ - ((struct tcp_pcb_listen *)pcb)->accept = accept; -} -#endif /* LWIP_CALLBACK_API */ - - -/** - * Used to specify the function that should be called periodically - * from TCP. The interval is specified in terms of the TCP coarse - * timer interval, which is called twice a second. - * - */ -void -tcp_poll(struct tcp_pcb *pcb, - err_t (* poll)(void *arg, struct tcp_pcb *tpcb), u8_t interval) -{ -#if LWIP_CALLBACK_API - pcb->poll = poll; -#endif /* LWIP_CALLBACK_API */ - pcb->pollinterval = interval; -} - -/** - * Purges a TCP PCB. Removes any buffered data and frees the buffer memory. - * - */ -void -tcp_pcb_purge(struct tcp_pcb *pcb) -{ - if (pcb->state != CLOSED && - pcb->state != TIME_WAIT && - pcb->state != LISTEN) { - - LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n")); - - if (pcb->unsent != NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: not all data sent\n")); - } - if (pcb->unacked != NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n")); - } -#if TCP_QUEUE_OOSEQ /* LW */ - if (pcb->ooseq != NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n")); - } - - tcp_segs_free(pcb->ooseq); - pcb->ooseq = NULL; -#endif /* TCP_QUEUE_OOSEQ */ - tcp_segs_free(pcb->unsent); - tcp_segs_free(pcb->unacked); - pcb->unacked = pcb->unsent = NULL; - } -} - -/** - * Purges the PCB and removes it from a PCB list. Any delayed ACKs are sent first. - * - */ -void -tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb) -{ - TCP_RMV(pcblist, pcb); - - tcp_pcb_purge(pcb); - - /* if there is an outstanding delayed ACKs, send it */ - if (pcb->state != TIME_WAIT && - pcb->state != LISTEN && - pcb->flags & TF_ACK_DELAY) { - pcb->flags |= TF_ACK_NOW; - tcp_output(pcb); - } - pcb->state = CLOSED; - - LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane()); -} - -/** - * Calculates a new initial sequence number for new connections. - * - */ -u32_t -tcp_next_iss(void) -{ - static u32_t iss = 6510; - - iss += tcp_ticks; /* XXX */ - return iss; -} - -#if TCP_DEBUG || TCP_INPUT_DEBUG || TCP_OUTPUT_DEBUG -void -tcp_debug_print(struct tcp_hdr *tcphdr) -{ - LWIP_DEBUGF(TCP_DEBUG, ("TCP header:\n")); - LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(TCP_DEBUG, ("| %5"U16_F" | %5"U16_F" | (src port, dest port)\n", - ntohs(tcphdr->src), ntohs(tcphdr->dest))); - LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(TCP_DEBUG, ("| %010"U32_F" | (seq no)\n", - ntohl(tcphdr->seqno))); - LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(TCP_DEBUG, ("| %010"U32_F" | (ack no)\n", - ntohl(tcphdr->ackno))); - LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(TCP_DEBUG, ("| %2"U16_F" | |%"U16_F"%"U16_F"%"U16_F"%"U16_F"%"U16_F"%"U16_F"| %5"U16_F" | (hdrlen, flags (", - TCPH_HDRLEN(tcphdr), - TCPH_FLAGS(tcphdr) >> 5 & 1, - TCPH_FLAGS(tcphdr) >> 4 & 1, - TCPH_FLAGS(tcphdr) >> 3 & 1, - TCPH_FLAGS(tcphdr) >> 2 & 1, - TCPH_FLAGS(tcphdr) >> 1 & 1, - TCPH_FLAGS(tcphdr) & 1, - ntohs(tcphdr->wnd))); - tcp_debug_print_flags(TCPH_FLAGS(tcphdr)); - LWIP_DEBUGF(TCP_DEBUG, ("), win)\n")); - LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(TCP_DEBUG, ("| 0x%04"X16_F" | %5"U16_F" | (chksum, urgp)\n", - ntohs(tcphdr->chksum), ntohs(tcphdr->urgp))); - LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); -} - -void -tcp_debug_print_state(enum tcp_state s) -{ - LWIP_DEBUGF(TCP_DEBUG, ("State: ")); - switch (s) { - case CLOSED: - LWIP_DEBUGF(TCP_DEBUG, ("CLOSED\n")); - break; - case LISTEN: - LWIP_DEBUGF(TCP_DEBUG, ("LISTEN\n")); - break; - case SYN_SENT: - LWIP_DEBUGF(TCP_DEBUG, ("SYN_SENT\n")); - break; - case SYN_RCVD: - LWIP_DEBUGF(TCP_DEBUG, ("SYN_RCVD\n")); - break; - case ESTABLISHED: - LWIP_DEBUGF(TCP_DEBUG, ("ESTABLISHED\n")); - break; - case FIN_WAIT_1: - LWIP_DEBUGF(TCP_DEBUG, ("FIN_WAIT_1\n")); - break; - case FIN_WAIT_2: - LWIP_DEBUGF(TCP_DEBUG, ("FIN_WAIT_2\n")); - break; - case CLOSE_WAIT: - LWIP_DEBUGF(TCP_DEBUG, ("CLOSE_WAIT\n")); - break; - case CLOSING: - LWIP_DEBUGF(TCP_DEBUG, ("CLOSING\n")); - break; - case LAST_ACK: - LWIP_DEBUGF(TCP_DEBUG, ("LAST_ACK\n")); - break; - case TIME_WAIT: - LWIP_DEBUGF(TCP_DEBUG, ("TIME_WAIT\n")); - break; - } -} - -void -tcp_debug_print_flags(u8_t flags) -{ - if (flags & TCP_FIN) { - LWIP_DEBUGF(TCP_DEBUG, ("FIN ")); - } - if (flags & TCP_SYN) { - LWIP_DEBUGF(TCP_DEBUG, ("SYN ")); - } - if (flags & TCP_RST) { - LWIP_DEBUGF(TCP_DEBUG, ("RST ")); - } - if (flags & TCP_PSH) { - LWIP_DEBUGF(TCP_DEBUG, ("PSH ")); - } - if (flags & TCP_ACK) { - LWIP_DEBUGF(TCP_DEBUG, ("ACK ")); - } - if (flags & TCP_URG) { - LWIP_DEBUGF(TCP_DEBUG, ("URG ")); - } - if (flags & TCP_ECE) { - LWIP_DEBUGF(TCP_DEBUG, ("ECE ")); - } - if (flags & TCP_CWR) { - LWIP_DEBUGF(TCP_DEBUG, ("CWR ")); - } -} - -void -tcp_debug_print_pcbs(void) -{ - struct tcp_pcb *pcb; - LWIP_DEBUGF(TCP_DEBUG, ("Active PCB states:\n")); - for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_DEBUGF(TCP_DEBUG, ("Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", - pcb->local_port, pcb->remote_port, - pcb->snd_nxt, pcb->rcv_nxt)); - tcp_debug_print_state(pcb->state); - } - LWIP_DEBUGF(TCP_DEBUG, ("Listen PCB states:\n")); - for(pcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_DEBUGF(TCP_DEBUG, ("Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", - pcb->local_port, pcb->remote_port, - pcb->snd_nxt, pcb->rcv_nxt)); - tcp_debug_print_state(pcb->state); - } - LWIP_DEBUGF(TCP_DEBUG, ("TIME-WAIT PCB states:\n")); - for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_DEBUGF(TCP_DEBUG, ("Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", - pcb->local_port, pcb->remote_port, - pcb->snd_nxt, pcb->rcv_nxt)); - tcp_debug_print_state(pcb->state); - } -} - -s16_t -tcp_pcbs_sane(void) -{ - struct tcp_pcb *pcb; - for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != CLOSED", pcb->state != CLOSED); - LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != LISTEN", pcb->state != LISTEN); - LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT); - } - for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_ASSERT("tcp_pcbs_sane: tw pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); - } - return 1; -} -#endif /* TCP_DEBUG */ -#endif /* LWIP_TCP */ - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/tcp_in.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/tcp_in.c deleted file mode 100644 index 212f9c4d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/tcp_in.c +++ /dev/null @@ -1,1199 +0,0 @@ -/** - * @file - * - * Transmission Control Protocol, incoming traffic - * - * The input processing functions of TCP. - * - * These functions are generally called in the order (ip_input() ->) tcp_input() -> - * tcp_process() -> tcp_receive() (-> application). - * - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/def.h" -#include "lwip/opt.h" - -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/mem.h" -#include "lwip/memp.h" - -#include "lwip/inet.h" -#include "lwip/tcp.h" - -#include "lwip/stats.h" - -#include "arch/perf.h" -#if LWIP_TCP -/* These variables are global to all functions involved in the input - processing of TCP segments. They are set by the tcp_input() - function. */ -static struct tcp_seg inseg; -static struct tcp_hdr *tcphdr; -static struct ip_hdr *iphdr; -static u32_t seqno, ackno; -static u8_t flags; -static u16_t tcplen; - -static u8_t recv_flags; -static struct pbuf *recv_data; - -struct tcp_pcb *tcp_input_pcb; - -/* Forward declarations. */ -static err_t tcp_process(struct tcp_pcb *pcb); -static void tcp_receive(struct tcp_pcb *pcb); -static void tcp_parseopt(struct tcp_pcb *pcb); - -static err_t tcp_listen_input(struct tcp_pcb_listen *pcb); -static err_t tcp_timewait_input(struct tcp_pcb *pcb); - - -/* tcp_input: - * - * The initial input processing of TCP. It verifies the TCP header, demultiplexes - * the segment between the PCBs and passes it on to tcp_process(), which implements - * the TCP finite state machine. This function is called by the IP layer (in - * ip_input()). - */ - -void -tcp_input(struct pbuf *p, struct netif *inp) -{ - struct tcp_pcb *pcb, *prev; - struct tcp_pcb_listen *lpcb; - u8_t hdrlen; - err_t err; - - PERF_START; - - TCP_STATS_INC(tcp.recv); - - iphdr = p->payload; - tcphdr = (struct tcp_hdr *)((u8_t *)p->payload + IPH_HL(iphdr) * 4); - -#if TCP_INPUT_DEBUG - tcp_debug_print(tcphdr); -#endif - - /* remove header from payload */ - if (pbuf_header(p, -((s16_t)(IPH_HL(iphdr) * 4))) || (p->tot_len < sizeof(struct tcp_hdr))) { - /* drop short packets */ - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: short packet (%"U16_F" bytes) discarded\n", p->tot_len)); - TCP_STATS_INC(tcp.lenerr); - TCP_STATS_INC(tcp.drop); - pbuf_free(p); - return; - } - - /* Don't even process incoming broadcasts/multicasts. */ - if (ip_addr_isbroadcast(&(iphdr->dest), inp) || - ip_addr_ismulticast(&(iphdr->dest))) { - pbuf_free(p); - return; - } - -#if CHECKSUM_CHECK_TCP - /* Verify TCP checksum. */ - if (inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), - (struct ip_addr *)&(iphdr->dest), - IP_PROTO_TCP, p->tot_len) != 0) { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packet discarded due to failing checksum 0x%04"X16_F"\n", - inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), (struct ip_addr *)&(iphdr->dest), - IP_PROTO_TCP, p->tot_len))); -#if TCP_DEBUG - tcp_debug_print(tcphdr); -#endif /* TCP_DEBUG */ - TCP_STATS_INC(tcp.chkerr); - TCP_STATS_INC(tcp.drop); - - pbuf_free(p); - return; - } -#endif - - /* Move the payload pointer in the pbuf so that it points to the - TCP data instead of the TCP header. */ - hdrlen = TCPH_HDRLEN(tcphdr); - pbuf_header(p, -(hdrlen * 4)); - - /* Convert fields in TCP header to host byte order. */ - tcphdr->src = ntohs(tcphdr->src); - tcphdr->dest = ntohs(tcphdr->dest); - seqno = tcphdr->seqno = ntohl(tcphdr->seqno); - ackno = tcphdr->ackno = ntohl(tcphdr->ackno); - tcphdr->wnd = ntohs(tcphdr->wnd); - - flags = TCPH_FLAGS(tcphdr) & TCP_FLAGS; - tcplen = p->tot_len + ((flags & TCP_FIN || flags & TCP_SYN)? 1: 0); - - /* Demultiplex an incoming segment. First, we check if it is destined - for an active connection. */ - prev = NULL; - - - for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED); - LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT); - LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN); - if (pcb->remote_port == tcphdr->src && - pcb->local_port == tcphdr->dest && - ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)) && - ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest))) { - - /* Move this PCB to the front of the list so that subsequent - lookups will be faster (we exploit locality in TCP segment - arrivals). */ - LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb); - if (prev != NULL) { - prev->next = pcb->next; - pcb->next = tcp_active_pcbs; - tcp_active_pcbs = pcb; - } - LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb); - break; - } - prev = pcb; - } - - if (pcb == NULL) { - /* If it did not go to an active connection, we check the connections - in the TIME-WAIT state. */ - - for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); - if (pcb->remote_port == tcphdr->src && - pcb->local_port == tcphdr->dest && - ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)) && - ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest))) { - /* We don't really care enough to move this PCB to the front - of the list since we are not very likely to receive that - many segments for connections in TIME-WAIT. */ - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packed for TIME_WAITing connection.\n")); - tcp_timewait_input(pcb); - pbuf_free(p); - return; - } - } - - /* Finally, if we still did not get a match, we check all PCBs that - are LISTENing for incoming connections. */ - prev = NULL; - for(lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { - if ((ip_addr_isany(&(lpcb->local_ip)) || - ip_addr_cmp(&(lpcb->local_ip), &(iphdr->dest))) && - lpcb->local_port == tcphdr->dest) { - /* Move this PCB to the front of the list so that subsequent - lookups will be faster (we exploit locality in TCP segment - arrivals). */ - if (prev != NULL) { - ((struct tcp_pcb_listen *)prev)->next = lpcb->next; - /* our successor is the remainder of the listening list */ - lpcb->next = tcp_listen_pcbs.listen_pcbs; - /* put this listening pcb at the head of the listening list */ - tcp_listen_pcbs.listen_pcbs = lpcb; - } - - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packed for LISTENing connection.\n")); - tcp_listen_input(lpcb); - pbuf_free(p); - return; - } - prev = (struct tcp_pcb *)lpcb; - } - } - -#if TCP_INPUT_DEBUG - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("+-+-+-+-+-+-+-+-+-+-+-+-+-+- tcp_input: flags ")); - tcp_debug_print_flags(TCPH_FLAGS(tcphdr)); - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("-+-+-+-+-+-+-+-+-+-+-+-+-+-+\n")); -#endif /* TCP_INPUT_DEBUG */ - - - if (pcb != NULL) { - /* The incoming segment belongs to a connection. */ -#if TCP_INPUT_DEBUG -#if TCP_DEBUG - tcp_debug_print_state(pcb->state); -#endif /* TCP_DEBUG */ -#endif /* TCP_INPUT_DEBUG */ - - /* Set up a tcp_seg structure. */ - inseg.next = NULL; - inseg.len = p->tot_len; - inseg.dataptr = p->payload; - inseg.p = p; - inseg.tcphdr = tcphdr; - - recv_data = NULL; - recv_flags = 0; - - tcp_input_pcb = pcb; - err = tcp_process(pcb); - tcp_input_pcb = NULL; - /* A return value of ERR_ABRT means that tcp_abort() was called - and that the pcb has been freed. If so, we don't do anything. */ - if (err != ERR_ABRT) { - if (recv_flags & TF_RESET) { - /* TF_RESET means that the connection was reset by the other - end. We then call the error callback to inform the - application that the connection is dead before we - deallocate the PCB. */ - TCP_EVENT_ERR(pcb->errf, pcb->callback_arg, ERR_RST); - tcp_pcb_remove(&tcp_active_pcbs, pcb); - memp_free(MEMP_TCP_PCB, pcb); - } else if (recv_flags & TF_CLOSED) { - /* The connection has been closed and we will deallocate the - PCB. */ - tcp_pcb_remove(&tcp_active_pcbs, pcb); - memp_free(MEMP_TCP_PCB, pcb); - } else { - err = ERR_OK; - /* If the application has registered a "sent" function to be - called when new send buffer space is available, we call it - now. */ - if (pcb->acked > 0) { - TCP_EVENT_SENT(pcb, pcb->acked, err); - } - - if (recv_data != NULL) { - /* Notify application that data has been received. */ - TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err); - } - - /* If a FIN segment was received, we call the callback - function with a NULL buffer to indicate EOF. */ - if (recv_flags & TF_GOT_FIN) { - TCP_EVENT_RECV(pcb, NULL, ERR_OK, err); - } - /* If there were no errors, we try to send something out. */ - if (err == ERR_OK) { - tcp_output(pcb); - } - } - } - - - /* We deallocate the incoming pbuf. If it was buffered by the - application, the application should have called pbuf_ref() to - increase the reference counter in the pbuf. If so, the buffer - isn't actually deallocated by the call to pbuf_free(), only the - reference count is decreased. */ - if (inseg.p != NULL) pbuf_free(inseg.p); -#if TCP_INPUT_DEBUG -#if TCP_DEBUG - tcp_debug_print_state(pcb->state); -#endif /* TCP_DEBUG */ -#endif /* TCP_INPUT_DEBUG */ - - } else { - - /* If no matching PCB was found, send a TCP RST (reset) to the - sender. */ - LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_input: no PCB match found, resetting.\n")); - if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) { - TCP_STATS_INC(tcp.proterr); - TCP_STATS_INC(tcp.drop); - tcp_rst(ackno, seqno + tcplen, - &(iphdr->dest), &(iphdr->src), - tcphdr->dest, tcphdr->src); - } - pbuf_free(p); - } - - LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane()); - PERF_STOP("tcp_input"); -} - -/* tcp_listen_input(): - * - * Called by tcp_input() when a segment arrives for a listening - * connection. - */ - -static err_t -tcp_listen_input(struct tcp_pcb_listen *pcb) -{ - struct tcp_pcb *npcb; - u32_t optdata; - - /* In the LISTEN state, we check for incoming SYN segments, - creates a new PCB, and responds with a SYN|ACK. */ - if (flags & TCP_ACK) { - /* For incoming segments with the ACK flag set, respond with a - RST. */ - LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n")); - tcp_rst(ackno + 1, seqno + tcplen, - &(iphdr->dest), &(iphdr->src), - tcphdr->dest, tcphdr->src); - } else if (flags & TCP_SYN) { - LWIP_DEBUGF(TCP_DEBUG, ("TCP connection request %"U16_F" -> %"U16_F".\n", tcphdr->src, tcphdr->dest)); - npcb = tcp_alloc(pcb->prio); - /* If a new PCB could not be created (probably due to lack of memory), - we don't do anything, but rely on the sender will retransmit the - SYN at a time when we have more memory available. */ - if (npcb == NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_listen_input: could not allocate PCB\n")); - TCP_STATS_INC(tcp.memerr); - return ERR_MEM; - } - /* Set up the new PCB. */ - ip_addr_set(&(npcb->local_ip), &(iphdr->dest)); - npcb->local_port = pcb->local_port; - ip_addr_set(&(npcb->remote_ip), &(iphdr->src)); - npcb->remote_port = tcphdr->src; - npcb->state = SYN_RCVD; - npcb->rcv_nxt = seqno + 1; - npcb->snd_wnd = tcphdr->wnd; - npcb->ssthresh = npcb->snd_wnd; - npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */ - npcb->callback_arg = pcb->callback_arg; -#if LWIP_CALLBACK_API - npcb->accept = pcb->accept; -#endif /* LWIP_CALLBACK_API */ - /* inherit socket options */ - npcb->so_options = pcb->so_options & (SOF_DEBUG|SOF_DONTROUTE|SOF_KEEPALIVE|SOF_OOBINLINE|SOF_LINGER); - /* Register the new PCB so that we can begin receiving segments - for it. */ - TCP_REG(&tcp_active_pcbs, npcb); - - /* Parse any options in the SYN. */ - tcp_parseopt(npcb); - - /* Build an MSS option. */ - optdata = htonl(((u32_t)2 << 24) | - ((u32_t)4 << 16) | - (((u32_t)npcb->mss / 256) << 8) | - (npcb->mss & 255)); - /* Send a SYN|ACK together with the MSS option. */ - tcp_enqueue(npcb, NULL, 0, TCP_SYN | TCP_ACK, 0, (u8_t *)&optdata, 4); - return tcp_output(npcb); - } - return ERR_OK; -} - -/* tcp_timewait_input(): - * - * Called by tcp_input() when a segment arrives for a connection in - * TIME_WAIT. - */ - -static err_t -tcp_timewait_input(struct tcp_pcb *pcb) -{ - if (TCP_SEQ_GT(seqno + tcplen, pcb->rcv_nxt)) { - pcb->rcv_nxt = seqno + tcplen; - } - if (tcplen > 0) { - tcp_ack_now(pcb); - } - return tcp_output(pcb); -} - -/* tcp_process - * - * Implements the TCP state machine. Called by tcp_input. In some - * states tcp_receive() is called to receive data. The tcp_seg - * argument will be freed by the caller (tcp_input()) unless the - * recv_data pointer in the pcb is set. - */ - -static err_t -tcp_process(struct tcp_pcb *pcb) -{ - struct tcp_seg *rseg; - u8_t acceptable = 0; - err_t err; - - - err = ERR_OK; - - /* Process incoming RST segments. */ - if (flags & TCP_RST) { - /* First, determine if the reset is acceptable. */ - if (pcb->state == SYN_SENT) { - if (ackno == pcb->snd_nxt) { - acceptable = 1; - } - } else { - /*if (TCP_SEQ_GEQ(seqno, pcb->rcv_nxt) && - TCP_SEQ_LEQ(seqno, pcb->rcv_nxt + pcb->rcv_wnd)) { - */ - if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt+pcb->rcv_wnd)) { - acceptable = 1; - } - } - - if (acceptable) { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n")); - LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED); - recv_flags = TF_RESET; - pcb->flags &= ~TF_ACK_DELAY; - return ERR_RST; - } else { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", - seqno, pcb->rcv_nxt)); - LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", - seqno, pcb->rcv_nxt)); - return ERR_OK; - } - } - - /* Update the PCB (in)activity timer. */ - pcb->tmr = tcp_ticks; - pcb->keep_cnt = 0; - - /* Do different things depending on the TCP state. */ - switch (pcb->state) { - case SYN_SENT: - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno, - pcb->snd_nxt, ntohl(pcb->unacked->tcphdr->seqno))); - /* received SYN ACK with expected sequence number? */ - if ((flags & TCP_ACK) && (flags & TCP_SYN) - && ackno == ntohl(pcb->unacked->tcphdr->seqno) + 1) { - pcb->snd_buf++; - pcb->rcv_nxt = seqno + 1; - pcb->lastack = ackno; - pcb->snd_wnd = tcphdr->wnd; - pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */ - pcb->state = ESTABLISHED; - pcb->cwnd = pcb->mss; - --pcb->snd_queuelen; - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"U16_F"\n", (u16_t)pcb->snd_queuelen)); - rseg = pcb->unacked; - pcb->unacked = rseg->next; - tcp_seg_free(rseg); - - /* Parse any options in the SYNACK. */ - tcp_parseopt(pcb); - - /* Call the user specified function to call when sucessfully - * connected. */ - TCP_EVENT_CONNECTED(pcb, ERR_OK, err); - tcp_ack(pcb); - } - /* received ACK? possibly a half-open connection */ - else if (flags & TCP_ACK) { - /* send a RST to bring the other side in a non-synchronized state. */ - tcp_rst(ackno, seqno + tcplen, &(iphdr->dest), &(iphdr->src), - tcphdr->dest, tcphdr->src); - } - break; - case SYN_RCVD: - if (flags & TCP_ACK && - !(flags & TCP_RST)) { - /* expected ACK number? */ - if (TCP_SEQ_BETWEEN(ackno, pcb->lastack+1, pcb->snd_nxt)) { - pcb->state = ESTABLISHED; - LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); -#if LWIP_CALLBACK_API - LWIP_ASSERT("pcb->accept != NULL", pcb->accept != NULL); -#endif - /* Call the accept function. */ - TCP_EVENT_ACCEPT(pcb, ERR_OK, err); - if (err != ERR_OK) { - /* If the accept function returns with an error, we abort - * the connection. */ - tcp_abort(pcb); - return ERR_ABRT; - } - /* If there was any data contained within this ACK, - * we'd better pass it on to the application as well. */ - tcp_receive(pcb); - pcb->cwnd = pcb->mss; - } - /* incorrect ACK number */ - else { - /* send RST */ - tcp_rst(ackno, seqno + tcplen, &(iphdr->dest), &(iphdr->src), - tcphdr->dest, tcphdr->src); - } - } - break; - case CLOSE_WAIT: - /* FALLTHROUGH */ - case ESTABLISHED: - tcp_receive(pcb); - if (flags & TCP_FIN) { - tcp_ack_now(pcb); - pcb->state = CLOSE_WAIT; - } - break; - case FIN_WAIT_1: - tcp_receive(pcb); - if (flags & TCP_FIN) { - if (flags & TCP_ACK && ackno == pcb->snd_nxt) { - LWIP_DEBUGF(TCP_DEBUG, - ("TCP connection closed %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); - tcp_ack_now(pcb); - tcp_pcb_purge(pcb); - TCP_RMV(&tcp_active_pcbs, pcb); - pcb->state = TIME_WAIT; - TCP_REG(&tcp_tw_pcbs, pcb); - } else { - tcp_ack_now(pcb); - pcb->state = CLOSING; - } - } else if (flags & TCP_ACK && ackno == pcb->snd_nxt) { - pcb->state = FIN_WAIT_2; - } - break; - case FIN_WAIT_2: - tcp_receive(pcb); - if (flags & TCP_FIN) { - LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); - tcp_ack_now(pcb); - tcp_pcb_purge(pcb); - TCP_RMV(&tcp_active_pcbs, pcb); - pcb->state = TIME_WAIT; - TCP_REG(&tcp_tw_pcbs, pcb); - } - break; - case CLOSING: - tcp_receive(pcb); - if (flags & TCP_ACK && ackno == pcb->snd_nxt) { - LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); - tcp_ack_now(pcb); - tcp_pcb_purge(pcb); - TCP_RMV(&tcp_active_pcbs, pcb); - pcb->state = TIME_WAIT; - TCP_REG(&tcp_tw_pcbs, pcb); - } - break; - case LAST_ACK: - tcp_receive(pcb); - if (flags & TCP_ACK && ackno == pcb->snd_nxt) { - LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); - pcb->state = CLOSED; - recv_flags = TF_CLOSED; - } - break; - default: - break; - } - return ERR_OK; -} - -/* tcp_receive: - * - * Called by tcp_process. Checks if the given segment is an ACK for outstanding - * data, and if so frees the memory of the buffered data. Next, is places the - * segment on any of the receive queues (pcb->recved or pcb->ooseq). If the segment - * is buffered, the pbuf is referenced by pbuf_ref so that it will not be freed until - * i it has been removed from the buffer. - * - * If the incoming segment constitutes an ACK for a segment that was used for RTT - * estimation, the RTT is estimated here as well. - */ - -static void -tcp_receive(struct tcp_pcb *pcb) -{ - struct tcp_seg *next; -#if TCP_QUEUE_OOSEQ - struct tcp_seg *prev, *cseg; -#endif - struct pbuf *p; - s32_t off; - s16_t m; - u32_t right_wnd_edge; - u16_t new_tot_len; - - - if (flags & TCP_ACK) { - right_wnd_edge = pcb->snd_wnd + pcb->snd_wl1; - - /* Update window. */ - if (TCP_SEQ_LT(pcb->snd_wl1, seqno) || - (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) || - (pcb->snd_wl2 == ackno && tcphdr->wnd > pcb->snd_wnd)) { - pcb->snd_wnd = tcphdr->wnd; - pcb->snd_wl1 = seqno; - pcb->snd_wl2 = ackno; - LWIP_DEBUGF(TCP_WND_DEBUG, ("tcp_receive: window update %"U32_F"\n", pcb->snd_wnd)); -#if TCP_WND_DEBUG - } else { - if (pcb->snd_wnd != tcphdr->wnd) { - LWIP_DEBUGF(TCP_WND_DEBUG, ("tcp_receive: no window update lastack %"U32_F" snd_max %"U32_F" ackno %"U32_F" wl1 %"U32_F" seqno %"U32_F" wl2 %"U32_F"\n", - pcb->lastack, pcb->snd_max, ackno, pcb->snd_wl1, seqno, pcb->snd_wl2)); - } -#endif /* TCP_WND_DEBUG */ - } - - - if (pcb->lastack == ackno) { - pcb->acked = 0; - - if (pcb->snd_wl1 + pcb->snd_wnd == right_wnd_edge){ - ++pcb->dupacks; - if (pcb->dupacks >= 3 && pcb->unacked != NULL) { - if (!(pcb->flags & TF_INFR)) { - /* This is fast retransmit. Retransmit the first unacked segment. */ - LWIP_DEBUGF(TCP_FR_DEBUG, ("tcp_receive: dupacks %"U16_F" (%"U32_F"), fast retransmit %"U32_F"\n", - (u16_t)pcb->dupacks, pcb->lastack, - ntohl(pcb->unacked->tcphdr->seqno))); - tcp_rexmit(pcb); - /* Set ssthresh to max (FlightSize / 2, 2*SMSS) */ - /*pcb->ssthresh = LWIP_MAX((pcb->snd_max - - pcb->lastack) / 2, - 2 * pcb->mss);*/ - /* Set ssthresh to half of the minimum of the currenct cwnd and the advertised window */ - if(pcb->cwnd > pcb->snd_wnd) - pcb->ssthresh = pcb->snd_wnd / 2; - else - pcb->ssthresh = pcb->cwnd / 2; - - pcb->cwnd = pcb->ssthresh + 3 * pcb->mss; - pcb->flags |= TF_INFR; - } else { - /* Inflate the congestion window, but not if it means that - the value overflows. */ - if ((u16_t)(pcb->cwnd + pcb->mss) > pcb->cwnd) { - pcb->cwnd += pcb->mss; - } - } - } - } else { - LWIP_DEBUGF(TCP_FR_DEBUG, ("tcp_receive: dupack averted %"U32_F" %"U32_F"\n", - pcb->snd_wl1 + pcb->snd_wnd, right_wnd_edge)); - } - } else - /*if (TCP_SEQ_LT(pcb->lastack, ackno) && - TCP_SEQ_LEQ(ackno, pcb->snd_max)) { */ - if(TCP_SEQ_BETWEEN(ackno, pcb->lastack+1, pcb->snd_max)){ - /* We come here when the ACK acknowledges new data. */ - - /* Reset the "IN Fast Retransmit" flag, since we are no longer - in fast retransmit. Also reset the congestion window to the - slow start threshold. */ - if (pcb->flags & TF_INFR) { - pcb->flags &= ~TF_INFR; - pcb->cwnd = pcb->ssthresh; - } - - /* Reset the number of retransmissions. */ - pcb->nrtx = 0; - - /* Reset the retransmission time-out. */ - pcb->rto = (pcb->sa >> 3) + pcb->sv; - - /* Update the send buffer space. */ - pcb->acked = ackno - pcb->lastack; - - pcb->snd_buf += pcb->acked; - - /* Reset the fast retransmit variables. */ - pcb->dupacks = 0; - pcb->lastack = ackno; - - /* Update the congestion control variables (cwnd and - ssthresh). */ - if (pcb->state >= ESTABLISHED) { - if (pcb->cwnd < pcb->ssthresh) { - if ((u16_t)(pcb->cwnd + pcb->mss) > pcb->cwnd) { - pcb->cwnd += pcb->mss; - } - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"U16_F"\n", pcb->cwnd)); - } else { - u16_t new_cwnd = (pcb->cwnd + pcb->mss * pcb->mss / pcb->cwnd); - if (new_cwnd > pcb->cwnd) { - pcb->cwnd = new_cwnd; - } - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: congestion avoidance cwnd %"U16_F"\n", pcb->cwnd)); - } - } - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: ACK for %"U32_F", unacked->seqno %"U32_F":%"U32_F"\n", - ackno, - pcb->unacked != NULL? - ntohl(pcb->unacked->tcphdr->seqno): 0, - pcb->unacked != NULL? - ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked): 0)); - - /* Remove segment from the unacknowledged list if the incoming - ACK acknowlegdes them. */ - while (pcb->unacked != NULL && - TCP_SEQ_LEQ(ntohl(pcb->unacked->tcphdr->seqno) + - TCP_TCPLEN(pcb->unacked), ackno)) { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->unacked\n", - ntohl(pcb->unacked->tcphdr->seqno), - ntohl(pcb->unacked->tcphdr->seqno) + - TCP_TCPLEN(pcb->unacked))); - - next = pcb->unacked; - pcb->unacked = pcb->unacked->next; - - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"U16_F" ... ", (u16_t)pcb->snd_queuelen)); - pcb->snd_queuelen -= pbuf_clen(next->p); - tcp_seg_free(next); - - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"U16_F" (after freeing unacked)\n", (u16_t)pcb->snd_queuelen)); - if (pcb->snd_queuelen != 0) { - LWIP_ASSERT("tcp_receive: valid queue length", pcb->unacked != NULL || - pcb->unsent != NULL); - } - } - pcb->polltmr = 0; - } - - /* We go through the ->unsent list to see if any of the segments - on the list are acknowledged by the ACK. This may seem - strange since an "unsent" segment shouldn't be acked. The - rationale is that lwIP puts all outstanding segments on the - ->unsent list after a retransmission, so these segments may - in fact have been sent once. */ - while (pcb->unsent != NULL && - /*TCP_SEQ_LEQ(ntohl(pcb->unsent->tcphdr->seqno) + TCP_TCPLEN(pcb->unsent), ackno) && - TCP_SEQ_LEQ(ackno, pcb->snd_max)*/ - TCP_SEQ_BETWEEN(ackno, ntohl(pcb->unsent->tcphdr->seqno) + TCP_TCPLEN(pcb->unsent), pcb->snd_max) - ) { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->unsent\n", - ntohl(pcb->unsent->tcphdr->seqno), ntohl(pcb->unsent->tcphdr->seqno) + - TCP_TCPLEN(pcb->unsent))); - - next = pcb->unsent; - pcb->unsent = pcb->unsent->next; - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"U16_F" ... ", (u16_t)pcb->snd_queuelen)); - pcb->snd_queuelen -= pbuf_clen(next->p); - tcp_seg_free(next); - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"U16_F" (after freeing unsent)\n", (u16_t)pcb->snd_queuelen)); - if (pcb->snd_queuelen != 0) { - LWIP_ASSERT("tcp_receive: valid queue length", - pcb->unacked != NULL || pcb->unsent != NULL); - } - - if (pcb->unsent != NULL) { - pcb->snd_nxt = htonl(pcb->unsent->tcphdr->seqno); - } - } - /* End of ACK for new data processing. */ - - LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: pcb->rttest %"U32_F" rtseq %"U32_F" ackno %"U32_F"\n", - pcb->rttest, pcb->rtseq, ackno)); - - /* RTT estimation calculations. This is done by checking if the - incoming segment acknowledges the segment we use to take a - round-trip time measurement. */ - if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) { - m = tcp_ticks - pcb->rttest; - - LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n", - m, m * TCP_SLOW_INTERVAL)); - - /* This is taken directly from VJs original code in his paper */ - m = m - (pcb->sa >> 3); - pcb->sa += m; - if (m < 0) { - m = -m; - } - m = m - (pcb->sv >> 2); - pcb->sv += m; - pcb->rto = (pcb->sa >> 3) + pcb->sv; - - LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" miliseconds)\n", - pcb->rto, pcb->rto * TCP_SLOW_INTERVAL)); - - pcb->rttest = 0; - } - } - - /* If the incoming segment contains data, we must process it - further. */ - if (tcplen > 0) { - /* This code basically does three things: - - +) If the incoming segment contains data that is the next - in-sequence data, this data is passed to the application. This - might involve trimming the first edge of the data. The rcv_nxt - variable and the advertised window are adjusted. - - +) If the incoming segment has data that is above the next - sequence number expected (->rcv_nxt), the segment is placed on - the ->ooseq queue. This is done by finding the appropriate - place in the ->ooseq queue (which is ordered by sequence - number) and trim the segment in both ends if needed. An - immediate ACK is sent to indicate that we received an - out-of-sequence segment. - - +) Finally, we check if the first segment on the ->ooseq queue - now is in sequence (i.e., if rcv_nxt >= ooseq->seqno). If - rcv_nxt > ooseq->seqno, we must trim the first edge of the - segment on ->ooseq before we adjust rcv_nxt. The data in the - segments that are now on sequence are chained onto the - incoming segment so that we only need to call the application - once. - */ - - /* First, we check if we must trim the first edge. We have to do - this if the sequence number of the incoming segment is less - than rcv_nxt, and the sequence number plus the length of the - segment is larger than rcv_nxt. */ - /* if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)){ - if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/ - if(TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno+1, seqno+tcplen-1)){ - /* Trimming the first edge is done by pushing the payload - pointer in the pbuf downwards. This is somewhat tricky since - we do not want to discard the full contents of the pbuf up to - the new starting point of the data since we have to keep the - TCP header which is present in the first pbuf in the chain. - - What is done is really quite a nasty hack: the first pbuf in - the pbuf chain is pointed to by inseg.p. Since we need to be - able to deallocate the whole pbuf, we cannot change this - inseg.p pointer to point to any of the later pbufs in the - chain. Instead, we point the ->payload pointer in the first - pbuf to data in one of the later pbufs. We also set the - inseg.data pointer to point to the right place. This way, the - ->p pointer will still point to the first pbuf, but the - ->p->payload pointer will point to data in another pbuf. - - After we are done with adjusting the pbuf pointers we must - adjust the ->data pointer in the seg and the segment - length.*/ - - off = pcb->rcv_nxt - seqno; - p = inseg.p; - if (inseg.p->len < off) { - new_tot_len = inseg.p->tot_len - off; - while (p->len < off) { - off -= p->len; - /* KJM following line changed (with addition of new_tot_len var) - to fix bug #9076 - inseg.p->tot_len -= p->len; */ - p->tot_len = new_tot_len; - p->len = 0; - p = p->next; - } - pbuf_header(p, -off); - } else { - pbuf_header(inseg.p, -off); - } - /* KJM following line changed to use p->payload rather than inseg->p->payload - to fix bug #9076 */ - inseg.dataptr = p->payload; - inseg.len -= pcb->rcv_nxt - seqno; - inseg.tcphdr->seqno = seqno = pcb->rcv_nxt; - } - else{ - if(TCP_SEQ_LT(seqno, pcb->rcv_nxt)){ - /* the whole segment is < rcv_nxt */ - /* must be a duplicate of a packet that has already been correctly handled */ - - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno)); - tcp_ack_now(pcb); - } - } - - /* The sequence number must be within the window (above rcv_nxt - and below rcv_nxt + rcv_wnd) in order to be further - processed. */ - /*if (TCP_SEQ_GEQ(seqno, pcb->rcv_nxt) && - TCP_SEQ_LT(seqno, pcb->rcv_nxt + pcb->rcv_wnd)) {*/ - if(TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd - 1)){ - if (pcb->rcv_nxt == seqno) { - /* The incoming segment is the next in sequence. We check if - we have to trim the end of the segment and update rcv_nxt - and pass the data to the application. */ -#if TCP_QUEUE_OOSEQ - if (pcb->ooseq != NULL && - TCP_SEQ_LEQ(pcb->ooseq->tcphdr->seqno, seqno + inseg.len)) { - /* We have to trim the second edge of the incoming - segment. */ - inseg.len = pcb->ooseq->tcphdr->seqno - seqno; - pbuf_realloc(inseg.p, inseg.len); - } -#endif /* TCP_QUEUE_OOSEQ */ - - tcplen = TCP_TCPLEN(&inseg); - - /* First received FIN will be ACKed +1, on any successive (duplicate) - * FINs we are already in CLOSE_WAIT and have already done +1. - */ - if (pcb->state != CLOSE_WAIT) { - pcb->rcv_nxt += tcplen; - } - - /* Update the receiver's (our) window. */ - if (pcb->rcv_wnd < tcplen) { - pcb->rcv_wnd = 0; - } else { - pcb->rcv_wnd -= tcplen; - } - - /* If there is data in the segment, we make preparations to - pass this up to the application. The ->recv_data variable - is used for holding the pbuf that goes to the - application. The code for reassembling out-of-sequence data - chains its data on this pbuf as well. - - If the segment was a FIN, we set the TF_GOT_FIN flag that will - be used to indicate to the application that the remote side has - closed its end of the connection. */ - if (inseg.p->tot_len > 0) { - recv_data = inseg.p; - /* Since this pbuf now is the responsibility of the - application, we delete our reference to it so that we won't - (mistakingly) deallocate it. */ - inseg.p = NULL; - } - if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n")); - recv_flags = TF_GOT_FIN; - } - -#if TCP_QUEUE_OOSEQ - /* We now check if we have segments on the ->ooseq queue that - is now in sequence. */ - while (pcb->ooseq != NULL && - pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) { - - cseg = pcb->ooseq; - seqno = pcb->ooseq->tcphdr->seqno; - - pcb->rcv_nxt += TCP_TCPLEN(cseg); - if (pcb->rcv_wnd < TCP_TCPLEN(cseg)) { - pcb->rcv_wnd = 0; - } else { - pcb->rcv_wnd -= TCP_TCPLEN(cseg); - } - if (cseg->p->tot_len > 0) { - /* Chain this pbuf onto the pbuf that we will pass to - the application. */ - if (recv_data) { - pbuf_cat(recv_data, cseg->p); - } else { - recv_data = cseg->p; - } - cseg->p = NULL; - } - if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n")); - recv_flags = TF_GOT_FIN; - } - - - pcb->ooseq = cseg->next; - tcp_seg_free(cseg); - } -#endif /* TCP_QUEUE_OOSEQ */ - - - /* Acknowledge the segment(s). */ - tcp_ack(pcb); - - } else { - /* We get here if the incoming segment is out-of-sequence. */ - tcp_ack_now(pcb); -#if TCP_QUEUE_OOSEQ - /* We queue the segment on the ->ooseq queue. */ - if (pcb->ooseq == NULL) { - pcb->ooseq = tcp_seg_copy(&inseg); - } else { - /* If the queue is not empty, we walk through the queue and - try to find a place where the sequence number of the - incoming segment is between the sequence numbers of the - previous and the next segment on the ->ooseq queue. That is - the place where we put the incoming segment. If needed, we - trim the second edges of the previous and the incoming - segment so that it will fit into the sequence. - - If the incoming segment has the same sequence number as a - segment on the ->ooseq queue, we discard the segment that - contains less data. */ - - prev = NULL; - for(next = pcb->ooseq; next != NULL; next = next->next) { - if (seqno == next->tcphdr->seqno) { - /* The sequence number of the incoming segment is the - same as the sequence number of the segment on - ->ooseq. We check the lengths to see which one to - discard. */ - if (inseg.len > next->len) { - /* The incoming segment is larger than the old - segment. We replace the old segment with the new - one. */ - cseg = tcp_seg_copy(&inseg); - if (cseg != NULL) { - cseg->next = next->next; - if (prev != NULL) { - prev->next = cseg; - } else { - pcb->ooseq = cseg; - } - } - break; - } else { - /* Either the lenghts are the same or the incoming - segment was smaller than the old one; in either - case, we ditch the incoming segment. */ - break; - } - } else { - if (prev == NULL) { - if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) { - /* The sequence number of the incoming segment is lower - than the sequence number of the first segment on the - queue. We put the incoming segment first on the - queue. */ - - if (TCP_SEQ_GT(seqno + inseg.len, next->tcphdr->seqno)) { - /* We need to trim the incoming segment. */ - inseg.len = next->tcphdr->seqno - seqno; - pbuf_realloc(inseg.p, inseg.len); - } - cseg = tcp_seg_copy(&inseg); - if (cseg != NULL) { - cseg->next = next; - pcb->ooseq = cseg; - } - break; - } - } else - /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) && - TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/ - if(TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno+1, next->tcphdr->seqno-1)){ - /* The sequence number of the incoming segment is in - between the sequence numbers of the previous and - the next segment on ->ooseq. We trim and insert the - incoming segment and trim the previous segment, if - needed. */ - if (TCP_SEQ_GT(seqno + inseg.len, next->tcphdr->seqno)) { - /* We need to trim the incoming segment. */ - inseg.len = next->tcphdr->seqno - seqno; - pbuf_realloc(inseg.p, inseg.len); - } - - cseg = tcp_seg_copy(&inseg); - if (cseg != NULL) { - cseg->next = next; - prev->next = cseg; - if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) { - /* We need to trim the prev segment. */ - prev->len = seqno - prev->tcphdr->seqno; - pbuf_realloc(prev->p, prev->len); - } - } - break; - } - /* If the "next" segment is the last segment on the - ooseq queue, we add the incoming segment to the end - of the list. */ - if (next->next == NULL && - TCP_SEQ_GT(seqno, next->tcphdr->seqno)) { - next->next = tcp_seg_copy(&inseg); - if (next->next != NULL) { - if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) { - /* We need to trim the last segment. */ - next->len = seqno - next->tcphdr->seqno; - pbuf_realloc(next->p, next->len); - } - } - break; - } - } - prev = next; - } - } -#endif /* TCP_QUEUE_OOSEQ */ - - } - } else { - /*if (TCP_SEQ_GT(pcb->rcv_nxt, seqno) || - TCP_SEQ_GEQ(seqno, pcb->rcv_nxt + pcb->rcv_wnd)) {*/ - if(!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd-1)){ - tcp_ack_now(pcb); - } - } - } else { - /* Segments with length 0 is taken care of here. Segments that - fall out of the window are ACKed. */ - /*if (TCP_SEQ_GT(pcb->rcv_nxt, seqno) || - TCP_SEQ_GEQ(seqno, pcb->rcv_nxt + pcb->rcv_wnd)) {*/ - if(!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd-1)){ - tcp_ack_now(pcb); - } - } -} - -/* - * tcp_parseopt: - * - * Parses the options contained in the incoming segment. (Code taken - * from uIP with only small changes.) - * - */ - -static void -tcp_parseopt(struct tcp_pcb *pcb) -{ - u8_t c; - u8_t *opts, opt; - u16_t mss; - - opts = (u8_t *)tcphdr + TCP_HLEN; - - /* Parse the TCP MSS option, if present. */ - if(TCPH_HDRLEN(tcphdr) > 0x5) { - for(c = 0; c < (TCPH_HDRLEN(tcphdr) - 5) << 2 ;) { - opt = opts[c]; - if (opt == 0x00) { - /* End of options. */ - break; - } else if (opt == 0x01) { - ++c; - /* NOP option. */ - } else if (opt == 0x02 && - opts[c + 1] == 0x04) { - /* An MSS option with the right option length. */ - mss = (opts[c + 2] << 8) | opts[c + 3]; - pcb->mss = mss > TCP_MSS? TCP_MSS: mss; - - /* And we are done processing options. */ - break; - } else { - if (opts[c + 1] == 0) { - /* If the length field is zero, the options are malformed - and we don't process them further. */ - break; - } - /* All other options have a length field, so that we easily - can skip past them. */ - c += opts[c + 1]; - } - } - } -} -#endif /* LWIP_TCP */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/tcp_out.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/tcp_out.c deleted file mode 100644 index 62982bd1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/tcp_out.c +++ /dev/null @@ -1,721 +0,0 @@ -/** - * @file - * - * Transmission Control Protocol, outgoing traffic - * - * The output functions of TCP. - * - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include - -#include "lwip/def.h" -#include "lwip/opt.h" -#include "lwip/mem.h" -#include "lwip/memp.h" -#include "lwip/sys.h" -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/inet.h" -#include "lwip/tcp.h" -#include "lwip/stats.h" - -#if LWIP_TCP - -/* Forward declarations.*/ -static void tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb); - -err_t -tcp_send_ctrl(struct tcp_pcb *pcb, u8_t flags) -{ - /* no data, no length, flags, copy=1, no optdata, no optdatalen */ - return tcp_enqueue(pcb, NULL, 0, flags, 1, NULL, 0); -} - -/** - * Write data for sending (but does not send it immediately). - * - * It waits in the expectation of more data being sent soon (as - * it can send them more efficiently by combining them together). - * To prompt the system to send data now, call tcp_output() after - * calling tcp_write(). - * - * @arg pcb Protocol control block of the TCP connection to enqueue data for. - * - * @see tcp_write() - */ - -err_t -tcp_write(struct tcp_pcb *pcb, const void *arg, u16_t len, u8_t copy) -{ - LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, arg=%p, len=%"U16_F", copy=%"U16_F")\n", (void *)pcb, - arg, len, (u16_t)copy)); - /* connection is in valid state for data transmission? */ - if (pcb->state == ESTABLISHED || - pcb->state == CLOSE_WAIT || - pcb->state == SYN_SENT || - pcb->state == SYN_RCVD) { - if (len > 0) { - return tcp_enqueue(pcb, (void *)arg, len, 0, copy, NULL, 0); - } - return ERR_OK; - } else { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | DBG_STATE | 3, ("tcp_write() called in invalid state\n")); - return ERR_CONN; - } -} - -/** - * Enqueue either data or TCP options (but not both) for tranmission - * - * - * - * @arg pcb Protocol control block for the TCP connection to enqueue data for. - * @arg arg Pointer to the data to be enqueued for sending. - * @arg len Data length in bytes - * @arg flags - * @arg copy 1 if data must be copied, 0 if data is non-volatile and can be - * referenced. - * @arg optdata - * @arg optlen - */ -err_t -tcp_enqueue(struct tcp_pcb *pcb, void *arg, u16_t len, - u8_t flags, u8_t copy, - u8_t *optdata, u8_t optlen) -{ - struct pbuf *p; - struct tcp_seg *seg, *useg, *queue; - u32_t left, seqno; - u16_t seglen; - void *ptr; - u8_t queuelen; - - LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_enqueue(pcb=%p, arg=%p, len=%"U16_F", flags=%"X16_F", copy=%"U16_F")\n", - (void *)pcb, arg, len, (u16_t)flags, (u16_t)copy)); - LWIP_ASSERT("tcp_enqueue: len == 0 || optlen == 0 (programmer violates API)", - len == 0 || optlen == 0); - LWIP_ASSERT("tcp_enqueue: arg == NULL || optdata == NULL (programmer violates API)", - arg == NULL || optdata == NULL); - /* fail on too much data */ - if (len > pcb->snd_buf) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 3, ("tcp_enqueue: too much data (len=%"U16_F" > snd_buf=%"U16_F")\n", len, pcb->snd_buf)); - return ERR_MEM; - } - left = len; - ptr = arg; - - /* seqno will be the sequence number of the first segment enqueued - * by the call to this function. */ - seqno = pcb->snd_lbb; - - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen)); - - /* If total number of pbufs on the unsent/unacked queues exceeds the - * configured maximum, return an error */ - queuelen = pcb->snd_queuelen; - if (queuelen >= TCP_SND_QUEUELEN) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 3, ("tcp_enqueue: too long queue %"U16_F" (max %"U16_F")\n", queuelen, TCP_SND_QUEUELEN)); - TCP_STATS_INC(tcp.memerr); - return ERR_MEM; - } - if (queuelen != 0) { - LWIP_ASSERT("tcp_enqueue: pbufs on queue => at least one queue non-empty", - pcb->unacked != NULL || pcb->unsent != NULL); - } else { - LWIP_ASSERT("tcp_enqueue: no pbufs on queue => both queues empty", - pcb->unacked == NULL && pcb->unsent == NULL); - } - - /* First, break up the data into segments and tuck them together in - * the local "queue" variable. */ - useg = queue = seg = NULL; - seglen = 0; - while (queue == NULL || left > 0) { - - /* The segment length should be the MSS if the data to be enqueued - * is larger than the MSS. */ - seglen = left > pcb->mss? pcb->mss: left; - - /* Allocate memory for tcp_seg, and fill in fields. */ - seg = memp_malloc(MEMP_TCP_SEG); - if (seg == NULL) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_enqueue: could not allocate memory for tcp_seg\n")); - goto memerr; - } - seg->next = NULL; - seg->p = NULL; - - /* first segment of to-be-queued data? */ - if (queue == NULL) { - queue = seg; - } - /* subsequent segments of to-be-queued data */ - else { - /* Attach the segment to the end of the queued segments */ - LWIP_ASSERT("useg != NULL", useg != NULL); - useg->next = seg; - } - /* remember last segment of to-be-queued data for next iteration */ - useg = seg; - - /* If copy is set, memory should be allocated - * and data copied into pbuf, otherwise data comes from - * ROM or other static memory, and need not be copied. If - * optdata is != NULL, we have options instead of data. */ - - /* options? */ - if (optdata != NULL) { - if ((seg->p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) { - goto memerr; - } - ++queuelen; - seg->dataptr = seg->p->payload; - } - /* copy from volatile memory? */ - else if (copy) { - if ((seg->p = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_RAM)) == NULL) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_enqueue : could not allocate memory for pbuf copy size %"U16_F"\n", seglen)); - goto memerr; - } - ++queuelen; - if (arg != NULL) { - memcpy(seg->p->payload, ptr, seglen); - } - seg->dataptr = seg->p->payload; - } - /* do not copy data */ - else { - /* First, allocate a pbuf for holding the data. - * since the referenced data is available at least until it is sent out on the - * link (as it has to be ACKed by the remote party) we can safely use PBUF_ROM - * instead of PBUF_REF here. - */ - if ((p = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_ROM)) == NULL) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_enqueue: could not allocate memory for zero-copy pbuf\n")); - goto memerr; - } - ++queuelen; - /* reference the non-volatile payload data */ - p->payload = ptr; - seg->dataptr = ptr; - - /* Second, allocate a pbuf for the headers. */ - if ((seg->p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_RAM)) == NULL) { - /* If allocation fails, we have to deallocate the data pbuf as - * well. */ - pbuf_free(p); - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_enqueue: could not allocate memory for header pbuf\n")); - goto memerr; - } - ++queuelen; - - /* Concatenate the headers and data pbufs together. */ - pbuf_cat(seg->p/*header*/, p/*data*/); - p = NULL; - } - - /* Now that there are more segments queued, we check again if the - length of the queue exceeds the configured maximum. */ - if (queuelen > TCP_SND_QUEUELEN) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_enqueue: queue too long %"U16_F" (%"U16_F")\n", queuelen, TCP_SND_QUEUELEN)); - goto memerr; - } - - seg->len = seglen; - - /* build TCP header */ - if (pbuf_header(seg->p, TCP_HLEN)) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_enqueue: no room for TCP header in pbuf.\n")); - TCP_STATS_INC(tcp.err); - goto memerr; - } - seg->tcphdr = seg->p->payload; - seg->tcphdr->src = htons(pcb->local_port); - seg->tcphdr->dest = htons(pcb->remote_port); - seg->tcphdr->seqno = htonl(seqno); - seg->tcphdr->urgp = 0; - TCPH_FLAGS_SET(seg->tcphdr, flags); - /* don't fill in tcphdr->ackno and tcphdr->wnd until later */ - - /* Copy the options into the header, if they are present. */ - if (optdata == NULL) { - TCPH_HDRLEN_SET(seg->tcphdr, 5); - } - else { - TCPH_HDRLEN_SET(seg->tcphdr, (5 + optlen / 4)); - /* Copy options into data portion of segment. - Options can thus only be sent in non data carrying - segments such as SYN|ACK. */ - memcpy(seg->dataptr, optdata, optlen); - } - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | DBG_TRACE, ("tcp_enqueue: queueing %"U32_F":%"U32_F" (0x%"X16_F")\n", - ntohl(seg->tcphdr->seqno), - ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg), - (u16_t)flags)); - - left -= seglen; - seqno += seglen; - ptr = (void *)((u8_t *)ptr + seglen); - } - - /* Now that the data to be enqueued has been broken up into TCP - segments in the queue variable, we add them to the end of the - pcb->unsent queue. */ - if (pcb->unsent == NULL) { - useg = NULL; - } - else { - for (useg = pcb->unsent; useg->next != NULL; useg = useg->next); - } - /* { useg is last segment on the unsent queue, NULL if list is empty } */ - - /* If there is room in the last pbuf on the unsent queue, - chain the first pbuf on the queue together with that. */ - if (useg != NULL && - TCP_TCPLEN(useg) != 0 && - !(TCPH_FLAGS(useg->tcphdr) & (TCP_SYN | TCP_FIN)) && - !(flags & (TCP_SYN | TCP_FIN)) && - /* fit within max seg size */ - useg->len + queue->len <= pcb->mss) { - /* Remove TCP header from first segment of our to-be-queued list */ - pbuf_header(queue->p, -TCP_HLEN); - pbuf_cat(useg->p, queue->p); - useg->len += queue->len; - useg->next = queue->next; - - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | DBG_TRACE | DBG_STATE, ("tcp_enqueue: chaining segments, new len %"U16_F"\n", useg->len)); - if (seg == queue) { - seg = NULL; - } - memp_free(MEMP_TCP_SEG, queue); - } - else { - /* empty list */ - if (useg == NULL) { - /* initialize list with this segment */ - pcb->unsent = queue; - } - /* enqueue segment */ - else { - useg->next = queue; - } - } - if ((flags & TCP_SYN) || (flags & TCP_FIN)) { - ++len; - } - pcb->snd_lbb += len; - - pcb->snd_buf -= len; - - /* update number of segments on the queues */ - pcb->snd_queuelen = queuelen; - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: %"S16_F" (after enqueued)\n", pcb->snd_queuelen)); - if (pcb->snd_queuelen != 0) { - LWIP_ASSERT("tcp_enqueue: valid queue length", - pcb->unacked != NULL || pcb->unsent != NULL); - } - - /* Set the PSH flag in the last segment that we enqueued, but only - if the segment has data (indicated by seglen > 0). */ - if (seg != NULL && seglen > 0 && seg->tcphdr != NULL) { - TCPH_SET_FLAG(seg->tcphdr, TCP_PSH); - } - - return ERR_OK; -memerr: - TCP_STATS_INC(tcp.memerr); - - if (queue != NULL) { - tcp_segs_free(queue); - } - if (pcb->snd_queuelen != 0) { - LWIP_ASSERT("tcp_enqueue: valid queue length", pcb->unacked != NULL || - pcb->unsent != NULL); - } - LWIP_DEBUGF(TCP_QLEN_DEBUG | DBG_STATE, ("tcp_enqueue: %"S16_F" (with mem err)\n", pcb->snd_queuelen)); - return ERR_MEM; -} - -/* find out what we can send and send it */ -err_t -tcp_output(struct tcp_pcb *pcb) -{ - struct pbuf *p; - struct tcp_hdr *tcphdr; - struct tcp_seg *seg, *useg; - u32_t wnd; -#if TCP_CWND_DEBUG - s16_t i = 0; -#endif /* TCP_CWND_DEBUG */ - - /* First, check if we are invoked by the TCP input processing - code. If so, we do not output anything. Instead, we rely on the - input processing code to call us when input processing is done - with. */ - if (tcp_input_pcb == pcb) { - return ERR_OK; - } - - wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd); - - seg = pcb->unsent; - - /* useg should point to last segment on unacked queue */ - useg = pcb->unacked; - if (useg != NULL) { - for (; useg->next != NULL; useg = useg->next); - } - - /* If the TF_ACK_NOW flag is set and no data will be sent (either - * because the ->unsent queue is empty or because the window does - * not allow it), construct an empty ACK segment and send it. - * - * If data is to be sent, we will just piggyback the ACK (see below). - */ - if (pcb->flags & TF_ACK_NOW && - (seg == NULL || - ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd)) { - p = pbuf_alloc(PBUF_IP, TCP_HLEN, PBUF_RAM); - if (p == NULL) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n")); - return ERR_BUF; - } - LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt)); - /* remove ACK flags from the PCB, as we send an empty ACK now */ - pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); - - tcphdr = p->payload; - tcphdr->src = htons(pcb->local_port); - tcphdr->dest = htons(pcb->remote_port); - tcphdr->seqno = htonl(pcb->snd_nxt); - tcphdr->ackno = htonl(pcb->rcv_nxt); - TCPH_FLAGS_SET(tcphdr, TCP_ACK); - tcphdr->wnd = htons(pcb->rcv_wnd); - tcphdr->urgp = 0; - TCPH_HDRLEN_SET(tcphdr, 5); - - tcphdr->chksum = 0; -#if CHECKSUM_GEN_TCP - tcphdr->chksum = inet_chksum_pseudo(p, &(pcb->local_ip), &(pcb->remote_ip), - IP_PROTO_TCP, p->tot_len); -#endif - ip_output(p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, - IP_PROTO_TCP); - pbuf_free(p); - - return ERR_OK; - } - -#if TCP_OUTPUT_DEBUG - if (seg == NULL) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: nothing to send (%p)\n", (void*)pcb->unsent)); - } -#endif /* TCP_OUTPUT_DEBUG */ -#if TCP_CWND_DEBUG - if (seg == NULL) { - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_output: snd_wnd %"U32_F", cwnd %"U16_F", wnd %"U32_F", seg == NULL, ack %"U32_F"\n", - pcb->snd_wnd, pcb->cwnd, wnd, - pcb->lastack)); - } else { - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_output: snd_wnd %"U32_F", cwnd %"U16_F", wnd %"U32_F", effwnd %"U32_F", seq %"U32_F", ack %"U32_F"\n", - pcb->snd_wnd, pcb->cwnd, wnd, - ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len, - ntohl(seg->tcphdr->seqno), pcb->lastack)); - } -#endif /* TCP_CWND_DEBUG */ - /* data available and window allows it to be sent? */ - while (seg != NULL && - ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) { -#if TCP_CWND_DEBUG - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_output: snd_wnd %"U32_F", cwnd %"U16_F", wnd %"U32_F", effwnd %"U32_F", seq %"U32_F", ack %"U32_F", i %"S16_F"\n", - pcb->snd_wnd, pcb->cwnd, wnd, - ntohl(seg->tcphdr->seqno) + seg->len - - pcb->lastack, - ntohl(seg->tcphdr->seqno), pcb->lastack, i)); - ++i; -#endif /* TCP_CWND_DEBUG */ - - pcb->unsent = seg->next; - - if (pcb->state != SYN_SENT) { - TCPH_SET_FLAG(seg->tcphdr, TCP_ACK); - pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); - } - - tcp_output_segment(seg, pcb); - pcb->snd_nxt = ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg); - if (TCP_SEQ_LT(pcb->snd_max, pcb->snd_nxt)) { - pcb->snd_max = pcb->snd_nxt; - } - /* put segment on unacknowledged list if length > 0 */ - if (TCP_TCPLEN(seg) > 0) { - seg->next = NULL; - /* unacked list is empty? */ - if (pcb->unacked == NULL) { - pcb->unacked = seg; - useg = seg; - /* unacked list is not empty? */ - } else { - /* In the case of fast retransmit, the packet should not go to the tail - * of the unacked queue, but rather at the head. We need to check for - * this case. -STJ Jul 27, 2004 */ - if (TCP_SEQ_LT(ntohl(seg->tcphdr->seqno), ntohl(useg->tcphdr->seqno))){ - /* add segment to head of unacked list */ - seg->next = pcb->unacked; - pcb->unacked = seg; - } else { - /* add segment to tail of unacked list */ - useg->next = seg; - useg = useg->next; - } - } - /* do not queue empty segments on the unacked list */ - } else { - tcp_seg_free(seg); - } - seg = pcb->unsent; - } - return ERR_OK; -} - -/** - * Actually send a TCP segment over IP - */ -static void -tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb) -{ - u16_t len; - struct netif *netif; - - /* The TCP header has already been constructed, but the ackno and - wnd fields remain. */ - seg->tcphdr->ackno = htonl(pcb->rcv_nxt); - - /* silly window avoidance */ - if (pcb->rcv_wnd < pcb->mss) { - seg->tcphdr->wnd = 0; - } else { - /* advertise our receive window size in this TCP segment */ - seg->tcphdr->wnd = htons(pcb->rcv_wnd); - } - - /* If we don't have a local IP address, we get one by - calling ip_route(). */ - if (ip_addr_isany(&(pcb->local_ip))) { - netif = ip_route(&(pcb->remote_ip)); - if (netif == NULL) { - return; - } - ip_addr_set(&(pcb->local_ip), &(netif->ip_addr)); - } - - pcb->rtime = 0; - - if (pcb->rttest == 0) { - pcb->rttest = tcp_ticks; - pcb->rtseq = ntohl(seg->tcphdr->seqno); - - LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_output_segment: rtseq %"U32_F"\n", pcb->rtseq)); - } - LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n", - htonl(seg->tcphdr->seqno), htonl(seg->tcphdr->seqno) + - seg->len)); - - len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload); - - seg->p->len -= len; - seg->p->tot_len -= len; - - seg->p->payload = seg->tcphdr; - - seg->tcphdr->chksum = 0; -#if CHECKSUM_GEN_TCP - seg->tcphdr->chksum = inet_chksum_pseudo(seg->p, - &(pcb->local_ip), - &(pcb->remote_ip), - IP_PROTO_TCP, seg->p->tot_len); -#endif - TCP_STATS_INC(tcp.xmit); - - ip_output(seg->p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, - IP_PROTO_TCP); -} - -void -tcp_rst(u32_t seqno, u32_t ackno, - struct ip_addr *local_ip, struct ip_addr *remote_ip, - u16_t local_port, u16_t remote_port) -{ - struct pbuf *p; - struct tcp_hdr *tcphdr; - p = pbuf_alloc(PBUF_IP, TCP_HLEN, PBUF_RAM); - if (p == NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n")); - return; - } - - tcphdr = p->payload; - tcphdr->src = htons(local_port); - tcphdr->dest = htons(remote_port); - tcphdr->seqno = htonl(seqno); - tcphdr->ackno = htonl(ackno); - TCPH_FLAGS_SET(tcphdr, TCP_RST | TCP_ACK); - tcphdr->wnd = htons(TCP_WND); - tcphdr->urgp = 0; - TCPH_HDRLEN_SET(tcphdr, 5); - - tcphdr->chksum = 0; -#if CHECKSUM_GEN_TCP - tcphdr->chksum = inet_chksum_pseudo(p, local_ip, remote_ip, - IP_PROTO_TCP, p->tot_len); -#endif - TCP_STATS_INC(tcp.xmit); - /* Send output with hardcoded TTL since we have no access to the pcb */ - ip_output(p, local_ip, remote_ip, TCP_TTL, 0, IP_PROTO_TCP); - pbuf_free(p); - LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno)); -} - -/* requeue all unacked segments for retransmission */ -void -tcp_rexmit_rto(struct tcp_pcb *pcb) -{ - struct tcp_seg *seg; - - if (pcb->unacked == NULL) { - return; - } - - /* Move all unacked segments to the head of the unsent queue */ - for (seg = pcb->unacked; seg->next != NULL; seg = seg->next); - /* concatenate unsent queue after unacked queue */ - seg->next = pcb->unsent; - /* unsent queue is the concatenated queue (of unacked, unsent) */ - pcb->unsent = pcb->unacked; - /* unacked queue is now empty */ - pcb->unacked = NULL; - - pcb->snd_nxt = ntohl(pcb->unsent->tcphdr->seqno); - /* increment number of retransmissions */ - ++pcb->nrtx; - - /* Don't take any RTT measurements after retransmitting. */ - pcb->rttest = 0; - - /* Do the actual retransmission */ - tcp_output(pcb); -} - -void -tcp_rexmit(struct tcp_pcb *pcb) -{ - struct tcp_seg *seg; - - if (pcb->unacked == NULL) { - return; - } - - /* Move the first unacked segment to the unsent queue */ - seg = pcb->unacked->next; - pcb->unacked->next = pcb->unsent; - pcb->unsent = pcb->unacked; - pcb->unacked = seg; - - pcb->snd_nxt = ntohl(pcb->unsent->tcphdr->seqno); - - ++pcb->nrtx; - - /* Don't take any rtt measurements after retransmitting. */ - pcb->rttest = 0; - - /* Do the actual retransmission. */ - tcp_output(pcb); - -} - - -void -tcp_keepalive(struct tcp_pcb *pcb) -{ - struct pbuf *p; - struct tcp_hdr *tcphdr; - - LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: sending KEEPALIVE probe to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", - ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), - ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip))); - - LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F" pcb->tmr %"U32_F" pcb->keep_cnt %"U16_F"\n", tcp_ticks, pcb->tmr, pcb->keep_cnt)); - - p = pbuf_alloc(PBUF_IP, TCP_HLEN, PBUF_RAM); - - if(p == NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: could not allocate memory for pbuf\n")); - return; - } - - tcphdr = p->payload; - tcphdr->src = htons(pcb->local_port); - tcphdr->dest = htons(pcb->remote_port); - tcphdr->seqno = htonl(pcb->snd_nxt - 1); - tcphdr->ackno = htonl(pcb->rcv_nxt); - tcphdr->wnd = htons(pcb->rcv_wnd); - tcphdr->urgp = 0; - TCPH_HDRLEN_SET(tcphdr, 5); - - tcphdr->chksum = 0; -#if CHECKSUM_GEN_TCP - tcphdr->chksum = inet_chksum_pseudo(p, &pcb->local_ip, &pcb->remote_ip, IP_PROTO_TCP, p->tot_len); -#endif - TCP_STATS_INC(tcp.xmit); - - /* Send output to IP */ - ip_output(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP); - - pbuf_free(p); - - LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F".\n", pcb->snd_nxt - 1, pcb->rcv_nxt)); -} - -#endif /* LWIP_TCP */ - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/udp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/udp.c deleted file mode 100644 index d1e0eaca..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/core/udp.c +++ /dev/null @@ -1,655 +0,0 @@ -/** - * @file - * User Datagram Protocol module - * - */ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - - -/* udp.c - * - * The code for the User Datagram Protocol UDP. - * - */ - -#include - -#include "lwip/opt.h" - -#include "lwip/def.h" -#include "lwip/memp.h" -#include "lwip/inet.h" -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/udp.h" -#include "lwip/icmp.h" - -#include "lwip/stats.h" - -#include "arch/perf.h" -#include "lwip/snmp.h" - -/* The list of UDP PCBs */ -#if LWIP_UDP -/* was static, but we may want to access this from a socket layer */ -struct udp_pcb *udp_pcbs = NULL; - -static struct udp_pcb *pcb_cache = NULL; - -void -udp_init(void) -{ - udp_pcbs = pcb_cache = NULL; -} - -/** - * Process an incoming UDP datagram. - * - * Given an incoming UDP datagram (as a chain of pbufs) this function - * finds a corresponding UDP PCB and - * - * @param pbuf pbuf to be demultiplexed to a UDP PCB. - * @param netif network interface on which the datagram was received. - * - */ -void -udp_input(struct pbuf *p, struct netif *inp) -{ - struct udp_hdr *udphdr; - struct udp_pcb *pcb; - struct udp_pcb *uncon_pcb; - struct ip_hdr *iphdr; - u16_t src, dest; - u8_t local_match; - - PERF_START; - - UDP_STATS_INC(udp.recv); - - iphdr = p->payload; - - if (pbuf_header(p, -((s16_t)(UDP_HLEN + IPH_HL(iphdr) * 4)))) { - /* drop short packets */ - LWIP_DEBUGF(UDP_DEBUG, ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len)); - UDP_STATS_INC(udp.lenerr); - UDP_STATS_INC(udp.drop); - snmp_inc_udpinerrors(); - pbuf_free(p); - goto end; - } - - udphdr = (struct udp_hdr *)((u8_t *)p->payload - UDP_HLEN); - - LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len)); - - src = ntohs(udphdr->src); - dest = ntohs(udphdr->dest); - - udp_debug_print(udphdr); - - /* print the UDP source and destination */ - LWIP_DEBUGF(UDP_DEBUG, ("udp (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F") <-- (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F")\n", - ip4_addr1(&iphdr->dest), ip4_addr2(&iphdr->dest), - ip4_addr3(&iphdr->dest), ip4_addr4(&iphdr->dest), ntohs(udphdr->dest), - ip4_addr1(&iphdr->src), ip4_addr2(&iphdr->src), - ip4_addr3(&iphdr->src), ip4_addr4(&iphdr->src), ntohs(udphdr->src))); - - local_match = 0; - uncon_pcb = NULL; - /* Iterate through the UDP pcb list for a matching pcb */ - for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) { - /* print the PCB local and remote address */ - LWIP_DEBUGF(UDP_DEBUG, ("pcb (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F") --- (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F")\n", - ip4_addr1(&pcb->local_ip), ip4_addr2(&pcb->local_ip), - ip4_addr3(&pcb->local_ip), ip4_addr4(&pcb->local_ip), pcb->local_port, - ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), - ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip), pcb->remote_port)); - - /* compare PCB local addr+port to UDP destination addr+port */ - if ((pcb->local_port == dest) && - (ip_addr_isany(&pcb->local_ip) || - ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest)))) { - local_match = 1; - if ((uncon_pcb == NULL) && - ((pcb->flags & UDP_FLAGS_CONNECTED) == 0)) { - /* the first unconnected matching PCB */ - uncon_pcb = pcb; - } - } - /* compare PCB remote addr+port to UDP source addr+port */ - if ((local_match != 0) && - (pcb->remote_port == src) && - (ip_addr_isany(&pcb->remote_ip) || - ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)))) { - /* the first fully matching PCB */ - break; - } - } - /* no fully matching pcb found? then look for an unconnected pcb */ - if (pcb == NULL) { - pcb = uncon_pcb; - } - - /* Check checksum if this is a match or if it was directed at us. */ - if (pcb != NULL || ip_addr_cmp(&inp->ip_addr, &iphdr->dest)) - { - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE, ("udp_input: calculating checksum\n")); - pbuf_header(p, UDP_HLEN); -#ifdef IPv6 - if (iphdr->nexthdr == IP_PROTO_UDPLITE) { -#else - if (IPH_PROTO(iphdr) == IP_PROTO_UDPLITE) { -#endif /* IPv4 */ - /* Do the UDP Lite checksum */ -#if CHECKSUM_CHECK_UDP - if (inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), - (struct ip_addr *)&(iphdr->dest), - IP_PROTO_UDPLITE, ntohs(udphdr->len)) != 0) { - LWIP_DEBUGF(UDP_DEBUG | 2, ("udp_input: UDP Lite datagram discarded due to failing checksum\n")); - UDP_STATS_INC(udp.chkerr); - UDP_STATS_INC(udp.drop); - snmp_inc_udpinerrors(); - pbuf_free(p); - goto end; - } -#endif - } else { -#if CHECKSUM_CHECK_UDP - if (udphdr->chksum != 0) { - if (inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), - (struct ip_addr *)&(iphdr->dest), - IP_PROTO_UDP, p->tot_len) != 0) { - LWIP_DEBUGF(UDP_DEBUG | 2, ("udp_input: UDP datagram discarded due to failing checksum\n")); - - UDP_STATS_INC(udp.chkerr); - UDP_STATS_INC(udp.drop); - snmp_inc_udpinerrors(); - pbuf_free(p); - goto end; - } - } -#endif - } - pbuf_header(p, -UDP_HLEN); - if (pcb != NULL) { - snmp_inc_udpindatagrams(); - /* callback */ - if (pcb->recv != NULL) - { - pcb->recv(pcb->recv_arg, pcb, p, &(iphdr->src), src); - } - } else { - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE, ("udp_input: not for us.\n")); - - /* No match was found, send ICMP destination port unreachable unless - destination address was broadcast/multicast. */ - - if (!ip_addr_isbroadcast(&iphdr->dest, inp) && - !ip_addr_ismulticast(&iphdr->dest)) { - - /* adjust pbuf pointer */ - p->payload = iphdr; - icmp_dest_unreach(p, ICMP_DUR_PORT); - } - UDP_STATS_INC(udp.proterr); - UDP_STATS_INC(udp.drop); - snmp_inc_udpnoports(); - pbuf_free(p); - } - } else { - pbuf_free(p); - } - end: - - PERF_STOP("udp_input"); -} - -/** - * Send data to a specified address using UDP. - * - * @param pcb UDP PCB used to send the data. - * @param pbuf chain of pbuf's to be sent. - * @param dst_ip Destination IP address. - * @param dst_port Destination UDP port. - * - * If the PCB already has a remote address association, it will - * be restored after the data is sent. - * - * @return lwIP error code. - * - ERR_OK. Successful. No error occured. - * - ERR_MEM. Out of memory. - * - ERR_RTE. Could not find route to destination address. - * - * @see udp_disconnect() udp_send() - */ -err_t -udp_sendto(struct udp_pcb *pcb, struct pbuf *p, - struct ip_addr *dst_ip, u16_t dst_port) -{ - err_t err; - /* temporary space for current PCB remote address */ - struct ip_addr pcb_remote_ip; - u16_t pcb_remote_port; - /* remember current remote peer address of PCB */ - pcb_remote_ip.addr = pcb->remote_ip.addr; - pcb_remote_port = pcb->remote_port; - /* copy packet destination address to PCB remote peer address */ - pcb->remote_ip.addr = dst_ip->addr; - pcb->remote_port = dst_port; - /* send to the packet destination address */ - err = udp_send(pcb, p); - /* restore PCB remote peer address */ - pcb->remote_ip.addr = pcb_remote_ip.addr; - pcb->remote_port = pcb_remote_port; - return err; -} - -/** - * Send data using UDP. - * - * @param pcb UDP PCB used to send the data. - * @param pbuf chain of pbuf's to be sent. - * - * @return lwIP error code. - * - ERR_OK. Successful. No error occured. - * - ERR_MEM. Out of memory. - * - ERR_RTE. Could not find route to destination address. - * - * @see udp_disconnect() udp_sendto() - */ -err_t -udp_send(struct udp_pcb *pcb, struct pbuf *p) -{ - struct udp_hdr *udphdr; - struct netif *netif; - struct ip_addr *src_ip; - err_t err; - struct pbuf *q; /* q will be sent down the stack */ - - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | 3, ("udp_send\n")); - - /* if the PCB is not yet bound to a port, bind it here */ - if (pcb->local_port == 0) { - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | 2, ("udp_send: not yet bound to a port, binding now\n")); - err = udp_bind(pcb, &pcb->local_ip, pcb->local_port); - if (err != ERR_OK) { - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | 2, ("udp_send: forced port bind failed\n")); - return err; - } - } - /* find the outgoing network interface for this packet */ - netif = ip_route(&(pcb->remote_ip)); - /* no outgoing network interface could be found? */ - if (netif == NULL) { - LWIP_DEBUGF(UDP_DEBUG | 1, ("udp_send: No route to 0x%"X32_F"\n", pcb->remote_ip.addr)); - UDP_STATS_INC(udp.rterr); - return ERR_RTE; - } - - /* not enough space to add an UDP header to first pbuf in given p chain? */ - if (pbuf_header(p, UDP_HLEN)) { - /* allocate header in a seperate new pbuf */ - q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM); - /* new header pbuf could not be allocated? */ - if (q == NULL) { - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | 2, ("udp_send: could not allocate header\n")); - return ERR_MEM; - } - /* chain header q in front of given pbuf p */ - pbuf_chain(q, p); - /* { first pbuf q points to header pbuf } */ - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p)); - /* adding a header within p succeeded */ - } else { - /* first pbuf q equals given pbuf */ - q = p; - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p)); - } - /* { q now represents the packet to be sent } */ - udphdr = q->payload; - udphdr->src = htons(pcb->local_port); - udphdr->dest = htons(pcb->remote_port); - /* in UDP, 0 checksum means 'no checksum' */ - udphdr->chksum = 0x0000; - - /* PCB local address is IP_ANY_ADDR? */ - if (ip_addr_isany(&pcb->local_ip)) { - /* use outgoing network interface IP address as source address */ - src_ip = &(netif->ip_addr); - } else { - /* use UDP PCB local IP address as source address */ - src_ip = &(pcb->local_ip); - } - - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: sending datagram of length %"U16_F"\n", q->tot_len)); - - /* UDP Lite protocol? */ - if (pcb->flags & UDP_FLAGS_UDPLITE) { - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP LITE packet length %"U16_F"\n", q->tot_len)); - /* set UDP message length in UDP header */ - udphdr->len = htons(pcb->chksum_len); - /* calculate checksum */ -#if CHECKSUM_GEN_UDP - udphdr->chksum = inet_chksum_pseudo(q, src_ip, &(pcb->remote_ip), - IP_PROTO_UDP, pcb->chksum_len); - /* chksum zero must become 0xffff, as zero means 'no checksum' */ - if (udphdr->chksum == 0x0000) udphdr->chksum = 0xffff; -#else - udphdr->chksum = 0x0000; -#endif - /* output to IP */ - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,IP_PROTO_UDPLITE,)\n")); - err = ip_output_if (q, src_ip, &pcb->remote_ip, pcb->ttl, pcb->tos, IP_PROTO_UDPLITE, netif); - /* UDP */ - } else { - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len)); - udphdr->len = htons(q->tot_len); - /* calculate checksum */ -#if CHECKSUM_GEN_UDP - if ((pcb->flags & UDP_FLAGS_NOCHKSUM) == 0) { - udphdr->chksum = inet_chksum_pseudo(q, src_ip, &pcb->remote_ip, IP_PROTO_UDP, q->tot_len); - /* chksum zero must become 0xffff, as zero means 'no checksum' */ - if (udphdr->chksum == 0x0000) udphdr->chksum = 0xffff; - } -#else - udphdr->chksum = 0x0000; -#endif - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum)); - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,IP_PROTO_UDP,)\n")); - /* output to IP */ - err = ip_output_if(q, src_ip, &pcb->remote_ip, pcb->ttl, pcb->tos, IP_PROTO_UDP, netif); - } - /* TODO: must this be increased even if error occured? */ - snmp_inc_udpoutdatagrams(); - - /* did we chain a seperate header pbuf earlier? */ - if (q != p) { - /* free the header pbuf */ - pbuf_free(q); q = NULL; - /* { p is still referenced by the caller, and will live on } */ - } - - UDP_STATS_INC(udp.xmit); - return err; -} - -/** - * Bind an UDP PCB. - * - * @param pcb UDP PCB to be bound with a local address ipaddr and port. - * @param ipaddr local IP address to bind with. Use IP_ADDR_ANY to - * bind to all local interfaces. - * @param port local UDP port to bind with. - * - * @return lwIP error code. - * - ERR_OK. Successful. No error occured. - * - ERR_USE. The specified ipaddr and port are already bound to by - * another UDP PCB. - * - * @see udp_disconnect() - */ -err_t -udp_bind(struct udp_pcb *pcb, struct ip_addr *ipaddr, u16_t port) -{ - struct udp_pcb *ipcb; - u8_t rebind; - - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | 3, ("udp_bind(ipaddr = ")); - ip_addr_debug_print(UDP_DEBUG, ipaddr); - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | 3, (", port = %"U16_F")\n", port)); - - rebind = 0; - /* Check for double bind and rebind of the same pcb */ - for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) { - /* is this UDP PCB already on active list? */ - if (pcb == ipcb) { - /* pcb may occur at most once in active list */ - LWIP_ASSERT("rebind == 0", rebind == 0); - /* pcb already in list, just rebind */ - rebind = 1; - } - -/* this code does not allow upper layer to share a UDP port for - listening to broadcast or multicast traffic (See SO_REUSE_ADDR and - SO_REUSE_PORT under *BSD). TODO: See where it fits instead, OR - combine with implementation of UDP PCB flags. Leon Woestenberg. */ -#ifdef LWIP_UDP_TODO - /* port matches that of PCB in list? */ - else if ((ipcb->local_port == port) && - /* IP address matches, or one is IP_ADDR_ANY? */ - (ip_addr_isany(&(ipcb->local_ip)) || - ip_addr_isany(ipaddr) || - ip_addr_cmp(&(ipcb->local_ip), ipaddr))) { - /* other PCB already binds to this local IP and port */ - LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: local port %"U16_F" already bound by another pcb\n", port)); - return ERR_USE; - } -#endif - - } - - ip_addr_set(&pcb->local_ip, ipaddr); - /* no port specified? */ - if (port == 0) { -#ifndef UDP_LOCAL_PORT_RANGE_START -#define UDP_LOCAL_PORT_RANGE_START 4096 -#define UDP_LOCAL_PORT_RANGE_END 0x7fff -#endif - port = UDP_LOCAL_PORT_RANGE_START; - ipcb = udp_pcbs; - while ((ipcb != NULL) && (port != UDP_LOCAL_PORT_RANGE_END)) { - if (ipcb->local_port == port) { - port++; - ipcb = udp_pcbs; - } else - ipcb = ipcb->next; - } - if (ipcb != NULL) { - /* no more ports available in local range */ - LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n")); - return ERR_USE; - } - } - pcb->local_port = port; - /* pcb not active yet? */ - if (rebind == 0) { - /* place the PCB on the active list if not already there */ - pcb->next = udp_pcbs; - udp_pcbs = pcb; - } - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | DBG_STATE, ("udp_bind: bound to %"U16_F".%"U16_F".%"U16_F".%"U16_F", port %"U16_F"\n", - (u16_t)(ntohl(pcb->local_ip.addr) >> 24 & 0xff), - (u16_t)(ntohl(pcb->local_ip.addr) >> 16 & 0xff), - (u16_t)(ntohl(pcb->local_ip.addr) >> 8 & 0xff), - (u16_t)(ntohl(pcb->local_ip.addr) & 0xff), pcb->local_port)); - return ERR_OK; -} -/** - * Connect an UDP PCB. - * - * This will associate the UDP PCB with the remote address. - * - * @param pcb UDP PCB to be connected with remote address ipaddr and port. - * @param ipaddr remote IP address to connect with. - * @param port remote UDP port to connect with. - * - * @return lwIP error code - * - * @see udp_disconnect() - */ -err_t -udp_connect(struct udp_pcb *pcb, struct ip_addr *ipaddr, u16_t port) -{ - struct udp_pcb *ipcb; - - if (pcb->local_port == 0) { - err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port); - if (err != ERR_OK) - return err; - } - - ip_addr_set(&pcb->remote_ip, ipaddr); - pcb->remote_port = port; - pcb->flags |= UDP_FLAGS_CONNECTED; -/** TODO: this functionality belongs in upper layers */ -#ifdef LWIP_UDP_TODO - /* Nail down local IP for netconn_addr()/getsockname() */ - if (ip_addr_isany(&pcb->local_ip) && !ip_addr_isany(&pcb->remote_ip)) { - struct netif *netif; - - if ((netif = ip_route(&(pcb->remote_ip))) == NULL) { - LWIP_DEBUGF(UDP_DEBUG, ("udp_connect: No route to 0x%lx\n", pcb->remote_ip.addr)); - UDP_STATS_INC(udp.rterr); - return ERR_RTE; - } - /** TODO: this will bind the udp pcb locally, to the interface which - is used to route output packets to the remote address. However, we - might want to accept incoming packets on any interface! */ - pcb->local_ip = netif->ip_addr; - } else if (ip_addr_isany(&pcb->remote_ip)) { - pcb->local_ip.addr = 0; - } -#endif - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | DBG_STATE, ("udp_connect: connected to %"U16_F".%"U16_F".%"U16_F".%"U16_F",port %"U16_F"\n", - (u16_t)(ntohl(pcb->remote_ip.addr) >> 24 & 0xff), - (u16_t)(ntohl(pcb->remote_ip.addr) >> 16 & 0xff), - (u16_t)(ntohl(pcb->remote_ip.addr) >> 8 & 0xff), - (u16_t)(ntohl(pcb->remote_ip.addr) & 0xff), pcb->remote_port)); - - /* Insert UDP PCB into the list of active UDP PCBs. */ - for(ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) { - if (pcb == ipcb) { - /* already on the list, just return */ - return ERR_OK; - } - } - /* PCB not yet on the list, add PCB now */ - pcb->next = udp_pcbs; - udp_pcbs = pcb; - return ERR_OK; -} - -void -udp_disconnect(struct udp_pcb *pcb) -{ - /* reset remote address association */ - ip_addr_set(&pcb->remote_ip, IP_ADDR_ANY); - pcb->remote_port = 0; - /* mark PCB as unconnected */ - pcb->flags &= ~UDP_FLAGS_CONNECTED; -} - -void -udp_recv(struct udp_pcb *pcb, - void (* recv)(void *arg, struct udp_pcb *upcb, struct pbuf *p, - struct ip_addr *addr, u16_t port), - void *recv_arg) -{ - /* remember recv() callback and user data */ - pcb->recv = recv; - pcb->recv_arg = recv_arg; -} -/** - * Remove an UDP PCB. - * - * @param pcb UDP PCB to be removed. The PCB is removed from the list of - * UDP PCB's and the data structure is freed from memory. - * - * @see udp_new() - */ -void -udp_remove(struct udp_pcb *pcb) -{ - struct udp_pcb *pcb2; - /* pcb to be removed is first in list? */ - if (udp_pcbs == pcb) { - /* make list start at 2nd pcb */ - udp_pcbs = udp_pcbs->next; - /* pcb not 1st in list */ - } else for(pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) { - /* find pcb in udp_pcbs list */ - if (pcb2->next != NULL && pcb2->next == pcb) { - /* remove pcb from list */ - pcb2->next = pcb->next; - } - } - memp_free(MEMP_UDP_PCB, pcb); -} -/** - * Create a UDP PCB. - * - * @return The UDP PCB which was created. NULL if the PCB data structure - * could not be allocated. - * - * @see udp_remove() - */ -struct udp_pcb * -udp_new(void) { - struct udp_pcb *pcb; - pcb = memp_malloc(MEMP_UDP_PCB); - /* could allocate UDP PCB? */ - if (pcb != NULL) { - /* initialize PCB to all zeroes */ - memset(pcb, 0, sizeof(struct udp_pcb)); - pcb->ttl = UDP_TTL; - } - - - return pcb; -} - -#if UDP_DEBUG -void -udp_debug_print(struct udp_hdr *udphdr) -{ - LWIP_DEBUGF(UDP_DEBUG, ("UDP header:\n")); - LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(UDP_DEBUG, ("| %5"U16_F" | %5"U16_F" | (src port, dest port)\n", - ntohs(udphdr->src), ntohs(udphdr->dest))); - LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(UDP_DEBUG, ("| %5"U16_F" | 0x%04"X16_F" | (len, chksum)\n", - ntohs(udphdr->len), ntohs(udphdr->chksum))); - LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); -} -#endif /* UDP_DEBUG */ - -#endif /* LWIP_UDP */ - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/icmp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/icmp.h deleted file mode 100644 index 634405b7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/icmp.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_ICMP_H__ -#define __LWIP_ICMP_H__ - -#include "lwip/arch.h" - -#include "lwip/opt.h" -#include "lwip/pbuf.h" - -#include "lwip/ip_addr.h" -#include "lwip/netif.h" - -#define ICMP_ER 0 /* echo reply */ -#define ICMP_DUR 3 /* destination unreachable */ -#define ICMP_SQ 4 /* source quench */ -#define ICMP_RD 5 /* redirect */ -#define ICMP_ECHO 8 /* echo */ -#define ICMP_TE 11 /* time exceeded */ -#define ICMP_PP 12 /* parameter problem */ -#define ICMP_TS 13 /* timestamp */ -#define ICMP_TSR 14 /* timestamp reply */ -#define ICMP_IRQ 15 /* information request */ -#define ICMP_IR 16 /* information reply */ - -enum icmp_dur_type { - ICMP_DUR_NET = 0, /* net unreachable */ - ICMP_DUR_HOST = 1, /* host unreachable */ - ICMP_DUR_PROTO = 2, /* protocol unreachable */ - ICMP_DUR_PORT = 3, /* port unreachable */ - ICMP_DUR_FRAG = 4, /* fragmentation needed and DF set */ - ICMP_DUR_SR = 5 /* source route failed */ -}; - -enum icmp_te_type { - ICMP_TE_TTL = 0, /* time to live exceeded in transit */ - ICMP_TE_FRAG = 1 /* fragment reassembly time exceeded */ -}; - -void icmp_input(struct pbuf *p, struct netif *inp); - -void icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t); -void icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t); - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct icmp_echo_hdr { - PACK_STRUCT_FIELD(u16_t _type_code); - PACK_STRUCT_FIELD(u16_t chksum); - PACK_STRUCT_FIELD(u16_t id); - PACK_STRUCT_FIELD(u16_t seqno); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END - -PACK_STRUCT_BEGIN -struct icmp_dur_hdr { - PACK_STRUCT_FIELD(u16_t _type_code); - PACK_STRUCT_FIELD(u16_t chksum); - PACK_STRUCT_FIELD(u32_t unused); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END - -PACK_STRUCT_BEGIN -struct icmp_te_hdr { - PACK_STRUCT_FIELD(u16_t _type_code); - PACK_STRUCT_FIELD(u16_t chksum); - PACK_STRUCT_FIELD(u32_t unused); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#define ICMPH_TYPE(hdr) (ntohs((hdr)->_type_code) >> 8) -#define ICMPH_CODE(hdr) (ntohs((hdr)->_type_code) & 0xff) - -#define ICMPH_TYPE_SET(hdr, type) ((hdr)->_type_code = htons(ICMPH_CODE(hdr) | ((type) << 8))) -#define ICMPH_CODE_SET(hdr, code) ((hdr)->_type_code = htons((code) | (ICMPH_TYPE(hdr) << 8))) - -#endif /* __LWIP_ICMP_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/inet.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/inet.h deleted file mode 100644 index 6d79aab7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/inet.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_INET_H__ -#define __LWIP_INET_H__ - -#include "lwip/arch.h" - -#include "lwip/opt.h" -#include "lwip/pbuf.h" -#include "lwip/ip_addr.h" - -u16_t inet_chksum(void *dataptr, u16_t len); -#if 0 /* optimized routine */ -u16_t inet_chksum4(u8_t *dataptr, u16_t len); -#endif -u16_t inet_chksum_pbuf(struct pbuf *p); -u16_t inet_chksum_pseudo(struct pbuf *p, - struct ip_addr *src, struct ip_addr *dest, - u8_t proto, u16_t proto_len); - -u32_t inet_addr(const char *cp); -s8_t inet_aton(const char *cp, struct in_addr *addr); -char *inet_ntoa(struct in_addr addr); /* returns ptr to static buffer; not reentrant! */ - -#ifdef htons -#undef htons -#endif /* htons */ -#ifdef htonl -#undef htonl -#endif /* htonl */ -#ifdef ntohs -#undef ntohs -#endif /* ntohs */ -#ifdef ntohl -#undef ntohl -#endif /* ntohl */ - -#if BYTE_ORDER == BIG_ENDIAN -#define htons(x) (x) -#define ntohs(x) (x) -#define htonl(x) (x) -#define ntohl(x) (x) -#else -#ifdef LWIP_PREFIX_BYTEORDER_FUNCS -/* workaround for naming collisions on some platforms */ -#define htons lwip_htons -#define ntohs lwip_ntohs -#define htonl lwip_htonl -#define ntohl lwip_ntohl -#endif -u16_t htons(u16_t x); -u16_t ntohs(u16_t x); -u32_t htonl(u32_t x); -u32_t ntohl(u32_t x); -#endif - -#endif /* __LWIP_INET_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/ip.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/ip.h deleted file mode 100644 index 4c15e1a0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/ip.h +++ /dev/null @@ -1,154 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_IP_H__ -#define __LWIP_IP_H__ - -#include "lwip/arch.h" - -#include "lwip/def.h" -#include "lwip/pbuf.h" -#include "lwip/ip_addr.h" - -#include "lwip/err.h" - - -void ip_init(void); -struct netif *ip_route(struct ip_addr *dest); -err_t ip_input(struct pbuf *p, struct netif *inp); -err_t ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t tos, u8_t proto); -err_t ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t tos, u8_t proto, - struct netif *netif); - -#define IP_HLEN 20 - -#define IP_PROTO_ICMP 1 -#define IP_PROTO_UDP 17 -#define IP_PROTO_UDPLITE 170 -#define IP_PROTO_TCP 6 - -/* This is passed as the destination address to ip_output_if (not - to ip_output), meaning that an IP header already is constructed - in the pbuf. This is used when TCP retransmits. */ -#ifdef IP_HDRINCL -#undef IP_HDRINCL -#endif /* IP_HDRINCL */ -#define IP_HDRINCL NULL - - -/* This is the common part of all PCB types. It needs to be at the - beginning of a PCB type definition. It is located here so that - changes to this common part are made in one location instead of - having to change all PCB structs. */ -#define IP_PCB struct ip_addr local_ip; \ - struct ip_addr remote_ip; \ - /* Socket options */ \ - u16_t so_options; \ - /* Type Of Service */ \ - u8_t tos; \ - /* Time To Live */ \ - u8_t ttl - -/* - * Option flags per-socket. These are the same like SO_XXX. - */ -#define SOF_DEBUG (u16_t)0x0001U /* turn on debugging info recording */ -#define SOF_ACCEPTCONN (u16_t)0x0002U /* socket has had listen() */ -#define SOF_REUSEADDR (u16_t)0x0004U /* allow local address reuse */ -#define SOF_KEEPALIVE (u16_t)0x0008U /* keep connections alive */ -#define SOF_DONTROUTE (u16_t)0x0010U /* just use interface addresses */ -#define SOF_BROADCAST (u16_t)0x0020U /* permit sending of broadcast msgs */ -#define SOF_USELOOPBACK (u16_t)0x0040U /* bypass hardware when possible */ -#define SOF_LINGER (u16_t)0x0080U /* linger on close if data present */ -#define SOF_OOBINLINE (u16_t)0x0100U /* leave received OOB data in line */ -#define SOF_REUSEPORT (u16_t)0x0200U /* allow local address & port reuse */ - - - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct ip_hdr { - /* version / header length / type of service */ - PACK_STRUCT_FIELD(u16_t _v_hl_tos); - /* total length */ - PACK_STRUCT_FIELD(u16_t _len); - /* identification */ - PACK_STRUCT_FIELD(u16_t _id); - /* fragment offset field */ - PACK_STRUCT_FIELD(u16_t _offset); -#define IP_RF 0x8000 /* reserved fragment flag */ -#define IP_DF 0x4000 /* dont fragment flag */ -#define IP_MF 0x2000 /* more fragments flag */ -#define IP_OFFMASK 0x1fff /* mask for fragmenting bits */ - /* time to live / protocol*/ - PACK_STRUCT_FIELD(u16_t _ttl_proto); - /* checksum */ - PACK_STRUCT_FIELD(u16_t _chksum); - /* source and destination IP addresses */ - PACK_STRUCT_FIELD(struct ip_addr src); - PACK_STRUCT_FIELD(struct ip_addr dest); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#define IPH_V(hdr) (ntohs((hdr)->_v_hl_tos) >> 12) -#define IPH_HL(hdr) ((ntohs((hdr)->_v_hl_tos) >> 8) & 0x0f) -#define IPH_TOS(hdr) (ntohs((hdr)->_v_hl_tos) & 0xff) -#define IPH_LEN(hdr) ((hdr)->_len) -#define IPH_ID(hdr) ((hdr)->_id) -#define IPH_OFFSET(hdr) ((hdr)->_offset) -#define IPH_TTL(hdr) (ntohs((hdr)->_ttl_proto) >> 8) -#define IPH_PROTO(hdr) (ntohs((hdr)->_ttl_proto) & 0xff) -#define IPH_CHKSUM(hdr) ((hdr)->_chksum) - -#define IPH_VHLTOS_SET(hdr, v, hl, tos) (hdr)->_v_hl_tos = (htons(((v) << 12) | ((hl) << 8) | (tos))) -#define IPH_LEN_SET(hdr, len) (hdr)->_len = (len) -#define IPH_ID_SET(hdr, id) (hdr)->_id = (id) -#define IPH_OFFSET_SET(hdr, off) (hdr)->_offset = (off) -#define IPH_TTL_SET(hdr, ttl) (hdr)->_ttl_proto = (htons(IPH_PROTO(hdr) | ((ttl) << 8))) -#define IPH_PROTO_SET(hdr, proto) (hdr)->_ttl_proto = (htons((proto) | (IPH_TTL(hdr) << 8))) -#define IPH_CHKSUM_SET(hdr, chksum) (hdr)->_chksum = (chksum) - -#if IP_DEBUG -void ip_debug_print(struct pbuf *p); -#else -#define ip_debug_print(p) -#endif /* IP_DEBUG */ - -#endif /* __LWIP_IP_H__ */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/ip_addr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/ip_addr.h deleted file mode 100644 index 2819b152..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/ip_addr.h +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_IP_ADDR_H__ -#define __LWIP_IP_ADDR_H__ - -#include "lwip/arch.h" - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct ip_addr { - PACK_STRUCT_FIELD(u32_t addr); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct ip_addr2 { - PACK_STRUCT_FIELD(u16_t addrw[2]); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -/* For compatibility with BSD code */ -struct in_addr { - u32_t s_addr; -}; - -struct netif; - -extern const struct ip_addr ip_addr_any; -extern const struct ip_addr ip_addr_broadcast; - -/** IP_ADDR_ can be used as a fixed IP address - * for the wildcard and the broadcast address - */ -#define IP_ADDR_ANY ((struct ip_addr *)&ip_addr_any) -#define IP_ADDR_BROADCAST ((struct ip_addr *)&ip_addr_broadcast) - -#define INADDR_NONE ((u32_t) 0xffffffff) /* 255.255.255.255 */ -#define INADDR_LOOPBACK ((u32_t) 0x7f000001) /* 127.0.0.1 */ - -/* Definitions of the bits in an Internet address integer. - - On subnets, host and network parts are found according to - the subnet mask, not these masks. */ - -#define IN_CLASSA(a) ((((u32_t)(a)) & 0x80000000) == 0) -#define IN_CLASSA_NET 0xff000000 -#define IN_CLASSA_NSHIFT 24 -#define IN_CLASSA_HOST (0xffffffff & ~IN_CLASSA_NET) -#define IN_CLASSA_MAX 128 - -#define IN_CLASSB(a) ((((u32_t)(a)) & 0xc0000000) == 0x80000000) -#define IN_CLASSB_NET 0xffff0000 -#define IN_CLASSB_NSHIFT 16 -#define IN_CLASSB_HOST (0xffffffff & ~IN_CLASSB_NET) -#define IN_CLASSB_MAX 65536 - -#define IN_CLASSC(a) ((((u32_t)(a)) & 0xe0000000) == 0xc0000000) -#define IN_CLASSC_NET 0xffffff00 -#define IN_CLASSC_NSHIFT 8 -#define IN_CLASSC_HOST (0xffffffff & ~IN_CLASSC_NET) - -#define IN_CLASSD(a) (((u32_t)(a) & 0xf0000000) == 0xe0000000) -#define IN_CLASSD_NET 0xf0000000 /* These ones aren't really */ -#define IN_CLASSD_NSHIFT 28 /* net and host fields, but */ -#define IN_CLASSD_HOST 0x0fffffff /* routing needn't know. */ -#define IN_MULTICAST(a) IN_CLASSD(a) - -#define IN_EXPERIMENTAL(a) (((u32_t)(a) & 0xf0000000) == 0xf0000000) -#define IN_BADCLASS(a) (((u32_t)(a) & 0xf0000000) == 0xf0000000) - -#define IN_LOOPBACKNET 127 /* official! */ - - -#define IP4_ADDR(ipaddr, a,b,c,d) (ipaddr)->addr = htonl(((u32_t)(a & 0xff) << 24) | ((u32_t)(b & 0xff) << 16) | \ - ((u32_t)(c & 0xff) << 8) | (u32_t)(d & 0xff)) - -#define ip_addr_set(dest, src) (dest)->addr = \ - ((src) == NULL? 0:\ - (src)->addr) -/** - * Determine if two address are on the same network. - * - * @arg addr1 IP address 1 - * @arg addr2 IP address 2 - * @arg mask network identifier mask - * @return !0 if the network identifiers of both address match - */ -#define ip_addr_netcmp(addr1, addr2, mask) (((addr1)->addr & \ - (mask)->addr) == \ - ((addr2)->addr & \ - (mask)->addr)) -#define ip_addr_cmp(addr1, addr2) ((addr1)->addr == (addr2)->addr) - -#define ip_addr_isany(addr1) ((addr1) == NULL || (addr1)->addr == 0) - -u8_t ip_addr_isbroadcast(struct ip_addr *, struct netif *); - -#define ip_addr_ismulticast(addr1) (((addr1)->addr & ntohl(0xf0000000)) == ntohl(0xe0000000)) - - -#define ip_addr_debug_print(debug, ipaddr) LWIP_DEBUGF(debug, ("%"U16_F".%"U16_F".%"U16_F".%"U16_F, \ - ipaddr?(u16_t)(ntohl((ipaddr)->addr) >> 24) & 0xff:0, \ - ipaddr?(u16_t)(ntohl((ipaddr)->addr) >> 16) & 0xff:0, \ - ipaddr?(u16_t)(ntohl((ipaddr)->addr) >> 8) & 0xff:0, \ - ipaddr?(u16_t)ntohl((ipaddr)->addr) & 0xff:0U)) - -/* cast to unsigned int, as it is used as argument to printf functions - * which expect integer arguments. CSi: use cc.h formatters (conversion chars)! */ -#define ip4_addr1(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 24) & 0xff) -#define ip4_addr2(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 16) & 0xff) -#define ip4_addr3(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 8) & 0xff) -#define ip4_addr4(ipaddr) ((u16_t)(ntohl((ipaddr)->addr)) & 0xff) -#endif /* __LWIP_IP_ADDR_H__ */ - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/ip_frag.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/ip_frag.h deleted file mode 100644 index a982c5a6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv4/lwip/ip_frag.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Jani Monoses - * - */ - -#ifndef __LWIP_IP_FRAG_H__ -#define __LWIP_IP_FRAG_H__ - -#include "lwip/err.h" -#include "lwip/pbuf.h" -#include "lwip/netif.h" -#include "lwip/ip_addr.h" - -void ip_reass_tmr(void); -struct pbuf * ip_reass(struct pbuf *p); -err_t ip_frag(struct pbuf *p, struct netif *netif, struct ip_addr *dest); - -#endif /* __LWIP_IP_FRAG_H__ */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv6/lwip/icmp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv6/lwip/icmp.h deleted file mode 100644 index 2b6adb12..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv6/lwip/icmp.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_ICMP_H__ -#define __LWIP_ICMP_H__ - -#include "lwip/arch.h" - -#include "lwip/opt.h" -#include "lwip/pbuf.h" - -#include "lwip/netif.h" - -#define ICMP6_DUR 1 -#define ICMP6_TE 3 -#define ICMP6_ECHO 128 /* echo */ -#define ICMP6_ER 129 /* echo reply */ - - -enum icmp_dur_type { - ICMP_DUR_NET = 0, /* net unreachable */ - ICMP_DUR_HOST = 1, /* host unreachable */ - ICMP_DUR_PROTO = 2, /* protocol unreachable */ - ICMP_DUR_PORT = 3, /* port unreachable */ - ICMP_DUR_FRAG = 4, /* fragmentation needed and DF set */ - ICMP_DUR_SR = 5 /* source route failed */ -}; - -enum icmp_te_type { - ICMP_TE_TTL = 0, /* time to live exceeded in transit */ - ICMP_TE_FRAG = 1 /* fragment reassembly time exceeded */ -}; - -void icmp_input(struct pbuf *p, struct netif *inp); - -void icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t); -void icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t); - -struct icmp_echo_hdr { - u8_t type; - u8_t icode; - u16_t chksum; - u16_t id; - u16_t seqno; -}; - -struct icmp_dur_hdr { - u8_t type; - u8_t icode; - u16_t chksum; - u32_t unused; -}; - -struct icmp_te_hdr { - u8_t type; - u8_t icode; - u16_t chksum; - u32_t unused; -}; - -#endif /* __LWIP_ICMP_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv6/lwip/inet.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv6/lwip/inet.h deleted file mode 100644 index ae783436..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv6/lwip/inet.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_INET_H__ -#define __LWIP_INET_H__ - -#include "lwip/arch.h" - -#include "lwip/opt.h" -#include "lwip/pbuf.h" -#include "lwip/ip_addr.h" - -u16_t inet_chksum(void *data, u16_t len); -u16_t inet_chksum_pbuf(struct pbuf *p); -u16_t inet_chksum_pseudo(struct pbuf *p, - struct ip_addr *src, struct ip_addr *dest, - u8_t proto, u32_t proto_len); - -u32_t inet_addr(const char *cp); -s8_t inet_aton(const char *cp, struct in_addr *addr); - -#ifndef _MACHINE_ENDIAN_H_ -#ifndef _NETINET_IN_H -#ifndef _LINUX_BYTEORDER_GENERIC_H -u16_t htons(u16_t n); -u16_t ntohs(u16_t n); -u32_t htonl(u32_t n); -u32_t ntohl(u32_t n); -#endif /* _LINUX_BYTEORDER_GENERIC_H */ -#endif /* _NETINET_IN_H */ -#endif /* _MACHINE_ENDIAN_H_ */ - -#endif /* __LWIP_INET_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv6/lwip/ip.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv6/lwip/ip.h deleted file mode 100644 index f46bf9a8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv6/lwip/ip.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_IP_H__ -#define __LWIP_IP_H__ - -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/pbuf.h" -#include "lwip/ip_addr.h" - -#include "lwip/err.h" - -#define IP_HLEN 40 - -#define IP_PROTO_ICMP 58 -#define IP_PROTO_UDP 17 -#define IP_PROTO_UDPLITE 170 -#define IP_PROTO_TCP 6 - -/* This is passed as the destination address to ip_output_if (not - to ip_output), meaning that an IP header already is constructed - in the pbuf. This is used when TCP retransmits. */ -#ifdef IP_HDRINCL -#undef IP_HDRINCL -#endif /* IP_HDRINCL */ -#define IP_HDRINCL NULL - - -/* The IPv6 header. */ -struct ip_hdr { -#if BYTE_ORDER == LITTLE_ENDIAN - u8_t tclass1:4, v:4; - u8_t flow1:4, tclass2:4; -#else - u8_t v:4, tclass1:4; - u8_t tclass2:8, flow1:4; -#endif - u16_t flow2; - u16_t len; /* payload length */ - u8_t nexthdr; /* next header */ - u8_t hoplim; /* hop limit (TTL) */ - struct ip_addr src, dest; /* source and destination IP addresses */ -}; - -void ip_init(void); - -#include "lwip/netif.h" - -struct netif *ip_route(struct ip_addr *dest); - -void ip_input(struct pbuf *p, struct netif *inp); - -/* source and destination addresses in network byte order, please */ -err_t ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t proto); - -err_t ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t proto, - struct netif *netif); - -#if IP_DEBUG -void ip_debug_print(struct pbuf *p); -#endif /* IP_DEBUG */ - -#endif /* __LWIP_IP_H__ */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv6/lwip/ip_addr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv6/lwip/ip_addr.h deleted file mode 100644 index db1f0906..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/ipv6/lwip/ip_addr.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_IP_ADDR_H__ -#define __LWIP_IP_ADDR_H__ - -#include "lwip/arch.h" - -#define IP_ADDR_ANY 0 - -struct ip_addr { - u32_t addr[4]; -}; - -#define IP6_ADDR(ipaddr, a,b,c,d,e,f,g,h) do { (ipaddr)->addr[0] = htonl((u32_t)((a & 0xffff) << 16) | (b & 0xffff)); \ - (ipaddr)->addr[1] = htonl(((c & 0xffff) << 16) | (d & 0xffff)); \ - (ipaddr)->addr[2] = htonl(((e & 0xffff) << 16) | (f & 0xffff)); \ - (ipaddr)->addr[3] = htonl(((g & 0xffff) << 16) | (h & 0xffff)); } while(0) - -u8_t ip_addr_netcmp(struct ip_addr *addr1, struct ip_addr *addr2, - struct ip_addr *mask); -u8_t ip_addr_cmp(struct ip_addr *addr1, struct ip_addr *addr2); -void ip_addr_set(struct ip_addr *dest, struct ip_addr *src); -u8_t ip_addr_isany(struct ip_addr *addr); - - -#if IP_DEBUG -void ip_addr_debug_print(struct ip_addr *addr); -#endif /* IP_DEBUG */ - -#endif /* __LWIP_IP_ADDR_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/api.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/api.h deleted file mode 100644 index 7f0ad596..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/api.h +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_API_H__ -#define __LWIP_API_H__ - -#include "lwip/opt.h" -#include "lwip/pbuf.h" -#include "lwip/sys.h" - -#include "lwip/ip.h" - -#include "lwip/raw.h" -#include "lwip/udp.h" -#include "lwip/tcp.h" - -#include "lwip/err.h" - -#define NETCONN_NOCOPY 0x00 -#define NETCONN_COPY 0x01 - -enum netconn_type { - NETCONN_TCP, - NETCONN_UDP, - NETCONN_UDPLITE, - NETCONN_UDPNOCHKSUM, - NETCONN_RAW -}; - -enum netconn_state { - NETCONN_NONE, - NETCONN_WRITE, - NETCONN_ACCEPT, - NETCONN_RECV, - NETCONN_CONNECT, - NETCONN_CLOSE -}; - -enum netconn_evt { - NETCONN_EVT_RCVPLUS, - NETCONN_EVT_RCVMINUS, - NETCONN_EVT_SENDPLUS, - NETCONN_EVT_SENDMINUS -}; - -struct netbuf { - struct pbuf *p, *ptr; - struct ip_addr *fromaddr; - u16_t fromport; - err_t err; -}; - -struct netconn { - enum netconn_type type; - enum netconn_state state; - union { - struct tcp_pcb *tcp; - struct udp_pcb *udp; - struct raw_pcb *raw; - } pcb; - err_t err; - sys_mbox_t mbox; - sys_mbox_t recvmbox; - sys_mbox_t acceptmbox; - sys_sem_t sem; - int socket; - u16_t recv_avail; - void (* callback)(struct netconn *, enum netconn_evt, u16_t len); -}; - -/* Network buffer functions: */ -struct netbuf * netbuf_new (void); -void netbuf_delete (struct netbuf *buf); -void * netbuf_alloc (struct netbuf *buf, u16_t size); -void netbuf_free (struct netbuf *buf); -void netbuf_ref (struct netbuf *buf, - void *dataptr, u16_t size); -void netbuf_chain (struct netbuf *head, - struct netbuf *tail); - -u16_t netbuf_len (struct netbuf *buf); -err_t netbuf_data (struct netbuf *buf, - void **dataptr, u16_t *len); -s8_t netbuf_next (struct netbuf *buf); -void netbuf_first (struct netbuf *buf); - -void netbuf_copy (struct netbuf *buf, - void *dataptr, u16_t len); -void netbuf_copy_partial(struct netbuf *buf, void *dataptr, - u16_t len, u16_t offset); -struct ip_addr * netbuf_fromaddr (struct netbuf *buf); -u16_t netbuf_fromport (struct netbuf *buf); - -/* Network connection functions: */ -struct netconn * netconn_new (enum netconn_type type); -struct -netconn *netconn_new_with_callback(enum netconn_type t, - void (*callback)(struct netconn *, enum netconn_evt, u16_t len)); -struct -netconn *netconn_new_with_proto_and_callback(enum netconn_type t, u16_t proto, - void (*callback)(struct netconn *, enum netconn_evt, u16_t len)); -err_t netconn_delete (struct netconn *conn); -enum netconn_type netconn_type (struct netconn *conn); -err_t netconn_peer (struct netconn *conn, - struct ip_addr *addr, - u16_t *port); -err_t netconn_addr (struct netconn *conn, - struct ip_addr **addr, - u16_t *port); -err_t netconn_bind (struct netconn *conn, - struct ip_addr *addr, - u16_t port); -err_t netconn_connect (struct netconn *conn, - struct ip_addr *addr, - u16_t port); -err_t netconn_disconnect (struct netconn *conn); -err_t netconn_listen (struct netconn *conn); -struct netconn * netconn_accept (struct netconn *conn); -struct netbuf * netconn_recv (struct netconn *conn); -err_t netconn_send (struct netconn *conn, - struct netbuf *buf); -err_t netconn_write (struct netconn *conn, - void *dataptr, u16_t size, - u8_t copy); -err_t netconn_close (struct netconn *conn); - -err_t netconn_err (struct netconn *conn); - -#endif /* __LWIP_API_H__ */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/api_msg.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/api_msg.h deleted file mode 100644 index 3fef3dd0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/api_msg.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_API_MSG_H__ -#define __LWIP_API_MSG_H__ - -#include "lwip/opt.h" -#include "lwip/pbuf.h" -#include "lwip/sys.h" - -#include "lwip/ip.h" - -#include "lwip/udp.h" -#include "lwip/tcp.h" - -#include "lwip/api.h" - -enum api_msg_type { - API_MSG_NEWCONN, - API_MSG_DELCONN, - - API_MSG_BIND, - API_MSG_CONNECT, - API_MSG_DISCONNECT, - - API_MSG_LISTEN, - API_MSG_ACCEPT, - - API_MSG_SEND, - API_MSG_RECV, - API_MSG_WRITE, - - API_MSG_CLOSE, - - API_MSG_MAX -}; - -struct api_msg_msg { - struct netconn *conn; - enum netconn_type conntype; - union { - struct pbuf *p; - struct { - struct ip_addr *ipaddr; - u16_t port; - } bc; - struct { - void *dataptr; - u16_t len; - u8_t copy; - } w; - sys_mbox_t mbox; - u16_t len; - } msg; -}; - -struct api_msg { - enum api_msg_type type; - struct api_msg_msg msg; -}; - -void api_msg_input(struct api_msg *msg); -void api_msg_post(struct api_msg *msg); - -#endif /* __LWIP_API_MSG_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/arch.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/arch.h deleted file mode 100644 index e0d622a4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/arch.h +++ /dev/null @@ -1,216 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_ARCH_H__ -#define __LWIP_ARCH_H__ - -#ifndef LITTLE_ENDIAN -#define LITTLE_ENDIAN 1234 -#endif - -#ifndef BIG_ENDIAN -#define BIG_ENDIAN 4321 -#endif - -#include "arch/cc.h" - -#ifndef PACK_STRUCT_BEGIN -#define PACK_STRUCT_BEGIN -#endif /* PACK_STRUCT_BEGIN */ - -#ifndef PACK_STRUCT_END -#define PACK_STRUCT_END -#endif /* PACK_STRUCT_END */ - -#ifndef PACK_STRUCT_FIELD -#define PACK_STRUCT_FIELD(x) x -#endif /* PACK_STRUCT_FIELD */ - - - -#ifdef LWIP_PROVIDE_ERRNO - -#define EPERM 1 /* Operation not permitted */ -#define ENOENT 2 /* No such file or directory */ -#define ESRCH 3 /* No such process */ -#define EINTR 4 /* Interrupted system call */ -#define EIO 5 /* I/O error */ -#define ENXIO 6 /* No such device or address */ -#define E2BIG 7 /* Arg list too long */ -#define ENOEXEC 8 /* Exec format error */ -#define EBADF 9 /* Bad file number */ -#define ECHILD 10 /* No child processes */ -#define EAGAIN 11 /* Try again */ -#define ENOMEM 12 /* Out of memory */ -#define EACCES 13 /* Permission denied */ -#define EFAULT 14 /* Bad address */ -#define ENOTBLK 15 /* Block device required */ -#define EBUSY 16 /* Device or resource busy */ -#define EEXIST 17 /* File exists */ -#define EXDEV 18 /* Cross-device link */ -#define ENODEV 19 /* No such device */ -#define ENOTDIR 20 /* Not a directory */ -#define EISDIR 21 /* Is a directory */ -#define EINVAL 22 /* Invalid argument */ -#define ENFILE 23 /* File table overflow */ -#define EMFILE 24 /* Too many open files */ -#define ENOTTY 25 /* Not a typewriter */ -#define ETXTBSY 26 /* Text file busy */ -#define EFBIG 27 /* File too large */ -#define ENOSPC 28 /* No space left on device */ -#define ESPIPE 29 /* Illegal seek */ -#define EROFS 30 /* Read-only file system */ -#define EMLINK 31 /* Too many links */ -#define EPIPE 32 /* Broken pipe */ -#define EDOM 33 /* Math argument out of domain of func */ -#define ERANGE 34 /* Math result not representable */ -#define EDEADLK 35 /* Resource deadlock would occur */ -#define ENAMETOOLONG 36 /* File name too long */ -#define ENOLCK 37 /* No record locks available */ -#define ENOSYS 38 /* Function not implemented */ -#define ENOTEMPTY 39 /* Directory not empty */ -#define ELOOP 40 /* Too many symbolic links encountered */ -#define EWOULDBLOCK EAGAIN /* Operation would block */ -#define ENOMSG 42 /* No message of desired type */ -#define EIDRM 43 /* Identifier removed */ -#define ECHRNG 44 /* Channel number out of range */ -#define EL2NSYNC 45 /* Level 2 not synchronized */ -#define EL3HLT 46 /* Level 3 halted */ -#define EL3RST 47 /* Level 3 reset */ -#define ELNRNG 48 /* Link number out of range */ -#define EUNATCH 49 /* Protocol driver not attached */ -#define ENOCSI 50 /* No CSI structure available */ -#define EL2HLT 51 /* Level 2 halted */ -#define EBADE 52 /* Invalid exchange */ -#define EBADR 53 /* Invalid request descriptor */ -#define EXFULL 54 /* Exchange full */ -#define ENOANO 55 /* No anode */ -#define EBADRQC 56 /* Invalid request code */ -#define EBADSLT 57 /* Invalid slot */ - -#define EDEADLOCK EDEADLK - -#define EBFONT 59 /* Bad font file format */ -#define ENOSTR 60 /* Device not a stream */ -#define ENODATA 61 /* No data available */ -#define ETIME 62 /* Timer expired */ -#define ENOSR 63 /* Out of streams resources */ -#define ENONET 64 /* Machine is not on the network */ -#define ENOPKG 65 /* Package not installed */ -#define EREMOTE 66 /* Object is remote */ -#define ENOLINK 67 /* Link has been severed */ -#define EADV 68 /* Advertise error */ -#define ESRMNT 69 /* Srmount error */ -#define ECOMM 70 /* Communication error on send */ -#define EPROTO 71 /* Protocol error */ -#define EMULTIHOP 72 /* Multihop attempted */ -#define EDOTDOT 73 /* RFS specific error */ -#define EBADMSG 74 /* Not a data message */ -#define EOVERFLOW 75 /* Value too large for defined data type */ -#define ENOTUNIQ 76 /* Name not unique on network */ -#define EBADFD 77 /* File descriptor in bad state */ -#define EREMCHG 78 /* Remote address changed */ -#define ELIBACC 79 /* Can not access a needed shared library */ -#define ELIBBAD 80 /* Accessing a corrupted shared library */ -#define ELIBSCN 81 /* .lib section in a.out corrupted */ -#define ELIBMAX 82 /* Attempting to link in too many shared libraries */ -#define ELIBEXEC 83 /* Cannot exec a shared library directly */ -#define EILSEQ 84 /* Illegal byte sequence */ -#define ERESTART 85 /* Interrupted system call should be restarted */ -#define ESTRPIPE 86 /* Streams pipe error */ -#define EUSERS 87 /* Too many users */ -#define ENOTSOCK 88 /* Socket operation on non-socket */ -#define EDESTADDRREQ 89 /* Destination address required */ -#define EMSGSIZE 90 /* Message too long */ -#define EPROTOTYPE 91 /* Protocol wrong type for socket */ -#define ENOPROTOOPT 92 /* Protocol not available */ -#define EPROTONOSUPPORT 93 /* Protocol not supported */ -#define ESOCKTNOSUPPORT 94 /* Socket type not supported */ -#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ -#define EPFNOSUPPORT 96 /* Protocol family not supported */ -#define EAFNOSUPPORT 97 /* Address family not supported by protocol */ -#define EADDRINUSE 98 /* Address already in use */ -#define EADDRNOTAVAIL 99 /* Cannot assign requested address */ -#define ENETDOWN 100 /* Network is down */ -#define ENETUNREACH 101 /* Network is unreachable */ -#define ENETRESET 102 /* Network dropped connection because of reset */ -#define ECONNABORTED 103 /* Software caused connection abort */ -#define ECONNRESET 104 /* Connection reset by peer */ -#define ENOBUFS 105 /* No buffer space available */ -#define EISCONN 106 /* Transport endpoint is already connected */ -#define ENOTCONN 107 /* Transport endpoint is not connected */ -#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */ -#define ETOOMANYREFS 109 /* Too many references: cannot splice */ -#define ETIMEDOUT 110 /* Connection timed out */ -#define ECONNREFUSED 111 /* Connection refused */ -#define EHOSTDOWN 112 /* Host is down */ -#define EHOSTUNREACH 113 /* No route to host */ -#define EALREADY 114 /* Operation already in progress */ -#define EINPROGRESS 115 /* Operation now in progress */ -#define ESTALE 116 /* Stale NFS file handle */ -#define EUCLEAN 117 /* Structure needs cleaning */ -#define ENOTNAM 118 /* Not a XENIX named type file */ -#define ENAVAIL 119 /* No XENIX semaphores available */ -#define EISNAM 120 /* Is a named type file */ -#define EREMOTEIO 121 /* Remote I/O error */ -#define EDQUOT 122 /* Quota exceeded */ - -#define ENOMEDIUM 123 /* No medium found */ -#define EMEDIUMTYPE 124 /* Wrong medium type */ - - -#define ENSROK 0 /* DNS server returned answer with no data */ -#define ENSRNODATA 160 /* DNS server returned answer with no data */ -#define ENSRFORMERR 161 /* DNS server claims query was misformatted */ -#define ENSRSERVFAIL 162 /* DNS server returned general failure */ -#define ENSRNOTFOUND 163 /* Domain name not found */ -#define ENSRNOTIMP 164 /* DNS server does not implement requested operation */ -#define ENSRREFUSED 165 /* DNS server refused query */ -#define ENSRBADQUERY 166 /* Misformatted DNS query */ -#define ENSRBADNAME 167 /* Misformatted domain name */ -#define ENSRBADFAMILY 168 /* Unsupported address family */ -#define ENSRBADRESP 169 /* Misformatted DNS reply */ -#define ENSRCONNREFUSED 170 /* Could not contact DNS servers */ -#define ENSRTIMEOUT 171 /* Timeout while contacting DNS servers */ -#define ENSROF 172 /* End of file */ -#define ENSRFILE 173 /* Error reading file */ -#define ENSRNOMEM 174 /* Out of memory */ -#define ENSRDESTRUCTION 175 /* Application terminated lookup */ -#define ENSRQUERYDOMAINTOOLONG 176 /* Domain name is too long */ -#define ENSRCNAMELOOP 177 /* Domain name is too long */ - -#ifndef errno -extern int errno; -#endif - -#endif /* LWIP_PROVIDE_ERRNO */ - -#endif /* __LWIP_ARCH_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/debug.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/debug.h deleted file mode 100644 index 8f63a7b6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/debug.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_DEBUG_H__ -#define __LWIP_DEBUG_H__ - -#include "arch/cc.h" - -/** lower two bits indicate debug level - * - 0 off - * - 1 warning - * - 2 serious - * - 3 severe - */ - -#define DBG_LEVEL_OFF 0 -#define DBG_LEVEL_WARNING 1 /* bad checksums, dropped packets, ... */ -#define DBG_LEVEL_SERIOUS 2 /* memory allocation failures, ... */ -#define DBG_LEVEL_SEVERE 3 /* */ -#define DBG_MASK_LEVEL 3 - -/** flag for LWIP_DEBUGF to enable that debug message */ -#define DBG_ON 0x80U -/** flag for LWIP_DEBUGF to disable that debug message */ -#define DBG_OFF 0x00U - -/** flag for LWIP_DEBUGF indicating a tracing message (to follow program flow) */ -#define DBG_TRACE 0x40U -/** flag for LWIP_DEBUGF indicating a state debug message (to follow module states) */ -#define DBG_STATE 0x20U -/** flag for LWIP_DEBUGF indicating newly added code, not thoroughly tested yet */ -#define DBG_FRESH 0x10U -/** flag for LWIP_DEBUGF to halt after printing this debug message */ -#define DBG_HALT 0x08U - -#ifndef LWIP_NOASSERT -# define LWIP_ASSERT(x,y) do { if(!(y)) LWIP_PLATFORM_ASSERT(x); } while(0) -#else -# define LWIP_ASSERT(x,y) -#endif - -#ifdef LWIP_DEBUG -/** print debug message only if debug message type is enabled... - * AND is of correct type AND is at least DBG_LEVEL - */ -# define LWIP_DEBUGF(debug,x) do { if (((debug) & DBG_ON) && ((debug) & DBG_TYPES_ON) && ((s16_t)((debug) & DBG_MASK_LEVEL) >= DBG_MIN_LEVEL)) { LWIP_PLATFORM_DIAG(x); if ((debug) & DBG_HALT) while(1); } } while(0) -# define LWIP_ERROR(x) do { LWIP_PLATFORM_DIAG(x); } while(0) -#else /* LWIP_DEBUG */ -# define LWIP_DEBUGF(debug,x) -# define LWIP_ERROR(x) -#endif /* LWIP_DEBUG */ - -#endif /* __LWIP_DEBUG_H__ */ - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/def.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/def.h deleted file mode 100644 index eba9b877..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/def.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_DEF_H__ -#define __LWIP_DEF_H__ - -/* this might define NULL already */ -#include "arch/cc.h" - -#define LWIP_MAX(x , y) (x) > (y) ? (x) : (y) -#define LWIP_MIN(x , y) (x) < (y) ? (x) : (y) - -#ifndef NULL -#define NULL ((void *)0) -#endif - - -#endif /* __LWIP_DEF_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/dhcp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/dhcp.h deleted file mode 100644 index bfe753f2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/dhcp.h +++ /dev/null @@ -1,223 +0,0 @@ -/** @file - */ - -#ifndef __LWIP_DHCP_H__ -#define __LWIP_DHCP_H__ - -#include "lwip/opt.h" -#include "lwip/netif.h" -#include "lwip/udp.h" - -/** period (in seconds) of the application calling dhcp_coarse_tmr() */ -#define DHCP_COARSE_TIMER_SECS 60 -/** period (in milliseconds) of the application calling dhcp_fine_tmr() */ -#define DHCP_FINE_TIMER_MSECS 500 - -struct dhcp -{ - /** current DHCP state machine state */ - u8_t state; - /** retries of current request */ - u8_t tries; - /** transaction identifier of last sent request */ - u32_t xid; - /** our connection to the DHCP server */ - struct udp_pcb *pcb; - /** (first) pbuf of incoming msg */ - struct pbuf *p; - /** incoming msg */ - struct dhcp_msg *msg_in; - /** incoming msg options */ - struct dhcp_msg *options_in; - /** ingoing msg options length */ - u16_t options_in_len; - - struct pbuf *p_out; /* pbuf of outcoming msg */ - struct dhcp_msg *msg_out; /* outgoing msg */ - u16_t options_out_len; /* outgoing msg options length */ - u16_t request_timeout; /* #ticks with period DHCP_FINE_TIMER_SECS for request timeout */ - u16_t t1_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for renewal time */ - u16_t t2_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for rebind time */ - struct ip_addr server_ip_addr; /* dhcp server address that offered this lease */ - struct ip_addr offered_ip_addr; - struct ip_addr offered_sn_mask; - struct ip_addr offered_gw_addr; - struct ip_addr offered_bc_addr; -#define DHCP_MAX_DNS 2 - u32_t dns_count; /* actual number of DNS servers obtained */ - struct ip_addr offered_dns_addr[DHCP_MAX_DNS]; /* DNS server addresses */ - - u32_t offered_t0_lease; /* lease period (in seconds) */ - u32_t offered_t1_renew; /* recommended renew time (usually 50% of lease period) */ - u32_t offered_t2_rebind; /* recommended rebind time (usually 66% of lease period) */ -/** Patch #1308 - * TODO: See dhcp.c "TODO"s - */ -#if 0 - struct ip_addr offered_si_addr; - u8_t *boot_file_name; -#endif -}; - -/* MUST be compiled with "pack structs" or equivalent! */ -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -/** minimum set of fields of any DHCP message */ -struct dhcp_msg -{ - PACK_STRUCT_FIELD(u8_t op); - PACK_STRUCT_FIELD(u8_t htype); - PACK_STRUCT_FIELD(u8_t hlen); - PACK_STRUCT_FIELD(u8_t hops); - PACK_STRUCT_FIELD(u32_t xid); - PACK_STRUCT_FIELD(u16_t secs); - PACK_STRUCT_FIELD(u16_t flags); - PACK_STRUCT_FIELD(struct ip_addr ciaddr); - PACK_STRUCT_FIELD(struct ip_addr yiaddr); - PACK_STRUCT_FIELD(struct ip_addr siaddr); - PACK_STRUCT_FIELD(struct ip_addr giaddr); -#define DHCP_CHADDR_LEN 16U - PACK_STRUCT_FIELD(u8_t chaddr[DHCP_CHADDR_LEN]); -#define DHCP_SNAME_LEN 64U - PACK_STRUCT_FIELD(u8_t sname[DHCP_SNAME_LEN]); -#define DHCP_FILE_LEN 128U - PACK_STRUCT_FIELD(u8_t file[DHCP_FILE_LEN]); - PACK_STRUCT_FIELD(u32_t cookie); -#define DHCP_MIN_OPTIONS_LEN 68U -/** make sure user does not configure this too small */ -#if ((defined(DHCP_OPTIONS_LEN)) && (DHCP_OPTIONS_LEN < DHCP_MIN_OPTIONS_LEN)) -# undef DHCP_OPTIONS_LEN -#endif -/** allow this to be configured in lwipopts.h, but not too small */ -#if (!defined(DHCP_OPTIONS_LEN)) -/** set this to be sufficient for your options in outgoing DHCP msgs */ -# define DHCP_OPTIONS_LEN DHCP_MIN_OPTIONS_LEN -#endif - PACK_STRUCT_FIELD(u8_t options[DHCP_OPTIONS_LEN]); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -/** start DHCP configuration */ -err_t dhcp_start(struct netif *netif); -/** enforce early lease renewal (not needed normally)*/ -err_t dhcp_renew(struct netif *netif); -/** release the DHCP lease, usually called before dhcp_stop()*/ -err_t dhcp_release(struct netif *netif); -/** stop DHCP configuration */ -void dhcp_stop(struct netif *netif); -/** inform server of our manual IP address */ -void dhcp_inform(struct netif *netif); - -/** if enabled, check whether the offered IP address is not in use, using ARP */ -#if DHCP_DOES_ARP_CHECK -void dhcp_arp_reply(struct netif *netif, struct ip_addr *addr); -#endif - -/** to be called every minute */ -void dhcp_coarse_tmr(void); -/** to be called every half second */ -void dhcp_fine_tmr(void); - -/** DHCP message item offsets and length */ -#define DHCP_MSG_OFS (UDP_DATA_OFS) - #define DHCP_OP_OFS (DHCP_MSG_OFS + 0) - #define DHCP_HTYPE_OFS (DHCP_MSG_OFS + 1) - #define DHCP_HLEN_OFS (DHCP_MSG_OFS + 2) - #define DHCP_HOPS_OFS (DHCP_MSG_OFS + 3) - #define DHCP_XID_OFS (DHCP_MSG_OFS + 4) - #define DHCP_SECS_OFS (DHCP_MSG_OFS + 8) - #define DHCP_FLAGS_OFS (DHCP_MSG_OFS + 10) - #define DHCP_CIADDR_OFS (DHCP_MSG_OFS + 12) - #define DHCP_YIADDR_OFS (DHCP_MSG_OFS + 16) - #define DHCP_SIADDR_OFS (DHCP_MSG_OFS + 20) - #define DHCP_GIADDR_OFS (DHCP_MSG_OFS + 24) - #define DHCP_CHADDR_OFS (DHCP_MSG_OFS + 28) - #define DHCP_SNAME_OFS (DHCP_MSG_OFS + 44) - #define DHCP_FILE_OFS (DHCP_MSG_OFS + 108) -#define DHCP_MSG_LEN 236 - -#define DHCP_COOKIE_OFS (DHCP_MSG_OFS + DHCP_MSG_LEN) -#define DHCP_OPTIONS_OFS (DHCP_MSG_OFS + DHCP_MSG_LEN + 4) - -#define DHCP_CLIENT_PORT 68 -#define DHCP_SERVER_PORT 67 - -/** DHCP client states */ -#define DHCP_REQUESTING 1 -#define DHCP_INIT 2 -#define DHCP_REBOOTING 3 -#define DHCP_REBINDING 4 -#define DHCP_RENEWING 5 -#define DHCP_SELECTING 6 -#define DHCP_INFORMING 7 -#define DHCP_CHECKING 8 -#define DHCP_PERMANENT 9 -#define DHCP_BOUND 10 -/** not yet implemented #define DHCP_RELEASING 11 */ -#define DHCP_BACKING_OFF 12 -#define DHCP_OFF 13 - -#define DHCP_BOOTREQUEST 1 -#define DHCP_BOOTREPLY 2 - -#define DHCP_DISCOVER 1 -#define DHCP_OFFER 2 -#define DHCP_REQUEST 3 -#define DHCP_DECLINE 4 -#define DHCP_ACK 5 -#define DHCP_NAK 6 -#define DHCP_RELEASE 7 -#define DHCP_INFORM 8 - -#define DHCP_HTYPE_ETH 1 - -#define DHCP_HLEN_ETH 6 - -#define DHCP_BROADCAST_FLAG 15 -#define DHCP_BROADCAST_MASK (1 << DHCP_FLAG_BROADCAST) - -/** BootP options */ -#define DHCP_OPTION_PAD 0 -#define DHCP_OPTION_SUBNET_MASK 1 /* RFC 2132 3.3 */ -#define DHCP_OPTION_ROUTER 3 -#define DHCP_OPTION_DNS_SERVER 6 -#define DHCP_OPTION_HOSTNAME 12 -#define DHCP_OPTION_IP_TTL 23 -#define DHCP_OPTION_MTU 26 -#define DHCP_OPTION_BROADCAST 28 -#define DHCP_OPTION_TCP_TTL 37 -#define DHCP_OPTION_END 255 - -/** DHCP options */ -#define DHCP_OPTION_REQUESTED_IP 50 /* RFC 2132 9.1, requested IP address */ -#define DHCP_OPTION_LEASE_TIME 51 /* RFC 2132 9.2, time in seconds, in 4 bytes */ -#define DHCP_OPTION_OVERLOAD 52 /* RFC2132 9.3, use file and/or sname field for options */ - -#define DHCP_OPTION_MESSAGE_TYPE 53 /* RFC 2132 9.6, important for DHCP */ -#define DHCP_OPTION_MESSAGE_TYPE_LEN 1 - - -#define DHCP_OPTION_SERVER_ID 54 /* RFC 2132 9.7, server IP address */ -#define DHCP_OPTION_PARAMETER_REQUEST_LIST 55 /* RFC 2132 9.8, requested option types */ - -#define DHCP_OPTION_MAX_MSG_SIZE 57 /* RFC 2132 9.10, message size accepted >= 576 */ -#define DHCP_OPTION_MAX_MSG_SIZE_LEN 2 - -#define DHCP_OPTION_T1 58 /* T1 renewal time */ -#define DHCP_OPTION_T2 59 /* T2 rebinding time */ -#define DHCP_OPTION_CLIENT_ID 61 -#define DHCP_OPTION_TFTP_SERVERNAME 66 -#define DHCP_OPTION_BOOTFILE 67 - -/** possible combinations of overloading the file and sname fields with options */ -#define DHCP_OVERLOAD_NONE 0 -#define DHCP_OVERLOAD_FILE 1 -#define DHCP_OVERLOAD_SNAME 2 -#define DHCP_OVERLOAD_SNAME_FILE 3 - -#endif /*__LWIP_DHCP_H__*/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/err.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/err.h deleted file mode 100644 index c92cb26d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/err.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_ERR_H__ -#define __LWIP_ERR_H__ - -#include "lwip/opt.h" - -#include "arch/cc.h" - -typedef s8_t err_t; - -/* Definitions for error constants. */ - -#define ERR_OK 0 /* No error, everything OK. */ -#define ERR_MEM -1 /* Out of memory error. */ -#define ERR_BUF -2 /* Buffer error. */ - - -#define ERR_ABRT -3 /* Connection aborted. */ -#define ERR_RST -4 /* Connection reset. */ -#define ERR_CLSD -5 /* Connection closed. */ -#define ERR_CONN -6 /* Not connected. */ - -#define ERR_VAL -7 /* Illegal value. */ - -#define ERR_ARG -8 /* Illegal argument. */ - -#define ERR_RTE -9 /* Routing problem. */ - -#define ERR_USE -10 /* Address in use. */ - -#define ERR_IF -11 /* Low-level netif error */ -#define ERR_ISCONN -12 /* Already connected. */ - - -#ifdef LWIP_DEBUG -extern char *lwip_strerr(err_t err); -#else -#define lwip_strerr(x) "" -#endif /* LWIP_DEBUG */ -#endif /* __LWIP_ERR_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/mem.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/mem.h deleted file mode 100644 index ee6fea7d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/mem.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_MEM_H__ -#define __LWIP_MEM_H__ - -#include "lwip/opt.h" -#include "lwip/arch.h" - -#if MEM_SIZE > 64000l -typedef u32_t mem_size_t; -#else -typedef u16_t mem_size_t; -#endif /* MEM_SIZE > 64000 */ - - -void mem_init(void); - -void *mem_malloc(mem_size_t size); -void mem_free(void *mem); -void *mem_realloc(void *mem, mem_size_t size); -void *mem_reallocm(void *mem, mem_size_t size); - -#ifndef MEM_ALIGN_SIZE -#define MEM_ALIGN_SIZE(size) (((size) + MEM_ALIGNMENT - 1) & ~(MEM_ALIGNMENT-1)) -#endif - -#ifndef MEM_ALIGN -#define MEM_ALIGN(addr) ((void *)(((mem_ptr_t)(addr) + MEM_ALIGNMENT - 1) & ~(mem_ptr_t)(MEM_ALIGNMENT-1))) -#endif - -#endif /* __LWIP_MEM_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/memp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/memp.h deleted file mode 100644 index 1cd46fa3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/memp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#ifndef __LWIP_MEMP_H__ -#define __LWIP_MEMP_H__ - -#include "lwip/opt.h" - -typedef enum { - MEMP_PBUF, - MEMP_RAW_PCB, - MEMP_UDP_PCB, - MEMP_TCP_PCB, - MEMP_TCP_PCB_LISTEN, - MEMP_TCP_SEG, - - MEMP_NETBUF, - MEMP_NETCONN, - MEMP_API_MSG, - MEMP_TCPIP_MSG, - - MEMP_SYS_TIMEOUT, - - MEMP_MAX -} memp_t; - -void memp_init(void); - -void *memp_malloc(memp_t type); -void *memp_realloc(memp_t fromtype, memp_t totype, void *mem); -void memp_free(memp_t type, void *mem); - -#endif /* __LWIP_MEMP_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/netif.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/netif.h deleted file mode 100644 index ff50c6f9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/netif.h +++ /dev/null @@ -1,150 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_NETIF_H__ -#define __LWIP_NETIF_H__ - -#include "lwip/opt.h" - -#include "lwip/err.h" - -#include "lwip/ip_addr.h" - -#include "lwip/inet.h" -#include "lwip/pbuf.h" -#if LWIP_DHCP -# include "lwip/dhcp.h" -#endif - -/** must be the maximum of all used hardware address lengths - across all types of interfaces in use */ -#define NETIF_MAX_HWADDR_LEN 6U - -/** TODO: define the use (where, when, whom) of netif flags */ - -/** whether the network interface is 'up'. this is - * a software flag used to control whether this network - * interface is enabled and processes traffic. - */ -#define NETIF_FLAG_UP 0x1U -/** if set, the netif has broadcast capability */ -#define NETIF_FLAG_BROADCAST 0x2U -/** if set, the netif is one end of a point-to-point connection */ -#define NETIF_FLAG_POINTTOPOINT 0x4U -/** if set, the interface is configured using DHCP */ -#define NETIF_FLAG_DHCP 0x08U -/** if set, the interface has an active link - * (set by the network interface driver) */ -#define NETIF_FLAG_LINK_UP 0x10U - -/** Generic data structure used for all lwIP network interfaces. - * The following fields should be filled in by the initialization - * function for the device driver: hwaddr_len, hwaddr[], mtu, flags */ - -struct netif { - /** pointer to next in linked list */ - struct netif *next; - - /** IP address configuration in network byte order */ - struct ip_addr ip_addr; - struct ip_addr netmask; - struct ip_addr gw; - - /** This function is called by the network device driver - * to pass a packet up the TCP/IP stack. */ - err_t (* input)(struct pbuf *p, struct netif *inp); - /** This function is called by the IP module when it wants - * to send a packet on the interface. This function typically - * first resolves the hardware address, then sends the packet. */ - err_t (* output)(struct netif *netif, struct pbuf *p, - struct ip_addr *ipaddr); - /** This function is called by the ARP module when it wants - * to send a packet on the interface. This function outputs - * the pbuf as-is on the link medium. */ - err_t (* linkoutput)(struct netif *netif, struct pbuf *p); - /** This field can be set by the device driver and could point - * to state information for the device. */ - void *state; -#if LWIP_DHCP - /** the DHCP client state information for this netif */ - struct dhcp *dhcp; -#endif - /** number of bytes used in hwaddr */ - u8_t hwaddr_len; - /** link level hardware address of this interface */ - u8_t hwaddr[NETIF_MAX_HWADDR_LEN]; - /** maximum transfer unit (in bytes) */ - u16_t mtu; - /** flags (see NETIF_FLAG_ above) */ - u8_t flags; - /** link type */ - u8_t link_type; - /** descriptive abbreviation */ - char name[2]; - /** number of this interface */ - u8_t num; -}; - -/** The list of network interfaces. */ -extern struct netif *netif_list; -/** The default network interface. */ -extern struct netif *netif_default; - -/* netif_init() must be called first. */ -void netif_init(void); - -struct netif *netif_add(struct netif *netif, struct ip_addr *ipaddr, struct ip_addr *netmask, - struct ip_addr *gw, - void *state, - err_t (* init)(struct netif *netif), - err_t (* input)(struct pbuf *p, struct netif *netif)); - -void -netif_set_addr(struct netif *netif,struct ip_addr *ipaddr, struct ip_addr *netmask, - struct ip_addr *gw); -void netif_remove(struct netif * netif); - -/* Returns a network interface given its name. The name is of the form - "et0", where the first two letters are the "name" field in the - netif structure, and the digit is in the num field in the same - structure. */ -struct netif *netif_find(char *name); - -void netif_set_default(struct netif *netif); - -void netif_set_ipaddr(struct netif *netif, struct ip_addr *ipaddr); -void netif_set_netmask(struct netif *netif, struct ip_addr *netmast); -void netif_set_gw(struct netif *netif, struct ip_addr *gw); -void netif_set_up(struct netif *netif); -void netif_set_down(struct netif *netif); -u8_t netif_is_up(struct netif *netif); - -#endif /* __LWIP_NETIF_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/opt.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/opt.h deleted file mode 100644 index 45636cb2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/opt.h +++ /dev/null @@ -1,671 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_OPT_H__ -#define __LWIP_OPT_H__ - -/* Include user defined options first */ -#include "lwipopts.h" -#include "lwip/debug.h" - -/* Define default values for unconfigured parameters. */ - -/* Platform specific locking */ - -/* - * enable SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection - * for certain critical regions during buffer allocation, deallocation and memory - * allocation and deallocation. - */ -#ifndef SYS_LIGHTWEIGHT_PROT -#define SYS_LIGHTWEIGHT_PROT 0 -#endif - -#ifndef NO_SYS -#define NO_SYS 0 -#endif -/* ---------- Memory options ---------- */ -/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which - lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2 - byte alignment -> define MEM_ALIGNMENT to 2. */ - -#ifndef MEM_ALIGNMENT -#define MEM_ALIGNMENT 1 -#endif - -/* MEM_SIZE: the size of the heap memory. If the application will send -a lot of data that needs to be copied, this should be set high. */ -#ifndef MEM_SIZE -#define MEM_SIZE 1600 -#endif - -#ifndef MEMP_SANITY_CHECK -#define MEMP_SANITY_CHECK 0 -#endif - -/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application - sends a lot of data out of ROM (or other static memory), this - should be set high. */ -#ifndef MEMP_NUM_PBUF -#define MEMP_NUM_PBUF 16 -#endif - -/* Number of raw connection PCBs */ -#ifndef MEMP_NUM_RAW_PCB -#define MEMP_NUM_RAW_PCB 4 -#endif - -/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One - per active UDP "connection". */ -#ifndef MEMP_NUM_UDP_PCB -#define MEMP_NUM_UDP_PCB 4 -#endif -/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP - connections. */ -#ifndef MEMP_NUM_TCP_PCB -#define MEMP_NUM_TCP_PCB 5 -#endif -/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP - connections. */ -#ifndef MEMP_NUM_TCP_PCB_LISTEN -#define MEMP_NUM_TCP_PCB_LISTEN 8 -#endif -/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP - segments. */ -#ifndef MEMP_NUM_TCP_SEG -#define MEMP_NUM_TCP_SEG 16 -#endif -/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active - timeouts. */ -#ifndef MEMP_NUM_SYS_TIMEOUT -#define MEMP_NUM_SYS_TIMEOUT 3 -#endif - -/* The following four are used only with the sequential API and can be - set to 0 if the application only will use the raw API. */ -/* MEMP_NUM_NETBUF: the number of struct netbufs. */ -#ifndef MEMP_NUM_NETBUF -#define MEMP_NUM_NETBUF 2 -#endif -/* MEMP_NUM_NETCONN: the number of struct netconns. */ -#ifndef MEMP_NUM_NETCONN -#define MEMP_NUM_NETCONN 4 -#endif -/* MEMP_NUM_APIMSG: the number of struct api_msg, used for - communication between the TCP/IP stack and the sequential - programs. */ -#ifndef MEMP_NUM_API_MSG -#define MEMP_NUM_API_MSG 8 -#endif -/* MEMP_NUM_TCPIPMSG: the number of struct tcpip_msg, which is used - for sequential API communication and incoming packets. Used in - src/api/tcpip.c. */ -#ifndef MEMP_NUM_TCPIP_MSG -#define MEMP_NUM_TCPIP_MSG 8 -#endif - -/* ---------- Pbuf options ---------- */ -/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */ - -#ifndef PBUF_POOL_SIZE -#define PBUF_POOL_SIZE 16 -#endif - -/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */ - -#ifndef PBUF_POOL_BUFSIZE -#define PBUF_POOL_BUFSIZE 128 -#endif - -/* PBUF_LINK_HLEN: the number of bytes that should be allocated for a - link level header. Defaults to 14 for Ethernet. */ - -#ifndef PBUF_LINK_HLEN -#define PBUF_LINK_HLEN 14 -#endif - - - -/* ---------- ARP options ---------- */ - -/** Number of active hardware address, IP address pairs cached */ -#ifndef ARP_TABLE_SIZE -#define ARP_TABLE_SIZE 10 -#endif - -/** - * If enabled, outgoing packets are queued during hardware address - * resolution. - * - * This feature has not stabilized yet. Single-packet queueing is - * believed to be stable, multi-packet queueing is believed to - * clash with the TCP segment queueing. - * - * As multi-packet-queueing is currently disabled, enabling this - * _should_ work, but we need your testing feedback on lwip-users. - * - */ -#ifndef ARP_QUEUEING -#define ARP_QUEUEING 1 -#endif - -/* This option is deprecated */ -#ifdef ETHARP_QUEUE_FIRST -#error ETHARP_QUEUE_FIRST option is deprecated. Remove it from your lwipopts.h. -#endif - -/* This option is removed to comply with the ARP standard */ -#ifdef ETHARP_ALWAYS_INSERT -#error ETHARP_ALWAYS_INSERT option is deprecated. Remove it from your lwipopts.h. -#endif - -/* ---------- IP options ---------- */ -/* Define IP_FORWARD to 1 if you wish to have the ability to forward - IP packets across network interfaces. If you are going to run lwIP - on a device with only one network interface, define this to 0. */ -#ifndef IP_FORWARD -#define IP_FORWARD 0 -#endif - -/* If defined to 1, IP options are allowed (but not parsed). If - defined to 0, all packets with IP options are dropped. */ -#ifndef IP_OPTIONS -#define IP_OPTIONS 1 -#endif - -/** IP reassembly and segmentation. Even if they both deal with IP - * fragments, note that these are orthogonal, one dealing with incoming - * packets, the other with outgoing packets - */ - -/** Reassemble incoming fragmented IP packets */ -#ifndef IP_REASSEMBLY -#define IP_REASSEMBLY 1 -#endif - -/** Fragment outgoing IP packets if their size exceeds MTU */ -#ifndef IP_FRAG -#define IP_FRAG 1 -#endif - -/* ---------- ICMP options ---------- */ - -#ifndef ICMP_TTL -#define ICMP_TTL 255 -#endif - -/* ---------- RAW options ---------- */ - -#ifndef LWIP_RAW -#define LWIP_RAW 1 -#endif - -#ifndef RAW_TTL -#define RAW_TTL 255 -#endif - -/* ---------- DHCP options ---------- */ - -#ifndef LWIP_DHCP -#define LWIP_DHCP 0 -#endif - -/* 1 if you want to do an ARP check on the offered address - (recommended). */ -#ifndef DHCP_DOES_ARP_CHECK -#define DHCP_DOES_ARP_CHECK 1 -#endif - -/* ---------- UDP options ---------- */ -#ifndef LWIP_UDP -#define LWIP_UDP 1 -#endif - -#ifndef UDP_TTL -#define UDP_TTL 255 -#endif - -/* ---------- TCP options ---------- */ -#ifndef LWIP_TCP -#define LWIP_TCP 1 -#endif - -#ifndef TCP_TTL -#define TCP_TTL 255 -#endif - -#ifndef TCP_WND -#define TCP_WND 2048 -#endif - -#ifndef TCP_MAXRTX -#define TCP_MAXRTX 12 -#endif - -#ifndef TCP_SYNMAXRTX -#define TCP_SYNMAXRTX 6 -#endif - - -/* Controls if TCP should queue segments that arrive out of - order. Define to 0 if your device is low on memory. */ -#ifndef TCP_QUEUE_OOSEQ -#define TCP_QUEUE_OOSEQ 1 -#endif - -/* TCP Maximum segment size. */ -#ifndef TCP_MSS -#define TCP_MSS 128 /* A *very* conservative default. */ -#endif - -/* TCP sender buffer space (bytes). */ -#ifndef TCP_SND_BUF -#define TCP_SND_BUF 256 -#endif - -/* TCP sender buffer space (pbufs). This must be at least = 2 * - TCP_SND_BUF/TCP_MSS for things to work. */ -#ifndef TCP_SND_QUEUELEN -#define TCP_SND_QUEUELEN 4 * TCP_SND_BUF/TCP_MSS -#endif - - -/* Maximum number of retransmissions of data segments. */ - -/* Maximum number of retransmissions of SYN segments. */ - -/* TCP writable space (bytes). This must be less than or equal - to TCP_SND_BUF. It is the amount of space which must be - available in the tcp snd_buf for select to return writable */ -#ifndef TCP_SNDLOWAT -#define TCP_SNDLOWAT TCP_SND_BUF/2 -#endif - -/* Support loop interface (127.0.0.1) */ -#ifndef LWIP_HAVE_LOOPIF -#define LWIP_HAVE_LOOPIF 0 -#endif - -#ifndef LWIP_EVENT_API -#define LWIP_EVENT_API 0 -#define LWIP_CALLBACK_API 1 -#else -#define LWIP_EVENT_API 1 -#define LWIP_CALLBACK_API 0 -#endif - -#ifndef LWIP_COMPAT_SOCKETS -#define LWIP_COMPAT_SOCKETS 1 -#endif - - -#ifndef TCPIP_THREAD_PRIO -#define TCPIP_THREAD_PRIO 1 -#endif - -#ifndef SLIPIF_THREAD_PRIO -#define SLIPIF_THREAD_PRIO 1 -#endif - -#ifndef PPP_THREAD_PRIO -#define PPP_THREAD_PRIO 1 -#endif - -#ifndef DEFAULT_THREAD_PRIO -#define DEFAULT_THREAD_PRIO 1 -#endif - - -/* ---------- Socket Options ---------- */ -/* Enable SO_REUSEADDR and SO_REUSEPORT options */ -#ifdef SO_REUSE -/* I removed the lot since this was an ugly hack. It broke the raw-API. - It also came with many ugly goto's, Christiaan Simons. */ -#error "SO_REUSE currently unavailable, this was a hack" -#endif - - -/* ---------- Statistics options ---------- */ -#ifndef LWIP_STATS -#define LWIP_STATS 1 -#endif - -#if LWIP_STATS - -#ifndef LWIP_STATS_DISPLAY -#define LWIP_STATS_DISPLAY 0 -#endif - -#ifndef LINK_STATS -#define LINK_STATS 1 -#endif - -#ifndef IP_STATS -#define IP_STATS 1 -#endif - -#ifndef IPFRAG_STATS -#define IPFRAG_STATS 1 -#endif - -#ifndef ICMP_STATS -#define ICMP_STATS 1 -#endif - -#ifndef UDP_STATS -#define UDP_STATS 1 -#endif - -#ifndef TCP_STATS -#define TCP_STATS 1 -#endif - -#ifndef MEM_STATS -#define MEM_STATS 1 -#endif - -#ifndef MEMP_STATS -#define MEMP_STATS 1 -#endif - -#ifndef PBUF_STATS -#define PBUF_STATS 1 -#endif - -#ifndef SYS_STATS -#define SYS_STATS 1 -#endif - -#ifndef RAW_STATS -#define RAW_STATS 0 -#endif - -#else - -#define LINK_STATS 0 -#define IP_STATS 0 -#define IPFRAG_STATS 0 -#define ICMP_STATS 0 -#define UDP_STATS 0 -#define TCP_STATS 0 -#define MEM_STATS 0 -#define MEMP_STATS 0 -#define PBUF_STATS 0 -#define SYS_STATS 0 -#define RAW_STATS 0 -#define LWIP_STATS_DISPLAY 0 - -#endif /* LWIP_STATS */ - -/* ---------- PPP options ---------- */ - -#ifndef PPP_SUPPORT -#define PPP_SUPPORT 0 /* Set for PPP */ -#endif - -#if PPP_SUPPORT - -#define NUM_PPP 1 /* Max PPP sessions. */ - - - -#ifndef PAP_SUPPORT -#define PAP_SUPPORT 0 /* Set for PAP. */ -#endif - -#ifndef CHAP_SUPPORT -#define CHAP_SUPPORT 0 /* Set for CHAP. */ -#endif - -#define MSCHAP_SUPPORT 0 /* Set for MSCHAP (NOT FUNCTIONAL!) */ -#define CBCP_SUPPORT 0 /* Set for CBCP (NOT FUNCTIONAL!) */ -#define CCP_SUPPORT 0 /* Set for CCP (NOT FUNCTIONAL!) */ - -#ifndef VJ_SUPPORT -#define VJ_SUPPORT 0 /* Set for VJ header compression. */ -#endif - -#ifndef MD5_SUPPORT -#define MD5_SUPPORT 0 /* Set for MD5 (see also CHAP) */ -#endif - - -/* - * Timeouts. - */ -#define FSM_DEFTIMEOUT 6 /* Timeout time in seconds */ -#define FSM_DEFMAXTERMREQS 2 /* Maximum Terminate-Request transmissions */ -#define FSM_DEFMAXCONFREQS 10 /* Maximum Configure-Request transmissions */ -#define FSM_DEFMAXNAKLOOPS 5 /* Maximum number of nak loops */ - -#define UPAP_DEFTIMEOUT 6 /* Timeout (seconds) for retransmitting req */ -#define UPAP_DEFREQTIME 30 /* Time to wait for auth-req from peer */ - -#define CHAP_DEFTIMEOUT 6 /* Timeout time in seconds */ -#define CHAP_DEFTRANSMITS 10 /* max # times to send challenge */ - - -/* Interval in seconds between keepalive echo requests, 0 to disable. */ -#if 1 -#define LCP_ECHOINTERVAL 0 -#else -#define LCP_ECHOINTERVAL 10 -#endif - -/* Number of unanswered echo requests before failure. */ -#define LCP_MAXECHOFAILS 3 - -/* Max Xmit idle time (in jiffies) before resend flag char. */ -#define PPP_MAXIDLEFLAG 100 - -/* - * Packet sizes - * - * Note - lcp shouldn't be allowed to negotiate stuff outside these - * limits. See lcp.h in the pppd directory. - * (XXX - these constants should simply be shared by lcp.c instead - * of living in lcp.h) - */ -#define PPP_MTU 1500 /* Default MTU (size of Info field) */ -#if 0 -#define PPP_MAXMTU 65535 - (PPP_HDRLEN + PPP_FCSLEN) -#else -#define PPP_MAXMTU 1500 /* Largest MTU we allow */ -#endif -#define PPP_MINMTU 64 -#define PPP_MRU 1500 /* default MRU = max length of info field */ -#define PPP_MAXMRU 1500 /* Largest MRU we allow */ -#define PPP_DEFMRU 296 /* Try for this */ -#define PPP_MINMRU 128 /* No MRUs below this */ - - -#define MAXNAMELEN 256 /* max length of hostname or name for auth */ -#define MAXSECRETLEN 256 /* max length of password or secret */ - -#endif /* PPP_SUPPORT */ - -/* checksum options - set to zero for hardware checksum support */ - -#ifndef CHECKSUM_GEN_IP -#define CHECKSUM_GEN_IP 1 -#endif - -#ifndef CHECKSUM_GEN_UDP -#define CHECKSUM_GEN_UDP 1 -#endif - -#ifndef CHECKSUM_GEN_TCP -#define CHECKSUM_GEN_TCP 1 -#endif - -#ifndef CHECKSUM_CHECK_IP -#define CHECKSUM_CHECK_IP 1 -#endif - -#ifndef CHECKSUM_CHECK_UDP -#define CHECKSUM_CHECK_UDP 1 -#endif - -#ifndef CHECKSUM_CHECK_TCP -#define CHECKSUM_CHECK_TCP 1 -#endif - -/* Debugging options all default to off */ - -#ifndef DBG_TYPES_ON -#define DBG_TYPES_ON 0 -#endif - -#ifndef ETHARP_DEBUG -#define ETHARP_DEBUG DBG_OFF -#endif - -#ifndef NETIF_DEBUG -#define NETIF_DEBUG DBG_OFF -#endif - -#ifndef PBUF_DEBUG -#define PBUF_DEBUG DBG_OFF -#endif - -#ifndef API_LIB_DEBUG -#define API_LIB_DEBUG DBG_OFF -#endif - -#ifndef API_MSG_DEBUG -#define API_MSG_DEBUG DBG_OFF -#endif - -#ifndef SOCKETS_DEBUG -#define SOCKETS_DEBUG DBG_OFF -#endif - -#ifndef ICMP_DEBUG -#define ICMP_DEBUG DBG_OFF -#endif - -#ifndef INET_DEBUG -#define INET_DEBUG DBG_OFF -#endif - -#ifndef IP_DEBUG -#define IP_DEBUG DBG_OFF -#endif - -#ifndef IP_REASS_DEBUG -#define IP_REASS_DEBUG DBG_OFF -#endif - -#ifndef RAW_DEBUG -#define RAW_DEBUG DBG_OFF -#endif - -#ifndef MEM_DEBUG -#define MEM_DEBUG DBG_OFF -#endif - -#ifndef MEMP_DEBUG -#define MEMP_DEBUG DBG_OFF -#endif - -#ifndef SYS_DEBUG -#define SYS_DEBUG DBG_OFF -#endif - -#ifndef TCP_DEBUG -#define TCP_DEBUG DBG_OFF -#endif - -#ifndef TCP_INPUT_DEBUG -#define TCP_INPUT_DEBUG DBG_OFF -#endif - -#ifndef TCP_FR_DEBUG -#define TCP_FR_DEBUG DBG_OFF -#endif - -#ifndef TCP_RTO_DEBUG -#define TCP_RTO_DEBUG DBG_OFF -#endif - -#ifndef TCP_REXMIT_DEBUG -#define TCP_REXMIT_DEBUG DBG_OFF -#endif - -#ifndef TCP_CWND_DEBUG -#define TCP_CWND_DEBUG DBG_OFF -#endif - -#ifndef TCP_WND_DEBUG -#define TCP_WND_DEBUG DBG_OFF -#endif - -#ifndef TCP_OUTPUT_DEBUG -#define TCP_OUTPUT_DEBUG DBG_OFF -#endif - -#ifndef TCP_RST_DEBUG -#define TCP_RST_DEBUG DBG_OFF -#endif - -#ifndef TCP_QLEN_DEBUG -#define TCP_QLEN_DEBUG DBG_OFF -#endif - -#ifndef UDP_DEBUG -#define UDP_DEBUG DBG_OFF -#endif - -#ifndef TCPIP_DEBUG -#define TCPIP_DEBUG DBG_OFF -#endif - -#ifndef PPP_DEBUG -#define PPP_DEBUG DBG_OFF -#endif - -#ifndef SLIP_DEBUG -#define SLIP_DEBUG DBG_OFF -#endif - -#ifndef DHCP_DEBUG -#define DHCP_DEBUG DBG_OFF -#endif - - -#ifndef DBG_MIN_LEVEL -#define DBG_MIN_LEVEL DBG_LEVEL_OFF -#endif - -#endif /* __LWIP_OPT_H__ */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/pbuf.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/pbuf.h deleted file mode 100644 index 546aa303..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/pbuf.h +++ /dev/null @@ -1,113 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#ifndef __LWIP_PBUF_H__ -#define __LWIP_PBUF_H__ - -#include "arch/cc.h" - - -#define PBUF_TRANSPORT_HLEN 20 -#define PBUF_IP_HLEN 20 - -typedef enum { - PBUF_TRANSPORT, - PBUF_IP, - PBUF_LINK, - PBUF_RAW -} pbuf_layer; - -typedef enum { - PBUF_RAM, - PBUF_ROM, - PBUF_REF, - PBUF_POOL -} pbuf_flag; - -/* Definitions for the pbuf flag field. These are NOT the flags that - * are passed to pbuf_alloc(). */ -#define PBUF_FLAG_RAM 0x00U /* Flags that pbuf data is stored in RAM */ -#define PBUF_FLAG_ROM 0x01U /* Flags that pbuf data is stored in ROM */ -#define PBUF_FLAG_POOL 0x02U /* Flags that the pbuf comes from the pbuf pool */ -#define PBUF_FLAG_REF 0x04U /* Flags thet the pbuf payload refers to RAM */ - -/** indicates this packet was broadcast on the link */ -#define PBUF_FLAG_LINK_BROADCAST 0x80U - -struct pbuf { - /** next pbuf in singly linked pbuf chain */ - struct pbuf *next; - - /** pointer to the actual data in the buffer */ - void *payload; - - /** - * total length of this buffer and all next buffers in chain - * belonging to the same packet. - * - * For non-queue packet chains this is the invariant: - * p->tot_len == p->len + (p->next? p->next->tot_len: 0) - */ - u16_t tot_len; - - /** length of this buffer */ - u16_t len; - - /** flags telling the type of pbuf, see PBUF_FLAG_ */ - u16_t flags; - - /** - * the reference count always equals the number of pointers - * that refer to this pbuf. This can be pointers from an application, - * the stack itself, or pbuf->next pointers from a chain. - */ - u16_t ref; - -}; - -void pbuf_init(void); - -struct pbuf *pbuf_alloc(pbuf_layer l, u16_t size, pbuf_flag flag); -void pbuf_realloc(struct pbuf *p, u16_t size); -u8_t pbuf_header(struct pbuf *p, s16_t header_size); -void pbuf_ref(struct pbuf *p); -void pbuf_ref_chain(struct pbuf *p); -u8_t pbuf_free(struct pbuf *p); -u8_t pbuf_clen(struct pbuf *p); -void pbuf_cat(struct pbuf *h, struct pbuf *t); -void pbuf_chain(struct pbuf *h, struct pbuf *t); -struct pbuf *pbuf_take(struct pbuf *f); -struct pbuf *pbuf_dechain(struct pbuf *p); -void pbuf_queue(struct pbuf *p, struct pbuf *n); -struct pbuf * pbuf_dequeue(struct pbuf *p); - -#endif /* __LWIP_PBUF_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/raw.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/raw.h deleted file mode 100644 index 6f7a9871..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/raw.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_RAW_H__ -#define __LWIP_RAW_H__ - -#include "lwip/arch.h" - -#include "lwip/pbuf.h" -#include "lwip/inet.h" -#include "lwip/ip.h" - -struct raw_pcb { -/* Common members of all PCB types */ - IP_PCB; - - struct raw_pcb *next; - - u16_t protocol; - - u8_t (* recv)(void *arg, struct raw_pcb *pcb, struct pbuf *p, - struct ip_addr *addr); - void *recv_arg; -}; - -/* The following functions is the application layer interface to the - RAW code. */ -struct raw_pcb * raw_new (u16_t proto); -void raw_remove (struct raw_pcb *pcb); -err_t raw_bind (struct raw_pcb *pcb, struct ip_addr *ipaddr); -err_t raw_connect (struct raw_pcb *pcb, struct ip_addr *ipaddr); - -void raw_recv (struct raw_pcb *pcb, - u8_t (* recv)(void *arg, struct raw_pcb *pcb, - struct pbuf *p, - struct ip_addr *addr), - void *recv_arg); -err_t raw_sendto (struct raw_pcb *pcb, struct pbuf *p, struct ip_addr *ipaddr); -err_t raw_send (struct raw_pcb *pcb, struct pbuf *p); - -/* The following functions are the lower layer interface to RAW. */ -u8_t raw_input (struct pbuf *p, struct netif *inp); -void raw_init (void); - - -#endif /* __LWIP_RAW_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/sio.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/sio.h deleted file mode 100644 index 8a37aa35..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/sio.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - */ - -/* - * This is the interface to the platform specific serial IO module - * It needs to be implemented by those platforms which need SLIP or PPP - */ - -#include "arch/cc.h" - -#ifndef __sio_fd_t_defined -typedef void * sio_fd_t; -#endif - -#ifndef sio_open -sio_fd_t sio_open(u8_t); -#endif - -#ifndef sio_send -void sio_send(u8_t, sio_fd_t); -#endif - -#ifndef sio_recv -u8_t sio_recv(sio_fd_t); -#endif - -#ifndef sio_read -u32_t sio_read(sio_fd_t, u8_t *, u32_t); -#endif - -#ifndef sio_write -u32_t sio_write(sio_fd_t, u8_t *, u32_t); -#endif - -#ifndef sio_read_abort -void sio_read_abort(sio_fd_t); -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/snmp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/snmp.h deleted file mode 100644 index 7d160aaa..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/snmp.h +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (c) 2001, 2002 Leon Woestenberg - * Copyright (c) 2001, 2002 Axon Digital Design B.V., The Netherlands. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Leon Woestenberg - * - */ -#ifndef __LWIP_SNMP_H__ -#define __LWIP_SNMP_H__ - -#include "lwip/opt.h" - -/* SNMP support available? */ -#if defined(LWIP_SNMP) && (LWIP_SNMP > 0) - -/* network interface */ -void snmp_add_ifinoctets(unsigned long value); -void snmp_inc_ifinucastpkts(void); -void snmp_inc_ifinnucastpkts(void); -void snmp_inc_ifindiscards(void); -void snmp_add_ifoutoctets(unsigned long value); -void snmp_inc_ifoutucastpkts(void); -void snmp_inc_ifoutnucastpkts(void); -void snmp_inc_ifoutdiscards(void); - -/* IP */ -void snmp_inc_ipinreceives(void); -void snmp_inc_ipindelivers(void); -void snmp_inc_ipindiscards(void); -void snmp_inc_ipoutdiscards(void); -void snmp_inc_ipoutrequests(void); -void snmp_inc_ipunknownprotos(void); -void snmp_inc_ipnoroutes(void); -void snmp_inc_ipforwdatagrams(void); - -/* ICMP */ -void snmp_inc_icmpinmsgs(void); -void snmp_inc_icmpinerrors(void); -void snmp_inc_icmpindestunreachs(void); -void snmp_inc_icmpintimeexcds(void); -void snmp_inc_icmpinparmprobs(void); -void snmp_inc_icmpinsrcquenchs(void); -void snmp_inc_icmpinredirects(void); -void snmp_inc_icmpinechos(void); -void snmp_inc_icmpinechoreps(void); -void snmp_inc_icmpintimestamps(void); -void snmp_inc_icmpintimestampreps(void); -void snmp_inc_icmpinaddrmasks(void); -void snmp_inc_icmpinaddrmaskreps(void); -void snmp_inc_icmpoutmsgs(void); -void snmp_inc_icmpouterrors(void); -void snmp_inc_icmpoutdestunreachs(void); -void snmp_inc_icmpouttimeexcds(void); -void snmp_inc_icmpoutparmprobs(void); -void snmp_inc_icmpoutsrcquenchs(void); -void snmp_inc_icmpoutredirects(void); -void snmp_inc_icmpoutechos(void); -void snmp_inc_icmpoutechoreps(void); -void snmp_inc_icmpouttimestamps(void); -void snmp_inc_icmpouttimestampreps(void); -void snmp_inc_icmpoutaddrmasks(void); -void snmp_inc_icmpoutaddrmaskreps(void); - -/* TCP */ -void snmp_inc_tcpactiveopens(void); -void snmp_inc_tcppassiveopens(void); -void snmp_inc_tcpattemptfails(void); -void snmp_inc_tcpestabresets(void); -void snmp_inc_tcpcurrestab(void); -void snmp_inc_tcpinsegs(void); -void snmp_inc_tcpoutsegs(void); -void snmp_inc_tcpretranssegs(void); -void snmp_inc_tcpinerrs(void); -void snmp_inc_tcpoutrsts(void); - -/* UDP */ -void snmp_inc_udpindatagrams(void); -void snmp_inc_udpnoports(void); -void snmp_inc_udpinerrors(void); -void snmp_inc_udpoutdatagrams(void); - -/* LWIP_SNMP support not available */ -/* define everything to be empty */ -#else - -/* network interface */ -#define snmp_add_ifinoctets(value) -#define snmp_inc_ifinucastpkts() -#define snmp_inc_ifinnucastpkts() -#define snmp_inc_ifindiscards() -#define snmp_add_ifoutoctets(value) -#define snmp_inc_ifoutucastpkts() -#define snmp_inc_ifoutnucastpkts() -#define snmp_inc_ifoutdiscards() - -/* IP */ -#define snmp_inc_ipinreceives() -#define snmp_inc_ipindelivers() -#define snmp_inc_ipindiscards() -#define snmp_inc_ipoutdiscards() -#define snmp_inc_ipoutrequests() -#define snmp_inc_ipunknownprotos() -#define snmp_inc_ipnoroutes() -#define snmp_inc_ipforwdatagrams() - -/* ICMP */ -#define snmp_inc_icmpinmsgs() -#define snmp_inc_icmpinerrors() -#define snmp_inc_icmpindestunreachs() -#define snmp_inc_icmpintimeexcds() -#define snmp_inc_icmpinparmprobs() -#define snmp_inc_icmpinsrcquenchs() -#define snmp_inc_icmpinredirects() -#define snmp_inc_icmpinechos() -#define snmp_inc_icmpinechoreps() -#define snmp_inc_icmpintimestamps() -#define snmp_inc_icmpintimestampreps() -#define snmp_inc_icmpinaddrmasks() -#define snmp_inc_icmpinaddrmaskreps() -#define snmp_inc_icmpoutmsgs() -#define snmp_inc_icmpouterrors() -#define snmp_inc_icmpoutdestunreachs() -#define snmp_inc_icmpouttimeexcds() -#define snmp_inc_icmpoutparmprobs() -#define snmp_inc_icmpoutsrcquenchs() -#define snmp_inc_icmpoutredirects() -#define snmp_inc_icmpoutechos() -#define snmp_inc_icmpoutechoreps() -#define snmp_inc_icmpouttimestamps() -#define snmp_inc_icmpouttimestampreps() -#define snmp_inc_icmpoutaddrmasks() -#define snmp_inc_icmpoutaddrmaskreps() -/* TCP */ -#define snmp_inc_tcpactiveopens() -#define snmp_inc_tcppassiveopens() -#define snmp_inc_tcpattemptfails() -#define snmp_inc_tcpestabresets() -#define snmp_inc_tcpcurrestab() -#define snmp_inc_tcpinsegs() -#define snmp_inc_tcpoutsegs() -#define snmp_inc_tcpretranssegs() -#define snmp_inc_tcpinerrs() -#define snmp_inc_tcpoutrsts() - -/* UDP */ -#define snmp_inc_udpindatagrams() -#define snmp_inc_udpnoports() -#define snmp_inc_udpinerrors() -#define snmp_inc_udpoutdatagrams() - -#endif - -#endif /* __LWIP_SNMP_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/sockets.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/sockets.h deleted file mode 100644 index d5f8ccf7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/sockets.h +++ /dev/null @@ -1,271 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - - -#ifndef __LWIP_SOCKETS_H__ -#define __LWIP_SOCKETS_H__ -#include "lwip/ip_addr.h" - -struct sockaddr_in { - u8_t sin_len; - u8_t sin_family; - u16_t sin_port; - struct in_addr sin_addr; - char sin_zero[8]; -}; - -struct sockaddr { - u8_t sa_len; - u8_t sa_family; - char sa_data[14]; -}; - -#ifndef socklen_t -# define socklen_t int -#endif - - -#define SOCK_STREAM 1 -#define SOCK_DGRAM 2 -#define SOCK_RAW 3 - -/* - * Option flags per-socket. - */ -#define SO_DEBUG 0x0001 /* turn on debugging info recording */ -#define SO_ACCEPTCONN 0x0002 /* socket has had listen() */ -#define SO_REUSEADDR 0x0004 /* allow local address reuse */ -#define SO_KEEPALIVE 0x0008 /* keep connections alive */ -#define SO_DONTROUTE 0x0010 /* just use interface addresses */ -#define SO_BROADCAST 0x0020 /* permit sending of broadcast msgs */ -#define SO_USELOOPBACK 0x0040 /* bypass hardware when possible */ -#define SO_LINGER 0x0080 /* linger on close if data present */ -#define SO_OOBINLINE 0x0100 /* leave received OOB data in line */ -#define SO_REUSEPORT 0x0200 /* allow local address & port reuse */ - -#define SO_DONTLINGER (int)(~SO_LINGER) - -/* - * Additional options, not kept in so_options. - */ -#define SO_SNDBUF 0x1001 /* send buffer size */ -#define SO_RCVBUF 0x1002 /* receive buffer size */ -#define SO_SNDLOWAT 0x1003 /* send low-water mark */ -#define SO_RCVLOWAT 0x1004 /* receive low-water mark */ -#define SO_SNDTIMEO 0x1005 /* send timeout */ -#define SO_RCVTIMEO 0x1006 /* receive timeout */ -#define SO_ERROR 0x1007 /* get error status and clear */ -#define SO_TYPE 0x1008 /* get socket type */ - - - -/* - * Structure used for manipulating linger option. - */ -struct linger { - int l_onoff; /* option on/off */ - int l_linger; /* linger time */ -}; - -/* - * Level number for (get/set)sockopt() to apply to socket itself. - */ -#define SOL_SOCKET 0xfff /* options for socket level */ - - -#define AF_UNSPEC 0 -#define AF_INET 2 -#define PF_INET AF_INET -#define PF_UNSPEC AF_UNSPEC - -#define IPPROTO_IP 0 -#define IPPROTO_TCP 6 -#define IPPROTO_UDP 17 - -#define INADDR_ANY 0 -#define INADDR_BROADCAST 0xffffffff - -/* Flags we can use with send and recv. */ -#define MSG_DONTWAIT 0x40 /* Nonblocking i/o for this operation only */ - - -/* - * Options for level IPPROTO_IP - */ -#define IP_TOS 1 -#define IP_TTL 2 - - -#define IPTOS_TOS_MASK 0x1E -#define IPTOS_TOS(tos) ((tos) & IPTOS_TOS_MASK) -#define IPTOS_LOWDELAY 0x10 -#define IPTOS_THROUGHPUT 0x08 -#define IPTOS_RELIABILITY 0x04 -#define IPTOS_LOWCOST 0x02 -#define IPTOS_MINCOST IPTOS_LOWCOST - -/* - * Definitions for IP precedence (also in ip_tos) (hopefully unused) - */ -#define IPTOS_PREC_MASK 0xe0 -#define IPTOS_PREC(tos) ((tos) & IPTOS_PREC_MASK) -#define IPTOS_PREC_NETCONTROL 0xe0 -#define IPTOS_PREC_INTERNETCONTROL 0xc0 -#define IPTOS_PREC_CRITIC_ECP 0xa0 -#define IPTOS_PREC_FLASHOVERRIDE 0x80 -#define IPTOS_PREC_FLASH 0x60 -#define IPTOS_PREC_IMMEDIATE 0x40 -#define IPTOS_PREC_PRIORITY 0x20 -#define IPTOS_PREC_ROUTINE 0x00 - - -/* - * Commands for ioctlsocket(), taken from the BSD file fcntl.h. - * - * - * Ioctl's have the command encoded in the lower word, - * and the size of any in or out parameters in the upper - * word. The high 2 bits of the upper word are used - * to encode the in/out status of the parameter; for now - * we restrict parameters to at most 128 bytes. - */ -#if !defined(FIONREAD) || !defined(FIONBIO) -#define IOCPARM_MASK 0x7f /* parameters must be < 128 bytes */ -#define IOC_VOID 0x20000000 /* no parameters */ -#define IOC_OUT 0x40000000 /* copy out parameters */ -#define IOC_IN 0x80000000 /* copy in parameters */ -#define IOC_INOUT (IOC_IN|IOC_OUT) - /* 0x20000000 distinguishes new & - old ioctl's */ -#define _IO(x,y) (IOC_VOID|((x)<<8)|(y)) - -#define _IOR(x,y,t) (IOC_OUT|(((long)sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)) - -#define _IOW(x,y,t) (IOC_IN|(((long)sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)) -#endif - -#ifndef FIONREAD -#define FIONREAD _IOR('f', 127, unsigned long) /* get # bytes to read */ -#endif -#ifndef FIONBIO -#define FIONBIO _IOW('f', 126, unsigned long) /* set/clear non-blocking i/o */ -#endif - -/* Socket I/O Controls */ -#ifndef SIOCSHIWAT -#define SIOCSHIWAT _IOW('s', 0, unsigned long) /* set high watermark */ -#define SIOCGHIWAT _IOR('s', 1, unsigned long) /* get high watermark */ -#define SIOCSLOWAT _IOW('s', 2, unsigned long) /* set low watermark */ -#define SIOCGLOWAT _IOR('s', 3, unsigned long) /* get low watermark */ -#define SIOCATMARK _IOR('s', 7, unsigned long) /* at oob mark? */ -#endif - -#ifndef O_NONBLOCK -#define O_NONBLOCK 04000U -#endif - -#ifndef FD_SET - #undef FD_SETSIZE - #define FD_SETSIZE 16 - #define FD_SET(n, p) ((p)->fd_bits[(n)/8] |= (1 << ((n) & 7))) - #define FD_CLR(n, p) ((p)->fd_bits[(n)/8] &= ~(1 << ((n) & 7))) - #define FD_ISSET(n,p) ((p)->fd_bits[(n)/8] & (1 << ((n) & 7))) - #define FD_ZERO(p) memset((void*)(p),0,sizeof(*(p))) - - typedef struct fd_set { - unsigned char fd_bits [(FD_SETSIZE+7)/8]; - } fd_set; - -/* - * only define this in sockets.c so it does not interfere - * with other projects namespaces where timeval is present - */ -#ifndef LWIP_TIMEVAL_PRIVATE -#define LWIP_TIMEVAL_PRIVATE 1 -#endif - -#if LWIP_TIMEVAL_PRIVATE - struct timeval { - long tv_sec; /* seconds */ - long tv_usec; /* and microseconds */ - }; -#endif - -#endif - -int lwip_accept(int s, struct sockaddr *addr, socklen_t *addrlen); -int lwip_bind(int s, struct sockaddr *name, socklen_t namelen); -int lwip_shutdown(int s, int how); -int lwip_getpeername (int s, struct sockaddr *name, socklen_t *namelen); -int lwip_getsockname (int s, struct sockaddr *name, socklen_t *namelen); -int lwip_getsockopt (int s, int level, int optname, void *optval, socklen_t *optlen); -int lwip_setsockopt (int s, int level, int optname, const void *optval, socklen_t optlen); -int lwip_close(int s); -int lwip_connect(int s, struct sockaddr *name, socklen_t namelen); -int lwip_listen(int s, int backlog); -int lwip_recv(int s, void *mem, int len, unsigned int flags); -int lwip_read(int s, void *mem, int len); -int lwip_recvfrom(int s, void *mem, int len, unsigned int flags, - struct sockaddr *from, socklen_t *fromlen); -int lwip_send(int s, void *dataptr, int size, unsigned int flags); -int lwip_sendto(int s, void *dataptr, int size, unsigned int flags, - struct sockaddr *to, socklen_t tolen); -int lwip_socket(int domain, int type, int protocol); -int lwip_write(int s, void *dataptr, int size); -int lwip_select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset, - struct timeval *timeout); -int lwip_ioctl(int s, long cmd, void *argp); - -#if LWIP_COMPAT_SOCKETS -#define accept(a,b,c) lwip_accept(a,b,c) -#define bind(a,b,c) lwip_bind(a,b,c) -#define shutdown(a,b) lwip_shutdown(a,b) -#define close(s) lwip_close(s) -#define connect(a,b,c) lwip_connect(a,b,c) -#define getsockname(a,b,c) lwip_getsockname(a,b,c) -#define getpeername(a,b,c) lwip_getpeername(a,b,c) -#define setsockopt(a,b,c,d,e) lwip_setsockopt(a,b,c,d,e) -#define getsockopt(a,b,c,d,e) lwip_getsockopt(a,b,c,d,e) -#define listen(a,b) lwip_listen(a,b) -#define recv(a,b,c,d) lwip_recv(a,b,c,d) -#define read(a,b,c) lwip_read(a,b,c) -#define recvfrom(a,b,c,d,e,f) lwip_recvfrom(a,b,c,d,e,f) -#define send(a,b,c,d) lwip_send(a,b,c,d) -#define sendto(a,b,c,d,e,f) lwip_sendto(a,b,c,d,e,f) -#define socket(a,b,c) lwip_socket(a,b,c) -#define write(a,b,c) lwip_write(a,b,c) -#define select(a,b,c,d,e) lwip_select(a,b,c,d,e) -#define ioctlsocket(a,b,c) lwip_ioctl(a,b,c) -#endif /* LWIP_COMPAT_SOCKETS */ - -#endif /* __LWIP_SOCKETS_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/stats.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/stats.h deleted file mode 100644 index 71acfd06..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/stats.h +++ /dev/null @@ -1,158 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_STATS_H__ -#define __LWIP_STATS_H__ - -#include "lwip/opt.h" -#include "arch/cc.h" - -#include "lwip/mem.h" -#include "lwip/memp.h" - -#if LWIP_STATS - -struct stats_proto { - u16_t xmit; /* Transmitted packets. */ - u16_t rexmit; /* Retransmitted packets. */ - u16_t recv; /* Received packets. */ - u16_t fw; /* Forwarded packets. */ - u16_t drop; /* Dropped packets. */ - u16_t chkerr; /* Checksum error. */ - u16_t lenerr; /* Invalid length error. */ - u16_t memerr; /* Out of memory error. */ - u16_t rterr; /* Routing error. */ - u16_t proterr; /* Protocol error. */ - u16_t opterr; /* Error in options. */ - u16_t err; /* Misc error. */ - u16_t cachehit; -}; - -struct stats_mem { - mem_size_t avail; - mem_size_t used; - mem_size_t max; - mem_size_t err; -}; - -struct stats_pbuf { - u16_t avail; - u16_t used; - u16_t max; - u16_t err; - - u16_t alloc_locked; - u16_t refresh_locked; -}; - -struct stats_syselem { - u16_t used; - u16_t max; - u16_t err; -}; - -struct stats_sys { - struct stats_syselem sem; - struct stats_syselem mbox; -}; - -struct stats_ { - struct stats_proto link; - struct stats_proto ip_frag; - struct stats_proto ip; - struct stats_proto icmp; - struct stats_proto udp; - struct stats_proto tcp; - struct stats_pbuf pbuf; - struct stats_mem mem; - struct stats_mem memp[MEMP_MAX]; - struct stats_sys sys; -}; - -extern struct stats_ lwip_stats; - - -void stats_init(void); - -#define STATS_INC(x) ++lwip_stats.x -#else -#define stats_init() -#define STATS_INC(x) -#endif /* LWIP_STATS */ - -#if TCP_STATS -#define TCP_STATS_INC(x) STATS_INC(x) -#else -#define TCP_STATS_INC(x) -#endif - -#if UDP_STATS -#define UDP_STATS_INC(x) STATS_INC(x) -#else -#define UDP_STATS_INC(x) -#endif - -#if ICMP_STATS -#define ICMP_STATS_INC(x) STATS_INC(x) -#else -#define ICMP_STATS_INC(x) -#endif - -#if IP_STATS -#define IP_STATS_INC(x) STATS_INC(x) -#else -#define IP_STATS_INC(x) -#endif - -#if IPFRAG_STATS -#define IPFRAG_STATS_INC(x) STATS_INC(x) -#else -#define IPFRAG_STATS_INC(x) -#endif - -#if LINK_STATS -#define LINK_STATS_INC(x) STATS_INC(x) -#else -#define LINK_STATS_INC(x) -#endif - -/* Display of statistics */ -#if LWIP_STATS_DISPLAY -void stats_display(void); -#else -#define stats_display() -#endif - -#endif /* __LWIP_STATS_H__ */ - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/sys.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/sys.h deleted file mode 100644 index 68926e95..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/sys.h +++ /dev/null @@ -1,183 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_SYS_H__ -#define __LWIP_SYS_H__ - -#include "arch/cc.h" - -#include "lwip/opt.h" - - -#if NO_SYS - -/* For a totally minimal and standalone system, we provide null - definitions of the sys_ functions. */ -typedef u8_t sys_sem_t; -typedef u8_t sys_mbox_t; -struct sys_timeout {u8_t dummy;}; - -#define sys_init() -#define sys_timeout(m,h,a) -#define sys_untimeout(m,a) -#define sys_sem_new(c) c -#define sys_sem_signal(s) -#define sys_sem_wait(s) -#define sys_sem_free(s) -#define sys_mbox_new() 0 -#define sys_mbox_fetch(m,d) -#define sys_mbox_post(m,d) -#define sys_mbox_free(m) - -#define sys_thread_new(t,a,p) - -#else /* NO_SYS */ - -#include "arch/sys_arch.h" - -/** Return code for timeouts from sys_arch_mbox_fetch and sys_arch_sem_wait */ -#define SYS_ARCH_TIMEOUT 0xffffffff - -typedef void (* sys_timeout_handler)(void *arg); - -struct sys_timeout { - struct sys_timeout *next; - u32_t time; - sys_timeout_handler h; - void *arg; -}; - -struct sys_timeouts { - struct sys_timeout *next; -}; - -/* sys_init() must be called before anthing else. */ -void sys_init(void); - -/* - * sys_timeout(): - * - * Schedule a timeout a specified amount of milliseconds in the - * future. When the timeout occurs, the specified timeout handler will - * be called. The handler will be passed the "arg" argument when - * called. - * - */ -void sys_timeout(u32_t msecs, sys_timeout_handler h, void *arg); -void sys_untimeout(sys_timeout_handler h, void *arg); -struct sys_timeouts *sys_arch_timeouts(void); - -/* Semaphore functions. */ -sys_sem_t sys_sem_new(u8_t count); -void sys_sem_signal(sys_sem_t sem); -u32_t sys_arch_sem_wait(sys_sem_t sem, u32_t timeout); -void sys_sem_free(sys_sem_t sem); -void sys_sem_wait(sys_sem_t sem); -int sys_sem_wait_timeout(sys_sem_t sem, u32_t timeout); - -/* Time functions. */ -#ifndef sys_msleep -void sys_msleep(u32_t ms); /* only has a (close to) 1 jiffy resolution. */ -#endif -#ifndef sys_jiffies -u32_t sys_jiffies(void); /* since power up. */ -#endif - -/* Mailbox functions. */ -sys_mbox_t sys_mbox_new(void); -void sys_mbox_post(sys_mbox_t mbox, void *msg); -u32_t sys_arch_mbox_fetch(sys_mbox_t mbox, void **msg, u32_t timeout); -void sys_mbox_free(sys_mbox_t mbox); -void sys_mbox_fetch(sys_mbox_t mbox, void **msg); - - -/* Thread functions. */ -sys_thread_t sys_thread_new(void (* thread)(void *arg), void *arg, int prio); - -/* The following functions are used only in Unix code, and - can be omitted when porting the stack. */ -/* Returns the current time in microseconds. */ -unsigned long sys_now(void); - -#endif /* NO_SYS */ - -/* Critical Region Protection */ -/* These functions must be implemented in the sys_arch.c file. - In some implementations they can provide a more light-weight protection - mechanism than using semaphores. Otherwise semaphores can be used for - implementation */ -#ifndef SYS_ARCH_PROTECT -/** SYS_LIGHTWEIGHT_PROT - * define SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection - * for certain critical regions during buffer allocation, deallocation and memory - * allocation and deallocation. - */ -#if SYS_LIGHTWEIGHT_PROT - -/** SYS_ARCH_DECL_PROTECT - * declare a protection variable. This macro will default to defining a variable of - * type sys_prot_t. If a particular port needs a different implementation, then - * this macro may be defined in sys_arch.h. - */ -#define SYS_ARCH_DECL_PROTECT(lev) sys_prot_t lev -/** SYS_ARCH_PROTECT - * Perform a "fast" protect. This could be implemented by - * disabling interrupts for an embedded system or by using a semaphore or - * mutex. The implementation should allow calling SYS_ARCH_PROTECT when - * already protected. The old protection level is returned in the variable - * "lev". This macro will default to calling the sys_arch_protect() function - * which should be implemented in sys_arch.c. If a particular port needs a - * different implementation, then this macro may be defined in sys_arch.h - */ -#define SYS_ARCH_PROTECT(lev) lev = sys_arch_protect() -/** SYS_ARCH_UNPROTECT - * Perform a "fast" set of the protection level to "lev". This could be - * implemented by setting the interrupt level to "lev" within the MACRO or by - * using a semaphore or mutex. This macro will default to calling the - * sys_arch_unprotect() function which should be implemented in - * sys_arch.c. If a particular port needs a different implementation, then - * this macro may be defined in sys_arch.h - */ -#define SYS_ARCH_UNPROTECT(lev) sys_arch_unprotect(lev) -sys_prot_t sys_arch_protect(void); -void sys_arch_unprotect(sys_prot_t pval); - -#else - -#define SYS_ARCH_DECL_PROTECT(lev) -#define SYS_ARCH_PROTECT(lev) -#define SYS_ARCH_UNPROTECT(lev) - -#endif /* SYS_LIGHTWEIGHT_PROT */ - -#endif /* SYS_ARCH_PROTECT */ - -#endif /* __LWIP_SYS_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/tcp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/tcp.h deleted file mode 100644 index 5f968c68..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/tcp.h +++ /dev/null @@ -1,531 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_TCP_H__ -#define __LWIP_TCP_H__ - -#include "lwip/sys.h" -#include "lwip/mem.h" - -#include "lwip/pbuf.h" -#include "lwip/opt.h" -#include "lwip/ip.h" -#include "lwip/icmp.h" - -#include "lwip/err.h" - -struct tcp_pcb; - -/* Functions for interfacing with TCP: */ - -/* Lower layer interface to TCP: */ -void tcp_init (void); /* Must be called first to - initialize TCP. */ -void tcp_tmr (void); /* Must be called every - TCP_TMR_INTERVAL - ms. (Typically 250 ms). */ -/* Application program's interface: */ -struct tcp_pcb * tcp_new (void); -struct tcp_pcb * tcp_alloc (u8_t prio); - -void tcp_arg (struct tcp_pcb *pcb, void *arg); -void tcp_accept (struct tcp_pcb *pcb, - err_t (* accept)(void *arg, struct tcp_pcb *newpcb, - err_t err)); -void tcp_recv (struct tcp_pcb *pcb, - err_t (* recv)(void *arg, struct tcp_pcb *tpcb, - struct pbuf *p, err_t err)); -void tcp_sent (struct tcp_pcb *pcb, - err_t (* sent)(void *arg, struct tcp_pcb *tpcb, - u16_t len)); -void tcp_poll (struct tcp_pcb *pcb, - err_t (* poll)(void *arg, struct tcp_pcb *tpcb), - u8_t interval); -void tcp_err (struct tcp_pcb *pcb, - void (* err)(void *arg, err_t err)); - -#define tcp_mss(pcb) ((pcb)->mss) -#define tcp_sndbuf(pcb) ((pcb)->snd_buf) - -void tcp_recved (struct tcp_pcb *pcb, u16_t len); -err_t tcp_bind (struct tcp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port); -err_t tcp_connect (struct tcp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port, err_t (* connected)(void *arg, - struct tcp_pcb *tpcb, - err_t err)); -struct tcp_pcb * tcp_listen (struct tcp_pcb *pcb); -void tcp_abort (struct tcp_pcb *pcb); -err_t tcp_close (struct tcp_pcb *pcb); -err_t tcp_write (struct tcp_pcb *pcb, const void *dataptr, u16_t len, - u8_t copy); - -void tcp_setprio (struct tcp_pcb *pcb, u8_t prio); - -#define TCP_PRIO_MIN 1 -#define TCP_PRIO_NORMAL 64 -#define TCP_PRIO_MAX 127 - -/* It is also possible to call these two functions at the right - intervals (instead of calling tcp_tmr()). */ -void tcp_slowtmr (void); -void tcp_fasttmr (void); - - -/* Only used by IP to pass a TCP segment to TCP: */ -void tcp_input (struct pbuf *p, struct netif *inp); -/* Used within the TCP code only: */ -err_t tcp_output (struct tcp_pcb *pcb); -void tcp_rexmit (struct tcp_pcb *pcb); -void tcp_rexmit_rto (struct tcp_pcb *pcb); - - - -#define TCP_SEQ_LT(a,b) ((s32_t)((a)-(b)) < 0) -#define TCP_SEQ_LEQ(a,b) ((s32_t)((a)-(b)) <= 0) -#define TCP_SEQ_GT(a,b) ((s32_t)((a)-(b)) > 0) -#define TCP_SEQ_GEQ(a,b) ((s32_t)((a)-(b)) >= 0) -/* is b<=a<=c? */ -#if 0 /* see bug #10548 */ -#define TCP_SEQ_BETWEEN(a,b,c) ((c)-(b) >= (a)-(b)) -#endif -#define TCP_SEQ_BETWEEN(a,b,c) (TCP_SEQ_GEQ(a,b) && TCP_SEQ_LEQ(a,c)) -#define TCP_FIN 0x01U -#define TCP_SYN 0x02U -#define TCP_RST 0x04U -#define TCP_PSH 0x08U -#define TCP_ACK 0x10U -#define TCP_URG 0x20U -#define TCP_ECE 0x40U -#define TCP_CWR 0x80U - -#define TCP_FLAGS 0x3fU - -/* Length of the TCP header, excluding options. */ -#define TCP_HLEN 20 - -#ifndef TCP_TMR_INTERVAL -#define TCP_TMR_INTERVAL 250 /* The TCP timer interval in - milliseconds. */ -#endif /* TCP_TMR_INTERVAL */ - -#ifndef TCP_FAST_INTERVAL -#define TCP_FAST_INTERVAL TCP_TMR_INTERVAL /* the fine grained timeout in - milliseconds */ -#endif /* TCP_FAST_INTERVAL */ - -#ifndef TCP_SLOW_INTERVAL -#define TCP_SLOW_INTERVAL (2*TCP_TMR_INTERVAL) /* the coarse grained timeout in - milliseconds */ -#endif /* TCP_SLOW_INTERVAL */ - -#define TCP_FIN_WAIT_TIMEOUT 20000 /* milliseconds */ -#define TCP_SYN_RCVD_TIMEOUT 20000 /* milliseconds */ - -#define TCP_OOSEQ_TIMEOUT 6 /* x RTO */ - -#define TCP_MSL 60000 /* The maximum segment lifetime in microseconds */ - -/* - * User-settable options (used with setsockopt). - */ -#define TCP_NODELAY 0x01 /* don't delay send to coalesce packets */ -#define TCP_KEEPALIVE 0x02 /* send KEEPALIVE probes when idle for pcb->keepalive miliseconds */ - -/* Keepalive values */ -#define TCP_KEEPDEFAULT 7200000 /* KEEPALIVE timer in miliseconds */ -#define TCP_KEEPINTVL 75000 /* Time between KEEPALIVE probes in miliseconds */ -#define TCP_KEEPCNT 9 /* Counter for KEEPALIVE probes */ -#define TCP_MAXIDLE TCP_KEEPCNT * TCP_KEEPINTVL /* Maximum KEEPALIVE probe time */ - - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct tcp_hdr { - PACK_STRUCT_FIELD(u16_t src); - PACK_STRUCT_FIELD(u16_t dest); - PACK_STRUCT_FIELD(u32_t seqno); - PACK_STRUCT_FIELD(u32_t ackno); - PACK_STRUCT_FIELD(u16_t _hdrlen_rsvd_flags); - PACK_STRUCT_FIELD(u16_t wnd); - PACK_STRUCT_FIELD(u16_t chksum); - PACK_STRUCT_FIELD(u16_t urgp); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#define TCPH_OFFSET(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) >> 8) -#define TCPH_HDRLEN(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) >> 12) -#define TCPH_FLAGS(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) & TCP_FLAGS) - -#define TCPH_OFFSET_SET(phdr, offset) (phdr)->_hdrlen_rsvd_flags = htons(((offset) << 8) | TCPH_FLAGS(phdr)) -#define TCPH_HDRLEN_SET(phdr, len) (phdr)->_hdrlen_rsvd_flags = htons(((len) << 12) | TCPH_FLAGS(phdr)) -#define TCPH_FLAGS_SET(phdr, flags) (phdr)->_hdrlen_rsvd_flags = htons((ntohs((phdr)->_hdrlen_rsvd_flags) & ~TCP_FLAGS) | (flags)) -#define TCPH_SET_FLAG(phdr, flags ) (phdr)->_hdrlen_rsvd_flags = htons(ntohs((phdr)->_hdrlen_rsvd_flags) | (flags)) -#define TCPH_UNSET_FLAG(phdr, flags) (phdr)->_hdrlen_rsvd_flags = htons(ntohs((phdr)->_hdrlen_rsvd_flags) | (TCPH_FLAGS(phdr) & ~(flags)) ) - -#define TCP_TCPLEN(seg) ((seg)->len + ((TCPH_FLAGS((seg)->tcphdr) & TCP_FIN || \ - TCPH_FLAGS((seg)->tcphdr) & TCP_SYN)? 1: 0)) - -enum tcp_state { - CLOSED = 0, - LISTEN = 1, - SYN_SENT = 2, - SYN_RCVD = 3, - ESTABLISHED = 4, - FIN_WAIT_1 = 5, - FIN_WAIT_2 = 6, - CLOSE_WAIT = 7, - CLOSING = 8, - LAST_ACK = 9, - TIME_WAIT = 10 -}; - -/* the TCP protocol control block */ -struct tcp_pcb { -/** common PCB members */ - IP_PCB; -/** protocol specific PCB members */ - struct tcp_pcb *next; /* for the linked list */ - enum tcp_state state; /* TCP state */ - u8_t prio; - void *callback_arg; - - u16_t local_port; - u16_t remote_port; - - u8_t flags; -#define TF_ACK_DELAY (u8_t)0x01U /* Delayed ACK. */ -#define TF_ACK_NOW (u8_t)0x02U /* Immediate ACK. */ -#define TF_INFR (u8_t)0x04U /* In fast recovery. */ -#define TF_RESET (u8_t)0x08U /* Connection was reset. */ -#define TF_CLOSED (u8_t)0x10U /* Connection was sucessfully closed. */ -#define TF_GOT_FIN (u8_t)0x20U /* Connection was closed by the remote end. */ -#define TF_NODELAY (u8_t)0x40U /* Disable Nagle algorithm */ - - /* receiver variables */ - u32_t rcv_nxt; /* next seqno expected */ - u16_t rcv_wnd; /* receiver window */ - - /* Timers */ - u32_t tmr; - u8_t polltmr, pollinterval; - - /* Retransmission timer. */ - u16_t rtime; - - u16_t mss; /* maximum segment size */ - - /* RTT (round trip time) estimation variables */ - u32_t rttest; /* RTT estimate in 500ms ticks */ - u32_t rtseq; /* sequence number being timed */ - s16_t sa, sv; /* @todo document this */ - - u16_t rto; /* retransmission time-out */ - u8_t nrtx; /* number of retransmissions */ - - /* fast retransmit/recovery */ - u32_t lastack; /* Highest acknowledged seqno. */ - u8_t dupacks; - - /* congestion avoidance/control variables */ - u16_t cwnd; - u16_t ssthresh; - - /* sender variables */ - u32_t snd_nxt, /* next seqno to be sent */ - snd_max, /* Highest seqno sent. */ - snd_wnd, /* sender window */ - snd_wl1, snd_wl2, /* Sequence and acknowledgement numbers of last - window update. */ - snd_lbb; /* Sequence number of next byte to be buffered. */ - - u16_t acked; - - u16_t snd_buf; /* Available buffer space for sending (in bytes). */ - u8_t snd_queuelen; /* Available buffer space for sending (in tcp_segs). */ - - - /* These are ordered by sequence number: */ - struct tcp_seg *unsent; /* Unsent (queued) segments. */ - struct tcp_seg *unacked; /* Sent but unacknowledged segments. */ -#if TCP_QUEUE_OOSEQ - struct tcp_seg *ooseq; /* Received out of sequence segments. */ -#endif /* TCP_QUEUE_OOSEQ */ - -#if LWIP_CALLBACK_API - /* Function to be called when more send buffer space is available. */ - err_t (* sent)(void *arg, struct tcp_pcb *pcb, u16_t space); - - /* Function to be called when (in-sequence) data has arrived. */ - err_t (* recv)(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err); - - /* Function to be called when a connection has been set up. */ - err_t (* connected)(void *arg, struct tcp_pcb *pcb, err_t err); - - /* Function to call when a listener has been connected. */ - err_t (* accept)(void *arg, struct tcp_pcb *newpcb, err_t err); - - /* Function which is called periodically. */ - err_t (* poll)(void *arg, struct tcp_pcb *pcb); - - /* Function to be called whenever a fatal error occurs. */ - void (* errf)(void *arg, err_t err); -#endif /* LWIP_CALLBACK_API */ - - /* idle time before KEEPALIVE is sent */ - u32_t keepalive; - - /* KEEPALIVE counter */ - u8_t keep_cnt; -}; - -struct tcp_pcb_listen { -/* Common members of all PCB types */ - IP_PCB; - -/* Protocol specific PCB members */ - struct tcp_pcb_listen *next; /* for the linked list */ - - /* Even if state is obviously LISTEN this is here for - * field compatibility with tpc_pcb to which it is cast sometimes - * Until a cleaner solution emerges this is here.FIXME - */ - enum tcp_state state; /* TCP state */ - - u8_t prio; - void *callback_arg; - - u16_t local_port; - -#if LWIP_CALLBACK_API - /* Function to call when a listener has been connected. */ - err_t (* accept)(void *arg, struct tcp_pcb *newpcb, err_t err); -#endif /* LWIP_CALLBACK_API */ -}; - -#if LWIP_EVENT_API - -enum lwip_event { - LWIP_EVENT_ACCEPT, - LWIP_EVENT_SENT, - LWIP_EVENT_RECV, - LWIP_EVENT_CONNECTED, - LWIP_EVENT_POLL, - LWIP_EVENT_ERR -}; - -err_t lwip_tcp_event(void *arg, struct tcp_pcb *pcb, - enum lwip_event, - struct pbuf *p, - u16_t size, - err_t err); - -#define TCP_EVENT_ACCEPT(pcb,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ - LWIP_EVENT_ACCEPT, NULL, 0, err) -#define TCP_EVENT_SENT(pcb,space,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ - LWIP_EVENT_SENT, NULL, space, ERR_OK) -#define TCP_EVENT_RECV(pcb,p,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ - LWIP_EVENT_RECV, (p), 0, (err)) -#define TCP_EVENT_CONNECTED(pcb,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ - LWIP_EVENT_CONNECTED, NULL, 0, (err)) -#define TCP_EVENT_POLL(pcb,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ - LWIP_EVENT_POLL, NULL, 0, ERR_OK) -#define TCP_EVENT_ERR(errf,arg,err) lwip_tcp_event((arg), NULL, \ - LWIP_EVENT_ERR, NULL, 0, (err)) -#else /* LWIP_EVENT_API */ -#define TCP_EVENT_ACCEPT(pcb,err,ret) \ - if((pcb)->accept != NULL) \ - (ret = (pcb)->accept((pcb)->callback_arg,(pcb),(err))) -#define TCP_EVENT_SENT(pcb,space,ret) \ - if((pcb)->sent != NULL) \ - (ret = (pcb)->sent((pcb)->callback_arg,(pcb),(space))) -#define TCP_EVENT_RECV(pcb,p,err,ret) \ - if((pcb)->recv != NULL) \ - { ret = (pcb)->recv((pcb)->callback_arg,(pcb),(p),(err)); } else { \ - if (p) pbuf_free(p); } -#define TCP_EVENT_CONNECTED(pcb,err,ret) \ - if((pcb)->connected != NULL) \ - (ret = (pcb)->connected((pcb)->callback_arg,(pcb),(err))) -#define TCP_EVENT_POLL(pcb,ret) \ - if((pcb)->poll != NULL) \ - (ret = (pcb)->poll((pcb)->callback_arg,(pcb))) -#define TCP_EVENT_ERR(errf,arg,err) \ - if((errf) != NULL) \ - (errf)((arg),(err)) -#endif /* LWIP_EVENT_API */ - -/* This structure represents a TCP segment on the unsent and unacked queues */ -struct tcp_seg { - struct tcp_seg *next; /* used when putting segements on a queue */ - struct pbuf *p; /* buffer containing data + TCP header */ - void *dataptr; /* pointer to the TCP data in the pbuf */ - u16_t len; /* the TCP length of this segment */ - struct tcp_hdr *tcphdr; /* the TCP header */ -}; - -/* Internal functions and global variables: */ -struct tcp_pcb *tcp_pcb_copy(struct tcp_pcb *pcb); -void tcp_pcb_purge(struct tcp_pcb *pcb); -void tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb); - -u8_t tcp_segs_free(struct tcp_seg *seg); -u8_t tcp_seg_free(struct tcp_seg *seg); -struct tcp_seg *tcp_seg_copy(struct tcp_seg *seg); - -#define tcp_ack(pcb) if((pcb)->flags & TF_ACK_DELAY) { \ - (pcb)->flags &= ~TF_ACK_DELAY; \ - (pcb)->flags |= TF_ACK_NOW; \ - tcp_output(pcb); \ - } else { \ - (pcb)->flags |= TF_ACK_DELAY; \ - } - -#define tcp_ack_now(pcb) (pcb)->flags |= TF_ACK_NOW; \ - tcp_output(pcb) - -err_t tcp_send_ctrl(struct tcp_pcb *pcb, u8_t flags); -err_t tcp_enqueue(struct tcp_pcb *pcb, void *dataptr, u16_t len, - u8_t flags, u8_t copy, - u8_t *optdata, u8_t optlen); - -void tcp_rexmit_seg(struct tcp_pcb *pcb, struct tcp_seg *seg); - -void tcp_rst(u32_t seqno, u32_t ackno, - struct ip_addr *local_ip, struct ip_addr *remote_ip, - u16_t local_port, u16_t remote_port); - -u32_t tcp_next_iss(void); - -void tcp_keepalive(struct tcp_pcb *pcb); - -extern struct tcp_pcb *tcp_input_pcb; -extern u32_t tcp_ticks; - -#if TCP_DEBUG || TCP_INPUT_DEBUG || TCP_OUTPUT_DEBUG -void tcp_debug_print(struct tcp_hdr *tcphdr); -void tcp_debug_print_flags(u8_t flags); -void tcp_debug_print_state(enum tcp_state s); -void tcp_debug_print_pcbs(void); -s16_t tcp_pcbs_sane(void); -#else -# define tcp_debug_print(tcphdr) -# define tcp_debug_print_flags(flags) -# define tcp_debug_print_state(s) -# define tcp_debug_print_pcbs() -# define tcp_pcbs_sane() 1 -#endif /* TCP_DEBUG */ - -#if NO_SYS -#define tcp_timer_needed() -#else -void tcp_timer_needed(void); -#endif - -/* The TCP PCB lists. */ -union tcp_listen_pcbs_t { /* List of all TCP PCBs in LISTEN state. */ - struct tcp_pcb_listen *listen_pcbs; - struct tcp_pcb *pcbs; -}; -extern union tcp_listen_pcbs_t tcp_listen_pcbs; -extern struct tcp_pcb *tcp_active_pcbs; /* List of all TCP PCBs that are in a - state in which they accept or send - data. */ -extern struct tcp_pcb *tcp_tw_pcbs; /* List of all TCP PCBs in TIME-WAIT. */ - -extern struct tcp_pcb *tcp_tmp_pcb; /* Only used for temporary storage. */ - -/* Axioms about the above lists: - 1) Every TCP PCB that is not CLOSED is in one of the lists. - 2) A PCB is only in one of the lists. - 3) All PCBs in the tcp_listen_pcbs list is in LISTEN state. - 4) All PCBs in the tcp_tw_pcbs list is in TIME-WAIT state. -*/ - -/* Define two macros, TCP_REG and TCP_RMV that registers a TCP PCB - with a PCB list or removes a PCB from a list, respectively. */ -#if 0 -#define TCP_REG(pcbs, npcb) do {\ - LWIP_DEBUGF(TCP_DEBUG, ("TCP_REG %p local port %d\n", npcb, npcb->local_port)); \ - for(tcp_tmp_pcb = *pcbs; \ - tcp_tmp_pcb != NULL; \ - tcp_tmp_pcb = tcp_tmp_pcb->next) { \ - LWIP_ASSERT("TCP_REG: already registered\n", tcp_tmp_pcb != npcb); \ - } \ - LWIP_ASSERT("TCP_REG: pcb->state != CLOSED", npcb->state != CLOSED); \ - npcb->next = *pcbs; \ - LWIP_ASSERT("TCP_REG: npcb->next != npcb", npcb->next != npcb); \ - *(pcbs) = npcb; \ - LWIP_ASSERT("TCP_RMV: tcp_pcbs sane", tcp_pcbs_sane()); \ - tcp_timer_needed(); \ - } while(0) -#define TCP_RMV(pcbs, npcb) do { \ - LWIP_ASSERT("TCP_RMV: pcbs != NULL", *pcbs != NULL); \ - LWIP_DEBUGF(TCP_DEBUG, ("TCP_RMV: removing %p from %p\n", npcb, *pcbs)); \ - if(*pcbs == npcb) { \ - *pcbs = (*pcbs)->next; \ - } else for(tcp_tmp_pcb = *pcbs; tcp_tmp_pcb != NULL; tcp_tmp_pcb = tcp_tmp_pcb->next) { \ - if(tcp_tmp_pcb->next != NULL && tcp_tmp_pcb->next == npcb) { \ - tcp_tmp_pcb->next = npcb->next; \ - break; \ - } \ - } \ - npcb->next = NULL; \ - LWIP_ASSERT("TCP_RMV: tcp_pcbs sane", tcp_pcbs_sane()); \ - LWIP_DEBUGF(TCP_DEBUG, ("TCP_RMV: removed %p from %p\n", npcb, *pcbs)); \ - } while(0) - -#else /* LWIP_DEBUG */ -#define TCP_REG(pcbs, npcb) do { \ - npcb->next = *pcbs; \ - *(pcbs) = npcb; \ - tcp_timer_needed(); \ - } while(0) -#define TCP_RMV(pcbs, npcb) do { \ - if(*(pcbs) == npcb) { \ - (*(pcbs)) = (*pcbs)->next; \ - } else for(tcp_tmp_pcb = *pcbs; tcp_tmp_pcb != NULL; tcp_tmp_pcb = tcp_tmp_pcb->next) { \ - if(tcp_tmp_pcb->next != NULL && tcp_tmp_pcb->next == npcb) { \ - tcp_tmp_pcb->next = npcb->next; \ - break; \ - } \ - } \ - npcb->next = NULL; \ - } while(0) -#endif /* LWIP_DEBUG */ -#endif /* __LWIP_TCP_H__ */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/tcpip.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/tcpip.h deleted file mode 100644 index 316ae4fc..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/tcpip.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_TCPIP_H__ -#define __LWIP_TCPIP_H__ - -#include "lwip/api_msg.h" -#include "lwip/pbuf.h" - -void tcpip_init(void (* tcpip_init_done)(void *), void *arg); -void tcpip_apimsg(struct api_msg *apimsg); -err_t tcpip_input(struct pbuf *p, struct netif *inp); -err_t tcpip_callback(void (*f)(void *ctx), void *ctx); - -void tcpip_tcp_timer_needed(void); - -enum tcpip_msg_type { - TCPIP_MSG_API, - TCPIP_MSG_INPUT, - TCPIP_MSG_CALLBACK -}; - -struct tcpip_msg { - enum tcpip_msg_type type; - sys_sem_t *sem; - union { - struct api_msg *apimsg; - struct { - struct pbuf *p; - struct netif *netif; - } inp; - struct { - void (*f)(void *ctx); - void *ctx; - } cb; - } msg; -}; - - -#endif /* __LWIP_TCPIP_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/udp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/udp.h deleted file mode 100644 index ede04745..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/lwip/udp.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_UDP_H__ -#define __LWIP_UDP_H__ - -#include "lwip/arch.h" - -#include "lwip/pbuf.h" -#include "lwip/inet.h" -#include "lwip/ip.h" - -#define UDP_HLEN 8 - -struct udp_hdr { - PACK_STRUCT_FIELD(u16_t src); - PACK_STRUCT_FIELD(u16_t dest); /* src/dest UDP ports */ - PACK_STRUCT_FIELD(u16_t len); - PACK_STRUCT_FIELD(u16_t chksum); -} PACK_STRUCT_STRUCT; - -#define UDP_FLAGS_NOCHKSUM 0x01U -#define UDP_FLAGS_UDPLITE 0x02U -#define UDP_FLAGS_CONNECTED 0x04U - -struct udp_pcb { -/* Common members of all PCB types */ - IP_PCB; - -/* Protocol specific PCB members */ - - struct udp_pcb *next; - - u8_t flags; - u16_t local_port, remote_port; - - u16_t chksum_len; - - void (* recv)(void *arg, struct udp_pcb *pcb, struct pbuf *p, - struct ip_addr *addr, u16_t port); - void *recv_arg; -}; - -/* The following functions is the application layer interface to the - UDP code. */ -struct udp_pcb * udp_new (void); -void udp_remove (struct udp_pcb *pcb); -err_t udp_bind (struct udp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port); -err_t udp_connect (struct udp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port); -void udp_disconnect (struct udp_pcb *pcb); -void udp_recv (struct udp_pcb *pcb, - void (* recv)(void *arg, struct udp_pcb *upcb, - struct pbuf *p, - struct ip_addr *addr, - u16_t port), - void *recv_arg); -err_t udp_sendto (struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *dst_ip, u16_t dst_port); -err_t udp_send (struct udp_pcb *pcb, struct pbuf *p); - -#define udp_flags(pcb) ((pcb)->flags) -#define udp_setflags(pcb, f) ((pcb)->flags = (f)) - -/* The following functions are the lower layer interface to UDP. */ -void udp_input (struct pbuf *p, struct netif *inp); -void udp_init (void); - -#if UDP_DEBUG -void udp_debug_print(struct udp_hdr *udphdr); -#else -#define udp_debug_print(udphdr) -#endif -#endif /* __LWIP_UDP_H__ */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/netif/etharp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/netif/etharp.h deleted file mode 100644 index 08437afe..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/netif/etharp.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * Copyright (c) 2003-2004 Leon Woestenberg - * Copyright (c) 2003-2004 Axon Digital Design B.V., The Netherlands. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#ifndef __NETIF_ETHARP_H__ -#define __NETIF_ETHARP_H__ - -#ifndef ETH_PAD_SIZE -#define ETH_PAD_SIZE 0 -#endif - -#include "lwip/pbuf.h" -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/ip.h" - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct eth_addr { - PACK_STRUCT_FIELD(u8_t addr[6]); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct eth_hdr { -#if ETH_PAD_SIZE - PACK_STRUCT_FIELD(u8_t padding[ETH_PAD_SIZE]); -#endif - PACK_STRUCT_FIELD(struct eth_addr dest); - PACK_STRUCT_FIELD(struct eth_addr src); - PACK_STRUCT_FIELD(u16_t type); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -/** the ARP message */ -struct etharp_hdr { - PACK_STRUCT_FIELD(struct eth_hdr ethhdr); - PACK_STRUCT_FIELD(u16_t hwtype); - PACK_STRUCT_FIELD(u16_t proto); - PACK_STRUCT_FIELD(u16_t _hwlen_protolen); - PACK_STRUCT_FIELD(u16_t opcode); - PACK_STRUCT_FIELD(struct eth_addr shwaddr); - PACK_STRUCT_FIELD(struct ip_addr2 sipaddr); - PACK_STRUCT_FIELD(struct eth_addr dhwaddr); - PACK_STRUCT_FIELD(struct ip_addr2 dipaddr); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct ethip_hdr { - PACK_STRUCT_FIELD(struct eth_hdr eth); - PACK_STRUCT_FIELD(struct ip_hdr ip); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -/** 5 seconds period */ -#define ARP_TMR_INTERVAL 5000 - -#define ETHTYPE_ARP 0x0806 -#define ETHTYPE_IP 0x0800 - -void etharp_init(void); -void etharp_tmr(void); -void etharp_ip_input(struct netif *netif, struct pbuf *p); -void etharp_arp_input(struct netif *netif, struct eth_addr *ethaddr, - struct pbuf *p); -err_t etharp_output(struct netif *netif, struct ip_addr *ipaddr, - struct pbuf *q); -err_t etharp_query(struct netif *netif, struct ip_addr *ipaddr, struct pbuf *q); -err_t etharp_request(struct netif *netif, struct ip_addr *ipaddr); - -#endif /* __NETIF_ARP_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/netif/loopif.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/netif/loopif.h deleted file mode 100644 index 97b3c676..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/netif/loopif.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __NETIF_LOOPIF_H__ -#define __NETIF_LOOPIF_H__ - -#include "lwip/netif.h" - -err_t loopif_init(struct netif *netif); - -#endif /* __NETIF_LOOPIF_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/netif/slipif.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/netif/slipif.h deleted file mode 100644 index bf70046a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/include/netif/slipif.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (c) 2001, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __NETIF_SLIPIF_H__ -#define __NETIF_SLIPIF_H__ - -#include "lwip/netif.h" - -err_t slipif_init(struct netif * netif); - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/FILES b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/FILES deleted file mode 100644 index 825d4071..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/FILES +++ /dev/null @@ -1,27 +0,0 @@ -This directory contains generic network interface device drivers that -do not contain any hardware or architecture specific code. The files -are: - -etharp.c - Implements the ARP (Address Resolution Protocol) over - Ethernet. The code in this file should be used together with - Ethernet device drivers. Note that this module has been - largely made Ethernet independent so you should be able to - adapt this for other link layers (such as Firewire). - -ethernetif.c - An example of how an Ethernet device driver could look. This - file can be used as a "skeleton" for developing new Ethernet - network device drivers. It uses the etharp.c ARP code. - -loopif.c - An example network interface that shows how a "loopback" - interface would work. This is not really intended for actual - use, but as a very basic example of how initialization and - output functions work. - -slipif.c - A generic implementation of the SLIP (Serial Line IP) - protocol. It requires a sio (serial I/O) module to work. - -ppp/ Point-to-Point Protocol stack diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/etharp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/etharp.c deleted file mode 100644 index 7765046d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/etharp.c +++ /dev/null @@ -1,831 +0,0 @@ -/** - * @file - * Address Resolution Protocol module for IP over Ethernet - * - * Functionally, ARP is divided into two parts. The first maps an IP address - * to a physical address when sending a packet, and the second part answers - * requests from other machines for our physical address. - * - * This implementation complies with RFC 826 (Ethernet ARP). It supports - * Gratuitious ARP from RFC3220 (IP Mobility Support for IPv4) section 4.6 - * if an interface calls etharp_query(our_netif, its_ip_addr, NULL) upon - * address change. - */ - -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * Copyright (c) 2003-2004 Leon Woestenberg - * Copyright (c) 2003-2004 Axon Digital Design B.V., The Netherlands. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - */ - -#include "lwip/opt.h" -#include "lwip/inet.h" -#include "netif/etharp.h" -#include "lwip/ip.h" -#include "lwip/stats.h" - -/* ARP needs to inform DHCP of any ARP replies? */ -#if (LWIP_DHCP && DHCP_DOES_ARP_CHECK) -# include "lwip/dhcp.h" -#endif - -/** the time an ARP entry stays valid after its last update, - * (240 * 5) seconds = 20 minutes. - */ -#define ARP_MAXAGE 240 -/** the time an ARP entry stays pending after first request, - * (2 * 5) seconds = 10 seconds. - * - * @internal Keep this number at least 2, otherwise it might - * run out instantly if the timeout occurs directly after a request. - */ -#define ARP_MAXPENDING 2 - -#define HWTYPE_ETHERNET 1 - -/** ARP message types */ -#define ARP_REQUEST 1 -#define ARP_REPLY 2 - -#define ARPH_HWLEN(hdr) (ntohs((hdr)->_hwlen_protolen) >> 8) -#define ARPH_PROTOLEN(hdr) (ntohs((hdr)->_hwlen_protolen) & 0xff) - -#define ARPH_HWLEN_SET(hdr, len) (hdr)->_hwlen_protolen = htons(ARPH_PROTOLEN(hdr) | ((len) << 8)) -#define ARPH_PROTOLEN_SET(hdr, len) (hdr)->_hwlen_protolen = htons((len) | (ARPH_HWLEN(hdr) << 8)) - -enum etharp_state { - ETHARP_STATE_EMPTY, - ETHARP_STATE_PENDING, - ETHARP_STATE_STABLE, - /** @internal transitional state used in etharp_tmr() for convenience*/ - ETHARP_STATE_EXPIRED -}; - -struct etharp_entry { -#if ARP_QUEUEING - /** - * Pointer to queue of pending outgoing packets on this ARP entry. - */ - struct pbuf *p; -#endif - struct ip_addr ipaddr; - struct eth_addr ethaddr; - enum etharp_state state; - u8_t ctime; -}; - -static const struct eth_addr ethbroadcast = {{0xff,0xff,0xff,0xff,0xff,0xff}}; -static struct etharp_entry arp_table[ARP_TABLE_SIZE]; - -/** - * Try hard to create a new entry - we want the IP address to appear in - * the cache (even if this means removing an active entry or so). */ -#define ETHARP_TRY_HARD 1 - -static s8_t find_entry(struct ip_addr *ipaddr, u8_t flags); -static err_t update_arp_entry(struct netif *netif, struct ip_addr *ipaddr, struct eth_addr *ethaddr, u8_t flags); -/** - * Initializes ARP module. - */ -void -etharp_init(void) -{ - u8_t i; - /* clear ARP entries */ - for(i = 0; i < ARP_TABLE_SIZE; ++i) { - arp_table[i].state = ETHARP_STATE_EMPTY; -#if ARP_QUEUEING - arp_table[i].p = NULL; -#endif - arp_table[i].ctime = 0; - } -} - -/** - * Clears expired entries in the ARP table. - * - * This function should be called every ETHARP_TMR_INTERVAL microseconds (5 seconds), - * in order to expire entries in the ARP table. - */ -void -etharp_tmr(void) -{ - u8_t i; - - LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n")); - /* remove expired entries from the ARP table */ - for (i = 0; i < ARP_TABLE_SIZE; ++i) { - arp_table[i].ctime++; - /* stable entry? */ - if ((arp_table[i].state == ETHARP_STATE_STABLE) && - /* entry has become old? */ - (arp_table[i].ctime >= ARP_MAXAGE)) { - LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired stable entry %"U16_F".\n", (u16_t)i)); - arp_table[i].state = ETHARP_STATE_EXPIRED; - /* pending entry? */ - } else if (arp_table[i].state == ETHARP_STATE_PENDING) { - /* entry unresolved/pending for too long? */ - if (arp_table[i].ctime >= ARP_MAXPENDING) { - LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired pending entry %"U16_F".\n", (u16_t)i)); - arp_table[i].state = ETHARP_STATE_EXPIRED; -#if ARP_QUEUEING - } else if (arp_table[i].p != NULL) { - /* resend an ARP query here */ -#endif - } - } - /* clean up entries that have just been expired */ - if (arp_table[i].state == ETHARP_STATE_EXPIRED) { -#if ARP_QUEUEING - /* and empty packet queue */ - if (arp_table[i].p != NULL) { - /* remove all queued packets */ - LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].p))); - pbuf_free(arp_table[i].p); - arp_table[i].p = NULL; - } -#endif - /* recycle entry for re-use */ - arp_table[i].state = ETHARP_STATE_EMPTY; - } - } -} - -/** - * Search the ARP table for a matching or new entry. - * - * If an IP address is given, return a pending or stable ARP entry that matches - * the address. If no match is found, create a new entry with this address set, - * but in state ETHARP_EMPTY. The caller must check and possibly change the - * state of the returned entry. - * - * If ipaddr is NULL, return a initialized new entry in state ETHARP_EMPTY. - * - * In all cases, attempt to create new entries from an empty entry. If no - * empty entries are available and ETHARP_TRY_HARD flag is set, recycle - * old entries. Heuristic choose the least important entry for recycling. - * - * @param ipaddr IP address to find in ARP cache, or to add if not found. - * @param flags - * - ETHARP_TRY_HARD: Try hard to create a entry by allowing recycling of - * active (stable or pending) entries. - * - * @return The ARP entry index that matched or is created, ERR_MEM if no - * entry is found or could be recycled. - */ -static s8_t find_entry(struct ip_addr *ipaddr, u8_t flags) -{ - s8_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE; - s8_t empty = ARP_TABLE_SIZE; - u8_t i = 0, age_pending = 0, age_stable = 0; -#if ARP_QUEUEING - /* oldest entry with packets on queue */ - s8_t old_queue = ARP_TABLE_SIZE; - /* its age */ - u8_t age_queue = 0; -#endif - - /** - * a) do a search through the cache, remember candidates - * b) select candidate entry - * c) create new entry - */ - - /* a) in a single search sweep, do all of this - * 1) remember the first empty entry (if any) - * 2) remember the oldest stable entry (if any) - * 3) remember the oldest pending entry without queued packets (if any) - * 4) remember the oldest pending entry with queued packets (if any) - * 5) search for a matching IP entry, either pending or stable - * until 5 matches, or all entries are searched for. - */ - - for (i = 0; i < ARP_TABLE_SIZE; ++i) { - /* no empty entry found yet and now we do find one? */ - if ((empty == ARP_TABLE_SIZE) && (arp_table[i].state == ETHARP_STATE_EMPTY)) { - LWIP_DEBUGF(ETHARP_DEBUG, ("find_entry: found empty entry %"U16_F"\n", (u16_t)i)); - /* remember first empty entry */ - empty = i; - } - /* pending entry? */ - else if (arp_table[i].state == ETHARP_STATE_PENDING) { - /* if given, does IP address match IP address in ARP entry? */ - if (ipaddr && ip_addr_cmp(ipaddr, &arp_table[i].ipaddr)) { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("find_entry: found matching pending entry %"U16_F"\n", (u16_t)i)); - /* found exact IP address match, simply bail out */ - return i; -#if ARP_QUEUEING - /* pending with queued packets? */ - } else if (arp_table[i].p != NULL) { - if (arp_table[i].ctime >= age_queue) { - old_queue = i; - age_queue = arp_table[i].ctime; - } -#endif - /* pending without queued packets? */ - } else { - if (arp_table[i].ctime >= age_pending) { - old_pending = i; - age_pending = arp_table[i].ctime; - } - } - } - /* stable entry? */ - else if (arp_table[i].state == ETHARP_STATE_STABLE) { - /* if given, does IP address match IP address in ARP entry? */ - if (ipaddr && ip_addr_cmp(ipaddr, &arp_table[i].ipaddr)) { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("find_entry: found matching stable entry %"U16_F"\n", (u16_t)i)); - /* found exact IP address match, simply bail out */ - return i; - /* remember entry with oldest stable entry in oldest, its age in maxtime */ - } else if (arp_table[i].ctime >= age_stable) { - old_stable = i; - age_stable = arp_table[i].ctime; - } - } - } - /* { we have no match } => try to create a new entry */ - - /* no empty entry found and not allowed to recycle? */ - if ((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_TRY_HARD) == 0)) - { - return (s8_t)ERR_MEM; - } - - /* b) choose the least destructive entry to recycle: - * 1) empty entry - * 2) oldest stable entry - * 3) oldest pending entry without queued packets - * 4) oldest pending entry without queued packets - * - * { ETHARP_TRY_HARD is set at this point } - */ - - /* 1) empty entry available? */ - if (empty < ARP_TABLE_SIZE) { - i = empty; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("find_entry: selecting empty entry %"U16_F"\n", (u16_t)i)); - } - /* 2) found recyclable stable entry? */ - else if (old_stable < ARP_TABLE_SIZE) { - /* recycle oldest stable*/ - i = old_stable; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("find_entry: selecting oldest stable entry %"U16_F"\n", (u16_t)i)); -#if ARP_QUEUEING - /* no queued packets should exist on stable entries */ - LWIP_ASSERT("arp_table[i].p == NULL", arp_table[i].p == NULL); -#endif - /* 3) found recyclable pending entry without queued packets? */ - } else if (old_pending < ARP_TABLE_SIZE) { - /* recycle oldest pending */ - i = old_pending; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("find_entry: selecting oldest pending entry %"U16_F" (without queue)\n", (u16_t)i)); -#if ARP_QUEUEING - /* 4) found recyclable pending entry with queued packets? */ - } else if (old_queue < ARP_TABLE_SIZE) { - /* recycle oldest pending */ - i = old_queue; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("find_entry: selecting oldest pending entry %"U16_F", freeing packet queue %p\n", (u16_t)i, (void *)(arp_table[i].p))); - pbuf_free(arp_table[i].p); - arp_table[i].p = NULL; -#endif - /* no empty or recyclable entries found */ - } else { - return (s8_t)ERR_MEM; - } - - /* { empty or recyclable entry found } */ - LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE); - - /* recycle entry (no-op for an already empty entry) */ - arp_table[i].state = ETHARP_STATE_EMPTY; - - /* IP address given? */ - if (ipaddr != NULL) { - /* set IP address */ - ip_addr_set(&arp_table[i].ipaddr, ipaddr); - } - arp_table[i].ctime = 0; - return (err_t)i; -} - -/** - * Update (or insert) a IP/MAC address pair in the ARP cache. - * - * If a pending entry is resolved, any queued packets will be sent - * at this point. - * - * @param ipaddr IP address of the inserted ARP entry. - * @param ethaddr Ethernet address of the inserted ARP entry. - * @param flags Defines behaviour: - * - ETHARP_TRY_HARD Allows ARP to insert this as a new item. If not specified, - * only existing ARP entries will be updated. - * - * @return - * - ERR_OK Succesfully updated ARP cache. - * - ERR_MEM If we could not add a new ARP entry when ETHARP_TRY_HARD was set. - * - ERR_ARG Non-unicast address given, those will not appear in ARP cache. - * - * @see pbuf_free() - */ -static err_t -update_arp_entry(struct netif *netif, struct ip_addr *ipaddr, struct eth_addr *ethaddr, u8_t flags) -{ - s8_t i, k; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE | 3, ("update_arp_entry()\n")); - LWIP_ASSERT("netif->hwaddr_len != 0", netif->hwaddr_len != 0); - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n", - ip4_addr1(ipaddr), ip4_addr2(ipaddr), ip4_addr3(ipaddr), ip4_addr4(ipaddr), - ethaddr->addr[0], ethaddr->addr[1], ethaddr->addr[2], - ethaddr->addr[3], ethaddr->addr[4], ethaddr->addr[5])); - /* non-unicast address? */ - if (ip_addr_isany(ipaddr) || - ip_addr_isbroadcast(ipaddr, netif) || - ip_addr_ismulticast(ipaddr)) { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("update_arp_entry: will not add non-unicast IP address to ARP cache\n")); - return ERR_ARG; - } - /* find or create ARP entry */ - i = find_entry(ipaddr, flags); - /* bail out if no entry could be found */ - if (i < 0) return (err_t)i; - - /* mark it stable */ - arp_table[i].state = ETHARP_STATE_STABLE; - - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("update_arp_entry: updating stable entry %"S16_F"\n", (s16_t)i)); - /* update address */ - for (k = 0; k < netif->hwaddr_len; ++k) { - arp_table[i].ethaddr.addr[k] = ethaddr->addr[k]; - } - /* reset time stamp */ - arp_table[i].ctime = 0; -/* this is where we will send out queued packets! */ -#if ARP_QUEUEING - while (arp_table[i].p != NULL) { - /* get the first packet on the queue */ - struct pbuf *p = arp_table[i].p; - /* Ethernet header */ - struct eth_hdr *ethhdr = p->payload; - /* remember (and reference) remainder of queue */ - /* note: this will also terminate the p pbuf chain */ - arp_table[i].p = pbuf_dequeue(p); - /* fill-in Ethernet header */ - for (k = 0; k < netif->hwaddr_len; ++k) { - ethhdr->dest.addr[k] = ethaddr->addr[k]; - ethhdr->src.addr[k] = netif->hwaddr[k]; - } - ethhdr->type = htons(ETHTYPE_IP); - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("update_arp_entry: sending queued IP packet %p.\n", (void *)p)); - /* send the queued IP packet */ - netif->linkoutput(netif, p); - /* free the queued IP packet */ - pbuf_free(p); - } -#endif - return ERR_OK; -} - -/** - * Updates the ARP table using the given IP packet. - * - * Uses the incoming IP packet's source address to update the - * ARP cache for the local network. The function does not alter - * or free the packet. This function must be called before the - * packet p is passed to the IP layer. - * - * @param netif The lwIP network interface on which the IP packet pbuf arrived. - * @param pbuf The IP packet that arrived on netif. - * - * @return NULL - * - * @see pbuf_free() - */ -void -etharp_ip_input(struct netif *netif, struct pbuf *p) -{ - struct ethip_hdr *hdr; - LWIP_ASSERT("netif != NULL", netif != NULL); - /* Only insert an entry if the source IP address of the - incoming IP packet comes from a host on the local network. */ - hdr = p->payload; - /* source is not on the local network? */ - if (!ip_addr_netcmp(&(hdr->ip.src), &(netif->ip_addr), &(netif->netmask))) { - /* do nothing */ - return; - } - - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_ip_input: updating ETHARP table.\n")); - /* update ARP table */ - /* @todo We could use ETHARP_TRY_HARD if we think we are going to talk - * back soon (for example, if the destination IP address is ours. */ - update_arp_entry(netif, &(hdr->ip.src), &(hdr->eth.src), 0); -} - - -/** - * Responds to ARP requests to us. Upon ARP replies to us, add entry to cache - * send out queued IP packets. Updates cache with snooped address pairs. - * - * Should be called for incoming ARP packets. The pbuf in the argument - * is freed by this function. - * - * @param netif The lwIP network interface on which the ARP packet pbuf arrived. - * @param pbuf The ARP packet that arrived on netif. Is freed by this function. - * @param ethaddr Ethernet address of netif. - * - * @return NULL - * - * @see pbuf_free() - */ -void -etharp_arp_input(struct netif *netif, struct eth_addr *ethaddr, struct pbuf *p) -{ - struct etharp_hdr *hdr; - /* these are aligned properly, whereas the ARP header fields might not be */ - struct ip_addr sipaddr, dipaddr; - u8_t i; - u8_t for_us; - - LWIP_ASSERT("netif != NULL", netif != NULL); - - /* drop short ARP packets */ - if (p->tot_len < sizeof(struct etharp_hdr)) { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE | 1, ("etharp_arp_input: packet dropped, too short (%"S16_F"/%"S16_F")\n", p->tot_len, sizeof(struct etharp_hdr))); - pbuf_free(p); - return; - } - - hdr = p->payload; - - /* get aligned copies of addresses */ - *(struct ip_addr2 *)&sipaddr = hdr->sipaddr; - *(struct ip_addr2 *)&dipaddr = hdr->dipaddr; - - /* this interface is not configured? */ - if (netif->ip_addr.addr == 0) { - for_us = 0; - } else { - /* ARP packet directed to us? */ - for_us = ip_addr_cmp(&dipaddr, &(netif->ip_addr)); - } - - /* ARP message directed to us? */ - if (for_us) { - /* add IP address in ARP cache; assume requester wants to talk to us. - * can result in directly sending the queued packets for this host. */ - update_arp_entry(netif, &sipaddr, &(hdr->shwaddr), ETHARP_TRY_HARD); - /* ARP message not directed to us? */ - } else { - /* update the source IP address in the cache, if present */ - update_arp_entry(netif, &sipaddr, &(hdr->shwaddr), 0); - } - - /* now act on the message itself */ - switch (htons(hdr->opcode)) { - /* ARP request? */ - case ARP_REQUEST: - /* ARP request. If it asked for our address, we send out a - * reply. In any case, we time-stamp any existing ARP entry, - * and possiby send out an IP packet that was queued on it. */ - - LWIP_DEBUGF (ETHARP_DEBUG | DBG_TRACE, ("etharp_arp_input: incoming ARP request\n")); - /* ARP request for our address? */ - if (for_us) { - - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_arp_input: replying to ARP request for our IP address\n")); - /* re-use pbuf to send ARP reply */ - hdr->opcode = htons(ARP_REPLY); - - hdr->dipaddr = hdr->sipaddr; - hdr->sipaddr = *(struct ip_addr2 *)&netif->ip_addr; - - for(i = 0; i < netif->hwaddr_len; ++i) { - hdr->dhwaddr.addr[i] = hdr->shwaddr.addr[i]; - hdr->shwaddr.addr[i] = ethaddr->addr[i]; - hdr->ethhdr.dest.addr[i] = hdr->dhwaddr.addr[i]; - hdr->ethhdr.src.addr[i] = ethaddr->addr[i]; - } - - hdr->hwtype = htons(HWTYPE_ETHERNET); - ARPH_HWLEN_SET(hdr, netif->hwaddr_len); - - hdr->proto = htons(ETHTYPE_IP); - ARPH_PROTOLEN_SET(hdr, sizeof(struct ip_addr)); - - hdr->ethhdr.type = htons(ETHTYPE_ARP); - /* return ARP reply */ - netif->linkoutput(netif, p); - /* we are not configured? */ - } else if (netif->ip_addr.addr == 0) { - /* { for_us == 0 and netif->ip_addr.addr == 0 } */ - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_arp_input: we are unconfigured, ARP request ignored.\n")); - /* request was not directed to us */ - } else { - /* { for_us == 0 and netif->ip_addr.addr != 0 } */ - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_arp_input: ARP request was not for us.\n")); - } - break; - case ARP_REPLY: - /* ARP reply. We already updated the ARP cache earlier. */ - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_arp_input: incoming ARP reply\n")); -#if (LWIP_DHCP && DHCP_DOES_ARP_CHECK) - /* DHCP wants to know about ARP replies from any host with an - * IP address also offered to us by the DHCP server. We do not - * want to take a duplicate IP address on a single network. - * @todo How should we handle redundant (fail-over) interfaces? - * */ - dhcp_arp_reply(netif, &sipaddr); -#endif - break; - default: - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_arp_input: ARP unknown opcode type %"S16_F"\n", htons(hdr->opcode))); - break; - } - /* free ARP packet */ - pbuf_free(p); -} - -/** - * Resolve and fill-in Ethernet address header for outgoing packet. - * - * For IP multicast and broadcast, corresponding Ethernet addresses - * are selected and the packet is transmitted on the link. - * - * For unicast addresses, the packet is submitted to etharp_query(). In - * case the IP address is outside the local network, the IP address of - * the gateway is used. - * - * @param netif The lwIP network interface which the IP packet will be sent on. - * @param ipaddr The IP address of the packet destination. - * @param pbuf The pbuf(s) containing the IP packet to be sent. - * - * @return - * - ERR_RTE No route to destination (no gateway to external networks), - * or the return type of either etharp_query() or netif->linkoutput(). - */ -err_t -etharp_output(struct netif *netif, struct ip_addr *ipaddr, struct pbuf *q) -{ - struct eth_addr *dest, *srcaddr, mcastaddr; - struct eth_hdr *ethhdr; - u8_t i; - - /* make room for Ethernet header - should not fail */ - if (pbuf_header(q, sizeof(struct eth_hdr)) != 0) { - /* bail out */ - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE | 2, ("etharp_output: could not allocate room for header.\n")); - LINK_STATS_INC(link.lenerr); - return ERR_BUF; - } - - /* assume unresolved Ethernet address */ - dest = NULL; - /* Determine on destination hardware address. Broadcasts and multicasts - * are special, other IP addresses are looked up in the ARP table. */ - - /* broadcast destination IP address? */ - if (ip_addr_isbroadcast(ipaddr, netif)) { - /* broadcast on Ethernet also */ - dest = (struct eth_addr *)ðbroadcast; - /* multicast destination IP address? */ - } else if (ip_addr_ismulticast(ipaddr)) { - /* Hash IP multicast address to MAC address.*/ - mcastaddr.addr[0] = 0x01; - mcastaddr.addr[1] = 0x00; - mcastaddr.addr[2] = 0x5e; - mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f; - mcastaddr.addr[4] = ip4_addr3(ipaddr); - mcastaddr.addr[5] = ip4_addr4(ipaddr); - /* destination Ethernet address is multicast */ - dest = &mcastaddr; - /* unicast destination IP address? */ - } else { - /* outside local network? */ - if (!ip_addr_netcmp(ipaddr, &(netif->ip_addr), &(netif->netmask))) { - /* interface has default gateway? */ - if (netif->gw.addr != 0) { - /* send to hardware address of default gateway IP address */ - ipaddr = &(netif->gw); - /* no default gateway available */ - } else { - /* no route to destination error (default gateway missing) */ - return ERR_RTE; - } - } - /* queue on destination Ethernet address belonging to ipaddr */ - return etharp_query(netif, ipaddr, q); - } - - /* continuation for multicast/broadcast destinations */ - /* obtain source Ethernet address of the given interface */ - srcaddr = (struct eth_addr *)netif->hwaddr; - ethhdr = q->payload; - for (i = 0; i < netif->hwaddr_len; i++) { - ethhdr->dest.addr[i] = dest->addr[i]; - ethhdr->src.addr[i] = srcaddr->addr[i]; - } - ethhdr->type = htons(ETHTYPE_IP); - /* send packet directly on the link */ - return netif->linkoutput(netif, q); -} - -/** - * Send an ARP request for the given IP address and/or queue a packet. - * - * If the IP address was not yet in the cache, a pending ARP cache entry - * is added and an ARP request is sent for the given address. The packet - * is queued on this entry. - * - * If the IP address was already pending in the cache, a new ARP request - * is sent for the given address. The packet is queued on this entry. - * - * If the IP address was already stable in the cache, and a packet is - * given, it is directly sent and no ARP request is sent out. - * - * If the IP address was already stable in the cache, and no packet is - * given, an ARP request is sent out. - * - * @param netif The lwIP network interface on which ipaddr - * must be queried for. - * @param ipaddr The IP address to be resolved. - * @param q If non-NULL, a pbuf that must be delivered to the IP address. - * q is not freed by this function. - * - * @return - * - ERR_BUF Could not make room for Ethernet header. - * - ERR_MEM Hardware address unknown, and no more ARP entries available - * to query for address or queue the packet. - * - ERR_MEM Could not queue packet due to memory shortage. - * - ERR_RTE No route to destination (no gateway to external networks). - * - ERR_ARG Non-unicast address given, those will not appear in ARP cache. - * - */ -err_t etharp_query(struct netif *netif, struct ip_addr *ipaddr, struct pbuf *q) -{ - struct eth_addr * srcaddr = (struct eth_addr *)netif->hwaddr; - err_t result = ERR_MEM; - s8_t i; /* ARP entry index */ - u8_t k; /* Ethernet address octet index */ - - /* non-unicast address? */ - if (ip_addr_isbroadcast(ipaddr, netif) || - ip_addr_ismulticast(ipaddr) || - ip_addr_isany(ipaddr)) { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n")); - return ERR_ARG; - } - - /* find entry in ARP cache, ask to create entry if queueing packet */ - i = find_entry(ipaddr, ETHARP_TRY_HARD); - - /* could not find or create entry? */ - if (i < 0) - { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: could not create ARP entry\n")); - if (q) LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: packet dropped\n")); - return (err_t)i; - } - - /* mark a fresh entry as pending (we just sent a request) */ - if (arp_table[i].state == ETHARP_STATE_EMPTY) { - arp_table[i].state = ETHARP_STATE_PENDING; - } - - /* { i is either a STABLE or (new or existing) PENDING entry } */ - LWIP_ASSERT("arp_table[i].state == PENDING or STABLE", - ((arp_table[i].state == ETHARP_STATE_PENDING) || - (arp_table[i].state == ETHARP_STATE_STABLE))); - - /* do we have a pending entry? or an implicit query request? */ - if ((arp_table[i].state == ETHARP_STATE_PENDING) || (q == NULL)) { - /* try to resolve it; send out ARP request */ - result = etharp_request(netif, ipaddr); - } - - /* packet given? */ - if (q != NULL) { - /* stable entry? */ - if (arp_table[i].state == ETHARP_STATE_STABLE) { - /* we have a valid IP->Ethernet address mapping, - * fill in the Ethernet header for the outgoing packet */ - struct eth_hdr *ethhdr = q->payload; - for(k = 0; k < netif->hwaddr_len; k++) { - ethhdr->dest.addr[k] = arp_table[i].ethaddr.addr[k]; - ethhdr->src.addr[k] = srcaddr->addr[k]; - } - ethhdr->type = htons(ETHTYPE_IP); - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: sending packet %p\n", (void *)q)); - /* send the packet */ - result = netif->linkoutput(netif, q); - /* pending entry? (either just created or already pending */ - } else if (arp_table[i].state == ETHARP_STATE_PENDING) { -#if ARP_QUEUEING /* queue the given q packet */ - struct pbuf *p; - /* copy any PBUF_REF referenced payloads into PBUF_RAM */ - /* (the caller of lwIP assumes the referenced payload can be - * freed after it returns from the lwIP call that brought us here) */ - p = pbuf_take(q); - /* packet could be taken over? */ - if (p != NULL) { - /* queue packet ... */ - if (arp_table[i].p == NULL) { - /* ... in the empty queue */ - pbuf_ref(p); - arp_table[i].p = p; -#if 0 /* multi-packet-queueing disabled, see bug #11400 */ - } else { - /* ... at tail of non-empty queue */ - pbuf_queue(arp_table[i].p, p); -#endif - } - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"S16_F"\n", (void *)q, (s16_t)i)); - result = ERR_OK; - } else { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q)); - /* { result == ERR_MEM } through initialization */ - } -#else /* ARP_QUEUEING == 0 */ - /* q && state == PENDING && ARP_QUEUEING == 0 => result = ERR_MEM */ - /* { result == ERR_MEM } through initialization */ - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: Ethernet destination address unknown, queueing disabled, packet %p dropped\n", (void *)q)); -#endif - } - } - return result; -} - -err_t etharp_request(struct netif *netif, struct ip_addr *ipaddr) -{ - struct pbuf *p; - struct eth_addr * srcaddr = (struct eth_addr *)netif->hwaddr; - err_t result = ERR_OK; - u8_t k; /* ARP entry index */ - - /* allocate a pbuf for the outgoing ARP request packet */ - p = pbuf_alloc(PBUF_LINK, sizeof(struct etharp_hdr), PBUF_RAM); - /* could allocate a pbuf for an ARP request? */ - if (p != NULL) { - struct etharp_hdr *hdr = p->payload; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_request: sending ARP request.\n")); - hdr->opcode = htons(ARP_REQUEST); - for (k = 0; k < netif->hwaddr_len; k++) - { - hdr->shwaddr.addr[k] = srcaddr->addr[k]; - /* the hardware address is what we ask for, in - * a request it is a don't-care value, we use zeroes */ - hdr->dhwaddr.addr[k] = 0x00; - } - hdr->dipaddr = *(struct ip_addr2 *)ipaddr; - hdr->sipaddr = *(struct ip_addr2 *)&netif->ip_addr; - - hdr->hwtype = htons(HWTYPE_ETHERNET); - ARPH_HWLEN_SET(hdr, netif->hwaddr_len); - - hdr->proto = htons(ETHTYPE_IP); - ARPH_PROTOLEN_SET(hdr, sizeof(struct ip_addr)); - for (k = 0; k < netif->hwaddr_len; ++k) - { - /* broadcast to all network interfaces on the local network */ - hdr->ethhdr.dest.addr[k] = 0xff; - hdr->ethhdr.src.addr[k] = srcaddr->addr[k]; - } - hdr->ethhdr.type = htons(ETHTYPE_ARP); - /* send ARP query */ - result = netif->linkoutput(netif, p); - /* free ARP query packet */ - pbuf_free(p); - p = NULL; - /* could not allocate pbuf for ARP request */ - } else { - result = ERR_MEM; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE | 2, ("etharp_request: could not allocate pbuf for ARP request.\n")); - } - return result; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ethernetif.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ethernetif.c deleted file mode 100644 index 0c14e8de..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ethernetif.c +++ /dev/null @@ -1,306 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -/* - * This file is a skeleton for developing Ethernet network interface - * drivers for lwIP. Add code to the low_level functions and do a - * search-and-replace for the word "ethernetif" to replace it with - * something that better describes your network interface. - */ - -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/mem.h" -#include "lwip/pbuf.h" -#include "lwip/sys.h" -#include - -#include "netif/etharp.h" - -/* Define those to better describe your network interface. */ -#define IFNAME0 'e' -#define IFNAME1 'n' - -struct ethernetif { - struct eth_addr *ethaddr; - /* Add whatever per-interface state that is needed here. */ -}; - -static const struct eth_addr ethbroadcast = {{0xff,0xff,0xff,0xff,0xff,0xff}}; - -/* Forward declarations. */ -static void ethernetif_input(struct netif *netif); -static err_t ethernetif_output(struct netif *netif, struct pbuf *p, - struct ip_addr *ipaddr); - -static void -low_level_init(struct netif *netif) -{ - struct ethernetif *ethernetif = netif->state; - - /* set MAC hardware address length */ - netif->hwaddr_len = 6; - - /* set MAC hardware address */ - netif->hwaddr[0] = ; - ... - netif->hwaddr[5] = ; - - /* maximum transfer unit */ - netif->mtu = 1500; - - /* broadcast capability */ - netif->flags = NETIF_FLAG_BROADCAST; - - /* Do whatever else is needed to initialize interface. */ -} - -/* - * low_level_output(): - * - * Should do the actual transmission of the packet. The packet is - * contained in the pbuf that is passed to the function. This pbuf - * might be chained. - * - */ - -static err_t -low_level_output(struct netif *netif, struct pbuf *p) -{ - struct ethernetif *ethernetif = netif->state; - struct pbuf *q; - - initiate transfer(); - -#if ETH_PAD_SIZE - pbuf_header(p, -ETH_PAD_SIZE); /* drop the padding word */ -#endif - - for(q = p; q != NULL; q = q->next) { - /* Send the data from the pbuf to the interface, one pbuf at a - time. The size of the data in each pbuf is kept in the ->len - variable. */ - send data from(q->payload, q->len); - } - - signal that packet should be sent(); - -#if ETH_PAD_SIZE - pbuf_header(p, ETH_PAD_SIZE); /* reclaim the padding word */ -#endif - -#if LINK_STATS - lwip_stats.link.xmit++; -#endif /* LINK_STATS */ - - return ERR_OK; -} - -/* - * low_level_input(): - * - * Should allocate a pbuf and transfer the bytes of the incoming - * packet from the interface into the pbuf. - * - */ - -static struct pbuf * -low_level_input(struct netif *netif) -{ - struct ethernetif *ethernetif = netif->state; - struct pbuf *p, *q; - u16_t len; - - /* Obtain the size of the packet and put it into the "len" - variable. */ - len = ; - -#if ETH_PAD_SIZE - len += ETH_PAD_SIZE; /* allow room for Ethernet padding */ -#endif - - /* We allocate a pbuf chain of pbufs from the pool. */ - p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL); - - if (p != NULL) { - -#if ETH_PAD_SIZE - pbuf_header(p, -ETH_PAD_SIZE); /* drop the padding word */ -#endif - - /* We iterate over the pbuf chain until we have read the entire - * packet into the pbuf. */ - for(q = p; q != NULL; q = q->next) { - /* Read enough bytes to fill this pbuf in the chain. The - * available data in the pbuf is given by the q->len - * variable. */ - read data into(q->payload, q->len); - } - acknowledge that packet has been read(); - -#if ETH_PAD_SIZE - pbuf_header(p, ETH_PAD_SIZE); /* reclaim the padding word */ -#endif - -#if LINK_STATS - lwip_stats.link.recv++; -#endif /* LINK_STATS */ - } else { - drop packet(); -#if LINK_STATS - lwip_stats.link.memerr++; - lwip_stats.link.drop++; -#endif /* LINK_STATS */ - } - - return p; -} - -/* - * ethernetif_output(): - * - * This function is called by the TCP/IP stack when an IP packet - * should be sent. It calls the function called low_level_output() to - * do the actual transmission of the packet. - * - */ - -static err_t -ethernetif_output(struct netif *netif, struct pbuf *p, - struct ip_addr *ipaddr) -{ - - /* resolve hardware address, then send (or queue) packet */ - return etharp_output(netif, ipaddr, p); - -} - -/* - * ethernetif_input(): - * - * This function should be called when a packet is ready to be read - * from the interface. It uses the function low_level_input() that - * should handle the actual reception of bytes from the network - * interface. - * - */ - -static void -ethernetif_input(struct netif *netif) -{ - struct ethernetif *ethernetif; - struct eth_hdr *ethhdr; - struct pbuf *p; - - ethernetif = netif->state; - - /* move received packet into a new pbuf */ - p = low_level_input(netif); - /* no packet could be read, silently ignore this */ - if (p == NULL) return; - /* points to packet payload, which starts with an Ethernet header */ - ethhdr = p->payload; - -#if LINK_STATS - lwip_stats.link.recv++; -#endif /* LINK_STATS */ - - ethhdr = p->payload; - - switch (htons(ethhdr->type)) { - /* IP packet? */ - case ETHTYPE_IP: - /* update ARP table */ - etharp_ip_input(netif, p); - /* skip Ethernet header */ - pbuf_header(p, -sizeof(struct eth_hdr)); - /* pass to network layer */ - netif->input(p, netif); - break; - - case ETHTYPE_ARP: - /* pass p to ARP module */ - etharp_arp_input(netif, ethernetif->ethaddr, p); - break; - default: - pbuf_free(p); - p = NULL; - break; - } -} - -static void -arp_timer(void *arg) -{ - etharp_tmr(); - sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL); -} - -/* - * ethernetif_init(): - * - * Should be called at the beginning of the program to set up the - * network interface. It calls the function low_level_init() to do the - * actual setup of the hardware. - * - */ - -err_t -ethernetif_init(struct netif *netif) -{ - struct ethernetif *ethernetif; - - ethernetif = mem_malloc(sizeof(struct ethernetif)); - - if (ethernetif == NULL) - { - LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_init: out of memory\n")); - return ERR_MEM; - } - - netif->state = ethernetif; - netif->name[0] = IFNAME0; - netif->name[1] = IFNAME1; - netif->output = ethernetif_output; - netif->linkoutput = low_level_output; - - ethernetif->ethaddr = (struct eth_addr *)&(netif->hwaddr[0]); - - low_level_init(netif); - - etharp_init(); - - sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL); - - return ERR_OK; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/loopif.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/loopif.c deleted file mode 100644 index 0464cb8e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/loopif.c +++ /dev/null @@ -1,119 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#include "lwip/opt.h" - -#if LWIP_HAVE_LOOPIF - -#include "netif/loopif.h" -#include "lwip/mem.h" - -#if defined(LWIP_DEBUG) && defined(LWIP_TCPDUMP) -#include "netif/tcpdump.h" -#endif /* LWIP_DEBUG && LWIP_TCPDUMP */ - -#include "lwip/tcp.h" -#include "lwip/ip.h" - -static void -loopif_input( void * arg ) -{ - struct netif *netif = (struct netif *)( ((void **)arg)[ 0 ] ); - struct pbuf *r = (struct pbuf *)( ((void **)arg)[ 1 ] ); - - mem_free( arg ); - netif -> input( r, netif ); -} - -static err_t -loopif_output(struct netif *netif, struct pbuf *p, - struct ip_addr *ipaddr) -{ - struct pbuf *q, *r; - u8_t *ptr; - void **arg; - -#if defined(LWIP_DEBUG) && defined(LWIP_TCPDUMP) - tcpdump(p); -#endif /* LWIP_DEBUG && LWIP_TCPDUMP */ - - r = pbuf_alloc(PBUF_RAW, p->tot_len, PBUF_RAM); - if (r != NULL) { - ptr = r->payload; - - for(q = p; q != NULL; q = q->next) { - memcpy(ptr, q->payload, q->len); - ptr += q->len; - } - - arg = mem_malloc( sizeof( void *[2])); - if( NULL == arg ) { - return ERR_MEM; - } - - arg[0] = netif; - arg[1] = r; - /** - * workaround (patch #1779) to try to prevent bug #2595: - * When connecting to "localhost" with the loopif interface, - * tcp_output doesn't get the opportunity to finnish sending the - * segment before tcp_process gets it, resulting in tcp_process - * referencing pcb->unacked-> which still is NULL. - * - * TODO: Is there still a race condition here? Leon - */ - sys_timeout( 1, loopif_input, arg ); - - return ERR_OK; - } - return ERR_MEM; -} - -err_t -loopif_init(struct netif *netif) -{ - netif->name[0] = 'l'; - netif->name[1] = 'o'; -#if 0 /** TODO: I think this should be enabled, or not? Leon */ - netif->input = loopif_input; -#endif - netif->output = loopif_output; - return ERR_OK; -} - -#endif /* LWIP_HAVE_LOOPIF */ - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/auth.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/auth.c deleted file mode 100644 index 33349640..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/auth.c +++ /dev/null @@ -1,927 +0,0 @@ -/***************************************************************************** -* auth.c - Network Authentication and Phase Control program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* Copyright (c) 1997 by Global Election Systems Inc. All rights reserved. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-08 Guy Lancaster , Global Election Systems Inc. -* Ported from public pppd code. -*****************************************************************************/ -/* - * auth.c - PPP authentication and phase control. - * - * Copyright (c) 1993 The Australian National University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by the Australian National University. The name of the University - * may not be used to endorse or promote products derived from this - * software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "fsm.h" -#include "lcp.h" -#include "pap.h" -#include "chap.h" -#include "auth.h" -#include "ipcp.h" - -#if CBCP_SUPPORT > 0 -#include "cbcp.h" -#endif - -#include "pppdebug.h" - - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ - -/* Bits in auth_pending[] */ -#define PAP_WITHPEER 1 -#define PAP_PEER 2 -#define CHAP_WITHPEER 4 -#define CHAP_PEER 8 - - - -/************************/ -/*** LOCAL DATA TYPES ***/ -/************************/ -/* Used for storing a sequence of words. Usually malloced. */ -struct wordlist { - struct wordlist *next; - char word[1]; -}; - - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -extern char *crypt (const char *, const char *); - -/* Prototypes for procedures local to this file. */ - -static void network_phase (int); -static void check_idle (void *); -static void connect_time_expired (void *); -#if 0 -static int login (char *, char *, char **, int *); -#endif -static void logout (void); -static int null_login (int); -static int get_pap_passwd (int, char *, char *); -static int have_pap_secret (void); -static int have_chap_secret (char *, char *, u32_t); -static int ip_addr_check (u32_t, struct wordlist *); -#if 0 /* PAP_SUPPORT > 0 || CHAP_SUPPORT > 0 */ -static void set_allowed_addrs(int unit, struct wordlist *addrs); -static void free_wordlist (struct wordlist *); -#endif -#if CBCP_SUPPORT > 0 -static void callback_phase (int); -#endif - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -#if PAP_SUPPORT > 0 || CHAP_SUPPORT > 0 -/* The name by which the peer authenticated itself to us. */ -static char peer_authname[MAXNAMELEN]; -#endif - -/* Records which authentication operations haven't completed yet. */ -static int auth_pending[NUM_PPP]; - -/* Set if we have successfully called login() */ -static int logged_in; - -/* Set if we have run the /etc/ppp/auth-up script. */ -static int did_authup; - -/* List of addresses which the peer may use. */ -static struct wordlist *addresses[NUM_PPP]; - -/* Number of network protocols which we have opened. */ -static int num_np_open; - -/* Number of network protocols which have come up. */ -static int num_np_up; - -#if PAP_SUPPORT > 0 || CHAP_SUPPORT > 0 -/* Set if we got the contents of passwd[] from the pap-secrets file. */ -static int passwd_from_file; -#endif - - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * An Open on LCP has requested a change from Dead to Establish phase. - * Do what's necessary to bring the physical layer up. - */ -void link_required(int unit) -{ - AUTHDEBUG((LOG_INFO, "link_required: %d\n", unit)); -} - -/* - * LCP has terminated the link; go to the Dead phase and take the - * physical layer down. - */ -void link_terminated(int unit) -{ - AUTHDEBUG((LOG_INFO, "link_terminated: %d\n", unit)); - - if (lcp_phase[unit] == PHASE_DEAD) - return; - if (logged_in) - logout(); - lcp_phase[unit] = PHASE_DEAD; - AUTHDEBUG((LOG_NOTICE, "Connection terminated.\n")); - pppMainWakeup(unit); -} - -/* - * LCP has gone down; it will either die or try to re-establish. - */ -void link_down(int unit) -{ - int i; - struct protent *protp; - - AUTHDEBUG((LOG_INFO, "link_down: %d\n", unit)); - if (did_authup) { - /* XXX Do link down processing. */ - did_authup = 0; - } - for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) { - if (!protp->enabled_flag) - continue; - if (protp->protocol != PPP_LCP && protp->lowerdown != NULL) - (*protp->lowerdown)(unit); - if (protp->protocol < 0xC000 && protp->close != NULL) - (*protp->close)(unit, "LCP down"); - } - num_np_open = 0; - num_np_up = 0; - if (lcp_phase[unit] != PHASE_DEAD) - lcp_phase[unit] = PHASE_TERMINATE; - pppMainWakeup(unit); -} - -/* - * The link is established. - * Proceed to the Dead, Authenticate or Network phase as appropriate. - */ -void link_established(int unit) -{ - int auth; - int i; - struct protent *protp; - lcp_options *wo = &lcp_wantoptions[unit]; - lcp_options *go = &lcp_gotoptions[unit]; -#if PAP_SUPPORT > 0 || CHAP_SUPPORT > 0 - lcp_options *ho = &lcp_hisoptions[unit]; -#endif - - AUTHDEBUG((LOG_INFO, "link_established: %d\n", unit)); - /* - * Tell higher-level protocols that LCP is up. - */ - for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) - if (protp->protocol != PPP_LCP && protp->enabled_flag - && protp->lowerup != NULL) - (*protp->lowerup)(unit); - - if (ppp_settings.auth_required && !(go->neg_chap || go->neg_upap)) { - /* - * We wanted the peer to authenticate itself, and it refused: - * treat it as though it authenticated with PAP using a username - * of "" and a password of "". If that's not OK, boot it out. - */ - if (!wo->neg_upap || !null_login(unit)) { - AUTHDEBUG((LOG_WARNING, "peer refused to authenticate\n")); - lcp_close(unit, "peer refused to authenticate"); - return; - } - } - - lcp_phase[unit] = PHASE_AUTHENTICATE; - auth = 0; -#if CHAP_SUPPORT > 0 - if (go->neg_chap) { - ChapAuthPeer(unit, ppp_settings.our_name, go->chap_mdtype); - auth |= CHAP_PEER; - } -#endif -#if PAP_SUPPORT > 0 && CHAP_SUPPORT > 0 - else -#endif -#if PAP_SUPPORT > 0 - if (go->neg_upap) { - upap_authpeer(unit); - auth |= PAP_PEER; - } -#endif -#if CHAP_SUPPORT > 0 - if (ho->neg_chap) { - ChapAuthWithPeer(unit, ppp_settings.user, ho->chap_mdtype); - auth |= CHAP_WITHPEER; - } -#endif -#if PAP_SUPPORT > 0 && CHAP_SUPPORT > 0 - else -#endif -#if PAP_SUPPORT > 0 - if (ho->neg_upap) { - if (ppp_settings.passwd[0] == 0) { - passwd_from_file = 1; - if (!get_pap_passwd(unit, ppp_settings.user, ppp_settings.passwd)) - AUTHDEBUG((LOG_ERR, "No secret found for PAP login\n")); - } - upap_authwithpeer(unit, ppp_settings.user, ppp_settings.passwd); - auth |= PAP_WITHPEER; - } -#endif - auth_pending[unit] = auth; - - if (!auth) - network_phase(unit); -} - - -/* - * The peer has failed to authenticate himself using `protocol'. - */ -void auth_peer_fail(int unit, u16_t protocol) -{ - AUTHDEBUG((LOG_INFO, "auth_peer_fail: %d proto=%X\n", unit, protocol)); - /* - * Authentication failure: take the link down - */ - lcp_close(unit, "Authentication failed"); -} - - -#if PAP_SUPPORT > 0 || CHAP_SUPPORT > 0 -/* - * The peer has been successfully authenticated using `protocol'. - */ -void auth_peer_success(int unit, u16_t protocol, char *name, int namelen) -{ - int pbit; - - AUTHDEBUG((LOG_INFO, "auth_peer_success: %d proto=%X\n", unit, protocol)); - switch (protocol) { - case PPP_CHAP: - pbit = CHAP_PEER; - break; - case PPP_PAP: - pbit = PAP_PEER; - break; - default: - AUTHDEBUG((LOG_WARNING, "auth_peer_success: unknown protocol %x\n", - protocol)); - return; - } - - /* - * Save the authenticated name of the peer for later. - */ - if (namelen > sizeof(peer_authname) - 1) - namelen = sizeof(peer_authname) - 1; - BCOPY(name, peer_authname, namelen); - peer_authname[namelen] = 0; - - /* - * If there is no more authentication still to be done, - * proceed to the network (or callback) phase. - */ - if ((auth_pending[unit] &= ~pbit) == 0) - network_phase(unit); -} - -/* - * We have failed to authenticate ourselves to the peer using `protocol'. - */ -void auth_withpeer_fail(int unit, u16_t protocol) -{ - int errCode = PPPERR_AUTHFAIL; - - AUTHDEBUG((LOG_INFO, "auth_withpeer_fail: %d proto=%X\n", unit, protocol)); - if (passwd_from_file) - BZERO(ppp_settings.passwd, MAXSECRETLEN); - /* - * XXX Warning: the unit number indicates the interface which is - * not necessarily the PPP connection. It works here as long - * as we are only supporting PPP interfaces. - */ - pppIOCtl(unit, PPPCTLS_ERRCODE, &errCode); - - /* - * We've failed to authenticate ourselves to our peer. - * He'll probably take the link down, and there's not much - * we can do except wait for that. - */ -} - -/* - * We have successfully authenticated ourselves with the peer using `protocol'. - */ -void auth_withpeer_success(int unit, u16_t protocol) -{ - int pbit; - - AUTHDEBUG((LOG_INFO, "auth_withpeer_success: %d proto=%X\n", unit, protocol)); - switch (protocol) { - case PPP_CHAP: - pbit = CHAP_WITHPEER; - break; - case PPP_PAP: - if (passwd_from_file) - BZERO(ppp_settings.passwd, MAXSECRETLEN); - pbit = PAP_WITHPEER; - break; - default: - AUTHDEBUG((LOG_WARNING, "auth_peer_success: unknown protocol %x\n", - protocol)); - pbit = 0; - } - - /* - * If there is no more authentication still being done, - * proceed to the network (or callback) phase. - */ - if ((auth_pending[unit] &= ~pbit) == 0) - network_phase(unit); -} -#endif - - -/* - * np_up - a network protocol has come up. - */ -void np_up(int unit, u16_t proto) -{ - AUTHDEBUG((LOG_INFO, "np_up: %d proto=%X\n", unit, proto)); - if (num_np_up == 0) { - AUTHDEBUG((LOG_INFO, "np_up: maxconnect=%d idle_time_limit=%d\n",ppp_settings.maxconnect,ppp_settings.idle_time_limit)); - /* - * At this point we consider that the link has come up successfully. - */ - if (ppp_settings.idle_time_limit > 0) - TIMEOUT(check_idle, NULL, ppp_settings.idle_time_limit); - - /* - * Set a timeout to close the connection once the maximum - * connect time has expired. - */ - if (ppp_settings.maxconnect > 0) - TIMEOUT(connect_time_expired, 0, ppp_settings.maxconnect); - } - ++num_np_up; -} - -/* - * np_down - a network protocol has gone down. - */ -void np_down(int unit, u16_t proto) -{ - AUTHDEBUG((LOG_INFO, "np_down: %d proto=%X\n", unit, proto)); - if (--num_np_up == 0 && ppp_settings.idle_time_limit > 0) { - UNTIMEOUT(check_idle, NULL); - } -} - -/* - * np_finished - a network protocol has finished using the link. - */ -void np_finished(int unit, u16_t proto) -{ - AUTHDEBUG((LOG_INFO, "np_finished: %d proto=%X\n", unit, proto)); - if (--num_np_open <= 0) { - /* no further use for the link: shut up shop. */ - lcp_close(0, "No network protocols running"); - } -} - -/* - * auth_reset - called when LCP is starting negotiations to recheck - * authentication options, i.e. whether we have appropriate secrets - * to use for authenticating ourselves and/or the peer. - */ -void auth_reset(int unit) -{ - lcp_options *go = &lcp_gotoptions[unit]; - lcp_options *ao = &lcp_allowoptions[0]; - ipcp_options *ipwo = &ipcp_wantoptions[0]; - u32_t remote; - - AUTHDEBUG((LOG_INFO, "auth_reset: %d\n", unit)); - ao->neg_upap = !ppp_settings.refuse_pap && (ppp_settings.passwd[0] != 0 || get_pap_passwd(unit, NULL, NULL)); - ao->neg_chap = !ppp_settings.refuse_chap && ppp_settings.passwd[0] != 0 /*have_chap_secret(ppp_settings.user, ppp_settings.remote_name, (u32_t)0)*/; - - if (go->neg_upap && !have_pap_secret()) - go->neg_upap = 0; - if (go->neg_chap) { - remote = ipwo->accept_remote? 0: ipwo->hisaddr; - if (!have_chap_secret(ppp_settings.remote_name, ppp_settings.our_name, remote)) - go->neg_chap = 0; - } -} - - -#if PAP_SUPPORT > 0 -/* - * check_passwd - Check the user name and passwd against the PAP secrets - * file. If requested, also check against the system password database, - * and login the user if OK. - * - * returns: - * UPAP_AUTHNAK: Authentication failed. - * UPAP_AUTHACK: Authentication succeeded. - * In either case, msg points to an appropriate message. - */ -int check_passwd( - int unit, - char *auser, - int userlen, - char *apasswd, - int passwdlen, - char **msg, - int *msglen -) -{ -#if 1 - *msg = (char *) 0; - return UPAP_AUTHACK; /* XXX Assume all entries OK. */ -#else - int ret = 0; - struct wordlist *addrs = NULL; - char passwd[256], user[256]; - char secret[MAXWORDLEN]; - static u_short attempts = 0; - - /* - * Make copies of apasswd and auser, then null-terminate them. - */ - BCOPY(apasswd, passwd, passwdlen); - passwd[passwdlen] = '\0'; - BCOPY(auser, user, userlen); - user[userlen] = '\0'; - *msg = (char *) 0; - - /* XXX Validate user name and password. */ - ret = UPAP_AUTHACK; /* XXX Assume all entries OK. */ - - if (ret == UPAP_AUTHNAK) { - if (*msg == (char *) 0) - *msg = "Login incorrect"; - *msglen = strlen(*msg); - /* - * Frustrate passwd stealer programs. - * Allow 10 tries, but start backing off after 3 (stolen from login). - * On 10'th, drop the connection. - */ - if (attempts++ >= 10) { - AUTHDEBUG((LOG_WARNING, "%d LOGIN FAILURES BY %s\n", attempts, user)); - /*ppp_panic("Excess Bad Logins");*/ - } - if (attempts > 3) { - sys_msleep((attempts - 3) * 5); - } - if (addrs != NULL) { - free_wordlist(addrs); - } - } else { - attempts = 0; /* Reset count */ - if (*msg == (char *) 0) - *msg = "Login ok"; - *msglen = strlen(*msg); - set_allowed_addrs(unit, addrs); - } - - BZERO(passwd, sizeof(passwd)); - BZERO(secret, sizeof(secret)); - - return ret; -#endif -} -#endif - - -/* - * auth_ip_addr - check whether the peer is authorized to use - * a given IP address. Returns 1 if authorized, 0 otherwise. - */ -int auth_ip_addr(int unit, u32_t addr) -{ - return ip_addr_check(addr, addresses[unit]); -} - -/* - * bad_ip_adrs - return 1 if the IP address is one we don't want - * to use, such as an address in the loopback net or a multicast address. - * addr is in network byte order. - */ -int bad_ip_adrs(u32_t addr) -{ - addr = ntohl(addr); - return (addr >> IN_CLASSA_NSHIFT) == IN_LOOPBACKNET - || IN_MULTICAST(addr) || IN_BADCLASS(addr); -} - - -#if CHAP_SUPPORT > 0 -/* - * get_secret - open the CHAP secret file and return the secret - * for authenticating the given client on the given server. - * (We could be either client or server). - */ -int get_secret( - int unit, - char *client, - char *server, - char *secret, - int *secret_len, - int save_addrs -) -{ -#if 1 - int len; - struct wordlist *addrs; - - addrs = NULL; - - if(!client || !client[0] || strcmp(client, ppp_settings.user)) { - return 0; - } - - len = strlen(ppp_settings.passwd); - if (len > MAXSECRETLEN) { - AUTHDEBUG((LOG_ERR, "Secret for %s on %s is too long\n", client, server)); - len = MAXSECRETLEN; - } - BCOPY(ppp_settings.passwd, secret, len); - *secret_len = len; - - return 1; -#else - int ret = 0, len; - struct wordlist *addrs; - char secbuf[MAXWORDLEN]; - - addrs = NULL; - secbuf[0] = 0; - - /* XXX Find secret. */ - if (ret < 0) - return 0; - - if (save_addrs) - set_allowed_addrs(unit, addrs); - - len = strlen(secbuf); - if (len > MAXSECRETLEN) { - AUTHDEBUG((LOG_ERR, "Secret for %s on %s is too long\n", client, server)); - len = MAXSECRETLEN; - } - BCOPY(secbuf, secret, len); - BZERO(secbuf, sizeof(secbuf)); - *secret_len = len; - - return 1; -#endif -} -#endif - - -#if 0 /* UNUSED */ -/* - * auth_check_options - called to check authentication options. - */ -void auth_check_options(void) -{ - lcp_options *wo = &lcp_wantoptions[0]; - int can_auth; - ipcp_options *ipwo = &ipcp_wantoptions[0]; - u32_t remote; - - /* Default our_name to hostname, and user to our_name */ - if (ppp_settings.our_name[0] == 0 || ppp_settings.usehostname) - strcpy(ppp_settings.our_name, ppp_settings.hostname); - if (ppp_settings.user[0] == 0) - strcpy(ppp_settings.user, ppp_settings.our_name); - - /* If authentication is required, ask peer for CHAP or PAP. */ - if (ppp_settings.auth_required && !wo->neg_chap && !wo->neg_upap) { - wo->neg_chap = 1; - wo->neg_upap = 1; - } - - /* - * Check whether we have appropriate secrets to use - * to authenticate the peer. - */ - can_auth = wo->neg_upap && have_pap_secret(); - if (!can_auth && wo->neg_chap) { - remote = ipwo->accept_remote? 0: ipwo->hisaddr; - can_auth = have_chap_secret(ppp_settings.remote_name, ppp_settings.our_name, remote); - } - - if (ppp_settings.auth_required && !can_auth) { - ppp_panic("No auth secret"); - } -} -#endif - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ -/* - * Proceed to the network phase. - */ -static void network_phase(int unit) -{ - int i; - struct protent *protp; - lcp_options *go = &lcp_gotoptions[unit]; - - /* - * If the peer had to authenticate, run the auth-up script now. - */ - if ((go->neg_chap || go->neg_upap) && !did_authup) { - /* XXX Do setup for peer authentication. */ - did_authup = 1; - } - -#if CBCP_SUPPORT > 0 - /* - * If we negotiated callback, do it now. - */ - if (go->neg_cbcp) { - lcp_phase[unit] = PHASE_CALLBACK; - (*cbcp_protent.open)(unit); - return; - } -#endif - - lcp_phase[unit] = PHASE_NETWORK; - for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) - if (protp->protocol < 0xC000 && protp->enabled_flag - && protp->open != NULL) { - (*protp->open)(unit); - if (protp->protocol != PPP_CCP) - ++num_np_open; - } - - if (num_np_open == 0) - /* nothing to do */ - lcp_close(0, "No network protocols running"); -} - -/* - * check_idle - check whether the link has been idle for long - * enough that we can shut it down. - */ -static void check_idle(void *arg) -{ - struct ppp_idle idle; - u_short itime; - - (void)arg; - if (!get_idle_time(0, &idle)) - return; - itime = LWIP_MIN(idle.xmit_idle, idle.recv_idle); - if (itime >= ppp_settings.idle_time_limit) { - /* link is idle: shut it down. */ - AUTHDEBUG((LOG_INFO, "Terminating connection due to lack of activity.\n")); - lcp_close(0, "Link inactive"); - } else { - TIMEOUT(check_idle, NULL, ppp_settings.idle_time_limit - itime); - } -} - -/* - * connect_time_expired - log a message and close the connection. - */ -static void connect_time_expired(void *arg) -{ - (void)arg; - - AUTHDEBUG((LOG_INFO, "Connect time expired\n")); - lcp_close(0, "Connect time expired"); /* Close connection */ -} - -#if 0 -/* - * login - Check the user name and password against the system - * password database, and login the user if OK. - * - * returns: - * UPAP_AUTHNAK: Login failed. - * UPAP_AUTHACK: Login succeeded. - * In either case, msg points to an appropriate message. - */ -static int login(char *user, char *passwd, char **msg, int *msglen) -{ - /* XXX Fail until we decide that we want to support logins. */ - return (UPAP_AUTHNAK); -} -#endif - -/* - * logout - Logout the user. - */ -static void logout(void) -{ - logged_in = 0; -} - - -/* - * null_login - Check if a username of "" and a password of "" are - * acceptable, and iff so, set the list of acceptable IP addresses - * and return 1. - */ -static int null_login(int unit) -{ - (void)unit; - /* XXX Fail until we decide that we want to support logins. */ - return 0; -} - - -/* - * get_pap_passwd - get a password for authenticating ourselves with - * our peer using PAP. Returns 1 on success, 0 if no suitable password - * could be found. - */ -static int get_pap_passwd(int unit, char *user, char *passwd) -{ -/* normally we would reject PAP if no password is provided, - but this causes problems with some providers (like CHT in Taiwan) - who incorrectly request PAP and expect a bogus/empty password, so - always provide a default user/passwd of "none"/"none" -*/ - if(user) - strcpy(user, "none"); - if(passwd) - strcpy(passwd, "none"); - - return 1; -} - - -/* - * have_pap_secret - check whether we have a PAP file with any - * secrets that we could possibly use for authenticating the peer. - */ -static int have_pap_secret(void) -{ - /* XXX Fail until we set up our passwords. */ - return 0; -} - - -/* - * have_chap_secret - check whether we have a CHAP file with a - * secret that we could possibly use for authenticating `client' - * on `server'. Either can be the null string, meaning we don't - * know the identity yet. - */ -static int have_chap_secret(char *client, char *server, u32_t remote) -{ - (void)client; - (void)server; - (void)remote; - /* XXX Fail until we set up our passwords. */ - return 0; -} - - -#if 0 /* PAP_SUPPORT > 0 || CHAP_SUPPORT > 0 */ -/* - * set_allowed_addrs() - set the list of allowed addresses. - */ -static void set_allowed_addrs(int unit, struct wordlist *addrs) -{ - if (addresses[unit] != NULL) - free_wordlist(addresses[unit]); - addresses[unit] = addrs; - -#if 0 - /* - * If there's only one authorized address we might as well - * ask our peer for that one right away - */ - if (addrs != NULL && addrs->next == NULL) { - char *p = addrs->word; - struct ipcp_options *wo = &ipcp_wantoptions[unit]; - u32_t a; - struct hostent *hp; - - if (wo->hisaddr == 0 && *p != '!' && *p != '-' - && strchr(p, '/') == NULL) { - hp = gethostbyname(p); - if (hp != NULL && hp->h_addrtype == AF_INET) - a = *(u32_t *)hp->h_addr; - else - a = inet_addr(p); - if (a != (u32_t) -1) - wo->hisaddr = a; - } - } -#endif -} -#endif - -static int ip_addr_check(u32_t addr, struct wordlist *addrs) -{ - - /* don't allow loopback or multicast address */ - if (bad_ip_adrs(addr)) - return 0; - - if (addrs == NULL) - return !ppp_settings.auth_required; /* no addresses authorized */ - - /* XXX All other addresses allowed. */ - return 1; -} - -#if 0 /* PAP_SUPPORT > 0 || CHAP_SUPPORT */ -/* - * free_wordlist - release memory allocated for a wordlist. - */ -static void free_wordlist(struct wordlist *wp) -{ - struct wordlist *next; - - while (wp != NULL) { - next = wp->next; - free(wp); - wp = next; - } -} -#endif - -#endif /* PPP_SUPPORT */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/auth.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/auth.h deleted file mode 100644 index d6a5de5b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/auth.h +++ /dev/null @@ -1,94 +0,0 @@ -/***************************************************************************** -* auth.h - PPP Authentication and phase control header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1998 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-04 Guy Lancaster , Global Election Systems Inc. -* Original derived from BSD pppd.h. -*****************************************************************************/ -/* - * pppd.h - PPP daemon global declarations. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - */ - -#ifndef AUTH_H -#define AUTH_H - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ -void link_required (int); /* we are starting to use the link */ -void link_terminated (int); /* we are finished with the link */ -void link_down (int); /* the LCP layer has left the Opened state */ -void link_established (int); /* the link is up; authenticate now */ -void np_up (int, u16_t); /* a network protocol has come up */ -void np_down (int, u16_t); /* a network protocol has gone down */ -void np_finished (int, u16_t); /* a network protocol no longer needs link */ -void auth_peer_fail (int, u16_t);/* peer failed to authenticate itself */ - -/* peer successfully authenticated itself */ -void auth_peer_success (int, u16_t, char *, int); - -/* we failed to authenticate ourselves */ -void auth_withpeer_fail (int, u16_t); - -/* we successfully authenticated ourselves */ -void auth_withpeer_success (int, u16_t); - -/* check authentication options supplied */ -void auth_check_options (void); -void auth_reset (int); /* check what secrets we have */ - -/* Check peer-supplied username/password */ -int check_passwd (int, char *, int, char *, int, char **, int *); - -/* get "secret" for chap */ -int get_secret (int, char *, char *, char *, int *, int); - -/* check if IP address is authorized */ -int auth_ip_addr (int, u32_t); - -/* check if IP address is unreasonable */ -int bad_ip_adrs (u32_t); - - -#endif /* AUTH_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/chap.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/chap.c deleted file mode 100644 index 4d1dc0d2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/chap.c +++ /dev/null @@ -1,872 +0,0 @@ -/*** WARNING - THIS HAS NEVER BEEN FINISHED ***/ -/***************************************************************************** -* chap.c - Network Challenge Handshake Authentication Protocol program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-04 Guy Lancaster , Global Election Systems Inc. -* Original based on BSD chap.c. -*****************************************************************************/ -/* - * chap.c - Challenge Handshake Authentication Protocol. - * - * Copyright (c) 1993 The Australian National University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by the Australian National University. The name of the University - * may not be used to endorse or promote products derived from this - * software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * Copyright (c) 1991 Gregory M. Christy. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Gregory M. Christy. The name of the author may not be used to - * endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "magic.h" - -#if CHAP_SUPPORT > 0 - -#include "randm.h" -#include "auth.h" -#include "md5.h" -#include "chap.h" -#include "chpms.h" -#include "pppdebug.h" - - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ - - -/************************/ -/*** LOCAL DATA TYPES ***/ -/************************/ - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -/* - * Protocol entry points. - */ -static void ChapInit (int); -static void ChapLowerUp (int); -static void ChapLowerDown (int); -static void ChapInput (int, u_char *, int); -static void ChapProtocolReject (int); -static int ChapPrintPkt (u_char *, int, - void (*) (void *, char *, ...), void *); - -static void ChapChallengeTimeout (void *); -static void ChapResponseTimeout (void *); -static void ChapReceiveChallenge (chap_state *, u_char *, int, int); -static void ChapRechallenge (void *); -static void ChapReceiveResponse (chap_state *, u_char *, int, int); -static void ChapReceiveSuccess(chap_state *cstate, u_char *inp, u_char id, int len); -static void ChapReceiveFailure(chap_state *cstate, u_char *inp, u_char id, int len); -static void ChapSendStatus (chap_state *, int); -static void ChapSendChallenge (chap_state *); -static void ChapSendResponse (chap_state *); -static void ChapGenChallenge (chap_state *); - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ -chap_state chap[NUM_PPP]; /* CHAP state; one for each unit */ - -struct protent chap_protent = { - PPP_CHAP, - ChapInit, - ChapInput, - ChapProtocolReject, - ChapLowerUp, - ChapLowerDown, - NULL, - NULL, -#if 0 - ChapPrintPkt, - NULL, -#endif - 1, - "CHAP", -#if 0 - NULL, - NULL, - NULL -#endif -}; - - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -static char *ChapCodenames[] = { - "Challenge", "Response", "Success", "Failure" -}; - - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * ChapAuthWithPeer - Authenticate us with our peer (start client). - * - */ -void ChapAuthWithPeer(int unit, char *our_name, int digest) -{ - chap_state *cstate = &chap[unit]; - - cstate->resp_name = our_name; - cstate->resp_type = digest; - - if (cstate->clientstate == CHAPCS_INITIAL || - cstate->clientstate == CHAPCS_PENDING) { - /* lower layer isn't up - wait until later */ - cstate->clientstate = CHAPCS_PENDING; - return; - } - - /* - * We get here as a result of LCP coming up. - * So even if CHAP was open before, we will - * have to re-authenticate ourselves. - */ - cstate->clientstate = CHAPCS_LISTEN; -} - - -/* - * ChapAuthPeer - Authenticate our peer (start server). - */ -void ChapAuthPeer(int unit, char *our_name, int digest) -{ - chap_state *cstate = &chap[unit]; - - cstate->chal_name = our_name; - cstate->chal_type = digest; - - if (cstate->serverstate == CHAPSS_INITIAL || - cstate->serverstate == CHAPSS_PENDING) { - /* lower layer isn't up - wait until later */ - cstate->serverstate = CHAPSS_PENDING; - return; - } - - ChapGenChallenge(cstate); - ChapSendChallenge(cstate); /* crank it up dude! */ - cstate->serverstate = CHAPSS_INITIAL_CHAL; -} - - - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ -/* - * ChapInit - Initialize a CHAP unit. - */ -static void ChapInit(int unit) -{ - chap_state *cstate = &chap[unit]; - - BZERO(cstate, sizeof(*cstate)); - cstate->unit = unit; - cstate->clientstate = CHAPCS_INITIAL; - cstate->serverstate = CHAPSS_INITIAL; - cstate->timeouttime = CHAP_DEFTIMEOUT; - cstate->max_transmits = CHAP_DEFTRANSMITS; - /* random number generator is initialized in magic_init */ -} - - -/* - * ChapChallengeTimeout - Timeout expired on sending challenge. - */ -static void ChapChallengeTimeout(void *arg) -{ - chap_state *cstate = (chap_state *) arg; - - /* if we aren't sending challenges, don't worry. then again we */ - /* probably shouldn't be here either */ - if (cstate->serverstate != CHAPSS_INITIAL_CHAL && - cstate->serverstate != CHAPSS_RECHALLENGE) - return; - - if (cstate->chal_transmits >= cstate->max_transmits) { - /* give up on peer */ - CHAPDEBUG((LOG_ERR, "Peer failed to respond to CHAP challenge\n")); - cstate->serverstate = CHAPSS_BADAUTH; - auth_peer_fail(cstate->unit, PPP_CHAP); - return; - } - - ChapSendChallenge(cstate); /* Re-send challenge */ -} - - -/* - * ChapResponseTimeout - Timeout expired on sending response. - */ -static void ChapResponseTimeout(void *arg) -{ - chap_state *cstate = (chap_state *) arg; - - /* if we aren't sending a response, don't worry. */ - if (cstate->clientstate != CHAPCS_RESPONSE) - return; - - ChapSendResponse(cstate); /* re-send response */ -} - - -/* - * ChapRechallenge - Time to challenge the peer again. - */ -static void ChapRechallenge(void *arg) -{ - chap_state *cstate = (chap_state *) arg; - - /* if we aren't sending a response, don't worry. */ - if (cstate->serverstate != CHAPSS_OPEN) - return; - - ChapGenChallenge(cstate); - ChapSendChallenge(cstate); - cstate->serverstate = CHAPSS_RECHALLENGE; -} - - -/* - * ChapLowerUp - The lower layer is up. - * - * Start up if we have pending requests. - */ -static void ChapLowerUp(int unit) -{ - chap_state *cstate = &chap[unit]; - - if (cstate->clientstate == CHAPCS_INITIAL) - cstate->clientstate = CHAPCS_CLOSED; - else if (cstate->clientstate == CHAPCS_PENDING) - cstate->clientstate = CHAPCS_LISTEN; - - if (cstate->serverstate == CHAPSS_INITIAL) - cstate->serverstate = CHAPSS_CLOSED; - else if (cstate->serverstate == CHAPSS_PENDING) { - ChapGenChallenge(cstate); - ChapSendChallenge(cstate); - cstate->serverstate = CHAPSS_INITIAL_CHAL; - } -} - - -/* - * ChapLowerDown - The lower layer is down. - * - * Cancel all timeouts. - */ -static void ChapLowerDown(int unit) -{ - chap_state *cstate = &chap[unit]; - - /* Timeout(s) pending? Cancel if so. */ - if (cstate->serverstate == CHAPSS_INITIAL_CHAL || - cstate->serverstate == CHAPSS_RECHALLENGE) - UNTIMEOUT(ChapChallengeTimeout, cstate); - else if (cstate->serverstate == CHAPSS_OPEN - && cstate->chal_interval != 0) - UNTIMEOUT(ChapRechallenge, cstate); - if (cstate->clientstate == CHAPCS_RESPONSE) - UNTIMEOUT(ChapResponseTimeout, cstate); - - cstate->clientstate = CHAPCS_INITIAL; - cstate->serverstate = CHAPSS_INITIAL; -} - - -/* - * ChapProtocolReject - Peer doesn't grok CHAP. - */ -static void ChapProtocolReject(int unit) -{ - chap_state *cstate = &chap[unit]; - - if (cstate->serverstate != CHAPSS_INITIAL && - cstate->serverstate != CHAPSS_CLOSED) - auth_peer_fail(unit, PPP_CHAP); - if (cstate->clientstate != CHAPCS_INITIAL && - cstate->clientstate != CHAPCS_CLOSED) - auth_withpeer_fail(unit, PPP_CHAP); - ChapLowerDown(unit); /* shutdown chap */ -} - - -/* - * ChapInput - Input CHAP packet. - */ -static void ChapInput(int unit, u_char *inpacket, int packet_len) -{ - chap_state *cstate = &chap[unit]; - u_char *inp; - u_char code, id; - int len; - - /* - * Parse header (code, id and length). - * If packet too short, drop it. - */ - inp = inpacket; - if (packet_len < CHAP_HEADERLEN) { - CHAPDEBUG((LOG_INFO, "ChapInput: rcvd short header.\n")); - return; - } - GETCHAR(code, inp); - GETCHAR(id, inp); - GETSHORT(len, inp); - if (len < CHAP_HEADERLEN) { - CHAPDEBUG((LOG_INFO, "ChapInput: rcvd illegal length.\n")); - return; - } - if (len > packet_len) { - CHAPDEBUG((LOG_INFO, "ChapInput: rcvd short packet.\n")); - return; - } - len -= CHAP_HEADERLEN; - - /* - * Action depends on code (as in fact it usually does :-). - */ - switch (code) { - case CHAP_CHALLENGE: - ChapReceiveChallenge(cstate, inp, id, len); - break; - - case CHAP_RESPONSE: - ChapReceiveResponse(cstate, inp, id, len); - break; - - case CHAP_FAILURE: - ChapReceiveFailure(cstate, inp, id, len); - break; - - case CHAP_SUCCESS: - ChapReceiveSuccess(cstate, inp, id, len); - break; - - default: /* Need code reject? */ - CHAPDEBUG((LOG_WARNING, "Unknown CHAP code (%d) received.\n", code)); - break; - } -} - - -/* - * ChapReceiveChallenge - Receive Challenge and send Response. - */ -static void ChapReceiveChallenge(chap_state *cstate, u_char *inp, int id, int len) -{ - int rchallenge_len; - u_char *rchallenge; - int secret_len; - char secret[MAXSECRETLEN]; - char rhostname[256]; - MD5_CTX mdContext; - u_char hash[MD5_SIGNATURE_SIZE]; - - CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: Rcvd id %d.\n", id)); - if (cstate->clientstate == CHAPCS_CLOSED || - cstate->clientstate == CHAPCS_PENDING) { - CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: in state %d\n", - cstate->clientstate)); - return; - } - - if (len < 2) { - CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: rcvd short packet.\n")); - return; - } - - GETCHAR(rchallenge_len, inp); - len -= sizeof (u_char) + rchallenge_len; /* now name field length */ - if (len < 0) { - CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: rcvd short packet.\n")); - return; - } - rchallenge = inp; - INCPTR(rchallenge_len, inp); - - if (len >= sizeof(rhostname)) - len = sizeof(rhostname) - 1; - BCOPY(inp, rhostname, len); - rhostname[len] = '\000'; - - CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: received name field '%s'\n", - rhostname)); - - /* Microsoft doesn't send their name back in the PPP packet */ - if (ppp_settings.remote_name[0] != 0 && (ppp_settings.explicit_remote || rhostname[0] == 0)) { - strncpy(rhostname, ppp_settings.remote_name, sizeof(rhostname)); - rhostname[sizeof(rhostname) - 1] = 0; - CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: using '%s' as remote name\n", - rhostname)); - } - - /* get secret for authenticating ourselves with the specified host */ - if (!get_secret(cstate->unit, cstate->resp_name, rhostname, - secret, &secret_len, 0)) { - secret_len = 0; /* assume null secret if can't find one */ - CHAPDEBUG((LOG_WARNING, "No CHAP secret found for authenticating us to %s\n", rhostname)); - } - - /* cancel response send timeout if necessary */ - if (cstate->clientstate == CHAPCS_RESPONSE) - UNTIMEOUT(ChapResponseTimeout, cstate); - - cstate->resp_id = id; - cstate->resp_transmits = 0; - - /* generate MD based on negotiated type */ - switch (cstate->resp_type) { - - case CHAP_DIGEST_MD5: - MD5Init(&mdContext); - MD5Update(&mdContext, &cstate->resp_id, 1); - MD5Update(&mdContext, (u_char*)secret, secret_len); - MD5Update(&mdContext, rchallenge, rchallenge_len); - MD5Final(hash, &mdContext); - BCOPY(hash, cstate->response, MD5_SIGNATURE_SIZE); - cstate->resp_length = MD5_SIGNATURE_SIZE; - break; - -#ifdef CHAPMS - case CHAP_MICROSOFT: - ChapMS(cstate, rchallenge, rchallenge_len, secret, secret_len); - break; -#endif - - default: - CHAPDEBUG((LOG_INFO, "unknown digest type %d\n", cstate->resp_type)); - return; - } - - BZERO(secret, sizeof(secret)); - ChapSendResponse(cstate); -} - - -/* - * ChapReceiveResponse - Receive and process response. - */ -static void ChapReceiveResponse(chap_state *cstate, u_char *inp, int id, int len) -{ - u_char *remmd, remmd_len; - int secret_len, old_state; - int code; - char rhostname[256]; - MD5_CTX mdContext; - char secret[MAXSECRETLEN]; - u_char hash[MD5_SIGNATURE_SIZE]; - - CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: Rcvd id %d.\n", id)); - - if (cstate->serverstate == CHAPSS_CLOSED || - cstate->serverstate == CHAPSS_PENDING) { - CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: in state %d\n", - cstate->serverstate)); - return; - } - - if (id != cstate->chal_id) - return; /* doesn't match ID of last challenge */ - - /* - * If we have received a duplicate or bogus Response, - * we have to send the same answer (Success/Failure) - * as we did for the first Response we saw. - */ - if (cstate->serverstate == CHAPSS_OPEN) { - ChapSendStatus(cstate, CHAP_SUCCESS); - return; - } - if (cstate->serverstate == CHAPSS_BADAUTH) { - ChapSendStatus(cstate, CHAP_FAILURE); - return; - } - - if (len < 2) { - CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: rcvd short packet.\n")); - return; - } - GETCHAR(remmd_len, inp); /* get length of MD */ - remmd = inp; /* get pointer to MD */ - INCPTR(remmd_len, inp); - - len -= sizeof (u_char) + remmd_len; - if (len < 0) { - CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: rcvd short packet.\n")); - return; - } - - UNTIMEOUT(ChapChallengeTimeout, cstate); - - if (len >= sizeof(rhostname)) - len = sizeof(rhostname) - 1; - BCOPY(inp, rhostname, len); - rhostname[len] = '\000'; - - CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: received name field: %s\n", - rhostname)); - - /* - * Get secret for authenticating them with us, - * do the hash ourselves, and compare the result. - */ - code = CHAP_FAILURE; - if (!get_secret(cstate->unit, rhostname, cstate->chal_name, - secret, &secret_len, 1)) { -/* CHAPDEBUG((LOG_WARNING, TL_CHAP, "No CHAP secret found for authenticating %s\n", rhostname)); */ - CHAPDEBUG((LOG_WARNING, "No CHAP secret found for authenticating %s\n", - rhostname)); - } else { - - /* generate MD based on negotiated type */ - switch (cstate->chal_type) { - - case CHAP_DIGEST_MD5: /* only MD5 is defined for now */ - if (remmd_len != MD5_SIGNATURE_SIZE) - break; /* it's not even the right length */ - MD5Init(&mdContext); - MD5Update(&mdContext, &cstate->chal_id, 1); - MD5Update(&mdContext, (u_char*)secret, secret_len); - MD5Update(&mdContext, cstate->challenge, cstate->chal_len); - MD5Final(hash, &mdContext); - - /* compare local and remote MDs and send the appropriate status */ - if (memcmp (hash, remmd, MD5_SIGNATURE_SIZE) == 0) - code = CHAP_SUCCESS; /* they are the same! */ - break; - - default: - CHAPDEBUG((LOG_INFO, "unknown digest type %d\n", cstate->chal_type)); - } - } - - BZERO(secret, sizeof(secret)); - ChapSendStatus(cstate, code); - - if (code == CHAP_SUCCESS) { - old_state = cstate->serverstate; - cstate->serverstate = CHAPSS_OPEN; - if (old_state == CHAPSS_INITIAL_CHAL) { - auth_peer_success(cstate->unit, PPP_CHAP, rhostname, len); - } - if (cstate->chal_interval != 0) - TIMEOUT(ChapRechallenge, cstate, cstate->chal_interval); - } else { - CHAPDEBUG((LOG_ERR, "CHAP peer authentication failed\n")); - cstate->serverstate = CHAPSS_BADAUTH; - auth_peer_fail(cstate->unit, PPP_CHAP); - } -} - -/* - * ChapReceiveSuccess - Receive Success - */ -static void ChapReceiveSuccess(chap_state *cstate, u_char *inp, u_char id, int len) -{ - - CHAPDEBUG((LOG_INFO, "ChapReceiveSuccess: Rcvd id %d.\n", id)); - - if (cstate->clientstate == CHAPCS_OPEN) - /* presumably an answer to a duplicate response */ - return; - - if (cstate->clientstate != CHAPCS_RESPONSE) { - /* don't know what this is */ - CHAPDEBUG((LOG_INFO, "ChapReceiveSuccess: in state %d\n", - cstate->clientstate)); - return; - } - - UNTIMEOUT(ChapResponseTimeout, cstate); - - /* - * Print message. - */ - if (len > 0) - PRINTMSG(inp, len); - - cstate->clientstate = CHAPCS_OPEN; - - auth_withpeer_success(cstate->unit, PPP_CHAP); -} - - -/* - * ChapReceiveFailure - Receive failure. - */ -static void ChapReceiveFailure(chap_state *cstate, u_char *inp, u_char id, int len) -{ - CHAPDEBUG((LOG_INFO, "ChapReceiveFailure: Rcvd id %d.\n", id)); - - if (cstate->clientstate != CHAPCS_RESPONSE) { - /* don't know what this is */ - CHAPDEBUG((LOG_INFO, "ChapReceiveFailure: in state %d\n", - cstate->clientstate)); - return; - } - - UNTIMEOUT(ChapResponseTimeout, cstate); - - /* - * Print message. - */ - if (len > 0) - PRINTMSG(inp, len); - - CHAPDEBUG((LOG_ERR, "CHAP authentication failed\n")); - auth_withpeer_fail(cstate->unit, PPP_CHAP); -} - - -/* - * ChapSendChallenge - Send an Authenticate challenge. - */ -static void ChapSendChallenge(chap_state *cstate) -{ - u_char *outp; - int chal_len, name_len; - int outlen; - - chal_len = cstate->chal_len; - name_len = strlen(cstate->chal_name); - outlen = CHAP_HEADERLEN + sizeof (u_char) + chal_len + name_len; - outp = outpacket_buf[cstate->unit]; - - MAKEHEADER(outp, PPP_CHAP); /* paste in a CHAP header */ - - PUTCHAR(CHAP_CHALLENGE, outp); - PUTCHAR(cstate->chal_id, outp); - PUTSHORT(outlen, outp); - - PUTCHAR(chal_len, outp); /* put length of challenge */ - BCOPY(cstate->challenge, outp, chal_len); - INCPTR(chal_len, outp); - - BCOPY(cstate->chal_name, outp, name_len); /* append hostname */ - - pppWrite(cstate->unit, outpacket_buf[cstate->unit], outlen + PPP_HDRLEN); - - CHAPDEBUG((LOG_INFO, "ChapSendChallenge: Sent id %d.\n", cstate->chal_id)); - - TIMEOUT(ChapChallengeTimeout, cstate, cstate->timeouttime); - ++cstate->chal_transmits; -} - - -/* - * ChapSendStatus - Send a status response (ack or nak). - */ -static void ChapSendStatus(chap_state *cstate, int code) -{ - u_char *outp; - int outlen, msglen; - char msg[256]; - - if (code == CHAP_SUCCESS) - strcpy(msg, "Welcome!"); - else - strcpy(msg, "I don't like you. Go 'way."); - msglen = strlen(msg); - - outlen = CHAP_HEADERLEN + msglen; - outp = outpacket_buf[cstate->unit]; - - MAKEHEADER(outp, PPP_CHAP); /* paste in a header */ - - PUTCHAR(code, outp); - PUTCHAR(cstate->chal_id, outp); - PUTSHORT(outlen, outp); - BCOPY(msg, outp, msglen); - pppWrite(cstate->unit, outpacket_buf[cstate->unit], outlen + PPP_HDRLEN); - - CHAPDEBUG((LOG_INFO, "ChapSendStatus: Sent code %d, id %d.\n", code, - cstate->chal_id)); -} - -/* - * ChapGenChallenge is used to generate a pseudo-random challenge string of - * a pseudo-random length between min_len and max_len. The challenge - * string and its length are stored in *cstate, and various other fields of - * *cstate are initialized. - */ - -static void ChapGenChallenge(chap_state *cstate) -{ - int chal_len; - u_char *ptr = cstate->challenge; - int i; - - /* pick a random challenge length between MIN_CHALLENGE_LENGTH and - MAX_CHALLENGE_LENGTH */ - chal_len = (unsigned) - ((((magic() >> 16) * - (MAX_CHALLENGE_LENGTH - MIN_CHALLENGE_LENGTH)) >> 16) - + MIN_CHALLENGE_LENGTH); - cstate->chal_len = chal_len; - cstate->chal_id = ++cstate->id; - cstate->chal_transmits = 0; - - /* generate a random string */ - for (i = 0; i < chal_len; i++ ) - *ptr++ = (char) (magic() & 0xff); -} - -/* - * ChapSendResponse - send a response packet with values as specified - * in *cstate. - */ -/* ARGSUSED */ -static void ChapSendResponse(chap_state *cstate) -{ - u_char *outp; - int outlen, md_len, name_len; - - md_len = cstate->resp_length; - name_len = strlen(cstate->resp_name); - outlen = CHAP_HEADERLEN + sizeof (u_char) + md_len + name_len; - outp = outpacket_buf[cstate->unit]; - - MAKEHEADER(outp, PPP_CHAP); - - PUTCHAR(CHAP_RESPONSE, outp); /* we are a response */ - PUTCHAR(cstate->resp_id, outp); /* copy id from challenge packet */ - PUTSHORT(outlen, outp); /* packet length */ - - PUTCHAR(md_len, outp); /* length of MD */ - BCOPY(cstate->response, outp, md_len); /* copy MD to buffer */ - INCPTR(md_len, outp); - - BCOPY(cstate->resp_name, outp, name_len); /* append our name */ - - /* send the packet */ - pppWrite(cstate->unit, outpacket_buf[cstate->unit], outlen + PPP_HDRLEN); - - cstate->clientstate = CHAPCS_RESPONSE; - TIMEOUT(ChapResponseTimeout, cstate, cstate->timeouttime); - ++cstate->resp_transmits; -} - -/* - * ChapPrintPkt - print the contents of a CHAP packet. - */ -static int ChapPrintPkt( - u_char *p, - int plen, - void (*printer) (void *, char *, ...), - void *arg -) -{ - int code, id, len; - int clen, nlen; - u_char x; - - if (plen < CHAP_HEADERLEN) - return 0; - GETCHAR(code, p); - GETCHAR(id, p); - GETSHORT(len, p); - if (len < CHAP_HEADERLEN || len > plen) - return 0; - - if (code >= 1 && code <= sizeof(ChapCodenames) / sizeof(char *)) - printer(arg, " %s", ChapCodenames[code-1]); - else - printer(arg, " code=0x%x", code); - printer(arg, " id=0x%x", id); - len -= CHAP_HEADERLEN; - switch (code) { - case CHAP_CHALLENGE: - case CHAP_RESPONSE: - if (len < 1) - break; - clen = p[0]; - if (len < clen + 1) - break; - ++p; - nlen = len - clen - 1; - printer(arg, " <"); - for (; clen > 0; --clen) { - GETCHAR(x, p); - printer(arg, "%.2x", x); - } - printer(arg, ">, name = %.*Z", nlen, p); - break; - case CHAP_FAILURE: - case CHAP_SUCCESS: - printer(arg, " %.*Z", len, p); - break; - default: - for (clen = len; clen > 0; --clen) { - GETCHAR(x, p); - printer(arg, " %.2x", x); - } - } - - return len + CHAP_HEADERLEN; -} - -#endif - -#endif /* PPP_SUPPORT */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/chap.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/chap.h deleted file mode 100644 index 9a4ea4fc..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/chap.h +++ /dev/null @@ -1,167 +0,0 @@ -/***************************************************************************** -* chap.h - Network Challenge Handshake Authentication Protocol header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1998 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-03 Guy Lancaster , Global Election Systems Inc. -* Original built from BSD network code. -******************************************************************************/ -/* - * chap.h - Challenge Handshake Authentication Protocol definitions. - * - * Copyright (c) 1993 The Australian National University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by the Australian National University. The name of the University - * may not be used to endorse or promote products derived from this - * software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * Copyright (c) 1991 Gregory M. Christy - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by the author. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * $Id$ - */ - -#ifndef CHAP_H -#define CHAP_H - -/************************* -*** PUBLIC DEFINITIONS *** -*************************/ - -/* Code + ID + length */ -#define CHAP_HEADERLEN 4 - -/* - * CHAP codes. - */ - -#define CHAP_DIGEST_MD5 5 /* use MD5 algorithm */ -#define MD5_SIGNATURE_SIZE 16 /* 16 bytes in a MD5 message digest */ -#define CHAP_MICROSOFT 0x80 /* use Microsoft-compatible alg. */ -#define MS_CHAP_RESPONSE_LEN 49 /* Response length for MS-CHAP */ - -#define CHAP_CHALLENGE 1 -#define CHAP_RESPONSE 2 -#define CHAP_SUCCESS 3 -#define CHAP_FAILURE 4 - -/* - * Challenge lengths (for challenges we send) and other limits. - */ -#define MIN_CHALLENGE_LENGTH 32 -#define MAX_CHALLENGE_LENGTH 64 -#define MAX_RESPONSE_LENGTH 64 /* sufficient for MD5 or MS-CHAP */ - -/* - * Client (peer) states. - */ -#define CHAPCS_INITIAL 0 /* Lower layer down, not opened */ -#define CHAPCS_CLOSED 1 /* Lower layer up, not opened */ -#define CHAPCS_PENDING 2 /* Auth us to peer when lower up */ -#define CHAPCS_LISTEN 3 /* Listening for a challenge */ -#define CHAPCS_RESPONSE 4 /* Sent response, waiting for status */ -#define CHAPCS_OPEN 5 /* We've received Success */ - -/* - * Server (authenticator) states. - */ -#define CHAPSS_INITIAL 0 /* Lower layer down, not opened */ -#define CHAPSS_CLOSED 1 /* Lower layer up, not opened */ -#define CHAPSS_PENDING 2 /* Auth peer when lower up */ -#define CHAPSS_INITIAL_CHAL 3 /* We've sent the first challenge */ -#define CHAPSS_OPEN 4 /* We've sent a Success msg */ -#define CHAPSS_RECHALLENGE 5 /* We've sent another challenge */ -#define CHAPSS_BADAUTH 6 /* We've sent a Failure msg */ - -/************************ -*** PUBLIC DATA TYPES *** -************************/ - -/* - * Each interface is described by a chap structure. - */ - -typedef struct chap_state { - int unit; /* Interface unit number */ - int clientstate; /* Client state */ - int serverstate; /* Server state */ - u_char challenge[MAX_CHALLENGE_LENGTH]; /* last challenge string sent */ - u_char chal_len; /* challenge length */ - u_char chal_id; /* ID of last challenge */ - u_char chal_type; /* hash algorithm for challenges */ - u_char id; /* Current id */ - char *chal_name; /* Our name to use with challenge */ - int chal_interval; /* Time until we challenge peer again */ - int timeouttime; /* Timeout time in seconds */ - int max_transmits; /* Maximum # of challenge transmissions */ - int chal_transmits; /* Number of transmissions of challenge */ - int resp_transmits; /* Number of transmissions of response */ - u_char response[MAX_RESPONSE_LENGTH]; /* Response to send */ - u_char resp_length; /* length of response */ - u_char resp_id; /* ID for response messages */ - u_char resp_type; /* hash algorithm for responses */ - char *resp_name; /* Our name to send with response */ -} chap_state; - - -/****************** -*** PUBLIC DATA *** -******************/ -extern chap_state chap[]; - -extern struct protent chap_protent; - - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ - -void ChapAuthWithPeer (int, char *, int); -void ChapAuthPeer (int, char *, int); - -#endif /* CHAP_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/chpms.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/chpms.c deleted file mode 100644 index 01755ba3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/chpms.c +++ /dev/null @@ -1,398 +0,0 @@ -/*** WARNING - THIS CODE HAS NOT BEEN FINISHED! ***/ -/***************************************************************************** -* chpms.c - Network MicroSoft Challenge Handshake Authentication Protocol program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* Copyright (c) 1997 by Global Election Systems Inc. All rights reserved. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-08 Guy Lancaster , Global Election Systems Inc. -* Original based on BSD chap_ms.c. -*****************************************************************************/ -/* - * chap_ms.c - Microsoft MS-CHAP compatible implementation. - * - * Copyright (c) 1995 Eric Rosenquist, Strata Software Limited. - * http://www.strataware.com/ - * - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Eric Rosenquist. The name of the author may not be used to - * endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -/* - * Modifications by Lauri Pesonen / lpesonen@clinet.fi, april 1997 - * - * Implemented LANManager type password response to MS-CHAP challenges. - * Now pppd provides both NT style and LANMan style blocks, and the - * prefered is set by option "ms-lanman". Default is to use NT. - * The hash text (StdText) was taken from Win95 RASAPI32.DLL. - * - * You should also use DOMAIN\\USERNAME as described in README.MSCHAP80 - */ - -#define USE_CRYPT - - -#include "ppp.h" - -#if MSCHAP_SUPPORT > 0 - -#include "md4.h" -#ifndef USE_CRYPT -#include "des.h" -#endif -#include "chap.h" -#include "chpms.h" -#include "pppdebug.h" - - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ - - -/************************/ -/*** LOCAL DATA TYPES ***/ -/************************/ -typedef struct { - u_char LANManResp[24]; - u_char NTResp[24]; - u_char UseNT; /* If 1, ignore the LANMan response field */ -} MS_ChapResponse; -/* We use MS_CHAP_RESPONSE_LEN, rather than sizeof(MS_ChapResponse), - in case this struct gets padded. */ - - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ - -/* XXX Don't know what to do with these. */ -extern void setkey(const char *); -extern void encrypt(char *, int); - -static void DesEncrypt (u_char *, u_char *, u_char *); -static void MakeKey (u_char *, u_char *); - -#ifdef USE_CRYPT -static void Expand (u_char *, u_char *); -static void Collapse (u_char *, u_char *); -#endif - -static void ChallengeResponse( - u_char *challenge, /* IN 8 octets */ - u_char *pwHash, /* IN 16 octets */ - u_char *response /* OUT 24 octets */ -); -static void ChapMS_NT( - char *rchallenge, - int rchallenge_len, - char *secret, - int secret_len, - MS_ChapResponse *response -); -static u_char Get7Bits( - u_char *input, - int startBit -); - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -void ChapMS( - chap_state *cstate, - char *rchallenge, - int rchallenge_len, - char *secret, - int secret_len -) -{ - MS_ChapResponse response; -#ifdef MSLANMAN - extern int ms_lanman; -#endif - -#if 0 - CHAPDEBUG((LOG_INFO, "ChapMS: secret is '%.*s'\n", secret_len, secret)); -#endif - BZERO(&response, sizeof(response)); - - /* Calculate both always */ - ChapMS_NT(rchallenge, rchallenge_len, secret, secret_len, &response); - -#ifdef MSLANMAN - ChapMS_LANMan(rchallenge, rchallenge_len, secret, secret_len, &response); - - /* prefered method is set by option */ - response.UseNT = !ms_lanman; -#else - response.UseNT = 1; -#endif - - BCOPY(&response, cstate->response, MS_CHAP_RESPONSE_LEN); - cstate->resp_length = MS_CHAP_RESPONSE_LEN; -} - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ -static void ChallengeResponse( - u_char *challenge, /* IN 8 octets */ - u_char *pwHash, /* IN 16 octets */ - u_char *response /* OUT 24 octets */ -) -{ - char ZPasswordHash[21]; - - BZERO(ZPasswordHash, sizeof(ZPasswordHash)); - BCOPY(pwHash, ZPasswordHash, 16); - -#if 0 - log_packet(ZPasswordHash, sizeof(ZPasswordHash), "ChallengeResponse - ZPasswordHash", LOG_DEBUG); -#endif - - DesEncrypt(challenge, ZPasswordHash + 0, response + 0); - DesEncrypt(challenge, ZPasswordHash + 7, response + 8); - DesEncrypt(challenge, ZPasswordHash + 14, response + 16); - -#if 0 - log_packet(response, 24, "ChallengeResponse - response", LOG_DEBUG); -#endif -} - - -#ifdef USE_CRYPT -static void DesEncrypt( - u_char *clear, /* IN 8 octets */ - u_char *key, /* IN 7 octets */ - u_char *cipher /* OUT 8 octets */ -) -{ - u_char des_key[8]; - u_char crypt_key[66]; - u_char des_input[66]; - - MakeKey(key, des_key); - - Expand(des_key, crypt_key); - setkey(crypt_key); - -#if 0 - CHAPDEBUG((LOG_INFO, "DesEncrypt: 8 octet input : %02X%02X%02X%02X%02X%02X%02X%02X\n", - clear[0], clear[1], clear[2], clear[3], clear[4], clear[5], clear[6], clear[7])); -#endif - - Expand(clear, des_input); - encrypt(des_input, 0); - Collapse(des_input, cipher); - -#if 0 - CHAPDEBUG((LOG_INFO, "DesEncrypt: 8 octet output: %02X%02X%02X%02X%02X%02X%02X%02X\n", - cipher[0], cipher[1], cipher[2], cipher[3], cipher[4], cipher[5], cipher[6], cipher[7])); -#endif -} - -#else /* USE_CRYPT */ - -static void DesEncrypt( - u_char *clear, /* IN 8 octets */ - u_char *key, /* IN 7 octets */ - u_char *cipher /* OUT 8 octets */ -) -{ - des_cblock des_key; - des_key_schedule key_schedule; - - MakeKey(key, des_key); - - des_set_key(&des_key, key_schedule); - -#if 0 - CHAPDEBUG((LOG_INFO, "DesEncrypt: 8 octet input : %02X%02X%02X%02X%02X%02X%02X%02X\n", - clear[0], clear[1], clear[2], clear[3], clear[4], clear[5], clear[6], clear[7])); -#endif - - des_ecb_encrypt((des_cblock *)clear, (des_cblock *)cipher, key_schedule, 1); - -#if 0 - CHAPDEBUG((LOG_INFO, "DesEncrypt: 8 octet output: %02X%02X%02X%02X%02X%02X%02X%02X\n", - cipher[0], cipher[1], cipher[2], cipher[3], cipher[4], cipher[5], cipher[6], cipher[7])); -#endif -} - -#endif /* USE_CRYPT */ - - -static u_char Get7Bits( - u_char *input, - int startBit -) -{ - register unsigned int word; - - word = (unsigned)input[startBit / 8] << 8; - word |= (unsigned)input[startBit / 8 + 1]; - - word >>= 15 - (startBit % 8 + 7); - - return word & 0xFE; -} - -#ifdef USE_CRYPT - -/* in == 8-byte string (expanded version of the 56-bit key) - * out == 64-byte string where each byte is either 1 or 0 - * Note that the low-order "bit" is always ignored by by setkey() - */ -static void Expand(u_char *in, u_char *out) -{ - int j, c; - int i; - - for(i = 0; i < 64; in++){ - c = *in; - for(j = 7; j >= 0; j--) - *out++ = (c >> j) & 01; - i += 8; - } -} - -/* The inverse of Expand - */ -static void Collapse(u_char *in, u_char *out) -{ - int j; - int i; - unsigned int c; - - for (i = 0; i < 64; i += 8, out++) { - c = 0; - for (j = 7; j >= 0; j--, in++) - c |= *in << j; - *out = c & 0xff; - } -} -#endif - -static void MakeKey( - u_char *key, /* IN 56 bit DES key missing parity bits */ - u_char *des_key /* OUT 64 bit DES key with parity bits added */ -) -{ - des_key[0] = Get7Bits(key, 0); - des_key[1] = Get7Bits(key, 7); - des_key[2] = Get7Bits(key, 14); - des_key[3] = Get7Bits(key, 21); - des_key[4] = Get7Bits(key, 28); - des_key[5] = Get7Bits(key, 35); - des_key[6] = Get7Bits(key, 42); - des_key[7] = Get7Bits(key, 49); - -#ifndef USE_CRYPT - des_set_odd_parity((des_cblock *)des_key); -#endif - -#if 0 - CHAPDEBUG((LOG_INFO, "MakeKey: 56-bit input : %02X%02X%02X%02X%02X%02X%02X\n", - key[0], key[1], key[2], key[3], key[4], key[5], key[6])); - CHAPDEBUG((LOG_INFO, "MakeKey: 64-bit output: %02X%02X%02X%02X%02X%02X%02X%02X\n", - des_key[0], des_key[1], des_key[2], des_key[3], des_key[4], des_key[5], des_key[6], des_key[7])); -#endif -} - -static void ChapMS_NT( - char *rchallenge, - int rchallenge_len, - char *secret, - int secret_len, - MS_ChapResponse *response -) -{ - int i; - MDstruct md4Context; - u_char unicodePassword[MAX_NT_PASSWORD * 2]; - static int low_byte_first = -1; - - /* Initialize the Unicode version of the secret (== password). */ - /* This implicitly supports 8-bit ISO8859/1 characters. */ - BZERO(unicodePassword, sizeof(unicodePassword)); - for (i = 0; i < secret_len; i++) - unicodePassword[i * 2] = (u_char)secret[i]; - - MDbegin(&md4Context); - MDupdate(&md4Context, unicodePassword, secret_len * 2 * 8); /* Unicode is 2 bytes/char, *8 for bit count */ - - if (low_byte_first == -1) - low_byte_first = (htons((unsigned short int)1) != 1); - if (low_byte_first == 0) - MDreverse((u_long *)&md4Context); /* sfb 961105 */ - - MDupdate(&md4Context, NULL, 0); /* Tell MD4 we're done */ - - ChallengeResponse(rchallenge, (char *)md4Context.buffer, response->NTResp); -} - -#ifdef MSLANMAN -static u_char *StdText = (u_char *)"KGS!@#$%"; /* key from rasapi32.dll */ - -static ChapMS_LANMan( - char *rchallenge, - int rchallenge_len, - char *secret, - int secret_len, - MS_ChapResponse *response -) -{ - int i; - u_char UcasePassword[MAX_NT_PASSWORD]; /* max is actually 14 */ - u_char PasswordHash[16]; - - /* LANMan password is case insensitive */ - BZERO(UcasePassword, sizeof(UcasePassword)); - for (i = 0; i < secret_len; i++) - UcasePassword[i] = (u_char)toupper(secret[i]); - DesEncrypt( StdText, UcasePassword + 0, PasswordHash + 0 ); - DesEncrypt( StdText, UcasePassword + 7, PasswordHash + 8 ); - ChallengeResponse(rchallenge, PasswordHash, response->LANManResp); -} -#endif - -#endif /* MSCHAP_SUPPORT */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/chpms.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/chpms.h deleted file mode 100644 index 1a2bd41d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/chpms.h +++ /dev/null @@ -1,64 +0,0 @@ -/***************************************************************************** -* chpms.h - Network Microsoft Challenge Handshake Protocol header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1998 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 98-01-30 Guy Lancaster , Global Election Systems Inc. -* Original built from BSD network code. -******************************************************************************/ -/* - * chap.h - Challenge Handshake Authentication Protocol definitions. - * - * Copyright (c) 1995 Eric Rosenquist, Strata Software Limited. - * http://www.strataware.com/ - * - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Eric Rosenquist. The name of the author may not be used to - * endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * $Id$ - */ - -#ifndef CHPMS_H -#define CHPMS_H - -#define MAX_NT_PASSWORD 256 /* Maximum number of (Unicode) chars in an NT password */ - -void ChapMS (chap_state *, char *, int, char *, int); - -#endif /* CHPMS_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/fsm.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/fsm.c deleted file mode 100644 index fe8b38a9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/fsm.c +++ /dev/null @@ -1,838 +0,0 @@ -/***************************************************************************** -* fsm.c - Network Control Protocol Finite State Machine program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-01 Guy Lancaster , Global Election Systems Inc. -* Original based on BSD fsm.c. -*****************************************************************************/ -/* - * fsm.c - {Link, IP} Control Protocol Finite State Machine. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - - -/* - * TODO: - * Randomize fsm id on link/init. - * Deal with variable outgoing MTU. - */ - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "fsm.h" -#include "pppdebug.h" - - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ - - -/************************/ -/*** LOCAL DATA TYPES ***/ -/************************/ - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -static void fsm_timeout (void *); -static void fsm_rconfreq (fsm *, u_char, u_char *, int); -static void fsm_rconfack (fsm *, int, u_char *, int); -static void fsm_rconfnakrej (fsm *, int, int, u_char *, int); -static void fsm_rtermreq (fsm *, int, u_char *, int); -static void fsm_rtermack (fsm *); -static void fsm_rcoderej (fsm *, u_char *, int); -static void fsm_sconfreq (fsm *, int); - -#define PROTO_NAME(f) ((f)->callbacks->proto_name) - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -int peer_mru[NUM_PPP]; - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ - -/* - * fsm_init - Initialize fsm. - * - * Initialize fsm state. - */ -void fsm_init(fsm *f) -{ - f->state = INITIAL; - f->flags = 0; - f->id = 0; /* XXX Start with random id? */ - f->timeouttime = FSM_DEFTIMEOUT; - f->maxconfreqtransmits = FSM_DEFMAXCONFREQS; - f->maxtermtransmits = FSM_DEFMAXTERMREQS; - f->maxnakloops = FSM_DEFMAXNAKLOOPS; - f->term_reason_len = 0; -} - - -/* - * fsm_lowerup - The lower layer is up. - */ -void fsm_lowerup(fsm *f) -{ - int oldState = f->state; - - switch( f->state ){ - case INITIAL: - f->state = CLOSED; - break; - - case STARTING: - if( f->flags & OPT_SILENT ) - f->state = STOPPED; - else { - /* Send an initial configure-request */ - fsm_sconfreq(f, 0); - f->state = REQSENT; - } - break; - - default: - FSMDEBUG((LOG_INFO, "%s: Up event in state %d!\n", - PROTO_NAME(f), f->state)); - } - - FSMDEBUG((LOG_INFO, "%s: lowerup state %d -> %d\n", - PROTO_NAME(f), oldState, f->state)); -} - - -/* - * fsm_lowerdown - The lower layer is down. - * - * Cancel all timeouts and inform upper layers. - */ -void fsm_lowerdown(fsm *f) -{ - int oldState = f->state; - - switch( f->state ){ - case CLOSED: - f->state = INITIAL; - break; - - case STOPPED: - f->state = STARTING; - if( f->callbacks->starting ) - (*f->callbacks->starting)(f); - break; - - case CLOSING: - f->state = INITIAL; - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - break; - - case STOPPING: - case REQSENT: - case ACKRCVD: - case ACKSENT: - f->state = STARTING; - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - break; - - case OPENED: - if( f->callbacks->down ) - (*f->callbacks->down)(f); - f->state = STARTING; - break; - - default: - FSMDEBUG((LOG_INFO, "%s: Down event in state %d!\n", - PROTO_NAME(f), f->state)); - } - - FSMDEBUG((LOG_INFO, "%s: lowerdown state %d -> %d\n", - PROTO_NAME(f), oldState, f->state)); -} - - -/* - * fsm_open - Link is allowed to come up. - */ -void fsm_open(fsm *f) -{ - int oldState = f->state; - - switch( f->state ){ - case INITIAL: - f->state = STARTING; - if( f->callbacks->starting ) - (*f->callbacks->starting)(f); - break; - - case CLOSED: - if( f->flags & OPT_SILENT ) - f->state = STOPPED; - else { - /* Send an initial configure-request */ - fsm_sconfreq(f, 0); - f->state = REQSENT; - } - break; - - case CLOSING: - f->state = STOPPING; - /* fall through */ - case STOPPED: - case OPENED: - if( f->flags & OPT_RESTART ){ - fsm_lowerdown(f); - fsm_lowerup(f); - } - break; - } - - FSMDEBUG((LOG_INFO, "%s: open state %d -> %d\n", - PROTO_NAME(f), oldState, f->state)); -} - - -/* - * fsm_close - Start closing connection. - * - * Cancel timeouts and either initiate close or possibly go directly to - * the CLOSED state. - */ -void fsm_close(fsm *f, char *reason) -{ - int oldState = f->state; - - f->term_reason = reason; - f->term_reason_len = (reason == NULL? 0: strlen(reason)); - switch( f->state ){ - case STARTING: - f->state = INITIAL; - break; - case STOPPED: - f->state = CLOSED; - break; - case STOPPING: - f->state = CLOSING; - break; - - case REQSENT: - case ACKRCVD: - case ACKSENT: - case OPENED: - if( f->state != OPENED ) - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - else if( f->callbacks->down ) - (*f->callbacks->down)(f); /* Inform upper layers we're down */ - - /* Init restart counter, send Terminate-Request */ - f->retransmits = f->maxtermtransmits; - fsm_sdata(f, TERMREQ, f->reqid = ++f->id, - (u_char *) f->term_reason, f->term_reason_len); - TIMEOUT(fsm_timeout, f, f->timeouttime); - --f->retransmits; - - f->state = CLOSING; - break; - } - - FSMDEBUG((LOG_INFO, "%s: close reason=%s state %d -> %d\n", - PROTO_NAME(f), reason, oldState, f->state)); -} - - -/* - * fsm_sdata - Send some data. - * - * Used for all packets sent to our peer by this module. - */ -void fsm_sdata( - fsm *f, - u_char code, - u_char id, - u_char *data, - int datalen -) -{ - u_char *outp; - int outlen; - - /* Adjust length to be smaller than MTU */ - outp = outpacket_buf[f->unit]; - if (datalen > peer_mru[f->unit] - (int)HEADERLEN) - datalen = peer_mru[f->unit] - HEADERLEN; - if (datalen && data != outp + PPP_HDRLEN + HEADERLEN) - BCOPY(data, outp + PPP_HDRLEN + HEADERLEN, datalen); - outlen = datalen + HEADERLEN; - MAKEHEADER(outp, f->protocol); - PUTCHAR(code, outp); - PUTCHAR(id, outp); - PUTSHORT(outlen, outp); - pppWrite(f->unit, outpacket_buf[f->unit], outlen + PPP_HDRLEN); - FSMDEBUG((LOG_INFO, "fsm_sdata(%s): Sent code %d,%d,%d.\n", - PROTO_NAME(f), code, id, outlen)); -} - - -/* - * fsm_input - Input packet. - */ -void fsm_input(fsm *f, u_char *inpacket, int l) -{ - u_char *inp = inpacket; - u_char code, id; - int len; - - /* - * Parse header (code, id and length). - * If packet too short, drop it. - */ - if (l < HEADERLEN) { - FSMDEBUG((LOG_WARNING, "fsm_input(%x): Rcvd short header.\n", - f->protocol)); - return; - } - GETCHAR(code, inp); - GETCHAR(id, inp); - GETSHORT(len, inp); - if (len < HEADERLEN) { - FSMDEBUG((LOG_INFO, "fsm_input(%x): Rcvd illegal length.\n", - f->protocol)); - return; - } - if (len > l) { - FSMDEBUG((LOG_INFO, "fsm_input(%x): Rcvd short packet.\n", - f->protocol)); - return; - } - len -= HEADERLEN; /* subtract header length */ - - if( f->state == INITIAL || f->state == STARTING ){ - FSMDEBUG((LOG_INFO, "fsm_input(%x): Rcvd packet in state %d.\n", - f->protocol, f->state)); - return; - } - FSMDEBUG((LOG_INFO, "fsm_input(%s):%d,%d,%d\n", PROTO_NAME(f), code, id, l)); - /* - * Action depends on code. - */ - switch (code) { - case CONFREQ: - fsm_rconfreq(f, id, inp, len); - break; - - case CONFACK: - fsm_rconfack(f, id, inp, len); - break; - - case CONFNAK: - case CONFREJ: - fsm_rconfnakrej(f, code, id, inp, len); - break; - - case TERMREQ: - fsm_rtermreq(f, id, inp, len); - break; - - case TERMACK: - fsm_rtermack(f); - break; - - case CODEREJ: - fsm_rcoderej(f, inp, len); - break; - - default: - if( !f->callbacks->extcode - || !(*f->callbacks->extcode)(f, code, id, inp, len) ) - fsm_sdata(f, CODEREJ, ++f->id, inpacket, len + HEADERLEN); - break; - } -} - - -/* - * fsm_protreject - Peer doesn't speak this protocol. - * - * Treat this as a catastrophic error (RXJ-). - */ -void fsm_protreject(fsm *f) -{ - switch( f->state ){ - case CLOSING: - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - /* fall through */ - case CLOSED: - f->state = CLOSED; - if( f->callbacks->finished ) - (*f->callbacks->finished)(f); - break; - - case STOPPING: - case REQSENT: - case ACKRCVD: - case ACKSENT: - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - /* fall through */ - case STOPPED: - f->state = STOPPED; - if( f->callbacks->finished ) - (*f->callbacks->finished)(f); - break; - - case OPENED: - if( f->callbacks->down ) - (*f->callbacks->down)(f); - - /* Init restart counter, send Terminate-Request */ - f->retransmits = f->maxtermtransmits; - fsm_sdata(f, TERMREQ, f->reqid = ++f->id, - (u_char *) f->term_reason, f->term_reason_len); - TIMEOUT(fsm_timeout, f, f->timeouttime); - --f->retransmits; - - f->state = STOPPING; - break; - - default: - FSMDEBUG((LOG_INFO, "%s: Protocol-reject event in state %d!\n", - PROTO_NAME(f), f->state)); - } -} - - - - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ - -/* - * fsm_timeout - Timeout expired. - */ -static void fsm_timeout(void *arg) -{ - fsm *f = (fsm *) arg; - - switch (f->state) { - case CLOSING: - case STOPPING: - if( f->retransmits <= 0 ){ - FSMDEBUG((LOG_WARNING, "%s: timeout sending Terminate-Request state=%d\n", - PROTO_NAME(f), f->state)); - /* - * We've waited for an ack long enough. Peer probably heard us. - */ - f->state = (f->state == CLOSING)? CLOSED: STOPPED; - if( f->callbacks->finished ) - (*f->callbacks->finished)(f); - } else { - FSMDEBUG((LOG_WARNING, "%s: timeout resending Terminate-Requests state=%d\n", - PROTO_NAME(f), f->state)); - /* Send Terminate-Request */ - fsm_sdata(f, TERMREQ, f->reqid = ++f->id, - (u_char *) f->term_reason, f->term_reason_len); - TIMEOUT(fsm_timeout, f, f->timeouttime); - --f->retransmits; - } - break; - - case REQSENT: - case ACKRCVD: - case ACKSENT: - if (f->retransmits <= 0) { - FSMDEBUG((LOG_WARNING, "%s: timeout sending Config-Requests state=%d\n", - PROTO_NAME(f), f->state)); - f->state = STOPPED; - if( (f->flags & OPT_PASSIVE) == 0 && f->callbacks->finished ) - (*f->callbacks->finished)(f); - - } else { - FSMDEBUG((LOG_WARNING, "%s: timeout resending Config-Request state=%d\n", - PROTO_NAME(f), f->state)); - /* Retransmit the configure-request */ - if (f->callbacks->retransmit) - (*f->callbacks->retransmit)(f); - fsm_sconfreq(f, 1); /* Re-send Configure-Request */ - if( f->state == ACKRCVD ) - f->state = REQSENT; - } - break; - - default: - FSMDEBUG((LOG_INFO, "%s: Timeout event in state %d!\n", - PROTO_NAME(f), f->state)); - } -} - - -/* - * fsm_rconfreq - Receive Configure-Request. - */ -static void fsm_rconfreq(fsm *f, u_char id, u_char *inp, int len) -{ - int code, reject_if_disagree; - - FSMDEBUG((LOG_INFO, "fsm_rconfreq(%s): Rcvd id %d state=%d\n", - PROTO_NAME(f), id, f->state)); - switch( f->state ){ - case CLOSED: - /* Go away, we're closed */ - fsm_sdata(f, TERMACK, id, NULL, 0); - return; - case CLOSING: - case STOPPING: - return; - - case OPENED: - /* Go down and restart negotiation */ - if( f->callbacks->down ) - (*f->callbacks->down)(f); /* Inform upper layers */ - fsm_sconfreq(f, 0); /* Send initial Configure-Request */ - break; - - case STOPPED: - /* Negotiation started by our peer */ - fsm_sconfreq(f, 0); /* Send initial Configure-Request */ - f->state = REQSENT; - break; - } - - /* - * Pass the requested configuration options - * to protocol-specific code for checking. - */ - if (f->callbacks->reqci){ /* Check CI */ - reject_if_disagree = (f->nakloops >= f->maxnakloops); - code = (*f->callbacks->reqci)(f, inp, &len, reject_if_disagree); - } - else if (len) - code = CONFREJ; /* Reject all CI */ - else - code = CONFACK; - - /* send the Ack, Nak or Rej to the peer */ - fsm_sdata(f, (u_char)code, id, inp, len); - - if (code == CONFACK) { - if (f->state == ACKRCVD) { - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - f->state = OPENED; - if (f->callbacks->up) - (*f->callbacks->up)(f); /* Inform upper layers */ - } - else - f->state = ACKSENT; - f->nakloops = 0; - } - else { - /* we sent CONFACK or CONFREJ */ - if (f->state != ACKRCVD) - f->state = REQSENT; - if( code == CONFNAK ) - ++f->nakloops; - } -} - - -/* - * fsm_rconfack - Receive Configure-Ack. - */ -static void fsm_rconfack(fsm *f, int id, u_char *inp, int len) -{ - FSMDEBUG((LOG_INFO, "fsm_rconfack(%s): Rcvd id %d state=%d\n", - PROTO_NAME(f), id, f->state)); - - if (id != f->reqid || f->seen_ack) /* Expected id? */ - return; /* Nope, toss... */ - if( !(f->callbacks->ackci? (*f->callbacks->ackci)(f, inp, len): - (len == 0)) ){ - /* Ack is bad - ignore it */ - FSMDEBUG((LOG_INFO, "%s: received bad Ack (length %d)\n", - PROTO_NAME(f), len)); - return; - } - f->seen_ack = 1; - - switch (f->state) { - case CLOSED: - case STOPPED: - fsm_sdata(f, TERMACK, (u_char)id, NULL, 0); - break; - - case REQSENT: - f->state = ACKRCVD; - f->retransmits = f->maxconfreqtransmits; - break; - - case ACKRCVD: - /* Huh? an extra valid Ack? oh well... */ - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - fsm_sconfreq(f, 0); - f->state = REQSENT; - break; - - case ACKSENT: - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - f->state = OPENED; - f->retransmits = f->maxconfreqtransmits; - if (f->callbacks->up) - (*f->callbacks->up)(f); /* Inform upper layers */ - break; - - case OPENED: - /* Go down and restart negotiation */ - if (f->callbacks->down) - (*f->callbacks->down)(f); /* Inform upper layers */ - fsm_sconfreq(f, 0); /* Send initial Configure-Request */ - f->state = REQSENT; - break; - } -} - - -/* - * fsm_rconfnakrej - Receive Configure-Nak or Configure-Reject. - */ -static void fsm_rconfnakrej(fsm *f, int code, int id, u_char *inp, int len) -{ - int (*proc) (fsm *, u_char *, int); - int ret; - - FSMDEBUG((LOG_INFO, "fsm_rconfnakrej(%s): Rcvd id %d state=%d\n", - PROTO_NAME(f), id, f->state)); - - if (id != f->reqid || f->seen_ack) /* Expected id? */ - return; /* Nope, toss... */ - proc = (code == CONFNAK)? f->callbacks->nakci: f->callbacks->rejci; - if (!proc || !(ret = proc(f, inp, len))) { - /* Nak/reject is bad - ignore it */ - FSMDEBUG((LOG_INFO, "%s: received bad %s (length %d)\n", - PROTO_NAME(f), (code==CONFNAK? "Nak": "reject"), len)); - return; - } - f->seen_ack = 1; - - switch (f->state) { - case CLOSED: - case STOPPED: - fsm_sdata(f, TERMACK, (u_char)id, NULL, 0); - break; - - case REQSENT: - case ACKSENT: - /* They didn't agree to what we wanted - try another request */ - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - if (ret < 0) - f->state = STOPPED; /* kludge for stopping CCP */ - else - fsm_sconfreq(f, 0); /* Send Configure-Request */ - break; - - case ACKRCVD: - /* Got a Nak/reject when we had already had an Ack?? oh well... */ - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - fsm_sconfreq(f, 0); - f->state = REQSENT; - break; - - case OPENED: - /* Go down and restart negotiation */ - if (f->callbacks->down) - (*f->callbacks->down)(f); /* Inform upper layers */ - fsm_sconfreq(f, 0); /* Send initial Configure-Request */ - f->state = REQSENT; - break; - } -} - - -/* - * fsm_rtermreq - Receive Terminate-Req. - */ -static void fsm_rtermreq(fsm *f, int id, u_char *p, int len) -{ - FSMDEBUG((LOG_INFO, "fsm_rtermreq(%s): Rcvd id %d state=%d\n", - PROTO_NAME(f), id, f->state)); - - switch (f->state) { - case ACKRCVD: - case ACKSENT: - f->state = REQSENT; /* Start over but keep trying */ - break; - - case OPENED: - if (len > 0) { - FSMDEBUG((LOG_INFO, "%s terminated by peer (%x)\n", PROTO_NAME(f), p)); - } else { - FSMDEBUG((LOG_INFO, "%s terminated by peer\n", PROTO_NAME(f))); - } - if (f->callbacks->down) - (*f->callbacks->down)(f); /* Inform upper layers */ - f->retransmits = 0; - f->state = STOPPING; - TIMEOUT(fsm_timeout, f, f->timeouttime); - break; - } - - fsm_sdata(f, TERMACK, (u_char)id, NULL, 0); -} - - -/* - * fsm_rtermack - Receive Terminate-Ack. - */ -static void fsm_rtermack(fsm *f) -{ - FSMDEBUG((LOG_INFO, "fsm_rtermack(%s): state=%d\n", - PROTO_NAME(f), f->state)); - - switch (f->state) { - case CLOSING: - UNTIMEOUT(fsm_timeout, f); - f->state = CLOSED; - if( f->callbacks->finished ) - (*f->callbacks->finished)(f); - break; - case STOPPING: - UNTIMEOUT(fsm_timeout, f); - f->state = STOPPED; - if( f->callbacks->finished ) - (*f->callbacks->finished)(f); - break; - - case ACKRCVD: - f->state = REQSENT; - break; - - case OPENED: - if (f->callbacks->down) - (*f->callbacks->down)(f); /* Inform upper layers */ - fsm_sconfreq(f, 0); - break; - } -} - - -/* - * fsm_rcoderej - Receive an Code-Reject. - */ -static void fsm_rcoderej(fsm *f, u_char *inp, int len) -{ - u_char code, id; - - FSMDEBUG((LOG_INFO, "fsm_rcoderej(%s): state=%d\n", - PROTO_NAME(f), f->state)); - - if (len < HEADERLEN) { - FSMDEBUG((LOG_INFO, "fsm_rcoderej: Rcvd short Code-Reject packet!\n")); - return; - } - GETCHAR(code, inp); - GETCHAR(id, inp); - FSMDEBUG((LOG_WARNING, "%s: Rcvd Code-Reject for code %d, id %d\n", - PROTO_NAME(f), code, id)); - - if( f->state == ACKRCVD ) - f->state = REQSENT; -} - - -/* - * fsm_sconfreq - Send a Configure-Request. - */ -static void fsm_sconfreq(fsm *f, int retransmit) -{ - u_char *outp; - int cilen; - - if( f->state != REQSENT && f->state != ACKRCVD && f->state != ACKSENT ){ - /* Not currently negotiating - reset options */ - if( f->callbacks->resetci ) - (*f->callbacks->resetci)(f); - f->nakloops = 0; - } - - if( !retransmit ){ - /* New request - reset retransmission counter, use new ID */ - f->retransmits = f->maxconfreqtransmits; - f->reqid = ++f->id; - } - - f->seen_ack = 0; - - /* - * Make up the request packet - */ - outp = outpacket_buf[f->unit] + PPP_HDRLEN + HEADERLEN; - if( f->callbacks->cilen && f->callbacks->addci ){ - cilen = (*f->callbacks->cilen)(f); - if( cilen > peer_mru[f->unit] - (int)HEADERLEN ) - cilen = peer_mru[f->unit] - HEADERLEN; - if (f->callbacks->addci) - (*f->callbacks->addci)(f, outp, &cilen); - } else - cilen = 0; - - /* send the request to our peer */ - fsm_sdata(f, CONFREQ, f->reqid, outp, cilen); - - /* start the retransmit timer */ - --f->retransmits; - TIMEOUT(fsm_timeout, f, f->timeouttime); - - FSMDEBUG((LOG_INFO, "%s: sending Configure-Request, id %d\n", - PROTO_NAME(f), f->reqid)); -} - -#endif /* PPP_SUPPORT */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/fsm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/fsm.h deleted file mode 100644 index b2da3e3e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/fsm.h +++ /dev/null @@ -1,187 +0,0 @@ -/***************************************************************************** -* fsm.h - Network Control Protocol Finite State Machine header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* Copyright (c) 1997 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-11-05 Guy Lancaster , Global Election Systems Inc. -* Original based on BSD code. -*****************************************************************************/ -/* - * fsm.h - {Link, IP} Control Protocol Finite State Machine definitions. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * $Id$ - */ - -#ifndef FSM_H -#define FSM_H - - -/***************************************************************************** -************************* PUBLIC DEFINITIONS ********************************* -*****************************************************************************/ -/* - * LCP Packet header = Code, id, length. - */ -#define HEADERLEN (sizeof (u_char) + sizeof (u_char) + sizeof (u_short)) - - -/* - * CP (LCP, IPCP, etc.) codes. - */ -#define CONFREQ 1 /* Configuration Request */ -#define CONFACK 2 /* Configuration Ack */ -#define CONFNAK 3 /* Configuration Nak */ -#define CONFREJ 4 /* Configuration Reject */ -#define TERMREQ 5 /* Termination Request */ -#define TERMACK 6 /* Termination Ack */ -#define CODEREJ 7 /* Code Reject */ - -/* - * Link states. - */ -#define INITIAL 0 /* Down, hasn't been opened */ -#define STARTING 1 /* Down, been opened */ -#define CLOSED 2 /* Up, hasn't been opened */ -#define STOPPED 3 /* Open, waiting for down event */ -#define CLOSING 4 /* Terminating the connection, not open */ -#define STOPPING 5 /* Terminating, but open */ -#define REQSENT 6 /* We've sent a Config Request */ -#define ACKRCVD 7 /* We've received a Config Ack */ -#define ACKSENT 8 /* We've sent a Config Ack */ -#define OPENED 9 /* Connection available */ - - -/* - * Flags - indicate options controlling FSM operation - */ -#define OPT_PASSIVE 1 /* Don't die if we don't get a response */ -#define OPT_RESTART 2 /* Treat 2nd OPEN as DOWN, UP */ -#define OPT_SILENT 4 /* Wait for peer to speak first */ - - -/***************************************************************************** -************************* PUBLIC DATA TYPES ********************************** -*****************************************************************************/ -/* - * Each FSM is described by an fsm structure and fsm callbacks. - */ -typedef struct fsm { - int unit; /* Interface unit number */ - u_short protocol; /* Data Link Layer Protocol field value */ - int state; /* State */ - int flags; /* Contains option bits */ - u_char id; /* Current id */ - u_char reqid; /* Current request id */ - u_char seen_ack; /* Have received valid Ack/Nak/Rej to Req */ - int timeouttime; /* Timeout time in milliseconds */ - int maxconfreqtransmits;/* Maximum Configure-Request transmissions */ - int retransmits; /* Number of retransmissions left */ - int maxtermtransmits; /* Maximum Terminate-Request transmissions */ - int nakloops; /* Number of nak loops since last ack */ - int maxnakloops; /* Maximum number of nak loops tolerated */ - struct fsm_callbacks* callbacks;/* Callback routines */ - char* term_reason; /* Reason for closing protocol */ - int term_reason_len; /* Length of term_reason */ -} fsm; - - -typedef struct fsm_callbacks { - void (*resetci) /* Reset our Configuration Information */ - (fsm*); - int (*cilen) /* Length of our Configuration Information */ - (fsm*); - void (*addci) /* Add our Configuration Information */ - (fsm*, u_char*, int*); - int (*ackci) /* ACK our Configuration Information */ - (fsm*, u_char*, int); - int (*nakci) /* NAK our Configuration Information */ - (fsm*, u_char*, int); - int (*rejci) /* Reject our Configuration Information */ - (fsm*, u_char*, int); - int (*reqci) /* Request peer's Configuration Information */ - (fsm*, u_char*, int*, int); - void (*up) /* Called when fsm reaches OPENED state */ - (fsm*); - void (*down) /* Called when fsm leaves OPENED state */ - (fsm*); - void (*starting) /* Called when we want the lower layer */ - (fsm*); - void (*finished) /* Called when we don't want the lower layer */ - (fsm*); - void (*protreject) /* Called when Protocol-Reject received */ - (int); - void (*retransmit) /* Retransmission is necessary */ - (fsm*); - int (*extcode) /* Called when unknown code received */ - (fsm*, int, u_char, u_char*, int); - char *proto_name; /* String name for protocol (for messages) */ -} fsm_callbacks; - - -/***************************************************************************** -*********************** PUBLIC DATA STRUCTURES ******************************* -*****************************************************************************/ -/* - * Variables - */ -extern int peer_mru[]; /* currently negotiated peer MRU (per unit) */ - - -/***************************************************************************** -************************** PUBLIC FUNCTIONS ********************************** -*****************************************************************************/ - -/* - * Prototypes - */ -void fsm_init (fsm*); -void fsm_lowerup (fsm*); -void fsm_lowerdown (fsm*); -void fsm_open (fsm*); -void fsm_close (fsm*, char*); -void fsm_input (fsm*, u_char*, int); -void fsm_protreject (fsm*); -void fsm_sdata (fsm*, u_char, u_char, u_char*, int); - - -#endif /* FSM_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/ipcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/ipcp.c deleted file mode 100644 index d5b25188..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/ipcp.c +++ /dev/null @@ -1,1377 +0,0 @@ -/***************************************************************************** -* ipcp.c - Network PPP IP Control Protocol program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-08 Guy Lancaster , Global Election Systems Inc. -* Original. -*****************************************************************************/ -/* - * ipcp.c - PPP IP Control Protocol. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "auth.h" -#include "fsm.h" -#include "vj.h" -#include "ipcp.h" -#include "pppdebug.h" - - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ -/* #define OLD_CI_ADDRS 1 */ /* Support deprecated address negotiation. */ - -/* - * Lengths of configuration options. - */ -#define CILEN_VOID 2 -#define CILEN_COMPRESS 4 /* min length for compression protocol opt. */ -#define CILEN_VJ 6 /* length for RFC1332 Van-Jacobson opt. */ -#define CILEN_ADDR 6 /* new-style single address option */ -#define CILEN_ADDRS 10 /* old-style dual address option */ - - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -/* - * Callbacks for fsm code. (CI = Configuration Information) - */ -static void ipcp_resetci (fsm *); /* Reset our CI */ -static int ipcp_cilen (fsm *); /* Return length of our CI */ -static void ipcp_addci (fsm *, u_char *, int *); /* Add our CI */ -static int ipcp_ackci (fsm *, u_char *, int); /* Peer ack'd our CI */ -static int ipcp_nakci (fsm *, u_char *, int); /* Peer nak'd our CI */ -static int ipcp_rejci (fsm *, u_char *, int); /* Peer rej'd our CI */ -static int ipcp_reqci (fsm *, u_char *, int *, int); /* Rcv CI */ -static void ipcp_up (fsm *); /* We're UP */ -static void ipcp_down (fsm *); /* We're DOWN */ -#if 0 -static void ipcp_script (fsm *, char *); /* Run an up/down script */ -#endif -static void ipcp_finished (fsm *); /* Don't need lower layer */ - -/* - * Protocol entry points from main code. - */ -static void ipcp_init (int); -static void ipcp_open (int); -static void ipcp_close (int, char *); -static void ipcp_lowerup (int); -static void ipcp_lowerdown (int); -static void ipcp_input (int, u_char *, int); -static void ipcp_protrej (int); - -static void ipcp_clear_addrs (int); - -#define CODENAME(x) ((x) == CONFACK ? "ACK" : \ - (x) == CONFNAK ? "NAK" : "REJ") - - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ -/* global vars */ -ipcp_options ipcp_wantoptions[NUM_PPP]; /* Options that we want to request */ -ipcp_options ipcp_gotoptions[NUM_PPP]; /* Options that peer ack'd */ -ipcp_options ipcp_allowoptions[NUM_PPP]; /* Options we allow peer to request */ -ipcp_options ipcp_hisoptions[NUM_PPP]; /* Options that we ack'd */ - -fsm ipcp_fsm[NUM_PPP]; /* IPCP fsm structure */ - -struct protent ipcp_protent = { - PPP_IPCP, - ipcp_init, - ipcp_input, - ipcp_protrej, - ipcp_lowerup, - ipcp_lowerdown, - ipcp_open, - ipcp_close, -#if 0 - ipcp_printpkt, - NULL, -#endif - 1, - "IPCP", -#if 0 - ip_check_options, - NULL, - ip_active_pkt -#endif -}; - - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -/* local vars */ -static int cis_received[NUM_PPP]; /* # Conf-Reqs received */ -static int default_route_set[NUM_PPP]; /* Have set up a default route */ - -static fsm_callbacks ipcp_callbacks = { /* IPCP callback routines */ - ipcp_resetci, /* Reset our Configuration Information */ - ipcp_cilen, /* Length of our Configuration Information */ - ipcp_addci, /* Add our Configuration Information */ - ipcp_ackci, /* ACK our Configuration Information */ - ipcp_nakci, /* NAK our Configuration Information */ - ipcp_rejci, /* Reject our Configuration Information */ - ipcp_reqci, /* Request peer's Configuration Information */ - ipcp_up, /* Called when fsm reaches OPENED state */ - ipcp_down, /* Called when fsm leaves OPENED state */ - NULL, /* Called when we want the lower layer up */ - ipcp_finished, /* Called when we want the lower layer down */ - NULL, /* Called when Protocol-Reject received */ - NULL, /* Retransmission is necessary */ - NULL, /* Called to handle protocol-specific codes */ - "IPCP" /* String name of protocol */ -}; - - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ - -/* - * Non-standard inet_ntoa left here for compat with original ppp - * sources. Assumes u32_t instead of struct in_addr. - */ - -char * _inet_ntoa(u32_t n) -{ - struct in_addr ia; - ia.s_addr = n; - return inet_ntoa(ia); -} - -#define inet_ntoa _inet_ntoa - -/* - * ipcp_init - Initialize IPCP. - */ -static void ipcp_init(int unit) -{ - fsm *f = &ipcp_fsm[unit]; - ipcp_options *wo = &ipcp_wantoptions[unit]; - ipcp_options *ao = &ipcp_allowoptions[unit]; - - f->unit = unit; - f->protocol = PPP_IPCP; - f->callbacks = &ipcp_callbacks; - fsm_init(&ipcp_fsm[unit]); - - memset(wo, 0, sizeof(*wo)); - memset(ao, 0, sizeof(*ao)); - - wo->neg_addr = 1; - wo->ouraddr = 0; -#if VJ_SUPPORT > 0 - wo->neg_vj = 1; -#else - wo->neg_vj = 0; -#endif - wo->vj_protocol = IPCP_VJ_COMP; - wo->maxslotindex = MAX_SLOTS - 1; - wo->cflag = 0; - - wo->default_route = 1; - - ao->neg_addr = 1; -#if VJ_SUPPORT > 0 - ao->neg_vj = 1; -#else - ao->neg_vj = 0; -#endif - ao->maxslotindex = MAX_SLOTS - 1; - ao->cflag = 1; - - ao->default_route = 1; -} - - -/* - * ipcp_open - IPCP is allowed to come up. - */ -static void ipcp_open(int unit) -{ - fsm_open(&ipcp_fsm[unit]); -} - - -/* - * ipcp_close - Take IPCP down. - */ -static void ipcp_close(int unit, char *reason) -{ - fsm_close(&ipcp_fsm[unit], reason); -} - - -/* - * ipcp_lowerup - The lower layer is up. - */ -static void ipcp_lowerup(int unit) -{ - fsm_lowerup(&ipcp_fsm[unit]); -} - - -/* - * ipcp_lowerdown - The lower layer is down. - */ -static void ipcp_lowerdown(int unit) -{ - fsm_lowerdown(&ipcp_fsm[unit]); -} - - -/* - * ipcp_input - Input IPCP packet. - */ -static void ipcp_input(int unit, u_char *p, int len) -{ - fsm_input(&ipcp_fsm[unit], p, len); -} - - -/* - * ipcp_protrej - A Protocol-Reject was received for IPCP. - * - * Pretend the lower layer went down, so we shut up. - */ -static void ipcp_protrej(int unit) -{ - fsm_lowerdown(&ipcp_fsm[unit]); -} - - -/* - * ipcp_resetci - Reset our CI. - */ -static void ipcp_resetci(fsm *f) -{ - ipcp_options *wo = &ipcp_wantoptions[f->unit]; - - wo->req_addr = wo->neg_addr && ipcp_allowoptions[f->unit].neg_addr; - if (wo->ouraddr == 0) - wo->accept_local = 1; - if (wo->hisaddr == 0) - wo->accept_remote = 1; - /* Request DNS addresses from the peer */ - wo->req_dns1 = ppp_settings.usepeerdns; - wo->req_dns2 = ppp_settings.usepeerdns; - ipcp_gotoptions[f->unit] = *wo; - cis_received[f->unit] = 0; -} - - -/* - * ipcp_cilen - Return length of our CI. - */ -static int ipcp_cilen(fsm *f) -{ - ipcp_options *go = &ipcp_gotoptions[f->unit]; - ipcp_options *wo = &ipcp_wantoptions[f->unit]; - ipcp_options *ho = &ipcp_hisoptions[f->unit]; - -#define LENCIVJ(neg, old) (neg ? (old? CILEN_COMPRESS : CILEN_VJ) : 0) -#define LENCIADDR(neg, old) (neg ? (old? CILEN_ADDRS : CILEN_ADDR) : 0) -#define LENCIDNS(neg) (neg ? (CILEN_ADDR) : 0) - - /* - * First see if we want to change our options to the old - * forms because we have received old forms from the peer. - */ - if (wo->neg_addr && !go->neg_addr && !go->old_addrs) { - /* use the old style of address negotiation */ - go->neg_addr = 1; - go->old_addrs = 1; - } - if (wo->neg_vj && !go->neg_vj && !go->old_vj) { - /* try an older style of VJ negotiation */ - if (cis_received[f->unit] == 0) { - /* keep trying the new style until we see some CI from the peer */ - go->neg_vj = 1; - } else { - /* use the old style only if the peer did */ - if (ho->neg_vj && ho->old_vj) { - go->neg_vj = 1; - go->old_vj = 1; - go->vj_protocol = ho->vj_protocol; - } - } - } - - return (LENCIADDR(go->neg_addr, go->old_addrs) - + LENCIVJ(go->neg_vj, go->old_vj) + - LENCIDNS(go->req_dns1) + - LENCIDNS(go->req_dns2)); -} - - -/* - * ipcp_addci - Add our desired CIs to a packet. - */ -static void ipcp_addci(fsm *f, u_char *ucp, int *lenp) -{ - ipcp_options *go = &ipcp_gotoptions[f->unit]; - int len = *lenp; - -#define ADDCIVJ(opt, neg, val, old, maxslotindex, cflag) \ - if (neg) { \ - int vjlen = old? CILEN_COMPRESS : CILEN_VJ; \ - if (len >= vjlen) { \ - PUTCHAR(opt, ucp); \ - PUTCHAR(vjlen, ucp); \ - PUTSHORT(val, ucp); \ - if (!old) { \ - PUTCHAR(maxslotindex, ucp); \ - PUTCHAR(cflag, ucp); \ - } \ - len -= vjlen; \ - } else \ - neg = 0; \ - } - -#define ADDCIADDR(opt, neg, old, val1, val2) \ - if (neg) { \ - int addrlen = (old? CILEN_ADDRS: CILEN_ADDR); \ - if (len >= addrlen) { \ - u32_t l; \ - PUTCHAR(opt, ucp); \ - PUTCHAR(addrlen, ucp); \ - l = ntohl(val1); \ - PUTLONG(l, ucp); \ - if (old) { \ - l = ntohl(val2); \ - PUTLONG(l, ucp); \ - } \ - len -= addrlen; \ - } else \ - neg = 0; \ - } - -#define ADDCIDNS(opt, neg, addr) \ - if (neg) { \ - if (len >= CILEN_ADDR) { \ - u32_t l; \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_ADDR, ucp); \ - l = ntohl(addr); \ - PUTLONG(l, ucp); \ - len -= CILEN_ADDR; \ - } else \ - neg = 0; \ - } - - ADDCIADDR((go->old_addrs? CI_ADDRS: CI_ADDR), go->neg_addr, - go->old_addrs, go->ouraddr, go->hisaddr); - - ADDCIVJ(CI_COMPRESSTYPE, go->neg_vj, go->vj_protocol, go->old_vj, - go->maxslotindex, go->cflag); - - ADDCIDNS(CI_MS_DNS1, go->req_dns1, go->dnsaddr[0]); - - ADDCIDNS(CI_MS_DNS2, go->req_dns2, go->dnsaddr[1]); - - *lenp -= len; -} - - -/* - * ipcp_ackci - Ack our CIs. - * - * Returns: - * 0 - Ack was bad. - * 1 - Ack was good. - */ -static int ipcp_ackci(fsm *f, u_char *p, int len) -{ - ipcp_options *go = &ipcp_gotoptions[f->unit]; - u_short cilen, citype, cishort; - u32_t cilong; - u_char cimaxslotindex, cicflag; - - /* - * CIs must be in exactly the same order that we sent... - * Check packet length and CI length at each step. - * If we find any deviations, then this packet is bad. - */ - -#define ACKCIVJ(opt, neg, val, old, maxslotindex, cflag) \ - if (neg) { \ - int vjlen = old? CILEN_COMPRESS : CILEN_VJ; \ - if ((len -= vjlen) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != vjlen || \ - citype != opt) \ - goto bad; \ - GETSHORT(cishort, p); \ - if (cishort != val) \ - goto bad; \ - if (!old) { \ - GETCHAR(cimaxslotindex, p); \ - if (cimaxslotindex != maxslotindex) \ - goto bad; \ - GETCHAR(cicflag, p); \ - if (cicflag != cflag) \ - goto bad; \ - } \ - } - -#define ACKCIADDR(opt, neg, old, val1, val2) \ - if (neg) { \ - int addrlen = (old? CILEN_ADDRS: CILEN_ADDR); \ - u32_t l; \ - if ((len -= addrlen) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != addrlen || \ - citype != opt) \ - goto bad; \ - GETLONG(l, p); \ - cilong = htonl(l); \ - if (val1 != cilong) \ - goto bad; \ - if (old) { \ - GETLONG(l, p); \ - cilong = htonl(l); \ - if (val2 != cilong) \ - goto bad; \ - } \ - } - -#define ACKCIDNS(opt, neg, addr) \ - if (neg) { \ - u32_t l; \ - if ((len -= CILEN_ADDR) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_ADDR || \ - citype != opt) \ - goto bad; \ - GETLONG(l, p); \ - cilong = htonl(l); \ - if (addr != cilong) \ - goto bad; \ - } - - ACKCIADDR((go->old_addrs? CI_ADDRS: CI_ADDR), go->neg_addr, - go->old_addrs, go->ouraddr, go->hisaddr); - - ACKCIVJ(CI_COMPRESSTYPE, go->neg_vj, go->vj_protocol, go->old_vj, - go->maxslotindex, go->cflag); - - ACKCIDNS(CI_MS_DNS1, go->req_dns1, go->dnsaddr[0]); - - ACKCIDNS(CI_MS_DNS2, go->req_dns2, go->dnsaddr[1]); - - /* - * If there are any remaining CIs, then this packet is bad. - */ - if (len != 0) - goto bad; - return (1); - -bad: - IPCPDEBUG((LOG_INFO, "ipcp_ackci: received bad Ack!\n")); - return (0); -} - -/* - * ipcp_nakci - Peer has sent a NAK for some of our CIs. - * This should not modify any state if the Nak is bad - * or if IPCP is in the OPENED state. - * - * Returns: - * 0 - Nak was bad. - * 1 - Nak was good. - */ -static int ipcp_nakci(fsm *f, u_char *p, int len) -{ - ipcp_options *go = &ipcp_gotoptions[f->unit]; - u_char cimaxslotindex, cicflag; - u_char citype, cilen, *next; - u_short cishort; - u32_t ciaddr1, ciaddr2, l, cidnsaddr; - ipcp_options no; /* options we've seen Naks for */ - ipcp_options try; /* options to request next time */ - - BZERO(&no, sizeof(no)); - try = *go; - - /* - * Any Nak'd CIs must be in exactly the same order that we sent. - * Check packet length and CI length at each step. - * If we find any deviations, then this packet is bad. - */ -#define NAKCIADDR(opt, neg, old, code) \ - if (go->neg && \ - len >= (cilen = (old? CILEN_ADDRS: CILEN_ADDR)) && \ - p[1] == cilen && \ - p[0] == opt) { \ - len -= cilen; \ - INCPTR(2, p); \ - GETLONG(l, p); \ - ciaddr1 = htonl(l); \ - if (old) { \ - GETLONG(l, p); \ - ciaddr2 = htonl(l); \ - no.old_addrs = 1; \ - } else \ - ciaddr2 = 0; \ - no.neg = 1; \ - code \ - } - -#define NAKCIVJ(opt, neg, code) \ - if (go->neg && \ - ((cilen = p[1]) == CILEN_COMPRESS || cilen == CILEN_VJ) && \ - len >= cilen && \ - p[0] == opt) { \ - len -= cilen; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - no.neg = 1; \ - code \ - } - -#define NAKCIDNS(opt, neg, code) \ - if (go->neg && \ - ((cilen = p[1]) == CILEN_ADDR) && \ - len >= cilen && \ - p[0] == opt) { \ - len -= cilen; \ - INCPTR(2, p); \ - GETLONG(l, p); \ - cidnsaddr = htonl(l); \ - no.neg = 1; \ - code \ - } - - /* - * Accept the peer's idea of {our,his} address, if different - * from our idea, only if the accept_{local,remote} flag is set. - */ - NAKCIADDR((go->old_addrs? CI_ADDRS: CI_ADDR), neg_addr, go->old_addrs, - if (go->accept_local && ciaddr1) { /* Do we know our address? */ - try.ouraddr = ciaddr1; - IPCPDEBUG((LOG_INFO, "local IP address %s\n", - inet_ntoa(ciaddr1))); - } - if (go->accept_remote && ciaddr2) { /* Does he know his? */ - try.hisaddr = ciaddr2; - IPCPDEBUG((LOG_INFO, "remote IP address %s\n", - inet_ntoa(ciaddr2))); - } - ); - - /* - * Accept the peer's value of maxslotindex provided that it - * is less than what we asked for. Turn off slot-ID compression - * if the peer wants. Send old-style compress-type option if - * the peer wants. - */ - NAKCIVJ(CI_COMPRESSTYPE, neg_vj, - if (cilen == CILEN_VJ) { - GETCHAR(cimaxslotindex, p); - GETCHAR(cicflag, p); - if (cishort == IPCP_VJ_COMP) { - try.old_vj = 0; - if (cimaxslotindex < go->maxslotindex) - try.maxslotindex = cimaxslotindex; - if (!cicflag) - try.cflag = 0; - } else { - try.neg_vj = 0; - } - } else { - if (cishort == IPCP_VJ_COMP || cishort == IPCP_VJ_COMP_OLD) { - try.old_vj = 1; - try.vj_protocol = cishort; - } else { - try.neg_vj = 0; - } - } - ); - - NAKCIDNS(CI_MS_DNS1, req_dns1, - try.dnsaddr[0] = cidnsaddr; - IPCPDEBUG((LOG_INFO, "primary DNS address %s\n", inet_ntoa(cidnsaddr))); - ); - - NAKCIDNS(CI_MS_DNS2, req_dns2, - try.dnsaddr[1] = cidnsaddr; - IPCPDEBUG((LOG_INFO, "secondary DNS address %s\n", inet_ntoa(cidnsaddr))); - ); - - /* - * There may be remaining CIs, if the peer is requesting negotiation - * on an option that we didn't include in our request packet. - * If they want to negotiate about IP addresses, we comply. - * If they want us to ask for compression, we refuse. - */ - while (len > CILEN_VOID) { - GETCHAR(citype, p); - GETCHAR(cilen, p); - if( (len -= cilen) < 0 ) - goto bad; - next = p + cilen - 2; - - switch (citype) { - case CI_COMPRESSTYPE: - if (go->neg_vj || no.neg_vj || - (cilen != CILEN_VJ && cilen != CILEN_COMPRESS)) - goto bad; - no.neg_vj = 1; - break; - case CI_ADDRS: - if ((go->neg_addr && go->old_addrs) || no.old_addrs - || cilen != CILEN_ADDRS) - goto bad; - try.neg_addr = 1; - try.old_addrs = 1; - GETLONG(l, p); - ciaddr1 = htonl(l); - if (ciaddr1 && go->accept_local) - try.ouraddr = ciaddr1; - GETLONG(l, p); - ciaddr2 = htonl(l); - if (ciaddr2 && go->accept_remote) - try.hisaddr = ciaddr2; - no.old_addrs = 1; - break; - case CI_ADDR: - if (go->neg_addr || no.neg_addr || cilen != CILEN_ADDR) - goto bad; - try.old_addrs = 0; - GETLONG(l, p); - ciaddr1 = htonl(l); - if (ciaddr1 && go->accept_local) - try.ouraddr = ciaddr1; - if (try.ouraddr != 0) - try.neg_addr = 1; - no.neg_addr = 1; - break; - } - p = next; - } - - /* If there is still anything left, this packet is bad. */ - if (len != 0) - goto bad; - - /* - * OK, the Nak is good. Now we can update state. - */ - if (f->state != OPENED) - *go = try; - - return 1; - -bad: - IPCPDEBUG((LOG_INFO, "ipcp_nakci: received bad Nak!\n")); - return 0; -} - - -/* - * ipcp_rejci - Reject some of our CIs. - */ -static int ipcp_rejci(fsm *f, u_char *p, int len) -{ - ipcp_options *go = &ipcp_gotoptions[f->unit]; - u_char cimaxslotindex, ciflag, cilen; - u_short cishort; - u32_t cilong; - ipcp_options try; /* options to request next time */ - - try = *go; - /* - * Any Rejected CIs must be in exactly the same order that we sent. - * Check packet length and CI length at each step. - * If we find any deviations, then this packet is bad. - */ -#define REJCIADDR(opt, neg, old, val1, val2) \ - if (go->neg && \ - len >= (cilen = old? CILEN_ADDRS: CILEN_ADDR) && \ - p[1] == cilen && \ - p[0] == opt) { \ - u32_t l; \ - len -= cilen; \ - INCPTR(2, p); \ - GETLONG(l, p); \ - cilong = htonl(l); \ - /* Check rejected value. */ \ - if (cilong != val1) \ - goto bad; \ - if (old) { \ - GETLONG(l, p); \ - cilong = htonl(l); \ - /* Check rejected value. */ \ - if (cilong != val2) \ - goto bad; \ - } \ - try.neg = 0; \ - } - -#define REJCIVJ(opt, neg, val, old, maxslot, cflag) \ - if (go->neg && \ - p[1] == (old? CILEN_COMPRESS : CILEN_VJ) && \ - len >= p[1] && \ - p[0] == opt) { \ - len -= p[1]; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - /* Check rejected value. */ \ - if (cishort != val) \ - goto bad; \ - if (!old) { \ - GETCHAR(cimaxslotindex, p); \ - if (cimaxslotindex != maxslot) \ - goto bad; \ - GETCHAR(ciflag, p); \ - if (ciflag != cflag) \ - goto bad; \ - } \ - try.neg = 0; \ - } - -#define REJCIDNS(opt, neg, dnsaddr) \ - if (go->neg && \ - ((cilen = p[1]) == CILEN_ADDR) && \ - len >= cilen && \ - p[0] == opt) { \ - u32_t l; \ - len -= cilen; \ - INCPTR(2, p); \ - GETLONG(l, p); \ - cilong = htonl(l); \ - /* Check rejected value. */ \ - if (cilong != dnsaddr) \ - goto bad; \ - try.neg = 0; \ - } - - REJCIADDR((go->old_addrs? CI_ADDRS: CI_ADDR), neg_addr, - go->old_addrs, go->ouraddr, go->hisaddr); - - REJCIVJ(CI_COMPRESSTYPE, neg_vj, go->vj_protocol, go->old_vj, - go->maxslotindex, go->cflag); - - REJCIDNS(CI_MS_DNS1, req_dns1, go->dnsaddr[0]); - - REJCIDNS(CI_MS_DNS2, req_dns2, go->dnsaddr[1]); - - /* - * If there are any remaining CIs, then this packet is bad. - */ - if (len != 0) - goto bad; - /* - * Now we can update state. - */ - if (f->state != OPENED) - *go = try; - return 1; - -bad: - IPCPDEBUG((LOG_INFO, "ipcp_rejci: received bad Reject!\n")); - return 0; -} - - -/* - * ipcp_reqci - Check the peer's requested CIs and send appropriate response. - * - * Returns: CONFACK, CONFNAK or CONFREJ and input packet modified - * appropriately. If reject_if_disagree is non-zero, doesn't return - * CONFNAK; returns CONFREJ if it can't return CONFACK. - */ -static int ipcp_reqci( - fsm *f, - u_char *inp, /* Requested CIs */ - int *len, /* Length of requested CIs */ - int reject_if_disagree -) -{ - ipcp_options *wo = &ipcp_wantoptions[f->unit]; - ipcp_options *ho = &ipcp_hisoptions[f->unit]; - ipcp_options *ao = &ipcp_allowoptions[f->unit]; -#ifdef OLD_CI_ADDRS - ipcp_options *go = &ipcp_gotoptions[f->unit]; -#endif - u_char *cip, *next; /* Pointer to current and next CIs */ - u_short cilen, citype; /* Parsed len, type */ - u_short cishort; /* Parsed short value */ - u32_t tl, ciaddr1; /* Parsed address values */ -#ifdef OLD_CI_ADDRS - u32_t ciaddr2; /* Parsed address values */ -#endif - int rc = CONFACK; /* Final packet return code */ - int orc; /* Individual option return code */ - u_char *p; /* Pointer to next char to parse */ - u_char *ucp = inp; /* Pointer to current output char */ - int l = *len; /* Length left */ - u_char maxslotindex, cflag; - int d; - - cis_received[f->unit] = 1; - - /* - * Reset all his options. - */ - BZERO(ho, sizeof(*ho)); - - /* - * Process all his options. - */ - next = inp; - while (l) { - orc = CONFACK; /* Assume success */ - cip = p = next; /* Remember begining of CI */ - if (l < 2 || /* Not enough data for CI header or */ - p[1] < 2 || /* CI length too small or */ - p[1] > l) { /* CI length too big? */ - IPCPDEBUG((LOG_INFO, "ipcp_reqci: bad CI length!\n")); - orc = CONFREJ; /* Reject bad CI */ - cilen = l; /* Reject till end of packet */ - l = 0; /* Don't loop again */ - goto endswitch; - } - GETCHAR(citype, p); /* Parse CI type */ - GETCHAR(cilen, p); /* Parse CI length */ - l -= cilen; /* Adjust remaining length */ - next += cilen; /* Step to next CI */ - - switch (citype) { /* Check CI type */ -#ifdef OLD_CI_ADDRS /* Need to save space... */ - case CI_ADDRS: - IPCPDEBUG((LOG_INFO, "ipcp_reqci: received ADDRS\n")); - if (!ao->neg_addr || - cilen != CILEN_ADDRS) { /* Check CI length */ - orc = CONFREJ; /* Reject CI */ - break; - } - - /* - * If he has no address, or if we both have his address but - * disagree about it, then NAK it with our idea. - * In particular, if we don't know his address, but he does, - * then accept it. - */ - GETLONG(tl, p); /* Parse source address (his) */ - ciaddr1 = htonl(tl); - IPCPDEBUG((LOG_INFO, "his addr %s\n", inet_ntoa(ciaddr1))); - if (ciaddr1 != wo->hisaddr - && (ciaddr1 == 0 || !wo->accept_remote)) { - orc = CONFNAK; - if (!reject_if_disagree) { - DECPTR(sizeof(u32_t), p); - tl = ntohl(wo->hisaddr); - PUTLONG(tl, p); - } - } else if (ciaddr1 == 0 && wo->hisaddr == 0) { - /* - * If neither we nor he knows his address, reject the option. - */ - orc = CONFREJ; - wo->req_addr = 0; /* don't NAK with 0.0.0.0 later */ - break; - } - - /* - * If he doesn't know our address, or if we both have our address - * but disagree about it, then NAK it with our idea. - */ - GETLONG(tl, p); /* Parse desination address (ours) */ - ciaddr2 = htonl(tl); - IPCPDEBUG((LOG_INFO, "our addr %s\n", inet_ntoa(ciaddr2))); - if (ciaddr2 != wo->ouraddr) { - if (ciaddr2 == 0 || !wo->accept_local) { - orc = CONFNAK; - if (!reject_if_disagree) { - DECPTR(sizeof(u32_t), p); - tl = ntohl(wo->ouraddr); - PUTLONG(tl, p); - } - } else { - go->ouraddr = ciaddr2; /* accept peer's idea */ - } - } - - ho->neg_addr = 1; - ho->old_addrs = 1; - ho->hisaddr = ciaddr1; - ho->ouraddr = ciaddr2; - break; -#endif - - case CI_ADDR: - if (!ao->neg_addr) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Reject ADDR not allowed\n")); - orc = CONFREJ; /* Reject CI */ - break; - } else if (cilen != CILEN_ADDR) { /* Check CI length */ - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Reject ADDR bad len\n")); - orc = CONFREJ; /* Reject CI */ - break; - } - - /* - * If he has no address, or if we both have his address but - * disagree about it, then NAK it with our idea. - * In particular, if we don't know his address, but he does, - * then accept it. - */ - GETLONG(tl, p); /* Parse source address (his) */ - ciaddr1 = htonl(tl); - if (ciaddr1 != wo->hisaddr - && (ciaddr1 == 0 || !wo->accept_remote)) { - orc = CONFNAK; - if (!reject_if_disagree) { - DECPTR(sizeof(u32_t), p); - tl = ntohl(wo->hisaddr); - PUTLONG(tl, p); - } - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Nak ADDR %s\n", inet_ntoa(ciaddr1))); - } else if (ciaddr1 == 0 && wo->hisaddr == 0) { - /* - * Don't ACK an address of 0.0.0.0 - reject it instead. - */ - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Reject ADDR %s\n", inet_ntoa(ciaddr1))); - orc = CONFREJ; - wo->req_addr = 0; /* don't NAK with 0.0.0.0 later */ - break; - } - - ho->neg_addr = 1; - ho->hisaddr = ciaddr1; - IPCPDEBUG((LOG_INFO, "ipcp_reqci: ADDR %s\n", inet_ntoa(ciaddr1))); - break; - - case CI_MS_DNS1: - case CI_MS_DNS2: - /* Microsoft primary or secondary DNS request */ - d = citype == CI_MS_DNS2; - - /* If we do not have a DNS address then we cannot send it */ - if (ao->dnsaddr[d] == 0 || - cilen != CILEN_ADDR) { /* Check CI length */ - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting DNS%d Request\n", d+1)); - orc = CONFREJ; /* Reject CI */ - break; - } - GETLONG(tl, p); - if (htonl(tl) != ao->dnsaddr[d]) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Naking DNS%d Request %d\n", - d+1, inet_ntoa(tl))); - DECPTR(sizeof(u32_t), p); - tl = ntohl(ao->dnsaddr[d]); - PUTLONG(tl, p); - orc = CONFNAK; - } - IPCPDEBUG((LOG_INFO, "ipcp_reqci: received DNS%d Request\n", d+1)); - break; - - case CI_MS_WINS1: - case CI_MS_WINS2: - /* Microsoft primary or secondary WINS request */ - d = citype == CI_MS_WINS2; - IPCPDEBUG((LOG_INFO, "ipcp_reqci: received WINS%d Request\n", d+1)); - - /* If we do not have a DNS address then we cannot send it */ - if (ao->winsaddr[d] == 0 || - cilen != CILEN_ADDR) { /* Check CI length */ - orc = CONFREJ; /* Reject CI */ - break; - } - GETLONG(tl, p); - if (htonl(tl) != ao->winsaddr[d]) { - DECPTR(sizeof(u32_t), p); - tl = ntohl(ao->winsaddr[d]); - PUTLONG(tl, p); - orc = CONFNAK; - } - break; - - case CI_COMPRESSTYPE: - if (!ao->neg_vj) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting COMPRESSTYPE not allowed\n")); - orc = CONFREJ; - break; - } else if (cilen != CILEN_VJ && cilen != CILEN_COMPRESS) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting COMPRESSTYPE len=%d\n", cilen)); - orc = CONFREJ; - break; - } - GETSHORT(cishort, p); - - if (!(cishort == IPCP_VJ_COMP || - (cishort == IPCP_VJ_COMP_OLD && cilen == CILEN_COMPRESS))) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting COMPRESSTYPE %d\n", cishort)); - orc = CONFREJ; - break; - } - - ho->neg_vj = 1; - ho->vj_protocol = cishort; - if (cilen == CILEN_VJ) { - GETCHAR(maxslotindex, p); - if (maxslotindex > ao->maxslotindex) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Naking VJ max slot %d\n", maxslotindex)); - orc = CONFNAK; - if (!reject_if_disagree){ - DECPTR(1, p); - PUTCHAR(ao->maxslotindex, p); - } - } - GETCHAR(cflag, p); - if (cflag && !ao->cflag) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Naking VJ cflag %d\n", cflag)); - orc = CONFNAK; - if (!reject_if_disagree){ - DECPTR(1, p); - PUTCHAR(wo->cflag, p); - } - } - ho->maxslotindex = maxslotindex; - ho->cflag = cflag; - } else { - ho->old_vj = 1; - ho->maxslotindex = MAX_SLOTS - 1; - ho->cflag = 1; - } - IPCPDEBUG((LOG_INFO, - "ipcp_reqci: received COMPRESSTYPE p=%d old=%d maxslot=%d cflag=%d\n", - ho->vj_protocol, ho->old_vj, ho->maxslotindex, ho->cflag)); - break; - - default: - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting unknown CI type %d\n", citype)); - orc = CONFREJ; - break; - } - -endswitch: - if (orc == CONFACK && /* Good CI */ - rc != CONFACK) /* but prior CI wasnt? */ - continue; /* Don't send this one */ - - if (orc == CONFNAK) { /* Nak this CI? */ - if (reject_if_disagree) { /* Getting fed up with sending NAKs? */ - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting too many naks\n")); - orc = CONFREJ; /* Get tough if so */ - } else { - if (rc == CONFREJ) /* Rejecting prior CI? */ - continue; /* Don't send this one */ - if (rc == CONFACK) { /* Ack'd all prior CIs? */ - rc = CONFNAK; /* Not anymore... */ - ucp = inp; /* Backup */ - } - } - } - - if (orc == CONFREJ && /* Reject this CI */ - rc != CONFREJ) { /* but no prior ones? */ - rc = CONFREJ; - ucp = inp; /* Backup */ - } - - /* Need to move CI? */ - if (ucp != cip) - BCOPY(cip, ucp, cilen); /* Move it */ - - /* Update output pointer */ - INCPTR(cilen, ucp); - } - - /* - * If we aren't rejecting this packet, and we want to negotiate - * their address, and they didn't send their address, then we - * send a NAK with a CI_ADDR option appended. We assume the - * input buffer is long enough that we can append the extra - * option safely. - */ - if (rc != CONFREJ && !ho->neg_addr && - wo->req_addr && !reject_if_disagree) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Requesting peer address\n")); - if (rc == CONFACK) { - rc = CONFNAK; - ucp = inp; /* reset pointer */ - wo->req_addr = 0; /* don't ask again */ - } - PUTCHAR(CI_ADDR, ucp); - PUTCHAR(CILEN_ADDR, ucp); - tl = ntohl(wo->hisaddr); - PUTLONG(tl, ucp); - } - - *len = (int)(ucp - inp); /* Compute output length */ - IPCPDEBUG((LOG_INFO, "ipcp_reqci: returning Configure-%s\n", CODENAME(rc))); - return (rc); /* Return final code */ -} - - -#if 0 -/* - * ip_check_options - check that any IP-related options are OK, - * and assign appropriate defaults. - */ -static void ip_check_options(u_long localAddr) -{ - ipcp_options *wo = &ipcp_wantoptions[0]; - - /* - * Load our default IP address but allow the remote host to give us - * a new address. - */ - if (wo->ouraddr == 0 && !ppp_settings.disable_defaultip) { - wo->accept_local = 1; /* don't insist on this default value */ - wo->ouraddr = htonl(localAddr); - } -} -#endif - - -/* - * ipcp_up - IPCP has come UP. - * - * Configure the IP network interface appropriately and bring it up. - */ -static void ipcp_up(fsm *f) -{ - u32_t mask; - ipcp_options *ho = &ipcp_hisoptions[f->unit]; - ipcp_options *go = &ipcp_gotoptions[f->unit]; - ipcp_options *wo = &ipcp_wantoptions[f->unit]; - - np_up(f->unit, PPP_IP); - IPCPDEBUG((LOG_INFO, "ipcp: up\n")); - - /* - * We must have a non-zero IP address for both ends of the link. - */ - if (!ho->neg_addr) - ho->hisaddr = wo->hisaddr; - - if (ho->hisaddr == 0) { - IPCPDEBUG((LOG_ERR, "Could not determine remote IP address\n")); - ipcp_close(f->unit, "Could not determine remote IP address"); - return; - } - if (go->ouraddr == 0) { - IPCPDEBUG((LOG_ERR, "Could not determine local IP address\n")); - ipcp_close(f->unit, "Could not determine local IP address"); - return; - } - - if (ppp_settings.usepeerdns && (go->dnsaddr[0] || go->dnsaddr[1])) { - /*pppGotDNSAddrs(go->dnsaddr[0], go->dnsaddr[1]);*/ - } - - /* - * Check that the peer is allowed to use the IP address it wants. - */ - if (!auth_ip_addr(f->unit, ho->hisaddr)) { - IPCPDEBUG((LOG_ERR, "Peer is not authorized to use remote address %s\n", - inet_ntoa(ho->hisaddr))); - ipcp_close(f->unit, "Unauthorized remote IP address"); - return; - } - - /* set tcp compression */ - sifvjcomp(f->unit, ho->neg_vj, ho->cflag, ho->maxslotindex); - - /* - * Set IP addresses and (if specified) netmask. - */ - mask = GetMask(go->ouraddr); - - if (!sifaddr(f->unit, go->ouraddr, ho->hisaddr, mask, go->dnsaddr[0], go->dnsaddr[1])) { - IPCPDEBUG((LOG_WARNING, "sifaddr failed\n")); - ipcp_close(f->unit, "Interface configuration failed"); - return; - } - - /* bring the interface up for IP */ - if (!sifup(f->unit)) { - IPCPDEBUG((LOG_WARNING, "sifup failed\n")); - ipcp_close(f->unit, "Interface configuration failed"); - return; - } - - sifnpmode(f->unit, PPP_IP, NPMODE_PASS); - - /* assign a default route through the interface if required */ - if (ipcp_wantoptions[f->unit].default_route) - if (sifdefaultroute(f->unit, go->ouraddr, ho->hisaddr)) - default_route_set[f->unit] = 1; - - IPCPDEBUG((LOG_NOTICE, "local IP address %s\n", inet_ntoa(go->ouraddr))); - IPCPDEBUG((LOG_NOTICE, "remote IP address %s\n", inet_ntoa(ho->hisaddr))); - if (go->dnsaddr[0]) { - IPCPDEBUG((LOG_NOTICE, "primary DNS address %s\n", inet_ntoa(go->dnsaddr[0]))); - } - if (go->dnsaddr[1]) { - IPCPDEBUG((LOG_NOTICE, "secondary DNS address %s\n", inet_ntoa(go->dnsaddr[1]))); - } -} - - -/* - * ipcp_down - IPCP has gone DOWN. - * - * Take the IP network interface down, clear its addresses - * and delete routes through it. - */ -static void ipcp_down(fsm *f) -{ - IPCPDEBUG((LOG_INFO, "ipcp: down\n")); - np_down(f->unit, PPP_IP); - sifvjcomp(f->unit, 0, 0, 0); - - sifdown(f->unit); - ipcp_clear_addrs(f->unit); -} - - -/* - * ipcp_clear_addrs() - clear the interface addresses, routes, etc. - */ -static void ipcp_clear_addrs(int unit) -{ - u32_t ouraddr, hisaddr; - - ouraddr = ipcp_gotoptions[unit].ouraddr; - hisaddr = ipcp_hisoptions[unit].hisaddr; - if (default_route_set[unit]) { - cifdefaultroute(unit, ouraddr, hisaddr); - default_route_set[unit] = 0; - } - cifaddr(unit, ouraddr, hisaddr); -} - - -/* - * ipcp_finished - possibly shut down the lower layers. - */ -static void ipcp_finished(fsm *f) -{ - np_finished(f->unit, PPP_IP); -} - -#if 0 -static int ipcp_printpkt( - u_char *p, - int plen, - void (*printer) (void *, char *, ...), - void *arg -) -{ - (void)p; - (void)plen; - (void)printer; - (void)arg; - return 0; -} - -/* - * ip_active_pkt - see if this IP packet is worth bringing the link up for. - * We don't bring the link up for IP fragments or for TCP FIN packets - * with no data. - */ -#define IP_HDRLEN 20 /* bytes */ -#define IP_OFFMASK 0x1fff -#define IPPROTO_TCP 6 -#define TCP_HDRLEN 20 -#define TH_FIN 0x01 - -/* - * We use these macros because the IP header may be at an odd address, - * and some compilers might use word loads to get th_off or ip_hl. - */ - -#define net_short(x) (((x)[0] << 8) + (x)[1]) -#define get_iphl(x) (((unsigned char *)(x))[0] & 0xF) -#define get_ipoff(x) net_short((unsigned char *)(x) + 6) -#define get_ipproto(x) (((unsigned char *)(x))[9]) -#define get_tcpoff(x) (((unsigned char *)(x))[12] >> 4) -#define get_tcpflags(x) (((unsigned char *)(x))[13]) - -static int ip_active_pkt(u_char *pkt, int len) -{ - u_char *tcp; - int hlen; - - len -= PPP_HDRLEN; - pkt += PPP_HDRLEN; - if (len < IP_HDRLEN) - return 0; - if ((get_ipoff(pkt) & IP_OFFMASK) != 0) - return 0; - if (get_ipproto(pkt) != IPPROTO_TCP) - return 1; - hlen = get_iphl(pkt) * 4; - if (len < hlen + TCP_HDRLEN) - return 0; - tcp = pkt + hlen; - if ((get_tcpflags(tcp) & TH_FIN) != 0 && len == hlen + get_tcpoff(tcp) * 4) - return 0; - return 1; -} -#endif - -#endif /* PPP_SUPPORT */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/ipcp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/ipcp.h deleted file mode 100644 index 040a7cf4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/ipcp.h +++ /dev/null @@ -1,126 +0,0 @@ -/***************************************************************************** -* ipcp.h - PPP IP NCP: Internet Protocol Network Control Protocol header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-04 Guy Lancaster , Global Election Systems Inc. -* Original derived from BSD codes. -*****************************************************************************/ -/* - * ipcp.h - IP Control Protocol definitions. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * $Id$ - */ - -#ifndef IPCP_H -#define IPCP_H - -/************************* -*** PUBLIC DEFINITIONS *** -*************************/ -/* - * Options. - */ -#define CI_ADDRS 1 /* IP Addresses */ -#define CI_COMPRESSTYPE 2 /* Compression Type */ -#define CI_ADDR 3 - -#define CI_MS_WINS1 128 /* Primary WINS value */ -#define CI_MS_DNS1 129 /* Primary DNS value */ -#define CI_MS_WINS2 130 /* Secondary WINS value */ -#define CI_MS_DNS2 131 /* Secondary DNS value */ - -#define IPCP_VJMODE_OLD 1 /* "old" mode (option # = 0x0037) */ -#define IPCP_VJMODE_RFC1172 2 /* "old-rfc"mode (option # = 0x002d) */ -#define IPCP_VJMODE_RFC1332 3 /* "new-rfc"mode (option # = 0x002d, */ - /* maxslot and slot number compression) */ - -#define IPCP_VJ_COMP 0x002d /* current value for VJ compression option*/ -#define IPCP_VJ_COMP_OLD 0x0037 /* "old" (i.e, broken) value for VJ */ - /* compression option*/ - - -/************************ -*** PUBLIC DATA TYPES *** -************************/ - -typedef struct ipcp_options { - u_int neg_addr : 1; /* Negotiate IP Address? */ - u_int old_addrs : 1; /* Use old (IP-Addresses) option? */ - u_int req_addr : 1; /* Ask peer to send IP address? */ - u_int default_route : 1; /* Assign default route through interface? */ - u_int proxy_arp : 1; /* Make proxy ARP entry for peer? */ - u_int neg_vj : 1; /* Van Jacobson Compression? */ - u_int old_vj : 1; /* use old (short) form of VJ option? */ - u_int accept_local : 1; /* accept peer's value for ouraddr */ - u_int accept_remote : 1; /* accept peer's value for hisaddr */ - u_int req_dns1 : 1; /* Ask peer to send primary DNS address? */ - u_int req_dns2 : 1; /* Ask peer to send secondary DNS address? */ - u_short vj_protocol; /* protocol value to use in VJ option */ - u_char maxslotindex; /* VJ slots - 1. */ - u_char cflag; /* VJ slot compression flag. */ - u32_t ouraddr, hisaddr; /* Addresses in NETWORK BYTE ORDER */ - u32_t dnsaddr[2]; /* Primary and secondary MS DNS entries */ - u32_t winsaddr[2]; /* Primary and secondary MS WINS entries */ -} ipcp_options; - - -/***************************** -*** PUBLIC DATA STRUCTURES *** -*****************************/ - -extern fsm ipcp_fsm[]; -extern ipcp_options ipcp_wantoptions[]; -extern ipcp_options ipcp_gotoptions[]; -extern ipcp_options ipcp_allowoptions[]; -extern ipcp_options ipcp_hisoptions[]; - -extern struct protent ipcp_protent; - - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ - - -#endif /* IPCP_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/lcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/lcp.c deleted file mode 100644 index 6a988d6d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/lcp.c +++ /dev/null @@ -1,1991 +0,0 @@ -/***************************************************************************** -* lcp.c - Network Link Control Protocol program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-01 Guy Lancaster , Global Election Systems Inc. -* Original. -*****************************************************************************/ - -/* - * lcp.c - PPP Link Control Protocol. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "fsm.h" -#include "chap.h" -#include "magic.h" -#include "auth.h" -#include "lcp.h" -#include "pppdebug.h" - - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ -/* - * Length of each type of configuration option (in octets) - */ -#define CILEN_VOID 2 -#define CILEN_CHAR 3 -#define CILEN_SHORT 4 /* CILEN_VOID + sizeof(short) */ -#define CILEN_CHAP 5 /* CILEN_VOID + sizeof(short) + 1 */ -#define CILEN_LONG 6 /* CILEN_VOID + sizeof(long) */ -#define CILEN_LQR 8 /* CILEN_VOID + sizeof(short) + sizeof(long) */ -#define CILEN_CBCP 3 - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -/* - * Callbacks for fsm code. (CI = Configuration Information) - */ -static void lcp_resetci (fsm*); /* Reset our CI */ -static int lcp_cilen (fsm*); /* Return length of our CI */ -static void lcp_addci (fsm*, u_char*, int*); /* Add our CI to pkt */ -static int lcp_ackci (fsm*, u_char*, int);/* Peer ack'd our CI */ -static int lcp_nakci (fsm*, u_char*, int);/* Peer nak'd our CI */ -static int lcp_rejci (fsm*, u_char*, int);/* Peer rej'd our CI */ -static int lcp_reqci (fsm*, u_char*, int*, int); /* Rcv peer CI */ -static void lcp_up (fsm*); /* We're UP */ -static void lcp_down (fsm*); /* We're DOWN */ -static void lcp_starting (fsm*); /* We need lower layer up */ -static void lcp_finished (fsm*); /* We need lower layer down */ -static int lcp_extcode (fsm*, int, u_char, u_char*, int); - -static void lcp_rprotrej (fsm*, u_char*, int); - -/* - * routines to send LCP echos to peer - */ -static void lcp_echo_lowerup (int); -static void lcp_echo_lowerdown (int); -static void LcpEchoTimeout (void*); -static void lcp_received_echo_reply (fsm*, int, u_char*, int); -static void LcpSendEchoRequest (fsm*); -static void LcpLinkFailure (fsm*); -static void LcpEchoCheck (fsm*); - -/* - * Protocol entry points. - * Some of these are called directly. - */ -static void lcp_input (int, u_char *, int); -static void lcp_protrej (int); - -#define CODENAME(x) ((x) == CONFACK ? "ACK" : \ - (x) == CONFNAK ? "NAK" : "REJ") - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ -/* global vars */ -LinkPhase lcp_phase[NUM_PPP]; /* Phase of link session (RFC 1661) */ -lcp_options lcp_wantoptions[NUM_PPP]; /* Options that we want to request */ -lcp_options lcp_gotoptions[NUM_PPP]; /* Options that peer ack'd */ -lcp_options lcp_allowoptions[NUM_PPP]; /* Options we allow peer to request */ -lcp_options lcp_hisoptions[NUM_PPP]; /* Options that we ack'd */ -ext_accm xmit_accm[NUM_PPP]; /* extended transmit ACCM */ - - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -static fsm lcp_fsm[NUM_PPP]; /* LCP fsm structure (global)*/ -static u_int lcp_echo_interval = LCP_ECHOINTERVAL; /* Interval between LCP echo-requests */ -static u_int lcp_echo_fails = LCP_MAXECHOFAILS; /* Tolerance to unanswered echo-requests */ -static u32_t lcp_echos_pending = 0; /* Number of outstanding echo msgs */ -static u32_t lcp_echo_number = 0; /* ID number of next echo frame */ -static u32_t lcp_echo_timer_running = 0; /* TRUE if a timer is running */ - -static u_char nak_buffer[PPP_MRU]; /* where we construct a nak packet */ - -static fsm_callbacks lcp_callbacks = { /* LCP callback routines */ - lcp_resetci, /* Reset our Configuration Information */ - lcp_cilen, /* Length of our Configuration Information */ - lcp_addci, /* Add our Configuration Information */ - lcp_ackci, /* ACK our Configuration Information */ - lcp_nakci, /* NAK our Configuration Information */ - lcp_rejci, /* Reject our Configuration Information */ - lcp_reqci, /* Request peer's Configuration Information */ - lcp_up, /* Called when fsm reaches OPENED state */ - lcp_down, /* Called when fsm leaves OPENED state */ - lcp_starting, /* Called when we want the lower layer up */ - lcp_finished, /* Called when we want the lower layer down */ - NULL, /* Called when Protocol-Reject received */ - NULL, /* Retransmission is necessary */ - lcp_extcode, /* Called to handle LCP-specific codes */ - "LCP" /* String name of protocol */ -}; - -struct protent lcp_protent = { - PPP_LCP, - lcp_init, - lcp_input, - lcp_protrej, - lcp_lowerup, - lcp_lowerdown, - lcp_open, - lcp_close, -#if 0 - lcp_printpkt, - NULL, -#endif - 1, - "LCP", -#if 0 - NULL, - NULL, - NULL -#endif -}; - -int lcp_loopbackfail = DEFLOOPBACKFAIL; - - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * lcp_init - Initialize LCP. - */ -void lcp_init(int unit) -{ - fsm *f = &lcp_fsm[unit]; - lcp_options *wo = &lcp_wantoptions[unit]; - lcp_options *ao = &lcp_allowoptions[unit]; - - f->unit = unit; - f->protocol = PPP_LCP; - f->callbacks = &lcp_callbacks; - - fsm_init(f); - - wo->passive = 0; - wo->silent = 0; - wo->restart = 0; /* Set to 1 in kernels or multi-line - * implementations */ - wo->neg_mru = 1; - wo->mru = PPP_DEFMRU; - wo->neg_asyncmap = 1; - wo->asyncmap = 0x00000000l; /* Assume don't need to escape any ctl chars. */ - wo->neg_chap = 0; /* Set to 1 on server */ - wo->neg_upap = 0; /* Set to 1 on server */ - wo->chap_mdtype = CHAP_DIGEST_MD5; - wo->neg_magicnumber = 1; - wo->neg_pcompression = 1; - wo->neg_accompression = 1; - wo->neg_lqr = 0; /* no LQR implementation yet */ - wo->neg_cbcp = 0; - - ao->neg_mru = 1; - ao->mru = PPP_MAXMRU; - ao->neg_asyncmap = 1; - ao->asyncmap = 0x00000000l; /* Assume don't need to escape any ctl chars. */ - ao->neg_chap = (CHAP_SUPPORT != 0); - ao->chap_mdtype = CHAP_DIGEST_MD5; - ao->neg_upap = (PAP_SUPPORT != 0); - ao->neg_magicnumber = 1; - ao->neg_pcompression = 1; - ao->neg_accompression = 1; - ao->neg_lqr = 0; /* no LQR implementation yet */ - ao->neg_cbcp = (CBCP_SUPPORT != 0); - - /* - * Set transmit escape for the flag and escape characters plus anything - * set for the allowable options. - */ - memset(xmit_accm[unit], 0, sizeof(xmit_accm[0])); - xmit_accm[unit][15] = 0x60; - xmit_accm[unit][0] = (u_char)(ao->asyncmap & 0xFF); - xmit_accm[unit][1] = (u_char)((ao->asyncmap >> 8) & 0xFF); - xmit_accm[unit][2] = (u_char)((ao->asyncmap >> 16) & 0xFF); - xmit_accm[unit][3] = (u_char)((ao->asyncmap >> 24) & 0xFF); - LCPDEBUG((LOG_INFO, "lcp_init: xmit_accm=%X %X %X %X\n", - xmit_accm[unit][0], - xmit_accm[unit][1], - xmit_accm[unit][2], - xmit_accm[unit][3])); - - lcp_phase[unit] = PHASE_INITIALIZE; -} - - -/* - * lcp_open - LCP is allowed to come up. - */ -void lcp_open(int unit) -{ - fsm *f = &lcp_fsm[unit]; - lcp_options *wo = &lcp_wantoptions[unit]; - - f->flags = 0; - if (wo->passive) - f->flags |= OPT_PASSIVE; - if (wo->silent) - f->flags |= OPT_SILENT; - fsm_open(f); - - lcp_phase[unit] = PHASE_ESTABLISH; -} - - -/* - * lcp_close - Take LCP down. - */ -void lcp_close(int unit, char *reason) -{ - fsm *f = &lcp_fsm[unit]; - - if (lcp_phase[unit] != PHASE_DEAD) - lcp_phase[unit] = PHASE_TERMINATE; - if (f->state == STOPPED && f->flags & (OPT_PASSIVE|OPT_SILENT)) { - /* - * This action is not strictly according to the FSM in RFC1548, - * but it does mean that the program terminates if you do an - * lcp_close() in passive/silent mode when a connection hasn't - * been established. - */ - f->state = CLOSED; - lcp_finished(f); - } - else - fsm_close(&lcp_fsm[unit], reason); -} - - -/* - * lcp_lowerup - The lower layer is up. - */ -void lcp_lowerup(int unit) -{ - lcp_options *wo = &lcp_wantoptions[unit]; - - /* - * Don't use A/C or protocol compression on transmission, - * but accept A/C and protocol compressed packets - * if we are going to ask for A/C and protocol compression. - */ - ppp_set_xaccm(unit, &xmit_accm[unit]); - ppp_send_config(unit, PPP_MRU, 0xffffffffl, 0, 0); - ppp_recv_config(unit, PPP_MRU, 0x00000000l, - wo->neg_pcompression, wo->neg_accompression); - peer_mru[unit] = PPP_MRU; - lcp_allowoptions[unit].asyncmap - = (u_long)xmit_accm[unit][0] - | ((u_long)xmit_accm[unit][1] << 8) - | ((u_long)xmit_accm[unit][2] << 16) - | ((u_long)xmit_accm[unit][3] << 24); - LCPDEBUG((LOG_INFO, "lcp_lowerup: asyncmap=%X %X %X %X\n", - xmit_accm[unit][3], - xmit_accm[unit][2], - xmit_accm[unit][1], - xmit_accm[unit][0])); - - fsm_lowerup(&lcp_fsm[unit]); -} - - -/* - * lcp_lowerdown - The lower layer is down. - */ -void lcp_lowerdown(int unit) -{ - fsm_lowerdown(&lcp_fsm[unit]); -} - -/* - * lcp_sprotrej - Send a Protocol-Reject for some protocol. - */ -void lcp_sprotrej(int unit, u_char *p, int len) -{ - /* - * Send back the protocol and the information field of the - * rejected packet. We only get here if LCP is in the OPENED state. - */ - - fsm_sdata(&lcp_fsm[unit], PROTREJ, ++lcp_fsm[unit].id, - p, len); -} - - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ -/* - * lcp_input - Input LCP packet. - */ -static void lcp_input(int unit, u_char *p, int len) -{ - fsm *f = &lcp_fsm[unit]; - - fsm_input(f, p, len); -} - - -/* - * lcp_extcode - Handle a LCP-specific code. - */ -static int lcp_extcode(fsm *f, int code, u_char id, u_char *inp, int len) -{ - u_char *magp; - - switch( code ){ - case PROTREJ: - lcp_rprotrej(f, inp, len); - break; - - case ECHOREQ: - if (f->state != OPENED) - break; - LCPDEBUG((LOG_INFO, "lcp: Echo-Request, Rcvd id %d\n", id)); - magp = inp; - PUTLONG(lcp_gotoptions[f->unit].magicnumber, magp); - fsm_sdata(f, ECHOREP, id, inp, len); - break; - - case ECHOREP: - lcp_received_echo_reply(f, id, inp, len); - break; - - case DISCREQ: - break; - - default: - return 0; - } - return 1; -} - - -/* - * lcp_rprotrej - Receive an Protocol-Reject. - * - * Figure out which protocol is rejected and inform it. - */ -static void lcp_rprotrej(fsm *f, u_char *inp, int len) -{ - int i; - struct protent *protp; - u_short prot; - - if (len < sizeof (u_short)) { - LCPDEBUG((LOG_INFO, - "lcp_rprotrej: Rcvd short Protocol-Reject packet!\n")); - return; - } - - GETSHORT(prot, inp); - - LCPDEBUG((LOG_INFO, - "lcp_rprotrej: Rcvd Protocol-Reject packet for %x!\n", - prot)); - - /* - * Protocol-Reject packets received in any state other than the LCP - * OPENED state SHOULD be silently discarded. - */ - if( f->state != OPENED ){ - LCPDEBUG((LOG_INFO, "Protocol-Reject discarded: LCP in state %d\n", - f->state)); - return; - } - - /* - * Upcall the proper Protocol-Reject routine. - */ - for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) - if (protp->protocol == prot && protp->enabled_flag) { - (*protp->protrej)(f->unit); - return; - } - - LCPDEBUG((LOG_WARNING, "Protocol-Reject for unsupported protocol 0x%x\n", - prot)); -} - - -/* - * lcp_protrej - A Protocol-Reject was received. - */ -static void lcp_protrej(int unit) -{ - (void)unit; - /* - * Can't reject LCP! - */ - LCPDEBUG((LOG_WARNING, - "lcp_protrej: Received Protocol-Reject for LCP!\n")); - fsm_protreject(&lcp_fsm[unit]); -} - - -/* - * lcp_resetci - Reset our CI. - */ -static void lcp_resetci(fsm *f) -{ - lcp_wantoptions[f->unit].magicnumber = magic(); - lcp_wantoptions[f->unit].numloops = 0; - lcp_gotoptions[f->unit] = lcp_wantoptions[f->unit]; - peer_mru[f->unit] = PPP_MRU; - auth_reset(f->unit); -} - - -/* - * lcp_cilen - Return length of our CI. - */ -static int lcp_cilen(fsm *f) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - -#define LENCIVOID(neg) ((neg) ? CILEN_VOID : 0) -#define LENCICHAP(neg) ((neg) ? CILEN_CHAP : 0) -#define LENCISHORT(neg) ((neg) ? CILEN_SHORT : 0) -#define LENCILONG(neg) ((neg) ? CILEN_LONG : 0) -#define LENCILQR(neg) ((neg) ? CILEN_LQR: 0) -#define LENCICBCP(neg) ((neg) ? CILEN_CBCP: 0) - /* - * NB: we only ask for one of CHAP and UPAP, even if we will - * accept either. - */ - return (LENCISHORT(go->neg_mru && go->mru != PPP_DEFMRU) + - LENCILONG(go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl) + - LENCICHAP(go->neg_chap) + - LENCISHORT(!go->neg_chap && go->neg_upap) + - LENCILQR(go->neg_lqr) + - LENCICBCP(go->neg_cbcp) + - LENCILONG(go->neg_magicnumber) + - LENCIVOID(go->neg_pcompression) + - LENCIVOID(go->neg_accompression)); -} - - -/* - * lcp_addci - Add our desired CIs to a packet. - */ -static void lcp_addci(fsm *f, u_char *ucp, int *lenp) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - u_char *start_ucp = ucp; - -#define ADDCIVOID(opt, neg) \ - if (neg) { \ - LCPDEBUG((LOG_INFO, "lcp_addci: opt=%d\n", opt)); \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_VOID, ucp); \ - } -#define ADDCISHORT(opt, neg, val) \ - if (neg) { \ - LCPDEBUG((LOG_INFO, "lcp_addci: INT opt=%d %X\n", opt, val)); \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_SHORT, ucp); \ - PUTSHORT(val, ucp); \ - } -#define ADDCICHAP(opt, neg, val, digest) \ - if (neg) { \ - LCPDEBUG((LOG_INFO, "lcp_addci: CHAP opt=%d %X\n", opt, val)); \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_CHAP, ucp); \ - PUTSHORT(val, ucp); \ - PUTCHAR(digest, ucp); \ - } -#define ADDCILONG(opt, neg, val) \ - if (neg) { \ - LCPDEBUG((LOG_INFO, "lcp_addci: L opt=%d %lX\n", opt, val)); \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_LONG, ucp); \ - PUTLONG(val, ucp); \ - } -#define ADDCILQR(opt, neg, val) \ - if (neg) { \ - LCPDEBUG((LOG_INFO, "lcp_addci: LQR opt=%d %lX\n", opt, val)); \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_LQR, ucp); \ - PUTSHORT(PPP_LQR, ucp); \ - PUTLONG(val, ucp); \ - } -#define ADDCICHAR(opt, neg, val) \ - if (neg) { \ - LCPDEBUG((LOG_INFO, "lcp_addci: CHAR opt=%d %X '%z'\n", opt, val, val)); \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_CHAR, ucp); \ - PUTCHAR(val, ucp); \ - } - - ADDCISHORT(CI_MRU, go->neg_mru && go->mru != PPP_DEFMRU, go->mru); - ADDCILONG(CI_ASYNCMAP, go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl, - go->asyncmap); - ADDCICHAP(CI_AUTHTYPE, go->neg_chap, PPP_CHAP, go->chap_mdtype); - ADDCISHORT(CI_AUTHTYPE, !go->neg_chap && go->neg_upap, PPP_PAP); - ADDCILQR(CI_QUALITY, go->neg_lqr, go->lqr_period); - ADDCICHAR(CI_CALLBACK, go->neg_cbcp, CBCP_OPT); - ADDCILONG(CI_MAGICNUMBER, go->neg_magicnumber, go->magicnumber); - ADDCIVOID(CI_PCOMPRESSION, go->neg_pcompression); - ADDCIVOID(CI_ACCOMPRESSION, go->neg_accompression); - - if (ucp - start_ucp != *lenp) { - /* this should never happen, because peer_mtu should be 1500 */ - LCPDEBUG((LOG_ERR, "Bug in lcp_addci: wrong length\n")); - } -} - - -/* - * lcp_ackci - Ack our CIs. - * This should not modify any state if the Ack is bad. - * - * Returns: - * 0 - Ack was bad. - * 1 - Ack was good. - */ -static int lcp_ackci(fsm *f, u_char *p, int len) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - u_char cilen, citype, cichar; - u_short cishort; - u32_t cilong; - - /* - * CIs must be in exactly the same order that we sent. - * Check packet length and CI length at each step. - * If we find any deviations, then this packet is bad. - */ -#define ACKCIVOID(opt, neg) \ - if (neg) { \ - if ((len -= CILEN_VOID) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_VOID || \ - citype != opt) \ - goto bad; \ - } -#define ACKCISHORT(opt, neg, val) \ - if (neg) { \ - if ((len -= CILEN_SHORT) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_SHORT || \ - citype != opt) \ - goto bad; \ - GETSHORT(cishort, p); \ - if (cishort != val) \ - goto bad; \ - } -#define ACKCICHAR(opt, neg, val) \ - if (neg) { \ - if ((len -= CILEN_CHAR) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_CHAR || \ - citype != opt) \ - goto bad; \ - GETCHAR(cichar, p); \ - if (cichar != val) \ - goto bad; \ - } -#define ACKCICHAP(opt, neg, val, digest) \ - if (neg) { \ - if ((len -= CILEN_CHAP) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_CHAP || \ - citype != opt) \ - goto bad; \ - GETSHORT(cishort, p); \ - if (cishort != val) \ - goto bad; \ - GETCHAR(cichar, p); \ - if (cichar != digest) \ - goto bad; \ - } -#define ACKCILONG(opt, neg, val) \ - if (neg) { \ - if ((len -= CILEN_LONG) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_LONG || \ - citype != opt) \ - goto bad; \ - GETLONG(cilong, p); \ - if (cilong != val) \ - goto bad; \ - } -#define ACKCILQR(opt, neg, val) \ - if (neg) { \ - if ((len -= CILEN_LQR) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_LQR || \ - citype != opt) \ - goto bad; \ - GETSHORT(cishort, p); \ - if (cishort != PPP_LQR) \ - goto bad; \ - GETLONG(cilong, p); \ - if (cilong != val) \ - goto bad; \ - } - - ACKCISHORT(CI_MRU, go->neg_mru && go->mru != PPP_DEFMRU, go->mru); - ACKCILONG(CI_ASYNCMAP, go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl, - go->asyncmap); - ACKCICHAP(CI_AUTHTYPE, go->neg_chap, PPP_CHAP, go->chap_mdtype); - ACKCISHORT(CI_AUTHTYPE, !go->neg_chap && go->neg_upap, PPP_PAP); - ACKCILQR(CI_QUALITY, go->neg_lqr, go->lqr_period); - ACKCICHAR(CI_CALLBACK, go->neg_cbcp, CBCP_OPT); - ACKCILONG(CI_MAGICNUMBER, go->neg_magicnumber, go->magicnumber); - ACKCIVOID(CI_PCOMPRESSION, go->neg_pcompression); - ACKCIVOID(CI_ACCOMPRESSION, go->neg_accompression); - - /* - * If there are any remaining CIs, then this packet is bad. - */ - if (len != 0) - goto bad; - LCPDEBUG((LOG_INFO, "lcp_acki: Ack\n")); - return (1); -bad: - LCPDEBUG((LOG_WARNING, "lcp_acki: received bad Ack!\n")); - return (0); -} - - -/* - * lcp_nakci - Peer has sent a NAK for some of our CIs. - * This should not modify any state if the Nak is bad - * or if LCP is in the OPENED state. - * - * Returns: - * 0 - Nak was bad. - * 1 - Nak was good. - */ -static int lcp_nakci(fsm *f, u_char *p, int len) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - lcp_options *wo = &lcp_wantoptions[f->unit]; - u_char citype, cichar, *next; - u_short cishort; - u32_t cilong; - lcp_options no; /* options we've seen Naks for */ - lcp_options try; /* options to request next time */ - int looped_back = 0; - int cilen; - - BZERO(&no, sizeof(no)); - try = *go; - - /* - * Any Nak'd CIs must be in exactly the same order that we sent. - * Check packet length and CI length at each step. - * If we find any deviations, then this packet is bad. - */ -#define NAKCIVOID(opt, neg, code) \ - if (go->neg && \ - len >= CILEN_VOID && \ - p[1] == CILEN_VOID && \ - p[0] == opt) { \ - len -= CILEN_VOID; \ - INCPTR(CILEN_VOID, p); \ - no.neg = 1; \ - code \ - } -#define NAKCICHAP(opt, neg, code) \ - if (go->neg && \ - len >= CILEN_CHAP && \ - p[1] == CILEN_CHAP && \ - p[0] == opt) { \ - len -= CILEN_CHAP; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - GETCHAR(cichar, p); \ - no.neg = 1; \ - code \ - } -#define NAKCICHAR(opt, neg, code) \ - if (go->neg && \ - len >= CILEN_CHAR && \ - p[1] == CILEN_CHAR && \ - p[0] == opt) { \ - len -= CILEN_CHAR; \ - INCPTR(2, p); \ - GETCHAR(cichar, p); \ - no.neg = 1; \ - code \ - } -#define NAKCISHORT(opt, neg, code) \ - if (go->neg && \ - len >= CILEN_SHORT && \ - p[1] == CILEN_SHORT && \ - p[0] == opt) { \ - len -= CILEN_SHORT; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - no.neg = 1; \ - code \ - } -#define NAKCILONG(opt, neg, code) \ - if (go->neg && \ - len >= CILEN_LONG && \ - p[1] == CILEN_LONG && \ - p[0] == opt) { \ - len -= CILEN_LONG; \ - INCPTR(2, p); \ - GETLONG(cilong, p); \ - no.neg = 1; \ - code \ - } -#define NAKCILQR(opt, neg, code) \ - if (go->neg && \ - len >= CILEN_LQR && \ - p[1] == CILEN_LQR && \ - p[0] == opt) { \ - len -= CILEN_LQR; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - GETLONG(cilong, p); \ - no.neg = 1; \ - code \ - } - - /* - * We don't care if they want to send us smaller packets than - * we want. Therefore, accept any MRU less than what we asked for, - * but then ignore the new value when setting the MRU in the kernel. - * If they send us a bigger MRU than what we asked, accept it, up to - * the limit of the default MRU we'd get if we didn't negotiate. - */ - if (go->neg_mru && go->mru != PPP_DEFMRU) { - NAKCISHORT(CI_MRU, neg_mru, - if (cishort <= wo->mru || cishort < PPP_DEFMRU) - try.mru = cishort; - ); - } - - /* - * Add any characters they want to our (receive-side) asyncmap. - */ - if (go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl) { - NAKCILONG(CI_ASYNCMAP, neg_asyncmap, - try.asyncmap = go->asyncmap | cilong; - ); - } - - /* - * If they've nak'd our authentication-protocol, check whether - * they are proposing a different protocol, or a different - * hash algorithm for CHAP. - */ - if ((go->neg_chap || go->neg_upap) - && len >= CILEN_SHORT - && p[0] == CI_AUTHTYPE && p[1] >= CILEN_SHORT && p[1] <= len) { - cilen = p[1]; - len -= cilen; - no.neg_chap = go->neg_chap; - no.neg_upap = go->neg_upap; - INCPTR(2, p); - GETSHORT(cishort, p); - if (cishort == PPP_PAP && cilen == CILEN_SHORT) { - /* - * If we were asking for CHAP, they obviously don't want to do it. - * If we weren't asking for CHAP, then we were asking for PAP, - * in which case this Nak is bad. - */ - if (!go->neg_chap) - goto bad; - try.neg_chap = 0; - - } else if (cishort == PPP_CHAP && cilen == CILEN_CHAP) { - GETCHAR(cichar, p); - if (go->neg_chap) { - /* - * We were asking for CHAP/MD5; they must want a different - * algorithm. If they can't do MD5, we'll have to stop - * asking for CHAP. - */ - if (cichar != go->chap_mdtype) - try.neg_chap = 0; - } else { - /* - * Stop asking for PAP if we were asking for it. - */ - try.neg_upap = 0; - } - - } else { - /* - * We don't recognize what they're suggesting. - * Stop asking for what we were asking for. - */ - if (go->neg_chap) - try.neg_chap = 0; - else - try.neg_upap = 0; - p += cilen - CILEN_SHORT; - } - } - - /* - * If they can't cope with our link quality protocol, we'll have - * to stop asking for LQR. We haven't got any other protocol. - * If they Nak the reporting period, take their value XXX ? - */ - NAKCILQR(CI_QUALITY, neg_lqr, - if (cishort != PPP_LQR) - try.neg_lqr = 0; - else - try.lqr_period = cilong; - ); - - /* - * Only implementing CBCP...not the rest of the callback options - */ - NAKCICHAR(CI_CALLBACK, neg_cbcp, - try.neg_cbcp = 0; - ); - - /* - * Check for a looped-back line. - */ - NAKCILONG(CI_MAGICNUMBER, neg_magicnumber, - try.magicnumber = magic(); - looped_back = 1; - ); - - /* - * Peer shouldn't send Nak for protocol compression or - * address/control compression requests; they should send - * a Reject instead. If they send a Nak, treat it as a Reject. - */ - NAKCIVOID(CI_PCOMPRESSION, neg_pcompression, - try.neg_pcompression = 0; - ); - NAKCIVOID(CI_ACCOMPRESSION, neg_accompression, - try.neg_accompression = 0; - ); - - /* - * There may be remaining CIs, if the peer is requesting negotiation - * on an option that we didn't include in our request packet. - * If we see an option that we requested, or one we've already seen - * in this packet, then this packet is bad. - * If we wanted to respond by starting to negotiate on the requested - * option(s), we could, but we don't, because except for the - * authentication type and quality protocol, if we are not negotiating - * an option, it is because we were told not to. - * For the authentication type, the Nak from the peer means - * `let me authenticate myself with you' which is a bit pointless. - * For the quality protocol, the Nak means `ask me to send you quality - * reports', but if we didn't ask for them, we don't want them. - * An option we don't recognize represents the peer asking to - * negotiate some option we don't support, so ignore it. - */ - while (len > CILEN_VOID) { - GETCHAR(citype, p); - GETCHAR(cilen, p); - if (cilen < CILEN_VOID || (len -= cilen) < 0) - goto bad; - next = p + cilen - 2; - - switch (citype) { - case CI_MRU: - if ((go->neg_mru && go->mru != PPP_DEFMRU) - || no.neg_mru || cilen != CILEN_SHORT) - goto bad; - GETSHORT(cishort, p); - if (cishort < PPP_DEFMRU) - try.mru = cishort; - break; - case CI_ASYNCMAP: - if ((go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl) - || no.neg_asyncmap || cilen != CILEN_LONG) - goto bad; - break; - case CI_AUTHTYPE: - if (go->neg_chap || no.neg_chap || go->neg_upap || no.neg_upap) - goto bad; - break; - case CI_MAGICNUMBER: - if (go->neg_magicnumber || no.neg_magicnumber || - cilen != CILEN_LONG) - goto bad; - break; - case CI_PCOMPRESSION: - if (go->neg_pcompression || no.neg_pcompression - || cilen != CILEN_VOID) - goto bad; - break; - case CI_ACCOMPRESSION: - if (go->neg_accompression || no.neg_accompression - || cilen != CILEN_VOID) - goto bad; - break; - case CI_QUALITY: - if (go->neg_lqr || no.neg_lqr || cilen != CILEN_LQR) - goto bad; - break; - } - p = next; - } - - /* If there is still anything left, this packet is bad. */ - if (len != 0) - goto bad; - - /* - * OK, the Nak is good. Now we can update state. - */ - if (f->state != OPENED) { - if (looped_back) { - if (++try.numloops >= lcp_loopbackfail) { - LCPDEBUG((LOG_NOTICE, "Serial line is looped back.\n")); - lcp_close(f->unit, "Loopback detected"); - } - } - else - try.numloops = 0; - *go = try; - } - - return 1; - -bad: - LCPDEBUG((LOG_WARNING, "lcp_nakci: received bad Nak!\n")); - return 0; -} - - -/* - * lcp_rejci - Peer has Rejected some of our CIs. - * This should not modify any state if the Reject is bad - * or if LCP is in the OPENED state. - * - * Returns: - * 0 - Reject was bad. - * 1 - Reject was good. - */ -static int lcp_rejci(fsm *f, u_char *p, int len) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - u_char cichar; - u_short cishort; - u32_t cilong; - lcp_options try; /* options to request next time */ - - try = *go; - - /* - * Any Rejected CIs must be in exactly the same order that we sent. - * Check packet length and CI length at each step. - * If we find any deviations, then this packet is bad. - */ -#define REJCIVOID(opt, neg) \ - if (go->neg && \ - len >= CILEN_VOID && \ - p[1] == CILEN_VOID && \ - p[0] == opt) { \ - len -= CILEN_VOID; \ - INCPTR(CILEN_VOID, p); \ - try.neg = 0; \ - LCPDEBUG((LOG_INFO, "lcp_rejci: void opt %d rejected\n", opt)); \ - } -#define REJCISHORT(opt, neg, val) \ - if (go->neg && \ - len >= CILEN_SHORT && \ - p[1] == CILEN_SHORT && \ - p[0] == opt) { \ - len -= CILEN_SHORT; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - /* Check rejected value. */ \ - if (cishort != val) \ - goto bad; \ - try.neg = 0; \ - LCPDEBUG((LOG_INFO,"lcp_rejci: short opt %d rejected\n", opt)); \ - } -#define REJCICHAP(opt, neg, val, digest) \ - if (go->neg && \ - len >= CILEN_CHAP && \ - p[1] == CILEN_CHAP && \ - p[0] == opt) { \ - len -= CILEN_CHAP; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - GETCHAR(cichar, p); \ - /* Check rejected value. */ \ - if (cishort != val || cichar != digest) \ - goto bad; \ - try.neg = 0; \ - try.neg_upap = 0; \ - LCPDEBUG((LOG_INFO,"lcp_rejci: chap opt %d rejected\n", opt)); \ - } -#define REJCILONG(opt, neg, val) \ - if (go->neg && \ - len >= CILEN_LONG && \ - p[1] == CILEN_LONG && \ - p[0] == opt) { \ - len -= CILEN_LONG; \ - INCPTR(2, p); \ - GETLONG(cilong, p); \ - /* Check rejected value. */ \ - if (cilong != val) \ - goto bad; \ - try.neg = 0; \ - LCPDEBUG((LOG_INFO,"lcp_rejci: long opt %d rejected\n", opt)); \ - } -#define REJCILQR(opt, neg, val) \ - if (go->neg && \ - len >= CILEN_LQR && \ - p[1] == CILEN_LQR && \ - p[0] == opt) { \ - len -= CILEN_LQR; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - GETLONG(cilong, p); \ - /* Check rejected value. */ \ - if (cishort != PPP_LQR || cilong != val) \ - goto bad; \ - try.neg = 0; \ - LCPDEBUG((LOG_INFO,"lcp_rejci: LQR opt %d rejected\n", opt)); \ - } -#define REJCICBCP(opt, neg, val) \ - if (go->neg && \ - len >= CILEN_CBCP && \ - p[1] == CILEN_CBCP && \ - p[0] == opt) { \ - len -= CILEN_CBCP; \ - INCPTR(2, p); \ - GETCHAR(cichar, p); \ - /* Check rejected value. */ \ - if (cichar != val) \ - goto bad; \ - try.neg = 0; \ - LCPDEBUG((LOG_INFO,"lcp_rejci: Callback opt %d rejected\n", opt)); \ - } - - REJCISHORT(CI_MRU, neg_mru, go->mru); - REJCILONG(CI_ASYNCMAP, neg_asyncmap, go->asyncmap); - REJCICHAP(CI_AUTHTYPE, neg_chap, PPP_CHAP, go->chap_mdtype); - if (!go->neg_chap) { - REJCISHORT(CI_AUTHTYPE, neg_upap, PPP_PAP); - } - REJCILQR(CI_QUALITY, neg_lqr, go->lqr_period); - REJCICBCP(CI_CALLBACK, neg_cbcp, CBCP_OPT); - REJCILONG(CI_MAGICNUMBER, neg_magicnumber, go->magicnumber); - REJCIVOID(CI_PCOMPRESSION, neg_pcompression); - REJCIVOID(CI_ACCOMPRESSION, neg_accompression); - - /* - * If there are any remaining CIs, then this packet is bad. - */ - if (len != 0) - goto bad; - /* - * Now we can update state. - */ - if (f->state != OPENED) - *go = try; - return 1; - -bad: - LCPDEBUG((LOG_WARNING, "lcp_rejci: received bad Reject!\n")); - return 0; -} - - -/* - * lcp_reqci - Check the peer's requested CIs and send appropriate response. - * - * Returns: CONFACK, CONFNAK or CONFREJ and input packet modified - * appropriately. If reject_if_disagree is non-zero, doesn't return - * CONFNAK; returns CONFREJ if it can't return CONFACK. - */ -static int lcp_reqci(fsm *f, - u_char *inp, /* Requested CIs */ - int *lenp, /* Length of requested CIs */ - int reject_if_disagree) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - lcp_options *ho = &lcp_hisoptions[f->unit]; - lcp_options *ao = &lcp_allowoptions[f->unit]; - u_char *cip, *next; /* Pointer to current and next CIs */ - int cilen, citype, cichar; /* Parsed len, type, char value */ - u_short cishort; /* Parsed short value */ - u32_t cilong; /* Parse long value */ - int rc = CONFACK; /* Final packet return code */ - int orc; /* Individual option return code */ - u_char *p; /* Pointer to next char to parse */ - u_char *rejp; /* Pointer to next char in reject frame */ - u_char *nakp; /* Pointer to next char in Nak frame */ - int l = *lenp; /* Length left */ -#if TRACELCP > 0 - char traceBuf[80]; - int traceNdx = 0; -#endif - - /* - * Reset all his options. - */ - BZERO(ho, sizeof(*ho)); - - /* - * Process all his options. - */ - next = inp; - nakp = nak_buffer; - rejp = inp; - while (l) { - orc = CONFACK; /* Assume success */ - cip = p = next; /* Remember begining of CI */ - if (l < 2 || /* Not enough data for CI header or */ - p[1] < 2 || /* CI length too small or */ - p[1] > l) { /* CI length too big? */ - LCPDEBUG((LOG_WARNING, "lcp_reqci: bad CI length!\n")); - orc = CONFREJ; /* Reject bad CI */ - cilen = l; /* Reject till end of packet */ - l = 0; /* Don't loop again */ - citype = 0; - goto endswitch; - } - GETCHAR(citype, p); /* Parse CI type */ - GETCHAR(cilen, p); /* Parse CI length */ - l -= cilen; /* Adjust remaining length */ - next += cilen; /* Step to next CI */ - - switch (citype) { /* Check CI type */ - case CI_MRU: - if (!ao->neg_mru) { /* Allow option? */ - LCPDEBUG((LOG_INFO, "lcp_reqci: Reject MRU - not allowed\n")); - orc = CONFREJ; /* Reject CI */ - break; - } else if (cilen != CILEN_SHORT) { /* Check CI length */ - LCPDEBUG((LOG_INFO, "lcp_reqci: Reject MRU - bad length\n")); - orc = CONFREJ; /* Reject CI */ - break; - } - GETSHORT(cishort, p); /* Parse MRU */ - - /* - * He must be able to receive at least our minimum. - * No need to check a maximum. If he sends a large number, - * we'll just ignore it. - */ - if (cishort < PPP_MINMRU) { - LCPDEBUG((LOG_INFO, "lcp_reqci: Nak - MRU too small\n")); - orc = CONFNAK; /* Nak CI */ - PUTCHAR(CI_MRU, nakp); - PUTCHAR(CILEN_SHORT, nakp); - PUTSHORT(PPP_MINMRU, nakp); /* Give him a hint */ - break; - } - ho->neg_mru = 1; /* Remember he sent MRU */ - ho->mru = cishort; /* And remember value */ -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " MRU %d", cishort); - traceNdx = strlen(traceBuf); -#endif - break; - - case CI_ASYNCMAP: - if (!ao->neg_asyncmap) { - LCPDEBUG((LOG_INFO, "lcp_reqci: Reject ASYNCMAP not allowed\n")); - orc = CONFREJ; - break; - } else if (cilen != CILEN_LONG) { - LCPDEBUG((LOG_INFO, "lcp_reqci: Reject ASYNCMAP bad length\n")); - orc = CONFREJ; - break; - } - GETLONG(cilong, p); - - /* - * Asyncmap must have set at least the bits - * which are set in lcp_allowoptions[unit].asyncmap. - */ - if ((ao->asyncmap & ~cilong) != 0) { - LCPDEBUG((LOG_INFO, "lcp_reqci: Nak ASYNCMAP %lX missing %lX\n", - cilong, ao->asyncmap)); - orc = CONFNAK; - PUTCHAR(CI_ASYNCMAP, nakp); - PUTCHAR(CILEN_LONG, nakp); - PUTLONG(ao->asyncmap | cilong, nakp); - break; - } - ho->neg_asyncmap = 1; - ho->asyncmap = cilong; -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " ASYNCMAP=%lX", cilong); - traceNdx = strlen(traceBuf); -#endif - break; - - case CI_AUTHTYPE: - if (cilen < CILEN_SHORT) { - LCPDEBUG((LOG_INFO, "lcp_reqci: Reject AUTHTYPE missing arg\n")); - orc = CONFREJ; - break; - } else if (!(ao->neg_upap || ao->neg_chap)) { - /* - * Reject the option if we're not willing to authenticate. - */ - LCPDEBUG((LOG_INFO, "lcp_reqci: Reject AUTHTYPE not allowed\n")); - orc = CONFREJ; - break; - } - GETSHORT(cishort, p); - - /* - * Authtype must be UPAP or CHAP. - * - * Note: if both ao->neg_upap and ao->neg_chap are set, - * and the peer sends a Configure-Request with two - * authenticate-protocol requests, one for CHAP and one - * for UPAP, then we will reject the second request. - * Whether we end up doing CHAP or UPAP depends then on - * the ordering of the CIs in the peer's Configure-Request. - */ - - if (cishort == PPP_PAP) { - if (ho->neg_chap) { /* we've already accepted CHAP */ - LCPDEBUG((LOG_WARNING, "lcp_reqci: Reject AUTHTYPE PAP already accepted\n")); - orc = CONFREJ; - break; - } else if (cilen != CILEN_SHORT) { - LCPDEBUG((LOG_WARNING, "lcp_reqci: Reject AUTHTYPE PAP bad len\n")); - orc = CONFREJ; - break; - } - if (!ao->neg_upap) { /* we don't want to do PAP */ - LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE PAP not allowed\n")); - orc = CONFNAK; /* NAK it and suggest CHAP */ - PUTCHAR(CI_AUTHTYPE, nakp); - PUTCHAR(CILEN_CHAP, nakp); - PUTSHORT(PPP_CHAP, nakp); - PUTCHAR(ao->chap_mdtype, nakp); - break; - } - ho->neg_upap = 1; -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " PAP (%X)", cishort); - traceNdx = strlen(traceBuf); -#endif - break; - } - if (cishort == PPP_CHAP) { - if (ho->neg_upap) { /* we've already accepted PAP */ - LCPDEBUG((LOG_WARNING, "lcp_reqci: Reject AUTHTYPE CHAP accepted PAP\n")); - orc = CONFREJ; - break; - } else if (cilen != CILEN_CHAP) { - LCPDEBUG((LOG_WARNING, "lcp_reqci: Reject AUTHTYPE CHAP bad len\n")); - orc = CONFREJ; - break; - } - if (!ao->neg_chap) { /* we don't want to do CHAP */ - LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE CHAP not allowed\n")); - orc = CONFNAK; /* NAK it and suggest PAP */ - PUTCHAR(CI_AUTHTYPE, nakp); - PUTCHAR(CILEN_SHORT, nakp); - PUTSHORT(PPP_PAP, nakp); - break; - } - GETCHAR(cichar, p); /* get digest type*/ - if (cichar != CHAP_DIGEST_MD5 -#ifdef CHAPMS - && cichar != CHAP_MICROSOFT -#endif - ) { - LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE CHAP digest=%d\n", cichar)); - orc = CONFNAK; - PUTCHAR(CI_AUTHTYPE, nakp); - PUTCHAR(CILEN_CHAP, nakp); - PUTSHORT(PPP_CHAP, nakp); - PUTCHAR(ao->chap_mdtype, nakp); - break; - } -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " CHAP %X,%d", cishort, cichar); - traceNdx = strlen(traceBuf); -#endif - ho->chap_mdtype = cichar; /* save md type */ - ho->neg_chap = 1; - break; - } - - /* - * We don't recognize the protocol they're asking for. - * Nak it with something we're willing to do. - * (At this point we know ao->neg_upap || ao->neg_chap.) - */ - orc = CONFNAK; - PUTCHAR(CI_AUTHTYPE, nakp); - if (ao->neg_chap) { - LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE %d req CHAP\n", cishort)); - PUTCHAR(CILEN_CHAP, nakp); - PUTSHORT(PPP_CHAP, nakp); - PUTCHAR(ao->chap_mdtype, nakp); - } - else { - LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE %d req PAP\n", cishort)); - PUTCHAR(CILEN_SHORT, nakp); - PUTSHORT(PPP_PAP, nakp); - } - break; - - case CI_QUALITY: - GETSHORT(cishort, p); - GETLONG(cilong, p); -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " QUALITY (%x %x)", cishort, (unsigned int) cilong); - traceNdx = strlen(traceBuf); -#endif - - if (!ao->neg_lqr || - cilen != CILEN_LQR) { - orc = CONFREJ; - break; - } - - /* - * Check the protocol and the reporting period. - * XXX When should we Nak this, and what with? - */ - if (cishort != PPP_LQR) { - orc = CONFNAK; - PUTCHAR(CI_QUALITY, nakp); - PUTCHAR(CILEN_LQR, nakp); - PUTSHORT(PPP_LQR, nakp); - PUTLONG(ao->lqr_period, nakp); - break; - } - break; - - case CI_MAGICNUMBER: - if (!(ao->neg_magicnumber || go->neg_magicnumber) || - cilen != CILEN_LONG) { - orc = CONFREJ; - break; - } - GETLONG(cilong, p); -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " MAGICNUMBER (%lX)", cilong); - traceNdx = strlen(traceBuf); -#endif - - /* - * He must have a different magic number. - */ - if (go->neg_magicnumber && - cilong == go->magicnumber) { - cilong = magic(); /* Don't put magic() inside macro! */ - orc = CONFNAK; - PUTCHAR(CI_MAGICNUMBER, nakp); - PUTCHAR(CILEN_LONG, nakp); - PUTLONG(cilong, nakp); - break; - } - ho->neg_magicnumber = 1; - ho->magicnumber = cilong; - break; - - - case CI_PCOMPRESSION: -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " PCOMPRESSION"); - traceNdx = strlen(traceBuf); -#endif - if (!ao->neg_pcompression || - cilen != CILEN_VOID) { - orc = CONFREJ; - break; - } - ho->neg_pcompression = 1; - break; - - case CI_ACCOMPRESSION: -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " ACCOMPRESSION"); - traceNdx = strlen(traceBuf); -#endif - if (!ao->neg_accompression || - cilen != CILEN_VOID) { - orc = CONFREJ; - break; - } - ho->neg_accompression = 1; - break; - - case CI_MRRU: -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " CI_MRRU"); - traceNdx = strlen(traceBuf); -#endif - orc = CONFREJ; - break; - - case CI_SSNHF: -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " CI_SSNHF"); - traceNdx = strlen(traceBuf); -#endif - orc = CONFREJ; - break; - - case CI_EPDISC: -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " CI_EPDISC"); - traceNdx = strlen(traceBuf); -#endif - orc = CONFREJ; - break; - - default: -#if TRACELCP - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " unknown %d", citype); - traceNdx = strlen(traceBuf); -#endif - orc = CONFREJ; - break; - } - - endswitch: -#if TRACELCP - if (traceNdx >= 80 - 32) { - LCPDEBUG((LOG_INFO, "lcp_reqci: rcvd%s\n", traceBuf)); - traceNdx = 0; - } -#endif - if (orc == CONFACK && /* Good CI */ - rc != CONFACK) /* but prior CI wasnt? */ - continue; /* Don't send this one */ - - if (orc == CONFNAK) { /* Nak this CI? */ - if (reject_if_disagree /* Getting fed up with sending NAKs? */ - && citype != CI_MAGICNUMBER) { - orc = CONFREJ; /* Get tough if so */ - } - else { - if (rc == CONFREJ) /* Rejecting prior CI? */ - continue; /* Don't send this one */ - rc = CONFNAK; - } - } - if (orc == CONFREJ) { /* Reject this CI */ - rc = CONFREJ; - if (cip != rejp) /* Need to move rejected CI? */ - BCOPY(cip, rejp, cilen); /* Move it */ - INCPTR(cilen, rejp); /* Update output pointer */ - } - } - - /* - * If we wanted to send additional NAKs (for unsent CIs), the - * code would go here. The extra NAKs would go at *nakp. - * At present there are no cases where we want to ask the - * peer to negotiate an option. - */ - - switch (rc) { - case CONFACK: - *lenp = (int)(next - inp); - break; - case CONFNAK: - /* - * Copy the Nak'd options from the nak_buffer to the caller's buffer. - */ - *lenp = (int)(nakp - nak_buffer); - BCOPY(nak_buffer, inp, *lenp); - break; - case CONFREJ: - *lenp = (int)(rejp - inp); - break; - } - -#if TRACELCP > 0 - if (traceNdx > 0) { - LCPDEBUG((LOG_INFO, "lcp_reqci: %s\n", traceBuf)); - } -#endif - LCPDEBUG((LOG_INFO, "lcp_reqci: returning CONF%s.\n", CODENAME(rc))); - return (rc); /* Return final code */ -} - - -/* - * lcp_up - LCP has come UP. - */ -static void lcp_up(fsm *f) -{ - lcp_options *wo = &lcp_wantoptions[f->unit]; - lcp_options *ho = &lcp_hisoptions[f->unit]; - lcp_options *go = &lcp_gotoptions[f->unit]; - lcp_options *ao = &lcp_allowoptions[f->unit]; - - if (!go->neg_magicnumber) - go->magicnumber = 0; - if (!ho->neg_magicnumber) - ho->magicnumber = 0; - - /* - * Set our MTU to the smaller of the MTU we wanted and - * the MRU our peer wanted. If we negotiated an MRU, - * set our MRU to the larger of value we wanted and - * the value we got in the negotiation. - */ - ppp_send_config(f->unit, LWIP_MIN(ao->mru, (ho->neg_mru? ho->mru: PPP_MRU)), - (ho->neg_asyncmap? ho->asyncmap: 0xffffffffl), - ho->neg_pcompression, ho->neg_accompression); - /* - * If the asyncmap hasn't been negotiated, we really should - * set the receive asyncmap to ffffffff, but we set it to 0 - * for backwards contemptibility. - */ - ppp_recv_config(f->unit, (go->neg_mru? LWIP_MAX(wo->mru, go->mru): PPP_MRU), - (go->neg_asyncmap? go->asyncmap: 0x00000000), - go->neg_pcompression, go->neg_accompression); - - if (ho->neg_mru) - peer_mru[f->unit] = ho->mru; - - lcp_echo_lowerup(f->unit); /* Enable echo messages */ - - link_established(f->unit); -} - - -/* - * lcp_down - LCP has gone DOWN. - * - * Alert other protocols. - */ -static void lcp_down(fsm *f) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - - lcp_echo_lowerdown(f->unit); - - link_down(f->unit); - - ppp_send_config(f->unit, PPP_MRU, 0xffffffffl, 0, 0); - ppp_recv_config(f->unit, PPP_MRU, - (go->neg_asyncmap? go->asyncmap: 0x00000000), - go->neg_pcompression, go->neg_accompression); - peer_mru[f->unit] = PPP_MRU; -} - - -/* - * lcp_starting - LCP needs the lower layer up. - */ -static void lcp_starting(fsm *f) -{ - link_required(f->unit); -} - - -/* - * lcp_finished - LCP has finished with the lower layer. - */ -static void lcp_finished(fsm *f) -{ - link_terminated(f->unit); -} - - -#if 0 -/* - * print_string - print a readable representation of a string using - * printer. - */ -static void print_string( - char *p, - int len, - void (*printer) (void *, char *, ...), - void *arg -) -{ - int c; - - printer(arg, "\""); - for (; len > 0; --len) { - c = *p++; - if (' ' <= c && c <= '~') { - if (c == '\\' || c == '"') - printer(arg, "\\"); - printer(arg, "%c", c); - } else { - switch (c) { - case '\n': - printer(arg, "\\n"); - break; - case '\r': - printer(arg, "\\r"); - break; - case '\t': - printer(arg, "\\t"); - break; - default: - printer(arg, "\\%.3o", c); - } - } - } - printer(arg, "\""); -} - - -/* - * lcp_printpkt - print the contents of an LCP packet. - */ -static char *lcp_codenames[] = { - "ConfReq", "ConfAck", "ConfNak", "ConfRej", - "TermReq", "TermAck", "CodeRej", "ProtRej", - "EchoReq", "EchoRep", "DiscReq" -}; - -static int lcp_printpkt( - u_char *p, - int plen, - void (*printer) (void *, char *, ...), - void *arg -) -{ - int code, id, len, olen; - u_char *pstart, *optend; - u_short cishort; - u32_t cilong; - - if (plen < HEADERLEN) - return 0; - pstart = p; - GETCHAR(code, p); - GETCHAR(id, p); - GETSHORT(len, p); - if (len < HEADERLEN || len > plen) - return 0; - - if (code >= 1 && code <= sizeof(lcp_codenames) / sizeof(char *)) - printer(arg, " %s", lcp_codenames[code-1]); - else - printer(arg, " code=0x%x", code); - printer(arg, " id=0x%x", id); - len -= HEADERLEN; - switch (code) { - case CONFREQ: - case CONFACK: - case CONFNAK: - case CONFREJ: - /* print option list */ - while (len >= 2) { - GETCHAR(code, p); - GETCHAR(olen, p); - p -= 2; - if (olen < 2 || olen > len) { - break; - } - printer(arg, " <"); - len -= olen; - optend = p + olen; - switch (code) { - case CI_MRU: - if (olen == CILEN_SHORT) { - p += 2; - GETSHORT(cishort, p); - printer(arg, "mru %d", cishort); - } - break; - case CI_ASYNCMAP: - if (olen == CILEN_LONG) { - p += 2; - GETLONG(cilong, p); - printer(arg, "asyncmap 0x%lx", cilong); - } - break; - case CI_AUTHTYPE: - if (olen >= CILEN_SHORT) { - p += 2; - printer(arg, "auth "); - GETSHORT(cishort, p); - switch (cishort) { - case PPP_PAP: - printer(arg, "pap"); - break; - case PPP_CHAP: - printer(arg, "chap"); - break; - default: - printer(arg, "0x%x", cishort); - } - } - break; - case CI_QUALITY: - if (olen >= CILEN_SHORT) { - p += 2; - printer(arg, "quality "); - GETSHORT(cishort, p); - switch (cishort) { - case PPP_LQR: - printer(arg, "lqr"); - break; - default: - printer(arg, "0x%x", cishort); - } - } - break; - case CI_CALLBACK: - if (olen >= CILEN_CHAR) { - p += 2; - printer(arg, "callback "); - GETSHORT(cishort, p); - switch (cishort) { - case CBCP_OPT: - printer(arg, "CBCP"); - break; - default: - printer(arg, "0x%x", cishort); - } - } - break; - case CI_MAGICNUMBER: - if (olen == CILEN_LONG) { - p += 2; - GETLONG(cilong, p); - printer(arg, "magic 0x%x", cilong); - } - break; - case CI_PCOMPRESSION: - if (olen == CILEN_VOID) { - p += 2; - printer(arg, "pcomp"); - } - break; - case CI_ACCOMPRESSION: - if (olen == CILEN_VOID) { - p += 2; - printer(arg, "accomp"); - } - break; - } - while (p < optend) { - GETCHAR(code, p); - printer(arg, " %.2x", code); - } - printer(arg, ">"); - } - break; - - case TERMACK: - case TERMREQ: - if (len > 0 && *p >= ' ' && *p < 0x7f) { - printer(arg, " "); - print_string((char*)p, len, printer, arg); - p += len; - len = 0; - } - break; - - case ECHOREQ: - case ECHOREP: - case DISCREQ: - if (len >= 4) { - GETLONG(cilong, p); - printer(arg, " magic=0x%x", cilong); - p += 4; - len -= 4; - } - break; - } - - /* print the rest of the bytes in the packet */ - for (; len > 0; --len) { - GETCHAR(code, p); - printer(arg, " %.2x", code); - } - - return (int)(p - pstart); -} -#endif - -/* - * Time to shut down the link because there is nothing out there. - */ - -static void LcpLinkFailure (fsm *f) -{ - if (f->state == OPENED) { - LCPDEBUG((LOG_INFO, "No response to %d echo-requests\n", lcp_echos_pending)); - LCPDEBUG((LOG_NOTICE, "Serial link appears to be disconnected.\n")); - lcp_close(f->unit, "Peer not responding"); - } -} - -/* - * Timer expired for the LCP echo requests from this process. - */ - -static void LcpEchoCheck (fsm *f) -{ - LcpSendEchoRequest (f); - - /* - * Start the timer for the next interval. - */ - LWIP_ASSERT("lcp_echo_timer_running == 0", lcp_echo_timer_running == 0); - - TIMEOUT (LcpEchoTimeout, f, lcp_echo_interval); - lcp_echo_timer_running = 1; -} - -/* - * LcpEchoTimeout - Timer expired on the LCP echo - */ - -static void LcpEchoTimeout (void *arg) -{ - if (lcp_echo_timer_running != 0) { - lcp_echo_timer_running = 0; - LcpEchoCheck ((fsm *) arg); - } -} - -/* - * LcpEchoReply - LCP has received a reply to the echo - */ -static void lcp_received_echo_reply (fsm *f, int id, u_char *inp, int len) -{ - u32_t magic; - - (void)id; - - /* Check the magic number - don't count replies from ourselves. */ - if (len < 4) { - LCPDEBUG((LOG_WARNING, "lcp: received short Echo-Reply, length %d\n", len)); - return; - } - GETLONG(magic, inp); - if (lcp_gotoptions[f->unit].neg_magicnumber - && magic == lcp_gotoptions[f->unit].magicnumber) { - LCPDEBUG((LOG_WARNING, "appear to have received our own echo-reply!\n")); - return; - } - - /* Reset the number of outstanding echo frames */ - lcp_echos_pending = 0; -} - -/* - * LcpSendEchoRequest - Send an echo request frame to the peer - */ - -static void LcpSendEchoRequest (fsm *f) -{ - u32_t lcp_magic; - u_char pkt[4], *pktp; - - /* - * Detect the failure of the peer at this point. - */ - if (lcp_echo_fails != 0) { - if (lcp_echos_pending++ >= lcp_echo_fails) { - LcpLinkFailure(f); - lcp_echos_pending = 0; - } - } - - /* - * Make and send the echo request frame. - */ - if (f->state == OPENED) { - lcp_magic = lcp_gotoptions[f->unit].magicnumber; - pktp = pkt; - PUTLONG(lcp_magic, pktp); - fsm_sdata(f, ECHOREQ, (u_char)(lcp_echo_number++ & 0xFF), pkt, (int)(pktp - pkt)); - } -} - -/* - * lcp_echo_lowerup - Start the timer for the LCP frame - */ - -static void lcp_echo_lowerup (int unit) -{ - fsm *f = &lcp_fsm[unit]; - - /* Clear the parameters for generating echo frames */ - lcp_echos_pending = 0; - lcp_echo_number = 0; - lcp_echo_timer_running = 0; - - /* If a timeout interval is specified then start the timer */ - if (lcp_echo_interval != 0) - LcpEchoCheck (f); -} - -/* - * lcp_echo_lowerdown - Stop the timer for the LCP frame - */ - -static void lcp_echo_lowerdown (int unit) -{ - fsm *f = &lcp_fsm[unit]; - - if (lcp_echo_timer_running != 0) { - UNTIMEOUT (LcpEchoTimeout, f); - lcp_echo_timer_running = 0; - } -} - -#endif /* PPP_SUPPORT */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/lcp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/lcp.h deleted file mode 100644 index 3bf2edd5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/lcp.h +++ /dev/null @@ -1,169 +0,0 @@ -/***************************************************************************** -* lcp.h - Network Link Control Protocol header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-11-05 Guy Lancaster , Global Election Systems Inc. -* Original derived from BSD codes. -*****************************************************************************/ -/* - * lcp.h - Link Control Protocol definitions. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * $Id$ - */ - -#ifndef LCP_H -#define LCP_H - - -/************************* -*** PUBLIC DEFINITIONS *** -*************************/ -/* - * Options. - */ -#define CI_MRU 1 /* Maximum Receive Unit */ -#define CI_ASYNCMAP 2 /* Async Control Character Map */ -#define CI_AUTHTYPE 3 /* Authentication Type */ -#define CI_QUALITY 4 /* Quality Protocol */ -#define CI_MAGICNUMBER 5 /* Magic Number */ -#define CI_PCOMPRESSION 7 /* Protocol Field Compression */ -#define CI_ACCOMPRESSION 8 /* Address/Control Field Compression */ -#define CI_CALLBACK 13 /* callback */ -#define CI_MRRU 17 /* max reconstructed receive unit; multilink */ -#define CI_SSNHF 18 /* short sequence numbers for multilink */ -#define CI_EPDISC 19 /* endpoint discriminator */ - -/* - * LCP-specific packet types. - */ -#define PROTREJ 8 /* Protocol Reject */ -#define ECHOREQ 9 /* Echo Request */ -#define ECHOREP 10 /* Echo Reply */ -#define DISCREQ 11 /* Discard Request */ -#define CBCP_OPT 6 /* Use callback control protocol */ - - -/************************ -*** PUBLIC DATA TYPES *** -************************/ - -/* - * The state of options is described by an lcp_options structure. - */ -typedef struct lcp_options { - u_int passive : 1; /* Don't die if we don't get a response */ - u_int silent : 1; /* Wait for the other end to start first */ - u_int restart : 1; /* Restart vs. exit after close */ - u_int neg_mru : 1; /* Negotiate the MRU? */ - u_int neg_asyncmap : 1; /* Negotiate the async map? */ - u_int neg_upap : 1; /* Ask for UPAP authentication? */ - u_int neg_chap : 1; /* Ask for CHAP authentication? */ - u_int neg_magicnumber : 1; /* Ask for magic number? */ - u_int neg_pcompression : 1; /* HDLC Protocol Field Compression? */ - u_int neg_accompression : 1; /* HDLC Address/Control Field Compression? */ - u_int neg_lqr : 1; /* Negotiate use of Link Quality Reports */ - u_int neg_cbcp : 1; /* Negotiate use of CBCP */ -#ifdef PPP_MULTILINK - u_int neg_mrru : 1; /* Negotiate multilink MRRU */ - u_int neg_ssnhf : 1; /* Negotiate short sequence numbers */ - u_int neg_endpoint : 1; /* Negotiate endpoint discriminator */ -#endif - u_short mru; /* Value of MRU */ -#ifdef PPP_MULTILINK - u_short mrru; /* Value of MRRU, and multilink enable */ -#endif - u_char chap_mdtype; /* which MD type (hashing algorithm) */ - u32_t asyncmap; /* Value of async map */ - u32_t magicnumber; - int numloops; /* Number of loops during magic number neg. */ - u32_t lqr_period; /* Reporting period for LQR 1/100ths second */ -#ifdef PPP_MULTILINK - struct epdisc endpoint; /* endpoint discriminator */ -#endif -} lcp_options; - -/* - * Values for phase from BSD pppd.h based on RFC 1661. - */ -typedef enum { - PHASE_DEAD = 0, - PHASE_INITIALIZE, - PHASE_ESTABLISH, - PHASE_AUTHENTICATE, - PHASE_CALLBACK, - PHASE_NETWORK, - PHASE_TERMINATE -} LinkPhase; - - -/***************************** -*** PUBLIC DATA STRUCTURES *** -*****************************/ - -extern LinkPhase lcp_phase[NUM_PPP]; /* Phase of link session (RFC 1661) */ -extern lcp_options lcp_wantoptions[]; -extern lcp_options lcp_gotoptions[]; -extern lcp_options lcp_allowoptions[]; -extern lcp_options lcp_hisoptions[]; -extern ext_accm xmit_accm[]; - - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ - -void lcp_init (int); -void lcp_open (int); -void lcp_close (int, char *); -void lcp_lowerup (int); -void lcp_lowerdown (int); -void lcp_sprotrej (int, u_char *, int); /* send protocol reject */ - -extern struct protent lcp_protent; - -/* Default number of times we receive our magic number from the peer - before deciding the link is looped-back. */ -#define DEFLOOPBACKFAIL 10 - -#endif /* LCP_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/magic.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/magic.c deleted file mode 100644 index 42740169..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/magic.c +++ /dev/null @@ -1,79 +0,0 @@ -/***************************************************************************** -* magic.c - Network Random Number Generator program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-04 Guy Lancaster , Global Election Systems Inc. -* Original based on BSD magic.c. -*****************************************************************************/ -/* - * magic.c - PPP Magic Number routines. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include "ppp.h" -#include "randm.h" -#include "magic.h" - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * magicInit - Initialize the magic number generator. - * - * Since we use another random number generator that has its own - * initialization, we do nothing here. - */ -void magicInit() -{ - return; -} - -/* - * magic - Returns the next magic number. - */ -u32_t magic() -{ - return avRandom(); -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/magic.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/magic.h deleted file mode 100644 index ef776d8a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/magic.h +++ /dev/null @@ -1,64 +0,0 @@ -/***************************************************************************** -* magic.h - Network Random Number Generator header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-04 Guy Lancaster , Global Election Systems Inc. -* Original derived from BSD codes. -*****************************************************************************/ -/* - * magic.h - PPP Magic Number definitions. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * $Id$ - */ - -#ifndef MAGIC_H -#define MAGIC_H - -/***************************************************************************** -************************** PUBLIC FUNCTIONS ********************************** -*****************************************************************************/ - -void magicInit(void); /* Initialize the magic number generator */ -u32_t magic(void); /* Returns the next magic number */ - -#endif /* MAGIC_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/md5.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/md5.c deleted file mode 100644 index e077cdea..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/md5.c +++ /dev/null @@ -1,306 +0,0 @@ -/* - *********************************************************************** - ** md5.c -- the source code for MD5 routines ** - ** RSA Data Security, Inc. MD5 Message-Digest Algorithm ** - ** Created: 2/17/90 RLR ** - ** Revised: 1/91 SRD,AJ,BSK,JT Reference C ver., 7/10 constant corr. ** - *********************************************************************** - */ - -/* - *********************************************************************** - ** Copyright (C) 1990, RSA Data Security, Inc. All rights reserved. ** - ** ** - ** License to copy and use this software is granted provided that ** - ** it is identified as the "RSA Data Security, Inc. MD5 Message- ** - ** Digest Algorithm" in all material mentioning or referencing this ** - ** software or this function. ** - ** ** - ** License is also granted to make and use derivative works ** - ** provided that such works are identified as "derived from the RSA ** - ** Data Security, Inc. MD5 Message-Digest Algorithm" in all ** - ** material mentioning or referencing the derived work. ** - ** ** - ** RSA Data Security, Inc. makes no representations concerning ** - ** either the merchantability of this software or the suitability ** - ** of this software for any particular purpose. It is provided "as ** - ** is" without express or implied warranty of any kind. ** - ** ** - ** These notices must be retained in any copies of any part of this ** - ** documentation and/or software. ** - *********************************************************************** - */ - -#include "ppp.h" -#include "md5.h" -#include "pppdebug.h" - -#if CHAP_SUPPORT > 0 || MD5_SUPPORT > 0 - -/* - *********************************************************************** - ** Message-digest routines: ** - ** To form the message digest for a message M ** - ** (1) Initialize a context buffer mdContext using MD5Init ** - ** (2) Call MD5Update on mdContext and M ** - ** (3) Call MD5Final on mdContext ** - ** The message digest is now in mdContext->digest[0...15] ** - *********************************************************************** - */ - -/* forward declaration */ -static void Transform (u32_t *buf, u32_t *in); - -static unsigned char PADDING[64] = { - 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -/* F, G, H and I are basic MD5 functions */ -#define F(x, y, z) (((x) & (y)) | ((~x) & (z))) -#define G(x, y, z) (((x) & (z)) | ((y) & (~z))) -#define H(x, y, z) ((x) ^ (y) ^ (z)) -#define I(x, y, z) ((y) ^ ((x) | (~z))) - -/* ROTATE_LEFT rotates x left n bits */ -#define ROTATE_LEFT(x, n) (((x) << (n)) | ((x) >> (32-(n)))) - -/* FF, GG, HH, and II transformations for rounds 1, 2, 3, and 4 */ -/* Rotation is separate from addition to prevent recomputation */ -#define FF(a, b, c, d, x, s, ac) \ - {(a) += F ((b), (c), (d)) + (x) + (u32_t)(ac); \ - (a) = ROTATE_LEFT ((a), (s)); \ - (a) += (b); \ - } -#define GG(a, b, c, d, x, s, ac) \ - {(a) += G ((b), (c), (d)) + (x) + (u32_t)(ac); \ - (a) = ROTATE_LEFT ((a), (s)); \ - (a) += (b); \ - } -#define HH(a, b, c, d, x, s, ac) \ - {(a) += H ((b), (c), (d)) + (x) + (u32_t)(ac); \ - (a) = ROTATE_LEFT ((a), (s)); \ - (a) += (b); \ - } -#define II(a, b, c, d, x, s, ac) \ - {(a) += I ((b), (c), (d)) + (x) + (u32_t)(ac); \ - (a) = ROTATE_LEFT ((a), (s)); \ - (a) += (b); \ - } - -#ifdef __STDC__ -#define UL(x) x##UL -#else -#ifdef WIN32 -#define UL(x) x##UL -#else -#define UL(x) x -#endif -#endif - -/* The routine MD5Init initializes the message-digest context - mdContext. All fields are set to zero. - */ -void MD5Init (MD5_CTX *mdContext) -{ - mdContext->i[0] = mdContext->i[1] = (u32_t)0; - - /* Load magic initialization constants. - */ - mdContext->buf[0] = (u32_t)0x67452301UL; - mdContext->buf[1] = (u32_t)0xefcdab89UL; - mdContext->buf[2] = (u32_t)0x98badcfeUL; - mdContext->buf[3] = (u32_t)0x10325476UL; -} - -/* The routine MD5Update updates the message-digest context to - account for the presence of each of the characters inBuf[0..inLen-1] - in the message whose digest is being computed. - */ -void MD5Update(MD5_CTX *mdContext, unsigned char *inBuf, unsigned int inLen) -{ - u32_t in[16]; - int mdi; - unsigned int i, ii; - -#if 0 - ppp_trace(LOG_INFO, "MD5Update: %u:%.*H\n", inLen, MIN(inLen, 20) * 2, inBuf); - ppp_trace(LOG_INFO, "MD5Update: %u:%s\n", inLen, inBuf); -#endif - - /* compute number of bytes mod 64 */ - mdi = (int)((mdContext->i[0] >> 3) & 0x3F); - - /* update number of bits */ - if ((mdContext->i[0] + ((u32_t)inLen << 3)) < mdContext->i[0]) - mdContext->i[1]++; - mdContext->i[0] += ((u32_t)inLen << 3); - mdContext->i[1] += ((u32_t)inLen >> 29); - - while (inLen--) { - /* add new character to buffer, increment mdi */ - mdContext->in[mdi++] = *inBuf++; - - /* transform if necessary */ - if (mdi == 0x40) { - for (i = 0, ii = 0; i < 16; i++, ii += 4) - in[i] = (((u32_t)mdContext->in[ii+3]) << 24) | - (((u32_t)mdContext->in[ii+2]) << 16) | - (((u32_t)mdContext->in[ii+1]) << 8) | - ((u32_t)mdContext->in[ii]); - Transform (mdContext->buf, in); - mdi = 0; - } - } -} - -/* The routine MD5Final terminates the message-digest computation and - ends with the desired message digest in mdContext->digest[0...15]. - */ -void MD5Final (unsigned char hash[], MD5_CTX *mdContext) -{ - u32_t in[16]; - int mdi; - unsigned int i, ii; - unsigned int padLen; - - /* save number of bits */ - in[14] = mdContext->i[0]; - in[15] = mdContext->i[1]; - - /* compute number of bytes mod 64 */ - mdi = (int)((mdContext->i[0] >> 3) & 0x3F); - - /* pad out to 56 mod 64 */ - padLen = (mdi < 56) ? (56 - mdi) : (120 - mdi); - MD5Update (mdContext, PADDING, padLen); - - /* append length in bits and transform */ - for (i = 0, ii = 0; i < 14; i++, ii += 4) - in[i] = (((u32_t)mdContext->in[ii+3]) << 24) | - (((u32_t)mdContext->in[ii+2]) << 16) | - (((u32_t)mdContext->in[ii+1]) << 8) | - ((u32_t)mdContext->in[ii]); - Transform (mdContext->buf, in); - - /* store buffer in digest */ - for (i = 0, ii = 0; i < 4; i++, ii += 4) { - mdContext->digest[ii] = (unsigned char)(mdContext->buf[i] & 0xFF); - mdContext->digest[ii+1] = - (unsigned char)((mdContext->buf[i] >> 8) & 0xFF); - mdContext->digest[ii+2] = - (unsigned char)((mdContext->buf[i] >> 16) & 0xFF); - mdContext->digest[ii+3] = - (unsigned char)((mdContext->buf[i] >> 24) & 0xFF); - } - memcpy(hash, mdContext->digest, 16); -} - -/* Basic MD5 step. Transforms buf based on in. - */ -static void Transform (u32_t *buf, u32_t *in) -{ - u32_t a = buf[0], b = buf[1], c = buf[2], d = buf[3]; - - /* Round 1 */ -#define S11 7 -#define S12 12 -#define S13 17 -#define S14 22 - FF ( a, b, c, d, in[ 0], S11, UL(3614090360)); /* 1 */ - FF ( d, a, b, c, in[ 1], S12, UL(3905402710)); /* 2 */ - FF ( c, d, a, b, in[ 2], S13, UL( 606105819)); /* 3 */ - FF ( b, c, d, a, in[ 3], S14, UL(3250441966)); /* 4 */ - FF ( a, b, c, d, in[ 4], S11, UL(4118548399)); /* 5 */ - FF ( d, a, b, c, in[ 5], S12, UL(1200080426)); /* 6 */ - FF ( c, d, a, b, in[ 6], S13, UL(2821735955)); /* 7 */ - FF ( b, c, d, a, in[ 7], S14, UL(4249261313)); /* 8 */ - FF ( a, b, c, d, in[ 8], S11, UL(1770035416)); /* 9 */ - FF ( d, a, b, c, in[ 9], S12, UL(2336552879)); /* 10 */ - FF ( c, d, a, b, in[10], S13, UL(4294925233)); /* 11 */ - FF ( b, c, d, a, in[11], S14, UL(2304563134)); /* 12 */ - FF ( a, b, c, d, in[12], S11, UL(1804603682)); /* 13 */ - FF ( d, a, b, c, in[13], S12, UL(4254626195)); /* 14 */ - FF ( c, d, a, b, in[14], S13, UL(2792965006)); /* 15 */ - FF ( b, c, d, a, in[15], S14, UL(1236535329)); /* 16 */ - - /* Round 2 */ -#define S21 5 -#define S22 9 -#define S23 14 -#define S24 20 - GG ( a, b, c, d, in[ 1], S21, UL(4129170786)); /* 17 */ - GG ( d, a, b, c, in[ 6], S22, UL(3225465664)); /* 18 */ - GG ( c, d, a, b, in[11], S23, UL( 643717713)); /* 19 */ - GG ( b, c, d, a, in[ 0], S24, UL(3921069994)); /* 20 */ - GG ( a, b, c, d, in[ 5], S21, UL(3593408605)); /* 21 */ - GG ( d, a, b, c, in[10], S22, UL( 38016083)); /* 22 */ - GG ( c, d, a, b, in[15], S23, UL(3634488961)); /* 23 */ - GG ( b, c, d, a, in[ 4], S24, UL(3889429448)); /* 24 */ - GG ( a, b, c, d, in[ 9], S21, UL( 568446438)); /* 25 */ - GG ( d, a, b, c, in[14], S22, UL(3275163606)); /* 26 */ - GG ( c, d, a, b, in[ 3], S23, UL(4107603335)); /* 27 */ - GG ( b, c, d, a, in[ 8], S24, UL(1163531501)); /* 28 */ - GG ( a, b, c, d, in[13], S21, UL(2850285829)); /* 29 */ - GG ( d, a, b, c, in[ 2], S22, UL(4243563512)); /* 30 */ - GG ( c, d, a, b, in[ 7], S23, UL(1735328473)); /* 31 */ - GG ( b, c, d, a, in[12], S24, UL(2368359562)); /* 32 */ - - /* Round 3 */ -#define S31 4 -#define S32 11 -#define S33 16 -#define S34 23 - HH ( a, b, c, d, in[ 5], S31, UL(4294588738)); /* 33 */ - HH ( d, a, b, c, in[ 8], S32, UL(2272392833)); /* 34 */ - HH ( c, d, a, b, in[11], S33, UL(1839030562)); /* 35 */ - HH ( b, c, d, a, in[14], S34, UL(4259657740)); /* 36 */ - HH ( a, b, c, d, in[ 1], S31, UL(2763975236)); /* 37 */ - HH ( d, a, b, c, in[ 4], S32, UL(1272893353)); /* 38 */ - HH ( c, d, a, b, in[ 7], S33, UL(4139469664)); /* 39 */ - HH ( b, c, d, a, in[10], S34, UL(3200236656)); /* 40 */ - HH ( a, b, c, d, in[13], S31, UL( 681279174)); /* 41 */ - HH ( d, a, b, c, in[ 0], S32, UL(3936430074)); /* 42 */ - HH ( c, d, a, b, in[ 3], S33, UL(3572445317)); /* 43 */ - HH ( b, c, d, a, in[ 6], S34, UL( 76029189)); /* 44 */ - HH ( a, b, c, d, in[ 9], S31, UL(3654602809)); /* 45 */ - HH ( d, a, b, c, in[12], S32, UL(3873151461)); /* 46 */ - HH ( c, d, a, b, in[15], S33, UL( 530742520)); /* 47 */ - HH ( b, c, d, a, in[ 2], S34, UL(3299628645)); /* 48 */ - - /* Round 4 */ -#define S41 6 -#define S42 10 -#define S43 15 -#define S44 21 - II ( a, b, c, d, in[ 0], S41, UL(4096336452)); /* 49 */ - II ( d, a, b, c, in[ 7], S42, UL(1126891415)); /* 50 */ - II ( c, d, a, b, in[14], S43, UL(2878612391)); /* 51 */ - II ( b, c, d, a, in[ 5], S44, UL(4237533241)); /* 52 */ - II ( a, b, c, d, in[12], S41, UL(1700485571)); /* 53 */ - II ( d, a, b, c, in[ 3], S42, UL(2399980690)); /* 54 */ - II ( c, d, a, b, in[10], S43, UL(4293915773)); /* 55 */ - II ( b, c, d, a, in[ 1], S44, UL(2240044497)); /* 56 */ - II ( a, b, c, d, in[ 8], S41, UL(1873313359)); /* 57 */ - II ( d, a, b, c, in[15], S42, UL(4264355552)); /* 58 */ - II ( c, d, a, b, in[ 6], S43, UL(2734768916)); /* 59 */ - II ( b, c, d, a, in[13], S44, UL(1309151649)); /* 60 */ - II ( a, b, c, d, in[ 4], S41, UL(4149444226)); /* 61 */ - II ( d, a, b, c, in[11], S42, UL(3174756917)); /* 62 */ - II ( c, d, a, b, in[ 2], S43, UL( 718787259)); /* 63 */ - II ( b, c, d, a, in[ 9], S44, UL(3951481745)); /* 64 */ - - buf[0] += a; - buf[1] += b; - buf[2] += c; - buf[3] += d; -} - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/md5.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/md5.h deleted file mode 100644 index 0e81cdc3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/md5.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - *********************************************************************** - ** md5.h -- header file for implementation of MD5 ** - ** RSA Data Security, Inc. MD5 Message-Digest Algorithm ** - ** Created: 2/17/90 RLR ** - ** Revised: 12/27/90 SRD,AJ,BSK,JT Reference C version ** - ** Revised (for MD5): RLR 4/27/91 ** - ** -- G modified to have y&~z instead of y&z ** - ** -- FF, GG, HH modified to add in last register done ** - ** -- Access pattern: round 2 works mod 5, round 3 works mod 3 ** - ** -- distinct additive constant for each step ** - ** -- round 4 added, working mod 7 ** - *********************************************************************** - */ - -/* - *********************************************************************** - ** Copyright (C) 1990, RSA Data Security, Inc. All rights reserved. ** - ** ** - ** License to copy and use this software is granted provided that ** - ** it is identified as the "RSA Data Security, Inc. MD5 Message- ** - ** Digest Algorithm" in all material mentioning or referencing this ** - ** software or this function. ** - ** ** - ** License is also granted to make and use derivative works ** - ** provided that such works are identified as "derived from the RSA ** - ** Data Security, Inc. MD5 Message-Digest Algorithm" in all ** - ** material mentioning or referencing the derived work. ** - ** ** - ** RSA Data Security, Inc. makes no representations concerning ** - ** either the merchantability of this software or the suitability ** - ** of this software for any particular purpose. It is provided "as ** - ** is" without express or implied warranty of any kind. ** - ** ** - ** These notices must be retained in any copies of any part of this ** - ** documentation and/or software. ** - *********************************************************************** - */ - -#ifndef MD5_H -#define MD5_H - -/* Data structure for MD5 (Message-Digest) computation */ -typedef struct { - u32_t i[2]; /* number of _bits_ handled mod 2^64 */ - u32_t buf[4]; /* scratch buffer */ - unsigned char in[64]; /* input buffer */ - unsigned char digest[16]; /* actual digest after MD5Final call */ -} MD5_CTX; - -void MD5Init (MD5_CTX *mdContext); -void MD5Update (MD5_CTX *mdContext, unsigned char *inBuf, unsigned int inLen); -void MD5Final (unsigned char hash[], MD5_CTX *mdContext); - -#endif /* MD5_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/pap.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/pap.c deleted file mode 100644 index 23e438ff..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/pap.c +++ /dev/null @@ -1,608 +0,0 @@ -/***************************************************************************** -* pap.c - Network Password Authentication Protocol program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-12 Guy Lancaster , Global Election Systems Inc. -* Original. -*****************************************************************************/ -/* - * upap.c - User/Password Authentication Protocol. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include "ppp.h" -#include "auth.h" -#include "pap.h" -#include "pppdebug.h" - - -#if PAP_SUPPORT > 0 - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -/* - * Protocol entry points. - */ -static void upap_init (int); -static void upap_lowerup (int); -static void upap_lowerdown (int); -static void upap_input (int, u_char *, int); -static void upap_protrej (int); - -static void upap_timeout (void *); -static void upap_reqtimeout (void *); -static void upap_rauthreq (upap_state *, u_char *, int, int); -static void upap_rauthack (upap_state *, u_char *, int, int); -static void upap_rauthnak (upap_state *, u_char *, int, int); -static void upap_sauthreq (upap_state *); -static void upap_sresp (upap_state *, u_char, u_char, char *, int); - - - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ -struct protent pap_protent = { - PPP_PAP, - upap_init, - upap_input, - upap_protrej, - upap_lowerup, - upap_lowerdown, - NULL, - NULL, -#if 0 - upap_printpkt, - NULL, -#endif - 1, - "PAP", -#if 0 - NULL, - NULL, - NULL -#endif -}; - -upap_state upap[NUM_PPP]; /* UPAP state; one for each unit */ - - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * Set the default login name and password for the pap sessions - */ -void upap_setloginpasswd(int unit, const char *luser, const char *lpassword) -{ - upap_state *u = &upap[unit]; - - /* Save the username and password we're given */ - u->us_user = luser; - u->us_userlen = strlen(luser); - u->us_passwd = lpassword; - u->us_passwdlen = strlen(lpassword); -} - - -/* - * upap_authwithpeer - Authenticate us with our peer (start client). - * - * Set new state and send authenticate's. - */ -void upap_authwithpeer(int unit, char *user, char *password) -{ - upap_state *u = &upap[unit]; - - UPAPDEBUG((LOG_INFO, "upap_authwithpeer: %d user=%s password=%s s=%d\n", - unit, user, password, u->us_clientstate)); - - upap_setloginpasswd(unit, user, password); - - u->us_transmits = 0; - - /* Lower layer up yet? */ - if (u->us_clientstate == UPAPCS_INITIAL || - u->us_clientstate == UPAPCS_PENDING) { - u->us_clientstate = UPAPCS_PENDING; - return; - } - - upap_sauthreq(u); /* Start protocol */ -} - - -/* - * upap_authpeer - Authenticate our peer (start server). - * - * Set new state. - */ -void upap_authpeer(int unit) -{ - upap_state *u = &upap[unit]; - - /* Lower layer up yet? */ - if (u->us_serverstate == UPAPSS_INITIAL || - u->us_serverstate == UPAPSS_PENDING) { - u->us_serverstate = UPAPSS_PENDING; - return; - } - - u->us_serverstate = UPAPSS_LISTEN; - if (u->us_reqtimeout > 0) - TIMEOUT(upap_reqtimeout, u, u->us_reqtimeout); -} - - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ -/* - * upap_init - Initialize a UPAP unit. - */ -static void upap_init(int unit) -{ - upap_state *u = &upap[unit]; - - UPAPDEBUG((LOG_INFO, "upap_init: %d\n", unit)); - u->us_unit = unit; - u->us_user = NULL; - u->us_userlen = 0; - u->us_passwd = NULL; - u->us_passwdlen = 0; - u->us_clientstate = UPAPCS_INITIAL; - u->us_serverstate = UPAPSS_INITIAL; - u->us_id = 0; - u->us_timeouttime = UPAP_DEFTIMEOUT; - u->us_maxtransmits = 10; - u->us_reqtimeout = UPAP_DEFREQTIME; -} - -/* - * upap_timeout - Retransmission timer for sending auth-reqs expired. - */ -static void upap_timeout(void *arg) -{ - upap_state *u = (upap_state *) arg; - - UPAPDEBUG((LOG_INFO, "upap_timeout: %d timeout %d expired s=%d\n", - u->us_unit, u->us_timeouttime, u->us_clientstate)); - - if (u->us_clientstate != UPAPCS_AUTHREQ) - return; - - if (u->us_transmits >= u->us_maxtransmits) { - /* give up in disgust */ - UPAPDEBUG((LOG_ERR, "No response to PAP authenticate-requests\n")); - u->us_clientstate = UPAPCS_BADAUTH; - auth_withpeer_fail(u->us_unit, PPP_PAP); - return; - } - - upap_sauthreq(u); /* Send Authenticate-Request */ -} - - -/* - * upap_reqtimeout - Give up waiting for the peer to send an auth-req. - */ -static void upap_reqtimeout(void *arg) -{ - upap_state *u = (upap_state *) arg; - - if (u->us_serverstate != UPAPSS_LISTEN) - return; /* huh?? */ - - auth_peer_fail(u->us_unit, PPP_PAP); - u->us_serverstate = UPAPSS_BADAUTH; -} - - -/* - * upap_lowerup - The lower layer is up. - * - * Start authenticating if pending. - */ -static void upap_lowerup(int unit) -{ - upap_state *u = &upap[unit]; - - UPAPDEBUG((LOG_INFO, "upap_lowerup: %d s=%d\n", unit, u->us_clientstate)); - - if (u->us_clientstate == UPAPCS_INITIAL) - u->us_clientstate = UPAPCS_CLOSED; - else if (u->us_clientstate == UPAPCS_PENDING) { - upap_sauthreq(u); /* send an auth-request */ - } - - if (u->us_serverstate == UPAPSS_INITIAL) - u->us_serverstate = UPAPSS_CLOSED; - else if (u->us_serverstate == UPAPSS_PENDING) { - u->us_serverstate = UPAPSS_LISTEN; - if (u->us_reqtimeout > 0) - TIMEOUT(upap_reqtimeout, u, u->us_reqtimeout); - } -} - - -/* - * upap_lowerdown - The lower layer is down. - * - * Cancel all timeouts. - */ -static void upap_lowerdown(int unit) -{ - upap_state *u = &upap[unit]; - - UPAPDEBUG((LOG_INFO, "upap_lowerdown: %d s=%d\n", unit, u->us_clientstate)); - - if (u->us_clientstate == UPAPCS_AUTHREQ) /* Timeout pending? */ - UNTIMEOUT(upap_timeout, u); /* Cancel timeout */ - if (u->us_serverstate == UPAPSS_LISTEN && u->us_reqtimeout > 0) - UNTIMEOUT(upap_reqtimeout, u); - - u->us_clientstate = UPAPCS_INITIAL; - u->us_serverstate = UPAPSS_INITIAL; -} - - -/* - * upap_protrej - Peer doesn't speak this protocol. - * - * This shouldn't happen. In any case, pretend lower layer went down. - */ -static void upap_protrej(int unit) -{ - upap_state *u = &upap[unit]; - - if (u->us_clientstate == UPAPCS_AUTHREQ) { - UPAPDEBUG((LOG_ERR, "PAP authentication failed due to protocol-reject\n")); - auth_withpeer_fail(unit, PPP_PAP); - } - if (u->us_serverstate == UPAPSS_LISTEN) { - UPAPDEBUG((LOG_ERR, "PAP authentication of peer failed (protocol-reject)\n")); - auth_peer_fail(unit, PPP_PAP); - } - upap_lowerdown(unit); -} - - -/* - * upap_input - Input UPAP packet. - */ -static void upap_input(int unit, u_char *inpacket, int l) -{ - upap_state *u = &upap[unit]; - u_char *inp; - u_char code, id; - int len; - - /* - * Parse header (code, id and length). - * If packet too short, drop it. - */ - inp = inpacket; - if (l < UPAP_HEADERLEN) { - UPAPDEBUG((LOG_INFO, "pap_input: rcvd short header.\n")); - return; - } - GETCHAR(code, inp); - GETCHAR(id, inp); - GETSHORT(len, inp); - if (len < UPAP_HEADERLEN) { - UPAPDEBUG((LOG_INFO, "pap_input: rcvd illegal length.\n")); - return; - } - if (len > l) { - UPAPDEBUG((LOG_INFO, "pap_input: rcvd short packet.\n")); - return; - } - len -= UPAP_HEADERLEN; - - /* - * Action depends on code. - */ - switch (code) { - case UPAP_AUTHREQ: - upap_rauthreq(u, inp, id, len); - break; - - case UPAP_AUTHACK: - upap_rauthack(u, inp, id, len); - break; - - case UPAP_AUTHNAK: - upap_rauthnak(u, inp, id, len); - break; - - default: /* XXX Need code reject */ - break; - } -} - - -/* - * upap_rauth - Receive Authenticate. - */ -static void upap_rauthreq( - upap_state *u, - u_char *inp, - int id, - int len -) -{ - u_char ruserlen, rpasswdlen; - char *ruser, *rpasswd; - int retcode; - char *msg; - int msglen; - - UPAPDEBUG((LOG_INFO, "pap_rauth: Rcvd id %d.\n", id)); - - if (u->us_serverstate < UPAPSS_LISTEN) - return; - - /* - * If we receive a duplicate authenticate-request, we are - * supposed to return the same status as for the first request. - */ - if (u->us_serverstate == UPAPSS_OPEN) { - upap_sresp(u, UPAP_AUTHACK, id, "", 0); /* return auth-ack */ - return; - } - if (u->us_serverstate == UPAPSS_BADAUTH) { - upap_sresp(u, UPAP_AUTHNAK, id, "", 0); /* return auth-nak */ - return; - } - - /* - * Parse user/passwd. - */ - if (len < sizeof (u_char)) { - UPAPDEBUG((LOG_INFO, "pap_rauth: rcvd short packet.\n")); - return; - } - GETCHAR(ruserlen, inp); - len -= sizeof (u_char) + ruserlen + sizeof (u_char); - if (len < 0) { - UPAPDEBUG((LOG_INFO, "pap_rauth: rcvd short packet.\n")); - return; - } - ruser = (char *) inp; - INCPTR(ruserlen, inp); - GETCHAR(rpasswdlen, inp); - if (len < rpasswdlen) { - UPAPDEBUG((LOG_INFO, "pap_rauth: rcvd short packet.\n")); - return; - } - rpasswd = (char *) inp; - - /* - * Check the username and password given. - */ - retcode = check_passwd(u->us_unit, ruser, ruserlen, rpasswd, - rpasswdlen, &msg, &msglen); - BZERO(rpasswd, rpasswdlen); - - upap_sresp(u, retcode, id, msg, msglen); - - if (retcode == UPAP_AUTHACK) { - u->us_serverstate = UPAPSS_OPEN; - auth_peer_success(u->us_unit, PPP_PAP, ruser, ruserlen); - } else { - u->us_serverstate = UPAPSS_BADAUTH; - auth_peer_fail(u->us_unit, PPP_PAP); - } - - if (u->us_reqtimeout > 0) - UNTIMEOUT(upap_reqtimeout, u); -} - - -/* - * upap_rauthack - Receive Authenticate-Ack. - */ -static void upap_rauthack( - upap_state *u, - u_char *inp, - int id, - int len -) -{ - u_char msglen; - char *msg; - - UPAPDEBUG((LOG_INFO, "pap_rauthack: Rcvd id %d s=%d\n", id, u->us_clientstate)); - - if (u->us_clientstate != UPAPCS_AUTHREQ) /* XXX */ - return; - - /* - * Parse message. - */ - if (len < sizeof (u_char)) { - UPAPDEBUG((LOG_INFO, "pap_rauthack: rcvd short packet.\n")); - return; - } - GETCHAR(msglen, inp); - len -= sizeof (u_char); - if (len < msglen) { - UPAPDEBUG((LOG_INFO, "pap_rauthack: rcvd short packet.\n")); - return; - } - msg = (char *) inp; - PRINTMSG(msg, msglen); - - u->us_clientstate = UPAPCS_OPEN; - - auth_withpeer_success(u->us_unit, PPP_PAP); -} - - -/* - * upap_rauthnak - Receive Authenticate-Nakk. - */ -static void upap_rauthnak( - upap_state *u, - u_char *inp, - int id, - int len -) -{ - u_char msglen; - char *msg; - - UPAPDEBUG((LOG_INFO, "pap_rauthnak: Rcvd id %d s=%d\n", id, u->us_clientstate)); - - if (u->us_clientstate != UPAPCS_AUTHREQ) /* XXX */ - return; - - /* - * Parse message. - */ - if (len < sizeof (u_char)) { - UPAPDEBUG((LOG_INFO, "pap_rauthnak: rcvd short packet.\n")); - return; - } - GETCHAR(msglen, inp); - len -= sizeof (u_char); - if (len < msglen) { - UPAPDEBUG((LOG_INFO, "pap_rauthnak: rcvd short packet.\n")); - return; - } - msg = (char *) inp; - PRINTMSG(msg, msglen); - - u->us_clientstate = UPAPCS_BADAUTH; - - UPAPDEBUG((LOG_ERR, "PAP authentication failed\n")); - auth_withpeer_fail(u->us_unit, PPP_PAP); -} - - -/* - * upap_sauthreq - Send an Authenticate-Request. - */ -static void upap_sauthreq(upap_state *u) -{ - u_char *outp; - int outlen; - - outlen = UPAP_HEADERLEN + 2 * sizeof (u_char) - + u->us_userlen + u->us_passwdlen; - outp = outpacket_buf[u->us_unit]; - - MAKEHEADER(outp, PPP_PAP); - - PUTCHAR(UPAP_AUTHREQ, outp); - PUTCHAR(++u->us_id, outp); - PUTSHORT(outlen, outp); - PUTCHAR(u->us_userlen, outp); - BCOPY(u->us_user, outp, u->us_userlen); - INCPTR(u->us_userlen, outp); - PUTCHAR(u->us_passwdlen, outp); - BCOPY(u->us_passwd, outp, u->us_passwdlen); - - pppWrite(u->us_unit, outpacket_buf[u->us_unit], outlen + PPP_HDRLEN); - - UPAPDEBUG((LOG_INFO, "pap_sauth: Sent id %d\n", u->us_id)); - - TIMEOUT(upap_timeout, u, u->us_timeouttime); - ++u->us_transmits; - u->us_clientstate = UPAPCS_AUTHREQ; -} - - -/* - * upap_sresp - Send a response (ack or nak). - */ -static void upap_sresp( - upap_state *u, - u_char code, - u_char id, - char *msg, - int msglen -) -{ - u_char *outp; - int outlen; - - outlen = UPAP_HEADERLEN + sizeof (u_char) + msglen; - outp = outpacket_buf[u->us_unit]; - MAKEHEADER(outp, PPP_PAP); - - PUTCHAR(code, outp); - PUTCHAR(id, outp); - PUTSHORT(outlen, outp); - PUTCHAR(msglen, outp); - BCOPY(msg, outp, msglen); - pppWrite(u->us_unit, outpacket_buf[u->us_unit], outlen + PPP_HDRLEN); - - UPAPDEBUG((LOG_INFO, "pap_sresp: Sent code %d, id %d s=%d\n", - code, id, u->us_clientstate)); -} - -#if 0 -/* - * upap_printpkt - print the contents of a PAP packet. - */ -static int upap_printpkt( - u_char *p, - int plen, - void (*printer) (void *, char *, ...), - void *arg -) -{ - (void)p; - (void)plen; - (void)printer; - (void)arg; - return 0; -} -#endif - -#endif /* PAP_SUPPORT */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/pap.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/pap.h deleted file mode 100644 index 215c8a4f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/pap.h +++ /dev/null @@ -1,129 +0,0 @@ -/***************************************************************************** -* pap.h - PPP Password Authentication Protocol header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-04 Guy Lancaster , Global Election Systems Inc. -* Original derived from BSD codes. -*****************************************************************************/ -/* - * upap.h - User/Password Authentication Protocol definitions. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - - -#ifndef PAP_H -#define PAP_H - -/************************* -*** PUBLIC DEFINITIONS *** -*************************/ -/* - * Packet header = Code, id, length. - */ -#define UPAP_HEADERLEN (sizeof (u_char) + sizeof (u_char) + sizeof (u_short)) - - -/* - * UPAP codes. - */ -#define UPAP_AUTHREQ 1 /* Authenticate-Request */ -#define UPAP_AUTHACK 2 /* Authenticate-Ack */ -#define UPAP_AUTHNAK 3 /* Authenticate-Nak */ - -/* - * Client states. - */ -#define UPAPCS_INITIAL 0 /* Connection down */ -#define UPAPCS_CLOSED 1 /* Connection up, haven't requested auth */ -#define UPAPCS_PENDING 2 /* Connection down, have requested auth */ -#define UPAPCS_AUTHREQ 3 /* We've sent an Authenticate-Request */ -#define UPAPCS_OPEN 4 /* We've received an Ack */ -#define UPAPCS_BADAUTH 5 /* We've received a Nak */ - -/* - * Server states. - */ -#define UPAPSS_INITIAL 0 /* Connection down */ -#define UPAPSS_CLOSED 1 /* Connection up, haven't requested auth */ -#define UPAPSS_PENDING 2 /* Connection down, have requested auth */ -#define UPAPSS_LISTEN 3 /* Listening for an Authenticate */ -#define UPAPSS_OPEN 4 /* We've sent an Ack */ -#define UPAPSS_BADAUTH 5 /* We've sent a Nak */ - - -/************************ -*** PUBLIC DATA TYPES *** -************************/ - -/* - * Each interface is described by upap structure. - */ -typedef struct upap_state { - int us_unit; /* Interface unit number */ - const char *us_user; /* User */ - int us_userlen; /* User length */ - const char *us_passwd; /* Password */ - int us_passwdlen; /* Password length */ - int us_clientstate; /* Client state */ - int us_serverstate; /* Server state */ - u_char us_id; /* Current id */ - int us_timeouttime; /* Timeout (seconds) for auth-req retrans. */ - int us_transmits; /* Number of auth-reqs sent */ - int us_maxtransmits; /* Maximum number of auth-reqs to send */ - int us_reqtimeout; /* Time to wait for auth-req from peer */ -} upap_state; - - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ - -extern upap_state upap[]; - -void upap_setloginpasswd(int unit, const char *luser, const char *lpassword); -void upap_authwithpeer (int, char *, char *); -void upap_authpeer (int); - -extern struct protent pap_protent; - -#endif /* PAP_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/ppp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/ppp.c deleted file mode 100644 index df402189..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/ppp.c +++ /dev/null @@ -1,1623 +0,0 @@ -/***************************************************************************** -* ppp.c - Network Point to Point Protocol program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-11-05 Guy Lancaster , Global Election Systems Inc. -* Original. -*****************************************************************************/ - -/* - * ppp_defs.h - PPP definitions. - * - * if_pppvar.h - private structures and declarations for PPP. - * - * Copyright (c) 1994 The Australian National University. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation is hereby granted, provided that the above copyright - * notice appears in all copies. This software is provided without any - * warranty, express or implied. The Australian National University - * makes no representations about the suitability of this software for - * any purpose. - * - * IN NO EVENT SHALL THE AUSTRALIAN NATIONAL UNIVERSITY BE LIABLE TO ANY - * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES - * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF - * THE AUSTRALIAN NATIONAL UNIVERSITY HAVE BEEN ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * THE AUSTRALIAN NATIONAL UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE AUSTRALIAN NATIONAL UNIVERSITY HAS NO - * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, - * OR MODIFICATIONS. - */ - -/* - * if_ppp.h - Point-to-Point Protocol definitions. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "randm.h" -#include "fsm.h" -#if PAP_SUPPORT > 0 -#include "pap.h" -#endif -#if CHAP_SUPPORT > 0 -#include "chap.h" -#endif -#include "ipcp.h" -#include "lcp.h" -#include "magic.h" -#include "auth.h" -#if VJ_SUPPORT > 0 -#include "vj.h" -#endif - -#include "pppdebug.h" - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ - -/* - * The basic PPP frame. - */ -#define PPP_ADDRESS(p) (((u_char *)(p))[0]) -#define PPP_CONTROL(p) (((u_char *)(p))[1]) -#define PPP_PROTOCOL(p) ((((u_char *)(p))[2] << 8) + ((u_char *)(p))[3]) - -/* PPP packet parser states. Current state indicates operation yet to be - * completed. */ -typedef enum { - PDIDLE = 0, /* Idle state - waiting. */ - PDSTART, /* Process start flag. */ - PDADDRESS, /* Process address field. */ - PDCONTROL, /* Process control field. */ - PDPROTOCOL1, /* Process protocol field 1. */ - PDPROTOCOL2, /* Process protocol field 2. */ - PDDATA /* Process data byte. */ -} PPPDevStates; - -#define ESCAPE_P(accm, c) ((accm)[(c) >> 3] & pppACCMMask[c & 0x07]) - -/************************/ -/*** LOCAL DATA TYPES ***/ -/************************/ -/* - * PPP interface control block. - */ -typedef struct PPPControl_s { - char openFlag; /* True when in use. */ - char oldFrame; /* Old framing character for fd. */ - sio_fd_t fd; /* File device ID of port. */ - int kill_link; /* Shut the link down. */ - int sig_hup; /* Carrier lost. */ - int if_up; /* True when the interface is up. */ - int errCode; /* Code indicating why interface is down. */ - struct pbuf *inHead, *inTail; /* The input packet. */ - PPPDevStates inState; /* The input process state. */ - char inEscaped; /* Escape next character. */ - u16_t inProtocol; /* The input protocol code. */ - u16_t inFCS; /* Input Frame Check Sequence value. */ - int mtu; /* Peer's mru */ - int pcomp; /* Does peer accept protocol compression? */ - int accomp; /* Does peer accept addr/ctl compression? */ - u_long lastXMit; /* Time of last transmission. */ - ext_accm inACCM; /* Async-Ctl-Char-Map for input. */ - ext_accm outACCM; /* Async-Ctl-Char-Map for output. */ -#if VJ_SUPPORT > 0 - int vjEnabled; /* Flag indicating VJ compression enabled. */ - struct vjcompress vjComp; /* Van Jabobsen compression header. */ -#endif - - struct netif netif; - - struct ppp_addrs addrs; - - void (*linkStatusCB)(void *ctx, int errCode, void *arg); - void *linkStatusCtx; - -} PPPControl; - - -/* - * Ioctl definitions. - */ - -struct npioctl { - int protocol; /* PPP procotol, e.g. PPP_IP */ - enum NPmode mode; -}; - - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -static void pppMain(void *pd); -static void pppDrop(PPPControl *pc); -static void pppInProc(int pd, u_char *s, int l); - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ -u_long subnetMask; - -static PPPControl pppControl[NUM_PPP]; /* The PPP interface control blocks. */ - -/* - * PPP Data Link Layer "protocol" table. - * One entry per supported protocol. - * The last entry must be NULL. - */ -struct protent *ppp_protocols[] = { - &lcp_protent, -#if PAP_SUPPORT > 0 - &pap_protent, -#endif -#if CHAP_SUPPORT > 0 - &chap_protent, -#endif -#if CBCP_SUPPORT > 0 - &cbcp_protent, -#endif - &ipcp_protent, -#if CCP_SUPPORT > 0 - &ccp_protent, -#endif - NULL -}; - - -/* - * Buffers for outgoing packets. This must be accessed only from the appropriate - * PPP task so that it doesn't need to be protected to avoid collisions. - */ -u_char outpacket_buf[NUM_PPP][PPP_MRU+PPP_HDRLEN]; - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ - -/* - * FCS lookup table as calculated by genfcstab. - */ -static const u_short fcstab[256] = { - 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, - 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, - 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, - 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, - 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, - 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, - 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, - 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, - 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, - 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, - 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, - 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, - 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, - 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1, - 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, - 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70, - 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, - 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff, - 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, - 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, - 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, - 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, - 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, - 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, - 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, - 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, - 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, - 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a, - 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, - 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9, - 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, - 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78 -}; - -/* PPP's Asynchronous-Control-Character-Map. The mask array is used - * to select the specific bit for a character. */ -static u_char pppACCMMask[] = { - 0x01, - 0x02, - 0x04, - 0x08, - 0x10, - 0x20, - 0x40, - 0x80 -}; - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* Initialize the PPP subsystem. */ - -struct ppp_settings ppp_settings; - -void pppInit(void) -{ - struct protent *protp; - int i, j; - - memset(&ppp_settings, 0, sizeof(ppp_settings)); - ppp_settings.usepeerdns = 1; - pppSetAuth(PPPAUTHTYPE_NONE, NULL, NULL); - - magicInit(); - - for (i = 0; i < NUM_PPP; i++) { - pppControl[i].openFlag = 0; - - subnetMask = htonl(0xffffff00); - - /* - * Initialize to the standard option set. - */ - for (j = 0; (protp = ppp_protocols[j]) != NULL; ++j) - (*protp->init)(i); - } - -#if LINK_STATS - /* Clear the statistics. */ - memset(&lwip_stats.link, 0, sizeof(lwip_stats.link)); -#endif -} - -void pppSetAuth(enum pppAuthType authType, const char *user, const char *passwd) -{ - switch(authType) { - case PPPAUTHTYPE_NONE: - default: -#ifdef LWIP_PPP_STRICT_PAP_REJECT - ppp_settings.refuse_pap = 1; -#else - /* some providers request pap and accept an empty login/pw */ - ppp_settings.refuse_pap = 0; -#endif - ppp_settings.refuse_chap = 1; - break; - case PPPAUTHTYPE_ANY: -/* Warning: Using PPPAUTHTYPE_ANY might have security consequences. - * RFC 1994 says: - * - * In practice, within or associated with each PPP server, there is a - * database which associates "user" names with authentication - * information ("secrets"). It is not anticipated that a particular - * named user would be authenticated by multiple methods. This would - * make the user vulnerable to attacks which negotiate the least secure - * method from among a set (such as PAP rather than CHAP). If the same - * secret was used, PAP would reveal the secret to be used later with - * CHAP. - * - * Instead, for each user name there should be an indication of exactly - * one method used to authenticate that user name. If a user needs to - * make use of different authentication methods under different - * circumstances, then distinct user names SHOULD be employed, each of - * which identifies exactly one authentication method. - * - */ - ppp_settings.refuse_pap = 0; - ppp_settings.refuse_chap = 0; - break; - case PPPAUTHTYPE_PAP: - ppp_settings.refuse_pap = 0; - ppp_settings.refuse_chap = 1; - break; - case PPPAUTHTYPE_CHAP: - ppp_settings.refuse_pap = 1; - ppp_settings.refuse_chap = 0; - break; - } - - if(user) { - strncpy(ppp_settings.user, user, sizeof(ppp_settings.user)-1); - ppp_settings.user[sizeof(ppp_settings.user)-1] = '\0'; - } else - ppp_settings.user[0] = '\0'; - - if(passwd) { - strncpy(ppp_settings.passwd, passwd, sizeof(ppp_settings.passwd)-1); - ppp_settings.passwd[sizeof(ppp_settings.passwd)-1] = '\0'; - } else - ppp_settings.passwd[0] = '\0'; -} - -/* Open a new PPP connection using the given I/O device. - * This initializes the PPP control block but does not - * attempt to negotiate the LCP session. If this port - * connects to a modem, the modem connection must be - * established before calling this. - * Return a new PPP connection descriptor on success or - * an error code (negative) on failure. */ -int pppOpen(sio_fd_t fd, void (*linkStatusCB)(void *ctx, int errCode, void *arg), void *linkStatusCtx) -{ - PPPControl *pc; - int pd; - - /* Find a free PPP session descriptor. Critical region? */ - for (pd = 0; pd < NUM_PPP && pppControl[pd].openFlag != 0; pd++); - if (pd >= NUM_PPP) - pd = PPPERR_OPEN; - else - pppControl[pd].openFlag = !0; - - /* Launch a deamon thread. */ - if (pd >= 0) { - - pppControl[pd].openFlag = 1; - - lcp_init(pd); - pc = &pppControl[pd]; - pc->fd = fd; - pc->kill_link = 0; - pc->sig_hup = 0; - pc->if_up = 0; - pc->errCode = 0; - pc->inState = PDIDLE; - pc->inHead = NULL; - pc->inTail = NULL; - pc->inEscaped = 0; - pc->lastXMit = 0; - -#if VJ_SUPPORT > 0 - pc->vjEnabled = 0; - vj_compress_init(&pc->vjComp); -#endif - - /* - * Default the in and out accm so that escape and flag characters - * are always escaped. - */ - memset(pc->inACCM, 0, sizeof(ext_accm)); - pc->inACCM[15] = 0x60; - memset(pc->outACCM, 0, sizeof(ext_accm)); - pc->outACCM[15] = 0x60; - - pc->linkStatusCB = linkStatusCB; - pc->linkStatusCtx = linkStatusCtx; - - sys_thread_new(pppMain, (void*)pd, PPP_THREAD_PRIO); - if(!linkStatusCB) { - while(pd >= 0 && !pc->if_up) { - sys_msleep(500); - if (lcp_phase[pd] == PHASE_DEAD) { - pppClose(pd); - if (pc->errCode) - pd = pc->errCode; - else - pd = PPPERR_CONNECT; - } - } - } - } - return pd; -} - -/* Close a PPP connection and release the descriptor. - * Any outstanding packets in the queues are dropped. - * Return 0 on success, an error code on failure. */ -int pppClose(int pd) -{ - PPPControl *pc = &pppControl[pd]; - int st = 0; - - /* Disconnect */ - pc->kill_link = !0; - pppMainWakeup(pd); - - if(!pc->linkStatusCB) { - while(st >= 0 && lcp_phase[pd] != PHASE_DEAD) { - sys_msleep(500); - break; - } - } - return st; -} - -/* This function is called when carrier is lost on the PPP channel. */ -void pppSigHUP(int pd) -{ - PPPControl *pc = &pppControl[pd]; - - pc->sig_hup = 1; - pppMainWakeup(pd); -} - -static void nPut(PPPControl *pc, struct pbuf *nb) -{ - struct pbuf *b; - int c; - - for(b = nb; b != NULL; b = b->next) { - if((c = sio_write(pc->fd, b->payload, b->len)) != b->len) { - PPPDEBUG((LOG_WARNING, - "PPP nPut: incomplete sio_write(%d,, %u) = %d\n", pc->fd, b->len, c)); -#if LINK_STATS - lwip_stats.link.err++; -#endif /* LINK_STATS */ - pc->lastXMit = 0; /* prepend PPP_FLAG to next packet */ - break; - } - } - pbuf_free(nb); - -#if LINK_STATS - lwip_stats.link.xmit++; -#endif /* LINK_STATS */ -} - -/* - * pppAppend - append given character to end of given pbuf. If outACCM - * is not NULL and the character needs to be escaped, do so. - * If pbuf is full, append another. - * Return the current pbuf. - */ -static struct pbuf *pppAppend(u_char c, struct pbuf *nb, ext_accm *outACCM) -{ - struct pbuf *tb = nb; - - /* Make sure there is room for the character and an escape code. - * Sure we don't quite fill the buffer if the character doesn't - * get escaped but is one character worth complicating this? */ - /* Note: We assume no packet header. */ - if (nb && (PBUF_POOL_BUFSIZE - nb->len) < 2) { - tb = pbuf_alloc(PBUF_RAW, 0, PBUF_POOL); - if (tb) { - nb->next = tb; - } -#if LINK_STATS - else { - lwip_stats.link.memerr++; - } -#endif /* LINK_STATS */ - nb = tb; - } - if (nb) { - if (outACCM && ESCAPE_P(*outACCM, c)) { - *((u_char*)nb->payload + nb->len++) = PPP_ESCAPE; - *((u_char*)nb->payload + nb->len++) = c ^ PPP_TRANS; - } - else - *((u_char*)nb->payload + nb->len++) = c; - } - - return tb; -} - -/* Send a packet on the given connection. */ -static err_t pppifOutput(struct netif *netif, struct pbuf *pb, struct ip_addr *ipaddr) -{ - int pd = (int)netif->state; - u_short protocol = PPP_IP; - PPPControl *pc = &pppControl[pd]; - u_int fcsOut = PPP_INITFCS; - struct pbuf *headMB = NULL, *tailMB = NULL, *p; - u_char c; - - (void)ipaddr; - - /* Validate parameters. */ - /* We let any protocol value go through - it can't hurt us - * and the peer will just drop it if it's not accepting it. */ - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag || !pb) { - PPPDEBUG((LOG_WARNING, "pppifOutput[%d]: bad parms prot=%d pb=%p\n", - pd, protocol, pb)); -#if LINK_STATS - lwip_stats.link.opterr++; - lwip_stats.link.drop++; -#endif - return ERR_ARG; - } - - /* Check that the link is up. */ - if (lcp_phase[pd] == PHASE_DEAD) { - PPPDEBUG((LOG_ERR, "pppifOutput[%d]: link not up\n", pd)); -#if LINK_STATS - lwip_stats.link.rterr++; - lwip_stats.link.drop++; -#endif - return ERR_RTE; - } - - /* Grab an output buffer. */ - headMB = pbuf_alloc(PBUF_RAW, 0, PBUF_POOL); - if (headMB == NULL) { - PPPDEBUG((LOG_WARNING, "pppifOutput[%d]: first alloc fail\n", pd)); -#if LINK_STATS - lwip_stats.link.memerr++; - lwip_stats.link.drop++; -#endif /* LINK_STATS */ - return ERR_MEM; - } - -#if VJ_SUPPORT > 0 - /* - * Attempt Van Jacobson header compression if VJ is configured and - * this is an IP packet. - */ - if (protocol == PPP_IP && pc->vjEnabled) { - switch (vj_compress_tcp(&pc->vjComp, pb)) { - case TYPE_IP: - /* No change... - protocol = PPP_IP_PROTOCOL; - */ - break; - case TYPE_COMPRESSED_TCP: - protocol = PPP_VJC_COMP; - break; - case TYPE_UNCOMPRESSED_TCP: - protocol = PPP_VJC_UNCOMP; - break; - default: - PPPDEBUG((LOG_WARNING, "pppifOutput[%d]: bad IP packet\n", pd)); -#if LINK_STATS - lwip_stats.link.proterr++; - lwip_stats.link.drop++; -#endif - pbuf_free(headMB); - return ERR_VAL; - } - } -#endif - - tailMB = headMB; - - /* Build the PPP header. */ - if ((sys_jiffies() - pc->lastXMit) >= PPP_MAXIDLEFLAG) - tailMB = pppAppend(PPP_FLAG, tailMB, NULL); - pc->lastXMit = sys_jiffies(); - if (!pc->accomp) { - fcsOut = PPP_FCS(fcsOut, PPP_ALLSTATIONS); - tailMB = pppAppend(PPP_ALLSTATIONS, tailMB, &pc->outACCM); - fcsOut = PPP_FCS(fcsOut, PPP_UI); - tailMB = pppAppend(PPP_UI, tailMB, &pc->outACCM); - } - if (!pc->pcomp || protocol > 0xFF) { - c = (protocol >> 8) & 0xFF; - fcsOut = PPP_FCS(fcsOut, c); - tailMB = pppAppend(c, tailMB, &pc->outACCM); - } - c = protocol & 0xFF; - fcsOut = PPP_FCS(fcsOut, c); - tailMB = pppAppend(c, tailMB, &pc->outACCM); - - /* Load packet. */ - for(p = pb; p; p = p->next) { - int n; - u_char *sPtr; - - sPtr = (u_char*)p->payload; - n = p->len; - while (n-- > 0) { - c = *sPtr++; - - /* Update FCS before checking for special characters. */ - fcsOut = PPP_FCS(fcsOut, c); - - /* Copy to output buffer escaping special characters. */ - tailMB = pppAppend(c, tailMB, &pc->outACCM); - } - } - - /* Add FCS and trailing flag. */ - c = ~fcsOut & 0xFF; - tailMB = pppAppend(c, tailMB, &pc->outACCM); - c = (~fcsOut >> 8) & 0xFF; - tailMB = pppAppend(c, tailMB, &pc->outACCM); - tailMB = pppAppend(PPP_FLAG, tailMB, NULL); - - /* If we failed to complete the packet, throw it away. */ - if (!tailMB) { - PPPDEBUG((LOG_WARNING, - "pppifOutput[%d]: Alloc err - dropping proto=%d\n", - pd, protocol)); - pbuf_free(headMB); -#if LINK_STATS - lwip_stats.link.memerr++; - lwip_stats.link.drop++; -#endif - return ERR_MEM; - } - - /* Send it. */ - PPPDEBUG((LOG_INFO, "pppifOutput[%d]: proto=0x%04X\n", pd, protocol)); - - nPut(pc, headMB); - - return ERR_OK; -} - -/* Get and set parameters for the given connection. - * Return 0 on success, an error code on failure. */ -int pppIOCtl(int pd, int cmd, void *arg) -{ - PPPControl *pc = &pppControl[pd]; - int st = 0; - - if (pd < 0 || pd >= NUM_PPP) - st = PPPERR_PARAM; - else { - switch(cmd) { - case PPPCTLG_UPSTATUS: /* Get the PPP up status. */ - if (arg) - *(int *)arg = (int)(pc->if_up); - else - st = PPPERR_PARAM; - break; - case PPPCTLS_ERRCODE: /* Set the PPP error code. */ - if (arg) - pc->errCode = *(int *)arg; - else - st = PPPERR_PARAM; - break; - case PPPCTLG_ERRCODE: /* Get the PPP error code. */ - if (arg) - *(int *)arg = (int)(pc->errCode); - else - st = PPPERR_PARAM; - break; - case PPPCTLG_FD: - if (arg) - *(sio_fd_t *)arg = pc->fd; - else - st = PPPERR_PARAM; - break; - default: - st = PPPERR_PARAM; - break; - } - } - - return st; -} - -/* - * Return the Maximum Transmission Unit for the given PPP connection. - */ -u_int pppMTU(int pd) -{ - PPPControl *pc = &pppControl[pd]; - u_int st; - - /* Validate parameters. */ - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) - st = 0; - else - st = pc->mtu; - - return st; -} - -/* - * Write n characters to a ppp link. - * RETURN: >= 0 Number of characters written - * -1 Failed to write to device - */ -int pppWrite(int pd, const u_char *s, int n) -{ - PPPControl *pc = &pppControl[pd]; - u_char c; - u_int fcsOut = PPP_INITFCS; - struct pbuf *headMB = NULL, *tailMB; - headMB = pbuf_alloc(PBUF_RAW, 0, PBUF_POOL); - if (headMB == NULL) { -#if LINK_STATS - lwip_stats.link.memerr++; - lwip_stats.link.proterr++; -#endif /* LINK_STATS */ - return PPPERR_ALLOC; - } - - tailMB = headMB; - - /* If the link has been idle, we'll send a fresh flag character to - * flush any noise. */ - if ((sys_jiffies() - pc->lastXMit) >= PPP_MAXIDLEFLAG) - tailMB = pppAppend(PPP_FLAG, tailMB, NULL); - pc->lastXMit = sys_jiffies(); - - /* Load output buffer. */ - while (n-- > 0) { - c = *s++; - - /* Update FCS before checking for special characters. */ - fcsOut = PPP_FCS(fcsOut, c); - - /* Copy to output buffer escaping special characters. */ - tailMB = pppAppend(c, tailMB, &pc->outACCM); - } - - /* Add FCS and trailing flag. */ - c = ~fcsOut & 0xFF; - tailMB = pppAppend(c, tailMB, &pc->outACCM); - c = (~fcsOut >> 8) & 0xFF; - tailMB = pppAppend(c, tailMB, &pc->outACCM); - tailMB = pppAppend(PPP_FLAG, tailMB, NULL); - - /* If we failed to complete the packet, throw it away. - * Otherwise send it. */ - if (!tailMB) { - PPPDEBUG((LOG_WARNING, - "pppWrite[%d]: Alloc err - dropping pbuf len=%d\n", pd, headMB->len)); -/* "pppWrite[%d]: Alloc err - dropping %d:%.*H", pd, headMB->len, LWIP_MIN(headMB->len * 2, 40), headMB->payload)); */ - pbuf_free(headMB); -#if LINK_STATS - lwip_stats.link.memerr++; - lwip_stats.link.proterr++; -#endif /* LINK_STATS */ - return PPPERR_ALLOC; - } - - PPPDEBUG((LOG_INFO, "pppWrite[%d]: len=%d\n", pd, headMB->len)); -/* "pppWrite[%d]: %d:%.*H", pd, headMB->len, LWIP_MIN(headMB->len * 2, 40), headMB->payload)); */ - nPut(pc, headMB); - - return PPPERR_NONE; -} - -/* - * ppp_send_config - configure the transmit characteristics of - * the ppp interface. - */ -void ppp_send_config( - int unit, - int mtu, - u32_t asyncmap, - int pcomp, - int accomp -) -{ - PPPControl *pc = &pppControl[unit]; - int i; - - pc->mtu = mtu; - pc->pcomp = pcomp; - pc->accomp = accomp; - - /* Load the ACCM bits for the 32 control codes. */ - for (i = 0; i < 32/8; i++) - pc->outACCM[i] = (u_char)((asyncmap >> (8 * i)) & 0xFF); - PPPDEBUG((LOG_INFO, "ppp_send_config[%d]: outACCM=%X %X %X %X\n", - unit, - pc->outACCM[0], pc->outACCM[1], pc->outACCM[2], pc->outACCM[3])); -} - - -/* - * ppp_set_xaccm - set the extended transmit ACCM for the interface. - */ -void ppp_set_xaccm(int unit, ext_accm *accm) -{ - memcpy(pppControl[unit].outACCM, accm, sizeof(ext_accm)); - PPPDEBUG((LOG_INFO, "ppp_set_xaccm[%d]: outACCM=%X %X %X %X\n", - unit, - pppControl[unit].outACCM[0], - pppControl[unit].outACCM[1], - pppControl[unit].outACCM[2], - pppControl[unit].outACCM[3])); -} - - -/* - * ppp_recv_config - configure the receive-side characteristics of - * the ppp interface. - */ -void ppp_recv_config( - int unit, - int mru, - u32_t asyncmap, - int pcomp, - int accomp -) -{ - PPPControl *pc = &pppControl[unit]; - int i; - - (void)accomp; - (void)pcomp; - (void)mru; - - /* Load the ACCM bits for the 32 control codes. */ - for (i = 0; i < 32 / 8; i++) - pc->inACCM[i] = (u_char)(asyncmap >> (i * 8)); - PPPDEBUG((LOG_INFO, "ppp_recv_config[%d]: inACCM=%X %X %X %X\n", - unit, - pc->inACCM[0], pc->inACCM[1], pc->inACCM[2], pc->inACCM[3])); -} - -#if 0 -/* - * ccp_test - ask kernel whether a given compression method - * is acceptable for use. Returns 1 if the method and parameters - * are OK, 0 if the method is known but the parameters are not OK - * (e.g. code size should be reduced), or -1 if the method is unknown. - */ -int ccp_test( - int unit, - int opt_len, - int for_transmit, - u_char *opt_ptr -) -{ - return 0; /* XXX Currently no compression. */ -} - -/* - * ccp_flags_set - inform kernel about the current state of CCP. - */ -void ccp_flags_set(int unit, int isopen, int isup) -{ - /* XXX */ -} - -/* - * ccp_fatal_error - returns 1 if decompression was disabled as a - * result of an error detected after decompression of a packet, - * 0 otherwise. This is necessary because of patent nonsense. - */ -int ccp_fatal_error(int unit) -{ - /* XXX */ - return 0; -} -#endif - -/* - * get_idle_time - return how long the link has been idle. - */ -int get_idle_time(int u, struct ppp_idle *ip) -{ - /* XXX */ - (void)u; - (void)ip; - - return 0; -} - - -/* - * Return user specified netmask, modified by any mask we might determine - * for address `addr' (in network byte order). - * Here we scan through the system's list of interfaces, looking for - * any non-point-to-point interfaces which might appear to be on the same - * network as `addr'. If we find any, we OR in their netmask to the - * user-specified netmask. - */ -u32_t GetMask(u32_t addr) -{ - u32_t mask, nmask; - - htonl(addr); - if (IN_CLASSA(addr)) /* determine network mask for address class */ - nmask = IN_CLASSA_NET; - else if (IN_CLASSB(addr)) - nmask = IN_CLASSB_NET; - else - nmask = IN_CLASSC_NET; - /* class D nets are disallowed by bad_ip_adrs */ - mask = subnetMask | htonl(nmask); - - /* XXX - * Scan through the system's network interfaces. - * Get each netmask and OR them into our mask. - */ - - return mask; -} - -/* - * sifvjcomp - config tcp header compression - */ -int sifvjcomp( - int pd, - int vjcomp, - int cidcomp, - int maxcid -) -{ -#if VJ_SUPPORT > 0 - PPPControl *pc = &pppControl[pd]; - - pc->vjEnabled = vjcomp; - pc->vjComp.compressSlot = cidcomp; - pc->vjComp.maxSlotIndex = maxcid; - PPPDEBUG((LOG_INFO, "sifvjcomp: VJ compress enable=%d slot=%d max slot=%d\n", - vjcomp, cidcomp, maxcid)); -#endif - - return 0; -} - -/* - * pppifNetifInit - netif init callback - */ -static err_t pppifNetifInit(struct netif *netif) -{ - netif->name[0] = 'p'; - netif->name[1] = 'p'; - netif->output = pppifOutput; - netif->mtu = pppMTU((int)netif->state); - return ERR_OK; -} - - -/* - * sifup - Config the interface up and enable IP packets to pass. - */ -int sifup(int pd) -{ - PPPControl *pc = &pppControl[pd]; - int st = 1; - - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { - st = 0; - PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); - } else { - netif_remove(&pc->netif); - if (netif_add(&pc->netif, &pc->addrs.our_ipaddr, &pc->addrs.netmask, &pc->addrs.his_ipaddr, (void *)pd, pppifNetifInit, ip_input)) { - pc->if_up = 1; - pc->errCode = PPPERR_NONE; - - PPPDEBUG((LOG_DEBUG, "sifup: unit %d: linkStatusCB=%lx errCode=%d\n", pd, pc->linkStatusCB, pc->errCode)); - if(pc->linkStatusCB) - pc->linkStatusCB(pc->linkStatusCtx, pc->errCode, &pc->addrs); - } else { - st = 0; - PPPDEBUG((LOG_ERR, "sifup[%d]: netif_add failed\n", pd)); - } - } - - return st; -} - -/* - * sifnpmode - Set the mode for handling packets for a given NP. - */ -int sifnpmode(int u, int proto, enum NPmode mode) -{ - (void)u; - (void)proto; - (void)mode; - return 0; -} - -/* - * sifdown - Config the interface down and disable IP. - */ -int sifdown(int pd) -{ - PPPControl *pc = &pppControl[pd]; - int st = 1; - - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { - st = 0; - PPPDEBUG((LOG_WARNING, "sifdown[%d]: bad parms\n", pd)); - } else { - pc->if_up = 0; - netif_remove(&pc->netif); - PPPDEBUG((LOG_DEBUG, "sifdown: unit %d: linkStatusCB=%lx errCode=%d\n", pd, pc->linkStatusCB, pc->errCode)); - if(pc->linkStatusCB) - pc->linkStatusCB(pc->linkStatusCtx, PPPERR_CONNECT, NULL); - } - return st; -} - -/* - * sifaddr - Config the interface IP addresses and netmask. - */ -int sifaddr( - int pd, /* Interface unit ??? */ - u32_t o, /* Our IP address ??? */ - u32_t h, /* His IP address ??? */ - u32_t m, /* IP subnet mask ??? */ - u32_t ns1, /* Primary DNS */ - u32_t ns2 /* Secondary DNS */ -) -{ - PPPControl *pc = &pppControl[pd]; - int st = 1; - - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { - st = 0; - PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); - } else { - memcpy(&pc->addrs.our_ipaddr, &o, sizeof(o)); - memcpy(&pc->addrs.his_ipaddr, &h, sizeof(h)); - memcpy(&pc->addrs.netmask, &m, sizeof(m)); - memcpy(&pc->addrs.dns1, &ns1, sizeof(ns1)); - memcpy(&pc->addrs.dns2, &ns2, sizeof(ns2)); - } - return st; -} - -/* - * cifaddr - Clear the interface IP addresses, and delete routes - * through the interface if possible. - */ -int cifaddr( - int pd, /* Interface unit ??? */ - u32_t o, /* Our IP address ??? */ - u32_t h /* IP broadcast address ??? */ -) -{ - PPPControl *pc = &pppControl[pd]; - int st = 1; - - (void)o; - (void)h; - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { - st = 0; - PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); - } else { - IP4_ADDR(&pc->addrs.our_ipaddr, 0,0,0,0); - IP4_ADDR(&pc->addrs.his_ipaddr, 0,0,0,0); - IP4_ADDR(&pc->addrs.netmask, 255,255,255,0); - IP4_ADDR(&pc->addrs.dns1, 0,0,0,0); - IP4_ADDR(&pc->addrs.dns2, 0,0,0,0); - } - return st; -} - -/* - * sifdefaultroute - assign a default route through the address given. - */ -int sifdefaultroute(int pd, u32_t l, u32_t g) -{ - PPPControl *pc = &pppControl[pd]; - int st = 1; - - (void)l; - (void)g; - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { - st = 0; - PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); - } else { - netif_set_default(&pc->netif); - } - - /* TODO: check how PPP handled the netMask, previously not set by ipSetDefault */ - - return st; -} - -/* - * cifdefaultroute - delete a default route through the address given. - */ -int cifdefaultroute(int pd, u32_t l, u32_t g) -{ - PPPControl *pc = &pppControl[pd]; - int st = 1; - - (void)l; - (void)g; - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { - st = 0; - PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); - } else { - netif_set_default(NULL); - } - - return st; -} - -void -pppMainWakeup(int pd) -{ - PPPDEBUG((LOG_DEBUG, "pppMainWakeup: unit %d\n", pd)); - sio_read_abort(pppControl[pd].fd); -} - -/* these callbacks are necessary because lcp_* functions - must be called in the same context as pppInput(), - namely the tcpip_thread(), essentially because - they manipulate timeouts which are thread-private -*/ - -static void -pppStartCB(void *arg) -{ - int pd = (int)arg; - - PPPDEBUG((LOG_DEBUG, "pppStartCB: unit %d\n", pd)); - lcp_lowerup(pd); - lcp_open(pd); /* Start protocol */ -} - -static void -pppStopCB(void *arg) -{ - int pd = (int)arg; - - PPPDEBUG((LOG_DEBUG, "pppStopCB: unit %d\n", pd)); - lcp_close(pd, "User request"); -} - -static void -pppHupCB(void *arg) -{ - int pd = (int)arg; - - PPPDEBUG((LOG_DEBUG, "pppHupCB: unit %d\n", pd)); - lcp_lowerdown(pd); - link_terminated(pd); -} -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ -/* The main PPP process function. This implements the state machine according - * to section 4 of RFC 1661: The Point-To-Point Protocol. */ -static void pppMain(void *arg) -{ - int pd = (int)arg; - struct pbuf *p; - PPPControl* pc; - - pc = &pppControl[pd]; - - p = pbuf_alloc(PBUF_RAW, PPP_MRU+PPP_HDRLEN, PBUF_RAM); - if(!p) { - LWIP_ASSERT("p != NULL", p); - pc->errCode = PPPERR_ALLOC; - goto out; - } - - /* - * Start the connection and handle incoming events (packet or timeout). - */ - PPPDEBUG((LOG_INFO, "pppMain: unit %d: Connecting\n", pd)); - tcpip_callback(pppStartCB, arg); - while (lcp_phase[pd] != PHASE_DEAD) { - if (pc->kill_link) { - PPPDEBUG((LOG_DEBUG, "pppMainWakeup: unit %d kill_link -> pppStopCB\n", pd)); - pc->errCode = PPPERR_USER; - /* This will leave us at PHASE_DEAD. */ - tcpip_callback(pppStopCB, arg); - pc->kill_link = 0; - } - else if (pc->sig_hup) { - PPPDEBUG((LOG_DEBUG, "pppMainWakeup: unit %d sig_hup -> pppHupCB\n", pd)); - pc->sig_hup = 0; - tcpip_callback(pppHupCB, arg); - } else { - int c = sio_read(pc->fd, p->payload, p->len); - if(c > 0) { - pppInProc(pd, p->payload, c); - } else { - PPPDEBUG((LOG_DEBUG, "pppMainWakeup: unit %d sio_read len=%d returned %d\n", pd, p->len, c)); - sys_msleep(1); /* give other tasks a chance to run */ - } - } - } - PPPDEBUG((LOG_INFO, "pppMain: unit %d: PHASE_DEAD\n", pd)); - pbuf_free(p); - -out: - PPPDEBUG((LOG_DEBUG, "pppMain: unit %d: linkStatusCB=%lx errCode=%d\n", pd, pc->linkStatusCB, pc->errCode)); - if(pc->linkStatusCB) - pc->linkStatusCB(pc->linkStatusCtx, pc->errCode ? pc->errCode : PPPERR_PROTOCOL, NULL); - - pc->openFlag = 0; -} - -static struct pbuf *pppSingleBuf(struct pbuf *p) -{ - struct pbuf *q, *b; - u_char *pl; - - if(p->tot_len == p->len) - return p; - - q = pbuf_alloc(PBUF_RAW, p->tot_len, PBUF_RAM); - if(!q) { - PPPDEBUG((LOG_ERR, - "pppSingleBuf: unable to alloc new buf (%d)\n", p->tot_len)); - return p; /* live dangerously */ - } - - for(b = p, pl = q->payload; b != NULL; b = b->next) { - memcpy(pl, b->payload, b->len); - pl += b->len; - } - - pbuf_free(p); - - return q; -} - -struct pppInputHeader { - int unit; - u16_t proto; -}; - -/* - * Pass the processed input packet to the appropriate handler. - * This function and all handlers run in the context of the tcpip_thread - */ -static void pppInput(void *arg) -{ - struct pbuf *nb = (struct pbuf *)arg; - u16_t protocol; - int pd; - - pd = ((struct pppInputHeader *)nb->payload)->unit; - protocol = ((struct pppInputHeader *)nb->payload)->proto; - - pbuf_header(nb, -(int)sizeof(struct pppInputHeader)); - -#if LINK_STATS - lwip_stats.link.recv++; -#endif /* LINK_STATS */ - - /* - * Toss all non-LCP packets unless LCP is OPEN. - * Until we get past the authentication phase, toss all packets - * except LCP, LQR and authentication packets. - */ - if((lcp_phase[pd] <= PHASE_AUTHENTICATE) && (protocol != PPP_LCP)) { - if(!((protocol == PPP_LQR) || (protocol == PPP_PAP) || (protocol == PPP_CHAP)) || - (lcp_phase[pd] != PHASE_AUTHENTICATE)) { - PPPDEBUG((LOG_INFO, "pppInput: discarding proto 0x%04X in phase %d\n", protocol, lcp_phase[pd])); - goto drop; - } - } - - switch(protocol) { - case PPP_VJC_COMP: /* VJ compressed TCP */ -#if VJ_SUPPORT > 0 - PPPDEBUG((LOG_INFO, "pppInput[%d]: vj_comp in pbuf len=%d\n", pd, nb->len)); - /* - * Clip off the VJ header and prepend the rebuilt TCP/IP header and - * pass the result to IP. - */ - if (vj_uncompress_tcp(&nb, &pppControl[pd].vjComp) >= 0) { - pppControl[pd].netif.input(nb, &pppControl[pd].netif); - return; - } - /* Something's wrong so drop it. */ - PPPDEBUG((LOG_WARNING, "pppInput[%d]: Dropping VJ compressed\n", pd)); -#else - /* No handler for this protocol so drop the packet. */ - PPPDEBUG((LOG_INFO, "pppInput[%d]: drop VJ Comp in %d:%s\n", pd, nb->len, nb->payload)); -#endif /* VJ_SUPPORT > 0 */ - break; - case PPP_VJC_UNCOMP: /* VJ uncompressed TCP */ -#if VJ_SUPPORT > 0 - PPPDEBUG((LOG_INFO, "pppInput[%d]: vj_un in pbuf len=%d\n", pd, nb->len)); - /* - * Process the TCP/IP header for VJ header compression and then pass - * the packet to IP. - */ - if (vj_uncompress_uncomp(nb, &pppControl[pd].vjComp) >= 0) { - pppControl[pd].netif.input(nb, &pppControl[pd].netif); - return; - } - /* Something's wrong so drop it. */ - PPPDEBUG((LOG_WARNING, "pppInput[%d]: Dropping VJ uncompressed\n", pd)); -#else - /* No handler for this protocol so drop the packet. */ - PPPDEBUG((LOG_INFO, - "pppInput[%d]: drop VJ UnComp in %d:.*H\n", - pd, nb->len, LWIP_MIN(nb->len * 2, 40), nb->payload)); -#endif /* VJ_SUPPORT > 0 */ - break; - case PPP_IP: /* Internet Protocol */ - PPPDEBUG((LOG_INFO, "pppInput[%d]: ip in pbuf len=%d\n", pd, nb->len)); - pppControl[pd].netif.input(nb, &pppControl[pd].netif); - return; - default: - { - struct protent *protp; - int i; - - /* - * Upcall the proper protocol input routine. - */ - for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) { - if (protp->protocol == protocol && protp->enabled_flag) { - PPPDEBUG((LOG_INFO, "pppInput[%d]: %s len=%d\n", pd, protp->name, nb->len)); - nb = pppSingleBuf(nb); - (*protp->input)(pd, nb->payload, nb->len); - goto out; - } - } - - /* No handler for this protocol so reject the packet. */ - PPPDEBUG((LOG_INFO, "pppInput[%d]: rejecting unsupported proto 0x%04X len=%d\n", pd, protocol, nb->len)); - pbuf_header(nb, sizeof(protocol)); -#if BYTE_ORDER == LITTLE_ENDIAN - protocol = htons(protocol); - memcpy(nb->payload, &protocol, sizeof(protocol)); -#endif - lcp_sprotrej(pd, nb->payload, nb->len); - } - break; - } - -drop: -#if LINK_STATS - lwip_stats.link.drop++; -#endif - -out: - pbuf_free(nb); - return; -} - - -/* - * Drop the input packet. - */ -static void pppDrop(PPPControl *pc) -{ - if (pc->inHead != NULL) { -#if 0 - PPPDEBUG((LOG_INFO, "pppDrop: %d:%.*H\n", pc->inHead->len, min(60, pc->inHead->len * 2), pc->inHead->payload)); -#endif - PPPDEBUG((LOG_INFO, "pppDrop: pbuf len=%d\n", pc->inHead->len)); - if (pc->inTail && (pc->inTail != pc->inHead)) - pbuf_free(pc->inTail); - pbuf_free(pc->inHead); - pc->inHead = NULL; - pc->inTail = NULL; - } -#if VJ_SUPPORT > 0 - vj_uncompress_err(&pc->vjComp); -#endif - -#if LINK_STATS - lwip_stats.link.drop++; -#endif /* LINK_STATS */ -} - - -/* - * Process a received octet string. - */ -static void pppInProc(int pd, u_char *s, int l) -{ - PPPControl *pc = &pppControl[pd]; - struct pbuf *nextNBuf; - u_char curChar; - - PPPDEBUG((LOG_DEBUG, "pppInProc[%d]: got %d bytes\n", pd, l)); - while (l-- > 0) { - curChar = *s++; - - /* Handle special characters. */ - if (ESCAPE_P(pc->inACCM, curChar)) { - /* Check for escape sequences. */ - /* XXX Note that this does not handle an escaped 0x5d character which - * would appear as an escape character. Since this is an ASCII ']' - * and there is no reason that I know of to escape it, I won't complicate - * the code to handle this case. GLL */ - if (curChar == PPP_ESCAPE) - pc->inEscaped = 1; - /* Check for the flag character. */ - else if (curChar == PPP_FLAG) { - /* If this is just an extra flag character, ignore it. */ - if (pc->inState <= PDADDRESS) - ; - /* If we haven't received the packet header, drop what has come in. */ - else if (pc->inState < PDDATA) { - PPPDEBUG((LOG_WARNING, - "pppInProc[%d]: Dropping incomplete packet %d\n", - pd, pc->inState)); -#if LINK_STATS - lwip_stats.link.lenerr++; -#endif - pppDrop(pc); - } - /* If the fcs is invalid, drop the packet. */ - else if (pc->inFCS != PPP_GOODFCS) { - PPPDEBUG((LOG_INFO, - "pppInProc[%d]: Dropping bad fcs 0x%04X proto=0x%04X\n", - pd, pc->inFCS, pc->inProtocol)); -#if LINK_STATS - lwip_stats.link.chkerr++; -#endif - pppDrop(pc); - } - /* Otherwise it's a good packet so pass it on. */ - else { - - /* Trim off the checksum. */ - if(pc->inTail->len >= 2) { - pc->inTail->len -= 2; - - pc->inTail->tot_len = pc->inTail->len; - if (pc->inTail != pc->inHead) { - pbuf_cat(pc->inHead, pc->inTail); - } - } else { - pc->inTail->tot_len = pc->inTail->len; - if (pc->inTail != pc->inHead) { - pbuf_cat(pc->inHead, pc->inTail); - } - - pbuf_realloc(pc->inHead, pc->inHead->tot_len - 2); - } - - /* Dispatch the packet thereby consuming it. */ - if(tcpip_callback(pppInput, pc->inHead) != ERR_OK) { - PPPDEBUG((LOG_ERR, - "pppInProc[%d]: tcpip_callback() failed, dropping packet\n", pd)); - pbuf_free(pc->inHead); -#if LINK_STATS - lwip_stats.link.drop++; -#endif - } - pc->inHead = NULL; - pc->inTail = NULL; - } - - /* Prepare for a new packet. */ - pc->inFCS = PPP_INITFCS; - pc->inState = PDADDRESS; - pc->inEscaped = 0; - } - /* Other characters are usually control characters that may have - * been inserted by the physical layer so here we just drop them. */ - else { - PPPDEBUG((LOG_WARNING, - "pppInProc[%d]: Dropping ACCM char <%d>\n", pd, curChar)); - } - } - /* Process other characters. */ - else { - /* Unencode escaped characters. */ - if (pc->inEscaped) { - pc->inEscaped = 0; - curChar ^= PPP_TRANS; - } - - /* Process character relative to current state. */ - switch(pc->inState) { - case PDIDLE: /* Idle state - waiting. */ - /* Drop the character if it's not 0xff - * we would have processed a flag character above. */ - if (curChar != PPP_ALLSTATIONS) { - break; - } - - /* Fall through */ - case PDSTART: /* Process start flag. */ - /* Prepare for a new packet. */ - pc->inFCS = PPP_INITFCS; - - /* Fall through */ - case PDADDRESS: /* Process address field. */ - if (curChar == PPP_ALLSTATIONS) { - pc->inState = PDCONTROL; - break; - } - /* Else assume compressed address and control fields so - * fall through to get the protocol... */ - case PDCONTROL: /* Process control field. */ - /* If we don't get a valid control code, restart. */ - if (curChar == PPP_UI) { - pc->inState = PDPROTOCOL1; - break; - } -#if 0 - else { - PPPDEBUG((LOG_WARNING, - "pppInProc[%d]: Invalid control <%d>\n", pd, curChar)); - pc->inState = PDSTART; - } -#endif - case PDPROTOCOL1: /* Process protocol field 1. */ - /* If the lower bit is set, this is the end of the protocol - * field. */ - if (curChar & 1) { - pc->inProtocol = curChar; - pc->inState = PDDATA; - } - else { - pc->inProtocol = (u_int)curChar << 8; - pc->inState = PDPROTOCOL2; - } - break; - case PDPROTOCOL2: /* Process protocol field 2. */ - pc->inProtocol |= curChar; - pc->inState = PDDATA; - break; - case PDDATA: /* Process data byte. */ - /* Make space to receive processed data. */ - if (pc->inTail == NULL || pc->inTail->len == PBUF_POOL_BUFSIZE) { - if(pc->inTail) { - pc->inTail->tot_len = pc->inTail->len; - if (pc->inTail != pc->inHead) { - pbuf_cat(pc->inHead, pc->inTail); - } - } - /* If we haven't started a packet, we need a packet header. */ - nextNBuf = pbuf_alloc(PBUF_RAW, 0, PBUF_POOL); - if (nextNBuf == NULL) { - /* No free buffers. Drop the input packet and let the - * higher layers deal with it. Continue processing - * the received pbuf chain in case a new packet starts. */ - PPPDEBUG((LOG_ERR, "pppInProc[%d]: NO FREE MBUFS!\n", pd)); -#if LINK_STATS - lwip_stats.link.memerr++; -#endif /* LINK_STATS */ - pppDrop(pc); - pc->inState = PDSTART; /* Wait for flag sequence. */ - break; - } - if (pc->inHead == NULL) { - struct pppInputHeader *pih = nextNBuf->payload; - - pih->unit = pd; - pih->proto = pc->inProtocol; - - nextNBuf->len += sizeof(*pih); - - pc->inHead = nextNBuf; - } - pc->inTail = nextNBuf; - } - /* Load character into buffer. */ - ((u_char*)pc->inTail->payload)[pc->inTail->len++] = curChar; - break; - } - - /* update the frame check sequence number. */ - pc->inFCS = PPP_FCS(pc->inFCS, curChar); - } - } - avRandomize(); -} - -#endif /* PPP_SUPPORT */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/ppp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/ppp.h deleted file mode 100644 index dbe12171..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/ppp.h +++ /dev/null @@ -1,446 +0,0 @@ -/***************************************************************************** -* ppp.h - Network Point to Point Protocol header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-11-05 Guy Lancaster , Global Election Systems Inc. -* Original derived from BSD codes. -*****************************************************************************/ - -#ifndef PPP_H -#define PPP_H - -#include "lwip/opt.h" - -#if PPP_SUPPORT > 0 -#include "lwip/sio.h" -#include "lwip/api.h" -#include "lwip/sockets.h" -#include "lwip/stats.h" -#include "lwip/mem.h" -#include "lwip/tcpip.h" -#include "lwip/netif.h" - -/* - * pppd.h - PPP daemon global declarations. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - */ -/* - * ppp_defs.h - PPP definitions. - * - * Copyright (c) 1994 The Australian National University. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation is hereby granted, provided that the above copyright - * notice appears in all copies. This software is provided without any - * warranty, express or implied. The Australian National University - * makes no representations about the suitability of this software for - * any purpose. - * - * IN NO EVENT SHALL THE AUSTRALIAN NATIONAL UNIVERSITY BE LIABLE TO ANY - * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES - * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF - * THE AUSTRALIAN NATIONAL UNIVERSITY HAVE BEEN ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * THE AUSTRALIAN NATIONAL UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE AUSTRALIAN NATIONAL UNIVERSITY HAS NO - * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, - * OR MODIFICATIONS. - */ - -#define TIMEOUT(f, a, t) sys_untimeout((f), (a)), sys_timeout((t)*1000, (f), (a)) -#define UNTIMEOUT(f, a) sys_untimeout((f), (a)) - - -# ifndef __u_char_defined - -/* Type definitions for BSD code. */ -typedef unsigned long u_long; -typedef unsigned int u_int; -typedef unsigned short u_short; -typedef unsigned char u_char; - -#endif - -/* - * Constants and structures defined by the internet system, - * Per RFC 790, September 1981, and numerous additions. - */ - -/* - * The basic PPP frame. - */ -#define PPP_HDRLEN 4 /* octets for standard ppp header */ -#define PPP_FCSLEN 2 /* octets for FCS */ - - -/* - * Significant octet values. - */ -#define PPP_ALLSTATIONS 0xff /* All-Stations broadcast address */ -#define PPP_UI 0x03 /* Unnumbered Information */ -#define PPP_FLAG 0x7e /* Flag Sequence */ -#define PPP_ESCAPE 0x7d /* Asynchronous Control Escape */ -#define PPP_TRANS 0x20 /* Asynchronous transparency modifier */ - -/* - * Protocol field values. - */ -#define PPP_IP 0x21 /* Internet Protocol */ -#define PPP_AT 0x29 /* AppleTalk Protocol */ -#define PPP_VJC_COMP 0x2d /* VJ compressed TCP */ -#define PPP_VJC_UNCOMP 0x2f /* VJ uncompressed TCP */ -#define PPP_COMP 0xfd /* compressed packet */ -#define PPP_IPCP 0x8021 /* IP Control Protocol */ -#define PPP_ATCP 0x8029 /* AppleTalk Control Protocol */ -#define PPP_CCP 0x80fd /* Compression Control Protocol */ -#define PPP_LCP 0xc021 /* Link Control Protocol */ -#define PPP_PAP 0xc023 /* Password Authentication Protocol */ -#define PPP_LQR 0xc025 /* Link Quality Report protocol */ -#define PPP_CHAP 0xc223 /* Cryptographic Handshake Auth. Protocol */ -#define PPP_CBCP 0xc029 /* Callback Control Protocol */ - -/* - * Values for FCS calculations. - */ -#define PPP_INITFCS 0xffff /* Initial FCS value */ -#define PPP_GOODFCS 0xf0b8 /* Good final FCS value */ -#define PPP_FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff]) - -/* - * Extended asyncmap - allows any character to be escaped. - */ -typedef u_char ext_accm[32]; - -/* - * What to do with network protocol (NP) packets. - */ -enum NPmode { - NPMODE_PASS, /* pass the packet through */ - NPMODE_DROP, /* silently drop the packet */ - NPMODE_ERROR, /* return an error */ - NPMODE_QUEUE /* save it up for later. */ -}; - -/* - * Inline versions of get/put char/short/long. - * Pointer is advanced; we assume that both arguments - * are lvalues and will already be in registers. - * cp MUST be u_char *. - */ -#define GETCHAR(c, cp) { \ - (c) = *(cp)++; \ -} -#define PUTCHAR(c, cp) { \ - *(cp)++ = (u_char) (c); \ -} - - -#define GETSHORT(s, cp) { \ - (s) = *(cp)++ << 8; \ - (s) |= *(cp)++; \ -} -#define PUTSHORT(s, cp) { \ - *(cp)++ = (u_char) ((s) >> 8); \ - *(cp)++ = (u_char) (s); \ -} - -#define GETLONG(l, cp) { \ - (l) = *(cp)++ << 8; \ - (l) |= *(cp)++; (l) <<= 8; \ - (l) |= *(cp)++; (l) <<= 8; \ - (l) |= *(cp)++; \ -} -#define PUTLONG(l, cp) { \ - *(cp)++ = (u_char) ((l) >> 24); \ - *(cp)++ = (u_char) ((l) >> 16); \ - *(cp)++ = (u_char) ((l) >> 8); \ - *(cp)++ = (u_char) (l); \ -} - - -#define INCPTR(n, cp) ((cp) += (n)) -#define DECPTR(n, cp) ((cp) -= (n)) - -#define BCMP(s0, s1, l) memcmp((u_char *)(s0), (u_char *)(s1), (l)) -#define BCOPY(s, d, l) memcpy((d), (s), (l)) -#define BZERO(s, n) memset(s, 0, n) -#if PPP_DEBUG -#define PRINTMSG(m, l) { m[l] = '\0'; ppp_trace(LOG_INFO, "Remote message: %s\n", m); } -#else -#define PRINTMSG(m, l) -#endif - -/* - * MAKEHEADER - Add PPP Header fields to a packet. - */ -#define MAKEHEADER(p, t) { \ - PUTCHAR(PPP_ALLSTATIONS, p); \ - PUTCHAR(PPP_UI, p); \ - PUTSHORT(t, p); } - -/************************* -*** PUBLIC DEFINITIONS *** -*************************/ - -/* Error codes. */ -#define PPPERR_NONE 0 /* No error. */ -#define PPPERR_PARAM -1 /* Invalid parameter. */ -#define PPPERR_OPEN -2 /* Unable to open PPP session. */ -#define PPPERR_DEVICE -3 /* Invalid I/O device for PPP. */ -#define PPPERR_ALLOC -4 /* Unable to allocate resources. */ -#define PPPERR_USER -5 /* User interrupt. */ -#define PPPERR_CONNECT -6 /* Connection lost. */ -#define PPPERR_AUTHFAIL -7 /* Failed authentication challenge. */ -#define PPPERR_PROTOCOL -8 /* Failed to meet protocol. */ - -/* - * PPP IOCTL commands. - */ -/* - * Get the up status - 0 for down, non-zero for up. The argument must - * point to an int. - */ -#define PPPCTLG_UPSTATUS 100 /* Get the up status - 0 down else up */ -#define PPPCTLS_ERRCODE 101 /* Set the error code */ -#define PPPCTLG_ERRCODE 102 /* Get the error code */ -#define PPPCTLG_FD 103 /* Get the fd associated with the ppp */ - -/************************ -*** PUBLIC DATA TYPES *** -************************/ - -/* - * The following struct gives the addresses of procedures to call - * for a particular protocol. - */ -struct protent { - u_short protocol; /* PPP protocol number */ - /* Initialization procedure */ - void (*init) (int unit); - /* Process a received packet */ - void (*input) (int unit, u_char *pkt, int len); - /* Process a received protocol-reject */ - void (*protrej) (int unit); - /* Lower layer has come up */ - void (*lowerup) (int unit); - /* Lower layer has gone down */ - void (*lowerdown) (int unit); - /* Open the protocol */ - void (*open) (int unit); - /* Close the protocol */ - void (*close) (int unit, char *reason); -#if 0 - /* Print a packet in readable form */ - int (*printpkt) (u_char *pkt, int len, - void (*printer) (void *, char *, ...), - void *arg); - /* Process a received data packet */ - void (*datainput) (int unit, u_char *pkt, int len); -#endif - int enabled_flag; /* 0 iff protocol is disabled */ - char *name; /* Text name of protocol */ -#if 0 - /* Check requested options, assign defaults */ - void (*check_options) (u_long); - /* Configure interface for demand-dial */ - int (*demand_conf) (int unit); - /* Say whether to bring up link for this pkt */ - int (*active_pkt) (u_char *pkt, int len); -#endif -}; - -/* - * The following structure records the time in seconds since - * the last NP packet was sent or received. - */ -struct ppp_idle { - u_short xmit_idle; /* seconds since last NP packet sent */ - u_short recv_idle; /* seconds since last NP packet received */ -}; - -struct ppp_settings { - - u_int disable_defaultip : 1; /* Don't use hostname for default IP addrs */ - u_int auth_required : 1; /* Peer is required to authenticate */ - u_int explicit_remote : 1; /* remote_name specified with remotename opt */ - u_int refuse_pap : 1; /* Don't wanna auth. ourselves with PAP */ - u_int refuse_chap : 1; /* Don't wanna auth. ourselves with CHAP */ - u_int usehostname : 1; /* Use hostname for our_name */ - u_int usepeerdns : 1; /* Ask peer for DNS adds */ - - u_short idle_time_limit; /* Shut down link if idle for this long */ - int maxconnect; /* Maximum connect time (seconds) */ - - char user[MAXNAMELEN + 1];/* Username for PAP */ - char passwd[MAXSECRETLEN + 1]; /* Password for PAP, secret for CHAP */ - char our_name[MAXNAMELEN + 1]; /* Our name for authentication purposes */ - char remote_name[MAXNAMELEN + 1]; /* Peer's name for authentication */ -}; - -struct ppp_addrs { - struct ip_addr our_ipaddr, his_ipaddr, netmask, dns1, dns2; -}; - -/***************************** -*** PUBLIC DATA STRUCTURES *** -*****************************/ -/* Buffers for outgoing packets. */ -extern u_char outpacket_buf[NUM_PPP][PPP_MRU+PPP_HDRLEN]; - -extern struct ppp_settings ppp_settings; - -extern struct protent *ppp_protocols[];/* Table of pointers to supported protocols */ - - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ - -/* Initialize the PPP subsystem. */ -void pppInit(void); - -/* Warning: Using PPPAUTHTYPE_ANY might have security consequences. - * RFC 1994 says: - * - * In practice, within or associated with each PPP server, there is a - * database which associates "user" names with authentication - * information ("secrets"). It is not anticipated that a particular - * named user would be authenticated by multiple methods. This would - * make the user vulnerable to attacks which negotiate the least secure - * method from among a set (such as PAP rather than CHAP). If the same - * secret was used, PAP would reveal the secret to be used later with - * CHAP. - * - * Instead, for each user name there should be an indication of exactly - * one method used to authenticate that user name. If a user needs to - * make use of different authentication methods under different - * circumstances, then distinct user names SHOULD be employed, each of - * which identifies exactly one authentication method. - * - */ -enum pppAuthType { - PPPAUTHTYPE_NONE, - PPPAUTHTYPE_ANY, - PPPAUTHTYPE_PAP, - PPPAUTHTYPE_CHAP -}; - -void pppSetAuth(enum pppAuthType authType, const char *user, const char *passwd); - -/* - * Open a new PPP connection using the given I/O device. - * This initializes the PPP control block but does not - * attempt to negotiate the LCP session. - * Return a new PPP connection descriptor on success or - * an error code (negative) on failure. - */ -int pppOpen(sio_fd_t fd, void (*linkStatusCB)(void *ctx, int errCode, void *arg), void *linkStatusCtx); - -/* - * Close a PPP connection and release the descriptor. - * Any outstanding packets in the queues are dropped. - * Return 0 on success, an error code on failure. - */ -int pppClose(int pd); - -/* - * Indicate to the PPP process that the line has disconnected. - */ -void pppSigHUP(int pd); - -/* - * Get and set parameters for the given connection. - * Return 0 on success, an error code on failure. - */ -int pppIOCtl(int pd, int cmd, void *arg); - -/* - * Return the Maximum Transmission Unit for the given PPP connection. - */ -u_int pppMTU(int pd); - -/* - * Write n characters to a ppp link. - * RETURN: >= 0 Number of characters written - * -1 Failed to write to device - */ -int pppWrite(int pd, const u_char *s, int n); - -void pppMainWakeup(int pd); - -/* Configure i/f transmit parameters */ -void ppp_send_config (int, int, u32_t, int, int); -/* Set extended transmit ACCM */ -void ppp_set_xaccm (int, ext_accm *); -/* Configure i/f receive parameters */ -void ppp_recv_config (int, int, u32_t, int, int); -/* Find out how long link has been idle */ -int get_idle_time (int, struct ppp_idle *); - -/* Configure VJ TCP header compression */ -int sifvjcomp (int, int, int, int); -/* Configure i/f down (for IP) */ -int sifup (int); -/* Set mode for handling packets for proto */ -int sifnpmode (int u, int proto, enum NPmode mode); -/* Configure i/f down (for IP) */ -int sifdown (int); -/* Configure IP addresses for i/f */ -int sifaddr (int, u32_t, u32_t, u32_t, u32_t, u32_t); -/* Reset i/f IP addresses */ -int cifaddr (int, u32_t, u32_t); -/* Create default route through i/f */ -int sifdefaultroute (int, u32_t, u32_t); -/* Delete default route through i/f */ -int cifdefaultroute (int, u32_t, u32_t); - -/* Get appropriate netmask for address */ -u32_t GetMask (u32_t); - -#endif /* PPP_SUPPORT */ - -#endif /* PPP_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/pppdebug.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/pppdebug.h deleted file mode 100644 index de1478ce..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/pppdebug.h +++ /dev/null @@ -1,89 +0,0 @@ -/***************************************************************************** -* pppdebug.h - System debugging utilities. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1998 Global Election Systems Inc. -* portions Copyright (c) 2001 by Cognizant Pty Ltd. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY (please don't use tabs!) -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 98-07-29 Guy Lancaster , Global Election Systems Inc. -* Original. -* -***************************************************************************** -*/ -#ifndef PPPDEBUG_H -#define PPPDEBUG_H - -/************************ -*** PUBLIC DATA TYPES *** -************************/ -/* Trace levels. */ -typedef enum { - LOG_CRITICAL = 0, - LOG_ERR = 1, - LOG_NOTICE = 2, - LOG_WARNING = 3, - LOG_INFO = 5, - LOG_DETAIL = 6, - LOG_DEBUG = 7 -} LogCodes; - - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ -/* - * ppp_trace - a form of printf to send tracing information to stderr - */ -void ppp_trace(int level, const char *format,...); - -#if PPP_DEBUG > 0 - -#define AUTHDEBUG(a) ppp_trace a -#define IPCPDEBUG(a) ppp_trace a -#define UPAPDEBUG(a) ppp_trace a -#define LCPDEBUG(a) ppp_trace a -#define FSMDEBUG(a) ppp_trace a -#define CHAPDEBUG(a) ppp_trace a -#define PPPDEBUG(a) ppp_trace a - -#define TRACELCP 1 - -#else - -#define AUTHDEBUG(a) -#define IPCPDEBUG(a) -#define UPAPDEBUG(a) -#define LCPDEBUG(a) -#define FSMDEBUG(a) -#define CHAPDEBUG(a) - -#define PPPDEBUG(a) - -#define TRACELCP 0 - -#endif - -#endif /* PPPDEBUG_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/randm.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/randm.c deleted file mode 100644 index 05eeb441..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/randm.c +++ /dev/null @@ -1,242 +0,0 @@ -/***************************************************************************** -* randm.c - Random number generator program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* Copyright (c) 1998 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 98-06-03 Guy Lancaster , Global Election Systems Inc. -* Extracted from avos. -*****************************************************************************/ - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "md5.h" -#include "randm.h" - -#include "pppdebug.h" - - -#if MD5_SUPPORT>0 /* this module depends on MD5 */ -#define RANDPOOLSZ 16 /* Bytes stored in the pool of randomness. */ - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -static char randPool[RANDPOOLSZ]; /* Pool of randomness. */ -static long randCount = 0; /* Pseudo-random incrementer */ - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * Initialize the random number generator. - * - * Since this is to be called on power up, we don't have much - * system randomess to work with. Here all we use is the - * real-time clock. We'll accumulate more randomness as soon - * as things start happening. - */ -void avRandomInit() -{ - avChurnRand(NULL, 0); -} - -/* - * Churn the randomness pool on a random event. Call this early and often - * on random and semi-random system events to build randomness in time for - * usage. For randomly timed events, pass a null pointer and a zero length - * and this will use the system timer and other sources to add randomness. - * If new random data is available, pass a pointer to that and it will be - * included. - * - * Ref: Applied Cryptography 2nd Ed. by Bruce Schneier p. 427 - */ -void avChurnRand(char *randData, u32_t randLen) -{ - MD5_CTX md5; - -/* ppp_trace(LOG_INFO, "churnRand: %u@%P\n", randLen, randData); */ - MD5Init(&md5); - MD5Update(&md5, (u_char *)randPool, sizeof(randPool)); - if (randData) - MD5Update(&md5, (u_char *)randData, randLen); - else { - struct { - /* INCLUDE fields for any system sources of randomness */ - char foobar; - } sysData; - - /* Load sysData fields here. */ - ; - MD5Update(&md5, (u_char *)&sysData, sizeof(sysData)); - } - MD5Final((u_char *)randPool, &md5); -/* ppp_trace(LOG_INFO, "churnRand: -> 0\n"); */ -} - -/* - * Use the random pool to generate random data. This degrades to pseudo - * random when used faster than randomness is supplied using churnRand(). - * Note: It's important that there be sufficient randomness in randPool - * before this is called for otherwise the range of the result may be - * narrow enough to make a search feasible. - * - * Ref: Applied Cryptography 2nd Ed. by Bruce Schneier p. 427 - * - * XXX Why does he not just call churnRand() for each block? Probably - * so that you don't ever publish the seed which could possibly help - * predict future values. - * XXX Why don't we preserve md5 between blocks and just update it with - * randCount each time? Probably there is a weakness but I wish that - * it was documented. - */ -void avGenRand(char *buf, u32_t bufLen) -{ - MD5_CTX md5; - u_char tmp[16]; - u32_t n; - - while (bufLen > 0) { - n = LWIP_MIN(bufLen, RANDPOOLSZ); - MD5Init(&md5); - MD5Update(&md5, (u_char *)randPool, sizeof(randPool)); - MD5Update(&md5, (u_char *)&randCount, sizeof(randCount)); - MD5Final(tmp, &md5); - randCount++; - memcpy(buf, tmp, n); - buf += n; - bufLen -= n; - } -} - -/* - * Return a new random number. - */ -u32_t avRandom() -{ - u32_t newRand; - - avGenRand((char *)&newRand, sizeof(newRand)); - - return newRand; -} - -#else /* MD5_SUPPORT */ - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -static int avRandomized = 0; /* Set when truely randomized. */ -static u32_t avRandomSeed = 0; /* Seed used for random number generation. */ - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * Initialize the random number generator. - * - * Here we attempt to compute a random number seed but even if - * it isn't random, we'll randomize it later. - * - * The current method uses the fields from the real time clock, - * the idle process counter, the millisecond counter, and the - * hardware timer tick counter. When this is invoked - * in startup(), then the idle counter and timer values may - * repeat after each boot and the real time clock may not be - * operational. Thus we call it again on the first random - * event. - */ -void avRandomInit() -{ -#if 0 - /* Get a pointer into the last 4 bytes of clockBuf. */ - u32_t *lptr1 = (u32_t *)((char *)&clockBuf[3]); - - /* - * Initialize our seed using the real-time clock, the idle - * counter, the millisecond timer, and the hardware timer - * tick counter. The real-time clock and the hardware - * tick counter are the best sources of randomness but - * since the tick counter is only 16 bit (and truncated - * at that), the idle counter and millisecond timer - * (which may be small values) are added to help - * randomize the lower 16 bits of the seed. - */ - readClk(); - avRandomSeed += *(u32_t *)clockBuf + *lptr1 + OSIdleCtr - + ppp_mtime() + ((u32_t)TM1 << 16) + TM1; -#else - avRandomSeed += sys_jiffies(); /* XXX */ -#endif - - /* Initialize the Borland random number generator. */ - srand((unsigned)avRandomSeed); -} - -/* - * Randomize our random seed value. Here we use the fact that - * this function is called at *truely random* times by the polling - * and network functions. Here we only get 16 bits of new random - * value but we use the previous value to randomize the other 16 - * bits. - */ -void avRandomize(void) -{ - static u32_t last_jiffies; - - if (!avRandomized) { - avRandomized = !0; - avRandomInit(); - /* The initialization function also updates the seed. */ - } else { -/* avRandomSeed += (avRandomSeed << 16) + TM1; */ - avRandomSeed += (sys_jiffies() - last_jiffies); /* XXX */ - } - last_jiffies = sys_jiffies(); -} - -/* - * Return a new random number. - * Here we use the Borland rand() function to supply a pseudo random - * number which we make truely random by combining it with our own - * seed which is randomized by truely random events. - * Thus the numbers will be truely random unless there have been no - * operator or network events in which case it will be pseudo random - * seeded by the real time clock. - */ -u32_t avRandom() -{ - return ((((u32_t)rand() << 16) + rand()) + avRandomSeed); -} - - - -#endif /* MD5_SUPPORT */ -#endif /* PPP_SUPPORT */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/randm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/randm.h deleted file mode 100644 index baa42f0c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/randm.h +++ /dev/null @@ -1,81 +0,0 @@ -/***************************************************************************** -* randm.h - Random number generator header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* Copyright (c) 1998 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 98-05-29 Guy Lancaster , Global Election Systems Inc. -* Extracted from avos. -*****************************************************************************/ - -#ifndef RANDM_H -#define RANDM_H - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ -/* - * Initialize the random number generator. - */ -void avRandomInit(void); - -/* - * Churn the randomness pool on a random event. Call this early and often - * on random and semi-random system events to build randomness in time for - * usage. For randomly timed events, pass a null pointer and a zero length - * and this will use the system timer and other sources to add randomness. - * If new random data is available, pass a pointer to that and it will be - * included. - */ -void avChurnRand(char *randData, u32_t randLen); - -/* - * Randomize our random seed value. To be called for truely random events - * such as user operations and network traffic. - */ -#if MD5_SUPPORT -#define avRandomize() avChurnRand(NULL, 0) -#else -void avRandomize(void); -#endif - -/* - * Use the random pool to generate random data. This degrades to pseudo - * random when used faster than randomness is supplied using churnRand(). - * Thus it's important to make sure that the results of this are not - * published directly because one could predict the next result to at - * least some degree. Also, it's important to get a good seed before - * the first use. - */ -void avGenRand(char *buf, u32_t bufLen); - -/* - * Return a new random number. - */ -u32_t avRandom(void); - - -#endif /* RANDM_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/vj.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/vj.c deleted file mode 100644 index 0636ee11..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/vj.c +++ /dev/null @@ -1,633 +0,0 @@ -/* - * Routines to compress and uncompess tcp packets (for transmission - * over low speed serial lines. - * - * Copyright (c) 1989 Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by the University of California, Berkeley. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * Van Jacobson (van@helios.ee.lbl.gov), Dec 31, 1989: - * - Initial distribution. - * - * Modified June 1993 by Paul Mackerras, paulus@cs.anu.edu.au, - * so that the entire packet being decompressed doesn't have - * to be in contiguous memory (just the compressed header). - * - * Modified March 1998 by Guy Lancaster, glanca@gesn.com, - * for a 16 bit processor. - */ - -#include - -#include "ppp.h" -#include "vj.h" -#include "pppdebug.h" - -#if VJ_SUPPORT > 0 - -#if LINK_STATS -#define INCR(counter) ++comp->stats.counter -#else -#define INCR(counter) -#endif - -#if defined(NO_CHAR_BITFIELDS) -#define getip_hl(base) ((base).ip_hl_v&0xf) -#define getth_off(base) (((base).th_x2_off&0xf0)>>4) -#else -#define getip_hl(base) ((base).ip_hl) -#define getth_off(base) ((base).th_off) -#endif - -void vj_compress_init(struct vjcompress *comp) -{ - register u_int i; - register struct cstate *tstate = comp->tstate; - -#if MAX_SLOTS == 0 - memset((char *)comp, 0, sizeof(*comp)); -#endif - comp->maxSlotIndex = MAX_SLOTS - 1; - comp->compressSlot = 0; /* Disable slot ID compression by default. */ - for (i = MAX_SLOTS - 1; i > 0; --i) { - tstate[i].cs_id = i; - tstate[i].cs_next = &tstate[i - 1]; - } - tstate[0].cs_next = &tstate[MAX_SLOTS - 1]; - tstate[0].cs_id = 0; - comp->last_cs = &tstate[0]; - comp->last_recv = 255; - comp->last_xmit = 255; - comp->flags = VJF_TOSS; -} - - -/* ENCODE encodes a number that is known to be non-zero. ENCODEZ - * checks for zero (since zero has to be encoded in the long, 3 byte - * form). - */ -#define ENCODE(n) { \ - if ((u_short)(n) >= 256) { \ - *cp++ = 0; \ - cp[1] = (n); \ - cp[0] = (n) >> 8; \ - cp += 2; \ - } else { \ - *cp++ = (n); \ - } \ -} -#define ENCODEZ(n) { \ - if ((u_short)(n) >= 256 || (u_short)(n) == 0) { \ - *cp++ = 0; \ - cp[1] = (n); \ - cp[0] = (n) >> 8; \ - cp += 2; \ - } else { \ - *cp++ = (n); \ - } \ -} - -#define DECODEL(f) { \ - if (*cp == 0) {\ - u32_t tmp = ntohl(f) + ((cp[1] << 8) | cp[2]); \ - (f) = htonl(tmp); \ - cp += 3; \ - } else { \ - u32_t tmp = ntohl(f) + (u32_t)*cp++; \ - (f) = htonl(tmp); \ - } \ -} - -#define DECODES(f) { \ - if (*cp == 0) {\ - u_short tmp = ntohs(f) + (((u_short)cp[1] << 8) | cp[2]); \ - (f) = htons(tmp); \ - cp += 3; \ - } else { \ - u_short tmp = ntohs(f) + (u_short)*cp++; \ - (f) = htons(tmp); \ - } \ -} - -#define DECODEU(f) { \ - if (*cp == 0) {\ - (f) = htons(((u_short)cp[1] << 8) | cp[2]); \ - cp += 3; \ - } else { \ - (f) = htons((u_short)*cp++); \ - } \ -} - -/* - * vj_compress_tcp - Attempt to do Van Jacobsen header compression on a - * packet. This assumes that nb and comp are not null and that the first - * buffer of the chain contains a valid IP header. - * Return the VJ type code indicating whether or not the packet was - * compressed. - */ -u_int vj_compress_tcp( - struct vjcompress *comp, - struct pbuf *pb -) -{ - register struct ip *ip = (struct ip *)pb->payload; - register struct cstate *cs = comp->last_cs->cs_next; - register u_short hlen = getip_hl(*ip); - register struct tcphdr *oth; - register struct tcphdr *th; - register u_short deltaS, deltaA; - register u_long deltaL; - register u_int changes = 0; - u_char new_seq[16]; - register u_char *cp = new_seq; - - /* - * Check that the packet is IP proto TCP. - */ - if (ip->ip_p != IPPROTO_TCP) - return (TYPE_IP); - - /* - * Bail if this is an IP fragment or if the TCP packet isn't - * `compressible' (i.e., ACK isn't set or some other control bit is - * set). - */ - if ((ip->ip_off & htons(0x3fff)) || pb->tot_len < 40) - return (TYPE_IP); - th = (struct tcphdr *)&((long *)ip)[hlen]; - if ((th->th_flags & (TCP_SYN|TCP_FIN|TCP_RST|TCP_ACK)) != TCP_ACK) - return (TYPE_IP); - - /* - * Packet is compressible -- we're going to send either a - * COMPRESSED_TCP or UNCOMPRESSED_TCP packet. Either way we need - * to locate (or create) the connection state. Special case the - * most recently used connection since it's most likely to be used - * again & we don't have to do any reordering if it's used. - */ - INCR(vjs_packets); - if (ip->ip_src.s_addr != cs->cs_ip.ip_src.s_addr - || ip->ip_dst.s_addr != cs->cs_ip.ip_dst.s_addr - || *(long *)th != ((long *)&cs->cs_ip)[getip_hl(cs->cs_ip)]) { - /* - * Wasn't the first -- search for it. - * - * States are kept in a circularly linked list with - * last_cs pointing to the end of the list. The - * list is kept in lru order by moving a state to the - * head of the list whenever it is referenced. Since - * the list is short and, empirically, the connection - * we want is almost always near the front, we locate - * states via linear search. If we don't find a state - * for the datagram, the oldest state is (re-)used. - */ - register struct cstate *lcs; - register struct cstate *lastcs = comp->last_cs; - - do { - lcs = cs; cs = cs->cs_next; - INCR(vjs_searches); - if (ip->ip_src.s_addr == cs->cs_ip.ip_src.s_addr - && ip->ip_dst.s_addr == cs->cs_ip.ip_dst.s_addr - && *(long *)th == ((long *)&cs->cs_ip)[getip_hl(cs->cs_ip)]) - goto found; - } while (cs != lastcs); - - /* - * Didn't find it -- re-use oldest cstate. Send an - * uncompressed packet that tells the other side what - * connection number we're using for this conversation. - * Note that since the state list is circular, the oldest - * state points to the newest and we only need to set - * last_cs to update the lru linkage. - */ - INCR(vjs_misses); - comp->last_cs = lcs; - hlen += getth_off(*th); - hlen <<= 2; - /* Check that the IP/TCP headers are contained in the first buffer. */ - if (hlen > pb->len) - return (TYPE_IP); - goto uncompressed; - - found: - /* - * Found it -- move to the front on the connection list. - */ - if (cs == lastcs) - comp->last_cs = lcs; - else { - lcs->cs_next = cs->cs_next; - cs->cs_next = lastcs->cs_next; - lastcs->cs_next = cs; - } - } - - oth = (struct tcphdr *)&((long *)&cs->cs_ip)[hlen]; - deltaS = hlen; - hlen += getth_off(*th); - hlen <<= 2; - /* Check that the IP/TCP headers are contained in the first buffer. */ - if (hlen > pb->len) { - PPPDEBUG((LOG_INFO, "vj_compress_tcp: header len %d spans buffers\n", - hlen)); - return (TYPE_IP); - } - - /* - * Make sure that only what we expect to change changed. The first - * line of the `if' checks the IP protocol version, header length & - * type of service. The 2nd line checks the "Don't fragment" bit. - * The 3rd line checks the time-to-live and protocol (the protocol - * check is unnecessary but costless). The 4th line checks the TCP - * header length. The 5th line checks IP options, if any. The 6th - * line checks TCP options, if any. If any of these things are - * different between the previous & current datagram, we send the - * current datagram `uncompressed'. - */ - if (((u_short *)ip)[0] != ((u_short *)&cs->cs_ip)[0] - || ((u_short *)ip)[3] != ((u_short *)&cs->cs_ip)[3] - || ((u_short *)ip)[4] != ((u_short *)&cs->cs_ip)[4] - || getth_off(*th) != getth_off(*oth) - || (deltaS > 5 && BCMP(ip + 1, &cs->cs_ip + 1, (deltaS - 5) << 2)) - || (getth_off(*th) > 5 && BCMP(th + 1, oth + 1, (getth_off(*th) - 5) << 2))) - goto uncompressed; - - /* - * Figure out which of the changing fields changed. The - * receiver expects changes in the order: urgent, window, - * ack, seq (the order minimizes the number of temporaries - * needed in this section of code). - */ - if (th->th_flags & TCP_URG) { - deltaS = ntohs(th->th_urp); - ENCODEZ(deltaS); - changes |= NEW_U; - } else if (th->th_urp != oth->th_urp) - /* argh! URG not set but urp changed -- a sensible - * implementation should never do this but RFC793 - * doesn't prohibit the change so we have to deal - * with it. */ - goto uncompressed; - - if ((deltaS = (u_short)(ntohs(th->th_win) - ntohs(oth->th_win))) != 0) { - ENCODE(deltaS); - changes |= NEW_W; - } - - if ((deltaL = ntohl(th->th_ack) - ntohl(oth->th_ack)) != 0) { - if (deltaL > 0xffff) - goto uncompressed; - deltaA = (u_short)deltaL; - ENCODE(deltaA); - changes |= NEW_A; - } - - if ((deltaL = ntohl(th->th_seq) - ntohl(oth->th_seq)) != 0) { - if (deltaL > 0xffff) - goto uncompressed; - deltaS = (u_short)deltaL; - ENCODE(deltaS); - changes |= NEW_S; - } - - switch(changes) { - - case 0: - /* - * Nothing changed. If this packet contains data and the - * last one didn't, this is probably a data packet following - * an ack (normal on an interactive connection) and we send - * it compressed. Otherwise it's probably a retransmit, - * retransmitted ack or window probe. Send it uncompressed - * in case the other side missed the compressed version. - */ - if (ip->ip_len != cs->cs_ip.ip_len && - ntohs(cs->cs_ip.ip_len) == hlen) - break; - - /* (fall through) */ - - case SPECIAL_I: - case SPECIAL_D: - /* - * actual changes match one of our special case encodings -- - * send packet uncompressed. - */ - goto uncompressed; - - case NEW_S|NEW_A: - if (deltaS == deltaA && deltaS == ntohs(cs->cs_ip.ip_len) - hlen) { - /* special case for echoed terminal traffic */ - changes = SPECIAL_I; - cp = new_seq; - } - break; - - case NEW_S: - if (deltaS == ntohs(cs->cs_ip.ip_len) - hlen) { - /* special case for data xfer */ - changes = SPECIAL_D; - cp = new_seq; - } - break; - } - - deltaS = (u_short)(ntohs(ip->ip_id) - ntohs(cs->cs_ip.ip_id)); - if (deltaS != 1) { - ENCODEZ(deltaS); - changes |= NEW_I; - } - if (th->th_flags & TCP_PSH) - changes |= TCP_PUSH_BIT; - /* - * Grab the cksum before we overwrite it below. Then update our - * state with this packet's header. - */ - deltaA = ntohs(th->th_sum); - BCOPY(ip, &cs->cs_ip, hlen); - - /* - * We want to use the original packet as our compressed packet. - * (cp - new_seq) is the number of bytes we need for compressed - * sequence numbers. In addition we need one byte for the change - * mask, one for the connection id and two for the tcp checksum. - * So, (cp - new_seq) + 4 bytes of header are needed. hlen is how - * many bytes of the original packet to toss so subtract the two to - * get the new packet size. - */ - deltaS = (u_short)(cp - new_seq); - if (!comp->compressSlot || comp->last_xmit != cs->cs_id) { - comp->last_xmit = cs->cs_id; - hlen -= deltaS + 4; - pbuf_header(pb, -hlen); - cp = (u_char *)pb->payload; - *cp++ = changes | NEW_C; - *cp++ = cs->cs_id; - } else { - hlen -= deltaS + 3; - pbuf_header(pb, -hlen); - cp = (u_char *)pb->payload; - *cp++ = changes; - } - *cp++ = deltaA >> 8; - *cp++ = deltaA; - BCOPY(new_seq, cp, deltaS); - INCR(vjs_compressed); - return (TYPE_COMPRESSED_TCP); - - /* - * Update connection state cs & send uncompressed packet (that is, - * a regular ip/tcp packet but with the 'conversation id' we hope - * to use on future compressed packets in the protocol field). - */ -uncompressed: - BCOPY(ip, &cs->cs_ip, hlen); - ip->ip_p = cs->cs_id; - comp->last_xmit = cs->cs_id; - return (TYPE_UNCOMPRESSED_TCP); -} - -/* - * Called when we may have missed a packet. - */ -void vj_uncompress_err(struct vjcompress *comp) -{ - comp->flags |= VJF_TOSS; - INCR(vjs_errorin); -} - -/* - * "Uncompress" a packet of type TYPE_UNCOMPRESSED_TCP. - * Return 0 on success, -1 on failure. - */ -int vj_uncompress_uncomp( - struct pbuf *nb, - struct vjcompress *comp -) -{ - register u_int hlen; - register struct cstate *cs; - register struct ip *ip; - - ip = (struct ip *)nb->payload; - hlen = getip_hl(*ip) << 2; - if (ip->ip_p >= MAX_SLOTS - || hlen + sizeof(struct tcphdr) > nb->len - || (hlen += getth_off(*((struct tcphdr *)&((char *)ip)[hlen])) << 2) - > nb->len - || hlen > MAX_HDR) { - PPPDEBUG((LOG_INFO, "vj_uncompress_uncomp: bad cid=%d, hlen=%d buflen=%d\n", - ip->ip_p, hlen, nb->len)); - comp->flags |= VJF_TOSS; - INCR(vjs_errorin); - return -1; - } - cs = &comp->rstate[comp->last_recv = ip->ip_p]; - comp->flags &=~ VJF_TOSS; - ip->ip_p = IPPROTO_TCP; - BCOPY(ip, &cs->cs_ip, hlen); - cs->cs_hlen = hlen; - INCR(vjs_uncompressedin); - return 0; -} - -/* - * Uncompress a packet of type TYPE_COMPRESSED_TCP. - * The packet is composed of a buffer chain and the first buffer - * must contain an accurate chain length. - * The first buffer must include the entire compressed TCP/IP header. - * This procedure replaces the compressed header with the uncompressed - * header and returns the length of the VJ header. - */ -int vj_uncompress_tcp( - struct pbuf **nb, - struct vjcompress *comp -) -{ - u_char *cp; - struct tcphdr *th; - struct cstate *cs; - u_short *bp; - struct pbuf *n0 = *nb; - u32_t tmp; - u_int vjlen, hlen, changes; - - INCR(vjs_compressedin); - cp = (u_char *)n0->payload; - changes = *cp++; - if (changes & NEW_C) { - /* - * Make sure the state index is in range, then grab the state. - * If we have a good state index, clear the 'discard' flag. - */ - if (*cp >= MAX_SLOTS) { - PPPDEBUG((LOG_INFO, "vj_uncompress_tcp: bad cid=%d\n", *cp)); - goto bad; - } - - comp->flags &=~ VJF_TOSS; - comp->last_recv = *cp++; - } else { - /* - * this packet has an implicit state index. If we've - * had a line error since the last time we got an - * explicit state index, we have to toss the packet. - */ - if (comp->flags & VJF_TOSS) { - PPPDEBUG((LOG_INFO, "vj_uncompress_tcp: tossing\n")); - INCR(vjs_tossed); - return (-1); - } - } - cs = &comp->rstate[comp->last_recv]; - hlen = getip_hl(cs->cs_ip) << 2; - th = (struct tcphdr *)&((u_char *)&cs->cs_ip)[hlen]; - th->th_sum = htons((*cp << 8) | cp[1]); - cp += 2; - if (changes & TCP_PUSH_BIT) - th->th_flags |= TCP_PSH; - else - th->th_flags &=~ TCP_PSH; - - switch (changes & SPECIALS_MASK) { - case SPECIAL_I: - { - register u32_t i = ntohs(cs->cs_ip.ip_len) - cs->cs_hlen; - /* some compilers can't nest inline assembler.. */ - tmp = ntohl(th->th_ack) + i; - th->th_ack = htonl(tmp); - tmp = ntohl(th->th_seq) + i; - th->th_seq = htonl(tmp); - } - break; - - case SPECIAL_D: - /* some compilers can't nest inline assembler.. */ - tmp = ntohl(th->th_seq) + ntohs(cs->cs_ip.ip_len) - cs->cs_hlen; - th->th_seq = htonl(tmp); - break; - - default: - if (changes & NEW_U) { - th->th_flags |= TCP_URG; - DECODEU(th->th_urp); - } else - th->th_flags &=~ TCP_URG; - if (changes & NEW_W) - DECODES(th->th_win); - if (changes & NEW_A) - DECODEL(th->th_ack); - if (changes & NEW_S) - DECODEL(th->th_seq); - break; - } - if (changes & NEW_I) { - DECODES(cs->cs_ip.ip_id); - } else { - cs->cs_ip.ip_id = ntohs(cs->cs_ip.ip_id) + 1; - cs->cs_ip.ip_id = htons(cs->cs_ip.ip_id); - } - - /* - * At this point, cp points to the first byte of data in the - * packet. Fill in the IP total length and update the IP - * header checksum. - */ - vjlen = (u_short)(cp - (u_char*)n0->payload); - if (n0->len < vjlen) { - /* - * We must have dropped some characters (crc should detect - * this but the old slip framing won't) - */ - PPPDEBUG((LOG_INFO, "vj_uncompress_tcp: head buffer %d too short %d\n", - n0->len, vjlen)); - goto bad; - } - -#if BYTE_ORDER == LITTLE_ENDIAN - tmp = n0->tot_len - vjlen + cs->cs_hlen; - cs->cs_ip.ip_len = htons(tmp); -#else - cs->cs_ip.ip_len = htons(n0->tot_len - vjlen + cs->cs_hlen); -#endif - - /* recompute the ip header checksum */ - bp = (u_short *) &cs->cs_ip; - cs->cs_ip.ip_sum = 0; - for (tmp = 0; hlen > 0; hlen -= 2) - tmp += *bp++; - tmp = (tmp & 0xffff) + (tmp >> 16); - tmp = (tmp & 0xffff) + (tmp >> 16); - cs->cs_ip.ip_sum = (u_short)(~tmp); - - /* Remove the compressed header and prepend the uncompressed header. */ - pbuf_header(n0, -vjlen); - - if(MEM_ALIGN(n0->payload) != n0->payload) { - struct pbuf *np, *q; - u8_t *bufptr; - - np = pbuf_alloc(PBUF_RAW, n0->len + cs->cs_hlen, PBUF_POOL); - if(!np) { - PPPDEBUG((LOG_WARNING, "vj_uncompress_tcp: realign failed\n")); - *nb = NULL; - goto bad; - } - - pbuf_header(np, -cs->cs_hlen); - - bufptr = n0->payload; - for(q = np; q != NULL; q = q->next) { - memcpy(q->payload, bufptr, q->len); - bufptr += q->len; - } - - if(n0->next) { - pbuf_chain(np, n0->next); - pbuf_dechain(n0); - } - pbuf_free(n0); - n0 = np; - } - - if(pbuf_header(n0, cs->cs_hlen)) { - struct pbuf *np; - - LWIP_ASSERT("vj_uncompress_tcp: cs->cs_hlen <= PBUF_POOL_BUFSIZE", cs->cs_hlen <= PBUF_POOL_BUFSIZE); - np = pbuf_alloc(PBUF_RAW, cs->cs_hlen, PBUF_POOL); - if(!np) { - PPPDEBUG((LOG_WARNING, "vj_uncompress_tcp: prepend failed\n")); - *nb = NULL; - goto bad; - } - pbuf_cat(np, n0); - n0 = np; - } - LWIP_ASSERT("n0->len >= cs->cs_hlen", n0->len >= cs->cs_hlen); - memcpy(n0->payload, &cs->cs_ip, cs->cs_hlen); - - *nb = n0; - - return vjlen; - -bad: - comp->flags |= VJF_TOSS; - INCR(vjs_errorin); - return (-1); -} - -#endif - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/vj.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/vj.h deleted file mode 100644 index 252d0f5a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/vj.h +++ /dev/null @@ -1,155 +0,0 @@ -/* - * Definitions for tcp compression routines. - * - * $Id$ - * - * Copyright (c) 1989 Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by the University of California, Berkeley. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * Van Jacobson (van@helios.ee.lbl.gov), Dec 31, 1989: - * - Initial distribution. - */ - -#ifndef VJ_H -#define VJ_H - -#include "vjbsdhdr.h" - -#define MAX_SLOTS 16 /* must be > 2 and < 256 */ -#define MAX_HDR 128 - -/* - * Compressed packet format: - * - * The first octet contains the packet type (top 3 bits), TCP - * 'push' bit, and flags that indicate which of the 4 TCP sequence - * numbers have changed (bottom 5 bits). The next octet is a - * conversation number that associates a saved IP/TCP header with - * the compressed packet. The next two octets are the TCP checksum - * from the original datagram. The next 0 to 15 octets are - * sequence number changes, one change per bit set in the header - * (there may be no changes and there are two special cases where - * the receiver implicitly knows what changed -- see below). - * - * There are 5 numbers which can change (they are always inserted - * in the following order): TCP urgent pointer, window, - * acknowlegement, sequence number and IP ID. (The urgent pointer - * is different from the others in that its value is sent, not the - * change in value.) Since typical use of SLIP links is biased - * toward small packets (see comments on MTU/MSS below), changes - * use a variable length coding with one octet for numbers in the - * range 1 - 255 and 3 octets (0, MSB, LSB) for numbers in the - * range 256 - 65535 or 0. (If the change in sequence number or - * ack is more than 65535, an uncompressed packet is sent.) - */ - -/* - * Packet types (must not conflict with IP protocol version) - * - * The top nibble of the first octet is the packet type. There are - * three possible types: IP (not proto TCP or tcp with one of the - * control flags set); uncompressed TCP (a normal IP/TCP packet but - * with the 8-bit protocol field replaced by an 8-bit connection id -- - * this type of packet syncs the sender & receiver); and compressed - * TCP (described above). - * - * LSB of 4-bit field is TCP "PUSH" bit (a worthless anachronism) and - * is logically part of the 4-bit "changes" field that follows. Top - * three bits are actual packet type. For backward compatibility - * and in the interest of conserving bits, numbers are chosen so the - * IP protocol version number (4) which normally appears in this nibble - * means "IP packet". - */ - -/* packet types */ -#define TYPE_IP 0x40 -#define TYPE_UNCOMPRESSED_TCP 0x70 -#define TYPE_COMPRESSED_TCP 0x80 -#define TYPE_ERROR 0x00 - -/* Bits in first octet of compressed packet */ -#define NEW_C 0x40 /* flag bits for what changed in a packet */ -#define NEW_I 0x20 -#define NEW_S 0x08 -#define NEW_A 0x04 -#define NEW_W 0x02 -#define NEW_U 0x01 - -/* reserved, special-case values of above */ -#define SPECIAL_I (NEW_S|NEW_W|NEW_U) /* echoed interactive traffic */ -#define SPECIAL_D (NEW_S|NEW_A|NEW_W|NEW_U) /* unidirectional data */ -#define SPECIALS_MASK (NEW_S|NEW_A|NEW_W|NEW_U) - -#define TCP_PUSH_BIT 0x10 - - -/* - * "state" data for each active tcp conversation on the wire. This is - * basically a copy of the entire IP/TCP header from the last packet - * we saw from the conversation together with a small identifier - * the transmit & receive ends of the line use to locate saved header. - */ -struct cstate { - struct cstate *cs_next; /* next most recently used state (xmit only) */ - u_short cs_hlen; /* size of hdr (receive only) */ - u_char cs_id; /* connection # associated with this state */ - u_char cs_filler; - union { - char csu_hdr[MAX_HDR]; - struct ip csu_ip; /* ip/tcp hdr from most recent packet */ - } vjcs_u; -}; -#define cs_ip vjcs_u.csu_ip -#define cs_hdr vjcs_u.csu_hdr - - -struct vjstat { - unsigned long vjs_packets; /* outbound packets */ - unsigned long vjs_compressed; /* outbound compressed packets */ - unsigned long vjs_searches; /* searches for connection state */ - unsigned long vjs_misses; /* times couldn't find conn. state */ - unsigned long vjs_uncompressedin; /* inbound uncompressed packets */ - unsigned long vjs_compressedin; /* inbound compressed packets */ - unsigned long vjs_errorin; /* inbound unknown type packets */ - unsigned long vjs_tossed; /* inbound packets tossed because of error */ -}; - -/* - * all the state data for one serial line (we need one of these per line). - */ -struct vjcompress { - struct cstate *last_cs; /* most recently used tstate */ - u_char last_recv; /* last rcvd conn. id */ - u_char last_xmit; /* last sent conn. id */ - u_short flags; - u_char maxSlotIndex; - u_char compressSlot; /* Flag indicating OK to compress slot ID. */ -#if LINK_STATS - struct vjstat stats; -#endif - struct cstate tstate[MAX_SLOTS]; /* xmit connection states */ - struct cstate rstate[MAX_SLOTS]; /* receive connection states */ -}; - -/* flag values */ -#define VJF_TOSS 1U /* tossing rcvd frames because of input err */ - -extern void vj_compress_init (struct vjcompress *comp); -extern u_int vj_compress_tcp (struct vjcompress *comp, struct pbuf *pb); -extern void vj_uncompress_err (struct vjcompress *comp); -extern int vj_uncompress_uncomp(struct pbuf *nb, struct vjcompress *comp); -extern int vj_uncompress_tcp(struct pbuf **nb, struct vjcompress *comp); - -#endif /* VJ_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/vjbsdhdr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/vjbsdhdr.h deleted file mode 100644 index a089352a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/ppp/vjbsdhdr.h +++ /dev/null @@ -1,76 +0,0 @@ -#ifndef VJBSDHDR_H -#define VJBSDHDR_H - -#include "lwip/tcp.h" - - -/* - * Structure of an internet header, naked of options. - * - * We declare ip_len and ip_off to be short, rather than u_short - * pragmatically since otherwise unsigned comparisons can result - * against negative integers quite easily, and fail in subtle ways. - */ -PACK_STRUCT_BEGIN -struct ip -{ -#if defined(NO_CHAR_BITFIELDS) - u_char ip_hl_v; /* bug in GCC for mips means the bitfield stuff will sometimes break - so we use a char for both and get round it with macro's instead... */ -#else -#if BYTE_ORDER == LITTLE_ENDIAN - unsigned ip_hl:4, /* header length */ - ip_v:4; /* version */ -#elif BYTE_ORDER == BIG_ENDIAN - unsigned ip_v:4, /* version */ - ip_hl:4; /* header length */ -#else - COMPLAIN - NO BYTE ORDER SELECTED! -#endif -#endif - u_char ip_tos; /* type of service */ - u_short ip_len; /* total length */ - u_short ip_id; /* identification */ - u_short ip_off; /* fragment offset field */ -#define IP_DF 0x4000 /* dont fragment flag */ -#define IP_MF 0x2000 /* more fragments flag */ -#define IP_OFFMASK 0x1fff /* mask for fragmenting bits */ - u_char ip_ttl; /* time to live */ - u_char ip_p; /* protocol */ - u_short ip_sum; /* checksum */ - struct in_addr ip_src,ip_dst; /* source and dest address */ -}; -PACK_STRUCT_END - -typedef u32_t tcp_seq; - -/* - * TCP header. - * Per RFC 793, September, 1981. - */ -PACK_STRUCT_BEGIN -struct tcphdr -{ - u_short th_sport; /* source port */ - u_short th_dport; /* destination port */ - tcp_seq th_seq; /* sequence number */ - tcp_seq th_ack; /* acknowledgement number */ -#if defined(NO_CHAR_BITFIELDS) - u_char th_x2_off; -#else -#if BYTE_ORDER == LITTLE_ENDIAN - unsigned th_x2:4, /* (unused) */ - th_off:4; /* data offset */ -#endif -#if BYTE_ORDER == BIG_ENDIAN - unsigned th_off:4, /* data offset */ - th_x2:4; /* (unused) */ -#endif -#endif - u_char th_flags; - u_short th_win; /* window */ - u_short th_sum; /* checksum */ - u_short th_urp; /* urgent pointer */ -}; -PACK_STRUCT_END - -#endif /* VJBSDHDR_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/slipif.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/slipif.c deleted file mode 100644 index dd8db208..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwip/src/netif/slipif.c +++ /dev/null @@ -1,213 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is built upon the file: src/arch/rtxc/netif/sioslip.c - * - * Author: Magnus Ivarsson - */ - -/* - * This is an arch independent SLIP netif. The specific serial hooks must be - * provided by another file. They are sio_open, sio_recv and sio_send - */ - -#include "netif/slipif.h" -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/pbuf.h" -#include "lwip/sys.h" -#include "lwip/stats.h" -#include "lwip/sio.h" - -#define SLIP_END 0300 -#define SLIP_ESC 0333 -#define SLIP_ESC_END 0334 -#define SLIP_ESC_ESC 0335 - -#define MAX_SIZE 1500 - -/** - * Send a pbuf doing the necessary SLIP encapsulation - * - * Uses the serial layer's sio_send() - */ -err_t -slipif_output(struct netif *netif, struct pbuf *p, struct ip_addr *ipaddr) -{ - struct pbuf *q; - u16_t i; - u8_t c; - - /* Send pbuf out on the serial I/O device. */ - sio_send(SLIP_END, netif->state); - - for (q = p; q != NULL; q = q->next) { - for (i = 0; i < q->len; i++) { - c = ((u8_t *)q->payload)[i]; - switch (c) { - case SLIP_END: - sio_send(SLIP_ESC, netif->state); - sio_send(SLIP_ESC_END, netif->state); - break; - case SLIP_ESC: - sio_send(SLIP_ESC, netif->state); - sio_send(SLIP_ESC_ESC, netif->state); - break; - default: - sio_send(c, netif->state); - break; - } - } - } - sio_send(SLIP_END, netif->state); - return 0; -} - -/** - * Handle the incoming SLIP stream character by character - * - * Poll the serial layer by calling sio_recv() - * - * @return The IP packet when SLIP_END is received - */ -static struct pbuf * -slipif_input(struct netif *netif) -{ - u8_t c; - struct pbuf *p, *q; - u16_t recved; - u16_t i; - - q = p = NULL; - recved = i = 0; - c = 0; - - while (1) { - c = sio_recv(netif->state); - switch (c) { - case SLIP_END: - if (recved > 0) { - /* Received whole packet. */ - pbuf_realloc(q, recved); - - LINK_STATS_INC(link.recv); - - LWIP_DEBUGF(SLIP_DEBUG, ("slipif: Got packet\n")); - return q; - } - break; - - case SLIP_ESC: - c = sio_recv(netif->state); - switch (c) { - case SLIP_ESC_END: - c = SLIP_END; - break; - case SLIP_ESC_ESC: - c = SLIP_ESC; - break; - } - /* FALLTHROUGH */ - - default: - if (p == NULL) { - LWIP_DEBUGF(SLIP_DEBUG, ("slipif_input: alloc\n")); - p = pbuf_alloc(PBUF_LINK, PBUF_POOL_BUFSIZE, PBUF_POOL); - - if (p == NULL) { - LINK_STATS_INC(link.drop); - LWIP_DEBUGF(SLIP_DEBUG, ("slipif_input: no new pbuf! (DROP)\n")); - } - - if (q != NULL) { - pbuf_cat(q, p); - } else { - q = p; - } - } - if (p != NULL && recved < MAX_SIZE) { - ((u8_t *)p->payload)[i] = c; - recved++; - i++; - if (i >= p->len) { - i = 0; - if (p->next != NULL && p->next->len > 0) - p = p->next; - else - p = NULL; - } - } - break; - } - - } - return NULL; -} - -/** - * The SLIP input thread. - * - * Feed the IP layer with incoming packets - */ -static void -slipif_loop(void *nf) -{ - struct pbuf *p; - struct netif *netif = (struct netif *)nf; - - while (1) { - p = slipif_input(netif); - netif->input(p, netif); - } -} - -/** - * SLIP netif initialization - * - * Call the arch specific sio_open and remember - * the opened device in the state field of the netif. - */ -err_t -slipif_init(struct netif *netif) -{ - - LWIP_DEBUGF(SLIP_DEBUG, ("slipif_init: netif->num=%"U16_F"\n", (u16_t)netif->num)); - - netif->name[0] = 's'; - netif->name[1] = 'l'; - netif->output = slipif_output; - netif->mtu = 1500; - netif->flags = NETIF_FLAG_POINTTOPOINT; - - netif->state = sio_open(netif->num); - if (!netif->state) - return ERR_IF; - - sys_thread_new(slipif_loop, netif, SLIPIF_THREAD_PRIO); - return ERR_OK; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwipopts.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwipopts.h deleted file mode 100644 index 13fd21be..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/lwipopts.h +++ /dev/null @@ -1,177 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * Modifications: Christian Walter - */ -#ifndef __LWIPOPTS_H__ -#define __LWIPOPTS_H__ - -/* ------------------------ Generic options ------------------------------- */ -#undef LWIP_NOASSERT - -#define SYS_LIGHTWEIGHT_PROT 1 -#define TCPIP_THREAD_PRIO 3 - -#define LWIP_DEBUG 1 -#define DBG_TYPES_ON ( DBG_LEVEL_WARNING | DBG_LEVEL_SEVERE | DBG_LEVEL_SERIOUS ) -#define FEC_DEBUG ( DBG_LEVEL_WARNING | DBG_ON ) - -/* ------------------------ Memory options -------------------------------- */ -/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which - lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2 - byte alignment -> define MEM_ALIGNMENT to 2. */ -#define MEM_ALIGNMENT 4 - -/* MEM_SIZE: the size of the heap memory. If the application will send -a lot of data that needs to be copied, this should be set high. */ -#define MEM_SIZE 2048 - -/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application - sends a lot of data out of ROM (or other static memory), this - should be set high. */ -#define MEMP_NUM_PBUF 16 -/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One - per active UDP "connection". */ -#define MEMP_NUM_UDP_PCB 4 -/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP - connections. */ -#define MEMP_NUM_TCP_PCB 8 -/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP - connections. */ -#define MEMP_NUM_TCP_PCB_LISTEN 8 -/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP - segments. */ -#define MEMP_NUM_TCP_SEG 16 -/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active - timeouts. */ -#define MEMP_NUM_SYS_TIMEOUT 4 - -/* The following four are used only with the sequential API and can be - set to 0 if the application only will use the raw API. */ -/* MEMP_NUM_NETBUF: the number of struct netbufs. */ -#define MEMP_NUM_NETBUF 4 -/* MEMP_NUM_NETCONN: the number of struct netconns. */ -#define MEMP_NUM_NETCONN 4 -/* MEMP_NUM_APIMSG: the number of struct api_msg, used for - communication between the TCP/IP stack and the sequential - programs. */ -#define MEMP_NUM_API_MSG 8 -/* MEMP_NUM_TCPIPMSG: the number of struct tcpip_msg, which is used - for sequential API communication and incoming packets. Used in - src/api/tcpip.c. */ -#define MEMP_NUM_TCPIP_MSG 8 - -/* ---------- Pbuf options ---------- */ -/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */ -#define PBUF_POOL_SIZE 64 - -/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */ -#define PBUF_POOL_BUFSIZE 512 - -/* PBUF_LINK_HLEN: the number of bytes that should be allocated for a - link level header. */ -#define PBUF_LINK_HLEN 14 - -/* ------------------------ TCP options ----------------------------------- */ -#define LWIP_TCP 1 -#define TCP_TTL 255 - -/* Controls if TCP should queue segments that arrive out of - order. Define to 0 if your device is low on memory. */ -#define TCP_QUEUE_OOSEQ 1 - -/* TCP Maximum segment size. */ -#define TCP_MSS 512 - -/* TCP sender buffer space (bytes). */ -#define TCP_SND_BUF 512 - -/* TCP sender buffer space (pbufs). This must be at least = 2 * - TCP_SND_BUF/TCP_MSS for things to work. */ -#define TCP_SND_QUEUELEN ( 6 * TCP_SND_BUF/TCP_MSS ) - -/* TCP receive window. */ -#define TCP_WND 512 - -/* Maximum number of retransmissions of data segments. */ -#define TCP_MAXRTX 12 - -/* Maximum number of retransmissions of SYN segments. */ -#define TCP_SYNMAXRTX 4 - -/* ------------------------ ARP options ----------------------------------- */ -#define ARP_TABLE_SIZE 10 -#define ARP_QUEUEING 1 - -/* ------------------------ IP options ------------------------------------ */ -/* Define IP_FORWARD to 1 if you wish to have the ability to forward - IP packets across network interfaces. If you are going to run lwIP - on a device with only one network interface, define this to 0. */ -#define IP_FORWARD 0 - -/* If defined to 1, IP options are allowed (but not parsed). If - defined to 0, all packets with IP options are dropped. */ -#define IP_OPTIONS 1 - -/* ------------------------ ICMP options ---------------------------------- */ -#define ICMP_TTL 255 - - -/* ------------------------ DHCP options ---------------------------------- */ -/* Define LWIP_DHCP to 1 if you want DHCP configuration of - interfaces. DHCP is not implemented in lwIP 0.5.1, however, so - turning this on does currently not work. */ -#define LWIP_DHCP 0 - -/* 1 if you want to do an ARP check on the offered address - (recommended). */ -#define DHCP_DOES_ARP_CHECK 1 - -/* ------------------------ UDP options ----------------------------------- */ -#define LWIP_UDP 1 -#define UDP_TTL 255 - -/* ------------------------ Statistics options ---------------------------- */ -#define STATS - -#ifdef STATS -#define LINK_STATS 1 -#define IP_STATS 1 -#define ICMP_STATS 1 -#define UDP_STATS 1 -#define TCP_STATS 1 -#define MEM_STATS 1 -#define MEMP_STATS 1 -#define PBUF_STATS 1 -#define SYS_STATS 1 -#endif /* STATS */ - -#define LWIP_PROVIDE_ERRNO 1 - -#endif /* __LWIPOPTS_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/m5235-ram.ld b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/m5235-ram.ld deleted file mode 100644 index a5c35941..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/m5235-ram.ld +++ /dev/null @@ -1,119 +0,0 @@ -STARTUP(system/crt0.o) -INPUT(system/vector.o) -OUTPUT_ARCH(m68k) -SEARCH_DIR(.) -GROUP(-lc -lgcc) - -__DYNAMIC = 0; - -MEMORY -{ - sdram (rwx) : ORIGIN = 0x00000000, LENGTH = 0x01000000 - sram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 - ipsbar (rwx) : ORIGIN = 0x40000000, LENGTH = 0x40000000 - flash (rwx) : ORIGIN = 0x80000000, LENGTH = 0x00080000 -} - -PROVIDE (__stack = 0x2000FFFC); - -SECTIONS -{ - .sdram : {} > sdram - .ipsbar : {} > ipsbar - .sram (NOLOAD) : { *(.vector_ram); *(.nbuf) } > sram - .flash : {} > flash - - .text : - { - __text_start = . ; - *(.vector_rom) - . = ALIGN (0x100); - *(.text) - . = ALIGN (16); - - *(.eh_frame) - . = ALIGN (16); - - *(.gnu.linkonce.t.*) - - . = ALIGN(0x4); - __CTOR_LIST__ = .; - ___CTOR_LIST__ = .; - LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) - *(.ctors) - LONG(0) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - ___DTOR_LIST__ = .; - LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) - *(.dtors) - LONG(0) - __DTOR_END__ = .; - *(.rodata) - *(.rodata.*) - *(.gcc_except_table) - - . = ALIGN(0x2); - __INIT_SECTION__ = . ; - LONG (0x4e560000) /* linkw %fp,#0 */ - *(.init) - SHORT (0x4e5e) /* unlk %fp */ - SHORT (0x4e75) /* rts */ - - __FINI_SECTION__ = . ; - LONG (0x4e560000) /* linkw %fp,#0 */ - *(.fini) - SHORT (0x4e5e) /* unlk %fp */ - SHORT (0x4e75) /* rts */ - - *(.lit) - . = ALIGN(16); - _etext = .; - etext = .; - } > sdram - - .data : - { - copy_start = .; - *(.shdata) - *(.data) - *(.gnu.linkonce.d.*) - . = ALIGN (16); - _edata = .; - copy_end = .; - } > sdram - __data_load_start = LOADADDR(.data); - __data_load_end = __data_load_start + SIZEOF(.data); - - .bss : - { - . = ALIGN(0x4); - __bss_start = . ; - *(.shbss) - *(.bss) - *(COMMON) - _end = ALIGN (0x8); - __end = _end; - } > sdram - - .stab 0 (NOLOAD) : - { - *(.stab) - } - - .stabstr 0 (NOLOAD) : - { - *(.stabstr) - } -} - -__IPSBAR = ADDR(.ipsbar); - -__SDRAM = ADDR(.sdram); -__SDRAM_SIZE = SIZEOF(.sdram); - -__SRAM = ADDR(.sram); -__SRAM_SIZE = SIZEOF(.sram); - -__FLASH = ADDR(.flash); -__FLASH_SIZE = SIZEOF(.flash); diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/m5235-rom.ld b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/m5235-rom.ld deleted file mode 100644 index 9ad0186c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/m5235-rom.ld +++ /dev/null @@ -1,121 +0,0 @@ -STARTUP(system/crt0.o) -INPUT(system/vector.o) -OUTPUT_ARCH(m68k) -SEARCH_DIR(.) -GROUP(-lc -lgcc) - -__DYNAMIC = 0; - -MEMORY -{ - flash (rwx) : ORIGIN = 0x00000000, LENGTH = 0x00200000 - sdram (rwx) : ORIGIN = 0x01000000, LENGTH = 0x01000000 - sram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 - ipsbar (rwx) : ORIGIN = 0x40000000, LENGTH = 0x40000000 -} - -PROVIDE (__stack = 0x2000FFFC); - -SECTIONS -{ - .sdram : {} > sdram - .ipsbar : {} > ipsbar - .sram (NOLOAD) : { *(.vector_ram); *(.nbuf) } > sram - .flash : {} > flash - - .text : - { - __text_start = . ; - *(.vector_rom) - . = ALIGN (0x100); - *(.text) - . = ALIGN (16); - - *(.eh_frame) - . = ALIGN (16); - - *(.gnu.linkonce.t.*) - - . = ALIGN(0x4); - __CTOR_LIST__ = .; - ___CTOR_LIST__ = .; - LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) - *(.ctors) - LONG(0) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - ___DTOR_LIST__ = .; - LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) - *(.dtors) - LONG(0) - __DTOR_END__ = .; - *(.rodata) - *(.rodata.*) - *(.gcc_except_table) - - . = ALIGN(0x2); - __INIT_SECTION__ = . ; - LONG (0x4e560000) /* linkw %fp,#0 */ - *(.init) - SHORT (0x4e5e) /* unlk %fp */ - SHORT (0x4e75) /* rts */ - - __FINI_SECTION__ = . ; - LONG (0x4e560000) /* linkw %fp,#0 */ - *(.fini) - SHORT (0x4e5e) /* unlk %fp */ - SHORT (0x4e75) /* rts */ - - *(.lit) - . = ALIGN(16); - _etext = .; - etext = .; - - } > flash - . = ALIGN(2); - - .data : AT (ADDR (.text) + SIZEOF (.text)) - { - copy_start = .; - *(.shdata) - *(.data) - *(.gnu.linkonce.d.*) - . = ALIGN (16); - _edata = .; - copy_end = .; - } > sdram - __data_load_start = LOADADDR(.data); - __data_load_end = __data_load_start + SIZEOF(.data); - - .bss : - { - . = ALIGN(0x4); - __bss_start = . ; - *(.shbss) - *(.bss) - *(COMMON) - _end = ALIGN (0x8); - __end = _end; - } > sdram - - .stab 0 (NOLOAD) : - { - *(.stab) - } - - .stabstr 0 (NOLOAD) : - { - *(.stabstr) - } -} - -__IPSBAR = ADDR(.ipsbar); - -__SDRAM = ADDR(.sdram); -__SDRAM_SIZE = SIZEOF(.sdram); - -__SRAM = ADDR(.sram); -__SRAM_SIZE = SIZEOF(.sram); - -__FLASH = ADDR(.flash); -__FLASH_SIZE = SIZEOF(.flash); diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/m5235.gdb b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/m5235.gdb deleted file mode 100644 index 545fbea3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/m5235.gdb +++ /dev/null @@ -1,134 +0,0 @@ -set $IPSBAR = 0x40000000 - -set $DCR = $IPSBAR + 0x000040 -set $DACR0 = $IPSBAR + 0x000048 -set $DMR0 = $IPSBAR + 0x00004C - -set $CSAR0 = $IPSBAR + 0x000080 -set $CSMR0 = $IPSBAR + 0x000084 -set $CSCR0 = $IPSBAR + 0x00008A - -set $PAR_SDRAM = $IPSBAR + 0x100046 -set $PAR_AD = $IPSBAR + 0x100040 - -set $WCR = $IPSBAR + 0x140000 - -define delay - set $delay = 0 - while ($delay < 20000) - set $delay += 1 - end -end - -define delay_memsync - set $delay = 0 - while ($delay < 10000) - set $delay += 1 - end -end - -define setup-cs - # 2MB FLASH on CS0 at 0x80000000 - set *(unsigned short *)$CSAR0 = 0x00008000 - set *(unsigned long *)$CSMR0 = 0x001F0101 - set *(unsigned short *)$CSCR0 = 0x00001980 -end - -define setup-sdram - # Set PAR_SDRAM to allow SDRAM signals to be enable - set *(unsigned char *)$PAR_SDRAM = 0x3F - # Set PAR_AD to allow 32-bit SDRAM if the external boot device is 16-bit - set *(unsigned char *)$PAR_AD = 0xE1 - - # SDRAM - set *(unsigned short *)$DCR = 0x0446 - set *(unsigned long *)$DACR0 = 0x00001300 - set *(unsigned long *)$DMR0 = 0x00FC0001 - - # Set IP in DACR and init precharge. - set *(unsigned long *)$DACR0 |= 0x00000008 - set *(0x00000000) = 0xAA55AA55 - delay - - # Set RE in DACR - set *(unsigned long *)$DACR0 |= 0x00008000 - # Issue IMRS - set *(unsigned long *)$DACR0 |= 0x00000040 - set *(0x00000400) = 0xAA55AA55 - delay -end - -define setup-other - # Turn Off WCR - set *(unsigned char *)$WCR = 0x00 -end - -define setup-and-load - bdm-reset - - # Set VBR to the vector table. - set $vbr = 0x00000000 - # Set internal SRAM to start at 0x20000000 - set $rambar = 0x20000001 - - setup-other - setup-cs - setup-sdram -end - -define debug-sramtest - set $srambase = 0x20000000 - set $sramsize = 0x00010000 - set $j = 0 - printf "Testing SRAM : 0x%08X - 0x%08X\n", $srambase, ($srambase + $sramsize) - set $i = $srambase - while $i < ($srambase + $sramsize) - set *(unsigned long *)($i) = 0xAA55AA55 - delay_memsync - if 0xAA55AA55 != *(unsigned long *)$i - printf " 0x%08X = FAIL\n", $i - else - printf " 0x%08X = OK", $i - if $j % 4 == 3 - printf "\n" - end - set $j = $j + 1 - end - set $i = $i + 0x400 - end -en - -define debug-ramtest - set $sdrambase = 0x00000000 - set $sdramsize = 0x01000000 - set $j = 0 - printf "Testing SDRAM : 0x%08X - 0x%08X\n", $sdrambase, ($sdrambase + $sdramsize) - set $i = $sdrambase - while $i < ($sdrambase + $sdramsize) - set *(unsigned long *)($i) = 0xAA55AA55 - delay_memsync - if 0xAA55AA55 != *(unsigned long *)$i - printf " 0x%08X = FAIL\n", $i - else - printf " 0x%08X = OK", $i - if $j % 4 == 3 - printf "\n" - end - set $j = $j + 1 - end - set $i = $i + 0x10000 - end - printf "\n" -end - -define execute - set $pc = *(long *)0x00000004 - tbreak main - tk gdbtk_update -end - -define debug-printexception - printf "vector: %d", *(unsigned short *)$sp >> 2 &0x1F - printf "old pc: 0x%08x", *(unsigned long *)($sp + 4) - printf "old sr: 0x%02x", *(unsigned short *)($sp + 2) -end diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/mbconfig.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/mbconfig.h deleted file mode 100644 index 490edda8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/mbconfig.h +++ /dev/null @@ -1,92 +0,0 @@ - /* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _MB_CONFIG_H -#define _MB_CONFIG_H - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif -/* ----------------------- Defines ------------------------------------------*/ -/*! \defgroup modbus_cfg Modbus Configuration - * - * Most modules in the protocol stack are completly optional and can be - * excluded. This is specially important if target resources are very small - * and program memory space should be saved.
- * - * All of these settings are available in the file mbconfig.h - */ -/*! \addtogroup modbus_cfg - * @{ - */ -/*! \brief If Modbus ASCII support is enabled. */ -#define MB_ASCII_ENABLED ( 0 ) -/*! \brief If Modbus RTU support is enabled. */ -#define MB_RTU_ENABLED ( 0 ) -/*! \brief If Modbus TCP support is enabled. */ -#define MB_TCP_ENABLED ( 1 ) -/*! \brief The character timeout value for Modbus ASCII. - * - * The character timeout value is not fixed for Modbus ASCII and is therefore - * a configuration option. It should be set to the maximum expected delay - * time of the network. - */ -#define MB_ASCII_TIMEOUT_SEC ( 1 ) -/*! \brief Maximum number of Modbus functions codes the protocol stack - * should support. - * - * The maximum number of supported Modbus functions must be greater than - * the sum of all enabled functions in this file and custom function - * handlers. If set to small adding more functions will fail. - */ -#define MB_FUNC_HANDLERS_MAX ( 16 ) -/*! \brief Number of bytes which should be allocated for the Report Slave ID - * command. - * - * This number limits the maximum size of the additional segment in the - * report slave id function. See eMBSetSlaveID( ) for more information on - * how to set this value. It is only used if MB_FUNC_OTHER_REP_SLAVEID_ENABLED - * is set to 1. - */ -#define MB_FUNC_OTHER_REP_SLAVEID_BUF ( 32 ) -/*! \brief If the Report Slave ID function should be enabled. */ -#define MB_FUNC_OTHER_REP_SLAVEID_ENABLED ( 1 ) -/*! \brief If the Read Input Registers function should be enabled. */ -#define MB_FUNC_READ_INPUT_ENABLED ( 1 ) -/*! \brief If the Read Holding Registers function should be enabled. */ -#define MB_FUNC_READ_HOLDING_ENABLED ( 1 ) -/*! \brief If the Write Single Register function should be enabled. */ -#define MB_FUNC_WRITE_HOLDING_ENABLED ( 1 ) -/*! \brief If the Write Multiple registers function should be enabled. */ -#define MB_FUNC_WRITE_MULTIPLE_HOLDING_ENABLED ( 1 ) -/*! \brief If the Read Coils function should be enabled. */ -#define MB_FUNC_READ_COILS_ENABLED ( 1 ) -/*! \brief If the Write Coils function should be enabled. */ -#define MB_FUNC_WRITE_COIL_ENABLED ( 1 ) -/*! \brief If the Write Multiple Coils function should be enabled. */ -#define MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED ( 1 ) -/*! \brief If the Read Discrete Inputs function should be enabled. */ -#define MB_FUNC_READ_DISCRETE_INPUTS_ENABLED ( 1 ) -/*! @} */ -#ifdef __cplusplus - PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/port.h deleted file mode 100644 index c8594080..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/port.h +++ /dev/null @@ -1,77 +0,0 @@ - /* - * FreeModbus Libary: MCF5235 Port - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -#include - -/* ----------------------- Defines ------------------------------------------*/ - -#define INLINE inline -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif -#define MB_TCP_DEBUG 1 /* Debug output in TCP module. */ -/* ----------------------- Type definitions ---------------------------------*/ -typedef char BOOL; - -typedef unsigned char UCHAR; -typedef char CHAR; - -typedef unsigned short USHORT; -typedef short SHORT; - -typedef unsigned long ULONG; -typedef long LONG; - -#ifdef MB_TCP_DEBUG -typedef enum -{ - MB_LOG_DEBUG, - MB_LOG_INFO, - MB_LOG_WARN, - MB_LOG_ERROR -} eMBPortLogLevel; -#endif - -/* ----------------------- Function prototypes ------------------------------*/ -#ifdef MB_TCP_DEBUG -void vMBPortLog( eMBPortLogLevel eLevel, const CHAR * szModule, - const CHAR * szFmt, ... ); -#endif - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/portevent.c deleted file mode 100644 index c1e8a5ba..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/portevent.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - * FreeModbus Libary: lwIP Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- lwIP ---------------------------------------------*/ -#include "lwip/api.h" -#include "lwip/sys.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_POLL_CYCLETIME 100 /* Poll cycle time is 100ms */ -/* ----------------------- Static variables ---------------------------------*/ -static sys_mbox_t xMailBox = SYS_MBOX_NULL; -static eMBEventType eMailBoxEvent; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - eMailBoxEvent = EV_READY; - xMailBox = sys_mbox_new( ); - return xMailBox != SYS_MBOX_NULL ? TRUE : FALSE; -} - -void -vMBPortEventClose( void ) -{ - if( xMailBox != SYS_MBOX_NULL ) - { - sys_mbox_free( xMailBox ); - } -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - eMailBoxEvent = eEvent; - sys_mbox_post( xMailBox, &eMailBoxEvent ); - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - void *peMailBoxEvent; - BOOL xEventHappend = FALSE; - u32_t uiTimeSpent; - - uiTimeSpent = sys_arch_mbox_fetch( xMailBox, &peMailBoxEvent, MB_POLL_CYCLETIME ); - if( uiTimeSpent != SYS_ARCH_TIMEOUT ) - { - *eEvent = *( eMBEventType * ) peMailBoxEvent; - eMailBoxEvent = EV_READY; - xEventHappend = TRUE; - } - return xEventHappend; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/portother.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/portother.c deleted file mode 100644 index de38ae94..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/portother.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * FreeModbus Libary: lwIP Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include -#include -#include -#include -#include -#include - -#include "port.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_FRAME_LOG_BUFSIZE 512 - -/* ----------------------- Start implementation -----------------------------*/ - -#ifdef MB_TCP_DEBUG -void -prvvMBTCPLogFrame( UCHAR * pucMsg, UCHAR * pucFrame, USHORT usFrameLen ) -{ - int i; - int res; - int iBufPos = 0; - size_t iBufLeft = MB_FRAME_LOG_BUFSIZE; - static CHAR arcBuffer[MB_FRAME_LOG_BUFSIZE]; - - assert( pucFrame != NULL ); - - for( i = 0; i < usFrameLen; i++ ) - { - /* Print some additional frame information. */ - switch ( i ) - { - case 0: - /* TID = Transaction Identifier. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, "| TID = " ); - break; - case 2: - /* PID = Protocol Identifier. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, " | PID = " ); - break; - case 4: - /* Length */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, " | LEN = " ); - break; - case 6: - /* UID = Unit Identifier. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, " | UID = " ); - break; - case 7: - /* MB Function Code. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, "|| FUNC = " ); - break; - case 8: - /* MB PDU rest. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, " | DATA = " ); - break; - default: - res = 0; - break; - } - if( res == -1 ) - { - break; - } - else - { - iBufPos += res; - iBufLeft -= res; - } - - /* Print the data. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, "%02X", pucFrame[i] ); - if( res == -1 ) - { - break; - } - else - { - iBufPos += res; - iBufLeft -= res; - } - } - - if( res != -1 ) - { - /* Append an end of frame string. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, " |\r\n" ); - if( res != -1 ) - { - vMBPortLog( MB_LOG_DEBUG, pucMsg, "%s", arcBuffer ); - } - } -} -#endif - -#ifdef MB_TCP_DEBUG -void -vMBPortLog( eMBPortLogLevel eLevel, const CHAR * szModule, const CHAR * szFmt, ... ) -{ - va_list args; - static const char *arszLevel2Str[] = { "DEBUG", "INFO", "WARN", "ERROR" }; - - ( void )printf( "%s: %s: ", arszLevel2Str[eLevel], szModule ); - va_start( args, szFmt ); - vprintf( szFmt, args ); - va_end( args ); -} -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/porttcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/porttcp.c deleted file mode 100644 index b6d8a86a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/port/porttcp.c +++ /dev/null @@ -1,328 +0,0 @@ -/* - * FreeModbus Libary: lwIP Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include - -#include "port.h" - -/* ----------------------- lwIP includes ------------------------------------*/ -#include "lwip/api.h" -#include "lwip/tcp.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- MBAP Header --------------------------------------*/ -#define MB_TCP_UID 6 -#define MB_TCP_LEN 4 -#define MB_TCP_FUNC 7 - -/* ----------------------- Defines -----------------------------------------*/ -#define MB_TCP_DEFAULT_PORT 502 /* TCP listening port. */ -#define MB_TCP_BUF_SIZE ( 256 + 7 ) /* Must hold a complete Modbus TCP frame. */ - -/* ----------------------- Prototypes ---------------------------------------*/ -void vMBPortEventClose( void ); -void vMBPortLog( eMBPortLogLevel eLevel, const CHAR * szModule, - const CHAR * szFmt, ... ); - -/* ----------------------- Static variables ---------------------------------*/ -static struct tcp_pcb *pxPCBListen; -static struct tcp_pcb *pxPCBClient; - -static UCHAR aucTCPBuf[MB_TCP_BUF_SIZE]; -static USHORT usTCPBufPos; - -/* ----------------------- Static functions ---------------------------------*/ -static err_t prvxMBTCPPortAccept( void *pvArg, struct tcp_pcb *pxPCB, err_t xErr ); -static err_t prvxMBTCPPortReceive( void *pvArg, struct tcp_pcb *pxPCB, struct pbuf *p, - err_t xErr ); -static void prvvMBTCPPortError( void *pvArg, err_t xErr ); - -/* ----------------------- Begin implementation -----------------------------*/ -BOOL -xMBTCPPortInit( USHORT usTCPPort ) -{ - struct tcp_pcb *pxPCBListenNew, *pxPCBListenOld; - BOOL bOkay = FALSE; - USHORT usPort; - - if( usTCPPort == 0 ) - { - usPort = MB_TCP_DEFAULT_PORT; - } - else - { - usPort = ( USHORT ) usTCPPort; - } - - if( ( pxPCBListenNew = pxPCBListenOld = tcp_new( ) ) == NULL ) - { - /* Can't create TCP socket. */ - bOkay = FALSE; - } - else if( tcp_bind( pxPCBListenNew, IP_ADDR_ANY, ( u16_t ) usPort ) != ERR_OK ) - { - /* Bind failed - Maybe illegal port value or in use. */ - ( void )tcp_close( pxPCBListenOld ); - bOkay = FALSE; - } - else if( ( pxPCBListenNew = tcp_listen( pxPCBListenNew ) ) == NULL ) - { - ( void )tcp_close( pxPCBListenOld ); - bOkay = FALSE; - } - else - { - /* Register callback function for new clients. */ - tcp_accept( pxPCBListenNew, prvxMBTCPPortAccept ); - - /* Everything okay. Set global variable. */ - pxPCBListen = pxPCBListenNew; - -#ifdef MB_TCP_DEBUG - vMBPortLog( MB_LOG_DEBUG, "MBTCP-ACCEPT", "Protocol stack ready.\r\n" ); -#endif - } - bOkay = TRUE; - return bOkay; -} - -void -prvvMBPortReleaseClient( struct tcp_pcb *pxPCB ) -{ - if( pxPCB != NULL ) - { - if( tcp_close( pxPCB ) != ERR_OK ) - { - tcp_abort( pxPCB ); - } - if( pxPCB == pxPCBClient ) - { -#ifdef MB_TCP_DEBUG - vMBPortLog( MB_LOG_DEBUG, "MBTCP-CLOSE", "Closed connection to %d.%d.%d.%d.\r\n", - ip4_addr1( &( pxPCB->remote_ip ) ), - ip4_addr2( &( pxPCB->remote_ip ) ), - ip4_addr3( &( pxPCB->remote_ip ) ), ip4_addr4( &( pxPCB->remote_ip ) ) ); -#endif - pxPCBClient = NULL; - } - if( pxPCB == pxPCBListen ) - { - pxPCBListen = NULL; - } - } -} -void -vMBTCPPortClose( ) -{ - /* Shutdown any open client sockets. */ - prvvMBPortReleaseClient( pxPCBClient ); - - /* Shutdown or listening socket. */ - prvvMBPortReleaseClient( pxPCBListen ); - - /* Release resources for the event queue. */ - vMBPortEventClose( ); -} - -void -vMBTCPPortDisable( void ) -{ - prvvMBPortReleaseClient( pxPCBClient ); -} - -err_t -prvxMBTCPPortAccept( void *pvArg, struct tcp_pcb *pxPCB, err_t xErr ) -{ - err_t error; - - if( xErr != ERR_OK ) - { - return xErr; - } - - /* We can handle only one client. */ - if( pxPCBClient == NULL ) - { - /* Register the client. */ - pxPCBClient = pxPCB; - - /* Set up the receive function prvxMBTCPPortReceive( ) to be called when data - * arrives. - */ - tcp_recv( pxPCB, prvxMBTCPPortReceive ); - - /* Register error handler. */ - tcp_err( pxPCB, prvvMBTCPPortError ); - - /* Set callback argument later used in the error handler. */ - tcp_arg( pxPCB, pxPCB ); - - /* Reset the buffers and state variables. */ - usTCPBufPos = 0; - -#ifdef MB_TCP_DEBUG - vMBPortLog( MB_LOG_DEBUG, "MBTCP-ACCEPT", "Accepted new client %d.%d.%d.%d\r\n", - ip4_addr1( &( pxPCB->remote_ip ) ), - ip4_addr2( &( pxPCB->remote_ip ) ), - ip4_addr3( &( pxPCB->remote_ip ) ), ip4_addr4( &( pxPCB->remote_ip ) ) ); -#endif - - error = ERR_OK; - } - else - { - prvvMBPortReleaseClient( pxPCB ); - error = ERR_OK; - } - return error; -} - -/* Called in case of an unrecoverable error. In any case we drop the client - * connection. */ -void -prvvMBTCPPortError( void *pvArg, err_t xErr ) -{ - struct tcp_pcb *pxPCB = pvArg; - - if( pxPCB != NULL ) - { -#ifdef MB_TCP_DEBUG - vMBPortLog( MB_LOG_DEBUG, "MBTCP-ERROR", "Error with client connection! Droping it.\r\n" ); -#endif - prvvMBPortReleaseClient( pxPCB ); - } -} - -err_t -prvxMBTCPPortReceive( void *pvArg, struct tcp_pcb *pxPCB, struct pbuf *p, err_t xErr ) -{ - USHORT usLength; - - err_t error; - - if( xErr != ERR_OK ) - { - return xErr; - } - - /* If pbuf is NULL then remote end has closed connection. */ - if( p == NULL ) - { - prvvMBPortReleaseClient( pxPCB ); - return ERR_OK; - } - - /* Acknowledge that we have received the data bytes. */ - tcp_recved( pxPCB, p->len ); - - /* Check for internal buffer overflow. In case of an error drop the - * client. */ - if( ( usTCPBufPos + p->len ) >= MB_TCP_BUF_SIZE ) - { - prvvMBPortReleaseClient( pxPCB ); - error = ERR_OK; - } - else - { - memcpy( &aucTCPBuf[usTCPBufPos], p->payload, p->len ); - usTCPBufPos += p->len; - - /* If we have received the MBAP header we can analyze it and calculate - * the number of bytes left to complete the current request. If complete - * notify the protocol stack. - */ - if( usTCPBufPos >= MB_TCP_FUNC ) - { - /* Length is a byte count of Modbus PDU (function code + data) and the - * unit identifier. */ - usLength = aucTCPBuf[MB_TCP_LEN] << 8U; - usLength |= aucTCPBuf[MB_TCP_LEN + 1]; - - /* Is the frame already complete. */ - if( usTCPBufPos < ( MB_TCP_UID + usLength ) ) - { - } - else if( usTCPBufPos == ( MB_TCP_UID + usLength ) ) - { -#ifdef MB_TCP_DEBUG - prvvMBTCPLogFrame( "MBTCP-RECV", &aucTCPBuf[0], usTCPBufPos ); -#endif - ( void )xMBPortEventPost( EV_FRAME_RECEIVED ); - } - else - { -#ifdef MB_TCP_DEBUG - vMBPortLog( MB_LOG_DEBUG, "MBTCP-ERROR", - "Received to many bytes! Droping client.\r\n" ); -#endif - /* This should not happen. We can't deal with such a client and - * drop the connection for security reasons. - */ - prvvMBPortReleaseClient( pxPCB ); - } - } - } - pbuf_free( p ); - return error; -} - -BOOL -xMBTCPPortGetRequest( UCHAR ** ppucMBTCPFrame, USHORT * usTCPLength ) -{ - *ppucMBTCPFrame = &aucTCPBuf[0]; - *usTCPLength = usTCPBufPos; - - /* Reset the buffer. */ - usTCPBufPos = 0; - return TRUE; -} - -BOOL -xMBTCPPortSendResponse( const UCHAR * pucMBTCPFrame, USHORT usTCPLength ) -{ - BOOL bFrameSent = FALSE; - - if( pxPCBClient ) - { - /* Make sure we can send the packet. */ - assert( tcp_sndbuf( pxPCBClient ) >= usTCPLength ); - - if( tcp_write( pxPCBClient, pucMBTCPFrame, ( u16_t ) usTCPLength, NETCONN_COPY ) == ERR_OK ) - { -#ifdef MB_TCP_DEBUG - prvvMBTCPLogFrame( "MBTCP-SENT", &aucTCPBuf[0], usTCPLength ); -#endif - /* Make sure data gets sent immediately. */ - ( void )tcp_output( pxPCBClient ); - bFrameSent = TRUE; - } - else - { - /* Drop the connection in case of an write error. */ - prvvMBPortReleaseClient( pxPCBClient ); - } - } - return bFrameSent; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/simple.bat b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/simple.bat deleted file mode 100644 index c4d53d22..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/simple.bat +++ /dev/null @@ -1 +0,0 @@ -..\..\tools\modpoll.exe -m tcp 10.0.10.2 -r 1000 -t 3:int diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/simple.sh b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/simple.sh deleted file mode 100644 index 1af9b7a1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/simple.sh +++ /dev/null @@ -1 +0,0 @@ -../../tools/modpoll -m tcp 10.0.10.2 -r 1000 -t 3:int diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/crt0.S b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/crt0.S deleted file mode 100644 index 21954bcb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/crt0.S +++ /dev/null @@ -1,115 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - - .title "crt0.S" - - .extern main - .extern __stack - .extern __bss_start - .extern __text_start - .extern init_main - - .equ MCF5XXX_RAMBAR_SPV, 0x00000200 - .equ MCF5XXX_RAMBAR_V, 0x00000001 - .global start - - .align 4 -debug: - .word 0x2C80 /* write to CSR */ - .word 0x0010 - .word 0x0400 - .word 0x0000 - -start: - /* disable all interrupts on startup. */ - move.w #0x2700, sr - - /* prepare internal SRAM. */ - move.l #__SRAM, d0 - ori.l #( MCF5XXX_RAMBAR_SPV | MCF5XXX_RAMBAR_V ), d0 - movec d0, rambar - - /* prepare stack and frame pointer. */ - move.l #__stack, sp - link a6, #-8 - - /* initialize hardware. */ - jsr init_main - - /* zero out the bss section. */ - move.l #__bss_start, d1 - move.l #_end, d0 - cmp.l d0, d1 - jbeq 3f - move.l d1, a0 - sub.l d1, d0 - subq.l #1, d0 -2: - clr.b (a0)+ - subq.l #1, d0 - jbpl 2b -3: - - /* Relocate the data section. */ - move.l #__data_load_start, %a0 /* .data in ROM */ - move.l #copy_start, %a1 /* .data in RAM */ - - /* Test if the two sections overlap. This is the case when we are working - * with the debugger and the debugger loads the .data section. - */ - cmpa.l %a0, %a1 - beq 2f -1: - /* Have we already copied everything. */ - cmpa.l #__data_load_end, %a0 - beq 2f - move.b (%a0)+, (%a1)+ - bra 1b - -2: - - /* C library */ - move.l #__FINI_SECTION__, -(%sp) - jsr atexit - jsr __INIT_SECTION__ - - /* call main(int argc, char *argv[] */ - move.l #0, -(sp) - move.l #0, -(sp) - move.l #0, -(sp) - jsr main - lea (sp, 12), %sp - - /* stop on exit from main. */ -1: - halt - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/init.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/init.c deleted file mode 100644 index 74957f35..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/init.c +++ /dev/null @@ -1,743 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include "mcf5xxx.h" -#include "mcf523x.h" - -/* Function prototypes */ -void init_main( void ); -static void disable_interrupts( void ); -static void disable_watchdog_timer( void ); -static void disable_cache( void ); -static void init_ipsbar( void ); -static void init_basics( void ); -static void init_clock_config( void ); -static void init_chip_selects( void ); -static void init_bus_config( void ); -static void init_cache( void ); -static void init_eport( void ); -static void init_flexcan( void ); -static void init_power_management( void ); -static void init_dma_timers( void ); -static void init_interrupt_timers( void ); -static void init_watchdog_timers( void ); -static void init_pin_assignments( void ); -static void init_sdram_controller( void ); -static void init_interrupt_controller( void ); - - -/********************************************************************* -* init_main - Main entry point for initialisation code * -**********************************************************************/ -void -init_main( void ) -{ - - /* Initialise base address of peripherals, VBR, etc */ - init_ipsbar( ); - init_basics( ); - init_clock_config( ); - - /* Disable interrupts, watchdog timer, cache */ - disable_interrupts( ); - disable_watchdog_timer( ); - disable_cache( ); - - /* Initialise individual modules */ - init_chip_selects( ); - init_bus_config( ); - init_cache( ); - init_eport( ); - init_flexcan( ); - init_power_management( ); - init_dma_timers( ); - init_interrupt_timers( ); - init_watchdog_timers( ); - init_pin_assignments( ); - init_sdram_controller( ); - - /* Initialise interrupt controller */ - init_interrupt_controller( ); -} - -/********************************************************************* -* disable_interrupts - Disable all interrupt sources * -**********************************************************************/ -static void -disable_interrupts( void ) -{ - vuint8 *p; - int i; - - - /* Set ICR008-ICR063 to 0x0 */ - p = ( vuint8 * ) & MCF_INTC0_ICR8; - for( i = 8; i <= 63; i++ ) - *p++ = 0x0; - - /* Set ICR108-ICR163 to 0x0 */ - p = ( vuint8 * ) & MCF_INTC1_ICR8; - for( i = 108; i <= 163; i++ ) - *p++ = 0x0; -} - - -/********************************************************************* -* disable_watchdog_timer - Disable system watchdog timer * -**********************************************************************/ -static void -disable_watchdog_timer( void ) -{ - - /* Disable Core Watchdog Timer */ - MCF_SCM_CWCR = 0; -} - -/********************************************************************* -* disable_cache - Disable and invalidate cache * -**********************************************************************/ -static void -disable_cache( void ) -{ - asm ( "move.l #0x01000000, %d0" ); - asm ( "movec %d0, %CACR" ); -} - -/********************************************************************* -* init_basics - Configuration Information & VBR * -**********************************************************************/ -static void -init_basics( void ) -{ - int i; - extern uint32 __RAMVEC[]; - extern uint32 __ROMVEC[]; - - /* Transfer size not driven on SIZ[1:0] pins during external cycles - Processor Status (PST) and Debug Data (DDATA) functions disabled - Bus monitor disabled - Output pads configured for full strength - */ - MCF_CCM_CCR = ( 0x1 << 15 ) | MCF_CCM_CCR_BME; - - /* Set up RAM vectors */ - for( i = 0; i < 256; i++ ) - - { - __RAMVEC[i] = __ROMVEC[i]; - } - asm( "move.l %0,%%d0": :"i"( __RAMVEC ) ); - asm( "movec %d0,%vbr" ); -} - - -/********************************************************************* -* init_clock_config - Clock Module * -**********************************************************************/ -static void -init_clock_config( void ) -{ - /* Clock module uses normal PLL mode with 25.0000 MHz external reference (Fref) - MFD = 0, RFD = 1 - Bus clock frequency = 25.00 MHz - Processor clock frequency = 2 x bus clock = 50.00 MHz - Frequency Modulation disabled - Loss of clock detection disabled - Reset/Interrupt on loss of lock disabled - */ - MCF_FMPLL_SYNCR = 0x00100000; /* Set RFD=RFD+1 to avoid frequency overshoot */ - while( ( MCF_FMPLL_SYNSR & 0x08 ) == 0 ) /* Wait for PLL to lock */ - ; - MCF_FMPLL_SYNCR = 0x00080000; /* Set desired RFD */ - while( ( MCF_FMPLL_SYNSR & 0x08 ) == 0 ) /* Wait for PLL to lock */ - ; -} - - -/********************************************************************* -* init_ipsbar - Internal Peripheral System Base Address (IPSBAR) * -**********************************************************************/ -static void -init_ipsbar( void ) -{ - extern int __SRAM; - - /* Base address of internal peripherals (IPSBAR) = 0x40000000 - - Note: Processor powers up with IPS base address = 0x40000000 - Write to IPS base + 0x00000000 to set new value - */ - *( vuint32 * ) 0x40000000 = ( vuint32 ) __IPSBAR + 1; - - /* Configure RAMBAR in SCM module and allow dual-ported access. */ - MCF_SCM_RAMBAR = ( uint32 ) &__SRAM | MCF_SCM_RAMBAR_BDE; -} - -/********************************************************************* -* init_chip_selects - Chip Select Module * -**********************************************************************/ -static void -init_chip_selects( void ) -{ - extern void __FLASH; - uint32 FLASH_ADDR = (uint32)&__FLASH; - - /* Chip Select 0 - External Flash */ - MCF_CS_CSAR0 = MCF_CS_CSAR_BA( FLASH_ADDR ); - MCF_CS_CSCR0 = ( 0 - | MCF_CS_CSCR_IWS( 6 ) - | MCF_CS_CSCR_AA | MCF_CS_CSCR_PS_16 ); - MCF_CS_CSMR0 = MCF_CS_CSMR_BAM_2M | MCF_CS_CSMR_V; - - /* Chip Select 1 disabled (CSMR1[V] = 0) */ - MCF_CS_CSAR1 = 0; - MCF_CS_CSMR1 = 0; - MCF_CS_CSCR1 = 0; - - /* Chip Select 2 disabled (CSMR2[V] = 0) */ - MCF_CS_CSAR2 = 0; - MCF_CS_CSMR2 = 0; - MCF_CS_CSCR2 = 0; - - /* Chip Select 3 disabled (CSMR3[V] = 0) */ - MCF_CS_CSAR3 = 0; - MCF_CS_CSMR3 = 0; - MCF_CS_CSCR3 = 0; - - /* Chip Select 4 disabled (CSMR4[V] = 0) */ - MCF_CS_CSAR4 = 0; - MCF_CS_CSMR4 = 0; - MCF_CS_CSCR4 = 0; - - /* Chip Select 5 disabled (CSMR5[V] = 0) */ - MCF_CS_CSAR5 = 0; - MCF_CS_CSMR5 = 0; - MCF_CS_CSCR5 = 0; - - /* Chip Select 6 disabled (CSMR6[V] = 0) */ - MCF_CS_CSAR6 = 0; - MCF_CS_CSMR6 = 0; - MCF_CS_CSCR6 = 0; - - /* Chip Select 7 disabled (CSMR7[V] = 0) */ - MCF_CS_CSAR7 = 0; - MCF_CS_CSMR7 = 0; - MCF_CS_CSCR7 = 0; -} - -/********************************************************************* -* init_bus_config - Internal Bus Arbitration * -**********************************************************************/ -static void -init_bus_config( void ) -{ - - /* Use round robin arbitration scheme - Assigned priorities (highest first): - Ethernet - DMA Controller - ColdFire Core - DMA bandwidth control disabled - Park on last active bus master - */ - MCF_SCM_MPARK = - MCF_SCM_MPARK_M3_PRTY( 0x3 ) | MCF_SCM_MPARK_M2_PRTY( 0x2 ) | - MCF_SCM_MPARK_M1_PRTY( 0x1 ); -} - -/********************************************************************* -* init_cache - Instruction/Data Cache * -**********************************************************************/ -static void -init_cache( void ) -{ - /* Configured as split cache: 4 KByte instruction cache and 4 Kbyte data cache - ACR0: Don't cache accesses to 16 MB memory region at address $20000000 - ACR1: Don't cache accesses to 1 GB memory region at address $40000000 - CACR: Cache accesses to the rest of memory - */ - asm("move.l #0x80000000,%d0"); - asm("movec %d0,%CACR"); - asm("move.l #0x2000c040,%d0"); - asm("movec %d0,%ACR0"); - asm("move.l #0x403fc040,%d0"); - asm("movec %d0,%ACR1"); - - /* Instruction/Data cache disabled. */ - //asm( "move.l #0x00000000, %d0" ); - //asm( "movec %d0,%cacr" ); -} - -/********************************************************************* -* init_eport - Edge Port Module (EPORT) * -**********************************************************************/ -static void -init_eport( void ) -{ - - /* Pins 1-7 configured as GPIO inputs */ - MCF_EPORT_EPPAR = 0; - MCF_EPORT_EPDDR = 0; - MCF_EPORT_EPIER = 0; -} - -/********************************************************************* -* init_flexcan - FlexCAN Module * -**********************************************************************/ -static void -init_flexcan( void ) -{ - - /* FlexCAN controller 0 disabled (CANMCR0[MDIS]=1) */ - MCF_CAN_IMASK0 = 0; - MCF_CAN_RXGMASK0 = MCF_CAN_RXGMASK_MI( 0x1fffffff ); - MCF_CAN_RX14MASK0 = MCF_CAN_RX14MASK_MI( 0x1fffffff ); - MCF_CAN_RX15MASK0 = MCF_CAN_RX15MASK_MI( 0x1fffffff ); - MCF_CAN_CANCTRL0 = 0; - MCF_CAN_CANMCR0 = - MCF_CAN_CANMCR_MDIS | MCF_CAN_CANMCR_FRZ | MCF_CAN_CANMCR_HALT | - MCF_CAN_CANMCR_SUPV | MCF_CAN_CANMCR_MAXMB( 0xf ); - - /* FlexCAN controller 1 disabled (CANMCR1[MDIS]=1) */ - MCF_CAN_IMASK1 = 0; - MCF_CAN_RXGMASK1 = MCF_CAN_RXGMASK_MI( 0x1fffffff ); - MCF_CAN_RX14MASK1 = MCF_CAN_RX14MASK_MI( 0x1fffffff ); - MCF_CAN_RX15MASK1 = MCF_CAN_RX15MASK_MI( 0x1fffffff ); - MCF_CAN_CANCTRL1 = 0; - MCF_CAN_CANMCR1 = - MCF_CAN_CANMCR_MDIS | MCF_CAN_CANMCR_FRZ | MCF_CAN_CANMCR_HALT | - MCF_CAN_CANMCR_SUPV | MCF_CAN_CANMCR_MAXMB( 0xf ); -} - -/********************************************************************* -* init_power_management - Power Management * -**********************************************************************/ -static void -init_power_management( void ) -{ - - /* On executing STOP instruction, processor enters RUN mode - Mode is exited when an interrupt of level 1 or higher is received - */ - MCF_SCM_LPICR = MCF_SCM_LPICR_ENBSTOP; - MCF_CCM_LPCR = 0; -} - -/********************************************************************* -* init_sdram_controller - SDRAM Controller * -**********************************************************************/ -static void -init_sdram_controller( void ) -{ - extern void __SDRAM; - uint32 SDRAM_ADDR = (uint32)&__SDRAM; - int i; - - - /* - * Check to see if the SDRAM has already been initialized - * by a run control tool - */ - if( !( MCF_SDRAMC_DACR0 & MCF_SDRAMC_DACR0_RE ) ) - { - /* Initialize DRAM Control Register: DCR */ - MCF_SDRAMC_DCR = ( MCF_SDRAMC_DCR_RTIM( 1 ) | - MCF_SDRAMC_DCR_RC( ( 15 * FSYS_2 ) >> 4 ) ); - - /* Initialize DACR0 */ - MCF_SDRAMC_DACR0 = ( MCF_SDRAMC_DACR0_BA( SDRAM_ADDR >> 18UL ) | - MCF_SDRAMC_DACR0_CASL( 1 ) | - MCF_SDRAMC_DACR0_CBM( 3 ) | - MCF_SDRAMC_DACR0_PS( 0 ) ); - - /* Initialize DMR0 */ - MCF_SDRAMC_DMR0 = ( MCF_SDRAMC_DMR_BAM_16M | MCF_SDRAMC_DMR0_V ); - - /* Set IP (bit 3) in DACR */ - MCF_SDRAMC_DACR0 |= MCF_SDRAMC_DACR0_IP; - - /* Wait 30ns to allow banks to precharge */ - for( i = 0; i < 5; i++ ) - { - asm volatile ( " nop" ); - } - /* Write to this block to initiate precharge */ - *( uint32 * ) ( SDRAM_ADDR ) = 0xA5A59696; - - /* Set RE (bit 15) in DACR */ - MCF_SDRAMC_DACR0 |= MCF_SDRAMC_DACR0_RE; - - /* Wait for at least 8 auto refresh cycles to occur */ - for( i = 0; i < 2000; i++ ) - { - asm volatile ( "nop" ); - } - /* Finish the configuration by issuing the IMRS. */ - MCF_SDRAMC_DACR0 |= MCF_SDRAMC_DACR0_MRS; - - /* Write to the SDRAM Mode Register */ - *( uint32 * ) ( SDRAM_ADDR + 0x400 ) = 0xA5A59696; - } -} - -/********************************************************************* -* init_dma_timers - DMA Timer Modules * -**********************************************************************/ -static void -init_dma_timers( void ) -{ - - /* DMA Timer 0 disabled (DTMR0[RST] = 0) */ - MCF_TIMER_DTMR0 = 0; - MCF_TIMER_DTXMR0 = 0; - MCF_TIMER_DTRR0 = 0xffffffff; - - /* DMA Timer 1 disabled (DTMR1[RST] = 0) */ - MCF_TIMER_DTMR1 = 0; - MCF_TIMER_DTXMR1 = 0; - MCF_TIMER_DTRR1 = 0xffffffff; - - /* DMA Timer 2 disabled (DTMR2[RST] = 0) */ - MCF_TIMER_DTMR2 = 0; - MCF_TIMER_DTXMR2 = 0; - MCF_TIMER_DTRR2 = 0xffffffff; - - /* DMA Timer 3 disabled (DTMR3[RST] = 0) */ - MCF_TIMER_DTMR3 = 0; - MCF_TIMER_DTXMR3 = 0; - MCF_TIMER_DTRR3 = 0xffffffff; -} - -/********************************************************************** -* init_interrupt_timers - Programmable Interrupt Timer (PIT) Modules * -***********************************************************************/ -static void -init_interrupt_timers( void ) -{ - - /* PIT0 disabled (PCSR0[EN]=0) */ - MCF_PIT_PCSR0 = 0; - - /* PIT1 disabled (PCSR1[EN]=0) */ - MCF_PIT_PCSR1 = 0; - - /* PIT2 disabled (PCSR2[EN]=0) */ - MCF_PIT_PCSR2 = 0; - - /* PIT3 disabled (PCSR3[EN]=0) */ - MCF_PIT_PCSR3 = 0; -} - -/********************************************************************* -* init_watchdog_timers - Watchdog Timer Modules * -**********************************************************************/ -static void -init_watchdog_timers( void ) -{ - - /* Watchdog Timer disabled (WCR[EN]=0) - NOTE: WCR and WMR cannot be written again until after the - processor is reset. - */ - MCF_WTM_WCR = MCF_WTM_WCR_WAIT | MCF_WTM_WCR_DOZE | MCF_WTM_WCR_HALTED; - MCF_WTM_WMR = 0xffff; - - /* Core Watchdog Timer disabled (CWCR[CWE]=0) */ - MCF_SCM_CWCR = 0; -} - -/********************************************************************* -* init_interrupt_controller - Interrupt Controller * -**********************************************************************/ -static void -init_interrupt_controller( void ) -{ - - /* Configured interrupt sources in order of priority... - Level 7: External interrupt /IRQ7, (initially masked) - Level 6: External interrupt /IRQ6, (initially masked) - Level 5: External interrupt /IRQ5, (initially masked) - Level 4: External interrupt /IRQ4, (initially masked) - Level 3: External interrupt /IRQ3, (initially masked) - Level 2: External interrupt /IRQ2, (initially masked) - Level 1: External interrupt /IRQ1, (initially masked) - */ - MCF_INTC0_ICR1 = 0; - MCF_INTC0_ICR2 = 0; - MCF_INTC0_ICR3 = 0; - MCF_INTC0_ICR4 = 0; - MCF_INTC0_ICR5 = 0; - MCF_INTC0_ICR6 = 0; - MCF_INTC0_ICR7 = 0; - MCF_INTC0_ICR8 = 0; - MCF_INTC0_ICR9 = 0; - MCF_INTC0_ICR10 = 0; - MCF_INTC0_ICR11 = 0; - MCF_INTC0_ICR12 = 0; - MCF_INTC0_ICR13 = 0; - MCF_INTC0_ICR14 = 0; - MCF_INTC0_ICR15 = 0; - MCF_INTC0_ICR17 = 0; - MCF_INTC0_ICR18 = 0; - MCF_INTC0_ICR19 = 0; - MCF_INTC0_ICR20 = 0; - MCF_INTC0_ICR21 = 0; - MCF_INTC0_ICR22 = 0; - MCF_INTC0_ICR23 = 0; - MCF_INTC0_ICR24 = 0; - MCF_INTC0_ICR25 = 0; - MCF_INTC0_ICR26 = 0; - MCF_INTC0_ICR27 = 0; - MCF_INTC0_ICR28 = 0; - MCF_INTC0_ICR29 = 0; - MCF_INTC0_ICR30 = 0; - MCF_INTC0_ICR31 = 0; - MCF_INTC0_ICR32 = 0; - MCF_INTC0_ICR33 = 0; - MCF_INTC0_ICR34 = 0; - MCF_INTC0_ICR35 = 0; - MCF_INTC0_ICR36 = 0; - MCF_INTC0_ICR37 = 0; - MCF_INTC0_ICR38 = 0; - MCF_INTC0_ICR39 = 0; - MCF_INTC0_ICR40 = 0; - MCF_INTC0_ICR41 = 0; - MCF_INTC0_ICR42 = 0; - MCF_INTC0_ICR43 = 0; - MCF_INTC0_ICR44 = 0; - MCF_INTC0_ICR45 = 0; - MCF_INTC0_ICR46 = 0; - MCF_INTC0_ICR47 = 0; - MCF_INTC0_ICR48 = 0; - MCF_INTC0_ICR49 = 0; - MCF_INTC0_ICR50 = 0; - MCF_INTC0_ICR51 = 0; - MCF_INTC0_ICR52 = 0; - MCF_INTC0_ICR53 = 0; - MCF_INTC0_ICR54 = 0; - MCF_INTC0_ICR55 = 0; - MCF_INTC0_ICR56 = 0; - MCF_INTC0_ICR57 = 0; - MCF_INTC0_ICR58 = 0; - MCF_INTC0_ICR59 = 0; - MCF_INTC0_ICR60 = 0; - MCF_INTC1_ICR8 = 0; - MCF_INTC1_ICR9 = 0; - MCF_INTC1_ICR10 = 0; - MCF_INTC1_ICR11 = 0; - MCF_INTC1_ICR12 = 0; - MCF_INTC1_ICR13 = 0; - MCF_INTC1_ICR14 = 0; - MCF_INTC1_ICR15 = 0; - MCF_INTC1_ICR16 = 0; - MCF_INTC1_ICR17 = 0; - MCF_INTC1_ICR18 = 0; - MCF_INTC1_ICR19 = 0; - MCF_INTC1_ICR20 = 0; - MCF_INTC1_ICR21 = 0; - MCF_INTC1_ICR22 = 0; - MCF_INTC1_ICR23 = 0; - MCF_INTC1_ICR24 = 0; - MCF_INTC1_ICR25 = 0; - MCF_INTC1_ICR27 = 0; - MCF_INTC1_ICR28 = 0; - MCF_INTC1_ICR29 = 0; - MCF_INTC1_ICR30 = 0; - MCF_INTC1_ICR31 = 0; - MCF_INTC1_ICR32 = 0; - MCF_INTC1_ICR33 = 0; - MCF_INTC1_ICR34 = 0; - MCF_INTC1_ICR35 = 0; - MCF_INTC1_ICR36 = 0; - MCF_INTC1_ICR37 = 0; - MCF_INTC1_ICR38 = 0; - MCF_INTC1_ICR39 = 0; - MCF_INTC1_ICR40 = 0; - MCF_INTC1_ICR41 = 0; - MCF_INTC1_ICR42 = 0; - MCF_INTC1_ICR59 = 0; - MCF_INTC0_IMRH = 0xffffffff; - MCF_INTC0_IMRL = - MCF_INTC0_IMRL_INT_MASK31 | MCF_INTC0_IMRL_INT_MASK30 | - MCF_INTC0_IMRL_INT_MASK29 | MCF_INTC0_IMRL_INT_MASK28 | - MCF_INTC0_IMRL_INT_MASK27 | MCF_INTC0_IMRL_INT_MASK26 | - MCF_INTC0_IMRL_INT_MASK25 | MCF_INTC0_IMRL_INT_MASK24 | - MCF_INTC0_IMRL_INT_MASK23 | MCF_INTC0_IMRL_INT_MASK22 | - MCF_INTC0_IMRL_INT_MASK21 | MCF_INTC0_IMRL_INT_MASK20 | - MCF_INTC0_IMRL_INT_MASK19 | MCF_INTC0_IMRL_INT_MASK18 | - MCF_INTC0_IMRL_INT_MASK17 | MCF_INTC0_IMRL_INT_MASK16 | - MCF_INTC0_IMRL_INT_MASK15 | MCF_INTC0_IMRL_INT_MASK14 | - MCF_INTC0_IMRL_INT_MASK13 | MCF_INTC0_IMRL_INT_MASK12 | - MCF_INTC0_IMRL_INT_MASK11 | MCF_INTC0_IMRL_INT_MASK10 | - MCF_INTC0_IMRL_INT_MASK9 | MCF_INTC0_IMRL_INT_MASK8 | - MCF_INTC0_IMRL_INT_MASK7 | MCF_INTC0_IMRL_INT_MASK6 | - MCF_INTC0_IMRL_INT_MASK5 | MCF_INTC0_IMRL_INT_MASK4 | - MCF_INTC0_IMRL_INT_MASK3 | MCF_INTC0_IMRL_INT_MASK2 | - MCF_INTC0_IMRL_INT_MASK1; - MCF_INTC1_IMRH = 0xffffffff; - MCF_INTC1_IMRL = - MCF_INTC1_IMRL_INT_MASK31 | MCF_INTC1_IMRL_INT_MASK30 | - MCF_INTC1_IMRL_INT_MASK29 | MCF_INTC1_IMRL_INT_MASK28 | - MCF_INTC1_IMRL_INT_MASK27 | MCF_INTC1_IMRL_INT_MASK26 | - MCF_INTC1_IMRL_INT_MASK25 | MCF_INTC1_IMRL_INT_MASK24 | - MCF_INTC1_IMRL_INT_MASK23 | MCF_INTC1_IMRL_INT_MASK22 | - MCF_INTC1_IMRL_INT_MASK21 | MCF_INTC1_IMRL_INT_MASK20 | - MCF_INTC1_IMRL_INT_MASK19 | MCF_INTC1_IMRL_INT_MASK18 | - MCF_INTC1_IMRL_INT_MASK17 | MCF_INTC1_IMRL_INT_MASK16 | - MCF_INTC1_IMRL_INT_MASK15 | MCF_INTC1_IMRL_INT_MASK14 | - MCF_INTC1_IMRL_INT_MASK13 | MCF_INTC1_IMRL_INT_MASK12 | - MCF_INTC1_IMRL_INT_MASK11 | MCF_INTC1_IMRL_INT_MASK10 | - MCF_INTC1_IMRL_INT_MASK9 | MCF_INTC1_IMRL_INT_MASK8 | - MCF_INTC1_IMRL_INT_MASK7 | MCF_INTC1_IMRL_INT_MASK6 | - MCF_INTC1_IMRL_INT_MASK5 | MCF_INTC1_IMRL_INT_MASK4 | - MCF_INTC1_IMRL_INT_MASK3 | MCF_INTC1_IMRL_INT_MASK2 | - MCF_INTC1_IMRL_INT_MASK1; -} - -/********************************************************************* -* init_pin_assignments - Pin Assignment and General Purpose I/O * -**********************************************************************/ -static void -init_pin_assignments( void ) -{ - - /* Pin assignments for port ADDR - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_APDDR = 0; - MCF_GPIO_PAR_AD = MCF_GPIO_PAR_AD_PAR_ADDR23 - | MCF_GPIO_PAR_AD_PAR_ADDR22 - | MCF_GPIO_PAR_AD_PAR_ADDR21 | MCF_GPIO_PAR_AD_PAR_DATAL; - - /* Pin assignments for ports DATAH and DATAL - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_DATAH = 0; - MCF_GPIO_PDDR_DATAL = 0; - - /* Pin assignments for port BUSCTL - Pin /OE : External bus output enable, /OE - Pin /TA : External bus transfer acknowledge, /TA - Pin /TEA : External bus transfer error acknowledge, /TEA - Pin R/W : External bus read/write indication, R/W - Pin TSIZ1 : External bus transfer size TSIZ1 or DMA acknowledge /DACK1 - Pin TSIZ0 : External bus transfer size TSIZ0 or DMA acknowledge /DACK0 - Pin /TS : External bus transfer start, /TS - Pin /TIP : External bus transfer in progess, /TIP - */ - MCF_GPIO_PDDR_BUSCTL = 0; - MCF_GPIO_PAR_BUSCTL = - MCF_GPIO_PAR_BUSCTL_PAR_OE | MCF_GPIO_PAR_BUSCTL_PAR_TA | - MCF_GPIO_PAR_BUSCTL_PAR_TEA( 0x3 ) | MCF_GPIO_PAR_BUSCTL_PAR_RWB | - MCF_GPIO_PAR_BUSCTL_PAR_TSIZ1 | MCF_GPIO_PAR_BUSCTL_PAR_TSIZ0 | - MCF_GPIO_PAR_BUSCTL_PAR_TS( 0x3 ) | - MCF_GPIO_PAR_BUSCTL_PAR_TIP( 0x3 ); - - /* Pin assignments for port BS - Pin /BS3 : External byte strobe /BS3 - Pin /BS2 : External byte strobe /BS2 - Pin /BS1 : External byte strobe /BS1 - Pin /BS0 : External byte strobe /BS0 - */ - MCF_GPIO_PDDR_BS = 0; - MCF_GPIO_PAR_BS = - MCF_GPIO_PAR_BS_PAR_BS3 | MCF_GPIO_PAR_BS_PAR_BS2 | - MCF_GPIO_PAR_BS_PAR_BS1 | MCF_GPIO_PAR_BS_PAR_BS0; - - /* Pin assignments for port CS - Pin /CS7 : Chip select /CS7 - Pin /CS6 : Chip select /CS6 - Pin /CS5 : Chip select /CS5 - Pin /CS4 : Chip select /CS4 - Pin /CS3 : Chip select /CS3 - Pin /CS2 : Chip select /CS2 - Pin /CS1 : Chip select /CS1 - */ - MCF_GPIO_PDDR_CS = 0; - MCF_GPIO_PAR_CS = - MCF_GPIO_PAR_CS_PAR_CS7 | MCF_GPIO_PAR_CS_PAR_CS6 | - MCF_GPIO_PAR_CS_PAR_CS5 | MCF_GPIO_PAR_CS_PAR_CS4 | - MCF_GPIO_PAR_CS_PAR_CS3 | MCF_GPIO_PAR_CS_PAR_CS2 | - MCF_GPIO_PAR_CS_PAR_CS1; - - /* Pin assignments for port SDRAM - Pin /SD_WE : SDRAM controller /SD_WE - Pin /SD_SCAS : SDRAM controller /SD_SCAS - Pin /SD_SRAS : SDRAM controller /SD_SRAS - Pin /SD_SCKE : SDRAM controller /SD_SCKE - Pin /SD_CS1 : SDRAM controller /SD_CS1 - Pin /SD_CS0 : SDRAM controller /SD_CS0 - */ - MCF_GPIO_PDDR_SDRAM = 0; - MCF_GPIO_PAR_SDRAM = - MCF_GPIO_PAR_SDRAM_PAR_SDWE | MCF_GPIO_PAR_SDRAM_PAR_SCAS | - MCF_GPIO_PAR_SDRAM_PAR_SRAS | MCF_GPIO_PAR_SDRAM_PAR_SCKE | - MCF_GPIO_PAR_SDRAM_PAR_SDCS1 | MCF_GPIO_PAR_SDRAM_PAR_SDCS0; - - /* Pin assignments for port FECI2C - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_FECI2C = 0; - MCF_GPIO_PAR_FECI2C = - MCF_GPIO_PAR_FECI2C_PAR_EMDC_FEC | MCF_GPIO_PAR_FECI2C_PAR_EMDIO_FEC; - - /* Pin assignments for port UARTL - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_UARTL = 0; - MCF_GPIO_PAR_UART = 0; - - /* Pin assignments for port UARTH - Pin U2TXD : GPIO input - Pin U2RXD : GPIO input - Pin /IRQ2 : Interrupt request /IRQ2 or GPIO - */ - MCF_GPIO_PDDR_UARTH = 0; - - /* Pin assignments for port QSPI - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_QSPI = 0; - MCF_GPIO_PAR_QSPI = 0; - - /* Pin assignments for port TIMER - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_TIMER = 0; - MCF_GPIO_PAR_TIMER = 0; - - /* Pin assignments for port ETPU - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_ETPU = 0; - MCF_GPIO_PAR_ETPU = 0; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/mcf5xxx.S b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/mcf5xxx.S deleted file mode 100644 index 5902abab..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/mcf5xxx.S +++ /dev/null @@ -1,271 +0,0 @@ -/* - * File: mcf5xxx.s - * Purpose: Lowest level routines for all ColdFire processors. -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - - .global asm_set_ipl - .global _asm_set_ipl - .global mcf5xxx_wr_cacr - .global _mcf5xxx_wr_cacr - .global mcf5xxx_wr_acr0 - .global _mcf5xxx_wr_acr0 - .global mcf5xxx_wr_acr1 - .global _mcf5xxx_wr_acr1 - .global mcf5xxx_wr_acr2 - .global _mcf5xxx_wr_acr2 - .global mcf5xxx_wr_acr3 - .global _mcf5xxx_wr_acr3 - .global mcf5xxx_wr_other_sp - .global _mcf5xxx_wr_other_sp - .global mcf5xxx_wr_other_a7 - .global _mcf5xxx_wr_other_a7 - .global mcf5xxx_wr_vbr - .global _mcf5xxx_wr_vbr - .global mcf5xxx_wr_macsr - .global _mcf5xxx_wr_macsr - .global mcf5xxx_wr_mask - .global _mcf5xxx_wr_mask - .global mcf5xxx_wr_acc0 - .global _mcf5xxx_wr_acc0 - .global mcf5xxx_wr_accext01 - .global _mcf5xxx_wr_accext01 - .global mcf5xxx_wr_accext23 - .global _mcf5xxx_wr_accext23 - .global mcf5xxx_wr_acc1 - .global _mcf5xxx_wr_acc1 - .global mcf5xxx_wr_acc2 - .global _mcf5xxx_wr_acc2 - .global mcf5xxx_wr_acc3 - .global _mcf5xxx_wr_acc3 - .global mcf5xxx_wr_sr - .global _mcf5xxx_wr_sr - .global mcf5xxx_wr_rambar0 - .global _mcf5xxx_wr_rambar0 - .global mcf5xxx_wr_rambar1 - .global _mcf5xxx_wr_rambar1 - .global mcf5xxx_wr_mbar - .global _mcf5xxx_wr_mbar - .global mcf5xxx_wr_mbar0 - .global _mcf5xxx_wr_mbar0 - .global mcf5xxx_wr_mbar1 - .global _mcf5xxx_wr_mbar1 - - .text - -/********************************************************************/ -/* - * This routines changes the IPL to the value passed into the routine. - * It also returns the old IPL value back. - * Calling convention from C: - * old_ipl = asm_set_ipl(new_ipl); - * For the Diab Data C compiler, it passes return value thru D0. - * Note that only the least significant three bits of the passed - * value are used. - */ - -asm_set_ipl: -_asm_set_ipl: - link a6,#-8 - movem.l d6-d7,(sp) - - move.w sr,d7 /* current sr */ - - move.l d7,d0 /* prepare return value */ - andi.l #0x0700,d0 /* mask out IPL */ - lsr.l #8,d0 /* IPL */ - - move.l 8(a6),d6 /* get argument */ - andi.l #0x07,d6 /* least significant three bits */ - lsl.l #8,d6 /* move over to make mask */ - - andi.l #0x0000F8FF,d7 /* zero out current IPL */ - or.l d6,d7 /* place new IPL in sr */ - move.w d7,sr - - movem.l (sp),d6-d7 - lea 8(sp),sp - unlk a6 - rts - -/********************************************************************/ -/* - * These routines write to the special purpose registers in the ColdFire - * core. Since these registers are write-only in the supervisor model, - * no corresponding read routines exist. - */ - -mcf5xxx_wr_cacr: -_mcf5xxx_wr_cacr: - move.l 4(sp),d0 - .long 0x4e7b0002 /* movec d0,cacr */ - nop - rts - -mcf5xxx_wr_acr0: -_mcf5xxx_wr_acr0: - move.l 4(sp),d0 - .long 0x4e7b0004 /* movec d0,ACR0 */ - nop - rts - -mcf5xxx_wr_acr1: -_mcf5xxx_wr_acr1: - move.l 4(sp),d0 - .long 0x4e7b0005 /* movec d0,ACR1 */ - nop - rts - -mcf5xxx_wr_acr2: -_mcf5xxx_wr_acr2: - move.l 4(sp),d0 - .long 0x4e7b0006 /* movec d0,ACR2 */ - nop - rts - -mcf5xxx_wr_acr3: -_mcf5xxx_wr_acr3: - move.l 4(sp),d0 - .long 0x4e7b0007 /* movec d0,ACR3 */ - nop - rts - -mcf5xxx_wr_other_sp: -_mcf5xxx_wr_other_sp: -mcf5xxx_wr_other_a7: -_mcf5xxx_wr_other_a7: - move.l 4(sp),d0 - .long 0x4e7b0800 /* movec d0,OTHER_A7 */ - nop - rts - -mcf5xxx_wr_vbr: -_mcf5xxx_wr_vbr: - move.l 4(sp),d0 - .long 0x4e7b0801 /* movec d0,VBR */ - nop - rts - -mcf5xxx_wr_macsr: -_mcf5xxx_wr_macsr: - move.l 4(sp),d0 - .long 0x4e7b0804 /* movec d0,MACSR */ - nop - rts - -mcf5xxx_wr_mask: -_mcf5xxx_wr_mask: - move.l 4(sp),d0 - .long 0x4e7b0805 /* movec d0,MASK */ - nop - rts - -mcf5xxx_wr_acc0: -_mcf5xxx_wr_acc0: - move.l 4(sp),d0 - .long 0x4e7b0806 /* movec d0,ACC0 */ - nop - rts - -mcf5xxx_wr_accext01: -_mcf5xxx_wr_accext01: - move.l 4(sp),d0 - .long 0x4e7b0807 /* movec d0,ACCEXT01 */ - nop - rts - -mcf5xxx_wr_accext23: -_mcf5xxx_wr_accext23: - move.l 4(sp),d0 - .long 0x4e7b0808 /* movec d0,ACCEXT23 */ - nop - rts - -mcf5xxx_wr_acc1: -_mcf5xxx_wr_acc1: - move.l 4(sp),d0 - .long 0x4e7b0809 /* movec d0,ACC1 */ - nop - rts - -mcf5xxx_wr_acc2: -_mcf5xxx_wr_acc2: - move.l 4(sp),d0 - .long 0x4e7b080A /* movec d0,ACC2 */ - nop - rts - -mcf5xxx_wr_acc3: -_mcf5xxx_wr_acc3: - move.l 4(sp),d0 - .long 0x4e7b080B /* movec d0,ACC3 */ - nop - rts - -mcf5xxx_wr_sr: -_mcf5xxx_wr_sr: - move.l 4(sp),d0 - move.w d0,SR - rts - -mcf5xxx_wr_rambar0: -_mcf5xxx_wr_rambar0: - move.l 4(sp),d0 - .long 0x4e7b0C04 /* movec d0,RAMBAR0 */ - nop - rts - -mcf5xxx_wr_rambar1: -_mcf5xxx_wr_rambar1: - move.l 4(sp),d0 - .long 0x4e7b0C05 /* movec d0,RAMBAR1 */ - nop - rts - -mcf5xxx_wr_mbar: -_mcf5xxx_wr_mbar: -mcf5xxx_wr_mbar0: -_mcf5xxx_wr_mbar0: - move.l 4(sp),d0 - .long 0x4e7b0C0F /* movec d0,MBAR0 */ - nop - rts - -mcf5xxx_wr_mbar1: -_mcf5xxx_wr_mbar1: - move.l 4(sp),d0 - .long 0x4e7b0C0E /* movec d0,MBAR1 */ - nop - rts - - .end -/********************************************************************/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/newlib.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/newlib.c deleted file mode 100644 index 82ffbb0a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/newlib.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* ------------------------ System includes ------------------------------- */ -#include -#include -#include -#include - -/* ------------------------ FreeRTOS includes ----------------------------- */ -#include -#include - -/* ------------------------ Prototypes ------------------------------------ */ -void vSerialPutStringNOISR( xComPortHandle pxPort, - const signed portCHAR * const pcString, - unsigned portSHORT usStringLength ); - -/* ------------------------ Start implementation -------------------------- */ -void -_exit( int status ) -{ - asm volatile ( "halt" ); - - for( ;; ); -} - -pid_t -getpid( void ) -{ - return 0; -} - -int -kill( pid_t pid, int sig ) -{ - _exit( 0 ); -} - -int -close( int fd ) -{ - return 0; -} - -int -fstat( int fd, struct stat *buf ) -{ - buf->st_mode = S_IFCHR; - buf->st_blksize = 0; - return 0; -} - -ssize_t -write( int fd, const void *buf, size_t nbytes ) -{ - ssize_t res = nbytes; - extern xComPortHandle xSTDComPort; - switch ( fd ) - { - case STDERR_FILENO: - vSerialPutStringNOISR( xSTDComPort, - ( const signed portCHAR * const )buf, - ( unsigned portSHORT )nbytes ); - break; - case STDOUT_FILENO: - vSerialPutString( xSTDComPort, - ( const signed portCHAR * const)buf, - ( unsigned portSHORT )nbytes ); - break; - default: - errno = EIO; - res = -1; - break; - } - return res; -} - -int -read( int fd, void *buf, size_t nbytes ) -{ - switch ( fd ) - { - default: - errno = EIO; - return -1; - } -} - -int -isatty( int fd ) -{ - return 0; -} - -off_t -lseek( int fd, off_t offset, int whence ) -{ - errno = EIO; - return ( off_t ) - 1; -} - -extern char _end[]; -char *heap_ptr; - -void * -sbrk( ptrdiff_t nbytes ) -{ - char *base; - - if( !heap_ptr ) - heap_ptr = ( char * )&_end; - base = heap_ptr; - heap_ptr += nbytes; - - return base; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/serial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/serial.c deleted file mode 100644 index bc22a70f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/serial.c +++ /dev/null @@ -1,297 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* ------------------------ MCF523x includes ------------------------------ */ -#include "mcf5xxx.h" -#include "mcf523x.h" - -/* ------------------------ FreeRTOS includes ----------------------------- */ -#include "FreeRTOS.h" -#include "queue.h" -#include "task.h" - -#include "serial.h" - -/* ----------------------- Defines ----------------------------------------- */ -#define BAUDRATE_VALUE(fsys, baud) ( ( fsys )/(32UL * baud) ) -#define MCF_UART_VECTOR ( 64 + 13 ) -#define COM_NIFACE 1 -#define COM_BLOCK_RETRYTIME 10 - -/* ------------------------ Static functions ------------------------------ */ -static void prvSerialISR( void ); - -/* ------------------------ Static variables ------------------------------ */ -typedef struct -{ - portBASE_TYPE xInitialized; - xQueueHandle xRXChars; - xQueueHandle xTXChars; -} xComPortIF_t; - -static xComPortIF_t xComPortIF[COM_NIFACE]; - -/* ------------------------ Begin implementation -------------------------- */ -xComPortHandle -xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength ) -{ - extern void ( *__RAMVEC[] ) ( ); - xComPortHandle xReturn; - portBASE_TYPE xOldIPL; - - /* Create the queues used to hold Rx and Tx characters. */ - xComPortIF[0].xRXChars = - xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE )sizeof( signed portCHAR ) ); - xComPortIF[0].xTXChars = - xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE )sizeof( signed portCHAR ) ); - - /* If the queues were created correctly then setup the serial port hardware. */ - if( ( xComPortIF[0].xRXChars != 0 ) && ( xComPortIF[0].xTXChars != 0 ) ) - { - xOldIPL = portSET_IPL( portIPL_MAX ); - - /* UART 0: Reset transmitter, receiver and mode register pointer */ - MCF_UART_UCR0 = MCF_UART_UCR_MISC( 0x3 ); - MCF_UART_UCR0 = MCF_UART_UCR_MISC( 0x2 ); - MCF_UART_UCR0 = MCF_UART_UCR_MISC( 0x1 ); - - /* Enable receive interrupts. */ - MCF_UART_UIMR0 = MCF_UART_UIMR_RXRDY_FU; - - /* 8 Databits, 1 Stopbit and no parity */ - MCF_UART_UMR0 = MCF_UART_UMR_PM( 0x3 ) | MCF_UART_UMR_SB( 0x7 ) | MCF_UART_UMR_BC( 0x3 ); - - /* UART 0 Clocking */ - MCF_UART_UCSR0 = MCF_UART_UCSR_RCS( 0xd ) | MCF_UART_UCSR_TCS( 0xd ); - MCF_UART_UBG10 = BAUDRATE_VALUE( FSYS_2, ulWantedBaud ) >> 8U; - MCF_UART_UBG20 = BAUDRATE_VALUE( FSYS_2, ulWantedBaud ) & 0xFFU; - - /* UART 0: Enable interrupts */ - __RAMVEC[MCF_UART_VECTOR] = prvSerialISR; - MCF_INTC0_ICR13 = MCF_INTC0_ICRn_IL( 0x2 ) | MCF_INTC0_ICRn_IP( 0x1 ); - MCF_INTC0_IMRL &= ~MCF_INTC0_IMRL_INT_MASK13; - - /* UART 0 Miscellaneous */ - MCF_UART_UACR0 = 0; - - /* UART 0: Enable pins */ - MCF_GPIO_PAR_UART = MCF_GPIO_PAR_UART_PAR_U0RXD | MCF_GPIO_PAR_UART_PAR_U0TXD; - - /* Enable the UART. */ - MCF_UART_UCR0 = MCF_UART_UCR_RXC( 0x1 ) | MCF_UART_UCR_TXC( 0x1 ); - - xComPortIF[0].xInitialized = TRUE; - xReturn = ( xComPortHandle ) & xComPortIF[0]; - - ( void )portSET_IPL( xOldIPL ); - } - else - { - xReturn = ( xComPortHandle ) 0; - } - - return xReturn; -} - -signed portBASE_TYPE -xSerialGetChar( xComPortHandle pxPort, signed portCHAR * pcRxedChar, portTickType xBlockTime ) -{ - int i; - portBASE_TYPE xResult = pdFALSE; - - /* Lookup the correct interface. */ - for( i = 0; i < COM_NIFACE; i++ ) - { - if( pxPort == ( xComPortHandle ) & xComPortIF[i] ) - { - break; - } - } - /* This COM port is available. */ - if( ( i != COM_NIFACE ) && xComPortIF[i].xInitialized ) - { - /* Get the next character from the buffer. Return false if no characters - * are available, or arrive before xBlockTime expires. - */ - if( xQueueReceive( xComPortIF[i].xRXChars, pcRxedChar, xBlockTime ) ) - { - xResult = pdTRUE; - } - } - return xResult; -} - -void -vSerialPutString( xComPortHandle pxPort, const signed portCHAR * - const pcString, unsigned portSHORT usStringLength ) -{ - int i; - signed portCHAR *pChNext; - - /* Send each character in the string, one at a time. */ - pChNext = ( signed portCHAR * )pcString; - for( i = 0; i < usStringLength; i++ ) - { - /* Block until character has been transmitted. */ - while( xSerialPutChar( pxPort, *pChNext, COM_BLOCK_RETRYTIME ) != pdTRUE ); - pChNext++; - } -} - -signed portBASE_TYPE -xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime ) -{ - int i; - portBASE_TYPE xResult = pdFALSE; - portBASE_TYPE xOldIPL; - - /* Lookup the correct interface. */ - for( i = 0; i < COM_NIFACE; i++ ) - { - if( pxPort == ( xComPortHandle ) & xComPortIF[i] ) - { - break; - } - } - /* This COM port is available. */ - if( ( i != COM_NIFACE ) && xComPortIF[i].xInitialized ) - { - /* Place the character in the queue of characters to be transmitted. */ - if( xQueueSend( xComPortIF[i].xTXChars, &cOutChar, xBlockTime ) == pdPASS ) - { - MCF_UART_UIMR0 = MCF_UART_UIMR_TXRDY | MCF_UART_UIMR_RXRDY_FU; - /* Turn on the Tx interrupt so the ISR will remove the character from the - * queue and send it. */ - xResult = pdTRUE; - } - } - return xResult; -} - -signed portBASE_TYPE -xSerialPutCharNOISR( xComPortHandle pxPort, signed portCHAR cOutChar ) -{ - int i; - portBASE_TYPE xResult = pdFALSE; - portBASE_TYPE xOldIPL = portSET_IPL( portIPL_MAX ); - - /* Lookup the correct interface. */ - for( i = 0; i < COM_NIFACE; i++ ) - { - if( pxPort == ( xComPortHandle ) & xComPortIF[i] ) - { - break; - } - } - /* This COM port is available. Support for this only available for COM1 right now. */ - if( ( i != COM_NIFACE ) && ( i == 0 ) ) - { - /* Wait until the transmit buffer is ready. */ - while( !( MCF_UART_USR0 & MCF_UART_USR_TXRDY ) ); - /* Place the character in the transmit buffer. */ - MCF_UART_UTB0 = cOutChar; - xResult = pdTRUE; - } - ( void )portSET_IPL( xOldIPL ); - return xResult; -} - -void -vSerialPutStringNOISR( xComPortHandle pxPort, const signed portCHAR * - const pcString, unsigned portSHORT usStringLength ) -{ - int i; - signed portCHAR *pChNext; - portBASE_TYPE xOldIPL = portSET_IPL( portIPL_MAX ); - - /* Send each character in the string, one at a time. */ - pChNext = ( signed portCHAR * )pcString; - for( i = 0; i < usStringLength; i++ ) - { - /* Block until character has been transmitted. */ - while( xSerialPutCharNOISR( pxPort, *pChNext ) != pdTRUE ); - pChNext++; - } - ( void )portSET_IPL( xOldIPL ); -} - -void -vSerialClose( xComPortHandle xPort ) -{ - /* Not supported as not required by the demo application. */ -} - -void -prvSerialISR( void ) -{ - static signed portCHAR cChar; - static portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE; - - /* We have to remvoe the effect of the GCC. Please note that the - * __attribute__ ((interrupt_handler)) does not work here because we - * have to do the storing of the registers ourself. Another problem - * is the usage of a frame pointer which is unlinked on entry. - */ -#if _GCC_USES_FP == 1 - asm volatile ( "unlk %fp\n\t" ); -#endif - /* This ISR can cause a context switch, so the first statement must be - * a call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any - * variable declarations. - */ - portENTER_SWITCHING_ISR( ); - - /* Ready to send a character from the buffer. */ - if( MCF_UART_USR0 & MCF_UART_USR_TXRDY ) - { - /* Transmit buffer is ready. Test if there are characters available. */ - if( xQueueReceiveFromISR( xComPortIF[0].xTXChars, &cChar, &xTaskWokenByTx ) == pdTRUE ) - { - /* A character was retrieved from the queue so can be sent. */ - MCF_UART_UTB0 = cChar; - } - else - { - /* Leave only receiver enabled. */ - MCF_UART_UIMR0 = MCF_UART_UIMR_RXRDY_FU; - } - } - if( MCF_UART_USR0 & MCF_UART_USR_RXRDY ) - { - cChar = MCF_UART_URB0; - xTaskWokenByRx = xQueueSendFromISR( xComPortIF[0].xRXChars, &cChar, xTaskWokenByRx ); - } - /* Exit the ISR. If a task was woken by either a character being - * or transmitted then a context switch will occur. - */ - portEXIT_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/vector.S b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/vector.S deleted file mode 100644 index 4c278a64..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MCF5235TCP/system/vector.S +++ /dev/null @@ -1,302 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - - .extern __stack - .extern start - .extern fec_handler - .extern fec_if - .extern decrement_timers - .global __RAMVEC - .global __ROMVEC - - .equ MCF_PIT_PCSR0, IPSBAR + 0x150000 - .equ MCF_PIT_PCSR_PIF, 0x0004 - - .section .vector_rom, "x" -__ROMVEC: - .long __stack /* Reset: Initial Stack Pointer */ - .long start /* Reset: Initial Program Counter */ - .long VecDefault /* Bus Error */ - .long VecDefault /* Address Error */ - .long VecDefault /* Illegal Instruction */ - .long VecDefault /* Zero Divison */ - .space 4 /* reserved */ - .space 4 /* reserved */ - .long VecDefault /* Privilege Violation */ - .long VecDefault /* Trace */ - .long VecDefault /* Unimplemented line-a opcode */ - .long VecDefault /* Unimplemented line-b opcode */ - .long VecDefault /* Non-PC breakpoint debug interrupt */ - .long VecDefault /* PC breakpoint debug interrupt */ - .long VecDefault /* Format Error */ - .long VecDefault /* Uninitialized Interrupt */ - .org 0x60 - .long IRQSpurious /* Spurious Interrupt */ - .long IRQDefault /* Level 1 Interrupt */ - .long IRQDefault /* Level 2 Interrupt */ - .long IRQDefault /* Level 3 Interrupt */ - .long IRQDefault /* Level 4 Interrupt */ - .long IRQDefault /* Level 5 Interrupt */ - .long IRQDefault /* Level 6 Interrupt */ - .long IRQDefault /* Level 7 Interrupt */ - .org 0x80 - .long TrapDefault /* TRAP 0 */ - .long TrapDefault /* TRAP 1 */ - .long TrapDefault /* TRAP 2 */ - .long TrapDefault /* TRAP 3 */ - .long TrapDefault /* TRAP 4 */ - .long TrapDefault /* TRAP 5 */ - .long TrapDefault /* TRAP 6 */ - .long TrapDefault /* TRAP 7 */ - .long TrapDefault /* TRAP 8 */ - .long TrapDefault /* TRAP 9 */ - .long TrapDefault /* TRAP 10 */ - .long TrapDefault /* TRAP 11 */ - .long TrapDefault /* TRAP 12 */ - .long TrapDefault /* TRAP 13 */ - .long TrapDefault /* TRAP 14 */ - .long TrapDefault /* TRAP 15 */ - .org 0x100 - .long IRQDefault /* User-Defined Interrupt 0 */ - .long IRQDefault /* User-Defined Interrupt 1 */ - .long IRQDefault /* User-Defined Interrupt 2 */ - .long IRQDefault /* User-Defined Interrupt 3 */ - .long IRQDefault /* User-Defined Interrupt 4 */ - .long IRQDefault /* User-Defined Interrupt 5 */ - .long IRQDefault /* User-Defined Interrupt 6 */ - .long IRQDefault /* User-Defined Interrupt 7 */ - .long IRQDefault /* User-Defined Interrupt 8 */ - .long IRQDefault /* User-Defined Interrupt 9 */ - .long IRQDefault /* User-Defined Interrupt 10 */ - .long IRQDefault /* User-Defined Interrupt 11 */ - .long IRQDefault /* User-Defined Interrupt 12 */ - .long IRQDefault /* User-Defined Interrupt 13 */ - .long IRQDefault /* User-Defined Interrupt 14 */ - .long IRQDefault /* User-Defined Interrupt 15 */ - .long IRQDefault /* User-Defined Interrupt 16 */ - .long IRQDefault /* User-Defined Interrupt 17 */ - .long IRQDefault /* User-Defined Interrupt 18 */ - .long IRQDefault /* User-Defined Interrupt 19 */ - .long IRQDefault /* User-Defined Interrupt 20 */ - .long IRQDefault /* User-Defined Interrupt 21 */ - .long IRQDefault /* User-Defined Interrupt 22 */ - .long IRQDefault /* Transmit frame interrupt */ - .long IRQDefault /* Transmit buffer interrupt */ - .long IRQDefault /* Transmit FIFO underrun */ - .long IRQDefault /* Collision retry limit */ - .long IRQDefault /* Receive frame interrupt */ - .long IRQDefault /* Receive buffer interrupt */ - .long IRQDefault /* MII interrupt */ - .long IRQDefault /* Late collision */ - .long IRQDefault /* Heartbeat error */ - .long IRQDefault /* Graceful stop complete */ - .long IRQDefault /* Ethernet bus error */ - .long IRQDefault /* Babbling transmit error */ - .long IRQDefault /* Babbling receive error */ - .long IRQDefault /* Timer interrupt */ - .long IRQDefault /* User-Defined Interrupt 37 */ - .long IRQDefault /* User-Defined Interrupt 38 */ - .long IRQDefault /* User-Defined Interrupt 39 */ - .long IRQDefault /* User-Defined Interrupt 40 */ - .long IRQDefault /* User-Defined Interrupt 41 */ - .long IRQDefault /* User-Defined Interrupt 42 */ - .long IRQDefault /* User-Defined Interrupt 43 */ - .long IRQDefault /* User-Defined Interrupt 44 */ - .long IRQDefault /* User-Defined Interrupt 45 */ - .long IRQDefault /* User-Defined Interrupt 46 */ - .long IRQDefault /* User-Defined Interrupt 47 */ - .long IRQDefault /* User-Defined Interrupt 48 */ - .long IRQDefault /* User-Defined Interrupt 49 */ - .long IRQDefault /* User-Defined Interrupt 50 */ - .long IRQDefault /* User-Defined Interrupt 51 */ - .long IRQDefault /* User-Defined Interrupt 52 */ - .long IRQDefault /* User-Defined Interrupt 53 */ - .long IRQDefault /* User-Defined Interrupt 54 */ - .long IRQDefault /* User-Defined Interrupt 55 */ - .long IRQDefault /* User-Defined Interrupt 56 */ - .long IRQDefault /* User-Defined Interrupt 57 */ - .long IRQDefault /* User-Defined Interrupt 58 */ - .long IRQDefault /* User-Defined Interrupt 59 */ - .long IRQDefault /* User-Defined Interrupt 60 */ - .long IRQDefault /* User-Defined Interrupt 61 */ - .long IRQDefault /* User-Defined Interrupt 62 */ - .long IRQDefault /* User-Defined Interrupt 63 */ - .long IRQDefault /* User-Defined Interrupt 64 */ - .long IRQDefault /* User-Defined Interrupt 65 */ - .long IRQDefault /* User-Defined Interrupt 66 */ - .long IRQDefault /* User-Defined Interrupt 67 */ - .long IRQDefault /* User-Defined Interrupt 68 */ - .long IRQDefault /* User-Defined Interrupt 69 */ - .long IRQDefault /* User-Defined Interrupt 70 */ - .long IRQDefault /* User-Defined Interrupt 71 */ - .long IRQDefault /* User-Defined Interrupt 72 */ - .long IRQDefault /* User-Defined Interrupt 73 */ - .long IRQDefault /* User-Defined Interrupt 74 */ - .long IRQDefault /* User-Defined Interrupt 75 */ - .long IRQDefault /* User-Defined Interrupt 76 */ - .long IRQDefault /* User-Defined Interrupt 77 */ - .long IRQDefault /* User-Defined Interrupt 78 */ - .long IRQDefault /* User-Defined Interrupt 79 */ - .long IRQDefault /* User-Defined Interrupt 80 */ - .long IRQDefault /* User-Defined Interrupt 81 */ - .long IRQDefault /* User-Defined Interrupt 82 */ - .long IRQDefault /* User-Defined Interrupt 83 */ - .long IRQDefault /* User-Defined Interrupt 84 */ - .long IRQDefault /* User-Defined Interrupt 85 */ - .long IRQDefault /* User-Defined Interrupt 86 */ - .long IRQDefault /* User-Defined Interrupt 87 */ - .long IRQDefault /* User-Defined Interrupt 88 */ - .long IRQDefault /* User-Defined Interrupt 89 */ - .long IRQDefault /* User-Defined Interrupt 90 */ - .long IRQDefault /* User-Defined Interrupt 91 */ - .long IRQDefault /* User-Defined Interrupt 92 */ - .long IRQDefault /* User-Defined Interrupt 93 */ - .long IRQDefault /* User-Defined Interrupt 94 */ - .long IRQDefault /* User-Defined Interrupt 95 */ - .long IRQDefault /* User-Defined Interrupt 96 */ - .long IRQDefault /* User-Defined Interrupt 97 */ - .long IRQDefault /* User-Defined Interrupt 98 */ - .long IRQDefault /* User-Defined Interrupt 99 */ - .long IRQDefault /* User-Defined Interrupt 100 */ - .long IRQDefault /* User-Defined Interrupt 101 */ - .long IRQDefault /* User-Defined Interrupt 102 */ - .long IRQDefault /* User-Defined Interrupt 103 */ - .long IRQDefault /* User-Defined Interrupt 104 */ - .long IRQDefault /* User-Defined Interrupt 105 */ - .long IRQDefault /* User-Defined Interrupt 106 */ - .long IRQDefault /* User-Defined Interrupt 107 */ - .long IRQDefault /* User-Defined Interrupt 108 */ - .long IRQDefault /* User-Defined Interrupt 109 */ - .long IRQDefault /* User-Defined Interrupt 110 */ - .long IRQDefault /* User-Defined Interrupt 111 */ - .long IRQDefault /* User-Defined Interrupt 112 */ - .long IRQDefault /* User-Defined Interrupt 113 */ - .long IRQDefault /* User-Defined Interrupt 114 */ - .long IRQDefault /* User-Defined Interrupt 115 */ - .long IRQDefault /* User-Defined Interrupt 116 */ - .long IRQDefault /* User-Defined Interrupt 117 */ - .long IRQDefault /* User-Defined Interrupt 118 */ - .long IRQDefault /* User-Defined Interrupt 119 */ - .long IRQDefault /* User-Defined Interrupt 120 */ - .long IRQDefault /* User-Defined Interrupt 121 */ - .long IRQDefault /* User-Defined Interrupt 122 */ - .long IRQDefault /* User-Defined Interrupt 123 */ - .long IRQDefault /* User-Defined Interrupt 124 */ - .long IRQDefault /* User-Defined Interrupt 125 */ - .long IRQDefault /* User-Defined Interrupt 126 */ - .long IRQDefault /* User-Defined Interrupt 127 */ - .long IRQDefault /* User-Defined Interrupt 128 */ - .long IRQDefault /* User-Defined Interrupt 129 */ - .long IRQDefault /* User-Defined Interrupt 130 */ - .long IRQDefault /* User-Defined Interrupt 131 */ - .long IRQDefault /* User-Defined Interrupt 132 */ - .long IRQDefault /* User-Defined Interrupt 133 */ - .long IRQDefault /* User-Defined Interrupt 134 */ - .long IRQDefault /* User-Defined Interrupt 135 */ - .long IRQDefault /* User-Defined Interrupt 136 */ - .long IRQDefault /* User-Defined Interrupt 137 */ - .long IRQDefault /* User-Defined Interrupt 138 */ - .long IRQDefault /* User-Defined Interrupt 139 */ - .long IRQDefault /* User-Defined Interrupt 140 */ - .long IRQDefault /* User-Defined Interrupt 141 */ - .long IRQDefault /* User-Defined Interrupt 142 */ - .long IRQDefault /* User-Defined Interrupt 143 */ - .long IRQDefault /* User-Defined Interrupt 144 */ - .long IRQDefault /* User-Defined Interrupt 145 */ - .long IRQDefault /* User-Defined Interrupt 146 */ - .long IRQDefault /* User-Defined Interrupt 147 */ - .long IRQDefault /* User-Defined Interrupt 148 */ - .long IRQDefault /* User-Defined Interrupt 149 */ - .long IRQDefault /* User-Defined Interrupt 150 */ - .long IRQDefault /* User-Defined Interrupt 151 */ - .long IRQDefault /* User-Defined Interrupt 152 */ - .long IRQDefault /* User-Defined Interrupt 153 */ - .long IRQDefault /* User-Defined Interrupt 154 */ - .long IRQDefault /* User-Defined Interrupt 155 */ - .long IRQDefault /* User-Defined Interrupt 156 */ - .long IRQDefault /* User-Defined Interrupt 157 */ - .long IRQDefault /* User-Defined Interrupt 158 */ - .long IRQDefault /* User-Defined Interrupt 159 */ - .long IRQDefault /* User-Defined Interrupt 160 */ - .long IRQDefault /* User-Defined Interrupt 161 */ - .long IRQDefault /* User-Defined Interrupt 162 */ - .long IRQDefault /* User-Defined Interrupt 163 */ - .long IRQDefault /* User-Defined Interrupt 164 */ - .long IRQDefault /* User-Defined Interrupt 165 */ - .long IRQDefault /* User-Defined Interrupt 166 */ - .long IRQDefault /* User-Defined Interrupt 167 */ - .long IRQDefault /* User-Defined Interrupt 168 */ - .long IRQDefault /* User-Defined Interrupt 169 */ - .long IRQDefault /* User-Defined Interrupt 170 */ - .long IRQDefault /* User-Defined Interrupt 171 */ - .long IRQDefault /* User-Defined Interrupt 172 */ - .long IRQDefault /* User-Defined Interrupt 173 */ - .long IRQDefault /* User-Defined Interrupt 174 */ - .long IRQDefault /* User-Defined Interrupt 175 */ - .long IRQDefault /* User-Defined Interrupt 176 */ - .long IRQDefault /* User-Defined Interrupt 177 */ - .long IRQDefault /* User-Defined Interrupt 178 */ - .long IRQDefault /* User-Defined Interrupt 179 */ - .long IRQDefault /* User-Defined Interrupt 180 */ - .long IRQDefault /* User-Defined Interrupt 181 */ - .long IRQDefault /* User-Defined Interrupt 182 */ - .long IRQDefault /* User-Defined Interrupt 183 */ - .long IRQDefault /* User-Defined Interrupt 184 */ - .long IRQDefault /* User-Defined Interrupt 185 */ - .long IRQDefault /* User-Defined Interrupt 186 */ - .long IRQDefault /* User-Defined Interrupt 187 */ - .long IRQDefault /* User-Defined Interrupt 188 */ - .long IRQDefault /* User-Defined Interrupt 189 */ - .long IRQDefault /* User-Defined Interrupt 190 */ - .long IRQDefault /* User-Defined Interrupt 191 */ - .org 0x00000400 - - .section .vector_ram -__RAMVEC: - .space 0x400 - - .section .text -VecDefault: - halt - bra VecDefault - -IRQDefault: - halt - bra IRQDefault - -IRQSpurious: - halt - bra IRQSpurious - -TrapDefault: - halt - bra TrapDefault diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/Makefile b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/Makefile deleted file mode 100644 index 8ccec1af..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/Makefile +++ /dev/null @@ -1,80 +0,0 @@ -# -# FreeModbus MSP430 port Makefile -# -# Copyright (c) 2006 Christian Walter, Vienna 2006. -# -# $Id: Makefile,v 1.3 2007/06/12 06:42:01 wolti Exp $ -# -# --------------------------------------------------------------------------- - -BASE = /cygdrive/c/mspgcc -CC = $(BASE)/bin/msp430-gcc -LD = $(BASE)/bin/msp430-ld -CXX = $(BASE)/bin/msp430-g++ -OBJCOPY = $(BASE)/bin/msp430-objcopy -SIZE = $(BASE)/bin/msp430-size -INSIGHT = $(BASE)/bin/msp430-insight -GDBPROXY = $(BASE)/bin/msp430-gdbproxy - -MCU = msp430x149 -MB_INC = -Iport -I../../modbus/rtu -I../../modbus/ascii \ - -I../../modbus/include -CFLAGS = -MD -g -mmcu=$(MCU) -Wall -D'FSYS_2=25000000UL' -CFLAGS += -I. -Isystem $(MB_INC) -ASFLAGS = -MD -g -mmcu=$(MCU) -LDFLAGS = -g -mmcu=$(MCU) -TGT = demo - -MB_SRC = $(addprefix ../../modbus/, mb.c ) -MB_RTU_SRC = $(addprefix ../../modbus/rtu/, mbrtu.c mbcrc.c ) -MB_ASCII_SRC= $(addprefix ../../modbus/ascii/, mbascii.c ) -MB_FUNC_SRC = $(addprefix ../../modbus/functions/, mbfunccoils.c \ - mbfuncdiag.c mbfuncholding.c mbfuncinput.c mbfuncother.c \ - mbfuncdisc.c mbutils.c) -PORT_SRC = $(addprefix port/, portserial.c porttimer.c portevent.c ) -CSRC = demo.c \ - $(MB_SRC) $(MB_RTU_SRC) $(MB_ASCII_SRC) $(MB_FUNC_SRC) \ - $(PORT_SRC) -ASRC = system/dco-gcc.S - -OBJS = $(CSRC:.c=.o) $(ASRC:.S=.o) -DEPS = $(OBJS:.o=.d) -BIN = $(TGT).elf - -.PHONY: clean all - -all: $(BIN) - -flash-programm: $(TGT).elf - -flash-verify: - -flash-erase: - -proxy: - $(GDBPROXY) --port=2000 msp430 -debug: - $(INSIGHT) --command=msp430.gdb --se=$(TGT).elf - -$(BIN): $(OBJS) - $(CC) $(LDFLAGS) $(OBJS) $(LDLIBS) -o $@ - -clean: - rm -f $(DEPS) - rm -f $(OBJS) - rm -f $(BIN) $(TGT).map - -# --------------------------------------------------------------------------- -# rules for code generation -# --------------------------------------------------------------------------- -%.o: %.c - $(CC) $(CFLAGS) -o $@ -c $< - -%.o: %.S - $(CC) $(ASFLAGS) -o $@ -c $< - -# --------------------------------------------------------------------------- -# # compiler generated dependencies -# --------------------------------------------------------------------------- --include $(DEPS) - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/README.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/README.txt deleted file mode 100644 index c9f2d93d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/README.txt +++ /dev/null @@ -1,51 +0,0 @@ - - FREEMODBUS 1.1 MSP430 PORT - ========================== - -REQUIREMENTS -============ - -This demo application provides a port for the MSP430 series of processors -from Text Instruments. The port was done using the MSP430-P169 from -Olimex[1] which features a MSP430F169 MCU. -It requires a wired serial port to a host processor and a Modbus Master -Software on the PC side to be useful. Demo versions of Modbus Masters -can be found in [2] and [3]. - -INSTALLATION -============ - -SOURCE -====== - -TESTING -======= - -Start the Modbus Sample Application and test if the input registers starting -at protocol address 1000 can be read. There are four registers value available -and the output should look like: - -Polling slave (Ctrl-C to stop) ... -[1000]: 6474 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... -[1000]: -8831 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... - -The simple testing utility used in the 'demo_rtu.bat' script can be found -at [4]. - -PROBLEMS -======== - -[1] Olimex MSP430-P169 kit: http://www.olimex.com/dev/msp-p169.html -[2] WinTech ModScan32: http://www.win-tech.com/html/modscan32.htm -[3] Modus Poll: http://www.modbustools.com/modbus_poll.asp -[4] FieldTalk Modpoll: http://www.focus-sw.com/fieldtalk/modpoll.html - -Version: $Id: README.txt,v 1.1 2006/11/19 03:00:33 wolti Exp $ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/demo.c deleted file mode 100644 index 334814fe..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/demo.c +++ /dev/null @@ -1,158 +0,0 @@ -/* - * FreeModbus Libary: MSP430 Demo Application - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" -#include "dco.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 -#define REG_HOLDING_START 1000 -#define REG_HOLDING_NREGS 130 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; -static USHORT usRegHoldingStart = REG_HOLDING_START; -static USHORT usRegHoldingBuf[REG_HOLDING_NREGS]; - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - eMBErrorCode eStatus; - volatile USHORT usACLKCnt; - - /* Stop Watchdog Timer. */ - WDTCTL = WDTPW + WDTHOLD; - - /* Delay for ACLK startup. */ - for( usACLKCnt = 0xFFFF; usACLKCnt != 0; usACLKCnt-- ); - if( cTISetDCO( TI_DCO_4MHZ ) == TI_DCO_NO_ERROR ) - { - _EINT( ); - - /* Initialize Protocol Stack. */ - if( ( eStatus = eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ) ) != MB_ENOERR ) - { - } - /* Enable the Modbus Protocol Stack. */ - else if( ( eStatus = eMBEnable( ) ) != MB_ENOERR ) - { - } - else - { - for( ;; ) - { - ( void )eMBPoll( ); - - /* Here we simply count the number of poll cycles. */ - usRegInputBuf[0]++; - } - } - } - for( ;; ); -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_HOLDING_START ) && - ( usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegHoldingStart ); - switch ( eMode ) - { - /* Pass current register values to the protocol stack. */ - case MB_REG_READ: - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegHoldingBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegHoldingBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - break; - - /* Update current register values with new values from the - * protocol stack. */ - case MB_REG_WRITE: - while( usNRegs > 0 ) - { - usRegHoldingBuf[iRegIndex] = *pucRegBuffer++ << 8; - usRegHoldingBuf[iRegIndex] |= *pucRegBuffer++; - iRegIndex++; - usNRegs--; - } - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/demo.hzp b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/demo.hzp deleted file mode 100644 index 765c305a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/demo.hzp +++ /dev/null @@ -1,56 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zuO|2s!mF<i50$Cu=OgqPBUE$jBY z{EFU3JIT%706jq%RRy*8-frUz4$ywQDn?GGuoAUE3o2nc zKX)NVgM=`B@Z~}b*b^Ie*3SkSbCjp)emrV66-xgnq}pFUHc;HM1_bQ$5$(?zepCG-N^s%D-XQi1n&XxL_j|)reyD8D7?u;7pt^=Zj-bJg3>jdQb`7QRN&Q-|$X$1fG|x7EkoI(ISkVT&Qk;`_pWFMW?UX7 zIp^AlW5B3)Y*RRc&K5U<9awKbrGOfj?S0)P%KwxFrTw>kc6N`%`Z*?9a2b^S|LboM zIJtVtzXqafAjsh;2{arzkfZ_!r`q`c` - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -/* ----------------------- Platform includes --------------------------------*/ - -#include -#if defined (__GNUC__) -#include -#endif -#undef CHAR - -/* ----------------------- Defines ------------------------------------------*/ -#define INLINE -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#define ENTER_CRITICAL_SECTION( ) EnterCriticalSection( ) -#define EXIT_CRITICAL_SECTION( ) ExitCriticalSection( ) -#define assert( expr ) - -#define SMCLK ( 4000000UL ) -#define ACLK ( 32768UL ) - -typedef char BOOL; - -typedef unsigned char UCHAR; - -typedef char CHAR; - -typedef unsigned short USHORT; -typedef short SHORT; - -typedef unsigned long ULONG; -typedef long LONG; - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -void EnterCriticalSection( void ); -void ExitCriticalSection( void ); - - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/port/portevent.c deleted file mode 100644 index b55df192..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/port/portevent.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * FreeModbus Libary: MSP430 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/port/portserial.c deleted file mode 100644 index 8171b484..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/port/portserial.c +++ /dev/null @@ -1,206 +0,0 @@ -/* - * FreeModbus Libary: MSP430 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define U0_CHAR ( 0x10 ) /* Data 0:7-bits / 1:8-bits */ - -#define DEBUG_PERFORMANCE ( 1 ) - -#if DEBUG_PERFORMANCE == 1 -#define DEBUG_PIN_RX ( 0 ) -#define DEBUG_PIN_TX ( 1 ) -#define DEBUG_PORT_DIR ( P1DIR ) -#define DEBUG_PORT_OUT ( P1OUT ) -#define DEBUG_INIT( ) \ - do \ - { \ - DEBUG_PORT_DIR |= ( 1 << DEBUG_PIN_RX ) | ( 1 << DEBUG_PIN_TX ); \ - DEBUG_PORT_OUT &= ~( ( 1 << DEBUG_PIN_RX ) | ( 1 << DEBUG_PIN_TX ) ); \ - } while( 0 ); -#define DEBUG_TOGGLE_RX( ) DEBUG_PORT_OUT ^= ( 1 << DEBUG_PIN_RX ) -#define DEBUG_TOGGLE_TX( ) DEBUG_PORT_OUT ^= ( 1 << DEBUG_PIN_TX ) - -#else - -#define DEBUG_INIT( ) -#define DEBUG_TOGGLE_RX( ) -#define DEBUG_TOGGLE_TX( ) -#endif - -/* ----------------------- Static variables ---------------------------------*/ -UCHAR ucGIEWasEnabled = FALSE; -UCHAR ucCriticalNesting = 0x00; - -/* ----------------------- Start implementation -----------------------------*/ -void -vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ - ENTER_CRITICAL_SECTION( ); - if( xRxEnable ) - { - IE1 |= URXIE0; - } - else - { - IE1 &= ~URXIE0; - } - if( xTxEnable ) - { - IE1 |= UTXIE0; - IFG1 |= UTXIFG0; - } - else - { - IE1 &= ~UTXIE0; - } - EXIT_CRITICAL_SECTION( ); -} - -BOOL -xMBPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - BOOL bInitialized = TRUE; - USHORT UxCTL = 0; - USHORT UxBR = ( USHORT ) ( SMCLK / ulBaudRate ); - - switch ( eParity ) - { - case MB_PAR_NONE: - break; - case MB_PAR_ODD: - UxCTL |= PENA; - break; - case MB_PAR_EVEN: - UxCTL |= PENA | PEV; - break; - } - switch ( ucDataBits ) - { - case 8: - UxCTL |= U0_CHAR; - break; - case 7: - break; - default: - bInitialized = FALSE; - } - if( bInitialized ) - { - ENTER_CRITICAL_SECTION( ); - /* Reset USART */ - U0CTL |= SWRST; - /* Initialize all UART registers */ - U0CTL = UxCTL | SWRST; - /* SSELx = 11 = SMCLK. Use only if PLL is synchronized ! */ - U0TCTL = SSEL1 | SSEL0; - U0RCTL = URXEIE; - /* Configure USART0 Baudrate Registers. */ - U0BR0 = ( UxBR & 0xFF ); - U0BR1 = ( UxBR >> 8 ); - U0MCTL = 0; - /* Enable UART */ - ME1 |= UTXE0 | URXE0; - /* Clear reset flag. */ - U0CTL &= ~SWRST; - - /* USART0 TXD/RXD */ - P3SEL |= 0x30; - P3DIR |= 0x10; - - EXIT_CRITICAL_SECTION( ); - - DEBUG_INIT( ); - } - return bInitialized; -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - TXBUF0 = ucByte; - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - *pucByte = RXBUF0; - return TRUE; -} - -#if defined (__GNUC__) -interrupt (USART0RX_VECTOR) prvvMBSerialRXIRQHandler( void ) -#else -void -prvvMBSerialRXIRQHandler( void ) __interrupt[USART0RX_VECTOR] -#endif -{ - DEBUG_TOGGLE_RX( ); - pxMBFrameCBByteReceived( ); -} - -#if defined (__GNUC__) -interrupt (USART0TX_VECTOR) prvvMBSerialTXIRQHandler( void ) -#else -void -prvvMBSerialTXIRQHandler( void ) __interrupt[USART0TX_VECTOR] -#endif -{ - DEBUG_TOGGLE_TX( ); - pxMBFrameCBTransmitterEmpty( ); -} - -void -EnterCriticalSection( void ) -{ - USHORT usOldSR; - if( ucCriticalNesting == 0 ) - { -#if defined (__GNUC__) - usOldSR = READ_SR; - _DINT( ); -#else - usOldSR = _DINT( ); -#endif - ucGIEWasEnabled = usOldSR & GIE ? TRUE : FALSE; - } - ucCriticalNesting++; -} - -void -ExitCriticalSection( void ) -{ - ucCriticalNesting--; - if( ucCriticalNesting == 0 ) - { - if( ucGIEWasEnabled ) - { - _EINT( ); - } - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/port/porttimer.c deleted file mode 100644 index bb361f90..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/port/porttimer.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - * FreeModbus Libary: MSP430 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -/* Timer ticks are counted in multiples of 50us. Therefore 20000 ticks are - * one second. - */ -#define MB_TIMER_TICKS ( 20000L ) - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usTimerOCRADelta; -static USHORT usTimerOCRBDelta; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortTimersInit( USHORT usTim1Timeout50us ) -{ - BOOL bInitialized = FALSE; - ULONG ulReloadValue = ( ACLK * ( ULONG )usTim1Timeout50us ) / MB_TIMER_TICKS; - - if( ulReloadValue <= 1 ) - { - ulReloadValue = 1; - } - else - { - ulReloadValue -= 1; - } - - if( ulReloadValue < 0xFFFE ) - { - /* Timer A clock source is ACLK, Start disabled. */ - TACTL = TASSEL0; - TACCR0 = ( USHORT ) ulReloadValue; - /* Enable Timer A caputer compare interrupt. */ - TACCTL0 = CCIE; - - bInitialized = TRUE; - } - return bInitialized; -} - -void -vMBPortTimersEnable( void ) -{ - /* Reset timer counter and set compare interrupt. */ - TAR = 0; - TACCTL0 |= CCIE; - TACTL |= MC0; -} - -void -vMBPortTimersDisable( void ) -{ - TACCTL0 &= ~CCIE; - TACTL &= ~( MC0 | MC1 ); -} - -#if defined (__GNUC__) -interrupt (TIMERA0_VECTOR) prvvMBTimerIRQHandler( void ) -#else -void -prvvMBTimerIRQHandler( void ) __interrupt[TIMERA0_VECTOR] -#endif -{ - ( void )pxMBPortCBTimerExpired( ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/system/dco-gcc.S b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/system/dco-gcc.S deleted file mode 100644 index c894f48f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/system/dco-gcc.S +++ /dev/null @@ -1,171 +0,0 @@ -/* - * THIS PROGRAM IS PROVIDED "AS IS". TI MAKES NO WARRANTIES OR - * REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY, - * INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR - * - * COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE. - * TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET - * POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY - * INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR - * YOUR USE OF THE PROGRAM. - * - * IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL, - * CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY - * THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT - * OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM. - * EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF - * REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS - * OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF - * USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S - * AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF - * YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS - * (U.S.$500). - * - * Unless otherwise stated, the Program written and copyrighted - * by Texas Instruments is distributed as "freeware". You may, - * only under TI's copyright in the Program, use and modify the - * Program without any charge or restriction. You may - * distribute to third parties, provided that you transfer a - * copy of this license to the third party and the third party - * agrees to these terms by its first use of the Program. You - * must reproduce the copyright notice and any other legend of - * ownership on each copy or partial copy, of the Program. - * - * You acknowledge and agree that the Program contains - * copyrighted material, trade secrets and other TI proprietary - * information and is protected by copyright laws, - * international copyright treaties, and trade secret laws, as - * well as other intellectual property laws. To protect TI's - * rights in the Program, you agree not to decompile, reverse - * engineer, disassemble or otherwise translate any object code - * versions of the Program to a human-readable form. You agree - * that in no event will you alter, remove or destroy any - * copyright notice included in the Program. TI reserves all - * rights not specifically granted under this license. Except - * as specifically provided herein, nothing in this agreement - * shall be construed as conferring by implication, estoppel, - * or otherwise, upon you, any license or other right under any - * TI patents, copyrights or trade secrets. - * - * You may not use the Program in non-TI devices. - */ - -/* ----------------------- MSP430 registers ---------------------------------*/ -.equ DCOCTL, 0x0056 /* DCO Clock Frequency Control */ -.equ TACTL, 0x0160 /* Timer A 0 Control */ -.equ TACCTL2, 0x0166 /* Timer A 0 Capture/Compare Control 2 */ -.equ TACCR2, 0x0176 /* Timer A 0 Capture/Compare 2 */ -.equ BCSCTL1, 0x0057 /* Basic Clock Module Register */ - -.equ XT2OFF, 0x80 -.equ DIVA_3, 0x30 -.equ CCIFG, 0x0001 /* Capture/compare interrupt flag */ -.equ TACLR, 0x0004 /* Timer A counter clear */ - -.equ CM_1, (1*0x4000) /* Capture mode: 1 - pos. edge */ -.equ CCIS_1, (1*0x1000) /* Capture input select : 1 - CCIxB */ -.equ CAP, 0x0100 /* Capture mode: 1, Compare mode: 0 */ - -.equ TASSEL_2, (2*0x100) /* Timer A clock source select */ -.equ MC_2, (2*0x10) /* Timer A mode control: 2 - Continous up */ - -/* ----------------------- MSP430 registers ---------------------------------*/ - -/* - * Subroutine: Sets DCO to selected frequency based on Delta. - * R14 and R15 are used, ACLK = 32768/8 Timer_A clocked by DCOCLK - * R13 used to hold old BCSCTL1 value - * R15 is the parameter specifying the delta value, MCLK = delta * 4096 - * returns in R15: - * 0 - DCO Set Correctly - * 1 - DCO running at slowest setting - * 2 - DCO running at fastest setting - * 0xff - Timeout Occured while setting DCO - */ - .text - .align 2 - .globl cTISetDCO - -cTISetDCO: - push.w r10 - push.w r11 - push.w &TACTL - push.w &TACCTL2 - mov.w #10000, r11 /* max number of times to loop */ - mov.w r15, r12 - clr.w r15 - mov.b &BCSCTL1, r13 /* Copy BC settings to preserve */ - and.w #0xF8, r13 /* Mask out bits which will change (0-2) 1xx */ -SetupBC: - /* ACLK=LFXT1CLK/8, XT2OFF to make a known state */ - bis.b #(XT2OFF + DIVA_3),&BCSCTL1 -SetupCC2: - /* CAP, ACLK */ - mov.w #(CM_1 + CCIS_1 + CAP), &TACCTL2 - /* SMCLK, cont-mode, clear */ - mov.w #(TASSEL_2 + MC_2 + TACLR), &TACTL -firstTest: - bit.w #CCIFG, &TACCTL2 /* Test capture flag, skip first short ACLK to avoid error */ - jz firstTest - bic.w #CCIFG, &TACCTL2 /* Clear capture flag */ -TestDCO: - dec.w r11 - jz ExitTimeOutError -TestDCO2: - bit.w #CCIFG, &TACCTL2 /* Test capture flag */ - jz TestDCO2 - bic.w #CCIFG, &TACCTL2 /* Clear capture flag */ - -AdjDCO: - mov.w &TACCR2, r14 /* R14 = captured SMCLK */ - sub.w r15, r14 /* R14 = capture difference */ - mov.w &TACCR2, r15 /* R15 = captured SMCLK */ - mov.w r14, r10 /* R10 = capture difference */ - sub.w r12, r10 /* R10 = difference between desired and actual */ - jz ExitNoError /* if R12 = R10, DCO set exactly */ - cmp.w #0xFFFF, r10 /* DCO can be off by 1 for a tolerance */ - jeq ExitNoError - cmp.w r12, r14 /* Delta = SMCLK/(32768/8) */ - jlo IncDCO -DecDCO: - dec.b &DCOCTL /* Slow DCO with DCO and MOD */ - jc TestDCO /* Slower? */ - bit.b #0x7, &BCSCTL1 /* Can RSEL.x be decremented? 1xx */ - jz ExitSlowestSetting /* jmp>DCO at slowest setting */ - dec.b &BCSCTL1 /* Decrement RSEL.x */ - jmp TestDCO -IncDCO: - inc.b &DCOCTL /* Speed DCO with DCO and MOD */ - jnc TestDCO /* Faster? */ - /* Can RSEL.x be increased? 1xx */ - cmp.b #(XT2OFF + DIVA_3 + 0x7), &BCSCTL1 - jeq ExitFastestSetting /* jmp> DCO at fastest setting */ - inc.b &BCSCTL1 /* Increment RSEL.x */ - jmp TestDCO -ExitSlowestSetting: - clr.b &DCOCTL - mov.w #0x01, r15 - jmp SetDCO_Exit -ExitFastestSetting: - mov.b #0xFF, &DCOCTL /* since the DCO previously rolled over */ -ExitFastestSetting2xx: - mov.w #0x02, r15 - jmp SetDCO_Exit -ExitTimeOutError: - mov.w #0xff, r15 - jmp SetDCO_Exit -ExitNoError: - clr.w r15 -SetDCO_Exit: - clr.w TACCTL2 /* Stop CCR2 */ - bic.b #0xF8, &BCSCTL1 /* Mask out bits which will change (0-2) 1xx */ - bis.b r13, &BCSCTL1 /* Copy in old non-DCO BC settings */ - pop.w &TACTL - pop.w &TACCTL2 - pop.w r11 - pop.w r10 - ret /* Return from subroutine */ - - .end diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/system/dco-rowley.S b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/system/dco-rowley.S deleted file mode 100644 index fb80733d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/system/dco-rowley.S +++ /dev/null @@ -1,172 +0,0 @@ -/* - * THIS PROGRAM IS PROVIDED "AS IS". TI MAKES NO WARRANTIES OR - * REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY, - * INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR - * - * COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE. - * TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET - * POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY - * INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR - * YOUR USE OF THE PROGRAM. - * - * IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL, - * CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY - * THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT - * OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM. - * EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF - * REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS - * OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF - * USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S - * AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF - * YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS - * (U.S.$500). - * - * Unless otherwise stated, the Program written and copyrighted - * by Texas Instruments is distributed as "freeware". You may, - * only under TI's copyright in the Program, use and modify the - * Program without any charge or restriction. You may - * distribute to third parties, provided that you transfer a - * copy of this license to the third party and the third party - * agrees to these terms by its first use of the Program. You - * must reproduce the copyright notice and any other legend of - * ownership on each copy or partial copy, of the Program. - * - * You acknowledge and agree that the Program contains - * copyrighted material, trade secrets and other TI proprietary - * information and is protected by copyright laws, - * international copyright treaties, and trade secret laws, as - * well as other intellectual property laws. To protect TI's - * rights in the Program, you agree not to decompile, reverse - * engineer, disassemble or otherwise translate any object code - * versions of the Program to a human-readable form. You agree - * that in no event will you alter, remove or destroy any - * copyright notice included in the Program. TI reserves all - * rights not specifically granted under this license. Except - * as specifically provided herein, nothing in this agreement - * shall be construed as conferring by implication, estoppel, - * or otherwise, upon you, any license or other right under any - * TI patents, copyrights or trade secrets. - * - * You may not use the Program in non-TI devices. - */ - -/* ----------------------- MSP430 registers ---------------------------------*/ -DCOCTL .equ 0x0056 /* DCO Clock Frequency Control */ -TACTL .equ 0x0160 /* Timer A 0 Control */ -TACCTL2 .equ 0x0166 /* Timer A 0 Capture/Compare Control 2 */ -TACCR2 .equ 0x0176 /* Timer A 0 Capture/Compare 2 */ -BCSCTL1 .equ 0x0057 /* Basic Clock Module Register */ - -XT2OFF .equ 0x80 -DIVA_3 .equ 0x30 -CCIFG .equ 0x0001 /* Capture/compare interrupt flag */ -TACLR .equ 0x0004 /* Timer A counter clear */ - -CM_1 .equ (1*0x4000) /* Capture mode: 1 - pos. edge */ -CCIS_1 .equ (1*0x1000) /* Capture input select : 1 - CCIxB */ -CAP .equ 0x0100 /* Capture mode: 1, Compare mode: 0 */ - -TASSEL_2 .equ (2*0x100) /* Timer A clock source select */ -MC_2 .equ (2*0x10) /* Timer A mode control: 2 - Continous up */ - -/* ----------------------- MSP430 registers ---------------------------------*/ - -/* - * Subroutine: Sets DCO to selected frequency based on Delta. - * R14 and R15 are used, ACLK = 32768/8 Timer_A clocked by DCOCLK - * R13 used to hold old BCSCTL1 value - * R15 is the parameter specifying the delta value, MCLK = delta * 4096 - * returns in R15: - * 0 - DCO Set Correctly - * 1 - DCO running at slowest setting - * 2 - DCO running at fastest setting - * 0xff - Timeout Occured while setting DCO - */ - - CODE - ALIGN 2 - EXPORT _cTISetDCO - -_cTISetDCO: - push.w r10 - push.w r11 - push.w &TACTL - push.w &TACCTL2 - mov.w #10000, r11 /* max number of times to loop */ - mov.w r15, r12 - clr.w r15 - mov.b &BCSCTL1, r13 /* Copy BC settings to preserve */ - and.w #0xF8, r13 /* Mask out bits which will change (0-2) 1xx */ -SetupBC: - /* ACLK=LFXT1CLK/8, XT2OFF to make a known state */ - bis.b #(XT2OFF + DIVA_3),&BCSCTL1 -SetupCC2: - /* CAP, ACLK */ - mov.w #(CM_1 + CCIS_1 + CAP), &TACCTL2 - /* SMCLK, cont-mode, clear */ - mov.w #(TASSEL_2 + MC_2 + TACLR), &TACTL -firstTest: - bit.w #CCIFG, &TACCTL2 /* Test capture flag, skip first short ACLK to avoid error */ - jz firstTest - bic.w #CCIFG, &TACCTL2 /* Clear capture flag */ -TestDCO: - dec.w r11 - jz ExitTimeOutError -TestDCO2: - bit.w #CCIFG, &TACCTL2 /* Test capture flag */ - jz TestDCO2 - bic.w #CCIFG, &TACCTL2 /* Clear capture flag */ - -AdjDCO: - mov.w &TACCR2, r14 /* R14 = captured SMCLK */ - sub.w r15, r14 /* R14 = capture difference */ - mov.w &TACCR2, r15 /* R15 = captured SMCLK */ - mov.w r14, r10 /* R10 = capture difference */ - sub.w r12, r10 /* R10 = difference between desired and actual */ - jz ExitNoError /* if R12 = R10, DCO set exactly */ - cmp.w #0xFFFF, r10 /* DCO can be off by 1 for a tolerance */ - jeq ExitNoError - cmp.w r12, r14 /* Delta = SMCLK/(32768/8) */ - jlo IncDCO -DecDCO: - dec.b &DCOCTL /* Slow DCO with DCO and MOD */ - jc TestDCO /* Slower? */ - bit.b #0x7, &BCSCTL1 /* Can RSEL.x be decremented? 1xx */ - jz ExitSlowestSetting /* jmp>DCO at slowest setting */ - dec.b &BCSCTL1 /* Decrement RSEL.x */ - jmp TestDCO -IncDCO: - inc.b &DCOCTL /* Speed DCO with DCO and MOD */ - jnc TestDCO /* Faster? */ - /* Can RSEL.x be increased? 1xx */ - cmp.b #(XT2OFF + DIVA_3 + 0x7), &BCSCTL1 - jeq ExitFastestSetting /* jmp> DCO at fastest setting */ - inc.b &BCSCTL1 /* Increment RSEL.x */ - jmp TestDCO -ExitSlowestSetting: - clr.b &DCOCTL - mov.w #0x01, r15 - jmp SetDCO_Exit -ExitFastestSetting: - mov.b #0xFF, &DCOCTL /* since the DCO previously rolled over */ -ExitFastestSetting2xx: - mov.w #0x02, r15 - jmp SetDCO_Exit -ExitTimeOutError: - mov.w #0xff, r15 - jmp SetDCO_Exit -ExitNoError: - clr.w r15 -SetDCO_Exit: - clr.w TACCTL2 /* Stop CCR2 */ - bic.b #0xF8, &BCSCTL1 /* Mask out bits which will change (0-2) 1xx */ - bis.b r13, &BCSCTL1 /* Copy in old non-DCO BC settings */ - pop.w &TACTL - pop.w &TACCTL2 - pop.w r11 - pop.w r10 - ret /* Return from subroutine */ - - .end diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/system/dco.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/system/dco.h deleted file mode 100644 index a1f30bbc..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/MSP430/system/dco.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - * - */ -#ifndef DCO_H -#define DCO_H - -/* ----------------------- Defines ------------------------------------------*/ -#define TI_DCO_NO_ERROR ( 0 ) -#define TI_DCO_SET_TO_SLOWEST ( 1 ) -#define TI_DCO_SET_TO_FASTEST ( 2 ) -#define TI_DCO_TIMEOUT_ERROR ( 0xFF ) - -#define TI_DCO_1MHZ ( 244 ) /* Target DCO = DELTA*(4096) ~1MHz */ -#define TI_DCO_2MHZ ( 488 ) /* Target DCO = DELTA*(4096) ~2MHz */ -#define TI_DCO_3MHZ ( 732 ) /* Target DCO = DELTA*(4096) ~3MHz */ -#define TI_DCO_4MHZ ( 977 ) /* Target DCO = DELTA*(4096) ~4MHz */ -#define TI_DCO_5MHZ ( 1221 ) /* Target DCO = DELTA*(4096) ~5MHz */ -#define TI_DCO_6MHZ ( 1465 ) /* Target DCO = DELTA*(4096) ~6MHz */ -#define TI_DCO_7MHZ ( 1709 ) /* Target DCO = DELTA*(4096) ~7MHz */ -#define TI_DCO_8MHZ ( 1953 ) /* Target DCO = DELTA*(4096) ~8MHz */ -#define TI_DCO_9MHZ ( 2197 ) /* Target DCO = DELTA*(4096) ~9MHz */ -#define TI_DCO_10MHZ ( 2441 ) /* Target DCO = DELTA*(4096) ~10MHz */ -#define TI_DCO_11MHZ ( 2686 ) /* Target DCO = DELTA*(4096) ~11MHz */ -#define TI_DCO_12MHZ ( 2930 ) /* Target DCO = DELTA*(4096) ~12MHz */ -#define TI_DCO_13MHZ ( 3174 ) /* Target DCO = DELTA*(4096) ~13MHz */ -#define TI_DCO_14MHZ ( 3418 ) /* Target DCO = DELTA*(4096) ~14MHz */ -#define TI_DCO_15MHZ ( 3662 ) /* Target DCO = DELTA*(4096) ~15MHz */ -#define TI_DCO_16MHZ ( 3906 ) /* Target DCO = DELTA*(4096) ~16MHz */ - -/* ----------------------- Function prototypes ------------------------------*/ -extern char cTISetDCO( int delta ); - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/FreeRTOSConfig.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/FreeRTOSConfig.h deleted file mode 100644 index 95a10429..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/FreeRTOSConfig.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - *----------------------------------------------------------*/ - -#define configUSE_PREEMPTION 1 -#define configUSE_IDLE_HOOK 0 - -/* 160000000Mhz is frequency of PCLK2 not CPU frequency because this - * value is used for calculating the timer reload value */ -#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 16000000 ) -#define configTICK_RATE_HZ ( ( portTickType ) 1000 ) -#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 128 ) -#define configMAX_TASK_NAME_LEN ( 16 ) -#define configUSE_TRACE_FACILITY 1 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 - - -/* Set the following definitions to 1 to include the API function, or zero - * to exclude the API function. */ - -#define INCLUDE_vTaskPrioritySet 1 -#define INCLUDE_uxTaskPriorityGet 1 -#define INCLUDE_vTaskDelete 1 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 1 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 - - -#endif /* FREERTOS_CONFIG_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/crt0.s b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/crt0.s deleted file mode 100644 index 7ab4eec4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/crt0.s +++ /dev/null @@ -1,177 +0,0 @@ -/***************************************************************************** - * Copyright (c) 2001, 2002 Rowley Associates Limited. * - * * - * This file may be distributed under the terms of the License Agreement * - * provided with this software. * - * * - * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE * - * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. * - *****************************************************************************/ - .section .init, "ax" - .code 32 - .align 0 - - .weak _start - .global __start - .global __gccmain - .extern main - .extern exit - -/***************************************************************************** - * Function : _start * - * Description : Main entry point and startup code for C system. * - *****************************************************************************/ -_start: -__start: - mrs r0, cpsr - bic r0, r0, #0x1F - - /* Setup stacks */ - orr r1, r0, #0x1B /* Undefined mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_und_end__ - - orr r1, r0, #0x17 /* Abort mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_abt_end__ - - orr r1, r0, #0x12 /* IRQ mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_irq_end__ - - orr r1, r0, #0x11 /* FIQ mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_fiq_end__ - - orr r1, r0, #0x13 /* Supervisor mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_svc_end__ -#ifdef SUPERVISOR_START - /* Start application in supervisor mode */ - ldr r1, =__stack_end__ /* Setup user/system mode stack */ - mov r2, sp - stmfd r2!, {r1} - ldmfd r2, {sp}^ -#else - /* Start application in system mode */ - orr r1, r0, #0x1F /* System mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_end__ -#endif - - /* Copy from initialised data section to data section (if necessary). */ - ldr r0, =__data_load_start__ - ldr r1, =__data_start__ - cmp r0, r1 - beq copy_data_end - - ldr r2, =__data_end__ - subs r2, r2, r1 - beq copy_data_end - -copy_data_loop: - ldrb r3, [r0], #+1 - strb r3, [r1], #+1 - subs r2, r2, #1 - bne copy_data_loop -copy_data_end: - - /* Copy from initialised text section to text section (if necessary). */ - ldr r0, =__text_load_start__ - ldr r1, =__text_start__ - cmp r0, r1 - beq copy_text_end - - ldr r2, =__text_end__ - subs r2, r2, r1 - beq copy_text_end - -copy_text_loop: - ldrb r3, [r0], #+1 - strb r3, [r1], #+1 - subs r2, r2, #1 - bne copy_text_loop -copy_text_end: - - /* Copy from initialised fast_text section to fast_text section (if necessary). */ - ldr r0, =__fast_load_start__ - ldr r1, =__fast_start__ - cmp r0, r1 - beq copy_fast_end - - ldr r2, =__fast_end__ - subs r2, r2, r1 - beq copy_fast_end - -copy_fast_loop: - ldrb r3, [r0], #+1 - strb r3, [r1], #+1 - subs r2, r2, #1 - bne copy_fast_loop -copy_fast_end: - - /* Zero the bss. */ - ldr r0, =__bss_start__ - ldr r1, =__bss_end__ - mov r2, #0 -zero_bss_loop: - cmp r0, r1 - beq zero_bss_end - strb r2, [r0], #+1 - b zero_bss_loop -zero_bss_end: - - /* Initialise the heap */ - ldr r0, = __heap_start__ - ldr r1, = __heap_end__ - sub r1, r1, r0 /* r1 = r1-r0 */ - mov r2, #0 - str r2, [r0], #+4 /* *r0++ = 0 */ - str r1, [r0] /* *r0 = __heap_end__ - __heap_start__ */ - - /* Call constructors */ - ldr r0, =__ctors_start__ - ldr r1, =__ctors_end__ -ctor_loop: - cmp r0, r1 - beq ctor_end - ldr r2, [r0], #+4 - stmfd sp!, {r0-r1} - mov lr, pc - mov pc, r2 - ldmfd sp!, {r0-r1} - b ctor_loop -ctor_end: - - /* Setup initial call frame */ - mov lr, #4 - mov r12, sp - stmfd sp!, {r11-r12, lr-pc} - sub r11, r12, #0x00000004 - -start: - /* Jump to main entry point */ - mov r0, #0 - mov r1, #0 - ldr r2, =main - bx r2 - - /* Call destructors */ - ldr r0, =__dtors_start__ - ldr r1, =__dtors_end__ - -dtor_loop: - cmp r0, r1 - beq dtor_end - ldr r2, [r0], #+4 - stmfd sp!, {r0-r1} - mov lr, pc - mov pc, r2 - ldmfd sp!, {r0-r1} - b dtor_loop -dtor_end: - - /* Return from main, loop forever. */ -exit_loop: - b exit_loop - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/demo.hzp b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/demo.hzp deleted file mode 100644 index d0ba296b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/demo.hzp +++ /dev/null @@ -1,110 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/excoils.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/excoils.c deleted file mode 100644 index 26c67e16..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/excoils.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * FreeModbus Libary: STR71x Demo Application - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" - -/* ----------------------- STR71X includes ----------------------------------*/ -#include "eic.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbutils.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_COILS_START 1000 -#define REG_COILS_SIZE 16 - -/* ----------------------- Static variables ---------------------------------*/ -static unsigned char ucRegCoilsBuf[REG_COILS_SIZE / 8]; - -/* ----------------------- Static functions ---------------------------------*/ -static void vModbusTask( void *pvParameters ); - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - EIC_Init( ); - EIC_IRQConfig( ENABLE ); - - ( void )xTaskCreate( vModbusTask, NULL, configMINIMAL_STACK_SIZE, NULL, - tskIDLE_PRIORITY, NULL ); - - vTaskStartScheduler( ); - return 0; -} - -static void -vModbusTask( void *pvParameters ) -{ - /* Select either ASCII or RTU Mode. */ - ( void )eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); - - /* Enable the Modbus Protocol Stack. */ - ( void )eMBEnable( ); - - /* Enter main loop. */ - for( ;; ) - { - /* Call the main polling loop of the Modbus protocol stack. */ - ( void )eMBPoll( ); - } -} - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, - eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iNCoils = ( int )usNCoils; - unsigned short usBitOffset; - - /* Check if we have registers mapped at this block. */ - if( ( usAddress >= REG_COILS_START ) && - ( usAddress + usNCoils <= REG_COILS_START + REG_COILS_SIZE ) ) - { - usBitOffset = ( unsigned short )( usAddress - REG_COILS_START ); - switch ( eMode ) - { - /* Read current values and pass to protocol stack. */ - case MB_REG_READ: - while( iNCoils > 0 ) - { - *pucRegBuffer++ = - xMBUtilGetBits( ucRegCoilsBuf, usBitOffset, - ( unsigned char )( iNCoils > - 8 ? 8 : - iNCoils ) ); - iNCoils -= 8; - usBitOffset += 8; - } - break; - - /* Update current register values. */ - case MB_REG_WRITE: - while( iNCoils > 0 ) - { - xMBUtilSetBits( ucRegCoilsBuf, usBitOffset, - ( unsigned char )( iNCoils > 8 ? 8 : iNCoils ), - *pucRegBuffer++ ); - iNCoils -= 8; - usBitOffset += 8; - } - break; - } - - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} - -void -__assert( const char *pcFile, const char *pcLine, int iLineNumber ) -{ - portENTER_CRITICAL( ); - for( ;; ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/exdisc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/exdisc.c deleted file mode 100644 index 11f84458..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/exdisc.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * FreeModbus Libary: STR71x Demo Application - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" - -/* ----------------------- STR71X includes ----------------------------------*/ -#include "eic.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbutils.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_DISC_START 1000 -#define REG_DISC_SIZE 16 - -/* ----------------------- Static variables ---------------------------------*/ -static unsigned char ucRegDiscBuf[REG_DISC_SIZE / 8] = { 0, 0 }; - -/* ----------------------- Static functions ---------------------------------*/ -static void vModbusTask( void *pvParameters ); - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - EIC_Init( ); - EIC_IRQConfig( ENABLE ); - - ( void )xTaskCreate( vModbusTask, NULL, configMINIMAL_STACK_SIZE, NULL, - tskIDLE_PRIORITY, NULL ); - - vTaskStartScheduler( ); - return 0; -} - -static void -vModbusTask( void *pvParameters ) -{ - /* Select either ASCII or RTU Mode. */ - ( void )eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); - - /* Initialise the discrete input registers. */ - xMBUtilSetBits( ucRegDiscBuf, 2, 2, 3 ); /* Set bit 2:3 to 11b. */ - xMBUtilSetBits( ucRegDiscBuf, 8, 1, 1 ); /* Set bit 8 to 1b. */ - - /* Enable the Modbus Protocol Stack. */ - ( void )eMBEnable( ); - for( ;; ) - { - /* Call the main polling loop of the Modbus protocol stack. */ - ( void )eMBPoll( ); - } -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - eMBErrorCode eStatus = MB_ENOERR; - short iNDiscrete = ( short )usNDiscrete; - unsigned short usBitOffset; - - /* Check if we have registers mapped at this block. */ - if( ( usAddress >= REG_DISC_START ) && - ( usAddress + usNDiscrete <= REG_DISC_START + REG_DISC_SIZE ) ) - { - usBitOffset = ( unsigned short )( usAddress - REG_DISC_START ); - while( iNDiscrete > 0 ) - { - *pucRegBuffer++ = - xMBUtilGetBits( ucRegDiscBuf, usBitOffset, - ( unsigned char )( iNDiscrete > - 8 ? 8 : iNDiscrete ) ); - iNDiscrete -= 8; - usBitOffset += 8; - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -void -__assert( const char *pcFile, const char *pcLine, int iLineNumber ) -{ - portENTER_CRITICAL( ); - while( 1 ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/exholding.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/exholding.c deleted file mode 100644 index 82c63adb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/exholding.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * FreeModbus Libary: STR71x Demo Application - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" - -/* ----------------------- STR71X includes ----------------------------------*/ -#include "eic.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_HOLDING_START 1000 -#define REG_HOLDING_NREGS 130 - -/* ----------------------- Static variables ---------------------------------*/ -static unsigned short usRegHoldingStart = REG_HOLDING_START; -static unsigned short usRegHoldingBuf[REG_HOLDING_NREGS]; - -/* ----------------------- Static functions ---------------------------------*/ -static void vModbusTask( void *pvParameters ); - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - EIC_Init( ); - EIC_IRQConfig( ENABLE ); - - ( void )xTaskCreate( vModbusTask, NULL, configMINIMAL_STACK_SIZE, NULL, - tskIDLE_PRIORITY, NULL ); - - vTaskStartScheduler( ); - return 0; -} - -static void -vModbusTask( void *pvParameters ) -{ - int i; - - /* Select either ASCII or RTU Mode. */ - ( void )eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); - - /* Initialize the holding register values before starting the - * Modbus stack. */ - for( i = 0; i < REG_HOLDING_NREGS; i++ ) - { - usRegHoldingBuf[i] = ( unsigned short )i; - } - - /* Enable the Modbus Protocol Stack. */ - ( void )eMBEnable( ); - for( ;; ) - { - /* Call the main polling loop of the Modbus protocol stack. */ - ( void )eMBPoll( ); - } -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, - eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_HOLDING_START ) && - ( usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegHoldingStart ); - switch ( eMode ) - { - /* Pass current register values to the protocol stack. */ - case MB_REG_READ: - while( usNRegs > 0 ) - { - *pucRegBuffer++ = - ( unsigned char )( usRegHoldingBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = - ( unsigned char )( usRegHoldingBuf[iRegIndex] & - 0xFF ); - iRegIndex++; - usNRegs--; - } - break; - - /* Update current register values with new values from the - * protocol stack. */ - case MB_REG_WRITE: - while( usNRegs > 0 ) - { - usRegHoldingBuf[iRegIndex] = *pucRegBuffer++ << 8; - usRegHoldingBuf[iRegIndex] |= *pucRegBuffer++; - iRegIndex++; - usNRegs--; - } - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} - -void -__assert( const char *pcFile, const char *pcLine, int iLineNumber ) -{ - portENTER_CRITICAL( ); - for( ;; ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/FreeRTOS.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/FreeRTOS.h deleted file mode 100644 index 8079a680..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/FreeRTOS.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef INC_FREERTOS_H -#define INC_FREERTOS_H - - -/* - * Include the generic headers required for the FreeRTOS port being used. - */ -#include - -/* Basic FreeRTOS definitions. */ -#include "projdefs.h" - -/* Application specific configuration options. */ -#include "FreeRTOSConfig.h" - -/* Definitions specific to the port being used. */ -#include "portable.h" - - - - - - - -/* - * Check all the required application specific macros have been defined. - * These macros are application specific and (as downloaded) are defined - * within FreeRTOSConfig.h. - */ - -#ifndef configUSE_PREEMPTION - #error Missing definition: configUSE_PREEMPTION should be defined as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_IDLE_HOOK - #error Missing definition: configUSE_IDLE_HOOK should be defined as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskPrioritySet - #error Missing definition: INCLUDE_vTaskPrioritySet should be defined as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_uxTaskPriorityGet - #error Missing definition: INCLUDE_uxTaskPriorityGet should be defined as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelete - #error Missing definition: INCLUDE_vTaskDelete should be defined as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskCleanUpResources - #error Missing definition: INCLUDE_vTaskCleanUpResources should be defined as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskSuspend - #error Missing definition: INCLUDE_vTaskSuspend should be defined as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelayUntil - #error Missing definition: INCLUDE_vTaskDelayUntil should be defined as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelay - #error Missing definition: INCLUDE_vTaskDelay should be defined as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_16_BIT_TICKS - #error Missing definition: configUSE_16_BIT_TICKS should be defined as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - - - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/list.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/list.h deleted file mode 100644 index b8d18565..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/list.h +++ /dev/null @@ -1,265 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - * This is the list implementation used by the scheduler. While it is tailored - * heavily for the schedulers needs, it is also available for use by - * application code. - * - * xLists can only store pointers to xListItems. Each xListItem contains a - * numeric value (xItemValue). Most of the time the lists are sorted in - * descending item value order. - * - * Lists are created already containing one list item. The value of this - * item is the maximum possible that can be stored, it is therefore always at - * the end of the list and acts as a marker. The list member pxHead always - * points to this marker - even though it is at the tail of the list. This - * is because the tail contains a wrap back pointer to the true head of - * the list. - * - * In addition to it's value, each list item contains a pointer to the next - * item in the list (pxNext), a pointer to the list it is in (pxContainer) - * and a pointer to back to the object that contains it. These later two - * pointers are included for efficiency of list manipulation. There is - * effectively a two way link between the object containing the list item and - * the list item itself. - * - * - * \page ListIntroduction List Implementation - * \ingroup FreeRTOSIntro - */ - - -#ifndef LIST_H -#define LIST_H - -/* - * Definition of the only type of object that a list can contain. - */ -struct xLIST_ITEM -{ - portTickType xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ - volatile struct xLIST_ITEM * pxNext; /*< Pointer to the next xListItem in the list. */ - volatile struct xLIST_ITEM * pxPrevious;/*< Pointer to the previous xListItem in the list. */ - void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ - void * pvContainer; /*< Pointer to the list in which this list item is placed (if any). */ -}; -typedef struct xLIST_ITEM xListItem; /* For some reason lint wants this as two separate definitions. */ - -/* - * Definition of the type of queue used by the scheduler. - */ -typedef struct xLIST -{ - unsigned portBASE_TYPE uxNumberOfItems; - volatile xListItem * pxHead; /*< Pointer to the xListEnd item. xListEnd contains a wrap back pointer to true list head. */ - volatile xListItem * pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to pvListGetOwnerOfNextEntry (). */ - volatile xListItem xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ -} xList; - -/* - * Access macro to set the owner of a list item. The owner of a list item - * is the object (usually a TCB) that contains the list item. - * - * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) { ( pxListItem )->pvOwner = ( void * ) pxOwner; } - -/* - * Access macro to set the value of the list item. In most cases the value is - * used to sort the list in descending order. - * - * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) { ( pxListItem )->xItemValue = xValue; } - -/* - * Access macro the retrieve the value of the list item. The value can - * represent anything - for example a the priority of a task, or the time at - * which a task should be unblocked. - * - * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) - -/* - * Access macro to determine if a list contains any items. The macro will - * only have the value true if the list is empty. - * - * \page listLIST_IS_EMPTY listLIST_IS_EMPTY - * \ingroup LinkedList - */ -#define listLIST_IS_EMPTY( pxList ) ( ( pxList )->uxNumberOfItems == ( unsigned portBASE_TYPE ) 0 ) - -/* - * Access macro to return the number of items in the list. - */ -#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) - -/* - * Access function to obtain the owner of the next entry in a list. - * - * The list member pxIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list - * and returns that entries pxOwner parameter. Using multiple calls to this - * function it is therefore possible to move through every item contained in - * a list. - * - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the next item owner is to be returned. - * - * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ -{ \ - /* Increment the index to the next item and return the item, ensuring */ \ - /* we don't return the marker used at the end of the list. */ \ - \ - ( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \ - if( ( pxList )->pxIndex == ( pxList )->pxHead ) \ - { \ - ( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \ - } \ - pxTCB = ( volatile tskTCB * ) ( pxList )->pxIndex->pvOwner; \ -} - -/* - * Access function to obtain the owner of the first entry in a list. Lists - * are normally sorted in ascending item value order. - * - * This function returns the pxOwner member of the first item in the list. - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the owner of the head item is to be - * returned. - * - * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( ( pxList->uxNumberOfItems != ( unsigned portBASE_TYPE ) 0 ) ? ( pxList->pxHead->pxNext->pvOwner ) : ( NULL ) ) - -/* - * Check to see if a list item is within a list. The list item maintains a - * "container" pointer that points to the list it is in. All this macro does - * is check to see if the container and the list match. - * - * @param pxList The list we want to know if the list item is within. - * @param pxListItem The list item we want to know if is in the list. - * @return pdTRUE is the list item is in the list, otherwise pdFALSE. - * pointer against - */ -#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( pxListItem )->pvContainer == ( void * ) pxList ) - -/* - * Must be called before a list is used! This initialises all the members - * of the list structure and inserts the xListEnd item into the list as a - * marker to the back of the list. - * - * @param pxList Pointer to the list being initialised. - * - * \page vListInitialise vListInitialise - * \ingroup LinkedList - */ -void vListInitialise( xList *pxList ); - -/* - * Must be called before a list item is used. This sets the list container to - * null so the item does not think that it is already contained in a list. - * - * @param pxItem Pointer to the list item being initialised. - * - * \page vListInitialiseItem vListInitialiseItem - * \ingroup LinkedList - */ -void vListInitialiseItem( xListItem *pxItem ); - -/* - * Insert a list item into a list. The item will be inserted into the list in - * a position determined by its item value (descending item value order). - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The item to that is to be placed in the list. - * - * \page vListInsert vListInsert - * \ingroup LinkedList - */ -void vListInsert( xList *pxList, xListItem *pxNewListItem ); - -/* - * Insert a list item into a list. The item will be inserted in a position - * such that it will be the last item within the list returned by multiple - * calls to listGET_OWNER_OF_NEXT_ENTRY. - * - * The list member pvIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pvIndex to the next item in the list. - * Placing an item in a list using vListInsertEnd effectively places the item - * in the list position pointed to by pvIndex. This means that every other - * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before - * the pvIndex parameter again points to the item being inserted. - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The list item to be inserted into the list. - * - * \page vListInsertEnd vListInsertEnd - * \ingroup LinkedList - */ -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ); - -/* - * Remove an item from a list. The list item has a pointer to the list that - * it is in, so only the list item need be passed into the function. - * - * @param vListRemove The item to be removed. The item will remove itself from - * the list pointed to by it's pxContainer parameter. - * - * \page vListRemove vListRemove - * \ingroup LinkedList - */ -void vListRemove( xListItem *pxItemToRemove ); - - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/portable.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/portable.h deleted file mode 100644 index ee63220c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/portable.h +++ /dev/null @@ -1,168 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http:www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http:www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/*----------------------------------------------------------- - * Portable layer API. Each function must be defined for each port. - *----------------------------------------------------------*/ - -#ifndef PORTABLE_H -#define PORTABLE_H - -/* Include the macro file relevant to the port being used. */ - -#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT - #include "..\..\source\portable\owatcom\16bitdos\pc\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT - #include "..\..\source\portable\owatcom\16bitdos\flsh186\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef GCC_MEGA_AVR - #include "../portable/GCC/ATMega323/portmacro.h" -#endif - -#ifdef IAR_MEGA_AVR - #include "../portable/IAR/ATMega323/portmacro.h" -#endif - -#ifdef MPLAB_PIC18F_PORT - #include "..\..\source\portable\MPLAB\PIC18F\portmacro.h" -#endif - -#ifdef _FEDPICC - #include "libFreeRTOS/Include/portmacro.h" -#endif - -#ifdef SDCC_CYGNAL - #include "../../Source/portable/SDCC/Cygnal/portmacro.h" -#endif - -#ifdef GCC_ARM7 - #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" -#endif - -#ifdef GCC_MSP430 - #include "../../Source/portable/GCC/MSP430F449/portmacro.h" -#endif - -#ifdef ROWLEY_MSP430 - #include "../../Source/portable/Rowley/MSP430F449/portmacro.h" -#endif - -#ifdef KEIL_ARM7 - #include "..\..\Source\portable\Keil\ARM7\portmacro.h" -#endif - -#ifdef SAM7_GCC - #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" -#endif - -#ifdef SAM7_IAR - #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" -#endif - -#ifdef LPC2000_IAR - #include "..\..\Source\portable\IAR\LPC2000\portmacro.h" -#endif - -#ifdef STR71X_IAR - #include "..\..\Source\portable\IAR\STR71x\portmacro.h" -#endif - -#ifdef STR71X_GCC - #include "portmacro.h" -#endif - -#ifdef GCC_H8S - #include "../../Source/portable/GCC/H8S2329/portmacro.h" -#endif - -#ifdef GCC_AT91FR40008 - #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" -#endif - -#ifdef HCS12_CODE_WARRIOR - #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" -#endif - -#ifdef MICROBLAZE_GCC - #include "../../Source/portable/GCC/MicroBlaze/portmacro.h" -#endif - -#ifdef BCC_INDUSTRIAL_PC_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\PC\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef BCC_FLASH_LITE_186_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif -/* - * Setup the stack of a new task so it is ready to be placed under the - * scheduler control. The registers have to be placed on the stack in - * the order that the port expects to find them. - */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ); - -/* - * Map to the memory management routines required for the port. - */ -void *pvPortMalloc( size_t xSize ); -void vPortFree( void *pv ); -void vPortInitialiseBlocks( void ); - -/* - * Setup the hardware ready for the scheduler to take control. This generally - * sets up a tick interrupt and sets timers for the correct tick frequency. - */ -portBASE_TYPE xPortStartScheduler( void ); - -/* - * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so - * the hardware is left in its original condition after the scheduler stops - * executing. - */ -void vPortEndScheduler( void ); - - -#endif /* PORTABLE_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/projdefs.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/projdefs.h deleted file mode 100644 index 07e54c3e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/projdefs.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef PROJDEFS_H -#define PROJDEFS_H - -typedef void (*pdTASK_CODE)( void * ); - -#define pdTRUE ( 1 ) -#define pdFALSE ( 0 ) - -#define pdPASS ( 1 ) -#define pdFAIL ( 0 ) - -/* Error definitions. */ -#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) -#define errNO_TASK_TO_RUN ( -2 ) -#define errQUEUE_FULL ( -3 ) - - -#endif - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/queue.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/queue.h deleted file mode 100644 index 93e0bdfb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/queue.h +++ /dev/null @@ -1,457 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef QUEUE_H -#define QUEUE_H - -typedef void * xQueueHandle; - -/** - * queue. h - * 
- xQueueHandle xQueueCreate( 
-                              unsigned portBASE_TYPE uxQueueLength, 
-                              unsigned portBASE_TYPE uxItemSize 
-                          );
- *
- * - * Creates a new queue instance. This allocates the storage required by the - * new queue and returns a handle for the queue. - * - * @param uxQueueLength The maximum number of items that the queue can contain. - * - * @param uxItemSize The number of bytes each item in the queue will require. - * Items are queued by copy, not by reference, so this is the number of bytes - * that will be copied for each posted item. Each item on the queue must be - * the same size. - * - * @return If the queue is successfully create then a handle to the newly - * created queue is returned. If the queue cannot be created then 0 is - * returned. - * - * Example usage: - 
- struct AMessage
- {
-    portCHAR ucMessageID;
-    portCHAR ucData[ 20 ];
- };
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
-
-    // Create a queue capable of containing 10 unsigned long values.
-    xQueue1 = xQueueCreate( 10, sizeof( unsigned portLONG ) );
-    if( xQueue1 == 0 )
-    {
-        // Queue was not created and must not be used.
-    }
-
-    // Create a queue capable of containing 10 pointers to AMessage structures.
-    // These should be passed by pointer as they contain a lot of data.
-    xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-    if( xQueue2 == 0 )
-    {
-        // Queue was not created and must not be used.
-    }
-
-    // ... Rest of task code.
- }
-
- * \defgroup xQueueCreate xQueueCreate - * \ingroup QueueManagement - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueSend( 
-                             xQueueHandle xQueue, 
-                             const void * pvItemToQueue, 
-                             portTickType xTicksToWait 
-                         );
- *
- * - * Post an item on a queue. The item is queued by copy, not by reference. - * This function must not be called from an interrupt service routine. - * See xQueueSendFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0. The - * time is defined in tick periods so the constant portTICK_RATE_MS - * should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-    portCHAR ucMessageID;
-    portCHAR ucData[ 20 ];
- } xMessage;
-
- unsigned portLONG ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-    // Create a queue capable of containing 10 unsigned long values.
-    xQueue1 = xQueueCreate( 10, sizeof( unsigned portLONG ) );
-
-    // Create a queue capable of containing 10 pointers to AMessage structures.
-    // These should be passed by pointer as they contain a lot of data.
-    xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-    // ...
-
-    if( xQueue1 != 0 )
-    {
-        // Send an unsigned long.  Wait for 10 ticks for space to become 
-        // available if necessary.
-        if( xQueueSend( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )
-        {
-            // Failed to post the message, even after 10 ticks.
-        }
-    }
-
-    if( xQueue2 != 0 )
-    {
-        // Send a pointer to a struct AMessage object.  Don't block if the
-        // queue is already full.
-        pxMessage = & xMessage;
-        xQueueSend( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );
-    }
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueSend( xQueueHandle xQueue, const void * pvItemToQueue, portTickType xTicksToWait ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueReceive( 
-                                xQueueHandle xQueue, 
-                                void *pcBuffer, 
-                                portTickType xTicksToWait 
-                            );
- * - * Receive an item from a queue. The item is received by copy so a buffer of - * adequate size must be provided. The number of bytes copied into the buffer - * was defined when the queue was created. - * - * This function must not be used in an interrupt service routine. See - * xQueueReceiveFromISR for an alternative that can. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pcBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. The time is defined in tick periods so the constant - * portTICK_RATE_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- struct AMessage
- {
-    portCHAR ucMessageID;
-    portCHAR ucData[ 20 ];
- } xMessage;
-
- xQueueHandle xQueue;
- 
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-    // Create a queue capable of containing 10 pointers to AMessage structures.
-    // These should be passed by pointer as they contain a lot of data.
-    xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-    if( xQueue == 0 )
-    {
-        // Failed to create the queue.
-    }
-
-    // ...
-
-    // Send a pointer to a struct AMessage object.  Don't block if the
-    // queue is already full.
-    pxMessage = & xMessage;
-    xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to receive from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-    if( xQueue != 0 )
-    {
-        // Receive a message on the created queue.  Block for 10 ticks if a
-        // message is not immediately available.
-        if( xQueueReceive( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )
-        {
-            // pcRxedMessage now points to the struct AMessage variable posted
-            // by vATask.
-        }
-    }
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceive( xQueueHandle xQueue, void *pcBuffer, portTickType xTicksToWait ); - -/** - * queue. h - * 
unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue );
- * - * Return the number of messages stored in a queue. - * - * @param xQueue A handle to the queue being queried. - * - * @return The number of messages available in the queue. - * - * \page uxQueueMessagesWaiting uxQueueMessagesWaiting - * \ingroup QueueManagement - */ -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue ); - -/** - * queue. h - * 
void vQueueDelete( xQueueHandle xQueue );
- * - * Delete a queue - freeing all the memory allocated for storing of items - * placed on the queue. - * - * @param xQueue A handle to the queue to be deleted. - * - * \page vQueueDelete vQueueDelete - * \ingroup QueueManagement - */ -void vQueueDelete( xQueueHandle xQueue ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueSendFromISR( 
-                                    xQueueHandle pxQueue, 
-                                    const void *pvItemToQueue, 
-                                    portBASE_TYPE xTaskPreviouslyWoken 
-                                );
-
- * - * Post an item on a queue. It is safe to use this function from within an - * interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param cTaskPreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. See the file serial .c in the - * PC port for a good example of this mechanism. - * - * @return pdTRUE if a task was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- portCHAR cIn;
- portBASE_TYPE xTaskWokenByPost;
-
-    // We have not woken a task at the start of the ISR.
-    cTaskWokenByPost = pdFALSE;
-
-    // Loop until the buffer is empty.
-    do
-    {
-        // Obtain a byte from the buffer.
-        cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );						
-
-        // Post the byte.  The first time round the loop cTaskWokenByPost
-        // will be pdFALSE.  If the queue send causes a task to wake we do
-        // not want the task to run until we have finished the ISR, so
-        // xQueueSendFromISR does not cause a context switch.  Also we 
-        // don't want subsequent posts to wake any other tasks, so we store
-        // the return value back into cTaskWokenByPost so xQueueSendFromISR
-        // knows not to wake any task the next iteration of the loop.
-        xTaskWokenByPost = xQueueSendFromISR( xRxQueue, &cIn, cTaskWokenByPost );
-
-    } while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-    // Now the buffer is empty we can switch context if necessary.
-    if( cTaskWokenByPost )
-    {
-        taskYIELD ();
-    }
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ); - -/** - * queue. h - * 
- portBASE_TYPE xQueueReceiveFromISR( 
-                                       xQueueHandle pxQueue, 
-                                       void *pcBuffer, 
-                                       portBASE_TYPE *pxTaskWoken 
-                                   ); 
- *
- * - * Receive an item from a queue. It is safe to use this function from within an - * interrupt service routine. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pcBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param pcTaskWoken A task may be blocked waiting for space to become - * available on the queue. If xQueueReceiveFromISR causes such a task to - * unblock *pcTaskWoken will get set to pdTRUE, otherwise *pcTaskWoken will - * remain unchanged. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- 
- xQueueHandle xQueue;
- 
- // Function to create a queue and post some values.
- void vAFunction( void *pvParameters )
- {
- portCHAR cValueToPost;
- const portTickType xBlockTime = ( portTickType )0xff;
-
-    // Create a queue capable of containing 10 characters.
-    xQueue = xQueueCreate( 10, sizeof( portCHAR ) );
-    if( xQueue == 0 )
-    {
-        // Failed to create the queue.
-    }
-
-    // ...
-
-    // Post some characters that will be used within an ISR.  If the queue
-    // is full then this task will block for xBlockTime ticks.
-    cValueToPost = 'a';
-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
-    cValueToPost = 'b';
-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
-
-    // ... keep posting characters ... this task may block when the queue
-    // becomes full.
-
-    cValueToPost = 'c';
-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
- }
-
- // ISR that outputs all the characters received on the queue. 
- void vISR_Routine( void )
- {
- portBASE_TYPE xTaskWokenByReceive = pdFALSE;
- portCHAR cRxedChar;
-
-    while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )
-    {
-        // A character was received.  Output the character now.
-        vOutputCharacter( cRxedChar );
-
-        // If removing the character from the queue woke the task that was 
-        // posting onto the queue cTaskWokenByReceive will have been set to
-        // pdTRUE.  No matter how many times this loop iterates only one
-        // task will be woken.
-    }
-
-    if( cTaskWokenByPost != ( portCHAR ) pdFALSE;
-    {
-        taskYIELD ();
-    }
- }
-
- * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pcBuffer, signed portBASE_TYPE *pxTaskWoken ); - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/semphr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/semphr.h deleted file mode 100644 index e9e0159f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/semphr.h +++ /dev/null @@ -1,289 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include "queue.h" - -#ifndef SEMAPHORE_H -#define SEMAPHORE_H - -typedef xQueueHandle xSemaphoreHandle; - -#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( unsigned portCHAR ) 1 ) -#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( unsigned portCHAR ) 0 ) -#define semGIVE_BLOCK_TIME ( ( portTickType ) 0 ) - - -/** - * semphr. h - * 
vSemaphoreCreateBinary( xSemaphoreHandle xSemaphore )
- * - * Macro that implements a semaphore by using the existing queue mechanism. - * The queue length is 1 as this is a binary semaphore. The data size is 0 - * as we don't want to actually store any data - we just want to know if the - * queue is empty or full. - * - * @param xSemaphore Handle to the created semaphore. Should be of type xSemaphoreHandle. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().
-    // This is a macro so pass the variable in directly.
-    vSemaphoreCreateBinary( xSemaphore );
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.  
-    }
- }
-
- * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary - * \ingroup Semaphores - */ -#define vSemaphoreCreateBinary( xSemaphore ) { \ - xSemaphore = xQueueCreate( ( unsigned portCHAR ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH ); \ - if( xSemaphore != NULL ) \ - { \ - xSemaphoreGive( xSemaphore ); \ - } \ - } - -/** - * semphr. h - * xSemaphoreTake( - * xSemaphoreHandle xSemaphore, - * portTickType xBlockTime - * ) - * - * Macro to obtain a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (). - * - * @param xSemaphore A handle to the semaphore being obtained. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @param xBlockTime The time in ticks to wait for the semaphore to become - * available. The macro portTICK_RATE_MS can be used to convert this to a - * real time. A block time of zero can be used to poll the semaphore. - * - * @return pdTRUE if the semaphore was obtained. pdFALSE if xBlockTime - * expired without the semaphore becoming available. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore = NULL;
-
- // A task that creates a semaphore.
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    vSemaphoreCreateBinary( xSemaphore );
- }
-
- // A task that uses the semaphore.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xSemaphore != NULL )
-    {
-        // See if we can obtain the semaphore.  If the semaphore is not available
-        // wait 10 ticks to see if it becomes free.	
-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the semaphore and can now access the
-            // shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource.  Release the 
-            // semaphore.
-            xSemaphoreGive( xSemaphore );
-        }
-        else
-        {
-            // We could not obtain the semaphore and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
-
- * \defgroup xSemaphoreTake xSemaphoreTake - * \ingroup Semaphores - */ -#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueReceive( ( xQueueHandle ) xSemaphore, NULL, xBlockTime ) - -/** - * semphr. h - * 
xSemaphoreGive( xSemaphoreHandle xSemaphore )
- * - * Macro to release a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (), and obtained using sSemaphoreTake (). - * - * This must not be used from an ISR. See xSemaphoreGiveFromISR () for - * an alternative which can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @return pdTRUE if the semaphore was released. pdFALSE if an error occurred. - * Semaphores are implemented using queues. An error can occur if there is - * no space on the queue to post a message - indicating that the - * semaphore was not first obtained correctly. - * - * Example usage: - 
- xSemaphoreHandle xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    vSemaphoreCreateBinary( xSemaphore );
-
-    if( xSemaphore != NULL )
-    {
-        if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-        {
-            // We would expect this call to fail because we cannot give
-            // a semaphore without first "taking" it!
-        }
-
-        // Obtain the semaphore - don't block if the semaphore is not
-        // immediately available.
-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 0 ) )
-        {
-            // We now have the semaphore and can access the shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource so can free the
-            // semaphore.
-            if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-            {
-                // We would not expect this call to fail because we must have
-                // obtained the semaphore to get here.
-            }
-        }
-    }
- }
-
- * \defgroup xSemaphoreGive xSemaphoreGive - * \ingroup Semaphores - */ -#define xSemaphoreGive( xSemaphore ) xQueueSend( ( xQueueHandle ) xSemaphore, NULL, semGIVE_BLOCK_TIME ) - -/** - * semphr. h - * 
- xSemaphoreGiveFromISR( 
-                          xSemaphoreHandle xSemaphore, 
-                          portSHORT sTaskPreviouslyWoken 
-                      )
- * - * Macro to release a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (), and obtained using xSemaphoreTake (). - * - * This macro can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @param sTaskPreviouslyWoken This is included so an ISR can make multiple calls - * to xSemaphoreGiveFromISR () from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. See the file serial .c in the - * PC port for a good example of using xSemaphoreGiveFromISR (). - * - * @return pdTRUE if a task was woken by releasing the semaphore. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 
- #define LONG_TIME 0xffff
- #define TICKS_TO_WAIT	10
- xSemaphoreHandle xSemaphore = NULL;
-
- // Repetitive task.
- void vATask( void * pvParameters )
- {
-    for( ;; )
-    {
-        // We want this task to run every 10 ticks or a timer.  The semaphore 
-        // was created before this task was started
-
-        // Block waiting for the semaphore to become available.
-        if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )
-        {
-            // It is time to execute.
-
-            // ...
-
-            // We have finished our task.  Return to the top of the loop where
-            // we will block on the semaphore until it is time to execute 
-            // again.
-        }
-    }
- }
-
- // Timer ISR
- void vTimerISR( void * pvParameters )
- {
- static unsigned portCHAR ucLocalTickCount = 0;
-
-    // A timer tick has occurred.
-
-    // ... Do other time functions.
-
-    // Is it time for vATask () to run?
-    ucLocalTickCount++;
-    if( ucLocalTickCount >= TICKS_TO_WAIT )
-    {
-        // Unblock the task by releasing the semaphore.
-        xSemaphoreGive( xSemaphore );
-
-        // Reset the count so we release the semaphore again in 10 ticks time.
-        ucLocalTickCount = 0;
-    }
- }
-
- * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR - * \ingroup Semaphores - */ -#define xSemaphoreGiveFromISR( xSemaphore, xTaskPreviouslyWoken ) xQueueSendFromISR( ( xQueueHandle ) xSemaphore, NULL, xTaskPreviouslyWoken ) - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/task.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/task.h deleted file mode 100644 index 811f499f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/include/task.h +++ /dev/null @@ -1,906 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef TASK_H -#define TASK_H - -#include "portable.h" -#include "list.h" - -/*----------------------------------------------------------- - * MACROS AND DEFINITIONS - *----------------------------------------------------------*/ - -#define tskKERNEL_VERSION_NUMBER "V3.2.4" - -/** - * task. h - * - * Type by which tasks are referenced. For example, a call to xTaskCreate - * returns (via a pointer parameter) an xTaskHandle variable that can then - * be used as a parameter to vTaskDelete to delete the task. - * - * \page xTaskHandle xTaskHandle - * \ingroup Tasks - */ -typedef void * xTaskHandle; - -/* - * Defines the priority used by the idle task. This must not be modified. - * - * \ingroup TaskUtils - */ -#define tskIDLE_PRIORITY ( ( unsigned portBASE_TYPE ) 0 ) - -/** - * task. h - * - * Macro for forcing a context switch. - * - * \page taskYIELD taskYIELD - * \ingroup SchedulerControl - */ -#define taskYIELD() portYIELD() - -/** - * task. h - * - * Macro to mark the start of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskENTER_CRITICAL taskENTER_CRITICAL - * \ingroup SchedulerControl - */ -#define taskENTER_CRITICAL() portENTER_CRITICAL() - -/** - * task. h - * - * Macro to mark the end of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskEXIT_CRITICAL taskEXIT_CRITICAL - * \ingroup SchedulerControl - */ -#define taskEXIT_CRITICAL() portEXIT_CRITICAL() - -/** - * task. h - * - * Macro to disable all maskable interrupts. - * - * \page taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS() - -/** - * task. h - * - * Macro to enable microcontroller interrupts. - * - * \page taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS() - - -/*----------------------------------------------------------- - * TASK CREATION API - *----------------------------------------------------------*/ - -/** - * task. h - *
- portBASE_TYPE xTaskCreate(
-                              pdTASK_CODE pvTaskCode,
-                              const portCHAR * const pcName,
-                              unsigned portSHORT usStackDepth,
-                              void *pvParameters,
-                              unsigned portBASE_TYPE uxPriority,
-                              xTaskHandle *pvCreatedTask
-                          );
- * - * Create a new task and add it to the list of tasks that are ready to run. - * - * @param pvTaskCode Pointer to the task entry function. Tasks - * must be implemented to never return (i.e. continuous loop). - * - * @param pcName A descriptive name for the task. This is mainly used to - * facilitate debugging. Max length defined by tskMAX_TASK_NAME_LEN - default - * is 16. - * - * @param usStackDepth The size of the task stack specified as the number of - * variables the stack can hold - not the number of bytes. For example, if - * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes - * will be allocated for stack storage. - * - * @param pvParameters Pointer that will be used as the parameter for the task - * being created. - * - * @param uxPriority The priority at which the task should run. - * - * @param pvCreatedTask Used to pass back a handle by which the created task - * can be referenced. - * - * @return pdPASS if the task was successfully created and added to a ready - * list, otherwise an error code defined in the file errors. h - * - * Example usage: - 
- // Task to be created.
- void vTaskCode( void * pvParameters )
- {
-     for( ;; )
-     {
-         // Task code goes here.
-     }
- }
-
- // Function that creates a task.
- void vOtherFunction( void )
- {
- unsigned char ucParameterToPass;
- xTaskHandle xHandle;
-		
-     // Create the task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );
-		
-     // Use the handle to delete the task.
-     vTaskDelete( xHandle );
- }
-
- * \defgroup xTaskCreate xTaskCreate - * \ingroup Tasks - */ -signed portBASE_TYPE xTaskCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pvCreatedTask ); - -/** - * task. h - * 
void vTaskDelete( xTaskHandle pxTask );
- * - * INCLUDE_vTaskDelete must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Remove a task from the RTOS real time kernels management. The task being - * deleted will be removed from all ready, blocked, suspended and event lists. - * - * NOTE: The idle task is responsible for freeing the kernel allocated - * memory from tasks that have been deleted. It is therefore important that - * the idle task is not starved of microcontroller processing time if your - * application makes any calls to vTaskDelete (). Memory allocated by the - * task code is not automatically freed, and should be freed before the task - * is deleted. - * - * See the demo application file death.c for sample code that utilises - * vTaskDelete (). - * - * @param pxTask The handle of the task to be deleted. Passing NULL will - * cause the calling task to be deleted. - * - * Example usage: - 
- void vOtherFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create the task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-		
-     // Use the handle to delete the task.
-     vTaskDelete( xHandle );
- }
-
- * \defgroup vTaskDelete vTaskDelete - * \ingroup Tasks - */ -void vTaskDelete( xTaskHandle pxTask ); - - -/*----------------------------------------------------------- - * TASK CONTROL API - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskDelay( portTickType xTicksToDelay );
- * - * Delay a task for a given number of ticks. The actual time that the - * task remains blocked depends on the tick rate. The constant - * portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * INCLUDE_vTaskDelay must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * @param xTicksToDelay The amount of time, in tick periods, that - * the calling task should block. - * - * Example usage: - 
- // Wait 10 ticks before performing an action.
- // NOTE:
- // This is for demonstration only and would be better achieved
- // using vTaskDelayUntil ().
- void vTaskFunction( void * pvParameters )
- {
- portTickType xDelay, xNextTime;
-
-     // Calc the time at which we want to perform the action
-     // next.
-     xNextTime = xTaskGetTickCount () + ( portTickType ) 10;
-
-     for( ;; )
-     {
-         xDelay = xNextTime - xTaskGetTickCount ();
-         xNextTime += ( portTickType ) 10;
-
-         // Guard against overflow
-         if( xDelay <= ( portTickType ) 10 )
-         {
-             vTaskDelay( xDelay );
-         }
-
-         // Perform action here.
-     }
- }
-
- * \defgroup vTaskDelay vTaskDelay - * \ingroup TaskCtrl - */ -void vTaskDelay( portTickType xTicksToDelay ); - -/** - * task. h - * 
void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement );
- * - * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Delay a task until a specified time. This function can be used by cyclical - * tasks to ensure a constant execution frequency. - * - * This function differs from vTaskDelay () in one important aspect: vTaskDelay () will - * cause a task to block for the specified number of ticks from the time vTaskDelay () is - * called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed - * execution frequency as the time between a task starting to execute and that task - * calling vTaskDelay () may not be fixed [the task may take a different path though the - * code between calls, or may get interrupted or preempted a different number of times - * each time it executes]. - * - * Whereas vTaskDelay () specifies a wake time relative to the time at which the function - * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to - * unblock. - * - * The constant portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the - * task was last unblocked. The variable must be initialised with the current time - * prior to its first use (see the example below). Following this the variable is - * automatically updated within vTaskDelayUntil (). - * - * @param xTimeIncrement The cycle time period. The task will be unblocked at - * time *pxPreviousWakeTime + xTimeIncrement. Calling vTaskDelayUntil with the - * same xTimeIncrement parameter value will cause the task to execute with - * a fixed interface period. - * - * Example usage: - 
- // Perform an action every 10 ticks.
- void vTaskFunction( void * pvParameters )
- {
- portTickType xLastWakeTime;
- const portTickType xFrequency = 10;
-
-     // Initialise the xLastWakeTime variable with the current time.
-     xLastWakeTime = xTaskGetTickCount ();
-     for( ;; )
-     {
-         // Wait for the next cycle.
-         vTaskDelayUntil( &xLastWakeTime, xFrequency );
-
-         // Perform action here.
-     }
- }
-
- * \defgroup vTaskDelayUntil vTaskDelayUntil - * \ingroup TaskCtrl - */ -void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement ); - -/** - * task. h - * 
unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask );
- * - * INCLUDE_xTaskPriorityGet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Obtain the priority of any task. - * - * @param pxTask Handle of the task to be queried. Passing a NULL - * handle results in the priority of the calling task being returned. - * - * @return The priority of pxTask. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create a task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-		
-     // ...
-
-     // Use the handle to obtain the priority of the created task.
-     // It was created with tskIDLE_PRIORITY, but may have changed
-     // it itself.
-     if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )
-     {
-         // The task has changed it's priority.
-     }
-
-     // ...
-
-     // Is our priority higher than the created task?
-     if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )
-     {
-         // Our priority (obtained using NULL handle) is higher.
-     }
- }
-
- * \defgroup uxTaskPriorityGet uxTaskPriorityGet - * \ingroup TaskCtrl - */ -unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ); - -/** - * task. h - * 
void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );
- * - * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Set the priority of any task. - * - * A context switch will occur before the function returns if the priority - * being set is higher than the currently executing task. - * - * @param pxTask Handle to the task for which the priority is being set. - * Passing a NULL handle results in the priority of the calling task being set. - * - * @param uxNewPriority The priority to which the task will be set. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create a task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-     // ...
-
-     // Use the handle to raise the priority of the created task.
-     vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );
-
-     // ...
-
-     // Use a NULL handle to raise our priority to the same value.
-     vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
- }
-
- * \defgroup vTaskPrioritySet vTaskPrioritySet - * \ingroup TaskCtrl - */ -void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ); - -/** - * task. h - * 
void vTaskSuspend( xTaskHandle pxTaskToSuspend );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Suspend any task. When suspended a task will never get any microcontroller - * processing time, no matter what its priority. - * - * Calls to vTaskSuspend are not accumulative - - * i.e. calling vTaskSuspend () twice on the same task still only requires one - * call to vTaskResume () to ready the suspended task. - * - * @param pxTaskToSuspend Handle to the task being suspended. Passing a NULL - * handle will cause the calling task to be suspended. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create a task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-		
-     // ...
-
-     // Use the handle to suspend the created task.
-     vTaskSuspend( xHandle );
-
-     // ...
-		
-     // The created task will not run during this period, unless
-     // another task calls vTaskResume( xHandle ).
-		
-     //...
-		
-
-     // Suspend ourselves.
-     vTaskSuspend( NULL );
-
-     // We cannot get here unless another task calls vTaskResume
-     // with our handle as the parameter.
- }
-
- * \defgroup vTaskSuspend vTaskSuspend - * \ingroup TaskCtrl - */ -void vTaskSuspend( xTaskHandle pxTaskToSuspend ); - -/** - * task. h - * 
void vTaskResume( xTaskHandle pxTaskToResume );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Resumes a suspended task. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * vTaskResume (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * Example usage: - 
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-		
-     // Create a task, storing the handle.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-		
-     // ...
-
-     // Use the handle to suspend the created task.
-     vTaskSuspend( xHandle );
-
-     // ...
-	
-     // The created task will not run during this period, unless
-     // another task calls vTaskResume( xHandle ).
-		
-     //...
-		
-
-     // Resume the suspended task ourselves.
-     vTaskResume( xHandle );
-
-     // The created task will once again get microcontroller processing
-     // time in accordance with it priority within the system.
- }
-
- * \defgroup vTaskResume vTaskResume - * \ingroup TaskCtrl - */ -void vTaskResume( xTaskHandle pxTaskToResume ); - -/*----------------------------------------------------------- - * SCHEDULER CONTROL - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskStartScheduler( void );
- * - * Starts the real time kernel tick processing. After calling the kernel - * has control over which tasks are executed and when. This function - * does not return until an executing task calls vTaskEndScheduler (). - * - * At least one task should be created via a call to xTaskCreate () - * before calling vTaskStartScheduler (). The idle task is created - * automatically when the first application task is created. - * - * See the demo application file main.c for an example of creating - * tasks and starting the kernel. - * - * Example usage: - 
- void vAFunction( void )
- {
-     // Create at least one task before starting the kernel.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-     // Start the real time kernel with preemption.
-     vTaskStartScheduler ();
-
-     // Will not get here unless a task calls vTaskEndScheduler ()
- }
-
- * - * \defgroup vTaskStartScheduler vTaskStartScheduler - * \ingroup SchedulerControl - */ -void vTaskStartScheduler( void ); - -/** - * task. h - * 
void vTaskEndScheduler( void );
- * - * Stops the real time kernel tick. All created tasks will be automatically - * deleted and multitasking (either preemptive or cooperative) will - * stop. Execution then resumes from the point where vTaskStartScheduler () - * was called, as if vTaskStartScheduler () had just returned. - * - * See the demo application file main. c in the demo/PC directory for an - * example that uses vTaskEndScheduler (). - * - * vTaskEndScheduler () requires an exit function to be defined within the - * portable layer (see vPortEndScheduler () in port. c for the PC port). This - * performs hardware specific operations such as stopping the kernel tick. - * - * vTaskEndScheduler () will cause all of the resources allocated by the - * kernel to be freed - but will not free resources allocated by application - * tasks. - * - * Example usage: - 
- void vTaskCode( void * pvParameters )
- {
-     for( ;; )
-     {
-         // Task code goes here.
-
-         // At some point we want to end the real time kernel processing
-         // so call ...
-         vTaskEndScheduler ();
-     }
- }
-
- void vAFunction( void )
- {
-     // Create at least one task before starting the kernel.
-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-     // Start the real time kernel with preemption.
-     vTaskStartScheduler ();
-
-     // Will only get here when the vTaskCode () task has called
-     // vTaskEndScheduler ().  When we get here we are back to single task
-     // execution.
- }
-
- * - * \defgroup vTaskEndScheduler vTaskEndScheduler - * \ingroup SchedulerControl - */ -void vTaskEndScheduler( void ); - -/** - * task. h - * 
void vTaskSuspendAll( void );
- * - * Suspends all real time kernel activity while keeping interrupts (including the - * kernel tick) enabled. - * - * After calling vTaskSuspendAll () the calling task will continue to execute - * without risk of being swapped out until a call to xTaskResumeAll () has been - * made. - * - * Example usage: - 
- void vTask1( void * pvParameters )
- {
-     for( ;; )
-     {
-         // Task code goes here.
-
-         // ...
-
-         // At some point the task wants to perform a long operation during
-         // which it does not want to get swapped out.  It cannot use
-         // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-         // operation may cause interrupts to be missed - including the
-         // ticks.
-
-         // Prevent the real time kernel swapping out the task.
-         vTaskSuspendAll ();
-
-         // Perform the operation here.  There is no need to use critical
-         // sections as we have all the microcontroller processing time.
-         // During this time interrupts will still operate and the kernel
-         // tick count will be maintained.
-
-         // ...
-
-         // The operation is complete.  Restart the kernel.
-         xTaskResumeAll ();
-     }
- }
-
- * \defgroup vTaskSuspendAll vTaskSuspendAll - * \ingroup SchedulerControl - */ -void vTaskSuspendAll( void ); - -/** - * task. h - * 
portCHAR xTaskResumeAll( void );
- * - * Resumes real time kernel activity following a call to vTaskSuspendAll (). - * After a call to vTaskSuspendAll () the kernel will take control of which - * task is executing at any time. - * - * @return If resuming the scheduler caused a context switch then pdTRUE is - * returned, otherwise pdFALSE is returned. - * - * Example usage: - 
- void vTask1( void * pvParameters )
- {
-     for( ;; )
-     {
-         // Task code goes here.
-
-         // ...
-
-         // At some point the task wants to perform a long operation during
-         // which it does not want to get swapped out.  It cannot use
-         // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-         // operation may cause interrupts to be missed - including the
-         // ticks.
-
-         // Prevent the real time kernel swapping out the task.
-         vTaskSuspendAll ();
-
-         // Perform the operation here.  There is no need to use critical
-         // sections as we have all the microcontroller processing time.
-         // During this time interrupts will still operate and the real
-         // time kernel tick count will be maintained.
-
-         // ...
-
-         // The operation is complete.  Restart the kernel.  We want to force
-         // a context switch - but there is no point if resuming the scheduler
-         // caused a context switch already.
-         if( !xTaskResumeAll () )
-         {
-              taskYIELD ();
-         }
-     }
- }
-
- * \defgroup xTaskResumeAll xTaskResumeAll - * \ingroup SchedulerControl - */ -signed portBASE_TYPE xTaskResumeAll( void ); - - -/*----------------------------------------------------------- - * TASK UTILITIES - *----------------------------------------------------------*/ - -/** - * task. h - * 
volatile portTickType xTaskGetTickCount( void );
- * - * @return The count of ticks since vTaskStartScheduler was called. - * - * \page xTaskGetTickCount xTaskGetTickCount - * \ingroup TaskUtils - */ -portTickType xTaskGetTickCount( void ); - -/** - * task. h - * 
unsigned portSHORT uxTaskGetNumberOfTasks( void );
- * - * @return The number of tasks that the real time kernel is currently managing. - * This includes all ready, blocked and suspended tasks. A task that - * has been deleted but not yet freed by the idle task will also be - * included in the count. - * - * \page uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks - * \ingroup TaskUtils - */ -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ); - -/** - * task. h - * 
void vTaskList( portCHAR *pcWriteBuffer );
- * - * configUSE_TRACE_FACILITY, INCLUDE_vTaskDelete and INCLUDE_vTaskSuspend - * must all be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * NOTE: This function will disable interrupts for its duration. It is - * not intended for normal application runtime use but as a debug aid. - * - * Lists all the current tasks, along with their current state and stack - * usage high water mark. - * - * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or - * suspended ('S'). - * - * @param pcWriteBuffer A buffer into which the above mentioned details - * will be written, in ascii form. This buffer is assumed to be large - * enough to contain the generated report. Approximately 40 bytes per - * task should be sufficient. - * - * \page vTaskList vTaskList - * \ingroup TaskUtils - */ -void vTaskList( signed portCHAR *pcWriteBuffer ); - -/** - * task. h - * 
void vTaskStartTrace( portCHAR * pcBuffer, unsigned portBASE_TYPE uxBufferSize );
- * - * Starts a real time kernel activity trace. The trace logs the identity of - * which task is running when. - * - * The trace file is stored in binary format. A separate DOS utility called - * convtrce.exe is used to convert this into a tab delimited text file which - * can be viewed and plotted in a spread sheet. - * - * @param pcBuffer The buffer into which the trace will be written. - * - * @param ulBufferSize The size of pcBuffer in bytes. The trace will continue - * until either the buffer in full, or ulTaskEndTrace () is called. - * - * \page vTaskStartTrace vTaskStartTrace - * \ingroup TaskUtils - */ -void vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize ); - -/** - * task. h - * 
unsigned portLONG ulTaskEndTrace( void );
- * - * Stops a kernel activity trace. See vTaskStartTrace (). - * - * @return The number of bytes that have been written into the trace buffer. - * - * \page usTaskEndTrace usTaskEndTrace - * \ingroup TaskUtils - */ -unsigned portLONG ulTaskEndTrace( void ); - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - *----------------------------------------------------------*/ - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Called from the real time kernel tick (either preemptive or cooperative), - * this increments the tick count and checks if any tasks that are blocked - * for a finite period required removing from a blocked list and placing on - * a ready list. - */ -inline void vTaskIncrementTick( void ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes the calling task from the ready list and places it both - * on the list of tasks waiting for a particular event, and the - * list of delayed tasks. The task will be removed from both lists - * and replaced on the ready list should either the event occur (and - * there be no higher priority tasks waiting on the same event) or - * the delay period expires. - * - * @param pxEventList The list containing tasks that are blocked waiting - * for the event to occur. - * - * @param xTicksToWait The maximum amount of time that the task should wait - * for the event to occur. This is specified in kernel ticks,the constant - * portTICK_RATE_MS can be used to convert kernel ticks into a real time - * period. - */ -void vTaskPlaceOnEventList( xList *pxEventList, portTickType xTicksToWait ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes a task from both the specified event list and the list of blocked - * tasks, and places it on a ready queue. - * - * xTaskRemoveFromEventList () will be called if either an event occurs to - * unblock a task, or the block timeout period expires. - * - * @return pdTRUE if the task being removed has a higher priority than the task - * making the call, otherwise pdFALSE. - */ -signed portBASE_TYPE xTaskRemoveFromEventList( const xList *pxEventList ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * INCLUDE_vTaskCleanUpResources and INCLUDE_vTaskSuspend must be defined as 1 - * for this function to be available. - * See the configuration section for more information. - * - * Empties the ready and delayed queues of task control blocks, freeing the - * memory allocated for the task control block and task stacks as it goes. - */ -void vTaskCleanUpResources( void ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Sets the pointer to the current TCB to the TCB of the highest priority task - * that is ready to run. - */ -inline void vTaskSwitchContext( void ); - -/* - * Return the handle of the calling task. - */ -xTaskHandle xTaskGetCurrentTaskHandle( void ); - - -#endif /* TASK_H */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/list.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/list.c deleted file mode 100644 index 2ffcc225..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/list.c +++ /dev/null @@ -1,195 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.2.0 - - + Removed the volatile modifier from the function parameters. This was - only ever included to prevent compiler warnings. Now warnings are - removed by casting parameters where the calls are made. - - + prvListGetOwnerOfNextEntry() and prvListGetOwnerOfHeadEntry() have been - removed from the c file and added as macros to the h file. - - + uxNumberOfItems has been added to the list structure. This removes the - need for a pointer comparison when checking if a list is empty, and so - is slightly faster. - - + Removed the NULL check in vListRemove(). This makes the call faster but - necessitates any application code utilising the list implementation to - ensure NULL pointers are not passed. - -Changes from V2.0.0 - - + Double linked the lists to allow faster removal item removal. - -Changes from V2.6.1 - - + Make use of the new portBASE_TYPE definition where ever appropriate. - -Changes from V3.0.0 - - + API changes as described on the FreeRTOS.org WEB site. -*/ - -#include -#include "FreeRTOS.h" -#include "list.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -void vListInitialise( xList *pxList ) -{ - /* The list structure contains a list item which is used to mark the - end of the list. To initialise the list the list end is inserted - as the only list entry. */ - pxList->pxHead = &( pxList->xListEnd ); - pxList->pxIndex = pxList->pxHead; - - /* The list end value is the highest possible value in the list to - ensure it remains at the end of the list. */ - pxList->xListEnd.xItemValue = portMAX_DELAY; - - /* The list end next and previous pointers point to itself so we know - when the list is empty. */ - pxList->xListEnd.pxNext = &( pxList->xListEnd ); - pxList->xListEnd.pxPrevious = &( pxList->xListEnd ); - - /* The list head will never get used and has no owner. */ - pxList->xListEnd.pvOwner = NULL; - - /* Make sure the marker items are not mistaken for being on a list. */ - vListInitialiseItem( ( xListItem * ) &( pxList->xListEnd ) ); - - pxList->uxNumberOfItems = 0; -} -/*-----------------------------------------------------------*/ - -void vListInitialiseItem( xListItem *pxItem ) -{ - /* Make sure the list item is not recorded as being on a list. */ - pxItem->pvContainer = NULL; -} -/*-----------------------------------------------------------*/ - -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem * pxIndex; - - /* Insert a new list item into pxList, but rather than sort the list, - makes the new list item the last item to be removed by a call to - pvListGetOwnerOfNextEntry. This means it has to be the item pointed to by - the pxIndex member. */ - pxIndex = pxList->pxIndex; - - pxNewListItem->pxNext = pxIndex->pxNext; - pxNewListItem->pxPrevious = pxList->pxIndex; - pxIndex->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxIndex->pxNext = ( volatile xListItem * ) pxNewListItem; - pxList->pxIndex = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListInsert( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem *pxIterator; -register portTickType xValueOfInsertion; - - /* Insert the new list item into the list, sorted in ulListItem order. */ - xValueOfInsertion = pxNewListItem->xItemValue; - - /* If the list already contains a list item with the same item value then - the new list item should be placed after it. This ensures that TCB's which - are stored in ready lists (all of which have the same ulListItem value) - get an equal share of the CPU. However, if the xItemValue is the same as - the back marker the iteration loop below will not end. This means we need - to guard against this by checking the value first and modifying the - algorithm slightly if necessary. */ - if( xValueOfInsertion == portMAX_DELAY ) - { - for( pxIterator = pxList->pxHead; pxIterator->pxNext->xItemValue < xValueOfInsertion; pxIterator = pxIterator->pxNext ) - { - /* There is nothing to do here, we are just iterating to the - wanted insertion position. */ - } - } - else - { - for( pxIterator = pxList->pxHead; pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) - { - /* There is nothing to do here, we are just iterating to the - wanted insertion position. */ - } - } - - pxNewListItem->pxNext = pxIterator->pxNext; - pxNewListItem->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxNewListItem->pxPrevious = pxIterator; - pxIterator->pxNext = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. This allows fast removal of the - item later. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListRemove( xListItem *pxItemToRemove ) -{ -xList * pxList; - - pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; - pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; - - /* The list item knows which list it is in. Obtain the list from the list - item. */ - pxList = ( xList * ) pxItemToRemove->pvContainer; - - /* Make sure the index is left pointing to a valid item. */ - if( pxList->pxIndex == pxItemToRemove ) - { - pxList->pxIndex = pxItemToRemove->pxPrevious; - } - - pxItemToRemove->pvContainer = NULL; - ( pxList->uxNumberOfItems )--; -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/GCC/ARM7_STR71X/port.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/GCC/ARM7_STR71X/port.c deleted file mode 100644 index cd512764..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/GCC/ARM7_STR71X/port.c +++ /dev/null @@ -1,206 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - Modification for STR71X/GCC - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - - -/*----------------------------------------------------------- - * Implementation of functions defined in portable.h for the ARM7 port. - * - * Components that can be compiled to either ARM or THUMB mode are - * contained in this file. The ISR routines, which can only be compiled - * to ARM mode are contained in portISR.c. - *----------------------------------------------------------*/ - -/* - Changes from V2.5.2 - - + ulCriticalNesting is now saved as part of the task context, as is - therefore added to the initial task stack during pxPortInitialiseStack. - - Changes from V3.2.2 - - + Bug fix - The prescale value for the timer setup is now written to T0_PR - instead of T0_PC. This bug would have had no effect unless a prescale - value was actually used. -*/ - - -/* Standard includes. */ -#include - -/* Scheduler includes. */ -#include "FreeRTOS.h" -#include "task.h" - -/* Port specific includes */ -#include "eic.h" -#include "wdg.h" - -/* Constants required to setup the task context. */ -#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */ -#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 ) -#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 ) -#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 ) - -/*-----------------------------------------------------------*/ - -/* Setup the timer to generate the tick interrupts. */ -static void prvSetupTimerInterrupt( void ); - -/* - * The scheduler can only be started from ARM mode, so - * vPortISRStartFirstSTask() is defined in portISR.c. - */ -extern void vPortISRStartFirstTask( void ); - -/*-----------------------------------------------------------*/ - -/* - * Initialise the stack of a task to look exactly as if a call to - * portSAVE_CONTEXT had been called. - * - * See header file for description. - */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) -{ -portSTACK_TYPE *pxOriginalTOS; - - pxOriginalTOS = pxTopOfStack; - - /* Setup the initial stack of the task. The stack is set exactly as - expected by the portRESTORE_CONTEXT() macro. */ - - /* First on the stack is the return address - which in this case is the - start of the task. The offset is added to make the return address appear - as it would within an IRQ ISR. */ - *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; - pxTopOfStack--; - - *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */ - pxTopOfStack--; - - /* When the task starts is will expect to find the function parameter in - R0. */ - *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */ - pxTopOfStack--; - - /* The last thing onto the stack is the status register, which is set for - system mode, with interrupts enabled. */ - *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR; - - #ifdef THUMB_INTERWORK - { - /* We want the task to start in thumb mode. */ - *pxTopOfStack |= portTHUMB_MODE_BIT; - } - #endif - - pxTopOfStack--; - - /* Some optimisation levels use the stack differently to others. This - means the interrupt flags cannot always be stored on the stack and will - instead be stored in a variable, which is then saved as part of the - tasks context. */ - *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING; - - return pxTopOfStack; -} -/*-----------------------------------------------------------*/ - -portBASE_TYPE xPortStartScheduler( void ) -{ - /* Start the timer that generates the tick ISR. Interrupts are disabled - here already. */ - prvSetupTimerInterrupt(); - - /* Start the first task. */ - vPortISRStartFirstTask(); - - /* Should not get here! */ - return 0; -} -/*-----------------------------------------------------------*/ - -void vPortEndScheduler( void ) -{ - /* It is unlikely that the ARM port will require this function as there - is nothing to return to. */ -} -/*-----------------------------------------------------------*/ - -/*! - * Setup timer 3 to generate ticks at the required frequency. - */ -static void prvSetupTimerInterrupt( void ) -{ - /* Set the watchdog up to generate a periodic tick. */ - WDG_ECITConfig( DISABLE ); - WDG_CntOnOffConfig( DISABLE ); - WDG_PeriodValueConfig( configTICK_RATE_HZ ); - - /* Setup the tick interrupt in the EIC. */ - EIC_IRQChannelPriorityConfig( WDG_IRQChannel, 1 ); - EIC_IRQChannelConfig( WDG_IRQChannel, ENABLE ); - EIC_IRQConfig( ENABLE ); - WDG_ECITConfig( ENABLE ); - - /* Start the timer - interrupts are actually disabled at this point so - it is safe to do this here. */ - WDG_CntOnOffConfig( ENABLE ); -} -/*-----------------------------------------------------------*/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/GCC/ARM7_STR71X/portISR.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/GCC/ARM7_STR71X/portISR.c deleted file mode 100644 index 7265186e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/GCC/ARM7_STR71X/portISR.c +++ /dev/null @@ -1,217 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - Modification for STR71X/GCC - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* Scheduler includes. */ -#include "FreeRTOS.h" -#include "task.h" - -/* Port specific includes */ -#include "eic.h" -#include "wdg.h" - -/* Constants required to handle critical sections. */ -#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 ) - -/* Import global variables declared in the port file. */ -extern const portSHORT portTimerOCRDeltaValue; - -volatile unsigned portLONG ulCriticalNesting = 9999UL; - -/*-----------------------------------------------------------*/ - -/* ISR to handle manual context switches (from a call to taskYIELD()). */ -void vPortYieldProcessor( void ) __attribute__((interrupt("SWI"), naked)); - -/* - * The scheduler can only be started from ARM mode, hence the inclusion of this - * function here. - */ -void vPortISRStartFirstTask( void ); -/*-----------------------------------------------------------*/ - -void vPortISRStartFirstTask( void ) -{ - /* Simply start the scheduler. This is included here as it can only be - called from ARM mode. */ - portRESTORE_CONTEXT(); -} -/*-----------------------------------------------------------*/ - -/* - * Called by portYIELD() or taskYIELD() to manually force a context switch. - * - * When a context switch is performed from the task level the saved task - * context is made to look as if it occurred from within the tick ISR. This - * way the same restore context function can be used when restoring the context - * saved from the ISR or that saved from a call to vPortYieldProcessor. - */ -void vPortYieldProcessor( void ) -{ - /* Within an IRQ ISR the link register has an offset from the true return - address, but an SWI ISR does not. Add the offset manually so the same - ISR return code can be used in both cases. */ - asm volatile ( "ADD LR, LR, #4" ); - - /* Perform the context switch. First save the context of the current task. */ - portSAVE_CONTEXT(); - - /* Find the highest priority task that is ready to run. */ - vTaskSwitchContext(); - - /* Restore the context of the new task. */ - portRESTORE_CONTEXT(); -} -/*-----------------------------------------------------------*/ - -/* - * The ISR used for the scheduler tick depends on whether the cooperative or - * the preemptive scheduler is being used. - */ -#if configUSE_PREEMPTION == 0 - -/* The cooperative scheduler requires a normal IRQ service routine to - * simply increment the system tick. - */ -void vPortNonPreemptiveTick( void ) __attribute__ ((interrupt ("IRQ"))); -void vPortNonPreemptiveTick( void ) -{ - vTaskIncrementTick(); - - /* Clear the interrupt in the watchdog and EIC. */ - WDG->SR = 0x0000; - /* clear current interrupt pending flag for interupt source. */ - EIC->IPR |= 1 << EIC_CurrentIRQChannelValue(); -} - -#else - -/* The preemptive scheduler is defined as "naked" as the full context is - * saved on entry as part of the context switch. - */ -void vPortPreemptiveTick( void ) __attribute__((naked)); -void vPortPreemptiveTick( void ) -{ - /* Save the context of the interrupted task. */ - portSAVE_CONTEXT(); - - /* Increment the RTOS tick count, then look for the highest priority - * task that is ready to run. - */ - vTaskIncrementTick(); - vTaskSwitchContext(); - - /* Clear the interrupt in the watchdog and EIC. */ - WDG->SR = 0x0000; - /* clear current interrupt pending flag for interupt source. */ - EIC->IPR |= 1 << EIC_CurrentIRQChannelValue(); - - /* Restore the context of the new task. */ - portRESTORE_CONTEXT(); -} - -#endif -/*-----------------------------------------------------------*/ - -/* - * The interrupt management utilities can only be called from ARM mode. When - * THUMB_INTERWORK is defined the utilities are defined as functions here to - * ensure a switch to ARM mode. When THUMB_INTERWORK is not defined then - * the utilities are defined as macros in portmacro.h - as per other ports. - */ -#ifdef THUMB_INTERWORK - - void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked)); - void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked)); - - void vPortDisableInterruptsFromThumb( void ) - { - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ - asm volatile ( "ORR R0, R0, #0xC0" ); /* Disable IRQ, FIQ. */ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ - asm volatile ( "LDMIA SP!, {R0}" ); /* Pop R0. */ - asm volatile ( "BX R14" ); /* Return back to thumb. */ - } - - void vPortEnableInterruptsFromThumb( void ) - { - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ - asm volatile ( "BIC R0, R0, #0xC0" ); /* Enable IRQ, FIQ. */ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ - asm volatile ( "LDMIA SP!, {R0}" ); /* Pop R0. */ - asm volatile ( "BX R14" ); /* Return back to thumb. */ - } - -#endif /* THUMB_INTERWORK */ - -/* The code generated by the GCC compiler uses the stack in different ways at -different optimisation levels. The interrupt flags can therefore not always -be saved to the stack. Instead the critical section nesting level is stored -in a variable, which is then saved as part of the stack context. */ -void vPortEnterCritical( void ) -{ - /* Disable interrupts as per portDISABLE_INTERRUPTS(); */ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ - asm volatile ( "ORR R0, R0, #0xC0" ); /* Disable IRQ, FIQ. */ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ - asm volatile ( "LDMIA SP!, {R0}" ); /* Pop R0. */ - - /* Now interrupts are disabled ulCriticalNesting can be accessed - directly. Increment ulCriticalNesting to keep a count of how many times - portENTER_CRITICAL() has been called. */ - ulCriticalNesting++; -} - -void vPortExitCritical( void ) -{ - if( ulCriticalNesting > portNO_CRITICAL_NESTING ) - { - /* Decrement the nesting count as we are leaving a critical section. */ - ulCriticalNesting--; - - /* If the nesting level has reached zero then interrupts should be - re-enabled. */ - if( ulCriticalNesting == portNO_CRITICAL_NESTING ) - { - /* Enable interrupts as per portEXIT_CRITICAL(). */ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ - asm volatile ( "BIC R0, R0, #0xC0" ); /* Enable IRQ, FIQ. */ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ - asm volatile ( "LDMIA SP!, {R0}" ); /* Pop R0. */ - } - } -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/GCC/ARM7_STR71X/portmacro.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/GCC/ARM7_STR71X/portmacro.h deleted file mode 100644 index 500a9eeb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/GCC/ARM7_STR71X/portmacro.h +++ /dev/null @@ -1,241 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - Changes from V3.2.3 - - + Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1. -*/ - -#ifndef PORTMACRO_H -#define PORTMACRO_H - -/*----------------------------------------------------------- - * Port specific definitions. - * - * The settings in this file configure FreeRTOS correctly for the - * given hardware and compiler. - * - * These settings should not be altered. - *----------------------------------------------------------- - */ - -/* Type definitions. */ -#define portCHAR char -#define portFLOAT float -#define portDOUBLE double -#define portLONG long -#define portSHORT short -#define portSTACK_TYPE unsigned portLONG -#define portBASE_TYPE portLONG - -#if( configUSE_16_BIT_TICKS == 1 ) - typedef unsigned portSHORT portTickType; - #define portMAX_DELAY ( portTickType ) 0xffff -#else - typedef unsigned portLONG portTickType; - #define portMAX_DELAY ( portTickType ) 0xffffffff -#endif -/*-----------------------------------------------------------*/ - -/* Architecture specifics. */ -#define portSTACK_GROWTH ( -1 ) -#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) -#define portBYTE_ALIGNMENT 4 -/*-----------------------------------------------------------*/ - - -/* Scheduler utilities. */ - -/* - * portRESTORE_CONTEXT, portRESTORE_CONTEXT, portENTER_SWITCHING_ISR - * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but - * are included here for efficiency. An attempt to call one from - * THUMB mode code will result in a compile time error. - */ - -#define portRESTORE_CONTEXT() \ -{ \ -extern volatile void * volatile pxCurrentTCB; \ -extern volatile unsigned portLONG ulCriticalNesting; \ - \ - /* Set the LR to the task stack. */ \ - asm volatile ( "LDR R0, %0" : : "m" (pxCurrentTCB) ); \ - asm volatile ( "LDR LR, [R0]" ); \ - \ - /* The critical nesting depth is the first item on the stack. */ \ - /* Load it into the ulCriticalNesting variable. */ \ - asm volatile ( "LDR R0, =ulCriticalNesting" ); \ - asm volatile ( "LDMFD LR!, {R1}" ); \ - asm volatile ( "STR R1, [R0]" ); \ - \ - /* Get the SPSR from the stack. */ \ - asm volatile ( "LDMFD LR!, {R0}" ); \ - asm volatile ( "MSR SPSR, R0" ); \ - \ - /* Restore all system mode registers for the task. */ \ - asm volatile ( "LDMFD LR, {R0-R14}^" ); \ - asm volatile ( "NOP" ); \ - \ - /* Restore the return address. */ \ - asm volatile ( "LDR LR, [LR, #+60]" ); \ - \ - /* And return - correcting the offset in the LR to obtain the */ \ - /* correct address. */ \ - asm volatile ( "SUBS PC, LR, #4" ); \ - ( void ) ulCriticalNesting; \ -} -/*-----------------------------------------------------------*/ - -#define portSAVE_CONTEXT() \ -{ \ -extern volatile void * volatile pxCurrentTCB; \ -extern volatile unsigned portLONG ulCriticalNesting; \ - \ - /* Push R0 as we are going to use the register. */ \ - asm volatile ( "STMDB SP!, {R0}" ); \ - \ - /* Set R0 to point to the task stack pointer. */ \ - asm volatile ( "STMDB SP,{SP}^" ); \ - asm volatile ( "SUB SP, SP, #4" ); \ - asm volatile ( "LDMIA SP!,{R0}" ); \ - \ - /* Push the return address onto the stack. */ \ - asm volatile ( "STMDB R0!, {LR}" ); \ - \ - /* Now we have saved LR we can use it instead of R0. */ \ - asm volatile ( "MOV LR, R0" ); \ - \ - /* Pop R0 so we can save it onto the system mode stack. */ \ - asm volatile ( "LDMIA SP!, {R0}" ); \ - \ - /* Push all the system mode registers onto the task stack. */ \ - asm volatile ( "STMDB LR,{R0-LR}^"); \ - asm volatile ( "SUB LR, LR, #60" ); \ - \ - /* Push the SPSR onto the task stack. */ \ - asm volatile ( "MRS R0, SPSR" ); \ - asm volatile ( "STMDB LR!, {R0}" ); \ - \ - asm volatile ( "LDR R0, =ulCriticalNesting " ); \ - asm volatile ( "LDR R0, [R0]" ); \ - asm volatile ( "STMDB LR!, {R0}" ); \ - \ - /* Store the new top of stack for the task. */ \ - asm volatile ( "LDR R0, %0" : : "m" (pxCurrentTCB) ); \ - asm volatile ( "STR LR, [R0]" ); \ - ( void ) ulCriticalNesting; \ -} - - -/*----------------------------------------------------------- - * ISR entry and exit macros. These are only required if a task switch - * is required from the ISR. - *----------------------------------------------------------*/ - - -#define portENTER_SWITCHING_ISR() \ - /* Save the context of the interrupted task. */ \ - portSAVE_CONTEXT(); \ - \ - /* We don't know the stack requirements for the ISR, so the frame */\ - /* pointer will be set to the top of the task stack, and the stack*/\ - /* pointer left where it is. The IRQ stack will get used for any */\ - /* functions calls made by this ISR. */ \ - asm volatile ( "SUB R11, LR, #4" ); \ - { - -#define portEXIT_SWITCHING_ISR( SwitchRequired ) \ - /* If a switch is required then we just need to call */ \ - /* vTaskSwitchContext() as the context has already been */ \ - /* saved. */ \ - if( SwitchRequired ) \ - { \ - vTaskSwitchContext(); \ - } \ - } \ - /* Restore the context of which ever task is now the highest */ \ - /* priority that is ready to run. */ \ - portRESTORE_CONTEXT(); - -#define portYIELD() asm volatile ( "SWI" ); -/*-----------------------------------------------------------*/ - - -/* Critical section management. */ - -/* - * The interrupt management utilities can only be called from ARM mode. When - * THUMB_INTERWORK is defined the utilities are defined as functions in - * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not - * defined then the utilities are defined as macros here - as per other ports. - */ - -#ifdef THUMB_INTERWORK - - extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked)); - extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked)); - - #define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb() - #define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb() - -#else - - #define portDISABLE_INTERRUPTS() \ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ \ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ \ - asm volatile ( "ORR R0, R0, #0xC0" ); /* Disable IRQ, FIQ. */ \ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ \ - asm volatile ( "LDMIA SP!, {R0}" ) /* Pop R0. */ - - #define portENABLE_INTERRUPTS() \ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ \ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ \ - asm volatile ( "BIC R0, R0, #0xC0" ); /* Enable IRQ, FIQ. */ \ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ \ - asm volatile ( "LDMIA SP!, {R0}" ) /* Pop R0. */ - -#endif /* THUMB_INTERWORK */ - -extern void vPortEnterCritical( void ); -extern void vPortExitCritical( void ); - -#define portENTER_CRITICAL() vPortEnterCritical(); -#define portEXIT_CRITICAL() vPortExitCritical(); -/*-----------------------------------------------------------*/ - -/* Task function macros as described on the FreeRTOS.org WEB site. */ -#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) -#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) - -#endif /* PORTMACRO_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/MemMang/heap_1.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/MemMang/heap_1.c deleted file mode 100644 index 7be8a31b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/MemMang/heap_1.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - -Changes between V2.5.1 and V2.5.1 - - + The memory pool has been defined within a struct to ensure correct memory - alignment on 32bit systems. - -Changes between V2.6.1 and V3.0.0 - - + An overflow check has been added to ensure the next free byte variable - does not wrap around. -*/ - - -/* - * The simplest possible implementation of pvPortMalloc(). Note that this - * implementation does NOT allow allocated memory to be freed again. - * - * See heap_2.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include -#include "FreeRTOS.h" -#include "task.h" - -/* Setup the correct byte alignment mask for the defined byte alignment. */ -#if portBYTE_ALIGNMENT == 4 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0000 ) -#endif - -#ifndef heapBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static struct xRTOS_HEAP -{ - unsigned portLONG ulDummy; - unsigned portCHAR ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -static size_t xNextFreeByte = ( size_t ) 0; -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn = NULL; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - #if portBYTE_ALIGNMENT != 1 - if( xWantedSize & heapBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) ); - } - #endif - - vTaskSuspendAll(); - { - /* Check there is enough room left for the allocation. */ - if( ( ( xNextFreeByte + xWantedSize ) < configTOTAL_HEAP_SIZE ) && - ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) )/* Check for overflow. */ - { - /* Return the next free byte then increment the index past this - block. */ - pvReturn = &( xHeap.ucHeap[ xNextFreeByte ] ); - xNextFreeByte += xWantedSize; - } - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - /* Memory cannot be freed using this scheme. See heap_2.c and heap_3.c - for alternative implementations, and the memory management pages of - http://www.FreeRTOS.org for more information. */ - ( void ) pv; -} -/*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* Only required when static memory is not cleared. */ - xNextFreeByte = ( size_t ) 0; -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/MemMang/heap_2.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/MemMang/heap_2.c deleted file mode 100644 index eb581cdd..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/MemMang/heap_2.c +++ /dev/null @@ -1,236 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - * A sample implementation of pvPortMalloc() and vPortFree() that permits - * allocated blocks to be freed, but does not combine adjacent free blocks - * into a single larger block. - * - * See heap_1.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* Setup the correct byte alignment mask for the defined byte alignment. */ -#if portBYTE_ALIGNMENT == 4 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0000 ) -#endif - -#ifndef heapBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static struct xRTOS_HEAP -{ - unsigned portLONG ulDummy; - unsigned portCHAR ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -/* Define the linked list structure. This is used to link free blocks in order -of their size. */ -typedef struct A_BLOCK_LINK -{ - struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */ - size_t xBlockSize; /*<< The size of the free block. */ -} xBlockLink; - - -static const unsigned portSHORT heapSTRUCT_SIZE = ( sizeof( xBlockLink ) + ( sizeof( xBlockLink ) % portBYTE_ALIGNMENT ) ); -#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) ) - -/* Create a couple of list links to mark the start and end of the list. */ -static xBlockLink xStart, xEnd; - -/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */ - -/* - * Insert a block into the list of free blocks - which is ordered by size of - * the block. Small blocks at the start of the list and large blocks at the end - * of the list. - */ -#define prvInsertBlockIntoFreeList( pxBlockToInsert ) \ -{ \ -xBlockLink *pxIterator; \ -size_t xBlockSize; \ - \ - xBlockSize = pxBlockToInsert->xBlockSize; \ - \ - /* Iterate through the list until a block is found that has a larger size */ \ - /* than the block we are inserting. */ \ - for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock ) \ - { \ - /* There is nothing to do here - just iterate to the correct position. */ \ - } \ - \ - /* Update the list to include the block being inserted in the correct */ \ - /* position. */ \ - pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; \ - pxIterator->pxNextFreeBlock = pxBlockToInsert; \ -} -/*-----------------------------------------------------------*/ - -#define prvHeapInit() \ -{ \ -xBlockLink *pxFirstFreeBlock; \ - \ - /* xStart is used to hold a pointer to the first item in the list of free */ \ - /* blocks. The void cast is used to prevent compiler warnings. */ \ - xStart.pxNextFreeBlock = ( void * ) xHeap.ucHeap; \ - xStart.xBlockSize = ( size_t ) 0; \ - \ - /* xEnd is used to mark the end of the list of free blocks. */ \ - xEnd.xBlockSize = configTOTAL_HEAP_SIZE; \ - xEnd.pxNextFreeBlock = NULL; \ - \ - /* To start with there is a single free block that is sized to take up the \ - entire heap space. */ \ - pxFirstFreeBlock = ( void * ) xHeap.ucHeap; \ - pxFirstFreeBlock->xBlockSize = configTOTAL_HEAP_SIZE; \ - pxFirstFreeBlock->pxNextFreeBlock = &xEnd; \ -} -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink; -static portBASE_TYPE xHeapHasBeenInitialised = pdFALSE; -void *pvReturn = NULL; - - vTaskSuspendAll(); - { - /* If this is the first call to malloc then the heap will require - initialisation to setup the list of free blocks. */ - if( xHeapHasBeenInitialised == pdFALSE ) - { - prvHeapInit(); - xHeapHasBeenInitialised = pdTRUE; - } - - /* The wanted size is increased so it can contain a xBlockLink - structure in addition to the requested amount of bytes. */ - if( xWantedSize > 0 ) - { - xWantedSize += heapSTRUCT_SIZE; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - if( xWantedSize & heapBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) ); - } - } - - if( ( xWantedSize > 0 ) && ( xWantedSize < configTOTAL_HEAP_SIZE ) ) - { - /* Blocks are stored in byte order - traverse the list from the start - (smallest) block until one of adequate size is found. */ - pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; - while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock ) ) - { - pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; - } - - /* If we found the end marker then a block of adequate size was not found. */ - if( pxBlock != &xEnd ) - { - /* Return the memory space - jumping over the xBlockLink structure - at its start. */ - pvReturn = ( void * ) ( ( ( unsigned portCHAR * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE ); - - /* This block is being returned for use so must be taken our of the - list of free blocks. */ - pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; - - /* If the block is larger than required it can be split into two. */ - if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) - { - /* This block is to be split into two. Create a new block - following the number of bytes requested. The void cast is - used to prevent byte alignment warnings from the compiler. */ - pxNewBlockLink = ( void * ) ( ( ( unsigned portCHAR * ) pxBlock ) + xWantedSize ); - - /* Calculate the sizes of two blocks split from the single - block. */ - pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; - - /* Insert the new block into the list of free blocks. */ - prvInsertBlockIntoFreeList( ( pxNewBlockLink ) ); - } - } - } - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ -unsigned portCHAR *puc = ( unsigned portCHAR * ) pv; -xBlockLink *pxLink; - - if( pv ) - { - /* The memory being freed will have an xBlockLink structure immediately - before it. */ - puc -= heapSTRUCT_SIZE; - - /* This casting is to keep the compiler from issuing warnings. */ - pxLink = ( void * ) puc; - - vTaskSuspendAll(); - { - /* Add this block to the list of free blocks. */ - prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) ); - } - xTaskResumeAll(); - } -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/MemMang/heap_3.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/MemMang/heap_3.c deleted file mode 100644 index cca99ed3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/portable/MemMang/heap_3.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - - -/* - * Implementation of pvPortMalloc() and vPortFree() that relies on the - * compilers own malloc() and free() implementations. - * - * This file can only be used if the linker is configured to to generate - * a heap memory area. - * - * See heap_2.c and heap_1.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ - -#include - -#include "FreeRTOS.h" -#include "task.h" - -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn; - - vTaskSuspendAll(); - { - pvReturn = malloc( xWantedSize ); - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - if( pv ) - { - vTaskSuspendAll(); - { - free( pv ); - } - xTaskResumeAll(); - } -} - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/queue.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/queue.c deleted file mode 100644 index cd9fa706..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/queue.c +++ /dev/null @@ -1,645 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.01 - - + More use of 8bit data types. - + Function name prefixes changed where the data type returned has changed. - -Changed from V2.0.0 - - + Added the queue locking mechanism and make more use of the scheduler - suspension feature to minimise the time interrupts have to be disabled - when accessing a queue. - -Changed from V2.2.0 - - + Explicit use of 'signed' qualifier on portCHAR types added. - -Changes from V3.0.0 - - + API changes as described on the FreeRTOS.org WEB site. - -*/ - -#include -#include -#include "FreeRTOS.h" -#include "task.h" -#include "list.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -/* Constants used with the cRxLock and cTxLock structure members. */ -#define queueUNLOCKED ( ( signed portBASE_TYPE ) -1 ) - -/* - * Definition of the queue used by the scheduler. - * Items are queued by copy, not reference. - */ -typedef struct QueueDefinition -{ - signed portCHAR *pcHead; /*< Points to the beginning of the queue storage area. */ - signed portCHAR *pcTail; /*< Points to the byte at the end of the queue storage area. Once more byte is allocated than necessary to store the queue items, this is used as a marker. */ - - signed portCHAR *pcWriteTo; /*< Points to the free next place in the storage area. */ - signed portCHAR *pcReadFrom; /*< Points to the last place that a queued item was read from. */ - - xList xTasksWaitingToSend; /*< List of tasks that are blocked waiting to post onto this queue. Stored in priority order. */ - xList xTasksWaitingToReceive; /*< List of tasks that are blocked waiting to read from this queue. Stored in priority order. */ - - unsigned portBASE_TYPE uxMessagesWaiting;/*< The number of items currently in the queue. */ - unsigned portBASE_TYPE uxLength; /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */ - unsigned portBASE_TYPE uxItemSize; /*< The size of each items that the queue will hold. */ - - signed portBASE_TYPE xRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ - signed portBASE_TYPE xTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ -} xQUEUE; -/*-----------------------------------------------------------*/ - -/* - * Inside this file xQueueHandle is a pointer to a xQUEUE structure. - * To keep the definition private the API header file defines it as a - * pointer to void. - */ -typedef xQUEUE * xQueueHandle; - -/* - * Prototypes for public functions are included here so we don't have to - * include the API header file (as it defines xQueueHandle differently). These - * functions are documented in the API header file. - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); -signed portBASE_TYPE xQueueSend( xQueueHandle xQueue, const void * pvItemToQueue, portTickType xTicksToWait ); -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue ); -void vQueueDelete( xQueueHandle xQueue ); -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ); -signed portBASE_TYPE xQueueReceive( xQueueHandle pxQueue, void *pcBuffer, portTickType xTicksToWait ); -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pcBuffer, signed portBASE_TYPE *pxTaskWoken ); - -/* - * Unlocks a queue locked by a call to prvLockQueue. Locking a queue does not - * prevent an ISR from adding or removing items to the queue, but does prevent - * an ISR from removing tasks from the queue event lists. If an ISR finds a - * queue is locked it will instead increment the appropriate queue lock count - * to indicate that a task may require unblocking. When the queue in unlocked - * these lock counts are inspected, and the appropriate action taken. - */ -static signed portBASE_TYPE prvUnlockQueue( xQueueHandle pxQueue ); - -/* - * Uses a critical section to determine if there is any data in a queue. - * - * @return pdTRUE if the queue contains no items, otherwise pdFALSE. - */ -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ); - -/* - * Uses a critical section to determine if there is any space in a queue. - * - * @return pdTRUE if there is no space, otherwise pdFALSE; - */ -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ); - -/* - * Macro that copies an item into the queue. This is done by copying the item - * byte for byte, not by reference. Updates the queue state to ensure it's - * integrity after the copy. - */ -#define prvCopyQueueData( pxQueue, pvItemToQueue ) \ -{ \ - memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( unsigned ) pxQueue->uxItemSize ); \ - ++( pxQueue->uxMessagesWaiting ); \ - pxQueue->pcWriteTo += pxQueue->uxItemSize; \ - if( pxQueue->pcWriteTo >= pxQueue->pcTail ) \ - { \ - pxQueue->pcWriteTo = pxQueue->pcHead; \ - } \ -} -/*-----------------------------------------------------------*/ - -/* - * Macro to mark a queue as locked. Locking a queue prevents an ISR from - * accessing the queue event lists. - */ -#define prvLockQueue( pxQueue ) \ -{ \ - taskENTER_CRITICAL(); \ - ++( pxQueue->xRxLock ); \ - ++( pxQueue->xTxLock ); \ - taskEXIT_CRITICAL(); \ -} -/*-----------------------------------------------------------*/ - - -/*----------------------------------------------------------- - * PUBLIC QUEUE MANAGEMENT API documented in queue.h - *----------------------------------------------------------*/ - -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ) -{ -xQUEUE *pxNewQueue; -size_t xQueueSizeInBytes; - - /* Allocate the new queue structure. */ - if( uxQueueLength > ( unsigned portBASE_TYPE ) 0 ) - { - pxNewQueue = ( xQUEUE * ) pvPortMalloc( sizeof( xQUEUE ) ); - if( pxNewQueue != NULL ) - { - /* Create the list of pointers to queue items. The queue is one byte - longer than asked for to make wrap checking easier/faster. */ - xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ) + ( size_t ) 1; - - pxNewQueue->pcHead = ( signed portCHAR * ) pvPortMalloc( xQueueSizeInBytes ); - if( pxNewQueue->pcHead != NULL ) - { - /* Initialise the queue members as described above where the - queue type is defined. */ - pxNewQueue->pcTail = pxNewQueue->pcHead + ( uxQueueLength * uxItemSize ); - pxNewQueue->uxMessagesWaiting = 0; - pxNewQueue->pcWriteTo = pxNewQueue->pcHead; - pxNewQueue->pcReadFrom = pxNewQueue->pcHead + ( ( uxQueueLength - 1 ) * uxItemSize ); - pxNewQueue->uxLength = uxQueueLength; - pxNewQueue->uxItemSize = uxItemSize; - pxNewQueue->xRxLock = queueUNLOCKED; - pxNewQueue->xTxLock = queueUNLOCKED; - - /* Likewise ensure the event queues start with the correct state. */ - vListInitialise( &( pxNewQueue->xTasksWaitingToSend ) ); - vListInitialise( &( pxNewQueue->xTasksWaitingToReceive ) ); - - return pxNewQueue; - } - else - { - vPortFree( pxNewQueue ); - } - } - } - - /* Will only reach here if we could not allocate enough memory or no memory - was required. */ - return NULL; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* Make sure other tasks do not access the queue. */ - vTaskSuspendAll(); - - /* It is important that this is the only thread/ISR that modifies the - ready or delayed lists until xTaskResumeAll() is called. Places where - the ready/delayed lists are modified include: - - + vTaskDelay() - Nothing can call vTaskDelay as the scheduler is - suspended, vTaskDelay() cannot be called from an ISR. - + vTaskPrioritySet() - Has a critical section around the access. - + vTaskSwitchContext() - This will not get executed while the scheduler - is suspended. - + prvCheckDelayedTasks() - This will not get executed while the - scheduler is suspended. - + xTaskCreate() - Has a critical section around the access. - + vTaskResume() - Has a critical section around the access. - + xTaskResumeAll() - Has a critical section around the access. - + xTaskRemoveFromEventList - Checks to see if the scheduler is - suspended. If so then the TCB being removed from the event is - removed from the event and added to the xPendingReadyList. - */ - - /* Make sure interrupts do not access the queue event list. */ - prvLockQueue( pxQueue ); - - /* It is important that interrupts to not access the event list of the - queue being modified here. Places where the event list is modified - include: - - + xQueueSendFromISR(). This checks the lock on the queue to see if - it has access. If the queue is locked then the Tx lock count is - incremented to signify that a task waiting for data can be made ready - once the queue lock is removed. If the queue is not locked then - a task can be moved from the event list, but will not be removed - from the delayed list or placed in the ready list until the scheduler - is unlocked. - - + xQueueReceiveFromISR(). As per xQueueSendFromISR(). - */ - - /* If the queue is already full we may have to block. */ - if( prvIsQueueFull( pxQueue ) ) - { - /* The queue is full - do we want to block or just leave without - posting? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* We are going to place ourselves on the xTasksWaitingToSend event - list, and will get woken should the delay expire, or space become - available on the queue. - - As detailed above we do not require mutual exclusion on the event - list as nothing else can modify it or the ready lists while we - have the scheduler suspended and queue locked. - - It is possible that an ISR has removed data from the queue since we - checked if any was available. If this is the case then the data - will have been copied from the queue, and the queue variables - updated, but the event list will not yet have been checked to see if - anything is waiting as the queue is locked. */ - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait ); - - /* Force a context switch now as we are blocked. We can do - this from within a critical section as the task we are - switching to has its own context. When we return here (i.e. we - unblock) we will leave the critical section as normal. - - It is possible that an ISR has caused an event on an unrelated and - unlocked queue. If this was the case then the event list for that - queue will have been updated but the ready lists left unchanged - - instead the readied task will have been added to the pending ready - list. */ - taskENTER_CRITICAL(); - { - /* We can safely unlock the queue and scheduler here as - interrupts are disabled. We must not yield with anything - locked, but we can yield from within a critical section. - - Tasks that have been placed on the pending ready list cannot - be tasks that are waiting for events on this queue. See - in comment xTaskRemoveFromEventList(). */ - prvUnlockQueue( pxQueue ); - - /* Resuming the scheduler may cause a yield. If so then there - is no point yielding again here. */ - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - - /* Before leaving the critical section we have to ensure - exclusive access again. */ - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - } - taskEXIT_CRITICAL(); - } - } - - /* When we are here it is possible that we unblocked as space became - available on the queue. It is also possible that an ISR posted to the - queue since we left the critical section, so it may be that again there - is no space. This would only happen if a task and ISR post onto the - same queue. */ - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - /* There is room in the queue, copy the data into the queue. */ - prvCopyQueueData( pxQueue, pvItemToQueue ); - xReturn = pdPASS; - - /* Update the TxLock count so prvUnlockQueue knows to check for - tasks waiting for data to become available in the queue. */ - ++( pxQueue->xTxLock ); - } - else - { - xReturn = errQUEUE_FULL; - } - } - taskEXIT_CRITICAL(); - - /* We no longer require exclusive access to the queue. prvUnlockQueue - will remove any tasks suspended on a receive if either this function - or an ISR has posted onto the queue. */ - if( prvUnlockQueue( pxQueue ) ) - { - /* Resume the scheduler - making ready any tasks that were woken - by an event while the scheduler was locked. Resuming the - scheduler may cause a yield, in which case there is no point - yielding again here. */ - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - } - else - { - /* Resume the scheduler - making ready any tasks that were woken - by an event while the scheduler was locked. */ - xTaskResumeAll(); - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ) -{ - /* Similar to xQueueSend, except we don't block if there is no room in the - queue. Also we don't directly wake a task that was blocked on a queue - read, instead we return a flag to say whether a context switch is required - or not (i.e. has a task with a higher priority than us been woken by this - post). */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - prvCopyQueueData( pxQueue, pvItemToQueue ); - - /* If the queue is locked we do not alter the event list. This will - be done when the queue is unlocked later. */ - if( pxQueue->xTxLock == queueUNLOCKED ) - { - /* We only want to wake one task per ISR, so check that a task has - not already been woken. */ - if( !xTaskPreviouslyWoken ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - return pdTRUE; - } - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was posted while it was locked. */ - ++( pxQueue->xTxLock ); - } - } - - return xTaskPreviouslyWoken; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceive( xQueueHandle pxQueue, void *pcBuffer, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* This function is very similar to xQueueSend(). See comments within - xQueueSend() for a more detailed explanation. - - Make sure other tasks do not access the queue. */ - vTaskSuspendAll(); - - /* Make sure interrupts do not access the queue. */ - prvLockQueue( pxQueue ); - - /* If there are no messages in the queue we may have to block. */ - if( prvIsQueueEmpty( pxQueue ) ) - { - /* There are no messages in the queue, do we want to block or just - leave with nothing? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); - taskENTER_CRITICAL(); - { - prvUnlockQueue( pxQueue ); - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - } - taskEXIT_CRITICAL(); - } - } - - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pcBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - /* Increment the lock count so prvUnlockQueue knows to check for - tasks waiting for space to become available on the queue. */ - ++( pxQueue->xRxLock ); - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - } - taskEXIT_CRITICAL(); - - /* We no longer require exclusive access to the queue. */ - if( prvUnlockQueue( pxQueue ) ) - { - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - } - else - { - xTaskResumeAll(); - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pcBuffer, signed portBASE_TYPE *pxTaskWoken ) -{ -signed portBASE_TYPE xReturn; - - /* We cannot block from an ISR, so check there is data available. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Copy the data from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pcBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - /* If the queue is locked we will not modify the event list. Instead - we update the lock count so the task that unlocks the queue will know - that an ISR has removed data while the queue was locked. */ - if( pxQueue->xRxLock == queueUNLOCKED ) - { - /* We only want to wake one task per ISR, so check that a task has - not already been woken. */ - if( !( *pxTaskWoken ) ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - /* The task waiting has a higher priority than us so - force a context switch. */ - *pxTaskWoken = pdTRUE; - } - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was removed while it was locked. */ - ++( pxQueue->xRxLock ); - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue ) -{ -unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - uxReturn = pxQueue->uxMessagesWaiting; - taskEXIT_CRITICAL(); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -void vQueueDelete( xQueueHandle pxQueue ) -{ - vPortFree( pxQueue->pcHead ); - vPortFree( pxQueue ); -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvUnlockQueue( xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xYieldRequired = pdFALSE; - - /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */ - - /* The lock counts contains the number of extra data items placed or - removed from the queue while the queue was locked. When a queue is - locked items can be added or removed, but the event lists cannot be - updated. */ - taskENTER_CRITICAL(); - { - --( pxQueue->xTxLock ); - - /* See if data was added to the queue while it was locked. */ - if( pxQueue->xTxLock > queueUNLOCKED ) - { - pxQueue->xTxLock = queueUNLOCKED; - - /* Data was posted while the queue was locked. Are any tasks - blocked waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* Tasks that are removed from the event list will get added to - the pending ready list as the scheduler is still suspended. */ - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - xYieldRequired = pdTRUE; - } - } - } - } - taskEXIT_CRITICAL(); - - /* Do the same for the Rx lock. */ - taskENTER_CRITICAL(); - { - --( pxQueue->xRxLock ); - - if( pxQueue->xRxLock > queueUNLOCKED ) - { - pxQueue->xRxLock = queueUNLOCKED; - - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - xYieldRequired = pdTRUE; - } - } - } - } - taskEXIT_CRITICAL(); - - return xYieldRequired; -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == pxQueue->uxLength ); - taskEXIT_CRITICAL(); - - return xReturn; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/readme.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/readme.txt deleted file mode 100644 index 18da584b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/readme.txt +++ /dev/null @@ -1,15 +0,0 @@ -Each real time kernel port consists of three files that contain the core kernel -components and are common to every port, and one or more files that are -specific to a particular microcontroller and or compiler. - -+ The FreeRTOS/Source directory contains the three files that are common to -every port. The kernel is contained within these three files. - -+ The FreeRTOS/Source/Portable directory contains the files that are specific to -a particular microcontroller and or compiler. - -+ The FreeRTOS/Source/include directory contains the real time kernel header -files. - -See the readme file in the FreeRTOS/Source/Portable directory for more -information. \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/tasks.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/tasks.c deleted file mode 100644 index 27cb7b01..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/freertos/tasks.c +++ /dev/null @@ -1,1632 +0,0 @@ -/* - FreeRTOS V3.2.4 - Copyright (C) 2003-2005 Richard Barry. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.00: - - + Call to portRESTORE_CONTEXT has been removed. The first context - switch is now performed within sPortStartScheduler(). - -Changes from V1.01: - - + More use of 8bit data types. - + Function name prefixes changed where the data type returned has changed. - + configUSE_TRACE_FACILITY is no longer defined by default. - -Changes from V1.2.0 - - + Introduced ucTopReadyPriority. This tracks the highest priority ready - queue that contains a valid TCB and thus makes the context switch - slightly faster. - - + prvAddTaskToReadyQueue() has been made a macro. - -Changes from V1.2.6 - - + Added conditional compilation directives. - + Extended API. - + Rearranged function order. - + Creating a task now causes a context switch if the task being created - has a higher priority than the calling task - assuming the kernel is - running. - + vTaskDelete() now only causes a context switch if the calling task is - the task being deleted. - -Changes from V2.0.0 - - + Allow the type of the tick count to be 16 or 32 bits. - + Introduce xPendingReadyList feature to allow the time interrupts have to - be disabled to be minimised. - + Remove the #if( INCLUDE_vTaskSuspendAll ) statements. vTaskSuspendAll() - is now always included as it is used by the scheduler itself. - -Changes from V2.1.0 - - + Bug fix - pxCurrentTCB is now initialised before the call to - prvInitializeTaskLists(). Previously pxCurrentTCB could be accessed - while null. - -Changed from V2.1.1 - - + Change to where lStackSize is declared within sTaskCreate() to prevent - compiler warnings with 8051 port. - -Changes from V2.2.0 - - + Explicit use of 'signed' qualifier on portCHAR types added. - + Changed odd calculation of initial pxTopOfStack value when - portSTACK_GROWTH < 0. - + Removed pcVersionNumber definition. - -Changes from V2.5.3 - - + cTaskResumeAll() modified to ensure it can be called prior to the task - lists being initialised. - -Changes from V2.5.5 - - + Added API function vTaskDelayUntil(). - + Added INCLUDE_vTaskDelay conditional compilation. - -Changes from V2.6.0 - - + Updated the vWriteTraceToBuffer macro to always be 4 byte aligned so it - can be used on ARM architectures. - + tskMAX_TASK_NAME_LEN definition replaced with the port specific - configMAX_TASK_NAME_LEN definition. - + Removed the call to strcpy when copying across the task name into the - TCB. - + Added ucTasksDeleted variable to prevent vTaskSuspendAll() being called - too often in the idle task. - -Changes between V3.0.0 and V2.6.1 - - + When resuming the scheduler a yield is performed if either a tick has - been missed, or a task is moved from the pending ready list into a ready - list. Previously a yield was not performed on this second condition. - + Introduced the type portBASE_TYPE. This necessitates several API - changes. - + Removed the sUsingPreemption variable. The constant defined in - portmacro.h is now used directly. - + The idle task can now include an optional hook function - and no longer - completes its time slice if other tasks with equal priority to it are - ready to run. - + See the FreeRTOS.org documentation for more information on V2.x.x to - V3.x.x modifications. - -Changes from V3.1.1 - - + Modified vTaskPrioritySet() and vTaskResume() to allow these functions to - be called while the scheduler is suspended. - + Corrected the task ordering within event lists. - -Changes from V3.2.0 - - + Added function xTaskGetCurrentTaskHandle(). -*/ - -#include -#include -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* - * Macro to define the amount of stack available to the idle task. - */ -#define tskIDLE_STACK_SIZE configMINIMAL_STACK_SIZE - - -/* - * Default a definitions for backwards compatibility with old - * portmacro.h files. - */ -#ifndef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 16 -#endif - -#ifndef INCLUDE_xTaskGetCurrentTaskHandle - #define INCLUDE_xTaskGetCurrentTaskHandle 0 -#endif - -#ifndef configIDLE_SHOULD_YIELD - #define configIDLE_SHOULD_YIELD 1 -#endif - -#if configMAX_TASK_NAME_LEN < 1 - #undef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 1 -#endif - - -/* - * Task control block. A task control block (TCB) is allocated to each task, - * and stores the context of the task. - */ -typedef struct tskTaskControlBlock -{ - portSTACK_TYPE *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE STRUCT. */ - portSTACK_TYPE *pxStack; /*< Points to the start of the stack. */ - unsigned portBASE_TYPE uxTCBNumber; /*< This is used for tracing the scheduler and making debugging easier only. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the task where 0 is the lowest priority. */ - xListItem xGenericListItem; /*< List item used to place the TCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the TCB in event lists. */ - signed portCHAR pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */ - unsigned portSHORT usStackDepth; /*< Total depth of the stack (when empty). This is defined as the number of variables the stack can hold, not the number of bytes. */ -} tskTCB; - -/*lint -e956 */ - -volatile tskTCB * volatile pxCurrentTCB = NULL; - -/* Lists for ready and blocked tasks. --------------------*/ - -static volatile xList pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */ -static volatile xList xDelayedTaskList1; /*< Delayed tasks. */ -static volatile xList xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */ -static volatile xList *pxDelayedTaskList; /*< Points to the delayed task list currently being used. */ -static volatile xList *pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */ -static volatile xList xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready queue when the scheduler is resumed. */ - -#if ( INCLUDE_vTaskDelete == 1 ) - - static volatile xList xTasksWaitingTermination; /*< Tasks that have been deleted - but the their memory not yet freed. */ - static volatile unsigned portBASE_TYPE uxTasksDeleted = ( unsigned portBASE_TYPE ) 0; - -#endif - -#if ( INCLUDE_vTaskSuspend == 1 ) - - static volatile xList xSuspendedTaskList; /*< Tasks that are currently suspended. */ - -#endif - -/* File private variables. --------------------------------*/ -static unsigned portBASE_TYPE uxCurrentNumberOfTasks = ( unsigned portBASE_TYPE ) 0; -static volatile portTickType xTickCount = ( portTickType ) 0; -static unsigned portBASE_TYPE uxTopUsedPriority = tskIDLE_PRIORITY; -static volatile unsigned portBASE_TYPE uxTopReadyPriority = tskIDLE_PRIORITY; -static signed portBASE_TYPE xSchedulerRunning = pdFALSE; -static volatile unsigned portBASE_TYPE uxSchedulerSuspended = ( unsigned portBASE_TYPE ) pdFALSE; -static volatile unsigned portBASE_TYPE uxMissedTicks = ( unsigned portBASE_TYPE ) 0; - -/* Debugging and trace facilities private variables and macros. ------------*/ - -/* - * The value used to fill the stack of a task when the task is created. This - * is used purely for checking the high water mark for tasks. - */ -#define tskSTACK_FILL_BYTE ( 0xa5 ) - -/* - * Macros used by vListTask to indicate which state a task is in. - */ -#define tskBLOCKED_CHAR ( ( signed portCHAR ) 'B' ) -#define tskREADY_CHAR ( ( signed portCHAR ) 'R' ) -#define tskDELETED_CHAR ( ( signed portCHAR ) 'D' ) -#define tskSUSPENDED_CHAR ( ( signed portCHAR ) 'S' ) - -/* - * Macros and private variables used by the trace facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define tskSIZE_OF_EACH_TRACE_LINE ( ( unsigned portLONG ) ( sizeof( unsigned portLONG ) + sizeof( unsigned portLONG ) ) ) - static volatile signed portCHAR * volatile pcTraceBuffer; - static signed portCHAR *pcTraceBufferStart; - static signed portCHAR *pcTraceBufferEnd; - static signed portBASE_TYPE xTracing = pdFALSE; - -#endif - -/* - * Macro that writes a trace of scheduler activity to a buffer. This trace - * shows which task is running when and is very useful as a debugging tool. - * As this macro is called each context switch it is a good idea to undefine - * it if not using the facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define vWriteTraceToBuffer() \ - { \ - if( xTracing ) \ - { \ - static unsigned portBASE_TYPE uxPreviousTask = 255; \ - \ - if( uxPreviousTask != pxCurrentTCB->uxTCBNumber ) \ - { \ - if( ( pcTraceBuffer + tskSIZE_OF_EACH_TRACE_LINE ) < pcTraceBufferEnd ) \ - { \ - uxPreviousTask = pxCurrentTCB->uxTCBNumber; \ - *( unsigned portLONG * ) pcTraceBuffer = ( unsigned portLONG ) xTickCount; \ - pcTraceBuffer += sizeof( unsigned portLONG ); \ - *( unsigned portLONG * ) pcTraceBuffer = ( unsigned portLONG ) uxPreviousTask; \ - pcTraceBuffer += sizeof( unsigned portLONG ); \ - } \ - else \ - { \ - xTracing = pdFALSE; \ - } \ - } \ - } \ - } - -#else - - #define vWriteTraceToBuffer() - -#endif - - -/* - * Place the task represented by pxTCB into the appropriate ready queue for - * the task. It is inserted at the end of the list. One quirk of this is - * that if the task being inserted is at the same priority as the currently - * executing task, then it will only be rescheduled after the currently - * executing task has been rescheduled. - */ -#define prvAddTaskToReadyQueue( pxTCB ) \ -{ \ - listSET_LIST_ITEM_VALUE( &( pxTCB->xGenericListItem ), 0 ); \ - if( pxTCB->uxPriority > uxTopReadyPriority ) \ - { \ - uxTopReadyPriority = pxTCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyTasksLists[ pxTCB->uxPriority ] ), &( pxTCB->xGenericListItem ) ); \ -} - - -/* - * Macro that looks at the list of tasks that are currently delayed to see if - * any require waking. - * - * Tasks are stored in the queue in the order of their wake time - meaning - * once one tasks has been found whose timer has not expired we need not look - * any further down the list. - */ -#define prvCheckDelayedTasks() \ -{ \ -register tskTCB *pxTCB; \ - \ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ) ) != NULL ) \ - { \ - if( xTickCount < listGET_LIST_ITEM_VALUE( &( pxTCB->xGenericListItem ) ) ) \ - { \ - break; \ - } \ - vListRemove( &( pxTCB->xGenericListItem ) ); \ - /* Is the task waiting on an event also? */ \ - if( pxTCB->xEventListItem.pvContainer ) \ - { \ - vListRemove( &( pxTCB->xEventListItem ) ); \ - } \ - prvAddTaskToReadyQueue( pxTCB ); \ - } \ -} - -/* - * Several functions take an xTaskHandle parameter that can optionally be NULL, - * where NULL is used to indicate that the handle of the currently executing - * task should be used in place of the parameter. This macro simply checks to - * see if the parameter is NULL and returns a pointer to the appropriate TCB. - */ -#define prvGetTCBFromHandle( pxHandle ) ( ( pxHandle == NULL ) ? ( tskTCB * ) pxCurrentTCB : ( tskTCB * ) pxHandle ) - - -/* File private functions. --------------------------------*/ - -/* - * Utility to ready a TCB for a given task. Mainly just copies the parameters - * into the TCB structure. - */ -static void prvInitialiseTCBVariables( tskTCB *pxTCB, unsigned portSHORT usStackDepth, const signed portCHAR * const pcName, unsigned portBASE_TYPE uxPriority ); - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first task. - */ -static void prvInitialiseTaskLists( void ); - -/* - * The idle task, which as all tasks is implemented as a never ending loop. - * The idle task is automatically created and added to the ready lists upon - * creation of the first user task. - * - * The portTASK_FUNCTION_PROTO() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters ); - -/* - * Utility to free all memory allocated by the scheduler to hold a TCB, - * including the stack pointed to by the TCB. - * - * This does not free memory allocated by the task itself (i.e. memory - * allocated by calls to pvPortMalloc from within the tasks application code). - */ -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - static void prvDeleteTCB( tskTCB *pxTCB ); -#endif - -/* - * Used only by the idle task. This checks to see if anything has been placed - * in the list of tasks waiting to be deleted. If so the task is cleaned up - * and its TCB deleted. - */ -static void prvCheckTasksWaitingTermination( void ); - -/* - * Allocates memory from the heap for a TCB and associated stack. Checks the - * allocation was successful. - */ -static tskTCB *prvAllocateTCBAndStack( unsigned portSHORT usStackDepth ); - -/* - * Called from vTaskList. vListTasks details all the tasks currently under - * control of the scheduler. The tasks may be in one of a number of lists. - * prvListTaskWithinSingleList accepts a list and details the tasks from - * within just that list. - * - * THIS FUNCTION IS INTENDED FOR DEBUGGING ONLY, AND SHOULD NOT BE CALLED FROM - * NORMAL APPLICATION CODE. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( signed portCHAR *pcWriteBuffer, xList *pxList, signed portCHAR cStatus ); - -#endif - -/* - * When a task is created, the stack of the task is filled with a known value. - * This function determines the 'high water mark' of the task stack by - * determining how much of the stack remains at the original preset value. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned portSHORT usTaskCheckFreeStackSpace( const unsigned portCHAR *pucStackByte ); - -#endif - -/*lint +e956 */ - - - - - -/*----------------------------------------------------------- - * TASK CREATION API documented in task.h - *----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask ) -{ -signed portBASE_TYPE xReturn; -tskTCB * pxNewTCB; -static unsigned portBASE_TYPE uxTaskNumber = 0; /*lint !e956 Static is deliberate - this is guarded before use. */ - - /* Allocate the memory required by the TCB and stack for the new task. - checking that the allocation was successful. */ - pxNewTCB = prvAllocateTCBAndStack( usStackDepth ); - - if( pxNewTCB != NULL ) - { - portSTACK_TYPE *pxTopOfStack; - - /* Setup the newly allocated TCB with the initial state of the task. */ - prvInitialiseTCBVariables( pxNewTCB, usStackDepth, pcName, uxPriority ); - - /* Calculate the top of stack address. This depends on whether the - stack grows from high memory to low (as per the 80x86) or visa versa. - portSTACK_GROWTH is used to make the result positive or negative as - required by the port. */ - #if portSTACK_GROWTH < 0 - { - pxTopOfStack = pxNewTCB->pxStack + ( pxNewTCB->usStackDepth - 1 ); - } - #else - { - pxTopOfStack = pxNewTCB->pxStack; - } - #endif - - /* Initialize the TCB stack to look as if the task was already running, - but had been interrupted by the scheduler. The return address is set - to the start of the task function. Once the stack has been initialised - the top of stack variable is updated. */ - pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pvTaskCode, pvParameters ); - - /* We are going to manipulate the task queues to add this task to a - ready list, so must make sure no interrupts occur. */ - portENTER_CRITICAL(); - { - uxCurrentNumberOfTasks++; - if( uxCurrentNumberOfTasks == ( unsigned portBASE_TYPE ) 1 ) - { - /* As this is the first task it must also be the current task. */ - pxCurrentTCB = ( volatile tskTCB * volatile ) pxNewTCB; - - /* This is the first task to be created so do the preliminary - initialisation required. We will not recover if this call - fails, but we will report the failure. */ - prvInitialiseTaskLists(); - } - else - { - /* If the scheduler is not already running, make this task the - current task if it is the highest priority task to be created - so far. */ - if( xSchedulerRunning == pdFALSE ) - { - if( pxCurrentTCB->uxPriority <= uxPriority ) - { - pxCurrentTCB = ( volatile tskTCB * volatile ) pxNewTCB; - } - } - } - - /* Remember the top priority to make context switching faster. Use - the priority in pxNewTCB as this has been capped to a valid value. */ - if( pxNewTCB->uxPriority > uxTopUsedPriority ) - { - uxTopUsedPriority = pxNewTCB->uxPriority; - } - - /* Add a counter into the TCB for tracing only. */ - pxNewTCB->uxTCBNumber = uxTaskNumber; - uxTaskNumber++; - - prvAddTaskToReadyQueue( pxNewTCB ); - - xReturn = pdPASS; - } - portEXIT_CRITICAL(); - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - if( xReturn == pdPASS ) - { - if( ( void * ) pxCreatedTask != NULL ) - { - /* Pass the TCB out - in an anonymous way. The calling function/ - task can use this as a handle to delete the task later if - required.*/ - *pxCreatedTask = ( xTaskHandle ) pxNewTCB; - } - - if( xSchedulerRunning != pdFALSE ) - { - /* If the created task is of a higher priority than the current task - then it should run now. */ - if( pxCurrentTCB->uxPriority < uxPriority ) - { - taskYIELD(); - } - } - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelete == 1 ) - - void vTaskDelete( xTaskHandle pxTaskToDelete ) - { - tskTCB *pxTCB; - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are deleting ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToDelete ); - - /* Remove task from the ready list and place in the termination list. - This will stop the task from be scheduled. The idle task will check - the termination list and free up any memory allocated by the - scheduler for the TCB and stack. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xTasksWaitingTermination, &( pxTCB->xGenericListItem ) ); - - /* Increment the ucTasksDeleted variable so the idle task knows - there is a task that has been deleted and that it should therefore - check the xTasksWaitingTermination list. */ - ++uxTasksDeleted; - } - taskEXIT_CRITICAL(); - - /* Force a reschedule if we have just deleted the current task. */ - if( ( void * ) pxTaskToDelete == NULL ) - { - taskYIELD(); - } - } - -#endif - - - - - - -/*----------------------------------------------------------- - * TASK CONTROL API documented in task.h - *----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelayUntil == 1 ) - void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement ) - { - portTickType xTimeToWake; - portBASE_TYPE xAlreadyYielded, xShouldDelay = pdFALSE; - - vTaskSuspendAll(); - { - /* Generate the tick time at which the task wants to wake. */ - xTimeToWake = *pxPreviousWakeTime + xTimeIncrement; - - if( xTickCount < *pxPreviousWakeTime ) - { - /* The tick count has overflowed since this function was - lasted called. In this case the only time we should ever - actually delay is if the wake time has also overflowed, - and the wake time is greater than the tick time. When this - is the case it is as if neither time had overflowed. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - else - { - /* The tick time has not overflowed. In this case we will - delay if either the wake time has overflowed, and/or the - tick time is less than the wake time. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - - /* Update the wake time ready for the next call. */ - *pxPreviousWakeTime = xTimeToWake; - - if( xShouldDelay ) - { - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - } - xAlreadyYielded = xTaskResumeAll(); - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - taskYIELD(); - } - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelay == 1 ) - void vTaskDelay( portTickType xTicksToDelay ) - { - portTickType xTimeToWake; - signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* A delay time of zero just forces a reschedule. */ - if( xTicksToDelay > ( portTickType ) 0 ) - { - vTaskSuspendAll(); - { - /* A task that is removed from the event list while the - scheduler is suspended will not get placed in the ready - list or removed from the blocked list until the scheduler - is resumed. - - This task cannot be in an event list as it is the currently - executing task. */ - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - xAlreadyYielded = xTaskResumeAll(); - } - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - taskYIELD(); - } - } -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_uxTaskPriorityGet == 1 ) - - unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxReturn = pxTCB->uxPriority; - } - taskEXIT_CRITICAL(); - - return uxReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskPrioritySet == 1 ) - - void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxCurrentPriority; - - /* Ensure the new priority is valid. */ - if( uxNewPriority >= configMAX_PRIORITIES ) - { - uxNewPriority = configMAX_PRIORITIES - 1; - } - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxCurrentPriority = pxTCB->uxPriority; - - if( uxCurrentPriority != uxNewPriority ) - { - pxTCB->uxPriority = uxNewPriority; - - /* If the task is in the blocked or suspended list we need do - nothing more than change it's priority variable. However, if - the task is in a ready list it needs to be removed and placed - in the queue appropriate to its new priority. */ - if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxCurrentPriority ] ), &( pxTCB->xGenericListItem ) ) ) - { - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - /* The task is currently in its ready list - remove before adding - it to it's new ready list. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxTCB->xEventListItem ) ); - } - } - } - } - taskEXIT_CRITICAL(); - - /* The priority change may have readied a task of higher - priority than the calling task. */ - taskYIELD(); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskSuspend( xTaskHandle pxTaskToSuspend ) - { - tskTCB *pxTCB; - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are suspending ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToSuspend ); - - /* Remove task from the ready/delayed list and place in the suspended list. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ); - } - taskEXIT_CRITICAL(); - - /* We may have just suspended the current task. */ - if( ( void * ) pxTaskToSuspend == NULL ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskResume( xTaskHandle pxTaskToResume ) - { - tskTCB *pxTCB; - portBASE_TYPE xYieldRequired; - - /* Remove the task from whichever list it is currently in, and place - it in the ready list. */ - pxTCB = ( tskTCB * ) pxTaskToResume; - - /* The parameter cannot be NULL as it is impossible to resume the - currently executing task. */ - if( pxTCB != NULL ) - { - taskENTER_CRITICAL(); - { - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - xYieldRequired = ( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed. */ - xYieldRequired = pdFALSE; - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxTCB->xEventListItem ) ); - } - } - taskEXIT_CRITICAL(); - - /* We may have just resumed a higher priority task. */ - if( xYieldRequired ) - { - /* This yield may not cause the task just resumed to run, but - will leave the lists in the correct state for the next yield. */ - taskYIELD(); - } - } - } - -#endif - - - - - -/*----------------------------------------------------------- - * PUBLIC SCHEDULER CONTROL documented in task.h - *----------------------------------------------------------*/ - - -void vTaskStartScheduler( void ) -{ -portBASE_TYPE xReturn; - - /* Check a task has been created. */ - if( pxCurrentTCB != NULL ) - { - /* Add the idle task at the lowest priority. */ - xReturn = xTaskCreate( prvIdleTask, ( const signed portCHAR * const ) "IDLE", tskIDLE_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, ( xTaskHandle * ) NULL ); - - if( xReturn == pdPASS ) - { - /* Interrupts are turned off here, to ensure a tick does not occur - before or during the call to xPortStartScheduler(). The stacks of - the created tasks contain a status word with interrupts switched on - so interrupts will automatically get re-enabled when the first task - starts to run. - - STEPPING THROUGH HERE USING A DEBUGGER CAN CAUSE BIG PROBLEMS IF THE - DEBUGGER ALLOWS INTERRUPTS TO BE PROCESSED. */ - portDISABLE_INTERRUPTS(); - - xSchedulerRunning = pdTRUE; - xTickCount = ( portTickType ) 0; - - /* Setting up the timer tick is hardware specific and thus in the - portable interface. */ - if( xPortStartScheduler() ) - { - /* Should not reach here as if the scheduler is running the - function will not return. */ - } - else - { - /* Should only reach here if a task calls xTaskEndScheduler(). */ - } - } - } -} -/*-----------------------------------------------------------*/ - -void vTaskEndScheduler( void ) -{ - /* Stop the scheduler interrupts and call the portable scheduler end - routine so the original ISRs can be restored if necessary. The port - layer must ensure interrupts enable bit is left in the correct state. */ - portDISABLE_INTERRUPTS(); - xSchedulerRunning = pdFALSE; - vPortEndScheduler(); -} -/*----------------------------------------------------------*/ - -void vTaskSuspendAll( void ) -{ - portENTER_CRITICAL(); - ++uxSchedulerSuspended; - portEXIT_CRITICAL(); -} -/*----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskResumeAll( void ) -{ -register tskTCB *pxTCB; -signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* It is possible that an ISR caused a task to be removed from an event - list while the scheduler was suspended. If this was the case then the - removed task will have been added to the xPendingReadyList. Once the - scheduler has been resumed it is safe to move all the pending ready - tasks from this list into their appropriate ready list. */ - portENTER_CRITICAL(); - { - --uxSchedulerSuspended; - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - if( uxCurrentNumberOfTasks > ( unsigned portBASE_TYPE ) 0 ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - - /* Move any readied tasks from the pending list into the - appropriate ready list. */ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xPendingReadyList ) ) ) != NULL ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* If we have moved a task that has a priority higher than - the current task then we should yield. */ - if( pxTCB->uxPriority > pxCurrentTCB->uxPriority ) - { - xYieldRequired = pdTRUE; - } - } - - /* If any ticks occurred while the scheduler was suspended then - they should be processed now. This ensures the tick count does not - slip, and that any delayed tasks are resumed at the correct time. */ - if( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - while( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskIncrementTick(); - --uxMissedTicks; - } - - /* As we have processed some ticks it is appropriate to yield - to ensure the highest priority task that is ready to run is - the task actually running. */ - xYieldRequired = pdTRUE; - } - - if( xYieldRequired == pdTRUE ) - { - xAlreadyYielded = pdTRUE; - taskYIELD(); - } - } - } - } - portEXIT_CRITICAL(); - - return xAlreadyYielded; -} - - - - - - -/*----------------------------------------------------------- - * PUBLIC TASK UTILITIES documented in task.h - *----------------------------------------------------------*/ - - - -portTickType xTaskGetTickCount( void ) -{ -portTickType xTicks; - - /* Critical section required if running on a 16 bit processor. */ - taskENTER_CRITICAL(); - { - xTicks = xTickCount; - } - taskEXIT_CRITICAL(); - - return xTicks; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ) -{ -unsigned portBASE_TYPE uxNumberOfTasks; - - taskENTER_CRITICAL(); - uxNumberOfTasks = uxCurrentNumberOfTasks; - taskEXIT_CRITICAL(); - - return uxNumberOfTasks; -} -/*-----------------------------------------------------------*/ - -#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_vTaskDelete == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskList( signed portCHAR *pcWriteBuffer ) - { - unsigned portBASE_TYPE uxQueue; - - /* This is a VERY costly function that should be used for debug only. - It leaves interrupts disabled for a LONG time. */ - - taskENTER_CRITICAL(); - { - /* Run through all the lists that could potentially contain a TCB and - report the task name, state and stack high water mark. */ - - pcWriteBuffer[ 0 ] = ( signed portCHAR ) 0x00; - strcat( ( portCHAR * ) pcWriteBuffer, ( const portCHAR * ) "\r\n" ); - - uxQueue = uxTopUsedPriority + 1; - - do - { - uxQueue--; - - if( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxQueue ] ) ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &( pxReadyTasksLists[ uxQueue ] ), tskREADY_CHAR ); - } - }while( uxQueue > ( unsigned portSHORT ) tskIDLE_PRIORITY ); - - if( !listLIST_IS_EMPTY( pxDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( pxOverflowDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxOverflowDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( &xTasksWaitingTermination ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xTasksWaitingTermination, tskDELETED_CHAR ); - } - - if( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xSuspendedTaskList, tskSUSPENDED_CHAR ); - } - } - taskEXIT_CRITICAL(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - void vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize ) - { - portENTER_CRITICAL(); - { - pcTraceBuffer = ( volatile signed portCHAR * volatile )pcBuffer; - pcTraceBufferStart = pcBuffer; - pcTraceBufferEnd = pcBuffer + ( ulBufferSize - tskSIZE_OF_EACH_TRACE_LINE ); - xTracing = pdTRUE; - } - portEXIT_CRITICAL(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned portLONG ulTaskEndTrace( void ) - { - unsigned portLONG ulBufferLength; - - portENTER_CRITICAL(); - xTracing = pdFALSE; - portEXIT_CRITICAL(); - - ulBufferLength = ( unsigned portLONG ) ( pcTraceBuffer - pcTraceBufferStart ); - - return ulBufferLength; - } - -#endif - - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - * documented in task.h - *----------------------------------------------------------*/ - - -inline void vTaskIncrementTick( void ) -{ - /* Called by the portable layer each time a tick interrupt occurs. - Increments the tick then checks to see if the new tick value will cause any - tasks to be unblocked. */ - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - ++xTickCount; - if( xTickCount == ( portTickType ) 0 ) - { - volatile xList *pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. If there are - any items in pxDelayedTaskList here then there is an error! */ - pxTemp = pxDelayedTaskList; - pxDelayedTaskList = pxOverflowDelayedTaskList; - pxOverflowDelayedTaskList = pxTemp; - } - - /* See if this tick has made a timeout expire. */ - prvCheckDelayedTasks(); - } - else - { - ++uxMissedTicks; - } -} -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_vTaskCleanUpResources == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskCleanUpResources( void ) - { - unsigned portSHORT usQueue; - volatile tskTCB *pxTCB; - - usQueue = ( unsigned portSHORT ) uxTopUsedPriority + ( unsigned portSHORT ) 1; - - /* Remove any TCB's from the ready queues. */ - do - { - usQueue--; - - while( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ usQueue ] ) ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &( pxReadyTasksLists[ usQueue ] ) ) - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - }while( usQueue > ( unsigned portSHORT ) tskIDLE_PRIORITY ); - - /* Remove any TCB's from the delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList1 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList1 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - /* Remove any TCB's from the overflow delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList2 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList2 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - while( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xSuspendedTaskList ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - while( !listLIST_IS_EMPTY( &xPendingReadyList ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xPendingReadyList ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - } - -#endif -/*-----------------------------------------------------------*/ - -inline void vTaskSwitchContext( void ) -{ - if( uxSchedulerSuspended != ( unsigned portBASE_TYPE ) pdFALSE ) - { - /* The scheduler is currently suspended - do not allow a context - switch. */ - return; - } - - /* Find the highest priority queue that contains ready tasks. */ - while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopReadyPriority ] ) ) ) - { - --uxTopReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the tasks of the - same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopReadyPriority ] ) ); - vWriteTraceToBuffer(); -} -/*-----------------------------------------------------------*/ - -void vTaskPlaceOnEventList( xList *pxEventList, portTickType xTicksToWait ) -{ -portTickType xTimeToWake; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. */ - - /* Place the event list item of the TCB in the appropriate event list. - This is placed in the list in priority order so the highest priority task - is the first to be woken by the event. */ - vListInsert( ( xList * ) pxEventList, ( xListItem * ) &( pxCurrentTCB->xEventListItem ) ); - - /* Calculate the time at which the task should be woken if the event does - not occur. This may overflow but this doesn't matter. */ - xTimeToWake = xTickCount + xTicksToWait; - - /* We must remove ourselves from the ready list before adding ourselves - to the blocked list as the same list item is used for both lists. We have - exclusive access to the ready lists as the scheduler is locked. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskRemoveFromEventList( const xList *pxEventList ) -{ -tskTCB *pxUnblockedTCB; -portBASE_TYPE xReturn; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. It can also be called from within an ISR. */ - - /* The event list is sorted in priority order, so we can remove the - first in the list, remove the TCB from the delayed list, and add - it to the ready list. - - If an event is for a queue that is locked then this function will never - get called - the lock count on the queue will get modified instead. This - means we can always expect exclusive access to the event list here. */ - pxUnblockedTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedTCB->xEventListItem ) ); - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - vListRemove( &( pxUnblockedTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxUnblockedTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) ); - } - - if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority ) - { - /* Return true if the task removed from the event list has - a higher priority than the calling task. This allows - the calling task to know if it should force a context - switch now. */ - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} - - - - - -/* - * ----------------------------------------------------------- - * The Idle task. - * ---------------------------------------------------------- - * - * The portTASK_FUNCTION() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION( prvIdleTask, pvParameters ) -{ - /* Stop warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /* See if any tasks have been deleted. */ - prvCheckTasksWaitingTermination(); - - #if ( configUSE_PREEMPTION == 0 ) - { - /* If we are not using preemption we keep forcing a task switch to - see if any other task has become available. If we are using - preemption we don't need to do this as any task becoming available - will automatically get the processor anyway. */ - taskYIELD(); - } - #endif - - #if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) - { - /* When using preemption tasks of equal priority will be - timesliced. If a task that is sharing the idle priority is ready - to run then the idle task should yield before the end of the - timeslice. - - A critical region is not required here as we are just reading from - the list, and an occasional incorrect value will not matter. If - the ready list at the idle priority contains more than one task - then a task other than the idle task is ready to execute. */ - if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( unsigned portBASE_TYPE ) 1 ) - { - taskYIELD(); - } - } - #endif - - #if ( configUSE_IDLE_HOOK == 1 ) - { - extern void vApplicationIdleHook( void ); - - /* Call the user defined function from within the idle task. This - allows the application designer to add background functionality - without the overhead of a separate task. - NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES, - CALL A FUNCTION THAT MIGHT BLOCK. */ - vApplicationIdleHook(); - } - #endif - } -} /*lint !e715 pvParameters is not accessed but all task functions require the same prototype. */ - - - - - - - -/*----------------------------------------------------------- - * File private functions documented at the top of the file. - *----------------------------------------------------------*/ - - - -static void prvInitialiseTCBVariables( tskTCB *pxTCB, unsigned portSHORT usStackDepth, const signed portCHAR * const pcName, unsigned portBASE_TYPE uxPriority ) -{ - pxTCB->usStackDepth = usStackDepth; - - /* Store the function name in the TCB. */ - strncpy( ( char * ) pxTCB->pcTaskName, ( const char * ) pcName, ( unsigned portSHORT ) configMAX_TASK_NAME_LEN ); - pxTCB->pcTaskName[ ( unsigned portSHORT ) configMAX_TASK_NAME_LEN - ( unsigned portSHORT ) 1 ] = '\0'; - - /* This is used as an array index so must ensure it's not too large. */ - if( uxPriority >= configMAX_PRIORITIES ) - { - uxPriority = configMAX_PRIORITIES - 1; - } - pxTCB->uxPriority = uxPriority; - - vListInitialiseItem( &( pxTCB->xGenericListItem ) ); - vListInitialiseItem( &( pxTCB->xEventListItem ) ); - - /* Set the pxTCB as a link back from the xListItem. This is so we can get - back to the containing TCB from a generic item in a list. */ - listSET_LIST_ITEM_OWNER( &( pxTCB->xGenericListItem ), pxTCB ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - listSET_LIST_ITEM_OWNER( &( pxTCB->xEventListItem ), pxTCB ); -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseTaskLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyTasksLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedTaskList1 ); - vListInitialise( ( xList * ) &xDelayedTaskList2 ); - vListInitialise( ( xList * ) &xPendingReadyList ); - - #if ( INCLUDE_vTaskDelete == 1 ) - { - vListInitialise( ( xList * ) &xTasksWaitingTermination ); - } - #endif - - #if ( INCLUDE_vTaskSuspend == 1 ) - { - vListInitialise( ( xList * ) &xSuspendedTaskList ); - } - #endif - - /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList - using list2. */ - pxDelayedTaskList = &xDelayedTaskList1; - pxOverflowDelayedTaskList = &xDelayedTaskList2; -} -/*-----------------------------------------------------------*/ - -static void prvCheckTasksWaitingTermination( void ) -{ - #if ( INCLUDE_vTaskDelete == 1 ) - { - portBASE_TYPE xListIsEmpty; - - /* ucTasksDeleted is used to prevent vTaskSuspendAll() being called - too often in the idle task. */ - if( uxTasksDeleted > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskSuspendAll(); - xListIsEmpty = listLIST_IS_EMPTY( &xTasksWaitingTermination ); - xTaskResumeAll(); - - if( !xListIsEmpty ) - { - tskTCB *pxTCB; - - portENTER_CRITICAL(); - { - pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xTasksWaitingTermination ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - --uxCurrentNumberOfTasks; - --uxTasksDeleted; - } - portEXIT_CRITICAL(); - - prvDeleteTCB( pxTCB ); - } - } - } - #endif -} -/*-----------------------------------------------------------*/ - -static tskTCB *prvAllocateTCBAndStack( unsigned portSHORT usStackDepth ) -{ -tskTCB *pxNewTCB; - - /* Allocate space for the TCB. Where the memory comes from depends on - the implementation of the port malloc function. */ - pxNewTCB = ( tskTCB * ) pvPortMalloc( sizeof( tskTCB ) ); - - if( pxNewTCB != NULL ) - { - /* Allocate space for the stack used by the task being created. - The base of the stack memory stored in the TCB so the task can - be deleted later if required. */ - pxNewTCB->pxStack = ( portSTACK_TYPE * ) pvPortMalloc( ( ( size_t )usStackDepth ) * sizeof( portSTACK_TYPE ) ); - - if( pxNewTCB->pxStack == NULL ) - { - /* Could not allocate the stack. Delete the allocated TCB. */ - vPortFree( pxNewTCB ); - pxNewTCB = NULL; - } - else - { - /* Just to help debugging. */ - memset( pxNewTCB->pxStack, tskSTACK_FILL_BYTE, usStackDepth * sizeof( portSTACK_TYPE ) ); - } - } - - return pxNewTCB; -} -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( signed portCHAR *pcWriteBuffer, xList *pxList, signed portCHAR cStatus ) - { - volatile tskTCB *pxNextTCB, *pxFirstTCB; - static portCHAR pcStatusString[ 50 ]; - unsigned portSHORT usStackRemaining; - - /* Write the details of all the TCB's in pxList into the buffer. */ - listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); - do - { - listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); - usStackRemaining = usTaskCheckFreeStackSpace( ( unsigned portCHAR * ) pxNextTCB->pxStack ); - sprintf( pcStatusString, ( portCHAR * ) "%s\t\t%c\t%u\t%u\t%u\r\n", pxNextTCB->pcTaskName, cStatus, ( unsigned int ) pxNextTCB->uxPriority, usStackRemaining, ( unsigned int ) pxNextTCB->uxTCBNumber ); - strcat( ( portCHAR * ) pcWriteBuffer, ( portCHAR * ) pcStatusString ); - - } while( pxNextTCB != pxFirstTCB ); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - unsigned portSHORT usTaskCheckFreeStackSpace( const unsigned portCHAR *pucStackByte ) - { - register unsigned portSHORT usCount = 0; - - while( *pucStackByte == tskSTACK_FILL_BYTE ) - { - pucStackByte -= portSTACK_GROWTH; - usCount++; - } - - usCount /= sizeof( portSTACK_TYPE ); - - return usCount; - } -#endif -/*-----------------------------------------------------------*/ - - - -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - - static void prvDeleteTCB( tskTCB *pxTCB ) - { - /* Free up the memory allocated by the scheduler for the task. It is up to - the task to free any memory allocated at the application level. */ - vPortFree( pxTCB->pxStack ); - vPortFree( pxTCB ); - } - -#endif - - -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) - - xTaskHandle xTaskGetCurrentTaskHandle( void ) - { - xTaskHandle xReturn; - - portENTER_CRITICAL(); - { - xReturn = ( xTaskHandle ) pxCurrentTCB; - } - portEXIT_CRITICAL(); - - return xReturn; - } - -#endif - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/71x_lib.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/71x_lib.c deleted file mode 100644 index a161fc2d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/71x_lib.c +++ /dev/null @@ -1,158 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_lib.c -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Peripherals pointers initialization -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#define EXT - -#include "71x_map.h" - -#ifdef LIBDEBUG - -extern u32 T0TIMI_Addr; - -/******************************************************************************* -* Function Name : debug -* Description : Initialize the pointers to peripherals -* Input : none -* Output : none -* Return : none -*******************************************************************************/ -void libdebug(void) -{ - #ifdef _ADC12 - ADC12 = (ADC12_TypeDef *)ADC12_BASE; - #endif - - #ifdef _APB - #ifdef _APB1 - APB1 = (APB_TypeDef *)(APB1_BASE+0x10); - #endif - #ifdef _APB2 - APB2 = (APB_TypeDef *)(APB2_BASE+0x10); - #endif - #endif - - #ifdef _BSPI - #ifdef _BSPI0 - BSPI0 = (BSPI_TypeDef *)BSPI0_BASE; - #endif - #ifdef _BSPI1 - BSPI1 = (BSPI_TypeDef *)BSPI1_BASE; - #endif - #endif - - #ifdef _CAN - CAN = (CAN_TypeDef *)CAN_BASE; - #endif - - #ifdef _EIC - EIC = (EIC_TypeDef *)EIC_BASE; - #endif - - #ifdef _EMI - EMI = (EMI_TypeDef *)EMI_BASE; - #endif - - #ifdef _FLASH - FLASHR = (FLASHR_TypeDef *)FLASHR_BASE; - FLASHPR = (FLASHPR_TypeDef *)FLASHPR_BASE; - #endif - - #ifdef _GPIO - #ifdef _GPIO0 - GPIO0 = (GPIO_TypeDef *)GPIO0_BASE; - #endif - #ifdef _GPIO1 - GPIO1 = (GPIO_TypeDef *)GPIO1_BASE; - #endif - #ifdef _GPIO2 - GPIO2 = (GPIO_TypeDef *)GPIO2_BASE; - #endif - #endif - - #ifdef _I2C - #ifdef _I2C0 - I2C0 = (I2C_TypeDef *)I2C0_BASE; - #endif - #ifdef _I2C1 - I2C1 = (I2C_TypeDef *)I2C1_BASE; - #endif - #endif - - #ifdef _PCU - PCU = (PCU_TypeDef *)PCU_BASE; - #endif - - #ifdef _RCCU - RCCU = (RCCU_TypeDef *)RCCU_BASE; - #endif - - #ifdef _RTC - RTC = (RTC_TypeDef *)RTC_BASE; - #endif - - #ifdef _TIM - #ifdef _TIM0 - TIM0 = (TIM_TypeDef *)TIM0_BASE; - #endif - #ifdef _TIM1 - TIM1 = (TIM_TypeDef *)TIM1_BASE; - #endif - #ifdef _TIM2 - TIM2 = (TIM_TypeDef *)TIM2_BASE; - #endif - #ifdef _TIM3 - TIM3 = (TIM_TypeDef *)TIM3_BASE; - #endif - #endif - - #ifdef _UART - #ifdef _UART0 - UART0 = (UART_TypeDef *)UART0_BASE; - #endif - #ifdef _UART1 - UART1 = (UART_TypeDef *)UART1_BASE; - #endif - #ifdef _UART2 - UART2 = (UART_TypeDef *)UART2_BASE; - #endif - #ifdef _UART3 - UART3 = (UART_TypeDef *)UART3_BASE; - #endif - #endif - - #ifdef _USB - USB = (USB_TypeDef *)USB_BASE; - #endif - - #ifdef _WDG - WDG = (WDG_TypeDef *)WDG_BASE; - #endif - - #ifdef _XTI - XTI = (XTI_TypeDef *)XTI_BASE; - #endif - - #ifdef _IRQVectors - IRQVectors = (IRQVectors_TypeDef *)&T0TIMI_Addr; - #endif -} - -#endif /* LIBDEBUG */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/adc12.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/adc12.c deleted file mode 100644 index a300fa35..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/adc12.c +++ /dev/null @@ -1,79 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : adc12.c -* Author : MCD Application Team -* Date First Issued : 07/31/2003 -* Description : Code sources of ADC12 functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#include "adc12.h" - -/******************************************************************************* -* Function Name : ADC12_Init -* Description : Initialize the ADC -* Input : None. -* Return : None. -*******************************************************************************/ -void ADC12_Init(void) -{ - //Initiate ADC12 registers to their reset values - ADC12->CSR = 0x00; - ADC12->CPR = 0x01; -} - -/******************************************************************************* -* Function Name : ADC12_PrescalerConfig -* Description : Configure the prescaler -* Input : None. -* Return : None. -*******************************************************************************/ -void ADC12_PrescalerConfig(u32 Adc12_clk) -{ - //Update the Prescaler Register - ADC12->CPR = (vu16) (RCCU_FrequencyValue(RCCU_PCLK)/(Adc12_clk*512*8)); -} - -/******************************************************************************* -* Function Name : ADC12_ITConfig -* Description : enable or disable the interrupt -* Input : status=ENABLE=>enable interrupt -* status=DISABLE=>disable interrupt -* Return : None -*******************************************************************************/ -void ADC12_ITConfig(FunctionalState NewState) -{ - if (NewState == ENABLE) - { - // Test the conversion mode - if (ADC12->CSR & 0x0040) - { - // Set interrupt bit equivalent to the channel selected - switch (ADC12->CSR & 0x30) - { - case 0x00 : ADC12->CSR |= ADC12_IT0_Mask; break; - case 0x10 : ADC12->CSR |= ADC12_IT1_Mask; break; - case 0x20 : ADC12->CSR |= ADC12_IT2_Mask; break; - case 0x30 : ADC12->CSR |= ADC12_IT3_Mask; break; - } - } - else - // Set all interrupt bits in case of round robin mode - ADC12->CSR |= ADC12_IT_Mask; - } - else - // Clear all interrupt bits - ADC12->CSR &= ~ADC12_IT_Mask; -} -/*********************(c) 2003 STMicroelectronics********************* END OF FILE **/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/apb.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/apb.c deleted file mode 100644 index ec171401..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/apb.c +++ /dev/null @@ -1,24 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : apb.c -* Author : MCD Application Team -* Date First Issued : 05/30/2003 -* Description : This file provides all the APB software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "apb.h" - - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/bspi.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/bspi.c deleted file mode 100644 index acbe3418..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/bspi.c +++ /dev/null @@ -1,171 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : bspi.c -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : This file provides all the BSPI software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "bspi.h" - -/******************************************************************************* -* Function Name : BSPI_Init -* Description : Initializes BSPI peripheral control and registers to their default reset values. -* Input : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Output : BSPI peripheral registers and BSPI global variables are initialized. -* Return : None. -*******************************************************************************/ -void BSPI_Init(BSPI_TypeDef *BSPIx) -{ - BSPIx->CSR2 = 0x41; - BSPIx->CSR1 = 0x00; - BSPIx->CLK = 0x06; -} - -/******************************************************************************* -* Function Name : BSPI_TrItSrc. -* Description : Configures the transmit interrupt source. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : TrItSrc: specifies the transmit interrupt source. -* : Refer to the section ‘Transmit Interrupt Sources’ for more details on the -* : allowed values of this parameter. -* Output : TIE bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -void BSPI_TrItSrc(BSPI_TypeDef *BSPIx, BSPI_TR_IT_SRCS TrItSrc) -{ - switch (TrItSrc) - { - case BSPI_TR_DIS: - BSPIx->CSR2 &= ~0xC000; - break; - case BSPI_TR_FE: - BSPIx->CSR2 &= ~0x8000; - BSPIx->CSR2 |= 0x4000; - break; - case BSPI_TR_UFL: - BSPIx->CSR2 &= ~0x4000; - BSPIx->CSR2 |= 0x8000; - break; - case BSPI_TR_FF: - BSPIx->CSR2 |= 0xC000; - break; - } -} - -/******************************************************************************* -* Function Name : BSPI_RcItSrc. -* Description : Configures the receive interrupt source. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : RcItSrc: specifies the source for the receive interrupt. -* : Refer to the section ‘Receive Interrupt Sources’ for more details on the -* : allowed values of this parameter. -* Output : RIE bit in BSPCSR1 is register. -* Return : None. -*******************************************************************************/ -void BSPI_RcItSrc(BSPI_TypeDef *BSPIx, BSPI_RC_IR_SRCS RcItSrc) -{ - switch (RcItSrc) - { - case BSPI_RC_DIS: - BSPIx->CSR1 &= ~0x000C; - break; - case BSPI_RC_FNE: - BSPIx->CSR1 &= ~0x0008; - BSPIx->CSR1 |= 0x0004; - break; - case BSPI_RC_FF: - BSPIx->CSR1 |= 0x000C; - break; - } -} - -/******************************************************************************* -* Function Name : BSPI_TrFifoDepth -* Description : Configures BSPI transmission FIFO number of words. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI. -* Input 2 : TDepth:specifies the depth of the transmit FIFO. -* Output : TFE bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -void BSPI_TrFifoDepth(BSPI_TypeDef *BSPIx, u8 TDepth) -{ - if (TDepth > 0 && TDepth < 11) - { - TDepth--; - BSPIx->CSR2 &= (TDepth*0x400) | ~0x3C00; - BSPIx->CSR2 |= TDepth*0x400; - } - else BSPIx->CSR2 &= ~0x3C00; -} - -/******************************************************************************* -* Function Name : BSPI_RcFifoDepth -* Description : Configures BSPI reception FIFO number of words. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : RDepth:specifies the depth of the receive FIFO. -* Output : RFE bits [3:0] in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -void BSPI_RcFifoDepth(BSPI_TypeDef *BSPIx, u8 RDepth) -{ - if (RDepth > 0 && RDepth < 11) - { - RDepth--; - BSPIx->CSR1 &= (RDepth*0x1000) | ~0xF000; - BSPIx->CSR1 |= RDepth*0x1000; - } - else BSPIx->CSR1 &= ~0xF000; -} - -/******************************************************************************* -* Function Name : BSPI_BufferSend. -* Description : Transmits data from a buffer. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : PtrToBuffer is an ‘u8’ pointer to the first word of the buffer to be transmitted. -* Input 3 : NbOfWords parameter indicates the number of words saved in the buffer to be sent. -* Output : None. -* Return : None. -*******************************************************************************/ -void BSPI_BufferSend(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords) -{ - vu8 SendWord = 0; - while (SendWord < NbOfWords) - { - BSPI_WordSend(BSPIx, *(PtrToBuffer+SendWord)); - SendWord++; - } -} - -/******************************************************************************* -* Function Name : BSPI_BufferReceive. -* Description : Receives number of data words and stores them in user defined area. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : PtrToBuffer is an ‘u8’ pointer to the first word of the defined area to save the received buffer. -* Input 3 : NbOfWords parameter indicates the number of words to be received in the buffer. -* Output : None. -* Return : None. -*******************************************************************************/ -void BSPI_BufferReceive(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords) -{ - vu16 ReceiveWord = 0; - while (ReceiveWord < NbOfWords) - { - *(PtrToBuffer+ReceiveWord) = BSPI_WordReceive(BSPIx); - ReceiveWord++; - } -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/can.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/can.c deleted file mode 100644 index 48d491c8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/can.c +++ /dev/null @@ -1,541 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : can.c -* Author : MCD Application Team -* Date First Issued : 10/27/2003 -* Description : This file contains all the functions prototypes for the -* CAN bus software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "can.h" -#include "xti.h" -#include "pcu.h" - -// macro to format the timing register value from the timing parameters -#define CAN_TIMING(tseg1, tseg2, sjw, brp) (((tseg2-1) & 0x07) << 12) | (((tseg1-1) & 0x0F) << 8) | (((sjw-1) & 0x03) << 6) | ((brp-1) & 0x3F) - -// array of pre-defined timing parameters for standard bitrates -u16 CanTimings[] = { // value bitrate NTQ TSEG1 TSEG2 SJW BRP - CAN_TIMING(11, 4, 4, 5), // 0x3AC4 100 kbit/s 16 11 4 4 5 - CAN_TIMING(11, 4, 4, 4), // 0x3AC3 125 kbit/s 16 11 4 4 4 - CAN_TIMING( 4, 3, 3, 4), // 0x2383 250 kbit/s 8 4 3 3 4 - CAN_TIMING(13, 2, 1, 1), // 0x1C00 500 kbit/s 16 13 2 1 1 - CAN_TIMING( 4, 3, 1, 1), // 0x2300 1 Mbit/s 8 4 3 1 1 -}; - -/******************************************************************************* -* Function Name : CAN_SetBitrate -* Description : Setup a standard CAN bitrate -* Input 1 : one of the CAN_BITRATE_xxx defines -* Output : None -* Return : None -* Note : CAN must be in initialization mode -*******************************************************************************/ -void CAN_SetBitrate(u32 bitrate) -{ - CAN->BTR = CanTimings[bitrate]; // write the predefined timing value - CAN->BRPR = 0; // clear the Extended Baud Rate Prescaler -} - -/******************************************************************************* -* Function Name : CAN_SetTiming -* Description : Setup the CAN timing with specific parameters -* Input 1 : Time Segment before the sample point position, from 1 to 16 -* Input 2 : Time Segment after the sample point position, from 1 to 8 -* Input 3 : Synchronisation Jump Width, from 1 to 4 -* Input 4 : Baud Rate Prescaler, from 1 to 1024 -* Output : None -* Return : None -* Note : CAN must be in initialization mode -*******************************************************************************/ -void CAN_SetTiming(u32 tseg1, u32 tseg2, u32 sjw, u32 brp) -{ - CAN->BTR = CAN_TIMING(tseg1, tseg2, sjw, brp); - CAN->BRPR = ((brp-1) >> 6) & 0x0F; -} - -/******************************************************************************* -* Function Name : CAN_SleepRequest -* Description : Request the CAN cell to enter sleep mode -* Input 1 : CAN_WAKEUP_ON_EXT or CAN_WAKEUP_ON_CAN -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SleepRequest(u32 WakeupMode) -{ - // Wakeup Line 6 is linked to CAN RX pin (port 1.11) - // Wakeup Line 2 is linked to external pin (port 2.8) - u32 WakeupLine = (WakeupMode == CAN_WAKEUP_ON_CAN ? XTI_Line6 : XTI_Line2); - - CAN_WaitEndOfTx(); - - XTI_Init(); - - // Configure the Wakeup Line mode, select Falling edge (transition to dominant state) - XTI_LineModeConfig(WakeupLine, XTI_FallingEdge); - - // Enable Wake-Up interrupt - XTI_LineConfig(WakeupLine, ENABLE); - - // Enable Wake-Up mode with interrupt - XTI_ModeConfig(XTI_WakeUpInterrupt, ENABLE); - - XTI_PendingBitClear(XTI_InterruptLineValue()); - - // Enter STOP mode (resume execution from here) - PCU_LPMEnter(PCU_STOP); -} - -/******************************************************************************* -* Function Name : CAN_GetFreeIF -* Description : Search the first free message interface, starting from 0 -* Input : None -* Output : None -* Return : A free message interface number (0 or 1) if found, else 2 -*******************************************************************************/ -static u32 CAN_GetFreeIF(void) -{ - if ((CAN->sMsgObj[0].CRR & CAN_CRR_BUSY) == 0) - return 0; - else if ((CAN->sMsgObj[1].CRR & CAN_CRR_BUSY) == 0) - return 1; - else return 2; -} - -/******************************************************************************* -* Macro Name : xxx_ID_MSK, xxx_ID_ARB -* Description : Form the Mask and Arbitration registers value to filter a range -* of identifiers or a fixed identifier, for standard and extended IDs -*******************************************************************************/ -#define RANGE_ID_MSK(range_start, range_end) (~((range_end) - (range_start))) -#define RANGE_ID_ARB(range_start, range_end) ((range_start) & (range_end)) - -#define FIXED_ID_MSK(id) RANGE_ID_MSK((id), (id)) -#define FIXED_ID_ARB(id) RANGE_ID_ARB((id), (id)) - -#define STD_RANGE_ID_MSK(range_start, range_end) ((u16)((RANGE_ID_MSK((range_start), (range_end)) & 0x7FF) << 2)) -#define STD_RANGE_ID_ARB(range_start, range_end) ((u16)(RANGE_ID_ARB((range_start), (range_end)) << 2)) - -#define STD_FIXED_ID_MSK(id) ((u16)((FIXED_ID_MSK(id) & 0x7FF) << 2)) -#define STD_FIXED_ID_ARB(id) ((u16)(FIXED_ID_ARB(id) << 2)) - -#define EXT_RANGE_ID_MSK_L(range_start, range_end) ((u16)(RANGE_ID_MSK((range_start), (range_end)) >> 11)) -#define EXT_RANGE_ID_MSK_H(range_start, range_end) ((u16)(STD_RANGE_ID_MSK((range_start), (range_end)) | ((RANGE_ID_MSK((range_start), (range_end)) >> 27) & 0x03))) -#define EXT_RANGE_ID_ARB_L(range_start, range_end) ((u16)(RANGE_ID_ARB((range_start), (range_end)) >> 11)) -#define EXT_RANGE_ID_ARB_H(range_start, range_end) ((u16)(STD_RANGE_ID_ARB((range_start), (range_end)) | ((RANGE_ID_ARB((range_start), (range_end)) >> 27) & 0x03))) - -#define EXT_FIXED_ID_MSK_L(id) ((u16)(FIXED_ID_MSK(id) >> 11)) -#define EXT_FIXED_ID_MSK_H(id) ((u16)(STD_FIXED_ID_MSK(id) | ((FIXED_ID_MSK(id) >> 27) & 0x03))) -#define EXT_FIXED_ID_ARB_L(id) ((u16)(FIXED_ID_ARB(id) >> 11)) -#define EXT_FIXED_ID_ARB_H(id) ((u16)(STD_FIXED_ID_ARB(id) | ((FIXED_ID_ARB(id) >> 27) & 0x03))) - -/******************************************************************************* -* Function Name : CAN_SetUnusedMsgObj -* Description : Configure the message object as unused -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetUnusedMsgObj(u32 msgobj) -{ - u32 msg_if; - while ((msg_if = CAN_GetFreeIF()) == 2); - - CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD - | CAN_CMR_MASK - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - CAN->sMsgObj[msg_if].M1R = 0; - CAN->sMsgObj[msg_if].M2R = 0; - - CAN->sMsgObj[msg_if].A1R = 0; - CAN->sMsgObj[msg_if].A2R = 0; - - CAN->sMsgObj[msg_if].MCR = 0; - - CAN->sMsgObj[msg_if].DA1R = 0; - CAN->sMsgObj[msg_if].DA2R = 0; - CAN->sMsgObj[msg_if].DB1R = 0; - CAN->sMsgObj[msg_if].DB2R = 0; - - CAN->sMsgObj[msg_if].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_SetTxMsgObj -* Description : Configure the message object as TX -* Input 1 : message object number, from 0 to 31 -* Input 2 : CAN_STD_ID or CAN_EXT_ID -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetTxMsgObj(u32 msgobj, u32 idType) -{ - u32 msg_if; - while ((msg_if = CAN_GetFreeIF()) == 2); - - CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD - | CAN_CMR_MASK - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - CAN->sMsgObj[msg_if].M1R = 0; - CAN->sMsgObj[msg_if].A1R = 0; - - if (idType == CAN_STD_ID) - { - CAN->sMsgObj[msg_if].M2R = CAN_M2R_MDIR; - CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_DIR; - } - else - { - CAN->sMsgObj[msg_if].M2R = CAN_M2R_MDIR | CAN_M2R_MXTD; - CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_DIR | CAN_A2R_XTD; - } - - CAN->sMsgObj[msg_if].MCR = CAN_MCR_TXIE | CAN_MCR_EOB; - - CAN->sMsgObj[msg_if].DA1R = 0; - CAN->sMsgObj[msg_if].DA2R = 0; - CAN->sMsgObj[msg_if].DB1R = 0; - CAN->sMsgObj[msg_if].DB2R = 0; - - CAN->sMsgObj[msg_if].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_SetRxMsgObj -* Description : Configure the message object as RX -* Input 1 : message object number, from 0 to 31 -* Input 2 : CAN_STD_ID or CAN_EXT_ID -* Input 3 : low part of the identifier range used for acceptance filtering -* Input 4 : high part of the identifier range used for acceptance filtering -* Input 5 : TRUE for a single receive object or a FIFO receive object that -* is the last one of the FIFO -* FALSE for a FIFO receive object that is not the last one -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetRxMsgObj(u32 msgobj, u32 idType, u32 idLow, u32 idHigh, bool singleOrFifoLast) -{ - u32 msg_if; - while ((msg_if = CAN_GetFreeIF()) == 2); - - CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD - | CAN_CMR_MASK - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - if (idType == CAN_STD_ID) - { - CAN->sMsgObj[msg_if].M1R = 0; - CAN->sMsgObj[msg_if].M2R = STD_RANGE_ID_MSK(idLow, idHigh); - - CAN->sMsgObj[msg_if].A1R = 0; - CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | STD_RANGE_ID_ARB(idLow, idHigh); - } - else - { - CAN->sMsgObj[msg_if].M1R = EXT_RANGE_ID_MSK_L(idLow, idHigh); - CAN->sMsgObj[msg_if].M2R = CAN_M2R_MXTD | EXT_RANGE_ID_MSK_H(idLow, idHigh); - - CAN->sMsgObj[msg_if].A1R = EXT_RANGE_ID_ARB_L(idLow, idHigh); - CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_XTD | EXT_RANGE_ID_ARB_H(idLow, idHigh); - } - - CAN->sMsgObj[msg_if].MCR = CAN_MCR_RXIE | CAN_MCR_UMASK | (singleOrFifoLast ? CAN_MCR_EOB : 0); - - CAN->sMsgObj[msg_if].DA1R = 0; - CAN->sMsgObj[msg_if].DA2R = 0; - CAN->sMsgObj[msg_if].DB1R = 0; - CAN->sMsgObj[msg_if].DB2R = 0; - - CAN->sMsgObj[msg_if].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_InvalidateAllMsgObj -* Description : Configure all the message objects as unused -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void CAN_InvalidateAllMsgObj(void) -{ - u32 i; - for (i = 0; i < 32; i++) - CAN_SetUnusedMsgObj(i); -} - -/******************************************************************************* -* Function Name : CAN_Init -* Description : Initialize the CAN cell and set the bitrate -* Input 1 : any binary value formed from the CAN_CTL_xxx defines -* Input 2 : one of the CAN_BITRATE_xxx defines -* Output : None -* Return : None -*******************************************************************************/ -void CAN_Init(u8 mask, u32 bitrate) -{ - CAN_EnterInitMode(CAN_CR_CCE | mask); - CAN_SetBitrate(bitrate); - CAN_LeaveInitMode(); - CAN_LeaveTestMode(); -} - -/******************************************************************************* -* Function Name : CAN_ReleaseMessage -* Description : Release the message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -*******************************************************************************/ -void CAN_ReleaseMessage(u32 msgobj) -{ - u32 i; - while ((i = CAN_GetFreeIF()) == 2); - - CAN->sMsgObj[i].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQST; - CAN->sMsgObj[i].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_SendMessage -* Description : Start transmission of a message -* Input 1 : message object number, from 0 to 31 -* Input 2 : pointer to the message structure containing data to transmit -* Output : None -* Return : 1 if transmission was OK, else 0 -*******************************************************************************/ -u32 CAN_SendMessage(u32 msgobj, canmsg* pCanMsg) -{ - while (CAN->sMsgObj[0].CRR & CAN_CRR_BUSY); - -// if (CAN->sMsgObj[0].COMR & CAN_CRQ_BUSY) -// return 0; // message interface 0 not free - - CAN->SR &= ~CAN_SR_TXOK; - - // read the Arbitration and Message Control - CAN->sMsgObj[0].CMR = CAN_CMR_ARB | CAN_CMR_CONTROL; - - CAN->sMsgObj[0].CRR = 1 + msgobj; - - while (CAN->sMsgObj[0].CRR & CAN_CRR_BUSY); - - // update the contents needed for transmission - CAN->sMsgObj[0].CMR = CAN_CMR_WRRD - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - if ((CAN->sMsgObj[0].A2R & CAN_A2R_XTD) == 0) - { - // standard ID - CAN->sMsgObj[0].A1R = 0; - CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | STD_FIXED_ID_ARB(pCanMsg->Id); - } - else - { - // extended ID - CAN->sMsgObj[0].A1R = EXT_FIXED_ID_ARB_L(pCanMsg->Id); - CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | EXT_FIXED_ID_ARB_H(pCanMsg->Id); - } - - CAN->sMsgObj[0].MCR = (CAN->sMsgObj[0].MCR & 0xFEF0) | CAN_MCR_NEWDAT | CAN_MCR_TXRQST | pCanMsg->Dlc; - - CAN->sMsgObj[0].DA1R = ((u16)pCanMsg->Data[1]<<8) | pCanMsg->Data[0]; - CAN->sMsgObj[0].DA2R = ((u16)pCanMsg->Data[3]<<8) | pCanMsg->Data[2]; - CAN->sMsgObj[0].DB1R = ((u16)pCanMsg->Data[5]<<8) | pCanMsg->Data[4]; - CAN->sMsgObj[0].DB2R = ((u16)pCanMsg->Data[7]<<8) | pCanMsg->Data[6]; - - CAN->sMsgObj[0].CRR = 1 + msgobj; - - return 1; -} - -/******************************************************************************* -* Function Name : CAN_ReceiveMessage -* Description : Get the message, if received -* Input 1 : message object number, from 0 to 31 -* Input 2 : if TRUE, the message object is released when getting the data -* if FALSE, the message object is not released -* Input 3 : pointer to the message structure where received data is stored -* Output : None -* Return : 1 if reception was OK, else 0 (no message pending) -*******************************************************************************/ -u32 CAN_ReceiveMessage(u32 msgobj, bool release, canmsg* pCanMsg) -{ - if (!CAN_IsMessageWaiting(msgobj)) - return 0; - - CAN->SR &= ~CAN_SR_RXOK; - - // read the message contents - CAN->sMsgObj[1].CMR = CAN_CMR_MASK - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_CLRINTPND - | (release ? CAN_CMR_TXRQST : 0) - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - CAN->sMsgObj[1].CRR = 1 + msgobj; - - while (CAN->sMsgObj[1].CRR & CAN_CRR_BUSY); - - if ((CAN->sMsgObj[1].A2R & CAN_A2R_XTD) == 0) - { - // standard ID - pCanMsg->IdType = CAN_STD_ID; - pCanMsg->Id = (CAN->sMsgObj[1].A2R >> 2) & 0x07FF; - } - else - { - // extended ID - pCanMsg->IdType = CAN_EXT_ID; - pCanMsg->Id = ((CAN->sMsgObj[1].A2R >> 2) & 0x07FF) | ((u32)CAN->sMsgObj[1].A1R << 11) | (((u32)CAN->sMsgObj[1].A2R & 0x0003) << 27); - } - - pCanMsg->Dlc = CAN->sMsgObj[1].MCR & 0x0F; - - pCanMsg->Data[0] = (u8) CAN->sMsgObj[1].DA1R; - pCanMsg->Data[1] = (u8)(CAN->sMsgObj[1].DA1R >> 8); - pCanMsg->Data[2] = (u8) CAN->sMsgObj[1].DA2R; - pCanMsg->Data[3] = (u8)(CAN->sMsgObj[1].DA2R >> 8); - pCanMsg->Data[4] = (u8) CAN->sMsgObj[1].DB1R; - pCanMsg->Data[5] = (u8)(CAN->sMsgObj[1].DB1R >> 8); - pCanMsg->Data[6] = (u8) CAN->sMsgObj[1].DB2R; - pCanMsg->Data[7] = (u8)(CAN->sMsgObj[1].DB2R >> 8); - - return 1; -} - -/******************************************************************************* -* Function Name : CAN_WaitEndOfTx -* Description : Wait until current transmission is finished -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void CAN_WaitEndOfTx(void) -{ - while ((CAN->SR & CAN_SR_TXOK) == 0); - CAN->SR &= ~CAN_SR_TXOK; -} - -/******************************************************************************* -* Function Name : CAN_BasicSendMessage -* Description : Start transmission of a message in BASIC mode -* Input 1 : pointer to the message structure containing data to transmit -* Output : None -* Return : 1 if transmission was OK, else 0 -* Note : CAN must be in BASIC mode -*******************************************************************************/ -u32 CAN_BasicSendMessage(canmsg* pCanMsg) -{ - // clear NewDat bit in IF2 to detect next reception - CAN->sMsgObj[1].MCR &= ~CAN_MCR_NEWDAT; - - CAN->SR &= ~CAN_SR_TXOK; - - CAN->sMsgObj[0].CMR = CAN_CMR_WRRD - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - if (pCanMsg->IdType == CAN_STD_ID) - { - // standard ID - CAN->sMsgObj[0].A1R = 0; - CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | STD_FIXED_ID_ARB(pCanMsg->Id); - } - else - { - // extended ID - CAN->sMsgObj[0].A1R = EXT_FIXED_ID_ARB_L(pCanMsg->Id); - CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | EXT_FIXED_ID_ARB_H(pCanMsg->Id); - } - - CAN->sMsgObj[0].MCR = (CAN->sMsgObj[0].MCR & 0xFCF0) | pCanMsg->Dlc; - - CAN->sMsgObj[0].DA1R = ((u16)pCanMsg->Data[1]<<8) | pCanMsg->Data[0]; - CAN->sMsgObj[0].DA2R = ((u16)pCanMsg->Data[3]<<8) | pCanMsg->Data[2]; - CAN->sMsgObj[0].DB1R = ((u16)pCanMsg->Data[5]<<8) | pCanMsg->Data[4]; - CAN->sMsgObj[0].DB2R = ((u16)pCanMsg->Data[7]<<8) | pCanMsg->Data[6]; - - // request transmission - CAN->sMsgObj[0].CRR = CAN_CRR_BUSY | (1 + 0); - - return 1; -} - -/******************************************************************************* -* Function Name : CAN_BasicReceiveMessage -* Description : Get the message in BASIC mode, if received -* Input 1 : pointer to the message structure where received data is stored -* Output : None -* Return : 1 if reception was OK, else 0 (no message pending) -* Note : CAN must be in BASIC mode -*******************************************************************************/ -u32 CAN_BasicReceiveMessage(canmsg* pCanMsg) -{ - if ((CAN->sMsgObj[1].MCR & CAN_MCR_NEWDAT) == 0) - return 0; - - CAN->SR &= ~CAN_SR_RXOK; - - CAN->sMsgObj[1].CMR = CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - if ((CAN->sMsgObj[1].A2R & CAN_A2R_XTD) == 0) - { - // standard ID - pCanMsg->IdType = CAN_STD_ID; - pCanMsg->Id = (CAN->sMsgObj[1].A2R >> 2) & 0x07FF; - } - else - { - // extended ID - pCanMsg->IdType = CAN_EXT_ID; - pCanMsg->Id = ((CAN->sMsgObj[1].A2R >> 2) & 0x07FF) | ((u32)CAN->sMsgObj[1].A1R << 11) | (((u32)CAN->sMsgObj[1].A2R & 0x0003) << 27); - } - - pCanMsg->Dlc = CAN->sMsgObj[1].MCR & 0x0F; - - pCanMsg->Data[0] = (u8) CAN->sMsgObj[1].DA1R; - pCanMsg->Data[1] = (u8)(CAN->sMsgObj[1].DA1R >> 8); - pCanMsg->Data[2] = (u8) CAN->sMsgObj[1].DA2R; - pCanMsg->Data[3] = (u8)(CAN->sMsgObj[1].DA2R >> 8); - pCanMsg->Data[4] = (u8) CAN->sMsgObj[1].DB1R; - pCanMsg->Data[5] = (u8)(CAN->sMsgObj[1].DB1R >> 8); - pCanMsg->Data[6] = (u8) CAN->sMsgObj[1].DB2R; - pCanMsg->Data[7] = (u8)(CAN->sMsgObj[1].DB2R >> 8); - - return 1; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/eic.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/eic.c deleted file mode 100644 index 8bc053df..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/eic.c +++ /dev/null @@ -1,67 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : eic.c -* Author : MCD Application Team -* Date First Issued : 06/25/2003 -* Description : This file provides all the EIC software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "eic.h" - -/******************************************************************************* -* Function Name : EIC_Init -* Description : Initialise the EIC using the load PC instruction -* (PC = PC +offset) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EIC_Init(void) -{ - extern u32 T0TIMI_Addr; - u8 bCounter; - u32 dOffset=((u32)&T0TIMI_Addr); - EIC->ICR = 0x00000000; // Disable FIQ and IRQ interrupts - EIC->IER = 0x00000000; // Disable all channels interrupts - EIC->IPR = 0xFFFFFFFF; // Clear all pending bits - EIC->FIR = 0x0000000C; // Disable all FIQ channels interrupts and clear FIQ - // channels pending bits - EIC->CIPR = 0x00000000; // Ste the current priority level to zero - EIC->IVR = 0xE59F0000; // IVR = high half of load PC instruction - dOffset = (dOffset+0x00007E0)<<16; - for(bCounter=0; bCounter<32; bCounter++) // Initialize SIRn registers - { - EIC->SIR[bCounter] = dOffset|0xF0000000; - dOffset += 0x00000004 << 16; - } -} - -/******************************************************************************* -* Function Name : EIC_CurrentPriorityLevelConfig -* Description : Change the current priority level of the srved IRQ routine -* Input 1 : New priority -* Output : None -* Return : None -*******************************************************************************/ -void EIC_CurrentPriorityLevelConfig(u8 NewPriorityLevel) -{ - u32 dVal; - dVal = EIC->ICR; // Save ICR content - EIC->ICR &= ~0x0001; // Disable IRQ interrupts. - EIC->CIPR = NewPriorityLevel; // Change the current priority - EIC->ICR = dVal; // Restore ICR content -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/emi.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/emi.c deleted file mode 100644 index caf2a73e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/emi.c +++ /dev/null @@ -1,24 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : emi.c -* Author : MCD Application Team -* Date First Issued : 08/08/2003 -* Description : This file provides all the EMI software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "emi.h" - - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/flash.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/flash.c deleted file mode 100644 index 9e28cf3a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/flash.c +++ /dev/null @@ -1,354 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : flash.c -* Author : MCD Application Team -* Date First Issued : 07/28/2003 -* Description : This file provides all the Flash software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "flash.h" - - u32 D0_temp; - - -/******************************************************************************* -* Function Name : FLASH_Init -* Description : Initialise the Flash -* Input : None -* Return : None -*******************************************************************************/ -void FLASH_Init(void) -{ -// Reset Flash Control Registers - FLASHR->CR0 = 0x00000000; - FLASHR->CR1 = 0x00000000; -// Reset Flash Data Registers - FLASHR->DR0 = 0xFFFFFFFF; - FLASHR->DR1 = 0xFFFFFFFF; -// Reset Flash Error Register - FLASHR->ER = 0x00000000; -} - -/******************************************************************************* -* Function Name : FLASH_WordWrite -* Description : Writes a Word to the Flash -* Input 1 : Address of the Destination -* Input 2 : Word To program -* Return : None -*******************************************************************************/ -void FLASH_WordWrite(u32 XtargetAdd, u32 Xdata) -{ - FLASH_WaitForLastTask(); - // set the Word Programming bit 'WPG' in the CR0 Reg - FLASHR->CR0 |= FLASH_WPG_Mask; - // Load the destination address in AR - FLASHR->AR = XtargetAdd; - // Load DATA to be programmed in DR0 - FLASHR->DR0 = Xdata; - // Set the Write Mode Start bit 'WMS' in the CR0 Reg to Start Write Operation - FLASHR->CR0 |= FLASH_WMS_Mask; - // Wait until the write operation is completed - FLASH_WaitForLastTask(); -} - -/******************************************************************************* -* Function Name : FLASH_DWordWrite -* Description : Writes Double Word to the Flash -* Input 1 : Address of the Destination -* Input 2 : Word 1 To program -* Input 3 : Word 2 To program -* Return : None -*******************************************************************************/ -void FLASH_DWordWrite(u32 XtargetAdd, u32 Xdata0, u32 Xdata1) -{ - - FLASH_WaitForLastTask(); - // set the Double Word Programming bit 'DWPG' in the CR0 Reg - FLASHR->CR0 |= FLASH_DWPG_Mask; - // Load the destination address in AR - FLASHR->AR = XtargetAdd; - // Load DATA0 in DR0 Reg - FLASHR->DR0 = Xdata0; - // Load DATA1 in DR1 Reg - FLASHR->DR1 = Xdata1; - // Set the Write Mode Start bit 'WMS' in the CR0 Reg to Start Write Operation - FLASHR->CR0 |= FLASH_WMS_Mask; - // Wait until the write operation is completed - FLASH_WaitForLastTask(); -} - - -/******************************************************************************* -* Function Name : FLASH_SectorErase -* Description : Erases a Flash sector -* Input 1 : Sectors to be Erased -* Return : None -*******************************************************************************/ -void FLASH_SectorErase(u32 Xsectors) -{ - FLASH_WaitForLastTask(); - // Set the Sector Erase flag 'SER' in the FCRO reg - FLASHR->CR0 |= FLASH_SER_Mask; - // Select the Sectors to be erased in the CR1 register - FLASHR->CR1 |= Xsectors; - // Set the Write Mode Start bit 'WMS' in the CR0 Reg to Start Erase Operation - FLASHR->CR0 |= FLASH_WMS_Mask; - // Wait until the erase operation is completed - FLASH_WaitForLastTask(); -} -/******************************************************************************* -* Function Name : FLASH_Suspend -* Description : Suspends the current program or erase operation -* Input 1 : None -* Return : Flash CR0 register -*******************************************************************************/ -u32 FLASH_Suspend(void) -{ - u32 temp; - /* Save the CR0 Contetnt */ - temp = FLASHR->CR0; - /* Set The suspend Bit 'SUSP' in the CR0 register */ - FLASHR->CR0 |= FLASH_SUSP_Mask; - /* Wait until the flash controller acknowlegs the suspend of the current - operation */ - FLASH_WaitForLastTask(); - return temp; -} -/******************************************************************************* -* Function Name : FLASH_Resume -* Description : Resume a Suspended program or erase operation -* Input 1 : The operation to be resumed -* Return : None -*******************************************************************************/ -void FLASH_Resume(u32 FLASH_LastOperation) -{ - // Clear The suspend Bit 'SUSP' in the FRC0 register - FLASHR->CR0 &= ~FLASH_SUSP_Mask; - // Resume last operation - FLASHR->CR0 = FLASH_LastOperation & 0x7FFFFFFF; - // Set write mode bit - FLASHR->CR0 |= FLASH_WMS_Mask; -} - -/******************************************************************************* -* Function Name : FLASH_WordRead -* Description : Read a single word of the flash -* Input 1 : Source Address -* Return : Word -*******************************************************************************/ -u32 FLASH_WordRead(u32 FLASH_SourceAdd) -{ - FLASH_WaitForLastTask(); - // Reads the data from the specified Address - return *(u32 *)(FLASH_SourceAdd + 0x40000000); -} -/******************************************************************************* -* Function Name : FLASH_WritePrConfig -* Description : Configures The Write Protection Bits -* Input 1 : Flash Bank -* Input 2 : Enable or disable Protection -* Return : None -*******************************************************************************/ -void FLASH_WritePrConfig(u32 Xsectors, FunctionalState NewState) -{ - FLASH_WaitForLastTask(); - - if (NewState == ENABLE) - { - // Set the Set protection Bit - FLASHR->CR0 |= FLASH_SPR_Mask; - // Set the Register Address - FLASHR->AR = 0x4010DFB0; - // Data To be Programmed to the Protection Register - FLASHR->DR0 = ~Xsectors; - // Set the WMS bit to Start the Sequence - FLASHR->CR0 |= FLASH_WMS_Mask; - } - else - { - // Set the Set protection Bit - FLASHR->CR0 |= FLASH_SPR_Mask; - // Set the Register Address - FLASHR->AR = 0x4010DFB0; - // Data To be Programmed to the Protection Register - FLASHR->DR0 = FLASHPR->NVWPAR|Xsectors; - // Set the WMS bit to Start the Sequence - FLASHR->CR0 |= FLASH_WMS_Mask; - } -} - -/******************************************************************************* -* Function Name : FLASH_PermanantDebugPrConfig -* Description : Configures The Debug Protection Bits -* Input 1 : ENABLE or DISABLE -* Return : Word -*******************************************************************************/ -void FLASH_PermanantDebugPrConfig(FunctionalState NewState) -{ - u16 ProtectionLevel = FLASH_ProtectionLevel(); - - - if (NewState == ENABLE) - { - // If the First Protection Reset the DBGP bit - if(!ProtectionLevel) - { - // Set the Set protection Bit - FLASHR->CR0 |= FLASH_SPR_Mask; - // Set the Register Address - FLASHR->AR = 0x4010DFB8; - // Data To be Programmed to the Protection Register - FLASHR->DR0 = ~2; - // Set the WMS bit to Start the Sequence - FLASHR->CR0 |= FLASH_WMS_Mask; - } - else - { - // Set the Set protection Bit - FLASHR->CR0 |= FLASH_SPR_Mask; - // Set the Register Address - FLASHR->AR = 0x4010DFBC; - // Data To be Programmed to the Protection Register - D0_temp=~(1<<(15+ProtectionLevel)); - FLASHR->DR0 =D0_temp; - // Set the WMS bit to Start the Sequence - FLASHR->CR0 |= FLASH_WMS_Mask; - } - - } - else if(ProtectionLevel) - { - // Set the Set protection Bit - FLASHR->CR0 |= FLASH_SPR_Mask; - // Set the Register Address - FLASHR->AR = 0x4010DFBC; - // Data To be Programmed to the Protection Register - FLASHR->DR0 =~(1<<(ProtectionLevel-1)); - // Set the WMS bit to Start the Sequence - FLASHR->CR0 |= FLASH_WMS_Mask; - } - -} - -/******************************************************************************* -* Function Name : FLASH_FlagStatus -* Description : Returns the NewState of Flash flags -* Input 1 : Flash Flag -* Return : flagstate -*******************************************************************************/ -FlagStatus FLASH_FlagStatus(flashflags Xflag) -{ - FlagStatus TmpResult; - u8 TmpReg; - u8 TmpPos; - // get the Register Index - TmpReg = (Xflag & FLASH_Reg_Mask) >> 5; - // get the Flag Index - TmpPos = (Xflag & FLASH_Flag_Mask); - - switch(TmpReg) - { - case 0 : // CR0 - { - // Returns the status of the CR0[TmpPos] flag - TmpResult = (FLASHR->CR0 & (1<CR1 & (1<ER & (1<> 5; - TmpPos = (Xflag & FLASH_Flag_Mask); - - switch(TmpReg) - { - case 0 : // CR0 - { - // Clears the status of the CR0[TmpPos] flag - FLASHR->CR0 &= ~(1<CR1 &= ~(1<ER &= ~(1<NVAPR0&2) - TmpBitIndex=0; - else - TmpBitIndex=1; - - ProtectionRegs=~(FLASHPR->NVAPR1>>16); - while (((ProtectionRegs) != 0) && (TmpBitIndex < 16)) - { - ProtectionRegs = ProtectionRegs >> 1 ; - TmpBitIndex++; - } - return TmpBitIndex; -} -/******************************************************************************* -* Function Name : Wait For Last Task -* Description : Waits for the end of last task on a Flash Bank -* Input 1 : None. -* Return : None -*******************************************************************************/ -void FLASH_WaitForLastTask(void) -{ - while (FLASHR->CR0&0x16); -} - -/*******************(C)COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/gpio.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/gpio.c deleted file mode 100644 index 588d1f28..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/gpio.c +++ /dev/null @@ -1,115 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : gpio.c -* Author : MCD Application Team -* Date First Issued : 06/08/2003 -* Description : This file provides all the GPIO software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "gpio.h" - -/******************************************************************************* -* Function Name : GPIO_Config -* Description : Configure the GPIO port pins -* Input 1 : GPIOx (x can be 0,1 or 2) the desired port -* Input 2 : Port_Pins : pins placements -* Input 3 : Pins Mode -* Output : None -* Return : None -*******************************************************************************/ -void GPIO_Config (GPIO_TypeDef *GPIOx, u16 Port_Pins, GpioPinMode_TypeDef GPIO_Mode) -{ - switch (GPIO_Mode) - { - case GPIO_HI_AIN_TRI: - GPIOx->PC0&=~Port_Pins; - GPIOx->PC1&=~Port_Pins; - GPIOx->PC2&=~Port_Pins; - break; - - case GPIO_IN_TRI_TTL: - GPIOx->PC0|=Port_Pins; - GPIOx->PC1&=~Port_Pins; - GPIOx->PC2&=~Port_Pins; - break; - - case GPIO_IN_TRI_CMOS: - GPIOx->PC0&=~Port_Pins; - GPIOx->PC1|=Port_Pins; - GPIOx->PC2&=~Port_Pins; - break; - - case GPIO_IPUPD_WP: - GPIOx->PC0|=Port_Pins; - GPIOx->PC1|=Port_Pins; - GPIOx->PC2&=~Port_Pins; - break; - - case GPIO_OUT_OD: - GPIOx->PC0&=~Port_Pins; - GPIOx->PC1&=~Port_Pins; - GPIOx->PC2|=Port_Pins; - break; - - case GPIO_OUT_PP: - GPIOx->PC0|=Port_Pins; - GPIOx->PC1&=~Port_Pins; - GPIOx->PC2|=Port_Pins; - break; - - case GPIO_AF_OD: - GPIOx->PC0&=~Port_Pins; - GPIOx->PC1|=Port_Pins; - GPIOx->PC2|=Port_Pins; - break; - - case GPIO_AF_PP: - GPIOx->PC0|=Port_Pins; - GPIOx->PC1|=Port_Pins; - GPIOx->PC2|=Port_Pins; - break; - } -} - -/******************************************************************************* -* Function Name : GPIO_BitWrite -* Description : Set or reset the selected port pin -* Input 1 : Selected GPIO port -* Input 2 : Pin number -* Input 3 : bit value -* Output : None -* Return : None -*******************************************************************************/ -void GPIO_BitWrite(GPIO_TypeDef *GPIOx, u8 Port_Pin, u8 Port_Val) -{ - if (Port_Val&0x01) GPIOx->PD |= 1<PD &= ~(1<PD = Port_Byte ? (GPIOx->PD&0x00FF) | ((u16)Port_Val<<8) - : (GPIOx->PD&0xFF00) | Port_Val; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/i2c.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/i2c.c deleted file mode 100644 index 70c7f68a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/i2c.c +++ /dev/null @@ -1,504 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : i2c.c -* Author : MCD Application Team -* Date First Issued : 09/05/2003 -* Description : This file provides Code sources I2C functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "i2c.h" -#include "rccu.h" -#include - -/******************************************************************************* -* Function Name : I2C_Init -* Description : Initializes I2C peripheral control and registers to their -* default reset values. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -void I2C_Init (I2C_TypeDef *I2Cx) -{ - //Initialize all the register of the specified I2C passed as parameter - I2Cx->CR=0x0; - I2Cx->CCR=0x0; - I2Cx->ECCR=0x0; - I2Cx->OAR1=0x0; - I2Cx->OAR2=0x0; - (void)I2Cx->SR1; - (void)I2Cx->SR2; - I2Cx->DR=0x0; -} - -/******************************************************************************* -* Function Name : I2C_OnOffConfig -* Description : Enables or disables I2C peripheral. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -void I2C_OnOffConfig (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) - { - // Enable the I2C selected by setting twice the PE bit on the CR register - I2Cx->CR |= I2C_PESET_Mask; - I2Cx->CR |= I2C_PESET_Mask; - } - else - // Disable the I2C selected - I2Cx->CR &= ~I2C_PESET_Mask; -} - -/******************************************************************************* -* Function Name : I2C_FlagStatus -* Description : Checks whether any I2C Flag is set or not. -* Input : I2Cx ( I2C0 or I2C1 ) -* Access(DIRECT or INDIRECT) -* Flag : the flag to be read -* input 4: an (u8) variable needed in the case -* of the INDIRECT access -* Return : the NewState of the Flag (SET or RESET). -*******************************************************************************/ -FlagStatus I2C_FlagStatus (I2C_TypeDef *I2Cx, RegisterAccess Access, I2C_Flags Flag, ...) -{ - u32 Tmp; - - if (Access == DIRECT) - // Store in Tmp variable the register where is located the flag - Tmp = I2C_GetStatus(I2Cx)&Flag; - else - { - va_list list; - //Get the fourth register - va_start(list,Flag); - Tmp = va_arg(list,u32); - Tmp&=Flag; - } - //Return the Flag NewState - return Tmp != 0 ? SET : RESET; -} - -/******************************************************************************* -* Function Name : I2C_FlagClear -* Description : Clears the I2C Flag passed as a parameter -* Input : I2Cx ( I2C0 or I2C1 ) -* Flag : the flag to be read -* input3: an (u8) parameter needed in the case that the flag -* to be cleared need a write in one register -* Return : None. -*******************************************************************************/ -void I2C_FlagClear (I2C_TypeDef *I2Cx, I2C_Flags Flag, ...) -{ - u8 Tmp = (u8)*((u32 *)&Flag + sizeof(Flag)); - - if (Flag==I2C_ADD10 || Flag==I2C_EVF || Flag==I2C_BERR || Flag==I2C_ARLO || - Flag==I2C_STOPF || Flag==I2C_AF || Flag==I2C_ENDAD) - //flags that need a read of the SR2 register to be cleared - { - // Read the SR2 register - (void)I2Cx->SR2; - // Two flags need a second step to be cleared - switch (Flag) - { - case I2C_ADD10: I2Cx->DR = Tmp; break; - case I2C_ENDAD: I2Cx->CR|=0x20; break; - } - } - else if (Flag==I2C_SB || Flag==I2C_ADSL || Flag==I2C_BTF || Flag==I2C_TRA) - //flags that need a read of the SR1 register to be cleared - { - // Read the SR1 register - (void)I2Cx->SR1; - if (Flag==I2C_SB) I2Cx->DR=Tmp; - else if (Flag==I2C_BTF || Flag==I2C_TRA) (void)I2Cx->DR; - } - else if ( Flag==I2C_M_SL || Flag==I2C_GCAL) - //flags that need the PE bit to be cleared - { - I2C_OnOffConfig (I2Cx, DISABLE); - I2C_OnOffConfig (I2Cx, ENABLE); - } -} - -/******************************************************************************* -* Function Name : I2C_SpeedConfig -* Description : Selects I2C clock speed and configures its corresponding mode. -* Input : I2Cx ( I2C0 or I2C1 ) -* Clock: I2C expected clock in Hertz. -* Return : None. -*******************************************************************************/ -void I2C_SpeedConfig (I2C_TypeDef *I2Cx, u32 Clock) -{ - u32 FCLK; - u16 result; - // Get the FCLK frequency using the RCCU library - FCLK = RCCU_FrequencyValue ( RCCU_FCLK ); - // Test on speed mode - // Update the CCR and ECCR are updated - if (Clock <=100000) - // Standard mode selected - { - result = ((FCLK / Clock) - 7)/2; - //Clear FM/SM bit - I2Cx->CCR=result &0x7f; - } - else if (Clock <=400000) - { - // Fast mode selected - result = ((FCLK/Clock)-9)/3; - //set FM/SM bit - I2Cx->CCR=result |0x80; - } - I2Cx->ECCR= result >>7; -} -/******************************************************************************* -* Function Name : I2C_AddressConfig -* Description : Defines the I2C bus address of the interface. -* Input : I2Cx ( I2C0 or I2C1 ). -* Address: an u16 parameter indicating the address -* of the interface. -* Mode (I2C_Mode10,I2C_Mode7). -* Return : None. -*******************************************************************************/ -void I2C_AddressConfig (I2C_TypeDef *I2Cx, u16 Address, I2C_Addressing Mode) -{ - //Update OAR1 bit[7:1] by the lowest byte of address - I2Cx->OAR1 = (u8)Address; - - if (Mode == I2C_Mode10) - //Update Add8 and add9 bits in OAR2 - I2Cx->OAR2 |= (Address & 0x0300)>>7; -} - -/******************************************************************************* -* Function Name : I2C_FCLKConfig -* Description : Configures frequency bits according to RCLK frequency. -* the selected I2C must be disabled -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -void I2C_FCLKConfig (I2C_TypeDef *I2Cx) -{ - u32 FCLK; - // Get the FCLK frequency using the RCCU library - FCLK = RCCU_FrequencyValue ( RCCU_FCLK ); - // Test the value of the FCLK and affect FR0,FR1&FR2 of the OAR2 register - if (FCLK > 5000000) - { - if (FCLK <10000000) - I2Cx->OAR2 |= 0x00; - else if (FCLK <16670000) - I2Cx->OAR2 |= 0x20; - else if (FCLK < 26670000) - I2Cx->OAR2 |= 0x40; - else if (FCLK <40000000) - I2Cx->OAR2 |= 0x60; - else if (FCLK < 53330000) - I2Cx->OAR2 |= 0x80; - else if (FCLK < 66000000) - I2Cx->OAR2 |= 0xA0; - else if (FCLK <80000000) - I2Cx->OAR2 |= 0xC0; - else if (FCLK <100000000) - I2Cx->OAR2 |= 0xE0; - } -} - -/******************************************************************************* -* Function Name : I2C_AddressSend -* Description : Transmits the address byte to select the slave device. -* Input : I2Cx ( I2C0 or I2C1 ) -* Address: an u16 parameter indicating the slave address -* Mode (I2C_Mode10,I2C_Mode7). -* Direction (I2C_RX,I2C_TX). -* Return : None. -********************************************************************************/ -void I2C_AddressSend (I2C_TypeDef *I2Cx, u16 Address, I2C_Addressing Mode, I2C_Direction Direction) -{ - if (Mode == I2C_Mode10 ) - //10 bit addressing mode - { - // Update the DR register by generated header - I2Cx->DR = ((Address>>7)|0xf0)&0xfe; - //Wait till I2C_ADD10 flag is set - while ((I2Cx->SR1&0x40)==0); - //clear I2C_ADD10 flag - (void)I2Cx->SR2; - I2Cx->DR=(u8)Address; - //Test on the direction to define the read/write bit - if (Direction == I2C_RX) - { - //Wait till I2C_ENDAD flag is set - while ((I2Cx->SR2&0x20)==0); - I2Cx->CR|=0x20; - //Repeated START Generate - I2C_STARTGenerate (I2Cx, ENABLE); - //Test on SB flag status - while ((I2Cx->SR1&0x01)==0); - I2Cx->DR = ((Address>>7)|0xf1); - } - } - else - // 7 bit addressing mode - { - if (Direction == I2C_RX) Address|=0x01; else Address&=~0x01; - I2Cx->DR=(u8)Address; - } -} - -/******************************************************************************* -* Function Name : I2C_ByteSend -* Description : Send a single byte of data. -* Input : I2Cx ( I2C0 or I2C1 ) -* Data : the byte to be sent to the slave -* Return : None. -*******************************************************************************/ -void I2C_ByteSend (I2C_TypeDef *I2Cx, u8 Data) -{ - //Write in the DR register the byte to be sent - I2Cx->DR = Data; -} - -/******************************************************************************* -* Function Name : I2C_BufferSend -* Description : Send data from a buffer whose number of bytes is known -* Input : I2Cx ( I2C0 or I2C1 ) -* PtrToBuffer :pointer to the byte of buffer to be transmitted. -* NbOfBytes:Number of byte of the buffer -* Return : I2C_Tx_Status :transmission status (I2C_TX_AF, I2C_TX_ARLO, -* I2C_TX_BERR,I2C_TX_DATA_OK) -*******************************************************************************/ -I2C_Tx_Status I2C_BufferSend (I2C_TypeDef *I2Cx, u8 *PtrToBuffer, u8 NbOfBytes) -{ - u8 Interruption_Status; - u8 SentBytes; - u8 error; - I2C_Tx_Status I2C_TXTMP; - - //Test of the interrupt status - Interruption_Status=0; - Interruption_Status=I2Cx->CR & 0x01; - I2C_ITConfig (I2Cx, DISABLE); - //Wait till I2C_BTF bit is set - while ((I2Cx->SR1 & 0x08 )==0); - SentBytes=0; - while (SentBytesDR= *(PtrToBuffer+SentBytes); - //Wait till I2C_BTF bit is set or error detected - do - error = I2Cx->SR2 & 0x16; - while ((I2Cx->SR1 & 0x08)==0 && error==0); - // In case of error exit - if (error) break; - // increment SentBytes counter - SentBytes++; - } - if (error) - { - if (error & 0x10) - // I2C_TX_AF if Acknowledge failure is detected - I2C_TXTMP = I2C_TX_AF; - if (error & 0x02) - //I2C_TX_ARLO if the ARLO bit is set in the SR2 register - I2C_TXTMP = I2C_TX_ARLO; - if (error & 0x04) - // I2C_TX_BERR if the BERR bit is set in the SR2 register - I2C_TXTMP= I2C_TX_BERR; - } - else - //I2C_TX_DATA_OK to show that the buffer is well sent - I2C_TXTMP= I2C_TX_DATA_OK; - - //Restore the interrupt status - if (Interruption_Status==1) - I2C_ITConfig (I2Cx, ENABLE); - - return I2C_TXTMP; -} - -/******************************************************************************* -* Function Name : I2C_StringSend -* Description : Send data from a buffer -* Input : I2Cx ( I2C0 or I2C1 ) -* PtrToBuffer :pointer to the byte of string to be transmitted. -* Return : I2C_Tx_Status :transmission status (I2C_TX_AF, I2C_TX_ARLO, -* I2C_TX_BERR,I2C_TX_DATA_OK) -*******************************************************************************/ -I2C_Tx_Status I2C_StringSend (I2C_TypeDef *I2Cx, char *PtrToString) -{ - u8 NbOfBytes=0; - // count the number of byte composing the string passed as parameter. - while (*(PtrToString+NbOfBytes)!= '\0') - NbOfBytes++; - // call I2C_BufferSend function to execute the send part - return I2C_BufferSend (I2Cx,(u8 *)PtrToString,NbOfBytes); -} - -/******************************************************************************* -* Function Name : I2C_TransmissionStatus -* Description : Report the NewState of the transmission -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : I2C_Tx_Status :transmission status (I2C_TX_NO, I2C_TX_SB, -* I2C_TX_AF, I2C_TX_ARLO, I2C_TX_BERR,I2C_TX_ADD_OK, -* I2C_TX_DATA_OK,I2C_TX_ONGOING) -*******************************************************************************/ -I2C_Tx_Status I2C_TransmissionStatus (I2C_TypeDef *I2Cx) -{ - u8 SR1value; - u8 SR2value; - I2C_Tx_Status NewState; - - SR1value = I2Cx->SR1; - SR2value = I2Cx->SR2; - if ((I2Cx->SR1&0x10)==0) - NewState=I2C_TX_NO; - else if (I2Cx->SR1&0x01) - //I2C_SB bit is set - NewState=I2C_TX_SB; - else if ((SR2value & 0x10)&&(I2Cx->CR&0x04)) - //I2C_ACK &I2C_AF are both set - NewState=I2C_TX_AF; - else if (SR2value & 0x04) - //I2C_ARLO is set in multimaster mode - NewState=I2C_TX_ARLO; - else if (SR2value & 0x02) - //I2C_BERR bit is set - NewState=I2C_TX_BERR; - else if ((SR1value & 0x80)&& (I2Cx->SR2&0x20)) - //I2C_EVF and I2C_ENDAD are both set - NewState=I2C_TX_ADD_OK; - else if ((I2Cx->SR1&0x20)&& (I2Cx->SR1&0x08)) - //I2C_TRA and I2C_BTF are both set - NewState=I2C_TX_DATA_OK; - else - NewState=I2C_TX_ONGOING; - - return NewState; -} - -/******************************************************************************* -* Function Name : I2C_ByteReceive -* Description : Returns the received byte. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : the byte received -*******************************************************************************/ -u8 I2C_ByteReceive (I2C_TypeDef *I2Cx) -{ - //Wait till I2C_BTF bit is set - while ((I2Cx->SR1 & 0x08)==0); - return I2Cx->DR; -} - -/******************************************************************************* -* Function Name : I2C_BufferReceive -* Description : received a buffer. and return the status of error. -* Input : I2Cx ( I2C0 or I2C1 ) -* PtrToBuffer :pointer to the byte of buffer received. -* NbOfBytes:Number of byte to be received -* Return : I2C_Rx_Status:the NewState of the reception (,I2C_RX_AF, -* I2C_RX_ARLO,I2C_RX_BERR, I2C_RX_DATA_OK) -*******************************************************************************/ -I2C_Rx_Status I2C_BufferReceive (I2C_TypeDef *I2Cx, u8 *PtrToBuffer, u8 NbOfBytes) -{ - u8 Interruption_Status; - u8 ReceivedBytes; - u8 error; - I2C_Rx_Status I2C_RXTMP; - - //Test of the interrupt status - Interruption_Status=0; - Interruption_Status=I2Cx->CR & 0x01; - I2C_ITConfig (I2Cx, DISABLE); - ReceivedBytes=0; - while (ReceivedBytesSR2 & 0x16; - while ((I2Cx->SR1 & 0x08)==0 && !error); - if (error==0) - // No error detected - { - *(PtrToBuffer+ReceivedBytes) = I2Cx->DR; - ReceivedBytes++; - } - else break; - } - if (error) - { - if (error & 0x10) - // I2C_RX_AF if Acknowledge failure is detected - I2C_RXTMP= I2C_RX_AF; - else if (error & 0x02) - // I2C_RX_ARLO if the ARLO bit is set in the SR2 register - I2C_RXTMP= I2C_RX_ARLO; - else if (error & 0x04) - // I2C_RX_BERR if the BERR bit is set in the SR2 register - I2C_RXTMP= I2C_RX_BERR; - } - else - //I2C_RX_DATA_OK to show that the buffer is well sent - I2C_RXTMP= I2C_RX_DATA_OK; - - //Restore the interrupt status - if (Interruption_Status==1) - I2C_ITConfig (I2Cx, ENABLE); - - return I2C_RXTMP; -} - -/******************************************************************************* -* Function Name :I2C_ReceptionStatus -* Description : Report the reception NewState. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : I2C_Rx_Status:the NewState of the reception ( I2C_RX_NO, -* I2C_RX_SB,I2C_RX_AF,I2C_RX_ARLO,I2C_RX_BERR,I2C_RX_ADD_OK, -* I2C_RX_DATA_OK, I2C_RX_ONGOING) -*******************************************************************************/ -I2C_Rx_Status I2C_ReceptionStatus (I2C_TypeDef *I2Cx) -{ - u8 SR1value; - u8 SR2value; - I2C_Rx_Status NewState; - SR1value= I2Cx->SR1; - SR2value= I2Cx->SR2; - - if ((I2Cx->SR1&0x10) == 0) - NewState=I2C_RX_NO; - else if (I2Cx->SR1&0x01) - //I2C_SB bit is set - NewState=I2C_RX_SB; - else if ((SR2value & 0x10) && (I2Cx->CR&0x04)) - //I2C_ACK &I2C_AF are both set - NewState=I2C_RX_AF; - else if (SR2value & 0x04) - //I2C_ARLO is set - NewState=I2C_RX_ARLO; - else if (SR2value & 0x02) - //I2C_BERR bit is set - NewState=I2C_RX_BERR; - else if ((SR1value & 0x80) && (I2Cx->SR1&0x08)==0) - //2C_EVF is set & I2C_BTF is not set - NewState=I2C_RX_ADD_OK; - else if ((I2Cx->SR1&0x20)==0 && (I2Cx->SR1&0x08)) - //II2C_TRA is cleared & I2C_BTF is set - NewState=I2C_RX_DATA_OK; - else - NewState=I2C_RX_ONGOING; - return NewState; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_conf.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_conf.h deleted file mode 100644 index 6e416c8e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_conf.h +++ /dev/null @@ -1,73 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_conf.h -* Author : MCD Application Team -* Date First Issued : 16/05/2003 -* Description : Library configuration for the WDG example -******************************************************************************** -* History: -* 24/05/05 : V3.0 -* 30/11/04 : V2.0 -* 16/05/03 : Created -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __71x_CONF_H -#define __71x_CONF_H - -/* Comment the line below to put the library in release mode */ -//#define DEBUG - -#define INLINE static inline - -//#define USE_SERIAL_PORT -//#define USE_UART0 - -/* Main Oscillator Frequency value = 4 Mhz */ -#define RCCU_Main_Osc 4000000 - -/* Comment the lines below corresponding to unwanted peripherals */ -#define _ADC12 -#define _APB -#define _APB1 -#define _APB2 -#define _BSPI -#define _BSPI0 -#define _BSPI1 -#define _CAN -#define _EIC -#define _EMI -#define _FLASH -#define _GPIO -#define _GPIO0 -#define _GPIO1 -#define _GPIO2 -#define _I2C -#define _I2C0 -#define _I2C1 -#define _PCU -#define _RCCU -#define _RTC -#define _TIM -#define _TIM0 -#define _TIM1 -#define _TIM2 -#define _TIM3 -#define _UART -#define _UART0 -#define _UART1 -#define _UART2 -#define _UART3 -#define _USB -#define _WDG -#define _XTI -#define _IRQVectors - -#endif /* __71x_CONF_H */ - - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_it.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_it.h deleted file mode 100644 index 5b99928e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_it.h +++ /dev/null @@ -1,62 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_it.h -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Interrupt handlers -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef _71x_IT_H -#define _71x_IT_H - -#include "71x_lib.h" - - -void Undefined_Handler (void); -void FIQ_Handler (void); -void SWI_Handler (void); -void Prefetch_Handler (void); -void Abort_Handler (void); -void T0TIMI_IRQHandler (void); -void FLASH_IRQHandler (void); -void RCCU_IRQHandler (void); -void RTC_IRQHandler (void); -void WDG_IRQHandler (void); -void XTI_IRQHandler (void); -void USBHP_IRQHandler (void); -void I2C0ITERR_IRQHandler(void); -void I2C1ITERR_IRQHandler(void); -void UART0_IRQHandler (void); -void UART1_IRQHandler (void); -void UART2_IRQHandler (void); -void UART3_IRQHandler (void); -void BSPI0_IRQHandler (void); -void BSPI1_IRQHandler (void); -void I2C0_IRQHandler (void); -void I2C1_IRQHandler (void); -void CAN_IRQHandler (void); -void ADC12_IRQHandler (void); -void T1TIMI_IRQHandler (void); -void T2TIMI_IRQHandler (void); -void T3TIMI_IRQHandler (void); -void HDLC_IRQHandler (void); -void USBLP_IRQHandler (void); -void T0TOI_IRQHandler (void); -void T0OC1_IRQHandler (void); -void T0OC2_IRQHandler (void); - -#endif /* _71x_IT_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_lib.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_lib.h deleted file mode 100644 index 5532ca47..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_lib.h +++ /dev/null @@ -1,101 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_lib.h -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Global include for all peripherals -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __71x_LIB_H -#define __71x_LIB_H - -#include "71x_map.h" -#include "71x_conf.h" - - -#ifdef _ADC12 - #include "adc12.h" -#endif - -#ifdef _APB - #include "apb.h" -#endif - -#ifdef _BSPI - #include "bspi.h" -#endif - -#ifdef _CAN - #include "can.h" -#endif - -#ifdef _EIC - #include "eic.h" -#endif - -#ifdef _EMI - #include "emi.h" -#endif - -#ifdef _FLASH - #include "flash.h" -#endif - -#ifdef _GPIO - #include "gpio.h" -#endif - -#ifdef _I2C - #include "i2c.h" -#endif - -#ifdef _PCU - #include "pcu.h" -#endif - -#ifdef _RCCU - #include "rccu.h" -#endif - -#ifdef _RTC - #include "rtc.h" -#endif - -#ifdef _TIM - #include "tim.h" -#endif - -#ifdef _UART - #include "uart.h" -#endif - -#ifdef _USB -#endif - -#ifdef _WDG - #include "wdg.h" -#endif - -#ifdef _XTI - #include "xti.h" -#endif - - -#ifdef LIBDEBUG - void libdebug(void); -#endif - -#endif /* __71x_LIB_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_map.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_map.h deleted file mode 100644 index 0f49a154..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_map.h +++ /dev/null @@ -1,611 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_map.h -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Peripherals memory mapping and registers structures -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __71x_map_H -#define __71x_map_H - -#ifndef EXT - #define EXT extern -#endif - -#include "71x_conf.h" -#include "71x_type.h" - - -/* IP registers structures */ - -typedef volatile struct -{ - vu16 DATA0; - vu16 EMPTY1[3]; - vu16 DATA1; - vu16 EMPTY2[3]; - vu16 DATA2; - vu16 EMPTY3[3]; - vu16 DATA3; - vu16 EMPTY4[3]; - vu16 CSR; - vu16 EMPTY5[7]; - vu16 CPR; -} ADC12_TypeDef; - -typedef volatile struct -{ - vu32 CKDIS; - vu32 SWRES; -} APB_TypeDef; - -typedef volatile struct -{ - vu16 RXR; - vu16 EMPTY1; - vu16 TXR; - vu16 EMPTY2; - vu16 CSR1; - vu16 EMPTY3; - vu16 CSR2; - vu16 EMPTY4; - vu16 CLK; -} BSPI_TypeDef; - -typedef volatile struct -{ - vu16 CRR; - vu16 EMPTY1; - vu16 CMR; - vu16 EMPTY2; - vu16 M1R; - vu16 EMPTY3; - vu16 M2R; - vu16 EMPTY4; - vu16 A1R; - vu16 EMPTY5; - vu16 A2R; - vu16 EMPTY6; - vu16 MCR; - vu16 EMPTY7; - vu16 DA1R; - vu16 EMPTY8; - vu16 DA2R; - vu16 EMPTY9; - vu16 DB1R; - vu16 EMPTY10; - vu16 DB2R; - vu16 EMPTY11[27]; -} CAN_MsgObj_TypeDef; - -typedef volatile struct -{ - vu16 CR; - vu16 EMPTY1; - vu16 SR; - vu16 EMPTY2; - vu16 ERR; - vu16 EMPTY3; - vu16 BTR; - vu16 EMPTY4; - vu16 IDR; - vu16 EMPTY5; - vu16 TESTR; - vu16 EMPTY6; - vu16 BRPR; - vu16 EMPTY7[3]; - CAN_MsgObj_TypeDef sMsgObj[2]; - vu16 EMPTY8[16]; - vu16 TR1R; - vu16 EMPTY9; - vu16 TR2R; - vu16 EMPTY10[13]; - vu16 ND1R; - vu16 EMPTY11; - vu16 ND2R; - vu16 EMPTY12[13]; - vu16 IP1R; - vu16 EMPTY13; - vu16 IP2R; - vu16 EMPTY14[13]; - vu16 MV1R; - vu16 EMPTY15; - vu16 MV2R; - vu16 EMPTY16; -} CAN_TypeDef; - -typedef volatile struct -{ - vu32 ICR; - vu32 CICR; - vu32 CIPR; - vu32 EMPTY1[3]; - vu32 IVR; - vu32 FIR; - vu32 IER; - vu32 EMPTY2[7]; - vu32 IPR; - vu32 EMPTY3[7]; - vu32 SIR[32]; -} EIC_TypeDef; - -typedef volatile struct -{ - vu16 BCON0; - vu16 EMPTY1; - vu16 BCON1; - vu16 EMPTY2; - vu16 BCON2; - vu16 EMPTY3; - vu16 BCON3; - vu16 EMPTY4; -} EMI_TypeDef; - -typedef volatile struct -{ - vu32 CR0; - vu32 CR1; - vu32 DR0; - vu32 DR1; - vu32 AR; - vu32 ER; -} FLASHR_TypeDef; - -typedef volatile struct -{ - vu32 NVWPAR; - vu32 EMPTY; - vu32 NVAPR0; - vu32 NVAPR1; -} FLASHPR_TypeDef; - -typedef volatile struct -{ - vu16 PC0; - vu16 EMPTY1; - vu16 PC1; - vu16 EMPTY2; - vu16 PC2; - vu16 EMPTY3; - vu16 PD; - vu16 EMPTY4; -} GPIO_TypeDef; - -typedef volatile struct -{ - vu8 CR; - vu8 EMPTY1[3]; - vu8 SR1; - vu8 EMPTY2[3]; - vu8 SR2; - vu8 EMPTY3[3]; - vu8 CCR; - vu8 EMPTY4[3]; - vu8 OAR1; - vu8 EMPTY5[3]; - vu8 OAR2; - vu8 EMPTY6[3]; - vu8 DR; - vu8 EMPTY7[3]; - vu8 ECCR; -} I2C_TypeDef; - -typedef volatile struct -{ - vu32 CCR; - vu32 EMPTY1; - vu32 CFR; - vu32 EMPTY2[3]; - vu32 PLL1CR; - vu32 PER; - vu32 SMR; -} RCCU_TypeDef; - -typedef volatile struct -{ - vu16 MDIVR; - vu16 EMPTY1; - vu16 PDIVR; - vu16 EMPTY2; - vu16 RSTR; - vu16 EMPTY3; - vu16 PLL2CR; - vu16 EMPTY4; - vu16 BOOTCR; - vu16 EMPTY5; - vu16 PWRCR; -} PCU_TypeDef; - -typedef volatile struct -{ - vu16 CRH; - vu16 EMPTY1; - vu16 CRL; - vu16 EMPTY2; - vu16 PRLH; - vu16 EMPTY3; - vu16 PRLL; - vu16 EMPTY4; - vu16 DIVH; - vu16 EMPTY5; - vu16 DIVL; - vu16 EMPTY6; - vu16 CNTH; - vu16 EMPTY7; - vu16 CNTL; - vu16 EMPTY8; - vu16 ALRH; - vu16 EMPTY9; - vu16 ALRL; -} RTC_TypeDef; - -typedef volatile struct -{ - vu16 ICAR; - vu16 EMPTY1; - vu16 ICBR; - vu16 EMPTY2; - vu16 OCAR; - vu16 EMPTY3; - vu16 OCBR; - vu16 EMPTY4; - vu16 CNTR; - vu16 EMPTY5; - vu16 CR1; - vu16 EMPTY6; - vu16 CR2; - vu16 EMPTY7; - vu16 SR; -} TIM_TypeDef; - -typedef volatile struct -{ - vu16 BR; - vu16 EMPTY1; - vu16 TxBUFR; - vu16 EMPTY2; - vu16 RxBUFR; - vu16 EMPTY3; - vu16 CR; - vu16 EMPTY4; - vu16 IER; - vu16 EMPTY5; - vu16 SR; - vu16 EMPTY6; - vu16 GTR; - vu16 EMPTY7; - vu16 TOR; - vu16 EMPTY8; - vu16 TxRSTR; - vu16 EMPTY9; - vu16 RxRSTR; -} UART_TypeDef; - -typedef volatile struct -{ - vu32 EP0R; - vu32 EP1R; - vu32 EP2R; - vu32 EP3R; - vu32 EP4R; - vu32 EP5R; - vu32 EP6R; - vu32 EP7R; - vu32 EP8R; - vu32 EP9R; - vu32 EP10R; - vu32 EP11R; - vu32 EP12R; - vu32 EP13R; - vu32 EP14R; - vu32 EP15R; - vu32 CNTR; - vu32 ISTR; - vu32 FNR; - vu32 DADDR; - vu32 BTABLE; -} USB_TypeDef; - -typedef volatile struct -{ - vu16 CR; - vu16 EMPTY1; - vu16 PR; - vu16 EMPTY2; - vu16 VR; - vu16 EMPTY3; - vu16 CNT; - vu16 EMPTY4; - vu16 SR; - vu16 EMPTY5; - vu16 MR; - vu16 EMPTY6; - vu16 KR; -} WDG_TypeDef; - -typedef volatile struct -{ - vu8 SR; - vu8 EMPTY1[7]; - vu8 CTRL; - vu8 EMPTY2[3]; - vu8 MRH; - vu8 EMPTY3[3]; - vu8 MRL; - vu8 EMPTY4[3]; - vu8 TRH; - vu8 EMPTY5[3]; - vu8 TRL; - vu8 EMPTY6[3]; - vu8 PRH; - vu8 EMPTY7[3]; - vu8 PRL; -} XTI_TypeDef; - - -/* IRQ vectors */ -typedef volatile struct -{ - vu32 T0TIMI_IRQHandler; - vu32 FLASH_IRQHandler; - vu32 RCCU_IRQHandler; - vu32 RTC_IRQHandler; - vu32 WDG_IRQHandler; - vu32 XTI_IRQHandler; - vu32 USBHP_IRQHandler; - vu32 I2C0ITERR_IRQHandler; - vu32 I2C1ITERR_IRQHandler; - vu32 UART0_IRQHandler; - vu32 UART1_IRQHandler; - vu32 UART2_IRQHandler; - vu32 UART3_IRQHandler; - vu32 BSPI0_IRQHandler; - vu32 BSPI1_IRQHandler; - vu32 I2C0_IRQHandler; - vu32 I2C1_IRQHandler; - vu32 CAN_IRQHandler; - vu32 ADC12_IRQHandler; - vu32 T1TIMI_IRQHandler; - vu32 T2TIMI_IRQHandler; - vu32 T3TIMI_IRQHandler; - vu32 EMPTY1[3]; - vu32 HDLC_IRQHandler; - vu32 USBLP_IRQHandler; - vu32 EMPTY2[2]; - vu32 T0TOI_IRQHandler; - vu32 T0OC1_IRQHandler; - vu32 T0OC2_IRQHandler; -} IRQVectors_TypeDef; - -/*===================================================================*/ - -/* Memory mapping */ - -#define RAM_BASE 0x20000000 - -#define FLASHR_BASE 0x40100000 -#define FLASHPR_BASE 0x4010DFB0 - -#define EXTMEM_BASE 0x60000000 -#define RCCU_BASE 0xA0000000 -#define PCU_BASE 0xA0000040 -#define APB1_BASE 0xC0000000 -#define APB2_BASE 0xE0000000 -#define EIC_BASE 0xFFFFF800 - -#define I2C0_BASE (APB1_BASE + 0x1000) -#define I2C1_BASE (APB1_BASE + 0x2000) -#define UART0_BASE (APB1_BASE + 0x4000) -#define UART1_BASE (APB1_BASE + 0x5000) -#define UART2_BASE (APB1_BASE + 0x6000) -#define UART3_BASE (APB1_BASE + 0x7000) -#define CAN_BASE (APB1_BASE + 0x9000) -#define BSPI0_BASE (APB1_BASE + 0xA000) -#define BSPI1_BASE (APB1_BASE + 0xB000) -#define USB_BASE (APB1_BASE + 0x8800) - -#define XTI_BASE (APB2_BASE + 0x101C) -#define GPIO0_BASE (APB2_BASE + 0x3000) -#define GPIO1_BASE (APB2_BASE + 0x4000) -#define GPIO2_BASE (APB2_BASE + 0x5000) -#define ADC12_BASE (APB2_BASE + 0x7000) -#define TIM0_BASE (APB2_BASE + 0x9000) -#define TIM1_BASE (APB2_BASE + 0xA000) -#define TIM2_BASE (APB2_BASE + 0xB000) -#define TIM3_BASE (APB2_BASE + 0xC000) -#define RTC_BASE (APB2_BASE + 0xD000) -#define WDG_BASE (APB2_BASE + 0xE000) - -#define EMI_BASE (EXTMEM_BASE + 0x0C000000) - -/*===================================================================*/ - -/* IP data access */ - -#ifndef LIBDEBUG - #define ADC12 ((ADC12_TypeDef *)ADC12_BASE) - - #define APB1 ((APB_TypeDef *)(APB1_BASE+0x10)) - #define APB2 ((APB_TypeDef *)(APB2_BASE+0x10)) - - #define BSPI0 ((BSPI_TypeDef *)BSPI0_BASE) - #define BSPI1 ((BSPI_TypeDef *)BSPI1_BASE) - - #define CAN ((CAN_TypeDef *)CAN_BASE) - - #define EIC ((EIC_TypeDef *)EIC_BASE) - - #define EMI ((EMI_TypeDef *)EMI_BASE) - - #define FLASHR ((FLASHR_TypeDef *)FLASHR_BASE) - #define FLASHPR ((FLASHPR_TypeDef *)FLASHPR_BASE) - - #define GPIO0 ((GPIO_TypeDef *)GPIO0_BASE) - #define GPIO1 ((GPIO_TypeDef *)GPIO1_BASE) - #define GPIO2 ((GPIO_TypeDef *)GPIO2_BASE) - - #define I2C0 ((I2C_TypeDef *)I2C0_BASE) - #define I2C1 ((I2C_TypeDef *)I2C1_BASE) - - #define PCU ((PCU_TypeDef *)PCU_BASE) - - #define RCCU ((RCCU_TypeDef *)RCCU_BASE) - - #define RTC ((RTC_TypeDef *)RTC_BASE) - - #define TIM0 ((TIM_TypeDef *)TIM0_BASE) - #define TIM1 ((TIM_TypeDef *)TIM1_BASE) - #define TIM2 ((TIM_TypeDef *)TIM2_BASE) - #define TIM3 ((TIM_TypeDef *)TIM3_BASE) - - #define UART0 ((UART_TypeDef *)UART0_BASE) - #define UART1 ((UART_TypeDef *)UART1_BASE) - #define UART2 ((UART_TypeDef *)UART2_BASE) - #define UART3 ((UART_TypeDef *)UART3_BASE) - - #define USB ((USB_TypeDef *)USB_BASE) - - #define WDG ((WDG_TypeDef *)WDG_BASE) - - #define XTI ((XTI_TypeDef *)XTI_BASE) - - #define IRQVectors ((IRQVectors_TypeDef *)&T0TIMI_Addr) - -#else /* LIBDEBUG */ - - #ifdef _ADC12 - EXT ADC12_TypeDef *ADC12; - #endif - - #ifdef _APB - #ifdef _APB1 - EXT APB_TypeDef *APB1; - #endif - #ifdef _APB2 - EXT APB_TypeDef *APB2; - #endif - #endif - - #ifdef _BSPI - #ifdef _BSPI0 - EXT BSPI_TypeDef *BSPI0; - #endif - #ifdef _BSPI1 - EXT BSPI_TypeDef *BSPI1; - #endif - #endif - - #ifdef _CAN - EXT CAN_TypeDef *CAN; - #endif - - #ifdef _EIC - EXT EIC_TypeDef *EIC; - #endif - - #ifdef _EMI - EXT EMI_TypeDef *EMI; - #endif - - #ifdef _FLASH - EXT FLASHR_TypeDef *FLASHR; - EXT FLASHPR_TypeDef *FLASHPR; - #endif - - #ifdef _GPIO - #ifdef _GPIO0 - EXT GPIO_TypeDef *GPIO0; - #endif - #ifdef _GPIO1 - EXT GPIO_TypeDef *GPIO1; - #endif - #ifdef _GPIO2 - EXT GPIO_TypeDef *GPIO2; - #endif - #endif - - #ifdef _I2C - #ifdef _I2C0 - EXT I2C_TypeDef *I2C0; - #endif - #ifdef _I2C1 - EXT I2C_TypeDef *I2C1; - #endif - #endif - - #ifdef _PCU - EXT PCU_TypeDef *PCU; - #endif - - #ifdef _RCCU - EXT RCCU_TypeDef *RCCU; - #endif - - #ifdef _RTC - EXT RTC_TypeDef *RTC; - #endif - - #ifdef _TIM - #ifdef _TIM0 - EXT TIM_TypeDef *TIM0; - #endif - #ifdef _TIM1 - EXT TIM_TypeDef *TIM1; - #endif - #ifdef _TIM2 - EXT TIM_TypeDef *TIM2; - #endif - #ifdef _TIM3 - EXT TIM_TypeDef *TIM3; - #endif - #endif - - #ifdef _UART - #ifdef _UART0 - EXT UART_TypeDef *UART0; - #endif - #ifdef _UART1 - EXT UART_TypeDef *UART1; - #endif - #ifdef _UART2 - EXT UART_TypeDef *UART2; - #endif - #ifdef _UART3 - EXT UART_TypeDef *UART3; - #endif - #endif - - #ifdef _USB - EXT USB_TypeDef *USB; - #endif - - #ifdef _WDG - EXT WDG_TypeDef *WDG; - #endif - - #ifdef _XTI - EXT XTI_TypeDef *XTI; - #endif - - #ifdef _IRQVectors - EXT IRQVectors_TypeDef *IRQVectors; - #endif - -#endif /* LIBDEBUG */ - -#endif /* __71x_map_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_type.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_type.h deleted file mode 100644 index ccf60ae1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/71x_type.h +++ /dev/null @@ -1,51 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_type.h -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Common data types -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef _71x_type_H -#define _71x_type_H - -typedef unsigned long u32; -typedef unsigned short u16; -typedef unsigned char u8; - -typedef signed long s32; -typedef signed short s16; -typedef signed char s8; - -typedef volatile unsigned long vu32; -typedef volatile unsigned short vu16; -typedef volatile unsigned char vu8; - -typedef volatile signed long vs32; -typedef volatile signed short vs16; -typedef volatile signed char vs8; - -/*===================================================================*/ -typedef enum { FALSE = 0, TRUE = !FALSE } bool; -/*===================================================================*/ -typedef enum { RESET = 0, SET = !RESET } FlagStatus; -/*===================================================================*/ -typedef enum { DISABLE = 0, ENABLE = !DISABLE} FunctionalState; -/*===================================================================*/ -typedef enum { INDIRECT = 0, DIRECT = !INDIRECT} RegisterAccess; -/*===================================================================*/ - -#endif /* _71x_type_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/adc12.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/adc12.h deleted file mode 100644 index a3c0581f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/adc12.h +++ /dev/null @@ -1,181 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : adc12.h -* Author : MCD Application Team -* Date First Issued : 07/31/2003 -* Description : ADC12 functions prototypes -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef _ADC12_H -#define _ADC12_H - -#include "71x_map.h" -#include "rccu.h" - -//--------------------ADC12 Conversion modes----------------------------------- -typedef enum -{ - ADC12_SINGLE, - ADC12_ROUND -} ADC12_Modes; - -//--------------------ADC12 Channels------------------------------------------- -typedef enum -{ - ADC12_CHANNEL0 = 0x00, - ADC12_CHANNEL1 = 0x10, - ADC12_CHANNEL2 = 0x20, - ADC12_CHANNEL3 = 0x30 -} ADC12_Channels; - -//--------------------ADC12 control status register flag----------------------- -typedef enum -{ - ADC12_DA0 = 0x01, - ADC12_DA1 = 0x02, - ADC12_DA2 = 0x04, - ADC12_DA3 = 0x08, - ADC12_OR = 0x2000 -} ADC12_Flags; - -// Masks for the update of interrupt bit for channel n -#define ADC12_IT0_Mask 0x0100 -#define ADC12_IT1_Mask 0x0200 -#define ADC12_IT2_Mask 0x0400 -#define ADC12_IT3_Mask 0x0800 - -//Mask for the update of all the interrupt bit in the CSR -#define ADC12_IT_Mask 0x0F00 - -//Mask for Selecting mode -#define ADC12_Mode_Mask 0x0040 - -//Mask for configuring the converter -#define ADC12_Start_Mask 0x0020 - -/******************************************************************************* -* Function Name : ADC12_Init -* Description : Intialize the ADC -* Input : None. -* Return : None. -*******************************************************************************/ -void ADC12_Init(void); - -/******************************************************************************* -* Function Name : ADC12_ConversionStart -* Description : start the Conversion. -* Input : None -* Return : None -*******************************************************************************/ -INLINE void ADC12_ConversionStart (void) -{ - // Set the ADCen bit of the bootconf register - PCU->BOOTCR |= ADC12_Start_Mask; -} - -/******************************************************************************* -* Function Name : ADC12_ConversionStop -* Description : Disable the ADC -* Input : None. -* Return : None. -*******************************************************************************/ -INLINE void ADC12_ConversionStop(void) -{ - // Clear the ADCen bit of the bootconf register - PCU->BOOTCR &= ~ADC12_Start_Mask; -} - -/******************************************************************************* -* Function Name : ADC12_ModeConfig -* Description : Configure the mode of conversion -* Input : ADC12_SINGLE: single channel mode -* ADC12_ROUND : round robin mode -* Return : None -*******************************************************************************/ -INLINE void ADC12_ModeConfig (ADC12_Modes ConversionMode) -{ - // Select the mode of conversion and update the CSR[6] - ADC12->CSR= ConversionMode == ADC12_SINGLE ? ADC12->CSR | ADC12_Mode_Mask :\ - ADC12->CSR & ~ADC12_Mode_Mask; -} - -/******************************************************************************* -* Function Name : ADC12_PrescalerConfig -* Description : Configure the prescaler -* Input : Adc12_clk: Sampling frequency. -* Return : None. -*******************************************************************************/ -void ADC12_PrescalerConfig(u32 Adc12_clk); - -/******************************************************************************* -* Function Name : ADC12_ChannelSelect -* Description : select the channel passed as parameter to be converted. -* Input : ADC12_Channel: channel selected to be converted it may be -* ADC12_CHANNEL0 : select channel 0 -* ADC12_CHANNEL1 : select channel 1 -* ADC12_CHANNEL2 : select channel 2 -* ADC12_CHANNEL3 : select channel 3 -* Return : None -*******************************************************************************/ -INLINE void ADC12_ChannelSelect(ADC12_Channels ADC12_Channel) -{ - // Update the CSR by the value of the selected channel - ADC12->CSR |= ADC12_Channel; -} - -/******************************************************************************* -* Function Name : ADC12_FlagStatus -* Description : test if the flag passed in parameter is set or not -* Input : ADC12_DA0 :Data Available on Channel 0 -* ADC12_DA1 :Data Available on Channel 1 -* ADC12_DA2 :Data Available on Channel 2 -* ADC12_DA3 :Data Available on Channel 3 -* ADC12_OR :Overrun -* Return : SET: if the flag is set -* RESET: if the flag is clear -*******************************************************************************/ -INLINE FlagStatus ADC12_FlagStatus (ADC12_Flags flag) -{ - // Test on the flag status and return set or RESET - return ADC12->CSR & flag ? SET : RESET; -} - -/******************************************************************************* -* Function Name : ADC12_ConversionValue -* Description : Read the conversion result from the data register. -* Input : ADC12_Channel :number of the register to read -* ADC12_CHANNEL0 : read the DATA0 register -* ADC12_CHANNEL1 : read the DATA1 register -* ADC12_CHANNEL2 : read the DATA2 register -* ADC12_CHANNEL3 : read the DATA3 register -* Return : the register value of the channel converted -*******************************************************************************/ -INLINE u16 ADC12_ConversionValue( ADC12_Channels ADC12_Channel) -{ - // Clear the corespondent DA bit - ADC12->CSR &= ~(1<<(ADC12_Channel >> 4)); - // Only the 12 MSB of the DATAn Register are taken - return *(u16 *)(ADC12_BASE + (ADC12_Channel >> 1)) >> 4; -} - -/******************************************************************************* -* Function Name : ADC12_ITConfig -* Description : enable or disable the interruption -* Input : status=ENABLE=>enable interrupt -* status=DISABLE=>disable interrupt -* Return : None -*******************************************************************************/ -void ADC12_ITConfig (FunctionalState NewState); - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/apb.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/apb.h deleted file mode 100644 index 2e512d97..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/apb.h +++ /dev/null @@ -1,89 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : apb.h -* Author : MCD Application Team -* Date First Issued : 05/30/2003 -* Description : This file contains all the functions prototypes for the -* APB bridge software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __APB_H -#define __APB_H - -#include "71x_map.h" - -/* APB1 Peripherals */ -#define I2C0_Periph 0x0000 -#define I2C1_Periph 0x0002 -#define UART0_Periph 0x0008 -#define UART1_Periph 0x0010 -#define UART2_Periph 0x0020 -#define UART3_Periph 0x0080 -#define USB_Periph 0x0100 -#define CAN_Periph 0x0200 -#define BSPI0_Periph 0x0400 -#define BSPI1_Periph 0x0800 -#define HDLC_Periph 0x2000 - -/* APB2 Peripherals */ -#define XTI_Periph 0x0000 -#define GPIO0_Periph 0x0002 -#define GPIO1_Periph 0x0004 -#define GPIO2_Periph 0x0008 -#define ADC12_Periph 0x0010 -#define TIM0_Periph 0x0080 -#define TIM1_Periph 0x0200 -#define TIM2_Periph 0x0400 -#define TIM3_Periph 0x0800 -#define RTC_Periph 0x1000 -#define WDG_Periph 0x2000 -#define EIC_Periph 0x4000 - -/******************************************************************************* -* Function Name : APB_ClockConfig -* Description : Enables/Disables the Clock gating for peripherals on the APB -* bridge passed in parameters. -* Input : APBx ( APB1 or APB2 ) -* NewState ENABLE or DISABLE -* NewValue (u16) -* Return : None -*******************************************************************************/ -INLINE void APB_ClockConfig ( APB_TypeDef *APBx, - FunctionalState NewState, - u16 NewValue ) -{ - if (NewState == ENABLE) APBx->CKDIS &= ~NewValue; - else APBx->CKDIS |= NewValue; -} - -/******************************************************************************* -* Function Name : APB_SwResetConfig -* Description : Enables/Disables the software Reset for peripherals on the APB -* bridge passed in parameters. -* Input : APBx ( APB1 or APB2 ) -* NewState ENABLE or DISABLE -* NewValue (u16) -* Return : None -*******************************************************************************/ -INLINE void APB_SwResetConfig ( APB_TypeDef *APBx, - FunctionalState NewState, - u16 NewValue ) -{ - if (NewState == ENABLE) APBx->SWRES |= NewValue; - else APBx->SWRES &= ~NewValue; -} - -#endif // __APB_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/bspi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/bspi.h deleted file mode 100644 index 0761c500..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/bspi.h +++ /dev/null @@ -1,324 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : bspi.h -* Author : MCD Application Team -* Date First Issued : 16/05/2003 -* Description : This file contains all the functions prototypes for the -* BSPI software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __bspi_H -#define __bspi_H - -#include "71x_map.h" - -typedef enum { - BSPI_BERIT = 0x80, - BSPI_RCIT = 0x10, - BSPI_ALL = 0x90 -} BSPI_ITS; - -typedef enum { - BSPI_BERR = 0x004, - BSPI_RFNE = 0x008, - BSPI_RFF = 0x010, - BSPI_ROFL = 0x020, - BSPI_TFE = 0x040, - BSPI_TUFL = 0x080, - BSPI_TFF = 0x100, - BSPI_TFNE = 0x200 -} BSPI_Flags; - -typedef enum { - BSPI_TR_FE, - BSPI_TR_UFL, - BSPI_TR_FF, - BSPI_TR_DIS -} BSPI_TR_IT_SRCS; - -typedef enum { - BSPI_RC_FNE, - BSPI_RC_FF, - BSPI_RC_DIS -} BSPI_RC_IR_SRCS; - -#define BSPI_PESET_Mask 0x01 -#define BSPI_DFIFO_Mask 0xFFFE -#define BSPI_CPHA_Mask 0x200 -#define BSPI_CPOL_Mask 0x100 -#define BSPI_BSPI0_Base 0xA000 -#define BSPI_BSPI1_Base 0xB000 - - -/******************************************************************************* -* Function Name : BSPI_BSPI0Conf -* Description : configure STARM71x on BSPI0 mode. -* Input 2 : NewState: specifies the status of the BSPI -* : NewState value must be either ENABLE or DISABLE: -* : ENABLE: the specified BSPI0 peripheral will be enabled. -* : DISABLE: the specified BSPI0 peripheral will be disabled.. -* Output : SPI0 EN bit in BOOTCR. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_BSPI0Conf(FunctionalState NewState) -{ - if (NewState == ENABLE) PCU->BOOTCR |= 0x04; else PCU->BOOTCR &= ~0x04; -} - -/******************************************************************************* -* Function Name : BSPI_Init -* Description : Initializes BSPI peripheral control and registers to their default reset values. -* Input : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Output : BSPI peripheral registers and BSPI global variables are initialized. -* Return : None. -*******************************************************************************/ -void BSPI_Init( BSPI_TypeDef *BSPIx); - -/******************************************************************************* -* Function Name : BSPI_Enable -* Description : Enables/disables the specified BSPI peripheral. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral to be enabled or disabled. -* Input 2 : NewState: specifies the status of the BSPI -* : NewState value must be either ENABLE or DISABLE: -* : ENABLE: the specified BSPI peripheral will be enabled. -* : DISABLE: the specified BSPI peripheral will be disabled. -* Output : BSPE bit in BSPCSR1. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_Enable( BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_PESET_Mask; - else BSPIx->CSR1 &= ~BSPI_PESET_Mask; -} - -/******************************************************************************* -* Function Name : BSPI_MasterEnable -* Description : Configures the BSPI as a Master or a Slave. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : NewState: specifies whether configuring BSPI as master is enabled or disabled. -* : ENABLE: the specified BSPI will be configured as a master. -* : DISABLE: the specified BSPI will be configured as a slave. -* Output : MSTR bit in BSPCSR1 is modified register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_MasterEnable(BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= 0x02; else BSPIx->CSR1 &= ~0x02; -} - -/******************************************************************************* -* Function Name : BSPI_TrItSrc. -* Description : Configures the transmit interrupt source. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : TrItSrc: specifies the transmit interrupt source. -* : Refer to the section ‘Transmit Interrupt Sources’ for more details on the -* : allowed values of this parameter. -* Output : TIE bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -void BSPI_TrItSrc(BSPI_TypeDef *BSPIx, BSPI_TR_IT_SRCS TrItSrc); - -/******************************************************************************* -* Function Name : BSPI_RcItSrc. -* Description : Configures the receive interrupt source. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : RcItSrc: specifies the source for the receive interrupt. -* : Refer to the section ‘Receive Interrupt Sources’ for more details on the -* : allowed values of this parameter. -* Output : RIE bit in BSPCSR1 is register. -* Return : None. -*******************************************************************************/ -void BSPI_RcItSrc(BSPI_TypeDef *BSPIx, BSPI_RC_IR_SRCS RcItSrc); - -/******************************************************************************* -* Function Name : BSPI_TrFifoDepth -* Description : Configures BSPI transmission FIFO number of words. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI. -* Input 2 : TDepth:specifies the depth of the transmit FIFO. -* Output : TFE bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -void BSPI_TrFifoDepth(BSPI_TypeDef *BSPIx, u8 TDepth); - -/******************************************************************************* -* Function Name : BSPI_RcFifoDepth -* Description : Configures BSPI reception FIFO number of words. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : RDepth:specifies the depth of the receive FIFO. -* Output : RFE bits [3:0] in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -void BSPI_RcFifoDepth(BSPI_TypeDef *BSPIx, u8 RDepth); - -/******************************************************************************* -* Function Name : BSPI_8bLEn -* Description : Sets the word length of the receive FIFO and transmit data registers to either 8 or 16 bits. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI. -* Input 2 : status: specifies if the word length is 8 or 16 bits. -* : status value must be either ENABLE or DISABLE: -* : ENABLE: to enable setting the word length to 8 bits. -* : DISABLE: disables setting the word length to 8 bits: the wordlength will be configured to 16 bits. -* Output : WL bits in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_8bLEn(BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == DISABLE) BSPIx->CSR1 |= 0x0400; else BSPIx->CSR1 &= ~0x0C00; -} - -/******************************************************************************* -* Function Name : BSPI_ClkFEdge -* Description : Enables capturing the first data sample on the first edge of SCK or on the second edge. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : NewState: specifies whether capturing the first data sample on the first edge of SCK is enabled or disabled. -* : status value must be either ENABLE or DISABLE. -* :DISABLE: to enable capturing the first data sample on the first edge of SCK. -* : ENABLE: to enable capturing the first data sample on the second edge of SCK. -* Output : CPHA bits in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_ClkFEdge(BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_CPHA_Mask; - else BSPIx->CSR1&=~BSPI_CPHA_Mask; -} - -/******************************************************************************* -* Function Name : BSPI_ClkActiveHigh -* Description : Configures the clock to be active high or low. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : NewState: specifies whether the clock is active high or low. -* : status value must be ENABLE or DISABLE. -* : ENABLE: configures the clock to be active high. -* : DISABLE: confgures the clock to be active low. -* Output : CPOL bits in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_ClkActiveHigh(BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_CPOL_Mask; - else BSPIx->CSR1 &= ~BSPI_CPOL_Mask; -} - -/******************************************************************************* -* Function Name : BSPI_FifoDisable -* Description : Configure the BSPI FIFO. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Output : DFIFO bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_FifoDisable(BSPI_TypeDef *BSPIx) -{ - BSPIx->CSR2 |= 0x0001; -} - -/******************************************************************************* -* Function Name : BSPI_ClockDividerConfig -* Description : Configure BSPI clock divider -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI. -* Input 2 : Div: holds the value of the clock divider. -* Output : Div [7:0] bits in BSPCLK register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_ClockDividerConfig(BSPI_TypeDef *BSPIx, u8 Div) -{ - BSPIx->CLK = Div; -} - -/******************************************************************************* -* Function Name : BSPI_FlagStatus. -* Description : Check whether the specified BSPI Flag is set or not. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : flag: specifies the flag to see the status. -* : Refer to the section ‘BSPI Flags’ for more details on the allowed values of this parameter. -* Output : None. -* Return : FlagStatus type -* : SET: if the tested flag is set. -* : RESET: if the corresponding flag is reset. -*******************************************************************************/ -INLINE FlagStatus BSPI_FlagStatus(BSPI_TypeDef *BSPIx, BSPI_Flags flag) -{ - return (BSPIx->CSR2 & flag) != 0 ? SET : RESET; -} - -/******************************************************************************* -* Function Name : BSPI_WordSend. -* Description : Transmit a single Word. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : holds the word which will be transmitted. -* Output : BSPTXR register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_WordSend(BSPI_TypeDef *BSPIx, u16 Data) -{ - if ((BSPIx->CSR1 & 0x0400) == 0) Data <<= 8; - BSPIx->TXR = Data; -} - -/******************************************************************************* -* Function Name : BSPI_BufferSend. -* Description : Transmits data from a buffer. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : PtrToBuffer is an ‘u8’ pointer to the first word of the buffer to be transmitted. -* Input 3 : NbOfWords parameter indicates the number of words saved in the buffer to be sent. -* Output : None. -* Return : None. -*******************************************************************************/ -void BSPI_BufferSend(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords); - -/******************************************************************************* -* Function Name : BSPI_WordReceive. -* Description : Returns the recent received word. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Output : None. -* Return : The value of the received word. -*******************************************************************************/ -INLINE u16 BSPI_WordReceive(BSPI_TypeDef *BSPIx) -{ - return (BSPIx->CSR1 & 0x0400) == 0 ? BSPIx->RXR >> 8 : BSPIx->RXR; -} - -/******************************************************************************* -* Function Name : BSPI_BufferReceive. -* Description : Receives number of data words and stores them in user defined area. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : PtrToBuffer is an ‘u8’ pointer to the first word of the defined area to save the received buffer. -* Input 3 : NbOfWords parameter indicates the number of words to be received in the buffer. -* Output : None. -* Return : None. -*******************************************************************************/ -void BSPI_BufferReceive(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords); - -/******************************************************************************* -* Function Name : BSPI_ItEnable. -* Description : Enable the specified interrupt. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : BSPI_IT: specifies the BSPI interrupt. -* : Refer to the section ‘Interrupt Enable’ for more details on the allowed values of this parameter.. -* Input 3 : NewState: specified whether the BSPI interrupt is enabled or disabled. -* : status value must be either ENABLE or DISABLE. -* : ENABLE: to enable interrupt -* : DISABLE: to disable interrupt. -* Output : BSPCSR1 register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_ItEnable(BSPI_TypeDef *BSPIx, BSPI_ITS BSPI_IE, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_IE; else BSPIx->CSR1 &= ~BSPI_IE; -} - -#endif /* __bspi_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/can.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/can.h deleted file mode 100644 index 7a97e212..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/can.h +++ /dev/null @@ -1,404 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : can.h -* Author : MCD Application Team -* Date First Issued : 27/10/2003 -* Description : This file contains all the functions prototypes for the -* CAN bus software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __can_H -#define __can_H - -#include "71x_map.h" - -// Standard bitrates available -enum -{ - CAN_BITRATE_100K, - CAN_BITRATE_125K, - CAN_BITRATE_250K, - CAN_BITRATE_500K, - CAN_BITRATE_1M -}; - -// Control register -#define CAN_CR_TEST 0x0080 -#define CAN_CR_CCE 0x0040 -#define CAN_CR_DAR 0x0020 -#define CAN_CR_EIE 0x0008 -#define CAN_CR_SIE 0x0004 -#define CAN_CR_IE 0x0002 -#define CAN_CR_INIT 0x0001 - -// Status register -#define CAN_SR_LEC 0x0007 -#define CAN_SR_TXOK 0x0008 -#define CAN_SR_RXOK 0x0010 -#define CAN_SR_EPASS 0x0020 -#define CAN_SR_EWARN 0x0040 -#define CAN_SR_BOFF 0x0080 - -// Test register -#define CAN_TESTR_RX 0x0080 -#define CAN_TESTR_TX1 0x0040 -#define CAN_TESTR_TX0 0x0020 -#define CAN_TESTR_LBACK 0x0010 -#define CAN_TESTR_SILENT 0x0008 -#define CAN_TESTR_BASIC 0x0004 - -// IFn / Command Request register -#define CAN_CRR_BUSY 0x8000 - -// IFn / Command Mask register -#define CAN_CMR_WRRD 0x0080 -#define CAN_CMR_MASK 0x0040 -#define CAN_CMR_ARB 0x0020 -#define CAN_CMR_CONTROL 0x0010 -#define CAN_CMR_CLRINTPND 0x0008 -#define CAN_CMR_TXRQST 0x0004 -#define CAN_CMR_DATAA 0x0002 -#define CAN_CMR_DATAB 0x0001 - -// IFn / Mask 2 register -#define CAN_M2R_MXTD 0x8000 -#define CAN_M2R_MDIR 0x4000 - -// IFn / Arbitration 2 register -#define CAN_A2R_MSGVAL 0x8000 -#define CAN_A2R_XTD 0x4000 -#define CAN_A2R_DIR 0x2000 - -// IFn / Message Control register -#define CAN_MCR_NEWDAT 0x8000 -#define CAN_MCR_MSGLST 0x4000 -#define CAN_MCR_INTPND 0x2000 -#define CAN_MCR_UMASK 0x1000 -#define CAN_MCR_TXIE 0x0800 -#define CAN_MCR_RXIE 0x0400 -#define CAN_MCR_RMTEN 0x0200 -#define CAN_MCR_TXRQST 0x0100 -#define CAN_MCR_EOB 0x0080 - - -// Wake-up modes -enum -{ - CAN_WAKEUP_ON_EXT, - CAN_WAKEUP_ON_CAN -}; - - -// CAN message structure -typedef struct -{ - u32 IdType; - vu32 Id; - vu8 Dlc; - vu8 Data[8]; -} canmsg; - -// message ID types -enum -{ - CAN_STD_ID, - CAN_EXT_ID -}; - -// message ID limits -#define CAN_LAST_STD_ID ((1<<11) - 1) -#define CAN_LAST_EXT_ID ((1L<<29) - 1) - -/******************************************************************************* -* Function Name : CAN_EnterInitMode -* Description : Switch the CAN into initialization mode -* Input 1 : any binary value formed from the CAN_CR_xxx defines -* Output : None -* Return : None -* Note : CAN_LeaveInitMode must be called when all is done -*******************************************************************************/ -INLINE void CAN_EnterInitMode(u8 mask) -{ - CAN->CR = mask | CAN_CR_INIT; - CAN->SR = 0; // reset the status -} - -/******************************************************************************* -* Function Name : CAN_LeaveInitMode -* Description : Leave the initialization mode (switch into normal mode) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -INLINE void CAN_LeaveInitMode(void) -{ - CAN->CR &= ~(CAN_CR_INIT | CAN_CR_CCE); -} - -/******************************************************************************* -* Function Name : CAN_EnterTestMode -* Description : Switch the CAN into test mode -* Input 1 : any binary value formed from the CAN_TESTR_xxx defines -* Output : None -* Return : None -* Note : CAN_LeaveTestMode must be called when all is done -*******************************************************************************/ -INLINE void CAN_EnterTestMode(u8 mask) -{ - CAN->CR |= CAN_CR_TEST; - CAN->TESTR |= mask; -} - -/******************************************************************************* -* Function Name : CAN_LeaveTestMode -* Description : Leave the current test mode (switch into normal mode) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -INLINE void CAN_LeaveTestMode(void) -{ - CAN->CR |= CAN_CR_TEST; - CAN->TESTR &= ~(CAN_TESTR_LBACK | CAN_TESTR_SILENT | CAN_TESTR_BASIC); - CAN->CR &= ~CAN_CR_TEST; -} - -/******************************************************************************* -* Function Name : CAN_SetBitrate -* Description : Setup a standard CAN bitrate -* Input 1 : one of the CAN_BITRATE_xxx defines -* Output : None -* Return : None -* Note : CAN must be in initialization mode -*******************************************************************************/ -void CAN_SetBitrate(u32 bitrate); - -/******************************************************************************* -* Function Name : CAN_SetTiming -* Description : Setup the CAN timing with specific parameters -* Input 1 : Time Segment before the sample point position, from 1 to 16 -* Input 2 : Time Segment after the sample point position, from 1 to 8 -* Input 3 : Synchronisation Jump Width, from 1 to 4 -* Input 4 : Baud Rate Prescaler, from 1 to 1024 -* Output : None -* Return : None -* Note : CAN must be in initialization mode -*******************************************************************************/ -void CAN_SetTiming(u32 tseg1, u32 tseg2, u32 sjw, u32 brp); - -/******************************************************************************* -* Function Name : CAN_SleepRequest -* Description : Request the CAN cell to enter sleep mode -* Input 1 : CAN_WAKEUP_ON_EXT or CAN_WAKEUP_ON_CAN -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SleepRequest(u32 WakeupMode); - -/******************************************************************************* -* Function Name : CAN_SetUnusedMsgObj -* Description : Configure the message object as unused -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetUnusedMsgObj(u32 msgobj); - -/******************************************************************************* -* Function Name : CAN_SetTxMsgObj -* Description : Configure the message object as TX -* Input 1 : message object number, from 0 to 31 -* Input 2 : CAN_STD_ID or CAN_EXT_ID -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetTxMsgObj(u32 msgobj, u32 idType); - -/******************************************************************************* -* Function Name : CAN_SetRxMsgObj -* Description : Configure the message object as RX -* Input 1 : message object number, from 0 to 31 -* Input 2 : CAN_STD_ID or CAN_EXT_ID -* Input 3 : low part of the identifier range used for acceptance filtering -* Input 4 : high part of the identifier range used for acceptance filtering -* Input 5 : TRUE for a single receive object or a FIFO receive object that -* is the last one of the FIFO -* FALSE for a FIFO receive object that is not the last one -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetRxMsgObj(u32 msgobj, u32 idType, u32 idLow, u32 idHigh, bool singleOrFifoLast); - -/******************************************************************************* -* Function Name : CAN_InvalidateAllMsgObj -* Description : Configure all the message objects as unused -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void CAN_InvalidateAllMsgObj(void); - -/******************************************************************************* -* Function Name : CAN_Init -* Description : Initialize the CAN cell and set the bitrate -* Input 1 : any binary value formed from the CAN_CTL_xxx defines -* Input 2 : one of the CAN_BITRATE_xxx defines -* Output : None -* Return : None -*******************************************************************************/ -void CAN_Init(u8 mask, u32 bitrate); - -/******************************************************************************* -* Function Name : CAN_ReleaseMessage -* Description : Release the message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -*******************************************************************************/ -void CAN_ReleaseMessage(u32 msgobj); - -/******************************************************************************* -* Function Name : CAN_ReleaseTxMessage -* Description : Release the transmit message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -* Note : assume that message interface 0 is free -*******************************************************************************/ -INLINE void CAN_ReleaseTxMessage(u32 msgobj) -{ - CAN->sMsgObj[0].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQST; - CAN->sMsgObj[0].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_ReleaseRxMessage -* Description : Release the receive message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -* Note : assume that message interface 1 is free -*******************************************************************************/ -INLINE void CAN_ReleaseRxMessage(u32 msgobj) -{ - CAN->sMsgObj[1].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQST; - CAN->sMsgObj[1].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_SendMessage -* Description : Start transmission of a message -* Input 1 : message object number, from 0 to 31 -* Input 2 : pointer to the message structure containing data to transmit -* Output : None -* Return : 1 if transmission was OK, else 0 -*******************************************************************************/ -u32 CAN_SendMessage(u32 msgobj, canmsg* pCanMsg); - -/******************************************************************************* -* Function Name : CAN_ReceiveMessage -* Description : Get the message, if received -* Input 1 : message object number, from 0 to 31 -* Input 2 : if TRUE, the message object is released when getting the data -* if FALSE, the message object is not released -* Input 3 : pointer to the message structure where received data is stored -* Output : None -* Return : 1 if reception was OK, else 0 (no message pending) -*******************************************************************************/ -u32 CAN_ReceiveMessage(u32 msgobj, bool release, canmsg* pCanMsg); - -/******************************************************************************* -* Function Name : CAN_WaitEndOfTx -* Description : Wait until current transmission is finished -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void CAN_WaitEndOfTx(void); - -/******************************************************************************* -* Function Name : CAN_BasicSendMessage -* Description : Start transmission of a message in BASIC mode -* Input 1 : pointer to the message structure containing data to transmit -* Output : None -* Return : 1 if transmission was OK, else 0 -* Note : CAN must be in BASIC mode -*******************************************************************************/ -u32 CAN_BasicSendMessage(canmsg* pCanMsg); - -/******************************************************************************* -* Function Name : CAN_BasicReceiveMessage -* Description : Get the message in BASIC mode, if received -* Input 1 : pointer to the message structure where received data is stored -* Output : None -* Return : 1 if reception was OK, else 0 (no message pending) -* Note : CAN must be in BASIC mode -*******************************************************************************/ -u32 CAN_BasicReceiveMessage(canmsg* pCanMsg); - -/******************************************************************************* -* Function Name : CAN_IsMessageWaiting -* Description : Test the waiting status of a received message -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : A non-zero value if the corresponding message object has -* received a message waiting to be copied, else 0 -*******************************************************************************/ -INLINE u32 CAN_IsMessageWaiting(u32 msgobj) -{ - return (msgobj < 16 ? CAN->ND1R & (1 << msgobj) : CAN->ND2R & (1 << (msgobj-16))); -} - -/******************************************************************************* -* Function Name : CAN_IsTransmitRequested -* Description : Test the request status of a transmitted message -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : A non-zero value if the corresponding message is requested -* to transmit, else 0 -*******************************************************************************/ -INLINE u32 CAN_IsTransmitRequested(u32 msgobj) -{ - return (msgobj < 16 ? CAN->TR1R & (1 << msgobj) : CAN->TR2R & (1 << (msgobj-16))); -} - -/******************************************************************************* -* Function Name : CAN_IsInterruptPending -* Description : Test the interrupt status of a message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : A non-zero value if the corresponding message has an interrupt -* pending, else 0 -*******************************************************************************/ -INLINE u32 CAN_IsInterruptPending(u32 msgobj) -{ - return (msgobj < 16 ? CAN->IP1R & (1 << msgobj) : CAN->IP2R & (1 << (msgobj-16))); -} - -/******************************************************************************* -* Function Name : CAN_IsObjectValid -* Description : Test the validity of a message object (ready to use) -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : A non-zero value if the corresponding message object is valid, -* else 0 -*******************************************************************************/ -INLINE u32 CAN_IsObjectValid(u32 msgobj) -{ - return (msgobj < 16 ? CAN->MV1R & (1 << msgobj) : CAN->MV2R & (1 << (msgobj-16))); -} - -#endif /* __can_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/eic.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/eic.h deleted file mode 100644 index ee691d95..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/eic.h +++ /dev/null @@ -1,200 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : eic.h -* Author : MCD Application Team -* Date First Issued : 25/06/2003 -* Description : This file contains all the functions prototypes for the -* EIC software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __eic_H -#define __eic_H - -#include "71x_map.h" - -typedef enum -{ - T0TIMI_IRQChannel = 0, - FLASH_IRQChannel = 1, - RCCU_IRQChannel = 2, - RTC_IRQChannel = 3, - WDG_IRQChannel = 4, - XTI_IRQChannel = 5, - USBHP_IRQChannel = 6, - I2C0ITERR_IRQChannel = 7, - I2C1ITERR_IRQChannel = 8, - UART0_IRQChannel = 9, - UART1_IRQChannel = 10, - UART2_IRQChannel = 11, - UART3_IRQChannel = 12, - SPI0_IRQChannel = 13, - SPI1_IRQChannel = 14, - I2C0_IRQChannel = 15, - I2C1_IRQChannel = 16, - CAN_IRQChannel = 17, - ADC_IRQChannel = 18, - T1TIMI_IRQChannel = 19, - T2TIMI_IRQChannel = 20, - T3TIMI_IRQChannel = 21, - HDLC_IRQChannel = 25, - USBLP_IRQChannel = 26, - T0TOI_IRQChannel = 29, - T0OC1_IRQChannel = 30, - T0OC2_IRQChannel = 31 -} IRQChannel_TypeDef; - -typedef enum -{ - T0TIMI_FIQChannel = 0x00000001, - WDG_FIQChannel = 0x00000002, - WDGT0TIMI_FIQChannels = 0x00000003 -} FIQChannel_TypeDef; - -/******************************************************************************* -* Function Name : EIC_Init -* Description : Initialise the EIC using the load PC instruction -* (PC = PC +offset) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EIC_Init(void); - -/******************************************************************************* -* Function Name : EIC_IRQConfig -* Description : Enable or Disable IRQ interrupts -* Input 1 : New status : can be ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -INLINE void EIC_IRQConfig(FunctionalState NewState) -{ - if (NewState==ENABLE) EIC->ICR |= 0x0001; else EIC->ICR &= ~0x0001; -} - -/******************************************************************************* -* Function Name : EIC_FIQConfig -* Description : Enable or Disable FIQ interrupts -* Input 1 : New status : can be ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -INLINE void EIC_FIQConfig(FunctionalState NewState) -{ - if (NewState==ENABLE) EIC->ICR |= 0x0002; else EIC->ICR &= ~0x0002; -} - -/******************************************************************************* -* Function Name : EIC_IRQChannelConfig -* Description : Configure the IRQ Channel -* Input 1 : IRQ channel name -* Input 2 : Channel New status : can be ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -INLINE void EIC_IRQChannelConfig(IRQChannel_TypeDef IRQChannel, FunctionalState NewState) -{ - if (NewState==ENABLE) EIC->IER |= 0x0001 << IRQChannel; - else EIC->IER &= ~(0x0001 << IRQChannel); -} - -/******************************************************************************* -* Function Name : EIC_FIQChannelConfig -* Description : Configure the FIQ Channel -* Input 1 : FIQ channel name -* Input 2 : Channel New status : can be ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -INLINE void EIC_FIQChannelConfig(FIQChannel_TypeDef FIQChannel, - FunctionalState NewState) -{ - if (NewState==ENABLE) EIC->FIR |= FIQChannel; - else EIC->FIR &= ~FIQChannel; -} - -/******************************************************************************* -* Function Name : EIC_IRQChannelPriorityConfig -* Description : Configure the selected IRQ channel priority -* Input 1 : IRQ channel name -* Input 2 : IRQ channel priority -* Output : None -* Return : None -*******************************************************************************/ -INLINE void EIC_IRQChannelPriorityConfig(IRQChannel_TypeDef IRQChannel, u8 Priority) -{ - EIC->SIR[IRQChannel] = (EIC->SIR[IRQChannel]&0xFFFF0000) | (u16)Priority & 0x000F; -} - -/******************************************************************************* -* Function Name : EIC_CurrentPriorityLevelConfig -* Description : Change the current priority level of the srved IRQ routine -* Input 1 : New priority -* Output : None -* Return : None -*******************************************************************************/ -void EIC_CurrentPriorityLevelConfig(u8 NewPriorityLevel); - -/******************************************************************************* -* Function Name : EIC_CurrentPriorityLevelValue -* Description : Return the current priority level of the current served IRQ -* routine -* Input : None -* Output : None -* Return : The current priority level -*******************************************************************************/ -INLINE u8 EIC_CurrentPriorityLevelValue(void) -{ - return EIC->CIPR & 0xF; -} - -/******************************************************************************* -* Function Name : EIC_CurrentIRQChannelValue -* Description : Return the current served IRQ channel number -* Input 0 : None -* Output : None -* Return : The current served IRQ channel number -*******************************************************************************/ -INLINE IRQChannel_TypeDef EIC_CurrentIRQChannelValue(void) -{ - return (IRQChannel_TypeDef)(EIC->CICR & 0x1F); -} - -/******************************************************************************* -* Function Name : EIC_CurrentFIQChannelValue -* Description : Return the current served FIQ channel number -* Input : None -* Output : None -* Return : The current served FIQ channel number -*******************************************************************************/ -INLINE FIQChannel_TypeDef EIC_CurrentFIQChannelValue(void) -{ - return (FIQChannel_TypeDef)((EIC->FIR >> 2) & 0x0003); -} - -/******************************************************************************* -* Function Name : EIC_FIPendingBitClear -* Description : Clear the FIQ pending bit -* Input 1 : FIQ channel -* Output : None -* Return : None -*******************************************************************************/ -INLINE void EIC_FIQPendingBitClear(FIQChannel_TypeDef FIQChannel) -{ - EIC->FIR = (EIC->FIR & 0x0003) | (FIQChannel << 2); -} - -#endif /* __eic_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/emi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/emi.h deleted file mode 100644 index 97c5115c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/emi.h +++ /dev/null @@ -1,52 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : emi.h -* Author : MCD Application Team -* Date First Issued : 08/08/2003 -* Description : This file contains all the functions prototypes for the -* EMI software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef _EMI_H -#define _EMI_H - -#include "71x_map.h" - -#define EMI_ENABLE 0x8000 -#define EMI_DISABLE 0x0000 -#define EMI_WAITSTATE(n) ((n) << 2) -#define EMI_SIZE_8 0x0000 -#define EMI_SIZE_16 0x0001 - -#define EMI_BANK0 EXTMEM_BASE -#define EMI_BANK1 (EXTMEM_BASE + 0x2000000) -#define EMI_BANK2 (EXTMEM_BASE + 0x4000000) - -/******************************************************************************* -* Function Name : EMI_Config -* Description : This routine is used, for each bank, to configure enabling, -* : cycle length and bus size. -* Input : Bank (u8) -* : Config (u16) -* Return : None -*******************************************************************************/ -INLINE void EMI_Config(u8 Bank, u16 Config) -{ - *(u16 *)(EMI_BASE + (4*Bank)) = Config; -} - -#endif // _EMI_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/flash.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/flash.h deleted file mode 100644 index 6d6bb09d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/flash.h +++ /dev/null @@ -1,253 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : flash.h -* Author : MCD Application Team -* Date First Issued : 28/07/2003 -* Description : This file contains all the functions prototypes for the -* Embedded Flash software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __FLASH_H -#define __FLASH_H - -#include "71x_map.h" - -#define FLASH_B0F0 0x00000001 -#define FLASH_B0F1 0x00000002 -#define FLASH_B0F2 0x00000004 -#define FLASH_B0F3 0x00000008 -#define FLASH_B0F4 0x00000010 -#define FLASH_B0F5 0x00000020 -#define FLASH_B0F6 0x00000040 -#define FLASH_B0F7 0x00000080 - -#define FLASH_B1F0 0x00010000 -#define FLASH_B1F1 0x00020000 - -#define FLASH_B0 (FLASH_B0F0 | FLASH_B0F1 | FLASH_B0F2 | FLASH_B0F3 | FLASH_B0F4 | FLASH_B0F5 | FLASH_B0F6 | FLASH_B0F7) -#define FLASH_B1 (FLASH_B1F0 | FLASH_B1F1) - -typedef enum -{ - FLASH_FINISHED, - FLASH_ONGOING -} flashwriteoperation; - -typedef enum -{ - FLASH_BANK0 = 0x1000000, - FLASH_BANK1 = 0x2000000 -} flashbanks; - -typedef enum -{ - FLASH_BSYA0 = 0x01, /* 000-00001 = 0000 0001 = 0x01 */ /* FLASH_CR0.1 */ - FLASH_BSYA1 = 0x02, /* 000-00010 = 0000 0010 = 0x02 */ /* FLASH_CR0.2 */ - FLASH_LOCK = 0x04, /* 000-00100 = 0000 0100 = 0x04 */ /* FLASH_CR0.4*/ - FLASH_INTP = 0x14, /* 000-10100 = 0001 0100 = 0x14 */ /* FLASH_CR0.20 */ - FLASH_B0S = 0x38, /* 001-11000 = 0011 1000 = 0x38 */ /* FLASH_CR1.24*/ - FLASH_B1S = 0x39, /* 001-11001 = 0011 1001 = 0x39 */ /* FLASH_CR1.25*/ - FLASH_ERR = 0xA0, /* 101-00000 = 1010 0000 = 0xA0 */ /* FLASH_ER.0*/ - FLASH_ERER = 0xA1, /* 101-00001 = 1010 0001 = 0xA1 */ /* FLASH_ER.1*/ - FLASH_PGER = 0xA2, /* 101-00010 = 1010 0010 = 0xA2 */ /* FLASH_ER.2*/ - FLASH_10ER = 0xA3, /* 101-00011 = 1010 0011 = 0xA3 */ /* FLASH_ER.3*/ - FLASH_SEQER = 0xA6, /* 101-00110 = 1010 0110 = 0xA6 */ /* FLASH_ER.6*/ - FLASH_RESER = 0xA7, /* 101-00111 = 1010 0111 = 0xA7 */ /* FLASH_ER.7*/ - FLASH_WPF = 0xA8 /* 101-01000 = 1010 1000 = 0xA8 */ /* FLASH_ER.8*/ -} flashflags; - -#define FLASH_WMS_Mask 0x80000000 -#define FLASH_SUSP_Mask 0x40000000 -#define FLASH_WPG_Mask 0x20000000 -#define FLASH_DWPG_Mask 0x10000000 -#define FLASH_SER_Mask 0x08000000 -#define FLASH_SPR_Mask 0x01000000 -#define FLASH_BER_Mask 0x04000000 -#define FLASH_MER_Mask 0x02000000 -#define FLASH_BSYA1_Mask 0x00000002 -#define FLASH_BSYA2_Mask 0x00000004 - -#define FLASH_DBGP_Mask 0x00000002 -#define FLASH_ACCP_Mask 0x00000001 - -#define FLASH_Reg_Mask 0xE0 -#define FLASH_Flag_Mask 0x1F - -#define FLASH_INTM_Mask 0x00200000 -#define FLASH_INTP_Mask 0x00100000 - -/******************************************************************************* -* Function Name : FLASH_Init -* Description : Initialise the Flash -* Input : None -* Return : None -*******************************************************************************/ -void FLASH_Init(void); - -/******************************************************************************* -* Function Name : FLASH_FlagStatus -* Description : Returns the NewState of Flash flags -* Input 1 : Flash Flag -* Return : flagstate -*******************************************************************************/ -FlagStatus FLASH_FlagStatus(flashflags Xflag); - -/******************************************************************************* -* Function Name : FLASH_WriteOpStatus -* Description : Checks the write operation status -* Input 1 : flash banck -* Return : write operation status -*******************************************************************************/ -INLINE FlagStatus FLASH_WriteOpStatus(flashbanks Xbank) -{ - return Xbank == FLASH_BANK0 ? FLASH_FlagStatus(FLASH_BSYA0) : FLASH_FlagStatus(FLASH_BSYA1); -} - -/******************************************************************************* -* Function Name : FLASH_WordWrite -* Description : Writes a Word to the Flash -* Input 1 : Address of the Destination -* Input 2 : Word to program -* Return : None -*******************************************************************************/ -void FLASH_WordWrite(u32 TargetAdd, u32 Data); - -/******************************************************************************* -* Function Name : FLASH_DWordWrite -* Description : Writes Double Word to the Flash -* Input 1 : Address of the Destination -* Input 2 : Word 1 To program -* Input 3 : Word 2 To program -* Return : None -*******************************************************************************/ -void FLASH_DWordWrite(u32 TargetAdd, u32 Data0, u32 Data1); - -/******************************************************************************* -* Function Name : FLASH_EraseSector -* Description : Erases a Flash sector -* Input 1 : Sectors to be Erased -* Return : None -*******************************************************************************/ -void FLASH_SectorErase(u32 Xsectors); - -/******************************************************************************* -* Function Name : FLASH_BankErase -* Description : Erases a Bank of the Flash -* Input 1 : Bank to be Erased -* Return : None -*******************************************************************************/ -INLINE void FLASH_BankErase(flashbanks Xbank) -{ - FLASH_SectorErase(Xbank == FLASH_BANK0 ? FLASH_B0 : FLASH_B1); -} -/******************************************************************************* -* Function Name : FLASH_Suspend -* Description : Suspends the current program or erase operation -* Input 1 : None -* Return : Flash CR0 register -*******************************************************************************/ -u32 FLASH_Suspend(void); - -/******************************************************************************* -* Function Name : FLASH_Resume -* Description : Resume a Suspended program or erase operation -* Input 1 : The operation to be resumed -* Return : None -*******************************************************************************/ -void FLASH_Resume(u32 FLASH_LastOperation); - -/******************************************************************************* -* Function Name : FLASH_WordRead -* Description : Read a single word of the flash -* Input 1 : Source Address -* Return : Word -*******************************************************************************/ -u32 FLASH_WordRead(u32 FLASH_SourceAdd); -/******************************************************************************* -* Function Name : FLASH_WritePrConfig -* Description : Configures The Write Protection Bits -* Input 1 : Flash Bank -* Input 2 : Enable or disable Protection -* Return : None -*******************************************************************************/ -void FLASH_WritePrConfig(u32 Xsectors, FunctionalState NewState); -/******************************************************************************* -* Function Name : FLASH_PermanantDebugPrConfig -* Description : Configures The Debug Protection Bits -* Input 1 : ENABLE or DISABLE -* Return : None -*******************************************************************************/ -void FLASH_PermanantDebugPrConfig(FunctionalState NewState); - -/******************************************************************************* -* Function Name : FLASH_FlagClear -* Description : Clears a flash flag -* Input 1 : Flash Flag -* Return : None -*******************************************************************************/ -void FLASH_FlagClear(flashflags Xflag); - -/******************************************************************************* -* Function Name : FLASH_ITConfig -* Description : Enables Or Disables the write-end interrupt -* Input 1 : FunctionalState(Enable, Disable) -* Return : None -*******************************************************************************/ -INLINE void FLASH_ITConfig(FunctionalState NewState) -{ - if (NewState == ENABLE) FLASHR->CR0 |= FLASH_INTM_Mask; - else FLASHR->CR0 &= ~FLASH_INTM_Mask; -} - -/******************************************************************************* -* Function Name : FLASH_ITStatus -* Description : Checks if the write-end interrupt is enabled or not -* Input 1 : None -* Return : Enable, Disable -*******************************************************************************/ -INLINE FunctionalState FLASH_ITStatus(void) -{ - return (FLASHR->CR0 & FLASH_INTM_Mask)==0 ? DISABLE : ENABLE; -} - -/******************************************************************************* -* Function Name : FLASH_ITClear -* Description : Clears an interrupt pending flag -* Input 1 : None -* Return : None -*******************************************************************************/ -INLINE void FLASH_ITClear(void) -{ - FLASHR->CR0 &= ~FLASH_INTM_Mask; -} - -/******************************************************************************* -* Function Name : FLASH_ProtectionLevel -* Description : Gives the level of protection in the PDS PEN registers -* Input 1 : None -* Return : The last bit not yet reset -*******************************************************************************/ -u16 FLASH_ProtectionLevel(void); - -/******************************************************************************* -* Function Name : FLASH_WaitForLastTask -* Description : Waits for the end of last task on a Flash Bank -* Input 1 : None -* Return : Nones -*******************************************************************************/ -void FLASH_WaitForLastTask(void); - -#endif // __FLASH_H - -/*******************(C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/gpio.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/gpio.h deleted file mode 100644 index 8b3f9d38..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/gpio.h +++ /dev/null @@ -1,127 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : gpio.h -* Author : MCD Application Team -* Date First Issued : 08/06/2003 -* Description : This file contains all the functions prototypes for the -* GPIO software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __gpio_H -#define __gpio_H - -#include "71x_map.h" - -typedef enum -{ - GPIO_HI_AIN_TRI, - GPIO_IN_TRI_TTL, - GPIO_IN_TRI_CMOS, - GPIO_IPUPD_WP, - GPIO_OUT_OD, - GPIO_OUT_PP, - GPIO_AF_OD, - GPIO_AF_PP -} GpioPinMode_TypeDef; - -#define GPIO_LSB 0x00 -#define GPIO_MSB 0x08 - -/******************************************************************************* -* Function Name : GPIO_Config -* Description : Configure the GPIO port pins -* Input 1 : GPIOx (x can be 0,1 or 2) the desired port -* Input 2 : Port_Pins : pins placements -* Input 3 : Pins Mode -* Output : None -* Return : None -*******************************************************************************/ -void GPIO_Config (GPIO_TypeDef *GPIOx, u16 Port_Pins, GpioPinMode_TypeDef GPIO_Mode); - -/******************************************************************************* -* Function Name : GPIO_BitRead -* Description : Read the desired port pin value -* Input 1 : Selected GPIO port -* Input 2 : Pin number -* Output : None -* Return : The selected pin value -*******************************************************************************/ -INLINE u8 GPIO_BitRead(GPIO_TypeDef *GPIOx, u8 Port_Pin) -{ - return (GPIOx->PD >> Port_Pin) & 0x0001; -} - -/******************************************************************************* -* Function Name : GPIO_ByteRead -* Description : Read the desired port Byte value -* Input 1 : Selected GPIO port -* Input 2 : GPIO_MSB or GPIO_LSB -* Output : None -* Return : The GPIO_MSB or GPIO_LSB of the selected PD register -*******************************************************************************/ -INLINE u8 GPIO_ByteRead(GPIO_TypeDef *GPIOx, u8 Port_Byte) -{ - return (u8)(GPIOx->PD >> Port_Byte); -} - -/******************************************************************************* -* Function Name : GPIO_WordRead -* Description : Read the desired port word value -* Input 1 : Selected GPIO port -* Output : None -* Return : The selected PD register value -*******************************************************************************/ -INLINE u16 GPIO_WordRead(GPIO_TypeDef *GPIOx) -{ - return GPIOx->PD; -} - -/******************************************************************************* -* Function Name : GPIO_BitWrite -* Description : Set or reset the selected port pin -* Input 1 : Selected GPIO port -* Input 2 : Pin number -* Input 3 : bit value -* Output : None -* Return : None -*******************************************************************************/ -void GPIO_BitWrite(GPIO_TypeDef *GPIOx, u8 Port_Pin, u8 Port_Val); - -/******************************************************************************* -* Function Name : GPIO_ByteWrite -* Description : Write byte value to the selected PD register -* Input 1 : Selected GPIO port -* Input 2 : GPIO_MSB or GPIO_LSB -* Input 3 : Byte value -* Output : None -* Return : None -*******************************************************************************/ -void GPIO_ByteWrite(GPIO_TypeDef *GPIOx, u8 Port_Byte, u8 Port_Val); - -/******************************************************************************* -* Function Name : GPIO_WordWrite -* Description : Write word value to the selected PD register -* Input 1 : Selected GPIO port -* Input 2 : Value -* Output : None -* Return : None -*******************************************************************************/ -INLINE void GPIO_WordWrite(GPIO_TypeDef *GPIOx, u16 Port_Val) -{ - GPIOx->PD = Port_Val; -} - -#endif /* __gpio_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/i2c.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/i2c.h deleted file mode 100644 index a4f98fbd..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/i2c.h +++ /dev/null @@ -1,357 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : i2c.h -* Author : MCD Application Team -* Date First Issued : 05/09/2003 -* Description : This file provides prototypes of I2C functions -* and variable used in code sources -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __i2c_H -#define __i2c_H - -#include "71x_map.h" - -typedef enum -{ - I2C_CR = 0x00, - I2C_SR1 = 0x04, - I2C_SR2 = 0x08, - I2C_CCR = 0x0C, - I2C_OAR1 = 0x10, - I2C_OAR2 = 0x14, - I2C_DR = 0x18, - I2C_ECCR = 0x1C -} I2C_Registers; - -typedef enum -{ - I2C_Mode10, - I2C_Mode7 -} I2C_Addressing; - -typedef enum -{ - I2C_RX, - I2C_TX -} I2C_Direction; - -typedef enum -{ - I2C_SB = 0x00001, - I2C_M_SL = 0x00002, - I2C_ADSL = 0x00004, - I2C_BTF = 0x00008, - I2C_BUSY = 0x00010, - I2C_TRA = 0x00020, - I2C_ADD10 = 0x00040, - I2C_EVF = 0x00080, - I2C_GCAL = 0x00100, - I2C_BERR = 0x00200, - I2C_ARLO = 0x00400, - I2C_STOPF = 0x00800, - I2C_AF = 0x01000, - I2C_ENDAD = 0x02000, - I2C_STOP = 0x08000, - I2C_ACK = 0x10000, - I2C_START = 0x20000 -} I2C_Flags; - -typedef enum -{ - I2C_TX_NO, - I2C_TX_SB, - I2C_TX_AF, - I2C_TX_ARLO, - I2C_TX_BERR, - I2C_TX_ADD_OK, - I2C_TX_DATA_OK, - I2C_TX_ONGOING -} I2C_Tx_Status; - -typedef enum -{ - I2C_RX_NO, - I2C_RX_SB, - I2C_RX_AF, - I2C_RX_ARLO, - I2C_RX_BERR, - I2C_RX_ADD_OK, - I2C_RX_DATA_OK, - I2C_RX_ONGOING -} I2C_Rx_Status; - -#define I2C_PESET_Mask 0x20 -#define I2C_PERESET 0xDF -#define I2C_ENGC_Mask 0x10 -#define I2C_START_Mask 0x08 -#define I2C_STOP_Mask 0x02 -#define I2C_ACK_Mask 0x04 -#define I2C_ITE_Mask 0x01 - -/******************************************************************************* -* Function Name : I2C_Init -* Description : Initializes I2C peripheral control and registers to their -* default reset values. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -void I2C_Init (I2C_TypeDef *I2Cx); - -/******************************************************************************* -* Function Name : I2C_OnOffConfig -* Description : Enables or disables I2C peripheral. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -void I2C_OnOffConfig (I2C_TypeDef *I2Cx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : I2C_GeneralCallConfig -* Description : Enables or disables I2C general call option. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -INLINE void I2C_GeneralCallConfig (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_ENGC_Mask; - else I2Cx->CR &= ~I2C_ENGC_Mask; -} - -/******************************************************************************* -* Function Name : I2C_STARTGenerate -* Description : Generates I2C communication START condition. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -INLINE void I2C_STARTGenerate (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_START_Mask; - else I2Cx->CR &= ~I2C_START_Mask; -} - -/******************************************************************************* -* Function Name : I2C_STOPGenerate -* Description : Generates I2C communication STOP condition. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -INLINE void I2C_STOPGenerate (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_STOP_Mask; - else I2Cx->CR &= ~I2C_STOP_Mask; -} - -/******************************************************************************* -* Function Name : I2C_AcknowledgeConfig -* Description : Enables or disables I2C acknowledge feature. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -INLINE void I2C_AcknowledgeConfig (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_ACK_Mask; - else I2Cx->CR &= ~I2C_ACK_Mask; -} - -/******************************************************************************* -* Function Name : I2C_ITConfig -* Description : Enables or disables I2C interrupt feature. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -INLINE void I2C_ITConfig (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_ITE_Mask; - else I2Cx->CR &= ~I2C_ITE_Mask; -} - -/******************************************************************************* -* Function Name : I2C_RegisterRead -* Description : Reads any I2C register and returns its value. -* Input : I2Cx ( I2C0 or I2C1 ) -* Reg :the register to be read (I2CCR,I2CSR1,I2CSR2,I2CCCR, -* I2COAR1,I2COAR2,I2CDR,I2CECCR) -* Return : the value of the register passed as parameter(u8) -*******************************************************************************/ -INLINE u8 I2C_RegisterRead (I2C_TypeDef *I2Cx, I2C_Registers reg) -{ - return (*(u8 *)(*((u32 *)&I2Cx) + reg)); -} - -/******************************************************************************* -* Function Name : I2C_FlagStatus -* Description : Checks whether any I2C Flag is set or not. -* Input : I2Cx ( I2C0 or I2C1 ) -* Access(DIRECT or INDIRECT) -* Flag : the flag to be read -* input 4: an (u8) variable needed in the case -* of the INDIRECT access -* Return : the NewState of the Flag (SET or RESET). -*******************************************************************************/ -FlagStatus I2C_FlagStatus (I2C_TypeDef *I2Cx, RegisterAccess Access, I2C_Flags Flag,...); - -/******************************************************************************* -* Function Name : I2C_FlagClear -* Description : Clears the I2C Flag passed as a parameter -* Input : I2Cx ( I2C0 or I2C1 ) -* Flag : the flag to be read -* input3: an (u8) parameter needed in the case that the flag -* to be cleared need a write in one register -* Return : None. -*******************************************************************************/ -void I2C_FlagClear (I2C_TypeDef *I2Cx, I2C_Flags Flag,...); - -/******************************************************************************* -* Function Name : I2C_SpeedConfig -* Description : Selects I2C clock speed and configures its corresponding mode. -* Input : I2Cx ( I2C0 or I2C1 ) -* Clock: I2C expected clock in Hertz. -* Return : None. -*******************************************************************************/ -void I2C_SpeedConfig (I2C_TypeDef *I2Cx, u32 Clock); - -/******************************************************************************* -* Function Name : I2C_AddressConfig -* Description : Defines the I2C bus address of the interface. -* Input : I2Cx ( I2C0 or I2C1 ). -* Address: an u16 parameter indicating the address -* of the interface. -* Mode (I2C_Mode10,I2C_Mode7). -* Return : None. -*******************************************************************************/ -void I2C_AddressConfig (I2C_TypeDef *I2Cx, u16 Address, I2C_Addressing Mode); - -/******************************************************************************* -* Function Name : I2C_FCLKConfig -* Description : Configures frequency bits according to RCLK frequency. -* the I2C selected must be disabled -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -void I2C_FCLKConfig (I2C_TypeDef *I2Cx); - -/******************************************************************************* -* Function Name : I2C_AddressSend -* Description : Transmits the address byte to select the slave device. -* Input : I2Cx ( I2C0 or I2C1 ) -* Address: an u16 parameter indicating the slave address -* Mode (I2C_Mode10,I2C_Mode7). -* Direction (I2C_RX,I2C_TX). -* Return : None. -********************************************************************************/ -void I2C_AddressSend (I2C_TypeDef *I2Cx, u16 Address, I2C_Addressing Mode, I2C_Direction Direction); - -/******************************************************************************* -* Function Name : I2C_ByteSend -* Description : Send a single byte of data. -* Input : I2Cx ( I2C0 or I2C1 ) -* Data : the byte to be sent to the slave -* Return : None. -*******************************************************************************/ -void I2C_ByteSend (I2C_TypeDef *I2Cx, u8 Data); - -/******************************************************************************* -* Function Name : I2C_BufferSend -* Description : Send data from a buffer whose number of bytes is known -* Input : I2Cx ( I2C0 or I2C1 ) -* PtrToBuffer :pointer to the byte of buffer to be transmitted. -* NbOfBytes:Number of byte of the buffer -* Return : I2C_Tx_Status :transmission status (I2C_TX_AF, I2C_TX_ARLO, -* I2C_TX_BERR,I2C_TX_DATA_OK) -*******************************************************************************/ -I2C_Tx_Status I2C_BufferSend (I2C_TypeDef *I2Cx, u8 *PtrToBuffer, u8 NbOfBytes); - -/******************************************************************************* -* Function Name : I2C_StringSend -* Description : Send data from a buffer -* Input : I2Cx ( I2C0 or I2C1 ) -* PtrToString :pointer to the string to be transmitted. -* Return : I2C_Tx_Status :transmission status (I2C_TX_AF, I2C_TX_ARLO, -* I2C_TX_BERR,I2C_TX_DATA_OK) -*******************************************************************************/ -I2C_Tx_Status I2C_StringSend (I2C_TypeDef *I2Cx, char *PtrToString); - -/******************************************************************************* -* Function Name : I2C_TransmissionStatus -* Description : Report the NewState of the transmission -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : I2C_Tx_Status :transmission status (I2C_TX_NO, I2C_TX_SB, -* I2C_TX_AF, I2C_TX_ARLO, I2C_TX_BERR,I2C_TX_ADD_OK, -* I2C_TX_DATA_OK,I2C_TX_ONGOING) -*******************************************************************************/ -I2C_Tx_Status I2C_TransmissionStatus (I2C_TypeDef *I2Cx); - -/******************************************************************************* -* Function Name : I2C_ByteReceive -* Description : Returns the received byte. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : the byte received -*******************************************************************************/ -u8 I2C_ByteReceive (I2C_TypeDef *I2Cx); - -/******************************************************************************* -* Function Name : I2C_BufferReceive -* Description : received a buffer. and return the status of error. -* Input : I2Cx ( I2C0 or I2C1 ) -* PtrToBuffer :pointer to the byte of buffer received. -* NbOfBytes:Number of byte to be received -* Return : I2C_Rx_Status:the NewState of the reception (,I2C_RX_AF, -* I2C_RX_ARLO,I2C_RX_BERR, I2C_RX_DATA_OK) -*******************************************************************************/ -I2C_Rx_Status I2C_BufferReceive (I2C_TypeDef *I2Cx, u8 *PtrToBuffer, u8 NbOfBytes); - -/******************************************************************************* -* Function Name :I2C_ReceptionStatus -* Description : Report the reception NewState. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : I2C_Rx_Status:the NewState of the reception ( I2C_RX_NO, -* I2C_RX_SB,I2C_RX_AF,I2C_RX_ARLO,I2C_RX_BERR,I2C_RX_ADD_OK, -* I2C_RX_DATA_OK, I2C_RX_ONGOING) -*******************************************************************************/ -I2C_Rx_Status I2C_ReceptionStatus (I2C_TypeDef *I2Cx); - -/******************************************************************************* -* Function Name : I2C_ErrorClear -* Description : Clears any error flags. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -INLINE void I2C_ErrorClear (I2C_TypeDef *I2Cx) -{ - // Clear all error flags by reading the SR2 register - (void)I2Cx->SR2; -} - -/******************************************************************************* -* Function Name : I2C_GetStatus -* Description : Reads the I2C status registers. -* Input : None -* Return : I2C status registers. -*******************************************************************************/ -INLINE u32 I2C_GetStatus(I2C_TypeDef *I2Cx) -{ - return (((I2Cx->CR&0x04)<<14)|(I2Cx->SR1|(I2Cx->SR2<<8))&0x3FFF); -} - -#endif /* __i2c_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/pcu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/pcu.h deleted file mode 100644 index 30d3fdda..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/pcu.h +++ /dev/null @@ -1,194 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : pcu.h -* Author : MCD Application Team -* Date First Issued : 30/05/2003 -* Description : This file contains all the functions prototypes for the -* PCU software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __PCU_H -#define __PCU_H - -#include "71x_map.h" - -typedef enum -{ - PCU_WREN = 0x8000, - PCU_VROK = 0x1000 -} PCU_Flags; - -typedef enum -{ - PCU_STABLE, - PCU_UNSTABLE -} PCU_VR_Status; - -typedef enum -{ - PCU_MVR = 0x0008, - PCU_LPR = 0x0020 -} PCU_VR; - -typedef enum -{ - WFI_CLOCK2_16, - WFI_EXTERNAL -} WFI_CLOCKS; - -typedef enum -{ - PCU_SLOW, - PCU_STOP, - PCU_STANDBY -} LPM_MODES; - - -// VR_OK : Voltage Regulator OK -#define PCU_VROK_Mask 0x1000 - -// Main Voltage Regulator -#define PCU_MVR_Mask 0x0008 - -// Low Power Voltage Regulator -#define PCU_LPR_Mask 0x0020 - -// PCU register Write Enable Bit -#define PCU_WREN_Mask 0x8000 - -// Low Voltage Detector -#define PCU_LVD_Mask 0x0100 - -// Power Down Flag -#define PCU_PWRDWN_Mask 0x0040 - -// WFI Mode Clock Selection Bit -#define PCU_WFI_CKSEL_Mask 0x00000002 - -// Halt Mode Enable Bit -#define PCU_EN_HALT_Mask 0x00000800 - -// Halt Mode Flag -#define PCU_HALT_Mask 0x0002 - -// Stop Mode Enable Bit -#define PCU_STOP_EN_Mask 0x00000400 - -// Low Power Regulator in Wait For interrupt Mode -#define PCU_LPRWFI_Mask 0x0020 - -// Low Power Mode in Wait For interrupt Mode -#define PCU_LPOWFI_Mask 0x00000001 - -// Software Reset Enable -#define PCU_SRESEN_Mask 0x00000001 - - -/******************************************************************************* -* Function Name : PCU_MVRStatus -* Description : This routine is used to check the Main Voltage Regulator -* : NewState. -* Input : None -* Return : STABLE, UNSTABLE -*******************************************************************************/ -INLINE PCU_VR_Status PCU_MVRStatus ( void ) -{ - return (PCU->PWRCR & PCU_VROK_Mask) == 0x00 ? PCU_UNSTABLE : PCU_STABLE; -} - -/******************************************************************************* -* Function Name : PCU_FlagStatus -* Description : This routine is used to return the PCU register flag -* Input 1 : The flag to get -* Return : RESET, SET -*******************************************************************************/ -INLINE FlagStatus PCU_FlagStatus ( PCU_Flags Xflag ) -{ - return ( PCU->PWRCR & Xflag ) == 0x00 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : PCU_VRConfig -* Description : This routine is used to configure PCU voltage regultors -* Input 1 : MVR : Main voltage Regulator - LPR : Low Power Regulator -* Input 2 : ENABLE : Enable the Voltage Regulator - DISABLE: Disable ( ByPass ) the VR -* Return : None -*******************************************************************************/ -void PCU_VRConfig ( PCU_VR xVR, FunctionalState NewState ); - -/******************************************************************************* -* Function Name : PCU_VRStatus -* Description : This routine is used to get the PCU voltage regultors status -* Input : MVR : Main voltage Regulator - LPR : Low Power Regulator -* Return : ENABLE : Enable the Voltage Regulator - DISABLE: Disable ( ByPass ) the VR -*******************************************************************************/ -INLINE FunctionalState PCU_VRStatus ( PCU_VR xVR ) -{ - return ( PCU->PWRCR & xVR ) == 0 ? ENABLE : DISABLE; -} - -/******************************************************************************* -* Function Name : PCU_LVDDisable -* Description : This routine is used to disable the Low Voltage Detector. -* Input : None -* Return : None -*******************************************************************************/ -INLINE void PCU_LVDDisable ( void ) -{ - PCU->PWRCR |= PCU_WREN_Mask; // Unlock Power Control Register - PCU->PWRCR |= PCU_LVD_Mask; // Set the LVD DIS Flag -} - -/******************************************************************************* -* Function Name : PCU_LVDStatus -* Description : This routine is used to get the LVD NewState. -* Input : None -* Return : ENABLE, DISABLE -*******************************************************************************/ -INLINE FunctionalState PCU_LVDStatus ( void ) -{ - return ( PCU->PWRCR & PCU_LVD_Mask ) == 0 ? ENABLE : DISABLE; -} - -/******************************************************************************* -* Function Name : PCU_WFIEnter -* Description : This routine is used to force the Device to enter in WFI mode -* Input 1 : CLOCK2_16 : Clock2_16 as system clock for WFI mode -* EXTERNAL : external clock as system clock for WFI mode -* Input 2 : ENABLE : Enable Low Power Regulator during Wait For Interrupt Mode -* DISABLE: Disable Low Power Regulator during Wait For Interrupt Mode -* Input 3 : ENABLE : Enable Low Power Mode during Wait For Interrupt Mode -* DISABLE: Disable Low Power Mode during Wait For Interrupt Mode -* Return : None -*******************************************************************************/ -void PCU_WFIEnter ( WFI_CLOCKS Xclock, FunctionalState Xlpr, FunctionalState Xlpm ); - -/******************************************************************************* -* Function Name : PCU_LPMEnter -* Description : This routine is used to force the Device to enter low -* power mode -* Input : SLOW : Slow Mode - STOP : Stop Mode - HALT : Halt Mode -* Return : None -*******************************************************************************/ -void PCU_LPMEnter ( LPM_MODES Xmode); - -#endif // __PCU_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/rccu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/rccu.h deleted file mode 100644 index 775efc6d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/rccu.h +++ /dev/null @@ -1,319 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : rccu.h -* Author : MCD Application Team -* Date First Issued : 28/07/2003 -* Description : This file contains all the functions prototypes for the -* RCCU software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __RCCU_H -#define __RCCU_H - -#include "71x_map.h" - -typedef enum { - RCCU_DEFAULT=0x00, - RCCU_RCLK_2 =0x01, - RCCU_RCLK_4 =0x02, - RCCU_RCLK_8 =0x03 - } RCCU_Clock_Div; - -typedef enum { - RCCU_PLL1_Output, - RCCU_CLOCK2_16, - RCCU_CLOCK2, - RCCU_RTC_CLOCK - } RCCU_RCLK_Clocks; - - - typedef enum { - RCCU_PLL1_Mul_12=0x01, - RCCU_PLL1_Mul_16=0x03, - RCCU_PLL1_Mul_20=0x00, - RCCU_PLL1_Mul_24=0x02 - } RCCU_PLL1_Mul; - -typedef enum { - RCCU_PLL2_Mul_12=0x01, - RCCU_PLL2_Mul_16=0x03, - RCCU_PLL2_Mul_20=0x00, - RCCU_PLL2_Mul_28=0x02 - } RCCU_PLL2_Mul; - -typedef enum { - RCCU_Div_1=0x00, - RCCU_Div_2=0x01, - RCCU_Div_3=0x02, - RCCU_Div_4=0x03, - RCCU_Div_5=0x04, - RCCU_Div_6=0x05, - RCCU_Div_7=0x06 - } RCCU_PLL_Div; - -typedef enum { - RCCU_PLL2_Output = 0x01, - RCCU_USBCK = 0x00 - } RCCU_USB_Clocks; - -typedef enum { - RCCU_CLK2, - RCCU_RCLK, - RCCU_MCLK, - RCCU_PCLK, - RCCU_FCLK - } RCCU_Clocks; - -typedef enum { - RCCU_PLL1_LOCK_IT = 0x0080, - RCCU_CKAF_IT = 0x0100, - RCCU_CK2_16_IT = 0x0200, - RCCU_STOP_IT = 0x0400 - } RCCU_Interrupts; - -typedef enum { - RCCU_PLL1_LOCK = 0x0002, - RCCU_CKAF_ST = 0x0004, - RCCU_PLL1_LOCK_I = 0x0800, - RCCU_CKAF_I = 0x1000, - RCCU_CK2_16_I = 0x2000, - RCCU_STOP_I = 0x4000 - } RCCU_Flags; - -typedef enum { - RCCU_ExternalReset = 0x00000000, - RCCU_SoftwareReset = 0x00000020, - RCCU_WDGReset = 0x00000040, - RCCU_RTCAlarmReset = 0x00000080, - RCCU_LVDReset = 0x00000200, - RCCU_WKPReset = 0x00000400 - }RCCU_ResetSources; - - -#define RCCU_Div2_Mask 0x00008000 -#define RCCU_Div2_Index 0x0F -#define RCCU_FACT_Mask 0x0003 - -#define RCCU_FACT1_Mask 0x0003 - -#define RCCU_FACT2_Mask 0x0300 -#define RCCU_FACT2_Index 0x08 - -#define RCCU_MX_Mask 0x00000030 -#define RCCU_MX_Index 0x04 - -#define RCCU_DX_Mask 0x00000007 - -#define RCCU_FREEN_Mask 0x00000080 - -#define RCCU_CSU_CKSEL_Mask 0x00000001 - -#define RCCU_CK2_16_Mask 0x00000008 - -#define RCCU_CKAF_SEL_Mask 0x00000004 - -#define RCCU_LOCK_Mask 0x00000002 - -#define RCCU_USBEN_Mask 0x0100 -#define RCCU_USBEN_Index 0x08 -#define RCCU_ResetSources_Mask 0x000006E0 - -// RTC Oscillator Frequency value = 32 768 Hz -#define RCCU_RTC_Osc 32768 - -/******************************************************************************* -* Function Name : RCCU_Div2Config -* Description : Enables/Disables the clock division by two -* Input : NewState : ENABLE or DISABLE -* Return : None -*******************************************************************************/ -INLINE void RCCU_Div2Config ( FunctionalState NewState ) -{ - if (NewState == ENABLE) RCCU->CFR |= RCCU_Div2_Mask; - else RCCU->CFR &= ~RCCU_Div2_Mask; -} - -/******************************************************************************* -* Function Name : RCCU_Div2Status -* Description : Gets the Div2 Flag status -* Input : None -* Input : FlagStatus -* Return : None -*******************************************************************************/ -INLINE FlagStatus RCCU_Div2Status ( void ) -{ - return (RCCU->CFR & RCCU_Div2_Mask) == 0 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : RCCU_MCLKConfig -* Description : Selects the division factor for RCLK to obtain the -* MCLK clock for the CPU -* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2, RCCU_RCLK_4, RCCU_RCLK_8 -* Return : None -*******************************************************************************/ -INLINE void RCCU_MCLKConfig ( RCCU_Clock_Div New_Clock ) -{ - PCU->MDIVR = ( PCU->MDIVR & ~RCCU_FACT_Mask ) | New_Clock; -} - -/******************************************************************************* -* Function Name : RCCU_FCLKConfig -* Description : Selects the division factor for RCLK to obtain the -* FCLK clock for the APB1 fast peripherals (PCLK1). -* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2, -* RCCU_RCLK_4, RCCU_RCLK_8 -* Return : None -*******************************************************************************/ -INLINE void RCCU_FCLKConfig ( RCCU_Clock_Div New_Clock ) -{ - PCU->PDIVR = ( PCU->PDIVR & ~RCCU_FACT1_Mask ) | New_Clock; -} - -/******************************************************************************* -* Function Name : RCCU_PCLKConfig -* Description : Selects the division factor for RCLK to obtain the -* PCLK clock for the APB2 peripherals (PCLK2). -* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2, -* RCCU_RCLK_4, RCCU_RCLK_8 -* Return : None -*******************************************************************************/ -INLINE void RCCU_PCLKConfig ( RCCU_Clock_Div New_Clock ) -{ - PCU->PDIVR =(PCU->PDIVR & ~RCCU_FACT2_Mask)|(New_Clock << RCCU_FACT2_Index); -} - -/******************************************************************************* -* Function Name : RCCU_PLL1Config -* Description : Configures the PLL1 div & mul factors. -* Input : New_Mul : RCCU_Mul_12, RCCU_Mul_16, RCCU_Mul_20, RCCU_Mul_28 -* : New_Div : RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, -* RCCU_Div_4, RCCU_Div_5, RCCU_Div_6, RCCU_Div_7 -* Return : None -*******************************************************************************/ -void RCCU_PLL1Config ( RCCU_PLL1_Mul New_Mul, RCCU_PLL_Div New_Div ); - -/******************************************************************************* -* Function Name : RCCU_PLL2Config -* Description : Configures the PLL2 div & mul factors. -* Input : New_Mul : RCCU_Mul_12, RCCU_Mul_16, RCCU_Mul_20, RCCU_Mul_28 -* : New_Div : RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, RCCU_Div_4, -* RCCU_Div_5, RCCU_Div_6, RCCU_Div_7 -* Return : None -*******************************************************************************/ -void RCCU_PLL2Config ( RCCU_PLL2_Mul New_Mul, RCCU_PLL_Div New_Div ); - -/******************************************************************************* -* Function Name : RCCU_RCLKSourceConfig -* Description : Selects the RCLK source clock -* Input : New_Clock : RCCU_PLL1_OutPut, RCCU_CLOCK2_16, RCCU_CLOCK2 -* Return : None -*******************************************************************************/ -void RCCU_RCLKSourceConfig ( RCCU_RCLK_Clocks New_Clock ); - -/******************************************************************************* -* Function Name : RCCU_RCLKClockSource -* Description : Returns the current RCLK source clock -* Input : None -* Return : RCCU_PLL1_Output, RCCU_CLOCK2_16, RCCU_CLOCK2 -*******************************************************************************/ -RCCU_RCLK_Clocks RCCU_RCLKClockSource ( void ); - -/******************************************************************************* -* Function Name : RCCU_USBCLKConfig -* Description : Selects the USB source clock -* Input : New_Clock : RCCU_PLL2_Output, RCCU_USBCK -* Return : None -*******************************************************************************/ -INLINE void RCCU_USBCLKConfig ( RCCU_USB_Clocks New_Clock ) -{ - PCU->PLL2CR = (PCU->PLL2CR & ~RCCU_USBEN_Mask)|(New_Clock << RCCU_USBEN_Index); -} - -/******************************************************************************* -* Function Name : RCCU_USBClockSource -* Description : Gets the USB source clock -* Input : None -* Return : RCCU_USB_Clocks -*******************************************************************************/ -RCCU_USB_Clocks RCCU_USBClockSource ( void ); - -/******************************************************************************* -* Function Name : RCCU_FrequencyValue -* Description : Calculates & Returns any internal RCCU clock freuqency -* passed in parametres -* Input : RCCU_Clocks : RCCU_CLK2, RCCU_RCLK, RCCU_MCLK, -* RCCU_PCLK, RCCU_FCLK -* Return : u32 -*******************************************************************************/ -u32 RCCU_FrequencyValue ( RCCU_Clocks Internal_Clk ); - -/******************************************************************************* -* Function Name : RCCU_ITConfig -* Description : Configures the RCCU interrupts -* Input : RCCU interrupts : RCCU_CK2_16_IT, RCCU_CKAF_IT, -* RCCU_PLL1_LOCK_IT -* Return : None -*******************************************************************************/ -INLINE void RCCU_ITConfig ( RCCU_Interrupts RCCU_IT, FunctionalState NewState) -{ - if (NewState == ENABLE) RCCU->CCR |= RCCU_IT; else RCCU->CCR &= ~RCCU_IT; -} - -/******************************************************************************* -* Function Name : RCCU_FlagStatus -* Description : Checks the RCCU clock flag register status -* Input : RCCU Flags : RCCU_CK2_16, RCCU_CKAF, RCCU_PLL1_LOCK -* Return : FlagStatus : SET or RESET -*******************************************************************************/ -INLINE FlagStatus RCCU_FlagStatus ( RCCU_Flags RCCU_flag ) -{ - return (RCCU->CFR & RCCU_flag) == 0 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : RCCU_FlagClear -* Description : Clears a specified flag in the RCCU registers -* Input : RCCU Flags : RCCU_CK2_16, RCCU_CKAF, RCCU_PLL1_LOCK -* Return : None -*******************************************************************************/ -INLINE void RCCU_FlagClear ( RCCU_Interrupts RCCU_IT ) -{ - RCCU->CFR |= RCCU_IT; -} - -/******************************************************************************* -* Function Name : RCCU_ResetSources -* Description : Return the source of the system reset -* Input : None -* Return : The reset source -*******************************************************************************/ -INLINE RCCU_ResetSources RCCU_ResetSource () -{ - - switch(RCCU->CFR & RCCU_ResetSources_Mask) - { - case 0x00000020: return RCCU_SoftwareReset; - case 0x00000040: return RCCU_WDGReset; - case 0x00000080: return RCCU_RTCAlarmReset; - case 0x00000200: return RCCU_LVDReset; - case 0x00000400: return RCCU_WKPReset; - default : return RCCU_ExternalReset; - } -} - -#endif // __RCCU_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/rtc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/rtc.h deleted file mode 100644 index 6d449196..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/rtc.h +++ /dev/null @@ -1,190 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : rtc.h -* Author : MCD Application Team -* Date First Issued : 20/05/2003 -* Description : This file contains all the functions prototypes for the -* RTC software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __RTC_H -#define __RTC_H - -#include "71x_map.h" - -typedef enum -{ - RTC_GIR = 0x08, - RTC_OWIR = 0x04, - RTC_AIR = 0x02, - RTC_SIR = 0x01 -} RTC_FLAGS; - -typedef enum -{ - RTC_GIT = 0x08, - RTC_OWIT = 0x04, - RTC_AIT = 0x02, - RTC_SIT = 0x01, - RTC_NONE = 0x00 -} RTC_IT; - -/******************************************************************************* -* Function Name : RTC_Delay -* Description : This routine is used to insert a delay -* Input : None -* Return : None -*******************************************************************************/ -void RTC_Delay( void ); - -/******************************************************************************* -* Function Name : RTC_CounterClear -* Description : This routine is used to clear the RTC counter -* Input : None -* Return : None -*******************************************************************************/ -void RTC_CounterClear (void); -/******************************************************************************* -* Function Name : RTC_CounterValue -* Description : This routine is used to get the RTC counter value -* Input : None -* Return : The current counter value. -*******************************************************************************/ -INLINE u32 RTC_CounterValue (void) -{ - return ( (u32)RTC->CNTH << 16 ) | RTC->CNTL; -} -/******************************************************************************* -* Function Name : RTC_CounterConfig -* Description : This routine is used to update the RTC counter value -* Input : The new counter value. -* Return : None -*******************************************************************************/ -void RTC_CounterConfig (u32 CounterValue); - -/******************************************************************************* -* Function Name : RTC_PrescalerValue -* Description : This routine is used to get the RTC prescaler Value -* Input : None -* Return : an u32 value that holds the prescaler Value. -*******************************************************************************/ -INLINE u32 RTC_PrescalerValue (void) -{ - return ( (u32)(RTC->PRLH & 0x000F) << 16 ) | RTC->PRLL; -} - -/******************************************************************************* -* Function Name : RTC_PrescalerConfig -* Description : This routine is used to set the Prescaler Value -* Input : The New prescaler Value -* Return : None -*******************************************************************************/ -void RTC_PrescalerConfig (u32 Xprescaler); - -/******************************************************************************* -* Function Name : RTC_AlarmValue -* Description : This routine is used to get the RTC alarm Value -* Input : None -* Return : an u32 value that holds the Real Time clock alarm time . -*******************************************************************************/ -INLINE u32 RTC_AlarmValue (void) -{ - return ( (u32)RTC->ALRH << 16 ) | RTC->ALRL; -} - -/******************************************************************************* -* Function Name : RTC_AlarmConfig -* Description : This routine is used to set the RTC alarm Value -* Input : an u32 value that holds the Real Time clock alarm time . -* Return : None -*******************************************************************************/ -void RTC_AlarmConfig (u32 Xalarm); - -/******************************************************************************* -* Function Name : RTC_FlagStatus -* Description : This routine is used to chek the RTC flag status -* Input : an RTC flag -* Return : Set or RESET -*******************************************************************************/ -INLINE FlagStatus RTC_FlagStatus (RTC_FLAGS Xflag) -{ - return ( RTC->CRL & Xflag ) == 0 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : RTC_FlagClear -* Description : This routine is used to clear the RTC flags -* Input : an RTC flag -* Return : None -*******************************************************************************/ -void RTC_FlagClear (RTC_FLAGS Xflag); - -/******************************************************************************* -* Function Name : RTC_ITConfig -* Description : This routine is used to configure the RTC interrupts -* Input 1 : an RTC interrupt -* Input 2 : Enable or Disable -* Return : None -*******************************************************************************/ -INLINE void RTC_ITConfig (RTC_IT Xrtcit, FunctionalState NewState) -{ - if (NewState == ENABLE) RTC->CRH |= Xrtcit; else RTC->CRH &= ~Xrtcit; -} - -/******************************************************************************* -* Function Name : RTC_ITStatus -* Description : This routine is used to get the RTC interrupts status -* Input : an RTC interrupt -* Return : Enable or Disable -*******************************************************************************/ -INLINE FunctionalState RTC_ITStatus (RTC_IT Xrtcit) -{ - return ( RTC->CRH & Xrtcit ) == 0 ? DISABLE : ENABLE; -} - -/******************************************************************************* -* Function Name : RTC_ITClear -* Description : This routine is used to clear the RTC interrupts -* Input : an RTC interrupt -* Return : None -*******************************************************************************/ -void RTC_ITClear (RTC_IT Xrtcit); - -/******************************************************************************* -* Function Name : RTC_EnterCfgMode -* Description : This routine is used to enter in the Configuration Mode -* Input : None -* Return : None -*******************************************************************************/ -void RTC_EnterCfgMode(void); - -/******************************************************************************* -* Function Name : RTC_ExitCfgMode -* Description : This routine is used to exit from the Configuration Mode -* Input : None -* Return : None -*******************************************************************************/ -void RTC_ExitCfgMode(void); - -/******************************************************************************* -* Function Name : RTC_WaitForLastTask -* Description : This routine is waits for the last task completetion -* Input : None -* Return : None -*******************************************************************************/ -void RTC_WaitForLastTask(void); - -#endif // __RTC_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/tim.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/tim.h deleted file mode 100644 index 15c00946..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/tim.h +++ /dev/null @@ -1,346 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : tim.h -* Author : MCD Application Team -* Date First Issued : 08/09/2003 -* Description : This file contains all the functions prototypes for the -* TIM software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __TIM_H -#define __TIM_H - -#include "71x_map.h" - -typedef enum { TIM_EXTERNAL, - TIM_INTERNAL - } TIM_Clocks; - -typedef enum { TIM_RISING, - TIM_FALLING - } TIM_Clock_Edges; - -typedef enum { TIM_CHANNEL_A, - TIM_CHANNEL_B - } TIM_Channels; - -typedef enum { TIM_WITH_IT, - TIM_WITHOUT_IT - } TIM_IT_Mode; - -typedef enum { TIM_TIMING, - TIM_WAVE - } TIM_OC_Modes; - -typedef enum { TIM_HIGH, - TIM_LOW - } TIM_Logic_Levels; - -typedef enum { TIM_START, - TIM_STOP, - TIM_CLEAR - } TIM_CounterOperations; - -typedef enum { TIM_ICFA = 0x8000, - TIM_OCFA = 0x4000, - TIM_TOF = 0x2000, - TIM_ICFB = 0x1000, - TIM_OCFB = 0x0800 - } TIM_Flags; - -typedef struct { u16 Pulse; - u16 Period; - } PWMI_parameters; - -#define TIM_ECKEN_Mask 0x0001 -#define TIM_EXEDG_Mask 0x0002 - -#define TIM_IEDGA_Mask 0x0004 -#define TIM_IEDGB_Mask 0x0008 - -#define TIM_PWM_Mask 0x0010 - -#define TIM_OMP_Mask 0x0020 - -#define TIM_OCAE_Mask 0x0040 -#define TIM_OCBE_Mask 0x0080 - -#define TIM_OLVLA_Mask 0x0100 -#define TIM_OLVLB_Mask 0x0200 - -#define TIM_FOLVA_Mask 0x0400 -#define TIM_FOLVB_Mask 0x0800 - -#define TIM_PWMI_Mask 0x4000 - -#define TIM_EN_Mask 0x8000 - -#define TIM_OCBIE_mask 0x0800 -#define TIM_ICBIE_Mask 0x1000 -#define TIM_TOE_Mask 0x2000 -#define TIM_ICAIE_Mask 0x8000 -#define TIM_OCAIE_mask 0x4000 - -#define TIM_ICA_IT 0x8000 // Input Capture Channel A -#define TIM_OCA_IT 0x4000 // Output Compare Channel A -#define TIM_TO_IT 0x2000 // Timer OverFlow -#define TIM_ICB_IT 0x1000 // Input Capture Channel B -#define TIM_OCB_IT 0x0800 // Input Capture Channel A - - -/******************************************************************************* -* Function Name : TIM_Init -* Description : This routine is used to Initialize the TIM peripheral -* Input : TIM Timer to Initialize -* Return : None -*******************************************************************************/ -void TIM_Init( TIM_TypeDef *TIMx ); - -/******************************************************************************* -* Function Name : TIM_ClockSourceConfig -* Description : This routine is used to configure the TIM clock source -* Input : (1) TIM Timer -* : (2) TIM_Clocks : Specifies the TIM source clock -* - TIM_INTERNAL : The TIM is clocked by the APB2 frequency -* divided by the prescaler value. -* - TIM_EXTERNAL : The TIM is clocked by an external Clock -* Return : None -*******************************************************************************/ -INLINE void TIM_ClockSourceConfig ( TIM_TypeDef *TIMx, TIM_Clocks Xclock ) -{ - if (Xclock==TIM_EXTERNAL) TIMx->CR1|=TIM_ECKEN_Mask; else TIMx->CR1&=~TIM_ECKEN_Mask; -} - -/******************************************************************************* -* Function Name : TIM_ClockSourceValue -* Description : This routine is used to get the TIM clock source -* Input : TIM Timer -* Return : TIM_Clocks : Specifies the TIM source clock -* - TIM_INTERNAL : The TIM is clocked by the APB2 frequency -* divided by the prescaler value. -* - TIM_EXTERNAL : The TIM is clocked by an external Clock -*******************************************************************************/ -INLINE TIM_Clocks TIM_ClockSourceValue ( TIM_TypeDef *TIMx ) -{ - return ( TIMx->CR1 & TIM_ECKEN_Mask) == 0 ? TIM_INTERNAL : TIM_EXTERNAL; -} - -/******************************************************************************* -* Function Name : TIM_PrescalerConfig -* Description : This routine is used to configure the TIM prescaler value -* ( using an internal clock ) -* Input : (1) TIM Timer -* : (2) Prescaler ( u8 ) -* Return : None -*******************************************************************************/ -INLINE void TIM_PrescalerConfig ( TIM_TypeDef *TIMx, u8 Xprescaler ) -{ - TIMx->CR2 = ( TIMx->CR2 & 0xFF00 ) | Xprescaler; -} - -/******************************************************************************* -* Function Name : TIM_PrescalerValue -* Description : This routine is used to get the TIM prescaler value -* ( when using using an internal clock ) -* Input : TIM Timer -* Return : Prescaler ( u8 ) -*******************************************************************************/ -INLINE u8 TIM_PrescalerValue ( TIM_TypeDef *TIMx ) -{ - return TIMx->CR2 & 0x00FF; -} - -/******************************************************************************* -* Function Name : TIM_ClockLevelConfig -* Description : This routine is used to configure the TIM clock level -* ( using an external clock ) -* Input : TIM Timer -* : TIM_Clock_Edges : Specifies the active adge of the external clock -* - TIM_RISING : The rising edge -* - TIM_FALLING : The falling edge -* Return : None -*******************************************************************************/ -INLINE void TIM_ClockLevelConfig ( TIM_TypeDef *TIMx, TIM_Clock_Edges Xedge ) -{ - if (Xedge == TIM_RISING) TIMx->CR1 |= TIM_EXEDG_Mask; else TIMx->CR1 &= ~TIM_EXEDG_Mask; -} - -/******************************************************************************* -* Function Name : TIM_ClockLevelValue -* Description : This routine is used to get the TIM clock level -* Input : TIM Timer -* Output : TIM_Clock_Edges : Specifies the active adge of the external clock -* - TIM_RISING : The rising edge -* - TIM_FALLING : The falling edge -*******************************************************************************/ -INLINE TIM_Clock_Edges TIM_ClockLevelValue ( TIM_TypeDef *TIMx ) -{ - return ( TIMx->CR1 & TIM_EXEDG_Mask ) == 0 ? TIM_FALLING : TIM_RISING; -} - -/******************************************************************************* -* Function Name : TIM_ICAPModeConfig -* Description : This routine is used to configure the input capture feature -* Input : (1) TIM Timer -* : (2) Input Capture Channel ( Channel_A or Channel_B ) -* : (3) Active Edge : Rising edge or Falling edge. -* Output : None -*******************************************************************************/ -void TIM_ICAPModeConfig ( TIM_TypeDef *TIMx, - TIM_Channels Xchannel, - TIM_Clock_Edges Xedge ); - -/******************************************************************************* -* Function Name : TIM_ICAPValue -* Description : This routine is used to get the Input Capture value -* Input : (1) TIM Timer -* : (2) Input Capture Channel ( Channel_A or Channel_B ) -* Output : None -*******************************************************************************/ -INLINE u16 TIM_ICAPValue ( TIM_TypeDef *TIMx, TIM_Channels Xchannel ) -{ - return Xchannel == TIM_CHANNEL_A ? TIMx->ICAR : TIMx->ICBR; -} - -/******************************************************************************* -* Function Name : TIM_OCMPModeConfig -* Description : This routine is used to configure the output compare feature -* Input : (1) TIM Timer -* : (2) OCMP Channel ( Channel_A or Channel_B ) -* : (3) Pulse Length -* : (4) OC_Mode : output wave, or only timing. -* : (5) Level : Rising edge or Falling edge after the == -* Output : None -*******************************************************************************/ -void TIM_OCMPModeConfig ( TIM_TypeDef *TIMx, - TIM_Channels Xchannel, - u16 XpulseLength, - TIM_OC_Modes Xmode, - TIM_Logic_Levels Xlevel ); - -/******************************************************************************* -* Function Name : TIM_OPModeConfig -* Description : This routine is used to configure the one pulse mode -* Input : (1) TIM Timer -* : (3) XpulseLength : Length of the pulse -* : (4) Level1 : Level during the pulse -* : (5) Level2 : Level after the pulse -* : (6) Activation Edge : High or Low on ICAP A -* Output : None -*******************************************************************************/ -void TIM_OPModeConfig ( TIM_TypeDef *TIMx, - u16 XpulseLength, - TIM_Logic_Levels XLevel1, - TIM_Logic_Levels XLevel2, - TIM_Clock_Edges Xedge ); - -/******************************************************************************* -* Function Name : TIM_PWMOModeConfig -* Description : This routine is used to configure the PWM in output mode -* Input : (1) TIM Timer -* : (2) DutyCycle : u16 -* : (3) Level 1 : During the Duty Cycle -* : (4) Level 2 : During the after the pulse -* : (5) Full period : u16 -* Output : None -*******************************************************************************/ -void TIM_PWMOModeConfig ( TIM_TypeDef *TIMx, - u16 XDutyCycle, - TIM_Logic_Levels XLevel1, - u16 XFullperiod, - TIM_Logic_Levels XLevel2 - ); - -/******************************************************************************* -* Function Name : TIM_PWMInputConfig -* Description : This routine is used to configure the PWM in input mode -* Input : (1) TIM Timer -* : (2) First Activation Edge -* Output : None -*******************************************************************************/ -void TIM_PWMIModeConfig ( TIM_TypeDef *TIMx, TIM_Clock_Edges Xedge ); - -/******************************************************************************* -* Function Name : TIM_PWMIValue -* Description : This routine is used to get the PWMI values -* Input : (1) TIM Timer -* Output : PWMI_parameters : - u16 Dyty cycle - - u16 Full period -*******************************************************************************/ -PWMI_parameters TIM_PWMIValue (TIM_TypeDef *TIMx ); - -/******************************************************************************* -* Function Name : TIM_CounterConfig -* Description : This routine is used to start/stop and clear the selected -* timer counter -* Input : (1) TIM Timer -* : (2) TIM_CounterOperations - TIM_START Enables or resumes the counter -* TIM_STOP Stops the TIM counter -* TIM_CLEAR Set the TIM counter value to FFFCh -* Output : None -*******************************************************************************/ -void TIM_CounterConfig ( TIM_TypeDef *TIMx, TIM_CounterOperations Xoperation ); - -/******************************************************************************* -* Function Name : TIM_ITConfig -* Description : This routine is used to configure the TIM IT -* Input : (1) TIM Timer -* : (2) TIM interrupt -* : (2) ENABLE / DISABLE -* Output : None -*******************************************************************************/ -INLINE void TIM_ITConfig ( TIM_TypeDef *TIMx, u16 New_IT, FunctionalState NewState ) -{ - if (NewState == ENABLE) TIMx->CR2 |= New_IT; else TIMx->CR2 &= ~New_IT; -} - -/******************************************************************************* -* Function Name : TIM_FlagStatus -* Description : This routine is used to check whether a Flag is Set. -* Input : (1) TIM Timer -* : (2) The TIM FLag -* Output : Flag NewState -*******************************************************************************/ -INLINE FlagStatus TIM_FlagStatus ( TIM_TypeDef *TIMx, TIM_Flags Xflag ) -{ - return (TIMx->SR & Xflag) == 0 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : TIM_FlagClear -* Description : This routine is used to clear Flags. -* Input : (1) TIM Timer -* : (2) The TIM FLag -* Output : None -*******************************************************************************/ -INLINE void TIM_FlagClear ( TIM_TypeDef *TIMx, TIM_Flags Xflag ) -{ - TIMx->SR &= ~Xflag; -} - -/******************************************************************************* -* Function Name : TIM_CounterValue -* Description : This routine returns the timer counter value. -* Input : TIM Timer -* Output : The counter value -*******************************************************************************/ -INLINE u16 TIM_CounterValue(TIM_TypeDef *TIMx) -{ - return TIMx->CNTR; -} -#endif // __TIM_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/uart.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/uart.h deleted file mode 100644 index 248c8da7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/uart.h +++ /dev/null @@ -1,391 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : uart.h -* Author : MCD Application Team -* Date First Issued : 16/05/2003 -* Description : This file contains all the functions prototypes for the -* UART software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef _UART_H -#define _UART_H - -#include "71x_map.h" -#include "rccu.h" - -typedef enum -{ - UART_RxFIFO, - UART_TxFIFO -} UARTFIFO_TypeDef; - -typedef enum -{ - UART_EVEN_PARITY = 0x0000, - UART_ODD_PARITY = 0x0020, - UART_NO_PARITY -} UARTParity_TypeDef; - -typedef enum -{ - UART_0_5_StopBits = 0x00, - UART_1_StopBits = 0x08, - UART_1_5_StopBits = 0x10, - UART_2_StopBits = 0x18 -} UARTStopBits_TypeDef; - -typedef enum -{ - UARTM_8D = 0x01, - UARTM_7D_P = 0x03, - UARTM_9D = 0x04, - UARTM_8D_W = 0x05, - UARTM_8D_P = 0x07 -} UARTMode_TypeDef; - - -#define DUMMY 0 - -// UART flags definition -#define UART_TxFull 0x0200 -#define UART_RxHalfFull 0x0100 -#define UART_TimeOutIdle 0x0080 -#define UART_TimeOutNotEmpty 0x0040 -#define UART_OverrunError 0x0020 -#define UART_FrameError 0x0010 -#define UART_ParityError 0x0008 -#define UART_TxHalfEmpty 0x0004 -#define UART_TxEmpty 0x0002 -#define UART_RxBufFull 0x0001 - -// CR regiter bit definition -#define UART_FIFOEnableBit 10 -#define UART_RxEnableBit 8 -#define UART_RunBit 7 -#define UART_LoopBackBit 6 -#define UART_ParityOddBit 5 -#define UART_StopBits 3 - -// Stop bits definition -#define UART_05StopBits 0x00 -#define UART_1StopBit (0x01<<3) -#define UART_15StopBits (0x02<<3) -#define UART_2StopBits (0x03<<3) - -// Modes definition -#define UART_8BitsData 0x01 -#define UART_7BitsData 0x03 -#define UART_9BitsData 0x04 -#define UART_8BitsDataWakeUp 0x05 -#define UART_8BitsDataParity 0x07 - -/******************************************************************************* -* Function Name : UART_Init -* Description : This function initializes the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Output : None -* Return : None -*******************************************************************************/ -void UART_Init(UART_TypeDef *UARTx); - -/******************************************************************************* -* Function Name : UART_ModeConfig -* Description : This function configures the mode of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The UART mode -* Output : None -* Return : None -*******************************************************************************/ -INLINE void UART_ModeConfig(UART_TypeDef *UARTx, UARTMode_TypeDef UART_Mode) -{ - UARTx->CR = (UARTx->CR&0xFFF8)|(u16)UART_Mode; -} - -/******************************************************************************* -* Function Name : UART_BaudRateConfig -* Description : This function configures the baud rate of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The baudrate value -* Output : None -* Return : None -*******************************************************************************/ -void UART_BaudRateConfig(UART_TypeDef *UARTx, u32 BaudRate); - -/******************************************************************************* -* Function Name : UART_ParityConfig -* Description : This function configures the data parity of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The parity type -* Output : None -* Return : None -*******************************************************************************/ -INLINE void UART_ParityConfig(UART_TypeDef *UARTx, UARTParity_TypeDef Parity) -{ - UARTx->CR = (UARTx->CR&0xFFDF)|(u16)Parity; -} - -/******************************************************************************* -* Function Name : UART_StopBitsConfig -* Description : This function configures the number of stop bits of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The number of stop bits -* Output : None -* Return : None -*******************************************************************************/ -INLINE void UART_StopBitsConfig(UART_TypeDef *UARTx, UARTStopBits_TypeDef StopBits) -{ - UARTx->CR = (UARTx->CR&0xFFE7)|(u16)StopBits; -} - -/******************************************************************************* -* Function Name : UART_Config -* Description : This function configures the baudrate, the mode, the data -* parity and the number of stop bits of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The baudrate value -* Input 3 : The parity type -* Input 4 : The number of stop bits -* Input 5 : The UART mode -* Output : None -* Return : None -*******************************************************************************/ -void UART_Config(UART_TypeDef *UARTx, u32 BaudRate, UARTParity_TypeDef Parity, - UARTStopBits_TypeDef StopBits, UARTMode_TypeDef Mode); - -/******************************************************************************* -* Function Name : UART_ItConfig -* Description : This function enables or disables the interrupts of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The new interrupt flag -* Input 3 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_ItConfig(UART_TypeDef *UARTx, u16 UART_Flag, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_FifoConfig -* Description : This function enables or disables the Rx and Tx FIFOs of -* the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_FifoConfig(UART_TypeDef *UARTx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_FifoReset -* Description : This function resets the Rx and the Tx FIFOs of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : RxFIFO or TxFIFO -* Output : None -* Return : None -*******************************************************************************/ -void UART_FifoReset(UART_TypeDef *UARTx, UARTFIFO_TypeDef FIFO); - -/******************************************************************************* -* Function Name : UART_LoopBackConfig -* Description : This function enables or disables the loop back mode of -* the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_LoopBackConfig(UART_TypeDef *UARTx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_TimeOutPeriodConfig -* Description : This function configure the Time Out Period. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The time-out period value -* Output : None -* Return : None -*******************************************************************************/ -INLINE void UART_TimeOutPeriodConfig(UART_TypeDef *UARTx, u16 TimeOutPeriod) -{ - UARTx->TOR = TimeOutPeriod; -} - -/******************************************************************************* -* Function Name : UART_GuardTimeConfig -* Description : This function configure the Guard Time. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The guard time value -* Output : None -* Return : None -*******************************************************************************/ -INLINE void UART_GuardTimeConfig(UART_TypeDef *UARTx, u16 GuardTime) -{ - UARTx->GTR = GuardTime; -} - -/******************************************************************************* -* Function Name : UART_RxConfig -* Description : This function enable and disable the UART data reception. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_RxConfig(UART_TypeDef *UARTx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_OnOffConfig -* Description : This function sets On/Off the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_OnOffConfig(UART_TypeDef *UARTx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_ByteSend -* Description : This function sends a data byte to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data byte to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_ByteSend(UART_TypeDef *UARTx, u8 *Data); - -/******************************************************************************* -* Function Name : UART_9BitByteSend -* Description : This function sends a 9 bits data byte to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_9BitByteSend(UART_TypeDef *UARTx, u16 *Data); - -/******************************************************************************* -* Function Name : UART_DataSend -* Description : This function sends several data bytes to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data to send -* Input 3 : The data length in bytes -* Output : None -* Return : None -*******************************************************************************/ -void UART_DataSend(UART_TypeDef *UARTx, u8 *Data, u8 DataLength); - -/******************************************************************************* -* Function Name : UART_9BitDataSend -* Description : This function sends several 9 bits data bytes to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data to send -* Input 3 : The data length -* Output : None -* Return : None -*******************************************************************************/ -void UART_9BitDataSend(UART_TypeDef *UARTx, u16 *Data, u8 DataLength); - -/******************************************************************************* -* Function Name : UART_StringSend -* Description : This function sends a string to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the string to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_StringSend(UART_TypeDef *UARTx, u8 *String); - -/******************************************************************************* -* Function Name : UART_ByteReceive -* Description : This function gets a data byte from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The time-out period -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_ByteReceive(UART_TypeDef *UARTx, u8 *Data, u8 TimeOut); - -/******************************************************************************* -* Function Name : UART_9BitByteReceive -* Description : This function gets a 9 bits data byte from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The time-out period value -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_9BitByteReceive(UART_TypeDef *UARTx, u16 *Data, u8 TimeOut); - -/******************************************************************************* -* Function Name : UART_DataReceive -* Description : This function gets 8 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The data length -* Input 4 : The time-out period value -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_DataReceive(UART_TypeDef *UARTx, u8 *Data, u8 DataLength, u8 TimeOut); - -/******************************************************************************* -* Function Name : UART_9BitDataReceive -* Description : This function gets 9 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The data length -* Input 4 : The time-out value -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_9BitDataReceive(UART_TypeDef *UARTx, u16 *Data, u8 DataLength, u8 TimeOut); - -/******************************************************************************* -* Function Name : UART_StringReceive -* Description : This function gets 8 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the string will be stored -* Output : None -* Return : None -*******************************************************************************/ -u16 UART_StringReceive(UART_TypeDef *UARTx, u8 *Data); - -/******************************************************************************* -* Function Name : UART_FlagStatus -* Description : This function gets the flags status of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Output : None -* Return : None -*******************************************************************************/ -INLINE u16 UART_FlagStatus(UART_TypeDef *UARTx) -{ - return UARTx->SR; -} - -#ifdef USE_SERIAL_PORT -/******************************************************************************* -* Function Name : sendchar -* Description : This function sends a character to the selected UART. -* Input 1 : A pointer to the character to send. -* Output : None -* Return : None -*******************************************************************************/ -void sendchar( char *ch ); -#endif /* USE_SERIAL_PORT */ - -#endif /* _UART_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/wdg.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/wdg.h deleted file mode 100644 index 58858824..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/wdg.h +++ /dev/null @@ -1,130 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : wdg.h -* Author : MCD Application Team -* Date First Issued : 25/08/2003 -* Description : This file contains all the functions prototypes for the -* WDG software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __WDG_H -#define __WDG_H - -#include "71x_map.h" -#include "rccu.h" - -/******************************************************************************* -* Function Name : WDG_Enable -* Description : Enable the Watchdog Mode -* Input : None -* Return : None -*******************************************************************************/ -INLINE void WDG_Enable ( void ) -{ - WDG->CR |= 0x01; -} - -/******************************************************************************* -* Function Name : WDG_CntRefresh -* Description : Refresh and update the WDG counter to avoid a system reset. -* Input : None -* Return : None -*******************************************************************************/ -INLINE void WDG_CntRefresh ( void ) -{ - //write the first value in the key register - WDG->KR = 0xA55A; - //write the consecutive value - WDG->KR = 0x5AA5; -} - -/******************************************************************************* -* Function Name : WDG_PrescalerConfig -* Description : Set the counter prescaler value. -* Divide the counter clock by (Prescaler + 1) -* Input : Prescaler data value (8 bit) -* Return : None -*******************************************************************************/ -INLINE void WDG_PrescalerConfig ( u8 Prescaler ) -{ - WDG->PR = Prescaler; -} - -/******************************************************************************* -* Function Name : WDG_CntReloadUpdate -* Description : Update the counter pre-load value. -* Input : Pre-load data value (16 bit) -* Return : None -*******************************************************************************/ -INLINE void WDG_CntReloadUpdate ( u16 PreLoadValue ) -{ - WDG->VR = PreLoadValue; -} - -/******************************************************************************* -* Function Name : WDG_PeriodValueConfig -* Description : Set the prescaler and counter reload value based on the -* time needed -* Input : Amount of time (us) needed, peripheral clock2 value -* Return : None -*******************************************************************************/ -void WDG_PeriodValueConfig ( u32 Time ); - -/******************************************************************************* -* Function Name : WDG_CntOnOffConfig -* Description : Start or stop the free auto-reload timer to countdown. -* Input : ENABLE or DISABLE -* Return : None -*******************************************************************************/ -INLINE void WDG_CntOnOffConfig ( FunctionalState NewState ) -{ - if (NewState == ENABLE) WDG->CR |= 0x0002; else WDG->CR &= ~0x0002; -} - -/******************************************************************************* -* Function Name : WDG_ECITConfig -* Description : Enable or Disable the end of count interrupt -* Input : ENABLE or DISABLE -* Return : None -*******************************************************************************/ -INLINE void WDG_ECITConfig (FunctionalState NewState) -{ - if (NewState == ENABLE) WDG->MR |= 0x0001; else WDG->MR &= ~0x0001; -} - -/******************************************************************************* -* Function Name : WDG_ECFlagClear -* Description : Clear the end of count flag -* Input : None -* Return : None -*******************************************************************************/ -INLINE void WDG_ECFlagClear ( void ) -{ - WDG->SR = 0x0000; -} - -/******************************************************************************* -* Function Name : WDG_ECStatus -* Description : Return the end of count status -* Input : None -* Return : NewState value -*******************************************************************************/ -INLINE u16 WDG_ECStatus ( void ) -{ - return WDG->SR; -} - -#endif // __WDG_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/xti.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/xti.h deleted file mode 100644 index a8a2476a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/include/xti.h +++ /dev/null @@ -1,138 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : xti.h -* Author : MCD Application Team -* Date First Issued : 08/06/2003 -* Description : This file contains all the functions prototypes for the -* XTI software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __XTI_H -#define __XTI_H - -#include "71x_map.h" - -typedef enum -{ - XTI_WakeUp = 1, - XTI_Interrupt = 2, - XTI_WakeUpInterrupt = 3 -} XTIMode_TypeDef; - -typedef enum -{ - XTI_FallingEdge, - XTI_RisingEdge -} XTITriggerEdge_TypeDef; - -#define XTI_Line0 0x0001 -#define XTI_Line1 (XTI_Line0<<1) -#define XTI_Line2 (XTI_Line1<<1) -#define XTI_Line3 (XTI_Line2<<1) -#define XTI_Line4 (XTI_Line3<<1) -#define XTI_Line5 (XTI_Line4<<1) -#define XTI_Line6 (XTI_Line5<<1) -#define XTI_Line7 (XTI_Line6<<1) -#define XTI_Line8 (XTI_Line7<<1) -#define XTI_Line9 (XTI_Line8<<1) -#define XTI_Line10 (XTI_Line9<<1) -#define XTI_Line11 (XTI_Line10<<1) -#define XTI_Line12 (XTI_Line11<<1) -#define XTI_Line13 (XTI_Line12<<1) -#define XTI_Line14 (XTI_Line13<<1) -#define XTI_Line15 (XTI_Line14<<1) - -/******************************************************************************* -* Function Name : XTI_Init -* Description : Initialize the XIT peripheral to reset state. -* Input 1 : None -* Output : None -* Return : None -*******************************************************************************/ -void XTI_Init(void); - -/******************************************************************************* -* Function Name : XTI_ModeConfig -* Description : Configure the XTI Mede -* Input 1 : Mode can be WakeUp, Interrupt or WakeUpInterrupt. -* Input 2 : NewState can be ENABLE ro DISABLE. -* Output : None -* Return : None -*******************************************************************************/ -INLINE void XTI_ModeConfig(XTIMode_TypeDef Mode,FunctionalState NewState) -{ - if (NewState==ENABLE) XTI->CTRL|=Mode; else XTI->CTRL&=~Mode; -} - -/******************************************************************************* -* Function Name : XTI_LineModeConfig -* Description : Configure the trigger edge. -* Input 1 : Lines to be configured. -* Input 2 : The trigger edge can be FallingEdge or RisingEdge. -* Output : None -* Return : None -*******************************************************************************/ -void XTI_LineModeConfig(u16 Lines, XTITriggerEdge_TypeDef TriggerEdge); - -/******************************************************************************* -* Function Name : XTI_LineConfig -* Description : Enable and disable lines interrupts -* Input 1 : Lines to be configured. -* Input 2 : NewState can be ENABLE ro DISABLE. -* Output : None -* Return : None -*******************************************************************************/ -void XTI_LineConfig(u16 Lines, FunctionalState NewState); - -/******************************************************************************* -* Function Name : XTI_InterruptLineValue -* Description : Get the interrupt lines -* Input 1 : None. -* Output : The interrupts lines numbers -* Return : None -*******************************************************************************/ -INLINE u16 XTI_InterruptLineValue(void) -{ - return XTI->PRL | ((u16)XTI->PRH<<8); -} - -/******************************************************************************* -* Function Name : XTI_PendingBitClear -* Description : Clear the pending bits -* Input 1 : Bits to be cleared. -* Output : None -* Return : None -*******************************************************************************/ -INLINE void XTI_PendingBitClear(u16 Lines) -{ - XTI->PRL &= ~Lines; - XTI->PRH &= ~((Lines>>8)&0x00FF); -} - -/******************************************************************************* -* Function Name : XTI_SoftwareIRQInterruprGenerate -* Description : Generate a software IRQ interrupt. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -INLINE void XTI_SWIRQGenerate(void) -{ - XTI->SR = 0x01; - XTI->SR = 0x00; -} - -#endif /* __XTI_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/pcu.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/pcu.c deleted file mode 100644 index 9b943a89..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/pcu.c +++ /dev/null @@ -1,139 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : pcu.c -* Author : MCD Application Team -* Date First Issued : 09/09/03 -* Description : This file provides all the Power Control Unit functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "pcu.h" -#include "rccu.h" - -/******************************************************************************* -* Function Name : PCU_VRConfig -* Description : This routine is used to configure PCU voltage regultors -* Input 1 : MVR : Main voltage Regulator - LPR : Low Power Regulator -* Input 2 : ENABLE : Enable the Voltage Regulator - DISABLE: Disable ( ByPass ) the VR -* Return : None -*******************************************************************************/ -void PCU_VRConfig ( PCU_VR Xvr, FunctionalState NewState ) -{ - u16 Tmp = PCU->PWRCR; - switch ( Xvr ) - { - case PCU_MVR : - // Configure the Main Voltage Regulator - if (NewState == DISABLE) Tmp |= PCU_MVR_Mask; else Tmp &= ~PCU_MVR_Mask; - break; - case PCU_LPR : - // Configure the Low power Voltage Regulator - if (NewState == DISABLE) Tmp |= PCU_LPR_Mask; else Tmp &= ~PCU_LPR_Mask; - break; - } - // Unlock Power Control Register - PCU->PWRCR |= PCU_WREN_Mask; - PCU->PWRCR = Tmp | PCU_WREN_Mask; -} - -/******************************************************************************* -* Function Name : PCU_WFIEnter -* Description : This routine is used to force the Device to enter in WFI mode -* Input 1 : CLOCK2_16 : Clock2_16 as system clock for WFI mode -* EXTERNAL : external clock as system clock for WFI mode -* Input 2 : ENABLE : Enable Low Power Regulator during Wait For Interrupt Mode -* DISABLE: Disable Low Power Regulator during Wait For Interrupt Mode -* Input 3 : ENABLE : Enable Low Power Mode during Wait For Interrupt Mode -* DISABLE: Disable Low Power Mode during Wait For Interrupt Mode -* Return : None -*******************************************************************************/ -void PCU_WFIEnter ( WFI_CLOCKS Xclock, FunctionalState Xlpr, FunctionalState Xlpm ) -{ - u32 Tmp; - // Enable Low Power Regulator in WFI mode - Tmp = PCU->PWRCR; - // Unlock Power Control Register - PCU->PWRCR |= PCU_WREN_Mask; - PCU->PWRCR = Xlpr == ENABLE ? Tmp & ~PCU_LPRWFI_Mask : Tmp | PCU_LPRWFI_Mask; - // WFI Clock Selection - Tmp = RCCU->CCR; - RCCU->CCR = Xclock == WFI_CLOCK2_16 ? Tmp & ~PCU_WFI_CKSEL_Mask : Tmp | PCU_WFI_CKSEL_Mask; - // Low Power Mode during WFI mode - Tmp = RCCU->CCR; - RCCU->CCR = Xlpm == DISABLE ? Tmp & ~PCU_LPOWFI_Mask : Tmp | PCU_LPOWFI_Mask; - // Enter WFI Mode - RCCU->SMR &= ~0x0001; -} - -/******************************************************************************* -* Function Name : PCU_LPMEnter -* Description : This routine is used to force the device to enter in low -* power modes -* Input : PCU_SLOW : Slow Mode - PCU_STOP : Stop Mode - PCU_STANDBY : StandBy Mode -* Return : None -*******************************************************************************/ -void PCU_LPMEnter ( LPM_MODES Xmode ) -{ - u32 temp; - switch ( Xmode ) - { - // Slow Mode - case PCU_SLOW: - { - RCCU->PLL1CR |= 0x87; - RCCU_RCLKSourceConfig ( RCCU_PLL1_Output ); - break; - } - - // Stop Mode - case PCU_STOP: - { - // Enable Stop EN bit - RCCU->CCR |= PCU_STOP_EN_Mask; - - // Write '1' to Stop Bit - XTI->CTRL |= 0x04; - // Write '0' to Stop Bit - XTI->CTRL &= 0x03; - // Write '1' to Stop Bit - XTI->CTRL |= 0x04; - // add Delay - - temp = 0; - temp = 1; - temp = 2; - temp = 3; - temp = 4; - temp = 5; - temp = 6; - temp = 7; - temp = 8; - - break; - - } - // PCU_STANDBY Mode - case PCU_STANDBY: - { - PCU->PWRCR |= PCU_WREN_Mask; // Unlock Power Control Register - PCU->PWRCR |= PCU_PWRDWN_Mask; // Set the Power Down flag - } - } -} -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/rccu.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/rccu.c deleted file mode 100644 index 7de93580..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/rccu.c +++ /dev/null @@ -1,185 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : rccu.c -* Author : MCD Application Team -* Date First Issued : 07/28/2003 -* Description : This file provides all the RCCU software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#include "rccu.h" - -/******************************************************************************* -* Function Name : RCCU_PLL1Config -* Description : Configures the PLL1 div & mul factors. -* Input : New_Mul ( RCCU_PLL1_Mul_12, RCCU_PLL1_Mul_16, RCCU_PLL1_Mul_20, -* RCCU_PLL1_Mul_24 ) -* : New_Div ( RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, RCCU_Div_4, -* RCCU_Div_5, RCCU_Div_6, RCCU_Div_7) -* Return : None -*******************************************************************************/ -void RCCU_PLL1Config ( RCCU_PLL1_Mul New_Mul, RCCU_PLL_Div New_Div ) -{ - u32 Tmp = ( RCCU->PLL1CR & ~RCCU_MX_Mask ) | ( New_Mul << RCCU_MX_Index ); - RCCU->PLL1CR = ( Tmp & ~RCCU_DX_Mask ) | New_Div | 0x40; -} - -/******************************************************************************* -* Function Name : RCCU_PLL2Config -* Description : Configures the PLL2 div & mul factors. -* Input : New_Mul ( RCCU_PLL2_Mul_12, RCCU_PLL2_Mul_16, RCCU_PLL2_Mul_20, -* RCCU_Mul_PLL2_28 ) -* : New_Div ( RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, RCCU_Div_4, -* RCCU_Div_5, RCCU_Div_6, RCCU_Div_7) -* Return : None -*******************************************************************************/ -void RCCU_PLL2Config ( RCCU_PLL2_Mul New_Mul, RCCU_PLL_Div New_Div ) -{ - u32 Tmp = ( PCU->PLL2CR & ~RCCU_MX_Mask ) | ( New_Mul << RCCU_MX_Index ); - PCU->PLL2CR = ( Tmp & ~RCCU_DX_Mask ) | ( New_Div | RCCU_FREEN_Mask ); -} - -/******************************************************************************* -* Function Name : RCCU_RCLKSourceConfig -* Description : Selects the RCLK source clock -* Input : New_Clock ( RCCU_PLL1_Output, RCCU_CLOCK2_16, RCCU_CLOCK2 ) -* Return : None -*******************************************************************************/ -void RCCU_RCLKSourceConfig ( RCCU_RCLK_Clocks New_Clock ) -{ - switch ( New_Clock ) - { - case RCCU_CLOCK2 :{// Resets the CSU_Cksel bit in clk_flag - RCCU->CFR &= ~RCCU_CSU_CKSEL_Mask; - // Set the CK2_16 Bit in the CFR - RCCU->CFR |= RCCU_CK2_16_Mask; - // Deselect The CKAF - RCCU->CCR &= ~RCCU_CKAF_SEL_Mask; - // switch off the PLL1 - RCCU->PLL1CR=((RCCU->PLL1CR & ~RCCU_DX_Mask)\ - |0x00000003) & ~RCCU_FREEN_Mask; - break;} - case RCCU_CLOCK2_16 :{// ReSet the CK2_16 Bit in the CFR - RCCU->CFR &= ~RCCU_CK2_16_Mask; - // Deselect The CKAF - RCCU->CCR &= ~RCCU_CKAF_SEL_Mask; - // switch off the PLL1 - RCCU->PLL1CR=((RCCU->PLL1CR & ~RCCU_DX_Mask)\ - |0x00000003) & ~RCCU_FREEN_Mask; - break;} - case RCCU_PLL1_Output:{// Set the CK2_16 Bit in the CFR - RCCU->CFR = RCCU->CFR | RCCU_CK2_16_Mask; - // Waits the PLL1 to lock if DX bits are different from '111' - // If all DX bit are set the PLL lock flag in meaningless - if (( RCCU->PLL1CR & 0x0007 ) != 7) - while(!(RCCU->CFR & RCCU_LOCK_Mask)); - // Deselect The CKAF - RCCU->CCR &= ~RCCU_CKAF_SEL_Mask; - // Select The CSU_CKSEL - RCCU->CFR |= RCCU_CSU_CKSEL_Mask; - break;} - case RCCU_RTC_CLOCK : {RCCU->CCR |= 0x04; - break;} - } -} - -/******************************************************************************* -* Function Name : RCCU_RCLKClockSource -* Description : Returns the current RCLK source clock -* Input : None -* Return : RCCU_PLL1_Output, RCCU_CLOCK2_16, RCCU_CLOCK2, RCCU_RTC_CLOCK -*******************************************************************************/ -RCCU_RCLK_Clocks RCCU_RCLKClockSource ( void ) -{ - if ((RCCU->CCR & 0x04)==0x04) - return RCCU_RTC_CLOCK; - - else if ((RCCU->CFR & RCCU_CK2_16_Mask)==0) - return RCCU_CLOCK2_16; - - else if (RCCU->CFR & RCCU_CSU_CKSEL_Mask) - return RCCU_PLL1_Output; - - else - return RCCU_CLOCK2; -} - -/******************************************************************************* -* Function Name : RCCU_USBClockSource -* Description : Gets the RCLK source clock -* Input : None -* Return : RCCU_USB_Clocks ( RCCU_PLL2_Output, RCCU_USBCK ) -*******************************************************************************/ -RCCU_USB_Clocks RCCU_USBClockSource ( void ) -{ - if ((PCU->PLL2CR & RCCU_USBEN_Mask ) >> RCCU_USBEN_Index == 1 ) - return RCCU_PLL2_Output; - else return RCCU_USBCK; -} - -/******************************************************************************* -* Function Name : RCCU_FrequencyValue -* Description : Calculates & Returns any internal RCCU clock frequency -* passed in parametres -* Input : RCCU_Clocks ( RCCU_CLK2, RCCU_RCLK, RCCU_MCLK, RCCU_PCLK, RCCU_FCLK ) -* Return : u32 -*******************************************************************************/ -u32 RCCU_FrequencyValue ( RCCU_Clocks Internal_Clk ) -{ - u32 Tmp; - u8 Div = 0; - u8 Mul = 0; - RCCU_RCLK_Clocks CurrentRCLK; - - Tmp = ( RCCU_Div2Status() == SET )? RCCU_Main_Osc / 2 : RCCU_Main_Osc; - - if ( Internal_Clk == RCCU_CLK2 ) - { - Div = 1; - Mul = 1; - } - else - { CurrentRCLK = RCCU_RCLKClockSource (); - switch ( CurrentRCLK ){ - case RCCU_CLOCK2_16 : Div = 16; - Mul = 1; - break; - case RCCU_CLOCK2 : Div = 1; - Mul = 1; - break; - case RCCU_PLL1_Output :{Mul=(RCCU->PLL1CR & RCCU_MX_Mask ) >> RCCU_MX_Index; - switch ( Mul ) - {case 0: Mul = 20; break; - case 1: Mul = 12; break; - case 2: Mul = 24; break; - case 3: Mul = 16; break; - } - Div = ( RCCU->PLL1CR & RCCU_DX_Mask ) + 1; - break;} - case RCCU_RTC_CLOCK : Mul = 1; - Div = 1; - Tmp = RCCU_RTC_Osc; - break;}} - - switch ( Internal_Clk ){ - case RCCU_MCLK :{Div <<= PCU->MDIVR & RCCU_FACT_Mask; - break;} - case RCCU_PCLK :{Div <<=(PCU->PDIVR & RCCU_FACT2_Mask ) >> RCCU_FACT2_Index; - break;} - case RCCU_FCLK :{Div <<= PCU->PDIVR & 0x3; - break;}} - - return (Tmp * Mul) / Div; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/rtc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/rtc.c deleted file mode 100644 index 8adab4f4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/rtc.c +++ /dev/null @@ -1,232 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : rtc.c -* Author : MCD Application Team -* Date First Issued : 09/30/2003 -* Description : This file provides all the RTC software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "rtc.h" - -// Global interrupt -#define RTC_GI_Mask 0x0008 -#define RTC_GI_Index 3 - -// OverFlow interrupt -#define RTC_OWI_Mask 0x0004 -#define RTC_OWI_Index 2 - -// Alarm interrupt -#define RTC_AI_Mask 0x0002 -#define RTC_AI_Index 1 - -// Second interrupt -#define RTC_SI_Mask 0x0001 - -// Configuration Flag Mask -#define RTC_CNF_Mask 0x0010 - -// Operation OFF flag -#define RTC_RTOFF_Mask 0x0020 - -/******************************************************************************* -* Function Name : RTC_Delay -* Description : This routine is used to insert a delay -* Input : None -* Return : None -*******************************************************************************/ -void RTC_Delay( void ) -{ - u16 _Tmp; - for (_Tmp = 0x0; _Tmp < 0x7F; _Tmp ++); -} - -/******************************************************************************* -* Function Name : RTC_CounterConfig -* Description : This routine is used to update the RTC counter value -* Input : The new counter value. -* Return : None -*******************************************************************************/ -void RTC_CounterConfig (u32 CounterValue) -{ - /* Wait For Last Task Completition */ - RTC_WaitForLastTask(); - - /* Enter to configuration mode */ - RTC_EnterCfgMode(); - - /* Wait For Last Task Completition */ - RTC_WaitForLastTask(); - -/* Update the RTC counter register with the new time and date */ - /* Update the CNTL register */ - RTC->CNTL = (u16)CounterValue; - - /* Wait For Last Task Completition */ - RTC_WaitForLastTask(); - - /* Update the CNTH register */ - RTC->CNTH = (u16)(CounterValue >> 16); - - /* Wait For Last Task Completition */ - RTC_WaitForLastTask(); - - /* Exit From Configuration Mode */ - RTC_ExitCfgMode (); -} - -/******************************************************************************* -* Function Name : RTC_PrescalerConfig -* Description : This routine is used to set the Prescaler Value -* Input : The New prescaler Value -* Return : None -*******************************************************************************/ -void RTC_PrescalerConfig (u32 Xprescaler) -{ - if ( RTC_PrescalerValue () != Xprescaler ) - { - // Wait For Last Task Completion - RTC_WaitForLastTask (); - // Enter In Configuration Mode - RTC_EnterCfgMode (); - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Set the prescaler MSB part - RTC->PRLH = (Xprescaler & 0x000F0000) >> 16; - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Set the prescaler LSB part - RTC->PRLL = (Xprescaler & 0x0000FFFF); - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Exit From Configuration Mode - RTC_ExitCfgMode (); - // Wait For Last Task Completion - RTC_WaitForLastTask (); - } -} - -/******************************************************************************* -* Function Name : RTC_AlarmConfig -* Description : This routine is used to set the RTC alarm Value -* Input : an u32 value that holds the Real Time clock alarm time. -* Return : None -*******************************************************************************/ -void RTC_AlarmConfig (u32 Xalarm) -{ - // Wait For Last Task Completion - RTC_WaitForLastTask (); - // Enter In Configuration Mode - RTC_EnterCfgMode (); - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Set The MSB part of the Alarm Time - RTC->ALRH = (Xalarm & 0xFFFF0000) >> 16; - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Set The LSB part of the Alarm Time - RTC->ALRL = (Xalarm & 0x0000FFFF); - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Exit From Configuration Mode - RTC_ExitCfgMode (); - // Wait For Last Task Completion - RTC_WaitForLastTask (); -} - -/******************************************************************************* -* Function Name : RTC_FlagClear -* Description : This routine is used to clear the RTC flags -* Input : an RTC flag -* Return : None -*******************************************************************************/ -void RTC_FlagClear (RTC_FLAGS Xflag) -{ - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Enter In Configuration Mode - RTC_EnterCfgMode(); - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Clear an RTC flag - RTC->CRL &= ~Xflag; - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Exit From Configuration Mode - RTC_ExitCfgMode (); - // Wait For Last Task Completion - RTC_WaitForLastTask(); -} - -/******************************************************************************* -* Function Name : RTC_ITClear -* Description : This routine is used to clear the RTC interrupts -* Input : an RTC interrupt -* Return : None -*******************************************************************************/ -void RTC_ITClear (RTC_IT Xrtcit) -{ - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Enter In Configuration Mode - RTC_EnterCfgMode(); - // Clears an RTC interrupt - RTC->CRL &= ~Xrtcit; - // Exit From Configuration Mode - RTC_ExitCfgMode (); - // Wait For Last Task Completion - RTC_WaitForLastTask (); -} - -/******************************************************************************* -* Function Name : RTC_EnterCfgMode -* Description : This routine is used to enter in the Configuration Mode -* Input : None -* Return : None -*******************************************************************************/ -void RTC_EnterCfgMode(void) -{ - // Set the CNF flag to enter in the Configuration Mode - RTC->CRL |= RTC_CNF_Mask; - // Wait For Last Task Completion - RTC_WaitForLastTask (); -} - -/******************************************************************************* -* Function Name : RTC_ExitCfgMode -* Description : This routine is used to exit from the Configuration Mode -* Input : None -* Return : None -*******************************************************************************/ -void RTC_ExitCfgMode(void) -{ - // Reset the CNF flag to exit from the Configuration Mode - RTC->CRL &= ~RTC_CNF_Mask; - // Wait For Last Task Completion - RTC_WaitForLastTask (); -} - -/******************************************************************************* -* Function Name : RTC_WaitForLastTask -* Description : This routine waits for the last task completion -* Input : None -* Return : None -*******************************************************************************/ -void RTC_WaitForLastTask(void) -{ - // Loop until the Last operation Completion - while (!(RTC->CRL & RTC_RTOFF_Mask)); -} -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/tim.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/tim.c deleted file mode 100644 index f6d2ab19..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/tim.c +++ /dev/null @@ -1,233 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : tim.c -* Author : MCD Application Team -* Date First Issued : 09/08/2003 -* Description : This file provides all the TIM software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "tim.h" - -/******************************************************************************* -* Function Name : TIM_Init -* Description : This routine is used to Initialize the TIM peripheral -* Input : TIM Timer to Initialize -* Return : None -*******************************************************************************/ -void TIM_Init( TIM_TypeDef *TIMx ) -{ - TIMx->CR1 = 0x0000; - TIMx->CR2 = 0x0000; - TIMx->SR = 0x0000; -} - -/******************************************************************************* -* Function Name : TIM_ICAPModeConfig -* Description : This routine is used to configure the input capture feature -* Input : (1) TIM Timer -* : (2) Input Capture Channel ( Channel_A or Channel_B ) -* : (3) Active Edge : Rising edge or Falling edge. -* Output : None -*******************************************************************************/ -void TIM_ICAPModeConfig ( TIM_TypeDef *TIMx, - TIM_Channels Xchannel, - TIM_Clock_Edges Xedge ) -{ - switch (Xchannel) - { - case TIM_CHANNEL_A : - if (Xedge == TIM_RISING) TIMx->CR1 |= TIM_IEDGA_Mask; else TIMx->CR1 &= ~TIM_IEDGA_Mask; - break; - case TIM_CHANNEL_B : - if (Xedge == TIM_RISING) TIMx->CR1 |= TIM_IEDGB_Mask; else TIMx->CR1 &= ~TIM_IEDGB_Mask; - break; - } -} - -/******************************************************************************* -* Function Name : TIM_OCMPModeConfig -* Description : This routine is used to configure the output compare feature -* Input : (1) TIM Timer -* : (2) OCMP Channel ( Channel_A or Channel_B ) -* : (3) Pulse Length -* : (4) OC_Mode : output wave, or only timing. -* : (5) Level : Rising edge or Falling edge after the == -* Output : None -*******************************************************************************/ -void TIM_OCMPModeConfig ( TIM_TypeDef *TIMx, - TIM_Channels Xchannel, - u16 XpulseLength, - TIM_OC_Modes Xmode, - TIM_Logic_Levels Xlevel ) -{ - u16 Tmp1 = 0x0000; - u16 Tmp2 = TIMx->CR2; - - TIMx->CR2 = 0x0000; - // Start The TIM Counter - TIMx->CR1 = TIM_EN_Mask; - // Update the CR2 Register - TIMx->CR2 = Tmp2; - switch ( Xmode ) - { - case TIM_TIMING : - // Output Compare Used only for Internal Timing Operation - Tmp1 = Xchannel == TIM_CHANNEL_A ? Tmp1 & ~TIM_OCAE_Mask : Tmp1 & ~TIM_OCBE_Mask; - break; - case TIM_WAVE : - // Output Compare Used for external wave generation - Tmp1 = Xchannel == TIM_CHANNEL_A ? TIM_OCAE_Mask : TIM_OCBE_Mask; - if ( Xlevel == TIM_HIGH ) - Tmp1 = Xchannel == TIM_CHANNEL_A ? Tmp1 | TIM_OLVLA_Mask : Tmp1 | TIM_OLVLB_Mask; - else - Tmp1 = Xchannel == TIM_CHANNEL_A ? Tmp1 & ~TIM_OLVLA_Mask : Tmp1 & ~TIM_OLVLB_Mask; - break; - } - if ( Xchannel == TIM_CHANNEL_A ) - TIMx->OCAR = ( XpulseLength); - else - TIMx->OCBR = ( XpulseLength); - TIMx->CNTR = 0x0000; - TIMx->CR1 |= Tmp1; -} - -/******************************************************************************* -* Function Name : TIM_OPModeConfig -* Description : This routine is used to configure the one pulse mode -* Input : (1) TIM Timer -* : (3) XpulseLength : Length of the pulse -* : (4) Level1 : Level during the pulse -* : (5) Level2 : Level after the pulse -* : (6) Activation Edge : High or Low on ICAP A -* Output : None -*******************************************************************************/ -void TIM_OPModeConfig ( TIM_TypeDef *TIMx, - u16 XpulseLength, - TIM_Logic_Levels XLevel1, - TIM_Logic_Levels XLevel2, - TIM_Clock_Edges Xedge ) -{ - u16 Tmp = 0; - - // Set the Level During the pulse - if (XLevel1 == TIM_HIGH) Tmp |= TIM_OLVLB_Mask; - // Set the Level after After the pulse - if (XLevel2 == TIM_HIGH) Tmp |= TIM_OLVLA_Mask; - // Set the Activation Edge on the INCAP 1 - if (Xedge == TIM_RISING) Tmp |= TIM_IEDGA_Mask; - // Set the Output Compare Function - Tmp |= TIM_OCAE_Mask; - // Set the One pulse mode - Tmp |= TIM_OMP_Mask; - // Update the CR1 register Value - TIMx->CR1 = Tmp; - // Set the Pulse length - TIMx->OCAR = XpulseLength; -} - -/******************************************************************************* -* Function Name : TIM_PWMOModeConfig -* Description : This routine is used to configure the PWM in output mode -* Input : (1) TIM Timer -* : (2) DutyCycle : u16 -* : (3) Level 1 : During the Duty Cycle -* : (4) Level 2 : During the after the pulse -* : (5) Full period : u16 -* Output : None -*******************************************************************************/ -void TIM_PWMOModeConfig ( TIM_TypeDef *TIMx, - u16 XDutyCycle, - TIM_Logic_Levels XLevel1, - u16 XFullperiod, - TIM_Logic_Levels XLevel2 - ) -{ - u16 Tmp = TIMx->CR1; - // Set the Level During the pulse - Tmp = XLevel1 == TIM_HIGH ? Tmp | TIM_OLVLB_Mask : Tmp & ~TIM_OLVLB_Mask; - // Set the Level after After the pulse - Tmp = XLevel2 == TIM_HIGH ? Tmp | TIM_OLVLA_Mask : Tmp & ~TIM_OLVLA_Mask; - // Set the OCAE - Tmp |= TIM_OCAE_Mask; - // Set the PWM Bit - Tmp |= TIM_PWM_Mask; - // Update the CR1 - TIMx->CR1 = Tmp; - // Set the Duty Cycle value - if ( XDutyCycle < 5 ) XDutyCycle = 5; - TIMx->OCAR = XDutyCycle - 5; - // Set the Full Period - TIMx->OCBR = XFullperiod - 5; -} - -/******************************************************************************* -* Function Name : TIM_PWMInputConfig -* Description : This routine is used to configure the PWM in input mode -* Input : (1) TIM Timer -* : (2) First Activation Edge -* Output : None -*******************************************************************************/ -void TIM_PWMIModeConfig ( TIM_TypeDef *TIMx, TIM_Clock_Edges Xedge ) -{ - u16 Tmp = TIMx->CR1; - // Set the first edge Level - Tmp = Xedge == TIM_RISING ? Tmp | TIM_IEDGA_Mask : Tmp & ~TIM_IEDGA_Mask; - // Set the Second edge Level ( Opposit of the first level ) - Tmp = Xedge == TIM_FALLING ? Tmp | TIM_IEDGB_Mask : Tmp & ~TIM_IEDGB_Mask; - // Set the PWM I Bit - Tmp |= TIM_PWMI_Mask; - // Update the CR1 - TIMx->CR1 = Tmp; -} - -/******************************************************************************* -* Function Name : TIM_PWMIValue -* Description : This routine is used to get the PWMI values -* Input : (1) TIM Timer -* Output : PWMI_parameters : - u16 Dyty cycle - - u16 Full period -*******************************************************************************/ -PWMI_parameters TIM_PWMIValue ( TIM_TypeDef *TIMx ) -{ - PWMI_parameters Tmp; - Tmp.Pulse = TIMx->ICBR; - Tmp.Period = TIMx->ICAR; - return Tmp; -} - -/******************************************************************************* -* Function Name : TIM_PWMInputConfig -* Description : This routine is used to configure the PWM in input mode -* Input : (1) TIM Timer -* : (2) First Activation Edge -* Output : None -*******************************************************************************/ -void TIM_CounterConfig ( TIM_TypeDef *TIMx, TIM_CounterOperations Xoperation ) -{ - switch ( Xoperation ) - { - case TIM_START : - TIMx->CR1 |= TIM_EN_Mask; - break; - case TIM_STOP : - TIMx->CR1 &= ~TIM_EN_Mask; - break; - case TIM_CLEAR : - TIMx->CNTR = 0x1234; - break; - } -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/uart.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/uart.c deleted file mode 100644 index 0a74681f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/uart.c +++ /dev/null @@ -1,366 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : uart.c -* Author : MCD Application Team -* Date First Issued : 06/08/2003 -* Description : This file provides all the UART software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "uart.h" - -/******************************************************************************* -* Function Name : UART_Init -* Description : This function initializes the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Output : None -* Return : None -*******************************************************************************/ -void UART_Init(UART_TypeDef *UARTx) -{ - UARTx->IER = 0x00; - UARTx->CR = 0x00; - (void)UARTx->RxBUFR; - UARTx->RxRSTR = 0xFFFF; - UARTx->TxRSTR = 0xFFFF; -} - -/******************************************************************************* -* Function Name : UART_BaudRateConfig -* Description : This function configures the baud rate of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The baudrate value -* Output : None -* Return : None -*******************************************************************************/ -void UART_BaudRateConfig(UART_TypeDef *UARTx, u32 BaudRate) -{ - UARTx->BR = (u16)(RCCU_FrequencyValue(RCCU_FCLK)/(16*BaudRate)); -} - -/******************************************************************************* -* Function Name : UART_Config -* Description : This function configures the baudrate, the mode, the data -* parity and the number of stop bits of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The baudrate value -* Input 3 : The parity type -* Input 4 : The number of stop bits -* Input 5 : The UART mode -* Output : None -* Return : None -*******************************************************************************/ -void UART_Config(UART_TypeDef *UARTx, u32 BaudRate, UARTParity_TypeDef Parity, - UARTStopBits_TypeDef StopBits, UARTMode_TypeDef Mode) -{ - UART_ModeConfig(UARTx, Mode); - UART_BaudRateConfig(UARTx, BaudRate); - UART_ParityConfig(UARTx, Parity); - UART_StopBitsConfig(UARTx, StopBits); -} - -/******************************************************************************* -* Function Name : UART_ItConfig -* Description : This function enables or disables the interrupts of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The new interrupt flag -* Input 3 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_ItConfig(UART_TypeDef *UARTx, u16 UART_Flag, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->IER|=UART_Flag; else UARTx->IER&=~UART_Flag; -} - -/******************************************************************************* -* Function Name : UART_FifoConfig -* Description : This function enables or disables the Rx and Tx FIFOs of -* the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_FifoConfig(UART_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->CR|=0x0400; else UARTx->CR&=~0x0400; -} - -/******************************************************************************* -* Function Name : UART_FifoReset -* Description : This function resets the Rx and the Tx FIFOs of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : UART_RxFIFO or UART_TxFIFO -* Output : None -* Return : None -*******************************************************************************/ -void UART_FifoReset(UART_TypeDef *UARTx, UARTFIFO_TypeDef FIFO) -{ - if (FIFO==UART_RxFIFO) UARTx->RxRSTR=0xFFFF; else UARTx->TxRSTR=0xFFFF; -} - -/******************************************************************************* -* Function Name : UART_LoopBackConfig -* Description : This function enables or disables the loop back mode of -* the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_LoopBackConfig(UART_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->CR|=0x0040; else UARTx->CR&=~0x0040; -} - -/******************************************************************************* -* Function Name : UART_RxConfig -* Description : This function enables or disables the UART data reception. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_RxConfig(UART_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->CR|=0x0100; else UARTx->CR&=~0x0100; -} - -/******************************************************************************* -* Function Name : UART_OnOffConfig -* Description : This function sets On/Off the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_OnOffConfig(UART_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->CR|=0x0080; else UARTx->CR&=~0x0080; -} - -/******************************************************************************* -* Function Name : UART_ByteSend -* Description : This function sends a data byte to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data byte to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_ByteSend(UART_TypeDef *UARTx, u8 *Data) -{ - if (UARTx->CR & (0x0001<SR & UART_TxFull)); // while the UART_TxFIFO contain 16 characters. - else // if FIFO DISABLED - while (!(UARTx->SR & UART_TxEmpty)); // while the transmit shift register not empty - UARTx->TxBUFR = *Data; -} - -/******************************************************************************* -* Function Name : UART_9BitByteSend -* Description : This function sends a 9 bits data byte to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_9BitByteSend(UART_TypeDef *UARTx, u16 *Data) -{ - if(UARTx->CR & (0x0001<SR & UART_TxFull)); // while the UART_TxFIFO contain 16 characters. - else // if FIFO DISABLED - while (!(UARTx->SR & UART_TxEmpty)); // while the transmit shift register not empty - UARTx->TxBUFR = *Data; -} - -/******************************************************************************* -* Function Name : UART_DataSend -* Description : This function sends several data bytes to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data to send -* Input 3 : The data length in bytes -* Output : None -* Return : None -*******************************************************************************/ -void UART_DataSend(UART_TypeDef *UARTx, u8 *Data, u8 DataLength) -{ - while(DataLength--) - { - UART_ByteSend(UARTx,Data); - Data++; - } -} - -/******************************************************************************* -* Function Name : UART_9BitDataSend -* Description : This function sends several 9 bits data bytes to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data to send -* Input 3 : The data length -* Output : None -* Return : None -*******************************************************************************/ -void UART_9BitDataSend(UART_TypeDef *UARTx, u16 *Data, u8 DataLength) -{ - while(DataLength--) - { - UART_9BitByteSend(UARTx,Data); - Data++; - } -} - -/******************************************************************************* -* Function Name : UART_StringSend -* Description : This function sends a string to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the string to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_StringSend(UART_TypeDef *UARTx, u8 *String) -{ - u8 *Data=String; - while(*Data != '\0') - UART_ByteSend(UARTx, Data++); - *Data='\0'; - UART_ByteSend(UARTx, Data); -} - -/******************************************************************************* -* Function Name : UART_ByteReceive -* Description : This function gets a data byte from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The time-out period -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_ByteReceive(UART_TypeDef *UARTx, u8 *Data, u8 TimeOut) -{ - u16 wStatus; - UARTx->TOR=TimeOut;// reload the Timeout counter - while (!((wStatus=UARTx->SR) & (UART_TimeOutIdle|UART_RxHalfFull|UART_RxBufFull)));// while the UART_RxFIFO is empty and no Timeoutidle - *Data = (u8)UARTx->RxBUFR; // then read the Receive Buffer Register - return wStatus; -} - -/******************************************************************************* -* Function Name : UART_9BitByteReceive -* Description : This function gets a 9 bits data byte from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The time-out period value -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_9BitByteReceive(UART_TypeDef *UARTx, u16 *Data, u8 TimeOut) -{ - u16 wStatus; - UARTx->TOR=TimeOut;// reload the Timeout counter - while (!((wStatus=UARTx->SR) & (UART_TimeOutIdle|UART_RxHalfFull|UART_RxBufFull)));// while the UART_RxFIFO is empty and no Timeoutidle - *Data = (u16)UARTx->RxBUFR; // then read the RxBUFR - return wStatus; -} - -/******************************************************************************* -* Function Name : UART_DataReceive -* Description : This function gets 8 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The data length -* Input 4 : The time-out period value -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_DataReceive(UART_TypeDef *UARTx, u8 *Data, u8 DataLength, u8 TimeOut) -{ - u16 wStatus; - while(DataLength--) - wStatus=UART_ByteReceive(UARTx,Data++,TimeOut); - return wStatus; -} - -/******************************************************************************* -* Function Name : UART_9BitDataReceive -* Description : This function gets 9 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The data length -* Input 4 : The time-out value -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_9BitDataReceive(UART_TypeDef *UARTx, u16 *Data, u8 DataLength, u8 TimeOut) -{ - u16 wStatus; - while(DataLength--) - wStatus=UART_9BitByteReceive(UARTx,Data++,TimeOut); - return wStatus; -} - -/******************************************************************************* -* Function Name : UART_StringReceive -* Description : This function gets 8 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the string will be stored -* Output : The received string -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_StringReceive(UART_TypeDef *UARTx, u8 *Data) -{ - u8 *pSTRING=Data; - u16 wStatus; - do - { - while (!((wStatus=UARTx->SR) & (UART_RxHalfFull|UART_RxBufFull)));// while the UART_RxFIFO is empty and no Timeoutidle - *(pSTRING++) = (u8)UARTx->RxBUFR; // then read the RxBUFR - } while((*(pSTRING - 1)!=0x0D)&(*(pSTRING - 1)!='\0')); - *(pSTRING - 1)='\0'; - return wStatus; -} - -#ifdef USE_SERIAL_PORT -/******************************************************************************* -* Function Name : sendchar -* Description : This function sends a character to the selected UART. -* Input 1 : A pointer to the character to send. -* Output : None -* Return : None -*******************************************************************************/ -void sendchar( char *ch ) -{ - #ifdef USE_UART0 - #define UARTx UART0 - #endif /* Use_UART0 */ - - #ifdef USE_UART1 - #define UARTx UART1 - #endif /* Use_UART1 */ - - #ifdef USE_UART2 - #define UARTx UART2 - #endif /* Use_UART2 */ - - #ifdef USE_UART3 - #define UARTx UART3 - #endif /* Use_UART3 */ - - UART_ByteSend(UARTx,(u8 *)ch); -} -#endif /* USE_SERIAL_PORT */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/wdg.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/wdg.c deleted file mode 100644 index 1ae16cf5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/wdg.c +++ /dev/null @@ -1,84 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : WDG.c -* Author : MCD Application Team -* Date First Issued : 10/24/2003 -* Description : This file provides all the WDG software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "wdg.h" - -#ifndef abs - #define abs(x) ((x)>0 ? (x) : -(x)) -#endif - -/******************************************************************************* -* Function Name : FindFactors -* Description : Search for the best (a,b) values that fit n = a*b -* with the following constraints: 1<=a<=256, 1<=b<=65536 -* Input 1 : n: the number to decompose -* Input/Output 2 : a: a pointer to the first factor -* Input/Output 3 : b: a pointer to the second factor -* Return : None -*******************************************************************************/ -static void FindFactors(unsigned long n, unsigned int *a, unsigned long *b) -{ - unsigned long b0; - unsigned int a0; - long err, err_min=n; - - *a = a0 = ((n-1)/65536ul) + 1; - *b = b0 = n / *a; - - for (; *a <= 256; (*a)++) - { - *b = n / *a; - err = (long)*a * (long)*b - (long)n; - if (abs(err) > (*a / 2)) - { - (*b)++; - err = (long)*a * (long)*b - (long)n; - } - if (abs(err) < abs(err_min)) - { - err_min = err; - a0 = *a; - b0 = *b; - if (err == 0) break; - } - } - - *a = a0; - *b = b0; -} - -/******************************************************************************* -* Function Name : WDG_PeriodValueConfig -* Description : Set the prescaler and counter reload value -* Input : Amount of time (us) needed -* Return : None -*******************************************************************************/ -void WDG_PeriodValueConfig ( u32 Time ) -{ - unsigned int a; - unsigned long n, b; - - n = Time * (RCCU_FrequencyValue(RCCU_PCLK) / 1000000); - FindFactors(n, &a, &b); - WDG->PR = a - 1; - WDG->VR = b - 1; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/xti.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/xti.c deleted file mode 100644 index 3e23dbfb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/library/xti.c +++ /dev/null @@ -1,87 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : xti.c -* Author : MCD Application Team -* Date First Issued : 06/08/2003 -* Description : This file provides all the XTI software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "xti.h" - -/******************************************************************************* -* Function Name : XTI_Init -* Description : Initialize the XTI -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void XTI_Init(void) -{ - XTI->SR=0x00; - XTI->MRH=0x00; - XTI->MRL=0x00; - XTI->TRH=0x00; - XTI->TRL=0x00; - XTI->PRH=0x00; - XTI->PRL=0x00; - XTI->CTRL=0x00; /* Write the STOP bit twice to reset the STOP state machine */ - XTI->CTRL=0x00; -} - -/******************************************************************************* -* Function Name : XTI_LineModeConfig -* Description : Configure the trigger edge. -* Input 1 : Lines to be configured. -* Input 2 : The trigger edge can be FallingEdge or RisingEdge. -* Output : None -* Return : None -*******************************************************************************/ -void XTI_LineModeConfig(u16 Lines, XTITriggerEdge_TypeDef TriggerEdge) -{ - if(TriggerEdge == XTI_FallingEdge) - { - XTI->TRL &= ~Lines; - XTI->TRH &= ~(Lines>>8)&0x00FF; - } - else - { - XTI->TRL |= Lines; - XTI->TRH |= (Lines>>8)&0x00FF; - } -} - -/******************************************************************************* -* Function Name : XTI_LineConfig -* Description : Enable and disable lines interrupts -* Input 1 : Lines to be configured. -* Input 2 : NewState can be ENABLE or DISABLE. -* Output : None -* Return : None -*******************************************************************************/ -void XTI_LineConfig(u16 Lines, FunctionalState NewState) -{ - if(NewState) - { - XTI->MRL |= Lines; - XTI->MRH |= (Lines>>8)&0x00FF; - } - else - { - XTI->MRL &= ~Lines; - XTI->MRH &= ~(Lines>>8)&0x00FF; - } -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/port/port.h deleted file mode 100644 index d764bea0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/port/port.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * FreeModbus Libary: STR71x Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -#include "assert.h" -#include "FreeRTOS.h" - -/* work aroung a problem when inline is also defined in 71x_conf.h */ -#ifdef INLINE -#undef INLINE -#endif - -#define INLINE inline - -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#define ENTER_CRITICAL_SECTION( ) portENTER_CRITICAL( ) -#define EXIT_CRITICAL_SECTION( ) portEXIT_CRITICAL( ) - -typedef char BOOL; - -typedef unsigned char UCHAR; -typedef char CHAR; - -typedef unsigned short USHORT; -typedef short SHORT; - -typedef unsigned long ULONG; -typedef long LONG; - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/port/portevent.c deleted file mode 100644 index d01d7e74..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/port/portevent.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * FreeModbus Libary: STR71x Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- FreeRTOS -----------------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static xQueueHandle xMBPortQueueHdl; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xMBPortQueueHdl = xQueueCreate( 1, sizeof( eMBEventType ) ); - return xMBPortQueueHdl != NULL ? TRUE : FALSE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - portBASE_TYPE xEventSent = pdFALSE; - - xEventSent = xQueueSendFromISR( xMBPortQueueHdl, &eEvent, xEventSent ); - return xEventSent == pdTRUE ? TRUE : FALSE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xQueueReceive( xMBPortQueueHdl, eEvent, portMAX_DELAY ) == pdTRUE ) - { - xEventHappened = TRUE; - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/port/portserial.c deleted file mode 100644 index 50315fbc..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/port/portserial.c +++ /dev/null @@ -1,200 +0,0 @@ -/* - * FreeModbus Libary: STR71x Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- FreeRTOS includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- STR71X includes ----------------------------------*/ -#include "gpio.h" -#include "eic.h" -#include "uart.h" -#include "tim.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_UART_DEV ( UART0 ) -#define MB_UART_RX_PORT ( GPIO0 ) -#define MB_UART_RX_PIN ( 8 ) -#define MB_UART_TX_PORT ( GPIO0 ) -#define MB_UART_TX_PIN ( 9 ) -#define MB_UART_IRQ_CH ( UART0_IRQChannel ) -#define MB_UART_TX_QUEUE_LEN ( 8 ) -#define MB_IRQ_PRIORITY ( 1 ) - -/* ----------------------- Static functions ---------------------------------*/ -void prvvMBSerialIRQHandler( void ) __attribute__ ( ( naked ) ); - -static inline BOOL prvMBPortTXIsEnabled( ); - -static inline BOOL prvMBPortRXIsEnabled( ); - -/* ----------------------- Start implementation -----------------------------*/ - -BOOL -xMBPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - BOOL xResult = TRUE; - UARTParity_TypeDef eUARTParity; - UARTMode_TypeDef eUARTMode; - - (void)ucPort; - - switch ( eParity ) - { - case MB_PAR_EVEN: - eUARTParity = UART_EVEN_PARITY; - break; - case MB_PAR_ODD: - eUARTParity = UART_ODD_PARITY; - break; - case MB_PAR_NONE: - eUARTParity = UART_NO_PARITY; - break; - } - - switch ( ucDataBits ) - { - case 7: - if( eParity == MB_PAR_NONE ) - { - /* not supported by our hardware. */ - xResult = FALSE; - } - else - { - eUARTMode = UARTM_7D_P; - } - break; - case 8: - if( eParity == MB_PAR_NONE ) - { - eUARTMode = UARTM_8D; - } - else - { - eUARTMode = UARTM_8D_P; - } - break; - default: - xResult = FALSE; - } - - if( xResult != FALSE ) - { - /* Setup the UART port pins. */ - GPIO_Config( MB_UART_TX_PORT, 1 << MB_UART_TX_PIN, GPIO_AF_PP ); - GPIO_Config( MB_UART_RX_PORT, 1 << MB_UART_RX_PIN, GPIO_IN_TRI_CMOS ); - - /* Configure the UART. */ - UART_OnOffConfig( MB_UART_DEV, ENABLE ); - UART_FifoConfig( MB_UART_DEV, DISABLE ); - UART_FifoReset( MB_UART_DEV, UART_RxFIFO ); - UART_FifoReset( MB_UART_DEV, UART_TxFIFO ); - UART_LoopBackConfig( MB_UART_DEV, DISABLE ); - UART_Config( MB_UART_DEV, ulBaudRate, eUARTParity, UART_1_StopBits, - eUARTMode ); - UART_RxConfig( UART0, ENABLE ); - vMBPortSerialEnable( FALSE, FALSE ); - - /* Configure the IEC for the UART interrupts. */ - EIC_IRQChannelPriorityConfig( MB_UART_IRQ_CH, MB_IRQ_PRIORITY ); - EIC_IRQChannelConfig( MB_UART_IRQ_CH, ENABLE ); - } - return xResult; -} - -void -vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ - if( xRxEnable ) - UART_ItConfig( MB_UART_DEV, UART_RxBufFull, ENABLE ); - else - UART_ItConfig( MB_UART_DEV, UART_RxBufFull, DISABLE ); - - if( xTxEnable ) - UART_ItConfig( MB_UART_DEV, UART_TxHalfEmpty, ENABLE ); - else - UART_ItConfig( MB_UART_DEV, UART_TxHalfEmpty, DISABLE ); -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - MB_UART_DEV->TxBUFR = ucByte; - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - *pucByte = MB_UART_DEV->RxBUFR; - return TRUE; -} - -BOOL -prvMBPortTXIsEnabled( ) -{ - return ( MB_UART_DEV->IER & UART_TxHalfEmpty ) == UART_TxHalfEmpty; -} - -BOOL -prvMBPortRXIsEnabled( ) -{ - return ( MB_UART_DEV->IER & UART_RxBufFull ) == UART_RxBufFull; -} - - -void -prvvMBSerialIRQHandler( void ) -{ - portENTER_SWITCHING_ISR( ); - - static BOOL xTaskWokenReceive = FALSE; - static BOOL xTaskWokenTransmit = FALSE; - static USHORT usStatus; - - usStatus = UART_FlagStatus( MB_UART_DEV ); - - if( prvMBPortTXIsEnabled( ) && ( usStatus & UART_TxHalfEmpty ) ) - { - xTaskWokenReceive = pxMBFrameCBTransmitterEmpty( ); - } - if( prvMBPortRXIsEnabled( ) && ( usStatus & UART_RxBufFull ) ) - { - xTaskWokenReceive = pxMBFrameCBByteReceived( ); - } - - /* End the interrupt in the EIC. */ - EIC->IPR |= 1 << EIC_CurrentIRQChannelValue( ); - - portEXIT_SWITCHING_ISR( ( xTaskWokenReceive - || xTaskWokenTransmit ) ? pdTRUE : pdFALSE ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/port/porttimer.c deleted file mode 100644 index 9bf34156..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/port/porttimer.c +++ /dev/null @@ -1,128 +0,0 @@ -/* - * FreeModbus Libary: STR71x Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- FreeRTOS includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- STR71X includes ----------------------------------*/ -#include "gpio.h" -#include "eic.h" -#include "uart.h" -#include "tim.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_TIMER_DEV ( TIM0 ) -#define MB_TIMER_PRESCALER ( 255UL ) -#define MB_TIMER_IRQ_CH ( T0TIMI_IRQChannel ) -#define MB_IRQ_PRIORITY ( 1 ) - -/* Timer ticks are counted in multiples of 50us. Therefore 20000 ticks are - * one second. - */ -#define MB_TIMER_TICKS ( 20000UL ) - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usTimerDeltaOCRA; - -/* ----------------------- Static functions ---------------------------------*/ -void prvvMBTimerIRQHandler( void ) __attribute__ ( ( naked ) ); - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ - /* Calculate output compare value for timer1. */ - usTimerDeltaOCRA = - ( ( configCPU_CLOCK_HZ / ( MB_TIMER_PRESCALER + 1 ) ) * - usTim1Timerout50us ) / ( MB_TIMER_TICKS ); - - TIM_Init( MB_TIMER_DEV ); - TIM_PrescalerConfig( MB_TIMER_DEV, MB_TIMER_PRESCALER ); - if( usTimerDeltaOCRA > 0 ) - { - TIM_OCMPModeConfig( MB_TIMER_DEV, TIM_CHANNEL_A, usTimerDeltaOCRA, - TIM_TIMING, TIM_LOW ); - } - - vMBPortTimersDisable( ); - EIC_IRQChannelConfig( MB_TIMER_IRQ_CH, ENABLE ); - EIC_IRQChannelPriorityConfig( MB_TIMER_IRQ_CH, MB_IRQ_PRIORITY ); - - return TRUE; -} - -void -prvvMBTimerIRQHandler( void ) -{ - portENTER_SWITCHING_ISR( ); - - static portBASE_TYPE xTaskSwitch = pdFALSE; - - if( ( usTimerDeltaOCRA > 0 ) - && ( TIM_FlagStatus( MB_TIMER_DEV, TIM_OCFA ) ) ) - { - xTaskSwitch |= pxMBPortCBTimerExpired( ); - TIM_FlagClear( MB_TIMER_DEV, TIM_OCFA ); - } - - /* End the interrupt in the EIC. */ - EIC->IPR |= 1 << EIC_CurrentIRQChannelValue( ); - portEXIT_SWITCHING_ISR( xTaskSwitch ); -} - -inline void -vMBPortTimersEnable( ) -{ - unsigned portSHORT maskTimFlags = 0; - unsigned portSHORT maskTimIT = 0; - - MB_TIMER_DEV->CNTR = 0; - if( usTimerDeltaOCRA > 0 ) - { - MB_TIMER_DEV->OCAR = usTimerDeltaOCRA; - maskTimFlags |= TIM_OCFA; - maskTimIT |= TIM_OCA_IT; - } - - TIM_FlagClear( MB_TIMER_DEV, maskTimFlags ); - TIM_ITConfig( MB_TIMER_DEV, maskTimIT, ENABLE ); - TIM_CounterConfig( MB_TIMER_DEV, TIM_START ); -} - -inline void -vMBPortTimersDisable( ) -{ - /* We can always clear both flags. This improves performance. */ - TIM_FlagClear( MB_TIMER_DEV, TIM_OCFA | TIM_OCFB ); - TIM_ITConfig( MB_TIMER_DEV, TIM_OCA_IT | TIM_OCB_IT, DISABLE ); - TIM_CounterConfig( MB_TIMER_DEV, TIM_STOP ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/simple.bat b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/simple.bat deleted file mode 100644 index beb9247d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/simple.bat +++ /dev/null @@ -1 +0,0 @@ -..\..\tools\modpoll.exe -m ascii -a 10 -r 1000 -c 4 -t 3 -b 9600 -d 7 -p even COM4 \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/simple.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/simple.c deleted file mode 100644 index 111c48ba..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/simple.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * FreeModbus Libary: STR71x Demo Application - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" - -/* ----------------------- STR71X includes ----------------------------------*/ -#include "eic.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 - -/* ----------------------- Static variables ---------------------------------*/ -static unsigned short usRegInputStart = REG_INPUT_START; -static unsigned short usRegInputBuf[REG_INPUT_NREGS]; - -/* ----------------------- Static functions ---------------------------------*/ -static void vInitTask( void *pvParameters ); -static void vMeasureTask( void *pvParameters ); - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - EIC_Init( ); - EIC_IRQConfig( ENABLE ); - - ( void )xTaskCreate( vInitTask, NULL, configMINIMAL_STACK_SIZE, NULL, - tskIDLE_PRIORITY, NULL ); - vTaskStartScheduler( ); - - return 0; -} - -static void -vInitTask( void *pvParameters ) -{ - const unsigned char ucSlaveIDAdditonal[] = { 0xAA, 0xBB, 0xCC }; - eMBErrorCode eStatus; - - /* Select either ASCII or RTU Mode. */ - eStatus = eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); - assert( eStatus == MB_ENOERR ); - - /* Configure the slave id of the device. */ - eStatus = eMBSetSlaveID( 44, TRUE, ucSlaveIDAdditonal, 3 ); - assert( eStatus == MB_ENOERR ); - - /* Enable the Modbus Protocol Stack. */ - eStatus = eMBEnable( ); - - for( ;; ) - { - /* Call the main polling loop of the Modbus protocol stack. Internally - * the polling loop waits for a new event by calling the port - * dependent function xMBPortEventGet( ). In the FreeRTOS port the - * event layer is built with queues. - */ - ( void )eMBPoll( ); - - /* Here we simply count the number of poll cycles. */ - usRegInputBuf[0]++; - } -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = - ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = - ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} - -void -__assert( const char *pcFile, const char *pcLine, int iLineNumber ) -{ - portENTER_CRITICAL( ); - for( ;; ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/simple2.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/simple2.c deleted file mode 100644 index 41701dbd..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/simple2.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * FreeModbus Libary: STR71x Demo Application - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" - -/* ----------------------- STR71X includes ----------------------------------*/ -#include "eic.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 - -/* ----------------------- Static variables ---------------------------------*/ -static unsigned short usRegInputStart = REG_INPUT_START; -static unsigned short usRegInputBuf[REG_INPUT_NREGS]; - -/* ----------------------- Static functions ---------------------------------*/ -static void vModbusTask( void *pvParameters ); - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - EIC_Init( ); - EIC_IRQConfig( ENABLE ); - - ( void )xTaskCreate( vModbusTask, NULL, configMINIMAL_STACK_SIZE, NULL, - tskIDLE_PRIORITY, NULL ); - - vTaskStartScheduler( ); - return 0; -} - -static void -vModbusTask( void *pvParameters ) -{ - portTickType xLastWakeTime; - - /* Select either ASCII or RTU Mode. */ - ( void )eMBInit( MB_RTU, 0x0A, 38400, MB_PAR_EVEN ); - - /* Enable the Modbus Protocol Stack. */ - ( void )eMBEnable( ); - for( ;; ) - { - /* Call the main polling loop of the Modbus protocol stack. */ - ( void )eMBPoll( ); - /* Application specific actions. Count the number of poll cycles. */ - usRegInputBuf[0]++; - /* Hold the current FreeRTOS ticks. */ - xLastWakeTime = xTaskGetTickCount( ); - usRegInputBuf[1] = ( unsigned portSHORT )( xLastWakeTime >> 16UL ); - usRegInputBuf[2] = ( unsigned portSHORT )( xLastWakeTime & 0xFFFFUL ); - /* The constant value. */ - usRegInputBuf[3] = 33; - } -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = - ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = - ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, - eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} - -void -__assert( const char *pcFile, const char *pcLine, int iLineNumber ) -{ - portENTER_CRITICAL( ); - for( ;; ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/startup.s b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/startup.s deleted file mode 100644 index d18b35b4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71X/startup.s +++ /dev/null @@ -1,196 +0,0 @@ -/***************************************************************************** - * Copyright (c) 2001, 2002 Rowley Associates Limited. * - * * - * This file may be distributed under the terms of the License Agreement * - * provided with this software. * - * * - * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE * - * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. * - ***************************************************************************** - * WARNING * - ***************************************************************************** - * There have been a lot of modifications to this file for the FreeRTOS port * - * for the following reason: * - * * - * - We need support for the interrupt vectors from the EIC. * - * - The default file did only make a copy of the standard vectors when in * - * FLASH mode. Because in the used EIC configuration the new programm * - * counter value is loaded with a relative offset to the current pc the * - * interrupt vectors must also be available in the RAM. * - * - The clock source configuration did not fit for the specific * - * needs of the author. * - * * - * All modifications copyright (c) 2006, Christian Walter * - *****************************************************************************/ - -#include "FreeRTOSConfig.h" /* import configUSE_PREEMPTION */ - - .equ EIC_BASE, 0xFFFFF800 /* EIC base address. */ - .equ EIC_IVR_OFF, 0x18 /* EIC interrupt vector register. */ - - .section .vectors, "ax" - .code 32 - .align 0 - -/***************************************************************************** - * Exception vectors * - *****************************************************************************/ -_vectors_start: - ldr pc, [pc, #reset_handler_address - . - 8] /* reset */ - ldr pc, [pc, #undef_handler_address - . - 8] /* undefined instruction */ - ldr pc, [pc, #swi_handler_address - . - 8] /* swi handler */ - ldr pc, [pc, #pabort_handler_address - . - 8] /* abort prefetch */ - ldr pc, [pc, #dabort_handler_address - . - 8] /* abort data */ - nop - ldr pc, [pc, #irq_handler_address - . - 8] - ldr pc, [pc, #fiq_handler_address - . - 8] /* fiq */ - -reset_handler_address: .word _reset_handler -undef_handler_address: .word _undef_handler -swi_handler_address: .word vPortYieldProcessor -pabort_handler_address: .word _pabort_handler -dabort_handler_address: .word _dabort_handler -irq_handler_address: .word _irq_handler -fiq_handler_address: .word _fiq_handler - -/******************************************************************************* - * EIC interrupt vectors - ******************************************************************************/ -.global T0TIMI_address -.global T0TIMI_Addr -T0TIMI_Addr: /* for compatibility with STR71X library. */ -T0TIMI_address: .word prvvMBTimerIRQHandler -FLASH_address: .word _undef_IRQhandler -RCCU_address: .word _undef_IRQhandler -RTC_Addr: .word _undef_IRQhandler -#if configUSE_PREEMPTION == 0 -WDG_Addr: .word vPortNonPreemptiveTick -#else -WDG_Addr: .word vPortPreemptiveTick -#endif -XTI_Addr: .word _undef_IRQhandler -USBHP_Addr: .word _undef_IRQhandler -I2C0ITERR_Addr: .word _undef_IRQhandler -I2C1ITERR_ADDR: .word _undef_IRQhandler -UART0_address: .word prvvMBSerialIRQHandler -UART1_Addr: .word _undef_IRQhandler -UART2_ADDR: .word _undef_IRQhandler -UART3_ADDR: .word _undef_IRQhandler -BSPI0_ADDR: .word _undef_IRQhandler -BSPI1_Addr: .word _undef_IRQhandler -I2C0_Addr: .word _undef_IRQhandler -I2C1_Addr: .word _undef_IRQhandler -CAN_Addr: .word _undef_IRQhandler -ADC12_Addr: .word _undef_IRQhandler -T1TIMI_Addr: .word _undef_IRQhandler -T2TIMI_Addr: .word _undef_IRQhandler -T3TIMI_Addr: .word _undef_IRQhandler - .word 0 /* reserved */ - .word 0 /* reserved */ - .word 0 /* reserved */ -HDLC_Addr: .word _undef_IRQhandler -USBLP_Addr: .word _undef_IRQhandler - .word 0 /* reserved */ - .word 0 /* reserved */ -T0TOI_Addr: .word _undef_IRQhandler -T0OC1_Addr: .word _undef_IRQhandler -T0OC2_Addr: .word _undef_IRQhandler -_vectors_end: - -/******************************************************************************* - * If flash execution is used and the RAM is mapped at address 0 we also need - * to place a copy of the interrupt vector address table in the RAM. - ******************************************************************************/ - #ifdef __FLASH_BUILD - .section .vectors_ram, "ax" - .code 32 - .align 0 -_vectors_ram: - .fill _vectors_end - _vectors_start -#endif - -/****************************************************************************** - * Default exception handlers * - ******************************************************************************/ - .section .init, "ax" - .code 32 - .global _reset_handler - .align 0 - -_reset_handler: -#ifdef __FLASH_BUILD - ldr r0, =_vectors_start - ldr r1, =_vectors_end - sub r1, r1, r0 /* r2 = number of bytes to copy */ - ldr r2, =0x20000000 /* r0 = start address to place copy */ -_vector_copy: - ldr r3, [r0], #4 /* read a word from the source */ - str r3, [r2], #4 /* copy the word to destination */ - subs r1, r1, #4 /* decrement number of words to copy */ - bne _vector_copy -#endif - - /* Configure system and jump to the _start entry point. */ - ldr r0, =0x6C000000 - ldr r1, =0x801D - str r1, [r0, #4] /* set up the emi to 1 wait state */ - - ldr r0, =0xA0000000 - ldr r1, =0x1c2 - str r1, [r0, #0x50] /* set up the internal RAM at 0x0 */ - - /* After setup the folling clock configuration will be active. Note - * that the value of CK is dependent on the target oscillator. - * - * CK = 4Mhz - * CLK2 = 2Mhz (with DIV2 = 1) - * RCLK = 16 * CLK2 / 1 = 32Mhz - * MCLK = RCLK - * PCLK1 = RCLK/2 - * PCLK2 = RCLK/2 - */ - - /* set RCLK to 16 * CLK2 / 1 = 32Mhz - * (0x0071 = FREEN=1, FREF_RANGE=1, MX1:0=11b, DX2:0=000b) */ - ldr r1, =0x00F0 - str r1, [r0, #0x18] - - /* (0x8009 = DIV2=1, CK2_16=1, CKU_CKSEL=1) */ - ldr r1, =0x8009 - str r1, [r0, #0x8] - - /* cpu and memory clock div = 1 */ - ldr r1, =0x0 - str r1, [r0, #0x40] - - /* pclk1 = rclk/2 and pclk2 = rclk/2 = 16Mhz - * (0x0101 = FACT2_9:8=01b, FACT1_1:0=01b) */ - ldr r1, =0x0101 - str r1, [r0, #0x44] - - /* Jump to the default C runtime startup code. */ - B _start - -_undef_handler: - b _undef_handler - -_swi_handler: - b vPortYieldProcessor - -_pabort_handler: - b _pabort_handler - -_dabort_handler: - b _dabort_handler - -_irq_handler: - ldr pc, =(EIC_BASE + EIC_IVR_OFF) - -_fiq_handler: - b _fiq_handler - -/****************************************************************************** - * Default IRQ handlers * - ******************************************************************************/ -_undef_IRQhandler: - b _undef_IRQhandler diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/FreeRTOSConfig.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/FreeRTOSConfig.h deleted file mode 100644 index 3a350217..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/FreeRTOSConfig.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - *----------------------------------------------------------*/ - -#define configUSE_PREEMPTION 1 -#define configUSE_IDLE_HOOK 0 -#define configUSE_TICK_HOOK 0 -#define configTICK_RATE_HZ ( ( portTickType ) 1000 ) -#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 100 ) -#define configTOTAL_HEAP_SIZE ( ( size_t ) 4096 ) -#define configMAX_TASK_NAME_LEN ( 16 ) -#define configUSE_TRACE_FACILITY 0 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 - -/* Co-routine definitions. */ -#define configUSE_CO_ROUTINES 0 -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) - -/* Set the following definitions to 1 to include the API function, or zero -to exclude the API function. */ - -#define INCLUDE_vTaskPrioritySet 1 -#define INCLUDE_uxTaskPriorityGet 1 -#define INCLUDE_vTaskDelete 0 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 1 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 - -#endif /* FREERTOS_CONFIG_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/Makefile b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/Makefile deleted file mode 100644 index 7775aba1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/Makefile +++ /dev/null @@ -1,187 +0,0 @@ -# -# FreeModbus STR71X GCC Makefile -# -# Copyright (C) 2006 Christian Walter -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -# -# $Id: Makefile,v 1.1 2006/11/02 23:14:43 wolti Exp $ -# - -# MCU name and submodel -MCU = arm7tdmi -SUBMDL = STR711 -#THUMB = -mthumb -#THUMB_IW = -mthumb-interwork - -## Create ROM-Image (final) -#RUN_MODE=ROM_RUN -## Create RAM-Image (debugging) -RUN_MODE=RAM_RUN - -# --------------------------------------------------------------------------- # -# TARGET ... name of the target executable to generate -# SRC ... C source files ( either THUMB or ARM ) -# SRCARM ... C source files which are always compiled in ARM mode -# CPPSRC ... C++ source files ( either THUMB or ARM ) -# CPPSRCARM ... C++ source files which are always compiled in ARM mode -# --------------------------------------------------------------------------- # - -TARGET = demo -INC = -I. -Iport \ - -Ifreertos/include \ - -Ilibstr71x/include \ - -I../../modbus/include \ - -I../../modbus/rtu \ - -I../../modbus/ascii -SRC = demo.c \ - $(addprefix freertos/, list.c queue.c tasks.c ) \ - $(addprefix freertos/portable/MemMang/, heap_2.c ) \ - $(addprefix freertos/portable/GCC/ARM7_STR71X/, port.c ) \ - $(addprefix libstr71x/, wdg.c rccu.c eic.c tim.c uart.c gpio.c ) \ - $(addprefix ../../modbus/, mb.c ) \ - $(addprefix ../../modbus/rtu/, mbrtu.c mbcrc.c ) \ - $(addprefix ../../modbus/ascii/, mbascii.c ) \ - $(addprefix ../../modbus/functions/, mbfunccoils.c mbfuncdiag.c mbfuncholding.c mbfuncinput.c mbfuncother.c mbfuncdisc.c mbutils.c ) -SRCARM = $(addprefix freertos/portable/GCC/ARM7_STR71X/, portISR.c ) \ - $(addprefix port/, portevent.c portserial.c porttimer.c ) -CPPSRC = -CPPSRCARM = - -AINC = -I. -ASRC = -ASRCARM = $(addprefix system/, startup.S vector.S ) - -# --------------------------------------------------------------------------- # -# This section includes compiler and linker settings. -# --------------------------------------------------------------------------- # -# Flags for C and C++ (arm-elf-gcc/arm-elf-g++) -CPPFLAGS = -gdwarf-2 -O0 -fno-strict-aliasing -CPPFLAGS += -Wall -Wcast-align -Wimplicit -Wpointer-arith -Wswitch -CPPFLAGS += -Wredundant-decls -Wreturn-type -Wshadow -Wunused -CPPFLAGS += -D$(RUN_MODE) -DGCC_ARM7_STR71X=1 -# Flags for C -CFLAGS = $(CPPFLAGS) $(INC) -# Flags for C++ -CCXXFLAGS = $(CFLAGS) - -# Assembler flags. -#ASFLAGS = --defsym $(RUN_MODE)=1 --defsym REMAP=2 --gdwarf-2 -ASFLAGS = -gdwarf-2 -D$(RUN_MODE)=1 -DREMAP=0 $(AINC) - -# Linker flags. -LDFLAGS = -nostartfiles -Wl,-Map=$(TARGET).map,--cref -lc -lgcc -ifeq ($(RUN_MODE),RAM_RUN) -LDFLAGS +=-Tsupport/ram71x.ld -else -LDFLAGS +=-Tsupport/rom71x.ld -endif - -# --------------------------------------------------------------------------- # -# Toolchain setup -# --------------------------------------------------------------------------- # -PREFIX = /opt/gcc-arm/bin -AS = $(PREFIX)/arm-elf-as -CC = $(PREFIX)/arm-elf-gcc -CPP = $(PREFIX)/arm-elf-g++ -OBJCOPY = $(PREFIX)/arm-elf-objcopy -OBJDUMP = $(PREFIX)/arm-elf-objdump -SIZE = $(PREFIX)/arm-elf-size -NM = $(PREFIX)/arm-elf-nm -INSIGHT = $(PREFIX)/arm-elf-insight - -# --------------------------------------------------------------------------- # -# Define all output files and dependencies based upon the specified -# source files. -# --------------------------------------------------------------------------- # -COBJ = $(SRC:.c=.o) -AOBJ = $(ASRC:.S=.o) -COBJARM = $(SRCARM:.c=.o) -AOBJARM = $(ASRCARM:.S=.o) -CPPOBJ = $(CPPSRC:.cpp=.o) -CPPOBJARM = $(CPPSRCARM:.cpp=.o) - -# Flags need to generate dependencies -GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d - -# Combine all necessary flags and optional flags. -ALL_CFLAGS = -mcpu=$(MCU) $(THUMB_IW) $(CFLAGS) $(GENDEPFLAGS) -ALL_ASFLAGS = -mcpu=$(MCU) $(THUMB_IW) $(ASFLAGS) - -# --------------------------------------------------------------------------- # -# Make targets -# --------------------------------------------------------------------------- # - -all: $(TARGET).elf $(TARGET).sym $(TARGET).hex $(TARGET).bin - -# Debug target which invokes the debugger -debug: $(TARGET).hex - $(INSIGHT) --se=$(TARGET).elf --command=support/target-71.gdb - -# Flasg target which downloads the code. -flash: $(TARGET).hex $(TARGET).bin - -%.hex: %.elf - $(OBJCOPY) -O ihex $< $@ - -%.bin: %.elf - $(OBJCOPY) -O binary $< $@ - -%.sym: %.elf - $(NM) -n $< > $@ - -$(TARGET).elf: $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) - $(CC) $(THUMB) $(THUMB_IW) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS) - -# Compile: create object files from C source files. ARM/Thumb -$(COBJ) : %.o : %.c - $(CC) -c $(THUMB) $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@ - -# Compile: create object files from C source files. ARM-only -$(COBJARM) : %.o : %.c - $(CC) -c $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@ - -# Compile: create object files from C++ source files. ARM/Thumb -$(CPPOBJ) : %.o : %.cpp - $(CPP) -c $(THUMB) $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@ - -# Compile: create object files from C++ source files. ARM-only -$(CPPOBJARM) : %.o : %.cpp - $(CPP) -c $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@ - -# Assemble: create object files from assembler source files. ARM/Thumb -$(AOBJ) : %.o : %.S - $(CC) -c $(THUMB) $(ALL_ASFLAGS) $< -o $@ -# $(AS) $(THUMB) $(ALL_ASFLAGS) -o $@ $< - -# Assemble: create object files from assembler source files. ARM-only -$(AOBJARM) : %.o : %.S - $(CC) -c $(ALL_ASFLAGS) $< -o $@ -# $(AS) $(ALL_ASFLAGS) -o $@ $< - -# Target: clean project. -clean: - rm -f $(TARGET).hex $(TARGET).bin $(TARGET).obj $(TARGET).elf $(TARGET).map - rm -f $(TARGET).obj $(TARGET).sym $(TARGET).lss $(TARGET).lst - rm -f $(COBJ) $(CPPOBJ) $(AOBJ) $(COBJARM) $(CPPOBJARM) $(AOBJARM) - rm -f $(SRC:.c=.d) $(SRCARM:.c=.d) $(CPPSRC:.cpp=.d) $(CPPSRCARM:.cpp=.d) - rm -f .dep/* - -# Include the dependency files. --include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) - -# Listing of phony targets. -.PHONY : all clean - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/README.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/README.txt deleted file mode 100644 index 198ff1d6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/README.txt +++ /dev/null @@ -1,120 +0,0 @@ - - FreeModbus STR71X/FreeRTOS/GCC Port - -REQUIREMENTS -============ - -This port is the same as the STR71X port but contains complete startup -scripts, makefiles and debugger scripts to work without the Rowley -Crossworks tools. -On the software side a GCC [1] installation (tested with 4.1.1) is required -together with a working C-Library [2]. If debugging is desired -a Wiggler interface must be present. OpenOCD [3] binaries for Windows -and Linux are provided in the tools directory together with a suitable -configuration. - - [1] ... GNU ARM Homepage http://www.gnuarm.org/ - [2] ... The Newlib Homepage http://sources.redhat.com/newlib - [3] ... OpenOCD homepage http://openocd.berlios.de/web/ - -USAGE -===== - -A makefile is supplied with the demo application and a binary can be -produced by calling 'make all'. A special target 'debug' is provided -which executes the insight debugger. Command line debugging with GDB is -also possible and is described here. After you have compiled the binary -start the OpenOCD daemon in a shell. - -$ ./tools/openocd -f tools/str71x_wig.cfg -Info: openocd.c:82 main(): Open On-Chip Debugger (2006-08-01 12:00 CEST) - -Then start the GDB debugger and continue till you have reached the main -entry point. - -$ arm-elf-gdb -se=demo.elf --command=support/target-71.gdb -GNU gdb 6.5.0.20060626-cvs -... -(gdb) target remote localhost:3333 -Remote debugging using localhost:3333 -0x00000004 in ?? () -(gdb) setup-and-load-ram -requesting target halt and executing a soft reset -software breakpoints enabled -Breakpoint 1 at 0x400011e4: file demo.c, line 53. -Mapped internal SRAM at address 0x00000000 -(gdb) load demo.elf -Loading section .text, size 0x945c lma 0x20000000 -Loading section .rodata, size 0x40c lma 0x2000945c -Loading section .data, size 0x90 lma 0x20009868 -Start address 0x20000000, load size 39160 -Transfer rate: 99170 bits/sec, 495 bytes/write. -(gdb) stepi -_start () at system/startup.S:97 -97 ldr pc, =NextInst -Current language: auto; currently asm -(gdb) c -Continuing. -main () at demo.c:53 -53 RCCU_Div2Config( ENABLE ); -Current language: auto; currently c -(gdb) - -Now you are ready to start or debug the application. If you want to test -your system simply enter 'continue' at the prompt. Now start the Modbus -test application [1] from the 'demo.sh' or 'demo.bat' shell script. You -should see the following output. - -$ ./demo.sh -modpoll - FieldTalk(tm) Modbus(R) Polling Utility -... -Protocol opened successfully. -Polling slave (Ctrl-C to stop) ... -[1000]: 5 -[1001]: 0 -[1002]: 0 -[1003]: 0 - -If this is working then congratulations. The Modbus Stack and the Target -Hardware is ready. - - [1] ... You need the FieldTalk Modpoll Modbus® Polling Tool which you - can get at http://www.focus-sw.com/fieldtalk/modpoll.html. - -FLASH DOWNLOAD -============== - -Flash download is possible with OpenOCD. First edit the Makefile and set -the variable RAM_RUN to ROM_RUN and execute 'make clean' and 'make all'. -Open a telnet connection to your OpenOCD daemon and enter the following -commands at the telnet prompt: - -$ telnet localhost 4444 -Trying 127.0.0.1... -Connected to localhost.localdomain (127.0.0.1). -Escape character is '^]'. -Open On-Chip Debugger -> flash probe 0 -flash 'str7x' found at 0x40000000 -> flash erase 0 0 9 -> flash erase 1 0 3 -> flash write 0 demo.bin 0x0 -wrote file ../demo.bin to flash bank 0 at offset 0x00000000 in 82s 783us - -Now restart the target system and the it with the demo application. It -is also possible to attach a debugger but you are limited to two hardware -breakpoints. Use the same procedure as above but leave out the load step -and replace 'setup-and-load-ram' by 'setup-and-load-rom'. - -COMMON PROBLEMS -=============== -The following list should serve as a checklist where each point must -be satisfied for the port to work. - - - If you have changed the execution mode make sure you have called - 'make clean' - -$Id: README.txt,v 1.2 2006/11/02 23:29:47 wolti Exp $ - -STR71X FreeModbus Port Copyright (c) 2006 Christian Walter. - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/demo.c deleted file mode 100644 index 79f74ef4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/demo.c +++ /dev/null @@ -1,150 +0,0 @@ -/* - * FreeModbus Libary: STR71x Demo Application - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include - -/* ----------------------- Platform includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" - -/* ----------------------- STR71X includes ----------------------------------*/ -#include "rccu.h" -#include "eic.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 - -/* ----------------------- Static variables ---------------------------------*/ -static unsigned short usRegInputStart = REG_INPUT_START; -static unsigned short usRegInputBuf[REG_INPUT_NREGS]; - -/* ----------------------- Static functions ---------------------------------*/ -static void vInitTask( void *pvParameters ); -static void vMeasureTask( void *pvParameters ); - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - RCCU_Div2Config( ENABLE ); - RCCU_PLL1Config( RCCU_PLL1_Mul_16, RCCU_Div_1 ); - RCCU_RCLKSourceConfig( RCCU_PLL1_Output ); - RCCU_MCLKConfig( RCCU_DEFAULT ); - RCCU_PCLKConfig( RCCU_RCLK_2 ); - RCCU_FCLKConfig( RCCU_RCLK_2 ); - - EIC_Init( ); - EIC_IRQConfig( ENABLE ); - - ( void )xTaskCreate( vInitTask, NULL, configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); - vTaskStartScheduler( ); - - return 0; -} - -static void -vInitTask( void *pvParameters ) -{ - const unsigned char ucSlaveIDAdditonal[] = { 0xAA, 0xBB, 0xCC }; - eMBErrorCode eStatus; - - /* Select either ASCII or RTU Mode. */ - eStatus = eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); - assert( eStatus == MB_ENOERR ); - - /* Configure the slave id of the device. */ - eStatus = eMBSetSlaveID( 44, TRUE, ucSlaveIDAdditonal, 3 ); - assert( eStatus == MB_ENOERR ); - - /* Enable the Modbus Protocol Stack. */ - eStatus = eMBEnable( ); - - for( ;; ) - { - /* Call the main polling loop of the Modbus protocol stack. Internally - * the polling loop waits for a new event by calling the port - * dependent function xMBPortEventGet( ). In the FreeRTOS port the - * event layer is built with queues. - */ - ( void )eMBPoll( ); - - /* Here we simply count the number of poll cycles. */ - usRegInputBuf[0]++; - } -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} - -void -__assert( const char *pcFile, int iLineNumber, const char *pcLine ) -{ - portENTER_CRITICAL( ); - for( ;; ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/demo.sh b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/demo.sh deleted file mode 100644 index 76076a9c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/demo.sh +++ /dev/null @@ -1 +0,0 @@ -../../tools/modpoll -m rtu -a 10 -r 1000 -c 4 -t 3 -b 38400 -d 8 -p even /dev/ttyUSB0 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/croutine.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/croutine.c deleted file mode 100644 index dba4bc38..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/croutine.c +++ /dev/null @@ -1,342 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/* Lists for ready and blocked co-routines. --------------------*/ -static xList pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ -static xList xDelayedCoRoutineList1; /*< Delayed co-routines. */ -static xList xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ -static xList * pxDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used. */ -static xList * pxOverflowDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ -static xList xPendingReadyList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ - -/* Other file private variables. --------------------------------*/ -corCRCB * pxCurrentCoRoutine = NULL; -static unsigned portBASE_TYPE uxTopCoRoutineReadyPriority = 0; -static portTickType xCoRoutineTickCount = 0; - -/* The initial state of the co-routine when it is created. */ -#define corINITIAL_STATE ( 0 ) - -/* - * Place the co-routine represented by pxCRCB into the appropriate ready queue - * for the priority. It is inserted at the end of the list. - * - * This macro accesses the co-routine ready lists and therefore must not be - * used from within an ISR. - */ -#define prvAddCoRoutineToReadyQueue( pxCRCB ) \ -{ \ - if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \ - { \ - uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \ -} - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first co-routine. - */ -static void prvInitialiseCoRoutineLists( void ); - -/* - * Co-routines that are readied by an interrupt cannot be placed directly into - * the ready lists (there is no mutual exclusion). Instead they are placed in - * in the pending ready list in order that they can later be moved to the ready - * list by the co-routine scheduler. - */ -static inline void prvCheckPendingReadyList( void ); - -/* - * Macro that looks at the list of co-routines that are currently delayed to - * see if any require waking. - * - * Co-routines are stored in the queue in the order of their wake time - - * meaning once one co-routine has been found whose timer has not expired - * we need not look any further down the list. - */ -static inline void prvCheckDelayedList( void ); - -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex ) -{ -signed portBASE_TYPE xReturn; -corCRCB *pxCoRoutine; - - /* Allocate the memory that will store the co-routine control block. */ - pxCoRoutine = ( corCRCB * ) pvPortMalloc( sizeof( corCRCB ) ); - if( pxCoRoutine ) - { - /* If pxCurrentCoRoutine is NULL then this is the first co-routine to - be created and the co-routine data structures need initialising. */ - if( pxCurrentCoRoutine == NULL ) - { - pxCurrentCoRoutine = pxCoRoutine; - prvInitialiseCoRoutineLists(); - } - - /* Check the priority is within limits. */ - if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES ) - { - uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1; - } - - /* Fill out the co-routine control block from the function parameters. */ - pxCoRoutine->uxState = corINITIAL_STATE; - pxCoRoutine->uxPriority = uxPriority; - pxCoRoutine->uxIndex = uxIndex; - pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; - - /* Initialise all the other co-routine control block parameters. */ - vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) ); - vListInitialiseItem( &( pxCoRoutine->xEventListItem ) ); - - /* Set the co-routine control block as a link back from the xListItem. - This is so we can get back to the containing CRCB from a generic item - in a list. */ - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine ); - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - - /* Now the co-routine has been initialised it can be added to the ready - list at the correct priority. */ - prvAddCoRoutineToReadyQueue( pxCoRoutine ); - - xReturn = pdPASS; - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList ) -{ -portTickType xTimeToWake; - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xCoRoutineTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xCoRoutineTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - - if( pxEventList ) - { - /* Also add the co-routine to an event list. If this is done then the - function must be called with interrupts disabled. */ - vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -static inline void prvCheckPendingReadyList( void ) -{ - /* Are there any co-routines waiting to get moved to the ready list? These - are co-routines that have been readied by an ISR. The ISR cannot access - the ready lists itself. */ - while( !listLIST_IS_EMPTY( &xPendingReadyList ) ) - { - corCRCB *pxUnblockedCRCB; - - /* The pending ready list can be accessed by an ISR. */ - portDISABLE_INTERRUPTS(); - { - pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyList) ); - vListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - } - portENABLE_INTERRUPTS(); - - vListRemove( &( pxUnblockedCRCB->xGenericListItem ) ); - prvAddCoRoutineToReadyQueue( pxUnblockedCRCB ); - } -} -/*-----------------------------------------------------------*/ - -static inline void prvCheckDelayedList( void ) -{ -static portTickType xLastTickCount, xPassedTicks; -corCRCB *pxCRCB; - - xPassedTicks = xTaskGetTickCount() - xLastTickCount; - while( xPassedTicks ) - { - xCoRoutineTickCount++; - xPassedTicks--; - - /* If the tick count has overflowed we need to swap the ready lists. */ - if( xCoRoutineTickCount == 0 ) - { - xList * pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. If there are - any items in pxDelayedCoRoutineList here then there is an error! */ - pxTemp = pxDelayedCoRoutineList; - pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; - pxOverflowDelayedCoRoutineList = pxTemp; - } - - /* See if this tick has made a timeout expire. */ - while( ( pxCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList ) ) != NULL ) - { - if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) ) - { - /* Timeout not yet expired. */ - break; - } - - portDISABLE_INTERRUPTS(); - { - /* The event could have occurred just before this critical - section. If this is the case then the generic list item will - have been moved to the pending ready list and the following - line is still valid. Also the pvContainer parameter will have - been set to NULL so the following lines are also valid. */ - vListRemove( &( pxCRCB->xGenericListItem ) ); - - /* Is the co-routine waiting on an event also? */ - if( pxCRCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxCRCB->xEventListItem ) ); - } - } - portENABLE_INTERRUPTS(); - - prvAddCoRoutineToReadyQueue( pxCRCB ); - } - } - - xLastTickCount = xCoRoutineTickCount; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineSchedule( void ) -{ - /* See if any co-routines readied by events need moving to the ready lists. */ - prvCheckPendingReadyList(); - - /* See if any delayed co-routines have timed out. */ - prvCheckDelayedList(); - - /* Find the highest priority queue that contains ready co-routines. */ - while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) ) - { - if( uxTopCoRoutineReadyPriority == 0 ) - { - /* No more co-routines to check. */ - return; - } - --uxTopCoRoutineReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines - of the same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ); - - /* Call the co-routine. */ - ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex ); - - return; -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseCoRoutineLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyCoRoutineLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedCoRoutineList1 ); - vListInitialise( ( xList * ) &xDelayedCoRoutineList2 ); - vListInitialise( ( xList * ) &xPendingReadyList ); - - /* Start with pxDelayedCoRoutineList using list1 and the - pxOverflowDelayedCoRoutineList using list2. */ - pxDelayedCoRoutineList = &xDelayedCoRoutineList1; - pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList ) -{ -corCRCB *pxUnblockedCRCB; -signed portBASE_TYPE xReturn; - - /* This function is called from within an interrupt. It can only access - event lists and the pending ready list. */ - pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedCRCB->xEventListItem ) ); - - if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority ) - { - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/FreeRTOS.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/FreeRTOS.h deleted file mode 100644 index affc7065..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/FreeRTOS.h +++ /dev/null @@ -1,111 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef INC_FREERTOS_H -#define INC_FREERTOS_H - - -/* - * Include the generic headers required for the FreeRTOS port being used. - */ -#include - -/* Basic FreeRTOS definitions. */ -#include "projdefs.h" - -/* Application specific configuration options. */ -#include "FreeRTOSConfig.h" - -/* Definitions specific to the port being used. */ -#include "portable.h" - - - - - - - -/* - * Check all the required application specific macros have been defined. - * These macros are application specific and (as downloaded) are defined - * within FreeRTOSConfig.h. - */ - -#ifndef configUSE_PREEMPTION - #error Missing definition: configUSE_PREEMPTION should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_IDLE_HOOK - #error Missing definition: configUSE_IDLE_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_TICK_HOOK - #error Missing definition: configUSE_TICK_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_CO_ROUTINES - #error Missing definition: configUSE_CO_ROUTINES should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskPrioritySet - #error Missing definition: INCLUDE_vTaskPrioritySet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_uxTaskPriorityGet - #error Missing definition: INCLUDE_uxTaskPriorityGet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelete - #error Missing definition: INCLUDE_vTaskDelete should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskCleanUpResources - #error Missing definition: INCLUDE_vTaskCleanUpResources should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskSuspend - #error Missing definition: INCLUDE_vTaskSuspend should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelayUntil - #error Missing definition: INCLUDE_vTaskDelayUntil should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelay - #error Missing definition: INCLUDE_vTaskDelay should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_16_BIT_TICKS - #error Missing definition: configUSE_16_BIT_TICKS should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/croutine.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/croutine.h deleted file mode 100644 index f49adc14..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/croutine.h +++ /dev/null @@ -1,713 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ -#ifndef CO_ROUTINE_H -#define CO_ROUTINE_H - -#include "list.h" - -/* Used to hide the implementation of the co-routine control block. The -control block structure however has to be included in the header due to -the macro implementation of the co-routine functionality. */ -typedef void * xCoRoutineHandle; - -/* Defines the prototype to which co-routine functions must conform. */ -typedef void (*crCOROUTINE_CODE)( xCoRoutineHandle, unsigned portBASE_TYPE ); - -typedef struct corCoRoutineControlBlock -{ - crCOROUTINE_CODE pxCoRoutineFunction; - xListItem xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the CRCB in event lists. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ - unsigned portBASE_TYPE uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ - unsigned portSHORT uxState; /*< Used internally by the co-routine implementation. */ -} corCRCB; /* Co-routine control block. Note must be identical in size down to uxPriority with tskTCB. */ - -/** - * croutine. h - *

- portBASE_TYPE xCoRoutineCreate(

-                                 crCOROUTINE_CODE pxCoRoutineCode,

-                                 unsigned portBASE_TYPE uxPriority,

-                                 unsigned portBASE_TYPE uxIndex

-                               );
- * - * Create a new co-routine and add it to the list of co-routines that are - * ready to run. - * - * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine - * functions require special syntax - see the co-routine section of the WEB - * documentation for more information. - * - * @param uxPriority The priority with respect to other co-routines at which - * the co-routine will run. - * - * @param uxIndex Used to distinguish between different co-routines that - * execute the same function. See the example below and the co-routine section - * of the WEB documentation for further information. - * - * @return pdPASS if the co-routine was successfully created and added to a ready - * list, otherwise an error code defined with ProjDefs.h. - * - * Example usage: - 

- // Co-routine to be created.

- void vFlashCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- // This may not be necessary for const variables.

- static const char cLedToFlash[ 2 ] = { 5, 6 };

- static const portTickType xTimeToDelay[ 2 ] = { 200, 400 };

-

-     // Must start every co-routine with a call to crSTART();

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-         // This co-routine just delays for a fixed period, then toggles

-         // an LED.  Two co-routines are created using this function, so

-         // the uxIndex parameter is used to tell the co-routine which

-         // LED to flash and how long to delay.  This assumes xQueue has

-         // already been created.

-         vParTestToggleLED( cLedToFlash[ uxIndex ] );

-         crDELAY( xHandle, uxFlashRates[ uxIndex ] );

-     }

-

-     // Must end every co-routine with a call to crEND();

-     crEND();

- }

-

- // Function that creates two co-routines.

- void vOtherFunction( void )

- {

- unsigned char ucParameterToPass;

- xTaskHandle xHandle;

-		

-     // Create two co-routines at priority 0.  The first is given index 0

-     // so (from the code above) toggles LED 5 every 200 ticks.  The second

-     // is given index 1 so toggles LED 6 every 400 ticks.

-     for( uxIndex = 0; uxIndex < 2; uxIndex++ )

-     {

-         xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );

-     }

- }

-
- * \defgroup xCoRoutineCreate xCoRoutineCreate - * \ingroup Tasks - */ -signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex ); - - -/** - * croutine. h - *

- void vCoRoutineSchedule( void );
- * - * Run a co-routine. - * - * vCoRoutineSchedule() executes the highest priority co-routine that is able - * to run. The co-routine will execute until it either blocks, yields or is - * preempted by a task. Co-routines execute cooperatively so one - * co-routine cannot be preempted by another, but can be preempted by a task. - * - * If an application comprises of both tasks and co-routines then - * vCoRoutineSchedule should be called from the idle task (in an idle task - * hook). - * - * Example usage: - 

- // This idle task hook will schedule a co-routine each time it is called.

- // The rest of the idle task will execute between co-routine calls.

- void vApplicationIdleHook( void )

- {

-	vCoRoutineSchedule();

- }

-

- // Alternatively, if you do not require any other part of the idle task to

- // execute, the idle task hook can call vCoRoutineScheduler() within an

- // infinite loop.

- void vApplicationIdleHook( void )

- {

-    for( ;; )

-    {

-        vCoRoutineSchedule();

-    }

- }

-
- * \defgroup vCoRoutineSchedule vCoRoutineSchedule - * \ingroup Tasks - */ -void vCoRoutineSchedule( void ); - -/** - * croutine. h - * 

- crSTART( xCoRoutineHandle xHandle );
- * - * This macro MUST always be called at the start of a co-routine function. - * - * Example usage: - 

- // Co-routine to be created.

- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- static portLONG ulAVariable;

-

-     // Must start every co-routine with a call to crSTART();

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-          // Co-routine functionality goes here.

-     }

-

-     // Must end every co-routine with a call to crEND();

-     crEND();

- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crSTART( pxCRCB ) switch( ( ( corCRCB * )pxCRCB )->uxState ) { case 0: - -/** - * croutine. h - * 

- crEND();
- * - * This macro MUST always be called at the end of a co-routine function. - * - * Example usage: - 

- // Co-routine to be created.

- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- static portLONG ulAVariable;

-

-     // Must start every co-routine with a call to crSTART();

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-          // Co-routine functionality goes here.

-     }

-

-     // Must end every co-routine with a call to crEND();

-     crEND();

- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crEND() } - -/* - * These macros are intended for internal use by the co-routine implementation - * only. The macros should not be used directly by application writers. - */ -#define crSET_STATE0( xHandle ) ( ( corCRCB * )xHandle)->uxState = (__LINE__ * 2); return; case (__LINE__ * 2): -#define crSET_STATE1( xHandle ) ( ( corCRCB * )xHandle)->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1): - -/** - * croutine. h - *

- crDELAY( xCoRoutineHandle xHandle, portTickType xTicksToDelay );
- * - * Delay a co-routine for a fixed period of time. - * - * crDELAY can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * @param xHandle The handle of the co-routine to delay. This is the xHandle - * parameter of the co-routine function. - * - * @param xTickToDelay The number of ticks that the co-routine should delay - * for. The actual amount of time this equates to is defined by - * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_RATE_MS - * can be used to convert ticks to milliseconds. - * - * Example usage: - 

- // Co-routine to be created.

- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- // This may not be necessary for const variables.

- // We are to delay for 200ms.

- static const xTickType xDelayTime = 200 / portTICK_RATE_MS;

-

-     // Must start every co-routine with a call to crSTART();

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-        // Delay for 200ms.

-        crDELAY( xHandle, xDelayTime );

-

-        // Do something here.

-     }

-

-     // Must end every co-routine with a call to crEND();

-     crEND();

- }
- * \defgroup crDELAY crDELAY - * \ingroup Tasks - */ -#define crDELAY( xHandle, xTicksToDelay ) \ - if( xTicksToDelay > 0 ) \ - { \ - vCoRoutineAddToDelayedList( xTicksToDelay, NULL ); \ - } \ - crSET_STATE0( xHandle ); - -/** - * 

- crQUEUE_SEND(

-                  xCoRoutineHandle xHandle,

-                  xQueueHandle pxQueue,

-                  void *pvItemToQueue,

-                  portTickType xTicksToWait,

-                  portBASE_TYPE *pxResult

-             )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_SEND can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue on which the data will be posted. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvItemToQueue A pointer to the data being posted onto the queue. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied from pvItemToQueue into the queue - * itself. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for space to become available on the queue, should space not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_RATE_MS can be used to convert ticks to milliseconds (see example - * below). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully posted onto the queue, otherwise it will be set to an - * error defined within ProjDefs.h. - * - * Example usage: - 

- // Co-routine function that blocks for a fixed period then posts a number onto

- // a queue.

- static void prvCoRoutineFlashTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- static portBASE_TYPE xNumberToPost = 0;

- static portBASE_TYPE xResult;

-

-    // Co-routines must begin with a call to crSTART().

-    crSTART( xHandle );

-

-    for( ;; )

-    {

-        // This assumes the queue has already been created.

-        crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );

-

-        if( xResult != pdPASS )

-        {

-            // The message was not posted!

-        }

-

-        // Increment the number to be posted onto the queue.

-        xNumberToPost++;

-

-        // Delay for 100 ticks.

-        crDELAY( xHandle, 100 );

-    }

-

-    // Co-routines must end with a call to crEND().

-    crEND();

- }
- * \defgroup crQUEUE_SEND crQUEUE_SEND - * \ingroup Tasks - */ -#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ -{ \ - *pxResult = xQueueCRSend( pxQueue, pvItemToQueue, xTicksToWait ); \ - if( *pxResult == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( xHandle ); \ - *pxResult = xQueueCRSend( pxQueue, pvItemToQueue, 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( xHandle ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 

-  crQUEUE_RECEIVE(

-                     xCoRoutineHandle xHandle,

-                     xQueueHandle pxQueue,

-                     void *pvBuffer,

-                     portTickType xTicksToWait,

-                     portBASE_TYPE *pxResult

-                 )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_RECEIVE can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue from which the data will be received. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvBuffer The buffer into which the received item is to be copied. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied into pvBuffer. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for data to become available from the queue, should data not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_RATE_MS can be used to convert ticks to milliseconds (see the - * crQUEUE_SEND example). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully retrieved from the queue, otherwise it will be set to - * an error code as defined within ProjDefs.h. - * - * Example usage: - 

- // A co-routine receives the number of an LED to flash from a queue.  It

- // blocks on the queue until the number is received.

- static void prvCoRoutineFlashWorkTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- static portBASE_TYPE xResult;

- static unsigned portBASE_TYPE uxLEDToFlash;

-

-    // All co-routines must start with a call to crSTART().

-    crSTART( xHandle );

-

-    for( ;; )

-    {

-        // Wait for data to become available on the queue.

-        crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );

-

-        if( xResult == pdPASS )

-        {

-            // We received the LED to flash - flash it!

-            vParTestToggleLED( uxLEDToFlash );

-        }

-    }

-

-    crEND();

- }
- * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ -{ \ - *pxResult = xQueueCRReceive( pxQueue, pvBuffer, xTicksToWait ); \ - if( *pxResult == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( xHandle ); \ - *pxResult = xQueueCRReceive( pxQueue, pvBuffer, 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( xHandle ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 

-  crQUEUE_SEND_FROM_ISR(

-                            xQueueHandle pxQueue,

-                            void *pvItemToQueue,

-                            portBASE_TYPE xCoRoutinePreviouslyWoken

-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue - * that is being used from within a co-routine. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. - * - * @return pdTRUE if a co-routine was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 

- // A co-routine that blocks on a queue waiting for characters to be received.

- static void vReceivingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- portCHAR cRxedChar;

- portBASE_TYPE xResult;

-

-     // All co-routines must start with a call to crSTART().

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-         // Wait for data to become available on the queue.  This assumes the

-         // queue xCommsRxQueue has already been created!

-         crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );

-

-         // Was a character received?

-         if( xResult == pdPASS )

-         {

-             // Process the character here.

-         }

-     }

-

-     // All co-routines must end with a call to crEND().

-     crEND();

- }

-

- // An ISR that uses a queue to send characters received on a serial port to

- // a co-routine.

- void vUART_ISR( void )

- {

- portCHAR cRxedChar;

- portBASE_TYPE xCRWokenByPost = pdFALSE;

-

-     // We loop around reading characters until there are none left in the UART.

-     while( UART_RX_REG_NOT_EMPTY() )

-     {

-         // Obtain the character from the UART.

-         cRxedChar = UART_RX_REG;

-

-         // Post the character onto a queue.  xCRWokenByPost will be pdFALSE

-         // the first time around the loop.  If the post causes a co-routine

-         // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.

-         // In this manner we can ensure that if more than one co-routine is

-         // blocked on the queue only one is woken by this ISR no matter how

-         // many characters are posted to the queue.

-         xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );

-     }

- }
- * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) - - -/** - * croutine. h - * 

-  crQUEUE_SEND_FROM_ISR(

-                            xQueueHandle pxQueue,

-                            void *pvBuffer,

-                            portBASE_TYPE * pxCoRoutineWoken

-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data - * from a queue that is being used from within a co-routine (a co-routine - * posted to the queue). - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvBuffer A pointer to a buffer into which the received item will be - * placed. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from the queue into - * pvBuffer. - * - * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become - * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a - * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise - * *pxCoRoutineWoken will remain unchanged. - * - * @return pdTRUE an item was successfully received from the queue, otherwise - * pdFALSE. - * - * Example usage: - 

- // A co-routine that posts a character to a queue then blocks for a fixed

- // period.  The character is incremented each time.

- static void vSendingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // cChar holds its value while this co-routine is blocked and must therefore

- // be declared static.

- static portCHAR cCharToTx = 'a';

- portBASE_TYPE xResult;

-

-     // All co-routines must start with a call to crSTART().

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-         // Send the next character to the queue.

-         crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );

-

-         if( xResult == pdPASS )

-         {

-             // The character was successfully posted to the queue.

-         }

-		 else

-		 {

-			// Could not post the character to the queue.

-		 }

-

-         // Enable the UART Tx interrupt to cause an interrupt in this

-		 // hypothetical UART.  The interrupt will obtain the character

-		 // from the queue and send it.

-		 ENABLE_RX_INTERRUPT();

-

-		 // Increment to the next character then block for a fixed period.

-		 // cCharToTx will maintain its value across the delay as it is

-		 // declared static.

-		 cCharToTx++;

-		 if( cCharToTx > 'x' )

-		 {

-			cCharToTx = 'a';

-		 }

-		 crDELAY( 100 );

-     }

-

-     // All co-routines must end with a call to crEND().

-     crEND();

- }

-

- // An ISR that uses a queue to receive characters to send on a UART.

- void vUART_ISR( void )

- {

- portCHAR cCharToTx;

- portBASE_TYPE xCRWokenByPost = pdFALSE;

-

-     while( UART_TX_REG_EMPTY() )

-     {

-         // Are there any characters in the queue waiting to be sent?

-		 // xCRWokenByPost will automatically be set to pdTRUE if a co-routine

-		 // is woken by the post - ensuring that only a single co-routine is

-		 // woken no matter how many times we go around this loop.

-         if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )

-		 {

-			 SEND_CHARACTER( cCharToTx );

-		 }

-     }

- }
- * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( pxQueue, pvBuffer, pxCoRoutineWoken ) - -/* - * This function is intended for internal use by the co-routine macros only. - * The macro nature of the co-routine implementation requires that the - * prototype appears here. The function should not be used by application - * writers. - * - * Removes the current co-routine from its ready list and places it in the - * appropriate delayed list. - */ -void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList ); - -/* - * This function is intended for internal use by the queue implementation only. - * The function should not be used by application writers. - * - * Removes the highest priority co-routine from the event list and places it in - * the pending ready list. - */ -signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList ); - - -#endif /* CO_ROUTINE_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/list.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/list.h deleted file mode 100644 index 8a5b6d04..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/list.h +++ /dev/null @@ -1,270 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - * This is the list implementation used by the scheduler. While it is tailored - * heavily for the schedulers needs, it is also available for use by - * application code. - * - * xLists can only store pointers to xListItems. Each xListItem contains a - * numeric value (xItemValue). Most of the time the lists are sorted in - * descending item value order. - * - * Lists are created already containing one list item. The value of this - * item is the maximum possible that can be stored, it is therefore always at - * the end of the list and acts as a marker. The list member pxHead always - * points to this marker - even though it is at the tail of the list. This - * is because the tail contains a wrap back pointer to the true head of - * the list. - * - * In addition to it's value, each list item contains a pointer to the next - * item in the list (pxNext), a pointer to the list it is in (pxContainer) - * and a pointer to back to the object that contains it. These later two - * pointers are included for efficiency of list manipulation. There is - * effectively a two way link between the object containing the list item and - * the list item itself. - * - * - * \page ListIntroduction List Implementation - * \ingroup FreeRTOSIntro - */ - - -#ifndef LIST_H -#define LIST_H - -/* - * Definition of the only type of object that a list can contain. - */ -struct xLIST_ITEM -{ - portTickType xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ - volatile struct xLIST_ITEM * pxNext; /*< Pointer to the next xListItem in the list. */ - volatile struct xLIST_ITEM * pxPrevious;/*< Pointer to the previous xListItem in the list. */ - void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ - void * pvContainer; /*< Pointer to the list in which this list item is placed (if any). */ -}; -typedef struct xLIST_ITEM xListItem; /* For some reason lint wants this as two separate definitions. */ - -struct xMINI_LIST_ITEM -{ - portTickType xItemValue; - volatile struct xLIST_ITEM *pxNext; - volatile struct xLIST_ITEM *pxPrevious; -}; -typedef struct xMINI_LIST_ITEM xMiniListItem; - -/* - * Definition of the type of queue used by the scheduler. - */ -typedef struct xLIST -{ - volatile unsigned portBASE_TYPE uxNumberOfItems; - volatile xListItem * pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to pvListGetOwnerOfNextEntry (). */ - volatile xMiniListItem xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ -} xList; - -/* - * Access macro to set the owner of a list item. The owner of a list item - * is the object (usually a TCB) that contains the list item. - * - * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( pxListItem )->pvOwner = ( void * ) pxOwner - -/* - * Access macro to set the value of the list item. In most cases the value is - * used to sort the list in descending order. - * - * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( pxListItem )->xItemValue = xValue - -/* - * Access macro the retrieve the value of the list item. The value can - * represent anything - for example a the priority of a task, or the time at - * which a task should be unblocked. - * - * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) - -/* - * Access macro to determine if a list contains any items. The macro will - * only have the value true if the list is empty. - * - * \page listLIST_IS_EMPTY listLIST_IS_EMPTY - * \ingroup LinkedList - */ -#define listLIST_IS_EMPTY( pxList ) ( ( pxList )->uxNumberOfItems == ( unsigned portBASE_TYPE ) 0 ) - -/* - * Access macro to return the number of items in the list. - */ -#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) - -/* - * Access function to obtain the owner of the next entry in a list. - * - * The list member pxIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list - * and returns that entries pxOwner parameter. Using multiple calls to this - * function it is therefore possible to move through every item contained in - * a list. - * - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the next item owner is to be returned. - * - * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ - /* Increment the index to the next item and return the item, ensuring */ \ - /* we don't return the marker used at the end of the list. */ \ - ( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \ - if( ( pxList )->pxIndex == ( xListItem * ) &( ( pxList )->xListEnd ) ) \ - { \ - ( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \ - } \ - pxTCB = ( pxList )->pxIndex->pvOwner - - -/* - * Access function to obtain the owner of the first entry in a list. Lists - * are normally sorted in ascending item value order. - * - * This function returns the pxOwner member of the first item in the list. - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the owner of the head item is to be - * returned. - * - * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( ( pxList->uxNumberOfItems != ( unsigned portBASE_TYPE ) 0 ) ? ( (&( pxList->xListEnd ))->pxNext->pvOwner ) : ( NULL ) ) - -/* - * Check to see if a list item is within a list. The list item maintains a - * "container" pointer that points to the list it is in. All this macro does - * is check to see if the container and the list match. - * - * @param pxList The list we want to know if the list item is within. - * @param pxListItem The list item we want to know if is in the list. - * @return pdTRUE is the list item is in the list, otherwise pdFALSE. - * pointer against - */ -#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( pxListItem )->pvContainer == ( void * ) pxList ) - -/* - * Must be called before a list is used! This initialises all the members - * of the list structure and inserts the xListEnd item into the list as a - * marker to the back of the list. - * - * @param pxList Pointer to the list being initialised. - * - * \page vListInitialise vListInitialise - * \ingroup LinkedList - */ -void vListInitialise( xList *pxList ); - -/* - * Must be called before a list item is used. This sets the list container to - * null so the item does not think that it is already contained in a list. - * - * @param pxItem Pointer to the list item being initialised. - * - * \page vListInitialiseItem vListInitialiseItem - * \ingroup LinkedList - */ -void vListInitialiseItem( xListItem *pxItem ); - -/* - * Insert a list item into a list. The item will be inserted into the list in - * a position determined by its item value (descending item value order). - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The item to that is to be placed in the list. - * - * \page vListInsert vListInsert - * \ingroup LinkedList - */ -void vListInsert( xList *pxList, xListItem *pxNewListItem ); - -/* - * Insert a list item into a list. The item will be inserted in a position - * such that it will be the last item within the list returned by multiple - * calls to listGET_OWNER_OF_NEXT_ENTRY. - * - * The list member pvIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pvIndex to the next item in the list. - * Placing an item in a list using vListInsertEnd effectively places the item - * in the list position pointed to by pvIndex. This means that every other - * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before - * the pvIndex parameter again points to the item being inserted. - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The list item to be inserted into the list. - * - * \page vListInsertEnd vListInsertEnd - * \ingroup LinkedList - */ -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ); - -/* - * Remove an item from a list. The list item has a pointer to the list that - * it is in, so only the list item need be passed into the function. - * - * @param vListRemove The item to be removed. The item will remove itself from - * the list pointed to by it's pxContainer parameter. - * - * \page vListRemove vListRemove - * \ingroup LinkedList - */ -void vListRemove( xListItem *pxItemToRemove ); - - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/portable.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/portable.h deleted file mode 100644 index 92d42e2f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/portable.h +++ /dev/null @@ -1,193 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http:www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http:www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/*----------------------------------------------------------- - * Portable layer API. Each function must be defined for each port. - *----------------------------------------------------------*/ - -#ifndef PORTABLE_H -#define PORTABLE_H - -/* Include the macro file relevant to the port being used. */ - -#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT - #include "..\..\source\portable\owatcom\16bitdos\pc\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT - #include "..\..\source\portable\owatcom\16bitdos\flsh186\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef GCC_MEGA_AVR - #include "../portable/GCC/ATMega323/portmacro.h" -#endif - -#ifdef IAR_MEGA_AVR - #include "../portable/IAR/ATMega323/portmacro.h" -#endif - -#ifdef MPLAB_PIC18F_PORT - #include "..\..\source\portable\MPLAB\PIC18F\portmacro.h" -#endif - -#ifdef _FEDPICC - #include "libFreeRTOS/Include/portmacro.h" -#endif - -#ifdef SDCC_CYGNAL - #include "../../Source/portable/SDCC/Cygnal/portmacro.h" -#endif - -#ifdef GCC_ARM7 - #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" -#endif - -#ifdef GCC_ARM7_STR71X - #include "freertos/portable/GCC/ARM7_STR71X/portmacro.h" -#endif - -#ifdef GCC_MSP430 - #include "../../Source/portable/GCC/MSP430F449/portmacro.h" -#endif - -#ifdef ROWLEY_MSP430 - #include "../../Source/portable/Rowley/MSP430F449/portmacro.h" -#endif - -#ifdef KEIL_ARM7 - #include "..\..\Source\portable\Keil\ARM7\portmacro.h" -#endif - -#ifdef SAM7_GCC - #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" -#endif - -#ifdef SAM7_IAR - #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" -#endif - -#ifdef LPC2000_IAR - #include "..\..\Source\portable\IAR\LPC2000\portmacro.h" -#endif - -#ifdef STR71X_IAR - #include "..\..\Source\portable\IAR\STR71x\portmacro.h" -#endif - -#ifdef STR91X_IAR - #include "..\..\Source\portable\IAR\STR91x\portmacro.h" -#endif - -#ifdef GCC_H8S - #include "../../Source/portable/GCC/H8S2329/portmacro.h" -#endif - -#ifdef GCC_AT91FR40008 - #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" -#endif - -#ifdef RVDS_ARMCM3_LM3S102 - #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h" -#endif - -#ifdef GCC_ARMCM3_LM3S102 - #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" -#endif - -#ifdef IAR_ARMCM3_LM - #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" -#endif - -#ifdef HCS12_CODE_WARRIOR - #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" -#endif - -#ifdef MICROBLAZE_GCC - #include "../../Source/portable/GCC/MicroBlaze/portmacro.h" -#endif - -#ifdef TERN_EE - #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h" -#endif - -#ifdef GCC_HCS12 - #include "../../Source/portable/GCC/HCS12/portmacro.h" -#endif - - -#ifdef BCC_INDUSTRIAL_PC_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\PC\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef BCC_FLASH_LITE_186_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif -/* - * Setup the stack of a new task so it is ready to be placed under the - * scheduler control. The registers have to be placed on the stack in - * the order that the port expects to find them. - */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ); - -/* - * Map to the memory management routines required for the port. - */ -void *pvPortMalloc( size_t xSize ); -void vPortFree( void *pv ); -void vPortInitialiseBlocks( void ); - -/* - * Setup the hardware ready for the scheduler to take control. This generally - * sets up a tick interrupt and sets timers for the correct tick frequency. - */ -portBASE_TYPE xPortStartScheduler( void ); - -/* - * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so - * the hardware is left in its original condition after the scheduler stops - * executing. - */ -void vPortEndScheduler( void ); - - -#endif /* PORTABLE_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/projdefs.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/projdefs.h deleted file mode 100644 index 052e8f0c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/projdefs.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef PROJDEFS_H -#define PROJDEFS_H - -/* Defines to prototype to which task functions must conform. */ -typedef void (*pdTASK_CODE)( void * ); - -#define pdTRUE ( 1 ) -#define pdFALSE ( 0 ) - -#define pdPASS ( 1 ) -#define pdFAIL ( 0 ) -#define errQUEUE_EMPTY ( 0 ) -#define errQUEUE_FULL ( 0 ) - -/* Error definitions. */ -#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) -#define errNO_TASK_TO_RUN ( -2 ) -#define errQUEUE_BLOCKED ( -4 ) -#define errQUEUE_YIELD ( -5 ) - -#endif /* PROJDEFS_H */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/queue.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/queue.h deleted file mode 100644 index 41db1b8d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/queue.h +++ /dev/null @@ -1,471 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef QUEUE_H -#define QUEUE_H - -typedef void * xQueueHandle; - -/** - * queue. h - * 

- xQueueHandle xQueueCreate( 

-                              unsigned portBASE_TYPE uxQueueLength, 

-                              unsigned portBASE_TYPE uxItemSize 

-                          );

- *
- * - * Creates a new queue instance. This allocates the storage required by the - * new queue and returns a handle for the queue. - * - * @param uxQueueLength The maximum number of items that the queue can contain. - * - * @param uxItemSize The number of bytes each item in the queue will require. - * Items are queued by copy, not by reference, so this is the number of bytes - * that will be copied for each posted item. Each item on the queue must be - * the same size. - * - * @return If the queue is successfully create then a handle to the newly - * created queue is returned. If the queue cannot be created then 0 is - * returned. - * - * Example usage: - 

- struct AMessage

- {

-    portCHAR ucMessageID;

-    portCHAR ucData[ 20 ];

- };

-

- void vATask( void *pvParameters )

- {

- xQueueHandle xQueue1, xQueue2;

-

-    // Create a queue capable of containing 10 unsigned long values.

-    xQueue1 = xQueueCreate( 10, sizeof( unsigned portLONG ) );

-    if( xQueue1 == 0 )

-    {

-        // Queue was not created and must not be used.

-    }

-

-    // Create a queue capable of containing 10 pointers to AMessage structures.

-    // These should be passed by pointer as they contain a lot of data.

-    xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );

-    if( xQueue2 == 0 )

-    {

-        // Queue was not created and must not be used.

-    }

-

-    // ... Rest of task code.

- }

-
- * \defgroup xQueueCreate xQueueCreate - * \ingroup QueueManagement - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); - -/** - * queue. h - * 

- portBASE_TYPE xQueueSend( 

-                             xQueueHandle xQueue, 

-                             const void * pvItemToQueue, 

-                             portTickType xTicksToWait 

-                         );

- *
- * - * Post an item on a queue. The item is queued by copy, not by reference. - * This function must not be called from an interrupt service routine. - * See xQueueSendFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0. The - * time is defined in tick periods so the constant portTICK_RATE_MS - * should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 

- struct AMessage

- {

-    portCHAR ucMessageID;

-    portCHAR ucData[ 20 ];

- } xMessage;

-

- unsigned portLONG ulVar = 10UL;

-

- void vATask( void *pvParameters )

- {

- xQueueHandle xQueue1, xQueue2;

- struct AMessage *pxMessage;

-

-    // Create a queue capable of containing 10 unsigned long values.

-    xQueue1 = xQueueCreate( 10, sizeof( unsigned portLONG ) );

-

-    // Create a queue capable of containing 10 pointers to AMessage structures.

-    // These should be passed by pointer as they contain a lot of data.

-    xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );

-

-    // ...

-

-    if( xQueue1 != 0 )

-    {

-        // Send an unsigned long.  Wait for 10 ticks for space to become 

-        // available if necessary.

-        if( xQueueSend( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )

-        {

-            // Failed to post the message, even after 10 ticks.

-        }

-    }

-

-    if( xQueue2 != 0 )

-    {

-        // Send a pointer to a struct AMessage object.  Don't block if the

-        // queue is already full.

-        pxMessage = & xMessage;

-        xQueueSend( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );

-    }

-

-	// ... Rest of task code.

- }

-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueSend( xQueueHandle xQueue, const void * pvItemToQueue, portTickType xTicksToWait ); - -/** - * queue. h - * 

- portBASE_TYPE xQueueReceive( 

-                                xQueueHandle xQueue, 

-                                void *pvBuffer, 

-                                portTickType xTicksToWait 

-                            );
- * - * Receive an item from a queue. The item is received by copy so a buffer of - * adequate size must be provided. The number of bytes copied into the buffer - * was defined when the queue was created. - * - * This function must not be used in an interrupt service routine. See - * xQueueReceiveFromISR for an alternative that can. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. The time is defined in tick periods so the constant - * portTICK_RATE_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 

- struct AMessage

- {

-    portCHAR ucMessageID;

-    portCHAR ucData[ 20 ];

- } xMessage;

-

- xQueueHandle xQueue;

- 

- // Task to create a queue and post a value.

- void vATask( void *pvParameters )

- {

- struct AMessage *pxMessage;

-

-    // Create a queue capable of containing 10 pointers to AMessage structures.

-    // These should be passed by pointer as they contain a lot of data.

-    xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );

-    if( xQueue == 0 )

-    {

-        // Failed to create the queue.

-    }

-

-    // ...

-

-    // Send a pointer to a struct AMessage object.  Don't block if the

-    // queue is already full.

-    pxMessage = & xMessage;

-    xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );

-

-	// ... Rest of task code.

- }

-

- // Task to receive from the queue.

- void vADifferentTask( void *pvParameters )

- {

- struct AMessage *pxRxedMessage;

-

-    if( xQueue != 0 )

-    {

-        // Receive a message on the created queue.  Block for 10 ticks if a

-        // message is not immediately available.

-        if( xQueueReceive( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )

-        {

-            // pcRxedMessage now points to the struct AMessage variable posted

-            // by vATask.

-        }

-    }

-

-	// ... Rest of task code.

- }

-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceive( xQueueHandle xQueue, void *pvBuffer, portTickType xTicksToWait ); - -/** - * queue. h - * 
unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue );
- * - * Return the number of messages stored in a queue. - * - * @param xQueue A handle to the queue being queried. - * - * @return The number of messages available in the queue. - * - * \page uxQueueMessagesWaiting uxQueueMessagesWaiting - * \ingroup QueueManagement - */ -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue ); - -/** - * queue. h - * 
void vQueueDelete( xQueueHandle xQueue );
- * - * Delete a queue - freeing all the memory allocated for storing of items - * placed on the queue. - * - * @param xQueue A handle to the queue to be deleted. - * - * \page vQueueDelete vQueueDelete - * \ingroup QueueManagement - */ -void vQueueDelete( xQueueHandle xQueue ); - -/** - * queue. h - * 

- portBASE_TYPE xQueueSendFromISR( 

-                                    xQueueHandle pxQueue, 

-                                    const void *pvItemToQueue, 

-                                    portBASE_TYPE xTaskPreviouslyWoken 

-                                );

-
- * - * Post an item on a queue. It is safe to use this function from within an - * interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param cTaskPreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. See the file serial .c in the - * PC port for a good example of this mechanism. - * - * @return pdTRUE if a task was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 

- void vBufferISR( void )

- {

- portCHAR cIn;

- portBASE_TYPE xTaskWokenByPost;

-

-    // We have not woken a task at the start of the ISR.

-    cTaskWokenByPost = pdFALSE;

-

-    // Loop until the buffer is empty.

-    do

-    {

-        // Obtain a byte from the buffer.

-        cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );						

-

-        // Post the byte.  The first time round the loop cTaskWokenByPost

-        // will be pdFALSE.  If the queue send causes a task to wake we do

-        // not want the task to run until we have finished the ISR, so

-        // xQueueSendFromISR does not cause a context switch.  Also we 

-        // don't want subsequent posts to wake any other tasks, so we store

-        // the return value back into cTaskWokenByPost so xQueueSendFromISR

-        // knows not to wake any task the next iteration of the loop.

-        xTaskWokenByPost = xQueueSendFromISR( xRxQueue, &cIn, cTaskWokenByPost );

-

-    } while( portINPUT_BYTE( BUFFER_COUNT ) );

-

-    // Now the buffer is empty we can switch context if necessary.

-    if( cTaskWokenByPost )

-    {

-        taskYIELD ();

-    }

- }

-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ); - -/** - * queue. h - * 

- portBASE_TYPE xQueueReceiveFromISR( 

-                                       xQueueHandle pxQueue, 

-                                       void *pvBuffer, 

-                                       portBASE_TYPE *pxTaskWoken 

-                                   ); 

- *
- * - * Receive an item from a queue. It is safe to use this function from within an - * interrupt service routine. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param pxTaskWoken A task may be blocked waiting for space to become - * available on the queue. If xQueueReceiveFromISR causes such a task to - * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will - * remain unchanged. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 

- 

- xQueueHandle xQueue;

- 

- // Function to create a queue and post some values.

- void vAFunction( void *pvParameters )

- {

- portCHAR cValueToPost;

- const portTickType xBlockTime = ( portTickType )0xff;

-

-    // Create a queue capable of containing 10 characters.

-    xQueue = xQueueCreate( 10, sizeof( portCHAR ) );

-    if( xQueue == 0 )

-    {

-        // Failed to create the queue.

-    }

-

-    // ...

-

-    // Post some characters that will be used within an ISR.  If the queue

-    // is full then this task will block for xBlockTime ticks.

-    cValueToPost = 'a';

-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );

-    cValueToPost = 'b';

-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );

-

-    // ... keep posting characters ... this task may block when the queue

-    // becomes full.

-

-    cValueToPost = 'c';

-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );

- }

-

- // ISR that outputs all the characters received on the queue. 

- void vISR_Routine( void )

- {

- portBASE_TYPE xTaskWokenByReceive = pdFALSE;

- portCHAR cRxedChar;

-

-    while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )

-    {

-        // A character was received.  Output the character now.

-        vOutputCharacter( cRxedChar );

-

-        // If removing the character from the queue woke the task that was 

-        // posting onto the queue cTaskWokenByReceive will have been set to

-        // pdTRUE.  No matter how many times this loop iterates only one

-        // task will be woken.

-    }

-

-    if( cTaskWokenByPost != ( portCHAR ) pdFALSE;

-    {

-        taskYIELD ();

-    }

- }

-
- * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - - -/* - * The functions defined above are for passing data to and from tasks. The - * functions below are the equivalents for passing data to and from - * co-rtoutines. - * - * These functions are called from the co-routine macro implementation and - * should not be called directly from application code. Instead use the macro - * wrappers defined within croutine.h. - */ -signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ); -signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); -signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ); -signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/semphr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/semphr.h deleted file mode 100644 index be286475..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/semphr.h +++ /dev/null @@ -1,289 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include "queue.h" - -#ifndef SEMAPHORE_H -#define SEMAPHORE_H - -typedef xQueueHandle xSemaphoreHandle; - -#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( unsigned portCHAR ) 1 ) -#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( unsigned portCHAR ) 0 ) -#define semGIVE_BLOCK_TIME ( ( portTickType ) 0 ) - - -/** - * semphr. h - * 
vSemaphoreCreateBinary( xSemaphoreHandle xSemaphore )
- * - * Macro that implements a semaphore by using the existing queue mechanism. - * The queue length is 1 as this is a binary semaphore. The data size is 0 - * as we don't want to actually store any data - we just want to know if the - * queue is empty or full. - * - * @param xSemaphore Handle to the created semaphore. Should be of type xSemaphoreHandle. - * - * Example usage: - 

- xSemaphoreHandle xSemaphore;

-

- void vATask( void * pvParameters )

- {

-    // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().

-    // This is a macro so pass the variable in directly.

-    vSemaphoreCreateBinary( xSemaphore );

-

-    if( xSemaphore != NULL )

-    {

-        // The semaphore was created successfully.

-        // The semaphore can now be used.  

-    }

- }

-
- * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary - * \ingroup Semaphores - */ -#define vSemaphoreCreateBinary( xSemaphore ) { \ - xSemaphore = xQueueCreate( ( unsigned portCHAR ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH ); \ - if( xSemaphore != NULL ) \ - { \ - xSemaphoreGive( xSemaphore ); \ - } \ - } - -/** - * semphr. h - * xSemaphoreTake( - * xSemaphoreHandle xSemaphore, - * portTickType xBlockTime - * ) - * - * Macro to obtain a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (). - * - * @param xSemaphore A handle to the semaphore being obtained. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @param xBlockTime The time in ticks to wait for the semaphore to become - * available. The macro portTICK_RATE_MS can be used to convert this to a - * real time. A block time of zero can be used to poll the semaphore. - * - * @return pdTRUE if the semaphore was obtained. pdFALSE if xBlockTime - * expired without the semaphore becoming available. - * - * Example usage: - 

- xSemaphoreHandle xSemaphore = NULL;

-

- // A task that creates a semaphore.

- void vATask( void * pvParameters )

- {

-    // Create the semaphore to guard a shared resource.

-    vSemaphoreCreateBinary( xSemaphore );

- }

-

- // A task that uses the semaphore.

- void vAnotherTask( void * pvParameters )

- {

-    // ... Do other things.

-

-    if( xSemaphore != NULL )

-    {

-        // See if we can obtain the semaphore.  If the semaphore is not available

-        // wait 10 ticks to see if it becomes free.	

-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 10 ) == pdTRUE )

-        {

-            // We were able to obtain the semaphore and can now access the

-            // shared resource.

-

-            // ...

-

-            // We have finished accessing the shared resource.  Release the 

-            // semaphore.

-            xSemaphoreGive( xSemaphore );

-        }

-        else

-        {

-            // We could not obtain the semaphore and can therefore not access

-            // the shared resource safely.

-        }

-    }

- }

-
- * \defgroup xSemaphoreTake xSemaphoreTake - * \ingroup Semaphores - */ -#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueReceive( ( xQueueHandle ) xSemaphore, NULL, xBlockTime ) - -/** - * semphr. h - * 
xSemaphoreGive( xSemaphoreHandle xSemaphore )
- * - * Macro to release a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (), and obtained using sSemaphoreTake (). - * - * This must not be used from an ISR. See xSemaphoreGiveFromISR () for - * an alternative which can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @return pdTRUE if the semaphore was released. pdFALSE if an error occurred. - * Semaphores are implemented using queues. An error can occur if there is - * no space on the queue to post a message - indicating that the - * semaphore was not first obtained correctly. - * - * Example usage: - 

- xSemaphoreHandle xSemaphore = NULL;

-

- void vATask( void * pvParameters )

- {

-    // Create the semaphore to guard a shared resource.

-    vSemaphoreCreateBinary( xSemaphore );

-

-    if( xSemaphore != NULL )

-    {

-        if( xSemaphoreGive( xSemaphore ) != pdTRUE )

-        {

-            // We would expect this call to fail because we cannot give

-            // a semaphore without first "taking" it!

-        }

-

-        // Obtain the semaphore - don't block if the semaphore is not

-        // immediately available.

-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 0 ) )

-        {

-            // We now have the semaphore and can access the shared resource.

-

-            // ...

-

-            // We have finished accessing the shared resource so can free the

-            // semaphore.

-            if( xSemaphoreGive( xSemaphore ) != pdTRUE )

-            {

-                // We would not expect this call to fail because we must have

-                // obtained the semaphore to get here.

-            }

-        }

-    }

- }

-
- * \defgroup xSemaphoreGive xSemaphoreGive - * \ingroup Semaphores - */ -#define xSemaphoreGive( xSemaphore ) xQueueSend( ( xQueueHandle ) xSemaphore, NULL, semGIVE_BLOCK_TIME ) - -/** - * semphr. h - * 

- xSemaphoreGiveFromISR( 

-                          xSemaphoreHandle xSemaphore, 

-                          portSHORT sTaskPreviouslyWoken 

-                      )
- * - * Macro to release a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (), and obtained using xSemaphoreTake (). - * - * This macro can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @param sTaskPreviouslyWoken This is included so an ISR can make multiple calls - * to xSemaphoreGiveFromISR () from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. See the file serial .c in the - * PC port for a good example of using xSemaphoreGiveFromISR (). - * - * @return pdTRUE if a task was woken by releasing the semaphore. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 

- #define LONG_TIME 0xffff

- #define TICKS_TO_WAIT	10

- xSemaphoreHandle xSemaphore = NULL;

-

- // Repetitive task.

- void vATask( void * pvParameters )

- {

-    for( ;; )

-    {

-        // We want this task to run every 10 ticks or a timer.  The semaphore 

-        // was created before this task was started

-

-        // Block waiting for the semaphore to become available.

-        if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )

-        {

-            // It is time to execute.

-

-            // ...

-

-            // We have finished our task.  Return to the top of the loop where

-            // we will block on the semaphore until it is time to execute 

-            // again.

-        }

-    }

- }

-

- // Timer ISR

- void vTimerISR( void * pvParameters )

- {

- static unsigned portCHAR ucLocalTickCount = 0;

-

-    // A timer tick has occurred.

-

-    // ... Do other time functions.

-

-    // Is it time for vATask () to run?

-    ucLocalTickCount++;

-    if( ucLocalTickCount >= TICKS_TO_WAIT )

-    {

-        // Unblock the task by releasing the semaphore.

-        xSemaphoreGive( xSemaphore );

-

-        // Reset the count so we release the semaphore again in 10 ticks time.

-        ucLocalTickCount = 0;

-    }

- }

-
- * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR - * \ingroup Semaphores - */ -#define xSemaphoreGiveFromISR( xSemaphore, xTaskPreviouslyWoken ) xQueueSendFromISR( ( xQueueHandle ) xSemaphore, NULL, xTaskPreviouslyWoken ) - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/task.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/task.h deleted file mode 100644 index ca008534..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/include/task.h +++ /dev/null @@ -1,951 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef TASK_H -#define TASK_H - -#include "portable.h" -#include "list.h" - -/*----------------------------------------------------------- - * MACROS AND DEFINITIONS - *----------------------------------------------------------*/ - -#define tskKERNEL_VERSION_NUMBER "V4.1.1" - -/** - * task. h - * - * Type by which tasks are referenced. For example, a call to xTaskCreate - * returns (via a pointer parameter) an xTaskHandle variable that can then - * be used as a parameter to vTaskDelete to delete the task. - * - * \page xTaskHandle xTaskHandle - * \ingroup Tasks - */ -typedef void * xTaskHandle; - -/* - * Used internally only. - */ -typedef struct xTIME_OUT -{ - portBASE_TYPE xOverflowCount; - portTickType xTimeOnEntering; -} xTimeOutType; - -/* - * Defines the priority used by the idle task. This must not be modified. - * - * \ingroup TaskUtils - */ -#define tskIDLE_PRIORITY ( ( unsigned portBASE_TYPE ) 0 ) - -/** - * task. h - * - * Macro for forcing a context switch. - * - * \page taskYIELD taskYIELD - * \ingroup SchedulerControl - */ -#define taskYIELD() portYIELD() - -/** - * task. h - * - * Macro to mark the start of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskENTER_CRITICAL taskENTER_CRITICAL - * \ingroup SchedulerControl - */ -#define taskENTER_CRITICAL() portENTER_CRITICAL() - -/** - * task. h - * - * Macro to mark the end of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskEXIT_CRITICAL taskEXIT_CRITICAL - * \ingroup SchedulerControl - */ -#define taskEXIT_CRITICAL() portEXIT_CRITICAL() - -/** - * task. h - * - * Macro to disable all maskable interrupts. - * - * \page taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS() - -/** - * task. h - * - * Macro to enable microcontroller interrupts. - * - * \page taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS() - - -/*----------------------------------------------------------- - * TASK CREATION API - *----------------------------------------------------------*/ - -/** - * task. h - *

- portBASE_TYPE xTaskCreate(

-                              pdTASK_CODE pvTaskCode,

-                              const portCHAR * const pcName,

-                              unsigned portSHORT usStackDepth,

-                              void *pvParameters,

-                              unsigned portBASE_TYPE uxPriority,

-                              xTaskHandle *pvCreatedTask

-                          );
- * - * Create a new task and add it to the list of tasks that are ready to run. - * - * @param pvTaskCode Pointer to the task entry function. Tasks - * must be implemented to never return (i.e. continuous loop). - * - * @param pcName A descriptive name for the task. This is mainly used to - * facilitate debugging. Max length defined by tskMAX_TASK_NAME_LEN - default - * is 16. - * - * @param usStackDepth The size of the task stack specified as the number of - * variables the stack can hold - not the number of bytes. For example, if - * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes - * will be allocated for stack storage. - * - * @param pvParameters Pointer that will be used as the parameter for the task - * being created. - * - * @param uxPriority The priority at which the task should run. - * - * @param pvCreatedTask Used to pass back a handle by which the created task - * can be referenced. - * - * @return pdPASS if the task was successfully created and added to a ready - * list, otherwise an error code defined in the file errors. h - * - * Example usage: - 

- // Task to be created.

- void vTaskCode( void * pvParameters )

- {

-     for( ;; )

-     {

-         // Task code goes here.

-     }

- }

-

- // Function that creates a task.

- void vOtherFunction( void )

- {

- unsigned char ucParameterToPass;

- xTaskHandle xHandle;

-		

-     // Create the task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );

-		

-     // Use the handle to delete the task.

-     vTaskDelete( xHandle );

- }

-
- * \defgroup xTaskCreate xTaskCreate - * \ingroup Tasks - */ -signed portBASE_TYPE xTaskCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pvCreatedTask ); - -/** - * task. h - * 
void vTaskDelete( xTaskHandle pxTask );
- * - * INCLUDE_vTaskDelete must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Remove a task from the RTOS real time kernels management. The task being - * deleted will be removed from all ready, blocked, suspended and event lists. - * - * NOTE: The idle task is responsible for freeing the kernel allocated - * memory from tasks that have been deleted. It is therefore important that - * the idle task is not starved of microcontroller processing time if your - * application makes any calls to vTaskDelete (). Memory allocated by the - * task code is not automatically freed, and should be freed before the task - * is deleted. - * - * See the demo application file death.c for sample code that utilises - * vTaskDelete (). - * - * @param pxTask The handle of the task to be deleted. Passing NULL will - * cause the calling task to be deleted. - * - * Example usage: - 

- void vOtherFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create the task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-		

-     // Use the handle to delete the task.

-     vTaskDelete( xHandle );

- }

-
- * \defgroup vTaskDelete vTaskDelete - * \ingroup Tasks - */ -void vTaskDelete( xTaskHandle pxTask ); - - -/*----------------------------------------------------------- - * TASK CONTROL API - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskDelay( portTickType xTicksToDelay );
- * - * Delay a task for a given number of ticks. The actual time that the - * task remains blocked depends on the tick rate. The constant - * portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * INCLUDE_vTaskDelay must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * @param xTicksToDelay The amount of time, in tick periods, that - * the calling task should block. - * - * Example usage: - 

- // Wait 10 ticks before performing an action.

- // NOTE:

- // This is for demonstration only and would be better achieved

- // using vTaskDelayUntil ().

- void vTaskFunction( void * pvParameters )

- {

- portTickType xDelay, xNextTime;

-

-     // Calc the time at which we want to perform the action

-     // next.

-     xNextTime = xTaskGetTickCount () + ( portTickType ) 10;

-

-     for( ;; )

-     {

-         xDelay = xNextTime - xTaskGetTickCount ();

-         xNextTime += ( portTickType ) 10;

-

-         // Guard against overflow

-         if( xDelay <= ( portTickType ) 10 )

-         {

-             vTaskDelay( xDelay );

-         }

-

-         // Perform action here.

-     }

- }

-
- * \defgroup vTaskDelay vTaskDelay - * \ingroup TaskCtrl - */ -void vTaskDelay( portTickType xTicksToDelay ); - -/** - * task. h - * 
void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement );
- * - * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Delay a task until a specified time. This function can be used by cyclical - * tasks to ensure a constant execution frequency. - * - * This function differs from vTaskDelay () in one important aspect: vTaskDelay () will - * cause a task to block for the specified number of ticks from the time vTaskDelay () is - * called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed - * execution frequency as the time between a task starting to execute and that task - * calling vTaskDelay () may not be fixed [the task may take a different path though the - * code between calls, or may get interrupted or preempted a different number of times - * each time it executes]. - * - * Whereas vTaskDelay () specifies a wake time relative to the time at which the function - * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to - * unblock. - * - * The constant portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the - * task was last unblocked. The variable must be initialised with the current time - * prior to its first use (see the example below). Following this the variable is - * automatically updated within vTaskDelayUntil (). - * - * @param xTimeIncrement The cycle time period. The task will be unblocked at - * time *pxPreviousWakeTime + xTimeIncrement. Calling vTaskDelayUntil with the - * same xTimeIncrement parameter value will cause the task to execute with - * a fixed interface period. - * - * Example usage: - 

- // Perform an action every 10 ticks.

- void vTaskFunction( void * pvParameters )

- {

- portTickType xLastWakeTime;

- const portTickType xFrequency = 10;

-

-     // Initialise the xLastWakeTime variable with the current time.

-     xLastWakeTime = xTaskGetTickCount ();

-     for( ;; )

-     {

-         // Wait for the next cycle.

-         vTaskDelayUntil( &xLastWakeTime, xFrequency );

-

-         // Perform action here.

-     }

- }

-
- * \defgroup vTaskDelayUntil vTaskDelayUntil - * \ingroup TaskCtrl - */ -void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement ); - -/** - * task. h - * 
unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask );
- * - * INCLUDE_xTaskPriorityGet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Obtain the priority of any task. - * - * @param pxTask Handle of the task to be queried. Passing a NULL - * handle results in the priority of the calling task being returned. - * - * @return The priority of pxTask. - * - * Example usage: - 

- void vAFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create a task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-		

-     // ...

-

-     // Use the handle to obtain the priority of the created task.

-     // It was created with tskIDLE_PRIORITY, but may have changed

-     // it itself.

-     if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )

-     {

-         // The task has changed it's priority.

-     }

-

-     // ...

-

-     // Is our priority higher than the created task?

-     if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )

-     {

-         // Our priority (obtained using NULL handle) is higher.

-     }

- }

-
- * \defgroup uxTaskPriorityGet uxTaskPriorityGet - * \ingroup TaskCtrl - */ -unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ); - -/** - * task. h - * 
void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );
- * - * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Set the priority of any task. - * - * A context switch will occur before the function returns if the priority - * being set is higher than the currently executing task. - * - * @param pxTask Handle to the task for which the priority is being set. - * Passing a NULL handle results in the priority of the calling task being set. - * - * @param uxNewPriority The priority to which the task will be set. - * - * Example usage: - 

- void vAFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create a task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-

-     // ...

-

-     // Use the handle to raise the priority of the created task.

-     vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );

-

-     // ...

-

-     // Use a NULL handle to raise our priority to the same value.

-     vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );

- }

-
- * \defgroup vTaskPrioritySet vTaskPrioritySet - * \ingroup TaskCtrl - */ -void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ); - -/** - * task. h - * 
void vTaskSuspend( xTaskHandle pxTaskToSuspend );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Suspend any task. When suspended a task will never get any microcontroller - * processing time, no matter what its priority. - * - * Calls to vTaskSuspend are not accumulative - - * i.e. calling vTaskSuspend () twice on the same task still only requires one - * call to vTaskResume () to ready the suspended task. - * - * @param pxTaskToSuspend Handle to the task being suspended. Passing a NULL - * handle will cause the calling task to be suspended. - * - * Example usage: - 

- void vAFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create a task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-		

-     // ...

-

-     // Use the handle to suspend the created task.

-     vTaskSuspend( xHandle );

-

-     // ...

-		

-     // The created task will not run during this period, unless

-     // another task calls vTaskResume( xHandle ).

-		

-     //...

-		

-

-     // Suspend ourselves.

-     vTaskSuspend( NULL );

-

-     // We cannot get here unless another task calls vTaskResume

-     // with our handle as the parameter.

- }

-
- * \defgroup vTaskSuspend vTaskSuspend - * \ingroup TaskCtrl - */ -void vTaskSuspend( xTaskHandle pxTaskToSuspend ); - -/** - * task. h - * 
void vTaskResume( xTaskHandle pxTaskToResume );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Resumes a suspended task. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * vTaskResume (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * Example usage: - 

- void vAFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create a task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-		

-     // ...

-

-     // Use the handle to suspend the created task.

-     vTaskSuspend( xHandle );

-

-     // ...

-	

-     // The created task will not run during this period, unless

-     // another task calls vTaskResume( xHandle ).

-		

-     //...

-		

-

-     // Resume the suspended task ourselves.

-     vTaskResume( xHandle );

-

-     // The created task will once again get microcontroller processing

-     // time in accordance with it priority within the system.

- }

-
- * \defgroup vTaskResume vTaskResume - * \ingroup TaskCtrl - */ -void vTaskResume( xTaskHandle pxTaskToResume ); - -/** - * task. h - * 
void xTaskResumeFromISR( xTaskHandle pxTaskToResume );
- * - * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be - * available. See the configuration section for more information. - * - * An implementation of vTaskResume() that can be called from within an ISR. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * xTaskResumeFromISR (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * \defgroup vTaskResumeFromISR vTaskResumeFromISR - * \ingroup TaskCtrl - */ -portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ); - -/*----------------------------------------------------------- - * SCHEDULER CONTROL - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskStartScheduler( void );
- * - * Starts the real time kernel tick processing. After calling the kernel - * has control over which tasks are executed and when. This function - * does not return until an executing task calls vTaskEndScheduler (). - * - * At least one task should be created via a call to xTaskCreate () - * before calling vTaskStartScheduler (). The idle task is created - * automatically when the first application task is created. - * - * See the demo application file main.c for an example of creating - * tasks and starting the kernel. - * - * Example usage: - 

- void vAFunction( void )

- {

-     // Create at least one task before starting the kernel.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );

-

-     // Start the real time kernel with preemption.

-     vTaskStartScheduler ();

-

-     // Will not get here unless a task calls vTaskEndScheduler ()

- }

-
- * - * \defgroup vTaskStartScheduler vTaskStartScheduler - * \ingroup SchedulerControl - */ -void vTaskStartScheduler( void ); - -/** - * task. h - * 
void vTaskEndScheduler( void );
- * - * Stops the real time kernel tick. All created tasks will be automatically - * deleted and multitasking (either preemptive or cooperative) will - * stop. Execution then resumes from the point where vTaskStartScheduler () - * was called, as if vTaskStartScheduler () had just returned. - * - * See the demo application file main. c in the demo/PC directory for an - * example that uses vTaskEndScheduler (). - * - * vTaskEndScheduler () requires an exit function to be defined within the - * portable layer (see vPortEndScheduler () in port. c for the PC port). This - * performs hardware specific operations such as stopping the kernel tick. - * - * vTaskEndScheduler () will cause all of the resources allocated by the - * kernel to be freed - but will not free resources allocated by application - * tasks. - * - * Example usage: - 

- void vTaskCode( void * pvParameters )

- {

-     for( ;; )

-     {

-         // Task code goes here.

-

-         // At some point we want to end the real time kernel processing

-         // so call ...

-         vTaskEndScheduler ();

-     }

- }

-

- void vAFunction( void )

- {

-     // Create at least one task before starting the kernel.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );

-

-     // Start the real time kernel with preemption.

-     vTaskStartScheduler ();

-

-     // Will only get here when the vTaskCode () task has called

-     // vTaskEndScheduler ().  When we get here we are back to single task

-     // execution.

- }

-
- * - * \defgroup vTaskEndScheduler vTaskEndScheduler - * \ingroup SchedulerControl - */ -void vTaskEndScheduler( void ); - -/** - * task. h - * 
void vTaskSuspendAll( void );
- * - * Suspends all real time kernel activity while keeping interrupts (including the - * kernel tick) enabled. - * - * After calling vTaskSuspendAll () the calling task will continue to execute - * without risk of being swapped out until a call to xTaskResumeAll () has been - * made. - * - * Example usage: - 

- void vTask1( void * pvParameters )

- {

-     for( ;; )

-     {

-         // Task code goes here.

-

-         // ...

-

-         // At some point the task wants to perform a long operation during

-         // which it does not want to get swapped out.  It cannot use

-         // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the

-         // operation may cause interrupts to be missed - including the

-         // ticks.

-

-         // Prevent the real time kernel swapping out the task.

-         vTaskSuspendAll ();

-

-         // Perform the operation here.  There is no need to use critical

-         // sections as we have all the microcontroller processing time.

-         // During this time interrupts will still operate and the kernel

-         // tick count will be maintained.

-

-         // ...

-

-         // The operation is complete.  Restart the kernel.

-         xTaskResumeAll ();

-     }

- }

-
- * \defgroup vTaskSuspendAll vTaskSuspendAll - * \ingroup SchedulerControl - */ -void vTaskSuspendAll( void ); - -/** - * task. h - * 
portCHAR xTaskResumeAll( void );
- * - * Resumes real time kernel activity following a call to vTaskSuspendAll (). - * After a call to vTaskSuspendAll () the kernel will take control of which - * task is executing at any time. - * - * @return If resuming the scheduler caused a context switch then pdTRUE is - * returned, otherwise pdFALSE is returned. - * - * Example usage: - 

- void vTask1( void * pvParameters )

- {

-     for( ;; )

-     {

-         // Task code goes here.

-

-         // ...

-

-         // At some point the task wants to perform a long operation during

-         // which it does not want to get swapped out.  It cannot use

-         // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the

-         // operation may cause interrupts to be missed - including the

-         // ticks.

-

-         // Prevent the real time kernel swapping out the task.

-         vTaskSuspendAll ();

-

-         // Perform the operation here.  There is no need to use critical

-         // sections as we have all the microcontroller processing time.

-         // During this time interrupts will still operate and the real

-         // time kernel tick count will be maintained.

-

-         // ...

-

-         // The operation is complete.  Restart the kernel.  We want to force

-         // a context switch - but there is no point if resuming the scheduler

-         // caused a context switch already.

-         if( !xTaskResumeAll () )

-         {

-              taskYIELD ();

-         }

-     }

- }

-
- * \defgroup xTaskResumeAll xTaskResumeAll - * \ingroup SchedulerControl - */ -signed portBASE_TYPE xTaskResumeAll( void ); - - -/*----------------------------------------------------------- - * TASK UTILITIES - *----------------------------------------------------------*/ - -/** - * task. h - * 
volatile portTickType xTaskGetTickCount( void );
- * - * @return The count of ticks since vTaskStartScheduler was called. - * - * \page xTaskGetTickCount xTaskGetTickCount - * \ingroup TaskUtils - */ -portTickType xTaskGetTickCount( void ); - -/** - * task. h - * 
unsigned portSHORT uxTaskGetNumberOfTasks( void );
- * - * @return The number of tasks that the real time kernel is currently managing. - * This includes all ready, blocked and suspended tasks. A task that - * has been deleted but not yet freed by the idle task will also be - * included in the count. - * - * \page uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks - * \ingroup TaskUtils - */ -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ); - -/** - * task. h - * 
void vTaskList( portCHAR *pcWriteBuffer );
- * - * configUSE_TRACE_FACILITY, INCLUDE_vTaskDelete and INCLUDE_vTaskSuspend - * must all be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * NOTE: This function will disable interrupts for its duration. It is - * not intended for normal application runtime use but as a debug aid. - * - * Lists all the current tasks, along with their current state and stack - * usage high water mark. - * - * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or - * suspended ('S'). - * - * @param pcWriteBuffer A buffer into which the above mentioned details - * will be written, in ascii form. This buffer is assumed to be large - * enough to contain the generated report. Approximately 40 bytes per - * task should be sufficient. - * - * \page vTaskList vTaskList - * \ingroup TaskUtils - */ -void vTaskList( signed portCHAR *pcWriteBuffer ); - -/** - * task. h - * 
void vTaskStartTrace( portCHAR * pcBuffer, unsigned portBASE_TYPE uxBufferSize );
- * - * Starts a real time kernel activity trace. The trace logs the identity of - * which task is running when. - * - * The trace file is stored in binary format. A separate DOS utility called - * convtrce.exe is used to convert this into a tab delimited text file which - * can be viewed and plotted in a spread sheet. - * - * @param pcBuffer The buffer into which the trace will be written. - * - * @param ulBufferSize The size of pcBuffer in bytes. The trace will continue - * until either the buffer in full, or ulTaskEndTrace () is called. - * - * \page vTaskStartTrace vTaskStartTrace - * \ingroup TaskUtils - */ -void vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize ); - -/** - * task. h - * 
unsigned portLONG ulTaskEndTrace( void );
- * - * Stops a kernel activity trace. See vTaskStartTrace (). - * - * @return The number of bytes that have been written into the trace buffer. - * - * \page usTaskEndTrace usTaskEndTrace - * \ingroup TaskUtils - */ -unsigned portLONG ulTaskEndTrace( void ); - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - *----------------------------------------------------------*/ - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Called from the real time kernel tick (either preemptive or cooperative), - * this increments the tick count and checks if any tasks that are blocked - * for a finite period required removing from a blocked list and placing on - * a ready list. - */ -inline void vTaskIncrementTick( void ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes the calling task from the ready list and places it both - * on the list of tasks waiting for a particular event, and the - * list of delayed tasks. The task will be removed from both lists - * and replaced on the ready list should either the event occur (and - * there be no higher priority tasks waiting on the same event) or - * the delay period expires. - * - * @param pxEventList The list containing tasks that are blocked waiting - * for the event to occur. - * - * @param xTicksToWait The maximum amount of time that the task should wait - * for the event to occur. This is specified in kernel ticks,the constant - * portTICK_RATE_MS can be used to convert kernel ticks into a real time - * period. - */ -void vTaskPlaceOnEventList( xList *pxEventList, portTickType xTicksToWait ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes a task from both the specified event list and the list of blocked - * tasks, and places it on a ready queue. - * - * xTaskRemoveFromEventList () will be called if either an event occurs to - * unblock a task, or the block timeout period expires. - * - * @return pdTRUE if the task being removed has a higher priority than the task - * making the call, otherwise pdFALSE. - */ -signed portBASE_TYPE xTaskRemoveFromEventList( const xList *pxEventList ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * INCLUDE_vTaskCleanUpResources and INCLUDE_vTaskSuspend must be defined as 1 - * for this function to be available. - * See the configuration section for more information. - * - * Empties the ready and delayed queues of task control blocks, freeing the - * memory allocated for the task control block and task stacks as it goes. - */ -void vTaskCleanUpResources( void ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Sets the pointer to the current TCB to the TCB of the highest priority task - * that is ready to run. - */ -inline void vTaskSwitchContext( void ); - -/* - * Return the handle of the calling task. - */ -xTaskHandle xTaskGetCurrentTaskHandle( void ); - -/* - * Capture the current time status for future reference. - */ -void vTaskSetTimeOutState( xTimeOutType *pxTimeOut ); - -/* - * Compare the time status now with that previously captured to see if the - * timeout has expired. - */ -portBASE_TYPE xTaskCheckForTimeOut( xTimeOutType *pxTimeOut, portTickType *pxTicksToWait ); - -/* - * Shortcut used by the queue implementation to prevent unnecessary call to - * taskYIELD(); - */ -void vTaskMissedYield( void ); - -#endif /* TASK_H */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/list.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/list.c deleted file mode 100644 index 8efc2e33..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/list.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.2.0 - - + Removed the volatile modifier from the function parameters. This was - only ever included to prevent compiler warnings. Now warnings are - removed by casting parameters where the calls are made. - - + prvListGetOwnerOfNextEntry() and prvListGetOwnerOfHeadEntry() have been - removed from the c file and added as macros to the h file. - - + uxNumberOfItems has been added to the list structure. This removes the - need for a pointer comparison when checking if a list is empty, and so - is slightly faster. - - + Removed the NULL check in vListRemove(). This makes the call faster but - necessitates any application code utilising the list implementation to - ensure NULL pointers are not passed. - -Changes from V2.0.0 - - + Double linked the lists to allow faster removal item removal. - -Changes from V2.6.1 - - + Make use of the new portBASE_TYPE definition where ever appropriate. - -Changes from V3.0.0 - - + API changes as described on the FreeRTOS.org WEB site. - -Changes from V3.2.4 - - + Removed the pxHead member of the xList structure. This always pointed - to the same place so has been removed to free a few bytes of RAM. - - + Introduced the xMiniListItem structure that does not include the - xListItem members that are not required by the xListEnd member of a list. - Again this was done to reduce RAM usage. - - + Changed the volatile definitions of some structure members to clean up - the code where the list structures are used. - -Changes from V4.0.4 - - + Optimised vListInsert() in the case when the wake time is the maximum - tick count value. -*/ - -#include -#include "FreeRTOS.h" -#include "list.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -void vListInitialise( xList *pxList ) -{ - /* The list structure contains a list item which is used to mark the - end of the list. To initialise the list the list end is inserted - as the only list entry. */ - pxList->pxIndex = ( xListItem * ) &( pxList->xListEnd ); - - /* The list end value is the highest possible value in the list to - ensure it remains at the end of the list. */ - pxList->xListEnd.xItemValue = portMAX_DELAY; - - /* The list end next and previous pointers point to itself so we know - when the list is empty. */ - pxList->xListEnd.pxNext = ( xListItem * ) &( pxList->xListEnd ); - pxList->xListEnd.pxPrevious = ( xListItem * ) &( pxList->xListEnd ); - - pxList->uxNumberOfItems = 0; -} -/*-----------------------------------------------------------*/ - -void vListInitialiseItem( xListItem *pxItem ) -{ - /* Make sure the list item is not recorded as being on a list. */ - pxItem->pvContainer = NULL; -} -/*-----------------------------------------------------------*/ - -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem * pxIndex; - - /* Insert a new list item into pxList, but rather than sort the list, - makes the new list item the last item to be removed by a call to - pvListGetOwnerOfNextEntry. This means it has to be the item pointed to by - the pxIndex member. */ - pxIndex = pxList->pxIndex; - - pxNewListItem->pxNext = pxIndex->pxNext; - pxNewListItem->pxPrevious = pxList->pxIndex; - pxIndex->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxIndex->pxNext = ( volatile xListItem * ) pxNewListItem; - pxList->pxIndex = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListInsert( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem *pxIterator; -portTickType xValueOfInsertion; - - /* Insert the new list item into the list, sorted in ulListItem order. */ - xValueOfInsertion = pxNewListItem->xItemValue; - - /* If the list already contains a list item with the same item value then - the new list item should be placed after it. This ensures that TCB's which - are stored in ready lists (all of which have the same ulListItem value) - get an equal share of the CPU. However, if the xItemValue is the same as - the back marker the iteration loop below will not end. This means we need - to guard against this by checking the value first and modifying the - algorithm slightly if necessary. */ - if( xValueOfInsertion == portMAX_DELAY ) - { - pxIterator = pxList->xListEnd.pxPrevious; - } - else - { - for( pxIterator = ( xListItem * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) - { - /* There is nothing to do here, we are just iterating to the - wanted insertion position. */ - } - } - - pxNewListItem->pxNext = pxIterator->pxNext; - pxNewListItem->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxNewListItem->pxPrevious = pxIterator; - pxIterator->pxNext = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. This allows fast removal of the - item later. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListRemove( xListItem *pxItemToRemove ) -{ -xList * pxList; - - pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; - pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; - - /* The list item knows which list it is in. Obtain the list from the list - item. */ - pxList = ( xList * ) pxItemToRemove->pvContainer; - - /* Make sure the index is left pointing to a valid item. */ - if( pxList->pxIndex == pxItemToRemove ) - { - pxList->pxIndex = pxItemToRemove->pxPrevious; - } - - pxItemToRemove->pvContainer = NULL; - ( pxList->uxNumberOfItems )--; -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/GCC/ARM7_STR71X/port.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/GCC/ARM7_STR71X/port.c deleted file mode 100644 index 5fd7a657..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/GCC/ARM7_STR71X/port.c +++ /dev/null @@ -1,186 +0,0 @@ -/* - FreeRTOS V4.1.1 - Copyright (C) 2003-2005 Richard Barry. - Modification for STR71X/GCC - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* ----------------------- Standard includes --------------------------------*/ -#include - -/* ----------------------- FreeRTOS includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- System includes ----------------------------------*/ -#include "eic.h" -#include "wdg.h" - -#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */ -#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 ) -#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 ) -#define portNO_CRITICAL_SECTION_NESTING \ - ( ( portSTACK_TYPE ) 0 ) - -/* ----------------------- Prototypes ---------------------------------------*/ - -/* Setup the timer to generate the tick interrupts. */ -static void prvSetupTimerInterrupt( void ); - -/* The scheduler can only be started from ARM mode, so - * vPortISRStartFirstSTask() is defined in portISR.c. - */ -extern void vPortISRStartFirstTask( void ); - -/* ----------------------- Start Implementation -----------------------------*/ -/* - * Initialise the stack of a task to look exactly as if a call to - * portSAVE_CONTEXT had been called. - * - * See header file for description. - */ -portSTACK_TYPE * -pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) -{ - portSTACK_TYPE *pxOriginalTOS; - - pxOriginalTOS = pxTopOfStack; - - /* Setup the initial stack of the task. The stack is set exactly as - * expected by the portRESTORE_CONTEXT() macro. - */ - - /* First on the stack is the return address - which in this case is the - * start of the task. The offset is added to make the return address appear - * as it would within an IRQ ISR. - */ - *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; - pxTopOfStack--; - - *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */ - pxTopOfStack--; - - /* When the task starts is will expect to find the function parameter in - * R0. - */ - *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */ - pxTopOfStack--; - - /* The last thing onto the stack is the status register, which is set for - * system mode, with interrupts enabled. - */ - *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR; - -#ifdef THUMB_INTERWORK - { - /* We want the task to start in thumb mode. */ - *pxTopOfStack |= portTHUMB_MODE_BIT; - } -#endif - - pxTopOfStack--; - - /* Some optimisation levels use the stack differently to others. This - * means the interrupt flags cannot always be stored on the stack and will - * instead be stored in a variable, which is then saved as part of the - * tasks context. - */ - *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING; - - return pxTopOfStack; -} - -portBASE_TYPE -xPortStartScheduler( void ) -{ - /* Start the timer that generates the tick ISR. Interrupts are disabled - here already. */ - prvSetupTimerInterrupt( ); - - /* Start the first task. */ - vPortISRStartFirstTask( ); - - /* Should not get here! */ - return 0; -} - -void -vPortEndScheduler( void ) -{ - /* It is unlikely that the ARM port will require this function as there - is nothing to return to. */ -} - -/* - * Setup timer 3 to generate ticks at the required frequency. - */ -static void -prvSetupTimerInterrupt( void ) -{ - /* Set the watchdog up to generate a periodic tick. */ - WDG_ECITConfig( DISABLE ); - WDG_CntOnOffConfig( DISABLE ); - WDG_PeriodValueConfig( configTICK_RATE_HZ ); - - /* Setup the tick interrupt in the EIC. */ - EIC_IRQChannelPriorityConfig( WDG_IRQChannel, 1 ); - EIC_IRQChannelConfig( WDG_IRQChannel, ENABLE ); - EIC_IRQConfig( ENABLE ); - WDG_ECITConfig( ENABLE ); - - /* Start the timer - interrupts are actually disabled at this point so - it is safe to do this here. */ - WDG_CntOnOffConfig( ENABLE ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/GCC/ARM7_STR71X/portISR.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/GCC/ARM7_STR71X/portISR.c deleted file mode 100644 index c86ee488..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/GCC/ARM7_STR71X/portISR.c +++ /dev/null @@ -1,213 +0,0 @@ -/* - FreeRTOS V4.1.1 - Copyright (C) 2003-2005 Richard Barry. - Modification for STR71X/GCC - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* ----------------------- FreeRTOS includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- System includes ----------------------------------*/ -#include "eic.h" -#include "wdg.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define portNO_CRITICAL_NESTING \ - ( ( unsigned portLONG ) 0 ) - -/* ----------------------- Prototypes ---------------------------------------*/ - -/* ISR to handle manual context switches (from a call to taskYIELD()). */ -void vPortYieldProcessor( void ) __attribute__ ( ( interrupt( "SWI" ), naked ) ); - -/* The scheduler can only be started from ARM mode, hence the inclusion of this - * function here. - */ -void vPortISRStartFirstTask( void ); - -/* ----------------------- Global variables ---------------------------------*/ -extern const portSHORT portTimerOCRDeltaValue; -volatile unsigned portLONG ulCriticalNesting = 9999UL; - -/* ----------------------- Start implementation -----------------------------*/ - -void -vPortISRStartFirstTask( void ) -{ - /* Simply start the scheduler. This is included here as it can only be - * called from ARM mode. - */ - portRESTORE_CONTEXT( ); -} - -/* - * Called by portYIELD() or taskYIELD() to manually force a context switch. - * - * When a context switch is performed from the task level the saved task - * context is made to look as if it occurred from within the tick ISR. This - * way the same restore context function can be used when restoring the context - * saved from the ISR or that saved from a call to vPortYieldProcessor. - */ -void -vPortYieldProcessor( void ) -{ - /* Within an IRQ ISR the link register has an offset from the true return - address, but an SWI ISR does not. Add the offset manually so the same - ISR return code can be used in both cases. */ - asm volatile ( "ADD LR, LR, #4" ); - - /* Perform the context switch. First save the context of the current task. */ - portSAVE_CONTEXT( ); - - /* Find the highest priority task that is ready to run. */ - vTaskSwitchContext( ); - - /* Restore the context of the new task. */ - portRESTORE_CONTEXT( ); -} - -/* - * The ISR used for the scheduler tick depends on whether the cooperative or - * the preemptive scheduler is being used. - */ -#if configUSE_PREEMPTION == 0 - -/* The cooperative scheduler requires a normal IRQ service routine to - * simply increment the system tick. - */ -void vPortNonPreemptiveTick( void ) __attribute__ ( ( interrupt( "IRQ" ) ) ); -void -vPortNonPreemptiveTick( void ) -{ - vTaskIncrementTick( ); - - /* Clear the interrupt in the watchdog and EIC. */ - WDG->SR = 0x0000; - /* clear current interrupt pending flag for interupt source. */ - EIC->IPR |= 1 << EIC_CurrentIRQChannelValue( ); -} - -#else - -/* The preemptive scheduler is defined as "naked" as the full context is - * saved on entry as part of the context switch. - */ -void vPortPreemptiveTick( void ) __attribute__ ( ( naked ) ); -void -vPortPreemptiveTick( void ) -{ - /* Save the context of the interrupted task. */ - portSAVE_CONTEXT( ); - - /* Increment the RTOS tick count, then look for the highest priority - * task that is ready to run. - */ - vTaskIncrementTick( ); - vTaskSwitchContext( ); - - /* Clear the interrupt in the watchdog and EIC. */ - WDG->SR = 0x0000; - /* clear current interrupt pending flag for interupt source. */ - EIC->IPR |= 1 << EIC_CurrentIRQChannelValue( ); - - /* Restore the context of the new task. */ - portRESTORE_CONTEXT( ); -} - -#endif - - -void -vPortDisableInterrupts( void ) -{ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ - asm volatile ( "ORR R0, R0, #0xC0" ); /* Disable IRQ, FIQ. */ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ - asm volatile ( "LDMIA SP!, {R0}" ); /* Pop R0. */ - asm volatile ( "BX R14" ); /* Return back to thumb. */ -} - -void -vPortEnableInterrupts( void ) -{ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ - asm volatile ( "BIC R0, R0, #0xC0" ); /* Enable IRQ, FIQ. */ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ - asm volatile ( "LDMIA SP!, {R0}" ); /* Pop R0. */ - asm volatile ( "BX R14" ); /* Return back to thumb. */ -} - -/* The code generated by the GCC compiler uses the stack in different ways at - * different optimisation levels. The interrupt flags can therefore not always - * be saved to the stack. Instead the critical section nesting level is stored - * in a variable, which is then saved as part of the stack context. - */ -void -vPortEnterCritical( void ) -{ - /* Disable interrupts as per portDISABLE_INTERRUPTS(); */ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ - asm volatile ( "ORR R0, R0, #0xC0" ); /* Disable IRQ, FIQ. */ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ - asm volatile ( "LDMIA SP!, {R0}" ); /* Pop R0. */ - - /* Now interrupts are disabled ulCriticalNesting can be accessed - * directly. Increment ulCriticalNesting to keep a count of how many times - * portENTER_CRITICAL() has been called. - */ - ulCriticalNesting++; -} - -void -vPortExitCritical( void ) -{ - if( ulCriticalNesting > portNO_CRITICAL_NESTING ) - { - /* Decrement the nesting count as we are leaving a critical section. */ - ulCriticalNesting--; - - /* If the nesting level has reached zero then interrupts should be - * re-enabled. - */ - if( ulCriticalNesting == portNO_CRITICAL_NESTING ) - { - /* Enable interrupts as per portEXIT_CRITICAL(). */ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ - asm volatile ( "BIC R0, R0, #0xC0" ); /* Enable IRQ, FIQ. */ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ - asm volatile ( "LDMIA SP!, {R0}" ); /* Pop R0. */ - } - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/GCC/ARM7_STR71X/portmacro.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/GCC/ARM7_STR71X/portmacro.h deleted file mode 100644 index 9b0afc32..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/GCC/ARM7_STR71X/portmacro.h +++ /dev/null @@ -1,192 +0,0 @@ -/* - FreeRTOS V4.1.1 - Copyright (C) 2003-2005 Richard Barry. - Modification for STR71X/GCC - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef PORTMACRO_H -#define PORTMACRO_H - -/* ----------------------- Defines ------------------------------------------*/ -#define portCHAR char -#define portFLOAT float -#define portDOUBLE double -#define portLONG long -#define portSHORT short -#define portSTACK_TYPE unsigned portLONG -#define portBASE_TYPE portLONG - -#if( configUSE_16_BIT_TICKS == 1 ) -typedef unsigned portSHORT portTickType; - -#define portMAX_DELAY ( portTickType ) 0xffff -#else -typedef unsigned portLONG portTickType; - -#define portMAX_DELAY ( portTickType ) 0xffffffff -#endif - -/* ----------------------- Defines (Architecture) ---------------------------*/ - -#define portSTACK_GROWTH ( -1 ) -#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) -#define portBYTE_ALIGNMENT 4 - -/* ----------------------- Global variables ---------------------------------*/ -extern volatile unsigned portLONG ulCriticalNesting; - -/*------------------------ Defines (Scheduler) ------------------------------*/ -/* - * portRESTORE_CONTEXT, portRESTORE_CONTEXT, portENTER_SWITCHING_ISR - * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but - * are included here for efficiency. An attempt to call one from - * THUMB mode code will result in a compile time error. - */ - -#define portRESTORE_CONTEXT() \ -do { \ - extern void * volatile pxCurrentTCB; \ - /* Set the LR to the task stack. */ \ - asm volatile ( "LDR R0, %0" : : "m" (pxCurrentTCB) ); \ - asm volatile ( "LDR LR, [R0]" ); \ - \ - /* The critical nesting depth is the first item on the stack. */ \ - /* Load it into the ulCriticalNesting variable. */ \ - asm volatile ( "LDR R0, =ulCriticalNesting" ); \ - asm volatile ( "LDMFD LR!, {R1}" ); \ - asm volatile ( "STR R1, [R0]" ); \ - \ - /* Get the SPSR from the stack. */ \ - asm volatile ( "LDMFD LR!, {R0}" ); \ - asm volatile ( "MSR SPSR, R0" ); \ - \ - /* Restore all system mode registers for the task. */ \ - asm volatile ( "LDMFD LR, {R0-R14}^" ); \ - asm volatile ( "NOP" ); \ - \ - /* Restore the return address. */ \ - asm volatile ( "LDR LR, [LR, #+60]" ); \ - \ - /* And return - correcting the offset in the LR to obtain the */ \ - /* correct address. */ \ - asm volatile ( "SUBS PC, LR, #4" ); \ -} while( 0 ); - -/*-----------------------------------------------------------*/ - -#define portSAVE_CONTEXT() \ -do { \ - extern void * volatile pxCurrentTCB; \ - /* Push R0 as we are going to use the register. */ \ - asm volatile ( "STMDB SP!, {R0}" ); \ - \ - /* Set R0 to point to the task stack pointer. */ \ - asm volatile ( "STMDB SP,{SP}^" ); \ - asm volatile ( "SUB SP, SP, #4" ); \ - asm volatile ( "LDMIA SP!,{R0}" ); \ - \ - /* Push the return address onto the stack. */ \ - asm volatile ( "STMDB R0!, {LR}" ); \ - \ - /* Now we have saved LR we can use it instead of R0. */ \ - asm volatile ( "MOV LR, R0" ); \ - \ - /* Pop R0 so we can save it onto the system mode stack. */ \ - asm volatile ( "LDMIA SP!, {R0}" ); \ - \ - /* Push all the system mode registers onto the task stack. */ \ - asm volatile ( "STMDB LR,{R0-LR}^"); \ - asm volatile ( "SUB LR, LR, #60" ); \ - \ - /* Push the SPSR onto the task stack. */ \ - asm volatile ( "MRS R0, SPSR" ); \ - asm volatile ( "STMDB LR!, {R0}" ); \ - \ - asm volatile ( "LDR R0, =ulCriticalNesting " ); \ - asm volatile ( "LDR R0, [R0]" ); \ - asm volatile ( "STMDB LR!, {R0}" ); \ - \ - /* Store the new top of stack for the task. */ \ - asm volatile ( "LDR R0, %0" : : "m" (pxCurrentTCB) ); \ - asm volatile ( "STR LR, [R0]" ); \ -} while( 0 ); - - -/*----------------------------------------------------------- - * ISR entry and exit macros. These are only required if a task switch - * is required from the ISR. - *----------------------------------------------------------*/ - - -#define portENTER_SWITCHING_ISR() \ - /* Save the context of the interrupted task. */ \ - portSAVE_CONTEXT(); \ - \ - /* We don't know the stack requirements for the ISR, so the frame */\ - /* pointer will be set to the top of the task stack, and the stack*/\ - /* pointer left where it is. The IRQ stack will get used for any */\ - /* functions calls made by this ISR. */ \ - asm volatile ( "SUB R11, LR, #4" ); \ - do { - -#define portEXIT_SWITCHING_ISR( SwitchRequired ) \ - /* If a switch is required then we just need to call */ \ - /* vTaskSwitchContext() as the context has already been */ \ - /* saved. */ \ - if( SwitchRequired ) \ - { \ - vTaskSwitchContext(); \ - } \ - } while( 0 ); \ - /* Restore the context of which ever task is now the highest */ \ - /* priority that is ready to run. */ \ - portRESTORE_CONTEXT(); - -#define portYIELD() asm volatile ( "SWI" ); - -/* ----------------------- Prototypes ---------------------------------------*/ - -#define portDISABLE_INTERRUPTS( ) vPortDisableInterrupts() -#define portENABLE_INTERRUPTS( ) vPortEnableInterrupts() - -extern void vPortDisableInterrupts( void ) __attribute__ ( ( naked ) ); -extern void vPortEnableInterrupts( void ) __attribute__ ( ( naked ) ); -extern void vPortEnterCritical( void ); -extern void vPortExitCritical( void ); - -#define portENTER_CRITICAL() vPortEnterCritical(); -#define portEXIT_CRITICAL() vPortExitCritical(); - -#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) \ - void vFunction( void *pvParameters ) -#define portTASK_FUNCTION( vFunction, pvParameters ) \ - void vFunction( void *pvParameters ) - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/MemMang/heap_1.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/MemMang/heap_1.c deleted file mode 100644 index bfbc063e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/MemMang/heap_1.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - -Changes between V2.5.1 and V2.5.1 - - + The memory pool has been defined within a struct to ensure correct memory - alignment on 32bit systems. - -Changes between V2.6.1 and V3.0.0 - - + An overflow check has been added to ensure the next free byte variable - does not wrap around. -*/ - - -/* - * The simplest possible implementation of pvPortMalloc(). Note that this - * implementation does NOT allow allocated memory to be freed again. - * - * See heap_2.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include -#include "FreeRTOS.h" -#include "task.h" - -/* Setup the correct byte alignment mask for the defined byte alignment. */ -#if portBYTE_ALIGNMENT == 4 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0000 ) -#endif - -#ifndef heapBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static struct xRTOS_HEAP -{ - unsigned portLONG ulDummy; - unsigned portCHAR ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -static size_t xNextFreeByte = ( size_t ) 0; -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn = NULL; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - #if portBYTE_ALIGNMENT != 1 - if( xWantedSize & heapBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) ); - } - #endif - - vTaskSuspendAll(); - { - /* Check there is enough room left for the allocation. */ - if( ( ( xNextFreeByte + xWantedSize ) < configTOTAL_HEAP_SIZE ) && - ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) )/* Check for overflow. */ - { - /* Return the next free byte then increment the index past this - block. */ - pvReturn = &( xHeap.ucHeap[ xNextFreeByte ] ); - xNextFreeByte += xWantedSize; - } - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - /* Memory cannot be freed using this scheme. See heap_2.c and heap_3.c - for alternative implementations, and the memory management pages of - http://www.FreeRTOS.org for more information. */ - ( void ) pv; -} -/*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* Only required when static memory is not cleared. */ - xNextFreeByte = ( size_t ) 0; -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/MemMang/heap_2.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/MemMang/heap_2.c deleted file mode 100644 index 2b258b12..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/MemMang/heap_2.c +++ /dev/null @@ -1,236 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - * A sample implementation of pvPortMalloc() and vPortFree() that permits - * allocated blocks to be freed, but does not combine adjacent free blocks - * into a single larger block. - * - * See heap_1.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* Setup the correct byte alignment mask for the defined byte alignment. */ -#if portBYTE_ALIGNMENT == 4 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0000 ) -#endif - -#ifndef heapBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static struct xRTOS_HEAP -{ - unsigned portLONG ulDummy; - unsigned portCHAR ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -/* Define the linked list structure. This is used to link free blocks in order -of their size. */ -typedef struct A_BLOCK_LINK -{ - struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */ - size_t xBlockSize; /*<< The size of the free block. */ -} xBlockLink; - - -static const unsigned portSHORT heapSTRUCT_SIZE = ( sizeof( xBlockLink ) + ( sizeof( xBlockLink ) % portBYTE_ALIGNMENT ) ); -#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) ) - -/* Create a couple of list links to mark the start and end of the list. */ -static xBlockLink xStart, xEnd; - -/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */ - -/* - * Insert a block into the list of free blocks - which is ordered by size of - * the block. Small blocks at the start of the list and large blocks at the end - * of the list. - */ -#define prvInsertBlockIntoFreeList( pxBlockToInsert ) \ -{ \ -xBlockLink *pxIterator; \ -size_t xBlockSize; \ - \ - xBlockSize = pxBlockToInsert->xBlockSize; \ - \ - /* Iterate through the list until a block is found that has a larger size */ \ - /* than the block we are inserting. */ \ - for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock ) \ - { \ - /* There is nothing to do here - just iterate to the correct position. */ \ - } \ - \ - /* Update the list to include the block being inserted in the correct */ \ - /* position. */ \ - pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; \ - pxIterator->pxNextFreeBlock = pxBlockToInsert; \ -} -/*-----------------------------------------------------------*/ - -#define prvHeapInit() \ -{ \ -xBlockLink *pxFirstFreeBlock; \ - \ - /* xStart is used to hold a pointer to the first item in the list of free */ \ - /* blocks. The void cast is used to prevent compiler warnings. */ \ - xStart.pxNextFreeBlock = ( void * ) xHeap.ucHeap; \ - xStart.xBlockSize = ( size_t ) 0; \ - \ - /* xEnd is used to mark the end of the list of free blocks. */ \ - xEnd.xBlockSize = configTOTAL_HEAP_SIZE; \ - xEnd.pxNextFreeBlock = NULL; \ - \ - /* To start with there is a single free block that is sized to take up the \ - entire heap space. */ \ - pxFirstFreeBlock = ( void * ) xHeap.ucHeap; \ - pxFirstFreeBlock->xBlockSize = configTOTAL_HEAP_SIZE; \ - pxFirstFreeBlock->pxNextFreeBlock = &xEnd; \ -} -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink; -static portBASE_TYPE xHeapHasBeenInitialised = pdFALSE; -void *pvReturn = NULL; - - vTaskSuspendAll(); - { - /* If this is the first call to malloc then the heap will require - initialisation to setup the list of free blocks. */ - if( xHeapHasBeenInitialised == pdFALSE ) - { - prvHeapInit(); - xHeapHasBeenInitialised = pdTRUE; - } - - /* The wanted size is increased so it can contain a xBlockLink - structure in addition to the requested amount of bytes. */ - if( xWantedSize > 0 ) - { - xWantedSize += heapSTRUCT_SIZE; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - if( xWantedSize & heapBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) ); - } - } - - if( ( xWantedSize > 0 ) && ( xWantedSize < configTOTAL_HEAP_SIZE ) ) - { - /* Blocks are stored in byte order - traverse the list from the start - (smallest) block until one of adequate size is found. */ - pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; - while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock ) ) - { - pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; - } - - /* If we found the end marker then a block of adequate size was not found. */ - if( pxBlock != &xEnd ) - { - /* Return the memory space - jumping over the xBlockLink structure - at its start. */ - pvReturn = ( void * ) ( ( ( unsigned portCHAR * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE ); - - /* This block is being returned for use so must be taken our of the - list of free blocks. */ - pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; - - /* If the block is larger than required it can be split into two. */ - if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) - { - /* This block is to be split into two. Create a new block - following the number of bytes requested. The void cast is - used to prevent byte alignment warnings from the compiler. */ - pxNewBlockLink = ( void * ) ( ( ( unsigned portCHAR * ) pxBlock ) + xWantedSize ); - - /* Calculate the sizes of two blocks split from the single - block. */ - pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; - - /* Insert the new block into the list of free blocks. */ - prvInsertBlockIntoFreeList( ( pxNewBlockLink ) ); - } - } - } - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ -unsigned portCHAR *puc = ( unsigned portCHAR * ) pv; -xBlockLink *pxLink; - - if( pv ) - { - /* The memory being freed will have an xBlockLink structure immediately - before it. */ - puc -= heapSTRUCT_SIZE; - - /* This casting is to keep the compiler from issuing warnings. */ - pxLink = ( void * ) puc; - - vTaskSuspendAll(); - { - /* Add this block to the list of free blocks. */ - prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) ); - } - xTaskResumeAll(); - } -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/MemMang/heap_3.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/MemMang/heap_3.c deleted file mode 100644 index 180c3e62..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/portable/MemMang/heap_3.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - - -/* - * Implementation of pvPortMalloc() and vPortFree() that relies on the - * compilers own malloc() and free() implementations. - * - * This file can only be used if the linker is configured to to generate - * a heap memory area. - * - * See heap_2.c and heap_1.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ - -#include - -#include "FreeRTOS.h" -#include "task.h" - -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn; - - vTaskSuspendAll(); - { - pvReturn = malloc( xWantedSize ); - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - if( pv ) - { - vTaskSuspendAll(); - { - free( pv ); - } - xTaskResumeAll(); - } -} - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/queue.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/queue.c deleted file mode 100644 index 7ed6363d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/queue.c +++ /dev/null @@ -1,882 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.01 - - + More use of 8bit data types. - + Function name prefixes changed where the data type returned has changed. - -Changed from V2.0.0 - - + Added the queue locking mechanism and make more use of the scheduler - suspension feature to minimise the time interrupts have to be disabled - when accessing a queue. - -Changed from V2.2.0 - - + Explicit use of 'signed' qualifier on portCHAR types added. - -Changes from V3.0.0 - - + API changes as described on the FreeRTOS.org WEB site. - -Changes from V3.2.3 - - + Added the queue functions that can be used from co-routines. - -Changes from V4.0.5 - - + Added a loop within xQueueSend() and xQueueReceive() to prevent the - functions exiting when a block time remains and the function has - not completed. - -*/ - -#include -#include -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -/* Constants used with the cRxLock and cTxLock structure members. */ -#define queueUNLOCKED ( ( signed portBASE_TYPE ) -1 ) -#define queueERRONEOUS_UNBLOCK ( -1 ) - -/* - * Definition of the queue used by the scheduler. - * Items are queued by copy, not reference. - */ -typedef struct QueueDefinition -{ - signed portCHAR *pcHead; /*< Points to the beginning of the queue storage area. */ - signed portCHAR *pcTail; /*< Points to the byte at the end of the queue storage area. Once more byte is allocated than necessary to store the queue items, this is used as a marker. */ - - signed portCHAR *pcWriteTo; /*< Points to the free next place in the storage area. */ - signed portCHAR *pcReadFrom; /*< Points to the last place that a queued item was read from. */ - - xList xTasksWaitingToSend; /*< List of tasks that are blocked waiting to post onto this queue. Stored in priority order. */ - xList xTasksWaitingToReceive; /*< List of tasks that are blocked waiting to read from this queue. Stored in priority order. */ - - unsigned portBASE_TYPE uxMessagesWaiting;/*< The number of items currently in the queue. */ - unsigned portBASE_TYPE uxLength; /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */ - unsigned portBASE_TYPE uxItemSize; /*< The size of each items that the queue will hold. */ - - signed portBASE_TYPE xRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ - signed portBASE_TYPE xTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ -} xQUEUE; -/*-----------------------------------------------------------*/ - -/* - * Inside this file xQueueHandle is a pointer to a xQUEUE structure. - * To keep the definition private the API header file defines it as a - * pointer to void. - */ -typedef xQUEUE * xQueueHandle; - -/* - * Prototypes for public functions are included here so we don't have to - * include the API header file (as it defines xQueueHandle differently). These - * functions are documented in the API header file. - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); -signed portBASE_TYPE xQueueSend( xQueueHandle xQueue, const void * pvItemToQueue, portTickType xTicksToWait ); -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue ); -void vQueueDelete( xQueueHandle xQueue ); -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ); -signed portBASE_TYPE xQueueReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - -#if configUSE_CO_ROUTINES == 1 - signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ); - signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ); - signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); -#endif - -/* - * Unlocks a queue locked by a call to prvLockQueue. Locking a queue does not - * prevent an ISR from adding or removing items to the queue, but does prevent - * an ISR from removing tasks from the queue event lists. If an ISR finds a - * queue is locked it will instead increment the appropriate queue lock count - * to indicate that a task may require unblocking. When the queue in unlocked - * these lock counts are inspected, and the appropriate action taken. - */ -static void prvUnlockQueue( xQueueHandle pxQueue ); - -/* - * Uses a critical section to determine if there is any data in a queue. - * - * @return pdTRUE if the queue contains no items, otherwise pdFALSE. - */ -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ); - -/* - * Uses a critical section to determine if there is any space in a queue. - * - * @return pdTRUE if there is no space, otherwise pdFALSE; - */ -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ); - -/* - * Macro that copies an item into the queue. This is done by copying the item - * byte for byte, not by reference. Updates the queue state to ensure it's - * integrity after the copy. - */ -#define prvCopyQueueData( pxQueue, pvItemToQueue ) \ -{ \ - memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( unsigned ) pxQueue->uxItemSize ); \ - ++( pxQueue->uxMessagesWaiting ); \ - pxQueue->pcWriteTo += pxQueue->uxItemSize; \ - if( pxQueue->pcWriteTo >= pxQueue->pcTail ) \ - { \ - pxQueue->pcWriteTo = pxQueue->pcHead; \ - } \ -} -/*-----------------------------------------------------------*/ - -/* - * Macro to mark a queue as locked. Locking a queue prevents an ISR from - * accessing the queue event lists. - */ -#define prvLockQueue( pxQueue ) \ -{ \ - taskENTER_CRITICAL(); \ - ++( pxQueue->xRxLock ); \ - ++( pxQueue->xTxLock ); \ - taskEXIT_CRITICAL(); \ -} -/*-----------------------------------------------------------*/ - - -/*----------------------------------------------------------- - * PUBLIC QUEUE MANAGEMENT API documented in queue.h - *----------------------------------------------------------*/ - -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ) -{ -xQUEUE *pxNewQueue; -size_t xQueueSizeInBytes; - - /* Allocate the new queue structure. */ - if( uxQueueLength > ( unsigned portBASE_TYPE ) 0 ) - { - pxNewQueue = ( xQUEUE * ) pvPortMalloc( sizeof( xQUEUE ) ); - if( pxNewQueue != NULL ) - { - /* Create the list of pointers to queue items. The queue is one byte - longer than asked for to make wrap checking easier/faster. */ - xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ) + ( size_t ) 1; - - pxNewQueue->pcHead = ( signed portCHAR * ) pvPortMalloc( xQueueSizeInBytes ); - if( pxNewQueue->pcHead != NULL ) - { - /* Initialise the queue members as described above where the - queue type is defined. */ - pxNewQueue->pcTail = pxNewQueue->pcHead + ( uxQueueLength * uxItemSize ); - pxNewQueue->uxMessagesWaiting = 0; - pxNewQueue->pcWriteTo = pxNewQueue->pcHead; - pxNewQueue->pcReadFrom = pxNewQueue->pcHead + ( ( uxQueueLength - 1 ) * uxItemSize ); - pxNewQueue->uxLength = uxQueueLength; - pxNewQueue->uxItemSize = uxItemSize; - pxNewQueue->xRxLock = queueUNLOCKED; - pxNewQueue->xTxLock = queueUNLOCKED; - - /* Likewise ensure the event queues start with the correct state. */ - vListInitialise( &( pxNewQueue->xTasksWaitingToSend ) ); - vListInitialise( &( pxNewQueue->xTasksWaitingToReceive ) ); - - return pxNewQueue; - } - else - { - vPortFree( pxNewQueue ); - } - } - } - - /* Will only reach here if we could not allocate enough memory or no memory - was required. */ - return NULL; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; -xTimeOutType xTimeOut; - - /* Make sure other tasks do not access the queue. */ - vTaskSuspendAll(); - - /* Capture the current time status for future reference. */ - vTaskSetTimeOutState( &xTimeOut ); - - /* It is important that this is the only thread/ISR that modifies the - ready or delayed lists until xTaskResumeAll() is called. Places where - the ready/delayed lists are modified include: - - + vTaskDelay() - Nothing can call vTaskDelay as the scheduler is - suspended, vTaskDelay() cannot be called from an ISR. - + vTaskPrioritySet() - Has a critical section around the access. - + vTaskSwitchContext() - This will not get executed while the scheduler - is suspended. - + prvCheckDelayedTasks() - This will not get executed while the - scheduler is suspended. - + xTaskCreate() - Has a critical section around the access. - + vTaskResume() - Has a critical section around the access. - + xTaskResumeAll() - Has a critical section around the access. - + xTaskRemoveFromEventList - Checks to see if the scheduler is - suspended. If so then the TCB being removed from the event is - removed from the event and added to the xPendingReadyList. - */ - - /* Make sure interrupts do not access the queue event list. */ - prvLockQueue( pxQueue ); - - /* It is important that interrupts to not access the event list of the - queue being modified here. Places where the event list is modified - include: - - + xQueueSendFromISR(). This checks the lock on the queue to see if - it has access. If the queue is locked then the Tx lock count is - incremented to signify that a task waiting for data can be made ready - once the queue lock is removed. If the queue is not locked then - a task can be moved from the event list, but will not be removed - from the delayed list or placed in the ready list until the scheduler - is unlocked. - - + xQueueReceiveFromISR(). As per xQueueSendFromISR(). - */ - - /* If the queue is already full we may have to block. */ - do - { - if( prvIsQueueFull( pxQueue ) ) - { - /* The queue is full - do we want to block or just leave without - posting? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* We are going to place ourselves on the xTasksWaitingToSend event - list, and will get woken should the delay expire, or space become - available on the queue. - - As detailed above we do not require mutual exclusion on the event - list as nothing else can modify it or the ready lists while we - have the scheduler suspended and queue locked. - - It is possible that an ISR has removed data from the queue since we - checked if any was available. If this is the case then the data - will have been copied from the queue, and the queue variables - updated, but the event list will not yet have been checked to see if - anything is waiting as the queue is locked. */ - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait ); - - /* Force a context switch now as we are blocked. We can do - this from within a critical section as the task we are - switching to has its own context. When we return here (i.e. we - unblock) we will leave the critical section as normal. - - It is possible that an ISR has caused an event on an unrelated and - unlocked queue. If this was the case then the event list for that - queue will have been updated but the ready lists left unchanged - - instead the readied task will have been added to the pending ready - list. */ - taskENTER_CRITICAL(); - { - /* We can safely unlock the queue and scheduler here as - interrupts are disabled. We must not yield with anything - locked, but we can yield from within a critical section. - - Tasks that have been placed on the pending ready list cannot - be tasks that are waiting for events on this queue. See - in comment xTaskRemoveFromEventList(). */ - prvUnlockQueue( pxQueue ); - - /* Resuming the scheduler may cause a yield. If so then there - is no point yielding again here. */ - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - - /* Before leaving the critical section we have to ensure - exclusive access again. */ - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - } - taskEXIT_CRITICAL(); - } - } - - /* When we are here it is possible that we unblocked as space became - available on the queue. It is also possible that an ISR posted to the - queue since we left the critical section, so it may be that again there - is no space. This would only happen if a task and ISR post onto the - same queue. */ - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - /* There is room in the queue, copy the data into the queue. */ - prvCopyQueueData( pxQueue, pvItemToQueue ); - xReturn = pdPASS; - - /* Update the TxLock count so prvUnlockQueue knows to check for - tasks waiting for data to become available in the queue. */ - ++( pxQueue->xTxLock ); - } - else - { - xReturn = errQUEUE_FULL; - } - } - taskEXIT_CRITICAL(); - - if( xReturn == errQUEUE_FULL ) - { - if( xTicksToWait > 0 ) - { - if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - { - xReturn = queueERRONEOUS_UNBLOCK; - } - } - } - } - while( xReturn == queueERRONEOUS_UNBLOCK ); - - prvUnlockQueue( pxQueue ); - xTaskResumeAll(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ) -{ - /* Similar to xQueueSend, except we don't block if there is no room in the - queue. Also we don't directly wake a task that was blocked on a queue - read, instead we return a flag to say whether a context switch is required - or not (i.e. has a task with a higher priority than us been woken by this - post). */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - prvCopyQueueData( pxQueue, pvItemToQueue ); - - /* If the queue is locked we do not alter the event list. This will - be done when the queue is unlocked later. */ - if( pxQueue->xTxLock == queueUNLOCKED ) - { - /* We only want to wake one task per ISR, so check that a task has - not already been woken. */ - if( !xTaskPreviouslyWoken ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - return pdTRUE; - } - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was posted while it was locked. */ - ++( pxQueue->xTxLock ); - } - } - - return xTaskPreviouslyWoken; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; -xTimeOutType xTimeOut; - - /* This function is very similar to xQueueSend(). See comments within - xQueueSend() for a more detailed explanation. - - Make sure other tasks do not access the queue. */ - vTaskSuspendAll(); - - /* Capture the current time status for future reference. */ - vTaskSetTimeOutState( &xTimeOut ); - - /* Make sure interrupts do not access the queue. */ - prvLockQueue( pxQueue ); - - do - { - /* If there are no messages in the queue we may have to block. */ - if( prvIsQueueEmpty( pxQueue ) ) - { - /* There are no messages in the queue, do we want to block or just - leave with nothing? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); - taskENTER_CRITICAL(); - { - prvUnlockQueue( pxQueue ); - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - } - taskEXIT_CRITICAL(); - } - } - - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - /* Increment the lock count so prvUnlockQueue knows to check for - tasks waiting for space to become available on the queue. */ - ++( pxQueue->xRxLock ); - xReturn = pdPASS; - } - else - { - xReturn = errQUEUE_EMPTY; - } - } - taskEXIT_CRITICAL(); - - if( xReturn == errQUEUE_EMPTY ) - { - if( xTicksToWait > 0 ) - { - if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - { - xReturn = queueERRONEOUS_UNBLOCK; - } - } - } - } while( xReturn == queueERRONEOUS_UNBLOCK ); - - /* We no longer require exclusive access to the queue. */ - prvUnlockQueue( pxQueue ); - xTaskResumeAll(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ) -{ -signed portBASE_TYPE xReturn; - - /* We cannot block from an ISR, so check there is data available. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Copy the data from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - /* If the queue is locked we will not modify the event list. Instead - we update the lock count so the task that unlocks the queue will know - that an ISR has removed data while the queue was locked. */ - if( pxQueue->xRxLock == queueUNLOCKED ) - { - /* We only want to wake one task per ISR, so check that a task has - not already been woken. */ - if( !( *pxTaskWoken ) ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - /* The task waiting has a higher priority than us so - force a context switch. */ - *pxTaskWoken = pdTRUE; - } - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was removed while it was locked. */ - ++( pxQueue->xRxLock ); - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue ) -{ -unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - uxReturn = pxQueue->uxMessagesWaiting; - taskEXIT_CRITICAL(); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -void vQueueDelete( xQueueHandle pxQueue ) -{ - vPortFree( pxQueue->pcHead ); - vPortFree( pxQueue ); -} -/*-----------------------------------------------------------*/ - -static void prvUnlockQueue( xQueueHandle pxQueue ) -{ - /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */ - - /* The lock counts contains the number of extra data items placed or - removed from the queue while the queue was locked. When a queue is - locked items can be added or removed, but the event lists cannot be - updated. */ - taskENTER_CRITICAL(); - { - --( pxQueue->xTxLock ); - - /* See if data was added to the queue while it was locked. */ - if( pxQueue->xTxLock > queueUNLOCKED ) - { - pxQueue->xTxLock = queueUNLOCKED; - - /* Data was posted while the queue was locked. Are any tasks - blocked waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* Tasks that are removed from the event list will get added to - the pending ready list as the scheduler is still suspended. */ - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - vTaskMissedYield(); - } - } - } - } - taskEXIT_CRITICAL(); - - /* Do the same for the Rx lock. */ - taskENTER_CRITICAL(); - { - --( pxQueue->xRxLock ); - - if( pxQueue->xRxLock > queueUNLOCKED ) - { - pxQueue->xRxLock = queueUNLOCKED; - - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - vTaskMissedYield(); - } - } - } - } - taskEXIT_CRITICAL(); -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == pxQueue->uxLength ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* If the queue is already full we may have to block. A critical section - is required to prevent an interrupt removing something from the queue - between the check to see if the queue is full and blocking on the queue. */ - portDISABLE_INTERRUPTS(); - { - if( prvIsQueueFull( pxQueue ) ) - { - /* The queue is full - do we want to block or just leave without - posting? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* As this is called from a coroutine we cannot block directly, but - return indicating that we need to block. */ - vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) ); - portENABLE_INTERRUPTS(); - return errQUEUE_BLOCKED; - } - else - { - portENABLE_INTERRUPTS(); - return errQUEUE_FULL; - } - } - } - portENABLE_INTERRUPTS(); - - portNOP(); - - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - /* There is room in the queue, copy the data into the queue. */ - prvCopyQueueData( pxQueue, pvItemToQueue ); - xReturn = pdPASS; - - /* Were any co-routines waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* In this instance the co-routine could be placed directly - into the ready list as we are within a critical section. - Instead the same pending ready list mechansim is used as if - the event were caused from within an interrupt. */ - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The co-routine waiting has a higher priority so record - that a yield might be appropriate. */ - xReturn = errQUEUE_YIELD; - } - } - } - else - { - xReturn = errQUEUE_FULL; - } - } - portENABLE_INTERRUPTS(); - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* If the queue is already empty we may have to block. A critical section - is required to prevent an interrupt adding something to the queue - between the check to see if the queue is empty and blocking on the queue. */ - portDISABLE_INTERRUPTS(); - { - if( prvIsQueueEmpty( pxQueue ) ) - { - /* There are no messages in the queue, do we want to block or just - leave with nothing? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* As this is a co-routine we cannot block directly, but return - indicating that we need to block. */ - vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) ); - portENABLE_INTERRUPTS(); - return errQUEUE_BLOCKED; - } - else - { - portENABLE_INTERRUPTS(); - return errQUEUE_FULL; - } - } - } - portENABLE_INTERRUPTS(); - - portNOP(); - - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Data is available from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - xReturn = pdPASS; - - /* Were any co-routines waiting for space to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - /* In this instance the co-routine could be placed directly - into the ready list as we are within a critical section. - Instead the same pending ready list mechansim is used as if - the event were caused from within an interrupt. */ - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - xReturn = errQUEUE_YIELD; - } - } - } - else - { - xReturn = pdFAIL; - } - } - portENABLE_INTERRUPTS(); - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - - - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ) -{ - /* Cannot block within an ISR so if there is no space on the queue then - exit without doing anything. */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - prvCopyQueueData( pxQueue, pvItemToQueue ); - - /* We only want to wake one co-routine per ISR, so check that a - co-routine has not already been woken. */ - if( !xCoRoutinePreviouslyWoken ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - return pdTRUE; - } - } - } - } - - return xCoRoutinePreviouslyWoken; -} -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxCoRoutineWoken ) -{ -signed portBASE_TYPE xReturn; - - /* We cannot block from an ISR, so check there is data available. If - not then just leave without doing anything. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Copy the data from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - if( !( *pxCoRoutineWoken ) ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - *pxCoRoutineWoken = pdTRUE; - } - } - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/tasks.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/tasks.c deleted file mode 100644 index 31a39eaf..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/freertos/tasks.c +++ /dev/null @@ -1,1814 +0,0 @@ -/* - FreeRTOS.org V4.1.1 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.00: - - + Call to portRESTORE_CONTEXT has been removed. The first context - switch is now performed within sPortStartScheduler(). - -Changes from V1.01: - - + More use of 8bit data types. - + Function name prefixes changed where the data type returned has changed. - + configUSE_TRACE_FACILITY is no longer defined by default. - -Changes from V1.2.0 - - + Introduced ucTopReadyPriority. This tracks the highest priority ready - queue that contains a valid TCB and thus makes the context switch - slightly faster. - - + prvAddTaskToReadyQueue() has been made a macro. - -Changes from V1.2.6 - - + Added conditional compilation directives. - + Extended API. - + Rearranged function order. - + Creating a task now causes a context switch if the task being created - has a higher priority than the calling task - assuming the kernel is - running. - + vTaskDelete() now only causes a context switch if the calling task is - the task being deleted. - -Changes from V2.0.0 - - + Allow the type of the tick count to be 16 or 32 bits. - + Introduce xPendingReadyList feature to allow the time interrupts have to - be disabled to be minimised. - + Remove the #if( INCLUDE_vTaskSuspendAll ) statements. vTaskSuspendAll() - is now always included as it is used by the scheduler itself. - -Changes from V2.1.0 - - + Bug fix - pxCurrentTCB is now initialised before the call to - prvInitializeTaskLists(). Previously pxCurrentTCB could be accessed - while null. - -Changed from V2.1.1 - - + Change to where lStackSize is declared within sTaskCreate() to prevent - compiler warnings with 8051 port. - -Changes from V2.2.0 - - + Explicit use of 'signed' qualifier on portCHAR types added. - + Changed odd calculation of initial pxTopOfStack value when - portSTACK_GROWTH < 0. - + Removed pcVersionNumber definition. - -Changes from V2.5.3 - - + cTaskResumeAll() modified to ensure it can be called prior to the task - lists being initialised. - -Changes from V2.5.5 - - + Added API function vTaskDelayUntil(). - + Added INCLUDE_vTaskDelay conditional compilation. - -Changes from V2.6.0 - - + Updated the vWriteTraceToBuffer macro to always be 4 byte aligned so it - can be used on ARM architectures. - + tskMAX_TASK_NAME_LEN definition replaced with the port specific - configMAX_TASK_NAME_LEN definition. - + Removed the call to strcpy when copying across the task name into the - TCB. - + Added ucTasksDeleted variable to prevent vTaskSuspendAll() being called - too often in the idle task. - -Changes between V3.0.0 and V2.6.1 - - + When resuming the scheduler a yield is performed if either a tick has - been missed, or a task is moved from the pending ready list into a ready - list. Previously a yield was not performed on this second condition. - + Introduced the type portBASE_TYPE. This necessitates several API - changes. - + Removed the sUsingPreemption variable. The constant defined in - portmacro.h is now used directly. - + The idle task can now include an optional hook function - and no longer - completes its time slice if other tasks with equal priority to it are - ready to run. - + See the FreeRTOS.org documentation for more information on V2.x.x to - V3.x.x modifications. - -Changes from V3.1.1 - - + Modified vTaskPrioritySet() and vTaskResume() to allow these functions to - be called while the scheduler is suspended. - + Corrected the task ordering within event lists. - -Changes from V3.2.0 - - + Added function xTaskGetCurrentTaskHandle(). - -Changes from V3.2.4 - - + Changed the volatile declarations on some variables to reflect the - changes to the list definitions. - + Changed the order of the TCB definition so there is commonality between - the task control block and a co-routine control block. - + Allow the scheduler to be started even if no tasks other than the idle - task has been created. This allows co-routines to run even when no tasks - have been created. - + The need for a context switch is now signalled if a task woken by an - event has a priority greater or equal to the currently running task. - Previously this was only greater than. - -Changes from V4.0.0 - - + Added the xMissedYield handling. - -Changes from V4.0.1 - - + The function vTaskList() now suspends the scheduler rather than disabling - interrupts during the creation of the task list. - + Allow a task to delete itself by passing in its own handle. Previously - this could only be done by passing in NULL. - + The tick hook function is now called only within a tick isr. Previously - it was also called when the tick function was called during the scheduler - unlocking process. - -Changes from V4.0.3 - - + Extra checks have been placed in vTaskPrioritySet() to avoid unnecessary - yields. - -Changed from V4.0.4 - - + Bug fix: The 'value' of the event list item is updated when the priority - of a task is changed. Previously only the priority of the TCB itself was - changed. - + When resuming a task a check is first made to see if the task is actually - suspended. - + vTaskPrioritySet() and vTaskResume() no longer use the event list item. - This has not been necessary since V4.0.1 when the xMissedYield handling - was added. - + Implement xTaskResumeFromISR(). - -Changes from V4.0.5 - - + Added utility functions and xOverflowCount variable to facilitate the - queue.c changes. -*/ - -#include -#include -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* - * Macro to define the amount of stack available to the idle task. - */ -#define tskIDLE_STACK_SIZE configMINIMAL_STACK_SIZE - - -/* - * Default a definitions for backwards compatibility with old - * portmacro.h files. - */ -#ifndef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 16 -#endif - -#ifndef INCLUDE_xTaskGetCurrentTaskHandle - #define INCLUDE_xTaskGetCurrentTaskHandle 0 -#endif - -#ifndef configIDLE_SHOULD_YIELD - #define configIDLE_SHOULD_YIELD 1 -#endif - -#if configMAX_TASK_NAME_LEN < 1 - #undef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 1 -#endif - -#ifndef INCLUDE_xTaskResumeFromISR - #define INCLUDE_xTaskResumeFromISR 1 -#endif - -/* - * Task control block. A task control block (TCB) is allocated to each task, - * and stores the context of the task. - */ -typedef struct tskTaskControlBlock -{ - volatile portSTACK_TYPE *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE STRUCT. */ - xListItem xGenericListItem; /*< List item used to place the TCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the TCB in event lists. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the task where 0 is the lowest priority. */ - portSTACK_TYPE *pxStack; /*< Points to the start of the stack. */ - unsigned portBASE_TYPE uxTCBNumber; /*< This is used for tracing the scheduler and making debugging easier only. */ - signed portCHAR pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */ - unsigned portSHORT usStackDepth; /*< Total depth of the stack (when empty). This is defined as the number of variables the stack can hold, not the number of bytes. */ -} tskTCB; - -/*lint -e956 */ - -tskTCB * volatile pxCurrentTCB = NULL; - -/* Lists for ready and blocked tasks. --------------------*/ - -static xList pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */ -static xList xDelayedTaskList1; /*< Delayed tasks. */ -static xList xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */ -static xList * volatile pxDelayedTaskList; /*< Points to the delayed task list currently being used. */ -static xList * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */ -static xList xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready queue when the scheduler is resumed. */ - -#if ( INCLUDE_vTaskDelete == 1 ) - - static volatile xList xTasksWaitingTermination; /*< Tasks that have been deleted - but the their memory not yet freed. */ - static volatile unsigned portBASE_TYPE uxTasksDeleted = ( unsigned portBASE_TYPE ) 0; - -#endif - -#if ( INCLUDE_vTaskSuspend == 1 ) - - static xList xSuspendedTaskList; /*< Tasks that are currently suspended. */ - -#endif - -/* File private variables. --------------------------------*/ -static volatile unsigned portBASE_TYPE uxCurrentNumberOfTasks = ( unsigned portBASE_TYPE ) 0; -static volatile portTickType xTickCount = ( portTickType ) 0; -static unsigned portBASE_TYPE uxTopUsedPriority = tskIDLE_PRIORITY; -static volatile unsigned portBASE_TYPE uxTopReadyPriority = tskIDLE_PRIORITY; -static volatile signed portBASE_TYPE xSchedulerRunning = pdFALSE; -static volatile unsigned portBASE_TYPE uxSchedulerSuspended = ( unsigned portBASE_TYPE ) pdFALSE; -static volatile unsigned portBASE_TYPE uxMissedTicks = ( unsigned portBASE_TYPE ) 0; -static volatile portBASE_TYPE xMissedYield = ( portBASE_TYPE ) pdFALSE; -static volatile portBASE_TYPE xNumOfOverflows = ( portBASE_TYPE ) 0; -/* Debugging and trace facilities private variables and macros. ------------*/ - -/* - * The value used to fill the stack of a task when the task is created. This - * is used purely for checking the high water mark for tasks. - */ -#define tskSTACK_FILL_BYTE ( 0xa5 ) - -/* - * Macros used by vListTask to indicate which state a task is in. - */ -#define tskBLOCKED_CHAR ( ( signed portCHAR ) 'B' ) -#define tskREADY_CHAR ( ( signed portCHAR ) 'R' ) -#define tskDELETED_CHAR ( ( signed portCHAR ) 'D' ) -#define tskSUSPENDED_CHAR ( ( signed portCHAR ) 'S' ) - -/* - * Macros and private variables used by the trace facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define tskSIZE_OF_EACH_TRACE_LINE ( ( unsigned portLONG ) ( sizeof( unsigned portLONG ) + sizeof( unsigned portLONG ) ) ) - static volatile signed portCHAR * volatile pcTraceBuffer; - static signed portCHAR *pcTraceBufferStart; - static signed portCHAR *pcTraceBufferEnd; - static signed portBASE_TYPE xTracing = pdFALSE; - -#endif - -/* - * Macro that writes a trace of scheduler activity to a buffer. This trace - * shows which task is running when and is very useful as a debugging tool. - * As this macro is called each context switch it is a good idea to undefine - * it if not using the facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define vWriteTraceToBuffer() \ - { \ - if( xTracing ) \ - { \ - static unsigned portBASE_TYPE uxPreviousTask = 255; \ - \ - if( uxPreviousTask != pxCurrentTCB->uxTCBNumber ) \ - { \ - if( ( pcTraceBuffer + tskSIZE_OF_EACH_TRACE_LINE ) < pcTraceBufferEnd ) \ - { \ - uxPreviousTask = pxCurrentTCB->uxTCBNumber; \ - *( unsigned portLONG * ) pcTraceBuffer = ( unsigned portLONG ) xTickCount; \ - pcTraceBuffer += sizeof( unsigned portLONG ); \ - *( unsigned portLONG * ) pcTraceBuffer = ( unsigned portLONG ) uxPreviousTask; \ - pcTraceBuffer += sizeof( unsigned portLONG ); \ - } \ - else \ - { \ - xTracing = pdFALSE; \ - } \ - } \ - } \ - } - -#else - - #define vWriteTraceToBuffer() - -#endif - - -/* - * Place the task represented by pxTCB into the appropriate ready queue for - * the task. It is inserted at the end of the list. One quirk of this is - * that if the task being inserted is at the same priority as the currently - * executing task, then it will only be rescheduled after the currently - * executing task has been rescheduled. - */ -#define prvAddTaskToReadyQueue( pxTCB ) \ -{ \ - if( pxTCB->uxPriority > uxTopReadyPriority ) \ - { \ - uxTopReadyPriority = pxTCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyTasksLists[ pxTCB->uxPriority ] ), &( pxTCB->xGenericListItem ) ); \ -} - -/* - * Macro that looks at the list of tasks that are currently delayed to see if - * any require waking. - * - * Tasks are stored in the queue in the order of their wake time - meaning - * once one tasks has been found whose timer has not expired we need not look - * any further down the list. - */ -#define prvCheckDelayedTasks() \ -{ \ -register tskTCB *pxTCB; \ - \ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ) ) != NULL ) \ - { \ - if( xTickCount < listGET_LIST_ITEM_VALUE( &( pxTCB->xGenericListItem ) ) ) \ - { \ - break; \ - } \ - vListRemove( &( pxTCB->xGenericListItem ) ); \ - /* Is the task waiting on an event also? */ \ - if( pxTCB->xEventListItem.pvContainer ) \ - { \ - vListRemove( &( pxTCB->xEventListItem ) ); \ - } \ - prvAddTaskToReadyQueue( pxTCB ); \ - } \ -} - -/* - * Several functions take an xTaskHandle parameter that can optionally be NULL, - * where NULL is used to indicate that the handle of the currently executing - * task should be used in place of the parameter. This macro simply checks to - * see if the parameter is NULL and returns a pointer to the appropriate TCB. - */ -#define prvGetTCBFromHandle( pxHandle ) ( ( pxHandle == NULL ) ? ( tskTCB * ) pxCurrentTCB : ( tskTCB * ) pxHandle ) - - -/* File private functions. --------------------------------*/ - -/* - * Utility to ready a TCB for a given task. Mainly just copies the parameters - * into the TCB structure. - */ -static void prvInitialiseTCBVariables( tskTCB *pxTCB, unsigned portSHORT usStackDepth, const signed portCHAR * const pcName, unsigned portBASE_TYPE uxPriority ); - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first task. - */ -static void prvInitialiseTaskLists( void ); - -/* - * The idle task, which as all tasks is implemented as a never ending loop. - * The idle task is automatically created and added to the ready lists upon - * creation of the first user task. - * - * The portTASK_FUNCTION_PROTO() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters ); - -/* - * Utility to free all memory allocated by the scheduler to hold a TCB, - * including the stack pointed to by the TCB. - * - * This does not free memory allocated by the task itself (i.e. memory - * allocated by calls to pvPortMalloc from within the tasks application code). - */ -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - static void prvDeleteTCB( tskTCB *pxTCB ); -#endif - -/* - * Used only by the idle task. This checks to see if anything has been placed - * in the list of tasks waiting to be deleted. If so the task is cleaned up - * and its TCB deleted. - */ -static void prvCheckTasksWaitingTermination( void ); - -/* - * Allocates memory from the heap for a TCB and associated stack. Checks the - * allocation was successful. - */ -static tskTCB *prvAllocateTCBAndStack( unsigned portSHORT usStackDepth ); - -/* - * Called from vTaskList. vListTasks details all the tasks currently under - * control of the scheduler. The tasks may be in one of a number of lists. - * prvListTaskWithinSingleList accepts a list and details the tasks from - * within just that list. - * - * THIS FUNCTION IS INTENDED FOR DEBUGGING ONLY, AND SHOULD NOT BE CALLED FROM - * NORMAL APPLICATION CODE. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( signed portCHAR *pcWriteBuffer, xList *pxList, signed portCHAR cStatus ); - -#endif - -/* - * When a task is created, the stack of the task is filled with a known value. - * This function determines the 'high water mark' of the task stack by - * determining how much of the stack remains at the original preset value. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned portSHORT usTaskCheckFreeStackSpace( const unsigned portCHAR *pucStackByte ); - -#endif - -/*lint +e956 */ - - - - - -/*----------------------------------------------------------- - * TASK CREATION API documented in task.h - *----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask ) -{ -signed portBASE_TYPE xReturn; -tskTCB * pxNewTCB; -static unsigned portBASE_TYPE uxTaskNumber = 0; /*lint !e956 Static is deliberate - this is guarded before use. */ - - /* Allocate the memory required by the TCB and stack for the new task. - checking that the allocation was successful. */ - pxNewTCB = prvAllocateTCBAndStack( usStackDepth ); - - if( pxNewTCB != NULL ) - { - portSTACK_TYPE *pxTopOfStack; - - /* Setup the newly allocated TCB with the initial state of the task. */ - prvInitialiseTCBVariables( pxNewTCB, usStackDepth, pcName, uxPriority ); - - /* Calculate the top of stack address. This depends on whether the - stack grows from high memory to low (as per the 80x86) or visa versa. - portSTACK_GROWTH is used to make the result positive or negative as - required by the port. */ - #if portSTACK_GROWTH < 0 - { - pxTopOfStack = pxNewTCB->pxStack + ( pxNewTCB->usStackDepth - 1 ); - } - #else - { - pxTopOfStack = pxNewTCB->pxStack; - } - #endif - - /* Initialize the TCB stack to look as if the task was already running, - but had been interrupted by the scheduler. The return address is set - to the start of the task function. Once the stack has been initialised - the top of stack variable is updated. */ - pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pvTaskCode, pvParameters ); - - /* We are going to manipulate the task queues to add this task to a - ready list, so must make sure no interrupts occur. */ - portENTER_CRITICAL(); - { - uxCurrentNumberOfTasks++; - if( uxCurrentNumberOfTasks == ( unsigned portBASE_TYPE ) 1 ) - { - /* As this is the first task it must also be the current task. */ - pxCurrentTCB = pxNewTCB; - - /* This is the first task to be created so do the preliminary - initialisation required. We will not recover if this call - fails, but we will report the failure. */ - prvInitialiseTaskLists(); - } - else - { - /* If the scheduler is not already running, make this task the - current task if it is the highest priority task to be created - so far. */ - if( xSchedulerRunning == pdFALSE ) - { - if( pxCurrentTCB->uxPriority <= uxPriority ) - { - pxCurrentTCB = pxNewTCB; - } - } - } - - /* Remember the top priority to make context switching faster. Use - the priority in pxNewTCB as this has been capped to a valid value. */ - if( pxNewTCB->uxPriority > uxTopUsedPriority ) - { - uxTopUsedPriority = pxNewTCB->uxPriority; - } - - /* Add a counter into the TCB for tracing only. */ - pxNewTCB->uxTCBNumber = uxTaskNumber; - uxTaskNumber++; - - prvAddTaskToReadyQueue( pxNewTCB ); - - xReturn = pdPASS; - } - portEXIT_CRITICAL(); - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - if( xReturn == pdPASS ) - { - if( ( void * ) pxCreatedTask != NULL ) - { - /* Pass the TCB out - in an anonymous way. The calling function/ - task can use this as a handle to delete the task later if - required.*/ - *pxCreatedTask = ( xTaskHandle ) pxNewTCB; - } - - if( xSchedulerRunning != pdFALSE ) - { - /* If the created task is of a higher priority than the current task - then it should run now. */ - if( pxCurrentTCB->uxPriority < uxPriority ) - { - taskYIELD(); - } - } - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelete == 1 ) - - void vTaskDelete( xTaskHandle pxTaskToDelete ) - { - tskTCB *pxTCB; - - taskENTER_CRITICAL(); - { - /* Ensure a yield is performed if the current task is being - deleted. */ - if( pxTaskToDelete == pxCurrentTCB ) - { - pxTaskToDelete = NULL; - } - - /* If null is passed in here then we are deleting ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToDelete ); - - /* Remove task from the ready list and place in the termination list. - This will stop the task from be scheduled. The idle task will check - the termination list and free up any memory allocated by the - scheduler for the TCB and stack. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xTasksWaitingTermination, &( pxTCB->xGenericListItem ) ); - - /* Increment the ucTasksDeleted variable so the idle task knows - there is a task that has been deleted and that it should therefore - check the xTasksWaitingTermination list. */ - ++uxTasksDeleted; - } - taskEXIT_CRITICAL(); - - /* Force a reschedule if we have just deleted the current task. */ - if( xSchedulerRunning != pdFALSE ) - { - if( ( void * ) pxTaskToDelete == NULL ) - { - taskYIELD(); - } - } - } - -#endif - - - - - - -/*----------------------------------------------------------- - * TASK CONTROL API documented in task.h - *----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelayUntil == 1 ) - - void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement ) - { - portTickType xTimeToWake; - portBASE_TYPE xAlreadyYielded, xShouldDelay = pdFALSE; - - vTaskSuspendAll(); - { - /* Generate the tick time at which the task wants to wake. */ - xTimeToWake = *pxPreviousWakeTime + xTimeIncrement; - - if( xTickCount < *pxPreviousWakeTime ) - { - /* The tick count has overflowed since this function was - lasted called. In this case the only time we should ever - actually delay is if the wake time has also overflowed, - and the wake time is greater than the tick time. When this - is the case it is as if neither time had overflowed. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - else - { - /* The tick time has not overflowed. In this case we will - delay if either the wake time has overflowed, and/or the - tick time is less than the wake time. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - - /* Update the wake time ready for the next call. */ - *pxPreviousWakeTime = xTimeToWake; - - if( xShouldDelay ) - { - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - } - xAlreadyYielded = xTaskResumeAll(); - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelay == 1 ) - - void vTaskDelay( portTickType xTicksToDelay ) - { - portTickType xTimeToWake; - signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* A delay time of zero just forces a reschedule. */ - if( xTicksToDelay > ( portTickType ) 0 ) - { - vTaskSuspendAll(); - { - /* A task that is removed from the event list while the - scheduler is suspended will not get placed in the ready - list or removed from the blocked list until the scheduler - is resumed. - - This task cannot be in an event list as it is the currently - executing task. */ - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - xAlreadyYielded = xTaskResumeAll(); - } - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_uxTaskPriorityGet == 1 ) - - unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxReturn = pxTCB->uxPriority; - } - taskEXIT_CRITICAL(); - - return uxReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskPrioritySet == 1 ) - - void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxCurrentPriority, xYieldRequired = pdFALSE; - - /* Ensure the new priority is valid. */ - if( uxNewPriority >= configMAX_PRIORITIES ) - { - uxNewPriority = configMAX_PRIORITIES - 1; - } - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxCurrentPriority = pxTCB->uxPriority; - - if( uxCurrentPriority != uxNewPriority ) - { - /* The priority change may have readied a task of higher - priority than the calling task. */ - if( uxNewPriority > pxCurrentTCB->uxPriority ) - { - if( pxTask != NULL ) - { - /* The priority of another task is being raised. If we - were raising the priority of the currently running task - there would be no need to switch as it must have already - been the highest priority task. */ - xYieldRequired = pdTRUE; - } - } - else if( pxTask == NULL ) - { - /* Setting our own priority down means there may now be another - task of higher priority that is ready to execute. */ - xYieldRequired = pdTRUE; - } - - pxTCB->uxPriority = uxNewPriority; - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxNewPriority ); - - /* If the task is in the blocked or suspended list we need do - nothing more than change it's priority variable. However, if - the task is in a ready list it needs to be removed and placed - in the queue appropriate to its new priority. */ - if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxCurrentPriority ] ), &( pxTCB->xGenericListItem ) ) ) - { - /* The task is currently in its ready list - remove before adding - it to it's new ready list. As we are in a critical section we - can do this even if the scheduler is suspended. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - - if( xYieldRequired == pdTRUE ) - { - taskYIELD(); - } - } - } - taskEXIT_CRITICAL(); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskSuspend( xTaskHandle pxTaskToSuspend ) - { - tskTCB *pxTCB; - - taskENTER_CRITICAL(); - { - /* Ensure a yield is performed if the current task is being - suspended. */ - if( pxTaskToSuspend == pxCurrentTCB ) - { - pxTaskToSuspend = NULL; - } - - /* If null is passed in here then we are suspending ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToSuspend ); - - /* Remove task from the ready/delayed list and place in the suspended list. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ); - } - taskEXIT_CRITICAL(); - - /* We may have just suspended the current task. */ - if( ( void * ) pxTaskToSuspend == NULL ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskResume( xTaskHandle pxTaskToResume ) - { - tskTCB *pxTCB; - - /* Remove the task from whichever list it is currently in, and place - it in the ready list. */ - pxTCB = ( tskTCB * ) pxTaskToResume; - - /* The parameter cannot be NULL as it is impossible to resume the - currently executing task. */ - if( pxTCB != NULL ) - { - taskENTER_CRITICAL(); - { - /* Is the task we are attempting to resume actually suspended? */ - if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ) != pdFALSE ) - { - /* Has the task already been resumed from within an ISR? */ - if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) != pdTRUE ) - { - /* As we are in a critical section we can access the ready - lists even if the scheduler is suspended. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* We may have just resumed a higher priority task. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - /* This yield may not cause the task just resumed to run, but - will leave the lists in the correct state for the next yield. */ - taskYIELD(); - } - } - } - } - taskEXIT_CRITICAL(); - } - } - -#endif - -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - tskTCB *pxTCB; - - pxTCB = ( tskTCB * ) pxTaskToResume; - - /* Is the task we are attempting to resume actually suspended? */ - if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ) != pdFALSE ) - { - /* Has the task already been resumed from within an ISR? */ - if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) != pdTRUE ) - { - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - xYieldRequired = ( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed, at which point a - yield will be preformed if necessary. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxTCB->xEventListItem ) ); - } - } - } - - return xYieldRequired; - } - -#endif - - - - -/*----------------------------------------------------------- - * PUBLIC SCHEDULER CONTROL documented in task.h - *----------------------------------------------------------*/ - - -void vTaskStartScheduler( void ) -{ -portBASE_TYPE xReturn; - - /* Add the idle task at the lowest priority. */ - xReturn = xTaskCreate( prvIdleTask, ( signed portCHAR * ) "IDLE", tskIDLE_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, ( xTaskHandle * ) NULL ); - - if( xReturn == pdPASS ) - { - /* Interrupts are turned off here, to ensure a tick does not occur - before or during the call to xPortStartScheduler(). The stacks of - the created tasks contain a status word with interrupts switched on - so interrupts will automatically get re-enabled when the first task - starts to run. - - STEPPING THROUGH HERE USING A DEBUGGER CAN CAUSE BIG PROBLEMS IF THE - DEBUGGER ALLOWS INTERRUPTS TO BE PROCESSED. */ - portDISABLE_INTERRUPTS(); - - xSchedulerRunning = pdTRUE; - xTickCount = ( portTickType ) 0; - - /* Setting up the timer tick is hardware specific and thus in the - portable interface. */ - if( xPortStartScheduler() ) - { - /* Should not reach here as if the scheduler is running the - function will not return. */ - } - else - { - /* Should only reach here if a task calls xTaskEndScheduler(). */ - } - } -} -/*-----------------------------------------------------------*/ - -void vTaskEndScheduler( void ) -{ - /* Stop the scheduler interrupts and call the portable scheduler end - routine so the original ISRs can be restored if necessary. The port - layer must ensure interrupts enable bit is left in the correct state. */ - portDISABLE_INTERRUPTS(); - xSchedulerRunning = pdFALSE; - vPortEndScheduler(); -} -/*----------------------------------------------------------*/ - -void vTaskSuspendAll( void ) -{ - portENTER_CRITICAL(); - ++uxSchedulerSuspended; - portEXIT_CRITICAL(); -} -/*----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskResumeAll( void ) -{ -register tskTCB *pxTCB; -signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* It is possible that an ISR caused a task to be removed from an event - list while the scheduler was suspended. If this was the case then the - removed task will have been added to the xPendingReadyList. Once the - scheduler has been resumed it is safe to move all the pending ready - tasks from this list into their appropriate ready list. */ - portENTER_CRITICAL(); - { - --uxSchedulerSuspended; - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - if( uxCurrentNumberOfTasks > ( unsigned portBASE_TYPE ) 0 ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - - /* Move any readied tasks from the pending list into the - appropriate ready list. */ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xPendingReadyList ) ) ) != NULL ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* If we have moved a task that has a priority higher than - the current task then we should yield. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - xYieldRequired = pdTRUE; - } - } - - /* If any ticks occurred while the scheduler was suspended then - they should be processed now. This ensures the tick count does not - slip, and that any delayed tasks are resumed at the correct time. */ - if( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - while( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskIncrementTick(); - --uxMissedTicks; - } - - /* As we have processed some ticks it is appropriate to yield - to ensure the highest priority task that is ready to run is - the task actually running. */ - xYieldRequired = pdTRUE; - } - - if( ( xYieldRequired == pdTRUE ) || ( xMissedYield == pdTRUE ) ) - { - xAlreadyYielded = pdTRUE; - xMissedYield = pdFALSE; - taskYIELD(); - } - } - } - } - portEXIT_CRITICAL(); - - return xAlreadyYielded; -} - - - - - - -/*----------------------------------------------------------- - * PUBLIC TASK UTILITIES documented in task.h - *----------------------------------------------------------*/ - - - -portTickType xTaskGetTickCount( void ) -{ -portTickType xTicks; - - /* Critical section required if running on a 16 bit processor. */ - taskENTER_CRITICAL(); - { - xTicks = xTickCount; - } - taskEXIT_CRITICAL(); - - return xTicks; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ) -{ -unsigned portBASE_TYPE uxNumberOfTasks; - - taskENTER_CRITICAL(); - uxNumberOfTasks = uxCurrentNumberOfTasks; - taskEXIT_CRITICAL(); - - return uxNumberOfTasks; -} -/*-----------------------------------------------------------*/ - -#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_vTaskDelete == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskList( signed portCHAR *pcWriteBuffer ) - { - unsigned portBASE_TYPE uxQueue; - - /* This is a VERY costly function that should be used for debug only. - It leaves interrupts disabled for a LONG time. */ - - vTaskSuspendAll(); - { - /* Run through all the lists that could potentially contain a TCB and - report the task name, state and stack high water mark. */ - - pcWriteBuffer[ 0 ] = ( signed portCHAR ) 0x00; - strcat( ( portCHAR * ) pcWriteBuffer, ( const portCHAR * ) "\r\n" ); - - uxQueue = uxTopUsedPriority + 1; - - do - { - uxQueue--; - - if( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxQueue ] ) ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &( pxReadyTasksLists[ uxQueue ] ), tskREADY_CHAR ); - } - }while( uxQueue > ( unsigned portSHORT ) tskIDLE_PRIORITY ); - - if( !listLIST_IS_EMPTY( pxDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( pxOverflowDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxOverflowDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( &xTasksWaitingTermination ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xTasksWaitingTermination, tskDELETED_CHAR ); - } - - if( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xSuspendedTaskList, tskSUSPENDED_CHAR ); - } - } - xTaskResumeAll(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - void vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize ) - { - portENTER_CRITICAL(); - { - pcTraceBuffer = ( volatile signed portCHAR * volatile )pcBuffer; - pcTraceBufferStart = pcBuffer; - pcTraceBufferEnd = pcBuffer + ( ulBufferSize - tskSIZE_OF_EACH_TRACE_LINE ); - xTracing = pdTRUE; - } - portEXIT_CRITICAL(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned portLONG ulTaskEndTrace( void ) - { - unsigned portLONG ulBufferLength; - - portENTER_CRITICAL(); - xTracing = pdFALSE; - portEXIT_CRITICAL(); - - ulBufferLength = ( unsigned portLONG ) ( pcTraceBuffer - pcTraceBufferStart ); - - return ulBufferLength; - } - -#endif - - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - * documented in task.h - *----------------------------------------------------------*/ - - -inline void vTaskIncrementTick( void ) -{ - /* Called by the portable layer each time a tick interrupt occurs. - Increments the tick then checks to see if the new tick value will cause any - tasks to be unblocked. */ - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - ++xTickCount; - if( xTickCount == ( portTickType ) 0 ) - { - xList *pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. - If there are any items in pxDelayedTaskList here then there is - an error! */ - pxTemp = pxDelayedTaskList; - pxDelayedTaskList = pxOverflowDelayedTaskList; - pxOverflowDelayedTaskList = pxTemp; - xNumOfOverflows++; - } - - /* See if this tick has made a timeout expire. */ - prvCheckDelayedTasks(); - } - else - { - ++uxMissedTicks; - - /* The tick hook gets called at regular intervals, even if the - scheduler is locked. */ - #if ( configUSE_TICK_HOOK == 1 ) - { - extern void vApplicationTickHook( void ); - - vApplicationTickHook(); - } - #endif - } - - #if ( configUSE_TICK_HOOK == 1 ) - { - extern void vApplicationTickHook( void ); - - /* Guard against the tick hook being called when the missed tick - count is being unwound (when the scheduler is being unlocked. */ - if( uxMissedTicks == 0 ) - { - vApplicationTickHook(); - } - } - #endif -} -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_vTaskCleanUpResources == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskCleanUpResources( void ) - { - unsigned portSHORT usQueue; - volatile tskTCB *pxTCB; - - usQueue = ( unsigned portSHORT ) uxTopUsedPriority + ( unsigned portSHORT ) 1; - - /* Remove any TCB's from the ready queues. */ - do - { - usQueue--; - - while( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ usQueue ] ) ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &( pxReadyTasksLists[ usQueue ] ) ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - }while( usQueue > ( unsigned portSHORT ) tskIDLE_PRIORITY ); - - /* Remove any TCB's from the delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList1 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList1 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - /* Remove any TCB's from the overflow delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList2 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList2 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - while( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xSuspendedTaskList ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - while( !listLIST_IS_EMPTY( &xPendingReadyList ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xPendingReadyList ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - } - -#endif -/*-----------------------------------------------------------*/ - -void vTaskSwitchContext( void ) -{ - if( uxSchedulerSuspended != ( unsigned portBASE_TYPE ) pdFALSE ) - { - /* The scheduler is currently suspended - do not allow a context - switch. */ - xMissedYield = pdTRUE; - return; - } - - /* Find the highest priority queue that contains ready tasks. */ - while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopReadyPriority ] ) ) ) - { - --uxTopReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the tasks of the - same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopReadyPriority ] ) ); - vWriteTraceToBuffer(); -} -/*-----------------------------------------------------------*/ - -void vTaskPlaceOnEventList( xList *pxEventList, portTickType xTicksToWait ) -{ -portTickType xTimeToWake; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. */ - - /* Place the event list item of the TCB in the appropriate event list. - This is placed in the list in priority order so the highest priority task - is the first to be woken by the event. */ - vListInsert( ( xList * ) pxEventList, ( xListItem * ) &( pxCurrentTCB->xEventListItem ) ); - - /* Calculate the time at which the task should be woken if the event does - not occur. This may overflow but this doesn't matter. */ - xTimeToWake = xTickCount + xTicksToWait; - - /* We must remove ourselves from the ready list before adding ourselves - to the blocked list as the same list item is used for both lists. We have - exclusive access to the ready lists as the scheduler is locked. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskRemoveFromEventList( const xList *pxEventList ) -{ -tskTCB *pxUnblockedTCB; -portBASE_TYPE xReturn; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. It can also be called from within an ISR. */ - - /* The event list is sorted in priority order, so we can remove the - first in the list, remove the TCB from the delayed list, and add - it to the ready list. - - If an event is for a queue that is locked then this function will never - get called - the lock count on the queue will get modified instead. This - means we can always expect exclusive access to the event list here. */ - pxUnblockedTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedTCB->xEventListItem ) ); - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - vListRemove( &( pxUnblockedTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxUnblockedTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) ); - } - - if( pxUnblockedTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - /* Return true if the task removed from the event list has - a higher priority than the calling task. This allows - the calling task to know if it should force a context - switch now. */ - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vTaskSetTimeOutState( xTimeOutType *pxTimeOut ) -{ - pxTimeOut->xOverflowCount = xNumOfOverflows; - pxTimeOut->xTimeOnEntering = xTickCount; -} -/*-----------------------------------------------------------*/ - -portBASE_TYPE xTaskCheckForTimeOut( xTimeOutType *pxTimeOut, portTickType *pxTicksToWait ) -{ -portBASE_TYPE xReturn; - - if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xTickCount > pxTimeOut->xTimeOnEntering ) ) - { - /* The tick count is greater than the time at which vTaskSetTimeout() - was called, but has also overflowed since vTaskSetTimeOut() was called. - It must have wrapped all the way around and gone past us again. This - passed since vTaskSetTimeout() was called. */ - xReturn = pdTRUE; - } - else if( ( xTickCount - pxTimeOut->xTimeOnEntering ) < *pxTicksToWait ) - { - /* Not a genuine timeout. Adjust parameters for time remaining. */ - *pxTicksToWait -= ( xTickCount - pxTimeOut->xTimeOnEntering ); - vTaskSetTimeOutState( pxTimeOut ); - xReturn = pdFALSE; - } - else - { - xReturn = pdTRUE; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vTaskMissedYield( void ) -{ - xMissedYield = pdTRUE; -} - -/* - * ----------------------------------------------------------- - * The Idle task. - * ---------------------------------------------------------- - * - * The portTASK_FUNCTION() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION( prvIdleTask, pvParameters ) -{ - /* Stop warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /* See if any tasks have been deleted. */ - prvCheckTasksWaitingTermination(); - - #if ( configUSE_PREEMPTION == 0 ) - { - /* If we are not using preemption we keep forcing a task switch to - see if any other task has become available. If we are using - preemption we don't need to do this as any task becoming available - will automatically get the processor anyway. */ - taskYIELD(); - } - #endif - - #if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) - { - /* When using preemption tasks of equal priority will be - timesliced. If a task that is sharing the idle priority is ready - to run then the idle task should yield before the end of the - timeslice. - - A critical region is not required here as we are just reading from - the list, and an occasional incorrect value will not matter. If - the ready list at the idle priority contains more than one task - then a task other than the idle task is ready to execute. */ - if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( unsigned portBASE_TYPE ) 1 ) - { - taskYIELD(); - } - } - #endif - - #if ( configUSE_IDLE_HOOK == 1 ) - { - extern void vApplicationIdleHook( void ); - - /* Call the user defined function from within the idle task. This - allows the application designer to add background functionality - without the overhead of a separate task. - NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES, - CALL A FUNCTION THAT MIGHT BLOCK. */ - vApplicationIdleHook(); - } - #endif - } -} /*lint !e715 pvParameters is not accessed but all task functions require the same prototype. */ - - - - - - - -/*----------------------------------------------------------- - * File private functions documented at the top of the file. - *----------------------------------------------------------*/ - - - -static void prvInitialiseTCBVariables( tskTCB *pxTCB, unsigned portSHORT usStackDepth, const signed portCHAR * const pcName, unsigned portBASE_TYPE uxPriority ) -{ - pxTCB->usStackDepth = usStackDepth; - - /* Store the function name in the TCB. */ - strncpy( ( char * ) pxTCB->pcTaskName, ( const char * ) pcName, ( unsigned portSHORT ) configMAX_TASK_NAME_LEN ); - pxTCB->pcTaskName[ ( unsigned portSHORT ) configMAX_TASK_NAME_LEN - ( unsigned portSHORT ) 1 ] = '\0'; - - /* This is used as an array index so must ensure it's not too large. */ - if( uxPriority >= configMAX_PRIORITIES ) - { - uxPriority = configMAX_PRIORITIES - 1; - } - - pxTCB->uxPriority = uxPriority; - - vListInitialiseItem( &( pxTCB->xGenericListItem ) ); - vListInitialiseItem( &( pxTCB->xEventListItem ) ); - - /* Set the pxTCB as a link back from the xListItem. This is so we can get - back to the containing TCB from a generic item in a list. */ - listSET_LIST_ITEM_OWNER( &( pxTCB->xGenericListItem ), pxTCB ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - listSET_LIST_ITEM_OWNER( &( pxTCB->xEventListItem ), pxTCB ); -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseTaskLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyTasksLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedTaskList1 ); - vListInitialise( ( xList * ) &xDelayedTaskList2 ); - vListInitialise( ( xList * ) &xPendingReadyList ); - - #if ( INCLUDE_vTaskDelete == 1 ) - { - vListInitialise( ( xList * ) &xTasksWaitingTermination ); - } - #endif - - #if ( INCLUDE_vTaskSuspend == 1 ) - { - vListInitialise( ( xList * ) &xSuspendedTaskList ); - } - #endif - - /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList - using list2. */ - pxDelayedTaskList = &xDelayedTaskList1; - pxOverflowDelayedTaskList = &xDelayedTaskList2; -} -/*-----------------------------------------------------------*/ - -static void prvCheckTasksWaitingTermination( void ) -{ - #if ( INCLUDE_vTaskDelete == 1 ) - { - portBASE_TYPE xListIsEmpty; - - /* ucTasksDeleted is used to prevent vTaskSuspendAll() being called - too often in the idle task. */ - if( uxTasksDeleted > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskSuspendAll(); - xListIsEmpty = listLIST_IS_EMPTY( &xTasksWaitingTermination ); - xTaskResumeAll(); - - if( !xListIsEmpty ) - { - tskTCB *pxTCB; - - portENTER_CRITICAL(); - { - pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xTasksWaitingTermination ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - --uxCurrentNumberOfTasks; - --uxTasksDeleted; - } - portEXIT_CRITICAL(); - - prvDeleteTCB( pxTCB ); - } - } - } - #endif -} -/*-----------------------------------------------------------*/ - -static tskTCB *prvAllocateTCBAndStack( unsigned portSHORT usStackDepth ) -{ -tskTCB *pxNewTCB; - - /* Allocate space for the TCB. Where the memory comes from depends on - the implementation of the port malloc function. */ - pxNewTCB = ( tskTCB * ) pvPortMalloc( sizeof( tskTCB ) ); - - if( pxNewTCB != NULL ) - { - /* Allocate space for the stack used by the task being created. - The base of the stack memory stored in the TCB so the task can - be deleted later if required. */ - pxNewTCB->pxStack = ( portSTACK_TYPE * ) pvPortMalloc( ( ( size_t )usStackDepth ) * sizeof( portSTACK_TYPE ) ); - - if( pxNewTCB->pxStack == NULL ) - { - /* Could not allocate the stack. Delete the allocated TCB. */ - vPortFree( pxNewTCB ); - pxNewTCB = NULL; - } - else - { - /* Just to help debugging. */ - memset( pxNewTCB->pxStack, tskSTACK_FILL_BYTE, usStackDepth * sizeof( portSTACK_TYPE ) ); - } - } - - return pxNewTCB; -} -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( signed portCHAR *pcWriteBuffer, xList *pxList, signed portCHAR cStatus ) - { - volatile tskTCB *pxNextTCB, *pxFirstTCB; - static portCHAR pcStatusString[ 50 ]; - unsigned portSHORT usStackRemaining; - - /* Write the details of all the TCB's in pxList into the buffer. */ - listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); - do - { - listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); - usStackRemaining = usTaskCheckFreeStackSpace( ( unsigned portCHAR * ) pxNextTCB->pxStack ); - sprintf( pcStatusString, ( portCHAR * ) "%s\t\t%c\t%u\t%u\t%u\r\n", pxNextTCB->pcTaskName, cStatus, ( unsigned int ) pxNextTCB->uxPriority, usStackRemaining, ( unsigned int ) pxNextTCB->uxTCBNumber ); - strcat( ( portCHAR * ) pcWriteBuffer, ( portCHAR * ) pcStatusString ); - - } while( pxNextTCB != pxFirstTCB ); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - unsigned portSHORT usTaskCheckFreeStackSpace( const unsigned portCHAR *pucStackByte ) - { - register unsigned portSHORT usCount = 0; - - while( *pucStackByte == tskSTACK_FILL_BYTE ) - { - pucStackByte -= portSTACK_GROWTH; - usCount++; - } - - usCount /= sizeof( portSTACK_TYPE ); - - return usCount; - } -#endif -/*-----------------------------------------------------------*/ - - - -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - - static void prvDeleteTCB( tskTCB *pxTCB ) - { - /* Free up the memory allocated by the scheduler for the task. It is up to - the task to free any memory allocated at the application level. */ - vPortFree( pxTCB->pxStack ); - vPortFree( pxTCB ); - } - -#endif - - -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) - - xTaskHandle xTaskGetCurrentTaskHandle( void ) - { - xTaskHandle xReturn; - - portENTER_CRITICAL(); - { - xReturn = ( xTaskHandle ) pxCurrentTCB; - } - portEXIT_CRITICAL(); - - return xReturn; - } - -#endif - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/71x_lib.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/71x_lib.c deleted file mode 100644 index fcc5896a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/71x_lib.c +++ /dev/null @@ -1,159 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_lib.c -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Peripherals pointers initialization -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#define EXT - -#include "71x_map.h" - -#ifdef LIBDEBUG - -extern u32 T0TIMI_Addr; - -/******************************************************************************* -* Function Name : debug -* Description : Initialize the pointers to peripherals -* Input : none -* Output : none -* Return : none -*******************************************************************************/ -void libdebug(void) -{ - #ifdef _ADC12 - ADC12 = (ADC12_TypeDef *)ADC12_BASE; - #endif - - #ifdef _APB - #ifdef _APB1 - APB1 = (APB_TypeDef *)(APB1_BASE+0x10); - #endif - #ifdef _APB2 - APB2 = (APB_TypeDef *)(APB2_BASE+0x10); - #endif - #endif - - #ifdef _BSPI - #ifdef _BSPI0 - BSPI0 = (BSPI_TypeDef *)BSPI0_BASE; - #endif - #ifdef _BSPI1 - BSPI1 = (BSPI_TypeDef *)BSPI1_BASE; - #endif - #endif - - #ifdef _CAN - CAN = (CAN_TypeDef *)CAN_BASE; - #endif - - #ifdef _EIC - EIC = (EIC_TypeDef *)EIC_BASE; - #endif - - #ifdef _EMI - EMI = (EMI_TypeDef *)EMI_BASE; - #endif - - #ifdef _FLASH - FLASHR = (FLASHR_TypeDef *)FLASHR_BASE; - FLASHPR = (FLASHPR_TypeDef *)FLASHPR_BASE; - #endif - - #ifdef _GPIO - #ifdef _GPIO0 - GPIO0 = (GPIO_TypeDef *)GPIO0_BASE; - #endif - #ifdef _GPIO1 - GPIO1 = (GPIO_TypeDef *)GPIO1_BASE; - #endif - #ifdef _GPIO2 - GPIO2 = (GPIO_TypeDef *)GPIO2_BASE; - #endif - #endif - - #ifdef _I2C - #ifdef _I2C0 - I2C0 = (I2C_TypeDef *)I2C0_BASE; - #endif - #ifdef _I2C1 - I2C1 = (I2C_TypeDef *)I2C1_BASE; - #endif - #endif - - #ifdef _PCU - PCU = (PCU_TypeDef *)PCU_BASE; - #endif - - #ifdef _RCCU - RCCU = (RCCU_TypeDef *)RCCU_BASE; - #endif - - #ifdef _RTC - RTC = (RTC_TypeDef *)RTC_BASE; - #endif - - #ifdef _TIM - #ifdef _TIM0 - TIM0 = (TIM_TypeDef *)TIM0_BASE; - #endif - #ifdef _TIM1 - TIM1 = (TIM_TypeDef *)TIM1_BASE; - #endif - #ifdef _TIM2 - TIM2 = (TIM_TypeDef *)TIM2_BASE; - #endif - #ifdef _TIM3 - TIM3 = (TIM_TypeDef *)TIM3_BASE; - #endif - #endif - - #ifdef _UART - #ifdef _UART0 - UART0 = (UART_TypeDef *)UART0_BASE; - #endif - #ifdef _UART1 - UART1 = (UART_TypeDef *)UART1_BASE; - #endif - #ifdef _UART2 - UART2 = (UART_TypeDef *)UART2_BASE; - #endif - #ifdef _UART3 - UART3 = (UART_TypeDef *)UART3_BASE; - #endif - #endif - - #ifdef _USB - USB = (USB_TypeDef *)USB_BASE; - #endif - - #ifdef _WDG - WDG = (WDG_TypeDef *)WDG_BASE; - #endif - - #ifdef _XTI - XTI = (XTI_TypeDef *)XTI_BASE; - #endif - - #ifdef _IRQVectors - IRQVectors = (IRQVectors_TypeDef *)&T0TIMI_Addr; - #endif -} - -#endif /* LIBDEBUG */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/adc12.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/adc12.c deleted file mode 100644 index da23919d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/adc12.c +++ /dev/null @@ -1,84 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : adc12.c -* Author : MCD Application Team -* Date First Issued : 07/31/2003 -* Description : This file provides all the ADC12 software functions. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#include "adc12.h" - - -/******************************************************************************* -* Function Name : ADC12_Init -* Description : This routine is used to initialize the ADC12 registers to -* their reset values -* Input : None. -* Return : None. -*******************************************************************************/ -void ADC12_Init(void) -{ - /* Initiate ADC12 registers to their reset values */ - ADC12->CSR = 0x0000; - ADC12->CPR = 0x0005; -} - -/******************************************************************************* -* Function Name : ADC12_PrescalerConfig -* Description : This routine is used to configure the prescaler register -* Input : Adc12_clk: Sampling frequency in Hz. -* Return : None. -*******************************************************************************/ -void ADC12_PrescalerConfig(u32 Adc12_clk) -{ - /* Update the Prescaler Register */ - ADC12->CPR = (vu16) (RCCU_FrequencyValue(RCCU_PCLK)/(Adc12_clk*512*8)); -} - -/******************************************************************************* -* Function Name : ADC12_ITConfig -* Description : This routine is used to enable or disable the interrupt - routine. -* Input : NewState = ENABLE => Enable the interrupt routine. -* NewState = DISABLE => Disable the interrupt routine. -* Return : None -*******************************************************************************/ -void ADC12_ITConfig(FunctionalState NewState) -{ - if (NewState == ENABLE) - { - /* If the single mode is selected */ - if (ADC12->CSR & 0x0040) - { - /* Set the corresponding interrupt bit according to the selected channel */ - switch (ADC12->CSR & 0x30) - { - case 0x00 : ADC12->CSR |= ADC12_IT0_Mask; break; - case 0x10 : ADC12->CSR |= ADC12_IT1_Mask; break; - case 0x20 : ADC12->CSR |= ADC12_IT2_Mask; break; - case 0x30 : ADC12->CSR |= ADC12_IT3_Mask; break; - } - } - - else - /* Set all interrupt bits in case of round robin mode is selected */ - ADC12->CSR |= ADC12_IT_Mask; - } - else - /* Clear all interrupt bits */ - ADC12->CSR &= ~ADC12_IT_Mask; -} -/*********************(c) 2003 STMicroelectronics********************* END OF FILE **/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/apb.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/apb.c deleted file mode 100644 index 3e9d270d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/apb.c +++ /dev/null @@ -1,25 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : apb.c -* Author : MCD Application Team -* Date First Issued : 05/30/2003 -* Description : This file provides all the APB software functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "apb.h" - - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/bspi.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/bspi.c deleted file mode 100644 index 4c581ce0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/bspi.c +++ /dev/null @@ -1,172 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : bspi.c -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : This file provides all the BSPI software functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "bspi.h" - -/******************************************************************************* -* Function Name : BSPI_Init -* Description : Initializes BSPI peripheral control and registers to their default reset values. -* Input : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Output : BSPI peripheral registers and BSPI global variables are initialized. -* Return : None. -*******************************************************************************/ -void BSPI_Init(BSPI_TypeDef *BSPIx) -{ - BSPIx->CSR2 = 0x41; - BSPIx->CSR1 = 0x00; - BSPIx->CLK = 0x06; -} - -/******************************************************************************* -* Function Name : BSPI_TrItSrc. -* Description : Configures the transmit interrupt source. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : TrItSrc: specifies the transmit interrupt source. -* : Refer to the section ‘Transmit Interrupt Sources’ for more details on the -* : allowed values of this parameter. -* Output : TIE bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -void BSPI_TrItSrc(BSPI_TypeDef *BSPIx, BSPI_TR_IT_SRCS TrItSrc) -{ - switch (TrItSrc) - { - case BSPI_TR_DIS: - BSPIx->CSR2 &= ~0xC000; - break; - case BSPI_TR_FE: - BSPIx->CSR2 &= ~0x8000; - BSPIx->CSR2 |= 0x4000; - break; - case BSPI_TR_UFL: - BSPIx->CSR2 &= ~0x4000; - BSPIx->CSR2 |= 0x8000; - break; - case BSPI_TR_FF: - BSPIx->CSR2 |= 0xC000; - break; - } -} - -/******************************************************************************* -* Function Name : BSPI_RcItSrc. -* Description : Configures the receive interrupt source. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : RcItSrc: specifies the source for the receive interrupt. -* : Refer to the section ‘Receive Interrupt Sources’ for more details on the -* : allowed values of this parameter. -* Output : RIE bit in BSPCSR1 is register. -* Return : None. -*******************************************************************************/ -void BSPI_RcItSrc(BSPI_TypeDef *BSPIx, BSPI_RC_IR_SRCS RcItSrc) -{ - switch (RcItSrc) - { - case BSPI_RC_DIS: - BSPIx->CSR1 &= ~0x000C; - break; - case BSPI_RC_FNE: - BSPIx->CSR1 &= ~0x0008; - BSPIx->CSR1 |= 0x0004; - break; - case BSPI_RC_FF: - BSPIx->CSR1 |= 0x000C; - break; - } -} - -/******************************************************************************* -* Function Name : BSPI_TrFifoDepth -* Description : Configures BSPI transmission FIFO number of words. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI. -* Input 2 : TDepth:specifies the depth of the transmit FIFO. -* Output : TFE bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -void BSPI_TrFifoDepth(BSPI_TypeDef *BSPIx, u8 TDepth) -{ - if (TDepth > 0 && TDepth < 11) - { - TDepth--; - BSPIx->CSR2 &= (TDepth*0x400) | ~0x3C00; - BSPIx->CSR2 |= TDepth*0x400; - } - else BSPIx->CSR2 &= ~0x3C00; -} - -/******************************************************************************* -* Function Name : BSPI_RcFifoDepth -* Description : Configures BSPI reception FIFO number of words. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : RDepth:specifies the depth of the receive FIFO. -* Output : RFE bits [3:0] in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -void BSPI_RcFifoDepth(BSPI_TypeDef *BSPIx, u8 RDepth) -{ - if (RDepth > 0 && RDepth < 11) - { - RDepth--; - BSPIx->CSR1 &= (RDepth*0x1000) | ~0xF000; - BSPIx->CSR1 |= RDepth*0x1000; - } - else BSPIx->CSR1 &= ~0xF000; -} - -/******************************************************************************* -* Function Name : BSPI_BufferSend. -* Description : Transmits data from a buffer. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : PtrToBuffer is an ‘u8’ pointer to the first word of the buffer to be transmitted. -* Input 3 : NbOfWords parameter indicates the number of words saved in the buffer to be sent. -* Output : None. -* Return : None. -*******************************************************************************/ -void BSPI_BufferSend(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords) -{ - vu8 SendWord = 0; - while (SendWord < NbOfWords) - { - BSPI_WordSend(BSPIx, *(PtrToBuffer+SendWord)); - SendWord++; - } -} - -/******************************************************************************* -* Function Name : BSPI_BufferReceive. -* Description : Receives number of data words and stores them in user defined area. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : PtrToBuffer is an ‘u8’ pointer to the first word of the defined area to save the received buffer. -* Input 3 : NbOfWords parameter indicates the number of words to be received in the buffer. -* Output : None. -* Return : None. -*******************************************************************************/ -void BSPI_BufferReceive(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords) -{ - vu16 ReceiveWord = 0; - while (ReceiveWord < NbOfWords) - { - *(PtrToBuffer+ReceiveWord) = BSPI_WordReceive(BSPIx); - ReceiveWord++; - } -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/can.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/can.c deleted file mode 100644 index ae3ccc90..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/can.c +++ /dev/null @@ -1,546 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : can.c -* Author : MCD Application Team -* Date First Issued : 10/27/2003 -* Description : This file contains all the functions prototypes for the -* CAN bus software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "can.h" -#include "xti.h" -#include "pcu.h" - -// macro to format the timing register value from the timing parameters -#define CAN_TIMING(tseg1, tseg2, sjw, brp) (((tseg2-1) & 0x07) << 12) | (((tseg1-1) & 0x0F) << 8) | (((sjw-1) & 0x03) << 6) | ((brp-1) & 0x3F) - -// array of pre-defined timing parameters for standard bitrates -u16 CanTimings[] = { /* value bitrate NTQ TSEG1 TSEG2 SJW BRP */ - CAN_TIMING(11, 4, 4, 5), /* 0x3AC4 100 kbit/s 16 11 4 4 5 */ - CAN_TIMING(11, 4, 4, 4), /* 0x3AC3 125 kbit/s 16 11 4 4 4 */ - CAN_TIMING( 4, 3, 3, 4), /* 0x2383 250 kbit/s 8 4 3 3 4 */ - CAN_TIMING(13, 2, 1, 1), /* 0x1C00 500 kbit/s 16 13 2 1 1 */ - CAN_TIMING( 4, 3, 1, 1), /* 0x2300 1 Mbit/s 8 4 3 1 1 */ -}; - -/******************************************************************************* -* Function Name : CAN_SetBitrate -* Description : Setup a standard CAN bitrate -* Input 1 : one of the CAN_BITRATE_xxx defines -* Output : None -* Return : None -* Note : CAN must be in initialization mode -*******************************************************************************/ -void CAN_SetBitrate(u32 bitrate) -{ - /* write the predefined timing value */ - CAN->BTR = CanTimings[bitrate]; - - /* clear the Extended Baud Rate Prescaler */ - CAN->BRPR = 0; -} - -/******************************************************************************* -* Function Name : CAN_SetTiming -* Description : Setup the CAN timing with specific parameters -* Input 1 : Time Segment before the sample point position, from 2 to 16 -* Input 2 : Time Segment after the sample point position, from 1 to 8 -* Input 3 : Synchronisation Jump Width, from 1 to 4 -* Input 4 : Baud Rate Prescaler, from 1 to 1024 -* Output : None -* Return : None -* Note : CAN must be in initialization mode -*******************************************************************************/ -void CAN_SetTiming(u32 tseg1, u32 tseg2, u32 sjw, u32 brp) -{ - CAN->BTR = CAN_TIMING(tseg1, tseg2, sjw, brp); - CAN->BRPR = ((brp-1) >> 6) & 0x0F; -} - -/******************************************************************************* -* Function Name : CAN_SleepRequest -* Description : Request the CAN cell to enter sleep mode -* Input 1 : CAN_WAKEUP_ON_EXT or CAN_WAKEUP_ON_CAN -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SleepRequest(u32 WakeupMode) -{ - /* Wakeup Line 6 is linked to CAN RX pin (port 1.11) */ - /* Wakeup Line 2 is linked to external pin (port 2.8) */ - u32 WakeupLine = (WakeupMode == CAN_WAKEUP_ON_CAN ? XTI_Line6 : XTI_Line2); - - CAN_WaitEndOfTx(); - - XTI_Init(); - - /* Configure the Wakeup Line mode, select Falling edge (transition to dominant state) */ - XTI_LineModeConfig(WakeupLine, XTI_FallingEdge); - - /* Enable Wake-Up interrupt */ - XTI_LineConfig(WakeupLine, ENABLE); - - /* Enable Wake-Up mode with interrupt */ - XTI_ModeConfig(XTI_WakeUpInterrupt, ENABLE); - - XTI_PendingBitClear(XTI_InterruptLineValue()); - - /* Enter STOP mode (resume execution from here) */ - PCU_LPMEnter(PCU_STOP); -} - -/******************************************************************************* -* Function Name : CAN_GetFreeIF -* Description : Search the first free message interface, starting from 0 -* Input : None -* Output : None -* Return : A free message interface number (0 or 1) if found, else 2 -*******************************************************************************/ -static u32 CAN_GetFreeIF(void) -{ - if ((CAN->sMsgObj[0].CRR & CAN_CRR_BUSY) == 0) - return 0; - else if ((CAN->sMsgObj[1].CRR & CAN_CRR_BUSY) == 0) - return 1; - else return 2; -} - -/******************************************************************************* -* Macro Name : xxx_ID_MSK, xxx_ID_ARB -* Description : Form the Mask and Arbitration registers value to filter a -* range of identifiers or a fixed identifier, for standard -* and extended IDs -*******************************************************************************/ -#define RANGE_ID_MSK(range_start, range_end) (~((range_end) - (range_start))) -#define RANGE_ID_ARB(range_start, range_end) ((range_start) & (range_end)) - -#define FIXED_ID_MSK(id) RANGE_ID_MSK((id), (id)) -#define FIXED_ID_ARB(id) RANGE_ID_ARB((id), (id)) - -#define STD_RANGE_ID_MSK(range_start, range_end) ((u16)((RANGE_ID_MSK((range_start), (range_end)) & 0x7FF) << 2)) -#define STD_RANGE_ID_ARB(range_start, range_end) ((u16)(RANGE_ID_ARB((range_start), (range_end)) << 2)) - -#define STD_FIXED_ID_MSK(id) ((u16)((FIXED_ID_MSK(id) & 0x7FF) << 2)) -#define STD_FIXED_ID_ARB(id) ((u16)(FIXED_ID_ARB(id) << 2)) - -#define EXT_RANGE_ID_MSK_L(range_start, range_end) ((u16)(RANGE_ID_MSK((range_start), (range_end)) >> 11)) -#define EXT_RANGE_ID_MSK_H(range_start, range_end) ((u16)(STD_RANGE_ID_MSK((range_start), (range_end)) | ((RANGE_ID_MSK((range_start), (range_end)) >> 27) & 0x03))) -#define EXT_RANGE_ID_ARB_L(range_start, range_end) ((u16)(RANGE_ID_ARB((range_start), (range_end)) >> 11)) -#define EXT_RANGE_ID_ARB_H(range_start, range_end) ((u16)(STD_RANGE_ID_ARB((range_start), (range_end)) | ((RANGE_ID_ARB((range_start), (range_end)) >> 27) & 0x03))) - -#define EXT_FIXED_ID_MSK_L(id) ((u16)(FIXED_ID_MSK(id) >> 11)) -#define EXT_FIXED_ID_MSK_H(id) ((u16)(STD_FIXED_ID_MSK(id) | ((FIXED_ID_MSK(id) >> 27) & 0x03))) -#define EXT_FIXED_ID_ARB_L(id) ((u16)(FIXED_ID_ARB(id) >> 11)) -#define EXT_FIXED_ID_ARB_H(id) ((u16)(STD_FIXED_ID_ARB(id) | ((FIXED_ID_ARB(id) >> 27) & 0x03))) - -/******************************************************************************* -* Function Name : CAN_SetUnusedMsgObj -* Description : Configure the message object as unused -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetUnusedMsgObj(u32 msgobj) -{ - u32 msg_if; - while ((msg_if = CAN_GetFreeIF()) == 2); - - CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD - | CAN_CMR_MASK - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - CAN->sMsgObj[msg_if].M1R = 0; - CAN->sMsgObj[msg_if].M2R = 0; - - CAN->sMsgObj[msg_if].A1R = 0; - CAN->sMsgObj[msg_if].A2R = 0; - - CAN->sMsgObj[msg_if].MCR = 0; - - CAN->sMsgObj[msg_if].DA1R = 0; - CAN->sMsgObj[msg_if].DA2R = 0; - CAN->sMsgObj[msg_if].DB1R = 0; - CAN->sMsgObj[msg_if].DB2R = 0; - - CAN->sMsgObj[msg_if].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_SetTxMsgObj -* Description : Configure the message object as TX -* Input 1 : message object number, from 0 to 31 -* Input 2 : CAN_STD_ID or CAN_EXT_ID -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetTxMsgObj(u32 msgobj, u32 idType) -{ - u32 msg_if; - while ((msg_if = CAN_GetFreeIF()) == 2); - - CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD - | CAN_CMR_MASK - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - CAN->sMsgObj[msg_if].M1R = 0; - CAN->sMsgObj[msg_if].A1R = 0; - - if (idType == CAN_STD_ID) - { - CAN->sMsgObj[msg_if].M2R = CAN_M2R_MDIR; - CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_DIR; - } - else - { - CAN->sMsgObj[msg_if].M2R = CAN_M2R_MDIR | CAN_M2R_MXTD; - CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_DIR | CAN_A2R_XTD; - } - - CAN->sMsgObj[msg_if].MCR = CAN_MCR_TXIE | CAN_MCR_EOB; - - CAN->sMsgObj[msg_if].DA1R = 0; - CAN->sMsgObj[msg_if].DA2R = 0; - CAN->sMsgObj[msg_if].DB1R = 0; - CAN->sMsgObj[msg_if].DB2R = 0; - - CAN->sMsgObj[msg_if].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_SetRxMsgObj -* Description : Configure the message object as RX -* Input 1 : message object number, from 0 to 31 -* Input 2 : CAN_STD_ID or CAN_EXT_ID -* Input 3 : low part of the identifier range used for acceptance filtering -* Input 4 : high part of the identifier range used for acceptance filtering -* Input 5 : TRUE for a single receive object or a FIFO receive object that -* is the last one of the FIFO -* FALSE for a FIFO receive object that is not the last one -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetRxMsgObj(u32 msgobj, u32 idType, u32 idLow, u32 idHigh, bool singleOrFifoLast) -{ - u32 msg_if; - while ((msg_if = CAN_GetFreeIF()) == 2); - - CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD - | CAN_CMR_MASK - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - if (idType == CAN_STD_ID) - { - CAN->sMsgObj[msg_if].M1R = 0; - CAN->sMsgObj[msg_if].M2R = STD_RANGE_ID_MSK(idLow, idHigh); - - CAN->sMsgObj[msg_if].A1R = 0; - CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | STD_RANGE_ID_ARB(idLow, idHigh); - } - else - { - CAN->sMsgObj[msg_if].M1R = EXT_RANGE_ID_MSK_L(idLow, idHigh); - CAN->sMsgObj[msg_if].M2R = CAN_M2R_MXTD | EXT_RANGE_ID_MSK_H(idLow, idHigh); - - CAN->sMsgObj[msg_if].A1R = EXT_RANGE_ID_ARB_L(idLow, idHigh); - CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_XTD | EXT_RANGE_ID_ARB_H(idLow, idHigh); - } - - CAN->sMsgObj[msg_if].MCR = CAN_MCR_RXIE | CAN_MCR_UMASK | (singleOrFifoLast ? CAN_MCR_EOB : 0); - - CAN->sMsgObj[msg_if].DA1R = 0; - CAN->sMsgObj[msg_if].DA2R = 0; - CAN->sMsgObj[msg_if].DB1R = 0; - CAN->sMsgObj[msg_if].DB2R = 0; - - CAN->sMsgObj[msg_if].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_InvalidateAllMsgObj -* Description : Configure all the message objects as unused -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void CAN_InvalidateAllMsgObj(void) -{ - u32 i; - for (i = 0; i < 32; i++) - CAN_SetUnusedMsgObj(i); -} - -/******************************************************************************* -* Function Name : CAN_Init -* Description : Initialize the CAN cell and set the bitrate -* Input 1 : any binary value formed from the CAN_CTL_xxx defines -* Input 2 : one of the CAN_BITRATE_xxx defines -* Output : None -* Return : None -*******************************************************************************/ -void CAN_Init(u8 mask, u32 bitrate) -{ - CAN_EnterInitMode(CAN_CR_CCE | mask); - CAN_SetBitrate(bitrate); - CAN_LeaveInitMode(); - CAN_LeaveTestMode(); -} - -/******************************************************************************* -* Function Name : CAN_ReleaseMessage -* Description : Release the message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -*******************************************************************************/ -void CAN_ReleaseMessage(u32 msgobj) -{ - u32 i; - while ((i = CAN_GetFreeIF()) == 2); - - CAN->sMsgObj[i].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQST; - CAN->sMsgObj[i].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_SendMessage -* Description : Start transmission of a message -* Input 1 : message object number, from 0 to 31 -* Input 2 : pointer to the message structure containing data to transmit -* Output : None -* Return : 1 if transmission was OK, else 0 -*******************************************************************************/ -u32 CAN_SendMessage(u32 msgobj, canmsg* pCanMsg) -{ - while (CAN->sMsgObj[0].CRR & CAN_CRR_BUSY); - -/* if (CAN->sMsgObj[0].COMR & CAN_CRQ_BUSY) */ -/* return 0; // message interface 0 not free */ - - CAN->SR &= ~CAN_SR_TXOK; - - /* read the Arbitration and Message Control */ - CAN->sMsgObj[0].CMR = CAN_CMR_ARB | CAN_CMR_CONTROL; - - CAN->sMsgObj[0].CRR = 1 + msgobj; - - while (CAN->sMsgObj[0].CRR & CAN_CRR_BUSY); - - /* update the contents needed for transmission */ - CAN->sMsgObj[0].CMR = CAN_CMR_WRRD - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - if ((CAN->sMsgObj[0].A2R & CAN_A2R_XTD) == 0) - { - /* standard ID */ - CAN->sMsgObj[0].A1R = 0; - CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | STD_FIXED_ID_ARB(pCanMsg->Id); - } - else - { - // extended ID - CAN->sMsgObj[0].A1R = EXT_FIXED_ID_ARB_L(pCanMsg->Id); - CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | EXT_FIXED_ID_ARB_H(pCanMsg->Id); - } - - CAN->sMsgObj[0].MCR = (CAN->sMsgObj[0].MCR & 0xFEF0) | CAN_MCR_NEWDAT | CAN_MCR_TXRQST | pCanMsg->Dlc; - - CAN->sMsgObj[0].DA1R = ((u16)pCanMsg->Data[1]<<8) | pCanMsg->Data[0]; - CAN->sMsgObj[0].DA2R = ((u16)pCanMsg->Data[3]<<8) | pCanMsg->Data[2]; - CAN->sMsgObj[0].DB1R = ((u16)pCanMsg->Data[5]<<8) | pCanMsg->Data[4]; - CAN->sMsgObj[0].DB2R = ((u16)pCanMsg->Data[7]<<8) | pCanMsg->Data[6]; - - CAN->sMsgObj[0].CRR = 1 + msgobj; - - return 1; -} - -/******************************************************************************* -* Function Name : CAN_ReceiveMessage -* Description : Get the message, if received -* Input 1 : message object number, from 0 to 31 -* Input 2 : if TRUE, the message object is released when getting the data -* if FALSE, the message object is not released -* Input 3 : pointer to the message structure where received data is stored -* Output : None -* Return : 1 if reception was OK, else 0 (no message pending) -*******************************************************************************/ -u32 CAN_ReceiveMessage(u32 msgobj, bool release, canmsg* pCanMsg) -{ - if (!CAN_IsMessageWaiting(msgobj)) - return 0; - - CAN->SR &= ~CAN_SR_RXOK; - - /* read the message contents */ - CAN->sMsgObj[1].CMR = CAN_CMR_MASK - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_CLRINTPND - | (release ? CAN_CMR_TXRQST : 0) - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - CAN->sMsgObj[1].CRR = 1 + msgobj; - - while (CAN->sMsgObj[1].CRR & CAN_CRR_BUSY); - - if ((CAN->sMsgObj[1].A2R & CAN_A2R_XTD) == 0) - { - /* standard ID */ - pCanMsg->IdType = CAN_STD_ID; - pCanMsg->Id = (CAN->sMsgObj[1].A2R >> 2) & 0x07FF; - } - else - { - /* extended ID */ - pCanMsg->IdType = CAN_EXT_ID; - pCanMsg->Id = ((CAN->sMsgObj[1].A2R >> 2) & 0x07FF) | ((u32)CAN->sMsgObj[1].A1R << 11) | (((u32)CAN->sMsgObj[1].A2R & 0x0003) << 27); - } - - pCanMsg->Dlc = CAN->sMsgObj[1].MCR & 0x0F; - - pCanMsg->Data[0] = (u8) CAN->sMsgObj[1].DA1R; - pCanMsg->Data[1] = (u8)(CAN->sMsgObj[1].DA1R >> 8); - pCanMsg->Data[2] = (u8) CAN->sMsgObj[1].DA2R; - pCanMsg->Data[3] = (u8)(CAN->sMsgObj[1].DA2R >> 8); - pCanMsg->Data[4] = (u8) CAN->sMsgObj[1].DB1R; - pCanMsg->Data[5] = (u8)(CAN->sMsgObj[1].DB1R >> 8); - pCanMsg->Data[6] = (u8) CAN->sMsgObj[1].DB2R; - pCanMsg->Data[7] = (u8)(CAN->sMsgObj[1].DB2R >> 8); - - return 1; -} - -/******************************************************************************* -* Function Name : CAN_WaitEndOfTx -* Description : Wait until current transmission is finished -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void CAN_WaitEndOfTx(void) -{ - while ((CAN->SR & CAN_SR_TXOK) == 0); - CAN->SR &= ~CAN_SR_TXOK; -} - -/******************************************************************************* -* Function Name : CAN_BasicSendMessage -* Description : Start transmission of a message in BASIC mode -* Input 1 : pointer to the message structure containing data to transmit -* Output : None -* Return : 1 if transmission was OK, else 0 -* Note : CAN must be in BASIC mode -*******************************************************************************/ -u32 CAN_BasicSendMessage(canmsg* pCanMsg) -{ - /* clear NewDat bit in IF2 to detect next reception */ - CAN->sMsgObj[1].MCR &= ~CAN_MCR_NEWDAT; - - CAN->SR &= ~CAN_SR_TXOK; - - CAN->sMsgObj[0].CMR = CAN_CMR_WRRD - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - if (pCanMsg->IdType == CAN_STD_ID) - { - /* standard ID */ - CAN->sMsgObj[0].A1R = 0; - CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | STD_FIXED_ID_ARB(pCanMsg->Id); - } - else - { - /* extended ID */ - CAN->sMsgObj[0].A1R = EXT_FIXED_ID_ARB_L(pCanMsg->Id); - CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | EXT_FIXED_ID_ARB_H(pCanMsg->Id); - } - - CAN->sMsgObj[0].MCR = (CAN->sMsgObj[0].MCR & 0xFCF0) | pCanMsg->Dlc; - - CAN->sMsgObj[0].DA1R = ((u16)pCanMsg->Data[1]<<8) | pCanMsg->Data[0]; - CAN->sMsgObj[0].DA2R = ((u16)pCanMsg->Data[3]<<8) | pCanMsg->Data[2]; - CAN->sMsgObj[0].DB1R = ((u16)pCanMsg->Data[5]<<8) | pCanMsg->Data[4]; - CAN->sMsgObj[0].DB2R = ((u16)pCanMsg->Data[7]<<8) | pCanMsg->Data[6]; - - /* request transmission */ - CAN->sMsgObj[0].CRR = CAN_CRR_BUSY | (1 + 0); - - return 1; -} - -/******************************************************************************* -* Function Name : CAN_BasicReceiveMessage -* Description : Get the message in BASIC mode, if received -* Input 1 : pointer to the message structure where received data is stored -* Output : None -* Return : 1 if reception was OK, else 0 (no message pending) -* Note : CAN must be in BASIC mode -*******************************************************************************/ -u32 CAN_BasicReceiveMessage(canmsg* pCanMsg) -{ - if ((CAN->sMsgObj[1].MCR & CAN_MCR_NEWDAT) == 0) - return 0; - - CAN->SR &= ~CAN_SR_RXOK; - - CAN->sMsgObj[1].CMR = CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - if ((CAN->sMsgObj[1].A2R & CAN_A2R_XTD) == 0) - { - /* standard ID */ - pCanMsg->IdType = CAN_STD_ID; - pCanMsg->Id = (CAN->sMsgObj[1].A2R >> 2) & 0x07FF; - } - else - { - /* extended ID */ - pCanMsg->IdType = CAN_EXT_ID; - pCanMsg->Id = ((CAN->sMsgObj[1].A2R >> 2) & 0x07FF) | ((u32)CAN->sMsgObj[1].A1R << 11) | (((u32)CAN->sMsgObj[1].A2R & 0x0003) << 27); - } - - pCanMsg->Dlc = CAN->sMsgObj[1].MCR & 0x0F; - - pCanMsg->Data[0] = (u8) CAN->sMsgObj[1].DA1R; - pCanMsg->Data[1] = (u8)(CAN->sMsgObj[1].DA1R >> 8); - pCanMsg->Data[2] = (u8) CAN->sMsgObj[1].DA2R; - pCanMsg->Data[3] = (u8)(CAN->sMsgObj[1].DA2R >> 8); - pCanMsg->Data[4] = (u8) CAN->sMsgObj[1].DB1R; - pCanMsg->Data[5] = (u8)(CAN->sMsgObj[1].DB1R >> 8); - pCanMsg->Data[6] = (u8) CAN->sMsgObj[1].DB2R; - pCanMsg->Data[7] = (u8)(CAN->sMsgObj[1].DB2R >> 8); - - return 1; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/eic.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/eic.c deleted file mode 100644 index 42a2be7c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/eic.c +++ /dev/null @@ -1,91 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : eic.c -* Author : MCD Application Team -* Date First Issued : 06/25/2003 -* Description : This file provides all the EIC software functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "eic.h" - -/******************************************************************************* -* Function Name : EIC_Init -* Description : Initialise the EIC using the load PC instruction -* (PC = PC +offset) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EIC_Init(void) -{ - extern u32 T0TIMI_Addr; - u8 bCounter; - u32 dOffset=((u32)&T0TIMI_Addr); - - /* Disable FIQ and IRQ interrupts */ - EIC->ICR = 0x00000000; - - /* Disable all channels interrupts */ - EIC->IER = 0x00000000; - - /* Clear all pending bits */ - EIC->IPR = 0xFFFFFFFF; - - /* Disable all FIQ channels interrupts and clear FIQ */ - EIC->FIR = 0x0000000C; - - /* channels pending bits */ - /* Ste the current priority level to zero */ - EIC->CIPR = 0x00000000; - - /* IVR = high half of load PC instruction */ - EIC->IVR = 0xE59F0000; - - dOffset = (dOffset+0x00007E0)<<16; - - /* Initialize SIRn registers */ - for(bCounter=0; bCounter<32; bCounter++) - { - EIC->SIR[bCounter] = dOffset|0xF0000000; - dOffset += 0x00000004 << 16; - } -} - -/******************************************************************************* -* Function Name : EIC_CurrentPriorityLevelConfig -* Description : Change the current priority level of the srved IRQ routine -* Input 1 : New priority -* Output : None -* Return : None -*******************************************************************************/ -void EIC_CurrentPriorityLevelConfig(u8 NewPriorityLevel) -{ - u32 dVal; - - /* Save ICR content */ - dVal = EIC->ICR; - - /* Disable IRQ interrupts. */ - EIC->ICR &= ~0x0001; - - /* Change the current priority */ - EIC->CIPR = NewPriorityLevel; - - /* Restore ICR content */ - EIC->ICR = dVal; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/emi.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/emi.c deleted file mode 100644 index f82f588c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/emi.c +++ /dev/null @@ -1,25 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : emi.c -* Author : MCD Application Team -* Date First Issued : 08/08/2003 -* Description : This file provides all the EMI software functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "emi.h" - - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/flash.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/flash.c deleted file mode 100644 index a916f4ba..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/flash.c +++ /dev/null @@ -1,374 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : flash.c -* Author : MCD Application Team -* Date First Issued : 07/28/2003 -* Description : This file provides all the Flash software functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "flash.h" - -/******************************************************************************* -* Function Name : FLASH_Init -* Description : Initialise the Flash registers to their default values. -* Input : None. -* Return : None. -*******************************************************************************/ -void FLASH_Init(void) -{ -/* Reset Flash Control Registers */ - FLASHR->CR0 = 0x00000000; - FLASHR->CR1 = 0x00000000; -/* Reset Flash Data Registers */ - FLASHR->DR0 = 0xFFFFFFFF; - FLASHR->DR1 = 0xFFFFFFFF; -/* Reset Flash Error Register */ - FLASHR->ER = 0x00000000; -} - -/******************************************************************************* -* Function Name : FLASH_WordWrite -* Description : Writes a Word in the Flash. -* Input 1 : Address of the Destination. -* Input 2 : Word to program at Address. -* Return : None. -*******************************************************************************/ -void FLASH_WordWrite(u32 XtargetAdd, u32 Xdata) -{ - /* Wait until another operation going on is completed */ - FLASH_WaitForLastTask(); - /* Set the Word Programming bit 'WPG' in the CR0 Reg */ - FLASHR->CR0 |= FLASH_WPG_Mask; - /* Load the destination address in AR */ - FLASHR->AR = XtargetAdd; - /* Load DATA to be programmed in DR0 */ - FLASHR->DR0 = Xdata; - /* Set the Write Mode Start bit 'WMS' in the CR0 Reg to Start Write Operation */ - FLASHR->CR0 |= FLASH_WMS_Mask; - /* Wait until the write operation is completed */ - FLASH_WaitForLastTask(); -} - -/******************************************************************************* -* Function Name : FLASH_DWordWrite -* Description : Writes Double Word to the Flash. -* Input 1 : Address of the Destination. -* Input 2 : Word 1 to program. -* Input 3 : Word 2 to program. -* Return : None. -*******************************************************************************/ -void FLASH_DWordWrite(u32 XtargetAdd, u32 Xdata0, u32 Xdata1) -{ - /* Wait until another operation going on is completed */ - FLASH_WaitForLastTask(); - /* set the Double Word Programming bit 'DWPG' in the CR0 Reg */ - FLASHR->CR0 |= FLASH_DWPG_Mask; - /* Load the destination address in AR */ - FLASHR->AR = XtargetAdd; - /* Load DATA0 in DR0 Reg */ - FLASHR->DR0 = Xdata0; - /* Load DATA1 in DR1 Reg */ - FLASHR->DR1 = Xdata1; - /* Set the Write Mode Start bit 'WMS' in the CR0 Reg to Start Write Operation */ - FLASHR->CR0 |= FLASH_WMS_Mask; - /* Wait until the write operation is completed */ - FLASH_WaitForLastTask(); -} - -/******************************************************************************* -* Function Name : FLASH_SectorErase -* Description : Erases a Flash sector. -* Input 1 : Sectors to be Erased. -* Return : None. -*******************************************************************************/ -void FLASH_SectorErase(u32 Xsectors) -{ - /* Wait until another operation going on is completed */ - FLASH_WaitForLastTask(); - /* Set the Sector Erase flag 'SER' in the CRO reg */ - FLASHR->CR0 |= FLASH_SER_Mask; - /* Select in the CR1 register the Sectors to be erased */ - FLASHR->CR1 |= Xsectors; - /* Set the Write Mode Start bit 'WMS' in the CR0 Reg to Start Erase Operation */ - FLASHR->CR0 |= FLASH_WMS_Mask; - /* Wait until the erase operation is completed */ - FLASH_WaitForLastTask(); -} -/******************************************************************************* -* Function Name : FLASH_Suspend -* Description : Suspends the current program or erase operation. -* Input 1 : None. -* Return : Flash CR0 register content. -*******************************************************************************/ -u32 FLASH_Suspend(void) -{ - u32 temp; - /* Save the CR0 Content */ - temp = FLASHR->CR0; - /* Set The suspend Bit 'SUSP' in the CR0 register */ - FLASHR->CR0 |= FLASH_SUSP_Mask; - /* Wait until the flash controller acknowledges the suspend of the current - operation */ - FLASH_WaitForLastTask(); - return temp; -} - -/******************************************************************************* -* Function Name : FLASH_Resume -* Description : Resume a Suspended program or erase operation. -* Input 1 : The operation to be resumed. -* Return : None. -*******************************************************************************/ -void FLASH_Resume(u32 FLASH_LastOperation) -{ - /* Clear The suspend Bit 'SUSP' in the FRC0 register */ - FLASHR->CR0 &= ~FLASH_SUSP_Mask; - /* Resume last operation */ - FLASHR->CR0 = FLASH_LastOperation & 0x7FFFFFFF; - /* Set write mode bit */ - FLASHR->CR0 |= FLASH_WMS_Mask; -} - -/******************************************************************************* -* Function Name : FLASH_WordRead -* Description : Read a single word from the flash -* Input 1 : Source Address -* Return : Word -*******************************************************************************/ -u32 FLASH_WordRead(u32 FLASH_SourceAdd) -{ - FLASH_WaitForLastTask(); - /* Reads the data from the specified Address */ - return *(u32 *)(FLASH_SourceAdd + 0x40000000); -} - -/******************************************************************************* -* Function Name : FLASH_FlagStatus -* Description : Returns the NewState of Flash flags -* Input : Xflag(FLASH_BSYA0, FLASH_BSYA1, FLASH_LOCK, FLASH_INTP -* FLASH_B0S, FLASH_B1S, FLASH_ERR, FLASH_ERER, FLASH_PGER, -* FLASH_10ER, FLASH_SEQER, FLASH_RESER, FLASH_WPF) -* Return : FlagStatus (SET or RESET). -*******************************************************************************/ -FlagStatus FLASH_FlagStatus(flashflags Xflag) -{ - FlagStatus TmpResult = RESET; - u8 TmpReg; - u8 TmpPos; - /* Get the Register Index */ - TmpReg = (Xflag & FLASH_Reg_Mask) >> 5; - /* Get the Flag Index */ - TmpPos = (Xflag & FLASH_Flag_Mask); - - switch(TmpReg) - { - case 0 : /* CR0 */ - { - /* Returns the status of the CR0[TmpPos] flag */ - TmpResult = (FLASHR->CR0 & (1<CR1 & (1<ER & (1<> 5; - TmpPos = (Xflag & FLASH_Flag_Mask); - - switch(TmpReg) - { - case 0 : /* CR0 */ - { - /* Clears the status of the CR0[TmpPos] flag */ - FLASHR->CR0 &= ~(1<CR1 &= ~(1<ER &= ~(1<CR0 |= FLASH_SPR_Mask; - /* Set the Register Address */ - FLASHR->AR = 0x4010DFB0; - /* Data to be programmed to the Protection Register */ - FLASHR->DR0 = ~Xsectors; - /* Set the WMS bit to Start the Sequence */ - FLASHR->CR0 |= FLASH_WMS_Mask; - } - /* Unprotect temporarily Flash sector */ - else - { - /* Set the Set protection Bit */ - FLASHR->CR0 |= FLASH_SPR_Mask; - /* Set the Register Address */ - FLASHR->AR = 0x4010DFB0; - /* Data to be programmed to the Protection Register */ - FLASHR->DR0 = FLASHPR->NVWPAR|Xsectors; - /* Set the WMS bit to Start the Sequence */ - FLASHR->CR0 |= FLASH_WMS_Mask; - } -} - -/******************************************************************************* -* Function Name : FLASH_PermanentDebugPrConfig -* Description : Configures the Debug Protection Bits -* Input 1 : NewState: ENABLE or DISABLE. -* Return : None. -*******************************************************************************/ -void FLASH_PermanentDebugPrConfig(FunctionalState NewState) -{ - u16 ProtectionLevel = FLASH_ProtectionLevel(); - - /* Enable permanent Debug protection */ - if (NewState == ENABLE) - { - /* If this is the first time that the debug protection is enabled:Reset - the DBGP bit in the NVAPR0 register */ - if(!ProtectionLevel) - { - /* Set the Set protection Bit */ - FLASHR->CR0 |= FLASH_SPR_Mask; - /* Set the Register Address */ - FLASHR->AR = 0x4010DFB8; - /* Data to be programmed to the Protection Register NVAPR0 */ - FLASHR->DR0 = ~2; - /* Set the WMS bit to start the sequence */ - FLASHR->CR0 |= FLASH_WMS_Mask; - } - /* If this is not the first time that the debug protection is enabled: - use of NVAPR1 register */ - else - { - /* Set the Set protection Bit */ - FLASHR->CR0 |= FLASH_SPR_Mask; - /* Set the Register Address */ - FLASHR->AR = 0x4010DFBC; - /* Data to be programmed to the Protection Register NVAPR1(PEN bits) */ - FLASHR->DR0 =~(1<<(15+ProtectionLevel)); - /* Set the WMS bit to Start the Sequence */ - FLASHR->CR0 |= FLASH_WMS_Mask; - } - - } - /* Permanent debug unprotection: use of NVAPR1 register */ - else if(ProtectionLevel) - { - /* Set the Set protection Bit */ - FLASHR->CR0 |= FLASH_SPR_Mask; - /* Set the Register Address */ - FLASHR->AR = 0x4010DFBC; - /* Data to be programmed to the Protection Register NVAPR1(PDS bits)*/ - FLASHR->DR0 =~(1<<(ProtectionLevel-1)); - /* Set the WMS bit to Start the Sequence */ - FLASHR->CR0 |= FLASH_WMS_Mask; - } - -} - -/******************************************************************************* -* Function Name : FLASH_ProtectionLevel -* Description : If the flash is Debug protected, up to 16 unprotection/ -* protection cycles are possible using the NVAPR1 register. -* This routine returns the number of times of Debug unprotection. -* Input : None. -* Return : Number of times of Debug Protection/Unprotection(0..15) -* Example: if 5 is returned, this means that the flash was debug -* unprotected 5 times(using PDS bits)and debug protected 5 times -* (1 time:using DBGP bit & 4 times: using PEN bits. -*******************************************************************************/ -u16 FLASH_ProtectionLevel(void) -{ - u16 TmpBitIndex =0; - u16 ProtectionRegs; - - /* If DBGP = 1(Flash is Debug protected */ - if(FLASHPR->NVAPR0&2) - TmpBitIndex=0; - - /*If DBGP = 0 (Flash is not Debug protected */ - else - TmpBitIndex=1; - ProtectionRegs=~(FLASHPR->NVAPR1>>16); - - while (((ProtectionRegs) != 0) && (TmpBitIndex < 16)) - { - ProtectionRegs = ProtectionRegs >> 1 ; - TmpBitIndex++; - } - return TmpBitIndex; -} -/******************************************************************************* -* Function Name : FLASH_WaitForLastTask -* Description : Waits for the end of last task on a Flash Bank. -* Input 1 : None. -* Return : None. -*******************************************************************************/ -void FLASH_WaitForLastTask(void) -{ - while (FLASHR->CR0&0x16); -} - -/*******************(C)COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/gpio.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/gpio.c deleted file mode 100644 index ec3ac5c5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/gpio.c +++ /dev/null @@ -1,117 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : gpio.c -* Author : MCD Application Team -* Date First Issued : 06/08/2003 -* Description : This file provides all the GPIO software functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "gpio.h" - -/******************************************************************************* -* Function Name : GPIO_Config -* Description : Configure the GPIO port pins. -* Input 1 : GPIOx (x can be 0,1 or 2) the desired port. -* Input 2 : Port_Pins : pins placements. -* Input 3 : Pins Mode(GPIO_HI_AIN_TRI,GPIO_IN_TRI_TTL,GPIO_IN_TRI_CMOS, -* GPIO_IPUPD_WP,GPIO_OUT_OD,GPIO_OUT_PP,GPIO_AF_OD,GPIO_AF_PP). -* Output : None -* Return : None -*******************************************************************************/ -void GPIO_Config (GPIO_TypeDef *GPIOx, u16 Port_Pins, GpioPinMode_TypeDef GPIO_Mode) -{ - switch (GPIO_Mode) - { - case GPIO_HI_AIN_TRI: - GPIOx->PC0&=~Port_Pins; - GPIOx->PC1&=~Port_Pins; - GPIOx->PC2&=~Port_Pins; - break; - - case GPIO_IN_TRI_TTL: - GPIOx->PC0|=Port_Pins; - GPIOx->PC1&=~Port_Pins; - GPIOx->PC2&=~Port_Pins; - break; - - case GPIO_IN_TRI_CMOS: - GPIOx->PC0&=~Port_Pins; - GPIOx->PC1|=Port_Pins; - GPIOx->PC2&=~Port_Pins; - break; - - case GPIO_IPUPD_WP: - GPIOx->PC0|=Port_Pins; - GPIOx->PC1|=Port_Pins; - GPIOx->PC2&=~Port_Pins; - break; - - case GPIO_OUT_OD: - GPIOx->PC0&=~Port_Pins; - GPIOx->PC1&=~Port_Pins; - GPIOx->PC2|=Port_Pins; - break; - - case GPIO_OUT_PP: - GPIOx->PC0|=Port_Pins; - GPIOx->PC1&=~Port_Pins; - GPIOx->PC2|=Port_Pins; - break; - - case GPIO_AF_OD: - GPIOx->PC0&=~Port_Pins; - GPIOx->PC1|=Port_Pins; - GPIOx->PC2|=Port_Pins; - break; - - case GPIO_AF_PP: - GPIOx->PC0|=Port_Pins; - GPIOx->PC1|=Port_Pins; - GPIOx->PC2|=Port_Pins; - break; - } -} - -/******************************************************************************* -* Function Name : GPIO_BitWrite -* Description : Set or reset the selected port pin. -* Input 1 : Selected GPIO port(GPIO1, GPIO1, GPIO2). -* Input 2 : Pin number. -* Input 3 : bit value. -* Output : None -* Return : None. -*******************************************************************************/ -void GPIO_BitWrite(GPIO_TypeDef *GPIOx, u8 Port_Pin, u8 Port_Val) -{ - if (Port_Val&0x01) GPIOx->PD |= 1<PD &= ~(1<PD = Port_Byte ? (GPIOx->PD&0x00FF) | ((u16)Port_Val<<8) - : (GPIOx->PD&0xFF00) | Port_Val; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/i2c.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/i2c.c deleted file mode 100644 index be67a242..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/i2c.c +++ /dev/null @@ -1,375 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : i2c.c -* Author : MCD Application Team -* Date First Issued : 09/05/2003 -* Description : This file provides Code sources I2C functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "i2c.h" -#include "rccu.h" -#include - -/******************************************************************************* -* Function Name : I2C_Init -* Description : Initializes I2C peripheral control and registers to their -* default reset values. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -void I2C_Init (I2C_TypeDef *I2Cx) -{ - /* Initialize all the register of the specified I2C passed as parameter */ - I2Cx->CR=0x0; - I2Cx->CCR=0x0; - I2Cx->ECCR=0x0; - I2Cx->OAR1=0x0; - I2Cx->OAR2=0x0; - (void)I2Cx->SR1; - (void)I2Cx->SR2; - I2Cx->DR=0x0; -} - -/******************************************************************************* -* Function Name : I2C_OnOffConfig -* Description : Enables or disables I2C peripheral. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -void I2C_OnOffConfig (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) - { - /* Enable the I2C selected by setting twice the PE bit on the CR register */ - I2Cx->CR |= I2C_PESET_Mask; - I2Cx->CR |= I2C_PESET_Mask; - } - else - /* Disable the I2C selected */ - I2Cx->CR &= ~I2C_PESET_Mask; -} - -/******************************************************************************* -* Function Name : I2C_FlagStatus -* Description : Checks whether any I2C Flag is set or not. -* Input : I2Cx ( I2C0 or I2C1 ) -* Access(DIRECT or INDIRECT) -* Flag : the flag to be read -* input 4: an (u8) variable needed in the case -* of the INDIRECT access -* Return : the NewState of the Flag (SET or RESET). -*******************************************************************************/ -FlagStatus I2C_FlagStatus (I2C_TypeDef *I2Cx, RegisterAccess Access, I2C_Flags Flag, ...) -{ - u32 Tmp=0; - - if (Access == DIRECT) - /* Store in Tmp variable the register where is located the flag */ - Tmp = I2C_GetStatus(I2Cx)&Flag; - else - { - va_list list; - /* Get the fourth register */ - va_start(list,Flag); - Tmp = va_arg(list,u32); - Tmp&=Flag; - } - /* Return the Flag NewState */ - return Tmp != 0 ? SET : RESET; -} - -/******************************************************************************* -* Function Name : I2C_FlagClear -* Description : Clears the I2C Flag passed as a parameter -* Input : I2Cx ( I2C0 or I2C1 ) -* Flag : the flag to be read -* input3: an (u8) parameter needed in the case that the flag -* to be cleared need a write in one register -* Return : None. -*******************************************************************************/ -void I2C_FlagClear (I2C_TypeDef *I2Cx, I2C_Flags Flag, ...) -{ - u8 Tmp = (u8)*((u32 *)&Flag + sizeof(Flag)); - - if (Flag==I2C_ADD10 || Flag==I2C_EVF || Flag==I2C_BERR || Flag==I2C_ARLO || - Flag==I2C_STOPF || Flag==I2C_AF || Flag==I2C_ENDAD) - - /* flags that need a read of the SR2 register to be cleared */ - { - /* Read the SR2 register */ - (void)I2Cx->SR2; - /* Two flags need a second step to be cleared */ - switch (Flag) - { - case I2C_ADD10: I2Cx->DR = Tmp; break; - case I2C_ENDAD: I2Cx->CR|=0x20; break; - } - } - else if (Flag==I2C_SB || Flag==I2C_ADSL || Flag==I2C_BTF || Flag==I2C_TRA) - /* flags that need a read of the SR1 register to be cleared */ - { - /* Read the SR1 register */ - (void)I2Cx->SR1; - if (Flag==I2C_SB) I2Cx->DR=Tmp; - else if (Flag==I2C_BTF || Flag==I2C_TRA) (void)I2Cx->DR; - } - else if ( Flag==I2C_M_SL || Flag==I2C_GCAL) - /*flags that need the PE bit to be cleared */ - { - I2C_OnOffConfig (I2Cx, DISABLE); - I2C_OnOffConfig (I2Cx, ENABLE); - } -} - -/******************************************************************************* -* Function Name : I2C_SpeedConfig -* Description : Selects I2C clock speed and configures its corresponding mode. -* Input : I2Cx ( I2C0 or I2C1 ) -* Clock: I2C expected clock in Hertz. -* Return : None. -*******************************************************************************/ -void I2C_SpeedConfig (I2C_TypeDef *I2Cx, u32 Clock) -{ - u32 FCLK=0; - u16 result=0; - /* Get the FCLK frequency using the RCCU library */ - FCLK = RCCU_FrequencyValue ( RCCU_FCLK ); - /* Test on speed mode */ - /* Update the CCR and ECCR are updated */ - if (Clock <=100000) - /* Standard mode selected */ - { - result = ((FCLK / Clock) - 7)/2; - /* Clear FM/SM bit */ - I2Cx->CCR=result &0x7f; - } - else if (Clock <=400000) - { - /* Fast mode selected */ - result = ((FCLK/Clock)-9)/3; - /* set FM/SM bit */ - I2Cx->CCR=result |0x80; - } - I2Cx->ECCR= result >>7; -} -/******************************************************************************* -* Function Name : I2C_AddressConfig -* Description : Defines the I2C bus address of the interface. -* Input : I2Cx ( I2C0 or I2C1 ). -* Address: an u16 parameter indicating the address -* of the interface. -* Mode (I2C_Mode10,I2C_Mode7). -* Return : None. -*******************************************************************************/ -void I2C_AddressConfig (I2C_TypeDef *I2Cx, u16 Address, I2C_Addressing Mode) -{ - /* Update OAR1 bit[7:1] by the lowest byte of address */ - I2Cx->OAR1 = (u8)Address; - - if (Mode == I2C_Mode10) - /* Update Add8 and add9 bits in OAR2 */ - I2Cx->OAR2 |= (Address & 0x0300)>>7; -} - -/******************************************************************************* -* Function Name : I2C_FCLKConfig -* Description : Configures frequency bits according to RCLK frequency. -* the selected I2C must be disabled -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -void I2C_FCLKConfig (I2C_TypeDef *I2Cx) -{ - u32 FCLK=0; - /* Get the FCLK frequency using the RCCU library */ - FCLK = RCCU_FrequencyValue ( RCCU_FCLK ); - /* Test the value of the FCLK and affect FR0,FR1&FR2 of the OAR2 register */ - if (FCLK > 5000000) - { - if (FCLK <10000000) - I2Cx->OAR2 |= 0x00; - else if (FCLK <16670000) - I2Cx->OAR2 |= 0x20; - else if (FCLK < 26670000) - I2Cx->OAR2 |= 0x40; - else if (FCLK <40000000) - I2Cx->OAR2 |= 0x60; - else if (FCLK < 53330000) - I2Cx->OAR2 |= 0x80; - else if (FCLK < 66000000) - I2Cx->OAR2 |= 0xA0; - else if (FCLK <80000000) - I2Cx->OAR2 |= 0xC0; - else if (FCLK <100000000) - I2Cx->OAR2 |= 0xE0; - } -} - -/******************************************************************************* -* Function Name : I2C_AddressSend -* Description : Transmits the address byte to select the slave device. -* Input : I2Cx ( I2C0 or I2C1 ) -* Address: an u16 parameter indicating the slave address -* Mode (I2C_Mode10,I2C_Mode7). -* Direction (I2C_RX,I2C_TX). -* Return : None. -********************************************************************************/ -void I2C_AddressSend (I2C_TypeDef *I2Cx, u16 Address, I2C_Addressing Mode, I2C_Direction Direction) -{ - if (Mode == I2C_Mode10 ) - /*10 bit addressing mode */ - { - /* Update the DR register by generated header */ - I2Cx->DR = ((Address>>7)|0xf0)&0xfe; - /* Wait till I2C_ADD10 flag is set */ - while ((I2Cx->SR1&0x40)==0); - /* clear I2C_ADD10 flag */ - (void)I2Cx->SR2; - I2Cx->DR=(u8)Address; - /* Test on the direction to define the read/write bit */ - if (Direction == I2C_RX) - { - /* Wait till I2C_ENDAD flag is set */ - while ((I2Cx->SR2&0x20)==0); - I2Cx->CR|=0x20; - /* Repeated START Generate */ - I2C_STARTGenerate (I2Cx, ENABLE); - /* Test on SB flag status */ - while ((I2Cx->SR1&0x01)==0); - I2Cx->DR = ((Address>>7)|0xf1); - } - } - else - /* 7 bit addressing mode */ - { - if (Direction == I2C_RX) Address|=0x01; else Address&=~0x01; - I2Cx->DR=(u8)Address; - } -} - -/******************************************************************************* -* Function Name : I2C_ByteSend -* Description : Send a single byte of data. -* Input : I2Cx ( I2C0 or I2C1 ) -* Data : the byte to be sent to the slave -* Return : None. -*******************************************************************************/ -void I2C_ByteSend (I2C_TypeDef *I2Cx, u8 Data) -{ - /* Write in the DR register the byte to be sent */ - I2Cx->DR = Data; -} - - -/******************************************************************************* -* Function Name : I2C_TransmissionStatus -* Description : Report the NewState of the transmission -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : I2C_Tx_Status :transmission status (I2C_TX_NO, I2C_TX_SB, -* I2C_TX_AF, I2C_TX_ARLO, I2C_TX_BERR,I2C_TX_ADD_OK, -* I2C_TX_DATA_OK,I2C_TX_ONGOING) -*******************************************************************************/ -I2C_Tx_Status I2C_TransmissionStatus (I2C_TypeDef *I2Cx) -{ - u8 SR1value=0; - u8 SR2value=0; - I2C_Tx_Status NewState = I2C_TX_NO; - - SR1value = I2Cx->SR1; - SR2value = I2Cx->SR2; - if ((I2Cx->SR1&0x10)==0) - NewState=I2C_TX_NO; - else if (I2Cx->SR1&0x01) - /* I2C_SB bit is set */ - NewState=I2C_TX_SB; - else if ((SR2value & 0x10)&&(I2Cx->CR&0x04)) - /* I2C_ACK &I2C_AF are both set */ - NewState=I2C_TX_AF; - else if (SR2value & 0x04) - /* I2C_ARLO is set in multimaster mode */ - NewState=I2C_TX_ARLO; - else if (SR2value & 0x02) - /* I2C_BERR bit is set */ - NewState=I2C_TX_BERR; - else if ((SR1value & 0x80)&& (I2Cx->SR2&0x20)) - /* I2C_EVF and I2C_ENDAD are both set */ - NewState=I2C_TX_ADD_OK; - else if ((I2Cx->SR1&0x20)&& (I2Cx->SR1&0x08)) - /* I2C_TRA and I2C_BTF are both set */ - NewState=I2C_TX_DATA_OK; - else - NewState=I2C_TX_ONGOING; - - return NewState; -} - -/******************************************************************************* -* Function Name : I2C_ByteReceive -* Description : Returns the received byte. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : the byte received -*******************************************************************************/ -u8 I2C_ByteReceive (I2C_TypeDef *I2Cx) -{ - /* Wait till I2C_BTF bit is set */ - while ((I2Cx->SR1 & 0x08)==0); - return I2Cx->DR; -} - - -/******************************************************************************* -* Function Name :I2C_ReceptionStatus -* Description : Report the reception NewState. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : I2C_Rx_Status:the NewState of the reception ( I2C_RX_NO, -* I2C_RX_SB,I2C_RX_AF,I2C_RX_ARLO,I2C_RX_BERR,I2C_RX_ADD_OK, -* I2C_RX_DATA_OK, I2C_RX_ONGOING) -*******************************************************************************/ -I2C_Rx_Status I2C_ReceptionStatus (I2C_TypeDef *I2Cx) -{ - u8 SR1value=0; - u8 SR2value=0; - I2C_Rx_Status NewState = I2C_RX_NO; - SR1value= I2Cx->SR1; - SR2value= I2Cx->SR2; - - if ((I2Cx->SR1&0x10) == 0) - NewState=I2C_RX_NO; - else if (I2Cx->SR1&0x01) - /* I2C_SB bit is set */ - NewState=I2C_RX_SB; - else if ((SR2value & 0x10) && (I2Cx->CR&0x04)) - /* I2C_ACK &I2C_AF are both set */ - NewState=I2C_RX_AF; - else if (SR2value & 0x04) - /* I2C_ARLO is set */ - NewState=I2C_RX_ARLO; - else if (SR2value & 0x02) - /* I2C_BERR bit is set */ - NewState=I2C_RX_BERR; - else if ((SR1value & 0x80) && (I2Cx->SR1&0x08)==0) - /* I2C_EVF is set & I2C_BTF is not set */ - NewState=I2C_RX_ADD_OK; - else if ((I2Cx->SR1&0x20)==0 && (I2Cx->SR1&0x08)) - /* I2C_TRA is cleared & I2C_BTF is set */ - NewState=I2C_RX_DATA_OK; - else - NewState=I2C_RX_ONGOING; - return NewState; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_conf.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_conf.h deleted file mode 100644 index 40bd033c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_conf.h +++ /dev/null @@ -1,73 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_conf.h -* Author : MCD Application Team -* Date First Issued : 16/05/2003 -* Description : Library configuration for the WDG example -******************************************************************************** -* History: -* 24/05/05 : V3.0 -* 30/11/04 : V2.0 -* 16/05/03 : Created -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __71x_CONF_H -#define __71x_CONF_H - -/* Comment the line below to put the library in release mode */ -//#define DEBUG - -#define inline static __inline - -//#define USE_SERIAL_PORT -//#define USE_UART0 - -/* Main Oscillator Frequency value = 16 Mhz */ -//#define RCCU_Main_Osc 16000000 - -/* Comment the lines below corresponding to unwanted peripherals */ -#define _ADC12 -#define _APB -#define _APB1 -#define _APB2 -#define _BSPI -#define _BSPI0 -#define _BSPI1 -#define _CAN -#define _EIC -#define _EMI -#define _FLASH -#define _GPIO -#define _GPIO0 -#define _GPIO1 -#define _GPIO2 -#define _I2C -#define _I2C0 -#define _I2C1 -#define _PCU -#define _RCCU -#define _RTC -#define _TIM -#define _TIM0 -#define _TIM1 -#define _TIM2 -#define _TIM3 -#define _UART -#define _UART0 -#define _UART1 -#define _UART2 -#define _UART3 -#define _USB -#define _WDG -#define _XTI -#define _IRQVectors - -#endif /* __71x_CONF_H */ - - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_it.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_it.h deleted file mode 100644 index ac0c76d5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_it.h +++ /dev/null @@ -1,63 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_it.h -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Interrupt handlers -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef _71x_IT_H -#define _71x_IT_H - -#include "71x_lib.h" - - -void Undefined_Handler (void); -void FIQ_Handler (void); -void SWI_Handler (void); -void Prefetch_Handler (void); -void Abort_Handler (void); -void T0TIMI_IRQHandler (void); -void FLASH_IRQHandler (void); -void RCCU_IRQHandler (void); -void RTC_IRQHandler (void); -void WDG_IRQHandler (void); -void XTI_IRQHandler (void); -void USBHP_IRQHandler (void); -void I2C0ITERR_IRQHandler(void); -void I2C1ITERR_IRQHandler(void); -void UART0_IRQHandler (void); -void UART1_IRQHandler (void); -void UART2_IRQHandler (void); -void UART3_IRQHandler (void); -void BSPI0_IRQHandler (void); -void BSPI1_IRQHandler (void); -void I2C0_IRQHandler (void); -void I2C1_IRQHandler (void); -void CAN_IRQHandler (void); -void ADC12_IRQHandler (void); -void T1TIMI_IRQHandler (void); -void T2TIMI_IRQHandler (void); -void T3TIMI_IRQHandler (void); -void HDLC_IRQHandler (void); -void USBLP_IRQHandler (void); -void T0TOI_IRQHandler (void); -void T0OC1_IRQHandler (void); -void T0OC2_IRQHandler (void); - -#endif /* _71x_IT_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_lib.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_lib.h deleted file mode 100644 index 2007a662..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_lib.h +++ /dev/null @@ -1,102 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_lib.h -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Global include for all peripherals -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __71x_LIB_H -#define __71x_LIB_H - -#include "71x_map.h" -#include "71x_conf.h" - - -#ifdef _ADC12 - #include "adc12.h" -#endif - -#ifdef _APB - #include "apb.h" -#endif - -#ifdef _BSPI - #include "bspi.h" -#endif - -#ifdef _CAN - #include "can.h" -#endif - -#ifdef _EIC - #include "eic.h" -#endif - -#ifdef _EMI - #include "emi.h" -#endif - -#ifdef _FLASH - #include "flash.h" -#endif - -#ifdef _GPIO - #include "gpio.h" -#endif - -#ifdef _I2C - #include "i2c.h" -#endif - -#ifdef _PCU - #include "pcu.h" -#endif - -#ifdef _RCCU - #include "rccu.h" -#endif - -#ifdef _RTC - #include "rtc.h" -#endif - -#ifdef _TIM - #include "tim.h" -#endif - -#ifdef _UART - #include "uart.h" -#endif - -#ifdef _USB -#endif - -#ifdef _WDG - #include "wdg.h" -#endif - -#ifdef _XTI - #include "xti.h" -#endif - - -#ifdef LIBDEBUG - void libdebug(void); -#endif - -#endif /* __71x_LIB_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_map.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_map.h deleted file mode 100644 index be35840e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_map.h +++ /dev/null @@ -1,612 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_map.h -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Peripherals memory mapping and registers structures -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __71x_MAP_H -#define __71x_MAP_H - -#ifndef EXT - #define EXT extern -#endif - -#include "71x_conf.h" -#include "71x_type.h" - - -/* IP registers structures */ - -typedef volatile struct -{ - vu16 DATA0; - vu16 EMPTY1[3]; - vu16 DATA1; - vu16 EMPTY2[3]; - vu16 DATA2; - vu16 EMPTY3[3]; - vu16 DATA3; - vu16 EMPTY4[3]; - vu16 CSR; - vu16 EMPTY5[7]; - vu16 CPR; -} ADC12_TypeDef; - -typedef volatile struct -{ - vu32 CKDIS; - vu32 SWRES; -} APB_TypeDef; - -typedef volatile struct -{ - vu16 RXR; - vu16 EMPTY1; - vu16 TXR; - vu16 EMPTY2; - vu16 CSR1; - vu16 EMPTY3; - vu16 CSR2; - vu16 EMPTY4; - vu16 CLK; -} BSPI_TypeDef; - -typedef volatile struct -{ - vu16 CRR; - vu16 EMPTY1; - vu16 CMR; - vu16 EMPTY2; - vu16 M1R; - vu16 EMPTY3; - vu16 M2R; - vu16 EMPTY4; - vu16 A1R; - vu16 EMPTY5; - vu16 A2R; - vu16 EMPTY6; - vu16 MCR; - vu16 EMPTY7; - vu16 DA1R; - vu16 EMPTY8; - vu16 DA2R; - vu16 EMPTY9; - vu16 DB1R; - vu16 EMPTY10; - vu16 DB2R; - vu16 EMPTY11[27]; -} CAN_MsgObj_TypeDef; - -typedef volatile struct -{ - vu16 CR; - vu16 EMPTY1; - vu16 SR; - vu16 EMPTY2; - vu16 ERR; - vu16 EMPTY3; - vu16 BTR; - vu16 EMPTY4; - vu16 IDR; - vu16 EMPTY5; - vu16 TESTR; - vu16 EMPTY6; - vu16 BRPR; - vu16 EMPTY7[3]; - CAN_MsgObj_TypeDef sMsgObj[2]; - vu16 EMPTY8[16]; - vu16 TR1R; - vu16 EMPTY9; - vu16 TR2R; - vu16 EMPTY10[13]; - vu16 ND1R; - vu16 EMPTY11; - vu16 ND2R; - vu16 EMPTY12[13]; - vu16 IP1R; - vu16 EMPTY13; - vu16 IP2R; - vu16 EMPTY14[13]; - vu16 MV1R; - vu16 EMPTY15; - vu16 MV2R; - vu16 EMPTY16; -} CAN_TypeDef; - -typedef volatile struct -{ - vu32 ICR; - vu32 CICR; - vu32 CIPR; - vu32 EMPTY1[3]; - vu32 IVR; - vu32 FIR; - vu32 IER; - vu32 EMPTY2[7]; - vu32 IPR; - vu32 EMPTY3[7]; - vu32 SIR[32]; -} EIC_TypeDef; - -typedef volatile struct -{ - vu16 BCON0; - vu16 EMPTY1; - vu16 BCON1; - vu16 EMPTY2; - vu16 BCON2; - vu16 EMPTY3; - vu16 BCON3; - vu16 EMPTY4; -} EMI_TypeDef; - -typedef volatile struct -{ - vu32 CR0; - vu32 CR1; - vu32 DR0; - vu32 DR1; - vu32 AR; - vu32 ER; -} FLASHR_TypeDef; - -typedef volatile struct -{ - vu32 NVWPAR; - vu32 EMPTY; - vu32 NVAPR0; - vu32 NVAPR1; -} FLASHPR_TypeDef; - -typedef volatile struct -{ - vu16 PC0; - vu16 EMPTY1; - vu16 PC1; - vu16 EMPTY2; - vu16 PC2; - vu16 EMPTY3; - vu16 PD; - vu16 EMPTY4; -} GPIO_TypeDef; - -typedef volatile struct -{ - vu8 CR; - vu8 EMPTY1[3]; - vu8 SR1; - vu8 EMPTY2[3]; - vu8 SR2; - vu8 EMPTY3[3]; - vu8 CCR; - vu8 EMPTY4[3]; - vu8 OAR1; - vu8 EMPTY5[3]; - vu8 OAR2; - vu8 EMPTY6[3]; - vu8 DR; - vu8 EMPTY7[3]; - vu8 ECCR; -} I2C_TypeDef; - -typedef volatile struct -{ - vu32 CCR; - vu32 EMPTY1; - vu32 CFR; - vu32 EMPTY2[3]; - vu32 PLL1CR; - vu32 PER; - vu32 SMR; -} RCCU_TypeDef; - -typedef volatile struct -{ - vu16 MDIVR; - vu16 EMPTY1; - vu16 PDIVR; - vu16 EMPTY2; - vu16 RSTR; - vu16 EMPTY3; - vu16 PLL2CR; - vu16 EMPTY4; - vu16 BOOTCR; - vu16 EMPTY5; - vu16 PWRCR; -} PCU_TypeDef; - -typedef volatile struct -{ - vu16 CRH; - vu16 EMPTY1; - vu16 CRL; - vu16 EMPTY2; - vu16 PRLH; - vu16 EMPTY3; - vu16 PRLL; - vu16 EMPTY4; - vu16 DIVH; - vu16 EMPTY5; - vu16 DIVL; - vu16 EMPTY6; - vu16 CNTH; - vu16 EMPTY7; - vu16 CNTL; - vu16 EMPTY8; - vu16 ALRH; - vu16 EMPTY9; - vu16 ALRL; -} RTC_TypeDef; - -typedef volatile struct -{ - vu16 ICAR; - vu16 EMPTY1; - vu16 ICBR; - vu16 EMPTY2; - vu16 OCAR; - vu16 EMPTY3; - vu16 OCBR; - vu16 EMPTY4; - vu16 CNTR; - vu16 EMPTY5; - vu16 CR1; - vu16 EMPTY6; - vu16 CR2; - vu16 EMPTY7; - vu16 SR; -} TIM_TypeDef; - -typedef volatile struct -{ - vu16 BR; - vu16 EMPTY1; - vu16 TxBUFR; - vu16 EMPTY2; - vu16 RxBUFR; - vu16 EMPTY3; - vu16 CR; - vu16 EMPTY4; - vu16 IER; - vu16 EMPTY5; - vu16 SR; - vu16 EMPTY6; - vu16 GTR; - vu16 EMPTY7; - vu16 TOR; - vu16 EMPTY8; - vu16 TxRSTR; - vu16 EMPTY9; - vu16 RxRSTR; -} UART_TypeDef; - -typedef volatile struct -{ - vu32 EP0R; - vu32 EP1R; - vu32 EP2R; - vu32 EP3R; - vu32 EP4R; - vu32 EP5R; - vu32 EP6R; - vu32 EP7R; - vu32 EP8R; - vu32 EP9R; - vu32 EP10R; - vu32 EP11R; - vu32 EP12R; - vu32 EP13R; - vu32 EP14R; - vu32 EP15R; - vu32 CNTR; - vu32 ISTR; - vu32 FNR; - vu32 DADDR; - vu32 BTABLE; -} USB_TypeDef; - -typedef volatile struct -{ - vu16 CR; - vu16 EMPTY1; - vu16 PR; - vu16 EMPTY2; - vu16 VR; - vu16 EMPTY3; - vu16 CNT; - vu16 EMPTY4; - vu16 SR; - vu16 EMPTY5; - vu16 MR; - vu16 EMPTY6; - vu16 KR; -} WDG_TypeDef; - -typedef volatile struct -{ - vu8 SR; - vu8 EMPTY1[7]; - vu8 CTRL; - vu8 EMPTY2[3]; - vu8 MRH; - vu8 EMPTY3[3]; - vu8 MRL; - vu8 EMPTY4[3]; - vu8 TRH; - vu8 EMPTY5[3]; - vu8 TRL; - vu8 EMPTY6[3]; - vu8 PRH; - vu8 EMPTY7[3]; - vu8 PRL; -} XTI_TypeDef; - - -/* IRQ vectors */ -typedef volatile struct -{ - vu32 T0TIMI_IRQHandler; - vu32 FLASH_IRQHandler; - vu32 RCCU_IRQHandler; - vu32 RTC_IRQHandler; - vu32 WDG_IRQHandler; - vu32 XTI_IRQHandler; - vu32 USBHP_IRQHandler; - vu32 I2C0ITERR_IRQHandler; - vu32 I2C1ITERR_IRQHandler; - vu32 UART0_IRQHandler; - vu32 UART1_IRQHandler; - vu32 UART2_IRQHandler; - vu32 UART3_IRQHandler; - vu32 BSPI0_IRQHandler; - vu32 BSPI1_IRQHandler; - vu32 I2C0_IRQHandler; - vu32 I2C1_IRQHandler; - vu32 CAN_IRQHandler; - vu32 ADC12_IRQHandler; - vu32 T1TIMI_IRQHandler; - vu32 T2TIMI_IRQHandler; - vu32 T3TIMI_IRQHandler; - vu32 EMPTY1[3]; - vu32 HDLC_IRQHandler; - vu32 USBLP_IRQHandler; - vu32 EMPTY2[2]; - vu32 T0TOI_IRQHandler; - vu32 T0OC1_IRQHandler; - vu32 T0OC2_IRQHandler; -} IRQVectors_TypeDef; - -/*===================================================================*/ - -/* Memory mapping */ - -#define RAM_BASE 0x20000000 - -#define FLASHR_BASE 0x40100000 -#define FLASHPR_BASE 0x4010DFB0 - -#define EXTMEM_BASE 0x60000000 -#define RCCU_BASE 0xA0000000 -#define PCU_BASE 0xA0000040 -#define APB1_BASE 0xC0000000 -#define APB2_BASE 0xE0000000 -#define EIC_BASE 0xFFFFF800 - -#define I2C0_BASE (APB1_BASE + 0x1000) -#define I2C1_BASE (APB1_BASE + 0x2000) -#define UART0_BASE (APB1_BASE + 0x4000) -#define UART1_BASE (APB1_BASE + 0x5000) -#define UART2_BASE (APB1_BASE + 0x6000) -#define UART3_BASE (APB1_BASE + 0x7000) -#define CAN_BASE (APB1_BASE + 0x9000) -#define BSPI0_BASE (APB1_BASE + 0xA000) -#define BSPI1_BASE (APB1_BASE + 0xB000) -#define USB_BASE (APB1_BASE + 0x8800) - -#define XTI_BASE (APB2_BASE + 0x101C) -#define GPIO0_BASE (APB2_BASE + 0x3000) -#define GPIO1_BASE (APB2_BASE + 0x4000) -#define GPIO2_BASE (APB2_BASE + 0x5000) -#define ADC12_BASE (APB2_BASE + 0x7000) -#define TIM0_BASE (APB2_BASE + 0x9000) -#define TIM1_BASE (APB2_BASE + 0xA000) -#define TIM2_BASE (APB2_BASE + 0xB000) -#define TIM3_BASE (APB2_BASE + 0xC000) -#define RTC_BASE (APB2_BASE + 0xD000) -#define WDG_BASE (APB2_BASE + 0xE000) - -#define EMI_BASE (EXTMEM_BASE + 0x0C000000) - -/*===================================================================*/ - -/* IP data access */ - -#ifndef LIBDEBUG - #define ADC12 ((ADC12_TypeDef *)ADC12_BASE) - - #define APB1 ((APB_TypeDef *)(APB1_BASE+0x10)) - #define APB2 ((APB_TypeDef *)(APB2_BASE+0x10)) - - #define BSPI0 ((BSPI_TypeDef *)BSPI0_BASE) - #define BSPI1 ((BSPI_TypeDef *)BSPI1_BASE) - - #define CAN ((CAN_TypeDef *)CAN_BASE) - - #define EIC ((EIC_TypeDef *)EIC_BASE) - - #define EMI ((EMI_TypeDef *)EMI_BASE) - - #define FLASHR ((FLASHR_TypeDef *)FLASHR_BASE) - #define FLASHPR ((FLASHPR_TypeDef *)FLASHPR_BASE) - - #define GPIO0 ((GPIO_TypeDef *)GPIO0_BASE) - #define GPIO1 ((GPIO_TypeDef *)GPIO1_BASE) - #define GPIO2 ((GPIO_TypeDef *)GPIO2_BASE) - - #define I2C0 ((I2C_TypeDef *)I2C0_BASE) - #define I2C1 ((I2C_TypeDef *)I2C1_BASE) - - #define PCU ((PCU_TypeDef *)PCU_BASE) - - #define RCCU ((RCCU_TypeDef *)RCCU_BASE) - - #define RTC ((RTC_TypeDef *)RTC_BASE) - - #define TIM0 ((TIM_TypeDef *)TIM0_BASE) - #define TIM1 ((TIM_TypeDef *)TIM1_BASE) - #define TIM2 ((TIM_TypeDef *)TIM2_BASE) - #define TIM3 ((TIM_TypeDef *)TIM3_BASE) - - #define UART0 ((UART_TypeDef *)UART0_BASE) - #define UART1 ((UART_TypeDef *)UART1_BASE) - #define UART2 ((UART_TypeDef *)UART2_BASE) - #define UART3 ((UART_TypeDef *)UART3_BASE) - - #define USB ((USB_TypeDef *)USB_BASE) - - #define WDG ((WDG_TypeDef *)WDG_BASE) - - #define XTI ((XTI_TypeDef *)XTI_BASE) - - #define IRQVectors ((IRQVectors_TypeDef *)&T0TIMI_Addr) - -#else /* LIBDEBUG */ - - #ifdef _ADC12 - EXT ADC12_TypeDef *ADC12; - #endif - - #ifdef _APB - #ifdef _APB1 - EXT APB_TypeDef *APB1; - #endif - #ifdef _APB2 - EXT APB_TypeDef *APB2; - #endif - #endif - - #ifdef _BSPI - #ifdef _BSPI0 - EXT BSPI_TypeDef *BSPI0; - #endif - #ifdef _BSPI1 - EXT BSPI_TypeDef *BSPI1; - #endif - #endif - - #ifdef _CAN - EXT CAN_TypeDef *CAN; - #endif - - #ifdef _EIC - EXT EIC_TypeDef *EIC; - #endif - - #ifdef _EMI - EXT EMI_TypeDef *EMI; - #endif - - #ifdef _FLASH - EXT FLASHR_TypeDef *FLASHR; - EXT FLASHPR_TypeDef *FLASHPR; - #endif - - #ifdef _GPIO - #ifdef _GPIO0 - EXT GPIO_TypeDef *GPIO0; - #endif - #ifdef _GPIO1 - EXT GPIO_TypeDef *GPIO1; - #endif - #ifdef _GPIO2 - EXT GPIO_TypeDef *GPIO2; - #endif - #endif - - #ifdef _I2C - #ifdef _I2C0 - EXT I2C_TypeDef *I2C0; - #endif - #ifdef _I2C1 - EXT I2C_TypeDef *I2C1; - #endif - #endif - - #ifdef _PCU - EXT PCU_TypeDef *PCU; - #endif - - #ifdef _RCCU - EXT RCCU_TypeDef *RCCU; - #endif - - #ifdef _RTC - EXT RTC_TypeDef *RTC; - #endif - - #ifdef _TIM - #ifdef _TIM0 - EXT TIM_TypeDef *TIM0; - #endif - #ifdef _TIM1 - EXT TIM_TypeDef *TIM1; - #endif - #ifdef _TIM2 - EXT TIM_TypeDef *TIM2; - #endif - #ifdef _TIM3 - EXT TIM_TypeDef *TIM3; - #endif - #endif - - #ifdef _UART - #ifdef _UART0 - EXT UART_TypeDef *UART0; - #endif - #ifdef _UART1 - EXT UART_TypeDef *UART1; - #endif - #ifdef _UART2 - EXT UART_TypeDef *UART2; - #endif - #ifdef _UART3 - EXT UART_TypeDef *UART3; - #endif - #endif - - #ifdef _USB - EXT USB_TypeDef *USB; - #endif - - #ifdef _WDG - EXT WDG_TypeDef *WDG; - #endif - - #ifdef _XTI - EXT XTI_TypeDef *XTI; - #endif - - #ifdef _IRQVectors - EXT IRQVectors_TypeDef *IRQVectors; - #endif - -#endif /* LIBDEBUG */ - -#endif /* __71x_MAP_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_type.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_type.h deleted file mode 100644 index 7fcfb2a4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/71x_type.h +++ /dev/null @@ -1,52 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_type.h -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Common data types -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef _71x_type_H -#define _71x_type_H - -typedef unsigned long u32; -typedef unsigned short u16; -typedef unsigned char u8; - -typedef signed long s32; -typedef signed short s16; -typedef signed char s8; - -typedef volatile unsigned long vu32; -typedef volatile unsigned short vu16; -typedef volatile unsigned char vu8; - -typedef volatile signed long vs32; -typedef volatile signed short vs16; -typedef volatile signed char vs8; - -/*===================================================================*/ -typedef enum { FALSE = 0, TRUE = !FALSE } bool; -/*===================================================================*/ -typedef enum { RESET = 0, SET = !RESET } FlagStatus; -/*===================================================================*/ -typedef enum { DISABLE = 0, ENABLE = !DISABLE} FunctionalState; -/*===================================================================*/ -typedef enum { INDIRECT = 0, DIRECT = !INDIRECT} RegisterAccess; -/*===================================================================*/ - -#endif /* _71x_type_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/adc12.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/adc12.h deleted file mode 100644 index 741397a1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/adc12.h +++ /dev/null @@ -1,186 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : adc12.h -* Author : MCD Application Team -* Date First Issued : 07/31/2003 -* Description : This file contains all the functions prototypes for the -* ADC12 software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef _ADC12_H -#define _ADC12_H - -#include "71x_map.h" -#include "rccu.h" - -/* --------------------ADC12 Conversion modes----------------------------------- */ -typedef enum -{ - ADC12_SINGLE, - ADC12_ROUND -} ADC12_Modes; - -/* --------------------ADC12 Channels------------------------------------------- */ -typedef enum -{ - ADC12_CHANNEL0 = 0x00, - ADC12_CHANNEL1 = 0x10, - ADC12_CHANNEL2 = 0x20, - ADC12_CHANNEL3 = 0x30 -} ADC12_Channels; - -/* --------------------ADC12 control status register flag----------------------- */ -typedef enum -{ - ADC12_DA0 = 0x0001, - ADC12_DA1 = 0x0002, - ADC12_DA2 = 0x0004, - ADC12_DA3 = 0x0008, - ADC12_OR = 0x2000 -} ADC12_Flags; - -/* Masks for the update of interrupt bit for channel n */ -#define ADC12_IT0_Mask 0x0100 -#define ADC12_IT1_Mask 0x0200 -#define ADC12_IT2_Mask 0x0400 -#define ADC12_IT3_Mask 0x0800 - -/* Mask for the update of all the interrupt bit in the CSR */ -#define ADC12_IT_Mask 0x0F00 - -/* Mask for Selecting mode */ -#define ADC12_Mode_Mask 0x0040 - -/* Mask for configuring the converter */ -#define ADC12_Start_Mask 0x0020 - -/******************************************************************************* -* Function Name : ADC12_Init -* Description : This routine is used to intialize the ADC12 registers to -* their reset values -* Input : None. -* Return : None. -*******************************************************************************/ -void ADC12_Init(void); - -/******************************************************************************* -* Function Name : ADC12_ConversionStart -* Description : This routine is used to launch the Conversion. -* Input : None -* Return : None -*******************************************************************************/ -inline void ADC12_ConversionStart (void) -{ - /* Set the ADCen bit of the BOOTCR register */ - PCU->BOOTCR |= ADC12_Start_Mask; -} - -/******************************************************************************* -* Function Name : ADC12_ConversionStop -* Description : This routine is used to disable the ADC12 cell. -* Input : None. -* Return : None. -*******************************************************************************/ -inline void ADC12_ConversionStop(void) -{ - /* Clear the ADCen bit of the BOOTCR register */ - PCU->BOOTCR &= ~ADC12_Start_Mask; -} - -/******************************************************************************* -* Function Name : ADC12_ModeConfig -* Description : This routine is used to select the mode of conversion. -* Input : ADC12_SINGLE: Single channel mode -* ADC12_ROUND : Round robin mode -* Return : None -*******************************************************************************/ -inline void ADC12_ModeConfig (ADC12_Modes ConversionMode) -{ - /* Select the mode of conversion and update the CSR */ - ADC12->CSR= ConversionMode == ADC12_SINGLE ? ADC12->CSR | ADC12_Mode_Mask :\ - ADC12->CSR & ~ADC12_Mode_Mask; -} - -/******************************************************************************* -* Function Name : ADC12_PrescalerConfig -* Description : This routine is used to configure the prescaler register. -* Input : Adc12_clk: Sampling frequency in Hz. -* Return : None. -*******************************************************************************/ -void ADC12_PrescalerConfig(u32 Adc12_clk); - -/******************************************************************************* -* Function Name : ADC12_ChannelSelect -* Description : This routine is used to select the channel passed as -* parameter to be converted. -* Input : ADC12_Channel: channel selected to be converted it may be -* ADC12_CHANNEL0 : select channel 0 -* ADC12_CHANNEL1 : select channel 1 -* ADC12_CHANNEL2 : select channel 2 -* ADC12_CHANNEL3 : select channel 3 -* Return : None -*******************************************************************************/ -inline void ADC12_ChannelSelect(ADC12_Channels ADC12_Channel) -{ - /* Update the CSR by the value of the selected channel */ - ADC12->CSR |= ADC12_Channel; -} - -/******************************************************************************* -* Function Name : ADC12_FlagStatus -* Description : This routine is used to test if the flag passed in parameter is set or not -* Input : ADC12_DA0 :Data Available on Channel 0 -* ADC12_DA1 :Data Available on Channel 1 -* ADC12_DA2 :Data Available on Channel 2 -* ADC12_DA3 :Data Available on Channel 3 -* ADC12_OR :Overrun -* Return : SET: if the flag is set -* RESET: if the flag is cleared -*******************************************************************************/ -inline FlagStatus ADC12_FlagStatus (ADC12_Flags flag) -{ - /* Test on the flag status and return set or RESET */ - return ADC12->CSR & flag ? SET : RESET; -} - -/******************************************************************************* -* Function Name : ADC12_ConversionValue -* Description : Read the conversion result from the data register. -* Input : ADC12_Channel :number of the register to read -* ADC12_CHANNEL0 : read the DATA0 register -* ADC12_CHANNEL1 : read the DATA1 register -* ADC12_CHANNEL2 : read the DATA2 register -* ADC12_CHANNEL3 : read the DATA3 register -* Return : the register value of the channel converted -*******************************************************************************/ -inline u16 ADC12_ConversionValue( ADC12_Channels ADC12_Channel) -{ - /* Clear the corespondent DA bit */ - ADC12->CSR &= ~(1<<(ADC12_Channel >> 4)); - - /* Only the 12 MSB of the DATAn Register are taken */ - return *(u16 *)(ADC12_BASE + (ADC12_Channel >> 1)) >> 4; -} - -/******************************************************************************* -* Function Name : ADC12_ITConfig -* Description : enable or disable the interruption -* Input : status=ENABLE=>enable interrupt -* status=DISABLE=>disable interrupt -* Return : None -*******************************************************************************/ -void ADC12_ITConfig (FunctionalState NewState); - -#endif /* _ADC12_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/apb.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/apb.h deleted file mode 100644 index 568f8991..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/apb.h +++ /dev/null @@ -1,90 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : apb.h -* Author : MCD Application Team -* Date First Issued : 05/30/2003 -* Description : This file contains all the functions prototypes for the -* APB bridge software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __APB_H -#define __APB_H - -#include "71x_map.h" - -/* APB1 Peripherals */ -#define I2C0_Periph 0x0000 -#define I2C1_Periph 0x0002 -#define UART0_Periph 0x0008 -#define UART1_Periph 0x0010 -#define UART2_Periph 0x0020 -#define UART3_Periph 0x0040 -#define USB_Periph 0x0080 -#define CAN_Periph 0x0100 -#define BSPI0_Periph 0x0200 -#define BSPI1_Periph 0x0400 -#define HDLC_Periph 0x2000 - -/* APB2 Peripherals */ -#define XTI_Periph 0x0000 -#define GPIO0_Periph 0x0004 -#define GPIO1_Periph 0x0008 -#define GPIO2_Periph 0x0010 -#define ADC12_Periph 0x0040 -#define CKOUT_Periph 0x0080 -#define TIM0_Periph 0x0100 -#define TIM1_Periph 0x0200 -#define TIM2_Periph 0x0400 -#define TIM3_Periph 0x0800 -#define RTC_Periph 0x1000 -#define EIC_Periph 0x4000 - -/******************************************************************************* -* Function Name : APB_ClockConfig -* Description : Enables/Disables the Clock gating for peripherals on the APB -* bridge passed in parameters. -* Input : APBx ( APB1 or APB2 ) -* NewState ENABLE or DISABLE -* NewValue (u16) -* Return : None -*******************************************************************************/ -inline void APB_ClockConfig ( APB_TypeDef *APBx, - FunctionalState NewState, - u16 NewValue ) -{ - if (NewState == ENABLE) APBx->CKDIS &= ~NewValue; - else APBx->CKDIS |= NewValue; -} - -/******************************************************************************* -* Function Name : APB_SwResetConfig -* Description : Enables/Disables the software Reset for peripherals on the APB -* bridge passed in parameters. -* Input : APBx ( APB1 or APB2 ) -* NewState ENABLE or DISABLE -* NewValue (u16) -* Return : None -*******************************************************************************/ -inline void APB_SwResetConfig ( APB_TypeDef *APBx, - FunctionalState NewState, - u16 NewValue ) -{ - if (NewState == ENABLE) APBx->SWRES |= NewValue; - else APBx->SWRES &= ~NewValue; -} - -#endif /* __APB_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/bspi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/bspi.h deleted file mode 100644 index ede8552c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/bspi.h +++ /dev/null @@ -1,325 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : bspi.h -* Author : MCD Application Team -* Date First Issued : 16/05/2003 -* Description : This file contains all the functions prototypes for the -* BSPI software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __BSPI_H -#define __BSPI_H - -#include "71x_map.h" - -typedef enum { - BSPI_BERIT = 0x80, - BSPI_RCIT = 0x10, - BSPI_ALL = 0x90 -} BSPI_ITS; - -typedef enum { - BSPI_BERR = 0x004, - BSPI_RFNE = 0x008, - BSPI_RFF = 0x010, - BSPI_ROFL = 0x020, - BSPI_TFE = 0x040, - BSPI_TUFL = 0x080, - BSPI_TFF = 0x100, - BSPI_TFNE = 0x200 -} BSPI_Flags; - -typedef enum { - BSPI_TR_FE, - BSPI_TR_UFL, - BSPI_TR_FF, - BSPI_TR_DIS -} BSPI_TR_IT_SRCS; - -typedef enum { - BSPI_RC_FNE, - BSPI_RC_FF, - BSPI_RC_DIS -} BSPI_RC_IR_SRCS; - -#define BSPI_PESET_Mask 0x01 -#define BSPI_DFIFO_Mask 0xFFFE -#define BSPI_CPHA_Mask 0x200 -#define BSPI_CPOL_Mask 0x100 -#define BSPI_BSPI0_Base 0xA000 -#define BSPI_BSPI1_Base 0xB000 - - -/******************************************************************************* -* Function Name : BSPI_BSPI0Conf -* Description : configure STR71x on BSPI0 mode. -* Input 2 : NewState: specifies the status of the BSPI -* : NewState value must be either ENABLE or DISABLE: -* : ENABLE: the specified BSPI0 peripheral will be enabled. -* : DISABLE: the specified BSPI0 peripheral will be disabled.. -* Output : SPI0 EN bit in BOOTCR. -* Return : None. -*******************************************************************************/ -inline void BSPI_BSPI0Conf(FunctionalState NewState) -{ - if (NewState == ENABLE) PCU->BOOTCR |= 0x04; else PCU->BOOTCR &= ~0x04; -} - -/******************************************************************************* -* Function Name : BSPI_Init -* Description : Initializes BSPI peripheral control and registers to their default reset values. -* Input : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Output : BSPI peripheral registers and BSPI global variables are initialized. -* Return : None. -*******************************************************************************/ -void BSPI_Init( BSPI_TypeDef *BSPIx); - -/******************************************************************************* -* Function Name : BSPI_Enable -* Description : Enables/disables the specified BSPI peripheral. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral to be enabled or disabled. -* Input 2 : NewState: specifies the status of the BSPI -* : NewState value must be either ENABLE or DISABLE: -* : ENABLE: the specified BSPI peripheral will be enabled. -* : DISABLE: the specified BSPI peripheral will be disabled. -* Output : BSPE bit in BSPCSR1. -* Return : None. -*******************************************************************************/ -inline void BSPI_Enable( BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_PESET_Mask; - else BSPIx->CSR1 &= ~BSPI_PESET_Mask; -} - -/******************************************************************************* -* Function Name : BSPI_MasterEnable -* Description : Configures the BSPI as a Master or a Slave. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : NewState: specifies whether configuring BSPI as master is enabled or disabled. -* : ENABLE: the specified BSPI will be configured as a master. -* : DISABLE: the specified BSPI will be configured as a slave. -* Output : MSTR bit in BSPCSR1 is modified register. -* Return : None. -*******************************************************************************/ -inline void BSPI_MasterEnable(BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= 0x02; else BSPIx->CSR1 &= ~0x02; -} - -/******************************************************************************* -* Function Name : BSPI_TrItSrc. -* Description : Configures the transmit interrupt source. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : TrItSrc: specifies the transmit interrupt source. -* : Refer to the section ‘Transmit Interrupt Sources’ for more details on the -* : allowed values of this parameter. -* Output : TIE bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -void BSPI_TrItSrc(BSPI_TypeDef *BSPIx, BSPI_TR_IT_SRCS TrItSrc); - -/******************************************************************************* -* Function Name : BSPI_RcItSrc. -* Description : Configures the receive interrupt source. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : RcItSrc: specifies the source for the receive interrupt. -* : Refer to the section ‘Receive Interrupt Sources’ for more details on the -* : allowed values of this parameter. -* Output : RIE bit in BSPCSR1 is register. -* Return : None. -*******************************************************************************/ -void BSPI_RcItSrc(BSPI_TypeDef *BSPIx, BSPI_RC_IR_SRCS RcItSrc); - -/******************************************************************************* -* Function Name : BSPI_TrFifoDepth -* Description : Configures BSPI transmission FIFO number of words. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI. -* Input 2 : TDepth:specifies the depth of the transmit FIFO. -* Output : TFE bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -void BSPI_TrFifoDepth(BSPI_TypeDef *BSPIx, u8 TDepth); - -/******************************************************************************* -* Function Name : BSPI_RcFifoDepth -* Description : Configures BSPI reception FIFO number of words. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : RDepth:specifies the depth of the receive FIFO. -* Output : RFE bits [3:0] in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -void BSPI_RcFifoDepth(BSPI_TypeDef *BSPIx, u8 RDepth); - -/******************************************************************************* -* Function Name : BSPI_8bLEn -* Description : Sets the word length of the receive FIFO and transmit data registers to either 8 or 16 bits. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI. -* Input 2 : status: specifies if the word length is 8 or 16 bits. -* : status value must be either ENABLE or DISABLE: -* : ENABLE: to enable setting the word length to 8 bits. -* : DISABLE: disables setting the word length to 8 bits: the wordlength will be configured to 16 bits. -* Output : WL bits in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -inline void BSPI_8bLEn(BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == DISABLE) BSPIx->CSR1 |= 0x0400; else BSPIx->CSR1 &= ~0x0C00; -} - -/******************************************************************************* -* Function Name : BSPI_ClkFEdge -* Description : Enables capturing the first data sample on the first edge of SCK or on the second edge. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : NewState: specifies whether capturing the first data sample on the first edge of SCK is enabled or disabled. -* : status value must be either ENABLE or DISABLE. -* :DISABLE: to enable capturing the first data sample on the first edge of SCK. -* : ENABLE: to enable capturing the first data sample on the second edge of SCK. -* Output : CPHA bits in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -inline void BSPI_ClkFEdge(BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_CPHA_Mask; - else BSPIx->CSR1&=~BSPI_CPHA_Mask; -} - -/******************************************************************************* -* Function Name : BSPI_ClkActiveHigh -* Description : Configures the clock to be active high or low. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : NewState: specifies whether the clock is active high or low. -* : status value must be ENABLE or DISABLE. -* : ENABLE: configures the clock to be active high. -* : DISABLE: confgures the clock to be active low. -* Output : CPOL bits in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -inline void BSPI_ClkActiveHigh(BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_CPOL_Mask; - else BSPIx->CSR1 &= ~BSPI_CPOL_Mask; -} - -/******************************************************************************* -* Function Name : BSPI_FifoDisable -* Description : Configure the BSPI FIFO. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Output : DFIFO bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -inline void BSPI_FifoDisable(BSPI_TypeDef *BSPIx) -{ - BSPIx->CSR2 |= 0x0001; -} - -/******************************************************************************* -* Function Name : BSPI_ClockDividerConfig -* Description : Configure BSPI clock divider -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI. -* Input 2 : Div: holds the value of the clock divider. -* Output : Div [7:0] bits in BSPCLK register. -* Return : None. -*******************************************************************************/ -inline void BSPI_ClockDividerConfig(BSPI_TypeDef *BSPIx, u8 Div) -{ - BSPIx->CLK = Div; -} - -/******************************************************************************* -* Function Name : BSPI_FlagStatus. -* Description : Check whether the specified BSPI Flag is set or not. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : flag: specifies the flag to see the status. -* : Refer to the section ‘BSPI Flags’ for more details on the allowed values of this parameter. -* Output : None. -* Return : FlagStatus type -* : SET: if the tested flag is set. -* : RESET: if the corresponding flag is reset. -*******************************************************************************/ -inline FlagStatus BSPI_FlagStatus(BSPI_TypeDef *BSPIx, BSPI_Flags flag) -{ - return (BSPIx->CSR2 & flag) != 0 ? SET : RESET; -} - -/******************************************************************************* -* Function Name : BSPI_WordSend. -* Description : Transmit a single Word. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : holds the word which will be transmitted. -* Output : BSPTXR register. -* Return : None. -*******************************************************************************/ -inline void BSPI_WordSend(BSPI_TypeDef *BSPIx, u16 Data) -{ - if ((BSPIx->CSR1 & 0x0400) == 0) Data <<= 8; - BSPIx->TXR = Data; -} - -/******************************************************************************* -* Function Name : BSPI_BufferSend. -* Description : Transmits data from a buffer. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : PtrToBuffer is an ‘u8’ pointer to the first word of the buffer to be transmitted. -* Input 3 : NbOfWords parameter indicates the number of words saved in the buffer to be sent. -* Output : None. -* Return : None. -*******************************************************************************/ -void BSPI_BufferSend(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords); - -/******************************************************************************* -* Function Name : BSPI_WordReceive. -* Description : Returns the recent received word. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Output : None. -* Return : The value of the received word. -*******************************************************************************/ -inline u16 BSPI_WordReceive(BSPI_TypeDef *BSPIx) -{ - return (BSPIx->CSR1 & 0x0400) == 0 ? BSPIx->RXR >> 8 : BSPIx->RXR; -} - -/******************************************************************************* -* Function Name : BSPI_BufferReceive. -* Description : Receives number of data words and stores them in user defined area. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : PtrToBuffer is an ‘u8’ pointer to the first word of the defined area to save the received buffer. -* Input 3 : NbOfWords parameter indicates the number of words to be received in the buffer. -* Output : None. -* Return : None. -*******************************************************************************/ -void BSPI_BufferReceive(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords); - -/******************************************************************************* -* Function Name : BSPI_ItEnable. -* Description : Enable the specified interrupt. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : BSPI_IT: specifies the BSPI interrupt. -* : Refer to the section ‘Interrupt Enable’ for more details on the allowed values of this parameter.. -* Input 3 : NewState: specified whether the BSPI interrupt is enabled or disabled. -* : status value must be either ENABLE or DISABLE. -* : ENABLE: to enable interrupt -* : DISABLE: to disable interrupt. -* Output : BSPCSR1 register. -* Return : None. -*******************************************************************************/ -inline void BSPI_ItEnable(BSPI_TypeDef *BSPIx, BSPI_ITS BSPI_IE, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_IE; else BSPIx->CSR1 &= ~BSPI_IE; -} - -#endif /* __BSPI_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/can.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/can.h deleted file mode 100644 index 3e8ab646..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/can.h +++ /dev/null @@ -1,407 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : can.h -* Author : MCD Application Team -* Date First Issued : 27/10/2003 -* Description : This file contains all the functions prototypes for the -* CAN bus software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __CAN_H -#define __CAN_H - -#include "71x_map.h" - -/* Standard bitrates available */ -enum -{ - CAN_BITRATE_100K, - CAN_BITRATE_125K, - CAN_BITRATE_250K, - CAN_BITRATE_500K, - CAN_BITRATE_1M -}; - -/* Control register */ -#define CAN_CR_TEST 0x0080 -#define CAN_CR_CCE 0x0040 -#define CAN_CR_DAR 0x0020 -#define CAN_CR_EIE 0x0008 -#define CAN_CR_SIE 0x0004 -#define CAN_CR_IE 0x0002 -#define CAN_CR_INIT 0x0001 - -/* Status register */ -#define CAN_SR_LEC 0x0007 -#define CAN_SR_TXOK 0x0008 -#define CAN_SR_RXOK 0x0010 -#define CAN_SR_EPASS 0x0020 -#define CAN_SR_EWARN 0x0040 -#define CAN_SR_BOFF 0x0080 - -/* Test register */ -#define CAN_TESTR_RX 0x0080 -#define CAN_TESTR_TX1 0x0040 -#define CAN_TESTR_TX0 0x0020 -#define CAN_TESTR_LBACK 0x0010 -#define CAN_TESTR_SILENT 0x0008 -#define CAN_TESTR_BASIC 0x0004 - -/* IFn / Command Request register */ -#define CAN_CRR_BUSY 0x8000 - -/* IFn / Command Mask register */ -#define CAN_CMR_WRRD 0x0080 -#define CAN_CMR_MASK 0x0040 -#define CAN_CMR_ARB 0x0020 -#define CAN_CMR_CONTROL 0x0010 -#define CAN_CMR_CLRINTPND 0x0008 -#define CAN_CMR_TXRQST 0x0004 -#define CAN_CMR_DATAA 0x0002 -#define CAN_CMR_DATAB 0x0001 - -/* IFn / Mask 2 register */ -#define CAN_M2R_MXTD 0x8000 -#define CAN_M2R_MDIR 0x4000 - -/* IFn / Arbitration 2 register */ -#define CAN_A2R_MSGVAL 0x8000 -#define CAN_A2R_XTD 0x4000 -#define CAN_A2R_DIR 0x2000 - -/* IFn / Message Control register */ -#define CAN_MCR_NEWDAT 0x8000 -#define CAN_MCR_MSGLST 0x4000 -#define CAN_MCR_INTPND 0x2000 -#define CAN_MCR_UMASK 0x1000 -#define CAN_MCR_TXIE 0x0800 -#define CAN_MCR_RXIE 0x0400 -#define CAN_MCR_RMTEN 0x0200 -#define CAN_MCR_TXRQST 0x0100 -#define CAN_MCR_EOB 0x0080 - - -/* Wake-up modes */ -enum -{ - CAN_WAKEUP_ON_EXT, - CAN_WAKEUP_ON_CAN -}; - - -/* CAN message structure */ -typedef struct -{ - u32 IdType; - vu32 Id; - vu8 Dlc; - vu8 Data[8]; -} canmsg; - -/* message ID types */ -enum -{ - CAN_STD_ID, - CAN_EXT_ID -}; - -/* message ID limits */ -#define CAN_LAST_STD_ID ((1<<11) - 1) -#define CAN_LAST_EXT_ID ((1L<<29) - 1) - -/******************************************************************************* -* Function Name : CAN_EnterInitMode -* Description : Switch the CAN into initialization mode -* Input 1 : any binary value formed from the CAN_CR_xxx defines -* Output : None -* Return : None -* Note : CAN_LeaveInitMode must be called when all is done -*******************************************************************************/ -inline void CAN_EnterInitMode(u8 mask) -{ - CAN->CR = mask | CAN_CR_INIT; - - /* reset the status */ - CAN->SR = 0; -} - -/******************************************************************************* -* Function Name : CAN_LeaveInitMode -* Description : Leave the initialization mode (switch into normal mode) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -inline void CAN_LeaveInitMode(void) -{ - CAN->CR &= ~(CAN_CR_INIT | CAN_CR_CCE); -} - -/******************************************************************************* -* Function Name : CAN_EnterTestMode -* Description : Switch the CAN into test mode -* Input 1 : any binary value formed from the CAN_TESTR_xxx defines -* Output : None -* Return : None -* Note : CAN_LeaveTestMode must be called when all is done -*******************************************************************************/ -inline void CAN_EnterTestMode(u8 mask) -{ - CAN->CR |= CAN_CR_TEST; - CAN->TESTR |= mask; -} - -/******************************************************************************* -* Function Name : CAN_LeaveTestMode -* Description : Leave the current test mode (switch into normal mode) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -inline void CAN_LeaveTestMode(void) -{ - CAN->CR |= CAN_CR_TEST; - CAN->TESTR &= ~(CAN_TESTR_LBACK | CAN_TESTR_SILENT | CAN_TESTR_BASIC); - CAN->CR &= ~CAN_CR_TEST; -} - -/******************************************************************************* -* Function Name : CAN_SetBitrate -* Description : Setup a standard CAN bitrate -* Input 1 : one of the CAN_BITRATE_xxx defines -* Output : None -* Return : None -* Note : CAN must be in initialization mode -*******************************************************************************/ -void CAN_SetBitrate(u32 bitrate); - -/******************************************************************************* -* Function Name : CAN_SetTiming -* Description : Setup the CAN timing with specific parameters -* Input 1 : Time Segment before the sample point position, from 1 to 16 -* Input 2 : Time Segment after the sample point position, from 1 to 8 -* Input 3 : Synchronisation Jump Width, from 1 to 4 -* Input 4 : Baud Rate Prescaler, from 1 to 1024 -* Output : None -* Return : None -* Note : CAN must be in initialization mode -*******************************************************************************/ -void CAN_SetTiming(u32 tseg1, u32 tseg2, u32 sjw, u32 brp); - -/******************************************************************************* -* Function Name : CAN_SleepRequest -* Description : Request the CAN cell to enter sleep mode -* Input 1 : CAN_WAKEUP_ON_EXT or CAN_WAKEUP_ON_CAN -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SleepRequest(u32 WakeupMode); - -/******************************************************************************* -* Function Name : CAN_SetUnusedMsgObj -* Description : Configure the message object as unused -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetUnusedMsgObj(u32 msgobj); - -/******************************************************************************* -* Function Name : CAN_SetTxMsgObj -* Description : Configure the message object as TX -* Input 1 : message object number, from 0 to 31 -* Input 2 : CAN_STD_ID or CAN_EXT_ID -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetTxMsgObj(u32 msgobj, u32 idType); - -/******************************************************************************* -* Function Name : CAN_SetRxMsgObj -* Description : Configure the message object as RX -* Input 1 : message object number, from 0 to 31 -* Input 2 : CAN_STD_ID or CAN_EXT_ID -* Input 3 : low part of the identifier range used for acceptance filtering -* Input 4 : high part of the identifier range used for acceptance filtering -* Input 5 : TRUE for a single receive object or a FIFO receive object that -* is the last one of the FIFO -* FALSE for a FIFO receive object that is not the last one -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetRxMsgObj(u32 msgobj, u32 idType, u32 idLow, u32 idHigh, bool singleOrFifoLast); - -/******************************************************************************* -* Function Name : CAN_InvalidateAllMsgObj -* Description : Configure all the message objects as unused -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void CAN_InvalidateAllMsgObj(void); - -/******************************************************************************* -* Function Name : CAN_Init -* Description : Initialize the CAN cell and set the bitrate -* Input 1 : any binary value formed from the CAN_CTL_xxx defines -* Input 2 : one of the CAN_BITRATE_xxx defines -* Output : None -* Return : None -*******************************************************************************/ -void CAN_Init(u8 mask, u32 bitrate); - -/******************************************************************************* -* Function Name : CAN_ReleaseMessage -* Description : Release the message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -*******************************************************************************/ -void CAN_ReleaseMessage(u32 msgobj); - -/******************************************************************************* -* Function Name : CAN_ReleaseTxMessage -* Description : Release the transmit message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -* Note : assume that message interface 0 is free -*******************************************************************************/ -inline void CAN_ReleaseTxMessage(u32 msgobj) -{ - CAN->sMsgObj[0].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQST; - CAN->sMsgObj[0].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_ReleaseRxMessage -* Description : Release the receive message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -* Note : assume that message interface 1 is free -*******************************************************************************/ -inline void CAN_ReleaseRxMessage(u32 msgobj) -{ - CAN->sMsgObj[1].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQST; - CAN->sMsgObj[1].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_SendMessage -* Description : Start transmission of a message -* Input 1 : message object number, from 0 to 31 -* Input 2 : pointer to the message structure containing data to transmit -* Output : None -* Return : 1 if transmission was OK, else 0 -*******************************************************************************/ -u32 CAN_SendMessage(u32 msgobj, canmsg* pCanMsg); - -/******************************************************************************* -* Function Name : CAN_ReceiveMessage -* Description : Get the message, if received -* Input 1 : message object number, from 0 to 31 -* Input 2 : if TRUE, the message object is released when getting the data -* if FALSE, the message object is not released -* Input 3 : pointer to the message structure where received data is stored -* Output : None -* Return : 1 if reception was OK, else 0 (no message pending) -*******************************************************************************/ -u32 CAN_ReceiveMessage(u32 msgobj, bool release, canmsg* pCanMsg); - -/******************************************************************************* -* Function Name : CAN_WaitEndOfTx -* Description : Wait until current transmission is finished -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void CAN_WaitEndOfTx(void); - -/******************************************************************************* -* Function Name : CAN_BasicSendMessage -* Description : Start transmission of a message in BASIC mode -* Input 1 : pointer to the message structure containing data to transmit -* Output : None -* Return : 1 if transmission was OK, else 0 -* Note : CAN must be in BASIC mode -*******************************************************************************/ -u32 CAN_BasicSendMessage(canmsg* pCanMsg); - -/******************************************************************************* -* Function Name : CAN_BasicReceiveMessage -* Description : Get the message in BASIC mode, if received -* Input 1 : pointer to the message structure where received data is stored -* Output : None -* Return : 1 if reception was OK, else 0 (no message pending) -* Note : CAN must be in BASIC mode -*******************************************************************************/ -u32 CAN_BasicReceiveMessage(canmsg* pCanMsg); - -/******************************************************************************* -* Function Name : CAN_IsMessageWaiting -* Description : Test the waiting status of a received message -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : A non-zero value if the corresponding message object has -* received a message waiting to be copied, else 0 -*******************************************************************************/ -inline u32 CAN_IsMessageWaiting(u32 msgobj) -{ - return (msgobj < 16 ? CAN->ND1R & (1 << msgobj) : CAN->ND2R & (1 << (msgobj-16))); -} - -/******************************************************************************* -* Function Name : CAN_IsTransmitRequested -* Description : Test the request status of a transmitted message -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : A non-zero value if the corresponding message is requested -* to transmit, else 0 -*******************************************************************************/ -inline u32 CAN_IsTransmitRequested(u32 msgobj) -{ - return (msgobj < 16 ? CAN->TR1R & (1 << msgobj) : CAN->TR2R & (1 << (msgobj-16))); -} - -/******************************************************************************* -* Function Name : CAN_IsInterruptPending -* Description : Test the interrupt status of a message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : A non-zero value if the corresponding message has an interrupt -* pending, else 0 -*******************************************************************************/ -inline u32 CAN_IsInterruptPending(u32 msgobj) -{ - return (msgobj < 16 ? CAN->IP1R & (1 << msgobj) : CAN->IP2R & (1 << (msgobj-16))); -} - -/******************************************************************************* -* Function Name : CAN_IsObjectValid -* Description : Test the validity of a message object (ready to use) -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : A non-zero value if the corresponding message object is valid, -* else 0 -*******************************************************************************/ -inline u32 CAN_IsObjectValid(u32 msgobj) -{ - return (msgobj < 16 ? CAN->MV1R & (1 << msgobj) : CAN->MV2R & (1 << (msgobj-16))); -} - -#endif /* __CAN_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/eic.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/eic.h deleted file mode 100644 index c39f119b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/eic.h +++ /dev/null @@ -1,201 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : eic.h -* Author : MCD Application Team -* Date First Issued : 25/06/2003 -* Description : This file contains all the functions prototypes for the -* EIC software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __EIC_H -#define __EIC_H - -#include "71x_map.h" - -typedef enum -{ - T0TIMI_IRQChannel = 0, - FLASH_IRQChannel = 1, - RCCU_IRQChannel = 2, - RTC_IRQChannel = 3, - WDG_IRQChannel = 4, - XTI_IRQChannel = 5, - USBHP_IRQChannel = 6, - I2C0ITERR_IRQChannel = 7, - I2C1ITERR_IRQChannel = 8, - UART0_IRQChannel = 9, - UART1_IRQChannel = 10, - UART2_IRQChannel = 11, - UART3_IRQChannel = 12, - SPI0_IRQChannel = 13, - SPI1_IRQChannel = 14, - I2C0_IRQChannel = 15, - I2C1_IRQChannel = 16, - CAN_IRQChannel = 17, - ADC_IRQChannel = 18, - T1TIMI_IRQChannel = 19, - T2TIMI_IRQChannel = 20, - T3TIMI_IRQChannel = 21, - HDLC_IRQChannel = 25, - USBLP_IRQChannel = 26, - T0TOI_IRQChannel = 29, - T0OC1_IRQChannel = 30, - T0OC2_IRQChannel = 31 -} IRQChannel_TypeDef; - -typedef enum -{ - T0TIMI_FIQChannel = 0x00000001, - WDG_FIQChannel = 0x00000002, - WDGT0TIMI_FIQChannels = 0x00000003 -} FIQChannel_TypeDef; - -/******************************************************************************* -* Function Name : EIC_Init -* Description : Initialise the EIC using the load PC instruction -* (PC = PC +offset) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EIC_Init(void); - -/******************************************************************************* -* Function Name : EIC_IRQConfig -* Description : Enable or Disable IRQ interrupts -* Input 1 : New status : can be ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -inline void EIC_IRQConfig(FunctionalState NewState) -{ - if (NewState==ENABLE) EIC->ICR |= 0x0001; else EIC->ICR &= ~0x0001; -} - -/******************************************************************************* -* Function Name : EIC_FIQConfig -* Description : Enable or Disable FIQ interrupts -* Input 1 : New status : can be ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -inline void EIC_FIQConfig(FunctionalState NewState) -{ - if (NewState==ENABLE) EIC->ICR |= 0x0002; else EIC->ICR &= ~0x0002; -} - -/******************************************************************************* -* Function Name : EIC_IRQChannelConfig -* Description : Configure the IRQ Channel -* Input 1 : IRQ channel name -* Input 2 : Channel New status : can be ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -inline void EIC_IRQChannelConfig(IRQChannel_TypeDef IRQChannel, FunctionalState NewState) -{ - if (NewState==ENABLE) EIC->IER |= 0x0001 << IRQChannel; - else EIC->IER &= ~(0x0001 << IRQChannel); -} - -/******************************************************************************* -* Function Name : EIC_FIQChannelConfig -* Description : Configure the FIQ Channel -* Input 1 : FIQ channel name -* Input 2 : Channel New status : can be ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -inline void EIC_FIQChannelConfig(FIQChannel_TypeDef FIQChannel, - FunctionalState NewState) -{ - if (NewState==ENABLE) EIC->FIR |= FIQChannel; - else EIC->FIR &= ~FIQChannel; -} - -/******************************************************************************* -* Function Name : EIC_IRQChannelPriorityConfig -* Description : Configure the selected IRQ channel priority -* Input 1 : IRQ channel name -* Input 2 : IRQ channel priority -* Output : None -* Return : None -*******************************************************************************/ -inline void EIC_IRQChannelPriorityConfig(IRQChannel_TypeDef IRQChannel, u8 Priority) -{ - EIC->SIR[IRQChannel] = (EIC->SIR[IRQChannel]&0xFFFF0000) | (u16)Priority & 0x000F; -} - -/******************************************************************************* -* Function Name : EIC_CurrentPriorityLevelConfig -* Description : Change the current priority level of the srved IRQ routine -* Input 1 : New priority -* Output : None -* Return : None -*******************************************************************************/ -void EIC_CurrentPriorityLevelConfig(u8 NewPriorityLevel); - -/******************************************************************************* -* Function Name : EIC_CurrentPriorityLevelValue -* Description : Return the current priority level of the current served IRQ -* routine -* Input : None -* Output : None -* Return : The current priority level -*******************************************************************************/ -inline u8 EIC_CurrentPriorityLevelValue(void) -{ - return EIC->CIPR & 0xF; -} - -/******************************************************************************* -* Function Name : EIC_CurrentIRQChannelValue -* Description : Return the current served IRQ channel number -* Input 0 : None -* Output : None -* Return : The current served IRQ channel number -*******************************************************************************/ -inline IRQChannel_TypeDef EIC_CurrentIRQChannelValue(void) -{ - return (IRQChannel_TypeDef)(EIC->CICR & 0x1F); -} - -/******************************************************************************* -* Function Name : EIC_CurrentFIQChannelValue -* Description : Return the current served FIQ channel number -* Input : None -* Output : None -* Return : The current served FIQ channel number -*******************************************************************************/ -inline FIQChannel_TypeDef EIC_CurrentFIQChannelValue(void) -{ - return (FIQChannel_TypeDef)((EIC->FIR >> 2) & 0x0003); -} - -/******************************************************************************* -* Function Name : EIC_FIPendingBitClear -* Description : Clear the FIQ pending bit -* Input 1 : FIQ channel -* Output : None -* Return : None -*******************************************************************************/ -inline void EIC_FIQPendingBitClear(FIQChannel_TypeDef FIQChannel) -{ - EIC->FIR = (EIC->FIR & 0x0003) | (FIQChannel << 2); -} - -#endif /* __EIC_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/emi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/emi.h deleted file mode 100644 index 2f9c2aac..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/emi.h +++ /dev/null @@ -1,53 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : emi.h -* Author : MCD Application Team -* Date First Issued : 08/08/2003 -* Description : This file contains all the functions prototypes for the -* EMI software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef _EMI_H -#define _EMI_H - -#include "71x_map.h" - -#define EMI_ENABLE 0x8000 -#define EMI_DISABLE 0x0000 -#define EMI_WAITSTATE(n) ((n) << 2) -#define EMI_SIZE_8 0x0000 -#define EMI_SIZE_16 0x0001 - -#define EMI_BANK0 EXTMEM_BASE -#define EMI_BANK1 (EXTMEM_BASE + 0x2000000) -#define EMI_BANK2 (EXTMEM_BASE + 0x4000000) -#define EMI_BANK3 (EXTMEM_BASE + 0x6000000) -/******************************************************************************* -* Function Name : EMI_Config -* Description : This routine is used, for each bank, to configure enabling, -* : cycle length and bus size. -* Input : Bank (u8) -* : Config (u16) -* Return : None -*******************************************************************************/ -inline void EMI_Config(u8 Bank, u16 Config) -{ - *(u16 *)(EMI_BASE + (4*Bank)) = Config; -} - -#endif /* _EMI_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/flash.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/flash.h deleted file mode 100644 index 8b5e383e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/flash.h +++ /dev/null @@ -1,256 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : flash.h -* Author : MCD Application Team -* Date First Issued : 28/07/2003 -* Description : This file contains all the functions prototypes for the -* Embedded Flash software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __FLASH_H -#define __FLASH_H - -#include "71x_map.h" - -#define FLASH_B0F0 0x00000001 -#define FLASH_B0F1 0x00000002 -#define FLASH_B0F2 0x00000004 -#define FLASH_B0F3 0x00000008 -#define FLASH_B0F4 0x00000010 -#define FLASH_B0F5 0x00000020 -#define FLASH_B0F6 0x00000040 -#define FLASH_B0F7 0x00000080 - -#define FLASH_B1F0 0x00010000 -#define FLASH_B1F1 0x00020000 - -#define FLASH_B0 (FLASH_B0F0 | FLASH_B0F1 | FLASH_B0F2 | FLASH_B0F3 | FLASH_B0F4 | FLASH_B0F5 | FLASH_B0F6 | FLASH_B0F7) -#define FLASH_B1 (FLASH_B1F0 | FLASH_B1F1) - -typedef enum -{ - FLASH_BANK0 = 0x1000000, - FLASH_BANK1 = 0x2000000 -} flashbanks; - -typedef enum -{ - FLASH_BSYA0 = 0x01, /* 000-00001 = 0000 0001 = 0x01 */ /* FLASH_CR0.1 */ - FLASH_BSYA1 = 0x02, /* 000-00010 = 0000 0010 = 0x02 */ /* FLASH_CR0.2 */ - FLASH_LOCK = 0x04, /* 000-00100 = 0000 0100 = 0x04 */ /* FLASH_CR0.4*/ - FLASH_INTP = 0x14, /* 000-10100 = 0001 0100 = 0x14 */ /* FLASH_CR0.20 */ - FLASH_B0S = 0x38, /* 001-11000 = 0011 1000 = 0x38 */ /* FLASH_CR1.24*/ - FLASH_B1S = 0x39, /* 001-11001 = 0011 1001 = 0x39 */ /* FLASH_CR1.25*/ - FLASH_ERR = 0xA0, /* 101-00000 = 1010 0000 = 0xA0 */ /* FLASH_ER.0*/ - FLASH_ERER = 0xA1, /* 101-00001 = 1010 0001 = 0xA1 */ /* FLASH_ER.1*/ - FLASH_PGER = 0xA2, /* 101-00010 = 1010 0010 = 0xA2 */ /* FLASH_ER.2*/ - FLASH_10ER = 0xA3, /* 101-00011 = 1010 0011 = 0xA3 */ /* FLASH_ER.3*/ - FLASH_SEQER = 0xA6, /* 101-00110 = 1010 0110 = 0xA6 */ /* FLASH_ER.6*/ - FLASH_RESER = 0xA7, /* 101-00111 = 1010 0111 = 0xA7 */ /* FLASH_ER.7*/ - FLASH_WPF = 0xA8 /* 101-01000 = 1010 1000 = 0xA8 */ /* FLASH_ER.8*/ -} flashflags; - -#define FLASH_WMS_Mask 0x80000000 -#define FLASH_SUSP_Mask 0x40000000 -#define FLASH_WPG_Mask 0x20000000 -#define FLASH_DWPG_Mask 0x10000000 -#define FLASH_SER_Mask 0x08000000 -#define FLASH_SPR_Mask 0x01000000 -#define FLASH_DBGP_Mask 0x00000002 -#define FLASH_ACCP_Mask 0x00000001 - -#define FLASH_Reg_Mask 0xE0 -#define FLASH_Flag_Mask 0x1F - -#define FLASH_INTM_Mask 0x00200000 - - -/******************************************************************************* -* Function Name : FLASH_Init -* Description : Initialise the Flash -* Input : None -* Return : None -*******************************************************************************/ -void FLASH_Init(void); - -/******************************************************************************* -* Function Name : FLASH_FlagStatus -* Description : Returns the NewState of Flash flags -* Input 1 : Flash Flag (FLASH_BSYA0, FLASH_BSYA1, FLASH_LOCK, FLASH_INTP -* FLASH_B0S, FLASH_B1S, FLASH_ERR, FLASH_ERER, FLASH_PGER, -* FLASH_10ER, FLASH_SEQER, FLASH_RESER, FLASH_WPF) -* Return : flagstatus (SET or RESET) -*******************************************************************************/ -FlagStatus FLASH_FlagStatus(flashflags Xflag); - -/******************************************************************************* -* Function Name : FLASH_WriteOpStatus -* Description : Checks the write operation status -* Input 1 : Flash bank (FLASH_BANK0 or FLASH_BANK1) -* Return : write operation status (Write operation is going on if -* FlagStatus is SET and write operation is completed if -* FlagStatus is RESET) -*******************************************************************************/ -inline FlagStatus FLASH_WriteOpStatus(flashbanks Xbank) -{ - return Xbank == FLASH_BANK0 ? FLASH_FlagStatus(FLASH_BSYA0) : FLASH_FlagStatus(FLASH_BSYA1); -} - -/******************************************************************************* -* Function Name : FLASH_WordWrite -* Description : Writes a Word to the Flash -* Input 1 : Destination Address -* Input 2 : Word to program -* Return : None -*******************************************************************************/ -void FLASH_WordWrite(u32 TargetAdd, u32 Data); - -/******************************************************************************* -* Function Name : FLASH_DWordWrite -* Description : Writes Double Word to the Flash -* Input 1 : Destination Address -* Input 2 : Word 1 To program -* Input 3 : Word 2 To program -* Return : None -*******************************************************************************/ -void FLASH_DWordWrite(u32 TargetAdd, u32 Data0, u32 Data1); - -/******************************************************************************* -* Function Name : FLASH_SectorErase -* Description : Erases a Flash sector -* Input 1 : Sectors to be Erased -* Return : None -*******************************************************************************/ -void FLASH_SectorErase(u32 Xsectors); - -/******************************************************************************* -* Function Name : FLASH_BankErase -* Description : Erases a Bank of the Flash -* Input 1 : Bank to be Erased -* Return : None -*******************************************************************************/ -inline void FLASH_BankErase(flashbanks Xbank) -{ - FLASH_SectorErase(Xbank == FLASH_BANK0 ? FLASH_B0 : FLASH_B1); -} - -/******************************************************************************* -* Function Name : FLASH_Suspend -* Description : Suspends the current program or erase operation -* Input 1 : None -* Return : Flash CR0 register -*******************************************************************************/ -u32 FLASH_Suspend(void); - -/******************************************************************************* -* Function Name : FLASH_Resume -* Description : Resume a Suspended program or erase operation -* Input 1 : The operation to be resumed -* Return : None -*******************************************************************************/ -void FLASH_Resume(u32 FLASH_LastOperation); - -/******************************************************************************* -* Function Name : FLASH_WordRead -* Description : Read a single word of the flash -* Input 1 : Source Address -* Return : Word -*******************************************************************************/ -u32 FLASH_WordRead(u32 FLASH_SourceAdd); - -/******************************************************************************* -* Function Name : FLASH_FlagClear -* Description : Clears a flash flag -* Input 1 : Flash Flag -* Return : None -*******************************************************************************/ -void FLASH_FlagClear(flashflags Xflag); - -/******************************************************************************* -* Function Name : FLASH_ITConfig -* Description : Enables or Disables the write-end interrupt -* Input 1 : FunctionalState(Enable, Disable) -* Return : None -*******************************************************************************/ -inline void FLASH_ITConfig(FunctionalState NewState) -{ - if (NewState == ENABLE) FLASHR->CR0 |= FLASH_INTM_Mask; - else FLASHR->CR0 &= ~FLASH_INTM_Mask; -} - -/******************************************************************************* -* Function Name : FLASH_ITStatus -* Description : Checks if the write-end interrupt is enabled or not -* Input 1 : None -* Return : Enable, Disable -*******************************************************************************/ -inline FunctionalState FLASH_ITStatus(void) -{ - return (FLASHR->CR0 & FLASH_INTM_Mask)==0 ? DISABLE : ENABLE; -} - -/******************************************************************************* -* Function Name : FLASH_ITClear -* Description : Clears an interrupt pending flag -* Input 1 : None -* Return : None -*******************************************************************************/ -inline void FLASH_ITClear(void) -{ - FLASHR->CR0 &= ~FLASH_INTM_Mask; -} - -/******************************************************************************* -* Function Name : FLASH_WritePrConfig -* Description : Enable Write protection or Disable temporarily Write -* protection of a flash sector. -* Input 1 : Flash Sector. -* Input 2 : Enable or disable Flash sector Write Protection. -* Return : None. -*******************************************************************************/ -void FLASH_WritePrConfig(u32 Xsectors, FunctionalState NewState); - -/******************************************************************************* -* Function Name : FLASH_PermanentDebugPrConfig -* Description : Configures the Debug Protection Bits -* Input 1 : NewState: ENABLE or DISABLE. -* Return : None. -*******************************************************************************/ -void FLASH_PermanentDebugPrConfig(FunctionalState NewState); - -/******************************************************************************* -* Function Name : FLASH_ProtectionLevel -* Description : If the flash is Debug protected, up to 16 unprotection/ -* protection cycles are possible using the NVAPR1 register. -* This routine returns the number of times of Debug unprotection. -* Input : None. -* Return : Number of times of Debug Protection/Unprotection(0..15) -* Example: if 5 is returned, this means that the flash was debug -* unprotected 5 times(using PDS bits)and debug protected 5 times -* (1 time:using DBGP bit & 4 times: using PEN bits). -*******************************************************************************/ -u16 FLASH_ProtectionLevel(void); - -/******************************************************************************* -* Function Name : FLASH_WaitForLastTask -* Description : Waits for the end of last task on a Flash Bank -* Input 1 : None -* Return : Nones -*******************************************************************************/ -void FLASH_WaitForLastTask(void); - -#endif /* __FLASH_H */ - -/*******************(C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/gpio.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/gpio.h deleted file mode 100644 index 4f6c1342..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/gpio.h +++ /dev/null @@ -1,129 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : gpio.h -* Author : MCD Application Team -* Date First Issued : 08/06/2003 -* Description : This file contains all the functions prototypes for the -* GPIO software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __GPIO_H -#define __GPIO_H - -#include "71x_map.h" - -typedef enum -{ - GPIO_HI_AIN_TRI, /*HIGH IMPEDANCE ANALOG INPUT TRISTATE*/ - GPIO_IN_TRI_TTL, /* INPUT TRISTATE TTL*/ - GPIO_IN_TRI_CMOS,/*INPUT TRSISTATE CMOS*/ - GPIO_IPUPD_WP, /*INPUT PULL UP/PULL DOWN WEAK PUSH PULL*/ - GPIO_OUT_OD, /* OUTPUT OPEN DRAIN*/ - GPIO_OUT_PP, /* OUTPUT PUSH PULL*/ - GPIO_AF_OD, /*ALTERNATE FUNCTION OPEN DRAIN */ - GPIO_AF_PP /* ALTERNATE FUNCTION PUSH PULL*/ -} GpioPinMode_TypeDef; - -#define GPIO_LSB 0x00 -#define GPIO_MSB 0x08 - -/******************************************************************************* -* Function Name : GPIO_Config -* Description : Configure the GPIO port pins. -* Input 1 : GPIOx (x can be 0,1 or 2) the desired port. -* Input 2 : Port_Pins : pins placements. -* Input 3 : Pins Mode(GPIO_HI_AIN_TRI,GPIO_IN_TRI_TTL,GPIO_IN_TRI_CMOS, -* GPIO_IPUPD_WP,GPIO_OUT_OD,GPIO_OUT_PP,GPIO_AF_OD,GPIO_AF_PP). -* Output : None -* Return : None -*******************************************************************************/ -void GPIO_Config (GPIO_TypeDef *GPIOx, u16 Port_Pins, GpioPinMode_TypeDef GPIO_Mode); - -/******************************************************************************* -* Function Name : GPIO_BitRead -* Description : Read the desired port pin value. -* Input 1 : Selected GPIO port(GPIO1, GPIO1, GPIO2). -* Input 2 : Pin number. -* Output : None -* Return : The selected port pin value. -*******************************************************************************/ -inline u8 GPIO_BitRead(GPIO_TypeDef *GPIOx, u8 Port_Pin) -{ - return (GPIOx->PD >> Port_Pin) & 0x0001; -} - -/******************************************************************************* -* Function Name : GPIO_ByteRead -* Description : Read the desired port Byte value. -* Input 1 : Selected GPIO port(GPIO1, GPIO1, GPIO2). -* Input 2 : Port_Byte(GPIO_MSB or GPIO_LSB). -* Output : None -* Return : The GPIO_MSB or GPIO_LSB of the selected PD register. -*******************************************************************************/ -inline u8 GPIO_ByteRead(GPIO_TypeDef *GPIOx, u8 Port_Byte) -{ - return (u8)(GPIOx->PD >> Port_Byte); -} - -/******************************************************************************* -* Function Name : GPIO_WordRead -* Description : Read the desired port word value. -* Input 1 : Selected GPIO port(GPIO1, GPIO1, GPIO2). -* Output : None -* Return : The selected PD register value. -*******************************************************************************/ -inline u16 GPIO_WordRead(GPIO_TypeDef *GPIOx) -{ - return GPIOx->PD; -} - -/******************************************************************************* -* Function Name : GPIO_BitWrite -* Description : Set or reset the selected port pin. -* Input 1 : Selected GPIO port(GPIO1, GPIO1, GPIO2). -* Input 2 : Pin number. -* Input 3 : bit value. -* Output : None -* Return : None. -*******************************************************************************/ -void GPIO_BitWrite(GPIO_TypeDef *GPIOx, u8 Port_Pin, u8 Port_Val); - -/******************************************************************************* -* Function Name : GPIO_ByteWrite -* Description : Write byte value to the selected PD register. -* Input 1 : Selected GPIO port(GPIO1, GPIO1, GPIO2). -* Input 2 : Port_Byte (GPIO_MSB or GPIO_LSB). -* Input 3 : Byte value. -* Output : None -* Return : None. -*******************************************************************************/ -void GPIO_ByteWrite(GPIO_TypeDef *GPIOx, u8 Port_Byte, u8 Port_Val); - -/******************************************************************************* -* Function Name : GPIO_WordWrite -* Description : Write word value to the selected PD register. -* Input 1 : Selected GPIO port(GPIO1, GPIO1, GPIO2). -* Input 2 : Value. -* Output : None -* Return : None. -*******************************************************************************/ -inline void GPIO_WordWrite(GPIO_TypeDef *GPIOx, u16 Port_Val) -{ - GPIOx->PD = Port_Val; -} - -#endif /* __GPIO_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/i2c.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/i2c.h deleted file mode 100644 index 0cab7a36..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/i2c.h +++ /dev/null @@ -1,323 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : i2c.h -* Author : MCD Application Team -* Date First Issued : 05/09/2003 -* Description : This file provides prototypes of I2C functions -* and variable used in code sources -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __i2c_H -#define __i2c_H - -#include "71x_map.h" - -typedef enum -{ - I2C_CR = 0x00, - I2C_SR1 = 0x04, - I2C_SR2 = 0x08, - I2C_CCR = 0x0C, - I2C_OAR1 = 0x10, - I2C_OAR2 = 0x14, - I2C_DR = 0x18, - I2C_ECCR = 0x1C -} I2C_Registers; - -typedef enum -{ - I2C_Mode10, - I2C_Mode7 -} I2C_Addressing; - -typedef enum -{ - I2C_RX, - I2C_TX -} I2C_Direction; - -typedef enum -{ - I2C_SB = 0x00001, - I2C_M_SL = 0x00002, - I2C_ADSL = 0x00004, - I2C_BTF = 0x00008, - I2C_BUSY = 0x00010, - I2C_TRA = 0x00020, - I2C_ADD10 = 0x00040, - I2C_EVF = 0x00080, - I2C_GCAL = 0x00100, - I2C_BERR = 0x00200, - I2C_ARLO = 0x00400, - I2C_STOPF = 0x00800, - I2C_AF = 0x01000, - I2C_ENDAD = 0x02000, - I2C_STOP = 0x08000, - I2C_ACK = 0x10000, - I2C_START = 0x20000 -} I2C_Flags; - -typedef enum -{ - I2C_TX_NO, - I2C_TX_SB, - I2C_TX_AF, - I2C_TX_ARLO, - I2C_TX_BERR, - I2C_TX_ADD_OK, - I2C_TX_DATA_OK, - I2C_TX_ONGOING -} I2C_Tx_Status; - -typedef enum -{ - I2C_RX_NO, - I2C_RX_SB, - I2C_RX_AF, - I2C_RX_ARLO, - I2C_RX_BERR, - I2C_RX_ADD_OK, - I2C_RX_DATA_OK, - I2C_RX_ONGOING -} I2C_Rx_Status; - -#define I2C_PESET_Mask 0x20 -#define I2C_PERESET 0xDF -#define I2C_ENGC_Mask 0x10 -#define I2C_START_Mask 0x08 -#define I2C_STOP_Mask 0x02 -#define I2C_ACK_Mask 0x04 -#define I2C_ITE_Mask 0x01 - -/******************************************************************************* -* Function Name : I2C_Init -* Description : Initializes I2C peripheral control and registers to their -* default reset values. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -void I2C_Init (I2C_TypeDef *I2Cx); - -/******************************************************************************* -* Function Name : I2C_OnOffConfig -* Description : Enables or disables I2C peripheral. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -void I2C_OnOffConfig (I2C_TypeDef *I2Cx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : I2C_GeneralCallConfig -* Description : Enables or disables I2C general call option. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -inline void I2C_GeneralCallConfig (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_ENGC_Mask; - else I2Cx->CR &= ~I2C_ENGC_Mask; -} - -/******************************************************************************* -* Function Name : I2C_STARTGenerate -* Description : Generates I2C communication START condition. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -inline void I2C_STARTGenerate (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_START_Mask; - else I2Cx->CR &= ~I2C_START_Mask; -} - -/******************************************************************************* -* Function Name : I2C_STOPGenerate -* Description : Generates I2C communication STOP condition. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -inline void I2C_STOPGenerate (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_STOP_Mask; - else I2Cx->CR &= ~I2C_STOP_Mask; -} - -/******************************************************************************* -* Function Name : I2C_AcknowledgeConfig -* Description : Enables or disables I2C acknowledge feature. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -inline void I2C_AcknowledgeConfig (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_ACK_Mask; - else I2Cx->CR &= ~I2C_ACK_Mask; -} - -/******************************************************************************* -* Function Name : I2C_ITConfig -* Description : Enables or disables I2C interrupt feature. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -inline void I2C_ITConfig (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_ITE_Mask; - else I2Cx->CR &= ~I2C_ITE_Mask; -} - -/******************************************************************************* -* Function Name : I2C_RegisterRead -* Description : Reads any I2C register and returns its value. -* Input : I2Cx ( I2C0 or I2C1 ) -* Reg :the register to be read (I2CCR,I2CSR1,I2CSR2,I2CCCR, -* I2COAR1,I2COAR2,I2CDR,I2CECCR) -* Return : the value of the register passed as parameter(u8) -*******************************************************************************/ -inline u8 I2C_RegisterRead (I2C_TypeDef *I2Cx, I2C_Registers reg) -{ - return (*(u8 *)(*((u32 *)&I2Cx) + reg)); -} - -/******************************************************************************* -* Function Name : I2C_FlagStatus -* Description : Checks whether any I2C Flag is set or not. -* Input : I2Cx ( I2C0 or I2C1 ) -* Access(DIRECT or INDIRECT) -* Flag : the flag to be read -* input 4: an (u8) variable needed in the case -* of the INDIRECT access. -* Return : The NewState of the Flag (SET or RESET). -*******************************************************************************/ -FlagStatus I2C_FlagStatus (I2C_TypeDef *I2Cx, RegisterAccess Access, I2C_Flags Flag,...); -/******************************************************************************* -* Function Name : I2C_FlagClear -* Description : Clears the I2C Flag passed as a parameter -* Input : I2Cx ( I2C0 or I2C1 ) -* Flag : the flag to be cleared. -* input3: an (u8) parameter needed if the flag -* to be cleared needs a write in one register. -* Return : None. -*******************************************************************************/ -void I2C_FlagClear (I2C_TypeDef *I2Cx, I2C_Flags Flag,...); -/******************************************************************************* -* Function Name : I2C_SpeedConfig -* Description : Selects I2C clock speed and configures its corresponding mode. -* Input : I2Cx ( I2C0 or I2C1 ) -* Clock: I2C expected clock in Hertz. -* Return : None. -*******************************************************************************/ -void I2C_SpeedConfig (I2C_TypeDef *I2Cx, u32 Clock); -/******************************************************************************* -* Function Name : I2C_AddressConfig -* Description : Defines the I2C bus address of the interface. -* Input : I2Cx ( I2C0 or I2C1 ). -* Address: an u16 parameter indicating the address -* of the interface. -* Mode (I2C_Mode10,I2C_Mode7). -* Return : None. -*******************************************************************************/ -void I2C_AddressConfig (I2C_TypeDef *I2Cx, u16 Address, I2C_Addressing Mode); - -/******************************************************************************* -* Function Name : I2C_FCLKConfig -* Description : Configures frequency bits according to RCLK frequency. -* The I2C selected MUST be disabled. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -void I2C_FCLKConfig (I2C_TypeDef *I2Cx); -/******************************************************************************* -* Function Name : I2C_AddressSend -* Description : Transmits the address byte to select the slave device. -* Input : I2Cx ( I2C0 or I2C1 ) -* Address: an u16 parameter indicating the slave address -* Mode (I2C_Mode10,I2C_Mode7). -* Direction (I2C_RX,I2C_TX). -* Return : None. -********************************************************************************/ -void I2C_AddressSend (I2C_TypeDef *I2Cx, u16 Address, I2C_Addressing Mode, I2C_Direction Direction); -/******************************************************************************* -* Function Name : I2C_ByteSend -* Description : Send a single byte of data. -* Input : I2Cx ( I2C0 or I2C1 ) -* Data : the byte to be sent to the slave -* Return : None. -*******************************************************************************/ -void I2C_ByteSend (I2C_TypeDef *I2Cx, u8 Data); -/******************************************************************************* -* Function Name : I2C_TransmissionStatus -* Description : Report the NewState of the transmission -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : I2C_Tx_Status :transmission status (I2C_TX_NO, I2C_TX_SB, -* I2C_TX_AF, I2C_TX_ARLO, I2C_TX_BERR,I2C_TX_ADD_OK, -* I2C_TX_DATA_OK,I2C_TX_ONGOING) -*******************************************************************************/ -I2C_Tx_Status I2C_TransmissionStatus (I2C_TypeDef *I2Cx); -/******************************************************************************* -* Function Name : I2C_ByteReceive -* Description : Returns the received byte. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : The received byte. -*******************************************************************************/ -u8 I2C_ByteReceive (I2C_TypeDef *I2Cx); -/******************************************************************************* -* Function Name :I2C_ReceptionStatus -* Description : Report the reception NewState. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : I2C_Rx_Status:the NewState of the reception ( I2C_RX_NO, -* I2C_RX_SB,I2C_RX_AF,I2C_RX_ARLO,I2C_RX_BERR,I2C_RX_ADD_OK, -* I2C_RX_DATA_OK, I2C_RX_ONGOING) -*******************************************************************************/ -I2C_Rx_Status I2C_ReceptionStatus (I2C_TypeDef *I2Cx); -/******************************************************************************* -* Function Name : I2C_ErrorClear -* Description : Clears any error flags. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -inline void I2C_ErrorClear (I2C_TypeDef *I2Cx) -{ - /* Clear all error flags by reading the SR2 register */ - (void)I2Cx->SR2; -} - -/******************************************************************************* -* Function Name : I2C_GetStatus -* Description : Reads the I2C status registers. -* Input : None -* Return : I2C status registers. -*******************************************************************************/ -inline u32 I2C_GetStatus(I2C_TypeDef *I2Cx) -{ - u8 i2c_cr, i2c_sr1,i2c_sr2; - - i2c_cr = I2Cx->CR; - i2c_sr1 = I2Cx->SR1; - i2c_sr2 = I2Cx->SR2; - - return (((i2c_cr)<<14)|(i2c_sr1|(i2c_sr2<<8))&0x3FFF); -} - -#endif /* __i2c_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/pcu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/pcu.h deleted file mode 100644 index 65ad1746..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/pcu.h +++ /dev/null @@ -1,204 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : pcu.h -* Author : MCD Application Team -* Date First Issued : 30/05/2003 -* Description : This file contains all the functions prototypes for the -* PCU software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __PCU_H -#define __PCU_H - -#include "71x_map.h" - -typedef enum -{ - PCU_WREN = 0x8000, - PCU_VROK = 0x1000 -} PCU_Flags; - -typedef enum -{ - PCU_STABLE, - PCU_UNSTABLE -} PCU_VR_Status; - -typedef enum -{ - PCU_MVR = 0x0008, - PCU_LPR = 0x0010 -} PCU_VR; - -typedef enum -{ - WFI_CLOCK2_16, - WFI_EXTERNAL -} WFI_CLOCKS; - -typedef enum -{ - PCU_SLOW, - PCU_STOP, - PCU_STANDBY -} LPM_MODES; - - -/* VR_OK : Voltage Regulator OK */ -#define PCU_VROK_Mask 0x1000 - -/* Main Voltage Regulator */ -#define PCU_MVR_Mask 0x0008 - -/* Low Power Voltage Regulator */ -#define PCU_LPR_Mask 0x0010 - -/* PCU register Write Enable Bit */ -#define PCU_WREN_Mask 0x8000 - -/* PCU register Backup logic Busy ( programming ongoing) Bit */ -#define PCU_BUSY_Mask 0x4000 - -/* Low Voltage Detector */ -#define PCU_LVD_Mask 0x0100 - -/* Power Down Flag */ -#define PCU_PWRDWN_Mask 0x0040 - -/* WFI Mode Clock Selection Bit */ -#define PCU_WFI_CKSEL_Mask 0x00000002 - -/* Halt Mode Enable Bit */ -#define PCU_EN_HALT_Mask 0x00000800 - -/* Halt Mode Flag */ -#define PCU_HALT_Mask 0x0002 - -/* Stop Mode Enable Bit */ -#define PCU_STOP_EN_Mask 0x00000400 - -/* Low Power Regulator in Wait For interrupt Mode */ -#define PCU_LPRWFI_Mask 0x0020 - -/* Low Power Mode in Wait For interrupt Mode */ -#define PCU_LPOWFI_Mask 0x00000001 - -/* Software Reset Enable */ -#define PCU_SRESEN_Mask 0x00000001 - - -/******************************************************************************* -* Function Name : PCU_MVRStatus -* Description : This routine is used to check the Main Voltage Regulator -* : NewState. -* Input : None -* Return : STABLE, UNSTABLE -*******************************************************************************/ -inline PCU_VR_Status PCU_MVRStatus ( void ) -{ - return (PCU->PWRCR & PCU_VROK_Mask) == 0x00 ? PCU_UNSTABLE : PCU_STABLE; -} - -/******************************************************************************* -* Function Name : PCU_FlagStatus -* Description : This routine is used to return the PCU register flag -* Input 1 : The flag to get -* Return : RESET, SET -*******************************************************************************/ -inline FlagStatus PCU_FlagStatus ( PCU_Flags Xflag ) -{ - return ( PCU->PWRCR & Xflag ) == 0x00 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : PCU_VRConfig -* Description : This routine is used to configure PCU voltage regultors -* Input 1 : MVR : Main voltage Regulator - LPR : Low Power Regulator -* Input 2 : ENABLE : Enable the Voltage Regulator - DISABLE: Disable ( ByPass ) the VR -* Return : None -*******************************************************************************/ -void PCU_VRConfig ( PCU_VR xVR, FunctionalState NewState ); - -/******************************************************************************* -* Function Name : PCU_VRStatus -* Description : This routine is used to get the PCU voltage regultors status -* Input : MVR : Main voltage Regulator - LPR : Low Power Regulator -* Return : ENABLE : Enable the Voltage Regulator - DISABLE: Disable ( ByPass ) the VR -*******************************************************************************/ -inline FunctionalState PCU_VRStatus ( PCU_VR xVR ) -{ - return ( PCU->PWRCR & xVR ) == 0 ? ENABLE : DISABLE; -} - -/******************************************************************************* -* Function Name : PCU_LVDDisable -* Description : This routine is used to disable the Low Voltage Detector. -* Input : None -* Return : None -*******************************************************************************/ -inline void PCU_LVDDisable ( void ) -{ - /* Wait until the previous write operation will be completed */ - while (( PCU->PWRCR & PCU_BUSY_Mask ) == 1); - - /* Unlock Power Control Register */ - PCU->PWRCR |= PCU_WREN_Mask; - - /* Set the LVD DIS Flag */ - PCU->PWRCR |= PCU_LVD_Mask; -} - -/******************************************************************************* -* Function Name : PCU_LVDStatus -* Description : This routine is used to get the LVD NewState. -* Input : None -* Return : ENABLE, DISABLE -*******************************************************************************/ -inline FunctionalState PCU_LVDStatus ( void ) -{ - return ( PCU->PWRCR & PCU_LVD_Mask ) == 0 ? ENABLE : DISABLE; -} - -/******************************************************************************* -* Function Name : PCU_WFIEnter -* Description : This routine is used to force the Device to enter in WFI mode -* Input 1 : CLOCK2_16 : Clock2_16 as system clock for WFI mode -* EXTERNAL : external clock as system clock for WFI mode -* Input 2 : ENABLE : Enable Low Power Regulator during Wait For Interrupt Mode -* DISABLE: Disable Low Power Regulator during Wait For Interrupt Mode -* Input 3 : ENABLE : Enable Low Power Mode during Wait For Interrupt Mode -* DISABLE: Disable Low Power Mode during Wait For Interrupt Mode -* Return : None -*******************************************************************************/ -void PCU_WFIEnter ( WFI_CLOCKS Xclock, FunctionalState Xlpr, FunctionalState Xlpm ); - -/******************************************************************************* -* Function Name : PCU_LPMEnter -* Description : This routine is used to force the Device to enter low -* power mode -* Input : SLOW : Slow Mode - STOP : Stop Mode - HALT : Halt Mode -* Return : None -*******************************************************************************/ -void PCU_LPMEnter ( LPM_MODES Xmode); - -#endif /* __PCU_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/rccu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/rccu.h deleted file mode 100644 index 3cedadb8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/rccu.h +++ /dev/null @@ -1,323 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : rccu.h -* Author : MCD Application Team -* Date First Issued : 28/07/2003 -* Description : This file contains all the functions prototypes for the -* RCCU software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __RCCU_H -#define __RCCU_H - -#include "71x_map.h" - -typedef enum { - RCCU_DEFAULT=0x00, - RCCU_RCLK_2 =0x01, - RCCU_RCLK_4 =0x02, - RCCU_RCLK_8 =0x03 - } RCCU_Clock_Div; - -typedef enum { - RCCU_PLL1_Output, - RCCU_CLOCK2_16, - RCCU_CLOCK2, - RCCU_RTC_CLOCK - } RCCU_RCLK_Clocks; - - - typedef enum { - RCCU_PLL1_Mul_12=0x01, - RCCU_PLL1_Mul_16=0x03, - RCCU_PLL1_Mul_20=0x00, - RCCU_PLL1_Mul_24=0x02 - } RCCU_PLL1_Mul; - -typedef enum { - RCCU_PLL2_Mul_12=0x01, - RCCU_PLL2_Mul_16=0x03, - RCCU_PLL2_Mul_20=0x00, - RCCU_PLL2_Mul_28=0x02 - } RCCU_PLL2_Mul; - -typedef enum { - RCCU_Div_1=0x00, - RCCU_Div_2=0x01, - RCCU_Div_3=0x02, - RCCU_Div_4=0x03, - RCCU_Div_5=0x04, - RCCU_Div_6=0x05, - RCCU_Div_7=0x06 - } RCCU_PLL_Div; - -typedef enum { - RCCU_PLL2_Output = 0x01, - RCCU_USBCK = 0x00 - } RCCU_USB_Clocks; - -typedef enum { - RCCU_CLK2, - RCCU_RCLK, - RCCU_MCLK, - RCCU_PCLK, - RCCU_FCLK - } RCCU_Clocks; - -typedef enum { - RCCU_PLL1_LOCK_IT = 0x0080, - RCCU_CKAF_IT = 0x0100, - RCCU_CK2_16_IT = 0x0200, - RCCU_STOP_IT = 0x0400 - } RCCU_Interrupts; - -typedef enum { - RCCU_PLL1_LOCK = 0x0002, - RCCU_CKAF_ST = 0x0004, - RCCU_PLL1_LOCK_I = 0x0800, - RCCU_CKAF_I = 0x1000, - RCCU_CK2_16_I = 0x2000, - RCCU_STOP_I = 0x4000 - } RCCU_Flags; - -typedef enum { - RCCU_ExternalReset = 0x00000000, - RCCU_SoftwareReset = 0x00000020, - RCCU_WDGReset = 0x00000040, - RCCU_RTCAlarmReset = 0x00000080, - RCCU_LVDReset = 0x00000200, - RCCU_WKPReset = 0x00000400 - }RCCU_ResetSources; - - -#define RCCU_Div2_Mask 0x00008000 -#define RCCU_Div2_Index 0x0F -#define RCCU_FACT_Mask 0x0003 - -#define RCCU_FACT1_Mask 0x0003 - -#define RCCU_FACT2_Mask 0x0300 -#define RCCU_FACT2_Index 0x08 - -#define RCCU_MX_Mask 0x00000030 -#define RCCU_MX_Index 0x04 - -#define RCCU_DX_Mask 0x00000007 - -#define RCCU_FREEN_Mask 0x00000080 - -#define RCCU_CSU_CKSEL_Mask 0x00000001 - -#define RCCU_CK2_16_Mask 0x00000008 - -#define RCCU_CKAF_SEL_Mask 0x00000004 - -#define RCCU_LOCK_Mask 0x00000002 - -#define RCCU_USBEN_Mask 0x0100 -#define RCCU_USBEN_Index 0x08 -#define RCCU_ResetSources_Mask 0x000006E0 - -// RTC Oscillator Frequency value = 32 768 Hz -//#define RCCU_RTC_Osc 32768 - -extern const u32 RCCU_Main_Osc; -extern const u32 RCCU_RTC_Osc; - -/******************************************************************************* -* Function Name : RCCU_Div2Config -* Description : Enables/Disables the clock division by two -* Input : NewState : ENABLE or DISABLE -* Return : None -*******************************************************************************/ -inline void RCCU_Div2Config ( FunctionalState NewState ) -{ - if (NewState == ENABLE) RCCU->CFR |= RCCU_Div2_Mask; - else RCCU->CFR &= ~RCCU_Div2_Mask; -} - -/******************************************************************************* -* Function Name : RCCU_Div2Status -* Description : Gets the Div2 Flag status -* Input : None -* Input : FlagStatus -* Return : None -*******************************************************************************/ -inline FlagStatus RCCU_Div2Status ( void ) -{ - return (RCCU->CFR & RCCU_Div2_Mask) == 0 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : RCCU_MCLKConfig -* Description : Selects the division factor for RCLK to obtain the -* MCLK clock for the CPU -* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2, RCCU_RCLK_4, RCCU_RCLK_8 -* Return : None -*******************************************************************************/ -inline void RCCU_MCLKConfig ( RCCU_Clock_Div New_Clock ) -{ - PCU->MDIVR = ( PCU->MDIVR & ~RCCU_FACT_Mask ) | New_Clock; -} - -/******************************************************************************* -* Function Name : RCCU_FCLKConfig -* Description : Selects the division factor for RCLK to obtain the -* FCLK clock for the APB1 fast peripherals (PCLK1). -* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2, -* RCCU_RCLK_4, RCCU_RCLK_8 -* Return : None -*******************************************************************************/ -inline void RCCU_FCLKConfig ( RCCU_Clock_Div New_Clock ) -{ - PCU->PDIVR = ( PCU->PDIVR & ~RCCU_FACT1_Mask ) | New_Clock; -} - -/******************************************************************************* -* Function Name : RCCU_PCLKConfig -* Description : Selects the division factor for RCLK to obtain the -* PCLK clock for the APB2 peripherals (PCLK2). -* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2, -* RCCU_RCLK_4, RCCU_RCLK_8 -* Return : None -*******************************************************************************/ -inline void RCCU_PCLKConfig ( RCCU_Clock_Div New_Clock ) -{ - PCU->PDIVR =(PCU->PDIVR & ~RCCU_FACT2_Mask)|(New_Clock << RCCU_FACT2_Index); -} - -/******************************************************************************* -* Function Name : RCCU_PLL1Config -* Description : Configures the PLL1 div & mul factors. -* Input : New_Mul : RCCU_Mul_12, RCCU_Mul_16, RCCU_Mul_20, RCCU_Mul_28 -* : New_Div : RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, -* RCCU_Div_4, RCCU_Div_5, RCCU_Div_6, RCCU_Div_7 -* Return : None -*******************************************************************************/ -void RCCU_PLL1Config ( RCCU_PLL1_Mul New_Mul, RCCU_PLL_Div New_Div ); - -/******************************************************************************* -* Function Name : RCCU_PLL2Config -* Description : Configures the PLL2 div & mul factors. -* Input : New_Mul : RCCU_Mul_12, RCCU_Mul_16, RCCU_Mul_20, RCCU_Mul_28 -* : New_Div : RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, RCCU_Div_4, -* RCCU_Div_5, RCCU_Div_6, RCCU_Div_7 -* Return : None -*******************************************************************************/ -void RCCU_PLL2Config ( RCCU_PLL2_Mul New_Mul, RCCU_PLL_Div New_Div ); - -/******************************************************************************* -* Function Name : RCCU_RCLKSourceConfig -* Description : Selects the RCLK source clock -* Input : New_Clock : RCCU_PLL1_OutPut, RCCU_CLOCK2_16, RCCU_CLOCK2 -* Return : None -*******************************************************************************/ -void RCCU_RCLKSourceConfig ( RCCU_RCLK_Clocks New_Clock ); - -/******************************************************************************* -* Function Name : RCCU_RCLKClockSource -* Description : Returns the current RCLK source clock -* Input : None -* Return : RCCU_PLL1_Output, RCCU_CLOCK2_16, RCCU_CLOCK2 -*******************************************************************************/ -RCCU_RCLK_Clocks RCCU_RCLKClockSource ( void ); - -/******************************************************************************* -* Function Name : RCCU_USBCLKConfig -* Description : Selects the USB source clock -* Input : New_Clock : RCCU_PLL2_Output, RCCU_USBCK -* Return : None -*******************************************************************************/ -inline void RCCU_USBCLKConfig ( RCCU_USB_Clocks New_Clock ) -{ - PCU->PLL2CR = (PCU->PLL2CR & ~RCCU_USBEN_Mask)|(New_Clock << RCCU_USBEN_Index); -} - -/******************************************************************************* -* Function Name : RCCU_USBClockSource -* Description : Gets the USB source clock -* Input : None -* Return : RCCU_USB_Clocks -*******************************************************************************/ -RCCU_USB_Clocks RCCU_USBClockSource ( void ); - -/******************************************************************************* -* Function Name : RCCU_FrequencyValue -* Description : Calculates & Returns any internal RCCU clock freuqency -* passed in parametres -* Input : RCCU_Clocks : RCCU_CLK2, RCCU_RCLK, RCCU_MCLK, -* RCCU_PCLK, RCCU_FCLK -* Return : u32 -*******************************************************************************/ -u32 RCCU_FrequencyValue ( RCCU_Clocks Internal_Clk ); - -/******************************************************************************* -* Function Name : RCCU_ITConfig -* Description : Configures the RCCU interrupts -* Input : RCCU interrupts : RCCU_CK2_16_IT, RCCU_CKAF_IT, -* RCCU_PLL1_LOCK_IT -* Return : None -*******************************************************************************/ -inline void RCCU_ITConfig ( RCCU_Interrupts RCCU_IT, FunctionalState NewState) -{ - if (NewState == ENABLE) RCCU->CCR |= RCCU_IT; else RCCU->CCR &= ~RCCU_IT; -} - -/******************************************************************************* -* Function Name : RCCU_FlagStatus -* Description : Checks the RCCU clock flag register status -* Input : RCCU Flags : RCCU_CK2_16, RCCU_CKAF, RCCU_PLL1_LOCK -* Return : FlagStatus : SET or RESET -*******************************************************************************/ -inline FlagStatus RCCU_FlagStatus ( RCCU_Flags RCCU_flag ) -{ - return (RCCU->CFR & RCCU_flag) == 0 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : RCCU_FlagClear -* Description : Clears a specified flag in the RCCU registers -* Input : RCCU Flags : RCCU_CK2_16, RCCU_CKAF, RCCU_PLL1_LOCK -* Return : None -*******************************************************************************/ -inline void RCCU_FlagClear ( RCCU_Interrupts RCCU_IT ) -{ - RCCU->CFR |= RCCU_IT; -} - -/******************************************************************************* -* Function Name : RCCU_ResetSources -* Description : Return the source of the system reset -* Input : None -* Return : The reset source -*******************************************************************************/ -inline RCCU_ResetSources RCCU_ResetSource () -{ - - switch(RCCU->CFR & RCCU_ResetSources_Mask) - { - case 0x00000020: return RCCU_SoftwareReset; - case 0x00000040: return RCCU_WDGReset; - case 0x00000080: return RCCU_RTCAlarmReset; - case 0x00000200: return RCCU_LVDReset; - case 0x00000400: return RCCU_WKPReset; - default : return RCCU_ExternalReset; - } -} - -#endif /* __RCCU_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/rtc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/rtc.h deleted file mode 100644 index 90e3b237..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/rtc.h +++ /dev/null @@ -1,185 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : rtc.h -* Author : MCD Application Team -* Date First Issued : 20/05/2003 -* Description : This file contains all the functions prototypes for the -* RTC software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __RTC_H -#define __RTC_H - -#include "71x_map.h" - -typedef enum -{ - RTC_GIR = 0x0008, - RTC_OWIR = 0x0004, - RTC_AIR = 0x0002, - RTC_SIR = 0x0001 -} RTC_FLAGS; - -typedef enum -{ - RTC_GIT = 0x0008, - RTC_OWIT = 0x0004, - RTC_AIT = 0x0002, - RTC_SIT = 0x0001 -} RTC_IT; - - -/******************************************************************************* -* Function Name : RTC_CounterClear -* Description : This routine is used to clear the RTC counter -* Input : None -* Return : None -*******************************************************************************/ -void RTC_CounterClear (void); - -/******************************************************************************* -* Function Name : RTC_CounterValue -* Description : This routine is used to get the RTC counter value -* Input : None -* Return : The current counter value. -*******************************************************************************/ -inline u32 RTC_CounterValue (void) -{ - return ( (u32)RTC->CNTH << 16 ) | RTC->CNTL; -} - -/******************************************************************************* -* Function Name : RTC_CounterConfig -* Description : This routine is used to update the RTC counter value -* Input : The new counter value. -* Return : None -*******************************************************************************/ -void RTC_CounterConfig (u32 CounterValue); - -/******************************************************************************* -* Function Name : RTC_PrescalerValue -* Description : This routine is used to get the RTC prescaler Value -* Input : None -* Return : an u32 value that holds the prescaler Value. -*******************************************************************************/ -inline u32 RTC_PrescalerValue (void) -{ - return ( (u32)(RTC->PRLH & 0x000F) << 16 ) | RTC->PRLL; -} - -/******************************************************************************* -* Function Name : RTC_PrescalerConfig -* Description : This routine is used to set the Prescaler Value -* Input : The New prescaler Value -* Return : None -*******************************************************************************/ -void RTC_PrescalerConfig (u32 Xprescaler); - -/******************************************************************************* -* Function Name : RTC_AlarmValue -* Description : This routine is used to get the RTC alarm Value -* Input : None -* Return : an u32 value that holds the Real Time clock alarm time . -*******************************************************************************/ -inline u32 RTC_AlarmValue (void) -{ - return ( (u32)RTC->ALRH << 16 ) | RTC->ALRL; -} - -/******************************************************************************* -* Function Name : RTC_AlarmConfig -* Description : This routine is used to set the RTC alarm Value -* Input : an u32 value that holds the Real Time clock alarm time . -* Return : None -*******************************************************************************/ -void RTC_AlarmConfig (u32 Xalarm); - -/******************************************************************************* -* Function Name : RTC_FlagStatus -* Description : This routine is used to get the RTC flag status -* Input : an RTC flag RTC_GIR, RTC_OWIR, RTC_AIR or RTC_SIR -* Return : SET or RESET -*******************************************************************************/ -inline FlagStatus RTC_FlagStatus (RTC_FLAGS Xflag) -{ - return ( RTC->CRL & Xflag ) == 0 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : RTC_FlagClear -* Description : This routine is used to clear the RTC flags -* Input : an RTC flag RTC_GIR, RTC_OWIR, RTC_AIR or RTC_SIR -* Return : None -*******************************************************************************/ -void RTC_FlagClear (RTC_FLAGS Xflag); - -/******************************************************************************* -* Function Name : RTC_ITConfig -* Description : This routine is used to configure the RTC interrupts -* Input 1 : a RTC interrupt RTC_GIT, RTC_OWIT, RTC_AIT or RTC_SIT -* Input 2 : ENABLE or DISABLE -* Return : None -*******************************************************************************/ -inline void RTC_ITConfig (RTC_IT Xrtcit, FunctionalState NewState) -{ - if (NewState == ENABLE) RTC->CRH |= Xrtcit; else RTC->CRH &= ~Xrtcit; -} - -/******************************************************************************* -* Function Name : RTC_ITStatus -* Description : This routine is used to get the RTC interrupts status -* Input : an RTC interrupt RTC_GIT, RTC_OWIT, RTC_AIT or RTC_SIT -* Return : ENABLE or DISABLE -*******************************************************************************/ -inline FunctionalState RTC_ITStatus (RTC_IT Xrtcit) -{ - return ( RTC->CRH & Xrtcit ) == 0 ? DISABLE : ENABLE; -} - -/******************************************************************************* -* Function Name : RTC_ITClear -* Description : This routine is used to clear the RTC interrupts -* Input : an RTC interrupt RTC_GIT, RTC_OWIT, RTC_AIT or RTC_SIT -* Return : None -*******************************************************************************/ -void RTC_ITClear (RTC_IT Xrtcit); - -/******************************************************************************* -* Function Name : RTC_EnterCfgMode -* Description : This routine is used to enter in the Configuration Mode -* Input : None -* Return : None -*******************************************************************************/ -void RTC_EnterCfgMode(void); - -/******************************************************************************* -* Function Name : RTC_ExitCfgMode -* Description : This routine is used to exit from the Configuration Mode -* Input : None -* Return : None -*******************************************************************************/ -void RTC_ExitCfgMode(void); - -/******************************************************************************* -* Function Name : RTC_WaitForLastTask -* Description : This routine waits for the last task completetion -* Input : None -* Return : None -*******************************************************************************/ -void RTC_WaitForLastTask(void); - -#endif /* __RTC_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/tim.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/tim.h deleted file mode 100644 index f5ad8832..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/tim.h +++ /dev/null @@ -1,348 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : tim.h -* Author : MCD Application Team -* Date First Issued : 08/09/2003 -* Description : This file contains all the functions prototypes for the -* TIM software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __TIM_H -#define __TIM_H - -#include "71x_map.h" - -typedef enum { TIM_EXTERNAL, - TIM_INTERNAL - } TIM_Clocks; - -typedef enum { TIM_RISING, - TIM_FALLING - } TIM_Clock_Edges; - -typedef enum { TIM_CHANNEL_A, - TIM_CHANNEL_B - } TIM_Channels; - -typedef enum { TIM_WITH_IT, - TIM_WITHOUT_IT - } TIM_IT_Mode; - -typedef enum { TIM_TIMING, - TIM_WAVE - } TIM_OC_Modes; - -typedef enum { TIM_HIGH, - TIM_LOW - } TIM_Logic_Levels; - -typedef enum { TIM_START, - TIM_STOP, - TIM_CLEAR - } TIM_CounterOperations; - -typedef enum { TIM_ICFA = 0x8000, - TIM_OCFA = 0x4000, - TIM_TOF = 0x2000, - TIM_ICFB = 0x1000, - TIM_OCFB = 0x0800 - } TIM_Flags; - -typedef struct { u16 Pulse; - u16 Period; - } PWMI_parameters; - -#define TIM_ECKEN_Mask 0x0001 -#define TIM_EXEDG_Mask 0x0002 - -#define TIM_IEDGA_Mask 0x0004 -#define TIM_IEDGB_Mask 0x0008 - -#define TIM_PWM_Mask 0x0010 - -#define TIM_OPM_Mask 0x0020 - -#define TIM_OCAE_Mask 0x0040 -#define TIM_OCBE_Mask 0x0080 - -#define TIM_OLVLA_Mask 0x0100 -#define TIM_OLVLB_Mask 0x0200 - -#define TIM_FOLVA_Mask 0x0400 -#define TIM_FOLVB_Mask 0x0800 - -#define TIM_PWMI_Mask 0x4000 - -#define TIM_EN_Mask 0x8000 - -#define TIM_OCBIE_mask 0x0800 -#define TIM_ICBIE_Mask 0x1000 -#define TIM_TOE_Mask 0x2000 -#define TIM_OCAIE_mask 0x4000 - -#define TIM_ICAIE_Mask 0x8000 - -#define TIM_ICA_IT 0x8000 /* Input Capture Channel A */ -#define TIM_OCA_IT 0x4000 /* Output Compare Channel A */ -#define TIM_TO_IT 0x2000 /* Timer OverFlow */ -#define TIM_ICB_IT 0x1000 /* Input Capture Channel B */ -#define TIM_OCB_IT 0x0800 /* Input Capture Channel A */ - - -/******************************************************************************* -* Function Name : TIM_Init -* Description : This routine is used to Initialize the TIM peripheral -* Input : TIM Timer to Initialize -* Return : None -*******************************************************************************/ -void TIM_Init( TIM_TypeDef *TIMx ); - -/******************************************************************************* -* Function Name : TIM_ClockSourceConfig -* Description : This routine is used to configure the TIM clock source -* Input : (1) TIM Timer -* : (2) TIM_Clocks : Specifies the TIM source clock -* - TIM_INTERNAL : The TIM is clocked by the APB2 frequency -* divided by the prescaler value. -* - TIM_EXTERNAL : The TIM is clocked by an external Clock -* Return : None -*******************************************************************************/ -inline void TIM_ClockSourceConfig ( TIM_TypeDef *TIMx, TIM_Clocks Xclock ) -{ - if (Xclock==TIM_EXTERNAL) TIMx->CR1|=TIM_ECKEN_Mask; else TIMx->CR1&=~TIM_ECKEN_Mask; -} - -/******************************************************************************* -* Function Name : TIM_ClockSourceValue -* Description : This routine is used to get the TIM clock source -* Input : TIM Timer -* Return : TIM_Clocks : Specifies the TIM source clock -* - TIM_INTERNAL : The TIM is clocked by the APB2 frequency -* divided by the prescaler value. -* - TIM_EXTERNAL : The TIM is clocked by an external Clock -*******************************************************************************/ -inline TIM_Clocks TIM_ClockSourceValue ( TIM_TypeDef *TIMx ) -{ - return ( TIMx->CR1 & TIM_ECKEN_Mask) == 0 ? TIM_INTERNAL : TIM_EXTERNAL; -} - -/******************************************************************************* -* Function Name : TIM_PrescalerConfig -* Description : This routine is used to configure the TIM prescaler value -* ( using an internal clock ) -* Input : (1) TIM Timer -* : (2) Prescaler ( u8 ) -* Return : None -*******************************************************************************/ -inline void TIM_PrescalerConfig ( TIM_TypeDef *TIMx, u8 Xprescaler ) -{ - TIMx->CR2 = ( TIMx->CR2 & 0xFF00 ) | Xprescaler; -} - -/******************************************************************************* -* Function Name : TIM_PrescalerValue -* Description : This routine is used to get the TIM prescaler value -* ( when using using an internal clock ) -* Input : TIM Timer -* Return : Prescaler ( u8 ) -*******************************************************************************/ -inline u8 TIM_PrescalerValue ( TIM_TypeDef *TIMx ) -{ - return TIMx->CR2 & 0x00FF; -} - -/******************************************************************************* -* Function Name : TIM_ClockLevelConfig -* Description : This routine is used to configure the TIM clock level -* ( using an external clock ) -* Input : TIM Timer -* : TIM_Clock_Edges : Specifies the active adge of the external clock -* - TIM_RISING : The rising edge -* - TIM_FALLING : The falling edge -* Return : None -*******************************************************************************/ -inline void TIM_ClockLevelConfig ( TIM_TypeDef *TIMx, TIM_Clock_Edges Xedge ) -{ - if (Xedge == TIM_RISING) TIMx->CR1 |= TIM_EXEDG_Mask; else TIMx->CR1 &= ~TIM_EXEDG_Mask; -} - -/******************************************************************************* -* Function Name : TIM_ClockLevelValue -* Description : This routine is used to get the TIM clock level -* Input : TIM Timer -* Output : TIM_Clock_Edges : Specifies the active adge of the external clock -* - TIM_RISING : The rising edge -* - TIM_FALLING : The falling edge -*******************************************************************************/ -inline TIM_Clock_Edges TIM_ClockLevelValue ( TIM_TypeDef *TIMx ) -{ - return ( TIMx->CR1 & TIM_EXEDG_Mask ) == 0 ? TIM_FALLING : TIM_RISING; -} - -/******************************************************************************* -* Function Name : TIM_ICAPModeConfig -* Description : This routine is used to configure the input capture feature -* Input : (1) TIM Timer -* : (2) Input Capture Channel ( Channel_A or Channel_B ) -* : (3) Active Edge : Rising edge or Falling edge. -* Output : None -*******************************************************************************/ -void TIM_ICAPModeConfig ( TIM_TypeDef *TIMx, - TIM_Channels Xchannel, - TIM_Clock_Edges Xedge ); - -/******************************************************************************* -* Function Name : TIM_ICAPValue -* Description : This routine is used to get the Input Capture value -* Input : (1) TIM Timer -* : (2) Input Capture Channel ( Channel_A or Channel_B ) -* Output : None -*******************************************************************************/ -inline u16 TIM_ICAPValue ( TIM_TypeDef *TIMx, TIM_Channels Xchannel ) -{ - return Xchannel == TIM_CHANNEL_A ? TIMx->ICAR : TIMx->ICBR; -} - -/******************************************************************************* -* Function Name : TIM_OCMPModeConfig -* Description : This routine is used to configure the output compare feature -* Input : (1) TIM Timer -* : (2) OCMP Channel ( Channel_A or Channel_B ) -* : (3) Pulse Length -* : (4) OC_Mode : output wave, or only timing. -* : (5) Level : Rising edge or Falling edge after the == -* Output : None -*******************************************************************************/ -void TIM_OCMPModeConfig ( TIM_TypeDef *TIMx, - TIM_Channels Xchannel, - u16 XpulseLength, - TIM_OC_Modes Xmode, - TIM_Logic_Levels Xlevel ); - -/******************************************************************************* -* Function Name : TIM_OPModeConfig -* Description : This routine is used to configure the one pulse mode -* Input : (1) TIM Timer -* : (3) XpulseLength : Length of the pulse -* : (4) Level1 : Level during the pulse -* : (5) Level2 : Level after the pulse -* : (6) Activation Edge : High or Low on ICAP A -* Output : None -*******************************************************************************/ -void TIM_OPModeConfig ( TIM_TypeDef *TIMx, - u16 XpulseLength, - TIM_Logic_Levels XLevel1, - TIM_Logic_Levels XLevel2, - TIM_Clock_Edges Xedge ); - -/******************************************************************************* -* Function Name : TIM_PWMOModeConfig -* Description : This routine is used to configure the PWM in output mode -* Input : (1) TIM Timer -* : (2) DutyCycle : u16 -* : (3) Level 1 : During the Duty Cycle -* : (4) Level 2 : During the after the pulse -* : (5) Full period : u16 -* Output : None -*******************************************************************************/ -void TIM_PWMOModeConfig ( TIM_TypeDef *TIMx, - u16 XDutyCycle, - TIM_Logic_Levels XLevel1, - u16 XFullperiod, - TIM_Logic_Levels XLevel2 - ); - -/******************************************************************************* -* Function Name : TIM_PWMInputConfig -* Description : This routine is used to configure the PWM in input mode -* Input : (1) TIM Timer -* : (2) First Activation Edge -* Output : None -*******************************************************************************/ -void TIM_PWMIModeConfig ( TIM_TypeDef *TIMx, TIM_Clock_Edges Xedge ); - -/******************************************************************************* -* Function Name : TIM_PWMIValue -* Description : This routine is used to get the PWMI values -* Input : (1) TIM Timer -* Output : PWMI_parameters : - u16 Dyty cycle - - u16 Full period -*******************************************************************************/ -PWMI_parameters TIM_PWMIValue (TIM_TypeDef *TIMx ); - -/******************************************************************************* -* Function Name : TIM_CounterConfig -* Description : This routine is used to start/stop and clear the selected -* timer counter -* Input : (1) TIM Timer -* : (2) TIM_CounterOperations - TIM_START Enables or resumes the counter -* TIM_STOP Stops the TIM counter -* TIM_CLEAR Set the TIM counter value to FFFCh -* Output : None -*******************************************************************************/ -void TIM_CounterConfig ( TIM_TypeDef *TIMx, TIM_CounterOperations Xoperation ); - -/******************************************************************************* -* Function Name : TIM_ITConfig -* Description : This routine is used to configure the TIM IT -* Input : (1) TIM Timer -* : (2) TIM interrupt (input capture A or input capture B or timer overflow or out compA or outpu com B -* : (2) ENABLE / DISABLE -* Output : None -*******************************************************************************/ -inline void TIM_ITConfig ( TIM_TypeDef *TIMx, u16 New_IT, FunctionalState NewState ) -{ - if (NewState == ENABLE) TIMx->CR2 |= New_IT; else TIMx->CR2 &= ~New_IT; -} - -/******************************************************************************* -* Function Name : TIM_FlagStatus -* Description : This routine is used to check whether a Flag is Set. -* Input : (1) TIM Timer -* : (2) The TIM FLag -* Output : Flag NewState -*******************************************************************************/ -inline FlagStatus TIM_FlagStatus ( TIM_TypeDef *TIMx, TIM_Flags Xflag ) -{ - return (TIMx->SR & Xflag) == 0 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : TIM_FlagClear -* Description : This routine is used to clear Flags. -* Input : (1) TIM Timer -* : (2) The TIM FLag -* Output : None -*******************************************************************************/ -inline void TIM_FlagClear ( TIM_TypeDef *TIMx, TIM_Flags Xflag ) -{ - TIMx->SR &= ~Xflag; -} - -/******************************************************************************* -* Function Name : TIM_CounterValue -* Description : This routine returns the timer counter value. -* Input : TIM Timer -* Output : The counter value -*******************************************************************************/ -inline u16 TIM_CounterValue(TIM_TypeDef *TIMx) -{ - return TIMx->CNTR; -} -#endif /* __TIM_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/uart.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/uart.h deleted file mode 100644 index 21b60705..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/uart.h +++ /dev/null @@ -1,389 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : uart.h -* Author : MCD Application Team -* Date First Issued : 16/05/2003 -* Description : This file contains all the functions prototypes for the -* UART software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef _UART_H -#define _UART_H - -#include "71x_map.h" -#include "rccu.h" - -typedef enum -{ - UART_RxFIFO, - UART_TxFIFO -} UARTFIFO_TypeDef; - -typedef enum -{ - UART_EVEN_PARITY = 0x0000, - UART_ODD_PARITY = 0x0020, - UART_NO_PARITY = 0x0000 -} UARTParity_TypeDef; - -typedef enum -{ - UART_0_5_StopBits = 0x00, - UART_1_StopBits = 0x08, - UART_1_5_StopBits = 0x10, - UART_2_StopBits = 0x18 -} UARTStopBits_TypeDef; - -typedef enum -{ - UARTM_8D = 0x01, - UARTM_7D_P = 0x03, - UARTM_9D = 0x04, - UARTM_8D_W = 0x05, - UARTM_8D_P = 0x07 -} UARTMode_TypeDef; - - -/* UART flags definition */ -#define UART_TxFull 0x0200 -#define UART_RxHalfFull 0x0100 -#define UART_TimeOutIdle 0x0080 -#define UART_TimeOutNotEmpty 0x0040 -#define UART_OverrunError 0x0020 -#define UART_FrameError 0x0010 -#define UART_ParityError 0x0008 -#define UART_TxHalfEmpty 0x0004 -#define UART_TxEmpty 0x0002 -#define UART_RxBufFull 0x0001 - - -/******************************************************************************* -* Function Name : UART_Init -* Description : This function initializes the selected UART registers to -* their reset values -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Output : None -* Return : None -*******************************************************************************/ -void UART_Init(UART_TypeDef *UARTx); - -/******************************************************************************* -* Function Name : UART_ModeConfig -* Description : This function configures the mode of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : The UART mode, it can be -* UARTM_8D for 8-bit data format -* UARTM_7D_P for 7-bit data + parity format -* UART_9D for 9-bit data format -* UART_8D_W for 8-bit data + wake-up bit format -* UART_8D_P for 8-bit data + parity bit format -* Output : None -* Return : None -*******************************************************************************/ -inline void UART_ModeConfig(UART_TypeDef *UARTx, UARTMode_TypeDef UART_Mode) -{ - UARTx->CR = (UARTx->CR&0xFFF8)|(u16)UART_Mode; -} - -/******************************************************************************* -* Function Name : UART_BaudRateConfig -* Description : This function configures the baud rate of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : The baudrate value -* Output : None -* Return : None -*******************************************************************************/ -void UART_BaudRateConfig(UART_TypeDef *UARTx, u32 BaudRate); - -/******************************************************************************* -* Function Name : UART_ParityConfig -* Description : This function configures the data parity of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The parity type, it can be UART_EVEN_PARITY, UART_ODD_PARITY -* or UART_NO_PARITY -* Output : None -* Return : None -*******************************************************************************/ -inline void UART_ParityConfig(UART_TypeDef *UARTx, UARTParity_TypeDef Parity) -{ - UARTx->CR = (UARTx->CR&0xFFDF)|(u16)Parity; -} - -/******************************************************************************* -* Function Name : UART_StopBitsConfig -* Description : This function configures the number of stop bits of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : The number of stop bits, it can be -* UART_0_5_StopBits for 0.5 stop bit -* UART_1_StopBits for 1 stop bit, -* UART_1_5_StopBits for 1.5 stop bits -* UART_2_StopBits for 2 stop bits -* Output : None -* Return : None -*******************************************************************************/ -inline void UART_StopBitsConfig(UART_TypeDef *UARTx, UARTStopBits_TypeDef StopBits) -{ - UARTx->CR = (UARTx->CR&0xFFE7)|(u16)StopBits; -} - -/******************************************************************************* -* Function Name : UART_Config -* Description : This function configures the baudrate, the mode, the data -* parity and the number of stop bits of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : u32 The baudrate value -* Input 3 : The parity type, it can be UART_EVEN_PARITY, UART_ODD_PARITY -* or UART_NO_PARITY -* Input 4 : The number of stop bits UART_0_5_StopBits, UART_1_StopBits, -* UART_1_5_StopBits or UART_2_StopBits -* Input 5 : The UART mode, it can be -* UARTM_8D for 8-bit data format -* UARTM_7D_P for 7-bit data + parity format -* UART_9D for 9-bit data format -* UART_8D_W for 8-bit data + wake-up bit format -* UART_8D_P for 8-bit data + parity bit format -* Output : None -* Return : None -*******************************************************************************/ -void UART_Config(UART_TypeDef *UARTx, u32 BaudRate, UARTParity_TypeDef Parity, - UARTStopBits_TypeDef StopBits, UARTMode_TypeDef Mode); - -/******************************************************************************* -* Function Name : UART_ItConfig -* Description : This function enables or disables one or several interrupt -* sources of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : The new interrupt flag or flags -* Input 3 : ENABLE or DISABLE -* Output : None -* Return : None -* Note : The UART interrupt flags are listed in the file uart.h -*******************************************************************************/ -void UART_ItConfig(UART_TypeDef *UARTx, u16 UART_Flag, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_FifoConfig -* Description : This function enables or disables the Rx and Tx FIFOs of -* the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_FifoConfig(UART_TypeDef *UARTx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_FifoReset -* Description : This function resets the Rx and the Tx FIFOs of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : RxFIFO or TxFIFO -* Output : None -* Return : None -*******************************************************************************/ -void UART_FifoReset(UART_TypeDef *UARTx, UARTFIFO_TypeDef FIFO); - -/******************************************************************************* -* Function Name : UART_LoopBackConfig -* Description : This function enables or disables the loop back mode of -* the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_LoopBackConfig(UART_TypeDef *UARTx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_TimeOutPeriodConfig -* Description : This function configures the UART Time Out Period. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : The time-out period value -* Output : None -* Return : None -*******************************************************************************/ -inline void UART_TimeOutPeriodConfig(UART_TypeDef *UARTx, u16 TimeOutPeriod) -{ - UARTx->TOR = TimeOutPeriod; -} - -/******************************************************************************* -* Function Name : UART_GuardTimeConfig -* Description : This function configures the UART Guard Time. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : The guard time value -* Output : None -* Return : None -*******************************************************************************/ -inline void UART_GuardTimeConfig(UART_TypeDef *UARTx, u16 GuardTime) -{ - UARTx->GTR = GuardTime; -} - -/******************************************************************************* -* Function Name : UART_RxConfig -* Description : This function enable and disable the UART data reception. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_RxConfig(UART_TypeDef *UARTx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_OnOffConfig -* Description : This function sets On/Off the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_OnOffConfig(UART_TypeDef *UARTx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_ByteSend -* Description : This function sends a byte to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the data byte to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_ByteSend(UART_TypeDef *UARTx, u8 *Data); - -/******************************************************************************* -* Function Name : UART_9BitByteSend -* Description : This function sends a 9-bit data to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the data to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_9BitByteSend(UART_TypeDef *UARTx, u16 *Data); - -/******************************************************************************* -* Function Name : UART_DataSend -* Description : This function sends several data bytes to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the data to send -* Input 3 : The data length in bytes -* Output : None -* Return : None -*******************************************************************************/ -void UART_DataSend(UART_TypeDef *UARTx, u8 *Data, u8 DataLength); - -/******************************************************************************* -* Function Name : UART_9BitDataSend -* Description : This function sends several 9-bits data to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the data to send -* Input 3 : The data length -* Output : None -* Return : None -*******************************************************************************/ -void UART_9BitDataSend(UART_TypeDef *UARTx, u16 *Data, u8 DataLength); - -/******************************************************************************* -* Function Name : UART_StringSend -* Description : This function sends a string to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the string to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_StringSend(UART_TypeDef *UARTx, u8 *String); - -/******************************************************************************* -* Function Name : UART_ByteReceive -* Description : This function gets a data byte from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the buffer where the data will be stored -* Input 3 : The time-out period -* Output : The received 8-bit data -* Return : The UARTx.SR register content -*******************************************************************************/ -u16 UART_ByteReceive(UART_TypeDef *UARTx, u8 *Data, u8 TimeOut); - -/******************************************************************************* -* Function Name : UART_9BitByteReceive -* Description : This function gets a 9-bit data byte from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the buffer where the data will be stored -* Input 3 : The time-out period value -* Output : The received 9-bit data -* Return : The UARTx.SR register content -*******************************************************************************/ -u16 UART_9BitByteReceive(UART_TypeDef *UARTx, u16 *Data, u8 TimeOut); - -/******************************************************************************* -* Function Name : UART_DataReceive -* Description : This function gets 8 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The data length -* Input 4 : The time-out period value -* Output : The received 8-bit data buffer -* Return : The UARTx.SR register content -*******************************************************************************/ -u16 UART_DataReceive(UART_TypeDef *UARTx, u8 *Data, u8 DataLength, u8 TimeOut); - -/******************************************************************************* -* Function Name : UART_9BitDataReceive -* Description : This function gets 9 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The data length -* Input 4 : The time-out value -* Output : The received 9-bit data buffer -* Return : The UARTx.SR register content -*******************************************************************************/ -u16 UART_9BitDataReceive(UART_TypeDef *UARTx, u16 *Data, u8 DataLength, u8 TimeOut); - -/******************************************************************************* -* Function Name : UART_StringReceive -* Description : This function gets 8-bit data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the buffer where the string will be stored -* Output : None -* Return : None -*******************************************************************************/ -u16 UART_StringReceive(UART_TypeDef *UARTx, u8 *Data); - -/******************************************************************************* -* Function Name : UART_FlagStatus -* Description : This function gets the flags status of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Output : None -* Return : None -*******************************************************************************/ -inline u16 UART_FlagStatus(UART_TypeDef *UARTx) -{ - return UARTx->SR; -} - -#ifdef USE_SERIAL_PORT -/******************************************************************************* -* Function Name : sendchar -* Description : This function sends a character to the selected UART. -* Input 1 : A pointer on the character to send. -* Output : None -* Return : None -*******************************************************************************/ -void sendchar( char *ch ); -#endif /* USE_SERIAL_PORT */ - -#endif /* _UART_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/wdg.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/wdg.h deleted file mode 100644 index 8ba8f442..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/wdg.h +++ /dev/null @@ -1,132 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : wdg.h -* Author : MCD Application Team -* Date First Issued : 25/08/2003 -* Description : This file contains all the functions prototypes for the -* WDG software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __WDG_H -#define __WDG_H - -#include "71x_map.h" -#include "rccu.h" - -/******************************************************************************* -* Function Name : WDG_Enable -* Description : Enable the Watchdog Mode -* Input : None -* Return : None -*******************************************************************************/ -inline void WDG_Enable ( void ) -{ - WDG->CR |= 0x01; -} - -/******************************************************************************* -* Function Name : WDG_CntRefresh -* Description : Refresh and update the WDG counter to avoid a system reset. -* Input : None -* Return : None -*******************************************************************************/ -inline void WDG_CntRefresh ( void ) -{ - /* Write the first value in the key register */ - WDG->KR = 0xA55A; - - /* Write the second value in the key register */ - WDG->KR = 0x5AA5; -} - -/******************************************************************************* -* Function Name : WDG_PrescalerConfig -* Description : Set the counter prescaler value. -* The clock to Timer Counter is divided by (Prescaler + 1) -* Input : Prescaler data value (8 bit) -* Return : None -*******************************************************************************/ -inline void WDG_PrescalerConfig ( u8 Prescaler ) -{ - WDG->PR = Prescaler; -} - -/******************************************************************************* -* Function Name : WDG_CntReloadUpdate -* Description : Update the counter pre-load value. -* Input : Pre-load data value (16 bit) -* Return : None -*******************************************************************************/ -inline void WDG_CntReloadUpdate ( u16 PreLoadValue ) -{ - WDG->VR = PreLoadValue; -} - -/******************************************************************************* -* Function Name : WDG_PeriodValueConfig -* Description : Set the prescaler and counter reload value based on the -* needed time. -* Input : Amount of time (µs) needed, peripheral clock2 value -* Return : None -*******************************************************************************/ -void WDG_PeriodValueConfig ( u32 Time ); - -/******************************************************************************* -* Function Name : WDG_CntOnOffConfig -* Description : Start or stop the free auto-reload timer to count down. -* Input : ENABLE or DISABLE -* Return : None -*******************************************************************************/ -inline void WDG_CntOnOffConfig ( FunctionalState NewState ) -{ - if (NewState == ENABLE) WDG->CR |= 0x0002; else WDG->CR &= ~0x0002; -} - -/******************************************************************************* -* Function Name : WDG_ECITConfig -* Description : Enable or Disable the end of count interrupt. -* Input : ENABLE or DISABLE -* Return : None -*******************************************************************************/ -inline void WDG_ECITConfig (FunctionalState NewState) -{ - if (NewState == ENABLE) WDG->MR |= 0x0001; else WDG->MR &= ~0x0001; -} - -/******************************************************************************* -* Function Name : WDG_ECFlagClear -* Description : Clear the end of count flag. -* Input : None -* Return : None -*******************************************************************************/ -inline void WDG_ECFlagClear ( void ) -{ - WDG->SR = 0x0000; -} - -/******************************************************************************* -* Function Name : WDG_ECStatus -* Description : Return the end of count status -* Input : None -* Return : NewState value -*******************************************************************************/ -inline u16 WDG_ECStatus ( void ) -{ - return WDG->SR; -} - -#endif /* __WDG_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/xti.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/xti.h deleted file mode 100644 index 38f90af7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/include/xti.h +++ /dev/null @@ -1,140 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : xti.h -* Author : MCD Application Team -* Date First Issued : 08/06/2003 -* Description : This file contains all the functions prototypes for the -* XTI software library. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __XTI_H -#define __XTI_H - -#include "71x_map.h" - -typedef enum -{ - XTI_WakeUp = 1, - XTI_Interrupt = 2, - XTI_WakeUpInterrupt = 3 -} XTIMode_TypeDef; - -typedef enum -{ - XTI_FallingEdge, - XTI_RisingEdge -} XTITriggerEdge_TypeDef; - -#define XTI_Line0 0x0001 -#define XTI_Line1 (XTI_Line0<<1) -#define XTI_Line2 (XTI_Line1<<1) -#define XTI_Line3 (XTI_Line2<<1) -#define XTI_Line4 (XTI_Line3<<1) -#define XTI_Line5 (XTI_Line4<<1) -#define XTI_Line6 (XTI_Line5<<1) -#define XTI_Line7 (XTI_Line6<<1) -#define XTI_Line8 (XTI_Line7<<1) -#define XTI_Line9 (XTI_Line8<<1) -#define XTI_Line10 (XTI_Line9<<1) -#define XTI_Line11 (XTI_Line10<<1) -#define XTI_Line12 (XTI_Line11<<1) -#define XTI_Line13 (XTI_Line12<<1) -#define XTI_Line14 (XTI_Line13<<1) -#define XTI_Line15 (XTI_Line14<<1) - -/******************************************************************************* -* Function Name : XTI_Init -* Description : This routine is used to initialize the XIT peripheral - to reset state. -* Input 1 : None -* Output : None -* Return : None -*******************************************************************************/ -void XTI_Init(void); - -/******************************************************************************* -* Function Name : XTI_ModeConfig -* Description : This routine is used to configure the XTI Mode. -* Input 1 : Mode can be WakeUp, Interrupt or WakeUpInterrupt. -* Input 2 : NewState can be ENABLE ro DISABLE. -* Output : None -* Return : None -*******************************************************************************/ -inline void XTI_ModeConfig(XTIMode_TypeDef Mode,FunctionalState NewState) -{ - if (NewState==ENABLE) XTI->CTRL|=Mode; else XTI->CTRL&=~Mode; -} - -/******************************************************************************* -* Function Name : XTI_LineModeConfig -* Description : This routine is used to configure the trigger edge. -* Input 1 : Lines to be configured. -* Input 2 : The trigger edge can be FallingEdge or RisingEdge. -* Output : None -* Return : None -*******************************************************************************/ -void XTI_LineModeConfig(u16 Lines, XTITriggerEdge_TypeDef TriggerEdge); - -/******************************************************************************* -* Function Name : XTI_LineConfig -* Description : This routine is used to enable and disable lines interrupts. -* Input 1 : Lines to be configured. -* Input 2 : NewState can be ENABLE ro DISABLE. -* Output : None -* Return : None -*******************************************************************************/ -void XTI_LineConfig(u16 Lines, FunctionalState NewState); - -/******************************************************************************* -* Function Name : XTI_InterruptLineValue -* Description : This routine is used to get the interrupt lines status. -* Input 1 : None. -* Output : The interrupts lines numbers -* Return : None -*******************************************************************************/ -inline u16 XTI_InterruptLineValue(void) -{ - return XTI->PRL | ((u16)XTI->PRH<<8); -} - -/******************************************************************************* -* Function Name : XTI_PendingBitClear -* Description : This routine is used to clear the pending bits. -* Input 1 : Bits to be cleared. -* Output : None -* Return : None -*******************************************************************************/ -inline void XTI_PendingBitClear(u16 Lines) -{ - XTI->PRL &= ~Lines; - XTI->PRH &= ~((Lines>>8)&0x00FF); -} - -/******************************************************************************* -* Function Name : XTI_SoftwareIRQInterruprGenerate -* Description : This routine is used to generate a software IRQ interrupt. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -inline void XTI_SWIRQGenerate(void) -{ - XTI->SR = 0x01; - XTI->SR = 0x00; -} - -#endif /* __XTI_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/pcu.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/pcu.c deleted file mode 100644 index 7e0bf901..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/pcu.c +++ /dev/null @@ -1,173 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : pcu.c -* Author : MCD Application Team -* Date First Issued : 09/09/03 -* Description : This file provides all the Power Control Unit functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "pcu.h" -#include "rccu.h" - -/******************************************************************************* -* Function Name : PCU_VRConfig -* Description : This routine is used to configure PCU voltage regultors -* Input 1 : MVR : Main voltage Regulator - LPR : Low Power Regulator -* Input 2 : ENABLE : Enable the Voltage Regulator - DISABLE: Disable ( ByPass ) the VR -* Return : None -*******************************************************************************/ -void PCU_VRConfig ( PCU_VR Xvr, FunctionalState NewState ) -{ - u16 Tmp = PCU->PWRCR; - switch ( Xvr ) - { - case PCU_MVR : - /* Configure the Main Voltage Regulator */ - if (NewState == DISABLE) Tmp |= PCU_MVR_Mask; else Tmp &= ~PCU_MVR_Mask; - break; - case PCU_LPR : - /* Configure the Low power Voltage Regulator */ - if (NewState == DISABLE) Tmp |= PCU_LPR_Mask; else Tmp &= ~PCU_LPR_Mask; - break; - } - - /* Wait until the previous write operation will be completed */ - while (( PCU->PWRCR & PCU_BUSY_Mask ) == 1); - - /* Unlock Power Control Register */ - PCU->PWRCR |= PCU_WREN_Mask; - PCU->PWRCR = Tmp | PCU_WREN_Mask; -} - -/******************************************************************************* -* Function Name : PCU_WFIEnter -* Description : This routine is used to force the Device to enter in WFI mode -* Input 1 : CLOCK2_16 : Clock2_16 as system clock for WFI mode -* EXTERNAL : external clock as system clock for WFI mode -* Input 2 : ENABLE : Enable Low Power Regulator during Wait For Interrupt Mode -* DISABLE: Disable Low Power Regulator during Wait For Interrupt Mode -* Input 3 : ENABLE : Enable Low Power Mode during Wait For Interrupt Mode -* DISABLE: Disable Low Power Mode during Wait For Interrupt Mode -* Return : None -*******************************************************************************/ -void PCU_WFIEnter ( WFI_CLOCKS Xclock, FunctionalState Xlpr, FunctionalState Xlpm ) -{ - /* Select the WFI mode */ - /* Clear WFI bit in the RCCU_SMR register to enter in WFI mode */ - RCCU->SMR &=0xFE ; - - if (Xlpr == DISABLE ) - - /* Wait until the previous write operation will be completed */ - while (( PCU->PWRCR & PCU_BUSY_Mask ) == 1); - - /* Unlock Power Control Register */ - PCU->PWRCR |= PCU_WREN_Mask; - - /* switched off the main Voltage Regulator in WFI mode */ - PCU->PWRCR |=0x0010;; - - /* Select the LPWFI mode */ - if (Xlpm == ENABLE ) - - /* Disable the flash during the LPWFI */ - FLASHR->CR0|=0x8000; - - if (Xclock == WFI_CLOCK2_16) - /* Select the 32KHz as peripherl clock during LPWFI */ - RCCU->CCR |=0x2; - else - /* Select CLK2/15 as peripherals clock during LPWFI */ - RCCU->CCR &=~0x2; - - /* Set bit LOPWFI for selecting LPWFI mode */ - RCCU->CCR |=0x1; - - /* Enter the LPWFI mode */ - RCCU->SMR &=0xFE; -} - -/******************************************************************************* -* Function Name : PCU_LPMEnter -* Description : This routine is used to force the device to enter in low -* power modes -* Input : PCU_SLOW : Slow Mode - PCU_STOP : Stop Mode - PCU_STANDBY : StandBy Mode -* Return : None -*******************************************************************************/ -void PCU_LPMEnter ( LPM_MODES Xmode ) -{ - u32 temp; - switch ( Xmode ) - { - /* Slow Mode */ - case PCU_SLOW: - { - RCCU->PLL1CR |= 0x87; - RCCU_RCLKSourceConfig ( RCCU_PLL1_Output ); - break; - } - - /* Stop Mode */ - case PCU_STOP: - { - /* Enable Stop EN bit */ - RCCU->CCR |= PCU_STOP_EN_Mask; - - /* Write '1' to Stop Bit */ - XTI->CTRL |= 0x04; - - /* Write '0' to Stop Bit */ - XTI->CTRL &= 0x03; - - /* Write '1' to Stop Bit */ - XTI->CTRL |= 0x04; - - /* Aadd Delay */ - - temp = 0; - temp = 1; - temp = 2; - temp = 3; - temp = 4; - temp = 5; - temp = 6; - temp = 7; - temp = 8; - - break; - - } - - /* PCU_STANDBY Mode */ - case PCU_STANDBY: - { - /* Wait until the previous write operation will be completed */ - while (( PCU->PWRCR & PCU_BUSY_Mask ) == 1); - - /* Unlock Power Control Register */ - PCU->PWRCR |= PCU_WREN_Mask; - - /* Set the Power Down flag */ - PCU->PWRCR |= PCU_PWRDWN_Mask; - } - } -} -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/rccu.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/rccu.c deleted file mode 100644 index 2b7c65a3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/rccu.c +++ /dev/null @@ -1,193 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : rccu.c -* Author : MCD Application Team -* Date First Issued : 07/28/2003 -* Description : This file provides all the RCCU software functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#include "rccu.h" - -/******************************************************************************* -* Function Name : RCCU_PLL1Config -* Description : Configures the PLL1 div & mul factors. -* Input : New_Mul ( RCCU_PLL1_Mul_12, RCCU_PLL1_Mul_16, RCCU_PLL1_Mul_20, -* RCCU_PLL1_Mul_24 ) -* : New_Div ( RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, RCCU_Div_4, -* RCCU_Div_5, RCCU_Div_6, RCCU_Div_7) -* Return : None -*******************************************************************************/ -void RCCU_PLL1Config ( RCCU_PLL1_Mul New_Mul, RCCU_PLL_Div New_Div ) -{ - u32 Tmp = 0; - - if (RCCU_FrequencyValue(RCCU_CLK2)>3000000) - RCCU->PLL1CR|=RCCU_FREEN_Mask; - else - RCCU->PLL1CR&=~RCCU_FREEN_Mask; - - Tmp = ( RCCU->PLL1CR & ~RCCU_MX_Mask ) | ( New_Mul << RCCU_MX_Index ); - RCCU->PLL1CR = ( Tmp & ~RCCU_DX_Mask ) | New_Div | 0x40; -} - -/******************************************************************************* -* Function Name : RCCU_PLL2Config -* Description : Configures the PLL2 div & mul factors. -* Input : New_Mul ( RCCU_PLL2_Mul_12, RCCU_PLL2_Mul_16, RCCU_PLL2_Mul_20, -* RCCU_Mul_PLL2_28 ) -* : New_Div ( RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, RCCU_Div_4, -* RCCU_Div_5, RCCU_Div_6, RCCU_Div_7) -* Return : None -*******************************************************************************/ -void RCCU_PLL2Config ( RCCU_PLL2_Mul New_Mul, RCCU_PLL_Div New_Div ) -{ - u32 Tmp = ( PCU->PLL2CR & ~RCCU_MX_Mask ) | ( New_Mul << RCCU_MX_Index ); - PCU->PLL2CR = ( Tmp & ~RCCU_DX_Mask ) | ( New_Div | RCCU_FREEN_Mask ); -} - -/******************************************************************************* -* Function Name : RCCU_RCLKSourceConfig -* Description : Selects the RCLK source clock -* Input : New_Clock ( RCCU_PLL1_Output, RCCU_CLOCK2_16, RCCU_CLOCK2 ) -* Return : None -*******************************************************************************/ -void RCCU_RCLKSourceConfig ( RCCU_RCLK_Clocks New_Clock ) -{ - switch ( New_Clock ) - { - case RCCU_CLOCK2 :{ /* Resets the CSU_Cksel bit in clk_flag */ - RCCU->CFR &= ~RCCU_CSU_CKSEL_Mask; - /* Set the CK2_16 Bit in the CFR */ - RCCU->CFR |= RCCU_CK2_16_Mask; - /* Deselect The CKAF */ - RCCU->CCR &= ~RCCU_CKAF_SEL_Mask; - /* switch off the PLL1 */ - RCCU->PLL1CR=((RCCU->PLL1CR & ~RCCU_DX_Mask)\ - |0x00000003) & ~RCCU_FREEN_Mask; - break;} - case RCCU_CLOCK2_16 :{ /* ReSet the CK2_16 Bit in the CFR */ - RCCU->CFR &= ~RCCU_CK2_16_Mask; - /* Deselect The CKAF */ - RCCU->CCR &= ~RCCU_CKAF_SEL_Mask; - /* switch off the PLL1 */ - RCCU->PLL1CR=((RCCU->PLL1CR & ~RCCU_DX_Mask)\ - |0x00000003) & ~RCCU_FREEN_Mask; - break;} - case RCCU_PLL1_Output:{ /* Set the CK2_16 Bit in the CFR */ - RCCU->CFR = RCCU->CFR | RCCU_CK2_16_Mask; - /* Waits the PLL1 to lock if DX bits are different from '111' */ - /* If all DX bit are set the PLL lock flag in meaningless */ - if (( RCCU->PLL1CR & 0x0007 ) != 7) - while(!(RCCU->CFR & RCCU_LOCK_Mask)); - /* Deselect The CKAF */ - RCCU->CCR &= ~RCCU_CKAF_SEL_Mask; - /* Select The CSU_CKSEL */ - RCCU->CFR |= RCCU_CSU_CKSEL_Mask; - break;} - case RCCU_RTC_CLOCK : {RCCU->CCR |= 0x04; - break;} - } -} - -/******************************************************************************* -* Function Name : RCCU_RCLKClockSource -* Description : Returns the current RCLK source clock -* Input : None -* Return : RCCU_PLL1_Output, RCCU_CLOCK2_16, RCCU_CLOCK2, RCCU_RTC_CLOCK -*******************************************************************************/ -RCCU_RCLK_Clocks RCCU_RCLKClockSource ( void ) -{ - if ((RCCU->CCR & 0x04)==0x04) - return RCCU_RTC_CLOCK; - - else if ((RCCU->CFR & RCCU_CK2_16_Mask)==0) - return RCCU_CLOCK2_16; - - else if (RCCU->CFR & RCCU_CSU_CKSEL_Mask) - return RCCU_PLL1_Output; - - else - return RCCU_CLOCK2; -} - -/******************************************************************************* -* Function Name : RCCU_USBClockSource -* Description : Gets the RCLK source clock -* Input : None -* Return : RCCU_USB_Clocks ( RCCU_PLL2_Output, RCCU_USBCK ) -*******************************************************************************/ -RCCU_USB_Clocks RCCU_USBClockSource ( void ) -{ - if ((PCU->PLL2CR & RCCU_USBEN_Mask ) >> RCCU_USBEN_Index == 1 ) - return RCCU_PLL2_Output; - else return RCCU_USBCK; -} - -/******************************************************************************* -* Function Name : RCCU_FrequencyValue -* Description : Calculates & Returns any internal RCCU clock frequency -* passed in parametres -* Input : RCCU_Clocks ( RCCU_CLK2, RCCU_RCLK, RCCU_MCLK, RCCU_PCLK, RCCU_FCLK ) -* Return : u32 -*******************************************************************************/ -u32 RCCU_FrequencyValue ( RCCU_Clocks Internal_Clk ) -{ - u32 Tmp; - u8 Div = 0; - u8 Mul = 0; - RCCU_RCLK_Clocks CurrentRCLK; - - Tmp = ( RCCU_Div2Status() == SET )? RCCU_Main_Osc / 2 : RCCU_Main_Osc; - - if ( Internal_Clk == RCCU_CLK2 ) - { - Div = 1; - Mul = 1; - } - else - { CurrentRCLK = RCCU_RCLKClockSource (); - switch ( CurrentRCLK ){ - case RCCU_CLOCK2_16 : Div = 16; - Mul = 1; - break; - case RCCU_CLOCK2 : Div = 1; - Mul = 1; - break; - case RCCU_PLL1_Output :{Mul=(RCCU->PLL1CR & RCCU_MX_Mask ) >> RCCU_MX_Index; - switch ( Mul ) - {case 0: Mul = 20; break; - case 1: Mul = 12; break; - case 2: Mul = 24; break; - case 3: Mul = 16; break; - } - Div = ( RCCU->PLL1CR & RCCU_DX_Mask ) + 1; - break;} - case RCCU_RTC_CLOCK : Mul = 1; - Div = 1; - Tmp = RCCU_RTC_Osc; - break;}} - - switch ( Internal_Clk ){ - case RCCU_MCLK :{Div <<= PCU->MDIVR & RCCU_FACT_Mask; - break;} - case RCCU_PCLK :{Div <<=(PCU->PDIVR & RCCU_FACT2_Mask ) >> RCCU_FACT2_Index; - break;} - case RCCU_FCLK :{Div <<= PCU->PDIVR & 0x3; - break;}} - - return (Tmp * Mul) / Div; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/rtc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/rtc.c deleted file mode 100644 index 7f705ef9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/rtc.c +++ /dev/null @@ -1,225 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : rtc.c -* Author : MCD Application Team -* Date First Issued : 09/30/2003 -* Description : This file provides all the RTC software functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "rtc.h" - -/* Second interrupt */ -#define RTC_SI_Mask 0x0001 - -/* Alarm interrupt */ -#define RTC_AI_Mask 0x0002 - -/* OverFlow interrupt */ -#define RTC_OWI_Mask 0x0004 - -/* Global interrupt */ -#define RTC_GI_Mask 0x0008 - -/* Configuration Flag Mask */ -#define RTC_CNF_Mask 0x0010 - -/* Operation OFF flag */ -#define RTC_RTOFF_Mask 0x0020 - -/******************************************************************************* -* Function Name : RTC_CounterConfig -* Description : This routine is used to update the RTC counter value -* Input : The new counter value. -* Return : None -*******************************************************************************/ -void RTC_CounterConfig (u32 CounterValue) -{ - /* Wait For Last Task Completition */ - RTC_WaitForLastTask(); - - /* Enter to configuration mode */ - RTC_EnterCfgMode(); - - /* Update the RTC counter register with the new time and date */ - /* Update the CNTL register */ - RTC->CNTL = (u16)CounterValue; - - /* Wait For Last Task Completition */ - RTC_WaitForLastTask(); - - /* Update the CNTH register */ - RTC->CNTH = (u16)(CounterValue >> 16); - - /* Wait For Last Task Completition */ - RTC_WaitForLastTask(); - - /* Exit From Configuration Mode */ - RTC_ExitCfgMode (); -} - -/******************************************************************************* -* Function Name : RTC_PrescalerConfig -* Description : This routine is used to set the RTC 20-bit Prescaler Value -* Input : The New prescaler Value -* Return : None -*******************************************************************************/ -void RTC_PrescalerConfig (u32 Xprescaler) -{ - if ( RTC_PrescalerValue () != Xprescaler ) - { - /* Wait For Last Task Completion */ - RTC_WaitForLastTask (); - - /* Enter In Configuration Mode */ - RTC_EnterCfgMode (); - - /* Set the prescaler MSB part */ - RTC->PRLH = (Xprescaler & 0x000F0000) >> 16; - - /* Wait For Last Task Completion */ - RTC_WaitForLastTask(); - - /* Set the prescaler LSB part */ - RTC->PRLL = (Xprescaler & 0x0000FFFF); - - /* Wait For Last Task Completion */ - RTC_WaitForLastTask(); - - /* Exit From Configuration Mode */ - RTC_ExitCfgMode (); - } -} - -/******************************************************************************* -* Function Name : RTC_AlarmConfig -* Description : This routine is used to set the RTC alarm Value -* Input : an u32 value that holds the Real Time clock alarm time. -* Return : None -*******************************************************************************/ -void RTC_AlarmConfig (u32 Xalarm) -{ - /* Wait For Last Task Completion */ - RTC_WaitForLastTask (); - - /* Enter In Configuration Mode */ - RTC_EnterCfgMode (); - - /* Set The MSB part of the Alarm Time */ - RTC->ALRH = (Xalarm & 0xFFFF0000) >> 16; - - /* Wait For Last Task Completion */ - RTC_WaitForLastTask(); - - /* Set The LSB part of the Alarm Time */ - RTC->ALRL = (Xalarm & 0x0000FFFF); - - /* Wait For Last Task Completion */ - RTC_WaitForLastTask(); - - /* Exit From Configuration Mode */ - RTC_ExitCfgMode (); -} - -/******************************************************************************* -* Function Name : RTC_FlagClear -* Description : This routine is used to clear the RTC flags -* Input : an RTC flag RTC_GIR, RTC_OWIR, RTC_AIR or RTC_SIR -* Return : None -*******************************************************************************/ -void RTC_FlagClear (RTC_FLAGS Xflag) -{ - /* Wait For Last Task Completion */ - RTC_WaitForLastTask(); - - /* Enter In Configuration Mode */ - RTC_EnterCfgMode(); - - /* Clear an RTC flag */ - RTC->CRL &= ~Xflag; - - /* Wait For Last Task Completion */ - RTC_WaitForLastTask(); - - /* Exit From Configuration Mode */ - RTC_ExitCfgMode (); - } - -/******************************************************************************* -* Function Name : RTC_ITClear -* Description : This routine is used to clear a RTC interrupt pending bit -* Input : a RTC interrupt: RTC_GIT, RTC_OWIT, RTC_AIT or RTC_SIT -* Return : None -*******************************************************************************/ -void RTC_ITClear (RTC_IT Xrtcit) -{ - /* Wait For Last Task Completion */ - RTC_WaitForLastTask(); - - /* Enter In Configuration Mode */ - RTC_EnterCfgMode(); - - /* Clears an RTC interrupt */ - RTC->CRL &= ~Xrtcit; - - /* Wait For Last Task Completion */ - RTC_WaitForLastTask (); - - /* Exit From Configuration Mode */ - RTC_ExitCfgMode (); -} - -/******************************************************************************* -* Function Name : RTC_EnterCfgMode -* Description : This routine is used to enter in the Configuration Mode -* Input : None -* Return : None -*******************************************************************************/ -void RTC_EnterCfgMode(void) -{ - /* Set the CNF flag to enter in the Configuration Mode */ - RTC->CRL |= RTC_CNF_Mask; - - /* Wait For Last Task Completion */ - RTC_WaitForLastTask (); -} - -/******************************************************************************* -* Function Name : RTC_ExitCfgMode -* Description : This routine is used to exit from the Configuration Mode -* Input : None -* Return : None -*******************************************************************************/ -void RTC_ExitCfgMode(void) -{ - /* Reset the CNF flag to exit from the Configuration Mode */ - RTC->CRL &= ~RTC_CNF_Mask; - - /* Wait For Last Task Completion */ - RTC_WaitForLastTask (); -} - -/******************************************************************************* -* Function Name : RTC_WaitForLastTask -* Description : This routine waits for the last task completion -* Input : None -* Return : None -*******************************************************************************/ -void RTC_WaitForLastTask(void) -{ - /* Loop until the Last operation Completion */ - while (!(RTC->CRL & RTC_RTOFF_Mask)); -} -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/tim.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/tim.c deleted file mode 100644 index 6f59a626..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/tim.c +++ /dev/null @@ -1,234 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : tim.c -* Author : MCD Application Team -* Date First Issued : 09/08/2003 -* Description : This file provides all the TIM software functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "tim.h" - -/******************************************************************************* -* Function Name : TIM_Init -* Description : This routine is used to Initialize the TIM peripheral -* registers to their default values. -* Input : TIM Timer to Initialize(TIM0, TIM1, TIM2, TIM3). -* Return : None. -*******************************************************************************/ -void TIM_Init( TIM_TypeDef *TIMx ) -{ - TIMx->CR1 = 0x0000; - TIMx->CR2 = 0x0000; - TIMx->SR = 0x0000; -} - -/******************************************************************************* -* Function Name : TIM_ICAPModeConfig -* Description : This routine is used to configure the input capture feature -* Input : (1) TIM Timer (TIM0, TIM1, TIM2, TIM3). -* : (2) Input Capture Channel (TIM_CHANNEL_A, TIM_CHANNEL_B). -* : (3) Active Edge :(TIM_RISING,TIM_FALLING). -* Return : None. -*******************************************************************************/ -void TIM_ICAPModeConfig ( TIM_TypeDef *TIMx, - TIM_Channels Xchannel, - TIM_Clock_Edges Xedge ) -{ - switch (Xchannel) - { - case TIM_CHANNEL_A : - if (Xedge == TIM_RISING) TIMx->CR1 |= TIM_IEDGA_Mask; else TIMx->CR1 &= ~TIM_IEDGA_Mask; - break; - case TIM_CHANNEL_B : - if (Xedge == TIM_RISING) TIMx->CR1 |= TIM_IEDGB_Mask; else TIMx->CR1 &= ~TIM_IEDGB_Mask; - break; - } -} - -/******************************************************************************* -* Function Name : TIM_OCMPModeConfig -* Description : This routine is used to configure the output compare feature. -* Input : (1) TIM Timer(TIM0, TIM1, TIM2, TIM3). -* : (2) OCMP Channel (TIM_CHANNEL_A, TIM_CHANNEL_B). -* : (3) Pulse Length. -* : (4) OC_Mode (TIM_TIMING,TIM_WAVE). -* : (5) Level (TIM_HIGH,TIM_LOW). -* Return : None. -*******************************************************************************/ -void TIM_OCMPModeConfig ( TIM_TypeDef *TIMx, - TIM_Channels Xchannel, - u16 XpulseLength, - TIM_OC_Modes Xmode, - TIM_Logic_Levels Xlevel ) -{ - u16 Tmp1 = 0x0000; - u16 Tmp2 = TIMx->CR2; - - TIMx->CR2 = 0x0000; - /* Start The TIM Counter */ - TIMx->CR1 = TIM_EN_Mask; - /* Update the CR2 Register */ - TIMx->CR2 = Tmp2; - switch ( Xmode ) - { - case TIM_TIMING : - /* Output Compare Used only for Internal Timing Operation */ - Tmp1 = Xchannel == TIM_CHANNEL_A ? Tmp1 & ~TIM_OCAE_Mask : Tmp1 & ~TIM_OCBE_Mask; - break; - case TIM_WAVE : - /* Output Compare Used for external wave generation */ - Tmp1 = Xchannel == TIM_CHANNEL_A ? TIM_OCAE_Mask : TIM_OCBE_Mask; - if ( Xlevel == TIM_HIGH ) - Tmp1 = Xchannel == TIM_CHANNEL_A ? Tmp1 | TIM_OLVLA_Mask : Tmp1 | TIM_OLVLB_Mask; - else - Tmp1 = Xchannel == TIM_CHANNEL_A ? Tmp1 & ~TIM_OLVLA_Mask : Tmp1 & ~TIM_OLVLB_Mask; - break; - } - if ( Xchannel == TIM_CHANNEL_A ) - TIMx->OCAR = (XpulseLength); - else - TIMx->OCBR = ( XpulseLength); - TIMx->CNTR = 0x0000; - TIMx->CR1 |= Tmp1; -} - -/******************************************************************************* -* Function Name : TIM_OPModeConfig -* Description : This routine is used to configure the one pulse mode. -* Input : (1) TIM Timer(TIM0, TIM1, TIM2, TIM3). -* : (2) XpulseLength : Length of the pulse. -* : (3) Level1 :Level during the pulse (TIM_HIGH,TIM_LOW). -* : (4) Level2 :Level after the pulse (TIM_HIGH,TIM_LOW). -* : (5) Activation Edge :High or Low on ICAP A (TIM_RISING, -* TIM_FALLING). -* Return : None. -*******************************************************************************/ -void TIM_OPModeConfig ( TIM_TypeDef *TIMx, - u16 XpulseLength, - TIM_Logic_Levels XLevel1, - TIM_Logic_Levels XLevel2, - TIM_Clock_Edges Xedge ) -{ - u16 Tmp = 0; - - /* Set the Level During the pulse */ - if (XLevel1 == TIM_HIGH) Tmp |= TIM_OLVLB_Mask; - /* Set the Level after After the pulse */ - if (XLevel2 == TIM_HIGH) Tmp |= TIM_OLVLA_Mask; - /* Set the Activation Edge on the INCAP 1 */ /* to be verified*/ - if (Xedge == TIM_RISING) Tmp |= TIM_IEDGA_Mask; - /* Set the Output Compare Function */ - Tmp |= TIM_OCAE_Mask; - /* Set the One pulse mode */ - Tmp |= TIM_OPM_Mask; - /* Update the CR1 register Value */ - TIMx->CR1 = Tmp; - /* Set the Pulse length */ - TIMx->OCAR = XpulseLength; -} - -/******************************************************************************* -* Function Name : TIM_PWMOModeConfig -* Description : This routine is used to configure the PWM in output mode. -* Input : (1) TIM Timer(TIM0, TIM1, TIM2, TIM3). -* : (2) DutyCycle. -* : (3) Level 1 : During the Duty Cycle(TIM_HIGH,TIM_LOW). -* : (4) Full period -* : (5) Level 2 : After the pulse(TIM_HIGH,TIM_LOW). -* Return : None. -*******************************************************************************/ -void TIM_PWMOModeConfig ( TIM_TypeDef *TIMx, - u16 XDutyCycle, - TIM_Logic_Levels XLevel1, - u16 XFullperiod, - TIM_Logic_Levels XLevel2) -{ - u16 Tmp = TIMx->CR1; - /* Set the level during the pulse */ - Tmp = XLevel1 == TIM_HIGH ? Tmp | TIM_OLVLB_Mask : Tmp & ~TIM_OLVLB_Mask; - /* Set the level after After the pulse */ - Tmp = XLevel2 == TIM_HIGH ? Tmp | TIM_OLVLA_Mask : Tmp & ~TIM_OLVLA_Mask; - /* Set the OCAE */ - Tmp |= TIM_OCAE_Mask; - /* Set the PWM Bit */ - Tmp |= TIM_PWM_Mask; - /* Update the CR1 */ - TIMx->CR1 = Tmp; - /* Set the Duty Cycle value */ - if ( XDutyCycle < 5 ) XDutyCycle = 5; - TIMx->OCAR = XDutyCycle - 5; - /* Set the Full Period */ - TIMx->OCBR = XFullperiod - 5; -} - -/******************************************************************************* -* Function Name : TIM_PWMIModeConfig -* Description : This routine is used to configure the PWM in input mode. -* Input : (1) TIM Timer(TIM0, TIM1, TIM2, TIM3). -* : (2) First Activation Edge(TIM_RISING,TIM_FALLING). -* Output : None. -*******************************************************************************/ -void TIM_PWMIModeConfig ( TIM_TypeDef *TIMx, TIM_Clock_Edges Xedge ) -{ - u16 Tmp = TIMx->CR1; - /* Set the first edge Level */ - Tmp = Xedge == TIM_RISING ? Tmp | TIM_IEDGA_Mask : Tmp & ~TIM_IEDGA_Mask; - /* Set the Second edge Level ( Opposit of the first level )*/ - Tmp = Xedge == TIM_FALLING ? Tmp | TIM_IEDGB_Mask : Tmp & ~TIM_IEDGB_Mask; - /* Set the PWM I Bit */ - Tmp |= TIM_PWMI_Mask; - /* Update the CR1 */ - TIMx->CR1 = Tmp; -} - -/******************************************************************************* -* Function Name : TIM_PWMIValue -* Description : This routine is used to get the PWMI values. -* Input : TIM Timer(TIM0, TIM1, TIM2, TIM3). -* Return : PWMI_parameters(Pulse, Period). -*******************************************************************************/ -PWMI_parameters TIM_PWMIValue ( TIM_TypeDef *TIMx ) -{ - PWMI_parameters Tmp; - Tmp.Pulse = TIMx->ICBR; - Tmp.Period = TIMx->ICAR; - return Tmp; -} - -/******************************************************************************* -* Function Name : TIM_CounterConfig -* Description : This routine is used to configure the Timer conuter. -* Input : (1) TIM Timer(TIM0, TIM1, TIM2, TIM3). -* : (2) Xoperation(TIM_START, TIM_STOP, TIM_CLEAR). -* Return : None. -*******************************************************************************/ -void TIM_CounterConfig ( TIM_TypeDef *TIMx, TIM_CounterOperations Xoperation) -{ - switch ( Xoperation ) - { - case TIM_START : - TIMx->CR1 |= TIM_EN_Mask; - break; - case TIM_STOP : - TIMx->CR1 &= ~TIM_EN_Mask; - break; - case TIM_CLEAR : - TIMx->CNTR = 0x1234; - break; - } -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/uart.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/uart.c deleted file mode 100644 index b7e48c0c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/uart.c +++ /dev/null @@ -1,416 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : uart.c -* Author : MCD Application Team -* Date First Issued : 06/08/2003 -* Description : This file provides all the UART software functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "uart.h" - -/******************************************************************************* -* Function Name : UART_Init -* Description : This function initializes the selected UART registers to -* their reset values -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Output : None -* Return : None -*******************************************************************************/ -void UART_Init(UART_TypeDef *UARTx) -{ - UARTx->CR = 0x0000; - UARTx->IER = 0x0000; - (void)UARTx->RxBUFR; - UARTx->RxRSTR = 0xFFFF; - UARTx->TxRSTR = 0xFFFF; - UARTx->TOR = 0x0000; - UARTx->GTR = 0x0000; -} - -/******************************************************************************* -* Function Name : UART_BaudRateConfig -* Description : This function configures the baud rate of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : u32 The baudrate value -* Output : None -* Return : None -*******************************************************************************/ -void UART_BaudRateConfig(UART_TypeDef *UARTx, u32 BaudRate) -{ - UARTx->BR = (u16)(RCCU_FrequencyValue(RCCU_FCLK)/(16*BaudRate)); -} - -/******************************************************************************* -* Function Name : UART_Config -* Description : This function configures the baudrate, the mode, the data -* parity and the number of stop bits of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : u32 The baudrate value -* Input 3 : The parity type, it can be UART_EVEN_PARITY, UART_ODD_PARITY -* or UART_NO_PARITY -* Input 4 : The number of stop bits UART_0_5_StopBits, UART_1_StopBits, -* UART_1_5_StopBits or UART_2_StopBits -* Input 5 : The UART mode, it can be -* UARTM_8D for 8-bit data format -* UARTM_7D_P for 7-bit data + parity format -* UART_9D for 9-bit data format -* UART_8D_W for 8-bit data + wake-up bit format -* UART_8D_P for 8-bit data + parity bit format -* Output : None -* Return : None -*******************************************************************************/ -void UART_Config(UART_TypeDef *UARTx, u32 BaudRate, UARTParity_TypeDef Parity, - UARTStopBits_TypeDef StopBits, UARTMode_TypeDef Mode) -{ - UART_ModeConfig(UARTx, Mode); - UART_BaudRateConfig(UARTx, BaudRate); - UART_ParityConfig(UARTx, Parity); - UART_StopBitsConfig(UARTx, StopBits); -} - -/******************************************************************************* -* Function Name : UART_ItConfig -* Description : This function enables or disables one or several interrupt -* sources of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : The new interrupt flag or flags -* Input 3 : ENABLE or DISABLE -* Output : None -* Return : None -* Note : The UART interrupt flags are listed in the file uart.h -*******************************************************************************/ -void UART_ItConfig(UART_TypeDef *UARTx, u16 UART_Flag, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->IER|=UART_Flag; else UARTx->IER&=~UART_Flag; -} - -/******************************************************************************* -* Function Name : UART_FifoConfig -* Description : This function enables or disables the Rx and Tx FIFOs of -* the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_FifoConfig(UART_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->CR|=0x0400; else UARTx->CR&=~0x0400; -} - -/******************************************************************************* -* Function Name : UART_FifoReset -* Description : This function resets the Rx and the Tx FIFOs of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : UART_RxFIFO or UART_TxFIFO -* Output : None -* Return : None -*******************************************************************************/ -void UART_FifoReset(UART_TypeDef *UARTx, UARTFIFO_TypeDef FIFO) -{ - if (FIFO==UART_RxFIFO) UARTx->RxRSTR=0xFFFF; else UARTx->TxRSTR=0xFFFF; -} - -/******************************************************************************* -* Function Name : UART_LoopBackConfig -* Description : This function enables or disables the loop back mode of -* the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_LoopBackConfig(UART_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->CR|=0x0040; else UARTx->CR&=~0x0040; -} - -/******************************************************************************* -* Function Name : UART_RxConfig -* Description : This function enables or disables the UART data reception. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_RxConfig(UART_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->CR|=0x0100; else UARTx->CR&=~0x0100; -} - -/******************************************************************************* -* Function Name : UART_OnOffConfig -* Description : This function sets On/Off the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_OnOffConfig(UART_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->CR|=0x0080; else UARTx->CR&=~0x0080; -} - -/******************************************************************************* -* Function Name : UART_ByteSend -* Description : This function sends a data byte to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the data byte to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_ByteSend(UART_TypeDef *UARTx, u8 *Data) -{ - /* if FIFO ENABLED */ - if (UARTx->CR & 0x0400) - - /* Wait until the TxFIFO contains at least 1 free place */ - while((UARTx->SR & UART_TxFull)); - - /* if FIFO DISABLED */ - else - - /* Wait until the transmit shift register is empty */ - while (!(UARTx->SR & UART_TxEmpty)); - - UARTx->TxBUFR = *Data; -} - -/******************************************************************************* -* Function Name : UART_9BitByteSend -* Description : This function sends a 9-bit data to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the 9-bit data to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_9BitByteSend(UART_TypeDef *UARTx, u16 *Data) -{ - /* if FIFO ENABLED */ - if(UARTx->CR & 0x0400) - - /* Wait until the TxFIFO contains at least 1 free place */ - while((UARTx->SR & UART_TxFull)); - - /* if FIFO DISABLED */ - else - - /* Wait until the transmit shift register is empty */ - while (!(UARTx->SR & UART_TxEmpty)); - - UARTx->TxBUFR = ((*Data) & 0x01FF); -} - -/******************************************************************************* -* Function Name : UART_DataSend -* Description : This function sends several data bytes to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the data to send -* Input 3 : The data length in bytes -* Output : None -* Return : None -*******************************************************************************/ -void UART_DataSend(UART_TypeDef *UARTx, u8 *Data, u8 DataLength) -{ - - while(DataLength--) - { - UART_ByteSend(UARTx,Data); - Data++; - } -} - -/******************************************************************************* -* Function Name : UART_9BitDataSend -* Description : This function sends several 9-bit data to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer to the data to send -* Input 3 : The data length -* Output : None -* Return : None -*******************************************************************************/ -void UART_9BitDataSend(UART_TypeDef *UARTx, u16 *Data, u8 DataLength) -{ - while(DataLength--) - { - UART_9BitByteSend(UARTx,Data); - Data++; - } -} - -/******************************************************************************* -* Function Name : UART_StringSend -* Description : This function sends a string to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the string to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_StringSend(UART_TypeDef *UARTx, u8 *String) -{ - u8 *Data=String; - while(*Data != '\0') - UART_ByteSend(UARTx, Data++); - *Data='\0'; - UART_ByteSend(UARTx, Data); -} - -/******************************************************************************* -* Function Name : UART_ByteReceive -* Description : This function gets a data byte from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the data where the data will be stored -* Input 3 : The time-out period -* Output : The received 8-bit data -* Return : The UARTx.SR register content -*******************************************************************************/ -u16 UART_ByteReceive(UART_TypeDef *UARTx, u8 *Data, u8 TimeOut) -{ - u16 wStatus = 0; - -/* reload the Timeout counter */ - UARTx->TOR=TimeOut; - -/* while the UART_RxFIFO is empty and no Timeoutidle */ - while (!((wStatus=UARTx->SR) & (UART_TimeOutIdle|UART_RxHalfFull|UART_RxBufFull))); - -/* then read the Receive Buffer Register */ - *Data = (u8)UARTx->RxBUFR; - - return wStatus; -} - -/******************************************************************************* -* Function Name : UART_9BitByteReceive -* Description : This function gets a 9-bit data from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the buffer where the data will be stored -* Input 3 : The time-out period value -* Output : The received 9-bit data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_9BitByteReceive(UART_TypeDef *UARTx, u16 *Data, u8 TimeOut) -{ - u16 wStatus = 0; - -/* reload the Timeout counter */ - UARTx->TOR=TimeOut; - -/* while the UART_RxFIFO is empty and no Timeoutidle */ - while (!((wStatus=UARTx->SR) & (UART_TimeOutIdle|UART_RxHalfFull|UART_RxBufFull))); - -/* then read the RxBUFR*/ - *Data = (u16)UARTx->RxBUFR; - return wStatus; -} - -/******************************************************************************* -* Function Name : UART_DataReceive -* Description : This function gets 8 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the buffer where the data will be stored -* Input 3 : The data length -* Input 4 : The time-out period value -* Output : The received 8-bit data buffer -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_DataReceive(UART_TypeDef *UARTx, u8 *Data, u8 DataLength, u8 TimeOut) -{ - u16 wStatus = 0; - while(DataLength--) - wStatus=UART_ByteReceive(UARTx,Data++,TimeOut); - return wStatus; -} - -/******************************************************************************* -* Function Name : UART_9BitDataReceive -* Description : This function gets several 9-bits data from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the buffer where the data will be stored -* Input 3 : The data length -* Input 4 : The time-out value -* Output : The received 9-bit data buffer -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_9BitDataReceive(UART_TypeDef *UARTx, u16 *Data, u8 DataLength, u8 TimeOut) -{ - u16 wStatus = 0; - - while(DataLength--) - wStatus=UART_9BitByteReceive(UARTx,Data++,TimeOut); - return wStatus; -} - -/******************************************************************************* -* Function Name : UART_StringReceive -* Description : This function gets 8-bit data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the selected UART -* Input 2 : A pointer on the buffer where the string will be stored -* Output : The received string -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_StringReceive(UART_TypeDef *UARTx, u8 *Data) -{ - u8 *pSTRING=Data; - u16 wStatus = 0; - - do - { - /* while the UART_RxFIFO is empty */ - while (!((wStatus=UARTx->SR) & (UART_RxHalfFull|UART_RxBufFull))); - - /* then read the RxBUFR */ - *(pSTRING++) = (u8)UARTx->RxBUFR; - - } while((*(pSTRING - 1)!=0x0D)&(*(pSTRING - 1)!='\0')); - - *(pSTRING - 1)='\0'; - - return wStatus; -} - -#ifdef USE_SERIAL_PORT -/******************************************************************************* -* Function Name : sendchar -* Description : This function sends a character to the selected UART. -* Input 1 : A pointer on the character to send. -* Output : None -* Return : None -*******************************************************************************/ -void sendchar( char *ch ) -{ - #ifdef USE_UART0 - #define UARTx UART0 - #endif /* Use_UART0 */ - - #ifdef USE_UART1 - #define UARTx UART1 - #endif /* Use_UART1 */ - - #ifdef USE_UART2 - #define UARTx UART2 - #endif /* Use_UART2 */ - - #ifdef USE_UART3 - #define UARTx UART3 - #endif /* Use_UART3 */ - - UART_ByteSend(UARTx,(u8 *)ch); -} -#endif /* USE_SERIAL_PORT */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/wdg.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/wdg.c deleted file mode 100644 index 14711765..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/wdg.c +++ /dev/null @@ -1,85 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : WDG.c -* Author : MCD Application Team -* Date First Issued : 10/24/2003 -* Description : This file provides all the WDG software functions -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "wdg.h" - -#ifndef abs - #define abs(x) ((x)>0 ? (x) : -(x)) -#endif - -/******************************************************************************* -* Function Name : FindFactors -* Description : Search for the best (a,b) values that fit n = a*b -* with the following constraints: 1<=a<=256, 1<=b<=65536 -* Input 1 : n: the number to decompose -* Input/Output 2 : a: a pointer to the first factor -* Input/Output 3 : b: a pointer to the second factor -* Return : None -*******************************************************************************/ -static void FindFactors(u32 n, u16 *a, u32 *b) -{ - u32 b0; - u16 a0; - long err, err_min=n; - - *a = a0 = ((n-1)/65536ul) + 1; - *b = b0 = n / *a; - - for (; *a <= 256; (*a)++) - { - *b = n / *a; - err = (long)*a * (long)*b - (long)n; - if (abs(err) > (*a / 2)) - { - (*b)++; - err = (long)*a * (long)*b - (long)n; - } - if (abs(err) < abs(err_min)) - { - err_min = err; - a0 = *a; - b0 = *b; - if (err == 0) break; - } - } - - *a = a0; - *b = b0; -} - -/******************************************************************************* -* Function Name : WDG_PeriodValueConfig -* Description : Set the prescaler and counter reload value -* Input : Amount of time (us) needed -* Return : None -*******************************************************************************/ -void WDG_PeriodValueConfig ( u32 Time ) -{ - u16 a; - u32 n, b; - - n = Time * (RCCU_FrequencyValue(RCCU_PCLK) / 1000000); - FindFactors(n, &a, &b); - WDG->PR = a - 1; - WDG->VR = b - 1; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/xti.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/xti.c deleted file mode 100644 index 7755fba4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/libstr71x/xti.c +++ /dev/null @@ -1,88 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : xti.c -* Author : MCD Application Team -* Date First Issued : 06/08/2003 -* Description : This file provides all the XTI software functions. -******************************************************************************** -* History: -* 13/01/2006 : V3.1 -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "xti.h" - -/******************************************************************************* -* Function Name : XTI_Init -* Description : This routine is used to initialize the XTI cell -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void XTI_Init(void) -{ - XTI->SR=0x00; - XTI->MRH=0x00; - XTI->MRL=0x00; - XTI->TRH=0x00; - XTI->TRL=0x00; - XTI->PRH=0x00; - XTI->PRL=0x00; - XTI->CTRL=0x00; /* Write the STOP bit twice to reset the STOP state machine */ - XTI->CTRL=0x00; -} - -/******************************************************************************* -* Function Name : XTI_LineModeConfig -* Description : This routine is used to configure the trigger edge. -* Input 1 : Lines to be configured. -* Input 2 : The trigger edge can be FallingEdge or RisingEdge. -* Output : None -* Return : None -*******************************************************************************/ -void XTI_LineModeConfig(u16 Lines, XTITriggerEdge_TypeDef TriggerEdge) -{ - if(TriggerEdge == XTI_FallingEdge) - { - XTI->TRL &= ~Lines; - XTI->TRH &= ~(Lines>>8)&0x00FF; - } - else - { - XTI->TRL |= Lines; - XTI->TRH |= (Lines>>8)&0x00FF; - } -} - -/******************************************************************************* -* Function Name : XTI_LineConfig -* Description : This routine is used to enable and disable lines interrupts -* Input 1 : Lines to be configured. -* Input 2 : NewState can be ENABLE or DISABLE. -* Output : None -* Return : None -*******************************************************************************/ -void XTI_LineConfig(u16 Lines, FunctionalState NewState) -{ - if(NewState) - { - XTI->MRL |= Lines; - XTI->MRH |= (Lines>>8)&0x00FF; - } - else - { - XTI->MRL &= ~Lines; - XTI->MRH &= ~(Lines>>8)&0x00FF; - } -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/port/port.h deleted file mode 100644 index d78d6e56..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/port/port.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * FreeModbus Libary: STR71x Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -#include "assert.h" -#include "FreeRTOS.h" - -/* work aroung a problem when inline is also defined in 71x_conf.h */ -#ifdef INLINE -#undef INLINE -#endif - -#define INLINE - -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#define ENTER_CRITICAL_SECTION( ) portENTER_CRITICAL( ) -#define EXIT_CRITICAL_SECTION( ) portEXIT_CRITICAL( ) - -typedef char BOOL; - -typedef unsigned char UCHAR; -typedef char CHAR; - -typedef unsigned short USHORT; -typedef short SHORT; - -typedef unsigned long ULONG; -typedef long LONG; - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/port/portevent.c deleted file mode 100644 index d01d7e74..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/port/portevent.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * FreeModbus Libary: STR71x Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- FreeRTOS -----------------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static xQueueHandle xMBPortQueueHdl; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xMBPortQueueHdl = xQueueCreate( 1, sizeof( eMBEventType ) ); - return xMBPortQueueHdl != NULL ? TRUE : FALSE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - portBASE_TYPE xEventSent = pdFALSE; - - xEventSent = xQueueSendFromISR( xMBPortQueueHdl, &eEvent, xEventSent ); - return xEventSent == pdTRUE ? TRUE : FALSE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xQueueReceive( xMBPortQueueHdl, eEvent, portMAX_DELAY ) == pdTRUE ) - { - xEventHappened = TRUE; - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/port/portserial.c deleted file mode 100644 index e99c5393..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/port/portserial.c +++ /dev/null @@ -1,204 +0,0 @@ -/* - * FreeModbus Libary: STR71x Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- FreeRTOS includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- STR71X includes ----------------------------------*/ -#include "gpio.h" -#include "eic.h" -#include "uart.h" -#include "tim.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_UART_DEV ( UART0 ) -#define MB_UART_RX_PORT ( GPIO0 ) -#define MB_UART_RX_PIN ( 8 ) -#define MB_UART_TX_PORT ( GPIO0 ) -#define MB_UART_TX_PIN ( 9 ) -#define MB_UART_IRQ_CH ( UART0_IRQChannel ) -#define MB_UART_TX_QUEUE_LEN ( 8 ) -#define MB_IRQ_PRIORITY ( 1 ) - -/* ----------------------- Static functions ---------------------------------*/ -void prvvMBSerialIRQHandler( void ) __attribute__ ( ( naked ) ); - -static BOOL prvMBPortTXIsEnabled( ); - -static BOOL prvMBPortRXIsEnabled( ); - -/* ----------------------- Start implementation -----------------------------*/ - -BOOL -xMBPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - BOOL xResult = TRUE; - UARTParity_TypeDef eUARTParity; - UARTMode_TypeDef eUARTMode; - - ( void )ucPort; - - switch ( eParity ) - { - case MB_PAR_EVEN: - eUARTParity = UART_EVEN_PARITY; - break; - case MB_PAR_ODD: - eUARTParity = UART_ODD_PARITY; - break; - case MB_PAR_NONE: - eUARTParity = UART_NO_PARITY; - break; - } - - switch ( ucDataBits ) - { - case 7: - if( eParity == MB_PAR_NONE ) - { - /* not supported by our hardware. */ - xResult = FALSE; - } - else - { - eUARTMode = UARTM_7D_P; - } - break; - case 8: - if( eParity == MB_PAR_NONE ) - { - eUARTMode = UARTM_8D; - } - else - { - eUARTMode = UARTM_8D_P; - } - break; - default: - xResult = FALSE; - } - - if( xResult != FALSE ) - { - u32 test = RCCU_FrequencyValue( RCCU_CLK2 ); - - test = RCCU_FrequencyValue( RCCU_RCLK ); - test = RCCU_FrequencyValue( RCCU_PCLK ); - test = RCCU_FrequencyValue( RCCU_FCLK ); - - /* Setup the UART port pins. */ - GPIO_Config( MB_UART_TX_PORT, 1 << MB_UART_TX_PIN, GPIO_AF_PP ); - GPIO_Config( MB_UART_RX_PORT, 1 << MB_UART_RX_PIN, GPIO_IN_TRI_CMOS ); - - /* Configure the UART. */ - UART_OnOffConfig( MB_UART_DEV, ENABLE ); - UART_FifoConfig( MB_UART_DEV, DISABLE ); - UART_FifoReset( MB_UART_DEV, UART_RxFIFO ); - UART_FifoReset( MB_UART_DEV, UART_TxFIFO ); - UART_LoopBackConfig( MB_UART_DEV, DISABLE ); - UART_Config( MB_UART_DEV, ulBaudRate, eUARTParity, UART_1_StopBits, eUARTMode ); - UART_RxConfig( UART0, ENABLE ); - vMBPortSerialEnable( FALSE, FALSE ); - - /* Configure the IEC for the UART interrupts. */ - EIC_IRQChannelPriorityConfig( MB_UART_IRQ_CH, MB_IRQ_PRIORITY ); - EIC_IRQChannelConfig( MB_UART_IRQ_CH, ENABLE ); - } - return xResult; -} - -void -vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ - if( xRxEnable ) - UART_ItConfig( MB_UART_DEV, UART_RxBufFull, ENABLE ); - else - UART_ItConfig( MB_UART_DEV, UART_RxBufFull, DISABLE ); - - if( xTxEnable ) - UART_ItConfig( MB_UART_DEV, UART_TxHalfEmpty, ENABLE ); - else - UART_ItConfig( MB_UART_DEV, UART_TxHalfEmpty, DISABLE ); -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - MB_UART_DEV->TxBUFR = ucByte; - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - *pucByte = MB_UART_DEV->RxBUFR; - return TRUE; -} - -BOOL -prvMBPortTXIsEnabled( ) -{ - return ( MB_UART_DEV->IER & UART_TxHalfEmpty ) == UART_TxHalfEmpty; -} - -BOOL -prvMBPortRXIsEnabled( ) -{ - return ( MB_UART_DEV->IER & UART_RxBufFull ) == UART_RxBufFull; -} - - -void -prvvMBSerialIRQHandler( void ) -{ - portENTER_SWITCHING_ISR( ); - - static BOOL xTaskWokenReceive = FALSE; - static BOOL xTaskWokenTransmit = FALSE; - static USHORT usStatus; - - usStatus = UART_FlagStatus( MB_UART_DEV ); - - if( prvMBPortTXIsEnabled( ) && ( usStatus & UART_TxHalfEmpty ) ) - { - xTaskWokenReceive = pxMBFrameCBTransmitterEmpty( ); - } - if( prvMBPortRXIsEnabled( ) && ( usStatus & UART_RxBufFull ) ) - { - xTaskWokenReceive = pxMBFrameCBByteReceived( ); - } - - /* End the interrupt in the EIC. */ - EIC->IPR |= 1 << EIC_CurrentIRQChannelValue( ); - - portEXIT_SWITCHING_ISR( ( xTaskWokenReceive || xTaskWokenTransmit ) ? pdTRUE : pdFALSE ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/port/porttimer.c deleted file mode 100644 index f7315bb9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/port/porttimer.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * FreeModbus Libary: STR71x Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "assert.h" - -/* ----------------------- FreeRTOS includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- STR71X includes ----------------------------------*/ -#include "gpio.h" -#include "eic.h" -#include "uart.h" -#include "tim.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_TIMER_DEV ( TIM0 ) -#define MB_TIMER_PRESCALER ( 255UL ) -#define MB_TIMER_IRQ_CH ( T0TIMI_IRQChannel ) -#define MB_IRQ_PRIORITY ( 1 ) - -/* Timer ticks are counted in multiples of 50us. Therefore 20000 ticks are - * one second. - */ -#define MB_TIMER_TICKS ( 20000UL ) - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usTimerDeltaOCRA; - -/* ----------------------- Static functions ---------------------------------*/ -void prvvMBTimerIRQHandler( void ) __attribute__ ( ( naked ) ); - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ - /* Calculate output compare value for timer1. */ - usTimerDeltaOCRA = - ( ( RCCU_FrequencyValue( RCCU_PCLK ) / ( MB_TIMER_PRESCALER + 1 ) ) * - usTim1Timerout50us ) / ( MB_TIMER_TICKS ); - - TIM_Init( MB_TIMER_DEV ); - TIM_PrescalerConfig( MB_TIMER_DEV, MB_TIMER_PRESCALER ); - if( usTimerDeltaOCRA > 0 ) - { - TIM_OCMPModeConfig( MB_TIMER_DEV, TIM_CHANNEL_A, usTimerDeltaOCRA, TIM_TIMING, TIM_LOW ); - } - - vMBPortTimersDisable( ); - EIC_IRQChannelConfig( MB_TIMER_IRQ_CH, ENABLE ); - EIC_IRQChannelPriorityConfig( MB_TIMER_IRQ_CH, MB_IRQ_PRIORITY ); - - return TRUE; -} - -void -prvvMBTimerIRQHandler( void ) -{ - portENTER_SWITCHING_ISR( ); - - static portBASE_TYPE xTaskSwitch = pdFALSE; - - if( ( usTimerDeltaOCRA > 0 ) && ( TIM_FlagStatus( MB_TIMER_DEV, TIM_OCFA ) ) ) - { - xTaskSwitch |= pxMBPortCBTimerExpired( ); - TIM_FlagClear( MB_TIMER_DEV, TIM_OCFA ); - } - - /* End the interrupt in the EIC. */ - EIC->IPR |= 1 << EIC_CurrentIRQChannelValue( ); - portEXIT_SWITCHING_ISR( xTaskSwitch ); -} - -void -vMBPortTimersEnable( ) -{ - unsigned portSHORT maskTimFlags = 0; - unsigned portSHORT maskTimIT = 0; - - MB_TIMER_DEV->CNTR = 0; - if( usTimerDeltaOCRA > 0 ) - { - MB_TIMER_DEV->OCAR = usTimerDeltaOCRA; - maskTimFlags |= TIM_OCFA; - maskTimIT |= TIM_OCA_IT; - } - - TIM_FlagClear( MB_TIMER_DEV, maskTimFlags ); - TIM_ITConfig( MB_TIMER_DEV, maskTimIT, ENABLE ); - TIM_CounterConfig( MB_TIMER_DEV, TIM_START ); -} - -void -vMBPortTimersDisable( ) -{ - /* We can always clear both flags. This improves performance. */ - TIM_FlagClear( MB_TIMER_DEV, TIM_OCFA | TIM_OCFB ); - TIM_ITConfig( MB_TIMER_DEV, TIM_OCA_IT | TIM_OCB_IT, DISABLE ); - TIM_CounterConfig( MB_TIMER_DEV, TIM_STOP ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/support/ram71x.ld b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/support/ram71x.ld deleted file mode 100644 index ed0076c2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/support/ram71x.ld +++ /dev/null @@ -1,201 +0,0 @@ -/* - * STR71X Linker Scripts for FreeModbus (RAM) - * Copyright 2005 Anglia Design, Spencer Oliver - * Modifications Copyright (C) 2006 Christian Walter - * - * This demo code and associated components are provided as is and has no - * warranty, implied or otherwise. You are free to use/modify any of the - * provided code at your own risk in your applications with the expressed - * limitation of liability (see below) - * - * LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE - * FOR ANY LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF - * BUSINESS, NOR FOR INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES - * OF ANY KIND WHETHER UNDER THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - * - * $Id: ram71x.ld,v 1.1 2006/11/02 23:14:44 wolti Exp $ - */ - -_STACKSIZE = 256; -_STACKSIZE_IRQ = 256; -_STACKSIZE_FIQ = 256; -_STACKSIZE_SVC = 0; -_STACKSIZE_ABT = 0; -_STACKSIZE_UND = 0; - -MEMORY -{ - DATA (rw) : ORIGIN = 0x20000000, LENGTH = 0x00010000 -} - -SECTIONS -{ - /* first section is .text which is used for code */ - .text : - { - KEEP(*(.vectrom)) - KEEP(*(.init)) - *(.text .text.*) - *(.gnu.linkonce.t.*) - *(.glue_7t .glue_7) - KEEP(*(.fini)) - *(.gcc_except_table) - } >DATA =0 - . = ALIGN(4); - - /* .ctors .dtors are used for c++ constructors/destructors */ - .ctors : - { - PROVIDE(__ctors_start__ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(__ctors_end__ = .); - } >DATA - - .dtors : - { - PROVIDE(__dtors_start__ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(__dtors_end__ = .); - } >DATA - - /* .rodata section which is used for read-only data (constants) */ - .rodata : - { - *(.rodata .rodata.*) - *(.gnu.linkonce.r.*) - } >DATA - . = ALIGN(4); - - _vectext = .; - PROVIDE (vectext = .); - - .vect : AT (_vectext) - { - _vecstart = .; - KEEP(*(.vectram)) - _vecend = .; - } >DATA - - _etext = _vectext + SIZEOF(.vect); - PROVIDE (etext = .); - - /* .data section which is used for initialized data */ - .data : AT (_etext) - { - _data = .; - *(.data .data.*) - *(.gnu.linkonce.d.*) - SORT(CONSTRUCTORS) - } >DATA - . = ALIGN(4); - - _edata = .; - PROVIDE (edata = .); - - /* .bss section which is used for uninitialized data */ - .bss : - { - __bss_start = .; - __bss_start__ = .; - *(.bss .bss.*) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(4); - } >DATA - . = ALIGN(4); - __bss_end__ = .; - - _end = .; - PROVIDE(end = .); - - /* .stack section - user mode stack */ - .stack (NOLOAD) : - { - __stack_start__ = .; - *(.stack) - . = MAX(__stack_start__ + _STACKSIZE , .); - } >DATA - __stack_end__ = __stack_start__ + SIZEOF(.stack); - - /* .stack_irq section */ - .stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) : - { - __stack_irq_start__ = .; - *(.stack_irq) - . = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .); - } >DATA - __stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq); - - /* .stack_fiq section */ - .stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) : - { - __stack_fiq_start__ = .; - *(.stack_fiq) - . = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .); - } >DATA - __stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq); - - /* .stack_svc section */ - .stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) : - { - __stack_svc_start__ = .; - *(.stack_svc) - . = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .); - } >DATA - __stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc); - - /* .stack_abt section */ - .stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) : - { - __stack_abt_start__ = .; - *(.stack_abt) - . = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .); - } >DATA - __stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt); - - /* .stack_und section */ - .stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) : - { - __stack_und_start__ = .; - *(.stack_und) - . = MAX(__stack_und_start__ + _STACKSIZE_UND , .); - } >DATA - __stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und); - - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/support/rom71x.ld b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/support/rom71x.ld deleted file mode 100644 index 068eb1db..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/support/rom71x.ld +++ /dev/null @@ -1,208 +0,0 @@ -/* - * STR71X Linker Scripts for FreeModbus (ROM) - * Copyright 2005 Anglia Design, Spencer Oliver - * Modifications Copyright (C) 2006 Christian Walter - * - * This demo code and associated components are provided as is and has no - * warranty, implied or otherwise. You are free to use/modify any of the - * provided code at your own risk in your applications with the expressed - * limitation of liability (see below) - * - * LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE - * FOR ANY LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF - * BUSINESS, NOR FOR INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES - * OF ANY KIND WHETHER UNDER THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - * - * $Id: rom71x.ld,v 1.1 2006/11/02 23:14:44 wolti Exp $ - */ - -/* Stack Sizes */ -_STACKSIZE = 256; -_STACKSIZE_IRQ = 256; -_STACKSIZE_FIQ = 256; -_STACKSIZE_SVC = 0; -_STACKSIZE_ABT = 0; -_STACKSIZE_UND = 0; - -/* Memory Definitions */ -MEMORY -{ - CODE (rx) : ORIGIN = 0x40000000, LENGTH = 0x00040000 - DATA (rw) : ORIGIN = 0x20000000, LENGTH = 0x00010000 -} - -/* Section Definitions */ -SECTIONS -{ - /* first section is .text which is used for code */ - .text : - { - KEEP(*(.vectrom)) - KEEP(*(.init)) - *(.text .text.*) - *(.gnu.linkonce.t.*) - *(.glue_7t .glue_7) - KEEP(*(.fini)) - *(.gcc_except_table) - } >CODE =0 - . = ALIGN(4); - - /* .ctors .dtors are used for c++ constructors/destructors */ - .ctors : - { - PROVIDE(__ctors_start__ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(__ctors_end__ = .); - } >CODE - - .dtors : - { - PROVIDE(__dtors_start__ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(__dtors_end__ = .); - } >CODE - - /* .rodata section which is used for read-only data (constants) */ - .rodata : - { - *(.rodata .rodata.*) - *(.gnu.linkonce.r.*) - } >CODE - . = ALIGN(4); - - _vectext = .; - PROVIDE (vectext = .); - - .vect : AT (_vectext) - { - _vecstart = .; - KEEP(*(.vectram)) - _vecend = .; - } >DATA - - _etext = _vectext + SIZEOF(.vect); - PROVIDE (etext = .); - - /* .data section which is used for initialized data */ - .data : AT (_etext) - { - _data = .; - *(.data .data.*) - *(.gnu.linkonce.d.*) - SORT(CONSTRUCTORS) - . = ALIGN(4); - *(.fastrun .fastrun.*) - } >DATA - . = ALIGN(4); - - _edata = .; - PROVIDE (edata = .); - - /* .bss section which is used for uninitialized data */ - .bss : - { - __bss_start = .; - __bss_start__ = .; - *(.bss .bss.*) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(4); - } >DATA - . = ALIGN(4); - __bss_end__ = .; - - _end = .; - PROVIDE(end = .); - - /* .stack section - user mode stack */ - .stack (NOLOAD) : - { - __stack_start__ = .; - *(.stack) - . = MAX(__stack_start__ + _STACKSIZE , .); - } >DATA - __stack_end__ = __stack_start__ + SIZEOF(.stack); - - /* .stack_irq section */ - .stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) : - { - __stack_irq_start__ = .; - *(.stack_irq) - . = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .); - } >DATA - __stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq); - - /* .stack_fiq section */ - .stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) : - { - __stack_fiq_start__ = .; - *(.stack_fiq) - . = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .); - } >DATA - __stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq); - - /* .stack_svc section */ - .stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) : - { - __stack_svc_start__ = .; - *(.stack_svc) - . = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .); - } >DATA - __stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc); - - /* .stack_abt section */ - .stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) : - { - __stack_abt_start__ = .; - *(.stack_abt) - . = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .); - } >DATA - __stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt); - - /* .stack_und section */ - .stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) : - { - __stack_und_start__ = .; - *(.stack_und) - . = MAX(__stack_und_start__ + _STACKSIZE_UND , .); - } >DATA - __stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und); - - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/support/target-71.gdb b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/support/target-71.gdb deleted file mode 100644 index e4e8a15e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/support/target-71.gdb +++ /dev/null @@ -1,59 +0,0 @@ -# -# STR71X GDB Target Scripts for FreeModbus -# Copyright 2005 Anglia Design, Spencer Oliver -# Modifications Copyright (C) 2006 Christian Walter -# -# This demo code and associated components are provided as is and has no -# warranty, implied or otherwise. You are free to use/modify any of the -# provided code at your own risk in your applications with the expressed -# limitation of liability (see below) -# -# LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE -# FOR ANY LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF -# BUSINESS, NOR FOR INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES -# OF ANY KIND WHETHER UNDER THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF -# THE POSSIBILITY OF SUCH DAMAGES. -# -# $Id: target-71.gdb,v 1.1 2006/11/02 23:14:44 wolti Exp $ -# - -set remote memory-write-packet-size 1024 -set remote memory-write-packet-size fixed - -set remote memory-read-packet-size 1024 -set remote memory-read-packet-size fixed -set remote hardware-watchpoint-limit 2 -set remote hardware-breakpoint-limit 2 - -# reset and map 0 to internal ram -define ramreset - set *(int*)0xA0000050 = 0x800A - monitor arm7_9 sw_bkpts enable - tb main - echo Mapped internal SRAM at address 0x00000000\n -end - -# reset and map 0 to flash -define romreset - set *(int*)0xA0000050 = 0x8008 - monitor arm7_9 force_hw_bkpts enable - thb main - echo Mapped internal FLASH at address 0x00000000\n -end - -define setup-and-load-rom - reset - romreset -end - -define setup-and-load-ram - reset - ramreset -end - -define reset - monitor reset - monitor sleep 50 - monitor soft_reset_halt -end - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/system/startup.S b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/system/startup.S deleted file mode 100644 index aae5ab42..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/system/startup.S +++ /dev/null @@ -1,251 +0,0 @@ -/* - * STR71X/GCC Startup Scripts for FreeModbus - - * Copyright C) 2005 Anglia Design, Spencer Oliver - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id: startup.S,v 1.1 2006/11/02 23:14:44 wolti Exp $ - */ - -/* ----------------------- Target settings ----------------------------------*/ - .equ FOSC, 4000000 - .equ FRTC, 32768 - -/* ----------------------- ARM7 CPU modes -----------------------------------*/ - .equ MODE_USR, 0x10 - .equ MODE_FIQ, 0x11 - .equ MODE_IRQ, 0x12 - .equ MODE_SVC, 0x13 - .equ MODE_ABT, 0x17 - .equ MODE_UND, 0x1B - .equ MODE_SYS, 0x1F /* available on ARM Arch 4 and later */ - - .equ I_Bit, 0x80 /* when I bit is set, IRQ is disabled */ - .equ F_Bit, 0x40 /* when F bit is set, FIQ is disabled */ - -/* ----------------------- System memory locations --------------------------*/ - .equ EIC_ADDR, 0xFFFFF800 /* EIC base address */ - .equ EIC_ICF_OFF, 0x00 /* Interrupt Control register offset */ - .equ EIC_CIPR_OFF, 0x08 /* Current Interrupt Priority Register offset */ - .equ EIC_IVR_OFF, 0x18 /* Interrupt Vector Register offset */ - .equ EIC_FIR_OFF, 0x1C /* Fast Interrupt Register offset */ - .equ EIC_IER_OFF, 0x20 /* Interrupt Enable Register offset */ - .equ EIC_IPR_OFF, 0x40 /* Interrupt Pending Bit Register offset */ - .equ EIC_SIR0_OFF, 0x60 /* Source Interrupt Register 0 */ - - .equ CPM_ADDR, 0xA0000040 /* CPM Base Address */ - .equ CPM_BC_OFF, 0x10 /* CPM - Boot Configuration Register */ - .equ CPM_BC_FLASH, 0x0000 /* to remap FLASH at 0x0 */ - .equ CPM_BC_RAM, 0x0002 /* to remap RAM at 0x0 */ - .equ CPM_BC_EXTMEM, 0x0003 /* to remap EXTMEM at 0x0 */ - -/* ----------------------- Startup code -------------------------------------*/ - .text - .arm - .section .init, "ax" - - .global _start - .global RCCU_Main_Osc - .global RCCU_RTC_Osc - -/* ----------------------- Exception vectors ( ROM mode with remap ) --------*/ -.if ROM_RUN == 1 -_vector_reset_rom: - ldr pc, =_start_rom - nop - nop - nop - nop - nop - nop - nop - - /* Copy the final vectors from ROM into RAM and map RAM at address - * 0x00000000 */ -_start_rom: - ldr r1, =_vecstart /* r1 = start address from which to copy */ - ldr r3, =_vecend - sub r3, r3, r1 /* r3 = number of bytes to copy */ - ldr r0, =_vectext /* r0 = start address where to copy */ -copy_ram: - ldr r2, [r0], #4 /* Read a word from the source */ - str r2, [r1], #4 /* copy the word to destination */ - subs r3, r3, #4 /* Decrement number of words to copy */ - bne copy_ram - - ldr r1, =CPM_ADDR - ldrh r2, [r1, #CPM_BC_OFF] /* Read BOOTCONF Register */ - bic r2, r2, #0x03 /* Reset the two LSB bits of BOOTCONF Register */ - orr r2, r2, #CPM_BC_RAM /* change the two LSB bits of BOOTCONF Register */ - strh r2, [r1, #CPM_BC_OFF] /* Write BOOTCONF Register */ -.endif - -/* ----------------------- Default reset handler (After remap ) -------------*/ -_start: - ldr pc, =NextInst -NextInst: - nop /* Wait for OSC stabilization */ - nop - nop - nop - nop - nop - nop - nop - nop - - /* Enter Undefined Instruction Mode and set its Stack Pointer */ - msr cpsr_c, #MODE_UND|I_Bit|F_Bit - ldr sp, =__stack_und_end__ - - /* Enter Abort Mode and set its Stack Pointer */ - msr cpsr_c, #MODE_ABT|I_Bit|F_Bit - ldr sp, =__stack_abt_end__ - - /* Enter IRQ Mode and set its Stack Pointer */ - msr cpsr_c, #MODE_IRQ|I_Bit|F_Bit - ldr sp, =__stack_irq_end__ - - /* Enter FIQ Mode and set its Stack Pointer */ - msr cpsr_c, #MODE_FIQ|I_Bit|F_Bit - ldr sp, =__stack_fiq_end__ - - /* Enter Supervisor Mode and set its Stack Pointer */ - msr cpsr_c, #MODE_SVC|I_Bit|F_Bit - ldr sp, =__stack_svc_end__ - - /* Set User Mode Stack pointer but remain in Supervisor Mode */ - ldr r1, =__stack_end__ - mov r2, sp - stmfd r2!, {r1} - ldmfd r2, {sp}^ - - /* Setup a default Stack Limit (when compiled with "-mapcs-stack-check") */ - ldr sl, =__bss_end__ - -/* ----------------------- EIC initialization ------------------------------- -/* - * EIC is initialized with: - * - IRQ disabled - * - FIQ disabled - * - IVR contain the load PC opcode (0xF59FF00) - * - Current priority level equal to 0 - * - All channels are disabled - * - All channels priority equal to 0 - * - All SIR registers contain offset to the related IRQ table entry - */ - -eic_init: - ldr r3, =EIC_ADDR - ldr r4, =0x00000000 - str r4, [r3, #EIC_ICF_OFF] /* Disable FIQ and IRQ */ - str r4, [r3, #EIC_IER_OFF] /* Disable all channels interrupts */ - ldr r4, =0xFFFFFFFF - str r4, [r3, #EIC_IPR_OFF] /* Clear all IRQ pending bits */ - ldr r4, =0x0C - str r4, [r3, #EIC_FIR_OFF] /* Disable FIQ channels and clear FIQ pending bits */ - ldr r4, =0x00000000 - str r4, [r3, #EIC_CIPR_OFF] /* Reset the current priority register */ - ldr r4, =0xE59F0000 - str r4, [r3, #EIC_IVR_OFF] /* Write the LDR pc,pc,#offset instruction code in IVR[31:16] */ - ldr r2, =32 /* 32 Channel to initialize */ - ldr r0, =T0TIMI_Addr /* Read the address of the IRQs address table */ - ldr r1, =0x00000FFF - and r0, r0, r1 - ldr r5, =EIC_SIR0_OFF /* Read SIR0 address */ - sub r4, r0, #8 /* subtract 8 for prefetch */ - ldr r1, =0xF7E8 /* add the offset to the 0x00000000 address(IVR address + 7E8 = 0x00000000) */ - /* 0xF7E8 used to complete the LDR pc,pc,#offset opcode */ - add r1, r4, r1 /* compute the jump offset */ -eic_ini: - mov r4, r1, LSL #16 /* Left shift the result */ - str r4, [r3, r5] /* Store the result in SIRx register */ - add r1, r1, #4 /* Next IRQ address */ - add r5, r5, #4 /* Next SIR */ - subs r2, r2, #1 /* Decrement the number of SIR registers to initialize */ - bne eic_ini /* If more then continue */ - - /* Relocate .data section (Copy from ROM to RAM) */ -.if ROM_RUN == 1 - ldr r1, =_etext - ldr r2, =_data - ldr r3, =_edata -_loop_relocate: - cmp r2, r3 - ldrlo r0, [r1], #4 - strlo r0, [r2], #4 - blo _loop_relocate -.endif - - /* Clear .bss section (Zero init) */ - mov r0, #0 - ldr r1, =__bss_start__ - ldr r2, =__bss_end__ -_loop_clear_bss: - cmp r1, r2 - strlo r0, [r1], #4 - blo _loop_clear_bss - - /* Call C++ constructors */ - ldr r0, =__ctors_start__ - ldr r1, =__ctors_end__ -ctor_loop: - cmp r0, r1 - beq ctor_end - ldr r2, [r0], #4 - stmfd sp!, {r0-r1} - mov lr, pc - mov pc, r2 - ldmfd sp!, {r0-r1} - b ctor_loop -ctor_end: - - /* Need to set up standard file handles */ - - /* if we use debug version of str7lib this will call the init function */ - bl libdebug -libdebug: - - /* Call main */ - bl main - - /* Call destructors */ - ldr r0, =__dtors_start__ - ldr r1, =__dtors_end__ -dtor_loop: - cmp r0, r1 - beq dtor_end - ldr r2, [r0], #4 - stmfd sp!, {r0-r1} - mov lr, pc - mov pc, r2 - ldmfd sp!, {r0-r1} - b dtor_loop -dtor_end: - -/* Return from main, loop forever. */ -exit_loop: - b exit_loop - -/* Fosc values, used by libstr7 */ - -RCCU_Main_Osc: .long FOSC -RCCU_RTC_Osc: .long FRTC - - .weak libdebug - - .end diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/system/vector.S b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/system/vector.S deleted file mode 100644 index 8ea5297c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/system/vector.S +++ /dev/null @@ -1,125 +0,0 @@ -/* - * STR71X vectors for FreeModbus - * Copyright C) 2005 Anglia Design, Spencer Oliver - * Modifications (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id: vector.S,v 1.1 2006/11/02 23:14:44 wolti Exp $ - */ - -/* ----------------------- System memory locations --------------------------*/ -#include "FreeRTOSConfig.h" - -/* ----------------------- System memory locations --------------------------*/ - .equ EIC_ADDR, 0xFFFFF800 /* EIC base address */ - .equ EIC_IVR_OFF, 0x18 /* Interrupt Vector Register offset */ - -/* ----------------------- Start implementation -----------------------------*/ - .global _vector_reset - .global T0TIMI_Addr - -/* ----------------------- Exception vectors --------------------------------*/ - .text - .arm -.if ROM_RUN == 1 - .section .vectram, "ax" -.else - .section .vectrom, "ax" -.endif - -_vector_reset: - ldr pc, reset_handler_address /* Reset Handler */ - ldr pc, undef_handler_address - ldr pc, swi_handler_address - ldr pc, pabort_handler_address - ldr pc, dabort_handler_address - nop - ldr pc, irq_handler_address - ldr pc, fiq_handler_address - -/* ----------------------- Exception handlers address table -----------------*/ - -reset_handler_address: .word _start -undef_handler_address: .word _undef_handler -swi_handler_address: .word vPortYieldProcessor -pabort_handler_address: .word _pabort_handler -dabort_handler_address: .word _dabort_handler -irq_handler_address: .word _irq_handler -fiq_handler_address: .word _fiq_handler - -/* ----------------------- EIC IRQ handlers address table -------------------*/ - -T0TIMI_Addr: .word prvvMBTimerIRQHandler -FLASH_Addr: .word _undef_IRQhandler -RCCU_Addr: .word _undef_IRQhandler -RTC_Addr: .word _undef_IRQhandler -#if configUSE_PREEMPTION == 0 -WDG_Addr: .word vPortNonPreemptiveTick -#else -WDG_Addr: .word vPortPreemptiveTick -#endif -XTI_Addr: .word _undef_IRQhandler -USBHP_Addr: .word _undef_IRQhandler -I2C0ITERR_Addr: .word _undef_IRQhandler -I2C1ITERR_Addr: .word _undef_IRQhandler -UART0_Addr: .word prvvMBSerialIRQHandler -UART1_Addr: .word _undef_IRQhandler -UART2_Aadd: .word _undef_IRQhandler -UART3_Addr: .word _undef_IRQhandler -BSPI0_Addr: .word _undef_IRQhandler -BSPI1_Addr: .word _undef_IRQhandler -I2C0_Addr: .word _undef_IRQhandler -I2C1_Addr: .word _undef_IRQhandler -CAN_Addr: .word _undef_IRQhandler -ADC12_Addr: .word _undef_IRQhandler -T1TIMI_Addr: .word _undef_IRQhandler -T2TIMI_Addr: .word _undef_IRQhandler -T3TIMI_Addr: .word _undef_IRQhandler - .word 0 - .word 0 - .word 0 -HDLC_Addr: .word _undef_IRQhandler -USBLP_Addr: .word _undef_IRQhandler - .word 0 - .word 0 -T0TOI_Addr: .word _undef_IRQhandler -T0OC1_Addr: .word _undef_IRQhandler -T0OC2_Addr: .word _undef_IRQhandler - -/* ----------------------- Default IRQ handlers -----------------------------*/ - -_undef_handler: - b _undef_handler - -_swi_handler: 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b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/tools/str71x_wig.cfg deleted file mode 100644 index 6cfdc81b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XGCC/tools/str71x_wig.cfg +++ /dev/null @@ -1,48 +0,0 @@ -# STR71X OpenOCD configuration for FreeModbus -# -# Copyright (C) 2006 Christian Walter -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -# -# $Id: str71x_wig.cfg,v 1.1 2006/11/02 23:14:44 wolti Exp $ -# - -#daemon configuration -telnet_port 4444 -gdb_port 3333 - -#interface -interface parport -parport_port 0 -parport_cable wiggler -jtag_speed 0 -#use combined on interfaces or targets that can't set TRST/SRST separately -reset_config trst_and_srst - -#jtag scan chain -#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) -jtag_device 4 0x1 0xf 0xe - -#target configuration -daemon_startup reset -#target -#target arm7tdmi -target arm7tdmi little run_and_halt 0 arm7tdmi -run_and_halt_time 0 30 - -working_area str71x 0x2000F000 0x00001000 nobackup -#flash configuration -flash bank str7x 0x40000000 0x00040000 0 0 STR71x 0 -flash bank str7x 0x400C0000 0x00004000 0 0 STR71x 0 diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/FreeRTOSConfig.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/FreeRTOSConfig.h deleted file mode 100644 index a50109ce..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/FreeRTOSConfig.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry. - MCF5235 Port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - *----------------------------------------------------------*/ - -#define configUSE_PREEMPTION 1 -#define configUSE_IDLE_HOOK 0 -#define configUSE_TICK_HOOK 0 -#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 25000000 ) -#define configTICK_RATE_HZ ( ( portTickType ) 1000 ) -#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 128 ) -#define configMAX_TASK_NAME_LEN ( 16 ) -#define configUSE_TRACE_FACILITY 1 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 - -/* Co-routine definitions. */ -#define configUSE_CO_ROUTINES 0 -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) - -/* Set the following definitions to 1 to include the API function, or zero -to exclude the API function. */ - -#define INCLUDE_vTaskPrioritySet 1 -#define INCLUDE_uxTaskPriorityGet 1 -#define INCLUDE_vTaskDelete 1 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 1 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 -#define INCLUDE_xTaskGetCurrentTaskHandle 1 - -#endif /* FREERTOS_CONFIG_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/README.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/README.txt deleted file mode 100644 index cb4612e8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/README.txt +++ /dev/null @@ -1,69 +0,0 @@ - - STR71X PORT with lwIP/PPP - -REQUIREMENTS -============ - -The FreeModbus/lwIP port requires are port of the lwIP TCP/IP stack for -the target platform. This port includes a PPP driver for lwIP together -with suitable drivers for the serial interfaces of the STR71x device. - -The development environment used is Rowley Crossworks 1.5 for ARM but as - they use the GNU compilers any other environment should work too. The - hardware used is STR-P711 [1] development board from Olimex. - - [1] ... STR-P711: http://www.olimex.com/dev/str-p711.html - -USAGE -===== - -Simply compile the software with the Rowley compilers and download it to -the target. The provided configuration "Flash Debug" and "Flash Release" -should work out of the box. The first UART of the STR711 device is used -as stdout where debug messages are sent to. You should connect this one -to a simple terminal program. The second UART is used for the PPP conn- -ection. You must setup a PPP server on this line. Example for Linux can -be found in the utils directory together with a startup script to start -the server. Remember to replace ttyS0 with the line you have connected -the second UART to. - -By default the port using the following settings: - - IP Address (STR71X) : 10.0.10.2 - IP Address (HOST) : 10.0.10.1 - Modbus TCP Port : 502 - -If you have configured everything correctly you should see the following -output from your local PPP daemon. - ------------------------ start /var/log/messages output ---------------------- -Sep 4 21:12:40 pcno-4 pppd[22597]: pppd 2.4.2 started by root, uid 0 -Sep 4 21:12:40 pcno-4 pppd[22597]: Using interface ppp0 -Sep 4 21:12:40 pcno-4 pppd[22597]: Connect: ppp0 <--> /dev/ttyS0 -Sep 4 21:12:44 pcno-4 pppd[22597]: found interface eth0 for proxy arp -Sep 4 21:12:44 pcno-4 pppd[22597]: local IP address 10.0.10.1 -Sep 4 21:12:44 pcno-4 pppd[22597]: remote IP address 10.0.10.2 ------------------------ end /var/log/messages output ------------------------ - -The output from the debug console received by the target should match: - ------------------------ start console output -------------------------------- -ERROR: PPP: new PPP connection established -ERROR: PPP: our IP address = 10.0.10.2 -ERROR: PPP: his IP address = 10.0.10.1 -ERROR: PPP: netmask = 255.255.255.0 -DEBUG: MBTCP-ACCEPT: Accepted new client 10.0.10.1 -DEBUG: MBTCP-RECV: | TID = 0000 | PID = 0000 | LEN = 0006 | UID = 01|| - FUNC = 04 | DATA = 03E70002 | -DEBUG: MBTCP-SENT: | TID = 0000 | PID = 0000 | LEN = 0007 | UID = 01|| - FUNC = 04 | DATA = 04AC610001 | -DEBUG: MBTCP-RECV: | TID = 0000 | PID = 0000 | LEN = 0006 | UID = 01|| - FUNC = 04 | DATA = 03E70002 | -DEBUG: MBTCP-SENT: | TID = 0000 | PID = 0000 | LEN = 0007 | UID = 01|| - FUNC = 04 | DATA = 04B0420001 | ------------------------ end console output ---------------------------------- - -$Id: README.txt,v 1.1 2006/09/04 19:33:58 wolti Exp $ - -STR71X + lwIP/PPP port - Copyright (c) 2006 Christian Walter. - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/crt0.s b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/crt0.s deleted file mode 100644 index 7ab4eec4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/crt0.s +++ /dev/null @@ -1,177 +0,0 @@ -/***************************************************************************** - * Copyright (c) 2001, 2002 Rowley Associates Limited. * - * * - * This file may be distributed under the terms of the License Agreement * - * provided with this software. * - * * - * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE * - * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. * - *****************************************************************************/ - .section .init, "ax" - .code 32 - .align 0 - - .weak _start - .global __start - .global __gccmain - .extern main - .extern exit - -/***************************************************************************** - * Function : _start * - * Description : Main entry point and startup code for C system. * - *****************************************************************************/ -_start: -__start: - mrs r0, cpsr - bic r0, r0, #0x1F - - /* Setup stacks */ - orr r1, r0, #0x1B /* Undefined mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_und_end__ - - orr r1, r0, #0x17 /* Abort mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_abt_end__ - - orr r1, r0, #0x12 /* IRQ mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_irq_end__ - - orr r1, r0, #0x11 /* FIQ mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_fiq_end__ - - orr r1, r0, #0x13 /* Supervisor mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_svc_end__ -#ifdef SUPERVISOR_START - /* Start application in supervisor mode */ - ldr r1, =__stack_end__ /* Setup user/system mode stack */ - mov r2, sp - stmfd r2!, {r1} - ldmfd r2, {sp}^ -#else - /* Start application in system mode */ - orr r1, r0, #0x1F /* System mode */ - msr cpsr_cxsf, r1 - ldr sp, =__stack_end__ -#endif - - /* Copy from initialised data section to data section (if necessary). */ - ldr r0, =__data_load_start__ - ldr r1, =__data_start__ - cmp r0, r1 - beq copy_data_end - - ldr r2, =__data_end__ - subs r2, r2, r1 - beq copy_data_end - -copy_data_loop: - ldrb r3, [r0], #+1 - strb r3, [r1], #+1 - subs r2, r2, #1 - bne copy_data_loop -copy_data_end: - - /* Copy from initialised text section to text section (if necessary). */ - ldr r0, =__text_load_start__ - ldr r1, =__text_start__ - cmp r0, r1 - beq copy_text_end - - ldr r2, =__text_end__ - subs r2, r2, r1 - beq copy_text_end - -copy_text_loop: - ldrb r3, [r0], #+1 - strb r3, [r1], #+1 - subs r2, r2, #1 - bne copy_text_loop -copy_text_end: - - /* Copy from initialised fast_text section to fast_text section (if necessary). */ - ldr r0, =__fast_load_start__ - ldr r1, =__fast_start__ - cmp r0, r1 - beq copy_fast_end - - ldr r2, =__fast_end__ - subs r2, r2, r1 - beq copy_fast_end - -copy_fast_loop: - ldrb r3, [r0], #+1 - strb r3, [r1], #+1 - subs r2, r2, #1 - bne copy_fast_loop -copy_fast_end: - - /* Zero the bss. */ - ldr r0, =__bss_start__ - ldr r1, =__bss_end__ - mov r2, #0 -zero_bss_loop: - cmp r0, r1 - beq zero_bss_end - strb r2, [r0], #+1 - b zero_bss_loop -zero_bss_end: - - /* Initialise the heap */ - ldr r0, = __heap_start__ - ldr r1, = __heap_end__ - sub r1, r1, r0 /* r1 = r1-r0 */ - mov r2, #0 - str r2, [r0], #+4 /* *r0++ = 0 */ - str r1, [r0] /* *r0 = __heap_end__ - __heap_start__ */ - - /* Call constructors */ - ldr r0, =__ctors_start__ - ldr r1, =__ctors_end__ -ctor_loop: - cmp r0, r1 - beq ctor_end - ldr r2, [r0], #+4 - stmfd sp!, {r0-r1} - mov lr, pc - mov pc, r2 - ldmfd sp!, {r0-r1} - b ctor_loop -ctor_end: - - /* Setup initial call frame */ - mov lr, #4 - mov r12, sp - stmfd sp!, {r11-r12, lr-pc} - sub r11, r12, #0x00000004 - -start: - /* Jump to main entry point */ - mov r0, #0 - mov r1, #0 - ldr r2, =main - bx r2 - - /* Call destructors */ - ldr r0, =__dtors_start__ - ldr r1, =__dtors_end__ - -dtor_loop: - cmp r0, r1 - beq dtor_end - ldr r2, [r0], #+4 - stmfd sp!, {r0-r1} - mov lr, pc - mov pc, r2 - ldmfd sp!, {r0-r1} - b dtor_loop -dtor_end: - - /* Return from main, loop forever. */ -exit_loop: - b exit_loop - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/demo.c deleted file mode 100644 index ad5d9ce6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/demo.c +++ /dev/null @@ -1,320 +0,0 @@ -/* - * FreeModbus Libary: STR71XTCP Demo Application - * Copyright (C) 2006 Christian Walter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include - -/* ----------------------- lwIP includes ------------------------------------*/ -#include "lwip/opt.h" -#include "lwip/sio.h" -#include "lwip/sys.h" -#include "lwip/inet.h" -#include "ppp/ppp.h" -#include "arch/cc.h" - -/* ----------------------- FreeRTOS includes --------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "eic.h" -#include "netif/serial.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define mainMB_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 ) -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 -#define REG_HOLDING_START 2000 -#define REG_HOLDING_NREGS 130 - -#define PPP_AUTH_ENABLED 1 -#define PPP_USER "freemodbus" -#define PPP_PASS "insecure" - -/* ----------------------- Type definitions ---------------------------------*/ -typedef enum -{ - CONNECTING, CONNECTED, DISCONNECT -} ePPPThreadControl; - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; -static USHORT usRegHoldingStart = REG_HOLDING_START; -static USHORT usRegHoldingBuf[REG_HOLDING_NREGS]; -static ePPPThreadControl ePPPThrCtl; - - -/* ----------------------- Static functions ---------------------------------*/ -static void vlwIPInit( void ); -static void vMBServerTask( void *arg ); -static void vPPPStatusCB( void *ctx, int errCode, void *arg ); - -sio_fd_t stdio_fd; -sio_fd_t ppp_fd; - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - EIC_Init( ); - EIC_IRQConfig( ENABLE ); - - /* Use UART0 as stdin/stdout for debug purposes. */ - if( ( stdio_fd = sio_open_new( 0, 115200, 8, SIO_STOP_1, SIO_PAR_NONE ) ) == SIO_FD_NULL ) - { - /* nothing we can do here - no stdout means no logging. */ - } - else - { - /* Initialize lwIP and its interface layer. */ - vlwIPInit( ); - - /* Use UART1 as PPP device. */ - if( ( ppp_fd = sio_open_new( 1, 115200, 8, SIO_STOP_1, SIO_PAR_NONE ) ) == SIO_FD_NULL ) - { - vMBPortLog( MB_LOG_ERROR, "PPP", "can't open PPP device!\r\n" ); - } - else if( sys_thread_new( vMBServerTask, NULL, mainMB_TASK_PRIORITY ) == SYS_THREAD_NULL ) - { - vMBPortLog( MB_LOG_ERROR, "MB-INIT", "can't start modbus task!\r\n" ); - } - else - { - vMBPortLog( MB_LOG_INFO, "MB-INIT", "FreeModbus demo application starting...\r\n" ); - /* Everything ready. Start the scheduler. */ - vTaskStartScheduler( ); - } - } - - for( ;; ); -} - -void -vlwIPInit( void ) -{ - sys_init( ); - mem_init( ); - memp_init( ); - pbuf_init( ); - netif_init( ); - ip_init( ); - tcpip_init( NULL, NULL ); -} - -void -vMBServerTask( void *arg ) -{ - eMBErrorCode xStatus; - ePPPThreadControl ePPPThrCtlCur; - int ppp_con_fd; - portTickType xTicks; - - pppInit( ); - if( PPP_AUTH_ENABLED ) - { - pppSetAuth( PPPAUTHTYPE_PAP, PPP_USER, PPP_PASS ); - } - else - { - pppSetAuth( PPPAUTHTYPE_NONE, NULL, NULL ); - } - do - { - vPortEnterCritical( ); - ePPPThrCtl = CONNECTING; - vPortExitCritical( ); - if( ( ppp_con_fd = pppOpen( ppp_fd, vPPPStatusCB, NULL ) ) == PPPERR_NONE ) - { - /* Check every 50ms if the state of the connecton has changed. - * This could either mean it was aborted or successful. - */ - do - { - vTaskDelay( ( portTickType ) ( 50UL / portTICK_RATE_MS ) ); - vPortEnterCritical( ); - ePPPThrCtlCur = ePPPThrCtl; - vPortExitCritical( ); - } - while( ePPPThrCtlCur == CONNECTING ); - - if( ePPPThrCtlCur == CONNECTED ) - { - if( eMBTCPInit( MB_TCP_PORT_USE_DEFAULT ) != MB_ENOERR ) - { - vMBPortLog( MB_LOG_ERROR, "PPP", "can't initalize modbus stack!\r\n" ); - } - else if( eMBEnable( ) != MB_ENOERR ) - { - vMBPortLog( MB_LOG_ERROR, "PPP", "can't enable modbus stack!\r\n" ); - } - else - { - do - { - vPortEnterCritical( ); - ePPPThrCtlCur = ePPPThrCtl; - vPortExitCritical( ); - - /* Application code here. */ - xStatus = eMBPoll( ); - - /* Update input registers with the current system tick. */ - xTicks = xTaskGetTickCount( ); - - /* Note: little endian stuff */ - usRegInputBuf[0] = ( USHORT ) ( xTicks ); - usRegInputBuf[1] = ( USHORT ) ( xTicks >> 16UL ); - - } - while( ( xStatus == MB_ENOERR ) && ( ePPPThrCtlCur == CONNECTED ) ); - - ( void )eMBDisable( ); - ( void )eMBClose( ); - } - } - /* FIXME: pppClose bugs because thread is not stopped. */ - /* Connection has been closed. */ - pppClose( ppp_con_fd ); - } - - /* Wait 1s until reopening the connection. */ - vTaskDelay( ( portTickType ) ( 1000UL / portTICK_RATE_MS ) ); - } - while( pdTRUE ); -} - -void -vPPPStatusCB( void *ctx, int err, void *arg ) -{ - /* Imported from ipcp.c */ - extern char *_inet_ntoa( u32_t n ); - - ePPPThreadControl ePPPThrCtlNew; - struct ppp_addrs *ppp_addrs; - - switch ( err ) - { - /* No error. */ - case PPPERR_NONE: - ePPPThrCtlNew = CONNECTED; - ppp_addrs = arg; - vMBPortLog( MB_LOG_INFO, "PPP", "new PPP connection established\r\n" ); - vMBPortLog( MB_LOG_INFO, "PPP", " our IP address = %s\r\n", - _inet_ntoa( ppp_addrs->our_ipaddr.addr ) ); - vMBPortLog( MB_LOG_INFO, "PPP", " his IP address = %s\r\n", - _inet_ntoa( ppp_addrs->his_ipaddr.addr ) ); - vMBPortLog( MB_LOG_INFO, "PPP", " netmask = %s\r\n", - _inet_ntoa( ppp_addrs->netmask.addr ) ); - break; - default: - ePPPThrCtlNew = DISCONNECT; - vMBPortLog( MB_LOG_ERROR, "PPP", "PPP connection died ( err = %d )\r\n", err ); - break; - } - vPortEnterCritical( ); - ePPPThrCtl = ePPPThrCtlNew; - vPortExitCritical( ); -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_HOLDING_START ) && - ( usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegHoldingStart ); - switch ( eMode ) - { - /* Pass current register values to the protocol stack. */ - case MB_REG_READ: - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( UCHAR ) ( usRegHoldingBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( UCHAR ) ( usRegHoldingBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - break; - - /* Update current register values with new values from the - * protocol stack. */ - case MB_REG_WRITE: - while( usNRegs > 0 ) - { - usRegHoldingBuf[iRegIndex] = *pucRegBuffer++ << 8; - usRegHoldingBuf[iRegIndex] |= *pucRegBuffer++; - iRegIndex++; - usNRegs--; - } - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/demo.hzp b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/demo.hzp deleted file mode 100644 index e0e7599d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/demo.hzp +++ /dev/null @@ -1,225 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/demo.hzs b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/demo.hzs deleted file mode 100644 index 05e92421..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/demo.hzs +++ /dev/null @@ -1,74 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/croutine.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/croutine.c deleted file mode 100644 index 5906f153..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/croutine.c +++ /dev/null @@ -1,342 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/* Lists for ready and blocked co-routines. --------------------*/ -static xList pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ -static xList xDelayedCoRoutineList1; /*< Delayed co-routines. */ -static xList xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ -static xList * pxDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used. */ -static xList * pxOverflowDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ -static xList xPendingReadyList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ - -/* Other file private variables. --------------------------------*/ -corCRCB * pxCurrentCoRoutine = NULL; -static unsigned portBASE_TYPE uxTopCoRoutineReadyPriority = 0; -static portTickType xCoRoutineTickCount = 0; - -/* The initial state of the co-routine when it is created. */ -#define corINITIAL_STATE ( 0 ) - -/* - * Place the co-routine represented by pxCRCB into the appropriate ready queue - * for the priority. It is inserted at the end of the list. - * - * This macro accesses the co-routine ready lists and therefore must not be - * used from within an ISR. - */ -#define prvAddCoRoutineToReadyQueue( pxCRCB ) \ -{ \ - if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \ - { \ - uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \ -} - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first co-routine. - */ -static void prvInitialiseCoRoutineLists( void ); - -/* - * Co-routines that are readied by an interrupt cannot be placed directly into - * the ready lists (there is no mutual exclusion). Instead they are placed in - * in the pending ready list in order that they can later be moved to the ready - * list by the co-routine scheduler. - */ -static inline void prvCheckPendingReadyList( void ); - -/* - * Macro that looks at the list of co-routines that are currently delayed to - * see if any require waking. - * - * Co-routines are stored in the queue in the order of their wake time - - * meaning once one co-routine has been found whose timer has not expired - * we need not look any further down the list. - */ -static inline void prvCheckDelayedList( void ); - -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex ) -{ -signed portBASE_TYPE xReturn; -corCRCB *pxCoRoutine; - - /* Allocate the memory that will store the co-routine control block. */ - pxCoRoutine = ( corCRCB * ) pvPortMalloc( sizeof( corCRCB ) ); - if( pxCoRoutine ) - { - /* If pxCurrentCoRoutine is NULL then this is the first co-routine to - be created and the co-routine data structures need initialising. */ - if( pxCurrentCoRoutine == NULL ) - { - pxCurrentCoRoutine = pxCoRoutine; - prvInitialiseCoRoutineLists(); - } - - /* Check the priority is within limits. */ - if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES ) - { - uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1; - } - - /* Fill out the co-routine control block from the function parameters. */ - pxCoRoutine->uxState = corINITIAL_STATE; - pxCoRoutine->uxPriority = uxPriority; - pxCoRoutine->uxIndex = uxIndex; - pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; - - /* Initialise all the other co-routine control block parameters. */ - vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) ); - vListInitialiseItem( &( pxCoRoutine->xEventListItem ) ); - - /* Set the co-routine control block as a link back from the xListItem. - This is so we can get back to the containing CRCB from a generic item - in a list. */ - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine ); - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - - /* Now the co-routine has been initialised it can be added to the ready - list at the correct priority. */ - prvAddCoRoutineToReadyQueue( pxCoRoutine ); - - xReturn = pdPASS; - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList ) -{ -portTickType xTimeToWake; - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xCoRoutineTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xCoRoutineTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - - if( pxEventList ) - { - /* Also add the co-routine to an event list. If this is done then the - function must be called with interrupts disabled. */ - vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -static inline void prvCheckPendingReadyList( void ) -{ - /* Are there any co-routines waiting to get moved to the ready list? These - are co-routines that have been readied by an ISR. The ISR cannot access - the ready lists itself. */ - while( !listLIST_IS_EMPTY( &xPendingReadyList ) ) - { - corCRCB *pxUnblockedCRCB; - - /* The pending ready list can be accessed by an ISR. */ - portDISABLE_INTERRUPTS(); - { - pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyList) ); - vListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - } - portENABLE_INTERRUPTS(); - - vListRemove( &( pxUnblockedCRCB->xGenericListItem ) ); - prvAddCoRoutineToReadyQueue( pxUnblockedCRCB ); - } -} -/*-----------------------------------------------------------*/ - -static inline void prvCheckDelayedList( void ) -{ -static portTickType xLastTickCount, xPassedTicks; -corCRCB *pxCRCB; - - xPassedTicks = xTaskGetTickCount() - xLastTickCount; - while( xPassedTicks ) - { - xCoRoutineTickCount++; - xPassedTicks--; - - /* If the tick count has overflowed we need to swap the ready lists. */ - if( xCoRoutineTickCount == 0 ) - { - xList * pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. If there are - any items in pxDelayedCoRoutineList here then there is an error! */ - pxTemp = pxDelayedCoRoutineList; - pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; - pxOverflowDelayedCoRoutineList = pxTemp; - } - - /* See if this tick has made a timeout expire. */ - while( ( pxCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList ) ) != NULL ) - { - if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) ) - { - /* Timeout not yet expired. */ - break; - } - - portDISABLE_INTERRUPTS(); - { - /* The event could have occurred just before this critical - section. If this is the case then the generic list item will - have been moved to the pending ready list and the following - line is still valid. Also the pvContainer parameter will have - been set to NULL so the following lines are also valid. */ - vListRemove( &( pxCRCB->xGenericListItem ) ); - - /* Is the co-routine waiting on an event also? */ - if( pxCRCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxCRCB->xEventListItem ) ); - } - } - portENABLE_INTERRUPTS(); - - prvAddCoRoutineToReadyQueue( pxCRCB ); - } - } - - xLastTickCount = xCoRoutineTickCount; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineSchedule( void ) -{ - /* See if any co-routines readied by events need moving to the ready lists. */ - prvCheckPendingReadyList(); - - /* See if any delayed co-routines have timed out. */ - prvCheckDelayedList(); - - /* Find the highest priority queue that contains ready co-routines. */ - while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) ) - { - if( uxTopCoRoutineReadyPriority == 0 ) - { - /* No more co-routines to check. */ - return; - } - --uxTopCoRoutineReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines - of the same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ); - - /* Call the co-routine. */ - ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex ); - - return; -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseCoRoutineLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyCoRoutineLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedCoRoutineList1 ); - vListInitialise( ( xList * ) &xDelayedCoRoutineList2 ); - vListInitialise( ( xList * ) &xPendingReadyList ); - - /* Start with pxDelayedCoRoutineList using list1 and the - pxOverflowDelayedCoRoutineList using list2. */ - pxDelayedCoRoutineList = &xDelayedCoRoutineList1; - pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList ) -{ -corCRCB *pxUnblockedCRCB; -signed portBASE_TYPE xReturn; - - /* This function is called from within an interrupt. It can only access - event lists and the pending ready list. */ - pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedCRCB->xEventListItem ) ); - - if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority ) - { - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/FreeRTOS.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/FreeRTOS.h deleted file mode 100644 index 0d0f7d28..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/FreeRTOS.h +++ /dev/null @@ -1,111 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef INC_FREERTOS_H -#define INC_FREERTOS_H - - -/* - * Include the generic headers required for the FreeRTOS port being used. - */ -#include - -/* Basic FreeRTOS definitions. */ -#include "projdefs.h" - -/* Application specific configuration options. */ -#include "FreeRTOSConfig.h" - -/* Definitions specific to the port being used. */ -#include "portable.h" - - - - - - - -/* - * Check all the required application specific macros have been defined. - * These macros are application specific and (as downloaded) are defined - * within FreeRTOSConfig.h. - */ - -#ifndef configUSE_PREEMPTION - #error Missing definition: configUSE_PREEMPTION should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_IDLE_HOOK - #error Missing definition: configUSE_IDLE_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_TICK_HOOK - #error Missing definition: configUSE_TICK_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_CO_ROUTINES - #error Missing definition: configUSE_CO_ROUTINES should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskPrioritySet - #error Missing definition: INCLUDE_vTaskPrioritySet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_uxTaskPriorityGet - #error Missing definition: INCLUDE_uxTaskPriorityGet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelete - #error Missing definition: INCLUDE_vTaskDelete should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskCleanUpResources - #error Missing definition: INCLUDE_vTaskCleanUpResources should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskSuspend - #error Missing definition: INCLUDE_vTaskSuspend should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelayUntil - #error Missing definition: INCLUDE_vTaskDelayUntil should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef INCLUDE_vTaskDelay - #error Missing definition: INCLUDE_vTaskDelay should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_16_BIT_TICKS - #error Missing definition: configUSE_16_BIT_TICKS should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/croutine.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/croutine.h deleted file mode 100644 index 1e85c807..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/croutine.h +++ /dev/null @@ -1,713 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ -#ifndef CO_ROUTINE_H -#define CO_ROUTINE_H - -#include "list.h" - -/* Used to hide the implementation of the co-routine control block. The -control block structure however has to be included in the header due to -the macro implementation of the co-routine functionality. */ -typedef void * xCoRoutineHandle; - -/* Defines the prototype to which co-routine functions must conform. */ -typedef void (*crCOROUTINE_CODE)( xCoRoutineHandle, unsigned portBASE_TYPE ); - -typedef struct corCoRoutineControlBlock -{ - crCOROUTINE_CODE pxCoRoutineFunction; - xListItem xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the CRCB in event lists. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ - unsigned portBASE_TYPE uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ - unsigned portSHORT uxState; /*< Used internally by the co-routine implementation. */ -} corCRCB; /* Co-routine control block. Note must be identical in size down to uxPriority with tskTCB. */ - -/** - * croutine. h - *

- portBASE_TYPE xCoRoutineCreate(

-                                 crCOROUTINE_CODE pxCoRoutineCode,

-                                 unsigned portBASE_TYPE uxPriority,

-                                 unsigned portBASE_TYPE uxIndex

-                               );
- * - * Create a new co-routine and add it to the list of co-routines that are - * ready to run. - * - * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine - * functions require special syntax - see the co-routine section of the WEB - * documentation for more information. - * - * @param uxPriority The priority with respect to other co-routines at which - * the co-routine will run. - * - * @param uxIndex Used to distinguish between different co-routines that - * execute the same function. See the example below and the co-routine section - * of the WEB documentation for further information. - * - * @return pdPASS if the co-routine was successfully created and added to a ready - * list, otherwise an error code defined with ProjDefs.h. - * - * Example usage: - 

- // Co-routine to be created.

- void vFlashCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- // This may not be necessary for const variables.

- static const char cLedToFlash[ 2 ] = { 5, 6 };

- static const portTickType xTimeToDelay[ 2 ] = { 200, 400 };

-

-     // Must start every co-routine with a call to crSTART();

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-         // This co-routine just delays for a fixed period, then toggles

-         // an LED.  Two co-routines are created using this function, so

-         // the uxIndex parameter is used to tell the co-routine which

-         // LED to flash and how long to delay.  This assumes xQueue has

-         // already been created.

-         vParTestToggleLED( cLedToFlash[ uxIndex ] );

-         crDELAY( xHandle, uxFlashRates[ uxIndex ] );

-     }

-

-     // Must end every co-routine with a call to crEND();

-     crEND();

- }

-

- // Function that creates two co-routines.

- void vOtherFunction( void )

- {

- unsigned char ucParameterToPass;

- xTaskHandle xHandle;

-		

-     // Create two co-routines at priority 0.  The first is given index 0

-     // so (from the code above) toggles LED 5 every 200 ticks.  The second

-     // is given index 1 so toggles LED 6 every 400 ticks.

-     for( uxIndex = 0; uxIndex < 2; uxIndex++ )

-     {

-         xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );

-     }

- }

-
- * \defgroup xCoRoutineCreate xCoRoutineCreate - * \ingroup Tasks - */ -signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex ); - - -/** - * croutine. h - *

- void vCoRoutineSchedule( void );
- * - * Run a co-routine. - * - * vCoRoutineSchedule() executes the highest priority co-routine that is able - * to run. The co-routine will execute until it either blocks, yields or is - * preempted by a task. Co-routines execute cooperatively so one - * co-routine cannot be preempted by another, but can be preempted by a task. - * - * If an application comprises of both tasks and co-routines then - * vCoRoutineSchedule should be called from the idle task (in an idle task - * hook). - * - * Example usage: - 

- // This idle task hook will schedule a co-routine each time it is called.

- // The rest of the idle task will execute between co-routine calls.

- void vApplicationIdleHook( void )

- {

-	vCoRoutineSchedule();

- }

-

- // Alternatively, if you do not require any other part of the idle task to

- // execute, the idle task hook can call vCoRoutineScheduler() within an

- // infinite loop.

- void vApplicationIdleHook( void )

- {

-    for( ;; )

-    {

-        vCoRoutineSchedule();

-    }

- }

-
- * \defgroup vCoRoutineSchedule vCoRoutineSchedule - * \ingroup Tasks - */ -void vCoRoutineSchedule( void ); - -/** - * croutine. h - * 

- crSTART( xCoRoutineHandle xHandle );
- * - * This macro MUST always be called at the start of a co-routine function. - * - * Example usage: - 

- // Co-routine to be created.

- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- static portLONG ulAVariable;

-

-     // Must start every co-routine with a call to crSTART();

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-          // Co-routine functionality goes here.

-     }

-

-     // Must end every co-routine with a call to crEND();

-     crEND();

- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crSTART( pxCRCB ) switch( ( ( corCRCB * )pxCRCB )->uxState ) { case 0: - -/** - * croutine. h - * 

- crEND();
- * - * This macro MUST always be called at the end of a co-routine function. - * - * Example usage: - 

- // Co-routine to be created.

- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- static portLONG ulAVariable;

-

-     // Must start every co-routine with a call to crSTART();

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-          // Co-routine functionality goes here.

-     }

-

-     // Must end every co-routine with a call to crEND();

-     crEND();

- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crEND() } - -/* - * These macros are intended for internal use by the co-routine implementation - * only. The macros should not be used directly by application writers. - */ -#define crSET_STATE0( xHandle ) ( ( corCRCB * )xHandle)->uxState = (__LINE__ * 2); return; case (__LINE__ * 2): -#define crSET_STATE1( xHandle ) ( ( corCRCB * )xHandle)->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1): - -/** - * croutine. h - *

- crDELAY( xCoRoutineHandle xHandle, portTickType xTicksToDelay );
- * - * Delay a co-routine for a fixed period of time. - * - * crDELAY can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * @param xHandle The handle of the co-routine to delay. This is the xHandle - * parameter of the co-routine function. - * - * @param xTickToDelay The number of ticks that the co-routine should delay - * for. The actual amount of time this equates to is defined by - * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_RATE_MS - * can be used to convert ticks to milliseconds. - * - * Example usage: - 

- // Co-routine to be created.

- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- // This may not be necessary for const variables.

- // We are to delay for 200ms.

- static const xTickType xDelayTime = 200 / portTICK_RATE_MS;

-

-     // Must start every co-routine with a call to crSTART();

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-        // Delay for 200ms.

-        crDELAY( xHandle, xDelayTime );

-

-        // Do something here.

-     }

-

-     // Must end every co-routine with a call to crEND();

-     crEND();

- }
- * \defgroup crDELAY crDELAY - * \ingroup Tasks - */ -#define crDELAY( xHandle, xTicksToDelay ) \ - if( xTicksToDelay > 0 ) \ - { \ - vCoRoutineAddToDelayedList( xTicksToDelay, NULL ); \ - } \ - crSET_STATE0( xHandle ); - -/** - * 

- crQUEUE_SEND(

-                  xCoRoutineHandle xHandle,

-                  xQueueHandle pxQueue,

-                  void *pvItemToQueue,

-                  portTickType xTicksToWait,

-                  portBASE_TYPE *pxResult

-             )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_SEND can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue on which the data will be posted. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvItemToQueue A pointer to the data being posted onto the queue. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied from pvItemToQueue into the queue - * itself. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for space to become available on the queue, should space not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_RATE_MS can be used to convert ticks to milliseconds (see example - * below). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully posted onto the queue, otherwise it will be set to an - * error defined within ProjDefs.h. - * - * Example usage: - 

- // Co-routine function that blocks for a fixed period then posts a number onto

- // a queue.

- static void prvCoRoutineFlashTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- static portBASE_TYPE xNumberToPost = 0;

- static portBASE_TYPE xResult;

-

-    // Co-routines must begin with a call to crSTART().

-    crSTART( xHandle );

-

-    for( ;; )

-    {

-        // This assumes the queue has already been created.

-        crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );

-

-        if( xResult != pdPASS )

-        {

-            // The message was not posted!

-        }

-

-        // Increment the number to be posted onto the queue.

-        xNumberToPost++;

-

-        // Delay for 100 ticks.

-        crDELAY( xHandle, 100 );

-    }

-

-    // Co-routines must end with a call to crEND().

-    crEND();

- }
- * \defgroup crQUEUE_SEND crQUEUE_SEND - * \ingroup Tasks - */ -#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ -{ \ - *pxResult = xQueueCRSend( pxQueue, pvItemToQueue, xTicksToWait ); \ - if( *pxResult == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( xHandle ); \ - *pxResult = xQueueCRSend( pxQueue, pvItemToQueue, 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( xHandle ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 

-  crQUEUE_RECEIVE(

-                     xCoRoutineHandle xHandle,

-                     xQueueHandle pxQueue,

-                     void *pvBuffer,

-                     portTickType xTicksToWait,

-                     portBASE_TYPE *pxResult

-                 )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_RECEIVE can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue from which the data will be received. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvBuffer The buffer into which the received item is to be copied. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied into pvBuffer. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for data to become available from the queue, should data not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_RATE_MS can be used to convert ticks to milliseconds (see the - * crQUEUE_SEND example). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully retrieved from the queue, otherwise it will be set to - * an error code as defined within ProjDefs.h. - * - * Example usage: - 

- // A co-routine receives the number of an LED to flash from a queue.  It

- // blocks on the queue until the number is received.

- static void prvCoRoutineFlashWorkTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // Variables in co-routines must be declared static if they must maintain value across a blocking call.

- static portBASE_TYPE xResult;

- static unsigned portBASE_TYPE uxLEDToFlash;

-

-    // All co-routines must start with a call to crSTART().

-    crSTART( xHandle );

-

-    for( ;; )

-    {

-        // Wait for data to become available on the queue.

-        crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );

-

-        if( xResult == pdPASS )

-        {

-            // We received the LED to flash - flash it!

-            vParTestToggleLED( uxLEDToFlash );

-        }

-    }

-

-    crEND();

- }
- * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ -{ \ - *pxResult = xQueueCRReceive( pxQueue, pvBuffer, xTicksToWait ); \ - if( *pxResult == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( xHandle ); \ - *pxResult = xQueueCRReceive( pxQueue, pvBuffer, 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( xHandle ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 

-  crQUEUE_SEND_FROM_ISR(

-                            xQueueHandle pxQueue,

-                            void *pvItemToQueue,

-                            portBASE_TYPE xCoRoutinePreviouslyWoken

-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue - * that is being used from within a co-routine. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. - * - * @return pdTRUE if a co-routine was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 

- // A co-routine that blocks on a queue waiting for characters to be received.

- static void vReceivingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- portCHAR cRxedChar;

- portBASE_TYPE xResult;

-

-     // All co-routines must start with a call to crSTART().

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-         // Wait for data to become available on the queue.  This assumes the

-         // queue xCommsRxQueue has already been created!

-         crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );

-

-         // Was a character received?

-         if( xResult == pdPASS )

-         {

-             // Process the character here.

-         }

-     }

-

-     // All co-routines must end with a call to crEND().

-     crEND();

- }

-

- // An ISR that uses a queue to send characters received on a serial port to

- // a co-routine.

- void vUART_ISR( void )

- {

- portCHAR cRxedChar;

- portBASE_TYPE xCRWokenByPost = pdFALSE;

-

-     // We loop around reading characters until there are none left in the UART.

-     while( UART_RX_REG_NOT_EMPTY() )

-     {

-         // Obtain the character from the UART.

-         cRxedChar = UART_RX_REG;

-

-         // Post the character onto a queue.  xCRWokenByPost will be pdFALSE

-         // the first time around the loop.  If the post causes a co-routine

-         // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.

-         // In this manner we can ensure that if more than one co-routine is

-         // blocked on the queue only one is woken by this ISR no matter how

-         // many characters are posted to the queue.

-         xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );

-     }

- }
- * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) - - -/** - * croutine. h - * 

-  crQUEUE_SEND_FROM_ISR(

-                            xQueueHandle pxQueue,

-                            void *pvBuffer,

-                            portBASE_TYPE * pxCoRoutineWoken

-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data - * from a queue that is being used from within a co-routine (a co-routine - * posted to the queue). - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvBuffer A pointer to a buffer into which the received item will be - * placed. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from the queue into - * pvBuffer. - * - * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become - * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a - * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise - * *pxCoRoutineWoken will remain unchanged. - * - * @return pdTRUE an item was successfully received from the queue, otherwise - * pdFALSE. - * - * Example usage: - 

- // A co-routine that posts a character to a queue then blocks for a fixed

- // period.  The character is incremented each time.

- static void vSendingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )

- {

- // cChar holds its value while this co-routine is blocked and must therefore

- // be declared static.

- static portCHAR cCharToTx = 'a';

- portBASE_TYPE xResult;

-

-     // All co-routines must start with a call to crSTART().

-     crSTART( xHandle );

-

-     for( ;; )

-     {

-         // Send the next character to the queue.

-         crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );

-

-         if( xResult == pdPASS )

-         {

-             // The character was successfully posted to the queue.

-         }

-		 else

-		 {

-			// Could not post the character to the queue.

-		 }

-

-         // Enable the UART Tx interrupt to cause an interrupt in this

-		 // hypothetical UART.  The interrupt will obtain the character

-		 // from the queue and send it.

-		 ENABLE_RX_INTERRUPT();

-

-		 // Increment to the next character then block for a fixed period.

-		 // cCharToTx will maintain its value across the delay as it is

-		 // declared static.

-		 cCharToTx++;

-		 if( cCharToTx > 'x' )

-		 {

-			cCharToTx = 'a';

-		 }

-		 crDELAY( 100 );

-     }

-

-     // All co-routines must end with a call to crEND().

-     crEND();

- }

-

- // An ISR that uses a queue to receive characters to send on a UART.

- void vUART_ISR( void )

- {

- portCHAR cCharToTx;

- portBASE_TYPE xCRWokenByPost = pdFALSE;

-

-     while( UART_TX_REG_EMPTY() )

-     {

-         // Are there any characters in the queue waiting to be sent?

-		 // xCRWokenByPost will automatically be set to pdTRUE if a co-routine

-		 // is woken by the post - ensuring that only a single co-routine is

-		 // woken no matter how many times we go around this loop.

-         if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )

-		 {

-			 SEND_CHARACTER( cCharToTx );

-		 }

-     }

- }
- * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( pxQueue, pvBuffer, pxCoRoutineWoken ) - -/* - * This function is intended for internal use by the co-routine macros only. - * The macro nature of the co-routine implementation requires that the - * prototype appears here. The function should not be used by application - * writers. - * - * Removes the current co-routine from its ready list and places it in the - * appropriate delayed list. - */ -void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList ); - -/* - * This function is intended for internal use by the queue implementation only. - * The function should not be used by application writers. - * - * Removes the highest priority co-routine from the event list and places it in - * the pending ready list. - */ -signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList ); - - -#endif /* CO_ROUTINE_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/list.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/list.h deleted file mode 100644 index bd144c9a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/list.h +++ /dev/null @@ -1,270 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - * This is the list implementation used by the scheduler. While it is tailored - * heavily for the schedulers needs, it is also available for use by - * application code. - * - * xLists can only store pointers to xListItems. Each xListItem contains a - * numeric value (xItemValue). Most of the time the lists are sorted in - * descending item value order. - * - * Lists are created already containing one list item. The value of this - * item is the maximum possible that can be stored, it is therefore always at - * the end of the list and acts as a marker. The list member pxHead always - * points to this marker - even though it is at the tail of the list. This - * is because the tail contains a wrap back pointer to the true head of - * the list. - * - * In addition to it's value, each list item contains a pointer to the next - * item in the list (pxNext), a pointer to the list it is in (pxContainer) - * and a pointer to back to the object that contains it. These later two - * pointers are included for efficiency of list manipulation. There is - * effectively a two way link between the object containing the list item and - * the list item itself. - * - * - * \page ListIntroduction List Implementation - * \ingroup FreeRTOSIntro - */ - - -#ifndef LIST_H -#define LIST_H - -/* - * Definition of the only type of object that a list can contain. - */ -struct xLIST_ITEM -{ - portTickType xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ - volatile struct xLIST_ITEM * pxNext; /*< Pointer to the next xListItem in the list. */ - volatile struct xLIST_ITEM * pxPrevious;/*< Pointer to the previous xListItem in the list. */ - void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ - void * pvContainer; /*< Pointer to the list in which this list item is placed (if any). */ -}; -typedef struct xLIST_ITEM xListItem; /* For some reason lint wants this as two separate definitions. */ - -struct xMINI_LIST_ITEM -{ - portTickType xItemValue; - volatile struct xLIST_ITEM *pxNext; - volatile struct xLIST_ITEM *pxPrevious; -}; -typedef struct xMINI_LIST_ITEM xMiniListItem; - -/* - * Definition of the type of queue used by the scheduler. - */ -typedef struct xLIST -{ - volatile unsigned portBASE_TYPE uxNumberOfItems; - volatile xListItem * pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to pvListGetOwnerOfNextEntry (). */ - volatile xMiniListItem xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ -} xList; - -/* - * Access macro to set the owner of a list item. The owner of a list item - * is the object (usually a TCB) that contains the list item. - * - * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( pxListItem )->pvOwner = ( void * ) pxOwner - -/* - * Access macro to set the value of the list item. In most cases the value is - * used to sort the list in descending order. - * - * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( pxListItem )->xItemValue = xValue - -/* - * Access macro the retrieve the value of the list item. The value can - * represent anything - for example a the priority of a task, or the time at - * which a task should be unblocked. - * - * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) - -/* - * Access macro to determine if a list contains any items. The macro will - * only have the value true if the list is empty. - * - * \page listLIST_IS_EMPTY listLIST_IS_EMPTY - * \ingroup LinkedList - */ -#define listLIST_IS_EMPTY( pxList ) ( ( pxList )->uxNumberOfItems == ( unsigned portBASE_TYPE ) 0 ) - -/* - * Access macro to return the number of items in the list. - */ -#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) - -/* - * Access function to obtain the owner of the next entry in a list. - * - * The list member pxIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list - * and returns that entries pxOwner parameter. Using multiple calls to this - * function it is therefore possible to move through every item contained in - * a list. - * - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the next item owner is to be returned. - * - * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ - /* Increment the index to the next item and return the item, ensuring */ \ - /* we don't return the marker used at the end of the list. */ \ - ( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \ - if( ( pxList )->pxIndex == ( xListItem * ) &( ( pxList )->xListEnd ) ) \ - { \ - ( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \ - } \ - pxTCB = ( pxList )->pxIndex->pvOwner - - -/* - * Access function to obtain the owner of the first entry in a list. Lists - * are normally sorted in ascending item value order. - * - * This function returns the pxOwner member of the first item in the list. - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the owner of the head item is to be - * returned. - * - * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( ( pxList->uxNumberOfItems != ( unsigned portBASE_TYPE ) 0 ) ? ( (&( pxList->xListEnd ))->pxNext->pvOwner ) : ( NULL ) ) - -/* - * Check to see if a list item is within a list. The list item maintains a - * "container" pointer that points to the list it is in. All this macro does - * is check to see if the container and the list match. - * - * @param pxList The list we want to know if the list item is within. - * @param pxListItem The list item we want to know if is in the list. - * @return pdTRUE is the list item is in the list, otherwise pdFALSE. - * pointer against - */ -#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( pxListItem )->pvContainer == ( void * ) pxList ) - -/* - * Must be called before a list is used! This initialises all the members - * of the list structure and inserts the xListEnd item into the list as a - * marker to the back of the list. - * - * @param pxList Pointer to the list being initialised. - * - * \page vListInitialise vListInitialise - * \ingroup LinkedList - */ -void vListInitialise( xList *pxList ); - -/* - * Must be called before a list item is used. This sets the list container to - * null so the item does not think that it is already contained in a list. - * - * @param pxItem Pointer to the list item being initialised. - * - * \page vListInitialiseItem vListInitialiseItem - * \ingroup LinkedList - */ -void vListInitialiseItem( xListItem *pxItem ); - -/* - * Insert a list item into a list. The item will be inserted into the list in - * a position determined by its item value (descending item value order). - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The item to that is to be placed in the list. - * - * \page vListInsert vListInsert - * \ingroup LinkedList - */ -void vListInsert( xList *pxList, xListItem *pxNewListItem ); - -/* - * Insert a list item into a list. The item will be inserted in a position - * such that it will be the last item within the list returned by multiple - * calls to listGET_OWNER_OF_NEXT_ENTRY. - * - * The list member pvIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pvIndex to the next item in the list. - * Placing an item in a list using vListInsertEnd effectively places the item - * in the list position pointed to by pvIndex. This means that every other - * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before - * the pvIndex parameter again points to the item being inserted. - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The list item to be inserted into the list. - * - * \page vListInsertEnd vListInsertEnd - * \ingroup LinkedList - */ -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ); - -/* - * Remove an item from a list. The list item has a pointer to the list that - * it is in, so only the list item need be passed into the function. - * - * @param vListRemove The item to be removed. The item will remove itself from - * the list pointed to by it's pxContainer parameter. - * - * \page vListRemove vListRemove - * \ingroup LinkedList - */ -void vListRemove( xListItem *pxItemToRemove ); - - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/portable.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/portable.h deleted file mode 100644 index 3ab6fa72..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/portable.h +++ /dev/null @@ -1,193 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http:www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http:www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/*----------------------------------------------------------- - * Portable layer API. Each function must be defined for each port. - *----------------------------------------------------------*/ - -#ifndef PORTABLE_H -#define PORTABLE_H - -/* Include the macro file relevant to the port being used. */ - -#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT - #include "..\..\source\portable\owatcom\16bitdos\pc\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT - #include "..\..\source\portable\owatcom\16bitdos\flsh186\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef GCC_MEGA_AVR - #include "../portable/GCC/ATMega323/portmacro.h" -#endif - -#ifdef IAR_MEGA_AVR - #include "../portable/IAR/ATMega323/portmacro.h" -#endif - -#ifdef MPLAB_PIC18F_PORT - #include "..\..\source\portable\MPLAB\PIC18F\portmacro.h" -#endif - -#ifdef _FEDPICC - #include "libFreeRTOS/Include/portmacro.h" -#endif - -#ifdef SDCC_CYGNAL - #include "../../Source/portable/SDCC/Cygnal/portmacro.h" -#endif - -#ifdef GCC_ARM7 - #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" -#endif - -#ifdef GCC_MSP430 - #include "../../Source/portable/GCC/MSP430F449/portmacro.h" -#endif - -#ifdef ROWLEY_MSP430 - #include "../../Source/portable/Rowley/MSP430F449/portmacro.h" -#endif - -#ifdef KEIL_ARM7 - #include "..\..\Source\portable\Keil\ARM7\portmacro.h" -#endif - -#ifdef SAM7_GCC - #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" -#endif - -#ifdef SAM7_IAR - #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" -#endif - -#ifdef LPC2000_IAR - #include "..\..\Source\portable\IAR\LPC2000\portmacro.h" -#endif - -#ifdef STR71X_IAR - #include "..\..\Source\portable\IAR\STR71x\portmacro.h" -#endif - -#ifdef STR91X_IAR - #include "..\..\Source\portable\IAR\STR91x\portmacro.h" -#endif - -#ifdef GCC_H8S - #include "../../Source/portable/GCC/H8S2329/portmacro.h" -#endif - -#ifdef GCC_AT91FR40008 - #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" -#endif - -#ifdef RVDS_ARMCM3_LM3S102 - #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h" -#endif - -#ifdef GCC_ARMCM3_LM3S102 - #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" -#endif - -#ifdef IAR_ARMCM3_LM - #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" -#endif - -#ifdef HCS12_CODE_WARRIOR - #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" -#endif - -#ifdef MICROBLAZE_GCC - #include "../../Source/portable/GCC/MicroBlaze/portmacro.h" -#endif - -#ifdef TERN_EE - #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h" -#endif - -#ifdef GCC_HCS12 - #include "../../Source/portable/GCC/HCS12/portmacro.h" -#endif - -#ifdef GCC_STR71X - #include "../portable/GCC/ARM7_STR71X/portmacro.h" -#endif - - -#ifdef BCC_INDUSTRIAL_PC_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\PC\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef BCC_FLASH_LITE_186_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif -/* - * Setup the stack of a new task so it is ready to be placed under the - * scheduler control. The registers have to be placed on the stack in - * the order that the port expects to find them. - */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ); - -/* - * Map to the memory management routines required for the port. - */ -void *pvPortMalloc( size_t xSize ); -void vPortFree( void *pv ); -void vPortInitialiseBlocks( void ); - -/* - * Setup the hardware ready for the scheduler to take control. This generally - * sets up a tick interrupt and sets timers for the correct tick frequency. - */ -portBASE_TYPE xPortStartScheduler( void ); - -/* - * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so - * the hardware is left in its original condition after the scheduler stops - * executing. - */ -void vPortEndScheduler( void ); - - -#endif /* PORTABLE_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/projdefs.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/projdefs.h deleted file mode 100644 index 739ee1e1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/projdefs.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef PROJDEFS_H -#define PROJDEFS_H - -/* Defines to prototype to which task functions must conform. */ -typedef void (*pdTASK_CODE)( void * ); - -#define pdTRUE ( 1 ) -#define pdFALSE ( 0 ) - -#define pdPASS ( 1 ) -#define pdFAIL ( 0 ) -#define errQUEUE_EMPTY ( 0 ) -#define errQUEUE_FULL ( 0 ) - -/* Error definitions. */ -#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) -#define errNO_TASK_TO_RUN ( -2 ) -#define errQUEUE_BLOCKED ( -4 ) -#define errQUEUE_YIELD ( -5 ) - -#endif /* PROJDEFS_H */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/queue.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/queue.h deleted file mode 100644 index 4b25c8ef..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/queue.h +++ /dev/null @@ -1,471 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef QUEUE_H -#define QUEUE_H - -typedef void * xQueueHandle; - -/** - * queue. h - * 

- xQueueHandle xQueueCreate( 

-                              unsigned portBASE_TYPE uxQueueLength, 

-                              unsigned portBASE_TYPE uxItemSize 

-                          );

- *
- * - * Creates a new queue instance. This allocates the storage required by the - * new queue and returns a handle for the queue. - * - * @param uxQueueLength The maximum number of items that the queue can contain. - * - * @param uxItemSize The number of bytes each item in the queue will require. - * Items are queued by copy, not by reference, so this is the number of bytes - * that will be copied for each posted item. Each item on the queue must be - * the same size. - * - * @return If the queue is successfully create then a handle to the newly - * created queue is returned. If the queue cannot be created then 0 is - * returned. - * - * Example usage: - 

- struct AMessage

- {

-    portCHAR ucMessageID;

-    portCHAR ucData[ 20 ];

- };

-

- void vATask( void *pvParameters )

- {

- xQueueHandle xQueue1, xQueue2;

-

-    // Create a queue capable of containing 10 unsigned long values.

-    xQueue1 = xQueueCreate( 10, sizeof( unsigned portLONG ) );

-    if( xQueue1 == 0 )

-    {

-        // Queue was not created and must not be used.

-    }

-

-    // Create a queue capable of containing 10 pointers to AMessage structures.

-    // These should be passed by pointer as they contain a lot of data.

-    xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );

-    if( xQueue2 == 0 )

-    {

-        // Queue was not created and must not be used.

-    }

-

-    // ... Rest of task code.

- }

-
- * \defgroup xQueueCreate xQueueCreate - * \ingroup QueueManagement - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); - -/** - * queue. h - * 

- portBASE_TYPE xQueueSend( 

-                             xQueueHandle xQueue, 

-                             const void * pvItemToQueue, 

-                             portTickType xTicksToWait 

-                         );

- *
- * - * Post an item on a queue. The item is queued by copy, not by reference. - * This function must not be called from an interrupt service routine. - * See xQueueSendFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0. The - * time is defined in tick periods so the constant portTICK_RATE_MS - * should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 

- struct AMessage

- {

-    portCHAR ucMessageID;

-    portCHAR ucData[ 20 ];

- } xMessage;

-

- unsigned portLONG ulVar = 10UL;

-

- void vATask( void *pvParameters )

- {

- xQueueHandle xQueue1, xQueue2;

- struct AMessage *pxMessage;

-

-    // Create a queue capable of containing 10 unsigned long values.

-    xQueue1 = xQueueCreate( 10, sizeof( unsigned portLONG ) );

-

-    // Create a queue capable of containing 10 pointers to AMessage structures.

-    // These should be passed by pointer as they contain a lot of data.

-    xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );

-

-    // ...

-

-    if( xQueue1 != 0 )

-    {

-        // Send an unsigned long.  Wait for 10 ticks for space to become 

-        // available if necessary.

-        if( xQueueSend( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )

-        {

-            // Failed to post the message, even after 10 ticks.

-        }

-    }

-

-    if( xQueue2 != 0 )

-    {

-        // Send a pointer to a struct AMessage object.  Don't block if the

-        // queue is already full.

-        pxMessage = & xMessage;

-        xQueueSend( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );

-    }

-

-	// ... Rest of task code.

- }

-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueSend( xQueueHandle xQueue, const void * pvItemToQueue, portTickType xTicksToWait ); - -/** - * queue. h - * 

- portBASE_TYPE xQueueReceive( 

-                                xQueueHandle xQueue, 

-                                void *pvBuffer, 

-                                portTickType xTicksToWait 

-                            );
- * - * Receive an item from a queue. The item is received by copy so a buffer of - * adequate size must be provided. The number of bytes copied into the buffer - * was defined when the queue was created. - * - * This function must not be used in an interrupt service routine. See - * xQueueReceiveFromISR for an alternative that can. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. The time is defined in tick periods so the constant - * portTICK_RATE_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 

- struct AMessage

- {

-    portCHAR ucMessageID;

-    portCHAR ucData[ 20 ];

- } xMessage;

-

- xQueueHandle xQueue;

- 

- // Task to create a queue and post a value.

- void vATask( void *pvParameters )

- {

- struct AMessage *pxMessage;

-

-    // Create a queue capable of containing 10 pointers to AMessage structures.

-    // These should be passed by pointer as they contain a lot of data.

-    xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );

-    if( xQueue == 0 )

-    {

-        // Failed to create the queue.

-    }

-

-    // ...

-

-    // Send a pointer to a struct AMessage object.  Don't block if the

-    // queue is already full.

-    pxMessage = & xMessage;

-    xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );

-

-	// ... Rest of task code.

- }

-

- // Task to receive from the queue.

- void vADifferentTask( void *pvParameters )

- {

- struct AMessage *pxRxedMessage;

-

-    if( xQueue != 0 )

-    {

-        // Receive a message on the created queue.  Block for 10 ticks if a

-        // message is not immediately available.

-        if( xQueueReceive( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )

-        {

-            // pcRxedMessage now points to the struct AMessage variable posted

-            // by vATask.

-        }

-    }

-

-	// ... Rest of task code.

- }

-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceive( xQueueHandle xQueue, void *pvBuffer, portTickType xTicksToWait ); - -/** - * queue. h - * 
unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue );
- * - * Return the number of messages stored in a queue. - * - * @param xQueue A handle to the queue being queried. - * - * @return The number of messages available in the queue. - * - * \page uxQueueMessagesWaiting uxQueueMessagesWaiting - * \ingroup QueueManagement - */ -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle xQueue ); - -/** - * queue. h - * 
void vQueueDelete( xQueueHandle xQueue );
- * - * Delete a queue - freeing all the memory allocated for storing of items - * placed on the queue. - * - * @param xQueue A handle to the queue to be deleted. - * - * \page vQueueDelete vQueueDelete - * \ingroup QueueManagement - */ -void vQueueDelete( xQueueHandle xQueue ); - -/** - * queue. h - * 

- portBASE_TYPE xQueueSendFromISR( 

-                                    xQueueHandle pxQueue, 

-                                    const void *pvItemToQueue, 

-                                    portBASE_TYPE xTaskPreviouslyWoken 

-                                );

-
- * - * Post an item on a queue. It is safe to use this function from within an - * interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param cTaskPreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. See the file serial .c in the - * PC port for a good example of this mechanism. - * - * @return pdTRUE if a task was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 

- void vBufferISR( void )

- {

- portCHAR cIn;

- portBASE_TYPE xTaskWokenByPost;

-

-    // We have not woken a task at the start of the ISR.

-    cTaskWokenByPost = pdFALSE;

-

-    // Loop until the buffer is empty.

-    do

-    {

-        // Obtain a byte from the buffer.

-        cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );						

-

-        // Post the byte.  The first time round the loop cTaskWokenByPost

-        // will be pdFALSE.  If the queue send causes a task to wake we do

-        // not want the task to run until we have finished the ISR, so

-        // xQueueSendFromISR does not cause a context switch.  Also we 

-        // don't want subsequent posts to wake any other tasks, so we store

-        // the return value back into cTaskWokenByPost so xQueueSendFromISR

-        // knows not to wake any task the next iteration of the loop.

-        xTaskWokenByPost = xQueueSendFromISR( xRxQueue, &cIn, cTaskWokenByPost );

-

-    } while( portINPUT_BYTE( BUFFER_COUNT ) );

-

-    // Now the buffer is empty we can switch context if necessary.

-    if( cTaskWokenByPost )

-    {

-        taskYIELD ();

-    }

- }

-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ); - -/** - * queue. h - * 

- portBASE_TYPE xQueueReceiveFromISR( 

-                                       xQueueHandle pxQueue, 

-                                       void *pvBuffer, 

-                                       portBASE_TYPE *pxTaskWoken 

-                                   ); 

- *
- * - * Receive an item from a queue. It is safe to use this function from within an - * interrupt service routine. - * - * @param pxQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param pxTaskWoken A task may be blocked waiting for space to become - * available on the queue. If xQueueReceiveFromISR causes such a task to - * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will - * remain unchanged. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 

- 

- xQueueHandle xQueue;

- 

- // Function to create a queue and post some values.

- void vAFunction( void *pvParameters )

- {

- portCHAR cValueToPost;

- const portTickType xBlockTime = ( portTickType )0xff;

-

-    // Create a queue capable of containing 10 characters.

-    xQueue = xQueueCreate( 10, sizeof( portCHAR ) );

-    if( xQueue == 0 )

-    {

-        // Failed to create the queue.

-    }

-

-    // ...

-

-    // Post some characters that will be used within an ISR.  If the queue

-    // is full then this task will block for xBlockTime ticks.

-    cValueToPost = 'a';

-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );

-    cValueToPost = 'b';

-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );

-

-    // ... keep posting characters ... this task may block when the queue

-    // becomes full.

-

-    cValueToPost = 'c';

-    xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );

- }

-

- // ISR that outputs all the characters received on the queue. 

- void vISR_Routine( void )

- {

- portBASE_TYPE xTaskWokenByReceive = pdFALSE;

- portCHAR cRxedChar;

-

-    while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )

-    {

-        // A character was received.  Output the character now.

-        vOutputCharacter( cRxedChar );

-

-        // If removing the character from the queue woke the task that was 

-        // posting onto the queue cTaskWokenByReceive will have been set to

-        // pdTRUE.  No matter how many times this loop iterates only one

-        // task will be woken.

-    }

-

-    if( cTaskWokenByPost != ( portCHAR ) pdFALSE;

-    {

-        taskYIELD ();

-    }

- }

-
- * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR - * \ingroup QueueManagement - */ -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - - -/* - * The functions defined above are for passing data to and from tasks. The - * functions below are the equivalents for passing data to and from - * co-rtoutines. - * - * These functions are called from the co-routine macro implementation and - * should not be called directly from application code. Instead use the macro - * wrappers defined within croutine.h. - */ -signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ); -signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); -signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ); -signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/semphr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/semphr.h deleted file mode 100644 index 050e4d66..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/semphr.h +++ /dev/null @@ -1,289 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#include "queue.h" - -#ifndef SEMAPHORE_H -#define SEMAPHORE_H - -typedef xQueueHandle xSemaphoreHandle; - -#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( unsigned portCHAR ) 1 ) -#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( unsigned portCHAR ) 0 ) -#define semGIVE_BLOCK_TIME ( ( portTickType ) 0 ) - - -/** - * semphr. h - * 
vSemaphoreCreateBinary( xSemaphoreHandle xSemaphore )
- * - * Macro that implements a semaphore by using the existing queue mechanism. - * The queue length is 1 as this is a binary semaphore. The data size is 0 - * as we don't want to actually store any data - we just want to know if the - * queue is empty or full. - * - * @param xSemaphore Handle to the created semaphore. Should be of type xSemaphoreHandle. - * - * Example usage: - 

- xSemaphoreHandle xSemaphore;

-

- void vATask( void * pvParameters )

- {

-    // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().

-    // This is a macro so pass the variable in directly.

-    vSemaphoreCreateBinary( xSemaphore );

-

-    if( xSemaphore != NULL )

-    {

-        // The semaphore was created successfully.

-        // The semaphore can now be used.  

-    }

- }

-
- * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary - * \ingroup Semaphores - */ -#define vSemaphoreCreateBinary( xSemaphore ) { \ - xSemaphore = xQueueCreate( ( unsigned portCHAR ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH ); \ - if( xSemaphore != NULL ) \ - { \ - xSemaphoreGive( xSemaphore ); \ - } \ - } - -/** - * semphr. h - * xSemaphoreTake( - * xSemaphoreHandle xSemaphore, - * portTickType xBlockTime - * ) - * - * Macro to obtain a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (). - * - * @param xSemaphore A handle to the semaphore being obtained. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @param xBlockTime The time in ticks to wait for the semaphore to become - * available. The macro portTICK_RATE_MS can be used to convert this to a - * real time. A block time of zero can be used to poll the semaphore. - * - * @return pdTRUE if the semaphore was obtained. pdFALSE if xBlockTime - * expired without the semaphore becoming available. - * - * Example usage: - 

- xSemaphoreHandle xSemaphore = NULL;

-

- // A task that creates a semaphore.

- void vATask( void * pvParameters )

- {

-    // Create the semaphore to guard a shared resource.

-    vSemaphoreCreateBinary( xSemaphore );

- }

-

- // A task that uses the semaphore.

- void vAnotherTask( void * pvParameters )

- {

-    // ... Do other things.

-

-    if( xSemaphore != NULL )

-    {

-        // See if we can obtain the semaphore.  If the semaphore is not available

-        // wait 10 ticks to see if it becomes free.	

-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 10 ) == pdTRUE )

-        {

-            // We were able to obtain the semaphore and can now access the

-            // shared resource.

-

-            // ...

-

-            // We have finished accessing the shared resource.  Release the 

-            // semaphore.

-            xSemaphoreGive( xSemaphore );

-        }

-        else

-        {

-            // We could not obtain the semaphore and can therefore not access

-            // the shared resource safely.

-        }

-    }

- }

-
- * \defgroup xSemaphoreTake xSemaphoreTake - * \ingroup Semaphores - */ -#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueReceive( ( xQueueHandle ) xSemaphore, NULL, xBlockTime ) - -/** - * semphr. h - * 
xSemaphoreGive( xSemaphoreHandle xSemaphore )
- * - * Macro to release a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (), and obtained using sSemaphoreTake (). - * - * This must not be used from an ISR. See xSemaphoreGiveFromISR () for - * an alternative which can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @return pdTRUE if the semaphore was released. pdFALSE if an error occurred. - * Semaphores are implemented using queues. An error can occur if there is - * no space on the queue to post a message - indicating that the - * semaphore was not first obtained correctly. - * - * Example usage: - 

- xSemaphoreHandle xSemaphore = NULL;

-

- void vATask( void * pvParameters )

- {

-    // Create the semaphore to guard a shared resource.

-    vSemaphoreCreateBinary( xSemaphore );

-

-    if( xSemaphore != NULL )

-    {

-        if( xSemaphoreGive( xSemaphore ) != pdTRUE )

-        {

-            // We would expect this call to fail because we cannot give

-            // a semaphore without first "taking" it!

-        }

-

-        // Obtain the semaphore - don't block if the semaphore is not

-        // immediately available.

-        if( xSemaphoreTake( xSemaphore, ( portTickType ) 0 ) )

-        {

-            // We now have the semaphore and can access the shared resource.

-

-            // ...

-

-            // We have finished accessing the shared resource so can free the

-            // semaphore.

-            if( xSemaphoreGive( xSemaphore ) != pdTRUE )

-            {

-                // We would not expect this call to fail because we must have

-                // obtained the semaphore to get here.

-            }

-        }

-    }

- }

-
- * \defgroup xSemaphoreGive xSemaphoreGive - * \ingroup Semaphores - */ -#define xSemaphoreGive( xSemaphore ) xQueueSend( ( xQueueHandle ) xSemaphore, NULL, semGIVE_BLOCK_TIME ) - -/** - * semphr. h - * 

- xSemaphoreGiveFromISR( 

-                          xSemaphoreHandle xSemaphore, 

-                          portSHORT sTaskPreviouslyWoken 

-                      )
- * - * Macro to release a semaphore. The semaphore must of been created using - * vSemaphoreCreateBinary (), and obtained using xSemaphoreTake (). - * - * This macro can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned by vSemaphoreCreateBinary (); - * - * @param sTaskPreviouslyWoken This is included so an ISR can make multiple calls - * to xSemaphoreGiveFromISR () from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. See the file serial .c in the - * PC port for a good example of using xSemaphoreGiveFromISR (). - * - * @return pdTRUE if a task was woken by releasing the semaphore. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 

- #define LONG_TIME 0xffff

- #define TICKS_TO_WAIT	10

- xSemaphoreHandle xSemaphore = NULL;

-

- // Repetitive task.

- void vATask( void * pvParameters )

- {

-    for( ;; )

-    {

-        // We want this task to run every 10 ticks or a timer.  The semaphore 

-        // was created before this task was started

-

-        // Block waiting for the semaphore to become available.

-        if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )

-        {

-            // It is time to execute.

-

-            // ...

-

-            // We have finished our task.  Return to the top of the loop where

-            // we will block on the semaphore until it is time to execute 

-            // again.

-        }

-    }

- }

-

- // Timer ISR

- void vTimerISR( void * pvParameters )

- {

- static unsigned portCHAR ucLocalTickCount = 0;

-

-    // A timer tick has occurred.

-

-    // ... Do other time functions.

-

-    // Is it time for vATask () to run?

-    ucLocalTickCount++;

-    if( ucLocalTickCount >= TICKS_TO_WAIT )

-    {

-        // Unblock the task by releasing the semaphore.

-        xSemaphoreGive( xSemaphore );

-

-        // Reset the count so we release the semaphore again in 10 ticks time.

-        ucLocalTickCount = 0;

-    }

- }

-
- * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR - * \ingroup Semaphores - */ -#define xSemaphoreGiveFromISR( xSemaphore, xTaskPreviouslyWoken ) xQueueSendFromISR( ( xQueueHandle ) xSemaphore, NULL, xTaskPreviouslyWoken ) - - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/task.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/task.h deleted file mode 100644 index 62b9a018..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/include/task.h +++ /dev/null @@ -1,951 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -#ifndef TASK_H -#define TASK_H - -#include "portable.h" -#include "list.h" - -/*----------------------------------------------------------- - * MACROS AND DEFINITIONS - *----------------------------------------------------------*/ - -#define tskKERNEL_VERSION_NUMBER "V4.1.0" - -/** - * task. h - * - * Type by which tasks are referenced. For example, a call to xTaskCreate - * returns (via a pointer parameter) an xTaskHandle variable that can then - * be used as a parameter to vTaskDelete to delete the task. - * - * \page xTaskHandle xTaskHandle - * \ingroup Tasks - */ -typedef void * xTaskHandle; - -/* - * Used internally only. - */ -typedef struct xTIME_OUT -{ - portBASE_TYPE xOverflowCount; - portTickType xTimeOnEntering; -} xTimeOutType; - -/* - * Defines the priority used by the idle task. This must not be modified. - * - * \ingroup TaskUtils - */ -#define tskIDLE_PRIORITY ( ( unsigned portBASE_TYPE ) 0 ) - -/** - * task. h - * - * Macro for forcing a context switch. - * - * \page taskYIELD taskYIELD - * \ingroup SchedulerControl - */ -#define taskYIELD() portYIELD() - -/** - * task. h - * - * Macro to mark the start of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskENTER_CRITICAL taskENTER_CRITICAL - * \ingroup SchedulerControl - */ -#define taskENTER_CRITICAL() portENTER_CRITICAL() - -/** - * task. h - * - * Macro to mark the end of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \page taskEXIT_CRITICAL taskEXIT_CRITICAL - * \ingroup SchedulerControl - */ -#define taskEXIT_CRITICAL() portEXIT_CRITICAL() - -/** - * task. h - * - * Macro to disable all maskable interrupts. - * - * \page taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS() - -/** - * task. h - * - * Macro to enable microcontroller interrupts. - * - * \page taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS() - - -/*----------------------------------------------------------- - * TASK CREATION API - *----------------------------------------------------------*/ - -/** - * task. h - *

- portBASE_TYPE xTaskCreate(

-                              pdTASK_CODE pvTaskCode,

-                              const portCHAR * const pcName,

-                              unsigned portSHORT usStackDepth,

-                              void *pvParameters,

-                              unsigned portBASE_TYPE uxPriority,

-                              xTaskHandle *pvCreatedTask

-                          );
- * - * Create a new task and add it to the list of tasks that are ready to run. - * - * @param pvTaskCode Pointer to the task entry function. Tasks - * must be implemented to never return (i.e. continuous loop). - * - * @param pcName A descriptive name for the task. This is mainly used to - * facilitate debugging. Max length defined by tskMAX_TASK_NAME_LEN - default - * is 16. - * - * @param usStackDepth The size of the task stack specified as the number of - * variables the stack can hold - not the number of bytes. For example, if - * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes - * will be allocated for stack storage. - * - * @param pvParameters Pointer that will be used as the parameter for the task - * being created. - * - * @param uxPriority The priority at which the task should run. - * - * @param pvCreatedTask Used to pass back a handle by which the created task - * can be referenced. - * - * @return pdPASS if the task was successfully created and added to a ready - * list, otherwise an error code defined in the file errors. h - * - * Example usage: - 

- // Task to be created.

- void vTaskCode( void * pvParameters )

- {

-     for( ;; )

-     {

-         // Task code goes here.

-     }

- }

-

- // Function that creates a task.

- void vOtherFunction( void )

- {

- unsigned char ucParameterToPass;

- xTaskHandle xHandle;

-		

-     // Create the task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );

-		

-     // Use the handle to delete the task.

-     vTaskDelete( xHandle );

- }

-
- * \defgroup xTaskCreate xTaskCreate - * \ingroup Tasks - */ -signed portBASE_TYPE xTaskCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pvCreatedTask ); - -/** - * task. h - * 
void vTaskDelete( xTaskHandle pxTask );
- * - * INCLUDE_vTaskDelete must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Remove a task from the RTOS real time kernels management. The task being - * deleted will be removed from all ready, blocked, suspended and event lists. - * - * NOTE: The idle task is responsible for freeing the kernel allocated - * memory from tasks that have been deleted. It is therefore important that - * the idle task is not starved of microcontroller processing time if your - * application makes any calls to vTaskDelete (). Memory allocated by the - * task code is not automatically freed, and should be freed before the task - * is deleted. - * - * See the demo application file death.c for sample code that utilises - * vTaskDelete (). - * - * @param pxTask The handle of the task to be deleted. Passing NULL will - * cause the calling task to be deleted. - * - * Example usage: - 

- void vOtherFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create the task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-		

-     // Use the handle to delete the task.

-     vTaskDelete( xHandle );

- }

-
- * \defgroup vTaskDelete vTaskDelete - * \ingroup Tasks - */ -void vTaskDelete( xTaskHandle pxTask ); - - -/*----------------------------------------------------------- - * TASK CONTROL API - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskDelay( portTickType xTicksToDelay );
- * - * Delay a task for a given number of ticks. The actual time that the - * task remains blocked depends on the tick rate. The constant - * portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * INCLUDE_vTaskDelay must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * @param xTicksToDelay The amount of time, in tick periods, that - * the calling task should block. - * - * Example usage: - 

- // Wait 10 ticks before performing an action.

- // NOTE:

- // This is for demonstration only and would be better achieved

- // using vTaskDelayUntil ().

- void vTaskFunction( void * pvParameters )

- {

- portTickType xDelay, xNextTime;

-

-     // Calc the time at which we want to perform the action

-     // next.

-     xNextTime = xTaskGetTickCount () + ( portTickType ) 10;

-

-     for( ;; )

-     {

-         xDelay = xNextTime - xTaskGetTickCount ();

-         xNextTime += ( portTickType ) 10;

-

-         // Guard against overflow

-         if( xDelay <= ( portTickType ) 10 )

-         {

-             vTaskDelay( xDelay );

-         }

-

-         // Perform action here.

-     }

- }

-
- * \defgroup vTaskDelay vTaskDelay - * \ingroup TaskCtrl - */ -void vTaskDelay( portTickType xTicksToDelay ); - -/** - * task. h - * 
void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement );
- * - * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Delay a task until a specified time. This function can be used by cyclical - * tasks to ensure a constant execution frequency. - * - * This function differs from vTaskDelay () in one important aspect: vTaskDelay () will - * cause a task to block for the specified number of ticks from the time vTaskDelay () is - * called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed - * execution frequency as the time between a task starting to execute and that task - * calling vTaskDelay () may not be fixed [the task may take a different path though the - * code between calls, or may get interrupted or preempted a different number of times - * each time it executes]. - * - * Whereas vTaskDelay () specifies a wake time relative to the time at which the function - * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to - * unblock. - * - * The constant portTICK_RATE_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the - * task was last unblocked. The variable must be initialised with the current time - * prior to its first use (see the example below). Following this the variable is - * automatically updated within vTaskDelayUntil (). - * - * @param xTimeIncrement The cycle time period. The task will be unblocked at - * time *pxPreviousWakeTime + xTimeIncrement. Calling vTaskDelayUntil with the - * same xTimeIncrement parameter value will cause the task to execute with - * a fixed interface period. - * - * Example usage: - 

- // Perform an action every 10 ticks.

- void vTaskFunction( void * pvParameters )

- {

- portTickType xLastWakeTime;

- const portTickType xFrequency = 10;

-

-     // Initialise the xLastWakeTime variable with the current time.

-     xLastWakeTime = xTaskGetTickCount ();

-     for( ;; )

-     {

-         // Wait for the next cycle.

-         vTaskDelayUntil( &xLastWakeTime, xFrequency );

-

-         // Perform action here.

-     }

- }

-
- * \defgroup vTaskDelayUntil vTaskDelayUntil - * \ingroup TaskCtrl - */ -void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement ); - -/** - * task. h - * 
unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask );
- * - * INCLUDE_xTaskPriorityGet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Obtain the priority of any task. - * - * @param pxTask Handle of the task to be queried. Passing a NULL - * handle results in the priority of the calling task being returned. - * - * @return The priority of pxTask. - * - * Example usage: - 

- void vAFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create a task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-		

-     // ...

-

-     // Use the handle to obtain the priority of the created task.

-     // It was created with tskIDLE_PRIORITY, but may have changed

-     // it itself.

-     if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )

-     {

-         // The task has changed it's priority.

-     }

-

-     // ...

-

-     // Is our priority higher than the created task?

-     if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )

-     {

-         // Our priority (obtained using NULL handle) is higher.

-     }

- }

-
- * \defgroup uxTaskPriorityGet uxTaskPriorityGet - * \ingroup TaskCtrl - */ -unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ); - -/** - * task. h - * 
void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );
- * - * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Set the priority of any task. - * - * A context switch will occur before the function returns if the priority - * being set is higher than the currently executing task. - * - * @param pxTask Handle to the task for which the priority is being set. - * Passing a NULL handle results in the priority of the calling task being set. - * - * @param uxNewPriority The priority to which the task will be set. - * - * Example usage: - 

- void vAFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create a task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-

-     // ...

-

-     // Use the handle to raise the priority of the created task.

-     vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );

-

-     // ...

-

-     // Use a NULL handle to raise our priority to the same value.

-     vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );

- }

-
- * \defgroup vTaskPrioritySet vTaskPrioritySet - * \ingroup TaskCtrl - */ -void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ); - -/** - * task. h - * 
void vTaskSuspend( xTaskHandle pxTaskToSuspend );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Suspend any task. When suspended a task will never get any microcontroller - * processing time, no matter what its priority. - * - * Calls to vTaskSuspend are not accumulative - - * i.e. calling vTaskSuspend () twice on the same task still only requires one - * call to vTaskResume () to ready the suspended task. - * - * @param pxTaskToSuspend Handle to the task being suspended. Passing a NULL - * handle will cause the calling task to be suspended. - * - * Example usage: - 

- void vAFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create a task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-		

-     // ...

-

-     // Use the handle to suspend the created task.

-     vTaskSuspend( xHandle );

-

-     // ...

-		

-     // The created task will not run during this period, unless

-     // another task calls vTaskResume( xHandle ).

-		

-     //...

-		

-

-     // Suspend ourselves.

-     vTaskSuspend( NULL );

-

-     // We cannot get here unless another task calls vTaskResume

-     // with our handle as the parameter.

- }

-
- * \defgroup vTaskSuspend vTaskSuspend - * \ingroup TaskCtrl - */ -void vTaskSuspend( xTaskHandle pxTaskToSuspend ); - -/** - * task. h - * 
void vTaskResume( xTaskHandle pxTaskToResume );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Resumes a suspended task. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * vTaskResume (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * Example usage: - 

- void vAFunction( void )

- {

- xTaskHandle xHandle;

-		

-     // Create a task, storing the handle.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );

-		

-     // ...

-

-     // Use the handle to suspend the created task.

-     vTaskSuspend( xHandle );

-

-     // ...

-	

-     // The created task will not run during this period, unless

-     // another task calls vTaskResume( xHandle ).

-		

-     //...

-		

-

-     // Resume the suspended task ourselves.

-     vTaskResume( xHandle );

-

-     // The created task will once again get microcontroller processing

-     // time in accordance with it priority within the system.

- }

-
- * \defgroup vTaskResume vTaskResume - * \ingroup TaskCtrl - */ -void vTaskResume( xTaskHandle pxTaskToResume ); - -/** - * task. h - * 
void xTaskResumeFromISR( xTaskHandle pxTaskToResume );
- * - * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be - * available. See the configuration section for more information. - * - * An implementation of vTaskResume() that can be called from within an ISR. - * - * A task that has been suspended by one of more calls to vTaskSuspend () - * will be made available for running again by a single call to - * xTaskResumeFromISR (). - * - * @param pxTaskToResume Handle to the task being readied. - * - * \defgroup vTaskResumeFromISR vTaskResumeFromISR - * \ingroup TaskCtrl - */ -portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ); - -/*----------------------------------------------------------- - * SCHEDULER CONTROL - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskStartScheduler( void );
- * - * Starts the real time kernel tick processing. After calling the kernel - * has control over which tasks are executed and when. This function - * does not return until an executing task calls vTaskEndScheduler (). - * - * At least one task should be created via a call to xTaskCreate () - * before calling vTaskStartScheduler (). The idle task is created - * automatically when the first application task is created. - * - * See the demo application file main.c for an example of creating - * tasks and starting the kernel. - * - * Example usage: - 

- void vAFunction( void )

- {

-     // Create at least one task before starting the kernel.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );

-

-     // Start the real time kernel with preemption.

-     vTaskStartScheduler ();

-

-     // Will not get here unless a task calls vTaskEndScheduler ()

- }

-
- * - * \defgroup vTaskStartScheduler vTaskStartScheduler - * \ingroup SchedulerControl - */ -void vTaskStartScheduler( void ); - -/** - * task. h - * 
void vTaskEndScheduler( void );
- * - * Stops the real time kernel tick. All created tasks will be automatically - * deleted and multitasking (either preemptive or cooperative) will - * stop. Execution then resumes from the point where vTaskStartScheduler () - * was called, as if vTaskStartScheduler () had just returned. - * - * See the demo application file main. c in the demo/PC directory for an - * example that uses vTaskEndScheduler (). - * - * vTaskEndScheduler () requires an exit function to be defined within the - * portable layer (see vPortEndScheduler () in port. c for the PC port). This - * performs hardware specific operations such as stopping the kernel tick. - * - * vTaskEndScheduler () will cause all of the resources allocated by the - * kernel to be freed - but will not free resources allocated by application - * tasks. - * - * Example usage: - 

- void vTaskCode( void * pvParameters )

- {

-     for( ;; )

-     {

-         // Task code goes here.

-

-         // At some point we want to end the real time kernel processing

-         // so call ...

-         vTaskEndScheduler ();

-     }

- }

-

- void vAFunction( void )

- {

-     // Create at least one task before starting the kernel.

-     xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );

-

-     // Start the real time kernel with preemption.

-     vTaskStartScheduler ();

-

-     // Will only get here when the vTaskCode () task has called

-     // vTaskEndScheduler ().  When we get here we are back to single task

-     // execution.

- }

-
- * - * \defgroup vTaskEndScheduler vTaskEndScheduler - * \ingroup SchedulerControl - */ -void vTaskEndScheduler( void ); - -/** - * task. h - * 
void vTaskSuspendAll( void );
- * - * Suspends all real time kernel activity while keeping interrupts (including the - * kernel tick) enabled. - * - * After calling vTaskSuspendAll () the calling task will continue to execute - * without risk of being swapped out until a call to xTaskResumeAll () has been - * made. - * - * Example usage: - 

- void vTask1( void * pvParameters )

- {

-     for( ;; )

-     {

-         // Task code goes here.

-

-         // ...

-

-         // At some point the task wants to perform a long operation during

-         // which it does not want to get swapped out.  It cannot use

-         // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the

-         // operation may cause interrupts to be missed - including the

-         // ticks.

-

-         // Prevent the real time kernel swapping out the task.

-         vTaskSuspendAll ();

-

-         // Perform the operation here.  There is no need to use critical

-         // sections as we have all the microcontroller processing time.

-         // During this time interrupts will still operate and the kernel

-         // tick count will be maintained.

-

-         // ...

-

-         // The operation is complete.  Restart the kernel.

-         xTaskResumeAll ();

-     }

- }

-
- * \defgroup vTaskSuspendAll vTaskSuspendAll - * \ingroup SchedulerControl - */ -void vTaskSuspendAll( void ); - -/** - * task. h - * 
portCHAR xTaskResumeAll( void );
- * - * Resumes real time kernel activity following a call to vTaskSuspendAll (). - * After a call to vTaskSuspendAll () the kernel will take control of which - * task is executing at any time. - * - * @return If resuming the scheduler caused a context switch then pdTRUE is - * returned, otherwise pdFALSE is returned. - * - * Example usage: - 

- void vTask1( void * pvParameters )

- {

-     for( ;; )

-     {

-         // Task code goes here.

-

-         // ...

-

-         // At some point the task wants to perform a long operation during

-         // which it does not want to get swapped out.  It cannot use

-         // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the

-         // operation may cause interrupts to be missed - including the

-         // ticks.

-

-         // Prevent the real time kernel swapping out the task.

-         vTaskSuspendAll ();

-

-         // Perform the operation here.  There is no need to use critical

-         // sections as we have all the microcontroller processing time.

-         // During this time interrupts will still operate and the real

-         // time kernel tick count will be maintained.

-

-         // ...

-

-         // The operation is complete.  Restart the kernel.  We want to force

-         // a context switch - but there is no point if resuming the scheduler

-         // caused a context switch already.

-         if( !xTaskResumeAll () )

-         {

-              taskYIELD ();

-         }

-     }

- }

-
- * \defgroup xTaskResumeAll xTaskResumeAll - * \ingroup SchedulerControl - */ -signed portBASE_TYPE xTaskResumeAll( void ); - - -/*----------------------------------------------------------- - * TASK UTILITIES - *----------------------------------------------------------*/ - -/** - * task. h - * 
volatile portTickType xTaskGetTickCount( void );
- * - * @return The count of ticks since vTaskStartScheduler was called. - * - * \page xTaskGetTickCount xTaskGetTickCount - * \ingroup TaskUtils - */ -portTickType xTaskGetTickCount( void ); - -/** - * task. h - * 
unsigned portSHORT uxTaskGetNumberOfTasks( void );
- * - * @return The number of tasks that the real time kernel is currently managing. - * This includes all ready, blocked and suspended tasks. A task that - * has been deleted but not yet freed by the idle task will also be - * included in the count. - * - * \page uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks - * \ingroup TaskUtils - */ -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ); - -/** - * task. h - * 
void vTaskList( portCHAR *pcWriteBuffer );
- * - * configUSE_TRACE_FACILITY, INCLUDE_vTaskDelete and INCLUDE_vTaskSuspend - * must all be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * NOTE: This function will disable interrupts for its duration. It is - * not intended for normal application runtime use but as a debug aid. - * - * Lists all the current tasks, along with their current state and stack - * usage high water mark. - * - * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or - * suspended ('S'). - * - * @param pcWriteBuffer A buffer into which the above mentioned details - * will be written, in ascii form. This buffer is assumed to be large - * enough to contain the generated report. Approximately 40 bytes per - * task should be sufficient. - * - * \page vTaskList vTaskList - * \ingroup TaskUtils - */ -void vTaskList( signed portCHAR *pcWriteBuffer ); - -/** - * task. h - * 
void vTaskStartTrace( portCHAR * pcBuffer, unsigned portBASE_TYPE uxBufferSize );
- * - * Starts a real time kernel activity trace. The trace logs the identity of - * which task is running when. - * - * The trace file is stored in binary format. A separate DOS utility called - * convtrce.exe is used to convert this into a tab delimited text file which - * can be viewed and plotted in a spread sheet. - * - * @param pcBuffer The buffer into which the trace will be written. - * - * @param ulBufferSize The size of pcBuffer in bytes. The trace will continue - * until either the buffer in full, or ulTaskEndTrace () is called. - * - * \page vTaskStartTrace vTaskStartTrace - * \ingroup TaskUtils - */ -void vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize ); - -/** - * task. h - * 
unsigned portLONG ulTaskEndTrace( void );
- * - * Stops a kernel activity trace. See vTaskStartTrace (). - * - * @return The number of bytes that have been written into the trace buffer. - * - * \page usTaskEndTrace usTaskEndTrace - * \ingroup TaskUtils - */ -unsigned portLONG ulTaskEndTrace( void ); - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - *----------------------------------------------------------*/ - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Called from the real time kernel tick (either preemptive or cooperative), - * this increments the tick count and checks if any tasks that are blocked - * for a finite period required removing from a blocked list and placing on - * a ready list. - */ -inline void vTaskIncrementTick( void ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes the calling task from the ready list and places it both - * on the list of tasks waiting for a particular event, and the - * list of delayed tasks. The task will be removed from both lists - * and replaced on the ready list should either the event occur (and - * there be no higher priority tasks waiting on the same event) or - * the delay period expires. - * - * @param pxEventList The list containing tasks that are blocked waiting - * for the event to occur. - * - * @param xTicksToWait The maximum amount of time that the task should wait - * for the event to occur. This is specified in kernel ticks,the constant - * portTICK_RATE_MS can be used to convert kernel ticks into a real time - * period. - */ -void vTaskPlaceOnEventList( xList *pxEventList, portTickType xTicksToWait ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. - * - * Removes a task from both the specified event list and the list of blocked - * tasks, and places it on a ready queue. - * - * xTaskRemoveFromEventList () will be called if either an event occurs to - * unblock a task, or the block timeout period expires. - * - * @return pdTRUE if the task being removed has a higher priority than the task - * making the call, otherwise pdFALSE. - */ -signed portBASE_TYPE xTaskRemoveFromEventList( const xList *pxEventList ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN - * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * INCLUDE_vTaskCleanUpResources and INCLUDE_vTaskSuspend must be defined as 1 - * for this function to be available. - * See the configuration section for more information. - * - * Empties the ready and delayed queues of task control blocks, freeing the - * memory allocated for the task control block and task stacks as it goes. - */ -void vTaskCleanUpResources( void ); - -/* - * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY - * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS - * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. - * - * Sets the pointer to the current TCB to the TCB of the highest priority task - * that is ready to run. - */ -inline void vTaskSwitchContext( void ); - -/* - * Return the handle of the calling task. - */ -xTaskHandle xTaskGetCurrentTaskHandle( void ); - -/* - * Capture the current time status for future reference. - */ -void vTaskSetTimeOutState( xTimeOutType *pxTimeOut ); - -/* - * Compare the time status now with that previously captured to see if the - * timeout has expired. - */ -portBASE_TYPE xTaskCheckForTimeOut( xTimeOutType *pxTimeOut, portTickType *pxTicksToWait ); - -/* - * Shortcut used by the queue implementation to prevent unnecessary call to - * taskYIELD(); - */ -void vTaskMissedYield( void ); - -#endif /* TASK_H */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/list.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/list.c deleted file mode 100644 index 29729707..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/list.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.2.0 - - + Removed the volatile modifier from the function parameters. This was - only ever included to prevent compiler warnings. Now warnings are - removed by casting parameters where the calls are made. - - + prvListGetOwnerOfNextEntry() and prvListGetOwnerOfHeadEntry() have been - removed from the c file and added as macros to the h file. - - + uxNumberOfItems has been added to the list structure. This removes the - need for a pointer comparison when checking if a list is empty, and so - is slightly faster. - - + Removed the NULL check in vListRemove(). This makes the call faster but - necessitates any application code utilising the list implementation to - ensure NULL pointers are not passed. - -Changes from V2.0.0 - - + Double linked the lists to allow faster removal item removal. - -Changes from V2.6.1 - - + Make use of the new portBASE_TYPE definition where ever appropriate. - -Changes from V3.0.0 - - + API changes as described on the FreeRTOS.org WEB site. - -Changes from V3.2.4 - - + Removed the pxHead member of the xList structure. This always pointed - to the same place so has been removed to free a few bytes of RAM. - - + Introduced the xMiniListItem structure that does not include the - xListItem members that are not required by the xListEnd member of a list. - Again this was done to reduce RAM usage. - - + Changed the volatile definitions of some structure members to clean up - the code where the list structures are used. - -Changes from V4.0.4 - - + Optimised vListInsert() in the case when the wake time is the maximum - tick count value. -*/ - -#include -#include "FreeRTOS.h" -#include "list.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -void vListInitialise( xList *pxList ) -{ - /* The list structure contains a list item which is used to mark the - end of the list. To initialise the list the list end is inserted - as the only list entry. */ - pxList->pxIndex = ( xListItem * ) &( pxList->xListEnd ); - - /* The list end value is the highest possible value in the list to - ensure it remains at the end of the list. */ - pxList->xListEnd.xItemValue = portMAX_DELAY; - - /* The list end next and previous pointers point to itself so we know - when the list is empty. */ - pxList->xListEnd.pxNext = ( xListItem * ) &( pxList->xListEnd ); - pxList->xListEnd.pxPrevious = ( xListItem * ) &( pxList->xListEnd ); - - pxList->uxNumberOfItems = 0; -} -/*-----------------------------------------------------------*/ - -void vListInitialiseItem( xListItem *pxItem ) -{ - /* Make sure the list item is not recorded as being on a list. */ - pxItem->pvContainer = NULL; -} -/*-----------------------------------------------------------*/ - -void vListInsertEnd( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem * pxIndex; - - /* Insert a new list item into pxList, but rather than sort the list, - makes the new list item the last item to be removed by a call to - pvListGetOwnerOfNextEntry. This means it has to be the item pointed to by - the pxIndex member. */ - pxIndex = pxList->pxIndex; - - pxNewListItem->pxNext = pxIndex->pxNext; - pxNewListItem->pxPrevious = pxList->pxIndex; - pxIndex->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxIndex->pxNext = ( volatile xListItem * ) pxNewListItem; - pxList->pxIndex = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListInsert( xList *pxList, xListItem *pxNewListItem ) -{ -volatile xListItem *pxIterator; -portTickType xValueOfInsertion; - - /* Insert the new list item into the list, sorted in ulListItem order. */ - xValueOfInsertion = pxNewListItem->xItemValue; - - /* If the list already contains a list item with the same item value then - the new list item should be placed after it. This ensures that TCB's which - are stored in ready lists (all of which have the same ulListItem value) - get an equal share of the CPU. However, if the xItemValue is the same as - the back marker the iteration loop below will not end. This means we need - to guard against this by checking the value first and modifying the - algorithm slightly if necessary. */ - if( xValueOfInsertion == portMAX_DELAY ) - { - pxIterator = pxList->xListEnd.pxPrevious; - } - else - { - for( pxIterator = ( xListItem * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) - { - /* There is nothing to do here, we are just iterating to the - wanted insertion position. */ - } - } - - pxNewListItem->pxNext = pxIterator->pxNext; - pxNewListItem->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem; - pxNewListItem->pxPrevious = pxIterator; - pxIterator->pxNext = ( volatile xListItem * ) pxNewListItem; - - /* Remember which list the item is in. This allows fast removal of the - item later. */ - pxNewListItem->pvContainer = ( void * ) pxList; - - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -void vListRemove( xListItem *pxItemToRemove ) -{ -xList * pxList; - - pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; - pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; - - /* The list item knows which list it is in. Obtain the list from the list - item. */ - pxList = ( xList * ) pxItemToRemove->pvContainer; - - /* Make sure the index is left pointing to a valid item. */ - if( pxList->pxIndex == pxItemToRemove ) - { - pxList->pxIndex = pxItemToRemove->pxPrevious; - } - - pxItemToRemove->pvContainer = NULL; - ( pxList->uxNumberOfItems )--; -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/GCC/ARM7_STR71X/port.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/GCC/ARM7_STR71X/port.c deleted file mode 100644 index e131ccbd..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/GCC/ARM7_STR71X/port.c +++ /dev/null @@ -1,180 +0,0 @@ -/* - FreeRTOS V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - Modification for STR71X/GCC - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* ----------------------- System incldues ----------------------------------*/ -#include - -/* ----------------------- FreeRTOS -----------------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- STR71X includes ----------------------------------*/ -#include "eic.h" -#include "wdg.h" - -/* ----------------------- Defines ------------------------------------------*/ - -/* System mode, ARM mode, interrupts enabled. */ -#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1F ) -#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 ) -#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 ) -#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 ) - -/* ----------------------- Static functions ---------------------------------*/ - -/* Setup the timer to generate the tick interrupts. */ -static void prvSetupTimerInterrupt( void ); - -/* Scheduler can only be started from ARM mode, so vPortISRStartFirstSTask() - * is defined in portISR.c. - */ -extern void vPortISRStartFirstTask( void ); - -/* ----------------------- Start implementation -----------------------------*/ - -/* - * Initialise the stack of a task to look exactly as if a call to - * portSAVE_CONTEXT had been called. - */ -portSTACK_TYPE * -pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) -{ - portSTACK_TYPE *pxOriginalTOS; - - pxOriginalTOS = pxTopOfStack; - - /* Setup the initial stack of the task. The stack is set exactly as - expected by the portRESTORE_CONTEXT() macro. */ - - /* First on the stack is the return address - which in this case is the - start of the task. The offset is added to make the return address appear - as it would within an IRQ ISR. */ - *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; - pxTopOfStack--; - - *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */ - pxTopOfStack--; - - /* When the task starts is will expect to find the function parameter in - R0. */ - *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */ - pxTopOfStack--; - - /* The last thing onto the stack is the status register, which is set for - system mode, with interrupts enabled. */ - *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR; - -#ifdef THUMB_INTERWORK - { - /* We want the task to start in thumb mode. */ - *pxTopOfStack |= portTHUMB_MODE_BIT; - } -#endif - - pxTopOfStack--; - - /* Some optimisation levels use the stack differently to others. This - means the interrupt flags cannot always be stored on the stack and will - instead be stored in a variable, which is then saved as part of the - tasks context. */ - *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING; - - return pxTopOfStack; -} - -portBASE_TYPE -xPortStartScheduler( void ) -{ - /* Start the timer that generates the tick ISR. Interrupts are disabled - here already. */ - prvSetupTimerInterrupt( ); - - /* Start the first task. */ - vPortISRStartFirstTask( ); - - /* Should not get here! */ - return 0; -} - -void -vPortEndScheduler( void ) -{ - /* It is unlikely that the ARM port will require this function as there - is nothing to return to. */ -} - -/* We use the interal watchdog timer to generate a periodic clock tick. */ -static void -prvSetupTimerInterrupt( void ) -{ - /* Set the watchdog up to generate a periodic tick. */ - WDG_ECITConfig( DISABLE ); - WDG_CntOnOffConfig( DISABLE ); - WDG_PeriodValueConfig( configTICK_RATE_HZ ); - - /* Setup the tick interrupt in the EIC. */ - EIC_IRQChannelPriorityConfig( WDG_IRQChannel, 1 ); - EIC_IRQChannelConfig( WDG_IRQChannel, ENABLE ); - EIC_IRQConfig( ENABLE ); - WDG_ECITConfig( ENABLE ); - - /* Start the timer - interrupts are actually disabled at this point so - it is safe to do this here. */ - WDG_CntOnOffConfig( ENABLE ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/GCC/ARM7_STR71X/portISR.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/GCC/ARM7_STR71X/portISR.c deleted file mode 100644 index 7888d6e0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/GCC/ARM7_STR71X/portISR.c +++ /dev/null @@ -1,221 +0,0 @@ -/* - FreeRTOS V4.1.0 - Copyright (C) 2003-2005 Richard Barry. - Modification for STR71X/GCC - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* ----------------------- System incldues ----------------------------------*/ - -/* ----------------------- FreeRTOS -----------------------------------------*/ -#include "FreeRTOS.h" -#include "task.h" - -/* ----------------------- STR71X includes ----------------------------------*/ -#include "eic.h" -#include "wdg.h" - -/* ----------------------- Defines ------------------------------------------*/ - -#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 ) - -/* ----------------------- Variables ----------------------------------------*/ -volatile unsigned portLONG ulCriticalNesting = 9999UL; - -/* ----------------------- Prototypes ---------------------------------------*/ - -/* ISR to handle manual context switches (from a call to taskYIELD()). */ -void vPortYieldProcessor( void ) __attribute__ ( ( interrupt( "SWI" ), naked ) ); -void vPortISRStartFirstTask( void ); -void vPortPreemptiveTick( void ) __attribute__ ( ( naked ) ); -void vPortNonPreemptiveTick( void ) __attribute__ ( ( interrupt( "IRQ" ) ) ); - -/* ----------------------- Start implementation -----------------------------*/ - -/* The scheduler can only be started from ARM mode, hence the inclusion of this - * function here. - */ -void -vPortISRStartFirstTask( void ) -{ - /* Simply start the scheduler. This is included here as it can only be - called from ARM mode. */ - portRESTORE_CONTEXT( ); -} - -/* - * Called by portYIELD() or taskYIELD() to manually force a context switch. - * - * When a context switch is performed from the task level the saved task - * context is made to look as if it occurred from within the tick ISR. This - * way the same restore context function can be used when restoring the context - * saved from the ISR or that saved from a call to vPortYieldProcessor. - */ -void -vPortYieldProcessor( void ) -{ - /* Within an IRQ ISR the link register has an offset from the true return - address, but an SWI ISR does not. Add the offset manually so the same - ISR return code can be used in both cases. */ - asm volatile ( "ADD LR, LR, #4" ); - - /* Perform the context switch. First save the context of the current task. */ - portSAVE_CONTEXT( ); - - /* Find the highest priority task that is ready to run. */ - vTaskSwitchContext( ); - - /* Restore the context of the new task. */ - portRESTORE_CONTEXT( ); -} - -/* - * The ISR used for the scheduler tick depends on whether the cooperative or - * the preemptive scheduler is being used. - */ -#if configUSE_PREEMPTION == 0 - -/* The cooperative scheduler requires a normal IRQ service routine to - * simply increment the system tick. - */ -void -vPortNonPreemptiveTick( void ) -{ - vTaskIncrementTick( ); - - /* Clear the interrupt in the watchdog and EIC. */ - WDG->SR = 0x0000; - /* clear current interrupt pending flag for interupt source. */ - EIC->IPR |= 1 << EIC_CurrentIRQChannelValue( ); -} - -#else - -/* The preemptive scheduler is defined as "naked" as the full context is - * saved on entry as part of the context switch. - */ -void -vPortPreemptiveTick( void ) -{ - /* Save the context of the interrupted task. */ - portSAVE_CONTEXT( ); - - /* Increment the RTOS tick count, then look for the highest priority - * task that is ready to run. - */ - vTaskIncrementTick( ); - vTaskSwitchContext( ); - - /* Clear the interrupt in the watchdog and EIC. */ - WDG->SR = 0x0000; - /* clear current interrupt pending flag for interupt source. */ - EIC->IPR |= 1 << EIC_CurrentIRQChannelValue( ); - - /* Restore the context of the new task. */ - portRESTORE_CONTEXT( ); -} - -#endif - -/* - * The interrupt management utilities can only be called from ARM mode. When - * THUMB_INTERWORK is defined the utilities are defined as functions here to - * ensure a switch to ARM mode. When THUMB_INTERWORK is not defined then - * the utilities are defined as macros in portmacro.h - as per other ports. - */ -#ifdef THUMB_INTERWORK - -void vPortDisableInterruptsFromThumb( void ) __attribute__ ( ( naked ) ); -void vPortEnableInterruptsFromThumb( void ) __attribute__ ( ( naked ) ); - -void -vPortDisableInterruptsFromThumb( void ) -{ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ - asm volatile ( "ORR R0, R0, #0xC0" ); /* Disable IRQ, FIQ. */ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ - asm volatile ( "LDMIA SP!, {R0}" ); /* Pop R0. */ - asm volatile ( "BX R14" ); /* Return back to thumb. */ -} - -void -vPortEnableInterruptsFromThumb( void ) -{ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ - asm volatile ( "BIC R0, R0, #0xC0" ); /* Enable IRQ, FIQ. */ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ - asm volatile ( "LDMIA SP!, {R0}" ); /* Pop R0. */ - asm volatile ( "BX R14" ); /* Return back to thumb. */ -} - -#endif - -/* The code generated by the GCC compiler uses the stack in different ways at -different optimisation levels. The interrupt flags can therefore not always -be saved to the stack. Instead the critical section nesting level is stored -in a variable, which is then saved as part of the stack context. */ -void -vPortEnterCritical( void ) -{ - /* Disable interrupts as per portDISABLE_INTERRUPTS(); */ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ - asm volatile ( "ORR R0, R0, #0xC0" ); /* Disable IRQ, FIQ. */ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ - asm volatile ( "LDMIA SP!, {R0}" ); /* Pop R0. */ - - /* Now interrupts are disabled ulCriticalNesting can be accessed - directly. Increment ulCriticalNesting to keep a count of how many times - portENTER_CRITICAL() has been called. */ - ulCriticalNesting++; -} - -void -vPortExitCritical( void ) -{ - if( ulCriticalNesting > portNO_CRITICAL_NESTING ) - { - /* Decrement the nesting count as we are leaving a critical section. */ - ulCriticalNesting--; - - /* If the nesting level has reached zero then interrupts should be - re-enabled. */ - if( ulCriticalNesting == portNO_CRITICAL_NESTING ) - { - /* Enable interrupts as per portEXIT_CRITICAL(). */ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ - asm volatile ( "BIC R0, R0, #0xC0" ); /* Enable IRQ, FIQ. */ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ - asm volatile ( "LDMIA SP!, {R0}" ); /* Pop R0. */ - } - } -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/GCC/ARM7_STR71X/portmacro.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/GCC/ARM7_STR71X/portmacro.h deleted file mode 100644 index 46632152..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/GCC/ARM7_STR71X/portmacro.h +++ /dev/null @@ -1,243 +0,0 @@ -/* - FreeRTOS V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - Modification for STR71X/GCC - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - Changes from V3.2.3 - - + Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1. -*/ - -#ifndef PORTMACRO_H -#define PORTMACRO_H - -/*----------------------------------------------------------- - * Port specific definitions. - * - * The settings in this file configure FreeRTOS correctly for the - * given hardware and compiler. - * - * These settings should not be altered. - *----------------------------------------------------------- - */ - -/* Type definitions. */ -#define portCHAR char -#define portFLOAT float -#define portDOUBLE double -#define portLONG long -#define portSHORT short -#define portSTACK_TYPE unsigned portLONG -#define portBASE_TYPE portLONG - -#if( configUSE_16_BIT_TICKS == 1 ) -typedef unsigned portSHORT portTickType; - -#define portMAX_DELAY ( portTickType ) 0xffff -#else -typedef unsigned portLONG portTickType; - -#define portMAX_DELAY ( portTickType ) 0xffffffff -#endif -/*-----------------------------------------------------------*/ - -/* Architecture specifics. */ -#define portSTACK_GROWTH ( -1 ) -#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) -#define portBYTE_ALIGNMENT 4 -/*-----------------------------------------------------------*/ - - -/* Scheduler utilities. */ - -/* - * portRESTORE_CONTEXT, portRESTORE_CONTEXT, portENTER_SWITCHING_ISR - * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but - * are included here for efficiency. An attempt to call one from - * THUMB mode code will result in a compile time error. - */ - -#define portRESTORE_CONTEXT() \ -{ \ -extern volatile void * volatile pxCurrentTCB; \ -extern volatile unsigned portLONG ulCriticalNesting; \ - \ - /* Set the LR to the task stack. */ \ - asm volatile ( "LDR R0, %0" : : "m" (pxCurrentTCB) ); \ - asm volatile ( "LDR LR, [R0]" ); \ - \ - /* The critical nesting depth is the first item on the stack. */ \ - /* Load it into the ulCriticalNesting variable. */ \ - asm volatile ( "LDR R0, =ulCriticalNesting" ); \ - asm volatile ( "LDMFD LR!, {R1}" ); \ - asm volatile ( "STR R1, [R0]" ); \ - \ - /* Get the SPSR from the stack. */ \ - asm volatile ( "LDMFD LR!, {R0}" ); \ - asm volatile ( "MSR SPSR, R0" ); \ - \ - /* Restore all system mode registers for the task. */ \ - asm volatile ( "LDMFD LR, {R0-R14}^" ); \ - asm volatile ( "NOP" ); \ - \ - /* Restore the return address. */ \ - asm volatile ( "LDR LR, [LR, #+60]" ); \ - \ - /* And return - correcting the offset in the LR to obtain the */ \ - /* correct address. */ \ - asm volatile ( "SUBS PC, LR, #4" ); \ - ( void ) ulCriticalNesting; \ -} -/*-----------------------------------------------------------*/ - -#define portSAVE_CONTEXT() \ -{ \ -extern volatile void * volatile pxCurrentTCB; \ -extern volatile unsigned portLONG ulCriticalNesting; \ - \ - /* Push R0 as we are going to use the register. */ \ - asm volatile ( "STMDB SP!, {R0}" ); \ - \ - /* Set R0 to point to the task stack pointer. */ \ - asm volatile ( "STMDB SP,{SP}^" ); \ - asm volatile ( "SUB SP, SP, #4" ); \ - asm volatile ( "LDMIA SP!,{R0}" ); \ - \ - /* Push the return address onto the stack. */ \ - asm volatile ( "STMDB R0!, {LR}" ); \ - \ - /* Now we have saved LR we can use it instead of R0. */ \ - asm volatile ( "MOV LR, R0" ); \ - \ - /* Pop R0 so we can save it onto the system mode stack. */ \ - asm volatile ( "LDMIA SP!, {R0}" ); \ - \ - /* Push all the system mode registers onto the task stack. */ \ - asm volatile ( "STMDB LR,{R0-LR}^"); \ - asm volatile ( "SUB LR, LR, #60" ); \ - \ - /* Push the SPSR onto the task stack. */ \ - asm volatile ( "MRS R0, SPSR" ); \ - asm volatile ( "STMDB LR!, {R0}" ); \ - \ - asm volatile ( "LDR R0, =ulCriticalNesting " ); \ - asm volatile ( "LDR R0, [R0]" ); \ - asm volatile ( "STMDB LR!, {R0}" ); \ - \ - /* Store the new top of stack for the task. */ \ - asm volatile ( "LDR R0, %0" : : "m" (pxCurrentTCB) ); \ - asm volatile ( "STR LR, [R0]" ); \ - ( void ) ulCriticalNesting; \ -} - - -/*----------------------------------------------------------- - * ISR entry and exit macros. These are only required if a task switch - * is required from the ISR. - *----------------------------------------------------------*/ - - -#define portENTER_SWITCHING_ISR() \ - /* Save the context of the interrupted task. */ \ - portSAVE_CONTEXT(); \ - \ - /* We don't know the stack requirements for the ISR, so the frame */\ - /* pointer will be set to the top of the task stack, and the stack*/\ - /* pointer left where it is. The IRQ stack will get used for any */\ - /* functions calls made by this ISR. */ \ - asm volatile ( "SUB R11, LR, #4" ); \ - { - -#define portEXIT_SWITCHING_ISR( SwitchRequired ) \ - /* If a switch is required then we just need to call */ \ - /* vTaskSwitchContext() as the context has already been */ \ - /* saved. */ \ - if( SwitchRequired ) \ - { \ - vTaskSwitchContext(); \ - } \ - } \ - /* Restore the context of which ever task is now the highest */ \ - /* priority that is ready to run. */ \ - portRESTORE_CONTEXT(); - -#define portYIELD() asm volatile ( "SWI" ); -/*-----------------------------------------------------------*/ - - -/* Critical section management. */ - -/* - * The interrupt management utilities can only be called from ARM mode. When - * THUMB_INTERWORK is defined the utilities are defined as functions in - * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not - * defined then the utilities are defined as macros here - as per other ports. - */ - -#ifdef THUMB_INTERWORK - -extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ( ( naked ) ); -extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ( ( naked ) ); - -#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb() -#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb() - -#else - -#define portDISABLE_INTERRUPTS() \ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ \ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ \ - asm volatile ( "ORR R0, R0, #0xC0" ); /* Disable IRQ, FIQ. */ \ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ \ - asm volatile ( "LDMIA SP!, {R0}" ) /* Pop R0. */ - -#define portENABLE_INTERRUPTS() \ - asm volatile ( "STMDB SP!, {R0}" ); /* Push R0. */ \ - asm volatile ( "MRS R0, CPSR" ); /* Get CPSR. */ \ - asm volatile ( "BIC R0, R0, #0xC0" ); /* Enable IRQ, FIQ. */ \ - asm volatile ( "MSR CPSR, R0" ); /* Write back modified value. */ \ - asm volatile ( "LDMIA SP!, {R0}" ) /* Pop R0. */ - -#endif /* THUMB_INTERWORK */ - -extern void vPortEnterCritical( void ); -extern void vPortExitCritical( void ); - -#define portENTER_CRITICAL() vPortEnterCritical(); -#define portEXIT_CRITICAL() vPortExitCritical(); -/*-----------------------------------------------------------*/ - -/* Task function macros as described on the FreeRTOS.org WEB site. */ -#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) -#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) - -#endif /* PORTMACRO_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/MemMang/heap_1.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/MemMang/heap_1.c deleted file mode 100644 index fef991bf..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/MemMang/heap_1.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - -Changes between V2.5.1 and V2.5.1 - - + The memory pool has been defined within a struct to ensure correct memory - alignment on 32bit systems. - -Changes between V2.6.1 and V3.0.0 - - + An overflow check has been added to ensure the next free byte variable - does not wrap around. -*/ - - -/* - * The simplest possible implementation of pvPortMalloc(). Note that this - * implementation does NOT allow allocated memory to be freed again. - * - * See heap_2.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include -#include "FreeRTOS.h" -#include "task.h" - -/* Setup the correct byte alignment mask for the defined byte alignment. */ -#if portBYTE_ALIGNMENT == 4 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0000 ) -#endif - -#ifndef heapBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static struct xRTOS_HEAP -{ - unsigned portLONG ulDummy; - unsigned portCHAR ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -static size_t xNextFreeByte = ( size_t ) 0; -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn = NULL; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - #if portBYTE_ALIGNMENT != 1 - if( xWantedSize & heapBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) ); - } - #endif - - vTaskSuspendAll(); - { - /* Check there is enough room left for the allocation. */ - if( ( ( xNextFreeByte + xWantedSize ) < configTOTAL_HEAP_SIZE ) && - ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) )/* Check for overflow. */ - { - /* Return the next free byte then increment the index past this - block. */ - pvReturn = &( xHeap.ucHeap[ xNextFreeByte ] ); - xNextFreeByte += xWantedSize; - } - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - /* Memory cannot be freed using this scheme. See heap_2.c and heap_3.c - for alternative implementations, and the memory management pages of - http://www.FreeRTOS.org for more information. */ - ( void ) pv; -} -/*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* Only required when static memory is not cleared. */ - xNextFreeByte = ( size_t ) 0; -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/MemMang/heap_2.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/MemMang/heap_2.c deleted file mode 100644 index f9896cfe..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/MemMang/heap_2.c +++ /dev/null @@ -1,236 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* - * A sample implementation of pvPortMalloc() and vPortFree() that permits - * allocated blocks to be freed, but does not combine adjacent free blocks - * into a single larger block. - * - * See heap_1.c and heap_3.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* Setup the correct byte alignment mask for the defined byte alignment. */ -#if portBYTE_ALIGNMENT == 4 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0000 ) -#endif - -#ifndef heapBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -/* Allocate the memory for the heap. The struct is used to force byte -alignment without using any non-portable code. */ -static struct xRTOS_HEAP -{ - unsigned portLONG ulDummy; - unsigned portCHAR ucHeap[ configTOTAL_HEAP_SIZE ]; -} xHeap; - -/* Define the linked list structure. This is used to link free blocks in order -of their size. */ -typedef struct A_BLOCK_LINK -{ - struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */ - size_t xBlockSize; /*<< The size of the free block. */ -} xBlockLink; - - -static const unsigned portSHORT heapSTRUCT_SIZE = ( sizeof( xBlockLink ) + ( sizeof( xBlockLink ) % portBYTE_ALIGNMENT ) ); -#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) ) - -/* Create a couple of list links to mark the start and end of the list. */ -static xBlockLink xStart, xEnd; - -/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */ - -/* - * Insert a block into the list of free blocks - which is ordered by size of - * the block. Small blocks at the start of the list and large blocks at the end - * of the list. - */ -#define prvInsertBlockIntoFreeList( pxBlockToInsert ) \ -{ \ -xBlockLink *pxIterator; \ -size_t xBlockSize; \ - \ - xBlockSize = pxBlockToInsert->xBlockSize; \ - \ - /* Iterate through the list until a block is found that has a larger size */ \ - /* than the block we are inserting. */ \ - for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock ) \ - { \ - /* There is nothing to do here - just iterate to the correct position. */ \ - } \ - \ - /* Update the list to include the block being inserted in the correct */ \ - /* position. */ \ - pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; \ - pxIterator->pxNextFreeBlock = pxBlockToInsert; \ -} -/*-----------------------------------------------------------*/ - -#define prvHeapInit() \ -{ \ -xBlockLink *pxFirstFreeBlock; \ - \ - /* xStart is used to hold a pointer to the first item in the list of free */ \ - /* blocks. The void cast is used to prevent compiler warnings. */ \ - xStart.pxNextFreeBlock = ( void * ) xHeap.ucHeap; \ - xStart.xBlockSize = ( size_t ) 0; \ - \ - /* xEnd is used to mark the end of the list of free blocks. */ \ - xEnd.xBlockSize = configTOTAL_HEAP_SIZE; \ - xEnd.pxNextFreeBlock = NULL; \ - \ - /* To start with there is a single free block that is sized to take up the \ - entire heap space. */ \ - pxFirstFreeBlock = ( void * ) xHeap.ucHeap; \ - pxFirstFreeBlock->xBlockSize = configTOTAL_HEAP_SIZE; \ - pxFirstFreeBlock->pxNextFreeBlock = &xEnd; \ -} -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink; -static portBASE_TYPE xHeapHasBeenInitialised = pdFALSE; -void *pvReturn = NULL; - - vTaskSuspendAll(); - { - /* If this is the first call to malloc then the heap will require - initialisation to setup the list of free blocks. */ - if( xHeapHasBeenInitialised == pdFALSE ) - { - prvHeapInit(); - xHeapHasBeenInitialised = pdTRUE; - } - - /* The wanted size is increased so it can contain a xBlockLink - structure in addition to the requested amount of bytes. */ - if( xWantedSize > 0 ) - { - xWantedSize += heapSTRUCT_SIZE; - - /* Ensure that blocks are always aligned to the required number of bytes. */ - if( xWantedSize & heapBYTE_ALIGNMENT_MASK ) - { - /* Byte alignment required. */ - xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) ); - } - } - - if( ( xWantedSize > 0 ) && ( xWantedSize < configTOTAL_HEAP_SIZE ) ) - { - /* Blocks are stored in byte order - traverse the list from the start - (smallest) block until one of adequate size is found. */ - pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; - while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock ) ) - { - pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; - } - - /* If we found the end marker then a block of adequate size was not found. */ - if( pxBlock != &xEnd ) - { - /* Return the memory space - jumping over the xBlockLink structure - at its start. */ - pvReturn = ( void * ) ( ( ( unsigned portCHAR * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE ); - - /* This block is being returned for use so must be taken our of the - list of free blocks. */ - pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; - - /* If the block is larger than required it can be split into two. */ - if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) - { - /* This block is to be split into two. Create a new block - following the number of bytes requested. The void cast is - used to prevent byte alignment warnings from the compiler. */ - pxNewBlockLink = ( void * ) ( ( ( unsigned portCHAR * ) pxBlock ) + xWantedSize ); - - /* Calculate the sizes of two blocks split from the single - block. */ - pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; - - /* Insert the new block into the list of free blocks. */ - prvInsertBlockIntoFreeList( ( pxNewBlockLink ) ); - } - } - } - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ -unsigned portCHAR *puc = ( unsigned portCHAR * ) pv; -xBlockLink *pxLink; - - if( pv ) - { - /* The memory being freed will have an xBlockLink structure immediately - before it. */ - puc -= heapSTRUCT_SIZE; - - /* This casting is to keep the compiler from issuing warnings. */ - pxLink = ( void * ) puc; - - vTaskSuspendAll(); - { - /* Add this block to the list of free blocks. */ - prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) ); - } - xTaskResumeAll(); - } -} -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/MemMang/heap_3.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/MemMang/heap_3.c deleted file mode 100644 index 4b3ce0b7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/portable/MemMang/heap_3.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - - -/* - * Implementation of pvPortMalloc() and vPortFree() that relies on the - * compilers own malloc() and free() implementations. - * - * This file can only be used if the linker is configured to to generate - * a heap memory area. - * - * See heap_2.c and heap_1.c for alternative implementations, and the memory - * management pages of http://www.FreeRTOS.org for more information. - */ - -#include - -#include "FreeRTOS.h" -#include "task.h" - -/*-----------------------------------------------------------*/ - -void *pvPortMalloc( size_t xWantedSize ) -{ -void *pvReturn; - - vTaskSuspendAll(); - { - pvReturn = malloc( xWantedSize ); - } - xTaskResumeAll(); - - return pvReturn; -} -/*-----------------------------------------------------------*/ - -void vPortFree( void *pv ) -{ - if( pv ) - { - vTaskSuspendAll(); - { - free( pv ); - } - xTaskResumeAll(); - } -} - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/queue.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/queue.c deleted file mode 100644 index 0791ad55..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/queue.c +++ /dev/null @@ -1,882 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.01 - - + More use of 8bit data types. - + Function name prefixes changed where the data type returned has changed. - -Changed from V2.0.0 - - + Added the queue locking mechanism and make more use of the scheduler - suspension feature to minimise the time interrupts have to be disabled - when accessing a queue. - -Changed from V2.2.0 - - + Explicit use of 'signed' qualifier on portCHAR types added. - -Changes from V3.0.0 - - + API changes as described on the FreeRTOS.org WEB site. - -Changes from V3.2.3 - - + Added the queue functions that can be used from co-routines. - -Changes from V4.0.5 - - + Added a loop within xQueueSend() and xQueueReceive() to prevent the - functions exiting when a block time remains and the function has - not completed. - -*/ - -#include -#include -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/*----------------------------------------------------------- - * PUBLIC LIST API documented in list.h - *----------------------------------------------------------*/ - -/* Constants used with the cRxLock and cTxLock structure members. */ -#define queueUNLOCKED ( ( signed portBASE_TYPE ) -1 ) -#define queueERRONEOUS_UNBLOCK ( -1 ) - -/* - * Definition of the queue used by the scheduler. - * Items are queued by copy, not reference. - */ -typedef struct QueueDefinition -{ - signed portCHAR *pcHead; /*< Points to the beginning of the queue storage area. */ - signed portCHAR *pcTail; /*< Points to the byte at the end of the queue storage area. Once more byte is allocated than necessary to store the queue items, this is used as a marker. */ - - signed portCHAR *pcWriteTo; /*< Points to the free next place in the storage area. */ - signed portCHAR *pcReadFrom; /*< Points to the last place that a queued item was read from. */ - - xList xTasksWaitingToSend; /*< List of tasks that are blocked waiting to post onto this queue. Stored in priority order. */ - xList xTasksWaitingToReceive; /*< List of tasks that are blocked waiting to read from this queue. Stored in priority order. */ - - unsigned portBASE_TYPE uxMessagesWaiting;/*< The number of items currently in the queue. */ - unsigned portBASE_TYPE uxLength; /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */ - unsigned portBASE_TYPE uxItemSize; /*< The size of each items that the queue will hold. */ - - signed portBASE_TYPE xRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ - signed portBASE_TYPE xTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ -} xQUEUE; -/*-----------------------------------------------------------*/ - -/* - * Inside this file xQueueHandle is a pointer to a xQUEUE structure. - * To keep the definition private the API header file defines it as a - * pointer to void. - */ -typedef xQUEUE * xQueueHandle; - -/* - * Prototypes for public functions are included here so we don't have to - * include the API header file (as it defines xQueueHandle differently). These - * functions are documented in the API header file. - */ -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ); -signed portBASE_TYPE xQueueSend( xQueueHandle xQueue, const void * pvItemToQueue, portTickType xTicksToWait ); -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue ); -void vQueueDelete( xQueueHandle xQueue ); -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ); -signed portBASE_TYPE xQueueReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - -#if configUSE_CO_ROUTINES == 1 - signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ); - signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ); - signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ); - signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ); -#endif - -/* - * Unlocks a queue locked by a call to prvLockQueue. Locking a queue does not - * prevent an ISR from adding or removing items to the queue, but does prevent - * an ISR from removing tasks from the queue event lists. If an ISR finds a - * queue is locked it will instead increment the appropriate queue lock count - * to indicate that a task may require unblocking. When the queue in unlocked - * these lock counts are inspected, and the appropriate action taken. - */ -static void prvUnlockQueue( xQueueHandle pxQueue ); - -/* - * Uses a critical section to determine if there is any data in a queue. - * - * @return pdTRUE if the queue contains no items, otherwise pdFALSE. - */ -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ); - -/* - * Uses a critical section to determine if there is any space in a queue. - * - * @return pdTRUE if there is no space, otherwise pdFALSE; - */ -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ); - -/* - * Macro that copies an item into the queue. This is done by copying the item - * byte for byte, not by reference. Updates the queue state to ensure it's - * integrity after the copy. - */ -#define prvCopyQueueData( pxQueue, pvItemToQueue ) \ -{ \ - memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( unsigned ) pxQueue->uxItemSize ); \ - ++( pxQueue->uxMessagesWaiting ); \ - pxQueue->pcWriteTo += pxQueue->uxItemSize; \ - if( pxQueue->pcWriteTo >= pxQueue->pcTail ) \ - { \ - pxQueue->pcWriteTo = pxQueue->pcHead; \ - } \ -} -/*-----------------------------------------------------------*/ - -/* - * Macro to mark a queue as locked. Locking a queue prevents an ISR from - * accessing the queue event lists. - */ -#define prvLockQueue( pxQueue ) \ -{ \ - taskENTER_CRITICAL(); \ - ++( pxQueue->xRxLock ); \ - ++( pxQueue->xTxLock ); \ - taskEXIT_CRITICAL(); \ -} -/*-----------------------------------------------------------*/ - - -/*----------------------------------------------------------- - * PUBLIC QUEUE MANAGEMENT API documented in queue.h - *----------------------------------------------------------*/ - -xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ) -{ -xQUEUE *pxNewQueue; -size_t xQueueSizeInBytes; - - /* Allocate the new queue structure. */ - if( uxQueueLength > ( unsigned portBASE_TYPE ) 0 ) - { - pxNewQueue = ( xQUEUE * ) pvPortMalloc( sizeof( xQUEUE ) ); - if( pxNewQueue != NULL ) - { - /* Create the list of pointers to queue items. The queue is one byte - longer than asked for to make wrap checking easier/faster. */ - xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ) + ( size_t ) 1; - - pxNewQueue->pcHead = ( signed portCHAR * ) pvPortMalloc( xQueueSizeInBytes ); - if( pxNewQueue->pcHead != NULL ) - { - /* Initialise the queue members as described above where the - queue type is defined. */ - pxNewQueue->pcTail = pxNewQueue->pcHead + ( uxQueueLength * uxItemSize ); - pxNewQueue->uxMessagesWaiting = 0; - pxNewQueue->pcWriteTo = pxNewQueue->pcHead; - pxNewQueue->pcReadFrom = pxNewQueue->pcHead + ( ( uxQueueLength - 1 ) * uxItemSize ); - pxNewQueue->uxLength = uxQueueLength; - pxNewQueue->uxItemSize = uxItemSize; - pxNewQueue->xRxLock = queueUNLOCKED; - pxNewQueue->xTxLock = queueUNLOCKED; - - /* Likewise ensure the event queues start with the correct state. */ - vListInitialise( &( pxNewQueue->xTasksWaitingToSend ) ); - vListInitialise( &( pxNewQueue->xTasksWaitingToReceive ) ); - - return pxNewQueue; - } - else - { - vPortFree( pxNewQueue ); - } - } - } - - /* Will only reach here if we could not allocate enough memory or no memory - was required. */ - return NULL; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; -xTimeOutType xTimeOut; - - /* Make sure other tasks do not access the queue. */ - vTaskSuspendAll(); - - /* Capture the current time status for future reference. */ - vTaskSetTimeOutState( &xTimeOut ); - - /* It is important that this is the only thread/ISR that modifies the - ready or delayed lists until xTaskResumeAll() is called. Places where - the ready/delayed lists are modified include: - - + vTaskDelay() - Nothing can call vTaskDelay as the scheduler is - suspended, vTaskDelay() cannot be called from an ISR. - + vTaskPrioritySet() - Has a critical section around the access. - + vTaskSwitchContext() - This will not get executed while the scheduler - is suspended. - + prvCheckDelayedTasks() - This will not get executed while the - scheduler is suspended. - + xTaskCreate() - Has a critical section around the access. - + vTaskResume() - Has a critical section around the access. - + xTaskResumeAll() - Has a critical section around the access. - + xTaskRemoveFromEventList - Checks to see if the scheduler is - suspended. If so then the TCB being removed from the event is - removed from the event and added to the xPendingReadyList. - */ - - /* Make sure interrupts do not access the queue event list. */ - prvLockQueue( pxQueue ); - - /* It is important that interrupts to not access the event list of the - queue being modified here. Places where the event list is modified - include: - - + xQueueSendFromISR(). This checks the lock on the queue to see if - it has access. If the queue is locked then the Tx lock count is - incremented to signify that a task waiting for data can be made ready - once the queue lock is removed. If the queue is not locked then - a task can be moved from the event list, but will not be removed - from the delayed list or placed in the ready list until the scheduler - is unlocked. - - + xQueueReceiveFromISR(). As per xQueueSendFromISR(). - */ - - /* If the queue is already full we may have to block. */ - do - { - if( prvIsQueueFull( pxQueue ) ) - { - /* The queue is full - do we want to block or just leave without - posting? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* We are going to place ourselves on the xTasksWaitingToSend event - list, and will get woken should the delay expire, or space become - available on the queue. - - As detailed above we do not require mutual exclusion on the event - list as nothing else can modify it or the ready lists while we - have the scheduler suspended and queue locked. - - It is possible that an ISR has removed data from the queue since we - checked if any was available. If this is the case then the data - will have been copied from the queue, and the queue variables - updated, but the event list will not yet have been checked to see if - anything is waiting as the queue is locked. */ - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait ); - - /* Force a context switch now as we are blocked. We can do - this from within a critical section as the task we are - switching to has its own context. When we return here (i.e. we - unblock) we will leave the critical section as normal. - - It is possible that an ISR has caused an event on an unrelated and - unlocked queue. If this was the case then the event list for that - queue will have been updated but the ready lists left unchanged - - instead the readied task will have been added to the pending ready - list. */ - taskENTER_CRITICAL(); - { - /* We can safely unlock the queue and scheduler here as - interrupts are disabled. We must not yield with anything - locked, but we can yield from within a critical section. - - Tasks that have been placed on the pending ready list cannot - be tasks that are waiting for events on this queue. See - in comment xTaskRemoveFromEventList(). */ - prvUnlockQueue( pxQueue ); - - /* Resuming the scheduler may cause a yield. If so then there - is no point yielding again here. */ - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - - /* Before leaving the critical section we have to ensure - exclusive access again. */ - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - } - taskEXIT_CRITICAL(); - } - } - - /* When we are here it is possible that we unblocked as space became - available on the queue. It is also possible that an ISR posted to the - queue since we left the critical section, so it may be that again there - is no space. This would only happen if a task and ISR post onto the - same queue. */ - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - /* There is room in the queue, copy the data into the queue. */ - prvCopyQueueData( pxQueue, pvItemToQueue ); - xReturn = pdPASS; - - /* Update the TxLock count so prvUnlockQueue knows to check for - tasks waiting for data to become available in the queue. */ - ++( pxQueue->xTxLock ); - } - else - { - xReturn = errQUEUE_FULL; - } - } - taskEXIT_CRITICAL(); - - if( xReturn == errQUEUE_FULL ) - { - if( xTicksToWait > 0 ) - { - if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - { - xReturn = queueERRONEOUS_UNBLOCK; - } - } - } - } - while( xReturn == queueERRONEOUS_UNBLOCK ); - - prvUnlockQueue( pxQueue ); - xTaskResumeAll(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xTaskPreviouslyWoken ) -{ - /* Similar to xQueueSend, except we don't block if there is no room in the - queue. Also we don't directly wake a task that was blocked on a queue - read, instead we return a flag to say whether a context switch is required - or not (i.e. has a task with a higher priority than us been woken by this - post). */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - prvCopyQueueData( pxQueue, pvItemToQueue ); - - /* If the queue is locked we do not alter the event list. This will - be done when the queue is unlocked later. */ - if( pxQueue->xTxLock == queueUNLOCKED ) - { - /* We only want to wake one task per ISR, so check that a task has - not already been woken. */ - if( !xTaskPreviouslyWoken ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - return pdTRUE; - } - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was posted while it was locked. */ - ++( pxQueue->xTxLock ); - } - } - - return xTaskPreviouslyWoken; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; -xTimeOutType xTimeOut; - - /* This function is very similar to xQueueSend(). See comments within - xQueueSend() for a more detailed explanation. - - Make sure other tasks do not access the queue. */ - vTaskSuspendAll(); - - /* Capture the current time status for future reference. */ - vTaskSetTimeOutState( &xTimeOut ); - - /* Make sure interrupts do not access the queue. */ - prvLockQueue( pxQueue ); - - do - { - /* If there are no messages in the queue we may have to block. */ - if( prvIsQueueEmpty( pxQueue ) ) - { - /* There are no messages in the queue, do we want to block or just - leave with nothing? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); - taskENTER_CRITICAL(); - { - prvUnlockQueue( pxQueue ); - if( !xTaskResumeAll() ) - { - taskYIELD(); - } - - vTaskSuspendAll(); - prvLockQueue( pxQueue ); - } - taskEXIT_CRITICAL(); - } - } - - taskENTER_CRITICAL(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - /* Increment the lock count so prvUnlockQueue knows to check for - tasks waiting for space to become available on the queue. */ - ++( pxQueue->xRxLock ); - xReturn = pdPASS; - } - else - { - xReturn = errQUEUE_EMPTY; - } - } - taskEXIT_CRITICAL(); - - if( xReturn == errQUEUE_EMPTY ) - { - if( xTicksToWait > 0 ) - { - if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - { - xReturn = queueERRONEOUS_UNBLOCK; - } - } - } - } while( xReturn == queueERRONEOUS_UNBLOCK ); - - /* We no longer require exclusive access to the queue. */ - prvUnlockQueue( pxQueue ); - xTaskResumeAll(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ) -{ -signed portBASE_TYPE xReturn; - - /* We cannot block from an ISR, so check there is data available. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Copy the data from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - /* If the queue is locked we will not modify the event list. Instead - we update the lock count so the task that unlocks the queue will know - that an ISR has removed data while the queue was locked. */ - if( pxQueue->xRxLock == queueUNLOCKED ) - { - /* We only want to wake one task per ISR, so check that a task has - not already been woken. */ - if( !( *pxTaskWoken ) ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - /* The task waiting has a higher priority than us so - force a context switch. */ - *pxTaskWoken = pdTRUE; - } - } - } - } - else - { - /* Increment the lock count so the task that unlocks the queue - knows that data was removed while it was locked. */ - ++( pxQueue->xRxLock ); - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxQueueMessagesWaiting( xQueueHandle pxQueue ) -{ -unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - uxReturn = pxQueue->uxMessagesWaiting; - taskEXIT_CRITICAL(); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -void vQueueDelete( xQueueHandle pxQueue ) -{ - vPortFree( pxQueue->pcHead ); - vPortFree( pxQueue ); -} -/*-----------------------------------------------------------*/ - -static void prvUnlockQueue( xQueueHandle pxQueue ) -{ - /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */ - - /* The lock counts contains the number of extra data items placed or - removed from the queue while the queue was locked. When a queue is - locked items can be added or removed, but the event lists cannot be - updated. */ - taskENTER_CRITICAL(); - { - --( pxQueue->xTxLock ); - - /* See if data was added to the queue while it was locked. */ - if( pxQueue->xTxLock > queueUNLOCKED ) - { - pxQueue->xTxLock = queueUNLOCKED; - - /* Data was posted while the queue was locked. Are any tasks - blocked waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* Tasks that are removed from the event list will get added to - the pending ready list as the scheduler is still suspended. */ - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The task waiting has a higher priority so record that a - context switch is required. */ - vTaskMissedYield(); - } - } - } - } - taskEXIT_CRITICAL(); - - /* Do the same for the Rx lock. */ - taskENTER_CRITICAL(); - { - --( pxQueue->xRxLock ); - - if( pxQueue->xRxLock > queueUNLOCKED ) - { - pxQueue->xRxLock = queueUNLOCKED; - - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - vTaskMissedYield(); - } - } - } - } - taskEXIT_CRITICAL(); -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ) -{ -signed portBASE_TYPE xReturn; - - taskENTER_CRITICAL(); - xReturn = ( pxQueue->uxMessagesWaiting == pxQueue->uxLength ); - taskEXIT_CRITICAL(); - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* If the queue is already full we may have to block. A critical section - is required to prevent an interrupt removing something from the queue - between the check to see if the queue is full and blocking on the queue. */ - portDISABLE_INTERRUPTS(); - { - if( prvIsQueueFull( pxQueue ) ) - { - /* The queue is full - do we want to block or just leave without - posting? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* As this is called from a coroutine we cannot block directly, but - return indicating that we need to block. */ - vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) ); - portENABLE_INTERRUPTS(); - return errQUEUE_BLOCKED; - } - else - { - portENABLE_INTERRUPTS(); - return errQUEUE_FULL; - } - } - } - portENABLE_INTERRUPTS(); - - portNOP(); - - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - /* There is room in the queue, copy the data into the queue. */ - prvCopyQueueData( pxQueue, pvItemToQueue ); - xReturn = pdPASS; - - /* Were any co-routines waiting for data to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - /* In this instance the co-routine could be placed directly - into the ready list as we are within a critical section. - Instead the same pending ready list mechansim is used as if - the event were caused from within an interrupt. */ - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - /* The co-routine waiting has a higher priority so record - that a yield might be appropriate. */ - xReturn = errQUEUE_YIELD; - } - } - } - else - { - xReturn = errQUEUE_FULL; - } - } - portENABLE_INTERRUPTS(); - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) -{ -signed portBASE_TYPE xReturn; - - /* If the queue is already empty we may have to block. A critical section - is required to prevent an interrupt adding something to the queue - between the check to see if the queue is empty and blocking on the queue. */ - portDISABLE_INTERRUPTS(); - { - if( prvIsQueueEmpty( pxQueue ) ) - { - /* There are no messages in the queue, do we want to block or just - leave with nothing? */ - if( xTicksToWait > ( portTickType ) 0 ) - { - /* As this is a co-routine we cannot block directly, but return - indicating that we need to block. */ - vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) ); - portENABLE_INTERRUPTS(); - return errQUEUE_BLOCKED; - } - else - { - portENABLE_INTERRUPTS(); - return errQUEUE_FULL; - } - } - } - portENABLE_INTERRUPTS(); - - portNOP(); - - portDISABLE_INTERRUPTS(); - { - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Data is available from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - xReturn = pdPASS; - - /* Were any co-routines waiting for space to become available? */ - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - /* In this instance the co-routine could be placed directly - into the ready list as we are within a critical section. - Instead the same pending ready list mechansim is used as if - the event were caused from within an interrupt. */ - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - xReturn = errQUEUE_YIELD; - } - } - } - else - { - xReturn = pdFAIL; - } - } - portENABLE_INTERRUPTS(); - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - - - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ) -{ - /* Cannot block within an ISR so if there is no space on the queue then - exit without doing anything. */ - if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) - { - prvCopyQueueData( pxQueue, pvItemToQueue ); - - /* We only want to wake one co-routine per ISR, so check that a - co-routine has not already been woken. */ - if( !xCoRoutinePreviouslyWoken ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) ) - { - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - { - return pdTRUE; - } - } - } - } - - return xCoRoutinePreviouslyWoken; -} -#endif -/*-----------------------------------------------------------*/ - -#if configUSE_CO_ROUTINES == 1 -signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxCoRoutineWoken ) -{ -signed portBASE_TYPE xReturn; - - /* We cannot block from an ISR, so check there is data available. If - not then just leave without doing anything. */ - if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 ) - { - /* Copy the data from the queue. */ - pxQueue->pcReadFrom += pxQueue->uxItemSize; - if( pxQueue->pcReadFrom >= pxQueue->pcTail ) - { - pxQueue->pcReadFrom = pxQueue->pcHead; - } - --( pxQueue->uxMessagesWaiting ); - memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - - if( !( *pxCoRoutineWoken ) ) - { - if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) ) - { - if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - { - *pxCoRoutineWoken = pdTRUE; - } - } - } - - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -#endif -/*-----------------------------------------------------------*/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/tasks.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/tasks.c deleted file mode 100644 index 20d5a6b9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/freertos/tasks.c +++ /dev/null @@ -1,1814 +0,0 @@ -/* - FreeRTOS.org V4.1.0 - Copyright (C) 2003-2006 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - See http://www.FreeRTOS.org for documentation, latest information, license - and contact details. Please ensure to read the configuration and relevant - port sections of the online documentation. - *************************************************************************** -*/ - -/* -Changes from V1.00: - - + Call to portRESTORE_CONTEXT has been removed. The first context - switch is now performed within sPortStartScheduler(). - -Changes from V1.01: - - + More use of 8bit data types. - + Function name prefixes changed where the data type returned has changed. - + configUSE_TRACE_FACILITY is no longer defined by default. - -Changes from V1.2.0 - - + Introduced ucTopReadyPriority. This tracks the highest priority ready - queue that contains a valid TCB and thus makes the context switch - slightly faster. - - + prvAddTaskToReadyQueue() has been made a macro. - -Changes from V1.2.6 - - + Added conditional compilation directives. - + Extended API. - + Rearranged function order. - + Creating a task now causes a context switch if the task being created - has a higher priority than the calling task - assuming the kernel is - running. - + vTaskDelete() now only causes a context switch if the calling task is - the task being deleted. - -Changes from V2.0.0 - - + Allow the type of the tick count to be 16 or 32 bits. - + Introduce xPendingReadyList feature to allow the time interrupts have to - be disabled to be minimised. - + Remove the #if( INCLUDE_vTaskSuspendAll ) statements. vTaskSuspendAll() - is now always included as it is used by the scheduler itself. - -Changes from V2.1.0 - - + Bug fix - pxCurrentTCB is now initialised before the call to - prvInitializeTaskLists(). Previously pxCurrentTCB could be accessed - while null. - -Changed from V2.1.1 - - + Change to where lStackSize is declared within sTaskCreate() to prevent - compiler warnings with 8051 port. - -Changes from V2.2.0 - - + Explicit use of 'signed' qualifier on portCHAR types added. - + Changed odd calculation of initial pxTopOfStack value when - portSTACK_GROWTH < 0. - + Removed pcVersionNumber definition. - -Changes from V2.5.3 - - + cTaskResumeAll() modified to ensure it can be called prior to the task - lists being initialised. - -Changes from V2.5.5 - - + Added API function vTaskDelayUntil(). - + Added INCLUDE_vTaskDelay conditional compilation. - -Changes from V2.6.0 - - + Updated the vWriteTraceToBuffer macro to always be 4 byte aligned so it - can be used on ARM architectures. - + tskMAX_TASK_NAME_LEN definition replaced with the port specific - configMAX_TASK_NAME_LEN definition. - + Removed the call to strcpy when copying across the task name into the - TCB. - + Added ucTasksDeleted variable to prevent vTaskSuspendAll() being called - too often in the idle task. - -Changes between V3.0.0 and V2.6.1 - - + When resuming the scheduler a yield is performed if either a tick has - been missed, or a task is moved from the pending ready list into a ready - list. Previously a yield was not performed on this second condition. - + Introduced the type portBASE_TYPE. This necessitates several API - changes. - + Removed the sUsingPreemption variable. The constant defined in - portmacro.h is now used directly. - + The idle task can now include an optional hook function - and no longer - completes its time slice if other tasks with equal priority to it are - ready to run. - + See the FreeRTOS.org documentation for more information on V2.x.x to - V3.x.x modifications. - -Changes from V3.1.1 - - + Modified vTaskPrioritySet() and vTaskResume() to allow these functions to - be called while the scheduler is suspended. - + Corrected the task ordering within event lists. - -Changes from V3.2.0 - - + Added function xTaskGetCurrentTaskHandle(). - -Changes from V3.2.4 - - + Changed the volatile declarations on some variables to reflect the - changes to the list definitions. - + Changed the order of the TCB definition so there is commonality between - the task control block and a co-routine control block. - + Allow the scheduler to be started even if no tasks other than the idle - task has been created. This allows co-routines to run even when no tasks - have been created. - + The need for a context switch is now signalled if a task woken by an - event has a priority greater or equal to the currently running task. - Previously this was only greater than. - -Changes from V4.0.0 - - + Added the xMissedYield handling. - -Changes from V4.0.1 - - + The function vTaskList() now suspends the scheduler rather than disabling - interrupts during the creation of the task list. - + Allow a task to delete itself by passing in its own handle. Previously - this could only be done by passing in NULL. - + The tick hook function is now called only within a tick isr. Previously - it was also called when the tick function was called during the scheduler - unlocking process. - -Changes from V4.0.3 - - + Extra checks have been placed in vTaskPrioritySet() to avoid unnecessary - yields. - -Changed from V4.0.4 - - + Bug fix: The 'value' of the event list item is updated when the priority - of a task is changed. Previously only the priority of the TCB itself was - changed. - + When resuming a task a check is first made to see if the task is actually - suspended. - + vTaskPrioritySet() and vTaskResume() no longer use the event list item. - This has not been necessary since V4.0.1 when the xMissedYield handling - was added. - + Implement xTaskResumeFromISR(). - -Changes from V4.0.5 - - + Added utility functions and xOverflowCount variable to facilitate the - queue.c changes. -*/ - -#include -#include -#include - -#include "FreeRTOS.h" -#include "task.h" - -/* - * Macro to define the amount of stack available to the idle task. - */ -#define tskIDLE_STACK_SIZE configMINIMAL_STACK_SIZE - - -/* - * Default a definitions for backwards compatibility with old - * portmacro.h files. - */ -#ifndef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 16 -#endif - -#ifndef INCLUDE_xTaskGetCurrentTaskHandle - #define INCLUDE_xTaskGetCurrentTaskHandle 0 -#endif - -#ifndef configIDLE_SHOULD_YIELD - #define configIDLE_SHOULD_YIELD 1 -#endif - -#if configMAX_TASK_NAME_LEN < 1 - #undef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 1 -#endif - -#ifndef INCLUDE_xTaskResumeFromISR - #define INCLUDE_xTaskResumeFromISR 1 -#endif - -/* - * Task control block. A task control block (TCB) is allocated to each task, - * and stores the context of the task. - */ -typedef struct tskTaskControlBlock -{ - volatile portSTACK_TYPE *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE STRUCT. */ - xListItem xGenericListItem; /*< List item used to place the TCB in ready and blocked queues. */ - xListItem xEventListItem; /*< List item used to place the TCB in event lists. */ - unsigned portBASE_TYPE uxPriority; /*< The priority of the task where 0 is the lowest priority. */ - portSTACK_TYPE *pxStack; /*< Points to the start of the stack. */ - unsigned portBASE_TYPE uxTCBNumber; /*< This is used for tracing the scheduler and making debugging easier only. */ - signed portCHAR pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */ - unsigned portSHORT usStackDepth; /*< Total depth of the stack (when empty). This is defined as the number of variables the stack can hold, not the number of bytes. */ -} tskTCB; - -/*lint -e956 */ - -tskTCB * volatile pxCurrentTCB = NULL; - -/* Lists for ready and blocked tasks. --------------------*/ - -static xList pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */ -static xList xDelayedTaskList1; /*< Delayed tasks. */ -static xList xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */ -static xList * volatile pxDelayedTaskList; /*< Points to the delayed task list currently being used. */ -static xList * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */ -static xList xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready queue when the scheduler is resumed. */ - -#if ( INCLUDE_vTaskDelete == 1 ) - - static volatile xList xTasksWaitingTermination; /*< Tasks that have been deleted - but the their memory not yet freed. */ - static volatile unsigned portBASE_TYPE uxTasksDeleted = ( unsigned portBASE_TYPE ) 0; - -#endif - -#if ( INCLUDE_vTaskSuspend == 1 ) - - static xList xSuspendedTaskList; /*< Tasks that are currently suspended. */ - -#endif - -/* File private variables. --------------------------------*/ -static volatile unsigned portBASE_TYPE uxCurrentNumberOfTasks = ( unsigned portBASE_TYPE ) 0; -static volatile portTickType xTickCount = ( portTickType ) 0; -static unsigned portBASE_TYPE uxTopUsedPriority = tskIDLE_PRIORITY; -static volatile unsigned portBASE_TYPE uxTopReadyPriority = tskIDLE_PRIORITY; -static volatile signed portBASE_TYPE xSchedulerRunning = pdFALSE; -static volatile unsigned portBASE_TYPE uxSchedulerSuspended = ( unsigned portBASE_TYPE ) pdFALSE; -static volatile unsigned portBASE_TYPE uxMissedTicks = ( unsigned portBASE_TYPE ) 0; -static volatile portBASE_TYPE xMissedYield = ( portBASE_TYPE ) pdFALSE; -static volatile portBASE_TYPE xNumOfOverflows = ( portBASE_TYPE ) 0; -/* Debugging and trace facilities private variables and macros. ------------*/ - -/* - * The value used to fill the stack of a task when the task is created. This - * is used purely for checking the high water mark for tasks. - */ -#define tskSTACK_FILL_BYTE ( 0xa5 ) - -/* - * Macros used by vListTask to indicate which state a task is in. - */ -#define tskBLOCKED_CHAR ( ( signed portCHAR ) 'B' ) -#define tskREADY_CHAR ( ( signed portCHAR ) 'R' ) -#define tskDELETED_CHAR ( ( signed portCHAR ) 'D' ) -#define tskSUSPENDED_CHAR ( ( signed portCHAR ) 'S' ) - -/* - * Macros and private variables used by the trace facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define tskSIZE_OF_EACH_TRACE_LINE ( ( unsigned portLONG ) ( sizeof( unsigned portLONG ) + sizeof( unsigned portLONG ) ) ) - static volatile signed portCHAR * volatile pcTraceBuffer; - static signed portCHAR *pcTraceBufferStart; - static signed portCHAR *pcTraceBufferEnd; - static signed portBASE_TYPE xTracing = pdFALSE; - -#endif - -/* - * Macro that writes a trace of scheduler activity to a buffer. This trace - * shows which task is running when and is very useful as a debugging tool. - * As this macro is called each context switch it is a good idea to undefine - * it if not using the facility. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - #define vWriteTraceToBuffer() \ - { \ - if( xTracing ) \ - { \ - static unsigned portBASE_TYPE uxPreviousTask = 255; \ - \ - if( uxPreviousTask != pxCurrentTCB->uxTCBNumber ) \ - { \ - if( ( pcTraceBuffer + tskSIZE_OF_EACH_TRACE_LINE ) < pcTraceBufferEnd ) \ - { \ - uxPreviousTask = pxCurrentTCB->uxTCBNumber; \ - *( unsigned portLONG * ) pcTraceBuffer = ( unsigned portLONG ) xTickCount; \ - pcTraceBuffer += sizeof( unsigned portLONG ); \ - *( unsigned portLONG * ) pcTraceBuffer = ( unsigned portLONG ) uxPreviousTask; \ - pcTraceBuffer += sizeof( unsigned portLONG ); \ - } \ - else \ - { \ - xTracing = pdFALSE; \ - } \ - } \ - } \ - } - -#else - - #define vWriteTraceToBuffer() - -#endif - - -/* - * Place the task represented by pxTCB into the appropriate ready queue for - * the task. It is inserted at the end of the list. One quirk of this is - * that if the task being inserted is at the same priority as the currently - * executing task, then it will only be rescheduled after the currently - * executing task has been rescheduled. - */ -#define prvAddTaskToReadyQueue( pxTCB ) \ -{ \ - if( pxTCB->uxPriority > uxTopReadyPriority ) \ - { \ - uxTopReadyPriority = pxTCB->uxPriority; \ - } \ - vListInsertEnd( ( xList * ) &( pxReadyTasksLists[ pxTCB->uxPriority ] ), &( pxTCB->xGenericListItem ) ); \ -} - -/* - * Macro that looks at the list of tasks that are currently delayed to see if - * any require waking. - * - * Tasks are stored in the queue in the order of their wake time - meaning - * once one tasks has been found whose timer has not expired we need not look - * any further down the list. - */ -#define prvCheckDelayedTasks() \ -{ \ -register tskTCB *pxTCB; \ - \ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ) ) != NULL ) \ - { \ - if( xTickCount < listGET_LIST_ITEM_VALUE( &( pxTCB->xGenericListItem ) ) ) \ - { \ - break; \ - } \ - vListRemove( &( pxTCB->xGenericListItem ) ); \ - /* Is the task waiting on an event also? */ \ - if( pxTCB->xEventListItem.pvContainer ) \ - { \ - vListRemove( &( pxTCB->xEventListItem ) ); \ - } \ - prvAddTaskToReadyQueue( pxTCB ); \ - } \ -} - -/* - * Several functions take an xTaskHandle parameter that can optionally be NULL, - * where NULL is used to indicate that the handle of the currently executing - * task should be used in place of the parameter. This macro simply checks to - * see if the parameter is NULL and returns a pointer to the appropriate TCB. - */ -#define prvGetTCBFromHandle( pxHandle ) ( ( pxHandle == NULL ) ? ( tskTCB * ) pxCurrentTCB : ( tskTCB * ) pxHandle ) - - -/* File private functions. --------------------------------*/ - -/* - * Utility to ready a TCB for a given task. Mainly just copies the parameters - * into the TCB structure. - */ -static void prvInitialiseTCBVariables( tskTCB *pxTCB, unsigned portSHORT usStackDepth, const signed portCHAR * const pcName, unsigned portBASE_TYPE uxPriority ); - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first task. - */ -static void prvInitialiseTaskLists( void ); - -/* - * The idle task, which as all tasks is implemented as a never ending loop. - * The idle task is automatically created and added to the ready lists upon - * creation of the first user task. - * - * The portTASK_FUNCTION_PROTO() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters ); - -/* - * Utility to free all memory allocated by the scheduler to hold a TCB, - * including the stack pointed to by the TCB. - * - * This does not free memory allocated by the task itself (i.e. memory - * allocated by calls to pvPortMalloc from within the tasks application code). - */ -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - static void prvDeleteTCB( tskTCB *pxTCB ); -#endif - -/* - * Used only by the idle task. This checks to see if anything has been placed - * in the list of tasks waiting to be deleted. If so the task is cleaned up - * and its TCB deleted. - */ -static void prvCheckTasksWaitingTermination( void ); - -/* - * Allocates memory from the heap for a TCB and associated stack. Checks the - * allocation was successful. - */ -static tskTCB *prvAllocateTCBAndStack( unsigned portSHORT usStackDepth ); - -/* - * Called from vTaskList. vListTasks details all the tasks currently under - * control of the scheduler. The tasks may be in one of a number of lists. - * prvListTaskWithinSingleList accepts a list and details the tasks from - * within just that list. - * - * THIS FUNCTION IS INTENDED FOR DEBUGGING ONLY, AND SHOULD NOT BE CALLED FROM - * NORMAL APPLICATION CODE. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( signed portCHAR *pcWriteBuffer, xList *pxList, signed portCHAR cStatus ); - -#endif - -/* - * When a task is created, the stack of the task is filled with a known value. - * This function determines the 'high water mark' of the task stack by - * determining how much of the stack remains at the original preset value. - */ -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned portSHORT usTaskCheckFreeStackSpace( const unsigned portCHAR *pucStackByte ); - -#endif - -/*lint +e956 */ - - - - - -/*----------------------------------------------------------- - * TASK CREATION API documented in task.h - *----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask ) -{ -signed portBASE_TYPE xReturn; -tskTCB * pxNewTCB; -static unsigned portBASE_TYPE uxTaskNumber = 0; /*lint !e956 Static is deliberate - this is guarded before use. */ - - /* Allocate the memory required by the TCB and stack for the new task. - checking that the allocation was successful. */ - pxNewTCB = prvAllocateTCBAndStack( usStackDepth ); - - if( pxNewTCB != NULL ) - { - portSTACK_TYPE *pxTopOfStack; - - /* Setup the newly allocated TCB with the initial state of the task. */ - prvInitialiseTCBVariables( pxNewTCB, usStackDepth, pcName, uxPriority ); - - /* Calculate the top of stack address. This depends on whether the - stack grows from high memory to low (as per the 80x86) or visa versa. - portSTACK_GROWTH is used to make the result positive or negative as - required by the port. */ - #if portSTACK_GROWTH < 0 - { - pxTopOfStack = pxNewTCB->pxStack + ( pxNewTCB->usStackDepth - 1 ); - } - #else - { - pxTopOfStack = pxNewTCB->pxStack; - } - #endif - - /* Initialize the TCB stack to look as if the task was already running, - but had been interrupted by the scheduler. The return address is set - to the start of the task function. Once the stack has been initialised - the top of stack variable is updated. */ - pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pvTaskCode, pvParameters ); - - /* We are going to manipulate the task queues to add this task to a - ready list, so must make sure no interrupts occur. */ - portENTER_CRITICAL(); - { - uxCurrentNumberOfTasks++; - if( uxCurrentNumberOfTasks == ( unsigned portBASE_TYPE ) 1 ) - { - /* As this is the first task it must also be the current task. */ - pxCurrentTCB = pxNewTCB; - - /* This is the first task to be created so do the preliminary - initialisation required. We will not recover if this call - fails, but we will report the failure. */ - prvInitialiseTaskLists(); - } - else - { - /* If the scheduler is not already running, make this task the - current task if it is the highest priority task to be created - so far. */ - if( xSchedulerRunning == pdFALSE ) - { - if( pxCurrentTCB->uxPriority <= uxPriority ) - { - pxCurrentTCB = pxNewTCB; - } - } - } - - /* Remember the top priority to make context switching faster. Use - the priority in pxNewTCB as this has been capped to a valid value. */ - if( pxNewTCB->uxPriority > uxTopUsedPriority ) - { - uxTopUsedPriority = pxNewTCB->uxPriority; - } - - /* Add a counter into the TCB for tracing only. */ - pxNewTCB->uxTCBNumber = uxTaskNumber; - uxTaskNumber++; - - prvAddTaskToReadyQueue( pxNewTCB ); - - xReturn = pdPASS; - } - portEXIT_CRITICAL(); - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - if( xReturn == pdPASS ) - { - if( ( void * ) pxCreatedTask != NULL ) - { - /* Pass the TCB out - in an anonymous way. The calling function/ - task can use this as a handle to delete the task later if - required.*/ - *pxCreatedTask = ( xTaskHandle ) pxNewTCB; - } - - if( xSchedulerRunning != pdFALSE ) - { - /* If the created task is of a higher priority than the current task - then it should run now. */ - if( pxCurrentTCB->uxPriority < uxPriority ) - { - taskYIELD(); - } - } - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelete == 1 ) - - void vTaskDelete( xTaskHandle pxTaskToDelete ) - { - tskTCB *pxTCB; - - taskENTER_CRITICAL(); - { - /* Ensure a yield is performed if the current task is being - deleted. */ - if( pxTaskToDelete == pxCurrentTCB ) - { - pxTaskToDelete = NULL; - } - - /* If null is passed in here then we are deleting ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToDelete ); - - /* Remove task from the ready list and place in the termination list. - This will stop the task from be scheduled. The idle task will check - the termination list and free up any memory allocated by the - scheduler for the TCB and stack. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xTasksWaitingTermination, &( pxTCB->xGenericListItem ) ); - - /* Increment the ucTasksDeleted variable so the idle task knows - there is a task that has been deleted and that it should therefore - check the xTasksWaitingTermination list. */ - ++uxTasksDeleted; - } - taskEXIT_CRITICAL(); - - /* Force a reschedule if we have just deleted the current task. */ - if( xSchedulerRunning != pdFALSE ) - { - if( ( void * ) pxTaskToDelete == NULL ) - { - taskYIELD(); - } - } - } - -#endif - - - - - - -/*----------------------------------------------------------- - * TASK CONTROL API documented in task.h - *----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelayUntil == 1 ) - - void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement ) - { - portTickType xTimeToWake; - portBASE_TYPE xAlreadyYielded, xShouldDelay = pdFALSE; - - vTaskSuspendAll(); - { - /* Generate the tick time at which the task wants to wake. */ - xTimeToWake = *pxPreviousWakeTime + xTimeIncrement; - - if( xTickCount < *pxPreviousWakeTime ) - { - /* The tick count has overflowed since this function was - lasted called. In this case the only time we should ever - actually delay is if the wake time has also overflowed, - and the wake time is greater than the tick time. When this - is the case it is as if neither time had overflowed. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - else - { - /* The tick time has not overflowed. In this case we will - delay if either the wake time has overflowed, and/or the - tick time is less than the wake time. */ - if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xTickCount ) ) - { - xShouldDelay = pdTRUE; - } - } - - /* Update the wake time ready for the next call. */ - *pxPreviousWakeTime = xTimeToWake; - - if( xShouldDelay ) - { - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - } - xAlreadyYielded = xTaskResumeAll(); - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskDelay == 1 ) - - void vTaskDelay( portTickType xTicksToDelay ) - { - portTickType xTimeToWake; - signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* A delay time of zero just forces a reschedule. */ - if( xTicksToDelay > ( portTickType ) 0 ) - { - vTaskSuspendAll(); - { - /* A task that is removed from the event list while the - scheduler is suspended will not get placed in the ready - list or removed from the blocked list until the scheduler - is resumed. - - This task cannot be in an event list as it is the currently - executing task. */ - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - } - xAlreadyYielded = xTaskResumeAll(); - } - - /* Force a reschedule if xTaskResumeAll has not already done so, we may - have put ourselves to sleep. */ - if( !xAlreadyYielded ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_uxTaskPriorityGet == 1 ) - - unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxReturn; - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxReturn = pxTCB->uxPriority; - } - taskEXIT_CRITICAL(); - - return uxReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskPrioritySet == 1 ) - - void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ) - { - tskTCB *pxTCB; - unsigned portBASE_TYPE uxCurrentPriority, xYieldRequired = pdFALSE; - - /* Ensure the new priority is valid. */ - if( uxNewPriority >= configMAX_PRIORITIES ) - { - uxNewPriority = configMAX_PRIORITIES - 1; - } - - taskENTER_CRITICAL(); - { - /* If null is passed in here then we are changing the - priority of the calling function. */ - pxTCB = prvGetTCBFromHandle( pxTask ); - uxCurrentPriority = pxTCB->uxPriority; - - if( uxCurrentPriority != uxNewPriority ) - { - /* The priority change may have readied a task of higher - priority than the calling task. */ - if( uxNewPriority > pxCurrentTCB->uxPriority ) - { - if( pxTask != NULL ) - { - /* The priority of another task is being raised. If we - were raising the priority of the currently running task - there would be no need to switch as it must have already - been the highest priority task. */ - xYieldRequired = pdTRUE; - } - } - else if( pxTask == NULL ) - { - /* Setting our own priority down means there may now be another - task of higher priority that is ready to execute. */ - xYieldRequired = pdTRUE; - } - - pxTCB->uxPriority = uxNewPriority; - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxNewPriority ); - - /* If the task is in the blocked or suspended list we need do - nothing more than change it's priority variable. However, if - the task is in a ready list it needs to be removed and placed - in the queue appropriate to its new priority. */ - if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxCurrentPriority ] ), &( pxTCB->xGenericListItem ) ) ) - { - /* The task is currently in its ready list - remove before adding - it to it's new ready list. As we are in a critical section we - can do this even if the scheduler is suspended. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - - if( xYieldRequired == pdTRUE ) - { - taskYIELD(); - } - } - } - taskEXIT_CRITICAL(); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskSuspend( xTaskHandle pxTaskToSuspend ) - { - tskTCB *pxTCB; - - taskENTER_CRITICAL(); - { - /* Ensure a yield is performed if the current task is being - suspended. */ - if( pxTaskToSuspend == pxCurrentTCB ) - { - pxTaskToSuspend = NULL; - } - - /* If null is passed in here then we are suspending ourselves. */ - pxTCB = prvGetTCBFromHandle( pxTaskToSuspend ); - - /* Remove task from the ready/delayed list and place in the suspended list. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - - /* Is the task waiting on an event also? */ - if( pxTCB->xEventListItem.pvContainer ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - } - - vListInsertEnd( ( xList * ) &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ); - } - taskEXIT_CRITICAL(); - - /* We may have just suspended the current task. */ - if( ( void * ) pxTaskToSuspend == NULL ) - { - taskYIELD(); - } - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_vTaskSuspend == 1 ) - - void vTaskResume( xTaskHandle pxTaskToResume ) - { - tskTCB *pxTCB; - - /* Remove the task from whichever list it is currently in, and place - it in the ready list. */ - pxTCB = ( tskTCB * ) pxTaskToResume; - - /* The parameter cannot be NULL as it is impossible to resume the - currently executing task. */ - if( pxTCB != NULL ) - { - taskENTER_CRITICAL(); - { - /* Is the task we are attempting to resume actually suspended? */ - if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ) != pdFALSE ) - { - /* Has the task already been resumed from within an ISR? */ - if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) != pdTRUE ) - { - /* As we are in a critical section we can access the ready - lists even if the scheduler is suspended. */ - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* We may have just resumed a higher priority task. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - /* This yield may not cause the task just resumed to run, but - will leave the lists in the correct state for the next yield. */ - taskYIELD(); - } - } - } - } - taskEXIT_CRITICAL(); - } - } - -#endif - -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - tskTCB *pxTCB; - - pxTCB = ( tskTCB * ) pxTaskToResume; - - /* Is the task we are attempting to resume actually suspended? */ - if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ) != pdFALSE ) - { - /* Has the task already been resumed from within an ISR? */ - if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) != pdTRUE ) - { - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - xYieldRequired = ( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed, at which point a - yield will be preformed if necessary. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxTCB->xEventListItem ) ); - } - } - } - - return xYieldRequired; - } - -#endif - - - - -/*----------------------------------------------------------- - * PUBLIC SCHEDULER CONTROL documented in task.h - *----------------------------------------------------------*/ - - -void vTaskStartScheduler( void ) -{ -portBASE_TYPE xReturn; - - /* Add the idle task at the lowest priority. */ - xReturn = xTaskCreate( prvIdleTask, ( signed portCHAR * ) "IDLE", tskIDLE_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, ( xTaskHandle * ) NULL ); - - if( xReturn == pdPASS ) - { - /* Interrupts are turned off here, to ensure a tick does not occur - before or during the call to xPortStartScheduler(). The stacks of - the created tasks contain a status word with interrupts switched on - so interrupts will automatically get re-enabled when the first task - starts to run. - - STEPPING THROUGH HERE USING A DEBUGGER CAN CAUSE BIG PROBLEMS IF THE - DEBUGGER ALLOWS INTERRUPTS TO BE PROCESSED. */ - portDISABLE_INTERRUPTS(); - - xSchedulerRunning = pdTRUE; - xTickCount = ( portTickType ) 0; - - /* Setting up the timer tick is hardware specific and thus in the - portable interface. */ - if( xPortStartScheduler() ) - { - /* Should not reach here as if the scheduler is running the - function will not return. */ - } - else - { - /* Should only reach here if a task calls xTaskEndScheduler(). */ - } - } -} -/*-----------------------------------------------------------*/ - -void vTaskEndScheduler( void ) -{ - /* Stop the scheduler interrupts and call the portable scheduler end - routine so the original ISRs can be restored if necessary. The port - layer must ensure interrupts enable bit is left in the correct state. */ - portDISABLE_INTERRUPTS(); - xSchedulerRunning = pdFALSE; - vPortEndScheduler(); -} -/*----------------------------------------------------------*/ - -void vTaskSuspendAll( void ) -{ - portENTER_CRITICAL(); - ++uxSchedulerSuspended; - portEXIT_CRITICAL(); -} -/*----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskResumeAll( void ) -{ -register tskTCB *pxTCB; -signed portBASE_TYPE xAlreadyYielded = pdFALSE; - - /* It is possible that an ISR caused a task to be removed from an event - list while the scheduler was suspended. If this was the case then the - removed task will have been added to the xPendingReadyList. Once the - scheduler has been resumed it is safe to move all the pending ready - tasks from this list into their appropriate ready list. */ - portENTER_CRITICAL(); - { - --uxSchedulerSuspended; - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - if( uxCurrentNumberOfTasks > ( unsigned portBASE_TYPE ) 0 ) - { - portBASE_TYPE xYieldRequired = pdFALSE; - - /* Move any readied tasks from the pending list into the - appropriate ready list. */ - while( ( pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xPendingReadyList ) ) ) != NULL ) - { - vListRemove( &( pxTCB->xEventListItem ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxTCB ); - - /* If we have moved a task that has a priority higher than - the current task then we should yield. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - xYieldRequired = pdTRUE; - } - } - - /* If any ticks occurred while the scheduler was suspended then - they should be processed now. This ensures the tick count does not - slip, and that any delayed tasks are resumed at the correct time. */ - if( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - while( uxMissedTicks > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskIncrementTick(); - --uxMissedTicks; - } - - /* As we have processed some ticks it is appropriate to yield - to ensure the highest priority task that is ready to run is - the task actually running. */ - xYieldRequired = pdTRUE; - } - - if( ( xYieldRequired == pdTRUE ) || ( xMissedYield == pdTRUE ) ) - { - xAlreadyYielded = pdTRUE; - xMissedYield = pdFALSE; - taskYIELD(); - } - } - } - } - portEXIT_CRITICAL(); - - return xAlreadyYielded; -} - - - - - - -/*----------------------------------------------------------- - * PUBLIC TASK UTILITIES documented in task.h - *----------------------------------------------------------*/ - - - -portTickType xTaskGetTickCount( void ) -{ -portTickType xTicks; - - /* Critical section required if running on a 16 bit processor. */ - taskENTER_CRITICAL(); - { - xTicks = xTickCount; - } - taskEXIT_CRITICAL(); - - return xTicks; -} -/*-----------------------------------------------------------*/ - -unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ) -{ -unsigned portBASE_TYPE uxNumberOfTasks; - - taskENTER_CRITICAL(); - uxNumberOfTasks = uxCurrentNumberOfTasks; - taskEXIT_CRITICAL(); - - return uxNumberOfTasks; -} -/*-----------------------------------------------------------*/ - -#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_vTaskDelete == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskList( signed portCHAR *pcWriteBuffer ) - { - unsigned portBASE_TYPE uxQueue; - - /* This is a VERY costly function that should be used for debug only. - It leaves interrupts disabled for a LONG time. */ - - vTaskSuspendAll(); - { - /* Run through all the lists that could potentially contain a TCB and - report the task name, state and stack high water mark. */ - - pcWriteBuffer[ 0 ] = ( signed portCHAR ) 0x00; - strcat( ( portCHAR * ) pcWriteBuffer, ( const portCHAR * ) "\r\n" ); - - uxQueue = uxTopUsedPriority + 1; - - do - { - uxQueue--; - - if( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxQueue ] ) ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &( pxReadyTasksLists[ uxQueue ] ), tskREADY_CHAR ); - } - }while( uxQueue > ( unsigned portSHORT ) tskIDLE_PRIORITY ); - - if( !listLIST_IS_EMPTY( pxDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( pxOverflowDelayedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxOverflowDelayedTaskList, tskBLOCKED_CHAR ); - } - - if( !listLIST_IS_EMPTY( &xTasksWaitingTermination ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xTasksWaitingTermination, tskDELETED_CHAR ); - } - - if( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &xSuspendedTaskList, tskSUSPENDED_CHAR ); - } - } - xTaskResumeAll(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - void vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize ) - { - portENTER_CRITICAL(); - { - pcTraceBuffer = ( volatile signed portCHAR * volatile )pcBuffer; - pcTraceBufferStart = pcBuffer; - pcTraceBufferEnd = pcBuffer + ( ulBufferSize - tskSIZE_OF_EACH_TRACE_LINE ); - xTracing = pdTRUE; - } - portEXIT_CRITICAL(); - } - -#endif -/*----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - unsigned portLONG ulTaskEndTrace( void ) - { - unsigned portLONG ulBufferLength; - - portENTER_CRITICAL(); - xTracing = pdFALSE; - portEXIT_CRITICAL(); - - ulBufferLength = ( unsigned portLONG ) ( pcTraceBuffer - pcTraceBufferStart ); - - return ulBufferLength; - } - -#endif - - - -/*----------------------------------------------------------- - * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES - * documented in task.h - *----------------------------------------------------------*/ - - -inline void vTaskIncrementTick( void ) -{ - /* Called by the portable layer each time a tick interrupt occurs. - Increments the tick then checks to see if the new tick value will cause any - tasks to be unblocked. */ - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - ++xTickCount; - if( xTickCount == ( portTickType ) 0 ) - { - xList *pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. - If there are any items in pxDelayedTaskList here then there is - an error! */ - pxTemp = pxDelayedTaskList; - pxDelayedTaskList = pxOverflowDelayedTaskList; - pxOverflowDelayedTaskList = pxTemp; - xNumOfOverflows++; - } - - /* See if this tick has made a timeout expire. */ - prvCheckDelayedTasks(); - } - else - { - ++uxMissedTicks; - - /* The tick hook gets called at regular intervals, even if the - scheduler is locked. */ - #if ( configUSE_TICK_HOOK == 1 ) - { - extern void vApplicationTickHook( void ); - - vApplicationTickHook(); - } - #endif - } - - #if ( configUSE_TICK_HOOK == 1 ) - { - extern void vApplicationTickHook( void ); - - /* Guard against the tick hook being called when the missed tick - count is being unwound (when the scheduler is being unlocked. */ - if( uxMissedTicks == 0 ) - { - vApplicationTickHook(); - } - } - #endif -} -/*-----------------------------------------------------------*/ - -#if ( ( INCLUDE_vTaskCleanUpResources == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) - - void vTaskCleanUpResources( void ) - { - unsigned portSHORT usQueue; - volatile tskTCB *pxTCB; - - usQueue = ( unsigned portSHORT ) uxTopUsedPriority + ( unsigned portSHORT ) 1; - - /* Remove any TCB's from the ready queues. */ - do - { - usQueue--; - - while( !listLIST_IS_EMPTY( &( pxReadyTasksLists[ usQueue ] ) ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &( pxReadyTasksLists[ usQueue ] ) ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - }while( usQueue > ( unsigned portSHORT ) tskIDLE_PRIORITY ); - - /* Remove any TCB's from the delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList1 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList1 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - /* Remove any TCB's from the overflow delayed queue. */ - while( !listLIST_IS_EMPTY( &xDelayedTaskList2 ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xDelayedTaskList2 ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - while( !listLIST_IS_EMPTY( &xSuspendedTaskList ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xSuspendedTaskList ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - - while( !listLIST_IS_EMPTY( &xPendingReadyList ) ) - { - listGET_OWNER_OF_NEXT_ENTRY( pxTCB, &xPendingReadyList ); - vListRemove( ( xListItem * ) &( pxTCB->xGenericListItem ) ); - - prvDeleteTCB( ( tskTCB * ) pxTCB ); - } - } - -#endif -/*-----------------------------------------------------------*/ - -void vTaskSwitchContext( void ) -{ - if( uxSchedulerSuspended != ( unsigned portBASE_TYPE ) pdFALSE ) - { - /* The scheduler is currently suspended - do not allow a context - switch. */ - xMissedYield = pdTRUE; - return; - } - - /* Find the highest priority queue that contains ready tasks. */ - while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopReadyPriority ] ) ) ) - { - --uxTopReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the tasks of the - same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopReadyPriority ] ) ); - vWriteTraceToBuffer(); -} -/*-----------------------------------------------------------*/ - -void vTaskPlaceOnEventList( xList *pxEventList, portTickType xTicksToWait ) -{ -portTickType xTimeToWake; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. */ - - /* Place the event list item of the TCB in the appropriate event list. - This is placed in the list in priority order so the highest priority task - is the first to be woken by the event. */ - vListInsert( ( xList * ) pxEventList, ( xListItem * ) &( pxCurrentTCB->xEventListItem ) ); - - /* Calculate the time at which the task should be woken if the event does - not occur. This may overflow but this doesn't matter. */ - xTimeToWake = xTickCount + xTicksToWait; - - /* We must remove ourselves from the ready list before adding ourselves - to the blocked list as the same list item is used for both lists. We have - exclusive access to the ready lists as the scheduler is locked. */ - vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - - listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xTickCount ) - { - /* Wake time has overflowed. Place this item in the overflow list. */ - vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the current block list. */ - vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -signed portBASE_TYPE xTaskRemoveFromEventList( const xList *pxEventList ) -{ -tskTCB *pxUnblockedTCB; -portBASE_TYPE xReturn; - - /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE - SCHEDULER SUSPENDED. It can also be called from within an ISR. */ - - /* The event list is sorted in priority order, so we can remove the - first in the list, remove the TCB from the delayed list, and add - it to the ready list. - - If an event is for a queue that is locked then this function will never - get called - the lock count on the queue will get modified instead. This - means we can always expect exclusive access to the event list here. */ - pxUnblockedTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - vListRemove( &( pxUnblockedTCB->xEventListItem ) ); - - if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE ) - { - vListRemove( &( pxUnblockedTCB->xGenericListItem ) ); - prvAddTaskToReadyQueue( pxUnblockedTCB ); - } - else - { - /* We cannot access the delayed or ready lists, so will hold this - task pending until the scheduler is resumed. */ - vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) ); - } - - if( pxUnblockedTCB->uxPriority >= pxCurrentTCB->uxPriority ) - { - /* Return true if the task removed from the event list has - a higher priority than the calling task. This allows - the calling task to know if it should force a context - switch now. */ - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vTaskSetTimeOutState( xTimeOutType *pxTimeOut ) -{ - pxTimeOut->xOverflowCount = xNumOfOverflows; - pxTimeOut->xTimeOnEntering = xTickCount; -} -/*-----------------------------------------------------------*/ - -portBASE_TYPE xTaskCheckForTimeOut( xTimeOutType *pxTimeOut, portTickType *pxTicksToWait ) -{ -portBASE_TYPE xReturn; - - if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xTickCount > pxTimeOut->xTimeOnEntering ) ) - { - /* The tick count is greater than the time at which vTaskSetTimeout() - was called, but has also overflowed since vTaskSetTimeOut() was called. - It must have wrapped all the way around and gone past us again. This - passed since vTaskSetTimeout() was called. */ - xReturn = pdTRUE; - } - else if( ( xTickCount - pxTimeOut->xTimeOnEntering ) < *pxTicksToWait ) - { - /* Not a genuine timeout. Adjust parameters for time remaining. */ - *pxTicksToWait -= ( xTickCount - pxTimeOut->xTimeOnEntering ); - vTaskSetTimeOutState( pxTimeOut ); - xReturn = pdFALSE; - } - else - { - xReturn = pdTRUE; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vTaskMissedYield( void ) -{ - xMissedYield = pdTRUE; -} - -/* - * ----------------------------------------------------------- - * The Idle task. - * ---------------------------------------------------------- - * - * The portTASK_FUNCTION() macro is used to allow port/compiler specific - * language extensions. The equivalent prototype for this function is: - * - * void prvIdleTask( void *pvParameters ); - * - */ -static portTASK_FUNCTION( prvIdleTask, pvParameters ) -{ - /* Stop warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /* See if any tasks have been deleted. */ - prvCheckTasksWaitingTermination(); - - #if ( configUSE_PREEMPTION == 0 ) - { - /* If we are not using preemption we keep forcing a task switch to - see if any other task has become available. If we are using - preemption we don't need to do this as any task becoming available - will automatically get the processor anyway. */ - taskYIELD(); - } - #endif - - #if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) - { - /* When using preemption tasks of equal priority will be - timesliced. If a task that is sharing the idle priority is ready - to run then the idle task should yield before the end of the - timeslice. - - A critical region is not required here as we are just reading from - the list, and an occasional incorrect value will not matter. If - the ready list at the idle priority contains more than one task - then a task other than the idle task is ready to execute. */ - if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( unsigned portBASE_TYPE ) 1 ) - { - taskYIELD(); - } - } - #endif - - #if ( configUSE_IDLE_HOOK == 1 ) - { - extern void vApplicationIdleHook( void ); - - /* Call the user defined function from within the idle task. This - allows the application designer to add background functionality - without the overhead of a separate task. - NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES, - CALL A FUNCTION THAT MIGHT BLOCK. */ - vApplicationIdleHook(); - } - #endif - } -} /*lint !e715 pvParameters is not accessed but all task functions require the same prototype. */ - - - - - - - -/*----------------------------------------------------------- - * File private functions documented at the top of the file. - *----------------------------------------------------------*/ - - - -static void prvInitialiseTCBVariables( tskTCB *pxTCB, unsigned portSHORT usStackDepth, const signed portCHAR * const pcName, unsigned portBASE_TYPE uxPriority ) -{ - pxTCB->usStackDepth = usStackDepth; - - /* Store the function name in the TCB. */ - strncpy( ( char * ) pxTCB->pcTaskName, ( const char * ) pcName, ( unsigned portSHORT ) configMAX_TASK_NAME_LEN ); - pxTCB->pcTaskName[ ( unsigned portSHORT ) configMAX_TASK_NAME_LEN - ( unsigned portSHORT ) 1 ] = '\0'; - - /* This is used as an array index so must ensure it's not too large. */ - if( uxPriority >= configMAX_PRIORITIES ) - { - uxPriority = configMAX_PRIORITIES - 1; - } - - pxTCB->uxPriority = uxPriority; - - vListInitialiseItem( &( pxTCB->xGenericListItem ) ); - vListInitialiseItem( &( pxTCB->xEventListItem ) ); - - /* Set the pxTCB as a link back from the xListItem. This is so we can get - back to the containing TCB from a generic item in a list. */ - listSET_LIST_ITEM_OWNER( &( pxTCB->xGenericListItem ), pxTCB ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority ); - listSET_LIST_ITEM_OWNER( &( pxTCB->xEventListItem ), pxTCB ); -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseTaskLists( void ) -{ -unsigned portBASE_TYPE uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( xList * ) &( pxReadyTasksLists[ uxPriority ] ) ); - } - - vListInitialise( ( xList * ) &xDelayedTaskList1 ); - vListInitialise( ( xList * ) &xDelayedTaskList2 ); - vListInitialise( ( xList * ) &xPendingReadyList ); - - #if ( INCLUDE_vTaskDelete == 1 ) - { - vListInitialise( ( xList * ) &xTasksWaitingTermination ); - } - #endif - - #if ( INCLUDE_vTaskSuspend == 1 ) - { - vListInitialise( ( xList * ) &xSuspendedTaskList ); - } - #endif - - /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList - using list2. */ - pxDelayedTaskList = &xDelayedTaskList1; - pxOverflowDelayedTaskList = &xDelayedTaskList2; -} -/*-----------------------------------------------------------*/ - -static void prvCheckTasksWaitingTermination( void ) -{ - #if ( INCLUDE_vTaskDelete == 1 ) - { - portBASE_TYPE xListIsEmpty; - - /* ucTasksDeleted is used to prevent vTaskSuspendAll() being called - too often in the idle task. */ - if( uxTasksDeleted > ( unsigned portBASE_TYPE ) 0 ) - { - vTaskSuspendAll(); - xListIsEmpty = listLIST_IS_EMPTY( &xTasksWaitingTermination ); - xTaskResumeAll(); - - if( !xListIsEmpty ) - { - tskTCB *pxTCB; - - portENTER_CRITICAL(); - { - pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xTasksWaitingTermination ) ); - vListRemove( &( pxTCB->xGenericListItem ) ); - --uxCurrentNumberOfTasks; - --uxTasksDeleted; - } - portEXIT_CRITICAL(); - - prvDeleteTCB( pxTCB ); - } - } - } - #endif -} -/*-----------------------------------------------------------*/ - -static tskTCB *prvAllocateTCBAndStack( unsigned portSHORT usStackDepth ) -{ -tskTCB *pxNewTCB; - - /* Allocate space for the TCB. Where the memory comes from depends on - the implementation of the port malloc function. */ - pxNewTCB = ( tskTCB * ) pvPortMalloc( sizeof( tskTCB ) ); - - if( pxNewTCB != NULL ) - { - /* Allocate space for the stack used by the task being created. - The base of the stack memory stored in the TCB so the task can - be deleted later if required. */ - pxNewTCB->pxStack = ( portSTACK_TYPE * ) pvPortMalloc( ( ( size_t )usStackDepth ) * sizeof( portSTACK_TYPE ) ); - - if( pxNewTCB->pxStack == NULL ) - { - /* Could not allocate the stack. Delete the allocated TCB. */ - vPortFree( pxNewTCB ); - pxNewTCB = NULL; - } - else - { - /* Just to help debugging. */ - memset( pxNewTCB->pxStack, tskSTACK_FILL_BYTE, usStackDepth * sizeof( portSTACK_TYPE ) ); - } - } - - return pxNewTCB; -} -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - - static void prvListTaskWithinSingleList( signed portCHAR *pcWriteBuffer, xList *pxList, signed portCHAR cStatus ) - { - volatile tskTCB *pxNextTCB, *pxFirstTCB; - static portCHAR pcStatusString[ 50 ]; - unsigned portSHORT usStackRemaining; - - /* Write the details of all the TCB's in pxList into the buffer. */ - listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); - do - { - listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); - usStackRemaining = usTaskCheckFreeStackSpace( ( unsigned portCHAR * ) pxNextTCB->pxStack ); - sprintf( pcStatusString, ( portCHAR * ) "%s\t\t%c\t%u\t%u\t%u\r\n", pxNextTCB->pcTaskName, cStatus, ( unsigned int ) pxNextTCB->uxPriority, usStackRemaining, ( unsigned int ) pxNextTCB->uxTCBNumber ); - strcat( ( portCHAR * ) pcWriteBuffer, ( portCHAR * ) pcStatusString ); - - } while( pxNextTCB != pxFirstTCB ); - } - -#endif -/*-----------------------------------------------------------*/ - -#if ( configUSE_TRACE_FACILITY == 1 ) - unsigned portSHORT usTaskCheckFreeStackSpace( const unsigned portCHAR *pucStackByte ) - { - register unsigned portSHORT usCount = 0; - - while( *pucStackByte == tskSTACK_FILL_BYTE ) - { - pucStackByte -= portSTACK_GROWTH; - usCount++; - } - - usCount /= sizeof( portSTACK_TYPE ); - - return usCount; - } -#endif -/*-----------------------------------------------------------*/ - - - -#if ( ( INCLUDE_vTaskDelete == 1 ) || ( INCLUDE_vTaskCleanUpResources == 1 ) ) - - static void prvDeleteTCB( tskTCB *pxTCB ) - { - /* Free up the memory allocated by the scheduler for the task. It is up to - the task to free any memory allocated at the application level. */ - vPortFree( pxTCB->pxStack ); - vPortFree( pxTCB ); - } - -#endif - - -/*-----------------------------------------------------------*/ - -#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) - - xTaskHandle xTaskGetCurrentTaskHandle( void ) - { - xTaskHandle xReturn; - - portENTER_CRITICAL(); - { - xReturn = ( xTaskHandle ) pxCurrentTCB; - } - portEXIT_CRITICAL(); - - return xReturn; - } - -#endif - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/71x_lib.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/71x_lib.c deleted file mode 100644 index a161fc2d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/71x_lib.c +++ /dev/null @@ -1,158 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_lib.c -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Peripherals pointers initialization -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#define EXT - -#include "71x_map.h" - -#ifdef LIBDEBUG - -extern u32 T0TIMI_Addr; - -/******************************************************************************* -* Function Name : debug -* Description : Initialize the pointers to peripherals -* Input : none -* Output : none -* Return : none -*******************************************************************************/ -void libdebug(void) -{ - #ifdef _ADC12 - ADC12 = (ADC12_TypeDef *)ADC12_BASE; - #endif - - #ifdef _APB - #ifdef _APB1 - APB1 = (APB_TypeDef *)(APB1_BASE+0x10); - #endif - #ifdef _APB2 - APB2 = (APB_TypeDef *)(APB2_BASE+0x10); - #endif - #endif - - #ifdef _BSPI - #ifdef _BSPI0 - BSPI0 = (BSPI_TypeDef *)BSPI0_BASE; - #endif - #ifdef _BSPI1 - BSPI1 = (BSPI_TypeDef *)BSPI1_BASE; - #endif - #endif - - #ifdef _CAN - CAN = (CAN_TypeDef *)CAN_BASE; - #endif - - #ifdef _EIC - EIC = (EIC_TypeDef *)EIC_BASE; - #endif - - #ifdef _EMI - EMI = (EMI_TypeDef *)EMI_BASE; - #endif - - #ifdef _FLASH - FLASHR = (FLASHR_TypeDef *)FLASHR_BASE; - FLASHPR = (FLASHPR_TypeDef *)FLASHPR_BASE; - #endif - - #ifdef _GPIO - #ifdef _GPIO0 - GPIO0 = (GPIO_TypeDef *)GPIO0_BASE; - #endif - #ifdef _GPIO1 - GPIO1 = (GPIO_TypeDef *)GPIO1_BASE; - #endif - #ifdef _GPIO2 - GPIO2 = (GPIO_TypeDef *)GPIO2_BASE; - #endif - #endif - - #ifdef _I2C - #ifdef _I2C0 - I2C0 = (I2C_TypeDef *)I2C0_BASE; - #endif - #ifdef _I2C1 - I2C1 = (I2C_TypeDef *)I2C1_BASE; - #endif - #endif - - #ifdef _PCU - PCU = (PCU_TypeDef *)PCU_BASE; - #endif - - #ifdef _RCCU - RCCU = (RCCU_TypeDef *)RCCU_BASE; - #endif - - #ifdef _RTC - RTC = (RTC_TypeDef *)RTC_BASE; - #endif - - #ifdef _TIM - #ifdef _TIM0 - TIM0 = (TIM_TypeDef *)TIM0_BASE; - #endif - #ifdef _TIM1 - TIM1 = (TIM_TypeDef *)TIM1_BASE; - #endif - #ifdef _TIM2 - TIM2 = (TIM_TypeDef *)TIM2_BASE; - #endif - #ifdef _TIM3 - TIM3 = (TIM_TypeDef *)TIM3_BASE; - #endif - #endif - - #ifdef _UART - #ifdef _UART0 - UART0 = (UART_TypeDef *)UART0_BASE; - #endif - #ifdef _UART1 - UART1 = (UART_TypeDef *)UART1_BASE; - #endif - #ifdef _UART2 - UART2 = (UART_TypeDef *)UART2_BASE; - #endif - #ifdef _UART3 - UART3 = (UART_TypeDef *)UART3_BASE; - #endif - #endif - - #ifdef _USB - USB = (USB_TypeDef *)USB_BASE; - #endif - - #ifdef _WDG - WDG = (WDG_TypeDef *)WDG_BASE; - #endif - - #ifdef _XTI - XTI = (XTI_TypeDef *)XTI_BASE; - #endif - - #ifdef _IRQVectors - IRQVectors = (IRQVectors_TypeDef *)&T0TIMI_Addr; - #endif -} - -#endif /* LIBDEBUG */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/adc12.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/adc12.c deleted file mode 100644 index a300fa35..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/adc12.c +++ /dev/null @@ -1,79 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : adc12.c -* Author : MCD Application Team -* Date First Issued : 07/31/2003 -* Description : Code sources of ADC12 functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#include "adc12.h" - -/******************************************************************************* -* Function Name : ADC12_Init -* Description : Initialize the ADC -* Input : None. -* Return : None. -*******************************************************************************/ -void ADC12_Init(void) -{ - //Initiate ADC12 registers to their reset values - ADC12->CSR = 0x00; - ADC12->CPR = 0x01; -} - -/******************************************************************************* -* Function Name : ADC12_PrescalerConfig -* Description : Configure the prescaler -* Input : None. -* Return : None. -*******************************************************************************/ -void ADC12_PrescalerConfig(u32 Adc12_clk) -{ - //Update the Prescaler Register - ADC12->CPR = (vu16) (RCCU_FrequencyValue(RCCU_PCLK)/(Adc12_clk*512*8)); -} - -/******************************************************************************* -* Function Name : ADC12_ITConfig -* Description : enable or disable the interrupt -* Input : status=ENABLE=>enable interrupt -* status=DISABLE=>disable interrupt -* Return : None -*******************************************************************************/ -void ADC12_ITConfig(FunctionalState NewState) -{ - if (NewState == ENABLE) - { - // Test the conversion mode - if (ADC12->CSR & 0x0040) - { - // Set interrupt bit equivalent to the channel selected - switch (ADC12->CSR & 0x30) - { - case 0x00 : ADC12->CSR |= ADC12_IT0_Mask; break; - case 0x10 : ADC12->CSR |= ADC12_IT1_Mask; break; - case 0x20 : ADC12->CSR |= ADC12_IT2_Mask; break; - case 0x30 : ADC12->CSR |= ADC12_IT3_Mask; break; - } - } - else - // Set all interrupt bits in case of round robin mode - ADC12->CSR |= ADC12_IT_Mask; - } - else - // Clear all interrupt bits - ADC12->CSR &= ~ADC12_IT_Mask; -} -/*********************(c) 2003 STMicroelectronics********************* END OF FILE **/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/apb.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/apb.c deleted file mode 100644 index ec171401..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/apb.c +++ /dev/null @@ -1,24 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : apb.c -* Author : MCD Application Team -* Date First Issued : 05/30/2003 -* Description : This file provides all the APB software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "apb.h" - - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/bspi.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/bspi.c deleted file mode 100644 index acbe3418..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/bspi.c +++ /dev/null @@ -1,171 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : bspi.c -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : This file provides all the BSPI software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "bspi.h" - -/******************************************************************************* -* Function Name : BSPI_Init -* Description : Initializes BSPI peripheral control and registers to their default reset values. -* Input : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Output : BSPI peripheral registers and BSPI global variables are initialized. -* Return : None. -*******************************************************************************/ -void BSPI_Init(BSPI_TypeDef *BSPIx) -{ - BSPIx->CSR2 = 0x41; - BSPIx->CSR1 = 0x00; - BSPIx->CLK = 0x06; -} - -/******************************************************************************* -* Function Name : BSPI_TrItSrc. -* Description : Configures the transmit interrupt source. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : TrItSrc: specifies the transmit interrupt source. -* : Refer to the section ‘Transmit Interrupt Sources’ for more details on the -* : allowed values of this parameter. -* Output : TIE bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -void BSPI_TrItSrc(BSPI_TypeDef *BSPIx, BSPI_TR_IT_SRCS TrItSrc) -{ - switch (TrItSrc) - { - case BSPI_TR_DIS: - BSPIx->CSR2 &= ~0xC000; - break; - case BSPI_TR_FE: - BSPIx->CSR2 &= ~0x8000; - BSPIx->CSR2 |= 0x4000; - break; - case BSPI_TR_UFL: - BSPIx->CSR2 &= ~0x4000; - BSPIx->CSR2 |= 0x8000; - break; - case BSPI_TR_FF: - BSPIx->CSR2 |= 0xC000; - break; - } -} - -/******************************************************************************* -* Function Name : BSPI_RcItSrc. -* Description : Configures the receive interrupt source. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : RcItSrc: specifies the source for the receive interrupt. -* : Refer to the section ‘Receive Interrupt Sources’ for more details on the -* : allowed values of this parameter. -* Output : RIE bit in BSPCSR1 is register. -* Return : None. -*******************************************************************************/ -void BSPI_RcItSrc(BSPI_TypeDef *BSPIx, BSPI_RC_IR_SRCS RcItSrc) -{ - switch (RcItSrc) - { - case BSPI_RC_DIS: - BSPIx->CSR1 &= ~0x000C; - break; - case BSPI_RC_FNE: - BSPIx->CSR1 &= ~0x0008; - BSPIx->CSR1 |= 0x0004; - break; - case BSPI_RC_FF: - BSPIx->CSR1 |= 0x000C; - break; - } -} - -/******************************************************************************* -* Function Name : BSPI_TrFifoDepth -* Description : Configures BSPI transmission FIFO number of words. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI. -* Input 2 : TDepth:specifies the depth of the transmit FIFO. -* Output : TFE bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -void BSPI_TrFifoDepth(BSPI_TypeDef *BSPIx, u8 TDepth) -{ - if (TDepth > 0 && TDepth < 11) - { - TDepth--; - BSPIx->CSR2 &= (TDepth*0x400) | ~0x3C00; - BSPIx->CSR2 |= TDepth*0x400; - } - else BSPIx->CSR2 &= ~0x3C00; -} - -/******************************************************************************* -* Function Name : BSPI_RcFifoDepth -* Description : Configures BSPI reception FIFO number of words. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : RDepth:specifies the depth of the receive FIFO. -* Output : RFE bits [3:0] in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -void BSPI_RcFifoDepth(BSPI_TypeDef *BSPIx, u8 RDepth) -{ - if (RDepth > 0 && RDepth < 11) - { - RDepth--; - BSPIx->CSR1 &= (RDepth*0x1000) | ~0xF000; - BSPIx->CSR1 |= RDepth*0x1000; - } - else BSPIx->CSR1 &= ~0xF000; -} - -/******************************************************************************* -* Function Name : BSPI_BufferSend. -* Description : Transmits data from a buffer. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : PtrToBuffer is an ‘u8’ pointer to the first word of the buffer to be transmitted. -* Input 3 : NbOfWords parameter indicates the number of words saved in the buffer to be sent. -* Output : None. -* Return : None. -*******************************************************************************/ -void BSPI_BufferSend(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords) -{ - vu8 SendWord = 0; - while (SendWord < NbOfWords) - { - BSPI_WordSend(BSPIx, *(PtrToBuffer+SendWord)); - SendWord++; - } -} - -/******************************************************************************* -* Function Name : BSPI_BufferReceive. -* Description : Receives number of data words and stores them in user defined area. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : PtrToBuffer is an ‘u8’ pointer to the first word of the defined area to save the received buffer. -* Input 3 : NbOfWords parameter indicates the number of words to be received in the buffer. -* Output : None. -* Return : None. -*******************************************************************************/ -void BSPI_BufferReceive(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords) -{ - vu16 ReceiveWord = 0; - while (ReceiveWord < NbOfWords) - { - *(PtrToBuffer+ReceiveWord) = BSPI_WordReceive(BSPIx); - ReceiveWord++; - } -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/can.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/can.c deleted file mode 100644 index 48d491c8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/can.c +++ /dev/null @@ -1,541 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : can.c -* Author : MCD Application Team -* Date First Issued : 10/27/2003 -* Description : This file contains all the functions prototypes for the -* CAN bus software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "can.h" -#include "xti.h" -#include "pcu.h" - -// macro to format the timing register value from the timing parameters -#define CAN_TIMING(tseg1, tseg2, sjw, brp) (((tseg2-1) & 0x07) << 12) | (((tseg1-1) & 0x0F) << 8) | (((sjw-1) & 0x03) << 6) | ((brp-1) & 0x3F) - -// array of pre-defined timing parameters for standard bitrates -u16 CanTimings[] = { // value bitrate NTQ TSEG1 TSEG2 SJW BRP - CAN_TIMING(11, 4, 4, 5), // 0x3AC4 100 kbit/s 16 11 4 4 5 - CAN_TIMING(11, 4, 4, 4), // 0x3AC3 125 kbit/s 16 11 4 4 4 - CAN_TIMING( 4, 3, 3, 4), // 0x2383 250 kbit/s 8 4 3 3 4 - CAN_TIMING(13, 2, 1, 1), // 0x1C00 500 kbit/s 16 13 2 1 1 - CAN_TIMING( 4, 3, 1, 1), // 0x2300 1 Mbit/s 8 4 3 1 1 -}; - -/******************************************************************************* -* Function Name : CAN_SetBitrate -* Description : Setup a standard CAN bitrate -* Input 1 : one of the CAN_BITRATE_xxx defines -* Output : None -* Return : None -* Note : CAN must be in initialization mode -*******************************************************************************/ -void CAN_SetBitrate(u32 bitrate) -{ - CAN->BTR = CanTimings[bitrate]; // write the predefined timing value - CAN->BRPR = 0; // clear the Extended Baud Rate Prescaler -} - -/******************************************************************************* -* Function Name : CAN_SetTiming -* Description : Setup the CAN timing with specific parameters -* Input 1 : Time Segment before the sample point position, from 1 to 16 -* Input 2 : Time Segment after the sample point position, from 1 to 8 -* Input 3 : Synchronisation Jump Width, from 1 to 4 -* Input 4 : Baud Rate Prescaler, from 1 to 1024 -* Output : None -* Return : None -* Note : CAN must be in initialization mode -*******************************************************************************/ -void CAN_SetTiming(u32 tseg1, u32 tseg2, u32 sjw, u32 brp) -{ - CAN->BTR = CAN_TIMING(tseg1, tseg2, sjw, brp); - CAN->BRPR = ((brp-1) >> 6) & 0x0F; -} - -/******************************************************************************* -* Function Name : CAN_SleepRequest -* Description : Request the CAN cell to enter sleep mode -* Input 1 : CAN_WAKEUP_ON_EXT or CAN_WAKEUP_ON_CAN -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SleepRequest(u32 WakeupMode) -{ - // Wakeup Line 6 is linked to CAN RX pin (port 1.11) - // Wakeup Line 2 is linked to external pin (port 2.8) - u32 WakeupLine = (WakeupMode == CAN_WAKEUP_ON_CAN ? XTI_Line6 : XTI_Line2); - - CAN_WaitEndOfTx(); - - XTI_Init(); - - // Configure the Wakeup Line mode, select Falling edge (transition to dominant state) - XTI_LineModeConfig(WakeupLine, XTI_FallingEdge); - - // Enable Wake-Up interrupt - XTI_LineConfig(WakeupLine, ENABLE); - - // Enable Wake-Up mode with interrupt - XTI_ModeConfig(XTI_WakeUpInterrupt, ENABLE); - - XTI_PendingBitClear(XTI_InterruptLineValue()); - - // Enter STOP mode (resume execution from here) - PCU_LPMEnter(PCU_STOP); -} - -/******************************************************************************* -* Function Name : CAN_GetFreeIF -* Description : Search the first free message interface, starting from 0 -* Input : None -* Output : None -* Return : A free message interface number (0 or 1) if found, else 2 -*******************************************************************************/ -static u32 CAN_GetFreeIF(void) -{ - if ((CAN->sMsgObj[0].CRR & CAN_CRR_BUSY) == 0) - return 0; - else if ((CAN->sMsgObj[1].CRR & CAN_CRR_BUSY) == 0) - return 1; - else return 2; -} - -/******************************************************************************* -* Macro Name : xxx_ID_MSK, xxx_ID_ARB -* Description : Form the Mask and Arbitration registers value to filter a range -* of identifiers or a fixed identifier, for standard and extended IDs -*******************************************************************************/ -#define RANGE_ID_MSK(range_start, range_end) (~((range_end) - (range_start))) -#define RANGE_ID_ARB(range_start, range_end) ((range_start) & (range_end)) - -#define FIXED_ID_MSK(id) RANGE_ID_MSK((id), (id)) -#define FIXED_ID_ARB(id) RANGE_ID_ARB((id), (id)) - -#define STD_RANGE_ID_MSK(range_start, range_end) ((u16)((RANGE_ID_MSK((range_start), (range_end)) & 0x7FF) << 2)) -#define STD_RANGE_ID_ARB(range_start, range_end) ((u16)(RANGE_ID_ARB((range_start), (range_end)) << 2)) - -#define STD_FIXED_ID_MSK(id) ((u16)((FIXED_ID_MSK(id) & 0x7FF) << 2)) -#define STD_FIXED_ID_ARB(id) ((u16)(FIXED_ID_ARB(id) << 2)) - -#define EXT_RANGE_ID_MSK_L(range_start, range_end) ((u16)(RANGE_ID_MSK((range_start), (range_end)) >> 11)) -#define EXT_RANGE_ID_MSK_H(range_start, range_end) ((u16)(STD_RANGE_ID_MSK((range_start), (range_end)) | ((RANGE_ID_MSK((range_start), (range_end)) >> 27) & 0x03))) -#define EXT_RANGE_ID_ARB_L(range_start, range_end) ((u16)(RANGE_ID_ARB((range_start), (range_end)) >> 11)) -#define EXT_RANGE_ID_ARB_H(range_start, range_end) ((u16)(STD_RANGE_ID_ARB((range_start), (range_end)) | ((RANGE_ID_ARB((range_start), (range_end)) >> 27) & 0x03))) - -#define EXT_FIXED_ID_MSK_L(id) ((u16)(FIXED_ID_MSK(id) >> 11)) -#define EXT_FIXED_ID_MSK_H(id) ((u16)(STD_FIXED_ID_MSK(id) | ((FIXED_ID_MSK(id) >> 27) & 0x03))) -#define EXT_FIXED_ID_ARB_L(id) ((u16)(FIXED_ID_ARB(id) >> 11)) -#define EXT_FIXED_ID_ARB_H(id) ((u16)(STD_FIXED_ID_ARB(id) | ((FIXED_ID_ARB(id) >> 27) & 0x03))) - -/******************************************************************************* -* Function Name : CAN_SetUnusedMsgObj -* Description : Configure the message object as unused -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetUnusedMsgObj(u32 msgobj) -{ - u32 msg_if; - while ((msg_if = CAN_GetFreeIF()) == 2); - - CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD - | CAN_CMR_MASK - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - CAN->sMsgObj[msg_if].M1R = 0; - CAN->sMsgObj[msg_if].M2R = 0; - - CAN->sMsgObj[msg_if].A1R = 0; - CAN->sMsgObj[msg_if].A2R = 0; - - CAN->sMsgObj[msg_if].MCR = 0; - - CAN->sMsgObj[msg_if].DA1R = 0; - CAN->sMsgObj[msg_if].DA2R = 0; - CAN->sMsgObj[msg_if].DB1R = 0; - CAN->sMsgObj[msg_if].DB2R = 0; - - CAN->sMsgObj[msg_if].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_SetTxMsgObj -* Description : Configure the message object as TX -* Input 1 : message object number, from 0 to 31 -* Input 2 : CAN_STD_ID or CAN_EXT_ID -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetTxMsgObj(u32 msgobj, u32 idType) -{ - u32 msg_if; - while ((msg_if = CAN_GetFreeIF()) == 2); - - CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD - | CAN_CMR_MASK - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - CAN->sMsgObj[msg_if].M1R = 0; - CAN->sMsgObj[msg_if].A1R = 0; - - if (idType == CAN_STD_ID) - { - CAN->sMsgObj[msg_if].M2R = CAN_M2R_MDIR; - CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_DIR; - } - else - { - CAN->sMsgObj[msg_if].M2R = CAN_M2R_MDIR | CAN_M2R_MXTD; - CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_DIR | CAN_A2R_XTD; - } - - CAN->sMsgObj[msg_if].MCR = CAN_MCR_TXIE | CAN_MCR_EOB; - - CAN->sMsgObj[msg_if].DA1R = 0; - CAN->sMsgObj[msg_if].DA2R = 0; - CAN->sMsgObj[msg_if].DB1R = 0; - CAN->sMsgObj[msg_if].DB2R = 0; - - CAN->sMsgObj[msg_if].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_SetRxMsgObj -* Description : Configure the message object as RX -* Input 1 : message object number, from 0 to 31 -* Input 2 : CAN_STD_ID or CAN_EXT_ID -* Input 3 : low part of the identifier range used for acceptance filtering -* Input 4 : high part of the identifier range used for acceptance filtering -* Input 5 : TRUE for a single receive object or a FIFO receive object that -* is the last one of the FIFO -* FALSE for a FIFO receive object that is not the last one -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetRxMsgObj(u32 msgobj, u32 idType, u32 idLow, u32 idHigh, bool singleOrFifoLast) -{ - u32 msg_if; - while ((msg_if = CAN_GetFreeIF()) == 2); - - CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD - | CAN_CMR_MASK - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - if (idType == CAN_STD_ID) - { - CAN->sMsgObj[msg_if].M1R = 0; - CAN->sMsgObj[msg_if].M2R = STD_RANGE_ID_MSK(idLow, idHigh); - - CAN->sMsgObj[msg_if].A1R = 0; - CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | STD_RANGE_ID_ARB(idLow, idHigh); - } - else - { - CAN->sMsgObj[msg_if].M1R = EXT_RANGE_ID_MSK_L(idLow, idHigh); - CAN->sMsgObj[msg_if].M2R = CAN_M2R_MXTD | EXT_RANGE_ID_MSK_H(idLow, idHigh); - - CAN->sMsgObj[msg_if].A1R = EXT_RANGE_ID_ARB_L(idLow, idHigh); - CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_XTD | EXT_RANGE_ID_ARB_H(idLow, idHigh); - } - - CAN->sMsgObj[msg_if].MCR = CAN_MCR_RXIE | CAN_MCR_UMASK | (singleOrFifoLast ? CAN_MCR_EOB : 0); - - CAN->sMsgObj[msg_if].DA1R = 0; - CAN->sMsgObj[msg_if].DA2R = 0; - CAN->sMsgObj[msg_if].DB1R = 0; - CAN->sMsgObj[msg_if].DB2R = 0; - - CAN->sMsgObj[msg_if].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_InvalidateAllMsgObj -* Description : Configure all the message objects as unused -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void CAN_InvalidateAllMsgObj(void) -{ - u32 i; - for (i = 0; i < 32; i++) - CAN_SetUnusedMsgObj(i); -} - -/******************************************************************************* -* Function Name : CAN_Init -* Description : Initialize the CAN cell and set the bitrate -* Input 1 : any binary value formed from the CAN_CTL_xxx defines -* Input 2 : one of the CAN_BITRATE_xxx defines -* Output : None -* Return : None -*******************************************************************************/ -void CAN_Init(u8 mask, u32 bitrate) -{ - CAN_EnterInitMode(CAN_CR_CCE | mask); - CAN_SetBitrate(bitrate); - CAN_LeaveInitMode(); - CAN_LeaveTestMode(); -} - -/******************************************************************************* -* Function Name : CAN_ReleaseMessage -* Description : Release the message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -*******************************************************************************/ -void CAN_ReleaseMessage(u32 msgobj) -{ - u32 i; - while ((i = CAN_GetFreeIF()) == 2); - - CAN->sMsgObj[i].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQST; - CAN->sMsgObj[i].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_SendMessage -* Description : Start transmission of a message -* Input 1 : message object number, from 0 to 31 -* Input 2 : pointer to the message structure containing data to transmit -* Output : None -* Return : 1 if transmission was OK, else 0 -*******************************************************************************/ -u32 CAN_SendMessage(u32 msgobj, canmsg* pCanMsg) -{ - while (CAN->sMsgObj[0].CRR & CAN_CRR_BUSY); - -// if (CAN->sMsgObj[0].COMR & CAN_CRQ_BUSY) -// return 0; // message interface 0 not free - - CAN->SR &= ~CAN_SR_TXOK; - - // read the Arbitration and Message Control - CAN->sMsgObj[0].CMR = CAN_CMR_ARB | CAN_CMR_CONTROL; - - CAN->sMsgObj[0].CRR = 1 + msgobj; - - while (CAN->sMsgObj[0].CRR & CAN_CRR_BUSY); - - // update the contents needed for transmission - CAN->sMsgObj[0].CMR = CAN_CMR_WRRD - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - if ((CAN->sMsgObj[0].A2R & CAN_A2R_XTD) == 0) - { - // standard ID - CAN->sMsgObj[0].A1R = 0; - CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | STD_FIXED_ID_ARB(pCanMsg->Id); - } - else - { - // extended ID - CAN->sMsgObj[0].A1R = EXT_FIXED_ID_ARB_L(pCanMsg->Id); - CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | EXT_FIXED_ID_ARB_H(pCanMsg->Id); - } - - CAN->sMsgObj[0].MCR = (CAN->sMsgObj[0].MCR & 0xFEF0) | CAN_MCR_NEWDAT | CAN_MCR_TXRQST | pCanMsg->Dlc; - - CAN->sMsgObj[0].DA1R = ((u16)pCanMsg->Data[1]<<8) | pCanMsg->Data[0]; - CAN->sMsgObj[0].DA2R = ((u16)pCanMsg->Data[3]<<8) | pCanMsg->Data[2]; - CAN->sMsgObj[0].DB1R = ((u16)pCanMsg->Data[5]<<8) | pCanMsg->Data[4]; - CAN->sMsgObj[0].DB2R = ((u16)pCanMsg->Data[7]<<8) | pCanMsg->Data[6]; - - CAN->sMsgObj[0].CRR = 1 + msgobj; - - return 1; -} - -/******************************************************************************* -* Function Name : CAN_ReceiveMessage -* Description : Get the message, if received -* Input 1 : message object number, from 0 to 31 -* Input 2 : if TRUE, the message object is released when getting the data -* if FALSE, the message object is not released -* Input 3 : pointer to the message structure where received data is stored -* Output : None -* Return : 1 if reception was OK, else 0 (no message pending) -*******************************************************************************/ -u32 CAN_ReceiveMessage(u32 msgobj, bool release, canmsg* pCanMsg) -{ - if (!CAN_IsMessageWaiting(msgobj)) - return 0; - - CAN->SR &= ~CAN_SR_RXOK; - - // read the message contents - CAN->sMsgObj[1].CMR = CAN_CMR_MASK - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_CLRINTPND - | (release ? CAN_CMR_TXRQST : 0) - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - CAN->sMsgObj[1].CRR = 1 + msgobj; - - while (CAN->sMsgObj[1].CRR & CAN_CRR_BUSY); - - if ((CAN->sMsgObj[1].A2R & CAN_A2R_XTD) == 0) - { - // standard ID - pCanMsg->IdType = CAN_STD_ID; - pCanMsg->Id = (CAN->sMsgObj[1].A2R >> 2) & 0x07FF; - } - else - { - // extended ID - pCanMsg->IdType = CAN_EXT_ID; - pCanMsg->Id = ((CAN->sMsgObj[1].A2R >> 2) & 0x07FF) | ((u32)CAN->sMsgObj[1].A1R << 11) | (((u32)CAN->sMsgObj[1].A2R & 0x0003) << 27); - } - - pCanMsg->Dlc = CAN->sMsgObj[1].MCR & 0x0F; - - pCanMsg->Data[0] = (u8) CAN->sMsgObj[1].DA1R; - pCanMsg->Data[1] = (u8)(CAN->sMsgObj[1].DA1R >> 8); - pCanMsg->Data[2] = (u8) CAN->sMsgObj[1].DA2R; - pCanMsg->Data[3] = (u8)(CAN->sMsgObj[1].DA2R >> 8); - pCanMsg->Data[4] = (u8) CAN->sMsgObj[1].DB1R; - pCanMsg->Data[5] = (u8)(CAN->sMsgObj[1].DB1R >> 8); - pCanMsg->Data[6] = (u8) CAN->sMsgObj[1].DB2R; - pCanMsg->Data[7] = (u8)(CAN->sMsgObj[1].DB2R >> 8); - - return 1; -} - -/******************************************************************************* -* Function Name : CAN_WaitEndOfTx -* Description : Wait until current transmission is finished -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void CAN_WaitEndOfTx(void) -{ - while ((CAN->SR & CAN_SR_TXOK) == 0); - CAN->SR &= ~CAN_SR_TXOK; -} - -/******************************************************************************* -* Function Name : CAN_BasicSendMessage -* Description : Start transmission of a message in BASIC mode -* Input 1 : pointer to the message structure containing data to transmit -* Output : None -* Return : 1 if transmission was OK, else 0 -* Note : CAN must be in BASIC mode -*******************************************************************************/ -u32 CAN_BasicSendMessage(canmsg* pCanMsg) -{ - // clear NewDat bit in IF2 to detect next reception - CAN->sMsgObj[1].MCR &= ~CAN_MCR_NEWDAT; - - CAN->SR &= ~CAN_SR_TXOK; - - CAN->sMsgObj[0].CMR = CAN_CMR_WRRD - | CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - if (pCanMsg->IdType == CAN_STD_ID) - { - // standard ID - CAN->sMsgObj[0].A1R = 0; - CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | STD_FIXED_ID_ARB(pCanMsg->Id); - } - else - { - // extended ID - CAN->sMsgObj[0].A1R = EXT_FIXED_ID_ARB_L(pCanMsg->Id); - CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | EXT_FIXED_ID_ARB_H(pCanMsg->Id); - } - - CAN->sMsgObj[0].MCR = (CAN->sMsgObj[0].MCR & 0xFCF0) | pCanMsg->Dlc; - - CAN->sMsgObj[0].DA1R = ((u16)pCanMsg->Data[1]<<8) | pCanMsg->Data[0]; - CAN->sMsgObj[0].DA2R = ((u16)pCanMsg->Data[3]<<8) | pCanMsg->Data[2]; - CAN->sMsgObj[0].DB1R = ((u16)pCanMsg->Data[5]<<8) | pCanMsg->Data[4]; - CAN->sMsgObj[0].DB2R = ((u16)pCanMsg->Data[7]<<8) | pCanMsg->Data[6]; - - // request transmission - CAN->sMsgObj[0].CRR = CAN_CRR_BUSY | (1 + 0); - - return 1; -} - -/******************************************************************************* -* Function Name : CAN_BasicReceiveMessage -* Description : Get the message in BASIC mode, if received -* Input 1 : pointer to the message structure where received data is stored -* Output : None -* Return : 1 if reception was OK, else 0 (no message pending) -* Note : CAN must be in BASIC mode -*******************************************************************************/ -u32 CAN_BasicReceiveMessage(canmsg* pCanMsg) -{ - if ((CAN->sMsgObj[1].MCR & CAN_MCR_NEWDAT) == 0) - return 0; - - CAN->SR &= ~CAN_SR_RXOK; - - CAN->sMsgObj[1].CMR = CAN_CMR_ARB - | CAN_CMR_CONTROL - | CAN_CMR_DATAA - | CAN_CMR_DATAB; - - if ((CAN->sMsgObj[1].A2R & CAN_A2R_XTD) == 0) - { - // standard ID - pCanMsg->IdType = CAN_STD_ID; - pCanMsg->Id = (CAN->sMsgObj[1].A2R >> 2) & 0x07FF; - } - else - { - // extended ID - pCanMsg->IdType = CAN_EXT_ID; - pCanMsg->Id = ((CAN->sMsgObj[1].A2R >> 2) & 0x07FF) | ((u32)CAN->sMsgObj[1].A1R << 11) | (((u32)CAN->sMsgObj[1].A2R & 0x0003) << 27); - } - - pCanMsg->Dlc = CAN->sMsgObj[1].MCR & 0x0F; - - pCanMsg->Data[0] = (u8) CAN->sMsgObj[1].DA1R; - pCanMsg->Data[1] = (u8)(CAN->sMsgObj[1].DA1R >> 8); - pCanMsg->Data[2] = (u8) CAN->sMsgObj[1].DA2R; - pCanMsg->Data[3] = (u8)(CAN->sMsgObj[1].DA2R >> 8); - pCanMsg->Data[4] = (u8) CAN->sMsgObj[1].DB1R; - pCanMsg->Data[5] = (u8)(CAN->sMsgObj[1].DB1R >> 8); - pCanMsg->Data[6] = (u8) CAN->sMsgObj[1].DB2R; - pCanMsg->Data[7] = (u8)(CAN->sMsgObj[1].DB2R >> 8); - - return 1; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/eic.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/eic.c deleted file mode 100644 index 8bc053df..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/eic.c +++ /dev/null @@ -1,67 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : eic.c -* Author : MCD Application Team -* Date First Issued : 06/25/2003 -* Description : This file provides all the EIC software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "eic.h" - -/******************************************************************************* -* Function Name : EIC_Init -* Description : Initialise the EIC using the load PC instruction -* (PC = PC +offset) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EIC_Init(void) -{ - extern u32 T0TIMI_Addr; - u8 bCounter; - u32 dOffset=((u32)&T0TIMI_Addr); - EIC->ICR = 0x00000000; // Disable FIQ and IRQ interrupts - EIC->IER = 0x00000000; // Disable all channels interrupts - EIC->IPR = 0xFFFFFFFF; // Clear all pending bits - EIC->FIR = 0x0000000C; // Disable all FIQ channels interrupts and clear FIQ - // channels pending bits - EIC->CIPR = 0x00000000; // Ste the current priority level to zero - EIC->IVR = 0xE59F0000; // IVR = high half of load PC instruction - dOffset = (dOffset+0x00007E0)<<16; - for(bCounter=0; bCounter<32; bCounter++) // Initialize SIRn registers - { - EIC->SIR[bCounter] = dOffset|0xF0000000; - dOffset += 0x00000004 << 16; - } -} - -/******************************************************************************* -* Function Name : EIC_CurrentPriorityLevelConfig -* Description : Change the current priority level of the srved IRQ routine -* Input 1 : New priority -* Output : None -* Return : None -*******************************************************************************/ -void EIC_CurrentPriorityLevelConfig(u8 NewPriorityLevel) -{ - u32 dVal; - dVal = EIC->ICR; // Save ICR content - EIC->ICR &= ~0x0001; // Disable IRQ interrupts. - EIC->CIPR = NewPriorityLevel; // Change the current priority - EIC->ICR = dVal; // Restore ICR content -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/emi.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/emi.c deleted file mode 100644 index caf2a73e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/emi.c +++ /dev/null @@ -1,24 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : emi.c -* Author : MCD Application Team -* Date First Issued : 08/08/2003 -* Description : This file provides all the EMI software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "emi.h" - - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/flash.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/flash.c deleted file mode 100644 index 9e28cf3a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/flash.c +++ /dev/null @@ -1,354 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : flash.c -* Author : MCD Application Team -* Date First Issued : 07/28/2003 -* Description : This file provides all the Flash software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "flash.h" - - u32 D0_temp; - - -/******************************************************************************* -* Function Name : FLASH_Init -* Description : Initialise the Flash -* Input : None -* Return : None -*******************************************************************************/ -void FLASH_Init(void) -{ -// Reset Flash Control Registers - FLASHR->CR0 = 0x00000000; - FLASHR->CR1 = 0x00000000; -// Reset Flash Data Registers - FLASHR->DR0 = 0xFFFFFFFF; - FLASHR->DR1 = 0xFFFFFFFF; -// Reset Flash Error Register - FLASHR->ER = 0x00000000; -} - -/******************************************************************************* -* Function Name : FLASH_WordWrite -* Description : Writes a Word to the Flash -* Input 1 : Address of the Destination -* Input 2 : Word To program -* Return : None -*******************************************************************************/ -void FLASH_WordWrite(u32 XtargetAdd, u32 Xdata) -{ - FLASH_WaitForLastTask(); - // set the Word Programming bit 'WPG' in the CR0 Reg - FLASHR->CR0 |= FLASH_WPG_Mask; - // Load the destination address in AR - FLASHR->AR = XtargetAdd; - // Load DATA to be programmed in DR0 - FLASHR->DR0 = Xdata; - // Set the Write Mode Start bit 'WMS' in the CR0 Reg to Start Write Operation - FLASHR->CR0 |= FLASH_WMS_Mask; - // Wait until the write operation is completed - FLASH_WaitForLastTask(); -} - -/******************************************************************************* -* Function Name : FLASH_DWordWrite -* Description : Writes Double Word to the Flash -* Input 1 : Address of the Destination -* Input 2 : Word 1 To program -* Input 3 : Word 2 To program -* Return : None -*******************************************************************************/ -void FLASH_DWordWrite(u32 XtargetAdd, u32 Xdata0, u32 Xdata1) -{ - - FLASH_WaitForLastTask(); - // set the Double Word Programming bit 'DWPG' in the CR0 Reg - FLASHR->CR0 |= FLASH_DWPG_Mask; - // Load the destination address in AR - FLASHR->AR = XtargetAdd; - // Load DATA0 in DR0 Reg - FLASHR->DR0 = Xdata0; - // Load DATA1 in DR1 Reg - FLASHR->DR1 = Xdata1; - // Set the Write Mode Start bit 'WMS' in the CR0 Reg to Start Write Operation - FLASHR->CR0 |= FLASH_WMS_Mask; - // Wait until the write operation is completed - FLASH_WaitForLastTask(); -} - - -/******************************************************************************* -* Function Name : FLASH_SectorErase -* Description : Erases a Flash sector -* Input 1 : Sectors to be Erased -* Return : None -*******************************************************************************/ -void FLASH_SectorErase(u32 Xsectors) -{ - FLASH_WaitForLastTask(); - // Set the Sector Erase flag 'SER' in the FCRO reg - FLASHR->CR0 |= FLASH_SER_Mask; - // Select the Sectors to be erased in the CR1 register - FLASHR->CR1 |= Xsectors; - // Set the Write Mode Start bit 'WMS' in the CR0 Reg to Start Erase Operation - FLASHR->CR0 |= FLASH_WMS_Mask; - // Wait until the erase operation is completed - FLASH_WaitForLastTask(); -} -/******************************************************************************* -* Function Name : FLASH_Suspend -* Description : Suspends the current program or erase operation -* Input 1 : None -* Return : Flash CR0 register -*******************************************************************************/ -u32 FLASH_Suspend(void) -{ - u32 temp; - /* Save the CR0 Contetnt */ - temp = FLASHR->CR0; - /* Set The suspend Bit 'SUSP' in the CR0 register */ - FLASHR->CR0 |= FLASH_SUSP_Mask; - /* Wait until the flash controller acknowlegs the suspend of the current - operation */ - FLASH_WaitForLastTask(); - return temp; -} -/******************************************************************************* -* Function Name : FLASH_Resume -* Description : Resume a Suspended program or erase operation -* Input 1 : The operation to be resumed -* Return : None -*******************************************************************************/ -void FLASH_Resume(u32 FLASH_LastOperation) -{ - // Clear The suspend Bit 'SUSP' in the FRC0 register - FLASHR->CR0 &= ~FLASH_SUSP_Mask; - // Resume last operation - FLASHR->CR0 = FLASH_LastOperation & 0x7FFFFFFF; - // Set write mode bit - FLASHR->CR0 |= FLASH_WMS_Mask; -} - -/******************************************************************************* -* Function Name : FLASH_WordRead -* Description : Read a single word of the flash -* Input 1 : Source Address -* Return : Word -*******************************************************************************/ -u32 FLASH_WordRead(u32 FLASH_SourceAdd) -{ - FLASH_WaitForLastTask(); - // Reads the data from the specified Address - return *(u32 *)(FLASH_SourceAdd + 0x40000000); -} -/******************************************************************************* -* Function Name : FLASH_WritePrConfig -* Description : Configures The Write Protection Bits -* Input 1 : Flash Bank -* Input 2 : Enable or disable Protection -* Return : None -*******************************************************************************/ -void FLASH_WritePrConfig(u32 Xsectors, FunctionalState NewState) -{ - FLASH_WaitForLastTask(); - - if (NewState == ENABLE) - { - // Set the Set protection Bit - FLASHR->CR0 |= FLASH_SPR_Mask; - // Set the Register Address - FLASHR->AR = 0x4010DFB0; - // Data To be Programmed to the Protection Register - FLASHR->DR0 = ~Xsectors; - // Set the WMS bit to Start the Sequence - FLASHR->CR0 |= FLASH_WMS_Mask; - } - else - { - // Set the Set protection Bit - FLASHR->CR0 |= FLASH_SPR_Mask; - // Set the Register Address - FLASHR->AR = 0x4010DFB0; - // Data To be Programmed to the Protection Register - FLASHR->DR0 = FLASHPR->NVWPAR|Xsectors; - // Set the WMS bit to Start the Sequence - FLASHR->CR0 |= FLASH_WMS_Mask; - } -} - -/******************************************************************************* -* Function Name : FLASH_PermanantDebugPrConfig -* Description : Configures The Debug Protection Bits -* Input 1 : ENABLE or DISABLE -* Return : Word -*******************************************************************************/ -void FLASH_PermanantDebugPrConfig(FunctionalState NewState) -{ - u16 ProtectionLevel = FLASH_ProtectionLevel(); - - - if (NewState == ENABLE) - { - // If the First Protection Reset the DBGP bit - if(!ProtectionLevel) - { - // Set the Set protection Bit - FLASHR->CR0 |= FLASH_SPR_Mask; - // Set the Register Address - FLASHR->AR = 0x4010DFB8; - // Data To be Programmed to the Protection Register - FLASHR->DR0 = ~2; - // Set the WMS bit to Start the Sequence - FLASHR->CR0 |= FLASH_WMS_Mask; - } - else - { - // Set the Set protection Bit - FLASHR->CR0 |= FLASH_SPR_Mask; - // Set the Register Address - FLASHR->AR = 0x4010DFBC; - // Data To be Programmed to the Protection Register - D0_temp=~(1<<(15+ProtectionLevel)); - FLASHR->DR0 =D0_temp; - // Set the WMS bit to Start the Sequence - FLASHR->CR0 |= FLASH_WMS_Mask; - } - - } - else if(ProtectionLevel) - { - // Set the Set protection Bit - FLASHR->CR0 |= FLASH_SPR_Mask; - // Set the Register Address - FLASHR->AR = 0x4010DFBC; - // Data To be Programmed to the Protection Register - FLASHR->DR0 =~(1<<(ProtectionLevel-1)); - // Set the WMS bit to Start the Sequence - FLASHR->CR0 |= FLASH_WMS_Mask; - } - -} - -/******************************************************************************* -* Function Name : FLASH_FlagStatus -* Description : Returns the NewState of Flash flags -* Input 1 : Flash Flag -* Return : flagstate -*******************************************************************************/ -FlagStatus FLASH_FlagStatus(flashflags Xflag) -{ - FlagStatus TmpResult; - u8 TmpReg; - u8 TmpPos; - // get the Register Index - TmpReg = (Xflag & FLASH_Reg_Mask) >> 5; - // get the Flag Index - TmpPos = (Xflag & FLASH_Flag_Mask); - - switch(TmpReg) - { - case 0 : // CR0 - { - // Returns the status of the CR0[TmpPos] flag - TmpResult = (FLASHR->CR0 & (1<CR1 & (1<ER & (1<> 5; - TmpPos = (Xflag & FLASH_Flag_Mask); - - switch(TmpReg) - { - case 0 : // CR0 - { - // Clears the status of the CR0[TmpPos] flag - FLASHR->CR0 &= ~(1<CR1 &= ~(1<ER &= ~(1<NVAPR0&2) - TmpBitIndex=0; - else - TmpBitIndex=1; - - ProtectionRegs=~(FLASHPR->NVAPR1>>16); - while (((ProtectionRegs) != 0) && (TmpBitIndex < 16)) - { - ProtectionRegs = ProtectionRegs >> 1 ; - TmpBitIndex++; - } - return TmpBitIndex; -} -/******************************************************************************* -* Function Name : Wait For Last Task -* Description : Waits for the end of last task on a Flash Bank -* Input 1 : None. -* Return : None -*******************************************************************************/ -void FLASH_WaitForLastTask(void) -{ - while (FLASHR->CR0&0x16); -} - -/*******************(C)COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/gpio.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/gpio.c deleted file mode 100644 index 588d1f28..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/gpio.c +++ /dev/null @@ -1,115 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : gpio.c -* Author : MCD Application Team -* Date First Issued : 06/08/2003 -* Description : This file provides all the GPIO software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "gpio.h" - -/******************************************************************************* -* Function Name : GPIO_Config -* Description : Configure the GPIO port pins -* Input 1 : GPIOx (x can be 0,1 or 2) the desired port -* Input 2 : Port_Pins : pins placements -* Input 3 : Pins Mode -* Output : None -* Return : None -*******************************************************************************/ -void GPIO_Config (GPIO_TypeDef *GPIOx, u16 Port_Pins, GpioPinMode_TypeDef GPIO_Mode) -{ - switch (GPIO_Mode) - { - case GPIO_HI_AIN_TRI: - GPIOx->PC0&=~Port_Pins; - GPIOx->PC1&=~Port_Pins; - GPIOx->PC2&=~Port_Pins; - break; - - case GPIO_IN_TRI_TTL: - GPIOx->PC0|=Port_Pins; - GPIOx->PC1&=~Port_Pins; - GPIOx->PC2&=~Port_Pins; - break; - - case GPIO_IN_TRI_CMOS: - GPIOx->PC0&=~Port_Pins; - GPIOx->PC1|=Port_Pins; - GPIOx->PC2&=~Port_Pins; - break; - - case GPIO_IPUPD_WP: - GPIOx->PC0|=Port_Pins; - GPIOx->PC1|=Port_Pins; - GPIOx->PC2&=~Port_Pins; - break; - - case GPIO_OUT_OD: - GPIOx->PC0&=~Port_Pins; - GPIOx->PC1&=~Port_Pins; - GPIOx->PC2|=Port_Pins; - break; - - case GPIO_OUT_PP: - GPIOx->PC0|=Port_Pins; - GPIOx->PC1&=~Port_Pins; - GPIOx->PC2|=Port_Pins; - break; - - case GPIO_AF_OD: - GPIOx->PC0&=~Port_Pins; - GPIOx->PC1|=Port_Pins; - GPIOx->PC2|=Port_Pins; - break; - - case GPIO_AF_PP: - GPIOx->PC0|=Port_Pins; - GPIOx->PC1|=Port_Pins; - GPIOx->PC2|=Port_Pins; - break; - } -} - -/******************************************************************************* -* Function Name : GPIO_BitWrite -* Description : Set or reset the selected port pin -* Input 1 : Selected GPIO port -* Input 2 : Pin number -* Input 3 : bit value -* Output : None -* Return : None -*******************************************************************************/ -void GPIO_BitWrite(GPIO_TypeDef *GPIOx, u8 Port_Pin, u8 Port_Val) -{ - if (Port_Val&0x01) GPIOx->PD |= 1<PD &= ~(1<PD = Port_Byte ? (GPIOx->PD&0x00FF) | ((u16)Port_Val<<8) - : (GPIOx->PD&0xFF00) | Port_Val; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/i2c.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/i2c.c deleted file mode 100644 index 70c7f68a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/i2c.c +++ /dev/null @@ -1,504 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : i2c.c -* Author : MCD Application Team -* Date First Issued : 09/05/2003 -* Description : This file provides Code sources I2C functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "i2c.h" -#include "rccu.h" -#include - -/******************************************************************************* -* Function Name : I2C_Init -* Description : Initializes I2C peripheral control and registers to their -* default reset values. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -void I2C_Init (I2C_TypeDef *I2Cx) -{ - //Initialize all the register of the specified I2C passed as parameter - I2Cx->CR=0x0; - I2Cx->CCR=0x0; - I2Cx->ECCR=0x0; - I2Cx->OAR1=0x0; - I2Cx->OAR2=0x0; - (void)I2Cx->SR1; - (void)I2Cx->SR2; - I2Cx->DR=0x0; -} - -/******************************************************************************* -* Function Name : I2C_OnOffConfig -* Description : Enables or disables I2C peripheral. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -void I2C_OnOffConfig (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) - { - // Enable the I2C selected by setting twice the PE bit on the CR register - I2Cx->CR |= I2C_PESET_Mask; - I2Cx->CR |= I2C_PESET_Mask; - } - else - // Disable the I2C selected - I2Cx->CR &= ~I2C_PESET_Mask; -} - -/******************************************************************************* -* Function Name : I2C_FlagStatus -* Description : Checks whether any I2C Flag is set or not. -* Input : I2Cx ( I2C0 or I2C1 ) -* Access(DIRECT or INDIRECT) -* Flag : the flag to be read -* input 4: an (u8) variable needed in the case -* of the INDIRECT access -* Return : the NewState of the Flag (SET or RESET). -*******************************************************************************/ -FlagStatus I2C_FlagStatus (I2C_TypeDef *I2Cx, RegisterAccess Access, I2C_Flags Flag, ...) -{ - u32 Tmp; - - if (Access == DIRECT) - // Store in Tmp variable the register where is located the flag - Tmp = I2C_GetStatus(I2Cx)&Flag; - else - { - va_list list; - //Get the fourth register - va_start(list,Flag); - Tmp = va_arg(list,u32); - Tmp&=Flag; - } - //Return the Flag NewState - return Tmp != 0 ? SET : RESET; -} - -/******************************************************************************* -* Function Name : I2C_FlagClear -* Description : Clears the I2C Flag passed as a parameter -* Input : I2Cx ( I2C0 or I2C1 ) -* Flag : the flag to be read -* input3: an (u8) parameter needed in the case that the flag -* to be cleared need a write in one register -* Return : None. -*******************************************************************************/ -void I2C_FlagClear (I2C_TypeDef *I2Cx, I2C_Flags Flag, ...) -{ - u8 Tmp = (u8)*((u32 *)&Flag + sizeof(Flag)); - - if (Flag==I2C_ADD10 || Flag==I2C_EVF || Flag==I2C_BERR || Flag==I2C_ARLO || - Flag==I2C_STOPF || Flag==I2C_AF || Flag==I2C_ENDAD) - //flags that need a read of the SR2 register to be cleared - { - // Read the SR2 register - (void)I2Cx->SR2; - // Two flags need a second step to be cleared - switch (Flag) - { - case I2C_ADD10: I2Cx->DR = Tmp; break; - case I2C_ENDAD: I2Cx->CR|=0x20; break; - } - } - else if (Flag==I2C_SB || Flag==I2C_ADSL || Flag==I2C_BTF || Flag==I2C_TRA) - //flags that need a read of the SR1 register to be cleared - { - // Read the SR1 register - (void)I2Cx->SR1; - if (Flag==I2C_SB) I2Cx->DR=Tmp; - else if (Flag==I2C_BTF || Flag==I2C_TRA) (void)I2Cx->DR; - } - else if ( Flag==I2C_M_SL || Flag==I2C_GCAL) - //flags that need the PE bit to be cleared - { - I2C_OnOffConfig (I2Cx, DISABLE); - I2C_OnOffConfig (I2Cx, ENABLE); - } -} - -/******************************************************************************* -* Function Name : I2C_SpeedConfig -* Description : Selects I2C clock speed and configures its corresponding mode. -* Input : I2Cx ( I2C0 or I2C1 ) -* Clock: I2C expected clock in Hertz. -* Return : None. -*******************************************************************************/ -void I2C_SpeedConfig (I2C_TypeDef *I2Cx, u32 Clock) -{ - u32 FCLK; - u16 result; - // Get the FCLK frequency using the RCCU library - FCLK = RCCU_FrequencyValue ( RCCU_FCLK ); - // Test on speed mode - // Update the CCR and ECCR are updated - if (Clock <=100000) - // Standard mode selected - { - result = ((FCLK / Clock) - 7)/2; - //Clear FM/SM bit - I2Cx->CCR=result &0x7f; - } - else if (Clock <=400000) - { - // Fast mode selected - result = ((FCLK/Clock)-9)/3; - //set FM/SM bit - I2Cx->CCR=result |0x80; - } - I2Cx->ECCR= result >>7; -} -/******************************************************************************* -* Function Name : I2C_AddressConfig -* Description : Defines the I2C bus address of the interface. -* Input : I2Cx ( I2C0 or I2C1 ). -* Address: an u16 parameter indicating the address -* of the interface. -* Mode (I2C_Mode10,I2C_Mode7). -* Return : None. -*******************************************************************************/ -void I2C_AddressConfig (I2C_TypeDef *I2Cx, u16 Address, I2C_Addressing Mode) -{ - //Update OAR1 bit[7:1] by the lowest byte of address - I2Cx->OAR1 = (u8)Address; - - if (Mode == I2C_Mode10) - //Update Add8 and add9 bits in OAR2 - I2Cx->OAR2 |= (Address & 0x0300)>>7; -} - -/******************************************************************************* -* Function Name : I2C_FCLKConfig -* Description : Configures frequency bits according to RCLK frequency. -* the selected I2C must be disabled -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -void I2C_FCLKConfig (I2C_TypeDef *I2Cx) -{ - u32 FCLK; - // Get the FCLK frequency using the RCCU library - FCLK = RCCU_FrequencyValue ( RCCU_FCLK ); - // Test the value of the FCLK and affect FR0,FR1&FR2 of the OAR2 register - if (FCLK > 5000000) - { - if (FCLK <10000000) - I2Cx->OAR2 |= 0x00; - else if (FCLK <16670000) - I2Cx->OAR2 |= 0x20; - else if (FCLK < 26670000) - I2Cx->OAR2 |= 0x40; - else if (FCLK <40000000) - I2Cx->OAR2 |= 0x60; - else if (FCLK < 53330000) - I2Cx->OAR2 |= 0x80; - else if (FCLK < 66000000) - I2Cx->OAR2 |= 0xA0; - else if (FCLK <80000000) - I2Cx->OAR2 |= 0xC0; - else if (FCLK <100000000) - I2Cx->OAR2 |= 0xE0; - } -} - -/******************************************************************************* -* Function Name : I2C_AddressSend -* Description : Transmits the address byte to select the slave device. -* Input : I2Cx ( I2C0 or I2C1 ) -* Address: an u16 parameter indicating the slave address -* Mode (I2C_Mode10,I2C_Mode7). -* Direction (I2C_RX,I2C_TX). -* Return : None. -********************************************************************************/ -void I2C_AddressSend (I2C_TypeDef *I2Cx, u16 Address, I2C_Addressing Mode, I2C_Direction Direction) -{ - if (Mode == I2C_Mode10 ) - //10 bit addressing mode - { - // Update the DR register by generated header - I2Cx->DR = ((Address>>7)|0xf0)&0xfe; - //Wait till I2C_ADD10 flag is set - while ((I2Cx->SR1&0x40)==0); - //clear I2C_ADD10 flag - (void)I2Cx->SR2; - I2Cx->DR=(u8)Address; - //Test on the direction to define the read/write bit - if (Direction == I2C_RX) - { - //Wait till I2C_ENDAD flag is set - while ((I2Cx->SR2&0x20)==0); - I2Cx->CR|=0x20; - //Repeated START Generate - I2C_STARTGenerate (I2Cx, ENABLE); - //Test on SB flag status - while ((I2Cx->SR1&0x01)==0); - I2Cx->DR = ((Address>>7)|0xf1); - } - } - else - // 7 bit addressing mode - { - if (Direction == I2C_RX) Address|=0x01; else Address&=~0x01; - I2Cx->DR=(u8)Address; - } -} - -/******************************************************************************* -* Function Name : I2C_ByteSend -* Description : Send a single byte of data. -* Input : I2Cx ( I2C0 or I2C1 ) -* Data : the byte to be sent to the slave -* Return : None. -*******************************************************************************/ -void I2C_ByteSend (I2C_TypeDef *I2Cx, u8 Data) -{ - //Write in the DR register the byte to be sent - I2Cx->DR = Data; -} - -/******************************************************************************* -* Function Name : I2C_BufferSend -* Description : Send data from a buffer whose number of bytes is known -* Input : I2Cx ( I2C0 or I2C1 ) -* PtrToBuffer :pointer to the byte of buffer to be transmitted. -* NbOfBytes:Number of byte of the buffer -* Return : I2C_Tx_Status :transmission status (I2C_TX_AF, I2C_TX_ARLO, -* I2C_TX_BERR,I2C_TX_DATA_OK) -*******************************************************************************/ -I2C_Tx_Status I2C_BufferSend (I2C_TypeDef *I2Cx, u8 *PtrToBuffer, u8 NbOfBytes) -{ - u8 Interruption_Status; - u8 SentBytes; - u8 error; - I2C_Tx_Status I2C_TXTMP; - - //Test of the interrupt status - Interruption_Status=0; - Interruption_Status=I2Cx->CR & 0x01; - I2C_ITConfig (I2Cx, DISABLE); - //Wait till I2C_BTF bit is set - while ((I2Cx->SR1 & 0x08 )==0); - SentBytes=0; - while (SentBytesDR= *(PtrToBuffer+SentBytes); - //Wait till I2C_BTF bit is set or error detected - do - error = I2Cx->SR2 & 0x16; - while ((I2Cx->SR1 & 0x08)==0 && error==0); - // In case of error exit - if (error) break; - // increment SentBytes counter - SentBytes++; - } - if (error) - { - if (error & 0x10) - // I2C_TX_AF if Acknowledge failure is detected - I2C_TXTMP = I2C_TX_AF; - if (error & 0x02) - //I2C_TX_ARLO if the ARLO bit is set in the SR2 register - I2C_TXTMP = I2C_TX_ARLO; - if (error & 0x04) - // I2C_TX_BERR if the BERR bit is set in the SR2 register - I2C_TXTMP= I2C_TX_BERR; - } - else - //I2C_TX_DATA_OK to show that the buffer is well sent - I2C_TXTMP= I2C_TX_DATA_OK; - - //Restore the interrupt status - if (Interruption_Status==1) - I2C_ITConfig (I2Cx, ENABLE); - - return I2C_TXTMP; -} - -/******************************************************************************* -* Function Name : I2C_StringSend -* Description : Send data from a buffer -* Input : I2Cx ( I2C0 or I2C1 ) -* PtrToBuffer :pointer to the byte of string to be transmitted. -* Return : I2C_Tx_Status :transmission status (I2C_TX_AF, I2C_TX_ARLO, -* I2C_TX_BERR,I2C_TX_DATA_OK) -*******************************************************************************/ -I2C_Tx_Status I2C_StringSend (I2C_TypeDef *I2Cx, char *PtrToString) -{ - u8 NbOfBytes=0; - // count the number of byte composing the string passed as parameter. - while (*(PtrToString+NbOfBytes)!= '\0') - NbOfBytes++; - // call I2C_BufferSend function to execute the send part - return I2C_BufferSend (I2Cx,(u8 *)PtrToString,NbOfBytes); -} - -/******************************************************************************* -* Function Name : I2C_TransmissionStatus -* Description : Report the NewState of the transmission -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : I2C_Tx_Status :transmission status (I2C_TX_NO, I2C_TX_SB, -* I2C_TX_AF, I2C_TX_ARLO, I2C_TX_BERR,I2C_TX_ADD_OK, -* I2C_TX_DATA_OK,I2C_TX_ONGOING) -*******************************************************************************/ -I2C_Tx_Status I2C_TransmissionStatus (I2C_TypeDef *I2Cx) -{ - u8 SR1value; - u8 SR2value; - I2C_Tx_Status NewState; - - SR1value = I2Cx->SR1; - SR2value = I2Cx->SR2; - if ((I2Cx->SR1&0x10)==0) - NewState=I2C_TX_NO; - else if (I2Cx->SR1&0x01) - //I2C_SB bit is set - NewState=I2C_TX_SB; - else if ((SR2value & 0x10)&&(I2Cx->CR&0x04)) - //I2C_ACK &I2C_AF are both set - NewState=I2C_TX_AF; - else if (SR2value & 0x04) - //I2C_ARLO is set in multimaster mode - NewState=I2C_TX_ARLO; - else if (SR2value & 0x02) - //I2C_BERR bit is set - NewState=I2C_TX_BERR; - else if ((SR1value & 0x80)&& (I2Cx->SR2&0x20)) - //I2C_EVF and I2C_ENDAD are both set - NewState=I2C_TX_ADD_OK; - else if ((I2Cx->SR1&0x20)&& (I2Cx->SR1&0x08)) - //I2C_TRA and I2C_BTF are both set - NewState=I2C_TX_DATA_OK; - else - NewState=I2C_TX_ONGOING; - - return NewState; -} - -/******************************************************************************* -* Function Name : I2C_ByteReceive -* Description : Returns the received byte. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : the byte received -*******************************************************************************/ -u8 I2C_ByteReceive (I2C_TypeDef *I2Cx) -{ - //Wait till I2C_BTF bit is set - while ((I2Cx->SR1 & 0x08)==0); - return I2Cx->DR; -} - -/******************************************************************************* -* Function Name : I2C_BufferReceive -* Description : received a buffer. and return the status of error. -* Input : I2Cx ( I2C0 or I2C1 ) -* PtrToBuffer :pointer to the byte of buffer received. -* NbOfBytes:Number of byte to be received -* Return : I2C_Rx_Status:the NewState of the reception (,I2C_RX_AF, -* I2C_RX_ARLO,I2C_RX_BERR, I2C_RX_DATA_OK) -*******************************************************************************/ -I2C_Rx_Status I2C_BufferReceive (I2C_TypeDef *I2Cx, u8 *PtrToBuffer, u8 NbOfBytes) -{ - u8 Interruption_Status; - u8 ReceivedBytes; - u8 error; - I2C_Rx_Status I2C_RXTMP; - - //Test of the interrupt status - Interruption_Status=0; - Interruption_Status=I2Cx->CR & 0x01; - I2C_ITConfig (I2Cx, DISABLE); - ReceivedBytes=0; - while (ReceivedBytesSR2 & 0x16; - while ((I2Cx->SR1 & 0x08)==0 && !error); - if (error==0) - // No error detected - { - *(PtrToBuffer+ReceivedBytes) = I2Cx->DR; - ReceivedBytes++; - } - else break; - } - if (error) - { - if (error & 0x10) - // I2C_RX_AF if Acknowledge failure is detected - I2C_RXTMP= I2C_RX_AF; - else if (error & 0x02) - // I2C_RX_ARLO if the ARLO bit is set in the SR2 register - I2C_RXTMP= I2C_RX_ARLO; - else if (error & 0x04) - // I2C_RX_BERR if the BERR bit is set in the SR2 register - I2C_RXTMP= I2C_RX_BERR; - } - else - //I2C_RX_DATA_OK to show that the buffer is well sent - I2C_RXTMP= I2C_RX_DATA_OK; - - //Restore the interrupt status - if (Interruption_Status==1) - I2C_ITConfig (I2Cx, ENABLE); - - return I2C_RXTMP; -} - -/******************************************************************************* -* Function Name :I2C_ReceptionStatus -* Description : Report the reception NewState. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : I2C_Rx_Status:the NewState of the reception ( I2C_RX_NO, -* I2C_RX_SB,I2C_RX_AF,I2C_RX_ARLO,I2C_RX_BERR,I2C_RX_ADD_OK, -* I2C_RX_DATA_OK, I2C_RX_ONGOING) -*******************************************************************************/ -I2C_Rx_Status I2C_ReceptionStatus (I2C_TypeDef *I2Cx) -{ - u8 SR1value; - u8 SR2value; - I2C_Rx_Status NewState; - SR1value= I2Cx->SR1; - SR2value= I2Cx->SR2; - - if ((I2Cx->SR1&0x10) == 0) - NewState=I2C_RX_NO; - else if (I2Cx->SR1&0x01) - //I2C_SB bit is set - NewState=I2C_RX_SB; - else if ((SR2value & 0x10) && (I2Cx->CR&0x04)) - //I2C_ACK &I2C_AF are both set - NewState=I2C_RX_AF; - else if (SR2value & 0x04) - //I2C_ARLO is set - NewState=I2C_RX_ARLO; - else if (SR2value & 0x02) - //I2C_BERR bit is set - NewState=I2C_RX_BERR; - else if ((SR1value & 0x80) && (I2Cx->SR1&0x08)==0) - //2C_EVF is set & I2C_BTF is not set - NewState=I2C_RX_ADD_OK; - else if ((I2Cx->SR1&0x20)==0 && (I2Cx->SR1&0x08)) - //II2C_TRA is cleared & I2C_BTF is set - NewState=I2C_RX_DATA_OK; - else - NewState=I2C_RX_ONGOING; - return NewState; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_conf.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_conf.h deleted file mode 100644 index db268a56..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_conf.h +++ /dev/null @@ -1,75 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_conf.h -* Author : MCD Application Team -* Date First Issued : 16/05/2003 -* Description : Library configuration for the WDG example -******************************************************************************** -* History: -* 24/05/05 : V3.0 -* 30/11/04 : V2.0 -* 16/05/03 : Created -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __71x_CONF_H -#define __71x_CONF_H - -/* Comment the line below to put the library in release mode */ -//#define DEBUG - -#ifndef INLINE -#define INLINE static inline -#endif - -//#define USE_SERIAL_PORT -//#define USE_UART0 - -/* Main Oscillator Frequency value = 4 Mhz */ -#define RCCU_Main_Osc 4000000 - -/* Comment the lines below corresponding to unwanted peripherals */ -#define _ADC12 -#define _APB -#define _APB1 -#define _APB2 -#define _BSPI -#define _BSPI0 -#define _BSPI1 -#define _CAN -#define _EIC -#define _EMI -#define _FLASH -#define _GPIO -#define _GPIO0 -#define _GPIO1 -#define _GPIO2 -#define _I2C -#define _I2C0 -#define _I2C1 -#define _PCU -#define _RCCU -#define _RTC -#define _TIM -#define _TIM0 -#define _TIM1 -#define _TIM2 -#define _TIM3 -#define _UART -#define _UART0 -#define _UART1 -#define _UART2 -#define _UART3 -#define _USB -#define _WDG -#define _XTI -#define _IRQVectors - -#endif /* __71x_CONF_H */ - - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_it.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_it.h deleted file mode 100644 index 5b99928e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_it.h +++ /dev/null @@ -1,62 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_it.h -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Interrupt handlers -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef _71x_IT_H -#define _71x_IT_H - -#include "71x_lib.h" - - -void Undefined_Handler (void); -void FIQ_Handler (void); -void SWI_Handler (void); -void Prefetch_Handler (void); -void Abort_Handler (void); -void T0TIMI_IRQHandler (void); -void FLASH_IRQHandler (void); -void RCCU_IRQHandler (void); -void RTC_IRQHandler (void); -void WDG_IRQHandler (void); -void XTI_IRQHandler (void); -void USBHP_IRQHandler (void); -void I2C0ITERR_IRQHandler(void); -void I2C1ITERR_IRQHandler(void); -void UART0_IRQHandler (void); -void UART1_IRQHandler (void); -void UART2_IRQHandler (void); -void UART3_IRQHandler (void); -void BSPI0_IRQHandler (void); -void BSPI1_IRQHandler (void); -void I2C0_IRQHandler (void); -void I2C1_IRQHandler (void); -void CAN_IRQHandler (void); -void ADC12_IRQHandler (void); -void T1TIMI_IRQHandler (void); -void T2TIMI_IRQHandler (void); -void T3TIMI_IRQHandler (void); -void HDLC_IRQHandler (void); -void USBLP_IRQHandler (void); -void T0TOI_IRQHandler (void); -void T0OC1_IRQHandler (void); -void T0OC2_IRQHandler (void); - -#endif /* _71x_IT_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_lib.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_lib.h deleted file mode 100644 index 5532ca47..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_lib.h +++ /dev/null @@ -1,101 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_lib.h -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Global include for all peripherals -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __71x_LIB_H -#define __71x_LIB_H - -#include "71x_map.h" -#include "71x_conf.h" - - -#ifdef _ADC12 - #include "adc12.h" -#endif - -#ifdef _APB - #include "apb.h" -#endif - -#ifdef _BSPI - #include "bspi.h" -#endif - -#ifdef _CAN - #include "can.h" -#endif - -#ifdef _EIC - #include "eic.h" -#endif - -#ifdef _EMI - #include "emi.h" -#endif - -#ifdef _FLASH - #include "flash.h" -#endif - -#ifdef _GPIO - #include "gpio.h" -#endif - -#ifdef _I2C - #include "i2c.h" -#endif - -#ifdef _PCU - #include "pcu.h" -#endif - -#ifdef _RCCU - #include "rccu.h" -#endif - -#ifdef _RTC - #include "rtc.h" -#endif - -#ifdef _TIM - #include "tim.h" -#endif - -#ifdef _UART - #include "uart.h" -#endif - -#ifdef _USB -#endif - -#ifdef _WDG - #include "wdg.h" -#endif - -#ifdef _XTI - #include "xti.h" -#endif - - -#ifdef LIBDEBUG - void libdebug(void); -#endif - -#endif /* __71x_LIB_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_map.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_map.h deleted file mode 100644 index 0f49a154..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_map.h +++ /dev/null @@ -1,611 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_map.h -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Peripherals memory mapping and registers structures -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __71x_map_H -#define __71x_map_H - -#ifndef EXT - #define EXT extern -#endif - -#include "71x_conf.h" -#include "71x_type.h" - - -/* IP registers structures */ - -typedef volatile struct -{ - vu16 DATA0; - vu16 EMPTY1[3]; - vu16 DATA1; - vu16 EMPTY2[3]; - vu16 DATA2; - vu16 EMPTY3[3]; - vu16 DATA3; - vu16 EMPTY4[3]; - vu16 CSR; - vu16 EMPTY5[7]; - vu16 CPR; -} ADC12_TypeDef; - -typedef volatile struct -{ - vu32 CKDIS; - vu32 SWRES; -} APB_TypeDef; - -typedef volatile struct -{ - vu16 RXR; - vu16 EMPTY1; - vu16 TXR; - vu16 EMPTY2; - vu16 CSR1; - vu16 EMPTY3; - vu16 CSR2; - vu16 EMPTY4; - vu16 CLK; -} BSPI_TypeDef; - -typedef volatile struct -{ - vu16 CRR; - vu16 EMPTY1; - vu16 CMR; - vu16 EMPTY2; - vu16 M1R; - vu16 EMPTY3; - vu16 M2R; - vu16 EMPTY4; - vu16 A1R; - vu16 EMPTY5; - vu16 A2R; - vu16 EMPTY6; - vu16 MCR; - vu16 EMPTY7; - vu16 DA1R; - vu16 EMPTY8; - vu16 DA2R; - vu16 EMPTY9; - vu16 DB1R; - vu16 EMPTY10; - vu16 DB2R; - vu16 EMPTY11[27]; -} CAN_MsgObj_TypeDef; - -typedef volatile struct -{ - vu16 CR; - vu16 EMPTY1; - vu16 SR; - vu16 EMPTY2; - vu16 ERR; - vu16 EMPTY3; - vu16 BTR; - vu16 EMPTY4; - vu16 IDR; - vu16 EMPTY5; - vu16 TESTR; - vu16 EMPTY6; - vu16 BRPR; - vu16 EMPTY7[3]; - CAN_MsgObj_TypeDef sMsgObj[2]; - vu16 EMPTY8[16]; - vu16 TR1R; - vu16 EMPTY9; - vu16 TR2R; - vu16 EMPTY10[13]; - vu16 ND1R; - vu16 EMPTY11; - vu16 ND2R; - vu16 EMPTY12[13]; - vu16 IP1R; - vu16 EMPTY13; - vu16 IP2R; - vu16 EMPTY14[13]; - vu16 MV1R; - vu16 EMPTY15; - vu16 MV2R; - vu16 EMPTY16; -} CAN_TypeDef; - -typedef volatile struct -{ - vu32 ICR; - vu32 CICR; - vu32 CIPR; - vu32 EMPTY1[3]; - vu32 IVR; - vu32 FIR; - vu32 IER; - vu32 EMPTY2[7]; - vu32 IPR; - vu32 EMPTY3[7]; - vu32 SIR[32]; -} EIC_TypeDef; - -typedef volatile struct -{ - vu16 BCON0; - vu16 EMPTY1; - vu16 BCON1; - vu16 EMPTY2; - vu16 BCON2; - vu16 EMPTY3; - vu16 BCON3; - vu16 EMPTY4; -} EMI_TypeDef; - -typedef volatile struct -{ - vu32 CR0; - vu32 CR1; - vu32 DR0; - vu32 DR1; - vu32 AR; - vu32 ER; -} FLASHR_TypeDef; - -typedef volatile struct -{ - vu32 NVWPAR; - vu32 EMPTY; - vu32 NVAPR0; - vu32 NVAPR1; -} FLASHPR_TypeDef; - -typedef volatile struct -{ - vu16 PC0; - vu16 EMPTY1; - vu16 PC1; - vu16 EMPTY2; - vu16 PC2; - vu16 EMPTY3; - vu16 PD; - vu16 EMPTY4; -} GPIO_TypeDef; - -typedef volatile struct -{ - vu8 CR; - vu8 EMPTY1[3]; - vu8 SR1; - vu8 EMPTY2[3]; - vu8 SR2; - vu8 EMPTY3[3]; - vu8 CCR; - vu8 EMPTY4[3]; - vu8 OAR1; - vu8 EMPTY5[3]; - vu8 OAR2; - vu8 EMPTY6[3]; - vu8 DR; - vu8 EMPTY7[3]; - vu8 ECCR; -} I2C_TypeDef; - -typedef volatile struct -{ - vu32 CCR; - vu32 EMPTY1; - vu32 CFR; - vu32 EMPTY2[3]; - vu32 PLL1CR; - vu32 PER; - vu32 SMR; -} RCCU_TypeDef; - -typedef volatile struct -{ - vu16 MDIVR; - vu16 EMPTY1; - vu16 PDIVR; - vu16 EMPTY2; - vu16 RSTR; - vu16 EMPTY3; - vu16 PLL2CR; - vu16 EMPTY4; - vu16 BOOTCR; - vu16 EMPTY5; - vu16 PWRCR; -} PCU_TypeDef; - -typedef volatile struct -{ - vu16 CRH; - vu16 EMPTY1; - vu16 CRL; - vu16 EMPTY2; - vu16 PRLH; - vu16 EMPTY3; - vu16 PRLL; - vu16 EMPTY4; - vu16 DIVH; - vu16 EMPTY5; - vu16 DIVL; - vu16 EMPTY6; - vu16 CNTH; - vu16 EMPTY7; - vu16 CNTL; - vu16 EMPTY8; - vu16 ALRH; - vu16 EMPTY9; - vu16 ALRL; -} RTC_TypeDef; - -typedef volatile struct -{ - vu16 ICAR; - vu16 EMPTY1; - vu16 ICBR; - vu16 EMPTY2; - vu16 OCAR; - vu16 EMPTY3; - vu16 OCBR; - vu16 EMPTY4; - vu16 CNTR; - vu16 EMPTY5; - vu16 CR1; - vu16 EMPTY6; - vu16 CR2; - vu16 EMPTY7; - vu16 SR; -} TIM_TypeDef; - -typedef volatile struct -{ - vu16 BR; - vu16 EMPTY1; - vu16 TxBUFR; - vu16 EMPTY2; - vu16 RxBUFR; - vu16 EMPTY3; - vu16 CR; - vu16 EMPTY4; - vu16 IER; - vu16 EMPTY5; - vu16 SR; - vu16 EMPTY6; - vu16 GTR; - vu16 EMPTY7; - vu16 TOR; - vu16 EMPTY8; - vu16 TxRSTR; - vu16 EMPTY9; - vu16 RxRSTR; -} UART_TypeDef; - -typedef volatile struct -{ - vu32 EP0R; - vu32 EP1R; - vu32 EP2R; - vu32 EP3R; - vu32 EP4R; - vu32 EP5R; - vu32 EP6R; - vu32 EP7R; - vu32 EP8R; - vu32 EP9R; - vu32 EP10R; - vu32 EP11R; - vu32 EP12R; - vu32 EP13R; - vu32 EP14R; - vu32 EP15R; - vu32 CNTR; - vu32 ISTR; - vu32 FNR; - vu32 DADDR; - vu32 BTABLE; -} USB_TypeDef; - -typedef volatile struct -{ - vu16 CR; - vu16 EMPTY1; - vu16 PR; - vu16 EMPTY2; - vu16 VR; - vu16 EMPTY3; - vu16 CNT; - vu16 EMPTY4; - vu16 SR; - vu16 EMPTY5; - vu16 MR; - vu16 EMPTY6; - vu16 KR; -} WDG_TypeDef; - -typedef volatile struct -{ - vu8 SR; - vu8 EMPTY1[7]; - vu8 CTRL; - vu8 EMPTY2[3]; - vu8 MRH; - vu8 EMPTY3[3]; - vu8 MRL; - vu8 EMPTY4[3]; - vu8 TRH; - vu8 EMPTY5[3]; - vu8 TRL; - vu8 EMPTY6[3]; - vu8 PRH; - vu8 EMPTY7[3]; - vu8 PRL; -} XTI_TypeDef; - - -/* IRQ vectors */ -typedef volatile struct -{ - vu32 T0TIMI_IRQHandler; - vu32 FLASH_IRQHandler; - vu32 RCCU_IRQHandler; - vu32 RTC_IRQHandler; - vu32 WDG_IRQHandler; - vu32 XTI_IRQHandler; - vu32 USBHP_IRQHandler; - vu32 I2C0ITERR_IRQHandler; - vu32 I2C1ITERR_IRQHandler; - vu32 UART0_IRQHandler; - vu32 UART1_IRQHandler; - vu32 UART2_IRQHandler; - vu32 UART3_IRQHandler; - vu32 BSPI0_IRQHandler; - vu32 BSPI1_IRQHandler; - vu32 I2C0_IRQHandler; - vu32 I2C1_IRQHandler; - vu32 CAN_IRQHandler; - vu32 ADC12_IRQHandler; - vu32 T1TIMI_IRQHandler; - vu32 T2TIMI_IRQHandler; - vu32 T3TIMI_IRQHandler; - vu32 EMPTY1[3]; - vu32 HDLC_IRQHandler; - vu32 USBLP_IRQHandler; - vu32 EMPTY2[2]; - vu32 T0TOI_IRQHandler; - vu32 T0OC1_IRQHandler; - vu32 T0OC2_IRQHandler; -} IRQVectors_TypeDef; - -/*===================================================================*/ - -/* Memory mapping */ - -#define RAM_BASE 0x20000000 - -#define FLASHR_BASE 0x40100000 -#define FLASHPR_BASE 0x4010DFB0 - -#define EXTMEM_BASE 0x60000000 -#define RCCU_BASE 0xA0000000 -#define PCU_BASE 0xA0000040 -#define APB1_BASE 0xC0000000 -#define APB2_BASE 0xE0000000 -#define EIC_BASE 0xFFFFF800 - -#define I2C0_BASE (APB1_BASE + 0x1000) -#define I2C1_BASE (APB1_BASE + 0x2000) -#define UART0_BASE (APB1_BASE + 0x4000) -#define UART1_BASE (APB1_BASE + 0x5000) -#define UART2_BASE (APB1_BASE + 0x6000) -#define UART3_BASE (APB1_BASE + 0x7000) -#define CAN_BASE (APB1_BASE + 0x9000) -#define BSPI0_BASE (APB1_BASE + 0xA000) -#define BSPI1_BASE (APB1_BASE + 0xB000) -#define USB_BASE (APB1_BASE + 0x8800) - -#define XTI_BASE (APB2_BASE + 0x101C) -#define GPIO0_BASE (APB2_BASE + 0x3000) -#define GPIO1_BASE (APB2_BASE + 0x4000) -#define GPIO2_BASE (APB2_BASE + 0x5000) -#define ADC12_BASE (APB2_BASE + 0x7000) -#define TIM0_BASE (APB2_BASE + 0x9000) -#define TIM1_BASE (APB2_BASE + 0xA000) -#define TIM2_BASE (APB2_BASE + 0xB000) -#define TIM3_BASE (APB2_BASE + 0xC000) -#define RTC_BASE (APB2_BASE + 0xD000) -#define WDG_BASE (APB2_BASE + 0xE000) - -#define EMI_BASE (EXTMEM_BASE + 0x0C000000) - -/*===================================================================*/ - -/* IP data access */ - -#ifndef LIBDEBUG - #define ADC12 ((ADC12_TypeDef *)ADC12_BASE) - - #define APB1 ((APB_TypeDef *)(APB1_BASE+0x10)) - #define APB2 ((APB_TypeDef *)(APB2_BASE+0x10)) - - #define BSPI0 ((BSPI_TypeDef *)BSPI0_BASE) - #define BSPI1 ((BSPI_TypeDef *)BSPI1_BASE) - - #define CAN ((CAN_TypeDef *)CAN_BASE) - - #define EIC ((EIC_TypeDef *)EIC_BASE) - - #define EMI ((EMI_TypeDef *)EMI_BASE) - - #define FLASHR ((FLASHR_TypeDef *)FLASHR_BASE) - #define FLASHPR ((FLASHPR_TypeDef *)FLASHPR_BASE) - - #define GPIO0 ((GPIO_TypeDef *)GPIO0_BASE) - #define GPIO1 ((GPIO_TypeDef *)GPIO1_BASE) - #define GPIO2 ((GPIO_TypeDef *)GPIO2_BASE) - - #define I2C0 ((I2C_TypeDef *)I2C0_BASE) - #define I2C1 ((I2C_TypeDef *)I2C1_BASE) - - #define PCU ((PCU_TypeDef *)PCU_BASE) - - #define RCCU ((RCCU_TypeDef *)RCCU_BASE) - - #define RTC ((RTC_TypeDef *)RTC_BASE) - - #define TIM0 ((TIM_TypeDef *)TIM0_BASE) - #define TIM1 ((TIM_TypeDef *)TIM1_BASE) - #define TIM2 ((TIM_TypeDef *)TIM2_BASE) - #define TIM3 ((TIM_TypeDef *)TIM3_BASE) - - #define UART0 ((UART_TypeDef *)UART0_BASE) - #define UART1 ((UART_TypeDef *)UART1_BASE) - #define UART2 ((UART_TypeDef *)UART2_BASE) - #define UART3 ((UART_TypeDef *)UART3_BASE) - - #define USB ((USB_TypeDef *)USB_BASE) - - #define WDG ((WDG_TypeDef *)WDG_BASE) - - #define XTI ((XTI_TypeDef *)XTI_BASE) - - #define IRQVectors ((IRQVectors_TypeDef *)&T0TIMI_Addr) - -#else /* LIBDEBUG */ - - #ifdef _ADC12 - EXT ADC12_TypeDef *ADC12; - #endif - - #ifdef _APB - #ifdef _APB1 - EXT APB_TypeDef *APB1; - #endif - #ifdef _APB2 - EXT APB_TypeDef *APB2; - #endif - #endif - - #ifdef _BSPI - #ifdef _BSPI0 - EXT BSPI_TypeDef *BSPI0; - #endif - #ifdef _BSPI1 - EXT BSPI_TypeDef *BSPI1; - #endif - #endif - - #ifdef _CAN - EXT CAN_TypeDef *CAN; - #endif - - #ifdef _EIC - EXT EIC_TypeDef *EIC; - #endif - - #ifdef _EMI - EXT EMI_TypeDef *EMI; - #endif - - #ifdef _FLASH - EXT FLASHR_TypeDef *FLASHR; - EXT FLASHPR_TypeDef *FLASHPR; - #endif - - #ifdef _GPIO - #ifdef _GPIO0 - EXT GPIO_TypeDef *GPIO0; - #endif - #ifdef _GPIO1 - EXT GPIO_TypeDef *GPIO1; - #endif - #ifdef _GPIO2 - EXT GPIO_TypeDef *GPIO2; - #endif - #endif - - #ifdef _I2C - #ifdef _I2C0 - EXT I2C_TypeDef *I2C0; - #endif - #ifdef _I2C1 - EXT I2C_TypeDef *I2C1; - #endif - #endif - - #ifdef _PCU - EXT PCU_TypeDef *PCU; - #endif - - #ifdef _RCCU - EXT RCCU_TypeDef *RCCU; - #endif - - #ifdef _RTC - EXT RTC_TypeDef *RTC; - #endif - - #ifdef _TIM - #ifdef _TIM0 - EXT TIM_TypeDef *TIM0; - #endif - #ifdef _TIM1 - EXT TIM_TypeDef *TIM1; - #endif - #ifdef _TIM2 - EXT TIM_TypeDef *TIM2; - #endif - #ifdef _TIM3 - EXT TIM_TypeDef *TIM3; - #endif - #endif - - #ifdef _UART - #ifdef _UART0 - EXT UART_TypeDef *UART0; - #endif - #ifdef _UART1 - EXT UART_TypeDef *UART1; - #endif - #ifdef _UART2 - EXT UART_TypeDef *UART2; - #endif - #ifdef _UART3 - EXT UART_TypeDef *UART3; - #endif - #endif - - #ifdef _USB - EXT USB_TypeDef *USB; - #endif - - #ifdef _WDG - EXT WDG_TypeDef *WDG; - #endif - - #ifdef _XTI - EXT XTI_TypeDef *XTI; - #endif - - #ifdef _IRQVectors - EXT IRQVectors_TypeDef *IRQVectors; - #endif - -#endif /* LIBDEBUG */ - -#endif /* __71x_map_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_type.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_type.h deleted file mode 100644 index ccf60ae1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/71x_type.h +++ /dev/null @@ -1,51 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : 71x_type.h -* Author : MCD Application Team -* Date First Issued : 05/16/2003 -* Description : Common data types -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef _71x_type_H -#define _71x_type_H - -typedef unsigned long u32; -typedef unsigned short u16; -typedef unsigned char u8; - -typedef signed long s32; -typedef signed short s16; -typedef signed char s8; - -typedef volatile unsigned long vu32; -typedef volatile unsigned short vu16; -typedef volatile unsigned char vu8; - -typedef volatile signed long vs32; -typedef volatile signed short vs16; -typedef volatile signed char vs8; - -/*===================================================================*/ -typedef enum { FALSE = 0, TRUE = !FALSE } bool; -/*===================================================================*/ -typedef enum { RESET = 0, SET = !RESET } FlagStatus; -/*===================================================================*/ -typedef enum { DISABLE = 0, ENABLE = !DISABLE} FunctionalState; -/*===================================================================*/ -typedef enum { INDIRECT = 0, DIRECT = !INDIRECT} RegisterAccess; -/*===================================================================*/ - -#endif /* _71x_type_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/adc12.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/adc12.h deleted file mode 100644 index a3c0581f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/adc12.h +++ /dev/null @@ -1,181 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : adc12.h -* Author : MCD Application Team -* Date First Issued : 07/31/2003 -* Description : ADC12 functions prototypes -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef _ADC12_H -#define _ADC12_H - -#include "71x_map.h" -#include "rccu.h" - -//--------------------ADC12 Conversion modes----------------------------------- -typedef enum -{ - ADC12_SINGLE, - ADC12_ROUND -} ADC12_Modes; - -//--------------------ADC12 Channels------------------------------------------- -typedef enum -{ - ADC12_CHANNEL0 = 0x00, - ADC12_CHANNEL1 = 0x10, - ADC12_CHANNEL2 = 0x20, - ADC12_CHANNEL3 = 0x30 -} ADC12_Channels; - -//--------------------ADC12 control status register flag----------------------- -typedef enum -{ - ADC12_DA0 = 0x01, - ADC12_DA1 = 0x02, - ADC12_DA2 = 0x04, - ADC12_DA3 = 0x08, - ADC12_OR = 0x2000 -} ADC12_Flags; - -// Masks for the update of interrupt bit for channel n -#define ADC12_IT0_Mask 0x0100 -#define ADC12_IT1_Mask 0x0200 -#define ADC12_IT2_Mask 0x0400 -#define ADC12_IT3_Mask 0x0800 - -//Mask for the update of all the interrupt bit in the CSR -#define ADC12_IT_Mask 0x0F00 - -//Mask for Selecting mode -#define ADC12_Mode_Mask 0x0040 - -//Mask for configuring the converter -#define ADC12_Start_Mask 0x0020 - -/******************************************************************************* -* Function Name : ADC12_Init -* Description : Intialize the ADC -* Input : None. -* Return : None. -*******************************************************************************/ -void ADC12_Init(void); - -/******************************************************************************* -* Function Name : ADC12_ConversionStart -* Description : start the Conversion. -* Input : None -* Return : None -*******************************************************************************/ -INLINE void ADC12_ConversionStart (void) -{ - // Set the ADCen bit of the bootconf register - PCU->BOOTCR |= ADC12_Start_Mask; -} - -/******************************************************************************* -* Function Name : ADC12_ConversionStop -* Description : Disable the ADC -* Input : None. -* Return : None. -*******************************************************************************/ -INLINE void ADC12_ConversionStop(void) -{ - // Clear the ADCen bit of the bootconf register - PCU->BOOTCR &= ~ADC12_Start_Mask; -} - -/******************************************************************************* -* Function Name : ADC12_ModeConfig -* Description : Configure the mode of conversion -* Input : ADC12_SINGLE: single channel mode -* ADC12_ROUND : round robin mode -* Return : None -*******************************************************************************/ -INLINE void ADC12_ModeConfig (ADC12_Modes ConversionMode) -{ - // Select the mode of conversion and update the CSR[6] - ADC12->CSR= ConversionMode == ADC12_SINGLE ? ADC12->CSR | ADC12_Mode_Mask :\ - ADC12->CSR & ~ADC12_Mode_Mask; -} - -/******************************************************************************* -* Function Name : ADC12_PrescalerConfig -* Description : Configure the prescaler -* Input : Adc12_clk: Sampling frequency. -* Return : None. -*******************************************************************************/ -void ADC12_PrescalerConfig(u32 Adc12_clk); - -/******************************************************************************* -* Function Name : ADC12_ChannelSelect -* Description : select the channel passed as parameter to be converted. -* Input : ADC12_Channel: channel selected to be converted it may be -* ADC12_CHANNEL0 : select channel 0 -* ADC12_CHANNEL1 : select channel 1 -* ADC12_CHANNEL2 : select channel 2 -* ADC12_CHANNEL3 : select channel 3 -* Return : None -*******************************************************************************/ -INLINE void ADC12_ChannelSelect(ADC12_Channels ADC12_Channel) -{ - // Update the CSR by the value of the selected channel - ADC12->CSR |= ADC12_Channel; -} - -/******************************************************************************* -* Function Name : ADC12_FlagStatus -* Description : test if the flag passed in parameter is set or not -* Input : ADC12_DA0 :Data Available on Channel 0 -* ADC12_DA1 :Data Available on Channel 1 -* ADC12_DA2 :Data Available on Channel 2 -* ADC12_DA3 :Data Available on Channel 3 -* ADC12_OR :Overrun -* Return : SET: if the flag is set -* RESET: if the flag is clear -*******************************************************************************/ -INLINE FlagStatus ADC12_FlagStatus (ADC12_Flags flag) -{ - // Test on the flag status and return set or RESET - return ADC12->CSR & flag ? SET : RESET; -} - -/******************************************************************************* -* Function Name : ADC12_ConversionValue -* Description : Read the conversion result from the data register. -* Input : ADC12_Channel :number of the register to read -* ADC12_CHANNEL0 : read the DATA0 register -* ADC12_CHANNEL1 : read the DATA1 register -* ADC12_CHANNEL2 : read the DATA2 register -* ADC12_CHANNEL3 : read the DATA3 register -* Return : the register value of the channel converted -*******************************************************************************/ -INLINE u16 ADC12_ConversionValue( ADC12_Channels ADC12_Channel) -{ - // Clear the corespondent DA bit - ADC12->CSR &= ~(1<<(ADC12_Channel >> 4)); - // Only the 12 MSB of the DATAn Register are taken - return *(u16 *)(ADC12_BASE + (ADC12_Channel >> 1)) >> 4; -} - -/******************************************************************************* -* Function Name : ADC12_ITConfig -* Description : enable or disable the interruption -* Input : status=ENABLE=>enable interrupt -* status=DISABLE=>disable interrupt -* Return : None -*******************************************************************************/ -void ADC12_ITConfig (FunctionalState NewState); - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/apb.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/apb.h deleted file mode 100644 index 2e512d97..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/apb.h +++ /dev/null @@ -1,89 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : apb.h -* Author : MCD Application Team -* Date First Issued : 05/30/2003 -* Description : This file contains all the functions prototypes for the -* APB bridge software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __APB_H -#define __APB_H - -#include "71x_map.h" - -/* APB1 Peripherals */ -#define I2C0_Periph 0x0000 -#define I2C1_Periph 0x0002 -#define UART0_Periph 0x0008 -#define UART1_Periph 0x0010 -#define UART2_Periph 0x0020 -#define UART3_Periph 0x0080 -#define USB_Periph 0x0100 -#define CAN_Periph 0x0200 -#define BSPI0_Periph 0x0400 -#define BSPI1_Periph 0x0800 -#define HDLC_Periph 0x2000 - -/* APB2 Peripherals */ -#define XTI_Periph 0x0000 -#define GPIO0_Periph 0x0002 -#define GPIO1_Periph 0x0004 -#define GPIO2_Periph 0x0008 -#define ADC12_Periph 0x0010 -#define TIM0_Periph 0x0080 -#define TIM1_Periph 0x0200 -#define TIM2_Periph 0x0400 -#define TIM3_Periph 0x0800 -#define RTC_Periph 0x1000 -#define WDG_Periph 0x2000 -#define EIC_Periph 0x4000 - -/******************************************************************************* -* Function Name : APB_ClockConfig -* Description : Enables/Disables the Clock gating for peripherals on the APB -* bridge passed in parameters. -* Input : APBx ( APB1 or APB2 ) -* NewState ENABLE or DISABLE -* NewValue (u16) -* Return : None -*******************************************************************************/ -INLINE void APB_ClockConfig ( APB_TypeDef *APBx, - FunctionalState NewState, - u16 NewValue ) -{ - if (NewState == ENABLE) APBx->CKDIS &= ~NewValue; - else APBx->CKDIS |= NewValue; -} - -/******************************************************************************* -* Function Name : APB_SwResetConfig -* Description : Enables/Disables the software Reset for peripherals on the APB -* bridge passed in parameters. -* Input : APBx ( APB1 or APB2 ) -* NewState ENABLE or DISABLE -* NewValue (u16) -* Return : None -*******************************************************************************/ -INLINE void APB_SwResetConfig ( APB_TypeDef *APBx, - FunctionalState NewState, - u16 NewValue ) -{ - if (NewState == ENABLE) APBx->SWRES |= NewValue; - else APBx->SWRES &= ~NewValue; -} - -#endif // __APB_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/bspi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/bspi.h deleted file mode 100644 index 0761c500..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/bspi.h +++ /dev/null @@ -1,324 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : bspi.h -* Author : MCD Application Team -* Date First Issued : 16/05/2003 -* Description : This file contains all the functions prototypes for the -* BSPI software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __bspi_H -#define __bspi_H - -#include "71x_map.h" - -typedef enum { - BSPI_BERIT = 0x80, - BSPI_RCIT = 0x10, - BSPI_ALL = 0x90 -} BSPI_ITS; - -typedef enum { - BSPI_BERR = 0x004, - BSPI_RFNE = 0x008, - BSPI_RFF = 0x010, - BSPI_ROFL = 0x020, - BSPI_TFE = 0x040, - BSPI_TUFL = 0x080, - BSPI_TFF = 0x100, - BSPI_TFNE = 0x200 -} BSPI_Flags; - -typedef enum { - BSPI_TR_FE, - BSPI_TR_UFL, - BSPI_TR_FF, - BSPI_TR_DIS -} BSPI_TR_IT_SRCS; - -typedef enum { - BSPI_RC_FNE, - BSPI_RC_FF, - BSPI_RC_DIS -} BSPI_RC_IR_SRCS; - -#define BSPI_PESET_Mask 0x01 -#define BSPI_DFIFO_Mask 0xFFFE -#define BSPI_CPHA_Mask 0x200 -#define BSPI_CPOL_Mask 0x100 -#define BSPI_BSPI0_Base 0xA000 -#define BSPI_BSPI1_Base 0xB000 - - -/******************************************************************************* -* Function Name : BSPI_BSPI0Conf -* Description : configure STARM71x on BSPI0 mode. -* Input 2 : NewState: specifies the status of the BSPI -* : NewState value must be either ENABLE or DISABLE: -* : ENABLE: the specified BSPI0 peripheral will be enabled. -* : DISABLE: the specified BSPI0 peripheral will be disabled.. -* Output : SPI0 EN bit in BOOTCR. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_BSPI0Conf(FunctionalState NewState) -{ - if (NewState == ENABLE) PCU->BOOTCR |= 0x04; else PCU->BOOTCR &= ~0x04; -} - -/******************************************************************************* -* Function Name : BSPI_Init -* Description : Initializes BSPI peripheral control and registers to their default reset values. -* Input : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Output : BSPI peripheral registers and BSPI global variables are initialized. -* Return : None. -*******************************************************************************/ -void BSPI_Init( BSPI_TypeDef *BSPIx); - -/******************************************************************************* -* Function Name : BSPI_Enable -* Description : Enables/disables the specified BSPI peripheral. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral to be enabled or disabled. -* Input 2 : NewState: specifies the status of the BSPI -* : NewState value must be either ENABLE or DISABLE: -* : ENABLE: the specified BSPI peripheral will be enabled. -* : DISABLE: the specified BSPI peripheral will be disabled. -* Output : BSPE bit in BSPCSR1. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_Enable( BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_PESET_Mask; - else BSPIx->CSR1 &= ~BSPI_PESET_Mask; -} - -/******************************************************************************* -* Function Name : BSPI_MasterEnable -* Description : Configures the BSPI as a Master or a Slave. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : NewState: specifies whether configuring BSPI as master is enabled or disabled. -* : ENABLE: the specified BSPI will be configured as a master. -* : DISABLE: the specified BSPI will be configured as a slave. -* Output : MSTR bit in BSPCSR1 is modified register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_MasterEnable(BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= 0x02; else BSPIx->CSR1 &= ~0x02; -} - -/******************************************************************************* -* Function Name : BSPI_TrItSrc. -* Description : Configures the transmit interrupt source. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : TrItSrc: specifies the transmit interrupt source. -* : Refer to the section ‘Transmit Interrupt Sources’ for more details on the -* : allowed values of this parameter. -* Output : TIE bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -void BSPI_TrItSrc(BSPI_TypeDef *BSPIx, BSPI_TR_IT_SRCS TrItSrc); - -/******************************************************************************* -* Function Name : BSPI_RcItSrc. -* Description : Configures the receive interrupt source. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : RcItSrc: specifies the source for the receive interrupt. -* : Refer to the section ‘Receive Interrupt Sources’ for more details on the -* : allowed values of this parameter. -* Output : RIE bit in BSPCSR1 is register. -* Return : None. -*******************************************************************************/ -void BSPI_RcItSrc(BSPI_TypeDef *BSPIx, BSPI_RC_IR_SRCS RcItSrc); - -/******************************************************************************* -* Function Name : BSPI_TrFifoDepth -* Description : Configures BSPI transmission FIFO number of words. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI. -* Input 2 : TDepth:specifies the depth of the transmit FIFO. -* Output : TFE bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -void BSPI_TrFifoDepth(BSPI_TypeDef *BSPIx, u8 TDepth); - -/******************************************************************************* -* Function Name : BSPI_RcFifoDepth -* Description : Configures BSPI reception FIFO number of words. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : RDepth:specifies the depth of the receive FIFO. -* Output : RFE bits [3:0] in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -void BSPI_RcFifoDepth(BSPI_TypeDef *BSPIx, u8 RDepth); - -/******************************************************************************* -* Function Name : BSPI_8bLEn -* Description : Sets the word length of the receive FIFO and transmit data registers to either 8 or 16 bits. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI. -* Input 2 : status: specifies if the word length is 8 or 16 bits. -* : status value must be either ENABLE or DISABLE: -* : ENABLE: to enable setting the word length to 8 bits. -* : DISABLE: disables setting the word length to 8 bits: the wordlength will be configured to 16 bits. -* Output : WL bits in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_8bLEn(BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == DISABLE) BSPIx->CSR1 |= 0x0400; else BSPIx->CSR1 &= ~0x0C00; -} - -/******************************************************************************* -* Function Name : BSPI_ClkFEdge -* Description : Enables capturing the first data sample on the first edge of SCK or on the second edge. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : NewState: specifies whether capturing the first data sample on the first edge of SCK is enabled or disabled. -* : status value must be either ENABLE or DISABLE. -* :DISABLE: to enable capturing the first data sample on the first edge of SCK. -* : ENABLE: to enable capturing the first data sample on the second edge of SCK. -* Output : CPHA bits in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_ClkFEdge(BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_CPHA_Mask; - else BSPIx->CSR1&=~BSPI_CPHA_Mask; -} - -/******************************************************************************* -* Function Name : BSPI_ClkActiveHigh -* Description : Configures the clock to be active high or low. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : NewState: specifies whether the clock is active high or low. -* : status value must be ENABLE or DISABLE. -* : ENABLE: configures the clock to be active high. -* : DISABLE: confgures the clock to be active low. -* Output : CPOL bits in BSPCSR1 register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_ClkActiveHigh(BSPI_TypeDef *BSPIx, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_CPOL_Mask; - else BSPIx->CSR1 &= ~BSPI_CPOL_Mask; -} - -/******************************************************************************* -* Function Name : BSPI_FifoDisable -* Description : Configure the BSPI FIFO. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Output : DFIFO bit in BSPCSR2 register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_FifoDisable(BSPI_TypeDef *BSPIx) -{ - BSPIx->CSR2 |= 0x0001; -} - -/******************************************************************************* -* Function Name : BSPI_ClockDividerConfig -* Description : Configure BSPI clock divider -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI. -* Input 2 : Div: holds the value of the clock divider. -* Output : Div [7:0] bits in BSPCLK register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_ClockDividerConfig(BSPI_TypeDef *BSPIx, u8 Div) -{ - BSPIx->CLK = Div; -} - -/******************************************************************************* -* Function Name : BSPI_FlagStatus. -* Description : Check whether the specified BSPI Flag is set or not. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : flag: specifies the flag to see the status. -* : Refer to the section ‘BSPI Flags’ for more details on the allowed values of this parameter. -* Output : None. -* Return : FlagStatus type -* : SET: if the tested flag is set. -* : RESET: if the corresponding flag is reset. -*******************************************************************************/ -INLINE FlagStatus BSPI_FlagStatus(BSPI_TypeDef *BSPIx, BSPI_Flags flag) -{ - return (BSPIx->CSR2 & flag) != 0 ? SET : RESET; -} - -/******************************************************************************* -* Function Name : BSPI_WordSend. -* Description : Transmit a single Word. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : holds the word which will be transmitted. -* Output : BSPTXR register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_WordSend(BSPI_TypeDef *BSPIx, u16 Data) -{ - if ((BSPIx->CSR1 & 0x0400) == 0) Data <<= 8; - BSPIx->TXR = Data; -} - -/******************************************************************************* -* Function Name : BSPI_BufferSend. -* Description : Transmits data from a buffer. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : PtrToBuffer is an ‘u8’ pointer to the first word of the buffer to be transmitted. -* Input 3 : NbOfWords parameter indicates the number of words saved in the buffer to be sent. -* Output : None. -* Return : None. -*******************************************************************************/ -void BSPI_BufferSend(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords); - -/******************************************************************************* -* Function Name : BSPI_WordReceive. -* Description : Returns the recent received word. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Output : None. -* Return : The value of the received word. -*******************************************************************************/ -INLINE u16 BSPI_WordReceive(BSPI_TypeDef *BSPIx) -{ - return (BSPIx->CSR1 & 0x0400) == 0 ? BSPIx->RXR >> 8 : BSPIx->RXR; -} - -/******************************************************************************* -* Function Name : BSPI_BufferReceive. -* Description : Receives number of data words and stores them in user defined area. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : PtrToBuffer is an ‘u8’ pointer to the first word of the defined area to save the received buffer. -* Input 3 : NbOfWords parameter indicates the number of words to be received in the buffer. -* Output : None. -* Return : None. -*******************************************************************************/ -void BSPI_BufferReceive(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords); - -/******************************************************************************* -* Function Name : BSPI_ItEnable. -* Description : Enable the specified interrupt. -* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral. -* Input 2 : BSPI_IT: specifies the BSPI interrupt. -* : Refer to the section ‘Interrupt Enable’ for more details on the allowed values of this parameter.. -* Input 3 : NewState: specified whether the BSPI interrupt is enabled or disabled. -* : status value must be either ENABLE or DISABLE. -* : ENABLE: to enable interrupt -* : DISABLE: to disable interrupt. -* Output : BSPCSR1 register. -* Return : None. -*******************************************************************************/ -INLINE void BSPI_ItEnable(BSPI_TypeDef *BSPIx, BSPI_ITS BSPI_IE, FunctionalState NewState) -{ - if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_IE; else BSPIx->CSR1 &= ~BSPI_IE; -} - -#endif /* __bspi_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/can.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/can.h deleted file mode 100644 index 7a97e212..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/can.h +++ /dev/null @@ -1,404 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : can.h -* Author : MCD Application Team -* Date First Issued : 27/10/2003 -* Description : This file contains all the functions prototypes for the -* CAN bus software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __can_H -#define __can_H - -#include "71x_map.h" - -// Standard bitrates available -enum -{ - CAN_BITRATE_100K, - CAN_BITRATE_125K, - CAN_BITRATE_250K, - CAN_BITRATE_500K, - CAN_BITRATE_1M -}; - -// Control register -#define CAN_CR_TEST 0x0080 -#define CAN_CR_CCE 0x0040 -#define CAN_CR_DAR 0x0020 -#define CAN_CR_EIE 0x0008 -#define CAN_CR_SIE 0x0004 -#define CAN_CR_IE 0x0002 -#define CAN_CR_INIT 0x0001 - -// Status register -#define CAN_SR_LEC 0x0007 -#define CAN_SR_TXOK 0x0008 -#define CAN_SR_RXOK 0x0010 -#define CAN_SR_EPASS 0x0020 -#define CAN_SR_EWARN 0x0040 -#define CAN_SR_BOFF 0x0080 - -// Test register -#define CAN_TESTR_RX 0x0080 -#define CAN_TESTR_TX1 0x0040 -#define CAN_TESTR_TX0 0x0020 -#define CAN_TESTR_LBACK 0x0010 -#define CAN_TESTR_SILENT 0x0008 -#define CAN_TESTR_BASIC 0x0004 - -// IFn / Command Request register -#define CAN_CRR_BUSY 0x8000 - -// IFn / Command Mask register -#define CAN_CMR_WRRD 0x0080 -#define CAN_CMR_MASK 0x0040 -#define CAN_CMR_ARB 0x0020 -#define CAN_CMR_CONTROL 0x0010 -#define CAN_CMR_CLRINTPND 0x0008 -#define CAN_CMR_TXRQST 0x0004 -#define CAN_CMR_DATAA 0x0002 -#define CAN_CMR_DATAB 0x0001 - -// IFn / Mask 2 register -#define CAN_M2R_MXTD 0x8000 -#define CAN_M2R_MDIR 0x4000 - -// IFn / Arbitration 2 register -#define CAN_A2R_MSGVAL 0x8000 -#define CAN_A2R_XTD 0x4000 -#define CAN_A2R_DIR 0x2000 - -// IFn / Message Control register -#define CAN_MCR_NEWDAT 0x8000 -#define CAN_MCR_MSGLST 0x4000 -#define CAN_MCR_INTPND 0x2000 -#define CAN_MCR_UMASK 0x1000 -#define CAN_MCR_TXIE 0x0800 -#define CAN_MCR_RXIE 0x0400 -#define CAN_MCR_RMTEN 0x0200 -#define CAN_MCR_TXRQST 0x0100 -#define CAN_MCR_EOB 0x0080 - - -// Wake-up modes -enum -{ - CAN_WAKEUP_ON_EXT, - CAN_WAKEUP_ON_CAN -}; - - -// CAN message structure -typedef struct -{ - u32 IdType; - vu32 Id; - vu8 Dlc; - vu8 Data[8]; -} canmsg; - -// message ID types -enum -{ - CAN_STD_ID, - CAN_EXT_ID -}; - -// message ID limits -#define CAN_LAST_STD_ID ((1<<11) - 1) -#define CAN_LAST_EXT_ID ((1L<<29) - 1) - -/******************************************************************************* -* Function Name : CAN_EnterInitMode -* Description : Switch the CAN into initialization mode -* Input 1 : any binary value formed from the CAN_CR_xxx defines -* Output : None -* Return : None -* Note : CAN_LeaveInitMode must be called when all is done -*******************************************************************************/ -INLINE void CAN_EnterInitMode(u8 mask) -{ - CAN->CR = mask | CAN_CR_INIT; - CAN->SR = 0; // reset the status -} - -/******************************************************************************* -* Function Name : CAN_LeaveInitMode -* Description : Leave the initialization mode (switch into normal mode) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -INLINE void CAN_LeaveInitMode(void) -{ - CAN->CR &= ~(CAN_CR_INIT | CAN_CR_CCE); -} - -/******************************************************************************* -* Function Name : CAN_EnterTestMode -* Description : Switch the CAN into test mode -* Input 1 : any binary value formed from the CAN_TESTR_xxx defines -* Output : None -* Return : None -* Note : CAN_LeaveTestMode must be called when all is done -*******************************************************************************/ -INLINE void CAN_EnterTestMode(u8 mask) -{ - CAN->CR |= CAN_CR_TEST; - CAN->TESTR |= mask; -} - -/******************************************************************************* -* Function Name : CAN_LeaveTestMode -* Description : Leave the current test mode (switch into normal mode) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -INLINE void CAN_LeaveTestMode(void) -{ - CAN->CR |= CAN_CR_TEST; - CAN->TESTR &= ~(CAN_TESTR_LBACK | CAN_TESTR_SILENT | CAN_TESTR_BASIC); - CAN->CR &= ~CAN_CR_TEST; -} - -/******************************************************************************* -* Function Name : CAN_SetBitrate -* Description : Setup a standard CAN bitrate -* Input 1 : one of the CAN_BITRATE_xxx defines -* Output : None -* Return : None -* Note : CAN must be in initialization mode -*******************************************************************************/ -void CAN_SetBitrate(u32 bitrate); - -/******************************************************************************* -* Function Name : CAN_SetTiming -* Description : Setup the CAN timing with specific parameters -* Input 1 : Time Segment before the sample point position, from 1 to 16 -* Input 2 : Time Segment after the sample point position, from 1 to 8 -* Input 3 : Synchronisation Jump Width, from 1 to 4 -* Input 4 : Baud Rate Prescaler, from 1 to 1024 -* Output : None -* Return : None -* Note : CAN must be in initialization mode -*******************************************************************************/ -void CAN_SetTiming(u32 tseg1, u32 tseg2, u32 sjw, u32 brp); - -/******************************************************************************* -* Function Name : CAN_SleepRequest -* Description : Request the CAN cell to enter sleep mode -* Input 1 : CAN_WAKEUP_ON_EXT or CAN_WAKEUP_ON_CAN -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SleepRequest(u32 WakeupMode); - -/******************************************************************************* -* Function Name : CAN_SetUnusedMsgObj -* Description : Configure the message object as unused -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetUnusedMsgObj(u32 msgobj); - -/******************************************************************************* -* Function Name : CAN_SetTxMsgObj -* Description : Configure the message object as TX -* Input 1 : message object number, from 0 to 31 -* Input 2 : CAN_STD_ID or CAN_EXT_ID -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetTxMsgObj(u32 msgobj, u32 idType); - -/******************************************************************************* -* Function Name : CAN_SetRxMsgObj -* Description : Configure the message object as RX -* Input 1 : message object number, from 0 to 31 -* Input 2 : CAN_STD_ID or CAN_EXT_ID -* Input 3 : low part of the identifier range used for acceptance filtering -* Input 4 : high part of the identifier range used for acceptance filtering -* Input 5 : TRUE for a single receive object or a FIFO receive object that -* is the last one of the FIFO -* FALSE for a FIFO receive object that is not the last one -* Output : None -* Return : None -*******************************************************************************/ -void CAN_SetRxMsgObj(u32 msgobj, u32 idType, u32 idLow, u32 idHigh, bool singleOrFifoLast); - -/******************************************************************************* -* Function Name : CAN_InvalidateAllMsgObj -* Description : Configure all the message objects as unused -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void CAN_InvalidateAllMsgObj(void); - -/******************************************************************************* -* Function Name : CAN_Init -* Description : Initialize the CAN cell and set the bitrate -* Input 1 : any binary value formed from the CAN_CTL_xxx defines -* Input 2 : one of the CAN_BITRATE_xxx defines -* Output : None -* Return : None -*******************************************************************************/ -void CAN_Init(u8 mask, u32 bitrate); - -/******************************************************************************* -* Function Name : CAN_ReleaseMessage -* Description : Release the message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -*******************************************************************************/ -void CAN_ReleaseMessage(u32 msgobj); - -/******************************************************************************* -* Function Name : CAN_ReleaseTxMessage -* Description : Release the transmit message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -* Note : assume that message interface 0 is free -*******************************************************************************/ -INLINE void CAN_ReleaseTxMessage(u32 msgobj) -{ - CAN->sMsgObj[0].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQST; - CAN->sMsgObj[0].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_ReleaseRxMessage -* Description : Release the receive message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : None -* Note : assume that message interface 1 is free -*******************************************************************************/ -INLINE void CAN_ReleaseRxMessage(u32 msgobj) -{ - CAN->sMsgObj[1].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQST; - CAN->sMsgObj[1].CRR = 1 + msgobj; -} - -/******************************************************************************* -* Function Name : CAN_SendMessage -* Description : Start transmission of a message -* Input 1 : message object number, from 0 to 31 -* Input 2 : pointer to the message structure containing data to transmit -* Output : None -* Return : 1 if transmission was OK, else 0 -*******************************************************************************/ -u32 CAN_SendMessage(u32 msgobj, canmsg* pCanMsg); - -/******************************************************************************* -* Function Name : CAN_ReceiveMessage -* Description : Get the message, if received -* Input 1 : message object number, from 0 to 31 -* Input 2 : if TRUE, the message object is released when getting the data -* if FALSE, the message object is not released -* Input 3 : pointer to the message structure where received data is stored -* Output : None -* Return : 1 if reception was OK, else 0 (no message pending) -*******************************************************************************/ -u32 CAN_ReceiveMessage(u32 msgobj, bool release, canmsg* pCanMsg); - -/******************************************************************************* -* Function Name : CAN_WaitEndOfTx -* Description : Wait until current transmission is finished -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void CAN_WaitEndOfTx(void); - -/******************************************************************************* -* Function Name : CAN_BasicSendMessage -* Description : Start transmission of a message in BASIC mode -* Input 1 : pointer to the message structure containing data to transmit -* Output : None -* Return : 1 if transmission was OK, else 0 -* Note : CAN must be in BASIC mode -*******************************************************************************/ -u32 CAN_BasicSendMessage(canmsg* pCanMsg); - -/******************************************************************************* -* Function Name : CAN_BasicReceiveMessage -* Description : Get the message in BASIC mode, if received -* Input 1 : pointer to the message structure where received data is stored -* Output : None -* Return : 1 if reception was OK, else 0 (no message pending) -* Note : CAN must be in BASIC mode -*******************************************************************************/ -u32 CAN_BasicReceiveMessage(canmsg* pCanMsg); - -/******************************************************************************* -* Function Name : CAN_IsMessageWaiting -* Description : Test the waiting status of a received message -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : A non-zero value if the corresponding message object has -* received a message waiting to be copied, else 0 -*******************************************************************************/ -INLINE u32 CAN_IsMessageWaiting(u32 msgobj) -{ - return (msgobj < 16 ? CAN->ND1R & (1 << msgobj) : CAN->ND2R & (1 << (msgobj-16))); -} - -/******************************************************************************* -* Function Name : CAN_IsTransmitRequested -* Description : Test the request status of a transmitted message -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : A non-zero value if the corresponding message is requested -* to transmit, else 0 -*******************************************************************************/ -INLINE u32 CAN_IsTransmitRequested(u32 msgobj) -{ - return (msgobj < 16 ? CAN->TR1R & (1 << msgobj) : CAN->TR2R & (1 << (msgobj-16))); -} - -/******************************************************************************* -* Function Name : CAN_IsInterruptPending -* Description : Test the interrupt status of a message object -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : A non-zero value if the corresponding message has an interrupt -* pending, else 0 -*******************************************************************************/ -INLINE u32 CAN_IsInterruptPending(u32 msgobj) -{ - return (msgobj < 16 ? CAN->IP1R & (1 << msgobj) : CAN->IP2R & (1 << (msgobj-16))); -} - -/******************************************************************************* -* Function Name : CAN_IsObjectValid -* Description : Test the validity of a message object (ready to use) -* Input 1 : message object number, from 0 to 31 -* Output : None -* Return : A non-zero value if the corresponding message object is valid, -* else 0 -*******************************************************************************/ -INLINE u32 CAN_IsObjectValid(u32 msgobj) -{ - return (msgobj < 16 ? CAN->MV1R & (1 << msgobj) : CAN->MV2R & (1 << (msgobj-16))); -} - -#endif /* __can_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/eic.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/eic.h deleted file mode 100644 index ee691d95..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/eic.h +++ /dev/null @@ -1,200 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : eic.h -* Author : MCD Application Team -* Date First Issued : 25/06/2003 -* Description : This file contains all the functions prototypes for the -* EIC software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __eic_H -#define __eic_H - -#include "71x_map.h" - -typedef enum -{ - T0TIMI_IRQChannel = 0, - FLASH_IRQChannel = 1, - RCCU_IRQChannel = 2, - RTC_IRQChannel = 3, - WDG_IRQChannel = 4, - XTI_IRQChannel = 5, - USBHP_IRQChannel = 6, - I2C0ITERR_IRQChannel = 7, - I2C1ITERR_IRQChannel = 8, - UART0_IRQChannel = 9, - UART1_IRQChannel = 10, - UART2_IRQChannel = 11, - UART3_IRQChannel = 12, - SPI0_IRQChannel = 13, - SPI1_IRQChannel = 14, - I2C0_IRQChannel = 15, - I2C1_IRQChannel = 16, - CAN_IRQChannel = 17, - ADC_IRQChannel = 18, - T1TIMI_IRQChannel = 19, - T2TIMI_IRQChannel = 20, - T3TIMI_IRQChannel = 21, - HDLC_IRQChannel = 25, - USBLP_IRQChannel = 26, - T0TOI_IRQChannel = 29, - T0OC1_IRQChannel = 30, - T0OC2_IRQChannel = 31 -} IRQChannel_TypeDef; - -typedef enum -{ - T0TIMI_FIQChannel = 0x00000001, - WDG_FIQChannel = 0x00000002, - WDGT0TIMI_FIQChannels = 0x00000003 -} FIQChannel_TypeDef; - -/******************************************************************************* -* Function Name : EIC_Init -* Description : Initialise the EIC using the load PC instruction -* (PC = PC +offset) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EIC_Init(void); - -/******************************************************************************* -* Function Name : EIC_IRQConfig -* Description : Enable or Disable IRQ interrupts -* Input 1 : New status : can be ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -INLINE void EIC_IRQConfig(FunctionalState NewState) -{ - if (NewState==ENABLE) EIC->ICR |= 0x0001; else EIC->ICR &= ~0x0001; -} - -/******************************************************************************* -* Function Name : EIC_FIQConfig -* Description : Enable or Disable FIQ interrupts -* Input 1 : New status : can be ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -INLINE void EIC_FIQConfig(FunctionalState NewState) -{ - if (NewState==ENABLE) EIC->ICR |= 0x0002; else EIC->ICR &= ~0x0002; -} - -/******************************************************************************* -* Function Name : EIC_IRQChannelConfig -* Description : Configure the IRQ Channel -* Input 1 : IRQ channel name -* Input 2 : Channel New status : can be ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -INLINE void EIC_IRQChannelConfig(IRQChannel_TypeDef IRQChannel, FunctionalState NewState) -{ - if (NewState==ENABLE) EIC->IER |= 0x0001 << IRQChannel; - else EIC->IER &= ~(0x0001 << IRQChannel); -} - -/******************************************************************************* -* Function Name : EIC_FIQChannelConfig -* Description : Configure the FIQ Channel -* Input 1 : FIQ channel name -* Input 2 : Channel New status : can be ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -INLINE void EIC_FIQChannelConfig(FIQChannel_TypeDef FIQChannel, - FunctionalState NewState) -{ - if (NewState==ENABLE) EIC->FIR |= FIQChannel; - else EIC->FIR &= ~FIQChannel; -} - -/******************************************************************************* -* Function Name : EIC_IRQChannelPriorityConfig -* Description : Configure the selected IRQ channel priority -* Input 1 : IRQ channel name -* Input 2 : IRQ channel priority -* Output : None -* Return : None -*******************************************************************************/ -INLINE void EIC_IRQChannelPriorityConfig(IRQChannel_TypeDef IRQChannel, u8 Priority) -{ - EIC->SIR[IRQChannel] = (EIC->SIR[IRQChannel]&0xFFFF0000) | (u16)Priority & 0x000F; -} - -/******************************************************************************* -* Function Name : EIC_CurrentPriorityLevelConfig -* Description : Change the current priority level of the srved IRQ routine -* Input 1 : New priority -* Output : None -* Return : None -*******************************************************************************/ -void EIC_CurrentPriorityLevelConfig(u8 NewPriorityLevel); - -/******************************************************************************* -* Function Name : EIC_CurrentPriorityLevelValue -* Description : Return the current priority level of the current served IRQ -* routine -* Input : None -* Output : None -* Return : The current priority level -*******************************************************************************/ -INLINE u8 EIC_CurrentPriorityLevelValue(void) -{ - return EIC->CIPR & 0xF; -} - -/******************************************************************************* -* Function Name : EIC_CurrentIRQChannelValue -* Description : Return the current served IRQ channel number -* Input 0 : None -* Output : None -* Return : The current served IRQ channel number -*******************************************************************************/ -INLINE IRQChannel_TypeDef EIC_CurrentIRQChannelValue(void) -{ - return (IRQChannel_TypeDef)(EIC->CICR & 0x1F); -} - -/******************************************************************************* -* Function Name : EIC_CurrentFIQChannelValue -* Description : Return the current served FIQ channel number -* Input : None -* Output : None -* Return : The current served FIQ channel number -*******************************************************************************/ -INLINE FIQChannel_TypeDef EIC_CurrentFIQChannelValue(void) -{ - return (FIQChannel_TypeDef)((EIC->FIR >> 2) & 0x0003); -} - -/******************************************************************************* -* Function Name : EIC_FIPendingBitClear -* Description : Clear the FIQ pending bit -* Input 1 : FIQ channel -* Output : None -* Return : None -*******************************************************************************/ -INLINE void EIC_FIQPendingBitClear(FIQChannel_TypeDef FIQChannel) -{ - EIC->FIR = (EIC->FIR & 0x0003) | (FIQChannel << 2); -} - -#endif /* __eic_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/emi.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/emi.h deleted file mode 100644 index 97c5115c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/emi.h +++ /dev/null @@ -1,52 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : emi.h -* Author : MCD Application Team -* Date First Issued : 08/08/2003 -* Description : This file contains all the functions prototypes for the -* EMI software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef _EMI_H -#define _EMI_H - -#include "71x_map.h" - -#define EMI_ENABLE 0x8000 -#define EMI_DISABLE 0x0000 -#define EMI_WAITSTATE(n) ((n) << 2) -#define EMI_SIZE_8 0x0000 -#define EMI_SIZE_16 0x0001 - -#define EMI_BANK0 EXTMEM_BASE -#define EMI_BANK1 (EXTMEM_BASE + 0x2000000) -#define EMI_BANK2 (EXTMEM_BASE + 0x4000000) - -/******************************************************************************* -* Function Name : EMI_Config -* Description : This routine is used, for each bank, to configure enabling, -* : cycle length and bus size. -* Input : Bank (u8) -* : Config (u16) -* Return : None -*******************************************************************************/ -INLINE void EMI_Config(u8 Bank, u16 Config) -{ - *(u16 *)(EMI_BASE + (4*Bank)) = Config; -} - -#endif // _EMI_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/flash.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/flash.h deleted file mode 100644 index 6d6bb09d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/flash.h +++ /dev/null @@ -1,253 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : flash.h -* Author : MCD Application Team -* Date First Issued : 28/07/2003 -* Description : This file contains all the functions prototypes for the -* Embedded Flash software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __FLASH_H -#define __FLASH_H - -#include "71x_map.h" - -#define FLASH_B0F0 0x00000001 -#define FLASH_B0F1 0x00000002 -#define FLASH_B0F2 0x00000004 -#define FLASH_B0F3 0x00000008 -#define FLASH_B0F4 0x00000010 -#define FLASH_B0F5 0x00000020 -#define FLASH_B0F6 0x00000040 -#define FLASH_B0F7 0x00000080 - -#define FLASH_B1F0 0x00010000 -#define FLASH_B1F1 0x00020000 - -#define FLASH_B0 (FLASH_B0F0 | FLASH_B0F1 | FLASH_B0F2 | FLASH_B0F3 | FLASH_B0F4 | FLASH_B0F5 | FLASH_B0F6 | FLASH_B0F7) -#define FLASH_B1 (FLASH_B1F0 | FLASH_B1F1) - -typedef enum -{ - FLASH_FINISHED, - FLASH_ONGOING -} flashwriteoperation; - -typedef enum -{ - FLASH_BANK0 = 0x1000000, - FLASH_BANK1 = 0x2000000 -} flashbanks; - -typedef enum -{ - FLASH_BSYA0 = 0x01, /* 000-00001 = 0000 0001 = 0x01 */ /* FLASH_CR0.1 */ - FLASH_BSYA1 = 0x02, /* 000-00010 = 0000 0010 = 0x02 */ /* FLASH_CR0.2 */ - FLASH_LOCK = 0x04, /* 000-00100 = 0000 0100 = 0x04 */ /* FLASH_CR0.4*/ - FLASH_INTP = 0x14, /* 000-10100 = 0001 0100 = 0x14 */ /* FLASH_CR0.20 */ - FLASH_B0S = 0x38, /* 001-11000 = 0011 1000 = 0x38 */ /* FLASH_CR1.24*/ - FLASH_B1S = 0x39, /* 001-11001 = 0011 1001 = 0x39 */ /* FLASH_CR1.25*/ - FLASH_ERR = 0xA0, /* 101-00000 = 1010 0000 = 0xA0 */ /* FLASH_ER.0*/ - FLASH_ERER = 0xA1, /* 101-00001 = 1010 0001 = 0xA1 */ /* FLASH_ER.1*/ - FLASH_PGER = 0xA2, /* 101-00010 = 1010 0010 = 0xA2 */ /* FLASH_ER.2*/ - FLASH_10ER = 0xA3, /* 101-00011 = 1010 0011 = 0xA3 */ /* FLASH_ER.3*/ - FLASH_SEQER = 0xA6, /* 101-00110 = 1010 0110 = 0xA6 */ /* FLASH_ER.6*/ - FLASH_RESER = 0xA7, /* 101-00111 = 1010 0111 = 0xA7 */ /* FLASH_ER.7*/ - FLASH_WPF = 0xA8 /* 101-01000 = 1010 1000 = 0xA8 */ /* FLASH_ER.8*/ -} flashflags; - -#define FLASH_WMS_Mask 0x80000000 -#define FLASH_SUSP_Mask 0x40000000 -#define FLASH_WPG_Mask 0x20000000 -#define FLASH_DWPG_Mask 0x10000000 -#define FLASH_SER_Mask 0x08000000 -#define FLASH_SPR_Mask 0x01000000 -#define FLASH_BER_Mask 0x04000000 -#define FLASH_MER_Mask 0x02000000 -#define FLASH_BSYA1_Mask 0x00000002 -#define FLASH_BSYA2_Mask 0x00000004 - -#define FLASH_DBGP_Mask 0x00000002 -#define FLASH_ACCP_Mask 0x00000001 - -#define FLASH_Reg_Mask 0xE0 -#define FLASH_Flag_Mask 0x1F - -#define FLASH_INTM_Mask 0x00200000 -#define FLASH_INTP_Mask 0x00100000 - -/******************************************************************************* -* Function Name : FLASH_Init -* Description : Initialise the Flash -* Input : None -* Return : None -*******************************************************************************/ -void FLASH_Init(void); - -/******************************************************************************* -* Function Name : FLASH_FlagStatus -* Description : Returns the NewState of Flash flags -* Input 1 : Flash Flag -* Return : flagstate -*******************************************************************************/ -FlagStatus FLASH_FlagStatus(flashflags Xflag); - -/******************************************************************************* -* Function Name : FLASH_WriteOpStatus -* Description : Checks the write operation status -* Input 1 : flash banck -* Return : write operation status -*******************************************************************************/ -INLINE FlagStatus FLASH_WriteOpStatus(flashbanks Xbank) -{ - return Xbank == FLASH_BANK0 ? FLASH_FlagStatus(FLASH_BSYA0) : FLASH_FlagStatus(FLASH_BSYA1); -} - -/******************************************************************************* -* Function Name : FLASH_WordWrite -* Description : Writes a Word to the Flash -* Input 1 : Address of the Destination -* Input 2 : Word to program -* Return : None -*******************************************************************************/ -void FLASH_WordWrite(u32 TargetAdd, u32 Data); - -/******************************************************************************* -* Function Name : FLASH_DWordWrite -* Description : Writes Double Word to the Flash -* Input 1 : Address of the Destination -* Input 2 : Word 1 To program -* Input 3 : Word 2 To program -* Return : None -*******************************************************************************/ -void FLASH_DWordWrite(u32 TargetAdd, u32 Data0, u32 Data1); - -/******************************************************************************* -* Function Name : FLASH_EraseSector -* Description : Erases a Flash sector -* Input 1 : Sectors to be Erased -* Return : None -*******************************************************************************/ -void FLASH_SectorErase(u32 Xsectors); - -/******************************************************************************* -* Function Name : FLASH_BankErase -* Description : Erases a Bank of the Flash -* Input 1 : Bank to be Erased -* Return : None -*******************************************************************************/ -INLINE void FLASH_BankErase(flashbanks Xbank) -{ - FLASH_SectorErase(Xbank == FLASH_BANK0 ? FLASH_B0 : FLASH_B1); -} -/******************************************************************************* -* Function Name : FLASH_Suspend -* Description : Suspends the current program or erase operation -* Input 1 : None -* Return : Flash CR0 register -*******************************************************************************/ -u32 FLASH_Suspend(void); - -/******************************************************************************* -* Function Name : FLASH_Resume -* Description : Resume a Suspended program or erase operation -* Input 1 : The operation to be resumed -* Return : None -*******************************************************************************/ -void FLASH_Resume(u32 FLASH_LastOperation); - -/******************************************************************************* -* Function Name : FLASH_WordRead -* Description : Read a single word of the flash -* Input 1 : Source Address -* Return : Word -*******************************************************************************/ -u32 FLASH_WordRead(u32 FLASH_SourceAdd); -/******************************************************************************* -* Function Name : FLASH_WritePrConfig -* Description : Configures The Write Protection Bits -* Input 1 : Flash Bank -* Input 2 : Enable or disable Protection -* Return : None -*******************************************************************************/ -void FLASH_WritePrConfig(u32 Xsectors, FunctionalState NewState); -/******************************************************************************* -* Function Name : FLASH_PermanantDebugPrConfig -* Description : Configures The Debug Protection Bits -* Input 1 : ENABLE or DISABLE -* Return : None -*******************************************************************************/ -void FLASH_PermanantDebugPrConfig(FunctionalState NewState); - -/******************************************************************************* -* Function Name : FLASH_FlagClear -* Description : Clears a flash flag -* Input 1 : Flash Flag -* Return : None -*******************************************************************************/ -void FLASH_FlagClear(flashflags Xflag); - -/******************************************************************************* -* Function Name : FLASH_ITConfig -* Description : Enables Or Disables the write-end interrupt -* Input 1 : FunctionalState(Enable, Disable) -* Return : None -*******************************************************************************/ -INLINE void FLASH_ITConfig(FunctionalState NewState) -{ - if (NewState == ENABLE) FLASHR->CR0 |= FLASH_INTM_Mask; - else FLASHR->CR0 &= ~FLASH_INTM_Mask; -} - -/******************************************************************************* -* Function Name : FLASH_ITStatus -* Description : Checks if the write-end interrupt is enabled or not -* Input 1 : None -* Return : Enable, Disable -*******************************************************************************/ -INLINE FunctionalState FLASH_ITStatus(void) -{ - return (FLASHR->CR0 & FLASH_INTM_Mask)==0 ? DISABLE : ENABLE; -} - -/******************************************************************************* -* Function Name : FLASH_ITClear -* Description : Clears an interrupt pending flag -* Input 1 : None -* Return : None -*******************************************************************************/ -INLINE void FLASH_ITClear(void) -{ - FLASHR->CR0 &= ~FLASH_INTM_Mask; -} - -/******************************************************************************* -* Function Name : FLASH_ProtectionLevel -* Description : Gives the level of protection in the PDS PEN registers -* Input 1 : None -* Return : The last bit not yet reset -*******************************************************************************/ -u16 FLASH_ProtectionLevel(void); - -/******************************************************************************* -* Function Name : FLASH_WaitForLastTask -* Description : Waits for the end of last task on a Flash Bank -* Input 1 : None -* Return : Nones -*******************************************************************************/ -void FLASH_WaitForLastTask(void); - -#endif // __FLASH_H - -/*******************(C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/gpio.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/gpio.h deleted file mode 100644 index 8b3f9d38..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/gpio.h +++ /dev/null @@ -1,127 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : gpio.h -* Author : MCD Application Team -* Date First Issued : 08/06/2003 -* Description : This file contains all the functions prototypes for the -* GPIO software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __gpio_H -#define __gpio_H - -#include "71x_map.h" - -typedef enum -{ - GPIO_HI_AIN_TRI, - GPIO_IN_TRI_TTL, - GPIO_IN_TRI_CMOS, - GPIO_IPUPD_WP, - GPIO_OUT_OD, - GPIO_OUT_PP, - GPIO_AF_OD, - GPIO_AF_PP -} GpioPinMode_TypeDef; - -#define GPIO_LSB 0x00 -#define GPIO_MSB 0x08 - -/******************************************************************************* -* Function Name : GPIO_Config -* Description : Configure the GPIO port pins -* Input 1 : GPIOx (x can be 0,1 or 2) the desired port -* Input 2 : Port_Pins : pins placements -* Input 3 : Pins Mode -* Output : None -* Return : None -*******************************************************************************/ -void GPIO_Config (GPIO_TypeDef *GPIOx, u16 Port_Pins, GpioPinMode_TypeDef GPIO_Mode); - -/******************************************************************************* -* Function Name : GPIO_BitRead -* Description : Read the desired port pin value -* Input 1 : Selected GPIO port -* Input 2 : Pin number -* Output : None -* Return : The selected pin value -*******************************************************************************/ -INLINE u8 GPIO_BitRead(GPIO_TypeDef *GPIOx, u8 Port_Pin) -{ - return (GPIOx->PD >> Port_Pin) & 0x0001; -} - -/******************************************************************************* -* Function Name : GPIO_ByteRead -* Description : Read the desired port Byte value -* Input 1 : Selected GPIO port -* Input 2 : GPIO_MSB or GPIO_LSB -* Output : None -* Return : The GPIO_MSB or GPIO_LSB of the selected PD register -*******************************************************************************/ -INLINE u8 GPIO_ByteRead(GPIO_TypeDef *GPIOx, u8 Port_Byte) -{ - return (u8)(GPIOx->PD >> Port_Byte); -} - -/******************************************************************************* -* Function Name : GPIO_WordRead -* Description : Read the desired port word value -* Input 1 : Selected GPIO port -* Output : None -* Return : The selected PD register value -*******************************************************************************/ -INLINE u16 GPIO_WordRead(GPIO_TypeDef *GPIOx) -{ - return GPIOx->PD; -} - -/******************************************************************************* -* Function Name : GPIO_BitWrite -* Description : Set or reset the selected port pin -* Input 1 : Selected GPIO port -* Input 2 : Pin number -* Input 3 : bit value -* Output : None -* Return : None -*******************************************************************************/ -void GPIO_BitWrite(GPIO_TypeDef *GPIOx, u8 Port_Pin, u8 Port_Val); - -/******************************************************************************* -* Function Name : GPIO_ByteWrite -* Description : Write byte value to the selected PD register -* Input 1 : Selected GPIO port -* Input 2 : GPIO_MSB or GPIO_LSB -* Input 3 : Byte value -* Output : None -* Return : None -*******************************************************************************/ -void GPIO_ByteWrite(GPIO_TypeDef *GPIOx, u8 Port_Byte, u8 Port_Val); - -/******************************************************************************* -* Function Name : GPIO_WordWrite -* Description : Write word value to the selected PD register -* Input 1 : Selected GPIO port -* Input 2 : Value -* Output : None -* Return : None -*******************************************************************************/ -INLINE void GPIO_WordWrite(GPIO_TypeDef *GPIOx, u16 Port_Val) -{ - GPIOx->PD = Port_Val; -} - -#endif /* __gpio_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/i2c.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/i2c.h deleted file mode 100644 index a4f98fbd..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/i2c.h +++ /dev/null @@ -1,357 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : i2c.h -* Author : MCD Application Team -* Date First Issued : 05/09/2003 -* Description : This file provides prototypes of I2C functions -* and variable used in code sources -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __i2c_H -#define __i2c_H - -#include "71x_map.h" - -typedef enum -{ - I2C_CR = 0x00, - I2C_SR1 = 0x04, - I2C_SR2 = 0x08, - I2C_CCR = 0x0C, - I2C_OAR1 = 0x10, - I2C_OAR2 = 0x14, - I2C_DR = 0x18, - I2C_ECCR = 0x1C -} I2C_Registers; - -typedef enum -{ - I2C_Mode10, - I2C_Mode7 -} I2C_Addressing; - -typedef enum -{ - I2C_RX, - I2C_TX -} I2C_Direction; - -typedef enum -{ - I2C_SB = 0x00001, - I2C_M_SL = 0x00002, - I2C_ADSL = 0x00004, - I2C_BTF = 0x00008, - I2C_BUSY = 0x00010, - I2C_TRA = 0x00020, - I2C_ADD10 = 0x00040, - I2C_EVF = 0x00080, - I2C_GCAL = 0x00100, - I2C_BERR = 0x00200, - I2C_ARLO = 0x00400, - I2C_STOPF = 0x00800, - I2C_AF = 0x01000, - I2C_ENDAD = 0x02000, - I2C_STOP = 0x08000, - I2C_ACK = 0x10000, - I2C_START = 0x20000 -} I2C_Flags; - -typedef enum -{ - I2C_TX_NO, - I2C_TX_SB, - I2C_TX_AF, - I2C_TX_ARLO, - I2C_TX_BERR, - I2C_TX_ADD_OK, - I2C_TX_DATA_OK, - I2C_TX_ONGOING -} I2C_Tx_Status; - -typedef enum -{ - I2C_RX_NO, - I2C_RX_SB, - I2C_RX_AF, - I2C_RX_ARLO, - I2C_RX_BERR, - I2C_RX_ADD_OK, - I2C_RX_DATA_OK, - I2C_RX_ONGOING -} I2C_Rx_Status; - -#define I2C_PESET_Mask 0x20 -#define I2C_PERESET 0xDF -#define I2C_ENGC_Mask 0x10 -#define I2C_START_Mask 0x08 -#define I2C_STOP_Mask 0x02 -#define I2C_ACK_Mask 0x04 -#define I2C_ITE_Mask 0x01 - -/******************************************************************************* -* Function Name : I2C_Init -* Description : Initializes I2C peripheral control and registers to their -* default reset values. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -void I2C_Init (I2C_TypeDef *I2Cx); - -/******************************************************************************* -* Function Name : I2C_OnOffConfig -* Description : Enables or disables I2C peripheral. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -void I2C_OnOffConfig (I2C_TypeDef *I2Cx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : I2C_GeneralCallConfig -* Description : Enables or disables I2C general call option. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -INLINE void I2C_GeneralCallConfig (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_ENGC_Mask; - else I2Cx->CR &= ~I2C_ENGC_Mask; -} - -/******************************************************************************* -* Function Name : I2C_STARTGenerate -* Description : Generates I2C communication START condition. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -INLINE void I2C_STARTGenerate (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_START_Mask; - else I2Cx->CR &= ~I2C_START_Mask; -} - -/******************************************************************************* -* Function Name : I2C_STOPGenerate -* Description : Generates I2C communication STOP condition. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -INLINE void I2C_STOPGenerate (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_STOP_Mask; - else I2Cx->CR &= ~I2C_STOP_Mask; -} - -/******************************************************************************* -* Function Name : I2C_AcknowledgeConfig -* Description : Enables or disables I2C acknowledge feature. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -INLINE void I2C_AcknowledgeConfig (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_ACK_Mask; - else I2Cx->CR &= ~I2C_ACK_Mask; -} - -/******************************************************************************* -* Function Name : I2C_ITConfig -* Description : Enables or disables I2C interrupt feature. -* Input : I2Cx ( I2C0 or I2C1 ) -* condition(ENABLE or DISABLE). -* Return : None. -*******************************************************************************/ -INLINE void I2C_ITConfig (I2C_TypeDef *I2Cx, FunctionalState NewState) -{ - if (NewState == ENABLE) I2Cx->CR |= I2C_ITE_Mask; - else I2Cx->CR &= ~I2C_ITE_Mask; -} - -/******************************************************************************* -* Function Name : I2C_RegisterRead -* Description : Reads any I2C register and returns its value. -* Input : I2Cx ( I2C0 or I2C1 ) -* Reg :the register to be read (I2CCR,I2CSR1,I2CSR2,I2CCCR, -* I2COAR1,I2COAR2,I2CDR,I2CECCR) -* Return : the value of the register passed as parameter(u8) -*******************************************************************************/ -INLINE u8 I2C_RegisterRead (I2C_TypeDef *I2Cx, I2C_Registers reg) -{ - return (*(u8 *)(*((u32 *)&I2Cx) + reg)); -} - -/******************************************************************************* -* Function Name : I2C_FlagStatus -* Description : Checks whether any I2C Flag is set or not. -* Input : I2Cx ( I2C0 or I2C1 ) -* Access(DIRECT or INDIRECT) -* Flag : the flag to be read -* input 4: an (u8) variable needed in the case -* of the INDIRECT access -* Return : the NewState of the Flag (SET or RESET). -*******************************************************************************/ -FlagStatus I2C_FlagStatus (I2C_TypeDef *I2Cx, RegisterAccess Access, I2C_Flags Flag,...); - -/******************************************************************************* -* Function Name : I2C_FlagClear -* Description : Clears the I2C Flag passed as a parameter -* Input : I2Cx ( I2C0 or I2C1 ) -* Flag : the flag to be read -* input3: an (u8) parameter needed in the case that the flag -* to be cleared need a write in one register -* Return : None. -*******************************************************************************/ -void I2C_FlagClear (I2C_TypeDef *I2Cx, I2C_Flags Flag,...); - -/******************************************************************************* -* Function Name : I2C_SpeedConfig -* Description : Selects I2C clock speed and configures its corresponding mode. -* Input : I2Cx ( I2C0 or I2C1 ) -* Clock: I2C expected clock in Hertz. -* Return : None. -*******************************************************************************/ -void I2C_SpeedConfig (I2C_TypeDef *I2Cx, u32 Clock); - -/******************************************************************************* -* Function Name : I2C_AddressConfig -* Description : Defines the I2C bus address of the interface. -* Input : I2Cx ( I2C0 or I2C1 ). -* Address: an u16 parameter indicating the address -* of the interface. -* Mode (I2C_Mode10,I2C_Mode7). -* Return : None. -*******************************************************************************/ -void I2C_AddressConfig (I2C_TypeDef *I2Cx, u16 Address, I2C_Addressing Mode); - -/******************************************************************************* -* Function Name : I2C_FCLKConfig -* Description : Configures frequency bits according to RCLK frequency. -* the I2C selected must be disabled -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -void I2C_FCLKConfig (I2C_TypeDef *I2Cx); - -/******************************************************************************* -* Function Name : I2C_AddressSend -* Description : Transmits the address byte to select the slave device. -* Input : I2Cx ( I2C0 or I2C1 ) -* Address: an u16 parameter indicating the slave address -* Mode (I2C_Mode10,I2C_Mode7). -* Direction (I2C_RX,I2C_TX). -* Return : None. -********************************************************************************/ -void I2C_AddressSend (I2C_TypeDef *I2Cx, u16 Address, I2C_Addressing Mode, I2C_Direction Direction); - -/******************************************************************************* -* Function Name : I2C_ByteSend -* Description : Send a single byte of data. -* Input : I2Cx ( I2C0 or I2C1 ) -* Data : the byte to be sent to the slave -* Return : None. -*******************************************************************************/ -void I2C_ByteSend (I2C_TypeDef *I2Cx, u8 Data); - -/******************************************************************************* -* Function Name : I2C_BufferSend -* Description : Send data from a buffer whose number of bytes is known -* Input : I2Cx ( I2C0 or I2C1 ) -* PtrToBuffer :pointer to the byte of buffer to be transmitted. -* NbOfBytes:Number of byte of the buffer -* Return : I2C_Tx_Status :transmission status (I2C_TX_AF, I2C_TX_ARLO, -* I2C_TX_BERR,I2C_TX_DATA_OK) -*******************************************************************************/ -I2C_Tx_Status I2C_BufferSend (I2C_TypeDef *I2Cx, u8 *PtrToBuffer, u8 NbOfBytes); - -/******************************************************************************* -* Function Name : I2C_StringSend -* Description : Send data from a buffer -* Input : I2Cx ( I2C0 or I2C1 ) -* PtrToString :pointer to the string to be transmitted. -* Return : I2C_Tx_Status :transmission status (I2C_TX_AF, I2C_TX_ARLO, -* I2C_TX_BERR,I2C_TX_DATA_OK) -*******************************************************************************/ -I2C_Tx_Status I2C_StringSend (I2C_TypeDef *I2Cx, char *PtrToString); - -/******************************************************************************* -* Function Name : I2C_TransmissionStatus -* Description : Report the NewState of the transmission -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : I2C_Tx_Status :transmission status (I2C_TX_NO, I2C_TX_SB, -* I2C_TX_AF, I2C_TX_ARLO, I2C_TX_BERR,I2C_TX_ADD_OK, -* I2C_TX_DATA_OK,I2C_TX_ONGOING) -*******************************************************************************/ -I2C_Tx_Status I2C_TransmissionStatus (I2C_TypeDef *I2Cx); - -/******************************************************************************* -* Function Name : I2C_ByteReceive -* Description : Returns the received byte. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : the byte received -*******************************************************************************/ -u8 I2C_ByteReceive (I2C_TypeDef *I2Cx); - -/******************************************************************************* -* Function Name : I2C_BufferReceive -* Description : received a buffer. and return the status of error. -* Input : I2Cx ( I2C0 or I2C1 ) -* PtrToBuffer :pointer to the byte of buffer received. -* NbOfBytes:Number of byte to be received -* Return : I2C_Rx_Status:the NewState of the reception (,I2C_RX_AF, -* I2C_RX_ARLO,I2C_RX_BERR, I2C_RX_DATA_OK) -*******************************************************************************/ -I2C_Rx_Status I2C_BufferReceive (I2C_TypeDef *I2Cx, u8 *PtrToBuffer, u8 NbOfBytes); - -/******************************************************************************* -* Function Name :I2C_ReceptionStatus -* Description : Report the reception NewState. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : I2C_Rx_Status:the NewState of the reception ( I2C_RX_NO, -* I2C_RX_SB,I2C_RX_AF,I2C_RX_ARLO,I2C_RX_BERR,I2C_RX_ADD_OK, -* I2C_RX_DATA_OK, I2C_RX_ONGOING) -*******************************************************************************/ -I2C_Rx_Status I2C_ReceptionStatus (I2C_TypeDef *I2Cx); - -/******************************************************************************* -* Function Name : I2C_ErrorClear -* Description : Clears any error flags. -* Input : I2Cx ( I2C0 or I2C1 ) -* Return : None. -*******************************************************************************/ -INLINE void I2C_ErrorClear (I2C_TypeDef *I2Cx) -{ - // Clear all error flags by reading the SR2 register - (void)I2Cx->SR2; -} - -/******************************************************************************* -* Function Name : I2C_GetStatus -* Description : Reads the I2C status registers. -* Input : None -* Return : I2C status registers. -*******************************************************************************/ -INLINE u32 I2C_GetStatus(I2C_TypeDef *I2Cx) -{ - return (((I2Cx->CR&0x04)<<14)|(I2Cx->SR1|(I2Cx->SR2<<8))&0x3FFF); -} - -#endif /* __i2c_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/pcu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/pcu.h deleted file mode 100644 index 30d3fdda..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/pcu.h +++ /dev/null @@ -1,194 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : pcu.h -* Author : MCD Application Team -* Date First Issued : 30/05/2003 -* Description : This file contains all the functions prototypes for the -* PCU software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __PCU_H -#define __PCU_H - -#include "71x_map.h" - -typedef enum -{ - PCU_WREN = 0x8000, - PCU_VROK = 0x1000 -} PCU_Flags; - -typedef enum -{ - PCU_STABLE, - PCU_UNSTABLE -} PCU_VR_Status; - -typedef enum -{ - PCU_MVR = 0x0008, - PCU_LPR = 0x0020 -} PCU_VR; - -typedef enum -{ - WFI_CLOCK2_16, - WFI_EXTERNAL -} WFI_CLOCKS; - -typedef enum -{ - PCU_SLOW, - PCU_STOP, - PCU_STANDBY -} LPM_MODES; - - -// VR_OK : Voltage Regulator OK -#define PCU_VROK_Mask 0x1000 - -// Main Voltage Regulator -#define PCU_MVR_Mask 0x0008 - -// Low Power Voltage Regulator -#define PCU_LPR_Mask 0x0020 - -// PCU register Write Enable Bit -#define PCU_WREN_Mask 0x8000 - -// Low Voltage Detector -#define PCU_LVD_Mask 0x0100 - -// Power Down Flag -#define PCU_PWRDWN_Mask 0x0040 - -// WFI Mode Clock Selection Bit -#define PCU_WFI_CKSEL_Mask 0x00000002 - -// Halt Mode Enable Bit -#define PCU_EN_HALT_Mask 0x00000800 - -// Halt Mode Flag -#define PCU_HALT_Mask 0x0002 - -// Stop Mode Enable Bit -#define PCU_STOP_EN_Mask 0x00000400 - -// Low Power Regulator in Wait For interrupt Mode -#define PCU_LPRWFI_Mask 0x0020 - -// Low Power Mode in Wait For interrupt Mode -#define PCU_LPOWFI_Mask 0x00000001 - -// Software Reset Enable -#define PCU_SRESEN_Mask 0x00000001 - - -/******************************************************************************* -* Function Name : PCU_MVRStatus -* Description : This routine is used to check the Main Voltage Regulator -* : NewState. -* Input : None -* Return : STABLE, UNSTABLE -*******************************************************************************/ -INLINE PCU_VR_Status PCU_MVRStatus ( void ) -{ - return (PCU->PWRCR & PCU_VROK_Mask) == 0x00 ? PCU_UNSTABLE : PCU_STABLE; -} - -/******************************************************************************* -* Function Name : PCU_FlagStatus -* Description : This routine is used to return the PCU register flag -* Input 1 : The flag to get -* Return : RESET, SET -*******************************************************************************/ -INLINE FlagStatus PCU_FlagStatus ( PCU_Flags Xflag ) -{ - return ( PCU->PWRCR & Xflag ) == 0x00 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : PCU_VRConfig -* Description : This routine is used to configure PCU voltage regultors -* Input 1 : MVR : Main voltage Regulator - LPR : Low Power Regulator -* Input 2 : ENABLE : Enable the Voltage Regulator - DISABLE: Disable ( ByPass ) the VR -* Return : None -*******************************************************************************/ -void PCU_VRConfig ( PCU_VR xVR, FunctionalState NewState ); - -/******************************************************************************* -* Function Name : PCU_VRStatus -* Description : This routine is used to get the PCU voltage regultors status -* Input : MVR : Main voltage Regulator - LPR : Low Power Regulator -* Return : ENABLE : Enable the Voltage Regulator - DISABLE: Disable ( ByPass ) the VR -*******************************************************************************/ -INLINE FunctionalState PCU_VRStatus ( PCU_VR xVR ) -{ - return ( PCU->PWRCR & xVR ) == 0 ? ENABLE : DISABLE; -} - -/******************************************************************************* -* Function Name : PCU_LVDDisable -* Description : This routine is used to disable the Low Voltage Detector. -* Input : None -* Return : None -*******************************************************************************/ -INLINE void PCU_LVDDisable ( void ) -{ - PCU->PWRCR |= PCU_WREN_Mask; // Unlock Power Control Register - PCU->PWRCR |= PCU_LVD_Mask; // Set the LVD DIS Flag -} - -/******************************************************************************* -* Function Name : PCU_LVDStatus -* Description : This routine is used to get the LVD NewState. -* Input : None -* Return : ENABLE, DISABLE -*******************************************************************************/ -INLINE FunctionalState PCU_LVDStatus ( void ) -{ - return ( PCU->PWRCR & PCU_LVD_Mask ) == 0 ? ENABLE : DISABLE; -} - -/******************************************************************************* -* Function Name : PCU_WFIEnter -* Description : This routine is used to force the Device to enter in WFI mode -* Input 1 : CLOCK2_16 : Clock2_16 as system clock for WFI mode -* EXTERNAL : external clock as system clock for WFI mode -* Input 2 : ENABLE : Enable Low Power Regulator during Wait For Interrupt Mode -* DISABLE: Disable Low Power Regulator during Wait For Interrupt Mode -* Input 3 : ENABLE : Enable Low Power Mode during Wait For Interrupt Mode -* DISABLE: Disable Low Power Mode during Wait For Interrupt Mode -* Return : None -*******************************************************************************/ -void PCU_WFIEnter ( WFI_CLOCKS Xclock, FunctionalState Xlpr, FunctionalState Xlpm ); - -/******************************************************************************* -* Function Name : PCU_LPMEnter -* Description : This routine is used to force the Device to enter low -* power mode -* Input : SLOW : Slow Mode - STOP : Stop Mode - HALT : Halt Mode -* Return : None -*******************************************************************************/ -void PCU_LPMEnter ( LPM_MODES Xmode); - -#endif // __PCU_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/rccu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/rccu.h deleted file mode 100644 index 775efc6d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/rccu.h +++ /dev/null @@ -1,319 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : rccu.h -* Author : MCD Application Team -* Date First Issued : 28/07/2003 -* Description : This file contains all the functions prototypes for the -* RCCU software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __RCCU_H -#define __RCCU_H - -#include "71x_map.h" - -typedef enum { - RCCU_DEFAULT=0x00, - RCCU_RCLK_2 =0x01, - RCCU_RCLK_4 =0x02, - RCCU_RCLK_8 =0x03 - } RCCU_Clock_Div; - -typedef enum { - RCCU_PLL1_Output, - RCCU_CLOCK2_16, - RCCU_CLOCK2, - RCCU_RTC_CLOCK - } RCCU_RCLK_Clocks; - - - typedef enum { - RCCU_PLL1_Mul_12=0x01, - RCCU_PLL1_Mul_16=0x03, - RCCU_PLL1_Mul_20=0x00, - RCCU_PLL1_Mul_24=0x02 - } RCCU_PLL1_Mul; - -typedef enum { - RCCU_PLL2_Mul_12=0x01, - RCCU_PLL2_Mul_16=0x03, - RCCU_PLL2_Mul_20=0x00, - RCCU_PLL2_Mul_28=0x02 - } RCCU_PLL2_Mul; - -typedef enum { - RCCU_Div_1=0x00, - RCCU_Div_2=0x01, - RCCU_Div_3=0x02, - RCCU_Div_4=0x03, - RCCU_Div_5=0x04, - RCCU_Div_6=0x05, - RCCU_Div_7=0x06 - } RCCU_PLL_Div; - -typedef enum { - RCCU_PLL2_Output = 0x01, - RCCU_USBCK = 0x00 - } RCCU_USB_Clocks; - -typedef enum { - RCCU_CLK2, - RCCU_RCLK, - RCCU_MCLK, - RCCU_PCLK, - RCCU_FCLK - } RCCU_Clocks; - -typedef enum { - RCCU_PLL1_LOCK_IT = 0x0080, - RCCU_CKAF_IT = 0x0100, - RCCU_CK2_16_IT = 0x0200, - RCCU_STOP_IT = 0x0400 - } RCCU_Interrupts; - -typedef enum { - RCCU_PLL1_LOCK = 0x0002, - RCCU_CKAF_ST = 0x0004, - RCCU_PLL1_LOCK_I = 0x0800, - RCCU_CKAF_I = 0x1000, - RCCU_CK2_16_I = 0x2000, - RCCU_STOP_I = 0x4000 - } RCCU_Flags; - -typedef enum { - RCCU_ExternalReset = 0x00000000, - RCCU_SoftwareReset = 0x00000020, - RCCU_WDGReset = 0x00000040, - RCCU_RTCAlarmReset = 0x00000080, - RCCU_LVDReset = 0x00000200, - RCCU_WKPReset = 0x00000400 - }RCCU_ResetSources; - - -#define RCCU_Div2_Mask 0x00008000 -#define RCCU_Div2_Index 0x0F -#define RCCU_FACT_Mask 0x0003 - -#define RCCU_FACT1_Mask 0x0003 - -#define RCCU_FACT2_Mask 0x0300 -#define RCCU_FACT2_Index 0x08 - -#define RCCU_MX_Mask 0x00000030 -#define RCCU_MX_Index 0x04 - -#define RCCU_DX_Mask 0x00000007 - -#define RCCU_FREEN_Mask 0x00000080 - -#define RCCU_CSU_CKSEL_Mask 0x00000001 - -#define RCCU_CK2_16_Mask 0x00000008 - -#define RCCU_CKAF_SEL_Mask 0x00000004 - -#define RCCU_LOCK_Mask 0x00000002 - -#define RCCU_USBEN_Mask 0x0100 -#define RCCU_USBEN_Index 0x08 -#define RCCU_ResetSources_Mask 0x000006E0 - -// RTC Oscillator Frequency value = 32 768 Hz -#define RCCU_RTC_Osc 32768 - -/******************************************************************************* -* Function Name : RCCU_Div2Config -* Description : Enables/Disables the clock division by two -* Input : NewState : ENABLE or DISABLE -* Return : None -*******************************************************************************/ -INLINE void RCCU_Div2Config ( FunctionalState NewState ) -{ - if (NewState == ENABLE) RCCU->CFR |= RCCU_Div2_Mask; - else RCCU->CFR &= ~RCCU_Div2_Mask; -} - -/******************************************************************************* -* Function Name : RCCU_Div2Status -* Description : Gets the Div2 Flag status -* Input : None -* Input : FlagStatus -* Return : None -*******************************************************************************/ -INLINE FlagStatus RCCU_Div2Status ( void ) -{ - return (RCCU->CFR & RCCU_Div2_Mask) == 0 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : RCCU_MCLKConfig -* Description : Selects the division factor for RCLK to obtain the -* MCLK clock for the CPU -* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2, RCCU_RCLK_4, RCCU_RCLK_8 -* Return : None -*******************************************************************************/ -INLINE void RCCU_MCLKConfig ( RCCU_Clock_Div New_Clock ) -{ - PCU->MDIVR = ( PCU->MDIVR & ~RCCU_FACT_Mask ) | New_Clock; -} - -/******************************************************************************* -* Function Name : RCCU_FCLKConfig -* Description : Selects the division factor for RCLK to obtain the -* FCLK clock for the APB1 fast peripherals (PCLK1). -* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2, -* RCCU_RCLK_4, RCCU_RCLK_8 -* Return : None -*******************************************************************************/ -INLINE void RCCU_FCLKConfig ( RCCU_Clock_Div New_Clock ) -{ - PCU->PDIVR = ( PCU->PDIVR & ~RCCU_FACT1_Mask ) | New_Clock; -} - -/******************************************************************************* -* Function Name : RCCU_PCLKConfig -* Description : Selects the division factor for RCLK to obtain the -* PCLK clock for the APB2 peripherals (PCLK2). -* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2, -* RCCU_RCLK_4, RCCU_RCLK_8 -* Return : None -*******************************************************************************/ -INLINE void RCCU_PCLKConfig ( RCCU_Clock_Div New_Clock ) -{ - PCU->PDIVR =(PCU->PDIVR & ~RCCU_FACT2_Mask)|(New_Clock << RCCU_FACT2_Index); -} - -/******************************************************************************* -* Function Name : RCCU_PLL1Config -* Description : Configures the PLL1 div & mul factors. -* Input : New_Mul : RCCU_Mul_12, RCCU_Mul_16, RCCU_Mul_20, RCCU_Mul_28 -* : New_Div : RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, -* RCCU_Div_4, RCCU_Div_5, RCCU_Div_6, RCCU_Div_7 -* Return : None -*******************************************************************************/ -void RCCU_PLL1Config ( RCCU_PLL1_Mul New_Mul, RCCU_PLL_Div New_Div ); - -/******************************************************************************* -* Function Name : RCCU_PLL2Config -* Description : Configures the PLL2 div & mul factors. -* Input : New_Mul : RCCU_Mul_12, RCCU_Mul_16, RCCU_Mul_20, RCCU_Mul_28 -* : New_Div : RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, RCCU_Div_4, -* RCCU_Div_5, RCCU_Div_6, RCCU_Div_7 -* Return : None -*******************************************************************************/ -void RCCU_PLL2Config ( RCCU_PLL2_Mul New_Mul, RCCU_PLL_Div New_Div ); - -/******************************************************************************* -* Function Name : RCCU_RCLKSourceConfig -* Description : Selects the RCLK source clock -* Input : New_Clock : RCCU_PLL1_OutPut, RCCU_CLOCK2_16, RCCU_CLOCK2 -* Return : None -*******************************************************************************/ -void RCCU_RCLKSourceConfig ( RCCU_RCLK_Clocks New_Clock ); - -/******************************************************************************* -* Function Name : RCCU_RCLKClockSource -* Description : Returns the current RCLK source clock -* Input : None -* Return : RCCU_PLL1_Output, RCCU_CLOCK2_16, RCCU_CLOCK2 -*******************************************************************************/ -RCCU_RCLK_Clocks RCCU_RCLKClockSource ( void ); - -/******************************************************************************* -* Function Name : RCCU_USBCLKConfig -* Description : Selects the USB source clock -* Input : New_Clock : RCCU_PLL2_Output, RCCU_USBCK -* Return : None -*******************************************************************************/ -INLINE void RCCU_USBCLKConfig ( RCCU_USB_Clocks New_Clock ) -{ - PCU->PLL2CR = (PCU->PLL2CR & ~RCCU_USBEN_Mask)|(New_Clock << RCCU_USBEN_Index); -} - -/******************************************************************************* -* Function Name : RCCU_USBClockSource -* Description : Gets the USB source clock -* Input : None -* Return : RCCU_USB_Clocks -*******************************************************************************/ -RCCU_USB_Clocks RCCU_USBClockSource ( void ); - -/******************************************************************************* -* Function Name : RCCU_FrequencyValue -* Description : Calculates & Returns any internal RCCU clock freuqency -* passed in parametres -* Input : RCCU_Clocks : RCCU_CLK2, RCCU_RCLK, RCCU_MCLK, -* RCCU_PCLK, RCCU_FCLK -* Return : u32 -*******************************************************************************/ -u32 RCCU_FrequencyValue ( RCCU_Clocks Internal_Clk ); - -/******************************************************************************* -* Function Name : RCCU_ITConfig -* Description : Configures the RCCU interrupts -* Input : RCCU interrupts : RCCU_CK2_16_IT, RCCU_CKAF_IT, -* RCCU_PLL1_LOCK_IT -* Return : None -*******************************************************************************/ -INLINE void RCCU_ITConfig ( RCCU_Interrupts RCCU_IT, FunctionalState NewState) -{ - if (NewState == ENABLE) RCCU->CCR |= RCCU_IT; else RCCU->CCR &= ~RCCU_IT; -} - -/******************************************************************************* -* Function Name : RCCU_FlagStatus -* Description : Checks the RCCU clock flag register status -* Input : RCCU Flags : RCCU_CK2_16, RCCU_CKAF, RCCU_PLL1_LOCK -* Return : FlagStatus : SET or RESET -*******************************************************************************/ -INLINE FlagStatus RCCU_FlagStatus ( RCCU_Flags RCCU_flag ) -{ - return (RCCU->CFR & RCCU_flag) == 0 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : RCCU_FlagClear -* Description : Clears a specified flag in the RCCU registers -* Input : RCCU Flags : RCCU_CK2_16, RCCU_CKAF, RCCU_PLL1_LOCK -* Return : None -*******************************************************************************/ -INLINE void RCCU_FlagClear ( RCCU_Interrupts RCCU_IT ) -{ - RCCU->CFR |= RCCU_IT; -} - -/******************************************************************************* -* Function Name : RCCU_ResetSources -* Description : Return the source of the system reset -* Input : None -* Return : The reset source -*******************************************************************************/ -INLINE RCCU_ResetSources RCCU_ResetSource () -{ - - switch(RCCU->CFR & RCCU_ResetSources_Mask) - { - case 0x00000020: return RCCU_SoftwareReset; - case 0x00000040: return RCCU_WDGReset; - case 0x00000080: return RCCU_RTCAlarmReset; - case 0x00000200: return RCCU_LVDReset; - case 0x00000400: return RCCU_WKPReset; - default : return RCCU_ExternalReset; - } -} - -#endif // __RCCU_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/rtc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/rtc.h deleted file mode 100644 index 6d449196..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/rtc.h +++ /dev/null @@ -1,190 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : rtc.h -* Author : MCD Application Team -* Date First Issued : 20/05/2003 -* Description : This file contains all the functions prototypes for the -* RTC software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __RTC_H -#define __RTC_H - -#include "71x_map.h" - -typedef enum -{ - RTC_GIR = 0x08, - RTC_OWIR = 0x04, - RTC_AIR = 0x02, - RTC_SIR = 0x01 -} RTC_FLAGS; - -typedef enum -{ - RTC_GIT = 0x08, - RTC_OWIT = 0x04, - RTC_AIT = 0x02, - RTC_SIT = 0x01, - RTC_NONE = 0x00 -} RTC_IT; - -/******************************************************************************* -* Function Name : RTC_Delay -* Description : This routine is used to insert a delay -* Input : None -* Return : None -*******************************************************************************/ -void RTC_Delay( void ); - -/******************************************************************************* -* Function Name : RTC_CounterClear -* Description : This routine is used to clear the RTC counter -* Input : None -* Return : None -*******************************************************************************/ -void RTC_CounterClear (void); -/******************************************************************************* -* Function Name : RTC_CounterValue -* Description : This routine is used to get the RTC counter value -* Input : None -* Return : The current counter value. -*******************************************************************************/ -INLINE u32 RTC_CounterValue (void) -{ - return ( (u32)RTC->CNTH << 16 ) | RTC->CNTL; -} -/******************************************************************************* -* Function Name : RTC_CounterConfig -* Description : This routine is used to update the RTC counter value -* Input : The new counter value. -* Return : None -*******************************************************************************/ -void RTC_CounterConfig (u32 CounterValue); - -/******************************************************************************* -* Function Name : RTC_PrescalerValue -* Description : This routine is used to get the RTC prescaler Value -* Input : None -* Return : an u32 value that holds the prescaler Value. -*******************************************************************************/ -INLINE u32 RTC_PrescalerValue (void) -{ - return ( (u32)(RTC->PRLH & 0x000F) << 16 ) | RTC->PRLL; -} - -/******************************************************************************* -* Function Name : RTC_PrescalerConfig -* Description : This routine is used to set the Prescaler Value -* Input : The New prescaler Value -* Return : None -*******************************************************************************/ -void RTC_PrescalerConfig (u32 Xprescaler); - -/******************************************************************************* -* Function Name : RTC_AlarmValue -* Description : This routine is used to get the RTC alarm Value -* Input : None -* Return : an u32 value that holds the Real Time clock alarm time . -*******************************************************************************/ -INLINE u32 RTC_AlarmValue (void) -{ - return ( (u32)RTC->ALRH << 16 ) | RTC->ALRL; -} - -/******************************************************************************* -* Function Name : RTC_AlarmConfig -* Description : This routine is used to set the RTC alarm Value -* Input : an u32 value that holds the Real Time clock alarm time . -* Return : None -*******************************************************************************/ -void RTC_AlarmConfig (u32 Xalarm); - -/******************************************************************************* -* Function Name : RTC_FlagStatus -* Description : This routine is used to chek the RTC flag status -* Input : an RTC flag -* Return : Set or RESET -*******************************************************************************/ -INLINE FlagStatus RTC_FlagStatus (RTC_FLAGS Xflag) -{ - return ( RTC->CRL & Xflag ) == 0 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : RTC_FlagClear -* Description : This routine is used to clear the RTC flags -* Input : an RTC flag -* Return : None -*******************************************************************************/ -void RTC_FlagClear (RTC_FLAGS Xflag); - -/******************************************************************************* -* Function Name : RTC_ITConfig -* Description : This routine is used to configure the RTC interrupts -* Input 1 : an RTC interrupt -* Input 2 : Enable or Disable -* Return : None -*******************************************************************************/ -INLINE void RTC_ITConfig (RTC_IT Xrtcit, FunctionalState NewState) -{ - if (NewState == ENABLE) RTC->CRH |= Xrtcit; else RTC->CRH &= ~Xrtcit; -} - -/******************************************************************************* -* Function Name : RTC_ITStatus -* Description : This routine is used to get the RTC interrupts status -* Input : an RTC interrupt -* Return : Enable or Disable -*******************************************************************************/ -INLINE FunctionalState RTC_ITStatus (RTC_IT Xrtcit) -{ - return ( RTC->CRH & Xrtcit ) == 0 ? DISABLE : ENABLE; -} - -/******************************************************************************* -* Function Name : RTC_ITClear -* Description : This routine is used to clear the RTC interrupts -* Input : an RTC interrupt -* Return : None -*******************************************************************************/ -void RTC_ITClear (RTC_IT Xrtcit); - -/******************************************************************************* -* Function Name : RTC_EnterCfgMode -* Description : This routine is used to enter in the Configuration Mode -* Input : None -* Return : None -*******************************************************************************/ -void RTC_EnterCfgMode(void); - -/******************************************************************************* -* Function Name : RTC_ExitCfgMode -* Description : This routine is used to exit from the Configuration Mode -* Input : None -* Return : None -*******************************************************************************/ -void RTC_ExitCfgMode(void); - -/******************************************************************************* -* Function Name : RTC_WaitForLastTask -* Description : This routine is waits for the last task completetion -* Input : None -* Return : None -*******************************************************************************/ -void RTC_WaitForLastTask(void); - -#endif // __RTC_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/tim.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/tim.h deleted file mode 100644 index 15c00946..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/tim.h +++ /dev/null @@ -1,346 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : tim.h -* Author : MCD Application Team -* Date First Issued : 08/09/2003 -* Description : This file contains all the functions prototypes for the -* TIM software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __TIM_H -#define __TIM_H - -#include "71x_map.h" - -typedef enum { TIM_EXTERNAL, - TIM_INTERNAL - } TIM_Clocks; - -typedef enum { TIM_RISING, - TIM_FALLING - } TIM_Clock_Edges; - -typedef enum { TIM_CHANNEL_A, - TIM_CHANNEL_B - } TIM_Channels; - -typedef enum { TIM_WITH_IT, - TIM_WITHOUT_IT - } TIM_IT_Mode; - -typedef enum { TIM_TIMING, - TIM_WAVE - } TIM_OC_Modes; - -typedef enum { TIM_HIGH, - TIM_LOW - } TIM_Logic_Levels; - -typedef enum { TIM_START, - TIM_STOP, - TIM_CLEAR - } TIM_CounterOperations; - -typedef enum { TIM_ICFA = 0x8000, - TIM_OCFA = 0x4000, - TIM_TOF = 0x2000, - TIM_ICFB = 0x1000, - TIM_OCFB = 0x0800 - } TIM_Flags; - -typedef struct { u16 Pulse; - u16 Period; - } PWMI_parameters; - -#define TIM_ECKEN_Mask 0x0001 -#define TIM_EXEDG_Mask 0x0002 - -#define TIM_IEDGA_Mask 0x0004 -#define TIM_IEDGB_Mask 0x0008 - -#define TIM_PWM_Mask 0x0010 - -#define TIM_OMP_Mask 0x0020 - -#define TIM_OCAE_Mask 0x0040 -#define TIM_OCBE_Mask 0x0080 - -#define TIM_OLVLA_Mask 0x0100 -#define TIM_OLVLB_Mask 0x0200 - -#define TIM_FOLVA_Mask 0x0400 -#define TIM_FOLVB_Mask 0x0800 - -#define TIM_PWMI_Mask 0x4000 - -#define TIM_EN_Mask 0x8000 - -#define TIM_OCBIE_mask 0x0800 -#define TIM_ICBIE_Mask 0x1000 -#define TIM_TOE_Mask 0x2000 -#define TIM_ICAIE_Mask 0x8000 -#define TIM_OCAIE_mask 0x4000 - -#define TIM_ICA_IT 0x8000 // Input Capture Channel A -#define TIM_OCA_IT 0x4000 // Output Compare Channel A -#define TIM_TO_IT 0x2000 // Timer OverFlow -#define TIM_ICB_IT 0x1000 // Input Capture Channel B -#define TIM_OCB_IT 0x0800 // Input Capture Channel A - - -/******************************************************************************* -* Function Name : TIM_Init -* Description : This routine is used to Initialize the TIM peripheral -* Input : TIM Timer to Initialize -* Return : None -*******************************************************************************/ -void TIM_Init( TIM_TypeDef *TIMx ); - -/******************************************************************************* -* Function Name : TIM_ClockSourceConfig -* Description : This routine is used to configure the TIM clock source -* Input : (1) TIM Timer -* : (2) TIM_Clocks : Specifies the TIM source clock -* - TIM_INTERNAL : The TIM is clocked by the APB2 frequency -* divided by the prescaler value. -* - TIM_EXTERNAL : The TIM is clocked by an external Clock -* Return : None -*******************************************************************************/ -INLINE void TIM_ClockSourceConfig ( TIM_TypeDef *TIMx, TIM_Clocks Xclock ) -{ - if (Xclock==TIM_EXTERNAL) TIMx->CR1|=TIM_ECKEN_Mask; else TIMx->CR1&=~TIM_ECKEN_Mask; -} - -/******************************************************************************* -* Function Name : TIM_ClockSourceValue -* Description : This routine is used to get the TIM clock source -* Input : TIM Timer -* Return : TIM_Clocks : Specifies the TIM source clock -* - TIM_INTERNAL : The TIM is clocked by the APB2 frequency -* divided by the prescaler value. -* - TIM_EXTERNAL : The TIM is clocked by an external Clock -*******************************************************************************/ -INLINE TIM_Clocks TIM_ClockSourceValue ( TIM_TypeDef *TIMx ) -{ - return ( TIMx->CR1 & TIM_ECKEN_Mask) == 0 ? TIM_INTERNAL : TIM_EXTERNAL; -} - -/******************************************************************************* -* Function Name : TIM_PrescalerConfig -* Description : This routine is used to configure the TIM prescaler value -* ( using an internal clock ) -* Input : (1) TIM Timer -* : (2) Prescaler ( u8 ) -* Return : None -*******************************************************************************/ -INLINE void TIM_PrescalerConfig ( TIM_TypeDef *TIMx, u8 Xprescaler ) -{ - TIMx->CR2 = ( TIMx->CR2 & 0xFF00 ) | Xprescaler; -} - -/******************************************************************************* -* Function Name : TIM_PrescalerValue -* Description : This routine is used to get the TIM prescaler value -* ( when using using an internal clock ) -* Input : TIM Timer -* Return : Prescaler ( u8 ) -*******************************************************************************/ -INLINE u8 TIM_PrescalerValue ( TIM_TypeDef *TIMx ) -{ - return TIMx->CR2 & 0x00FF; -} - -/******************************************************************************* -* Function Name : TIM_ClockLevelConfig -* Description : This routine is used to configure the TIM clock level -* ( using an external clock ) -* Input : TIM Timer -* : TIM_Clock_Edges : Specifies the active adge of the external clock -* - TIM_RISING : The rising edge -* - TIM_FALLING : The falling edge -* Return : None -*******************************************************************************/ -INLINE void TIM_ClockLevelConfig ( TIM_TypeDef *TIMx, TIM_Clock_Edges Xedge ) -{ - if (Xedge == TIM_RISING) TIMx->CR1 |= TIM_EXEDG_Mask; else TIMx->CR1 &= ~TIM_EXEDG_Mask; -} - -/******************************************************************************* -* Function Name : TIM_ClockLevelValue -* Description : This routine is used to get the TIM clock level -* Input : TIM Timer -* Output : TIM_Clock_Edges : Specifies the active adge of the external clock -* - TIM_RISING : The rising edge -* - TIM_FALLING : The falling edge -*******************************************************************************/ -INLINE TIM_Clock_Edges TIM_ClockLevelValue ( TIM_TypeDef *TIMx ) -{ - return ( TIMx->CR1 & TIM_EXEDG_Mask ) == 0 ? TIM_FALLING : TIM_RISING; -} - -/******************************************************************************* -* Function Name : TIM_ICAPModeConfig -* Description : This routine is used to configure the input capture feature -* Input : (1) TIM Timer -* : (2) Input Capture Channel ( Channel_A or Channel_B ) -* : (3) Active Edge : Rising edge or Falling edge. -* Output : None -*******************************************************************************/ -void TIM_ICAPModeConfig ( TIM_TypeDef *TIMx, - TIM_Channels Xchannel, - TIM_Clock_Edges Xedge ); - -/******************************************************************************* -* Function Name : TIM_ICAPValue -* Description : This routine is used to get the Input Capture value -* Input : (1) TIM Timer -* : (2) Input Capture Channel ( Channel_A or Channel_B ) -* Output : None -*******************************************************************************/ -INLINE u16 TIM_ICAPValue ( TIM_TypeDef *TIMx, TIM_Channels Xchannel ) -{ - return Xchannel == TIM_CHANNEL_A ? TIMx->ICAR : TIMx->ICBR; -} - -/******************************************************************************* -* Function Name : TIM_OCMPModeConfig -* Description : This routine is used to configure the output compare feature -* Input : (1) TIM Timer -* : (2) OCMP Channel ( Channel_A or Channel_B ) -* : (3) Pulse Length -* : (4) OC_Mode : output wave, or only timing. -* : (5) Level : Rising edge or Falling edge after the == -* Output : None -*******************************************************************************/ -void TIM_OCMPModeConfig ( TIM_TypeDef *TIMx, - TIM_Channels Xchannel, - u16 XpulseLength, - TIM_OC_Modes Xmode, - TIM_Logic_Levels Xlevel ); - -/******************************************************************************* -* Function Name : TIM_OPModeConfig -* Description : This routine is used to configure the one pulse mode -* Input : (1) TIM Timer -* : (3) XpulseLength : Length of the pulse -* : (4) Level1 : Level during the pulse -* : (5) Level2 : Level after the pulse -* : (6) Activation Edge : High or Low on ICAP A -* Output : None -*******************************************************************************/ -void TIM_OPModeConfig ( TIM_TypeDef *TIMx, - u16 XpulseLength, - TIM_Logic_Levels XLevel1, - TIM_Logic_Levels XLevel2, - TIM_Clock_Edges Xedge ); - -/******************************************************************************* -* Function Name : TIM_PWMOModeConfig -* Description : This routine is used to configure the PWM in output mode -* Input : (1) TIM Timer -* : (2) DutyCycle : u16 -* : (3) Level 1 : During the Duty Cycle -* : (4) Level 2 : During the after the pulse -* : (5) Full period : u16 -* Output : None -*******************************************************************************/ -void TIM_PWMOModeConfig ( TIM_TypeDef *TIMx, - u16 XDutyCycle, - TIM_Logic_Levels XLevel1, - u16 XFullperiod, - TIM_Logic_Levels XLevel2 - ); - -/******************************************************************************* -* Function Name : TIM_PWMInputConfig -* Description : This routine is used to configure the PWM in input mode -* Input : (1) TIM Timer -* : (2) First Activation Edge -* Output : None -*******************************************************************************/ -void TIM_PWMIModeConfig ( TIM_TypeDef *TIMx, TIM_Clock_Edges Xedge ); - -/******************************************************************************* -* Function Name : TIM_PWMIValue -* Description : This routine is used to get the PWMI values -* Input : (1) TIM Timer -* Output : PWMI_parameters : - u16 Dyty cycle - - u16 Full period -*******************************************************************************/ -PWMI_parameters TIM_PWMIValue (TIM_TypeDef *TIMx ); - -/******************************************************************************* -* Function Name : TIM_CounterConfig -* Description : This routine is used to start/stop and clear the selected -* timer counter -* Input : (1) TIM Timer -* : (2) TIM_CounterOperations - TIM_START Enables or resumes the counter -* TIM_STOP Stops the TIM counter -* TIM_CLEAR Set the TIM counter value to FFFCh -* Output : None -*******************************************************************************/ -void TIM_CounterConfig ( TIM_TypeDef *TIMx, TIM_CounterOperations Xoperation ); - -/******************************************************************************* -* Function Name : TIM_ITConfig -* Description : This routine is used to configure the TIM IT -* Input : (1) TIM Timer -* : (2) TIM interrupt -* : (2) ENABLE / DISABLE -* Output : None -*******************************************************************************/ -INLINE void TIM_ITConfig ( TIM_TypeDef *TIMx, u16 New_IT, FunctionalState NewState ) -{ - if (NewState == ENABLE) TIMx->CR2 |= New_IT; else TIMx->CR2 &= ~New_IT; -} - -/******************************************************************************* -* Function Name : TIM_FlagStatus -* Description : This routine is used to check whether a Flag is Set. -* Input : (1) TIM Timer -* : (2) The TIM FLag -* Output : Flag NewState -*******************************************************************************/ -INLINE FlagStatus TIM_FlagStatus ( TIM_TypeDef *TIMx, TIM_Flags Xflag ) -{ - return (TIMx->SR & Xflag) == 0 ? RESET : SET; -} - -/******************************************************************************* -* Function Name : TIM_FlagClear -* Description : This routine is used to clear Flags. -* Input : (1) TIM Timer -* : (2) The TIM FLag -* Output : None -*******************************************************************************/ -INLINE void TIM_FlagClear ( TIM_TypeDef *TIMx, TIM_Flags Xflag ) -{ - TIMx->SR &= ~Xflag; -} - -/******************************************************************************* -* Function Name : TIM_CounterValue -* Description : This routine returns the timer counter value. -* Input : TIM Timer -* Output : The counter value -*******************************************************************************/ -INLINE u16 TIM_CounterValue(TIM_TypeDef *TIMx) -{ - return TIMx->CNTR; -} -#endif // __TIM_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/uart.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/uart.h deleted file mode 100644 index 248c8da7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/uart.h +++ /dev/null @@ -1,391 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : uart.h -* Author : MCD Application Team -* Date First Issued : 16/05/2003 -* Description : This file contains all the functions prototypes for the -* UART software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef _UART_H -#define _UART_H - -#include "71x_map.h" -#include "rccu.h" - -typedef enum -{ - UART_RxFIFO, - UART_TxFIFO -} UARTFIFO_TypeDef; - -typedef enum -{ - UART_EVEN_PARITY = 0x0000, - UART_ODD_PARITY = 0x0020, - UART_NO_PARITY -} UARTParity_TypeDef; - -typedef enum -{ - UART_0_5_StopBits = 0x00, - UART_1_StopBits = 0x08, - UART_1_5_StopBits = 0x10, - UART_2_StopBits = 0x18 -} UARTStopBits_TypeDef; - -typedef enum -{ - UARTM_8D = 0x01, - UARTM_7D_P = 0x03, - UARTM_9D = 0x04, - UARTM_8D_W = 0x05, - UARTM_8D_P = 0x07 -} UARTMode_TypeDef; - - -#define DUMMY 0 - -// UART flags definition -#define UART_TxFull 0x0200 -#define UART_RxHalfFull 0x0100 -#define UART_TimeOutIdle 0x0080 -#define UART_TimeOutNotEmpty 0x0040 -#define UART_OverrunError 0x0020 -#define UART_FrameError 0x0010 -#define UART_ParityError 0x0008 -#define UART_TxHalfEmpty 0x0004 -#define UART_TxEmpty 0x0002 -#define UART_RxBufFull 0x0001 - -// CR regiter bit definition -#define UART_FIFOEnableBit 10 -#define UART_RxEnableBit 8 -#define UART_RunBit 7 -#define UART_LoopBackBit 6 -#define UART_ParityOddBit 5 -#define UART_StopBits 3 - -// Stop bits definition -#define UART_05StopBits 0x00 -#define UART_1StopBit (0x01<<3) -#define UART_15StopBits (0x02<<3) -#define UART_2StopBits (0x03<<3) - -// Modes definition -#define UART_8BitsData 0x01 -#define UART_7BitsData 0x03 -#define UART_9BitsData 0x04 -#define UART_8BitsDataWakeUp 0x05 -#define UART_8BitsDataParity 0x07 - -/******************************************************************************* -* Function Name : UART_Init -* Description : This function initializes the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Output : None -* Return : None -*******************************************************************************/ -void UART_Init(UART_TypeDef *UARTx); - -/******************************************************************************* -* Function Name : UART_ModeConfig -* Description : This function configures the mode of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The UART mode -* Output : None -* Return : None -*******************************************************************************/ -INLINE void UART_ModeConfig(UART_TypeDef *UARTx, UARTMode_TypeDef UART_Mode) -{ - UARTx->CR = (UARTx->CR&0xFFF8)|(u16)UART_Mode; -} - -/******************************************************************************* -* Function Name : UART_BaudRateConfig -* Description : This function configures the baud rate of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The baudrate value -* Output : None -* Return : None -*******************************************************************************/ -void UART_BaudRateConfig(UART_TypeDef *UARTx, u32 BaudRate); - -/******************************************************************************* -* Function Name : UART_ParityConfig -* Description : This function configures the data parity of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The parity type -* Output : None -* Return : None -*******************************************************************************/ -INLINE void UART_ParityConfig(UART_TypeDef *UARTx, UARTParity_TypeDef Parity) -{ - UARTx->CR = (UARTx->CR&0xFFDF)|(u16)Parity; -} - -/******************************************************************************* -* Function Name : UART_StopBitsConfig -* Description : This function configures the number of stop bits of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The number of stop bits -* Output : None -* Return : None -*******************************************************************************/ -INLINE void UART_StopBitsConfig(UART_TypeDef *UARTx, UARTStopBits_TypeDef StopBits) -{ - UARTx->CR = (UARTx->CR&0xFFE7)|(u16)StopBits; -} - -/******************************************************************************* -* Function Name : UART_Config -* Description : This function configures the baudrate, the mode, the data -* parity and the number of stop bits of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The baudrate value -* Input 3 : The parity type -* Input 4 : The number of stop bits -* Input 5 : The UART mode -* Output : None -* Return : None -*******************************************************************************/ -void UART_Config(UART_TypeDef *UARTx, u32 BaudRate, UARTParity_TypeDef Parity, - UARTStopBits_TypeDef StopBits, UARTMode_TypeDef Mode); - -/******************************************************************************* -* Function Name : UART_ItConfig -* Description : This function enables or disables the interrupts of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The new interrupt flag -* Input 3 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_ItConfig(UART_TypeDef *UARTx, u16 UART_Flag, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_FifoConfig -* Description : This function enables or disables the Rx and Tx FIFOs of -* the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_FifoConfig(UART_TypeDef *UARTx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_FifoReset -* Description : This function resets the Rx and the Tx FIFOs of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : RxFIFO or TxFIFO -* Output : None -* Return : None -*******************************************************************************/ -void UART_FifoReset(UART_TypeDef *UARTx, UARTFIFO_TypeDef FIFO); - -/******************************************************************************* -* Function Name : UART_LoopBackConfig -* Description : This function enables or disables the loop back mode of -* the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_LoopBackConfig(UART_TypeDef *UARTx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_TimeOutPeriodConfig -* Description : This function configure the Time Out Period. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The time-out period value -* Output : None -* Return : None -*******************************************************************************/ -INLINE void UART_TimeOutPeriodConfig(UART_TypeDef *UARTx, u16 TimeOutPeriod) -{ - UARTx->TOR = TimeOutPeriod; -} - -/******************************************************************************* -* Function Name : UART_GuardTimeConfig -* Description : This function configure the Guard Time. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The guard time value -* Output : None -* Return : None -*******************************************************************************/ -INLINE void UART_GuardTimeConfig(UART_TypeDef *UARTx, u16 GuardTime) -{ - UARTx->GTR = GuardTime; -} - -/******************************************************************************* -* Function Name : UART_RxConfig -* Description : This function enable and disable the UART data reception. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_RxConfig(UART_TypeDef *UARTx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_OnOffConfig -* Description : This function sets On/Off the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_OnOffConfig(UART_TypeDef *UARTx, FunctionalState NewState); - -/******************************************************************************* -* Function Name : UART_ByteSend -* Description : This function sends a data byte to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data byte to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_ByteSend(UART_TypeDef *UARTx, u8 *Data); - -/******************************************************************************* -* Function Name : UART_9BitByteSend -* Description : This function sends a 9 bits data byte to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_9BitByteSend(UART_TypeDef *UARTx, u16 *Data); - -/******************************************************************************* -* Function Name : UART_DataSend -* Description : This function sends several data bytes to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data to send -* Input 3 : The data length in bytes -* Output : None -* Return : None -*******************************************************************************/ -void UART_DataSend(UART_TypeDef *UARTx, u8 *Data, u8 DataLength); - -/******************************************************************************* -* Function Name : UART_9BitDataSend -* Description : This function sends several 9 bits data bytes to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data to send -* Input 3 : The data length -* Output : None -* Return : None -*******************************************************************************/ -void UART_9BitDataSend(UART_TypeDef *UARTx, u16 *Data, u8 DataLength); - -/******************************************************************************* -* Function Name : UART_StringSend -* Description : This function sends a string to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the string to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_StringSend(UART_TypeDef *UARTx, u8 *String); - -/******************************************************************************* -* Function Name : UART_ByteReceive -* Description : This function gets a data byte from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The time-out period -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_ByteReceive(UART_TypeDef *UARTx, u8 *Data, u8 TimeOut); - -/******************************************************************************* -* Function Name : UART_9BitByteReceive -* Description : This function gets a 9 bits data byte from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The time-out period value -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_9BitByteReceive(UART_TypeDef *UARTx, u16 *Data, u8 TimeOut); - -/******************************************************************************* -* Function Name : UART_DataReceive -* Description : This function gets 8 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The data length -* Input 4 : The time-out period value -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_DataReceive(UART_TypeDef *UARTx, u8 *Data, u8 DataLength, u8 TimeOut); - -/******************************************************************************* -* Function Name : UART_9BitDataReceive -* Description : This function gets 9 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The data length -* Input 4 : The time-out value -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_9BitDataReceive(UART_TypeDef *UARTx, u16 *Data, u8 DataLength, u8 TimeOut); - -/******************************************************************************* -* Function Name : UART_StringReceive -* Description : This function gets 8 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the string will be stored -* Output : None -* Return : None -*******************************************************************************/ -u16 UART_StringReceive(UART_TypeDef *UARTx, u8 *Data); - -/******************************************************************************* -* Function Name : UART_FlagStatus -* Description : This function gets the flags status of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Output : None -* Return : None -*******************************************************************************/ -INLINE u16 UART_FlagStatus(UART_TypeDef *UARTx) -{ - return UARTx->SR; -} - -#ifdef USE_SERIAL_PORT -/******************************************************************************* -* Function Name : sendchar -* Description : This function sends a character to the selected UART. -* Input 1 : A pointer to the character to send. -* Output : None -* Return : None -*******************************************************************************/ -void sendchar( char *ch ); -#endif /* USE_SERIAL_PORT */ - -#endif /* _UART_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/wdg.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/wdg.h deleted file mode 100644 index 58858824..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/wdg.h +++ /dev/null @@ -1,130 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : wdg.h -* Author : MCD Application Team -* Date First Issued : 25/08/2003 -* Description : This file contains all the functions prototypes for the -* WDG software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __WDG_H -#define __WDG_H - -#include "71x_map.h" -#include "rccu.h" - -/******************************************************************************* -* Function Name : WDG_Enable -* Description : Enable the Watchdog Mode -* Input : None -* Return : None -*******************************************************************************/ -INLINE void WDG_Enable ( void ) -{ - WDG->CR |= 0x01; -} - -/******************************************************************************* -* Function Name : WDG_CntRefresh -* Description : Refresh and update the WDG counter to avoid a system reset. -* Input : None -* Return : None -*******************************************************************************/ -INLINE void WDG_CntRefresh ( void ) -{ - //write the first value in the key register - WDG->KR = 0xA55A; - //write the consecutive value - WDG->KR = 0x5AA5; -} - -/******************************************************************************* -* Function Name : WDG_PrescalerConfig -* Description : Set the counter prescaler value. -* Divide the counter clock by (Prescaler + 1) -* Input : Prescaler data value (8 bit) -* Return : None -*******************************************************************************/ -INLINE void WDG_PrescalerConfig ( u8 Prescaler ) -{ - WDG->PR = Prescaler; -} - -/******************************************************************************* -* Function Name : WDG_CntReloadUpdate -* Description : Update the counter pre-load value. -* Input : Pre-load data value (16 bit) -* Return : None -*******************************************************************************/ -INLINE void WDG_CntReloadUpdate ( u16 PreLoadValue ) -{ - WDG->VR = PreLoadValue; -} - -/******************************************************************************* -* Function Name : WDG_PeriodValueConfig -* Description : Set the prescaler and counter reload value based on the -* time needed -* Input : Amount of time (us) needed, peripheral clock2 value -* Return : None -*******************************************************************************/ -void WDG_PeriodValueConfig ( u32 Time ); - -/******************************************************************************* -* Function Name : WDG_CntOnOffConfig -* Description : Start or stop the free auto-reload timer to countdown. -* Input : ENABLE or DISABLE -* Return : None -*******************************************************************************/ -INLINE void WDG_CntOnOffConfig ( FunctionalState NewState ) -{ - if (NewState == ENABLE) WDG->CR |= 0x0002; else WDG->CR &= ~0x0002; -} - -/******************************************************************************* -* Function Name : WDG_ECITConfig -* Description : Enable or Disable the end of count interrupt -* Input : ENABLE or DISABLE -* Return : None -*******************************************************************************/ -INLINE void WDG_ECITConfig (FunctionalState NewState) -{ - if (NewState == ENABLE) WDG->MR |= 0x0001; else WDG->MR &= ~0x0001; -} - -/******************************************************************************* -* Function Name : WDG_ECFlagClear -* Description : Clear the end of count flag -* Input : None -* Return : None -*******************************************************************************/ -INLINE void WDG_ECFlagClear ( void ) -{ - WDG->SR = 0x0000; -} - -/******************************************************************************* -* Function Name : WDG_ECStatus -* Description : Return the end of count status -* Input : None -* Return : NewState value -*******************************************************************************/ -INLINE u16 WDG_ECStatus ( void ) -{ - return WDG->SR; -} - -#endif // __WDG_H - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/xti.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/xti.h deleted file mode 100644 index a8a2476a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/include/xti.h +++ /dev/null @@ -1,138 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : xti.h -* Author : MCD Application Team -* Date First Issued : 08/06/2003 -* Description : This file contains all the functions prototypes for the -* XTI software library. -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __XTI_H -#define __XTI_H - -#include "71x_map.h" - -typedef enum -{ - XTI_WakeUp = 1, - XTI_Interrupt = 2, - XTI_WakeUpInterrupt = 3 -} XTIMode_TypeDef; - -typedef enum -{ - XTI_FallingEdge, - XTI_RisingEdge -} XTITriggerEdge_TypeDef; - -#define XTI_Line0 0x0001 -#define XTI_Line1 (XTI_Line0<<1) -#define XTI_Line2 (XTI_Line1<<1) -#define XTI_Line3 (XTI_Line2<<1) -#define XTI_Line4 (XTI_Line3<<1) -#define XTI_Line5 (XTI_Line4<<1) -#define XTI_Line6 (XTI_Line5<<1) -#define XTI_Line7 (XTI_Line6<<1) -#define XTI_Line8 (XTI_Line7<<1) -#define XTI_Line9 (XTI_Line8<<1) -#define XTI_Line10 (XTI_Line9<<1) -#define XTI_Line11 (XTI_Line10<<1) -#define XTI_Line12 (XTI_Line11<<1) -#define XTI_Line13 (XTI_Line12<<1) -#define XTI_Line14 (XTI_Line13<<1) -#define XTI_Line15 (XTI_Line14<<1) - -/******************************************************************************* -* Function Name : XTI_Init -* Description : Initialize the XIT peripheral to reset state. -* Input 1 : None -* Output : None -* Return : None -*******************************************************************************/ -void XTI_Init(void); - -/******************************************************************************* -* Function Name : XTI_ModeConfig -* Description : Configure the XTI Mede -* Input 1 : Mode can be WakeUp, Interrupt or WakeUpInterrupt. -* Input 2 : NewState can be ENABLE ro DISABLE. -* Output : None -* Return : None -*******************************************************************************/ -INLINE void XTI_ModeConfig(XTIMode_TypeDef Mode,FunctionalState NewState) -{ - if (NewState==ENABLE) XTI->CTRL|=Mode; else XTI->CTRL&=~Mode; -} - -/******************************************************************************* -* Function Name : XTI_LineModeConfig -* Description : Configure the trigger edge. -* Input 1 : Lines to be configured. -* Input 2 : The trigger edge can be FallingEdge or RisingEdge. -* Output : None -* Return : None -*******************************************************************************/ -void XTI_LineModeConfig(u16 Lines, XTITriggerEdge_TypeDef TriggerEdge); - -/******************************************************************************* -* Function Name : XTI_LineConfig -* Description : Enable and disable lines interrupts -* Input 1 : Lines to be configured. -* Input 2 : NewState can be ENABLE ro DISABLE. -* Output : None -* Return : None -*******************************************************************************/ -void XTI_LineConfig(u16 Lines, FunctionalState NewState); - -/******************************************************************************* -* Function Name : XTI_InterruptLineValue -* Description : Get the interrupt lines -* Input 1 : None. -* Output : The interrupts lines numbers -* Return : None -*******************************************************************************/ -INLINE u16 XTI_InterruptLineValue(void) -{ - return XTI->PRL | ((u16)XTI->PRH<<8); -} - -/******************************************************************************* -* Function Name : XTI_PendingBitClear -* Description : Clear the pending bits -* Input 1 : Bits to be cleared. -* Output : None -* Return : None -*******************************************************************************/ -INLINE void XTI_PendingBitClear(u16 Lines) -{ - XTI->PRL &= ~Lines; - XTI->PRH &= ~((Lines>>8)&0x00FF); -} - -/******************************************************************************* -* Function Name : XTI_SoftwareIRQInterruprGenerate -* Description : Generate a software IRQ interrupt. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -INLINE void XTI_SWIRQGenerate(void) -{ - XTI->SR = 0x01; - XTI->SR = 0x00; -} - -#endif /* __XTI_H */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/pcu.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/pcu.c deleted file mode 100644 index 9b943a89..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/pcu.c +++ /dev/null @@ -1,139 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : pcu.c -* Author : MCD Application Team -* Date First Issued : 09/09/03 -* Description : This file provides all the Power Control Unit functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "pcu.h" -#include "rccu.h" - -/******************************************************************************* -* Function Name : PCU_VRConfig -* Description : This routine is used to configure PCU voltage regultors -* Input 1 : MVR : Main voltage Regulator - LPR : Low Power Regulator -* Input 2 : ENABLE : Enable the Voltage Regulator - DISABLE: Disable ( ByPass ) the VR -* Return : None -*******************************************************************************/ -void PCU_VRConfig ( PCU_VR Xvr, FunctionalState NewState ) -{ - u16 Tmp = PCU->PWRCR; - switch ( Xvr ) - { - case PCU_MVR : - // Configure the Main Voltage Regulator - if (NewState == DISABLE) Tmp |= PCU_MVR_Mask; else Tmp &= ~PCU_MVR_Mask; - break; - case PCU_LPR : - // Configure the Low power Voltage Regulator - if (NewState == DISABLE) Tmp |= PCU_LPR_Mask; else Tmp &= ~PCU_LPR_Mask; - break; - } - // Unlock Power Control Register - PCU->PWRCR |= PCU_WREN_Mask; - PCU->PWRCR = Tmp | PCU_WREN_Mask; -} - -/******************************************************************************* -* Function Name : PCU_WFIEnter -* Description : This routine is used to force the Device to enter in WFI mode -* Input 1 : CLOCK2_16 : Clock2_16 as system clock for WFI mode -* EXTERNAL : external clock as system clock for WFI mode -* Input 2 : ENABLE : Enable Low Power Regulator during Wait For Interrupt Mode -* DISABLE: Disable Low Power Regulator during Wait For Interrupt Mode -* Input 3 : ENABLE : Enable Low Power Mode during Wait For Interrupt Mode -* DISABLE: Disable Low Power Mode during Wait For Interrupt Mode -* Return : None -*******************************************************************************/ -void PCU_WFIEnter ( WFI_CLOCKS Xclock, FunctionalState Xlpr, FunctionalState Xlpm ) -{ - u32 Tmp; - // Enable Low Power Regulator in WFI mode - Tmp = PCU->PWRCR; - // Unlock Power Control Register - PCU->PWRCR |= PCU_WREN_Mask; - PCU->PWRCR = Xlpr == ENABLE ? Tmp & ~PCU_LPRWFI_Mask : Tmp | PCU_LPRWFI_Mask; - // WFI Clock Selection - Tmp = RCCU->CCR; - RCCU->CCR = Xclock == WFI_CLOCK2_16 ? Tmp & ~PCU_WFI_CKSEL_Mask : Tmp | PCU_WFI_CKSEL_Mask; - // Low Power Mode during WFI mode - Tmp = RCCU->CCR; - RCCU->CCR = Xlpm == DISABLE ? Tmp & ~PCU_LPOWFI_Mask : Tmp | PCU_LPOWFI_Mask; - // Enter WFI Mode - RCCU->SMR &= ~0x0001; -} - -/******************************************************************************* -* Function Name : PCU_LPMEnter -* Description : This routine is used to force the device to enter in low -* power modes -* Input : PCU_SLOW : Slow Mode - PCU_STOP : Stop Mode - PCU_STANDBY : StandBy Mode -* Return : None -*******************************************************************************/ -void PCU_LPMEnter ( LPM_MODES Xmode ) -{ - u32 temp; - switch ( Xmode ) - { - // Slow Mode - case PCU_SLOW: - { - RCCU->PLL1CR |= 0x87; - RCCU_RCLKSourceConfig ( RCCU_PLL1_Output ); - break; - } - - // Stop Mode - case PCU_STOP: - { - // Enable Stop EN bit - RCCU->CCR |= PCU_STOP_EN_Mask; - - // Write '1' to Stop Bit - XTI->CTRL |= 0x04; - // Write '0' to Stop Bit - XTI->CTRL &= 0x03; - // Write '1' to Stop Bit - XTI->CTRL |= 0x04; - // add Delay - - temp = 0; - temp = 1; - temp = 2; - temp = 3; - temp = 4; - temp = 5; - temp = 6; - temp = 7; - temp = 8; - - break; - - } - // PCU_STANDBY Mode - case PCU_STANDBY: - { - PCU->PWRCR |= PCU_WREN_Mask; // Unlock Power Control Register - PCU->PWRCR |= PCU_PWRDWN_Mask; // Set the Power Down flag - } - } -} -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/rccu.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/rccu.c deleted file mode 100644 index 7de93580..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/rccu.c +++ /dev/null @@ -1,185 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : rccu.c -* Author : MCD Application Team -* Date First Issued : 07/28/2003 -* Description : This file provides all the RCCU software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#include "rccu.h" - -/******************************************************************************* -* Function Name : RCCU_PLL1Config -* Description : Configures the PLL1 div & mul factors. -* Input : New_Mul ( RCCU_PLL1_Mul_12, RCCU_PLL1_Mul_16, RCCU_PLL1_Mul_20, -* RCCU_PLL1_Mul_24 ) -* : New_Div ( RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, RCCU_Div_4, -* RCCU_Div_5, RCCU_Div_6, RCCU_Div_7) -* Return : None -*******************************************************************************/ -void RCCU_PLL1Config ( RCCU_PLL1_Mul New_Mul, RCCU_PLL_Div New_Div ) -{ - u32 Tmp = ( RCCU->PLL1CR & ~RCCU_MX_Mask ) | ( New_Mul << RCCU_MX_Index ); - RCCU->PLL1CR = ( Tmp & ~RCCU_DX_Mask ) | New_Div | 0x40; -} - -/******************************************************************************* -* Function Name : RCCU_PLL2Config -* Description : Configures the PLL2 div & mul factors. -* Input : New_Mul ( RCCU_PLL2_Mul_12, RCCU_PLL2_Mul_16, RCCU_PLL2_Mul_20, -* RCCU_Mul_PLL2_28 ) -* : New_Div ( RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, RCCU_Div_4, -* RCCU_Div_5, RCCU_Div_6, RCCU_Div_7) -* Return : None -*******************************************************************************/ -void RCCU_PLL2Config ( RCCU_PLL2_Mul New_Mul, RCCU_PLL_Div New_Div ) -{ - u32 Tmp = ( PCU->PLL2CR & ~RCCU_MX_Mask ) | ( New_Mul << RCCU_MX_Index ); - PCU->PLL2CR = ( Tmp & ~RCCU_DX_Mask ) | ( New_Div | RCCU_FREEN_Mask ); -} - -/******************************************************************************* -* Function Name : RCCU_RCLKSourceConfig -* Description : Selects the RCLK source clock -* Input : New_Clock ( RCCU_PLL1_Output, RCCU_CLOCK2_16, RCCU_CLOCK2 ) -* Return : None -*******************************************************************************/ -void RCCU_RCLKSourceConfig ( RCCU_RCLK_Clocks New_Clock ) -{ - switch ( New_Clock ) - { - case RCCU_CLOCK2 :{// Resets the CSU_Cksel bit in clk_flag - RCCU->CFR &= ~RCCU_CSU_CKSEL_Mask; - // Set the CK2_16 Bit in the CFR - RCCU->CFR |= RCCU_CK2_16_Mask; - // Deselect The CKAF - RCCU->CCR &= ~RCCU_CKAF_SEL_Mask; - // switch off the PLL1 - RCCU->PLL1CR=((RCCU->PLL1CR & ~RCCU_DX_Mask)\ - |0x00000003) & ~RCCU_FREEN_Mask; - break;} - case RCCU_CLOCK2_16 :{// ReSet the CK2_16 Bit in the CFR - RCCU->CFR &= ~RCCU_CK2_16_Mask; - // Deselect The CKAF - RCCU->CCR &= ~RCCU_CKAF_SEL_Mask; - // switch off the PLL1 - RCCU->PLL1CR=((RCCU->PLL1CR & ~RCCU_DX_Mask)\ - |0x00000003) & ~RCCU_FREEN_Mask; - break;} - case RCCU_PLL1_Output:{// Set the CK2_16 Bit in the CFR - RCCU->CFR = RCCU->CFR | RCCU_CK2_16_Mask; - // Waits the PLL1 to lock if DX bits are different from '111' - // If all DX bit are set the PLL lock flag in meaningless - if (( RCCU->PLL1CR & 0x0007 ) != 7) - while(!(RCCU->CFR & RCCU_LOCK_Mask)); - // Deselect The CKAF - RCCU->CCR &= ~RCCU_CKAF_SEL_Mask; - // Select The CSU_CKSEL - RCCU->CFR |= RCCU_CSU_CKSEL_Mask; - break;} - case RCCU_RTC_CLOCK : {RCCU->CCR |= 0x04; - break;} - } -} - -/******************************************************************************* -* Function Name : RCCU_RCLKClockSource -* Description : Returns the current RCLK source clock -* Input : None -* Return : RCCU_PLL1_Output, RCCU_CLOCK2_16, RCCU_CLOCK2, RCCU_RTC_CLOCK -*******************************************************************************/ -RCCU_RCLK_Clocks RCCU_RCLKClockSource ( void ) -{ - if ((RCCU->CCR & 0x04)==0x04) - return RCCU_RTC_CLOCK; - - else if ((RCCU->CFR & RCCU_CK2_16_Mask)==0) - return RCCU_CLOCK2_16; - - else if (RCCU->CFR & RCCU_CSU_CKSEL_Mask) - return RCCU_PLL1_Output; - - else - return RCCU_CLOCK2; -} - -/******************************************************************************* -* Function Name : RCCU_USBClockSource -* Description : Gets the RCLK source clock -* Input : None -* Return : RCCU_USB_Clocks ( RCCU_PLL2_Output, RCCU_USBCK ) -*******************************************************************************/ -RCCU_USB_Clocks RCCU_USBClockSource ( void ) -{ - if ((PCU->PLL2CR & RCCU_USBEN_Mask ) >> RCCU_USBEN_Index == 1 ) - return RCCU_PLL2_Output; - else return RCCU_USBCK; -} - -/******************************************************************************* -* Function Name : RCCU_FrequencyValue -* Description : Calculates & Returns any internal RCCU clock frequency -* passed in parametres -* Input : RCCU_Clocks ( RCCU_CLK2, RCCU_RCLK, RCCU_MCLK, RCCU_PCLK, RCCU_FCLK ) -* Return : u32 -*******************************************************************************/ -u32 RCCU_FrequencyValue ( RCCU_Clocks Internal_Clk ) -{ - u32 Tmp; - u8 Div = 0; - u8 Mul = 0; - RCCU_RCLK_Clocks CurrentRCLK; - - Tmp = ( RCCU_Div2Status() == SET )? RCCU_Main_Osc / 2 : RCCU_Main_Osc; - - if ( Internal_Clk == RCCU_CLK2 ) - { - Div = 1; - Mul = 1; - } - else - { CurrentRCLK = RCCU_RCLKClockSource (); - switch ( CurrentRCLK ){ - case RCCU_CLOCK2_16 : Div = 16; - Mul = 1; - break; - case RCCU_CLOCK2 : Div = 1; - Mul = 1; - break; - case RCCU_PLL1_Output :{Mul=(RCCU->PLL1CR & RCCU_MX_Mask ) >> RCCU_MX_Index; - switch ( Mul ) - {case 0: Mul = 20; break; - case 1: Mul = 12; break; - case 2: Mul = 24; break; - case 3: Mul = 16; break; - } - Div = ( RCCU->PLL1CR & RCCU_DX_Mask ) + 1; - break;} - case RCCU_RTC_CLOCK : Mul = 1; - Div = 1; - Tmp = RCCU_RTC_Osc; - break;}} - - switch ( Internal_Clk ){ - case RCCU_MCLK :{Div <<= PCU->MDIVR & RCCU_FACT_Mask; - break;} - case RCCU_PCLK :{Div <<=(PCU->PDIVR & RCCU_FACT2_Mask ) >> RCCU_FACT2_Index; - break;} - case RCCU_FCLK :{Div <<= PCU->PDIVR & 0x3; - break;}} - - return (Tmp * Mul) / Div; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/rtc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/rtc.c deleted file mode 100644 index 8adab4f4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/rtc.c +++ /dev/null @@ -1,232 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : rtc.c -* Author : MCD Application Team -* Date First Issued : 09/30/2003 -* Description : This file provides all the RTC software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "rtc.h" - -// Global interrupt -#define RTC_GI_Mask 0x0008 -#define RTC_GI_Index 3 - -// OverFlow interrupt -#define RTC_OWI_Mask 0x0004 -#define RTC_OWI_Index 2 - -// Alarm interrupt -#define RTC_AI_Mask 0x0002 -#define RTC_AI_Index 1 - -// Second interrupt -#define RTC_SI_Mask 0x0001 - -// Configuration Flag Mask -#define RTC_CNF_Mask 0x0010 - -// Operation OFF flag -#define RTC_RTOFF_Mask 0x0020 - -/******************************************************************************* -* Function Name : RTC_Delay -* Description : This routine is used to insert a delay -* Input : None -* Return : None -*******************************************************************************/ -void RTC_Delay( void ) -{ - u16 _Tmp; - for (_Tmp = 0x0; _Tmp < 0x7F; _Tmp ++); -} - -/******************************************************************************* -* Function Name : RTC_CounterConfig -* Description : This routine is used to update the RTC counter value -* Input : The new counter value. -* Return : None -*******************************************************************************/ -void RTC_CounterConfig (u32 CounterValue) -{ - /* Wait For Last Task Completition */ - RTC_WaitForLastTask(); - - /* Enter to configuration mode */ - RTC_EnterCfgMode(); - - /* Wait For Last Task Completition */ - RTC_WaitForLastTask(); - -/* Update the RTC counter register with the new time and date */ - /* Update the CNTL register */ - RTC->CNTL = (u16)CounterValue; - - /* Wait For Last Task Completition */ - RTC_WaitForLastTask(); - - /* Update the CNTH register */ - RTC->CNTH = (u16)(CounterValue >> 16); - - /* Wait For Last Task Completition */ - RTC_WaitForLastTask(); - - /* Exit From Configuration Mode */ - RTC_ExitCfgMode (); -} - -/******************************************************************************* -* Function Name : RTC_PrescalerConfig -* Description : This routine is used to set the Prescaler Value -* Input : The New prescaler Value -* Return : None -*******************************************************************************/ -void RTC_PrescalerConfig (u32 Xprescaler) -{ - if ( RTC_PrescalerValue () != Xprescaler ) - { - // Wait For Last Task Completion - RTC_WaitForLastTask (); - // Enter In Configuration Mode - RTC_EnterCfgMode (); - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Set the prescaler MSB part - RTC->PRLH = (Xprescaler & 0x000F0000) >> 16; - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Set the prescaler LSB part - RTC->PRLL = (Xprescaler & 0x0000FFFF); - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Exit From Configuration Mode - RTC_ExitCfgMode (); - // Wait For Last Task Completion - RTC_WaitForLastTask (); - } -} - -/******************************************************************************* -* Function Name : RTC_AlarmConfig -* Description : This routine is used to set the RTC alarm Value -* Input : an u32 value that holds the Real Time clock alarm time. -* Return : None -*******************************************************************************/ -void RTC_AlarmConfig (u32 Xalarm) -{ - // Wait For Last Task Completion - RTC_WaitForLastTask (); - // Enter In Configuration Mode - RTC_EnterCfgMode (); - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Set The MSB part of the Alarm Time - RTC->ALRH = (Xalarm & 0xFFFF0000) >> 16; - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Set The LSB part of the Alarm Time - RTC->ALRL = (Xalarm & 0x0000FFFF); - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Exit From Configuration Mode - RTC_ExitCfgMode (); - // Wait For Last Task Completion - RTC_WaitForLastTask (); -} - -/******************************************************************************* -* Function Name : RTC_FlagClear -* Description : This routine is used to clear the RTC flags -* Input : an RTC flag -* Return : None -*******************************************************************************/ -void RTC_FlagClear (RTC_FLAGS Xflag) -{ - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Enter In Configuration Mode - RTC_EnterCfgMode(); - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Clear an RTC flag - RTC->CRL &= ~Xflag; - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Exit From Configuration Mode - RTC_ExitCfgMode (); - // Wait For Last Task Completion - RTC_WaitForLastTask(); -} - -/******************************************************************************* -* Function Name : RTC_ITClear -* Description : This routine is used to clear the RTC interrupts -* Input : an RTC interrupt -* Return : None -*******************************************************************************/ -void RTC_ITClear (RTC_IT Xrtcit) -{ - // Wait For Last Task Completion - RTC_WaitForLastTask(); - // Enter In Configuration Mode - RTC_EnterCfgMode(); - // Clears an RTC interrupt - RTC->CRL &= ~Xrtcit; - // Exit From Configuration Mode - RTC_ExitCfgMode (); - // Wait For Last Task Completion - RTC_WaitForLastTask (); -} - -/******************************************************************************* -* Function Name : RTC_EnterCfgMode -* Description : This routine is used to enter in the Configuration Mode -* Input : None -* Return : None -*******************************************************************************/ -void RTC_EnterCfgMode(void) -{ - // Set the CNF flag to enter in the Configuration Mode - RTC->CRL |= RTC_CNF_Mask; - // Wait For Last Task Completion - RTC_WaitForLastTask (); -} - -/******************************************************************************* -* Function Name : RTC_ExitCfgMode -* Description : This routine is used to exit from the Configuration Mode -* Input : None -* Return : None -*******************************************************************************/ -void RTC_ExitCfgMode(void) -{ - // Reset the CNF flag to exit from the Configuration Mode - RTC->CRL &= ~RTC_CNF_Mask; - // Wait For Last Task Completion - RTC_WaitForLastTask (); -} - -/******************************************************************************* -* Function Name : RTC_WaitForLastTask -* Description : This routine waits for the last task completion -* Input : None -* Return : None -*******************************************************************************/ -void RTC_WaitForLastTask(void) -{ - // Loop until the Last operation Completion - while (!(RTC->CRL & RTC_RTOFF_Mask)); -} -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/tim.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/tim.c deleted file mode 100644 index f6d2ab19..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/tim.c +++ /dev/null @@ -1,233 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : tim.c -* Author : MCD Application Team -* Date First Issued : 09/08/2003 -* Description : This file provides all the TIM software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "tim.h" - -/******************************************************************************* -* Function Name : TIM_Init -* Description : This routine is used to Initialize the TIM peripheral -* Input : TIM Timer to Initialize -* Return : None -*******************************************************************************/ -void TIM_Init( TIM_TypeDef *TIMx ) -{ - TIMx->CR1 = 0x0000; - TIMx->CR2 = 0x0000; - TIMx->SR = 0x0000; -} - -/******************************************************************************* -* Function Name : TIM_ICAPModeConfig -* Description : This routine is used to configure the input capture feature -* Input : (1) TIM Timer -* : (2) Input Capture Channel ( Channel_A or Channel_B ) -* : (3) Active Edge : Rising edge or Falling edge. -* Output : None -*******************************************************************************/ -void TIM_ICAPModeConfig ( TIM_TypeDef *TIMx, - TIM_Channels Xchannel, - TIM_Clock_Edges Xedge ) -{ - switch (Xchannel) - { - case TIM_CHANNEL_A : - if (Xedge == TIM_RISING) TIMx->CR1 |= TIM_IEDGA_Mask; else TIMx->CR1 &= ~TIM_IEDGA_Mask; - break; - case TIM_CHANNEL_B : - if (Xedge == TIM_RISING) TIMx->CR1 |= TIM_IEDGB_Mask; else TIMx->CR1 &= ~TIM_IEDGB_Mask; - break; - } -} - -/******************************************************************************* -* Function Name : TIM_OCMPModeConfig -* Description : This routine is used to configure the output compare feature -* Input : (1) TIM Timer -* : (2) OCMP Channel ( Channel_A or Channel_B ) -* : (3) Pulse Length -* : (4) OC_Mode : output wave, or only timing. -* : (5) Level : Rising edge or Falling edge after the == -* Output : None -*******************************************************************************/ -void TIM_OCMPModeConfig ( TIM_TypeDef *TIMx, - TIM_Channels Xchannel, - u16 XpulseLength, - TIM_OC_Modes Xmode, - TIM_Logic_Levels Xlevel ) -{ - u16 Tmp1 = 0x0000; - u16 Tmp2 = TIMx->CR2; - - TIMx->CR2 = 0x0000; - // Start The TIM Counter - TIMx->CR1 = TIM_EN_Mask; - // Update the CR2 Register - TIMx->CR2 = Tmp2; - switch ( Xmode ) - { - case TIM_TIMING : - // Output Compare Used only for Internal Timing Operation - Tmp1 = Xchannel == TIM_CHANNEL_A ? Tmp1 & ~TIM_OCAE_Mask : Tmp1 & ~TIM_OCBE_Mask; - break; - case TIM_WAVE : - // Output Compare Used for external wave generation - Tmp1 = Xchannel == TIM_CHANNEL_A ? TIM_OCAE_Mask : TIM_OCBE_Mask; - if ( Xlevel == TIM_HIGH ) - Tmp1 = Xchannel == TIM_CHANNEL_A ? Tmp1 | TIM_OLVLA_Mask : Tmp1 | TIM_OLVLB_Mask; - else - Tmp1 = Xchannel == TIM_CHANNEL_A ? Tmp1 & ~TIM_OLVLA_Mask : Tmp1 & ~TIM_OLVLB_Mask; - break; - } - if ( Xchannel == TIM_CHANNEL_A ) - TIMx->OCAR = ( XpulseLength); - else - TIMx->OCBR = ( XpulseLength); - TIMx->CNTR = 0x0000; - TIMx->CR1 |= Tmp1; -} - -/******************************************************************************* -* Function Name : TIM_OPModeConfig -* Description : This routine is used to configure the one pulse mode -* Input : (1) TIM Timer -* : (3) XpulseLength : Length of the pulse -* : (4) Level1 : Level during the pulse -* : (5) Level2 : Level after the pulse -* : (6) Activation Edge : High or Low on ICAP A -* Output : None -*******************************************************************************/ -void TIM_OPModeConfig ( TIM_TypeDef *TIMx, - u16 XpulseLength, - TIM_Logic_Levels XLevel1, - TIM_Logic_Levels XLevel2, - TIM_Clock_Edges Xedge ) -{ - u16 Tmp = 0; - - // Set the Level During the pulse - if (XLevel1 == TIM_HIGH) Tmp |= TIM_OLVLB_Mask; - // Set the Level after After the pulse - if (XLevel2 == TIM_HIGH) Tmp |= TIM_OLVLA_Mask; - // Set the Activation Edge on the INCAP 1 - if (Xedge == TIM_RISING) Tmp |= TIM_IEDGA_Mask; - // Set the Output Compare Function - Tmp |= TIM_OCAE_Mask; - // Set the One pulse mode - Tmp |= TIM_OMP_Mask; - // Update the CR1 register Value - TIMx->CR1 = Tmp; - // Set the Pulse length - TIMx->OCAR = XpulseLength; -} - -/******************************************************************************* -* Function Name : TIM_PWMOModeConfig -* Description : This routine is used to configure the PWM in output mode -* Input : (1) TIM Timer -* : (2) DutyCycle : u16 -* : (3) Level 1 : During the Duty Cycle -* : (4) Level 2 : During the after the pulse -* : (5) Full period : u16 -* Output : None -*******************************************************************************/ -void TIM_PWMOModeConfig ( TIM_TypeDef *TIMx, - u16 XDutyCycle, - TIM_Logic_Levels XLevel1, - u16 XFullperiod, - TIM_Logic_Levels XLevel2 - ) -{ - u16 Tmp = TIMx->CR1; - // Set the Level During the pulse - Tmp = XLevel1 == TIM_HIGH ? Tmp | TIM_OLVLB_Mask : Tmp & ~TIM_OLVLB_Mask; - // Set the Level after After the pulse - Tmp = XLevel2 == TIM_HIGH ? Tmp | TIM_OLVLA_Mask : Tmp & ~TIM_OLVLA_Mask; - // Set the OCAE - Tmp |= TIM_OCAE_Mask; - // Set the PWM Bit - Tmp |= TIM_PWM_Mask; - // Update the CR1 - TIMx->CR1 = Tmp; - // Set the Duty Cycle value - if ( XDutyCycle < 5 ) XDutyCycle = 5; - TIMx->OCAR = XDutyCycle - 5; - // Set the Full Period - TIMx->OCBR = XFullperiod - 5; -} - -/******************************************************************************* -* Function Name : TIM_PWMInputConfig -* Description : This routine is used to configure the PWM in input mode -* Input : (1) TIM Timer -* : (2) First Activation Edge -* Output : None -*******************************************************************************/ -void TIM_PWMIModeConfig ( TIM_TypeDef *TIMx, TIM_Clock_Edges Xedge ) -{ - u16 Tmp = TIMx->CR1; - // Set the first edge Level - Tmp = Xedge == TIM_RISING ? Tmp | TIM_IEDGA_Mask : Tmp & ~TIM_IEDGA_Mask; - // Set the Second edge Level ( Opposit of the first level ) - Tmp = Xedge == TIM_FALLING ? Tmp | TIM_IEDGB_Mask : Tmp & ~TIM_IEDGB_Mask; - // Set the PWM I Bit - Tmp |= TIM_PWMI_Mask; - // Update the CR1 - TIMx->CR1 = Tmp; -} - -/******************************************************************************* -* Function Name : TIM_PWMIValue -* Description : This routine is used to get the PWMI values -* Input : (1) TIM Timer -* Output : PWMI_parameters : - u16 Dyty cycle - - u16 Full period -*******************************************************************************/ -PWMI_parameters TIM_PWMIValue ( TIM_TypeDef *TIMx ) -{ - PWMI_parameters Tmp; - Tmp.Pulse = TIMx->ICBR; - Tmp.Period = TIMx->ICAR; - return Tmp; -} - -/******************************************************************************* -* Function Name : TIM_PWMInputConfig -* Description : This routine is used to configure the PWM in input mode -* Input : (1) TIM Timer -* : (2) First Activation Edge -* Output : None -*******************************************************************************/ -void TIM_CounterConfig ( TIM_TypeDef *TIMx, TIM_CounterOperations Xoperation ) -{ - switch ( Xoperation ) - { - case TIM_START : - TIMx->CR1 |= TIM_EN_Mask; - break; - case TIM_STOP : - TIMx->CR1 &= ~TIM_EN_Mask; - break; - case TIM_CLEAR : - TIMx->CNTR = 0x1234; - break; - } -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/uart.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/uart.c deleted file mode 100644 index db4c94e1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/uart.c +++ /dev/null @@ -1,366 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : uart.c -* Author : MCD Application Team -* Date First Issued : 06/08/2003 -* Description : This file provides all the UART software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "uart.h" - -/******************************************************************************* -* Function Name : UART_Init -* Description : This function initializes the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Output : None -* Return : None -*******************************************************************************/ -void UART_Init(UART_TypeDef *UARTx) -{ - UARTx->IER = 0x00; - UARTx->CR = 0x00; - (void)UARTx->RxBUFR; - UARTx->RxRSTR = 0xFFFF; - UARTx->TxRSTR = 0xFFFF; -} - -/******************************************************************************* -* Function Name : UART_BaudRateConfig -* Description : This function configures the baud rate of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The baudrate value -* Output : None -* Return : None -*******************************************************************************/ -void UART_BaudRateConfig(UART_TypeDef *UARTx, u32 BaudRate) -{ - UARTx->BR = (u16)(RCCU_FrequencyValue(RCCU_FCLK)/(16UL * BaudRate)); -} - -/******************************************************************************* -* Function Name : UART_Config -* Description : This function configures the baudrate, the mode, the data -* parity and the number of stop bits of the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The baudrate value -* Input 3 : The parity type -* Input 4 : The number of stop bits -* Input 5 : The UART mode -* Output : None -* Return : None -*******************************************************************************/ -void UART_Config(UART_TypeDef *UARTx, u32 BaudRate, UARTParity_TypeDef Parity, - UARTStopBits_TypeDef StopBits, UARTMode_TypeDef Mode) -{ - UART_ModeConfig(UARTx, Mode); - UART_BaudRateConfig(UARTx, BaudRate); - UART_ParityConfig(UARTx, Parity); - UART_StopBitsConfig(UARTx, StopBits); -} - -/******************************************************************************* -* Function Name : UART_ItConfig -* Description : This function enables or disables the interrupts of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : The new interrupt flag -* Input 3 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_ItConfig(UART_TypeDef *UARTx, u16 UART_Flag, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->IER|=UART_Flag; else UARTx->IER&=~UART_Flag; -} - -/******************************************************************************* -* Function Name : UART_FifoConfig -* Description : This function enables or disables the Rx and Tx FIFOs of -* the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_FifoConfig(UART_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->CR|=0x0400; else UARTx->CR&=~0x0400; -} - -/******************************************************************************* -* Function Name : UART_FifoReset -* Description : This function resets the Rx and the Tx FIFOs of the -* selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : UART_RxFIFO or UART_TxFIFO -* Output : None -* Return : None -*******************************************************************************/ -void UART_FifoReset(UART_TypeDef *UARTx, UARTFIFO_TypeDef FIFO) -{ - if (FIFO==UART_RxFIFO) UARTx->RxRSTR=0xFFFF; else UARTx->TxRSTR=0xFFFF; -} - -/******************************************************************************* -* Function Name : UART_LoopBackConfig -* Description : This function enables or disables the loop back mode of -* the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_LoopBackConfig(UART_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->CR|=0x0040; else UARTx->CR&=~0x0040; -} - -/******************************************************************************* -* Function Name : UART_RxConfig -* Description : This function enables or disables the UART data reception. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_RxConfig(UART_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->CR|=0x0100; else UARTx->CR&=~0x0100; -} - -/******************************************************************************* -* Function Name : UART_OnOffConfig -* Description : This function sets On/Off the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : ENABLE or DISABLE -* Output : None -* Return : None -*******************************************************************************/ -void UART_OnOffConfig(UART_TypeDef *UARTx, FunctionalState NewState) -{ - if (NewState==ENABLE) UARTx->CR|=0x0080; else UARTx->CR&=~0x0080; -} - -/******************************************************************************* -* Function Name : UART_ByteSend -* Description : This function sends a data byte to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data byte to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_ByteSend(UART_TypeDef *UARTx, u8 *Data) -{ - if (UARTx->CR & (0x0001<SR & UART_TxFull)); // while the UART_TxFIFO contain 16 characters. - else // if FIFO DISABLED - while (!(UARTx->SR & UART_TxEmpty)); // while the transmit shift register not empty - UARTx->TxBUFR = *Data; -} - -/******************************************************************************* -* Function Name : UART_9BitByteSend -* Description : This function sends a 9 bits data byte to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_9BitByteSend(UART_TypeDef *UARTx, u16 *Data) -{ - if(UARTx->CR & (0x0001<SR & UART_TxFull)); // while the UART_TxFIFO contain 16 characters. - else // if FIFO DISABLED - while (!(UARTx->SR & UART_TxEmpty)); // while the transmit shift register not empty - UARTx->TxBUFR = *Data; -} - -/******************************************************************************* -* Function Name : UART_DataSend -* Description : This function sends several data bytes to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data to send -* Input 3 : The data length in bytes -* Output : None -* Return : None -*******************************************************************************/ -void UART_DataSend(UART_TypeDef *UARTx, u8 *Data, u8 DataLength) -{ - while(DataLength--) - { - UART_ByteSend(UARTx,Data); - Data++; - } -} - -/******************************************************************************* -* Function Name : UART_9BitDataSend -* Description : This function sends several 9 bits data bytes to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the data to send -* Input 3 : The data length -* Output : None -* Return : None -*******************************************************************************/ -void UART_9BitDataSend(UART_TypeDef *UARTx, u16 *Data, u8 DataLength) -{ - while(DataLength--) - { - UART_9BitByteSend(UARTx,Data); - Data++; - } -} - -/******************************************************************************* -* Function Name : UART_StringSend -* Description : This function sends a string to the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the string to send -* Output : None -* Return : None -*******************************************************************************/ -void UART_StringSend(UART_TypeDef *UARTx, u8 *String) -{ - u8 *Data=String; - while(*Data != '\0') - UART_ByteSend(UARTx, Data++); - *Data='\0'; - UART_ByteSend(UARTx, Data); -} - -/******************************************************************************* -* Function Name : UART_ByteReceive -* Description : This function gets a data byte from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The time-out period -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_ByteReceive(UART_TypeDef *UARTx, u8 *Data, u8 TimeOut) -{ - u16 wStatus; - UARTx->TOR=TimeOut;// reload the Timeout counter - while (!((wStatus=UARTx->SR) & (UART_TimeOutIdle|UART_RxHalfFull|UART_RxBufFull)));// while the UART_RxFIFO is empty and no Timeoutidle - *Data = (u8)UARTx->RxBUFR; // then read the Receive Buffer Register - return wStatus; -} - -/******************************************************************************* -* Function Name : UART_9BitByteReceive -* Description : This function gets a 9 bits data byte from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The time-out period value -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_9BitByteReceive(UART_TypeDef *UARTx, u16 *Data, u8 TimeOut) -{ - u16 wStatus; - UARTx->TOR=TimeOut;// reload the Timeout counter - while (!((wStatus=UARTx->SR) & (UART_TimeOutIdle|UART_RxHalfFull|UART_RxBufFull)));// while the UART_RxFIFO is empty and no Timeoutidle - *Data = (u16)UARTx->RxBUFR; // then read the RxBUFR - return wStatus; -} - -/******************************************************************************* -* Function Name : UART_DataReceive -* Description : This function gets 8 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The data length -* Input 4 : The time-out period value -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_DataReceive(UART_TypeDef *UARTx, u8 *Data, u8 DataLength, u8 TimeOut) -{ - u16 wStatus = 0; - while(DataLength--) - wStatus=UART_ByteReceive(UARTx,Data++,TimeOut); - return wStatus; -} - -/******************************************************************************* -* Function Name : UART_9BitDataReceive -* Description : This function gets 9 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the data will be stored -* Input 3 : The data length -* Input 4 : The time-out value -* Output : The received data -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_9BitDataReceive(UART_TypeDef *UARTx, u16 *Data, u8 DataLength, u8 TimeOut) -{ - u16 wStatus = 0; - while(DataLength--) - wStatus=UART_9BitByteReceive(UARTx,Data++,TimeOut); - return wStatus; -} - -/******************************************************************************* -* Function Name : UART_StringReceive -* Description : This function gets 8 bits data bytes from the selected UART. -* Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART -* Input 2 : A pointer to the buffer where the string will be stored -* Output : The received string -* Return : The UARTx.SR register contents -*******************************************************************************/ -u16 UART_StringReceive(UART_TypeDef *UARTx, u8 *Data) -{ - u8 *pSTRING=Data; - u16 wStatus; - do - { - while (!((wStatus=UARTx->SR) & (UART_RxHalfFull|UART_RxBufFull)));// while the UART_RxFIFO is empty and no Timeoutidle - *(pSTRING++) = (u8)UARTx->RxBUFR; // then read the RxBUFR - } while((*(pSTRING - 1)!=0x0D)&(*(pSTRING - 1)!='\0')); - *(pSTRING - 1)='\0'; - return wStatus; -} - -#ifdef USE_SERIAL_PORT -/******************************************************************************* -* Function Name : sendchar -* Description : This function sends a character to the selected UART. -* Input 1 : A pointer to the character to send. -* Output : None -* Return : None -*******************************************************************************/ -void sendchar( char *ch ) -{ - #ifdef USE_UART0 - #define UARTx UART0 - #endif /* Use_UART0 */ - - #ifdef USE_UART1 - #define UARTx UART1 - #endif /* Use_UART1 */ - - #ifdef USE_UART2 - #define UARTx UART2 - #endif /* Use_UART2 */ - - #ifdef USE_UART3 - #define UARTx UART3 - #endif /* Use_UART3 */ - - UART_ByteSend(UARTx,(u8 *)ch); -} -#endif /* USE_SERIAL_PORT */ - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/wdg.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/wdg.c deleted file mode 100644 index 1ae16cf5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/wdg.c +++ /dev/null @@ -1,84 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : WDG.c -* Author : MCD Application Team -* Date First Issued : 10/24/2003 -* Description : This file provides all the WDG software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "wdg.h" - -#ifndef abs - #define abs(x) ((x)>0 ? (x) : -(x)) -#endif - -/******************************************************************************* -* Function Name : FindFactors -* Description : Search for the best (a,b) values that fit n = a*b -* with the following constraints: 1<=a<=256, 1<=b<=65536 -* Input 1 : n: the number to decompose -* Input/Output 2 : a: a pointer to the first factor -* Input/Output 3 : b: a pointer to the second factor -* Return : None -*******************************************************************************/ -static void FindFactors(unsigned long n, unsigned int *a, unsigned long *b) -{ - unsigned long b0; - unsigned int a0; - long err, err_min=n; - - *a = a0 = ((n-1)/65536ul) + 1; - *b = b0 = n / *a; - - for (; *a <= 256; (*a)++) - { - *b = n / *a; - err = (long)*a * (long)*b - (long)n; - if (abs(err) > (*a / 2)) - { - (*b)++; - err = (long)*a * (long)*b - (long)n; - } - if (abs(err) < abs(err_min)) - { - err_min = err; - a0 = *a; - b0 = *b; - if (err == 0) break; - } - } - - *a = a0; - *b = b0; -} - -/******************************************************************************* -* Function Name : WDG_PeriodValueConfig -* Description : Set the prescaler and counter reload value -* Input : Amount of time (us) needed -* Return : None -*******************************************************************************/ -void WDG_PeriodValueConfig ( u32 Time ) -{ - unsigned int a; - unsigned long n, b; - - n = Time * (RCCU_FrequencyValue(RCCU_PCLK) / 1000000); - FindFactors(n, &a, &b); - WDG->PR = a - 1; - WDG->VR = b - 1; -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/xti.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/xti.c deleted file mode 100644 index 3e23dbfb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/library/xti.c +++ /dev/null @@ -1,87 +0,0 @@ -/******************** (C) COPYRIGHT 2003 STMicroelectronics ******************** -* File Name : xti.c -* Author : MCD Application Team -* Date First Issued : 06/08/2003 -* Description : This file provides all the XTI software functions -******************************************************************************** -* History: -* 24/05/2005 : V3.0 -* 30/11/2004 : V2.0 -* 14/07/2004 : V1.3 -* 01/01/2004 : V1.2 -******************************************************************************* - THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH - CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. - AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT - OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT - OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION - CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#include "xti.h" - -/******************************************************************************* -* Function Name : XTI_Init -* Description : Initialize the XTI -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void XTI_Init(void) -{ - XTI->SR=0x00; - XTI->MRH=0x00; - XTI->MRL=0x00; - XTI->TRH=0x00; - XTI->TRL=0x00; - XTI->PRH=0x00; - XTI->PRL=0x00; - XTI->CTRL=0x00; /* Write the STOP bit twice to reset the STOP state machine */ - XTI->CTRL=0x00; -} - -/******************************************************************************* -* Function Name : XTI_LineModeConfig -* Description : Configure the trigger edge. -* Input 1 : Lines to be configured. -* Input 2 : The trigger edge can be FallingEdge or RisingEdge. -* Output : None -* Return : None -*******************************************************************************/ -void XTI_LineModeConfig(u16 Lines, XTITriggerEdge_TypeDef TriggerEdge) -{ - if(TriggerEdge == XTI_FallingEdge) - { - XTI->TRL &= ~Lines; - XTI->TRH &= ~(Lines>>8)&0x00FF; - } - else - { - XTI->TRL |= Lines; - XTI->TRH |= (Lines>>8)&0x00FF; - } -} - -/******************************************************************************* -* Function Name : XTI_LineConfig -* Description : Enable and disable lines interrupts -* Input 1 : Lines to be configured. -* Input 2 : NewState can be ENABLE or DISABLE. -* Output : None -* Return : None -*******************************************************************************/ -void XTI_LineConfig(u16 Lines, FunctionalState NewState) -{ - if(NewState) - { - XTI->MRL |= Lines; - XTI->MRH |= (Lines>>8)&0x00FF; - } - else - { - XTI->MRL &= ~Lines; - XTI->MRH &= ~(Lines>>8)&0x00FF; - } -} - -/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/CHANGELOG b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/CHANGELOG deleted file mode 100644 index 0bf28ac5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/CHANGELOG +++ /dev/null @@ -1,596 +0,0 @@ -FUTURE - - * TODO: The lwIP source code makes some invalid assumptions on processor - word-length, storage sizes and alignment. See the mailing lists for - problems with exoteric (/DSP) architectures showing these problems. - We still have to fix some of these issues neatly. - - * TODO: the ARP layer is not protected against concurrent access. If - you run from a multitasking OS, serialize access to ARP (called from - your network device driver and from a timeout thread.) - - * TODO: the PPP code is broken in a few ways. There are namespace - collisions on BSD systems and many assumptions on word-length - (sizeof(int)). In ppp.c an assumption is made on the availability of - a thread subsystem. Either PPP needs to be moved to contrib/ports/??? - or rearranged to be more generic. - -HISTORY - -(CVS HEAD) - - * [New changes go here] - -(STABLE-1_1_1) - - 2006-03-03 Christiaan Simons - * ipv4/ip_frag.c: Added bound-checking assertions on ip_reassbitmap - access and added pbuf_alloc() return value checks. - - 2006-01-01 Leon Woestenberg - * tcp_{in,out}.c, tcp_out.c: Removed 'even sndbuf' fix in TCP, which is - now handled by the checksum routine properly. - - 2006-02-27 Leon Woestenberg - * pbuf.c: Fix alignment; pbuf_init() would not work unless - pbuf_pool_memory[] was properly aligned. (Patch by Curt McDowell.) - - 2005-12-20 Leon Woestenberg - * tcp.c: Remove PCBs which stay in LAST_ACK state too long. Patch - submitted by Mitrani Hiroshi. - - 2005-12-15 Christiaan Simons - * inet.c: Disabled the added summing routine to preserve code space. - - 2005-12-14 Leon Woestenberg - * tcp_in.c: Duplicate FIN ACK race condition fix by Kelvin Lawson. - Added Curt McDowell's optimized checksumming routine for future - inclusion. Need to create test case for unaliged, aligned, odd, - even length combination of cases on various endianess machines. - - 2005-12-09 Christiaan Simons - * inet.c: Rewrote standard checksum routine in proper portable C. - - 2005-11-25 Christiaan Simons - * udp.c tcp.c: Removed SO_REUSE hack. Should reside in socket code only. - * *.c: introduced cc.h LWIP_DEBUG formatters matching the u16_t, s16_t, - u32_t, s32_t typedefs. This solves most debug word-length assumes. - - 2005-07-17 Leon Woestenberg - * inet.c: Fixed unaligned 16-bit access in the standard checksum - routine by Peter Jolasson. - * slipif.c: Fixed implementation assumption of single-pbuf datagrams. - - 2005-02-04 Leon Woestenberg - * tcp_out.c: Fixed uninitialized 'queue' referenced in memerr branch. - * tcp_{out|in}.c: Applied patch fixing unaligned access. - - 2005-01-04 Leon Woestenberg - * pbuf.c: Fixed missing semicolon after LWIP_DEBUG statement. - - 2005-01-03 Leon Woestenberg - * udp.c: UDP pcb->recv() was called even when it was NULL. - -(STABLE-1_1_0) - - 2004-12-28 Leon Woestenberg - * etharp.*: Disabled multiple packets on the ARP queue. - This clashes with TCP queueing. - - 2004-11-28 Leon Woestenberg - * etharp.*: Fixed race condition from ARP request to ARP timeout. - Halved the ARP period, doubled the period counts. - ETHARP_MAX_PENDING now should be at least 2. This prevents - the counter from reaching 0 right away (which would allow - too little time for ARP responses to be received). - - 2004-11-25 Leon Woestenberg - * dhcp.c: Decline messages were not multicast but unicast. - * etharp.c: ETHARP_CREATE is renamed to ETHARP_TRY_HARD. - Do not try hard to insert arbitrary packet's source address, - etharp_ip_input() now calls etharp_update() without ETHARP_TRY_HARD. - etharp_query() now always DOES call ETHARP_TRY_HARD so that users - querying an address will see it appear in the cache (DHCP could - suffer from this when a server invalidly gave an in-use address.) - * ipv4/ip_addr.h: Renamed ip_addr_maskcmp() to _netcmp() as we are - comparing network addresses (identifiers), not the network masks - themselves. - * ipv4/ip_addr.c: ip_addr_isbroadcast() now checks that the given - IP address actually belongs to the network of the given interface. - - 2004-11-24 Kieran Mansley - * tcp.c: Increment pcb->snd_buf when ACK is received in SYN_SENT state. - -(STABLE-1_1_0-RC1) - - 2004-10-16 Kieran Mansley - * tcp.c: Add code to tcp_recved() to send an ACK (window update) immediately, - even if one is already pending, if the rcv_wnd is above a threshold - (currently TCP_WND/2). This avoids waiting for a timer to expire to send a - delayed ACK in order to open the window if the stack is only receiving data. - - 2004-09-12 Kieran Mansley - * tcp*.*: Retransmit time-out handling improvement by Sam Jansen. - - 2004-08-20 Tony Mountifield - * etharp.c: Make sure the first pbuf queued on an ARP entry - is properly ref counted. - - 2004-07-27 Tony Mountifield - * debug.h: Added (int) cast in LWIP_DEBUGF() to avoid compiler - warnings about comparison. - * pbuf.c: Stopped compiler complaining of empty if statement - when LWIP_DEBUGF() empty. Closed an unclosed comment. - * tcp.c: Stopped compiler complaining of empty if statement - when LWIP_DEBUGF() empty. - * ip.h Corrected IPH_TOS() macro: returns a byte, so doesn't need htons(). - * inet.c: Added a couple of casts to quiet the compiler. - No need to test isascii(c) before isdigit(c) or isxdigit(c). - - 2004-07-22 Tony Mountifield - * inet.c: Made data types consistent in inet_ntoa(). - Added casts for return values of checksum routines, to pacify compiler. - * ip_frag.c, tcp_out.c, sockets.c, pbuf.c - Small corrections to some debugging statements, to pacify compiler. - - 2004-07-21 Tony Mountifield - * etharp.c: Removed spurious semicolon and added missing end-of-comment. - * ethernetif.c Updated low_level_output() to match prototype for - netif->linkoutput and changed low_level_input() similarly for consistency. - * api_msg.c: Changed recv_raw() from int to u8_t, to match prototype - of raw_recv() in raw.h and so avoid compiler error. - * sockets.c: Added trivial (int) cast to keep compiler happier. - * ip.c, netif.c Changed debug statements to use the tidier ip4_addrN() macros. - -(STABLE-1_0_0) - - ++ Changes: - - 2004-07-05 Leon Woestenberg - * sockets.*: Restructured LWIP_PRIVATE_TIMEVAL. Make sure - your cc.h file defines this either 1 or 0. If non-defined, - defaults to 1. - * .c: Added and includes where used. - * etharp.c: Made some array indices unsigned. - - 2004-06-27 Leon Woestenberg - * netif.*: Added netif_set_up()/down(). - * dhcp.c: Changes to restart program flow. - - 2004-05-07 Leon Woestenberg - * etharp.c: In find_entry(), instead of a list traversal per candidate, do a - single-pass lookup for different candidates. Should exploit locality. - - 2004-04-29 Leon Woestenberg - * tcp*.c: Cleaned up source comment documentation for Doxygen processing. - * opt.h: ETHARP_ALWAYS_INSERT option removed to comply with ARP RFC. - * etharp.c: update_arp_entry() only adds new ARP entries when adviced to by - the caller. This deprecates the ETHARP_ALWAYS_INSERT overrule option. - - ++ Bug fixes: - - 2004-04-27 Leon Woestenberg - * etharp.c: Applied patch of bug #8708 by Toni Mountifield with a solution - suggested by Timmy Brolin. Fix for 32-bit processors that cannot access - non-aligned 32-bit words, such as soms 32-bit TCP/IP header fields. Fix - is to prefix the 14-bit Ethernet headers with two padding bytes. - - 2004-04-23 Leon Woestenberg - * ip_addr.c: Fix in the ip_addr_isbroadcast() check. - * etharp.c: Fixed the case where the packet that initiates the ARP request - is not queued, and gets lost. Fixed the case where the packets destination - address is already known; we now always queue the packet and perform an ARP - request. - -(STABLE-0_7_0) - - ++ Bug fixes: - - * Fixed TCP bug for SYN_SENT to ESTABLISHED state transition. - * Fixed TCP bug in dequeueing of FIN from out of order segment queue. - * Fixed two possible NULL references in rare cases. - -(STABLE-0_6_6) - - ++ Bug fixes: - - * Fixed DHCP which did not include the IP address in DECLINE messages. - - ++ Changes: - - * etharp.c has been hauled over a bit. - -(STABLE-0_6_5) - - ++ Bug fixes: - - * Fixed TCP bug induced by bad window resizing with unidirectional TCP traffic. - * Packets sent from ARP queue had invalid source hardware address. - - ++ Changes: - - * Pass-by ARP requests do now update the cache. - - ++ New features: - - * No longer dependent on ctype.h. - * New socket options. - * Raw IP pcb support. - -(STABLE-0_6_4) - - ++ Bug fixes: - - * Some debug formatters and casts fixed. - * Numereous fixes in PPP. - - ++ Changes: - - * DEBUGF now is LWIP_DEBUGF - * pbuf_dechain() has been re-enabled. - * Mentioned the changed use of CVS branches in README. - -(STABLE-0_6_3) - - ++ Bug fixes: - - * Fixed pool pbuf memory leak in pbuf_alloc(). - Occured if not enough PBUF_POOL pbufs for a packet pbuf chain. - Reported by Savin Zlobec. - - * PBUF_POOL chains had their tot_len field not set for non-first - pbufs. Fixed in pbuf_alloc(). - - ++ New features: - - * Added PPP stack contributed by Marc Boucher - - ++ Changes: - - * Now drops short packets for ICMP/UDP/TCP protocols. More robust. - - * ARP queueuing now queues the latest packet instead of the first. - This is the RFC recommended behaviour, but can be overridden in - lwipopts.h. - -(0.6.2) - - ++ Bugfixes: - - * TCP has been fixed to deal with the new use of the pbuf->ref - counter. - - * DHCP dhcp_inform() crash bug fixed. - - ++ Changes: - - * Removed pbuf_pool_free_cache and pbuf_pool_alloc_cache. Also removed - pbuf_refresh(). This has sped up pbuf pool operations considerably. - Implemented by David Haas. - -(0.6.1) - - ++ New features: - - * The packet buffer implementation has been enhanced to support - zero-copy and copy-on-demand for packet buffers which have their - payloads in application-managed memory. - Implemented by David Haas. - - Use PBUF_REF to make a pbuf refer to RAM. lwIP will use zero-copy - if an outgoing packet can be directly sent on the link, or perform - a copy-on-demand when necessary. - - The application can safely assume the packet is sent, and the RAM - is available to the application directly after calling udp_send() - or similar function. - - ++ Bugfixes: - - * ARP_QUEUEING should now correctly work for all cases, including - PBUF_REF. - Implemented by Leon Woestenberg. - - ++ Changes: - - * IP_ADDR_ANY is no longer a NULL pointer. Instead, it is a pointer - to a '0.0.0.0' IP address. - - * The packet buffer implementation is changed. The pbuf->ref counter - meaning has changed, and several pbuf functions have been - adapted accordingly. - - * netif drivers have to be changed to set the hardware address length field - that must be initialized correctly by the driver (hint: 6 for Ethernet MAC). - See the contrib/ports/c16x cs8900 driver as a driver example. - - * netif's have a dhcp field that must be initialized to NULL by the driver. - See the contrib/ports/c16x cs8900 driver as a driver example. - -(0.5.x) This file has been unmaintained up to 0.6.1. All changes are - logged in CVS but have not been explained here. - -(0.5.3) Changes since version 0.5.2 - - ++ Bugfixes: - - * memp_malloc(MEMP_API_MSG) could fail with multiple application - threads because it wasn't protected by semaphores. - - ++ Other changes: - - * struct ip_addr now packed. - - * The name of the time variable in arp.c has been changed to ctime - to avoid conflicts with the time() function. - -(0.5.2) Changes since version 0.5.1 - - ++ New features: - - * A new TCP function, tcp_tmr(), now handles both TCP timers. - - ++ Bugfixes: - - * A bug in tcp_parseopt() could cause the stack to hang because of a - malformed TCP option. - - * The address of new connections in the accept() function in the BSD - socket library was not handled correctly. - - * pbuf_dechain() did not update the ->tot_len field of the tail. - - * Aborted TCP connections were not handled correctly in all - situations. - - ++ Other changes: - - * All protocol header structs are now packed. - - * The ->len field in the tcp_seg structure now counts the actual - amount of data, and does not add one for SYN and FIN segments. - -(0.5.1) Changes since version 0.5.0 - - ++ New features: - - * Possible to run as a user process under Linux. - - * Preliminary support for cross platform packed structs. - - * ARP timer now implemented. - - ++ Bugfixes: - - * TCP output queue length was badly initialized when opening - connections. - - * TCP delayed ACKs were not sent correctly. - - * Explicit initialization of BSS segment variables. - - * read() in BSD socket library could drop data. - - * Problems with memory alignment. - - * Situations when all TCP buffers were used could lead to - starvation. - - * TCP MSS option wasn't parsed correctly. - - * Problems with UDP checksum calculation. - - * IP multicast address tests had endianess problems. - - * ARP requests had wrong destination hardware address. - - ++ Other changes: - - * struct eth_addr changed from u16_t[3] array to u8_t[6]. - - * A ->linkoutput() member was added to struct netif. - - * TCP and UDP ->dest_* struct members where changed to ->remote_*. - - * ntoh* macros are now null definitions for big endian CPUs. - -(0.5.0) Changes since version 0.4.2 - - ++ New features: - - * Redesigned operating system emulation layer to make porting easier. - - * Better control over TCP output buffers. - - * Documenation added. - - ++ Bugfixes: - - * Locking issues in buffer management. - - * Bugfixes in the sequential API. - - * IP forwarding could cause memory leakage. This has been fixed. - - ++ Other changes: - - * Directory structure somewhat changed; the core/ tree has been - collapsed. - -(0.4.2) Changes since version 0.4.1 - - ++ New features: - - * Experimental ARP implementation added. - - * Skeleton Ethernet driver added. - - * Experimental BSD socket API library added. - - ++ Bugfixes: - - * In very intense situations, memory leakage could occur. This has - been fixed. - - ++ Other changes: - - * Variables named "data" and "code" have been renamed in order to - avoid name conflicts in certain compilers. - - * Variable++ have in appliciable cases been translated to ++variable - since some compilers generate better code in the latter case. - -(0.4.1) Changes since version 0.4 - - ++ New features: - - * TCP: Connection attempts time out earlier than data - transmissions. Nagle algorithm implemented. Push flag set on the - last segment in a burst. - - * UDP: experimental support for UDP-Lite extensions. - - ++ Bugfixes: - - * TCP: out of order segments were in some cases handled incorrectly, - and this has now been fixed. Delayed acknowledgements was broken - in 0.4, has now been fixed. Binding to an address that is in use - now results in an error. Reset connections sometimes hung an - application; this has been fixed. - - * Checksum calculation sometimes failed for chained pbufs with odd - lengths. This has been fixed. - - * API: a lot of bug fixes in the API. The UDP API has been improved - and tested. Error reporting and handling has been - improved. Logical flaws and race conditions for incoming TCP - connections has been found and removed. - - * Memory manager: alignment issues. Reallocating memory sometimes - failed, this has been fixed. - - * Generic library: bcopy was flawed and has been fixed. - - ++ Other changes: - - * API: all datatypes has been changed from generic ones such as - ints, to specified ones such as u16_t. Functions that return - errors now have the correct type (err_t). - - * General: A lot of code cleaned up and debugging code removed. Many - portability issues have been fixed. - - * The license was changed; the advertising clause was removed. - - * C64 port added. - - * Thanks: Huge thanks go to Dagan Galarneau, Horst Garnetzke, Petri - Kosunen, Mikael Caleres, and Frits Wilmink for reporting and - fixing bugs! - -(0.4) Changes since version 0.3.1 - - * Memory management has been radically changed; instead of - allocating memory from a shared heap, memory for objects that are - rapidly allocated and deallocated is now kept in pools. Allocation - and deallocation from those memory pools is very fast. The shared - heap is still present but is used less frequently. - - * The memory, memory pool, and packet buffer subsystems now support - 4-, 2-, or 1-byte alignment. - - * "Out of memory" situations are handled in a more robust way. - - * Stack usage has been reduced. - - * Easier configuration of lwIP parameters such as memory usage, - TTLs, statistics gathering, etc. All configuration parameters are - now kept in a single header file "lwipopts.h". - - * The directory structure has been changed slightly so that all - architecture specific files are kept under the src/arch - hierarchy. - - * Error propagation has been improved, both in the protocol modules - and in the API. - - * The code for the RTXC architecture has been implemented, tested - and put to use. - - * Bugs have been found and corrected in the TCP, UDP, IP, API, and - the Internet checksum modules. - - * Bugs related to porting between a 32-bit and a 16-bit architecture - have been found and corrected. - - * The license has been changed slightly to conform more with the - original BSD license, including the advertisement clause. - -(0.3.1) Changes since version 0.3 - - * Fix of a fatal bug in the buffer management. Pbufs with allocated - RAM never returned the RAM when the pbuf was deallocated. - - * TCP congestion control, window updates and retransmissions did not - work correctly. This has now been fixed. - - * Bugfixes in the API. - -(0.3) Changes since version 0.2 - - * New and improved directory structure. All include files are now - kept in a dedicated include/ directory. - - * The API now has proper error handling. A new function, - netconn_err(), now returns an error code for the connection in - case of errors. - - * Improvements in the memory management subsystem. The system now - keeps a pointer to the lowest free memory block. A new function, - mem_malloc2() tries to allocate memory once, and if it fails tries - to free some memory and retry the allocation. - - * Much testing has been done with limited memory - configurations. lwIP now does a better job when overloaded. - - * Some bugfixes and improvements to the buffer (pbuf) subsystem. - - * Many bugfixes in the TCP code: - - - Fixed a bug in tcp_close(). - - - The TCP receive window was incorrectly closed when out of - sequence segments was received. This has been fixed. - - - Connections are now timed-out of the FIN-WAIT-2 state. - - - The initial congestion window could in some cases be too - large. This has been fixed. - - - The retransmission queue could in some cases be screwed up. This - has been fixed. - - - TCP RST flag now handled correctly. - - - Out of sequence data was in some cases never delivered to the - application. This has been fixed. - - - Retransmitted segments now contain the correct acknowledgment - number and advertised window. - - - TCP retransmission timeout backoffs are not correctly computed - (ala BSD). After a number of retransmissions, TCP now gives up - the connection. - - * TCP connections now are kept on three lists, one for active - connections, one for listening connections, and one for - connections that are in TIME-WAIT. This greatly speeds up the fast - timeout processing for sending delayed ACKs. - - * TCP now provides proper feedback to the application when a - connection has been successfully set up. - - * More comments have been added to the code. The code has also been - somewhat cleaned up. - -(0.2) Initial public release. diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/COPYING b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/COPYING deleted file mode 100644 index e23898b5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/COPYING +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (c) 2001, 2002 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/FILES b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/FILES deleted file mode 100644 index 66253196..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/FILES +++ /dev/null @@ -1,4 +0,0 @@ -src/ - The source code for the lwIP TCP/IP stack. -doc/ - The documentation for lwIP. - -See also the FILES file in each subdirectory. diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/README b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/README deleted file mode 100644 index d9102826..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/README +++ /dev/null @@ -1,74 +0,0 @@ -INTRODUCTION - -lwIP is a small independent implementation of the TCP/IP protocol -suite that has been developed by Adam Dunkels at the Computer and -Networks Architectures (CNA) lab at the Swedish Institute of Computer -Science (SICS). - -The focus of the lwIP TCP/IP implementation is to reduce the RAM usage -while still having a full scale TCP. This making lwIP suitable for use -in embedded systems with tens of kilobytes of free RAM and room for -around 40 kilobytes of code ROM. - -FEATURES - - * IP (Internet Protocol) including packet forwarding over multiple - network interfaces - * ICMP (Internet Control Message Protocol) for network maintenance - and debugging - * UDP (User Datagram Protocol) including experimental UDP-lite - extensions - * TCP (Transmission Control Protocol) with congestion control, RTT - estimation and fast recovery/fast retransmit - * Specialized API for enhanced performance - * Optional Berkeley socket API - -LICENSE - -lwIP is freely available under a BSD license. - -DEVELOPMENT - -lwIP has grown into an excellent TCP/IP stack for embedded devices, -and developers using the stack often submit bug fixes, improvements, -and additions to the stack to further increase its usefulness. - -Development of lwIP is hosted on Savannah, a central point for -software development, maintenance and distribution. Everyone can -help improve lwIP by use of Savannah's interface, CVS and the -mailing list. A core team of developers will commit changes to the -CVS source tree. - -The lwIP TCP/IP stack is maintained in the 'lwip' CVS module and -contributions (such as platform ports) are in the 'contrib' module. - -See doc/savannah.txt for details on CVS server access for users and -developers. - -Last night's CVS tar ball can be downloaded from: - http://savannah.gnu.org/cvs.backups/lwip.tar.gz [CHANGED - NEEDS FIXING] - -The current CVS trees are web-browsable: - http://savannah.nongnu.org/cgi-bin/viewcvs/lwip/lwip/ - http://savannah.nongnu.org/cgi-bin/viewcvs/lwip/contrib/ - -Submit patches and bugs via the lwIP project page: - http://savannah.nongnu.org/projects/lwip/ - - -DOCUMENTATION - -The original out-dated homepage of lwIP and Adam Dunkels' papers on -lwIP are at the official lwIP home page: - http://www.sics.se/~adam/lwip/ - -Self documentation of the source code is regularly extracted from the -current CVS sources and is available from this web page: - http://www.nongnu.org/lwip/ - -Reading Adam's papers, the files in docs/, browsing the source code -documentation and browsing the mailing list archives is a good way to -become familiar with the design of lwIP. - -Adam Dunkels -Leon Woestenberg diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/arch/cc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/arch/cc.h deleted file mode 100644 index 377f219f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/arch/cc.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * Modifcations: Christian Walter - */ -#ifndef __CC_H__ -#define __CC_H__ - -/* ------------------------ System includes ------------------------------- */ -#include - -/* ------------------------ Project includes ------------------------------ */ -#include "cpu.h" -#include "sys_arch.h" - -/* ------------------------ Defines --------------------------------------- */ - -#define PACK_STRUCT_BEGIN -#define PACK_STRUCT_STRUCT __attribute__ ((__packed__)) -#define PACK_STRUCT_END - -#define PACK_STRUCT_FIELD( x ) x - -#define ALIGN_STRUCT_8_BEGIN -#define ALIGN_STRUCT_8 __attribute__ ((aligned (8))) -#define ALIGN_STRUCT_8_END - -#define LWIP_PLATFORM_ASSERT( x ) sys_assert( x ) -#define LWIP_PLATFORM_DIAG( x, ... ) do{ sys_debug x; } while( 0 ); - -/* Define (sn)printf formatters for these lwIP types */ -#define U16_F "hu" -#define S16_F "hd" -#define X16_F "hx" -#define U32_F "lu" -#define S32_F "ld" -#define X32_F "lx" - -/* ------------------------ Type definitions (lwIP) ----------------------- */ -typedef unsigned char u8_t; -typedef signed char s8_t; -typedef unsigned short u16_t; -typedef signed short s16_t; -typedef unsigned long u32_t; -typedef signed long s32_t; -typedef u32_t mem_ptr_t; -typedef int sys_prot_t; - -/* ------------------------ Prototypes ------------------------------------ */ - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/arch/cpu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/arch/cpu.h deleted file mode 100644 index 12b4f212..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/arch/cpu.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __CPU_H__ -#define __CPU_H__ - -/* ------------------------ Defines --------------------------------------- */ -#define BYTE_ORDER LITTLE_ENDIAN - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/arch/perf.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/arch/perf.h deleted file mode 100644 index f94640e9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/arch/perf.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __PERF_H__ -#define __PERF_H__ - -/* ------------------------ Defines --------------------------------------- */ -#define PERF_START /* null definition */ -#define PERF_STOP(x) /* null definition */ - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/arch/sys_arch.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/arch/sys_arch.h deleted file mode 100644 index 9e47406c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/arch/sys_arch.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __SYS_ARCH_H__ -#define __SYS_ARCH_H__ - -/* ------------------------ Project includes ------------------------------ */ -#include "FreeRTOS.h" -#include "task.h" -#include "queue.h" -#include "semphr.h" - -/* ------------------------ Defines --------------------------------------- */ -#define SYS_MBOX_NULL ( xQueueHandle )0 -#define SYS_THREAD_NULL NULL -#define SYS_SEM_NULL ( xSemaphoreHandle )0 -#define SIO_FD_NULL ( sio_fd_t )NULL - -/* ------------------------ Type definitions ------------------------------ */ - - -typedef xSemaphoreHandle sys_sem_t; -typedef xQueueHandle sys_mbox_t; -typedef void *sys_thread_t; - -/* ------------------------ Prototypes ------------------------------------ */ -sys_thread_t sys_arch_thread_new( void ( *thread ) ( void *arg ), void *arg, - int prio, size_t ssize ); -sys_thread_t sys_arch_thread_current( void ); -void sys_arch_thread_remove( sys_thread_t hdl ); -void sys_assert( const char *const msg ); -void sys_debug( const char *const fmt, ... ); - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/netif/serial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/netif/serial.c deleted file mode 100644 index 84281693..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/netif/serial.c +++ /dev/null @@ -1,627 +0,0 @@ -/* - * FreeModbus Libary: STR71/lwIP Port serial driver. - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - - -/* ----------------------- Platform includes --------------------------------*/ -#include "uart.h" -#include "eic.h" -#include "gpio.h" - -/* ----------------------- lwIP includes ------------------------------------*/ -#include "lwip/opt.h" -#include "lwip/sys.h" -#include "lwip/sio.h" -#include "lwip/err.h" - -/* ----------------------- FreeRTOS includes --------------------------------*/ -#include "task.h" -#include "semphr.h" - -/* ----------------------- Project includes ---------------------------------*/ -#include "serial.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define UART0_DEV ( UART0 ) -#define UART0_RX_PORT ( GPIO0 ) -#define UART0_RX_PIN ( 8 ) -#define UART0_TX_PORT ( GPIO0 ) -#define UART0_TX_PIN ( 9 ) -#define UART0_IRQ_CH ( UART0_IRQChannel ) -#define UART0_IRQ_PRIORITY ( 1 ) - -#define UART1_DEV ( UART1 ) -#define UART1_RX_PORT ( GPIO0 ) -#define UART1_RX_PIN ( 10 ) -#define UART1_TX_PORT ( GPIO0 ) -#define UART1_TX_PIN ( 11 ) -#define UART1_IRQ_CH ( UART1_IRQChannel ) -#define UART1_IRQ_PRIORITY ( 1 ) - -#define UART_DEVICES_MAX ( 2 ) - -#define DEFAULT_BAUDRATE ( 38400 ) -#define DEFAULT_DATABITS ( 8 ) -#define DEFAULT_STOPBITS ( 1 ) -#define DEFAULT_PARITY ( SIO_PAR_NONE ) - -#define DEFAULT_TX_BUFSIZE ( 64 ) -#define DEFAULT_RX_BUFSIZE ( 64 ) - -#define DEFAULT_READTIMEOUT_MS ( 10 ) - -#define SIO_RESET_STATE( dev ) do { \ - ( dev )->ready = 0; \ - ( dev )->abort = 0; \ - ( dev )->UARTx = NULL; \ - ( dev )->rx_buf_rdpos = ( dev )->rx_buf_wrpos = 0; \ - ( dev )->rx_sem = SYS_SEM_NULL; \ - ( dev )->tx_buf_rdpos = ( dev )->tx_buf_wrpos = 0; \ - ( dev )->tx_sem = SYS_SEM_NULL; \ - } while( 0 ) - -#define MS_TO_TICKS( ms ) \ - ( portTickType )( ( portTickType ) ( ms ) / portTICK_RATE_MS ) - -/* ----------------------- Type definitions ---------------------------------*/ -typedef struct -{ - u8_t ready; - u8_t abort; - - u8_t rx_buf[DEFAULT_RX_BUFSIZE]; - u8_t rx_buf_rdpos; - u8_t rx_buf_wrpos; - u8_t rx_buf_cnt; - xSemaphoreHandle rx_sem; - - u8_t tx_buf[DEFAULT_TX_BUFSIZE]; - u8_t tx_buf_rdpos; - u8_t tx_buf_wrpos; - u8_t tx_buf_cnt; - xSemaphoreHandle tx_sem; - UART_TypeDef *UARTx; -} serdev_t; - -/* ----------------------- Prototypes ---------------------------------------*/ -void sio_uart0_irq( void ) __attribute__ ( ( naked ) ); -void sio_uart1_irq( void ) __attribute__ ( ( naked ) ); - -/* ----------------------- Static functions ---------------------------------*/ - -static err_t sio_open_low_level( u8_t devnr, serdev_t * dev ); -static err_t sio_close_low_level( u8_t devnr, serdev_t * dev ); - -/* ----------------------- Static variables ---------------------------------*/ -static u8_t initialized = FALSE; -static volatile serdev_t devices[UART_DEVICES_MAX]; - -/* ----------------------- Start implementation -----------------------------*/ - -err_t -sio_open_low_level( u8_t devnr, serdev_t * dev ) -{ - err_t error = ERR_OK; - - if( devnr == 0 ) - { - /* Return value. */ - dev->UARTx = UART0; - - /* Reset the UART. */ - UART_Init( dev->UARTx ); - - /* Configure the GPIO pints for the UART device. */ - GPIO_Config( UART0_TX_PORT, 1 << UART0_TX_PIN, GPIO_AF_PP ); - GPIO_Config( UART0_RX_PORT, 1 << UART0_RX_PIN, GPIO_IN_TRI_CMOS ); - - /* Configure the IEC for the UART interrupts. */ - EIC_IRQChannelPriorityConfig( UART0_IRQ_CH, UART0_IRQ_PRIORITY ); - EIC_IRQChannelConfig( UART0_IRQ_CH, ENABLE ); - } - else if( devnr == 1 ) - { - /* Return value. */ - dev->UARTx = UART1; - - /* Reset the UART. */ - UART_Init( dev->UARTx ); - - /* Configure the GPIO pints for the UART device. */ - GPIO_Config( UART1_TX_PORT, 1 << UART1_TX_PIN, GPIO_AF_PP ); - GPIO_Config( UART1_RX_PORT, 1 << UART1_RX_PIN, GPIO_IN_TRI_TTL ); - - /* Configure the EIC for the UART interrupts. */ - EIC_IRQChannelPriorityConfig( UART1_IRQ_CH, UART1_IRQ_PRIORITY ); - EIC_IRQChannelConfig( UART1_IRQ_CH, ENABLE ); - } - else - { - error = ERR_IF; - } - return error; -} - -err_t -sio_close_low_level( u8_t devnr, serdev_t * dev ) -{ - err_t error = ERR_OK; - - if( devnr == 0 ) - { - UART_Init( dev->UARTx ); - - /* Disable the GPIO pints for the UART device. */ - GPIO_Config( UART0_TX_PORT, 1 << UART1_TX_PIN, GPIO_IN_TRI_TTL ); - GPIO_Config( UART0_RX_PORT, 1 << UART1_RX_PIN, GPIO_IN_TRI_TTL ); - - /* Disable the UART interrupts in the EIC. */ - EIC_IRQChannelConfig( UART0_IRQ_CH, DISABLE ); - } - else if( devnr == 1 ) - { - UART_Init( dev->UARTx ); - - /* Disable the GPIO pints for the UART device. */ - GPIO_Config( UART1_TX_PORT, 1 << UART1_TX_PIN, GPIO_IN_TRI_TTL ); - GPIO_Config( UART1_RX_PORT, 1 << UART1_RX_PIN, GPIO_IN_TRI_TTL ); - - /* Disable the UART interrupts in the EIC. */ - EIC_IRQChannelConfig( UART1_IRQ_CH, DISABLE ); - } - else - { - error = ERR_IF; - } - return error; -} - -err_t -sio_close( serdev_t * dev ) -{ - int i; - err_t error = ERR_VAL; - - for( i = 0; i < UART_DEVICES_MAX; i++ ) - { - if( &devices[i] == dev ) - { - break; - } - } - if( i < UART_DEVICES_MAX ) - { - vPortEnterCritical( ); - error = sio_close_low_level( i, dev ); - vPortExitCritical( ); - - if( dev->tx_sem != ( xSemaphoreHandle ) 0 ) - { - vQueueDelete( dev->tx_sem ); - } - if( dev->rx_sem != ( xSemaphoreHandle ) 0 ) - { - vQueueDelete( dev->tx_sem ); - } - SIO_RESET_STATE( dev ); - } - - return error; -} - -sio_fd_t -sio_open_new( u8_t devnr, u32_t baudrate, u8_t databits, sio_stop_t stopbits, sio_parity_t parity ) -{ - int i; - err_t error = ERR_OK; - serdev_t *dev; - UARTParity_TypeDef eUARTParity = UART_NO_PARITY; - UARTMode_TypeDef eUARTMode = UARTM_8D; - UARTStopBits_TypeDef eUARTStopBits; - - if( !initialized ) - { - for( i = 0; i < UART_DEVICES_MAX; i++ ) - { - SIO_RESET_STATE( &devices[i] ); - } - initialized = 1; - } - - /* Check if devicename is valid and not in use. */ - if( ( devnr < UART_DEVICES_MAX ) && ( devices[devnr].ready == 0 ) ) - { - dev = ( serdev_t * ) & devices[devnr]; - - switch ( parity ) - { - case SIO_PAR_EVEN: - eUARTParity = UART_EVEN_PARITY; - break; - case SIO_PAR_ODD: - eUARTParity = UART_ODD_PARITY; - break; - case SIO_PAR_NONE: - eUARTParity = UART_NO_PARITY; - break; - default: - error = ERR_VAL; - } - - switch ( databits ) - { - case 7: - if( parity != SIO_PAR_NONE ) - { - eUARTMode = UARTM_7D_P; - } - break; - case 8: - eUARTMode = parity == SIO_PAR_NONE ? UARTM_8D : UARTM_8D_P; - break; - default: - error = ERR_VAL; - } - - switch ( stopbits ) - { - case SIO_STOP_0_5: - eUARTStopBits = UART_0_5_StopBits; - break; - case SIO_STOP_1: - eUARTStopBits = UART_1_StopBits; - break; - case SIO_STOP_1_5: - eUARTStopBits = UART_1_5_StopBits; - break; - case SIO_STOP_2: - eUARTStopBits = UART_2_StopBits; - break; - default: - error = ERR_VAL; - } - - if( error == ERR_OK ) - { - SIO_RESET_STATE( dev ); - - vSemaphoreCreateBinary( dev->rx_sem ); - vSemaphoreCreateBinary( dev->tx_sem ); - - vPortEnterCritical( ); - if( ( error = sio_open_low_level( devnr, dev ) ) != ERR_OK ) - { - /* Hardware interface does not exist. */ - } - else if( dev->tx_sem == ( xSemaphoreHandle ) 0 ) - { - error = ERR_MEM; - } - else if( dev->rx_sem == ( xSemaphoreHandle ) 0 ) - { - error = ERR_MEM; - } - else - { - /* UART parameter correct and hardware device available. */ - UART_OnOffConfig( dev->UARTx, ENABLE ); - UART_FifoConfig( dev->UARTx, ENABLE ); - UART_FifoReset( dev->UARTx, UART_RxFIFO ); - UART_FifoReset( dev->UARTx, UART_TxFIFO ); - UART_LoopBackConfig( dev->UARTx, DISABLE ); - UART_Config( dev->UARTx, baudrate, eUARTParity, eUARTStopBits, eUARTMode ); - UART_TimeOutPeriodConfig( dev->UARTx, 0xFF ); - UART_ItConfig( dev->UARTx, UART_RxBufFull, ENABLE ); - UART_RxConfig( dev->UARTx, ENABLE ); - - /* Device is now ready for use. */ - dev->ready = 1; - } - - if( error != ERR_OK ) - { - sio_close( dev ); - } - vPortExitCritical( ); - } - } - else - { - error = ERR_VAL; - } - return error == ERR_OK ? ( void * )dev : SIO_FD_NULL; -} - -sio_fd_t -sio_open( u8_t devnr ) -{ - return sio_open_new( devnr, DEFAULT_BAUDRATE, DEFAULT_DATABITS, - DEFAULT_STOPBITS, DEFAULT_PARITY ); -} - -void -sio_send_noisr( u8_t data, sio_fd_t fd ) -{ - serdev_t *dev = fd; - - if( dev->ready ) - { - UART_ByteSend( dev->UARTx, &data ); - } -} - -u32_t -sio_write_noisr( sio_fd_t fd, u8_t * buf, u32_t size ) -{ - u32_t left = size; - u8_t send; - serdev_t *dev = fd; - - if( dev->ready ) - { - left = size; - while( left > 0 ) - { - send = size % 256; - UART_DataSend( dev->UARTx, ( u8 * ) buf, ( u8 ) send ); - left -= send; - } - } - return size - left; -} - -void -sio_send( u8_t data, sio_fd_t fd ) -{ - while( sio_write( fd, &data, 1 ) != 1 ); -} - -u8_t -sio_recv( sio_fd_t fd ) -{ - u8_t data; - serdev_t *dev = fd; - - if( dev->ready ) - { - while( sio_read( fd, &data, 1 ) != 1 ); - } - else - { - LWIP_ASSERT( "sio_recv: dev->ready != 0 ", dev->ready != 0 ); - data = '\0'; - } - return data; -} - -u32_t -sio_read( sio_fd_t fd, u8_t * buf, u32_t size ) -{ - u32_t ch_left = size; - u32_t ch_received = 0; - volatile serdev_t *dev = fd; - - if( dev->ready ) - { - dev->abort = 0; - while( ch_left && !dev->abort ) - { - vPortEnterCritical( ); - while( ( dev->rx_buf_cnt > 0 ) && ( ch_left > 0 ) ) - { - /* Fetch character from the ring buffer. */ - *buf++ = dev->rx_buf[dev->rx_buf_rdpos]; - dev->rx_buf_rdpos = ( dev->rx_buf_rdpos + 1 ) % DEFAULT_RX_BUFSIZE; - dev->rx_buf_cnt--; - /* Count character received and left for read. */ - ch_left--; - ch_received++; - } - vPortExitCritical( ); - /* If we want more data block on the semaphore and wait until - * something happens. - */ - if( ch_left ) - { - if( xSemaphoreTake( dev->rx_sem, MS_TO_TICKS( DEFAULT_READTIMEOUT_MS ) ) == - pdFALSE ) - { - /* A timeout. Abort the read and return the characters - * received so far. - */ - dev->abort = 1; - } - } - } - } - return ch_received; -} - -u32_t -sio_write( sio_fd_t fd, u8_t * buf, u32_t size ) -{ - u32_t ch_left; - - volatile serdev_t *dev = fd; - - if( dev->ready ) - { - ch_left = size; - while( ch_left > 0 ) - { - vPortEnterCritical( ); - while( ( dev->tx_buf_cnt < DEFAULT_TX_BUFSIZE ) && ( ch_left > 0 ) ) - { - dev->tx_buf[dev->tx_buf_wrpos] = *buf++; - dev->tx_buf_wrpos = ( dev->tx_buf_wrpos + 1 ) % DEFAULT_TX_BUFSIZE; - dev->tx_buf_cnt++; - ch_left--; - } - /* Enable transmit FIFO empty interrupts and block. */ - UART_ItConfig( dev->UARTx, UART_TxHalfEmpty, ENABLE ); - vPortExitCritical( ); - - /* Not all characters sent within one write. Block on a semaphore - * which is triggered when the buffer is empty again. - */ - if( ch_left != 0 ) - { - while( xSemaphoreTake( dev->tx_sem, portMAX_DELAY ) != pdTRUE ); - } - } - } - return size; -} - -void -sio_read_abort( sio_fd_t fd ) -{ - volatile serdev_t *dev = fd; - - dev->abort = 1; -} - -void -sio_serial_isr( UART_TypeDef * UARTx, u8_t * need_ctx_switch ) -{ - int i; - u16 status; - volatile serdev_t *dev = SIO_FD_NULL; - - portBASE_TYPE rx_woken = pdFALSE; - portBASE_TYPE tx_woken = pdFALSE; - - for( i = 0; i < UART_DEVICES_MAX; i++ ) - { - if( devices[i].ready && ( devices[i].UARTx == UARTx ) ) - { - dev = &devices[i]; - break; - } - } - if( dev != SIO_FD_NULL ) - { - status = UART_FlagStatus( dev->UARTx ); - - /* If there are characters in the UART fifo place them into the - * ring buffer. In case the buffer is filled half or the requested - * number of bytes has been read wakeup the receiver. - */ - if( status & UART_RxBufFull ) - { - do - { - /* Store the character in the ring buffer and advance write - * position. */ - dev->rx_buf[dev->rx_buf_wrpos] = dev->UARTx->RxBUFR; - dev->rx_buf_wrpos = ( dev->rx_buf_wrpos + 1 ) % DEFAULT_RX_BUFSIZE; - - /* Increment the receiver buffer counter. Check for a buffer - * overrun. In that case we have overwritten a old character. - * Therefore we have to advance the read position. Note that - * in this error case we must not increment the read counter - * because an old character was lost. - */ - if( dev->rx_buf_cnt >= DEFAULT_RX_BUFSIZE ) - { - /* LWIP_ASSERT( "sio_serial_isr: receiver buffer overflow", 0 ); */ - dev->rx_buf_rdpos = ( dev->rx_buf_rdpos + 1 ) % DEFAULT_RX_BUFSIZE; - } - else - { - dev->rx_buf_cnt++; - } - - /* Get the new status from the UART. */ - status = UART_FlagStatus( dev->UARTx ); - } - while( status & UART_RxBufFull ); - - /* Wakeup receiver if buffer is starting to fill. */ - if( dev->rx_buf_cnt > ( DEFAULT_RX_BUFSIZE / 2 ) ) - { - rx_woken = xSemaphoreGiveFromISR( dev->rx_sem, rx_woken ); - } - } - - /* Check if we must send characters. */ - if( ( dev->tx_buf_cnt > 0 ) && ( status & UART_TxHalfEmpty ) ) - { - do - { - /* Fetch character from the ring buffer and place them into - * the FIFO. */ - dev->UARTx->TxBUFR = dev->tx_buf[dev->tx_buf_rdpos]; - dev->tx_buf_rdpos = ( dev->tx_buf_rdpos + 1 ) % DEFAULT_TX_BUFSIZE; - dev->tx_buf_cnt--; - - /* Get the new status from the UART. */ - status = UART_FlagStatus( dev->UARTx ); - } - while( ( dev->tx_buf_cnt > 0 ) && ( status & UART_TxHalfEmpty ) ); - - if( dev->tx_buf_cnt == 0 ) - { - tx_woken = xSemaphoreGiveFromISR( dev->tx_sem, tx_woken ); - UART_ItConfig( dev->UARTx, UART_TxHalfEmpty, DISABLE ); - } - } - - if( tx_woken || rx_woken ) - { - *need_ctx_switch = 1; - } - } -} - - -void -sio_uart0_irq( void ) -{ - /* Save context to stack. */ - portENTER_SWITCHING_ISR( ); - - static u8_t need_ctx_switch; - - sio_serial_isr( UART0, &need_ctx_switch ); - - /* End the interrupt in the EIC. */ - EIC->IPR |= 1 << EIC_CurrentIRQChannelValue( ); - - /* End the ISR. */ - portEXIT_SWITCHING_ISR( need_ctx_switch ? pdTRUE : pdFALSE ); -} - -void -sio_uart1_irq( void ) -{ - /* Save context to stack. */ - portENTER_SWITCHING_ISR( ); - - static u8_t need_ctx_switch; - - sio_serial_isr( UART1, &need_ctx_switch ); - - /* End the interrupt in the EIC. */ - EIC->IPR |= 1 << EIC_CurrentIRQChannelValue( ); - - /* End the ISR. */ - portEXIT_SWITCHING_ISR( need_ctx_switch ? pdTRUE : pdFALSE ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/netif/serial.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/netif/serial.h deleted file mode 100644 index 1ddba1f4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/netif/serial.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * FreeModbus Libary: STR71/lwIP Port serial driver. - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _SERIAL_H -#define _SERIAL_H - -/* ------------------------ Platform includes ----------------------------- */ - -#include "uart.h" - -/* ------------------------ Defines --------------------------------------- */ - -/* ------------------------ Type definitions ----------------------------- */ - -typedef enum -{ - SIO_PAR_NONE, - SIO_PAR_ODD, - SIO_PAR_EVEN -} sio_parity_t; - -typedef enum -{ - SIO_STOP_0_5, - SIO_STOP_1, - SIO_STOP_1_5, - SIO_STOP_2 -} sio_stop_t; - -/* ------------------------ Prototypes ------------------------------------ */ -sio_fd_t sio_open_new( u8_t devnr, u32_t baudrate, u8_t databits, - sio_stop_t stopbits, sio_parity_t parity ); -u32_t sio_write_noisr( sio_fd_t fd, u8_t * buf, u32_t size ); -void sio_send_noisr( u8_t data, sio_fd_t fd ); -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/sys_arch.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/sys_arch.c deleted file mode 100644 index e4d104ae..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/contrib/port/FreeRTOS/STR71X/sys_arch.c +++ /dev/null @@ -1,585 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * Modifications Copyright (c) 2006 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * Modifcations: Christian Walter - * - * $Id$ - */ - -/* ------------------------ System includes ------------------------------- */ -#include -#include -#include -#include - -/* ------------------------ FreeRTOS includes ----------------------------- */ -#include "FreeRTOS.h" -#include "task.h" -#include "semphr.h" - -/* ------------------------ lwIP includes --------------------------------- */ -#include "lwip/debug.h" -#include "lwip/def.h" -#include "lwip/sys.h" -#include "lwip/mem.h" -#include "lwip/sio.h" -#include "lwip/stats.h" - -/* ------------------------ Project includes ------------------------------ */ -#include "netif/serial.h" - -/* ------------------------ Defines --------------------------------------- */ -/* This is the number of threads that can be started with sys_thead_new() */ -#define SYS_MBOX_SIZE ( 16 ) -#define MS_TO_TICKS( ms ) \ - ( portTickType )( ( portTickType ) ( ms ) / portTICK_RATE_MS ) -#define TICKS_TO_MS( ticks ) \ - ( unsigned portLONG )( ( portTickType ) ( ticks ) * portTICK_RATE_MS ) -#define THREAD_STACK_SIZE ( 512 ) -#define THREAD_NAME "lwIP" - -#define THREAD_INIT( tcb ) \ - do { \ - tcb->next = NULL; \ - tcb->pid = ( xTaskHandle )0; \ - tcb->timeouts.next = NULL; \ - } while( 0 ) - -/* ------------------------ Type definitions ------------------------------ */ -typedef struct sys_tcb -{ - struct sys_tcb *next; - struct sys_timeouts timeouts; - xTaskHandle pid; -} sys_tcb_t; - -/* ------------------------ Prototypes ------------------------------------ */ -int putchar( int c ); - -/* ------------------------ Static functions ------------------------------ */ -sys_tcb_t *sys_thread_current( void ); - -/* ------------------------ Static variables ------------------------------ */ -static sys_tcb_t *tasks = NULL; - -/* ------------------------ Start implementation -------------------------- */ -void -sys_init( void ) -{ - LWIP_ASSERT( "sys_init: not called first", tasks == NULL ); - tasks = NULL; -} - -/* - * This optional function does a "fast" critical region protection and returns - * the previous protection level. This function is only called during very short - * critical regions. An embedded system which supports ISR-based drivers might - * want to implement this function by disabling interrupts. Task-based systems - * might want to implement this by using a mutex or disabling tasking. This - * function should support recursive calls from the same task or interrupt. In - * other words, sys_arch_protect() could be called while already protected. In - * that case the return value indicates that it is already protected. - * - * sys_arch_protect() is only required if your port is supporting an operating - * system. - */ -sys_prot_t -sys_arch_protect( void ) -{ - vPortEnterCritical( ); - return 1; -} - -/* - * This optional function does a "fast" set of critical region protection to the - * value specified by pval. See the documentation for sys_arch_protect() for - * more information. This function is only required if your port is supporting - * an operating system. - */ -void -sys_arch_unprotect( sys_prot_t pval ) -{ - ( void )pval; - vPortExitCritical( ); -} - -/* - * Prints an assertion messages and aborts execution. - */ -void -sys_assert( const char *msg ) -{ - extern sio_fd_t stdio_fd; - - ( void )sio_write_noisr( stdio_fd, ( u8_t * ) msg, ( u32_t ) strlen( msg ) ); - ( void )sio_write_noisr( stdio_fd, "\n\r", 2 ); - vPortEnterCritical( ); - for( ;; ); -} - -void -sys_debug( const char *const fmt, ... ) -{ - va_list ap; - - va_start( ap, fmt ); - ( void )vprintf( fmt, ap ); - ( void )putchar( '\r' ); - va_end( ap ); -} - -void -ppp_trace( int level, const char *fmt, ... ) -{ - va_list ap; - - va_start( ap, fmt ); - ( void )vprintf( fmt, ap ); - ( void )putchar( '\r' ); - va_end( ap ); -} - -int -putchar( int c ) -{ - extern sio_fd_t stdio_fd; - - sio_send_noisr( ( u8_t ) c, stdio_fd ); - return c; -} - -/* ------------------------ Start implementation ( Threads ) -------------- */ - -sys_thread_t -sys_thread_new( void ( *thread ) ( void *arg ), void *arg, int prio ) -{ - return sys_arch_thread_new( thread, arg, prio, THREAD_STACK_SIZE ); -} - -/* - * Starts a new thread with priority "prio" that will begin its execution in the - * function "thread()". The "arg" argument will be passed as an argument to the - * thread() function. The argument "ssize" is the requested stack size for the - * new thread. The id of the new thread is returned. Both the id and the - * priority are system dependent. - */ -sys_thread_t -sys_arch_thread_new( void ( *thread ) ( void *arg ), void *arg, int prio, size_t ssize ) -{ - sys_thread_t thread_hdl = SYS_THREAD_NULL; - int i; - sys_tcb_t *p; - char thread_name[ configMAX_TASK_NAME_LEN ]; - - /* We disable the FreeRTOS scheduler because it might be the case that the new - * tasks gets scheduled inside the xTaskCreate function. To prevent this we - * disable the scheduling. Note that this can happen although we have interrupts - * disabled because xTaskCreate contains a call to taskYIELD( ). - */ - vPortEnterCritical( ); - - p = tasks; - i = 0; - /* We are called the first time. Initialize it. */ - if( p == NULL ) - { - p = pvPortMalloc( sizeof( sys_tcb_t ) ); - if( p != NULL ) - { - tasks = p; - } - } - else - { - /* First task already counter. */ - i++; - /* Cycle to the end of the list. */ - while( p->next != NULL ) - { - i++; - p = p->next; - } - p->next = pvPortMalloc( sizeof( sys_tcb_t ) ); - p = p->next; - } - - if( p != NULL ) - { - /* Memory allocated. Initialize the data structure. */ - THREAD_INIT( p ); - ( void )snprintf( thread_name, configMAX_TASK_NAME_LEN, "lwIP%d", i ); - - /* Now q points to a free element in the list. */ - if( xTaskCreate( thread, thread_name, ssize, arg, prio, &p->pid ) == pdPASS ) - { - thread_hdl = p; - } - else - { - vPortFree( p ); - } - } - - vPortExitCritical( ); - return thread_hdl; -} - -void -sys_arch_thread_remove( sys_thread_t hdl ) -{ - sys_tcb_t *current = tasks, *prev; - sys_tcb_t *toremove = hdl; - xTaskHandle pid = ( xTaskHandle ) 0; - - LWIP_ASSERT( "sys_arch_thread_remove: assertion hdl != NULL failed!", hdl != NULL ); - - /* If we have to remove the first task we must update the global "tasks" - * variable. */ - vPortEnterCritical( ); - if( hdl != NULL ) - { - prev = NULL; - while( ( current != NULL ) && ( current != toremove ) ) - { - prev = current; - current = current->next; - } - /* Found it. */ - if( current == toremove ) - { - /* Not the first entry in the list. */ - if( prev != NULL ) - { - prev->next = toremove->next; - } - else - { - tasks = toremove->next; - } - LWIP_ASSERT( "sys_arch_thread_remove: can't remove thread with timeouts!", - toremove->timeouts.next == NULL ); - pid = toremove->pid; - THREAD_INIT( toremove ); - vPortFree( toremove ); - } - } - /* We are done with accessing the shared datastructure. Release the - * resources. - */ - vPortExitCritical( ); - if( pid != ( xTaskHandle ) 0 ) - { - vTaskDelete( pid ); - /* not reached. */ - } -} - -/* - * Returns the thread control block for the currently active task. In case - * of an error the functions returns NULL. - */ -sys_thread_t -sys_arch_thread_current( void ) -{ - sys_tcb_t *p = tasks; - xTaskHandle pid = xTaskGetCurrentTaskHandle( ); - - vPortEnterCritical( ); - while( ( p != NULL ) && ( p->pid != pid ) ) - { - p = p->next; - } - vPortExitCritical( ); - return p; -} - -/* - * Returns a pointer to the per-thread sys_timeouts structure. In lwIP, - * each thread has a list of timeouts which is represented as a linked - * list of sys_timeout structures. The sys_timeouts structure holds a - * pointer to a linked list of timeouts. This function is called by - * the lwIP timeout scheduler and must not return a NULL value. - * - * In a single threaded sys_arch implementation, this function will - * simply return a pointer to a global sys_timeouts variable stored in - * the sys_arch module. - */ -struct sys_timeouts * -sys_arch_timeouts( void ) -{ - sys_tcb_t *ptask; - - ptask = sys_arch_thread_current( ); - LWIP_ASSERT( "sys_arch_timeouts: ptask != NULL", ptask != NULL ); - return ptask != NULL ? &( ptask->timeouts ) : NULL; -} - -/* ------------------------ Start implementation ( Semaphores ) ----------- */ - -/* Creates and returns a new semaphore. The "count" argument specifies - * the initial state of the semaphore. - */ -sys_sem_t -sys_sem_new( u8_t count ) -{ - xSemaphoreHandle xSemaphore; - - vSemaphoreCreateBinary( xSemaphore ); - if( xSemaphore != SYS_SEM_NULL ) - { - if( count == 0 ) - { - xSemaphoreTake( xSemaphore, 1 ); - } -#ifdef SYS_STATS - vPortEnterCritical( ); - lwip_stats.sys.sem.used++; - if( lwip_stats.sys.sem.used > lwip_stats.sys.sem.max ) - { - lwip_stats.sys.sem.max = lwip_stats.sys.sem.used; - } - vPortExitCritical( ); -#endif - } - else - { - LWIP_ASSERT( "sys_sem_new: xSemaphore == SYS_SEM_NULL", xSemaphore != SYS_SEM_NULL ); - } - - return xSemaphore; -} - -/* Deallocates a semaphore */ -void -sys_sem_free( sys_sem_t sem ) -{ - LWIP_ASSERT( "sys_sem_free: sem != SYS_SEM_NULL", sem != SYS_SEM_NULL ); - if( sem != SYS_SEM_NULL ) - { -#ifdef SYS_STATS - vPortEnterCritical( ); - lwip_stats.sys.sem.used--; - vPortExitCritical( ); -#endif - vQueueDelete( sem ); - } -} - -/* Signals a semaphore */ -void -sys_sem_signal( sys_sem_t sem ) -{ - LWIP_ASSERT( "sys_sem_signal: sem != SYS_SEM_NULL", sem != SYS_SEM_NULL ); - xSemaphoreGive( sem ); -} - -/* - * Blocks the thread while waiting for the semaphore to be - * signaled. If the "timeout" argument is non-zero, the thread should - * only be blocked for the specified time (measured in - * milliseconds). - * - * If the timeout argument is non-zero, the return value is the number of - * milliseconds spent waiting for the semaphore to be signaled. If the - * semaphore wasn't signaled within the specified time, the return value is - * SYS_ARCH_TIMEOUT. If the thread didn't have to wait for the semaphore - * (i.e., it was already signaled), the function may return zero. - * - * Notice that lwIP implements a function with a similar name, - * sys_sem_wait(), that uses the sys_arch_sem_wait() function. - */ -u32_t -sys_arch_sem_wait( sys_sem_t sem, u32_t timeout ) -{ - portBASE_TYPE xStatus; - portTickType xTicksStart, xTicksEnd, xTicksElapsed; - u32_t timespent; - - LWIP_ASSERT( "sys_arch_sem_wait: sem != SYS_SEM_NULL", sem != SYS_SEM_NULL ); - xTicksStart = xTaskGetTickCount( ); - if( timeout == 0 ) - { - do - { - xStatus = xSemaphoreTake( sem, MS_TO_TICKS( 100 ) ); - } - while( xStatus != pdTRUE ); - } - else - { - xStatus = xSemaphoreTake( sem, MS_TO_TICKS( timeout ) ); - } - - /* Semaphore was signaled. */ - if( xStatus == pdTRUE ) - { - xTicksEnd = xTaskGetTickCount( ); - xTicksElapsed = xTicksEnd - xTicksStart; - timespent = TICKS_TO_MS( xTicksElapsed ); - } - else - { - timespent = SYS_ARCH_TIMEOUT; - } - return timespent; -} - - -/* ------------------------ Start implementation ( Mailboxes ) ------------ */ - -/* Creates an empty mailbox. */ -sys_mbox_t -sys_mbox_new( void ) -{ - xQueueHandle mbox; - - mbox = xQueueCreate( SYS_MBOX_SIZE, sizeof( void * ) ); - if( mbox != SYS_MBOX_NULL ) - { -#ifdef SYS_STATS - vPortEnterCritical( ); - lwip_stats.sys.mbox.used++; - if( lwip_stats.sys.mbox.used > lwip_stats.sys.mbox.max ) - { - lwip_stats.sys.mbox.max = lwip_stats.sys.mbox.used; - } - vPortExitCritical( ); -#endif - } - return mbox; -} - -/* - Deallocates a mailbox. If there are messages still present in the - mailbox when the mailbox is deallocated, it is an indication of a - programming error in lwIP and the developer should be notified. -*/ -void -sys_mbox_free( sys_mbox_t mbox ) -{ - void *msg; - - LWIP_ASSERT( "sys_mbox_free: mbox != SYS_MBOX_NULL", mbox != SYS_MBOX_NULL ); - if( mbox != SYS_MBOX_NULL ) - { - while( uxQueueMessagesWaiting( mbox ) != 0 ) - { - if( sys_arch_mbox_fetch( mbox, &msg, 1 ) != SYS_ARCH_TIMEOUT ) - { - LWIP_ASSERT( "sys_mbox_free: memory leak (msg != NULL)", msg == NULL ); - } - } - vQueueDelete( mbox ); -#ifdef SYS_STATS - vPortEnterCritical( ); - lwip_stats.sys.mbox.used--; - vPortExitCritical( ); -#endif - } -} - -/* - * This function sends a message to a mailbox. It is unusual in that no error - * return is made. This is because the caller is responsible for ensuring that - * the mailbox queue will not fail. The caller does this by limiting the number - * of msg structures which exist for a given mailbox. - */ -void -sys_mbox_post( sys_mbox_t mbox, void *data ) -{ - portBASE_TYPE xQueueSent; - - /* Queue must not be full - Otherwise it is an error. */ - xQueueSent = xQueueSend( mbox, &data, 0 ); - LWIP_ASSERT( "sys_mbox_post: xQueueSent == pdPASS", xQueueSent == pdPASS ); -} - -/* - * Blocks the thread until a message arrives in the mailbox, but does - * not block the thread longer than "timeout" milliseconds (similar to - * the sys_arch_sem_wait() function). The "msg" argument is a result - * parameter that is set by the function (i.e., by doing "*msg = - * ptr"). The "msg" parameter maybe NULL to indicate that the message - * should be dropped. - * - * Note that a function with a similar name, sys_mbox_fetch(), is - * implemented by lwIP. - */ -u32_t -sys_arch_mbox_fetch( sys_mbox_t mbox, void **msg, u32_t timeout ) -{ - void *ret_msg; - portBASE_TYPE xStatus; - portTickType xTicksStart, xTicksEnd, xTicksElapsed; - u32_t timespent; - - LWIP_ASSERT( "sys_arch_mbox_fetch: mbox != SYS_MBOX_NULL", mbox != SYS_MBOX_NULL ); - xTicksStart = xTaskGetTickCount( ); - if( timeout == 0 ) - { - do - { - xStatus = xQueueReceive( mbox, &ret_msg, MS_TO_TICKS( 100 ) ); - } - while( xStatus != pdTRUE ); - } - else - { - xStatus = xQueueReceive( mbox, &ret_msg, MS_TO_TICKS( timeout ) ); - } - - if( xStatus == pdTRUE ) - { - if( msg ) - { - *msg = ret_msg; - } - xTicksEnd = xTaskGetTickCount( ); - xTicksElapsed = xTicksEnd - xTicksStart; - timespent = TICKS_TO_MS( xTicksElapsed ); - } - else - { - if( msg ) - { - *msg = NULL; - } - timespent = SYS_ARCH_TIMEOUT; - } - return timespent; -} - -u32_t -sys_jiffies( void ) -{ - portTickType xTicks = xTaskGetTickCount( ); - - return ( u32_t )TICKS_TO_MS( xTicks ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/doc/contrib.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/doc/contrib.txt deleted file mode 100644 index 7c99b9be..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/doc/contrib.txt +++ /dev/null @@ -1,62 +0,0 @@ -1 Introduction - -This document describes some guidelines for people participating -in lwIP development. - -2 How to contribute to lwIP - -Here is a short list of suggestions to anybody working with lwIP and -trying to contribute bug reports, fixes, enhancements, platform ports etc. -First of all as you may already know lwIP is a volunteer project so feedback -to fixes or questions might often come late. Hopefully the bug and patch tracking -features of Savannah help us not lose users' input. - -2.1 Source code style: - -1. do not use tabs. -2. indentation is two spaces per level (i.e. per tab). -3. end debug messages with a trailing newline (\n). -4. one space between keyword and opening bracket. -5. no space between function and opening bracket. -6. one space and no newline before opening curly braces of a block. -7. closing curly brace on a single line. -8. spaces surrounding assignment and comparisons. -9. use current source code style as further reference. - -2.2 Source code documentation style: - -1. JavaDoc compliant and Doxygen compatible. -2. Function documentation above functions in .c files, not .h files. - (This forces you to synchronize documentation and implementation.) -3. Use current documentation style as further reference. - -2.3 Bug reports and patches: - -1. Make sure you are reporting bugs or send patches against the latest - sources. (From the latest release and/or the current CVS sources.) -2. If you think you found a bug make sure it's not already filed in the - bugtracker at Savannah. -3. If you have a fix put the patch on Savannah. If it is a patch that affects - both core and arch specific stuff please separate them so that the core can - be applied separately while leaving the other patch 'open'. The prefered way - is to NOT touch archs you can't test and let maintainers take care of them. - This is a good way to see if they are used at all - the same goes for unix - netifs except tapif. -4. Do not file a bug and post a fix to it to the patch area. Either a bug report - or a patch will be enough. - If you correct an existing bug then attach the patch to the bug rather than creating a new entry in the patch area. -5. Trivial patches (compiler warning, indentation and spelling fixes or anything obvious which takes a line or two) - can go to the lwip-users list. This is still the fastest way of interaction and the list is not so crowded - as to allow for loss of fixes. Putting bugs on Savannah and subsequently closing them is too much an overhead - for reporting a compiler warning fix. -6. Patches should be specific to a single change or to related changes.Do not mix bugfixes with spelling and other - trivial fixes unless the bugfix is trivial too.Do not reorganize code and rename identifiers in the same patch you - change behaviour if not necessary.A patch is easier to read and understand if it's to the point and short than - if it's not to the point and long :) so the chances for it to be applied are greater. - -2.4 Platform porters: - -1. If you have ported lwIP to a platform (an OS, a uC/processor or a combination of these) and - you think it could benefit others[1] you might want discuss this on the mailing list. You - can also ask for CVS access to submit and maintain your port in the contrib CVS module. - \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/doc/rawapi.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/doc/rawapi.txt deleted file mode 100644 index f84e0d2e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/doc/rawapi.txt +++ /dev/null @@ -1,386 +0,0 @@ -Raw TCP/IP interface for lwIP - -Authors: Adam Dunkels, Leon Woestenberg, Christiaan Simons - -lwIP provides two Application Program's Interfaces (APIs) for programs -to use for communication with the TCP/IP code: -* low-level "core" / "callback" or "raw" API. -* higher-level "sequential" API. - -The sequential API provides a way for ordinary, sequential, programs -to use the lwIP stack. It is quite similar to the BSD socket API. The -model of execution is based on the blocking open-read-write-close -paradigm. Since the TCP/IP stack is event based by nature, the TCP/IP -code and the application program must reside in different execution -contexts (threads). - -** The remainder of this document discusses the "raw" API. ** - -The raw TCP/IP interface allows the application program to integrate -better with the TCP/IP code. Program execution is event based by -having callback functions being called from within the TCP/IP -code. The TCP/IP code and the application program both run in the same -thread. The sequential API has a much higher overhead and is not very -well suited for small systems since it forces a multithreaded paradigm -on the application. - -The raw TCP/IP interface is not only faster in terms of code execution -time but is also less memory intensive. The drawback is that program -development is somewhat harder and application programs written for -the raw TCP/IP interface are more difficult to understand. Still, this -is the preferred way of writing applications that should be small in -code size and memory usage. - -Both APIs can be used simultaneously by different application -programs. In fact, the sequential API is implemented as an application -program using the raw TCP/IP interface. - ---- Callbacks - -Program execution is driven by callbacks. Each callback is an ordinary -C function that is called from within the TCP/IP code. Every callback -function is passed the current TCP or UDP connection state as an -argument. Also, in order to be able to keep program specific state, -the callback functions are called with a program specified argument -that is independent of the TCP/IP state. - -The function for setting the application connection state is: - -- void tcp_arg(struct tcp_pcb *pcb, void *arg) - - Specifies the program specific state that should be passed to all - other callback functions. The "pcb" argument is the current TCP - connection control block, and the "arg" argument is the argument - that will be passed to the callbacks. - - ---- TCP connection setup - -The functions used for setting up connections is similar to that of -the sequential API and of the BSD socket API. A new TCP connection -identifier (i.e., a protocol control block - PCB) is created with the -tcp_new() function. This PCB can then be either set to listen for new -incoming connections or be explicitly connected to another host. - -- struct tcp_pcb *tcp_new(void) - - Creates a new connection identifier (PCB). If memory is not - available for creating the new pcb, NULL is returned. - -- err_t tcp_bind(struct tcp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port) - - Binds the pcb to a local IP address and port number. The IP address - can be specified as IP_ADDR_ANY in order to bind the connection to - all local IP addresses. - - If another connection is bound to the same port, the function will - return ERR_USE, otherwise ERR_OK is returned. - -- struct tcp_pcb *tcp_listen(struct tcp_pcb *pcb) - - Commands a pcb to start listening for incoming connections. When an - incoming connection is accepted, the function specified with the - tcp_accept() function will be called. The pcb will have to be bound - to a local port with the tcp_bind() function. - - The tcp_listen() function returns a new connection identifier, and - the one passed as an argument to the function will be - deallocated. The reason for this behavior is that less memory is - needed for a connection that is listening, so tcp_listen() will - reclaim the memory needed for the original connection and allocate a - new smaller memory block for the listening connection. - - tcp_listen() may return NULL if no memory was available for the - listening connection. If so, the memory associated with the pcb - passed as an argument to tcp_listen() will not be deallocated. - -- void tcp_accept(struct tcp_pcb *pcb, - err_t (* accept)(void *arg, struct tcp_pcb *newpcb, - err_t err)) - - Specified the callback function that should be called when a new - connection arrives on a listening connection. - -- err_t tcp_connect(struct tcp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port, err_t (* connected)(void *arg, - struct tcp_pcb *tpcb, - err_t err)); - - Sets up the pcb to connect to the remote host and sends the - initial SYN segment which opens the connection. - - The tcp_connect() function returns immediately; it does not wait for - the connection to be properly setup. Instead, it will call the - function specified as the fourth argument (the "connected" argument) - when the connection is established. If the connection could not be - properly established, either because the other host refused the - connection or because the other host didn't answer, the "connected" - function will be called with an the "err" argument set accordingly. - - The tcp_connect() function can return ERR_MEM if no memory is - available for enqueueing the SYN segment. If the SYN indeed was - enqueued successfully, the tcp_connect() function returns ERR_OK. - - ---- Sending TCP data - -TCP data is sent by enqueueing the data with a call to -tcp_write(). When the data is successfully transmitted to the remote -host, the application will be notified with a call to a specified -callback function. - -- err_t tcp_write(struct tcp_pcb *pcb, void *dataptr, u16_t len, - u8_t copy) - - Enqueues the data pointed to by the argument dataptr. The length of - the data is passed as the len parameter. The copy argument is either - 0 or 1 and indicates whether the new memory should be allocated for - the data to be copied into. If the argument is 0, no new memory - should be allocated and the data should only be referenced by - pointer. - - The tcp_write() function will fail and return ERR_MEM if the length - of the data exceeds the current send buffer size or if the length of - the queue of outgoing segment is larger than the upper limit defined - in lwipopts.h. The number of bytes available in the output queue can - be retrieved with the tcp_sndbuf() function. - - The proper way to use this function is to call the function with at - most tcp_sndbuf() bytes of data. If the function returns ERR_MEM, - the application should wait until some of the currently enqueued - data has been successfully received by the other host and try again. - -- void tcp_sent(struct tcp_pcb *pcb, - err_t (* sent)(void *arg, struct tcp_pcb *tpcb, - u16_t len)) - - Specifies the callback function that should be called when data has - successfully been received (i.e., acknowledged) by the remote - host. The len argument passed to the callback function gives the - amount bytes that was acknowledged by the last acknowledgment. - - ---- Receiving TCP data - -TCP data reception is callback based - an application specified -callback function is called when new data arrives. When the -application has taken the data, it has to call the tcp_recved() -function to indicate that TCP can advertise increase the receive -window. - -- void tcp_recv(struct tcp_pcb *pcb, - err_t (* recv)(void *arg, struct tcp_pcb *tpcb, - struct pbuf *p, err_t err)) - - Sets the callback function that will be called when new data - arrives. The callback function will be passed a NULL pbuf to - indicate that the remote host has closed the connection. - -- void tcp_recved(struct tcp_pcb *pcb, u16_t len) - - Must be called when the application has received the data. The len - argument indicates the length of the received data. - - ---- Application polling - -When a connection is idle (i.e., no data is either transmitted or -received), lwIP will repeatedly poll the application by calling a -specified callback function. This can be used either as a watchdog -timer for killing connections that have stayed idle for too long, or -as a method of waiting for memory to become available. For instance, -if a call to tcp_write() has failed because memory wasn't available, -the application may use the polling functionality to call tcp_write() -again when the connection has been idle for a while. - -- void tcp_poll(struct tcp_pcb *pcb, u8_t interval, - err_t (* poll)(void *arg, struct tcp_pcb *tpcb)) - - Specifies the polling interval and the callback function that should - be called to poll the application. The interval is specified in - number of TCP coarse grained timer shots, which typically occurs - twice a second. An interval of 10 means that the application would - be polled every 5 seconds. - - ---- Closing and aborting connections - -- err_t tcp_close(struct tcp_pcb *pcb) - - Closes the connection. The function may return ERR_MEM if no memory - was available for closing the connection. If so, the application - should wait and try again either by using the acknowledgment - callback or the polling functionality. If the close succeeds, the - function returns ERR_OK. - - The pcb is deallocated by the TCP code after a call to tcp_close(). - -- void tcp_abort(struct tcp_pcb *pcb) - - Aborts the connection by sending a RST (reset) segment to the remote - host. The pcb is deallocated. This function never fails. - -If a connection is aborted because of an error, the application is -alerted of this event by the err callback. Errors that might abort a -connection are when there is a shortage of memory. The callback -function to be called is set using the tcp_err() function. - -- void tcp_err(struct tcp_pcb *pcb, void (* err)(void *arg, - err_t err)) - - The error callback function does not get the pcb passed to it as a - parameter since the pcb may already have been deallocated. - - ---- Lower layer TCP interface - -TCP provides a simple interface to the lower layers of the -system. During system initialization, the function tcp_init() has -to be called before any other TCP function is called. When the system -is running, the two timer functions tcp_fasttmr() and tcp_slowtmr() -must be called with regular intervals. The tcp_fasttmr() should be -called every TCP_FAST_INTERVAL milliseconds (defined in tcp.h) and -tcp_slowtmr() should be called every TCP_SLOW_INTERVAL milliseconds. - - ---- UDP interface - -The UDP interface is similar to that of TCP, but due to the lower -level of complexity of UDP, the interface is significantly simpler. - -- struct udp_pcb *udp_new(void) - - Creates a new UDP pcb which can be used for UDP communication. The - pcb is not active until it has either been bound to a local address - or connected to a remote address. - -- void udp_remove(struct udp_pcb *pcb) - - Removes and deallocates the pcb. - -- err_t udp_bind(struct udp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port) - - Binds the pcb to a local address. The IP-address argument "ipaddr" - can be IP_ADDR_ANY to indicate that it should listen to any local IP - address. The function currently always return ERR_OK. - -- err_t udp_connect(struct udp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port) - - Sets the remote end of the pcb. This function does not generate any - network traffic, but only set the remote address of the pcb. - -- err_t udp_disconnect(struct udp_pcb *pcb) - - Remove the remote end of the pcb. This function does not generate - any network traffic, but only removes the remote address of the pcb. - -- err_t udp_send(struct udp_pcb *pcb, struct pbuf *p) - - Sends the pbuf p. The pbuf is not deallocated. - -- void udp_recv(struct udp_pcb *pcb, - void (* recv)(void *arg, struct udp_pcb *upcb, - struct pbuf *p, - struct ip_addr *addr, - u16_t port), - void *recv_arg) - - Specifies a callback function that should be called when a UDP - datagram is received. - - ---- System initalization - -A truly complete and generic sequence for initializing the lwip stack -cannot be given because it depends on the build configuration (lwipopts.h) -and additional initializations for your runtime environment (e.g. timers). - -We can give you some idea on how to proceed when using the raw API. -We assume a configuration using a single Ethernet netif and the -UDP and TCP transport layers, IPv4 and the DHCP client. - -Call these functions in the order of appearance: - -- stats_init() - - Clears the structure where runtime statistics are gathered. - -- sys_init() - - Not of much use since we set the NO_SYS 1 option in lwipopts.h, - to be called for easy configuration changes. - -- mem_init() - - Initializes the dynamic memory heap defined by MEM_SIZE. - -- memp_init() - - Initializes the memory pools defined by MEMP_NUM_x. - -- pbuf_init() - - Initializes the pbuf memory pool defined by PBUF_POOL_SIZE. - -- etharp_init() - - Initializes the ARP table and queue. - Note: you must call etharp_tmr at a 10 second regular interval - after this initialization. - -- ip_init() - - Doesn't do much, it should be called to handle future changes. - -- udp_init() - - Clears the UDP PCB list. - -- tcp_init() - - Clears the TCP PCB list and clears some internal TCP timers. - Note: you must call tcp_fasttmr() and tcp_slowtmr() at the - predefined regular intervals after this initialization. - -- netif_add(struct netif *netif, struct ip_addr *ipaddr, - struct ip_addr *netmask, struct ip_addr *gw, - void *state, err_t (* init)(struct netif *netif), - err_t (* input)(struct pbuf *p, struct netif *netif)) - - Adds your network interface to the netif_list. Allocate a struct - netif and pass a pointer to this structure as the first argument. - Give pointers to cleared ip_addr structures when using DHCP, - or fill them with sane numbers otherwise. The state pointer may be NULL. - - The init function pointer must point to a initialization function for - your ethernet netif interface. The following code illustrates it's use. - - err_t netif_if_init(struct netif *netif) - { - u8_t i; - - for(i = 0; i < 6; i++) netif->hwaddr[i] = some_eth_addr[i]; - init_my_eth_device(); - return ERR_OK; - } - - The input function pointer must point to the lwip ip_input(). - -- netif_set_default(struct netif *netif) - - Registers the default network interface. - -- netif_set_up(struct netif *netif) - - When the netif is fully configured this function must be called. - -- dhcp_start(struct netif *netif) - - Creates a new DHCP client for this interface on the first call. - Note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at - the predefined regular intervals after starting the client. - - You can peek in the netif->dhcp struct for the actual DHCP status. diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/doc/savannah.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/doc/savannah.txt deleted file mode 100644 index 409905b1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/doc/savannah.txt +++ /dev/null @@ -1,135 +0,0 @@ -Daily Use Guide for using Savannah for lwIP - -Table of Contents: - -1 - Obtaining lwIP from the CVS repository -2 - Committers/developers CVS access using SSH (to be written) -3 - Merging from DEVEL branch to main trunk (stable branch) -4 - How to release lwIP - - - -1 Obtaining lwIP from the CVS repository ----------------------------------------- - -To perform an anonymous CVS checkout of the main trunk (this is where -bug fixes and incremental enhancements occur), do this: - -cvs -z3 -d:pserver:anonymous@cvs.sv.gnu.org:/sources/lwip checkout lwip - -Or, obtain a stable branch (updated with bug fixes only) as follows: -cvs -z3 -d:pserver:anonymous@cvs.sv.gnu.org:/sources/lwip checkout \ - -r STABLE-0_7 -d lwip-0.7 lwip - -Or, obtain a specific (fixed) release as follows: -cvs -z3 -d:pserver:anonymous@cvs.sv.gnu.org:/sources/lwip checkout \ - -r STABLE-0_7_0 -d lwip-0.7.0 lwip - -3 Committers/developers CVS access using SSH --------------------------------------------- - -The Savannah server uses SSH (Secure Shell) protocol 2 authentication and encryption. -As such, CVS commits to the server occur through a SSH tunnel for project members. -To create a SSH2 key pair in UNIX-like environments, do this: - -ssh-keygen -t dsa - -Under Windows, a recommended SSH client is "PuTTY", freely available with good -documentation and a graphic user interface. Use its key generator. - -Now paste the id_dsa.pub contents into your Savannah account public key list. Wait -a while so that Savannah can update its configuration (This can take minutes). - -Try to login using SSH: - -ssh -v your_login@cvs.sv.gnu.org - -If it tells you: - -Authenticating with public key "your_key_name"... -Server refused to allocate pty - -then you could login; Savannah refuses to give you a shell - which is OK, as we -are allowed to use SSH for CVS only. Now, you should be able to do this: - -export CVS_RSH=ssh -cvs -z3 -d:ext:your_login@cvs.sv.gnu.org:/sources/lwip co lwip - -after which you can edit your local files with bug fixes or new features and -commit them. Make sure you know what you are doing when using CVS to make -changes on the repository. If in doubt, ask on the lwip-members mailing list. - -(If SSH asks about authenticity of the host, you can check the key - fingerprint against http://savannah.nongnu.org/cvs/?group=lwip) - - -3 Merging from DEVEL branch to main trunk (stable) --------------------------------------------------- - -Merging is a delicate process in CVS and requires the -following disciplined steps in order to prevent conflicts -in the future. Conflicts can be hard to solve! - -Merging from branch A to branch B requires that the A branch -has a tag indicating the previous merger. This tag is called -'merged_from_A_to_B'. After merging, the tag is moved in the -A branch to remember this merger for future merge actions. - -IMPORTANT: AFTER COMMITTING A SUCCESFUL MERGE IN THE -REPOSITORY, THE TAG MUST BE SET ON THE SOURCE BRANCH OF THE -MERGE ACTION (REPLACING EXISTING TAGS WITH THE SAME NAME). - -Merge all changes in DEVEL since our last merge to main: - -In the working copy of the main trunk: -cvs update -P -jmerged_from_DEVEL_to_main -jDEVEL - -(This will apply the changes between 'merged_from_DEVEL_to_main' -and 'DEVEL' to your work set of files) - -We can now commit the merge result. -cvs commit -R -m "Merged from DEVEL to main." - -If this worked out OK, we now move the tag in the DEVEL branch -to this merge point, so we can use this point for future merges: - -cvs rtag -F -r DEVEL merged_from_DEVEL_to_main lwip - -4 How to release lwIP ---------------------- - -First, checkout a clean copy of the branch to be released. Tag this set with -tag name "STABLE-0_6_3". (I use release number 0.6.3 throughout this example). - -Login CVS using pserver authentication, then export a clean copy of the -tagged tree. Export is similar to a checkout, except that the CVS metadata -is not created locally. - -export CVS_RSH=ssh -cvs -z3 -d:pserver:anonymous@cvs.sv.gnu.org:/sources/lwip checkout \ - -r STABLE-0_6_3 -d lwip-0.6.3 lwip - -Archive this directory using tar, gzip'd, bzip2'd and zip'd. - -tar czvf lwip-0.6.3.tar.gz lwip-0.6.3 -tar cjvf lwip-0.6.3.tar.bz2 lwip-0.6.3 -zip -r lwip-0.6.3.zip lwip-0.6.3 - -Now, sign the archives with a detached GPG binary signature as follows: - -gpg -b lwip-0.6.3.tar.gz -gpg -b lwip-0.6.3.tar.bz2 -gpg -b lwip-0.6.3.zip - -Upload these files using anonymous FTP: -ncftp ftp://savannah.gnu.org/incoming/savannah/lwip - -ncftp>mput *0.6.3.* - -Additionally, you may post a news item on Savannah, like this: - -A new 0.6.3 release is now available here: -http://savannah.nongnu.org/files/?group=lwip&highlight=0.6.3 - -You will have to submit this via the user News interface, then approve -this via the Administrator News interface. \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/doc/sys_arch.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/doc/sys_arch.txt deleted file mode 100644 index 95d0add7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/doc/sys_arch.txt +++ /dev/null @@ -1,194 +0,0 @@ -sys_arch interface for lwIP 0.6++ - -Author: Adam Dunkels - -The operating system emulation layer provides a common interface -between the lwIP code and the underlying operating system kernel. The -general idea is that porting lwIP to new architectures requires only -small changes to a few header files and a new sys_arch -implementation. It is also possible to do a sys_arch implementation -that does not rely on any underlying operating system. - -The sys_arch provides semaphores and mailboxes to lwIP. For the full -lwIP functionality, multiple threads support can be implemented in the -sys_arch, but this is not required for the basic lwIP -functionality. Previous versions of lwIP required the sys_arch to -implement timer scheduling as well but as of lwIP 0.5 this is -implemented in a higher layer. - -In addition to the source file providing the functionality of sys_arch, -the OS emulation layer must provide several header files defining -macros used throughout lwip. The files required and the macros they -must define are listed below the sys_arch description. - -Semaphores can be either counting or binary - lwIP works with both -kinds. Mailboxes are used for message passing and can be implemented -either as a queue which allows multiple messages to be posted to a -mailbox, or as a rendez-vous point where only one message can be -posted at a time. lwIP works with both kinds, but the former type will -be more efficient. A message in a mailbox is just a pointer, nothing -more. - -Semaphores are represented by the type "sys_sem_t" which is typedef'd -in the sys_arch.h file. Mailboxes are equivalently represented by the -type "sys_mbox_t". lwIP does not place any restrictions on how -sys_sem_t or sys_mbox_t are represented internally. - -The following functions must be implemented by the sys_arch: - -- void sys_init(void) - - Is called to initialize the sys_arch layer. - -- sys_sem_t sys_sem_new(u8_t count) - - Creates and returns a new semaphore. The "count" argument specifies - the initial state of the semaphore. - -- void sys_sem_free(sys_sem_t sem) - - Deallocates a semaphore. - -- void sys_sem_signal(sys_sem_t sem) - - Signals a semaphore. - -- u32_t sys_arch_sem_wait(sys_sem_t sem, u32_t timeout) - - Blocks the thread while waiting for the semaphore to be - signaled. If the "timeout" argument is non-zero, the thread should - only be blocked for the specified time (measured in - milliseconds). - - If the timeout argument is non-zero, the return value is the number of - milliseconds spent waiting for the semaphore to be signaled. If the - semaphore wasn't signaled within the specified time, the return value is - SYS_ARCH_TIMEOUT. If the thread didn't have to wait for the semaphore - (i.e., it was already signaled), the function may return zero. - - Notice that lwIP implements a function with a similar name, - sys_sem_wait(), that uses the sys_arch_sem_wait() function. - -- sys_mbox_t sys_mbox_new(void) - - Creates an empty mailbox. - -- void sys_mbox_free(sys_mbox_t mbox) - - Deallocates a mailbox. If there are messages still present in the - mailbox when the mailbox is deallocated, it is an indication of a - programming error in lwIP and the developer should be notified. - -- void sys_mbox_post(sys_mbox_t mbox, void *msg) - - Posts the "msg" to the mailbox. - -- u32_t sys_arch_mbox_fetch(sys_mbox_t mbox, void **msg, u32_t timeout) - - Blocks the thread until a message arrives in the mailbox, but does - not block the thread longer than "timeout" milliseconds (similar to - the sys_arch_sem_wait() function). The "msg" argument is a result - parameter that is set by the function (i.e., by doing "*msg = - ptr"). The "msg" parameter maybe NULL to indicate that the message - should be dropped. - - The return values are the same as for the sys_arch_sem_wait() function: - Number of milliseconds spent waiting or SYS_ARCH_TIMEOUT if there was a - timeout. - - Note that a function with a similar name, sys_mbox_fetch(), is - implemented by lwIP. - -- struct sys_timeouts *sys_arch_timeouts(void) - - Returns a pointer to the per-thread sys_timeouts structure. In lwIP, - each thread has a list of timeouts which is repressented as a linked - list of sys_timeout structures. The sys_timeouts structure holds a - pointer to a linked list of timeouts. This function is called by - the lwIP timeout scheduler and must not return a NULL value. - - In a single threadd sys_arch implementation, this function will - simply return a pointer to a global sys_timeouts variable stored in - the sys_arch module. - -If threads are supported by the underlying operating system and if -such functionality is needed in lwIP, the following function will have -to be implemented as well: - -- sys_thread_t sys_thread_new(void (* thread)(void *arg), void *arg, int prio) - - Starts a new thread with priority "prio" that will begin its execution in the - function "thread()". The "arg" argument will be passed as an argument to the - thread() function. The id of the new thread is returned. Both the id and - the priority are system dependent. - -- sys_prot_t sys_arch_protect(void) - - This optional function does a "fast" critical region protection and returns - the previous protection level. This function is only called during very short - critical regions. An embedded system which supports ISR-based drivers might - want to implement this function by disabling interrupts. Task-based systems - might want to implement this by using a mutex or disabling tasking. This - function should support recursive calls from the same task or interrupt. In - other words, sys_arch_protect() could be called while already protected. In - that case the return value indicates that it is already protected. - - sys_arch_protect() is only required if your port is supporting an operating - system. - -- void sys_arch_unprotect(sys_prot_t pval) - - This optional function does a "fast" set of critical region protection to the - value specified by pval. See the documentation for sys_arch_protect() for - more information. This function is only required if your port is supporting - an operating system. - -------------------------------------------------------------------------------- -Additional files required for the "OS support" emulation layer: -------------------------------------------------------------------------------- - -cc.h - Architecture environment, some compiler specific, some - environment specific (probably should move env stuff - to sys_arch.h.) - - Typedefs for the types used by lwip - - u8_t, s8_t, u16_t, s16_t, u32_t, s32_t, mem_ptr_t - - Compiler hints for packing lwip's structures - - PACK_STRUCT_FIELD(x) - PACK_STRUCT_STRUCT - PACK_STRUCT_BEGIN - PACK_STRUCT_END - - Platform specific diagnostic output - - LWIP_PLATFORM_DIAG(x) - non-fatal, print a message. - LWIP_PLATFORM_ASSERT(x) - fatal, print message and abandon execution. - - "lightweight" synchronization mechanisms - - SYS_ARCH_DECL_PROTECT(x) - declare a protection state variable. - SYS_ARCH_PROTECT(x) - enter protection mode. - SYS_ARCH_UNPROTECT(x) - leave protection mode. - - If the compiler does not provide memset() this file must include a - definition of it, or include a file which defines it. - - This file must either include a system-local which defines - the standard *nix error codes, or it should #define LWIP_PROVIDE_ERRNO - to make lwip/arch.h define the codes which are used throughout. - - -perf.h - Architecture specific performance measurement. - Measurement calls made throughout lwip, these can be defined to nothing. - PERF_START - start measuring something. - PERF_STOP(x) - stop measuring something, and record the result. - -sys_arch.h - Tied to sys_arch.c - - Arch dependent types for the following objects: - sys_sem_t, sys_mbox_t, sys_thread_t, - And, optionally: - sys_prot_t - - Defines to set vars of sys_mbox_t and sys_sem_t to NULL. - SYS_MBOX_NULL NULL - SYS_SEM_NULL NULL diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/FILES b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/FILES deleted file mode 100644 index 2b657318..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/FILES +++ /dev/null @@ -1,13 +0,0 @@ -api/ - The code for the high-level wrapper API. Not needed if - you use the lowel-level call-back/raw API. - -core/ - The core of the TPC/IP stack; protocol implementations, - memory and buffer management, and the low-level raw API. - -include/ - lwIP include files. - -netif/ - Generic network interface device drivers are kept here, - as well as the ARP module. - -For more information on the various subdirectories, check the FILES -file in each directory. diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/api_lib.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/api_lib.c deleted file mode 100644 index 3d83d1ea..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/api_lib.c +++ /dev/null @@ -1,729 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -/* This is the part of the API that is linked with - the application */ - -#include "lwip/opt.h" -#include "lwip/api.h" -#include "lwip/api_msg.h" -#include "lwip/memp.h" - - -struct -netbuf *netbuf_new(void) -{ - struct netbuf *buf; - - buf = memp_malloc(MEMP_NETBUF); - if (buf != NULL) { - buf->p = NULL; - buf->ptr = NULL; - return buf; - } else { - return NULL; - } -} - -void -netbuf_delete(struct netbuf *buf) -{ - if (buf != NULL) { - if (buf->p != NULL) { - pbuf_free(buf->p); - buf->p = buf->ptr = NULL; - } - memp_free(MEMP_NETBUF, buf); - } -} - -void * -netbuf_alloc(struct netbuf *buf, u16_t size) -{ - /* Deallocate any previously allocated memory. */ - if (buf->p != NULL) { - pbuf_free(buf->p); - } - buf->p = pbuf_alloc(PBUF_TRANSPORT, size, PBUF_RAM); - if (buf->p == NULL) { - return NULL; - } - buf->ptr = buf->p; - return buf->p->payload; -} - -void -netbuf_free(struct netbuf *buf) -{ - if (buf->p != NULL) { - pbuf_free(buf->p); - } - buf->p = buf->ptr = NULL; -} - -void -netbuf_ref(struct netbuf *buf, void *dataptr, u16_t size) -{ - if (buf->p != NULL) { - pbuf_free(buf->p); - } - buf->p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_REF); - buf->p->payload = dataptr; - buf->p->len = buf->p->tot_len = size; - buf->ptr = buf->p; -} - -void -netbuf_chain(struct netbuf *head, struct netbuf *tail) -{ - pbuf_chain(head->p, tail->p); - head->ptr = head->p; - memp_free(MEMP_NETBUF, tail); -} - -u16_t -netbuf_len(struct netbuf *buf) -{ - return buf->p->tot_len; -} - -err_t -netbuf_data(struct netbuf *buf, void **dataptr, u16_t *len) -{ - if (buf->ptr == NULL) { - return ERR_BUF; - } - *dataptr = buf->ptr->payload; - *len = buf->ptr->len; - return ERR_OK; -} - -s8_t -netbuf_next(struct netbuf *buf) -{ - if (buf->ptr->next == NULL) { - return -1; - } - buf->ptr = buf->ptr->next; - if (buf->ptr->next == NULL) { - return 1; - } - return 0; -} - -void -netbuf_first(struct netbuf *buf) -{ - buf->ptr = buf->p; -} - -void -netbuf_copy_partial(struct netbuf *buf, void *dataptr, u16_t len, u16_t offset) -{ - struct pbuf *p; - u16_t i, left; - - left = 0; - - if(buf == NULL || dataptr == NULL) { - return; - } - - /* This implementation is bad. It should use bcopy - instead. */ - for(p = buf->p; left < len && p != NULL; p = p->next) { - if (offset != 0 && offset >= p->len) { - offset -= p->len; - } else { - for(i = offset; i < p->len; ++i) { - ((u8_t *)dataptr)[left] = ((u8_t *)p->payload)[i]; - if (++left >= len) { - return; - } - } - offset = 0; - } - } -} - -void -netbuf_copy(struct netbuf *buf, void *dataptr, u16_t len) -{ - netbuf_copy_partial(buf, dataptr, len, 0); -} - -struct ip_addr * -netbuf_fromaddr(struct netbuf *buf) -{ - return buf->fromaddr; -} - -u16_t -netbuf_fromport(struct netbuf *buf) -{ - return buf->fromport; -} - -struct -netconn *netconn_new_with_proto_and_callback(enum netconn_type t, u16_t proto, - void (*callback)(struct netconn *, enum netconn_evt, u16_t len)) -{ - struct netconn *conn; - struct api_msg *msg; - - conn = memp_malloc(MEMP_NETCONN); - if (conn == NULL) { - return NULL; - } - - conn->err = ERR_OK; - conn->type = t; - conn->pcb.tcp = NULL; - - if ((conn->mbox = sys_mbox_new()) == SYS_MBOX_NULL) { - memp_free(MEMP_NETCONN, conn); - return NULL; - } - conn->recvmbox = SYS_MBOX_NULL; - conn->acceptmbox = SYS_MBOX_NULL; - conn->sem = SYS_SEM_NULL; - conn->state = NETCONN_NONE; - conn->socket = 0; - conn->callback = callback; - conn->recv_avail = 0; - - if((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - memp_free(MEMP_NETCONN, conn); - return NULL; - } - - msg->type = API_MSG_NEWCONN; - msg->msg.msg.bc.port = proto; /* misusing the port field */ - msg->msg.conn = conn; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - - if ( conn->err != ERR_OK ) { - memp_free(MEMP_NETCONN, conn); - return NULL; - } - - return conn; -} - - -struct -netconn *netconn_new(enum netconn_type t) -{ - return netconn_new_with_proto_and_callback(t,0,NULL); -} - -struct -netconn *netconn_new_with_callback(enum netconn_type t, - void (*callback)(struct netconn *, enum netconn_evt, u16_t len)) -{ - return netconn_new_with_proto_and_callback(t,0,callback); -} - - -err_t -netconn_delete(struct netconn *conn) -{ - struct api_msg *msg; - void *mem; - - if (conn == NULL) { - return ERR_OK; - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return ERR_MEM; - } - - msg->type = API_MSG_DELCONN; - msg->msg.conn = conn; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - - /* Drain the recvmbox. */ - if (conn->recvmbox != SYS_MBOX_NULL) { - while (sys_arch_mbox_fetch(conn->recvmbox, &mem, 1) != SYS_ARCH_TIMEOUT) { - if (conn->type == NETCONN_TCP) { - if(mem != NULL) - pbuf_free((struct pbuf *)mem); - } else { - netbuf_delete((struct netbuf *)mem); - } - } - sys_mbox_free(conn->recvmbox); - conn->recvmbox = SYS_MBOX_NULL; - } - - - /* Drain the acceptmbox. */ - if (conn->acceptmbox != SYS_MBOX_NULL) { - while (sys_arch_mbox_fetch(conn->acceptmbox, &mem, 1) != SYS_ARCH_TIMEOUT) { - netconn_delete((struct netconn *)mem); - } - - sys_mbox_free(conn->acceptmbox); - conn->acceptmbox = SYS_MBOX_NULL; - } - - sys_mbox_free(conn->mbox); - conn->mbox = SYS_MBOX_NULL; - if (conn->sem != SYS_SEM_NULL) { - sys_sem_free(conn->sem); - } - /* conn->sem = SYS_SEM_NULL;*/ - memp_free(MEMP_NETCONN, conn); - return ERR_OK; -} - -enum netconn_type -netconn_type(struct netconn *conn) -{ - return conn->type; -} - -err_t -netconn_peer(struct netconn *conn, struct ip_addr *addr, - u16_t *port) -{ - switch (conn->type) { - case NETCONN_RAW: - /* return an error as connecting is only a helper for upper layers */ - return ERR_CONN; - case NETCONN_UDPLITE: - case NETCONN_UDPNOCHKSUM: - case NETCONN_UDP: - if (conn->pcb.udp == NULL || - ((conn->pcb.udp->flags & UDP_FLAGS_CONNECTED) == 0)) - return ERR_CONN; - *addr = (conn->pcb.udp->remote_ip); - *port = conn->pcb.udp->remote_port; - break; - case NETCONN_TCP: - if (conn->pcb.tcp == NULL) - return ERR_CONN; - *addr = (conn->pcb.tcp->remote_ip); - *port = conn->pcb.tcp->remote_port; - break; - } - return (conn->err = ERR_OK); -} - -err_t -netconn_addr(struct netconn *conn, struct ip_addr **addr, - u16_t *port) -{ - switch (conn->type) { - case NETCONN_RAW: - *addr = &(conn->pcb.raw->local_ip); - *port = conn->pcb.raw->protocol; - break; - case NETCONN_UDPLITE: - case NETCONN_UDPNOCHKSUM: - case NETCONN_UDP: - *addr = &(conn->pcb.udp->local_ip); - *port = conn->pcb.udp->local_port; - break; - case NETCONN_TCP: - *addr = &(conn->pcb.tcp->local_ip); - *port = conn->pcb.tcp->local_port; - break; - } - return (conn->err = ERR_OK); -} - -err_t -netconn_bind(struct netconn *conn, struct ip_addr *addr, - u16_t port) -{ - struct api_msg *msg; - - if (conn == NULL) { - return ERR_VAL; - } - - if (conn->type != NETCONN_TCP && - conn->recvmbox == SYS_MBOX_NULL) { - if ((conn->recvmbox = sys_mbox_new()) == SYS_MBOX_NULL) { - return ERR_MEM; - } - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return (conn->err = ERR_MEM); - } - msg->type = API_MSG_BIND; - msg->msg.conn = conn; - msg->msg.msg.bc.ipaddr = addr; - msg->msg.msg.bc.port = port; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - return conn->err; -} - - -err_t -netconn_connect(struct netconn *conn, struct ip_addr *addr, - u16_t port) -{ - struct api_msg *msg; - - if (conn == NULL) { - return ERR_VAL; - } - - - if (conn->recvmbox == SYS_MBOX_NULL) { - if ((conn->recvmbox = sys_mbox_new()) == SYS_MBOX_NULL) { - return ERR_MEM; - } - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return ERR_MEM; - } - msg->type = API_MSG_CONNECT; - msg->msg.conn = conn; - msg->msg.msg.bc.ipaddr = addr; - msg->msg.msg.bc.port = port; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - return conn->err; -} - -err_t -netconn_disconnect(struct netconn *conn) -{ - struct api_msg *msg; - - if (conn == NULL) { - return ERR_VAL; - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return ERR_MEM; - } - msg->type = API_MSG_DISCONNECT; - msg->msg.conn = conn; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - return conn->err; - -} - -err_t -netconn_listen(struct netconn *conn) -{ - struct api_msg *msg; - - if (conn == NULL) { - return ERR_VAL; - } - - if (conn->acceptmbox == SYS_MBOX_NULL) { - conn->acceptmbox = sys_mbox_new(); - if (conn->acceptmbox == SYS_MBOX_NULL) { - return ERR_MEM; - } - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return (conn->err = ERR_MEM); - } - msg->type = API_MSG_LISTEN; - msg->msg.conn = conn; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - return conn->err; -} - -struct netconn * -netconn_accept(struct netconn *conn) -{ - struct netconn *newconn; - - if (conn == NULL) { - return NULL; - } - - sys_mbox_fetch(conn->acceptmbox, (void **)&newconn); - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVMINUS, 0); - - return newconn; -} - -struct netbuf * -netconn_recv(struct netconn *conn) -{ - struct api_msg *msg; - struct netbuf *buf; - struct pbuf *p; - u16_t len; - - if (conn == NULL) { - return NULL; - } - - if (conn->recvmbox == SYS_MBOX_NULL) { - conn->err = ERR_CONN; - return NULL; - } - - if (conn->err != ERR_OK) { - return NULL; - } - - if (conn->type == NETCONN_TCP) { - if (conn->pcb.tcp->state == LISTEN) { - conn->err = ERR_CONN; - return NULL; - } - - - buf = memp_malloc(MEMP_NETBUF); - - if (buf == NULL) { - conn->err = ERR_MEM; - return NULL; - } - - sys_mbox_fetch(conn->recvmbox, (void **)&p); - - if (p != NULL) - { - len = p->tot_len; - conn->recv_avail -= len; - } - else - len = 0; - - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVMINUS, len); - - /* If we are closed, we indicate that we no longer wish to receive - data by setting conn->recvmbox to SYS_MBOX_NULL. */ - if (p == NULL) { - memp_free(MEMP_NETBUF, buf); - sys_mbox_free(conn->recvmbox); - conn->recvmbox = SYS_MBOX_NULL; - return NULL; - } - - buf->p = p; - buf->ptr = p; - buf->fromport = 0; - buf->fromaddr = NULL; - - /* Let the stack know that we have taken the data. */ - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - conn->err = ERR_MEM; - return buf; - } - msg->type = API_MSG_RECV; - msg->msg.conn = conn; - if (buf != NULL) { - msg->msg.msg.len = buf->p->tot_len; - } else { - msg->msg.msg.len = 1; - } - api_msg_post(msg); - - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - } else { - sys_mbox_fetch(conn->recvmbox, (void **)&buf); - conn->recv_avail -= buf->p->tot_len; - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVMINUS, buf->p->tot_len); - } - - - - - LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_recv: received %p (err %d)\n", (void *)buf, conn->err)); - - - return buf; -} - -err_t -netconn_send(struct netconn *conn, struct netbuf *buf) -{ - struct api_msg *msg; - - if (conn == NULL) { - return ERR_VAL; - } - - if (conn->err != ERR_OK) { - return conn->err; - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return (conn->err = ERR_MEM); - } - - LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_send: sending %d bytes\n", buf->p->tot_len)); - msg->type = API_MSG_SEND; - msg->msg.conn = conn; - msg->msg.msg.p = buf->p; - api_msg_post(msg); - - sys_mbox_fetch(conn->mbox, NULL); - memp_free(MEMP_API_MSG, msg); - return conn->err; -} - -err_t -netconn_write(struct netconn *conn, void *dataptr, u16_t size, u8_t copy) -{ - struct api_msg *msg; - u16_t len; - - if (conn == NULL) { - return ERR_VAL; - } - - if (conn->err != ERR_OK) { - return conn->err; - } - - if (conn->sem == SYS_SEM_NULL) { - conn->sem = sys_sem_new(0); - if (conn->sem == SYS_SEM_NULL) { - return ERR_MEM; - } - } - - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return (conn->err = ERR_MEM); - } - msg->type = API_MSG_WRITE; - msg->msg.conn = conn; - - - conn->state = NETCONN_WRITE; - while (conn->err == ERR_OK && size > 0) { - msg->msg.msg.w.dataptr = dataptr; - msg->msg.msg.w.copy = copy; - - if (conn->type == NETCONN_TCP) { - if (tcp_sndbuf(conn->pcb.tcp) == 0) { - sys_sem_wait(conn->sem); - if (conn->err != ERR_OK) { - goto ret; - } - } - if (size > tcp_sndbuf(conn->pcb.tcp)) { - /* We cannot send more than one send buffer's worth of data at a - time. */ - len = tcp_sndbuf(conn->pcb.tcp); - } else { - len = size; - } - } else { - len = size; - } - - LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_write: writing %d bytes (%d)\n", len, copy)); - msg->msg.msg.w.len = len; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - if (conn->err == ERR_OK) { - dataptr = (void *)((u8_t *)dataptr + len); - size -= len; - } else if (conn->err == ERR_MEM) { - conn->err = ERR_OK; - sys_sem_wait(conn->sem); - } else { - goto ret; - } - } - ret: - memp_free(MEMP_API_MSG, msg); - conn->state = NETCONN_NONE; - if (conn->sem != SYS_SEM_NULL) { - sys_sem_free(conn->sem); - conn->sem = SYS_SEM_NULL; - } - - return conn->err; -} - -err_t -netconn_close(struct netconn *conn) -{ - struct api_msg *msg; - - if (conn == NULL) { - return ERR_VAL; - } - if ((msg = memp_malloc(MEMP_API_MSG)) == NULL) { - return (conn->err = ERR_MEM); - } - - conn->state = NETCONN_CLOSE; - again: - msg->type = API_MSG_CLOSE; - msg->msg.conn = conn; - api_msg_post(msg); - sys_mbox_fetch(conn->mbox, NULL); - if (conn->err == ERR_MEM && - conn->sem != SYS_SEM_NULL) { - sys_sem_wait(conn->sem); - goto again; - } - conn->state = NETCONN_NONE; - memp_free(MEMP_API_MSG, msg); - return conn->err; -} - -err_t -netconn_err(struct netconn *conn) -{ - return conn->err; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/api_msg.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/api_msg.c deleted file mode 100644 index 762a7060..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/api_msg.c +++ /dev/null @@ -1,808 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/opt.h" -#include "lwip/arch.h" -#include "lwip/api_msg.h" -#include "lwip/memp.h" -#include "lwip/sys.h" -#include "lwip/tcpip.h" - -#if LWIP_RAW -static u8_t -recv_raw(void *arg, struct raw_pcb *pcb, struct pbuf *p, - struct ip_addr *addr) -{ - struct netbuf *buf; - struct netconn *conn; - - conn = arg; - if (!conn) return 0; - - if (conn->recvmbox != SYS_MBOX_NULL) { - if (!(buf = memp_malloc(MEMP_NETBUF))) { - return 0; - } - pbuf_ref(p); - buf->p = p; - buf->ptr = p; - buf->fromaddr = addr; - buf->fromport = pcb->protocol; - - conn->recv_avail += p->tot_len; - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVPLUS, p->tot_len); - sys_mbox_post(conn->recvmbox, buf); - } - - return 0; /* do not eat the packet */ -} -#endif -#if LWIP_UDP -static void -recv_udp(void *arg, struct udp_pcb *pcb, struct pbuf *p, - struct ip_addr *addr, u16_t port) -{ - struct netbuf *buf; - struct netconn *conn; - - conn = arg; - - if (conn == NULL) { - pbuf_free(p); - return; - } - if (conn->recvmbox != SYS_MBOX_NULL) { - buf = memp_malloc(MEMP_NETBUF); - if (buf == NULL) { - pbuf_free(p); - return; - } else { - buf->p = p; - buf->ptr = p; - buf->fromaddr = addr; - buf->fromport = port; - } - - conn->recv_avail += p->tot_len; - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVPLUS, p->tot_len); - sys_mbox_post(conn->recvmbox, buf); - } -} -#endif /* LWIP_UDP */ -#if LWIP_TCP - -static err_t -recv_tcp(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) -{ - struct netconn *conn; - u16_t len; - - conn = arg; - - if (conn == NULL) { - pbuf_free(p); - return ERR_VAL; - } - - if (conn->recvmbox != SYS_MBOX_NULL) { - - conn->err = err; - if (p != NULL) { - len = p->tot_len; - conn->recv_avail += len; - } - else - len = 0; - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVPLUS, len); - sys_mbox_post(conn->recvmbox, p); - } - return ERR_OK; -} - - -static err_t -poll_tcp(void *arg, struct tcp_pcb *pcb) -{ - struct netconn *conn; - - conn = arg; - if (conn != NULL && - (conn->state == NETCONN_WRITE || conn->state == NETCONN_CLOSE) && - conn->sem != SYS_SEM_NULL) { - sys_sem_signal(conn->sem); - } - return ERR_OK; -} - -static err_t -sent_tcp(void *arg, struct tcp_pcb *pcb, u16_t len) -{ - struct netconn *conn; - - conn = arg; - if (conn != NULL && conn->sem != SYS_SEM_NULL) { - sys_sem_signal(conn->sem); - } - - if (conn && conn->callback) - if (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) - (*conn->callback)(conn, NETCONN_EVT_SENDPLUS, len); - - return ERR_OK; -} - -static void -err_tcp(void *arg, err_t err) -{ - struct netconn *conn; - - conn = arg; - - conn->pcb.tcp = NULL; - - - conn->err = err; - if (conn->recvmbox != SYS_MBOX_NULL) { - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVPLUS, 0); - sys_mbox_post(conn->recvmbox, NULL); - } - if (conn->mbox != SYS_MBOX_NULL) { - sys_mbox_post(conn->mbox, NULL); - } - if (conn->acceptmbox != SYS_MBOX_NULL) { - /* Register event with callback */ - if (conn->callback) - (*conn->callback)(conn, NETCONN_EVT_RCVPLUS, 0); - sys_mbox_post(conn->acceptmbox, NULL); - } - if (conn->sem != SYS_SEM_NULL) { - sys_sem_signal(conn->sem); - } -} - -static void -setup_tcp(struct netconn *conn) -{ - struct tcp_pcb *pcb; - - pcb = conn->pcb.tcp; - tcp_arg(pcb, conn); - tcp_recv(pcb, recv_tcp); - tcp_sent(pcb, sent_tcp); - tcp_poll(pcb, poll_tcp, 4); - tcp_err(pcb, err_tcp); -} - -static err_t -accept_function(void *arg, struct tcp_pcb *newpcb, err_t err) -{ - sys_mbox_t mbox; - struct netconn *newconn; - struct netconn *conn; - -#if API_MSG_DEBUG -#if TCP_DEBUG - tcp_debug_print_state(newpcb->state); -#endif /* TCP_DEBUG */ -#endif /* API_MSG_DEBUG */ - conn = (struct netconn *)arg; - mbox = conn->acceptmbox; - newconn = memp_malloc(MEMP_NETCONN); - if (newconn == NULL) { - return ERR_MEM; - } - newconn->type = NETCONN_TCP; - newconn->pcb.tcp = newpcb; - setup_tcp(newconn); - newconn->recvmbox = sys_mbox_new(); - if (newconn->recvmbox == SYS_MBOX_NULL) { - memp_free(MEMP_NETCONN, newconn); - return ERR_MEM; - } - newconn->mbox = sys_mbox_new(); - if (newconn->mbox == SYS_MBOX_NULL) { - sys_mbox_free(newconn->recvmbox); - memp_free(MEMP_NETCONN, newconn); - return ERR_MEM; - } - newconn->sem = sys_sem_new(0); - if (newconn->sem == SYS_SEM_NULL) { - sys_mbox_free(newconn->recvmbox); - sys_mbox_free(newconn->mbox); - memp_free(MEMP_NETCONN, newconn); - return ERR_MEM; - } - newconn->acceptmbox = SYS_MBOX_NULL; - newconn->err = err; - /* Register event with callback */ - if (conn->callback) - { - (*conn->callback)(conn, NETCONN_EVT_RCVPLUS, 0); - /* We have to set the callback here even though - * the new socket is unknown. Mark the socket as -1. */ - newconn->callback = conn->callback; - newconn->socket = -1; - } - - sys_mbox_post(mbox, newconn); - return ERR_OK; -} -#endif /* LWIP_TCP */ - -static void -do_newconn(struct api_msg_msg *msg) -{ - if(msg->conn->pcb.tcp != NULL) { - /* This "new" connection already has a PCB allocated. */ - /* Is this an error condition? Should it be deleted? - We currently just are happy and return. */ - sys_mbox_post(msg->conn->mbox, NULL); - return; - } - - msg->conn->err = ERR_OK; - - /* Allocate a PCB for this connection */ - switch(msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - msg->conn->pcb.raw = raw_new(msg->msg.bc.port); /* misusing the port field */ - raw_recv(msg->conn->pcb.raw, recv_raw, msg->conn); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - msg->conn->pcb.udp = udp_new(); - if(msg->conn->pcb.udp == NULL) { - msg->conn->err = ERR_MEM; - break; - } - udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; - case NETCONN_UDPNOCHKSUM: - msg->conn->pcb.udp = udp_new(); - if(msg->conn->pcb.udp == NULL) { - msg->conn->err = ERR_MEM; - break; - } - udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; - case NETCONN_UDP: - msg->conn->pcb.udp = udp_new(); - if(msg->conn->pcb.udp == NULL) { - msg->conn->err = ERR_MEM; - break; - } - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - msg->conn->pcb.tcp = tcp_new(); - if(msg->conn->pcb.tcp == NULL) { - msg->conn->err = ERR_MEM; - break; - } - setup_tcp(msg->conn); - break; -#endif - default: - LWIP_ASSERT( "do_newconn: msg->conn->type unknown\n", 0 ); - } - - - sys_mbox_post(msg->conn->mbox, NULL); -} - - -static void -do_delconn(struct api_msg_msg *msg) -{ - if (msg->conn->pcb.tcp != NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - raw_remove(msg->conn->pcb.raw); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - msg->conn->pcb.udp->recv_arg = NULL; - udp_remove(msg->conn->pcb.udp); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - if (msg->conn->pcb.tcp->state == LISTEN) { - tcp_arg(msg->conn->pcb.tcp, NULL); - tcp_accept(msg->conn->pcb.tcp, NULL); - tcp_close(msg->conn->pcb.tcp); - } else { - tcp_arg(msg->conn->pcb.tcp, NULL); - tcp_sent(msg->conn->pcb.tcp, NULL); - tcp_recv(msg->conn->pcb.tcp, NULL); - tcp_poll(msg->conn->pcb.tcp, NULL, 0); - tcp_err(msg->conn->pcb.tcp, NULL); - if (tcp_close(msg->conn->pcb.tcp) != ERR_OK) { - tcp_abort(msg->conn->pcb.tcp); - } - } -#endif - default: - break; - } - } - /* Trigger select() in socket layer */ - if (msg->conn->callback) - { - (*msg->conn->callback)(msg->conn, NETCONN_EVT_RCVPLUS, 0); - (*msg->conn->callback)(msg->conn, NETCONN_EVT_SENDPLUS, 0); - } - - if (msg->conn->mbox != SYS_MBOX_NULL) { - sys_mbox_post(msg->conn->mbox, NULL); - } -} - -static void -do_bind(struct api_msg_msg *msg) -{ - if (msg->conn->pcb.tcp == NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - msg->conn->pcb.raw = raw_new(msg->msg.bc.port); /* misusing the port field as protocol */ - raw_recv(msg->conn->pcb.raw, recv_raw, msg->conn); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - msg->conn->pcb.udp = udp_new(); - udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; - case NETCONN_UDPNOCHKSUM: - msg->conn->pcb.udp = udp_new(); - udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; - case NETCONN_UDP: - msg->conn->pcb.udp = udp_new(); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - msg->conn->pcb.tcp = tcp_new(); - setup_tcp(msg->conn); -#endif /* LWIP_TCP */ - default: - break; - } - } - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - msg->conn->err = raw_bind(msg->conn->pcb.raw,msg->msg.bc.ipaddr); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - msg->conn->err = udp_bind(msg->conn->pcb.udp, msg->msg.bc.ipaddr, msg->msg.bc.port); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - msg->conn->err = tcp_bind(msg->conn->pcb.tcp, - msg->msg.bc.ipaddr, msg->msg.bc.port); -#endif /* LWIP_TCP */ - default: - break; - } - sys_mbox_post(msg->conn->mbox, NULL); -} -#if LWIP_TCP - -static err_t -do_connected(void *arg, struct tcp_pcb *pcb, err_t err) -{ - struct netconn *conn; - - conn = arg; - - if (conn == NULL) { - return ERR_VAL; - } - - conn->err = err; - if (conn->type == NETCONN_TCP && err == ERR_OK) { - setup_tcp(conn); - } - sys_mbox_post(conn->mbox, NULL); - return ERR_OK; -} -#endif - -static void -do_connect(struct api_msg_msg *msg) -{ - if (msg->conn->pcb.tcp == NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - msg->conn->pcb.raw = raw_new(msg->msg.bc.port); /* misusing the port field as protocol */ - raw_recv(msg->conn->pcb.raw, recv_raw, msg->conn); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - msg->conn->pcb.udp = udp_new(); - if (msg->conn->pcb.udp == NULL) { - msg->conn->err = ERR_MEM; - sys_mbox_post(msg->conn->mbox, NULL); - return; - } - udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; - case NETCONN_UDPNOCHKSUM: - msg->conn->pcb.udp = udp_new(); - if (msg->conn->pcb.udp == NULL) { - msg->conn->err = ERR_MEM; - sys_mbox_post(msg->conn->mbox, NULL); - return; - } - udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM); - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; - case NETCONN_UDP: - msg->conn->pcb.udp = udp_new(); - if (msg->conn->pcb.udp == NULL) { - msg->conn->err = ERR_MEM; - sys_mbox_post(msg->conn->mbox, NULL); - return; - } - udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - msg->conn->pcb.tcp = tcp_new(); - if (msg->conn->pcb.tcp == NULL) { - msg->conn->err = ERR_MEM; - sys_mbox_post(msg->conn->mbox, NULL); - return; - } -#endif - default: - break; - } - } - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - raw_connect(msg->conn->pcb.raw, msg->msg.bc.ipaddr); - sys_mbox_post(msg->conn->mbox, NULL); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - udp_connect(msg->conn->pcb.udp, msg->msg.bc.ipaddr, msg->msg.bc.port); - sys_mbox_post(msg->conn->mbox, NULL); - break; -#endif -#if LWIP_TCP - case NETCONN_TCP: - /* tcp_arg(msg->conn->pcb.tcp, msg->conn);*/ - setup_tcp(msg->conn); - tcp_connect(msg->conn->pcb.tcp, msg->msg.bc.ipaddr, msg->msg.bc.port, - do_connected); - /*tcp_output(msg->conn->pcb.tcp);*/ -#endif - - default: - break; - } -} - -static void -do_disconnect(struct api_msg_msg *msg) -{ - - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - /* Do nothing as connecting is only a helper for upper lwip layers */ - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - udp_disconnect(msg->conn->pcb.udp); - break; -#endif - case NETCONN_TCP: - break; - default: - LWIP_ASSERT( "do_newconn: msg->conn->type unknown\n", 0 ); - } - sys_mbox_post(msg->conn->mbox, NULL); -} - - -static void -do_listen(struct api_msg_msg *msg) -{ - if (msg->conn->pcb.tcp != NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - LWIP_DEBUGF(API_MSG_DEBUG, ("api_msg: listen RAW: cannot listen for RAW.\n")); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - LWIP_DEBUGF(API_MSG_DEBUG, ("api_msg: listen UDP: cannot listen for UDP.\n")); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - msg->conn->pcb.tcp = tcp_listen(msg->conn->pcb.tcp); - if (msg->conn->pcb.tcp == NULL) { - msg->conn->err = ERR_MEM; - } else { - if (msg->conn->acceptmbox == SYS_MBOX_NULL) { - msg->conn->acceptmbox = sys_mbox_new(); - if (msg->conn->acceptmbox == SYS_MBOX_NULL) { - msg->conn->err = ERR_MEM; - break; - } - } - tcp_arg(msg->conn->pcb.tcp, msg->conn); - tcp_accept(msg->conn->pcb.tcp, accept_function); - } -#endif - default: - break; - } - } - sys_mbox_post(msg->conn->mbox, NULL); -} - -static void -do_accept(struct api_msg_msg *msg) -{ - if (msg->conn->pcb.tcp != NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - LWIP_DEBUGF(API_MSG_DEBUG, ("api_msg: accept RAW: cannot accept for RAW.\n")); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - LWIP_DEBUGF(API_MSG_DEBUG, ("api_msg: accept UDP: cannot accept for UDP.\n")); - break; -#endif /* LWIP_UDP */ - case NETCONN_TCP: - break; - default: - LWIP_ASSERT( "do_newconn: msg->conn->type unknown\n", 0 ); - } - } -} - -static void -do_send(struct api_msg_msg *msg) -{ - if (msg->conn->pcb.tcp != NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - raw_send(msg->conn->pcb.raw, msg->msg.p); - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - udp_send(msg->conn->pcb.udp, msg->msg.p); - break; -#endif /* LWIP_UDP */ - case NETCONN_TCP: - break; - default: - LWIP_ASSERT( "do_newconn: msg->conn->type unknown\n", 0 ); - } - } - sys_mbox_post(msg->conn->mbox, NULL); -} - -static void -do_recv(struct api_msg_msg *msg) -{ -#if LWIP_TCP - if (msg->conn->pcb.tcp != NULL) { - if (msg->conn->type == NETCONN_TCP) { - tcp_recved(msg->conn->pcb.tcp, msg->msg.len); - } - } -#endif - sys_mbox_post(msg->conn->mbox, NULL); -} - -static void -do_write(struct api_msg_msg *msg) -{ -#if LWIP_TCP - err_t err; -#endif - if (msg->conn->pcb.tcp != NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - msg->conn->err = ERR_VAL; - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - msg->conn->err = ERR_VAL; - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - err = tcp_write(msg->conn->pcb.tcp, msg->msg.w.dataptr, - msg->msg.w.len, msg->msg.w.copy); - /* This is the Nagle algorithm: inhibit the sending of new TCP - segments when new outgoing data arrives from the user if any - previously transmitted data on the connection remains - unacknowledged. */ - if(err == ERR_OK && (msg->conn->pcb.tcp->unacked == NULL || (msg->conn->pcb.tcp->flags & TF_NODELAY)) ) { - tcp_output(msg->conn->pcb.tcp); - } - msg->conn->err = err; - if (msg->conn->callback) - if (err == ERR_OK) - { - if (tcp_sndbuf(msg->conn->pcb.tcp) <= TCP_SNDLOWAT) - (*msg->conn->callback)(msg->conn, NETCONN_EVT_SENDMINUS, msg->msg.w.len); - } -#endif - default: - break; - } - } - sys_mbox_post(msg->conn->mbox, NULL); -} - -static void -do_close(struct api_msg_msg *msg) -{ - err_t err; - - err = ERR_OK; - - if (msg->conn->pcb.tcp != NULL) { - switch (msg->conn->type) { -#if LWIP_RAW - case NETCONN_RAW: - break; -#endif -#if LWIP_UDP - case NETCONN_UDPLITE: - /* FALLTHROUGH */ - case NETCONN_UDPNOCHKSUM: - /* FALLTHROUGH */ - case NETCONN_UDP: - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case NETCONN_TCP: - if (msg->conn->pcb.tcp->state == LISTEN) { - err = tcp_close(msg->conn->pcb.tcp); - } - msg->conn->err = err; -#endif - default: - break; - } - } - sys_mbox_post(msg->conn->mbox, NULL); -} - -typedef void (* api_msg_decode)(struct api_msg_msg *msg); -static api_msg_decode decode[API_MSG_MAX] = { - do_newconn, - do_delconn, - do_bind, - do_connect, - do_disconnect, - do_listen, - do_accept, - do_send, - do_recv, - do_write, - do_close - }; -void -api_msg_input(struct api_msg *msg) -{ - decode[msg->type](&(msg->msg)); -} - -void -api_msg_post(struct api_msg *msg) -{ - tcpip_apimsg(msg); -} - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/err.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/err.c deleted file mode 100644 index b582d88a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/err.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/err.h" - -#ifdef LWIP_DEBUG - -static char *err_strerr[] = {"Ok.", - "Out of memory error.", - "Buffer error.", - "Connection aborted.", - "Connection reset.", - "Connection closed.", - "Not connected.", - "Illegal value.", - "Illegal argument.", - "Routing problem.", - "Address in use." -}; - - -char * -lwip_strerr(err_t err) -{ - return err_strerr[-err]; - -} - - -#endif /* LWIP_DEBUG */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/sockets.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/sockets.c deleted file mode 100644 index c6c4f828..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/sockets.c +++ /dev/null @@ -1,1362 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - * Improved by Marc Boucher and David Haas - * - */ - -#include -/* #include */ - -#include "lwip/opt.h" -#include "lwip/api.h" -#include "lwip/arch.h" -#include "lwip/sys.h" - -#include "lwip/sockets.h" - -#define NUM_SOCKETS MEMP_NUM_NETCONN - -struct lwip_socket { - struct netconn *conn; - struct netbuf *lastdata; - u16_t lastoffset; - u16_t rcvevent; - u16_t sendevent; - u16_t flags; - int err; -}; - -struct lwip_select_cb -{ - struct lwip_select_cb *next; - fd_set *readset; - fd_set *writeset; - fd_set *exceptset; - int sem_signalled; - sys_sem_t sem; -}; - -static struct lwip_socket sockets[NUM_SOCKETS]; -static struct lwip_select_cb *select_cb_list = 0; - -static sys_sem_t socksem = 0; -static sys_sem_t selectsem = 0; - -static void -event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len); - -static int err_to_errno_table[11] = { - 0, /* ERR_OK 0 No error, everything OK. */ - ENOMEM, /* ERR_MEM -1 Out of memory error. */ - ENOBUFS, /* ERR_BUF -2 Buffer error. */ - ECONNABORTED, /* ERR_ABRT -3 Connection aborted. */ - ECONNRESET, /* ERR_RST -4 Connection reset. */ - ESHUTDOWN, /* ERR_CLSD -5 Connection closed. */ - ENOTCONN, /* ERR_CONN -6 Not connected. */ - EINVAL, /* ERR_VAL -7 Illegal value. */ - EIO, /* ERR_ARG -8 Illegal argument. */ - EHOSTUNREACH, /* ERR_RTE -9 Routing problem. */ - EADDRINUSE /* ERR_USE -10 Address in use. */ -}; - -#define ERR_TO_ERRNO_TABLE_SIZE \ - (sizeof(err_to_errno_table)/sizeof(err_to_errno_table[0])) - -#define err_to_errno(err) \ - (-(err) >= 0 && -(err) < ERR_TO_ERRNO_TABLE_SIZE ? \ - err_to_errno_table[-(err)] : EIO) - -#ifdef ERRNO -#define set_errno(err) errno = (err) -#else -#define set_errno(err) -#endif - -#define sock_set_errno(sk, e) do { \ - sk->err = (e); \ - set_errno(sk->err); \ -} while (0) - - -static struct lwip_socket * -get_socket(int s) -{ - struct lwip_socket *sock; - - if ((s < 0) || (s > NUM_SOCKETS)) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): invalid\n", s)); - set_errno(EBADF); - return NULL; - } - - sock = &sockets[s]; - - if (!sock->conn) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): not active\n", s)); - set_errno(EBADF); - return NULL; - } - - return sock; -} - -static int -alloc_socket(struct netconn *newconn) -{ - int i; - - if (!socksem) - socksem = sys_sem_new(1); - - /* Protect socket array */ - sys_sem_wait(socksem); - - /* allocate a new socket identifier */ - for(i = 0; i < NUM_SOCKETS; ++i) { - if (!sockets[i].conn) { - sockets[i].conn = newconn; - sockets[i].lastdata = NULL; - sockets[i].lastoffset = 0; - sockets[i].rcvevent = 0; - sockets[i].sendevent = 1; /* TCP send buf is empty */ - sockets[i].flags = 0; - sockets[i].err = 0; - sys_sem_signal(socksem); - return i; - } - } - sys_sem_signal(socksem); - return -1; -} - -int -lwip_accept(int s, struct sockaddr *addr, socklen_t *addrlen) -{ - struct lwip_socket *sock; - struct netconn *newconn; - struct ip_addr naddr; - u16_t port; - int newsock; - struct sockaddr_in sin; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d)...\n", s)); - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - newconn = netconn_accept(sock->conn); - - /* get the IP address and port of the remote host */ - netconn_peer(newconn, &naddr, &port); - - memset(&sin, 0, sizeof(sin)); - sin.sin_len = sizeof(sin); - sin.sin_family = AF_INET; - sin.sin_port = htons(port); - sin.sin_addr.s_addr = naddr.addr; - - if (*addrlen > sizeof(sin)) - *addrlen = sizeof(sin); - - memcpy(addr, &sin, *addrlen); - - newsock = alloc_socket(newconn); - if (newsock == -1) { - netconn_delete(newconn); - sock_set_errno(sock, ENOBUFS); - return -1; - } - newconn->callback = event_callback; - sock = get_socket(newsock); - - sys_sem_wait(socksem); - sock->rcvevent += -1 - newconn->socket; - newconn->socket = newsock; - sys_sem_signal(socksem); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d) returning new sock=%d addr=", s, newsock)); - ip_addr_debug_print(SOCKETS_DEBUG, &naddr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%u\n", port)); - - sock_set_errno(sock, 0); - return newsock; -} - -int -lwip_bind(int s, struct sockaddr *name, socklen_t namelen) -{ - struct lwip_socket *sock; - struct ip_addr local_addr; - u16_t local_port; - err_t err; - - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - local_addr.addr = ((struct sockaddr_in *)name)->sin_addr.s_addr; - local_port = ((struct sockaddr_in *)name)->sin_port; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_bind(%d, addr=", s)); - ip_addr_debug_print(SOCKETS_DEBUG, &local_addr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%u)\n", ntohs(local_port))); - - err = netconn_bind(sock->conn, &local_addr, ntohs(local_port)); - - if (err != ERR_OK) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_bind(%d) failed, err=%d\n", s, err)); - sock_set_errno(sock, err_to_errno(err)); - return -1; - } - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_bind(%d) succeeded\n", s)); - sock_set_errno(sock, 0); - return 0; -} - -int -lwip_close(int s) -{ - struct lwip_socket *sock; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_close(%d)\n", s)); - if (!socksem) - socksem = sys_sem_new(1); - - /* We cannot allow multiple closes of the same socket. */ - sys_sem_wait(socksem); - - sock = get_socket(s); - if (!sock) { - sys_sem_signal(socksem); - set_errno(EBADF); - return -1; - } - - netconn_delete(sock->conn); - if (sock->lastdata) { - netbuf_delete(sock->lastdata); - } - sock->lastdata = NULL; - sock->lastoffset = 0; - sock->conn = NULL; - sys_sem_signal(socksem); - sock_set_errno(sock, 0); - return 0; -} - -int -lwip_connect(int s, struct sockaddr *name, socklen_t namelen) -{ - struct lwip_socket *sock; - err_t err; - - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - if (((struct sockaddr_in *)name)->sin_family == AF_UNSPEC) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, AF_UNSPEC)\n", s)); - err = netconn_disconnect(sock->conn); - } else { - struct ip_addr remote_addr; - u16_t remote_port; - - remote_addr.addr = ((struct sockaddr_in *)name)->sin_addr.s_addr; - remote_port = ((struct sockaddr_in *)name)->sin_port; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, addr=", s)); - ip_addr_debug_print(SOCKETS_DEBUG, &remote_addr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%u)\n", ntohs(remote_port))); - - err = netconn_connect(sock->conn, &remote_addr, ntohs(remote_port)); - } - - if (err != ERR_OK) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) failed, err=%d\n", s, err)); - sock_set_errno(sock, err_to_errno(err)); - return -1; - } - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) succeeded\n", s)); - sock_set_errno(sock, 0); - return 0; -} - -int -lwip_listen(int s, int backlog) -{ - struct lwip_socket *sock; - err_t err; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_listen(%d, backlog=%d)\n", s, backlog)); - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - err = netconn_listen(sock->conn); - - if (err != ERR_OK) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_listen(%d) failed, err=%d\n", s, err)); - sock_set_errno(sock, err_to_errno(err)); - return -1; - } - - sock_set_errno(sock, 0); - return 0; -} - -int -lwip_recvfrom(int s, void *mem, int len, unsigned int flags, - struct sockaddr *from, socklen_t *fromlen) -{ - struct lwip_socket *sock; - struct netbuf *buf; - u16_t buflen, copylen; - struct ip_addr *addr; - u16_t port; - - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d, %p, %d, 0x%x, ..)\n", s, mem, len, flags)); - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - /* Check if there is data left from the last recv operation. */ - if (sock->lastdata) { - buf = sock->lastdata; - } else { - /* If this is non-blocking call, then check first */ - if (((flags & MSG_DONTWAIT) || (sock->flags & O_NONBLOCK)) - && !sock->rcvevent) - { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): returning EWOULDBLOCK\n", s)); - sock_set_errno(sock, EWOULDBLOCK); - return -1; - } - - /* No data was left from the previous operation, so we try to get - some from the network. */ - buf = netconn_recv(sock->conn); - - if (!buf) { - /* We should really do some error checking here. */ - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): buf == NULL!\n", s)); - sock_set_errno(sock, 0); - return 0; - } - } - - buflen = netbuf_len(buf); - - buflen -= sock->lastoffset; - - if (len > buflen) { - copylen = buflen; - } else { - copylen = len; - } - - /* copy the contents of the received buffer into - the supplied memory pointer mem */ - netbuf_copy_partial(buf, mem, copylen, sock->lastoffset); - - /* Check to see from where the data was. */ - if (from && fromlen) { - struct sockaddr_in sin; - - addr = netbuf_fromaddr(buf); - port = netbuf_fromport(buf); - - memset(&sin, 0, sizeof(sin)); - sin.sin_len = sizeof(sin); - sin.sin_family = AF_INET; - sin.sin_port = htons(port); - sin.sin_addr.s_addr = addr->addr; - - if (*fromlen > sizeof(sin)) - *fromlen = sizeof(sin); - - memcpy(from, &sin, *fromlen); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): addr=", s)); - ip_addr_debug_print(SOCKETS_DEBUG, addr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%u len=%u\n", port, copylen)); - } else { -#if SOCKETS_DEBUG - addr = netbuf_fromaddr(buf); - port = netbuf_fromport(buf); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): addr=", s)); - ip_addr_debug_print(SOCKETS_DEBUG, addr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%u len=%u\n", port, copylen)); -#endif - - } - - /* If this is a TCP socket, check if there is data left in the - buffer. If so, it should be saved in the sock structure for next - time around. */ - if (netconn_type(sock->conn) == NETCONN_TCP && buflen - copylen > 0) { - sock->lastdata = buf; - sock->lastoffset += copylen; - } else { - sock->lastdata = NULL; - sock->lastoffset = 0; - netbuf_delete(buf); - } - - - sock_set_errno(sock, 0); - return copylen; -} - -int -lwip_read(int s, void *mem, int len) -{ - return lwip_recvfrom(s, mem, len, 0, NULL, NULL); -} - -int -lwip_recv(int s, void *mem, int len, unsigned int flags) -{ - return lwip_recvfrom(s, mem, len, flags, NULL, NULL); -} - -int -lwip_send(int s, void *data, int size, unsigned int flags) -{ - struct lwip_socket *sock; - struct netbuf *buf; - err_t err; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d, data=%p, size=%d, flags=0x%x)\n", s, data, size, flags)); - - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - switch (netconn_type(sock->conn)) { - case NETCONN_RAW: - case NETCONN_UDP: - case NETCONN_UDPLITE: - case NETCONN_UDPNOCHKSUM: - /* create a buffer */ - buf = netbuf_new(); - - if (!buf) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) ENOBUFS\n", s)); - sock_set_errno(sock, ENOBUFS); - return -1; - } - - /* make the buffer point to the data that should - be sent */ - netbuf_ref(buf, data, size); - - /* send the data */ - err = netconn_send(sock->conn, buf); - - /* deallocated the buffer */ - netbuf_delete(buf); - break; - case NETCONN_TCP: - err = netconn_write(sock->conn, data, size, NETCONN_COPY); - break; - default: - err = ERR_ARG; - break; - } - if (err != ERR_OK) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) err=%d\n", s, err)); - sock_set_errno(sock, err_to_errno(err)); - return -1; - } - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) ok size=%d\n", s, size)); - sock_set_errno(sock, 0); - return size; -} - -int -lwip_sendto(int s, void *data, int size, unsigned int flags, - struct sockaddr *to, socklen_t tolen) -{ - struct lwip_socket *sock; - struct ip_addr remote_addr, addr; - u16_t remote_port, port; - int ret,connected; - - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - /* get the peer if currently connected */ - connected = (netconn_peer(sock->conn, &addr, &port) == ERR_OK); - - remote_addr.addr = ((struct sockaddr_in *)to)->sin_addr.s_addr; - remote_port = ((struct sockaddr_in *)to)->sin_port; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_sendto(%d, data=%p, size=%d, flags=0x%x to=", s, data, size, flags)); - ip_addr_debug_print(SOCKETS_DEBUG, &remote_addr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%u\n", ntohs(remote_port))); - - netconn_connect(sock->conn, &remote_addr, ntohs(remote_port)); - - ret = lwip_send(s, data, size, flags); - - /* reset the remote address and port number - of the connection */ - if (connected) - netconn_connect(sock->conn, &addr, port); - else - netconn_disconnect(sock->conn); - return ret; -} - -int -lwip_socket(int domain, int type, int protocol) -{ - struct netconn *conn; - int i; - - /* create a netconn */ - switch (type) { - case SOCK_RAW: - conn = netconn_new_with_proto_and_callback(NETCONN_RAW, protocol, event_callback); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_RAW, %d) = ", domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol)); - break; - case SOCK_DGRAM: - conn = netconn_new_with_callback(NETCONN_UDP, event_callback); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_DGRAM, %d) = ", domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol)); - break; - case SOCK_STREAM: - conn = netconn_new_with_callback(NETCONN_TCP, event_callback); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_STREAM, %d) = ", domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol)); - break; - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%d, %d/UNKNOWN, %d) = -1\n", domain, type, protocol)); - set_errno(EINVAL); - return -1; - } - - if (!conn) { - LWIP_DEBUGF(SOCKETS_DEBUG, ("-1 / ENOBUFS (could not create netconn)\n")); - set_errno(ENOBUFS); - return -1; - } - - i = alloc_socket(conn); - - if (i == -1) { - netconn_delete(conn); - set_errno(ENOBUFS); - return -1; - } - conn->socket = i; - LWIP_DEBUGF(SOCKETS_DEBUG, ("%d\n", i)); - set_errno(0); - return i; -} - -int -lwip_write(int s, void *data, int size) -{ - return lwip_send(s, data, size, 0); -} - - -static int -lwip_selscan(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset) -{ - int i, nready = 0; - fd_set lreadset, lwriteset, lexceptset; - struct lwip_socket *p_sock; - - FD_ZERO(&lreadset); - FD_ZERO(&lwriteset); - FD_ZERO(&lexceptset); - - /* Go through each socket in each list to count number of sockets which - currently match */ - for(i = 0; i < maxfdp1; i++) - { - if (FD_ISSET(i, readset)) - { - /* See if netconn of this socket is ready for read */ - p_sock = get_socket(i); - if (p_sock && (p_sock->lastdata || p_sock->rcvevent)) - { - FD_SET(i, &lreadset); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_selscan: fd=%d ready for reading\n", i)); - nready++; - } - } - if (FD_ISSET(i, writeset)) - { - /* See if netconn of this socket is ready for write */ - p_sock = get_socket(i); - if (p_sock && p_sock->sendevent) - { - FD_SET(i, &lwriteset); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_selscan: fd=%d ready for writing\n", i)); - nready++; - } - } - } - *readset = lreadset; - *writeset = lwriteset; - FD_ZERO(exceptset); - - return nready; -} - - - -int -lwip_select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset, - struct timeval *timeout) -{ - int i; - int nready; - fd_set lreadset, lwriteset, lexceptset; - u32_t msectimeout; - struct lwip_select_cb select_cb; - struct lwip_select_cb *p_selcb; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select(%d, %p, %p, %p, tvsec=%ld tvusec=%ld)\n", maxfdp1, (void *)readset, (void *) writeset, (void *) exceptset, timeout ? timeout->tv_sec : -1L, timeout ? timeout->tv_usec : -1L)); - - select_cb.next = 0; - select_cb.readset = readset; - select_cb.writeset = writeset; - select_cb.exceptset = exceptset; - select_cb.sem_signalled = 0; - - /* Protect ourselves searching through the list */ - if (!selectsem) - selectsem = sys_sem_new(1); - sys_sem_wait(selectsem); - - if (readset) - lreadset = *readset; - else - FD_ZERO(&lreadset); - if (writeset) - lwriteset = *writeset; - else - FD_ZERO(&lwriteset); - if (exceptset) - lexceptset = *exceptset; - else - FD_ZERO(&lexceptset); - - /* Go through each socket in each list to count number of sockets which - currently match */ - nready = lwip_selscan(maxfdp1, &lreadset, &lwriteset, &lexceptset); - - /* If we don't have any current events, then suspend if we are supposed to */ - if (!nready) - { - if (timeout && timeout->tv_sec == 0 && timeout->tv_usec == 0) - { - sys_sem_signal(selectsem); - if (readset) - FD_ZERO(readset); - if (writeset) - FD_ZERO(writeset); - if (exceptset) - FD_ZERO(exceptset); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select: no timeout, returning 0\n")); - set_errno(0); - - return 0; - } - - /* add our semaphore to list */ - /* We don't actually need any dynamic memory. Our entry on the - * list is only valid while we are in this function, so it's ok - * to use local variables */ - - select_cb.sem = sys_sem_new(0); - /* Note that we are still protected */ - /* Put this select_cb on top of list */ - select_cb.next = select_cb_list; - select_cb_list = &select_cb; - - /* Now we can safely unprotect */ - sys_sem_signal(selectsem); - - /* Now just wait to be woken */ - if (timeout == 0) - /* Wait forever */ - msectimeout = 0; - else - msectimeout = ((timeout->tv_sec * 1000) + ((timeout->tv_usec + 500)/1000)); - - i = sys_sem_wait_timeout(select_cb.sem, msectimeout); - - /* Take us off the list */ - sys_sem_wait(selectsem); - if (select_cb_list == &select_cb) - select_cb_list = select_cb.next; - else - for (p_selcb = select_cb_list; p_selcb; p_selcb = p_selcb->next) - if (p_selcb->next == &select_cb) - { - p_selcb->next = select_cb.next; - break; - } - - sys_sem_signal(selectsem); - - sys_sem_free(select_cb.sem); - if (i == 0) /* Timeout */ - { - if (readset) - FD_ZERO(readset); - if (writeset) - FD_ZERO(writeset); - if (exceptset) - FD_ZERO(exceptset); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select: timeout expired\n")); - set_errno(0); - - return 0; - } - - if (readset) - lreadset = *readset; - else - FD_ZERO(&lreadset); - if (writeset) - lwriteset = *writeset; - else - FD_ZERO(&lwriteset); - if (exceptset) - lexceptset = *exceptset; - else - FD_ZERO(&lexceptset); - - /* See what's set */ - nready = lwip_selscan(maxfdp1, &lreadset, &lwriteset, &lexceptset); - } - else - sys_sem_signal(selectsem); - - if (readset) - *readset = lreadset; - if (writeset) - *writeset = lwriteset; - if (exceptset) - *exceptset = lexceptset; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select: nready=%d\n", nready)); - set_errno(0); - - return nready; -} - - -static void -event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len) -{ - int s; - struct lwip_socket *sock; - struct lwip_select_cb *scb; - - /* Get socket */ - if (conn) - { - s = conn->socket; - if (s < 0) - { - /* Data comes in right away after an accept, even though - * the server task might not have created a new socket yet. - * Just count down (or up) if that's the case and we - * will use the data later. Note that only receive events - * can happen before the new socket is set up. */ - if (evt == NETCONN_EVT_RCVPLUS) - conn->socket--; - return; - } - - sock = get_socket(s); - if (!sock) - return; - } - else - return; - - if (!selectsem) - selectsem = sys_sem_new(1); - - sys_sem_wait(selectsem); - /* Set event as required */ - switch (evt) - { - case NETCONN_EVT_RCVPLUS: - sock->rcvevent++; - break; - case NETCONN_EVT_RCVMINUS: - sock->rcvevent--; - break; - case NETCONN_EVT_SENDPLUS: - sock->sendevent = 1; - break; - case NETCONN_EVT_SENDMINUS: - sock->sendevent = 0; - break; - } - sys_sem_signal(selectsem); - - /* Now decide if anyone is waiting for this socket */ - /* NOTE: This code is written this way to protect the select link list - but to avoid a deadlock situation by releasing socksem before - signalling for the select. This means we need to go through the list - multiple times ONLY IF a select was actually waiting. We go through - the list the number of waiting select calls + 1. This list is - expected to be small. */ - while (1) - { - sys_sem_wait(selectsem); - for (scb = select_cb_list; scb; scb = scb->next) - { - if (scb->sem_signalled == 0) - { - /* Test this select call for our socket */ - if (scb->readset && FD_ISSET(s, scb->readset)) - if (sock->rcvevent) - break; - if (scb->writeset && FD_ISSET(s, scb->writeset)) - if (sock->sendevent) - break; - } - } - if (scb) - { - scb->sem_signalled = 1; - sys_sem_signal(selectsem); - sys_sem_signal(scb->sem); - } else { - sys_sem_signal(selectsem); - break; - } - } - -} - - - - -int lwip_shutdown(int s, int how) -{ - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_shutdown(%d, how=%d)\n", s, how)); - return lwip_close(s); /* XXX temporary hack until proper implementation */ -} - -int lwip_getpeername (int s, struct sockaddr *name, socklen_t *namelen) -{ - struct lwip_socket *sock; - struct sockaddr_in sin; - struct ip_addr naddr; - - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - memset(&sin, 0, sizeof(sin)); - sin.sin_len = sizeof(sin); - sin.sin_family = AF_INET; - - /* get the IP address and port of the remote host */ - netconn_peer(sock->conn, &naddr, &sin.sin_port); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getpeername(%d, addr=", s)); - ip_addr_debug_print(SOCKETS_DEBUG, &naddr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%d)\n", sin.sin_port)); - - sin.sin_port = htons(sin.sin_port); - sin.sin_addr.s_addr = naddr.addr; - - if (*namelen > sizeof(sin)) - *namelen = sizeof(sin); - - memcpy(name, &sin, *namelen); - sock_set_errno(sock, 0); - return 0; -} - -int lwip_getsockname (int s, struct sockaddr *name, socklen_t *namelen) -{ - struct lwip_socket *sock; - struct sockaddr_in sin; - struct ip_addr *naddr; - - sock = get_socket(s); - if (!sock) { - set_errno(EBADF); - return -1; - } - - memset(&sin, 0, sizeof(sin)); - sin.sin_len = sizeof(sin); - sin.sin_family = AF_INET; - - /* get the IP address and port of the remote host */ - netconn_addr(sock->conn, &naddr, &sin.sin_port); - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockname(%d, addr=", s)); - ip_addr_debug_print(SOCKETS_DEBUG, naddr); - LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%d)\n", sin.sin_port)); - - sin.sin_port = htons(sin.sin_port); - sin.sin_addr.s_addr = naddr->addr; - - if (*namelen > sizeof(sin)) - *namelen = sizeof(sin); - - memcpy(name, &sin, *namelen); - sock_set_errno(sock, 0); - return 0; -} - -int lwip_getsockopt (int s, int level, int optname, void *optval, socklen_t *optlen) -{ - int err = 0; - struct lwip_socket *sock = get_socket(s); - - if(!sock) { - set_errno(EBADF); - return -1; - } - - if( NULL == optval || NULL == optlen ) { - sock_set_errno( sock, EFAULT ); - return -1; - } - - /* Do length and type checks for the various options first, to keep it readable. */ - switch( level ) { - -/* Level: SOL_SOCKET */ - case SOL_SOCKET: - switch(optname) { - - case SO_ACCEPTCONN: - case SO_BROADCAST: - /* UNIMPL case SO_DEBUG: */ - /* UNIMPL case SO_DONTROUTE: */ - case SO_ERROR: - case SO_KEEPALIVE: - /* UNIMPL case SO_OOBINLINE: */ - /* UNIMPL case SO_RCVBUF: */ - /* UNIMPL case SO_SNDBUF: */ - /* UNIMPL case SO_RCVLOWAT: */ - /* UNIMPL case SO_SNDLOWAT: */ -#if SO_REUSE - case SO_REUSEADDR: - case SO_REUSEPORT: -#endif /* SO_REUSE */ - case SO_TYPE: - /* UNIMPL case SO_USELOOPBACK: */ - if( *optlen < sizeof(int) ) { - err = EINVAL; - } - break; - - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, UNIMPL: optname=0x%x, ..)\n", s, optname)); - err = ENOPROTOOPT; - } /* switch */ - break; - -/* Level: IPPROTO_IP */ - case IPPROTO_IP: - switch(optname) { - /* UNIMPL case IP_HDRINCL: */ - /* UNIMPL case IP_RCVDSTADDR: */ - /* UNIMPL case IP_RCVIF: */ - case IP_TTL: - case IP_TOS: - if( *optlen < sizeof(int) ) { - err = EINVAL; - } - break; - - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, UNIMPL: optname=0x%x, ..)\n", s, optname)); - err = ENOPROTOOPT; - } /* switch */ - break; - -/* Level: IPPROTO_TCP */ - case IPPROTO_TCP: - if( *optlen < sizeof(int) ) { - err = EINVAL; - break; - } - - /* If this is no TCP socket, ignore any options. */ - if ( sock->conn->type != NETCONN_TCP ) return 0; - - switch( optname ) { - case TCP_NODELAY: - case TCP_KEEPALIVE: - break; - - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_TCP, UNIMPL: optname=0x%x, ..)\n", s, optname)); - err = ENOPROTOOPT; - } /* switch */ - break; - -/* UNDEFINED LEVEL */ - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, level=0x%x, UNIMPL: optname=0x%x, ..)\n", s, level, optname)); - err = ENOPROTOOPT; - } /* switch */ - - - if( 0 != err ) { - sock_set_errno(sock, err); - return -1; - } - - - - /* Now do the actual option processing */ - - switch(level) { - -/* Level: SOL_SOCKET */ - case SOL_SOCKET: - switch( optname ) { - - /* The option flags */ - case SO_ACCEPTCONN: - case SO_BROADCAST: - /* UNIMPL case SO_DEBUG: */ - /* UNIMPL case SO_DONTROUTE: */ - case SO_KEEPALIVE: - /* UNIMPL case SO_OOBINCLUDE: */ -#if SO_REUSE - case SO_REUSEADDR: - case SO_REUSEPORT: -#endif /* SO_REUSE */ - /*case SO_USELOOPBACK: UNIMPL */ - *(int*)optval = sock->conn->pcb.tcp->so_options & optname; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, optname=0x%x, ..) = %s\n", s, optname, (*(int*)optval?"on":"off"))); - break; - - case SO_TYPE: - switch (sock->conn->type) { - case NETCONN_RAW: - *(int*)optval = SOCK_RAW; - break; - case NETCONN_TCP: - *(int*)optval = SOCK_STREAM; - break; - case NETCONN_UDP: - case NETCONN_UDPLITE: - case NETCONN_UDPNOCHKSUM: - *(int*)optval = SOCK_DGRAM; - break; - default: /* unrecognized socket type */ - *(int*)optval = sock->conn->type; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, SO_TYPE): unrecognized socket type %d\n", s, *(int *)optval)); - } /* switch */ - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, SO_TYPE) = %d\n", s, *(int *)optval)); - break; - - case SO_ERROR: - *(int *)optval = sock->err; - sock->err = 0; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, SO_ERROR) = %d\n", s, *(int *)optval)); - break; - } /* switch */ - break; - -/* Level: IPPROTO_IP */ - case IPPROTO_IP: - switch( optname ) { - case IP_TTL: - *(int*)optval = sock->conn->pcb.tcp->ttl; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_TTL) = %d\n", s, *(int *)optval)); - break; - case IP_TOS: - *(int*)optval = sock->conn->pcb.tcp->tos; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_TOS) = %d\n", s, *(int *)optval)); - break; - } /* switch */ - break; - -/* Level: IPPROTO_TCP */ - case IPPROTO_TCP: - switch( optname ) { - case TCP_NODELAY: - *(int*)optval = (sock->conn->pcb.tcp->flags & TF_NODELAY); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_TCP, TCP_NODELAY) = %s\n", s, (*(int*)optval)?"on":"off") ); - break; - case TCP_KEEPALIVE: - *(int*)optval = (int)sock->conn->pcb.tcp->keepalive; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, TCP_KEEPALIVE) = %d\n", s, *(int *)optval)); - break; - } /* switch */ - break; - } - - - sock_set_errno(sock, err); - return err ? -1 : 0; -} - -int lwip_setsockopt (int s, int level, int optname, const void *optval, socklen_t optlen) -{ - struct lwip_socket *sock = get_socket(s); - int err = 0; - - if(!sock) { - set_errno(EBADF); - return -1; - } - - if( NULL == optval ) { - sock_set_errno( sock, EFAULT ); - return -1; - } - - - /* Do length and type checks for the various options first, to keep it readable. */ - switch( level ) { - -/* Level: SOL_SOCKET */ - case SOL_SOCKET: - switch(optname) { - - case SO_BROADCAST: - /* UNIMPL case SO_DEBUG: */ - /* UNIMPL case SO_DONTROUTE: */ - case SO_KEEPALIVE: - /* UNIMPL case SO_OOBINLINE: */ - /* UNIMPL case SO_RCVBUF: */ - /* UNIMPL case SO_SNDBUF: */ - /* UNIMPL case SO_RCVLOWAT: */ - /* UNIMPL case SO_SNDLOWAT: */ -#if SO_REUSE - case SO_REUSEADDR: - case SO_REUSEPORT: -#endif /* SO_REUSE */ - /* UNIMPL case SO_USELOOPBACK: */ - if( optlen < sizeof(int) ) { - err = EINVAL; - } - break; - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, SOL_SOCKET, UNIMPL: optname=0x%x, ..)\n", s, optname)); - err = ENOPROTOOPT; - } /* switch */ - break; - -/* Level: IPPROTO_IP */ - case IPPROTO_IP: - switch(optname) { - /* UNIMPL case IP_HDRINCL: */ - /* UNIMPL case IP_RCVDSTADDR: */ - /* UNIMPL case IP_RCVIF: */ - case IP_TTL: - case IP_TOS: - if( optlen < sizeof(int) ) { - err = EINVAL; - } - break; - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_IP, UNIMPL: optname=0x%x, ..)\n", s, optname)); - err = ENOPROTOOPT; - } /* switch */ - break; - -/* Level: IPPROTO_TCP */ - case IPPROTO_TCP: - if( optlen < sizeof(int) ) { - err = EINVAL; - break; - } - - /* If this is no TCP socket, ignore any options. */ - if ( sock->conn->type != NETCONN_TCP ) return 0; - - switch( optname ) { - case TCP_NODELAY: - case TCP_KEEPALIVE: - break; - - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, UNIMPL: optname=0x%x, ..)\n", s, optname)); - err = ENOPROTOOPT; - } /* switch */ - break; - -/* UNDEFINED LEVEL */ - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, level=0x%x, UNIMPL: optname=0x%x, ..)\n", s, level, optname)); - err = ENOPROTOOPT; - } /* switch */ - - - if( 0 != err ) { - sock_set_errno(sock, err); - return -1; - } - - - - /* Now do the actual option processing */ - - switch(level) { - -/* Level: SOL_SOCKET */ - case SOL_SOCKET: - switch(optname) { - - /* The option flags */ - case SO_BROADCAST: - /* UNIMPL case SO_DEBUG: */ - /* UNIMPL case SO_DONTROUTE: */ - case SO_KEEPALIVE: - /* UNIMPL case SO_OOBINCLUDE: */ -#if SO_REUSE - case SO_REUSEADDR: - case SO_REUSEPORT: -#endif /* SO_REUSE */ - /* UNIMPL case SO_USELOOPBACK: */ - if ( *(int*)optval ) { - sock->conn->pcb.tcp->so_options |= optname; - } else { - sock->conn->pcb.tcp->so_options &= ~optname; - } - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, SOL_SOCKET, optname=0x%x, ..) -> %s\n", s, optname, (*(int*)optval?"on":"off"))); - break; - } /* switch */ - break; - -/* Level: IPPROTO_IP */ - case IPPROTO_IP: - switch( optname ) { - case IP_TTL: - sock->conn->pcb.tcp->ttl = (u8_t)(*(int*)optval); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_IP, IP_TTL, ..) -> %u\n", s, sock->conn->pcb.tcp->ttl)); - break; - case IP_TOS: - sock->conn->pcb.tcp->tos = (u8_t)(*(int*)optval); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_IP, IP_TOS, ..)-> %u\n", s, sock->conn->pcb.tcp->tos)); - break; - } /* switch */ - break; - -/* Level: IPPROTO_TCP */ - case IPPROTO_TCP: - switch( optname ) { - case TCP_NODELAY: - if ( *(int*)optval ) { - sock->conn->pcb.tcp->flags |= TF_NODELAY; - } else { - sock->conn->pcb.tcp->flags &= ~TF_NODELAY; - } - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_NODELAY) -> %s\n", s, (*(int *)optval)?"on":"off") ); - break; - case TCP_KEEPALIVE: - sock->conn->pcb.tcp->keepalive = (u32_t)(*(int*)optval); - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_KEEPALIVE) -> %lu\n", s, sock->conn->pcb.tcp->keepalive)); - break; - } /* switch */ - break; - } /* switch */ - - sock_set_errno(sock, err); - return err ? -1 : 0; -} - -int lwip_ioctl(int s, long cmd, void *argp) -{ - struct lwip_socket *sock = get_socket(s); - - if(!sock) { - set_errno(EBADF); - return -1; - } - - switch (cmd) { - case FIONREAD: - if (!argp) { - sock_set_errno(sock, EINVAL); - return -1; - } - - *((u16_t*)argp) = sock->conn->recv_avail; - - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONREAD, %p) = %u\n", s, argp, *((u16_t*)argp))); - sock_set_errno(sock, 0); - return 0; - - case FIONBIO: - if (argp && *(u32_t*)argp) - sock->flags |= O_NONBLOCK; - else - sock->flags &= ~O_NONBLOCK; - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONBIO, %d)\n", s, !!(sock->flags & O_NONBLOCK))); - sock_set_errno(sock, 0); - return 0; - - default: - LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, UNIMPL: 0x%lx, %p)\n", s, cmd, argp)); - sock_set_errno(sock, ENOSYS); /* not yet implemented */ - return -1; - } -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/tcpip.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/tcpip.c deleted file mode 100644 index ce8a2ca5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/api/tcpip.c +++ /dev/null @@ -1,198 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/opt.h" - -#include "lwip/sys.h" - -#include "lwip/memp.h" -#include "lwip/pbuf.h" - -#include "lwip/ip.h" -#include "lwip/ip_frag.h" -#include "lwip/udp.h" -#include "lwip/tcp.h" - -#include "lwip/tcpip.h" - -static void (* tcpip_init_done)(void *arg) = NULL; -static void *tcpip_init_done_arg; -static sys_mbox_t mbox; - -#if LWIP_TCP -static int tcpip_tcp_timer_active = 0; - -static void -tcpip_tcp_timer(void *arg) -{ - (void)arg; - - /* call TCP timer handler */ - tcp_tmr(); - /* timer still needed? */ - if (tcp_active_pcbs || tcp_tw_pcbs) { - /* restart timer */ - sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); - } else { - /* disable timer */ - tcpip_tcp_timer_active = 0; - } -} - -#if !NO_SYS -void -tcp_timer_needed(void) -{ - /* timer is off but needed again? */ - if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) { - /* enable and start timer */ - tcpip_tcp_timer_active = 1; - sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); - } -} -#endif /* !NO_SYS */ -#endif /* LWIP_TCP */ - -#if IP_REASSEMBLY -static void -ip_timer(void *data) -{ - LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip: ip_reass_tmr()\n")); - ip_reass_tmr(); - sys_timeout(1000, ip_timer, NULL); -} -#endif - -static void -tcpip_thread(void *arg) -{ - struct tcpip_msg *msg; - - (void)arg; - - ip_init(); -#if LWIP_UDP - udp_init(); -#endif -#if LWIP_TCP - tcp_init(); -#endif -#if IP_REASSEMBLY - sys_timeout(1000, ip_timer, NULL); -#endif - if (tcpip_init_done != NULL) { - tcpip_init_done(tcpip_init_done_arg); - } - - while (1) { /* MAIN Loop */ - sys_mbox_fetch(mbox, (void *)&msg); - switch (msg->type) { - case TCPIP_MSG_API: - LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: API message %p\n", (void *)msg)); - api_msg_input(msg->msg.apimsg); - break; - case TCPIP_MSG_INPUT: - LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: IP packet %p\n", (void *)msg)); - ip_input(msg->msg.inp.p, msg->msg.inp.netif); - break; - case TCPIP_MSG_CALLBACK: - LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK %p\n", (void *)msg)); - msg->msg.cb.f(msg->msg.cb.ctx); - break; - default: - break; - } - memp_free(MEMP_TCPIP_MSG, msg); - } -} - -err_t -tcpip_input(struct pbuf *p, struct netif *inp) -{ - struct tcpip_msg *msg; - - msg = memp_malloc(MEMP_TCPIP_MSG); - if (msg == NULL) { - pbuf_free(p); - return ERR_MEM; - } - - msg->type = TCPIP_MSG_INPUT; - msg->msg.inp.p = p; - msg->msg.inp.netif = inp; - sys_mbox_post(mbox, msg); - return ERR_OK; -} - -err_t -tcpip_callback(void (*f)(void *ctx), void *ctx) -{ - struct tcpip_msg *msg; - - msg = memp_malloc(MEMP_TCPIP_MSG); - if (msg == NULL) { - return ERR_MEM; - } - - msg->type = TCPIP_MSG_CALLBACK; - msg->msg.cb.f = f; - msg->msg.cb.ctx = ctx; - sys_mbox_post(mbox, msg); - return ERR_OK; -} - -void -tcpip_apimsg(struct api_msg *apimsg) -{ - struct tcpip_msg *msg; - msg = memp_malloc(MEMP_TCPIP_MSG); - if (msg == NULL) { - memp_free(MEMP_API_MSG, apimsg); - return; - } - msg->type = TCPIP_MSG_API; - msg->msg.apimsg = apimsg; - sys_mbox_post(mbox, msg); -} - -void -tcpip_init(void (* initfunc)(void *), void *arg) -{ - tcpip_init_done = initfunc; - tcpip_init_done_arg = arg; - mbox = sys_mbox_new(); - sys_thread_new(tcpip_thread, NULL, TCPIP_THREAD_PRIO); -} - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/dhcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/dhcp.c deleted file mode 100644 index b688afa1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/dhcp.c +++ /dev/null @@ -1,1455 +0,0 @@ -/** - * @file - * - * Dynamic Host Configuration Protocol client - */ - -/* - * - * Copyright (c) 2001-2004 Leon Woestenberg - * Copyright (c) 2001-2004 Axon Digital Design B.V., The Netherlands. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is a contribution to the lwIP TCP/IP stack. - * The Swedish Institute of Computer Science and Adam Dunkels - * are specifically granted permission to redistribute this - * source code. - * - * Author: Leon Woestenberg - * - * This is a DHCP client for the lwIP TCP/IP stack. It aims to conform - * with RFC 2131 and RFC 2132. - * - * TODO: - * - Proper parsing of DHCP messages exploiting file/sname field overloading. - * - Add JavaDoc style documentation (API, internals). - * - Support for interfaces other than Ethernet (SLIP, PPP, ...) - * - * Please coordinate changes and requests with Leon Woestenberg - * - * - * Integration with your code: - * - * In lwip/dhcp.h - * #define DHCP_COARSE_TIMER_SECS (recommended 60 which is a minute) - * #define DHCP_FINE_TIMER_MSECS (recommended 500 which equals TCP coarse timer) - * - * Then have your application call dhcp_coarse_tmr() and - * dhcp_fine_tmr() on the defined intervals. - * - * dhcp_start(struct netif *netif); - * starts a DHCP client instance which configures the interface by - * obtaining an IP address lease and maintaining it. - * - * Use dhcp_release(netif) to end the lease and use dhcp_stop(netif) - * to remove the DHCP client. - * - */ - -#include - -#include "lwip/stats.h" -#include "lwip/mem.h" -#include "lwip/udp.h" -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/inet.h" -#include "netif/etharp.h" - -#include "lwip/sys.h" -#include "lwip/opt.h" -#include "lwip/dhcp.h" - -#if LWIP_DHCP /* don't build if not configured for use in lwipopt.h */ - -/** global transaction identifier, must be - * unique for each DHCP request. We simply increment, starting - * with this value (easy to match with a packet analyzer) */ -static u32_t xid = 0xABCD0000; - -/** DHCP client state machine functions */ -static void dhcp_handle_ack(struct netif *netif); -static void dhcp_handle_nak(struct netif *netif); -static void dhcp_handle_offer(struct netif *netif); - -static err_t dhcp_discover(struct netif *netif); -static err_t dhcp_select(struct netif *netif); -static void dhcp_check(struct netif *netif); -static void dhcp_bind(struct netif *netif); -static err_t dhcp_decline(struct netif *netif); -static err_t dhcp_rebind(struct netif *netif); -static void dhcp_set_state(struct dhcp *dhcp, u8_t new_state); - -/** receive, unfold, parse and free incoming messages */ -static void dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port); -static err_t dhcp_unfold_reply(struct dhcp *dhcp); -static u8_t *dhcp_get_option_ptr(struct dhcp *dhcp, u8_t option_type); -static u8_t dhcp_get_option_byte(u8_t *ptr); -static u16_t dhcp_get_option_short(u8_t *ptr); -static u32_t dhcp_get_option_long(u8_t *ptr); -static void dhcp_free_reply(struct dhcp *dhcp); - -/** set the DHCP timers */ -static void dhcp_timeout(struct netif *netif); -static void dhcp_t1_timeout(struct netif *netif); -static void dhcp_t2_timeout(struct netif *netif); - -/** build outgoing messages */ -/** create a DHCP request, fill in common headers */ -static err_t dhcp_create_request(struct netif *netif); -/** free a DHCP request */ -static void dhcp_delete_request(struct netif *netif); -/** add a DHCP option (type, then length in bytes) */ -static void dhcp_option(struct dhcp *dhcp, u8_t option_type, u8_t option_len); -/** add option values */ -static void dhcp_option_byte(struct dhcp *dhcp, u8_t value); -static void dhcp_option_short(struct dhcp *dhcp, u16_t value); -static void dhcp_option_long(struct dhcp *dhcp, u32_t value); -/** always add the DHCP options trailer to end and pad */ -static void dhcp_option_trailer(struct dhcp *dhcp); - -/** - * Back-off the DHCP client (because of a received NAK response). - * - * Back-off the DHCP client because of a received NAK. Receiving a - * NAK means the client asked for something non-sensible, for - * example when it tries to renew a lease obtained on another network. - * - * We back-off and will end up restarting a fresh DHCP negotiation later. - * - * @param state pointer to DHCP state structure - */ -static void dhcp_handle_nak(struct netif *netif) { - struct dhcp *dhcp = netif->dhcp; - u16_t msecs = 10 * 1000; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_handle_nak(netif=%p) %c%c%"U16_F"\n", - (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_handle_nak(): set request timeout %"U16_F" msecs\n", msecs)); - dhcp_set_state(dhcp, DHCP_BACKING_OFF); -} - -/** - * Checks if the offered IP address is already in use. - * - * It does so by sending an ARP request for the offered address and - * entering CHECKING state. If no ARP reply is received within a small - * interval, the address is assumed to be free for use by us. - */ -static void dhcp_check(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result; - u16_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_check(netif=%p) %c%c\n", (void *)netif, (s16_t)netif->name[0], - (s16_t)netif->name[1])); - /* create an ARP query for the offered IP address, expecting that no host - responds, as the IP address should not be in use. */ - result = etharp_query(netif, &dhcp->offered_ip_addr, NULL); - if (result != ERR_OK) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_check: could not perform ARP query\n")); - } - dhcp->tries++; - msecs = 500; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_check(): set request timeout %"U16_F" msecs\n", msecs)); - dhcp_set_state(dhcp, DHCP_CHECKING); -} - -/** - * Remember the configuration offered by a DHCP server. - * - * @param state pointer to DHCP state structure - */ -static void dhcp_handle_offer(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - /* obtain the server address */ - u8_t *option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_SERVER_ID); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_handle_offer(netif=%p) %c%c%"U16_F"\n", - (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); - if (option_ptr != NULL) - { - dhcp->server_ip_addr.addr = htonl(dhcp_get_option_long(&option_ptr[2])); - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_handle_offer(): server 0x%08"X32_F"\n", dhcp->server_ip_addr.addr)); - /* remember offered address */ - ip_addr_set(&dhcp->offered_ip_addr, (struct ip_addr *)&dhcp->msg_in->yiaddr); - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_handle_offer(): offer for 0x%08"X32_F"\n", dhcp->offered_ip_addr.addr)); - - dhcp_select(netif); - } -} - -/** - * Select a DHCP server offer out of all offers. - * - * Simply select the first offer received. - * - * @param netif the netif under DHCP control - * @return lwIP specific error (see error.h) - */ -static err_t dhcp_select(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result; - u32_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_select(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); - - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) - { - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_REQUEST); - - dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); - dhcp_option_short(dhcp, 576); - - /* MUST request the offered IP address */ - dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); - dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); - - dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); - dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); - - dhcp_option(dhcp, DHCP_OPTION_PARAMETER_REQUEST_LIST, 4/*num options*/); - dhcp_option_byte(dhcp, DHCP_OPTION_SUBNET_MASK); - dhcp_option_byte(dhcp, DHCP_OPTION_ROUTER); - dhcp_option_byte(dhcp, DHCP_OPTION_BROADCAST); - dhcp_option_byte(dhcp, DHCP_OPTION_DNS_SERVER); - - dhcp_option_trailer(dhcp); - /* shrink the pbuf to the actual content length */ - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - /* TODO: we really should bind to a specific local interface here - but we cannot specify an unconfigured netif as it is addressless */ - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - /* send broadcast to any DHCP server */ - udp_connect(dhcp->pcb, IP_ADDR_BROADCAST, DHCP_SERVER_PORT); - udp_send(dhcp->pcb, dhcp->p_out); - /* reconnect to any (or to server here?!) */ - udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); - dhcp_delete_request(netif); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_select: REQUESTING\n")); - dhcp_set_state(dhcp, DHCP_REQUESTING); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_select: could not allocate DHCP request\n")); - } - dhcp->tries++; - msecs = dhcp->tries < 4 ? dhcp->tries * 1000 : 4 * 1000; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_select(): set request timeout %"U32_F" msecs\n", msecs)); - return result; -} - -/** - * The DHCP timer that checks for lease renewal/rebind timeouts. - * - */ -void dhcp_coarse_tmr() -{ - struct netif *netif = netif_list; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_coarse_tmr()\n")); - /* iterate through all network interfaces */ - while (netif != NULL) { - /* only act on DHCP configured interfaces */ - if (netif->dhcp != NULL) { - /* timer is active (non zero), and triggers (zeroes) now? */ - if (netif->dhcp->t2_timeout-- == 1) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_coarse_tmr(): t2 timeout\n")); - /* this clients' rebind timeout triggered */ - dhcp_t2_timeout(netif); - /* timer is active (non zero), and triggers (zeroes) now */ - } else if (netif->dhcp->t1_timeout-- == 1) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_coarse_tmr(): t1 timeout\n")); - /* this clients' renewal timeout triggered */ - dhcp_t1_timeout(netif); - } - } - /* proceed to next netif */ - netif = netif->next; - } -} - -/** - * DHCP transaction timeout handling - * - * A DHCP server is expected to respond within a short period of time. - * This timer checks whether an outstanding DHCP request is timed out. - * - */ -void dhcp_fine_tmr() -{ - struct netif *netif = netif_list; - /* loop through netif's */ - while (netif != NULL) { - /* only act on DHCP configured interfaces */ - if (netif->dhcp != NULL) { - /* timer is active (non zero), and is about to trigger now */ - if (netif->dhcp->request_timeout-- == 1) { - /* { netif->dhcp->request_timeout == 0 } */ - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_fine_tmr(): request timeout\n")); - /* this clients' request timeout triggered */ - dhcp_timeout(netif); - } - } - /* proceed to next network interface */ - netif = netif->next; - } -} - -/** - * A DHCP negotiation transaction, or ARP request, has timed out. - * - * The timer that was started with the DHCP or ARP request has - * timed out, indicating no response was received in time. - * - * @param netif the netif under DHCP control - * - */ -static void dhcp_timeout(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_timeout()\n")); - /* back-off period has passed, or server selection timed out */ - if ((dhcp->state == DHCP_BACKING_OFF) || (dhcp->state == DHCP_SELECTING)) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_timeout(): restarting discovery\n")); - dhcp_discover(netif); - /* receiving the requested lease timed out */ - } else if (dhcp->state == DHCP_REQUESTING) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_timeout(): REQUESTING, DHCP request timed out\n")); - if (dhcp->tries <= 5) { - dhcp_select(netif); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_timeout(): REQUESTING, releasing, restarting\n")); - dhcp_release(netif); - dhcp_discover(netif); - } - /* received no ARP reply for the offered address (which is good) */ - } else if (dhcp->state == DHCP_CHECKING) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_timeout(): CHECKING, ARP request timed out\n")); - if (dhcp->tries <= 1) { - dhcp_check(netif); - /* no ARP replies on the offered address, - looks like the IP address is indeed free */ - } else { - /* bind the interface to the offered address */ - dhcp_bind(netif); - } - } - /* did not get response to renew request? */ - else if (dhcp->state == DHCP_RENEWING) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_timeout(): RENEWING, DHCP request timed out\n")); - /* just retry renewal */ - /* note that the rebind timer will eventually time-out if renew does not work */ - dhcp_renew(netif); - /* did not get response to rebind request? */ - } else if (dhcp->state == DHCP_REBINDING) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_timeout(): REBINDING, DHCP request timed out\n")); - if (dhcp->tries <= 8) { - dhcp_rebind(netif); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_timeout(): RELEASING, DISCOVERING\n")); - dhcp_release(netif); - dhcp_discover(netif); - } - } -} - -/** - * The renewal period has timed out. - * - * @param netif the netif under DHCP control - */ -static void dhcp_t1_timeout(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_t1_timeout()\n")); - if ((dhcp->state == DHCP_REQUESTING) || (dhcp->state == DHCP_BOUND) || (dhcp->state == DHCP_RENEWING)) { - /* just retry to renew - note that the rebind timer (t2) will - * eventually time-out if renew tries fail. */ - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_t1_timeout(): must renew\n")); - dhcp_renew(netif); - } -} - -/** - * The rebind period has timed out. - * - */ -static void dhcp_t2_timeout(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_t2_timeout()\n")); - if ((dhcp->state == DHCP_REQUESTING) || (dhcp->state == DHCP_BOUND) || (dhcp->state == DHCP_RENEWING)) { - /* just retry to rebind */ - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_t2_timeout(): must rebind\n")); - dhcp_rebind(netif); - } -} - -/** - * - * @param netif the netif under DHCP control - */ -static void dhcp_handle_ack(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - u8_t *option_ptr; - /* clear options we might not get from the ACK */ - dhcp->offered_sn_mask.addr = 0; - dhcp->offered_gw_addr.addr = 0; - dhcp->offered_bc_addr.addr = 0; - - /* lease time given? */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_LEASE_TIME); - if (option_ptr != NULL) { - /* remember offered lease time */ - dhcp->offered_t0_lease = dhcp_get_option_long(option_ptr + 2); - } - /* renewal period given? */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_T1); - if (option_ptr != NULL) { - /* remember given renewal period */ - dhcp->offered_t1_renew = dhcp_get_option_long(option_ptr + 2); - } else { - /* calculate safe periods for renewal */ - dhcp->offered_t1_renew = dhcp->offered_t0_lease / 2; - } - - /* renewal period given? */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_T2); - if (option_ptr != NULL) { - /* remember given rebind period */ - dhcp->offered_t2_rebind = dhcp_get_option_long(option_ptr + 2); - } else { - /* calculate safe periods for rebinding */ - dhcp->offered_t2_rebind = dhcp->offered_t0_lease; - } - - /* (y)our internet address */ - ip_addr_set(&dhcp->offered_ip_addr, &dhcp->msg_in->yiaddr); - -/** - * Patch #1308 - * TODO: we must check if the file field is not overloaded by DHCP options! - */ -#if 0 - /* boot server address */ - ip_addr_set(&dhcp->offered_si_addr, &dhcp->msg_in->siaddr); - /* boot file name */ - if (dhcp->msg_in->file[0]) { - dhcp->boot_file_name = mem_malloc(strlen(dhcp->msg_in->file) + 1); - strcpy(dhcp->boot_file_name, dhcp->msg_in->file); - } -#endif - - /* subnet mask */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_SUBNET_MASK); - /* subnet mask given? */ - if (option_ptr != NULL) { - dhcp->offered_sn_mask.addr = htonl(dhcp_get_option_long(&option_ptr[2])); - } - - /* gateway router */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_ROUTER); - if (option_ptr != NULL) { - dhcp->offered_gw_addr.addr = htonl(dhcp_get_option_long(&option_ptr[2])); - } - - /* broadcast address */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_BROADCAST); - if (option_ptr != NULL) { - dhcp->offered_bc_addr.addr = htonl(dhcp_get_option_long(&option_ptr[2])); - } - - /* DNS servers */ - option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_DNS_SERVER); - if (option_ptr != NULL) { - u8_t n; - dhcp->dns_count = dhcp_get_option_byte(&option_ptr[1]); - /* limit to at most DHCP_MAX_DNS DNS servers */ - if (dhcp->dns_count > DHCP_MAX_DNS) dhcp->dns_count = DHCP_MAX_DNS; - for (n = 0; n < dhcp->dns_count; n++) - { - dhcp->offered_dns_addr[n].addr = htonl(dhcp_get_option_long(&option_ptr[2+(n<<2)])); - } - } -} - -/** - * Start DHCP negotiation for a network interface. - * - * If no DHCP client instance was attached to this interface, - * a new client is created first. If a DHCP client instance - * was already present, it restarts negotiation. - * - * @param netif The lwIP network interface - * @return lwIP error code - * - ERR_OK - No error - * - ERR_MEM - Out of memory - * - */ -err_t dhcp_start(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result = ERR_OK; - - LWIP_ASSERT("netif != NULL", netif != NULL); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_start(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); - netif->flags &= ~NETIF_FLAG_DHCP; - - /* no DHCP client attached yet? */ - if (dhcp == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_start(): starting new DHCP client\n")); - dhcp = mem_malloc(sizeof(struct dhcp)); - if (dhcp == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_start(): could not allocate dhcp\n")); - return ERR_MEM; - } - /* store this dhcp client in the netif */ - netif->dhcp = dhcp; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_start(): allocated dhcp")); - /* already has DHCP client attached */ - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE | 3, ("dhcp_start(): restarting DHCP configuration\n")); - } - - /* clear data structure */ - memset(dhcp, 0, sizeof(struct dhcp)); - /* allocate UDP PCB */ - dhcp->pcb = udp_new(); - if (dhcp->pcb == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_start(): could not obtain pcb\n")); - mem_free((void *)dhcp); - netif->dhcp = dhcp = NULL; - return ERR_MEM; - } - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_start(): starting DHCP configuration\n")); - /* (re)start the DHCP negotiation */ - result = dhcp_discover(netif); - if (result != ERR_OK) { - /* free resources allocated above */ - dhcp_stop(netif); - return ERR_MEM; - } - netif->flags |= NETIF_FLAG_DHCP; - return result; -} - -/** - * Inform a DHCP server of our manual configuration. - * - * This informs DHCP servers of our fixed IP address configuration - * by sending an INFORM message. It does not involve DHCP address - * configuration, it is just here to be nice to the network. - * - * @param netif The lwIP network interface - * - */ -void dhcp_inform(struct netif *netif) -{ - struct dhcp *dhcp; - err_t result = ERR_OK; - dhcp = mem_malloc(sizeof(struct dhcp)); - if (dhcp == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_inform(): could not allocate dhcp\n")); - return; - } - netif->dhcp = dhcp; - memset(dhcp, 0, sizeof(struct dhcp)); - - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_inform(): allocated dhcp\n")); - dhcp->pcb = udp_new(); - if (dhcp->pcb == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_inform(): could not obtain pcb")); - mem_free((void *)dhcp); - return; - } - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_inform(): created new udp pcb\n")); - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) { - - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_INFORM); - - dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); - /* TODO: use netif->mtu ?! */ - dhcp_option_short(dhcp, 576); - - dhcp_option_trailer(dhcp); - - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - udp_connect(dhcp->pcb, IP_ADDR_BROADCAST, DHCP_SERVER_PORT); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_inform: INFORMING\n")); - udp_send(dhcp->pcb, dhcp->p_out); - udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); - dhcp_delete_request(netif); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_inform: could not allocate DHCP request\n")); - } - - if (dhcp != NULL) - { - if (dhcp->pcb != NULL) udp_remove(dhcp->pcb); - dhcp->pcb = NULL; - mem_free((void *)dhcp); - netif->dhcp = NULL; - } -} - -#if DHCP_DOES_ARP_CHECK -/** - * Match an ARP reply with the offered IP address. - * - * @param addr The IP address we received a reply from - * - */ -void dhcp_arp_reply(struct netif *netif, struct ip_addr *addr) -{ - LWIP_ASSERT("netif != NULL", netif != NULL); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_arp_reply()\n")); - /* is a DHCP client doing an ARP check? */ - if ((netif->dhcp != NULL) && (netif->dhcp->state == DHCP_CHECKING)) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_arp_reply(): CHECKING, arp reply for 0x%08"X32_F"\n", addr->addr)); - /* did a host respond with the address we - were offered by the DHCP server? */ - if (ip_addr_cmp(addr, &netif->dhcp->offered_ip_addr)) { - /* we will not accept the offered address */ - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE | 1, ("dhcp_arp_reply(): arp reply matched with offered address, declining\n")); - dhcp_decline(netif); - } - } -} - -/** - * Decline an offered lease. - * - * Tell the DHCP server we do not accept the offered address. - * One reason to decline the lease is when we find out the address - * is already in use by another host (through ARP). - */ -static err_t dhcp_decline(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result = ERR_OK; - u16_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_decline()\n")); - dhcp_set_state(dhcp, DHCP_BACKING_OFF); - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) - { - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_DECLINE); - - dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); - dhcp_option_short(dhcp, 576); - - dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); - dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); - - dhcp_option_trailer(dhcp); - /* resize pbuf to reflect true size of options */ - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - /* @todo: should we really connect here? we are performing sendto() */ - udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); - /* per section 4.4.4, broadcast DECLINE messages */ - udp_sendto(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT); - dhcp_delete_request(netif); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_decline: BACKING OFF\n")); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_decline: could not allocate DHCP request\n")); - } - dhcp->tries++; - msecs = 10*1000; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_decline(): set request timeout %"U16_F" msecs\n", msecs)); - return result; -} -#endif - - -/** - * Start the DHCP process, discover a DHCP server. - * - */ -static err_t dhcp_discover(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result = ERR_OK; - u16_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_discover()\n")); - ip_addr_set(&dhcp->offered_ip_addr, IP_ADDR_ANY); - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) - { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_discover: making request\n")); - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_DISCOVER); - - dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); - dhcp_option_short(dhcp, 576); - - dhcp_option(dhcp, DHCP_OPTION_PARAMETER_REQUEST_LIST, 4/*num options*/); - dhcp_option_byte(dhcp, DHCP_OPTION_SUBNET_MASK); - dhcp_option_byte(dhcp, DHCP_OPTION_ROUTER); - dhcp_option_byte(dhcp, DHCP_OPTION_BROADCAST); - dhcp_option_byte(dhcp, DHCP_OPTION_DNS_SERVER); - - dhcp_option_trailer(dhcp); - - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_discover: realloc()ing\n")); - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - /* set receive callback function with netif as user data */ - udp_recv(dhcp->pcb, dhcp_recv, netif); - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_discover: sendto(DISCOVER, IP_ADDR_BROADCAST, DHCP_SERVER_PORT)\n")); - udp_sendto(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_discover: deleting()ing\n")); - dhcp_delete_request(netif); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_discover: SELECTING\n")); - dhcp_set_state(dhcp, DHCP_SELECTING); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_discover: could not allocate DHCP request\n")); - } - dhcp->tries++; - msecs = dhcp->tries < 4 ? (dhcp->tries + 1) * 1000 : 10 * 1000; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_discover(): set request timeout %"U16_F" msecs\n", msecs)); - return result; -} - - -/** - * Bind the interface to the offered IP address. - * - * @param netif network interface to bind to the offered address - */ -static void dhcp_bind(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - struct ip_addr sn_mask, gw_addr; - LWIP_ASSERT("dhcp_bind: netif != NULL", netif != NULL); - LWIP_ASSERT("dhcp_bind: dhcp != NULL", dhcp != NULL); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_bind(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); - - /* temporary DHCP lease? */ - if (dhcp->offered_t1_renew != 0xffffffffUL) { - /* set renewal period timer */ - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew)); - dhcp->t1_timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; - if (dhcp->t1_timeout == 0) dhcp->t1_timeout = 1; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew*1000)); - } - /* set renewal period timer */ - if (dhcp->offered_t2_rebind != 0xffffffffUL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind)); - dhcp->t2_timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; - if (dhcp->t2_timeout == 0) dhcp->t2_timeout = 1; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind*1000)); - } - /* copy offered network mask */ - ip_addr_set(&sn_mask, &dhcp->offered_sn_mask); - - /* subnet mask not given? */ - /* TODO: this is not a valid check. what if the network mask is 0? */ - if (sn_mask.addr == 0) { - /* choose a safe subnet mask given the network class */ - u8_t first_octet = ip4_addr1(&sn_mask); - if (first_octet <= 127) sn_mask.addr = htonl(0xff000000); - else if (first_octet >= 192) sn_mask.addr = htonl(0xffffff00); - else sn_mask.addr = htonl(0xffff0000); - } - - ip_addr_set(&gw_addr, &dhcp->offered_gw_addr); - /* gateway address not given? */ - if (gw_addr.addr == 0) { - /* copy network address */ - gw_addr.addr = (dhcp->offered_ip_addr.addr & sn_mask.addr); - /* use first host address on network as gateway */ - gw_addr.addr |= htonl(0x00000001); - } - - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_bind(): IP: 0x%08"X32_F"\n", dhcp->offered_ip_addr.addr)); - netif_set_ipaddr(netif, &dhcp->offered_ip_addr); - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_bind(): SN: 0x%08"X32_F"\n", sn_mask.addr)); - netif_set_netmask(netif, &sn_mask); - LWIP_DEBUGF(DHCP_DEBUG | DBG_STATE, ("dhcp_bind(): GW: 0x%08"X32_F"\n", gw_addr.addr)); - netif_set_gw(netif, &gw_addr); - /* bring the interface up */ - netif_set_up(netif); - /* netif is now bound to DHCP leased address */ - dhcp_set_state(dhcp, DHCP_BOUND); -} - -/** - * Renew an existing DHCP lease at the involved DHCP server. - * - * @param netif network interface which must renew its lease - */ -err_t dhcp_renew(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result; - u16_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_renew()\n")); - dhcp_set_state(dhcp, DHCP_RENEWING); - - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) { - - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_REQUEST); - - dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); - /* TODO: use netif->mtu in some way */ - dhcp_option_short(dhcp, 576); - -#if 0 - dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); - dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); -#endif - -#if 0 - dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); - dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); -#endif - /* append DHCP message trailer */ - dhcp_option_trailer(dhcp); - - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - udp_connect(dhcp->pcb, &dhcp->server_ip_addr, DHCP_SERVER_PORT); - udp_send(dhcp->pcb, dhcp->p_out); - dhcp_delete_request(netif); - - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_renew: RENEWING\n")); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_renew: could not allocate DHCP request\n")); - } - dhcp->tries++; - /* back-off on retries, but to a maximum of 20 seconds */ - msecs = dhcp->tries < 10 ? dhcp->tries * 2000 : 20 * 1000; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_renew(): set request timeout %"U16_F" msecs\n", msecs)); - return result; -} - -/** - * Rebind with a DHCP server for an existing DHCP lease. - * - * @param netif network interface which must rebind with a DHCP server - */ -static err_t dhcp_rebind(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result; - u16_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_rebind()\n")); - dhcp_set_state(dhcp, DHCP_REBINDING); - - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) - { - - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_REQUEST); - - dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); - dhcp_option_short(dhcp, 576); - -#if 0 - dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); - dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); - - dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); - dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); -#endif - - dhcp_option_trailer(dhcp); - - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - /* set remote IP association to any DHCP server */ - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); - /* broadcast to server */ - udp_sendto(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT); - dhcp_delete_request(netif); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_rebind: REBINDING\n")); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_rebind: could not allocate DHCP request\n")); - } - dhcp->tries++; - msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_rebind(): set request timeout %"U16_F" msecs\n", msecs)); - return result; -} - -/** - * Release a DHCP lease. - * - * @param netif network interface which must release its lease - */ -err_t dhcp_release(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - err_t result; - u16_t msecs; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_release()\n")); - - /* idle DHCP client */ - dhcp_set_state(dhcp, DHCP_OFF); - /* clean old DHCP offer */ - dhcp->server_ip_addr.addr = 0; - dhcp->offered_ip_addr.addr = dhcp->offered_sn_mask.addr = 0; - dhcp->offered_gw_addr.addr = dhcp->offered_bc_addr.addr = 0; - dhcp->offered_t0_lease = dhcp->offered_t1_renew = dhcp->offered_t2_rebind = 0; - dhcp->dns_count = 0; - - /* create and initialize the DHCP message header */ - result = dhcp_create_request(netif); - if (result == ERR_OK) { - dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); - dhcp_option_byte(dhcp, DHCP_RELEASE); - - dhcp_option_trailer(dhcp); - - pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); - - udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); - udp_connect(dhcp->pcb, &dhcp->server_ip_addr, DHCP_SERVER_PORT); - udp_send(dhcp->pcb, dhcp->p_out); - dhcp_delete_request(netif); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_release: RELEASED, DHCP_OFF\n")); - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_release: could not allocate DHCP request\n")); - } - dhcp->tries++; - msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; - dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | DBG_STATE, ("dhcp_release(): set request timeout %"U16_F" msecs\n", msecs)); - /* bring the interface down */ - netif_set_down(netif); - /* remove IP address from interface */ - netif_set_ipaddr(netif, IP_ADDR_ANY); - netif_set_gw(netif, IP_ADDR_ANY); - netif_set_netmask(netif, IP_ADDR_ANY); - - /* TODO: netif_down(netif); */ - return result; -} -/** - * Remove the DHCP client from the interface. - * - * @param netif The network interface to stop DHCP on - */ -void dhcp_stop(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - LWIP_ASSERT("dhcp_stop: netif != NULL", netif != NULL); - - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_stop()\n")); - /* netif is DHCP configured? */ - if (dhcp != NULL) - { - if (dhcp->pcb != NULL) - { - udp_remove(dhcp->pcb); - dhcp->pcb = NULL; - } - if (dhcp->p != NULL) - { - pbuf_free(dhcp->p); - dhcp->p = NULL; - } - /* free unfolded reply */ - dhcp_free_reply(dhcp); - mem_free((void *)dhcp); - netif->dhcp = NULL; - } -} - -/* - * Set the DHCP state of a DHCP client. - * - * If the state changed, reset the number of tries. - * - * TODO: we might also want to reset the timeout here? - */ -static void dhcp_set_state(struct dhcp *dhcp, u8_t new_state) -{ - if (new_state != dhcp->state) - { - dhcp->state = new_state; - dhcp->tries = 0; - } -} - -/* - * Concatenate an option type and length field to the outgoing - * DHCP message. - * - */ -static void dhcp_option(struct dhcp *dhcp, u8_t option_type, u8_t option_len) -{ - LWIP_ASSERT("dhcp_option_short: dhcp->options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN); - dhcp->msg_out->options[dhcp->options_out_len++] = option_type; - dhcp->msg_out->options[dhcp->options_out_len++] = option_len; -} -/* - * Concatenate a single byte to the outgoing DHCP message. - * - */ -static void dhcp_option_byte(struct dhcp *dhcp, u8_t value) -{ - LWIP_ASSERT("dhcp_option_short: dhcp->options_out_len < DHCP_OPTIONS_LEN", dhcp->options_out_len < DHCP_OPTIONS_LEN); - dhcp->msg_out->options[dhcp->options_out_len++] = value; -} -static void dhcp_option_short(struct dhcp *dhcp, u16_t value) -{ - LWIP_ASSERT("dhcp_option_short: dhcp->options_out_len + 2 <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 2 <= DHCP_OPTIONS_LEN); - dhcp->msg_out->options[dhcp->options_out_len++] = (value & 0xff00U) >> 8; - dhcp->msg_out->options[dhcp->options_out_len++] = value & 0x00ffU; -} -static void dhcp_option_long(struct dhcp *dhcp, u32_t value) -{ - LWIP_ASSERT("dhcp_option_long: dhcp->options_out_len + 4 <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 4 <= DHCP_OPTIONS_LEN); - dhcp->msg_out->options[dhcp->options_out_len++] = (value & 0xff000000UL) >> 24; - dhcp->msg_out->options[dhcp->options_out_len++] = (value & 0x00ff0000UL) >> 16; - dhcp->msg_out->options[dhcp->options_out_len++] = (value & 0x0000ff00UL) >> 8; - dhcp->msg_out->options[dhcp->options_out_len++] = (value & 0x000000ffUL); -} - -/** - * Extract the DHCP message and the DHCP options. - * - * Extract the DHCP message and the DHCP options, each into a contiguous - * piece of memory. As a DHCP message is variable sized by its options, - * and also allows overriding some fields for options, the easy approach - * is to first unfold the options into a conitguous piece of memory, and - * use that further on. - * - */ -static err_t dhcp_unfold_reply(struct dhcp *dhcp) -{ - struct pbuf *p = dhcp->p; - u8_t *ptr; - u16_t i; - u16_t j = 0; - LWIP_ASSERT("dhcp->p != NULL", dhcp->p != NULL); - /* free any left-overs from previous unfolds */ - dhcp_free_reply(dhcp); - /* options present? */ - if (dhcp->p->tot_len > (sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN)) - { - dhcp->options_in_len = dhcp->p->tot_len - (sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN); - dhcp->options_in = mem_malloc(dhcp->options_in_len); - if (dhcp->options_in == NULL) - { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_unfold_reply(): could not allocate dhcp->options\n")); - return ERR_MEM; - } - } - dhcp->msg_in = mem_malloc(sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN); - if (dhcp->msg_in == NULL) - { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_unfold_reply(): could not allocate dhcp->msg_in\n")); - mem_free((void *)dhcp->options_in); - dhcp->options_in = NULL; - return ERR_MEM; - } - - ptr = (u8_t *)dhcp->msg_in; - /* proceed through struct dhcp_msg */ - for (i = 0; i < sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN; i++) - { - *ptr++ = ((u8_t *)p->payload)[j++]; - /* reached end of pbuf? */ - if (j == p->len) - { - /* proceed to next pbuf in chain */ - p = p->next; - j = 0; - } - } - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_unfold_reply(): copied %"U16_F" bytes into dhcp->msg_in[]\n", i)); - if (dhcp->options_in != NULL) { - ptr = (u8_t *)dhcp->options_in; - /* proceed through options */ - for (i = 0; i < dhcp->options_in_len; i++) { - *ptr++ = ((u8_t *)p->payload)[j++]; - /* reached end of pbuf? */ - if (j == p->len) { - /* proceed to next pbuf in chain */ - p = p->next; - j = 0; - } - } - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("dhcp_unfold_reply(): copied %"U16_F" bytes to dhcp->options_in[]\n", i)); - } - return ERR_OK; -} - -/** - * Free the incoming DHCP message including contiguous copy of - * its DHCP options. - * - */ -static void dhcp_free_reply(struct dhcp *dhcp) -{ - if (dhcp->msg_in != NULL) { - mem_free((void *)dhcp->msg_in); - dhcp->msg_in = NULL; - } - if (dhcp->options_in) { - mem_free((void *)dhcp->options_in); - dhcp->options_in = NULL; - dhcp->options_in_len = 0; - } - LWIP_DEBUGF(DHCP_DEBUG, ("dhcp_free_reply(): free'd\n")); -} - - -/** - * If an incoming DHCP message is in response to us, then trigger the state machine - */ -static void dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port) -{ - struct netif *netif = (struct netif *)arg; - struct dhcp *dhcp = netif->dhcp; - struct dhcp_msg *reply_msg = (struct dhcp_msg *)p->payload; - u8_t *options_ptr; - u8_t msg_type; - u8_t i; - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 3, ("dhcp_recv(pbuf = %p) from DHCP server %"U16_F".%"U16_F".%"U16_F".%"U16_F" port %"U16_F"\n", (void*)p, - (u16_t)(ntohl(addr->addr) >> 24 & 0xff), (u16_t)(ntohl(addr->addr) >> 16 & 0xff), - (u16_t)(ntohl(addr->addr) >> 8 & 0xff), (u16_t)(ntohl(addr->addr) & 0xff), port)); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("pbuf->len = %"U16_F"\n", p->len)); - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("pbuf->tot_len = %"U16_F"\n", p->tot_len)); - /* prevent warnings about unused arguments */ - (void)pcb; (void)addr; (void)port; - dhcp->p = p; - /* TODO: check packet length before reading them */ - if (reply_msg->op != DHCP_BOOTREPLY) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("not a DHCP reply message, but type %"U16_F"\n", (u16_t)reply_msg->op)); - pbuf_free(p); - dhcp->p = NULL; - return; - } - /* iterate through hardware address and match against DHCP message */ - for (i = 0; i < netif->hwaddr_len; i++) { - if (netif->hwaddr[i] != reply_msg->chaddr[i]) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("netif->hwaddr[%"U16_F"]==%02"X16_F" != reply_msg->chaddr[%"U16_F"]==%02"X16_F"\n", - (u16_t)i, (u16_t)netif->hwaddr[i], (u16_t)i, (u16_t)reply_msg->chaddr[i])); - pbuf_free(p); - dhcp->p = NULL; - return; - } - } - /* match transaction ID against what we expected */ - if (ntohl(reply_msg->xid) != dhcp->xid) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("transaction id mismatch\n")); - pbuf_free(p); - dhcp->p = NULL; - return; - } - /* option fields could be unfold? */ - if (dhcp_unfold_reply(dhcp) != ERR_OK) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("problem unfolding DHCP message - too short on memory?\n")); - pbuf_free(p); - dhcp->p = NULL; - return; - } - - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("searching DHCP_OPTION_MESSAGE_TYPE\n")); - /* obtain pointer to DHCP message type */ - options_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_MESSAGE_TYPE); - if (options_ptr == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("DHCP_OPTION_MESSAGE_TYPE option not found\n")); - pbuf_free(p); - dhcp->p = NULL; - return; - } - - /* read DHCP message type */ - msg_type = dhcp_get_option_byte(options_ptr + 2); - /* message type is DHCP ACK? */ - if (msg_type == DHCP_ACK) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("DHCP_ACK received\n")); - /* in requesting state? */ - if (dhcp->state == DHCP_REQUESTING) { - dhcp_handle_ack(netif); - dhcp->request_timeout = 0; -#if DHCP_DOES_ARP_CHECK - /* check if the acknowledged lease address is already in use */ - dhcp_check(netif); -#else - /* bind interface to the acknowledged lease address */ - dhcp_bind(netif); -#endif - } - /* already bound to the given lease address? */ - else if ((dhcp->state == DHCP_REBOOTING) || (dhcp->state == DHCP_REBINDING) || (dhcp->state == DHCP_RENEWING)) { - dhcp->request_timeout = 0; - dhcp_bind(netif); - } - } - /* received a DHCP_NAK in appropriate state? */ - else if ((msg_type == DHCP_NAK) && - ((dhcp->state == DHCP_REBOOTING) || (dhcp->state == DHCP_REQUESTING) || - (dhcp->state == DHCP_REBINDING) || (dhcp->state == DHCP_RENEWING ))) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("DHCP_NAK received\n")); - dhcp->request_timeout = 0; - dhcp_handle_nak(netif); - } - /* received a DHCP_OFFER in DHCP_SELECTING state? */ - else if ((msg_type == DHCP_OFFER) && (dhcp->state == DHCP_SELECTING)) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("DHCP_OFFER received in DHCP_SELECTING state\n")); - dhcp->request_timeout = 0; - /* remember offered lease */ - dhcp_handle_offer(netif); - } - pbuf_free(p); - dhcp->p = NULL; -} - - -static err_t dhcp_create_request(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - u16_t i; - LWIP_ASSERT("dhcp_create_request: dhcp->p_out == NULL", dhcp->p_out == NULL); - LWIP_ASSERT("dhcp_create_request: dhcp->msg_out == NULL", dhcp->msg_out == NULL); - dhcp->p_out = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcp_msg), PBUF_RAM); - if (dhcp->p_out == NULL) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("dhcp_create_request(): could not allocate pbuf\n")); - return ERR_MEM; - } - /* give unique transaction identifier to this request */ - dhcp->xid = xid++; - - dhcp->msg_out = (struct dhcp_msg *)dhcp->p_out->payload; - - dhcp->msg_out->op = DHCP_BOOTREQUEST; - /* TODO: make link layer independent */ - dhcp->msg_out->htype = DHCP_HTYPE_ETH; - /* TODO: make link layer independent */ - dhcp->msg_out->hlen = DHCP_HLEN_ETH; - dhcp->msg_out->hops = 0; - dhcp->msg_out->xid = htonl(dhcp->xid); - dhcp->msg_out->secs = 0; - dhcp->msg_out->flags = 0; - dhcp->msg_out->ciaddr.addr = netif->ip_addr.addr; - dhcp->msg_out->yiaddr.addr = 0; - dhcp->msg_out->siaddr.addr = 0; - dhcp->msg_out->giaddr.addr = 0; - for (i = 0; i < DHCP_CHADDR_LEN; i++) { - /* copy netif hardware address, pad with zeroes */ - dhcp->msg_out->chaddr[i] = (i < netif->hwaddr_len) ? netif->hwaddr[i] : 0/* pad byte*/; - } - for (i = 0; i < DHCP_SNAME_LEN; i++) dhcp->msg_out->sname[i] = 0; - for (i = 0; i < DHCP_FILE_LEN; i++) dhcp->msg_out->file[i] = 0; - dhcp->msg_out->cookie = htonl(0x63825363UL); - dhcp->options_out_len = 0; - /* fill options field with an incrementing array (for debugging purposes) */ - for (i = 0; i < DHCP_OPTIONS_LEN; i++) dhcp->msg_out->options[i] = i; - return ERR_OK; -} - -static void dhcp_delete_request(struct netif *netif) -{ - struct dhcp *dhcp = netif->dhcp; - LWIP_ASSERT("dhcp_free_msg: dhcp->p_out != NULL", dhcp->p_out != NULL); - LWIP_ASSERT("dhcp_free_msg: dhcp->msg_out != NULL", dhcp->msg_out != NULL); - pbuf_free(dhcp->p_out); - dhcp->p_out = NULL; - dhcp->msg_out = NULL; -} - -/** - * Add a DHCP message trailer - * - * Adds the END option to the DHCP message, and if - * necessary, up to three padding bytes. - */ - -static void dhcp_option_trailer(struct dhcp *dhcp) -{ - LWIP_ASSERT("dhcp_option_trailer: dhcp->msg_out != NULL\n", dhcp->msg_out != NULL); - LWIP_ASSERT("dhcp_option_trailer: dhcp->options_out_len < DHCP_OPTIONS_LEN\n", dhcp->options_out_len < DHCP_OPTIONS_LEN); - dhcp->msg_out->options[dhcp->options_out_len++] = DHCP_OPTION_END; - /* packet is too small, or not 4 byte aligned? */ - while ((dhcp->options_out_len < DHCP_MIN_OPTIONS_LEN) || (dhcp->options_out_len & 3)) { - /* LWIP_DEBUGF(DHCP_DEBUG,("dhcp_option_trailer:dhcp->options_out_len=%"U16_F", DHCP_OPTIONS_LEN=%"U16_F, dhcp->options_out_len, DHCP_OPTIONS_LEN)); */ - LWIP_ASSERT("dhcp_option_trailer: dhcp->options_out_len < DHCP_OPTIONS_LEN\n", dhcp->options_out_len < DHCP_OPTIONS_LEN); - /* add a fill/padding byte */ - dhcp->msg_out->options[dhcp->options_out_len++] = 0; - } -} - -/** - * Find the offset of a DHCP option inside the DHCP message. - * - * @param client DHCP client - * @param option_type - * - * @return a byte offset into the UDP message where the option was found, or - * zero if the given option was not found. - */ -static u8_t *dhcp_get_option_ptr(struct dhcp *dhcp, u8_t option_type) -{ - u8_t overload = DHCP_OVERLOAD_NONE; - - /* options available? */ - if ((dhcp->options_in != NULL) && (dhcp->options_in_len > 0)) { - /* start with options field */ - u8_t *options = (u8_t *)dhcp->options_in; - u16_t offset = 0; - /* at least 1 byte to read and no end marker, then at least 3 bytes to read? */ - while ((offset < dhcp->options_in_len) && (options[offset] != DHCP_OPTION_END)) { - /* LWIP_DEBUGF(DHCP_DEBUG, ("msg_offset=%"U16_F", q->len=%"U16_F, msg_offset, q->len)); */ - /* are the sname and/or file field overloaded with options? */ - if (options[offset] == DHCP_OPTION_OVERLOAD) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 2, ("overloaded message detected\n")); - /* skip option type and length */ - offset += 2; - overload = options[offset++]; - } - /* requested option found */ - else if (options[offset] == option_type) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("option found at offset %"U16_F" in options\n", offset)); - return &options[offset]; - /* skip option */ - } else { - LWIP_DEBUGF(DHCP_DEBUG, ("skipping option %"U16_F" in options\n", options[offset])); - /* skip option type */ - offset++; - /* skip option length, and then length bytes */ - offset += 1 + options[offset]; - } - } - /* is this an overloaded message? */ - if (overload != DHCP_OVERLOAD_NONE) { - u16_t field_len; - if (overload == DHCP_OVERLOAD_FILE) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("overloaded file field\n")); - options = (u8_t *)&dhcp->msg_in->file; - field_len = DHCP_FILE_LEN; - } else if (overload == DHCP_OVERLOAD_SNAME) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("overloaded sname field\n")); - options = (u8_t *)&dhcp->msg_in->sname; - field_len = DHCP_SNAME_LEN; - /* TODO: check if else if () is necessary */ - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE | 1, ("overloaded sname and file field\n")); - options = (u8_t *)&dhcp->msg_in->sname; - field_len = DHCP_FILE_LEN + DHCP_SNAME_LEN; - } - offset = 0; - - /* at least 1 byte to read and no end marker */ - while ((offset < field_len) && (options[offset] != DHCP_OPTION_END)) { - if (options[offset] == option_type) { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("option found at offset=%"U16_F"\n", offset)); - return &options[offset]; - /* skip option */ - } else { - LWIP_DEBUGF(DHCP_DEBUG | DBG_TRACE, ("skipping option %"U16_F"\n", options[offset])); - /* skip option type */ - offset++; - offset += 1 + options[offset]; - } - } - } - } - return 0; -} - -/** - * Return the byte of DHCP option data. - * - * @param client DHCP client. - * @param ptr pointer obtained by dhcp_get_option_ptr(). - * - * @return byte value at the given address. - */ -static u8_t dhcp_get_option_byte(u8_t *ptr) -{ - LWIP_DEBUGF(DHCP_DEBUG, ("option byte value=%"U16_F"\n", (u16_t)(*ptr))); - return *ptr; -} - -/** - * Return the 16-bit value of DHCP option data. - * - * @param client DHCP client. - * @param ptr pointer obtained by dhcp_get_option_ptr(). - * - * @return byte value at the given address. - */ -static u16_t dhcp_get_option_short(u8_t *ptr) -{ - u16_t value; - value = *ptr++ << 8; - value |= *ptr; - LWIP_DEBUGF(DHCP_DEBUG, ("option short value=%"U16_F"\n", value)); - return value; -} - -/** - * Return the 32-bit value of DHCP option data. - * - * @param client DHCP client. - * @param ptr pointer obtained by dhcp_get_option_ptr(). - * - * @return byte value at the given address. - */ -static u32_t dhcp_get_option_long(u8_t *ptr) -{ - u32_t value; - value = (u32_t)(*ptr++) << 24; - value |= (u32_t)(*ptr++) << 16; - value |= (u32_t)(*ptr++) << 8; - value |= (u32_t)(*ptr++); - LWIP_DEBUGF(DHCP_DEBUG, ("option long value=%"U32_F"\n", value)); - return value; -} - -#endif /* LWIP_DHCP */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/inet.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/inet.c deleted file mode 100644 index 556cbeb5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/inet.c +++ /dev/null @@ -1,525 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - - -/* inet.c - * - * Functions common to all TCP/IP modules, such as the Internet checksum and the - * byte order functions. - * - */ - - -#include "lwip/opt.h" - -#include "lwip/arch.h" - -#include "lwip/def.h" -#include "lwip/inet.h" - -#include "lwip/sys.h" - -/* This is a reference implementation of the checksum algorithm, with the - * aim of being simple, correct and fully portable. Checksumming is the - * first thing you would want to optimize for your platform. You will - * need to port it to your architecture and in your sys_arch.h: - * - * #define LWIP_CHKSUM -*/ -#ifndef LWIP_CHKSUM -#define LWIP_CHKSUM lwip_standard_chksum - -/** - * lwip checksum - * - * @param dataptr points to start of data to be summed at any boundary - * @param len length of data to be summed - * @return host order (!) lwip checksum (non-inverted Internet sum) - * - * @note accumulator size limits summable lenght to 64k - * @note host endianess is irrelevant (p3 RFC1071) - */ -static u16_t -lwip_standard_chksum(void *dataptr, u16_t len) -{ - u32_t acc; - u16_t src; - u8_t *octetptr; - - acc = 0; - /* dataptr may be at odd or even addresses */ - octetptr = (u8_t*)dataptr; - while (len > 1) - { - /* declare first octet as most significant - thus assume network order, ignoring host order */ - src = (*octetptr) << 8; - octetptr++; - /* declare second octet as least significant */ - src |= (*octetptr); - octetptr++; - acc += src; - len -= 2; - } - if (len > 0) - { - /* accumulate remaining octet */ - src = (*octetptr) << 8; - acc += src; - } - /* add deferred carry bits */ - acc = (acc >> 16) + (acc & 0x0000ffffUL); - if ((acc & 0xffff0000) != 0) { - acc = (acc >> 16) + (acc & 0x0000ffffUL); - } - /* This maybe a little confusing: reorder sum using htons() - instead of ntohs() since it has a little less call overhead. - The caller must invert bits for Internet sum ! */ - return htons((u16_t)acc); -} - -#endif - -#if 0 -/* - * Curt McDowell - * Broadcom Corp. - * csm@broadcom.com - * - * IP checksum two bytes at a time with support for - * unaligned buffer. - * Works for len up to and including 0x20000. - * by Curt McDowell, Broadcom Corp. 12/08/2005 - */ - -static u16_t -lwip_standard_chksum2(void *dataptr, int len) -{ - u8_t *pb = dataptr; - u16_t *ps, t = 0; - u32_t sum = 0; - int odd = ((u32_t)pb & 1); - - /* Get aligned to u16_t */ - if (odd && len > 0) { - ((u8_t *)&t)[1] = *pb++; - len--; - } - - /* Add the bulk of the data */ - ps = (u16_t *)pb; - while (len > 1) { - sum += *ps++; - len -= 2; - } - - /* Consume left-over byte, if any */ - if (len > 0) - ((u8_t *)&t)[0] = *(u8_t *)ps;; - - /* Add end bytes */ - sum += t; - - /* Fold 32-bit sum to 16 bits */ - while (sum >> 16) - sum = (sum & 0xffff) + (sum >> 16); - - /* Swap if alignment was odd */ - if (odd) - sum = ((sum & 0xff) << 8) | ((sum & 0xff00) >> 8); - - return sum; -} - -/** - * An optimized checksum routine. Basically, it uses loop-unrolling on - * the checksum loop, treating the head and tail bytes specially, whereas - * the inner loop acts on 8 bytes at a time. - * - * @arg start of buffer to be checksummed. May be an odd byte address. - * @len number of bytes in the buffer to be checksummed. - * - * @todo First argument type conflicts with generic checksum routine. - * - * by Curt McDowell, Broadcom Corp. December 8th, 2005 - */ - -static u16_t -lwip_standard_chksum4(u8_t *pb, int len) -{ - u16_t *ps, t = 0; - u32_t *pl; - u32_t sum = 0, tmp; - /* starts at odd byte address? */ - int odd = ((u32_t)pb & 1); - - if (odd && len > 0) { - ((u8_t *)&t)[1] = *pb++; - len--; - } - - ps = (u16_t *)pb; - - if (((u32_t)ps & 3) && len > 1) { - sum += *ps++; - len -= 2; - } - - pl = (u32_t *)ps; - - while (len > 7) { - tmp = sum + *pl++; /* ping */ - if (tmp < sum) - tmp++; /* add back carry */ - - sum = tmp + *pl++; /* pong */ - if (sum < tmp) - sum++; /* add back carry */ - - len -= 8; - } - - /* make room in upper bits */ - sum = (sum >> 16) + (sum & 0xffff); - - ps = (u16_t *)pl; - - /* 16-bit aligned word remaining? */ - while (len > 1) { - sum += *ps++; - len -= 2; - } - - /* dangling tail byte remaining? */ - if (len > 0) /* include odd byte */ - ((u8_t *)&t)[0] = *(u8_t *)ps; - - sum += t; /* add end bytes */ - - while (sum >> 16) /* combine halves */ - sum = (sum >> 16) + (sum & 0xffff); - - if (odd) - sum = ((sum & 0xff) << 8) | ((sum & 0xff00) >> 8); - - return sum; -} -#endif - -/* inet_chksum_pseudo: - * - * Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain. - */ - -u16_t -inet_chksum_pseudo(struct pbuf *p, - struct ip_addr *src, struct ip_addr *dest, - u8_t proto, u16_t proto_len) -{ - u32_t acc; - struct pbuf *q; - u8_t swapped; - - acc = 0; - swapped = 0; - /* iterate through all pbuf in chain */ - for(q = p; q != NULL; q = q->next) { - LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): checksumming pbuf %p (has next %p) \n", - (void *)q, (void *)q->next)); - acc += LWIP_CHKSUM(q->payload, q->len); - /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): unwrapped lwip_chksum()=%"X32_F" \n", acc));*/ - while (acc >> 16) { - acc = (acc & 0xffffUL) + (acc >> 16); - } - if (q->len % 2 != 0) { - swapped = 1 - swapped; - acc = ((acc & 0xff) << 8) | ((acc & 0xff00UL) >> 8); - } - /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): wrapped lwip_chksum()=%"X32_F" \n", acc));*/ - } - - if (swapped) { - acc = ((acc & 0xff) << 8) | ((acc & 0xff00UL) >> 8); - } - acc += (src->addr & 0xffffUL); - acc += ((src->addr >> 16) & 0xffffUL); - acc += (dest->addr & 0xffffUL); - acc += ((dest->addr >> 16) & 0xffffUL); - acc += (u32_t)htons((u16_t)proto); - acc += (u32_t)htons(proto_len); - - while (acc >> 16) { - acc = (acc & 0xffffUL) + (acc >> 16); - } - LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): pbuf chain lwip_chksum()=%"X32_F"\n", acc)); - return (u16_t)~(acc & 0xffffUL); -} - -/* inet_chksum: - * - * Calculates the Internet checksum over a portion of memory. Used primarely for IP - * and ICMP. - */ - -u16_t -inet_chksum(void *dataptr, u16_t len) -{ - u32_t acc; - - acc = LWIP_CHKSUM(dataptr, len); - while (acc >> 16) { - acc = (acc & 0xffff) + (acc >> 16); - } - return (u16_t)~(acc & 0xffff); -} - -u16_t -inet_chksum_pbuf(struct pbuf *p) -{ - u32_t acc; - struct pbuf *q; - u8_t swapped; - - acc = 0; - swapped = 0; - for(q = p; q != NULL; q = q->next) { - acc += LWIP_CHKSUM(q->payload, q->len); - while (acc >> 16) { - acc = (acc & 0xffffUL) + (acc >> 16); - } - if (q->len % 2 != 0) { - swapped = 1 - swapped; - acc = (acc & 0x00ffUL << 8) | (acc & 0xff00UL >> 8); - } - } - - if (swapped) { - acc = ((acc & 0x00ffUL) << 8) | ((acc & 0xff00UL) >> 8); - } - return (u16_t)~(acc & 0xffffUL); -} - -/* Here for now until needed in other places in lwIP */ -#ifndef isascii -#define in_range(c, lo, up) ((u8_t)c >= lo && (u8_t)c <= up) -#define isascii(c) in_range(c, 0x20, 0x7f) -#define isdigit(c) in_range(c, '0', '9') -#define isxdigit(c) (isdigit(c) || in_range(c, 'a', 'f') || in_range(c, 'A', 'F')) -#define islower(c) in_range(c, 'a', 'z') -#define isspace(c) (c == ' ' || c == '\f' || c == '\n' || c == '\r' || c == '\t' || c == '\v') -#endif - - - /* - * Ascii internet address interpretation routine. - * The value returned is in network order. - */ - - /* */ - /* inet_addr */ - u32_t inet_addr(const char *cp) - { - struct in_addr val; - - if (inet_aton(cp, &val)) { - return (val.s_addr); - } - return (INADDR_NONE); - } - - /* - * Check whether "cp" is a valid ascii representation - * of an Internet address and convert to a binary address. - * Returns 1 if the address is valid, 0 if not. - * This replaces inet_addr, the return value from which - * cannot distinguish between failure and a local broadcast address. - */ - /* */ - /* inet_aton */ - s8_t - inet_aton(const char *cp, struct in_addr *addr) - { - u32_t val; - s32_t base, n; - char c; - u32_t parts[4]; - u32_t* pp = parts; - - c = *cp; - for (;;) { - /* - * Collect number up to ``.''. - * Values are specified as for C: - * 0x=hex, 0=octal, isdigit=decimal. - */ - if (!isdigit(c)) - return (0); - val = 0; base = 10; - if (c == '0') { - c = *++cp; - if (c == 'x' || c == 'X') - base = 16, c = *++cp; - else - base = 8; - } - for (;;) { - if (isdigit(c)) { - val = (val * base) + (s16_t)(c - '0'); - c = *++cp; - } else if (base == 16 && isxdigit(c)) { - val = (val << 4) | - (s16_t)(c + 10 - (islower(c) ? 'a' : 'A')); - c = *++cp; - } else - break; - } - if (c == '.') { - /* - * Internet format: - * a.b.c.d - * a.b.c (with c treated as 16 bits) - * a.b (with b treated as 24 bits) - */ - if (pp >= parts + 3) - return (0); - *pp++ = val; - c = *++cp; - } else - break; - } - /* - * Check for trailing characters. - */ - if (c != '\0' && (!isascii(c) || !isspace(c))) - return (0); - /* - * Concoct the address according to - * the number of parts specified. - */ - n = pp - parts + 1; - switch (n) { - - case 0: - return (0); /* initial nondigit */ - - case 1: /* a -- 32 bits */ - break; - - case 2: /* a.b -- 8.24 bits */ - if (val > 0xffffff) - return (0); - val |= parts[0] << 24; - break; - - case 3: /* a.b.c -- 8.8.16 bits */ - if (val > 0xffff) - return (0); - val |= (parts[0] << 24) | (parts[1] << 16); - break; - - case 4: /* a.b.c.d -- 8.8.8.8 bits */ - if (val > 0xff) - return (0); - val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8); - break; - } - if (addr) - addr->s_addr = htonl(val); - return (1); - } - -/* Convert numeric IP address into decimal dotted ASCII representation. - * returns ptr to static buffer; not reentrant! - */ -char *inet_ntoa(struct in_addr addr) -{ - static char str[16]; - u32_t s_addr = addr.s_addr; - char inv[3]; - char *rp; - u8_t *ap; - u8_t rem; - u8_t n; - u8_t i; - - rp = str; - ap = (u8_t *)&s_addr; - for(n = 0; n < 4; n++) { - i = 0; - do { - rem = *ap % (u8_t)10; - *ap /= (u8_t)10; - inv[i++] = '0' + rem; - } while(*ap); - while(i--) - *rp++ = inv[i]; - *rp++ = '.'; - ap++; - } - *--rp = 0; - return str; -} - - -#ifndef BYTE_ORDER -#error BYTE_ORDER is not defined -#endif -#if BYTE_ORDER == LITTLE_ENDIAN - -u16_t -htons(u16_t n) -{ - return ((n & 0xff) << 8) | ((n & 0xff00) >> 8); -} - -u16_t -ntohs(u16_t n) -{ - return htons(n); -} - -u32_t -htonl(u32_t n) -{ - return ((n & 0xff) << 24) | - ((n & 0xff00) << 8) | - ((n & 0xff0000) >> 8) | - ((n & 0xff000000) >> 24); -} - -u32_t -ntohl(u32_t n) -{ - return htonl(n); -} - -#endif /* BYTE_ORDER == LITTLE_ENDIAN */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/inet6.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/inet6.c deleted file mode 100644 index f34e2902..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/inet6.c +++ /dev/null @@ -1,167 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - - -/* inet6.c - * - * Functions common to all TCP/IP modules, such as the Internet checksum and the - * byte order functions. - * - */ - - -#include "lwip/opt.h" - -#include "lwip/def.h" -#include "lwip/inet.h" - - - -/* chksum: - * - * Sums up all 16 bit words in a memory portion. Also includes any odd byte. - * This function is used by the other checksum functions. - * - * For now, this is not optimized. Must be optimized for the particular processor - * arcitecture on which it is to run. Preferebly coded in assembler. - */ - -static u32_t -chksum(void *dataptr, u16_t len) -{ - u16_t *sdataptr = dataptr; - u32_t acc; - - - for(acc = 0; len > 1; len -= 2) { - acc += *sdataptr++; - } - - /* add up any odd byte */ - if (len == 1) { - acc += htons((u16_t)(*(u8_t *)dataptr) << 8); - } - - return acc; -} - -/* inet_chksum_pseudo: - * - * Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain. - */ - -u16_t -inet_chksum_pseudo(struct pbuf *p, - struct ip_addr *src, struct ip_addr *dest, - u8_t proto, u32_t proto_len) -{ - u32_t acc; - struct pbuf *q; - u8_t swapped, i; - - acc = 0; - swapped = 0; - for(q = p; q != NULL; q = q->next) { - acc += chksum(q->payload, q->len); - while (acc >> 16) { - acc = (acc & 0xffff) + (acc >> 16); - } - if (q->len % 2 != 0) { - swapped = 1 - swapped; - acc = ((acc & 0xff) << 8) | ((acc & 0xff00) >> 8); - } - } - - if (swapped) { - acc = ((acc & 0xff) << 8) | ((acc & 0xff00) >> 8); - } - - for(i = 0; i < 8; i++) { - acc += ((u16_t *)src->addr)[i] & 0xffff; - acc += ((u16_t *)dest->addr)[i] & 0xffff; - while (acc >> 16) { - acc = (acc & 0xffff) + (acc >> 16); - } - } - acc += (u16_t)htons((u16_t)proto); - acc += ((u16_t *)&proto_len)[0] & 0xffff; - acc += ((u16_t *)&proto_len)[1] & 0xffff; - - while (acc >> 16) { - acc = (acc & 0xffff) + (acc >> 16); - } - return ~(acc & 0xffff); -} - -/* inet_chksum: - * - * Calculates the Internet checksum over a portion of memory. Used primarely for IP - * and ICMP. - */ - -u16_t -inet_chksum(void *dataptr, u16_t len) -{ - u32_t acc, sum; - - acc = chksum(dataptr, len); - sum = (acc & 0xffff) + (acc >> 16); - sum += (sum >> 16); - return ~(sum & 0xffff); -} - -u16_t -inet_chksum_pbuf(struct pbuf *p) -{ - u32_t acc; - struct pbuf *q; - u8_t swapped; - - acc = 0; - swapped = 0; - for(q = p; q != NULL; q = q->next) { - acc += chksum(q->payload, q->len); - while (acc >> 16) { - acc = (acc & 0xffff) + (acc >> 16); - } - if (q->len % 2 != 0) { - swapped = 1 - swapped; - acc = (acc & 0xff << 8) | (acc & 0xff00 >> 8); - } - } - - if (swapped) { - acc = ((acc & 0xff) << 8) | ((acc & 0xff00) >> 8); - } - return ~(acc & 0xffff); -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv4/icmp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv4/icmp.c deleted file mode 100644 index db820148..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv4/icmp.c +++ /dev/null @@ -1,202 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -/* Some ICMP messages should be passed to the transport protocols. This - is not implemented. */ - -#include - -#include "lwip/opt.h" -#include "lwip/icmp.h" -#include "lwip/inet.h" -#include "lwip/ip.h" -#include "lwip/def.h" -#include "lwip/stats.h" -#include "lwip/snmp.h" - -void -icmp_input(struct pbuf *p, struct netif *inp) -{ - u8_t type; - u8_t code; - struct icmp_echo_hdr *iecho; - struct ip_hdr *iphdr; - struct ip_addr tmpaddr; - u16_t hlen; - - ICMP_STATS_INC(icmp.recv); - snmp_inc_icmpinmsgs(); - - - iphdr = p->payload; - hlen = IPH_HL(iphdr) * 4; - if (pbuf_header(p, -((s16_t)hlen)) || (p->tot_len < sizeof(u16_t)*2)) { - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len)); - pbuf_free(p); - ICMP_STATS_INC(icmp.lenerr); - snmp_inc_icmpinerrors(); - return; - } - - type = *((u8_t *)p->payload); - code = *(((u8_t *)p->payload)+1); - switch (type) { - case ICMP_ECHO: - /* broadcast or multicast destination address? */ - if (ip_addr_isbroadcast(&iphdr->dest, inp) || ip_addr_ismulticast(&iphdr->dest)) { - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast or broadcast pings\n")); - ICMP_STATS_INC(icmp.err); - pbuf_free(p); - return; - } - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n")); - if (p->tot_len < sizeof(struct icmp_echo_hdr)) { - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n")); - pbuf_free(p); - ICMP_STATS_INC(icmp.lenerr); - snmp_inc_icmpinerrors(); - - return; - } - iecho = p->payload; - if (inet_chksum_pbuf(p) != 0) { - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n")); - pbuf_free(p); - ICMP_STATS_INC(icmp.chkerr); - snmp_inc_icmpinerrors(); - return; - } - tmpaddr.addr = iphdr->src.addr; - iphdr->src.addr = iphdr->dest.addr; - iphdr->dest.addr = tmpaddr.addr; - ICMPH_TYPE_SET(iecho, ICMP_ER); - /* adjust the checksum */ - if (iecho->chksum >= htons(0xffff - (ICMP_ECHO << 8))) { - iecho->chksum += htons(ICMP_ECHO << 8) + 1; - } else { - iecho->chksum += htons(ICMP_ECHO << 8); - } - ICMP_STATS_INC(icmp.xmit); - /* increase number of messages attempted to send */ - snmp_inc_icmpoutmsgs(); - /* increase number of echo replies attempted to send */ - snmp_inc_icmpoutechoreps(); - - pbuf_header(p, hlen); - ip_output_if(p, &(iphdr->src), IP_HDRINCL, - IPH_TTL(iphdr), 0, IP_PROTO_ICMP, inp); - break; - default: - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n", (s16_t)type, (s16_t)code)); - ICMP_STATS_INC(icmp.proterr); - ICMP_STATS_INC(icmp.drop); - } - pbuf_free(p); -} - -void -icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t) -{ - struct pbuf *q; - struct ip_hdr *iphdr; - struct icmp_dur_hdr *idur; - - q = pbuf_alloc(PBUF_IP, 8 + IP_HLEN + 8, PBUF_RAM); - /* ICMP header + IP header + 8 bytes of data */ - - iphdr = p->payload; - - idur = q->payload; - ICMPH_TYPE_SET(idur, ICMP_DUR); - ICMPH_CODE_SET(idur, t); - - memcpy((u8_t *)q->payload + 8, p->payload, IP_HLEN + 8); - - /* calculate checksum */ - idur->chksum = 0; - idur->chksum = inet_chksum(idur, q->len); - ICMP_STATS_INC(icmp.xmit); - /* increase number of messages attempted to send */ - snmp_inc_icmpoutmsgs(); - /* increase number of destination unreachable messages attempted to send */ - snmp_inc_icmpoutdestunreachs(); - - ip_output(q, NULL, &(iphdr->src), - ICMP_TTL, 0, IP_PROTO_ICMP); - pbuf_free(q); -} - -#if IP_FORWARD -void -icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t) -{ - struct pbuf *q; - struct ip_hdr *iphdr; - struct icmp_te_hdr *tehdr; - - q = pbuf_alloc(PBUF_IP, 8 + IP_HLEN + 8, PBUF_RAM); - - iphdr = p->payload; - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded from ")); - ip_addr_debug_print(ICMP_DEBUG, &(iphdr->src)); - LWIP_DEBUGF(ICMP_DEBUG, (" to ")); - ip_addr_debug_print(ICMP_DEBUG, &(iphdr->dest)); - LWIP_DEBUGF(ICMP_DEBUG, ("\n")); - - tehdr = q->payload; - ICMPH_TYPE_SET(tehdr, ICMP_TE); - ICMPH_CODE_SET(tehdr, t); - - /* copy fields from original packet */ - memcpy((u8_t *)q->payload + 8, (u8_t *)p->payload, IP_HLEN + 8); - - /* calculate checksum */ - tehdr->chksum = 0; - tehdr->chksum = inet_chksum(tehdr, q->len); - ICMP_STATS_INC(icmp.xmit); - /* increase number of messages attempted to send */ - snmp_inc_icmpoutmsgs(); - /* increase number of destination unreachable messages attempted to send */ - snmp_inc_icmpouttimeexcds(); - ip_output(q, NULL, &(iphdr->src), - ICMP_TTL, 0, IP_PROTO_ICMP); - pbuf_free(q); -} - -#endif /* IP_FORWARD */ - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv4/ip.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv4/ip.c deleted file mode 100644 index 4db68c8e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv4/ip.c +++ /dev/null @@ -1,508 +0,0 @@ -/* @file - * - * This is the IP layer implementation for incoming and outgoing IP traffic. - * - * @see ip_frag.c - * - */ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/opt.h" - -#include "lwip/def.h" -#include "lwip/mem.h" -#include "lwip/ip.h" -#include "lwip/ip_frag.h" -#include "lwip/inet.h" -#include "lwip/netif.h" -#include "lwip/icmp.h" -#include "lwip/raw.h" -#include "lwip/udp.h" -#include "lwip/tcp.h" - -#include "lwip/stats.h" - -#include "arch/perf.h" - -#include "lwip/snmp.h" -#if LWIP_DHCP -# include "lwip/dhcp.h" -#endif /* LWIP_DHCP */ - - -/** - * Initializes the IP layer. - */ - -void -ip_init(void) -{ - /* no initializations as of yet */ -} - -/** - * Finds the appropriate network interface for a given IP address. It - * searches the list of network interfaces linearly. A match is found - * if the masked IP address of the network interface equals the masked - * IP address given to the function. - */ - -struct netif * -ip_route(struct ip_addr *dest) -{ - struct netif *netif; - - /* iterate through netifs */ - for(netif = netif_list; netif != NULL; netif = netif->next) { - /* network mask matches? */ - if (ip_addr_netcmp(dest, &(netif->ip_addr), &(netif->netmask))) { - /* return netif on which to forward IP packet */ - return netif; - } - } - /* no matching netif found, use default netif */ - return netif_default; -} -#if IP_FORWARD - -/** - * Forwards an IP packet. It finds an appropriate route for the - * packet, decrements the TTL value of the packet, adjusts the - * checksum and outputs the packet on the appropriate interface. - */ - -static struct netif * -ip_forward(struct pbuf *p, struct ip_hdr *iphdr, struct netif *inp) -{ - struct netif *netif; - - PERF_START; - /* Find network interface where to forward this IP packet to. */ - netif = ip_route((struct ip_addr *)&(iphdr->dest)); - if (netif == NULL) { - LWIP_DEBUGF(IP_DEBUG, ("ip_forward: no forwarding route for 0x%"X32_F" found\n", - iphdr->dest.addr)); - snmp_inc_ipnoroutes(); - return (struct netif *)NULL; - } - /* Do not forward packets onto the same network interface on which - * they arrived. */ - if (netif == inp) { - LWIP_DEBUGF(IP_DEBUG, ("ip_forward: not bouncing packets back on incoming interface.\n")); - snmp_inc_ipnoroutes(); - return (struct netif *)NULL; - } - - /* decrement TTL */ - IPH_TTL_SET(iphdr, IPH_TTL(iphdr) - 1); - /* send ICMP if TTL == 0 */ - if (IPH_TTL(iphdr) == 0) { - /* Don't send ICMP messages in response to ICMP messages */ - if (IPH_PROTO(iphdr) != IP_PROTO_ICMP) { - icmp_time_exceeded(p, ICMP_TE_TTL); - snmp_inc_icmpouttimeexcds(); - } - return (struct netif *)NULL; - } - - /* Incrementally update the IP checksum. */ - if (IPH_CHKSUM(iphdr) >= htons(0xffff - 0x100)) { - IPH_CHKSUM_SET(iphdr, IPH_CHKSUM(iphdr) + htons(0x100) + 1); - } else { - IPH_CHKSUM_SET(iphdr, IPH_CHKSUM(iphdr) + htons(0x100)); - } - - LWIP_DEBUGF(IP_DEBUG, ("ip_forward: forwarding packet to 0x%"X32_F"\n", - iphdr->dest.addr)); - - IP_STATS_INC(ip.fw); - IP_STATS_INC(ip.xmit); - snmp_inc_ipforwdatagrams(); - - PERF_STOP("ip_forward"); - /* transmit pbuf on chosen interface */ - netif->output(netif, p, (struct ip_addr *)&(iphdr->dest)); - return netif; -} -#endif /* IP_FORWARD */ - -/** - * This function is called by the network interface device driver when - * an IP packet is received. The function does the basic checks of the - * IP header such as packet size being at least larger than the header - * size etc. If the packet was not destined for us, the packet is - * forwarded (using ip_forward). The IP checksum is always checked. - * - * Finally, the packet is sent to the upper layer protocol input function. - * - * - * - */ - -err_t -ip_input(struct pbuf *p, struct netif *inp) { - struct ip_hdr *iphdr; - struct netif *netif; - u16_t iphdrlen; - - IP_STATS_INC(ip.recv); - snmp_inc_ipinreceives(); - - /* identify the IP header */ - iphdr = p->payload; - if (IPH_V(iphdr) != 4) { - LWIP_DEBUGF(IP_DEBUG | 1, ("IP packet dropped due to bad version number %"U16_F"\n", IPH_V(iphdr))); - ip_debug_print(p); - pbuf_free(p); - IP_STATS_INC(ip.err); - IP_STATS_INC(ip.drop); - snmp_inc_ipunknownprotos(); - return ERR_OK; - } - /* obtain IP header length in number of 32-bit words */ - iphdrlen = IPH_HL(iphdr); - /* calculate IP header length in bytes */ - iphdrlen *= 4; - - /* header length exceeds first pbuf length? */ - if (iphdrlen > p->len) { - LWIP_DEBUGF(IP_DEBUG | 2, ("IP header (len %"U16_F") does not fit in first pbuf (len %"U16_F"), IP packet droppped.\n", - iphdrlen, p->len)); - /* free (drop) packet pbufs */ - pbuf_free(p); - IP_STATS_INC(ip.lenerr); - IP_STATS_INC(ip.drop); - snmp_inc_ipindiscards(); - return ERR_OK; - } - - /* verify checksum */ -#if CHECKSUM_CHECK_IP - if (inet_chksum(iphdr, iphdrlen) != 0) { - - LWIP_DEBUGF(IP_DEBUG | 2, ("Checksum (0x%"X16_F") failed, IP packet dropped.\n", inet_chksum(iphdr, iphdrlen))); - ip_debug_print(p); - pbuf_free(p); - IP_STATS_INC(ip.chkerr); - IP_STATS_INC(ip.drop); - snmp_inc_ipindiscards(); - return ERR_OK; - } -#endif - - /* Trim pbuf. This should have been done at the netif layer, - * but we'll do it anyway just to be sure that its done. */ - pbuf_realloc(p, ntohs(IPH_LEN(iphdr))); - - /* match packet against an interface, i.e. is this packet for us? */ - for (netif = netif_list; netif != NULL; netif = netif->next) { - - LWIP_DEBUGF(IP_DEBUG, ("ip_input: iphdr->dest 0x%"X32_F" netif->ip_addr 0x%"X32_F" (0x%"X32_F", 0x%"X32_F", 0x%"X32_F")\n", - iphdr->dest.addr, netif->ip_addr.addr, - iphdr->dest.addr & netif->netmask.addr, - netif->ip_addr.addr & netif->netmask.addr, - iphdr->dest.addr & ~(netif->netmask.addr))); - - /* interface is up and configured? */ - if ((netif_is_up(netif)) && (!ip_addr_isany(&(netif->ip_addr)))) - { - /* unicast to this interface address? */ - if (ip_addr_cmp(&(iphdr->dest), &(netif->ip_addr)) || - /* or broadcast on this interface network address? */ - ip_addr_isbroadcast(&(iphdr->dest), netif)) { - LWIP_DEBUGF(IP_DEBUG, ("ip_input: packet accepted on interface %c%c\n", - netif->name[0], netif->name[1])); - /* break out of for loop */ - break; - } - } - } -#if LWIP_DHCP - /* Pass DHCP messages regardless of destination address. DHCP traffic is addressed - * using link layer addressing (such as Ethernet MAC) so we must not filter on IP. - * According to RFC 1542 section 3.1.1, referred by RFC 2131). - */ - if (netif == NULL) { - /* remote port is DHCP server? */ - if (IPH_PROTO(iphdr) == IP_PROTO_UDP) { - LWIP_DEBUGF(IP_DEBUG | DBG_TRACE | 1, ("ip_input: UDP packet to DHCP client port %"U16_F"\n", - ntohs(((struct udp_hdr *)((u8_t *)iphdr + iphdrlen))->dest))); - if (ntohs(((struct udp_hdr *)((u8_t *)iphdr + iphdrlen))->dest) == DHCP_CLIENT_PORT) { - LWIP_DEBUGF(IP_DEBUG | DBG_TRACE | 1, ("ip_input: DHCP packet accepted.\n")); - netif = inp; - } - } - } -#endif /* LWIP_DHCP */ - /* packet not for us? */ - if (netif == NULL) { - /* packet not for us, route or discard */ - LWIP_DEBUGF(IP_DEBUG | DBG_TRACE | 1, ("ip_input: packet not for us.\n")); -#if IP_FORWARD - /* non-broadcast packet? */ - if (!ip_addr_isbroadcast(&(iphdr->dest), inp)) { - /* try to forward IP packet on (other) interfaces */ - ip_forward(p, iphdr, inp); - } - else -#endif /* IP_FORWARD */ - { - snmp_inc_ipindiscards(); - } - pbuf_free(p); - return ERR_OK; - } - /* packet consists of multiple fragments? */ - if ((IPH_OFFSET(iphdr) & htons(IP_OFFMASK | IP_MF)) != 0) { -#if IP_REASSEMBLY /* packet fragment reassembly code present? */ - LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip_reass()\n", - ntohs(IPH_ID(iphdr)), p->tot_len, ntohs(IPH_LEN(iphdr)), !!(IPH_OFFSET(iphdr) & htons(IP_MF)), (ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK)*8)); - /* reassemble the packet*/ - p = ip_reass(p); - /* packet not fully reassembled yet? */ - if (p == NULL) { - return ERR_OK; - } - iphdr = p->payload; -#else /* IP_REASSEMBLY == 0, no packet fragment reassembly code present */ - pbuf_free(p); - LWIP_DEBUGF(IP_DEBUG | 2, ("IP packet dropped since it was fragmented (0x%"X16_F") (while IP_REASSEMBLY == 0).\n", - ntohs(IPH_OFFSET(iphdr)))); - IP_STATS_INC(ip.opterr); - IP_STATS_INC(ip.drop); - snmp_inc_ipunknownprotos(); - return ERR_OK; -#endif /* IP_REASSEMBLY */ - } - -#if IP_OPTIONS == 0 /* no support for IP options in the IP header? */ - if (iphdrlen > IP_HLEN) { - LWIP_DEBUGF(IP_DEBUG | 2, ("IP packet dropped since there were IP options (while IP_OPTIONS == 0).\n")); - pbuf_free(p); - IP_STATS_INC(ip.opterr); - IP_STATS_INC(ip.drop); - snmp_inc_ipunknownprotos(); - return ERR_OK; - } -#endif /* IP_OPTIONS == 0 */ - - /* send to upper layers */ - LWIP_DEBUGF(IP_DEBUG, ("ip_input: \n")); - ip_debug_print(p); - LWIP_DEBUGF(IP_DEBUG, ("ip_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len)); - -#if LWIP_RAW - /* raw input did not eat the packet? */ - if (raw_input(p, inp) == 0) { -#endif /* LWIP_RAW */ - - switch (IPH_PROTO(iphdr)) { -#if LWIP_UDP - case IP_PROTO_UDP: - case IP_PROTO_UDPLITE: - snmp_inc_ipindelivers(); - udp_input(p, inp); - break; -#endif /* LWIP_UDP */ -#if LWIP_TCP - case IP_PROTO_TCP: - snmp_inc_ipindelivers(); - tcp_input(p, inp); - break; -#endif /* LWIP_TCP */ - case IP_PROTO_ICMP: - snmp_inc_ipindelivers(); - icmp_input(p, inp); - break; - default: - /* send ICMP destination protocol unreachable unless is was a broadcast */ - if (!ip_addr_isbroadcast(&(iphdr->dest), inp) && - !ip_addr_ismulticast(&(iphdr->dest))) { - p->payload = iphdr; - icmp_dest_unreach(p, ICMP_DUR_PROTO); - } - pbuf_free(p); - - LWIP_DEBUGF(IP_DEBUG | 2, ("Unsupported transport protocol %"U16_F"\n", IPH_PROTO(iphdr))); - - IP_STATS_INC(ip.proterr); - IP_STATS_INC(ip.drop); - snmp_inc_ipunknownprotos(); - } -#if LWIP_RAW - } /* LWIP_RAW */ -#endif - return ERR_OK; -} - -/** - * Sends an IP packet on a network interface. This function constructs - * the IP header and calculates the IP header checksum. If the source - * IP address is NULL, the IP address of the outgoing network - * interface is filled in as source address. - */ - -err_t -ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t tos, - u8_t proto, struct netif *netif) -{ - struct ip_hdr *iphdr; - u16_t ip_id = 0; - - snmp_inc_ipoutrequests(); - - if (dest != IP_HDRINCL) { - if (pbuf_header(p, IP_HLEN)) { - LWIP_DEBUGF(IP_DEBUG | 2, ("ip_output: not enough room for IP header in pbuf\n")); - - IP_STATS_INC(ip.err); - snmp_inc_ipoutdiscards(); - return ERR_BUF; - } - - iphdr = p->payload; - - IPH_TTL_SET(iphdr, ttl); - IPH_PROTO_SET(iphdr, proto); - - ip_addr_set(&(iphdr->dest), dest); - - IPH_VHLTOS_SET(iphdr, 4, IP_HLEN / 4, tos); - IPH_LEN_SET(iphdr, htons(p->tot_len)); - IPH_OFFSET_SET(iphdr, htons(IP_DF)); - IPH_ID_SET(iphdr, htons(ip_id)); - ++ip_id; - - if (ip_addr_isany(src)) { - ip_addr_set(&(iphdr->src), &(netif->ip_addr)); - } else { - ip_addr_set(&(iphdr->src), src); - } - - IPH_CHKSUM_SET(iphdr, 0); -#if CHECKSUM_GEN_IP - IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); -#endif - } else { - iphdr = p->payload; - dest = &(iphdr->dest); - } - -#if IP_FRAG - /* don't fragment if interface has mtu set to 0 [loopif] */ - if (netif->mtu && (p->tot_len > netif->mtu)) - return ip_frag(p,netif,dest); -#endif - - IP_STATS_INC(ip.xmit); - - LWIP_DEBUGF(IP_DEBUG, ("ip_output_if: %c%c%"U16_F"\n", netif->name[0], netif->name[1], netif->num)); - ip_debug_print(p); - - LWIP_DEBUGF(IP_DEBUG, ("netif->output()")); - - return netif->output(netif, p, dest); -} - -/** - * Simple interface to ip_output_if. It finds the outgoing network - * interface and calls upon ip_output_if to do the actual work. - */ - -err_t -ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t tos, u8_t proto) -{ - struct netif *netif; - - if ((netif = ip_route(dest)) == NULL) { - LWIP_DEBUGF(IP_DEBUG | 2, ("ip_output: No route to 0x%"X32_F"\n", dest->addr)); - - IP_STATS_INC(ip.rterr); - snmp_inc_ipoutdiscards(); - return ERR_RTE; - } - - return ip_output_if(p, src, dest, ttl, tos, proto, netif); -} - -#if IP_DEBUG -void -ip_debug_print(struct pbuf *p) -{ - struct ip_hdr *iphdr = p->payload; - u8_t *payload; - - payload = (u8_t *)iphdr + IP_HLEN; - - LWIP_DEBUGF(IP_DEBUG, ("IP header:\n")); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("|%2"S16_F" |%2"S16_F" | 0x%02"X16_F" | %5"U16_F" | (v, hl, tos, len)\n", - IPH_V(iphdr), - IPH_HL(iphdr), - IPH_TOS(iphdr), - ntohs(IPH_LEN(iphdr)))); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %5"U16_F" |%"U16_F"%"U16_F"%"U16_F"| %4"U16_F" | (id, flags, offset)\n", - ntohs(IPH_ID(iphdr)), - ntohs(IPH_OFFSET(iphdr)) >> 15 & 1, - ntohs(IPH_OFFSET(iphdr)) >> 14 & 1, - ntohs(IPH_OFFSET(iphdr)) >> 13 & 1, - ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK)); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | 0x%04"X16_F" | (ttl, proto, chksum)\n", - IPH_TTL(iphdr), - IPH_PROTO(iphdr), - ntohs(IPH_CHKSUM(iphdr)))); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | %3"U16_F" | %3"U16_F" | (src)\n", - ip4_addr1(&iphdr->src), - ip4_addr2(&iphdr->src), - ip4_addr3(&iphdr->src), - ip4_addr4(&iphdr->src))); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | %3"U16_F" | %3"U16_F" | (dest)\n", - ip4_addr1(&iphdr->dest), - ip4_addr2(&iphdr->dest), - ip4_addr3(&iphdr->dest), - ip4_addr4(&iphdr->dest))); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); -} -#endif /* IP_DEBUG */ - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv4/ip_addr.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv4/ip_addr.c deleted file mode 100644 index 2af526e9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv4/ip_addr.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/ip_addr.h" -#include "lwip/inet.h" -#include "lwip/netif.h" - -/* used by IP_ADDR_ANY and IP_ADDR_BROADCAST in ip_addr.h */ -const struct ip_addr ip_addr_any = { 0x00000000UL }; -const struct ip_addr ip_addr_broadcast = { 0xffffffffUL }; - -/* Determine if an address is a broadcast address on a network interface - * - * @param addr address to be checked - * @param netif the network interface against which the address is checked - * @return returns non-zero if the address is a broadcast address - * - */ - -u8_t ip_addr_isbroadcast(struct ip_addr *addr, struct netif *netif) -{ - /* all ones (broadcast) or all zeroes (old skool broadcast) */ - if ((addr->addr == ip_addr_broadcast.addr) || - (addr->addr == ip_addr_any.addr)) - return 1; - /* no broadcast support on this network interface? */ - else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) - /* the given address cannot be a broadcast address - * nor can we check against any broadcast addresses */ - return 0; - /* address matches network interface address exactly? => no broadcast */ - else if (addr->addr == netif->ip_addr.addr) - return 0; - /* on the same (sub) network... */ - else if (ip_addr_netcmp(addr, &(netif->ip_addr), &(netif->netmask)) - /* ...and host identifier bits are all ones? =>... */ - && ((addr->addr & ~netif->netmask.addr) == - (ip_addr_broadcast.addr & ~netif->netmask.addr))) - /* => network broadcast address */ - return 1; - else - return 0; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv4/ip_frag.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv4/ip_frag.c deleted file mode 100644 index 5a57138c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv4/ip_frag.c +++ /dev/null @@ -1,366 +0,0 @@ -/* @file - * - * This is the IP packet segmentation and reassembly implementation. - * - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Jani Monoses - * original reassembly code by Adam Dunkels - * - */ - -#include - -#include "lwip/opt.h" -/* #include "lwip/sys.h" */ -#include "lwip/ip.h" -#include "lwip/ip_frag.h" -#include "lwip/netif.h" -#include "lwip/stats.h" - - -/* - * Copy len bytes from offset in pbuf to buffer - * - * helper used by both ip_reass and ip_frag - */ -static struct pbuf * -copy_from_pbuf(struct pbuf *p, u16_t * offset, - u8_t * buffer, u16_t len) -{ - u16_t l; - - p->payload = (u8_t *)p->payload + *offset; - p->len -= *offset; - while (len) { - l = len < p->len ? len : p->len; - memcpy(buffer, p->payload, l); - buffer += l; - len -= l; - if (len) - p = p->next; - else - *offset = l; - } - return p; -} - -#define IP_REASS_BUFSIZE 5760 -#define IP_REASS_MAXAGE 30 -#define IP_REASS_TMO 1000 - -static u8_t ip_reassbuf[IP_HLEN + IP_REASS_BUFSIZE]; -static u8_t ip_reassbitmap[IP_REASS_BUFSIZE / (8 * 8) + 1]; -static const u8_t bitmap_bits[8] = { 0xff, 0x7f, 0x3f, 0x1f, - 0x0f, 0x07, 0x03, 0x01 -}; -static u16_t ip_reasslen; -static u8_t ip_reassflags; -#define IP_REASS_FLAG_LASTFRAG 0x01 - -static u8_t ip_reasstmr; - -/** - * Reassembly timer base function - * for both NO_SYS == 0 and 1 (!). - * - * Should be called every 1000 msec. - */ -void -ip_reass_tmr(void) -{ - if (ip_reasstmr > 0) { - ip_reasstmr--; - } -} - -/** - * Reassembles incoming IP fragments into an IP datagram. - * - * @param p points to a pbuf chain of the fragment - * @return NULL if reassembly is incomplete, ? otherwise - */ -struct pbuf * -ip_reass(struct pbuf *p) -{ - struct pbuf *q; - struct ip_hdr *fraghdr, *iphdr; - u16_t offset, len; - u16_t i; - - IPFRAG_STATS_INC(ip_frag.recv); - - iphdr = (struct ip_hdr *) ip_reassbuf; - fraghdr = (struct ip_hdr *) p->payload; - /* If ip_reasstmr is zero, no packet is present in the buffer, so we - write the IP header of the fragment into the reassembly - buffer. The timer is updated with the maximum age. */ - if (ip_reasstmr == 0) { - LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass: new packet\n")); - memcpy(iphdr, fraghdr, IP_HLEN); - ip_reasstmr = IP_REASS_MAXAGE; - ip_reassflags = 0; - /* Clear the bitmap. */ - memset(ip_reassbitmap, 0, sizeof(ip_reassbitmap)); - } - - /* Check if the incoming fragment matches the one currently present - in the reasembly buffer. If so, we proceed with copying the - fragment into the buffer. */ - if (ip_addr_cmp(&iphdr->src, &fraghdr->src) && - ip_addr_cmp(&iphdr->dest, &fraghdr->dest) && - IPH_ID(iphdr) == IPH_ID(fraghdr)) { - LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass: matching previous fragment ID=%"X16_F"\n", - ntohs(IPH_ID(fraghdr)))); - IPFRAG_STATS_INC(ip_frag.cachehit); - /* Find out the offset in the reassembly buffer where we should - copy the fragment. */ - len = ntohs(IPH_LEN(fraghdr)) - IPH_HL(fraghdr) * 4; - offset = (ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) * 8; - - /* If the offset or the offset + fragment length overflows the - reassembly buffer, we discard the entire packet. */ - if (offset > IP_REASS_BUFSIZE || offset + len > IP_REASS_BUFSIZE) { - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: fragment outside of buffer (%"S16_F":%"S16_F"/%"S16_F").\n", offset, - offset + len, IP_REASS_BUFSIZE)); - ip_reasstmr = 0; - goto nullreturn; - } - - /* Copy the fragment into the reassembly buffer, at the right - offset. */ - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: copying with offset %"S16_F" into %"S16_F":%"S16_F"\n", offset, - IP_HLEN + offset, IP_HLEN + offset + len)); - i = IPH_HL(fraghdr) * 4; - copy_from_pbuf(p, &i, &ip_reassbuf[IP_HLEN + offset], len); - - /* Update the bitmap. */ - if (offset / (8 * 8) == (offset + len) / (8 * 8)) { - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: updating single byte in bitmap.\n")); - /* If the two endpoints are in the same byte, we only update that byte. */ - LWIP_ASSERT("offset / (8 * 8) < sizeof(ip_reassbitmap)", - offset / (8 * 8) < sizeof(ip_reassbitmap)); - ip_reassbitmap[offset / (8 * 8)] |= - bitmap_bits[(offset / 8) & 7] & - ~bitmap_bits[((offset + len) / 8) & 7]; - } else { - /* If the two endpoints are in different bytes, we update the - bytes in the endpoints and fill the stuff inbetween with - 0xff. */ - LWIP_ASSERT("offset / (8 * 8) < sizeof(ip_reassbitmap)", - offset / (8 * 8) < sizeof(ip_reassbitmap)); - ip_reassbitmap[offset / (8 * 8)] |= bitmap_bits[(offset / 8) & 7]; - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: updating many bytes in bitmap (%"S16_F":%"S16_F").\n", - 1 + offset / (8 * 8), (offset + len) / (8 * 8))); - for (i = 1 + offset / (8 * 8); i < (offset + len) / (8 * 8); ++i) { - ip_reassbitmap[i] = 0xff; - } - LWIP_ASSERT("(offset + len) / (8 * 8) < sizeof(ip_reassbitmap)", - (offset + len) / (8 * 8) < sizeof(ip_reassbitmap)); - ip_reassbitmap[(offset + len) / (8 * 8)] |= - ~bitmap_bits[((offset + len) / 8) & 7]; - } - - /* If this fragment has the More Fragments flag set to zero, we - know that this is the last fragment, so we can calculate the - size of the entire packet. We also set the - IP_REASS_FLAG_LASTFRAG flag to indicate that we have received - the final fragment. */ - - if ((ntohs(IPH_OFFSET(fraghdr)) & IP_MF) == 0) { - ip_reassflags |= IP_REASS_FLAG_LASTFRAG; - ip_reasslen = offset + len; - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: last fragment seen, total len %"S16_F"\n", - ip_reasslen)); - } - - /* Finally, we check if we have a full packet in the buffer. We do - this by checking if we have the last fragment and if all bits - in the bitmap are set. */ - if (ip_reassflags & IP_REASS_FLAG_LASTFRAG) { - /* Check all bytes up to and including all but the last byte in - the bitmap. */ - LWIP_ASSERT("ip_reasslen / (8 * 8) - 1 < sizeof(ip_reassbitmap)", - ip_reasslen / (8 * 8) - 1 < sizeof(ip_reassbitmap)); - for (i = 0; i < ip_reasslen / (8 * 8) - 1; ++i) { - if (ip_reassbitmap[i] != 0xff) { - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: last fragment seen, bitmap %"S16_F"/%"S16_F" failed (%"X16_F")\n", - i, ip_reasslen / (8 * 8) - 1, ip_reassbitmap[i])); - goto nullreturn; - } - } - /* Check the last byte in the bitmap. It should contain just the - right amount of bits. */ - LWIP_ASSERT("ip_reasslen / (8 * 8) < sizeof(ip_reassbitmap)", - ip_reasslen / (8 * 8) < sizeof(ip_reassbitmap)); - if (ip_reassbitmap[ip_reasslen / (8 * 8)] != - (u8_t) ~ bitmap_bits[ip_reasslen / 8 & 7]) { - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: last fragment seen, bitmap %"S16_F" didn't contain %"X16_F" (%"X16_F")\n", - ip_reasslen / (8 * 8), ~bitmap_bits[ip_reasslen / 8 & 7], - ip_reassbitmap[ip_reasslen / (8 * 8)])); - goto nullreturn; - } - - /* Pretend to be a "normal" (i.e., not fragmented) IP packet - from now on. */ - ip_reasslen += IP_HLEN; - - IPH_LEN_SET(iphdr, htons(ip_reasslen)); - IPH_OFFSET_SET(iphdr, 0); - IPH_CHKSUM_SET(iphdr, 0); - IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); - - /* If we have come this far, we have a full packet in the - buffer, so we allocate a pbuf and copy the packet into it. We - also reset the timer. */ - ip_reasstmr = 0; - pbuf_free(p); - p = pbuf_alloc(PBUF_LINK, ip_reasslen, PBUF_POOL); - if (p != NULL) { - i = 0; - for (q = p; q != NULL; q = q->next) { - /* Copy enough bytes to fill this pbuf in the chain. The - available data in the pbuf is given by the q->len variable. */ - LWIP_DEBUGF(IP_REASS_DEBUG, - ("ip_reass: memcpy from %p (%"S16_F") to %p, %"S16_F" bytes\n", - (void *)&ip_reassbuf[i], i, q->payload, - q->len > ip_reasslen - i ? ip_reasslen - i : q->len)); - memcpy(q->payload, &ip_reassbuf[i], - q->len > ip_reasslen - i ? ip_reasslen - i : q->len); - i += q->len; - } - IPFRAG_STATS_INC(ip_frag.fw); - } else { - IPFRAG_STATS_INC(ip_frag.memerr); - } - LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass: p %p\n", (void*)p)); - return p; - } - } - -nullreturn: - IPFRAG_STATS_INC(ip_frag.drop); - pbuf_free(p); - return NULL; -} - -#define MAX_MTU 1500 -static u8_t buf[MEM_ALIGN_SIZE(MAX_MTU)]; - -/** - * Fragment an IP datagram if too large for the netif. - * - * Chop the datagram in MTU sized chunks and send them in order - * by using a fixed size static memory buffer (PBUF_ROM) - */ -err_t -ip_frag(struct pbuf *p, struct netif *netif, struct ip_addr *dest) -{ - struct pbuf *rambuf; - struct pbuf *header; - struct ip_hdr *iphdr; - u16_t nfb = 0; - u16_t left, cop; - u16_t mtu = netif->mtu; - u16_t ofo, omf; - u16_t last; - u16_t poff = IP_HLEN; - u16_t tmp; - - /* Get a RAM based MTU sized pbuf */ - rambuf = pbuf_alloc(PBUF_LINK, 0, PBUF_REF); - if (rambuf == NULL) { - return ERR_MEM; - } - rambuf->tot_len = rambuf->len = mtu; - rambuf->payload = MEM_ALIGN((void *)buf); - - /* Copy the IP header in it */ - iphdr = rambuf->payload; - memcpy(iphdr, p->payload, IP_HLEN); - - /* Save original offset */ - tmp = ntohs(IPH_OFFSET(iphdr)); - ofo = tmp & IP_OFFMASK; - omf = tmp & IP_MF; - - left = p->tot_len - IP_HLEN; - - while (left) { - last = (left <= mtu - IP_HLEN); - - /* Set new offset and MF flag */ - ofo += nfb; - tmp = omf | (IP_OFFMASK & (ofo)); - if (!last) - tmp = tmp | IP_MF; - IPH_OFFSET_SET(iphdr, htons(tmp)); - - /* Fill this fragment */ - nfb = (mtu - IP_HLEN) / 8; - cop = last ? left : nfb * 8; - - p = copy_from_pbuf(p, &poff, (u8_t *) iphdr + IP_HLEN, cop); - - /* Correct header */ - IPH_LEN_SET(iphdr, htons(cop + IP_HLEN)); - IPH_CHKSUM_SET(iphdr, 0); - IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); - - if (last) - pbuf_realloc(rambuf, left + IP_HLEN); - /* This part is ugly: we alloc a RAM based pbuf for - * the link level header for each chunk and then - * free it.A PBUF_ROM style pbuf for which pbuf_header - * worked would make things simpler. - */ - header = pbuf_alloc(PBUF_LINK, 0, PBUF_RAM); - if (header != NULL) { - pbuf_chain(header, rambuf); - netif->output(netif, header, dest); - IPFRAG_STATS_INC(ip_frag.xmit); - pbuf_free(header); - } else { - pbuf_free(rambuf); - return ERR_MEM; - } - left -= cop; - } - pbuf_free(rambuf); - return ERR_OK; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv6/README b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv6/README deleted file mode 100644 index 36200048..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv6/README +++ /dev/null @@ -1 +0,0 @@ -IPv6 support in lwIP is very experimental. diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv6/icmp6.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv6/icmp6.c deleted file mode 100644 index 10b6903c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv6/icmp6.c +++ /dev/null @@ -1,184 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -/* Some ICMP messages should be passed to the transport protocols. This - is not implemented. */ - -#include "lwip/opt.h" - -#include "lwip/icmp.h" -#include "lwip/inet.h" -#include "lwip/ip.h" -#include "lwip/def.h" - -#include "lwip/stats.h" - - -void -icmp_input(struct pbuf *p, struct netif *inp) -{ - u8_t type; - struct icmp_echo_hdr *iecho; - struct ip_hdr *iphdr; - struct ip_addr tmpaddr; - -#ifdef ICMP_STATS - ++lwip_stats.icmp.recv; -#endif /* ICMP_STATS */ - - /* TODO: check length before accessing payload! */ - - type = ((u8_t *)p->payload)[0]; - - switch (type) { - case ICMP6_ECHO: - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n")); - - if (p->tot_len < sizeof(struct icmp_echo_hdr)) { - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n")); - - pbuf_free(p); -#ifdef ICMP_STATS - ++lwip_stats.icmp.lenerr; -#endif /* ICMP_STATS */ - - return; - } - iecho = p->payload; - iphdr = (struct ip_hdr *)((u8_t *)p->payload - IP_HLEN); - if (inet_chksum_pbuf(p) != 0) { - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo (%"X16_F")\n", inet_chksum_pseudo(p, &(iphdr->src), &(iphdr->dest), IP_PROTO_ICMP, p->tot_len))); - -#ifdef ICMP_STATS - ++lwip_stats.icmp.chkerr; -#endif /* ICMP_STATS */ - /* return;*/ - } - LWIP_DEBUGF(ICMP_DEBUG, ("icmp: p->len %"S16_F" p->tot_len %"S16_F"\n", p->len, p->tot_len)); - ip_addr_set(&tmpaddr, &(iphdr->src)); - ip_addr_set(&(iphdr->src), &(iphdr->dest)); - ip_addr_set(&(iphdr->dest), &tmpaddr); - iecho->type = ICMP6_ER; - /* adjust the checksum */ - if (iecho->chksum >= htons(0xffff - (ICMP6_ECHO << 8))) { - iecho->chksum += htons(ICMP6_ECHO << 8) + 1; - } else { - iecho->chksum += htons(ICMP6_ECHO << 8); - } - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo (%"X16_F")\n", inet_chksum_pseudo(p, &(iphdr->src), &(iphdr->dest), IP_PROTO_ICMP, p->tot_len))); -#ifdef ICMP_STATS - ++lwip_stats.icmp.xmit; -#endif /* ICMP_STATS */ - - /* LWIP_DEBUGF("icmp: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len);*/ - ip_output_if (p, &(iphdr->src), IP_HDRINCL, - iphdr->hoplim, IP_PROTO_ICMP, inp); - break; - default: - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" not supported.\n", (s16_t)type)); -#ifdef ICMP_STATS - ++lwip_stats.icmp.proterr; - ++lwip_stats.icmp.drop; -#endif /* ICMP_STATS */ - } - - pbuf_free(p); -} - -void -icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t) -{ - struct pbuf *q; - struct ip_hdr *iphdr; - struct icmp_dur_hdr *idur; - - q = pbuf_alloc(PBUF_IP, 8 + IP_HLEN + 8, PBUF_RAM); - /* ICMP header + IP header + 8 bytes of data */ - - iphdr = p->payload; - - idur = q->payload; - idur->type = (u8_t)ICMP6_DUR; - idur->icode = (u8_t)t; - - memcpy((u8_t *)q->payload + 8, p->payload, IP_HLEN + 8); - - /* calculate checksum */ - idur->chksum = 0; - idur->chksum = inet_chksum(idur, q->len); -#ifdef ICMP_STATS - ++lwip_stats.icmp.xmit; -#endif /* ICMP_STATS */ - - ip_output(q, NULL, - (struct ip_addr *)&(iphdr->src), ICMP_TTL, IP_PROTO_ICMP); - pbuf_free(q); -} - -void -icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t) -{ - struct pbuf *q; - struct ip_hdr *iphdr; - struct icmp_te_hdr *tehdr; - - LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded\n")); - - q = pbuf_alloc(PBUF_IP, 8 + IP_HLEN + 8, PBUF_RAM); - - iphdr = p->payload; - - tehdr = q->payload; - tehdr->type = (u8_t)ICMP6_TE; - tehdr->icode = (u8_t)t; - - /* copy fields from original packet */ - memcpy((u8_t *)q->payload + 8, (u8_t *)p->payload, IP_HLEN + 8); - - /* calculate checksum */ - tehdr->chksum = 0; - tehdr->chksum = inet_chksum(tehdr, q->len); -#ifdef ICMP_STATS - ++lwip_stats.icmp.xmit; -#endif /* ICMP_STATS */ - ip_output(q, NULL, - (struct ip_addr *)&(iphdr->src), ICMP_TTL, IP_PROTO_ICMP); - pbuf_free(q); -} - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv6/ip6.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv6/ip6.c deleted file mode 100644 index 03037c81..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv6/ip6.c +++ /dev/null @@ -1,386 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - - - -/* ip.c - * - * This is the code for the IP layer for IPv6. - * - */ - - -#include "lwip/opt.h" - -#include "lwip/def.h" -#include "lwip/mem.h" -#include "lwip/ip.h" -#include "lwip/inet.h" -#include "lwip/netif.h" -#include "lwip/icmp.h" -#include "lwip/udp.h" -#include "lwip/tcp.h" - -#include "lwip/stats.h" - -#include "arch/perf.h" - -/* ip_init: - * - * Initializes the IP layer. - */ - -void -ip_init(void) -{ -} - -/* ip_route: - * - * Finds the appropriate network interface for a given IP address. It searches the - * list of network interfaces linearly. A match is found if the masked IP address of - * the network interface equals the masked IP address given to the function. - */ - -struct netif * -ip_route(struct ip_addr *dest) -{ - struct netif *netif; - - for(netif = netif_list; netif != NULL; netif = netif->next) { - if (ip_addr_netcmp(dest, &(netif->ip_addr), &(netif->netmask))) { - return netif; - } - } - - return netif_default; -} - -/* ip_forward: - * - * Forwards an IP packet. It finds an appropriate route for the packet, decrements - * the TTL value of the packet, adjusts the checksum and outputs the packet on the - * appropriate interface. - */ - -static void -ip_forward(struct pbuf *p, struct ip_hdr *iphdr) -{ - struct netif *netif; - - PERF_START; - - if ((netif = ip_route((struct ip_addr *)&(iphdr->dest))) == NULL) { - - LWIP_DEBUGF(IP_DEBUG, ("ip_input: no forwarding route found for ")); -#if IP_DEBUG - ip_addr_debug_print(IP_DEBUG, &(iphdr->dest)); -#endif /* IP_DEBUG */ - LWIP_DEBUGF(IP_DEBUG, ("\n")); - pbuf_free(p); - return; - } - /* Decrement TTL and send ICMP if ttl == 0. */ - if (--iphdr->hoplim == 0) { - /* Don't send ICMP messages in response to ICMP messages */ - if (iphdr->nexthdr != IP_PROTO_ICMP) { - icmp_time_exceeded(p, ICMP_TE_TTL); - } - pbuf_free(p); - return; - } - - /* Incremental update of the IP checksum. */ - /* if (iphdr->chksum >= htons(0xffff - 0x100)) { - iphdr->chksum += htons(0x100) + 1; - } else { - iphdr->chksum += htons(0x100); - }*/ - - - LWIP_DEBUGF(IP_DEBUG, ("ip_forward: forwarding packet to ")); -#if IP_DEBUG - ip_addr_debug_print(IP_DEBUG, &(iphdr->dest)); -#endif /* IP_DEBUG */ - LWIP_DEBUGF(IP_DEBUG, ("\n")); - -#ifdef IP_STATS - ++lwip_stats.ip.fw; - ++lwip_stats.ip.xmit; -#endif /* IP_STATS */ - - PERF_STOP("ip_forward"); - - netif->output(netif, p, (struct ip_addr *)&(iphdr->dest)); -} - -/* ip_input: - * - * This function is called by the network interface device driver when an IP packet is - * received. The function does the basic checks of the IP header such as packet size - * being at least larger than the header size etc. If the packet was not destined for - * us, the packet is forwarded (using ip_forward). The IP checksum is always checked. - * - * Finally, the packet is sent to the upper layer protocol input function. - */ - -void -ip_input(struct pbuf *p, struct netif *inp) { - struct ip_hdr *iphdr; - struct netif *netif; - - - PERF_START; - -#if IP_DEBUG - ip_debug_print(p); -#endif /* IP_DEBUG */ - - -#ifdef IP_STATS - ++lwip_stats.ip.recv; -#endif /* IP_STATS */ - - /* identify the IP header */ - iphdr = p->payload; - - - if (iphdr->v != 6) { - LWIP_DEBUGF(IP_DEBUG, ("IP packet dropped due to bad version number\n")); -#if IP_DEBUG - ip_debug_print(p); -#endif /* IP_DEBUG */ - pbuf_free(p); -#ifdef IP_STATS - ++lwip_stats.ip.err; - ++lwip_stats.ip.drop; -#endif /* IP_STATS */ - return; - } - - /* is this packet for us? */ - for(netif = netif_list; netif != NULL; netif = netif->next) { -#if IP_DEBUG - LWIP_DEBUGF(IP_DEBUG, ("ip_input: iphdr->dest ")); - ip_addr_debug_print(IP_DEBUG, &(iphdr->dest)); - LWIP_DEBUGF(IP_DEBUG, ("netif->ip_addr ")); - ip_addr_debug_print(IP_DEBUG, &(netif->ip_addr)); - LWIP_DEBUGF(IP_DEBUG, ("\n")); -#endif /* IP_DEBUG */ - if (ip_addr_cmp(&(iphdr->dest), &(netif->ip_addr))) { - break; - } - } - - - if (netif == NULL) { - /* packet not for us, route or discard */ -#ifdef IP_FORWARD - ip_forward(p, iphdr); -#endif - pbuf_free(p); - return; - } - - pbuf_realloc(p, IP_HLEN + ntohs(iphdr->len)); - - /* send to upper layers */ -#if IP_DEBUG - /* LWIP_DEBUGF("ip_input: \n"); - ip_debug_print(p); - LWIP_DEBUGF("ip_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len);*/ -#endif /* IP_DEBUG */ - - - pbuf_header(p, -IP_HLEN); - - switch (iphdr->nexthdr) { - case IP_PROTO_UDP: - udp_input(p); - break; - case IP_PROTO_TCP: - tcp_input(p); - break; - case IP_PROTO_ICMP: - icmp_input(p, inp); - break; - default: - /* send ICMP destination protocol unreachable */ - icmp_dest_unreach(p, ICMP_DUR_PROTO); - pbuf_free(p); - LWIP_DEBUGF(IP_DEBUG, ("Unsupported transport protocol %"U16_F"\n", - iphdr->nexthdr)); - -#ifdef IP_STATS - ++lwip_stats.ip.proterr; - ++lwip_stats.ip.drop; -#endif /* IP_STATS */ - - } - PERF_STOP("ip_input"); -} - - -/* ip_output_if: - * - * Sends an IP packet on a network interface. This function constructs the IP header - * and calculates the IP header checksum. If the source IP address is NULL, - * the IP address of the outgoing network interface is filled in as source address. - */ - -err_t -ip_output_if (struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, - u8_t proto, struct netif *netif) -{ - struct ip_hdr *iphdr; - - PERF_START; - - printf("len %"U16_F" tot_len %"U16_F"\n", p->len, p->tot_len); - if (pbuf_header(p, IP_HLEN)) { - LWIP_DEBUGF(IP_DEBUG, ("ip_output: not enough room for IP header in pbuf\n")); -#ifdef IP_STATS - ++lwip_stats.ip.err; -#endif /* IP_STATS */ - - return ERR_BUF; - } - printf("len %"U16_F" tot_len %"U16_F"\n", p->len, p->tot_len); - - iphdr = p->payload; - - - if (dest != IP_HDRINCL) { - printf("!IP_HDRLINCL\n"); - iphdr->hoplim = ttl; - iphdr->nexthdr = proto; - iphdr->len = htons(p->tot_len - IP_HLEN); - ip_addr_set(&(iphdr->dest), dest); - - iphdr->v = 6; - - if (ip_addr_isany(src)) { - ip_addr_set(&(iphdr->src), &(netif->ip_addr)); - } else { - ip_addr_set(&(iphdr->src), src); - } - - } else { - dest = &(iphdr->dest); - } - -#ifdef IP_STATS - ++lwip_stats.ip.xmit; -#endif /* IP_STATS */ - - LWIP_DEBUGF(IP_DEBUG, ("ip_output_if: %c%c (len %"U16_F")\n", netif->name[0], netif->name[1], p->tot_len)); -#if IP_DEBUG - ip_debug_print(p); -#endif /* IP_DEBUG */ - - PERF_STOP("ip_output_if"); - return netif->output(netif, p, dest); -} - -/* ip_output: - * - * Simple interface to ip_output_if. It finds the outgoing network interface and - * calls upon ip_output_if to do the actual work. - */ - -err_t -ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t proto) -{ - struct netif *netif; - if ((netif = ip_route(dest)) == NULL) { - LWIP_DEBUGF(IP_DEBUG, ("ip_output: No route to 0x%"X32_F"\n", dest->addr)); -#ifdef IP_STATS - ++lwip_stats.ip.rterr; -#endif /* IP_STATS */ - return ERR_RTE; - } - - return ip_output_if (p, src, dest, ttl, proto, netif); -} - -#if IP_DEBUG -void -ip_debug_print(struct pbuf *p) -{ - struct ip_hdr *iphdr = p->payload; - u8_t *payload; - - payload = (u8_t *)iphdr + IP_HLEN; - - LWIP_DEBUGF(IP_DEBUG, ("IP header:\n")); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("|%2"S16_F" | %"X16_F"%"X16_F" | %"X16_F"%"X16_F" | (v, traffic class, flow label)\n", - iphdr->v, - iphdr->tclass1, iphdr->tclass2, - iphdr->flow1, iphdr->flow2)); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %5"U16_F" | %2"U16_F" | %2"U16_F" | (len, nexthdr, hoplim)\n", - ntohs(iphdr->len), - iphdr->nexthdr, - iphdr->hoplim)); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (src)\n", - ntohl(iphdr->src.addr[0]) >> 16 & 0xffff, - ntohl(iphdr->src.addr[0]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (src)\n", - ntohl(iphdr->src.addr[1]) >> 16 & 0xffff, - ntohl(iphdr->src.addr[1]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (src)\n", - ntohl(iphdr->src.addr[2]) >> 16 & 0xffff, - ntohl(iphdr->src.addr[2]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (src)\n", - ntohl(iphdr->src.addr[3]) >> 16 & 0xffff, - ntohl(iphdr->src.addr[3]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (dest)\n", - ntohl(iphdr->dest.addr[0]) >> 16 & 0xffff, - ntohl(iphdr->dest.addr[0]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (dest)\n", - ntohl(iphdr->dest.addr[1]) >> 16 & 0xffff, - ntohl(iphdr->dest.addr[1]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (dest)\n", - ntohl(iphdr->dest.addr[2]) >> 16 & 0xffff, - ntohl(iphdr->dest.addr[2]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (dest)\n", - ntohl(iphdr->dest.addr[3]) >> 16 & 0xffff, - ntohl(iphdr->dest.addr[3]) & 0xffff)); - LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); -} -#endif /* IP_DEBUG */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv6/ip6_addr.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv6/ip6_addr.c deleted file mode 100644 index dcb50785..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/ipv6/ip6_addr.c +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/ip_addr.h" -#include "lwip/inet.h" - - -u8_t -ip_addr_netcmp(struct ip_addr *addr1, struct ip_addr *addr2, - struct ip_addr *mask) -{ - return((addr1->addr[0] & mask->addr[0]) == (addr2->addr[0] & mask->addr[0]) && - (addr1->addr[1] & mask->addr[1]) == (addr2->addr[1] & mask->addr[1]) && - (addr1->addr[2] & mask->addr[2]) == (addr2->addr[2] & mask->addr[2]) && - (addr1->addr[3] & mask->addr[3]) == (addr2->addr[3] & mask->addr[3])); - -} - -u8_t -ip_addr_cmp(struct ip_addr *addr1, struct ip_addr *addr2) -{ - return(addr1->addr[0] == addr2->addr[0] && - addr1->addr[1] == addr2->addr[1] && - addr1->addr[2] == addr2->addr[2] && - addr1->addr[3] == addr2->addr[3]); -} - -void -ip_addr_set(struct ip_addr *dest, struct ip_addr *src) -{ - memcpy(dest, src, sizeof(struct ip_addr)); - /* dest->addr[0] = src->addr[0]; - dest->addr[1] = src->addr[1]; - dest->addr[2] = src->addr[2]; - dest->addr[3] = src->addr[3];*/ -} - -u8_t -ip_addr_isany(struct ip_addr *addr) -{ - if (addr == NULL) return 1; - return((addr->addr[0] | addr->addr[1] | addr->addr[2] | addr->addr[3]) == 0); -} - - -/*#if IP_DEBUG*/ -void -ip_addr_debug_print(struct ip_addr *addr) -{ - printf("%"X32_F":%"X32_F":%"X32_F":%"X32_F":%"X32_F":%"X32_F":%"X32_F":%"X32_F", - ntohl(addr->addr[0]) >> 16 & 0xffff, - ntohl(addr->addr[0]) & 0xffff, - ntohl(addr->addr[1]) >> 16 & 0xffff, - ntohl(addr->addr[1]) & 0xffff, - ntohl(addr->addr[2]) >> 16 & 0xffff, - ntohl(addr->addr[2]) & 0xffff, - ntohl(addr->addr[3]) >> 16 & 0xffff, - ntohl(addr->addr[3]) & 0xffff); -} -/*#endif*/ /* IP_DEBUG */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/mem.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/mem.c deleted file mode 100644 index b38d8f15..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/mem.c +++ /dev/null @@ -1,310 +0,0 @@ -/** @file - * - * Dynamic memory manager - * - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include - -#include "lwip/arch.h" -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/mem.h" - -#include "lwip/sys.h" - -#include "lwip/stats.h" - -struct mem { - mem_size_t next, prev; -#if MEM_ALIGNMENT == 1 - u8_t used; -#elif MEM_ALIGNMENT == 2 - u16_t used; -#elif MEM_ALIGNMENT == 4 - u32_t used; -#elif MEM_ALIGNMENT == 8 - u64_t used; -#else -#error "unhandled MEM_ALIGNMENT size" -#endif /* MEM_ALIGNMENT */ -}; - -static struct mem *ram_end; -static u8_t ram[MEM_SIZE + sizeof(struct mem) + MEM_ALIGNMENT]; - -#define MIN_SIZE 12 -#if 0 /* this one does not align correctly for some, resulting in crashes */ -#define SIZEOF_STRUCT_MEM (unsigned int)MEM_ALIGN_SIZE(sizeof(struct mem)) -#else -#define SIZEOF_STRUCT_MEM (sizeof(struct mem) + \ - (((sizeof(struct mem) % MEM_ALIGNMENT) == 0)? 0 : \ - (4 - (sizeof(struct mem) % MEM_ALIGNMENT)))) -#endif - -static struct mem *lfree; /* pointer to the lowest free block */ - -static sys_sem_t mem_sem; - -static void -plug_holes(struct mem *mem) -{ - struct mem *nmem; - struct mem *pmem; - - LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram); - LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end); - LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0); - - /* plug hole forward */ - LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE", mem->next <= MEM_SIZE); - - nmem = (struct mem *)&ram[mem->next]; - if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) { - if (lfree == nmem) { - lfree = mem; - } - mem->next = nmem->next; - ((struct mem *)&ram[nmem->next])->prev = (u8_t *)mem - ram; - } - - /* plug hole backward */ - pmem = (struct mem *)&ram[mem->prev]; - if (pmem != mem && pmem->used == 0) { - if (lfree == mem) { - lfree = pmem; - } - pmem->next = mem->next; - ((struct mem *)&ram[mem->next])->prev = (u8_t *)pmem - ram; - } - -} -void -mem_init(void) -{ - struct mem *mem; - - memset(ram, 0, MEM_SIZE); - mem = (struct mem *)ram; - mem->next = MEM_SIZE; - mem->prev = 0; - mem->used = 0; - ram_end = (struct mem *)&ram[MEM_SIZE]; - ram_end->used = 1; - ram_end->next = MEM_SIZE; - ram_end->prev = MEM_SIZE; - - mem_sem = sys_sem_new(1); - - lfree = (struct mem *)ram; - -#if MEM_STATS - lwip_stats.mem.avail = MEM_SIZE; -#endif /* MEM_STATS */ -} -void -mem_free(void *rmem) -{ - struct mem *mem; - - if (rmem == NULL) { - LWIP_DEBUGF(MEM_DEBUG | DBG_TRACE | 2, ("mem_free(p == NULL) was called.\n")); - return; - } - - sys_sem_wait(mem_sem); - - LWIP_ASSERT("mem_free: legal memory", (u8_t *)rmem >= (u8_t *)ram && - (u8_t *)rmem < (u8_t *)ram_end); - - if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) { - LWIP_DEBUGF(MEM_DEBUG | 3, ("mem_free: illegal memory\n")); -#if MEM_STATS - ++lwip_stats.mem.err; -#endif /* MEM_STATS */ - sys_sem_signal(mem_sem); - return; - } - mem = (struct mem *)((u8_t *)rmem - SIZEOF_STRUCT_MEM); - - LWIP_ASSERT("mem_free: mem->used", mem->used); - - mem->used = 0; - - if (mem < lfree) { - lfree = mem; - } - -#if MEM_STATS - lwip_stats.mem.used -= mem->next - ((u8_t *)mem - ram); - -#endif /* MEM_STATS */ - plug_holes(mem); - sys_sem_signal(mem_sem); -} -void * -mem_reallocm(void *rmem, mem_size_t newsize) -{ - void *nmem; - nmem = mem_malloc(newsize); - if (nmem == NULL) { - return mem_realloc(rmem, newsize); - } - memcpy(nmem, rmem, newsize); - mem_free(rmem); - return nmem; -} - -void * -mem_realloc(void *rmem, mem_size_t newsize) -{ - mem_size_t size; - mem_size_t ptr, ptr2; - struct mem *mem, *mem2; - - /* Expand the size of the allocated memory region so that we can - adjust for alignment. */ - if ((newsize % MEM_ALIGNMENT) != 0) { - newsize += MEM_ALIGNMENT - ((newsize + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT); - } - - if (newsize > MEM_SIZE) { - return NULL; - } - - sys_sem_wait(mem_sem); - - LWIP_ASSERT("mem_realloc: legal memory", (u8_t *)rmem >= (u8_t *)ram && - (u8_t *)rmem < (u8_t *)ram_end); - - if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) { - LWIP_DEBUGF(MEM_DEBUG | 3, ("mem_realloc: illegal memory\n")); - return rmem; - } - mem = (struct mem *)((u8_t *)rmem - SIZEOF_STRUCT_MEM); - - ptr = (u8_t *)mem - ram; - - size = mem->next - ptr - SIZEOF_STRUCT_MEM; -#if MEM_STATS - lwip_stats.mem.used -= (size - newsize); -#endif /* MEM_STATS */ - - if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE < size) { - ptr2 = ptr + SIZEOF_STRUCT_MEM + newsize; - mem2 = (struct mem *)&ram[ptr2]; - mem2->used = 0; - mem2->next = mem->next; - mem2->prev = ptr; - mem->next = ptr2; - if (mem2->next != MEM_SIZE) { - ((struct mem *)&ram[mem2->next])->prev = ptr2; - } - - plug_holes(mem2); - } - sys_sem_signal(mem_sem); - return rmem; -} -void * -mem_malloc(mem_size_t size) -{ - mem_size_t ptr, ptr2; - struct mem *mem, *mem2; - - if (size == 0) { - return NULL; - } - - /* Expand the size of the allocated memory region so that we can - adjust for alignment. */ - if ((size % MEM_ALIGNMENT) != 0) { - size += MEM_ALIGNMENT - ((size + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT); - } - - if (size > MEM_SIZE) { - return NULL; - } - - sys_sem_wait(mem_sem); - - for (ptr = (u8_t *)lfree - ram; ptr < MEM_SIZE; ptr = ((struct mem *)&ram[ptr])->next) { - mem = (struct mem *)&ram[ptr]; - if (!mem->used && - mem->next - (ptr + SIZEOF_STRUCT_MEM) >= size + SIZEOF_STRUCT_MEM) { - ptr2 = ptr + SIZEOF_STRUCT_MEM + size; - mem2 = (struct mem *)&ram[ptr2]; - - mem2->prev = ptr; - mem2->next = mem->next; - mem->next = ptr2; - if (mem2->next != MEM_SIZE) { - ((struct mem *)&ram[mem2->next])->prev = ptr2; - } - - mem2->used = 0; - mem->used = 1; -#if MEM_STATS - lwip_stats.mem.used += (size + SIZEOF_STRUCT_MEM); - /* if (lwip_stats.mem.max < lwip_stats.mem.used) { - lwip_stats.mem.max = lwip_stats.mem.used; - } */ - if (lwip_stats.mem.max < ptr2) { - lwip_stats.mem.max = ptr2; - } -#endif /* MEM_STATS */ - - if (mem == lfree) { - /* Find next free block after mem */ - while (lfree->used && lfree != ram_end) { - lfree = (struct mem *)&ram[lfree->next]; - } - LWIP_ASSERT("mem_malloc: !lfree->used", !lfree->used); - } - sys_sem_signal(mem_sem); - LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.", - (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end); - LWIP_ASSERT("mem_malloc: allocated memory properly aligned.", - (unsigned long)((u8_t *)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0); - return (u8_t *)mem + SIZEOF_STRUCT_MEM; - } - } - LWIP_DEBUGF(MEM_DEBUG | 2, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size)); -#if MEM_STATS - ++lwip_stats.mem.err; -#endif /* MEM_STATS */ - sys_sem_signal(mem_sem); - return NULL; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/memp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/memp.c deleted file mode 100644 index c0cfce29..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/memp.c +++ /dev/null @@ -1,274 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/opt.h" - -#include "lwip/memp.h" - -#include "lwip/pbuf.h" -#include "lwip/udp.h" -#include "lwip/raw.h" -#include "lwip/tcp.h" -#include "lwip/api.h" -#include "lwip/api_msg.h" -#include "lwip/tcpip.h" - -#include "lwip/sys.h" -#include "lwip/stats.h" - -struct memp { - struct memp *next; -}; - - - -static struct memp *memp_tab[MEMP_MAX]; - -static const u16_t memp_sizes[MEMP_MAX] = { - sizeof(struct pbuf), - sizeof(struct raw_pcb), - sizeof(struct udp_pcb), - sizeof(struct tcp_pcb), - sizeof(struct tcp_pcb_listen), - sizeof(struct tcp_seg), - sizeof(struct netbuf), - sizeof(struct netconn), - sizeof(struct api_msg), - sizeof(struct tcpip_msg), - sizeof(struct sys_timeout) -}; - -static const u16_t memp_num[MEMP_MAX] = { - MEMP_NUM_PBUF, - MEMP_NUM_RAW_PCB, - MEMP_NUM_UDP_PCB, - MEMP_NUM_TCP_PCB, - MEMP_NUM_TCP_PCB_LISTEN, - MEMP_NUM_TCP_SEG, - MEMP_NUM_NETBUF, - MEMP_NUM_NETCONN, - MEMP_NUM_API_MSG, - MEMP_NUM_TCPIP_MSG, - MEMP_NUM_SYS_TIMEOUT -}; - -static u8_t memp_memory[(MEMP_NUM_PBUF * - MEM_ALIGN_SIZE(sizeof(struct pbuf) + - sizeof(struct memp)) + - MEMP_NUM_RAW_PCB * - MEM_ALIGN_SIZE(sizeof(struct raw_pcb) + - sizeof(struct memp)) + - MEMP_NUM_UDP_PCB * - MEM_ALIGN_SIZE(sizeof(struct udp_pcb) + - sizeof(struct memp)) + - MEMP_NUM_TCP_PCB * - MEM_ALIGN_SIZE(sizeof(struct tcp_pcb) + - sizeof(struct memp)) + - MEMP_NUM_TCP_PCB_LISTEN * - MEM_ALIGN_SIZE(sizeof(struct tcp_pcb_listen) + - sizeof(struct memp)) + - MEMP_NUM_TCP_SEG * - MEM_ALIGN_SIZE(sizeof(struct tcp_seg) + - sizeof(struct memp)) + - MEMP_NUM_NETBUF * - MEM_ALIGN_SIZE(sizeof(struct netbuf) + - sizeof(struct memp)) + - MEMP_NUM_NETCONN * - MEM_ALIGN_SIZE(sizeof(struct netconn) + - sizeof(struct memp)) + - MEMP_NUM_API_MSG * - MEM_ALIGN_SIZE(sizeof(struct api_msg) + - sizeof(struct memp)) + - MEMP_NUM_TCPIP_MSG * - MEM_ALIGN_SIZE(sizeof(struct tcpip_msg) + - sizeof(struct memp)) + - MEMP_NUM_SYS_TIMEOUT * - MEM_ALIGN_SIZE(sizeof(struct sys_timeout) + - sizeof(struct memp)))]; - - -#if !SYS_LIGHTWEIGHT_PROT -static sys_sem_t mutex; -#endif - -#if MEMP_SANITY_CHECK -static int -memp_sanity(void) -{ - s16_t i, c; - struct memp *m, *n; - - for(i = 0; i < MEMP_MAX; i++) { - for(m = memp_tab[i]; m != NULL; m = m->next) { - c = 1; - for(n = memp_tab[i]; n != NULL; n = n->next) { - if (n == m) { - --c; - } - if (c < 0) return 0; /* LW was: abort(); */ - } - } - } - return 1; -} -#endif /* MEMP_SANITY_CHECK*/ - -void -memp_init(void) -{ - struct memp *m, *memp; - u16_t i, j; - u16_t size; - -#if MEMP_STATS - for(i = 0; i < MEMP_MAX; ++i) { - lwip_stats.memp[i].used = lwip_stats.memp[i].max = - lwip_stats.memp[i].err = 0; - lwip_stats.memp[i].avail = memp_num[i]; - } -#endif /* MEMP_STATS */ - - memp = (struct memp *)&memp_memory[0]; - for(i = 0; i < MEMP_MAX; ++i) { - size = MEM_ALIGN_SIZE(memp_sizes[i] + sizeof(struct memp)); - if (memp_num[i] > 0) { - memp_tab[i] = memp; - m = memp; - - for(j = 0; j < memp_num[i]; ++j) { - m->next = (struct memp *)MEM_ALIGN((u8_t *)m + size); - memp = m; - m = m->next; - } - memp->next = NULL; - memp = m; - } else { - memp_tab[i] = NULL; - } - } - -#if !SYS_LIGHTWEIGHT_PROT - mutex = sys_sem_new(1); -#endif - - -} - -void * -memp_malloc(memp_t type) -{ - struct memp *memp; - void *mem; -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_DECL_PROTECT(old_level); -#endif - - LWIP_ASSERT("memp_malloc: type < MEMP_MAX", type < MEMP_MAX); - -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_PROTECT(old_level); -#else /* SYS_LIGHTWEIGHT_PROT */ - sys_sem_wait(mutex); -#endif /* SYS_LIGHTWEIGHT_PROT */ - - memp = memp_tab[type]; - - if (memp != NULL) { - memp_tab[type] = memp->next; - memp->next = NULL; -#if MEMP_STATS - ++lwip_stats.memp[type].used; - if (lwip_stats.memp[type].used > lwip_stats.memp[type].max) { - lwip_stats.memp[type].max = lwip_stats.memp[type].used; - } -#endif /* MEMP_STATS */ -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_UNPROTECT(old_level); -#else /* SYS_LIGHTWEIGHT_PROT */ - sys_sem_signal(mutex); -#endif /* SYS_LIGHTWEIGHT_PROT */ - LWIP_ASSERT("memp_malloc: memp properly aligned", - ((mem_ptr_t)MEM_ALIGN((u8_t *)memp + sizeof(struct memp)) % MEM_ALIGNMENT) == 0); - - mem = MEM_ALIGN((u8_t *)memp + sizeof(struct memp)); - return mem; - } else { - LWIP_DEBUGF(MEMP_DEBUG | 2, ("memp_malloc: out of memory in pool %"S16_F"\n", type)); -#if MEMP_STATS - ++lwip_stats.memp[type].err; -#endif /* MEMP_STATS */ -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_UNPROTECT(old_level); -#else /* SYS_LIGHTWEIGHT_PROT */ - sys_sem_signal(mutex); -#endif /* SYS_LIGHTWEIGHT_PROT */ - return NULL; - } -} - -void -memp_free(memp_t type, void *mem) -{ - struct memp *memp; -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_DECL_PROTECT(old_level); -#endif /* SYS_LIGHTWEIGHT_PROT */ - - if (mem == NULL) { - return; - } - memp = (struct memp *)((u8_t *)mem - sizeof(struct memp)); - -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_PROTECT(old_level); -#else /* SYS_LIGHTWEIGHT_PROT */ - sys_sem_wait(mutex); -#endif /* SYS_LIGHTWEIGHT_PROT */ - -#if MEMP_STATS - lwip_stats.memp[type].used--; -#endif /* MEMP_STATS */ - - memp->next = memp_tab[type]; - memp_tab[type] = memp; - -#if MEMP_SANITY_CHECK - LWIP_ASSERT("memp sanity", memp_sanity()); -#endif - -#if SYS_LIGHTWEIGHT_PROT - SYS_ARCH_UNPROTECT(old_level); -#else /* SYS_LIGHTWEIGHT_PROT */ - sys_sem_signal(mutex); -#endif /* SYS_LIGHTWEIGHT_PROT */ -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/netif.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/netif.c deleted file mode 100644 index 3525089b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/netif.c +++ /dev/null @@ -1,288 +0,0 @@ -/** - * @file - * - * lwIP network interface abstraction - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/opt.h" - -#include "lwip/def.h" -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/tcp.h" - -struct netif *netif_list = NULL; -struct netif *netif_default = NULL; - -/** - * Add a network interface to the list of lwIP netifs. - * - * @param netif a pre-allocated netif structure - * @param ipaddr IP address for the new netif - * @param netmask network mask for the new netif - * @param gw default gateway IP address for the new netif - * @param state opaque data passed to the new netif - * @param init callback function that initializes the interface - * @param input callback function that is called to pass - * ingress packets up in the protocol layer stack. - * - * @return netif, or NULL if failed. - */ -struct netif * -netif_add(struct netif *netif, struct ip_addr *ipaddr, struct ip_addr *netmask, - struct ip_addr *gw, - void *state, - err_t (* init)(struct netif *netif), - err_t (* input)(struct pbuf *p, struct netif *netif)) -{ - static s16_t netifnum = 0; - -#if LWIP_DHCP - /* netif not under DHCP control by default */ - netif->dhcp = NULL; -#endif - /* remember netif specific state information data */ - netif->state = state; - netif->num = netifnum++; - netif->input = input; - - netif_set_addr(netif, ipaddr, netmask, gw); - - /* call user specified initialization function for netif */ - if (init(netif) != ERR_OK) { - return NULL; - } - - /* add this netif to the list */ - netif->next = netif_list; - netif_list = netif; - LWIP_DEBUGF(NETIF_DEBUG, ("netif: added interface %c%c IP addr ", - netif->name[0], netif->name[1])); - ip_addr_debug_print(NETIF_DEBUG, ipaddr); - LWIP_DEBUGF(NETIF_DEBUG, (" netmask ")); - ip_addr_debug_print(NETIF_DEBUG, netmask); - LWIP_DEBUGF(NETIF_DEBUG, (" gw ")); - ip_addr_debug_print(NETIF_DEBUG, gw); - LWIP_DEBUGF(NETIF_DEBUG, ("\n")); - return netif; -} - -void -netif_set_addr(struct netif *netif,struct ip_addr *ipaddr, struct ip_addr *netmask, - struct ip_addr *gw) -{ - netif_set_ipaddr(netif, ipaddr); - netif_set_netmask(netif, netmask); - netif_set_gw(netif, gw); -} - -void netif_remove(struct netif * netif) -{ - if ( netif == NULL ) return; - - /* is it the first netif? */ - if (netif_list == netif) { - netif_list = netif->next; - } - else { - /* look for netif further down the list */ - struct netif * tmpNetif; - for (tmpNetif = netif_list; tmpNetif != NULL; tmpNetif = tmpNetif->next) { - if (tmpNetif->next == netif) { - tmpNetif->next = netif->next; - break; - } - } - if (tmpNetif == NULL) - return; /* we didn't find any netif today */ - } - /* this netif is default? */ - if (netif_default == netif) - /* reset default netif */ - netif_default = NULL; - LWIP_DEBUGF( NETIF_DEBUG, ("netif_remove: removed netif\n") ); -} - -struct netif * -netif_find(char *name) -{ - struct netif *netif; - u8_t num; - - if (name == NULL) { - return NULL; - } - - num = name[2] - '0'; - - for(netif = netif_list; netif != NULL; netif = netif->next) { - if (num == netif->num && - name[0] == netif->name[0] && - name[1] == netif->name[1]) { - LWIP_DEBUGF(NETIF_DEBUG, ("netif_find: found %c%c\n", name[0], name[1])); - return netif; - } - } - LWIP_DEBUGF(NETIF_DEBUG, ("netif_find: didn't find %c%c\n", name[0], name[1])); - return NULL; -} - -void -netif_set_ipaddr(struct netif *netif, struct ip_addr *ipaddr) -{ - /* TODO: Handling of obsolete pcbs */ - /* See: http://mail.gnu.org/archive/html/lwip-users/2003-03/msg00118.html */ -#if LWIP_TCP - struct tcp_pcb *pcb; - struct tcp_pcb_listen *lpcb; - - /* address is actually being changed? */ - if ((ip_addr_cmp(ipaddr, &(netif->ip_addr))) == 0) - { - /* extern struct tcp_pcb *tcp_active_pcbs; defined by tcp.h */ - LWIP_DEBUGF(NETIF_DEBUG | 1, ("netif_set_ipaddr: netif address being changed\n")); - pcb = tcp_active_pcbs; - while (pcb != NULL) { - /* PCB bound to current local interface address? */ - if (ip_addr_cmp(&(pcb->local_ip), &(netif->ip_addr))) { - /* this connection must be aborted */ - struct tcp_pcb *next = pcb->next; - LWIP_DEBUGF(NETIF_DEBUG | 1, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb)); - tcp_abort(pcb); - pcb = next; - } else { - pcb = pcb->next; - } - } - for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { - /* PCB bound to current local interface address? */ - if (ip_addr_cmp(&(lpcb->local_ip), &(netif->ip_addr))) { - /* The PCB is listening to the old ipaddr and - * is set to listen to the new one instead */ - ip_addr_set(&(lpcb->local_ip), ipaddr); - } - } - } -#endif - ip_addr_set(&(netif->ip_addr), ipaddr); -#if 0 /* only allowed for Ethernet interfaces TODO: how can we check? */ - /** For Ethernet network interfaces, we would like to send a - * "gratuitous ARP"; this is an ARP packet sent by a node in order - * to spontaneously cause other nodes to update an entry in their - * ARP cache. From RFC 3220 "IP Mobility Support for IPv4" section 4.6. - */ - etharp_query(netif, ipaddr, NULL); -#endif - LWIP_DEBUGF(NETIF_DEBUG | DBG_TRACE | DBG_STATE | 3, ("netif: IP address of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", - netif->name[0], netif->name[1], - ip4_addr1(&netif->ip_addr), - ip4_addr2(&netif->ip_addr), - ip4_addr3(&netif->ip_addr), - ip4_addr4(&netif->ip_addr))); -} - -void -netif_set_gw(struct netif *netif, struct ip_addr *gw) -{ - ip_addr_set(&(netif->gw), gw); - LWIP_DEBUGF(NETIF_DEBUG | DBG_TRACE | DBG_STATE | 3, ("netif: GW address of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", - netif->name[0], netif->name[1], - ip4_addr1(&netif->gw), - ip4_addr2(&netif->gw), - ip4_addr3(&netif->gw), - ip4_addr4(&netif->gw))); -} - -void -netif_set_netmask(struct netif *netif, struct ip_addr *netmask) -{ - ip_addr_set(&(netif->netmask), netmask); - LWIP_DEBUGF(NETIF_DEBUG | DBG_TRACE | DBG_STATE | 3, ("netif: netmask of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", - netif->name[0], netif->name[1], - ip4_addr1(&netif->netmask), - ip4_addr2(&netif->netmask), - ip4_addr3(&netif->netmask), - ip4_addr4(&netif->netmask))); -} - -void -netif_set_default(struct netif *netif) -{ - netif_default = netif; - LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n", - netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\'')); -} - -/** - * Bring an interface up, available for processing - * traffic. - * - * @note: Enabling DHCP on a down interface will make it come - * up once configured. - * - * @see dhcp_start() - */ -void netif_set_up(struct netif *netif) -{ - netif->flags |= NETIF_FLAG_UP; -} - -/** - * Ask if an interface is up - */ -u8_t netif_is_up(struct netif *netif) -{ - return (netif->flags & NETIF_FLAG_UP)?1:0; -} - -/** - * Bring an interface down, disabling any traffic processing. - * - * @note: Enabling DHCP on a down interface will make it come - * up once configured. - * - * @see dhcp_start() - */ -void netif_set_down(struct netif *netif) -{ - netif->flags &= ~NETIF_FLAG_UP; -} - -void -netif_init(void) -{ - netif_list = netif_default = NULL; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/pbuf.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/pbuf.c deleted file mode 100644 index 2ece4b09..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/pbuf.c +++ /dev/null @@ -1,957 +0,0 @@ -/** - * @file - * Packet buffer management - * - * Packets are built from the pbuf data structure. It supports dynamic - * memory allocation for packet contents or can reference externally - * managed packet contents both in RAM and ROM. Quick allocation for - * incoming packets is provided through pools with fixed sized pbufs. - * - * A packet may span over multiple pbufs, chained as a singly linked - * list. This is called a "pbuf chain". - * - * Multiple packets may be queued, also using this singly linked list. - * This is called a "packet queue". - * - * So, a packet queue consists of one or more pbuf chains, each of - * which consist of one or more pbufs. Currently, queues are only - * supported in a limited section of lwIP, this is the etharp queueing - * code. Outside of this section no packet queues are supported yet. - * - * The differences between a pbuf chain and a packet queue are very - * precise but subtle. - * - * The last pbuf of a packet has a ->tot_len field that equals the - * ->len field. It can be found by traversing the list. If the last - * pbuf of a packet has a ->next field other than NULL, more packets - * are on the queue. - * - * Therefore, looping through a pbuf of a single packet, has an - * loop end condition (tot_len == p->len), NOT (next == NULL). - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include - -#include "lwip/opt.h" -#include "lwip/stats.h" -#include "lwip/def.h" -#include "lwip/mem.h" -#include "lwip/memp.h" -#include "lwip/pbuf.h" -#include "lwip/sys.h" -#include "arch/perf.h" - -static u8_t pbuf_pool_memory[MEM_ALIGNMENT - 1 + PBUF_POOL_SIZE * MEM_ALIGN_SIZE(PBUF_POOL_BUFSIZE + sizeof(struct pbuf))]; - -#if !SYS_LIGHTWEIGHT_PROT -static volatile u8_t pbuf_pool_free_lock, pbuf_pool_alloc_lock; -static sys_sem_t pbuf_pool_free_sem; -#endif - -static struct pbuf *pbuf_pool = NULL; - -/** - * Initializes the pbuf module. - * - * A large part of memory is allocated for holding the pool of pbufs. - * The size of the individual pbufs in the pool is given by the size - * parameter, and the number of pbufs in the pool by the num parameter. - * - * After the memory has been allocated, the pbufs are set up. The - * ->next pointer in each pbuf is set up to point to the next pbuf in - * the pool. - * - */ -void -pbuf_init(void) -{ - struct pbuf *p, *q = NULL; - u16_t i; - - pbuf_pool = (struct pbuf *)MEM_ALIGN(pbuf_pool_memory); - -#if PBUF_STATS - lwip_stats.pbuf.avail = PBUF_POOL_SIZE; -#endif /* PBUF_STATS */ - - /* Set up ->next pointers to link the pbufs of the pool together */ - p = pbuf_pool; - - for(i = 0; i < PBUF_POOL_SIZE; ++i) { - p->next = (struct pbuf *)((u8_t *)p + PBUF_POOL_BUFSIZE + sizeof(struct pbuf)); - p->len = p->tot_len = PBUF_POOL_BUFSIZE; - p->payload = MEM_ALIGN((void *)((u8_t *)p + sizeof(struct pbuf))); - p->flags = PBUF_FLAG_POOL; - q = p; - p = p->next; - } - - /* The ->next pointer of last pbuf is NULL to indicate that there - are no more pbufs in the pool */ - q->next = NULL; - -#if !SYS_LIGHTWEIGHT_PROT - pbuf_pool_alloc_lock = 0; - pbuf_pool_free_lock = 0; - pbuf_pool_free_sem = sys_sem_new(1); -#endif -} - -/** - * @internal only called from pbuf_alloc() - */ -static struct pbuf * -pbuf_pool_alloc(void) -{ - struct pbuf *p = NULL; - - SYS_ARCH_DECL_PROTECT(old_level); - SYS_ARCH_PROTECT(old_level); - -#if !SYS_LIGHTWEIGHT_PROT - /* Next, check the actual pbuf pool, but if the pool is locked, we - pretend to be out of buffers and return NULL. */ - if (pbuf_pool_free_lock) { -#if PBUF_STATS - ++lwip_stats.pbuf.alloc_locked; -#endif /* PBUF_STATS */ - return NULL; - } - pbuf_pool_alloc_lock = 1; - if (!pbuf_pool_free_lock) { -#endif /* SYS_LIGHTWEIGHT_PROT */ - p = pbuf_pool; - if (p) { - pbuf_pool = p->next; - } -#if !SYS_LIGHTWEIGHT_PROT -#if PBUF_STATS - } else { - ++lwip_stats.pbuf.alloc_locked; -#endif /* PBUF_STATS */ - } - pbuf_pool_alloc_lock = 0; -#endif /* SYS_LIGHTWEIGHT_PROT */ - -#if PBUF_STATS - if (p != NULL) { - ++lwip_stats.pbuf.used; - if (lwip_stats.pbuf.used > lwip_stats.pbuf.max) { - lwip_stats.pbuf.max = lwip_stats.pbuf.used; - } - } -#endif /* PBUF_STATS */ - - SYS_ARCH_UNPROTECT(old_level); - return p; -} - - -/** - * Allocates a pbuf of the given type (possibly a chain for PBUF_POOL type). - * - * The actual memory allocated for the pbuf is determined by the - * layer at which the pbuf is allocated and the requested size - * (from the size parameter). - * - * @param flag this parameter decides how and where the pbuf - * should be allocated as follows: - * - * - PBUF_RAM: buffer memory for pbuf is allocated as one large - * chunk. This includes protocol headers as well. - * - PBUF_ROM: no buffer memory is allocated for the pbuf, even for - * protocol headers. Additional headers must be prepended - * by allocating another pbuf and chain in to the front of - * the ROM pbuf. It is assumed that the memory used is really - * similar to ROM in that it is immutable and will not be - * changed. Memory which is dynamic should generally not - * be attached to PBUF_ROM pbufs. Use PBUF_REF instead. - * - PBUF_REF: no buffer memory is allocated for the pbuf, even for - * protocol headers. It is assumed that the pbuf is only - * being used in a single thread. If the pbuf gets queued, - * then pbuf_take should be called to copy the buffer. - * - PBUF_POOL: the pbuf is allocated as a pbuf chain, with pbufs from - * the pbuf pool that is allocated during pbuf_init(). - * - * @return the allocated pbuf. If multiple pbufs where allocated, this - * is the first pbuf of a pbuf chain. - */ -struct pbuf * -pbuf_alloc(pbuf_layer l, u16_t length, pbuf_flag flag) -{ - struct pbuf *p, *q, *r; - u16_t offset; - s32_t rem_len; /* remaining length */ - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 3, ("pbuf_alloc(length=%"U16_F")\n", length)); - - /* determine header offset */ - offset = 0; - switch (l) { - case PBUF_TRANSPORT: - /* add room for transport (often TCP) layer header */ - offset += PBUF_TRANSPORT_HLEN; - /* FALLTHROUGH */ - case PBUF_IP: - /* add room for IP layer header */ - offset += PBUF_IP_HLEN; - /* FALLTHROUGH */ - case PBUF_LINK: - /* add room for link layer header */ - offset += PBUF_LINK_HLEN; - break; - case PBUF_RAW: - break; - default: - LWIP_ASSERT("pbuf_alloc: bad pbuf layer", 0); - return NULL; - } - - switch (flag) { - case PBUF_POOL: - /* allocate head of pbuf chain into p */ - p = pbuf_pool_alloc(); - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 3, ("pbuf_alloc: allocated pbuf %p\n", (void *)p)); - if (p == NULL) { -#if PBUF_STATS - ++lwip_stats.pbuf.err; -#endif /* PBUF_STATS */ - return NULL; - } - p->next = NULL; - - /* make the payload pointer point 'offset' bytes into pbuf data memory */ - p->payload = MEM_ALIGN((void *)((u8_t *)p + (sizeof(struct pbuf) + offset))); - LWIP_ASSERT("pbuf_alloc: pbuf p->payload properly aligned", - ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0); - /* the total length of the pbuf chain is the requested size */ - p->tot_len = length; - /* set the length of the first pbuf in the chain */ - p->len = length > PBUF_POOL_BUFSIZE - offset? PBUF_POOL_BUFSIZE - offset: length; - /* set reference count (needed here in case we fail) */ - p->ref = 1; - - /* now allocate the tail of the pbuf chain */ - - /* remember first pbuf for linkage in next iteration */ - r = p; - /* remaining length to be allocated */ - rem_len = length - p->len; - /* any remaining pbufs to be allocated? */ - while (rem_len > 0) { - q = pbuf_pool_alloc(); - if (q == NULL) { - LWIP_DEBUGF(PBUF_DEBUG | 2, ("pbuf_alloc: Out of pbufs in pool.\n")); -#if PBUF_STATS - ++lwip_stats.pbuf.err; -#endif /* PBUF_STATS */ - /* free chain so far allocated */ - pbuf_free(p); - /* bail out unsuccesfully */ - return NULL; - } - q->next = NULL; - /* make previous pbuf point to this pbuf */ - r->next = q; - /* set total length of this pbuf and next in chain */ - q->tot_len = rem_len; - /* this pbuf length is pool size, unless smaller sized tail */ - q->len = rem_len > PBUF_POOL_BUFSIZE? PBUF_POOL_BUFSIZE: rem_len; - q->payload = (void *)((u8_t *)q + sizeof(struct pbuf)); - LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned", - ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0); - q->ref = 1; - /* calculate remaining length to be allocated */ - rem_len -= q->len; - /* remember this pbuf for linkage in next iteration */ - r = q; - } - /* end of chain */ - /*r->next = NULL;*/ - - break; - case PBUF_RAM: - /* If pbuf is to be allocated in RAM, allocate memory for it. */ - p = mem_malloc(MEM_ALIGN_SIZE(sizeof(struct pbuf) + offset) + MEM_ALIGN_SIZE(length)); - if (p == NULL) { - return NULL; - } - /* Set up internal structure of the pbuf. */ - p->payload = MEM_ALIGN((void *)((u8_t *)p + sizeof(struct pbuf) + offset)); - p->len = p->tot_len = length; - p->next = NULL; - p->flags = PBUF_FLAG_RAM; - - LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned", - ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0); - break; - /* pbuf references existing (non-volatile static constant) ROM payload? */ - case PBUF_ROM: - /* pbuf references existing (externally allocated) RAM payload? */ - case PBUF_REF: - /* only allocate memory for the pbuf structure */ - p = memp_malloc(MEMP_PBUF); - if (p == NULL) { - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 2, ("pbuf_alloc: Could not allocate MEMP_PBUF for PBUF_%s.\n", flag == PBUF_ROM?"ROM":"REF")); - return NULL; - } - /* caller must set this field properly, afterwards */ - p->payload = NULL; - p->len = p->tot_len = length; - p->next = NULL; - p->flags = (flag == PBUF_ROM? PBUF_FLAG_ROM: PBUF_FLAG_REF); - break; - default: - LWIP_ASSERT("pbuf_alloc: erroneous flag", 0); - return NULL; - } - /* set reference count */ - p->ref = 1; - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 3, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p)); - return p; -} - - -#if PBUF_STATS -#define DEC_PBUF_STATS do { --lwip_stats.pbuf.used; } while (0) -#else /* PBUF_STATS */ -#define DEC_PBUF_STATS -#endif /* PBUF_STATS */ - -#define PBUF_POOL_FAST_FREE(p) do { \ - p->next = pbuf_pool; \ - pbuf_pool = p; \ - DEC_PBUF_STATS; \ - } while (0) - -#if SYS_LIGHTWEIGHT_PROT -#define PBUF_POOL_FREE(p) do { \ - SYS_ARCH_DECL_PROTECT(old_level); \ - SYS_ARCH_PROTECT(old_level); \ - PBUF_POOL_FAST_FREE(p); \ - SYS_ARCH_UNPROTECT(old_level); \ - } while (0) -#else /* SYS_LIGHTWEIGHT_PROT */ -#define PBUF_POOL_FREE(p) do { \ - sys_sem_wait(pbuf_pool_free_sem); \ - PBUF_POOL_FAST_FREE(p); \ - sys_sem_signal(pbuf_pool_free_sem); \ - } while (0) -#endif /* SYS_LIGHTWEIGHT_PROT */ - -/** - * Shrink a pbuf chain to a desired length. - * - * @param p pbuf to shrink. - * @param new_len desired new length of pbuf chain - * - * Depending on the desired length, the first few pbufs in a chain might - * be skipped and left unchanged. The new last pbuf in the chain will be - * resized, and any remaining pbufs will be freed. - * - * @note If the pbuf is ROM/REF, only the ->tot_len and ->len fields are adjusted. - * @note May not be called on a packet queue. - * - * @bug Cannot grow the size of a pbuf (chain) (yet). - */ -void -pbuf_realloc(struct pbuf *p, u16_t new_len) -{ - struct pbuf *q; - u16_t rem_len; /* remaining length */ - s16_t grow; - - LWIP_ASSERT("pbuf_realloc: sane p->flags", p->flags == PBUF_FLAG_POOL || - p->flags == PBUF_FLAG_ROM || - p->flags == PBUF_FLAG_RAM || - p->flags == PBUF_FLAG_REF); - - /* desired length larger than current length? */ - if (new_len >= p->tot_len) { - /* enlarging not yet supported */ - return; - } - - /* the pbuf chain grows by (new_len - p->tot_len) bytes - * (which may be negative in case of shrinking) */ - grow = new_len - p->tot_len; - - /* first, step over any pbufs that should remain in the chain */ - rem_len = new_len; - q = p; - /* should this pbuf be kept? */ - while (rem_len > q->len) { - /* decrease remaining length by pbuf length */ - rem_len -= q->len; - /* decrease total length indicator */ - q->tot_len += grow; - /* proceed to next pbuf in chain */ - q = q->next; - } - /* we have now reached the new last pbuf (in q) */ - /* rem_len == desired length for pbuf q */ - - /* shrink allocated memory for PBUF_RAM */ - /* (other types merely adjust their length fields */ - if ((q->flags == PBUF_FLAG_RAM) && (rem_len != q->len)) { - /* reallocate and adjust the length of the pbuf that will be split */ - mem_realloc(q, (u8_t *)q->payload - (u8_t *)q + rem_len); - } - /* adjust length fields for new last pbuf */ - q->len = rem_len; - q->tot_len = q->len; - - /* any remaining pbufs in chain? */ - if (q->next != NULL) { - /* free remaining pbufs in chain */ - pbuf_free(q->next); - } - /* q is last packet in chain */ - q->next = NULL; - -} - -/** - * Adjusts the payload pointer to hide or reveal headers in the payload. - * - * Adjusts the ->payload pointer so that space for a header - * (dis)appears in the pbuf payload. - * - * The ->payload, ->tot_len and ->len fields are adjusted. - * - * @param hdr_size_inc Number of bytes to increment header size which - * increases the size of the pbuf. New space is on the front. - * (Using a negative value decreases the header size.) - * If hdr_size_inc is 0, this function does nothing and returns succesful. - * - * PBUF_ROM and PBUF_REF type buffers cannot have their sizes increased, so - * the call will fail. A check is made that the increase in header size does - * not move the payload pointer in front of the start of the buffer. - * @return non-zero on failure, zero on success. - * - */ -u8_t -pbuf_header(struct pbuf *p, s16_t header_size_increment) -{ - void *payload; - - LWIP_ASSERT("p != NULL", p != NULL); - if ((header_size_increment == 0) || (p == NULL)) return 0; - - /* remember current payload pointer */ - payload = p->payload; - - /* pbuf types containing payloads? */ - if (p->flags == PBUF_FLAG_RAM || p->flags == PBUF_FLAG_POOL) { - /* set new payload pointer */ - p->payload = (u8_t *)p->payload - header_size_increment; - /* boundary check fails? */ - if ((u8_t *)p->payload < (u8_t *)p + sizeof(struct pbuf)) { - LWIP_DEBUGF( PBUF_DEBUG | 2, ("pbuf_header: failed as %p < %p (not enough space for new header size)\n", - (void *)p->payload, - (void *)(p + 1)));\ - /* restore old payload pointer */ - p->payload = payload; - /* bail out unsuccesfully */ - return 1; - } - /* pbuf types refering to external payloads? */ - } else if (p->flags == PBUF_FLAG_REF || p->flags == PBUF_FLAG_ROM) { - /* hide a header in the payload? */ - if ((header_size_increment < 0) && (header_size_increment - p->len <= 0)) { - /* increase payload pointer */ - p->payload = (u8_t *)p->payload - header_size_increment; - } else { - /* cannot expand payload to front (yet!) - * bail out unsuccesfully */ - return 1; - } - } - /* modify pbuf length fields */ - p->len += header_size_increment; - p->tot_len += header_size_increment; - - LWIP_DEBUGF( PBUF_DEBUG, ("pbuf_header: old %p new %p (%"S16_F")\n", - (void *)payload, (void *)p->payload, header_size_increment)); - - return 0; -} - -/** - * Dereference a pbuf chain or queue and deallocate any no-longer-used - * pbufs at the head of this chain or queue. - * - * Decrements the pbuf reference count. If it reaches zero, the pbuf is - * deallocated. - * - * For a pbuf chain, this is repeated for each pbuf in the chain, - * up to the first pbuf which has a non-zero reference count after - * decrementing. So, when all reference counts are one, the whole - * chain is free'd. - * - * @param pbuf The pbuf (chain) to be dereferenced. - * - * @return the number of pbufs that were de-allocated - * from the head of the chain. - * - * @note MUST NOT be called on a packet queue (Not verified to work yet). - * @note the reference counter of a pbuf equals the number of pointers - * that refer to the pbuf (or into the pbuf). - * - * @internal examples: - * - * Assuming existing chains a->b->c with the following reference - * counts, calling pbuf_free(a) results in: - * - * 1->2->3 becomes ...1->3 - * 3->3->3 becomes 2->3->3 - * 1->1->2 becomes ......1 - * 2->1->1 becomes 1->1->1 - * 1->1->1 becomes ....... - * - */ -u8_t -pbuf_free(struct pbuf *p) -{ - struct pbuf *q; - u8_t count; - SYS_ARCH_DECL_PROTECT(old_level); - - LWIP_ASSERT("p != NULL", p != NULL); - /* if assertions are disabled, proceed with debug output */ - if (p == NULL) { - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 2, ("pbuf_free(p == NULL) was called.\n")); - return 0; - } - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 3, ("pbuf_free(%p)\n", (void *)p)); - - PERF_START; - - LWIP_ASSERT("pbuf_free: sane flags", - p->flags == PBUF_FLAG_RAM || p->flags == PBUF_FLAG_ROM || - p->flags == PBUF_FLAG_REF || p->flags == PBUF_FLAG_POOL); - - count = 0; - /* Since decrementing ref cannot be guaranteed to be a single machine operation - * we must protect it. Also, the later test of ref must be protected. - */ - SYS_ARCH_PROTECT(old_level); - /* de-allocate all consecutive pbufs from the head of the chain that - * obtain a zero reference count after decrementing*/ - while (p != NULL) { - /* all pbufs in a chain are referenced at least once */ - LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0); - /* decrease reference count (number of pointers to pbuf) */ - p->ref--; - /* this pbuf is no longer referenced to? */ - if (p->ref == 0) { - /* remember next pbuf in chain for next iteration */ - q = p->next; - LWIP_DEBUGF( PBUF_DEBUG | 2, ("pbuf_free: deallocating %p\n", (void *)p)); - /* is this a pbuf from the pool? */ - if (p->flags == PBUF_FLAG_POOL) { - p->len = p->tot_len = PBUF_POOL_BUFSIZE; - p->payload = (void *)((u8_t *)p + sizeof(struct pbuf)); - PBUF_POOL_FREE(p); - /* is this a ROM or RAM referencing pbuf? */ - } else if (p->flags == PBUF_FLAG_ROM || p->flags == PBUF_FLAG_REF) { - memp_free(MEMP_PBUF, p); - /* p->flags == PBUF_FLAG_RAM */ - } else { - mem_free(p); - } - count++; - /* proceed to next pbuf */ - p = q; - /* p->ref > 0, this pbuf is still referenced to */ - /* (and so the remaining pbufs in chain as well) */ - } else { - LWIP_DEBUGF( PBUF_DEBUG | 2, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, (u16_t)p->ref)); - /* stop walking through the chain */ - p = NULL; - } - } - SYS_ARCH_UNPROTECT(old_level); - PERF_STOP("pbuf_free"); - /* return number of de-allocated pbufs */ - return count; -} - -/** - * Count number of pbufs in a chain - * - * @param p first pbuf of chain - * @return the number of pbufs in a chain - */ - -u8_t -pbuf_clen(struct pbuf *p) -{ - u8_t len; - - len = 0; - while (p != NULL) { - ++len; - p = p->next; - } - return len; -} - -/** - * Increment the reference count of the pbuf. - * - * @param p pbuf to increase reference counter of - * - */ -void -pbuf_ref(struct pbuf *p) -{ - SYS_ARCH_DECL_PROTECT(old_level); - /* pbuf given? */ - if (p != NULL) { - SYS_ARCH_PROTECT(old_level); - ++(p->ref); - SYS_ARCH_UNPROTECT(old_level); - } -} - -/** - * Concatenate two pbufs (each may be a pbuf chain) and take over - * the caller's reference of the tail pbuf. - * - * @note The caller MAY NOT reference the tail pbuf afterwards. - * Use pbuf_chain() for that purpose. - * - * @see pbuf_chain() - */ - -void -pbuf_cat(struct pbuf *h, struct pbuf *t) -{ - struct pbuf *p; - - LWIP_ASSERT("h != NULL (programmer violates API)", h != NULL); - LWIP_ASSERT("t != NULL (programmer violates API)", t != NULL); - if ((h == NULL) || (t == NULL)) return; - - /* proceed to last pbuf of chain */ - for (p = h; p->next != NULL; p = p->next) { - /* add total length of second chain to all totals of first chain */ - p->tot_len += t->tot_len; - } - /* { p is last pbuf of first h chain, p->next == NULL } */ - LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len); - LWIP_ASSERT("p->next == NULL", p->next == NULL); - /* add total length of second chain to last pbuf total of first chain */ - p->tot_len += t->tot_len; - /* chain last pbuf of head (p) with first of tail (t) */ - p->next = t; - /* p->next now references t, but the caller will drop its reference to t, - * so netto there is no change to the reference count of t. - */ -} - -/** - * Chain two pbufs (or pbuf chains) together. - * - * The caller MUST call pbuf_free(t) once it has stopped - * using it. Use pbuf_cat() instead if you no longer use t. - * - * @param h head pbuf (chain) - * @param t tail pbuf (chain) - * @note The pbufs MUST belong to the same packet. - * @note MAY NOT be called on a packet queue. - * - * The ->tot_len fields of all pbufs of the head chain are adjusted. - * The ->next field of the last pbuf of the head chain is adjusted. - * The ->ref field of the first pbuf of the tail chain is adjusted. - * - */ -void -pbuf_chain(struct pbuf *h, struct pbuf *t) -{ - pbuf_cat(h, t); - /* t is now referenced by h */ - pbuf_ref(t); - LWIP_DEBUGF(PBUF_DEBUG | DBG_FRESH | 2, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t)); -} - -/* For packet queueing. Note that queued packets MUST be dequeued first - * using pbuf_dequeue() before calling other pbuf_() functions. */ -#if ARP_QUEUEING -/** - * Add a packet to the end of a queue. - * - * @param q pointer to first packet on the queue - * @param n packet to be queued - * - * Both packets MUST be given, and must be different. - */ -void -pbuf_queue(struct pbuf *p, struct pbuf *n) -{ -#if PBUF_DEBUG /* remember head of queue */ - struct pbuf *q = p; -#endif - /* programmer stupidity checks */ - LWIP_ASSERT("p == NULL in pbuf_queue: this indicates a programmer error\n", p != NULL); - LWIP_ASSERT("n == NULL in pbuf_queue: this indicates a programmer error\n", n != NULL); - LWIP_ASSERT("p == n in pbuf_queue: this indicates a programmer error\n", p != n); - if ((p == NULL) || (n == NULL) || (p == n)){ - LWIP_DEBUGF(PBUF_DEBUG | DBG_HALT | 3, ("pbuf_queue: programmer argument error\n")); - return; - } - - /* iterate through all packets on queue */ - while (p->next != NULL) { -/* be very picky about pbuf chain correctness */ -#if PBUF_DEBUG - /* iterate through all pbufs in packet */ - while (p->tot_len != p->len) { - /* make sure invariant condition holds */ - LWIP_ASSERT("p->len < p->tot_len", p->len < p->tot_len); - /* make sure each packet is complete */ - LWIP_ASSERT("p->next != NULL", p->next != NULL); - p = p->next; - /* { p->tot_len == p->len => p is last pbuf of a packet } */ - } - /* { p is last pbuf of a packet } */ - /* proceed to next packet on queue */ -#endif - /* proceed to next pbuf */ - if (p->next != NULL) p = p->next; - } - /* { p->tot_len == p->len and p->next == NULL } ==> - * { p is last pbuf of last packet on queue } */ - /* chain last pbuf of queue with n */ - p->next = n; - /* n is now referenced to by the (packet p in the) queue */ - pbuf_ref(n); -#if PBUF_DEBUG - LWIP_DEBUGF(PBUF_DEBUG | DBG_FRESH | 2, - ("pbuf_queue: newly queued packet %p sits after packet %p in queue %p\n", - (void *)n, (void *)p, (void *)q)); -#endif -} - -/** - * Remove a packet from the head of a queue. - * - * The caller MUST reference the remainder of the queue (as returned). The - * caller MUST NOT call pbuf_ref() as it implicitly takes over the reference - * from p. - * - * @param p pointer to first packet on the queue which will be dequeued. - * @return first packet on the remaining queue (NULL if no further packets). - * - */ -struct pbuf * -pbuf_dequeue(struct pbuf *p) -{ - struct pbuf *q; - LWIP_ASSERT("p != NULL", p != NULL); - - /* iterate through all pbufs in packet p */ - while (p->tot_len != p->len) { - /* make sure invariant condition holds */ - LWIP_ASSERT("p->len < p->tot_len", p->len < p->tot_len); - /* make sure each packet is complete */ - LWIP_ASSERT("p->next != NULL", p->next != NULL); - p = p->next; - } - /* { p->tot_len == p->len } => p is the last pbuf of the first packet */ - /* remember next packet on queue in q */ - q = p->next; - /* dequeue packet p from queue */ - p->next = NULL; - /* any next packet on queue? */ - if (q != NULL) { - /* although q is no longer referenced by p, it MUST be referenced by - * the caller, who is maintaining this packet queue. So, we do not call - * pbuf_free(q) here, resulting in an implicit pbuf_ref(q) for the caller. */ - LWIP_DEBUGF(PBUF_DEBUG | DBG_FRESH | 2, ("pbuf_dequeue: first remaining packet on queue is %p\n", (void *)q)); - } else { - LWIP_DEBUGF(PBUF_DEBUG | DBG_FRESH | 2, ("pbuf_dequeue: no further packets on queue\n")); - } - return q; -} -#endif - -/** - * - * Create PBUF_POOL (or PBUF_RAM) copies of PBUF_REF pbufs. - * - * Used to queue packets on behalf of the lwIP stack, such as - * ARP based queueing. - * - * Go through a pbuf chain and replace any PBUF_REF buffers - * with PBUF_POOL (or PBUF_RAM) pbufs, each taking a copy of - * the referenced data. - * - * @note You MUST explicitly use p = pbuf_take(p); - * The pbuf you give as argument, may have been replaced - * by a (differently located) copy through pbuf_take()! - * - * @note Any replaced pbufs will be freed through pbuf_free(). - * This may deallocate them if they become no longer referenced. - * - * @param p Head of pbuf chain to process - * - * @return Pointer to head of pbuf chain - */ -struct pbuf * -pbuf_take(struct pbuf *p) -{ - struct pbuf *q , *prev, *head; - LWIP_ASSERT("pbuf_take: p != NULL\n", p != NULL); - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 3, ("pbuf_take(%p)\n", (void*)p)); - - prev = NULL; - head = p; - /* iterate through pbuf chain */ - do - { - /* pbuf is of type PBUF_REF? */ - if (p->flags == PBUF_FLAG_REF) { - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE, ("pbuf_take: encountered PBUF_REF %p\n", (void *)p)); - /* allocate a pbuf (w/ payload) fully in RAM */ - /* PBUF_POOL buffers are faster if we can use them */ - if (p->len <= PBUF_POOL_BUFSIZE) { - q = pbuf_alloc(PBUF_RAW, p->len, PBUF_POOL); - if (q == NULL) { - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 2, ("pbuf_take: Could not allocate PBUF_POOL\n")); - } - } else { - /* no replacement pbuf yet */ - q = NULL; - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 2, ("pbuf_take: PBUF_POOL too small to replace PBUF_REF\n")); - } - /* no (large enough) PBUF_POOL was available? retry with PBUF_RAM */ - if (q == NULL) { - q = pbuf_alloc(PBUF_RAW, p->len, PBUF_RAM); - if (q == NULL) { - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 2, ("pbuf_take: Could not allocate PBUF_RAM\n")); - } - } - /* replacement pbuf could be allocated? */ - if (q != NULL) - { - /* copy p to q */ - /* copy successor */ - q->next = p->next; - /* remove linkage from original pbuf */ - p->next = NULL; - /* remove linkage to original pbuf */ - if (prev != NULL) { - /* prev->next == p at this point */ - LWIP_ASSERT("prev->next == p", prev->next == p); - /* break chain and insert new pbuf instead */ - prev->next = q; - /* prev == NULL, so we replaced the head pbuf of the chain */ - } else { - head = q; - } - /* copy pbuf payload */ - memcpy(q->payload, p->payload, p->len); - q->tot_len = p->tot_len; - q->len = p->len; - /* in case p was the first pbuf, it is no longer refered to by - * our caller, as the caller MUST do p = pbuf_take(p); - * in case p was not the first pbuf, it is no longer refered to - * by prev. we can safely free the pbuf here. - * (note that we have set p->next to NULL already so that - * we will not free the rest of the chain by accident.) - */ - pbuf_free(p); - /* do not copy ref, since someone else might be using the old buffer */ - LWIP_DEBUGF(PBUF_DEBUG, ("pbuf_take: replaced PBUF_REF %p with %p\n", (void *)p, (void *)q)); - p = q; - } else { - /* deallocate chain */ - pbuf_free(head); - LWIP_DEBUGF(PBUF_DEBUG | 2, ("pbuf_take: failed to allocate replacement pbuf for %p\n", (void *)p)); - return NULL; - } - /* p->flags != PBUF_FLAG_REF */ - } else { - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 1, ("pbuf_take: skipping pbuf not of type PBUF_REF\n")); - } - /* remember this pbuf */ - prev = p; - /* proceed to next pbuf in original chain */ - p = p->next; - } while (p); - LWIP_DEBUGF(PBUF_DEBUG | DBG_TRACE | 1, ("pbuf_take: end of chain reached.\n")); - - return head; -} - -/** - * Dechains the first pbuf from its succeeding pbufs in the chain. - * - * Makes p->tot_len field equal to p->len. - * @param p pbuf to dechain - * @return remainder of the pbuf chain, or NULL if it was de-allocated. - * @note May not be called on a packet queue. - */ -struct pbuf * -pbuf_dechain(struct pbuf *p) -{ - struct pbuf *q; - u8_t tail_gone = 1; - /* tail */ - q = p->next; - /* pbuf has successor in chain? */ - if (q != NULL) { - /* assert tot_len invariant: (p->tot_len == p->len + (p->next? p->next->tot_len: 0) */ - LWIP_ASSERT("p->tot_len == p->len + q->tot_len", q->tot_len == p->tot_len - p->len); - /* enforce invariant if assertion is disabled */ - q->tot_len = p->tot_len - p->len; - /* decouple pbuf from remainder */ - p->next = NULL; - /* total length of pbuf p is its own length only */ - p->tot_len = p->len; - /* q is no longer referenced by p, free it */ - LWIP_DEBUGF(PBUF_DEBUG | DBG_STATE, ("pbuf_dechain: unreferencing %p\n", (void *)q)); - tail_gone = pbuf_free(q); - if (tail_gone > 0) { - LWIP_DEBUGF(PBUF_DEBUG | DBG_STATE, - ("pbuf_dechain: deallocated %p (as it is no longer referenced)\n", (void *)q)); - } - /* return remaining tail or NULL if deallocated */ - } - /* assert tot_len invariant: (p->tot_len == p->len + (p->next? p->next->tot_len: 0) */ - LWIP_ASSERT("p->tot_len == p->len", p->tot_len == p->len); - return (tail_gone > 0? NULL: q); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/raw.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/raw.c deleted file mode 100644 index 30199804..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/raw.c +++ /dev/null @@ -1,326 +0,0 @@ -/** - * @file - * - * Implementation of raw protocol PCBs for low-level handling of - * different types of protocols besides (or overriding) those - * already available in lwIP. - * - */ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include - -#include "lwip/opt.h" - -#include "lwip/def.h" -#include "lwip/memp.h" -#include "lwip/inet.h" -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/raw.h" - -#include "lwip/stats.h" - -#include "arch/perf.h" -#include "lwip/snmp.h" - -#if LWIP_RAW - -/** The list of RAW PCBs */ -static struct raw_pcb *raw_pcbs = NULL; - -void -raw_init(void) -{ - raw_pcbs = NULL; -} - -/** - * Determine if in incoming IP packet is covered by a RAW PCB - * and if so, pass it to a user-provided receive callback function. - * - * Given an incoming IP datagram (as a chain of pbufs) this function - * finds a corresponding RAW PCB and calls the corresponding receive - * callback function. - * - * @param pbuf pbuf to be demultiplexed to a RAW PCB. - * @param netif network interface on which the datagram was received. - * @Return - 1 if the packet has been eaten by a RAW PCB receive - * callback function. The caller MAY NOT not reference the - * packet any longer, and MAY NOT call pbuf_free(). - * @return - 0 if packet is not eaten (pbuf is still referenced by the - * caller). - * - */ -u8_t -raw_input(struct pbuf *p, struct netif *inp) -{ - struct raw_pcb *pcb; - struct ip_hdr *iphdr; - s16_t proto; - u8_t eaten = 0; - - iphdr = p->payload; - proto = IPH_PROTO(iphdr); - - pcb = raw_pcbs; - /* loop through all raw pcbs until the packet is eaten by one */ - /* this allows multiple pcbs to match against the packet by design */ - while ((eaten == 0) && (pcb != NULL)) { - if (pcb->protocol == proto) { - /* receive callback function available? */ - if (pcb->recv != NULL) { - /* the receive callback function did not eat the packet? */ - if (pcb->recv(pcb->recv_arg, pcb, p, &(iphdr->src)) != 0) - { - /* receive function ate the packet */ - p = NULL; - eaten = 1; - } - } - /* no receive callback function was set for this raw PCB */ - /* drop the packet */ - } - pcb = pcb->next; - } - return eaten; -} - -/** - * Bind a RAW PCB. - * - * @param pcb RAW PCB to be bound with a local address ipaddr. - * @param ipaddr local IP address to bind with. Use IP_ADDR_ANY to - * bind to all local interfaces. - * - * @return lwIP error code. - * - ERR_OK. Successful. No error occured. - * - ERR_USE. The specified IP address is already bound to by - * another RAW PCB. - * - * @see raw_disconnect() - */ -err_t -raw_bind(struct raw_pcb *pcb, struct ip_addr *ipaddr) -{ - ip_addr_set(&pcb->local_ip, ipaddr); - return ERR_OK; -} - -/** - * Connect an RAW PCB. This function is required by upper layers - * of lwip. Using the raw api you could use raw_sendto() instead - * - * This will associate the RAW PCB with the remote address. - * - * @param pcb RAW PCB to be connected with remote address ipaddr and port. - * @param ipaddr remote IP address to connect with. - * - * @return lwIP error code - * - * @see raw_disconnect() and raw_sendto() - */ -err_t -raw_connect(struct raw_pcb *pcb, struct ip_addr *ipaddr) -{ - ip_addr_set(&pcb->remote_ip, ipaddr); - return ERR_OK; -} - - -/** - * Set the callback function for received packets that match the - * raw PCB's protocol and binding. - * - * The callback function MUST either - * - eat the packet by calling pbuf_free() and returning non-zero. The - * packet will not be passed to other raw PCBs or other protocol layers. - * - not free the packet, and return zero. The packet will be matched - * against further PCBs and/or forwarded to another protocol layers. - * - * @return non-zero if the packet was free()d, zero if the packet remains - * available for others. - */ -void -raw_recv(struct raw_pcb *pcb, - u8_t (* recv)(void *arg, struct raw_pcb *upcb, struct pbuf *p, - struct ip_addr *addr), - void *recv_arg) -{ - /* remember recv() callback and user data */ - pcb->recv = recv; - pcb->recv_arg = recv_arg; -} - -/** - * Send the raw IP packet to the given address. Note that actually you cannot - * modify the IP headers (this is inconsistent with the receive callback where - * you actually get the IP headers), you can only specify the IP payload here. - * It requires some more changes in lwIP. (there will be a raw_send() function - * then.) - * - * @param pcb the raw pcb which to send - * @param p the IP payload to send - * @param ipaddr the destination address of the IP packet - * - */ -err_t -raw_sendto(struct raw_pcb *pcb, struct pbuf *p, struct ip_addr *ipaddr) -{ - err_t err; - struct netif *netif; - struct ip_addr *src_ip; - struct pbuf *q; /* q will be sent down the stack */ - - LWIP_DEBUGF(RAW_DEBUG | DBG_TRACE | 3, ("raw_sendto\n")); - - /* not enough space to add an IP header to first pbuf in given p chain? */ - if (pbuf_header(p, IP_HLEN)) { - /* allocate header in new pbuf */ - q = pbuf_alloc(PBUF_IP, 0, PBUF_RAM); - /* new header pbuf could not be allocated? */ - if (q == NULL) { - LWIP_DEBUGF(RAW_DEBUG | DBG_TRACE | 2, ("raw_sendto: could not allocate header\n")); - return ERR_MEM; - } - /* chain header q in front of given pbuf p */ - pbuf_chain(q, p); - /* { first pbuf q points to header pbuf } */ - LWIP_DEBUGF(RAW_DEBUG, ("raw_sendto: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p)); - } else { - /* first pbuf q equals given pbuf */ - q = p; - pbuf_header(q, -IP_HLEN); - } - - if ((netif = ip_route(ipaddr)) == NULL) { - LWIP_DEBUGF(RAW_DEBUG | 1, ("raw_sendto: No route to 0x%"X32_F"\n", ipaddr->addr)); -#if RAW_STATS - /* ++lwip_stats.raw.rterr;*/ -#endif /* RAW_STATS */ - /* free any temporary header pbuf allocated by pbuf_header() */ - if (q != p) { - pbuf_free(q); - } - return ERR_RTE; - } - - if (ip_addr_isany(&pcb->local_ip)) { - /* use outgoing network interface IP address as source address */ - src_ip = &(netif->ip_addr); - } else { - /* use RAW PCB local IP address as source address */ - src_ip = &(pcb->local_ip); - } - - err = ip_output_if (q, src_ip, ipaddr, pcb->ttl, pcb->tos, pcb->protocol, netif); - - /* did we chain a header earlier? */ - if (q != p) { - /* free the header */ - pbuf_free(q); - } - return err; -} - -/** - * Send the raw IP packet to the address given by raw_connect() - * - * @param pcb the raw pcb which to send - * @param p the IP payload to send - * @param ipaddr the destination address of the IP packet - * - */ -err_t -raw_send(struct raw_pcb *pcb, struct pbuf *p) -{ - return raw_sendto(pcb, p, &pcb->remote_ip); -} - -/** - * Remove an RAW PCB. - * - * @param pcb RAW PCB to be removed. The PCB is removed from the list of - * RAW PCB's and the data structure is freed from memory. - * - * @see raw_new() - */ -void -raw_remove(struct raw_pcb *pcb) -{ - struct raw_pcb *pcb2; - /* pcb to be removed is first in list? */ - if (raw_pcbs == pcb) { - /* make list start at 2nd pcb */ - raw_pcbs = raw_pcbs->next; - /* pcb not 1st in list */ - } else for(pcb2 = raw_pcbs; pcb2 != NULL; pcb2 = pcb2->next) { - /* find pcb in raw_pcbs list */ - if (pcb2->next != NULL && pcb2->next == pcb) { - /* remove pcb from list */ - pcb2->next = pcb->next; - } - } - memp_free(MEMP_RAW_PCB, pcb); -} - -/** - * Create a RAW PCB. - * - * @return The RAW PCB which was created. NULL if the PCB data structure - * could not be allocated. - * - * @param proto the protocol number of the IPs payload (e.g. IP_PROTO_ICMP) - * - * @see raw_remove() - */ -struct raw_pcb * -raw_new(u16_t proto) { - struct raw_pcb *pcb; - - LWIP_DEBUGF(RAW_DEBUG | DBG_TRACE | 3, ("raw_new\n")); - - pcb = memp_malloc(MEMP_RAW_PCB); - /* could allocate RAW PCB? */ - if (pcb != NULL) { - /* initialize PCB to all zeroes */ - memset(pcb, 0, sizeof(struct raw_pcb)); - pcb->protocol = proto; - pcb->ttl = RAW_TTL; - pcb->next = raw_pcbs; - raw_pcbs = pcb; - } - return pcb; -} - -#endif /* LWIP_RAW */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/stats.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/stats.c deleted file mode 100644 index c94623f7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/stats.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include - -#include "lwip/opt.h" - -#include "lwip/def.h" - -#include "lwip/stats.h" -#include "lwip/mem.h" - - -#if LWIP_STATS -struct stats_ lwip_stats; - -void -stats_init(void) -{ - memset(&lwip_stats, 0, sizeof(struct stats_)); -} -#if LWIP_STATS_DISPLAY -void -stats_display_proto(struct stats_proto *proto, char *name) -{ - LWIP_PLATFORM_DIAG(("\n%s\n\t", name)); - LWIP_PLATFORM_DIAG(("xmit: %"S16_F"\n\t", proto->xmit)); - LWIP_PLATFORM_DIAG(("rexmit: %"S16_F"\n\t", proto->rexmit)); - LWIP_PLATFORM_DIAG(("recv: %"S16_F"\n\t", proto->recv)); - LWIP_PLATFORM_DIAG(("fw: %"S16_F"\n\t", proto->fw)); - LWIP_PLATFORM_DIAG(("drop: %"S16_F"\n\t", proto->drop)); - LWIP_PLATFORM_DIAG(("chkerr: %"S16_F"\n\t", proto->chkerr)); - LWIP_PLATFORM_DIAG(("lenerr: %"S16_F"\n\t", proto->lenerr)); - LWIP_PLATFORM_DIAG(("memerr: %"S16_F"\n\t", proto->memerr)); - LWIP_PLATFORM_DIAG(("rterr: %"S16_F"\n\t", proto->rterr)); - LWIP_PLATFORM_DIAG(("proterr: %"S16_F"\n\t", proto->proterr)); - LWIP_PLATFORM_DIAG(("opterr: %"S16_F"\n\t", proto->opterr)); - LWIP_PLATFORM_DIAG(("err: %"S16_F"\n\t", proto->err)); - LWIP_PLATFORM_DIAG(("cachehit: %"S16_F"\n", proto->cachehit)); -} - -void -stats_display_pbuf(struct stats_pbuf *pbuf) -{ - LWIP_PLATFORM_DIAG(("\nPBUF\n\t")); - LWIP_PLATFORM_DIAG(("avail: %"S16_F"\n\t", pbuf->avail)); - LWIP_PLATFORM_DIAG(("used: %"S16_F"\n\t", pbuf->used)); - LWIP_PLATFORM_DIAG(("max: %"S16_F"\n\t", pbuf->max)); - LWIP_PLATFORM_DIAG(("err: %"S16_F"\n\t", pbuf->err)); - LWIP_PLATFORM_DIAG(("alloc_locked: %"S16_F"\n\t", pbuf->alloc_locked)); - LWIP_PLATFORM_DIAG(("refresh_locked: %"S16_F"\n", pbuf->refresh_locked)); -} - -void -stats_display_mem(struct stats_mem *mem, char *name) -{ - LWIP_PLATFORM_DIAG(("\n MEM %s\n\t", name)); - LWIP_PLATFORM_DIAG(("avail: %"S16_F"\n\t", mem->avail)); - LWIP_PLATFORM_DIAG(("used: %"S16_F"\n\t", mem->used)); - LWIP_PLATFORM_DIAG(("max: %"S16_F"\n\t", mem->max)); - LWIP_PLATFORM_DIAG(("err: %"S16_F"\n", mem->err)); - -} - -void -stats_display(void) -{ - s16_t i; - char * memp_names[] = {"PBUF", "RAW_PCB", "UDP_PCB", "TCP_PCB", "TCP_PCB_LISTEN", - "TCP_SEG", "NETBUF", "NETCONN", "API_MSG", "TCP_MSG", "TIMEOUT"}; - stats_display_proto(&lwip_stats.link, "LINK"); - stats_display_proto(&lwip_stats.ip_frag, "IP_FRAG"); - stats_display_proto(&lwip_stats.ip, "IP"); - stats_display_proto(&lwip_stats.icmp, "ICMP"); - stats_display_proto(&lwip_stats.udp, "UDP"); - stats_display_proto(&lwip_stats.tcp, "TCP"); - stats_display_pbuf(&lwip_stats.pbuf); - stats_display_mem(&lwip_stats.mem, "HEAP"); - for (i = 0; i < MEMP_MAX; i++) { - stats_display_mem(&lwip_stats.memp[i], memp_names[i]); - } - -} -#endif /* LWIP_STATS_DISPLAY */ -#endif /* LWIP_STATS */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/sys.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/sys.c deleted file mode 100644 index a7dbf34d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/sys.c +++ /dev/null @@ -1,294 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/sys.h" -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/memp.h" - -#if (NO_SYS == 0) - -struct sswt_cb -{ - s16_t timeflag; - sys_sem_t *psem; -}; - - - -void -sys_mbox_fetch(sys_mbox_t mbox, void **msg) -{ - u32_t time; - struct sys_timeouts *timeouts; - struct sys_timeout *tmptimeout; - sys_timeout_handler h; - void *arg; - - - again: - timeouts = sys_arch_timeouts(); - - if (!timeouts || !timeouts->next) { - sys_arch_mbox_fetch(mbox, msg, 0); - } else { - if (timeouts->next->time > 0) { - time = sys_arch_mbox_fetch(mbox, msg, timeouts->next->time); - } else { - time = SYS_ARCH_TIMEOUT; - } - - if (time == SYS_ARCH_TIMEOUT) { - /* If time == SYS_ARCH_TIMEOUT, a timeout occured before a message - could be fetched. We should now call the timeout handler and - deallocate the memory allocated for the timeout. */ - tmptimeout = timeouts->next; - timeouts->next = tmptimeout->next; - h = tmptimeout->h; - arg = tmptimeout->arg; - memp_free(MEMP_SYS_TIMEOUT, tmptimeout); - if (h != NULL) { - LWIP_DEBUGF(SYS_DEBUG, ("smf calling h=%p(%p)\n", (void *)h, (void *)arg)); - h(arg); - } - - /* We try again to fetch a message from the mbox. */ - goto again; - } else { - /* If time != SYS_ARCH_TIMEOUT, a message was received before the timeout - occured. The time variable is set to the number of - milliseconds we waited for the message. */ - if (time <= timeouts->next->time) { - timeouts->next->time -= time; - } else { - timeouts->next->time = 0; - } - } - - } -} - -void -sys_sem_wait(sys_sem_t sem) -{ - u32_t time; - struct sys_timeouts *timeouts; - struct sys_timeout *tmptimeout; - sys_timeout_handler h; - void *arg; - - /* while (sys_arch_sem_wait(sem, 1000) == 0); - return;*/ - - again: - - timeouts = sys_arch_timeouts(); - - if (!timeouts || !timeouts->next) { - sys_arch_sem_wait(sem, 0); - } else { - if (timeouts->next->time > 0) { - time = sys_arch_sem_wait(sem, timeouts->next->time); - } else { - time = SYS_ARCH_TIMEOUT; - } - - if (time == SYS_ARCH_TIMEOUT) { - /* If time == SYS_ARCH_TIMEOUT, a timeout occured before a message - could be fetched. We should now call the timeout handler and - deallocate the memory allocated for the timeout. */ - tmptimeout = timeouts->next; - timeouts->next = tmptimeout->next; - h = tmptimeout->h; - arg = tmptimeout->arg; - memp_free(MEMP_SYS_TIMEOUT, tmptimeout); - if (h != NULL) { - LWIP_DEBUGF(SYS_DEBUG, ("ssw h=%p(%p)\n", (void *)h, (void *)arg)); - h(arg); - } - - - /* We try again to fetch a message from the mbox. */ - goto again; - } else { - /* If time != SYS_ARCH_TIMEOUT, a message was received before the timeout - occured. The time variable is set to the number of - milliseconds we waited for the message. */ - if (time <= timeouts->next->time) { - timeouts->next->time -= time; - } else { - timeouts->next->time = 0; - } - } - - } -} - -void -sys_timeout(u32_t msecs, sys_timeout_handler h, void *arg) -{ - struct sys_timeouts *timeouts; - struct sys_timeout *timeout, *t; - - timeout = memp_malloc(MEMP_SYS_TIMEOUT); - if (timeout == NULL) { - return; - } - timeout->next = NULL; - timeout->h = h; - timeout->arg = arg; - timeout->time = msecs; - - timeouts = sys_arch_timeouts(); - - LWIP_DEBUGF(SYS_DEBUG, ("sys_timeout: %p msecs=%"U32_F" h=%p arg=%p\n", - (void *)timeout, msecs, (void *)h, (void *)arg)); - - LWIP_ASSERT("sys_timeout: timeouts != NULL", timeouts != NULL); - - if (timeouts->next == NULL) { - timeouts->next = timeout; - return; - } - - if (timeouts->next->time > msecs) { - timeouts->next->time -= msecs; - timeout->next = timeouts->next; - timeouts->next = timeout; - } else { - for(t = timeouts->next; t != NULL; t = t->next) { - timeout->time -= t->time; - if (t->next == NULL || t->next->time > timeout->time) { - if (t->next != NULL) { - t->next->time -= timeout->time; - } - timeout->next = t->next; - t->next = timeout; - break; - } - } - } - -} - -/* Go through timeout list (for this task only) and remove the first matching entry, - even though the timeout has not triggered yet. -*/ - -void -sys_untimeout(sys_timeout_handler h, void *arg) -{ - struct sys_timeouts *timeouts; - struct sys_timeout *prev_t, *t; - - timeouts = sys_arch_timeouts(); - - if (timeouts->next == NULL) - return; - - for (t = timeouts->next, prev_t = NULL; t != NULL; prev_t = t, t = t->next) - { - if ((t->h == h) && (t->arg == arg)) - { - /* We have a match */ - /* Unlink from previous in list */ - if (prev_t == NULL) - timeouts->next = t->next; - else - prev_t->next = t->next; - /* If not the last one, add time of this one back to next */ - if (t->next != NULL) - t->next->time += t->time; - memp_free(MEMP_SYS_TIMEOUT, t); - return; - } - } - return; -} - - - - - -static void -sswt_handler(void *arg) -{ - struct sswt_cb *sswt_cb = (struct sswt_cb *) arg; - - /* Timeout. Set flag to TRUE and signal semaphore */ - sswt_cb->timeflag = 1; - sys_sem_signal(*(sswt_cb->psem)); -} - -/* Wait for a semaphore with timeout (specified in ms) */ -/* timeout = 0: wait forever */ -/* Returns 0 on timeout. 1 otherwise */ - -int -sys_sem_wait_timeout(sys_sem_t sem, u32_t timeout) -{ - struct sswt_cb sswt_cb; - - sswt_cb.psem = &sem; - sswt_cb.timeflag = 0; - - /* If timeout is zero, then just wait forever */ - if (timeout > 0) - /* Create a timer and pass it the address of our flag */ - sys_timeout(timeout, sswt_handler, &sswt_cb); - sys_sem_wait(sem); - /* Was it a timeout? */ - if (sswt_cb.timeflag) - { - /* timeout */ - return 0; - } else { - /* Not a timeout. Remove timeout entry */ - sys_untimeout(sswt_handler, &sswt_cb); - return 1; - } - -} - - -void -sys_msleep(u32_t ms) -{ - sys_sem_t delaysem = sys_sem_new(0); - - sys_sem_wait_timeout(delaysem, ms); - - sys_sem_free(delaysem); -} - - -#endif /* NO_SYS */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/tcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/tcp.c deleted file mode 100644 index 41a9edb4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/tcp.c +++ /dev/null @@ -1,1171 +0,0 @@ -/** - * @file - * - * Transmission Control Protocol for IP - * - * This file contains common functions for the TCP implementation, such as functinos - * for manipulating the data structures and the TCP timer functions. TCP functions - * related to input and output is found in tcp_in.c and tcp_out.c respectively. - * - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include - -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/mem.h" -#include "lwip/memp.h" - -#include "lwip/tcp.h" -#if LWIP_TCP - -/* Incremented every coarse grained timer shot - (typically every 500 ms, determined by TCP_COARSE_TIMEOUT). */ -u32_t tcp_ticks; -const u8_t tcp_backoff[13] = - { 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7}; - -/* The TCP PCB lists. */ - -/** List of all TCP PCBs in LISTEN state */ -union tcp_listen_pcbs_t tcp_listen_pcbs; -/** List of all TCP PCBs that are in a state in which - * they accept or send data. */ -struct tcp_pcb *tcp_active_pcbs; -/** List of all TCP PCBs in TIME-WAIT state */ -struct tcp_pcb *tcp_tw_pcbs; - -struct tcp_pcb *tcp_tmp_pcb; - -static u8_t tcp_timer; -static u16_t tcp_new_port(void); - -/** - * Initializes the TCP layer. - */ -void -tcp_init(void) -{ - /* Clear globals. */ - tcp_listen_pcbs.listen_pcbs = NULL; - tcp_active_pcbs = NULL; - tcp_tw_pcbs = NULL; - tcp_tmp_pcb = NULL; - - /* initialize timer */ - tcp_ticks = 0; - tcp_timer = 0; - -} - -/** - * Called periodically to dispatch TCP timers. - * - */ -void -tcp_tmr(void) -{ - /* Call tcp_fasttmr() every 250 ms */ - tcp_fasttmr(); - - if (++tcp_timer & 1) { - /* Call tcp_tmr() every 500 ms, i.e., every other timer - tcp_tmr() is called. */ - tcp_slowtmr(); - } -} - -/** - * Closes the connection held by the PCB. - * - */ -err_t -tcp_close(struct tcp_pcb *pcb) -{ - err_t err; - -#if TCP_DEBUG - LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in state ")); - tcp_debug_print_state(pcb->state); - LWIP_DEBUGF(TCP_DEBUG, ("\n")); -#endif /* TCP_DEBUG */ - switch (pcb->state) { - case CLOSED: - /* Closing a pcb in the CLOSED state might seem erroneous, - * however, it is in this state once allocated and as yet unused - * and the user needs some way to free it should the need arise. - * Calling tcp_close() with a pcb that has already been closed, (i.e. twice) - * or for a pcb that has been used and then entered the CLOSED state - * is erroneous, but this should never happen as the pcb has in those cases - * been freed, and so any remaining handles are bogus. */ - err = ERR_OK; - memp_free(MEMP_TCP_PCB, pcb); - pcb = NULL; - break; - case LISTEN: - err = ERR_OK; - tcp_pcb_remove((struct tcp_pcb **)&tcp_listen_pcbs.pcbs, pcb); - memp_free(MEMP_TCP_PCB_LISTEN, pcb); - pcb = NULL; - break; - case SYN_SENT: - err = ERR_OK; - tcp_pcb_remove(&tcp_active_pcbs, pcb); - memp_free(MEMP_TCP_PCB, pcb); - pcb = NULL; - break; - case SYN_RCVD: - case ESTABLISHED: - err = tcp_send_ctrl(pcb, TCP_FIN); - if (err == ERR_OK) { - pcb->state = FIN_WAIT_1; - } - break; - case CLOSE_WAIT: - err = tcp_send_ctrl(pcb, TCP_FIN); - if (err == ERR_OK) { - pcb->state = LAST_ACK; - } - break; - default: - /* Has already been closed, do nothing. */ - err = ERR_OK; - pcb = NULL; - break; - } - - if (pcb != NULL && err == ERR_OK) { - err = tcp_output(pcb); - } - return err; -} - -/** - * Aborts a connection by sending a RST to the remote host and deletes - * the local protocol control block. This is done when a connection is - * killed because of shortage of memory. - * - */ -void -tcp_abort(struct tcp_pcb *pcb) -{ - u32_t seqno, ackno; - u16_t remote_port, local_port; - struct ip_addr remote_ip, local_ip; -#if LWIP_CALLBACK_API - void (* errf)(void *arg, err_t err); -#endif /* LWIP_CALLBACK_API */ - void *errf_arg; - - - /* Figure out on which TCP PCB list we are, and remove us. If we - are in an active state, call the receive function associated with - the PCB with a NULL argument, and send an RST to the remote end. */ - if (pcb->state == TIME_WAIT) { - tcp_pcb_remove(&tcp_tw_pcbs, pcb); - memp_free(MEMP_TCP_PCB, pcb); - } else { - seqno = pcb->snd_nxt; - ackno = pcb->rcv_nxt; - ip_addr_set(&local_ip, &(pcb->local_ip)); - ip_addr_set(&remote_ip, &(pcb->remote_ip)); - local_port = pcb->local_port; - remote_port = pcb->remote_port; -#if LWIP_CALLBACK_API - errf = pcb->errf; -#endif /* LWIP_CALLBACK_API */ - errf_arg = pcb->callback_arg; - tcp_pcb_remove(&tcp_active_pcbs, pcb); - if (pcb->unacked != NULL) { - tcp_segs_free(pcb->unacked); - } - if (pcb->unsent != NULL) { - tcp_segs_free(pcb->unsent); - } -#if TCP_QUEUE_OOSEQ - if (pcb->ooseq != NULL) { - tcp_segs_free(pcb->ooseq); - } -#endif /* TCP_QUEUE_OOSEQ */ - memp_free(MEMP_TCP_PCB, pcb); - TCP_EVENT_ERR(errf, errf_arg, ERR_ABRT); - LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abort: sending RST\n")); - tcp_rst(seqno, ackno, &local_ip, &remote_ip, local_port, remote_port); - } -} - -/** - * Binds the connection to a local portnumber and IP address. If the - * IP address is not given (i.e., ipaddr == NULL), the IP address of - * the outgoing network interface is used instead. - * - */ - -err_t -tcp_bind(struct tcp_pcb *pcb, struct ip_addr *ipaddr, u16_t port) -{ - struct tcp_pcb *cpcb; - - if (port == 0) { - port = tcp_new_port(); - } - /* Check if the address already is in use. */ - for(cpcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; - cpcb != NULL; cpcb = cpcb->next) { - if (cpcb->local_port == port) { - if (ip_addr_isany(&(cpcb->local_ip)) || - ip_addr_isany(ipaddr) || - ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { - return ERR_USE; - } - } - } - for(cpcb = tcp_active_pcbs; - cpcb != NULL; cpcb = cpcb->next) { - if (cpcb->local_port == port) { - if (ip_addr_isany(&(cpcb->local_ip)) || - ip_addr_isany(ipaddr) || - ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { - return ERR_USE; - } - } - } - - if (!ip_addr_isany(ipaddr)) { - pcb->local_ip = *ipaddr; - } - pcb->local_port = port; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_bind: bind to port %"U16_F"\n", port)); - return ERR_OK; -} -#if LWIP_CALLBACK_API -static err_t -tcp_accept_null(void *arg, struct tcp_pcb *pcb, err_t err) -{ - (void)arg; - (void)pcb; - (void)err; - - return ERR_ABRT; -} -#endif /* LWIP_CALLBACK_API */ - -/** - * Set the state of the connection to be LISTEN, which means that it - * is able to accept incoming connections. The protocol control block - * is reallocated in order to consume less memory. Setting the - * connection to LISTEN is an irreversible process. - * - */ -struct tcp_pcb * -tcp_listen(struct tcp_pcb *pcb) -{ - struct tcp_pcb_listen *lpcb; - - /* already listening? */ - if (pcb->state == LISTEN) { - return pcb; - } - lpcb = memp_malloc(MEMP_TCP_PCB_LISTEN); - if (lpcb == NULL) { - return NULL; - } - lpcb->callback_arg = pcb->callback_arg; - lpcb->local_port = pcb->local_port; - lpcb->state = LISTEN; - lpcb->so_options = pcb->so_options; - lpcb->so_options |= SOF_ACCEPTCONN; - lpcb->ttl = pcb->ttl; - lpcb->tos = pcb->tos; - ip_addr_set(&lpcb->local_ip, &pcb->local_ip); - memp_free(MEMP_TCP_PCB, pcb); -#if LWIP_CALLBACK_API - lpcb->accept = tcp_accept_null; -#endif /* LWIP_CALLBACK_API */ - TCP_REG(&tcp_listen_pcbs.listen_pcbs, lpcb); - return (struct tcp_pcb *)lpcb; -} - -/** - * This function should be called by the application when it has - * processed the data. The purpose is to advertise a larger window - * when the data has been processed. - * - */ -void -tcp_recved(struct tcp_pcb *pcb, u16_t len) -{ - if ((u32_t)pcb->rcv_wnd + len > TCP_WND) { - pcb->rcv_wnd = TCP_WND; - } else { - pcb->rcv_wnd += len; - } - if (!(pcb->flags & TF_ACK_DELAY) && - !(pcb->flags & TF_ACK_NOW)) { - /* - * We send an ACK here (if one is not already pending, hence - * the above tests) as tcp_recved() implies that the application - * has processed some data, and so we can open the receiver's - * window to allow more to be transmitted. This could result in - * two ACKs being sent for each received packet in some limited cases - * (where the application is only receiving data, and is slow to - * process it) but it is necessary to guarantee that the sender can - * continue to transmit. - */ - tcp_ack(pcb); - } - else if (pcb->flags & TF_ACK_DELAY && pcb->rcv_wnd >= TCP_WND/2) { - /* If we can send a window update such that there is a full - * segment available in the window, do so now. This is sort of - * nagle-like in its goals, and tries to hit a compromise between - * sending acks each time the window is updated, and only sending - * window updates when a timer expires. The "threshold" used - * above (currently TCP_WND/2) can be tuned to be more or less - * aggressive */ - tcp_ack_now(pcb); - } - - LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: recveived %"U16_F" bytes, wnd %"U16_F" (%"U16_F").\n", - len, pcb->rcv_wnd, TCP_WND - pcb->rcv_wnd)); -} - -/** - * A nastly hack featuring 'goto' statements that allocates a - * new TCP local port. - */ -static u16_t -tcp_new_port(void) -{ - struct tcp_pcb *pcb; -#ifndef TCP_LOCAL_PORT_RANGE_START -#define TCP_LOCAL_PORT_RANGE_START 4096 -#define TCP_LOCAL_PORT_RANGE_END 0x7fff -#endif - static u16_t port = TCP_LOCAL_PORT_RANGE_START; - - again: - if (++port > TCP_LOCAL_PORT_RANGE_END) { - port = TCP_LOCAL_PORT_RANGE_START; - } - - for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - if (pcb->local_port == port) { - goto again; - } - } - for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - if (pcb->local_port == port) { - goto again; - } - } - for(pcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; pcb != NULL; pcb = pcb->next) { - if (pcb->local_port == port) { - goto again; - } - } - return port; -} - -/** - * Connects to another host. The function given as the "connected" - * argument will be called when the connection has been established. - * - */ -err_t -tcp_connect(struct tcp_pcb *pcb, struct ip_addr *ipaddr, u16_t port, - err_t (* connected)(void *arg, struct tcp_pcb *tpcb, err_t err)) -{ - u32_t optdata; - err_t ret; - u32_t iss; - - LWIP_DEBUGF(TCP_DEBUG, ("tcp_connect to port %"U16_F"\n", port)); - if (ipaddr != NULL) { - pcb->remote_ip = *ipaddr; - } else { - return ERR_VAL; - } - pcb->remote_port = port; - if (pcb->local_port == 0) { - pcb->local_port = tcp_new_port(); - } - iss = tcp_next_iss(); - pcb->rcv_nxt = 0; - pcb->snd_nxt = iss; - pcb->lastack = iss - 1; - pcb->snd_lbb = iss - 1; - pcb->rcv_wnd = TCP_WND; - pcb->snd_wnd = TCP_WND; - pcb->mss = TCP_MSS; - pcb->cwnd = 1; - pcb->ssthresh = pcb->mss * 10; - pcb->state = SYN_SENT; -#if LWIP_CALLBACK_API - pcb->connected = connected; -#endif /* LWIP_CALLBACK_API */ - TCP_REG(&tcp_active_pcbs, pcb); - - /* Build an MSS option */ - optdata = htonl(((u32_t)2 << 24) | - ((u32_t)4 << 16) | - (((u32_t)pcb->mss / 256) << 8) | - (pcb->mss & 255)); - - ret = tcp_enqueue(pcb, NULL, 0, TCP_SYN, 0, (u8_t *)&optdata, 4); - if (ret == ERR_OK) { - tcp_output(pcb); - } - return ret; -} - -/** - * Called every 500 ms and implements the retransmission timer and the timer that - * removes PCBs that have been in TIME-WAIT for enough time. It also increments - * various timers such as the inactivity timer in each PCB. - */ -void -tcp_slowtmr(void) -{ - struct tcp_pcb *pcb, *pcb2, *prev; - u32_t eff_wnd; - u8_t pcb_remove; /* flag if a PCB should be removed */ - err_t err; - - err = ERR_OK; - - ++tcp_ticks; - - /* Steps through all of the active PCBs. */ - prev = NULL; - pcb = tcp_active_pcbs; - if (pcb == NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: no active pcbs\n")); - } - while (pcb != NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: processing active pcb\n")); - LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED); - LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN); - LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT); - - pcb_remove = 0; - - if (pcb->state == SYN_SENT && pcb->nrtx == TCP_SYNMAXRTX) { - ++pcb_remove; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n")); - } - else if (pcb->nrtx == TCP_MAXRTX) { - ++pcb_remove; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max DATA retries reached\n")); - } else { - ++pcb->rtime; - if (pcb->unacked != NULL && pcb->rtime >= pcb->rto) { - - /* Time for a retransmission. */ - LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_slowtmr: rtime %"U16_F" pcb->rto %"U16_F"\n", - pcb->rtime, pcb->rto)); - - /* Double retransmission time-out unless we are trying to - * connect to somebody (i.e., we are in SYN_SENT). */ - if (pcb->state != SYN_SENT) { - pcb->rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[pcb->nrtx]; - } - /* Reduce congestion window and ssthresh. */ - eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd); - pcb->ssthresh = eff_wnd >> 1; - if (pcb->ssthresh < pcb->mss) { - pcb->ssthresh = pcb->mss * 2; - } - pcb->cwnd = pcb->mss; - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: cwnd %"U16_F" ssthresh %"U16_F"\n", - pcb->cwnd, pcb->ssthresh)); - - /* The following needs to be called AFTER cwnd is set to one mss - STJ */ - tcp_rexmit_rto(pcb); - } - } - /* Check if this PCB has stayed too long in FIN-WAIT-2 */ - if (pcb->state == FIN_WAIT_2) { - if ((u32_t)(tcp_ticks - pcb->tmr) > - TCP_FIN_WAIT_TIMEOUT / TCP_SLOW_INTERVAL) { - ++pcb_remove; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in FIN-WAIT-2\n")); - } - } - - /* Check if KEEPALIVE should be sent */ - if((pcb->so_options & SOF_KEEPALIVE) && ((pcb->state == ESTABLISHED) || (pcb->state == CLOSE_WAIT))) { - if((u32_t)(tcp_ticks - pcb->tmr) > (pcb->keepalive + TCP_MAXIDLE) / TCP_SLOW_INTERVAL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: KEEPALIVE timeout. Aborting connection to %"U16_F".%"U16_F".%"U16_F".%"U16_F".\n", - ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), - ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip))); - - tcp_abort(pcb); - } - else if((u32_t)(tcp_ticks - pcb->tmr) > (pcb->keepalive + pcb->keep_cnt * TCP_KEEPINTVL) / TCP_SLOW_INTERVAL) { - tcp_keepalive(pcb); - pcb->keep_cnt++; - } - } - - /* If this PCB has queued out of sequence data, but has been - inactive for too long, will drop the data (it will eventually - be retransmitted). */ -#if TCP_QUEUE_OOSEQ - if (pcb->ooseq != NULL && - (u32_t)tcp_ticks - pcb->tmr >= - pcb->rto * TCP_OOSEQ_TIMEOUT) { - tcp_segs_free(pcb->ooseq); - pcb->ooseq = NULL; - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: dropping OOSEQ queued data\n")); - } -#endif /* TCP_QUEUE_OOSEQ */ - - /* Check if this PCB has stayed too long in SYN-RCVD */ - if (pcb->state == SYN_RCVD) { - if ((u32_t)(tcp_ticks - pcb->tmr) > - TCP_SYN_RCVD_TIMEOUT / TCP_SLOW_INTERVAL) { - ++pcb_remove; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in SYN-RCVD\n")); - } - } - - /* Check if this PCB has stayed too long in LAST-ACK */ - if (pcb->state == LAST_ACK) { - if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { - ++pcb_remove; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in LAST-ACK\n")); - } - } - - /* If the PCB should be removed, do it. */ - if (pcb_remove) { - tcp_pcb_purge(pcb); - /* Remove PCB from tcp_active_pcbs list. */ - if (prev != NULL) { - LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs); - prev->next = pcb->next; - } else { - /* This PCB was the first. */ - LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb); - tcp_active_pcbs = pcb->next; - } - - TCP_EVENT_ERR(pcb->errf, pcb->callback_arg, ERR_ABRT); - - pcb2 = pcb->next; - memp_free(MEMP_TCP_PCB, pcb); - pcb = pcb2; - } else { - - /* We check if we should poll the connection. */ - ++pcb->polltmr; - if (pcb->polltmr >= pcb->pollinterval) { - pcb->polltmr = 0; - LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n")); - TCP_EVENT_POLL(pcb, err); - if (err == ERR_OK) { - tcp_output(pcb); - } - } - - prev = pcb; - pcb = pcb->next; - } - } - - - /* Steps through all of the TIME-WAIT PCBs. */ - prev = NULL; - pcb = tcp_tw_pcbs; - while (pcb != NULL) { - LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); - pcb_remove = 0; - - /* Check if this PCB has stayed long enough in TIME-WAIT */ - if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { - ++pcb_remove; - } - - - - /* If the PCB should be removed, do it. */ - if (pcb_remove) { - tcp_pcb_purge(pcb); - /* Remove PCB from tcp_tw_pcbs list. */ - if (prev != NULL) { - LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs); - prev->next = pcb->next; - } else { - /* This PCB was the first. */ - LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb); - tcp_tw_pcbs = pcb->next; - } - pcb2 = pcb->next; - memp_free(MEMP_TCP_PCB, pcb); - pcb = pcb2; - } else { - prev = pcb; - pcb = pcb->next; - } - } -} - -/** - * Is called every TCP_FAST_INTERVAL (250 ms) and sends delayed ACKs. - */ -void -tcp_fasttmr(void) -{ - struct tcp_pcb *pcb; - - /* send delayed ACKs */ - for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - if (pcb->flags & TF_ACK_DELAY) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n")); - tcp_ack_now(pcb); - pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); - } - } -} - -/** - * Deallocates a list of TCP segments (tcp_seg structures). - * - */ -u8_t -tcp_segs_free(struct tcp_seg *seg) -{ - u8_t count = 0; - struct tcp_seg *next; - while (seg != NULL) { - next = seg->next; - count += tcp_seg_free(seg); - seg = next; - } - return count; -} - -/** - * Frees a TCP segment. - * - */ -u8_t -tcp_seg_free(struct tcp_seg *seg) -{ - u8_t count = 0; - - if (seg != NULL) { - if (seg->p != NULL) { - count = pbuf_free(seg->p); -#if TCP_DEBUG - seg->p = NULL; -#endif /* TCP_DEBUG */ - } - memp_free(MEMP_TCP_SEG, seg); - } - return count; -} - -/** - * Sets the priority of a connection. - * - */ -void -tcp_setprio(struct tcp_pcb *pcb, u8_t prio) -{ - pcb->prio = prio; -} -#if TCP_QUEUE_OOSEQ - -/** - * Returns a copy of the given TCP segment. - * - */ -struct tcp_seg * -tcp_seg_copy(struct tcp_seg *seg) -{ - struct tcp_seg *cseg; - - cseg = memp_malloc(MEMP_TCP_SEG); - if (cseg == NULL) { - return NULL; - } - memcpy((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg)); - pbuf_ref(cseg->p); - return cseg; -} -#endif - -#if LWIP_CALLBACK_API -static err_t -tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) -{ - arg = arg; - if (p != NULL) { - pbuf_free(p); - } else if (err == ERR_OK) { - return tcp_close(pcb); - } - return ERR_OK; -} -#endif /* LWIP_CALLBACK_API */ - -static void -tcp_kill_prio(u8_t prio) -{ - struct tcp_pcb *pcb, *inactive; - u32_t inactivity; - u8_t mprio; - - - mprio = TCP_PRIO_MAX; - - /* We kill the oldest active connection that has lower priority than - prio. */ - inactivity = 0; - inactive = NULL; - for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - if (pcb->prio <= prio && - pcb->prio <= mprio && - (u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { - inactivity = tcp_ticks - pcb->tmr; - inactive = pcb; - mprio = pcb->prio; - } - } - if (inactive != NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n", - (void *)inactive, inactivity)); - tcp_abort(inactive); - } -} - - -static void -tcp_kill_timewait(void) -{ - struct tcp_pcb *pcb, *inactive; - u32_t inactivity; - - inactivity = 0; - inactive = NULL; - for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { - inactivity = tcp_ticks - pcb->tmr; - inactive = pcb; - } - } - if (inactive != NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n", - (void *)inactive, inactivity)); - tcp_abort(inactive); - } -} - - - -struct tcp_pcb * -tcp_alloc(u8_t prio) -{ - struct tcp_pcb *pcb; - u32_t iss; - - pcb = memp_malloc(MEMP_TCP_PCB); - if (pcb == NULL) { - /* Try killing oldest connection in TIME-WAIT. */ - LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n")); - tcp_kill_timewait(); - pcb = memp_malloc(MEMP_TCP_PCB); - if (pcb == NULL) { - tcp_kill_prio(prio); - pcb = memp_malloc(MEMP_TCP_PCB); - } - } - if (pcb != NULL) { - memset(pcb, 0, sizeof(struct tcp_pcb)); - pcb->prio = TCP_PRIO_NORMAL; - pcb->snd_buf = TCP_SND_BUF; - pcb->snd_queuelen = 0; - pcb->rcv_wnd = TCP_WND; - pcb->tos = 0; - pcb->ttl = TCP_TTL; - pcb->mss = TCP_MSS; - pcb->rto = 3000 / TCP_SLOW_INTERVAL; - pcb->sa = 0; - pcb->sv = 3000 / TCP_SLOW_INTERVAL; - pcb->rtime = 0; - pcb->cwnd = 1; - iss = tcp_next_iss(); - pcb->snd_wl2 = iss; - pcb->snd_nxt = iss; - pcb->snd_max = iss; - pcb->lastack = iss; - pcb->snd_lbb = iss; - pcb->tmr = tcp_ticks; - - pcb->polltmr = 0; - -#if LWIP_CALLBACK_API - pcb->recv = tcp_recv_null; -#endif /* LWIP_CALLBACK_API */ - - /* Init KEEPALIVE timer */ - pcb->keepalive = TCP_KEEPDEFAULT; - pcb->keep_cnt = 0; - } - return pcb; -} - -/** - * Creates a new TCP protocol control block but doesn't place it on - * any of the TCP PCB lists. - * - * @internal: Maybe there should be a idle TCP PCB list where these - * PCBs are put on. We can then implement port reservation using - * tcp_bind(). Currently, we lack this (BSD socket type of) feature. - */ - -struct tcp_pcb * -tcp_new(void) -{ - return tcp_alloc(TCP_PRIO_NORMAL); -} - -/* - * tcp_arg(): - * - * Used to specify the argument that should be passed callback - * functions. - * - */ - -void -tcp_arg(struct tcp_pcb *pcb, void *arg) -{ - pcb->callback_arg = arg; -} -#if LWIP_CALLBACK_API - -/** - * Used to specify the function that should be called when a TCP - * connection receives data. - * - */ -void -tcp_recv(struct tcp_pcb *pcb, - err_t (* recv)(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, err_t err)) -{ - pcb->recv = recv; -} - -/** - * Used to specify the function that should be called when TCP data - * has been successfully delivered to the remote host. - * - */ - -void -tcp_sent(struct tcp_pcb *pcb, - err_t (* sent)(void *arg, struct tcp_pcb *tpcb, u16_t len)) -{ - pcb->sent = sent; -} - -/** - * Used to specify the function that should be called when a fatal error - * has occured on the connection. - * - */ -void -tcp_err(struct tcp_pcb *pcb, - void (* errf)(void *arg, err_t err)) -{ - pcb->errf = errf; -} - -/** - * Used for specifying the function that should be called when a - * LISTENing connection has been connected to another host. - * - */ -void -tcp_accept(struct tcp_pcb *pcb, - err_t (* accept)(void *arg, struct tcp_pcb *newpcb, err_t err)) -{ - ((struct tcp_pcb_listen *)pcb)->accept = accept; -} -#endif /* LWIP_CALLBACK_API */ - - -/** - * Used to specify the function that should be called periodically - * from TCP. The interval is specified in terms of the TCP coarse - * timer interval, which is called twice a second. - * - */ -void -tcp_poll(struct tcp_pcb *pcb, - err_t (* poll)(void *arg, struct tcp_pcb *tpcb), u8_t interval) -{ -#if LWIP_CALLBACK_API - pcb->poll = poll; -#endif /* LWIP_CALLBACK_API */ - pcb->pollinterval = interval; -} - -/** - * Purges a TCP PCB. Removes any buffered data and frees the buffer memory. - * - */ -void -tcp_pcb_purge(struct tcp_pcb *pcb) -{ - if (pcb->state != CLOSED && - pcb->state != TIME_WAIT && - pcb->state != LISTEN) { - - LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n")); - - if (pcb->unsent != NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: not all data sent\n")); - } - if (pcb->unacked != NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n")); - } -#if TCP_QUEUE_OOSEQ /* LW */ - if (pcb->ooseq != NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n")); - } - - tcp_segs_free(pcb->ooseq); - pcb->ooseq = NULL; -#endif /* TCP_QUEUE_OOSEQ */ - tcp_segs_free(pcb->unsent); - tcp_segs_free(pcb->unacked); - pcb->unacked = pcb->unsent = NULL; - } -} - -/** - * Purges the PCB and removes it from a PCB list. Any delayed ACKs are sent first. - * - */ -void -tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb) -{ - TCP_RMV(pcblist, pcb); - - tcp_pcb_purge(pcb); - - /* if there is an outstanding delayed ACKs, send it */ - if (pcb->state != TIME_WAIT && - pcb->state != LISTEN && - pcb->flags & TF_ACK_DELAY) { - pcb->flags |= TF_ACK_NOW; - tcp_output(pcb); - } - pcb->state = CLOSED; - - LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane()); -} - -/** - * Calculates a new initial sequence number for new connections. - * - */ -u32_t -tcp_next_iss(void) -{ - static u32_t iss = 6510; - - iss += tcp_ticks; /* XXX */ - return iss; -} - -#if TCP_DEBUG || TCP_INPUT_DEBUG || TCP_OUTPUT_DEBUG -void -tcp_debug_print(struct tcp_hdr *tcphdr) -{ - LWIP_DEBUGF(TCP_DEBUG, ("TCP header:\n")); - LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(TCP_DEBUG, ("| %5"U16_F" | %5"U16_F" | (src port, dest port)\n", - ntohs(tcphdr->src), ntohs(tcphdr->dest))); - LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(TCP_DEBUG, ("| %010"U32_F" | (seq no)\n", - ntohl(tcphdr->seqno))); - LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(TCP_DEBUG, ("| %010"U32_F" | (ack no)\n", - ntohl(tcphdr->ackno))); - LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(TCP_DEBUG, ("| %2"U16_F" | |%"U16_F"%"U16_F"%"U16_F"%"U16_F"%"U16_F"%"U16_F"| %5"U16_F" | (hdrlen, flags (", - TCPH_HDRLEN(tcphdr), - TCPH_FLAGS(tcphdr) >> 5 & 1, - TCPH_FLAGS(tcphdr) >> 4 & 1, - TCPH_FLAGS(tcphdr) >> 3 & 1, - TCPH_FLAGS(tcphdr) >> 2 & 1, - TCPH_FLAGS(tcphdr) >> 1 & 1, - TCPH_FLAGS(tcphdr) & 1, - ntohs(tcphdr->wnd))); - tcp_debug_print_flags(TCPH_FLAGS(tcphdr)); - LWIP_DEBUGF(TCP_DEBUG, ("), win)\n")); - LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(TCP_DEBUG, ("| 0x%04"X16_F" | %5"U16_F" | (chksum, urgp)\n", - ntohs(tcphdr->chksum), ntohs(tcphdr->urgp))); - LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); -} - -void -tcp_debug_print_state(enum tcp_state s) -{ - LWIP_DEBUGF(TCP_DEBUG, ("State: ")); - switch (s) { - case CLOSED: - LWIP_DEBUGF(TCP_DEBUG, ("CLOSED\n")); - break; - case LISTEN: - LWIP_DEBUGF(TCP_DEBUG, ("LISTEN\n")); - break; - case SYN_SENT: - LWIP_DEBUGF(TCP_DEBUG, ("SYN_SENT\n")); - break; - case SYN_RCVD: - LWIP_DEBUGF(TCP_DEBUG, ("SYN_RCVD\n")); - break; - case ESTABLISHED: - LWIP_DEBUGF(TCP_DEBUG, ("ESTABLISHED\n")); - break; - case FIN_WAIT_1: - LWIP_DEBUGF(TCP_DEBUG, ("FIN_WAIT_1\n")); - break; - case FIN_WAIT_2: - LWIP_DEBUGF(TCP_DEBUG, ("FIN_WAIT_2\n")); - break; - case CLOSE_WAIT: - LWIP_DEBUGF(TCP_DEBUG, ("CLOSE_WAIT\n")); - break; - case CLOSING: - LWIP_DEBUGF(TCP_DEBUG, ("CLOSING\n")); - break; - case LAST_ACK: - LWIP_DEBUGF(TCP_DEBUG, ("LAST_ACK\n")); - break; - case TIME_WAIT: - LWIP_DEBUGF(TCP_DEBUG, ("TIME_WAIT\n")); - break; - } -} - -void -tcp_debug_print_flags(u8_t flags) -{ - if (flags & TCP_FIN) { - LWIP_DEBUGF(TCP_DEBUG, ("FIN ")); - } - if (flags & TCP_SYN) { - LWIP_DEBUGF(TCP_DEBUG, ("SYN ")); - } - if (flags & TCP_RST) { - LWIP_DEBUGF(TCP_DEBUG, ("RST ")); - } - if (flags & TCP_PSH) { - LWIP_DEBUGF(TCP_DEBUG, ("PSH ")); - } - if (flags & TCP_ACK) { - LWIP_DEBUGF(TCP_DEBUG, ("ACK ")); - } - if (flags & TCP_URG) { - LWIP_DEBUGF(TCP_DEBUG, ("URG ")); - } - if (flags & TCP_ECE) { - LWIP_DEBUGF(TCP_DEBUG, ("ECE ")); - } - if (flags & TCP_CWR) { - LWIP_DEBUGF(TCP_DEBUG, ("CWR ")); - } -} - -void -tcp_debug_print_pcbs(void) -{ - struct tcp_pcb *pcb; - LWIP_DEBUGF(TCP_DEBUG, ("Active PCB states:\n")); - for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_DEBUGF(TCP_DEBUG, ("Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", - pcb->local_port, pcb->remote_port, - pcb->snd_nxt, pcb->rcv_nxt)); - tcp_debug_print_state(pcb->state); - } - LWIP_DEBUGF(TCP_DEBUG, ("Listen PCB states:\n")); - for(pcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_DEBUGF(TCP_DEBUG, ("Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", - pcb->local_port, pcb->remote_port, - pcb->snd_nxt, pcb->rcv_nxt)); - tcp_debug_print_state(pcb->state); - } - LWIP_DEBUGF(TCP_DEBUG, ("TIME-WAIT PCB states:\n")); - for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_DEBUGF(TCP_DEBUG, ("Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", - pcb->local_port, pcb->remote_port, - pcb->snd_nxt, pcb->rcv_nxt)); - tcp_debug_print_state(pcb->state); - } -} - -s16_t -tcp_pcbs_sane(void) -{ - struct tcp_pcb *pcb; - for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != CLOSED", pcb->state != CLOSED); - LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != LISTEN", pcb->state != LISTEN); - LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT); - } - for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_ASSERT("tcp_pcbs_sane: tw pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); - } - return 1; -} -#endif /* TCP_DEBUG */ -#endif /* LWIP_TCP */ - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/tcp_in.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/tcp_in.c deleted file mode 100644 index 212f9c4d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/tcp_in.c +++ /dev/null @@ -1,1199 +0,0 @@ -/** - * @file - * - * Transmission Control Protocol, incoming traffic - * - * The input processing functions of TCP. - * - * These functions are generally called in the order (ip_input() ->) tcp_input() -> - * tcp_process() -> tcp_receive() (-> application). - * - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include "lwip/def.h" -#include "lwip/opt.h" - -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/mem.h" -#include "lwip/memp.h" - -#include "lwip/inet.h" -#include "lwip/tcp.h" - -#include "lwip/stats.h" - -#include "arch/perf.h" -#if LWIP_TCP -/* These variables are global to all functions involved in the input - processing of TCP segments. They are set by the tcp_input() - function. */ -static struct tcp_seg inseg; -static struct tcp_hdr *tcphdr; -static struct ip_hdr *iphdr; -static u32_t seqno, ackno; -static u8_t flags; -static u16_t tcplen; - -static u8_t recv_flags; -static struct pbuf *recv_data; - -struct tcp_pcb *tcp_input_pcb; - -/* Forward declarations. */ -static err_t tcp_process(struct tcp_pcb *pcb); -static void tcp_receive(struct tcp_pcb *pcb); -static void tcp_parseopt(struct tcp_pcb *pcb); - -static err_t tcp_listen_input(struct tcp_pcb_listen *pcb); -static err_t tcp_timewait_input(struct tcp_pcb *pcb); - - -/* tcp_input: - * - * The initial input processing of TCP. It verifies the TCP header, demultiplexes - * the segment between the PCBs and passes it on to tcp_process(), which implements - * the TCP finite state machine. This function is called by the IP layer (in - * ip_input()). - */ - -void -tcp_input(struct pbuf *p, struct netif *inp) -{ - struct tcp_pcb *pcb, *prev; - struct tcp_pcb_listen *lpcb; - u8_t hdrlen; - err_t err; - - PERF_START; - - TCP_STATS_INC(tcp.recv); - - iphdr = p->payload; - tcphdr = (struct tcp_hdr *)((u8_t *)p->payload + IPH_HL(iphdr) * 4); - -#if TCP_INPUT_DEBUG - tcp_debug_print(tcphdr); -#endif - - /* remove header from payload */ - if (pbuf_header(p, -((s16_t)(IPH_HL(iphdr) * 4))) || (p->tot_len < sizeof(struct tcp_hdr))) { - /* drop short packets */ - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: short packet (%"U16_F" bytes) discarded\n", p->tot_len)); - TCP_STATS_INC(tcp.lenerr); - TCP_STATS_INC(tcp.drop); - pbuf_free(p); - return; - } - - /* Don't even process incoming broadcasts/multicasts. */ - if (ip_addr_isbroadcast(&(iphdr->dest), inp) || - ip_addr_ismulticast(&(iphdr->dest))) { - pbuf_free(p); - return; - } - -#if CHECKSUM_CHECK_TCP - /* Verify TCP checksum. */ - if (inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), - (struct ip_addr *)&(iphdr->dest), - IP_PROTO_TCP, p->tot_len) != 0) { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packet discarded due to failing checksum 0x%04"X16_F"\n", - inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), (struct ip_addr *)&(iphdr->dest), - IP_PROTO_TCP, p->tot_len))); -#if TCP_DEBUG - tcp_debug_print(tcphdr); -#endif /* TCP_DEBUG */ - TCP_STATS_INC(tcp.chkerr); - TCP_STATS_INC(tcp.drop); - - pbuf_free(p); - return; - } -#endif - - /* Move the payload pointer in the pbuf so that it points to the - TCP data instead of the TCP header. */ - hdrlen = TCPH_HDRLEN(tcphdr); - pbuf_header(p, -(hdrlen * 4)); - - /* Convert fields in TCP header to host byte order. */ - tcphdr->src = ntohs(tcphdr->src); - tcphdr->dest = ntohs(tcphdr->dest); - seqno = tcphdr->seqno = ntohl(tcphdr->seqno); - ackno = tcphdr->ackno = ntohl(tcphdr->ackno); - tcphdr->wnd = ntohs(tcphdr->wnd); - - flags = TCPH_FLAGS(tcphdr) & TCP_FLAGS; - tcplen = p->tot_len + ((flags & TCP_FIN || flags & TCP_SYN)? 1: 0); - - /* Demultiplex an incoming segment. First, we check if it is destined - for an active connection. */ - prev = NULL; - - - for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED); - LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT); - LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN); - if (pcb->remote_port == tcphdr->src && - pcb->local_port == tcphdr->dest && - ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)) && - ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest))) { - - /* Move this PCB to the front of the list so that subsequent - lookups will be faster (we exploit locality in TCP segment - arrivals). */ - LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb); - if (prev != NULL) { - prev->next = pcb->next; - pcb->next = tcp_active_pcbs; - tcp_active_pcbs = pcb; - } - LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb); - break; - } - prev = pcb; - } - - if (pcb == NULL) { - /* If it did not go to an active connection, we check the connections - in the TIME-WAIT state. */ - - for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); - if (pcb->remote_port == tcphdr->src && - pcb->local_port == tcphdr->dest && - ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)) && - ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest))) { - /* We don't really care enough to move this PCB to the front - of the list since we are not very likely to receive that - many segments for connections in TIME-WAIT. */ - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packed for TIME_WAITing connection.\n")); - tcp_timewait_input(pcb); - pbuf_free(p); - return; - } - } - - /* Finally, if we still did not get a match, we check all PCBs that - are LISTENing for incoming connections. */ - prev = NULL; - for(lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { - if ((ip_addr_isany(&(lpcb->local_ip)) || - ip_addr_cmp(&(lpcb->local_ip), &(iphdr->dest))) && - lpcb->local_port == tcphdr->dest) { - /* Move this PCB to the front of the list so that subsequent - lookups will be faster (we exploit locality in TCP segment - arrivals). */ - if (prev != NULL) { - ((struct tcp_pcb_listen *)prev)->next = lpcb->next; - /* our successor is the remainder of the listening list */ - lpcb->next = tcp_listen_pcbs.listen_pcbs; - /* put this listening pcb at the head of the listening list */ - tcp_listen_pcbs.listen_pcbs = lpcb; - } - - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packed for LISTENing connection.\n")); - tcp_listen_input(lpcb); - pbuf_free(p); - return; - } - prev = (struct tcp_pcb *)lpcb; - } - } - -#if TCP_INPUT_DEBUG - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("+-+-+-+-+-+-+-+-+-+-+-+-+-+- tcp_input: flags ")); - tcp_debug_print_flags(TCPH_FLAGS(tcphdr)); - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("-+-+-+-+-+-+-+-+-+-+-+-+-+-+\n")); -#endif /* TCP_INPUT_DEBUG */ - - - if (pcb != NULL) { - /* The incoming segment belongs to a connection. */ -#if TCP_INPUT_DEBUG -#if TCP_DEBUG - tcp_debug_print_state(pcb->state); -#endif /* TCP_DEBUG */ -#endif /* TCP_INPUT_DEBUG */ - - /* Set up a tcp_seg structure. */ - inseg.next = NULL; - inseg.len = p->tot_len; - inseg.dataptr = p->payload; - inseg.p = p; - inseg.tcphdr = tcphdr; - - recv_data = NULL; - recv_flags = 0; - - tcp_input_pcb = pcb; - err = tcp_process(pcb); - tcp_input_pcb = NULL; - /* A return value of ERR_ABRT means that tcp_abort() was called - and that the pcb has been freed. If so, we don't do anything. */ - if (err != ERR_ABRT) { - if (recv_flags & TF_RESET) { - /* TF_RESET means that the connection was reset by the other - end. We then call the error callback to inform the - application that the connection is dead before we - deallocate the PCB. */ - TCP_EVENT_ERR(pcb->errf, pcb->callback_arg, ERR_RST); - tcp_pcb_remove(&tcp_active_pcbs, pcb); - memp_free(MEMP_TCP_PCB, pcb); - } else if (recv_flags & TF_CLOSED) { - /* The connection has been closed and we will deallocate the - PCB. */ - tcp_pcb_remove(&tcp_active_pcbs, pcb); - memp_free(MEMP_TCP_PCB, pcb); - } else { - err = ERR_OK; - /* If the application has registered a "sent" function to be - called when new send buffer space is available, we call it - now. */ - if (pcb->acked > 0) { - TCP_EVENT_SENT(pcb, pcb->acked, err); - } - - if (recv_data != NULL) { - /* Notify application that data has been received. */ - TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err); - } - - /* If a FIN segment was received, we call the callback - function with a NULL buffer to indicate EOF. */ - if (recv_flags & TF_GOT_FIN) { - TCP_EVENT_RECV(pcb, NULL, ERR_OK, err); - } - /* If there were no errors, we try to send something out. */ - if (err == ERR_OK) { - tcp_output(pcb); - } - } - } - - - /* We deallocate the incoming pbuf. If it was buffered by the - application, the application should have called pbuf_ref() to - increase the reference counter in the pbuf. If so, the buffer - isn't actually deallocated by the call to pbuf_free(), only the - reference count is decreased. */ - if (inseg.p != NULL) pbuf_free(inseg.p); -#if TCP_INPUT_DEBUG -#if TCP_DEBUG - tcp_debug_print_state(pcb->state); -#endif /* TCP_DEBUG */ -#endif /* TCP_INPUT_DEBUG */ - - } else { - - /* If no matching PCB was found, send a TCP RST (reset) to the - sender. */ - LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_input: no PCB match found, resetting.\n")); - if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) { - TCP_STATS_INC(tcp.proterr); - TCP_STATS_INC(tcp.drop); - tcp_rst(ackno, seqno + tcplen, - &(iphdr->dest), &(iphdr->src), - tcphdr->dest, tcphdr->src); - } - pbuf_free(p); - } - - LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane()); - PERF_STOP("tcp_input"); -} - -/* tcp_listen_input(): - * - * Called by tcp_input() when a segment arrives for a listening - * connection. - */ - -static err_t -tcp_listen_input(struct tcp_pcb_listen *pcb) -{ - struct tcp_pcb *npcb; - u32_t optdata; - - /* In the LISTEN state, we check for incoming SYN segments, - creates a new PCB, and responds with a SYN|ACK. */ - if (flags & TCP_ACK) { - /* For incoming segments with the ACK flag set, respond with a - RST. */ - LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n")); - tcp_rst(ackno + 1, seqno + tcplen, - &(iphdr->dest), &(iphdr->src), - tcphdr->dest, tcphdr->src); - } else if (flags & TCP_SYN) { - LWIP_DEBUGF(TCP_DEBUG, ("TCP connection request %"U16_F" -> %"U16_F".\n", tcphdr->src, tcphdr->dest)); - npcb = tcp_alloc(pcb->prio); - /* If a new PCB could not be created (probably due to lack of memory), - we don't do anything, but rely on the sender will retransmit the - SYN at a time when we have more memory available. */ - if (npcb == NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_listen_input: could not allocate PCB\n")); - TCP_STATS_INC(tcp.memerr); - return ERR_MEM; - } - /* Set up the new PCB. */ - ip_addr_set(&(npcb->local_ip), &(iphdr->dest)); - npcb->local_port = pcb->local_port; - ip_addr_set(&(npcb->remote_ip), &(iphdr->src)); - npcb->remote_port = tcphdr->src; - npcb->state = SYN_RCVD; - npcb->rcv_nxt = seqno + 1; - npcb->snd_wnd = tcphdr->wnd; - npcb->ssthresh = npcb->snd_wnd; - npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */ - npcb->callback_arg = pcb->callback_arg; -#if LWIP_CALLBACK_API - npcb->accept = pcb->accept; -#endif /* LWIP_CALLBACK_API */ - /* inherit socket options */ - npcb->so_options = pcb->so_options & (SOF_DEBUG|SOF_DONTROUTE|SOF_KEEPALIVE|SOF_OOBINLINE|SOF_LINGER); - /* Register the new PCB so that we can begin receiving segments - for it. */ - TCP_REG(&tcp_active_pcbs, npcb); - - /* Parse any options in the SYN. */ - tcp_parseopt(npcb); - - /* Build an MSS option. */ - optdata = htonl(((u32_t)2 << 24) | - ((u32_t)4 << 16) | - (((u32_t)npcb->mss / 256) << 8) | - (npcb->mss & 255)); - /* Send a SYN|ACK together with the MSS option. */ - tcp_enqueue(npcb, NULL, 0, TCP_SYN | TCP_ACK, 0, (u8_t *)&optdata, 4); - return tcp_output(npcb); - } - return ERR_OK; -} - -/* tcp_timewait_input(): - * - * Called by tcp_input() when a segment arrives for a connection in - * TIME_WAIT. - */ - -static err_t -tcp_timewait_input(struct tcp_pcb *pcb) -{ - if (TCP_SEQ_GT(seqno + tcplen, pcb->rcv_nxt)) { - pcb->rcv_nxt = seqno + tcplen; - } - if (tcplen > 0) { - tcp_ack_now(pcb); - } - return tcp_output(pcb); -} - -/* tcp_process - * - * Implements the TCP state machine. Called by tcp_input. In some - * states tcp_receive() is called to receive data. The tcp_seg - * argument will be freed by the caller (tcp_input()) unless the - * recv_data pointer in the pcb is set. - */ - -static err_t -tcp_process(struct tcp_pcb *pcb) -{ - struct tcp_seg *rseg; - u8_t acceptable = 0; - err_t err; - - - err = ERR_OK; - - /* Process incoming RST segments. */ - if (flags & TCP_RST) { - /* First, determine if the reset is acceptable. */ - if (pcb->state == SYN_SENT) { - if (ackno == pcb->snd_nxt) { - acceptable = 1; - } - } else { - /*if (TCP_SEQ_GEQ(seqno, pcb->rcv_nxt) && - TCP_SEQ_LEQ(seqno, pcb->rcv_nxt + pcb->rcv_wnd)) { - */ - if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt+pcb->rcv_wnd)) { - acceptable = 1; - } - } - - if (acceptable) { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n")); - LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED); - recv_flags = TF_RESET; - pcb->flags &= ~TF_ACK_DELAY; - return ERR_RST; - } else { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", - seqno, pcb->rcv_nxt)); - LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", - seqno, pcb->rcv_nxt)); - return ERR_OK; - } - } - - /* Update the PCB (in)activity timer. */ - pcb->tmr = tcp_ticks; - pcb->keep_cnt = 0; - - /* Do different things depending on the TCP state. */ - switch (pcb->state) { - case SYN_SENT: - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno, - pcb->snd_nxt, ntohl(pcb->unacked->tcphdr->seqno))); - /* received SYN ACK with expected sequence number? */ - if ((flags & TCP_ACK) && (flags & TCP_SYN) - && ackno == ntohl(pcb->unacked->tcphdr->seqno) + 1) { - pcb->snd_buf++; - pcb->rcv_nxt = seqno + 1; - pcb->lastack = ackno; - pcb->snd_wnd = tcphdr->wnd; - pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */ - pcb->state = ESTABLISHED; - pcb->cwnd = pcb->mss; - --pcb->snd_queuelen; - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"U16_F"\n", (u16_t)pcb->snd_queuelen)); - rseg = pcb->unacked; - pcb->unacked = rseg->next; - tcp_seg_free(rseg); - - /* Parse any options in the SYNACK. */ - tcp_parseopt(pcb); - - /* Call the user specified function to call when sucessfully - * connected. */ - TCP_EVENT_CONNECTED(pcb, ERR_OK, err); - tcp_ack(pcb); - } - /* received ACK? possibly a half-open connection */ - else if (flags & TCP_ACK) { - /* send a RST to bring the other side in a non-synchronized state. */ - tcp_rst(ackno, seqno + tcplen, &(iphdr->dest), &(iphdr->src), - tcphdr->dest, tcphdr->src); - } - break; - case SYN_RCVD: - if (flags & TCP_ACK && - !(flags & TCP_RST)) { - /* expected ACK number? */ - if (TCP_SEQ_BETWEEN(ackno, pcb->lastack+1, pcb->snd_nxt)) { - pcb->state = ESTABLISHED; - LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); -#if LWIP_CALLBACK_API - LWIP_ASSERT("pcb->accept != NULL", pcb->accept != NULL); -#endif - /* Call the accept function. */ - TCP_EVENT_ACCEPT(pcb, ERR_OK, err); - if (err != ERR_OK) { - /* If the accept function returns with an error, we abort - * the connection. */ - tcp_abort(pcb); - return ERR_ABRT; - } - /* If there was any data contained within this ACK, - * we'd better pass it on to the application as well. */ - tcp_receive(pcb); - pcb->cwnd = pcb->mss; - } - /* incorrect ACK number */ - else { - /* send RST */ - tcp_rst(ackno, seqno + tcplen, &(iphdr->dest), &(iphdr->src), - tcphdr->dest, tcphdr->src); - } - } - break; - case CLOSE_WAIT: - /* FALLTHROUGH */ - case ESTABLISHED: - tcp_receive(pcb); - if (flags & TCP_FIN) { - tcp_ack_now(pcb); - pcb->state = CLOSE_WAIT; - } - break; - case FIN_WAIT_1: - tcp_receive(pcb); - if (flags & TCP_FIN) { - if (flags & TCP_ACK && ackno == pcb->snd_nxt) { - LWIP_DEBUGF(TCP_DEBUG, - ("TCP connection closed %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); - tcp_ack_now(pcb); - tcp_pcb_purge(pcb); - TCP_RMV(&tcp_active_pcbs, pcb); - pcb->state = TIME_WAIT; - TCP_REG(&tcp_tw_pcbs, pcb); - } else { - tcp_ack_now(pcb); - pcb->state = CLOSING; - } - } else if (flags & TCP_ACK && ackno == pcb->snd_nxt) { - pcb->state = FIN_WAIT_2; - } - break; - case FIN_WAIT_2: - tcp_receive(pcb); - if (flags & TCP_FIN) { - LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); - tcp_ack_now(pcb); - tcp_pcb_purge(pcb); - TCP_RMV(&tcp_active_pcbs, pcb); - pcb->state = TIME_WAIT; - TCP_REG(&tcp_tw_pcbs, pcb); - } - break; - case CLOSING: - tcp_receive(pcb); - if (flags & TCP_ACK && ackno == pcb->snd_nxt) { - LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); - tcp_ack_now(pcb); - tcp_pcb_purge(pcb); - TCP_RMV(&tcp_active_pcbs, pcb); - pcb->state = TIME_WAIT; - TCP_REG(&tcp_tw_pcbs, pcb); - } - break; - case LAST_ACK: - tcp_receive(pcb); - if (flags & TCP_ACK && ackno == pcb->snd_nxt) { - LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); - pcb->state = CLOSED; - recv_flags = TF_CLOSED; - } - break; - default: - break; - } - return ERR_OK; -} - -/* tcp_receive: - * - * Called by tcp_process. Checks if the given segment is an ACK for outstanding - * data, and if so frees the memory of the buffered data. Next, is places the - * segment on any of the receive queues (pcb->recved or pcb->ooseq). If the segment - * is buffered, the pbuf is referenced by pbuf_ref so that it will not be freed until - * i it has been removed from the buffer. - * - * If the incoming segment constitutes an ACK for a segment that was used for RTT - * estimation, the RTT is estimated here as well. - */ - -static void -tcp_receive(struct tcp_pcb *pcb) -{ - struct tcp_seg *next; -#if TCP_QUEUE_OOSEQ - struct tcp_seg *prev, *cseg; -#endif - struct pbuf *p; - s32_t off; - s16_t m; - u32_t right_wnd_edge; - u16_t new_tot_len; - - - if (flags & TCP_ACK) { - right_wnd_edge = pcb->snd_wnd + pcb->snd_wl1; - - /* Update window. */ - if (TCP_SEQ_LT(pcb->snd_wl1, seqno) || - (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) || - (pcb->snd_wl2 == ackno && tcphdr->wnd > pcb->snd_wnd)) { - pcb->snd_wnd = tcphdr->wnd; - pcb->snd_wl1 = seqno; - pcb->snd_wl2 = ackno; - LWIP_DEBUGF(TCP_WND_DEBUG, ("tcp_receive: window update %"U32_F"\n", pcb->snd_wnd)); -#if TCP_WND_DEBUG - } else { - if (pcb->snd_wnd != tcphdr->wnd) { - LWIP_DEBUGF(TCP_WND_DEBUG, ("tcp_receive: no window update lastack %"U32_F" snd_max %"U32_F" ackno %"U32_F" wl1 %"U32_F" seqno %"U32_F" wl2 %"U32_F"\n", - pcb->lastack, pcb->snd_max, ackno, pcb->snd_wl1, seqno, pcb->snd_wl2)); - } -#endif /* TCP_WND_DEBUG */ - } - - - if (pcb->lastack == ackno) { - pcb->acked = 0; - - if (pcb->snd_wl1 + pcb->snd_wnd == right_wnd_edge){ - ++pcb->dupacks; - if (pcb->dupacks >= 3 && pcb->unacked != NULL) { - if (!(pcb->flags & TF_INFR)) { - /* This is fast retransmit. Retransmit the first unacked segment. */ - LWIP_DEBUGF(TCP_FR_DEBUG, ("tcp_receive: dupacks %"U16_F" (%"U32_F"), fast retransmit %"U32_F"\n", - (u16_t)pcb->dupacks, pcb->lastack, - ntohl(pcb->unacked->tcphdr->seqno))); - tcp_rexmit(pcb); - /* Set ssthresh to max (FlightSize / 2, 2*SMSS) */ - /*pcb->ssthresh = LWIP_MAX((pcb->snd_max - - pcb->lastack) / 2, - 2 * pcb->mss);*/ - /* Set ssthresh to half of the minimum of the currenct cwnd and the advertised window */ - if(pcb->cwnd > pcb->snd_wnd) - pcb->ssthresh = pcb->snd_wnd / 2; - else - pcb->ssthresh = pcb->cwnd / 2; - - pcb->cwnd = pcb->ssthresh + 3 * pcb->mss; - pcb->flags |= TF_INFR; - } else { - /* Inflate the congestion window, but not if it means that - the value overflows. */ - if ((u16_t)(pcb->cwnd + pcb->mss) > pcb->cwnd) { - pcb->cwnd += pcb->mss; - } - } - } - } else { - LWIP_DEBUGF(TCP_FR_DEBUG, ("tcp_receive: dupack averted %"U32_F" %"U32_F"\n", - pcb->snd_wl1 + pcb->snd_wnd, right_wnd_edge)); - } - } else - /*if (TCP_SEQ_LT(pcb->lastack, ackno) && - TCP_SEQ_LEQ(ackno, pcb->snd_max)) { */ - if(TCP_SEQ_BETWEEN(ackno, pcb->lastack+1, pcb->snd_max)){ - /* We come here when the ACK acknowledges new data. */ - - /* Reset the "IN Fast Retransmit" flag, since we are no longer - in fast retransmit. Also reset the congestion window to the - slow start threshold. */ - if (pcb->flags & TF_INFR) { - pcb->flags &= ~TF_INFR; - pcb->cwnd = pcb->ssthresh; - } - - /* Reset the number of retransmissions. */ - pcb->nrtx = 0; - - /* Reset the retransmission time-out. */ - pcb->rto = (pcb->sa >> 3) + pcb->sv; - - /* Update the send buffer space. */ - pcb->acked = ackno - pcb->lastack; - - pcb->snd_buf += pcb->acked; - - /* Reset the fast retransmit variables. */ - pcb->dupacks = 0; - pcb->lastack = ackno; - - /* Update the congestion control variables (cwnd and - ssthresh). */ - if (pcb->state >= ESTABLISHED) { - if (pcb->cwnd < pcb->ssthresh) { - if ((u16_t)(pcb->cwnd + pcb->mss) > pcb->cwnd) { - pcb->cwnd += pcb->mss; - } - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"U16_F"\n", pcb->cwnd)); - } else { - u16_t new_cwnd = (pcb->cwnd + pcb->mss * pcb->mss / pcb->cwnd); - if (new_cwnd > pcb->cwnd) { - pcb->cwnd = new_cwnd; - } - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: congestion avoidance cwnd %"U16_F"\n", pcb->cwnd)); - } - } - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: ACK for %"U32_F", unacked->seqno %"U32_F":%"U32_F"\n", - ackno, - pcb->unacked != NULL? - ntohl(pcb->unacked->tcphdr->seqno): 0, - pcb->unacked != NULL? - ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked): 0)); - - /* Remove segment from the unacknowledged list if the incoming - ACK acknowlegdes them. */ - while (pcb->unacked != NULL && - TCP_SEQ_LEQ(ntohl(pcb->unacked->tcphdr->seqno) + - TCP_TCPLEN(pcb->unacked), ackno)) { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->unacked\n", - ntohl(pcb->unacked->tcphdr->seqno), - ntohl(pcb->unacked->tcphdr->seqno) + - TCP_TCPLEN(pcb->unacked))); - - next = pcb->unacked; - pcb->unacked = pcb->unacked->next; - - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"U16_F" ... ", (u16_t)pcb->snd_queuelen)); - pcb->snd_queuelen -= pbuf_clen(next->p); - tcp_seg_free(next); - - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"U16_F" (after freeing unacked)\n", (u16_t)pcb->snd_queuelen)); - if (pcb->snd_queuelen != 0) { - LWIP_ASSERT("tcp_receive: valid queue length", pcb->unacked != NULL || - pcb->unsent != NULL); - } - } - pcb->polltmr = 0; - } - - /* We go through the ->unsent list to see if any of the segments - on the list are acknowledged by the ACK. This may seem - strange since an "unsent" segment shouldn't be acked. The - rationale is that lwIP puts all outstanding segments on the - ->unsent list after a retransmission, so these segments may - in fact have been sent once. */ - while (pcb->unsent != NULL && - /*TCP_SEQ_LEQ(ntohl(pcb->unsent->tcphdr->seqno) + TCP_TCPLEN(pcb->unsent), ackno) && - TCP_SEQ_LEQ(ackno, pcb->snd_max)*/ - TCP_SEQ_BETWEEN(ackno, ntohl(pcb->unsent->tcphdr->seqno) + TCP_TCPLEN(pcb->unsent), pcb->snd_max) - ) { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->unsent\n", - ntohl(pcb->unsent->tcphdr->seqno), ntohl(pcb->unsent->tcphdr->seqno) + - TCP_TCPLEN(pcb->unsent))); - - next = pcb->unsent; - pcb->unsent = pcb->unsent->next; - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"U16_F" ... ", (u16_t)pcb->snd_queuelen)); - pcb->snd_queuelen -= pbuf_clen(next->p); - tcp_seg_free(next); - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"U16_F" (after freeing unsent)\n", (u16_t)pcb->snd_queuelen)); - if (pcb->snd_queuelen != 0) { - LWIP_ASSERT("tcp_receive: valid queue length", - pcb->unacked != NULL || pcb->unsent != NULL); - } - - if (pcb->unsent != NULL) { - pcb->snd_nxt = htonl(pcb->unsent->tcphdr->seqno); - } - } - /* End of ACK for new data processing. */ - - LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: pcb->rttest %"U32_F" rtseq %"U32_F" ackno %"U32_F"\n", - pcb->rttest, pcb->rtseq, ackno)); - - /* RTT estimation calculations. This is done by checking if the - incoming segment acknowledges the segment we use to take a - round-trip time measurement. */ - if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) { - m = tcp_ticks - pcb->rttest; - - LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n", - m, m * TCP_SLOW_INTERVAL)); - - /* This is taken directly from VJs original code in his paper */ - m = m - (pcb->sa >> 3); - pcb->sa += m; - if (m < 0) { - m = -m; - } - m = m - (pcb->sv >> 2); - pcb->sv += m; - pcb->rto = (pcb->sa >> 3) + pcb->sv; - - LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" miliseconds)\n", - pcb->rto, pcb->rto * TCP_SLOW_INTERVAL)); - - pcb->rttest = 0; - } - } - - /* If the incoming segment contains data, we must process it - further. */ - if (tcplen > 0) { - /* This code basically does three things: - - +) If the incoming segment contains data that is the next - in-sequence data, this data is passed to the application. This - might involve trimming the first edge of the data. The rcv_nxt - variable and the advertised window are adjusted. - - +) If the incoming segment has data that is above the next - sequence number expected (->rcv_nxt), the segment is placed on - the ->ooseq queue. This is done by finding the appropriate - place in the ->ooseq queue (which is ordered by sequence - number) and trim the segment in both ends if needed. An - immediate ACK is sent to indicate that we received an - out-of-sequence segment. - - +) Finally, we check if the first segment on the ->ooseq queue - now is in sequence (i.e., if rcv_nxt >= ooseq->seqno). If - rcv_nxt > ooseq->seqno, we must trim the first edge of the - segment on ->ooseq before we adjust rcv_nxt. The data in the - segments that are now on sequence are chained onto the - incoming segment so that we only need to call the application - once. - */ - - /* First, we check if we must trim the first edge. We have to do - this if the sequence number of the incoming segment is less - than rcv_nxt, and the sequence number plus the length of the - segment is larger than rcv_nxt. */ - /* if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)){ - if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/ - if(TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno+1, seqno+tcplen-1)){ - /* Trimming the first edge is done by pushing the payload - pointer in the pbuf downwards. This is somewhat tricky since - we do not want to discard the full contents of the pbuf up to - the new starting point of the data since we have to keep the - TCP header which is present in the first pbuf in the chain. - - What is done is really quite a nasty hack: the first pbuf in - the pbuf chain is pointed to by inseg.p. Since we need to be - able to deallocate the whole pbuf, we cannot change this - inseg.p pointer to point to any of the later pbufs in the - chain. Instead, we point the ->payload pointer in the first - pbuf to data in one of the later pbufs. We also set the - inseg.data pointer to point to the right place. This way, the - ->p pointer will still point to the first pbuf, but the - ->p->payload pointer will point to data in another pbuf. - - After we are done with adjusting the pbuf pointers we must - adjust the ->data pointer in the seg and the segment - length.*/ - - off = pcb->rcv_nxt - seqno; - p = inseg.p; - if (inseg.p->len < off) { - new_tot_len = inseg.p->tot_len - off; - while (p->len < off) { - off -= p->len; - /* KJM following line changed (with addition of new_tot_len var) - to fix bug #9076 - inseg.p->tot_len -= p->len; */ - p->tot_len = new_tot_len; - p->len = 0; - p = p->next; - } - pbuf_header(p, -off); - } else { - pbuf_header(inseg.p, -off); - } - /* KJM following line changed to use p->payload rather than inseg->p->payload - to fix bug #9076 */ - inseg.dataptr = p->payload; - inseg.len -= pcb->rcv_nxt - seqno; - inseg.tcphdr->seqno = seqno = pcb->rcv_nxt; - } - else{ - if(TCP_SEQ_LT(seqno, pcb->rcv_nxt)){ - /* the whole segment is < rcv_nxt */ - /* must be a duplicate of a packet that has already been correctly handled */ - - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno)); - tcp_ack_now(pcb); - } - } - - /* The sequence number must be within the window (above rcv_nxt - and below rcv_nxt + rcv_wnd) in order to be further - processed. */ - /*if (TCP_SEQ_GEQ(seqno, pcb->rcv_nxt) && - TCP_SEQ_LT(seqno, pcb->rcv_nxt + pcb->rcv_wnd)) {*/ - if(TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd - 1)){ - if (pcb->rcv_nxt == seqno) { - /* The incoming segment is the next in sequence. We check if - we have to trim the end of the segment and update rcv_nxt - and pass the data to the application. */ -#if TCP_QUEUE_OOSEQ - if (pcb->ooseq != NULL && - TCP_SEQ_LEQ(pcb->ooseq->tcphdr->seqno, seqno + inseg.len)) { - /* We have to trim the second edge of the incoming - segment. */ - inseg.len = pcb->ooseq->tcphdr->seqno - seqno; - pbuf_realloc(inseg.p, inseg.len); - } -#endif /* TCP_QUEUE_OOSEQ */ - - tcplen = TCP_TCPLEN(&inseg); - - /* First received FIN will be ACKed +1, on any successive (duplicate) - * FINs we are already in CLOSE_WAIT and have already done +1. - */ - if (pcb->state != CLOSE_WAIT) { - pcb->rcv_nxt += tcplen; - } - - /* Update the receiver's (our) window. */ - if (pcb->rcv_wnd < tcplen) { - pcb->rcv_wnd = 0; - } else { - pcb->rcv_wnd -= tcplen; - } - - /* If there is data in the segment, we make preparations to - pass this up to the application. The ->recv_data variable - is used for holding the pbuf that goes to the - application. The code for reassembling out-of-sequence data - chains its data on this pbuf as well. - - If the segment was a FIN, we set the TF_GOT_FIN flag that will - be used to indicate to the application that the remote side has - closed its end of the connection. */ - if (inseg.p->tot_len > 0) { - recv_data = inseg.p; - /* Since this pbuf now is the responsibility of the - application, we delete our reference to it so that we won't - (mistakingly) deallocate it. */ - inseg.p = NULL; - } - if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n")); - recv_flags = TF_GOT_FIN; - } - -#if TCP_QUEUE_OOSEQ - /* We now check if we have segments on the ->ooseq queue that - is now in sequence. */ - while (pcb->ooseq != NULL && - pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) { - - cseg = pcb->ooseq; - seqno = pcb->ooseq->tcphdr->seqno; - - pcb->rcv_nxt += TCP_TCPLEN(cseg); - if (pcb->rcv_wnd < TCP_TCPLEN(cseg)) { - pcb->rcv_wnd = 0; - } else { - pcb->rcv_wnd -= TCP_TCPLEN(cseg); - } - if (cseg->p->tot_len > 0) { - /* Chain this pbuf onto the pbuf that we will pass to - the application. */ - if (recv_data) { - pbuf_cat(recv_data, cseg->p); - } else { - recv_data = cseg->p; - } - cseg->p = NULL; - } - if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) { - LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n")); - recv_flags = TF_GOT_FIN; - } - - - pcb->ooseq = cseg->next; - tcp_seg_free(cseg); - } -#endif /* TCP_QUEUE_OOSEQ */ - - - /* Acknowledge the segment(s). */ - tcp_ack(pcb); - - } else { - /* We get here if the incoming segment is out-of-sequence. */ - tcp_ack_now(pcb); -#if TCP_QUEUE_OOSEQ - /* We queue the segment on the ->ooseq queue. */ - if (pcb->ooseq == NULL) { - pcb->ooseq = tcp_seg_copy(&inseg); - } else { - /* If the queue is not empty, we walk through the queue and - try to find a place where the sequence number of the - incoming segment is between the sequence numbers of the - previous and the next segment on the ->ooseq queue. That is - the place where we put the incoming segment. If needed, we - trim the second edges of the previous and the incoming - segment so that it will fit into the sequence. - - If the incoming segment has the same sequence number as a - segment on the ->ooseq queue, we discard the segment that - contains less data. */ - - prev = NULL; - for(next = pcb->ooseq; next != NULL; next = next->next) { - if (seqno == next->tcphdr->seqno) { - /* The sequence number of the incoming segment is the - same as the sequence number of the segment on - ->ooseq. We check the lengths to see which one to - discard. */ - if (inseg.len > next->len) { - /* The incoming segment is larger than the old - segment. We replace the old segment with the new - one. */ - cseg = tcp_seg_copy(&inseg); - if (cseg != NULL) { - cseg->next = next->next; - if (prev != NULL) { - prev->next = cseg; - } else { - pcb->ooseq = cseg; - } - } - break; - } else { - /* Either the lenghts are the same or the incoming - segment was smaller than the old one; in either - case, we ditch the incoming segment. */ - break; - } - } else { - if (prev == NULL) { - if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) { - /* The sequence number of the incoming segment is lower - than the sequence number of the first segment on the - queue. We put the incoming segment first on the - queue. */ - - if (TCP_SEQ_GT(seqno + inseg.len, next->tcphdr->seqno)) { - /* We need to trim the incoming segment. */ - inseg.len = next->tcphdr->seqno - seqno; - pbuf_realloc(inseg.p, inseg.len); - } - cseg = tcp_seg_copy(&inseg); - if (cseg != NULL) { - cseg->next = next; - pcb->ooseq = cseg; - } - break; - } - } else - /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) && - TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/ - if(TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno+1, next->tcphdr->seqno-1)){ - /* The sequence number of the incoming segment is in - between the sequence numbers of the previous and - the next segment on ->ooseq. We trim and insert the - incoming segment and trim the previous segment, if - needed. */ - if (TCP_SEQ_GT(seqno + inseg.len, next->tcphdr->seqno)) { - /* We need to trim the incoming segment. */ - inseg.len = next->tcphdr->seqno - seqno; - pbuf_realloc(inseg.p, inseg.len); - } - - cseg = tcp_seg_copy(&inseg); - if (cseg != NULL) { - cseg->next = next; - prev->next = cseg; - if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) { - /* We need to trim the prev segment. */ - prev->len = seqno - prev->tcphdr->seqno; - pbuf_realloc(prev->p, prev->len); - } - } - break; - } - /* If the "next" segment is the last segment on the - ooseq queue, we add the incoming segment to the end - of the list. */ - if (next->next == NULL && - TCP_SEQ_GT(seqno, next->tcphdr->seqno)) { - next->next = tcp_seg_copy(&inseg); - if (next->next != NULL) { - if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) { - /* We need to trim the last segment. */ - next->len = seqno - next->tcphdr->seqno; - pbuf_realloc(next->p, next->len); - } - } - break; - } - } - prev = next; - } - } -#endif /* TCP_QUEUE_OOSEQ */ - - } - } else { - /*if (TCP_SEQ_GT(pcb->rcv_nxt, seqno) || - TCP_SEQ_GEQ(seqno, pcb->rcv_nxt + pcb->rcv_wnd)) {*/ - if(!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd-1)){ - tcp_ack_now(pcb); - } - } - } else { - /* Segments with length 0 is taken care of here. Segments that - fall out of the window are ACKed. */ - /*if (TCP_SEQ_GT(pcb->rcv_nxt, seqno) || - TCP_SEQ_GEQ(seqno, pcb->rcv_nxt + pcb->rcv_wnd)) {*/ - if(!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd-1)){ - tcp_ack_now(pcb); - } - } -} - -/* - * tcp_parseopt: - * - * Parses the options contained in the incoming segment. (Code taken - * from uIP with only small changes.) - * - */ - -static void -tcp_parseopt(struct tcp_pcb *pcb) -{ - u8_t c; - u8_t *opts, opt; - u16_t mss; - - opts = (u8_t *)tcphdr + TCP_HLEN; - - /* Parse the TCP MSS option, if present. */ - if(TCPH_HDRLEN(tcphdr) > 0x5) { - for(c = 0; c < (TCPH_HDRLEN(tcphdr) - 5) << 2 ;) { - opt = opts[c]; - if (opt == 0x00) { - /* End of options. */ - break; - } else if (opt == 0x01) { - ++c; - /* NOP option. */ - } else if (opt == 0x02 && - opts[c + 1] == 0x04) { - /* An MSS option with the right option length. */ - mss = (opts[c + 2] << 8) | opts[c + 3]; - pcb->mss = mss > TCP_MSS? TCP_MSS: mss; - - /* And we are done processing options. */ - break; - } else { - if (opts[c + 1] == 0) { - /* If the length field is zero, the options are malformed - and we don't process them further. */ - break; - } - /* All other options have a length field, so that we easily - can skip past them. */ - c += opts[c + 1]; - } - } - } -} -#endif /* LWIP_TCP */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/tcp_out.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/tcp_out.c deleted file mode 100644 index 62982bd1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/tcp_out.c +++ /dev/null @@ -1,721 +0,0 @@ -/** - * @file - * - * Transmission Control Protocol, outgoing traffic - * - * The output functions of TCP. - * - */ - -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#include - -#include "lwip/def.h" -#include "lwip/opt.h" -#include "lwip/mem.h" -#include "lwip/memp.h" -#include "lwip/sys.h" -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/inet.h" -#include "lwip/tcp.h" -#include "lwip/stats.h" - -#if LWIP_TCP - -/* Forward declarations.*/ -static void tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb); - -err_t -tcp_send_ctrl(struct tcp_pcb *pcb, u8_t flags) -{ - /* no data, no length, flags, copy=1, no optdata, no optdatalen */ - return tcp_enqueue(pcb, NULL, 0, flags, 1, NULL, 0); -} - -/** - * Write data for sending (but does not send it immediately). - * - * It waits in the expectation of more data being sent soon (as - * it can send them more efficiently by combining them together). - * To prompt the system to send data now, call tcp_output() after - * calling tcp_write(). - * - * @arg pcb Protocol control block of the TCP connection to enqueue data for. - * - * @see tcp_write() - */ - -err_t -tcp_write(struct tcp_pcb *pcb, const void *arg, u16_t len, u8_t copy) -{ - LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, arg=%p, len=%"U16_F", copy=%"U16_F")\n", (void *)pcb, - arg, len, (u16_t)copy)); - /* connection is in valid state for data transmission? */ - if (pcb->state == ESTABLISHED || - pcb->state == CLOSE_WAIT || - pcb->state == SYN_SENT || - pcb->state == SYN_RCVD) { - if (len > 0) { - return tcp_enqueue(pcb, (void *)arg, len, 0, copy, NULL, 0); - } - return ERR_OK; - } else { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | DBG_STATE | 3, ("tcp_write() called in invalid state\n")); - return ERR_CONN; - } -} - -/** - * Enqueue either data or TCP options (but not both) for tranmission - * - * - * - * @arg pcb Protocol control block for the TCP connection to enqueue data for. - * @arg arg Pointer to the data to be enqueued for sending. - * @arg len Data length in bytes - * @arg flags - * @arg copy 1 if data must be copied, 0 if data is non-volatile and can be - * referenced. - * @arg optdata - * @arg optlen - */ -err_t -tcp_enqueue(struct tcp_pcb *pcb, void *arg, u16_t len, - u8_t flags, u8_t copy, - u8_t *optdata, u8_t optlen) -{ - struct pbuf *p; - struct tcp_seg *seg, *useg, *queue; - u32_t left, seqno; - u16_t seglen; - void *ptr; - u8_t queuelen; - - LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_enqueue(pcb=%p, arg=%p, len=%"U16_F", flags=%"X16_F", copy=%"U16_F")\n", - (void *)pcb, arg, len, (u16_t)flags, (u16_t)copy)); - LWIP_ASSERT("tcp_enqueue: len == 0 || optlen == 0 (programmer violates API)", - len == 0 || optlen == 0); - LWIP_ASSERT("tcp_enqueue: arg == NULL || optdata == NULL (programmer violates API)", - arg == NULL || optdata == NULL); - /* fail on too much data */ - if (len > pcb->snd_buf) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 3, ("tcp_enqueue: too much data (len=%"U16_F" > snd_buf=%"U16_F")\n", len, pcb->snd_buf)); - return ERR_MEM; - } - left = len; - ptr = arg; - - /* seqno will be the sequence number of the first segment enqueued - * by the call to this function. */ - seqno = pcb->snd_lbb; - - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen)); - - /* If total number of pbufs on the unsent/unacked queues exceeds the - * configured maximum, return an error */ - queuelen = pcb->snd_queuelen; - if (queuelen >= TCP_SND_QUEUELEN) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 3, ("tcp_enqueue: too long queue %"U16_F" (max %"U16_F")\n", queuelen, TCP_SND_QUEUELEN)); - TCP_STATS_INC(tcp.memerr); - return ERR_MEM; - } - if (queuelen != 0) { - LWIP_ASSERT("tcp_enqueue: pbufs on queue => at least one queue non-empty", - pcb->unacked != NULL || pcb->unsent != NULL); - } else { - LWIP_ASSERT("tcp_enqueue: no pbufs on queue => both queues empty", - pcb->unacked == NULL && pcb->unsent == NULL); - } - - /* First, break up the data into segments and tuck them together in - * the local "queue" variable. */ - useg = queue = seg = NULL; - seglen = 0; - while (queue == NULL || left > 0) { - - /* The segment length should be the MSS if the data to be enqueued - * is larger than the MSS. */ - seglen = left > pcb->mss? pcb->mss: left; - - /* Allocate memory for tcp_seg, and fill in fields. */ - seg = memp_malloc(MEMP_TCP_SEG); - if (seg == NULL) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_enqueue: could not allocate memory for tcp_seg\n")); - goto memerr; - } - seg->next = NULL; - seg->p = NULL; - - /* first segment of to-be-queued data? */ - if (queue == NULL) { - queue = seg; - } - /* subsequent segments of to-be-queued data */ - else { - /* Attach the segment to the end of the queued segments */ - LWIP_ASSERT("useg != NULL", useg != NULL); - useg->next = seg; - } - /* remember last segment of to-be-queued data for next iteration */ - useg = seg; - - /* If copy is set, memory should be allocated - * and data copied into pbuf, otherwise data comes from - * ROM or other static memory, and need not be copied. If - * optdata is != NULL, we have options instead of data. */ - - /* options? */ - if (optdata != NULL) { - if ((seg->p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) { - goto memerr; - } - ++queuelen; - seg->dataptr = seg->p->payload; - } - /* copy from volatile memory? */ - else if (copy) { - if ((seg->p = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_RAM)) == NULL) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_enqueue : could not allocate memory for pbuf copy size %"U16_F"\n", seglen)); - goto memerr; - } - ++queuelen; - if (arg != NULL) { - memcpy(seg->p->payload, ptr, seglen); - } - seg->dataptr = seg->p->payload; - } - /* do not copy data */ - else { - /* First, allocate a pbuf for holding the data. - * since the referenced data is available at least until it is sent out on the - * link (as it has to be ACKed by the remote party) we can safely use PBUF_ROM - * instead of PBUF_REF here. - */ - if ((p = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_ROM)) == NULL) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_enqueue: could not allocate memory for zero-copy pbuf\n")); - goto memerr; - } - ++queuelen; - /* reference the non-volatile payload data */ - p->payload = ptr; - seg->dataptr = ptr; - - /* Second, allocate a pbuf for the headers. */ - if ((seg->p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_RAM)) == NULL) { - /* If allocation fails, we have to deallocate the data pbuf as - * well. */ - pbuf_free(p); - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_enqueue: could not allocate memory for header pbuf\n")); - goto memerr; - } - ++queuelen; - - /* Concatenate the headers and data pbufs together. */ - pbuf_cat(seg->p/*header*/, p/*data*/); - p = NULL; - } - - /* Now that there are more segments queued, we check again if the - length of the queue exceeds the configured maximum. */ - if (queuelen > TCP_SND_QUEUELEN) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_enqueue: queue too long %"U16_F" (%"U16_F")\n", queuelen, TCP_SND_QUEUELEN)); - goto memerr; - } - - seg->len = seglen; - - /* build TCP header */ - if (pbuf_header(seg->p, TCP_HLEN)) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | 2, ("tcp_enqueue: no room for TCP header in pbuf.\n")); - TCP_STATS_INC(tcp.err); - goto memerr; - } - seg->tcphdr = seg->p->payload; - seg->tcphdr->src = htons(pcb->local_port); - seg->tcphdr->dest = htons(pcb->remote_port); - seg->tcphdr->seqno = htonl(seqno); - seg->tcphdr->urgp = 0; - TCPH_FLAGS_SET(seg->tcphdr, flags); - /* don't fill in tcphdr->ackno and tcphdr->wnd until later */ - - /* Copy the options into the header, if they are present. */ - if (optdata == NULL) { - TCPH_HDRLEN_SET(seg->tcphdr, 5); - } - else { - TCPH_HDRLEN_SET(seg->tcphdr, (5 + optlen / 4)); - /* Copy options into data portion of segment. - Options can thus only be sent in non data carrying - segments such as SYN|ACK. */ - memcpy(seg->dataptr, optdata, optlen); - } - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | DBG_TRACE, ("tcp_enqueue: queueing %"U32_F":%"U32_F" (0x%"X16_F")\n", - ntohl(seg->tcphdr->seqno), - ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg), - (u16_t)flags)); - - left -= seglen; - seqno += seglen; - ptr = (void *)((u8_t *)ptr + seglen); - } - - /* Now that the data to be enqueued has been broken up into TCP - segments in the queue variable, we add them to the end of the - pcb->unsent queue. */ - if (pcb->unsent == NULL) { - useg = NULL; - } - else { - for (useg = pcb->unsent; useg->next != NULL; useg = useg->next); - } - /* { useg is last segment on the unsent queue, NULL if list is empty } */ - - /* If there is room in the last pbuf on the unsent queue, - chain the first pbuf on the queue together with that. */ - if (useg != NULL && - TCP_TCPLEN(useg) != 0 && - !(TCPH_FLAGS(useg->tcphdr) & (TCP_SYN | TCP_FIN)) && - !(flags & (TCP_SYN | TCP_FIN)) && - /* fit within max seg size */ - useg->len + queue->len <= pcb->mss) { - /* Remove TCP header from first segment of our to-be-queued list */ - pbuf_header(queue->p, -TCP_HLEN); - pbuf_cat(useg->p, queue->p); - useg->len += queue->len; - useg->next = queue->next; - - LWIP_DEBUGF(TCP_OUTPUT_DEBUG | DBG_TRACE | DBG_STATE, ("tcp_enqueue: chaining segments, new len %"U16_F"\n", useg->len)); - if (seg == queue) { - seg = NULL; - } - memp_free(MEMP_TCP_SEG, queue); - } - else { - /* empty list */ - if (useg == NULL) { - /* initialize list with this segment */ - pcb->unsent = queue; - } - /* enqueue segment */ - else { - useg->next = queue; - } - } - if ((flags & TCP_SYN) || (flags & TCP_FIN)) { - ++len; - } - pcb->snd_lbb += len; - - pcb->snd_buf -= len; - - /* update number of segments on the queues */ - pcb->snd_queuelen = queuelen; - LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: %"S16_F" (after enqueued)\n", pcb->snd_queuelen)); - if (pcb->snd_queuelen != 0) { - LWIP_ASSERT("tcp_enqueue: valid queue length", - pcb->unacked != NULL || pcb->unsent != NULL); - } - - /* Set the PSH flag in the last segment that we enqueued, but only - if the segment has data (indicated by seglen > 0). */ - if (seg != NULL && seglen > 0 && seg->tcphdr != NULL) { - TCPH_SET_FLAG(seg->tcphdr, TCP_PSH); - } - - return ERR_OK; -memerr: - TCP_STATS_INC(tcp.memerr); - - if (queue != NULL) { - tcp_segs_free(queue); - } - if (pcb->snd_queuelen != 0) { - LWIP_ASSERT("tcp_enqueue: valid queue length", pcb->unacked != NULL || - pcb->unsent != NULL); - } - LWIP_DEBUGF(TCP_QLEN_DEBUG | DBG_STATE, ("tcp_enqueue: %"S16_F" (with mem err)\n", pcb->snd_queuelen)); - return ERR_MEM; -} - -/* find out what we can send and send it */ -err_t -tcp_output(struct tcp_pcb *pcb) -{ - struct pbuf *p; - struct tcp_hdr *tcphdr; - struct tcp_seg *seg, *useg; - u32_t wnd; -#if TCP_CWND_DEBUG - s16_t i = 0; -#endif /* TCP_CWND_DEBUG */ - - /* First, check if we are invoked by the TCP input processing - code. If so, we do not output anything. Instead, we rely on the - input processing code to call us when input processing is done - with. */ - if (tcp_input_pcb == pcb) { - return ERR_OK; - } - - wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd); - - seg = pcb->unsent; - - /* useg should point to last segment on unacked queue */ - useg = pcb->unacked; - if (useg != NULL) { - for (; useg->next != NULL; useg = useg->next); - } - - /* If the TF_ACK_NOW flag is set and no data will be sent (either - * because the ->unsent queue is empty or because the window does - * not allow it), construct an empty ACK segment and send it. - * - * If data is to be sent, we will just piggyback the ACK (see below). - */ - if (pcb->flags & TF_ACK_NOW && - (seg == NULL || - ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd)) { - p = pbuf_alloc(PBUF_IP, TCP_HLEN, PBUF_RAM); - if (p == NULL) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n")); - return ERR_BUF; - } - LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt)); - /* remove ACK flags from the PCB, as we send an empty ACK now */ - pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); - - tcphdr = p->payload; - tcphdr->src = htons(pcb->local_port); - tcphdr->dest = htons(pcb->remote_port); - tcphdr->seqno = htonl(pcb->snd_nxt); - tcphdr->ackno = htonl(pcb->rcv_nxt); - TCPH_FLAGS_SET(tcphdr, TCP_ACK); - tcphdr->wnd = htons(pcb->rcv_wnd); - tcphdr->urgp = 0; - TCPH_HDRLEN_SET(tcphdr, 5); - - tcphdr->chksum = 0; -#if CHECKSUM_GEN_TCP - tcphdr->chksum = inet_chksum_pseudo(p, &(pcb->local_ip), &(pcb->remote_ip), - IP_PROTO_TCP, p->tot_len); -#endif - ip_output(p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, - IP_PROTO_TCP); - pbuf_free(p); - - return ERR_OK; - } - -#if TCP_OUTPUT_DEBUG - if (seg == NULL) { - LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: nothing to send (%p)\n", (void*)pcb->unsent)); - } -#endif /* TCP_OUTPUT_DEBUG */ -#if TCP_CWND_DEBUG - if (seg == NULL) { - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_output: snd_wnd %"U32_F", cwnd %"U16_F", wnd %"U32_F", seg == NULL, ack %"U32_F"\n", - pcb->snd_wnd, pcb->cwnd, wnd, - pcb->lastack)); - } else { - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_output: snd_wnd %"U32_F", cwnd %"U16_F", wnd %"U32_F", effwnd %"U32_F", seq %"U32_F", ack %"U32_F"\n", - pcb->snd_wnd, pcb->cwnd, wnd, - ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len, - ntohl(seg->tcphdr->seqno), pcb->lastack)); - } -#endif /* TCP_CWND_DEBUG */ - /* data available and window allows it to be sent? */ - while (seg != NULL && - ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) { -#if TCP_CWND_DEBUG - LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_output: snd_wnd %"U32_F", cwnd %"U16_F", wnd %"U32_F", effwnd %"U32_F", seq %"U32_F", ack %"U32_F", i %"S16_F"\n", - pcb->snd_wnd, pcb->cwnd, wnd, - ntohl(seg->tcphdr->seqno) + seg->len - - pcb->lastack, - ntohl(seg->tcphdr->seqno), pcb->lastack, i)); - ++i; -#endif /* TCP_CWND_DEBUG */ - - pcb->unsent = seg->next; - - if (pcb->state != SYN_SENT) { - TCPH_SET_FLAG(seg->tcphdr, TCP_ACK); - pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); - } - - tcp_output_segment(seg, pcb); - pcb->snd_nxt = ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg); - if (TCP_SEQ_LT(pcb->snd_max, pcb->snd_nxt)) { - pcb->snd_max = pcb->snd_nxt; - } - /* put segment on unacknowledged list if length > 0 */ - if (TCP_TCPLEN(seg) > 0) { - seg->next = NULL; - /* unacked list is empty? */ - if (pcb->unacked == NULL) { - pcb->unacked = seg; - useg = seg; - /* unacked list is not empty? */ - } else { - /* In the case of fast retransmit, the packet should not go to the tail - * of the unacked queue, but rather at the head. We need to check for - * this case. -STJ Jul 27, 2004 */ - if (TCP_SEQ_LT(ntohl(seg->tcphdr->seqno), ntohl(useg->tcphdr->seqno))){ - /* add segment to head of unacked list */ - seg->next = pcb->unacked; - pcb->unacked = seg; - } else { - /* add segment to tail of unacked list */ - useg->next = seg; - useg = useg->next; - } - } - /* do not queue empty segments on the unacked list */ - } else { - tcp_seg_free(seg); - } - seg = pcb->unsent; - } - return ERR_OK; -} - -/** - * Actually send a TCP segment over IP - */ -static void -tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb) -{ - u16_t len; - struct netif *netif; - - /* The TCP header has already been constructed, but the ackno and - wnd fields remain. */ - seg->tcphdr->ackno = htonl(pcb->rcv_nxt); - - /* silly window avoidance */ - if (pcb->rcv_wnd < pcb->mss) { - seg->tcphdr->wnd = 0; - } else { - /* advertise our receive window size in this TCP segment */ - seg->tcphdr->wnd = htons(pcb->rcv_wnd); - } - - /* If we don't have a local IP address, we get one by - calling ip_route(). */ - if (ip_addr_isany(&(pcb->local_ip))) { - netif = ip_route(&(pcb->remote_ip)); - if (netif == NULL) { - return; - } - ip_addr_set(&(pcb->local_ip), &(netif->ip_addr)); - } - - pcb->rtime = 0; - - if (pcb->rttest == 0) { - pcb->rttest = tcp_ticks; - pcb->rtseq = ntohl(seg->tcphdr->seqno); - - LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_output_segment: rtseq %"U32_F"\n", pcb->rtseq)); - } - LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n", - htonl(seg->tcphdr->seqno), htonl(seg->tcphdr->seqno) + - seg->len)); - - len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload); - - seg->p->len -= len; - seg->p->tot_len -= len; - - seg->p->payload = seg->tcphdr; - - seg->tcphdr->chksum = 0; -#if CHECKSUM_GEN_TCP - seg->tcphdr->chksum = inet_chksum_pseudo(seg->p, - &(pcb->local_ip), - &(pcb->remote_ip), - IP_PROTO_TCP, seg->p->tot_len); -#endif - TCP_STATS_INC(tcp.xmit); - - ip_output(seg->p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, - IP_PROTO_TCP); -} - -void -tcp_rst(u32_t seqno, u32_t ackno, - struct ip_addr *local_ip, struct ip_addr *remote_ip, - u16_t local_port, u16_t remote_port) -{ - struct pbuf *p; - struct tcp_hdr *tcphdr; - p = pbuf_alloc(PBUF_IP, TCP_HLEN, PBUF_RAM); - if (p == NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n")); - return; - } - - tcphdr = p->payload; - tcphdr->src = htons(local_port); - tcphdr->dest = htons(remote_port); - tcphdr->seqno = htonl(seqno); - tcphdr->ackno = htonl(ackno); - TCPH_FLAGS_SET(tcphdr, TCP_RST | TCP_ACK); - tcphdr->wnd = htons(TCP_WND); - tcphdr->urgp = 0; - TCPH_HDRLEN_SET(tcphdr, 5); - - tcphdr->chksum = 0; -#if CHECKSUM_GEN_TCP - tcphdr->chksum = inet_chksum_pseudo(p, local_ip, remote_ip, - IP_PROTO_TCP, p->tot_len); -#endif - TCP_STATS_INC(tcp.xmit); - /* Send output with hardcoded TTL since we have no access to the pcb */ - ip_output(p, local_ip, remote_ip, TCP_TTL, 0, IP_PROTO_TCP); - pbuf_free(p); - LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno)); -} - -/* requeue all unacked segments for retransmission */ -void -tcp_rexmit_rto(struct tcp_pcb *pcb) -{ - struct tcp_seg *seg; - - if (pcb->unacked == NULL) { - return; - } - - /* Move all unacked segments to the head of the unsent queue */ - for (seg = pcb->unacked; seg->next != NULL; seg = seg->next); - /* concatenate unsent queue after unacked queue */ - seg->next = pcb->unsent; - /* unsent queue is the concatenated queue (of unacked, unsent) */ - pcb->unsent = pcb->unacked; - /* unacked queue is now empty */ - pcb->unacked = NULL; - - pcb->snd_nxt = ntohl(pcb->unsent->tcphdr->seqno); - /* increment number of retransmissions */ - ++pcb->nrtx; - - /* Don't take any RTT measurements after retransmitting. */ - pcb->rttest = 0; - - /* Do the actual retransmission */ - tcp_output(pcb); -} - -void -tcp_rexmit(struct tcp_pcb *pcb) -{ - struct tcp_seg *seg; - - if (pcb->unacked == NULL) { - return; - } - - /* Move the first unacked segment to the unsent queue */ - seg = pcb->unacked->next; - pcb->unacked->next = pcb->unsent; - pcb->unsent = pcb->unacked; - pcb->unacked = seg; - - pcb->snd_nxt = ntohl(pcb->unsent->tcphdr->seqno); - - ++pcb->nrtx; - - /* Don't take any rtt measurements after retransmitting. */ - pcb->rttest = 0; - - /* Do the actual retransmission. */ - tcp_output(pcb); - -} - - -void -tcp_keepalive(struct tcp_pcb *pcb) -{ - struct pbuf *p; - struct tcp_hdr *tcphdr; - - LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: sending KEEPALIVE probe to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", - ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), - ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip))); - - LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F" pcb->tmr %"U32_F" pcb->keep_cnt %"U16_F"\n", tcp_ticks, pcb->tmr, pcb->keep_cnt)); - - p = pbuf_alloc(PBUF_IP, TCP_HLEN, PBUF_RAM); - - if(p == NULL) { - LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: could not allocate memory for pbuf\n")); - return; - } - - tcphdr = p->payload; - tcphdr->src = htons(pcb->local_port); - tcphdr->dest = htons(pcb->remote_port); - tcphdr->seqno = htonl(pcb->snd_nxt - 1); - tcphdr->ackno = htonl(pcb->rcv_nxt); - tcphdr->wnd = htons(pcb->rcv_wnd); - tcphdr->urgp = 0; - TCPH_HDRLEN_SET(tcphdr, 5); - - tcphdr->chksum = 0; -#if CHECKSUM_GEN_TCP - tcphdr->chksum = inet_chksum_pseudo(p, &pcb->local_ip, &pcb->remote_ip, IP_PROTO_TCP, p->tot_len); -#endif - TCP_STATS_INC(tcp.xmit); - - /* Send output to IP */ - ip_output(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP); - - pbuf_free(p); - - LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F".\n", pcb->snd_nxt - 1, pcb->rcv_nxt)); -} - -#endif /* LWIP_TCP */ - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/udp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/udp.c deleted file mode 100644 index d1e0eaca..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/core/udp.c +++ /dev/null @@ -1,655 +0,0 @@ -/** - * @file - * User Datagram Protocol module - * - */ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - - -/* udp.c - * - * The code for the User Datagram Protocol UDP. - * - */ - -#include - -#include "lwip/opt.h" - -#include "lwip/def.h" -#include "lwip/memp.h" -#include "lwip/inet.h" -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/udp.h" -#include "lwip/icmp.h" - -#include "lwip/stats.h" - -#include "arch/perf.h" -#include "lwip/snmp.h" - -/* The list of UDP PCBs */ -#if LWIP_UDP -/* was static, but we may want to access this from a socket layer */ -struct udp_pcb *udp_pcbs = NULL; - -static struct udp_pcb *pcb_cache = NULL; - -void -udp_init(void) -{ - udp_pcbs = pcb_cache = NULL; -} - -/** - * Process an incoming UDP datagram. - * - * Given an incoming UDP datagram (as a chain of pbufs) this function - * finds a corresponding UDP PCB and - * - * @param pbuf pbuf to be demultiplexed to a UDP PCB. - * @param netif network interface on which the datagram was received. - * - */ -void -udp_input(struct pbuf *p, struct netif *inp) -{ - struct udp_hdr *udphdr; - struct udp_pcb *pcb; - struct udp_pcb *uncon_pcb; - struct ip_hdr *iphdr; - u16_t src, dest; - u8_t local_match; - - PERF_START; - - UDP_STATS_INC(udp.recv); - - iphdr = p->payload; - - if (pbuf_header(p, -((s16_t)(UDP_HLEN + IPH_HL(iphdr) * 4)))) { - /* drop short packets */ - LWIP_DEBUGF(UDP_DEBUG, ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len)); - UDP_STATS_INC(udp.lenerr); - UDP_STATS_INC(udp.drop); - snmp_inc_udpinerrors(); - pbuf_free(p); - goto end; - } - - udphdr = (struct udp_hdr *)((u8_t *)p->payload - UDP_HLEN); - - LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len)); - - src = ntohs(udphdr->src); - dest = ntohs(udphdr->dest); - - udp_debug_print(udphdr); - - /* print the UDP source and destination */ - LWIP_DEBUGF(UDP_DEBUG, ("udp (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F") <-- (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F")\n", - ip4_addr1(&iphdr->dest), ip4_addr2(&iphdr->dest), - ip4_addr3(&iphdr->dest), ip4_addr4(&iphdr->dest), ntohs(udphdr->dest), - ip4_addr1(&iphdr->src), ip4_addr2(&iphdr->src), - ip4_addr3(&iphdr->src), ip4_addr4(&iphdr->src), ntohs(udphdr->src))); - - local_match = 0; - uncon_pcb = NULL; - /* Iterate through the UDP pcb list for a matching pcb */ - for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) { - /* print the PCB local and remote address */ - LWIP_DEBUGF(UDP_DEBUG, ("pcb (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F") --- (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F")\n", - ip4_addr1(&pcb->local_ip), ip4_addr2(&pcb->local_ip), - ip4_addr3(&pcb->local_ip), ip4_addr4(&pcb->local_ip), pcb->local_port, - ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), - ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip), pcb->remote_port)); - - /* compare PCB local addr+port to UDP destination addr+port */ - if ((pcb->local_port == dest) && - (ip_addr_isany(&pcb->local_ip) || - ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest)))) { - local_match = 1; - if ((uncon_pcb == NULL) && - ((pcb->flags & UDP_FLAGS_CONNECTED) == 0)) { - /* the first unconnected matching PCB */ - uncon_pcb = pcb; - } - } - /* compare PCB remote addr+port to UDP source addr+port */ - if ((local_match != 0) && - (pcb->remote_port == src) && - (ip_addr_isany(&pcb->remote_ip) || - ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)))) { - /* the first fully matching PCB */ - break; - } - } - /* no fully matching pcb found? then look for an unconnected pcb */ - if (pcb == NULL) { - pcb = uncon_pcb; - } - - /* Check checksum if this is a match or if it was directed at us. */ - if (pcb != NULL || ip_addr_cmp(&inp->ip_addr, &iphdr->dest)) - { - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE, ("udp_input: calculating checksum\n")); - pbuf_header(p, UDP_HLEN); -#ifdef IPv6 - if (iphdr->nexthdr == IP_PROTO_UDPLITE) { -#else - if (IPH_PROTO(iphdr) == IP_PROTO_UDPLITE) { -#endif /* IPv4 */ - /* Do the UDP Lite checksum */ -#if CHECKSUM_CHECK_UDP - if (inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), - (struct ip_addr *)&(iphdr->dest), - IP_PROTO_UDPLITE, ntohs(udphdr->len)) != 0) { - LWIP_DEBUGF(UDP_DEBUG | 2, ("udp_input: UDP Lite datagram discarded due to failing checksum\n")); - UDP_STATS_INC(udp.chkerr); - UDP_STATS_INC(udp.drop); - snmp_inc_udpinerrors(); - pbuf_free(p); - goto end; - } -#endif - } else { -#if CHECKSUM_CHECK_UDP - if (udphdr->chksum != 0) { - if (inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), - (struct ip_addr *)&(iphdr->dest), - IP_PROTO_UDP, p->tot_len) != 0) { - LWIP_DEBUGF(UDP_DEBUG | 2, ("udp_input: UDP datagram discarded due to failing checksum\n")); - - UDP_STATS_INC(udp.chkerr); - UDP_STATS_INC(udp.drop); - snmp_inc_udpinerrors(); - pbuf_free(p); - goto end; - } - } -#endif - } - pbuf_header(p, -UDP_HLEN); - if (pcb != NULL) { - snmp_inc_udpindatagrams(); - /* callback */ - if (pcb->recv != NULL) - { - pcb->recv(pcb->recv_arg, pcb, p, &(iphdr->src), src); - } - } else { - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE, ("udp_input: not for us.\n")); - - /* No match was found, send ICMP destination port unreachable unless - destination address was broadcast/multicast. */ - - if (!ip_addr_isbroadcast(&iphdr->dest, inp) && - !ip_addr_ismulticast(&iphdr->dest)) { - - /* adjust pbuf pointer */ - p->payload = iphdr; - icmp_dest_unreach(p, ICMP_DUR_PORT); - } - UDP_STATS_INC(udp.proterr); - UDP_STATS_INC(udp.drop); - snmp_inc_udpnoports(); - pbuf_free(p); - } - } else { - pbuf_free(p); - } - end: - - PERF_STOP("udp_input"); -} - -/** - * Send data to a specified address using UDP. - * - * @param pcb UDP PCB used to send the data. - * @param pbuf chain of pbuf's to be sent. - * @param dst_ip Destination IP address. - * @param dst_port Destination UDP port. - * - * If the PCB already has a remote address association, it will - * be restored after the data is sent. - * - * @return lwIP error code. - * - ERR_OK. Successful. No error occured. - * - ERR_MEM. Out of memory. - * - ERR_RTE. Could not find route to destination address. - * - * @see udp_disconnect() udp_send() - */ -err_t -udp_sendto(struct udp_pcb *pcb, struct pbuf *p, - struct ip_addr *dst_ip, u16_t dst_port) -{ - err_t err; - /* temporary space for current PCB remote address */ - struct ip_addr pcb_remote_ip; - u16_t pcb_remote_port; - /* remember current remote peer address of PCB */ - pcb_remote_ip.addr = pcb->remote_ip.addr; - pcb_remote_port = pcb->remote_port; - /* copy packet destination address to PCB remote peer address */ - pcb->remote_ip.addr = dst_ip->addr; - pcb->remote_port = dst_port; - /* send to the packet destination address */ - err = udp_send(pcb, p); - /* restore PCB remote peer address */ - pcb->remote_ip.addr = pcb_remote_ip.addr; - pcb->remote_port = pcb_remote_port; - return err; -} - -/** - * Send data using UDP. - * - * @param pcb UDP PCB used to send the data. - * @param pbuf chain of pbuf's to be sent. - * - * @return lwIP error code. - * - ERR_OK. Successful. No error occured. - * - ERR_MEM. Out of memory. - * - ERR_RTE. Could not find route to destination address. - * - * @see udp_disconnect() udp_sendto() - */ -err_t -udp_send(struct udp_pcb *pcb, struct pbuf *p) -{ - struct udp_hdr *udphdr; - struct netif *netif; - struct ip_addr *src_ip; - err_t err; - struct pbuf *q; /* q will be sent down the stack */ - - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | 3, ("udp_send\n")); - - /* if the PCB is not yet bound to a port, bind it here */ - if (pcb->local_port == 0) { - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | 2, ("udp_send: not yet bound to a port, binding now\n")); - err = udp_bind(pcb, &pcb->local_ip, pcb->local_port); - if (err != ERR_OK) { - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | 2, ("udp_send: forced port bind failed\n")); - return err; - } - } - /* find the outgoing network interface for this packet */ - netif = ip_route(&(pcb->remote_ip)); - /* no outgoing network interface could be found? */ - if (netif == NULL) { - LWIP_DEBUGF(UDP_DEBUG | 1, ("udp_send: No route to 0x%"X32_F"\n", pcb->remote_ip.addr)); - UDP_STATS_INC(udp.rterr); - return ERR_RTE; - } - - /* not enough space to add an UDP header to first pbuf in given p chain? */ - if (pbuf_header(p, UDP_HLEN)) { - /* allocate header in a seperate new pbuf */ - q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM); - /* new header pbuf could not be allocated? */ - if (q == NULL) { - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | 2, ("udp_send: could not allocate header\n")); - return ERR_MEM; - } - /* chain header q in front of given pbuf p */ - pbuf_chain(q, p); - /* { first pbuf q points to header pbuf } */ - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p)); - /* adding a header within p succeeded */ - } else { - /* first pbuf q equals given pbuf */ - q = p; - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p)); - } - /* { q now represents the packet to be sent } */ - udphdr = q->payload; - udphdr->src = htons(pcb->local_port); - udphdr->dest = htons(pcb->remote_port); - /* in UDP, 0 checksum means 'no checksum' */ - udphdr->chksum = 0x0000; - - /* PCB local address is IP_ANY_ADDR? */ - if (ip_addr_isany(&pcb->local_ip)) { - /* use outgoing network interface IP address as source address */ - src_ip = &(netif->ip_addr); - } else { - /* use UDP PCB local IP address as source address */ - src_ip = &(pcb->local_ip); - } - - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: sending datagram of length %"U16_F"\n", q->tot_len)); - - /* UDP Lite protocol? */ - if (pcb->flags & UDP_FLAGS_UDPLITE) { - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP LITE packet length %"U16_F"\n", q->tot_len)); - /* set UDP message length in UDP header */ - udphdr->len = htons(pcb->chksum_len); - /* calculate checksum */ -#if CHECKSUM_GEN_UDP - udphdr->chksum = inet_chksum_pseudo(q, src_ip, &(pcb->remote_ip), - IP_PROTO_UDP, pcb->chksum_len); - /* chksum zero must become 0xffff, as zero means 'no checksum' */ - if (udphdr->chksum == 0x0000) udphdr->chksum = 0xffff; -#else - udphdr->chksum = 0x0000; -#endif - /* output to IP */ - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,IP_PROTO_UDPLITE,)\n")); - err = ip_output_if (q, src_ip, &pcb->remote_ip, pcb->ttl, pcb->tos, IP_PROTO_UDPLITE, netif); - /* UDP */ - } else { - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len)); - udphdr->len = htons(q->tot_len); - /* calculate checksum */ -#if CHECKSUM_GEN_UDP - if ((pcb->flags & UDP_FLAGS_NOCHKSUM) == 0) { - udphdr->chksum = inet_chksum_pseudo(q, src_ip, &pcb->remote_ip, IP_PROTO_UDP, q->tot_len); - /* chksum zero must become 0xffff, as zero means 'no checksum' */ - if (udphdr->chksum == 0x0000) udphdr->chksum = 0xffff; - } -#else - udphdr->chksum = 0x0000; -#endif - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum)); - LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,IP_PROTO_UDP,)\n")); - /* output to IP */ - err = ip_output_if(q, src_ip, &pcb->remote_ip, pcb->ttl, pcb->tos, IP_PROTO_UDP, netif); - } - /* TODO: must this be increased even if error occured? */ - snmp_inc_udpoutdatagrams(); - - /* did we chain a seperate header pbuf earlier? */ - if (q != p) { - /* free the header pbuf */ - pbuf_free(q); q = NULL; - /* { p is still referenced by the caller, and will live on } */ - } - - UDP_STATS_INC(udp.xmit); - return err; -} - -/** - * Bind an UDP PCB. - * - * @param pcb UDP PCB to be bound with a local address ipaddr and port. - * @param ipaddr local IP address to bind with. Use IP_ADDR_ANY to - * bind to all local interfaces. - * @param port local UDP port to bind with. - * - * @return lwIP error code. - * - ERR_OK. Successful. No error occured. - * - ERR_USE. The specified ipaddr and port are already bound to by - * another UDP PCB. - * - * @see udp_disconnect() - */ -err_t -udp_bind(struct udp_pcb *pcb, struct ip_addr *ipaddr, u16_t port) -{ - struct udp_pcb *ipcb; - u8_t rebind; - - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | 3, ("udp_bind(ipaddr = ")); - ip_addr_debug_print(UDP_DEBUG, ipaddr); - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | 3, (", port = %"U16_F")\n", port)); - - rebind = 0; - /* Check for double bind and rebind of the same pcb */ - for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) { - /* is this UDP PCB already on active list? */ - if (pcb == ipcb) { - /* pcb may occur at most once in active list */ - LWIP_ASSERT("rebind == 0", rebind == 0); - /* pcb already in list, just rebind */ - rebind = 1; - } - -/* this code does not allow upper layer to share a UDP port for - listening to broadcast or multicast traffic (See SO_REUSE_ADDR and - SO_REUSE_PORT under *BSD). TODO: See where it fits instead, OR - combine with implementation of UDP PCB flags. Leon Woestenberg. */ -#ifdef LWIP_UDP_TODO - /* port matches that of PCB in list? */ - else if ((ipcb->local_port == port) && - /* IP address matches, or one is IP_ADDR_ANY? */ - (ip_addr_isany(&(ipcb->local_ip)) || - ip_addr_isany(ipaddr) || - ip_addr_cmp(&(ipcb->local_ip), ipaddr))) { - /* other PCB already binds to this local IP and port */ - LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: local port %"U16_F" already bound by another pcb\n", port)); - return ERR_USE; - } -#endif - - } - - ip_addr_set(&pcb->local_ip, ipaddr); - /* no port specified? */ - if (port == 0) { -#ifndef UDP_LOCAL_PORT_RANGE_START -#define UDP_LOCAL_PORT_RANGE_START 4096 -#define UDP_LOCAL_PORT_RANGE_END 0x7fff -#endif - port = UDP_LOCAL_PORT_RANGE_START; - ipcb = udp_pcbs; - while ((ipcb != NULL) && (port != UDP_LOCAL_PORT_RANGE_END)) { - if (ipcb->local_port == port) { - port++; - ipcb = udp_pcbs; - } else - ipcb = ipcb->next; - } - if (ipcb != NULL) { - /* no more ports available in local range */ - LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n")); - return ERR_USE; - } - } - pcb->local_port = port; - /* pcb not active yet? */ - if (rebind == 0) { - /* place the PCB on the active list if not already there */ - pcb->next = udp_pcbs; - udp_pcbs = pcb; - } - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | DBG_STATE, ("udp_bind: bound to %"U16_F".%"U16_F".%"U16_F".%"U16_F", port %"U16_F"\n", - (u16_t)(ntohl(pcb->local_ip.addr) >> 24 & 0xff), - (u16_t)(ntohl(pcb->local_ip.addr) >> 16 & 0xff), - (u16_t)(ntohl(pcb->local_ip.addr) >> 8 & 0xff), - (u16_t)(ntohl(pcb->local_ip.addr) & 0xff), pcb->local_port)); - return ERR_OK; -} -/** - * Connect an UDP PCB. - * - * This will associate the UDP PCB with the remote address. - * - * @param pcb UDP PCB to be connected with remote address ipaddr and port. - * @param ipaddr remote IP address to connect with. - * @param port remote UDP port to connect with. - * - * @return lwIP error code - * - * @see udp_disconnect() - */ -err_t -udp_connect(struct udp_pcb *pcb, struct ip_addr *ipaddr, u16_t port) -{ - struct udp_pcb *ipcb; - - if (pcb->local_port == 0) { - err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port); - if (err != ERR_OK) - return err; - } - - ip_addr_set(&pcb->remote_ip, ipaddr); - pcb->remote_port = port; - pcb->flags |= UDP_FLAGS_CONNECTED; -/** TODO: this functionality belongs in upper layers */ -#ifdef LWIP_UDP_TODO - /* Nail down local IP for netconn_addr()/getsockname() */ - if (ip_addr_isany(&pcb->local_ip) && !ip_addr_isany(&pcb->remote_ip)) { - struct netif *netif; - - if ((netif = ip_route(&(pcb->remote_ip))) == NULL) { - LWIP_DEBUGF(UDP_DEBUG, ("udp_connect: No route to 0x%lx\n", pcb->remote_ip.addr)); - UDP_STATS_INC(udp.rterr); - return ERR_RTE; - } - /** TODO: this will bind the udp pcb locally, to the interface which - is used to route output packets to the remote address. However, we - might want to accept incoming packets on any interface! */ - pcb->local_ip = netif->ip_addr; - } else if (ip_addr_isany(&pcb->remote_ip)) { - pcb->local_ip.addr = 0; - } -#endif - LWIP_DEBUGF(UDP_DEBUG | DBG_TRACE | DBG_STATE, ("udp_connect: connected to %"U16_F".%"U16_F".%"U16_F".%"U16_F",port %"U16_F"\n", - (u16_t)(ntohl(pcb->remote_ip.addr) >> 24 & 0xff), - (u16_t)(ntohl(pcb->remote_ip.addr) >> 16 & 0xff), - (u16_t)(ntohl(pcb->remote_ip.addr) >> 8 & 0xff), - (u16_t)(ntohl(pcb->remote_ip.addr) & 0xff), pcb->remote_port)); - - /* Insert UDP PCB into the list of active UDP PCBs. */ - for(ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) { - if (pcb == ipcb) { - /* already on the list, just return */ - return ERR_OK; - } - } - /* PCB not yet on the list, add PCB now */ - pcb->next = udp_pcbs; - udp_pcbs = pcb; - return ERR_OK; -} - -void -udp_disconnect(struct udp_pcb *pcb) -{ - /* reset remote address association */ - ip_addr_set(&pcb->remote_ip, IP_ADDR_ANY); - pcb->remote_port = 0; - /* mark PCB as unconnected */ - pcb->flags &= ~UDP_FLAGS_CONNECTED; -} - -void -udp_recv(struct udp_pcb *pcb, - void (* recv)(void *arg, struct udp_pcb *upcb, struct pbuf *p, - struct ip_addr *addr, u16_t port), - void *recv_arg) -{ - /* remember recv() callback and user data */ - pcb->recv = recv; - pcb->recv_arg = recv_arg; -} -/** - * Remove an UDP PCB. - * - * @param pcb UDP PCB to be removed. The PCB is removed from the list of - * UDP PCB's and the data structure is freed from memory. - * - * @see udp_new() - */ -void -udp_remove(struct udp_pcb *pcb) -{ - struct udp_pcb *pcb2; - /* pcb to be removed is first in list? */ - if (udp_pcbs == pcb) { - /* make list start at 2nd pcb */ - udp_pcbs = udp_pcbs->next; - /* pcb not 1st in list */ - } else for(pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) { - /* find pcb in udp_pcbs list */ - if (pcb2->next != NULL && pcb2->next == pcb) { - /* remove pcb from list */ - pcb2->next = pcb->next; - } - } - memp_free(MEMP_UDP_PCB, pcb); -} -/** - * Create a UDP PCB. - * - * @return The UDP PCB which was created. NULL if the PCB data structure - * could not be allocated. - * - * @see udp_remove() - */ -struct udp_pcb * -udp_new(void) { - struct udp_pcb *pcb; - pcb = memp_malloc(MEMP_UDP_PCB); - /* could allocate UDP PCB? */ - if (pcb != NULL) { - /* initialize PCB to all zeroes */ - memset(pcb, 0, sizeof(struct udp_pcb)); - pcb->ttl = UDP_TTL; - } - - - return pcb; -} - -#if UDP_DEBUG -void -udp_debug_print(struct udp_hdr *udphdr) -{ - LWIP_DEBUGF(UDP_DEBUG, ("UDP header:\n")); - LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(UDP_DEBUG, ("| %5"U16_F" | %5"U16_F" | (src port, dest port)\n", - ntohs(udphdr->src), ntohs(udphdr->dest))); - LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); - LWIP_DEBUGF(UDP_DEBUG, ("| %5"U16_F" | 0x%04"X16_F" | (len, chksum)\n", - ntohs(udphdr->len), ntohs(udphdr->chksum))); - LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); -} -#endif /* UDP_DEBUG */ - -#endif /* LWIP_UDP */ - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/icmp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/icmp.h deleted file mode 100644 index 634405b7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/icmp.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_ICMP_H__ -#define __LWIP_ICMP_H__ - -#include "lwip/arch.h" - -#include "lwip/opt.h" -#include "lwip/pbuf.h" - -#include "lwip/ip_addr.h" -#include "lwip/netif.h" - -#define ICMP_ER 0 /* echo reply */ -#define ICMP_DUR 3 /* destination unreachable */ -#define ICMP_SQ 4 /* source quench */ -#define ICMP_RD 5 /* redirect */ -#define ICMP_ECHO 8 /* echo */ -#define ICMP_TE 11 /* time exceeded */ -#define ICMP_PP 12 /* parameter problem */ -#define ICMP_TS 13 /* timestamp */ -#define ICMP_TSR 14 /* timestamp reply */ -#define ICMP_IRQ 15 /* information request */ -#define ICMP_IR 16 /* information reply */ - -enum icmp_dur_type { - ICMP_DUR_NET = 0, /* net unreachable */ - ICMP_DUR_HOST = 1, /* host unreachable */ - ICMP_DUR_PROTO = 2, /* protocol unreachable */ - ICMP_DUR_PORT = 3, /* port unreachable */ - ICMP_DUR_FRAG = 4, /* fragmentation needed and DF set */ - ICMP_DUR_SR = 5 /* source route failed */ -}; - -enum icmp_te_type { - ICMP_TE_TTL = 0, /* time to live exceeded in transit */ - ICMP_TE_FRAG = 1 /* fragment reassembly time exceeded */ -}; - -void icmp_input(struct pbuf *p, struct netif *inp); - -void icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t); -void icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t); - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct icmp_echo_hdr { - PACK_STRUCT_FIELD(u16_t _type_code); - PACK_STRUCT_FIELD(u16_t chksum); - PACK_STRUCT_FIELD(u16_t id); - PACK_STRUCT_FIELD(u16_t seqno); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END - -PACK_STRUCT_BEGIN -struct icmp_dur_hdr { - PACK_STRUCT_FIELD(u16_t _type_code); - PACK_STRUCT_FIELD(u16_t chksum); - PACK_STRUCT_FIELD(u32_t unused); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END - -PACK_STRUCT_BEGIN -struct icmp_te_hdr { - PACK_STRUCT_FIELD(u16_t _type_code); - PACK_STRUCT_FIELD(u16_t chksum); - PACK_STRUCT_FIELD(u32_t unused); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#define ICMPH_TYPE(hdr) (ntohs((hdr)->_type_code) >> 8) -#define ICMPH_CODE(hdr) (ntohs((hdr)->_type_code) & 0xff) - -#define ICMPH_TYPE_SET(hdr, type) ((hdr)->_type_code = htons(ICMPH_CODE(hdr) | ((type) << 8))) -#define ICMPH_CODE_SET(hdr, code) ((hdr)->_type_code = htons((code) | (ICMPH_TYPE(hdr) << 8))) - -#endif /* __LWIP_ICMP_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/inet.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/inet.h deleted file mode 100644 index 6d79aab7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/inet.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_INET_H__ -#define __LWIP_INET_H__ - -#include "lwip/arch.h" - -#include "lwip/opt.h" -#include "lwip/pbuf.h" -#include "lwip/ip_addr.h" - -u16_t inet_chksum(void *dataptr, u16_t len); -#if 0 /* optimized routine */ -u16_t inet_chksum4(u8_t *dataptr, u16_t len); -#endif -u16_t inet_chksum_pbuf(struct pbuf *p); -u16_t inet_chksum_pseudo(struct pbuf *p, - struct ip_addr *src, struct ip_addr *dest, - u8_t proto, u16_t proto_len); - -u32_t inet_addr(const char *cp); -s8_t inet_aton(const char *cp, struct in_addr *addr); -char *inet_ntoa(struct in_addr addr); /* returns ptr to static buffer; not reentrant! */ - -#ifdef htons -#undef htons -#endif /* htons */ -#ifdef htonl -#undef htonl -#endif /* htonl */ -#ifdef ntohs -#undef ntohs -#endif /* ntohs */ -#ifdef ntohl -#undef ntohl -#endif /* ntohl */ - -#if BYTE_ORDER == BIG_ENDIAN -#define htons(x) (x) -#define ntohs(x) (x) -#define htonl(x) (x) -#define ntohl(x) (x) -#else -#ifdef LWIP_PREFIX_BYTEORDER_FUNCS -/* workaround for naming collisions on some platforms */ -#define htons lwip_htons -#define ntohs lwip_ntohs -#define htonl lwip_htonl -#define ntohl lwip_ntohl -#endif -u16_t htons(u16_t x); -u16_t ntohs(u16_t x); -u32_t htonl(u32_t x); -u32_t ntohl(u32_t x); -#endif - -#endif /* __LWIP_INET_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/ip.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/ip.h deleted file mode 100644 index 4c15e1a0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/ip.h +++ /dev/null @@ -1,154 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_IP_H__ -#define __LWIP_IP_H__ - -#include "lwip/arch.h" - -#include "lwip/def.h" -#include "lwip/pbuf.h" -#include "lwip/ip_addr.h" - -#include "lwip/err.h" - - -void ip_init(void); -struct netif *ip_route(struct ip_addr *dest); -err_t ip_input(struct pbuf *p, struct netif *inp); -err_t ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t tos, u8_t proto); -err_t ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t tos, u8_t proto, - struct netif *netif); - -#define IP_HLEN 20 - -#define IP_PROTO_ICMP 1 -#define IP_PROTO_UDP 17 -#define IP_PROTO_UDPLITE 170 -#define IP_PROTO_TCP 6 - -/* This is passed as the destination address to ip_output_if (not - to ip_output), meaning that an IP header already is constructed - in the pbuf. This is used when TCP retransmits. */ -#ifdef IP_HDRINCL -#undef IP_HDRINCL -#endif /* IP_HDRINCL */ -#define IP_HDRINCL NULL - - -/* This is the common part of all PCB types. It needs to be at the - beginning of a PCB type definition. It is located here so that - changes to this common part are made in one location instead of - having to change all PCB structs. */ -#define IP_PCB struct ip_addr local_ip; \ - struct ip_addr remote_ip; \ - /* Socket options */ \ - u16_t so_options; \ - /* Type Of Service */ \ - u8_t tos; \ - /* Time To Live */ \ - u8_t ttl - -/* - * Option flags per-socket. These are the same like SO_XXX. - */ -#define SOF_DEBUG (u16_t)0x0001U /* turn on debugging info recording */ -#define SOF_ACCEPTCONN (u16_t)0x0002U /* socket has had listen() */ -#define SOF_REUSEADDR (u16_t)0x0004U /* allow local address reuse */ -#define SOF_KEEPALIVE (u16_t)0x0008U /* keep connections alive */ -#define SOF_DONTROUTE (u16_t)0x0010U /* just use interface addresses */ -#define SOF_BROADCAST (u16_t)0x0020U /* permit sending of broadcast msgs */ -#define SOF_USELOOPBACK (u16_t)0x0040U /* bypass hardware when possible */ -#define SOF_LINGER (u16_t)0x0080U /* linger on close if data present */ -#define SOF_OOBINLINE (u16_t)0x0100U /* leave received OOB data in line */ -#define SOF_REUSEPORT (u16_t)0x0200U /* allow local address & port reuse */ - - - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct ip_hdr { - /* version / header length / type of service */ - PACK_STRUCT_FIELD(u16_t _v_hl_tos); - /* total length */ - PACK_STRUCT_FIELD(u16_t _len); - /* identification */ - PACK_STRUCT_FIELD(u16_t _id); - /* fragment offset field */ - PACK_STRUCT_FIELD(u16_t _offset); -#define IP_RF 0x8000 /* reserved fragment flag */ -#define IP_DF 0x4000 /* dont fragment flag */ -#define IP_MF 0x2000 /* more fragments flag */ -#define IP_OFFMASK 0x1fff /* mask for fragmenting bits */ - /* time to live / protocol*/ - PACK_STRUCT_FIELD(u16_t _ttl_proto); - /* checksum */ - PACK_STRUCT_FIELD(u16_t _chksum); - /* source and destination IP addresses */ - PACK_STRUCT_FIELD(struct ip_addr src); - PACK_STRUCT_FIELD(struct ip_addr dest); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#define IPH_V(hdr) (ntohs((hdr)->_v_hl_tos) >> 12) -#define IPH_HL(hdr) ((ntohs((hdr)->_v_hl_tos) >> 8) & 0x0f) -#define IPH_TOS(hdr) (ntohs((hdr)->_v_hl_tos) & 0xff) -#define IPH_LEN(hdr) ((hdr)->_len) -#define IPH_ID(hdr) ((hdr)->_id) -#define IPH_OFFSET(hdr) ((hdr)->_offset) -#define IPH_TTL(hdr) (ntohs((hdr)->_ttl_proto) >> 8) -#define IPH_PROTO(hdr) (ntohs((hdr)->_ttl_proto) & 0xff) -#define IPH_CHKSUM(hdr) ((hdr)->_chksum) - -#define IPH_VHLTOS_SET(hdr, v, hl, tos) (hdr)->_v_hl_tos = (htons(((v) << 12) | ((hl) << 8) | (tos))) -#define IPH_LEN_SET(hdr, len) (hdr)->_len = (len) -#define IPH_ID_SET(hdr, id) (hdr)->_id = (id) -#define IPH_OFFSET_SET(hdr, off) (hdr)->_offset = (off) -#define IPH_TTL_SET(hdr, ttl) (hdr)->_ttl_proto = (htons(IPH_PROTO(hdr) | ((ttl) << 8))) -#define IPH_PROTO_SET(hdr, proto) (hdr)->_ttl_proto = (htons((proto) | (IPH_TTL(hdr) << 8))) -#define IPH_CHKSUM_SET(hdr, chksum) (hdr)->_chksum = (chksum) - -#if IP_DEBUG -void ip_debug_print(struct pbuf *p); -#else -#define ip_debug_print(p) -#endif /* IP_DEBUG */ - -#endif /* __LWIP_IP_H__ */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/ip_addr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/ip_addr.h deleted file mode 100644 index 2819b152..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/ip_addr.h +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_IP_ADDR_H__ -#define __LWIP_IP_ADDR_H__ - -#include "lwip/arch.h" - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct ip_addr { - PACK_STRUCT_FIELD(u32_t addr); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct ip_addr2 { - PACK_STRUCT_FIELD(u16_t addrw[2]); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -/* For compatibility with BSD code */ -struct in_addr { - u32_t s_addr; -}; - -struct netif; - -extern const struct ip_addr ip_addr_any; -extern const struct ip_addr ip_addr_broadcast; - -/** IP_ADDR_ can be used as a fixed IP address - * for the wildcard and the broadcast address - */ -#define IP_ADDR_ANY ((struct ip_addr *)&ip_addr_any) -#define IP_ADDR_BROADCAST ((struct ip_addr *)&ip_addr_broadcast) - -#define INADDR_NONE ((u32_t) 0xffffffff) /* 255.255.255.255 */ -#define INADDR_LOOPBACK ((u32_t) 0x7f000001) /* 127.0.0.1 */ - -/* Definitions of the bits in an Internet address integer. - - On subnets, host and network parts are found according to - the subnet mask, not these masks. */ - -#define IN_CLASSA(a) ((((u32_t)(a)) & 0x80000000) == 0) -#define IN_CLASSA_NET 0xff000000 -#define IN_CLASSA_NSHIFT 24 -#define IN_CLASSA_HOST (0xffffffff & ~IN_CLASSA_NET) -#define IN_CLASSA_MAX 128 - -#define IN_CLASSB(a) ((((u32_t)(a)) & 0xc0000000) == 0x80000000) -#define IN_CLASSB_NET 0xffff0000 -#define IN_CLASSB_NSHIFT 16 -#define IN_CLASSB_HOST (0xffffffff & ~IN_CLASSB_NET) -#define IN_CLASSB_MAX 65536 - -#define IN_CLASSC(a) ((((u32_t)(a)) & 0xe0000000) == 0xc0000000) -#define IN_CLASSC_NET 0xffffff00 -#define IN_CLASSC_NSHIFT 8 -#define IN_CLASSC_HOST (0xffffffff & ~IN_CLASSC_NET) - -#define IN_CLASSD(a) (((u32_t)(a) & 0xf0000000) == 0xe0000000) -#define IN_CLASSD_NET 0xf0000000 /* These ones aren't really */ -#define IN_CLASSD_NSHIFT 28 /* net and host fields, but */ -#define IN_CLASSD_HOST 0x0fffffff /* routing needn't know. */ -#define IN_MULTICAST(a) IN_CLASSD(a) - -#define IN_EXPERIMENTAL(a) (((u32_t)(a) & 0xf0000000) == 0xf0000000) -#define IN_BADCLASS(a) (((u32_t)(a) & 0xf0000000) == 0xf0000000) - -#define IN_LOOPBACKNET 127 /* official! */ - - -#define IP4_ADDR(ipaddr, a,b,c,d) (ipaddr)->addr = htonl(((u32_t)(a & 0xff) << 24) | ((u32_t)(b & 0xff) << 16) | \ - ((u32_t)(c & 0xff) << 8) | (u32_t)(d & 0xff)) - -#define ip_addr_set(dest, src) (dest)->addr = \ - ((src) == NULL? 0:\ - (src)->addr) -/** - * Determine if two address are on the same network. - * - * @arg addr1 IP address 1 - * @arg addr2 IP address 2 - * @arg mask network identifier mask - * @return !0 if the network identifiers of both address match - */ -#define ip_addr_netcmp(addr1, addr2, mask) (((addr1)->addr & \ - (mask)->addr) == \ - ((addr2)->addr & \ - (mask)->addr)) -#define ip_addr_cmp(addr1, addr2) ((addr1)->addr == (addr2)->addr) - -#define ip_addr_isany(addr1) ((addr1) == NULL || (addr1)->addr == 0) - -u8_t ip_addr_isbroadcast(struct ip_addr *, struct netif *); - -#define ip_addr_ismulticast(addr1) (((addr1)->addr & ntohl(0xf0000000)) == ntohl(0xe0000000)) - - -#define ip_addr_debug_print(debug, ipaddr) LWIP_DEBUGF(debug, ("%"U16_F".%"U16_F".%"U16_F".%"U16_F, \ - ipaddr?(u16_t)(ntohl((ipaddr)->addr) >> 24) & 0xff:0, \ - ipaddr?(u16_t)(ntohl((ipaddr)->addr) >> 16) & 0xff:0, \ - ipaddr?(u16_t)(ntohl((ipaddr)->addr) >> 8) & 0xff:0, \ - ipaddr?(u16_t)ntohl((ipaddr)->addr) & 0xff:0U)) - -/* cast to unsigned int, as it is used as argument to printf functions - * which expect integer arguments. CSi: use cc.h formatters (conversion chars)! */ -#define ip4_addr1(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 24) & 0xff) -#define ip4_addr2(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 16) & 0xff) -#define ip4_addr3(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 8) & 0xff) -#define ip4_addr4(ipaddr) ((u16_t)(ntohl((ipaddr)->addr)) & 0xff) -#endif /* __LWIP_IP_ADDR_H__ */ - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/ip_frag.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/ip_frag.h deleted file mode 100644 index a982c5a6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv4/lwip/ip_frag.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Jani Monoses - * - */ - -#ifndef __LWIP_IP_FRAG_H__ -#define __LWIP_IP_FRAG_H__ - -#include "lwip/err.h" -#include "lwip/pbuf.h" -#include "lwip/netif.h" -#include "lwip/ip_addr.h" - -void ip_reass_tmr(void); -struct pbuf * ip_reass(struct pbuf *p); -err_t ip_frag(struct pbuf *p, struct netif *netif, struct ip_addr *dest); - -#endif /* __LWIP_IP_FRAG_H__ */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv6/lwip/icmp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv6/lwip/icmp.h deleted file mode 100644 index 2b6adb12..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv6/lwip/icmp.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_ICMP_H__ -#define __LWIP_ICMP_H__ - -#include "lwip/arch.h" - -#include "lwip/opt.h" -#include "lwip/pbuf.h" - -#include "lwip/netif.h" - -#define ICMP6_DUR 1 -#define ICMP6_TE 3 -#define ICMP6_ECHO 128 /* echo */ -#define ICMP6_ER 129 /* echo reply */ - - -enum icmp_dur_type { - ICMP_DUR_NET = 0, /* net unreachable */ - ICMP_DUR_HOST = 1, /* host unreachable */ - ICMP_DUR_PROTO = 2, /* protocol unreachable */ - ICMP_DUR_PORT = 3, /* port unreachable */ - ICMP_DUR_FRAG = 4, /* fragmentation needed and DF set */ - ICMP_DUR_SR = 5 /* source route failed */ -}; - -enum icmp_te_type { - ICMP_TE_TTL = 0, /* time to live exceeded in transit */ - ICMP_TE_FRAG = 1 /* fragment reassembly time exceeded */ -}; - -void icmp_input(struct pbuf *p, struct netif *inp); - -void icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t); -void icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t); - -struct icmp_echo_hdr { - u8_t type; - u8_t icode; - u16_t chksum; - u16_t id; - u16_t seqno; -}; - -struct icmp_dur_hdr { - u8_t type; - u8_t icode; - u16_t chksum; - u32_t unused; -}; - -struct icmp_te_hdr { - u8_t type; - u8_t icode; - u16_t chksum; - u32_t unused; -}; - -#endif /* __LWIP_ICMP_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv6/lwip/inet.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv6/lwip/inet.h deleted file mode 100644 index ae783436..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv6/lwip/inet.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_INET_H__ -#define __LWIP_INET_H__ - -#include "lwip/arch.h" - -#include "lwip/opt.h" -#include "lwip/pbuf.h" -#include "lwip/ip_addr.h" - -u16_t inet_chksum(void *data, u16_t len); -u16_t inet_chksum_pbuf(struct pbuf *p); -u16_t inet_chksum_pseudo(struct pbuf *p, - struct ip_addr *src, struct ip_addr *dest, - u8_t proto, u32_t proto_len); - -u32_t inet_addr(const char *cp); -s8_t inet_aton(const char *cp, struct in_addr *addr); - -#ifndef _MACHINE_ENDIAN_H_ -#ifndef _NETINET_IN_H -#ifndef _LINUX_BYTEORDER_GENERIC_H -u16_t htons(u16_t n); -u16_t ntohs(u16_t n); -u32_t htonl(u32_t n); -u32_t ntohl(u32_t n); -#endif /* _LINUX_BYTEORDER_GENERIC_H */ -#endif /* _NETINET_IN_H */ -#endif /* _MACHINE_ENDIAN_H_ */ - -#endif /* __LWIP_INET_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv6/lwip/ip.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv6/lwip/ip.h deleted file mode 100644 index f46bf9a8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv6/lwip/ip.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_IP_H__ -#define __LWIP_IP_H__ - -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/pbuf.h" -#include "lwip/ip_addr.h" - -#include "lwip/err.h" - -#define IP_HLEN 40 - -#define IP_PROTO_ICMP 58 -#define IP_PROTO_UDP 17 -#define IP_PROTO_UDPLITE 170 -#define IP_PROTO_TCP 6 - -/* This is passed as the destination address to ip_output_if (not - to ip_output), meaning that an IP header already is constructed - in the pbuf. This is used when TCP retransmits. */ -#ifdef IP_HDRINCL -#undef IP_HDRINCL -#endif /* IP_HDRINCL */ -#define IP_HDRINCL NULL - - -/* The IPv6 header. */ -struct ip_hdr { -#if BYTE_ORDER == LITTLE_ENDIAN - u8_t tclass1:4, v:4; - u8_t flow1:4, tclass2:4; -#else - u8_t v:4, tclass1:4; - u8_t tclass2:8, flow1:4; -#endif - u16_t flow2; - u16_t len; /* payload length */ - u8_t nexthdr; /* next header */ - u8_t hoplim; /* hop limit (TTL) */ - struct ip_addr src, dest; /* source and destination IP addresses */ -}; - -void ip_init(void); - -#include "lwip/netif.h" - -struct netif *ip_route(struct ip_addr *dest); - -void ip_input(struct pbuf *p, struct netif *inp); - -/* source and destination addresses in network byte order, please */ -err_t ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t proto); - -err_t ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, - u8_t ttl, u8_t proto, - struct netif *netif); - -#if IP_DEBUG -void ip_debug_print(struct pbuf *p); -#endif /* IP_DEBUG */ - -#endif /* __LWIP_IP_H__ */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv6/lwip/ip_addr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv6/lwip/ip_addr.h deleted file mode 100644 index db1f0906..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/ipv6/lwip/ip_addr.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_IP_ADDR_H__ -#define __LWIP_IP_ADDR_H__ - -#include "lwip/arch.h" - -#define IP_ADDR_ANY 0 - -struct ip_addr { - u32_t addr[4]; -}; - -#define IP6_ADDR(ipaddr, a,b,c,d,e,f,g,h) do { (ipaddr)->addr[0] = htonl((u32_t)((a & 0xffff) << 16) | (b & 0xffff)); \ - (ipaddr)->addr[1] = htonl(((c & 0xffff) << 16) | (d & 0xffff)); \ - (ipaddr)->addr[2] = htonl(((e & 0xffff) << 16) | (f & 0xffff)); \ - (ipaddr)->addr[3] = htonl(((g & 0xffff) << 16) | (h & 0xffff)); } while(0) - -u8_t ip_addr_netcmp(struct ip_addr *addr1, struct ip_addr *addr2, - struct ip_addr *mask); -u8_t ip_addr_cmp(struct ip_addr *addr1, struct ip_addr *addr2); -void ip_addr_set(struct ip_addr *dest, struct ip_addr *src); -u8_t ip_addr_isany(struct ip_addr *addr); - - -#if IP_DEBUG -void ip_addr_debug_print(struct ip_addr *addr); -#endif /* IP_DEBUG */ - -#endif /* __LWIP_IP_ADDR_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/api.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/api.h deleted file mode 100644 index 7f0ad596..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/api.h +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_API_H__ -#define __LWIP_API_H__ - -#include "lwip/opt.h" -#include "lwip/pbuf.h" -#include "lwip/sys.h" - -#include "lwip/ip.h" - -#include "lwip/raw.h" -#include "lwip/udp.h" -#include "lwip/tcp.h" - -#include "lwip/err.h" - -#define NETCONN_NOCOPY 0x00 -#define NETCONN_COPY 0x01 - -enum netconn_type { - NETCONN_TCP, - NETCONN_UDP, - NETCONN_UDPLITE, - NETCONN_UDPNOCHKSUM, - NETCONN_RAW -}; - -enum netconn_state { - NETCONN_NONE, - NETCONN_WRITE, - NETCONN_ACCEPT, - NETCONN_RECV, - NETCONN_CONNECT, - NETCONN_CLOSE -}; - -enum netconn_evt { - NETCONN_EVT_RCVPLUS, - NETCONN_EVT_RCVMINUS, - NETCONN_EVT_SENDPLUS, - NETCONN_EVT_SENDMINUS -}; - -struct netbuf { - struct pbuf *p, *ptr; - struct ip_addr *fromaddr; - u16_t fromport; - err_t err; -}; - -struct netconn { - enum netconn_type type; - enum netconn_state state; - union { - struct tcp_pcb *tcp; - struct udp_pcb *udp; - struct raw_pcb *raw; - } pcb; - err_t err; - sys_mbox_t mbox; - sys_mbox_t recvmbox; - sys_mbox_t acceptmbox; - sys_sem_t sem; - int socket; - u16_t recv_avail; - void (* callback)(struct netconn *, enum netconn_evt, u16_t len); -}; - -/* Network buffer functions: */ -struct netbuf * netbuf_new (void); -void netbuf_delete (struct netbuf *buf); -void * netbuf_alloc (struct netbuf *buf, u16_t size); -void netbuf_free (struct netbuf *buf); -void netbuf_ref (struct netbuf *buf, - void *dataptr, u16_t size); -void netbuf_chain (struct netbuf *head, - struct netbuf *tail); - -u16_t netbuf_len (struct netbuf *buf); -err_t netbuf_data (struct netbuf *buf, - void **dataptr, u16_t *len); -s8_t netbuf_next (struct netbuf *buf); -void netbuf_first (struct netbuf *buf); - -void netbuf_copy (struct netbuf *buf, - void *dataptr, u16_t len); -void netbuf_copy_partial(struct netbuf *buf, void *dataptr, - u16_t len, u16_t offset); -struct ip_addr * netbuf_fromaddr (struct netbuf *buf); -u16_t netbuf_fromport (struct netbuf *buf); - -/* Network connection functions: */ -struct netconn * netconn_new (enum netconn_type type); -struct -netconn *netconn_new_with_callback(enum netconn_type t, - void (*callback)(struct netconn *, enum netconn_evt, u16_t len)); -struct -netconn *netconn_new_with_proto_and_callback(enum netconn_type t, u16_t proto, - void (*callback)(struct netconn *, enum netconn_evt, u16_t len)); -err_t netconn_delete (struct netconn *conn); -enum netconn_type netconn_type (struct netconn *conn); -err_t netconn_peer (struct netconn *conn, - struct ip_addr *addr, - u16_t *port); -err_t netconn_addr (struct netconn *conn, - struct ip_addr **addr, - u16_t *port); -err_t netconn_bind (struct netconn *conn, - struct ip_addr *addr, - u16_t port); -err_t netconn_connect (struct netconn *conn, - struct ip_addr *addr, - u16_t port); -err_t netconn_disconnect (struct netconn *conn); -err_t netconn_listen (struct netconn *conn); -struct netconn * netconn_accept (struct netconn *conn); -struct netbuf * netconn_recv (struct netconn *conn); -err_t netconn_send (struct netconn *conn, - struct netbuf *buf); -err_t netconn_write (struct netconn *conn, - void *dataptr, u16_t size, - u8_t copy); -err_t netconn_close (struct netconn *conn); - -err_t netconn_err (struct netconn *conn); - -#endif /* __LWIP_API_H__ */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/api_msg.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/api_msg.h deleted file mode 100644 index 3fef3dd0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/api_msg.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_API_MSG_H__ -#define __LWIP_API_MSG_H__ - -#include "lwip/opt.h" -#include "lwip/pbuf.h" -#include "lwip/sys.h" - -#include "lwip/ip.h" - -#include "lwip/udp.h" -#include "lwip/tcp.h" - -#include "lwip/api.h" - -enum api_msg_type { - API_MSG_NEWCONN, - API_MSG_DELCONN, - - API_MSG_BIND, - API_MSG_CONNECT, - API_MSG_DISCONNECT, - - API_MSG_LISTEN, - API_MSG_ACCEPT, - - API_MSG_SEND, - API_MSG_RECV, - API_MSG_WRITE, - - API_MSG_CLOSE, - - API_MSG_MAX -}; - -struct api_msg_msg { - struct netconn *conn; - enum netconn_type conntype; - union { - struct pbuf *p; - struct { - struct ip_addr *ipaddr; - u16_t port; - } bc; - struct { - void *dataptr; - u16_t len; - u8_t copy; - } w; - sys_mbox_t mbox; - u16_t len; - } msg; -}; - -struct api_msg { - enum api_msg_type type; - struct api_msg_msg msg; -}; - -void api_msg_input(struct api_msg *msg); -void api_msg_post(struct api_msg *msg); - -#endif /* __LWIP_API_MSG_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/arch.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/arch.h deleted file mode 100644 index e0d622a4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/arch.h +++ /dev/null @@ -1,216 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_ARCH_H__ -#define __LWIP_ARCH_H__ - -#ifndef LITTLE_ENDIAN -#define LITTLE_ENDIAN 1234 -#endif - -#ifndef BIG_ENDIAN -#define BIG_ENDIAN 4321 -#endif - -#include "arch/cc.h" - -#ifndef PACK_STRUCT_BEGIN -#define PACK_STRUCT_BEGIN -#endif /* PACK_STRUCT_BEGIN */ - -#ifndef PACK_STRUCT_END -#define PACK_STRUCT_END -#endif /* PACK_STRUCT_END */ - -#ifndef PACK_STRUCT_FIELD -#define PACK_STRUCT_FIELD(x) x -#endif /* PACK_STRUCT_FIELD */ - - - -#ifdef LWIP_PROVIDE_ERRNO - -#define EPERM 1 /* Operation not permitted */ -#define ENOENT 2 /* No such file or directory */ -#define ESRCH 3 /* No such process */ -#define EINTR 4 /* Interrupted system call */ -#define EIO 5 /* I/O error */ -#define ENXIO 6 /* No such device or address */ -#define E2BIG 7 /* Arg list too long */ -#define ENOEXEC 8 /* Exec format error */ -#define EBADF 9 /* Bad file number */ -#define ECHILD 10 /* No child processes */ -#define EAGAIN 11 /* Try again */ -#define ENOMEM 12 /* Out of memory */ -#define EACCES 13 /* Permission denied */ -#define EFAULT 14 /* Bad address */ -#define ENOTBLK 15 /* Block device required */ -#define EBUSY 16 /* Device or resource busy */ -#define EEXIST 17 /* File exists */ -#define EXDEV 18 /* Cross-device link */ -#define ENODEV 19 /* No such device */ -#define ENOTDIR 20 /* Not a directory */ -#define EISDIR 21 /* Is a directory */ -#define EINVAL 22 /* Invalid argument */ -#define ENFILE 23 /* File table overflow */ -#define EMFILE 24 /* Too many open files */ -#define ENOTTY 25 /* Not a typewriter */ -#define ETXTBSY 26 /* Text file busy */ -#define EFBIG 27 /* File too large */ -#define ENOSPC 28 /* No space left on device */ -#define ESPIPE 29 /* Illegal seek */ -#define EROFS 30 /* Read-only file system */ -#define EMLINK 31 /* Too many links */ -#define EPIPE 32 /* Broken pipe */ -#define EDOM 33 /* Math argument out of domain of func */ -#define ERANGE 34 /* Math result not representable */ -#define EDEADLK 35 /* Resource deadlock would occur */ -#define ENAMETOOLONG 36 /* File name too long */ -#define ENOLCK 37 /* No record locks available */ -#define ENOSYS 38 /* Function not implemented */ -#define ENOTEMPTY 39 /* Directory not empty */ -#define ELOOP 40 /* Too many symbolic links encountered */ -#define EWOULDBLOCK EAGAIN /* Operation would block */ -#define ENOMSG 42 /* No message of desired type */ -#define EIDRM 43 /* Identifier removed */ -#define ECHRNG 44 /* Channel number out of range */ -#define EL2NSYNC 45 /* Level 2 not synchronized */ -#define EL3HLT 46 /* Level 3 halted */ -#define EL3RST 47 /* Level 3 reset */ -#define ELNRNG 48 /* Link number out of range */ -#define EUNATCH 49 /* Protocol driver not attached */ -#define ENOCSI 50 /* No CSI structure available */ -#define EL2HLT 51 /* Level 2 halted */ -#define EBADE 52 /* Invalid exchange */ -#define EBADR 53 /* Invalid request descriptor */ -#define EXFULL 54 /* Exchange full */ -#define ENOANO 55 /* No anode */ -#define EBADRQC 56 /* Invalid request code */ -#define EBADSLT 57 /* Invalid slot */ - -#define EDEADLOCK EDEADLK - -#define EBFONT 59 /* Bad font file format */ -#define ENOSTR 60 /* Device not a stream */ -#define ENODATA 61 /* No data available */ -#define ETIME 62 /* Timer expired */ -#define ENOSR 63 /* Out of streams resources */ -#define ENONET 64 /* Machine is not on the network */ -#define ENOPKG 65 /* Package not installed */ -#define EREMOTE 66 /* Object is remote */ -#define ENOLINK 67 /* Link has been severed */ -#define EADV 68 /* Advertise error */ -#define ESRMNT 69 /* Srmount error */ -#define ECOMM 70 /* Communication error on send */ -#define EPROTO 71 /* Protocol error */ -#define EMULTIHOP 72 /* Multihop attempted */ -#define EDOTDOT 73 /* RFS specific error */ -#define EBADMSG 74 /* Not a data message */ -#define EOVERFLOW 75 /* Value too large for defined data type */ -#define ENOTUNIQ 76 /* Name not unique on network */ -#define EBADFD 77 /* File descriptor in bad state */ -#define EREMCHG 78 /* Remote address changed */ -#define ELIBACC 79 /* Can not access a needed shared library */ -#define ELIBBAD 80 /* Accessing a corrupted shared library */ -#define ELIBSCN 81 /* .lib section in a.out corrupted */ -#define ELIBMAX 82 /* Attempting to link in too many shared libraries */ -#define ELIBEXEC 83 /* Cannot exec a shared library directly */ -#define EILSEQ 84 /* Illegal byte sequence */ -#define ERESTART 85 /* Interrupted system call should be restarted */ -#define ESTRPIPE 86 /* Streams pipe error */ -#define EUSERS 87 /* Too many users */ -#define ENOTSOCK 88 /* Socket operation on non-socket */ -#define EDESTADDRREQ 89 /* Destination address required */ -#define EMSGSIZE 90 /* Message too long */ -#define EPROTOTYPE 91 /* Protocol wrong type for socket */ -#define ENOPROTOOPT 92 /* Protocol not available */ -#define EPROTONOSUPPORT 93 /* Protocol not supported */ -#define ESOCKTNOSUPPORT 94 /* Socket type not supported */ -#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ -#define EPFNOSUPPORT 96 /* Protocol family not supported */ -#define EAFNOSUPPORT 97 /* Address family not supported by protocol */ -#define EADDRINUSE 98 /* Address already in use */ -#define EADDRNOTAVAIL 99 /* Cannot assign requested address */ -#define ENETDOWN 100 /* Network is down */ -#define ENETUNREACH 101 /* Network is unreachable */ -#define ENETRESET 102 /* Network dropped connection because of reset */ -#define ECONNABORTED 103 /* Software caused connection abort */ -#define ECONNRESET 104 /* Connection reset by peer */ -#define ENOBUFS 105 /* No buffer space available */ -#define EISCONN 106 /* Transport endpoint is already connected */ -#define ENOTCONN 107 /* Transport endpoint is not connected */ -#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */ -#define ETOOMANYREFS 109 /* Too many references: cannot splice */ -#define ETIMEDOUT 110 /* Connection timed out */ -#define ECONNREFUSED 111 /* Connection refused */ -#define EHOSTDOWN 112 /* Host is down */ -#define EHOSTUNREACH 113 /* No route to host */ -#define EALREADY 114 /* Operation already in progress */ -#define EINPROGRESS 115 /* Operation now in progress */ -#define ESTALE 116 /* Stale NFS file handle */ -#define EUCLEAN 117 /* Structure needs cleaning */ -#define ENOTNAM 118 /* Not a XENIX named type file */ -#define ENAVAIL 119 /* No XENIX semaphores available */ -#define EISNAM 120 /* Is a named type file */ -#define EREMOTEIO 121 /* Remote I/O error */ -#define EDQUOT 122 /* Quota exceeded */ - -#define ENOMEDIUM 123 /* No medium found */ -#define EMEDIUMTYPE 124 /* Wrong medium type */ - - -#define ENSROK 0 /* DNS server returned answer with no data */ -#define ENSRNODATA 160 /* DNS server returned answer with no data */ -#define ENSRFORMERR 161 /* DNS server claims query was misformatted */ -#define ENSRSERVFAIL 162 /* DNS server returned general failure */ -#define ENSRNOTFOUND 163 /* Domain name not found */ -#define ENSRNOTIMP 164 /* DNS server does not implement requested operation */ -#define ENSRREFUSED 165 /* DNS server refused query */ -#define ENSRBADQUERY 166 /* Misformatted DNS query */ -#define ENSRBADNAME 167 /* Misformatted domain name */ -#define ENSRBADFAMILY 168 /* Unsupported address family */ -#define ENSRBADRESP 169 /* Misformatted DNS reply */ -#define ENSRCONNREFUSED 170 /* Could not contact DNS servers */ -#define ENSRTIMEOUT 171 /* Timeout while contacting DNS servers */ -#define ENSROF 172 /* End of file */ -#define ENSRFILE 173 /* Error reading file */ -#define ENSRNOMEM 174 /* Out of memory */ -#define ENSRDESTRUCTION 175 /* Application terminated lookup */ -#define ENSRQUERYDOMAINTOOLONG 176 /* Domain name is too long */ -#define ENSRCNAMELOOP 177 /* Domain name is too long */ - -#ifndef errno -extern int errno; -#endif - -#endif /* LWIP_PROVIDE_ERRNO */ - -#endif /* __LWIP_ARCH_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/debug.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/debug.h deleted file mode 100644 index 8f63a7b6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/debug.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_DEBUG_H__ -#define __LWIP_DEBUG_H__ - -#include "arch/cc.h" - -/** lower two bits indicate debug level - * - 0 off - * - 1 warning - * - 2 serious - * - 3 severe - */ - -#define DBG_LEVEL_OFF 0 -#define DBG_LEVEL_WARNING 1 /* bad checksums, dropped packets, ... */ -#define DBG_LEVEL_SERIOUS 2 /* memory allocation failures, ... */ -#define DBG_LEVEL_SEVERE 3 /* */ -#define DBG_MASK_LEVEL 3 - -/** flag for LWIP_DEBUGF to enable that debug message */ -#define DBG_ON 0x80U -/** flag for LWIP_DEBUGF to disable that debug message */ -#define DBG_OFF 0x00U - -/** flag for LWIP_DEBUGF indicating a tracing message (to follow program flow) */ -#define DBG_TRACE 0x40U -/** flag for LWIP_DEBUGF indicating a state debug message (to follow module states) */ -#define DBG_STATE 0x20U -/** flag for LWIP_DEBUGF indicating newly added code, not thoroughly tested yet */ -#define DBG_FRESH 0x10U -/** flag for LWIP_DEBUGF to halt after printing this debug message */ -#define DBG_HALT 0x08U - -#ifndef LWIP_NOASSERT -# define LWIP_ASSERT(x,y) do { if(!(y)) LWIP_PLATFORM_ASSERT(x); } while(0) -#else -# define LWIP_ASSERT(x,y) -#endif - -#ifdef LWIP_DEBUG -/** print debug message only if debug message type is enabled... - * AND is of correct type AND is at least DBG_LEVEL - */ -# define LWIP_DEBUGF(debug,x) do { if (((debug) & DBG_ON) && ((debug) & DBG_TYPES_ON) && ((s16_t)((debug) & DBG_MASK_LEVEL) >= DBG_MIN_LEVEL)) { LWIP_PLATFORM_DIAG(x); if ((debug) & DBG_HALT) while(1); } } while(0) -# define LWIP_ERROR(x) do { LWIP_PLATFORM_DIAG(x); } while(0) -#else /* LWIP_DEBUG */ -# define LWIP_DEBUGF(debug,x) -# define LWIP_ERROR(x) -#endif /* LWIP_DEBUG */ - -#endif /* __LWIP_DEBUG_H__ */ - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/def.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/def.h deleted file mode 100644 index eba9b877..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/def.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_DEF_H__ -#define __LWIP_DEF_H__ - -/* this might define NULL already */ -#include "arch/cc.h" - -#define LWIP_MAX(x , y) (x) > (y) ? (x) : (y) -#define LWIP_MIN(x , y) (x) < (y) ? (x) : (y) - -#ifndef NULL -#define NULL ((void *)0) -#endif - - -#endif /* __LWIP_DEF_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/dhcp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/dhcp.h deleted file mode 100644 index bfe753f2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/dhcp.h +++ /dev/null @@ -1,223 +0,0 @@ -/** @file - */ - -#ifndef __LWIP_DHCP_H__ -#define __LWIP_DHCP_H__ - -#include "lwip/opt.h" -#include "lwip/netif.h" -#include "lwip/udp.h" - -/** period (in seconds) of the application calling dhcp_coarse_tmr() */ -#define DHCP_COARSE_TIMER_SECS 60 -/** period (in milliseconds) of the application calling dhcp_fine_tmr() */ -#define DHCP_FINE_TIMER_MSECS 500 - -struct dhcp -{ - /** current DHCP state machine state */ - u8_t state; - /** retries of current request */ - u8_t tries; - /** transaction identifier of last sent request */ - u32_t xid; - /** our connection to the DHCP server */ - struct udp_pcb *pcb; - /** (first) pbuf of incoming msg */ - struct pbuf *p; - /** incoming msg */ - struct dhcp_msg *msg_in; - /** incoming msg options */ - struct dhcp_msg *options_in; - /** ingoing msg options length */ - u16_t options_in_len; - - struct pbuf *p_out; /* pbuf of outcoming msg */ - struct dhcp_msg *msg_out; /* outgoing msg */ - u16_t options_out_len; /* outgoing msg options length */ - u16_t request_timeout; /* #ticks with period DHCP_FINE_TIMER_SECS for request timeout */ - u16_t t1_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for renewal time */ - u16_t t2_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for rebind time */ - struct ip_addr server_ip_addr; /* dhcp server address that offered this lease */ - struct ip_addr offered_ip_addr; - struct ip_addr offered_sn_mask; - struct ip_addr offered_gw_addr; - struct ip_addr offered_bc_addr; -#define DHCP_MAX_DNS 2 - u32_t dns_count; /* actual number of DNS servers obtained */ - struct ip_addr offered_dns_addr[DHCP_MAX_DNS]; /* DNS server addresses */ - - u32_t offered_t0_lease; /* lease period (in seconds) */ - u32_t offered_t1_renew; /* recommended renew time (usually 50% of lease period) */ - u32_t offered_t2_rebind; /* recommended rebind time (usually 66% of lease period) */ -/** Patch #1308 - * TODO: See dhcp.c "TODO"s - */ -#if 0 - struct ip_addr offered_si_addr; - u8_t *boot_file_name; -#endif -}; - -/* MUST be compiled with "pack structs" or equivalent! */ -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -/** minimum set of fields of any DHCP message */ -struct dhcp_msg -{ - PACK_STRUCT_FIELD(u8_t op); - PACK_STRUCT_FIELD(u8_t htype); - PACK_STRUCT_FIELD(u8_t hlen); - PACK_STRUCT_FIELD(u8_t hops); - PACK_STRUCT_FIELD(u32_t xid); - PACK_STRUCT_FIELD(u16_t secs); - PACK_STRUCT_FIELD(u16_t flags); - PACK_STRUCT_FIELD(struct ip_addr ciaddr); - PACK_STRUCT_FIELD(struct ip_addr yiaddr); - PACK_STRUCT_FIELD(struct ip_addr siaddr); - PACK_STRUCT_FIELD(struct ip_addr giaddr); -#define DHCP_CHADDR_LEN 16U - PACK_STRUCT_FIELD(u8_t chaddr[DHCP_CHADDR_LEN]); -#define DHCP_SNAME_LEN 64U - PACK_STRUCT_FIELD(u8_t sname[DHCP_SNAME_LEN]); -#define DHCP_FILE_LEN 128U - PACK_STRUCT_FIELD(u8_t file[DHCP_FILE_LEN]); - PACK_STRUCT_FIELD(u32_t cookie); -#define DHCP_MIN_OPTIONS_LEN 68U -/** make sure user does not configure this too small */ -#if ((defined(DHCP_OPTIONS_LEN)) && (DHCP_OPTIONS_LEN < DHCP_MIN_OPTIONS_LEN)) -# undef DHCP_OPTIONS_LEN -#endif -/** allow this to be configured in lwipopts.h, but not too small */ -#if (!defined(DHCP_OPTIONS_LEN)) -/** set this to be sufficient for your options in outgoing DHCP msgs */ -# define DHCP_OPTIONS_LEN DHCP_MIN_OPTIONS_LEN -#endif - PACK_STRUCT_FIELD(u8_t options[DHCP_OPTIONS_LEN]); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -/** start DHCP configuration */ -err_t dhcp_start(struct netif *netif); -/** enforce early lease renewal (not needed normally)*/ -err_t dhcp_renew(struct netif *netif); -/** release the DHCP lease, usually called before dhcp_stop()*/ -err_t dhcp_release(struct netif *netif); -/** stop DHCP configuration */ -void dhcp_stop(struct netif *netif); -/** inform server of our manual IP address */ -void dhcp_inform(struct netif *netif); - -/** if enabled, check whether the offered IP address is not in use, using ARP */ -#if DHCP_DOES_ARP_CHECK -void dhcp_arp_reply(struct netif *netif, struct ip_addr *addr); -#endif - -/** to be called every minute */ -void dhcp_coarse_tmr(void); -/** to be called every half second */ -void dhcp_fine_tmr(void); - -/** DHCP message item offsets and length */ -#define DHCP_MSG_OFS (UDP_DATA_OFS) - #define DHCP_OP_OFS (DHCP_MSG_OFS + 0) - #define DHCP_HTYPE_OFS (DHCP_MSG_OFS + 1) - #define DHCP_HLEN_OFS (DHCP_MSG_OFS + 2) - #define DHCP_HOPS_OFS (DHCP_MSG_OFS + 3) - #define DHCP_XID_OFS (DHCP_MSG_OFS + 4) - #define DHCP_SECS_OFS (DHCP_MSG_OFS + 8) - #define DHCP_FLAGS_OFS (DHCP_MSG_OFS + 10) - #define DHCP_CIADDR_OFS (DHCP_MSG_OFS + 12) - #define DHCP_YIADDR_OFS (DHCP_MSG_OFS + 16) - #define DHCP_SIADDR_OFS (DHCP_MSG_OFS + 20) - #define DHCP_GIADDR_OFS (DHCP_MSG_OFS + 24) - #define DHCP_CHADDR_OFS (DHCP_MSG_OFS + 28) - #define DHCP_SNAME_OFS (DHCP_MSG_OFS + 44) - #define DHCP_FILE_OFS (DHCP_MSG_OFS + 108) -#define DHCP_MSG_LEN 236 - -#define DHCP_COOKIE_OFS (DHCP_MSG_OFS + DHCP_MSG_LEN) -#define DHCP_OPTIONS_OFS (DHCP_MSG_OFS + DHCP_MSG_LEN + 4) - -#define DHCP_CLIENT_PORT 68 -#define DHCP_SERVER_PORT 67 - -/** DHCP client states */ -#define DHCP_REQUESTING 1 -#define DHCP_INIT 2 -#define DHCP_REBOOTING 3 -#define DHCP_REBINDING 4 -#define DHCP_RENEWING 5 -#define DHCP_SELECTING 6 -#define DHCP_INFORMING 7 -#define DHCP_CHECKING 8 -#define DHCP_PERMANENT 9 -#define DHCP_BOUND 10 -/** not yet implemented #define DHCP_RELEASING 11 */ -#define DHCP_BACKING_OFF 12 -#define DHCP_OFF 13 - -#define DHCP_BOOTREQUEST 1 -#define DHCP_BOOTREPLY 2 - -#define DHCP_DISCOVER 1 -#define DHCP_OFFER 2 -#define DHCP_REQUEST 3 -#define DHCP_DECLINE 4 -#define DHCP_ACK 5 -#define DHCP_NAK 6 -#define DHCP_RELEASE 7 -#define DHCP_INFORM 8 - -#define DHCP_HTYPE_ETH 1 - -#define DHCP_HLEN_ETH 6 - -#define DHCP_BROADCAST_FLAG 15 -#define DHCP_BROADCAST_MASK (1 << DHCP_FLAG_BROADCAST) - -/** BootP options */ -#define DHCP_OPTION_PAD 0 -#define DHCP_OPTION_SUBNET_MASK 1 /* RFC 2132 3.3 */ -#define DHCP_OPTION_ROUTER 3 -#define DHCP_OPTION_DNS_SERVER 6 -#define DHCP_OPTION_HOSTNAME 12 -#define DHCP_OPTION_IP_TTL 23 -#define DHCP_OPTION_MTU 26 -#define DHCP_OPTION_BROADCAST 28 -#define DHCP_OPTION_TCP_TTL 37 -#define DHCP_OPTION_END 255 - -/** DHCP options */ -#define DHCP_OPTION_REQUESTED_IP 50 /* RFC 2132 9.1, requested IP address */ -#define DHCP_OPTION_LEASE_TIME 51 /* RFC 2132 9.2, time in seconds, in 4 bytes */ -#define DHCP_OPTION_OVERLOAD 52 /* RFC2132 9.3, use file and/or sname field for options */ - -#define DHCP_OPTION_MESSAGE_TYPE 53 /* RFC 2132 9.6, important for DHCP */ -#define DHCP_OPTION_MESSAGE_TYPE_LEN 1 - - -#define DHCP_OPTION_SERVER_ID 54 /* RFC 2132 9.7, server IP address */ -#define DHCP_OPTION_PARAMETER_REQUEST_LIST 55 /* RFC 2132 9.8, requested option types */ - -#define DHCP_OPTION_MAX_MSG_SIZE 57 /* RFC 2132 9.10, message size accepted >= 576 */ -#define DHCP_OPTION_MAX_MSG_SIZE_LEN 2 - -#define DHCP_OPTION_T1 58 /* T1 renewal time */ -#define DHCP_OPTION_T2 59 /* T2 rebinding time */ -#define DHCP_OPTION_CLIENT_ID 61 -#define DHCP_OPTION_TFTP_SERVERNAME 66 -#define DHCP_OPTION_BOOTFILE 67 - -/** possible combinations of overloading the file and sname fields with options */ -#define DHCP_OVERLOAD_NONE 0 -#define DHCP_OVERLOAD_FILE 1 -#define DHCP_OVERLOAD_SNAME 2 -#define DHCP_OVERLOAD_SNAME_FILE 3 - -#endif /*__LWIP_DHCP_H__*/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/err.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/err.h deleted file mode 100644 index c92cb26d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/err.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_ERR_H__ -#define __LWIP_ERR_H__ - -#include "lwip/opt.h" - -#include "arch/cc.h" - -typedef s8_t err_t; - -/* Definitions for error constants. */ - -#define ERR_OK 0 /* No error, everything OK. */ -#define ERR_MEM -1 /* Out of memory error. */ -#define ERR_BUF -2 /* Buffer error. */ - - -#define ERR_ABRT -3 /* Connection aborted. */ -#define ERR_RST -4 /* Connection reset. */ -#define ERR_CLSD -5 /* Connection closed. */ -#define ERR_CONN -6 /* Not connected. */ - -#define ERR_VAL -7 /* Illegal value. */ - -#define ERR_ARG -8 /* Illegal argument. */ - -#define ERR_RTE -9 /* Routing problem. */ - -#define ERR_USE -10 /* Address in use. */ - -#define ERR_IF -11 /* Low-level netif error */ -#define ERR_ISCONN -12 /* Already connected. */ - - -#ifdef LWIP_DEBUG -extern char *lwip_strerr(err_t err); -#else -#define lwip_strerr(x) "" -#endif /* LWIP_DEBUG */ -#endif /* __LWIP_ERR_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/mem.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/mem.h deleted file mode 100644 index ee6fea7d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/mem.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_MEM_H__ -#define __LWIP_MEM_H__ - -#include "lwip/opt.h" -#include "lwip/arch.h" - -#if MEM_SIZE > 64000l -typedef u32_t mem_size_t; -#else -typedef u16_t mem_size_t; -#endif /* MEM_SIZE > 64000 */ - - -void mem_init(void); - -void *mem_malloc(mem_size_t size); -void mem_free(void *mem); -void *mem_realloc(void *mem, mem_size_t size); -void *mem_reallocm(void *mem, mem_size_t size); - -#ifndef MEM_ALIGN_SIZE -#define MEM_ALIGN_SIZE(size) (((size) + MEM_ALIGNMENT - 1) & ~(MEM_ALIGNMENT-1)) -#endif - -#ifndef MEM_ALIGN -#define MEM_ALIGN(addr) ((void *)(((mem_ptr_t)(addr) + MEM_ALIGNMENT - 1) & ~(mem_ptr_t)(MEM_ALIGNMENT-1))) -#endif - -#endif /* __LWIP_MEM_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/memp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/memp.h deleted file mode 100644 index 1cd46fa3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/memp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#ifndef __LWIP_MEMP_H__ -#define __LWIP_MEMP_H__ - -#include "lwip/opt.h" - -typedef enum { - MEMP_PBUF, - MEMP_RAW_PCB, - MEMP_UDP_PCB, - MEMP_TCP_PCB, - MEMP_TCP_PCB_LISTEN, - MEMP_TCP_SEG, - - MEMP_NETBUF, - MEMP_NETCONN, - MEMP_API_MSG, - MEMP_TCPIP_MSG, - - MEMP_SYS_TIMEOUT, - - MEMP_MAX -} memp_t; - -void memp_init(void); - -void *memp_malloc(memp_t type); -void *memp_realloc(memp_t fromtype, memp_t totype, void *mem); -void memp_free(memp_t type, void *mem); - -#endif /* __LWIP_MEMP_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/netif.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/netif.h deleted file mode 100644 index ff50c6f9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/netif.h +++ /dev/null @@ -1,150 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_NETIF_H__ -#define __LWIP_NETIF_H__ - -#include "lwip/opt.h" - -#include "lwip/err.h" - -#include "lwip/ip_addr.h" - -#include "lwip/inet.h" -#include "lwip/pbuf.h" -#if LWIP_DHCP -# include "lwip/dhcp.h" -#endif - -/** must be the maximum of all used hardware address lengths - across all types of interfaces in use */ -#define NETIF_MAX_HWADDR_LEN 6U - -/** TODO: define the use (where, when, whom) of netif flags */ - -/** whether the network interface is 'up'. this is - * a software flag used to control whether this network - * interface is enabled and processes traffic. - */ -#define NETIF_FLAG_UP 0x1U -/** if set, the netif has broadcast capability */ -#define NETIF_FLAG_BROADCAST 0x2U -/** if set, the netif is one end of a point-to-point connection */ -#define NETIF_FLAG_POINTTOPOINT 0x4U -/** if set, the interface is configured using DHCP */ -#define NETIF_FLAG_DHCP 0x08U -/** if set, the interface has an active link - * (set by the network interface driver) */ -#define NETIF_FLAG_LINK_UP 0x10U - -/** Generic data structure used for all lwIP network interfaces. - * The following fields should be filled in by the initialization - * function for the device driver: hwaddr_len, hwaddr[], mtu, flags */ - -struct netif { - /** pointer to next in linked list */ - struct netif *next; - - /** IP address configuration in network byte order */ - struct ip_addr ip_addr; - struct ip_addr netmask; - struct ip_addr gw; - - /** This function is called by the network device driver - * to pass a packet up the TCP/IP stack. */ - err_t (* input)(struct pbuf *p, struct netif *inp); - /** This function is called by the IP module when it wants - * to send a packet on the interface. This function typically - * first resolves the hardware address, then sends the packet. */ - err_t (* output)(struct netif *netif, struct pbuf *p, - struct ip_addr *ipaddr); - /** This function is called by the ARP module when it wants - * to send a packet on the interface. This function outputs - * the pbuf as-is on the link medium. */ - err_t (* linkoutput)(struct netif *netif, struct pbuf *p); - /** This field can be set by the device driver and could point - * to state information for the device. */ - void *state; -#if LWIP_DHCP - /** the DHCP client state information for this netif */ - struct dhcp *dhcp; -#endif - /** number of bytes used in hwaddr */ - u8_t hwaddr_len; - /** link level hardware address of this interface */ - u8_t hwaddr[NETIF_MAX_HWADDR_LEN]; - /** maximum transfer unit (in bytes) */ - u16_t mtu; - /** flags (see NETIF_FLAG_ above) */ - u8_t flags; - /** link type */ - u8_t link_type; - /** descriptive abbreviation */ - char name[2]; - /** number of this interface */ - u8_t num; -}; - -/** The list of network interfaces. */ -extern struct netif *netif_list; -/** The default network interface. */ -extern struct netif *netif_default; - -/* netif_init() must be called first. */ -void netif_init(void); - -struct netif *netif_add(struct netif *netif, struct ip_addr *ipaddr, struct ip_addr *netmask, - struct ip_addr *gw, - void *state, - err_t (* init)(struct netif *netif), - err_t (* input)(struct pbuf *p, struct netif *netif)); - -void -netif_set_addr(struct netif *netif,struct ip_addr *ipaddr, struct ip_addr *netmask, - struct ip_addr *gw); -void netif_remove(struct netif * netif); - -/* Returns a network interface given its name. The name is of the form - "et0", where the first two letters are the "name" field in the - netif structure, and the digit is in the num field in the same - structure. */ -struct netif *netif_find(char *name); - -void netif_set_default(struct netif *netif); - -void netif_set_ipaddr(struct netif *netif, struct ip_addr *ipaddr); -void netif_set_netmask(struct netif *netif, struct ip_addr *netmast); -void netif_set_gw(struct netif *netif, struct ip_addr *gw); -void netif_set_up(struct netif *netif); -void netif_set_down(struct netif *netif); -u8_t netif_is_up(struct netif *netif); - -#endif /* __LWIP_NETIF_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/opt.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/opt.h deleted file mode 100644 index 45636cb2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/opt.h +++ /dev/null @@ -1,671 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_OPT_H__ -#define __LWIP_OPT_H__ - -/* Include user defined options first */ -#include "lwipopts.h" -#include "lwip/debug.h" - -/* Define default values for unconfigured parameters. */ - -/* Platform specific locking */ - -/* - * enable SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection - * for certain critical regions during buffer allocation, deallocation and memory - * allocation and deallocation. - */ -#ifndef SYS_LIGHTWEIGHT_PROT -#define SYS_LIGHTWEIGHT_PROT 0 -#endif - -#ifndef NO_SYS -#define NO_SYS 0 -#endif -/* ---------- Memory options ---------- */ -/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which - lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2 - byte alignment -> define MEM_ALIGNMENT to 2. */ - -#ifndef MEM_ALIGNMENT -#define MEM_ALIGNMENT 1 -#endif - -/* MEM_SIZE: the size of the heap memory. If the application will send -a lot of data that needs to be copied, this should be set high. */ -#ifndef MEM_SIZE -#define MEM_SIZE 1600 -#endif - -#ifndef MEMP_SANITY_CHECK -#define MEMP_SANITY_CHECK 0 -#endif - -/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application - sends a lot of data out of ROM (or other static memory), this - should be set high. */ -#ifndef MEMP_NUM_PBUF -#define MEMP_NUM_PBUF 16 -#endif - -/* Number of raw connection PCBs */ -#ifndef MEMP_NUM_RAW_PCB -#define MEMP_NUM_RAW_PCB 4 -#endif - -/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One - per active UDP "connection". */ -#ifndef MEMP_NUM_UDP_PCB -#define MEMP_NUM_UDP_PCB 4 -#endif -/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP - connections. */ -#ifndef MEMP_NUM_TCP_PCB -#define MEMP_NUM_TCP_PCB 5 -#endif -/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP - connections. */ -#ifndef MEMP_NUM_TCP_PCB_LISTEN -#define MEMP_NUM_TCP_PCB_LISTEN 8 -#endif -/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP - segments. */ -#ifndef MEMP_NUM_TCP_SEG -#define MEMP_NUM_TCP_SEG 16 -#endif -/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active - timeouts. */ -#ifndef MEMP_NUM_SYS_TIMEOUT -#define MEMP_NUM_SYS_TIMEOUT 3 -#endif - -/* The following four are used only with the sequential API and can be - set to 0 if the application only will use the raw API. */ -/* MEMP_NUM_NETBUF: the number of struct netbufs. */ -#ifndef MEMP_NUM_NETBUF -#define MEMP_NUM_NETBUF 2 -#endif -/* MEMP_NUM_NETCONN: the number of struct netconns. */ -#ifndef MEMP_NUM_NETCONN -#define MEMP_NUM_NETCONN 4 -#endif -/* MEMP_NUM_APIMSG: the number of struct api_msg, used for - communication between the TCP/IP stack and the sequential - programs. */ -#ifndef MEMP_NUM_API_MSG -#define MEMP_NUM_API_MSG 8 -#endif -/* MEMP_NUM_TCPIPMSG: the number of struct tcpip_msg, which is used - for sequential API communication and incoming packets. Used in - src/api/tcpip.c. */ -#ifndef MEMP_NUM_TCPIP_MSG -#define MEMP_NUM_TCPIP_MSG 8 -#endif - -/* ---------- Pbuf options ---------- */ -/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */ - -#ifndef PBUF_POOL_SIZE -#define PBUF_POOL_SIZE 16 -#endif - -/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */ - -#ifndef PBUF_POOL_BUFSIZE -#define PBUF_POOL_BUFSIZE 128 -#endif - -/* PBUF_LINK_HLEN: the number of bytes that should be allocated for a - link level header. Defaults to 14 for Ethernet. */ - -#ifndef PBUF_LINK_HLEN -#define PBUF_LINK_HLEN 14 -#endif - - - -/* ---------- ARP options ---------- */ - -/** Number of active hardware address, IP address pairs cached */ -#ifndef ARP_TABLE_SIZE -#define ARP_TABLE_SIZE 10 -#endif - -/** - * If enabled, outgoing packets are queued during hardware address - * resolution. - * - * This feature has not stabilized yet. Single-packet queueing is - * believed to be stable, multi-packet queueing is believed to - * clash with the TCP segment queueing. - * - * As multi-packet-queueing is currently disabled, enabling this - * _should_ work, but we need your testing feedback on lwip-users. - * - */ -#ifndef ARP_QUEUEING -#define ARP_QUEUEING 1 -#endif - -/* This option is deprecated */ -#ifdef ETHARP_QUEUE_FIRST -#error ETHARP_QUEUE_FIRST option is deprecated. Remove it from your lwipopts.h. -#endif - -/* This option is removed to comply with the ARP standard */ -#ifdef ETHARP_ALWAYS_INSERT -#error ETHARP_ALWAYS_INSERT option is deprecated. Remove it from your lwipopts.h. -#endif - -/* ---------- IP options ---------- */ -/* Define IP_FORWARD to 1 if you wish to have the ability to forward - IP packets across network interfaces. If you are going to run lwIP - on a device with only one network interface, define this to 0. */ -#ifndef IP_FORWARD -#define IP_FORWARD 0 -#endif - -/* If defined to 1, IP options are allowed (but not parsed). If - defined to 0, all packets with IP options are dropped. */ -#ifndef IP_OPTIONS -#define IP_OPTIONS 1 -#endif - -/** IP reassembly and segmentation. Even if they both deal with IP - * fragments, note that these are orthogonal, one dealing with incoming - * packets, the other with outgoing packets - */ - -/** Reassemble incoming fragmented IP packets */ -#ifndef IP_REASSEMBLY -#define IP_REASSEMBLY 1 -#endif - -/** Fragment outgoing IP packets if their size exceeds MTU */ -#ifndef IP_FRAG -#define IP_FRAG 1 -#endif - -/* ---------- ICMP options ---------- */ - -#ifndef ICMP_TTL -#define ICMP_TTL 255 -#endif - -/* ---------- RAW options ---------- */ - -#ifndef LWIP_RAW -#define LWIP_RAW 1 -#endif - -#ifndef RAW_TTL -#define RAW_TTL 255 -#endif - -/* ---------- DHCP options ---------- */ - -#ifndef LWIP_DHCP -#define LWIP_DHCP 0 -#endif - -/* 1 if you want to do an ARP check on the offered address - (recommended). */ -#ifndef DHCP_DOES_ARP_CHECK -#define DHCP_DOES_ARP_CHECK 1 -#endif - -/* ---------- UDP options ---------- */ -#ifndef LWIP_UDP -#define LWIP_UDP 1 -#endif - -#ifndef UDP_TTL -#define UDP_TTL 255 -#endif - -/* ---------- TCP options ---------- */ -#ifndef LWIP_TCP -#define LWIP_TCP 1 -#endif - -#ifndef TCP_TTL -#define TCP_TTL 255 -#endif - -#ifndef TCP_WND -#define TCP_WND 2048 -#endif - -#ifndef TCP_MAXRTX -#define TCP_MAXRTX 12 -#endif - -#ifndef TCP_SYNMAXRTX -#define TCP_SYNMAXRTX 6 -#endif - - -/* Controls if TCP should queue segments that arrive out of - order. Define to 0 if your device is low on memory. */ -#ifndef TCP_QUEUE_OOSEQ -#define TCP_QUEUE_OOSEQ 1 -#endif - -/* TCP Maximum segment size. */ -#ifndef TCP_MSS -#define TCP_MSS 128 /* A *very* conservative default. */ -#endif - -/* TCP sender buffer space (bytes). */ -#ifndef TCP_SND_BUF -#define TCP_SND_BUF 256 -#endif - -/* TCP sender buffer space (pbufs). This must be at least = 2 * - TCP_SND_BUF/TCP_MSS for things to work. */ -#ifndef TCP_SND_QUEUELEN -#define TCP_SND_QUEUELEN 4 * TCP_SND_BUF/TCP_MSS -#endif - - -/* Maximum number of retransmissions of data segments. */ - -/* Maximum number of retransmissions of SYN segments. */ - -/* TCP writable space (bytes). This must be less than or equal - to TCP_SND_BUF. It is the amount of space which must be - available in the tcp snd_buf for select to return writable */ -#ifndef TCP_SNDLOWAT -#define TCP_SNDLOWAT TCP_SND_BUF/2 -#endif - -/* Support loop interface (127.0.0.1) */ -#ifndef LWIP_HAVE_LOOPIF -#define LWIP_HAVE_LOOPIF 0 -#endif - -#ifndef LWIP_EVENT_API -#define LWIP_EVENT_API 0 -#define LWIP_CALLBACK_API 1 -#else -#define LWIP_EVENT_API 1 -#define LWIP_CALLBACK_API 0 -#endif - -#ifndef LWIP_COMPAT_SOCKETS -#define LWIP_COMPAT_SOCKETS 1 -#endif - - -#ifndef TCPIP_THREAD_PRIO -#define TCPIP_THREAD_PRIO 1 -#endif - -#ifndef SLIPIF_THREAD_PRIO -#define SLIPIF_THREAD_PRIO 1 -#endif - -#ifndef PPP_THREAD_PRIO -#define PPP_THREAD_PRIO 1 -#endif - -#ifndef DEFAULT_THREAD_PRIO -#define DEFAULT_THREAD_PRIO 1 -#endif - - -/* ---------- Socket Options ---------- */ -/* Enable SO_REUSEADDR and SO_REUSEPORT options */ -#ifdef SO_REUSE -/* I removed the lot since this was an ugly hack. It broke the raw-API. - It also came with many ugly goto's, Christiaan Simons. */ -#error "SO_REUSE currently unavailable, this was a hack" -#endif - - -/* ---------- Statistics options ---------- */ -#ifndef LWIP_STATS -#define LWIP_STATS 1 -#endif - -#if LWIP_STATS - -#ifndef LWIP_STATS_DISPLAY -#define LWIP_STATS_DISPLAY 0 -#endif - -#ifndef LINK_STATS -#define LINK_STATS 1 -#endif - -#ifndef IP_STATS -#define IP_STATS 1 -#endif - -#ifndef IPFRAG_STATS -#define IPFRAG_STATS 1 -#endif - -#ifndef ICMP_STATS -#define ICMP_STATS 1 -#endif - -#ifndef UDP_STATS -#define UDP_STATS 1 -#endif - -#ifndef TCP_STATS -#define TCP_STATS 1 -#endif - -#ifndef MEM_STATS -#define MEM_STATS 1 -#endif - -#ifndef MEMP_STATS -#define MEMP_STATS 1 -#endif - -#ifndef PBUF_STATS -#define PBUF_STATS 1 -#endif - -#ifndef SYS_STATS -#define SYS_STATS 1 -#endif - -#ifndef RAW_STATS -#define RAW_STATS 0 -#endif - -#else - -#define LINK_STATS 0 -#define IP_STATS 0 -#define IPFRAG_STATS 0 -#define ICMP_STATS 0 -#define UDP_STATS 0 -#define TCP_STATS 0 -#define MEM_STATS 0 -#define MEMP_STATS 0 -#define PBUF_STATS 0 -#define SYS_STATS 0 -#define RAW_STATS 0 -#define LWIP_STATS_DISPLAY 0 - -#endif /* LWIP_STATS */ - -/* ---------- PPP options ---------- */ - -#ifndef PPP_SUPPORT -#define PPP_SUPPORT 0 /* Set for PPP */ -#endif - -#if PPP_SUPPORT - -#define NUM_PPP 1 /* Max PPP sessions. */ - - - -#ifndef PAP_SUPPORT -#define PAP_SUPPORT 0 /* Set for PAP. */ -#endif - -#ifndef CHAP_SUPPORT -#define CHAP_SUPPORT 0 /* Set for CHAP. */ -#endif - -#define MSCHAP_SUPPORT 0 /* Set for MSCHAP (NOT FUNCTIONAL!) */ -#define CBCP_SUPPORT 0 /* Set for CBCP (NOT FUNCTIONAL!) */ -#define CCP_SUPPORT 0 /* Set for CCP (NOT FUNCTIONAL!) */ - -#ifndef VJ_SUPPORT -#define VJ_SUPPORT 0 /* Set for VJ header compression. */ -#endif - -#ifndef MD5_SUPPORT -#define MD5_SUPPORT 0 /* Set for MD5 (see also CHAP) */ -#endif - - -/* - * Timeouts. - */ -#define FSM_DEFTIMEOUT 6 /* Timeout time in seconds */ -#define FSM_DEFMAXTERMREQS 2 /* Maximum Terminate-Request transmissions */ -#define FSM_DEFMAXCONFREQS 10 /* Maximum Configure-Request transmissions */ -#define FSM_DEFMAXNAKLOOPS 5 /* Maximum number of nak loops */ - -#define UPAP_DEFTIMEOUT 6 /* Timeout (seconds) for retransmitting req */ -#define UPAP_DEFREQTIME 30 /* Time to wait for auth-req from peer */ - -#define CHAP_DEFTIMEOUT 6 /* Timeout time in seconds */ -#define CHAP_DEFTRANSMITS 10 /* max # times to send challenge */ - - -/* Interval in seconds between keepalive echo requests, 0 to disable. */ -#if 1 -#define LCP_ECHOINTERVAL 0 -#else -#define LCP_ECHOINTERVAL 10 -#endif - -/* Number of unanswered echo requests before failure. */ -#define LCP_MAXECHOFAILS 3 - -/* Max Xmit idle time (in jiffies) before resend flag char. */ -#define PPP_MAXIDLEFLAG 100 - -/* - * Packet sizes - * - * Note - lcp shouldn't be allowed to negotiate stuff outside these - * limits. See lcp.h in the pppd directory. - * (XXX - these constants should simply be shared by lcp.c instead - * of living in lcp.h) - */ -#define PPP_MTU 1500 /* Default MTU (size of Info field) */ -#if 0 -#define PPP_MAXMTU 65535 - (PPP_HDRLEN + PPP_FCSLEN) -#else -#define PPP_MAXMTU 1500 /* Largest MTU we allow */ -#endif -#define PPP_MINMTU 64 -#define PPP_MRU 1500 /* default MRU = max length of info field */ -#define PPP_MAXMRU 1500 /* Largest MRU we allow */ -#define PPP_DEFMRU 296 /* Try for this */ -#define PPP_MINMRU 128 /* No MRUs below this */ - - -#define MAXNAMELEN 256 /* max length of hostname or name for auth */ -#define MAXSECRETLEN 256 /* max length of password or secret */ - -#endif /* PPP_SUPPORT */ - -/* checksum options - set to zero for hardware checksum support */ - -#ifndef CHECKSUM_GEN_IP -#define CHECKSUM_GEN_IP 1 -#endif - -#ifndef CHECKSUM_GEN_UDP -#define CHECKSUM_GEN_UDP 1 -#endif - -#ifndef CHECKSUM_GEN_TCP -#define CHECKSUM_GEN_TCP 1 -#endif - -#ifndef CHECKSUM_CHECK_IP -#define CHECKSUM_CHECK_IP 1 -#endif - -#ifndef CHECKSUM_CHECK_UDP -#define CHECKSUM_CHECK_UDP 1 -#endif - -#ifndef CHECKSUM_CHECK_TCP -#define CHECKSUM_CHECK_TCP 1 -#endif - -/* Debugging options all default to off */ - -#ifndef DBG_TYPES_ON -#define DBG_TYPES_ON 0 -#endif - -#ifndef ETHARP_DEBUG -#define ETHARP_DEBUG DBG_OFF -#endif - -#ifndef NETIF_DEBUG -#define NETIF_DEBUG DBG_OFF -#endif - -#ifndef PBUF_DEBUG -#define PBUF_DEBUG DBG_OFF -#endif - -#ifndef API_LIB_DEBUG -#define API_LIB_DEBUG DBG_OFF -#endif - -#ifndef API_MSG_DEBUG -#define API_MSG_DEBUG DBG_OFF -#endif - -#ifndef SOCKETS_DEBUG -#define SOCKETS_DEBUG DBG_OFF -#endif - -#ifndef ICMP_DEBUG -#define ICMP_DEBUG DBG_OFF -#endif - -#ifndef INET_DEBUG -#define INET_DEBUG DBG_OFF -#endif - -#ifndef IP_DEBUG -#define IP_DEBUG DBG_OFF -#endif - -#ifndef IP_REASS_DEBUG -#define IP_REASS_DEBUG DBG_OFF -#endif - -#ifndef RAW_DEBUG -#define RAW_DEBUG DBG_OFF -#endif - -#ifndef MEM_DEBUG -#define MEM_DEBUG DBG_OFF -#endif - -#ifndef MEMP_DEBUG -#define MEMP_DEBUG DBG_OFF -#endif - -#ifndef SYS_DEBUG -#define SYS_DEBUG DBG_OFF -#endif - -#ifndef TCP_DEBUG -#define TCP_DEBUG DBG_OFF -#endif - -#ifndef TCP_INPUT_DEBUG -#define TCP_INPUT_DEBUG DBG_OFF -#endif - -#ifndef TCP_FR_DEBUG -#define TCP_FR_DEBUG DBG_OFF -#endif - -#ifndef TCP_RTO_DEBUG -#define TCP_RTO_DEBUG DBG_OFF -#endif - -#ifndef TCP_REXMIT_DEBUG -#define TCP_REXMIT_DEBUG DBG_OFF -#endif - -#ifndef TCP_CWND_DEBUG -#define TCP_CWND_DEBUG DBG_OFF -#endif - -#ifndef TCP_WND_DEBUG -#define TCP_WND_DEBUG DBG_OFF -#endif - -#ifndef TCP_OUTPUT_DEBUG -#define TCP_OUTPUT_DEBUG DBG_OFF -#endif - -#ifndef TCP_RST_DEBUG -#define TCP_RST_DEBUG DBG_OFF -#endif - -#ifndef TCP_QLEN_DEBUG -#define TCP_QLEN_DEBUG DBG_OFF -#endif - -#ifndef UDP_DEBUG -#define UDP_DEBUG DBG_OFF -#endif - -#ifndef TCPIP_DEBUG -#define TCPIP_DEBUG DBG_OFF -#endif - -#ifndef PPP_DEBUG -#define PPP_DEBUG DBG_OFF -#endif - -#ifndef SLIP_DEBUG -#define SLIP_DEBUG DBG_OFF -#endif - -#ifndef DHCP_DEBUG -#define DHCP_DEBUG DBG_OFF -#endif - - -#ifndef DBG_MIN_LEVEL -#define DBG_MIN_LEVEL DBG_LEVEL_OFF -#endif - -#endif /* __LWIP_OPT_H__ */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/pbuf.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/pbuf.h deleted file mode 100644 index 546aa303..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/pbuf.h +++ /dev/null @@ -1,113 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#ifndef __LWIP_PBUF_H__ -#define __LWIP_PBUF_H__ - -#include "arch/cc.h" - - -#define PBUF_TRANSPORT_HLEN 20 -#define PBUF_IP_HLEN 20 - -typedef enum { - PBUF_TRANSPORT, - PBUF_IP, - PBUF_LINK, - PBUF_RAW -} pbuf_layer; - -typedef enum { - PBUF_RAM, - PBUF_ROM, - PBUF_REF, - PBUF_POOL -} pbuf_flag; - -/* Definitions for the pbuf flag field. These are NOT the flags that - * are passed to pbuf_alloc(). */ -#define PBUF_FLAG_RAM 0x00U /* Flags that pbuf data is stored in RAM */ -#define PBUF_FLAG_ROM 0x01U /* Flags that pbuf data is stored in ROM */ -#define PBUF_FLAG_POOL 0x02U /* Flags that the pbuf comes from the pbuf pool */ -#define PBUF_FLAG_REF 0x04U /* Flags thet the pbuf payload refers to RAM */ - -/** indicates this packet was broadcast on the link */ -#define PBUF_FLAG_LINK_BROADCAST 0x80U - -struct pbuf { - /** next pbuf in singly linked pbuf chain */ - struct pbuf *next; - - /** pointer to the actual data in the buffer */ - void *payload; - - /** - * total length of this buffer and all next buffers in chain - * belonging to the same packet. - * - * For non-queue packet chains this is the invariant: - * p->tot_len == p->len + (p->next? p->next->tot_len: 0) - */ - u16_t tot_len; - - /** length of this buffer */ - u16_t len; - - /** flags telling the type of pbuf, see PBUF_FLAG_ */ - u16_t flags; - - /** - * the reference count always equals the number of pointers - * that refer to this pbuf. This can be pointers from an application, - * the stack itself, or pbuf->next pointers from a chain. - */ - u16_t ref; - -}; - -void pbuf_init(void); - -struct pbuf *pbuf_alloc(pbuf_layer l, u16_t size, pbuf_flag flag); -void pbuf_realloc(struct pbuf *p, u16_t size); -u8_t pbuf_header(struct pbuf *p, s16_t header_size); -void pbuf_ref(struct pbuf *p); -void pbuf_ref_chain(struct pbuf *p); -u8_t pbuf_free(struct pbuf *p); -u8_t pbuf_clen(struct pbuf *p); -void pbuf_cat(struct pbuf *h, struct pbuf *t); -void pbuf_chain(struct pbuf *h, struct pbuf *t); -struct pbuf *pbuf_take(struct pbuf *f); -struct pbuf *pbuf_dechain(struct pbuf *p); -void pbuf_queue(struct pbuf *p, struct pbuf *n); -struct pbuf * pbuf_dequeue(struct pbuf *p); - -#endif /* __LWIP_PBUF_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/raw.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/raw.h deleted file mode 100644 index 6f7a9871..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/raw.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_RAW_H__ -#define __LWIP_RAW_H__ - -#include "lwip/arch.h" - -#include "lwip/pbuf.h" -#include "lwip/inet.h" -#include "lwip/ip.h" - -struct raw_pcb { -/* Common members of all PCB types */ - IP_PCB; - - struct raw_pcb *next; - - u16_t protocol; - - u8_t (* recv)(void *arg, struct raw_pcb *pcb, struct pbuf *p, - struct ip_addr *addr); - void *recv_arg; -}; - -/* The following functions is the application layer interface to the - RAW code. */ -struct raw_pcb * raw_new (u16_t proto); -void raw_remove (struct raw_pcb *pcb); -err_t raw_bind (struct raw_pcb *pcb, struct ip_addr *ipaddr); -err_t raw_connect (struct raw_pcb *pcb, struct ip_addr *ipaddr); - -void raw_recv (struct raw_pcb *pcb, - u8_t (* recv)(void *arg, struct raw_pcb *pcb, - struct pbuf *p, - struct ip_addr *addr), - void *recv_arg); -err_t raw_sendto (struct raw_pcb *pcb, struct pbuf *p, struct ip_addr *ipaddr); -err_t raw_send (struct raw_pcb *pcb, struct pbuf *p); - -/* The following functions are the lower layer interface to RAW. */ -u8_t raw_input (struct pbuf *p, struct netif *inp); -void raw_init (void); - - -#endif /* __LWIP_RAW_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/sio.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/sio.h deleted file mode 100644 index e357b105..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/sio.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - */ - -/* - * This is the interface to the platform specific serial IO module - * It needs to be implemented by those platforms which need SLIP or PPP - */ -#ifndef __SIO_H -#define __SIO_H - -#include "arch/cc.h" - -#ifndef __sio_fd_t_defined -typedef void * sio_fd_t; -#endif - -#ifndef sio_open -sio_fd_t sio_open(u8_t); -#endif - -#ifndef sio_send -void sio_send(u8_t, sio_fd_t); -#endif - -#ifndef sio_recv -u8_t sio_recv(sio_fd_t); -#endif - -#ifndef sio_read -u32_t sio_read(sio_fd_t, u8_t *, u32_t); -#endif - -#ifndef sio_write -u32_t sio_write(sio_fd_t, u8_t *, u32_t); -#endif - -#ifndef sio_read_abort -void sio_read_abort(sio_fd_t); -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/snmp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/snmp.h deleted file mode 100644 index 7d160aaa..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/snmp.h +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (c) 2001, 2002 Leon Woestenberg - * Copyright (c) 2001, 2002 Axon Digital Design B.V., The Netherlands. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Leon Woestenberg - * - */ -#ifndef __LWIP_SNMP_H__ -#define __LWIP_SNMP_H__ - -#include "lwip/opt.h" - -/* SNMP support available? */ -#if defined(LWIP_SNMP) && (LWIP_SNMP > 0) - -/* network interface */ -void snmp_add_ifinoctets(unsigned long value); -void snmp_inc_ifinucastpkts(void); -void snmp_inc_ifinnucastpkts(void); -void snmp_inc_ifindiscards(void); -void snmp_add_ifoutoctets(unsigned long value); -void snmp_inc_ifoutucastpkts(void); -void snmp_inc_ifoutnucastpkts(void); -void snmp_inc_ifoutdiscards(void); - -/* IP */ -void snmp_inc_ipinreceives(void); -void snmp_inc_ipindelivers(void); -void snmp_inc_ipindiscards(void); -void snmp_inc_ipoutdiscards(void); -void snmp_inc_ipoutrequests(void); -void snmp_inc_ipunknownprotos(void); -void snmp_inc_ipnoroutes(void); -void snmp_inc_ipforwdatagrams(void); - -/* ICMP */ -void snmp_inc_icmpinmsgs(void); -void snmp_inc_icmpinerrors(void); -void snmp_inc_icmpindestunreachs(void); -void snmp_inc_icmpintimeexcds(void); -void snmp_inc_icmpinparmprobs(void); -void snmp_inc_icmpinsrcquenchs(void); -void snmp_inc_icmpinredirects(void); -void snmp_inc_icmpinechos(void); -void snmp_inc_icmpinechoreps(void); -void snmp_inc_icmpintimestamps(void); -void snmp_inc_icmpintimestampreps(void); -void snmp_inc_icmpinaddrmasks(void); -void snmp_inc_icmpinaddrmaskreps(void); -void snmp_inc_icmpoutmsgs(void); -void snmp_inc_icmpouterrors(void); -void snmp_inc_icmpoutdestunreachs(void); -void snmp_inc_icmpouttimeexcds(void); -void snmp_inc_icmpoutparmprobs(void); -void snmp_inc_icmpoutsrcquenchs(void); -void snmp_inc_icmpoutredirects(void); -void snmp_inc_icmpoutechos(void); -void snmp_inc_icmpoutechoreps(void); -void snmp_inc_icmpouttimestamps(void); -void snmp_inc_icmpouttimestampreps(void); -void snmp_inc_icmpoutaddrmasks(void); -void snmp_inc_icmpoutaddrmaskreps(void); - -/* TCP */ -void snmp_inc_tcpactiveopens(void); -void snmp_inc_tcppassiveopens(void); -void snmp_inc_tcpattemptfails(void); -void snmp_inc_tcpestabresets(void); -void snmp_inc_tcpcurrestab(void); -void snmp_inc_tcpinsegs(void); -void snmp_inc_tcpoutsegs(void); -void snmp_inc_tcpretranssegs(void); -void snmp_inc_tcpinerrs(void); -void snmp_inc_tcpoutrsts(void); - -/* UDP */ -void snmp_inc_udpindatagrams(void); -void snmp_inc_udpnoports(void); -void snmp_inc_udpinerrors(void); -void snmp_inc_udpoutdatagrams(void); - -/* LWIP_SNMP support not available */ -/* define everything to be empty */ -#else - -/* network interface */ -#define snmp_add_ifinoctets(value) -#define snmp_inc_ifinucastpkts() -#define snmp_inc_ifinnucastpkts() -#define snmp_inc_ifindiscards() -#define snmp_add_ifoutoctets(value) -#define snmp_inc_ifoutucastpkts() -#define snmp_inc_ifoutnucastpkts() -#define snmp_inc_ifoutdiscards() - -/* IP */ -#define snmp_inc_ipinreceives() -#define snmp_inc_ipindelivers() -#define snmp_inc_ipindiscards() -#define snmp_inc_ipoutdiscards() -#define snmp_inc_ipoutrequests() -#define snmp_inc_ipunknownprotos() -#define snmp_inc_ipnoroutes() -#define snmp_inc_ipforwdatagrams() - -/* ICMP */ -#define snmp_inc_icmpinmsgs() -#define snmp_inc_icmpinerrors() -#define snmp_inc_icmpindestunreachs() -#define snmp_inc_icmpintimeexcds() -#define snmp_inc_icmpinparmprobs() -#define snmp_inc_icmpinsrcquenchs() -#define snmp_inc_icmpinredirects() -#define snmp_inc_icmpinechos() -#define snmp_inc_icmpinechoreps() -#define snmp_inc_icmpintimestamps() -#define snmp_inc_icmpintimestampreps() -#define snmp_inc_icmpinaddrmasks() -#define snmp_inc_icmpinaddrmaskreps() -#define snmp_inc_icmpoutmsgs() -#define snmp_inc_icmpouterrors() -#define snmp_inc_icmpoutdestunreachs() -#define snmp_inc_icmpouttimeexcds() -#define snmp_inc_icmpoutparmprobs() -#define snmp_inc_icmpoutsrcquenchs() -#define snmp_inc_icmpoutredirects() -#define snmp_inc_icmpoutechos() -#define snmp_inc_icmpoutechoreps() -#define snmp_inc_icmpouttimestamps() -#define snmp_inc_icmpouttimestampreps() -#define snmp_inc_icmpoutaddrmasks() -#define snmp_inc_icmpoutaddrmaskreps() -/* TCP */ -#define snmp_inc_tcpactiveopens() -#define snmp_inc_tcppassiveopens() -#define snmp_inc_tcpattemptfails() -#define snmp_inc_tcpestabresets() -#define snmp_inc_tcpcurrestab() -#define snmp_inc_tcpinsegs() -#define snmp_inc_tcpoutsegs() -#define snmp_inc_tcpretranssegs() -#define snmp_inc_tcpinerrs() -#define snmp_inc_tcpoutrsts() - -/* UDP */ -#define snmp_inc_udpindatagrams() -#define snmp_inc_udpnoports() -#define snmp_inc_udpinerrors() -#define snmp_inc_udpoutdatagrams() - -#endif - -#endif /* __LWIP_SNMP_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/sockets.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/sockets.h deleted file mode 100644 index d5f8ccf7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/sockets.h +++ /dev/null @@ -1,271 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - - -#ifndef __LWIP_SOCKETS_H__ -#define __LWIP_SOCKETS_H__ -#include "lwip/ip_addr.h" - -struct sockaddr_in { - u8_t sin_len; - u8_t sin_family; - u16_t sin_port; - struct in_addr sin_addr; - char sin_zero[8]; -}; - -struct sockaddr { - u8_t sa_len; - u8_t sa_family; - char sa_data[14]; -}; - -#ifndef socklen_t -# define socklen_t int -#endif - - -#define SOCK_STREAM 1 -#define SOCK_DGRAM 2 -#define SOCK_RAW 3 - -/* - * Option flags per-socket. - */ -#define SO_DEBUG 0x0001 /* turn on debugging info recording */ -#define SO_ACCEPTCONN 0x0002 /* socket has had listen() */ -#define SO_REUSEADDR 0x0004 /* allow local address reuse */ -#define SO_KEEPALIVE 0x0008 /* keep connections alive */ -#define SO_DONTROUTE 0x0010 /* just use interface addresses */ -#define SO_BROADCAST 0x0020 /* permit sending of broadcast msgs */ -#define SO_USELOOPBACK 0x0040 /* bypass hardware when possible */ -#define SO_LINGER 0x0080 /* linger on close if data present */ -#define SO_OOBINLINE 0x0100 /* leave received OOB data in line */ -#define SO_REUSEPORT 0x0200 /* allow local address & port reuse */ - -#define SO_DONTLINGER (int)(~SO_LINGER) - -/* - * Additional options, not kept in so_options. - */ -#define SO_SNDBUF 0x1001 /* send buffer size */ -#define SO_RCVBUF 0x1002 /* receive buffer size */ -#define SO_SNDLOWAT 0x1003 /* send low-water mark */ -#define SO_RCVLOWAT 0x1004 /* receive low-water mark */ -#define SO_SNDTIMEO 0x1005 /* send timeout */ -#define SO_RCVTIMEO 0x1006 /* receive timeout */ -#define SO_ERROR 0x1007 /* get error status and clear */ -#define SO_TYPE 0x1008 /* get socket type */ - - - -/* - * Structure used for manipulating linger option. - */ -struct linger { - int l_onoff; /* option on/off */ - int l_linger; /* linger time */ -}; - -/* - * Level number for (get/set)sockopt() to apply to socket itself. - */ -#define SOL_SOCKET 0xfff /* options for socket level */ - - -#define AF_UNSPEC 0 -#define AF_INET 2 -#define PF_INET AF_INET -#define PF_UNSPEC AF_UNSPEC - -#define IPPROTO_IP 0 -#define IPPROTO_TCP 6 -#define IPPROTO_UDP 17 - -#define INADDR_ANY 0 -#define INADDR_BROADCAST 0xffffffff - -/* Flags we can use with send and recv. */ -#define MSG_DONTWAIT 0x40 /* Nonblocking i/o for this operation only */ - - -/* - * Options for level IPPROTO_IP - */ -#define IP_TOS 1 -#define IP_TTL 2 - - -#define IPTOS_TOS_MASK 0x1E -#define IPTOS_TOS(tos) ((tos) & IPTOS_TOS_MASK) -#define IPTOS_LOWDELAY 0x10 -#define IPTOS_THROUGHPUT 0x08 -#define IPTOS_RELIABILITY 0x04 -#define IPTOS_LOWCOST 0x02 -#define IPTOS_MINCOST IPTOS_LOWCOST - -/* - * Definitions for IP precedence (also in ip_tos) (hopefully unused) - */ -#define IPTOS_PREC_MASK 0xe0 -#define IPTOS_PREC(tos) ((tos) & IPTOS_PREC_MASK) -#define IPTOS_PREC_NETCONTROL 0xe0 -#define IPTOS_PREC_INTERNETCONTROL 0xc0 -#define IPTOS_PREC_CRITIC_ECP 0xa0 -#define IPTOS_PREC_FLASHOVERRIDE 0x80 -#define IPTOS_PREC_FLASH 0x60 -#define IPTOS_PREC_IMMEDIATE 0x40 -#define IPTOS_PREC_PRIORITY 0x20 -#define IPTOS_PREC_ROUTINE 0x00 - - -/* - * Commands for ioctlsocket(), taken from the BSD file fcntl.h. - * - * - * Ioctl's have the command encoded in the lower word, - * and the size of any in or out parameters in the upper - * word. The high 2 bits of the upper word are used - * to encode the in/out status of the parameter; for now - * we restrict parameters to at most 128 bytes. - */ -#if !defined(FIONREAD) || !defined(FIONBIO) -#define IOCPARM_MASK 0x7f /* parameters must be < 128 bytes */ -#define IOC_VOID 0x20000000 /* no parameters */ -#define IOC_OUT 0x40000000 /* copy out parameters */ -#define IOC_IN 0x80000000 /* copy in parameters */ -#define IOC_INOUT (IOC_IN|IOC_OUT) - /* 0x20000000 distinguishes new & - old ioctl's */ -#define _IO(x,y) (IOC_VOID|((x)<<8)|(y)) - -#define _IOR(x,y,t) (IOC_OUT|(((long)sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)) - -#define _IOW(x,y,t) (IOC_IN|(((long)sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)) -#endif - -#ifndef FIONREAD -#define FIONREAD _IOR('f', 127, unsigned long) /* get # bytes to read */ -#endif -#ifndef FIONBIO -#define FIONBIO _IOW('f', 126, unsigned long) /* set/clear non-blocking i/o */ -#endif - -/* Socket I/O Controls */ -#ifndef SIOCSHIWAT -#define SIOCSHIWAT _IOW('s', 0, unsigned long) /* set high watermark */ -#define SIOCGHIWAT _IOR('s', 1, unsigned long) /* get high watermark */ -#define SIOCSLOWAT _IOW('s', 2, unsigned long) /* set low watermark */ -#define SIOCGLOWAT _IOR('s', 3, unsigned long) /* get low watermark */ -#define SIOCATMARK _IOR('s', 7, unsigned long) /* at oob mark? */ -#endif - -#ifndef O_NONBLOCK -#define O_NONBLOCK 04000U -#endif - -#ifndef FD_SET - #undef FD_SETSIZE - #define FD_SETSIZE 16 - #define FD_SET(n, p) ((p)->fd_bits[(n)/8] |= (1 << ((n) & 7))) - #define FD_CLR(n, p) ((p)->fd_bits[(n)/8] &= ~(1 << ((n) & 7))) - #define FD_ISSET(n,p) ((p)->fd_bits[(n)/8] & (1 << ((n) & 7))) - #define FD_ZERO(p) memset((void*)(p),0,sizeof(*(p))) - - typedef struct fd_set { - unsigned char fd_bits [(FD_SETSIZE+7)/8]; - } fd_set; - -/* - * only define this in sockets.c so it does not interfere - * with other projects namespaces where timeval is present - */ -#ifndef LWIP_TIMEVAL_PRIVATE -#define LWIP_TIMEVAL_PRIVATE 1 -#endif - -#if LWIP_TIMEVAL_PRIVATE - struct timeval { - long tv_sec; /* seconds */ - long tv_usec; /* and microseconds */ - }; -#endif - -#endif - -int lwip_accept(int s, struct sockaddr *addr, socklen_t *addrlen); -int lwip_bind(int s, struct sockaddr *name, socklen_t namelen); -int lwip_shutdown(int s, int how); -int lwip_getpeername (int s, struct sockaddr *name, socklen_t *namelen); -int lwip_getsockname (int s, struct sockaddr *name, socklen_t *namelen); -int lwip_getsockopt (int s, int level, int optname, void *optval, socklen_t *optlen); -int lwip_setsockopt (int s, int level, int optname, const void *optval, socklen_t optlen); -int lwip_close(int s); -int lwip_connect(int s, struct sockaddr *name, socklen_t namelen); -int lwip_listen(int s, int backlog); -int lwip_recv(int s, void *mem, int len, unsigned int flags); -int lwip_read(int s, void *mem, int len); -int lwip_recvfrom(int s, void *mem, int len, unsigned int flags, - struct sockaddr *from, socklen_t *fromlen); -int lwip_send(int s, void *dataptr, int size, unsigned int flags); -int lwip_sendto(int s, void *dataptr, int size, unsigned int flags, - struct sockaddr *to, socklen_t tolen); -int lwip_socket(int domain, int type, int protocol); -int lwip_write(int s, void *dataptr, int size); -int lwip_select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset, - struct timeval *timeout); -int lwip_ioctl(int s, long cmd, void *argp); - -#if LWIP_COMPAT_SOCKETS -#define accept(a,b,c) lwip_accept(a,b,c) -#define bind(a,b,c) lwip_bind(a,b,c) -#define shutdown(a,b) lwip_shutdown(a,b) -#define close(s) lwip_close(s) -#define connect(a,b,c) lwip_connect(a,b,c) -#define getsockname(a,b,c) lwip_getsockname(a,b,c) -#define getpeername(a,b,c) lwip_getpeername(a,b,c) -#define setsockopt(a,b,c,d,e) lwip_setsockopt(a,b,c,d,e) -#define getsockopt(a,b,c,d,e) lwip_getsockopt(a,b,c,d,e) -#define listen(a,b) lwip_listen(a,b) -#define recv(a,b,c,d) lwip_recv(a,b,c,d) -#define read(a,b,c) lwip_read(a,b,c) -#define recvfrom(a,b,c,d,e,f) lwip_recvfrom(a,b,c,d,e,f) -#define send(a,b,c,d) lwip_send(a,b,c,d) -#define sendto(a,b,c,d,e,f) lwip_sendto(a,b,c,d,e,f) -#define socket(a,b,c) lwip_socket(a,b,c) -#define write(a,b,c) lwip_write(a,b,c) -#define select(a,b,c,d,e) lwip_select(a,b,c,d,e) -#define ioctlsocket(a,b,c) lwip_ioctl(a,b,c) -#endif /* LWIP_COMPAT_SOCKETS */ - -#endif /* __LWIP_SOCKETS_H__ */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/stats.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/stats.h deleted file mode 100644 index 71acfd06..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/stats.h +++ /dev/null @@ -1,158 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_STATS_H__ -#define __LWIP_STATS_H__ - -#include "lwip/opt.h" -#include "arch/cc.h" - -#include "lwip/mem.h" -#include "lwip/memp.h" - -#if LWIP_STATS - -struct stats_proto { - u16_t xmit; /* Transmitted packets. */ - u16_t rexmit; /* Retransmitted packets. */ - u16_t recv; /* Received packets. */ - u16_t fw; /* Forwarded packets. */ - u16_t drop; /* Dropped packets. */ - u16_t chkerr; /* Checksum error. */ - u16_t lenerr; /* Invalid length error. */ - u16_t memerr; /* Out of memory error. */ - u16_t rterr; /* Routing error. */ - u16_t proterr; /* Protocol error. */ - u16_t opterr; /* Error in options. */ - u16_t err; /* Misc error. */ - u16_t cachehit; -}; - -struct stats_mem { - mem_size_t avail; - mem_size_t used; - mem_size_t max; - mem_size_t err; -}; - -struct stats_pbuf { - u16_t avail; - u16_t used; - u16_t max; - u16_t err; - - u16_t alloc_locked; - u16_t refresh_locked; -}; - -struct stats_syselem { - u16_t used; - u16_t max; - u16_t err; -}; - -struct stats_sys { - struct stats_syselem sem; - struct stats_syselem mbox; -}; - -struct stats_ { - struct stats_proto link; - struct stats_proto ip_frag; - struct stats_proto ip; - struct stats_proto icmp; - struct stats_proto udp; - struct stats_proto tcp; - struct stats_pbuf pbuf; - struct stats_mem mem; - struct stats_mem memp[MEMP_MAX]; - struct stats_sys sys; -}; - -extern struct stats_ lwip_stats; - - -void stats_init(void); - -#define STATS_INC(x) ++lwip_stats.x -#else -#define stats_init() -#define STATS_INC(x) -#endif /* LWIP_STATS */ - -#if TCP_STATS -#define TCP_STATS_INC(x) STATS_INC(x) -#else -#define TCP_STATS_INC(x) -#endif - -#if UDP_STATS -#define UDP_STATS_INC(x) STATS_INC(x) -#else -#define UDP_STATS_INC(x) -#endif - -#if ICMP_STATS -#define ICMP_STATS_INC(x) STATS_INC(x) -#else -#define ICMP_STATS_INC(x) -#endif - -#if IP_STATS -#define IP_STATS_INC(x) STATS_INC(x) -#else -#define IP_STATS_INC(x) -#endif - -#if IPFRAG_STATS -#define IPFRAG_STATS_INC(x) STATS_INC(x) -#else -#define IPFRAG_STATS_INC(x) -#endif - -#if LINK_STATS -#define LINK_STATS_INC(x) STATS_INC(x) -#else -#define LINK_STATS_INC(x) -#endif - -/* Display of statistics */ -#if LWIP_STATS_DISPLAY -void stats_display(void); -#else -#define stats_display() -#endif - -#endif /* __LWIP_STATS_H__ */ - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/sys.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/sys.h deleted file mode 100644 index 68926e95..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/sys.h +++ /dev/null @@ -1,183 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_SYS_H__ -#define __LWIP_SYS_H__ - -#include "arch/cc.h" - -#include "lwip/opt.h" - - -#if NO_SYS - -/* For a totally minimal and standalone system, we provide null - definitions of the sys_ functions. */ -typedef u8_t sys_sem_t; -typedef u8_t sys_mbox_t; -struct sys_timeout {u8_t dummy;}; - -#define sys_init() -#define sys_timeout(m,h,a) -#define sys_untimeout(m,a) -#define sys_sem_new(c) c -#define sys_sem_signal(s) -#define sys_sem_wait(s) -#define sys_sem_free(s) -#define sys_mbox_new() 0 -#define sys_mbox_fetch(m,d) -#define sys_mbox_post(m,d) -#define sys_mbox_free(m) - -#define sys_thread_new(t,a,p) - -#else /* NO_SYS */ - -#include "arch/sys_arch.h" - -/** Return code for timeouts from sys_arch_mbox_fetch and sys_arch_sem_wait */ -#define SYS_ARCH_TIMEOUT 0xffffffff - -typedef void (* sys_timeout_handler)(void *arg); - -struct sys_timeout { - struct sys_timeout *next; - u32_t time; - sys_timeout_handler h; - void *arg; -}; - -struct sys_timeouts { - struct sys_timeout *next; -}; - -/* sys_init() must be called before anthing else. */ -void sys_init(void); - -/* - * sys_timeout(): - * - * Schedule a timeout a specified amount of milliseconds in the - * future. When the timeout occurs, the specified timeout handler will - * be called. The handler will be passed the "arg" argument when - * called. - * - */ -void sys_timeout(u32_t msecs, sys_timeout_handler h, void *arg); -void sys_untimeout(sys_timeout_handler h, void *arg); -struct sys_timeouts *sys_arch_timeouts(void); - -/* Semaphore functions. */ -sys_sem_t sys_sem_new(u8_t count); -void sys_sem_signal(sys_sem_t sem); -u32_t sys_arch_sem_wait(sys_sem_t sem, u32_t timeout); -void sys_sem_free(sys_sem_t sem); -void sys_sem_wait(sys_sem_t sem); -int sys_sem_wait_timeout(sys_sem_t sem, u32_t timeout); - -/* Time functions. */ -#ifndef sys_msleep -void sys_msleep(u32_t ms); /* only has a (close to) 1 jiffy resolution. */ -#endif -#ifndef sys_jiffies -u32_t sys_jiffies(void); /* since power up. */ -#endif - -/* Mailbox functions. */ -sys_mbox_t sys_mbox_new(void); -void sys_mbox_post(sys_mbox_t mbox, void *msg); -u32_t sys_arch_mbox_fetch(sys_mbox_t mbox, void **msg, u32_t timeout); -void sys_mbox_free(sys_mbox_t mbox); -void sys_mbox_fetch(sys_mbox_t mbox, void **msg); - - -/* Thread functions. */ -sys_thread_t sys_thread_new(void (* thread)(void *arg), void *arg, int prio); - -/* The following functions are used only in Unix code, and - can be omitted when porting the stack. */ -/* Returns the current time in microseconds. */ -unsigned long sys_now(void); - -#endif /* NO_SYS */ - -/* Critical Region Protection */ -/* These functions must be implemented in the sys_arch.c file. - In some implementations they can provide a more light-weight protection - mechanism than using semaphores. Otherwise semaphores can be used for - implementation */ -#ifndef SYS_ARCH_PROTECT -/** SYS_LIGHTWEIGHT_PROT - * define SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection - * for certain critical regions during buffer allocation, deallocation and memory - * allocation and deallocation. - */ -#if SYS_LIGHTWEIGHT_PROT - -/** SYS_ARCH_DECL_PROTECT - * declare a protection variable. This macro will default to defining a variable of - * type sys_prot_t. If a particular port needs a different implementation, then - * this macro may be defined in sys_arch.h. - */ -#define SYS_ARCH_DECL_PROTECT(lev) sys_prot_t lev -/** SYS_ARCH_PROTECT - * Perform a "fast" protect. This could be implemented by - * disabling interrupts for an embedded system or by using a semaphore or - * mutex. The implementation should allow calling SYS_ARCH_PROTECT when - * already protected. The old protection level is returned in the variable - * "lev". This macro will default to calling the sys_arch_protect() function - * which should be implemented in sys_arch.c. If a particular port needs a - * different implementation, then this macro may be defined in sys_arch.h - */ -#define SYS_ARCH_PROTECT(lev) lev = sys_arch_protect() -/** SYS_ARCH_UNPROTECT - * Perform a "fast" set of the protection level to "lev". This could be - * implemented by setting the interrupt level to "lev" within the MACRO or by - * using a semaphore or mutex. This macro will default to calling the - * sys_arch_unprotect() function which should be implemented in - * sys_arch.c. If a particular port needs a different implementation, then - * this macro may be defined in sys_arch.h - */ -#define SYS_ARCH_UNPROTECT(lev) sys_arch_unprotect(lev) -sys_prot_t sys_arch_protect(void); -void sys_arch_unprotect(sys_prot_t pval); - -#else - -#define SYS_ARCH_DECL_PROTECT(lev) -#define SYS_ARCH_PROTECT(lev) -#define SYS_ARCH_UNPROTECT(lev) - -#endif /* SYS_LIGHTWEIGHT_PROT */ - -#endif /* SYS_ARCH_PROTECT */ - -#endif /* __LWIP_SYS_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/tcp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/tcp.h deleted file mode 100644 index 5f968c68..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/tcp.h +++ /dev/null @@ -1,531 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_TCP_H__ -#define __LWIP_TCP_H__ - -#include "lwip/sys.h" -#include "lwip/mem.h" - -#include "lwip/pbuf.h" -#include "lwip/opt.h" -#include "lwip/ip.h" -#include "lwip/icmp.h" - -#include "lwip/err.h" - -struct tcp_pcb; - -/* Functions for interfacing with TCP: */ - -/* Lower layer interface to TCP: */ -void tcp_init (void); /* Must be called first to - initialize TCP. */ -void tcp_tmr (void); /* Must be called every - TCP_TMR_INTERVAL - ms. (Typically 250 ms). */ -/* Application program's interface: */ -struct tcp_pcb * tcp_new (void); -struct tcp_pcb * tcp_alloc (u8_t prio); - -void tcp_arg (struct tcp_pcb *pcb, void *arg); -void tcp_accept (struct tcp_pcb *pcb, - err_t (* accept)(void *arg, struct tcp_pcb *newpcb, - err_t err)); -void tcp_recv (struct tcp_pcb *pcb, - err_t (* recv)(void *arg, struct tcp_pcb *tpcb, - struct pbuf *p, err_t err)); -void tcp_sent (struct tcp_pcb *pcb, - err_t (* sent)(void *arg, struct tcp_pcb *tpcb, - u16_t len)); -void tcp_poll (struct tcp_pcb *pcb, - err_t (* poll)(void *arg, struct tcp_pcb *tpcb), - u8_t interval); -void tcp_err (struct tcp_pcb *pcb, - void (* err)(void *arg, err_t err)); - -#define tcp_mss(pcb) ((pcb)->mss) -#define tcp_sndbuf(pcb) ((pcb)->snd_buf) - -void tcp_recved (struct tcp_pcb *pcb, u16_t len); -err_t tcp_bind (struct tcp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port); -err_t tcp_connect (struct tcp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port, err_t (* connected)(void *arg, - struct tcp_pcb *tpcb, - err_t err)); -struct tcp_pcb * tcp_listen (struct tcp_pcb *pcb); -void tcp_abort (struct tcp_pcb *pcb); -err_t tcp_close (struct tcp_pcb *pcb); -err_t tcp_write (struct tcp_pcb *pcb, const void *dataptr, u16_t len, - u8_t copy); - -void tcp_setprio (struct tcp_pcb *pcb, u8_t prio); - -#define TCP_PRIO_MIN 1 -#define TCP_PRIO_NORMAL 64 -#define TCP_PRIO_MAX 127 - -/* It is also possible to call these two functions at the right - intervals (instead of calling tcp_tmr()). */ -void tcp_slowtmr (void); -void tcp_fasttmr (void); - - -/* Only used by IP to pass a TCP segment to TCP: */ -void tcp_input (struct pbuf *p, struct netif *inp); -/* Used within the TCP code only: */ -err_t tcp_output (struct tcp_pcb *pcb); -void tcp_rexmit (struct tcp_pcb *pcb); -void tcp_rexmit_rto (struct tcp_pcb *pcb); - - - -#define TCP_SEQ_LT(a,b) ((s32_t)((a)-(b)) < 0) -#define TCP_SEQ_LEQ(a,b) ((s32_t)((a)-(b)) <= 0) -#define TCP_SEQ_GT(a,b) ((s32_t)((a)-(b)) > 0) -#define TCP_SEQ_GEQ(a,b) ((s32_t)((a)-(b)) >= 0) -/* is b<=a<=c? */ -#if 0 /* see bug #10548 */ -#define TCP_SEQ_BETWEEN(a,b,c) ((c)-(b) >= (a)-(b)) -#endif -#define TCP_SEQ_BETWEEN(a,b,c) (TCP_SEQ_GEQ(a,b) && TCP_SEQ_LEQ(a,c)) -#define TCP_FIN 0x01U -#define TCP_SYN 0x02U -#define TCP_RST 0x04U -#define TCP_PSH 0x08U -#define TCP_ACK 0x10U -#define TCP_URG 0x20U -#define TCP_ECE 0x40U -#define TCP_CWR 0x80U - -#define TCP_FLAGS 0x3fU - -/* Length of the TCP header, excluding options. */ -#define TCP_HLEN 20 - -#ifndef TCP_TMR_INTERVAL -#define TCP_TMR_INTERVAL 250 /* The TCP timer interval in - milliseconds. */ -#endif /* TCP_TMR_INTERVAL */ - -#ifndef TCP_FAST_INTERVAL -#define TCP_FAST_INTERVAL TCP_TMR_INTERVAL /* the fine grained timeout in - milliseconds */ -#endif /* TCP_FAST_INTERVAL */ - -#ifndef TCP_SLOW_INTERVAL -#define TCP_SLOW_INTERVAL (2*TCP_TMR_INTERVAL) /* the coarse grained timeout in - milliseconds */ -#endif /* TCP_SLOW_INTERVAL */ - -#define TCP_FIN_WAIT_TIMEOUT 20000 /* milliseconds */ -#define TCP_SYN_RCVD_TIMEOUT 20000 /* milliseconds */ - -#define TCP_OOSEQ_TIMEOUT 6 /* x RTO */ - -#define TCP_MSL 60000 /* The maximum segment lifetime in microseconds */ - -/* - * User-settable options (used with setsockopt). - */ -#define TCP_NODELAY 0x01 /* don't delay send to coalesce packets */ -#define TCP_KEEPALIVE 0x02 /* send KEEPALIVE probes when idle for pcb->keepalive miliseconds */ - -/* Keepalive values */ -#define TCP_KEEPDEFAULT 7200000 /* KEEPALIVE timer in miliseconds */ -#define TCP_KEEPINTVL 75000 /* Time between KEEPALIVE probes in miliseconds */ -#define TCP_KEEPCNT 9 /* Counter for KEEPALIVE probes */ -#define TCP_MAXIDLE TCP_KEEPCNT * TCP_KEEPINTVL /* Maximum KEEPALIVE probe time */ - - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct tcp_hdr { - PACK_STRUCT_FIELD(u16_t src); - PACK_STRUCT_FIELD(u16_t dest); - PACK_STRUCT_FIELD(u32_t seqno); - PACK_STRUCT_FIELD(u32_t ackno); - PACK_STRUCT_FIELD(u16_t _hdrlen_rsvd_flags); - PACK_STRUCT_FIELD(u16_t wnd); - PACK_STRUCT_FIELD(u16_t chksum); - PACK_STRUCT_FIELD(u16_t urgp); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#define TCPH_OFFSET(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) >> 8) -#define TCPH_HDRLEN(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) >> 12) -#define TCPH_FLAGS(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) & TCP_FLAGS) - -#define TCPH_OFFSET_SET(phdr, offset) (phdr)->_hdrlen_rsvd_flags = htons(((offset) << 8) | TCPH_FLAGS(phdr)) -#define TCPH_HDRLEN_SET(phdr, len) (phdr)->_hdrlen_rsvd_flags = htons(((len) << 12) | TCPH_FLAGS(phdr)) -#define TCPH_FLAGS_SET(phdr, flags) (phdr)->_hdrlen_rsvd_flags = htons((ntohs((phdr)->_hdrlen_rsvd_flags) & ~TCP_FLAGS) | (flags)) -#define TCPH_SET_FLAG(phdr, flags ) (phdr)->_hdrlen_rsvd_flags = htons(ntohs((phdr)->_hdrlen_rsvd_flags) | (flags)) -#define TCPH_UNSET_FLAG(phdr, flags) (phdr)->_hdrlen_rsvd_flags = htons(ntohs((phdr)->_hdrlen_rsvd_flags) | (TCPH_FLAGS(phdr) & ~(flags)) ) - -#define TCP_TCPLEN(seg) ((seg)->len + ((TCPH_FLAGS((seg)->tcphdr) & TCP_FIN || \ - TCPH_FLAGS((seg)->tcphdr) & TCP_SYN)? 1: 0)) - -enum tcp_state { - CLOSED = 0, - LISTEN = 1, - SYN_SENT = 2, - SYN_RCVD = 3, - ESTABLISHED = 4, - FIN_WAIT_1 = 5, - FIN_WAIT_2 = 6, - CLOSE_WAIT = 7, - CLOSING = 8, - LAST_ACK = 9, - TIME_WAIT = 10 -}; - -/* the TCP protocol control block */ -struct tcp_pcb { -/** common PCB members */ - IP_PCB; -/** protocol specific PCB members */ - struct tcp_pcb *next; /* for the linked list */ - enum tcp_state state; /* TCP state */ - u8_t prio; - void *callback_arg; - - u16_t local_port; - u16_t remote_port; - - u8_t flags; -#define TF_ACK_DELAY (u8_t)0x01U /* Delayed ACK. */ -#define TF_ACK_NOW (u8_t)0x02U /* Immediate ACK. */ -#define TF_INFR (u8_t)0x04U /* In fast recovery. */ -#define TF_RESET (u8_t)0x08U /* Connection was reset. */ -#define TF_CLOSED (u8_t)0x10U /* Connection was sucessfully closed. */ -#define TF_GOT_FIN (u8_t)0x20U /* Connection was closed by the remote end. */ -#define TF_NODELAY (u8_t)0x40U /* Disable Nagle algorithm */ - - /* receiver variables */ - u32_t rcv_nxt; /* next seqno expected */ - u16_t rcv_wnd; /* receiver window */ - - /* Timers */ - u32_t tmr; - u8_t polltmr, pollinterval; - - /* Retransmission timer. */ - u16_t rtime; - - u16_t mss; /* maximum segment size */ - - /* RTT (round trip time) estimation variables */ - u32_t rttest; /* RTT estimate in 500ms ticks */ - u32_t rtseq; /* sequence number being timed */ - s16_t sa, sv; /* @todo document this */ - - u16_t rto; /* retransmission time-out */ - u8_t nrtx; /* number of retransmissions */ - - /* fast retransmit/recovery */ - u32_t lastack; /* Highest acknowledged seqno. */ - u8_t dupacks; - - /* congestion avoidance/control variables */ - u16_t cwnd; - u16_t ssthresh; - - /* sender variables */ - u32_t snd_nxt, /* next seqno to be sent */ - snd_max, /* Highest seqno sent. */ - snd_wnd, /* sender window */ - snd_wl1, snd_wl2, /* Sequence and acknowledgement numbers of last - window update. */ - snd_lbb; /* Sequence number of next byte to be buffered. */ - - u16_t acked; - - u16_t snd_buf; /* Available buffer space for sending (in bytes). */ - u8_t snd_queuelen; /* Available buffer space for sending (in tcp_segs). */ - - - /* These are ordered by sequence number: */ - struct tcp_seg *unsent; /* Unsent (queued) segments. */ - struct tcp_seg *unacked; /* Sent but unacknowledged segments. */ -#if TCP_QUEUE_OOSEQ - struct tcp_seg *ooseq; /* Received out of sequence segments. */ -#endif /* TCP_QUEUE_OOSEQ */ - -#if LWIP_CALLBACK_API - /* Function to be called when more send buffer space is available. */ - err_t (* sent)(void *arg, struct tcp_pcb *pcb, u16_t space); - - /* Function to be called when (in-sequence) data has arrived. */ - err_t (* recv)(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err); - - /* Function to be called when a connection has been set up. */ - err_t (* connected)(void *arg, struct tcp_pcb *pcb, err_t err); - - /* Function to call when a listener has been connected. */ - err_t (* accept)(void *arg, struct tcp_pcb *newpcb, err_t err); - - /* Function which is called periodically. */ - err_t (* poll)(void *arg, struct tcp_pcb *pcb); - - /* Function to be called whenever a fatal error occurs. */ - void (* errf)(void *arg, err_t err); -#endif /* LWIP_CALLBACK_API */ - - /* idle time before KEEPALIVE is sent */ - u32_t keepalive; - - /* KEEPALIVE counter */ - u8_t keep_cnt; -}; - -struct tcp_pcb_listen { -/* Common members of all PCB types */ - IP_PCB; - -/* Protocol specific PCB members */ - struct tcp_pcb_listen *next; /* for the linked list */ - - /* Even if state is obviously LISTEN this is here for - * field compatibility with tpc_pcb to which it is cast sometimes - * Until a cleaner solution emerges this is here.FIXME - */ - enum tcp_state state; /* TCP state */ - - u8_t prio; - void *callback_arg; - - u16_t local_port; - -#if LWIP_CALLBACK_API - /* Function to call when a listener has been connected. */ - err_t (* accept)(void *arg, struct tcp_pcb *newpcb, err_t err); -#endif /* LWIP_CALLBACK_API */ -}; - -#if LWIP_EVENT_API - -enum lwip_event { - LWIP_EVENT_ACCEPT, - LWIP_EVENT_SENT, - LWIP_EVENT_RECV, - LWIP_EVENT_CONNECTED, - LWIP_EVENT_POLL, - LWIP_EVENT_ERR -}; - -err_t lwip_tcp_event(void *arg, struct tcp_pcb *pcb, - enum lwip_event, - struct pbuf *p, - u16_t size, - err_t err); - -#define TCP_EVENT_ACCEPT(pcb,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ - LWIP_EVENT_ACCEPT, NULL, 0, err) -#define TCP_EVENT_SENT(pcb,space,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ - LWIP_EVENT_SENT, NULL, space, ERR_OK) -#define TCP_EVENT_RECV(pcb,p,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ - LWIP_EVENT_RECV, (p), 0, (err)) -#define TCP_EVENT_CONNECTED(pcb,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ - LWIP_EVENT_CONNECTED, NULL, 0, (err)) -#define TCP_EVENT_POLL(pcb,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ - LWIP_EVENT_POLL, NULL, 0, ERR_OK) -#define TCP_EVENT_ERR(errf,arg,err) lwip_tcp_event((arg), NULL, \ - LWIP_EVENT_ERR, NULL, 0, (err)) -#else /* LWIP_EVENT_API */ -#define TCP_EVENT_ACCEPT(pcb,err,ret) \ - if((pcb)->accept != NULL) \ - (ret = (pcb)->accept((pcb)->callback_arg,(pcb),(err))) -#define TCP_EVENT_SENT(pcb,space,ret) \ - if((pcb)->sent != NULL) \ - (ret = (pcb)->sent((pcb)->callback_arg,(pcb),(space))) -#define TCP_EVENT_RECV(pcb,p,err,ret) \ - if((pcb)->recv != NULL) \ - { ret = (pcb)->recv((pcb)->callback_arg,(pcb),(p),(err)); } else { \ - if (p) pbuf_free(p); } -#define TCP_EVENT_CONNECTED(pcb,err,ret) \ - if((pcb)->connected != NULL) \ - (ret = (pcb)->connected((pcb)->callback_arg,(pcb),(err))) -#define TCP_EVENT_POLL(pcb,ret) \ - if((pcb)->poll != NULL) \ - (ret = (pcb)->poll((pcb)->callback_arg,(pcb))) -#define TCP_EVENT_ERR(errf,arg,err) \ - if((errf) != NULL) \ - (errf)((arg),(err)) -#endif /* LWIP_EVENT_API */ - -/* This structure represents a TCP segment on the unsent and unacked queues */ -struct tcp_seg { - struct tcp_seg *next; /* used when putting segements on a queue */ - struct pbuf *p; /* buffer containing data + TCP header */ - void *dataptr; /* pointer to the TCP data in the pbuf */ - u16_t len; /* the TCP length of this segment */ - struct tcp_hdr *tcphdr; /* the TCP header */ -}; - -/* Internal functions and global variables: */ -struct tcp_pcb *tcp_pcb_copy(struct tcp_pcb *pcb); -void tcp_pcb_purge(struct tcp_pcb *pcb); -void tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb); - -u8_t tcp_segs_free(struct tcp_seg *seg); -u8_t tcp_seg_free(struct tcp_seg *seg); -struct tcp_seg *tcp_seg_copy(struct tcp_seg *seg); - -#define tcp_ack(pcb) if((pcb)->flags & TF_ACK_DELAY) { \ - (pcb)->flags &= ~TF_ACK_DELAY; \ - (pcb)->flags |= TF_ACK_NOW; \ - tcp_output(pcb); \ - } else { \ - (pcb)->flags |= TF_ACK_DELAY; \ - } - -#define tcp_ack_now(pcb) (pcb)->flags |= TF_ACK_NOW; \ - tcp_output(pcb) - -err_t tcp_send_ctrl(struct tcp_pcb *pcb, u8_t flags); -err_t tcp_enqueue(struct tcp_pcb *pcb, void *dataptr, u16_t len, - u8_t flags, u8_t copy, - u8_t *optdata, u8_t optlen); - -void tcp_rexmit_seg(struct tcp_pcb *pcb, struct tcp_seg *seg); - -void tcp_rst(u32_t seqno, u32_t ackno, - struct ip_addr *local_ip, struct ip_addr *remote_ip, - u16_t local_port, u16_t remote_port); - -u32_t tcp_next_iss(void); - -void tcp_keepalive(struct tcp_pcb *pcb); - -extern struct tcp_pcb *tcp_input_pcb; -extern u32_t tcp_ticks; - -#if TCP_DEBUG || TCP_INPUT_DEBUG || TCP_OUTPUT_DEBUG -void tcp_debug_print(struct tcp_hdr *tcphdr); -void tcp_debug_print_flags(u8_t flags); -void tcp_debug_print_state(enum tcp_state s); -void tcp_debug_print_pcbs(void); -s16_t tcp_pcbs_sane(void); -#else -# define tcp_debug_print(tcphdr) -# define tcp_debug_print_flags(flags) -# define tcp_debug_print_state(s) -# define tcp_debug_print_pcbs() -# define tcp_pcbs_sane() 1 -#endif /* TCP_DEBUG */ - -#if NO_SYS -#define tcp_timer_needed() -#else -void tcp_timer_needed(void); -#endif - -/* The TCP PCB lists. */ -union tcp_listen_pcbs_t { /* List of all TCP PCBs in LISTEN state. */ - struct tcp_pcb_listen *listen_pcbs; - struct tcp_pcb *pcbs; -}; -extern union tcp_listen_pcbs_t tcp_listen_pcbs; -extern struct tcp_pcb *tcp_active_pcbs; /* List of all TCP PCBs that are in a - state in which they accept or send - data. */ -extern struct tcp_pcb *tcp_tw_pcbs; /* List of all TCP PCBs in TIME-WAIT. */ - -extern struct tcp_pcb *tcp_tmp_pcb; /* Only used for temporary storage. */ - -/* Axioms about the above lists: - 1) Every TCP PCB that is not CLOSED is in one of the lists. - 2) A PCB is only in one of the lists. - 3) All PCBs in the tcp_listen_pcbs list is in LISTEN state. - 4) All PCBs in the tcp_tw_pcbs list is in TIME-WAIT state. -*/ - -/* Define two macros, TCP_REG and TCP_RMV that registers a TCP PCB - with a PCB list or removes a PCB from a list, respectively. */ -#if 0 -#define TCP_REG(pcbs, npcb) do {\ - LWIP_DEBUGF(TCP_DEBUG, ("TCP_REG %p local port %d\n", npcb, npcb->local_port)); \ - for(tcp_tmp_pcb = *pcbs; \ - tcp_tmp_pcb != NULL; \ - tcp_tmp_pcb = tcp_tmp_pcb->next) { \ - LWIP_ASSERT("TCP_REG: already registered\n", tcp_tmp_pcb != npcb); \ - } \ - LWIP_ASSERT("TCP_REG: pcb->state != CLOSED", npcb->state != CLOSED); \ - npcb->next = *pcbs; \ - LWIP_ASSERT("TCP_REG: npcb->next != npcb", npcb->next != npcb); \ - *(pcbs) = npcb; \ - LWIP_ASSERT("TCP_RMV: tcp_pcbs sane", tcp_pcbs_sane()); \ - tcp_timer_needed(); \ - } while(0) -#define TCP_RMV(pcbs, npcb) do { \ - LWIP_ASSERT("TCP_RMV: pcbs != NULL", *pcbs != NULL); \ - LWIP_DEBUGF(TCP_DEBUG, ("TCP_RMV: removing %p from %p\n", npcb, *pcbs)); \ - if(*pcbs == npcb) { \ - *pcbs = (*pcbs)->next; \ - } else for(tcp_tmp_pcb = *pcbs; tcp_tmp_pcb != NULL; tcp_tmp_pcb = tcp_tmp_pcb->next) { \ - if(tcp_tmp_pcb->next != NULL && tcp_tmp_pcb->next == npcb) { \ - tcp_tmp_pcb->next = npcb->next; \ - break; \ - } \ - } \ - npcb->next = NULL; \ - LWIP_ASSERT("TCP_RMV: tcp_pcbs sane", tcp_pcbs_sane()); \ - LWIP_DEBUGF(TCP_DEBUG, ("TCP_RMV: removed %p from %p\n", npcb, *pcbs)); \ - } while(0) - -#else /* LWIP_DEBUG */ -#define TCP_REG(pcbs, npcb) do { \ - npcb->next = *pcbs; \ - *(pcbs) = npcb; \ - tcp_timer_needed(); \ - } while(0) -#define TCP_RMV(pcbs, npcb) do { \ - if(*(pcbs) == npcb) { \ - (*(pcbs)) = (*pcbs)->next; \ - } else for(tcp_tmp_pcb = *pcbs; tcp_tmp_pcb != NULL; tcp_tmp_pcb = tcp_tmp_pcb->next) { \ - if(tcp_tmp_pcb->next != NULL && tcp_tmp_pcb->next == npcb) { \ - tcp_tmp_pcb->next = npcb->next; \ - break; \ - } \ - } \ - npcb->next = NULL; \ - } while(0) -#endif /* LWIP_DEBUG */ -#endif /* __LWIP_TCP_H__ */ - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/tcpip.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/tcpip.h deleted file mode 100644 index 316ae4fc..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/tcpip.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_TCPIP_H__ -#define __LWIP_TCPIP_H__ - -#include "lwip/api_msg.h" -#include "lwip/pbuf.h" - -void tcpip_init(void (* tcpip_init_done)(void *), void *arg); -void tcpip_apimsg(struct api_msg *apimsg); -err_t tcpip_input(struct pbuf *p, struct netif *inp); -err_t tcpip_callback(void (*f)(void *ctx), void *ctx); - -void tcpip_tcp_timer_needed(void); - -enum tcpip_msg_type { - TCPIP_MSG_API, - TCPIP_MSG_INPUT, - TCPIP_MSG_CALLBACK -}; - -struct tcpip_msg { - enum tcpip_msg_type type; - sys_sem_t *sem; - union { - struct api_msg *apimsg; - struct { - struct pbuf *p; - struct netif *netif; - } inp; - struct { - void (*f)(void *ctx); - void *ctx; - } cb; - } msg; -}; - - -#endif /* __LWIP_TCPIP_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/udp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/udp.h deleted file mode 100644 index ede04745..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/lwip/udp.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __LWIP_UDP_H__ -#define __LWIP_UDP_H__ - -#include "lwip/arch.h" - -#include "lwip/pbuf.h" -#include "lwip/inet.h" -#include "lwip/ip.h" - -#define UDP_HLEN 8 - -struct udp_hdr { - PACK_STRUCT_FIELD(u16_t src); - PACK_STRUCT_FIELD(u16_t dest); /* src/dest UDP ports */ - PACK_STRUCT_FIELD(u16_t len); - PACK_STRUCT_FIELD(u16_t chksum); -} PACK_STRUCT_STRUCT; - -#define UDP_FLAGS_NOCHKSUM 0x01U -#define UDP_FLAGS_UDPLITE 0x02U -#define UDP_FLAGS_CONNECTED 0x04U - -struct udp_pcb { -/* Common members of all PCB types */ - IP_PCB; - -/* Protocol specific PCB members */ - - struct udp_pcb *next; - - u8_t flags; - u16_t local_port, remote_port; - - u16_t chksum_len; - - void (* recv)(void *arg, struct udp_pcb *pcb, struct pbuf *p, - struct ip_addr *addr, u16_t port); - void *recv_arg; -}; - -/* The following functions is the application layer interface to the - UDP code. */ -struct udp_pcb * udp_new (void); -void udp_remove (struct udp_pcb *pcb); -err_t udp_bind (struct udp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port); -err_t udp_connect (struct udp_pcb *pcb, struct ip_addr *ipaddr, - u16_t port); -void udp_disconnect (struct udp_pcb *pcb); -void udp_recv (struct udp_pcb *pcb, - void (* recv)(void *arg, struct udp_pcb *upcb, - struct pbuf *p, - struct ip_addr *addr, - u16_t port), - void *recv_arg); -err_t udp_sendto (struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *dst_ip, u16_t dst_port); -err_t udp_send (struct udp_pcb *pcb, struct pbuf *p); - -#define udp_flags(pcb) ((pcb)->flags) -#define udp_setflags(pcb, f) ((pcb)->flags = (f)) - -/* The following functions are the lower layer interface to UDP. */ -void udp_input (struct pbuf *p, struct netif *inp); -void udp_init (void); - -#if UDP_DEBUG -void udp_debug_print(struct udp_hdr *udphdr); -#else -#define udp_debug_print(udphdr) -#endif -#endif /* __LWIP_UDP_H__ */ - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/netif/etharp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/netif/etharp.h deleted file mode 100644 index 08437afe..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/netif/etharp.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * Copyright (c) 2003-2004 Leon Woestenberg - * Copyright (c) 2003-2004 Axon Digital Design B.V., The Netherlands. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -#ifndef __NETIF_ETHARP_H__ -#define __NETIF_ETHARP_H__ - -#ifndef ETH_PAD_SIZE -#define ETH_PAD_SIZE 0 -#endif - -#include "lwip/pbuf.h" -#include "lwip/ip_addr.h" -#include "lwip/netif.h" -#include "lwip/ip.h" - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct eth_addr { - PACK_STRUCT_FIELD(u8_t addr[6]); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct eth_hdr { -#if ETH_PAD_SIZE - PACK_STRUCT_FIELD(u8_t padding[ETH_PAD_SIZE]); -#endif - PACK_STRUCT_FIELD(struct eth_addr dest); - PACK_STRUCT_FIELD(struct eth_addr src); - PACK_STRUCT_FIELD(u16_t type); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -/** the ARP message */ -struct etharp_hdr { - PACK_STRUCT_FIELD(struct eth_hdr ethhdr); - PACK_STRUCT_FIELD(u16_t hwtype); - PACK_STRUCT_FIELD(u16_t proto); - PACK_STRUCT_FIELD(u16_t _hwlen_protolen); - PACK_STRUCT_FIELD(u16_t opcode); - PACK_STRUCT_FIELD(struct eth_addr shwaddr); - PACK_STRUCT_FIELD(struct ip_addr2 sipaddr); - PACK_STRUCT_FIELD(struct eth_addr dhwaddr); - PACK_STRUCT_FIELD(struct ip_addr2 dipaddr); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/bpstruct.h" -#endif -PACK_STRUCT_BEGIN -struct ethip_hdr { - PACK_STRUCT_FIELD(struct eth_hdr eth); - PACK_STRUCT_FIELD(struct ip_hdr ip); -} PACK_STRUCT_STRUCT; -PACK_STRUCT_END -#ifdef PACK_STRUCT_USE_INCLUDES -# include "arch/epstruct.h" -#endif - -/** 5 seconds period */ -#define ARP_TMR_INTERVAL 5000 - -#define ETHTYPE_ARP 0x0806 -#define ETHTYPE_IP 0x0800 - -void etharp_init(void); -void etharp_tmr(void); -void etharp_ip_input(struct netif *netif, struct pbuf *p); -void etharp_arp_input(struct netif *netif, struct eth_addr *ethaddr, - struct pbuf *p); -err_t etharp_output(struct netif *netif, struct ip_addr *ipaddr, - struct pbuf *q); -err_t etharp_query(struct netif *netif, struct ip_addr *ipaddr, struct pbuf *q); -err_t etharp_request(struct netif *netif, struct ip_addr *ipaddr); - -#endif /* __NETIF_ARP_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/netif/loopif.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/netif/loopif.h deleted file mode 100644 index 97b3c676..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/netif/loopif.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __NETIF_LOOPIF_H__ -#define __NETIF_LOOPIF_H__ - -#include "lwip/netif.h" - -err_t loopif_init(struct netif *netif); - -#endif /* __NETIF_LOOPIF_H__ */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/netif/slipif.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/netif/slipif.h deleted file mode 100644 index bf70046a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/include/netif/slipif.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (c) 2001, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#ifndef __NETIF_SLIPIF_H__ -#define __NETIF_SLIPIF_H__ - -#include "lwip/netif.h" - -err_t slipif_init(struct netif * netif); - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/FILES b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/FILES deleted file mode 100644 index 825d4071..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/FILES +++ /dev/null @@ -1,27 +0,0 @@ -This directory contains generic network interface device drivers that -do not contain any hardware or architecture specific code. The files -are: - -etharp.c - Implements the ARP (Address Resolution Protocol) over - Ethernet. The code in this file should be used together with - Ethernet device drivers. Note that this module has been - largely made Ethernet independent so you should be able to - adapt this for other link layers (such as Firewire). - -ethernetif.c - An example of how an Ethernet device driver could look. This - file can be used as a "skeleton" for developing new Ethernet - network device drivers. It uses the etharp.c ARP code. - -loopif.c - An example network interface that shows how a "loopback" - interface would work. This is not really intended for actual - use, but as a very basic example of how initialization and - output functions work. - -slipif.c - A generic implementation of the SLIP (Serial Line IP) - protocol. It requires a sio (serial I/O) module to work. - -ppp/ Point-to-Point Protocol stack diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/etharp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/etharp.c deleted file mode 100644 index 7765046d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/etharp.c +++ /dev/null @@ -1,831 +0,0 @@ -/** - * @file - * Address Resolution Protocol module for IP over Ethernet - * - * Functionally, ARP is divided into two parts. The first maps an IP address - * to a physical address when sending a packet, and the second part answers - * requests from other machines for our physical address. - * - * This implementation complies with RFC 826 (Ethernet ARP). It supports - * Gratuitious ARP from RFC3220 (IP Mobility Support for IPv4) section 4.6 - * if an interface calls etharp_query(our_netif, its_ip_addr, NULL) upon - * address change. - */ - -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * Copyright (c) 2003-2004 Leon Woestenberg - * Copyright (c) 2003-2004 Axon Digital Design B.V., The Netherlands. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - */ - -#include "lwip/opt.h" -#include "lwip/inet.h" -#include "netif/etharp.h" -#include "lwip/ip.h" -#include "lwip/stats.h" - -/* ARP needs to inform DHCP of any ARP replies? */ -#if (LWIP_DHCP && DHCP_DOES_ARP_CHECK) -# include "lwip/dhcp.h" -#endif - -/** the time an ARP entry stays valid after its last update, - * (240 * 5) seconds = 20 minutes. - */ -#define ARP_MAXAGE 240 -/** the time an ARP entry stays pending after first request, - * (2 * 5) seconds = 10 seconds. - * - * @internal Keep this number at least 2, otherwise it might - * run out instantly if the timeout occurs directly after a request. - */ -#define ARP_MAXPENDING 2 - -#define HWTYPE_ETHERNET 1 - -/** ARP message types */ -#define ARP_REQUEST 1 -#define ARP_REPLY 2 - -#define ARPH_HWLEN(hdr) (ntohs((hdr)->_hwlen_protolen) >> 8) -#define ARPH_PROTOLEN(hdr) (ntohs((hdr)->_hwlen_protolen) & 0xff) - -#define ARPH_HWLEN_SET(hdr, len) (hdr)->_hwlen_protolen = htons(ARPH_PROTOLEN(hdr) | ((len) << 8)) -#define ARPH_PROTOLEN_SET(hdr, len) (hdr)->_hwlen_protolen = htons((len) | (ARPH_HWLEN(hdr) << 8)) - -enum etharp_state { - ETHARP_STATE_EMPTY, - ETHARP_STATE_PENDING, - ETHARP_STATE_STABLE, - /** @internal transitional state used in etharp_tmr() for convenience*/ - ETHARP_STATE_EXPIRED -}; - -struct etharp_entry { -#if ARP_QUEUEING - /** - * Pointer to queue of pending outgoing packets on this ARP entry. - */ - struct pbuf *p; -#endif - struct ip_addr ipaddr; - struct eth_addr ethaddr; - enum etharp_state state; - u8_t ctime; -}; - -static const struct eth_addr ethbroadcast = {{0xff,0xff,0xff,0xff,0xff,0xff}}; -static struct etharp_entry arp_table[ARP_TABLE_SIZE]; - -/** - * Try hard to create a new entry - we want the IP address to appear in - * the cache (even if this means removing an active entry or so). */ -#define ETHARP_TRY_HARD 1 - -static s8_t find_entry(struct ip_addr *ipaddr, u8_t flags); -static err_t update_arp_entry(struct netif *netif, struct ip_addr *ipaddr, struct eth_addr *ethaddr, u8_t flags); -/** - * Initializes ARP module. - */ -void -etharp_init(void) -{ - u8_t i; - /* clear ARP entries */ - for(i = 0; i < ARP_TABLE_SIZE; ++i) { - arp_table[i].state = ETHARP_STATE_EMPTY; -#if ARP_QUEUEING - arp_table[i].p = NULL; -#endif - arp_table[i].ctime = 0; - } -} - -/** - * Clears expired entries in the ARP table. - * - * This function should be called every ETHARP_TMR_INTERVAL microseconds (5 seconds), - * in order to expire entries in the ARP table. - */ -void -etharp_tmr(void) -{ - u8_t i; - - LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n")); - /* remove expired entries from the ARP table */ - for (i = 0; i < ARP_TABLE_SIZE; ++i) { - arp_table[i].ctime++; - /* stable entry? */ - if ((arp_table[i].state == ETHARP_STATE_STABLE) && - /* entry has become old? */ - (arp_table[i].ctime >= ARP_MAXAGE)) { - LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired stable entry %"U16_F".\n", (u16_t)i)); - arp_table[i].state = ETHARP_STATE_EXPIRED; - /* pending entry? */ - } else if (arp_table[i].state == ETHARP_STATE_PENDING) { - /* entry unresolved/pending for too long? */ - if (arp_table[i].ctime >= ARP_MAXPENDING) { - LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired pending entry %"U16_F".\n", (u16_t)i)); - arp_table[i].state = ETHARP_STATE_EXPIRED; -#if ARP_QUEUEING - } else if (arp_table[i].p != NULL) { - /* resend an ARP query here */ -#endif - } - } - /* clean up entries that have just been expired */ - if (arp_table[i].state == ETHARP_STATE_EXPIRED) { -#if ARP_QUEUEING - /* and empty packet queue */ - if (arp_table[i].p != NULL) { - /* remove all queued packets */ - LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].p))); - pbuf_free(arp_table[i].p); - arp_table[i].p = NULL; - } -#endif - /* recycle entry for re-use */ - arp_table[i].state = ETHARP_STATE_EMPTY; - } - } -} - -/** - * Search the ARP table for a matching or new entry. - * - * If an IP address is given, return a pending or stable ARP entry that matches - * the address. If no match is found, create a new entry with this address set, - * but in state ETHARP_EMPTY. The caller must check and possibly change the - * state of the returned entry. - * - * If ipaddr is NULL, return a initialized new entry in state ETHARP_EMPTY. - * - * In all cases, attempt to create new entries from an empty entry. If no - * empty entries are available and ETHARP_TRY_HARD flag is set, recycle - * old entries. Heuristic choose the least important entry for recycling. - * - * @param ipaddr IP address to find in ARP cache, or to add if not found. - * @param flags - * - ETHARP_TRY_HARD: Try hard to create a entry by allowing recycling of - * active (stable or pending) entries. - * - * @return The ARP entry index that matched or is created, ERR_MEM if no - * entry is found or could be recycled. - */ -static s8_t find_entry(struct ip_addr *ipaddr, u8_t flags) -{ - s8_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE; - s8_t empty = ARP_TABLE_SIZE; - u8_t i = 0, age_pending = 0, age_stable = 0; -#if ARP_QUEUEING - /* oldest entry with packets on queue */ - s8_t old_queue = ARP_TABLE_SIZE; - /* its age */ - u8_t age_queue = 0; -#endif - - /** - * a) do a search through the cache, remember candidates - * b) select candidate entry - * c) create new entry - */ - - /* a) in a single search sweep, do all of this - * 1) remember the first empty entry (if any) - * 2) remember the oldest stable entry (if any) - * 3) remember the oldest pending entry without queued packets (if any) - * 4) remember the oldest pending entry with queued packets (if any) - * 5) search for a matching IP entry, either pending or stable - * until 5 matches, or all entries are searched for. - */ - - for (i = 0; i < ARP_TABLE_SIZE; ++i) { - /* no empty entry found yet and now we do find one? */ - if ((empty == ARP_TABLE_SIZE) && (arp_table[i].state == ETHARP_STATE_EMPTY)) { - LWIP_DEBUGF(ETHARP_DEBUG, ("find_entry: found empty entry %"U16_F"\n", (u16_t)i)); - /* remember first empty entry */ - empty = i; - } - /* pending entry? */ - else if (arp_table[i].state == ETHARP_STATE_PENDING) { - /* if given, does IP address match IP address in ARP entry? */ - if (ipaddr && ip_addr_cmp(ipaddr, &arp_table[i].ipaddr)) { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("find_entry: found matching pending entry %"U16_F"\n", (u16_t)i)); - /* found exact IP address match, simply bail out */ - return i; -#if ARP_QUEUEING - /* pending with queued packets? */ - } else if (arp_table[i].p != NULL) { - if (arp_table[i].ctime >= age_queue) { - old_queue = i; - age_queue = arp_table[i].ctime; - } -#endif - /* pending without queued packets? */ - } else { - if (arp_table[i].ctime >= age_pending) { - old_pending = i; - age_pending = arp_table[i].ctime; - } - } - } - /* stable entry? */ - else if (arp_table[i].state == ETHARP_STATE_STABLE) { - /* if given, does IP address match IP address in ARP entry? */ - if (ipaddr && ip_addr_cmp(ipaddr, &arp_table[i].ipaddr)) { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("find_entry: found matching stable entry %"U16_F"\n", (u16_t)i)); - /* found exact IP address match, simply bail out */ - return i; - /* remember entry with oldest stable entry in oldest, its age in maxtime */ - } else if (arp_table[i].ctime >= age_stable) { - old_stable = i; - age_stable = arp_table[i].ctime; - } - } - } - /* { we have no match } => try to create a new entry */ - - /* no empty entry found and not allowed to recycle? */ - if ((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_TRY_HARD) == 0)) - { - return (s8_t)ERR_MEM; - } - - /* b) choose the least destructive entry to recycle: - * 1) empty entry - * 2) oldest stable entry - * 3) oldest pending entry without queued packets - * 4) oldest pending entry without queued packets - * - * { ETHARP_TRY_HARD is set at this point } - */ - - /* 1) empty entry available? */ - if (empty < ARP_TABLE_SIZE) { - i = empty; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("find_entry: selecting empty entry %"U16_F"\n", (u16_t)i)); - } - /* 2) found recyclable stable entry? */ - else if (old_stable < ARP_TABLE_SIZE) { - /* recycle oldest stable*/ - i = old_stable; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("find_entry: selecting oldest stable entry %"U16_F"\n", (u16_t)i)); -#if ARP_QUEUEING - /* no queued packets should exist on stable entries */ - LWIP_ASSERT("arp_table[i].p == NULL", arp_table[i].p == NULL); -#endif - /* 3) found recyclable pending entry without queued packets? */ - } else if (old_pending < ARP_TABLE_SIZE) { - /* recycle oldest pending */ - i = old_pending; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("find_entry: selecting oldest pending entry %"U16_F" (without queue)\n", (u16_t)i)); -#if ARP_QUEUEING - /* 4) found recyclable pending entry with queued packets? */ - } else if (old_queue < ARP_TABLE_SIZE) { - /* recycle oldest pending */ - i = old_queue; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("find_entry: selecting oldest pending entry %"U16_F", freeing packet queue %p\n", (u16_t)i, (void *)(arp_table[i].p))); - pbuf_free(arp_table[i].p); - arp_table[i].p = NULL; -#endif - /* no empty or recyclable entries found */ - } else { - return (s8_t)ERR_MEM; - } - - /* { empty or recyclable entry found } */ - LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE); - - /* recycle entry (no-op for an already empty entry) */ - arp_table[i].state = ETHARP_STATE_EMPTY; - - /* IP address given? */ - if (ipaddr != NULL) { - /* set IP address */ - ip_addr_set(&arp_table[i].ipaddr, ipaddr); - } - arp_table[i].ctime = 0; - return (err_t)i; -} - -/** - * Update (or insert) a IP/MAC address pair in the ARP cache. - * - * If a pending entry is resolved, any queued packets will be sent - * at this point. - * - * @param ipaddr IP address of the inserted ARP entry. - * @param ethaddr Ethernet address of the inserted ARP entry. - * @param flags Defines behaviour: - * - ETHARP_TRY_HARD Allows ARP to insert this as a new item. If not specified, - * only existing ARP entries will be updated. - * - * @return - * - ERR_OK Succesfully updated ARP cache. - * - ERR_MEM If we could not add a new ARP entry when ETHARP_TRY_HARD was set. - * - ERR_ARG Non-unicast address given, those will not appear in ARP cache. - * - * @see pbuf_free() - */ -static err_t -update_arp_entry(struct netif *netif, struct ip_addr *ipaddr, struct eth_addr *ethaddr, u8_t flags) -{ - s8_t i, k; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE | 3, ("update_arp_entry()\n")); - LWIP_ASSERT("netif->hwaddr_len != 0", netif->hwaddr_len != 0); - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n", - ip4_addr1(ipaddr), ip4_addr2(ipaddr), ip4_addr3(ipaddr), ip4_addr4(ipaddr), - ethaddr->addr[0], ethaddr->addr[1], ethaddr->addr[2], - ethaddr->addr[3], ethaddr->addr[4], ethaddr->addr[5])); - /* non-unicast address? */ - if (ip_addr_isany(ipaddr) || - ip_addr_isbroadcast(ipaddr, netif) || - ip_addr_ismulticast(ipaddr)) { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("update_arp_entry: will not add non-unicast IP address to ARP cache\n")); - return ERR_ARG; - } - /* find or create ARP entry */ - i = find_entry(ipaddr, flags); - /* bail out if no entry could be found */ - if (i < 0) return (err_t)i; - - /* mark it stable */ - arp_table[i].state = ETHARP_STATE_STABLE; - - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("update_arp_entry: updating stable entry %"S16_F"\n", (s16_t)i)); - /* update address */ - for (k = 0; k < netif->hwaddr_len; ++k) { - arp_table[i].ethaddr.addr[k] = ethaddr->addr[k]; - } - /* reset time stamp */ - arp_table[i].ctime = 0; -/* this is where we will send out queued packets! */ -#if ARP_QUEUEING - while (arp_table[i].p != NULL) { - /* get the first packet on the queue */ - struct pbuf *p = arp_table[i].p; - /* Ethernet header */ - struct eth_hdr *ethhdr = p->payload; - /* remember (and reference) remainder of queue */ - /* note: this will also terminate the p pbuf chain */ - arp_table[i].p = pbuf_dequeue(p); - /* fill-in Ethernet header */ - for (k = 0; k < netif->hwaddr_len; ++k) { - ethhdr->dest.addr[k] = ethaddr->addr[k]; - ethhdr->src.addr[k] = netif->hwaddr[k]; - } - ethhdr->type = htons(ETHTYPE_IP); - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("update_arp_entry: sending queued IP packet %p.\n", (void *)p)); - /* send the queued IP packet */ - netif->linkoutput(netif, p); - /* free the queued IP packet */ - pbuf_free(p); - } -#endif - return ERR_OK; -} - -/** - * Updates the ARP table using the given IP packet. - * - * Uses the incoming IP packet's source address to update the - * ARP cache for the local network. The function does not alter - * or free the packet. This function must be called before the - * packet p is passed to the IP layer. - * - * @param netif The lwIP network interface on which the IP packet pbuf arrived. - * @param pbuf The IP packet that arrived on netif. - * - * @return NULL - * - * @see pbuf_free() - */ -void -etharp_ip_input(struct netif *netif, struct pbuf *p) -{ - struct ethip_hdr *hdr; - LWIP_ASSERT("netif != NULL", netif != NULL); - /* Only insert an entry if the source IP address of the - incoming IP packet comes from a host on the local network. */ - hdr = p->payload; - /* source is not on the local network? */ - if (!ip_addr_netcmp(&(hdr->ip.src), &(netif->ip_addr), &(netif->netmask))) { - /* do nothing */ - return; - } - - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_ip_input: updating ETHARP table.\n")); - /* update ARP table */ - /* @todo We could use ETHARP_TRY_HARD if we think we are going to talk - * back soon (for example, if the destination IP address is ours. */ - update_arp_entry(netif, &(hdr->ip.src), &(hdr->eth.src), 0); -} - - -/** - * Responds to ARP requests to us. Upon ARP replies to us, add entry to cache - * send out queued IP packets. Updates cache with snooped address pairs. - * - * Should be called for incoming ARP packets. The pbuf in the argument - * is freed by this function. - * - * @param netif The lwIP network interface on which the ARP packet pbuf arrived. - * @param pbuf The ARP packet that arrived on netif. Is freed by this function. - * @param ethaddr Ethernet address of netif. - * - * @return NULL - * - * @see pbuf_free() - */ -void -etharp_arp_input(struct netif *netif, struct eth_addr *ethaddr, struct pbuf *p) -{ - struct etharp_hdr *hdr; - /* these are aligned properly, whereas the ARP header fields might not be */ - struct ip_addr sipaddr, dipaddr; - u8_t i; - u8_t for_us; - - LWIP_ASSERT("netif != NULL", netif != NULL); - - /* drop short ARP packets */ - if (p->tot_len < sizeof(struct etharp_hdr)) { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE | 1, ("etharp_arp_input: packet dropped, too short (%"S16_F"/%"S16_F")\n", p->tot_len, sizeof(struct etharp_hdr))); - pbuf_free(p); - return; - } - - hdr = p->payload; - - /* get aligned copies of addresses */ - *(struct ip_addr2 *)&sipaddr = hdr->sipaddr; - *(struct ip_addr2 *)&dipaddr = hdr->dipaddr; - - /* this interface is not configured? */ - if (netif->ip_addr.addr == 0) { - for_us = 0; - } else { - /* ARP packet directed to us? */ - for_us = ip_addr_cmp(&dipaddr, &(netif->ip_addr)); - } - - /* ARP message directed to us? */ - if (for_us) { - /* add IP address in ARP cache; assume requester wants to talk to us. - * can result in directly sending the queued packets for this host. */ - update_arp_entry(netif, &sipaddr, &(hdr->shwaddr), ETHARP_TRY_HARD); - /* ARP message not directed to us? */ - } else { - /* update the source IP address in the cache, if present */ - update_arp_entry(netif, &sipaddr, &(hdr->shwaddr), 0); - } - - /* now act on the message itself */ - switch (htons(hdr->opcode)) { - /* ARP request? */ - case ARP_REQUEST: - /* ARP request. If it asked for our address, we send out a - * reply. In any case, we time-stamp any existing ARP entry, - * and possiby send out an IP packet that was queued on it. */ - - LWIP_DEBUGF (ETHARP_DEBUG | DBG_TRACE, ("etharp_arp_input: incoming ARP request\n")); - /* ARP request for our address? */ - if (for_us) { - - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_arp_input: replying to ARP request for our IP address\n")); - /* re-use pbuf to send ARP reply */ - hdr->opcode = htons(ARP_REPLY); - - hdr->dipaddr = hdr->sipaddr; - hdr->sipaddr = *(struct ip_addr2 *)&netif->ip_addr; - - for(i = 0; i < netif->hwaddr_len; ++i) { - hdr->dhwaddr.addr[i] = hdr->shwaddr.addr[i]; - hdr->shwaddr.addr[i] = ethaddr->addr[i]; - hdr->ethhdr.dest.addr[i] = hdr->dhwaddr.addr[i]; - hdr->ethhdr.src.addr[i] = ethaddr->addr[i]; - } - - hdr->hwtype = htons(HWTYPE_ETHERNET); - ARPH_HWLEN_SET(hdr, netif->hwaddr_len); - - hdr->proto = htons(ETHTYPE_IP); - ARPH_PROTOLEN_SET(hdr, sizeof(struct ip_addr)); - - hdr->ethhdr.type = htons(ETHTYPE_ARP); - /* return ARP reply */ - netif->linkoutput(netif, p); - /* we are not configured? */ - } else if (netif->ip_addr.addr == 0) { - /* { for_us == 0 and netif->ip_addr.addr == 0 } */ - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_arp_input: we are unconfigured, ARP request ignored.\n")); - /* request was not directed to us */ - } else { - /* { for_us == 0 and netif->ip_addr.addr != 0 } */ - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_arp_input: ARP request was not for us.\n")); - } - break; - case ARP_REPLY: - /* ARP reply. We already updated the ARP cache earlier. */ - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_arp_input: incoming ARP reply\n")); -#if (LWIP_DHCP && DHCP_DOES_ARP_CHECK) - /* DHCP wants to know about ARP replies from any host with an - * IP address also offered to us by the DHCP server. We do not - * want to take a duplicate IP address on a single network. - * @todo How should we handle redundant (fail-over) interfaces? - * */ - dhcp_arp_reply(netif, &sipaddr); -#endif - break; - default: - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_arp_input: ARP unknown opcode type %"S16_F"\n", htons(hdr->opcode))); - break; - } - /* free ARP packet */ - pbuf_free(p); -} - -/** - * Resolve and fill-in Ethernet address header for outgoing packet. - * - * For IP multicast and broadcast, corresponding Ethernet addresses - * are selected and the packet is transmitted on the link. - * - * For unicast addresses, the packet is submitted to etharp_query(). In - * case the IP address is outside the local network, the IP address of - * the gateway is used. - * - * @param netif The lwIP network interface which the IP packet will be sent on. - * @param ipaddr The IP address of the packet destination. - * @param pbuf The pbuf(s) containing the IP packet to be sent. - * - * @return - * - ERR_RTE No route to destination (no gateway to external networks), - * or the return type of either etharp_query() or netif->linkoutput(). - */ -err_t -etharp_output(struct netif *netif, struct ip_addr *ipaddr, struct pbuf *q) -{ - struct eth_addr *dest, *srcaddr, mcastaddr; - struct eth_hdr *ethhdr; - u8_t i; - - /* make room for Ethernet header - should not fail */ - if (pbuf_header(q, sizeof(struct eth_hdr)) != 0) { - /* bail out */ - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE | 2, ("etharp_output: could not allocate room for header.\n")); - LINK_STATS_INC(link.lenerr); - return ERR_BUF; - } - - /* assume unresolved Ethernet address */ - dest = NULL; - /* Determine on destination hardware address. Broadcasts and multicasts - * are special, other IP addresses are looked up in the ARP table. */ - - /* broadcast destination IP address? */ - if (ip_addr_isbroadcast(ipaddr, netif)) { - /* broadcast on Ethernet also */ - dest = (struct eth_addr *)ðbroadcast; - /* multicast destination IP address? */ - } else if (ip_addr_ismulticast(ipaddr)) { - /* Hash IP multicast address to MAC address.*/ - mcastaddr.addr[0] = 0x01; - mcastaddr.addr[1] = 0x00; - mcastaddr.addr[2] = 0x5e; - mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f; - mcastaddr.addr[4] = ip4_addr3(ipaddr); - mcastaddr.addr[5] = ip4_addr4(ipaddr); - /* destination Ethernet address is multicast */ - dest = &mcastaddr; - /* unicast destination IP address? */ - } else { - /* outside local network? */ - if (!ip_addr_netcmp(ipaddr, &(netif->ip_addr), &(netif->netmask))) { - /* interface has default gateway? */ - if (netif->gw.addr != 0) { - /* send to hardware address of default gateway IP address */ - ipaddr = &(netif->gw); - /* no default gateway available */ - } else { - /* no route to destination error (default gateway missing) */ - return ERR_RTE; - } - } - /* queue on destination Ethernet address belonging to ipaddr */ - return etharp_query(netif, ipaddr, q); - } - - /* continuation for multicast/broadcast destinations */ - /* obtain source Ethernet address of the given interface */ - srcaddr = (struct eth_addr *)netif->hwaddr; - ethhdr = q->payload; - for (i = 0; i < netif->hwaddr_len; i++) { - ethhdr->dest.addr[i] = dest->addr[i]; - ethhdr->src.addr[i] = srcaddr->addr[i]; - } - ethhdr->type = htons(ETHTYPE_IP); - /* send packet directly on the link */ - return netif->linkoutput(netif, q); -} - -/** - * Send an ARP request for the given IP address and/or queue a packet. - * - * If the IP address was not yet in the cache, a pending ARP cache entry - * is added and an ARP request is sent for the given address. The packet - * is queued on this entry. - * - * If the IP address was already pending in the cache, a new ARP request - * is sent for the given address. The packet is queued on this entry. - * - * If the IP address was already stable in the cache, and a packet is - * given, it is directly sent and no ARP request is sent out. - * - * If the IP address was already stable in the cache, and no packet is - * given, an ARP request is sent out. - * - * @param netif The lwIP network interface on which ipaddr - * must be queried for. - * @param ipaddr The IP address to be resolved. - * @param q If non-NULL, a pbuf that must be delivered to the IP address. - * q is not freed by this function. - * - * @return - * - ERR_BUF Could not make room for Ethernet header. - * - ERR_MEM Hardware address unknown, and no more ARP entries available - * to query for address or queue the packet. - * - ERR_MEM Could not queue packet due to memory shortage. - * - ERR_RTE No route to destination (no gateway to external networks). - * - ERR_ARG Non-unicast address given, those will not appear in ARP cache. - * - */ -err_t etharp_query(struct netif *netif, struct ip_addr *ipaddr, struct pbuf *q) -{ - struct eth_addr * srcaddr = (struct eth_addr *)netif->hwaddr; - err_t result = ERR_MEM; - s8_t i; /* ARP entry index */ - u8_t k; /* Ethernet address octet index */ - - /* non-unicast address? */ - if (ip_addr_isbroadcast(ipaddr, netif) || - ip_addr_ismulticast(ipaddr) || - ip_addr_isany(ipaddr)) { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n")); - return ERR_ARG; - } - - /* find entry in ARP cache, ask to create entry if queueing packet */ - i = find_entry(ipaddr, ETHARP_TRY_HARD); - - /* could not find or create entry? */ - if (i < 0) - { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: could not create ARP entry\n")); - if (q) LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: packet dropped\n")); - return (err_t)i; - } - - /* mark a fresh entry as pending (we just sent a request) */ - if (arp_table[i].state == ETHARP_STATE_EMPTY) { - arp_table[i].state = ETHARP_STATE_PENDING; - } - - /* { i is either a STABLE or (new or existing) PENDING entry } */ - LWIP_ASSERT("arp_table[i].state == PENDING or STABLE", - ((arp_table[i].state == ETHARP_STATE_PENDING) || - (arp_table[i].state == ETHARP_STATE_STABLE))); - - /* do we have a pending entry? or an implicit query request? */ - if ((arp_table[i].state == ETHARP_STATE_PENDING) || (q == NULL)) { - /* try to resolve it; send out ARP request */ - result = etharp_request(netif, ipaddr); - } - - /* packet given? */ - if (q != NULL) { - /* stable entry? */ - if (arp_table[i].state == ETHARP_STATE_STABLE) { - /* we have a valid IP->Ethernet address mapping, - * fill in the Ethernet header for the outgoing packet */ - struct eth_hdr *ethhdr = q->payload; - for(k = 0; k < netif->hwaddr_len; k++) { - ethhdr->dest.addr[k] = arp_table[i].ethaddr.addr[k]; - ethhdr->src.addr[k] = srcaddr->addr[k]; - } - ethhdr->type = htons(ETHTYPE_IP); - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: sending packet %p\n", (void *)q)); - /* send the packet */ - result = netif->linkoutput(netif, q); - /* pending entry? (either just created or already pending */ - } else if (arp_table[i].state == ETHARP_STATE_PENDING) { -#if ARP_QUEUEING /* queue the given q packet */ - struct pbuf *p; - /* copy any PBUF_REF referenced payloads into PBUF_RAM */ - /* (the caller of lwIP assumes the referenced payload can be - * freed after it returns from the lwIP call that brought us here) */ - p = pbuf_take(q); - /* packet could be taken over? */ - if (p != NULL) { - /* queue packet ... */ - if (arp_table[i].p == NULL) { - /* ... in the empty queue */ - pbuf_ref(p); - arp_table[i].p = p; -#if 0 /* multi-packet-queueing disabled, see bug #11400 */ - } else { - /* ... at tail of non-empty queue */ - pbuf_queue(arp_table[i].p, p); -#endif - } - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"S16_F"\n", (void *)q, (s16_t)i)); - result = ERR_OK; - } else { - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q)); - /* { result == ERR_MEM } through initialization */ - } -#else /* ARP_QUEUEING == 0 */ - /* q && state == PENDING && ARP_QUEUEING == 0 => result = ERR_MEM */ - /* { result == ERR_MEM } through initialization */ - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_query: Ethernet destination address unknown, queueing disabled, packet %p dropped\n", (void *)q)); -#endif - } - } - return result; -} - -err_t etharp_request(struct netif *netif, struct ip_addr *ipaddr) -{ - struct pbuf *p; - struct eth_addr * srcaddr = (struct eth_addr *)netif->hwaddr; - err_t result = ERR_OK; - u8_t k; /* ARP entry index */ - - /* allocate a pbuf for the outgoing ARP request packet */ - p = pbuf_alloc(PBUF_LINK, sizeof(struct etharp_hdr), PBUF_RAM); - /* could allocate a pbuf for an ARP request? */ - if (p != NULL) { - struct etharp_hdr *hdr = p->payload; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE, ("etharp_request: sending ARP request.\n")); - hdr->opcode = htons(ARP_REQUEST); - for (k = 0; k < netif->hwaddr_len; k++) - { - hdr->shwaddr.addr[k] = srcaddr->addr[k]; - /* the hardware address is what we ask for, in - * a request it is a don't-care value, we use zeroes */ - hdr->dhwaddr.addr[k] = 0x00; - } - hdr->dipaddr = *(struct ip_addr2 *)ipaddr; - hdr->sipaddr = *(struct ip_addr2 *)&netif->ip_addr; - - hdr->hwtype = htons(HWTYPE_ETHERNET); - ARPH_HWLEN_SET(hdr, netif->hwaddr_len); - - hdr->proto = htons(ETHTYPE_IP); - ARPH_PROTOLEN_SET(hdr, sizeof(struct ip_addr)); - for (k = 0; k < netif->hwaddr_len; ++k) - { - /* broadcast to all network interfaces on the local network */ - hdr->ethhdr.dest.addr[k] = 0xff; - hdr->ethhdr.src.addr[k] = srcaddr->addr[k]; - } - hdr->ethhdr.type = htons(ETHTYPE_ARP); - /* send ARP query */ - result = netif->linkoutput(netif, p); - /* free ARP query packet */ - pbuf_free(p); - p = NULL; - /* could not allocate pbuf for ARP request */ - } else { - result = ERR_MEM; - LWIP_DEBUGF(ETHARP_DEBUG | DBG_TRACE | 2, ("etharp_request: could not allocate pbuf for ARP request.\n")); - } - return result; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ethernetif.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ethernetif.c deleted file mode 100644 index 0c14e8de..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ethernetif.c +++ /dev/null @@ -1,306 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ - -/* - * This file is a skeleton for developing Ethernet network interface - * drivers for lwIP. Add code to the low_level functions and do a - * search-and-replace for the word "ethernetif" to replace it with - * something that better describes your network interface. - */ - -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/mem.h" -#include "lwip/pbuf.h" -#include "lwip/sys.h" -#include - -#include "netif/etharp.h" - -/* Define those to better describe your network interface. */ -#define IFNAME0 'e' -#define IFNAME1 'n' - -struct ethernetif { - struct eth_addr *ethaddr; - /* Add whatever per-interface state that is needed here. */ -}; - -static const struct eth_addr ethbroadcast = {{0xff,0xff,0xff,0xff,0xff,0xff}}; - -/* Forward declarations. */ -static void ethernetif_input(struct netif *netif); -static err_t ethernetif_output(struct netif *netif, struct pbuf *p, - struct ip_addr *ipaddr); - -static void -low_level_init(struct netif *netif) -{ - struct ethernetif *ethernetif = netif->state; - - /* set MAC hardware address length */ - netif->hwaddr_len = 6; - - /* set MAC hardware address */ - netif->hwaddr[0] = ; - ... - netif->hwaddr[5] = ; - - /* maximum transfer unit */ - netif->mtu = 1500; - - /* broadcast capability */ - netif->flags = NETIF_FLAG_BROADCAST; - - /* Do whatever else is needed to initialize interface. */ -} - -/* - * low_level_output(): - * - * Should do the actual transmission of the packet. The packet is - * contained in the pbuf that is passed to the function. This pbuf - * might be chained. - * - */ - -static err_t -low_level_output(struct netif *netif, struct pbuf *p) -{ - struct ethernetif *ethernetif = netif->state; - struct pbuf *q; - - initiate transfer(); - -#if ETH_PAD_SIZE - pbuf_header(p, -ETH_PAD_SIZE); /* drop the padding word */ -#endif - - for(q = p; q != NULL; q = q->next) { - /* Send the data from the pbuf to the interface, one pbuf at a - time. The size of the data in each pbuf is kept in the ->len - variable. */ - send data from(q->payload, q->len); - } - - signal that packet should be sent(); - -#if ETH_PAD_SIZE - pbuf_header(p, ETH_PAD_SIZE); /* reclaim the padding word */ -#endif - -#if LINK_STATS - lwip_stats.link.xmit++; -#endif /* LINK_STATS */ - - return ERR_OK; -} - -/* - * low_level_input(): - * - * Should allocate a pbuf and transfer the bytes of the incoming - * packet from the interface into the pbuf. - * - */ - -static struct pbuf * -low_level_input(struct netif *netif) -{ - struct ethernetif *ethernetif = netif->state; - struct pbuf *p, *q; - u16_t len; - - /* Obtain the size of the packet and put it into the "len" - variable. */ - len = ; - -#if ETH_PAD_SIZE - len += ETH_PAD_SIZE; /* allow room for Ethernet padding */ -#endif - - /* We allocate a pbuf chain of pbufs from the pool. */ - p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL); - - if (p != NULL) { - -#if ETH_PAD_SIZE - pbuf_header(p, -ETH_PAD_SIZE); /* drop the padding word */ -#endif - - /* We iterate over the pbuf chain until we have read the entire - * packet into the pbuf. */ - for(q = p; q != NULL; q = q->next) { - /* Read enough bytes to fill this pbuf in the chain. The - * available data in the pbuf is given by the q->len - * variable. */ - read data into(q->payload, q->len); - } - acknowledge that packet has been read(); - -#if ETH_PAD_SIZE - pbuf_header(p, ETH_PAD_SIZE); /* reclaim the padding word */ -#endif - -#if LINK_STATS - lwip_stats.link.recv++; -#endif /* LINK_STATS */ - } else { - drop packet(); -#if LINK_STATS - lwip_stats.link.memerr++; - lwip_stats.link.drop++; -#endif /* LINK_STATS */ - } - - return p; -} - -/* - * ethernetif_output(): - * - * This function is called by the TCP/IP stack when an IP packet - * should be sent. It calls the function called low_level_output() to - * do the actual transmission of the packet. - * - */ - -static err_t -ethernetif_output(struct netif *netif, struct pbuf *p, - struct ip_addr *ipaddr) -{ - - /* resolve hardware address, then send (or queue) packet */ - return etharp_output(netif, ipaddr, p); - -} - -/* - * ethernetif_input(): - * - * This function should be called when a packet is ready to be read - * from the interface. It uses the function low_level_input() that - * should handle the actual reception of bytes from the network - * interface. - * - */ - -static void -ethernetif_input(struct netif *netif) -{ - struct ethernetif *ethernetif; - struct eth_hdr *ethhdr; - struct pbuf *p; - - ethernetif = netif->state; - - /* move received packet into a new pbuf */ - p = low_level_input(netif); - /* no packet could be read, silently ignore this */ - if (p == NULL) return; - /* points to packet payload, which starts with an Ethernet header */ - ethhdr = p->payload; - -#if LINK_STATS - lwip_stats.link.recv++; -#endif /* LINK_STATS */ - - ethhdr = p->payload; - - switch (htons(ethhdr->type)) { - /* IP packet? */ - case ETHTYPE_IP: - /* update ARP table */ - etharp_ip_input(netif, p); - /* skip Ethernet header */ - pbuf_header(p, -sizeof(struct eth_hdr)); - /* pass to network layer */ - netif->input(p, netif); - break; - - case ETHTYPE_ARP: - /* pass p to ARP module */ - etharp_arp_input(netif, ethernetif->ethaddr, p); - break; - default: - pbuf_free(p); - p = NULL; - break; - } -} - -static void -arp_timer(void *arg) -{ - etharp_tmr(); - sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL); -} - -/* - * ethernetif_init(): - * - * Should be called at the beginning of the program to set up the - * network interface. It calls the function low_level_init() to do the - * actual setup of the hardware. - * - */ - -err_t -ethernetif_init(struct netif *netif) -{ - struct ethernetif *ethernetif; - - ethernetif = mem_malloc(sizeof(struct ethernetif)); - - if (ethernetif == NULL) - { - LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_init: out of memory\n")); - return ERR_MEM; - } - - netif->state = ethernetif; - netif->name[0] = IFNAME0; - netif->name[1] = IFNAME1; - netif->output = ethernetif_output; - netif->linkoutput = low_level_output; - - ethernetif->ethaddr = (struct eth_addr *)&(netif->hwaddr[0]); - - low_level_init(netif); - - etharp_init(); - - sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL); - - return ERR_OK; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/loopif.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/loopif.c deleted file mode 100644 index 0464cb8e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/loopif.c +++ /dev/null @@ -1,119 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * - */ -#include "lwip/opt.h" - -#if LWIP_HAVE_LOOPIF - -#include "netif/loopif.h" -#include "lwip/mem.h" - -#if defined(LWIP_DEBUG) && defined(LWIP_TCPDUMP) -#include "netif/tcpdump.h" -#endif /* LWIP_DEBUG && LWIP_TCPDUMP */ - -#include "lwip/tcp.h" -#include "lwip/ip.h" - -static void -loopif_input( void * arg ) -{ - struct netif *netif = (struct netif *)( ((void **)arg)[ 0 ] ); - struct pbuf *r = (struct pbuf *)( ((void **)arg)[ 1 ] ); - - mem_free( arg ); - netif -> input( r, netif ); -} - -static err_t -loopif_output(struct netif *netif, struct pbuf *p, - struct ip_addr *ipaddr) -{ - struct pbuf *q, *r; - u8_t *ptr; - void **arg; - -#if defined(LWIP_DEBUG) && defined(LWIP_TCPDUMP) - tcpdump(p); -#endif /* LWIP_DEBUG && LWIP_TCPDUMP */ - - r = pbuf_alloc(PBUF_RAW, p->tot_len, PBUF_RAM); - if (r != NULL) { - ptr = r->payload; - - for(q = p; q != NULL; q = q->next) { - memcpy(ptr, q->payload, q->len); - ptr += q->len; - } - - arg = mem_malloc( sizeof( void *[2])); - if( NULL == arg ) { - return ERR_MEM; - } - - arg[0] = netif; - arg[1] = r; - /** - * workaround (patch #1779) to try to prevent bug #2595: - * When connecting to "localhost" with the loopif interface, - * tcp_output doesn't get the opportunity to finnish sending the - * segment before tcp_process gets it, resulting in tcp_process - * referencing pcb->unacked-> which still is NULL. - * - * TODO: Is there still a race condition here? Leon - */ - sys_timeout( 1, loopif_input, arg ); - - return ERR_OK; - } - return ERR_MEM; -} - -err_t -loopif_init(struct netif *netif) -{ - netif->name[0] = 'l'; - netif->name[1] = 'o'; -#if 0 /** TODO: I think this should be enabled, or not? Leon */ - netif->input = loopif_input; -#endif - netif->output = loopif_output; - return ERR_OK; -} - -#endif /* LWIP_HAVE_LOOPIF */ - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/auth.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/auth.c deleted file mode 100644 index 33349640..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/auth.c +++ /dev/null @@ -1,927 +0,0 @@ -/***************************************************************************** -* auth.c - Network Authentication and Phase Control program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* Copyright (c) 1997 by Global Election Systems Inc. All rights reserved. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-08 Guy Lancaster , Global Election Systems Inc. -* Ported from public pppd code. -*****************************************************************************/ -/* - * auth.c - PPP authentication and phase control. - * - * Copyright (c) 1993 The Australian National University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by the Australian National University. The name of the University - * may not be used to endorse or promote products derived from this - * software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "fsm.h" -#include "lcp.h" -#include "pap.h" -#include "chap.h" -#include "auth.h" -#include "ipcp.h" - -#if CBCP_SUPPORT > 0 -#include "cbcp.h" -#endif - -#include "pppdebug.h" - - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ - -/* Bits in auth_pending[] */ -#define PAP_WITHPEER 1 -#define PAP_PEER 2 -#define CHAP_WITHPEER 4 -#define CHAP_PEER 8 - - - -/************************/ -/*** LOCAL DATA TYPES ***/ -/************************/ -/* Used for storing a sequence of words. Usually malloced. */ -struct wordlist { - struct wordlist *next; - char word[1]; -}; - - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -extern char *crypt (const char *, const char *); - -/* Prototypes for procedures local to this file. */ - -static void network_phase (int); -static void check_idle (void *); -static void connect_time_expired (void *); -#if 0 -static int login (char *, char *, char **, int *); -#endif -static void logout (void); -static int null_login (int); -static int get_pap_passwd (int, char *, char *); -static int have_pap_secret (void); -static int have_chap_secret (char *, char *, u32_t); -static int ip_addr_check (u32_t, struct wordlist *); -#if 0 /* PAP_SUPPORT > 0 || CHAP_SUPPORT > 0 */ -static void set_allowed_addrs(int unit, struct wordlist *addrs); -static void free_wordlist (struct wordlist *); -#endif -#if CBCP_SUPPORT > 0 -static void callback_phase (int); -#endif - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -#if PAP_SUPPORT > 0 || CHAP_SUPPORT > 0 -/* The name by which the peer authenticated itself to us. */ -static char peer_authname[MAXNAMELEN]; -#endif - -/* Records which authentication operations haven't completed yet. */ -static int auth_pending[NUM_PPP]; - -/* Set if we have successfully called login() */ -static int logged_in; - -/* Set if we have run the /etc/ppp/auth-up script. */ -static int did_authup; - -/* List of addresses which the peer may use. */ -static struct wordlist *addresses[NUM_PPP]; - -/* Number of network protocols which we have opened. */ -static int num_np_open; - -/* Number of network protocols which have come up. */ -static int num_np_up; - -#if PAP_SUPPORT > 0 || CHAP_SUPPORT > 0 -/* Set if we got the contents of passwd[] from the pap-secrets file. */ -static int passwd_from_file; -#endif - - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * An Open on LCP has requested a change from Dead to Establish phase. - * Do what's necessary to bring the physical layer up. - */ -void link_required(int unit) -{ - AUTHDEBUG((LOG_INFO, "link_required: %d\n", unit)); -} - -/* - * LCP has terminated the link; go to the Dead phase and take the - * physical layer down. - */ -void link_terminated(int unit) -{ - AUTHDEBUG((LOG_INFO, "link_terminated: %d\n", unit)); - - if (lcp_phase[unit] == PHASE_DEAD) - return; - if (logged_in) - logout(); - lcp_phase[unit] = PHASE_DEAD; - AUTHDEBUG((LOG_NOTICE, "Connection terminated.\n")); - pppMainWakeup(unit); -} - -/* - * LCP has gone down; it will either die or try to re-establish. - */ -void link_down(int unit) -{ - int i; - struct protent *protp; - - AUTHDEBUG((LOG_INFO, "link_down: %d\n", unit)); - if (did_authup) { - /* XXX Do link down processing. */ - did_authup = 0; - } - for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) { - if (!protp->enabled_flag) - continue; - if (protp->protocol != PPP_LCP && protp->lowerdown != NULL) - (*protp->lowerdown)(unit); - if (protp->protocol < 0xC000 && protp->close != NULL) - (*protp->close)(unit, "LCP down"); - } - num_np_open = 0; - num_np_up = 0; - if (lcp_phase[unit] != PHASE_DEAD) - lcp_phase[unit] = PHASE_TERMINATE; - pppMainWakeup(unit); -} - -/* - * The link is established. - * Proceed to the Dead, Authenticate or Network phase as appropriate. - */ -void link_established(int unit) -{ - int auth; - int i; - struct protent *protp; - lcp_options *wo = &lcp_wantoptions[unit]; - lcp_options *go = &lcp_gotoptions[unit]; -#if PAP_SUPPORT > 0 || CHAP_SUPPORT > 0 - lcp_options *ho = &lcp_hisoptions[unit]; -#endif - - AUTHDEBUG((LOG_INFO, "link_established: %d\n", unit)); - /* - * Tell higher-level protocols that LCP is up. - */ - for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) - if (protp->protocol != PPP_LCP && protp->enabled_flag - && protp->lowerup != NULL) - (*protp->lowerup)(unit); - - if (ppp_settings.auth_required && !(go->neg_chap || go->neg_upap)) { - /* - * We wanted the peer to authenticate itself, and it refused: - * treat it as though it authenticated with PAP using a username - * of "" and a password of "". If that's not OK, boot it out. - */ - if (!wo->neg_upap || !null_login(unit)) { - AUTHDEBUG((LOG_WARNING, "peer refused to authenticate\n")); - lcp_close(unit, "peer refused to authenticate"); - return; - } - } - - lcp_phase[unit] = PHASE_AUTHENTICATE; - auth = 0; -#if CHAP_SUPPORT > 0 - if (go->neg_chap) { - ChapAuthPeer(unit, ppp_settings.our_name, go->chap_mdtype); - auth |= CHAP_PEER; - } -#endif -#if PAP_SUPPORT > 0 && CHAP_SUPPORT > 0 - else -#endif -#if PAP_SUPPORT > 0 - if (go->neg_upap) { - upap_authpeer(unit); - auth |= PAP_PEER; - } -#endif -#if CHAP_SUPPORT > 0 - if (ho->neg_chap) { - ChapAuthWithPeer(unit, ppp_settings.user, ho->chap_mdtype); - auth |= CHAP_WITHPEER; - } -#endif -#if PAP_SUPPORT > 0 && CHAP_SUPPORT > 0 - else -#endif -#if PAP_SUPPORT > 0 - if (ho->neg_upap) { - if (ppp_settings.passwd[0] == 0) { - passwd_from_file = 1; - if (!get_pap_passwd(unit, ppp_settings.user, ppp_settings.passwd)) - AUTHDEBUG((LOG_ERR, "No secret found for PAP login\n")); - } - upap_authwithpeer(unit, ppp_settings.user, ppp_settings.passwd); - auth |= PAP_WITHPEER; - } -#endif - auth_pending[unit] = auth; - - if (!auth) - network_phase(unit); -} - - -/* - * The peer has failed to authenticate himself using `protocol'. - */ -void auth_peer_fail(int unit, u16_t protocol) -{ - AUTHDEBUG((LOG_INFO, "auth_peer_fail: %d proto=%X\n", unit, protocol)); - /* - * Authentication failure: take the link down - */ - lcp_close(unit, "Authentication failed"); -} - - -#if PAP_SUPPORT > 0 || CHAP_SUPPORT > 0 -/* - * The peer has been successfully authenticated using `protocol'. - */ -void auth_peer_success(int unit, u16_t protocol, char *name, int namelen) -{ - int pbit; - - AUTHDEBUG((LOG_INFO, "auth_peer_success: %d proto=%X\n", unit, protocol)); - switch (protocol) { - case PPP_CHAP: - pbit = CHAP_PEER; - break; - case PPP_PAP: - pbit = PAP_PEER; - break; - default: - AUTHDEBUG((LOG_WARNING, "auth_peer_success: unknown protocol %x\n", - protocol)); - return; - } - - /* - * Save the authenticated name of the peer for later. - */ - if (namelen > sizeof(peer_authname) - 1) - namelen = sizeof(peer_authname) - 1; - BCOPY(name, peer_authname, namelen); - peer_authname[namelen] = 0; - - /* - * If there is no more authentication still to be done, - * proceed to the network (or callback) phase. - */ - if ((auth_pending[unit] &= ~pbit) == 0) - network_phase(unit); -} - -/* - * We have failed to authenticate ourselves to the peer using `protocol'. - */ -void auth_withpeer_fail(int unit, u16_t protocol) -{ - int errCode = PPPERR_AUTHFAIL; - - AUTHDEBUG((LOG_INFO, "auth_withpeer_fail: %d proto=%X\n", unit, protocol)); - if (passwd_from_file) - BZERO(ppp_settings.passwd, MAXSECRETLEN); - /* - * XXX Warning: the unit number indicates the interface which is - * not necessarily the PPP connection. It works here as long - * as we are only supporting PPP interfaces. - */ - pppIOCtl(unit, PPPCTLS_ERRCODE, &errCode); - - /* - * We've failed to authenticate ourselves to our peer. - * He'll probably take the link down, and there's not much - * we can do except wait for that. - */ -} - -/* - * We have successfully authenticated ourselves with the peer using `protocol'. - */ -void auth_withpeer_success(int unit, u16_t protocol) -{ - int pbit; - - AUTHDEBUG((LOG_INFO, "auth_withpeer_success: %d proto=%X\n", unit, protocol)); - switch (protocol) { - case PPP_CHAP: - pbit = CHAP_WITHPEER; - break; - case PPP_PAP: - if (passwd_from_file) - BZERO(ppp_settings.passwd, MAXSECRETLEN); - pbit = PAP_WITHPEER; - break; - default: - AUTHDEBUG((LOG_WARNING, "auth_peer_success: unknown protocol %x\n", - protocol)); - pbit = 0; - } - - /* - * If there is no more authentication still being done, - * proceed to the network (or callback) phase. - */ - if ((auth_pending[unit] &= ~pbit) == 0) - network_phase(unit); -} -#endif - - -/* - * np_up - a network protocol has come up. - */ -void np_up(int unit, u16_t proto) -{ - AUTHDEBUG((LOG_INFO, "np_up: %d proto=%X\n", unit, proto)); - if (num_np_up == 0) { - AUTHDEBUG((LOG_INFO, "np_up: maxconnect=%d idle_time_limit=%d\n",ppp_settings.maxconnect,ppp_settings.idle_time_limit)); - /* - * At this point we consider that the link has come up successfully. - */ - if (ppp_settings.idle_time_limit > 0) - TIMEOUT(check_idle, NULL, ppp_settings.idle_time_limit); - - /* - * Set a timeout to close the connection once the maximum - * connect time has expired. - */ - if (ppp_settings.maxconnect > 0) - TIMEOUT(connect_time_expired, 0, ppp_settings.maxconnect); - } - ++num_np_up; -} - -/* - * np_down - a network protocol has gone down. - */ -void np_down(int unit, u16_t proto) -{ - AUTHDEBUG((LOG_INFO, "np_down: %d proto=%X\n", unit, proto)); - if (--num_np_up == 0 && ppp_settings.idle_time_limit > 0) { - UNTIMEOUT(check_idle, NULL); - } -} - -/* - * np_finished - a network protocol has finished using the link. - */ -void np_finished(int unit, u16_t proto) -{ - AUTHDEBUG((LOG_INFO, "np_finished: %d proto=%X\n", unit, proto)); - if (--num_np_open <= 0) { - /* no further use for the link: shut up shop. */ - lcp_close(0, "No network protocols running"); - } -} - -/* - * auth_reset - called when LCP is starting negotiations to recheck - * authentication options, i.e. whether we have appropriate secrets - * to use for authenticating ourselves and/or the peer. - */ -void auth_reset(int unit) -{ - lcp_options *go = &lcp_gotoptions[unit]; - lcp_options *ao = &lcp_allowoptions[0]; - ipcp_options *ipwo = &ipcp_wantoptions[0]; - u32_t remote; - - AUTHDEBUG((LOG_INFO, "auth_reset: %d\n", unit)); - ao->neg_upap = !ppp_settings.refuse_pap && (ppp_settings.passwd[0] != 0 || get_pap_passwd(unit, NULL, NULL)); - ao->neg_chap = !ppp_settings.refuse_chap && ppp_settings.passwd[0] != 0 /*have_chap_secret(ppp_settings.user, ppp_settings.remote_name, (u32_t)0)*/; - - if (go->neg_upap && !have_pap_secret()) - go->neg_upap = 0; - if (go->neg_chap) { - remote = ipwo->accept_remote? 0: ipwo->hisaddr; - if (!have_chap_secret(ppp_settings.remote_name, ppp_settings.our_name, remote)) - go->neg_chap = 0; - } -} - - -#if PAP_SUPPORT > 0 -/* - * check_passwd - Check the user name and passwd against the PAP secrets - * file. If requested, also check against the system password database, - * and login the user if OK. - * - * returns: - * UPAP_AUTHNAK: Authentication failed. - * UPAP_AUTHACK: Authentication succeeded. - * In either case, msg points to an appropriate message. - */ -int check_passwd( - int unit, - char *auser, - int userlen, - char *apasswd, - int passwdlen, - char **msg, - int *msglen -) -{ -#if 1 - *msg = (char *) 0; - return UPAP_AUTHACK; /* XXX Assume all entries OK. */ -#else - int ret = 0; - struct wordlist *addrs = NULL; - char passwd[256], user[256]; - char secret[MAXWORDLEN]; - static u_short attempts = 0; - - /* - * Make copies of apasswd and auser, then null-terminate them. - */ - BCOPY(apasswd, passwd, passwdlen); - passwd[passwdlen] = '\0'; - BCOPY(auser, user, userlen); - user[userlen] = '\0'; - *msg = (char *) 0; - - /* XXX Validate user name and password. */ - ret = UPAP_AUTHACK; /* XXX Assume all entries OK. */ - - if (ret == UPAP_AUTHNAK) { - if (*msg == (char *) 0) - *msg = "Login incorrect"; - *msglen = strlen(*msg); - /* - * Frustrate passwd stealer programs. - * Allow 10 tries, but start backing off after 3 (stolen from login). - * On 10'th, drop the connection. - */ - if (attempts++ >= 10) { - AUTHDEBUG((LOG_WARNING, "%d LOGIN FAILURES BY %s\n", attempts, user)); - /*ppp_panic("Excess Bad Logins");*/ - } - if (attempts > 3) { - sys_msleep((attempts - 3) * 5); - } - if (addrs != NULL) { - free_wordlist(addrs); - } - } else { - attempts = 0; /* Reset count */ - if (*msg == (char *) 0) - *msg = "Login ok"; - *msglen = strlen(*msg); - set_allowed_addrs(unit, addrs); - } - - BZERO(passwd, sizeof(passwd)); - BZERO(secret, sizeof(secret)); - - return ret; -#endif -} -#endif - - -/* - * auth_ip_addr - check whether the peer is authorized to use - * a given IP address. Returns 1 if authorized, 0 otherwise. - */ -int auth_ip_addr(int unit, u32_t addr) -{ - return ip_addr_check(addr, addresses[unit]); -} - -/* - * bad_ip_adrs - return 1 if the IP address is one we don't want - * to use, such as an address in the loopback net or a multicast address. - * addr is in network byte order. - */ -int bad_ip_adrs(u32_t addr) -{ - addr = ntohl(addr); - return (addr >> IN_CLASSA_NSHIFT) == IN_LOOPBACKNET - || IN_MULTICAST(addr) || IN_BADCLASS(addr); -} - - -#if CHAP_SUPPORT > 0 -/* - * get_secret - open the CHAP secret file and return the secret - * for authenticating the given client on the given server. - * (We could be either client or server). - */ -int get_secret( - int unit, - char *client, - char *server, - char *secret, - int *secret_len, - int save_addrs -) -{ -#if 1 - int len; - struct wordlist *addrs; - - addrs = NULL; - - if(!client || !client[0] || strcmp(client, ppp_settings.user)) { - return 0; - } - - len = strlen(ppp_settings.passwd); - if (len > MAXSECRETLEN) { - AUTHDEBUG((LOG_ERR, "Secret for %s on %s is too long\n", client, server)); - len = MAXSECRETLEN; - } - BCOPY(ppp_settings.passwd, secret, len); - *secret_len = len; - - return 1; -#else - int ret = 0, len; - struct wordlist *addrs; - char secbuf[MAXWORDLEN]; - - addrs = NULL; - secbuf[0] = 0; - - /* XXX Find secret. */ - if (ret < 0) - return 0; - - if (save_addrs) - set_allowed_addrs(unit, addrs); - - len = strlen(secbuf); - if (len > MAXSECRETLEN) { - AUTHDEBUG((LOG_ERR, "Secret for %s on %s is too long\n", client, server)); - len = MAXSECRETLEN; - } - BCOPY(secbuf, secret, len); - BZERO(secbuf, sizeof(secbuf)); - *secret_len = len; - - return 1; -#endif -} -#endif - - -#if 0 /* UNUSED */ -/* - * auth_check_options - called to check authentication options. - */ -void auth_check_options(void) -{ - lcp_options *wo = &lcp_wantoptions[0]; - int can_auth; - ipcp_options *ipwo = &ipcp_wantoptions[0]; - u32_t remote; - - /* Default our_name to hostname, and user to our_name */ - if (ppp_settings.our_name[0] == 0 || ppp_settings.usehostname) - strcpy(ppp_settings.our_name, ppp_settings.hostname); - if (ppp_settings.user[0] == 0) - strcpy(ppp_settings.user, ppp_settings.our_name); - - /* If authentication is required, ask peer for CHAP or PAP. */ - if (ppp_settings.auth_required && !wo->neg_chap && !wo->neg_upap) { - wo->neg_chap = 1; - wo->neg_upap = 1; - } - - /* - * Check whether we have appropriate secrets to use - * to authenticate the peer. - */ - can_auth = wo->neg_upap && have_pap_secret(); - if (!can_auth && wo->neg_chap) { - remote = ipwo->accept_remote? 0: ipwo->hisaddr; - can_auth = have_chap_secret(ppp_settings.remote_name, ppp_settings.our_name, remote); - } - - if (ppp_settings.auth_required && !can_auth) { - ppp_panic("No auth secret"); - } -} -#endif - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ -/* - * Proceed to the network phase. - */ -static void network_phase(int unit) -{ - int i; - struct protent *protp; - lcp_options *go = &lcp_gotoptions[unit]; - - /* - * If the peer had to authenticate, run the auth-up script now. - */ - if ((go->neg_chap || go->neg_upap) && !did_authup) { - /* XXX Do setup for peer authentication. */ - did_authup = 1; - } - -#if CBCP_SUPPORT > 0 - /* - * If we negotiated callback, do it now. - */ - if (go->neg_cbcp) { - lcp_phase[unit] = PHASE_CALLBACK; - (*cbcp_protent.open)(unit); - return; - } -#endif - - lcp_phase[unit] = PHASE_NETWORK; - for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) - if (protp->protocol < 0xC000 && protp->enabled_flag - && protp->open != NULL) { - (*protp->open)(unit); - if (protp->protocol != PPP_CCP) - ++num_np_open; - } - - if (num_np_open == 0) - /* nothing to do */ - lcp_close(0, "No network protocols running"); -} - -/* - * check_idle - check whether the link has been idle for long - * enough that we can shut it down. - */ -static void check_idle(void *arg) -{ - struct ppp_idle idle; - u_short itime; - - (void)arg; - if (!get_idle_time(0, &idle)) - return; - itime = LWIP_MIN(idle.xmit_idle, idle.recv_idle); - if (itime >= ppp_settings.idle_time_limit) { - /* link is idle: shut it down. */ - AUTHDEBUG((LOG_INFO, "Terminating connection due to lack of activity.\n")); - lcp_close(0, "Link inactive"); - } else { - TIMEOUT(check_idle, NULL, ppp_settings.idle_time_limit - itime); - } -} - -/* - * connect_time_expired - log a message and close the connection. - */ -static void connect_time_expired(void *arg) -{ - (void)arg; - - AUTHDEBUG((LOG_INFO, "Connect time expired\n")); - lcp_close(0, "Connect time expired"); /* Close connection */ -} - -#if 0 -/* - * login - Check the user name and password against the system - * password database, and login the user if OK. - * - * returns: - * UPAP_AUTHNAK: Login failed. - * UPAP_AUTHACK: Login succeeded. - * In either case, msg points to an appropriate message. - */ -static int login(char *user, char *passwd, char **msg, int *msglen) -{ - /* XXX Fail until we decide that we want to support logins. */ - return (UPAP_AUTHNAK); -} -#endif - -/* - * logout - Logout the user. - */ -static void logout(void) -{ - logged_in = 0; -} - - -/* - * null_login - Check if a username of "" and a password of "" are - * acceptable, and iff so, set the list of acceptable IP addresses - * and return 1. - */ -static int null_login(int unit) -{ - (void)unit; - /* XXX Fail until we decide that we want to support logins. */ - return 0; -} - - -/* - * get_pap_passwd - get a password for authenticating ourselves with - * our peer using PAP. Returns 1 on success, 0 if no suitable password - * could be found. - */ -static int get_pap_passwd(int unit, char *user, char *passwd) -{ -/* normally we would reject PAP if no password is provided, - but this causes problems with some providers (like CHT in Taiwan) - who incorrectly request PAP and expect a bogus/empty password, so - always provide a default user/passwd of "none"/"none" -*/ - if(user) - strcpy(user, "none"); - if(passwd) - strcpy(passwd, "none"); - - return 1; -} - - -/* - * have_pap_secret - check whether we have a PAP file with any - * secrets that we could possibly use for authenticating the peer. - */ -static int have_pap_secret(void) -{ - /* XXX Fail until we set up our passwords. */ - return 0; -} - - -/* - * have_chap_secret - check whether we have a CHAP file with a - * secret that we could possibly use for authenticating `client' - * on `server'. Either can be the null string, meaning we don't - * know the identity yet. - */ -static int have_chap_secret(char *client, char *server, u32_t remote) -{ - (void)client; - (void)server; - (void)remote; - /* XXX Fail until we set up our passwords. */ - return 0; -} - - -#if 0 /* PAP_SUPPORT > 0 || CHAP_SUPPORT > 0 */ -/* - * set_allowed_addrs() - set the list of allowed addresses. - */ -static void set_allowed_addrs(int unit, struct wordlist *addrs) -{ - if (addresses[unit] != NULL) - free_wordlist(addresses[unit]); - addresses[unit] = addrs; - -#if 0 - /* - * If there's only one authorized address we might as well - * ask our peer for that one right away - */ - if (addrs != NULL && addrs->next == NULL) { - char *p = addrs->word; - struct ipcp_options *wo = &ipcp_wantoptions[unit]; - u32_t a; - struct hostent *hp; - - if (wo->hisaddr == 0 && *p != '!' && *p != '-' - && strchr(p, '/') == NULL) { - hp = gethostbyname(p); - if (hp != NULL && hp->h_addrtype == AF_INET) - a = *(u32_t *)hp->h_addr; - else - a = inet_addr(p); - if (a != (u32_t) -1) - wo->hisaddr = a; - } - } -#endif -} -#endif - -static int ip_addr_check(u32_t addr, struct wordlist *addrs) -{ - - /* don't allow loopback or multicast address */ - if (bad_ip_adrs(addr)) - return 0; - - if (addrs == NULL) - return !ppp_settings.auth_required; /* no addresses authorized */ - - /* XXX All other addresses allowed. */ - return 1; -} - -#if 0 /* PAP_SUPPORT > 0 || CHAP_SUPPORT */ -/* - * free_wordlist - release memory allocated for a wordlist. - */ -static void free_wordlist(struct wordlist *wp) -{ - struct wordlist *next; - - while (wp != NULL) { - next = wp->next; - free(wp); - wp = next; - } -} -#endif - -#endif /* PPP_SUPPORT */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/auth.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/auth.h deleted file mode 100644 index d6a5de5b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/auth.h +++ /dev/null @@ -1,94 +0,0 @@ -/***************************************************************************** -* auth.h - PPP Authentication and phase control header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1998 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-04 Guy Lancaster , Global Election Systems Inc. -* Original derived from BSD pppd.h. -*****************************************************************************/ -/* - * pppd.h - PPP daemon global declarations. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - */ - -#ifndef AUTH_H -#define AUTH_H - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ -void link_required (int); /* we are starting to use the link */ -void link_terminated (int); /* we are finished with the link */ -void link_down (int); /* the LCP layer has left the Opened state */ -void link_established (int); /* the link is up; authenticate now */ -void np_up (int, u16_t); /* a network protocol has come up */ -void np_down (int, u16_t); /* a network protocol has gone down */ -void np_finished (int, u16_t); /* a network protocol no longer needs link */ -void auth_peer_fail (int, u16_t);/* peer failed to authenticate itself */ - -/* peer successfully authenticated itself */ -void auth_peer_success (int, u16_t, char *, int); - -/* we failed to authenticate ourselves */ -void auth_withpeer_fail (int, u16_t); - -/* we successfully authenticated ourselves */ -void auth_withpeer_success (int, u16_t); - -/* check authentication options supplied */ -void auth_check_options (void); -void auth_reset (int); /* check what secrets we have */ - -/* Check peer-supplied username/password */ -int check_passwd (int, char *, int, char *, int, char **, int *); - -/* get "secret" for chap */ -int get_secret (int, char *, char *, char *, int *, int); - -/* check if IP address is authorized */ -int auth_ip_addr (int, u32_t); - -/* check if IP address is unreasonable */ -int bad_ip_adrs (u32_t); - - -#endif /* AUTH_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/chap.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/chap.c deleted file mode 100644 index 4d1dc0d2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/chap.c +++ /dev/null @@ -1,872 +0,0 @@ -/*** WARNING - THIS HAS NEVER BEEN FINISHED ***/ -/***************************************************************************** -* chap.c - Network Challenge Handshake Authentication Protocol program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-04 Guy Lancaster , Global Election Systems Inc. -* Original based on BSD chap.c. -*****************************************************************************/ -/* - * chap.c - Challenge Handshake Authentication Protocol. - * - * Copyright (c) 1993 The Australian National University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by the Australian National University. The name of the University - * may not be used to endorse or promote products derived from this - * software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * Copyright (c) 1991 Gregory M. Christy. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Gregory M. Christy. The name of the author may not be used to - * endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "magic.h" - -#if CHAP_SUPPORT > 0 - -#include "randm.h" -#include "auth.h" -#include "md5.h" -#include "chap.h" -#include "chpms.h" -#include "pppdebug.h" - - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ - - -/************************/ -/*** LOCAL DATA TYPES ***/ -/************************/ - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -/* - * Protocol entry points. - */ -static void ChapInit (int); -static void ChapLowerUp (int); -static void ChapLowerDown (int); -static void ChapInput (int, u_char *, int); -static void ChapProtocolReject (int); -static int ChapPrintPkt (u_char *, int, - void (*) (void *, char *, ...), void *); - -static void ChapChallengeTimeout (void *); -static void ChapResponseTimeout (void *); -static void ChapReceiveChallenge (chap_state *, u_char *, int, int); -static void ChapRechallenge (void *); -static void ChapReceiveResponse (chap_state *, u_char *, int, int); -static void ChapReceiveSuccess(chap_state *cstate, u_char *inp, u_char id, int len); -static void ChapReceiveFailure(chap_state *cstate, u_char *inp, u_char id, int len); -static void ChapSendStatus (chap_state *, int); -static void ChapSendChallenge (chap_state *); -static void ChapSendResponse (chap_state *); -static void ChapGenChallenge (chap_state *); - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ -chap_state chap[NUM_PPP]; /* CHAP state; one for each unit */ - -struct protent chap_protent = { - PPP_CHAP, - ChapInit, - ChapInput, - ChapProtocolReject, - ChapLowerUp, - ChapLowerDown, - NULL, - NULL, -#if 0 - ChapPrintPkt, - NULL, -#endif - 1, - "CHAP", -#if 0 - NULL, - NULL, - NULL -#endif -}; - - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -static char *ChapCodenames[] = { - "Challenge", "Response", "Success", "Failure" -}; - - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * ChapAuthWithPeer - Authenticate us with our peer (start client). - * - */ -void ChapAuthWithPeer(int unit, char *our_name, int digest) -{ - chap_state *cstate = &chap[unit]; - - cstate->resp_name = our_name; - cstate->resp_type = digest; - - if (cstate->clientstate == CHAPCS_INITIAL || - cstate->clientstate == CHAPCS_PENDING) { - /* lower layer isn't up - wait until later */ - cstate->clientstate = CHAPCS_PENDING; - return; - } - - /* - * We get here as a result of LCP coming up. - * So even if CHAP was open before, we will - * have to re-authenticate ourselves. - */ - cstate->clientstate = CHAPCS_LISTEN; -} - - -/* - * ChapAuthPeer - Authenticate our peer (start server). - */ -void ChapAuthPeer(int unit, char *our_name, int digest) -{ - chap_state *cstate = &chap[unit]; - - cstate->chal_name = our_name; - cstate->chal_type = digest; - - if (cstate->serverstate == CHAPSS_INITIAL || - cstate->serverstate == CHAPSS_PENDING) { - /* lower layer isn't up - wait until later */ - cstate->serverstate = CHAPSS_PENDING; - return; - } - - ChapGenChallenge(cstate); - ChapSendChallenge(cstate); /* crank it up dude! */ - cstate->serverstate = CHAPSS_INITIAL_CHAL; -} - - - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ -/* - * ChapInit - Initialize a CHAP unit. - */ -static void ChapInit(int unit) -{ - chap_state *cstate = &chap[unit]; - - BZERO(cstate, sizeof(*cstate)); - cstate->unit = unit; - cstate->clientstate = CHAPCS_INITIAL; - cstate->serverstate = CHAPSS_INITIAL; - cstate->timeouttime = CHAP_DEFTIMEOUT; - cstate->max_transmits = CHAP_DEFTRANSMITS; - /* random number generator is initialized in magic_init */ -} - - -/* - * ChapChallengeTimeout - Timeout expired on sending challenge. - */ -static void ChapChallengeTimeout(void *arg) -{ - chap_state *cstate = (chap_state *) arg; - - /* if we aren't sending challenges, don't worry. then again we */ - /* probably shouldn't be here either */ - if (cstate->serverstate != CHAPSS_INITIAL_CHAL && - cstate->serverstate != CHAPSS_RECHALLENGE) - return; - - if (cstate->chal_transmits >= cstate->max_transmits) { - /* give up on peer */ - CHAPDEBUG((LOG_ERR, "Peer failed to respond to CHAP challenge\n")); - cstate->serverstate = CHAPSS_BADAUTH; - auth_peer_fail(cstate->unit, PPP_CHAP); - return; - } - - ChapSendChallenge(cstate); /* Re-send challenge */ -} - - -/* - * ChapResponseTimeout - Timeout expired on sending response. - */ -static void ChapResponseTimeout(void *arg) -{ - chap_state *cstate = (chap_state *) arg; - - /* if we aren't sending a response, don't worry. */ - if (cstate->clientstate != CHAPCS_RESPONSE) - return; - - ChapSendResponse(cstate); /* re-send response */ -} - - -/* - * ChapRechallenge - Time to challenge the peer again. - */ -static void ChapRechallenge(void *arg) -{ - chap_state *cstate = (chap_state *) arg; - - /* if we aren't sending a response, don't worry. */ - if (cstate->serverstate != CHAPSS_OPEN) - return; - - ChapGenChallenge(cstate); - ChapSendChallenge(cstate); - cstate->serverstate = CHAPSS_RECHALLENGE; -} - - -/* - * ChapLowerUp - The lower layer is up. - * - * Start up if we have pending requests. - */ -static void ChapLowerUp(int unit) -{ - chap_state *cstate = &chap[unit]; - - if (cstate->clientstate == CHAPCS_INITIAL) - cstate->clientstate = CHAPCS_CLOSED; - else if (cstate->clientstate == CHAPCS_PENDING) - cstate->clientstate = CHAPCS_LISTEN; - - if (cstate->serverstate == CHAPSS_INITIAL) - cstate->serverstate = CHAPSS_CLOSED; - else if (cstate->serverstate == CHAPSS_PENDING) { - ChapGenChallenge(cstate); - ChapSendChallenge(cstate); - cstate->serverstate = CHAPSS_INITIAL_CHAL; - } -} - - -/* - * ChapLowerDown - The lower layer is down. - * - * Cancel all timeouts. - */ -static void ChapLowerDown(int unit) -{ - chap_state *cstate = &chap[unit]; - - /* Timeout(s) pending? Cancel if so. */ - if (cstate->serverstate == CHAPSS_INITIAL_CHAL || - cstate->serverstate == CHAPSS_RECHALLENGE) - UNTIMEOUT(ChapChallengeTimeout, cstate); - else if (cstate->serverstate == CHAPSS_OPEN - && cstate->chal_interval != 0) - UNTIMEOUT(ChapRechallenge, cstate); - if (cstate->clientstate == CHAPCS_RESPONSE) - UNTIMEOUT(ChapResponseTimeout, cstate); - - cstate->clientstate = CHAPCS_INITIAL; - cstate->serverstate = CHAPSS_INITIAL; -} - - -/* - * ChapProtocolReject - Peer doesn't grok CHAP. - */ -static void ChapProtocolReject(int unit) -{ - chap_state *cstate = &chap[unit]; - - if (cstate->serverstate != CHAPSS_INITIAL && - cstate->serverstate != CHAPSS_CLOSED) - auth_peer_fail(unit, PPP_CHAP); - if (cstate->clientstate != CHAPCS_INITIAL && - cstate->clientstate != CHAPCS_CLOSED) - auth_withpeer_fail(unit, PPP_CHAP); - ChapLowerDown(unit); /* shutdown chap */ -} - - -/* - * ChapInput - Input CHAP packet. - */ -static void ChapInput(int unit, u_char *inpacket, int packet_len) -{ - chap_state *cstate = &chap[unit]; - u_char *inp; - u_char code, id; - int len; - - /* - * Parse header (code, id and length). - * If packet too short, drop it. - */ - inp = inpacket; - if (packet_len < CHAP_HEADERLEN) { - CHAPDEBUG((LOG_INFO, "ChapInput: rcvd short header.\n")); - return; - } - GETCHAR(code, inp); - GETCHAR(id, inp); - GETSHORT(len, inp); - if (len < CHAP_HEADERLEN) { - CHAPDEBUG((LOG_INFO, "ChapInput: rcvd illegal length.\n")); - return; - } - if (len > packet_len) { - CHAPDEBUG((LOG_INFO, "ChapInput: rcvd short packet.\n")); - return; - } - len -= CHAP_HEADERLEN; - - /* - * Action depends on code (as in fact it usually does :-). - */ - switch (code) { - case CHAP_CHALLENGE: - ChapReceiveChallenge(cstate, inp, id, len); - break; - - case CHAP_RESPONSE: - ChapReceiveResponse(cstate, inp, id, len); - break; - - case CHAP_FAILURE: - ChapReceiveFailure(cstate, inp, id, len); - break; - - case CHAP_SUCCESS: - ChapReceiveSuccess(cstate, inp, id, len); - break; - - default: /* Need code reject? */ - CHAPDEBUG((LOG_WARNING, "Unknown CHAP code (%d) received.\n", code)); - break; - } -} - - -/* - * ChapReceiveChallenge - Receive Challenge and send Response. - */ -static void ChapReceiveChallenge(chap_state *cstate, u_char *inp, int id, int len) -{ - int rchallenge_len; - u_char *rchallenge; - int secret_len; - char secret[MAXSECRETLEN]; - char rhostname[256]; - MD5_CTX mdContext; - u_char hash[MD5_SIGNATURE_SIZE]; - - CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: Rcvd id %d.\n", id)); - if (cstate->clientstate == CHAPCS_CLOSED || - cstate->clientstate == CHAPCS_PENDING) { - CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: in state %d\n", - cstate->clientstate)); - return; - } - - if (len < 2) { - CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: rcvd short packet.\n")); - return; - } - - GETCHAR(rchallenge_len, inp); - len -= sizeof (u_char) + rchallenge_len; /* now name field length */ - if (len < 0) { - CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: rcvd short packet.\n")); - return; - } - rchallenge = inp; - INCPTR(rchallenge_len, inp); - - if (len >= sizeof(rhostname)) - len = sizeof(rhostname) - 1; - BCOPY(inp, rhostname, len); - rhostname[len] = '\000'; - - CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: received name field '%s'\n", - rhostname)); - - /* Microsoft doesn't send their name back in the PPP packet */ - if (ppp_settings.remote_name[0] != 0 && (ppp_settings.explicit_remote || rhostname[0] == 0)) { - strncpy(rhostname, ppp_settings.remote_name, sizeof(rhostname)); - rhostname[sizeof(rhostname) - 1] = 0; - CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: using '%s' as remote name\n", - rhostname)); - } - - /* get secret for authenticating ourselves with the specified host */ - if (!get_secret(cstate->unit, cstate->resp_name, rhostname, - secret, &secret_len, 0)) { - secret_len = 0; /* assume null secret if can't find one */ - CHAPDEBUG((LOG_WARNING, "No CHAP secret found for authenticating us to %s\n", rhostname)); - } - - /* cancel response send timeout if necessary */ - if (cstate->clientstate == CHAPCS_RESPONSE) - UNTIMEOUT(ChapResponseTimeout, cstate); - - cstate->resp_id = id; - cstate->resp_transmits = 0; - - /* generate MD based on negotiated type */ - switch (cstate->resp_type) { - - case CHAP_DIGEST_MD5: - MD5Init(&mdContext); - MD5Update(&mdContext, &cstate->resp_id, 1); - MD5Update(&mdContext, (u_char*)secret, secret_len); - MD5Update(&mdContext, rchallenge, rchallenge_len); - MD5Final(hash, &mdContext); - BCOPY(hash, cstate->response, MD5_SIGNATURE_SIZE); - cstate->resp_length = MD5_SIGNATURE_SIZE; - break; - -#ifdef CHAPMS - case CHAP_MICROSOFT: - ChapMS(cstate, rchallenge, rchallenge_len, secret, secret_len); - break; -#endif - - default: - CHAPDEBUG((LOG_INFO, "unknown digest type %d\n", cstate->resp_type)); - return; - } - - BZERO(secret, sizeof(secret)); - ChapSendResponse(cstate); -} - - -/* - * ChapReceiveResponse - Receive and process response. - */ -static void ChapReceiveResponse(chap_state *cstate, u_char *inp, int id, int len) -{ - u_char *remmd, remmd_len; - int secret_len, old_state; - int code; - char rhostname[256]; - MD5_CTX mdContext; - char secret[MAXSECRETLEN]; - u_char hash[MD5_SIGNATURE_SIZE]; - - CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: Rcvd id %d.\n", id)); - - if (cstate->serverstate == CHAPSS_CLOSED || - cstate->serverstate == CHAPSS_PENDING) { - CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: in state %d\n", - cstate->serverstate)); - return; - } - - if (id != cstate->chal_id) - return; /* doesn't match ID of last challenge */ - - /* - * If we have received a duplicate or bogus Response, - * we have to send the same answer (Success/Failure) - * as we did for the first Response we saw. - */ - if (cstate->serverstate == CHAPSS_OPEN) { - ChapSendStatus(cstate, CHAP_SUCCESS); - return; - } - if (cstate->serverstate == CHAPSS_BADAUTH) { - ChapSendStatus(cstate, CHAP_FAILURE); - return; - } - - if (len < 2) { - CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: rcvd short packet.\n")); - return; - } - GETCHAR(remmd_len, inp); /* get length of MD */ - remmd = inp; /* get pointer to MD */ - INCPTR(remmd_len, inp); - - len -= sizeof (u_char) + remmd_len; - if (len < 0) { - CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: rcvd short packet.\n")); - return; - } - - UNTIMEOUT(ChapChallengeTimeout, cstate); - - if (len >= sizeof(rhostname)) - len = sizeof(rhostname) - 1; - BCOPY(inp, rhostname, len); - rhostname[len] = '\000'; - - CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: received name field: %s\n", - rhostname)); - - /* - * Get secret for authenticating them with us, - * do the hash ourselves, and compare the result. - */ - code = CHAP_FAILURE; - if (!get_secret(cstate->unit, rhostname, cstate->chal_name, - secret, &secret_len, 1)) { -/* CHAPDEBUG((LOG_WARNING, TL_CHAP, "No CHAP secret found for authenticating %s\n", rhostname)); */ - CHAPDEBUG((LOG_WARNING, "No CHAP secret found for authenticating %s\n", - rhostname)); - } else { - - /* generate MD based on negotiated type */ - switch (cstate->chal_type) { - - case CHAP_DIGEST_MD5: /* only MD5 is defined for now */ - if (remmd_len != MD5_SIGNATURE_SIZE) - break; /* it's not even the right length */ - MD5Init(&mdContext); - MD5Update(&mdContext, &cstate->chal_id, 1); - MD5Update(&mdContext, (u_char*)secret, secret_len); - MD5Update(&mdContext, cstate->challenge, cstate->chal_len); - MD5Final(hash, &mdContext); - - /* compare local and remote MDs and send the appropriate status */ - if (memcmp (hash, remmd, MD5_SIGNATURE_SIZE) == 0) - code = CHAP_SUCCESS; /* they are the same! */ - break; - - default: - CHAPDEBUG((LOG_INFO, "unknown digest type %d\n", cstate->chal_type)); - } - } - - BZERO(secret, sizeof(secret)); - ChapSendStatus(cstate, code); - - if (code == CHAP_SUCCESS) { - old_state = cstate->serverstate; - cstate->serverstate = CHAPSS_OPEN; - if (old_state == CHAPSS_INITIAL_CHAL) { - auth_peer_success(cstate->unit, PPP_CHAP, rhostname, len); - } - if (cstate->chal_interval != 0) - TIMEOUT(ChapRechallenge, cstate, cstate->chal_interval); - } else { - CHAPDEBUG((LOG_ERR, "CHAP peer authentication failed\n")); - cstate->serverstate = CHAPSS_BADAUTH; - auth_peer_fail(cstate->unit, PPP_CHAP); - } -} - -/* - * ChapReceiveSuccess - Receive Success - */ -static void ChapReceiveSuccess(chap_state *cstate, u_char *inp, u_char id, int len) -{ - - CHAPDEBUG((LOG_INFO, "ChapReceiveSuccess: Rcvd id %d.\n", id)); - - if (cstate->clientstate == CHAPCS_OPEN) - /* presumably an answer to a duplicate response */ - return; - - if (cstate->clientstate != CHAPCS_RESPONSE) { - /* don't know what this is */ - CHAPDEBUG((LOG_INFO, "ChapReceiveSuccess: in state %d\n", - cstate->clientstate)); - return; - } - - UNTIMEOUT(ChapResponseTimeout, cstate); - - /* - * Print message. - */ - if (len > 0) - PRINTMSG(inp, len); - - cstate->clientstate = CHAPCS_OPEN; - - auth_withpeer_success(cstate->unit, PPP_CHAP); -} - - -/* - * ChapReceiveFailure - Receive failure. - */ -static void ChapReceiveFailure(chap_state *cstate, u_char *inp, u_char id, int len) -{ - CHAPDEBUG((LOG_INFO, "ChapReceiveFailure: Rcvd id %d.\n", id)); - - if (cstate->clientstate != CHAPCS_RESPONSE) { - /* don't know what this is */ - CHAPDEBUG((LOG_INFO, "ChapReceiveFailure: in state %d\n", - cstate->clientstate)); - return; - } - - UNTIMEOUT(ChapResponseTimeout, cstate); - - /* - * Print message. - */ - if (len > 0) - PRINTMSG(inp, len); - - CHAPDEBUG((LOG_ERR, "CHAP authentication failed\n")); - auth_withpeer_fail(cstate->unit, PPP_CHAP); -} - - -/* - * ChapSendChallenge - Send an Authenticate challenge. - */ -static void ChapSendChallenge(chap_state *cstate) -{ - u_char *outp; - int chal_len, name_len; - int outlen; - - chal_len = cstate->chal_len; - name_len = strlen(cstate->chal_name); - outlen = CHAP_HEADERLEN + sizeof (u_char) + chal_len + name_len; - outp = outpacket_buf[cstate->unit]; - - MAKEHEADER(outp, PPP_CHAP); /* paste in a CHAP header */ - - PUTCHAR(CHAP_CHALLENGE, outp); - PUTCHAR(cstate->chal_id, outp); - PUTSHORT(outlen, outp); - - PUTCHAR(chal_len, outp); /* put length of challenge */ - BCOPY(cstate->challenge, outp, chal_len); - INCPTR(chal_len, outp); - - BCOPY(cstate->chal_name, outp, name_len); /* append hostname */ - - pppWrite(cstate->unit, outpacket_buf[cstate->unit], outlen + PPP_HDRLEN); - - CHAPDEBUG((LOG_INFO, "ChapSendChallenge: Sent id %d.\n", cstate->chal_id)); - - TIMEOUT(ChapChallengeTimeout, cstate, cstate->timeouttime); - ++cstate->chal_transmits; -} - - -/* - * ChapSendStatus - Send a status response (ack or nak). - */ -static void ChapSendStatus(chap_state *cstate, int code) -{ - u_char *outp; - int outlen, msglen; - char msg[256]; - - if (code == CHAP_SUCCESS) - strcpy(msg, "Welcome!"); - else - strcpy(msg, "I don't like you. Go 'way."); - msglen = strlen(msg); - - outlen = CHAP_HEADERLEN + msglen; - outp = outpacket_buf[cstate->unit]; - - MAKEHEADER(outp, PPP_CHAP); /* paste in a header */ - - PUTCHAR(code, outp); - PUTCHAR(cstate->chal_id, outp); - PUTSHORT(outlen, outp); - BCOPY(msg, outp, msglen); - pppWrite(cstate->unit, outpacket_buf[cstate->unit], outlen + PPP_HDRLEN); - - CHAPDEBUG((LOG_INFO, "ChapSendStatus: Sent code %d, id %d.\n", code, - cstate->chal_id)); -} - -/* - * ChapGenChallenge is used to generate a pseudo-random challenge string of - * a pseudo-random length between min_len and max_len. The challenge - * string and its length are stored in *cstate, and various other fields of - * *cstate are initialized. - */ - -static void ChapGenChallenge(chap_state *cstate) -{ - int chal_len; - u_char *ptr = cstate->challenge; - int i; - - /* pick a random challenge length between MIN_CHALLENGE_LENGTH and - MAX_CHALLENGE_LENGTH */ - chal_len = (unsigned) - ((((magic() >> 16) * - (MAX_CHALLENGE_LENGTH - MIN_CHALLENGE_LENGTH)) >> 16) - + MIN_CHALLENGE_LENGTH); - cstate->chal_len = chal_len; - cstate->chal_id = ++cstate->id; - cstate->chal_transmits = 0; - - /* generate a random string */ - for (i = 0; i < chal_len; i++ ) - *ptr++ = (char) (magic() & 0xff); -} - -/* - * ChapSendResponse - send a response packet with values as specified - * in *cstate. - */ -/* ARGSUSED */ -static void ChapSendResponse(chap_state *cstate) -{ - u_char *outp; - int outlen, md_len, name_len; - - md_len = cstate->resp_length; - name_len = strlen(cstate->resp_name); - outlen = CHAP_HEADERLEN + sizeof (u_char) + md_len + name_len; - outp = outpacket_buf[cstate->unit]; - - MAKEHEADER(outp, PPP_CHAP); - - PUTCHAR(CHAP_RESPONSE, outp); /* we are a response */ - PUTCHAR(cstate->resp_id, outp); /* copy id from challenge packet */ - PUTSHORT(outlen, outp); /* packet length */ - - PUTCHAR(md_len, outp); /* length of MD */ - BCOPY(cstate->response, outp, md_len); /* copy MD to buffer */ - INCPTR(md_len, outp); - - BCOPY(cstate->resp_name, outp, name_len); /* append our name */ - - /* send the packet */ - pppWrite(cstate->unit, outpacket_buf[cstate->unit], outlen + PPP_HDRLEN); - - cstate->clientstate = CHAPCS_RESPONSE; - TIMEOUT(ChapResponseTimeout, cstate, cstate->timeouttime); - ++cstate->resp_transmits; -} - -/* - * ChapPrintPkt - print the contents of a CHAP packet. - */ -static int ChapPrintPkt( - u_char *p, - int plen, - void (*printer) (void *, char *, ...), - void *arg -) -{ - int code, id, len; - int clen, nlen; - u_char x; - - if (plen < CHAP_HEADERLEN) - return 0; - GETCHAR(code, p); - GETCHAR(id, p); - GETSHORT(len, p); - if (len < CHAP_HEADERLEN || len > plen) - return 0; - - if (code >= 1 && code <= sizeof(ChapCodenames) / sizeof(char *)) - printer(arg, " %s", ChapCodenames[code-1]); - else - printer(arg, " code=0x%x", code); - printer(arg, " id=0x%x", id); - len -= CHAP_HEADERLEN; - switch (code) { - case CHAP_CHALLENGE: - case CHAP_RESPONSE: - if (len < 1) - break; - clen = p[0]; - if (len < clen + 1) - break; - ++p; - nlen = len - clen - 1; - printer(arg, " <"); - for (; clen > 0; --clen) { - GETCHAR(x, p); - printer(arg, "%.2x", x); - } - printer(arg, ">, name = %.*Z", nlen, p); - break; - case CHAP_FAILURE: - case CHAP_SUCCESS: - printer(arg, " %.*Z", len, p); - break; - default: - for (clen = len; clen > 0; --clen) { - GETCHAR(x, p); - printer(arg, " %.2x", x); - } - } - - return len + CHAP_HEADERLEN; -} - -#endif - -#endif /* PPP_SUPPORT */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/chap.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/chap.h deleted file mode 100644 index 9a4ea4fc..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/chap.h +++ /dev/null @@ -1,167 +0,0 @@ -/***************************************************************************** -* chap.h - Network Challenge Handshake Authentication Protocol header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1998 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-03 Guy Lancaster , Global Election Systems Inc. -* Original built from BSD network code. -******************************************************************************/ -/* - * chap.h - Challenge Handshake Authentication Protocol definitions. - * - * Copyright (c) 1993 The Australian National University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by the Australian National University. The name of the University - * may not be used to endorse or promote products derived from this - * software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * Copyright (c) 1991 Gregory M. Christy - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by the author. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * $Id$ - */ - -#ifndef CHAP_H -#define CHAP_H - -/************************* -*** PUBLIC DEFINITIONS *** -*************************/ - -/* Code + ID + length */ -#define CHAP_HEADERLEN 4 - -/* - * CHAP codes. - */ - -#define CHAP_DIGEST_MD5 5 /* use MD5 algorithm */ -#define MD5_SIGNATURE_SIZE 16 /* 16 bytes in a MD5 message digest */ -#define CHAP_MICROSOFT 0x80 /* use Microsoft-compatible alg. */ -#define MS_CHAP_RESPONSE_LEN 49 /* Response length for MS-CHAP */ - -#define CHAP_CHALLENGE 1 -#define CHAP_RESPONSE 2 -#define CHAP_SUCCESS 3 -#define CHAP_FAILURE 4 - -/* - * Challenge lengths (for challenges we send) and other limits. - */ -#define MIN_CHALLENGE_LENGTH 32 -#define MAX_CHALLENGE_LENGTH 64 -#define MAX_RESPONSE_LENGTH 64 /* sufficient for MD5 or MS-CHAP */ - -/* - * Client (peer) states. - */ -#define CHAPCS_INITIAL 0 /* Lower layer down, not opened */ -#define CHAPCS_CLOSED 1 /* Lower layer up, not opened */ -#define CHAPCS_PENDING 2 /* Auth us to peer when lower up */ -#define CHAPCS_LISTEN 3 /* Listening for a challenge */ -#define CHAPCS_RESPONSE 4 /* Sent response, waiting for status */ -#define CHAPCS_OPEN 5 /* We've received Success */ - -/* - * Server (authenticator) states. - */ -#define CHAPSS_INITIAL 0 /* Lower layer down, not opened */ -#define CHAPSS_CLOSED 1 /* Lower layer up, not opened */ -#define CHAPSS_PENDING 2 /* Auth peer when lower up */ -#define CHAPSS_INITIAL_CHAL 3 /* We've sent the first challenge */ -#define CHAPSS_OPEN 4 /* We've sent a Success msg */ -#define CHAPSS_RECHALLENGE 5 /* We've sent another challenge */ -#define CHAPSS_BADAUTH 6 /* We've sent a Failure msg */ - -/************************ -*** PUBLIC DATA TYPES *** -************************/ - -/* - * Each interface is described by a chap structure. - */ - -typedef struct chap_state { - int unit; /* Interface unit number */ - int clientstate; /* Client state */ - int serverstate; /* Server state */ - u_char challenge[MAX_CHALLENGE_LENGTH]; /* last challenge string sent */ - u_char chal_len; /* challenge length */ - u_char chal_id; /* ID of last challenge */ - u_char chal_type; /* hash algorithm for challenges */ - u_char id; /* Current id */ - char *chal_name; /* Our name to use with challenge */ - int chal_interval; /* Time until we challenge peer again */ - int timeouttime; /* Timeout time in seconds */ - int max_transmits; /* Maximum # of challenge transmissions */ - int chal_transmits; /* Number of transmissions of challenge */ - int resp_transmits; /* Number of transmissions of response */ - u_char response[MAX_RESPONSE_LENGTH]; /* Response to send */ - u_char resp_length; /* length of response */ - u_char resp_id; /* ID for response messages */ - u_char resp_type; /* hash algorithm for responses */ - char *resp_name; /* Our name to send with response */ -} chap_state; - - -/****************** -*** PUBLIC DATA *** -******************/ -extern chap_state chap[]; - -extern struct protent chap_protent; - - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ - -void ChapAuthWithPeer (int, char *, int); -void ChapAuthPeer (int, char *, int); - -#endif /* CHAP_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/chpms.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/chpms.c deleted file mode 100644 index 01755ba3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/chpms.c +++ /dev/null @@ -1,398 +0,0 @@ -/*** WARNING - THIS CODE HAS NOT BEEN FINISHED! ***/ -/***************************************************************************** -* chpms.c - Network MicroSoft Challenge Handshake Authentication Protocol program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* Copyright (c) 1997 by Global Election Systems Inc. All rights reserved. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-08 Guy Lancaster , Global Election Systems Inc. -* Original based on BSD chap_ms.c. -*****************************************************************************/ -/* - * chap_ms.c - Microsoft MS-CHAP compatible implementation. - * - * Copyright (c) 1995 Eric Rosenquist, Strata Software Limited. - * http://www.strataware.com/ - * - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Eric Rosenquist. The name of the author may not be used to - * endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -/* - * Modifications by Lauri Pesonen / lpesonen@clinet.fi, april 1997 - * - * Implemented LANManager type password response to MS-CHAP challenges. - * Now pppd provides both NT style and LANMan style blocks, and the - * prefered is set by option "ms-lanman". Default is to use NT. - * The hash text (StdText) was taken from Win95 RASAPI32.DLL. - * - * You should also use DOMAIN\\USERNAME as described in README.MSCHAP80 - */ - -#define USE_CRYPT - - -#include "ppp.h" - -#if MSCHAP_SUPPORT > 0 - -#include "md4.h" -#ifndef USE_CRYPT -#include "des.h" -#endif -#include "chap.h" -#include "chpms.h" -#include "pppdebug.h" - - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ - - -/************************/ -/*** LOCAL DATA TYPES ***/ -/************************/ -typedef struct { - u_char LANManResp[24]; - u_char NTResp[24]; - u_char UseNT; /* If 1, ignore the LANMan response field */ -} MS_ChapResponse; -/* We use MS_CHAP_RESPONSE_LEN, rather than sizeof(MS_ChapResponse), - in case this struct gets padded. */ - - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ - -/* XXX Don't know what to do with these. */ -extern void setkey(const char *); -extern void encrypt(char *, int); - -static void DesEncrypt (u_char *, u_char *, u_char *); -static void MakeKey (u_char *, u_char *); - -#ifdef USE_CRYPT -static void Expand (u_char *, u_char *); -static void Collapse (u_char *, u_char *); -#endif - -static void ChallengeResponse( - u_char *challenge, /* IN 8 octets */ - u_char *pwHash, /* IN 16 octets */ - u_char *response /* OUT 24 octets */ -); -static void ChapMS_NT( - char *rchallenge, - int rchallenge_len, - char *secret, - int secret_len, - MS_ChapResponse *response -); -static u_char Get7Bits( - u_char *input, - int startBit -); - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -void ChapMS( - chap_state *cstate, - char *rchallenge, - int rchallenge_len, - char *secret, - int secret_len -) -{ - MS_ChapResponse response; -#ifdef MSLANMAN - extern int ms_lanman; -#endif - -#if 0 - CHAPDEBUG((LOG_INFO, "ChapMS: secret is '%.*s'\n", secret_len, secret)); -#endif - BZERO(&response, sizeof(response)); - - /* Calculate both always */ - ChapMS_NT(rchallenge, rchallenge_len, secret, secret_len, &response); - -#ifdef MSLANMAN - ChapMS_LANMan(rchallenge, rchallenge_len, secret, secret_len, &response); - - /* prefered method is set by option */ - response.UseNT = !ms_lanman; -#else - response.UseNT = 1; -#endif - - BCOPY(&response, cstate->response, MS_CHAP_RESPONSE_LEN); - cstate->resp_length = MS_CHAP_RESPONSE_LEN; -} - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ -static void ChallengeResponse( - u_char *challenge, /* IN 8 octets */ - u_char *pwHash, /* IN 16 octets */ - u_char *response /* OUT 24 octets */ -) -{ - char ZPasswordHash[21]; - - BZERO(ZPasswordHash, sizeof(ZPasswordHash)); - BCOPY(pwHash, ZPasswordHash, 16); - -#if 0 - log_packet(ZPasswordHash, sizeof(ZPasswordHash), "ChallengeResponse - ZPasswordHash", LOG_DEBUG); -#endif - - DesEncrypt(challenge, ZPasswordHash + 0, response + 0); - DesEncrypt(challenge, ZPasswordHash + 7, response + 8); - DesEncrypt(challenge, ZPasswordHash + 14, response + 16); - -#if 0 - log_packet(response, 24, "ChallengeResponse - response", LOG_DEBUG); -#endif -} - - -#ifdef USE_CRYPT -static void DesEncrypt( - u_char *clear, /* IN 8 octets */ - u_char *key, /* IN 7 octets */ - u_char *cipher /* OUT 8 octets */ -) -{ - u_char des_key[8]; - u_char crypt_key[66]; - u_char des_input[66]; - - MakeKey(key, des_key); - - Expand(des_key, crypt_key); - setkey(crypt_key); - -#if 0 - CHAPDEBUG((LOG_INFO, "DesEncrypt: 8 octet input : %02X%02X%02X%02X%02X%02X%02X%02X\n", - clear[0], clear[1], clear[2], clear[3], clear[4], clear[5], clear[6], clear[7])); -#endif - - Expand(clear, des_input); - encrypt(des_input, 0); - Collapse(des_input, cipher); - -#if 0 - CHAPDEBUG((LOG_INFO, "DesEncrypt: 8 octet output: %02X%02X%02X%02X%02X%02X%02X%02X\n", - cipher[0], cipher[1], cipher[2], cipher[3], cipher[4], cipher[5], cipher[6], cipher[7])); -#endif -} - -#else /* USE_CRYPT */ - -static void DesEncrypt( - u_char *clear, /* IN 8 octets */ - u_char *key, /* IN 7 octets */ - u_char *cipher /* OUT 8 octets */ -) -{ - des_cblock des_key; - des_key_schedule key_schedule; - - MakeKey(key, des_key); - - des_set_key(&des_key, key_schedule); - -#if 0 - CHAPDEBUG((LOG_INFO, "DesEncrypt: 8 octet input : %02X%02X%02X%02X%02X%02X%02X%02X\n", - clear[0], clear[1], clear[2], clear[3], clear[4], clear[5], clear[6], clear[7])); -#endif - - des_ecb_encrypt((des_cblock *)clear, (des_cblock *)cipher, key_schedule, 1); - -#if 0 - CHAPDEBUG((LOG_INFO, "DesEncrypt: 8 octet output: %02X%02X%02X%02X%02X%02X%02X%02X\n", - cipher[0], cipher[1], cipher[2], cipher[3], cipher[4], cipher[5], cipher[6], cipher[7])); -#endif -} - -#endif /* USE_CRYPT */ - - -static u_char Get7Bits( - u_char *input, - int startBit -) -{ - register unsigned int word; - - word = (unsigned)input[startBit / 8] << 8; - word |= (unsigned)input[startBit / 8 + 1]; - - word >>= 15 - (startBit % 8 + 7); - - return word & 0xFE; -} - -#ifdef USE_CRYPT - -/* in == 8-byte string (expanded version of the 56-bit key) - * out == 64-byte string where each byte is either 1 or 0 - * Note that the low-order "bit" is always ignored by by setkey() - */ -static void Expand(u_char *in, u_char *out) -{ - int j, c; - int i; - - for(i = 0; i < 64; in++){ - c = *in; - for(j = 7; j >= 0; j--) - *out++ = (c >> j) & 01; - i += 8; - } -} - -/* The inverse of Expand - */ -static void Collapse(u_char *in, u_char *out) -{ - int j; - int i; - unsigned int c; - - for (i = 0; i < 64; i += 8, out++) { - c = 0; - for (j = 7; j >= 0; j--, in++) - c |= *in << j; - *out = c & 0xff; - } -} -#endif - -static void MakeKey( - u_char *key, /* IN 56 bit DES key missing parity bits */ - u_char *des_key /* OUT 64 bit DES key with parity bits added */ -) -{ - des_key[0] = Get7Bits(key, 0); - des_key[1] = Get7Bits(key, 7); - des_key[2] = Get7Bits(key, 14); - des_key[3] = Get7Bits(key, 21); - des_key[4] = Get7Bits(key, 28); - des_key[5] = Get7Bits(key, 35); - des_key[6] = Get7Bits(key, 42); - des_key[7] = Get7Bits(key, 49); - -#ifndef USE_CRYPT - des_set_odd_parity((des_cblock *)des_key); -#endif - -#if 0 - CHAPDEBUG((LOG_INFO, "MakeKey: 56-bit input : %02X%02X%02X%02X%02X%02X%02X\n", - key[0], key[1], key[2], key[3], key[4], key[5], key[6])); - CHAPDEBUG((LOG_INFO, "MakeKey: 64-bit output: %02X%02X%02X%02X%02X%02X%02X%02X\n", - des_key[0], des_key[1], des_key[2], des_key[3], des_key[4], des_key[5], des_key[6], des_key[7])); -#endif -} - -static void ChapMS_NT( - char *rchallenge, - int rchallenge_len, - char *secret, - int secret_len, - MS_ChapResponse *response -) -{ - int i; - MDstruct md4Context; - u_char unicodePassword[MAX_NT_PASSWORD * 2]; - static int low_byte_first = -1; - - /* Initialize the Unicode version of the secret (== password). */ - /* This implicitly supports 8-bit ISO8859/1 characters. */ - BZERO(unicodePassword, sizeof(unicodePassword)); - for (i = 0; i < secret_len; i++) - unicodePassword[i * 2] = (u_char)secret[i]; - - MDbegin(&md4Context); - MDupdate(&md4Context, unicodePassword, secret_len * 2 * 8); /* Unicode is 2 bytes/char, *8 for bit count */ - - if (low_byte_first == -1) - low_byte_first = (htons((unsigned short int)1) != 1); - if (low_byte_first == 0) - MDreverse((u_long *)&md4Context); /* sfb 961105 */ - - MDupdate(&md4Context, NULL, 0); /* Tell MD4 we're done */ - - ChallengeResponse(rchallenge, (char *)md4Context.buffer, response->NTResp); -} - -#ifdef MSLANMAN -static u_char *StdText = (u_char *)"KGS!@#$%"; /* key from rasapi32.dll */ - -static ChapMS_LANMan( - char *rchallenge, - int rchallenge_len, - char *secret, - int secret_len, - MS_ChapResponse *response -) -{ - int i; - u_char UcasePassword[MAX_NT_PASSWORD]; /* max is actually 14 */ - u_char PasswordHash[16]; - - /* LANMan password is case insensitive */ - BZERO(UcasePassword, sizeof(UcasePassword)); - for (i = 0; i < secret_len; i++) - UcasePassword[i] = (u_char)toupper(secret[i]); - DesEncrypt( StdText, UcasePassword + 0, PasswordHash + 0 ); - DesEncrypt( StdText, UcasePassword + 7, PasswordHash + 8 ); - ChallengeResponse(rchallenge, PasswordHash, response->LANManResp); -} -#endif - -#endif /* MSCHAP_SUPPORT */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/chpms.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/chpms.h deleted file mode 100644 index 1a2bd41d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/chpms.h +++ /dev/null @@ -1,64 +0,0 @@ -/***************************************************************************** -* chpms.h - Network Microsoft Challenge Handshake Protocol header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1998 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 98-01-30 Guy Lancaster , Global Election Systems Inc. -* Original built from BSD network code. -******************************************************************************/ -/* - * chap.h - Challenge Handshake Authentication Protocol definitions. - * - * Copyright (c) 1995 Eric Rosenquist, Strata Software Limited. - * http://www.strataware.com/ - * - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Eric Rosenquist. The name of the author may not be used to - * endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * $Id$ - */ - -#ifndef CHPMS_H -#define CHPMS_H - -#define MAX_NT_PASSWORD 256 /* Maximum number of (Unicode) chars in an NT password */ - -void ChapMS (chap_state *, char *, int, char *, int); - -#endif /* CHPMS_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/fsm.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/fsm.c deleted file mode 100644 index a745bef4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/fsm.c +++ /dev/null @@ -1,842 +0,0 @@ -/***************************************************************************** -* fsm.c - Network Control Protocol Finite State Machine program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-01 Guy Lancaster , Global Election Systems Inc. -* Original based on BSD fsm.c. -*****************************************************************************/ -/* - * fsm.c - {Link, IP} Control Protocol Finite State Machine. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - - -/* - * TODO: - * Randomize fsm id on link/init. - * Deal with variable outgoing MTU. - */ - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "fsm.h" -#include "pppdebug.h" - - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ - - -/************************/ -/*** LOCAL DATA TYPES ***/ -/************************/ - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -static void fsm_timeout (void *); -static void fsm_rconfreq (fsm *, u_char, u_char *, int); -static void fsm_rconfack (fsm *, int, u_char *, int); -static void fsm_rconfnakrej (fsm *, int, int, u_char *, int); -static void fsm_rtermreq (fsm *, int, u_char *, int); -static void fsm_rtermack (fsm *); -static void fsm_rcoderej (fsm *, u_char *, int); -static void fsm_sconfreq (fsm *, int); - -#define PROTO_NAME(f) ((f)->callbacks->proto_name) - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -int peer_mru[NUM_PPP]; - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ - -/* - * fsm_init - Initialize fsm. - * - * Initialize fsm state. - */ -void fsm_init(fsm *f) -{ - f->state = INITIAL; - f->flags = 0; - f->id = 0; /* XXX Start with random id? */ - f->timeouttime = FSM_DEFTIMEOUT; - f->maxconfreqtransmits = FSM_DEFMAXCONFREQS; - f->maxtermtransmits = FSM_DEFMAXTERMREQS; - f->maxnakloops = FSM_DEFMAXNAKLOOPS; - f->term_reason_len = 0; -} - - -/* - * fsm_lowerup - The lower layer is up. - */ -void fsm_lowerup(fsm *f) -{ - int oldState = f->state; - ( void )oldState; - - switch( f->state ){ - case INITIAL: - f->state = CLOSED; - break; - - case STARTING: - if( f->flags & OPT_SILENT ) - f->state = STOPPED; - else { - /* Send an initial configure-request */ - fsm_sconfreq(f, 0); - f->state = REQSENT; - } - break; - - default: - FSMDEBUG((LOG_INFO, "%s: Up event in state %d!\n", - PROTO_NAME(f), f->state)); - } - - FSMDEBUG((LOG_INFO, "%s: lowerup state %d -> %d\n", - PROTO_NAME(f), oldState, f->state)); -} - - -/* - * fsm_lowerdown - The lower layer is down. - * - * Cancel all timeouts and inform upper layers. - */ -void fsm_lowerdown(fsm *f) -{ - int oldState = f->state; - ( void )oldState; - - switch( f->state ){ - case CLOSED: - f->state = INITIAL; - break; - - case STOPPED: - f->state = STARTING; - if( f->callbacks->starting ) - (*f->callbacks->starting)(f); - break; - - case CLOSING: - f->state = INITIAL; - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - break; - - case STOPPING: - case REQSENT: - case ACKRCVD: - case ACKSENT: - f->state = STARTING; - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - break; - - case OPENED: - if( f->callbacks->down ) - (*f->callbacks->down)(f); - f->state = STARTING; - break; - - default: - FSMDEBUG((LOG_INFO, "%s: Down event in state %d!\n", - PROTO_NAME(f), f->state)); - } - - FSMDEBUG((LOG_INFO, "%s: lowerdown state %d -> %d\n", - PROTO_NAME(f), oldState, f->state)); -} - - -/* - * fsm_open - Link is allowed to come up. - */ -void fsm_open(fsm *f) -{ - int oldState = f->state; - ( void )oldState; - - switch( f->state ){ - case INITIAL: - f->state = STARTING; - if( f->callbacks->starting ) - (*f->callbacks->starting)(f); - break; - - case CLOSED: - if( f->flags & OPT_SILENT ) - f->state = STOPPED; - else { - /* Send an initial configure-request */ - fsm_sconfreq(f, 0); - f->state = REQSENT; - } - break; - - case CLOSING: - f->state = STOPPING; - /* fall through */ - case STOPPED: - case OPENED: - if( f->flags & OPT_RESTART ){ - fsm_lowerdown(f); - fsm_lowerup(f); - } - break; - } - - FSMDEBUG((LOG_INFO, "%s: open state %d -> %d\n", - PROTO_NAME(f), oldState, f->state)); -} - - -/* - * fsm_close - Start closing connection. - * - * Cancel timeouts and either initiate close or possibly go directly to - * the CLOSED state. - */ -void fsm_close(fsm *f, char *reason) -{ - int oldState = f->state; - ( void )oldState; - - f->term_reason = reason; - f->term_reason_len = (reason == NULL? 0: strlen(reason)); - switch( f->state ){ - case STARTING: - f->state = INITIAL; - break; - case STOPPED: - f->state = CLOSED; - break; - case STOPPING: - f->state = CLOSING; - break; - - case REQSENT: - case ACKRCVD: - case ACKSENT: - case OPENED: - if( f->state != OPENED ) - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - else if( f->callbacks->down ) - (*f->callbacks->down)(f); /* Inform upper layers we're down */ - - /* Init restart counter, send Terminate-Request */ - f->retransmits = f->maxtermtransmits; - fsm_sdata(f, TERMREQ, f->reqid = ++f->id, - (u_char *) f->term_reason, f->term_reason_len); - TIMEOUT(fsm_timeout, f, f->timeouttime); - --f->retransmits; - - f->state = CLOSING; - break; - } - - FSMDEBUG((LOG_INFO, "%s: close reason=%s state %d -> %d\n", - PROTO_NAME(f), reason, oldState, f->state)); -} - - -/* - * fsm_sdata - Send some data. - * - * Used for all packets sent to our peer by this module. - */ -void fsm_sdata( - fsm *f, - u_char code, - u_char id, - u_char *data, - int datalen -) -{ - u_char *outp; - int outlen; - - /* Adjust length to be smaller than MTU */ - outp = outpacket_buf[f->unit]; - if (datalen > peer_mru[f->unit] - (int)HEADERLEN) - datalen = peer_mru[f->unit] - HEADERLEN; - if (datalen && data != outp + PPP_HDRLEN + HEADERLEN) - BCOPY(data, outp + PPP_HDRLEN + HEADERLEN, datalen); - outlen = datalen + HEADERLEN; - MAKEHEADER(outp, f->protocol); - PUTCHAR(code, outp); - PUTCHAR(id, outp); - PUTSHORT(outlen, outp); - pppWrite(f->unit, outpacket_buf[f->unit], outlen + PPP_HDRLEN); - FSMDEBUG((LOG_INFO, "fsm_sdata(%s): Sent code %d,%d,%d.\n", - PROTO_NAME(f), code, id, outlen)); -} - - -/* - * fsm_input - Input packet. - */ -void fsm_input(fsm *f, u_char *inpacket, int l) -{ - u_char *inp = inpacket; - u_char code, id; - int len; - - /* - * Parse header (code, id and length). - * If packet too short, drop it. - */ - if (l < HEADERLEN) { - FSMDEBUG((LOG_WARNING, "fsm_input(%x): Rcvd short header.\n", - f->protocol)); - return; - } - GETCHAR(code, inp); - GETCHAR(id, inp); - GETSHORT(len, inp); - if (len < HEADERLEN) { - FSMDEBUG((LOG_INFO, "fsm_input(%x): Rcvd illegal length.\n", - f->protocol)); - return; - } - if (len > l) { - FSMDEBUG((LOG_INFO, "fsm_input(%x): Rcvd short packet.\n", - f->protocol)); - return; - } - len -= HEADERLEN; /* subtract header length */ - - if( f->state == INITIAL || f->state == STARTING ){ - FSMDEBUG((LOG_INFO, "fsm_input(%x): Rcvd packet in state %d.\n", - f->protocol, f->state)); - return; - } - FSMDEBUG((LOG_INFO, "fsm_input(%s):%d,%d,%d\n", PROTO_NAME(f), code, id, l)); - /* - * Action depends on code. - */ - switch (code) { - case CONFREQ: - fsm_rconfreq(f, id, inp, len); - break; - - case CONFACK: - fsm_rconfack(f, id, inp, len); - break; - - case CONFNAK: - case CONFREJ: - fsm_rconfnakrej(f, code, id, inp, len); - break; - - case TERMREQ: - fsm_rtermreq(f, id, inp, len); - break; - - case TERMACK: - fsm_rtermack(f); - break; - - case CODEREJ: - fsm_rcoderej(f, inp, len); - break; - - default: - if( !f->callbacks->extcode - || !(*f->callbacks->extcode)(f, code, id, inp, len) ) - fsm_sdata(f, CODEREJ, ++f->id, inpacket, len + HEADERLEN); - break; - } -} - - -/* - * fsm_protreject - Peer doesn't speak this protocol. - * - * Treat this as a catastrophic error (RXJ-). - */ -void fsm_protreject(fsm *f) -{ - switch( f->state ){ - case CLOSING: - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - /* fall through */ - case CLOSED: - f->state = CLOSED; - if( f->callbacks->finished ) - (*f->callbacks->finished)(f); - break; - - case STOPPING: - case REQSENT: - case ACKRCVD: - case ACKSENT: - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - /* fall through */ - case STOPPED: - f->state = STOPPED; - if( f->callbacks->finished ) - (*f->callbacks->finished)(f); - break; - - case OPENED: - if( f->callbacks->down ) - (*f->callbacks->down)(f); - - /* Init restart counter, send Terminate-Request */ - f->retransmits = f->maxtermtransmits; - fsm_sdata(f, TERMREQ, f->reqid = ++f->id, - (u_char *) f->term_reason, f->term_reason_len); - TIMEOUT(fsm_timeout, f, f->timeouttime); - --f->retransmits; - - f->state = STOPPING; - break; - - default: - FSMDEBUG((LOG_INFO, "%s: Protocol-reject event in state %d!\n", - PROTO_NAME(f), f->state)); - } -} - - - - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ - -/* - * fsm_timeout - Timeout expired. - */ -static void fsm_timeout(void *arg) -{ - fsm *f = (fsm *) arg; - - switch (f->state) { - case CLOSING: - case STOPPING: - if( f->retransmits <= 0 ){ - FSMDEBUG((LOG_WARNING, "%s: timeout sending Terminate-Request state=%d\n", - PROTO_NAME(f), f->state)); - /* - * We've waited for an ack long enough. Peer probably heard us. - */ - f->state = (f->state == CLOSING)? CLOSED: STOPPED; - if( f->callbacks->finished ) - (*f->callbacks->finished)(f); - } else { - FSMDEBUG((LOG_WARNING, "%s: timeout resending Terminate-Requests state=%d\n", - PROTO_NAME(f), f->state)); - /* Send Terminate-Request */ - fsm_sdata(f, TERMREQ, f->reqid = ++f->id, - (u_char *) f->term_reason, f->term_reason_len); - TIMEOUT(fsm_timeout, f, f->timeouttime); - --f->retransmits; - } - break; - - case REQSENT: - case ACKRCVD: - case ACKSENT: - if (f->retransmits <= 0) { - FSMDEBUG((LOG_WARNING, "%s: timeout sending Config-Requests state=%d\n", - PROTO_NAME(f), f->state)); - f->state = STOPPED; - if( (f->flags & OPT_PASSIVE) == 0 && f->callbacks->finished ) - (*f->callbacks->finished)(f); - - } else { - FSMDEBUG((LOG_WARNING, "%s: timeout resending Config-Request state=%d\n", - PROTO_NAME(f), f->state)); - /* Retransmit the configure-request */ - if (f->callbacks->retransmit) - (*f->callbacks->retransmit)(f); - fsm_sconfreq(f, 1); /* Re-send Configure-Request */ - if( f->state == ACKRCVD ) - f->state = REQSENT; - } - break; - - default: - FSMDEBUG((LOG_INFO, "%s: Timeout event in state %d!\n", - PROTO_NAME(f), f->state)); - } -} - - -/* - * fsm_rconfreq - Receive Configure-Request. - */ -static void fsm_rconfreq(fsm *f, u_char id, u_char *inp, int len) -{ - int code, reject_if_disagree; - - FSMDEBUG((LOG_INFO, "fsm_rconfreq(%s): Rcvd id %d state=%d\n", - PROTO_NAME(f), id, f->state)); - switch( f->state ){ - case CLOSED: - /* Go away, we're closed */ - fsm_sdata(f, TERMACK, id, NULL, 0); - return; - case CLOSING: - case STOPPING: - return; - - case OPENED: - /* Go down and restart negotiation */ - if( f->callbacks->down ) - (*f->callbacks->down)(f); /* Inform upper layers */ - fsm_sconfreq(f, 0); /* Send initial Configure-Request */ - break; - - case STOPPED: - /* Negotiation started by our peer */ - fsm_sconfreq(f, 0); /* Send initial Configure-Request */ - f->state = REQSENT; - break; - } - - /* - * Pass the requested configuration options - * to protocol-specific code for checking. - */ - if (f->callbacks->reqci){ /* Check CI */ - reject_if_disagree = (f->nakloops >= f->maxnakloops); - code = (*f->callbacks->reqci)(f, inp, &len, reject_if_disagree); - } - else if (len) - code = CONFREJ; /* Reject all CI */ - else - code = CONFACK; - - /* send the Ack, Nak or Rej to the peer */ - fsm_sdata(f, (u_char)code, id, inp, len); - - if (code == CONFACK) { - if (f->state == ACKRCVD) { - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - f->state = OPENED; - if (f->callbacks->up) - (*f->callbacks->up)(f); /* Inform upper layers */ - } - else - f->state = ACKSENT; - f->nakloops = 0; - } - else { - /* we sent CONFACK or CONFREJ */ - if (f->state != ACKRCVD) - f->state = REQSENT; - if( code == CONFNAK ) - ++f->nakloops; - } -} - - -/* - * fsm_rconfack - Receive Configure-Ack. - */ -static void fsm_rconfack(fsm *f, int id, u_char *inp, int len) -{ - FSMDEBUG((LOG_INFO, "fsm_rconfack(%s): Rcvd id %d state=%d\n", - PROTO_NAME(f), id, f->state)); - - if (id != f->reqid || f->seen_ack) /* Expected id? */ - return; /* Nope, toss... */ - if( !(f->callbacks->ackci? (*f->callbacks->ackci)(f, inp, len): - (len == 0)) ){ - /* Ack is bad - ignore it */ - FSMDEBUG((LOG_INFO, "%s: received bad Ack (length %d)\n", - PROTO_NAME(f), len)); - return; - } - f->seen_ack = 1; - - switch (f->state) { - case CLOSED: - case STOPPED: - fsm_sdata(f, TERMACK, (u_char)id, NULL, 0); - break; - - case REQSENT: - f->state = ACKRCVD; - f->retransmits = f->maxconfreqtransmits; - break; - - case ACKRCVD: - /* Huh? an extra valid Ack? oh well... */ - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - fsm_sconfreq(f, 0); - f->state = REQSENT; - break; - - case ACKSENT: - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - f->state = OPENED; - f->retransmits = f->maxconfreqtransmits; - if (f->callbacks->up) - (*f->callbacks->up)(f); /* Inform upper layers */ - break; - - case OPENED: - /* Go down and restart negotiation */ - if (f->callbacks->down) - (*f->callbacks->down)(f); /* Inform upper layers */ - fsm_sconfreq(f, 0); /* Send initial Configure-Request */ - f->state = REQSENT; - break; - } -} - - -/* - * fsm_rconfnakrej - Receive Configure-Nak or Configure-Reject. - */ -static void fsm_rconfnakrej(fsm *f, int code, int id, u_char *inp, int len) -{ - int (*proc) (fsm *, u_char *, int); - int ret; - - FSMDEBUG((LOG_INFO, "fsm_rconfnakrej(%s): Rcvd id %d state=%d\n", - PROTO_NAME(f), id, f->state)); - - if (id != f->reqid || f->seen_ack) /* Expected id? */ - return; /* Nope, toss... */ - proc = (code == CONFNAK)? f->callbacks->nakci: f->callbacks->rejci; - if (!proc || !(ret = proc(f, inp, len))) { - /* Nak/reject is bad - ignore it */ - FSMDEBUG((LOG_INFO, "%s: received bad %s (length %d)\n", - PROTO_NAME(f), (code==CONFNAK? "Nak": "reject"), len)); - return; - } - f->seen_ack = 1; - - switch (f->state) { - case CLOSED: - case STOPPED: - fsm_sdata(f, TERMACK, (u_char)id, NULL, 0); - break; - - case REQSENT: - case ACKSENT: - /* They didn't agree to what we wanted - try another request */ - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - if (ret < 0) - f->state = STOPPED; /* kludge for stopping CCP */ - else - fsm_sconfreq(f, 0); /* Send Configure-Request */ - break; - - case ACKRCVD: - /* Got a Nak/reject when we had already had an Ack?? oh well... */ - UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ - fsm_sconfreq(f, 0); - f->state = REQSENT; - break; - - case OPENED: - /* Go down and restart negotiation */ - if (f->callbacks->down) - (*f->callbacks->down)(f); /* Inform upper layers */ - fsm_sconfreq(f, 0); /* Send initial Configure-Request */ - f->state = REQSENT; - break; - } -} - - -/* - * fsm_rtermreq - Receive Terminate-Req. - */ -static void fsm_rtermreq(fsm *f, int id, u_char *p, int len) -{ - FSMDEBUG((LOG_INFO, "fsm_rtermreq(%s): Rcvd id %d state=%d\n", - PROTO_NAME(f), id, f->state)); - - switch (f->state) { - case ACKRCVD: - case ACKSENT: - f->state = REQSENT; /* Start over but keep trying */ - break; - - case OPENED: - if (len > 0) { - FSMDEBUG((LOG_INFO, "%s terminated by peer (%x)\n", PROTO_NAME(f), p)); - } else { - FSMDEBUG((LOG_INFO, "%s terminated by peer\n", PROTO_NAME(f))); - } - if (f->callbacks->down) - (*f->callbacks->down)(f); /* Inform upper layers */ - f->retransmits = 0; - f->state = STOPPING; - TIMEOUT(fsm_timeout, f, f->timeouttime); - break; - } - - fsm_sdata(f, TERMACK, (u_char)id, NULL, 0); -} - - -/* - * fsm_rtermack - Receive Terminate-Ack. - */ -static void fsm_rtermack(fsm *f) -{ - FSMDEBUG((LOG_INFO, "fsm_rtermack(%s): state=%d\n", - PROTO_NAME(f), f->state)); - - switch (f->state) { - case CLOSING: - UNTIMEOUT(fsm_timeout, f); - f->state = CLOSED; - if( f->callbacks->finished ) - (*f->callbacks->finished)(f); - break; - case STOPPING: - UNTIMEOUT(fsm_timeout, f); - f->state = STOPPED; - if( f->callbacks->finished ) - (*f->callbacks->finished)(f); - break; - - case ACKRCVD: - f->state = REQSENT; - break; - - case OPENED: - if (f->callbacks->down) - (*f->callbacks->down)(f); /* Inform upper layers */ - fsm_sconfreq(f, 0); - break; - } -} - - -/* - * fsm_rcoderej - Receive an Code-Reject. - */ -static void fsm_rcoderej(fsm *f, u_char *inp, int len) -{ - u_char code, id; - - FSMDEBUG((LOG_INFO, "fsm_rcoderej(%s): state=%d\n", - PROTO_NAME(f), f->state)); - - if (len < HEADERLEN) { - FSMDEBUG((LOG_INFO, "fsm_rcoderej: Rcvd short Code-Reject packet!\n")); - return; - } - GETCHAR(code, inp); - GETCHAR(id, inp); - FSMDEBUG((LOG_WARNING, "%s: Rcvd Code-Reject for code %d, id %d\n", - PROTO_NAME(f), code, id)); - - if( f->state == ACKRCVD ) - f->state = REQSENT; -} - - -/* - * fsm_sconfreq - Send a Configure-Request. - */ -static void fsm_sconfreq(fsm *f, int retransmit) -{ - u_char *outp; - int cilen; - - if( f->state != REQSENT && f->state != ACKRCVD && f->state != ACKSENT ){ - /* Not currently negotiating - reset options */ - if( f->callbacks->resetci ) - (*f->callbacks->resetci)(f); - f->nakloops = 0; - } - - if( !retransmit ){ - /* New request - reset retransmission counter, use new ID */ - f->retransmits = f->maxconfreqtransmits; - f->reqid = ++f->id; - } - - f->seen_ack = 0; - - /* - * Make up the request packet - */ - outp = outpacket_buf[f->unit] + PPP_HDRLEN + HEADERLEN; - if( f->callbacks->cilen && f->callbacks->addci ){ - cilen = (*f->callbacks->cilen)(f); - if( cilen > peer_mru[f->unit] - (int)HEADERLEN ) - cilen = peer_mru[f->unit] - HEADERLEN; - if (f->callbacks->addci) - (*f->callbacks->addci)(f, outp, &cilen); - } else - cilen = 0; - - /* send the request to our peer */ - fsm_sdata(f, CONFREQ, f->reqid, outp, cilen); - - /* start the retransmit timer */ - --f->retransmits; - TIMEOUT(fsm_timeout, f, f->timeouttime); - - FSMDEBUG((LOG_INFO, "%s: sending Configure-Request, id %d\n", - PROTO_NAME(f), f->reqid)); -} - -#endif /* PPP_SUPPORT */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/fsm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/fsm.h deleted file mode 100644 index b2da3e3e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/fsm.h +++ /dev/null @@ -1,187 +0,0 @@ -/***************************************************************************** -* fsm.h - Network Control Protocol Finite State Machine header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* Copyright (c) 1997 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-11-05 Guy Lancaster , Global Election Systems Inc. -* Original based on BSD code. -*****************************************************************************/ -/* - * fsm.h - {Link, IP} Control Protocol Finite State Machine definitions. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * $Id$ - */ - -#ifndef FSM_H -#define FSM_H - - -/***************************************************************************** -************************* PUBLIC DEFINITIONS ********************************* -*****************************************************************************/ -/* - * LCP Packet header = Code, id, length. - */ -#define HEADERLEN (sizeof (u_char) + sizeof (u_char) + sizeof (u_short)) - - -/* - * CP (LCP, IPCP, etc.) codes. - */ -#define CONFREQ 1 /* Configuration Request */ -#define CONFACK 2 /* Configuration Ack */ -#define CONFNAK 3 /* Configuration Nak */ -#define CONFREJ 4 /* Configuration Reject */ -#define TERMREQ 5 /* Termination Request */ -#define TERMACK 6 /* Termination Ack */ -#define CODEREJ 7 /* Code Reject */ - -/* - * Link states. - */ -#define INITIAL 0 /* Down, hasn't been opened */ -#define STARTING 1 /* Down, been opened */ -#define CLOSED 2 /* Up, hasn't been opened */ -#define STOPPED 3 /* Open, waiting for down event */ -#define CLOSING 4 /* Terminating the connection, not open */ -#define STOPPING 5 /* Terminating, but open */ -#define REQSENT 6 /* We've sent a Config Request */ -#define ACKRCVD 7 /* We've received a Config Ack */ -#define ACKSENT 8 /* We've sent a Config Ack */ -#define OPENED 9 /* Connection available */ - - -/* - * Flags - indicate options controlling FSM operation - */ -#define OPT_PASSIVE 1 /* Don't die if we don't get a response */ -#define OPT_RESTART 2 /* Treat 2nd OPEN as DOWN, UP */ -#define OPT_SILENT 4 /* Wait for peer to speak first */ - - -/***************************************************************************** -************************* PUBLIC DATA TYPES ********************************** -*****************************************************************************/ -/* - * Each FSM is described by an fsm structure and fsm callbacks. - */ -typedef struct fsm { - int unit; /* Interface unit number */ - u_short protocol; /* Data Link Layer Protocol field value */ - int state; /* State */ - int flags; /* Contains option bits */ - u_char id; /* Current id */ - u_char reqid; /* Current request id */ - u_char seen_ack; /* Have received valid Ack/Nak/Rej to Req */ - int timeouttime; /* Timeout time in milliseconds */ - int maxconfreqtransmits;/* Maximum Configure-Request transmissions */ - int retransmits; /* Number of retransmissions left */ - int maxtermtransmits; /* Maximum Terminate-Request transmissions */ - int nakloops; /* Number of nak loops since last ack */ - int maxnakloops; /* Maximum number of nak loops tolerated */ - struct fsm_callbacks* callbacks;/* Callback routines */ - char* term_reason; /* Reason for closing protocol */ - int term_reason_len; /* Length of term_reason */ -} fsm; - - -typedef struct fsm_callbacks { - void (*resetci) /* Reset our Configuration Information */ - (fsm*); - int (*cilen) /* Length of our Configuration Information */ - (fsm*); - void (*addci) /* Add our Configuration Information */ - (fsm*, u_char*, int*); - int (*ackci) /* ACK our Configuration Information */ - (fsm*, u_char*, int); - int (*nakci) /* NAK our Configuration Information */ - (fsm*, u_char*, int); - int (*rejci) /* Reject our Configuration Information */ - (fsm*, u_char*, int); - int (*reqci) /* Request peer's Configuration Information */ - (fsm*, u_char*, int*, int); - void (*up) /* Called when fsm reaches OPENED state */ - (fsm*); - void (*down) /* Called when fsm leaves OPENED state */ - (fsm*); - void (*starting) /* Called when we want the lower layer */ - (fsm*); - void (*finished) /* Called when we don't want the lower layer */ - (fsm*); - void (*protreject) /* Called when Protocol-Reject received */ - (int); - void (*retransmit) /* Retransmission is necessary */ - (fsm*); - int (*extcode) /* Called when unknown code received */ - (fsm*, int, u_char, u_char*, int); - char *proto_name; /* String name for protocol (for messages) */ -} fsm_callbacks; - - -/***************************************************************************** -*********************** PUBLIC DATA STRUCTURES ******************************* -*****************************************************************************/ -/* - * Variables - */ -extern int peer_mru[]; /* currently negotiated peer MRU (per unit) */ - - -/***************************************************************************** -************************** PUBLIC FUNCTIONS ********************************** -*****************************************************************************/ - -/* - * Prototypes - */ -void fsm_init (fsm*); -void fsm_lowerup (fsm*); -void fsm_lowerdown (fsm*); -void fsm_open (fsm*); -void fsm_close (fsm*, char*); -void fsm_input (fsm*, u_char*, int); -void fsm_protreject (fsm*); -void fsm_sdata (fsm*, u_char, u_char, u_char*, int); - - -#endif /* FSM_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/ipcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/ipcp.c deleted file mode 100644 index d5b25188..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/ipcp.c +++ /dev/null @@ -1,1377 +0,0 @@ -/***************************************************************************** -* ipcp.c - Network PPP IP Control Protocol program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-08 Guy Lancaster , Global Election Systems Inc. -* Original. -*****************************************************************************/ -/* - * ipcp.c - PPP IP Control Protocol. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "auth.h" -#include "fsm.h" -#include "vj.h" -#include "ipcp.h" -#include "pppdebug.h" - - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ -/* #define OLD_CI_ADDRS 1 */ /* Support deprecated address negotiation. */ - -/* - * Lengths of configuration options. - */ -#define CILEN_VOID 2 -#define CILEN_COMPRESS 4 /* min length for compression protocol opt. */ -#define CILEN_VJ 6 /* length for RFC1332 Van-Jacobson opt. */ -#define CILEN_ADDR 6 /* new-style single address option */ -#define CILEN_ADDRS 10 /* old-style dual address option */ - - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -/* - * Callbacks for fsm code. (CI = Configuration Information) - */ -static void ipcp_resetci (fsm *); /* Reset our CI */ -static int ipcp_cilen (fsm *); /* Return length of our CI */ -static void ipcp_addci (fsm *, u_char *, int *); /* Add our CI */ -static int ipcp_ackci (fsm *, u_char *, int); /* Peer ack'd our CI */ -static int ipcp_nakci (fsm *, u_char *, int); /* Peer nak'd our CI */ -static int ipcp_rejci (fsm *, u_char *, int); /* Peer rej'd our CI */ -static int ipcp_reqci (fsm *, u_char *, int *, int); /* Rcv CI */ -static void ipcp_up (fsm *); /* We're UP */ -static void ipcp_down (fsm *); /* We're DOWN */ -#if 0 -static void ipcp_script (fsm *, char *); /* Run an up/down script */ -#endif -static void ipcp_finished (fsm *); /* Don't need lower layer */ - -/* - * Protocol entry points from main code. - */ -static void ipcp_init (int); -static void ipcp_open (int); -static void ipcp_close (int, char *); -static void ipcp_lowerup (int); -static void ipcp_lowerdown (int); -static void ipcp_input (int, u_char *, int); -static void ipcp_protrej (int); - -static void ipcp_clear_addrs (int); - -#define CODENAME(x) ((x) == CONFACK ? "ACK" : \ - (x) == CONFNAK ? "NAK" : "REJ") - - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ -/* global vars */ -ipcp_options ipcp_wantoptions[NUM_PPP]; /* Options that we want to request */ -ipcp_options ipcp_gotoptions[NUM_PPP]; /* Options that peer ack'd */ -ipcp_options ipcp_allowoptions[NUM_PPP]; /* Options we allow peer to request */ -ipcp_options ipcp_hisoptions[NUM_PPP]; /* Options that we ack'd */ - -fsm ipcp_fsm[NUM_PPP]; /* IPCP fsm structure */ - -struct protent ipcp_protent = { - PPP_IPCP, - ipcp_init, - ipcp_input, - ipcp_protrej, - ipcp_lowerup, - ipcp_lowerdown, - ipcp_open, - ipcp_close, -#if 0 - ipcp_printpkt, - NULL, -#endif - 1, - "IPCP", -#if 0 - ip_check_options, - NULL, - ip_active_pkt -#endif -}; - - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -/* local vars */ -static int cis_received[NUM_PPP]; /* # Conf-Reqs received */ -static int default_route_set[NUM_PPP]; /* Have set up a default route */ - -static fsm_callbacks ipcp_callbacks = { /* IPCP callback routines */ - ipcp_resetci, /* Reset our Configuration Information */ - ipcp_cilen, /* Length of our Configuration Information */ - ipcp_addci, /* Add our Configuration Information */ - ipcp_ackci, /* ACK our Configuration Information */ - ipcp_nakci, /* NAK our Configuration Information */ - ipcp_rejci, /* Reject our Configuration Information */ - ipcp_reqci, /* Request peer's Configuration Information */ - ipcp_up, /* Called when fsm reaches OPENED state */ - ipcp_down, /* Called when fsm leaves OPENED state */ - NULL, /* Called when we want the lower layer up */ - ipcp_finished, /* Called when we want the lower layer down */ - NULL, /* Called when Protocol-Reject received */ - NULL, /* Retransmission is necessary */ - NULL, /* Called to handle protocol-specific codes */ - "IPCP" /* String name of protocol */ -}; - - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ - -/* - * Non-standard inet_ntoa left here for compat with original ppp - * sources. Assumes u32_t instead of struct in_addr. - */ - -char * _inet_ntoa(u32_t n) -{ - struct in_addr ia; - ia.s_addr = n; - return inet_ntoa(ia); -} - -#define inet_ntoa _inet_ntoa - -/* - * ipcp_init - Initialize IPCP. - */ -static void ipcp_init(int unit) -{ - fsm *f = &ipcp_fsm[unit]; - ipcp_options *wo = &ipcp_wantoptions[unit]; - ipcp_options *ao = &ipcp_allowoptions[unit]; - - f->unit = unit; - f->protocol = PPP_IPCP; - f->callbacks = &ipcp_callbacks; - fsm_init(&ipcp_fsm[unit]); - - memset(wo, 0, sizeof(*wo)); - memset(ao, 0, sizeof(*ao)); - - wo->neg_addr = 1; - wo->ouraddr = 0; -#if VJ_SUPPORT > 0 - wo->neg_vj = 1; -#else - wo->neg_vj = 0; -#endif - wo->vj_protocol = IPCP_VJ_COMP; - wo->maxslotindex = MAX_SLOTS - 1; - wo->cflag = 0; - - wo->default_route = 1; - - ao->neg_addr = 1; -#if VJ_SUPPORT > 0 - ao->neg_vj = 1; -#else - ao->neg_vj = 0; -#endif - ao->maxslotindex = MAX_SLOTS - 1; - ao->cflag = 1; - - ao->default_route = 1; -} - - -/* - * ipcp_open - IPCP is allowed to come up. - */ -static void ipcp_open(int unit) -{ - fsm_open(&ipcp_fsm[unit]); -} - - -/* - * ipcp_close - Take IPCP down. - */ -static void ipcp_close(int unit, char *reason) -{ - fsm_close(&ipcp_fsm[unit], reason); -} - - -/* - * ipcp_lowerup - The lower layer is up. - */ -static void ipcp_lowerup(int unit) -{ - fsm_lowerup(&ipcp_fsm[unit]); -} - - -/* - * ipcp_lowerdown - The lower layer is down. - */ -static void ipcp_lowerdown(int unit) -{ - fsm_lowerdown(&ipcp_fsm[unit]); -} - - -/* - * ipcp_input - Input IPCP packet. - */ -static void ipcp_input(int unit, u_char *p, int len) -{ - fsm_input(&ipcp_fsm[unit], p, len); -} - - -/* - * ipcp_protrej - A Protocol-Reject was received for IPCP. - * - * Pretend the lower layer went down, so we shut up. - */ -static void ipcp_protrej(int unit) -{ - fsm_lowerdown(&ipcp_fsm[unit]); -} - - -/* - * ipcp_resetci - Reset our CI. - */ -static void ipcp_resetci(fsm *f) -{ - ipcp_options *wo = &ipcp_wantoptions[f->unit]; - - wo->req_addr = wo->neg_addr && ipcp_allowoptions[f->unit].neg_addr; - if (wo->ouraddr == 0) - wo->accept_local = 1; - if (wo->hisaddr == 0) - wo->accept_remote = 1; - /* Request DNS addresses from the peer */ - wo->req_dns1 = ppp_settings.usepeerdns; - wo->req_dns2 = ppp_settings.usepeerdns; - ipcp_gotoptions[f->unit] = *wo; - cis_received[f->unit] = 0; -} - - -/* - * ipcp_cilen - Return length of our CI. - */ -static int ipcp_cilen(fsm *f) -{ - ipcp_options *go = &ipcp_gotoptions[f->unit]; - ipcp_options *wo = &ipcp_wantoptions[f->unit]; - ipcp_options *ho = &ipcp_hisoptions[f->unit]; - -#define LENCIVJ(neg, old) (neg ? (old? CILEN_COMPRESS : CILEN_VJ) : 0) -#define LENCIADDR(neg, old) (neg ? (old? CILEN_ADDRS : CILEN_ADDR) : 0) -#define LENCIDNS(neg) (neg ? (CILEN_ADDR) : 0) - - /* - * First see if we want to change our options to the old - * forms because we have received old forms from the peer. - */ - if (wo->neg_addr && !go->neg_addr && !go->old_addrs) { - /* use the old style of address negotiation */ - go->neg_addr = 1; - go->old_addrs = 1; - } - if (wo->neg_vj && !go->neg_vj && !go->old_vj) { - /* try an older style of VJ negotiation */ - if (cis_received[f->unit] == 0) { - /* keep trying the new style until we see some CI from the peer */ - go->neg_vj = 1; - } else { - /* use the old style only if the peer did */ - if (ho->neg_vj && ho->old_vj) { - go->neg_vj = 1; - go->old_vj = 1; - go->vj_protocol = ho->vj_protocol; - } - } - } - - return (LENCIADDR(go->neg_addr, go->old_addrs) - + LENCIVJ(go->neg_vj, go->old_vj) + - LENCIDNS(go->req_dns1) + - LENCIDNS(go->req_dns2)); -} - - -/* - * ipcp_addci - Add our desired CIs to a packet. - */ -static void ipcp_addci(fsm *f, u_char *ucp, int *lenp) -{ - ipcp_options *go = &ipcp_gotoptions[f->unit]; - int len = *lenp; - -#define ADDCIVJ(opt, neg, val, old, maxslotindex, cflag) \ - if (neg) { \ - int vjlen = old? CILEN_COMPRESS : CILEN_VJ; \ - if (len >= vjlen) { \ - PUTCHAR(opt, ucp); \ - PUTCHAR(vjlen, ucp); \ - PUTSHORT(val, ucp); \ - if (!old) { \ - PUTCHAR(maxslotindex, ucp); \ - PUTCHAR(cflag, ucp); \ - } \ - len -= vjlen; \ - } else \ - neg = 0; \ - } - -#define ADDCIADDR(opt, neg, old, val1, val2) \ - if (neg) { \ - int addrlen = (old? CILEN_ADDRS: CILEN_ADDR); \ - if (len >= addrlen) { \ - u32_t l; \ - PUTCHAR(opt, ucp); \ - PUTCHAR(addrlen, ucp); \ - l = ntohl(val1); \ - PUTLONG(l, ucp); \ - if (old) { \ - l = ntohl(val2); \ - PUTLONG(l, ucp); \ - } \ - len -= addrlen; \ - } else \ - neg = 0; \ - } - -#define ADDCIDNS(opt, neg, addr) \ - if (neg) { \ - if (len >= CILEN_ADDR) { \ - u32_t l; \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_ADDR, ucp); \ - l = ntohl(addr); \ - PUTLONG(l, ucp); \ - len -= CILEN_ADDR; \ - } else \ - neg = 0; \ - } - - ADDCIADDR((go->old_addrs? CI_ADDRS: CI_ADDR), go->neg_addr, - go->old_addrs, go->ouraddr, go->hisaddr); - - ADDCIVJ(CI_COMPRESSTYPE, go->neg_vj, go->vj_protocol, go->old_vj, - go->maxslotindex, go->cflag); - - ADDCIDNS(CI_MS_DNS1, go->req_dns1, go->dnsaddr[0]); - - ADDCIDNS(CI_MS_DNS2, go->req_dns2, go->dnsaddr[1]); - - *lenp -= len; -} - - -/* - * ipcp_ackci - Ack our CIs. - * - * Returns: - * 0 - Ack was bad. - * 1 - Ack was good. - */ -static int ipcp_ackci(fsm *f, u_char *p, int len) -{ - ipcp_options *go = &ipcp_gotoptions[f->unit]; - u_short cilen, citype, cishort; - u32_t cilong; - u_char cimaxslotindex, cicflag; - - /* - * CIs must be in exactly the same order that we sent... - * Check packet length and CI length at each step. - * If we find any deviations, then this packet is bad. - */ - -#define ACKCIVJ(opt, neg, val, old, maxslotindex, cflag) \ - if (neg) { \ - int vjlen = old? CILEN_COMPRESS : CILEN_VJ; \ - if ((len -= vjlen) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != vjlen || \ - citype != opt) \ - goto bad; \ - GETSHORT(cishort, p); \ - if (cishort != val) \ - goto bad; \ - if (!old) { \ - GETCHAR(cimaxslotindex, p); \ - if (cimaxslotindex != maxslotindex) \ - goto bad; \ - GETCHAR(cicflag, p); \ - if (cicflag != cflag) \ - goto bad; \ - } \ - } - -#define ACKCIADDR(opt, neg, old, val1, val2) \ - if (neg) { \ - int addrlen = (old? CILEN_ADDRS: CILEN_ADDR); \ - u32_t l; \ - if ((len -= addrlen) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != addrlen || \ - citype != opt) \ - goto bad; \ - GETLONG(l, p); \ - cilong = htonl(l); \ - if (val1 != cilong) \ - goto bad; \ - if (old) { \ - GETLONG(l, p); \ - cilong = htonl(l); \ - if (val2 != cilong) \ - goto bad; \ - } \ - } - -#define ACKCIDNS(opt, neg, addr) \ - if (neg) { \ - u32_t l; \ - if ((len -= CILEN_ADDR) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_ADDR || \ - citype != opt) \ - goto bad; \ - GETLONG(l, p); \ - cilong = htonl(l); \ - if (addr != cilong) \ - goto bad; \ - } - - ACKCIADDR((go->old_addrs? CI_ADDRS: CI_ADDR), go->neg_addr, - go->old_addrs, go->ouraddr, go->hisaddr); - - ACKCIVJ(CI_COMPRESSTYPE, go->neg_vj, go->vj_protocol, go->old_vj, - go->maxslotindex, go->cflag); - - ACKCIDNS(CI_MS_DNS1, go->req_dns1, go->dnsaddr[0]); - - ACKCIDNS(CI_MS_DNS2, go->req_dns2, go->dnsaddr[1]); - - /* - * If there are any remaining CIs, then this packet is bad. - */ - if (len != 0) - goto bad; - return (1); - -bad: - IPCPDEBUG((LOG_INFO, "ipcp_ackci: received bad Ack!\n")); - return (0); -} - -/* - * ipcp_nakci - Peer has sent a NAK for some of our CIs. - * This should not modify any state if the Nak is bad - * or if IPCP is in the OPENED state. - * - * Returns: - * 0 - Nak was bad. - * 1 - Nak was good. - */ -static int ipcp_nakci(fsm *f, u_char *p, int len) -{ - ipcp_options *go = &ipcp_gotoptions[f->unit]; - u_char cimaxslotindex, cicflag; - u_char citype, cilen, *next; - u_short cishort; - u32_t ciaddr1, ciaddr2, l, cidnsaddr; - ipcp_options no; /* options we've seen Naks for */ - ipcp_options try; /* options to request next time */ - - BZERO(&no, sizeof(no)); - try = *go; - - /* - * Any Nak'd CIs must be in exactly the same order that we sent. - * Check packet length and CI length at each step. - * If we find any deviations, then this packet is bad. - */ -#define NAKCIADDR(opt, neg, old, code) \ - if (go->neg && \ - len >= (cilen = (old? CILEN_ADDRS: CILEN_ADDR)) && \ - p[1] == cilen && \ - p[0] == opt) { \ - len -= cilen; \ - INCPTR(2, p); \ - GETLONG(l, p); \ - ciaddr1 = htonl(l); \ - if (old) { \ - GETLONG(l, p); \ - ciaddr2 = htonl(l); \ - no.old_addrs = 1; \ - } else \ - ciaddr2 = 0; \ - no.neg = 1; \ - code \ - } - -#define NAKCIVJ(opt, neg, code) \ - if (go->neg && \ - ((cilen = p[1]) == CILEN_COMPRESS || cilen == CILEN_VJ) && \ - len >= cilen && \ - p[0] == opt) { \ - len -= cilen; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - no.neg = 1; \ - code \ - } - -#define NAKCIDNS(opt, neg, code) \ - if (go->neg && \ - ((cilen = p[1]) == CILEN_ADDR) && \ - len >= cilen && \ - p[0] == opt) { \ - len -= cilen; \ - INCPTR(2, p); \ - GETLONG(l, p); \ - cidnsaddr = htonl(l); \ - no.neg = 1; \ - code \ - } - - /* - * Accept the peer's idea of {our,his} address, if different - * from our idea, only if the accept_{local,remote} flag is set. - */ - NAKCIADDR((go->old_addrs? CI_ADDRS: CI_ADDR), neg_addr, go->old_addrs, - if (go->accept_local && ciaddr1) { /* Do we know our address? */ - try.ouraddr = ciaddr1; - IPCPDEBUG((LOG_INFO, "local IP address %s\n", - inet_ntoa(ciaddr1))); - } - if (go->accept_remote && ciaddr2) { /* Does he know his? */ - try.hisaddr = ciaddr2; - IPCPDEBUG((LOG_INFO, "remote IP address %s\n", - inet_ntoa(ciaddr2))); - } - ); - - /* - * Accept the peer's value of maxslotindex provided that it - * is less than what we asked for. Turn off slot-ID compression - * if the peer wants. Send old-style compress-type option if - * the peer wants. - */ - NAKCIVJ(CI_COMPRESSTYPE, neg_vj, - if (cilen == CILEN_VJ) { - GETCHAR(cimaxslotindex, p); - GETCHAR(cicflag, p); - if (cishort == IPCP_VJ_COMP) { - try.old_vj = 0; - if (cimaxslotindex < go->maxslotindex) - try.maxslotindex = cimaxslotindex; - if (!cicflag) - try.cflag = 0; - } else { - try.neg_vj = 0; - } - } else { - if (cishort == IPCP_VJ_COMP || cishort == IPCP_VJ_COMP_OLD) { - try.old_vj = 1; - try.vj_protocol = cishort; - } else { - try.neg_vj = 0; - } - } - ); - - NAKCIDNS(CI_MS_DNS1, req_dns1, - try.dnsaddr[0] = cidnsaddr; - IPCPDEBUG((LOG_INFO, "primary DNS address %s\n", inet_ntoa(cidnsaddr))); - ); - - NAKCIDNS(CI_MS_DNS2, req_dns2, - try.dnsaddr[1] = cidnsaddr; - IPCPDEBUG((LOG_INFO, "secondary DNS address %s\n", inet_ntoa(cidnsaddr))); - ); - - /* - * There may be remaining CIs, if the peer is requesting negotiation - * on an option that we didn't include in our request packet. - * If they want to negotiate about IP addresses, we comply. - * If they want us to ask for compression, we refuse. - */ - while (len > CILEN_VOID) { - GETCHAR(citype, p); - GETCHAR(cilen, p); - if( (len -= cilen) < 0 ) - goto bad; - next = p + cilen - 2; - - switch (citype) { - case CI_COMPRESSTYPE: - if (go->neg_vj || no.neg_vj || - (cilen != CILEN_VJ && cilen != CILEN_COMPRESS)) - goto bad; - no.neg_vj = 1; - break; - case CI_ADDRS: - if ((go->neg_addr && go->old_addrs) || no.old_addrs - || cilen != CILEN_ADDRS) - goto bad; - try.neg_addr = 1; - try.old_addrs = 1; - GETLONG(l, p); - ciaddr1 = htonl(l); - if (ciaddr1 && go->accept_local) - try.ouraddr = ciaddr1; - GETLONG(l, p); - ciaddr2 = htonl(l); - if (ciaddr2 && go->accept_remote) - try.hisaddr = ciaddr2; - no.old_addrs = 1; - break; - case CI_ADDR: - if (go->neg_addr || no.neg_addr || cilen != CILEN_ADDR) - goto bad; - try.old_addrs = 0; - GETLONG(l, p); - ciaddr1 = htonl(l); - if (ciaddr1 && go->accept_local) - try.ouraddr = ciaddr1; - if (try.ouraddr != 0) - try.neg_addr = 1; - no.neg_addr = 1; - break; - } - p = next; - } - - /* If there is still anything left, this packet is bad. */ - if (len != 0) - goto bad; - - /* - * OK, the Nak is good. Now we can update state. - */ - if (f->state != OPENED) - *go = try; - - return 1; - -bad: - IPCPDEBUG((LOG_INFO, "ipcp_nakci: received bad Nak!\n")); - return 0; -} - - -/* - * ipcp_rejci - Reject some of our CIs. - */ -static int ipcp_rejci(fsm *f, u_char *p, int len) -{ - ipcp_options *go = &ipcp_gotoptions[f->unit]; - u_char cimaxslotindex, ciflag, cilen; - u_short cishort; - u32_t cilong; - ipcp_options try; /* options to request next time */ - - try = *go; - /* - * Any Rejected CIs must be in exactly the same order that we sent. - * Check packet length and CI length at each step. - * If we find any deviations, then this packet is bad. - */ -#define REJCIADDR(opt, neg, old, val1, val2) \ - if (go->neg && \ - len >= (cilen = old? CILEN_ADDRS: CILEN_ADDR) && \ - p[1] == cilen && \ - p[0] == opt) { \ - u32_t l; \ - len -= cilen; \ - INCPTR(2, p); \ - GETLONG(l, p); \ - cilong = htonl(l); \ - /* Check rejected value. */ \ - if (cilong != val1) \ - goto bad; \ - if (old) { \ - GETLONG(l, p); \ - cilong = htonl(l); \ - /* Check rejected value. */ \ - if (cilong != val2) \ - goto bad; \ - } \ - try.neg = 0; \ - } - -#define REJCIVJ(opt, neg, val, old, maxslot, cflag) \ - if (go->neg && \ - p[1] == (old? CILEN_COMPRESS : CILEN_VJ) && \ - len >= p[1] && \ - p[0] == opt) { \ - len -= p[1]; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - /* Check rejected value. */ \ - if (cishort != val) \ - goto bad; \ - if (!old) { \ - GETCHAR(cimaxslotindex, p); \ - if (cimaxslotindex != maxslot) \ - goto bad; \ - GETCHAR(ciflag, p); \ - if (ciflag != cflag) \ - goto bad; \ - } \ - try.neg = 0; \ - } - -#define REJCIDNS(opt, neg, dnsaddr) \ - if (go->neg && \ - ((cilen = p[1]) == CILEN_ADDR) && \ - len >= cilen && \ - p[0] == opt) { \ - u32_t l; \ - len -= cilen; \ - INCPTR(2, p); \ - GETLONG(l, p); \ - cilong = htonl(l); \ - /* Check rejected value. */ \ - if (cilong != dnsaddr) \ - goto bad; \ - try.neg = 0; \ - } - - REJCIADDR((go->old_addrs? CI_ADDRS: CI_ADDR), neg_addr, - go->old_addrs, go->ouraddr, go->hisaddr); - - REJCIVJ(CI_COMPRESSTYPE, neg_vj, go->vj_protocol, go->old_vj, - go->maxslotindex, go->cflag); - - REJCIDNS(CI_MS_DNS1, req_dns1, go->dnsaddr[0]); - - REJCIDNS(CI_MS_DNS2, req_dns2, go->dnsaddr[1]); - - /* - * If there are any remaining CIs, then this packet is bad. - */ - if (len != 0) - goto bad; - /* - * Now we can update state. - */ - if (f->state != OPENED) - *go = try; - return 1; - -bad: - IPCPDEBUG((LOG_INFO, "ipcp_rejci: received bad Reject!\n")); - return 0; -} - - -/* - * ipcp_reqci - Check the peer's requested CIs and send appropriate response. - * - * Returns: CONFACK, CONFNAK or CONFREJ and input packet modified - * appropriately. If reject_if_disagree is non-zero, doesn't return - * CONFNAK; returns CONFREJ if it can't return CONFACK. - */ -static int ipcp_reqci( - fsm *f, - u_char *inp, /* Requested CIs */ - int *len, /* Length of requested CIs */ - int reject_if_disagree -) -{ - ipcp_options *wo = &ipcp_wantoptions[f->unit]; - ipcp_options *ho = &ipcp_hisoptions[f->unit]; - ipcp_options *ao = &ipcp_allowoptions[f->unit]; -#ifdef OLD_CI_ADDRS - ipcp_options *go = &ipcp_gotoptions[f->unit]; -#endif - u_char *cip, *next; /* Pointer to current and next CIs */ - u_short cilen, citype; /* Parsed len, type */ - u_short cishort; /* Parsed short value */ - u32_t tl, ciaddr1; /* Parsed address values */ -#ifdef OLD_CI_ADDRS - u32_t ciaddr2; /* Parsed address values */ -#endif - int rc = CONFACK; /* Final packet return code */ - int orc; /* Individual option return code */ - u_char *p; /* Pointer to next char to parse */ - u_char *ucp = inp; /* Pointer to current output char */ - int l = *len; /* Length left */ - u_char maxslotindex, cflag; - int d; - - cis_received[f->unit] = 1; - - /* - * Reset all his options. - */ - BZERO(ho, sizeof(*ho)); - - /* - * Process all his options. - */ - next = inp; - while (l) { - orc = CONFACK; /* Assume success */ - cip = p = next; /* Remember begining of CI */ - if (l < 2 || /* Not enough data for CI header or */ - p[1] < 2 || /* CI length too small or */ - p[1] > l) { /* CI length too big? */ - IPCPDEBUG((LOG_INFO, "ipcp_reqci: bad CI length!\n")); - orc = CONFREJ; /* Reject bad CI */ - cilen = l; /* Reject till end of packet */ - l = 0; /* Don't loop again */ - goto endswitch; - } - GETCHAR(citype, p); /* Parse CI type */ - GETCHAR(cilen, p); /* Parse CI length */ - l -= cilen; /* Adjust remaining length */ - next += cilen; /* Step to next CI */ - - switch (citype) { /* Check CI type */ -#ifdef OLD_CI_ADDRS /* Need to save space... */ - case CI_ADDRS: - IPCPDEBUG((LOG_INFO, "ipcp_reqci: received ADDRS\n")); - if (!ao->neg_addr || - cilen != CILEN_ADDRS) { /* Check CI length */ - orc = CONFREJ; /* Reject CI */ - break; - } - - /* - * If he has no address, or if we both have his address but - * disagree about it, then NAK it with our idea. - * In particular, if we don't know his address, but he does, - * then accept it. - */ - GETLONG(tl, p); /* Parse source address (his) */ - ciaddr1 = htonl(tl); - IPCPDEBUG((LOG_INFO, "his addr %s\n", inet_ntoa(ciaddr1))); - if (ciaddr1 != wo->hisaddr - && (ciaddr1 == 0 || !wo->accept_remote)) { - orc = CONFNAK; - if (!reject_if_disagree) { - DECPTR(sizeof(u32_t), p); - tl = ntohl(wo->hisaddr); - PUTLONG(tl, p); - } - } else if (ciaddr1 == 0 && wo->hisaddr == 0) { - /* - * If neither we nor he knows his address, reject the option. - */ - orc = CONFREJ; - wo->req_addr = 0; /* don't NAK with 0.0.0.0 later */ - break; - } - - /* - * If he doesn't know our address, or if we both have our address - * but disagree about it, then NAK it with our idea. - */ - GETLONG(tl, p); /* Parse desination address (ours) */ - ciaddr2 = htonl(tl); - IPCPDEBUG((LOG_INFO, "our addr %s\n", inet_ntoa(ciaddr2))); - if (ciaddr2 != wo->ouraddr) { - if (ciaddr2 == 0 || !wo->accept_local) { - orc = CONFNAK; - if (!reject_if_disagree) { - DECPTR(sizeof(u32_t), p); - tl = ntohl(wo->ouraddr); - PUTLONG(tl, p); - } - } else { - go->ouraddr = ciaddr2; /* accept peer's idea */ - } - } - - ho->neg_addr = 1; - ho->old_addrs = 1; - ho->hisaddr = ciaddr1; - ho->ouraddr = ciaddr2; - break; -#endif - - case CI_ADDR: - if (!ao->neg_addr) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Reject ADDR not allowed\n")); - orc = CONFREJ; /* Reject CI */ - break; - } else if (cilen != CILEN_ADDR) { /* Check CI length */ - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Reject ADDR bad len\n")); - orc = CONFREJ; /* Reject CI */ - break; - } - - /* - * If he has no address, or if we both have his address but - * disagree about it, then NAK it with our idea. - * In particular, if we don't know his address, but he does, - * then accept it. - */ - GETLONG(tl, p); /* Parse source address (his) */ - ciaddr1 = htonl(tl); - if (ciaddr1 != wo->hisaddr - && (ciaddr1 == 0 || !wo->accept_remote)) { - orc = CONFNAK; - if (!reject_if_disagree) { - DECPTR(sizeof(u32_t), p); - tl = ntohl(wo->hisaddr); - PUTLONG(tl, p); - } - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Nak ADDR %s\n", inet_ntoa(ciaddr1))); - } else if (ciaddr1 == 0 && wo->hisaddr == 0) { - /* - * Don't ACK an address of 0.0.0.0 - reject it instead. - */ - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Reject ADDR %s\n", inet_ntoa(ciaddr1))); - orc = CONFREJ; - wo->req_addr = 0; /* don't NAK with 0.0.0.0 later */ - break; - } - - ho->neg_addr = 1; - ho->hisaddr = ciaddr1; - IPCPDEBUG((LOG_INFO, "ipcp_reqci: ADDR %s\n", inet_ntoa(ciaddr1))); - break; - - case CI_MS_DNS1: - case CI_MS_DNS2: - /* Microsoft primary or secondary DNS request */ - d = citype == CI_MS_DNS2; - - /* If we do not have a DNS address then we cannot send it */ - if (ao->dnsaddr[d] == 0 || - cilen != CILEN_ADDR) { /* Check CI length */ - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting DNS%d Request\n", d+1)); - orc = CONFREJ; /* Reject CI */ - break; - } - GETLONG(tl, p); - if (htonl(tl) != ao->dnsaddr[d]) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Naking DNS%d Request %d\n", - d+1, inet_ntoa(tl))); - DECPTR(sizeof(u32_t), p); - tl = ntohl(ao->dnsaddr[d]); - PUTLONG(tl, p); - orc = CONFNAK; - } - IPCPDEBUG((LOG_INFO, "ipcp_reqci: received DNS%d Request\n", d+1)); - break; - - case CI_MS_WINS1: - case CI_MS_WINS2: - /* Microsoft primary or secondary WINS request */ - d = citype == CI_MS_WINS2; - IPCPDEBUG((LOG_INFO, "ipcp_reqci: received WINS%d Request\n", d+1)); - - /* If we do not have a DNS address then we cannot send it */ - if (ao->winsaddr[d] == 0 || - cilen != CILEN_ADDR) { /* Check CI length */ - orc = CONFREJ; /* Reject CI */ - break; - } - GETLONG(tl, p); - if (htonl(tl) != ao->winsaddr[d]) { - DECPTR(sizeof(u32_t), p); - tl = ntohl(ao->winsaddr[d]); - PUTLONG(tl, p); - orc = CONFNAK; - } - break; - - case CI_COMPRESSTYPE: - if (!ao->neg_vj) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting COMPRESSTYPE not allowed\n")); - orc = CONFREJ; - break; - } else if (cilen != CILEN_VJ && cilen != CILEN_COMPRESS) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting COMPRESSTYPE len=%d\n", cilen)); - orc = CONFREJ; - break; - } - GETSHORT(cishort, p); - - if (!(cishort == IPCP_VJ_COMP || - (cishort == IPCP_VJ_COMP_OLD && cilen == CILEN_COMPRESS))) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting COMPRESSTYPE %d\n", cishort)); - orc = CONFREJ; - break; - } - - ho->neg_vj = 1; - ho->vj_protocol = cishort; - if (cilen == CILEN_VJ) { - GETCHAR(maxslotindex, p); - if (maxslotindex > ao->maxslotindex) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Naking VJ max slot %d\n", maxslotindex)); - orc = CONFNAK; - if (!reject_if_disagree){ - DECPTR(1, p); - PUTCHAR(ao->maxslotindex, p); - } - } - GETCHAR(cflag, p); - if (cflag && !ao->cflag) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Naking VJ cflag %d\n", cflag)); - orc = CONFNAK; - if (!reject_if_disagree){ - DECPTR(1, p); - PUTCHAR(wo->cflag, p); - } - } - ho->maxslotindex = maxslotindex; - ho->cflag = cflag; - } else { - ho->old_vj = 1; - ho->maxslotindex = MAX_SLOTS - 1; - ho->cflag = 1; - } - IPCPDEBUG((LOG_INFO, - "ipcp_reqci: received COMPRESSTYPE p=%d old=%d maxslot=%d cflag=%d\n", - ho->vj_protocol, ho->old_vj, ho->maxslotindex, ho->cflag)); - break; - - default: - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting unknown CI type %d\n", citype)); - orc = CONFREJ; - break; - } - -endswitch: - if (orc == CONFACK && /* Good CI */ - rc != CONFACK) /* but prior CI wasnt? */ - continue; /* Don't send this one */ - - if (orc == CONFNAK) { /* Nak this CI? */ - if (reject_if_disagree) { /* Getting fed up with sending NAKs? */ - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting too many naks\n")); - orc = CONFREJ; /* Get tough if so */ - } else { - if (rc == CONFREJ) /* Rejecting prior CI? */ - continue; /* Don't send this one */ - if (rc == CONFACK) { /* Ack'd all prior CIs? */ - rc = CONFNAK; /* Not anymore... */ - ucp = inp; /* Backup */ - } - } - } - - if (orc == CONFREJ && /* Reject this CI */ - rc != CONFREJ) { /* but no prior ones? */ - rc = CONFREJ; - ucp = inp; /* Backup */ - } - - /* Need to move CI? */ - if (ucp != cip) - BCOPY(cip, ucp, cilen); /* Move it */ - - /* Update output pointer */ - INCPTR(cilen, ucp); - } - - /* - * If we aren't rejecting this packet, and we want to negotiate - * their address, and they didn't send their address, then we - * send a NAK with a CI_ADDR option appended. We assume the - * input buffer is long enough that we can append the extra - * option safely. - */ - if (rc != CONFREJ && !ho->neg_addr && - wo->req_addr && !reject_if_disagree) { - IPCPDEBUG((LOG_INFO, "ipcp_reqci: Requesting peer address\n")); - if (rc == CONFACK) { - rc = CONFNAK; - ucp = inp; /* reset pointer */ - wo->req_addr = 0; /* don't ask again */ - } - PUTCHAR(CI_ADDR, ucp); - PUTCHAR(CILEN_ADDR, ucp); - tl = ntohl(wo->hisaddr); - PUTLONG(tl, ucp); - } - - *len = (int)(ucp - inp); /* Compute output length */ - IPCPDEBUG((LOG_INFO, "ipcp_reqci: returning Configure-%s\n", CODENAME(rc))); - return (rc); /* Return final code */ -} - - -#if 0 -/* - * ip_check_options - check that any IP-related options are OK, - * and assign appropriate defaults. - */ -static void ip_check_options(u_long localAddr) -{ - ipcp_options *wo = &ipcp_wantoptions[0]; - - /* - * Load our default IP address but allow the remote host to give us - * a new address. - */ - if (wo->ouraddr == 0 && !ppp_settings.disable_defaultip) { - wo->accept_local = 1; /* don't insist on this default value */ - wo->ouraddr = htonl(localAddr); - } -} -#endif - - -/* - * ipcp_up - IPCP has come UP. - * - * Configure the IP network interface appropriately and bring it up. - */ -static void ipcp_up(fsm *f) -{ - u32_t mask; - ipcp_options *ho = &ipcp_hisoptions[f->unit]; - ipcp_options *go = &ipcp_gotoptions[f->unit]; - ipcp_options *wo = &ipcp_wantoptions[f->unit]; - - np_up(f->unit, PPP_IP); - IPCPDEBUG((LOG_INFO, "ipcp: up\n")); - - /* - * We must have a non-zero IP address for both ends of the link. - */ - if (!ho->neg_addr) - ho->hisaddr = wo->hisaddr; - - if (ho->hisaddr == 0) { - IPCPDEBUG((LOG_ERR, "Could not determine remote IP address\n")); - ipcp_close(f->unit, "Could not determine remote IP address"); - return; - } - if (go->ouraddr == 0) { - IPCPDEBUG((LOG_ERR, "Could not determine local IP address\n")); - ipcp_close(f->unit, "Could not determine local IP address"); - return; - } - - if (ppp_settings.usepeerdns && (go->dnsaddr[0] || go->dnsaddr[1])) { - /*pppGotDNSAddrs(go->dnsaddr[0], go->dnsaddr[1]);*/ - } - - /* - * Check that the peer is allowed to use the IP address it wants. - */ - if (!auth_ip_addr(f->unit, ho->hisaddr)) { - IPCPDEBUG((LOG_ERR, "Peer is not authorized to use remote address %s\n", - inet_ntoa(ho->hisaddr))); - ipcp_close(f->unit, "Unauthorized remote IP address"); - return; - } - - /* set tcp compression */ - sifvjcomp(f->unit, ho->neg_vj, ho->cflag, ho->maxslotindex); - - /* - * Set IP addresses and (if specified) netmask. - */ - mask = GetMask(go->ouraddr); - - if (!sifaddr(f->unit, go->ouraddr, ho->hisaddr, mask, go->dnsaddr[0], go->dnsaddr[1])) { - IPCPDEBUG((LOG_WARNING, "sifaddr failed\n")); - ipcp_close(f->unit, "Interface configuration failed"); - return; - } - - /* bring the interface up for IP */ - if (!sifup(f->unit)) { - IPCPDEBUG((LOG_WARNING, "sifup failed\n")); - ipcp_close(f->unit, "Interface configuration failed"); - return; - } - - sifnpmode(f->unit, PPP_IP, NPMODE_PASS); - - /* assign a default route through the interface if required */ - if (ipcp_wantoptions[f->unit].default_route) - if (sifdefaultroute(f->unit, go->ouraddr, ho->hisaddr)) - default_route_set[f->unit] = 1; - - IPCPDEBUG((LOG_NOTICE, "local IP address %s\n", inet_ntoa(go->ouraddr))); - IPCPDEBUG((LOG_NOTICE, "remote IP address %s\n", inet_ntoa(ho->hisaddr))); - if (go->dnsaddr[0]) { - IPCPDEBUG((LOG_NOTICE, "primary DNS address %s\n", inet_ntoa(go->dnsaddr[0]))); - } - if (go->dnsaddr[1]) { - IPCPDEBUG((LOG_NOTICE, "secondary DNS address %s\n", inet_ntoa(go->dnsaddr[1]))); - } -} - - -/* - * ipcp_down - IPCP has gone DOWN. - * - * Take the IP network interface down, clear its addresses - * and delete routes through it. - */ -static void ipcp_down(fsm *f) -{ - IPCPDEBUG((LOG_INFO, "ipcp: down\n")); - np_down(f->unit, PPP_IP); - sifvjcomp(f->unit, 0, 0, 0); - - sifdown(f->unit); - ipcp_clear_addrs(f->unit); -} - - -/* - * ipcp_clear_addrs() - clear the interface addresses, routes, etc. - */ -static void ipcp_clear_addrs(int unit) -{ - u32_t ouraddr, hisaddr; - - ouraddr = ipcp_gotoptions[unit].ouraddr; - hisaddr = ipcp_hisoptions[unit].hisaddr; - if (default_route_set[unit]) { - cifdefaultroute(unit, ouraddr, hisaddr); - default_route_set[unit] = 0; - } - cifaddr(unit, ouraddr, hisaddr); -} - - -/* - * ipcp_finished - possibly shut down the lower layers. - */ -static void ipcp_finished(fsm *f) -{ - np_finished(f->unit, PPP_IP); -} - -#if 0 -static int ipcp_printpkt( - u_char *p, - int plen, - void (*printer) (void *, char *, ...), - void *arg -) -{ - (void)p; - (void)plen; - (void)printer; - (void)arg; - return 0; -} - -/* - * ip_active_pkt - see if this IP packet is worth bringing the link up for. - * We don't bring the link up for IP fragments or for TCP FIN packets - * with no data. - */ -#define IP_HDRLEN 20 /* bytes */ -#define IP_OFFMASK 0x1fff -#define IPPROTO_TCP 6 -#define TCP_HDRLEN 20 -#define TH_FIN 0x01 - -/* - * We use these macros because the IP header may be at an odd address, - * and some compilers might use word loads to get th_off or ip_hl. - */ - -#define net_short(x) (((x)[0] << 8) + (x)[1]) -#define get_iphl(x) (((unsigned char *)(x))[0] & 0xF) -#define get_ipoff(x) net_short((unsigned char *)(x) + 6) -#define get_ipproto(x) (((unsigned char *)(x))[9]) -#define get_tcpoff(x) (((unsigned char *)(x))[12] >> 4) -#define get_tcpflags(x) (((unsigned char *)(x))[13]) - -static int ip_active_pkt(u_char *pkt, int len) -{ - u_char *tcp; - int hlen; - - len -= PPP_HDRLEN; - pkt += PPP_HDRLEN; - if (len < IP_HDRLEN) - return 0; - if ((get_ipoff(pkt) & IP_OFFMASK) != 0) - return 0; - if (get_ipproto(pkt) != IPPROTO_TCP) - return 1; - hlen = get_iphl(pkt) * 4; - if (len < hlen + TCP_HDRLEN) - return 0; - tcp = pkt + hlen; - if ((get_tcpflags(tcp) & TH_FIN) != 0 && len == hlen + get_tcpoff(tcp) * 4) - return 0; - return 1; -} -#endif - -#endif /* PPP_SUPPORT */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/ipcp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/ipcp.h deleted file mode 100644 index 040a7cf4..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/ipcp.h +++ /dev/null @@ -1,126 +0,0 @@ -/***************************************************************************** -* ipcp.h - PPP IP NCP: Internet Protocol Network Control Protocol header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-04 Guy Lancaster , Global Election Systems Inc. -* Original derived from BSD codes. -*****************************************************************************/ -/* - * ipcp.h - IP Control Protocol definitions. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * $Id$ - */ - -#ifndef IPCP_H -#define IPCP_H - -/************************* -*** PUBLIC DEFINITIONS *** -*************************/ -/* - * Options. - */ -#define CI_ADDRS 1 /* IP Addresses */ -#define CI_COMPRESSTYPE 2 /* Compression Type */ -#define CI_ADDR 3 - -#define CI_MS_WINS1 128 /* Primary WINS value */ -#define CI_MS_DNS1 129 /* Primary DNS value */ -#define CI_MS_WINS2 130 /* Secondary WINS value */ -#define CI_MS_DNS2 131 /* Secondary DNS value */ - -#define IPCP_VJMODE_OLD 1 /* "old" mode (option # = 0x0037) */ -#define IPCP_VJMODE_RFC1172 2 /* "old-rfc"mode (option # = 0x002d) */ -#define IPCP_VJMODE_RFC1332 3 /* "new-rfc"mode (option # = 0x002d, */ - /* maxslot and slot number compression) */ - -#define IPCP_VJ_COMP 0x002d /* current value for VJ compression option*/ -#define IPCP_VJ_COMP_OLD 0x0037 /* "old" (i.e, broken) value for VJ */ - /* compression option*/ - - -/************************ -*** PUBLIC DATA TYPES *** -************************/ - -typedef struct ipcp_options { - u_int neg_addr : 1; /* Negotiate IP Address? */ - u_int old_addrs : 1; /* Use old (IP-Addresses) option? */ - u_int req_addr : 1; /* Ask peer to send IP address? */ - u_int default_route : 1; /* Assign default route through interface? */ - u_int proxy_arp : 1; /* Make proxy ARP entry for peer? */ - u_int neg_vj : 1; /* Van Jacobson Compression? */ - u_int old_vj : 1; /* use old (short) form of VJ option? */ - u_int accept_local : 1; /* accept peer's value for ouraddr */ - u_int accept_remote : 1; /* accept peer's value for hisaddr */ - u_int req_dns1 : 1; /* Ask peer to send primary DNS address? */ - u_int req_dns2 : 1; /* Ask peer to send secondary DNS address? */ - u_short vj_protocol; /* protocol value to use in VJ option */ - u_char maxslotindex; /* VJ slots - 1. */ - u_char cflag; /* VJ slot compression flag. */ - u32_t ouraddr, hisaddr; /* Addresses in NETWORK BYTE ORDER */ - u32_t dnsaddr[2]; /* Primary and secondary MS DNS entries */ - u32_t winsaddr[2]; /* Primary and secondary MS WINS entries */ -} ipcp_options; - - -/***************************** -*** PUBLIC DATA STRUCTURES *** -*****************************/ - -extern fsm ipcp_fsm[]; -extern ipcp_options ipcp_wantoptions[]; -extern ipcp_options ipcp_gotoptions[]; -extern ipcp_options ipcp_allowoptions[]; -extern ipcp_options ipcp_hisoptions[]; - -extern struct protent ipcp_protent; - - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ - - -#endif /* IPCP_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/lcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/lcp.c deleted file mode 100644 index 70986697..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/lcp.c +++ /dev/null @@ -1,1992 +0,0 @@ -/***************************************************************************** -* lcp.c - Network Link Control Protocol program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-01 Guy Lancaster , Global Election Systems Inc. -* Original. -*****************************************************************************/ - -/* - * lcp.c - PPP Link Control Protocol. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include -#include - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "fsm.h" -#include "chap.h" -#include "magic.h" -#include "auth.h" -#include "lcp.h" -#include "pppdebug.h" - - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ -/* - * Length of each type of configuration option (in octets) - */ -#define CILEN_VOID 2 -#define CILEN_CHAR 3 -#define CILEN_SHORT 4 /* CILEN_VOID + sizeof(short) */ -#define CILEN_CHAP 5 /* CILEN_VOID + sizeof(short) + 1 */ -#define CILEN_LONG 6 /* CILEN_VOID + sizeof(long) */ -#define CILEN_LQR 8 /* CILEN_VOID + sizeof(short) + sizeof(long) */ -#define CILEN_CBCP 3 - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -/* - * Callbacks for fsm code. (CI = Configuration Information) - */ -static void lcp_resetci (fsm*); /* Reset our CI */ -static int lcp_cilen (fsm*); /* Return length of our CI */ -static void lcp_addci (fsm*, u_char*, int*); /* Add our CI to pkt */ -static int lcp_ackci (fsm*, u_char*, int);/* Peer ack'd our CI */ -static int lcp_nakci (fsm*, u_char*, int);/* Peer nak'd our CI */ -static int lcp_rejci (fsm*, u_char*, int);/* Peer rej'd our CI */ -static int lcp_reqci (fsm*, u_char*, int*, int); /* Rcv peer CI */ -static void lcp_up (fsm*); /* We're UP */ -static void lcp_down (fsm*); /* We're DOWN */ -static void lcp_starting (fsm*); /* We need lower layer up */ -static void lcp_finished (fsm*); /* We need lower layer down */ -static int lcp_extcode (fsm*, int, u_char, u_char*, int); - -static void lcp_rprotrej (fsm*, u_char*, int); - -/* - * routines to send LCP echos to peer - */ -static void lcp_echo_lowerup (int); -static void lcp_echo_lowerdown (int); -static void LcpEchoTimeout (void*); -static void lcp_received_echo_reply (fsm*, int, u_char*, int); -static void LcpSendEchoRequest (fsm*); -static void LcpLinkFailure (fsm*); -static void LcpEchoCheck (fsm*); - -/* - * Protocol entry points. - * Some of these are called directly. - */ -static void lcp_input (int, u_char *, int); -static void lcp_protrej (int); - -#define CODENAME(x) ((x) == CONFACK ? "ACK" : \ - (x) == CONFNAK ? "NAK" : "REJ") - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ -/* global vars */ -LinkPhase lcp_phase[NUM_PPP]; /* Phase of link session (RFC 1661) */ -lcp_options lcp_wantoptions[NUM_PPP]; /* Options that we want to request */ -lcp_options lcp_gotoptions[NUM_PPP]; /* Options that peer ack'd */ -lcp_options lcp_allowoptions[NUM_PPP]; /* Options we allow peer to request */ -lcp_options lcp_hisoptions[NUM_PPP]; /* Options that we ack'd */ -ext_accm xmit_accm[NUM_PPP]; /* extended transmit ACCM */ - - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -static fsm lcp_fsm[NUM_PPP]; /* LCP fsm structure (global)*/ -static u_int lcp_echo_interval = LCP_ECHOINTERVAL; /* Interval between LCP echo-requests */ -static u_int lcp_echo_fails = LCP_MAXECHOFAILS; /* Tolerance to unanswered echo-requests */ -static u32_t lcp_echos_pending = 0; /* Number of outstanding echo msgs */ -static u32_t lcp_echo_number = 0; /* ID number of next echo frame */ -static u32_t lcp_echo_timer_running = 0; /* TRUE if a timer is running */ - -static u_char nak_buffer[PPP_MRU]; /* where we construct a nak packet */ - -static fsm_callbacks lcp_callbacks = { /* LCP callback routines */ - lcp_resetci, /* Reset our Configuration Information */ - lcp_cilen, /* Length of our Configuration Information */ - lcp_addci, /* Add our Configuration Information */ - lcp_ackci, /* ACK our Configuration Information */ - lcp_nakci, /* NAK our Configuration Information */ - lcp_rejci, /* Reject our Configuration Information */ - lcp_reqci, /* Request peer's Configuration Information */ - lcp_up, /* Called when fsm reaches OPENED state */ - lcp_down, /* Called when fsm leaves OPENED state */ - lcp_starting, /* Called when we want the lower layer up */ - lcp_finished, /* Called when we want the lower layer down */ - NULL, /* Called when Protocol-Reject received */ - NULL, /* Retransmission is necessary */ - lcp_extcode, /* Called to handle LCP-specific codes */ - "LCP" /* String name of protocol */ -}; - -struct protent lcp_protent = { - PPP_LCP, - lcp_init, - lcp_input, - lcp_protrej, - lcp_lowerup, - lcp_lowerdown, - lcp_open, - lcp_close, -#if 0 - lcp_printpkt, - NULL, -#endif - 1, - "LCP", -#if 0 - NULL, - NULL, - NULL -#endif -}; - -int lcp_loopbackfail = DEFLOOPBACKFAIL; - - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * lcp_init - Initialize LCP. - */ -void lcp_init(int unit) -{ - fsm *f = &lcp_fsm[unit]; - lcp_options *wo = &lcp_wantoptions[unit]; - lcp_options *ao = &lcp_allowoptions[unit]; - - f->unit = unit; - f->protocol = PPP_LCP; - f->callbacks = &lcp_callbacks; - - fsm_init(f); - - wo->passive = 0; - wo->silent = 0; - wo->restart = 0; /* Set to 1 in kernels or multi-line - * implementations */ - wo->neg_mru = 1; - wo->mru = PPP_DEFMRU; - wo->neg_asyncmap = 1; - wo->asyncmap = 0x00000000l; /* Assume don't need to escape any ctl chars. */ - wo->neg_chap = 0; /* Set to 1 on server */ - wo->neg_upap = 0; /* Set to 1 on server */ - wo->chap_mdtype = CHAP_DIGEST_MD5; - wo->neg_magicnumber = 1; - wo->neg_pcompression = 1; - wo->neg_accompression = 1; - wo->neg_lqr = 0; /* no LQR implementation yet */ - wo->neg_cbcp = 0; - - ao->neg_mru = 1; - ao->mru = PPP_MAXMRU; - ao->neg_asyncmap = 1; - ao->asyncmap = 0x00000000l; /* Assume don't need to escape any ctl chars. */ - ao->neg_chap = (CHAP_SUPPORT != 0); - ao->chap_mdtype = CHAP_DIGEST_MD5; - ao->neg_upap = (PAP_SUPPORT != 0); - ao->neg_magicnumber = 1; - ao->neg_pcompression = 1; - ao->neg_accompression = 1; - ao->neg_lqr = 0; /* no LQR implementation yet */ - ao->neg_cbcp = (CBCP_SUPPORT != 0); - - /* - * Set transmit escape for the flag and escape characters plus anything - * set for the allowable options. - */ - memset(xmit_accm[unit], 0, sizeof(xmit_accm[0])); - xmit_accm[unit][15] = 0x60; - xmit_accm[unit][0] = (u_char)(ao->asyncmap & 0xFF); - xmit_accm[unit][1] = (u_char)((ao->asyncmap >> 8) & 0xFF); - xmit_accm[unit][2] = (u_char)((ao->asyncmap >> 16) & 0xFF); - xmit_accm[unit][3] = (u_char)((ao->asyncmap >> 24) & 0xFF); - LCPDEBUG((LOG_INFO, "lcp_init: xmit_accm=%X %X %X %X\n", - xmit_accm[unit][0], - xmit_accm[unit][1], - xmit_accm[unit][2], - xmit_accm[unit][3])); - - lcp_phase[unit] = PHASE_INITIALIZE; -} - - -/* - * lcp_open - LCP is allowed to come up. - */ -void lcp_open(int unit) -{ - fsm *f = &lcp_fsm[unit]; - lcp_options *wo = &lcp_wantoptions[unit]; - - f->flags = 0; - if (wo->passive) - f->flags |= OPT_PASSIVE; - if (wo->silent) - f->flags |= OPT_SILENT; - fsm_open(f); - - lcp_phase[unit] = PHASE_ESTABLISH; -} - - -/* - * lcp_close - Take LCP down. - */ -void lcp_close(int unit, char *reason) -{ - fsm *f = &lcp_fsm[unit]; - - if (lcp_phase[unit] != PHASE_DEAD) - lcp_phase[unit] = PHASE_TERMINATE; - if (f->state == STOPPED && f->flags & (OPT_PASSIVE|OPT_SILENT)) { - /* - * This action is not strictly according to the FSM in RFC1548, - * but it does mean that the program terminates if you do an - * lcp_close() in passive/silent mode when a connection hasn't - * been established. - */ - f->state = CLOSED; - lcp_finished(f); - } - else - fsm_close(&lcp_fsm[unit], reason); -} - - -/* - * lcp_lowerup - The lower layer is up. - */ -void lcp_lowerup(int unit) -{ - lcp_options *wo = &lcp_wantoptions[unit]; - - /* - * Don't use A/C or protocol compression on transmission, - * but accept A/C and protocol compressed packets - * if we are going to ask for A/C and protocol compression. - */ - ppp_set_xaccm(unit, &xmit_accm[unit]); - ppp_send_config(unit, PPP_MRU, 0xffffffffl, 0, 0); - ppp_recv_config(unit, PPP_MRU, 0x00000000l, - wo->neg_pcompression, wo->neg_accompression); - peer_mru[unit] = PPP_MRU; - lcp_allowoptions[unit].asyncmap - = (u_long)xmit_accm[unit][0] - | ((u_long)xmit_accm[unit][1] << 8) - | ((u_long)xmit_accm[unit][2] << 16) - | ((u_long)xmit_accm[unit][3] << 24); - LCPDEBUG((LOG_INFO, "lcp_lowerup: asyncmap=%X %X %X %X\n", - xmit_accm[unit][3], - xmit_accm[unit][2], - xmit_accm[unit][1], - xmit_accm[unit][0])); - - fsm_lowerup(&lcp_fsm[unit]); -} - - -/* - * lcp_lowerdown - The lower layer is down. - */ -void lcp_lowerdown(int unit) -{ - fsm_lowerdown(&lcp_fsm[unit]); -} - -/* - * lcp_sprotrej - Send a Protocol-Reject for some protocol. - */ -void lcp_sprotrej(int unit, u_char *p, int len) -{ - /* - * Send back the protocol and the information field of the - * rejected packet. We only get here if LCP is in the OPENED state. - */ - - fsm_sdata(&lcp_fsm[unit], PROTREJ, ++lcp_fsm[unit].id, - p, len); -} - - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ -/* - * lcp_input - Input LCP packet. - */ -static void lcp_input(int unit, u_char *p, int len) -{ - fsm *f = &lcp_fsm[unit]; - - fsm_input(f, p, len); -} - - -/* - * lcp_extcode - Handle a LCP-specific code. - */ -static int lcp_extcode(fsm *f, int code, u_char id, u_char *inp, int len) -{ - u_char *magp; - - switch( code ){ - case PROTREJ: - lcp_rprotrej(f, inp, len); - break; - - case ECHOREQ: - if (f->state != OPENED) - break; - LCPDEBUG((LOG_INFO, "lcp: Echo-Request, Rcvd id %d\n", id)); - magp = inp; - PUTLONG(lcp_gotoptions[f->unit].magicnumber, magp); - fsm_sdata(f, ECHOREP, id, inp, len); - break; - - case ECHOREP: - lcp_received_echo_reply(f, id, inp, len); - break; - - case DISCREQ: - break; - - default: - return 0; - } - return 1; -} - - -/* - * lcp_rprotrej - Receive an Protocol-Reject. - * - * Figure out which protocol is rejected and inform it. - */ -static void lcp_rprotrej(fsm *f, u_char *inp, int len) -{ - int i; - struct protent *protp; - u_short prot; - - if (len < sizeof (u_short)) { - LCPDEBUG((LOG_INFO, - "lcp_rprotrej: Rcvd short Protocol-Reject packet!\n")); - return; - } - - GETSHORT(prot, inp); - - LCPDEBUG((LOG_INFO, - "lcp_rprotrej: Rcvd Protocol-Reject packet for %x!\n", - prot)); - - /* - * Protocol-Reject packets received in any state other than the LCP - * OPENED state SHOULD be silently discarded. - */ - if( f->state != OPENED ){ - LCPDEBUG((LOG_INFO, "Protocol-Reject discarded: LCP in state %d\n", - f->state)); - return; - } - - /* - * Upcall the proper Protocol-Reject routine. - */ - for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) - if (protp->protocol == prot && protp->enabled_flag) { - (*protp->protrej)(f->unit); - return; - } - - LCPDEBUG((LOG_WARNING, "Protocol-Reject for unsupported protocol 0x%x\n", - prot)); -} - - -/* - * lcp_protrej - A Protocol-Reject was received. - */ -static void lcp_protrej(int unit) -{ - (void)unit; - /* - * Can't reject LCP! - */ - LCPDEBUG((LOG_WARNING, - "lcp_protrej: Received Protocol-Reject for LCP!\n")); - fsm_protreject(&lcp_fsm[unit]); -} - - -/* - * lcp_resetci - Reset our CI. - */ -static void lcp_resetci(fsm *f) -{ - lcp_wantoptions[f->unit].magicnumber = magic(); - lcp_wantoptions[f->unit].numloops = 0; - lcp_gotoptions[f->unit] = lcp_wantoptions[f->unit]; - peer_mru[f->unit] = PPP_MRU; - auth_reset(f->unit); -} - - -/* - * lcp_cilen - Return length of our CI. - */ -static int lcp_cilen(fsm *f) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - -#define LENCIVOID(neg) ((neg) ? CILEN_VOID : 0) -#define LENCICHAP(neg) ((neg) ? CILEN_CHAP : 0) -#define LENCISHORT(neg) ((neg) ? CILEN_SHORT : 0) -#define LENCILONG(neg) ((neg) ? CILEN_LONG : 0) -#define LENCILQR(neg) ((neg) ? CILEN_LQR: 0) -#define LENCICBCP(neg) ((neg) ? CILEN_CBCP: 0) - /* - * NB: we only ask for one of CHAP and UPAP, even if we will - * accept either. - */ - return (LENCISHORT(go->neg_mru && go->mru != PPP_DEFMRU) + - LENCILONG(go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl) + - LENCICHAP(go->neg_chap) + - LENCISHORT(!go->neg_chap && go->neg_upap) + - LENCILQR(go->neg_lqr) + - LENCICBCP(go->neg_cbcp) + - LENCILONG(go->neg_magicnumber) + - LENCIVOID(go->neg_pcompression) + - LENCIVOID(go->neg_accompression)); -} - - -/* - * lcp_addci - Add our desired CIs to a packet. - */ -static void lcp_addci(fsm *f, u_char *ucp, int *lenp) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - u_char *start_ucp = ucp; - -#define ADDCIVOID(opt, neg) \ - if (neg) { \ - LCPDEBUG((LOG_INFO, "lcp_addci: opt=%d\n", opt)); \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_VOID, ucp); \ - } -#define ADDCISHORT(opt, neg, val) \ - if (neg) { \ - LCPDEBUG((LOG_INFO, "lcp_addci: INT opt=%d %X\n", opt, val)); \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_SHORT, ucp); \ - PUTSHORT(val, ucp); \ - } -#define ADDCICHAP(opt, neg, val, digest) \ - if (neg) { \ - LCPDEBUG((LOG_INFO, "lcp_addci: CHAP opt=%d %X\n", opt, val)); \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_CHAP, ucp); \ - PUTSHORT(val, ucp); \ - PUTCHAR(digest, ucp); \ - } -#define ADDCILONG(opt, neg, val) \ - if (neg) { \ - LCPDEBUG((LOG_INFO, "lcp_addci: L opt=%d %lX\n", opt, val)); \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_LONG, ucp); \ - PUTLONG(val, ucp); \ - } -#define ADDCILQR(opt, neg, val) \ - if (neg) { \ - LCPDEBUG((LOG_INFO, "lcp_addci: LQR opt=%d %lX\n", opt, val)); \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_LQR, ucp); \ - PUTSHORT(PPP_LQR, ucp); \ - PUTLONG(val, ucp); \ - } -#define ADDCICHAR(opt, neg, val) \ - if (neg) { \ - LCPDEBUG((LOG_INFO, "lcp_addci: CHAR opt=%d %X '%z'\n", opt, val, val)); \ - PUTCHAR(opt, ucp); \ - PUTCHAR(CILEN_CHAR, ucp); \ - PUTCHAR(val, ucp); \ - } - - ADDCISHORT(CI_MRU, go->neg_mru && go->mru != PPP_DEFMRU, go->mru); - ADDCILONG(CI_ASYNCMAP, go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl, - go->asyncmap); - ADDCICHAP(CI_AUTHTYPE, go->neg_chap, PPP_CHAP, go->chap_mdtype); - ADDCISHORT(CI_AUTHTYPE, !go->neg_chap && go->neg_upap, PPP_PAP); - ADDCILQR(CI_QUALITY, go->neg_lqr, go->lqr_period); - ADDCICHAR(CI_CALLBACK, go->neg_cbcp, CBCP_OPT); - ADDCILONG(CI_MAGICNUMBER, go->neg_magicnumber, go->magicnumber); - ADDCIVOID(CI_PCOMPRESSION, go->neg_pcompression); - ADDCIVOID(CI_ACCOMPRESSION, go->neg_accompression); - - if (ucp - start_ucp != *lenp) { - /* this should never happen, because peer_mtu should be 1500 */ - LCPDEBUG((LOG_ERR, "Bug in lcp_addci: wrong length\n")); - } -} - - -/* - * lcp_ackci - Ack our CIs. - * This should not modify any state if the Ack is bad. - * - * Returns: - * 0 - Ack was bad. - * 1 - Ack was good. - */ -static int lcp_ackci(fsm *f, u_char *p, int len) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - u_char cilen, citype, cichar; - u_short cishort; - u32_t cilong; - - /* - * CIs must be in exactly the same order that we sent. - * Check packet length and CI length at each step. - * If we find any deviations, then this packet is bad. - */ -#define ACKCIVOID(opt, neg) \ - if (neg) { \ - if ((len -= CILEN_VOID) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_VOID || \ - citype != opt) \ - goto bad; \ - } -#define ACKCISHORT(opt, neg, val) \ - if (neg) { \ - if ((len -= CILEN_SHORT) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_SHORT || \ - citype != opt) \ - goto bad; \ - GETSHORT(cishort, p); \ - if (cishort != val) \ - goto bad; \ - } -#define ACKCICHAR(opt, neg, val) \ - if (neg) { \ - if ((len -= CILEN_CHAR) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_CHAR || \ - citype != opt) \ - goto bad; \ - GETCHAR(cichar, p); \ - if (cichar != val) \ - goto bad; \ - } -#define ACKCICHAP(opt, neg, val, digest) \ - if (neg) { \ - if ((len -= CILEN_CHAP) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_CHAP || \ - citype != opt) \ - goto bad; \ - GETSHORT(cishort, p); \ - if (cishort != val) \ - goto bad; \ - GETCHAR(cichar, p); \ - if (cichar != digest) \ - goto bad; \ - } -#define ACKCILONG(opt, neg, val) \ - if (neg) { \ - if ((len -= CILEN_LONG) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_LONG || \ - citype != opt) \ - goto bad; \ - GETLONG(cilong, p); \ - if (cilong != val) \ - goto bad; \ - } -#define ACKCILQR(opt, neg, val) \ - if (neg) { \ - if ((len -= CILEN_LQR) < 0) \ - goto bad; \ - GETCHAR(citype, p); \ - GETCHAR(cilen, p); \ - if (cilen != CILEN_LQR || \ - citype != opt) \ - goto bad; \ - GETSHORT(cishort, p); \ - if (cishort != PPP_LQR) \ - goto bad; \ - GETLONG(cilong, p); \ - if (cilong != val) \ - goto bad; \ - } - - ACKCISHORT(CI_MRU, go->neg_mru && go->mru != PPP_DEFMRU, go->mru); - ACKCILONG(CI_ASYNCMAP, go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl, - go->asyncmap); - ACKCICHAP(CI_AUTHTYPE, go->neg_chap, PPP_CHAP, go->chap_mdtype); - ACKCISHORT(CI_AUTHTYPE, !go->neg_chap && go->neg_upap, PPP_PAP); - ACKCILQR(CI_QUALITY, go->neg_lqr, go->lqr_period); - ACKCICHAR(CI_CALLBACK, go->neg_cbcp, CBCP_OPT); - ACKCILONG(CI_MAGICNUMBER, go->neg_magicnumber, go->magicnumber); - ACKCIVOID(CI_PCOMPRESSION, go->neg_pcompression); - ACKCIVOID(CI_ACCOMPRESSION, go->neg_accompression); - - /* - * If there are any remaining CIs, then this packet is bad. - */ - if (len != 0) - goto bad; - LCPDEBUG((LOG_INFO, "lcp_acki: Ack\n")); - return (1); -bad: - LCPDEBUG((LOG_WARNING, "lcp_acki: received bad Ack!\n")); - return (0); -} - - -/* - * lcp_nakci - Peer has sent a NAK for some of our CIs. - * This should not modify any state if the Nak is bad - * or if LCP is in the OPENED state. - * - * Returns: - * 0 - Nak was bad. - * 1 - Nak was good. - */ -static int lcp_nakci(fsm *f, u_char *p, int len) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - lcp_options *wo = &lcp_wantoptions[f->unit]; - u_char citype, cichar, *next; - u_short cishort; - u32_t cilong; - lcp_options no; /* options we've seen Naks for */ - lcp_options try; /* options to request next time */ - int looped_back = 0; - int cilen; - - BZERO(&no, sizeof(no)); - try = *go; - - /* - * Any Nak'd CIs must be in exactly the same order that we sent. - * Check packet length and CI length at each step. - * If we find any deviations, then this packet is bad. - */ -#define NAKCIVOID(opt, neg, code) \ - if (go->neg && \ - len >= CILEN_VOID && \ - p[1] == CILEN_VOID && \ - p[0] == opt) { \ - len -= CILEN_VOID; \ - INCPTR(CILEN_VOID, p); \ - no.neg = 1; \ - code \ - } -#define NAKCICHAP(opt, neg, code) \ - if (go->neg && \ - len >= CILEN_CHAP && \ - p[1] == CILEN_CHAP && \ - p[0] == opt) { \ - len -= CILEN_CHAP; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - GETCHAR(cichar, p); \ - no.neg = 1; \ - code \ - } -#define NAKCICHAR(opt, neg, code) \ - if (go->neg && \ - len >= CILEN_CHAR && \ - p[1] == CILEN_CHAR && \ - p[0] == opt) { \ - len -= CILEN_CHAR; \ - INCPTR(2, p); \ - GETCHAR(cichar, p); \ - no.neg = 1; \ - code \ - } -#define NAKCISHORT(opt, neg, code) \ - if (go->neg && \ - len >= CILEN_SHORT && \ - p[1] == CILEN_SHORT && \ - p[0] == opt) { \ - len -= CILEN_SHORT; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - no.neg = 1; \ - code \ - } -#define NAKCILONG(opt, neg, code) \ - if (go->neg && \ - len >= CILEN_LONG && \ - p[1] == CILEN_LONG && \ - p[0] == opt) { \ - len -= CILEN_LONG; \ - INCPTR(2, p); \ - GETLONG(cilong, p); \ - no.neg = 1; \ - code \ - } -#define NAKCILQR(opt, neg, code) \ - if (go->neg && \ - len >= CILEN_LQR && \ - p[1] == CILEN_LQR && \ - p[0] == opt) { \ - len -= CILEN_LQR; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - GETLONG(cilong, p); \ - no.neg = 1; \ - code \ - } - - /* - * We don't care if they want to send us smaller packets than - * we want. Therefore, accept any MRU less than what we asked for, - * but then ignore the new value when setting the MRU in the kernel. - * If they send us a bigger MRU than what we asked, accept it, up to - * the limit of the default MRU we'd get if we didn't negotiate. - */ - if (go->neg_mru && go->mru != PPP_DEFMRU) { - NAKCISHORT(CI_MRU, neg_mru, - if (cishort <= wo->mru || cishort < PPP_DEFMRU) - try.mru = cishort; - ); - } - - /* - * Add any characters they want to our (receive-side) asyncmap. - */ - if (go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl) { - NAKCILONG(CI_ASYNCMAP, neg_asyncmap, - try.asyncmap = go->asyncmap | cilong; - ); - } - - /* - * If they've nak'd our authentication-protocol, check whether - * they are proposing a different protocol, or a different - * hash algorithm for CHAP. - */ - if ((go->neg_chap || go->neg_upap) - && len >= CILEN_SHORT - && p[0] == CI_AUTHTYPE && p[1] >= CILEN_SHORT && p[1] <= len) { - cilen = p[1]; - len -= cilen; - no.neg_chap = go->neg_chap; - no.neg_upap = go->neg_upap; - INCPTR(2, p); - GETSHORT(cishort, p); - if (cishort == PPP_PAP && cilen == CILEN_SHORT) { - /* - * If we were asking for CHAP, they obviously don't want to do it. - * If we weren't asking for CHAP, then we were asking for PAP, - * in which case this Nak is bad. - */ - if (!go->neg_chap) - goto bad; - try.neg_chap = 0; - - } else if (cishort == PPP_CHAP && cilen == CILEN_CHAP) { - GETCHAR(cichar, p); - if (go->neg_chap) { - /* - * We were asking for CHAP/MD5; they must want a different - * algorithm. If they can't do MD5, we'll have to stop - * asking for CHAP. - */ - if (cichar != go->chap_mdtype) - try.neg_chap = 0; - } else { - /* - * Stop asking for PAP if we were asking for it. - */ - try.neg_upap = 0; - } - - } else { - /* - * We don't recognize what they're suggesting. - * Stop asking for what we were asking for. - */ - if (go->neg_chap) - try.neg_chap = 0; - else - try.neg_upap = 0; - p += cilen - CILEN_SHORT; - } - } - - /* - * If they can't cope with our link quality protocol, we'll have - * to stop asking for LQR. We haven't got any other protocol. - * If they Nak the reporting period, take their value XXX ? - */ - NAKCILQR(CI_QUALITY, neg_lqr, - if (cishort != PPP_LQR) - try.neg_lqr = 0; - else - try.lqr_period = cilong; - ); - - /* - * Only implementing CBCP...not the rest of the callback options - */ - NAKCICHAR(CI_CALLBACK, neg_cbcp, - try.neg_cbcp = 0; - ); - - /* - * Check for a looped-back line. - */ - NAKCILONG(CI_MAGICNUMBER, neg_magicnumber, - try.magicnumber = magic(); - looped_back = 1; - ); - - /* - * Peer shouldn't send Nak for protocol compression or - * address/control compression requests; they should send - * a Reject instead. If they send a Nak, treat it as a Reject. - */ - NAKCIVOID(CI_PCOMPRESSION, neg_pcompression, - try.neg_pcompression = 0; - ); - NAKCIVOID(CI_ACCOMPRESSION, neg_accompression, - try.neg_accompression = 0; - ); - - /* - * There may be remaining CIs, if the peer is requesting negotiation - * on an option that we didn't include in our request packet. - * If we see an option that we requested, or one we've already seen - * in this packet, then this packet is bad. - * If we wanted to respond by starting to negotiate on the requested - * option(s), we could, but we don't, because except for the - * authentication type and quality protocol, if we are not negotiating - * an option, it is because we were told not to. - * For the authentication type, the Nak from the peer means - * `let me authenticate myself with you' which is a bit pointless. - * For the quality protocol, the Nak means `ask me to send you quality - * reports', but if we didn't ask for them, we don't want them. - * An option we don't recognize represents the peer asking to - * negotiate some option we don't support, so ignore it. - */ - while (len > CILEN_VOID) { - GETCHAR(citype, p); - GETCHAR(cilen, p); - if (cilen < CILEN_VOID || (len -= cilen) < 0) - goto bad; - next = p + cilen - 2; - - switch (citype) { - case CI_MRU: - if ((go->neg_mru && go->mru != PPP_DEFMRU) - || no.neg_mru || cilen != CILEN_SHORT) - goto bad; - GETSHORT(cishort, p); - if (cishort < PPP_DEFMRU) - try.mru = cishort; - break; - case CI_ASYNCMAP: - if ((go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl) - || no.neg_asyncmap || cilen != CILEN_LONG) - goto bad; - break; - case CI_AUTHTYPE: - if (go->neg_chap || no.neg_chap || go->neg_upap || no.neg_upap) - goto bad; - break; - case CI_MAGICNUMBER: - if (go->neg_magicnumber || no.neg_magicnumber || - cilen != CILEN_LONG) - goto bad; - break; - case CI_PCOMPRESSION: - if (go->neg_pcompression || no.neg_pcompression - || cilen != CILEN_VOID) - goto bad; - break; - case CI_ACCOMPRESSION: - if (go->neg_accompression || no.neg_accompression - || cilen != CILEN_VOID) - goto bad; - break; - case CI_QUALITY: - if (go->neg_lqr || no.neg_lqr || cilen != CILEN_LQR) - goto bad; - break; - } - p = next; - } - - /* If there is still anything left, this packet is bad. */ - if (len != 0) - goto bad; - - /* - * OK, the Nak is good. Now we can update state. - */ - if (f->state != OPENED) { - if (looped_back) { - if (++try.numloops >= lcp_loopbackfail) { - LCPDEBUG((LOG_NOTICE, "Serial line is looped back.\n")); - lcp_close(f->unit, "Loopback detected"); - } - } - else - try.numloops = 0; - *go = try; - } - - return 1; - -bad: - LCPDEBUG((LOG_WARNING, "lcp_nakci: received bad Nak!\n")); - return 0; -} - - -/* - * lcp_rejci - Peer has Rejected some of our CIs. - * This should not modify any state if the Reject is bad - * or if LCP is in the OPENED state. - * - * Returns: - * 0 - Reject was bad. - * 1 - Reject was good. - */ -static int lcp_rejci(fsm *f, u_char *p, int len) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - u_char cichar; - u_short cishort; - u32_t cilong; - lcp_options try; /* options to request next time */ - - try = *go; - - /* - * Any Rejected CIs must be in exactly the same order that we sent. - * Check packet length and CI length at each step. - * If we find any deviations, then this packet is bad. - */ -#define REJCIVOID(opt, neg) \ - if (go->neg && \ - len >= CILEN_VOID && \ - p[1] == CILEN_VOID && \ - p[0] == opt) { \ - len -= CILEN_VOID; \ - INCPTR(CILEN_VOID, p); \ - try.neg = 0; \ - LCPDEBUG((LOG_INFO, "lcp_rejci: void opt %d rejected\n", opt)); \ - } -#define REJCISHORT(opt, neg, val) \ - if (go->neg && \ - len >= CILEN_SHORT && \ - p[1] == CILEN_SHORT && \ - p[0] == opt) { \ - len -= CILEN_SHORT; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - /* Check rejected value. */ \ - if (cishort != val) \ - goto bad; \ - try.neg = 0; \ - LCPDEBUG((LOG_INFO,"lcp_rejci: short opt %d rejected\n", opt)); \ - } -#define REJCICHAP(opt, neg, val, digest) \ - if (go->neg && \ - len >= CILEN_CHAP && \ - p[1] == CILEN_CHAP && \ - p[0] == opt) { \ - len -= CILEN_CHAP; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - GETCHAR(cichar, p); \ - /* Check rejected value. */ \ - if (cishort != val || cichar != digest) \ - goto bad; \ - try.neg = 0; \ - try.neg_upap = 0; \ - LCPDEBUG((LOG_INFO,"lcp_rejci: chap opt %d rejected\n", opt)); \ - } -#define REJCILONG(opt, neg, val) \ - if (go->neg && \ - len >= CILEN_LONG && \ - p[1] == CILEN_LONG && \ - p[0] == opt) { \ - len -= CILEN_LONG; \ - INCPTR(2, p); \ - GETLONG(cilong, p); \ - /* Check rejected value. */ \ - if (cilong != val) \ - goto bad; \ - try.neg = 0; \ - LCPDEBUG((LOG_INFO,"lcp_rejci: long opt %d rejected\n", opt)); \ - } -#define REJCILQR(opt, neg, val) \ - if (go->neg && \ - len >= CILEN_LQR && \ - p[1] == CILEN_LQR && \ - p[0] == opt) { \ - len -= CILEN_LQR; \ - INCPTR(2, p); \ - GETSHORT(cishort, p); \ - GETLONG(cilong, p); \ - /* Check rejected value. */ \ - if (cishort != PPP_LQR || cilong != val) \ - goto bad; \ - try.neg = 0; \ - LCPDEBUG((LOG_INFO,"lcp_rejci: LQR opt %d rejected\n", opt)); \ - } -#define REJCICBCP(opt, neg, val) \ - if (go->neg && \ - len >= CILEN_CBCP && \ - p[1] == CILEN_CBCP && \ - p[0] == opt) { \ - len -= CILEN_CBCP; \ - INCPTR(2, p); \ - GETCHAR(cichar, p); \ - /* Check rejected value. */ \ - if (cichar != val) \ - goto bad; \ - try.neg = 0; \ - LCPDEBUG((LOG_INFO,"lcp_rejci: Callback opt %d rejected\n", opt)); \ - } - - REJCISHORT(CI_MRU, neg_mru, go->mru); - REJCILONG(CI_ASYNCMAP, neg_asyncmap, go->asyncmap); - REJCICHAP(CI_AUTHTYPE, neg_chap, PPP_CHAP, go->chap_mdtype); - if (!go->neg_chap) { - REJCISHORT(CI_AUTHTYPE, neg_upap, PPP_PAP); - } - REJCILQR(CI_QUALITY, neg_lqr, go->lqr_period); - REJCICBCP(CI_CALLBACK, neg_cbcp, CBCP_OPT); - REJCILONG(CI_MAGICNUMBER, neg_magicnumber, go->magicnumber); - REJCIVOID(CI_PCOMPRESSION, neg_pcompression); - REJCIVOID(CI_ACCOMPRESSION, neg_accompression); - - /* - * If there are any remaining CIs, then this packet is bad. - */ - if (len != 0) - goto bad; - /* - * Now we can update state. - */ - if (f->state != OPENED) - *go = try; - return 1; - -bad: - LCPDEBUG((LOG_WARNING, "lcp_rejci: received bad Reject!\n")); - return 0; -} - - -/* - * lcp_reqci - Check the peer's requested CIs and send appropriate response. - * - * Returns: CONFACK, CONFNAK or CONFREJ and input packet modified - * appropriately. If reject_if_disagree is non-zero, doesn't return - * CONFNAK; returns CONFREJ if it can't return CONFACK. - */ -static int lcp_reqci(fsm *f, - u_char *inp, /* Requested CIs */ - int *lenp, /* Length of requested CIs */ - int reject_if_disagree) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - lcp_options *ho = &lcp_hisoptions[f->unit]; - lcp_options *ao = &lcp_allowoptions[f->unit]; - u_char *cip, *next; /* Pointer to current and next CIs */ - int cilen, citype, cichar; /* Parsed len, type, char value */ - u_short cishort; /* Parsed short value */ - u32_t cilong; /* Parse long value */ - int rc = CONFACK; /* Final packet return code */ - int orc; /* Individual option return code */ - u_char *p; /* Pointer to next char to parse */ - u_char *rejp; /* Pointer to next char in reject frame */ - u_char *nakp; /* Pointer to next char in Nak frame */ - int l = *lenp; /* Length left */ -#if TRACELCP > 0 - char traceBuf[80]; - int traceNdx = 0; -#endif - - /* - * Reset all his options. - */ - BZERO(ho, sizeof(*ho)); - - /* - * Process all his options. - */ - next = inp; - nakp = nak_buffer; - rejp = inp; - while (l) { - orc = CONFACK; /* Assume success */ - cip = p = next; /* Remember begining of CI */ - if (l < 2 || /* Not enough data for CI header or */ - p[1] < 2 || /* CI length too small or */ - p[1] > l) { /* CI length too big? */ - LCPDEBUG((LOG_WARNING, "lcp_reqci: bad CI length!\n")); - orc = CONFREJ; /* Reject bad CI */ - cilen = l; /* Reject till end of packet */ - l = 0; /* Don't loop again */ - citype = 0; - goto endswitch; - } - GETCHAR(citype, p); /* Parse CI type */ - GETCHAR(cilen, p); /* Parse CI length */ - l -= cilen; /* Adjust remaining length */ - next += cilen; /* Step to next CI */ - - switch (citype) { /* Check CI type */ - case CI_MRU: - if (!ao->neg_mru) { /* Allow option? */ - LCPDEBUG((LOG_INFO, "lcp_reqci: Reject MRU - not allowed\n")); - orc = CONFREJ; /* Reject CI */ - break; - } else if (cilen != CILEN_SHORT) { /* Check CI length */ - LCPDEBUG((LOG_INFO, "lcp_reqci: Reject MRU - bad length\n")); - orc = CONFREJ; /* Reject CI */ - break; - } - GETSHORT(cishort, p); /* Parse MRU */ - - /* - * He must be able to receive at least our minimum. - * No need to check a maximum. If he sends a large number, - * we'll just ignore it. - */ - if (cishort < PPP_MINMRU) { - LCPDEBUG((LOG_INFO, "lcp_reqci: Nak - MRU too small\n")); - orc = CONFNAK; /* Nak CI */ - PUTCHAR(CI_MRU, nakp); - PUTCHAR(CILEN_SHORT, nakp); - PUTSHORT(PPP_MINMRU, nakp); /* Give him a hint */ - break; - } - ho->neg_mru = 1; /* Remember he sent MRU */ - ho->mru = cishort; /* And remember value */ -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " MRU %d", cishort); - traceNdx = strlen(traceBuf); -#endif - break; - - case CI_ASYNCMAP: - if (!ao->neg_asyncmap) { - LCPDEBUG((LOG_INFO, "lcp_reqci: Reject ASYNCMAP not allowed\n")); - orc = CONFREJ; - break; - } else if (cilen != CILEN_LONG) { - LCPDEBUG((LOG_INFO, "lcp_reqci: Reject ASYNCMAP bad length\n")); - orc = CONFREJ; - break; - } - GETLONG(cilong, p); - - /* - * Asyncmap must have set at least the bits - * which are set in lcp_allowoptions[unit].asyncmap. - */ - if ((ao->asyncmap & ~cilong) != 0) { - LCPDEBUG((LOG_INFO, "lcp_reqci: Nak ASYNCMAP %lX missing %lX\n", - cilong, ao->asyncmap)); - orc = CONFNAK; - PUTCHAR(CI_ASYNCMAP, nakp); - PUTCHAR(CILEN_LONG, nakp); - PUTLONG(ao->asyncmap | cilong, nakp); - break; - } - ho->neg_asyncmap = 1; - ho->asyncmap = cilong; -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " ASYNCMAP=%lX", cilong); - traceNdx = strlen(traceBuf); -#endif - break; - - case CI_AUTHTYPE: - if (cilen < CILEN_SHORT) { - LCPDEBUG((LOG_INFO, "lcp_reqci: Reject AUTHTYPE missing arg\n")); - orc = CONFREJ; - break; - } else if (!(ao->neg_upap || ao->neg_chap)) { - /* - * Reject the option if we're not willing to authenticate. - */ - LCPDEBUG((LOG_INFO, "lcp_reqci: Reject AUTHTYPE not allowed\n")); - orc = CONFREJ; - break; - } - GETSHORT(cishort, p); - - /* - * Authtype must be UPAP or CHAP. - * - * Note: if both ao->neg_upap and ao->neg_chap are set, - * and the peer sends a Configure-Request with two - * authenticate-protocol requests, one for CHAP and one - * for UPAP, then we will reject the second request. - * Whether we end up doing CHAP or UPAP depends then on - * the ordering of the CIs in the peer's Configure-Request. - */ - - if (cishort == PPP_PAP) { - if (ho->neg_chap) { /* we've already accepted CHAP */ - LCPDEBUG((LOG_WARNING, "lcp_reqci: Reject AUTHTYPE PAP already accepted\n")); - orc = CONFREJ; - break; - } else if (cilen != CILEN_SHORT) { - LCPDEBUG((LOG_WARNING, "lcp_reqci: Reject AUTHTYPE PAP bad len\n")); - orc = CONFREJ; - break; - } - if (!ao->neg_upap) { /* we don't want to do PAP */ - LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE PAP not allowed\n")); - orc = CONFNAK; /* NAK it and suggest CHAP */ - PUTCHAR(CI_AUTHTYPE, nakp); - PUTCHAR(CILEN_CHAP, nakp); - PUTSHORT(PPP_CHAP, nakp); - PUTCHAR(ao->chap_mdtype, nakp); - break; - } - ho->neg_upap = 1; -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " PAP (%X)", cishort); - traceNdx = strlen(traceBuf); -#endif - break; - } - if (cishort == PPP_CHAP) { - if (ho->neg_upap) { /* we've already accepted PAP */ - LCPDEBUG((LOG_WARNING, "lcp_reqci: Reject AUTHTYPE CHAP accepted PAP\n")); - orc = CONFREJ; - break; - } else if (cilen != CILEN_CHAP) { - LCPDEBUG((LOG_WARNING, "lcp_reqci: Reject AUTHTYPE CHAP bad len\n")); - orc = CONFREJ; - break; - } - if (!ao->neg_chap) { /* we don't want to do CHAP */ - LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE CHAP not allowed\n")); - orc = CONFNAK; /* NAK it and suggest PAP */ - PUTCHAR(CI_AUTHTYPE, nakp); - PUTCHAR(CILEN_SHORT, nakp); - PUTSHORT(PPP_PAP, nakp); - break; - } - GETCHAR(cichar, p); /* get digest type*/ - if (cichar != CHAP_DIGEST_MD5 -#ifdef CHAPMS - && cichar != CHAP_MICROSOFT -#endif - ) { - LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE CHAP digest=%d\n", cichar)); - orc = CONFNAK; - PUTCHAR(CI_AUTHTYPE, nakp); - PUTCHAR(CILEN_CHAP, nakp); - PUTSHORT(PPP_CHAP, nakp); - PUTCHAR(ao->chap_mdtype, nakp); - break; - } -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " CHAP %X,%d", cishort, cichar); - traceNdx = strlen(traceBuf); -#endif - ho->chap_mdtype = cichar; /* save md type */ - ho->neg_chap = 1; - break; - } - - /* - * We don't recognize the protocol they're asking for. - * Nak it with something we're willing to do. - * (At this point we know ao->neg_upap || ao->neg_chap.) - */ - orc = CONFNAK; - PUTCHAR(CI_AUTHTYPE, nakp); - if (ao->neg_chap) { - LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE %d req CHAP\n", cishort)); - PUTCHAR(CILEN_CHAP, nakp); - PUTSHORT(PPP_CHAP, nakp); - PUTCHAR(ao->chap_mdtype, nakp); - } - else { - LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE %d req PAP\n", cishort)); - PUTCHAR(CILEN_SHORT, nakp); - PUTSHORT(PPP_PAP, nakp); - } - break; - - case CI_QUALITY: - GETSHORT(cishort, p); - GETLONG(cilong, p); -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " QUALITY (%x %x)", cishort, (unsigned int) cilong); - traceNdx = strlen(traceBuf); -#endif - - if (!ao->neg_lqr || - cilen != CILEN_LQR) { - orc = CONFREJ; - break; - } - - /* - * Check the protocol and the reporting period. - * XXX When should we Nak this, and what with? - */ - if (cishort != PPP_LQR) { - orc = CONFNAK; - PUTCHAR(CI_QUALITY, nakp); - PUTCHAR(CILEN_LQR, nakp); - PUTSHORT(PPP_LQR, nakp); - PUTLONG(ao->lqr_period, nakp); - break; - } - break; - - case CI_MAGICNUMBER: - if (!(ao->neg_magicnumber || go->neg_magicnumber) || - cilen != CILEN_LONG) { - orc = CONFREJ; - break; - } - GETLONG(cilong, p); -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " MAGICNUMBER (%lX)", cilong); - traceNdx = strlen(traceBuf); -#endif - - /* - * He must have a different magic number. - */ - if (go->neg_magicnumber && - cilong == go->magicnumber) { - cilong = magic(); /* Don't put magic() inside macro! */ - orc = CONFNAK; - PUTCHAR(CI_MAGICNUMBER, nakp); - PUTCHAR(CILEN_LONG, nakp); - PUTLONG(cilong, nakp); - break; - } - ho->neg_magicnumber = 1; - ho->magicnumber = cilong; - break; - - - case CI_PCOMPRESSION: -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " PCOMPRESSION"); - traceNdx = strlen(traceBuf); -#endif - if (!ao->neg_pcompression || - cilen != CILEN_VOID) { - orc = CONFREJ; - break; - } - ho->neg_pcompression = 1; - break; - - case CI_ACCOMPRESSION: -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " ACCOMPRESSION"); - traceNdx = strlen(traceBuf); -#endif - if (!ao->neg_accompression || - cilen != CILEN_VOID) { - orc = CONFREJ; - break; - } - ho->neg_accompression = 1; - break; - - case CI_MRRU: -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " CI_MRRU"); - traceNdx = strlen(traceBuf); -#endif - orc = CONFREJ; - break; - - case CI_SSNHF: -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " CI_SSNHF"); - traceNdx = strlen(traceBuf); -#endif - orc = CONFREJ; - break; - - case CI_EPDISC: -#if TRACELCP > 0 - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " CI_EPDISC"); - traceNdx = strlen(traceBuf); -#endif - orc = CONFREJ; - break; - - default: -#if TRACELCP - snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " unknown %d", citype); - traceNdx = strlen(traceBuf); -#endif - orc = CONFREJ; - break; - } - - endswitch: -#if TRACELCP - if (traceNdx >= 80 - 32) { - LCPDEBUG((LOG_INFO, "lcp_reqci: rcvd%s\n", traceBuf)); - traceNdx = 0; - } -#endif - if (orc == CONFACK && /* Good CI */ - rc != CONFACK) /* but prior CI wasnt? */ - continue; /* Don't send this one */ - - if (orc == CONFNAK) { /* Nak this CI? */ - if (reject_if_disagree /* Getting fed up with sending NAKs? */ - && citype != CI_MAGICNUMBER) { - orc = CONFREJ; /* Get tough if so */ - } - else { - if (rc == CONFREJ) /* Rejecting prior CI? */ - continue; /* Don't send this one */ - rc = CONFNAK; - } - } - if (orc == CONFREJ) { /* Reject this CI */ - rc = CONFREJ; - if (cip != rejp) /* Need to move rejected CI? */ - BCOPY(cip, rejp, cilen); /* Move it */ - INCPTR(cilen, rejp); /* Update output pointer */ - } - } - - /* - * If we wanted to send additional NAKs (for unsent CIs), the - * code would go here. The extra NAKs would go at *nakp. - * At present there are no cases where we want to ask the - * peer to negotiate an option. - */ - - switch (rc) { - case CONFACK: - *lenp = (int)(next - inp); - break; - case CONFNAK: - /* - * Copy the Nak'd options from the nak_buffer to the caller's buffer. - */ - *lenp = (int)(nakp - nak_buffer); - BCOPY(nak_buffer, inp, *lenp); - break; - case CONFREJ: - *lenp = (int)(rejp - inp); - break; - } - -#if TRACELCP > 0 - if (traceNdx > 0) { - LCPDEBUG((LOG_INFO, "lcp_reqci: %s\n", traceBuf)); - } -#endif - LCPDEBUG((LOG_INFO, "lcp_reqci: returning CONF%s.\n", CODENAME(rc))); - return (rc); /* Return final code */ -} - - -/* - * lcp_up - LCP has come UP. - */ -static void lcp_up(fsm *f) -{ - lcp_options *wo = &lcp_wantoptions[f->unit]; - lcp_options *ho = &lcp_hisoptions[f->unit]; - lcp_options *go = &lcp_gotoptions[f->unit]; - lcp_options *ao = &lcp_allowoptions[f->unit]; - - if (!go->neg_magicnumber) - go->magicnumber = 0; - if (!ho->neg_magicnumber) - ho->magicnumber = 0; - - /* - * Set our MTU to the smaller of the MTU we wanted and - * the MRU our peer wanted. If we negotiated an MRU, - * set our MRU to the larger of value we wanted and - * the value we got in the negotiation. - */ - ppp_send_config(f->unit, LWIP_MIN(ao->mru, (ho->neg_mru? ho->mru: PPP_MRU)), - (ho->neg_asyncmap? ho->asyncmap: 0xffffffffl), - ho->neg_pcompression, ho->neg_accompression); - /* - * If the asyncmap hasn't been negotiated, we really should - * set the receive asyncmap to ffffffff, but we set it to 0 - * for backwards contemptibility. - */ - ppp_recv_config(f->unit, (go->neg_mru? LWIP_MAX(wo->mru, go->mru): PPP_MRU), - (go->neg_asyncmap? go->asyncmap: 0x00000000), - go->neg_pcompression, go->neg_accompression); - - if (ho->neg_mru) - peer_mru[f->unit] = ho->mru; - - lcp_echo_lowerup(f->unit); /* Enable echo messages */ - - link_established(f->unit); -} - - -/* - * lcp_down - LCP has gone DOWN. - * - * Alert other protocols. - */ -static void lcp_down(fsm *f) -{ - lcp_options *go = &lcp_gotoptions[f->unit]; - - lcp_echo_lowerdown(f->unit); - - link_down(f->unit); - - ppp_send_config(f->unit, PPP_MRU, 0xffffffffl, 0, 0); - ppp_recv_config(f->unit, PPP_MRU, - (go->neg_asyncmap? go->asyncmap: 0x00000000), - go->neg_pcompression, go->neg_accompression); - peer_mru[f->unit] = PPP_MRU; -} - - -/* - * lcp_starting - LCP needs the lower layer up. - */ -static void lcp_starting(fsm *f) -{ - link_required(f->unit); -} - - -/* - * lcp_finished - LCP has finished with the lower layer. - */ -static void lcp_finished(fsm *f) -{ - link_terminated(f->unit); -} - - -#if 0 -/* - * print_string - print a readable representation of a string using - * printer. - */ -static void print_string( - char *p, - int len, - void (*printer) (void *, char *, ...), - void *arg -) -{ - int c; - - printer(arg, "\""); - for (; len > 0; --len) { - c = *p++; - if (' ' <= c && c <= '~') { - if (c == '\\' || c == '"') - printer(arg, "\\"); - printer(arg, "%c", c); - } else { - switch (c) { - case '\n': - printer(arg, "\\n"); - break; - case '\r': - printer(arg, "\\r"); - break; - case '\t': - printer(arg, "\\t"); - break; - default: - printer(arg, "\\%.3o", c); - } - } - } - printer(arg, "\""); -} - - -/* - * lcp_printpkt - print the contents of an LCP packet. - */ -static char *lcp_codenames[] = { - "ConfReq", "ConfAck", "ConfNak", "ConfRej", - "TermReq", "TermAck", "CodeRej", "ProtRej", - "EchoReq", "EchoRep", "DiscReq" -}; - -static int lcp_printpkt( - u_char *p, - int plen, - void (*printer) (void *, char *, ...), - void *arg -) -{ - int code, id, len, olen; - u_char *pstart, *optend; - u_short cishort; - u32_t cilong; - - if (plen < HEADERLEN) - return 0; - pstart = p; - GETCHAR(code, p); - GETCHAR(id, p); - GETSHORT(len, p); - if (len < HEADERLEN || len > plen) - return 0; - - if (code >= 1 && code <= sizeof(lcp_codenames) / sizeof(char *)) - printer(arg, " %s", lcp_codenames[code-1]); - else - printer(arg, " code=0x%x", code); - printer(arg, " id=0x%x", id); - len -= HEADERLEN; - switch (code) { - case CONFREQ: - case CONFACK: - case CONFNAK: - case CONFREJ: - /* print option list */ - while (len >= 2) { - GETCHAR(code, p); - GETCHAR(olen, p); - p -= 2; - if (olen < 2 || olen > len) { - break; - } - printer(arg, " <"); - len -= olen; - optend = p + olen; - switch (code) { - case CI_MRU: - if (olen == CILEN_SHORT) { - p += 2; - GETSHORT(cishort, p); - printer(arg, "mru %d", cishort); - } - break; - case CI_ASYNCMAP: - if (olen == CILEN_LONG) { - p += 2; - GETLONG(cilong, p); - printer(arg, "asyncmap 0x%lx", cilong); - } - break; - case CI_AUTHTYPE: - if (olen >= CILEN_SHORT) { - p += 2; - printer(arg, "auth "); - GETSHORT(cishort, p); - switch (cishort) { - case PPP_PAP: - printer(arg, "pap"); - break; - case PPP_CHAP: - printer(arg, "chap"); - break; - default: - printer(arg, "0x%x", cishort); - } - } - break; - case CI_QUALITY: - if (olen >= CILEN_SHORT) { - p += 2; - printer(arg, "quality "); - GETSHORT(cishort, p); - switch (cishort) { - case PPP_LQR: - printer(arg, "lqr"); - break; - default: - printer(arg, "0x%x", cishort); - } - } - break; - case CI_CALLBACK: - if (olen >= CILEN_CHAR) { - p += 2; - printer(arg, "callback "); - GETSHORT(cishort, p); - switch (cishort) { - case CBCP_OPT: - printer(arg, "CBCP"); - break; - default: - printer(arg, "0x%x", cishort); - } - } - break; - case CI_MAGICNUMBER: - if (olen == CILEN_LONG) { - p += 2; - GETLONG(cilong, p); - printer(arg, "magic 0x%x", cilong); - } - break; - case CI_PCOMPRESSION: - if (olen == CILEN_VOID) { - p += 2; - printer(arg, "pcomp"); - } - break; - case CI_ACCOMPRESSION: - if (olen == CILEN_VOID) { - p += 2; - printer(arg, "accomp"); - } - break; - } - while (p < optend) { - GETCHAR(code, p); - printer(arg, " %.2x", code); - } - printer(arg, ">"); - } - break; - - case TERMACK: - case TERMREQ: - if (len > 0 && *p >= ' ' && *p < 0x7f) { - printer(arg, " "); - print_string((char*)p, len, printer, arg); - p += len; - len = 0; - } - break; - - case ECHOREQ: - case ECHOREP: - case DISCREQ: - if (len >= 4) { - GETLONG(cilong, p); - printer(arg, " magic=0x%x", cilong); - p += 4; - len -= 4; - } - break; - } - - /* print the rest of the bytes in the packet */ - for (; len > 0; --len) { - GETCHAR(code, p); - printer(arg, " %.2x", code); - } - - return (int)(p - pstart); -} -#endif - -/* - * Time to shut down the link because there is nothing out there. - */ - -static void LcpLinkFailure (fsm *f) -{ - if (f->state == OPENED) { - LCPDEBUG((LOG_INFO, "No response to %d echo-requests\n", lcp_echos_pending)); - LCPDEBUG((LOG_NOTICE, "Serial link appears to be disconnected.\n")); - lcp_close(f->unit, "Peer not responding"); - } -} - -/* - * Timer expired for the LCP echo requests from this process. - */ - -static void LcpEchoCheck (fsm *f) -{ - LcpSendEchoRequest (f); - - /* - * Start the timer for the next interval. - */ - LWIP_ASSERT("lcp_echo_timer_running == 0", lcp_echo_timer_running == 0); - - TIMEOUT (LcpEchoTimeout, f, lcp_echo_interval); - lcp_echo_timer_running = 1; -} - -/* - * LcpEchoTimeout - Timer expired on the LCP echo - */ - -static void LcpEchoTimeout (void *arg) -{ - if (lcp_echo_timer_running != 0) { - lcp_echo_timer_running = 0; - LcpEchoCheck ((fsm *) arg); - } -} - -/* - * LcpEchoReply - LCP has received a reply to the echo - */ -static void lcp_received_echo_reply (fsm *f, int id, u_char *inp, int len) -{ - u32_t magic; - - (void)id; - - /* Check the magic number - don't count replies from ourselves. */ - if (len < 4) { - LCPDEBUG((LOG_WARNING, "lcp: received short Echo-Reply, length %d\n", len)); - return; - } - GETLONG(magic, inp); - if (lcp_gotoptions[f->unit].neg_magicnumber - && magic == lcp_gotoptions[f->unit].magicnumber) { - LCPDEBUG((LOG_WARNING, "appear to have received our own echo-reply!\n")); - return; - } - - /* Reset the number of outstanding echo frames */ - lcp_echos_pending = 0; -} - -/* - * LcpSendEchoRequest - Send an echo request frame to the peer - */ - -static void LcpSendEchoRequest (fsm *f) -{ - u32_t lcp_magic; - u_char pkt[4], *pktp; - - /* - * Detect the failure of the peer at this point. - */ - if (lcp_echo_fails != 0) { - if (lcp_echos_pending++ >= lcp_echo_fails) { - LcpLinkFailure(f); - lcp_echos_pending = 0; - } - } - - /* - * Make and send the echo request frame. - */ - if (f->state == OPENED) { - lcp_magic = lcp_gotoptions[f->unit].magicnumber; - pktp = pkt; - PUTLONG(lcp_magic, pktp); - fsm_sdata(f, ECHOREQ, (u_char)(lcp_echo_number++ & 0xFF), pkt, (int)(pktp - pkt)); - } -} - -/* - * lcp_echo_lowerup - Start the timer for the LCP frame - */ - -static void lcp_echo_lowerup (int unit) -{ - fsm *f = &lcp_fsm[unit]; - - /* Clear the parameters for generating echo frames */ - lcp_echos_pending = 0; - lcp_echo_number = 0; - lcp_echo_timer_running = 0; - - /* If a timeout interval is specified then start the timer */ - if (lcp_echo_interval != 0) - LcpEchoCheck (f); -} - -/* - * lcp_echo_lowerdown - Stop the timer for the LCP frame - */ - -static void lcp_echo_lowerdown (int unit) -{ - fsm *f = &lcp_fsm[unit]; - - if (lcp_echo_timer_running != 0) { - UNTIMEOUT (LcpEchoTimeout, f); - lcp_echo_timer_running = 0; - } -} - -#endif /* PPP_SUPPORT */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/lcp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/lcp.h deleted file mode 100644 index 3bf2edd5..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/lcp.h +++ /dev/null @@ -1,169 +0,0 @@ -/***************************************************************************** -* lcp.h - Network Link Control Protocol header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-11-05 Guy Lancaster , Global Election Systems Inc. -* Original derived from BSD codes. -*****************************************************************************/ -/* - * lcp.h - Link Control Protocol definitions. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * $Id$ - */ - -#ifndef LCP_H -#define LCP_H - - -/************************* -*** PUBLIC DEFINITIONS *** -*************************/ -/* - * Options. - */ -#define CI_MRU 1 /* Maximum Receive Unit */ -#define CI_ASYNCMAP 2 /* Async Control Character Map */ -#define CI_AUTHTYPE 3 /* Authentication Type */ -#define CI_QUALITY 4 /* Quality Protocol */ -#define CI_MAGICNUMBER 5 /* Magic Number */ -#define CI_PCOMPRESSION 7 /* Protocol Field Compression */ -#define CI_ACCOMPRESSION 8 /* Address/Control Field Compression */ -#define CI_CALLBACK 13 /* callback */ -#define CI_MRRU 17 /* max reconstructed receive unit; multilink */ -#define CI_SSNHF 18 /* short sequence numbers for multilink */ -#define CI_EPDISC 19 /* endpoint discriminator */ - -/* - * LCP-specific packet types. - */ -#define PROTREJ 8 /* Protocol Reject */ -#define ECHOREQ 9 /* Echo Request */ -#define ECHOREP 10 /* Echo Reply */ -#define DISCREQ 11 /* Discard Request */ -#define CBCP_OPT 6 /* Use callback control protocol */ - - -/************************ -*** PUBLIC DATA TYPES *** -************************/ - -/* - * The state of options is described by an lcp_options structure. - */ -typedef struct lcp_options { - u_int passive : 1; /* Don't die if we don't get a response */ - u_int silent : 1; /* Wait for the other end to start first */ - u_int restart : 1; /* Restart vs. exit after close */ - u_int neg_mru : 1; /* Negotiate the MRU? */ - u_int neg_asyncmap : 1; /* Negotiate the async map? */ - u_int neg_upap : 1; /* Ask for UPAP authentication? */ - u_int neg_chap : 1; /* Ask for CHAP authentication? */ - u_int neg_magicnumber : 1; /* Ask for magic number? */ - u_int neg_pcompression : 1; /* HDLC Protocol Field Compression? */ - u_int neg_accompression : 1; /* HDLC Address/Control Field Compression? */ - u_int neg_lqr : 1; /* Negotiate use of Link Quality Reports */ - u_int neg_cbcp : 1; /* Negotiate use of CBCP */ -#ifdef PPP_MULTILINK - u_int neg_mrru : 1; /* Negotiate multilink MRRU */ - u_int neg_ssnhf : 1; /* Negotiate short sequence numbers */ - u_int neg_endpoint : 1; /* Negotiate endpoint discriminator */ -#endif - u_short mru; /* Value of MRU */ -#ifdef PPP_MULTILINK - u_short mrru; /* Value of MRRU, and multilink enable */ -#endif - u_char chap_mdtype; /* which MD type (hashing algorithm) */ - u32_t asyncmap; /* Value of async map */ - u32_t magicnumber; - int numloops; /* Number of loops during magic number neg. */ - u32_t lqr_period; /* Reporting period for LQR 1/100ths second */ -#ifdef PPP_MULTILINK - struct epdisc endpoint; /* endpoint discriminator */ -#endif -} lcp_options; - -/* - * Values for phase from BSD pppd.h based on RFC 1661. - */ -typedef enum { - PHASE_DEAD = 0, - PHASE_INITIALIZE, - PHASE_ESTABLISH, - PHASE_AUTHENTICATE, - PHASE_CALLBACK, - PHASE_NETWORK, - PHASE_TERMINATE -} LinkPhase; - - -/***************************** -*** PUBLIC DATA STRUCTURES *** -*****************************/ - -extern LinkPhase lcp_phase[NUM_PPP]; /* Phase of link session (RFC 1661) */ -extern lcp_options lcp_wantoptions[]; -extern lcp_options lcp_gotoptions[]; -extern lcp_options lcp_allowoptions[]; -extern lcp_options lcp_hisoptions[]; -extern ext_accm xmit_accm[]; - - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ - -void lcp_init (int); -void lcp_open (int); -void lcp_close (int, char *); -void lcp_lowerup (int); -void lcp_lowerdown (int); -void lcp_sprotrej (int, u_char *, int); /* send protocol reject */ - -extern struct protent lcp_protent; - -/* Default number of times we receive our magic number from the peer - before deciding the link is looped-back. */ -#define DEFLOOPBACKFAIL 10 - -#endif /* LCP_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/magic.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/magic.c deleted file mode 100644 index 42740169..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/magic.c +++ /dev/null @@ -1,79 +0,0 @@ -/***************************************************************************** -* magic.c - Network Random Number Generator program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-04 Guy Lancaster , Global Election Systems Inc. -* Original based on BSD magic.c. -*****************************************************************************/ -/* - * magic.c - PPP Magic Number routines. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include "ppp.h" -#include "randm.h" -#include "magic.h" - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * magicInit - Initialize the magic number generator. - * - * Since we use another random number generator that has its own - * initialization, we do nothing here. - */ -void magicInit() -{ - return; -} - -/* - * magic - Returns the next magic number. - */ -u32_t magic() -{ - return avRandom(); -} - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/magic.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/magic.h deleted file mode 100644 index ef776d8a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/magic.h +++ /dev/null @@ -1,64 +0,0 @@ -/***************************************************************************** -* magic.h - Network Random Number Generator header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-04 Guy Lancaster , Global Election Systems Inc. -* Original derived from BSD codes. -*****************************************************************************/ -/* - * magic.h - PPP Magic Number definitions. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * $Id$ - */ - -#ifndef MAGIC_H -#define MAGIC_H - -/***************************************************************************** -************************** PUBLIC FUNCTIONS ********************************** -*****************************************************************************/ - -void magicInit(void); /* Initialize the magic number generator */ -u32_t magic(void); /* Returns the next magic number */ - -#endif /* MAGIC_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/md5.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/md5.c deleted file mode 100644 index e077cdea..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/md5.c +++ /dev/null @@ -1,306 +0,0 @@ -/* - *********************************************************************** - ** md5.c -- the source code for MD5 routines ** - ** RSA Data Security, Inc. MD5 Message-Digest Algorithm ** - ** Created: 2/17/90 RLR ** - ** Revised: 1/91 SRD,AJ,BSK,JT Reference C ver., 7/10 constant corr. ** - *********************************************************************** - */ - -/* - *********************************************************************** - ** Copyright (C) 1990, RSA Data Security, Inc. All rights reserved. ** - ** ** - ** License to copy and use this software is granted provided that ** - ** it is identified as the "RSA Data Security, Inc. MD5 Message- ** - ** Digest Algorithm" in all material mentioning or referencing this ** - ** software or this function. ** - ** ** - ** License is also granted to make and use derivative works ** - ** provided that such works are identified as "derived from the RSA ** - ** Data Security, Inc. MD5 Message-Digest Algorithm" in all ** - ** material mentioning or referencing the derived work. ** - ** ** - ** RSA Data Security, Inc. makes no representations concerning ** - ** either the merchantability of this software or the suitability ** - ** of this software for any particular purpose. It is provided "as ** - ** is" without express or implied warranty of any kind. ** - ** ** - ** These notices must be retained in any copies of any part of this ** - ** documentation and/or software. ** - *********************************************************************** - */ - -#include "ppp.h" -#include "md5.h" -#include "pppdebug.h" - -#if CHAP_SUPPORT > 0 || MD5_SUPPORT > 0 - -/* - *********************************************************************** - ** Message-digest routines: ** - ** To form the message digest for a message M ** - ** (1) Initialize a context buffer mdContext using MD5Init ** - ** (2) Call MD5Update on mdContext and M ** - ** (3) Call MD5Final on mdContext ** - ** The message digest is now in mdContext->digest[0...15] ** - *********************************************************************** - */ - -/* forward declaration */ -static void Transform (u32_t *buf, u32_t *in); - -static unsigned char PADDING[64] = { - 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -/* F, G, H and I are basic MD5 functions */ -#define F(x, y, z) (((x) & (y)) | ((~x) & (z))) -#define G(x, y, z) (((x) & (z)) | ((y) & (~z))) -#define H(x, y, z) ((x) ^ (y) ^ (z)) -#define I(x, y, z) ((y) ^ ((x) | (~z))) - -/* ROTATE_LEFT rotates x left n bits */ -#define ROTATE_LEFT(x, n) (((x) << (n)) | ((x) >> (32-(n)))) - -/* FF, GG, HH, and II transformations for rounds 1, 2, 3, and 4 */ -/* Rotation is separate from addition to prevent recomputation */ -#define FF(a, b, c, d, x, s, ac) \ - {(a) += F ((b), (c), (d)) + (x) + (u32_t)(ac); \ - (a) = ROTATE_LEFT ((a), (s)); \ - (a) += (b); \ - } -#define GG(a, b, c, d, x, s, ac) \ - {(a) += G ((b), (c), (d)) + (x) + (u32_t)(ac); \ - (a) = ROTATE_LEFT ((a), (s)); \ - (a) += (b); \ - } -#define HH(a, b, c, d, x, s, ac) \ - {(a) += H ((b), (c), (d)) + (x) + (u32_t)(ac); \ - (a) = ROTATE_LEFT ((a), (s)); \ - (a) += (b); \ - } -#define II(a, b, c, d, x, s, ac) \ - {(a) += I ((b), (c), (d)) + (x) + (u32_t)(ac); \ - (a) = ROTATE_LEFT ((a), (s)); \ - (a) += (b); \ - } - -#ifdef __STDC__ -#define UL(x) x##UL -#else -#ifdef WIN32 -#define UL(x) x##UL -#else -#define UL(x) x -#endif -#endif - -/* The routine MD5Init initializes the message-digest context - mdContext. All fields are set to zero. - */ -void MD5Init (MD5_CTX *mdContext) -{ - mdContext->i[0] = mdContext->i[1] = (u32_t)0; - - /* Load magic initialization constants. - */ - mdContext->buf[0] = (u32_t)0x67452301UL; - mdContext->buf[1] = (u32_t)0xefcdab89UL; - mdContext->buf[2] = (u32_t)0x98badcfeUL; - mdContext->buf[3] = (u32_t)0x10325476UL; -} - -/* The routine MD5Update updates the message-digest context to - account for the presence of each of the characters inBuf[0..inLen-1] - in the message whose digest is being computed. - */ -void MD5Update(MD5_CTX *mdContext, unsigned char *inBuf, unsigned int inLen) -{ - u32_t in[16]; - int mdi; - unsigned int i, ii; - -#if 0 - ppp_trace(LOG_INFO, "MD5Update: %u:%.*H\n", inLen, MIN(inLen, 20) * 2, inBuf); - ppp_trace(LOG_INFO, "MD5Update: %u:%s\n", inLen, inBuf); -#endif - - /* compute number of bytes mod 64 */ - mdi = (int)((mdContext->i[0] >> 3) & 0x3F); - - /* update number of bits */ - if ((mdContext->i[0] + ((u32_t)inLen << 3)) < mdContext->i[0]) - mdContext->i[1]++; - mdContext->i[0] += ((u32_t)inLen << 3); - mdContext->i[1] += ((u32_t)inLen >> 29); - - while (inLen--) { - /* add new character to buffer, increment mdi */ - mdContext->in[mdi++] = *inBuf++; - - /* transform if necessary */ - if (mdi == 0x40) { - for (i = 0, ii = 0; i < 16; i++, ii += 4) - in[i] = (((u32_t)mdContext->in[ii+3]) << 24) | - (((u32_t)mdContext->in[ii+2]) << 16) | - (((u32_t)mdContext->in[ii+1]) << 8) | - ((u32_t)mdContext->in[ii]); - Transform (mdContext->buf, in); - mdi = 0; - } - } -} - -/* The routine MD5Final terminates the message-digest computation and - ends with the desired message digest in mdContext->digest[0...15]. - */ -void MD5Final (unsigned char hash[], MD5_CTX *mdContext) -{ - u32_t in[16]; - int mdi; - unsigned int i, ii; - unsigned int padLen; - - /* save number of bits */ - in[14] = mdContext->i[0]; - in[15] = mdContext->i[1]; - - /* compute number of bytes mod 64 */ - mdi = (int)((mdContext->i[0] >> 3) & 0x3F); - - /* pad out to 56 mod 64 */ - padLen = (mdi < 56) ? (56 - mdi) : (120 - mdi); - MD5Update (mdContext, PADDING, padLen); - - /* append length in bits and transform */ - for (i = 0, ii = 0; i < 14; i++, ii += 4) - in[i] = (((u32_t)mdContext->in[ii+3]) << 24) | - (((u32_t)mdContext->in[ii+2]) << 16) | - (((u32_t)mdContext->in[ii+1]) << 8) | - ((u32_t)mdContext->in[ii]); - Transform (mdContext->buf, in); - - /* store buffer in digest */ - for (i = 0, ii = 0; i < 4; i++, ii += 4) { - mdContext->digest[ii] = (unsigned char)(mdContext->buf[i] & 0xFF); - mdContext->digest[ii+1] = - (unsigned char)((mdContext->buf[i] >> 8) & 0xFF); - mdContext->digest[ii+2] = - (unsigned char)((mdContext->buf[i] >> 16) & 0xFF); - mdContext->digest[ii+3] = - (unsigned char)((mdContext->buf[i] >> 24) & 0xFF); - } - memcpy(hash, mdContext->digest, 16); -} - -/* Basic MD5 step. Transforms buf based on in. - */ -static void Transform (u32_t *buf, u32_t *in) -{ - u32_t a = buf[0], b = buf[1], c = buf[2], d = buf[3]; - - /* Round 1 */ -#define S11 7 -#define S12 12 -#define S13 17 -#define S14 22 - FF ( a, b, c, d, in[ 0], S11, UL(3614090360)); /* 1 */ - FF ( d, a, b, c, in[ 1], S12, UL(3905402710)); /* 2 */ - FF ( c, d, a, b, in[ 2], S13, UL( 606105819)); /* 3 */ - FF ( b, c, d, a, in[ 3], S14, UL(3250441966)); /* 4 */ - FF ( a, b, c, d, in[ 4], S11, UL(4118548399)); /* 5 */ - FF ( d, a, b, c, in[ 5], S12, UL(1200080426)); /* 6 */ - FF ( c, d, a, b, in[ 6], S13, UL(2821735955)); /* 7 */ - FF ( b, c, d, a, in[ 7], S14, UL(4249261313)); /* 8 */ - FF ( a, b, c, d, in[ 8], S11, UL(1770035416)); /* 9 */ - FF ( d, a, b, c, in[ 9], S12, UL(2336552879)); /* 10 */ - FF ( c, d, a, b, in[10], S13, UL(4294925233)); /* 11 */ - FF ( b, c, d, a, in[11], S14, UL(2304563134)); /* 12 */ - FF ( a, b, c, d, in[12], S11, UL(1804603682)); /* 13 */ - FF ( d, a, b, c, in[13], S12, UL(4254626195)); /* 14 */ - FF ( c, d, a, b, in[14], S13, UL(2792965006)); /* 15 */ - FF ( b, c, d, a, in[15], S14, UL(1236535329)); /* 16 */ - - /* Round 2 */ -#define S21 5 -#define S22 9 -#define S23 14 -#define S24 20 - GG ( a, b, c, d, in[ 1], S21, UL(4129170786)); /* 17 */ - GG ( d, a, b, c, in[ 6], S22, UL(3225465664)); /* 18 */ - GG ( c, d, a, b, in[11], S23, UL( 643717713)); /* 19 */ - GG ( b, c, d, a, in[ 0], S24, UL(3921069994)); /* 20 */ - GG ( a, b, c, d, in[ 5], S21, UL(3593408605)); /* 21 */ - GG ( d, a, b, c, in[10], S22, UL( 38016083)); /* 22 */ - GG ( c, d, a, b, in[15], S23, UL(3634488961)); /* 23 */ - GG ( b, c, d, a, in[ 4], S24, UL(3889429448)); /* 24 */ - GG ( a, b, c, d, in[ 9], S21, UL( 568446438)); /* 25 */ - GG ( d, a, b, c, in[14], S22, UL(3275163606)); /* 26 */ - GG ( c, d, a, b, in[ 3], S23, UL(4107603335)); /* 27 */ - GG ( b, c, d, a, in[ 8], S24, UL(1163531501)); /* 28 */ - GG ( a, b, c, d, in[13], S21, UL(2850285829)); /* 29 */ - GG ( d, a, b, c, in[ 2], S22, UL(4243563512)); /* 30 */ - GG ( c, d, a, b, in[ 7], S23, UL(1735328473)); /* 31 */ - GG ( b, c, d, a, in[12], S24, UL(2368359562)); /* 32 */ - - /* Round 3 */ -#define S31 4 -#define S32 11 -#define S33 16 -#define S34 23 - HH ( a, b, c, d, in[ 5], S31, UL(4294588738)); /* 33 */ - HH ( d, a, b, c, in[ 8], S32, UL(2272392833)); /* 34 */ - HH ( c, d, a, b, in[11], S33, UL(1839030562)); /* 35 */ - HH ( b, c, d, a, in[14], S34, UL(4259657740)); /* 36 */ - HH ( a, b, c, d, in[ 1], S31, UL(2763975236)); /* 37 */ - HH ( d, a, b, c, in[ 4], S32, UL(1272893353)); /* 38 */ - HH ( c, d, a, b, in[ 7], S33, UL(4139469664)); /* 39 */ - HH ( b, c, d, a, in[10], S34, UL(3200236656)); /* 40 */ - HH ( a, b, c, d, in[13], S31, UL( 681279174)); /* 41 */ - HH ( d, a, b, c, in[ 0], S32, UL(3936430074)); /* 42 */ - HH ( c, d, a, b, in[ 3], S33, UL(3572445317)); /* 43 */ - HH ( b, c, d, a, in[ 6], S34, UL( 76029189)); /* 44 */ - HH ( a, b, c, d, in[ 9], S31, UL(3654602809)); /* 45 */ - HH ( d, a, b, c, in[12], S32, UL(3873151461)); /* 46 */ - HH ( c, d, a, b, in[15], S33, UL( 530742520)); /* 47 */ - HH ( b, c, d, a, in[ 2], S34, UL(3299628645)); /* 48 */ - - /* Round 4 */ -#define S41 6 -#define S42 10 -#define S43 15 -#define S44 21 - II ( a, b, c, d, in[ 0], S41, UL(4096336452)); /* 49 */ - II ( d, a, b, c, in[ 7], S42, UL(1126891415)); /* 50 */ - II ( c, d, a, b, in[14], S43, UL(2878612391)); /* 51 */ - II ( b, c, d, a, in[ 5], S44, UL(4237533241)); /* 52 */ - II ( a, b, c, d, in[12], S41, UL(1700485571)); /* 53 */ - II ( d, a, b, c, in[ 3], S42, UL(2399980690)); /* 54 */ - II ( c, d, a, b, in[10], S43, UL(4293915773)); /* 55 */ - II ( b, c, d, a, in[ 1], S44, UL(2240044497)); /* 56 */ - II ( a, b, c, d, in[ 8], S41, UL(1873313359)); /* 57 */ - II ( d, a, b, c, in[15], S42, UL(4264355552)); /* 58 */ - II ( c, d, a, b, in[ 6], S43, UL(2734768916)); /* 59 */ - II ( b, c, d, a, in[13], S44, UL(1309151649)); /* 60 */ - II ( a, b, c, d, in[ 4], S41, UL(4149444226)); /* 61 */ - II ( d, a, b, c, in[11], S42, UL(3174756917)); /* 62 */ - II ( c, d, a, b, in[ 2], S43, UL( 718787259)); /* 63 */ - II ( b, c, d, a, in[ 9], S44, UL(3951481745)); /* 64 */ - - buf[0] += a; - buf[1] += b; - buf[2] += c; - buf[3] += d; -} - -#endif - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/md5.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/md5.h deleted file mode 100644 index 0e81cdc3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/md5.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - *********************************************************************** - ** md5.h -- header file for implementation of MD5 ** - ** RSA Data Security, Inc. MD5 Message-Digest Algorithm ** - ** Created: 2/17/90 RLR ** - ** Revised: 12/27/90 SRD,AJ,BSK,JT Reference C version ** - ** Revised (for MD5): RLR 4/27/91 ** - ** -- G modified to have y&~z instead of y&z ** - ** -- FF, GG, HH modified to add in last register done ** - ** -- Access pattern: round 2 works mod 5, round 3 works mod 3 ** - ** -- distinct additive constant for each step ** - ** -- round 4 added, working mod 7 ** - *********************************************************************** - */ - -/* - *********************************************************************** - ** Copyright (C) 1990, RSA Data Security, Inc. All rights reserved. ** - ** ** - ** License to copy and use this software is granted provided that ** - ** it is identified as the "RSA Data Security, Inc. MD5 Message- ** - ** Digest Algorithm" in all material mentioning or referencing this ** - ** software or this function. ** - ** ** - ** License is also granted to make and use derivative works ** - ** provided that such works are identified as "derived from the RSA ** - ** Data Security, Inc. MD5 Message-Digest Algorithm" in all ** - ** material mentioning or referencing the derived work. ** - ** ** - ** RSA Data Security, Inc. makes no representations concerning ** - ** either the merchantability of this software or the suitability ** - ** of this software for any particular purpose. It is provided "as ** - ** is" without express or implied warranty of any kind. ** - ** ** - ** These notices must be retained in any copies of any part of this ** - ** documentation and/or software. ** - *********************************************************************** - */ - -#ifndef MD5_H -#define MD5_H - -/* Data structure for MD5 (Message-Digest) computation */ -typedef struct { - u32_t i[2]; /* number of _bits_ handled mod 2^64 */ - u32_t buf[4]; /* scratch buffer */ - unsigned char in[64]; /* input buffer */ - unsigned char digest[16]; /* actual digest after MD5Final call */ -} MD5_CTX; - -void MD5Init (MD5_CTX *mdContext); -void MD5Update (MD5_CTX *mdContext, unsigned char *inBuf, unsigned int inLen); -void MD5Final (unsigned char hash[], MD5_CTX *mdContext); - -#endif /* MD5_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/pap.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/pap.c deleted file mode 100644 index 23e438ff..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/pap.c +++ /dev/null @@ -1,608 +0,0 @@ -/***************************************************************************** -* pap.c - Network Password Authentication Protocol program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-12 Guy Lancaster , Global Election Systems Inc. -* Original. -*****************************************************************************/ -/* - * upap.c - User/Password Authentication Protocol. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include "ppp.h" -#include "auth.h" -#include "pap.h" -#include "pppdebug.h" - - -#if PAP_SUPPORT > 0 - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -/* - * Protocol entry points. - */ -static void upap_init (int); -static void upap_lowerup (int); -static void upap_lowerdown (int); -static void upap_input (int, u_char *, int); -static void upap_protrej (int); - -static void upap_timeout (void *); -static void upap_reqtimeout (void *); -static void upap_rauthreq (upap_state *, u_char *, int, int); -static void upap_rauthack (upap_state *, u_char *, int, int); -static void upap_rauthnak (upap_state *, u_char *, int, int); -static void upap_sauthreq (upap_state *); -static void upap_sresp (upap_state *, u_char, u_char, char *, int); - - - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ -struct protent pap_protent = { - PPP_PAP, - upap_init, - upap_input, - upap_protrej, - upap_lowerup, - upap_lowerdown, - NULL, - NULL, -#if 0 - upap_printpkt, - NULL, -#endif - 1, - "PAP", -#if 0 - NULL, - NULL, - NULL -#endif -}; - -upap_state upap[NUM_PPP]; /* UPAP state; one for each unit */ - - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * Set the default login name and password for the pap sessions - */ -void upap_setloginpasswd(int unit, const char *luser, const char *lpassword) -{ - upap_state *u = &upap[unit]; - - /* Save the username and password we're given */ - u->us_user = luser; - u->us_userlen = strlen(luser); - u->us_passwd = lpassword; - u->us_passwdlen = strlen(lpassword); -} - - -/* - * upap_authwithpeer - Authenticate us with our peer (start client). - * - * Set new state and send authenticate's. - */ -void upap_authwithpeer(int unit, char *user, char *password) -{ - upap_state *u = &upap[unit]; - - UPAPDEBUG((LOG_INFO, "upap_authwithpeer: %d user=%s password=%s s=%d\n", - unit, user, password, u->us_clientstate)); - - upap_setloginpasswd(unit, user, password); - - u->us_transmits = 0; - - /* Lower layer up yet? */ - if (u->us_clientstate == UPAPCS_INITIAL || - u->us_clientstate == UPAPCS_PENDING) { - u->us_clientstate = UPAPCS_PENDING; - return; - } - - upap_sauthreq(u); /* Start protocol */ -} - - -/* - * upap_authpeer - Authenticate our peer (start server). - * - * Set new state. - */ -void upap_authpeer(int unit) -{ - upap_state *u = &upap[unit]; - - /* Lower layer up yet? */ - if (u->us_serverstate == UPAPSS_INITIAL || - u->us_serverstate == UPAPSS_PENDING) { - u->us_serverstate = UPAPSS_PENDING; - return; - } - - u->us_serverstate = UPAPSS_LISTEN; - if (u->us_reqtimeout > 0) - TIMEOUT(upap_reqtimeout, u, u->us_reqtimeout); -} - - - -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ -/* - * upap_init - Initialize a UPAP unit. - */ -static void upap_init(int unit) -{ - upap_state *u = &upap[unit]; - - UPAPDEBUG((LOG_INFO, "upap_init: %d\n", unit)); - u->us_unit = unit; - u->us_user = NULL; - u->us_userlen = 0; - u->us_passwd = NULL; - u->us_passwdlen = 0; - u->us_clientstate = UPAPCS_INITIAL; - u->us_serverstate = UPAPSS_INITIAL; - u->us_id = 0; - u->us_timeouttime = UPAP_DEFTIMEOUT; - u->us_maxtransmits = 10; - u->us_reqtimeout = UPAP_DEFREQTIME; -} - -/* - * upap_timeout - Retransmission timer for sending auth-reqs expired. - */ -static void upap_timeout(void *arg) -{ - upap_state *u = (upap_state *) arg; - - UPAPDEBUG((LOG_INFO, "upap_timeout: %d timeout %d expired s=%d\n", - u->us_unit, u->us_timeouttime, u->us_clientstate)); - - if (u->us_clientstate != UPAPCS_AUTHREQ) - return; - - if (u->us_transmits >= u->us_maxtransmits) { - /* give up in disgust */ - UPAPDEBUG((LOG_ERR, "No response to PAP authenticate-requests\n")); - u->us_clientstate = UPAPCS_BADAUTH; - auth_withpeer_fail(u->us_unit, PPP_PAP); - return; - } - - upap_sauthreq(u); /* Send Authenticate-Request */ -} - - -/* - * upap_reqtimeout - Give up waiting for the peer to send an auth-req. - */ -static void upap_reqtimeout(void *arg) -{ - upap_state *u = (upap_state *) arg; - - if (u->us_serverstate != UPAPSS_LISTEN) - return; /* huh?? */ - - auth_peer_fail(u->us_unit, PPP_PAP); - u->us_serverstate = UPAPSS_BADAUTH; -} - - -/* - * upap_lowerup - The lower layer is up. - * - * Start authenticating if pending. - */ -static void upap_lowerup(int unit) -{ - upap_state *u = &upap[unit]; - - UPAPDEBUG((LOG_INFO, "upap_lowerup: %d s=%d\n", unit, u->us_clientstate)); - - if (u->us_clientstate == UPAPCS_INITIAL) - u->us_clientstate = UPAPCS_CLOSED; - else if (u->us_clientstate == UPAPCS_PENDING) { - upap_sauthreq(u); /* send an auth-request */ - } - - if (u->us_serverstate == UPAPSS_INITIAL) - u->us_serverstate = UPAPSS_CLOSED; - else if (u->us_serverstate == UPAPSS_PENDING) { - u->us_serverstate = UPAPSS_LISTEN; - if (u->us_reqtimeout > 0) - TIMEOUT(upap_reqtimeout, u, u->us_reqtimeout); - } -} - - -/* - * upap_lowerdown - The lower layer is down. - * - * Cancel all timeouts. - */ -static void upap_lowerdown(int unit) -{ - upap_state *u = &upap[unit]; - - UPAPDEBUG((LOG_INFO, "upap_lowerdown: %d s=%d\n", unit, u->us_clientstate)); - - if (u->us_clientstate == UPAPCS_AUTHREQ) /* Timeout pending? */ - UNTIMEOUT(upap_timeout, u); /* Cancel timeout */ - if (u->us_serverstate == UPAPSS_LISTEN && u->us_reqtimeout > 0) - UNTIMEOUT(upap_reqtimeout, u); - - u->us_clientstate = UPAPCS_INITIAL; - u->us_serverstate = UPAPSS_INITIAL; -} - - -/* - * upap_protrej - Peer doesn't speak this protocol. - * - * This shouldn't happen. In any case, pretend lower layer went down. - */ -static void upap_protrej(int unit) -{ - upap_state *u = &upap[unit]; - - if (u->us_clientstate == UPAPCS_AUTHREQ) { - UPAPDEBUG((LOG_ERR, "PAP authentication failed due to protocol-reject\n")); - auth_withpeer_fail(unit, PPP_PAP); - } - if (u->us_serverstate == UPAPSS_LISTEN) { - UPAPDEBUG((LOG_ERR, "PAP authentication of peer failed (protocol-reject)\n")); - auth_peer_fail(unit, PPP_PAP); - } - upap_lowerdown(unit); -} - - -/* - * upap_input - Input UPAP packet. - */ -static void upap_input(int unit, u_char *inpacket, int l) -{ - upap_state *u = &upap[unit]; - u_char *inp; - u_char code, id; - int len; - - /* - * Parse header (code, id and length). - * If packet too short, drop it. - */ - inp = inpacket; - if (l < UPAP_HEADERLEN) { - UPAPDEBUG((LOG_INFO, "pap_input: rcvd short header.\n")); - return; - } - GETCHAR(code, inp); - GETCHAR(id, inp); - GETSHORT(len, inp); - if (len < UPAP_HEADERLEN) { - UPAPDEBUG((LOG_INFO, "pap_input: rcvd illegal length.\n")); - return; - } - if (len > l) { - UPAPDEBUG((LOG_INFO, "pap_input: rcvd short packet.\n")); - return; - } - len -= UPAP_HEADERLEN; - - /* - * Action depends on code. - */ - switch (code) { - case UPAP_AUTHREQ: - upap_rauthreq(u, inp, id, len); - break; - - case UPAP_AUTHACK: - upap_rauthack(u, inp, id, len); - break; - - case UPAP_AUTHNAK: - upap_rauthnak(u, inp, id, len); - break; - - default: /* XXX Need code reject */ - break; - } -} - - -/* - * upap_rauth - Receive Authenticate. - */ -static void upap_rauthreq( - upap_state *u, - u_char *inp, - int id, - int len -) -{ - u_char ruserlen, rpasswdlen; - char *ruser, *rpasswd; - int retcode; - char *msg; - int msglen; - - UPAPDEBUG((LOG_INFO, "pap_rauth: Rcvd id %d.\n", id)); - - if (u->us_serverstate < UPAPSS_LISTEN) - return; - - /* - * If we receive a duplicate authenticate-request, we are - * supposed to return the same status as for the first request. - */ - if (u->us_serverstate == UPAPSS_OPEN) { - upap_sresp(u, UPAP_AUTHACK, id, "", 0); /* return auth-ack */ - return; - } - if (u->us_serverstate == UPAPSS_BADAUTH) { - upap_sresp(u, UPAP_AUTHNAK, id, "", 0); /* return auth-nak */ - return; - } - - /* - * Parse user/passwd. - */ - if (len < sizeof (u_char)) { - UPAPDEBUG((LOG_INFO, "pap_rauth: rcvd short packet.\n")); - return; - } - GETCHAR(ruserlen, inp); - len -= sizeof (u_char) + ruserlen + sizeof (u_char); - if (len < 0) { - UPAPDEBUG((LOG_INFO, "pap_rauth: rcvd short packet.\n")); - return; - } - ruser = (char *) inp; - INCPTR(ruserlen, inp); - GETCHAR(rpasswdlen, inp); - if (len < rpasswdlen) { - UPAPDEBUG((LOG_INFO, "pap_rauth: rcvd short packet.\n")); - return; - } - rpasswd = (char *) inp; - - /* - * Check the username and password given. - */ - retcode = check_passwd(u->us_unit, ruser, ruserlen, rpasswd, - rpasswdlen, &msg, &msglen); - BZERO(rpasswd, rpasswdlen); - - upap_sresp(u, retcode, id, msg, msglen); - - if (retcode == UPAP_AUTHACK) { - u->us_serverstate = UPAPSS_OPEN; - auth_peer_success(u->us_unit, PPP_PAP, ruser, ruserlen); - } else { - u->us_serverstate = UPAPSS_BADAUTH; - auth_peer_fail(u->us_unit, PPP_PAP); - } - - if (u->us_reqtimeout > 0) - UNTIMEOUT(upap_reqtimeout, u); -} - - -/* - * upap_rauthack - Receive Authenticate-Ack. - */ -static void upap_rauthack( - upap_state *u, - u_char *inp, - int id, - int len -) -{ - u_char msglen; - char *msg; - - UPAPDEBUG((LOG_INFO, "pap_rauthack: Rcvd id %d s=%d\n", id, u->us_clientstate)); - - if (u->us_clientstate != UPAPCS_AUTHREQ) /* XXX */ - return; - - /* - * Parse message. - */ - if (len < sizeof (u_char)) { - UPAPDEBUG((LOG_INFO, "pap_rauthack: rcvd short packet.\n")); - return; - } - GETCHAR(msglen, inp); - len -= sizeof (u_char); - if (len < msglen) { - UPAPDEBUG((LOG_INFO, "pap_rauthack: rcvd short packet.\n")); - return; - } - msg = (char *) inp; - PRINTMSG(msg, msglen); - - u->us_clientstate = UPAPCS_OPEN; - - auth_withpeer_success(u->us_unit, PPP_PAP); -} - - -/* - * upap_rauthnak - Receive Authenticate-Nakk. - */ -static void upap_rauthnak( - upap_state *u, - u_char *inp, - int id, - int len -) -{ - u_char msglen; - char *msg; - - UPAPDEBUG((LOG_INFO, "pap_rauthnak: Rcvd id %d s=%d\n", id, u->us_clientstate)); - - if (u->us_clientstate != UPAPCS_AUTHREQ) /* XXX */ - return; - - /* - * Parse message. - */ - if (len < sizeof (u_char)) { - UPAPDEBUG((LOG_INFO, "pap_rauthnak: rcvd short packet.\n")); - return; - } - GETCHAR(msglen, inp); - len -= sizeof (u_char); - if (len < msglen) { - UPAPDEBUG((LOG_INFO, "pap_rauthnak: rcvd short packet.\n")); - return; - } - msg = (char *) inp; - PRINTMSG(msg, msglen); - - u->us_clientstate = UPAPCS_BADAUTH; - - UPAPDEBUG((LOG_ERR, "PAP authentication failed\n")); - auth_withpeer_fail(u->us_unit, PPP_PAP); -} - - -/* - * upap_sauthreq - Send an Authenticate-Request. - */ -static void upap_sauthreq(upap_state *u) -{ - u_char *outp; - int outlen; - - outlen = UPAP_HEADERLEN + 2 * sizeof (u_char) - + u->us_userlen + u->us_passwdlen; - outp = outpacket_buf[u->us_unit]; - - MAKEHEADER(outp, PPP_PAP); - - PUTCHAR(UPAP_AUTHREQ, outp); - PUTCHAR(++u->us_id, outp); - PUTSHORT(outlen, outp); - PUTCHAR(u->us_userlen, outp); - BCOPY(u->us_user, outp, u->us_userlen); - INCPTR(u->us_userlen, outp); - PUTCHAR(u->us_passwdlen, outp); - BCOPY(u->us_passwd, outp, u->us_passwdlen); - - pppWrite(u->us_unit, outpacket_buf[u->us_unit], outlen + PPP_HDRLEN); - - UPAPDEBUG((LOG_INFO, "pap_sauth: Sent id %d\n", u->us_id)); - - TIMEOUT(upap_timeout, u, u->us_timeouttime); - ++u->us_transmits; - u->us_clientstate = UPAPCS_AUTHREQ; -} - - -/* - * upap_sresp - Send a response (ack or nak). - */ -static void upap_sresp( - upap_state *u, - u_char code, - u_char id, - char *msg, - int msglen -) -{ - u_char *outp; - int outlen; - - outlen = UPAP_HEADERLEN + sizeof (u_char) + msglen; - outp = outpacket_buf[u->us_unit]; - MAKEHEADER(outp, PPP_PAP); - - PUTCHAR(code, outp); - PUTCHAR(id, outp); - PUTSHORT(outlen, outp); - PUTCHAR(msglen, outp); - BCOPY(msg, outp, msglen); - pppWrite(u->us_unit, outpacket_buf[u->us_unit], outlen + PPP_HDRLEN); - - UPAPDEBUG((LOG_INFO, "pap_sresp: Sent code %d, id %d s=%d\n", - code, id, u->us_clientstate)); -} - -#if 0 -/* - * upap_printpkt - print the contents of a PAP packet. - */ -static int upap_printpkt( - u_char *p, - int plen, - void (*printer) (void *, char *, ...), - void *arg -) -{ - (void)p; - (void)plen; - (void)printer; - (void)arg; - return 0; -} -#endif - -#endif /* PAP_SUPPORT */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/pap.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/pap.h deleted file mode 100644 index 215c8a4f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/pap.h +++ /dev/null @@ -1,129 +0,0 @@ -/***************************************************************************** -* pap.h - PPP Password Authentication Protocol header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-12-04 Guy Lancaster , Global Election Systems Inc. -* Original derived from BSD codes. -*****************************************************************************/ -/* - * upap.h - User/Password Authentication Protocol definitions. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - - -#ifndef PAP_H -#define PAP_H - -/************************* -*** PUBLIC DEFINITIONS *** -*************************/ -/* - * Packet header = Code, id, length. - */ -#define UPAP_HEADERLEN (sizeof (u_char) + sizeof (u_char) + sizeof (u_short)) - - -/* - * UPAP codes. - */ -#define UPAP_AUTHREQ 1 /* Authenticate-Request */ -#define UPAP_AUTHACK 2 /* Authenticate-Ack */ -#define UPAP_AUTHNAK 3 /* Authenticate-Nak */ - -/* - * Client states. - */ -#define UPAPCS_INITIAL 0 /* Connection down */ -#define UPAPCS_CLOSED 1 /* Connection up, haven't requested auth */ -#define UPAPCS_PENDING 2 /* Connection down, have requested auth */ -#define UPAPCS_AUTHREQ 3 /* We've sent an Authenticate-Request */ -#define UPAPCS_OPEN 4 /* We've received an Ack */ -#define UPAPCS_BADAUTH 5 /* We've received a Nak */ - -/* - * Server states. - */ -#define UPAPSS_INITIAL 0 /* Connection down */ -#define UPAPSS_CLOSED 1 /* Connection up, haven't requested auth */ -#define UPAPSS_PENDING 2 /* Connection down, have requested auth */ -#define UPAPSS_LISTEN 3 /* Listening for an Authenticate */ -#define UPAPSS_OPEN 4 /* We've sent an Ack */ -#define UPAPSS_BADAUTH 5 /* We've sent a Nak */ - - -/************************ -*** PUBLIC DATA TYPES *** -************************/ - -/* - * Each interface is described by upap structure. - */ -typedef struct upap_state { - int us_unit; /* Interface unit number */ - const char *us_user; /* User */ - int us_userlen; /* User length */ - const char *us_passwd; /* Password */ - int us_passwdlen; /* Password length */ - int us_clientstate; /* Client state */ - int us_serverstate; /* Server state */ - u_char us_id; /* Current id */ - int us_timeouttime; /* Timeout (seconds) for auth-req retrans. */ - int us_transmits; /* Number of auth-reqs sent */ - int us_maxtransmits; /* Maximum number of auth-reqs to send */ - int us_reqtimeout; /* Time to wait for auth-req from peer */ -} upap_state; - - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ - -extern upap_state upap[]; - -void upap_setloginpasswd(int unit, const char *luser, const char *lpassword); -void upap_authwithpeer (int, char *, char *); -void upap_authpeer (int); - -extern struct protent pap_protent; - -#endif /* PAP_H */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/ppp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/ppp.c deleted file mode 100644 index 0d22eabf..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/ppp.c +++ /dev/null @@ -1,1644 +0,0 @@ -/***************************************************************************** -* ppp.c - Network Point to Point Protocol program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* 06-09-13 Christian Walter -* pppMain now correctly exists by releasing all resources and destroying -* the thread. -* 06-08-04 Christian Walter -* pppOpen code now checks if thread creation was successfull. If not returns -* an error. -* pppMain now correctly closes the thread if it exists. -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-11-05 Guy Lancaster , Global Election Systems Inc. -* Original. -*****************************************************************************/ - -/* - * ppp_defs.h - PPP definitions. - * - * if_pppvar.h - private structures and declarations for PPP. - * - * Copyright (c) 1994 The Australian National University. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation is hereby granted, provided that the above copyright - * notice appears in all copies. This software is provided without any - * warranty, express or implied. The Australian National University - * makes no representations about the suitability of this software for - * any purpose. - * - * IN NO EVENT SHALL THE AUSTRALIAN NATIONAL UNIVERSITY BE LIABLE TO ANY - * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES - * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF - * THE AUSTRALIAN NATIONAL UNIVERSITY HAVE BEEN ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * THE AUSTRALIAN NATIONAL UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE AUSTRALIAN NATIONAL UNIVERSITY HAS NO - * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, - * OR MODIFICATIONS. - */ - -/* - * if_ppp.h - Point-to-Point Protocol definitions. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#include - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "randm.h" -#include "fsm.h" -#if PAP_SUPPORT > 0 -#include "pap.h" -#endif -#if CHAP_SUPPORT > 0 -#include "chap.h" -#endif -#include "ipcp.h" -#include "lcp.h" -#include "magic.h" -#include "auth.h" -#if VJ_SUPPORT > 0 -#include "vj.h" -#endif - -#include "pppdebug.h" - -/*************************/ -/*** LOCAL DEFINITIONS ***/ -/*************************/ - -/* - * The basic PPP frame. - */ -#define PPP_ADDRESS(p) (((u_char *)(p))[0]) -#define PPP_CONTROL(p) (((u_char *)(p))[1]) -#define PPP_PROTOCOL(p) ((((u_char *)(p))[2] << 8) + ((u_char *)(p))[3]) - -/* PPP packet parser states. Current state indicates operation yet to be - * completed. */ -typedef enum { - PDIDLE = 0, /* Idle state - waiting. */ - PDSTART, /* Process start flag. */ - PDADDRESS, /* Process address field. */ - PDCONTROL, /* Process control field. */ - PDPROTOCOL1, /* Process protocol field 1. */ - PDPROTOCOL2, /* Process protocol field 2. */ - PDDATA /* Process data byte. */ -} PPPDevStates; - -#define ESCAPE_P(accm, c) ((accm)[(c) >> 3] & pppACCMMask[c & 0x07]) - -/************************/ -/*** LOCAL DATA TYPES ***/ -/************************/ -/* - * PPP interface control block. - */ -typedef struct PPPControl_s { - char openFlag; /* True when in use. */ - char oldFrame; /* Old framing character for fd. */ - sio_fd_t fd; /* File device ID of port. */ - int kill_link; /* Shut the link down. */ - int sig_hup; /* Carrier lost. */ - int if_up; /* True when the interface is up. */ - int errCode; /* Code indicating why interface is down. */ - struct pbuf *inHead, *inTail; /* The input packet. */ - PPPDevStates inState; /* The input process state. */ - char inEscaped; /* Escape next character. */ - u16_t inProtocol; /* The input protocol code. */ - u16_t inFCS; /* Input Frame Check Sequence value. */ - int mtu; /* Peer's mru */ - int pcomp; /* Does peer accept protocol compression? */ - int accomp; /* Does peer accept addr/ctl compression? */ - u_long lastXMit; /* Time of last transmission. */ - ext_accm inACCM; /* Async-Ctl-Char-Map for input. */ - ext_accm outACCM; /* Async-Ctl-Char-Map for output. */ -#if VJ_SUPPORT > 0 - int vjEnabled; /* Flag indicating VJ compression enabled. */ - struct vjcompress vjComp; /* Van Jabobsen compression header. */ -#endif - - struct netif netif; - - struct ppp_addrs addrs; - - void (*linkStatusCB)(void *ctx, int errCode, void *arg); - void *linkStatusCtx; - -} PPPControl; - - -/* - * Ioctl definitions. - */ - -struct npioctl { - int protocol; /* PPP procotol, e.g. PPP_IP */ - enum NPmode mode; -}; - - - -/***********************************/ -/*** LOCAL FUNCTION DECLARATIONS ***/ -/***********************************/ -static void pppMain(void *pd); -static void pppDrop(PPPControl *pc); -static void pppInProc(int pd, u_char *s, int l); - - -/******************************/ -/*** PUBLIC DATA STRUCTURES ***/ -/******************************/ -u_long subnetMask; - -static PPPControl pppControl[NUM_PPP]; /* The PPP interface control blocks. */ - -/* - * PPP Data Link Layer "protocol" table. - * One entry per supported protocol. - * The last entry must be NULL. - */ -struct protent *ppp_protocols[] = { - &lcp_protent, -#if PAP_SUPPORT > 0 - &pap_protent, -#endif -#if CHAP_SUPPORT > 0 - &chap_protent, -#endif -#if CBCP_SUPPORT > 0 - &cbcp_protent, -#endif - &ipcp_protent, -#if CCP_SUPPORT > 0 - &ccp_protent, -#endif - NULL -}; - - -/* - * Buffers for outgoing packets. This must be accessed only from the appropriate - * PPP task so that it doesn't need to be protected to avoid collisions. - */ -u_char outpacket_buf[NUM_PPP][PPP_MRU+PPP_HDRLEN]; - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ - -/* - * FCS lookup table as calculated by genfcstab. - */ -static const u_short fcstab[256] = { - 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, - 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, - 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, - 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, - 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, - 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, - 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, - 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, - 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, - 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, - 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, - 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, - 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, - 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1, - 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, - 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70, - 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, - 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff, - 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, - 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, - 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, - 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, - 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, - 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, - 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, - 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, - 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, - 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a, - 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, - 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9, - 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, - 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78 -}; - -/* PPP's Asynchronous-Control-Character-Map. The mask array is used - * to select the specific bit for a character. */ -static u_char pppACCMMask[] = { - 0x01, - 0x02, - 0x04, - 0x08, - 0x10, - 0x20, - 0x40, - 0x80 -}; - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* Initialize the PPP subsystem. */ - -struct ppp_settings ppp_settings; - -void pppInit(void) -{ - struct protent *protp; - int i, j; - - memset(&ppp_settings, 0, sizeof(ppp_settings)); - ppp_settings.usepeerdns = 1; - pppSetAuth(PPPAUTHTYPE_NONE, NULL, NULL); - - magicInit(); - - for (i = 0; i < NUM_PPP; i++) { - pppControl[i].openFlag = 0; - - subnetMask = htonl(0xffffff00); - - /* - * Initialize to the standard option set. - */ - for (j = 0; (protp = ppp_protocols[j]) != NULL; ++j) - (*protp->init)(i); - } - -#if LINK_STATS - /* Clear the statistics. */ - memset(&lwip_stats.link, 0, sizeof(lwip_stats.link)); -#endif -} - -void pppSetAuth(enum pppAuthType authType, const char *user, const char *passwd) -{ - switch(authType) { - case PPPAUTHTYPE_NONE: - default: -#ifdef LWIP_PPP_STRICT_PAP_REJECT - ppp_settings.refuse_pap = 1; -#else - /* some providers request pap and accept an empty login/pw */ - ppp_settings.refuse_pap = 0; -#endif - ppp_settings.refuse_chap = 1; - break; - case PPPAUTHTYPE_ANY: -/* Warning: Using PPPAUTHTYPE_ANY might have security consequences. - * RFC 1994 says: - * - * In practice, within or associated with each PPP server, there is a - * database which associates "user" names with authentication - * information ("secrets"). It is not anticipated that a particular - * named user would be authenticated by multiple methods. This would - * make the user vulnerable to attacks which negotiate the least secure - * method from among a set (such as PAP rather than CHAP). If the same - * secret was used, PAP would reveal the secret to be used later with - * CHAP. - * - * Instead, for each user name there should be an indication of exactly - * one method used to authenticate that user name. If a user needs to - * make use of different authentication methods under different - * circumstances, then distinct user names SHOULD be employed, each of - * which identifies exactly one authentication method. - * - */ - ppp_settings.refuse_pap = 0; - ppp_settings.refuse_chap = 0; - break; - case PPPAUTHTYPE_PAP: - ppp_settings.refuse_pap = 0; - ppp_settings.refuse_chap = 1; - break; - case PPPAUTHTYPE_CHAP: - ppp_settings.refuse_pap = 1; - ppp_settings.refuse_chap = 0; - break; - } - - if(user) { - strncpy(ppp_settings.user, user, sizeof(ppp_settings.user)-1); - ppp_settings.user[sizeof(ppp_settings.user)-1] = '\0'; - } else - ppp_settings.user[0] = '\0'; - - if(passwd) { - strncpy(ppp_settings.passwd, passwd, sizeof(ppp_settings.passwd)-1); - ppp_settings.passwd[sizeof(ppp_settings.passwd)-1] = '\0'; - } else - ppp_settings.passwd[0] = '\0'; -} - -/* Open a new PPP connection using the given I/O device. - * This initializes the PPP control block but does not - * attempt to negotiate the LCP session. If this port - * connects to a modem, the modem connection must be - * established before calling this. - * Return a new PPP connection descriptor on success or - * an error code (negative) on failure. */ -int pppOpen(sio_fd_t fd, void (*linkStatusCB)(void *ctx, int errCode, void *arg), void *linkStatusCtx) -{ - PPPControl *pc; - int pd; - - /* Find a free PPP session descriptor. Critical region? */ - for (pd = 0; pd < NUM_PPP && pppControl[pd].openFlag != 0; pd++); - if (pd >= NUM_PPP) - pd = PPPERR_OPEN; - else - pppControl[pd].openFlag = !0; - - /* Launch a deamon thread. */ - if (pd >= 0) { - - pppControl[pd].openFlag = 1; - - lcp_init(pd); - pc = &pppControl[pd]; - pc->fd = fd; - pc->kill_link = 0; - pc->sig_hup = 0; - pc->if_up = 0; - pc->errCode = 0; - pc->inState = PDIDLE; - pc->inHead = NULL; - pc->inTail = NULL; - pc->inEscaped = 0; - pc->lastXMit = 0; - -#if VJ_SUPPORT > 0 - pc->vjEnabled = 0; - vj_compress_init(&pc->vjComp); -#endif - - /* - * Default the in and out accm so that escape and flag characters - * are always escaped. - */ - memset(pc->inACCM, 0, sizeof(ext_accm)); - pc->inACCM[15] = 0x60; - memset(pc->outACCM, 0, sizeof(ext_accm)); - pc->outACCM[15] = 0x60; - - pc->linkStatusCB = linkStatusCB; - pc->linkStatusCtx = linkStatusCtx; - - if( sys_thread_new(pppMain, (void*)pd, PPP_THREAD_PRIO) != SYS_THREAD_NULL ) - { - if(!linkStatusCB) { - while(pd >= 0 && !pc->if_up) { - sys_msleep(500); - if (lcp_phase[pd] == PHASE_DEAD) { - pppClose(pd); - if (pc->errCode) - pd = pc->errCode; - else - pd = PPPERR_CONNECT; - } - } - } - } - else - { - pc->openFlag = 0; - pd = PPPERR_ALLOC; - } - } - return pd; -} - -/* Close a PPP connection and release the descriptor. - * Any outstanding packets in the queues are dropped. - * Return 0 on success, an error code on failure. */ -int pppClose(int pd) -{ - PPPControl *pc = &pppControl[pd]; - int st = 0; - - /* Disconnect */ - pc->kill_link = !0; - pppMainWakeup(pd); - - if(!pc->linkStatusCB) { - while(st >= 0 && lcp_phase[pd] != PHASE_DEAD) { - sys_msleep(500); - break; - } - } - return st; -} - -/* This function is called when carrier is lost on the PPP channel. */ -void pppSigHUP(int pd) -{ - PPPControl *pc = &pppControl[pd]; - - pc->sig_hup = 1; - pppMainWakeup(pd); -} - -static void nPut(PPPControl *pc, struct pbuf *nb) -{ - struct pbuf *b; - int c; - - for(b = nb; b != NULL; b = b->next) { - if((c = sio_write(pc->fd, b->payload, b->len)) != b->len) { - PPPDEBUG((LOG_WARNING, - "PPP nPut: incomplete sio_write(%d,, %u) = %d\n", pc->fd, b->len, c)); -#if LINK_STATS - lwip_stats.link.err++; -#endif /* LINK_STATS */ - pc->lastXMit = 0; /* prepend PPP_FLAG to next packet */ - break; - } - } - pbuf_free(nb); - -#if LINK_STATS - lwip_stats.link.xmit++; -#endif /* LINK_STATS */ -} - -/* - * pppAppend - append given character to end of given pbuf. If outACCM - * is not NULL and the character needs to be escaped, do so. - * If pbuf is full, append another. - * Return the current pbuf. - */ -static struct pbuf *pppAppend(u_char c, struct pbuf *nb, ext_accm *outACCM) -{ - struct pbuf *tb = nb; - - /* Make sure there is room for the character and an escape code. - * Sure we don't quite fill the buffer if the character doesn't - * get escaped but is one character worth complicating this? */ - /* Note: We assume no packet header. */ - if (nb && (PBUF_POOL_BUFSIZE - nb->len) < 2) { - tb = pbuf_alloc(PBUF_RAW, 0, PBUF_POOL); - if (tb) { - nb->next = tb; - } -#if LINK_STATS - else { - lwip_stats.link.memerr++; - } -#endif /* LINK_STATS */ - nb = tb; - } - if (nb) { - if (outACCM && ESCAPE_P(*outACCM, c)) { - *((u_char*)nb->payload + nb->len++) = PPP_ESCAPE; - *((u_char*)nb->payload + nb->len++) = c ^ PPP_TRANS; - } - else - *((u_char*)nb->payload + nb->len++) = c; - } - - return tb; -} - -/* Send a packet on the given connection. */ -static err_t pppifOutput(struct netif *netif, struct pbuf *pb, struct ip_addr *ipaddr) -{ - int pd = (int)netif->state; - u_short protocol = PPP_IP; - PPPControl *pc = &pppControl[pd]; - u_int fcsOut = PPP_INITFCS; - struct pbuf *headMB = NULL, *tailMB = NULL, *p; - u_char c; - - (void)ipaddr; - - /* Validate parameters. */ - /* We let any protocol value go through - it can't hurt us - * and the peer will just drop it if it's not accepting it. */ - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag || !pb) { - PPPDEBUG((LOG_WARNING, "pppifOutput[%d]: bad parms prot=%d pb=%p\n", - pd, protocol, pb)); -#if LINK_STATS - lwip_stats.link.opterr++; - lwip_stats.link.drop++; -#endif - return ERR_ARG; - } - - /* Check that the link is up. */ - if (lcp_phase[pd] == PHASE_DEAD) { - PPPDEBUG((LOG_ERR, "pppifOutput[%d]: link not up\n", pd)); -#if LINK_STATS - lwip_stats.link.rterr++; - lwip_stats.link.drop++; -#endif - return ERR_RTE; - } - - /* Grab an output buffer. */ - headMB = pbuf_alloc(PBUF_RAW, 0, PBUF_POOL); - if (headMB == NULL) { - PPPDEBUG((LOG_WARNING, "pppifOutput[%d]: first alloc fail\n", pd)); -#if LINK_STATS - lwip_stats.link.memerr++; - lwip_stats.link.drop++; -#endif /* LINK_STATS */ - return ERR_MEM; - } - -#if VJ_SUPPORT > 0 - /* - * Attempt Van Jacobson header compression if VJ is configured and - * this is an IP packet. - */ - if (protocol == PPP_IP && pc->vjEnabled) { - switch (vj_compress_tcp(&pc->vjComp, pb)) { - case TYPE_IP: - /* No change... - protocol = PPP_IP_PROTOCOL; - */ - break; - case TYPE_COMPRESSED_TCP: - protocol = PPP_VJC_COMP; - break; - case TYPE_UNCOMPRESSED_TCP: - protocol = PPP_VJC_UNCOMP; - break; - default: - PPPDEBUG((LOG_WARNING, "pppifOutput[%d]: bad IP packet\n", pd)); -#if LINK_STATS - lwip_stats.link.proterr++; - lwip_stats.link.drop++; -#endif - pbuf_free(headMB); - return ERR_VAL; - } - } -#endif - - tailMB = headMB; - - /* Build the PPP header. */ - if ((sys_jiffies() - pc->lastXMit) >= PPP_MAXIDLEFLAG) - tailMB = pppAppend(PPP_FLAG, tailMB, NULL); - pc->lastXMit = sys_jiffies(); - if (!pc->accomp) { - fcsOut = PPP_FCS(fcsOut, PPP_ALLSTATIONS); - tailMB = pppAppend(PPP_ALLSTATIONS, tailMB, &pc->outACCM); - fcsOut = PPP_FCS(fcsOut, PPP_UI); - tailMB = pppAppend(PPP_UI, tailMB, &pc->outACCM); - } - if (!pc->pcomp || protocol > 0xFF) { - c = (protocol >> 8) & 0xFF; - fcsOut = PPP_FCS(fcsOut, c); - tailMB = pppAppend(c, tailMB, &pc->outACCM); - } - c = protocol & 0xFF; - fcsOut = PPP_FCS(fcsOut, c); - tailMB = pppAppend(c, tailMB, &pc->outACCM); - - /* Load packet. */ - for(p = pb; p; p = p->next) { - int n; - u_char *sPtr; - - sPtr = (u_char*)p->payload; - n = p->len; - while (n-- > 0) { - c = *sPtr++; - - /* Update FCS before checking for special characters. */ - fcsOut = PPP_FCS(fcsOut, c); - - /* Copy to output buffer escaping special characters. */ - tailMB = pppAppend(c, tailMB, &pc->outACCM); - } - } - - /* Add FCS and trailing flag. */ - c = ~fcsOut & 0xFF; - tailMB = pppAppend(c, tailMB, &pc->outACCM); - c = (~fcsOut >> 8) & 0xFF; - tailMB = pppAppend(c, tailMB, &pc->outACCM); - tailMB = pppAppend(PPP_FLAG, tailMB, NULL); - - /* If we failed to complete the packet, throw it away. */ - if (!tailMB) { - PPPDEBUG((LOG_WARNING, - "pppifOutput[%d]: Alloc err - dropping proto=%d\n", - pd, protocol)); - pbuf_free(headMB); -#if LINK_STATS - lwip_stats.link.memerr++; - lwip_stats.link.drop++; -#endif - return ERR_MEM; - } - - /* Send it. */ - PPPDEBUG((LOG_INFO, "pppifOutput[%d]: proto=0x%04X\n", pd, protocol)); - - nPut(pc, headMB); - - return ERR_OK; -} - -/* Get and set parameters for the given connection. - * Return 0 on success, an error code on failure. */ -int pppIOCtl(int pd, int cmd, void *arg) -{ - PPPControl *pc = &pppControl[pd]; - int st = 0; - - if (pd < 0 || pd >= NUM_PPP) - st = PPPERR_PARAM; - else { - switch(cmd) { - case PPPCTLG_UPSTATUS: /* Get the PPP up status. */ - if (arg) - *(int *)arg = (int)(pc->if_up); - else - st = PPPERR_PARAM; - break; - case PPPCTLS_ERRCODE: /* Set the PPP error code. */ - if (arg) - pc->errCode = *(int *)arg; - else - st = PPPERR_PARAM; - break; - case PPPCTLG_ERRCODE: /* Get the PPP error code. */ - if (arg) - *(int *)arg = (int)(pc->errCode); - else - st = PPPERR_PARAM; - break; - case PPPCTLG_FD: - if (arg) - *(sio_fd_t *)arg = pc->fd; - else - st = PPPERR_PARAM; - break; - default: - st = PPPERR_PARAM; - break; - } - } - - return st; -} - -/* - * Return the Maximum Transmission Unit for the given PPP connection. - */ -u_int pppMTU(int pd) -{ - PPPControl *pc = &pppControl[pd]; - u_int st; - - /* Validate parameters. */ - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) - st = 0; - else - st = pc->mtu; - - return st; -} - -/* - * Write n characters to a ppp link. - * RETURN: >= 0 Number of characters written - * -1 Failed to write to device - */ -int pppWrite(int pd, const u_char *s, int n) -{ - PPPControl *pc = &pppControl[pd]; - u_char c; - u_int fcsOut = PPP_INITFCS; - struct pbuf *headMB = NULL, *tailMB; - headMB = pbuf_alloc(PBUF_RAW, 0, PBUF_POOL); - if (headMB == NULL) { -#if LINK_STATS - lwip_stats.link.memerr++; - lwip_stats.link.proterr++; -#endif /* LINK_STATS */ - return PPPERR_ALLOC; - } - - tailMB = headMB; - - /* If the link has been idle, we'll send a fresh flag character to - * flush any noise. */ - if ((sys_jiffies() - pc->lastXMit) >= PPP_MAXIDLEFLAG) - tailMB = pppAppend(PPP_FLAG, tailMB, NULL); - pc->lastXMit = sys_jiffies(); - - /* Load output buffer. */ - while (n-- > 0) { - c = *s++; - - /* Update FCS before checking for special characters. */ - fcsOut = PPP_FCS(fcsOut, c); - - /* Copy to output buffer escaping special characters. */ - tailMB = pppAppend(c, tailMB, &pc->outACCM); - } - - /* Add FCS and trailing flag. */ - c = ~fcsOut & 0xFF; - tailMB = pppAppend(c, tailMB, &pc->outACCM); - c = (~fcsOut >> 8) & 0xFF; - tailMB = pppAppend(c, tailMB, &pc->outACCM); - tailMB = pppAppend(PPP_FLAG, tailMB, NULL); - - /* If we failed to complete the packet, throw it away. - * Otherwise send it. */ - if (!tailMB) { - PPPDEBUG((LOG_WARNING, - "pppWrite[%d]: Alloc err - dropping pbuf len=%d\n", pd, headMB->len)); -/* "pppWrite[%d]: Alloc err - dropping %d:%.*H", pd, headMB->len, LWIP_MIN(headMB->len * 2, 40), headMB->payload)); */ - pbuf_free(headMB); -#if LINK_STATS - lwip_stats.link.memerr++; - lwip_stats.link.proterr++; -#endif /* LINK_STATS */ - return PPPERR_ALLOC; - } - - PPPDEBUG((LOG_INFO, "pppWrite[%d]: len=%d\n", pd, headMB->len)); -/* "pppWrite[%d]: %d:%.*H", pd, headMB->len, LWIP_MIN(headMB->len * 2, 40), headMB->payload)); */ - nPut(pc, headMB); - - return PPPERR_NONE; -} - -/* - * ppp_send_config - configure the transmit characteristics of - * the ppp interface. - */ -void ppp_send_config( - int unit, - int mtu, - u32_t asyncmap, - int pcomp, - int accomp -) -{ - PPPControl *pc = &pppControl[unit]; - int i; - - pc->mtu = mtu; - pc->pcomp = pcomp; - pc->accomp = accomp; - - /* Load the ACCM bits for the 32 control codes. */ - for (i = 0; i < 32/8; i++) - pc->outACCM[i] = (u_char)((asyncmap >> (8 * i)) & 0xFF); - PPPDEBUG((LOG_INFO, "ppp_send_config[%d]: outACCM=%X %X %X %X\n", - unit, - pc->outACCM[0], pc->outACCM[1], pc->outACCM[2], pc->outACCM[3])); -} - - -/* - * ppp_set_xaccm - set the extended transmit ACCM for the interface. - */ -void ppp_set_xaccm(int unit, ext_accm *accm) -{ - memcpy(pppControl[unit].outACCM, accm, sizeof(ext_accm)); - PPPDEBUG((LOG_INFO, "ppp_set_xaccm[%d]: outACCM=%X %X %X %X\n", - unit, - pppControl[unit].outACCM[0], - pppControl[unit].outACCM[1], - pppControl[unit].outACCM[2], - pppControl[unit].outACCM[3])); -} - - -/* - * ppp_recv_config - configure the receive-side characteristics of - * the ppp interface. - */ -void ppp_recv_config( - int unit, - int mru, - u32_t asyncmap, - int pcomp, - int accomp -) -{ - PPPControl *pc = &pppControl[unit]; - int i; - - (void)accomp; - (void)pcomp; - (void)mru; - - /* Load the ACCM bits for the 32 control codes. */ - for (i = 0; i < 32 / 8; i++) - pc->inACCM[i] = (u_char)(asyncmap >> (i * 8)); - PPPDEBUG((LOG_INFO, "ppp_recv_config[%d]: inACCM=%X %X %X %X\n", - unit, - pc->inACCM[0], pc->inACCM[1], pc->inACCM[2], pc->inACCM[3])); -} - -#if 0 -/* - * ccp_test - ask kernel whether a given compression method - * is acceptable for use. Returns 1 if the method and parameters - * are OK, 0 if the method is known but the parameters are not OK - * (e.g. code size should be reduced), or -1 if the method is unknown. - */ -int ccp_test( - int unit, - int opt_len, - int for_transmit, - u_char *opt_ptr -) -{ - return 0; /* XXX Currently no compression. */ -} - -/* - * ccp_flags_set - inform kernel about the current state of CCP. - */ -void ccp_flags_set(int unit, int isopen, int isup) -{ - /* XXX */ -} - -/* - * ccp_fatal_error - returns 1 if decompression was disabled as a - * result of an error detected after decompression of a packet, - * 0 otherwise. This is necessary because of patent nonsense. - */ -int ccp_fatal_error(int unit) -{ - /* XXX */ - return 0; -} -#endif - -/* - * get_idle_time - return how long the link has been idle. - */ -int get_idle_time(int u, struct ppp_idle *ip) -{ - /* XXX */ - (void)u; - (void)ip; - - return 0; -} - - -/* - * Return user specified netmask, modified by any mask we might determine - * for address `addr' (in network byte order). - * Here we scan through the system's list of interfaces, looking for - * any non-point-to-point interfaces which might appear to be on the same - * network as `addr'. If we find any, we OR in their netmask to the - * user-specified netmask. - */ -u32_t GetMask(u32_t addr) -{ - u32_t mask, nmask; - - htonl(addr); - if (IN_CLASSA(addr)) /* determine network mask for address class */ - nmask = IN_CLASSA_NET; - else if (IN_CLASSB(addr)) - nmask = IN_CLASSB_NET; - else - nmask = IN_CLASSC_NET; - /* class D nets are disallowed by bad_ip_adrs */ - mask = subnetMask | htonl(nmask); - - /* XXX - * Scan through the system's network interfaces. - * Get each netmask and OR them into our mask. - */ - - return mask; -} - -/* - * sifvjcomp - config tcp header compression - */ -int sifvjcomp( - int pd, - int vjcomp, - int cidcomp, - int maxcid -) -{ -#if VJ_SUPPORT > 0 - PPPControl *pc = &pppControl[pd]; - - pc->vjEnabled = vjcomp; - pc->vjComp.compressSlot = cidcomp; - pc->vjComp.maxSlotIndex = maxcid; - PPPDEBUG((LOG_INFO, "sifvjcomp: VJ compress enable=%d slot=%d max slot=%d\n", - vjcomp, cidcomp, maxcid)); -#endif - - return 0; -} - -/* - * pppifNetifInit - netif init callback - */ -static err_t pppifNetifInit(struct netif *netif) -{ - netif->name[0] = 'p'; - netif->name[1] = 'p'; - netif->output = pppifOutput; - netif->mtu = pppMTU((int)netif->state); - return ERR_OK; -} - - -/* - * sifup - Config the interface up and enable IP packets to pass. - */ -int sifup(int pd) -{ - PPPControl *pc = &pppControl[pd]; - int st = 1; - - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { - st = 0; - PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); - } else { - netif_remove(&pc->netif); - if (netif_add(&pc->netif, &pc->addrs.our_ipaddr, &pc->addrs.netmask, &pc->addrs.his_ipaddr, (void *)pd, pppifNetifInit, ip_input)) { - pc->if_up = 1; - pc->errCode = PPPERR_NONE; - /* bug #16602 */ - netif_set_up( &pc->netif ); - - PPPDEBUG((LOG_DEBUG, "sifup: unit %d: linkStatusCB=%lx errCode=%d\n", pd, pc->linkStatusCB, pc->errCode)); - if(pc->linkStatusCB) - pc->linkStatusCB(pc->linkStatusCtx, pc->errCode, &pc->addrs); - } else { - st = 0; - PPPDEBUG((LOG_ERR, "sifup[%d]: netif_add failed\n", pd)); - } - } - - return st; -} - -/* - * sifnpmode - Set the mode for handling packets for a given NP. - */ -int sifnpmode(int u, int proto, enum NPmode mode) -{ - (void)u; - (void)proto; - (void)mode; - return 0; -} - -/* - * sifdown - Config the interface down and disable IP. - */ -int sifdown(int pd) -{ - PPPControl *pc = &pppControl[pd]; - int st = 1; - - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { - st = 0; - PPPDEBUG((LOG_WARNING, "sifdown[%d]: bad parms\n", pd)); - } else { - pc->if_up = 0; - netif_remove(&pc->netif); - PPPDEBUG((LOG_DEBUG, "sifdown: unit %d: linkStatusCB=%lx errCode=%d\n", pd, pc->linkStatusCB, pc->errCode)); - if(pc->linkStatusCB) - pc->linkStatusCB(pc->linkStatusCtx, PPPERR_CONNECT, NULL); - } - return st; -} - -/* - * sifaddr - Config the interface IP addresses and netmask. - */ -int sifaddr( - int pd, /* Interface unit ??? */ - u32_t o, /* Our IP address ??? */ - u32_t h, /* His IP address ??? */ - u32_t m, /* IP subnet mask ??? */ - u32_t ns1, /* Primary DNS */ - u32_t ns2 /* Secondary DNS */ -) -{ - PPPControl *pc = &pppControl[pd]; - int st = 1; - - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { - st = 0; - PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); - } else { - memcpy(&pc->addrs.our_ipaddr, &o, sizeof(o)); - memcpy(&pc->addrs.his_ipaddr, &h, sizeof(h)); - memcpy(&pc->addrs.netmask, &m, sizeof(m)); - memcpy(&pc->addrs.dns1, &ns1, sizeof(ns1)); - memcpy(&pc->addrs.dns2, &ns2, sizeof(ns2)); - } - return st; -} - -/* - * cifaddr - Clear the interface IP addresses, and delete routes - * through the interface if possible. - */ -int cifaddr( - int pd, /* Interface unit ??? */ - u32_t o, /* Our IP address ??? */ - u32_t h /* IP broadcast address ??? */ -) -{ - PPPControl *pc = &pppControl[pd]; - int st = 1; - - (void)o; - (void)h; - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { - st = 0; - PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); - } else { - IP4_ADDR(&pc->addrs.our_ipaddr, 0,0,0,0); - IP4_ADDR(&pc->addrs.his_ipaddr, 0,0,0,0); - IP4_ADDR(&pc->addrs.netmask, 255,255,255,0); - IP4_ADDR(&pc->addrs.dns1, 0,0,0,0); - IP4_ADDR(&pc->addrs.dns2, 0,0,0,0); - } - return st; -} - -/* - * sifdefaultroute - assign a default route through the address given. - */ -int sifdefaultroute(int pd, u32_t l, u32_t g) -{ - PPPControl *pc = &pppControl[pd]; - int st = 1; - - (void)l; - (void)g; - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { - st = 0; - PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); - } else { - netif_set_default(&pc->netif); - } - - /* TODO: check how PPP handled the netMask, previously not set by ipSetDefault */ - - return st; -} - -/* - * cifdefaultroute - delete a default route through the address given. - */ -int cifdefaultroute(int pd, u32_t l, u32_t g) -{ - PPPControl *pc = &pppControl[pd]; - int st = 1; - - (void)l; - (void)g; - if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { - st = 0; - PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); - } else { - netif_set_default(NULL); - } - - return st; -} - -void -pppMainWakeup(int pd) -{ - PPPDEBUG((LOG_DEBUG, "pppMainWakeup: unit %d\n", pd)); - sio_read_abort( pppControl[pd].fd ); -} - -/* these callbacks are necessary because lcp_* functions - must be called in the same context as pppInput(), - namely the tcpip_thread(), essentially because - they manipulate timeouts which are thread-private -*/ - -static void -pppStartCB(void *arg) -{ - int pd = (int)arg; - - PPPDEBUG((LOG_DEBUG, "pppStartCB: unit %d\n", pd)); - lcp_lowerup(pd); - lcp_open(pd); /* Start protocol */ -} - -static void -pppStopCB(void *arg) -{ - int pd = (int)arg; - - PPPDEBUG((LOG_DEBUG, "pppStopCB: unit %d\n", pd)); - lcp_close(pd, "User request"); -} - -static void -pppHupCB(void *arg) -{ - int pd = (int)arg; - - PPPDEBUG((LOG_DEBUG, "pppHupCB: unit %d\n", pd)); - lcp_lowerdown(pd); - link_terminated(pd); -} -/**********************************/ -/*** LOCAL FUNCTION DEFINITIONS ***/ -/**********************************/ -/* The main PPP process function. This implements the state machine according - * to section 4 of RFC 1661: The Point-To-Point Protocol. */ -static void pppMain(void *arg) -{ - err_t err; - int pd = (int)arg; - struct pbuf *p; - PPPControl* pc; - - pc = &pppControl[pd]; - - p = pbuf_alloc(PBUF_RAW, PPP_MRU+PPP_HDRLEN, PBUF_RAM); - if(!p) { - LWIP_ASSERT("p != NULL", p); - pc->errCode = PPPERR_ALLOC; - goto out; - } - - /* - * Start the connection and handle incoming events (packet or timeout). - */ - PPPDEBUG((LOG_INFO, "pppMain: unit %d: Connecting\n", pd)); - err = tcpip_callback(pppStartCB, arg); - LWIP_ASSERT( "pppMain: can't install callback handler\n", err == ERR_OK ); - while (lcp_phase[pd] != PHASE_DEAD) { - if (pc->kill_link) { - PPPDEBUG((LOG_DEBUG, "pppMainWakeup: unit %d kill_link -> pppStopCB\n", pd)); - pc->errCode = PPPERR_USER; - /* This will leave us at PHASE_DEAD. */ - tcpip_callback(pppStopCB, arg); - pc->kill_link = 0; - } - else if (pc->sig_hup) { - PPPDEBUG((LOG_DEBUG, "pppMainWakeup: unit %d sig_hup -> pppHupCB\n", pd)); - pc->sig_hup = 0; - tcpip_callback(pppHupCB, arg); - } else { - int c = sio_read(pc->fd, p->payload, p->len); - if(c > 0) { - pppInProc(pd, p->payload, c); - } else { - /* PPPDEBUG((LOG_DEBUG, "pppMainWakeup: unit %d sio_read len=%d returned %d\n", pd, p->len, c)); */ - } - } - } - PPPDEBUG((LOG_INFO, "pppMain: unit %d: PHASE_DEAD\n", pd)); - pppDrop(pc); - pbuf_free(p); - -out: - PPPDEBUG((LOG_DEBUG, "pppMain: unit %d: linkStatusCB=%lx errCode=%d\n", pd, pc->linkStatusCB, pc->errCode)); - if(pc->linkStatusCB) - pc->linkStatusCB(pc->linkStatusCtx, pc->errCode ? pc->errCode : PPPERR_PROTOCOL, NULL); - - pc->openFlag = 0; - - /* Remove this thread from the running ones. */ - sys_arch_thread_remove( sys_arch_thread_current( ) ); - LWIP_ASSERT( "pppMain: sys_arch_thread_remove did return\n", 0 ); -} - -static struct pbuf *pppSingleBuf(struct pbuf *p) -{ - struct pbuf *q, *b; - u_char *pl; - - if(p->tot_len == p->len) - return p; - - q = pbuf_alloc(PBUF_RAW, p->tot_len, PBUF_RAM); - if(!q) { - PPPDEBUG((LOG_ERR, - "pppSingleBuf: unable to alloc new buf (%d)\n", p->tot_len)); - return p; /* live dangerously */ - } - - for(b = p, pl = q->payload; b != NULL; b = b->next) { - memcpy(pl, b->payload, b->len); - pl += b->len; - } - - pbuf_free(p); - - return q; -} - -struct pppInputHeader { - int unit; - u16_t proto; -}; - -/* - * Pass the processed input packet to the appropriate handler. - * This function and all handlers run in the context of the tcpip_thread - */ -static void pppInput(void *arg) -{ - struct pbuf *nb = (struct pbuf *)arg; - u16_t protocol; - int pd; - - pd = ((struct pppInputHeader *)nb->payload)->unit; - protocol = ((struct pppInputHeader *)nb->payload)->proto; - - pbuf_header(nb, -(int)sizeof(struct pppInputHeader)); - -#if LINK_STATS - lwip_stats.link.recv++; -#endif /* LINK_STATS */ - - /* - * Toss all non-LCP packets unless LCP is OPEN. - * Until we get past the authentication phase, toss all packets - * except LCP, LQR and authentication packets. - */ - if((lcp_phase[pd] <= PHASE_AUTHENTICATE) && (protocol != PPP_LCP)) { - if(!((protocol == PPP_LQR) || (protocol == PPP_PAP) || (protocol == PPP_CHAP)) || - (lcp_phase[pd] != PHASE_AUTHENTICATE)) { - PPPDEBUG((LOG_INFO, "pppInput: discarding proto 0x%04X in phase %d\n", protocol, lcp_phase[pd])); - goto drop; - } - } - - switch(protocol) { - case PPP_VJC_COMP: /* VJ compressed TCP */ -#if VJ_SUPPORT > 0 - PPPDEBUG((LOG_INFO, "pppInput[%d]: vj_comp in pbuf len=%d\n", pd, nb->len)); - /* - * Clip off the VJ header and prepend the rebuilt TCP/IP header and - * pass the result to IP. - */ - if (vj_uncompress_tcp(&nb, &pppControl[pd].vjComp) >= 0) { - pppControl[pd].netif.input(nb, &pppControl[pd].netif); - return; - } - /* Something's wrong so drop it. */ - PPPDEBUG((LOG_WARNING, "pppInput[%d]: Dropping VJ compressed\n", pd)); -#else - /* No handler for this protocol so drop the packet. */ - PPPDEBUG((LOG_INFO, "pppInput[%d]: drop VJ Comp in %d:%s\n", pd, nb->len, nb->payload)); -#endif /* VJ_SUPPORT > 0 */ - break; - case PPP_VJC_UNCOMP: /* VJ uncompressed TCP */ -#if VJ_SUPPORT > 0 - PPPDEBUG((LOG_INFO, "pppInput[%d]: vj_un in pbuf len=%d\n", pd, nb->len)); - /* - * Process the TCP/IP header for VJ header compression and then pass - * the packet to IP. - */ - if (vj_uncompress_uncomp(nb, &pppControl[pd].vjComp) >= 0) { - pppControl[pd].netif.input(nb, &pppControl[pd].netif); - return; - } - /* Something's wrong so drop it. */ - PPPDEBUG((LOG_WARNING, "pppInput[%d]: Dropping VJ uncompressed\n", pd)); -#else - /* No handler for this protocol so drop the packet. */ - PPPDEBUG((LOG_INFO, - "pppInput[%d]: drop VJ UnComp in %d:.*H\n", - pd, nb->len, LWIP_MIN(nb->len * 2, 40), nb->payload)); -#endif /* VJ_SUPPORT > 0 */ - break; - case PPP_IP: /* Internet Protocol */ - PPPDEBUG((LOG_INFO, "pppInput[%d]: ip in pbuf len=%d\n", pd, nb->len)); - pppControl[pd].netif.input(nb, &pppControl[pd].netif); - return; - default: - { - struct protent *protp; - int i; - - /* - * Upcall the proper protocol input routine. - */ - for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) { - if (protp->protocol == protocol && protp->enabled_flag) { - PPPDEBUG((LOG_INFO, "pppInput[%d]: %s len=%d\n", pd, protp->name, nb->len)); - nb = pppSingleBuf(nb); - (*protp->input)(pd, nb->payload, nb->len); - goto out; - } - } - - /* No handler for this protocol so reject the packet. */ - PPPDEBUG((LOG_INFO, "pppInput[%d]: rejecting unsupported proto 0x%04X len=%d\n", pd, protocol, nb->len)); - pbuf_header(nb, sizeof(protocol)); -#if BYTE_ORDER == LITTLE_ENDIAN - protocol = htons(protocol); - memcpy(nb->payload, &protocol, sizeof(protocol)); -#endif - lcp_sprotrej(pd, nb->payload, nb->len); - } - break; - } - -drop: -#if LINK_STATS - lwip_stats.link.drop++; -#endif - -out: - pbuf_free(nb); - return; -} - - -/* - * Drop the input packet. - */ -static void pppDrop(PPPControl *pc) -{ - if (pc->inHead != NULL) { -#if 0 - PPPDEBUG((LOG_INFO, "pppDrop: %d:%.*H\n", pc->inHead->len, min(60, pc->inHead->len * 2), pc->inHead->payload)); -#endif - PPPDEBUG((LOG_INFO, "pppDrop: pbuf len=%d\n", pc->inHead->len)); - if (pc->inTail && (pc->inTail != pc->inHead)) - pbuf_free(pc->inTail); - pbuf_free(pc->inHead); - pc->inHead = NULL; - pc->inTail = NULL; - } -#if VJ_SUPPORT > 0 - vj_uncompress_err(&pc->vjComp); -#endif - -#if LINK_STATS - lwip_stats.link.drop++; -#endif /* LINK_STATS */ -} - - -/* - * Process a received octet string. - */ -static void pppInProc(int pd, u_char *s, int l) -{ - PPPControl *pc = &pppControl[pd]; - struct pbuf *nextNBuf; - u_char curChar; - - PPPDEBUG((LOG_DEBUG, "pppInProc[%d]: got %d bytes\n", pd, l)); - while (l-- > 0) { - curChar = *s++; - - /* Handle special characters. */ - if (ESCAPE_P(pc->inACCM, curChar)) { - /* Check for escape sequences. */ - /* XXX Note that this does not handle an escaped 0x5d character which - * would appear as an escape character. Since this is an ASCII ']' - * and there is no reason that I know of to escape it, I won't complicate - * the code to handle this case. GLL */ - if (curChar == PPP_ESCAPE) - pc->inEscaped = 1; - /* Check for the flag character. */ - else if (curChar == PPP_FLAG) { - /* If this is just an extra flag character, ignore it. */ - if (pc->inState <= PDADDRESS) - ; - /* If we haven't received the packet header, drop what has come in. */ - else if (pc->inState < PDDATA) { - PPPDEBUG((LOG_WARNING, - "pppInProc[%d]: Dropping incomplete packet %d\n", - pd, pc->inState)); -#if LINK_STATS - lwip_stats.link.lenerr++; -#endif - pppDrop(pc); - } - /* If the fcs is invalid, drop the packet. */ - else if (pc->inFCS != PPP_GOODFCS) { - PPPDEBUG((LOG_INFO, - "pppInProc[%d]: Dropping bad fcs 0x%04X proto=0x%04X\n", - pd, pc->inFCS, pc->inProtocol)); -#if LINK_STATS - lwip_stats.link.chkerr++; -#endif - pppDrop(pc); - } - /* Otherwise it's a good packet so pass it on. */ - else { - - /* Trim off the checksum. */ - if(pc->inTail->len >= 2) { - pc->inTail->len -= 2; - - pc->inTail->tot_len = pc->inTail->len; - if (pc->inTail != pc->inHead) { - pbuf_cat(pc->inHead, pc->inTail); - } - } else { - pc->inTail->tot_len = pc->inTail->len; - if (pc->inTail != pc->inHead) { - pbuf_cat(pc->inHead, pc->inTail); - } - - pbuf_realloc(pc->inHead, pc->inHead->tot_len - 2); - } - - /* Dispatch the packet thereby consuming it. */ - if(tcpip_callback(pppInput, pc->inHead) != ERR_OK) { - PPPDEBUG((LOG_ERR, - "pppInProc[%d]: tcpip_callback() failed, dropping packet\n", pd)); - pbuf_free(pc->inHead); -#if LINK_STATS - lwip_stats.link.drop++; -#endif - } - pc->inHead = NULL; - pc->inTail = NULL; - } - - /* Prepare for a new packet. */ - pc->inFCS = PPP_INITFCS; - pc->inState = PDADDRESS; - pc->inEscaped = 0; - } - /* Other characters are usually control characters that may have - * been inserted by the physical layer so here we just drop them. */ - else { - PPPDEBUG((LOG_WARNING, - "pppInProc[%d]: Dropping ACCM char <%d>\n", pd, curChar)); - } - } - /* Process other characters. */ - else { - /* Unencode escaped characters. */ - if (pc->inEscaped) { - pc->inEscaped = 0; - curChar ^= PPP_TRANS; - } - - /* Process character relative to current state. */ - switch(pc->inState) { - case PDIDLE: /* Idle state - waiting. */ - /* Drop the character if it's not 0xff - * we would have processed a flag character above. */ - if (curChar != PPP_ALLSTATIONS) { - break; - } - - /* Fall through */ - case PDSTART: /* Process start flag. */ - /* Prepare for a new packet. */ - pc->inFCS = PPP_INITFCS; - - /* Fall through */ - case PDADDRESS: /* Process address field. */ - if (curChar == PPP_ALLSTATIONS) { - pc->inState = PDCONTROL; - break; - } - /* Else assume compressed address and control fields so - * fall through to get the protocol... */ - case PDCONTROL: /* Process control field. */ - /* If we don't get a valid control code, restart. */ - if (curChar == PPP_UI) { - pc->inState = PDPROTOCOL1; - break; - } -#if 0 - else { - PPPDEBUG((LOG_WARNING, - "pppInProc[%d]: Invalid control <%d>\n", pd, curChar)); - pc->inState = PDSTART; - } -#endif - case PDPROTOCOL1: /* Process protocol field 1. */ - /* If the lower bit is set, this is the end of the protocol - * field. */ - if (curChar & 1) { - pc->inProtocol = curChar; - pc->inState = PDDATA; - } - else { - pc->inProtocol = (u_int)curChar << 8; - pc->inState = PDPROTOCOL2; - } - break; - case PDPROTOCOL2: /* Process protocol field 2. */ - pc->inProtocol |= curChar; - pc->inState = PDDATA; - break; - case PDDATA: /* Process data byte. */ - /* Make space to receive processed data. */ - if (pc->inTail == NULL || pc->inTail->len == PBUF_POOL_BUFSIZE) { - if(pc->inTail) { - pc->inTail->tot_len = pc->inTail->len; - if (pc->inTail != pc->inHead) { - pbuf_cat(pc->inHead, pc->inTail); - } - } - /* If we haven't started a packet, we need a packet header. */ - nextNBuf = pbuf_alloc(PBUF_RAW, 0, PBUF_POOL); - if (nextNBuf == NULL) { - /* No free buffers. Drop the input packet and let the - * higher layers deal with it. Continue processing - * the received pbuf chain in case a new packet starts. */ - PPPDEBUG((LOG_ERR, "pppInProc[%d]: NO FREE MBUFS!\n", pd)); -#if LINK_STATS - lwip_stats.link.memerr++; -#endif /* LINK_STATS */ - pppDrop(pc); - pc->inState = PDSTART; /* Wait for flag sequence. */ - break; - } - if (pc->inHead == NULL) { - struct pppInputHeader *pih = nextNBuf->payload; - - pih->unit = pd; - pih->proto = pc->inProtocol; - - nextNBuf->len += sizeof(*pih); - - pc->inHead = nextNBuf; - } - pc->inTail = nextNBuf; - } - /* Load character into buffer. */ - ((u_char*)pc->inTail->payload)[pc->inTail->len++] = curChar; - break; - } - - /* update the frame check sequence number. */ - pc->inFCS = PPP_FCS(pc->inFCS, curChar); - } - } - avRandomize(); -} - -#endif /* PPP_SUPPORT */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/ppp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/ppp.h deleted file mode 100644 index dbe12171..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/ppp.h +++ /dev/null @@ -1,446 +0,0 @@ -/***************************************************************************** -* ppp.h - Network Point to Point Protocol header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1997 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 97-11-05 Guy Lancaster , Global Election Systems Inc. -* Original derived from BSD codes. -*****************************************************************************/ - -#ifndef PPP_H -#define PPP_H - -#include "lwip/opt.h" - -#if PPP_SUPPORT > 0 -#include "lwip/sio.h" -#include "lwip/api.h" -#include "lwip/sockets.h" -#include "lwip/stats.h" -#include "lwip/mem.h" -#include "lwip/tcpip.h" -#include "lwip/netif.h" - -/* - * pppd.h - PPP daemon global declarations. - * - * Copyright (c) 1989 Carnegie Mellon University. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by Carnegie Mellon University. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - */ -/* - * ppp_defs.h - PPP definitions. - * - * Copyright (c) 1994 The Australian National University. - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation is hereby granted, provided that the above copyright - * notice appears in all copies. This software is provided without any - * warranty, express or implied. The Australian National University - * makes no representations about the suitability of this software for - * any purpose. - * - * IN NO EVENT SHALL THE AUSTRALIAN NATIONAL UNIVERSITY BE LIABLE TO ANY - * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES - * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF - * THE AUSTRALIAN NATIONAL UNIVERSITY HAVE BEEN ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * THE AUSTRALIAN NATIONAL UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS - * ON AN "AS IS" BASIS, AND THE AUSTRALIAN NATIONAL UNIVERSITY HAS NO - * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, - * OR MODIFICATIONS. - */ - -#define TIMEOUT(f, a, t) sys_untimeout((f), (a)), sys_timeout((t)*1000, (f), (a)) -#define UNTIMEOUT(f, a) sys_untimeout((f), (a)) - - -# ifndef __u_char_defined - -/* Type definitions for BSD code. */ -typedef unsigned long u_long; -typedef unsigned int u_int; -typedef unsigned short u_short; -typedef unsigned char u_char; - -#endif - -/* - * Constants and structures defined by the internet system, - * Per RFC 790, September 1981, and numerous additions. - */ - -/* - * The basic PPP frame. - */ -#define PPP_HDRLEN 4 /* octets for standard ppp header */ -#define PPP_FCSLEN 2 /* octets for FCS */ - - -/* - * Significant octet values. - */ -#define PPP_ALLSTATIONS 0xff /* All-Stations broadcast address */ -#define PPP_UI 0x03 /* Unnumbered Information */ -#define PPP_FLAG 0x7e /* Flag Sequence */ -#define PPP_ESCAPE 0x7d /* Asynchronous Control Escape */ -#define PPP_TRANS 0x20 /* Asynchronous transparency modifier */ - -/* - * Protocol field values. - */ -#define PPP_IP 0x21 /* Internet Protocol */ -#define PPP_AT 0x29 /* AppleTalk Protocol */ -#define PPP_VJC_COMP 0x2d /* VJ compressed TCP */ -#define PPP_VJC_UNCOMP 0x2f /* VJ uncompressed TCP */ -#define PPP_COMP 0xfd /* compressed packet */ -#define PPP_IPCP 0x8021 /* IP Control Protocol */ -#define PPP_ATCP 0x8029 /* AppleTalk Control Protocol */ -#define PPP_CCP 0x80fd /* Compression Control Protocol */ -#define PPP_LCP 0xc021 /* Link Control Protocol */ -#define PPP_PAP 0xc023 /* Password Authentication Protocol */ -#define PPP_LQR 0xc025 /* Link Quality Report protocol */ -#define PPP_CHAP 0xc223 /* Cryptographic Handshake Auth. Protocol */ -#define PPP_CBCP 0xc029 /* Callback Control Protocol */ - -/* - * Values for FCS calculations. - */ -#define PPP_INITFCS 0xffff /* Initial FCS value */ -#define PPP_GOODFCS 0xf0b8 /* Good final FCS value */ -#define PPP_FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff]) - -/* - * Extended asyncmap - allows any character to be escaped. - */ -typedef u_char ext_accm[32]; - -/* - * What to do with network protocol (NP) packets. - */ -enum NPmode { - NPMODE_PASS, /* pass the packet through */ - NPMODE_DROP, /* silently drop the packet */ - NPMODE_ERROR, /* return an error */ - NPMODE_QUEUE /* save it up for later. */ -}; - -/* - * Inline versions of get/put char/short/long. - * Pointer is advanced; we assume that both arguments - * are lvalues and will already be in registers. - * cp MUST be u_char *. - */ -#define GETCHAR(c, cp) { \ - (c) = *(cp)++; \ -} -#define PUTCHAR(c, cp) { \ - *(cp)++ = (u_char) (c); \ -} - - -#define GETSHORT(s, cp) { \ - (s) = *(cp)++ << 8; \ - (s) |= *(cp)++; \ -} -#define PUTSHORT(s, cp) { \ - *(cp)++ = (u_char) ((s) >> 8); \ - *(cp)++ = (u_char) (s); \ -} - -#define GETLONG(l, cp) { \ - (l) = *(cp)++ << 8; \ - (l) |= *(cp)++; (l) <<= 8; \ - (l) |= *(cp)++; (l) <<= 8; \ - (l) |= *(cp)++; \ -} -#define PUTLONG(l, cp) { \ - *(cp)++ = (u_char) ((l) >> 24); \ - *(cp)++ = (u_char) ((l) >> 16); \ - *(cp)++ = (u_char) ((l) >> 8); \ - *(cp)++ = (u_char) (l); \ -} - - -#define INCPTR(n, cp) ((cp) += (n)) -#define DECPTR(n, cp) ((cp) -= (n)) - -#define BCMP(s0, s1, l) memcmp((u_char *)(s0), (u_char *)(s1), (l)) -#define BCOPY(s, d, l) memcpy((d), (s), (l)) -#define BZERO(s, n) memset(s, 0, n) -#if PPP_DEBUG -#define PRINTMSG(m, l) { m[l] = '\0'; ppp_trace(LOG_INFO, "Remote message: %s\n", m); } -#else -#define PRINTMSG(m, l) -#endif - -/* - * MAKEHEADER - Add PPP Header fields to a packet. - */ -#define MAKEHEADER(p, t) { \ - PUTCHAR(PPP_ALLSTATIONS, p); \ - PUTCHAR(PPP_UI, p); \ - PUTSHORT(t, p); } - -/************************* -*** PUBLIC DEFINITIONS *** -*************************/ - -/* Error codes. */ -#define PPPERR_NONE 0 /* No error. */ -#define PPPERR_PARAM -1 /* Invalid parameter. */ -#define PPPERR_OPEN -2 /* Unable to open PPP session. */ -#define PPPERR_DEVICE -3 /* Invalid I/O device for PPP. */ -#define PPPERR_ALLOC -4 /* Unable to allocate resources. */ -#define PPPERR_USER -5 /* User interrupt. */ -#define PPPERR_CONNECT -6 /* Connection lost. */ -#define PPPERR_AUTHFAIL -7 /* Failed authentication challenge. */ -#define PPPERR_PROTOCOL -8 /* Failed to meet protocol. */ - -/* - * PPP IOCTL commands. - */ -/* - * Get the up status - 0 for down, non-zero for up. The argument must - * point to an int. - */ -#define PPPCTLG_UPSTATUS 100 /* Get the up status - 0 down else up */ -#define PPPCTLS_ERRCODE 101 /* Set the error code */ -#define PPPCTLG_ERRCODE 102 /* Get the error code */ -#define PPPCTLG_FD 103 /* Get the fd associated with the ppp */ - -/************************ -*** PUBLIC DATA TYPES *** -************************/ - -/* - * The following struct gives the addresses of procedures to call - * for a particular protocol. - */ -struct protent { - u_short protocol; /* PPP protocol number */ - /* Initialization procedure */ - void (*init) (int unit); - /* Process a received packet */ - void (*input) (int unit, u_char *pkt, int len); - /* Process a received protocol-reject */ - void (*protrej) (int unit); - /* Lower layer has come up */ - void (*lowerup) (int unit); - /* Lower layer has gone down */ - void (*lowerdown) (int unit); - /* Open the protocol */ - void (*open) (int unit); - /* Close the protocol */ - void (*close) (int unit, char *reason); -#if 0 - /* Print a packet in readable form */ - int (*printpkt) (u_char *pkt, int len, - void (*printer) (void *, char *, ...), - void *arg); - /* Process a received data packet */ - void (*datainput) (int unit, u_char *pkt, int len); -#endif - int enabled_flag; /* 0 iff protocol is disabled */ - char *name; /* Text name of protocol */ -#if 0 - /* Check requested options, assign defaults */ - void (*check_options) (u_long); - /* Configure interface for demand-dial */ - int (*demand_conf) (int unit); - /* Say whether to bring up link for this pkt */ - int (*active_pkt) (u_char *pkt, int len); -#endif -}; - -/* - * The following structure records the time in seconds since - * the last NP packet was sent or received. - */ -struct ppp_idle { - u_short xmit_idle; /* seconds since last NP packet sent */ - u_short recv_idle; /* seconds since last NP packet received */ -}; - -struct ppp_settings { - - u_int disable_defaultip : 1; /* Don't use hostname for default IP addrs */ - u_int auth_required : 1; /* Peer is required to authenticate */ - u_int explicit_remote : 1; /* remote_name specified with remotename opt */ - u_int refuse_pap : 1; /* Don't wanna auth. ourselves with PAP */ - u_int refuse_chap : 1; /* Don't wanna auth. ourselves with CHAP */ - u_int usehostname : 1; /* Use hostname for our_name */ - u_int usepeerdns : 1; /* Ask peer for DNS adds */ - - u_short idle_time_limit; /* Shut down link if idle for this long */ - int maxconnect; /* Maximum connect time (seconds) */ - - char user[MAXNAMELEN + 1];/* Username for PAP */ - char passwd[MAXSECRETLEN + 1]; /* Password for PAP, secret for CHAP */ - char our_name[MAXNAMELEN + 1]; /* Our name for authentication purposes */ - char remote_name[MAXNAMELEN + 1]; /* Peer's name for authentication */ -}; - -struct ppp_addrs { - struct ip_addr our_ipaddr, his_ipaddr, netmask, dns1, dns2; -}; - -/***************************** -*** PUBLIC DATA STRUCTURES *** -*****************************/ -/* Buffers for outgoing packets. */ -extern u_char outpacket_buf[NUM_PPP][PPP_MRU+PPP_HDRLEN]; - -extern struct ppp_settings ppp_settings; - -extern struct protent *ppp_protocols[];/* Table of pointers to supported protocols */ - - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ - -/* Initialize the PPP subsystem. */ -void pppInit(void); - -/* Warning: Using PPPAUTHTYPE_ANY might have security consequences. - * RFC 1994 says: - * - * In practice, within or associated with each PPP server, there is a - * database which associates "user" names with authentication - * information ("secrets"). It is not anticipated that a particular - * named user would be authenticated by multiple methods. This would - * make the user vulnerable to attacks which negotiate the least secure - * method from among a set (such as PAP rather than CHAP). If the same - * secret was used, PAP would reveal the secret to be used later with - * CHAP. - * - * Instead, for each user name there should be an indication of exactly - * one method used to authenticate that user name. If a user needs to - * make use of different authentication methods under different - * circumstances, then distinct user names SHOULD be employed, each of - * which identifies exactly one authentication method. - * - */ -enum pppAuthType { - PPPAUTHTYPE_NONE, - PPPAUTHTYPE_ANY, - PPPAUTHTYPE_PAP, - PPPAUTHTYPE_CHAP -}; - -void pppSetAuth(enum pppAuthType authType, const char *user, const char *passwd); - -/* - * Open a new PPP connection using the given I/O device. - * This initializes the PPP control block but does not - * attempt to negotiate the LCP session. - * Return a new PPP connection descriptor on success or - * an error code (negative) on failure. - */ -int pppOpen(sio_fd_t fd, void (*linkStatusCB)(void *ctx, int errCode, void *arg), void *linkStatusCtx); - -/* - * Close a PPP connection and release the descriptor. - * Any outstanding packets in the queues are dropped. - * Return 0 on success, an error code on failure. - */ -int pppClose(int pd); - -/* - * Indicate to the PPP process that the line has disconnected. - */ -void pppSigHUP(int pd); - -/* - * Get and set parameters for the given connection. - * Return 0 on success, an error code on failure. - */ -int pppIOCtl(int pd, int cmd, void *arg); - -/* - * Return the Maximum Transmission Unit for the given PPP connection. - */ -u_int pppMTU(int pd); - -/* - * Write n characters to a ppp link. - * RETURN: >= 0 Number of characters written - * -1 Failed to write to device - */ -int pppWrite(int pd, const u_char *s, int n); - -void pppMainWakeup(int pd); - -/* Configure i/f transmit parameters */ -void ppp_send_config (int, int, u32_t, int, int); -/* Set extended transmit ACCM */ -void ppp_set_xaccm (int, ext_accm *); -/* Configure i/f receive parameters */ -void ppp_recv_config (int, int, u32_t, int, int); -/* Find out how long link has been idle */ -int get_idle_time (int, struct ppp_idle *); - -/* Configure VJ TCP header compression */ -int sifvjcomp (int, int, int, int); -/* Configure i/f down (for IP) */ -int sifup (int); -/* Set mode for handling packets for proto */ -int sifnpmode (int u, int proto, enum NPmode mode); -/* Configure i/f down (for IP) */ -int sifdown (int); -/* Configure IP addresses for i/f */ -int sifaddr (int, u32_t, u32_t, u32_t, u32_t, u32_t); -/* Reset i/f IP addresses */ -int cifaddr (int, u32_t, u32_t); -/* Create default route through i/f */ -int sifdefaultroute (int, u32_t, u32_t); -/* Delete default route through i/f */ -int cifdefaultroute (int, u32_t, u32_t); - -/* Get appropriate netmask for address */ -u32_t GetMask (u32_t); - -#endif /* PPP_SUPPORT */ - -#endif /* PPP_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/pppdebug.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/pppdebug.h deleted file mode 100644 index de1478ce..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/pppdebug.h +++ /dev/null @@ -1,89 +0,0 @@ -/***************************************************************************** -* pppdebug.h - System debugging utilities. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* portions Copyright (c) 1998 Global Election Systems Inc. -* portions Copyright (c) 2001 by Cognizant Pty Ltd. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY (please don't use tabs!) -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 98-07-29 Guy Lancaster , Global Election Systems Inc. -* Original. -* -***************************************************************************** -*/ -#ifndef PPPDEBUG_H -#define PPPDEBUG_H - -/************************ -*** PUBLIC DATA TYPES *** -************************/ -/* Trace levels. */ -typedef enum { - LOG_CRITICAL = 0, - LOG_ERR = 1, - LOG_NOTICE = 2, - LOG_WARNING = 3, - LOG_INFO = 5, - LOG_DETAIL = 6, - LOG_DEBUG = 7 -} LogCodes; - - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ -/* - * ppp_trace - a form of printf to send tracing information to stderr - */ -void ppp_trace(int level, const char *format,...); - -#if PPP_DEBUG > 0 - -#define AUTHDEBUG(a) ppp_trace a -#define IPCPDEBUG(a) ppp_trace a -#define UPAPDEBUG(a) ppp_trace a -#define LCPDEBUG(a) ppp_trace a -#define FSMDEBUG(a) ppp_trace a -#define CHAPDEBUG(a) ppp_trace a -#define PPPDEBUG(a) ppp_trace a - -#define TRACELCP 1 - -#else - -#define AUTHDEBUG(a) -#define IPCPDEBUG(a) -#define UPAPDEBUG(a) -#define LCPDEBUG(a) -#define FSMDEBUG(a) -#define CHAPDEBUG(a) - -#define PPPDEBUG(a) - -#define TRACELCP 0 - -#endif - -#endif /* PPPDEBUG_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/randm.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/randm.c deleted file mode 100644 index 4f86875d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/randm.c +++ /dev/null @@ -1,246 +0,0 @@ -/***************************************************************************** -* randm.c - Random number generator program file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* Copyright (c) 1998 by Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 06-08-04 Christian Walter -* Fixed some compiler warnings. -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 98-06-03 Guy Lancaster , Global Election Systems Inc. -* Extracted from avos. -*****************************************************************************/ - -#include - -#include "ppp.h" -#if PPP_SUPPORT > 0 -#include "md5.h" -#include "randm.h" - -#include "pppdebug.h" - - -#if MD5_SUPPORT>0 /* this module depends on MD5 */ -#define RANDPOOLSZ 16 /* Bytes stored in the pool of randomness. */ - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -static char randPool[RANDPOOLSZ]; /* Pool of randomness. */ -static long randCount = 0; /* Pseudo-random incrementer */ - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * Initialize the random number generator. - * - * Since this is to be called on power up, we don't have much - * system randomess to work with. Here all we use is the - * real-time clock. We'll accumulate more randomness as soon - * as things start happening. - */ -void avRandomInit() -{ - avChurnRand(NULL, 0); -} - -/* - * Churn the randomness pool on a random event. Call this early and often - * on random and semi-random system events to build randomness in time for - * usage. For randomly timed events, pass a null pointer and a zero length - * and this will use the system timer and other sources to add randomness. - * If new random data is available, pass a pointer to that and it will be - * included. - * - * Ref: Applied Cryptography 2nd Ed. by Bruce Schneier p. 427 - */ -void avChurnRand(char *randData, u32_t randLen) -{ - MD5_CTX md5; - -/* ppp_trace(LOG_INFO, "churnRand: %u@%P\n", randLen, randData); */ - MD5Init(&md5); - MD5Update(&md5, (u_char *)randPool, sizeof(randPool)); - if (randData) - MD5Update(&md5, (u_char *)randData, randLen); - else { - struct { - /* INCLUDE fields for any system sources of randomness */ - char foobar; - } sysData; - - /* Load sysData fields here. */ - ; - MD5Update(&md5, (u_char *)&sysData, sizeof(sysData)); - } - MD5Final((u_char *)randPool, &md5); -/* ppp_trace(LOG_INFO, "churnRand: -> 0\n"); */ -} - -/* - * Use the random pool to generate random data. This degrades to pseudo - * random when used faster than randomness is supplied using churnRand(). - * Note: It's important that there be sufficient randomness in randPool - * before this is called for otherwise the range of the result may be - * narrow enough to make a search feasible. - * - * Ref: Applied Cryptography 2nd Ed. by Bruce Schneier p. 427 - * - * XXX Why does he not just call churnRand() for each block? Probably - * so that you don't ever publish the seed which could possibly help - * predict future values. - * XXX Why don't we preserve md5 between blocks and just update it with - * randCount each time? Probably there is a weakness but I wish that - * it was documented. - */ -void avGenRand(char *buf, u32_t bufLen) -{ - MD5_CTX md5; - u_char tmp[16]; - u32_t n; - - while (bufLen > 0) { - n = LWIP_MIN(bufLen, RANDPOOLSZ); - MD5Init(&md5); - MD5Update(&md5, (u_char *)randPool, sizeof(randPool)); - MD5Update(&md5, (u_char *)&randCount, sizeof(randCount)); - MD5Final(tmp, &md5); - randCount++; - memcpy(buf, tmp, n); - buf += n; - bufLen -= n; - } -} - -/* - * Return a new random number. - */ -u32_t avRandom() -{ - u32_t newRand; - - avGenRand((char *)&newRand, sizeof(newRand)); - - return newRand; -} - -#else /* MD5_SUPPORT */ - - -/*****************************/ -/*** LOCAL DATA STRUCTURES ***/ -/*****************************/ -static int avRandomized = 0; /* Set when truely randomized. */ -static u32_t avRandomSeed = 0; /* Seed used for random number generation. */ - - -/***********************************/ -/*** PUBLIC FUNCTION DEFINITIONS ***/ -/***********************************/ -/* - * Initialize the random number generator. - * - * Here we attempt to compute a random number seed but even if - * it isn't random, we'll randomize it later. - * - * The current method uses the fields from the real time clock, - * the idle process counter, the millisecond counter, and the - * hardware timer tick counter. When this is invoked - * in startup(), then the idle counter and timer values may - * repeat after each boot and the real time clock may not be - * operational. Thus we call it again on the first random - * event. - */ -void avRandomInit() -{ -#if 0 - /* Get a pointer into the last 4 bytes of clockBuf. */ - u32_t *lptr1 = (u32_t *)((char *)&clockBuf[3]); - - /* - * Initialize our seed using the real-time clock, the idle - * counter, the millisecond timer, and the hardware timer - * tick counter. The real-time clock and the hardware - * tick counter are the best sources of randomness but - * since the tick counter is only 16 bit (and truncated - * at that), the idle counter and millisecond timer - * (which may be small values) are added to help - * randomize the lower 16 bits of the seed. - */ - readClk(); - avRandomSeed += *(u32_t *)clockBuf + *lptr1 + OSIdleCtr - + ppp_mtime() + ((u32_t)TM1 << 16) + TM1; -#else - avRandomSeed += sys_jiffies(); /* XXX */ -#endif - - /* Initialize the Borland random number generator. */ - srand((unsigned)avRandomSeed); -} - -/* - * Randomize our random seed value. Here we use the fact that - * this function is called at *truely random* times by the polling - * and network functions. Here we only get 16 bits of new random - * value but we use the previous value to randomize the other 16 - * bits. - */ -void avRandomize(void) -{ - static u32_t last_jiffies; - - if (!avRandomized) { - avRandomized = !0; - avRandomInit(); - /* The initialization function also updates the seed. */ - } else { -/* avRandomSeed += (avRandomSeed << 16) + TM1; */ - avRandomSeed += (sys_jiffies() - last_jiffies); /* XXX */ - } - last_jiffies = sys_jiffies(); -} - -/* - * Return a new random number. - * Here we use the Borland rand() function to supply a pseudo random - * number which we make truely random by combining it with our own - * seed which is randomized by truely random events. - * Thus the numbers will be truely random unless there have been no - * operator or network events in which case it will be pseudo random - * seeded by the real time clock. - */ -u32_t avRandom() -{ - return ((((u32_t)rand() << 16) + rand()) + avRandomSeed); -} - - - -#endif /* MD5_SUPPORT */ -#endif /* PPP_SUPPORT */ - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/randm.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/randm.h deleted file mode 100644 index baa42f0c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/randm.h +++ /dev/null @@ -1,81 +0,0 @@ -/***************************************************************************** -* randm.h - Random number generator header file. -* -* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. -* Copyright (c) 1998 Global Election Systems Inc. -* -* The authors hereby grant permission to use, copy, modify, distribute, -* and license this software and its documentation for any purpose, provided -* that existing copyright notices are retained in all copies and that this -* notice and the following disclaimer are included verbatim in any -* distributions. No written agreement, license, or royalty fee is required -* for any of the authorized uses. -* -* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -* REVISION HISTORY -* -* 03-01-01 Marc Boucher -* Ported to lwIP. -* 98-05-29 Guy Lancaster , Global Election Systems Inc. -* Extracted from avos. -*****************************************************************************/ - -#ifndef RANDM_H -#define RANDM_H - -/*********************** -*** PUBLIC FUNCTIONS *** -***********************/ -/* - * Initialize the random number generator. - */ -void avRandomInit(void); - -/* - * Churn the randomness pool on a random event. Call this early and often - * on random and semi-random system events to build randomness in time for - * usage. For randomly timed events, pass a null pointer and a zero length - * and this will use the system timer and other sources to add randomness. - * If new random data is available, pass a pointer to that and it will be - * included. - */ -void avChurnRand(char *randData, u32_t randLen); - -/* - * Randomize our random seed value. To be called for truely random events - * such as user operations and network traffic. - */ -#if MD5_SUPPORT -#define avRandomize() avChurnRand(NULL, 0) -#else -void avRandomize(void); -#endif - -/* - * Use the random pool to generate random data. This degrades to pseudo - * random when used faster than randomness is supplied using churnRand(). - * Thus it's important to make sure that the results of this are not - * published directly because one could predict the next result to at - * least some degree. Also, it's important to get a good seed before - * the first use. - */ -void avGenRand(char *buf, u32_t bufLen); - -/* - * Return a new random number. - */ -u32_t avRandom(void); - - -#endif /* RANDM_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/vj.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/vj.c deleted file mode 100644 index 0636ee11..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/vj.c +++ /dev/null @@ -1,633 +0,0 @@ -/* - * Routines to compress and uncompess tcp packets (for transmission - * over low speed serial lines. - * - * Copyright (c) 1989 Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by the University of California, Berkeley. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * Van Jacobson (van@helios.ee.lbl.gov), Dec 31, 1989: - * - Initial distribution. - * - * Modified June 1993 by Paul Mackerras, paulus@cs.anu.edu.au, - * so that the entire packet being decompressed doesn't have - * to be in contiguous memory (just the compressed header). - * - * Modified March 1998 by Guy Lancaster, glanca@gesn.com, - * for a 16 bit processor. - */ - -#include - -#include "ppp.h" -#include "vj.h" -#include "pppdebug.h" - -#if VJ_SUPPORT > 0 - -#if LINK_STATS -#define INCR(counter) ++comp->stats.counter -#else -#define INCR(counter) -#endif - -#if defined(NO_CHAR_BITFIELDS) -#define getip_hl(base) ((base).ip_hl_v&0xf) -#define getth_off(base) (((base).th_x2_off&0xf0)>>4) -#else -#define getip_hl(base) ((base).ip_hl) -#define getth_off(base) ((base).th_off) -#endif - -void vj_compress_init(struct vjcompress *comp) -{ - register u_int i; - register struct cstate *tstate = comp->tstate; - -#if MAX_SLOTS == 0 - memset((char *)comp, 0, sizeof(*comp)); -#endif - comp->maxSlotIndex = MAX_SLOTS - 1; - comp->compressSlot = 0; /* Disable slot ID compression by default. */ - for (i = MAX_SLOTS - 1; i > 0; --i) { - tstate[i].cs_id = i; - tstate[i].cs_next = &tstate[i - 1]; - } - tstate[0].cs_next = &tstate[MAX_SLOTS - 1]; - tstate[0].cs_id = 0; - comp->last_cs = &tstate[0]; - comp->last_recv = 255; - comp->last_xmit = 255; - comp->flags = VJF_TOSS; -} - - -/* ENCODE encodes a number that is known to be non-zero. ENCODEZ - * checks for zero (since zero has to be encoded in the long, 3 byte - * form). - */ -#define ENCODE(n) { \ - if ((u_short)(n) >= 256) { \ - *cp++ = 0; \ - cp[1] = (n); \ - cp[0] = (n) >> 8; \ - cp += 2; \ - } else { \ - *cp++ = (n); \ - } \ -} -#define ENCODEZ(n) { \ - if ((u_short)(n) >= 256 || (u_short)(n) == 0) { \ - *cp++ = 0; \ - cp[1] = (n); \ - cp[0] = (n) >> 8; \ - cp += 2; \ - } else { \ - *cp++ = (n); \ - } \ -} - -#define DECODEL(f) { \ - if (*cp == 0) {\ - u32_t tmp = ntohl(f) + ((cp[1] << 8) | cp[2]); \ - (f) = htonl(tmp); \ - cp += 3; \ - } else { \ - u32_t tmp = ntohl(f) + (u32_t)*cp++; \ - (f) = htonl(tmp); \ - } \ -} - -#define DECODES(f) { \ - if (*cp == 0) {\ - u_short tmp = ntohs(f) + (((u_short)cp[1] << 8) | cp[2]); \ - (f) = htons(tmp); \ - cp += 3; \ - } else { \ - u_short tmp = ntohs(f) + (u_short)*cp++; \ - (f) = htons(tmp); \ - } \ -} - -#define DECODEU(f) { \ - if (*cp == 0) {\ - (f) = htons(((u_short)cp[1] << 8) | cp[2]); \ - cp += 3; \ - } else { \ - (f) = htons((u_short)*cp++); \ - } \ -} - -/* - * vj_compress_tcp - Attempt to do Van Jacobsen header compression on a - * packet. This assumes that nb and comp are not null and that the first - * buffer of the chain contains a valid IP header. - * Return the VJ type code indicating whether or not the packet was - * compressed. - */ -u_int vj_compress_tcp( - struct vjcompress *comp, - struct pbuf *pb -) -{ - register struct ip *ip = (struct ip *)pb->payload; - register struct cstate *cs = comp->last_cs->cs_next; - register u_short hlen = getip_hl(*ip); - register struct tcphdr *oth; - register struct tcphdr *th; - register u_short deltaS, deltaA; - register u_long deltaL; - register u_int changes = 0; - u_char new_seq[16]; - register u_char *cp = new_seq; - - /* - * Check that the packet is IP proto TCP. - */ - if (ip->ip_p != IPPROTO_TCP) - return (TYPE_IP); - - /* - * Bail if this is an IP fragment or if the TCP packet isn't - * `compressible' (i.e., ACK isn't set or some other control bit is - * set). - */ - if ((ip->ip_off & htons(0x3fff)) || pb->tot_len < 40) - return (TYPE_IP); - th = (struct tcphdr *)&((long *)ip)[hlen]; - if ((th->th_flags & (TCP_SYN|TCP_FIN|TCP_RST|TCP_ACK)) != TCP_ACK) - return (TYPE_IP); - - /* - * Packet is compressible -- we're going to send either a - * COMPRESSED_TCP or UNCOMPRESSED_TCP packet. Either way we need - * to locate (or create) the connection state. Special case the - * most recently used connection since it's most likely to be used - * again & we don't have to do any reordering if it's used. - */ - INCR(vjs_packets); - if (ip->ip_src.s_addr != cs->cs_ip.ip_src.s_addr - || ip->ip_dst.s_addr != cs->cs_ip.ip_dst.s_addr - || *(long *)th != ((long *)&cs->cs_ip)[getip_hl(cs->cs_ip)]) { - /* - * Wasn't the first -- search for it. - * - * States are kept in a circularly linked list with - * last_cs pointing to the end of the list. The - * list is kept in lru order by moving a state to the - * head of the list whenever it is referenced. Since - * the list is short and, empirically, the connection - * we want is almost always near the front, we locate - * states via linear search. If we don't find a state - * for the datagram, the oldest state is (re-)used. - */ - register struct cstate *lcs; - register struct cstate *lastcs = comp->last_cs; - - do { - lcs = cs; cs = cs->cs_next; - INCR(vjs_searches); - if (ip->ip_src.s_addr == cs->cs_ip.ip_src.s_addr - && ip->ip_dst.s_addr == cs->cs_ip.ip_dst.s_addr - && *(long *)th == ((long *)&cs->cs_ip)[getip_hl(cs->cs_ip)]) - goto found; - } while (cs != lastcs); - - /* - * Didn't find it -- re-use oldest cstate. Send an - * uncompressed packet that tells the other side what - * connection number we're using for this conversation. - * Note that since the state list is circular, the oldest - * state points to the newest and we only need to set - * last_cs to update the lru linkage. - */ - INCR(vjs_misses); - comp->last_cs = lcs; - hlen += getth_off(*th); - hlen <<= 2; - /* Check that the IP/TCP headers are contained in the first buffer. */ - if (hlen > pb->len) - return (TYPE_IP); - goto uncompressed; - - found: - /* - * Found it -- move to the front on the connection list. - */ - if (cs == lastcs) - comp->last_cs = lcs; - else { - lcs->cs_next = cs->cs_next; - cs->cs_next = lastcs->cs_next; - lastcs->cs_next = cs; - } - } - - oth = (struct tcphdr *)&((long *)&cs->cs_ip)[hlen]; - deltaS = hlen; - hlen += getth_off(*th); - hlen <<= 2; - /* Check that the IP/TCP headers are contained in the first buffer. */ - if (hlen > pb->len) { - PPPDEBUG((LOG_INFO, "vj_compress_tcp: header len %d spans buffers\n", - hlen)); - return (TYPE_IP); - } - - /* - * Make sure that only what we expect to change changed. The first - * line of the `if' checks the IP protocol version, header length & - * type of service. The 2nd line checks the "Don't fragment" bit. - * The 3rd line checks the time-to-live and protocol (the protocol - * check is unnecessary but costless). The 4th line checks the TCP - * header length. The 5th line checks IP options, if any. The 6th - * line checks TCP options, if any. If any of these things are - * different between the previous & current datagram, we send the - * current datagram `uncompressed'. - */ - if (((u_short *)ip)[0] != ((u_short *)&cs->cs_ip)[0] - || ((u_short *)ip)[3] != ((u_short *)&cs->cs_ip)[3] - || ((u_short *)ip)[4] != ((u_short *)&cs->cs_ip)[4] - || getth_off(*th) != getth_off(*oth) - || (deltaS > 5 && BCMP(ip + 1, &cs->cs_ip + 1, (deltaS - 5) << 2)) - || (getth_off(*th) > 5 && BCMP(th + 1, oth + 1, (getth_off(*th) - 5) << 2))) - goto uncompressed; - - /* - * Figure out which of the changing fields changed. The - * receiver expects changes in the order: urgent, window, - * ack, seq (the order minimizes the number of temporaries - * needed in this section of code). - */ - if (th->th_flags & TCP_URG) { - deltaS = ntohs(th->th_urp); - ENCODEZ(deltaS); - changes |= NEW_U; - } else if (th->th_urp != oth->th_urp) - /* argh! URG not set but urp changed -- a sensible - * implementation should never do this but RFC793 - * doesn't prohibit the change so we have to deal - * with it. */ - goto uncompressed; - - if ((deltaS = (u_short)(ntohs(th->th_win) - ntohs(oth->th_win))) != 0) { - ENCODE(deltaS); - changes |= NEW_W; - } - - if ((deltaL = ntohl(th->th_ack) - ntohl(oth->th_ack)) != 0) { - if (deltaL > 0xffff) - goto uncompressed; - deltaA = (u_short)deltaL; - ENCODE(deltaA); - changes |= NEW_A; - } - - if ((deltaL = ntohl(th->th_seq) - ntohl(oth->th_seq)) != 0) { - if (deltaL > 0xffff) - goto uncompressed; - deltaS = (u_short)deltaL; - ENCODE(deltaS); - changes |= NEW_S; - } - - switch(changes) { - - case 0: - /* - * Nothing changed. If this packet contains data and the - * last one didn't, this is probably a data packet following - * an ack (normal on an interactive connection) and we send - * it compressed. Otherwise it's probably a retransmit, - * retransmitted ack or window probe. Send it uncompressed - * in case the other side missed the compressed version. - */ - if (ip->ip_len != cs->cs_ip.ip_len && - ntohs(cs->cs_ip.ip_len) == hlen) - break; - - /* (fall through) */ - - case SPECIAL_I: - case SPECIAL_D: - /* - * actual changes match one of our special case encodings -- - * send packet uncompressed. - */ - goto uncompressed; - - case NEW_S|NEW_A: - if (deltaS == deltaA && deltaS == ntohs(cs->cs_ip.ip_len) - hlen) { - /* special case for echoed terminal traffic */ - changes = SPECIAL_I; - cp = new_seq; - } - break; - - case NEW_S: - if (deltaS == ntohs(cs->cs_ip.ip_len) - hlen) { - /* special case for data xfer */ - changes = SPECIAL_D; - cp = new_seq; - } - break; - } - - deltaS = (u_short)(ntohs(ip->ip_id) - ntohs(cs->cs_ip.ip_id)); - if (deltaS != 1) { - ENCODEZ(deltaS); - changes |= NEW_I; - } - if (th->th_flags & TCP_PSH) - changes |= TCP_PUSH_BIT; - /* - * Grab the cksum before we overwrite it below. Then update our - * state with this packet's header. - */ - deltaA = ntohs(th->th_sum); - BCOPY(ip, &cs->cs_ip, hlen); - - /* - * We want to use the original packet as our compressed packet. - * (cp - new_seq) is the number of bytes we need for compressed - * sequence numbers. In addition we need one byte for the change - * mask, one for the connection id and two for the tcp checksum. - * So, (cp - new_seq) + 4 bytes of header are needed. hlen is how - * many bytes of the original packet to toss so subtract the two to - * get the new packet size. - */ - deltaS = (u_short)(cp - new_seq); - if (!comp->compressSlot || comp->last_xmit != cs->cs_id) { - comp->last_xmit = cs->cs_id; - hlen -= deltaS + 4; - pbuf_header(pb, -hlen); - cp = (u_char *)pb->payload; - *cp++ = changes | NEW_C; - *cp++ = cs->cs_id; - } else { - hlen -= deltaS + 3; - pbuf_header(pb, -hlen); - cp = (u_char *)pb->payload; - *cp++ = changes; - } - *cp++ = deltaA >> 8; - *cp++ = deltaA; - BCOPY(new_seq, cp, deltaS); - INCR(vjs_compressed); - return (TYPE_COMPRESSED_TCP); - - /* - * Update connection state cs & send uncompressed packet (that is, - * a regular ip/tcp packet but with the 'conversation id' we hope - * to use on future compressed packets in the protocol field). - */ -uncompressed: - BCOPY(ip, &cs->cs_ip, hlen); - ip->ip_p = cs->cs_id; - comp->last_xmit = cs->cs_id; - return (TYPE_UNCOMPRESSED_TCP); -} - -/* - * Called when we may have missed a packet. - */ -void vj_uncompress_err(struct vjcompress *comp) -{ - comp->flags |= VJF_TOSS; - INCR(vjs_errorin); -} - -/* - * "Uncompress" a packet of type TYPE_UNCOMPRESSED_TCP. - * Return 0 on success, -1 on failure. - */ -int vj_uncompress_uncomp( - struct pbuf *nb, - struct vjcompress *comp -) -{ - register u_int hlen; - register struct cstate *cs; - register struct ip *ip; - - ip = (struct ip *)nb->payload; - hlen = getip_hl(*ip) << 2; - if (ip->ip_p >= MAX_SLOTS - || hlen + sizeof(struct tcphdr) > nb->len - || (hlen += getth_off(*((struct tcphdr *)&((char *)ip)[hlen])) << 2) - > nb->len - || hlen > MAX_HDR) { - PPPDEBUG((LOG_INFO, "vj_uncompress_uncomp: bad cid=%d, hlen=%d buflen=%d\n", - ip->ip_p, hlen, nb->len)); - comp->flags |= VJF_TOSS; - INCR(vjs_errorin); - return -1; - } - cs = &comp->rstate[comp->last_recv = ip->ip_p]; - comp->flags &=~ VJF_TOSS; - ip->ip_p = IPPROTO_TCP; - BCOPY(ip, &cs->cs_ip, hlen); - cs->cs_hlen = hlen; - INCR(vjs_uncompressedin); - return 0; -} - -/* - * Uncompress a packet of type TYPE_COMPRESSED_TCP. - * The packet is composed of a buffer chain and the first buffer - * must contain an accurate chain length. - * The first buffer must include the entire compressed TCP/IP header. - * This procedure replaces the compressed header with the uncompressed - * header and returns the length of the VJ header. - */ -int vj_uncompress_tcp( - struct pbuf **nb, - struct vjcompress *comp -) -{ - u_char *cp; - struct tcphdr *th; - struct cstate *cs; - u_short *bp; - struct pbuf *n0 = *nb; - u32_t tmp; - u_int vjlen, hlen, changes; - - INCR(vjs_compressedin); - cp = (u_char *)n0->payload; - changes = *cp++; - if (changes & NEW_C) { - /* - * Make sure the state index is in range, then grab the state. - * If we have a good state index, clear the 'discard' flag. - */ - if (*cp >= MAX_SLOTS) { - PPPDEBUG((LOG_INFO, "vj_uncompress_tcp: bad cid=%d\n", *cp)); - goto bad; - } - - comp->flags &=~ VJF_TOSS; - comp->last_recv = *cp++; - } else { - /* - * this packet has an implicit state index. If we've - * had a line error since the last time we got an - * explicit state index, we have to toss the packet. - */ - if (comp->flags & VJF_TOSS) { - PPPDEBUG((LOG_INFO, "vj_uncompress_tcp: tossing\n")); - INCR(vjs_tossed); - return (-1); - } - } - cs = &comp->rstate[comp->last_recv]; - hlen = getip_hl(cs->cs_ip) << 2; - th = (struct tcphdr *)&((u_char *)&cs->cs_ip)[hlen]; - th->th_sum = htons((*cp << 8) | cp[1]); - cp += 2; - if (changes & TCP_PUSH_BIT) - th->th_flags |= TCP_PSH; - else - th->th_flags &=~ TCP_PSH; - - switch (changes & SPECIALS_MASK) { - case SPECIAL_I: - { - register u32_t i = ntohs(cs->cs_ip.ip_len) - cs->cs_hlen; - /* some compilers can't nest inline assembler.. */ - tmp = ntohl(th->th_ack) + i; - th->th_ack = htonl(tmp); - tmp = ntohl(th->th_seq) + i; - th->th_seq = htonl(tmp); - } - break; - - case SPECIAL_D: - /* some compilers can't nest inline assembler.. */ - tmp = ntohl(th->th_seq) + ntohs(cs->cs_ip.ip_len) - cs->cs_hlen; - th->th_seq = htonl(tmp); - break; - - default: - if (changes & NEW_U) { - th->th_flags |= TCP_URG; - DECODEU(th->th_urp); - } else - th->th_flags &=~ TCP_URG; - if (changes & NEW_W) - DECODES(th->th_win); - if (changes & NEW_A) - DECODEL(th->th_ack); - if (changes & NEW_S) - DECODEL(th->th_seq); - break; - } - if (changes & NEW_I) { - DECODES(cs->cs_ip.ip_id); - } else { - cs->cs_ip.ip_id = ntohs(cs->cs_ip.ip_id) + 1; - cs->cs_ip.ip_id = htons(cs->cs_ip.ip_id); - } - - /* - * At this point, cp points to the first byte of data in the - * packet. Fill in the IP total length and update the IP - * header checksum. - */ - vjlen = (u_short)(cp - (u_char*)n0->payload); - if (n0->len < vjlen) { - /* - * We must have dropped some characters (crc should detect - * this but the old slip framing won't) - */ - PPPDEBUG((LOG_INFO, "vj_uncompress_tcp: head buffer %d too short %d\n", - n0->len, vjlen)); - goto bad; - } - -#if BYTE_ORDER == LITTLE_ENDIAN - tmp = n0->tot_len - vjlen + cs->cs_hlen; - cs->cs_ip.ip_len = htons(tmp); -#else - cs->cs_ip.ip_len = htons(n0->tot_len - vjlen + cs->cs_hlen); -#endif - - /* recompute the ip header checksum */ - bp = (u_short *) &cs->cs_ip; - cs->cs_ip.ip_sum = 0; - for (tmp = 0; hlen > 0; hlen -= 2) - tmp += *bp++; - tmp = (tmp & 0xffff) + (tmp >> 16); - tmp = (tmp & 0xffff) + (tmp >> 16); - cs->cs_ip.ip_sum = (u_short)(~tmp); - - /* Remove the compressed header and prepend the uncompressed header. */ - pbuf_header(n0, -vjlen); - - if(MEM_ALIGN(n0->payload) != n0->payload) { - struct pbuf *np, *q; - u8_t *bufptr; - - np = pbuf_alloc(PBUF_RAW, n0->len + cs->cs_hlen, PBUF_POOL); - if(!np) { - PPPDEBUG((LOG_WARNING, "vj_uncompress_tcp: realign failed\n")); - *nb = NULL; - goto bad; - } - - pbuf_header(np, -cs->cs_hlen); - - bufptr = n0->payload; - for(q = np; q != NULL; q = q->next) { - memcpy(q->payload, bufptr, q->len); - bufptr += q->len; - } - - if(n0->next) { - pbuf_chain(np, n0->next); - pbuf_dechain(n0); - } - pbuf_free(n0); - n0 = np; - } - - if(pbuf_header(n0, cs->cs_hlen)) { - struct pbuf *np; - - LWIP_ASSERT("vj_uncompress_tcp: cs->cs_hlen <= PBUF_POOL_BUFSIZE", cs->cs_hlen <= PBUF_POOL_BUFSIZE); - np = pbuf_alloc(PBUF_RAW, cs->cs_hlen, PBUF_POOL); - if(!np) { - PPPDEBUG((LOG_WARNING, "vj_uncompress_tcp: prepend failed\n")); - *nb = NULL; - goto bad; - } - pbuf_cat(np, n0); - n0 = np; - } - LWIP_ASSERT("n0->len >= cs->cs_hlen", n0->len >= cs->cs_hlen); - memcpy(n0->payload, &cs->cs_ip, cs->cs_hlen); - - *nb = n0; - - return vjlen; - -bad: - comp->flags |= VJF_TOSS; - INCR(vjs_errorin); - return (-1); -} - -#endif - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/vj.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/vj.h deleted file mode 100644 index 252d0f5a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/vj.h +++ /dev/null @@ -1,155 +0,0 @@ -/* - * Definitions for tcp compression routines. - * - * $Id$ - * - * Copyright (c) 1989 Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms are permitted - * provided that the above copyright notice and this paragraph are - * duplicated in all such forms and that any documentation, - * advertising materials, and other materials related to such - * distribution and use acknowledge that the software was developed - * by the University of California, Berkeley. The name of the - * University may not be used to endorse or promote products derived - * from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * - * Van Jacobson (van@helios.ee.lbl.gov), Dec 31, 1989: - * - Initial distribution. - */ - -#ifndef VJ_H -#define VJ_H - -#include "vjbsdhdr.h" - -#define MAX_SLOTS 16 /* must be > 2 and < 256 */ -#define MAX_HDR 128 - -/* - * Compressed packet format: - * - * The first octet contains the packet type (top 3 bits), TCP - * 'push' bit, and flags that indicate which of the 4 TCP sequence - * numbers have changed (bottom 5 bits). The next octet is a - * conversation number that associates a saved IP/TCP header with - * the compressed packet. The next two octets are the TCP checksum - * from the original datagram. The next 0 to 15 octets are - * sequence number changes, one change per bit set in the header - * (there may be no changes and there are two special cases where - * the receiver implicitly knows what changed -- see below). - * - * There are 5 numbers which can change (they are always inserted - * in the following order): TCP urgent pointer, window, - * acknowlegement, sequence number and IP ID. (The urgent pointer - * is different from the others in that its value is sent, not the - * change in value.) Since typical use of SLIP links is biased - * toward small packets (see comments on MTU/MSS below), changes - * use a variable length coding with one octet for numbers in the - * range 1 - 255 and 3 octets (0, MSB, LSB) for numbers in the - * range 256 - 65535 or 0. (If the change in sequence number or - * ack is more than 65535, an uncompressed packet is sent.) - */ - -/* - * Packet types (must not conflict with IP protocol version) - * - * The top nibble of the first octet is the packet type. There are - * three possible types: IP (not proto TCP or tcp with one of the - * control flags set); uncompressed TCP (a normal IP/TCP packet but - * with the 8-bit protocol field replaced by an 8-bit connection id -- - * this type of packet syncs the sender & receiver); and compressed - * TCP (described above). - * - * LSB of 4-bit field is TCP "PUSH" bit (a worthless anachronism) and - * is logically part of the 4-bit "changes" field that follows. Top - * three bits are actual packet type. For backward compatibility - * and in the interest of conserving bits, numbers are chosen so the - * IP protocol version number (4) which normally appears in this nibble - * means "IP packet". - */ - -/* packet types */ -#define TYPE_IP 0x40 -#define TYPE_UNCOMPRESSED_TCP 0x70 -#define TYPE_COMPRESSED_TCP 0x80 -#define TYPE_ERROR 0x00 - -/* Bits in first octet of compressed packet */ -#define NEW_C 0x40 /* flag bits for what changed in a packet */ -#define NEW_I 0x20 -#define NEW_S 0x08 -#define NEW_A 0x04 -#define NEW_W 0x02 -#define NEW_U 0x01 - -/* reserved, special-case values of above */ -#define SPECIAL_I (NEW_S|NEW_W|NEW_U) /* echoed interactive traffic */ -#define SPECIAL_D (NEW_S|NEW_A|NEW_W|NEW_U) /* unidirectional data */ -#define SPECIALS_MASK (NEW_S|NEW_A|NEW_W|NEW_U) - -#define TCP_PUSH_BIT 0x10 - - -/* - * "state" data for each active tcp conversation on the wire. This is - * basically a copy of the entire IP/TCP header from the last packet - * we saw from the conversation together with a small identifier - * the transmit & receive ends of the line use to locate saved header. - */ -struct cstate { - struct cstate *cs_next; /* next most recently used state (xmit only) */ - u_short cs_hlen; /* size of hdr (receive only) */ - u_char cs_id; /* connection # associated with this state */ - u_char cs_filler; - union { - char csu_hdr[MAX_HDR]; - struct ip csu_ip; /* ip/tcp hdr from most recent packet */ - } vjcs_u; -}; -#define cs_ip vjcs_u.csu_ip -#define cs_hdr vjcs_u.csu_hdr - - -struct vjstat { - unsigned long vjs_packets; /* outbound packets */ - unsigned long vjs_compressed; /* outbound compressed packets */ - unsigned long vjs_searches; /* searches for connection state */ - unsigned long vjs_misses; /* times couldn't find conn. state */ - unsigned long vjs_uncompressedin; /* inbound uncompressed packets */ - unsigned long vjs_compressedin; /* inbound compressed packets */ - unsigned long vjs_errorin; /* inbound unknown type packets */ - unsigned long vjs_tossed; /* inbound packets tossed because of error */ -}; - -/* - * all the state data for one serial line (we need one of these per line). - */ -struct vjcompress { - struct cstate *last_cs; /* most recently used tstate */ - u_char last_recv; /* last rcvd conn. id */ - u_char last_xmit; /* last sent conn. id */ - u_short flags; - u_char maxSlotIndex; - u_char compressSlot; /* Flag indicating OK to compress slot ID. */ -#if LINK_STATS - struct vjstat stats; -#endif - struct cstate tstate[MAX_SLOTS]; /* xmit connection states */ - struct cstate rstate[MAX_SLOTS]; /* receive connection states */ -}; - -/* flag values */ -#define VJF_TOSS 1U /* tossing rcvd frames because of input err */ - -extern void vj_compress_init (struct vjcompress *comp); -extern u_int vj_compress_tcp (struct vjcompress *comp, struct pbuf *pb); -extern void vj_uncompress_err (struct vjcompress *comp); -extern int vj_uncompress_uncomp(struct pbuf *nb, struct vjcompress *comp); -extern int vj_uncompress_tcp(struct pbuf **nb, struct vjcompress *comp); - -#endif /* VJ_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/vjbsdhdr.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/vjbsdhdr.h deleted file mode 100644 index a089352a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/ppp/vjbsdhdr.h +++ /dev/null @@ -1,76 +0,0 @@ -#ifndef VJBSDHDR_H -#define VJBSDHDR_H - -#include "lwip/tcp.h" - - -/* - * Structure of an internet header, naked of options. - * - * We declare ip_len and ip_off to be short, rather than u_short - * pragmatically since otherwise unsigned comparisons can result - * against negative integers quite easily, and fail in subtle ways. - */ -PACK_STRUCT_BEGIN -struct ip -{ -#if defined(NO_CHAR_BITFIELDS) - u_char ip_hl_v; /* bug in GCC for mips means the bitfield stuff will sometimes break - so we use a char for both and get round it with macro's instead... */ -#else -#if BYTE_ORDER == LITTLE_ENDIAN - unsigned ip_hl:4, /* header length */ - ip_v:4; /* version */ -#elif BYTE_ORDER == BIG_ENDIAN - unsigned ip_v:4, /* version */ - ip_hl:4; /* header length */ -#else - COMPLAIN - NO BYTE ORDER SELECTED! -#endif -#endif - u_char ip_tos; /* type of service */ - u_short ip_len; /* total length */ - u_short ip_id; /* identification */ - u_short ip_off; /* fragment offset field */ -#define IP_DF 0x4000 /* dont fragment flag */ -#define IP_MF 0x2000 /* more fragments flag */ -#define IP_OFFMASK 0x1fff /* mask for fragmenting bits */ - u_char ip_ttl; /* time to live */ - u_char ip_p; /* protocol */ - u_short ip_sum; /* checksum */ - struct in_addr ip_src,ip_dst; /* source and dest address */ -}; -PACK_STRUCT_END - -typedef u32_t tcp_seq; - -/* - * TCP header. - * Per RFC 793, September, 1981. - */ -PACK_STRUCT_BEGIN -struct tcphdr -{ - u_short th_sport; /* source port */ - u_short th_dport; /* destination port */ - tcp_seq th_seq; /* sequence number */ - tcp_seq th_ack; /* acknowledgement number */ -#if defined(NO_CHAR_BITFIELDS) - u_char th_x2_off; -#else -#if BYTE_ORDER == LITTLE_ENDIAN - unsigned th_x2:4, /* (unused) */ - th_off:4; /* data offset */ -#endif -#if BYTE_ORDER == BIG_ENDIAN - unsigned th_off:4, /* data offset */ - th_x2:4; /* (unused) */ -#endif -#endif - u_char th_flags; - u_short th_win; /* window */ - u_short th_sum; /* checksum */ - u_short th_urp; /* urgent pointer */ -}; -PACK_STRUCT_END - -#endif /* VJBSDHDR_H */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/slipif.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/slipif.c deleted file mode 100644 index dd8db208..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwip/src/netif/slipif.c +++ /dev/null @@ -1,213 +0,0 @@ -/* - * Copyright (c) 2001-2004 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is built upon the file: src/arch/rtxc/netif/sioslip.c - * - * Author: Magnus Ivarsson - */ - -/* - * This is an arch independent SLIP netif. The specific serial hooks must be - * provided by another file. They are sio_open, sio_recv and sio_send - */ - -#include "netif/slipif.h" -#include "lwip/opt.h" -#include "lwip/def.h" -#include "lwip/pbuf.h" -#include "lwip/sys.h" -#include "lwip/stats.h" -#include "lwip/sio.h" - -#define SLIP_END 0300 -#define SLIP_ESC 0333 -#define SLIP_ESC_END 0334 -#define SLIP_ESC_ESC 0335 - -#define MAX_SIZE 1500 - -/** - * Send a pbuf doing the necessary SLIP encapsulation - * - * Uses the serial layer's sio_send() - */ -err_t -slipif_output(struct netif *netif, struct pbuf *p, struct ip_addr *ipaddr) -{ - struct pbuf *q; - u16_t i; - u8_t c; - - /* Send pbuf out on the serial I/O device. */ - sio_send(SLIP_END, netif->state); - - for (q = p; q != NULL; q = q->next) { - for (i = 0; i < q->len; i++) { - c = ((u8_t *)q->payload)[i]; - switch (c) { - case SLIP_END: - sio_send(SLIP_ESC, netif->state); - sio_send(SLIP_ESC_END, netif->state); - break; - case SLIP_ESC: - sio_send(SLIP_ESC, netif->state); - sio_send(SLIP_ESC_ESC, netif->state); - break; - default: - sio_send(c, netif->state); - break; - } - } - } - sio_send(SLIP_END, netif->state); - return 0; -} - -/** - * Handle the incoming SLIP stream character by character - * - * Poll the serial layer by calling sio_recv() - * - * @return The IP packet when SLIP_END is received - */ -static struct pbuf * -slipif_input(struct netif *netif) -{ - u8_t c; - struct pbuf *p, *q; - u16_t recved; - u16_t i; - - q = p = NULL; - recved = i = 0; - c = 0; - - while (1) { - c = sio_recv(netif->state); - switch (c) { - case SLIP_END: - if (recved > 0) { - /* Received whole packet. */ - pbuf_realloc(q, recved); - - LINK_STATS_INC(link.recv); - - LWIP_DEBUGF(SLIP_DEBUG, ("slipif: Got packet\n")); - return q; - } - break; - - case SLIP_ESC: - c = sio_recv(netif->state); - switch (c) { - case SLIP_ESC_END: - c = SLIP_END; - break; - case SLIP_ESC_ESC: - c = SLIP_ESC; - break; - } - /* FALLTHROUGH */ - - default: - if (p == NULL) { - LWIP_DEBUGF(SLIP_DEBUG, ("slipif_input: alloc\n")); - p = pbuf_alloc(PBUF_LINK, PBUF_POOL_BUFSIZE, PBUF_POOL); - - if (p == NULL) { - LINK_STATS_INC(link.drop); - LWIP_DEBUGF(SLIP_DEBUG, ("slipif_input: no new pbuf! (DROP)\n")); - } - - if (q != NULL) { - pbuf_cat(q, p); - } else { - q = p; - } - } - if (p != NULL && recved < MAX_SIZE) { - ((u8_t *)p->payload)[i] = c; - recved++; - i++; - if (i >= p->len) { - i = 0; - if (p->next != NULL && p->next->len > 0) - p = p->next; - else - p = NULL; - } - } - break; - } - - } - return NULL; -} - -/** - * The SLIP input thread. - * - * Feed the IP layer with incoming packets - */ -static void -slipif_loop(void *nf) -{ - struct pbuf *p; - struct netif *netif = (struct netif *)nf; - - while (1) { - p = slipif_input(netif); - netif->input(p, netif); - } -} - -/** - * SLIP netif initialization - * - * Call the arch specific sio_open and remember - * the opened device in the state field of the netif. - */ -err_t -slipif_init(struct netif *netif) -{ - - LWIP_DEBUGF(SLIP_DEBUG, ("slipif_init: netif->num=%"U16_F"\n", (u16_t)netif->num)); - - netif->name[0] = 's'; - netif->name[1] = 'l'; - netif->output = slipif_output; - netif->mtu = 1500; - netif->flags = NETIF_FLAG_POINTTOPOINT; - - netif->state = sio_open(netif->num); - if (!netif->state) - return ERR_IF; - - sys_thread_new(slipif_loop, netif, SLIPIF_THREAD_PRIO); - return ERR_OK; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwipopts.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwipopts.h deleted file mode 100644 index 4651d613..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/lwipopts.h +++ /dev/null @@ -1,180 +0,0 @@ -/* - * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - * - * This file is part of the lwIP TCP/IP stack. - * - * Author: Adam Dunkels - * Modifications: Christian Walter - */ -#ifndef __LWIPOPTS_H__ -#define __LWIPOPTS_H__ - -/* ------------------------ Generic options ------------------------------- */ -#undef LWIP_NOASSERT - -#define SYS_LIGHTWEIGHT_PROT 1 -#define TCPIP_THREAD_PRIO 3 -#define LWIP_PROVIDE_ERRNO 0 -#define LWIP_DEBUG 0 -#define DBG_TYPES_ON ( DBG_LEVEL_WARNING | DBG_LEVEL_SEVERE | DBG_LEVEL_SERIOUS ) - -/* ------------------------ Memory options -------------------------------- */ -/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which - lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2 - byte alignment -> define MEM_ALIGNMENT to 2. */ -#define MEM_ALIGNMENT 4 - -/* MEM_SIZE: the size of the heap memory. If the application will send -a lot of data that needs to be copied, this should be set high. */ -#define MEM_SIZE 2048 - -/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application - sends a lot of data out of ROM (or other static memory), this - should be set high. */ -#define MEMP_NUM_PBUF 16 -/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One - per active UDP "connection". */ -#define MEMP_NUM_UDP_PCB 4 -/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP - connections. */ -#define MEMP_NUM_TCP_PCB 4 -/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP - connections. */ -#define MEMP_NUM_TCP_PCB_LISTEN 8 -/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP - segments. */ -#define MEMP_NUM_TCP_SEG 16 -/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active - timeouts. */ -#define MEMP_NUM_SYS_TIMEOUT 4 - -/* The following four are used only with the sequential API and can be - set to 0 if the application only will use the raw API. */ -/* MEMP_NUM_NETBUF: the number of struct netbufs. */ -#define MEMP_NUM_NETBUF 0 -/* MEMP_NUM_NETCONN: the number of struct netconns. */ -#define MEMP_NUM_NETCONN 0 -/* MEMP_NUM_APIMSG: the number of struct api_msg, used for - communication between the TCP/IP stack and the sequential - programs. */ -#define MEMP_NUM_API_MSG 0 -/* MEMP_NUM_TCPIPMSG: the number of struct tcpip_msg, which is used - for sequential API communication and incoming packets. Used in - src/api/tcpip.c. */ -#define MEMP_NUM_TCPIP_MSG 4 - -/* ---------- Pbuf options ---------- */ -/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */ -#define PBUF_POOL_SIZE 8 - -/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */ -#define PBUF_POOL_BUFSIZE 256 - -/* PBUF_LINK_HLEN: the number of bytes that should be allocated for a - link level header. */ -#define PBUF_LINK_HLEN 14 - -/* ------------------------ TCP options ----------------------------------- */ -#define LWIP_TCP 1 -#define TCP_TTL 255 - -/* Controls if TCP should queue segments that arrive out of - order. Define to 0 if your device is low on memory. */ -#define TCP_QUEUE_OOSEQ 1 - -/* TCP Maximum segment size. */ -#define TCP_MSS 512 - -/* TCP sender buffer space (bytes). */ -#define TCP_SND_BUF 512 - -/* TCP sender buffer space (pbufs). This must be at least = 2 * - TCP_SND_BUF/TCP_MSS for things to work. */ -#define TCP_SND_QUEUELEN ( 2 * TCP_SND_BUF/TCP_MSS ) - -/* TCP receive window. */ -#define TCP_WND 512 - -/* Maximum number of retransmissions of data segments. */ -#define TCP_MAXRTX 12 - -/* Maximum number of retransmissions of SYN segments. */ -#define TCP_SYNMAXRTX 4 - -/* ------------------------ ARP options ----------------------------------- */ -#define ARP_TABLE_SIZE 10 -#define ARP_QUEUEING 1 - -/* ------------------------ IP options ------------------------------------ */ -/* Define IP_FORWARD to 1 if you wish to have the ability to forward - IP packets across network interfaces. If you are going to run lwIP - on a device with only one network interface, define this to 0. */ -#define IP_FORWARD 0 - -/* If defined to 1, IP options are allowed (but not parsed). If - defined to 0, all packets with IP options are dropped. */ -#define IP_OPTIONS 1 - -/* ------------------------ ICMP options ---------------------------------- */ -#define ICMP_TTL 255 - - -/* ------------------------ DHCP options ---------------------------------- */ -/* Define LWIP_DHCP to 1 if you want DHCP configuration of - interfaces. DHCP is not implemented in lwIP 0.5.1, however, so - turning this on does currently not work. */ -#define LWIP_DHCP 0 - -/* 1 if you want to do an ARP check on the offered address - (recommended). */ -#define DHCP_DOES_ARP_CHECK 1 - -/* ------------------------ UDP options ----------------------------------- */ -#define LWIP_UDP 0 -#define UDP_TTL 255 - -/* ------------------------ Statistics options ---------------------------- */ -#define STATS -#undef STATS - -#ifdef STATS -#define LINK_STATS 1 -#define IP_STATS 1 -#define ICMP_STATS 1 -#define UDP_STATS 1 -#define TCP_STATS 1 -#define MEM_STATS 1 -#define MEMP_STATS 1 -#define PBUF_STATS 1 -#define SYS_STATS 1 -#endif - -/* ------------------------ PPP options ----------------------------------- */ - -#define PPP_SUPPORT 1 -#define PAP_SUPPORT 1 -#define PPP_DEBUG 0 -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/mbconfig.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/mbconfig.h deleted file mode 100644 index 490edda8..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/mbconfig.h +++ /dev/null @@ -1,92 +0,0 @@ - /* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _MB_CONFIG_H -#define _MB_CONFIG_H - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif -/* ----------------------- Defines ------------------------------------------*/ -/*! \defgroup modbus_cfg Modbus Configuration - * - * Most modules in the protocol stack are completly optional and can be - * excluded. This is specially important if target resources are very small - * and program memory space should be saved.
- * - * All of these settings are available in the file mbconfig.h - */ -/*! \addtogroup modbus_cfg - * @{ - */ -/*! \brief If Modbus ASCII support is enabled. */ -#define MB_ASCII_ENABLED ( 0 ) -/*! \brief If Modbus RTU support is enabled. */ -#define MB_RTU_ENABLED ( 0 ) -/*! \brief If Modbus TCP support is enabled. */ -#define MB_TCP_ENABLED ( 1 ) -/*! \brief The character timeout value for Modbus ASCII. - * - * The character timeout value is not fixed for Modbus ASCII and is therefore - * a configuration option. It should be set to the maximum expected delay - * time of the network. - */ -#define MB_ASCII_TIMEOUT_SEC ( 1 ) -/*! \brief Maximum number of Modbus functions codes the protocol stack - * should support. - * - * The maximum number of supported Modbus functions must be greater than - * the sum of all enabled functions in this file and custom function - * handlers. If set to small adding more functions will fail. - */ -#define MB_FUNC_HANDLERS_MAX ( 16 ) -/*! \brief Number of bytes which should be allocated for the Report Slave ID - * command. - * - * This number limits the maximum size of the additional segment in the - * report slave id function. See eMBSetSlaveID( ) for more information on - * how to set this value. It is only used if MB_FUNC_OTHER_REP_SLAVEID_ENABLED - * is set to 1. - */ -#define MB_FUNC_OTHER_REP_SLAVEID_BUF ( 32 ) -/*! \brief If the Report Slave ID function should be enabled. */ -#define MB_FUNC_OTHER_REP_SLAVEID_ENABLED ( 1 ) -/*! \brief If the Read Input Registers function should be enabled. */ -#define MB_FUNC_READ_INPUT_ENABLED ( 1 ) -/*! \brief If the Read Holding Registers function should be enabled. */ -#define MB_FUNC_READ_HOLDING_ENABLED ( 1 ) -/*! \brief If the Write Single Register function should be enabled. */ -#define MB_FUNC_WRITE_HOLDING_ENABLED ( 1 ) -/*! \brief If the Write Multiple registers function should be enabled. */ -#define MB_FUNC_WRITE_MULTIPLE_HOLDING_ENABLED ( 1 ) -/*! \brief If the Read Coils function should be enabled. */ -#define MB_FUNC_READ_COILS_ENABLED ( 1 ) -/*! \brief If the Write Coils function should be enabled. */ -#define MB_FUNC_WRITE_COIL_ENABLED ( 1 ) -/*! \brief If the Write Multiple Coils function should be enabled. */ -#define MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED ( 1 ) -/*! \brief If the Read Discrete Inputs function should be enabled. */ -#define MB_FUNC_READ_DISCRETE_INPUTS_ENABLED ( 1 ) -/*! @} */ -#ifdef __cplusplus - PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/port.h deleted file mode 100644 index fcb2d13f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/port.h +++ /dev/null @@ -1,84 +0,0 @@ - /* - * FreeModbus Libary: MCF5235 Port - * Copyright (C) 2006 Christian Walter - * Parts of crt0.S Copyright (c) 1995, 1996, 1998 Cygnus Support - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -/* ----------------------- Platform includes --------------------------------*/ -#include "71x_type.h" -#include "lwip/opt.h" -#include "lwip/sys.h" - -/* ----------------------- Defines ------------------------------------------*/ -#undef INLINE -#define INLINE inline - -#define assert( x ) LWIP_ASSERT( #x, x ); - -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } -/* -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif*/ - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif -#define MB_TCP_DEBUG 1 /* Debug output in TCP module. */ -/* ----------------------- Type definitions ---------------------------------*/ -typedef char BOOL; - -typedef unsigned char UCHAR; -typedef char CHAR; - -typedef unsigned short USHORT; -typedef short SHORT; - -typedef unsigned long ULONG; -typedef long LONG; - -#ifdef MB_TCP_DEBUG -typedef enum -{ - MB_LOG_DEBUG, - MB_LOG_INFO, - MB_LOG_WARN, - MB_LOG_ERROR -} eMBPortLogLevel; -#endif - -/* ----------------------- Function prototypes ------------------------------*/ -#ifdef MB_TCP_DEBUG -void vMBPortLog( eMBPortLogLevel eLevel, const CHAR * szModule, - const CHAR * szFmt, ... ); -void prvvMBTCPLogFrame( UCHAR * pucMsg, UCHAR * pucFrame, USHORT usFrameLen ); -#endif - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/portevent.c deleted file mode 100644 index b90cad74..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/portevent.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * FreeModbus Libary: lwIP Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- lwIP ---------------------------------------------*/ -#include "lwip/api.h" -#include "lwip/sys.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_POLL_CYCLETIME 100 /* Poll cycle time is 100ms */ -/* ----------------------- Static variables ---------------------------------*/ -static sys_mbox_t xMailBox = SYS_MBOX_NULL; -static eMBEventType eMailBoxEvent; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - eMailBoxEvent = EV_READY; - xMailBox = sys_mbox_new( ); - return xMailBox != SYS_MBOX_NULL ? TRUE : FALSE; -} - -void -vMBPortEventClose( void ) -{ - if( xMailBox != SYS_MBOX_NULL ) - { - sys_mbox_free( xMailBox ); - } -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - eMailBoxEvent = eEvent; - sys_mbox_post( xMailBox, &eMailBoxEvent ); - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - void *peMailBoxEvent; - BOOL xEventHappend = FALSE; - u32_t uiTimeSpent; - - uiTimeSpent = sys_arch_mbox_fetch( xMailBox, &peMailBoxEvent, MB_POLL_CYCLETIME ); - if( uiTimeSpent != SYS_ARCH_TIMEOUT ) - { - *eEvent = *( eMBEventType * ) peMailBoxEvent; - eMailBoxEvent = EV_READY; - xEventHappend = TRUE; - } - return xEventHappend; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/portother.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/portother.c deleted file mode 100644 index 3b099d87..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/portother.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * FreeModbus Libary: lwIP Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include -#include -#include - -#include "port.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_FRAME_LOG_BUFSIZE 512 - -/* ----------------------- Start implementation -----------------------------*/ - -#ifdef MB_TCP_DEBUG -void -prvvMBTCPLogFrame( UCHAR * pucMsg, UCHAR * pucFrame, USHORT usFrameLen ) -{ - int i; - int res = 0; - int iBufPos = 0; - size_t iBufLeft = MB_FRAME_LOG_BUFSIZE; - static CHAR arcBuffer[MB_FRAME_LOG_BUFSIZE]; - - assert( pucFrame != NULL ); - - for( i = 0; i < usFrameLen; i++ ) - { - /* Print some additional frame information. */ - switch ( i ) - { - case 0: - /* TID = Transaction Identifier. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, "| TID = " ); - break; - case 2: - /* PID = Protocol Identifier. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, " | PID = " ); - break; - case 4: - /* Length */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, " | LEN = " ); - break; - case 6: - /* UID = Unit Identifier. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, " | UID = " ); - break; - case 7: - /* MB Function Code. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, "|| FUNC = " ); - break; - case 8: - /* MB PDU rest. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, " | DATA = " ); - break; - default: - res = 0; - break; - } - if( res == -1 ) - { - break; - } - else - { - iBufPos += res; - iBufLeft -= res; - } - - /* Print the data. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, "%02X", pucFrame[i] ); - if( res == -1 ) - { - break; - } - else - { - iBufPos += res; - iBufLeft -= res; - } - } - - if( res != -1 ) - { - /* Append an end of frame string. */ - res = snprintf( &arcBuffer[iBufPos], iBufLeft, " |\r\n" ); - if( res != -1 ) - { - vMBPortLog( MB_LOG_DEBUG, pucMsg, "%s", arcBuffer ); - } - } -} -#endif - -void -vMBPortLog( eMBPortLogLevel eLevel, const CHAR * szModule, const CHAR * szFmt, ... ) -{ - va_list args; - static const char *arszLevel2Str[] = { "DEBUG", "INFO", "WARN", "ERROR" }; - - ( void )printf( "%s: %s: ", arszLevel2Str[eLevel], szModule ); - va_start( args, szFmt ); - vprintf( szFmt, args ); - va_end( args ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/porttcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/porttcp.c deleted file mode 100644 index 00da7817..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/port/porttcp.c +++ /dev/null @@ -1,330 +0,0 @@ -/* - * FreeModbus Libary: lwIP Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- System includes ----------------------------------*/ -#include - -#include "port.h" - -/* ----------------------- lwIP includes ------------------------------------*/ -#include "lwip/api.h" -#include "lwip/tcp.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- MBAP Header --------------------------------------*/ -#define MB_TCP_UID 6 -#define MB_TCP_LEN 4 -#define MB_TCP_FUNC 7 - -/* ----------------------- Defines -----------------------------------------*/ -#define MB_TCP_DEFAULT_PORT 502 /* TCP listening port. */ -#define MB_TCP_BUF_SIZE ( 256 + 7 ) /* Must hold a complete Modbus TCP frame. */ - -/* ----------------------- Prototypes ---------------------------------------*/ -void vMBPortEventClose( void ); -void vMBPortLog( eMBPortLogLevel eLevel, const CHAR * szModule, - const CHAR * szFmt, ... ); - -/* ----------------------- Static variables ---------------------------------*/ -static struct tcp_pcb *pxPCBListen; -static struct tcp_pcb *pxPCBClient; - -static UCHAR aucTCPBuf[MB_TCP_BUF_SIZE]; -static USHORT usTCPBufPos; - -/* ----------------------- Static functions ---------------------------------*/ -static err_t prvxMBTCPPortAccept( void *pvArg, struct tcp_pcb *pxPCB, err_t xErr ); -static err_t prvxMBTCPPortReceive( void *pvArg, struct tcp_pcb *pxPCB, struct pbuf *p, - err_t xErr ); -static void prvvMBTCPPortError( void *pvArg, err_t xErr ); - -/* ----------------------- Begin implementation -----------------------------*/ -BOOL -xMBTCPPortInit( USHORT usTCPPort ) -{ - struct tcp_pcb *pxPCBListenNew, *pxPCBListenOld; - BOOL bOkay = FALSE; - USHORT usPort; - - if( usTCPPort == 0 ) - { - usPort = MB_TCP_DEFAULT_PORT; - } - else - { - usPort = ( USHORT ) usTCPPort; - } - - if( ( pxPCBListenNew = pxPCBListenOld = tcp_new( ) ) == NULL ) - { - /* Can't create TCP socket. */ - bOkay = FALSE; - } - else if( tcp_bind( pxPCBListenNew, IP_ADDR_ANY, ( u16_t ) usPort ) != ERR_OK ) - { - /* Bind failed - Maybe illegal port value or in use. */ - ( void )tcp_close( pxPCBListenOld ); - bOkay = FALSE; - } - else if( ( pxPCBListenNew = tcp_listen( pxPCBListenNew ) ) == NULL ) - { - ( void )tcp_close( pxPCBListenOld ); - bOkay = FALSE; - } - else - { - /* Register callback function for new clients. */ - tcp_accept( pxPCBListenNew, prvxMBTCPPortAccept ); - - /* Everything okay. Set global variable. */ - pxPCBListen = pxPCBListenNew; - -#ifdef MB_TCP_DEBUG - vMBPortLog( MB_LOG_DEBUG, "MBTCP-ACCEPT", "Protocol stack ready.\r\n" ); -#endif - } - bOkay = TRUE; - return bOkay; -} - -void -prvvMBPortReleaseClient( struct tcp_pcb *pxPCB ) -{ - if( pxPCB != NULL ) - { - if( tcp_close( pxPCB ) != ERR_OK ) - { - tcp_abort( pxPCB ); - } - vPortEnterCritical( ); - if( pxPCB == pxPCBClient ) - { -#ifdef MB_TCP_DEBUG - vMBPortLog( MB_LOG_DEBUG, "MBTCP-CLOSE", "Closed connection to %d.%d.%d.%d.\r\n", - ip4_addr1( &( pxPCB->remote_ip ) ), - ip4_addr2( &( pxPCB->remote_ip ) ), - ip4_addr3( &( pxPCB->remote_ip ) ), ip4_addr4( &( pxPCB->remote_ip ) ) ); -#endif - pxPCBClient = NULL; - } - if( pxPCB == pxPCBListen ) - { - pxPCBListen = NULL; - } - vPortExitCritical( ); - } -} -void -vMBTCPPortClose( ) -{ - /* Shutdown any open client sockets. */ - prvvMBPortReleaseClient( pxPCBClient ); - - /* Shutdown or listening socket. */ - prvvMBPortReleaseClient( pxPCBListen ); - - /* Release resources for the event queue. */ - vMBPortEventClose( ); -} - -void -vMBTCPPortDisable( void ) -{ - prvvMBPortReleaseClient( pxPCBClient ); -} - -err_t -prvxMBTCPPortAccept( void *pvArg, struct tcp_pcb *pxPCB, err_t xErr ) -{ - err_t error; - - if( xErr != ERR_OK ) - { - return xErr; - } - - /* We can handle only one client. */ - if( pxPCBClient == NULL ) - { - /* Register the client. */ - pxPCBClient = pxPCB; - - /* Set up the receive function prvxMBTCPPortReceive( ) to be called when data - * arrives. - */ - tcp_recv( pxPCB, prvxMBTCPPortReceive ); - - /* Register error handler. */ - tcp_err( pxPCB, prvvMBTCPPortError ); - - /* Set callback argument later used in the error handler. */ - tcp_arg( pxPCB, pxPCB ); - - /* Reset the buffers and state variables. */ - usTCPBufPos = 0; - -#ifdef MB_TCP_DEBUG - vMBPortLog( MB_LOG_DEBUG, "MBTCP-ACCEPT", "Accepted new client %d.%d.%d.%d\r\n", - ip4_addr1( &( pxPCB->remote_ip ) ), - ip4_addr2( &( pxPCB->remote_ip ) ), - ip4_addr3( &( pxPCB->remote_ip ) ), ip4_addr4( &( pxPCB->remote_ip ) ) ); -#endif - - error = ERR_OK; - } - else - { - prvvMBPortReleaseClient( pxPCB ); - error = ERR_OK; - } - return error; -} - -/* Called in case of an unrecoverable error. In any case we drop the client - * connection. */ -void -prvvMBTCPPortError( void *pvArg, err_t xErr ) -{ - struct tcp_pcb *pxPCB = pvArg; - - if( pxPCB != NULL ) - { -#ifdef MB_TCP_DEBUG - vMBPortLog( MB_LOG_DEBUG, "MBTCP-ERROR", "Error with client connection! Droping it.\r\n" ); -#endif - prvvMBPortReleaseClient( pxPCB ); - } -} - -err_t -prvxMBTCPPortReceive( void *pvArg, struct tcp_pcb *pxPCB, struct pbuf *p, err_t xErr ) -{ - USHORT usLength; - - err_t error = xErr; - - if( error != ERR_OK ) - { - return error; - } - - /* If pbuf is NULL then remote end has closed connection. */ - if( p == NULL ) - { - prvvMBPortReleaseClient( pxPCB ); - return ERR_OK; - } - - /* Acknowledge that we have received the data bytes. */ - tcp_recved( pxPCB, p->len ); - - /* Check for internal buffer overflow. In case of an error drop the - * client. */ - if( ( usTCPBufPos + p->len ) >= MB_TCP_BUF_SIZE ) - { - prvvMBPortReleaseClient( pxPCB ); - error = ERR_OK; - } - else - { - memcpy( &aucTCPBuf[usTCPBufPos], p->payload, p->len ); - usTCPBufPos += p->len; - - /* If we have received the MBAP header we can analyze it and calculate - * the number of bytes left to complete the current request. If complete - * notify the protocol stack. - */ - if( usTCPBufPos >= MB_TCP_FUNC ) - { - /* Length is a byte count of Modbus PDU (function code + data) and the - * unit identifier. */ - usLength = aucTCPBuf[MB_TCP_LEN] << 8U; - usLength |= aucTCPBuf[MB_TCP_LEN + 1]; - - /* Is the frame already complete. */ - if( usTCPBufPos < ( MB_TCP_UID + usLength ) ) - { - } - else if( usTCPBufPos == ( MB_TCP_UID + usLength ) ) - { -#ifdef MB_TCP_DEBUG - prvvMBTCPLogFrame( "MBTCP-RECV", &aucTCPBuf[0], usTCPBufPos ); -#endif - ( void )xMBPortEventPost( EV_FRAME_RECEIVED ); - } - else - { -#ifdef MB_TCP_DEBUG - vMBPortLog( MB_LOG_DEBUG, "MBTCP-ERROR", - "Received to many bytes! Droping client.\r\n" ); -#endif - /* This should not happen. We can't deal with such a client and - * drop the connection for security reasons. - */ - prvvMBPortReleaseClient( pxPCB ); - } - } - } - pbuf_free( p ); - return error; -} - -BOOL -xMBTCPPortGetRequest( UCHAR ** ppucMBTCPFrame, USHORT * usTCPLength ) -{ - *ppucMBTCPFrame = &aucTCPBuf[0]; - *usTCPLength = usTCPBufPos; - - /* Reset the buffer. */ - usTCPBufPos = 0; - return TRUE; -} - -BOOL -xMBTCPPortSendResponse( const UCHAR * pucMBTCPFrame, USHORT usTCPLength ) -{ - BOOL bFrameSent = FALSE; - - if( pxPCBClient ) - { - /* Make sure we can send the packet. */ - assert( tcp_sndbuf( pxPCBClient ) >= usTCPLength ); - - if( tcp_write( pxPCBClient, pucMBTCPFrame, ( u16_t ) usTCPLength, NETCONN_COPY ) == ERR_OK ) - { -#ifdef MB_TCP_DEBUG - prvvMBTCPLogFrame( "MBTCP-SENT", &aucTCPBuf[0], usTCPLength ); -#endif - /* Make sure data gets sent immediately. */ - ( void )tcp_output( pxPCBClient ); - bFrameSent = TRUE; - } - else - { - /* Drop the connection in case of an write error. */ - prvvMBPortReleaseClient( pxPCBClient ); - } - } - return bFrameSent; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/simple.bat b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/simple.bat deleted file mode 100644 index c4d53d22..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/simple.bat +++ /dev/null @@ -1 +0,0 @@ -..\..\tools\modpoll.exe -m tcp 10.0.10.2 -r 1000 -t 3:int diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/simple.sh b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/simple.sh deleted file mode 100644 index 1af9b7a1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/simple.sh +++ /dev/null @@ -1 +0,0 @@ -../../tools/modpoll -m tcp 10.0.10.2 -r 1000 -t 3:int diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/startup.s b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/startup.s deleted file mode 100644 index 49461908..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/startup.s +++ /dev/null @@ -1,195 +0,0 @@ -/***************************************************************************** - * Copyright (c) 2001, 2002 Rowley Associates Limited. * - * * - * This file may be distributed under the terms of the License Agreement * - * provided with this software. * - * * - * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE * - * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. * - ***************************************************************************** - * WARNING * - ***************************************************************************** - * There have been a lot of modifications to this file for the FreeRTOS port * - * for the following reason: * - * * - * - We need support for the interrupt vectors from the EIC. * - * - The default file did only make a copy of the standard vectors when in * - * FLASH mode. Because in the used EIC configuration the new programm * - * counter value is loaded with a relative offset to the current pc the * - * interrupt vectors must also be available in the RAM. * - * - The clock source configuration did not fit for the specific * - * needs of the author. * - * * - * All modifications copyright (c) 2006, Christian Walter * - *****************************************************************************/ - -#include "FreeRTOSConfig.h" /* import configUSE_PREEMPTION */ - - .equ EIC_BASE, 0xFFFFF800 /* EIC base address. */ - .equ EIC_IVR_OFF, 0x18 /* EIC interrupt vector register. */ - - .section .vectors, "ax" - .code 32 - .align 0 - -/***************************************************************************** - * Exception vectors * - *****************************************************************************/ -_vectors_start: - ldr pc, [pc, #reset_handler_address - . - 8] /* reset */ - ldr pc, [pc, #undef_handler_address - . - 8] /* undefined instruction */ - ldr pc, [pc, #swi_handler_address - . - 8] /* swi handler */ - ldr pc, [pc, #pabort_handler_address - . - 8] /* abort prefetch */ - ldr pc, [pc, #dabort_handler_address - . - 8] /* abort data */ - nop - ldr pc, [pc, #irq_handler_address - . - 8] - ldr pc, [pc, #fiq_handler_address - . - 8] /* fiq */ - -reset_handler_address: .word _reset_handler -undef_handler_address: .word _undef_handler -swi_handler_address: .word vPortYieldProcessor -pabort_handler_address: .word _pabort_handler -dabort_handler_address: .word _dabort_handler -irq_handler_address: .word _irq_handler -fiq_handler_address: .word _fiq_handler - -/******************************************************************************* - * EIC interrupt vectors - ******************************************************************************/ -.global T0TIMI_address -.global T0TIMI_Addr -T0TIMI_Addr: /* for compatibility with STR71X library. */ -T0TIMI_address: .word _undef_IRQhandler -FLASH_address: .word _undef_IRQhandler -RCCU_address: .word _undef_IRQhandler -RTC_Addr: .word _undef_IRQhandler -#if configUSE_PREEMPTION == 0 -WDG_Addr: .word vPortNonPreemptiveTick -#else -WDG_Addr: .word vPortPreemptiveTick -#endif -XTI_Addr: .word _undef_IRQhandler -USBHP_Addr: .word _undef_IRQhandler -I2C0ITERR_Addr: .word _undef_IRQhandler -I2C1ITERR_ADDR: .word _undef_IRQhandler -UART0_ADDR: .word sio_uart0_irq -UART1_ADDR: .word sio_uart1_irq -UART2_ADDR: .word _undef_IRQhandler -UART3_ADDR: .word _undef_IRQhandler -BSPI0_ADDR: .word _undef_IRQhandler -BSPI1_Addr: .word _undef_IRQhandler -I2C0_Addr: .word _undef_IRQhandler -I2C1_Addr: .word _undef_IRQhandler -CAN_Addr: .word _undef_IRQhandler -ADC12_Addr: .word _undef_IRQhandler -T1TIMI_Addr: .word _undef_IRQhandler -T2TIMI_Addr: .word _undef_IRQhandler -T3TIMI_Addr: .word _undef_IRQhandler - .word 0 /* reserved */ - .word 0 /* reserved */ - .word 0 /* reserved */ -HDLC_Addr: .word _undef_IRQhandler -USBLP_Addr: .word _undef_IRQhandler - .word 0 /* reserved */ - .word 0 /* reserved */ -T0TOI_Addr: .word _undef_IRQhandler -T0OC1_Addr: .word _undef_IRQhandler -T0OC2_Addr: .word _undef_IRQhandler -_vectors_end: - -/******************************************************************************* - * If flash execution is used and the RAM is mapped at address 0 we also need - * to place a copy of the interrupt vector address table in the RAM. - ******************************************************************************/ - #ifdef __FLASH_BUILD - .section .vectors_ram, "ax" - .code 32 - .align 0 -_vectors_ram: - .fill _vectors_end - _vectors_start -#endif - -/****************************************************************************** - * Default exception handlers * - ******************************************************************************/ - .section .init, "ax" - .code 32 - .align 0 - -_reset_handler: -#ifdef __FLASH_BUILD - ldr r0, =_vectors_start - ldr r1, =_vectors_end - sub r1, r1, r0 /* r2 = number of bytes to copy */ - ldr r2, =0x20000000 /* r0 = start address to place copy */ -_vector_copy: - ldr r3, [r0], #4 /* read a word from the source */ - str r3, [r2], #4 /* copy the word to destination */ - subs r1, r1, #4 /* decrement number of words to copy */ - bne _vector_copy -#endif - - /* Configure system and jump to the _start entry point. */ - ldr r0, =0x6C000000 - ldr r1, =0x801D - str r1, [r0, #4] /* set up the emi to 1 wait state */ - - ldr r0, =0xA0000000 - ldr r1, =0x1c2 - str r1, [r0, #0x50] /* set up the internal RAM at 0x0 */ - - /* After setup the folling clock configuration will be active. Note - * that the value of CK is dependent on the target oscillator. - * - * CK = 4Mhz - * CLK2 = 2Mhz (with DIV2 = 1) - * RCLK = 16 * CLK2 / 1 = 32Mhz - * MCLK = RCLK - * PCLK1 = RCLK/2 - * PCLK2 = RCLK/2 - */ - - /* set RCLK to 16 * CLK2 / 1 = 32Mhz - * (0x0071 = FREEN=1, FREF_RANGE=1, MX1:0=11b, DX2:0=000b) */ - ldr r1, =0x00F0 - str r1, [r0, #0x18] - - /* (0x8009 = DIV2=1, CK2_16=1, CKU_CKSEL=1) */ - ldr r1, =0x8009 - str r1, [r0, #0x8] - - /* cpu and memory clock div = 1 */ - ldr r1, =0x0 - str r1, [r0, #0x40] - - /* pclk1 = rclk/1 and pclk2 = rclk/1 = 32Mhz - * (0x0101 = FACT2_9:8=01b, FACT1_1:0=01b) */ - ldr r1, =0x0000 - str r1, [r0, #0x44] - - /* Jump to the default C runtime startup code. */ - B _start - -_undef_handler: - b _undef_handler - -_swi_handler: - b vPortYieldProcessor - -_pabort_handler: - b _pabort_handler - -_dabort_handler: - b _dabort_handler - -_irq_handler: - ldr pc, =(EIC_BASE + EIC_IVR_OFF) - -_fiq_handler: - b _fiq_handler - -/****************************************************************************** - * Default IRQ handlers * - ******************************************************************************/ -_undef_IRQhandler: - b _undef_IRQhandler diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/options b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/options deleted file mode 100644 index 9ca5c882..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/options +++ /dev/null @@ -1,5 +0,0 @@ -asyncmap 0 -lock -noauth -nodefaultroute -silent diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/options-pap b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/options-pap deleted file mode 100644 index 4876b2f2..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/options-pap +++ /dev/null @@ -1,5 +0,0 @@ -asyncmap 0 -lock -auth -nodefaultroute -silent diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/options.ttyS0 b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/options.ttyS0 deleted file mode 100644 index 6166089a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/options.ttyS0 +++ /dev/null @@ -1,16 +0,0 @@ -# no modem control lines -local -nocrtscts - -# local address:remote address -10.0.10.1:10.0.10.2 -# pppd waits for connection on ttyS1 -passive -# pppd stays enabled even if remote disconnects. -persist -# proxy into lan -proxyarp -# disable compressoin -#nodeflate -#nobsdcomp -#novj diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/pap-secrets b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/pap-secrets deleted file mode 100644 index cb8c9acf..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/pap-secrets +++ /dev/null @@ -1,3 +0,0 @@ -# Secrets for authentication using PAP -# client server secret IP addresses -freemodbus * insecure * diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/server.sh b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/server.sh deleted file mode 100644 index 6ca24204..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/STR71XTCP/utils/server.sh +++ /dev/null @@ -1,9 +0,0 @@ -# --------------------------------------------------------------------------- -# server.sh - starts a local PPP server to connect with the target. -# -# Autor: Christian Walter -# --------------------------------------------------------------------------- -SER_DEV="/dev/ttyUSB0" -SER_SPEED="115200" -stty raw -parenb cs8 -cstopb -F $SER_DEV -/usr/sbin/pppd debug nodetach $SER_DEV $SER_SPEED diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/port.h deleted file mode 100644 index 6861f516..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/port.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * FreeModbus Libary: Win32 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -#include -#include -#include - -#define INLINE -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif - -/* ----------------------- Defines ------------------------------------------*/ - -#define ENTER_CRITICAL_SECTION( ) -#define EXIT_CRITICAL_SECTION( ) -#define MB_PORT_HAS_CLOSE 1 -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif - -/* ----------------------- Type definitions ---------------------------------*/ - -typedef enum -{ - MB_LOG_DEBUG, - MB_LOG_INFO, - MB_LOG_WARN, - MB_LOG_ERROR -} eMBPortLogLevel; - -/* ----------------------- Function prototypes ------------------------------*/ - -void vMBPortLog( eMBPortLogLevel eLevel, const TCHAR * szModule, - const TCHAR * szFmt, ... ); -void vMBPortTimerPoll( ); -BOOL xMBPortSerialPoll( ); -BOOL xMBPortSerialSetTimeout( DWORD dwTimeoutMs ); - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/portevent.c deleted file mode 100644 index 07ceca49..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/portevent.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * FreeModbus Libary: Win32 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - else - { - /* Poll the serial device. The serial device timeouts if no - * characters have been received within for t3.5 during an - * active transmission or if nothing happens within a specified - * amount of time. Both timeouts are configured from the timer - * init functions. - */ - ( void )xMBPortSerialPoll( ); - - /* Check if any of the timers have expired. */ - vMBPortTimerPoll( ); - - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/portother.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/portother.c deleted file mode 100644 index cb0107f0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/portother.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * FreeModbus Libary: Win32 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#include -#include - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" -#include "mbconfig.h" - -LPTSTR -Error2String( DWORD dwError ) -{ - static TCHAR szUserBuf[512]; - static LPTSTR szErrorMsg = _T( "internal error" ); - LPTSTR lpMsgBuf = NULL; - DWORD dwLength; - - dwLength = FormatMessage( FORMAT_MESSAGE_ALLOCATE_BUFFER | - FORMAT_MESSAGE_FROM_SYSTEM, - NULL, - dwError, - MAKELANGID( LANG_NEUTRAL, SUBLANG_DEFAULT ), - ( LPTSTR ) & lpMsgBuf, 0, NULL ); - if( dwLength == 0 ) - { - lpMsgBuf = _T( "internal error" ); - } - - _tcsnccpy_s( szUserBuf, _countof( szUserBuf ), lpMsgBuf, _tcslen( lpMsgBuf ) ); - LocalFree( lpMsgBuf ); - - return szUserBuf; -} - -void -vMBPortLog( eMBPortLogLevel eLevel, const TCHAR * szModule, const TCHAR * szFmt, ... ) -{ - TCHAR szBuf[512]; - int i; - va_list args; - static const LPTSTR arszLevel2Str[] = - { _T( "DEBUG" ), _T( "INFO" ), _T( "WARN" ), _T( "ERROR" ) }; - - i = _sntprintf_s( szBuf, _countof(szBuf) , _TRUNCATE, _T( "%s: %s: " ), - arszLevel2Str[eLevel], szModule ); - - if( i != 0 ) - { - va_start( args, szFmt ); - i += _vsntprintf_s( &szBuf[i], _countof(szBuf) - i, _TRUNCATE, szFmt, args ); - va_end( args ); - } - - if( i != 0 ) - { - if( eLevel == MB_LOG_DEBUG ) - { - OutputDebugString( szBuf ); - } - else - { - _fputts( szBuf, stderr ); - } - } - -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/portserial.c deleted file mode 100644 index 38bb5519..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/portserial.c +++ /dev/null @@ -1,298 +0,0 @@ -/* - * FreeModbus Libary: Win32 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#include - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" -#include "mbconfig.h" - -/* ----------------------- Defines -----------------------------------------*/ -#if MB_ASCII_ENABLED == 1 -#define BUF_SIZE 513 /* must hold a complete ASCII frame. */ -#else -#define BUF_SIZE 256 /* must hold a complete RTU frame. */ -#endif - -/* ----------------------- Static variables ---------------------------------*/ -static HANDLE g_hSerial; -static BOOL bRxEnabled; -static BOOL bTxEnabled; - -static UCHAR ucBuffer[BUF_SIZE]; -static INT uiRxBufferPos; -static INT uiTxBufferPos; - -/* ----------------------- Function prototypes ------------------------------*/ -LPTSTR Error2String( DWORD dwError ); - -/* ----------------------- Begin implementation -----------------------------*/ -void -vMBPortSerialEnable( BOOL bEnableRx, BOOL bEnableTx ) -{ - /* it is not allowed that both receiver and transmitter are enabled. */ - assert( !bEnableRx || !bEnableTx ); - - if( bEnableRx ) - { - PurgeComm( g_hSerial, PURGE_RXCLEAR ); - uiRxBufferPos = 0; - bRxEnabled = TRUE; - } - else - { - bRxEnabled = FALSE; - } - if( bEnableTx ) - { - bTxEnabled = TRUE; - uiTxBufferPos = 0; - } - else - { - bTxEnabled = FALSE; - } -} - -BOOL -xMBPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, UCHAR ucDataBits, - eMBParity eParity ) -{ - TCHAR szDevice[8]; - BOOL bStatus = TRUE; - DCB dcb; - - - - memset( &dcb, 0, sizeof( dcb ) ); - - dcb.DCBlength = sizeof( dcb ); - dcb.BaudRate = ulBaudRate; - - _stprintf_s( szDevice, 8, _T( "COM%d" ), ucPort ); - - switch ( eParity ) - { - case MB_PAR_NONE: - dcb.Parity = NOPARITY; - dcb.fParity = 0; - break; - case MB_PAR_EVEN: - dcb.Parity = EVENPARITY; - dcb.fParity = 1; - break; - case MB_PAR_ODD: - dcb.Parity = ODDPARITY; - dcb.fParity = 1; - break; - default: - bStatus = FALSE; - } - - switch ( ucDataBits ) - { - case 8: - dcb.ByteSize = 8; - break; - case 7: - dcb.ByteSize = 7; - break; - default: - bStatus = FALSE; - } - - - - if( bStatus ) - { - /* we don't use XON/XOFF flow control. */ - dcb.fInX = dcb.fOutX = FALSE; - /* we don't need hardware handshake. */ - dcb.fOutxCtsFlow = dcb.fOutxCtsFlow = FALSE; - dcb.fRtsControl = RTS_CONTROL_ENABLE; - dcb.fDtrControl = DTR_CONTROL_ENABLE; - - /* misc parameters */ - dcb.fErrorChar = FALSE; - dcb.fBinary = TRUE; - dcb.fNull = FALSE; - dcb.fAbortOnError = FALSE; - dcb.wReserved = 0; - dcb.XonLim = 2; - dcb.XoffLim = 4; - dcb.XonChar = 0x13; - dcb.XoffChar = 0x19; - dcb.EvtChar = 0; - - /* Open the serial device. */ - g_hSerial = - CreateFile( szDevice, GENERIC_READ | GENERIC_WRITE, 0, NULL, - OPEN_EXISTING, 0, NULL ); - - - if( g_hSerial == INVALID_HANDLE_VALUE ) - { - vMBPortLog( MB_LOG_ERROR, _T( "SER-INIT" ), _T( "Can't open serial port %s: %s" ), - szDevice, Error2String( GetLastError( ) ) ); - bStatus = FALSE; - } - else if( !SetCommState( g_hSerial, &dcb ) ) - { - vMBPortLog( MB_LOG_ERROR, _T( "SER-INIT" ), - _T( "Can't set settings for serial device %s: %s" ), - szDevice, Error2String( GetLastError( ) ) ); - bStatus = FALSE; - } - else if( !SetCommMask( g_hSerial, 0 ) ) - { - vMBPortLog( MB_LOG_ERROR, _T( "SER-INIT" ), - _T( "Can't set communication event mask for serial device %s: %s" ), - szDevice, Error2String( GetLastError( ) ) ); - bStatus = FALSE; - } - - else - { - vMBPortSerialEnable( FALSE, FALSE ); - bStatus = TRUE; - } - } - return bStatus; -} - -BOOL -xMBPortSerialSetTimeout( DWORD dwTimeoutMs ) -{ - BOOL bStatus; - COMMTIMEOUTS cto; - - /* usTimeOut is the inter character timeout used to detect the end - * of frame. The total timeout is set to 50ms to make sure we - * can exit the blocking read. */ - cto.ReadIntervalTimeout = dwTimeoutMs; - cto.ReadTotalTimeoutConstant = 50; - cto.ReadTotalTimeoutMultiplier = 0; - cto.WriteTotalTimeoutConstant = 0; - cto.WriteTotalTimeoutMultiplier = 0; - - if( !SetCommTimeouts( g_hSerial, &cto ) ) - { - vMBPortLog( MB_LOG_ERROR, _T( "SER-INIT" ), - _T( "Can't set timeouts for serial device: %s" ), - Error2String( GetLastError( ) ) ); - bStatus = FALSE; - } - else - { - bStatus = TRUE; - } - - return bStatus; -} - -void -vMBPortClose ( void ) -{ - ( void )CloseHandle( g_hSerial ); -} - -BOOL -xMBPortSerialPoll( ) -{ - BOOL bStatus = TRUE; - DWORD dwBytesRead; - DWORD dwBytesWritten; - DWORD i; - - while( bRxEnabled ) - { - /* buffer wrap around. */ - if( uiRxBufferPos >= BUF_SIZE ) - uiRxBufferPos = 0; - - if( ReadFile( g_hSerial, &ucBuffer[uiRxBufferPos], - BUF_SIZE - uiRxBufferPos, &dwBytesRead, NULL ) ) - { - if( dwBytesRead == 0 ) - { - /* timeout with no bytes. */ - break; - } - else if( dwBytesRead > 0 ) - { - vMBPortLog( MB_LOG_DEBUG, _T( "SER-POLL" ), - _T( "detected end of frame (t3.5 expired.)\r\n" ) ); - for( i = 0; i < dwBytesRead; i++ ) - { - /* Call the modbus stack and let him fill the buffers. */ - ( void )pxMBFrameCBByteReceived( ); - } - } - } - else - { - vMBPortLog( MB_LOG_ERROR, _T( "SER-POLL" ), _T( "I/O error on serial device: %s" ), - Error2String( GetLastError ( ) ) ); - bStatus = FALSE; - } - } - if( bTxEnabled ) - { - while( bTxEnabled ) - { - ( void )pxMBFrameCBTransmitterEmpty( ); - /* Call the modbus stack to let him fill the buffer. */ - } - dwBytesWritten = 0; - if( !WriteFile - ( g_hSerial, &ucBuffer[0], uiTxBufferPos, &dwBytesWritten, NULL ) - || ( dwBytesWritten != uiTxBufferPos ) ) - { - vMBPortLog( MB_LOG_ERROR, _T( "SER-POLL" ), _T( "I/O error on serial device: %s" ), - Error2String( GetLastError ( ) ) ); - bStatus = FALSE; - } - } - - return bStatus; -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - assert( uiTxBufferPos < BUF_SIZE ); - ucBuffer[uiTxBufferPos] = ucByte; - uiTxBufferPos++; - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - assert( uiRxBufferPos < BUF_SIZE ); - *pucByte = ucBuffer[uiRxBufferPos]; - uiRxBufferPos++; - return TRUE; -} - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/porttimer.c deleted file mode 100644 index 0224a300..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/Port/porttimer.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * FreeModbus Libary: Win32 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ - -/* ----------------------- Static variables ---------------------------------*/ -DWORD dwTimeOut; -BOOL bTimeoutEnable; -DWORD dwTimeLast; -extern HANDLE g_hSerial; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ - dwTimeOut = usTim1Timerout50us / 20U; - if( dwTimeOut == 0 ) - dwTimeOut = 1; - - return xMBPortSerialSetTimeout( dwTimeOut ); -} - -void -xMBPortTimersClose( ) -{ - /* Does not use any hardware resources. */ -} - -void -vMBPortTimerPoll( ) -{ - - /* Timers are called from the serial layer because we have no high - * res timer in Win32. */ - if( bTimeoutEnable ) - { - DWORD dwTimeCurrent = GetTickCount( ); - - if( ( dwTimeCurrent - dwTimeLast ) > dwTimeOut ) - { - bTimeoutEnable = FALSE; - ( void )pxMBPortCBTimerExpired( ); - } - } -} - -void -vMBPortTimersEnable( ) -{ - bTimeoutEnable = TRUE; - dwTimeLast = GetTickCount( ); -} - -void -vMBPortTimersDisable( ) -{ - bTimeoutEnable = FALSE; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/demo.cpp b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/demo.cpp deleted file mode 100644 index c08a971b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/demo.cpp +++ /dev/null @@ -1,299 +0,0 @@ -/* - * FreeModbus Libary: Win32 Demo Application - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id: demo.cpp,v 1.3 2006/06/26 19:23:40 wolti Exp $ - */ - -#include "stdafx.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define PROG _T("freemodbus") - -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 -#define REG_HOLDING_START 2000 -#define REG_HOLDING_NREGS 130 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; -static USHORT usRegHoldingStart = REG_HOLDING_START; -static USHORT usRegHoldingBuf[REG_HOLDING_NREGS]; - -static HANDLE hPollThread; -static CRITICAL_SECTION hPollLock; -static enum ThreadState -{ - STOPPED, - RUNNING, - SHUTDOWN -} ePollThreadState; - -/* ----------------------- Static functions ---------------------------------*/ -static BOOL bCreatePollingThread( void ); -static enum ThreadState eGetPollingThreadState( void ); -static void eSetPollingThreadState( enum ThreadState eNewState ); -static DWORD WINAPI dwPollingThread( LPVOID lpParameter ); - -/* ----------------------- Start implementation -----------------------------*/ -int -_tmain( int argc, _TCHAR * argv[] ) -{ - int iExitCode; - TCHAR cCh; - BOOL bDoExit; - - const UCHAR ucSlaveID[] = { 0xAA, 0xBB, 0xCC }; - - if( eMBInit( MB_RTU, 0x0A, 1, 38400, MB_PAR_EVEN ) != MB_ENOERR ) - { - _ftprintf( stderr, _T( "%s: can't initialize modbus stack!\r\n" ), PROG ); - iExitCode = EXIT_FAILURE; - } - else if( eMBSetSlaveID( 0x34, TRUE, ucSlaveID, 3 ) != MB_ENOERR ) - { - _ftprintf( stderr, _T( "%s: can't set slave id!\r\n" ), PROG ); - iExitCode = EXIT_FAILURE; - } - else - { - /* Create synchronization primitives and set the current state - * of the thread to STOPPED. - */ - InitializeCriticalSection( &hPollLock ); - eSetPollingThreadState( STOPPED ); - - /* CLI interface. */ - _tprintf( _T( "Type 'q' for quit or 'h' for help!\r\n" ) ); - bDoExit = FALSE; - do - { - _tprintf( _T( "> " ) ); - cCh = _gettchar( ); - switch ( cCh ) - { - case _TCHAR( 'q' ): - bDoExit = TRUE; - break; - case _TCHAR( 'd' ): - eSetPollingThreadState( SHUTDOWN ); - break; - case _TCHAR( 'e' ): - if( bCreatePollingThread( ) != TRUE ) - { - _tprintf( _T( "Can't start protocol stack! Already running?\r\n" ) ); - } - break; - case _TCHAR( 's' ): - switch ( eGetPollingThreadState( ) ) - { - case RUNNING: - _tprintf( _T( "Protocol stack is running.\r\n" ) ); - break; - case STOPPED: - _tprintf( _T( "Protocol stack is stopped.\r\n" ) ); - break; - case SHUTDOWN: - _tprintf( _T( "Protocol stack is shuting down.\r\n" ) ); - break; - } - break; - case _TCHAR( 'h' ): - _tprintf( _T( "FreeModbus demo application help:\r\n" ) ); - _tprintf( _T( " 'd' ... disable protocol stack.\r\n" ) ); - _tprintf( _T( " 'e' ... enabled the protocol stack\r\n" ) ); - _tprintf( _T( " 's' ... show current status\r\n" ) ); - _tprintf( _T( " 'q' ... quit applicationr\r\n" ) ); - _tprintf( _T( " 'h' ... this information\r\n" ) ); - _tprintf( _T( "\r\n" ) ); - _tprintf( _T( "Copyright 2006 Christian Walter \r\n" ) ); - break; - default: - if( cCh != _TCHAR('\n') ) - { - _tprintf( _T( "illegal command '%c'!\r\n" ), cCh ); - } - break; - } - - /* eat up everything untill return character. */ - while( cCh != '\n' ) - { - cCh = _gettchar( ); - } - } - while( !bDoExit ); - - /* Release hardware resources. */ - ( void )eMBClose( ); - iExitCode = EXIT_SUCCESS; - } - return iExitCode; -} - -BOOL -bCreatePollingThread( void ) -{ - BOOL bResult; - - if( eGetPollingThreadState( ) == STOPPED ) - { - if( ( hPollThread = CreateThread( NULL, 0, dwPollingThread, NULL, 0, NULL ) ) == NULL ) - { - /* Can't create the polling thread. */ - bResult = FALSE; - } - else - { - bResult = TRUE; - } - } - else - { - bResult = FALSE; - } - - return bResult; -} - -DWORD WINAPI -dwPollingThread( LPVOID lpParameter ) -{ - eSetPollingThreadState( RUNNING ); - - if( eMBEnable( ) == MB_ENOERR ) - { - do - { - if( eMBPoll( ) != MB_ENOERR ) - break; - } - while( eGetPollingThreadState( ) != SHUTDOWN ); - } - - ( void )eMBDisable( ); - - eSetPollingThreadState( STOPPED ); - - return 0; -} - -enum ThreadState -eGetPollingThreadState( ) -{ - enum ThreadState eCurState; - - EnterCriticalSection( &hPollLock ); - eCurState = ePollThreadState; - LeaveCriticalSection( &hPollLock ); - - return eCurState; -} - -void -eSetPollingThreadState( enum ThreadState eNewState ) -{ - EnterCriticalSection( &hPollLock ); - ePollThreadState = eNewState; - LeaveCriticalSection( &hPollLock ); -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_HOLDING_START ) && - ( usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegHoldingStart ); - switch ( eMode ) - { - /* Pass current register values to the protocol stack. */ - case MB_REG_READ: - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( UCHAR ) ( usRegHoldingBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( UCHAR ) ( usRegHoldingBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - break; - - /* Update current register values with new values from the - * protocol stack. */ - case MB_REG_WRITE: - while( usNRegs > 0 ) - { - usRegHoldingBuf[iRegIndex] = *pucRegBuffer++ << 8; - usRegHoldingBuf[iRegIndex] |= *pucRegBuffer++; - iRegIndex++; - usNRegs--; - } - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/demo.vcproj b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/demo.vcproj deleted file mode 100644 index 7f0e5f45..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/demo.vcproj +++ /dev/null @@ -1,358 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/stdafx.cpp b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/stdafx.cpp deleted file mode 100644 index ad511a98..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/stdafx.cpp +++ /dev/null @@ -1,8 +0,0 @@ -// stdafx.cpp : source file that includes just the standard includes -// freemodbus.pch will be the pre-compiled header -// stdafx.obj will contain the pre-compiled type information - -#include "stdafx.h" - -// TODO: reference any additional headers you need in STDAFX.H -// and not in this file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/stdafx.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/stdafx.h deleted file mode 100644 index 454201a3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32/stdafx.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * FreeModbus Libary: Win32 Demo Application - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#pragma once - - -#define WIN32_LEAN_AND_MEAN -#include -#include -#include - -#include diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/Port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/Port/port.h deleted file mode 100644 index b529da1b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/Port/port.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * FreeModbus Libary: BSD Socket Library Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -#include -#include -#include - -#define INLINE -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif - -/* ----------------------- Defines ------------------------------------------*/ - -#define ENTER_CRITICAL_SECTION( ) -#define EXIT_CRITICAL_SECTION( ) -#define MB_PORT_HAS_CLOSE 1 -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif - -/* ----------------------- Type definitions ---------------------------------*/ - -typedef enum -{ - MB_LOG_DEBUG, - MB_LOG_INFO, - MB_LOG_WARN, - MB_LOG_ERROR -} eMBPortLogLevel; - -/* ----------------------- Function prototypes ------------------------------*/ - -void vMBPortLog( eMBPortLogLevel eLevel, const TCHAR * szModule, - const TCHAR * szFmt, ... ); - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/Port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/Port/portevent.c deleted file mode 100644 index 4841cf9d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/Port/portevent.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * FreeModbus Libary: Win32 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Function prototypes ------------------------------*/ -BOOL xMBPortTCPPool( void ); - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - else - { - /* We can't do anything with errors from the pooling module. */ - ( void )xMBPortTCPPool( ); - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/Port/portother.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/Port/portother.c deleted file mode 100644 index 42f89601..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/Port/portother.c +++ /dev/null @@ -1,171 +0,0 @@ -/* - * FreeModbus Libary: Win32 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#include -#include -#include "winsock2.h" - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" -#include "mbconfig.h" - - -BOOL -prvMBTCPPortAddressToString( SOCKET xSocket, LPTSTR szAddr, USHORT usBufSize ) -{ - BOOL bOkay; - SOCKADDR_IN xClientAddr; - int iAddrLen = sizeof( SOCKADDR_IN ); - DWORD dwBufSize = usBufSize; - - assert( ( szAddr != NULL ) && ( usBufSize > 0 ) ); - if( getsockname( xSocket, ( SOCKADDR * ) & xClientAddr, &iAddrLen ) == SOCKET_ERROR ) - { - bOkay = FALSE; - } - else if( WSAAddressToString( ( SOCKADDR * ) & xClientAddr, iAddrLen, NULL, szAddr, - &dwBufSize ) == SOCKET_ERROR ) - { - bOkay = FALSE; - } - else - { - bOkay = TRUE; - } - return bOkay; -} - -LPTSTR -prvMBTCPPortFrameToString( UCHAR * pucFrame, USHORT usFrameLen ) -{ - LPTSTR szBuf; - int i; - int res; - int szBufPos = 0; - int szBufLength = usFrameLen + 128; - - assert( ( pucFrame != NULL ) ); - - szBuf = malloc( szBufLength * sizeof( TCHAR ) ); - if( szBuf != NULL ) - { - for( i = 0; i < usFrameLen; i++ ) - { - /* Print some additional frame information. */ - switch ( i ) - { - case 0: /* TID = Transaction Identifier. */ - res = _sntprintf_s( &szBuf[szBufPos], szBufLength, _TRUNCATE, _T( "| TID = " ) ); - break; - case 2: /* PID = Protocol Identifier. */ - res = _sntprintf_s( &szBuf[szBufPos], szBufLength, _TRUNCATE, _T( " | PID = " ) ); - break; - case 4: /* Length */ - res = _sntprintf_s( &szBuf[szBufPos], szBufLength, _TRUNCATE, _T( " | LEN = " ) ); - break; - case 6: /* UID = Unit Identifier. */ - res = _sntprintf_s( &szBuf[szBufPos], szBufLength, _TRUNCATE, _T( " | UID = " ) ); - break; - case 7: /* MB Function Code. */ - res = _sntprintf_s( &szBuf[szBufPos], szBufLength, _TRUNCATE, _T( " || FUNC = " ) ); - break; - case 8: /* MB PDU rest. */ - res = _sntprintf_s( &szBuf[szBufPos], szBufLength, _TRUNCATE, _T( " | DATA = " ) ); - break; - default: - res = 0; - break; - } - if( res == -1 ) - { - break; - } - else if( res != 0 ) - { - szBufPos += res; - szBufLength -= res; - } - - /* Print the data. */ - res = _sntprintf_s( &szBuf[szBufPos], szBufLength, _TRUNCATE, _T( "%02X" ), - pucFrame[i] ); - if( res == -1 ) - { - break; - } - szBufPos += res; - szBufLength -= res; - } - if( res != -1 ) - { - /* Append an end of frame string. */ - res = _sntprintf_s( &szBuf[szBufPos], szBufLength, _TRUNCATE, _T( " |" ), pucFrame[i] ); - } - if( res == -1 ) - { - free( szBuf ); - szBuf = NULL; - } - } - return szBuf; -} - -TCHAR * -WsaError2String( DWORD dwError ) -{ - static TCHAR szUserBuf[512]; - static LPTSTR szErrorMsg = _T( "internal error" ); - LPTSTR lpMsgBuf = NULL; - DWORD dwLength; - - dwLength = FormatMessage( FORMAT_MESSAGE_ALLOCATE_BUFFER | - FORMAT_MESSAGE_FROM_SYSTEM, - NULL, - dwError, - MAKELANGID( LANG_NEUTRAL, SUBLANG_DEFAULT ), - ( LPTSTR ) & lpMsgBuf, 0, NULL ); - if( dwLength == 0 ) - { - lpMsgBuf = _T( "internal error" ); - } - - _tcsnccpy_s( szUserBuf, _countof( szUserBuf ), lpMsgBuf, _tcslen( lpMsgBuf ) ); - LocalFree( lpMsgBuf ); - - return szUserBuf; -} - -void -vMBPortLog( eMBPortLogLevel eLevel, const TCHAR * szModule, const TCHAR * szFmt, ... ) -{ - va_list args; - static const LPTSTR arszLevel2Str[] = - { _T( "DEBUG" ), _T( "INFO" ), _T( "WARN" ), _T( "ERROR" ) }; - - _ftprintf( stderr, _T( "%s: %s: " ), arszLevel2Str[eLevel], szModule ); - - va_start( args, szFmt ); - _vftprintf( stderr, szFmt, args ); - va_end( args ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/Port/porttcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/Port/porttcp.c deleted file mode 100644 index 0ff3f0cc..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/Port/porttcp.c +++ /dev/null @@ -1,575 +0,0 @@ -/* - * FreeModbus Libary: Win32 Port - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* - * Design Notes: - * - * The xMBPortTCPInit function allocates a socket and binds the socket to - * all available interfaces ( bind with INADDR_ANY ). In addition it - * creates an array of event objects which is used to check the state of - * the clients. On event object is used to handle new connections or - * closed ones. The other objects are used on a per client basis for - * processing. - */ - -#include -#include "winsock2.h" - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- MBAP Header --------------------------------------*/ -#define MB_TCP_UID 6 -#define MB_TCP_LEN 4 -#define MB_TCP_FUNC 7 - -/* ----------------------- Defines -----------------------------------------*/ -#define MB_TCP_DEFAULT_PORT 502 /* TCP listening port. */ -#define MB_TCP_POOL_TIMEOUT 50 /* pool timeout for event waiting. */ -#define MB_TCP_READ_TIMEOUT 1000 /* Maximum timeout to wait for packets. */ -#define MB_TCP_READ_CYCLE 100 /* Time between checking for new data. */ - -#define MB_TCP_DEBUG 1 /* Set to 1 for additional debug output. */ - -#define MB_TCP_BUF_SIZE ( 256 + 7 ) /* Must hold a complete Modbus TCP frame. */ - -#define EV_CONNECTION 0 -#define EV_CLIENT 1 -#define EV_NEVENTS EV_CLIENT + 1 - -/* ----------------------- Static variables ---------------------------------*/ -SOCKET xListenSocket; -SOCKET xClientSocket; -WSAEVENT xEvents[EV_NEVENTS]; - -static UCHAR aucTCPBuf[MB_TCP_BUF_SIZE]; -static USHORT usTCPBufPos; -static USHORT usTCPFrameBytesLeft; - -/* ----------------------- External functions -------------------------------*/ -TCHAR *WsaError2String( DWORD dwError ); - -/* ----------------------- Static functions ---------------------------------*/ -BOOL prvMBTCPPortAddressToString( SOCKET xSocket, LPTSTR szAddr, USHORT usBufSize ); -LPTSTR prvMBTCPPortFrameToString( UCHAR * pucFrame, USHORT usFrameLen ); -static BOOL prvbMBPortAcceptClient( void ); -static void prvvMBPortReleaseClient( void ); -static BOOL prvMBTCPGetFrame( void ); - -/* ----------------------- Begin implementation -----------------------------*/ - -BOOL -xMBTCPPortInit( USHORT usTCPPort ) -{ - BOOL bOkay = FALSE; - USHORT usPort; - SOCKADDR_IN xService; - WSADATA wsaData; - - int i; - - if( WSAStartup( MAKEWORD( 2, 2 ), &wsaData ) != 0 ) - { - return FALSE; - } - - if( usTCPPort == 0 ) - { - usPort = MB_TCP_DEFAULT_PORT; - } - else - { - usPort = ( USHORT ) usTCPPort; - } - - xService.sin_family = AF_INET; - xService.sin_port = htons( usPort ); - xService.sin_addr.s_addr = INADDR_ANY; - - xClientSocket = INVALID_SOCKET; - for( i = 0; i < EV_NEVENTS; i++ ) - { - if( ( xEvents[i] = WSACreateEvent( ) ) == WSA_INVALID_EVENT ) - break; - } - if( i != EV_NEVENTS ) - { - vMBPortLog( MB_LOG_ERROR, _T( "TCP-POLL" ), _T( "can't create event objects: %s\r\n" ), - WsaError2String( WSAGetLastError( ) ) ); - } - else if( ( xListenSocket = socket( AF_INET, SOCK_STREAM, IPPROTO_TCP ) ) == INVALID_SOCKET ) - { - vMBPortLog( MB_LOG_ERROR, _T( "TCP-POLL" ), _T( "can't create socket: %s\r\n" ), - WsaError2String( WSAGetLastError( ) ) ); - } - else if( bind( xListenSocket, ( SOCKADDR * ) & xService, sizeof( xService ) ) == SOCKET_ERROR ) - { - vMBPortLog( MB_LOG_ERROR, _T( "TCP-POLL" ), _T( "can't bind on socket: %s\r\n" ), - WsaError2String( WSAGetLastError( ) ) ); - } - else if( listen( xListenSocket, 5 ) == SOCKET_ERROR ) - { - vMBPortLog( MB_LOG_ERROR, _T( "TCP-POLL" ), _T( "can't listen on socket: %s\r\n" ), - WsaError2String( WSAGetLastError( ) ) ); - } - else if( WSAEventSelect( xListenSocket, xEvents[EV_CONNECTION], FD_ACCEPT ) == SOCKET_ERROR ) - { - vMBPortLog( MB_LOG_ERROR, _T( "TCP-POLL" ), _T( "can't enable events on socket: %s\r\n" ), - WsaError2String( WSAGetLastError( ) ) ); - } - else - { - vMBPortLog( MB_LOG_INFO, _T( "TCP-POLL" ), _T( "Modbus TCP server listening on %S:%d\r\n" ), - inet_ntoa( xService.sin_addr ), ntohs( xService.sin_port ) ); - bOkay = TRUE; - } - - /* Perform cleanup on error. */ - if( bOkay != TRUE ) - { - for( i = 0; i < EV_NEVENTS; i++ ) - { - if( xEvents[i] != WSA_INVALID_EVENT ) - WSACloseEvent( xEvents[i] ); - } - if( xListenSocket != SOCKET_ERROR ) - closesocket( xListenSocket ); - } - - return bOkay; -} - -void -vMBTCPPortClose( ) -{ - int i; - - /* Release all event handlers. */ - for( i = 0; i < EV_NEVENTS; i++ ) - { - if( xEvents[i] != WSA_INVALID_EVENT ) - WSACloseEvent( xEvents[ i ] ); - } - /* Close all client sockets. */ - if( xClientSocket != SOCKET_ERROR ) - { - prvvMBPortReleaseClient( ); - } - /* Close the listener socket. */ - if( xListenSocket != SOCKET_ERROR ) - { - closesocket( xListenSocket ); - } - ( void )WSACleanup( ); -} - -void -vMBTCPPortDisable( void ) -{ - /* Close all client sockets. */ - if( xClientSocket != SOCKET_ERROR ) - { - prvvMBPortReleaseClient( ); - } -} - -/*! \ingroup port_win32tcp - * - * \brief Pool the listening socket and currently connected Modbus TCP clients - * for new events. - * \internal - * - * This function checks if new clients want to connect or if already connected - * clients are sending requests. If a new client is connected and there are - * still client slots left (The current implementation supports only one) - * then the connection is accepted and an event object for the new client - * socket is activated (See prvbMBPortAcceptClient() ). - * Events for already existing clients in \c FD_READ and \c FD_CLOSE. In case of - * an \c FD_CLOSE the client connection is released (See prvvMBPortReleaseClient() ). - * In case of an \c FD_READ command the existing data is read from the client - * and if a complete frame has been received the Modbus Stack is notified. - * - * \return FALSE in case of an internal I/O error. For example if the internal - * event objects are in an invalid state. Note that this does not include any - * client errors. In all other cases returns TRUE. - */ -BOOL -xMBPortTCPPool( void ) -{ - - BOOL bOkay = TRUE; - DWORD dwWaitResult; - WSANETWORKEVENTS xNetworkEvents; - int iEventNr; - int iRes; - - dwWaitResult = WSAWaitForMultipleEvents( EV_NEVENTS, xEvents, FALSE, - MB_TCP_POOL_TIMEOUT, FALSE ); - - /* Do nothing because only the timeout has expired. */ - if( ( dwWaitResult == WAIT_IO_COMPLETION ) || ( dwWaitResult == WSA_WAIT_TIMEOUT ) ) - { - } - /* Waiting for events failed. */ - else if( dwWaitResult == WSA_WAIT_FAILED ) - { - vMBPortLog( MB_LOG_ERROR, _T( "TCP-POLL" ), _T( "can't wait for network events: %s" ), - WsaError2String( WSAGetLastError( ) ) ); - bOkay = FALSE; - } - /* A event occured on one of the sockets */ - else - { - /* Get the event number for the result of the wait operation. */ - iEventNr = dwWaitResult - WSA_WAIT_EVENT_0; - - /* A client wants to connect. */ - if( iEventNr == EV_CONNECTION ) - { - if( MB_TCP_DEBUG ) - { - vMBPortLog( MB_LOG_DEBUG, _T( "TCP-POLL" ), _T( "got EV_CONNECTION event\r\n" ) ); - } - - /* Get additional event information from the socket. In addition the event - * object is reseted. - */ - iRes = WSAEnumNetworkEvents( xListenSocket, xEvents[iEventNr], &xNetworkEvents ); - if( iRes == SOCKET_ERROR ) - { - vMBPortLog( MB_LOG_ERROR, _T( "TCP-POLL" ), _T( "can't get event list: %S\r\n" ), - WsaError2String( WSAGetLastError( ) ) ); - } - else if( xNetworkEvents.lNetworkEvents & FD_ACCEPT ) - { - /* A new connection from a client. Accept it. */ - ( void )prvbMBPortAcceptClient( ); - } - } - - /* An already connected client has new data or the connection has - * been closed. */ - else if( iEventNr == EV_CLIENT ) - { - if( MB_TCP_DEBUG ) - { - vMBPortLog( MB_LOG_DEBUG, _T( "TCP-POLL" ), _T( "got EV_CLIENT event\r\n" ) ); - } - - iRes = WSAEnumNetworkEvents( xClientSocket, xEvents[iEventNr], &xNetworkEvents ); - if( iRes == SOCKET_ERROR ) - { - vMBPortLog( MB_LOG_ERROR, _T( "TCP-POLL" ), _T( "can't get event list: %s\r\n" ), - WsaError2String( WSAGetLastError( ) ) ); - } - else if( xNetworkEvents.lNetworkEvents & FD_READ ) - { - if( MB_TCP_DEBUG ) - { - vMBPortLog( MB_LOG_DEBUG, _T( "TCP-POLL" ), _T( "FD_READ event\r\n" ) ); - } - - /* Process part of the Modbus TCP frame. In case of an I/O error we have to drop - * the client connection. - */ - if( prvMBTCPGetFrame( ) != TRUE ) - { - prvvMBPortReleaseClient( ); - } - } - else if( xNetworkEvents.lNetworkEvents & FD_CLOSE ) - { - if( MB_TCP_DEBUG ) - { - vMBPortLog( MB_LOG_DEBUG, _T( "TCP-POLL" ), _T( "FD_CLOSE event\r\n" ) ); - } - - prvvMBPortReleaseClient( ); - } - else - { - vMBPortLog( MB_LOG_WARN, _T( "TCP-POLL" ), _T( "unknown EV_CLIENT event\r\n" ) ); - } - } - else - { - /* Error - Log a warning. */ - } - } - return bOkay; -} - -/*! - * \ingroup port_win32tcp - * \brief Receives parts of a Modbus TCP frame and if complete notifies - * the protocol stack. - * \internal - * - * This function reads a complete Modbus TCP frame from the protocol stack. - * It starts by reading the header with an initial request size for - * usTCPFrameBytesLeft = MB_TCP_FUNC. If the header is complete the - * number of bytes left can be calculated from it (See Length in MBAP header). - * Further read calls are issued until the frame is complete. - * - * \return \c TRUE if part of a Modbus TCP frame could be processed. In case - * of a communication error the function returns \c FALSE. - */ -BOOL -prvMBTCPGetFrame( ) -{ - BOOL bOkay = TRUE; - USHORT usLength; - int iRes; - LPTSTR szFrameAsStr; - - /* Make sure that we can safely process the next read request. If there - * is an overflow drop the client. - */ - if( ( usTCPBufPos + usTCPFrameBytesLeft ) >= MB_TCP_BUF_SIZE ) - { - vMBPortLog( MB_LOG_WARN, _T( "MBTCP-RCV" ), - _T( "Detected buffer overrun. Dropping client.\r\n" ) ); - return FALSE; - } - - iRes = recv( xClientSocket, &aucTCPBuf[usTCPBufPos], usTCPFrameBytesLeft, 0 ); - switch ( iRes ) - { - case SOCKET_ERROR: - vMBPortLog( MB_LOG_WARN, _T( "MBTCP-RCV" ), _T( "recv failed: %s\r\n" ), - WsaError2String( WSAGetLastError( ) ) ); - if( WSAGetLastError( ) != WSAEWOULDBLOCK ) - { - bOkay = FALSE; - } - break; - case 0: - bOkay = FALSE; - break; - default: - usTCPBufPos += iRes; - usTCPFrameBytesLeft -= iRes; - } - - /* If we have received the MBAP header we can analyze it and calculate - * the number of bytes left to complete the current request. If complete - * notify the protocol stack. - */ - if( usTCPBufPos >= MB_TCP_FUNC ) - { - /* Length is a byte count of Modbus PDU (function code + data) and the - * unit identifier. */ - usLength = aucTCPBuf[MB_TCP_LEN] << 8U; - usLength |= aucTCPBuf[MB_TCP_LEN + 1]; - - /* Is the frame already complete. */ - if( usTCPBufPos < ( MB_TCP_UID + usLength ) ) - { - usTCPFrameBytesLeft = usLength + MB_TCP_UID - usTCPBufPos; - } - /* The frame is complete. */ - else if( usTCPBufPos == ( MB_TCP_UID + usLength ) ) - { - if( MB_TCP_DEBUG ) - { - szFrameAsStr = prvMBTCPPortFrameToString( aucTCPBuf, usTCPBufPos ); - if( szFrameAsStr != NULL ) - { - vMBPortLog( MB_LOG_DEBUG, _T( "MBTCP-RCV" ), _T( "Received: %s\r\n" ), - szFrameAsStr ); - free( szFrameAsStr ); - } - } - ( void )xMBPortEventPost( EV_FRAME_RECEIVED ); - } - /* This can not happend because we always calculate the number of bytes - * to receive. */ - else - { - assert( usTCPBufPos <= ( MB_TCP_UID + usLength ) ); - } - } - return bOkay; -} - -BOOL -xMBTCPPortGetRequest( UCHAR ** ppucMBTCPFrame, USHORT * usTCPLength ) -{ - *ppucMBTCPFrame = &aucTCPBuf[0]; - *usTCPLength = usTCPBufPos; - - /* Reset the buffer. */ - usTCPBufPos = 0; - usTCPFrameBytesLeft = MB_TCP_FUNC; - return TRUE; -} - -BOOL -xMBTCPPortSendResponse( const UCHAR * pucMBTCPFrame, USHORT usTCPLength ) -{ - BOOL bFrameSent = FALSE; - BOOL bAbort = FALSE; - int res; - int iBytesSent = 0; - int iTimeOut = MB_TCP_READ_TIMEOUT; - LPTSTR szFrameAsStr; - - if( MB_TCP_DEBUG ) - { - szFrameAsStr = prvMBTCPPortFrameToString( aucTCPBuf, usTCPLength ); - if( szFrameAsStr != NULL ) - { - vMBPortLog( MB_LOG_DEBUG, _T( "MBTCP-SND" ), _T( "Snd: %s\r\n" ), szFrameAsStr ); - free( szFrameAsStr ); - } - } - - do - { - res = send( xClientSocket, &pucMBTCPFrame[iBytesSent], usTCPLength - iBytesSent, 0 ); - switch ( res ) - { - case SOCKET_ERROR: - if( ( WSAGetLastError( ) == WSAEWOULDBLOCK ) && ( iTimeOut > 0 ) ) - { - iTimeOut -= MB_TCP_READ_CYCLE; - Sleep( MB_TCP_READ_CYCLE ); - } - else - { - bAbort = TRUE; - } - break; - case 0: - prvvMBPortReleaseClient( ); - bAbort = TRUE; - break; - default: - iBytesSent += res; - break; - } - } - while( ( iBytesSent != usTCPLength ) && !bAbort ); - - bFrameSent = iBytesSent == usTCPLength ? TRUE : FALSE; - - return bFrameSent; -} - -void -prvvMBPortReleaseClient( ) -{ - TCHAR szIPAddr[32]; - - - if( prvMBTCPPortAddressToString( xClientSocket, szIPAddr, _countof( szIPAddr ) ) == TRUE ) - { - vMBPortLog( MB_LOG_INFO, _T( "MBTCP-CMGT" ), _T( "client %s disconnected.\r\n" ), - szIPAddr ); - } - else - { - vMBPortLog( MB_LOG_INFO, _T( "MBTCP-CMGT" ), _T( "unknown client disconnected.\r\n" ) ); - } - - /* Disable event notification for this client socket. */ - if( WSAEventSelect( xClientSocket, xEvents[EV_CLIENT], 0 ) == SOCKET_ERROR ) - { - vMBPortLog( MB_LOG_ERROR, _T( "MBTCP-CMGT" ), - _T( "can't disable events for disconnecting client socket: %s\r\n" ), - WsaError2String( WSAGetLastError( ) ) ); - } - - /* Reset event object in case an event was still pending. */ - if( WSAResetEvent( xEvents[EV_CLIENT] ) == SOCKET_ERROR ) - { - vMBPortLog( MB_LOG_ERROR, _T( "MBTCP-CMGT" ), - _T( "can't disable events for disconnecting client socket: %s\r\n" ), - WsaError2String( WSAGetLastError( ) ) ); - } - - /* Disallow the sender side. This tells the other side that we have finished. */ - if( shutdown( xClientSocket, SD_SEND ) == SOCKET_ERROR ) - { - vMBPortLog( MB_LOG_ERROR, _T( "MBTCP-CMGT" ), _T( "shutdown failed: %s\r\n" ), - WsaError2String( WSAGetLastError( ) ) ); - } - - /* Read any unread data from the socket. Note that this is not the strictly - * correct way to do it because our sockets are non blocking and therefore - * some bytes could remain. - */ - ( void )recv( xClientSocket, &aucTCPBuf[0], MB_TCP_BUF_SIZE, 0 ); - - ( void )closesocket( xClientSocket ); - xClientSocket = INVALID_SOCKET; -} - -BOOL -prvbMBPortAcceptClient( ) -{ - SOCKET xNewSocket; - BOOL bOkay; - - TCHAR szIPAddr[32]; - - /* Check if we can handle a new connection. */ - - if( xClientSocket != INVALID_SOCKET ) - { - vMBPortLog( MB_LOG_ERROR, _T( "MBTCP-CMGT" ), - _T( "can't accept new client. all connections in use.\r\n" ) ); - bOkay = FALSE; - } - else if( ( xNewSocket = accept( xListenSocket, NULL, NULL ) ) == INVALID_SOCKET ) - { - bOkay = FALSE; - } - /* Register READ events on the socket file descriptor. */ - else if( WSAEventSelect( xNewSocket, xEvents[EV_CLIENT], FD_READ | FD_CLOSE ) == SOCKET_ERROR ) - { - bOkay = FALSE; - ( void )closesocket( xNewSocket ); - } - /* Everything okay - Register the client connection. */ - else - { - xClientSocket = xNewSocket; - usTCPBufPos = 0; - usTCPFrameBytesLeft = MB_TCP_FUNC; - - if( prvMBTCPPortAddressToString( xClientSocket, szIPAddr, _countof( szIPAddr ) ) == TRUE ) - { - vMBPortLog( MB_LOG_INFO, _T( "MBTCP-CMGT" ), _T( "accepted new client %s.\r\n" ), - szIPAddr ); - } - else - { - vMBPortLog( MB_LOG_INFO, _T( "MBTCP-CMGT" ), _T( "accepted unknown client.\r\n" ) ); - } - bOkay = TRUE; - - } - return bOkay; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/demo.cpp b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/demo.cpp deleted file mode 100644 index b2f4096e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/demo.cpp +++ /dev/null @@ -1,292 +0,0 @@ -/* - * FreeModbus Libary: Win32 Demo Application - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id: demo.cpp,v 1.2 2006/06/26 19:24:07 wolti Exp $ - */ - -#include "stdafx.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define PROG _T("freemodbus") - -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 -#define REG_HOLDING_START 2000 -#define REG_HOLDING_NREGS 130 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; -static USHORT usRegHoldingStart = REG_HOLDING_START; -static USHORT usRegHoldingBuf[REG_HOLDING_NREGS]; - -static HANDLE hPollThread; -static CRITICAL_SECTION hPollLock; -static enum ThreadState -{ - STOPPED, - RUNNING, - SHUTDOWN -} ePollThreadState; - -/* ----------------------- Static functions ---------------------------------*/ -static BOOL bCreatePollingThread( void ); -static enum ThreadState eGetPollingThreadState( void ); -static void eSetPollingThreadState( enum ThreadState eNewState ); -static DWORD WINAPI dwPollingThread( LPVOID lpParameter ); - -/* ----------------------- Start implementation -----------------------------*/ -int -_tmain( int argc, _TCHAR * argv[] ) -{ - int iExitCode; - TCHAR cCh; - BOOL bDoExit; - - if( eMBTCPInit( MB_TCP_PORT_USE_DEFAULT ) != MB_ENOERR ) - { - _ftprintf( stderr, _T( "%s: can't initialize modbus stack!\r\n" ), PROG ); - iExitCode = EXIT_FAILURE; - } - else - { - /* Create synchronization primitives and set the current state - * of the thread to STOPPED. - */ - InitializeCriticalSection( &hPollLock ); - eSetPollingThreadState( STOPPED ); - - /* CLI interface. */ - _tprintf( _T( "Type 'q' for quit or 'h' for help!\r\n" ) ); - bDoExit = FALSE; - do - { - _tprintf( _T( "> " ) ); - cCh = _gettchar( ); - switch ( cCh ) - { - case _TCHAR( 'q' ): - bDoExit = TRUE; - break; - case _TCHAR( 'd' ): - eSetPollingThreadState( SHUTDOWN ); - break; - case _TCHAR( 'e' ): - if( bCreatePollingThread( ) != TRUE ) - { - _tprintf( _T( "Can't start protocol stack! Already running?\r\n" ) ); - } - break; - case _TCHAR( 's' ): - switch ( eGetPollingThreadState( ) ) - { - case RUNNING: - _tprintf( _T( "Protocol stack is running.\r\n" ) ); - break; - case STOPPED: - _tprintf( _T( "Protocol stack is stopped.\r\n" ) ); - break; - case SHUTDOWN: - _tprintf( _T( "Protocol stack is shuting down.\r\n" ) ); - break; - } - break; - case _TCHAR( 'h' ): - _tprintf( _T( "FreeModbus demo application help:\r\n" ) ); - _tprintf( _T( " 'd' ... disable protocol stack.\r\n" ) ); - _tprintf( _T( " 'e' ... enabled the protocol stack\r\n" ) ); - _tprintf( _T( " 's' ... show current status\r\n" ) ); - _tprintf( _T( " 'q' ... quit applicationr\r\n" ) ); - _tprintf( _T( " 'h' ... this information\r\n" ) ); - _tprintf( _T( "\r\n" ) ); - _tprintf( _T( "Copyright 2006 Christian Walter \r\n" ) ); - break; - default: - if( cCh != _TCHAR('\n') ) - { - _tprintf( _T( "illegal command '%c'!\r\n" ), cCh ); - } - break; - } - - /* eat up everything untill return character. */ - while( cCh != '\n' ) - { - cCh = _gettchar( ); - } - } - while( !bDoExit ); - - /* Release hardware resources. */ - ( void )eMBClose( ); - iExitCode = EXIT_SUCCESS; - } - return iExitCode; -} - -BOOL -bCreatePollingThread( void ) -{ - BOOL bResult; - - if( eGetPollingThreadState( ) == STOPPED ) - { - if( ( hPollThread = CreateThread( NULL, 0, dwPollingThread, NULL, 0, NULL ) ) == NULL ) - { - /* Can't create the polling thread. */ - bResult = FALSE; - } - else - { - bResult = TRUE; - } - } - else - { - bResult = FALSE; - } - - return bResult; -} - -DWORD WINAPI -dwPollingThread( LPVOID lpParameter ) -{ - eSetPollingThreadState( RUNNING ); - - if( eMBEnable( ) == MB_ENOERR ) - { - do - { - if( eMBPoll( ) != MB_ENOERR ) - break; - } - while( eGetPollingThreadState( ) != SHUTDOWN ); - } - - ( void )eMBDisable( ); - - eSetPollingThreadState( STOPPED ); - - return 0; -} - -enum ThreadState -eGetPollingThreadState( ) -{ - enum ThreadState eCurState; - - EnterCriticalSection( &hPollLock ); - eCurState = ePollThreadState; - LeaveCriticalSection( &hPollLock ); - - return eCurState; -} - -void -eSetPollingThreadState( enum ThreadState eNewState ) -{ - EnterCriticalSection( &hPollLock ); - ePollThreadState = eNewState; - LeaveCriticalSection( &hPollLock ); -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_HOLDING_START ) && - ( usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegHoldingStart ); - switch ( eMode ) - { - /* Pass current register values to the protocol stack. */ - case MB_REG_READ: - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( UCHAR ) ( usRegHoldingBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( UCHAR ) ( usRegHoldingBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - break; - - /* Update current register values with new values from the - * protocol stack. */ - case MB_REG_WRITE: - while( usNRegs > 0 ) - { - usRegHoldingBuf[iRegIndex] = *pucRegBuffer++ << 8; - usRegHoldingBuf[iRegIndex] |= *pucRegBuffer++; - iRegIndex++; - usNRegs--; - } - } - } - else - { - eStatus = MB_ENOREG; - } - return eStatus; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/demo.vcproj b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/demo.vcproj deleted file mode 100644 index 480da799..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/demo.vcproj +++ /dev/null @@ -1,317 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/stdafx.cpp b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/stdafx.cpp deleted file mode 100644 index d4c4f7eb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/stdafx.cpp +++ /dev/null @@ -1,22 +0,0 @@ -/* - * FreeModbus Libary: Win32TCP Demo Application - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id: stdafx.cpp,v 1.1 2006/06/25 00:20:19 wolti Exp $ - */ - -#include "stdafx.h" diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/stdafx.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/stdafx.h deleted file mode 100644 index 75a86e7c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/WIN32TCP/stdafx.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * FreeModbus Libary: Win32TCP Demo Application - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#pragma once - -#define WIN32_LEAN_AND_MEAN -#include -#include -#include -#include diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/README.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/README.txt deleted file mode 100644 index e0c457c9..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/README.txt +++ /dev/null @@ -1,53 +0,0 @@ - - FREEMODBUS 1.1 Z8Encore PORT - ============================ - -REQUIREMENTS -============ - -This demo application provides a port for the Z8 Encore!® family of - microcontrollers from Zilog[1]. The microcontroller used was the Z8F6422. - -It requires a wired serial port to a host processor and a Modbus Master -Software on the PC side to be useful. Demo versions of Modbus Masters -can be found in [2] and [3]. - -SOURCE -====== - -If one wants to recompile the software, the ZDS II - Z8 Encore! 4.10.1 -should be installed. The ZDS II - Z8 Encore! can be found at [4]. The -project is for the Z8F6422 microcontroller, but has been tested with -Z8F1622. - -* The ASCII mode was disabled so flash memory of Z8F1622 was enough. - - -TESTING -======= - -Start the Modbus Sample Application and test if the input registers -starting at protocol address 1000 can be read. There are four registers -value available and the output should look like: - -Polling slave (Ctrl-C to stop) ... -[1000]: 6474 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... -[1000]: -8831 -[1001]: 0 -[1002]: 0 -[1003]: 0 -Polling slave (Ctrl-C to stop) ... - -The simple testing utility used in the 'demo_rtu.bat' script can be found -at [5]. - - -[1] Zilog - Z8Encore 64K series: http://www.zilog.com/products/family.asp?fam=225 -[2] WinTech ModScan32: http://www.win-tech.com/html/modscan32.htm -[3] Modus Poll: http://www.modbustools.com/modbus_poll.asp -[4] ZDS II - Z8 Encore!: http://www.zilog.com/software/zds2.asp -[5] FieldTalk Modpoll: http://www.focus-sw.com/fieldtalk/modpoll.html diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/demo.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/demo.c deleted file mode 100644 index 109fdd31..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/demo.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * FreeModbus Libary: LPC214X Port - * Copyright (C) 2007 Tiago Prado Lone - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define REG_INPUT_START 1000 -#define REG_INPUT_NREGS 4 - -/* ----------------------- Static variables ---------------------------------*/ -static USHORT usRegInputStart = REG_INPUT_START; -static USHORT usRegInputBuf[REG_INPUT_NREGS]; - -/* ----------------------- Start implementation -----------------------------*/ -int -main( void ) -{ - eMBErrorCode eStatus; - - eStatus = eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN ); - - /* Enable the Modbus Protocol Stack. */ - eStatus = eMBEnable( ); - - for( ;; ) - { - ( void )eMBPoll( ); - - /* Here we simply count the number of poll cycles. */ - usRegInputBuf[0]++; - } -} - -eMBErrorCode -eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) -{ - eMBErrorCode eStatus = MB_ENOERR; - int iRegIndex; - - if( ( usAddress >= REG_INPUT_START ) - && ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) ) - { - iRegIndex = ( int )( usAddress - usRegInputStart ); - while( usNRegs > 0 ) - { - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 ); - *pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF ); - iRegIndex++; - usNRegs--; - } - } - else - { - eStatus = MB_ENOREG; - } - - return eStatus; -} - -eMBErrorCode -eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - - -eMBErrorCode -eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) -{ - return MB_ENOREG; -} - -eMBErrorCode -eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) -{ - return MB_ENOREG; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/demo.wsp b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/demo.wsp deleted file mode 100644 index 041c317f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/demo.wsp +++ /dev/null @@ -1,540 +0,0 @@ -[WorkState_v1_1] -ptn_Child1=DockState -ptn_Child2=ToolBarMgr -ptn_Child3=Frames - -[WorkState_v1_1.DockState] -Bars=15 -ScreenCX=1280 -ScreenCY=1024 -ptn_Child1=Bar-0 -ptn_Child10=Bar-9 -ptn_Child11=Bar-10 -ptn_Child12=Bar-11 -ptn_Child13=Bar-12 -ptn_Child14=Bar-13 -ptn_Child15=Bar-14 -ptn_Child2=Bar-1 -ptn_Child3=Bar-2 -ptn_Child4=Bar-3 -ptn_Child5=Bar-4 -ptn_Child6=Bar-5 -ptn_Child7=Bar-6 -ptn_Child8=Bar-7 -ptn_Child9=Bar-8 - -[WorkState_v1_1.DockState.Bar-0] -BarID=59393 -ClassName=SECCustomStatusBar -DockingStyle=0 -ExStyle=0 -MDIChild=False -MRUDockingState=0 -MRUFloatCX=0 -MRUFloatCY=0 -MRUHorzDockCX=0 -MRUHorzDockCY=0 -MRUVertDockCX=0 -MRUVertDockCY=0 -PctWidth=1000000 -PrevFloating=False -ResourceID=0 -Style=32768 -TypeID=0 -WindowName=Saving workspace... - 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-[WorkState_v1_1.Frames.ChildFrames] - -[WorkState_v1_1.Frames.MainFrame] -Title=demo -- ZDS II - Z8 Encore! Family -WindowPlacement=MCAAAAAACAAAAAAADAAAAAAAPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPAAAAAAAAAAAAAAAAIAEAAAAAIADAAAAA - -[WorkState_v1_1.ToolBarMgr] -CoolLook=True -LargeButtons=False -ToolTips=True - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/demo.zdsproj b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/demo.zdsproj deleted file mode 100644 index 348f5cfe..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/demo.zdsproj +++ /dev/null @@ -1,298 +0,0 @@ - -Z8F6422 - - - -.\demo.c -port\portevent.c -port\portserial.c -port\porttimer.c -..\..\modbus\mb.c -..\..\modbus\ascii\mbascii.c -..\..\modbus\functions\mbfunccoils.c -..\..\modbus\functions\mbfuncdiag.c -..\..\modbus\functions\mbfuncdisc.c -..\..\modbus\functions\mbfuncholding.c -..\..\modbus\functions\mbfuncinput.c -..\..\modbus\functions\mbfuncother.c -..\..\modbus\functions\mbutils.c -..\..\modbus\rtu\mbcrc.c -..\..\modbus\rtu\mbrtu.c -..\..\modbus\tcp\mbtcp.c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -000000000000 -000000000000 -0 - - -000000000000 -000000000000 -0 - - -000000000000 -000000000000 -0 - - -000000000000 -000000000000 -0 - - - - \ No newline at end of file diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/port/port.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/port/port.h deleted file mode 100644 index 8bc52e00..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/port/port.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * FreeModbus Libary: Z8Encore Port for Z8F6422 - * Copyright (C) 2007 Tiago Prado Lone - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#ifndef _PORT_H -#define _PORT_H - -#include - -#include - -#define INLINE -#define PR_BEGIN_EXTERN_C extern "C" { -#define PR_END_EXTERN_C } - -#define CLOCK 18432000 - -#define ENTER_CRITICAL_SECTION( ) DI() -#define EXIT_CRITICAL_SECTION( ) EI() - -typedef unsigned char BOOL; - -typedef unsigned char UCHAR; -typedef char CHAR; - -typedef unsigned int USHORT; -typedef int SHORT; - -typedef unsigned long ULONG; -typedef long LONG; - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/port/portevent.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/port/portevent.c deleted file mode 100644 index 89b035df..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/port/portevent.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * FreeModbus Libary: Z8Encore Port for Z8F6422 - * Copyright (C) 2007 Tiago Prado Lone - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- Variables ----------------------------------------*/ -static eMBEventType eQueuedEvent; -static BOOL xEventInQueue; - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortEventInit( void ) -{ - xEventInQueue = FALSE; - return TRUE; -} - -BOOL -xMBPortEventPost( eMBEventType eEvent ) -{ - xEventInQueue = TRUE; - eQueuedEvent = eEvent; - return TRUE; -} - -BOOL -xMBPortEventGet( eMBEventType * eEvent ) -{ - BOOL xEventHappened = FALSE; - - if( xEventInQueue ) - { - *eEvent = eQueuedEvent; - xEventInQueue = FALSE; - xEventHappened = TRUE; - } - return xEventHappened; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/port/portserial.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/port/portserial.c deleted file mode 100644 index 036e7204..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/port/portserial.c +++ /dev/null @@ -1,205 +0,0 @@ -/* - * FreeModbus Libary: Z8Encore Port for Z8F6422 - * Copyright (C) 2007 Tiago Prado Lone - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -#define PORTA_UART_RXD 0x10 -#define PORTA_UART_TXD 0x20 - -#define RX_ENABLE 0x40 -#define TX_ENABLE 0x80 - -#define UART0_RXD_INT_PENDING 0x10 -#define UART0_TXD_INT_PENDING 0x08 - -#define UART0_RXD_INT_EN_H 0x10 -#define UART0_RXD_INT_EN_L 0x10 -#define UART0_TXD_INT_EN_H 0x08 -#define UART0_TXD_INT_EN_L 0x08 - -#define UART_PARITY_ODD 0x18 -#define UART_PARITY_EVEN 0x10 - -#define UART_ERRORS 0x70 - - -/* ----------------------- static functions ---------------------------------*/ -static void interrupt prvvUARTTxReadyISR( void ); -static void interrupt prvvUARTRxISR( void ); - -/* ----------------------- Start implementation -----------------------------*/ -void -vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ) -{ - /* If xRXEnable enable serial receive interrupts. If xTxENable enable - * transmitter empty interrupts. - */ - if( xRxEnable ) - { - IRQ0ENL |= UART0_RXD_INT_EN_L; - } - else - { - IRQ0ENL &= ~UART0_RXD_INT_EN_L; - } - if( xTxEnable ) - { - IRQ0ENL |= UART0_TXD_INT_EN_L; - /* Force Tx Interruption */ - IRQ0 |= UART0_TXD_INT_PENDING; - } - else - { - IRQ0ENL &= ~UART0_TXD_INT_EN_L; - } -} - -BOOL -xMBPortSerialInit( UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) -{ - UCHAR cfg = 0; - - if( ucDataBits != 8 ) - { - return FALSE; - } - - switch ( eParity ) - { - case MB_PAR_NONE: - break; - - case MB_PAR_ODD: - cfg |= UART_PARITY_ODD; - break; - - case MB_PAR_EVEN: - cfg |= UART_PARITY_EVEN; - break; - - default: - return FALSE; - } - - /* Baud Rate -> U0BR = (CLOCK/(16*BAUD) */ - U0BRH = CLOCK / ( 16 * ulBaudRate ) >> 8; - U0BRL = CLOCK / ( 16 * ulBaudRate ) & 0x00FF; - - /* Enable Alternate Function of UART Pins */ - PAAF |= PORTA_UART_RXD | PORTA_UART_TXD; - - /* Disable Interrupts */ - DI( ); - - /* Configure Stop Bits, Parity and Enable Rx/Tx */ - U0CTL0 = cfg | RX_ENABLE | TX_ENABLE; - U0CTL1 = 0x00; - - /* Low Priority Rx/Tx Interrupts */ - IRQ0ENH &= ~UART0_TXD_INT_EN_H & ~UART0_RXD_INT_EN_H; - - vMBPortSerialEnable( FALSE, FALSE ); - - /* Set Rx/Tx Interruption Vectors */ - SET_VECTOR( UART0_RX, prvvUARTRxISR ); - SET_VECTOR( UART0_TX, prvvUARTTxReadyISR ); - - /* Enable Interrupts */ - EI( ); - - return TRUE; -} - -BOOL -xMBPortSerialPutByte( CHAR ucByte ) -{ - /* Put a byte in the UARTs transmit buffer. This function is called - * by the protocol stack if pxMBFrameCBTransmitterEmpty( ) has been - * called. */ - while( !( U0STAT0 & 0x04 ) ) - { - } - - U0D = ucByte; - - return TRUE; -} - -BOOL -xMBPortSerialGetByte( CHAR * pucByte ) -{ - /* Return the byte in the UARTs receive buffer. This function is called - * by the protocol stack after pxMBFrameCBByteReceived( ) has been called. - */ - while( !( U0STAT0 & 0x80 ) ) - { - } - - *pucByte = U0D; - - return TRUE; -} - -/* - * Create an interrupt handler for the transmit buffer empty interrupt - * (or an equivalent) for your target processor. This function should then - * call pxMBFrameCBTransmitterEmpty( ) which tells the protocol stack that - * a new character can be sent. The protocol stack will then call - * xMBPortSerialPutByte( ) to send the character. - */ -static unsigned int uiCnt = 0; - -static void interrupt -prvvUARTTxReadyISR( void ) -{ - pxMBFrameCBTransmitterEmpty( ); - - IRQ0 &= ~UART0_TXD_INT_PENDING; -} - - -/* - * Create an interrupt handler for the receive interrupt for your target - * processor. This function should then call pxMBFrameCBByteReceived( ). The - * protocol stack will then call xMBPortSerialGetByte( ) to retrieve the - * character. - */ -static void interrupt -prvvUARTRxISR( void ) -{ - UCHAR tmp; - - /* Verify UART error flags */ - if( U0STAT0 & UART_ERRORS ) - { - tmp = U0D; - } - else - { - pxMBFrameCBByteReceived( ); - } - - IRQ0 &= ~UART0_RXD_INT_PENDING; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/port/porttimer.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/port/porttimer.c deleted file mode 100644 index bb3e50a7..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/Z8ENCORE/port/porttimer.c +++ /dev/null @@ -1,89 +0,0 @@ -/* - * FreeModbus Libary: Z8Encore Port for Z8F6422 - * Copyright (C) 2007 Tiago Prado Lone - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id$ - */ - -/* ----------------------- Platform includes --------------------------------*/ -#include "port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbport.h" - -/* ----------------------- static functions ---------------------------------*/ -static void interrupt prvvTIMERExpiredISR( void ); - -/* ----------------------- Start implementation -----------------------------*/ -BOOL -xMBPortTimersInit( USHORT usTim1Timerout50us ) -{ - /* Configure Timer 0 (One Shot, Prescale = 1, Disabled) - * - * Timer Control #00000000b - * || ||_|_______ One Shot - * Disabled = 0 __||_|_____________/1 Prescale - * */ - T0CTL1 = 0x00; - - T0H = 0x00; - T0L = 0x00; - - /* Time = (reload x prescale)/CLOCK - * reload = (Time*CLOCK)/prescale - * 50us = CLOCK/20000 - * reload = usTim1Timerout50us*(CLOCK/20000) - */ - T0CPH = ( usTim1Timerout50us * ( CLOCK / 20000 ) ) >> 8; - T0CPL = ( usTim1Timerout50us * ( CLOCK / 20000 ) ) & 0x00FF; - - IRQ0ENH |= 0x20; - IRQ0ENL |= 0x20; /* Enable Timer0 High Priority */ - - /* Set Interrupt Vector */ - SET_VECTOR( TIMER0, prvvTIMERExpiredISR ); - - return TRUE; -} - - -void -vMBPortTimersEnable( ) -{ - T0H = 0x00; - T0L = 0x00; - - T0CTL1 |= 0x80; -} - -void -vMBPortTimersDisable( ) -{ - T0CTL1 &= ~0x80; -} - -/* - * Create an ISR which is called whenever the timer has expired. This function - * must then call pxMBPortCBTimerExpired( ) to notify the protocol stack that - * the timer has expired. - */ -static void interrupt -prvvTIMERExpiredISR( void ) -{ - ( void )pxMBPortCBTimerExpired( ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/TODO.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/TODO.txt deleted file mode 100644 index 1c60fc8c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/TODO.txt +++ /dev/null @@ -1,33 +0,0 @@ - -Modbus Gernal: - -Modbus RTU/ASCII: - - - Parity checking should be used for the characters when received. This - is not strictly necessary because we use CRC or LRC but it is recommended - in the standard - - Difficulty: easy - Priority: low - -Modbus TCP: - - - vMBTCPPortEnable( ) should be called by the protocol stack to enable - processing of input connections. This function must be called by - the protocol stack and therefore must be added to the TCP porting layer. - - Difficulty: medium - Priority: high - - - MCF5235TCP port uses an outdated version of the FreeRTOS/lwIP porting - layer. They should be merged with the STR71X porting layer. - -Modbus Functions: - - - If not initialized the Get Slave ID function must also return the - run indicator byte in the result and maybe a dummy slave id. - - Difficulty: easy - Priority: medium - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/dox.css b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/dox.css deleted file mode 100644 index decae9e3..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/dox.css +++ /dev/null @@ -1,309 +0,0 @@ -BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { - font-family: Geneva, Arial, Helvetica, sans-serif; -} -BODY,TD { - font-size: 90%; -} -H1 { - text-align: center; - font-size: 160%; -} -H2 { - font-size: 120%; -} -H3 { - font-size: 100%; -} -CAPTION { font-weight: bold } -DIV.qindex { - width: 100%; - background-color: #eeeeff; - border: 1px solid #b0b0b0; - text-align: center; - margin: 2px; - padding: 2px; - line-height: 140%; -} -DIV.nav { - width: 100%; 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If the tag is left blank doxygen -# will generate a default style sheet - -HTML_STYLESHEET = dox.css - -# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, -# files or namespaces will be aligned in HTML using tables. If set to -# NO a bullet list will be used. - -HTML_ALIGN_MEMBERS = YES - -# If the GENERATE_HTMLHELP tag is set to YES, additional index files -# will be generated that can be used as input for tools like the -# Microsoft HTML help workshop to generate a compressed HTML help file (.chm) -# of the generated HTML documentation. - -GENERATE_HTMLHELP = NO - -# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can -# be used to specify the file name of the resulting .chm file. You -# can add a path in front of the file if the result should not be -# written to the html output dir. - -CHM_FILE = - -# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can -# be used to specify the location (absolute path including file name) of -# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run -# the HTML help compiler on the generated index.hhp. - -HHC_LOCATION = - -# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag -# controls if a separate .chi index file is generated (YES) or that -# it should be included in the master .chm file (NO). - -GENERATE_CHI = NO - -# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag -# controls whether a binary table of contents is generated (YES) or a -# normal table of contents (NO) in the .chm file. - -BINARY_TOC = NO - -# The TOC_EXPAND flag can be set to YES to add extra items for group members -# to the contents of the HTML help documentation and to the tree view. - -TOC_EXPAND = NO - -# The DISABLE_INDEX tag can be used to turn on/off the condensed index at -# top of each HTML page. The value NO (the default) enables the index and -# the value YES disables it. - -DISABLE_INDEX = YES - -# This tag can be used to set the number of enum values (range [1..20]) -# that doxygen will group on one line in the generated HTML documentation. - -ENUM_VALUES_PER_LINE = 4 - -# If the GENERATE_TREEVIEW tag is set to YES, a side panel will be -# generated containing a tree-like index structure (just like the one that -# is generated for HTML Help). For this to work a browser that supports -# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+, -# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are -# probably better off using the HTML help feature. - -GENERATE_TREEVIEW = YES - -# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be -# used to set the initial width (in pixels) of the frame in which the tree -# is shown. - -TREEVIEW_WIDTH = 200 - -#--------------------------------------------------------------------------- -# configuration options related to the LaTeX output -#--------------------------------------------------------------------------- - -GENERATE_LATEX = NO - -#--------------------------------------------------------------------------- -# configuration options related to the RTF output -#--------------------------------------------------------------------------- - -GENERATE_RTF = NO - -#--------------------------------------------------------------------------- -# configuration options related to the man page output -#--------------------------------------------------------------------------- - -GENERATE_MAN = NO - -#--------------------------------------------------------------------------- -# configuration options related to the XML output -#--------------------------------------------------------------------------- - -# If the GENERATE_XML tag is set to YES Doxygen will -# generate an XML file that captures the structure of -# the code including all documentation. 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If left blank, the patterns specified with FILE_PATTERNS will -# be used. - -INCLUDE_FILE_PATTERNS = - -# The PREDEFINED tag can be used to specify one or more macro names that -# are defined before the preprocessor is started (similar to the -D option of -# gcc). The argument of the tag is a list of macros of the form: name -# or name=definition (no spaces). If the definition and the = are -# omitted =1 is assumed. - -PREDEFINED = DOXYGEN - -# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then -# this tag can be used to specify a list of macro names that should be expanded. -# The macro definition that is found in the sources will be used. -# Use the PREDEFINED tag if you want to use a different macro definition. - -EXPAND_AS_DEFINED = - -# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then -# doxygen's preprocessor will remove all function-like macros that are alone -# on a line, have an all uppercase name, and do not end with a semicolon. Such -# function macros are typically used for boiler-plate code, and will confuse the -# parser if not removed. - -SKIP_FUNCTION_MACROS = YES - -#--------------------------------------------------------------------------- -# Configuration::addtions related to external references -#--------------------------------------------------------------------------- - -# The TAGFILES option can be used to specify one or more tagfiles. -# Optionally an initial location of the external documentation -# can be added for each tagfile. The format of a tag file without -# this location is as follows: -# TAGFILES = file1 file2 ... -# Adding location for the tag files is done as follows: -# TAGFILES = file1=loc1 "file2 = loc2" ... -# where "loc1" and "loc2" can be relative or absolute paths or -# URLs. If a location is present for each tag, the installdox tool -# does not have to be run to correct the links. -# Note that each tag file must have a unique name -# (where the name does NOT include the path) -# If a tag file is not located in the directory in which doxygen -# is run, you must also specify the path to the tagfile here. - -TAGFILES = - -# When a file name is specified after GENERATE_TAGFILE, doxygen will create -# a tag file that is based on the input files it reads. - -GENERATE_TAGFILE = - -# If the ALLEXTERNALS tag is set to YES all external classes will be listed -# in the class index. If set to NO only the inherited external classes -# will be listed. - -ALLEXTERNALS = NO - -# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed -# in the modules index. If set to NO, only the current project's groups will -# be listed. - -EXTERNAL_GROUPS = YES - -# The PERL_PATH should be the absolute path and name of the perl script -# interpreter (i.e. the result of `which perl'). - -PERL_PATH = /usr/bin/perl - -#--------------------------------------------------------------------------- -# Configuration options related to the dot tool -#--------------------------------------------------------------------------- - -# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will -# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base or -# super classes. Setting the tag to NO turns the diagrams off. Note that this -# option is superceded by the HAVE_DOT option below. This is only a fallback. It is -# recommended to install and use dot, since it yields more powerful graphs. - -CLASS_DIAGRAMS = YES - -# If set to YES, the inheritance and collaboration graphs will hide -# inheritance and usage relations if the target is undocumented -# or is not a class. - -HIDE_UNDOC_RELATIONS = YES - -# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is -# available from the path. This tool is part of Graphviz, a graph visualization -# toolkit from AT&T and Lucent Bell Labs. The other options in this section -# have no effect if this option is set to NO (the default) - -HAVE_DOT = NO - -# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen -# will generate a graph for each documented class showing the direct and -# indirect inheritance relations. Setting this tag to YES will force the -# the CLASS_DIAGRAMS tag to NO. - -CLASS_GRAPH = YES - -# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen -# will generate a graph for each documented class showing the direct and -# indirect implementation dependencies (inheritance, containment, and -# class references variables) of the class with other documented classes. - -COLLABORATION_GRAPH = YES - -# If the UML_LOOK tag is set to YES doxygen will generate inheritance and -# collaboration diagrams in a style similiar to the OMG's Unified Modeling -# Language. - -UML_LOOK = NO - -# If set to YES, the inheritance and collaboration graphs will show the -# relations between templates and their instances. - -TEMPLATE_RELATIONS = YES - -# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT -# tags are set to YES then doxygen will generate a graph for each documented -# file showing the direct and indirect include dependencies of the file with -# other documented files. - -INCLUDE_GRAPH = YES - -# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and -# HAVE_DOT tags are set to YES then doxygen will generate a graph for each -# documented header file showing the documented files that directly or -# indirectly include this file. - -INCLUDED_BY_GRAPH = YES - -# If the CALL_GRAPH and HAVE_DOT tags are set to YES then doxygen will -# generate a call dependency graph for every global function or class method. -# Note that enabling this option will significantly increase the time of a run. -# So in most cases it will be better to enable call graphs for selected -# functions only using the \callgraph command. - -CALL_GRAPH = NO - -# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen -# will graphical hierarchy of all classes instead of a textual one. - -GRAPHICAL_HIERARCHY = YES - -# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images -# generated by dot. Possible values are png, jpg, or gif -# If left blank png will be used. - -DOT_IMAGE_FORMAT = png - -# The tag DOT_PATH can be used to specify the path where the dot tool can be -# found. If left blank, it is assumed the dot tool can be found on the path. - -DOT_PATH = - -# The DOTFILE_DIRS tag can be used to specify one or more directories that -# contain dot files that are included in the documentation (see the -# \dotfile command). - -DOTFILE_DIRS = - -# The MAX_DOT_GRAPH_WIDTH tag can be used to set the maximum allowed width -# (in pixels) of the graphs generated by dot. If a graph becomes larger than -# this value, doxygen will try to truncate the graph, so that it fits within -# the specified constraint. Beware that most browsers cannot cope with very -# large images. - -MAX_DOT_GRAPH_WIDTH = 1024 - -# The MAX_DOT_GRAPH_HEIGHT tag can be used to set the maximum allows height -# (in pixels) of the graphs generated by dot. If a graph becomes larger than -# this value, doxygen will try to truncate the graph, so that it fits within -# the specified constraint. Beware that most browsers cannot cope with very -# large images. - -MAX_DOT_GRAPH_HEIGHT = 1024 - -# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the -# graphs generated by dot. A depth value of 3 means that only nodes reachable -# from the root by following a path via at most 3 edges will be shown. Nodes that -# lay further from the root node will be omitted. Note that setting this option to -# 1 or 2 may greatly reduce the computation time needed for large code bases. Also -# note that a graph may be further truncated if the graph's image dimensions are -# not sufficient to fit the graph (see MAX_DOT_GRAPH_WIDTH and MAX_DOT_GRAPH_HEIGHT). -# If 0 is used for the depth value (the default), the graph is not depth-constrained. - -MAX_DOT_GRAPH_DEPTH = 0 - -# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will -# generate a legend page explaining the meaning of the various boxes and -# arrows in the dot generated graphs. - -GENERATE_LEGEND = YES - -# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will -# remove the intermediate dot files that are used to generate -# the various graphs. - -DOT_CLEANUP = YES - -#--------------------------------------------------------------------------- -# Configuration::addtions related to the search engine -#--------------------------------------------------------------------------- - -# The SEARCHENGINE tag specifies whether or not a search engine should be -# used. If set to NO the values of all tags below this one will be ignored. - -SEARCHENGINE = NO diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/main.dox b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/main.dox deleted file mode 100644 index 55ade927..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/main.dox +++ /dev/null @@ -1,103 +0,0 @@ - /* - * FreeRTOS Modbus Library: A Modbus serial implementation for FreeRTOS - * Copyright (C) 2006 Christian Walter - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * File: $Id: main.dox,v 1.16 2010/06/05 09:59:51 wolti Exp $ - */ - -/*! \mainpage FreeModbus - -\section intro Introduction - -The latest version of this document is available on http://freemodbus.berlios.de/api. - -FreeModbus is a Modbus ASCII/RTU and Modbus TCP implementation for embedded systems. It provides an implementation of the Modbus Application Protocol v1.1a and supports the RTU/ASCII transmission modes defined in the Modbus over serial line specification 1.0. Since version 0.7 FreeModbus also supports Modbus/TCP. Version 0.9 added the first Modbus/TCP port for embedded systems using the lwIP TCP/IP stack. - -\section into_port Ports - -\par Cortex M3 devices: - - Atmel AT91SAM3S. - -\par ARM devices: -- STR71X with FreeRTOS/GCC. See STR71X/simple2.c for an example. -- STR71TCP with FreeRTOS/lwIP/GCC. This port includes FreeRTOS, lwIP and a fully working PPP stack. The lwIP, PPP and FreeRTOS part is generic and therefore can be used for other ports ( or other projects ). -- LPC214X with Keil. See LPC214X/demo.c for an example. This port uses the Keil ARM Compiler 2.41. -- AT91SAM7X with FreeRTOS/Rowley. See AT91SAM7X_ROWLEY/demo.c for an example. - -\par AVR devices: -- ATMega8/16/32/128/168/169 with WinAVR. See AVR/demo.c for an example. - -\par Coldfire devices: -- MCF5235 with GCC. See MCF5235/demo.c for an example. -- MCF5235 with CodeWarrior and FreeRTOS port for ColdFire. See MCF5235CW/demo.c for an example. -- MCF5235/TCP with GCC. This port features FreeRTOS and the lwIP stack. The lwIP part is generic and therefore it should be used as a basis for other lwIP ports. - - -\par MSP430 devices -- MSP430F169 with Rowley Crossworks. See MSP430/demo.c for an example. -- MSP430F169 with GCC. See MSP430/demo.c for an example. - -\par Z8Encore devices -- Z8F6422 and Z8F1622 port. See Z8ENCORE/demo.c for an example. The port uses ZDS II - Z8 Encore! 4.10.1 as development environment. - -\par Win32: -- A Win32 Modbus RTU/ASCII Port. -- A Win32 Modbus/TCP Port. - -\par Linux: -- A Linux (uCLinux or other distributions) Modbus RTU/ASCII Port. -*/ - -/*! - \example STR71X/simple2.c - */ - -/*! - \example AT91SAM7X_ROWLEY/demo.c - */ - -/*! - \example STR71XTCP/demo.c - */ - -/*! - \example AVR/demo.c - */ - -/*! - \example MCF5235/demo.c - */ - -/*! - \example MCF5235TCP/demo.c - */ - -/*! - \example WIN32/demo.cpp - */ - -/*! - \example WIN32TCP/demo.cpp - */ - -/*! - \example LINUX/demo.c - */ - -/*! - \example MSP430/demo.c - */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/memory.ods b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/memory.ods deleted file mode 100644 index da87693cf1e42fc398b5ce2ecbb86db910e19693..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 11955 zcma)i1yo$ivNo>43GNO724`>*9D-|b8(^>j26stt3m#k(+ycRa2KV3&f#7bzf5^E< z?)~3=>(yF&cJJ=5s%u*IuIefk1$YE}m?x^khw{F&6$od4EI(Z+kCz?T4&?0N05WlK zumzi$ID;Yf09Si+c8CcS3}uHnfb7j7W-fLhduMj2gA>Ta9BKsuIjj7e%ttYQ5%yzA z0%C6gwsdj&Ee*;A`0r@cN3;sq%-O{W1pOBbLF~0hq|_>m;Jcs6P(=97(xqjrc-m@9+6<7MISKKL=4ra$xUKtc#dWMd zM=En5oK5|Gfyw;HAZW>C4o`Vx=ageP!=xrB4s|pl%(AAoWl+9onBY%Vk`L| zlk>+?q-bSzh5)1-(D0%{z^uEa2lY+D{-8&DQT+`a%lsAfd956RA(m-Jvn3OSH{kZL zRMd?1fHy7TTW*yVf3Er51bGkGLV4PMk=ICA`8LvKkFQ9%p}MAs|LkWte|BWTw;m79 zd3@cwGks)lFS) z(-bj*ic0XJEvRH9Et@8dnBE7W&I-tR%oG(Lz8`CiJ?Q&2Ia=~iDGx5~4yF=*jC{Mm zJ;2PyACpv@Y-9qiP}WB=}x!e zWn~2re#B3>F&h{!`u!p9q=Lr9mhi%H%8g)+@fkO%bdW`uUVzexAOBA`a|^F z7*fd!%9Y{U_k0D^io&6J&Z`C6HvMVyx6QVUP$UM9kx4FrUD#exsLGg5KYJ||*QQ#VO61(VcI!I58awjXvJI^`>Vcvd1 zNk7(FISU4TASZU{;~SwLTO;POYOm~~T>|DUId|9FoRu#k?SG5iWS-1T@qj(%UC5w^ zvcP*sXuHAN>vfaDTAF|E(T;*Gt>PIo^b5x}4=MiIvJ-A@&0A#rM!>7VwDn zNeJX2juFvag>@eozOu7dtltP~vbz1nqujlc<0zPykdcKpIlGA)+~(a$8I+UDhWCm3 zMhcqlPW=n=>Na5tTAc*0%<)RvQ3!fx#FKpeHP}N7(6y!>ccOi zcWn}imD~7)nzpf!oMbnoEFxlM*OVC^EsNn(Belz88!dYu*63M_13<0eO&uz%0mWFK zy*EB0xna0La`41xN;AEjwA>e zn*s^g$N>DvyORQ#ZWXlPz_+*@(rO$Raz$|1$xc)k{S9zL+D;rxW@=gn$B8;PGN+>; zL;R0uQ*)@juCyZ%NoxizJj=QwYhFn~eDKyxcRVIl^d#ozs6CjqHdl>gSt0vKNu;)e zWz9s`Mzfsrp{i(Jr!)31d0sWHL~I%tFvlNYh2bsUj~Im%%Lhh>eNsLh{XRTQGRIdO z=?~NrVkM>L#?F#!i*G~!A)xMZojq^01iPjqAycQq0`FMk>Rd&>C^3JGsb)MZET;MV zUK+UpF4PQz6h14Js2CGx*_i(OdvbB_U@;?D8os=+YJ3h`GQsfh5IzcRP0IxXZ;NTo z=eZD*u&{1~&>+2&%$Vdd!@P=Jr;w(r?~7i1J~>JrSQI21R2wiJgJ3<6{vVGI^ok3BZTwJL?zxZqE}0BG3l zuZ>z++)-buO`j(0H?fKEPws@fdN!;nsgmcAB7H$*(iH8aP|xdZmr;o>re#7^z!dpJ zplR61tZlGIcp{~lOcv)8ms_|Nch-{$R@boWiyk}()6@X><;(!i!>w6COTS7hM0ZQD zjEwGnd6Z-~I^k)*v3mzl+^$akD8Kxst>i;du`l;=z7@r7;>>~T%7EU-V)XbP=gPFo zhDL<83V2|F6*Ry|i@4ZOYxbAUbdt!_q7LC!8D3`%9a{IoRm|S8^40WmuZqHC84t4_ zrhy~AhKtYQHt)5xLUGOaV<~PWO)c{ajD|cd7unziP6@dl=hyn@aGI-z2rH56D|^Wh zL}PY=6a~3uB659Y7|qpTgcW_}v!P9-4QSBGDnHY5-doLsbfUKw4<6a2vR?6NC54z8 z8VGAUuV;na&bk%eXI19mdlc6^M_$f2T2ThC;TUP2&HuV@DBHPjxZZ*Y6-L6Z>0EBw zAsbP<;_r_fyB^d91~y^7gO)AyxeD!hdB=`P5af`rIBAyLmpC| zFV&fpVIKl%W-AiW;IC`l)2eSJa{$820j&+)F$5BF$P(D^SCzFdLc|b_rO5_mai0aM zEoP>{HzdHDuAQ_cuwkLK={s_0I~k8+`HHn2`aB=O;Sh87%{clYAmROHHaRDv;s6k4 zWxMH=XCUX)_V)cMDT+6I0EFrYBmZdoQD<7jVqEXeXUi%pq-fp}0T8BlBRr0d{YCOe zQC!}%0T8;QD1@)?@xR_#4|7r9a7j2QC~Xb2HgYXZ8yWPipML#VCswmv@*q8Mw>w*` zdJC8f_q?xY+I)alQ9wp9VEc%5i3|htMf=fk_-%yzPxb=ZqrCui_OJy(pUj0t9XrT8 zANKuMBkD?tF}QeodN6KNRUn)}73{9c*#`0`EY(V~=d#kUEd;-0KQ;n^}G`+Yk zd6w5I^i$L4!vjjRpZlR28b`e01k@)e%98RPU!{#iTTdZlKDV72yu-)PC*&DlsNxI4>)(FVXSNS0@nB~J-C)4z8O3RRf-hj$_>m;myQ|u zP)m{)s}>rmkRC`886uuTkz2&jmlcY`_S)hI zF`drig1uwzL_JoI<9NP2Svwitay{!%BMos6Cq5Q6DQ^a}(qLKlQKR=`+MJOkziK(? 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The recommended layout is to create a top level directory, e.g. demo/PLATFORM which hold the application and project files. In addition a subdirectory port should be created for the port specific files. -\verbatim -demo/PLATFORM/Makefile -demo/PLATFORM/main.c -demo/PLATFORM/port/portserial.c -demo/PLATFORM/port/porttimer.c -demo/PLATFORM/port/portother.c -demo/PLATFORM/port/port.h -\endverbatim -You can use demo/BARE as a starting point. Simply copy the directory and rename it to a name of your choice. - -\section sec_porting_types Platform specifics (port.h) -You should first check the file port.h and check the if the examples are already suitable for your platform. You must at least define the macros for enabling ENTER_CRITICAL_SECTION and disabling EXIT_CRITICAL_SECTION interrupts. - -\section sec_porting_timers Implementation of the timer functions (porttimer.c) -The Modbus protocol stacks needs a timer to detect the end of the frame. The timers should have a resolution of half the time of a serial character. For example for 38400 baud the character time is approx. 280us assuming 11bits for a single character. The smallest timeout used by the protocol stack is 3.5 times the character timeout. -

You should start by implementing the function xMBPortTimersInit( USHORT usTim1Timerout50us ) and vMBPortTimersEnable( ). Test the function with the following sample code: -\code -xMBPortTimersInit( 20 ); -vMBPortTimersEnable( ); -for( ;; ); -\endcode -Place a breakpoint or toggle an LED in the interrupt handler which calls pxMBPortCBTimerExpired. The ISR should occur approx. 1ms after the call to vMBPortTimersEnable(). You should also check that vMBPortTimersDisable( ) works as expected. -

-\note If you use Modbus ASCII the timers are in the range of seconds because the timeouts are much larger there. Make sure you can handle a value of 20000 for usTim1Timerout50us which corresponds to an one second timeout. See mbconfig.h for the value of the timeout defined by MB_ASCII_TIMEOUT_SEC. - -\section sec_porting_serial Implementation of the serial functions (portserial.c) -The serial porting layer must be capable of initializing the UART, disabling and enabling the receiver and transmitter components as well as performing callbacks if a character has been received or can be transmitted. You should start by implementing xMBPortSerialInit( UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) and vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ). -In addition you need to create two interrupt service routines for you communication devices. It is usually simpler to start with the receive interrupt. -

Create an interrupt handler for the receive interrupt, set a breakpoint there and check if xMBPortSerialGetByte( CHAR * pucByte ) correctly returns the character. This can be tested by the following code: -\code -/* Initialize COM device 0 with 38400 baud, 8 data bits and no parity. */ -if( xMBPortSerialInit( 0, 38400, 8, MB_PAR_NONE ) == FALSE ) -{ - fprintf(stderr, "error: com init failed"); -} -else -{ - /* Enable the receiver. */ - vMBPortSerialEnable( TRUE, FALSE ); - /* Now block. Any character received should cause an interrupt now. */ - for( ;; ); -} -\endcode -And your serial character received ISR should look like: -\code -static void prvvUARTTxReadyISR( void ) -{ - CHAR cByte; - ( void )xMBPortSerialGetByte( &cByte ); - /* Now cByte should contain the character received. */ -} -\endcode -

-

-Next you should check that the transmitter part is actually working as expected. Open a terminal program and simply call xMBPortSerialPutByte( 'a' ) in the transmit buffer empty ISR. If you use the sample code from below exactly 10 characters should be received. -\code -/* Initialize COM device 0 with 38400 baud, 8 data bits and no parity. */ -if( xMBPortSerialInit( 0, 38400, 8, MB_PAR_NONE ) == FALSE ) -{ - fprintf(stderr, "error: com init failed"); -} -else -{ - /* Enable the transmitter. */ - vMBPortSerialEnable( FALSE, TRUE ); - /* Now block. Any character received should cause an interrupt now. */ - for( ;; ); -} -\endcode -And you serial transmit buffer empty ISR should look like: -\code -static unsigned int uiCnt = 0; - -void prvvUARTTxReadyISR( void ) -{ - if( uiCnt++ < 10 ) - { - ( void )xMBPortSerialPutByte( 'a' ); - } - else - { - vMBPortSerialEnable( FALSE, FALSE ); - } -} -\endcode -

-

-If you are sure everything works correctly change the interrupt routines back to the examples shown in portserial.c -

- -\section sec_porting_event Implementing the event queue (portevent.c) -If you are not using an operating system the port is already finished and the demo application should work as expected. If you in the luck of having an operating system usage of the FreeModbus protocol stack differs in the following way: - - - Create another task at startup which calls eMBPoll( ) in a loop. This should look like: - \code -for( ;; ) -{ - ( void )eMBPoll( ); -} - \endcode - See the STR71x port for an FreeRTOS example. - - - Change the function xMBPortEventPost to post an event to a queue. Note that this function will be called from an ISR so check your RTOS documentation for that. - - - Change the xMBPortEventGet to retrieve an event from that queue. The function eMBPoll periodically calls it. The function should block until an event has been posted to the queue. - -In addition the serial and timer interrupt function must be modified. Whenever the protocol handler callback functions pxMBFrameCBByteReceived, pxMBFrameCBTransmitterEmpty and pxMBPortCBTimerExpired return TRUE a context switch should be made after exiting the ISR because an event has been posted to the queue. Forgetting to do this will result in slow performance of the protocol stack. -*/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/tips.dox b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/tips.dox deleted file mode 100644 index e3f1b43e..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/doc/tips.dox +++ /dev/null @@ -1,33 +0,0 @@ -/*! \page sec_tips Tips - -This page provides some tips for using the FreeModbus protocol stack. - -\section sec_tips_memory Reducing memory requirements -The memory requirements of FreeModbus can be tuned in the following way. These are basic tricks and can easily be done: - - - Decided if you need RTU, ASCII and TCP at the same time. If not disable - them in the file mbconfig.h by settings the respective options - MB_RTU_ENABLED, MB_ASCII_ENABLED and MB_TCP_ENABLED to zero. - - If you don't need all Modbus functions disable them in the file mbconfig.h. - This will reduce code requirements. - - Set the variable MB_FUNC_HANDLERS_MAX in mbconfig.h to the number - of functions codes you want to support. - -If you have stronger limits you can also try the following options. Note that this options have an impact on the features of the protocol stack. - - - Use some compiler directive to put the mapping of function codes to - handler functions into the flash memory of you CPU. You can find this - table in the file mb.c at the top of the file. The static variable is - named xFuncHandlers. - - - Reduce the size of the RTU buffer. In this case longer frames will - result in an error (Your device will drop all these frames). This is - possible if you will never get read/write requests with that number - of registers or your total amount of registers is small anyway. - - - You could also remove some function pointers which make the protocol - stack configurable and replace them by the functions itself. For - example if you only want to use RTU remove the callback functions from - the porting layer and fill in the appropriate calls. This will save - the space for all function pointers. -*/ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/gpl.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/gpl.txt deleted file mode 100644 index 3912109b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/gpl.txt +++ /dev/null @@ -1,340 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc. - 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. By contrast, the GNU General Public -License is intended to guarantee your freedom to share and change free -software--to make sure the software is free for all its users. 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Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "stdlib.h" -#include "string.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "mod_port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbconfig.h" -#include "mbascii.h" -#include "mbframe.h" - -#include "mbcrc.h" -#include "mbport.h" - -#if MB_ASCII_ENABLED > 0 - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_ASCII_DEFAULT_CR '\r' /*!< Default CR character for Modbus ASCII. */ -#define MB_ASCII_DEFAULT_LF '\n' /*!< Default LF character for Modbus ASCII. */ -#define MB_SER_PDU_SIZE_MIN 3 /*!< Minimum size of a Modbus ASCII frame. */ -#define MB_SER_PDU_SIZE_MAX 256 /*!< Maximum size of a Modbus ASCII frame. */ -#define MB_SER_PDU_SIZE_LRC 1 /*!< Size of LRC field in PDU. */ -#define MB_SER_PDU_ADDR_OFF 0 /*!< Offset of slave address in Ser-PDU. */ -#define MB_SER_PDU_PDU_OFF 1 /*!< Offset of Modbus-PDU in Ser-PDU. */ - -/* ----------------------- Type definitions ---------------------------------*/ -typedef enum -{ - STATE_RX_IDLE, /*!< Receiver is in idle state. */ - STATE_RX_RCV, /*!< Frame is beeing received. */ - STATE_RX_WAIT_EOF /*!< Wait for End of Frame. */ -} eMBRcvState; - -typedef enum -{ - STATE_TX_IDLE, /*!< Transmitter is in idle state. */ - STATE_TX_START, /*!< Starting transmission (':' sent). */ - STATE_TX_DATA, /*!< Sending of data (Address, Data, LRC). */ - STATE_TX_END, /*!< End of transmission. */ - STATE_TX_NOTIFY /*!< Notify sender that the frame has been sent. */ -} eMBSndState; - -typedef enum -{ - BYTE_HIGH_NIBBLE, /*!< Character for high nibble of byte. */ - BYTE_LOW_NIBBLE /*!< Character for low nibble of byte. */ -} eMBBytePos; - -/* ----------------------- Static functions ---------------------------------*/ -static UCHAR prvucMBCHAR2BIN( UCHAR ucCharacter ); - -static UCHAR prvucMBBIN2CHAR( UCHAR ucByte ); - -static UCHAR prvucMBLRC( UCHAR * pucFrame, USHORT usLen ); - -/* ----------------------- Static variables ---------------------------------*/ -static volatile eMBSndState eSndState; -static volatile eMBRcvState eRcvState; - -/* We reuse the Modbus RTU buffer because only one buffer is needed and the - * RTU buffer is bigger. */ -extern volatile UCHAR ucRTUBuf[]; -static volatile UCHAR *ucASCIIBuf = ucRTUBuf; - -static volatile USHORT usRcvBufferPos; -static volatile eMBBytePos eBytePos; - -static volatile UCHAR *pucSndBufferCur; -static volatile USHORT usSndBufferCount; - -static volatile UCHAR ucLRC; -static volatile UCHAR ucMBLFCharacter; - -/* ----------------------- Start implementation -----------------------------*/ -eMBErrorCode -eMBASCIIInit( UCHAR ucSlaveAddress, UCHAR ucPort, ULONG ulBaudRate, eMBParity eParity ) -{ - eMBErrorCode eStatus = MB_ENOERR; - ( void )ucSlaveAddress; - - ENTER_CRITICAL_SECTION( ); - ucMBLFCharacter = MB_ASCII_DEFAULT_LF; - - if( xMBPortSerialInit( ucPort, ulBaudRate, 7, eParity ) != TRUE ) - { - eStatus = MB_EPORTERR; - } - else if( xMBPortTimersInit( MB_ASCII_TIMEOUT_SEC * 20000UL ) != TRUE ) - { - eStatus = MB_EPORTERR; - } - - EXIT_CRITICAL_SECTION( ); - - return eStatus; -} - -void -eMBASCIIStart( void ) -{ - ENTER_CRITICAL_SECTION( ); - vMBPortSerialEnable( TRUE, FALSE ); - eRcvState = STATE_RX_IDLE; - EXIT_CRITICAL_SECTION( ); - - /* No special startup required for ASCII. */ - ( void )xMBPortEventPost( EV_READY ); -} - -void -eMBASCIIStop( void ) -{ - ENTER_CRITICAL_SECTION( ); - vMBPortSerialEnable( FALSE, FALSE ); - vMBPortTimersDisable( ); - EXIT_CRITICAL_SECTION( ); -} - -eMBErrorCode -eMBASCIIReceive( UCHAR * pucRcvAddress, UCHAR ** pucFrame, USHORT * pusLength ) -{ - eMBErrorCode eStatus = MB_ENOERR; - - ENTER_CRITICAL_SECTION( ); - assert( usRcvBufferPos < MB_SER_PDU_SIZE_MAX ); - - /* Length and CRC check */ - if( ( usRcvBufferPos >= MB_SER_PDU_SIZE_MIN ) - && ( prvucMBLRC( ( UCHAR * ) ucASCIIBuf, usRcvBufferPos ) == 0 ) ) - { - /* Save the address field. All frames are passed to the upper layed - * and the decision if a frame is used is done there. - */ - *pucRcvAddress = ucASCIIBuf[MB_SER_PDU_ADDR_OFF]; - - /* Total length of Modbus-PDU is Modbus-Serial-Line-PDU minus - * size of address field and CRC checksum. - */ - *pusLength = ( USHORT )( usRcvBufferPos - MB_SER_PDU_PDU_OFF - MB_SER_PDU_SIZE_LRC ); - - /* Return the start of the Modbus PDU to the caller. */ - *pucFrame = ( UCHAR * ) & ucASCIIBuf[MB_SER_PDU_PDU_OFF]; - } - else - { - eStatus = MB_EIO; - } - EXIT_CRITICAL_SECTION( ); - return eStatus; -} - -eMBErrorCode -eMBASCIISend( UCHAR ucSlaveAddress, const UCHAR * pucFrame, USHORT usLength ) -{ - eMBErrorCode eStatus = MB_ENOERR; - UCHAR usLRC; - - ENTER_CRITICAL_SECTION( ); - /* Check if the receiver is still in idle state. If not we where too - * slow with processing the received frame and the master sent another - * frame on the network. We have to abort sending the frame. - */ - if( eRcvState == STATE_RX_IDLE ) - { - /* First byte before the Modbus-PDU is the slave address. */ - pucSndBufferCur = ( UCHAR * ) pucFrame - 1; - usSndBufferCount = 1; - - /* Now copy the Modbus-PDU into the Modbus-Serial-Line-PDU. */ - pucSndBufferCur[MB_SER_PDU_ADDR_OFF] = ucSlaveAddress; - usSndBufferCount += usLength; - - /* Calculate LRC checksum for Modbus-Serial-Line-PDU. */ - usLRC = prvucMBLRC( ( UCHAR * ) pucSndBufferCur, usSndBufferCount ); - ucASCIIBuf[usSndBufferCount++] = usLRC; - - /* Activate the transmitter. */ - eSndState = STATE_TX_START; - vMBPortSerialEnable( FALSE, TRUE ); - } - else - { - eStatus = MB_EIO; - } - EXIT_CRITICAL_SECTION( ); - return eStatus; -} - -BOOL -xMBASCIIReceiveFSM( void ) -{ - BOOL xNeedPoll = FALSE; - UCHAR ucByte; - UCHAR ucResult; - - assert( eSndState == STATE_TX_IDLE ); - - ( void )xMBPortSerialGetByte( ( CHAR * ) & ucByte ); - switch ( eRcvState ) - { - /* A new character is received. If the character is a ':' the input - * buffer is cleared. A CR-character signals the end of the data - * block. Other characters are part of the data block and their - * ASCII value is converted back to a binary representation. - */ - case STATE_RX_RCV: - /* Enable timer for character timeout. */ - vMBPortTimersEnable( ); - if( ucByte == ':' ) - { - /* Empty receive buffer. */ - eBytePos = BYTE_HIGH_NIBBLE; - usRcvBufferPos = 0; - } - else if( ucByte == MB_ASCII_DEFAULT_CR ) - { - eRcvState = STATE_RX_WAIT_EOF; - } - else - { - ucResult = prvucMBCHAR2BIN( ucByte ); - switch ( eBytePos ) - { - /* High nibble of the byte comes first. We check for - * a buffer overflow here. */ - case BYTE_HIGH_NIBBLE: - if( usRcvBufferPos < MB_SER_PDU_SIZE_MAX ) - { - ucASCIIBuf[usRcvBufferPos] = ( UCHAR )( ucResult << 4 ); - eBytePos = BYTE_LOW_NIBBLE; - break; - } - else - { - /* not handled in Modbus specification but seems - * a resonable implementation. */ - eRcvState = STATE_RX_IDLE; - /* Disable previously activated timer because of error state. */ - vMBPortTimersDisable( ); - } - break; - - case BYTE_LOW_NIBBLE: - ucASCIIBuf[usRcvBufferPos] |= ucResult; - usRcvBufferPos++; - eBytePos = BYTE_HIGH_NIBBLE; - break; - } - } - break; - - case STATE_RX_WAIT_EOF: - if( ucByte == ucMBLFCharacter ) - { - /* Disable character timeout timer because all characters are - * received. */ - vMBPortTimersDisable( ); - /* Receiver is again in idle state. */ - eRcvState = STATE_RX_IDLE; - - /* Notify the caller of eMBASCIIReceive that a new frame - * was received. */ - xNeedPoll = xMBPortEventPost( EV_FRAME_RECEIVED ); - } - else if( ucByte == ':' ) - { - /* Empty receive buffer and back to receive state. */ - eBytePos = BYTE_HIGH_NIBBLE; - usRcvBufferPos = 0; - eRcvState = STATE_RX_RCV; - - /* Enable timer for character timeout. */ - vMBPortTimersEnable( ); - } - else - { - /* Frame is not okay. Delete entire frame. */ - eRcvState = STATE_RX_IDLE; - } - break; - - case STATE_RX_IDLE: - if( ucByte == ':' ) - { - /* Enable timer for character timeout. */ - vMBPortTimersEnable( ); - /* Reset the input buffers to store the frame. */ - usRcvBufferPos = 0;; - eBytePos = BYTE_HIGH_NIBBLE; - eRcvState = STATE_RX_RCV; - } - break; - } - - return xNeedPoll; -} - -BOOL -xMBASCIITransmitFSM( void ) -{ - BOOL xNeedPoll = FALSE; - UCHAR ucByte; - - assert( eRcvState == STATE_RX_IDLE ); - switch ( eSndState ) - { - /* Start of transmission. The start of a frame is defined by sending - * the character ':'. */ - case STATE_TX_START: - ucByte = ':'; - xMBPortSerialPutByte( ( CHAR )ucByte ); - eSndState = STATE_TX_DATA; - eBytePos = BYTE_HIGH_NIBBLE; - break; - - /* Send the data block. Each data byte is encoded as a character hex - * stream with the high nibble sent first and the low nibble sent - * last. If all data bytes are exhausted we send a '\r' character - * to end the transmission. */ - case STATE_TX_DATA: - if( usSndBufferCount > 0 ) - { - switch ( eBytePos ) - { - case BYTE_HIGH_NIBBLE: - ucByte = prvucMBBIN2CHAR( ( UCHAR )( *pucSndBufferCur >> 4 ) ); - xMBPortSerialPutByte( ( CHAR ) ucByte ); - eBytePos = BYTE_LOW_NIBBLE; - break; - - case BYTE_LOW_NIBBLE: - ucByte = prvucMBBIN2CHAR( ( UCHAR )( *pucSndBufferCur & 0x0F ) ); - xMBPortSerialPutByte( ( CHAR )ucByte ); - pucSndBufferCur++; - eBytePos = BYTE_HIGH_NIBBLE; - usSndBufferCount--; - break; - } - } - else - { - xMBPortSerialPutByte( MB_ASCII_DEFAULT_CR ); - eSndState = STATE_TX_END; - } - break; - - /* Finish the frame by sending a LF character. */ - case STATE_TX_END: - xMBPortSerialPutByte( ( CHAR )ucMBLFCharacter ); - /* We need another state to make sure that the CR character has - * been sent. */ - eSndState = STATE_TX_NOTIFY; - break; - - /* Notify the task which called eMBASCIISend that the frame has - * been sent. */ - case STATE_TX_NOTIFY: - eSndState = STATE_TX_IDLE; - xNeedPoll = xMBPortEventPost( EV_FRAME_SENT ); - - /* Disable transmitter. This prevents another transmit buffer - * empty interrupt. */ - vMBPortSerialEnable( TRUE, FALSE ); - eSndState = STATE_TX_IDLE; - break; - - /* We should not get a transmitter event if the transmitter is in - * idle state. */ - case STATE_TX_IDLE: - /* enable receiver/disable transmitter. */ - vMBPortSerialEnable( TRUE, FALSE ); - break; - } - - return xNeedPoll; -} - -BOOL -xMBASCIITimerT1SExpired( void ) -{ - switch ( eRcvState ) - { - /* If we have a timeout we go back to the idle state and wait for - * the next frame. - */ - case STATE_RX_RCV: - case STATE_RX_WAIT_EOF: - eRcvState = STATE_RX_IDLE; - break; - - default: - assert( ( eRcvState == STATE_RX_RCV ) || ( eRcvState == STATE_RX_WAIT_EOF ) ); - break; - } - vMBPortTimersDisable( ); - - /* no context switch required. */ - return FALSE; -} - - -static UCHAR -prvucMBCHAR2BIN( UCHAR ucCharacter ) -{ - if( ( ucCharacter >= '0' ) && ( ucCharacter <= '9' ) ) - { - return ( UCHAR )( ucCharacter - '0' ); - } - else if( ( ucCharacter >= 'A' ) && ( ucCharacter <= 'F' ) ) - { - return ( UCHAR )( ucCharacter - 'A' + 0x0A ); - } - else - { - return 0xFF; - } -} - -static UCHAR -prvucMBBIN2CHAR( UCHAR ucByte ) -{ - if( ucByte <= 0x09 ) - { - return ( UCHAR )( '0' + ucByte ); - } - else if( ( ucByte >= 0x0A ) && ( ucByte <= 0x0F ) ) - { - return ( UCHAR )( ucByte - 0x0A + 'A' ); - } - else - { - /* Programming error. */ - assert( 0 ); - } - return '0'; -} - - -static UCHAR -prvucMBLRC( UCHAR * pucFrame, USHORT usLen ) -{ - UCHAR ucLRC = 0; /* LRC char initialized */ - - while( usLen-- ) - { - ucLRC += *pucFrame++; /* Add buffer byte without carry */ - } - - /* Return twos complement */ - ucLRC = ( UCHAR ) ( -( ( CHAR ) ucLRC ) ); - return ucLRC; -} - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/ascii/mbascii.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/ascii/mbascii.h deleted file mode 100644 index 20975e29..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/ascii/mbascii.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _MB_ASCII_H -#define _MB_ASCII_H - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif - -#if MB_ASCII_ENABLED > 0 -eMBErrorCode eMBASCIIInit( UCHAR slaveAddress, UCHAR ucPort, - ULONG ulBaudRate, eMBParity eParity ); -void eMBASCIIStart( void ); -void eMBASCIIStop( void ); - -eMBErrorCode eMBASCIIReceive( UCHAR * pucRcvAddress, UCHAR ** pucFrame, - USHORT * pusLength ); -eMBErrorCode eMBASCIISend( UCHAR slaveAddress, const UCHAR * pucFrame, - USHORT usLength ); -BOOL xMBASCIIReceiveFSM( void ); -BOOL xMBASCIITransmitFSM( void ); -BOOL xMBASCIITimerT1SExpired( void ); -#endif - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfunccoils.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfunccoils.c deleted file mode 100644 index 0859318f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfunccoils.c +++ /dev/null @@ -1,269 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "stdlib.h" -#include "string.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "mod_port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbframe.h" -#include "mbproto.h" -#include "mbconfig.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_PDU_FUNC_READ_ADDR_OFF ( MB_PDU_DATA_OFF ) -#define MB_PDU_FUNC_READ_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 ) -#define MB_PDU_FUNC_READ_SIZE ( 4 ) -#define MB_PDU_FUNC_READ_COILCNT_MAX ( 0x07D0 ) - -#define MB_PDU_FUNC_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF ) -#define MB_PDU_FUNC_WRITE_VALUE_OFF ( MB_PDU_DATA_OFF + 2 ) -#define MB_PDU_FUNC_WRITE_SIZE ( 4 ) - -#define MB_PDU_FUNC_WRITE_MUL_ADDR_OFF ( MB_PDU_DATA_OFF ) -#define MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 ) -#define MB_PDU_FUNC_WRITE_MUL_BYTECNT_OFF ( MB_PDU_DATA_OFF + 4 ) -#define MB_PDU_FUNC_WRITE_MUL_VALUES_OFF ( MB_PDU_DATA_OFF + 5 ) -#define MB_PDU_FUNC_WRITE_MUL_SIZE_MIN ( 5 ) -#define MB_PDU_FUNC_WRITE_MUL_COILCNT_MAX ( 0x07B0 ) - -/* ----------------------- Static functions ---------------------------------*/ -eMBException prveMBError2Exception( eMBErrorCode eErrorCode ); - -/* ----------------------- Start implementation -----------------------------*/ - -#if MB_FUNC_READ_COILS_ENABLED > 0 - -eMBException -eMBFuncReadCoils( UCHAR * pucFrame, USHORT * usLen ) -{ - USHORT usRegAddress; - USHORT usCoilCount; - UCHAR ucNBytes; - UCHAR *pucFrameCur; - - eMBException eStatus = MB_EX_NONE; - eMBErrorCode eRegStatus; - - if( *usLen == ( MB_PDU_FUNC_READ_SIZE + MB_PDU_SIZE_MIN ) ) - { - usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF] << 8 ); - usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF + 1] ); - usRegAddress++; - - usCoilCount = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_COILCNT_OFF] << 8 ); - usCoilCount |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_COILCNT_OFF + 1] ); - - /* Check if the number of registers to read is valid. If not - * return Modbus illegal data value exception. - */ - if( ( usCoilCount >= 1 ) && - ( usCoilCount < MB_PDU_FUNC_READ_COILCNT_MAX ) ) - { - /* Set the current PDU data pointer to the beginning. */ - pucFrameCur = &pucFrame[MB_PDU_FUNC_OFF]; - *usLen = MB_PDU_FUNC_OFF; - - /* First byte contains the function code. */ - *pucFrameCur++ = MB_FUNC_READ_COILS; - *usLen += 1; - - /* Test if the quantity of coils is a multiple of 8. If not last - * byte is only partially field with unused coils set to zero. */ - if( ( usCoilCount & 0x0007 ) != 0 ) - { - ucNBytes = ( UCHAR )( usCoilCount / 8 + 1 ); - } - else - { - ucNBytes = ( UCHAR )( usCoilCount / 8 ); - } - *pucFrameCur++ = ucNBytes; - *usLen += 1; - - eRegStatus = - eMBRegCoilsCB( pucFrameCur, usRegAddress, usCoilCount, - MB_REG_READ ); - - /* If an error occured convert it into a Modbus exception. */ - if( eRegStatus != MB_ENOERR ) - { - eStatus = prveMBError2Exception( eRegStatus ); - } - else - { - /* The response contains the function code, the starting address - * and the quantity of registers. We reuse the old values in the - * buffer because they are still valid. */ - *usLen += ucNBytes;; - } - } - else - { - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - } - else - { - /* Can't be a valid read coil register request because the length - * is incorrect. */ - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - return eStatus; -} - -#if MB_FUNC_WRITE_COIL_ENABLED > 0 -eMBException -eMBFuncWriteCoil( UCHAR * pucFrame, USHORT * usLen ) -{ - USHORT usRegAddress; - UCHAR ucBuf[2]; - - eMBException eStatus = MB_EX_NONE; - eMBErrorCode eRegStatus; - - if( *usLen == ( MB_PDU_FUNC_WRITE_SIZE + MB_PDU_SIZE_MIN ) ) - { - usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF] << 8 ); - usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF + 1] ); - usRegAddress++; - - if( ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF + 1] == 0x00 ) && - ( ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0xFF ) || - ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0x00 ) ) ) - { - ucBuf[1] = 0; - if( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0xFF ) - { - ucBuf[0] = 1; - } - else - { - ucBuf[0] = 0; - } - eRegStatus = - eMBRegCoilsCB( &ucBuf[0], usRegAddress, 1, MB_REG_WRITE ); - - /* If an error occured convert it into a Modbus exception. */ - if( eRegStatus != MB_ENOERR ) - { - eStatus = prveMBError2Exception( eRegStatus ); - } - } - else - { - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - } - else - { - /* Can't be a valid write coil register request because the length - * is incorrect. */ - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - return eStatus; -} - -#endif - -#if MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED > 0 -eMBException -eMBFuncWriteMultipleCoils( UCHAR * pucFrame, USHORT * usLen ) -{ - USHORT usRegAddress; - USHORT usCoilCnt; - UCHAR ucByteCount; - UCHAR ucByteCountVerify; - - eMBException eStatus = MB_EX_NONE; - eMBErrorCode eRegStatus; - - if( *usLen > ( MB_PDU_FUNC_WRITE_SIZE + MB_PDU_SIZE_MIN ) ) - { - usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF] << 8 ); - usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF + 1] ); - usRegAddress++; - - usCoilCnt = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF] << 8 ); - usCoilCnt |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF + 1] ); - - ucByteCount = pucFrame[MB_PDU_FUNC_WRITE_MUL_BYTECNT_OFF]; - - /* Compute the number of expected bytes in the request. */ - if( ( usCoilCnt & 0x0007 ) != 0 ) - { - ucByteCountVerify = ( UCHAR )( usCoilCnt / 8 + 1 ); - } - else - { - ucByteCountVerify = ( UCHAR )( usCoilCnt / 8 ); - } - - if( ( usCoilCnt >= 1 ) && - ( usCoilCnt <= MB_PDU_FUNC_WRITE_MUL_COILCNT_MAX ) && - ( ucByteCountVerify == ucByteCount ) ) - { - eRegStatus = - eMBRegCoilsCB( &pucFrame[MB_PDU_FUNC_WRITE_MUL_VALUES_OFF], - usRegAddress, usCoilCnt, MB_REG_WRITE ); - - /* If an error occured convert it into a Modbus exception. */ - if( eRegStatus != MB_ENOERR ) - { - eStatus = prveMBError2Exception( eRegStatus ); - } - else - { - /* The response contains the function code, the starting address - * and the quantity of registers. We reuse the old values in the - * buffer because they are still valid. */ - *usLen = MB_PDU_FUNC_WRITE_MUL_BYTECNT_OFF; - } - } - else - { - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - } - else - { - /* Can't be a valid write coil register request because the length - * is incorrect. */ - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - return eStatus; -} - -#endif - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncdiag.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncdiag.c deleted file mode 100644 index 8c32e85b..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncdiag.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncdisc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncdisc.c deleted file mode 100644 index d6f36a87..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncdisc.c +++ /dev/null @@ -1,133 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "stdlib.h" -#include "string.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "mod_port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbframe.h" -#include "mbproto.h" -#include "mbconfig.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_PDU_FUNC_READ_ADDR_OFF ( MB_PDU_DATA_OFF ) -#define MB_PDU_FUNC_READ_DISCCNT_OFF ( MB_PDU_DATA_OFF + 2 ) -#define MB_PDU_FUNC_READ_SIZE ( 4 ) -#define MB_PDU_FUNC_READ_DISCCNT_MAX ( 0x07D0 ) - -/* ----------------------- Static functions ---------------------------------*/ -eMBException prveMBError2Exception( eMBErrorCode eErrorCode ); - -/* ----------------------- Start implementation -----------------------------*/ - -#if MB_FUNC_READ_COILS_ENABLED > 0 - -eMBException -eMBFuncReadDiscreteInputs( UCHAR * pucFrame, USHORT * usLen ) -{ - USHORT usRegAddress; - USHORT usDiscreteCnt; - UCHAR ucNBytes; - UCHAR *pucFrameCur; - - eMBException eStatus = MB_EX_NONE; - eMBErrorCode eRegStatus; - - if( *usLen == ( MB_PDU_FUNC_READ_SIZE + MB_PDU_SIZE_MIN ) ) - { - usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF] << 8 ); - usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF + 1] ); - usRegAddress++; - - usDiscreteCnt = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_DISCCNT_OFF] << 8 ); - usDiscreteCnt |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_DISCCNT_OFF + 1] ); - - /* Check if the number of registers to read is valid. If not - * return Modbus illegal data value exception. - */ - if( ( usDiscreteCnt >= 1 ) && - ( usDiscreteCnt < MB_PDU_FUNC_READ_DISCCNT_MAX ) ) - { - /* Set the current PDU data pointer to the beginning. */ - pucFrameCur = &pucFrame[MB_PDU_FUNC_OFF]; - *usLen = MB_PDU_FUNC_OFF; - - /* First byte contains the function code. */ - *pucFrameCur++ = MB_FUNC_READ_DISCRETE_INPUTS; - *usLen += 1; - - /* Test if the quantity of coils is a multiple of 8. If not last - * byte is only partially field with unused coils set to zero. */ - if( ( usDiscreteCnt & 0x0007 ) != 0 ) - { - ucNBytes = ( UCHAR ) ( usDiscreteCnt / 8 + 1 ); - } - else - { - ucNBytes = ( UCHAR ) ( usDiscreteCnt / 8 ); - } - *pucFrameCur++ = ucNBytes; - *usLen += 1; - - eRegStatus = - eMBRegDiscreteCB( pucFrameCur, usRegAddress, usDiscreteCnt ); - - /* If an error occured convert it into a Modbus exception. */ - if( eRegStatus != MB_ENOERR ) - { - eStatus = prveMBError2Exception( eRegStatus ); - } - else - { - /* The response contains the function code, the starting address - * and the quantity of registers. We reuse the old values in the - * buffer because they are still valid. */ - *usLen += ucNBytes;; - } - } - else - { - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - } - else - { - /* Can't be a valid read coil register request because the length - * is incorrect. */ - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - return eStatus; -} - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncholding.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncholding.c deleted file mode 100644 index ddac166f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncholding.c +++ /dev/null @@ -1,307 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "stdlib.h" -#include "string.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "mod_port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbframe.h" -#include "mbproto.h" -#include "mbconfig.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_PDU_FUNC_READ_ADDR_OFF ( MB_PDU_DATA_OFF + 0) -#define MB_PDU_FUNC_READ_REGCNT_OFF ( MB_PDU_DATA_OFF + 2 ) -#define MB_PDU_FUNC_READ_SIZE ( 4 ) -#define MB_PDU_FUNC_READ_REGCNT_MAX ( 0x007D ) - -#define MB_PDU_FUNC_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF + 0) -#define MB_PDU_FUNC_WRITE_VALUE_OFF ( MB_PDU_DATA_OFF + 2 ) -#define MB_PDU_FUNC_WRITE_SIZE ( 4 ) - -#define MB_PDU_FUNC_WRITE_MUL_ADDR_OFF ( MB_PDU_DATA_OFF + 0 ) -#define MB_PDU_FUNC_WRITE_MUL_REGCNT_OFF ( MB_PDU_DATA_OFF + 2 ) -#define MB_PDU_FUNC_WRITE_MUL_BYTECNT_OFF ( MB_PDU_DATA_OFF + 4 ) -#define MB_PDU_FUNC_WRITE_MUL_VALUES_OFF ( MB_PDU_DATA_OFF + 5 ) -#define MB_PDU_FUNC_WRITE_MUL_SIZE_MIN ( 5 ) -#define MB_PDU_FUNC_WRITE_MUL_REGCNT_MAX ( 0x0078 ) - -#define MB_PDU_FUNC_READWRITE_READ_ADDR_OFF ( MB_PDU_DATA_OFF + 0 ) -#define MB_PDU_FUNC_READWRITE_READ_REGCNT_OFF ( MB_PDU_DATA_OFF + 2 ) -#define MB_PDU_FUNC_READWRITE_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF + 4 ) -#define MB_PDU_FUNC_READWRITE_WRITE_REGCNT_OFF ( MB_PDU_DATA_OFF + 6 ) -#define MB_PDU_FUNC_READWRITE_BYTECNT_OFF ( MB_PDU_DATA_OFF + 8 ) -#define MB_PDU_FUNC_READWRITE_WRITE_VALUES_OFF ( MB_PDU_DATA_OFF + 9 ) -#define MB_PDU_FUNC_READWRITE_SIZE_MIN ( 9 ) - -/* ----------------------- Static functions ---------------------------------*/ -eMBException prveMBError2Exception( eMBErrorCode eErrorCode ); - -/* ----------------------- Start implementation -----------------------------*/ - -#if MB_FUNC_WRITE_HOLDING_ENABLED > 0 - -eMBException -eMBFuncWriteHoldingRegister( UCHAR * pucFrame, USHORT * usLen ) -{ - USHORT usRegAddress; - eMBException eStatus = MB_EX_NONE; - eMBErrorCode eRegStatus; - - if( *usLen == ( MB_PDU_FUNC_WRITE_SIZE + MB_PDU_SIZE_MIN ) ) - { - usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF] << 8 ); - usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF + 1] ); - usRegAddress++; - - /* Make callback to update the value. */ - eRegStatus = eMBRegHoldingCB( &pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF], - usRegAddress, 1, MB_REG_WRITE ); - - /* If an error occured convert it into a Modbus exception. */ - if( eRegStatus != MB_ENOERR ) - { - eStatus = prveMBError2Exception( eRegStatus ); - } - } - else - { - /* Can't be a valid request because the length is incorrect. */ - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - return eStatus; -} -#endif - -#if MB_FUNC_WRITE_MULTIPLE_HOLDING_ENABLED > 0 -eMBException -eMBFuncWriteMultipleHoldingRegister( UCHAR * pucFrame, USHORT * usLen ) -{ - USHORT usRegAddress; - USHORT usRegCount; - UCHAR ucRegByteCount; - - eMBException eStatus = MB_EX_NONE; - eMBErrorCode eRegStatus; - - if( *usLen >= ( MB_PDU_FUNC_WRITE_MUL_SIZE_MIN + MB_PDU_SIZE_MIN ) ) - { - usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF] << 8 ); - usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF + 1] ); - usRegAddress++; - - usRegCount = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_REGCNT_OFF] << 8 ); - usRegCount |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_REGCNT_OFF + 1] ); - - ucRegByteCount = pucFrame[MB_PDU_FUNC_WRITE_MUL_BYTECNT_OFF]; - - if( ( usRegCount >= 1 ) && - ( usRegCount <= MB_PDU_FUNC_WRITE_MUL_REGCNT_MAX ) && - ( ucRegByteCount == ( UCHAR ) ( 2 * usRegCount ) ) ) - { - /* Make callback to update the register values. */ - eRegStatus = - eMBRegHoldingCB( &pucFrame[MB_PDU_FUNC_WRITE_MUL_VALUES_OFF], - usRegAddress, usRegCount, MB_REG_WRITE ); - - /* If an error occured convert it into a Modbus exception. */ - if( eRegStatus != MB_ENOERR ) - { - eStatus = prveMBError2Exception( eRegStatus ); - } - else - { - /* The response contains the function code, the starting - * address and the quantity of registers. We reuse the - * old values in the buffer because they are still valid. - */ - *usLen = MB_PDU_FUNC_WRITE_MUL_BYTECNT_OFF; - } - } - else - { - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - } - else - { - /* Can't be a valid request because the length is incorrect. */ - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - return eStatus; -} -#endif - -#if MB_FUNC_READ_HOLDING_ENABLED > 0 - -eMBException -eMBFuncReadHoldingRegister( UCHAR * pucFrame, USHORT * usLen ) -{ - USHORT usRegAddress; - USHORT usRegCount; - UCHAR *pucFrameCur; - - eMBException eStatus = MB_EX_NONE; - eMBErrorCode eRegStatus; - - if( *usLen == ( MB_PDU_FUNC_READ_SIZE + MB_PDU_SIZE_MIN ) ) - { - usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF] << 8 ); - usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF + 1] ); - usRegAddress++; - - usRegCount = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_REGCNT_OFF] << 8 ); - usRegCount = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_REGCNT_OFF + 1] ); - - /* Check if the number of registers to read is valid. If not - * return Modbus illegal data value exception. - */ - if( ( usRegCount >= 1 ) && ( usRegCount <= MB_PDU_FUNC_READ_REGCNT_MAX ) ) - { - /* Set the current PDU data pointer to the beginning. */ - pucFrameCur = &pucFrame[MB_PDU_FUNC_OFF]; - *usLen = MB_PDU_FUNC_OFF; - - /* First byte contains the function code. */ - *pucFrameCur++ = MB_FUNC_READ_HOLDING_REGISTER; - *usLen += 1; - - /* Second byte in the response contain the number of bytes. */ - *pucFrameCur++ = ( UCHAR ) ( usRegCount * 2 ); - *usLen += 1; - - /* Make callback to fill the buffer. */ - eRegStatus = eMBRegHoldingCB( pucFrameCur, usRegAddress, usRegCount, MB_REG_READ ); - /* If an error occured convert it into a Modbus exception. */ - if( eRegStatus != MB_ENOERR ) - { - eStatus = prveMBError2Exception( eRegStatus ); - } - else - { - *usLen += usRegCount * 2; - } - } - else - { - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - } - else - { - /* Can't be a valid request because the length is incorrect. */ - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - return eStatus; -} - -#endif - -#if MB_FUNC_READWRITE_HOLDING_ENABLED > 0 - -eMBException -eMBFuncReadWriteMultipleHoldingRegister( UCHAR * pucFrame, USHORT * usLen ) -{ - USHORT usRegReadAddress; - USHORT usRegReadCount; - USHORT usRegWriteAddress; - USHORT usRegWriteCount; - UCHAR ucRegWriteByteCount; - UCHAR *pucFrameCur; - - eMBException eStatus = MB_EX_NONE; - eMBErrorCode eRegStatus; - - if( *usLen >= ( MB_PDU_FUNC_READWRITE_SIZE_MIN + MB_PDU_SIZE_MIN ) ) - { - usRegReadAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_READ_ADDR_OFF] << 8U ); - usRegReadAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_READ_ADDR_OFF + 1] ); - usRegReadAddress++; - - usRegReadCount = ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_READ_REGCNT_OFF] << 8U ); - usRegReadCount |= ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_READ_REGCNT_OFF + 1] ); - - usRegWriteAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_WRITE_ADDR_OFF] << 8U ); - usRegWriteAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_WRITE_ADDR_OFF + 1] ); - usRegWriteAddress++; - - usRegWriteCount = ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_WRITE_REGCNT_OFF] << 8U ); - usRegWriteCount |= ( USHORT )( pucFrame[MB_PDU_FUNC_READWRITE_WRITE_REGCNT_OFF + 1] ); - - ucRegWriteByteCount = pucFrame[MB_PDU_FUNC_READWRITE_BYTECNT_OFF]; - - if( ( usRegReadCount >= 1 ) && ( usRegReadCount <= 0x7D ) && - ( usRegWriteCount >= 1 ) && ( usRegWriteCount <= 0x79 ) && - ( ( 2 * usRegWriteCount ) == ucRegWriteByteCount ) ) - { - /* Make callback to update the register values. */ - eRegStatus = eMBRegHoldingCB( &pucFrame[MB_PDU_FUNC_READWRITE_WRITE_VALUES_OFF], - usRegWriteAddress, usRegWriteCount, MB_REG_WRITE ); - - if( eRegStatus == MB_ENOERR ) - { - /* Set the current PDU data pointer to the beginning. */ - pucFrameCur = &pucFrame[MB_PDU_FUNC_OFF]; - *usLen = MB_PDU_FUNC_OFF; - - /* First byte contains the function code. */ - *pucFrameCur++ = MB_FUNC_READWRITE_MULTIPLE_REGISTERS; - *usLen += 1; - - /* Second byte in the response contain the number of bytes. */ - *pucFrameCur++ = ( UCHAR ) ( usRegReadCount * 2 ); - *usLen += 1; - - /* Make the read callback. */ - eRegStatus = - eMBRegHoldingCB( pucFrameCur, usRegReadAddress, usRegReadCount, MB_REG_READ ); - if( eRegStatus == MB_ENOERR ) - { - *usLen += 2 * usRegReadCount; - } - } - if( eRegStatus != MB_ENOERR ) - { - eStatus = prveMBError2Exception( eRegStatus ); - } - } - else - { - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - } - return eStatus; -} - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncinput.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncinput.c deleted file mode 100644 index b510de7f..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncinput.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "stdlib.h" -#include "string.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "mod_port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbframe.h" -#include "mbproto.h" -#include "mbconfig.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_PDU_FUNC_READ_ADDR_OFF ( MB_PDU_DATA_OFF ) -#define MB_PDU_FUNC_READ_REGCNT_OFF ( MB_PDU_DATA_OFF + 2 ) -#define MB_PDU_FUNC_READ_SIZE ( 4 ) -#define MB_PDU_FUNC_READ_REGCNT_MAX ( 0x007D ) - -#define MB_PDU_FUNC_READ_RSP_BYTECNT_OFF ( MB_PDU_DATA_OFF ) - -/* ----------------------- Static functions ---------------------------------*/ -eMBException prveMBError2Exception( eMBErrorCode eErrorCode ); - -/* ----------------------- Start implementation -----------------------------*/ -#if MB_FUNC_READ_INPUT_ENABLED > 0 - -eMBException -eMBFuncReadInputRegister( UCHAR * pucFrame, USHORT * usLen ) -{ - USHORT usRegAddress; - USHORT usRegCount; - UCHAR *pucFrameCur; - - eMBException eStatus = MB_EX_NONE; - eMBErrorCode eRegStatus; - - if( *usLen == ( MB_PDU_FUNC_READ_SIZE + MB_PDU_SIZE_MIN ) ) - { - usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF] << 8 ); - usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_ADDR_OFF + 1] ); - usRegAddress++; - - usRegCount = ( USHORT )( pucFrame[MB_PDU_FUNC_READ_REGCNT_OFF] << 8 ); - usRegCount |= ( USHORT )( pucFrame[MB_PDU_FUNC_READ_REGCNT_OFF + 1] ); - - /* Check if the number of registers to read is valid. If not - * return Modbus illegal data value exception. - */ - if( ( usRegCount >= 1 ) - && ( usRegCount < MB_PDU_FUNC_READ_REGCNT_MAX ) ) - { - /* Set the current PDU data pointer to the beginning. */ - pucFrameCur = &pucFrame[MB_PDU_FUNC_OFF]; - *usLen = MB_PDU_FUNC_OFF; - - /* First byte contains the function code. */ - *pucFrameCur++ = MB_FUNC_READ_INPUT_REGISTER; - *usLen += 1; - - /* Second byte in the response contain the number of bytes. */ - *pucFrameCur++ = ( UCHAR )( usRegCount * 2 ); - *usLen += 1; - - eRegStatus = - eMBRegInputCB( pucFrameCur, usRegAddress, usRegCount ); - - /* If an error occured convert it into a Modbus exception. */ - if( eRegStatus != MB_ENOERR ) - { - eStatus = prveMBError2Exception( eRegStatus ); - } - else - { - *usLen += usRegCount * 2; - } - } - else - { - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - } - else - { - /* Can't be a valid read input register request because the length - * is incorrect. */ - eStatus = MB_EX_ILLEGAL_DATA_VALUE; - } - return eStatus; -} - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncother.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncother.c deleted file mode 100644 index 77dc1d01..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbfuncother.c +++ /dev/null @@ -1,87 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "stdlib.h" -#include "string.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "mod_port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbframe.h" -#include "mbproto.h" -#include "mbconfig.h" - -#if MB_FUNC_OTHER_REP_SLAVEID_ENABLED > 0 - -/* ----------------------- Static variables ---------------------------------*/ -static UCHAR ucMBSlaveID[MB_FUNC_OTHER_REP_SLAVEID_BUF]; -static USHORT usMBSlaveIDLen; - -/* ----------------------- Start implementation -----------------------------*/ - -eMBErrorCode -eMBSetSlaveID( UCHAR ucSlaveID, BOOL xIsRunning, - UCHAR const *pucAdditional, USHORT usAdditionalLen ) -{ - eMBErrorCode eStatus = MB_ENOERR; - - /* the first byte and second byte in the buffer is reserved for - * the parameter ucSlaveID and the running flag. The rest of - * the buffer is available for additional data. */ - if( usAdditionalLen + 2 < MB_FUNC_OTHER_REP_SLAVEID_BUF ) - { - usMBSlaveIDLen = 0; - ucMBSlaveID[usMBSlaveIDLen++] = ucSlaveID; - ucMBSlaveID[usMBSlaveIDLen++] = ( UCHAR )( xIsRunning ? 0xFF : 0x00 ); - if( usAdditionalLen > 0 ) - { - memcpy( &ucMBSlaveID[usMBSlaveIDLen], pucAdditional, - ( size_t )usAdditionalLen ); - usMBSlaveIDLen += usAdditionalLen; - } - } - else - { - eStatus = MB_ENORES; - } - return eStatus; -} - -eMBException -eMBFuncReportSlaveID( UCHAR * pucFrame, USHORT * usLen ) -{ - memcpy( &pucFrame[MB_PDU_DATA_OFF], &ucMBSlaveID[0], ( size_t )usMBSlaveIDLen ); - *usLen = ( USHORT )( MB_PDU_DATA_OFF + usMBSlaveIDLen ); - return MB_EX_NONE; -} - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbutils.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbutils.c deleted file mode 100644 index 7bf688b1..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/functions/mbutils.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "stdlib.h" -#include "string.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "mod_port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbproto.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define BITS_UCHAR 8U - -/* ----------------------- Start implementation -----------------------------*/ -void -xMBUtilSetBits( UCHAR * ucByteBuf, USHORT usBitOffset, UCHAR ucNBits, - UCHAR ucValue ) -{ - USHORT usWordBuf; - USHORT usMask; - USHORT usByteOffset; - USHORT usNPreBits; - USHORT usValue = ucValue; - - assert( ucNBits <= 8 ); - assert( ( size_t )BITS_UCHAR == sizeof( UCHAR ) * 8 ); - - /* Calculate byte offset for first byte containing the bit values starting - * at usBitOffset. */ - usByteOffset = ( USHORT )( ( usBitOffset ) / BITS_UCHAR ); - - /* How many bits precede our bits to set. */ - usNPreBits = ( USHORT )( usBitOffset - usByteOffset * BITS_UCHAR ); - - /* Move bit field into position over bits to set */ - usValue <<= usNPreBits; - - /* Prepare a mask for setting the new bits. */ - usMask = ( USHORT )( ( 1 << ( USHORT ) ucNBits ) - 1 ); - usMask <<= usBitOffset - usByteOffset * BITS_UCHAR; - - /* copy bits into temporary storage. */ - usWordBuf = ucByteBuf[usByteOffset]; - usWordBuf |= ucByteBuf[usByteOffset + 1] << BITS_UCHAR; - - /* Zero out bit field bits and then or value bits into them. */ - usWordBuf = ( USHORT )( ( usWordBuf & ( ~usMask ) ) | usValue ); - - /* move bits back into storage */ - ucByteBuf[usByteOffset] = ( UCHAR )( usWordBuf & 0xFF ); - ucByteBuf[usByteOffset + 1] = ( UCHAR )( usWordBuf >> BITS_UCHAR ); -} - -UCHAR -xMBUtilGetBits( UCHAR * ucByteBuf, USHORT usBitOffset, UCHAR ucNBits ) -{ - USHORT usWordBuf; - USHORT usMask; - USHORT usByteOffset; - USHORT usNPreBits; - - /* Calculate byte offset for first byte containing the bit values starting - * at usBitOffset. */ - usByteOffset = ( USHORT )( ( usBitOffset ) / BITS_UCHAR ); - - /* How many bits precede our bits to set. */ - usNPreBits = ( USHORT )( usBitOffset - usByteOffset * BITS_UCHAR ); - - /* Prepare a mask for setting the new bits. */ - usMask = ( USHORT )( ( 1 << ( USHORT ) ucNBits ) - 1 ); - - /* copy bits into temporary storage. */ - usWordBuf = ucByteBuf[usByteOffset]; - usWordBuf |= ucByteBuf[usByteOffset + 1] << BITS_UCHAR; - - /* throw away unneeded bits. */ - usWordBuf >>= usNPreBits; - - /* mask away bits above the requested bitfield. */ - usWordBuf &= usMask; - - return ( UCHAR ) usWordBuf; -} - -eMBException -prveMBError2Exception( eMBErrorCode eErrorCode ) -{ - eMBException eStatus; - - switch ( eErrorCode ) - { - case MB_ENOERR: - eStatus = MB_EX_NONE; - break; - - case MB_ENOREG: - eStatus = MB_EX_ILLEGAL_DATA_ADDRESS; - break; - - case MB_ETIMEDOUT: - eStatus = MB_EX_SLAVE_BUSY; - break; - - default: - eStatus = MB_EX_SLAVE_DEVICE_FAILURE; - break; - } - - return eStatus; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mb.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mb.h deleted file mode 100644 index d3e1620a..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mb.h +++ /dev/null @@ -1,416 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _MB_H -#define _MB_H - -#include "mod_port.h" - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif - -#include "mbport.h" -#include "mbproto.h" - -/*! \defgroup modbus Modbus - * \code #include "mb.h" \endcode - * - * This module defines the interface for the application. It contains - * the basic functions and types required to use the Modbus protocol stack. - * A typical application will want to call eMBInit() first. If the device - * is ready to answer network requests it must then call eMBEnable() to activate - * the protocol stack. In the main loop the function eMBPoll() must be called - * periodically. The time interval between pooling depends on the configured - * Modbus timeout. If an RTOS is available a separate task should be created - * and the task should always call the function eMBPoll(). - * - * \code - * // Initialize protocol stack in RTU mode for a slave with address 10 = 0x0A - * eMBInit( MB_RTU, 0x0A, 38400, MB_PAR_EVEN ); - * // Enable the Modbus Protocol Stack. - * eMBEnable( ); - * for( ;; ) - * { - * // Call the main polling loop of the Modbus protocol stack. - * eMBPoll( ); - * ... - * } - * \endcode - */ - -/* ----------------------- Defines ------------------------------------------*/ - -/*! \ingroup modbus - * \brief Use the default Modbus TCP port (502) - */ -#define MB_TCP_PORT_USE_DEFAULT 0 - -/* ----------------------- Type definitions ---------------------------------*/ - -/*! \ingroup modbus - * \brief Modbus serial transmission modes (RTU/ASCII). - * - * Modbus serial supports two transmission modes. Either ASCII or RTU. RTU - * is faster but has more hardware requirements and requires a network with - * a low jitter. ASCII is slower and more reliable on slower links (E.g. modems) - */ - typedef enum -{ - MB_RTU, /*!< RTU transmission mode. */ - MB_ASCII, /*!< ASCII transmission mode. */ - MB_TCP /*!< TCP mode. */ -} eMBMode; - -/*! \ingroup modbus - * \brief If register should be written or read. - * - * This value is passed to the callback functions which support either - * reading or writing register values. Writing means that the application - * registers should be updated and reading means that the modbus protocol - * stack needs to know the current register values. - * - * \see eMBRegHoldingCB( ), eMBRegCoilsCB( ), eMBRegDiscreteCB( ) and - * eMBRegInputCB( ). - */ -typedef enum -{ - MB_REG_READ, /*!< Read register values and pass to protocol stack. */ - MB_REG_WRITE /*!< Update register values. */ -} eMBRegisterMode; - -/*! \ingroup modbus - * \brief Errorcodes used by all function in the protocol stack. - */ -typedef enum -{ - MB_ENOERR, /*!< no error. */ - MB_ENOREG, /*!< illegal register address. */ - MB_EINVAL, /*!< illegal argument. */ - MB_EPORTERR, /*!< porting layer error. */ - MB_ENORES, /*!< insufficient resources. */ - MB_EIO, /*!< I/O error. */ - MB_EILLSTATE, /*!< protocol stack in illegal state. */ - MB_ETIMEDOUT /*!< timeout error occurred. */ -} eMBErrorCode; - - -/* ----------------------- Function prototypes ------------------------------*/ -/*! \ingroup modbus - * \brief Initialize the Modbus protocol stack. - * - * This functions initializes the ASCII or RTU module and calls the - * init functions of the porting layer to prepare the hardware. Please - * note that the receiver is still disabled and no Modbus frames are - * processed until eMBEnable( ) has been called. - * - * \param eMode If ASCII or RTU mode should be used. - * \param ucSlaveAddress The slave address. Only frames sent to this - * address or to the broadcast address are processed. - * \param ucPort The port to use. E.g. 1 for COM1 on windows. This value - * is platform dependent and some ports simply choose to ignore it. - * \param ulBaudRate The baudrate. E.g. 19200. Supported baudrates depend - * on the porting layer. - * \param eParity Parity used for serial transmission. - * - * \return If no error occurs the function returns eMBErrorCode::MB_ENOERR. - * The protocol is then in the disabled state and ready for activation - * by calling eMBEnable( ). Otherwise one of the following error codes - * is returned: - * - eMBErrorCode::MB_EINVAL If the slave address was not valid. Valid - * slave addresses are in the range 1 - 247. - * - eMBErrorCode::MB_EPORTERR IF the porting layer returned an error. - */ -eMBErrorCode eMBInit( eMBMode eMode, UCHAR ucSlaveAddress, - UCHAR ucPort, ULONG ulBaudRate, eMBParity eParity ); - -/*! \ingroup modbus - * \brief Initialize the Modbus protocol stack for Modbus TCP. - * - * This function initializes the Modbus TCP Module. Please note that - * frame processing is still disabled until eMBEnable( ) is called. - * - * \param usTCPPort The TCP port to listen on. - * \return If the protocol stack has been initialized correctly the function - * returns eMBErrorCode::MB_ENOERR. Otherwise one of the following error - * codes is returned: - * - eMBErrorCode::MB_EINVAL If the slave address was not valid. Valid - * slave addresses are in the range 1 - 247. - * - eMBErrorCode::MB_EPORTERR IF the porting layer returned an error. - */ -eMBErrorCode eMBTCPInit( USHORT usTCPPort ); - -/*! \ingroup modbus - * \brief Release resources used by the protocol stack. - * - * This function disables the Modbus protocol stack and release all - * hardware resources. It must only be called when the protocol stack - * is disabled. - * - * \note Note all ports implement this function. A port which wants to - * get an callback must define the macro MB_PORT_HAS_CLOSE to 1. - * - * \return If the resources where released it return eMBErrorCode::MB_ENOERR. - * If the protocol stack is not in the disabled state it returns - * eMBErrorCode::MB_EILLSTATE. - */ -eMBErrorCode eMBClose( void ); - -/*! \ingroup modbus - * \brief Enable the Modbus protocol stack. - * - * This function enables processing of Modbus frames. Enabling the protocol - * stack is only possible if it is in the disabled state. - * - * \return If the protocol stack is now in the state enabled it returns - * eMBErrorCode::MB_ENOERR. If it was not in the disabled state it - * return eMBErrorCode::MB_EILLSTATE. - */ -eMBErrorCode eMBEnable( void ); - -/*! \ingroup modbus - * \brief Disable the Modbus protocol stack. - * - * This function disables processing of Modbus frames. - * - * \return If the protocol stack has been disabled it returns - * eMBErrorCode::MB_ENOERR. If it was not in the enabled state it returns - * eMBErrorCode::MB_EILLSTATE. - */ -eMBErrorCode eMBDisable( void ); - -/*! \ingroup modbus - * \brief The main pooling loop of the Modbus protocol stack. - * - * This function must be called periodically. The timer interval required - * is given by the application dependent Modbus slave timeout. Internally the - * function calls xMBPortEventGet() and waits for an event from the receiver or - * transmitter state machines. - * - * \return If the protocol stack is not in the enabled state the function - * returns eMBErrorCode::MB_EILLSTATE. Otherwise it returns - * eMBErrorCode::MB_ENOERR. - */ -eMBErrorCode eMBPoll( void ); - -/*! \ingroup modbus - * \brief Configure the slave id of the device. - * - * This function should be called when the Modbus function Report Slave ID - * is enabled ( By defining MB_FUNC_OTHER_REP_SLAVEID_ENABLED in mbconfig.h ). - * - * \param ucSlaveID Values is returned in the Slave ID byte of the - * Report Slave ID response. - * \param xIsRunning If TRUE the Run Indicator Status byte is set to 0xFF. - * otherwise the Run Indicator Status is 0x00. - * \param pucAdditional Values which should be returned in the Additional - * bytes of the Report Slave ID response. - * \param usAdditionalLen Length of the buffer pucAdditonal. - * - * \return If the static buffer defined by MB_FUNC_OTHER_REP_SLAVEID_BUF in - * mbconfig.h is to small it returns eMBErrorCode::MB_ENORES. Otherwise - * it returns eMBErrorCode::MB_ENOERR. - */ -eMBErrorCode eMBSetSlaveID( UCHAR ucSlaveID, BOOL xIsRunning, - UCHAR const *pucAdditional, - USHORT usAdditionalLen ); - -/*! \ingroup modbus - * \brief Registers a callback handler for a given function code. - * - * This function registers a new callback handler for a given function code. - * The callback handler supplied is responsible for interpreting the Modbus PDU and - * the creation of an appropriate response. In case of an error it should return - * one of the possible Modbus exceptions which results in a Modbus exception frame - * sent by the protocol stack. - * - * \param ucFunctionCode The Modbus function code for which this handler should - * be registers. Valid function codes are in the range 1 to 127. - * \param pxHandler The function handler which should be called in case - * such a frame is received. If \c NULL a previously registered function handler - * for this function code is removed. - * - * \return eMBErrorCode::MB_ENOERR if the handler has been installed. If no - * more resources are available it returns eMBErrorCode::MB_ENORES. In this - * case the values in mbconfig.h should be adjusted. If the argument was not - * valid it returns eMBErrorCode::MB_EINVAL. - */ -eMBErrorCode eMBRegisterCB( UCHAR ucFunctionCode, - pxMBFunctionHandler pxHandler ); - -/* ----------------------- Callback -----------------------------------------*/ - -/*! \defgroup modbus_registers Modbus Registers - * \code #include "mb.h" \endcode - * The protocol stack does not internally allocate any memory for the - * registers. This makes the protocol stack very small and also usable on - * low end targets. In addition the values don't have to be in the memory - * and could for example be stored in a flash.
- * Whenever the protocol stack requires a value it calls one of the callback - * function with the register address and the number of registers to read - * as an argument. The application should then read the actual register values - * (for example the ADC voltage) and should store the result in the supplied - * buffer.
- * If the protocol stack wants to update a register value because a write - * register function was received a buffer with the new register values is - * passed to the callback function. The function should then use these values - * to update the application register values. - */ - -/*! \ingroup modbus_registers - * \brief Callback function used if the value of a Input Register - * is required by the protocol stack. The starting register address is given - * by \c usAddress and the last register is given by usAddress + - * usNRegs - 1. - * - * \param pucRegBuffer A buffer where the callback function should write - * the current value of the modbus registers to. - * \param usAddress The starting address of the register. Input registers - * are in the range 1 - 65535. - * \param usNRegs Number of registers the callback function must supply. - * - * \return The function must return one of the following error codes: - * - eMBErrorCode::MB_ENOERR If no error occurred. In this case a normal - * Modbus response is sent. - * - eMBErrorCode::MB_ENOREG If the application can not supply values - * for registers within this range. In this case a - * ILLEGAL DATA ADDRESS exception frame is sent as a response. - * - eMBErrorCode::MB_ETIMEDOUT If the requested register block is - * currently not available and the application dependent response - * timeout would be violated. In this case a SLAVE DEVICE BUSY - * exception is sent as a response. - * - eMBErrorCode::MB_EIO If an unrecoverable error occurred. In this case - * a SLAVE DEVICE FAILURE exception is sent as a response. - */ -eMBErrorCode eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, - USHORT usNRegs ); - -/*! \ingroup modbus_registers - * \brief Callback function used if a Holding Register value is - * read or written by the protocol stack. The starting register address - * is given by \c usAddress and the last register is given by - * usAddress + usNRegs - 1. - * - * \param pucRegBuffer If the application registers values should be updated the - * buffer points to the new registers values. If the protocol stack needs - * to now the current values the callback function should write them into - * this buffer. - * \param usAddress The starting address of the register. - * \param usNRegs Number of registers to read or write. - * \param eMode If eMBRegisterMode::MB_REG_WRITE the application register - * values should be updated from the values in the buffer. For example - * this would be the case when the Modbus master has issued an - * WRITE SINGLE REGISTER command. - * If the value eMBRegisterMode::MB_REG_READ the application should copy - * the current values into the buffer \c pucRegBuffer. - * - * \return The function must return one of the following error codes: - * - eMBErrorCode::MB_ENOERR If no error occurred. In this case a normal - * Modbus response is sent. - * - eMBErrorCode::MB_ENOREG If the application can not supply values - * for registers within this range. In this case a - * ILLEGAL DATA ADDRESS exception frame is sent as a response. - * - eMBErrorCode::MB_ETIMEDOUT If the requested register block is - * currently not available and the application dependent response - * timeout would be violated. In this case a SLAVE DEVICE BUSY - * exception is sent as a response. - * - eMBErrorCode::MB_EIO If an unrecoverable error occurred. In this case - * a SLAVE DEVICE FAILURE exception is sent as a response. - */ -eMBErrorCode eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, - USHORT usNRegs, eMBRegisterMode eMode ); - -/*! \ingroup modbus_registers - * \brief Callback function used if a Coil Register value is - * read or written by the protocol stack. If you are going to use - * this function you might use the functions xMBUtilSetBits( ) and - * xMBUtilGetBits( ) for working with bitfields. - * - * \param pucRegBuffer The bits are packed in bytes where the first coil - * starting at address \c usAddress is stored in the LSB of the - * first byte in the buffer pucRegBuffer. - * If the buffer should be written by the callback function unused - * coil values (I.e. if not a multiple of eight coils is used) should be set - * to zero. - * \param usAddress The first coil number. - * \param usNCoils Number of coil values requested. - * \param eMode If eMBRegisterMode::MB_REG_WRITE the application values should - * be updated from the values supplied in the buffer \c pucRegBuffer. - * If eMBRegisterMode::MB_REG_READ the application should store the current - * values in the buffer \c pucRegBuffer. - * - * \return The function must return one of the following error codes: - * - eMBErrorCode::MB_ENOERR If no error occurred. In this case a normal - * Modbus response is sent. - * - eMBErrorCode::MB_ENOREG If the application does not map an coils - * within the requested address range. In this case a - * ILLEGAL DATA ADDRESS is sent as a response. - * - eMBErrorCode::MB_ETIMEDOUT If the requested register block is - * currently not available and the application dependent response - * timeout would be violated. In this case a SLAVE DEVICE BUSY - * exception is sent as a response. - * - eMBErrorCode::MB_EIO If an unrecoverable error occurred. In this case - * a SLAVE DEVICE FAILURE exception is sent as a response. - */ -eMBErrorCode eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, - USHORT usNCoils, eMBRegisterMode eMode ); - -/*! \ingroup modbus_registers - * \brief Callback function used if a Input Discrete Register value is - * read by the protocol stack. - * - * If you are going to use his function you might use the functions - * xMBUtilSetBits( ) and xMBUtilGetBits( ) for working with bitfields. - * - * \param pucRegBuffer The buffer should be updated with the current - * coil values. The first discrete input starting at \c usAddress must be - * stored at the LSB of the first byte in the buffer. If the requested number - * is not a multiple of eight the remaining bits should be set to zero. - * \param usAddress The starting address of the first discrete input. - * \param usNDiscrete Number of discrete input values. - * \return The function must return one of the following error codes: - * - eMBErrorCode::MB_ENOERR If no error occurred. In this case a normal - * Modbus response is sent. - * - eMBErrorCode::MB_ENOREG If no such discrete inputs exists. - * In this case a ILLEGAL DATA ADDRESS exception frame is sent - * as a response. - * - eMBErrorCode::MB_ETIMEDOUT If the requested register block is - * currently not available and the application dependent response - * timeout would be violated. In this case a SLAVE DEVICE BUSY - * exception is sent as a response. - * - eMBErrorCode::MB_EIO If an unrecoverable error occurred. In this case - * a SLAVE DEVICE FAILURE exception is sent as a response. - */ -eMBErrorCode eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, - USHORT usNDiscrete ); - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbconfig.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbconfig.h deleted file mode 100644 index 02615cb6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbconfig.h +++ /dev/null @@ -1,131 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _MB_CONFIG_H -#define _MB_CONFIG_H - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif -/* ----------------------- Defines ------------------------------------------*/ -/*! \defgroup modbus_cfg Modbus Configuration - * - * Most modules in the protocol stack are completly optional and can be - * excluded. This is specially important if target resources are very small - * and program memory space should be saved.
- * - * All of these settings are available in the file mbconfig.h - */ -/*! \addtogroup modbus_cfg - * @{ - */ -/*! \brief If Modbus ASCII support is enabled. */ -#define MB_ASCII_ENABLED ( 1 ) - -/*! \brief If Modbus RTU support is enabled. */ -#define MB_RTU_ENABLED ( 1 ) - -/*! \brief If Modbus TCP support is enabled. */ -#define MB_TCP_ENABLED ( 0 ) - -/*! \brief The character timeout value for Modbus ASCII. - * - * The character timeout value is not fixed for Modbus ASCII and is therefore - * a configuration option. It should be set to the maximum expected delay - * time of the network. - */ -#define MB_ASCII_TIMEOUT_SEC ( 1 ) - -/*! \brief Timeout to wait in ASCII prior to enabling transmitter. - * - * If defined the function calls vMBPortSerialDelay with the argument - * MB_ASCII_TIMEOUT_WAIT_BEFORE_SEND_MS to allow for a delay before - * the serial transmitter is enabled. This is required because some - * targets are so fast that there is no time between receiving and - * transmitting the frame. If the master is to slow with enabling its - * receiver then he will not receive the response correctly. - */ -#ifndef MB_ASCII_TIMEOUT_WAIT_BEFORE_SEND_MS -#define MB_ASCII_TIMEOUT_WAIT_BEFORE_SEND_MS ( 0 ) -#endif - -/*! \brief Maximum number of Modbus functions codes the protocol stack - * should support. - * - * The maximum number of supported Modbus functions must be greater than - * the sum of all enabled functions in this file and custom function - * handlers. If set to small adding more functions will fail. - */ -#define MB_FUNC_HANDLERS_MAX ( 16 ) - -/*! \brief Number of bytes which should be allocated for the Report Slave ID - * command. - * - * This number limits the maximum size of the additional segment in the - * report slave id function. See eMBSetSlaveID( ) for more information on - * how to set this value. It is only used if MB_FUNC_OTHER_REP_SLAVEID_ENABLED - * is set to 1. - */ -#define MB_FUNC_OTHER_REP_SLAVEID_BUF ( 32 ) - -/*! \brief If the Report Slave ID function should be enabled. */ -#define MB_FUNC_OTHER_REP_SLAVEID_ENABLED ( 1 ) - -/*! \brief If the Read Input Registers function should be enabled. */ -#define MB_FUNC_READ_INPUT_ENABLED ( 1 ) - -/*! \brief If the Read Holding Registers function should be enabled. */ -#define MB_FUNC_READ_HOLDING_ENABLED ( 1 ) - -/*! \brief If the Write Single Register function should be enabled. */ -#define MB_FUNC_WRITE_HOLDING_ENABLED ( 1 ) - -/*! \brief If the Write Multiple registers function should be enabled. */ -#define MB_FUNC_WRITE_MULTIPLE_HOLDING_ENABLED ( 1 ) - -/*! \brief If the Read Coils function should be enabled. */ -#define MB_FUNC_READ_COILS_ENABLED ( 1 ) - -/*! \brief If the Write Coils function should be enabled. */ -#define MB_FUNC_WRITE_COIL_ENABLED ( 1 ) - -/*! \brief If the Write Multiple Coils function should be enabled. */ -#define MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED ( 1 ) - -/*! \brief If the Read Discrete Inputs function should be enabled. */ -#define MB_FUNC_READ_DISCRETE_INPUTS_ENABLED ( 1 ) - -/*! \brief If the Read/Write Multiple Registers function should be enabled. */ -#define MB_FUNC_READWRITE_HOLDING_ENABLED ( 1 ) - -/*! @} */ -#ifdef __cplusplus - PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbframe.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbframe.h deleted file mode 100644 index 69a76989..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbframe.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _MB_FRAME_H -#define _MB_FRAME_H - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif - -/*! - * Constants which defines the format of a modbus frame. The example is - * shown for a Modbus RTU/ASCII frame. Note that the Modbus PDU is not - * dependent on the underlying transport. - * - * - * <------------------------ MODBUS SERIAL LINE PDU (1) -------------------> - * <----------- MODBUS PDU (1') ----------------> - * +-----------+---------------+----------------------------+-------------+ - * | Address | Function Code | Data | CRC/LRC | - * +-----------+---------------+----------------------------+-------------+ - * | | | | - * (2) (3/2') (3') (4) - * - * (1) ... MB_SER_PDU_SIZE_MAX = 256 - * (2) ... MB_SER_PDU_ADDR_OFF = 0 - * (3) ... MB_SER_PDU_PDU_OFF = 1 - * (4) ... MB_SER_PDU_SIZE_CRC = 2 - * - * (1') ... MB_PDU_SIZE_MAX = 253 - * (2') ... MB_PDU_FUNC_OFF = 0 - * (3') ... MB_PDU_DATA_OFF = 1 - * - */ - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_PDU_SIZE_MAX 253 /*!< Maximum size of a PDU. */ -#define MB_PDU_SIZE_MIN 1 /*!< Function Code */ -#define MB_PDU_FUNC_OFF 0 /*!< Offset of function code in PDU. */ -#define MB_PDU_DATA_OFF 1 /*!< Offset for response data in PDU. */ - -/* ----------------------- Prototypes 0-------------------------------------*/ -typedef void ( *pvMBFrameStart ) ( void ); - -typedef void ( *pvMBFrameStop ) ( void ); - -typedef eMBErrorCode( *peMBFrameReceive ) ( UCHAR * pucRcvAddress, - UCHAR ** pucFrame, - USHORT * pusLength ); - -typedef eMBErrorCode( *peMBFrameSend ) ( UCHAR slaveAddress, - const UCHAR * pucFrame, - USHORT usLength ); - -typedef void( *pvMBFrameClose ) ( void ); - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbfunc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbfunc.h deleted file mode 100644 index ccf54efe..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbfunc.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _MB_FUNC_H -#define _MB_FUNC_H - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif -#if MB_FUNC_OTHER_REP_SLAVEID_BUF > 0 - eMBException eMBFuncReportSlaveID( UCHAR * pucFrame, USHORT * usLen ); -#endif - -#if MB_FUNC_READ_INPUT_ENABLED > 0 -eMBException eMBFuncReadInputRegister( UCHAR * pucFrame, USHORT * usLen ); -#endif - -#if MB_FUNC_READ_HOLDING_ENABLED > 0 -eMBException eMBFuncReadHoldingRegister( UCHAR * pucFrame, USHORT * usLen ); -#endif - -#if MB_FUNC_WRITE_HOLDING_ENABLED > 0 -eMBException eMBFuncWriteHoldingRegister( UCHAR * pucFrame, USHORT * usLen ); -#endif - -#if MB_FUNC_WRITE_MULTIPLE_HOLDING_ENABLED > 0 -eMBException eMBFuncWriteMultipleHoldingRegister( UCHAR * pucFrame, USHORT * usLen ); -#endif - -#if MB_FUNC_READ_COILS_ENABLED > 0 -eMBException eMBFuncReadCoils( UCHAR * pucFrame, USHORT * usLen ); -#endif - -#if MB_FUNC_WRITE_COIL_ENABLED > 0 -eMBException eMBFuncWriteCoil( UCHAR * pucFrame, USHORT * usLen ); -#endif - -#if MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED > 0 -eMBException eMBFuncWriteMultipleCoils( UCHAR * pucFrame, USHORT * usLen ); -#endif - -#if MB_FUNC_READ_DISCRETE_INPUTS_ENABLED > 0 -eMBException eMBFuncReadDiscreteInputs( UCHAR * pucFrame, USHORT * usLen ); -#endif - -#if MB_FUNC_READWRITE_HOLDING_ENABLED > 0 -eMBException eMBFuncReadWriteMultipleHoldingRegister( UCHAR * pucFrame, USHORT * usLen ); -#endif - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbport.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbport.h deleted file mode 100644 index 3198f1be..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbport.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _MB_PORT_H -#define _MB_PORT_H - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif - -/* ----------------------- Type definitions ---------------------------------*/ - -typedef enum -{ - EV_READY, /*!< Startup finished. */ - EV_FRAME_RECEIVED, /*!< Frame received. */ - EV_EXECUTE, /*!< Execute function. */ - EV_FRAME_SENT /*!< Frame sent. */ -} eMBEventType; - -/*! \ingroup modbus - * \brief Parity used for characters in serial mode. - * - * The parity which should be applied to the characters sent over the serial - * link. Please note that this values are actually passed to the porting - * layer and therefore not all parity modes might be available. - */ -typedef enum -{ - MB_PAR_NONE, /*!< No parity. */ - MB_PAR_ODD, /*!< Odd parity. */ - MB_PAR_EVEN /*!< Even parity. */ -} eMBParity; - -/* ----------------------- Supporting functions -----------------------------*/ -BOOL xMBPortEventInit( void ); - -BOOL xMBPortEventPost( eMBEventType eEvent ); - -BOOL xMBPortEventGet( /*@out@ */ eMBEventType * eEvent ); - -/* ----------------------- Serial port functions ----------------------------*/ - -BOOL xMBPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, - UCHAR ucDataBits, eMBParity eParity ); - -void vMBPortClose( void ); - -void xMBPortSerialClose( void ); - -void vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable ); - -BOOL xMBPortSerialGetByte( CHAR * pucByte ); - -BOOL xMBPortSerialPutByte( CHAR ucByte ); - -/* ----------------------- Timers functions ---------------------------------*/ -BOOL xMBPortTimersInit( USHORT usTimeOut50us ); - -void xMBPortTimersClose( void ); - -void vMBPortTimersEnable( void ); - -void vMBPortTimersDisable( void ); - -void vMBPortTimersDelay( USHORT usTimeOutMS ); - -/* ----------------------- Callback for the protocol stack ------------------*/ - -/*! - * \brief Callback function for the porting layer when a new byte is - * available. - * - * Depending upon the mode this callback function is used by the RTU or - * ASCII transmission layers. In any case a call to xMBPortSerialGetByte() - * must immediately return a new character. - * - * \return TRUE if a event was posted to the queue because - * a new byte was received. The port implementation should wake up the - * tasks which are currently blocked on the eventqueue. - */ -extern BOOL( *pxMBFrameCBByteReceived ) ( void ); - -extern BOOL( *pxMBFrameCBTransmitterEmpty ) ( void ); - -extern BOOL( *pxMBPortCBTimerExpired ) ( void ); - -/* ----------------------- TCP port functions -------------------------------*/ -BOOL xMBTCPPortInit( USHORT usTCPPort ); - -void vMBTCPPortClose( void ); - -void vMBTCPPortDisable( void ); - -BOOL xMBTCPPortGetRequest( UCHAR **ppucMBTCPFrame, USHORT * usTCPLength ); - -BOOL xMBTCPPortSendResponse( const UCHAR *pucMBTCPFrame, USHORT usTCPLength ); - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbproto.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbproto.h deleted file mode 100644 index e2d14cf0..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbproto.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _MB_PROTO_H -#define _MB_PROTO_H - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif -/* ----------------------- Defines ------------------------------------------*/ -#define MB_ADDRESS_BROADCAST ( 0 ) /*! Modbus broadcast address. */ -#define MB_ADDRESS_MIN ( 1 ) /*! Smallest possible slave address. */ -#define MB_ADDRESS_MAX ( 247 ) /*! Biggest possible slave address. */ -#define MB_FUNC_NONE ( 0 ) -#define MB_FUNC_READ_COILS ( 1 ) -#define MB_FUNC_READ_DISCRETE_INPUTS ( 2 ) -#define MB_FUNC_WRITE_SINGLE_COIL ( 5 ) -#define MB_FUNC_WRITE_MULTIPLE_COILS ( 15 ) -#define MB_FUNC_READ_HOLDING_REGISTER ( 3 ) -#define MB_FUNC_READ_INPUT_REGISTER ( 4 ) -#define MB_FUNC_WRITE_REGISTER ( 6 ) -#define MB_FUNC_WRITE_MULTIPLE_REGISTERS ( 16 ) -#define MB_FUNC_READWRITE_MULTIPLE_REGISTERS ( 23 ) -#define MB_FUNC_DIAG_READ_EXCEPTION ( 7 ) -#define MB_FUNC_DIAG_DIAGNOSTIC ( 8 ) -#define MB_FUNC_DIAG_GET_COM_EVENT_CNT ( 11 ) -#define MB_FUNC_DIAG_GET_COM_EVENT_LOG ( 12 ) -#define MB_FUNC_OTHER_REPORT_SLAVEID ( 17 ) -#define MB_FUNC_ERROR ( 128 ) -/* ----------------------- Type definitions ---------------------------------*/ - typedef enum -{ - MB_EX_NONE = 0x00, - MB_EX_ILLEGAL_FUNCTION = 0x01, - MB_EX_ILLEGAL_DATA_ADDRESS = 0x02, - MB_EX_ILLEGAL_DATA_VALUE = 0x03, - MB_EX_SLAVE_DEVICE_FAILURE = 0x04, - MB_EX_ACKNOWLEDGE = 0x05, - MB_EX_SLAVE_BUSY = 0x06, - MB_EX_MEMORY_PARITY_ERROR = 0x08, - MB_EX_GATEWAY_PATH_FAILED = 0x0A, - MB_EX_GATEWAY_TGT_FAILED = 0x0B -} eMBException; - -typedef eMBException( *pxMBFunctionHandler ) ( UCHAR * pucFrame, USHORT * pusLength ); - -typedef struct -{ - UCHAR ucFunctionCode; - pxMBFunctionHandler pxHandler; -} xMBFunctionHandler; - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbutils.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbutils.h deleted file mode 100644 index 385b8c15..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/include/mbutils.h +++ /dev/null @@ -1,107 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _MB_UTILS_H -#define _MB_UTILS_H - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif -/*! \defgroup modbus_utils Utilities - * - * This module contains some utility functions which can be used by - * the application. It includes some special functions for working with - * bitfields backed by a character array buffer. - * - */ -/*! \addtogroup modbus_utils - * @{ - */ -/*! \brief Function to set bits in a byte buffer. - * - * This function allows the efficient use of an array to implement bitfields. - * The array used for storing the bits must always be a multiple of two - * bytes. Up to eight bits can be set or cleared in one operation. - * - * \param ucByteBuf A buffer where the bit values are stored. Must be a - * multiple of 2 bytes. No length checking is performed and if - * usBitOffset / 8 is greater than the size of the buffer memory contents - * is overwritten. - * \param usBitOffset The starting address of the bits to set. The first - * bit has the offset 0. - * \param ucNBits Number of bits to modify. The value must always be smaller - * than 8. - * \param ucValues Thew new values for the bits. The value for the first bit - * starting at usBitOffset is the LSB of the value - * ucValues - * - * \code - * ucBits[2] = {0, 0}; - * - * // Set bit 4 to 1 (read: set 1 bit starting at bit offset 4 to value 1) - * xMBUtilSetBits( ucBits, 4, 1, 1 ); - * - * // Set bit 7 to 1 and bit 8 to 0. - * xMBUtilSetBits( ucBits, 7, 2, 0x01 ); - * - * // Set bits 8 - 11 to 0x05 and bits 12 - 15 to 0x0A; - * xMBUtilSetBits( ucBits, 8, 8, 0x5A); - * \endcode - */ -void xMBUtilSetBits( UCHAR * ucByteBuf, USHORT usBitOffset, - UCHAR ucNBits, UCHAR ucValues ); - -/*! \brief Function to read bits in a byte buffer. - * - * This function is used to extract up bit values from an array. Up to eight - * bit values can be extracted in one step. - * - * \param ucByteBuf A buffer where the bit values are stored. - * \param usBitOffset The starting address of the bits to set. The first - * bit has the offset 0. - * \param ucNBits Number of bits to modify. The value must always be smaller - * than 8. - * - * \code - * UCHAR ucBits[2] = {0, 0}; - * UCHAR ucResult; - * - * // Extract the bits 3 - 10. - * ucResult = xMBUtilGetBits( ucBits, 3, 8 ); - * \endcode - */ -UCHAR xMBUtilGetBits( UCHAR * ucByteBuf, USHORT usBitOffset, - UCHAR ucNBits ); - -/*! @} */ - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/mb.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/mb.c deleted file mode 100644 index 0c4264fb..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/mb.c +++ /dev/null @@ -1,411 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "stdlib.h" -#include "string.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "mod_port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbconfig.h" -#include "mbframe.h" -#include "mbproto.h" -#include "mbfunc.h" - -#include "mbport.h" -#if MB_RTU_ENABLED == 1 -#include "mbrtu.h" -#endif -#if MB_ASCII_ENABLED == 1 -#include "mbascii.h" -#endif -#if MB_TCP_ENABLED == 1 -#include "mbtcp.h" -#endif - -#ifndef MB_PORT_HAS_CLOSE -#define MB_PORT_HAS_CLOSE 0 -#endif - -/* ----------------------- Static variables ---------------------------------*/ - -static UCHAR ucMBAddress; -static eMBMode eMBCurrentMode; - -static enum -{ - STATE_ENABLED, - STATE_DISABLED, - STATE_NOT_INITIALIZED -} eMBState = STATE_NOT_INITIALIZED; - -/* Functions pointer which are initialized in eMBInit( ). Depending on the - * mode (RTU or ASCII) the are set to the correct implementations. - */ -static peMBFrameSend peMBFrameSendCur; -static pvMBFrameStart pvMBFrameStartCur; -static pvMBFrameStop pvMBFrameStopCur; -static peMBFrameReceive peMBFrameReceiveCur; -static pvMBFrameClose pvMBFrameCloseCur; - -/* Callback functions required by the porting layer. They are called when - * an external event has happend which includes a timeout or the reception - * or transmission of a character. - */ -BOOL( *pxMBFrameCBByteReceived ) ( void ); -BOOL( *pxMBFrameCBTransmitterEmpty ) ( void ); -BOOL( *pxMBPortCBTimerExpired ) ( void ); - -BOOL( *pxMBFrameCBReceiveFSMCur ) ( void ); -BOOL( *pxMBFrameCBTransmitFSMCur ) ( void ); - -/* An array of Modbus functions handlers which associates Modbus function - * codes with implementing functions. - */ -static xMBFunctionHandler xFuncHandlers[MB_FUNC_HANDLERS_MAX] = { -#if MB_FUNC_OTHER_REP_SLAVEID_ENABLED > 0 - {MB_FUNC_OTHER_REPORT_SLAVEID, eMBFuncReportSlaveID}, -#endif -#if MB_FUNC_READ_INPUT_ENABLED > 0 - {MB_FUNC_READ_INPUT_REGISTER, eMBFuncReadInputRegister}, -#endif -#if MB_FUNC_READ_HOLDING_ENABLED > 0 - {MB_FUNC_READ_HOLDING_REGISTER, eMBFuncReadHoldingRegister}, -#endif -#if MB_FUNC_WRITE_MULTIPLE_HOLDING_ENABLED > 0 - {MB_FUNC_WRITE_MULTIPLE_REGISTERS, eMBFuncWriteMultipleHoldingRegister}, -#endif -#if MB_FUNC_WRITE_HOLDING_ENABLED > 0 - {MB_FUNC_WRITE_REGISTER, eMBFuncWriteHoldingRegister}, -#endif -#if MB_FUNC_READWRITE_HOLDING_ENABLED > 0 - {MB_FUNC_READWRITE_MULTIPLE_REGISTERS, eMBFuncReadWriteMultipleHoldingRegister}, -#endif -#if MB_FUNC_READ_COILS_ENABLED > 0 - {MB_FUNC_READ_COILS, eMBFuncReadCoils}, -#endif -#if MB_FUNC_WRITE_COIL_ENABLED > 0 - {MB_FUNC_WRITE_SINGLE_COIL, eMBFuncWriteCoil}, -#endif -#if MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED > 0 - {MB_FUNC_WRITE_MULTIPLE_COILS, eMBFuncWriteMultipleCoils}, -#endif -#if MB_FUNC_READ_DISCRETE_INPUTS_ENABLED > 0 - {MB_FUNC_READ_DISCRETE_INPUTS, eMBFuncReadDiscreteInputs}, -#endif -}; - -/* ----------------------- Start implementation -----------------------------*/ -eMBErrorCode -eMBInit( eMBMode eMode, UCHAR ucSlaveAddress, UCHAR ucPort, ULONG ulBaudRate, eMBParity eParity ) -{ - eMBErrorCode eStatus = MB_ENOERR; - - /* check preconditions */ - if( ( ucSlaveAddress == MB_ADDRESS_BROADCAST ) || - ( ucSlaveAddress < MB_ADDRESS_MIN ) || ( ucSlaveAddress > MB_ADDRESS_MAX ) ) - { - eStatus = MB_EINVAL; - } - else - { - ucMBAddress = ucSlaveAddress; - - switch ( eMode ) - { -#if MB_RTU_ENABLED > 0 - case MB_RTU: - pvMBFrameStartCur = eMBRTUStart; - pvMBFrameStopCur = eMBRTUStop; - peMBFrameSendCur = eMBRTUSend; - peMBFrameReceiveCur = eMBRTUReceive; - pvMBFrameCloseCur = MB_PORT_HAS_CLOSE ? vMBPortClose : NULL; - pxMBFrameCBByteReceived = xMBRTUReceiveFSM; - pxMBFrameCBTransmitterEmpty = xMBRTUTransmitFSM; - pxMBPortCBTimerExpired = xMBRTUTimerT35Expired; - - eStatus = eMBRTUInit( ucMBAddress, ucPort, ulBaudRate, eParity ); - break; -#endif -#if MB_ASCII_ENABLED > 0 - case MB_ASCII: - pvMBFrameStartCur = eMBASCIIStart; - pvMBFrameStopCur = eMBASCIIStop; - peMBFrameSendCur = eMBASCIISend; - peMBFrameReceiveCur = eMBASCIIReceive; - pvMBFrameCloseCur = MB_PORT_HAS_CLOSE ? vMBPortClose : NULL; - pxMBFrameCBByteReceived = xMBASCIIReceiveFSM; - pxMBFrameCBTransmitterEmpty = xMBASCIITransmitFSM; - pxMBPortCBTimerExpired = xMBASCIITimerT1SExpired; - - eStatus = eMBASCIIInit( ucMBAddress, ucPort, ulBaudRate, eParity ); - break; -#endif - default: - eStatus = MB_EINVAL; - } - - if( eStatus == MB_ENOERR ) - { - if( !xMBPortEventInit( ) ) - { - /* port dependent event module initalization failed. */ - eStatus = MB_EPORTERR; - } - else - { - eMBCurrentMode = eMode; - eMBState = STATE_DISABLED; - } - } - } - return eStatus; -} - -#if MB_TCP_ENABLED > 0 -eMBErrorCode -eMBTCPInit( USHORT ucTCPPort ) -{ - eMBErrorCode eStatus = MB_ENOERR; - - if( ( eStatus = eMBTCPDoInit( ucTCPPort ) ) != MB_ENOERR ) - { - eMBState = STATE_DISABLED; - } - else if( !xMBPortEventInit( ) ) - { - /* Port dependent event module initalization failed. */ - eStatus = MB_EPORTERR; - } - else - { - pvMBFrameStartCur = eMBTCPStart; - pvMBFrameStopCur = eMBTCPStop; - peMBFrameReceiveCur = eMBTCPReceive; - peMBFrameSendCur = eMBTCPSend; - pvMBFrameCloseCur = MB_PORT_HAS_CLOSE ? vMBTCPPortClose : NULL; - ucMBAddress = MB_TCP_PSEUDO_ADDRESS; - eMBCurrentMode = MB_TCP; - eMBState = STATE_DISABLED; - } - return eStatus; -} -#endif - -eMBErrorCode -eMBRegisterCB( UCHAR ucFunctionCode, pxMBFunctionHandler pxHandler ) -{ - int i; - eMBErrorCode eStatus; - - if( ( 0 < ucFunctionCode ) && ( ucFunctionCode <= 127 ) ) - { - ENTER_CRITICAL_SECTION( ); - if( pxHandler != NULL ) - { - for( i = 0; i < MB_FUNC_HANDLERS_MAX; i++ ) - { - if( ( xFuncHandlers[i].pxHandler == NULL ) || - ( xFuncHandlers[i].pxHandler == pxHandler ) ) - { - xFuncHandlers[i].ucFunctionCode = ucFunctionCode; - xFuncHandlers[i].pxHandler = pxHandler; - break; - } - } - eStatus = ( i != MB_FUNC_HANDLERS_MAX ) ? MB_ENOERR : MB_ENORES; - } - else - { - for( i = 0; i < MB_FUNC_HANDLERS_MAX; i++ ) - { - if( xFuncHandlers[i].ucFunctionCode == ucFunctionCode ) - { - xFuncHandlers[i].ucFunctionCode = 0; - xFuncHandlers[i].pxHandler = NULL; - break; - } - } - /* Remove can't fail. */ - eStatus = MB_ENOERR; - } - EXIT_CRITICAL_SECTION( ); - } - else - { - eStatus = MB_EINVAL; - } - return eStatus; -} - - -eMBErrorCode -eMBClose( void ) -{ - eMBErrorCode eStatus = MB_ENOERR; - - if( eMBState == STATE_DISABLED ) - { - if( pvMBFrameCloseCur != NULL ) - { - pvMBFrameCloseCur( ); - } - } - else - { - eStatus = MB_EILLSTATE; - } - return eStatus; -} - -eMBErrorCode -eMBEnable( void ) -{ - eMBErrorCode eStatus = MB_ENOERR; - - if( eMBState == STATE_DISABLED ) - { - /* Activate the protocol stack. */ - pvMBFrameStartCur( ); - eMBState = STATE_ENABLED; - } - else - { - eStatus = MB_EILLSTATE; - } - return eStatus; -} - -eMBErrorCode -eMBDisable( void ) -{ - eMBErrorCode eStatus; - - if( eMBState == STATE_ENABLED ) - { - pvMBFrameStopCur( ); - eMBState = STATE_DISABLED; - eStatus = MB_ENOERR; - } - else if( eMBState == STATE_DISABLED ) - { - eStatus = MB_ENOERR; - } - else - { - eStatus = MB_EILLSTATE; - } - return eStatus; -} - -eMBErrorCode -eMBPoll( void ) -{ - static UCHAR *ucMBFrame; - static UCHAR ucRcvAddress; - static UCHAR ucFunctionCode; - static USHORT usLength; - static eMBException eException; - - int i; - eMBErrorCode eStatus = MB_ENOERR; - eMBEventType eEvent; - - /* Check if the protocol stack is ready. */ - if( eMBState != STATE_ENABLED ) - { - return MB_EILLSTATE; - } - - /* Check if there is a event available. If not return control to caller. - * Otherwise we will handle the event. */ - if( xMBPortEventGet( &eEvent ) == TRUE ) - { - switch ( eEvent ) - { - case EV_READY: - break; - - case EV_FRAME_RECEIVED: - eStatus = peMBFrameReceiveCur( &ucRcvAddress, &ucMBFrame, &usLength ); - if( eStatus == MB_ENOERR ) - { - /* Check if the frame is for us. If not ignore the frame. */ - if( ( ucRcvAddress == ucMBAddress ) || ( ucRcvAddress == MB_ADDRESS_BROADCAST ) ) - { - ( void )xMBPortEventPost( EV_EXECUTE ); - } - } - break; - - case EV_EXECUTE: - ucFunctionCode = ucMBFrame[MB_PDU_FUNC_OFF]; - eException = MB_EX_ILLEGAL_FUNCTION; - for( i = 0; i < MB_FUNC_HANDLERS_MAX; i++ ) - { - /* No more function handlers registered. Abort. */ - if( xFuncHandlers[i].ucFunctionCode == 0 ) - { - break; - } - else if( xFuncHandlers[i].ucFunctionCode == ucFunctionCode ) - { - eException = xFuncHandlers[i].pxHandler( ucMBFrame, &usLength ); - break; - } - } - - /* If the request was not sent to the broadcast address we - * return a reply. */ - if( ucRcvAddress != MB_ADDRESS_BROADCAST ) - { - if( eException != MB_EX_NONE ) - { - /* An exception occured. Build an error frame. */ - usLength = 0; - ucMBFrame[usLength++] = ( UCHAR )( ucFunctionCode | MB_FUNC_ERROR ); - ucMBFrame[usLength++] = eException; - } - if( ( eMBCurrentMode == MB_ASCII ) && MB_ASCII_TIMEOUT_WAIT_BEFORE_SEND_MS ) - { - vMBPortTimersDelay( MB_ASCII_TIMEOUT_WAIT_BEFORE_SEND_MS ); - } - eStatus = peMBFrameSendCur( ucMBAddress, ucMBFrame, usLength ); - } - break; - - case EV_FRAME_SENT: - break; - } - } - return MB_ENOERR; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/rtu/mbcrc.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/rtu/mbcrc.c deleted file mode 100644 index 5f084d71..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/rtu/mbcrc.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/* ----------------------- Platform includes --------------------------------*/ -#include "mod_port.h" - -static const UCHAR aucCRCHi[] = { - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, - 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, - 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, - 0x00, 0xC1, 0x81, 0x40 -}; - -static const UCHAR aucCRCLo[] = { - 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7, - 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E, - 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9, - 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC, - 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3, - 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32, - 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D, - 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38, - 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF, - 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26, - 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1, - 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4, - 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB, - 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA, - 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5, - 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0, - 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97, - 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E, - 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89, - 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C, - 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83, - 0x41, 0x81, 0x80, 0x40 -}; - -USHORT -usMBCRC16( UCHAR * pucFrame, USHORT usLen ) -{ - UCHAR ucCRCHi = 0xFF; - UCHAR ucCRCLo = 0xFF; - int iIndex; - - while( usLen-- ) - { - iIndex = ucCRCLo ^ *( pucFrame++ ); - ucCRCLo = ( UCHAR )( ucCRCHi ^ aucCRCHi[iIndex] ); - ucCRCHi = aucCRCLo[iIndex]; - } - return ( USHORT )( ucCRCHi << 8 | ucCRCLo ); -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/rtu/mbcrc.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/rtu/mbcrc.h deleted file mode 100644 index b182e69d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/rtu/mbcrc.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _MB_CRC_H -#define _MB_CRC_H - -USHORT usMBCRC16( UCHAR * pucFrame, USHORT usLen ); - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/rtu/mbrtu.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/rtu/mbrtu.c deleted file mode 100644 index 3d04252d..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/rtu/mbrtu.c +++ /dev/null @@ -1,354 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "stdlib.h" -#include "string.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "mod_port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbrtu.h" -#include "mbframe.h" - -#include "mbcrc.h" -#include "mbport.h" - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_SER_PDU_SIZE_MIN 4 /*!< Minimum size of a Modbus RTU frame. */ -#define MB_SER_PDU_SIZE_MAX 256 /*!< Maximum size of a Modbus RTU frame. */ -#define MB_SER_PDU_SIZE_CRC 2 /*!< Size of CRC field in PDU. */ -#define MB_SER_PDU_ADDR_OFF 0 /*!< Offset of slave address in Ser-PDU. */ -#define MB_SER_PDU_PDU_OFF 1 /*!< Offset of Modbus-PDU in Ser-PDU. */ - -/* ----------------------- Type definitions ---------------------------------*/ -typedef enum -{ - STATE_RX_INIT, /*!< Receiver is in initial state. */ - STATE_RX_IDLE, /*!< Receiver is in idle state. */ - STATE_RX_RCV, /*!< Frame is beeing received. */ - STATE_RX_ERROR /*!< If the frame is invalid. */ -} eMBRcvState; - -typedef enum -{ - STATE_TX_IDLE, /*!< Transmitter is in idle state. */ - STATE_TX_XMIT /*!< Transmitter is in transfer state. */ -} eMBSndState; - -/* ----------------------- Static variables ---------------------------------*/ -static volatile eMBSndState eSndState; -static volatile eMBRcvState eRcvState; - -volatile UCHAR ucRTUBuf[MB_SER_PDU_SIZE_MAX]; - -static volatile UCHAR *pucSndBufferCur; -static volatile USHORT usSndBufferCount; - -static volatile USHORT usRcvBufferPos; - -/* ----------------------- Start implementation -----------------------------*/ -eMBErrorCode -eMBRTUInit( UCHAR ucSlaveAddress, UCHAR ucPort, ULONG ulBaudRate, eMBParity eParity ) -{ - eMBErrorCode eStatus = MB_ENOERR; - ULONG usTimerT35_50us; - - ( void )ucSlaveAddress; - ENTER_CRITICAL_SECTION( ); - - /* Modbus RTU uses 8 Databits. */ - if( xMBPortSerialInit( ucPort, ulBaudRate, 8, eParity ) != TRUE ) - { - eStatus = MB_EPORTERR; - } - else - { - /* If baudrate > 19200 then we should use the fixed timer values - * t35 = 1750us. Otherwise t35 must be 3.5 times the character time. - */ - if( ulBaudRate > 19200 ) - { - usTimerT35_50us = 35; /* 1800us. */ - } - else - { - /* The timer reload value for a character is given by: - * - * ChTimeValue = Ticks_per_1s / ( Baudrate / 11 ) - * = 11 * Ticks_per_1s / Baudrate - * = 220000 / Baudrate - * The reload for t3.5 is 1.5 times this value and similary - * for t3.5. - */ - usTimerT35_50us = ( 7UL * 220000UL ) / ( 2UL * ulBaudRate ); - } - if( xMBPortTimersInit( ( USHORT ) usTimerT35_50us ) != TRUE ) - { - eStatus = MB_EPORTERR; - } - } - EXIT_CRITICAL_SECTION( ); - - return eStatus; -} - -void -eMBRTUStart( void ) -{ - ENTER_CRITICAL_SECTION( ); - /* Initially the receiver is in the state STATE_RX_INIT. we start - * the timer and if no character is received within t3.5 we change - * to STATE_RX_IDLE. This makes sure that we delay startup of the - * modbus protocol stack until the bus is free. - */ - eRcvState = STATE_RX_INIT; - vMBPortSerialEnable( TRUE, FALSE ); - vMBPortTimersEnable( ); - - EXIT_CRITICAL_SECTION( ); -} - -void -eMBRTUStop( void ) -{ - ENTER_CRITICAL_SECTION( ); - vMBPortSerialEnable( FALSE, FALSE ); - vMBPortTimersDisable( ); - EXIT_CRITICAL_SECTION( ); -} - -eMBErrorCode -eMBRTUReceive( UCHAR * pucRcvAddress, UCHAR ** pucFrame, USHORT * pusLength ) -{ - BOOL xFrameReceived = FALSE; - eMBErrorCode eStatus = MB_ENOERR; - - ENTER_CRITICAL_SECTION( ); - assert( usRcvBufferPos < MB_SER_PDU_SIZE_MAX ); - - /* Length and CRC check */ - if( ( usRcvBufferPos >= MB_SER_PDU_SIZE_MIN ) - && ( usMBCRC16( ( UCHAR * ) ucRTUBuf, usRcvBufferPos ) == 0 ) ) - { - /* Save the address field. All frames are passed to the upper layed - * and the decision if a frame is used is done there. - */ - *pucRcvAddress = ucRTUBuf[MB_SER_PDU_ADDR_OFF]; - - /* Total length of Modbus-PDU is Modbus-Serial-Line-PDU minus - * size of address field and CRC checksum. - */ - *pusLength = ( USHORT )( usRcvBufferPos - MB_SER_PDU_PDU_OFF - MB_SER_PDU_SIZE_CRC ); - - /* Return the start of the Modbus PDU to the caller. */ - *pucFrame = ( UCHAR * ) & ucRTUBuf[MB_SER_PDU_PDU_OFF]; - xFrameReceived = TRUE; - } - else - { - eStatus = MB_EIO; - } - - EXIT_CRITICAL_SECTION( ); - return eStatus; -} - -eMBErrorCode -eMBRTUSend( UCHAR ucSlaveAddress, const UCHAR * pucFrame, USHORT usLength ) -{ - eMBErrorCode eStatus = MB_ENOERR; - USHORT usCRC16; - - ENTER_CRITICAL_SECTION( ); - - /* Check if the receiver is still in idle state. If not we where to - * slow with processing the received frame and the master sent another - * frame on the network. We have to abort sending the frame. - */ - if( eRcvState == STATE_RX_IDLE ) - { - /* First byte before the Modbus-PDU is the slave address. */ - pucSndBufferCur = ( UCHAR * ) pucFrame - 1; - usSndBufferCount = 1; - - /* Now copy the Modbus-PDU into the Modbus-Serial-Line-PDU. */ - pucSndBufferCur[MB_SER_PDU_ADDR_OFF] = ucSlaveAddress; - usSndBufferCount += usLength; - - /* Calculate CRC16 checksum for Modbus-Serial-Line-PDU. */ - usCRC16 = usMBCRC16( ( UCHAR * ) pucSndBufferCur, usSndBufferCount ); - ucRTUBuf[usSndBufferCount++] = ( UCHAR )( usCRC16 & 0xFF ); - ucRTUBuf[usSndBufferCount++] = ( UCHAR )( usCRC16 >> 8 ); - - /* Activate the transmitter. */ - eSndState = STATE_TX_XMIT; - vMBPortSerialEnable( FALSE, TRUE ); - } - else - { - eStatus = MB_EIO; - } - EXIT_CRITICAL_SECTION( ); - return eStatus; -} - -BOOL -xMBRTUReceiveFSM( void ) -{ - BOOL xTaskNeedSwitch = FALSE; - UCHAR ucByte; - - assert( eSndState == STATE_TX_IDLE ); - - /* Always read the character. */ - ( void )xMBPortSerialGetByte( ( CHAR * ) & ucByte ); - - switch ( eRcvState ) - { - /* If we have received a character in the init state we have to - * wait until the frame is finished. - */ - case STATE_RX_INIT: - vMBPortTimersEnable( ); - break; - - /* In the error state we wait until all characters in the - * damaged frame are transmitted. - */ - case STATE_RX_ERROR: - vMBPortTimersEnable( ); - break; - - /* In the idle state we wait for a new character. If a character - * is received the t1.5 and t3.5 timers are started and the - * receiver is in the state STATE_RX_RECEIVCE. - */ - case STATE_RX_IDLE: - usRcvBufferPos = 0; - ucRTUBuf[usRcvBufferPos++] = ucByte; - eRcvState = STATE_RX_RCV; - - /* Enable t3.5 timers. */ - vMBPortTimersEnable( ); - break; - - /* We are currently receiving a frame. Reset the timer after - * every character received. If more than the maximum possible - * number of bytes in a modbus frame is received the frame is - * ignored. - */ - case STATE_RX_RCV: - if( usRcvBufferPos < MB_SER_PDU_SIZE_MAX ) - { - ucRTUBuf[usRcvBufferPos++] = ucByte; - } - else - { - eRcvState = STATE_RX_ERROR; - } - vMBPortTimersEnable( ); - break; - } - return xTaskNeedSwitch; -} - -BOOL -xMBRTUTransmitFSM( void ) -{ - BOOL xNeedPoll = FALSE; - - assert( eRcvState == STATE_RX_IDLE ); - - switch ( eSndState ) - { - /* We should not get a transmitter event if the transmitter is in - * idle state. */ - case STATE_TX_IDLE: - /* enable receiver/disable transmitter. */ - vMBPortSerialEnable( TRUE, FALSE ); - break; - - case STATE_TX_XMIT: - /* check if we are finished. */ - if( usSndBufferCount != 0 ) - { - xMBPortSerialPutByte( ( CHAR )*pucSndBufferCur ); - pucSndBufferCur++; /* next byte in sendbuffer. */ - usSndBufferCount--; - } - else - { - xNeedPoll = xMBPortEventPost( EV_FRAME_SENT ); - /* Disable transmitter. This prevents another transmit buffer - * empty interrupt. */ - vMBPortSerialEnable( TRUE, FALSE ); - eSndState = STATE_TX_IDLE; - } - break; - } - - return xNeedPoll; -} - -BOOL -xMBRTUTimerT35Expired( void ) -{ - BOOL xNeedPoll = FALSE; - - switch ( eRcvState ) - { - /* Timer t35 expired. Startup phase is finished. */ - case STATE_RX_INIT: - xNeedPoll = xMBPortEventPost( EV_READY ); - break; - - /* A frame was received and t35 expired. Notify the listener that - * a new frame was received. */ - case STATE_RX_RCV: - xNeedPoll = xMBPortEventPost( EV_FRAME_RECEIVED ); - break; - - /* An error occured while receiving the frame. */ - case STATE_RX_ERROR: - break; - - /* Function called in an illegal state. */ - default: - assert( ( eRcvState == STATE_RX_INIT ) || - ( eRcvState == STATE_RX_RCV ) || ( eRcvState == STATE_RX_ERROR ) ); - } - - vMBPortTimersDisable( ); - eRcvState = STATE_RX_IDLE; - - return xNeedPoll; -} diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/rtu/mbrtu.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/rtu/mbrtu.h deleted file mode 100644 index 69816871..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/rtu/mbrtu.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _MB_RTU_H -#define _MB_RTU_H - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif - eMBErrorCode eMBRTUInit( UCHAR slaveAddress, UCHAR ucPort, ULONG ulBaudRate, - eMBParity eParity ); -void eMBRTUStart( void ); -void eMBRTUStop( void ); -eMBErrorCode eMBRTUReceive( UCHAR * pucRcvAddress, UCHAR ** pucFrame, USHORT * pusLength ); -eMBErrorCode eMBRTUSend( UCHAR slaveAddress, const UCHAR * pucFrame, USHORT usLength ); -BOOL xMBRTUReceiveFSM( void ); -BOOL xMBRTUTransmitFSM( void ); -BOOL xMBRTUTimerT15Expired( void ); -BOOL xMBRTUTimerT35Expired( void ); - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/tcp/mbtcp.c b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/tcp/mbtcp.c deleted file mode 100644 index b9da0646..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/tcp/mbtcp.c +++ /dev/null @@ -1,157 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/* ----------------------- System includes ----------------------------------*/ -#include "stdlib.h" -#include "string.h" - -/* ----------------------- Platform includes --------------------------------*/ -#include "mod_port.h" - -/* ----------------------- Modbus includes ----------------------------------*/ -#include "mb.h" -#include "mbconfig.h" -#include "mbtcp.h" -#include "mbframe.h" -#include "mbport.h" - -#if MB_TCP_ENABLED > 0 - -/* ----------------------- Defines ------------------------------------------*/ - -/* ----------------------- MBAP Header --------------------------------------*/ -/* - * - * <------------------------ MODBUS TCP/IP ADU(1) -------------------------> - * <----------- MODBUS PDU (1') ----------------> - * +-----------+---------------+------------------------------------------+ - * | TID | PID | Length | UID |Code | Data | - * +-----------+---------------+------------------------------------------+ - * | | | | | - * (2) (3) (4) (5) (6) - * - * (2) ... MB_TCP_TID = 0 (Transaction Identifier - 2 Byte) - * (3) ... MB_TCP_PID = 2 (Protocol Identifier - 2 Byte) - * (4) ... MB_TCP_LEN = 4 (Number of bytes - 2 Byte) - * (5) ... MB_TCP_UID = 6 (Unit Identifier - 1 Byte) - * (6) ... MB_TCP_FUNC = 7 (Modbus Function Code) - * - * (1) ... Modbus TCP/IP Application Data Unit - * (1') ... Modbus Protocol Data Unit - */ - -#define MB_TCP_TID 0 -#define MB_TCP_PID 2 -#define MB_TCP_LEN 4 -#define MB_TCP_UID 6 -#define MB_TCP_FUNC 7 - -#define MB_TCP_PROTOCOL_ID 0 /* 0 = Modbus Protocol */ - - -/* ----------------------- Start implementation -----------------------------*/ -eMBErrorCode -eMBTCPDoInit( USHORT ucTCPPort ) -{ - eMBErrorCode eStatus = MB_ENOERR; - - if( xMBTCPPortInit( ucTCPPort ) == FALSE ) - { - eStatus = MB_EPORTERR; - } - return eStatus; -} - -void -eMBTCPStart( void ) -{ -} - -void -eMBTCPStop( void ) -{ - /* Make sure that no more clients are connected. */ - vMBTCPPortDisable( ); -} - -eMBErrorCode -eMBTCPReceive( UCHAR * pucRcvAddress, UCHAR ** ppucFrame, USHORT * pusLength ) -{ - eMBErrorCode eStatus = MB_EIO; - UCHAR *pucMBTCPFrame; - USHORT usLength; - USHORT usPID; - - if( xMBTCPPortGetRequest( &pucMBTCPFrame, &usLength ) != FALSE ) - { - usPID = pucMBTCPFrame[MB_TCP_PID] << 8U; - usPID |= pucMBTCPFrame[MB_TCP_PID + 1]; - - if( usPID == MB_TCP_PROTOCOL_ID ) - { - *ppucFrame = &pucMBTCPFrame[MB_TCP_FUNC]; - *pusLength = usLength - MB_TCP_FUNC; - eStatus = MB_ENOERR; - - /* Modbus TCP does not use any addresses. Fake the source address such - * that the processing part deals with this frame. - */ - *pucRcvAddress = MB_TCP_PSEUDO_ADDRESS; - } - } - else - { - eStatus = MB_EIO; - } - return eStatus; -} - -eMBErrorCode -eMBTCPSend( UCHAR _unused, const UCHAR * pucFrame, USHORT usLength ) -{ - eMBErrorCode eStatus = MB_ENOERR; - UCHAR *pucMBTCPFrame = ( UCHAR * ) pucFrame - MB_TCP_FUNC; - USHORT usTCPLength = usLength + MB_TCP_FUNC; - - /* The MBAP header is already initialized because the caller calls this - * function with the buffer returned by the previous call. Therefore we - * only have to update the length in the header. Note that the length - * header includes the size of the Modbus PDU and the UID Byte. Therefore - * the length is usLength plus one. - */ - pucMBTCPFrame[MB_TCP_LEN] = ( usLength + 1 ) >> 8U; - pucMBTCPFrame[MB_TCP_LEN + 1] = ( usLength + 1 ) & 0xFF; - if( xMBTCPPortSendResponse( pucMBTCPFrame, usTCPLength ) == FALSE ) - { - eStatus = MB_EIO; - } - return eStatus; -} - -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/tcp/mbtcp.h b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/tcp/mbtcp.h deleted file mode 100644 index 16b651ee..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/modbus/tcp/mbtcp.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU. - * Copyright (c) 2006-2018 Christian Walter - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _MB_TCP_H -#define _MB_TCP_H - -#ifdef __cplusplus -PR_BEGIN_EXTERN_C -#endif - -/* ----------------------- Defines ------------------------------------------*/ -#define MB_TCP_PSEUDO_ADDRESS 255 - -/* ----------------------- Function prototypes ------------------------------*/ - eMBErrorCode eMBTCPDoInit( USHORT ucTCPPort ); -void eMBTCPStart( void ); -void eMBTCPStop( void ); -eMBErrorCode eMBTCPReceive( UCHAR * pucRcvAddress, UCHAR ** pucFrame, - USHORT * pusLength ); -eMBErrorCode eMBTCPSend( UCHAR _unused, const UCHAR * pucFrame, - USHORT usLength ); - -#ifdef __cplusplus -PR_END_EXTERN_C -#endif -#endif diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/README.txt b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/README.txt deleted file mode 100644 index e37d1659..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/README.txt +++ /dev/null @@ -1,18 +0,0 @@ - -The tools have not been bundled because of license restrictions. I can -recommend the following tools to test the modbus implementation: - - - Modpoll Modbus® Polling Tool: A free command line based Modbus - master simulator and test utility. - - available: http://www.focus-sw.com/fieldtalk/modpoll.html - - - Modbus Poll master simulator: A Modbus master simulator with a - excellent user interface. Support RTU and ASCII modes. - - available: http://www.modbustools.com/modbus_poll.asp - -Simple download the Modpoll Polling Tool and place it with the name -'modpoll.exe' in this directory. - - diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/doxygen.exe b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/doxygen.exe deleted file mode 100644 index 6526149412c76117948db54e5124a2b41b7a4e81..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 2990080 zcmeFadt8-O_CJ0=K-7chsHjInJJqQusYtLeuqg31q8$!5%Nv!|8M3lEl$9BFz<@{0 zCN;Z`W;Hf7O-+mp74P81rglz8@ zXd~%jTTS|`T3&~v?9^*#Tok&<;Yj?U8BXe&fJz9Qcg`zj5F<4*dU!12Vq9!(rt4 z5{-OcoWDR`!!kI$K2bi+a5!Z8Ju!}q#&wHqKhgulx1NAsIh=3t;5?PY#b!Y*KLi_O@(f)yJ`TkWtk z1cy7TcgIY1T-VD;uHJ({ZuaZfez%f^%2Q<1*&Psvs+ziOhOSfqBrQomlCU1oYlo#1 zlcMKE#HX#xXzYlsWac#0-r%fWY(HS@_AmF`d!=JlOvRaXn>t!kxjCjLi5W%`$*kTS z>T1N4$F%zsjU<9n3B8aINQ~+XbipC{_5M{C`Iv$`ArFFD52zw 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u-ao7J@2-e$w z-1Yw^c)k6HN{%5Z?mvEfC)V S@huSF0`V;n-vWPXf&T!F&aCDD diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/indent.sh b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/indent.sh deleted file mode 100644 index 3a510a66..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/indent.sh +++ /dev/null @@ -1,28 +0,0 @@ -#!/bin/sh - -MYDIR="/cygdrive/c/GnuWin32/bin/" - -$MYDIR/indent.exe --version -$MYDIR/indent.exe \ - --declaration-indentation16 \ - --procnames-start-lines \ - --blank-lines-after-procedures \ - --break-before-boolean-operator \ - --braces-after-if-line \ - --braces-after-struct-decl-line \ - --brace-indent0 \ - --case-indentation0 \ - --no-space-after-function-call-names \ - --no-space-after-for \ - --no-space-after-if \ - --no-space-after-while \ - --no-space-after-casts \ - --space-after-parentheses \ - --dont-format-comments \ - --indent-level4 \ - --ignore-newlines \ - --no-tabs \ - --line-length120 \ - $@ - -unix2dos $@ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/lint-arm.sh b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/lint-arm.sh deleted file mode 100644 index b54dd0b6..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/lint-arm.sh +++ /dev/null @@ -1,5 +0,0 @@ -splint \ - -I. -I../../modbus/include -I../../modbus/rtu -I../../modbus/ascii \ - -Iport -Ilibrary/include \ - -Ifreertos/include -Ifreertos/portable/GCC/ARM7_STR71X/ \ - -DSTR71X_GCC=1 -nullpass +charint -booltype BOOL $@ diff --git a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/lint-avr.sh b/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/lint-avr.sh deleted file mode 100644 index 56c0cf7c..00000000 --- a/components/connectivity/Modbus/3rdparty/freemodbus-v1.6/tools/lint-avr.sh +++ /dev/null @@ -1,4 +0,0 @@ -splint \ - -I. -I../../modbus/include -I../../modbus/rtu -I../../modbus/ascii \ - -Iport -I/cygdrive/c/WinAVR/avr/include \ - -nullpass +charint -booltype BOOL -D__AVR_ATmega168__=1 $@